Pull MFD updates from Lee Jones: "New Support & Features: - Add comprehensive support for the ROHM BD72720 PMIC, including core MFD, regulator, GPIO, clock gate, RTC, and power-supply drivers - Add support for the Rockchip RK801 PMIC, including core MFD and regulator drivers - Add support for the ROHM BD73900 PMIC by leveraging existing common drivers - Wire up RTC, hwmon, and input sub-devices for the Apple SMC (macsmc) driver - Add support for the Delta Networks TN48M switch CPLD via the simple-mfd-i2c driver - Add support for the TS133 variant to the QNAP MCU driver - Provide support for the sama7d65 XLCD controller in the Atmel HLCDC driver - Add backlight sub-device support to the Congatec Board Controller (cgbc) - Add Intel Nova Lake-S (NVL-S) PCI IDs to the Intel LPSS driver Improvements & Fixes: - Implement a "wrapper regmap" for the ROHM BD72720 to handle dual I2C slave addresses (0x4b and 0x4c) transparently for child devices - Introduce mutex locking around 'mfd_of_node_list' in the MFD core to ensure safe concurrent access - Fix a potential regulator resource leak in the Arizona core driver during boot sequence failures - Resolve child device duplication issues on driver rebind for Qualcomm PM8xxx and OMAP USB host drivers by using of_platform_depopulate() - Fix IRQ domain name duplication for the Samsung S2MPG10 by adding a unique domain suffix - Implement LOCK register handling for the TI TPS65214 variant to unlock registers at probe time - Fully convert the Loongson-2K BMC driver to use managed resources (pcim) and the standard PCI resource API - Ensure the Apple SMC mutex is correctly initialized during probe to prevent NULL pointer dereferences - Expand the ROHM BD71828 power-supply driver to support 9-bit register addresses - Simplify the Samsung S5M RTC driver by querying platform device IRQ resources directly - Revert an incorrect read-to-write mask change in the DA9052 SPI driver to restore default OTP behavior - Fix kernel-doc warnings in the TI TPS6105x driver - Cleanups & Refactoring - Simplify the MFD core by utilizing the scoped for_each_child_of_node_scoped() macro and streamlining device_node storage - Rename ROHM BD71828 IC-specific entities to use consistent prefixes for better extensibility - Refactor ROHM BD71828 regmap definitions using the regmap_reg_range() macro - Update the ROHM BD71828 driver to use standard C-style comment headers - Remove the now unused 'irq_data' field from the Samsung SEC core structure - Drop unnecessary use of irqd_get_trigger_type() in the Maxim MAX77759 driver - Default MFD_SPACEMIT_P1 to 'm' if ARCH_SPACEMIT is selected - Add missing charger-related registers to the ROHM BD71828 core header and Type-C CC registers to the AXP717 Device Tree Binding Updates: - Add new bindings for the ROHM BD72720 PMIC, Rockchip RK801 PMIC, Bitmain BM1880 System Controller, and NXP LPC32xx System Control Block - Clarify trickle-charge terminology and add properties for voltage drop (VDR) correction and upper charge limits to the generic battery binding - Document GPR syscon for NXP S32 SoCs and the smp-memram subnode for Aspeed SCU - Document numerous new Qualcomm SPMI PMIC compatibles (pmcx0102, pmh0101, pmk8850, etc) - Add compatibles for the sama7d65 XLCD (Atmel), LAN9691 Flexcom (Microchip), and various MediaTek SCPSYS and regulator components - Fix a dead link to the audio codec binding in the DA9055 documentation" * tag 'mfd-next-6.20' of git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd: (41 commits) dt-bindings: mfd: da9055: Fix dead link to codec binding mfd: cgbc: Add support for backlight dt-bindings: mfd: qcom,spmi-pmic: Document PMICs present on Glymur and Kaanapali dt-bindings: mfd: Document smp-memram subnode for aspeed,ast2x00-scu mfd: intel-lpss: Add Intel Nova Lake-S PCI IDs mfd: ls2kbmc: Use PCI API instead of direct accesses mfd: ls2kbmc: Fully convert to use managed resources dt-bindings: mfd: mediatek: mt6397: Add missing MT6331 regulator compat dt-bindings: mfd: mediatek,mt8195-scpsys: Add mediatek,mt6795-scpsys dt-bindings: mfd: atmel,sama5d2-flexcom: Add microchip,lan9691-flexcom mfd: omap-usb-host: Fix OF populate on driver rebind mfd: qcom-pm8xxx: Fix OF populate on driver rebind dt-bindings: mfd: syscon: Allow syscon compatible for mediatek,mt7981-topmisc mfd: qnap-mcu: Add driver data for TS133 variant dt-bindings: mfd: qnap,ts433-mcu: Add qnap,ts133-mcu compatible mfd: sec: Fix IRQ domain names duplication mfd: simple-mfd-i2c: Add Delta TN48M CPLD support mfd: macsmc: Initialize mutex dt-bindings: mfd: nxp: Add NXP LPC32xx System Control Block mfd: Kconfig: Default MFD_SPACEMIT_P1 to 'm' if ARCH_SPACEMIT ...
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| @@ -174,6 +174,9 @@ enum axp20x_variants { · 173 unmodified lines | |||
| 174 | #define AXP717_ADC_DATA_SEL 0xcd | 174 | #define AXP717_ADC_DATA_SEL 0xcd |
| 175 | #define AXP717_ADC_DATA_H 0xce | 175 | #define AXP717_ADC_DATA_H 0xce |
| 176 | #define AXP717_ADC_DATA_L 0xcf | 176 | #define AXP717_ADC_DATA_L 0xcf |
| 177 | #define AXP717_TYPEC_CC_AA_EN 0xe1 | ||
| 178 | #define AXP717_TYPEC_CC_MODE_CONTROL 0xe3 | ||
| 179 | #define AXP717_TYPEC_CC_STATUS 0xe7 | ||
| 177 | 180 | ||
| 178 | #define AXP806_STARTUP_SRC 0x00 | 181 | #define AXP806_STARTUP_SRC 0x00 |
| 179 | #define AXP806_CHIP_ID 0x03 | 182 | #define AXP806_CHIP_ID 0x03 |
| @@ -340,6 +340,123 @@ enum rk818_reg { · 339 unmodified lines | |||
| 340 | #define RK818_USB_ILMIN_2000MA 0x7 | 340 | #define RK818_USB_ILMIN_2000MA 0x7 |
| 341 | #define RK818_USB_CHG_SD_VSEL_MASK 0x70 | 341 | #define RK818_USB_CHG_SD_VSEL_MASK 0x70 |
| 342 | 342 | ||
| 343 | /* RK801 */ | ||
| 344 | enum rk801_reg { | ||
| 345 | RK801_ID_DCDC1, | ||
| 346 | RK801_ID_DCDC2, | ||
| 347 | RK801_ID_DCDC4, | ||
| 348 | RK801_ID_DCDC3, | ||
| 349 | RK801_ID_LDO1, | ||
| 350 | RK801_ID_LDO2, | ||
| 351 | RK801_ID_SWITCH, | ||
| 352 | RK801_ID_MAX, | ||
| 353 | }; | ||
| 354 | |||
| 355 | #define RK801_SLP_REG_OFFSET 5 | ||
| 356 | #define RK801_NUM_REGULATORS 7 | ||
| 357 | |||
| 358 | #define RK801_HW_SYNC_US 32 | ||
| 359 | |||
| 360 | /* RK801 Register Definitions */ | ||
| 361 | #define RK801_ID_MSB 0x00 | ||
| 362 | #define RK801_ID_LSB 0x01 | ||
| 363 | #define RK801_OTP_VER_REG 0x02 | ||
| 364 | #define RK801_POWER_EN0_REG 0x03 | ||
| 365 | #define RK801_POWER_EN1_REG 0x04 | ||
| 366 | #define RK801_POWER_SLP_EN_REG 0x05 | ||
| 367 | #define RK801_POWER_FPWM_EN_REG 0x06 | ||
| 368 | #define RK801_SLP_LP_CONFIG_REG 0x07 | ||
| 369 | #define RK801_BUCK_CONFIG_REG 0x08 | ||
| 370 | #define RK801_BUCK1_ON_VSEL_REG 0x09 | ||
| 371 | #define RK801_BUCK2_ON_VSEL_REG 0x0a | ||
| 372 | #define RK801_BUCK4_ON_VSEL_REG 0x0b | ||
| 373 | #define RK801_LDO1_ON_VSEL_REG 0x0c | ||
| 374 | #define RK801_LDO2_ON_VSEL_REG 0x0d | ||
| 375 | #define RK801_BUCK1_SLP_VSEL_REG 0x0e | ||
| 376 | #define RK801_BUCK2_SLP_VSEL_REG 0x0f | ||
| 377 | #define RK801_BUCK4_SLP_VSEL_REG 0x10 | ||
| 378 | #define RK801_LDO1_SLP_VSEL_REG 0x11 | ||
| 379 | #define RK801_LDO2_SLP_VSEL_REG 0x12 | ||
| 380 | #define RK801_LDO_SW_IMAX_REG 0x13 | ||
| 381 | #define RK801_SYS_STS_REG 0x14 | ||
| 382 | #define RK801_SYS_CFG0_REG 0x15 | ||
| 383 | #define RK801_SYS_CFG1_REG 0x16 | ||
| 384 | #define RK801_SYS_CFG2_REG 0x17 | ||
| 385 | #define RK801_SYS_CFG3_REG 0x18 | ||
| 386 | #define RK801_SYS_CFG4_REG 0x19 | ||
| 387 | #define RK801_SLEEP_CFG_REG 0x1a | ||
| 388 | #define RK801_ON_SOURCE_REG 0x1b | ||
| 389 | #define RK801_OFF_SOURCE_REG 0x1c | ||
| 390 | #define RK801_PWRON_KEY_REG 0x1d | ||
| 391 | #define RK801_INT_STS0_REG 0x1e | ||
| 392 | #define RK801_INT_MASK0_REG 0x1f | ||
| 393 | #define RK801_INT_CONFIG_REG 0x20 | ||
| 394 | #define RK801_CON_BACK1_REG 0x21 | ||
| 395 | #define RK801_CON_BACK2_REG 0x22 | ||
| 396 | #define RK801_DATA_CON0_REG 0x23 | ||
| 397 | #define RK801_DATA_CON1_REG 0x24 | ||
| 398 | #define RK801_DATA_CON2_REG 0x25 | ||
| 399 | #define RK801_DATA_CON3_REG 0x26 | ||
| 400 | #define RK801_POWER_EXIT_SLP_SEQ0_REG 0x27 | ||
| 401 | #define RK801_POWER_EXIT_SLP_SEQ1_REG 0x28 | ||
| 402 | #define RK801_POWER_EXIT_SLP_SEQ2_REG 0x29 | ||
| 403 | #define RK801_POWER_EXIT_SLP_SEQ3_REG 0x2a | ||
| 404 | #define RK801_POWER_ENTER_SLP_OR_SHTD_SEQ0_REG 0x2b | ||
| 405 | #define RK801_POWER_ENTER_SLP_OR_SHTD_SEQ1_REG 0x2c | ||
| 406 | #define RK801_POWER_ENTER_SLP_OR_SHTD_SEQ2_REG 0x2d | ||
| 407 | #define RK801_POWER_ENTER_SLP_OR_SHTD_SEQ3_REG 0x2e | ||
| 408 | #define RK801_BUCK_DEBUG1_REG 0x2f | ||
| 409 | #define RK801_BUCK_DEBUG2_REG 0x30 | ||
| 410 | #define RK801_BUCK_DEBUG3_REG 0x31 | ||
| 411 | #define RK801_BUCK_DEBUG4_REG 0x32 | ||
| 412 | #define RK801_BUCK_DEBUG5_REG 0x33 | ||
| 413 | #define RK801_BUCK_DEBUG7_REG 0x34 | ||
| 414 | #define RK801_OTP_EN_CON_REG 0x35 | ||
| 415 | #define RK801_TEST_CON_REG 0x36 | ||
| 416 | #define RK801_EFUSE_CONTROL_REG 0x37 | ||
| 417 | #define RK801_SYS_CFG3_OTP_REG 0x38 | ||
| 418 | |||
| 419 | /* RK801 IRQ Definitions */ | ||
| 420 | #define RK801_IRQ_PWRON_FALL 0 | ||
| 421 | #define RK801_IRQ_PWRON_RISE 1 | ||
| 422 | #define RK801_IRQ_PWRON 2 | ||
| 423 | #define RK801_IRQ_PWRON_LP 3 | ||
| 424 | #define RK801_IRQ_HOTDIE 4 | ||
| 425 | #define RK801_IRQ_VDC_RISE 5 | ||
| 426 | #define RK801_IRQ_VDC_FALL 6 | ||
| 427 | #define RK801_IRQ_PWRON_FALL_MSK BIT(0) | ||
| 428 | #define RK801_IRQ_PWRON_RISE_MSK BIT(1) | ||
| 429 | #define RK801_IRQ_PWRON_MSK BIT(2) | ||
| 430 | #define RK801_IRQ_PWRON_LP_MSK BIT(3) | ||
| 431 | #define RK801_IRQ_HOTDIE_MSK BIT(4) | ||
| 432 | #define RK801_IRQ_VDC_RISE_MSK BIT(5) | ||
| 433 | #define RK801_IRQ_VDC_FALL_MSK BIT(6) | ||
| 434 | /* RK801_SLP_LP_CONFIG_REG */ | ||
| 435 | #define RK801_BUCK_SLP_LP_EN BIT(3) | ||
| 436 | #define RK801_PLDO_SLP_LP_EN BIT(1) | ||
| 437 | #define RK801_SLP_LP_MASK (RK801_PLDO_SLP_LP_EN | RK801_BUCK_SLP_LP_EN) | ||
| 438 | /* RK801_SLEEP_CFG_REG */ | ||
| 439 | #define RK801_SLEEP_FUN_MSK 0x3 | ||
| 440 | #define RK801_NONE_FUN 0x0 | ||
| 441 | #define RK801_SLEEP_FUN 0x1 | ||
| 442 | #define RK801_SHUTDOWN_FUN 0x2 | ||
| 443 | #define RK801_RESET_FUN 0x3 | ||
| 444 | /* RK801_SYS_CFG2_REG */ | ||
| 445 | #define RK801_SLEEP_POL_MSK BIT(1) | ||
| 446 | #define RK801_SLEEP_ACT_H BIT(1) | ||
| 447 | #define RK801_SLEEP_ACT_L 0 | ||
| 448 | #define RK801_RST_MSK (0x3 << 4) | ||
| 449 | #define RK801_RST_RESTART_PMU (0x0 << 4) | ||
| 450 | #define RK801_RST_RESTART_REG (0x1 << 4) | ||
| 451 | #define RK801_RST_RESTART_REG_RESETB (0x2 << 4) | ||
| 452 | /* RK801_INT_CONFIG_REG */ | ||
| 453 | #define RK801_INT_POL_MSK BIT(1) | ||
| 454 | #define RK801_INT_ACT_H BIT(1) | ||
| 455 | #define RK801_INT_ACT_L 0 | ||
| 456 | #define RK801_FPWM_MODE 1 | ||
| 457 | #define RK801_AUTO_PWM_MODE 0 | ||
| 458 | #define RK801_PLDO_HRDEC_EN BIT(6) | ||
| 459 | |||
| 343 | /* RK805 */ | 460 | /* RK805 */ |
| 344 | enum rk805_reg { | 461 | enum rk805_reg { |
| 345 | RK805_ID_DCDC1, | 462 | RK805_ID_DCDC1, |
| @@ -1332,6 +1449,7 @@ enum { · 986 unmodified lines | |||
| 1332 | }; | 1449 | }; |
| 1333 | 1450 | ||
| 1334 | enum { | 1451 | enum { |
| 1452 | RK801_ID = 0x8010, | ||
| 1335 | RK805_ID = 0x8050, | 1453 | RK805_ID = 0x8050, |
| 1336 | RK806_ID = 0x8060, | 1454 | RK806_ID = 0x8060, |
| 1337 | RK808_ID = 0x0000, | 1455 | RK808_ID = 0x0000, |
| @@ -249,6 +249,8 @@ enum { · 248 unmodified lines | |||
| 249 | #define BD71828_REG_BATCAP_MON_LIMIT_U 0xcc | 249 | #define BD71828_REG_BATCAP_MON_LIMIT_U 0xcc |
| 250 | #define BD71828_REG_CONF 0x64 | 250 | #define BD71828_REG_CONF 0x64 |
| 251 | 251 | ||
| 252 | #define BD71828_REG_ILIM_STAT 0x6d | ||
| 253 | #define BD71828_REG_DCIN_SET 0x70 | ||
| 252 | #define BD71828_REG_DCIN_CLPS 0x71 | 254 | #define BD71828_REG_DCIN_CLPS 0x71 |
| 253 | 255 | ||
| 254 | #define BD71828_REG_MEAS_CLEAR 0xaf | 256 | #define BD71828_REG_MEAS_CLEAR 0xaf |
| @@ -53,7 +53,7 @@ · 52 unmodified lines | |||
| 53 | /** | 53 | /** |
| 54 | * enum tps6105x_mode - desired mode for the TPS6105x | 54 | * enum tps6105x_mode - desired mode for the TPS6105x |
| 55 | * @TPS6105X_MODE_SHUTDOWN: this instance is inactive, not used for anything | 55 | * @TPS6105X_MODE_SHUTDOWN: this instance is inactive, not used for anything |
| 56 | * @TPS61905X_MODE_TORCH: this instance is used as a LED, usually a while | 56 | * @TPS6105X_MODE_TORCH: this instance is used as a LED, usually a while |
| 57 | * LED, for example as backlight or flashlight. If this is set, the | 57 | * LED, for example as backlight or flashlight. If this is set, the |
| 58 | * TPS6105X will register to the LED framework | 58 | * TPS6105X will register to the LED framework |
| 59 | * @TPS6105X_MODE_TORCH_FLASH: this instance is used as a flashgun, usually | 59 | * @TPS6105X_MODE_TORCH_FLASH: this instance is used as a flashgun, usually |
| @@ -82,7 +82,8 @@ struct tps6105x_platform_data { · 22 unmodified lines | |||
| 82 | 82 | ||
| 83 | /** | 83 | /** |
| 84 | * struct tps6105x - state holder for the TPS6105x drivers | 84 | * struct tps6105x - state holder for the TPS6105x drivers |
| 85 | * @i2c_client: corresponding I2C client | 85 | * @pdata: associated platform data |
| 86 | * @client: corresponding I2C client | ||
| 86 | * @regulator: regulator device if used in voltage mode | 87 | * @regulator: regulator device if used in voltage mode |
| 87 | * @regmap: used for i2c communcation on accessing registers | 88 | * @regmap: used for i2c communcation on accessing registers |
| 88 | */ | 89 | */ |
| @@ -149,6 +149,8 @@ enum pmic_id { · 148 unmodified lines | |||
| 149 | #define TPS65215_ENABLE_LDO2_EN_MASK BIT(5) | 149 | #define TPS65215_ENABLE_LDO2_EN_MASK BIT(5) |
| 150 | #define TPS65214_ENABLE_LDO1_EN_MASK BIT(5) | 150 | #define TPS65214_ENABLE_LDO1_EN_MASK BIT(5) |
| 151 | #define TPS65219_ENABLE_LDO4_EN_MASK BIT(6) | 151 | #define TPS65219_ENABLE_LDO4_EN_MASK BIT(6) |
| 152 | /* Register Unlock */ | ||
| 153 | #define TPS65214_LOCK_ACCESS_CMD 0x5a | ||
| 152 | /* power ON-OFF sequence slot */ | 154 | /* power ON-OFF sequence slot */ |
| 153 | #define TPS65219_BUCKS_LDOS_SEQUENCE_OFF_SLOT_MASK GENMASK(3, 0) | 155 | #define TPS65219_BUCKS_LDOS_SEQUENCE_OFF_SLOT_MASK GENMASK(3, 0) |
| 154 | #define TPS65219_BUCKS_LDOS_SEQUENCE_ON_SLOT_MASK GENMASK(7, 4) | 156 | #define TPS65219_BUCKS_LDOS_SEQUENCE_ON_SLOT_MASK GENMASK(7, 4) |