Now that SPI flash controllers without a software sequencer are supported, it's trivial to add support for CNL and its PCI ID. Values from https://www.intel.com/content/dam/www/public/us/en/documents/datasheets/300-series-chipset-pch-datasheet-vol-2.pdf
Unified · Split
| @@ -20,6 +20,10 @@ static const struct intel_spi_boardinfo bxt_info = { · 19 unmodified lines | |||
| 20 | .type = INTEL_SPI_BXT, | 20 | .type = INTEL_SPI_BXT, |
| 21 | }; | 21 | }; |
| 22 | 22 | ||
| 23 | static const struct intel_spi_boardinfo cnl_info = { | ||
| 24 | .type = INTEL_SPI_CNL, | ||
| 25 | }; | ||
| 26 | |||
| 23 | static int intel_spi_pci_probe(struct pci_dev *pdev, | 27 | static int intel_spi_pci_probe(struct pci_dev *pdev, |
| 24 | const struct pci_device_id *id) | 28 | const struct pci_device_id *id) |
| 25 | { | 29 | { |
| @@ -68,6 +72,7 @@ static const struct pci_device_id intel_spi_pci_ids[] = { · 42 unmodified lines | |||
| 68 | { PCI_VDEVICE(INTEL, 0xa0a4), (unsigned long)&bxt_info }, | 72 | { PCI_VDEVICE(INTEL, 0xa0a4), (unsigned long)&bxt_info }, |
| 69 | { PCI_VDEVICE(INTEL, 0xa1a4), (unsigned long)&bxt_info }, | 73 | { PCI_VDEVICE(INTEL, 0xa1a4), (unsigned long)&bxt_info }, |
| 70 | { PCI_VDEVICE(INTEL, 0xa224), (unsigned long)&bxt_info }, | 74 | { PCI_VDEVICE(INTEL, 0xa224), (unsigned long)&bxt_info }, |
| 75 | { PCI_VDEVICE(INTEL, 0xa324), (unsigned long)&cnl_info }, | ||
| 71 | { }, | 76 | { }, |
| 72 | }; | 77 | }; |
| 73 | MODULE_DEVICE_TABLE(pci, intel_spi_pci_ids); | 78 | MODULE_DEVICE_TABLE(pci, intel_spi_pci_ids); |
| @@ -108,6 +108,10 @@ · 107 unmodified lines | |||
| 108 | #define BXT_FREG_NUM 12 | 108 | #define BXT_FREG_NUM 12 |
| 109 | #define BXT_PR_NUM 6 | 109 | #define BXT_PR_NUM 6 |
| 110 | 110 | ||
| 111 | #define CNL_PR 0x84 | ||
| 112 | #define CNL_FREG_NUM 6 | ||
| 113 | #define CNL_PR_NUM 5 | ||
| 114 | |||
| 111 | #define LVSCC 0xc4 | 115 | #define LVSCC 0xc4 |
| 112 | #define UVSCC 0xc8 | 116 | #define UVSCC 0xc8 |
| 113 | #define ERASE_OPCODE_SHIFT 8 | 117 | #define ERASE_OPCODE_SHIFT 8 |
| @@ -344,6 +348,13 @@ static int intel_spi_init(struct intel_spi *ispi) · 230 unmodified lines | |||
| 344 | ispi->erase_64k = true; | 348 | ispi->erase_64k = true; |
| 345 | break; | 349 | break; |
| 346 | 350 | ||
| 351 | case INTEL_SPI_CNL: | ||
| 352 | ispi->sregs = NULL; | ||
| 353 | ispi->pregs = ispi->base + CNL_PR; | ||
| 354 | ispi->nregions = CNL_FREG_NUM; | ||
| 355 | ispi->pr_num = CNL_PR_NUM; | ||
| 356 | break; | ||
| 357 | |||
| 347 | default: | 358 | default: |
| 348 | return -EINVAL; | 359 | return -EINVAL; |
| 349 | } | 360 | } |
| @@ -13,6 +13,7 @@ enum intel_spi_type { · 12 unmodified lines | |||
| 13 | INTEL_SPI_BYT = 1, | 13 | INTEL_SPI_BYT = 1, |
| 14 | INTEL_SPI_LPT, | 14 | INTEL_SPI_LPT, |
| 15 | INTEL_SPI_BXT, | 15 | INTEL_SPI_BXT, |
| 16 | INTEL_SPI_CNL, | ||
| 16 | }; | 17 | }; |
| 17 | 18 | ||
| 18 | /** | 19 | /** |