Linux 4.2-rc7 Backmerge master for i915 fixes
Unified · Split
| @@ -17,6 +17,7 @@ Aleksey Gorelov <aleksey_gorelov@phoenix.com> · 16 unmodified lines | ||
| 17 | 17 | Al Viro <viro@ftp.linux.org.uk> |
| 18 | 18 | Al Viro <viro@zenIV.linux.org.uk> |
| 19 | 19 | Andreas Herrmann <aherrman@de.ibm.com> |
| 20 | +Andrey Ryabinin <ryabinin.a.a@gmail.com> <a.ryabinin@samsung.com> | |
| 20 | 21 | Andrew Morton <akpm@linux-foundation.org> |
| 21 | 22 | Andrew Vasquez <andrew.vasquez@qlogic.com> |
| 22 | 23 | Andy Adamson <andros@citi.umich.edu> |
| @@ -199,6 +199,7 @@ nodes to be present and contain the properties described below. · 198 unmodified lines | ||
| 199 | 199 | "qcom,kpss-acc-v1" |
| 200 | 200 | "qcom,kpss-acc-v2" |
| 201 | 201 | "rockchip,rk3066-smp" |
| 202 | + "ste,dbx500-smp" | |
| 202 | 203 | |
| 203 | 204 | - cpu-release-addr |
| 204 | 205 | Usage: required for systems that have an "enable-method" |
| @@ -35,7 +35,7 @@ Example: · 34 unmodified lines | ||
| 35 | 35 | device_type = "dma"; |
| 36 | 36 | reg = <0x0 0x1f270000 0x0 0x10000>, |
| 37 | 37 | <0x0 0x1f200000 0x0 0x10000>, |
| 38 | − <0x0 0x1b008000 0x0 0x2000>, | |
| 38 | + <0x0 0x1b000000 0x0 0x400000>, | |
| 39 | 39 | <0x0 0x1054a000 0x0 0x100>; |
| 40 | 40 | interrupts = <0x0 0x82 0x4>, |
| 41 | 41 | <0x0 0xb8 0x4>, |
| @@ -35,3 +35,6 @@ the PCIe specification. · 34 unmodified lines | ||
| 35 | 35 | |
| 36 | 36 | NOTE: this only applies to the SMMU itself, not |
| 37 | 37 | masters connected upstream of the SMMU. |
| 38 | + | |
| 39 | +- hisilicon,broken-prefetch-cmd | |
| 40 | + : Avoid sending CMD_PREFETCH_* commands to the SMMU. | |
| @@ -17,7 +17,6 @@ Required properties: · 16 unmodified lines | ||
| 17 | 17 | "fsl,imx6sx-usdhc" |
| 18 | 18 | |
| 19 | 19 | Optional properties: |
| 20 | −- fsl,cd-controller : Indicate to use controller internal card detection | |
| 21 | 20 | - fsl,wp-controller : Indicate to use controller internal write protection |
| 22 | 21 | - fsl,delay-line : Specify the number of delay cells for override mode. |
| 23 | 22 | This is used to set the clock delay for DLL(Delay Line) on override mode |
| @@ -35,7 +34,6 @@ esdhc@70004000 { · 11 unmodified lines | ||
| 35 | 34 | compatible = "fsl,imx51-esdhc"; |
| 36 | 35 | reg = <0x70004000 0x4000>; |
| 37 | 36 | interrupts = <1>; |
| 38 | − fsl,cd-controller; | |
| 39 | 37 | fsl,wp-controller; |
| 40 | 38 | }; |
| 41 | 39 | |
| @@ -82,6 +82,9 @@ Optional properties: · 81 unmodified lines | ||
| 82 | 82 | - id: If there are multiple instance of the same type, in order to |
| 83 | 83 | differentiate between each instance "id" can be used (e.g., multi-lane PCIe |
| 84 | 84 | PHY). If "id" is not provided, it is set to default value of '1'. |
| 85 | + - syscon-pllreset: Handle to system control region that contains the | |
| 86 | + CTRL_CORE_SMA_SW_0 register and register offset to the CTRL_CORE_SMA_SW_0 | |
| 87 | + register that contains the SATA_PLL_SOFT_RESET bit. Only valid for sata_phy. | |
| 85 | 88 | |
| 86 | 89 | This is usually a subnode of ocp2scp to which it is connected. |
| 87 | 90 | |
| @@ -100,3 +103,16 @@ usb3phy@4a084400 { · 12 unmodified lines | ||
| 100 | 103 | "sysclk", |
| 101 | 104 | "refclk"; |
| 102 | 105 | }; |
| 106 | + | |
| 107 | +sata_phy: phy@4A096000 { | |
| 108 | + compatible = "ti,phy-pipe3-sata"; | |
| 109 | + reg = <0x4A096000 0x80>, /* phy_rx */ | |
| 110 | + <0x4A096400 0x64>, /* phy_tx */ | |
| 111 | + <0x4A096800 0x40>; /* pll_ctrl */ | |
| 112 | + reg-names = "phy_rx", "phy_tx", "pll_ctrl"; | |
| 113 | + ctrl-module = <&omap_control_sata>; | |
| 114 | + clocks = <&sys_clkin1>, <&sata_ref_clk>; | |
| 115 | + clock-names = "sysclk", "refclk"; | |
| 116 | + syscon-pllreset = <&scm_conf 0x3fc>; | |
| 117 | + #phy-cells = <0>; | |
| 118 | +}; | |
| @@ -3,11 +3,13 @@ MT8173 with MAX98090 CODEC · 2 unmodified lines | ||
| 3 | 3 | Required properties: |
| 4 | 4 | - compatible : "mediatek,mt8173-max98090" |
| 5 | 5 | - mediatek,audio-codec: the phandle of the MAX98090 audio codec |
| 6 | +- mediatek,platform: the phandle of MT8173 ASoC platform | |
| 6 | 7 | |
| 7 | 8 | Example: |
| 8 | 9 | |
| 9 | 10 | sound { |
| 10 | 11 | compatible = "mediatek,mt8173-max98090"; |
| 11 | 12 | mediatek,audio-codec = <&max98090>; |
| 13 | + mediatek,platform = <&afe>; | |
| 12 | 14 | }; |
| 13 | 15 | |
| @@ -3,11 +3,13 @@ MT8173 with RT5650 RT5676 CODECS · 2 unmodified lines | ||
| 3 | 3 | Required properties: |
| 4 | 4 | - compatible : "mediatek,mt8173-rt5650-rt5676" |
| 5 | 5 | - mediatek,audio-codec: the phandles of rt5650 and rt5676 codecs |
| 6 | +- mediatek,platform: the phandle of MT8173 ASoC platform | |
| 6 | 7 | |
| 7 | 8 | Example: |
| 8 | 9 | |
| 9 | 10 | sound { |
| 10 | 11 | compatible = "mediatek,mt8173-rt5650-rt5676"; |
| 11 | 12 | mediatek,audio-codec = <&rt5650 &rt5676>; |
| 13 | + mediatek,platform = <&afe>; | |
| 12 | 14 | }; |
| 13 | 15 | |
| @@ -3,7 +3,7 @@ Binding for Qualcomm Atheros AR7xxx/AR9xxx SPI controller · 2 unmodified lines | ||
| 3 | 3 | Required properties: |
| 4 | 4 | - compatible: has to be "qca,<soc-type>-spi", "qca,ar7100-spi" as fallback. |
| 5 | 5 | - reg: Base address and size of the controllers memory area |
| 6 | −- clocks: phandle to the AHB clock. | |
| 6 | +- clocks: phandle of the AHB clock. | |
| 7 | 7 | - clock-names: has to be "ahb". |
| 8 | 8 | - #address-cells: <1>, as required by generic SPI binding. |
| 9 | 9 | - #size-cells: <0>, also as required by generic SPI binding. |
| @@ -12,9 +12,9 @@ Child nodes as per the generic SPI binding. · 2 unmodified lines | ||
| 12 | 12 | |
| 13 | 13 | Example: |
| 14 | 14 | |
| 15 | − spi@1F000000 { | |
| 15 | + spi@1f000000 { | |
| 16 | 16 | compatible = "qca,ar9132-spi", "qca,ar7100-spi"; |
| 17 | − reg = <0x1F000000 0x10>; | |
| 17 | + reg = <0x1f000000 0x10>; | |
| 18 | 18 | |
| 19 | 19 | clocks = <&pll 2>; |
| 20 | 20 | clock-names = "ahb"; |
| @@ -35,11 +35,11 @@ temp1_input Local temperature (1/1000 degree, · 34 unmodified lines | ||
| 35 | 35 | temp[2-9]_input CPU temperatures (1/1000 degree, |
| 36 | 36 | 0.125 degree resolution) |
| 37 | 37 | |
| 38 | −fan[1-4]_mode R/W, 0/1 for manual or SmartFan mode | |
| 38 | +pwm[1-4]_enable R/W, 1/2 for manual or SmartFan mode | |
| 39 | 39 | Setting SmartFan mode is supported only if it has been |
| 40 | 40 | previously configured by BIOS (or configuration EEPROM) |
| 41 | 41 | |
| 42 | −fan[1-4]_pwm R/O in SmartFan mode, R/W in manual control mode | |
| 42 | +pwm[1-4] R/O in SmartFan mode, R/W in manual control mode | |
| 43 | 43 | |
| 44 | 44 | The driver checks sensor control registers and does not export the sensors |
| 45 | 45 | that are not enabled. Anyway, a sensor that is enabled may actually be not |
| @@ -119,8 +119,10 @@ ALPS Absolute Mode - Protocol Version 2 · 118 unmodified lines | ||
| 119 | 119 | byte 5: 0 z6 z5 z4 z3 z2 z1 z0 |
| 120 | 120 | |
| 121 | 121 | Protocol Version 2 DualPoint devices send standard PS/2 mouse packets for |
| 122 | −the DualPoint Stick. For non interleaved dualpoint devices the pointingstick | |
| 123 | −buttons get reported separately in the PSM, PSR and PSL bits. | |
| 122 | +the DualPoint Stick. The M, R and L bits signal the combined status of both | |
| 123 | +the pointingstick and touchpad buttons, except for Dell dualpoint devices | |
| 124 | +where the pointingstick buttons get reported separately in the PSM, PSR | |
| 125 | +and PSL bits. | |
| 124 | 126 | |
| 125 | 127 | Dualpoint device -- interleaved packet format |
| 126 | 128 | --------------------------------------------- |
| @@ -199,7 +199,8 @@ def tcm_mod_build_configfs(proto_ident, fabric_mod_dir_var, fabric_mod_name): · 198 unmodified lines | ||
| 199 | 199 | buf += "#include <linux/string.h>\n" |
| 200 | 200 | buf += "#include <linux/configfs.h>\n" |
| 201 | 201 | buf += "#include <linux/ctype.h>\n" |
| 202 | − buf += "#include <asm/unaligned.h>\n\n" | |
| 202 | + buf += "#include <asm/unaligned.h>\n" | |
| 203 | + buf += "#include <scsi/scsi_proto.h>\n\n" | |
| 203 | 204 | buf += "#include <target/target_core_base.h>\n" |
| 204 | 205 | buf += "#include <target/target_core_fabric.h>\n" |
| 205 | 206 | buf += "#include <target/target_core_fabric_configfs.h>\n" |
| @@ -230,8 +231,14 @@ def tcm_mod_build_configfs(proto_ident, fabric_mod_dir_var, fabric_mod_name): · 24 unmodified lines | ||
| 230 | 231 | buf += " }\n" |
| 231 | 232 | buf += " tpg->" + fabric_mod_port + " = " + fabric_mod_port + ";\n" |
| 232 | 233 | buf += " tpg->" + fabric_mod_port + "_tpgt = tpgt;\n\n" |
| 233 | − buf += " ret = core_tpg_register(&" + fabric_mod_name + "_ops, wwn,\n" | |
| 234 | − buf += " &tpg->se_tpg, SCSI_PROTOCOL_SAS);\n" | |
| 234 | + | |
| 235 | + if proto_ident == "FC": | |
| 236 | + buf += " ret = core_tpg_register(wwn, &tpg->se_tpg, SCSI_PROTOCOL_FCP);\n" | |
| 237 | + elif proto_ident == "SAS": | |
| 238 | + buf += " ret = core_tpg_register(wwn, &tpg->se_tpg, SCSI_PROTOCOL_SAS);\n" | |
| 239 | + elif proto_ident == "iSCSI": | |
| 240 | + buf += " ret = core_tpg_register(wwn, &tpg->se_tpg, SCSI_PROTOCOL_ISCSI);\n" | |
| 241 | + | |
| 235 | 242 | buf += " if (ret < 0) {\n" |
| 236 | 243 | buf += " kfree(tpg);\n" |
| 237 | 244 | buf += " return NULL;\n" |
| @@ -292,7 +299,7 @@ def tcm_mod_build_configfs(proto_ident, fabric_mod_dir_var, fabric_mod_name): · 54 unmodified lines | ||
| 292 | 299 | |
| 293 | 300 | buf += "static const struct target_core_fabric_ops " + fabric_mod_name + "_ops = {\n" |
| 294 | 301 | buf += " .module = THIS_MODULE,\n" |
| 295 | − buf += " .name = " + fabric_mod_name + ",\n" | |
| 302 | + buf += " .name = \"" + fabric_mod_name + "\",\n" | |
| 296 | 303 | buf += " .get_fabric_name = " + fabric_mod_name + "_get_fabric_name,\n" |
| 297 | 304 | buf += " .tpg_get_wwn = " + fabric_mod_name + "_get_fabric_wwn,\n" |
| 298 | 305 | buf += " .tpg_get_tag = " + fabric_mod_name + "_get_tag,\n" |
| @@ -322,17 +329,17 @@ def tcm_mod_build_configfs(proto_ident, fabric_mod_dir_var, fabric_mod_name): · 23 unmodified lines | ||
| 322 | 329 | buf += " .fabric_make_tpg = " + fabric_mod_name + "_make_tpg,\n" |
| 323 | 330 | buf += " .fabric_drop_tpg = " + fabric_mod_name + "_drop_tpg,\n" |
| 324 | 331 | buf += "\n" |
| 325 | − buf += " .tfc_wwn_attrs = " + fabric_mod_name + "_wwn_attrs;\n" | |
| 332 | + buf += " .tfc_wwn_attrs = " + fabric_mod_name + "_wwn_attrs,\n" | |
| 326 | 333 | buf += "};\n\n" |
| 327 | 334 | |
| 328 | 335 | buf += "static int __init " + fabric_mod_name + "_init(void)\n" |
| 329 | 336 | buf += "{\n" |
| 330 | − buf += " return target_register_template(" + fabric_mod_name + "_ops);\n" | |
| 337 | + buf += " return target_register_template(&" + fabric_mod_name + "_ops);\n" | |
| 331 | 338 | buf += "};\n\n" |
| 332 | 339 | |
| 333 | 340 | buf += "static void __exit " + fabric_mod_name + "_exit(void)\n" |
| 334 | 341 | buf += "{\n" |
| 335 | − buf += " target_unregister_template(" + fabric_mod_name + "_ops);\n" | |
| 342 | + buf += " target_unregister_template(&" + fabric_mod_name + "_ops);\n" | |
| 336 | 343 | buf += "};\n\n" |
| 337 | 344 | |
| 338 | 345 | buf += "MODULE_DESCRIPTION(\"" + fabric_mod_name.upper() + " series fabric driver\");\n" |
| @@ -3592,6 +3592,15 @@ S: Maintained · 3591 unmodified lines | ||
| 3592 | 3592 | F: drivers/gpu/drm/rockchip/ |
| 3593 | 3593 | F: Documentation/devicetree/bindings/video/rockchip* |
| 3594 | 3594 | |
| 3595 | +DRM DRIVERS FOR STI | |
| 3596 | +M: Benjamin Gaignard <benjamin.gaignard@linaro.org> | |
| 3597 | +M: Vincent Abriou <vincent.abriou@st.com> | |
| 3598 | +L: dri-devel@lists.freedesktop.org | |
| 3599 | +T: git http://git.linaro.org/people/benjamin.gaignard/kernel.git | |
| 3600 | +S: Maintained | |
| 3601 | +F: drivers/gpu/drm/sti | |
| 3602 | +F: Documentation/devicetree/bindings/gpu/st,stih4xx.txt | |
| 3603 | + | |
| 3595 | 3604 | DSBR100 USB FM RADIO DRIVER |
| 3596 | 3605 | M: Alexey Klimov <klimov.linux@gmail.com> |
| 3597 | 3606 | L: linux-media@vger.kernel.org |
| @@ -5605,6 +5614,7 @@ F: kernel/irq/ · 2007 unmodified lines | ||
| 5605 | 5614 | IRQCHIP DRIVERS |
| 5606 | 5615 | M: Thomas Gleixner <tglx@linutronix.de> |
| 5607 | 5616 | M: Jason Cooper <jason@lakedaemon.net> |
| 5617 | +M: Marc Zyngier <marc.zyngier@arm.com> | |
| 5608 | 5618 | L: linux-kernel@vger.kernel.org |
| 5609 | 5619 | S: Maintained |
| 5610 | 5620 | T: git git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git irq/core |
| @@ -5613,11 +5623,14 @@ F: Documentation/devicetree/bindings/interrupt-controller/ · 2 unmodified lines | ||
| 5613 | 5623 | F: drivers/irqchip/ |
| 5614 | 5624 | |
| 5615 | 5625 | IRQ DOMAINS (IRQ NUMBER MAPPING LIBRARY) |
| 5616 | −M: Benjamin Herrenschmidt <benh@kernel.crashing.org> | |
| 5626 | +M: Jiang Liu <jiang.liu@linux.intel.com> | |
| 5627 | +M: Marc Zyngier <marc.zyngier@arm.com> | |
| 5617 | 5628 | S: Maintained |
| 5629 | +T: git git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git irq/core | |
| 5618 | 5630 | F: Documentation/IRQ-domain.txt |
| 5619 | 5631 | F: include/linux/irqdomain.h |
| 5620 | 5632 | F: kernel/irq/irqdomain.c |
| 5633 | +F: kernel/irq/msi.c | |
| 5621 | 5634 | |
| 5622 | 5635 | ISAPNP |
| 5623 | 5636 | M: Jaroslav Kysela <perex@perex.cz> |
| @@ -5904,7 +5917,6 @@ S: Supported · 280 unmodified lines | ||
| 5904 | 5917 | F: Documentation/s390/kvm.txt |
| 5905 | 5918 | F: arch/s390/include/asm/kvm* |
| 5906 | 5919 | F: arch/s390/kvm/ |
| 5907 | −F: drivers/s390/kvm/ | |
| 5908 | 5920 | |
| 5909 | 5921 | KERNEL VIRTUAL MACHINE (KVM) FOR ARM |
| 5910 | 5922 | M: Christoffer Dall <christoffer.dall@linaro.org> |
| @@ -6844,6 +6856,12 @@ T: git git://linuxtv.org/anttip/media_tree.git · 933 unmodified lines | ||
| 6844 | 6856 | S: Maintained |
| 6845 | 6857 | F: drivers/media/usb/msi2500/ |
| 6846 | 6858 | |
| 6859 | +MSYSTEMS DISKONCHIP G3 MTD DRIVER | |
| 6860 | +M: Robert Jarzmik <robert.jarzmik@free.fr> | |
| 6861 | +L: linux-mtd@lists.infradead.org | |
| 6862 | +S: Maintained | |
| 6863 | +F: drivers/mtd/devices/docg3* | |
| 6864 | + | |
| 6847 | 6865 | MT9M032 APTINA SENSOR DRIVER |
| 6848 | 6866 | M: Laurent Pinchart <laurent.pinchart@ideasonboard.com> |
| 6849 | 6867 | L: linux-media@vger.kernel.org |
| @@ -10901,6 +10919,15 @@ F: drivers/block/virtio_blk.c · 4051 unmodified lines | ||
| 10901 | 10919 | F: include/linux/virtio_*.h |
| 10902 | 10920 | F: include/uapi/linux/virtio_*.h |
| 10903 | 10921 | |
| 10922 | +VIRTIO DRIVERS FOR S390 | |
| 10923 | +M: Christian Borntraeger <borntraeger@de.ibm.com> | |
| 10924 | +M: Cornelia Huck <cornelia.huck@de.ibm.com> | |
| 10925 | +L: linux-s390@vger.kernel.org | |
| 10926 | +L: virtualization@lists.linux-foundation.org | |
| 10927 | +L: kvm@vger.kernel.org | |
| 10928 | +S: Supported | |
| 10929 | +F: drivers/s390/virtio/ | |
| 10930 | + | |
| 10904 | 10931 | VIRTIO GPU DRIVER |
| 10905 | 10932 | M: David Airlie <airlied@linux.ie> |
| 10906 | 10933 | M: Gerd Hoffmann <kraxel@redhat.com> |
| @@ -1,7 +1,7 @@ | ||
| 1 | 1 | VERSION = 4 |
| 2 | 2 | PATCHLEVEL = 2 |
| 3 | 3 | SUBLEVEL = 0 |
| 4 | −EXTRAVERSION = -rc3 | |
| 4 | +EXTRAVERSION = -rc7 | |
| 5 | 5 | NAME = Hurr durr I'ma sheep |
| 6 | 6 | |
| 7 | 7 | # *DOCUMENTATION* |
| @@ -597,6 +597,11 @@ endif # $(dot-config) · 589 unmodified lines | ||
| 597 | 597 | # Defaults to vmlinux, but the arch makefile usually adds further targets |
| 598 | 598 | all: vmlinux |
| 599 | 599 | |
| 600 | +# The arch Makefile can set ARCH_{CPP,A,C}FLAGS to override the default | |
| 601 | +# values of the respective KBUILD_* variables | |
| 602 | +ARCH_CPPFLAGS := | |
| 603 | +ARCH_AFLAGS := | |
| 604 | +ARCH_CFLAGS := | |
| 600 | 605 | include arch/$(SRCARCH)/Makefile |
| 601 | 606 | |
| 602 | 607 | KBUILD_CFLAGS += $(call cc-option,-fno-delete-null-pointer-checks,) |
| @@ -848,10 +853,10 @@ export mod_strip_cmd · 245 unmodified lines | ||
| 848 | 853 | mod_compress_cmd = true |
| 849 | 854 | ifdef CONFIG_MODULE_COMPRESS |
| 850 | 855 | ifdef CONFIG_MODULE_COMPRESS_GZIP |
| 851 | − mod_compress_cmd = gzip -n | |
| 856 | + mod_compress_cmd = gzip -n -f | |
| 852 | 857 | endif # CONFIG_MODULE_COMPRESS_GZIP |
| 853 | 858 | ifdef CONFIG_MODULE_COMPRESS_XZ |
| 854 | − mod_compress_cmd = xz | |
| 859 | + mod_compress_cmd = xz -f | |
| 855 | 860 | endif # CONFIG_MODULE_COMPRESS_XZ |
| 856 | 861 | endif # CONFIG_MODULE_COMPRESS |
| 857 | 862 | export mod_compress_cmd |
| @@ -313,11 +313,11 @@ config ARC_PAGE_SIZE_8K · 312 unmodified lines | ||
| 313 | 313 | |
| 314 | 314 | config ARC_PAGE_SIZE_16K |
| 315 | 315 | bool "16KB" |
| 316 | − depends on ARC_MMU_V3 | |
| 316 | + depends on ARC_MMU_V3 || ARC_MMU_V4 | |
| 317 | 317 | |
| 318 | 318 | config ARC_PAGE_SIZE_4K |
| 319 | 319 | bool "4KB" |
| 320 | − depends on ARC_MMU_V3 | |
| 320 | + depends on ARC_MMU_V3 || ARC_MMU_V4 | |
| 321 | 321 | |
| 322 | 322 | endchoice |
| 323 | 323 | |
| @@ -365,6 +365,11 @@ config ARC_HAS_LLSC · 41 unmodified lines | ||
| 365 | 365 | default y |
| 366 | 366 | depends on !ARC_CANT_LLSC |
| 367 | 367 | |
| 368 | +config ARC_STAR_9000923308 | |
| 369 | + bool "Workaround for llock/scond livelock" | |
| 370 | + default y | |
| 371 | + depends on ISA_ARCV2 && SMP && ARC_HAS_LLSC | |
| 372 | + | |
| 368 | 373 | config ARC_HAS_SWAPE |
| 369 | 374 | bool "Insn: SWAPE (endian-swap)" |
| 370 | 375 | default y |
| @@ -379,6 +384,10 @@ config ARC_HAS_LL64 · 8 unmodified lines | ||
| 379 | 384 | dest operands with 2 possible source operands. |
| 380 | 385 | default y |
| 381 | 386 | |
| 387 | +config ARC_HAS_DIV_REM | |
| 388 | + bool "Insn: div, divu, rem, remu" | |
| 389 | + default y | |
| 390 | + | |
| 382 | 391 | config ARC_HAS_RTC |
| 383 | 392 | bool "Local 64-bit r/o cycle counter" |
| 384 | 393 | default n |
| @@ -36,8 +36,16 @@ cflags-$(atleast_gcc44) += -fsection-anchors · 35 unmodified lines | ||
| 36 | 36 | cflags-$(CONFIG_ARC_HAS_LLSC) += -mlock |
| 37 | 37 | cflags-$(CONFIG_ARC_HAS_SWAPE) += -mswape |
| 38 | 38 | |
| 39 | +ifdef CONFIG_ISA_ARCV2 | |
| 40 | + | |
| 39 | 41 | ifndef CONFIG_ARC_HAS_LL64 |
| 40 | −cflags-$(CONFIG_ISA_ARCV2) += -mno-ll64 | |
| 42 | +cflags-y += -mno-ll64 | |
| 43 | +endif | |
| 44 | + | |
| 45 | +ifndef CONFIG_ARC_HAS_DIV_REM | |
| 46 | +cflags-y += -mno-div-rem | |
| 47 | +endif | |
| 48 | + | |
| 41 | 49 | endif |
| 42 | 50 | |
| 43 | 51 | cflags-$(CONFIG_ARC_DW2_UNWIND) += -fasynchronous-unwind-tables |
| @@ -89,11 +89,10 @@ · 88 unmodified lines | ||
| 89 | 89 | #define ECR_C_BIT_DTLB_LD_MISS 8 |
| 90 | 90 | #define ECR_C_BIT_DTLB_ST_MISS 9 |
| 91 | 91 | |
| 92 | − | |
| 93 | 92 | /* Auxiliary registers */ |
| 94 | 93 | #define AUX_IDENTITY 4 |
| 95 | 94 | #define AUX_INTR_VEC_BASE 0x25 |
| 96 | − | |
| 95 | +#define AUX_NON_VOL 0x5e | |
| 97 | 96 | |
| 98 | 97 | /* |
| 99 | 98 | * Floating Pt Registers |
| @@ -240,9 +239,9 @@ struct bcr_extn_xymem { · 140 unmodified lines | ||
| 240 | 239 | |
| 241 | 240 | struct bcr_perip { |
| 242 | 241 | #ifdef CONFIG_CPU_BIG_ENDIAN |
| 243 | − unsigned int start:8, pad2:8, sz:8, pad:8; | |
| 242 | + unsigned int start:8, pad2:8, sz:8, ver:8; | |
| 244 | 243 | #else |
| 245 | − unsigned int pad:8, sz:8, pad2:8, start:8; | |
| 244 | + unsigned int ver:8, sz:8, pad2:8, start:8; | |
| 246 | 245 | #endif |
| 247 | 246 | }; |
| 248 | 247 | |
| @@ -23,33 +23,60 @@ · 22 unmodified lines | ||
| 23 | 23 | |
| 24 | 24 | #define atomic_set(v, i) (((v)->counter) = (i)) |
| 25 | 25 | |
| 26 | −#ifdef CONFIG_ISA_ARCV2 | |
| 27 | −#define PREFETCHW " prefetchw [%1] \n" | |
| 28 | −#else | |
| 29 | −#define PREFETCHW | |
| 26 | +#ifdef CONFIG_ARC_STAR_9000923308 | |
| 27 | + | |
| 28 | +#define SCOND_FAIL_RETRY_VAR_DEF \ | |
| 29 | + unsigned int delay = 1, tmp; \ | |
| 30 | + | |
| 31 | +#define SCOND_FAIL_RETRY_ASM \ | |
| 32 | + " bz 4f \n" \ | |
| 33 | + " ; --- scond fail delay --- \n" \ | |
| 34 | + " mov %[tmp], %[delay] \n" /* tmp = delay */ \ | |
| 35 | + "2: brne.d %[tmp], 0, 2b \n" /* while (tmp != 0) */ \ | |
| 36 | + " sub %[tmp], %[tmp], 1 \n" /* tmp-- */ \ | |
| 37 | + " rol %[delay], %[delay] \n" /* delay *= 2 */ \ | |
| 38 | + " b 1b \n" /* start over */ \ | |
| 39 | + "4: ; --- success --- \n" \ | |
| 40 | + | |
| 41 | +#define SCOND_FAIL_RETRY_VARS \ | |
| 42 | + ,[delay] "+&r" (delay),[tmp] "=&r" (tmp) \ | |
| 43 | + | |
| 44 | +#else /* !CONFIG_ARC_STAR_9000923308 */ | |
| 45 | + | |
| 46 | +#define SCOND_FAIL_RETRY_VAR_DEF | |
| 47 | + | |
| 48 | +#define SCOND_FAIL_RETRY_ASM \ | |
| 49 | + " bnz 1b \n" \ | |
| 50 | + | |
| 51 | +#define SCOND_FAIL_RETRY_VARS | |
| 52 | + | |
| 30 | 53 | #endif |
| 31 | 54 | |
| 32 | 55 | #define ATOMIC_OP(op, c_op, asm_op) \ |
| 33 | 56 | static inline void atomic_##op(int i, atomic_t *v) \ |
| 34 | 57 | { \ |
| 35 | − unsigned int temp; \ | |
| 58 | + unsigned int val; \ | |
| 59 | + SCOND_FAIL_RETRY_VAR_DEF \ | |
| 36 | 60 | \ |
| 37 | 61 | __asm__ __volatile__( \ |
| 38 | − "1: \n" \ | |
| 39 | − PREFETCHW \ | |
| 40 | − " llock %0, [%1] \n" \ | |
| 41 | − " " #asm_op " %0, %0, %2 \n" \ | |
| 42 | − " scond %0, [%1] \n" \ | |
| 43 | − " bnz 1b \n" \ | |
| 44 | − : "=&r"(temp) /* Early clobber, to prevent reg reuse */ \ | |
| 45 | − : "r"(&v->counter), "ir"(i) \ | |
| 62 | + "1: llock %[val], [%[ctr]] \n" \ | |
| 63 | + " " #asm_op " %[val], %[val], %[i] \n" \ | |
| 64 | + " scond %[val], [%[ctr]] \n" \ | |
| 65 | + " \n" \ | |
| 66 | + SCOND_FAIL_RETRY_ASM \ | |
| 67 | + \ | |
| 68 | + : [val] "=&r" (val) /* Early clobber to prevent reg reuse */ \ | |
| 69 | + SCOND_FAIL_RETRY_VARS \ | |
| 70 | + : [ctr] "r" (&v->counter), /* Not "m": llock only supports reg direct addr mode */ \ | |
| 71 | + [i] "ir" (i) \ | |
| 46 | 72 | : "cc"); \ |
| 47 | 73 | } \ |
| 48 | 74 | |
| 49 | 75 | #define ATOMIC_OP_RETURN(op, c_op, asm_op) \ |
| 50 | 76 | static inline int atomic_##op##_return(int i, atomic_t *v) \ |
| 51 | 77 | { \ |
| 52 | − unsigned int temp; \ | |
| 78 | + unsigned int val; \ | |
| 79 | + SCOND_FAIL_RETRY_VAR_DEF \ | |
| 53 | 80 | \ |
| 54 | 81 | /* \ |
| 55 | 82 | * Explicit full memory barrier needed before/after as \ |
| @@ -58,19 +85,21 @@ static inline int atomic_##op##_return(int i, atomic_t *v) \ · 2 unmodified lines | ||
| 58 | 85 | smp_mb(); \ |
| 59 | 86 | \ |
| 60 | 87 | __asm__ __volatile__( \ |
| 61 | − "1: \n" \ | |
| 62 | − PREFETCHW \ | |
| 63 | − " llock %0, [%1] \n" \ | |
| 64 | − " " #asm_op " %0, %0, %2 \n" \ | |
| 65 | − " scond %0, [%1] \n" \ | |
| 66 | − " bnz 1b \n" \ | |
| 67 | − : "=&r"(temp) \ | |
| 68 | − : "r"(&v->counter), "ir"(i) \ | |
| 88 | + "1: llock %[val], [%[ctr]] \n" \ | |
| 89 | + " " #asm_op " %[val], %[val], %[i] \n" \ | |
| 90 | + " scond %[val], [%[ctr]] \n" \ | |
| 91 | + " \n" \ | |
| 92 | + SCOND_FAIL_RETRY_ASM \ | |
| 93 | + \ | |
| 94 | + : [val] "=&r" (val) \ | |
| 95 | + SCOND_FAIL_RETRY_VARS \ | |
| 96 | + : [ctr] "r" (&v->counter), \ | |
| 97 | + [i] "ir" (i) \ | |
| 69 | 98 | : "cc"); \ |
| 70 | 99 | \ |
| 71 | 100 | smp_mb(); \ |
| 72 | 101 | \ |
| 73 | − return temp; \ | |
| 102 | + return val; \ | |
| 74 | 103 | } |
| 75 | 104 | |
| 76 | 105 | #else /* !CONFIG_ARC_HAS_LLSC */ |
| @@ -150,6 +179,9 @@ ATOMIC_OP(and, &=, and) · 73 unmodified lines | ||
| 150 | 179 | #undef ATOMIC_OPS |
| 151 | 180 | #undef ATOMIC_OP_RETURN |
| 152 | 181 | #undef ATOMIC_OP |
| 182 | +#undef SCOND_FAIL_RETRY_VAR_DEF | |
| 183 | +#undef SCOND_FAIL_RETRY_ASM | |
| 184 | +#undef SCOND_FAIL_RETRY_VARS | |
| 153 | 185 | |
| 154 | 186 | /** |
| 155 | 187 | * __atomic_add_unless - add unless the number is a given value |
| @@ -20,20 +20,20 @@ · 19 unmodified lines | ||
| 20 | 20 | struct pt_regs { |
| 21 | 21 | |
| 22 | 22 | /* Real registers */ |
| 23 | − long bta; /* bta_l1, bta_l2, erbta */ | |
| 23 | + unsigned long bta; /* bta_l1, bta_l2, erbta */ | |
| 24 | 24 | |
| 25 | − long lp_start, lp_end, lp_count; | |
| 25 | + unsigned long lp_start, lp_end, lp_count; | |
| 26 | 26 | |
| 27 | − long status32; /* status32_l1, status32_l2, erstatus */ | |
| 28 | − long ret; /* ilink1, ilink2 or eret */ | |
| 29 | − long blink; | |
| 30 | − long fp; | |
| 31 | − long r26; /* gp */ | |
| 27 | + unsigned long status32; /* status32_l1, status32_l2, erstatus */ | |
| 28 | + unsigned long ret; /* ilink1, ilink2 or eret */ | |
| 29 | + unsigned long blink; | |
| 30 | + unsigned long fp; | |
| 31 | + unsigned long r26; /* gp */ | |
| 32 | 32 | |
| 33 | − long r12, r11, r10, r9, r8, r7, r6, r5, r4, r3, r2, r1, r0; | |
| 33 | + unsigned long r12, r11, r10, r9, r8, r7, r6, r5, r4, r3, r2, r1, r0; | |
| 34 | 34 | |
| 35 | − long sp; /* user/kernel sp depending on where we came from */ | |
| 36 | − long orig_r0; | |
| 35 | + unsigned long sp; /* User/Kernel depending on where we came from */ | |
| 36 | + unsigned long orig_r0; | |
| 37 | 37 | |
| 38 | 38 | /* |
| 39 | 39 | * To distinguish bet excp, syscall, irq |
| @@ -55,13 +55,13 @@ struct pt_regs { · 15 unmodified lines | ||
| 55 | 55 | unsigned long event; |
| 56 | 56 | }; |
| 57 | 57 | |
| 58 | − long user_r25; | |
| 58 | + unsigned long user_r25; | |
| 59 | 59 | }; |
| 60 | 60 | #else |
| 61 | 61 | |
| 62 | 62 | struct pt_regs { |
| 63 | 63 | |
| 64 | − long orig_r0; | |
| 64 | + unsigned long orig_r0; | |
| 65 | 65 | |
| 66 | 66 | union { |
| 67 | 67 | struct { |
| @@ -76,26 +76,26 @@ struct pt_regs { · 8 unmodified lines | ||
| 76 | 76 | unsigned long event; |
| 77 | 77 | }; |
| 78 | 78 | |
| 79 | − long bta; /* bta_l1, bta_l2, erbta */ | |
| 79 | + unsigned long bta; /* bta_l1, bta_l2, erbta */ | |
| 80 | 80 | |
| 81 | − long user_r25; | |
| 81 | + unsigned long user_r25; | |
| 82 | 82 | |
| 83 | − long r26; /* gp */ | |
| 84 | − long fp; | |
| 85 | − long sp; /* user/kernel sp depending on where we came from */ | |
| 83 | + unsigned long r26; /* gp */ | |
| 84 | + unsigned long fp; | |
| 85 | + unsigned long sp; /* user/kernel sp depending on where we came from */ | |
| 86 | 86 | |
| 87 | − long r12; | |
| 87 | + unsigned long r12; | |
| 88 | 88 | |
| 89 | 89 | /*------- Below list auto saved by h/w -----------*/ |
| 90 | − long r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, r10, r11; | |
| 90 | + unsigned long r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, r10, r11; | |
| 91 | 91 | |
| 92 | − long blink; | |
| 93 | − long lp_end, lp_start, lp_count; | |
| 92 | + unsigned long blink; | |
| 93 | + unsigned long lp_end, lp_start, lp_count; | |
| 94 | 94 | |
| 95 | − long ei, ldi, jli; | |
| 95 | + unsigned long ei, ldi, jli; | |
| 96 | 96 | |
| 97 | − long ret; | |
| 98 | − long status32; | |
| 97 | + unsigned long ret; | |
| 98 | + unsigned long status32; | |
| 99 | 99 | }; |
| 100 | 100 | |
| 101 | 101 | #endif |
| @@ -103,10 +103,10 @@ struct pt_regs { · 1 unmodified line | ||
| 103 | 103 | /* Callee saved registers - need to be saved only when you are scheduled out */ |
| 104 | 104 | |
| 105 | 105 | struct callee_regs { |
| 106 | − long r25, r24, r23, r22, r21, r20, r19, r18, r17, r16, r15, r14, r13; | |
| 106 | + unsigned long r25, r24, r23, r22, r21, r20, r19, r18, r17, r16, r15, r14, r13; | |
| 107 | 107 | }; |
| 108 | 108 | |
| 109 | −#define instruction_pointer(regs) (unsigned long)((regs)->ret) | |
| 109 | +#define instruction_pointer(regs) ((regs)->ret) | |
| 110 | 110 | #define profile_pc(regs) instruction_pointer(regs) |
| 111 | 111 | |
| 112 | 112 | /* return 1 if user mode or 0 if kernel mode */ |
| @@ -142,7 +142,7 @@ struct callee_regs { · 29 unmodified lines | ||
| 142 | 142 | |
| 143 | 143 | static inline long regs_return_value(struct pt_regs *regs) |
| 144 | 144 | { |
| 145 | − return regs->r0; | |
| 145 | + return (long)regs->r0; | |
| 146 | 146 | } |
| 147 | 147 | |
| 148 | 148 | #endif /* !__ASSEMBLY__ */ |
| @@ -18,9 +18,518 @@ · 17 unmodified lines | ||
| 18 | 18 | #define arch_spin_unlock_wait(x) \ |
| 19 | 19 | do { while (arch_spin_is_locked(x)) cpu_relax(); } while (0) |
| 20 | 20 | |
| 21 | +#ifdef CONFIG_ARC_HAS_LLSC | |
| 22 | + | |
| 23 | +/* | |
| 24 | + * A normal LLOCK/SCOND based system, w/o need for livelock workaround | |
| 25 | + */ | |
| 26 | +#ifndef CONFIG_ARC_STAR_9000923308 | |
| 27 | + | |
| 21 | 28 | static inline void arch_spin_lock(arch_spinlock_t *lock) |
| 22 | 29 | { |
| 23 | − unsigned int tmp = __ARCH_SPIN_LOCK_LOCKED__; | |
| 30 | + unsigned int val; | |
| 31 | + | |
| 32 | + smp_mb(); | |
| 33 | + | |
| 34 | + __asm__ __volatile__( | |
| 35 | + "1: llock %[val], [%[slock]] \n" | |
| 36 | + " breq %[val], %[LOCKED], 1b \n" /* spin while LOCKED */ | |
| 37 | + " scond %[LOCKED], [%[slock]] \n" /* acquire */ | |
| 38 | + " bnz 1b \n" | |
| 39 | + " \n" | |
| 40 | + : [val] "=&r" (val) | |
| 41 | + : [slock] "r" (&(lock->slock)), | |
| 42 | + [LOCKED] "r" (__ARCH_SPIN_LOCK_LOCKED__) | |
| 43 | + : "memory", "cc"); | |
| 44 | + | |
| 45 | + smp_mb(); | |
| 46 | +} | |
| 47 | + | |
| 48 | +/* 1 - lock taken successfully */ | |
| 49 | +static inline int arch_spin_trylock(arch_spinlock_t *lock) | |
| 50 | +{ | |
| 51 | + unsigned int val, got_it = 0; | |
| 52 | + | |
| 53 | + smp_mb(); | |
| 54 | + | |
| 55 | + __asm__ __volatile__( | |
| 56 | + "1: llock %[val], [%[slock]] \n" | |
| 57 | + " breq %[val], %[LOCKED], 4f \n" /* already LOCKED, just bail */ | |
| 58 | + " scond %[LOCKED], [%[slock]] \n" /* acquire */ | |
| 59 | + " bnz 1b \n" | |
| 60 | + " mov %[got_it], 1 \n" | |
| 61 | + "4: \n" | |
| 62 | + " \n" | |
| 63 | + : [val] "=&r" (val), | |
| 64 | + [got_it] "+&r" (got_it) | |
| 65 | + : [slock] "r" (&(lock->slock)), | |
| 66 | + [LOCKED] "r" (__ARCH_SPIN_LOCK_LOCKED__) | |
| 67 | + : "memory", "cc"); | |
| 68 | + | |
| 69 | + smp_mb(); | |
| 70 | + | |
| 71 | + return got_it; | |
| 72 | +} | |
| 73 | + | |
| 74 | +static inline void arch_spin_unlock(arch_spinlock_t *lock) | |
| 75 | +{ | |
| 76 | + smp_mb(); | |
| 77 | + | |
| 78 | + lock->slock = __ARCH_SPIN_LOCK_UNLOCKED__; | |
| 79 | + | |
| 80 | + smp_mb(); | |
| 81 | +} | |
| 82 | + | |
| 83 | +/* | |
| 84 | + * Read-write spinlocks, allowing multiple readers but only one writer. | |
| 85 | + * Unfair locking as Writers could be starved indefinitely by Reader(s) | |
| 86 | + */ | |
| 87 | + | |
| 88 | +static inline void arch_read_lock(arch_rwlock_t *rw) | |
| 89 | +{ | |
| 90 | + unsigned int val; | |
| 91 | + | |
| 92 | + smp_mb(); | |
| 93 | + | |
| 94 | + /* | |
| 95 | + * zero means writer holds the lock exclusively, deny Reader. | |
| 96 | + * Otherwise grant lock to first/subseq reader | |
| 97 | + * | |
| 98 | + * if (rw->counter > 0) { | |
| 99 | + * rw->counter--; | |
| 100 | + * ret = 1; | |
| 101 | + * } | |
| 102 | + */ | |
| 103 | + | |
| 104 | + __asm__ __volatile__( | |
| 105 | + "1: llock %[val], [%[rwlock]] \n" | |
| 106 | + " brls %[val], %[WR_LOCKED], 1b\n" /* <= 0: spin while write locked */ | |
| 107 | + " sub %[val], %[val], 1 \n" /* reader lock */ | |
| 108 | + " scond %[val], [%[rwlock]] \n" | |
| 109 | + " bnz 1b \n" | |
| 110 | + " \n" | |
| 111 | + : [val] "=&r" (val) | |
| 112 | + : [rwlock] "r" (&(rw->counter)), | |
| 113 | + [WR_LOCKED] "ir" (0) | |
| 114 | + : "memory", "cc"); | |
| 115 | + | |
| 116 | + smp_mb(); | |
| 117 | +} | |
| 118 | + | |
| 119 | +/* 1 - lock taken successfully */ | |
| 120 | +static inline int arch_read_trylock(arch_rwlock_t *rw) | |
| 121 | +{ | |
| 122 | + unsigned int val, got_it = 0; | |
| 123 | + | |
| 124 | + smp_mb(); | |
| 125 | + | |
| 126 | + __asm__ __volatile__( | |
| 127 | + "1: llock %[val], [%[rwlock]] \n" | |
| 128 | + " brls %[val], %[WR_LOCKED], 4f\n" /* <= 0: already write locked, bail */ | |
| 129 | + " sub %[val], %[val], 1 \n" /* counter-- */ | |
| 130 | + " scond %[val], [%[rwlock]] \n" | |
| 131 | + " bnz 1b \n" /* retry if collided with someone */ | |
| 132 | + " mov %[got_it], 1 \n" | |
| 133 | + " \n" | |
| 134 | + "4: ; --- done --- \n" | |
| 135 | + | |
| 136 | + : [val] "=&r" (val), | |
| 137 | + [got_it] "+&r" (got_it) | |
| 138 | + : [rwlock] "r" (&(rw->counter)), | |
| 139 | + [WR_LOCKED] "ir" (0) | |
| 140 | + : "memory", "cc"); | |
| 141 | + | |
| 142 | + smp_mb(); | |
| 143 | + | |
| 144 | + return got_it; | |
| 145 | +} | |
| 146 | + | |
| 147 | +static inline void arch_write_lock(arch_rwlock_t *rw) | |
| 148 | +{ | |
| 149 | + unsigned int val; | |
| 150 | + | |
| 151 | + smp_mb(); | |
| 152 | + | |
| 153 | + /* | |
| 154 | + * If reader(s) hold lock (lock < __ARCH_RW_LOCK_UNLOCKED__), | |
| 155 | + * deny writer. Otherwise if unlocked grant to writer | |
| 156 | + * Hence the claim that Linux rwlocks are unfair to writers. | |
| 157 | + * (can be starved for an indefinite time by readers). | |
| 158 | + * | |
| 159 | + * if (rw->counter == __ARCH_RW_LOCK_UNLOCKED__) { | |
| 160 | + * rw->counter = 0; | |
| 161 | + * ret = 1; | |
| 162 | + * } | |
| 163 | + */ | |
| 164 | + | |
| 165 | + __asm__ __volatile__( | |
| 166 | + "1: llock %[val], [%[rwlock]] \n" | |
| 167 | + " brne %[val], %[UNLOCKED], 1b \n" /* while !UNLOCKED spin */ | |
| 168 | + " mov %[val], %[WR_LOCKED] \n" | |
| 169 | + " scond %[val], [%[rwlock]] \n" | |
| 170 | + " bnz 1b \n" | |
| 171 | + " \n" | |
| 172 | + : [val] "=&r" (val) | |
| 173 | + : [rwlock] "r" (&(rw->counter)), | |
| 174 | + [UNLOCKED] "ir" (__ARCH_RW_LOCK_UNLOCKED__), | |
| 175 | + [WR_LOCKED] "ir" (0) | |
| 176 | + : "memory", "cc"); | |
| 177 | + | |
| 178 | + smp_mb(); | |
| 179 | +} | |
| 180 | + | |
| 181 | +/* 1 - lock taken successfully */ | |
| 182 | +static inline int arch_write_trylock(arch_rwlock_t *rw) | |
| 183 | +{ | |
| 184 | + unsigned int val, got_it = 0; | |
| 185 | + | |
| 186 | + smp_mb(); | |
| 187 | + | |
| 188 | + __asm__ __volatile__( | |
| 189 | + "1: llock %[val], [%[rwlock]] \n" | |
| 190 | + " brne %[val], %[UNLOCKED], 4f \n" /* !UNLOCKED, bail */ | |
| 191 | + " mov %[val], %[WR_LOCKED] \n" | |
| 192 | + " scond %[val], [%[rwlock]] \n" | |
| 193 | + " bnz 1b \n" /* retry if collided with someone */ | |
| 194 | + " mov %[got_it], 1 \n" | |
| 195 | + " \n" | |
| 196 | + "4: ; --- done --- \n" | |
| 197 | + | |
| 198 | + : [val] "=&r" (val), | |
| 199 | + [got_it] "+&r" (got_it) | |
| 200 | + : [rwlock] "r" (&(rw->counter)), | |
| 201 | + [UNLOCKED] "ir" (__ARCH_RW_LOCK_UNLOCKED__), | |
| 202 | + [WR_LOCKED] "ir" (0) | |
| 203 | + : "memory", "cc"); | |
| 204 | + | |
| 205 | + smp_mb(); | |
| 206 | + | |
| 207 | + return got_it; | |
| 208 | +} | |
| 209 | + | |
| 210 | +static inline void arch_read_unlock(arch_rwlock_t *rw) | |
| 211 | +{ | |
| 212 | + unsigned int val; | |
| 213 | + | |
| 214 | + smp_mb(); | |
| 215 | + | |
| 216 | + /* | |
| 217 | + * rw->counter++; | |
| 218 | + */ | |
| 219 | + __asm__ __volatile__( | |
| 220 | + "1: llock %[val], [%[rwlock]] \n" | |
| 221 | + " add %[val], %[val], 1 \n" | |
| 222 | + " scond %[val], [%[rwlock]] \n" | |
| 223 | + " bnz 1b \n" | |
| 224 | + " \n" | |
| 225 | + : [val] "=&r" (val) | |
| 226 | + : [rwlock] "r" (&(rw->counter)) | |
| 227 | + : "memory", "cc"); | |
| 228 | + | |
| 229 | + smp_mb(); | |
| 230 | +} | |
| 231 | + | |
| 232 | +static inline void arch_write_unlock(arch_rwlock_t *rw) | |
| 233 | +{ | |
| 234 | + smp_mb(); | |
| 235 | + | |
| 236 | + rw->counter = __ARCH_RW_LOCK_UNLOCKED__; | |
| 237 | + | |
| 238 | + smp_mb(); | |
| 239 | +} | |
| 240 | + | |
| 241 | +#else /* CONFIG_ARC_STAR_9000923308 */ | |
| 242 | + | |
| 243 | +/* | |
| 244 | + * HS38x4 could get into a LLOCK/SCOND livelock in case of multiple overlapping | |
| 245 | + * coherency transactions in the SCU. The exclusive line state keeps rotating | |
| 246 | + * among contenting cores leading to a never ending cycle. So break the cycle | |
| 247 | + * by deferring the retry of failed exclusive access (SCOND). The actual delay | |
| 248 | + * needed is function of number of contending cores as well as the unrelated | |
| 249 | + * coherency traffic from other cores. To keep the code simple, start off with | |
| 250 | + * small delay of 1 which would suffice most cases and in case of contention | |
| 251 | + * double the delay. Eventually the delay is sufficient such that the coherency | |
| 252 | + * pipeline is drained, thus a subsequent exclusive access would succeed. | |
| 253 | + */ | |
| 254 | + | |
| 255 | +#define SCOND_FAIL_RETRY_VAR_DEF \ | |
| 256 | + unsigned int delay, tmp; \ | |
| 257 | + | |
| 258 | +#define SCOND_FAIL_RETRY_ASM \ | |
| 259 | + " ; --- scond fail delay --- \n" \ | |
| 260 | + " mov %[tmp], %[delay] \n" /* tmp = delay */ \ | |
| 261 | + "2: brne.d %[tmp], 0, 2b \n" /* while (tmp != 0) */ \ | |
| 262 | + " sub %[tmp], %[tmp], 1 \n" /* tmp-- */ \ | |
| 263 | + " rol %[delay], %[delay] \n" /* delay *= 2 */ \ | |
| 264 | + " b 1b \n" /* start over */ \ | |
| 265 | + " \n" \ | |
| 266 | + "4: ; --- done --- \n" \ | |
| 267 | + | |
| 268 | +#define SCOND_FAIL_RETRY_VARS \ | |
| 269 | + ,[delay] "=&r" (delay), [tmp] "=&r" (tmp) \ | |
| 270 | + | |
| 271 | +static inline void arch_spin_lock(arch_spinlock_t *lock) | |
| 272 | +{ | |
| 273 | + unsigned int val; | |
| 274 | + SCOND_FAIL_RETRY_VAR_DEF; | |
| 275 | + | |
| 276 | + smp_mb(); | |
| 277 | + | |
| 278 | + __asm__ __volatile__( | |
| 279 | + "0: mov %[delay], 1 \n" | |
| 280 | + "1: llock %[val], [%[slock]] \n" | |
| 281 | + " breq %[val], %[LOCKED], 0b \n" /* spin while LOCKED */ | |
| 282 | + " scond %[LOCKED], [%[slock]] \n" /* acquire */ | |
| 283 | + " bz 4f \n" /* done */ | |
| 284 | + " \n" | |
| 285 | + SCOND_FAIL_RETRY_ASM | |
| 286 | + | |
| 287 | + : [val] "=&r" (val) | |
| 288 | + SCOND_FAIL_RETRY_VARS | |
| 289 | + : [slock] "r" (&(lock->slock)), | |
| 290 | + [LOCKED] "r" (__ARCH_SPIN_LOCK_LOCKED__) | |
| 291 | + : "memory", "cc"); | |
| 292 | + | |
| 293 | + smp_mb(); | |
| 294 | +} | |
| 295 | + | |
| 296 | +/* 1 - lock taken successfully */ | |
| 297 | +static inline int arch_spin_trylock(arch_spinlock_t *lock) | |
| 298 | +{ | |
| 299 | + unsigned int val, got_it = 0; | |
| 300 | + SCOND_FAIL_RETRY_VAR_DEF; | |
| 301 | + | |
| 302 | + smp_mb(); | |
| 303 | + | |
| 304 | + __asm__ __volatile__( | |
| 305 | + "0: mov %[delay], 1 \n" | |
| 306 | + "1: llock %[val], [%[slock]] \n" | |
| 307 | + " breq %[val], %[LOCKED], 4f \n" /* already LOCKED, just bail */ | |
| 308 | + " scond %[LOCKED], [%[slock]] \n" /* acquire */ | |
| 309 | + " bz.d 4f \n" | |
| 310 | + " mov.z %[got_it], 1 \n" /* got it */ | |
| 311 | + " \n" | |
| 312 | + SCOND_FAIL_RETRY_ASM | |
| 313 | + | |
| 314 | + : [val] "=&r" (val), | |
| 315 | + [got_it] "+&r" (got_it) | |
| 316 | + SCOND_FAIL_RETRY_VARS | |
| 317 | + : [slock] "r" (&(lock->slock)), | |
| 318 | + [LOCKED] "r" (__ARCH_SPIN_LOCK_LOCKED__) | |
| 319 | + : "memory", "cc"); | |
| 320 | + | |
| 321 | + smp_mb(); | |
| 322 | + | |
| 323 | + return got_it; | |
| 324 | +} | |
| 325 | + | |
| 326 | +static inline void arch_spin_unlock(arch_spinlock_t *lock) | |
| 327 | +{ | |
| 328 | + smp_mb(); | |
| 329 | + | |
| 330 | + lock->slock = __ARCH_SPIN_LOCK_UNLOCKED__; | |
| 331 | + | |
| 332 | + smp_mb(); | |
| 333 | +} | |
| 334 | + | |
| 335 | +/* | |
| 336 | + * Read-write spinlocks, allowing multiple readers but only one writer. | |
| 337 | + * Unfair locking as Writers could be starved indefinitely by Reader(s) | |
| 338 | + */ | |
| 339 | + | |
| 340 | +static inline void arch_read_lock(arch_rwlock_t *rw) | |
| 341 | +{ | |
| 342 | + unsigned int val; | |
| 343 | + SCOND_FAIL_RETRY_VAR_DEF; | |
| 344 | + | |
| 345 | + smp_mb(); | |
| 346 | + | |
| 347 | + /* | |
| 348 | + * zero means writer holds the lock exclusively, deny Reader. | |
| 349 | + * Otherwise grant lock to first/subseq reader | |
| 350 | + * | |
| 351 | + * if (rw->counter > 0) { | |
| 352 | + * rw->counter--; | |
| 353 | + * ret = 1; | |
| 354 | + * } | |
| 355 | + */ | |
| 356 | + | |
| 357 | + __asm__ __volatile__( | |
| 358 | + "0: mov %[delay], 1 \n" | |
| 359 | + "1: llock %[val], [%[rwlock]] \n" | |
| 360 | + " brls %[val], %[WR_LOCKED], 0b\n" /* <= 0: spin while write locked */ | |
| 361 | + " sub %[val], %[val], 1 \n" /* reader lock */ | |
| 362 | + " scond %[val], [%[rwlock]] \n" | |
| 363 | + " bz 4f \n" /* done */ | |
| 364 | + " \n" | |
| 365 | + SCOND_FAIL_RETRY_ASM | |
| 366 | + | |
| 367 | + : [val] "=&r" (val) | |
| 368 | + SCOND_FAIL_RETRY_VARS | |
| 369 | + : [rwlock] "r" (&(rw->counter)), | |
| 370 | + [WR_LOCKED] "ir" (0) | |
| 371 | + : "memory", "cc"); | |
| 372 | + | |
| 373 | + smp_mb(); | |
| 374 | +} | |
| 375 | + | |
| 376 | +/* 1 - lock taken successfully */ | |
| 377 | +static inline int arch_read_trylock(arch_rwlock_t *rw) | |
| 378 | +{ | |
| 379 | + unsigned int val, got_it = 0; | |
| 380 | + SCOND_FAIL_RETRY_VAR_DEF; | |
| 381 | + | |
| 382 | + smp_mb(); | |
| 383 | + | |
| 384 | + __asm__ __volatile__( | |
| 385 | + "0: mov %[delay], 1 \n" | |
| 386 | + "1: llock %[val], [%[rwlock]] \n" | |
| 387 | + " brls %[val], %[WR_LOCKED], 4f\n" /* <= 0: already write locked, bail */ | |
| 388 | + " sub %[val], %[val], 1 \n" /* counter-- */ | |
| 389 | + " scond %[val], [%[rwlock]] \n" | |
| 390 | + " bz.d 4f \n" | |
| 391 | + " mov.z %[got_it], 1 \n" /* got it */ | |
| 392 | + " \n" | |
| 393 | + SCOND_FAIL_RETRY_ASM | |
| 394 | + | |
| 395 | + : [val] "=&r" (val), | |
| 396 | + [got_it] "+&r" (got_it) | |
| 397 | + SCOND_FAIL_RETRY_VARS | |
| 398 | + : [rwlock] "r" (&(rw->counter)), | |
| 399 | + [WR_LOCKED] "ir" (0) | |
| 400 | + : "memory", "cc"); | |
| 401 | + | |
| 402 | + smp_mb(); | |
| 403 | + | |
| 404 | + return got_it; | |
| 405 | +} | |
| 406 | + | |
| 407 | +static inline void arch_write_lock(arch_rwlock_t *rw) | |
| 408 | +{ | |
| 409 | + unsigned int val; | |
| 410 | + SCOND_FAIL_RETRY_VAR_DEF; | |
| 411 | + | |
| 412 | + smp_mb(); | |
| 413 | + | |
| 414 | + /* | |
| 415 | + * If reader(s) hold lock (lock < __ARCH_RW_LOCK_UNLOCKED__), | |
| 416 | + * deny writer. Otherwise if unlocked grant to writer | |
| 417 | + * Hence the claim that Linux rwlocks are unfair to writers. | |
| 418 | + * (can be starved for an indefinite time by readers). | |
| 419 | + * | |
| 420 | + * if (rw->counter == __ARCH_RW_LOCK_UNLOCKED__) { | |
| 421 | + * rw->counter = 0; | |
| 422 | + * ret = 1; | |
| 423 | + * } | |
| 424 | + */ | |
| 425 | + | |
| 426 | + __asm__ __volatile__( | |
| 427 | + "0: mov %[delay], 1 \n" | |
| 428 | + "1: llock %[val], [%[rwlock]] \n" | |
| 429 | + " brne %[val], %[UNLOCKED], 0b \n" /* while !UNLOCKED spin */ | |
| 430 | + " mov %[val], %[WR_LOCKED] \n" | |
| 431 | + " scond %[val], [%[rwlock]] \n" | |
| 432 | + " bz 4f \n" | |
| 433 | + " \n" | |
| 434 | + SCOND_FAIL_RETRY_ASM | |
| 435 | + | |
| 436 | + : [val] "=&r" (val) | |
| 437 | + SCOND_FAIL_RETRY_VARS | |
| 438 | + : [rwlock] "r" (&(rw->counter)), | |
| 439 | + [UNLOCKED] "ir" (__ARCH_RW_LOCK_UNLOCKED__), | |
| 440 | + [WR_LOCKED] "ir" (0) | |
| 441 | + : "memory", "cc"); | |
| 442 | + | |
| 443 | + smp_mb(); | |
| 444 | +} | |
| 445 | + | |
| 446 | +/* 1 - lock taken successfully */ | |
| 447 | +static inline int arch_write_trylock(arch_rwlock_t *rw) | |
| 448 | +{ | |
| 449 | + unsigned int val, got_it = 0; | |
| 450 | + SCOND_FAIL_RETRY_VAR_DEF; | |
| 451 | + | |
| 452 | + smp_mb(); | |
| 453 | + | |
| 454 | + __asm__ __volatile__( | |
| 455 | + "0: mov %[delay], 1 \n" | |
| 456 | + "1: llock %[val], [%[rwlock]] \n" | |
| 457 | + " brne %[val], %[UNLOCKED], 4f \n" /* !UNLOCKED, bail */ | |
| 458 | + " mov %[val], %[WR_LOCKED] \n" | |
| 459 | + " scond %[val], [%[rwlock]] \n" | |
| 460 | + " bz.d 4f \n" | |
| 461 | + " mov.z %[got_it], 1 \n" /* got it */ | |
| 462 | + " \n" | |
| 463 | + SCOND_FAIL_RETRY_ASM | |
| 464 | + | |
| 465 | + : [val] "=&r" (val), | |
| 466 | + [got_it] "+&r" (got_it) | |
| 467 | + SCOND_FAIL_RETRY_VARS | |
| 468 | + : [rwlock] "r" (&(rw->counter)), | |
| 469 | + [UNLOCKED] "ir" (__ARCH_RW_LOCK_UNLOCKED__), | |
| 470 | + [WR_LOCKED] "ir" (0) | |
| 471 | + : "memory", "cc"); | |
| 472 | + | |
| 473 | + smp_mb(); | |
| 474 | + | |
| 475 | + return got_it; | |
| 476 | +} | |
| 477 | + | |
| 478 | +static inline void arch_read_unlock(arch_rwlock_t *rw) | |
| 479 | +{ | |
| 480 | + unsigned int val; | |
| 481 | + | |
| 482 | + smp_mb(); | |
| 483 | + | |
| 484 | + /* | |
| 485 | + * rw->counter++; | |
| 486 | + */ | |
| 487 | + __asm__ __volatile__( | |
| 488 | + "1: llock %[val], [%[rwlock]] \n" | |
| 489 | + " add %[val], %[val], 1 \n" | |
| 490 | + " scond %[val], [%[rwlock]] \n" | |
| 491 | + " bnz 1b \n" | |
| 492 | + " \n" | |
| 493 | + : [val] "=&r" (val) | |
| 494 | + : [rwlock] "r" (&(rw->counter)) | |
| 495 | + : "memory", "cc"); | |
| 496 | + | |
| 497 | + smp_mb(); | |
| 498 | +} | |
| 499 | + | |
| 500 | +static inline void arch_write_unlock(arch_rwlock_t *rw) | |
| 501 | +{ | |
| 502 | + unsigned int val; | |
| 503 | + | |
| 504 | + smp_mb(); | |
| 505 | + | |
| 506 | + /* | |
| 507 | + * rw->counter = __ARCH_RW_LOCK_UNLOCKED__; | |
| 508 | + */ | |
| 509 | + __asm__ __volatile__( | |
| 510 | + "1: llock %[val], [%[rwlock]] \n" | |
| 511 | + " scond %[UNLOCKED], [%[rwlock]]\n" | |
| 512 | + " bnz 1b \n" | |
| 513 | + " \n" | |
| 514 | + : [val] "=&r" (val) | |
| 515 | + : [rwlock] "r" (&(rw->counter)), | |
| 516 | + [UNLOCKED] "r" (__ARCH_RW_LOCK_UNLOCKED__) | |
| 517 | + : "memory", "cc"); | |
| 518 | + | |
| 519 | + smp_mb(); | |
| 520 | +} | |
| 521 | + | |
| 522 | +#undef SCOND_FAIL_RETRY_VAR_DEF | |
| 523 | +#undef SCOND_FAIL_RETRY_ASM | |
| 524 | +#undef SCOND_FAIL_RETRY_VARS | |
| 525 | + | |
| 526 | +#endif /* CONFIG_ARC_STAR_9000923308 */ | |
| 527 | + | |
| 528 | +#else /* !CONFIG_ARC_HAS_LLSC */ | |
| 529 | + | |
| 530 | +static inline void arch_spin_lock(arch_spinlock_t *lock) | |
| 531 | +{ | |
| 532 | + unsigned int val = __ARCH_SPIN_LOCK_LOCKED__; | |
| 24 | 533 | |
| 25 | 534 | /* |
| 26 | 535 | * This smp_mb() is technically superfluous, we only need the one |
| @@ -33,7 +542,7 @@ static inline void arch_spin_lock(arch_spinlock_t *lock) · 6 unmodified lines | ||
| 33 | 542 | __asm__ __volatile__( |
| 34 | 543 | "1: ex %0, [%1] \n" |
| 35 | 544 | " breq %0, %2, 1b \n" |
| 36 | − : "+&r" (tmp) | |
| 545 | + : "+&r" (val) | |
| 37 | 546 | : "r"(&(lock->slock)), "ir"(__ARCH_SPIN_LOCK_LOCKED__) |
| 38 | 547 | : "memory"); |
| 39 | 548 | |
| @@ -48,26 +557,27 @@ static inline void arch_spin_lock(arch_spinlock_t *lock) · 8 unmodified lines | ||
| 48 | 557 | smp_mb(); |
| 49 | 558 | } |
| 50 | 559 | |
| 560 | +/* 1 - lock taken successfully */ | |
| 51 | 561 | static inline int arch_spin_trylock(arch_spinlock_t *lock) |
| 52 | 562 | { |
| 53 | − unsigned int tmp = __ARCH_SPIN_LOCK_LOCKED__; | |
| 563 | + unsigned int val = __ARCH_SPIN_LOCK_LOCKED__; | |
| 54 | 564 | |
| 55 | 565 | smp_mb(); |
| 56 | 566 | |
| 57 | 567 | __asm__ __volatile__( |
| 58 | 568 | "1: ex %0, [%1] \n" |
| 59 | − : "+r" (tmp) | |
| 569 | + : "+r" (val) | |
| 60 | 570 | : "r"(&(lock->slock)) |
| 61 | 571 | : "memory"); |
| 62 | 572 | |
| 63 | 573 | smp_mb(); |
| 64 | 574 | |
| 65 | − return (tmp == __ARCH_SPIN_LOCK_UNLOCKED__); | |
| 575 | + return (val == __ARCH_SPIN_LOCK_UNLOCKED__); | |
| 66 | 576 | } |
| 67 | 577 | |
| 68 | 578 | static inline void arch_spin_unlock(arch_spinlock_t *lock) |
| 69 | 579 | { |
| 70 | − unsigned int tmp = __ARCH_SPIN_LOCK_UNLOCKED__; | |
| 580 | + unsigned int val = __ARCH_SPIN_LOCK_UNLOCKED__; | |
| 71 | 581 | |
| 72 | 582 | /* |
| 73 | 583 | * RELEASE barrier: given the instructions avail on ARCv2, full barrier |
| @@ -77,7 +587,7 @@ static inline void arch_spin_unlock(arch_spinlock_t *lock) · 3 unmodified lines | ||
| 77 | 587 | |
| 78 | 588 | __asm__ __volatile__( |
| 79 | 589 | " ex %0, [%1] \n" |
| 80 | − : "+r" (tmp) | |
| 590 | + : "+r" (val) | |
| 81 | 591 | : "r"(&(lock->slock)) |
| 82 | 592 | : "memory"); |
| 83 | 593 | |
| @@ -90,19 +600,12 @@ static inline void arch_spin_unlock(arch_spinlock_t *lock) · 6 unmodified lines | ||
| 90 | 600 | |
| 91 | 601 | /* |
| 92 | 602 | * Read-write spinlocks, allowing multiple readers but only one writer. |
| 603 | + * Unfair locking as Writers could be starved indefinitely by Reader(s) | |
| 93 | 604 | * |
| 94 | 605 | * The spinlock itself is contained in @counter and access to it is |
| 95 | 606 | * serialized with @lock_mutex. |
| 96 | − * | |
| 97 | − * Unfair locking as Writers could be starved indefinitely by Reader(s) | |
| 98 | 607 | */ |
| 99 | 608 | |
| 100 | −/* Would read_trylock() succeed? */ | |
| 101 | −#define arch_read_can_lock(x) ((x)->counter > 0) | |
| 102 | − | |
| 103 | −/* Would write_trylock() succeed? */ | |
| 104 | −#define arch_write_can_lock(x) ((x)->counter == __ARCH_RW_LOCK_UNLOCKED__) | |
| 105 | − | |
| 106 | 609 | /* 1 - lock taken successfully */ |
| 107 | 610 | static inline int arch_read_trylock(arch_rwlock_t *rw) |
| 108 | 611 | { |
| @@ -173,6 +676,11 @@ static inline void arch_write_unlock(arch_rwlock_t *rw) · 64 unmodified lines | ||
| 173 | 676 | arch_spin_unlock(&(rw->lock_mutex)); |
| 174 | 677 | } |
| 175 | 678 | |
| 679 | +#endif | |
| 680 | + | |
| 681 | +#define arch_read_can_lock(x) ((x)->counter > 0) | |
| 682 | +#define arch_write_can_lock(x) ((x)->counter == __ARCH_RW_LOCK_UNLOCKED__) | |
| 683 | + | |
| 176 | 684 | #define arch_read_lock_flags(lock, flags) arch_read_lock(lock) |
| 177 | 685 | #define arch_write_lock_flags(lock, flags) arch_write_lock(lock) |
| 178 | 686 | |
| @@ -26,7 +26,9 @@ typedef struct { · 25 unmodified lines | ||
| 26 | 26 | */ |
| 27 | 27 | typedef struct { |
| 28 | 28 | volatile unsigned int counter; |
| 29 | +#ifndef CONFIG_ARC_HAS_LLSC | |
| 29 | 30 | arch_spinlock_t lock_mutex; |
| 31 | +#endif | |
| 30 | 32 | } arch_rwlock_t; |
| 31 | 33 | |
| 32 | 34 | #define __ARCH_RW_LOCK_UNLOCKED__ 0x01000000 |
| @@ -32,20 +32,20 @@ · 31 unmodified lines | ||
| 32 | 32 | */ |
| 33 | 33 | struct user_regs_struct { |
| 34 | 34 | |
| 35 | − long pad; | |
| 35 | + unsigned long pad; | |
| 36 | 36 | struct { |
| 37 | − long bta, lp_start, lp_end, lp_count; | |
| 38 | − long status32, ret, blink, fp, gp; | |
| 39 | − long r12, r11, r10, r9, r8, r7, r6, r5, r4, r3, r2, r1, r0; | |
| 40 | − long sp; | |
| 37 | + unsigned long bta, lp_start, lp_end, lp_count; | |
| 38 | + unsigned long status32, ret, blink, fp, gp; | |
| 39 | + unsigned long r12, r11, r10, r9, r8, r7, r6, r5, r4, r3, r2, r1, r0; | |
| 40 | + unsigned long sp; | |
| 41 | 41 | } scratch; |
| 42 | − long pad2; | |
| 42 | + unsigned long pad2; | |
| 43 | 43 | struct { |
| 44 | − long r25, r24, r23, r22, r21, r20; | |
| 45 | − long r19, r18, r17, r16, r15, r14, r13; | |
| 44 | + unsigned long r25, r24, r23, r22, r21, r20; | |
| 45 | + unsigned long r19, r18, r17, r16, r15, r14, r13; | |
| 46 | 46 | } callee; |
| 47 | − long efa; /* break pt addr, for break points in delay slots */ | |
| 48 | − long stop_pc; /* give dbg stop_pc after ensuring brkpt trap */ | |
| 47 | + unsigned long efa; /* break pt addr, for break points in delay slots */ | |
| 48 | + unsigned long stop_pc; /* give dbg stop_pc after ensuring brkpt trap */ | |
| 49 | 49 | }; |
| 50 | 50 | #endif /* !__ASSEMBLY__ */ |
| 51 | 51 | |
| @@ -47,6 +47,7 @@ static void read_arc_build_cfg_regs(void) · 46 unmodified lines | ||
| 47 | 47 | struct bcr_perip uncached_space; |
| 48 | 48 | struct bcr_generic bcr; |
| 49 | 49 | struct cpuinfo_arc *cpu = &cpuinfo_arc700[smp_processor_id()]; |
| 50 | + unsigned long perip_space; | |
| 50 | 51 | FIX_PTR(cpu); |
| 51 | 52 | |
| 52 | 53 | READ_BCR(AUX_IDENTITY, cpu->core); |
| @@ -56,7 +57,12 @@ static void read_arc_build_cfg_regs(void) · 3 unmodified lines | ||
| 56 | 57 | cpu->vec_base = read_aux_reg(AUX_INTR_VEC_BASE); |
| 57 | 58 | |
| 58 | 59 | READ_BCR(ARC_REG_D_UNCACH_BCR, uncached_space); |
| 59 | − BUG_ON((uncached_space.start << 24) != ARC_UNCACHED_ADDR_SPACE); | |
| 60 | + if (uncached_space.ver < 3) | |
| 61 | + perip_space = uncached_space.start << 24; | |
| 62 | + else | |
| 63 | + perip_space = read_aux_reg(AUX_NON_VOL) & 0xF0000000; | |
| 64 | + | |
| 65 | + BUG_ON(perip_space != ARC_UNCACHED_ADDR_SPACE); | |
| 60 | 66 | |
| 61 | 67 | READ_BCR(ARC_REG_MUL_BCR, cpu->extn_mpy); |
| 62 | 68 | |
| @@ -330,6 +336,10 @@ static void arc_chk_core_config(void) · 267 unmodified lines | ||
| 330 | 336 | pr_warn("CONFIG_ARC_FPU_SAVE_RESTORE needed for working apps\n"); |
| 331 | 337 | else if (!cpu->extn.fpu_dp && fpu_enabled) |
| 332 | 338 | panic("FPU non-existent, disable CONFIG_ARC_FPU_SAVE_RESTORE\n"); |
| 339 | + | |
| 340 | + if (is_isa_arcv2() && IS_ENABLED(CONFIG_SMP) && cpu->isa.atomic && | |
| 341 | + !IS_ENABLED(CONFIG_ARC_STAR_9000923308)) | |
| 342 | + panic("llock/scond livelock workaround missing\n"); | |
| 333 | 343 | } |
| 334 | 344 | |
| 335 | 345 | /* |
| @@ -203,34 +203,24 @@ static int arc_clkevent_set_next_event(unsigned long delta, · 202 unmodified lines | ||
| 203 | 203 | return 0; |
| 204 | 204 | } |
| 205 | 205 | |
| 206 | −static void arc_clkevent_set_mode(enum clock_event_mode mode, | |
| 207 | − struct clock_event_device *dev) | |
| 206 | +static int arc_clkevent_set_periodic(struct clock_event_device *dev) | |
| 208 | 207 | { |
| 209 | − switch (mode) { | |
| 210 | − case CLOCK_EVT_MODE_PERIODIC: | |
| 211 | − /* | |
| 212 | − * At X Hz, 1 sec = 1000ms -> X cycles; | |
| 213 | − * 10ms -> X / 100 cycles | |
| 214 | − */ | |
| 215 | − arc_timer_event_setup(arc_get_core_freq() / HZ); | |
| 216 | − break; | |
| 217 | − case CLOCK_EVT_MODE_ONESHOT: | |
| 218 | − break; | |
| 219 | − default: | |
| 220 | − break; | |
| 221 | − } | |
| 222 | − | |
| 223 | − return; | |
| 208 | + /* | |
| 209 | + * At X Hz, 1 sec = 1000ms -> X cycles; | |
| 210 | + * 10ms -> X / 100 cycles | |
| 211 | + */ | |
| 212 | + arc_timer_event_setup(arc_get_core_freq() / HZ); | |
| 213 | + return 0; | |
| 224 | 214 | } |
| 225 | 215 | |
| 226 | 216 | static DEFINE_PER_CPU(struct clock_event_device, arc_clockevent_device) = { |
| 227 | − .name = "ARC Timer0", | |
| 228 | − .features = CLOCK_EVT_FEAT_ONESHOT | CLOCK_EVT_FEAT_PERIODIC, | |
| 229 | − .mode = CLOCK_EVT_MODE_UNUSED, | |
| 230 | − .rating = 300, | |
| 231 | − .irq = TIMER0_IRQ, /* hardwired, no need for resources */ | |
| 232 | − .set_next_event = arc_clkevent_set_next_event, | |
| 233 | − .set_mode = arc_clkevent_set_mode, | |
| 217 | + .name = "ARC Timer0", | |
| 218 | + .features = CLOCK_EVT_FEAT_ONESHOT | | |
| 219 | + CLOCK_EVT_FEAT_PERIODIC, | |
| 220 | + .rating = 300, | |
| 221 | + .irq = TIMER0_IRQ, /* hardwired, no need for resources */ | |
| 222 | + .set_next_event = arc_clkevent_set_next_event, | |
| 223 | + .set_state_periodic = arc_clkevent_set_periodic, | |
| 234 | 224 | }; |
| 235 | 225 | |
| 236 | 226 | static irqreturn_t timer_irq_handler(int irq, void *dev_id) |
| @@ -240,7 +230,7 @@ static irqreturn_t timer_irq_handler(int irq, void *dev_id) · 3 unmodified lines | ||
| 240 | 230 | * irq_set_chip_and_handler() asked for handle_percpu_devid_irq() |
| 241 | 231 | */ |
| 242 | 232 | struct clock_event_device *evt = this_cpu_ptr(&arc_clockevent_device); |
| 243 | − int irq_reenable = evt->mode == CLOCK_EVT_MODE_PERIODIC; | |
| 233 | + int irq_reenable = clockevent_state_periodic(evt); | |
| 244 | 234 | |
| 245 | 235 | /* |
| 246 | 236 | * Any write to CTRL reg ACks the interrupt, we rewrite the |
| @@ -206,7 +206,7 @@ unalignedOffby3: · 205 unmodified lines | ||
| 206 | 206 | ld.ab r6, [r1, 4] |
| 207 | 207 | prefetch [r1, 28] ;Prefetch the next read location |
| 208 | 208 | ld.ab r8, [r1,4] |
| 209 | − prefetch [r3, 32] ;Prefetch the next write location | |
| 209 | + prefetchw [r3, 32] ;Prefetch the next write location | |
| 210 | 210 | |
| 211 | 211 | SHIFT_1 (r7, r6, 8) |
| 212 | 212 | or r7, r7, r5 |
| @@ -10,12 +10,6 @@ · 9 unmodified lines | ||
| 10 | 10 | |
| 11 | 11 | #undef PREALLOC_NOT_AVAIL |
| 12 | 12 | |
| 13 | −#ifdef PREALLOC_NOT_AVAIL | |
| 14 | −#define PREWRITE(A,B) prefetchw [(A),(B)] | |
| 15 | −#else | |
| 16 | −#define PREWRITE(A,B) prealloc [(A),(B)] | |
| 17 | −#endif | |
| 18 | − | |
| 19 | 13 | ENTRY(memset) |
| 20 | 14 | prefetchw [r0] ; Prefetch the write location |
| 21 | 15 | mov.f 0, r2 |
| @@ -51,9 +45,15 @@ ENTRY(memset) · 29 unmodified lines | ||
| 51 | 45 | |
| 52 | 46 | ;;; Convert len to Dwords, unfold x8 |
| 53 | 47 | lsr.f lp_count, lp_count, 6 |
| 48 | + | |
| 54 | 49 | lpnz @.Lset64bytes |
| 55 | 50 | ;; LOOP START |
| 56 | − PREWRITE(r3, 64) ;Prefetch the next write location | |
| 51 | +#ifdef PREALLOC_NOT_AVAIL | |
| 52 | + prefetchw [r3, 64] ;Prefetch the next write location | |
| 53 | +#else | |
| 54 | + prealloc [r3, 64] | |
| 55 | +#endif | |
| 56 | +#ifdef CONFIG_ARC_HAS_LL64 | |
| 57 | 57 | std.ab r4, [r3, 8] |
| 58 | 58 | std.ab r4, [r3, 8] |
| 59 | 59 | std.ab r4, [r3, 8] |
| @@ -62,16 +62,45 @@ ENTRY(memset) · 2 unmodified lines | ||
| 62 | 62 | std.ab r4, [r3, 8] |
| 63 | 63 | std.ab r4, [r3, 8] |
| 64 | 64 | std.ab r4, [r3, 8] |
| 65 | +#else | |
| 66 | + st.ab r4, [r3, 4] | |
| 67 | + st.ab r4, [r3, 4] | |
| 68 | + st.ab r4, [r3, 4] | |
| 69 | + st.ab r4, [r3, 4] | |
| 70 | + st.ab r4, [r3, 4] | |
| 71 | + st.ab r4, [r3, 4] | |
| 72 | + st.ab r4, [r3, 4] | |
| 73 | + st.ab r4, [r3, 4] | |
| 74 | + st.ab r4, [r3, 4] | |
| 75 | + st.ab r4, [r3, 4] | |
| 76 | + st.ab r4, [r3, 4] | |
| 77 | + st.ab r4, [r3, 4] | |
| 78 | + st.ab r4, [r3, 4] | |
| 79 | + st.ab r4, [r3, 4] | |
| 80 | + st.ab r4, [r3, 4] | |
| 81 | + st.ab r4, [r3, 4] | |
| 82 | +#endif | |
| 65 | 83 | .Lset64bytes: |
| 66 | 84 | |
| 67 | 85 | lsr.f lp_count, r2, 5 ;Last remaining max 124 bytes |
| 68 | 86 | lpnz .Lset32bytes |
| 69 | 87 | ;; LOOP START |
| 70 | 88 | prefetchw [r3, 32] ;Prefetch the next write location |
| 89 | +#ifdef CONFIG_ARC_HAS_LL64 | |
| 71 | 90 | std.ab r4, [r3, 8] |
| 72 | 91 | std.ab r4, [r3, 8] |
| 73 | 92 | std.ab r4, [r3, 8] |
| 74 | 93 | std.ab r4, [r3, 8] |
| 94 | +#else | |
| 95 | + st.ab r4, [r3, 4] | |
| 96 | + st.ab r4, [r3, 4] | |
| 97 | + st.ab r4, [r3, 4] | |
| 98 | + st.ab r4, [r3, 4] | |
| 99 | + st.ab r4, [r3, 4] | |
| 100 | + st.ab r4, [r3, 4] | |
| 101 | + st.ab r4, [r3, 4] | |
| 102 | + st.ab r4, [r3, 4] | |
| 103 | +#endif | |
| 75 | 104 | .Lset32bytes: |
| 76 | 105 | |
| 77 | 106 | and.f lp_count, r2, 0x1F ;Last remaining 31 bytes |
| @@ -389,6 +389,21 @@ axs103_set_freq(unsigned int id, unsigned int fd, unsigned int od) · 388 unmodified lines | ||
| 389 | 389 | |
| 390 | 390 | static void __init axs103_early_init(void) |
| 391 | 391 | { |
| 392 | + /* | |
| 393 | + * AXS103 configurations for SMP/QUAD configurations share device tree | |
| 394 | + * which defaults to 90 MHz. However recent failures of Quad config | |
| 395 | + * revealed P&R timing violations so clamp it down to safe 50 MHz | |
| 396 | + * Instead of duplicating defconfig/DT for SMP/QUAD, add a small hack | |
| 397 | + * | |
| 398 | + * This hack is really hacky as of now. Fix it properly by getting the | |
| 399 | + * number of cores as return value of platform's early SMP callback | |
| 400 | + */ | |
| 401 | +#ifdef CONFIG_ARC_MCIP | |
| 402 | + unsigned int num_cores = (read_aux_reg(ARC_REG_MCIP_BCR) >> 16) & 0x3F; | |
| 403 | + if (num_cores > 2) | |
| 404 | + arc_set_core_freq(50 * 1000000); | |
| 405 | +#endif | |
| 406 | + | |
| 392 | 407 | switch (arc_get_core_freq()/1000000) { |
| 393 | 408 | case 33: |
| 394 | 409 | axs103_set_freq(1, 1, 1); |
| @@ -116,7 +116,7 @@ · 115 unmodified lines | ||
| 116 | 116 | ranges = <0 0x2000 0x2000>; |
| 117 | 117 | |
| 118 | 118 | scm_conf: scm_conf@0 { |
| 119 | − compatible = "syscon"; | |
| 119 | + compatible = "syscon", "simple-bus"; | |
| 120 | 120 | reg = <0x0 0x1400>; |
| 121 | 121 | #address-cells = <1>; |
| 122 | 122 | #size-cells = <1>; |
| @@ -1140,6 +1140,7 @@ · 1017 unmodified lines | ||
| 1140 | 1140 | ctrl-module = <&omap_control_sata>; |
| 1141 | 1141 | clocks = <&sys_clkin1>, <&sata_ref_clk>; |
| 1142 | 1142 | clock-names = "sysclk", "refclk"; |
| 1143 | + syscon-pllreset = <&scm_conf 0x3fc>; | |
| 1143 | 1144 | #phy-cells = <0>; |
| 1144 | 1145 | }; |
| 1145 | 1146 | |
| @@ -138,8 +138,8 @@ · 137 unmodified lines | ||
| 138 | 138 | |
| 139 | 139 | mipi_phy: video-phy@10020710 { |
| 140 | 140 | compatible = "samsung,s5pv210-mipi-video-phy"; |
| 141 | − reg = <0x10020710 8>; | |
| 142 | 141 | #phy-cells = <1>; |
| 142 | + syscon = <&pmu_system_controller>; | |
| 143 | 143 | }; |
| 144 | 144 | |
| 145 | 145 | pd_cam: cam-power-domain@10023C00 { |
| @@ -127,6 +127,10 @@ · 126 unmodified lines | ||
| 127 | 127 | }; |
| 128 | 128 | }; |
| 129 | 129 | |
| 130 | +&cpu0 { | |
| 131 | + cpu0-supply = <&buck1_reg>; | |
| 132 | +}; | |
| 133 | + | |
| 130 | 134 | &fimd { |
| 131 | 135 | pinctrl-0 = <&lcd_en &lcd_clk &lcd_data24 &pwm0_out>; |
| 132 | 136 | pinctrl-names = "default"; |
| @@ -188,6 +188,10 @@ · 187 unmodified lines | ||
| 188 | 188 | }; |
| 189 | 189 | }; |
| 190 | 190 | |
| 191 | +&cpu0 { | |
| 192 | + cpu0-supply = <&varm_breg>; | |
| 193 | +}; | |
| 194 | + | |
| 191 | 195 | &dsi_0 { |
| 192 | 196 | vddcore-supply = <&vusb_reg>; |
| 193 | 197 | vddio-supply = <&vmipi_reg>; |
| @@ -548,6 +548,10 @@ · 547 unmodified lines | ||
| 548 | 548 | }; |
| 549 | 549 | }; |
| 550 | 550 | |
| 551 | +&cpu0 { | |
| 552 | + cpu0-supply = <&vdd_arm_reg>; | |
| 553 | +}; | |
| 554 | + | |
| 551 | 555 | &pinctrl_1 { |
| 552 | 556 | hdmi_hpd: hdmi-hpd { |
| 553 | 557 | samsung,pins = "gpx3-7"; |
| @@ -40,6 +40,18 @@ · 39 unmodified lines | ||
| 40 | 40 | device_type = "cpu"; |
| 41 | 41 | compatible = "arm,cortex-a9"; |
| 42 | 42 | reg = <0x900>; |
| 43 | + clocks = <&clock CLK_ARM_CLK>; | |
| 44 | + clock-names = "cpu"; | |
| 45 | + clock-latency = <160000>; | |
| 46 | + | |
| 47 | + operating-points = < | |
| 48 | + 1200000 1250000 | |
| 49 | + 1000000 1150000 | |
| 50 | + 800000 1075000 | |
| 51 | + 500000 975000 | |
| 52 | + 400000 975000 | |
| 53 | + 200000 950000 | |
| 54 | + >; | |
| 43 | 55 | cooling-min-level = <4>; |
| 44 | 56 | cooling-max-level = <2>; |
| 45 | 57 | #cooling-cells = <2>; /* min followed by max */ |
| @@ -10,6 +10,7 @@ · 9 unmodified lines | ||
| 10 | 10 | */ |
| 11 | 11 | |
| 12 | 12 | /dts-v1/; |
| 13 | +#include <dt-bindings/gpio/gpio.h> | |
| 13 | 14 | #include <dt-bindings/input/input.h> |
| 14 | 15 | #include "imx25.dtsi" |
| 15 | 16 | |
| @@ -114,8 +115,8 @@ · 98 unmodified lines | ||
| 114 | 115 | &esdhc1 { |
| 115 | 116 | pinctrl-names = "default"; |
| 116 | 117 | pinctrl-0 = <&pinctrl_esdhc1>; |
| 117 | − cd-gpios = <&gpio2 1 0>; | |
| 118 | − wp-gpios = <&gpio2 0 0>; | |
| 118 | + cd-gpios = <&gpio2 1 GPIO_ACTIVE_LOW>; | |
| 119 | + wp-gpios = <&gpio2 0 GPIO_ACTIVE_HIGH>; | |
| 119 | 120 | status = "okay"; |
| 120 | 121 | }; |
| 121 | 122 | |
| @@ -286,8 +286,8 @@ · 285 unmodified lines | ||
| 286 | 286 | can1: can@53fe4000 { |
| 287 | 287 | compatible = "fsl,imx35-flexcan", "fsl,p1010-flexcan"; |
| 288 | 288 | reg = <0x53fe4000 0x1000>; |
| 289 | − clocks = <&clks 33>; | |
| 290 | − clock-names = "ipg"; | |
| 289 | + clocks = <&clks 33>, <&clks 33>; | |
| 290 | + clock-names = "ipg", "per"; | |
| 291 | 291 | interrupts = <43>; |
| 292 | 292 | status = "disabled"; |
| 293 | 293 | }; |
| @@ -295,8 +295,8 @@ · 1 unmodified line | ||
| 295 | 295 | can2: can@53fe8000 { |
| 296 | 296 | compatible = "fsl,imx35-flexcan", "fsl,p1010-flexcan"; |
| 297 | 297 | reg = <0x53fe8000 0x1000>; |
| 298 | − clocks = <&clks 34>; | |
| 299 | − clock-names = "ipg"; | |
| 298 | + clocks = <&clks 34>, <&clks 34>; | |
| 299 | + clock-names = "ipg", "per"; | |
| 300 | 300 | interrupts = <44>; |
| 301 | 301 | status = "disabled"; |
| 302 | 302 | }; |
| @@ -98,7 +98,7 @@ · 97 unmodified lines | ||
| 98 | 98 | &esdhc1 { |
| 99 | 99 | pinctrl-names = "default"; |
| 100 | 100 | pinctrl-0 = <&pinctrl_esdhc1>; |
| 101 | − cd-gpios = <&gpio2 29 GPIO_ACTIVE_HIGH>; | |
| 101 | + cd-gpios = <&gpio2 29 GPIO_ACTIVE_LOW>; | |
| 102 | 102 | bus-width = <4>; |
| 103 | 103 | status = "okay"; |
| 104 | 104 | }; |
| @@ -103,8 +103,8 @@ · 102 unmodified lines | ||
| 103 | 103 | &esdhc1 { |
| 104 | 104 | pinctrl-names = "default"; |
| 105 | 105 | pinctrl-0 = <&pinctrl_esdhc1>; |
| 106 | − cd-gpios = <&gpio1 1 0>; | |
| 107 | − wp-gpios = <&gpio1 9 0>; | |
| 106 | + cd-gpios = <&gpio1 1 GPIO_ACTIVE_LOW>; | |
| 107 | + wp-gpios = <&gpio1 9 GPIO_ACTIVE_HIGH>; | |
| 108 | 108 | status = "okay"; |
| 109 | 109 | }; |
| 110 | 110 | |
| @@ -124,8 +124,8 @@ · 123 unmodified lines | ||
| 124 | 124 | &esdhc1 { |
| 125 | 125 | pinctrl-names = "default"; |
| 126 | 126 | pinctrl-0 = <&pinctrl_esdhc1>; |
| 127 | − cd-gpios = <&gpio1 1 0>; | |
| 128 | − wp-gpios = <&gpio1 9 0>; | |
| 127 | + cd-gpios = <&gpio1 1 GPIO_ACTIVE_LOW>; | |
| 128 | + wp-gpios = <&gpio1 9 GPIO_ACTIVE_HIGH>; | |
| 129 | 129 | status = "okay"; |
| 130 | 130 | }; |
| 131 | 131 | |
| @@ -147,8 +147,8 @@ · 146 unmodified lines | ||
| 147 | 147 | &esdhc3 { |
| 148 | 148 | pinctrl-names = "default"; |
| 149 | 149 | pinctrl-0 = <&pinctrl_esdhc3>; |
| 150 | − cd-gpios = <&gpio3 11 0>; | |
| 151 | − wp-gpios = <&gpio3 12 0>; | |
| 150 | + cd-gpios = <&gpio3 11 GPIO_ACTIVE_LOW>; | |
| 151 | + wp-gpios = <&gpio3 12 GPIO_ACTIVE_HIGH>; | |
| 152 | 152 | bus-width = <8>; |
| 153 | 153 | status = "okay"; |
| 154 | 154 | }; |
| @@ -41,8 +41,8 @@ · 40 unmodified lines | ||
| 41 | 41 | &esdhc1 { |
| 42 | 42 | pinctrl-names = "default"; |
| 43 | 43 | pinctrl-0 = <&pinctrl_esdhc1>; |
| 44 | − cd-gpios = <&gpio3 13 0>; | |
| 45 | − wp-gpios = <&gpio4 11 0>; | |
| 44 | + cd-gpios = <&gpio3 13 GPIO_ACTIVE_LOW>; | |
| 45 | + wp-gpios = <&gpio4 11 GPIO_ACTIVE_HIGH>; | |
| 46 | 46 | status = "okay"; |
| 47 | 47 | }; |
| 48 | 48 | |
| @@ -41,8 +41,8 @@ · 40 unmodified lines | ||
| 41 | 41 | pinctrl-0 = <&pinctrl_esdhc2>, |
| 42 | 42 | <&pinctrl_esdhc2_cdwp>; |
| 43 | 43 | vmmc-supply = <®_3p3v>; |
| 44 | − wp-gpios = <&gpio1 2 0>; | |
| 45 | − cd-gpios = <&gpio1 4 0>; | |
| 44 | + wp-gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>; | |
| 45 | + cd-gpios = <&gpio1 4 GPIO_ACTIVE_LOW>; | |
| 46 | 46 | status = "disabled"; |
| 47 | 47 | }; |
| 48 | 48 | |
| @@ -183,7 +183,7 @@ · 182 unmodified lines | ||
| 183 | 183 | }; |
| 184 | 184 | |
| 185 | 185 | &esdhc1 { |
| 186 | − cd-gpios = <&gpio3 24 GPIO_ACTIVE_HIGH>; | |
| 186 | + cd-gpios = <&gpio3 24 GPIO_ACTIVE_LOW>; | |
| 187 | 187 | fsl,wp-controller; |
| 188 | 188 | pinctrl-names = "default"; |
| 189 | 189 | pinctrl-0 = <&pinctrl_esdhc1>; |
| @@ -191,7 +191,7 @@ · 1 unmodified line | ||
| 191 | 191 | }; |
| 192 | 192 | |
| 193 | 193 | &esdhc2 { |
| 194 | − cd-gpios = <&gpio3 25 GPIO_ACTIVE_HIGH>; | |
| 194 | + cd-gpios = <&gpio3 25 GPIO_ACTIVE_LOW>; | |
| 195 | 195 | fsl,wp-controller; |
| 196 | 196 | pinctrl-names = "default"; |
| 197 | 197 | pinctrl-0 = <&pinctrl_esdhc2>; |
| @@ -119,8 +119,8 @@ · 118 unmodified lines | ||
| 119 | 119 | &esdhc2 { |
| 120 | 120 | pinctrl-names = "default"; |
| 121 | 121 | pinctrl-0 = <&pinctrl_esdhc2>; |
| 122 | − cd-gpios = <&gpio3 25 0>; | |
| 123 | − wp-gpios = <&gpio2 19 0>; | |
| 122 | + cd-gpios = <&gpio3 25 GPIO_ACTIVE_LOW>; | |
| 123 | + wp-gpios = <&gpio2 19 GPIO_ACTIVE_HIGH>; | |
| 124 | 124 | vmmc-supply = <®_3p3v>; |
| 125 | 125 | status = "okay"; |
| 126 | 126 | }; |
| @@ -305,8 +305,8 @@ · 304 unmodified lines | ||
| 305 | 305 | &usdhc2 { |
| 306 | 306 | pinctrl-names = "default"; |
| 307 | 307 | pinctrl-0 = <&pinctrl_usdhc2>; |
| 308 | − cd-gpios = <&gpio1 4 0>; | |
| 309 | − wp-gpios = <&gpio1 2 0>; | |
| 308 | + cd-gpios = <&gpio1 4 GPIO_ACTIVE_LOW>; | |
| 309 | + wp-gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>; | |
| 310 | 310 | vmmc-supply = <®_3p3v>; |
| 311 | 311 | status = "okay"; |
| 312 | 312 | }; |
| @@ -314,8 +314,8 @@ · 1 unmodified line | ||
| 314 | 314 | &usdhc3 { |
| 315 | 315 | pinctrl-names = "default"; |
| 316 | 316 | pinctrl-0 = <&pinctrl_usdhc3>; |
| 317 | − cd-gpios = <&gpio7 0 0>; | |
| 318 | − wp-gpios = <&gpio7 1 0>; | |
| 317 | + cd-gpios = <&gpio7 0 GPIO_ACTIVE_LOW>; | |
| 318 | + wp-gpios = <&gpio7 1 GPIO_ACTIVE_HIGH>; | |
| 319 | 319 | vmmc-supply = <®_3p3v>; |
| 320 | 320 | status = "okay"; |
| 321 | 321 | }; |
| @@ -11,6 +11,7 @@ · 10 unmodified lines | ||
| 11 | 11 | */ |
| 12 | 12 | |
| 13 | 13 | /dts-v1/; |
| 14 | +#include <dt-bindings/gpio/gpio.h> | |
| 14 | 15 | #include "imx6q.dtsi" |
| 15 | 16 | |
| 16 | 17 | / { |
| @@ -196,8 +197,8 @@ · 179 unmodified lines | ||
| 196 | 197 | }; |
| 197 | 198 | |
| 198 | 199 | &usdhc3 { |
| 199 | − cd-gpios = <&gpio6 11 0>; | |
| 200 | − wp-gpios = <&gpio6 14 0>; | |
| 200 | + cd-gpios = <&gpio6 11 GPIO_ACTIVE_LOW>; | |
| 201 | + wp-gpios = <&gpio6 14 GPIO_ACTIVE_HIGH>; | |
| 201 | 202 | vmmc-supply = <®_3p3v>; |
| 202 | 203 | pinctrl-names = "default"; |
| 203 | 204 | pinctrl-0 = <&pinctrl_usdhc3 |
| @@ -7,6 +7,7 @@ · 6 unmodified lines | ||
| 7 | 7 | */ |
| 8 | 8 | |
| 9 | 9 | /dts-v1/; |
| 10 | +#include <dt-bindings/gpio/gpio.h> | |
| 10 | 11 | #include "imx6q.dtsi" |
| 11 | 12 | |
| 12 | 13 | / { |
| @@ -161,7 +162,7 @@ · 148 unmodified lines | ||
| 161 | 162 | pinctrl-names = "default"; |
| 162 | 163 | pinctrl-0 = <&pinctrl_usdhc3>; |
| 163 | 164 | bus-width = <4>; |
| 164 | − cd-gpios = <&gpio6 11 0>; | |
| 165 | + cd-gpios = <&gpio6 11 GPIO_ACTIVE_LOW>; | |
| 165 | 166 | vmmc-supply = <®_3p3v>; |
| 166 | 167 | status = "okay"; |
| 167 | 168 | }; |
| @@ -251,7 +251,7 @@ · 250 unmodified lines | ||
| 251 | 251 | pinctrl-names = "default"; |
| 252 | 252 | pinctrl-0 = <&pinctrl_usdhc2>; |
| 253 | 253 | bus-width = <4>; |
| 254 | − cd-gpios = <&gpio2 2 GPIO_ACTIVE_HIGH>; | |
| 254 | + cd-gpios = <&gpio2 2 GPIO_ACTIVE_LOW>; | |
| 255 | 255 | vmmc-supply = <®_3p3v>; |
| 256 | 256 | status = "okay"; |
| 257 | 257 | }; |
| @@ -260,7 +260,7 @@ · 2 unmodified lines | ||
| 260 | 260 | pinctrl-names = "default"; |
| 261 | 261 | pinctrl-0 = <&pinctrl_usdhc3>; |
| 262 | 262 | bus-width = <4>; |
| 263 | − cd-gpios = <&gpio2 0 GPIO_ACTIVE_HIGH>; | |
| 263 | + cd-gpios = <&gpio2 0 GPIO_ACTIVE_LOW>; | |
| 264 | 264 | wp-gpios = <&gpio2 1 GPIO_ACTIVE_HIGH>; |
| 265 | 265 | vmmc-supply = <®_3p3v>; |
| 266 | 266 | status = "okay"; |
| @@ -173,7 +173,7 @@ · 172 unmodified lines | ||
| 173 | 173 | pinctrl-names = "default"; |
| 174 | 174 | pinctrl-0 = <&pinctrl_usdhc1>; |
| 175 | 175 | vmmc-supply = <®_3p3v>; |
| 176 | − cd-gpios = <&gpio4 7 GPIO_ACTIVE_HIGH>; | |
| 176 | + cd-gpios = <&gpio4 7 GPIO_ACTIVE_LOW>; | |
| 177 | 177 | status = "okay"; |
| 178 | 178 | }; |
| 179 | 179 | |
| @@ -181,7 +181,7 @@ · 1 unmodified line | ||
| 181 | 181 | pinctrl-names = "default"; |
| 182 | 182 | pinctrl-0 = <&pinctrl_usdhc2>; |
| 183 | 183 | vmmc-supply = <®_3p3v>; |
| 184 | − cd-gpios = <&gpio4 8 GPIO_ACTIVE_HIGH>; | |
| 184 | + cd-gpios = <&gpio4 8 GPIO_ACTIVE_LOW>; | |
| 185 | 185 | status = "okay"; |
| 186 | 186 | }; |
| 187 | 187 | |
| @@ -392,7 +392,7 @@ · 391 unmodified lines | ||
| 392 | 392 | &usdhc1 { |
| 393 | 393 | pinctrl-names = "default"; |
| 394 | 394 | pinctrl-0 = <&pinctrl_usdhc1>; |
| 395 | − cd-gpios = <&gpio1 27 GPIO_ACTIVE_HIGH>; | |
| 395 | + cd-gpios = <&gpio1 27 GPIO_ACTIVE_LOW>; | |
| 396 | 396 | no-1-8-v; |
| 397 | 397 | status = "okay"; |
| 398 | 398 | }; |
| @@ -400,7 +400,7 @@ · 1 unmodified line | ||
| 400 | 400 | &usdhc2 { |
| 401 | 401 | pinctrl-names = "default"; |
| 402 | 402 | pinctrl-0 = <&pinctrl_usdhc2>; |
| 403 | − cd-gpios = <&gpio4 5 GPIO_ACTIVE_HIGH>; | |
| 403 | + cd-gpios = <&gpio4 5 GPIO_ACTIVE_LOW>; | |
| 404 | 404 | wp-gpios = <&gpio2 10 GPIO_ACTIVE_HIGH>; |
| 405 | 405 | no-1-8-v; |
| 406 | 406 | status = "okay"; |
| @@ -258,6 +258,6 @@ · 257 unmodified lines | ||
| 258 | 258 | pinctrl-names = "default"; |
| 259 | 259 | pinctrl-0 = <&pinctrl_cubox_i_usdhc2_aux &pinctrl_cubox_i_usdhc2>; |
| 260 | 260 | vmmc-supply = <®_3p3v>; |
| 261 | − cd-gpios = <&gpio1 4 0>; | |
| 261 | + cd-gpios = <&gpio1 4 GPIO_ACTIVE_LOW>; | |
| 262 | 262 | status = "okay"; |
| 263 | 263 | }; |
| @@ -1,3 +1,5 @@ | ||
| 1 | +#include <dt-bindings/gpio/gpio.h> | |
| 2 | + | |
| 1 | 3 | / { |
| 2 | 4 | regulators { |
| 3 | 5 | compatible = "simple-bus"; |
| @@ -181,7 +183,7 @@ · 177 unmodified lines | ||
| 181 | 183 | &usdhc2 { /* module slot */ |
| 182 | 184 | pinctrl-names = "default"; |
| 183 | 185 | pinctrl-0 = <&pinctrl_usdhc2>; |
| 184 | − cd-gpios = <&gpio2 2 0>; | |
| 186 | + cd-gpios = <&gpio2 2 GPIO_ACTIVE_LOW>; | |
| 185 | 187 | status = "okay"; |
| 186 | 188 | }; |
| 187 | 189 | |
| @@ -318,7 +318,7 @@ · 317 unmodified lines | ||
| 318 | 318 | &usdhc3 { |
| 319 | 319 | pinctrl-names = "default"; |
| 320 | 320 | pinctrl-0 = <&pinctrl_usdhc3>; |
| 321 | − cd-gpios = <&gpio7 0 GPIO_ACTIVE_HIGH>; | |
| 321 | + cd-gpios = <&gpio7 0 GPIO_ACTIVE_LOW>; | |
| 322 | 322 | vmmc-supply = <®_3p3v>; |
| 323 | 323 | status = "okay"; |
| 324 | 324 | }; |
| @@ -324,7 +324,7 @@ · 323 unmodified lines | ||
| 324 | 324 | &usdhc3 { |
| 325 | 325 | pinctrl-names = "default"; |
| 326 | 326 | pinctrl-0 = <&pinctrl_usdhc3>; |
| 327 | − cd-gpios = <&gpio7 0 GPIO_ACTIVE_HIGH>; | |
| 327 | + cd-gpios = <&gpio7 0 GPIO_ACTIVE_LOW>; | |
| 328 | 328 | vmmc-supply = <®_3p3v>; |
| 329 | 329 | status = "okay"; |
| 330 | 330 | }; |
| @@ -417,7 +417,7 @@ · 416 unmodified lines | ||
| 417 | 417 | &usdhc3 { |
| 418 | 418 | pinctrl-names = "default"; |
| 419 | 419 | pinctrl-0 = <&pinctrl_usdhc3>; |
| 420 | − cd-gpios = <&gpio7 0 GPIO_ACTIVE_HIGH>; | |
| 420 | + cd-gpios = <&gpio7 0 GPIO_ACTIVE_LOW>; | |
| 421 | 421 | vmmc-supply = <®_3p3v>; |
| 422 | 422 | status = "okay"; |
| 423 | 423 | }; |
| @@ -299,6 +299,6 @@ · 298 unmodified lines | ||
| 299 | 299 | &pinctrl_hummingboard_usdhc2 |
| 300 | 300 | >; |
| 301 | 301 | vmmc-supply = <®_3p3v>; |
| 302 | − cd-gpios = <&gpio1 4 0>; | |
| 302 | + cd-gpios = <&gpio1 4 GPIO_ACTIVE_LOW>; | |
| 303 | 303 | status = "okay"; |
| 304 | 304 | }; |
| @@ -453,7 +453,7 @@ · 452 unmodified lines | ||
| 453 | 453 | &usdhc3 { |
| 454 | 454 | pinctrl-names = "default"; |
| 455 | 455 | pinctrl-0 = <&pinctrl_usdhc3>; |
| 456 | − cd-gpios = <&gpio7 0 0>; | |
| 456 | + cd-gpios = <&gpio7 0 GPIO_ACTIVE_LOW>; | |
| 457 | 457 | vmmc-supply = <®_3p3v>; |
| 458 | 458 | status = "okay"; |
| 459 | 459 | }; |
| @@ -461,7 +461,7 @@ · 1 unmodified line | ||
| 461 | 461 | &usdhc4 { |
| 462 | 462 | pinctrl-names = "default"; |
| 463 | 463 | pinctrl-0 = <&pinctrl_usdhc4>; |
| 464 | − cd-gpios = <&gpio2 6 0>; | |
| 464 | + cd-gpios = <&gpio2 6 GPIO_ACTIVE_LOW>; | |
| 465 | 465 | vmmc-supply = <®_3p3v>; |
| 466 | 466 | status = "okay"; |
| 467 | 467 | }; |
| @@ -409,8 +409,8 @@ · 408 unmodified lines | ||
| 409 | 409 | &usdhc2 { |
| 410 | 410 | pinctrl-names = "default"; |
| 411 | 411 | pinctrl-0 = <&pinctrl_usdhc2>; |
| 412 | − cd-gpios = <&gpio1 4 0>; | |
| 413 | − wp-gpios = <&gpio1 2 0>; | |
| 412 | + cd-gpios = <&gpio1 4 GPIO_ACTIVE_LOW>; | |
| 413 | + wp-gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>; | |
| 414 | 414 | status = "disabled"; |
| 415 | 415 | }; |
| 416 | 416 | |
| @@ -418,7 +418,7 @@ · 1 unmodified line | ||
| 418 | 418 | pinctrl-names = "default"; |
| 419 | 419 | pinctrl-0 = <&pinctrl_usdhc3 |
| 420 | 420 | &pinctrl_usdhc3_cdwp>; |
| 421 | − cd-gpios = <&gpio1 27 0>; | |
| 422 | − wp-gpios = <&gpio1 29 0>; | |
| 421 | + cd-gpios = <&gpio1 27 GPIO_ACTIVE_LOW>; | |
| 422 | + wp-gpios = <&gpio1 29 GPIO_ACTIVE_HIGH>; | |
| 423 | 423 | status = "disabled"; |
| 424 | 424 | }; |
| @@ -342,7 +342,7 @@ · 341 unmodified lines | ||
| 342 | 342 | pinctrl-0 = <&pinctrl_usdhc2>; |
| 343 | 343 | bus-width = <4>; |
| 344 | 344 | cd-gpios = <&gpio2 2 GPIO_ACTIVE_LOW>; |
| 345 | − wp-gpios = <&gpio2 3 GPIO_ACTIVE_LOW>; | |
| 345 | + wp-gpios = <&gpio2 3 GPIO_ACTIVE_HIGH>; | |
| 346 | 346 | status = "okay"; |
| 347 | 347 | }; |
| 348 | 348 | |
| @@ -351,6 +351,6 @@ · 2 unmodified lines | ||
| 351 | 351 | pinctrl-0 = <&pinctrl_usdhc3>; |
| 352 | 352 | bus-width = <4>; |
| 353 | 353 | cd-gpios = <&gpio2 0 GPIO_ACTIVE_LOW>; |
| 354 | − wp-gpios = <&gpio2 1 GPIO_ACTIVE_LOW>; | |
| 354 | + wp-gpios = <&gpio2 1 GPIO_ACTIVE_HIGH>; | |
| 355 | 355 | status = "okay"; |
| 356 | 356 | }; |
| @@ -467,8 +467,8 @@ · 466 unmodified lines | ||
| 467 | 467 | pinctrl-0 = <&pinctrl_usdhc3>; |
| 468 | 468 | pinctrl-1 = <&pinctrl_usdhc3_100mhz>; |
| 469 | 469 | pinctrl-2 = <&pinctrl_usdhc3_200mhz>; |
| 470 | − cd-gpios = <&gpio6 15 0>; | |
| 471 | − wp-gpios = <&gpio1 13 0>; | |
| 470 | + cd-gpios = <&gpio6 15 GPIO_ACTIVE_LOW>; | |
| 471 | + wp-gpios = <&gpio1 13 GPIO_ACTIVE_HIGH>; | |
| 472 | 472 | status = "okay"; |
| 473 | 473 | }; |
| 474 | 474 | |
| @@ -448,8 +448,8 @@ · 447 unmodified lines | ||
| 448 | 448 | &usdhc3 { |
| 449 | 449 | pinctrl-names = "default"; |
| 450 | 450 | pinctrl-0 = <&pinctrl_usdhc3>; |
| 451 | − cd-gpios = <&gpio7 0 0>; | |
| 452 | − wp-gpios = <&gpio7 1 0>; | |
| 451 | + cd-gpios = <&gpio7 0 GPIO_ACTIVE_LOW>; | |
| 452 | + wp-gpios = <&gpio7 1 GPIO_ACTIVE_HIGH>; | |
| 453 | 453 | vmmc-supply = <®_3p3v>; |
| 454 | 454 | status = "okay"; |
| 455 | 455 | }; |
| @@ -457,7 +457,7 @@ · 1 unmodified line | ||
| 457 | 457 | &usdhc4 { |
| 458 | 458 | pinctrl-names = "default"; |
| 459 | 459 | pinctrl-0 = <&pinctrl_usdhc4>; |
| 460 | − cd-gpios = <&gpio2 6 0>; | |
| 460 | + cd-gpios = <&gpio2 6 GPIO_ACTIVE_LOW>; | |
| 461 | 461 | vmmc-supply = <®_3p3v>; |
| 462 | 462 | status = "okay"; |
| 463 | 463 | }; |
| @@ -562,8 +562,8 @@ · 561 unmodified lines | ||
| 562 | 562 | pinctrl-names = "default"; |
| 563 | 563 | pinctrl-0 = <&pinctrl_usdhc2>; |
| 564 | 564 | bus-width = <8>; |
| 565 | − cd-gpios = <&gpio2 2 0>; | |
| 566 | − wp-gpios = <&gpio2 3 0>; | |
| 565 | + cd-gpios = <&gpio2 2 GPIO_ACTIVE_LOW>; | |
| 566 | + wp-gpios = <&gpio2 3 GPIO_ACTIVE_HIGH>; | |
| 567 | 567 | status = "okay"; |
| 568 | 568 | }; |
| 569 | 569 | |
| @@ -571,8 +571,8 @@ · 1 unmodified line | ||
| 571 | 571 | pinctrl-names = "default"; |
| 572 | 572 | pinctrl-0 = <&pinctrl_usdhc3>; |
| 573 | 573 | bus-width = <8>; |
| 574 | − cd-gpios = <&gpio2 0 0>; | |
| 575 | − wp-gpios = <&gpio2 1 0>; | |
| 574 | + cd-gpios = <&gpio2 0 GPIO_ACTIVE_LOW>; | |
| 575 | + wp-gpios = <&gpio2 1 GPIO_ACTIVE_HIGH>; | |
| 576 | 576 | status = "okay"; |
| 577 | 577 | }; |
| 578 | 578 | |
| @@ -680,7 +680,7 @@ · 679 unmodified lines | ||
| 680 | 680 | pinctrl-0 = <&pinctrl_usdhc1>; |
| 681 | 681 | bus-width = <4>; |
| 682 | 682 | no-1-8-v; |
| 683 | − cd-gpios = <&gpio7 2 0>; | |
| 683 | + cd-gpios = <&gpio7 2 GPIO_ACTIVE_LOW>; | |
| 684 | 684 | fsl,wp-controller; |
| 685 | 685 | status = "okay"; |
| 686 | 686 | }; |
| @@ -690,7 +690,7 @@ · 3 unmodified lines | ||
| 690 | 690 | pinctrl-0 = <&pinctrl_usdhc2>; |
| 691 | 691 | bus-width = <4>; |
| 692 | 692 | no-1-8-v; |
| 693 | − cd-gpios = <&gpio7 3 0>; | |
| 693 | + cd-gpios = <&gpio7 3 GPIO_ACTIVE_LOW>; | |
| 694 | 694 | fsl,wp-controller; |
| 695 | 695 | status = "okay"; |
| 696 | 696 | }; |
| @@ -9,6 +9,8 @@ · 8 unmodified lines | ||
| 9 | 9 | * |
| 10 | 10 | */ |
| 11 | 11 | |
| 12 | +#include <dt-bindings/gpio/gpio.h> | |
| 13 | + | |
| 12 | 14 | / { |
| 13 | 15 | regulators { |
| 14 | 16 | compatible = "simple-bus"; |
| @@ -250,13 +252,13 @@ · 235 unmodified lines | ||
| 250 | 252 | &usdhc1 { |
| 251 | 253 | pinctrl-names = "default"; |
| 252 | 254 | pinctrl-0 = <&pinctrl_usdhc1>; |
| 253 | − cd-gpios = <&gpio1 2 0>; | |
| 255 | + cd-gpios = <&gpio1 2 GPIO_ACTIVE_LOW>; | |
| 254 | 256 | status = "okay"; |
| 255 | 257 | }; |
| 256 | 258 | |
| 257 | 259 | &usdhc3 { |
| 258 | 260 | pinctrl-names = "default"; |
| 259 | 261 | pinctrl-0 = <&pinctrl_usdhc3>; |
| 260 | − cd-gpios = <&gpio3 9 0>; | |
| 262 | + cd-gpios = <&gpio3 9 GPIO_ACTIVE_LOW>; | |
| 261 | 263 | status = "okay"; |
| 262 | 264 | }; |
| @@ -181,10 +181,10 @@ · 180 unmodified lines | ||
| 181 | 181 | interrupt-names = "msi"; |
| 182 | 182 | #interrupt-cells = <1>; |
| 183 | 183 | interrupt-map-mask = <0 0 0 0x7>; |
| 184 | − interrupt-map = <0 0 0 1 &intc GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>, | |
| 185 | − <0 0 0 2 &intc GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>, | |
| 186 | − <0 0 0 3 &intc GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>, | |
| 187 | − <0 0 0 4 &intc GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>; | |
| 184 | + interrupt-map = <0 0 0 1 &gpc GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>, | |
| 185 | + <0 0 0 2 &gpc GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>, | |
| 186 | + <0 0 0 3 &gpc GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>, | |
| 187 | + <0 0 0 4 &gpc GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>; | |
| 188 | 188 | clocks = <&clks IMX6QDL_CLK_PCIE_AXI>, |
| 189 | 189 | <&clks IMX6QDL_CLK_LVDS1_GATE>, |
| 190 | 190 | <&clks IMX6QDL_CLK_PCIE_REF_125M>; |
| @@ -617,8 +617,8 @@ · 616 unmodified lines | ||
| 617 | 617 | pinctrl-1 = <&pinctrl_usdhc1_100mhz>; |
| 618 | 618 | pinctrl-2 = <&pinctrl_usdhc1_200mhz>; |
| 619 | 619 | bus-width = <8>; |
| 620 | − cd-gpios = <&gpio4 7 0>; | |
| 621 | − wp-gpios = <&gpio4 6 0>; | |
| 620 | + cd-gpios = <&gpio4 7 GPIO_ACTIVE_LOW>; | |
| 621 | + wp-gpios = <&gpio4 6 GPIO_ACTIVE_HIGH>; | |
| 622 | 622 | status = "okay"; |
| 623 | 623 | }; |
| 624 | 624 | |
| @@ -627,8 +627,8 @@ · 2 unmodified lines | ||
| 627 | 627 | pinctrl-0 = <&pinctrl_usdhc2>; |
| 628 | 628 | pinctrl-1 = <&pinctrl_usdhc2_100mhz>; |
| 629 | 629 | pinctrl-2 = <&pinctrl_usdhc2_200mhz>; |
| 630 | − cd-gpios = <&gpio5 0 0>; | |
| 631 | − wp-gpios = <&gpio4 29 0>; | |
| 630 | + cd-gpios = <&gpio5 0 GPIO_ACTIVE_LOW>; | |
| 631 | + wp-gpios = <&gpio4 29 GPIO_ACTIVE_HIGH>; | |
| 632 | 632 | status = "okay"; |
| 633 | 633 | }; |
| 634 | 634 | |
| @@ -637,6 +637,6 @@ · 2 unmodified lines | ||
| 637 | 637 | pinctrl-0 = <&pinctrl_usdhc3>; |
| 638 | 638 | pinctrl-1 = <&pinctrl_usdhc3_100mhz>; |
| 639 | 639 | pinctrl-2 = <&pinctrl_usdhc3_200mhz>; |
| 640 | − cd-gpios = <&gpio3 22 0>; | |
| 640 | + cd-gpios = <&gpio3 22 GPIO_ACTIVE_LOW>; | |
| 641 | 641 | status = "okay"; |
| 642 | 642 | }; |
| @@ -49,7 +49,7 @@ · 48 unmodified lines | ||
| 49 | 49 | pinctrl-1 = <&pinctrl_usdhc3_100mhz>; |
| 50 | 50 | pinctrl-2 = <&pinctrl_usdhc3_200mhz>; |
| 51 | 51 | bus-width = <8>; |
| 52 | − cd-gpios = <&gpio7 10 GPIO_ACTIVE_HIGH>; | |
| 52 | + cd-gpios = <&gpio7 10 GPIO_ACTIVE_LOW>; | |
| 53 | 53 | wp-gpios = <&gpio3 19 GPIO_ACTIVE_HIGH>; |
| 54 | 54 | keep-power-in-suspend; |
| 55 | 55 | enable-sdio-wakeup; |
| @@ -61,7 +61,7 @@ · 5 unmodified lines | ||
| 61 | 61 | pinctrl-names = "default"; |
| 62 | 62 | pinctrl-0 = <&pinctrl_usdhc4>; |
| 63 | 63 | bus-width = <8>; |
| 64 | − cd-gpios = <&gpio7 11 GPIO_ACTIVE_HIGH>; | |
| 64 | + cd-gpios = <&gpio7 11 GPIO_ACTIVE_LOW>; | |
| 65 | 65 | no-1-8-v; |
| 66 | 66 | keep-power-in-suspend; |
| 67 | 67 | enable-sdio-wakup; |
| @@ -293,7 +293,7 @@ · 292 unmodified lines | ||
| 293 | 293 | pinctrl-1 = <&pinctrl_usdhc3_100mhz>; |
| 294 | 294 | pinctrl-2 = <&pinctrl_usdhc3_200mhz>; |
| 295 | 295 | bus-width = <8>; |
| 296 | − cd-gpios = <&gpio2 10 GPIO_ACTIVE_HIGH>; | |
| 296 | + cd-gpios = <&gpio2 10 GPIO_ACTIVE_LOW>; | |
| 297 | 297 | wp-gpios = <&gpio2 15 GPIO_ACTIVE_HIGH>; |
| 298 | 298 | keep-power-in-suspend; |
| 299 | 299 | enable-sdio-wakeup; |
| @@ -304,7 +304,7 @@ · 4 unmodified lines | ||
| 304 | 304 | &usdhc4 { |
| 305 | 305 | pinctrl-names = "default"; |
| 306 | 306 | pinctrl-0 = <&pinctrl_usdhc4>; |
| 307 | − cd-gpios = <&gpio6 21 GPIO_ACTIVE_HIGH>; | |
| 307 | + cd-gpios = <&gpio6 21 GPIO_ACTIVE_LOW>; | |
| 308 | 308 | wp-gpios = <&gpio6 20 GPIO_ACTIVE_HIGH>; |
| 309 | 309 | status = "okay"; |
| 310 | 310 | }; |
| @@ -234,8 +234,8 @@ · 233 unmodified lines | ||
| 234 | 234 | &usdhc1 { |
| 235 | 235 | pinctrl-names = "default"; |
| 236 | 236 | pinctrl-0 = <&pinctrl_usdhc1>; |
| 237 | − cd-gpios = <&gpio5 0 0>; | |
| 238 | − wp-gpios = <&gpio5 1 0>; | |
| 237 | + cd-gpios = <&gpio5 0 GPIO_ACTIVE_LOW>; | |
| 238 | + wp-gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>; | |
| 239 | 239 | enable-sdio-wakeup; |
| 240 | 240 | keep-power-in-suspend; |
| 241 | 241 | status = "okay"; |
| @@ -13,9 +13,8 @@ clocks { · 12 unmodified lines | ||
| 13 | 13 | #clock-cells = <0>; |
| 14 | 14 | compatible = "ti,keystone,main-pll-clock"; |
| 15 | 15 | clocks = <&refclksys>; |
| 16 | − reg = <0x02620350 4>, <0x02310110 4>; | |
| 17 | − reg-names = "control", "multiplier"; | |
| 18 | − fixed-postdiv = <2>; | |
| 16 | + reg = <0x02620350 4>, <0x02310110 4>, <0x02310108 4>; | |
| 17 | + reg-names = "control", "multiplier", "post-divider"; | |
| 19 | 18 | }; |
| 20 | 19 | |
| 21 | 20 | papllclk: papllclk@2620358 { |
| @@ -131,10 +131,17 @@ · 130 unmodified lines | ||
| 131 | 131 | <GIC_SPI 376 IRQ_TYPE_EDGE_RISING>; |
| 132 | 132 | }; |
| 133 | 133 | }; |
| 134 | + | |
| 135 | + mdio: mdio@24200f00 { | |
| 136 | + compatible = "ti,keystone_mdio", "ti,davinci_mdio"; | |
| 137 | + #address-cells = <1>; | |
| 138 | + #size-cells = <0>; | |
| 139 | + reg = <0x24200f00 0x100>; | |
| 140 | + status = "disabled"; | |
| 141 | + clocks = <&clkcpgmac>; | |
| 142 | + clock-names = "fck"; | |
| 143 | + bus_freq = <2500000>; | |
| 144 | + }; | |
| 134 | 145 | /include/ "k2e-netcp.dtsi" |
| 135 | 146 | }; |
| 136 | 147 | }; |
| 137 | − | |
| 138 | −&mdio { | |
| 139 | − reg = <0x24200f00 0x100>; | |
| 140 | −}; | |
| @@ -22,9 +22,8 @@ clocks { · 21 unmodified lines | ||
| 22 | 22 | #clock-cells = <0>; |
| 23 | 23 | compatible = "ti,keystone,main-pll-clock"; |
| 24 | 24 | clocks = <&refclksys>; |
| 25 | − reg = <0x02620350 4>, <0x02310110 4>; | |
| 26 | − reg-names = "control", "multiplier"; | |
| 27 | − fixed-postdiv = <2>; | |
| 25 | + reg = <0x02620350 4>, <0x02310110 4>, <0x02310108 4>; | |
| 26 | + reg-names = "control", "multiplier", "post-divider"; | |
| 28 | 27 | }; |
| 29 | 28 | |
| 30 | 29 | papllclk: papllclk@2620358 { |
| @@ -98,6 +98,17 @@ · 97 unmodified lines | ||
| 98 | 98 | #gpio-cells = <2>; |
| 99 | 99 | gpio,syscon-dev = <&devctrl 0x25c>; |
| 100 | 100 | }; |
| 101 | + | |
| 102 | + mdio: mdio@02090300 { | |
| 103 | + compatible = "ti,keystone_mdio", "ti,davinci_mdio"; | |
| 104 | + #address-cells = <1>; | |
| 105 | + #size-cells = <0>; | |
| 106 | + reg = <0x02090300 0x100>; | |
| 107 | + status = "disabled"; | |
| 108 | + clocks = <&clkcpgmac>; | |
| 109 | + clock-names = "fck"; | |
| 110 | + bus_freq = <2500000>; | |
| 111 | + }; | |
| 101 | 112 | /include/ "k2hk-netcp.dtsi" |
| 102 | 113 | }; |
| 103 | 114 | }; |
| @@ -22,9 +22,8 @@ clocks { · 21 unmodified lines | ||
| 22 | 22 | #clock-cells = <0>; |
| 23 | 23 | compatible = "ti,keystone,main-pll-clock"; |
| 24 | 24 | clocks = <&refclksys>; |
| 25 | − reg = <0x02620350 4>, <0x02310110 4>; | |
| 26 | − reg-names = "control", "multiplier"; | |
| 27 | − fixed-postdiv = <2>; | |
| 25 | + reg = <0x02620350 4>, <0x02310110 4>, <0x02310108 4>; | |
| 26 | + reg-names = "control", "multiplier", "post-divider"; | |
| 28 | 27 | }; |
| 29 | 28 | |
| 30 | 29 | papllclk: papllclk@2620358 { |
| @@ -29,7 +29,6 @@ · 28 unmodified lines | ||
| 29 | 29 | }; |
| 30 | 30 | |
| 31 | 31 | soc { |
| 32 | − | |
| 33 | 32 | /include/ "k2l-clocks.dtsi" |
| 34 | 33 | |
| 35 | 34 | uart2: serial@02348400 { |
| @@ -79,6 +78,17 @@ · 43 unmodified lines | ||
| 79 | 78 | #gpio-cells = <2>; |
| 80 | 79 | gpio,syscon-dev = <&devctrl 0x24c>; |
| 81 | 80 | }; |
| 81 | + | |
| 82 | + mdio: mdio@26200f00 { | |
| 83 | + compatible = "ti,keystone_mdio", "ti,davinci_mdio"; | |
| 84 | + #address-cells = <1>; | |
| 85 | + #size-cells = <0>; | |
| 86 | + reg = <0x26200f00 0x100>; | |
| 87 | + status = "disabled"; | |
| 88 | + clocks = <&clkcpgmac>; | |
| 89 | + clock-names = "fck"; | |
| 90 | + bus_freq = <2500000>; | |
| 91 | + }; | |
| 82 | 92 | /include/ "k2l-netcp.dtsi" |
| 83 | 93 | }; |
| 84 | 94 | }; |
| @@ -96,7 +106,3 @@ · 11 unmodified lines | ||
| 96 | 106 | /* Pin muxed. Enabled and configured by Bootloader */ |
| 97 | 107 | status = "disabled"; |
| 98 | 108 | }; |
| 99 | − | |
| 100 | −&mdio { | |
| 101 | − reg = <0x26200f00 0x100>; | |
| 102 | −}; | |
| @@ -267,17 +267,6 @@ · 266 unmodified lines | ||
| 267 | 267 | 1 0 0x21000A00 0x00000100>; |
| 268 | 268 | }; |
| 269 | 269 | |
| 270 | − mdio: mdio@02090300 { | |
| 271 | − compatible = "ti,keystone_mdio", "ti,davinci_mdio"; | |
| 272 | − #address-cells = <1>; | |
| 273 | − #size-cells = <0>; | |
| 274 | − reg = <0x02090300 0x100>; | |
| 275 | − status = "disabled"; | |
| 276 | − clocks = <&clkpa>; | |
| 277 | − clock-names = "fck"; | |
| 278 | − bus_freq = <2500000>; | |
| 279 | − }; | |
| 280 | − | |
| 281 | 270 | kirq0: keystone_irq@26202a0 { |
| 282 | 271 | compatible = "ti,keystone-irq"; |
| 283 | 272 | interrupts = <GIC_SPI 4 IRQ_TYPE_EDGE_RISING>; |
| @@ -51,7 +51,8 @@ · 50 unmodified lines | ||
| 51 | 51 | }; |
| 52 | 52 | |
| 53 | 53 | scm_conf: scm_conf@270 { |
| 54 | − compatible = "syscon"; | |
| 54 | + compatible = "syscon", | |
| 55 | + "simple-bus"; | |
| 55 | 56 | reg = <0x270 0x240>; |
| 56 | 57 | #address-cells = <1>; |
| 57 | 58 | #size-cells = <1>; |
| @@ -191,7 +191,8 @@ · 190 unmodified lines | ||
| 191 | 191 | }; |
| 192 | 192 | |
| 193 | 193 | omap4_padconf_global: omap4_padconf_global@5a0 { |
| 194 | − compatible = "syscon"; | |
| 194 | + compatible = "syscon", | |
| 195 | + "simple-bus"; | |
| 195 | 196 | reg = <0x5a0 0x170>; |
| 196 | 197 | #address-cells = <1>; |
| 197 | 198 | #size-cells = <1>; |
| @@ -180,7 +180,8 @@ · 179 unmodified lines | ||
| 180 | 180 | }; |
| 181 | 181 | |
| 182 | 182 | omap5_padconf_global: omap5_padconf_global@5a0 { |
| 183 | − compatible = "syscon"; | |
| 183 | + compatible = "syscon", | |
| 184 | + "simple-bus"; | |
| 184 | 185 | reg = <0x5a0 0xec>; |
| 185 | 186 | #address-cells = <1>; |
| 186 | 187 | #size-cells = <1>; |
| @@ -15,6 +15,33 @@ · 14 unmodified lines | ||
| 15 | 15 | #include "skeleton.dtsi" |
| 16 | 16 | |
| 17 | 17 | / { |
| 18 | + cpus { | |
| 19 | + #address-cells = <1>; | |
| 20 | + #size-cells = <0>; | |
| 21 | + enable-method = "ste,dbx500-smp"; | |
| 22 | + | |
| 23 | + cpu-map { | |
| 24 | + cluster0 { | |
| 25 | + core0 { | |
| 26 | + cpu = <&CPU0>; | |
| 27 | + }; | |
| 28 | + core1 { | |
| 29 | + cpu = <&CPU1>; | |
| 30 | + }; | |
| 31 | + }; | |
| 32 | + }; | |
| 33 | + CPU0: cpu@300 { | |
| 34 | + device_type = "cpu"; | |
| 35 | + compatible = "arm,cortex-a9"; | |
| 36 | + reg = <0x300>; | |
| 37 | + }; | |
| 38 | + CPU1: cpu@301 { | |
| 39 | + device_type = "cpu"; | |
| 40 | + compatible = "arm,cortex-a9"; | |
| 41 | + reg = <0x301>; | |
| 42 | + }; | |
| 43 | + }; | |
| 44 | + | |
| 18 | 45 | soc { |
| 19 | 46 | #address-cells = <1>; |
| 20 | 47 | #size-cells = <1>; |
| @@ -22,32 +49,6 @@ · 1 unmodified line | ||
| 22 | 49 | interrupt-parent = <&intc>; |
| 23 | 50 | ranges; |
| 24 | 51 | |
| 25 | − cpus { | |
| 26 | − #address-cells = <1>; | |
| 27 | − #size-cells = <0>; | |
| 28 | − | |
| 29 | − cpu-map { | |
| 30 | − cluster0 { | |
| 31 | − core0 { | |
| 32 | − cpu = <&CPU0>; | |
| 33 | − }; | |
| 34 | − core1 { | |
| 35 | − cpu = <&CPU1>; | |
| 36 | − }; | |
| 37 | − }; | |
| 38 | − }; | |
| 39 | − CPU0: cpu@0 { | |
| 40 | − device_type = "cpu"; | |
| 41 | − compatible = "arm,cortex-a9"; | |
| 42 | − reg = <0>; | |
| 43 | − }; | |
| 44 | − CPU1: cpu@1 { | |
| 45 | − device_type = "cpu"; | |
| 46 | − compatible = "arm,cortex-a9"; | |
| 47 | − reg = <1>; | |
| 48 | − }; | |
| 49 | − }; | |
| 50 | − | |
| 51 | 52 | ptm@801ae000 { |
| 52 | 53 | compatible = "arm,coresight-etm3x", "arm,primecell"; |
| 53 | 54 | reg = <0x801ae000 0x1000>; |
| @@ -17,6 +17,7 @@ · 16 unmodified lines | ||
| 17 | 17 | }; |
| 18 | 18 | |
| 19 | 19 | aliases { |
| 20 | + serial1 = &uart1; | |
| 20 | 21 | stmpe-i2c0 = &stmpe0; |
| 21 | 22 | stmpe-i2c1 = &stmpe1; |
| 22 | 23 | }; |
| @@ -15,6 +15,10 @@ · 14 unmodified lines | ||
| 15 | 15 | bootargs = "root=/dev/ram0 console=ttyAMA1,115200n8 earlyprintk"; |
| 16 | 16 | }; |
| 17 | 17 | |
| 18 | + aliases { | |
| 19 | + serial1 = &uart1; | |
| 20 | + }; | |
| 21 | + | |
| 18 | 22 | src@101e0000 { |
| 19 | 23 | /* These chrystal drivers are not used on this board */ |
| 20 | 24 | disable-sxtalo; |
| @@ -757,6 +757,7 @@ · 756 unmodified lines | ||
| 757 | 757 | clock-names = "uartclk", "apb_pclk"; |
| 758 | 758 | pinctrl-names = "default"; |
| 759 | 759 | pinctrl-0 = <&uart0_default_mux>; |
| 760 | + status = "disabled"; | |
| 760 | 761 | }; |
| 761 | 762 | |
| 762 | 763 | uart1: uart@101fb000 { |
| @@ -61,6 +61,7 @@ work_pending: · 60 unmodified lines | ||
| 61 | 61 | movlt scno, #(__NR_restart_syscall - __NR_SYSCALL_BASE) |
| 62 | 62 | ldmia sp, {r0 - r6} @ have to reload r0 - r6 |
| 63 | 63 | b local_restart @ ... and off we go |
| 64 | +ENDPROC(ret_fast_syscall) | |
| 64 | 65 | |
| 65 | 66 | /* |
| 66 | 67 | * "slow" syscall return path. "why" tells us if this was a real syscall. |
| @@ -399,6 +399,9 @@ ENTRY(secondary_startup) · 398 unmodified lines | ||
| 399 | 399 | sub lr, r4, r5 @ mmu has been enabled |
| 400 | 400 | add r3, r7, lr |
| 401 | 401 | ldrd r4, [r3, #0] @ get secondary_data.pgdir |
| 402 | +ARM_BE8(eor r4, r4, r5) @ Swap r5 and r4 in BE: | |
| 403 | +ARM_BE8(eor r5, r4, r5) @ it can be done in 3 steps | |
| 404 | +ARM_BE8(eor r4, r4, r5) @ without using a temp reg. | |
| 402 | 405 | ldr r8, [r3, #8] @ get secondary_data.swapper_pg_dir |
| 403 | 406 | badr lr, __enable_mmu @ return address |
| 404 | 407 | mov r13, r12 @ __secondary_switched address |
| @@ -296,7 +296,6 @@ static bool tk_is_cntvct(const struct timekeeper *tk) · 295 unmodified lines | ||
| 296 | 296 | */ |
| 297 | 297 | void update_vsyscall(struct timekeeper *tk) |
| 298 | 298 | { |
| 299 | − struct timespec xtime_coarse; | |
| 300 | 299 | struct timespec64 *wtm = &tk->wall_to_monotonic; |
| 301 | 300 | |
| 302 | 301 | if (!cntvct_ok) { |
| @@ -308,10 +307,10 @@ void update_vsyscall(struct timekeeper *tk) · 5 unmodified lines | ||
| 308 | 307 | |
| 309 | 308 | vdso_write_begin(vdso_data); |
| 310 | 309 | |
| 311 | − xtime_coarse = __current_kernel_time(); | |
| 312 | 310 | vdso_data->tk_is_cntvct = tk_is_cntvct(tk); |
| 313 | − vdso_data->xtime_coarse_sec = xtime_coarse.tv_sec; | |
| 314 | − vdso_data->xtime_coarse_nsec = xtime_coarse.tv_nsec; | |
| 311 | + vdso_data->xtime_coarse_sec = tk->xtime_sec; | |
| 312 | + vdso_data->xtime_coarse_nsec = (u32)(tk->tkr_mono.xtime_nsec >> | |
| 313 | + tk->tkr_mono.shift); | |
| 315 | 314 | vdso_data->wtm_clock_sec = wtm->tv_sec; |
| 316 | 315 | vdso_data->wtm_clock_nsec = wtm->tv_nsec; |
| 317 | 316 | |
| @@ -146,9 +146,8 @@ static __init int exynos4_pm_init_power_domain(void) · 145 unmodified lines | ||
| 146 | 146 | pd->base = of_iomap(np, 0); |
| 147 | 147 | if (!pd->base) { |
| 148 | 148 | pr_warn("%s: failed to map memory\n", __func__); |
| 149 | − kfree(pd->pd.name); | |
| 149 | + kfree_const(pd->pd.name); | |
| 150 | 150 | kfree(pd); |
| 151 | − of_node_put(np); | |
| 152 | 151 | continue; |
| 153 | 152 | } |
| 154 | 153 | |
| @@ -2373,6 +2373,9 @@ static int of_dev_hwmod_lookup(struct device_node *np, · 2372 unmodified lines | ||
| 2373 | 2373 | * registers. This address is needed early so the OCP registers that |
| 2374 | 2374 | * are part of the device's address space can be ioremapped properly. |
| 2375 | 2375 | * |
| 2376 | + * If SYSC access is not needed, the registers will not be remapped | |
| 2377 | + * and non-availability of MPU access is not treated as an error. | |
| 2378 | + * | |
| 2376 | 2379 | * Returns 0 on success, -EINVAL if an invalid hwmod is passed, and |
| 2377 | 2380 | * -ENXIO on absent or invalid register target address space. |
| 2378 | 2381 | */ |
| @@ -2387,6 +2390,11 @@ static int __init _init_mpu_rt_base(struct omap_hwmod *oh, void *data, · 8 unmodified lines | ||
| 2387 | 2390 | |
| 2388 | 2391 | _save_mpu_port_index(oh); |
| 2389 | 2392 | |
| 2393 | + /* if we don't need sysc access we don't need to ioremap */ | |
| 2394 | + if (!oh->class->sysc) | |
| 2395 | + return 0; | |
| 2396 | + | |
| 2397 | + /* we can't continue without MPU PORT if we need sysc access */ | |
| 2390 | 2398 | if (oh->_int_flags & _HWMOD_NO_MPU_PORT) |
| 2391 | 2399 | return -ENXIO; |
| 2392 | 2400 | |
| @@ -2396,8 +2404,10 @@ static int __init _init_mpu_rt_base(struct omap_hwmod *oh, void *data, · 3 unmodified lines | ||
| 2396 | 2404 | oh->name); |
| 2397 | 2405 | |
| 2398 | 2406 | /* Extract the IO space from device tree blob */ |
| 2399 | − if (!np) | |
| 2407 | + if (!np) { | |
| 2408 | + pr_err("omap_hwmod: %s: no dt node\n", oh->name); | |
| 2400 | 2409 | return -ENXIO; |
| 2410 | + } | |
| 2401 | 2411 | |
| 2402 | 2412 | va_start = of_iomap(np, index + oh->mpu_rt_idx); |
| 2403 | 2413 | } else { |
| @@ -2456,13 +2466,11 @@ static int __init _init(struct omap_hwmod *oh, void *data) · 52 unmodified lines | ||
| 2456 | 2466 | oh->name, np->name); |
| 2457 | 2467 | } |
| 2458 | 2468 | |
| 2459 | − if (oh->class->sysc) { | |
| 2460 | − r = _init_mpu_rt_base(oh, NULL, index, np); | |
| 2461 | − if (r < 0) { | |
| 2462 | − WARN(1, "omap_hwmod: %s: doesn't have mpu register target base\n", | |
| 2463 | − oh->name); | |
| 2464 | − return 0; | |
| 2465 | − } | |
| 2469 | + r = _init_mpu_rt_base(oh, NULL, index, np); | |
| 2470 | + if (r < 0) { | |
| 2471 | + WARN(1, "omap_hwmod: %s: doesn't have mpu register target base\n", | |
| 2472 | + oh->name); | |
| 2473 | + return 0; | |
| 2466 | 2474 | } |
| 2467 | 2475 | |
| 2468 | 2476 | r = _init_clocks(oh, NULL); |
| @@ -827,8 +827,7 @@ static struct omap_hwmod_class_sysconfig dra7xx_gpmc_sysc = { · 826 unmodified lines | ||
| 827 | 827 | .syss_offs = 0x0014, |
| 828 | 828 | .sysc_flags = (SYSC_HAS_AUTOIDLE | SYSC_HAS_SIDLEMODE | |
| 829 | 829 | SYSC_HAS_SOFTRESET | SYSS_HAS_RESET_STATUS), |
| 830 | − .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART | | |
| 831 | − SIDLE_SMART_WKUP), | |
| 830 | + .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), | |
| 832 | 831 | .sysc_fields = &omap_hwmod_sysc_type1, |
| 833 | 832 | }; |
| 834 | 833 | |
| @@ -844,7 +843,7 @@ static struct omap_hwmod dra7xx_gpmc_hwmod = { · 9 unmodified lines | ||
| 844 | 843 | .class = &dra7xx_gpmc_hwmod_class, |
| 845 | 844 | .clkdm_name = "l3main1_clkdm", |
| 846 | 845 | /* Skip reset for CONFIG_OMAP_GPMC_DEBUG for bootloader timings */ |
| 847 | − .flags = HWMOD_SWSUP_SIDLE | DEBUG_OMAP_GPMC_HWMOD_FLAGS, | |
| 846 | + .flags = DEBUG_OMAP_GPMC_HWMOD_FLAGS, | |
| 848 | 847 | .main_clk = "l3_iclk_div", |
| 849 | 848 | .prcm = { |
| 850 | 849 | .omap4 = { |
| @@ -74,32 +74,52 @@ struct jit_ctx { · 73 unmodified lines | ||
| 74 | 74 | |
| 75 | 75 | int bpf_jit_enable __read_mostly; |
| 76 | 76 | |
| 77 | −static u64 jit_get_skb_b(struct sk_buff *skb, unsigned offset) | |
| 77 | +static inline int call_neg_helper(struct sk_buff *skb, int offset, void *ret, | |
| 78 | + unsigned int size) | |
| 79 | +{ | |
| 80 | + void *ptr = bpf_internal_load_pointer_neg_helper(skb, offset, size); | |
| 81 | + | |
| 82 | + if (!ptr) | |
| 83 | + return -EFAULT; | |
| 84 | + memcpy(ret, ptr, size); | |
| 85 | + return 0; | |
| 86 | +} | |
| 87 | + | |
| 88 | +static u64 jit_get_skb_b(struct sk_buff *skb, int offset) | |
| 78 | 89 | { |
| 79 | 90 | u8 ret; |
| 80 | 91 | int err; |
| 81 | 92 | |
| 82 | − err = skb_copy_bits(skb, offset, &ret, 1); | |
| 93 | + if (offset < 0) | |
| 94 | + err = call_neg_helper(skb, offset, &ret, 1); | |
| 95 | + else | |
| 96 | + err = skb_copy_bits(skb, offset, &ret, 1); | |
| 83 | 97 | |
| 84 | 98 | return (u64)err << 32 | ret; |
| 85 | 99 | } |
| 86 | 100 | |
| 87 | −static u64 jit_get_skb_h(struct sk_buff *skb, unsigned offset) | |
| 101 | +static u64 jit_get_skb_h(struct sk_buff *skb, int offset) | |
| 88 | 102 | { |
| 89 | 103 | u16 ret; |
| 90 | 104 | int err; |
| 91 | 105 | |
| 92 | − err = skb_copy_bits(skb, offset, &ret, 2); | |
| 106 | + if (offset < 0) | |
| 107 | + err = call_neg_helper(skb, offset, &ret, 2); | |
| 108 | + else | |
| 109 | + err = skb_copy_bits(skb, offset, &ret, 2); | |
| 93 | 110 | |
| 94 | 111 | return (u64)err << 32 | ntohs(ret); |
| 95 | 112 | } |
| 96 | 113 | |
| 97 | −static u64 jit_get_skb_w(struct sk_buff *skb, unsigned offset) | |
| 114 | +static u64 jit_get_skb_w(struct sk_buff *skb, int offset) | |
| 98 | 115 | { |
| 99 | 116 | u32 ret; |
| 100 | 117 | int err; |
| 101 | 118 | |
| 102 | − err = skb_copy_bits(skb, offset, &ret, 4); | |
| 119 | + if (offset < 0) | |
| 120 | + err = call_neg_helper(skb, offset, &ret, 4); | |
| 121 | + else | |
| 122 | + err = skb_copy_bits(skb, offset, &ret, 4); | |
| 103 | 123 | |
| 104 | 124 | return (u64)err << 32 | ntohl(ret); |
| 105 | 125 | } |
| @@ -536,9 +556,6 @@ static int build_body(struct jit_ctx *ctx) · 430 unmodified lines | ||
| 536 | 556 | case BPF_LD | BPF_B | BPF_ABS: |
| 537 | 557 | load_order = 0; |
| 538 | 558 | load: |
| 539 | − /* the interpreter will deal with the negative K */ | |
| 540 | − if ((int)k < 0) | |
| 541 | − return -ENOTSUPP; | |
| 542 | 559 | emit_mov_i(r_off, k, ctx); |
| 543 | 560 | load_common: |
| 544 | 561 | ctx->seen |= SEEN_DATA | SEEN_CALL; |
| @@ -547,12 +564,24 @@ load_common: · 2 unmodified lines | ||
| 547 | 564 | emit(ARM_SUB_I(r_scratch, r_skb_hl, |
| 548 | 565 | 1 << load_order), ctx); |
| 549 | 566 | emit(ARM_CMP_R(r_scratch, r_off), ctx); |
| 550 | − condt = ARM_COND_HS; | |
| 567 | + condt = ARM_COND_GE; | |
| 551 | 568 | } else { |
| 552 | 569 | emit(ARM_CMP_R(r_skb_hl, r_off), ctx); |
| 553 | 570 | condt = ARM_COND_HI; |
| 554 | 571 | } |
| 555 | 572 | |
| 573 | + /* | |
| 574 | + * test for negative offset, only if we are | |
| 575 | + * currently scheduled to take the fast | |
| 576 | + * path. this will update the flags so that | |
| 577 | + * the slowpath instruction are ignored if the | |
| 578 | + * offset is negative. | |
| 579 | + * | |
| 580 | + * for loard_order == 0 the HI condition will | |
| 581 | + * make loads at offset 0 take the slow path too. | |
| 582 | + */ | |
| 583 | + _emit(condt, ARM_CMP_I(r_off, 0), ctx); | |
| 584 | + | |
| 556 | 585 | _emit(condt, ARM_ADD_R(r_scratch, r_off, r_skb_data), |
| 557 | 586 | ctx); |
| 558 | 587 | |
| @@ -860,9 +889,11 @@ b_epilogue: · 301 unmodified lines | ||
| 860 | 889 | off = offsetof(struct sk_buff, vlan_tci); |
| 861 | 890 | emit(ARM_LDRH_I(r_A, r_skb, off), ctx); |
| 862 | 891 | if (code == (BPF_ANC | SKF_AD_VLAN_TAG)) |
| 863 | − OP_IMM3(ARM_AND, r_A, r_A, VLAN_VID_MASK, ctx); | |
| 864 | − else | |
| 865 | − OP_IMM3(ARM_AND, r_A, r_A, VLAN_TAG_PRESENT, ctx); | |
| 892 | + OP_IMM3(ARM_AND, r_A, r_A, ~VLAN_TAG_PRESENT, ctx); | |
| 893 | + else { | |
| 894 | + OP_IMM3(ARM_LSR, r_A, r_A, 12, ctx); | |
| 895 | + OP_IMM3(ARM_AND, r_A, r_A, 0x1, ctx); | |
| 896 | + } | |
| 866 | 897 | break; |
| 867 | 898 | case BPF_ANC | SKF_AD_QUEUE: |
| 868 | 899 | ctx->seen |= SEEN_SKB; |
| @@ -14,7 +14,7 @@ VDSO_LDFLAGS += -Wl,-z,max-page-size=4096 -Wl,-z,common-page-size=4096 · 13 unmodified lines | ||
| 14 | 14 | VDSO_LDFLAGS += -nostdlib -shared |
| 15 | 15 | VDSO_LDFLAGS += $(call cc-ldoption, -Wl$(comma)--hash-style=sysv) |
| 16 | 16 | VDSO_LDFLAGS += $(call cc-ldoption, -Wl$(comma)--build-id) |
| 17 | −VDSO_LDFLAGS += $(call cc-option, -fuse-ld=bfd) | |
| 17 | +VDSO_LDFLAGS += $(call cc-ldoption, -fuse-ld=bfd) | |
| 18 | 18 | |
| 19 | 19 | obj-$(CONFIG_VDSO) += vdso.o |
| 20 | 20 | extra-$(CONFIG_VDSO) += vdso.lds |
| @@ -823,7 +823,7 @@ · 822 unmodified lines | ||
| 823 | 823 | device_type = "dma"; |
| 824 | 824 | reg = <0x0 0x1f270000 0x0 0x10000>, |
| 825 | 825 | <0x0 0x1f200000 0x0 0x10000>, |
| 826 | − <0x0 0x1b008000 0x0 0x2000>, | |
| 826 | + <0x0 0x1b000000 0x0 0x400000>, | |
| 827 | 827 | <0x0 0x1054a000 0x0 0x100>; |
| 828 | 828 | interrupts = <0x0 0x82 0x4>, |
| 829 | 829 | <0x0 0xb8 0x4>, |
| @@ -122,12 +122,12 @@ static int __init uefi_init(void) · 121 unmodified lines | ||
| 122 | 122 | |
| 123 | 123 | /* Show what we know for posterity */ |
| 124 | 124 | c16 = early_memremap(efi_to_phys(efi.systab->fw_vendor), |
| 125 | − sizeof(vendor)); | |
| 125 | + sizeof(vendor) * sizeof(efi_char16_t)); | |
| 126 | 126 | if (c16) { |
| 127 | 127 | for (i = 0; i < (int) sizeof(vendor) - 1 && *c16; ++i) |
| 128 | 128 | vendor[i] = c16[i]; |
| 129 | 129 | vendor[i] = '\0'; |
| 130 | − early_memunmap(c16, sizeof(vendor)); | |
| 130 | + early_memunmap(c16, sizeof(vendor) * sizeof(efi_char16_t)); | |
| 131 | 131 | } |
| 132 | 132 | |
| 133 | 133 | pr_info("EFI v%u.%.02u by %s\n", |
| @@ -585,7 +585,8 @@ ENDPROC(el0_irq) · 584 unmodified lines | ||
| 585 | 585 | * |
| 586 | 586 | */ |
| 587 | 587 | ENTRY(cpu_switch_to) |
| 588 | − add x8, x0, #THREAD_CPU_CONTEXT | |
| 588 | + mov x10, #THREAD_CPU_CONTEXT | |
| 589 | + add x8, x0, x10 | |
| 589 | 590 | mov x9, sp |
| 590 | 591 | stp x19, x20, [x8], #16 // store callee-saved registers |
| 591 | 592 | stp x21, x22, [x8], #16 |
| @@ -594,7 +595,7 @@ ENTRY(cpu_switch_to) · 2 unmodified lines | ||
| 594 | 595 | stp x27, x28, [x8], #16 |
| 595 | 596 | stp x29, x9, [x8], #16 |
| 596 | 597 | str lr, [x8] |
| 597 | − add x8, x1, #THREAD_CPU_CONTEXT | |
| 598 | + add x8, x1, x10 | |
| 598 | 599 | ldp x19, x20, [x8], #16 // restore callee-saved registers |
| 599 | 600 | ldp x21, x22, [x8], #16 |
| 600 | 601 | ldp x23, x24, [x8], #16 |
| @@ -61,7 +61,7 @@ void __init init_IRQ(void) · 60 unmodified lines | ||
| 61 | 61 | static bool migrate_one_irq(struct irq_desc *desc) |
| 62 | 62 | { |
| 63 | 63 | struct irq_data *d = irq_desc_get_irq_data(desc); |
| 64 | − const struct cpumask *affinity = d->affinity; | |
| 64 | + const struct cpumask *affinity = irq_data_get_affinity_mask(d); | |
| 65 | 65 | struct irq_chip *c; |
| 66 | 66 | bool ret = false; |
| 67 | 67 | |
| @@ -81,7 +81,7 @@ static bool migrate_one_irq(struct irq_desc *desc) · 13 unmodified lines | ||
| 81 | 81 | if (!c->irq_set_affinity) |
| 82 | 82 | pr_debug("IRQ%u: unable to set affinity\n", d->irq); |
| 83 | 83 | else if (c->irq_set_affinity(d, affinity, false) == IRQ_SET_MASK_OK && ret) |
| 84 | − cpumask_copy(d->affinity, affinity); | |
| 84 | + cpumask_copy(irq_data_get_affinity_mask(d), affinity); | |
| 85 | 85 | |
| 86 | 86 | return ret; |
| 87 | 87 | } |
| @@ -168,7 +168,8 @@ int copy_siginfo_to_user32(compat_siginfo_t __user *to, const siginfo_t *from) · 167 unmodified lines | ||
| 168 | 168 | * Other callers might not initialize the si_lsb field, |
| 169 | 169 | * so check explicitely for the right codes here. |
| 170 | 170 | */ |
| 171 | − if (from->si_code == BUS_MCEERR_AR || from->si_code == BUS_MCEERR_AO) | |
| 171 | + if (from->si_signo == SIGBUS && | |
| 172 | + (from->si_code == BUS_MCEERR_AR || from->si_code == BUS_MCEERR_AO)) | |
| 172 | 173 | err |= __put_user(from->si_addr_lsb, &to->si_addr_lsb); |
| 173 | 174 | #endif |
| 174 | 175 | break; |
| @@ -201,8 +202,6 @@ int copy_siginfo_to_user32(compat_siginfo_t __user *to, const siginfo_t *from) · 26 unmodified lines | ||
| 201 | 202 | |
| 202 | 203 | int copy_siginfo_from_user32(siginfo_t *to, compat_siginfo_t __user *from) |
| 203 | 204 | { |
| 204 | − memset(to, 0, sizeof *to); | |
| 205 | − | |
| 206 | 205 | if (copy_from_user(to, from, __ARCH_SI_PREAMBLE_SIZE) || |
| 207 | 206 | copy_from_user(to->_sifields._pad, |
| 208 | 207 | from->_sifields._pad, SI_PAD_SIZE)) |
| @@ -199,16 +199,15 @@ up_fail: · 198 unmodified lines | ||
| 199 | 199 | */ |
| 200 | 200 | void update_vsyscall(struct timekeeper *tk) |
| 201 | 201 | { |
| 202 | − struct timespec xtime_coarse; | |
| 203 | 202 | u32 use_syscall = strcmp(tk->tkr_mono.clock->name, "arch_sys_counter"); |
| 204 | 203 | |
| 205 | 204 | ++vdso_data->tb_seq_count; |
| 206 | 205 | smp_wmb(); |
| 207 | 206 | |
| 208 | − xtime_coarse = __current_kernel_time(); | |
| 209 | 207 | vdso_data->use_syscall = use_syscall; |
| 210 | − vdso_data->xtime_coarse_sec = xtime_coarse.tv_sec; | |
| 211 | − vdso_data->xtime_coarse_nsec = xtime_coarse.tv_nsec; | |
| 208 | + vdso_data->xtime_coarse_sec = tk->xtime_sec; | |
| 209 | + vdso_data->xtime_coarse_nsec = tk->tkr_mono.xtime_nsec >> | |
| 210 | + tk->tkr_mono.shift; | |
| 212 | 211 | vdso_data->wtm_clock_sec = tk->wall_to_monotonic.tv_sec; |
| 213 | 212 | vdso_data->wtm_clock_nsec = tk->wall_to_monotonic.tv_nsec; |
| 214 | 213 | |
| @@ -18,6 +18,7 @@ · 17 unmodified lines | ||
| 18 | 18 | |
| 19 | 19 | #include <mach/pm.h> |
| 20 | 20 | |
| 21 | +static bool disable_cpu_idle_poll; | |
| 21 | 22 | |
| 22 | 23 | static cycle_t read_cycle_count(struct clocksource *cs) |
| 23 | 24 | { |
| @@ -80,45 +81,45 @@ static int comparator_next_event(unsigned long delta, · 56 unmodified lines | ||
| 80 | 81 | return 0; |
| 81 | 82 | } |
| 82 | 83 | |
| 83 | −static void comparator_mode(enum clock_event_mode mode, | |
| 84 | − struct clock_event_device *evdev) | |
| 84 | +static int comparator_shutdown(struct clock_event_device *evdev) | |
| 85 | 85 | { |
| 86 | − switch (mode) { | |
| 87 | − case CLOCK_EVT_MODE_ONESHOT: | |
| 88 | − pr_debug("%s: start\n", evdev->name); | |
| 89 | − /* FALLTHROUGH */ | |
| 90 | − case CLOCK_EVT_MODE_RESUME: | |
| 86 | + pr_debug("%s: %s\n", __func__, evdev->name); | |
| 87 | + sysreg_write(COMPARE, 0); | |
| 88 | + | |
| 89 | + if (disable_cpu_idle_poll) { | |
| 90 | + disable_cpu_idle_poll = false; | |
| 91 | 91 | /* |
| 92 | − * If we're using the COUNT and COMPARE registers we | |
| 93 | − * need to force idle poll. | |
| 92 | + * Only disable idle poll if we have forced that | |
| 93 | + * in a previous call. | |
| 94 | 94 | */ |
| 95 | − cpu_idle_poll_ctrl(true); | |
| 96 | − break; | |
| 97 | − case CLOCK_EVT_MODE_UNUSED: | |
| 98 | − case CLOCK_EVT_MODE_SHUTDOWN: | |
| 99 | − sysreg_write(COMPARE, 0); | |
| 100 | − pr_debug("%s: stop\n", evdev->name); | |
| 101 | − if (evdev->mode == CLOCK_EVT_MODE_ONESHOT || | |
| 102 | − evdev->mode == CLOCK_EVT_MODE_RESUME) { | |
| 103 | − /* | |
| 104 | − * Only disable idle poll if we have forced that | |
| 105 | − * in a previous call. | |
| 106 | − */ | |
| 107 | − cpu_idle_poll_ctrl(false); | |
| 108 | − } | |
| 109 | − break; | |
| 110 | − default: | |
| 111 | − BUG(); | |
| 95 | + cpu_idle_poll_ctrl(false); | |
| 112 | 96 | } |
| 97 | + return 0; | |
| 98 | +} | |
| 99 | + | |
| 100 | +static int comparator_set_oneshot(struct clock_event_device *evdev) | |
| 101 | +{ | |
| 102 | + pr_debug("%s: %s\n", __func__, evdev->name); | |
| 103 | + | |
| 104 | + disable_cpu_idle_poll = true; | |
| 105 | + /* | |
| 106 | + * If we're using the COUNT and COMPARE registers we | |
| 107 | + * need to force idle poll. | |
| 108 | + */ | |
| 109 | + cpu_idle_poll_ctrl(true); | |
| 110 | + | |
| 111 | + return 0; | |
| 113 | 112 | } |
| 114 | 113 | |
| 115 | 114 | static struct clock_event_device comparator = { |
| 116 | − .name = "avr32_comparator", | |
| 117 | − .features = CLOCK_EVT_FEAT_ONESHOT, | |
| 118 | − .shift = 16, | |
| 119 | − .rating = 50, | |
| 120 | − .set_next_event = comparator_next_event, | |
| 121 | − .set_mode = comparator_mode, | |
| 115 | + .name = "avr32_comparator", | |
| 116 | + .features = CLOCK_EVT_FEAT_ONESHOT, | |
| 117 | + .shift = 16, | |
| 118 | + .rating = 50, | |
| 119 | + .set_next_event = comparator_next_event, | |
| 120 | + .set_state_shutdown = comparator_shutdown, | |
| 121 | + .set_state_oneshot = comparator_set_oneshot, | |
| 122 | + .tick_resume = comparator_set_oneshot, | |
| 122 | 123 | }; |
| 123 | 124 | |
| 124 | 125 | void read_persistent_clock(struct timespec *ts) |
| @@ -80,6 +80,9 @@ int clk_enable(struct clk *clk) · 79 unmodified lines | ||
| 80 | 80 | { |
| 81 | 81 | unsigned long flags; |
| 82 | 82 | |
| 83 | + if (!clk) | |
| 84 | + return 0; | |
| 85 | + | |
| 83 | 86 | spin_lock_irqsave(&clk_lock, flags); |
| 84 | 87 | __clk_enable(clk); |
| 85 | 88 | spin_unlock_irqrestore(&clk_lock, flags); |
| @@ -106,6 +109,9 @@ void clk_disable(struct clk *clk) · 20 unmodified lines | ||
| 106 | 109 | { |
| 107 | 110 | unsigned long flags; |
| 108 | 111 | |
| 112 | + if (IS_ERR_OR_NULL(clk)) | |
| 113 | + return; | |
| 114 | + | |
| 109 | 115 | spin_lock_irqsave(&clk_lock, flags); |
| 110 | 116 | __clk_disable(clk); |
| 111 | 117 | spin_unlock_irqrestore(&clk_lock, flags); |
| @@ -117,6 +123,9 @@ unsigned long clk_get_rate(struct clk *clk) · 5 unmodified lines | ||
| 117 | 123 | unsigned long flags; |
| 118 | 124 | unsigned long rate; |
| 119 | 125 | |
| 126 | + if (!clk) | |
| 127 | + return 0; | |
| 128 | + | |
| 120 | 129 | spin_lock_irqsave(&clk_lock, flags); |
| 121 | 130 | rate = clk->get_rate(clk); |
| 122 | 131 | spin_unlock_irqrestore(&clk_lock, flags); |
| @@ -129,6 +138,9 @@ long clk_round_rate(struct clk *clk, unsigned long rate) · 6 unmodified lines | ||
| 129 | 138 | { |
| 130 | 139 | unsigned long flags, actual_rate; |
| 131 | 140 | |
| 141 | + if (!clk) | |
| 142 | + return 0; | |
| 143 | + | |
| 132 | 144 | if (!clk->set_rate) |
| 133 | 145 | return -ENOSYS; |
| 134 | 146 | |
| @@ -145,6 +157,9 @@ int clk_set_rate(struct clk *clk, unsigned long rate) · 10 unmodified lines | ||
| 145 | 157 | unsigned long flags; |
| 146 | 158 | long ret; |
| 147 | 159 | |
| 160 | + if (!clk) | |
| 161 | + return 0; | |
| 162 | + | |
| 148 | 163 | if (!clk->set_rate) |
| 149 | 164 | return -ENOSYS; |
| 150 | 165 | |
| @@ -161,6 +176,9 @@ int clk_set_parent(struct clk *clk, struct clk *parent) · 10 unmodified lines | ||
| 161 | 176 | unsigned long flags; |
| 162 | 177 | int ret; |
| 163 | 178 | |
| 179 | + if (!clk) | |
| 180 | + return 0; | |
| 181 | + | |
| 164 | 182 | if (!clk->set_parent) |
| 165 | 183 | return -ENOSYS; |
| 166 | 184 | |
| @@ -174,7 +192,7 @@ EXPORT_SYMBOL(clk_set_parent); · 7 unmodified lines | ||
| 174 | 192 | |
| 175 | 193 | struct clk *clk_get_parent(struct clk *clk) |
| 176 | 194 | { |
| 177 | − return clk->parent; | |
| 195 | + return !clk ? NULL : clk->parent; | |
| 178 | 196 | } |
| 179 | 197 | EXPORT_SYMBOL(clk_get_parent); |
| 180 | 198 | |
| @@ -174,6 +174,11 @@ static inline void _writel(unsigned long l, unsigned long addr) · 173 unmodified lines | ||
| 174 | 174 | #define iowrite16 writew |
| 175 | 175 | #define iowrite32 writel |
| 176 | 176 | |
| 177 | +#define ioread16be(addr) be16_to_cpu(readw(addr)) | |
| 178 | +#define ioread32be(addr) be32_to_cpu(readl(addr)) | |
| 179 | +#define iowrite16be(v, addr) writew(cpu_to_be16(v), (addr)) | |
| 180 | +#define iowrite32be(v, addr) writel(cpu_to_be32(v), (addr)) | |
| 181 | + | |
| 177 | 182 | #define mmiowb() |
| 178 | 183 | |
| 179 | 184 | #define flush_write_buffers() do { } while (0) /* M32R_FIXME */ |
| @@ -151,7 +151,6 @@ config BMIPS_GENERIC · 150 unmodified lines | ||
| 151 | 151 | select BCM7120_L2_IRQ |
| 152 | 152 | select BRCMSTB_L2_IRQ |
| 153 | 153 | select IRQ_MIPS_CPU |
| 154 | − select RAW_IRQ_ACCESSORS | |
| 155 | 154 | select DMA_NONCOHERENT |
| 156 | 155 | select SYS_SUPPORTS_32BIT_KERNEL |
| 157 | 156 | select SYS_SUPPORTS_LITTLE_ENDIAN |
| @@ -190,6 +190,7 @@ int get_c0_perfcount_int(void) · 189 unmodified lines | ||
| 190 | 190 | { |
| 191 | 191 | return ATH79_MISC_IRQ(5); |
| 192 | 192 | } |
| 193 | +EXPORT_SYMBOL_GPL(get_c0_perfcount_int); | |
| 193 | 194 | |
| 194 | 195 | unsigned int get_c0_compare_int(void) |
| 195 | 196 | { |
| @@ -42,7 +42,7 @@ static irqreturn_t mailbox_interrupt(int irq, void *dev_id) · 41 unmodified lines | ||
| 42 | 42 | cvmx_write_csr(CVMX_CIU_MBOX_CLRX(coreid), action); |
| 43 | 43 | |
| 44 | 44 | if (action & SMP_CALL_FUNCTION) |
| 45 | − smp_call_function_interrupt(); | |
| 45 | + generic_smp_call_function_interrupt(); | |
| 46 | 46 | if (action & SMP_RESCHEDULE_YOURSELF) |
| 47 | 47 | scheduler_ipi(); |
| 48 | 48 | |
| @@ -1,10 +0,0 @@ | ||
| 1 | −#ifndef __ASM_MACH_BCM63XX_DMA_COHERENCE_H | |
| 2 | −#define __ASM_MACH_BCM63XX_DMA_COHERENCE_H | |
| 3 | − | |
| 4 | −#include <asm/bmips.h> | |
| 5 | − | |
| 6 | −#define plat_post_dma_flush bmips_post_dma_flush | |
| 7 | − | |
| 8 | −#include <asm/mach-generic/dma-coherence.h> | |
| 9 | − | |
| 10 | −#endif /* __ASM_MACH_BCM63XX_DMA_COHERENCE_H */ | |
| @@ -182,8 +182,39 @@ static inline void set_pte(pte_t *ptep, pte_t pteval) · 181 unmodified lines | ||
| 182 | 182 | * Make sure the buddy is global too (if it's !none, |
| 183 | 183 | * it better already be global) |
| 184 | 184 | */ |
| 185 | +#ifdef CONFIG_SMP | |
| 186 | + /* | |
| 187 | + * For SMP, multiple CPUs can race, so we need to do | |
| 188 | + * this atomically. | |
| 189 | + */ | |
| 190 | +#ifdef CONFIG_64BIT | |
| 191 | +#define LL_INSN "lld" | |
| 192 | +#define SC_INSN "scd" | |
| 193 | +#else /* CONFIG_32BIT */ | |
| 194 | +#define LL_INSN "ll" | |
| 195 | +#define SC_INSN "sc" | |
| 196 | +#endif | |
| 197 | + unsigned long page_global = _PAGE_GLOBAL; | |
| 198 | + unsigned long tmp; | |
| 199 | + | |
| 200 | + __asm__ __volatile__ ( | |
| 201 | + " .set push\n" | |
| 202 | + " .set noreorder\n" | |
| 203 | + "1: " LL_INSN " %[tmp], %[buddy]\n" | |
| 204 | + " bnez %[tmp], 2f\n" | |
| 205 | + " or %[tmp], %[tmp], %[global]\n" | |
| 206 | + " " SC_INSN " %[tmp], %[buddy]\n" | |
| 207 | + " beqz %[tmp], 1b\n" | |
| 208 | + " nop\n" | |
| 209 | + "2:\n" | |
| 210 | + " .set pop" | |
| 211 | + : [buddy] "+m" (buddy->pte), | |
| 212 | + [tmp] "=&r" (tmp) | |
| 213 | + : [global] "r" (page_global)); | |
| 214 | +#else /* !CONFIG_SMP */ | |
| 185 | 215 | if (pte_none(*buddy)) |
| 186 | 216 | pte_val(*buddy) = pte_val(*buddy) | _PAGE_GLOBAL; |
| 217 | +#endif /* CONFIG_SMP */ | |
| 187 | 218 | } |
| 188 | 219 | #endif |
| 189 | 220 | } |
| @@ -83,8 +83,6 @@ static inline void __cpu_die(unsigned int cpu) · 82 unmodified lines | ||
| 83 | 83 | extern void play_dead(void); |
| 84 | 84 | #endif |
| 85 | 85 | |
| 86 | −extern asmlinkage void smp_call_function_interrupt(void); | |
| 87 | − | |
| 88 | 86 | static inline void arch_send_call_function_single_ipi(int cpu) |
| 89 | 87 | { |
| 90 | 88 | extern struct plat_smp_ops *mp_ops; /* private */ |
| @@ -152,6 +152,31 @@ · 151 unmodified lines | ||
| 152 | 152 | .set noreorder |
| 153 | 153 | bltz k0, 8f |
| 154 | 154 | move k1, sp |
| 155 | +#ifdef CONFIG_EVA | |
| 156 | + /* | |
| 157 | + * Flush interAptiv's Return Prediction Stack (RPS) by writing | |
| 158 | + * EntryHi. Toggling Config7.RPS is slower and less portable. | |
| 159 | + * | |
| 160 | + * The RPS isn't automatically flushed when exceptions are | |
| 161 | + * taken, which can result in kernel mode speculative accesses | |
| 162 | + * to user addresses if the RPS mispredicts. That's harmless | |
| 163 | + * when user and kernel share the same address space, but with | |
| 164 | + * EVA the same user segments may be unmapped to kernel mode, | |
| 165 | + * even containing sensitive MMIO regions or invalid memory. | |
| 166 | + * | |
| 167 | + * This can happen when the kernel sets the return address to | |
| 168 | + * ret_from_* and jr's to the exception handler, which looks | |
| 169 | + * more like a tail call than a function call. If nested calls | |
| 170 | + * don't evict the last user address in the RPS, it will | |
| 171 | + * mispredict the return and fetch from a user controlled | |
| 172 | + * address into the icache. | |
| 173 | + * | |
| 174 | + * More recent EVA-capable cores with MAAR to restrict | |
| 175 | + * speculative accesses aren't affected. | |
| 176 | + */ | |
| 177 | + MFC0 k0, CP0_ENTRYHI | |
| 178 | + MTC0 k0, CP0_ENTRYHI | |
| 179 | +#endif | |
| 155 | 180 | .set reorder |
| 156 | 181 | /* Called from user mode, new stack. */ |
| 157 | 182 | get_saved_sp |
| @@ -154,7 +154,7 @@ asmlinkage long mipsmt_sys_sched_getaffinity(pid_t pid, unsigned int len, · 153 unmodified lines | ||
| 154 | 154 | unsigned long __user *user_mask_ptr) |
| 155 | 155 | { |
| 156 | 156 | unsigned int real_len; |
| 157 | − cpumask_t mask; | |
| 157 | + cpumask_t allowed, mask; | |
| 158 | 158 | int retval; |
| 159 | 159 | struct task_struct *p; |
| 160 | 160 | |
| @@ -173,7 +173,8 @@ asmlinkage long mipsmt_sys_sched_getaffinity(pid_t pid, unsigned int len, · 12 unmodified lines | ||
| 173 | 173 | if (retval) |
| 174 | 174 | goto out_unlock; |
| 175 | 175 | |
| 176 | − cpumask_and(&mask, &p->thread.user_cpus_allowed, cpu_possible_mask); | |
| 176 | + cpumask_or(&allowed, &p->thread.user_cpus_allowed, &p->cpus_allowed); | |
| 177 | + cpumask_and(&mask, &allowed, cpu_active_mask); | |
| 177 | 178 | |
| 178 | 179 | out_unlock: |
| 179 | 180 | read_unlock(&tasklist_lock); |
| @@ -38,7 +38,7 @@ char *mips_get_machine_name(void) · 37 unmodified lines | ||
| 38 | 38 | return mips_machine_name; |
| 39 | 39 | } |
| 40 | 40 | |
| 41 | −#ifdef CONFIG_OF | |
| 41 | +#ifdef CONFIG_USE_OF | |
| 42 | 42 | void __init early_init_dt_add_memory_arch(u64 base, u64 size) |
| 43 | 43 | { |
| 44 | 44 | return add_memory_region(base, size, BOOT_MEM_RAM); |
| @@ -24,7 +24,7 @@ LEAF(relocate_new_kernel) · 23 unmodified lines | ||
| 24 | 24 | |
| 25 | 25 | process_entry: |
| 26 | 26 | PTR_L s2, (s0) |
| 27 | − PTR_ADD s0, s0, SZREG | |
| 27 | + PTR_ADDIU s0, s0, SZREG | |
| 28 | 28 | |
| 29 | 29 | /* |
| 30 | 30 | * In case of a kdump/crash kernel, the indirection page is not |
| @@ -61,9 +61,9 @@ copy_word: · 30 unmodified lines | ||
| 61 | 61 | /* copy page word by word */ |
| 62 | 62 | REG_L s5, (s2) |
| 63 | 63 | REG_S s5, (s4) |
| 64 | − PTR_ADD s4, s4, SZREG | |
| 65 | − PTR_ADD s2, s2, SZREG | |
| 66 | − LONG_SUB s6, s6, 1 | |
| 64 | + PTR_ADDIU s4, s4, SZREG | |
| 65 | + PTR_ADDIU s2, s2, SZREG | |
| 66 | + LONG_ADDIU s6, s6, -1 | |
| 67 | 67 | beq s6, zero, process_entry |
| 68 | 68 | b copy_word |
| 69 | 69 | b process_entry |
| @@ -80,7 +80,7 @@ syscall_trace_entry: · 79 unmodified lines | ||
| 80 | 80 | SAVE_STATIC |
| 81 | 81 | move s0, t2 |
| 82 | 82 | move a0, sp |
| 83 | − daddiu a1, v0, __NR_64_Linux | |
| 83 | + move a1, v0 | |
| 84 | 84 | jal syscall_trace_enter |
| 85 | 85 | |
| 86 | 86 | bltz v0, 2f # seccomp failed? Skip syscall |
| @@ -72,7 +72,7 @@ n32_syscall_trace_entry: · 71 unmodified lines | ||
| 72 | 72 | SAVE_STATIC |
| 73 | 73 | move s0, t2 |
| 74 | 74 | move a0, sp |
| 75 | − daddiu a1, v0, __NR_N32_Linux | |
| 75 | + move a1, v0 | |
| 76 | 76 | jal syscall_trace_enter |
| 77 | 77 | |
| 78 | 78 | bltz v0, 2f # seccomp failed? Skip syscall |
| @@ -409,8 +409,6 @@ int copy_siginfo_to_user32(compat_siginfo_t __user *to, const siginfo_t *from) · 408 unmodified lines | ||
| 409 | 409 | |
| 410 | 410 | int copy_siginfo_from_user32(siginfo_t *to, compat_siginfo_t __user *from) |
| 411 | 411 | { |
| 412 | − memset(to, 0, sizeof *to); | |
| 413 | − | |
| 414 | 412 | if (copy_from_user(to, from, 3*sizeof(int)) || |
| 415 | 413 | copy_from_user(to->_sifields._pad, |
| 416 | 414 | from->_sifields._pad, SI_PAD_SIZE32)) |
| @@ -284,7 +284,7 @@ static irqreturn_t bmips5000_ipi_interrupt(int irq, void *dev_id) · 283 unmodified lines | ||
| 284 | 284 | if (action == 0) |
| 285 | 285 | scheduler_ipi(); |
| 286 | 286 | else |
| 287 | − smp_call_function_interrupt(); | |
| 287 | + generic_smp_call_function_interrupt(); | |
| 288 | 288 | |
| 289 | 289 | return IRQ_HANDLED; |
| 290 | 290 | } |
| @@ -336,7 +336,7 @@ static irqreturn_t bmips43xx_ipi_interrupt(int irq, void *dev_id) · 45 unmodified lines | ||
| 336 | 336 | if (action & SMP_RESCHEDULE_YOURSELF) |
| 337 | 337 | scheduler_ipi(); |
| 338 | 338 | if (action & SMP_CALL_FUNCTION) |
| 339 | − smp_call_function_interrupt(); | |
| 339 | + generic_smp_call_function_interrupt(); | |
| 340 | 340 | |
| 341 | 341 | return IRQ_HANDLED; |
| 342 | 342 | } |
| @@ -192,16 +192,6 @@ asmlinkage void start_secondary(void) · 191 unmodified lines | ||
| 192 | 192 | cpu_startup_entry(CPUHP_ONLINE); |
| 193 | 193 | } |
| 194 | 194 | |
| 195 | −/* | |
| 196 | − * Call into both interrupt handlers, as we share the IPI for them | |
| 197 | − */ | |
| 198 | −void __irq_entry smp_call_function_interrupt(void) | |
| 199 | −{ | |
| 200 | − irq_enter(); | |
| 201 | − generic_smp_call_function_interrupt(); | |
| 202 | − irq_exit(); | |
| 203 | −} | |
| 204 | − | |
| 205 | 195 | static void stop_this_cpu(void *dummy) |
| 206 | 196 | { |
| 207 | 197 | /* |
| @@ -192,6 +192,7 @@ static void show_stacktrace(struct task_struct *task, · 191 unmodified lines | ||
| 192 | 192 | void show_stack(struct task_struct *task, unsigned long *sp) |
| 193 | 193 | { |
| 194 | 194 | struct pt_regs regs; |
| 195 | + mm_segment_t old_fs = get_fs(); | |
| 195 | 196 | if (sp) { |
| 196 | 197 | regs.regs[29] = (unsigned long)sp; |
| 197 | 198 | regs.regs[31] = 0; |
| @@ -210,7 +211,13 @@ void show_stack(struct task_struct *task, unsigned long *sp) · 12 unmodified lines | ||
| 210 | 211 | prepare_frametrace(®s); |
| 211 | 212 | } |
| 212 | 213 | } |
| 214 | + /* | |
| 215 | + * show_stack() deals exclusively with kernel mode, so be sure to access | |
| 216 | + * the stack in the kernel (not user) address space. | |
| 217 | + */ | |
| 218 | + set_fs(KERNEL_DS); | |
| 213 | 219 | show_stacktrace(task, ®s); |
| 220 | + set_fs(old_fs); | |
| 214 | 221 | } |
| 215 | 222 | |
| 216 | 223 | static void show_code(unsigned int __user *pc) |
| @@ -1519,6 +1526,7 @@ asmlinkage void do_mcheck(struct pt_regs *regs) · 1302 unmodified lines | ||
| 1519 | 1526 | const int field = 2 * sizeof(unsigned long); |
| 1520 | 1527 | int multi_match = regs->cp0_status & ST0_TS; |
| 1521 | 1528 | enum ctx_state prev_state; |
| 1529 | + mm_segment_t old_fs = get_fs(); | |
| 1522 | 1530 | |
| 1523 | 1531 | prev_state = exception_enter(); |
| 1524 | 1532 | show_regs(regs); |
| @@ -1540,8 +1548,13 @@ asmlinkage void do_mcheck(struct pt_regs *regs) · 15 unmodified lines | ||
| 1540 | 1548 | dump_tlb_all(); |
| 1541 | 1549 | } |
| 1542 | 1550 | |
| 1551 | + if (!user_mode(regs)) | |
| 1552 | + set_fs(KERNEL_DS); | |
| 1553 | + | |
| 1543 | 1554 | show_code((unsigned int __user *) regs->cp0_epc); |
| 1544 | 1555 | |
| 1556 | + set_fs(old_fs); | |
| 1557 | + | |
| 1545 | 1558 | /* |
| 1546 | 1559 | * Some chips may have other causes of machine check (e.g. SB1 |
| 1547 | 1560 | * graduation timer) |
| @@ -438,7 +438,7 @@ do { \ · 437 unmodified lines | ||
| 438 | 438 | : "memory"); \ |
| 439 | 439 | } while(0) |
| 440 | 440 | |
| 441 | −#define StoreDW(addr, value, res) \ | |
| 441 | +#define _StoreDW(addr, value, res) \ | |
| 442 | 442 | do { \ |
| 443 | 443 | __asm__ __volatile__ ( \ |
| 444 | 444 | ".set\tpush\n\t" \ |
| @@ -293,7 +293,7 @@ static irqreturn_t ipi_resched_interrupt(int irq, void *dev_id) · 292 unmodified lines | ||
| 293 | 293 | |
| 294 | 294 | static irqreturn_t ipi_call_interrupt(int irq, void *dev_id) |
| 295 | 295 | { |
| 296 | − smp_call_function_interrupt(); | |
| 296 | + generic_smp_call_function_interrupt(); | |
| 297 | 297 | return IRQ_HANDLED; |
| 298 | 298 | } |
| 299 | 299 | |
| @@ -466,6 +466,7 @@ int get_c0_perfcount_int(void) · 166 unmodified lines | ||
| 466 | 466 | { |
| 467 | 467 | return ltq_perfcount_irq; |
| 468 | 468 | } |
| 469 | +EXPORT_SYMBOL_GPL(get_c0_perfcount_int); | |
| 469 | 470 | |
| 470 | 471 | unsigned int get_c0_compare_int(void) |
| 471 | 472 | { |
| @@ -266,8 +266,11 @@ void loongson3_ipi_interrupt(struct pt_regs *regs) · 265 unmodified lines | ||
| 266 | 266 | if (action & SMP_RESCHEDULE_YOURSELF) |
| 267 | 267 | scheduler_ipi(); |
| 268 | 268 | |
| 269 | − if (action & SMP_CALL_FUNCTION) | |
| 270 | − smp_call_function_interrupt(); | |
| 269 | + if (action & SMP_CALL_FUNCTION) { | |
| 270 | + irq_enter(); | |
| 271 | + generic_smp_call_function_interrupt(); | |
| 272 | + irq_exit(); | |
| 273 | + } | |
| 271 | 274 | |
| 272 | 275 | if (action & SMP_ASK_C0COUNT) { |
| 273 | 276 | BUG_ON(cpu != 0); |
| @@ -160,18 +160,18 @@ static inline void setup_protection_map(void) · 159 unmodified lines | ||
| 160 | 160 | protection_map[1] = __pgprot(_page_cachable_default | _PAGE_PRESENT | _PAGE_NO_EXEC); |
| 161 | 161 | protection_map[2] = __pgprot(_page_cachable_default | _PAGE_PRESENT | _PAGE_NO_EXEC | _PAGE_NO_READ); |
| 162 | 162 | protection_map[3] = __pgprot(_page_cachable_default | _PAGE_PRESENT | _PAGE_NO_EXEC); |
| 163 | − protection_map[4] = __pgprot(_page_cachable_default | _PAGE_PRESENT | _PAGE_NO_READ); | |
| 163 | + protection_map[4] = __pgprot(_page_cachable_default | _PAGE_PRESENT); | |
| 164 | 164 | protection_map[5] = __pgprot(_page_cachable_default | _PAGE_PRESENT); |
| 165 | − protection_map[6] = __pgprot(_page_cachable_default | _PAGE_PRESENT | _PAGE_NO_READ); | |
| 165 | + protection_map[6] = __pgprot(_page_cachable_default | _PAGE_PRESENT); | |
| 166 | 166 | protection_map[7] = __pgprot(_page_cachable_default | _PAGE_PRESENT); |
| 167 | 167 | |
| 168 | 168 | protection_map[8] = __pgprot(_page_cachable_default | _PAGE_PRESENT | _PAGE_NO_EXEC | _PAGE_NO_READ); |
| 169 | 169 | protection_map[9] = __pgprot(_page_cachable_default | _PAGE_PRESENT | _PAGE_NO_EXEC); |
| 170 | 170 | protection_map[10] = __pgprot(_page_cachable_default | _PAGE_PRESENT | _PAGE_NO_EXEC | _PAGE_WRITE | _PAGE_NO_READ); |
| 171 | 171 | protection_map[11] = __pgprot(_page_cachable_default | _PAGE_PRESENT | _PAGE_NO_EXEC | _PAGE_WRITE); |
| 172 | − protection_map[12] = __pgprot(_page_cachable_default | _PAGE_PRESENT | _PAGE_NO_READ); | |
| 172 | + protection_map[12] = __pgprot(_page_cachable_default | _PAGE_PRESENT); | |
| 173 | 173 | protection_map[13] = __pgprot(_page_cachable_default | _PAGE_PRESENT); |
| 174 | − protection_map[14] = __pgprot(_page_cachable_default | _PAGE_PRESENT | _PAGE_WRITE | _PAGE_NO_READ); | |
| 174 | + protection_map[14] = __pgprot(_page_cachable_default | _PAGE_PRESENT | _PAGE_WRITE); | |
| 175 | 175 | protection_map[15] = __pgprot(_page_cachable_default | _PAGE_PRESENT | _PAGE_WRITE); |
| 176 | 176 | |
| 177 | 177 | } else { |
| @@ -133,7 +133,8 @@ good_area: · 132 unmodified lines | ||
| 133 | 133 | #endif |
| 134 | 134 | goto bad_area; |
| 135 | 135 | } |
| 136 | − if (!(vma->vm_flags & VM_READ)) { | |
| 136 | + if (!(vma->vm_flags & VM_READ) && | |
| 137 | + exception_epc(regs) != address) { | |
| 137 | 138 | #if 0 |
| 138 | 139 | pr_notice("Cpu%d[%s:%d:%0*lx:%ld:%0*lx] RI violation\n", |
| 139 | 140 | raw_smp_processor_id(), |
| @@ -222,7 +222,7 @@ static irqreturn_t ipi_resched_interrupt(int irq, void *dev_id) · 221 unmodified lines | ||
| 222 | 222 | |
| 223 | 223 | static irqreturn_t ipi_call_interrupt(int irq, void *dev_id) |
| 224 | 224 | { |
| 225 | − smp_call_function_interrupt(); | |
| 225 | + generic_smp_call_function_interrupt(); | |
| 226 | 226 | |
| 227 | 227 | return IRQ_HANDLED; |
| 228 | 228 | } |
| @@ -154,6 +154,7 @@ int get_c0_perfcount_int(void) · 153 unmodified lines | ||
| 154 | 154 | |
| 155 | 155 | return mips_cpu_perf_irq; |
| 156 | 156 | } |
| 157 | +EXPORT_SYMBOL_GPL(get_c0_perfcount_int); | |
| 157 | 158 | |
| 158 | 159 | unsigned int get_c0_compare_int(void) |
| 159 | 160 | { |
| @@ -171,14 +172,17 @@ unsigned int get_c0_compare_int(void) · 11 unmodified lines | ||
| 171 | 172 | |
| 172 | 173 | static void __init init_rtc(void) |
| 173 | 174 | { |
| 174 | − /* stop the clock whilst setting it up */ | |
| 175 | − CMOS_WRITE(RTC_SET | RTC_24H, RTC_CONTROL); | |
| 175 | + unsigned char freq, ctrl; | |
| 176 | 176 | |
| 177 | − /* 32KHz time base */ | |
| 178 | − CMOS_WRITE(RTC_REF_CLCK_32KHZ, RTC_FREQ_SELECT); | |
| 177 | + /* Set 32KHz time base if not already set */ | |
| 178 | + freq = CMOS_READ(RTC_FREQ_SELECT); | |
| 179 | + if ((freq & RTC_DIV_CTL) != RTC_REF_CLCK_32KHZ) | |
| 180 | + CMOS_WRITE(RTC_REF_CLCK_32KHZ, RTC_FREQ_SELECT); | |
| 179 | 181 | |
| 180 | − /* start the clock */ | |
| 181 | − CMOS_WRITE(RTC_24H, RTC_CONTROL); | |
| 182 | + /* Ensure SET bit is clear so RTC can run */ | |
| 183 | + ctrl = CMOS_READ(RTC_CONTROL); | |
| 184 | + if (ctrl & RTC_SET) | |
| 185 | + CMOS_WRITE(ctrl & ~RTC_SET, RTC_CONTROL); | |
| 182 | 186 | } |
| 183 | 187 | |
| 184 | 188 | void __init plat_time_init(void) |
| @@ -77,6 +77,7 @@ int get_c0_perfcount_int(void) · 76 unmodified lines | ||
| 77 | 77 | return MIPS_CPU_IRQ_BASE + cp0_perfcount_irq; |
| 78 | 78 | return -1; |
| 79 | 79 | } |
| 80 | +EXPORT_SYMBOL_GPL(get_c0_perfcount_int); | |
| 80 | 81 | |
| 81 | 82 | unsigned int get_c0_compare_int(void) |
| 82 | 83 | { |
| @@ -86,7 +86,7 @@ void nlm_smp_function_ipi_handler(unsigned int irq, struct irq_desc *desc) · 85 unmodified lines | ||
| 86 | 86 | { |
| 87 | 87 | clear_c0_eimr(irq); |
| 88 | 88 | ack_c0_eirr(irq); |
| 89 | − smp_call_function_interrupt(); | |
| 89 | + generic_smp_call_function_interrupt(); | |
| 90 | 90 | set_c0_eimr(irq); |
| 91 | 91 | } |
| 92 | 92 | |
| @@ -114,7 +114,7 @@ static irqreturn_t paravirt_reched_interrupt(int irq, void *dev_id) · 113 unmodified lines | ||
| 114 | 114 | |
| 115 | 115 | static irqreturn_t paravirt_function_interrupt(int irq, void *dev_id) |
| 116 | 116 | { |
| 117 | − smp_call_function_interrupt(); | |
| 117 | + generic_smp_call_function_interrupt(); | |
| 118 | 118 | return IRQ_HANDLED; |
| 119 | 119 | } |
| 120 | 120 | |
| @@ -26,6 +26,7 @@ int get_c0_perfcount_int(void) · 25 unmodified lines | ||
| 26 | 26 | { |
| 27 | 27 | return gic_get_c0_perfcount_int(); |
| 28 | 28 | } |
| 29 | +EXPORT_SYMBOL_GPL(get_c0_perfcount_int); | |
| 29 | 30 | |
| 30 | 31 | int get_c0_fdc_int(void) |
| 31 | 32 | { |
| @@ -44,7 +44,7 @@ static irqreturn_t ipi_resched_interrupt(int irq, void *dev_id) · 43 unmodified lines | ||
| 44 | 44 | |
| 45 | 45 | static irqreturn_t ipi_call_interrupt(int irq, void *dev_id) |
| 46 | 46 | { |
| 47 | − smp_call_function_interrupt(); | |
| 47 | + generic_smp_call_function_interrupt(); | |
| 48 | 48 | |
| 49 | 49 | return IRQ_HANDLED; |
| 50 | 50 | } |
| @@ -89,6 +89,7 @@ int get_c0_perfcount_int(void) · 88 unmodified lines | ||
| 89 | 89 | { |
| 90 | 90 | return rt_perfcount_irq; |
| 91 | 91 | } |
| 92 | +EXPORT_SYMBOL_GPL(get_c0_perfcount_int); | |
| 92 | 93 | |
| 93 | 94 | unsigned int get_c0_compare_int(void) |
| 94 | 95 | { |
| @@ -107,10 +107,14 @@ static void ip27_do_irq_mask0(void) · 106 unmodified lines | ||
| 107 | 107 | scheduler_ipi(); |
| 108 | 108 | } else if (pend0 & (1UL << CPU_CALL_A_IRQ)) { |
| 109 | 109 | LOCAL_HUB_CLR_INTR(CPU_CALL_A_IRQ); |
| 110 | − smp_call_function_interrupt(); | |
| 110 | + irq_enter(); | |
| 111 | + generic_smp_call_function_interrupt(); | |
| 112 | + irq_exit(); | |
| 111 | 113 | } else if (pend0 & (1UL << CPU_CALL_B_IRQ)) { |
| 112 | 114 | LOCAL_HUB_CLR_INTR(CPU_CALL_B_IRQ); |
| 113 | − smp_call_function_interrupt(); | |
| 115 | + irq_enter(); | |
| 116 | + generic_smp_call_function_interrupt(); | |
| 117 | + irq_exit(); | |
| 114 | 118 | } else |
| 115 | 119 | #endif |
| 116 | 120 | { |
| @@ -29,8 +29,6 @@ · 28 unmodified lines | ||
| 29 | 29 | #include <asm/sibyte/bcm1480_regs.h> |
| 30 | 30 | #include <asm/sibyte/bcm1480_int.h> |
| 31 | 31 | |
| 32 | −extern void smp_call_function_interrupt(void); | |
| 33 | − | |
| 34 | 32 | /* |
| 35 | 33 | * These are routines for dealing with the bcm1480 smp capabilities |
| 36 | 34 | * independent of board/firmware |
| @@ -184,6 +182,9 @@ void bcm1480_mailbox_interrupt(void) · 147 unmodified lines | ||
| 184 | 182 | if (action & SMP_RESCHEDULE_YOURSELF) |
| 185 | 183 | scheduler_ipi(); |
| 186 | 184 | |
| 187 | − if (action & SMP_CALL_FUNCTION) | |
| 188 | − smp_call_function_interrupt(); | |
| 185 | + if (action & SMP_CALL_FUNCTION) { | |
| 186 | + irq_enter(); | |
| 187 | + generic_smp_call_function_interrupt(); | |
| 188 | + irq_exit(); | |
| 189 | + } | |
| 189 | 190 | } |
| @@ -172,6 +172,9 @@ void sb1250_mailbox_interrupt(void) · 171 unmodified lines | ||
| 172 | 172 | if (action & SMP_RESCHEDULE_YOURSELF) |
| 173 | 173 | scheduler_ipi(); |
| 174 | 174 | |
| 175 | − if (action & SMP_CALL_FUNCTION) | |
| 176 | − smp_call_function_interrupt(); | |
| 175 | + if (action & SMP_CALL_FUNCTION) { | |
| 176 | + irq_enter(); | |
| 177 | + generic_smp_call_function_interrupt(); | |
| 178 | + irq_exit(); | |
| 179 | + } | |
| 177 | 180 | } |
| @@ -966,8 +966,6 @@ int copy_siginfo_to_user32(struct compat_siginfo __user *d, const siginfo_t *s) · 965 unmodified lines | ||
| 966 | 966 | |
| 967 | 967 | int copy_siginfo_from_user32(siginfo_t *to, struct compat_siginfo __user *from) |
| 968 | 968 | { |
| 969 | − memset(to, 0, sizeof *to); | |
| 970 | − | |
| 971 | 969 | if (copy_from_user(to, from, 3*sizeof(int)) || |
| 972 | 970 | copy_from_user(to->_sifields._pad, |
| 973 | 971 | from->_sifields._pad, SI_PAD_SIZE32)) |
| @@ -1478,7 +1478,7 @@ static int pnv_eeh_next_error(struct eeh_pe **pe) · 1477 unmodified lines | ||
| 1478 | 1478 | } |
| 1479 | 1479 | |
| 1480 | 1480 | /* Unmask the event */ |
| 1481 | − if (eeh_enabled()) | |
| 1481 | + if (ret == EEH_NEXT_ERR_NONE && eeh_enabled()) | |
| 1482 | 1482 | enable_irq(eeh_event_irq); |
| 1483 | 1483 | |
| 1484 | 1484 | return ret; |
| @@ -2220,7 +2220,7 @@ static void pnv_pci_ioda_setup_opal_tce_kill(struct pnv_phb *phb) · 2219 unmodified lines | ||
| 2220 | 2220 | |
| 2221 | 2221 | static __be64 *pnv_pci_ioda2_table_do_alloc_pages(int nid, unsigned shift, |
| 2222 | 2222 | unsigned levels, unsigned long limit, |
| 2223 | − unsigned long *current_offset) | |
| 2223 | + unsigned long *current_offset, unsigned long *total_allocated) | |
| 2224 | 2224 | { |
| 2225 | 2225 | struct page *tce_mem = NULL; |
| 2226 | 2226 | __be64 *addr, *tmp; |
| @@ -2236,6 +2236,7 @@ static __be64 *pnv_pci_ioda2_table_do_alloc_pages(int nid, unsigned shift, · 9 unmodified lines | ||
| 2236 | 2236 | } |
| 2237 | 2237 | addr = page_address(tce_mem); |
| 2238 | 2238 | memset(addr, 0, allocated); |
| 2239 | + *total_allocated += allocated; | |
| 2239 | 2240 | |
| 2240 | 2241 | --levels; |
| 2241 | 2242 | if (!levels) { |
| @@ -2245,7 +2246,7 @@ static __be64 *pnv_pci_ioda2_table_do_alloc_pages(int nid, unsigned shift, · 3 unmodified lines | ||
| 2245 | 2246 | |
| 2246 | 2247 | for (i = 0; i < entries; ++i) { |
| 2247 | 2248 | tmp = pnv_pci_ioda2_table_do_alloc_pages(nid, shift, |
| 2248 | − levels, limit, current_offset); | |
| 2249 | + levels, limit, current_offset, total_allocated); | |
| 2249 | 2250 | if (!tmp) |
| 2250 | 2251 | break; |
| 2251 | 2252 | |
| @@ -2267,7 +2268,7 @@ static long pnv_pci_ioda2_table_alloc_pages(int nid, __u64 bus_offset, · 15 unmodified lines | ||
| 2267 | 2268 | struct iommu_table *tbl) |
| 2268 | 2269 | { |
| 2269 | 2270 | void *addr; |
| 2270 | − unsigned long offset = 0, level_shift; | |
| 2271 | + unsigned long offset = 0, level_shift, total_allocated = 0; | |
| 2271 | 2272 | const unsigned window_shift = ilog2(window_size); |
| 2272 | 2273 | unsigned entries_shift = window_shift - page_shift; |
| 2273 | 2274 | unsigned table_shift = max_t(unsigned, entries_shift + 3, PAGE_SHIFT); |
| @@ -2286,7 +2287,7 @@ static long pnv_pci_ioda2_table_alloc_pages(int nid, __u64 bus_offset, · 12 unmodified lines | ||
| 2286 | 2287 | |
| 2287 | 2288 | /* Allocate TCE table */ |
| 2288 | 2289 | addr = pnv_pci_ioda2_table_do_alloc_pages(nid, level_shift, |
| 2289 | − levels, tce_table_size, &offset); | |
| 2290 | + levels, tce_table_size, &offset, &total_allocated); | |
| 2290 | 2291 | |
| 2291 | 2292 | /* addr==NULL means that the first level allocation failed */ |
| 2292 | 2293 | if (!addr) |
| @@ -2308,7 +2309,7 @@ static long pnv_pci_ioda2_table_alloc_pages(int nid, __u64 bus_offset, · 15 unmodified lines | ||
| 2308 | 2309 | page_shift); |
| 2309 | 2310 | tbl->it_level_size = 1ULL << (level_shift - 3); |
| 2310 | 2311 | tbl->it_indirect_levels = levels - 1; |
| 2311 | − tbl->it_allocated_size = offset; | |
| 2312 | + tbl->it_allocated_size = total_allocated; | |
| 2312 | 2313 | |
| 2313 | 2314 | pr_devel("Created TCE table: ws=%08llx ts=%lx @%08llx\n", |
| 2314 | 2315 | window_size, tce_table_size, bus_offset); |
| @@ -23,15 +23,15 @@ · 22 unmodified lines | ||
| 23 | 23 | |
| 24 | 24 | int main(void) |
| 25 | 25 | { |
| 26 | − DEFINE(__THREAD_info, offsetof(struct task_struct, stack)); | |
| 27 | − DEFINE(__THREAD_ksp, offsetof(struct task_struct, thread.ksp)); | |
| 28 | − DEFINE(__THREAD_mm_segment, offsetof(struct task_struct, thread.mm_segment)); | |
| 29 | − BLANK(); | |
| 26 | + DEFINE(__TASK_thread_info, offsetof(struct task_struct, stack)); | |
| 27 | + DEFINE(__TASK_thread, offsetof(struct task_struct, thread)); | |
| 30 | 28 | DEFINE(__TASK_pid, offsetof(struct task_struct, pid)); |
| 31 | 29 | BLANK(); |
| 32 | − DEFINE(__THREAD_per_cause, offsetof(struct task_struct, thread.per_event.cause)); | |
| 33 | − DEFINE(__THREAD_per_address, offsetof(struct task_struct, thread.per_event.address)); | |
| 34 | − DEFINE(__THREAD_per_paid, offsetof(struct task_struct, thread.per_event.paid)); | |
| 30 | + DEFINE(__THREAD_ksp, offsetof(struct thread_struct, ksp)); | |
| 31 | + DEFINE(__THREAD_per_cause, offsetof(struct thread_struct, per_event.cause)); | |
| 32 | + DEFINE(__THREAD_per_address, offsetof(struct thread_struct, per_event.address)); | |
| 33 | + DEFINE(__THREAD_per_paid, offsetof(struct thread_struct, per_event.paid)); | |
| 34 | + DEFINE(__THREAD_trap_tdb, offsetof(struct thread_struct, trap_tdb)); | |
| 35 | 35 | BLANK(); |
| 36 | 36 | DEFINE(__TI_task, offsetof(struct thread_info, task)); |
| 37 | 37 | DEFINE(__TI_flags, offsetof(struct thread_info, flags)); |
| @@ -176,7 +176,6 @@ int main(void) · 138 unmodified lines | ||
| 176 | 176 | DEFINE(__LC_VDSO_PER_CPU, offsetof(struct _lowcore, vdso_per_cpu_data)); |
| 177 | 177 | DEFINE(__LC_GMAP, offsetof(struct _lowcore, gmap)); |
| 178 | 178 | DEFINE(__LC_PGM_TDB, offsetof(struct _lowcore, pgm_tdb)); |
| 179 | − DEFINE(__THREAD_trap_tdb, offsetof(struct task_struct, thread.trap_tdb)); | |
| 180 | 179 | DEFINE(__GMAP_ASCE, offsetof(struct gmap, asce)); |
| 181 | 180 | DEFINE(__SIE_PROG0C, offsetof(struct kvm_s390_sie_block, prog0c)); |
| 182 | 181 | DEFINE(__SIE_PROG20, offsetof(struct kvm_s390_sie_block, prog20)); |
| @@ -138,6 +138,8 @@ int init_cache_level(unsigned int cpu) · 137 unmodified lines | ||
| 138 | 138 | union cache_topology ct; |
| 139 | 139 | enum cache_type ctype; |
| 140 | 140 | |
| 141 | + if (!test_facility(34)) | |
| 142 | + return -EOPNOTSUPP; | |
| 141 | 143 | if (!this_cpu_ci) |
| 142 | 144 | return -EINVAL; |
| 143 | 145 | ct.raw = ecag(EXTRACT_TOPOLOGY, 0, 0); |
| @@ -178,17 +178,21 @@ _PIF_WORK = (_PIF_PER_TRAP) · 177 unmodified lines | ||
| 178 | 178 | */ |
| 179 | 179 | ENTRY(__switch_to) |
| 180 | 180 | stmg %r6,%r15,__SF_GPRS(%r15) # store gprs of prev task |
| 181 | − stg %r15,__THREAD_ksp(%r2) # store kernel stack of prev | |
| 182 | − lg %r4,__THREAD_info(%r2) # get thread_info of prev | |
| 183 | − lg %r5,__THREAD_info(%r3) # get thread_info of next | |
| 181 | + lgr %r1,%r2 | |
| 182 | + aghi %r1,__TASK_thread # thread_struct of prev task | |
| 183 | + lg %r4,__TASK_thread_info(%r2) # get thread_info of prev | |
| 184 | + lg %r5,__TASK_thread_info(%r3) # get thread_info of next | |
| 185 | + stg %r15,__THREAD_ksp(%r1) # store kernel stack of prev | |
| 186 | + lgr %r1,%r3 | |
| 187 | + aghi %r1,__TASK_thread # thread_struct of next task | |
| 184 | 188 | lgr %r15,%r5 |
| 185 | 189 | aghi %r15,STACK_INIT # end of kernel stack of next |
| 186 | 190 | stg %r3,__LC_CURRENT # store task struct of next |
| 187 | 191 | stg %r5,__LC_THREAD_INFO # store thread info of next |
| 188 | 192 | stg %r15,__LC_KERNEL_STACK # store end of kernel stack |
| 193 | + lg %r15,__THREAD_ksp(%r1) # load kernel stack of next | |
| 189 | 194 | lctl %c4,%c4,__TASK_pid(%r3) # load pid to control reg. 4 |
| 190 | 195 | mvc __LC_CURRENT_PID+4(4,%r0),__TASK_pid(%r3) # store pid of next |
| 191 | − lg %r15,__THREAD_ksp(%r3) # load kernel stack of next | |
| 192 | 196 | lmg %r6,%r15,__SF_GPRS(%r15) # load gprs of next task |
| 193 | 197 | br %r14 |
| 194 | 198 | |
| @@ -417,6 +421,7 @@ ENTRY(pgm_check_handler) · 222 unmodified lines | ||
| 417 | 421 | LAST_BREAK %r14 |
| 418 | 422 | lg %r15,__LC_KERNEL_STACK |
| 419 | 423 | lg %r14,__TI_task(%r12) |
| 424 | + aghi %r14,__TASK_thread # pointer to thread_struct | |
| 420 | 425 | lghi %r13,__LC_PGM_TDB |
| 421 | 426 | tm __LC_PGM_ILC+2,0x02 # check for transaction abort |
| 422 | 427 | jz 2f |
| @@ -259,7 +259,7 @@ void vector_exception(struct pt_regs *regs) · 258 unmodified lines | ||
| 259 | 259 | } |
| 260 | 260 | |
| 261 | 261 | /* get vector interrupt code from fpc */ |
| 262 | − asm volatile("stfpc %0" : "=m" (current->thread.fp_regs.fpc)); | |
| 262 | + asm volatile("stfpc %0" : "=Q" (current->thread.fp_regs.fpc)); | |
| 263 | 263 | vic = (current->thread.fp_regs.fpc & 0xf00) >> 8; |
| 264 | 264 | switch (vic) { |
| 265 | 265 | case 1: /* invalid vector operation */ |
| @@ -297,7 +297,7 @@ void data_exception(struct pt_regs *regs) · 31 unmodified lines | ||
| 297 | 297 | |
| 298 | 298 | location = get_trap_ip(regs); |
| 299 | 299 | |
| 300 | − asm volatile("stfpc %0" : "=m" (current->thread.fp_regs.fpc)); | |
| 300 | + asm volatile("stfpc %0" : "=Q" (current->thread.fp_regs.fpc)); | |
| 301 | 301 | /* Check for vector register enablement */ |
| 302 | 302 | if (MACHINE_HAS_VX && !current->thread.vxrs && |
| 303 | 303 | (current->thread.fp_regs.fpc & FPC_DXC_MASK) == 0xfe00) { |
| @@ -1742,10 +1742,10 @@ static bool ibs_enabled(struct kvm_vcpu *vcpu) · 1741 unmodified lines | ||
| 1742 | 1742 | |
| 1743 | 1743 | static int kvm_s390_handle_requests(struct kvm_vcpu *vcpu) |
| 1744 | 1744 | { |
| 1745 | − if (!vcpu->requests) | |
| 1746 | − return 0; | |
| 1747 | 1745 | retry: |
| 1748 | 1746 | kvm_s390_vcpu_request_handled(vcpu); |
| 1747 | + if (!vcpu->requests) | |
| 1748 | + return 0; | |
| 1749 | 1749 | /* |
| 1750 | 1750 | * We use MMU_RELOAD just to re-arm the ipte notifier for the |
| 1751 | 1751 | * guest prefix page. gmap_ipte_notify will wait on the ptl lock. |
| @@ -448,13 +448,13 @@ static void bpf_jit_prologue(struct bpf_jit *jit) · 447 unmodified lines | ||
| 448 | 448 | EMIT6_DISP_LH(0xe3000000, 0x0004, REG_SKB_DATA, REG_0, |
| 449 | 449 | BPF_REG_1, offsetof(struct sk_buff, data)); |
| 450 | 450 | } |
| 451 | − /* BPF compatibility: clear A (%b7) and X (%b8) registers */ | |
| 452 | − if (REG_SEEN(BPF_REG_7)) | |
| 453 | − /* lghi %b7,0 */ | |
| 454 | − EMIT4_IMM(0xa7090000, BPF_REG_7, 0); | |
| 455 | − if (REG_SEEN(BPF_REG_8)) | |
| 456 | − /* lghi %b8,0 */ | |
| 457 | − EMIT4_IMM(0xa7090000, BPF_REG_8, 0); | |
| 451 | + /* BPF compatibility: clear A (%b0) and X (%b7) registers */ | |
| 452 | + if (REG_SEEN(BPF_REG_A)) | |
| 453 | + /* lghi %ba,0 */ | |
| 454 | + EMIT4_IMM(0xa7090000, BPF_REG_A, 0); | |
| 455 | + if (REG_SEEN(BPF_REG_X)) | |
| 456 | + /* lghi %bx,0 */ | |
| 457 | + EMIT4_IMM(0xa7090000, BPF_REG_X, 0); | |
| 458 | 458 | } |
| 459 | 459 | |
| 460 | 460 | /* |
| @@ -28,16 +28,10 @@ · 27 unmodified lines | ||
| 28 | 28 | * Must preserve %o5 between VISEntryHalf and VISExitHalf */ |
| 29 | 29 | |
| 30 | 30 | #define VISEntryHalf \ |
| 31 | − rd %fprs, %o5; \ | |
| 32 | − andcc %o5, FPRS_FEF, %g0; \ | |
| 33 | − be,pt %icc, 297f; \ | |
| 34 | − sethi %hi(298f), %g7; \ | |
| 35 | − sethi %hi(VISenterhalf), %g1; \ | |
| 36 | − jmpl %g1 + %lo(VISenterhalf), %g0; \ | |
| 37 | − or %g7, %lo(298f), %g7; \ | |
| 38 | − clr %o5; \ | |
| 39 | −297: wr %o5, FPRS_FEF, %fprs; \ | |
| 40 | −298: | |
| 31 | + VISEntry | |
| 32 | + | |
| 33 | +#define VISExitHalf \ | |
| 34 | + VISExit | |
| 41 | 35 | |
| 42 | 36 | #define VISEntryHalfFast(fail_label) \ |
| 43 | 37 | rd %fprs, %o5; \ |
| @@ -47,7 +41,7 @@ · 3 unmodified lines | ||
| 47 | 41 | ba,a,pt %xcc, fail_label; \ |
| 48 | 42 | 297: wr %o5, FPRS_FEF, %fprs; |
| 49 | 43 | |
| 50 | −#define VISExitHalf \ | |
| 44 | +#define VISExitHalfFast \ | |
| 51 | 45 | wr %o5, 0, %fprs; |
| 52 | 46 | |
| 53 | 47 | #ifndef __ASSEMBLY__ |
| @@ -240,8 +240,11 @@ FUNC_NAME: /* %o0=dst, %o1=src, %o2=len */ · 239 unmodified lines | ||
| 240 | 240 | add %o0, 0x40, %o0 |
| 241 | 241 | bne,pt %icc, 1b |
| 242 | 242 | LOAD(prefetch, %g1 + 0x200, #n_reads_strong) |
| 243 | +#ifdef NON_USER_COPY | |
| 244 | + VISExitHalfFast | |
| 245 | +#else | |
| 243 | 246 | VISExitHalf |
| 244 | − | |
| 247 | +#endif | |
| 245 | 248 | brz,pn %o2, .Lexit |
| 246 | 249 | cmp %o2, 19 |
| 247 | 250 | ble,pn %icc, .Lsmall_unaligned |
| @@ -44,9 +44,8 @@ vis1: ldub [%g6 + TI_FPSAVED], %g3 · 43 unmodified lines | ||
| 44 | 44 | |
| 45 | 45 | stx %g3, [%g6 + TI_GSR] |
| 46 | 46 | 2: add %g6, %g1, %g3 |
| 47 | − cmp %o5, FPRS_DU | |
| 48 | − be,pn %icc, 6f | |
| 49 | − sll %g1, 3, %g1 | |
| 47 | + mov FPRS_DU | FPRS_DL | FPRS_FEF, %o5 | |
| 48 | + sll %g1, 3, %g1 | |
| 50 | 49 | stb %o5, [%g3 + TI_FPSAVED] |
| 51 | 50 | rd %gsr, %g2 |
| 52 | 51 | add %g6, %g1, %g3 |
| @@ -80,65 +79,3 @@ vis1: ldub [%g6 + TI_FPSAVED], %g3 · 27 unmodified lines | ||
| 80 | 79 | .align 32 |
| 81 | 80 | 80: jmpl %g7 + %g0, %g0 |
| 82 | 81 | nop |
| 83 | − | |
| 84 | −6: ldub [%g3 + TI_FPSAVED], %o5 | |
| 85 | − or %o5, FPRS_DU, %o5 | |
| 86 | − add %g6, TI_FPREGS+0x80, %g2 | |
| 87 | − stb %o5, [%g3 + TI_FPSAVED] | |
| 88 | − | |
| 89 | − sll %g1, 5, %g1 | |
| 90 | − add %g6, TI_FPREGS+0xc0, %g3 | |
| 91 | − wr %g0, FPRS_FEF, %fprs | |
| 92 | − membar #Sync | |
| 93 | − stda %f32, [%g2 + %g1] ASI_BLK_P | |
| 94 | − stda %f48, [%g3 + %g1] ASI_BLK_P | |
| 95 | − membar #Sync | |
| 96 | − ba,pt %xcc, 80f | |
| 97 | − nop | |
| 98 | − | |
| 99 | − .align 32 | |
| 100 | −80: jmpl %g7 + %g0, %g0 | |
| 101 | − nop | |
| 102 | − | |
| 103 | − .align 32 | |
| 104 | −VISenterhalf: | |
| 105 | − ldub [%g6 + TI_FPDEPTH], %g1 | |
| 106 | − brnz,a,pn %g1, 1f | |
| 107 | − cmp %g1, 1 | |
| 108 | − stb %g0, [%g6 + TI_FPSAVED] | |
| 109 | − stx %fsr, [%g6 + TI_XFSR] | |
| 110 | − clr %o5 | |
| 111 | − jmpl %g7 + %g0, %g0 | |
| 112 | − wr %g0, FPRS_FEF, %fprs | |
| 113 | − | |
| 114 | −1: bne,pn %icc, 2f | |
| 115 | − srl %g1, 1, %g1 | |
| 116 | − ba,pt %xcc, vis1 | |
| 117 | − sub %g7, 8, %g7 | |
| 118 | −2: addcc %g6, %g1, %g3 | |
| 119 | − sll %g1, 3, %g1 | |
| 120 | − andn %o5, FPRS_DU, %g2 | |
| 121 | − stb %g2, [%g3 + TI_FPSAVED] | |
| 122 | − | |
| 123 | − rd %gsr, %g2 | |
| 124 | − add %g6, %g1, %g3 | |
| 125 | − stx %g2, [%g3 + TI_GSR] | |
| 126 | − add %g6, %g1, %g2 | |
| 127 | − stx %fsr, [%g2 + TI_XFSR] | |
| 128 | − sll %g1, 5, %g1 | |
| 129 | −3: andcc %o5, FPRS_DL, %g0 | |
| 130 | − be,pn %icc, 4f | |
| 131 | − add %g6, TI_FPREGS, %g2 | |
| 132 | − | |
| 133 | − add %g6, TI_FPREGS+0x40, %g3 | |
| 134 | − membar #Sync | |
| 135 | − stda %f0, [%g2 + %g1] ASI_BLK_P | |
| 136 | − stda %f16, [%g3 + %g1] ASI_BLK_P | |
| 137 | − membar #Sync | |
| 138 | − ba,pt %xcc, 4f | |
| 139 | − nop | |
| 140 | − | |
| 141 | − .align 32 | |
| 142 | −4: and %o5, FPRS_DU, %o5 | |
| 143 | − jmpl %g7 + %g0, %g0 | |
| 144 | − wr %o5, FPRS_FEF, %fprs | |
| @@ -135,10 +135,6 @@ EXPORT_SYMBOL(copy_user_page); · 134 unmodified lines | ||
| 135 | 135 | void VISenter(void); |
| 136 | 136 | EXPORT_SYMBOL(VISenter); |
| 137 | 137 | |
| 138 | −/* CRYPTO code needs this */ | |
| 139 | −void VISenterhalf(void); | |
| 140 | −EXPORT_SYMBOL(VISenterhalf); | |
| 141 | − | |
| 142 | 138 | extern void xor_vis_2(unsigned long, unsigned long *, unsigned long *); |
| 143 | 139 | extern void xor_vis_3(unsigned long, unsigned long *, unsigned long *, |
| 144 | 140 | unsigned long *); |
| @@ -113,8 +113,6 @@ int copy_siginfo_from_user32(siginfo_t *to, struct compat_siginfo __user *from) · 112 unmodified lines | ||
| 113 | 113 | if (!access_ok(VERIFY_READ, from, sizeof(struct compat_siginfo))) |
| 114 | 114 | return -EFAULT; |
| 115 | 115 | |
| 116 | − memset(to, 0, sizeof(*to)); | |
| 117 | − | |
| 118 | 116 | err = __get_user(to->si_signo, &from->si_signo); |
| 119 | 117 | err |= __get_user(to->si_errno, &from->si_errno); |
| 120 | 118 | err |= __get_user(to->si_code, &from->si_code); |
| @@ -1139,7 +1139,7 @@ static void __init load_hv_initrd(void) · 1138 unmodified lines | ||
| 1139 | 1139 | |
| 1140 | 1140 | void __init free_initrd_mem(unsigned long begin, unsigned long end) |
| 1141 | 1141 | { |
| 1142 | − free_bootmem(__pa(begin), end - begin); | |
| 1142 | + free_bootmem_late(__pa(begin), end - begin); | |
| 1143 | 1143 | } |
| 1144 | 1144 | |
| 1145 | 1145 | static int __init setup_initrd(char *str) |
| @@ -1193,6 +1193,10 @@ static efi_status_t setup_e820(struct boot_params *params, · 1192 unmodified lines | ||
| 1193 | 1193 | unsigned int e820_type = 0; |
| 1194 | 1194 | unsigned long m = efi->efi_memmap; |
| 1195 | 1195 | |
| 1196 | +#ifdef CONFIG_X86_64 | |
| 1197 | + m |= (u64)efi->efi_memmap_hi << 32; | |
| 1198 | +#endif | |
| 1199 | + | |
| 1196 | 1200 | d = (efi_memory_desc_t *)(m + (i * efi->efi_memdesc_size)); |
| 1197 | 1201 | switch (d->type) { |
| 1198 | 1202 | case EFI_RESERVED_TYPE: |
| @@ -140,6 +140,7 @@ sysexit_from_sys_call: · 139 unmodified lines | ||
| 140 | 140 | */ |
| 141 | 141 | andl $~TS_COMPAT, ASM_THREAD_INFO(TI_status, %rsp, SIZEOF_PTREGS) |
| 142 | 142 | movl RIP(%rsp), %ecx /* User %eip */ |
| 143 | + movq RAX(%rsp), %rax | |
| 143 | 144 | RESTORE_RSI_RDI |
| 144 | 145 | xorl %edx, %edx /* Do not leak kernel information */ |
| 145 | 146 | xorq %r8, %r8 |
| @@ -205,7 +206,6 @@ sysexit_from_sys_call: · 59 unmodified lines | ||
| 205 | 206 | movl RDX(%rsp), %edx /* arg3 */ |
| 206 | 207 | movl RSI(%rsp), %ecx /* arg4 */ |
| 207 | 208 | movl RDI(%rsp), %r8d /* arg5 */ |
| 208 | − movl %ebp, %r9d /* arg6 */ | |
| 209 | 209 | .endm |
| 210 | 210 | |
| 211 | 211 | .macro auditsys_exit exit |
| @@ -220,7 +220,6 @@ sysexit_from_sys_call: · 8 unmodified lines | ||
| 220 | 220 | 1: setbe %al /* 1 if error, 0 if not */ |
| 221 | 221 | movzbl %al, %edi /* zero-extend that into %edi */ |
| 222 | 222 | call __audit_syscall_exit |
| 223 | − movq RAX(%rsp), %rax /* reload syscall return value */ | |
| 224 | 223 | movl $(_TIF_ALLWORK_MASK & ~_TIF_SYSCALL_AUDIT), %edi |
| 225 | 224 | DISABLE_INTERRUPTS(CLBR_NONE) |
| 226 | 225 | TRACE_IRQS_OFF |
| @@ -236,6 +235,7 @@ sysexit_from_sys_call: · 9 unmodified lines | ||
| 236 | 235 | |
| 237 | 236 | sysenter_auditsys: |
| 238 | 237 | auditsys_entry_common |
| 238 | + movl %ebp, %r9d /* reload 6th syscall arg */ | |
| 239 | 239 | jmp sysenter_dispatch |
| 240 | 240 | |
| 241 | 241 | sysexit_audit: |
| @@ -336,7 +336,7 @@ ENTRY(entry_SYSCALL_compat) · 94 unmodified lines | ||
| 336 | 336 | * 32-bit zero extended: |
| 337 | 337 | */ |
| 338 | 338 | ASM_STAC |
| 339 | −1: movl (%r8), %ebp | |
| 339 | +1: movl (%r8), %r9d | |
| 340 | 340 | _ASM_EXTABLE(1b, ia32_badarg) |
| 341 | 341 | ASM_CLAC |
| 342 | 342 | orl $TS_COMPAT, ASM_THREAD_INFO(TI_status, %rsp, SIZEOF_PTREGS) |
| @@ -346,7 +346,7 @@ ENTRY(entry_SYSCALL_compat) · 3 unmodified lines | ||
| 346 | 346 | cstar_do_call: |
| 347 | 347 | /* 32-bit syscall -> 64-bit C ABI argument conversion */ |
| 348 | 348 | movl %edi, %r8d /* arg5 */ |
| 349 | − movl %ebp, %r9d /* arg6 */ | |
| 349 | + /* r9 already loaded */ /* arg6 */ | |
| 350 | 350 | xchg %ecx, %esi /* rsi:arg2, rcx:arg4 */ |
| 351 | 351 | movl %ebx, %edi /* arg1 */ |
| 352 | 352 | movl %edx, %edx /* arg3 (zero extension) */ |
| @@ -358,7 +358,6 @@ cstar_dispatch: · 5 unmodified lines | ||
| 358 | 358 | call *ia32_sys_call_table(, %rax, 8) |
| 359 | 359 | movq %rax, RAX(%rsp) |
| 360 | 360 | 1: |
| 361 | − movl RCX(%rsp), %ebp | |
| 362 | 361 | DISABLE_INTERRUPTS(CLBR_NONE) |
| 363 | 362 | TRACE_IRQS_OFF |
| 364 | 363 | testl $_TIF_ALLWORK_MASK, ASM_THREAD_INFO(TI_flags, %rsp, SIZEOF_PTREGS) |
| @@ -369,6 +368,7 @@ sysretl_from_sys_call: · 4 unmodified lines | ||
| 369 | 368 | RESTORE_RSI_RDI_RDX |
| 370 | 369 | movl RIP(%rsp), %ecx |
| 371 | 370 | movl EFLAGS(%rsp), %r11d |
| 371 | + movq RAX(%rsp), %rax | |
| 372 | 372 | xorq %r10, %r10 |
| 373 | 373 | xorq %r9, %r9 |
| 374 | 374 | xorq %r8, %r8 |
| @@ -392,7 +392,9 @@ sysretl_from_sys_call: · 17 unmodified lines | ||
| 392 | 392 | |
| 393 | 393 | #ifdef CONFIG_AUDITSYSCALL |
| 394 | 394 | cstar_auditsys: |
| 395 | + movl %r9d, R9(%rsp) /* register to be clobbered by call */ | |
| 395 | 396 | auditsys_entry_common |
| 397 | + movl R9(%rsp), %r9d /* reload 6th syscall arg */ | |
| 396 | 398 | jmp cstar_dispatch |
| 397 | 399 | |
| 398 | 400 | sysretl_audit: |
| @@ -404,14 +406,16 @@ cstar_tracesys: · 5 unmodified lines | ||
| 404 | 406 | testl $(_TIF_WORK_SYSCALL_ENTRY & ~_TIF_SYSCALL_AUDIT), ASM_THREAD_INFO(TI_flags, %rsp, SIZEOF_PTREGS) |
| 405 | 407 | jz cstar_auditsys |
| 406 | 408 | #endif |
| 409 | + xchgl %r9d, %ebp | |
| 407 | 410 | SAVE_EXTRA_REGS |
| 408 | 411 | xorl %eax, %eax /* Do not leak kernel information */ |
| 409 | 412 | movq %rax, R11(%rsp) |
| 410 | 413 | movq %rax, R10(%rsp) |
| 411 | − movq %rax, R9(%rsp) | |
| 414 | + movq %r9, R9(%rsp) | |
| 412 | 415 | movq %rax, R8(%rsp) |
| 413 | 416 | movq %rsp, %rdi /* &pt_regs -> arg1 */ |
| 414 | 417 | call syscall_trace_enter |
| 418 | + movl R9(%rsp), %r9d | |
| 415 | 419 | |
| 416 | 420 | /* Reload arg registers from stack. (see sysenter_tracesys) */ |
| 417 | 421 | movl RCX(%rsp), %ecx |
| @@ -421,6 +425,7 @@ cstar_tracesys: · 3 unmodified lines | ||
| 421 | 425 | movl %eax, %eax /* zero extension */ |
| 422 | 426 | |
| 423 | 427 | RESTORE_EXTRA_REGS |
| 428 | + xchgl %ebp, %r9d | |
| 424 | 429 | jmp cstar_do_call |
| 425 | 430 | END(entry_SYSCALL_compat) |
| 426 | 431 | |
| @@ -280,21 +280,6 @@ static inline void clear_LDT(void) · 279 unmodified lines | ||
| 280 | 280 | set_ldt(NULL, 0); |
| 281 | 281 | } |
| 282 | 282 | |
| 283 | −/* | |
| 284 | − * load one particular LDT into the current CPU | |
| 285 | − */ | |
| 286 | −static inline void load_LDT_nolock(mm_context_t *pc) | |
| 287 | −{ | |
| 288 | − set_ldt(pc->ldt, pc->size); | |
| 289 | −} | |
| 290 | − | |
| 291 | −static inline void load_LDT(mm_context_t *pc) | |
| 292 | −{ | |
| 293 | − preempt_disable(); | |
| 294 | − load_LDT_nolock(pc); | |
| 295 | − preempt_enable(); | |
| 296 | −} | |
| 297 | − | |
| 298 | 283 | static inline unsigned long get_desc_base(const struct desc_struct *desc) |
| 299 | 284 | { |
| 300 | 285 | return (unsigned)(desc->base0 | ((desc->base1) << 16) | ((desc->base2) << 24)); |
| @@ -9,8 +9,7 @@ · 8 unmodified lines | ||
| 9 | 9 | * we put the segment information here. |
| 10 | 10 | */ |
| 11 | 11 | typedef struct { |
| 12 | − void *ldt; | |
| 13 | − int size; | |
| 12 | + struct ldt_struct *ldt; | |
| 14 | 13 | |
| 15 | 14 | #ifdef CONFIG_X86_64 |
| 16 | 15 | /* True if mm supports a task running in 32 bit compatibility mode. */ |
| @@ -33,6 +33,50 @@ static inline void load_mm_cr4(struct mm_struct *mm) · 32 unmodified lines | ||
| 33 | 33 | static inline void load_mm_cr4(struct mm_struct *mm) {} |
| 34 | 34 | #endif |
| 35 | 35 | |
| 36 | +/* | |
| 37 | + * ldt_structs can be allocated, used, and freed, but they are never | |
| 38 | + * modified while live. | |
| 39 | + */ | |
| 40 | +struct ldt_struct { | |
| 41 | + /* | |
| 42 | + * Xen requires page-aligned LDTs with special permissions. This is | |
| 43 | + * needed to prevent us from installing evil descriptors such as | |
| 44 | + * call gates. On native, we could merge the ldt_struct and LDT | |
| 45 | + * allocations, but it's not worth trying to optimize. | |
| 46 | + */ | |
| 47 | + struct desc_struct *entries; | |
| 48 | + int size; | |
| 49 | +}; | |
| 50 | + | |
| 51 | +static inline void load_mm_ldt(struct mm_struct *mm) | |
| 52 | +{ | |
| 53 | + struct ldt_struct *ldt; | |
| 54 | + | |
| 55 | + /* lockless_dereference synchronizes with smp_store_release */ | |
| 56 | + ldt = lockless_dereference(mm->context.ldt); | |
| 57 | + | |
| 58 | + /* | |
| 59 | + * Any change to mm->context.ldt is followed by an IPI to all | |
| 60 | + * CPUs with the mm active. The LDT will not be freed until | |
| 61 | + * after the IPI is handled by all such CPUs. This means that, | |
| 62 | + * if the ldt_struct changes before we return, the values we see | |
| 63 | + * will be safe, and the new values will be loaded before we run | |
| 64 | + * any user code. | |
| 65 | + * | |
| 66 | + * NB: don't try to convert this to use RCU without extreme care. | |
| 67 | + * We would still need IRQs off, because we don't want to change | |
| 68 | + * the local LDT after an IPI loaded a newer value than the one | |
| 69 | + * that we can see. | |
| 70 | + */ | |
| 71 | + | |
| 72 | + if (unlikely(ldt)) | |
| 73 | + set_ldt(ldt->entries, ldt->size); | |
| 74 | + else | |
| 75 | + clear_LDT(); | |
| 76 | + | |
| 77 | + DEBUG_LOCKS_WARN_ON(preemptible()); | |
| 78 | +} | |
| 79 | + | |
| 36 | 80 | /* |
| 37 | 81 | * Used for LDT copy/destruction. |
| 38 | 82 | */ |
| @@ -78,12 +122,12 @@ static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next, · 39 unmodified lines | ||
| 78 | 122 | * was called and then modify_ldt changed |
| 79 | 123 | * prev->context.ldt but suppressed an IPI to this CPU. |
| 80 | 124 | * In this case, prev->context.ldt != NULL, because we |
| 81 | − * never free an LDT while the mm still exists. That | |
| 82 | − * means that next->context.ldt != prev->context.ldt, | |
| 83 | − * because mms never share an LDT. | |
| 125 | + * never set context.ldt to NULL while the mm still | |
| 126 | + * exists. That means that next->context.ldt != | |
| 127 | + * prev->context.ldt, because mms never share an LDT. | |
| 84 | 128 | */ |
| 85 | 129 | if (unlikely(prev->context.ldt != next->context.ldt)) |
| 86 | − load_LDT_nolock(&next->context); | |
| 130 | + load_mm_ldt(next); | |
| 87 | 131 | } |
| 88 | 132 | #ifdef CONFIG_SMP |
| 89 | 133 | else { |
| @@ -106,7 +150,7 @@ static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next, · 16 unmodified lines | ||
| 106 | 150 | load_cr3(next->pgd); |
| 107 | 151 | trace_tlb_flush(TLB_FLUSH_ON_TASK_SWITCH, TLB_FLUSH_ALL); |
| 108 | 152 | load_mm_cr4(next); |
| 109 | − load_LDT_nolock(&next->context); | |
| 153 | + load_mm_ldt(next); | |
| 110 | 154 | } |
| 111 | 155 | } |
| 112 | 156 | #endif |
| @@ -57,9 +57,9 @@ struct sigcontext { · 56 unmodified lines | ||
| 57 | 57 | unsigned long ip; |
| 58 | 58 | unsigned long flags; |
| 59 | 59 | unsigned short cs; |
| 60 | − unsigned short __pad2; /* Was called gs, but was always zero. */ | |
| 61 | − unsigned short __pad1; /* Was called fs, but was always zero. */ | |
| 62 | − unsigned short ss; | |
| 60 | + unsigned short gs; | |
| 61 | + unsigned short fs; | |
| 62 | + unsigned short __pad0; | |
| 63 | 63 | unsigned long err; |
| 64 | 64 | unsigned long trapno; |
| 65 | 65 | unsigned long oldmask; |
| @@ -354,7 +354,7 @@ struct kvm_xcrs { · 353 unmodified lines | ||
| 354 | 354 | struct kvm_sync_regs { |
| 355 | 355 | }; |
| 356 | 356 | |
| 357 | −#define KVM_QUIRK_LINT0_REENABLED (1 << 0) | |
| 358 | −#define KVM_QUIRK_CD_NW_CLEARED (1 << 1) | |
| 357 | +#define KVM_X86_QUIRK_LINT0_REENABLED (1 << 0) | |
| 358 | +#define KVM_X86_QUIRK_CD_NW_CLEARED (1 << 1) | |
| 359 | 359 | |
| 360 | 360 | #endif /* _ASM_X86_KVM_H */ |
| @@ -177,24 +177,9 @@ struct sigcontext { · 176 unmodified lines | ||
| 177 | 177 | __u64 rip; |
| 178 | 178 | __u64 eflags; /* RFLAGS */ |
| 179 | 179 | __u16 cs; |
| 180 | − | |
| 181 | − /* | |
| 182 | − * Prior to 2.5.64 ("[PATCH] x86-64 updates for 2.5.64-bk3"), | |
| 183 | − * Linux saved and restored fs and gs in these slots. This | |
| 184 | − * was counterproductive, as fsbase and gsbase were never | |
| 185 | − * saved, so arch_prctl was presumably unreliable. | |
| 186 | − * | |
| 187 | − * If these slots are ever needed for any other purpose, there | |
| 188 | − * is some risk that very old 64-bit binaries could get | |
| 189 | − * confused. I doubt that many such binaries still work, | |
| 190 | − * though, since the same patch in 2.5.64 also removed the | |
| 191 | − * 64-bit set_thread_area syscall, so it appears that there is | |
| 192 | − * no TLS API that works in both pre- and post-2.5.64 kernels. | |
| 193 | − */ | |
| 194 | − __u16 __pad2; /* Was gs. */ | |
| 195 | − __u16 __pad1; /* Was fs. */ | |
| 196 | − | |
| 197 | − __u16 ss; | |
| 180 | + __u16 gs; | |
| 181 | + __u16 fs; | |
| 182 | + __u16 __pad0; | |
| 198 | 183 | __u64 err; |
| 199 | 184 | __u64 trapno; |
| 200 | 185 | __u64 oldmask; |
| @@ -943,7 +943,7 @@ static bool mp_check_pin_attr(int irq, struct irq_alloc_info *info) · 942 unmodified lines | ||
| 943 | 943 | */ |
| 944 | 944 | if (irq < nr_legacy_irqs() && data->count == 1) { |
| 945 | 945 | if (info->ioapic_trigger != data->trigger) |
| 946 | − mp_register_handler(irq, data->trigger); | |
| 946 | + mp_register_handler(irq, info->ioapic_trigger); | |
| 947 | 947 | data->entry.trigger = data->trigger = info->ioapic_trigger; |
| 948 | 948 | data->entry.polarity = data->polarity = info->ioapic_polarity; |
| 949 | 949 | } |
| @@ -1410,7 +1410,7 @@ void cpu_init(void) · 1409 unmodified lines | ||
| 1410 | 1410 | load_sp0(t, ¤t->thread); |
| 1411 | 1411 | set_tss_desc(cpu, t); |
| 1412 | 1412 | load_TR_desc(); |
| 1413 | − load_LDT(&init_mm.context); | |
| 1413 | + load_mm_ldt(&init_mm); | |
| 1414 | 1414 | |
| 1415 | 1415 | clear_all_debug_regs(); |
| 1416 | 1416 | dbg_restore_debug_regs(); |
| @@ -1459,7 +1459,7 @@ void cpu_init(void) · 42 unmodified lines | ||
| 1459 | 1459 | load_sp0(t, thread); |
| 1460 | 1460 | set_tss_desc(cpu, t); |
| 1461 | 1461 | load_TR_desc(); |
| 1462 | − load_LDT(&init_mm.context); | |
| 1462 | + load_mm_ldt(&init_mm); | |
| 1463 | 1463 | |
| 1464 | 1464 | t->x86_tss.io_bitmap_base = offsetof(struct tss_struct, io_bitmap); |
| 1465 | 1465 | |
| @@ -2179,21 +2179,25 @@ static unsigned long get_segment_base(unsigned int segment) · 2178 unmodified lines | ||
| 2179 | 2179 | int idx = segment >> 3; |
| 2180 | 2180 | |
| 2181 | 2181 | if ((segment & SEGMENT_TI_MASK) == SEGMENT_LDT) { |
| 2182 | + struct ldt_struct *ldt; | |
| 2183 | + | |
| 2182 | 2184 | if (idx > LDT_ENTRIES) |
| 2183 | 2185 | return 0; |
| 2184 | 2186 | |
| 2185 | − if (idx > current->active_mm->context.size) | |
| 2187 | + /* IRQs are off, so this synchronizes with smp_store_release */ | |
| 2188 | + ldt = lockless_dereference(current->active_mm->context.ldt); | |
| 2189 | + if (!ldt || idx > ldt->size) | |
| 2186 | 2190 | return 0; |
| 2187 | 2191 | |
| 2188 | − desc = current->active_mm->context.ldt; | |
| 2192 | + desc = &ldt->entries[idx]; | |
| 2189 | 2193 | } else { |
| 2190 | 2194 | if (idx > GDT_ENTRIES) |
| 2191 | 2195 | return 0; |
| 2192 | 2196 | |
| 2193 | − desc = raw_cpu_ptr(gdt_page.gdt); | |
| 2197 | + desc = raw_cpu_ptr(gdt_page.gdt) + idx; | |
| 2194 | 2198 | } |
| 2195 | 2199 | |
| 2196 | − return get_desc_base(desc + idx); | |
| 2200 | + return get_desc_base(desc); | |
| 2197 | 2201 | } |
| 2198 | 2202 | |
| 2199 | 2203 | #ifdef CONFIG_COMPAT |
| @@ -2534,7 +2534,7 @@ static int intel_pmu_cpu_prepare(int cpu) · 2533 unmodified lines | ||
| 2534 | 2534 | if (x86_pmu.extra_regs || x86_pmu.lbr_sel_map) { |
| 2535 | 2535 | cpuc->shared_regs = allocate_shared_regs(cpu); |
| 2536 | 2536 | if (!cpuc->shared_regs) |
| 2537 | − return NOTIFY_BAD; | |
| 2537 | + goto err; | |
| 2538 | 2538 | } |
| 2539 | 2539 | |
| 2540 | 2540 | if (x86_pmu.flags & PMU_FL_EXCL_CNTRS) { |
| @@ -2542,18 +2542,27 @@ static int intel_pmu_cpu_prepare(int cpu) · 1 unmodified line | ||
| 2542 | 2542 | |
| 2543 | 2543 | cpuc->constraint_list = kzalloc(sz, GFP_KERNEL); |
| 2544 | 2544 | if (!cpuc->constraint_list) |
| 2545 | − return NOTIFY_BAD; | |
| 2545 | + goto err_shared_regs; | |
| 2546 | 2546 | |
| 2547 | 2547 | cpuc->excl_cntrs = allocate_excl_cntrs(cpu); |
| 2548 | − if (!cpuc->excl_cntrs) { | |
| 2549 | − kfree(cpuc->constraint_list); | |
| 2550 | − kfree(cpuc->shared_regs); | |
| 2551 | − return NOTIFY_BAD; | |
| 2552 | − } | |
| 2548 | + if (!cpuc->excl_cntrs) | |
| 2549 | + goto err_constraint_list; | |
| 2550 | + | |
| 2553 | 2551 | cpuc->excl_thread_id = 0; |
| 2554 | 2552 | } |
| 2555 | 2553 | |
| 2556 | 2554 | return NOTIFY_OK; |
| 2555 | + | |
| 2556 | +err_constraint_list: | |
| 2557 | + kfree(cpuc->constraint_list); | |
| 2558 | + cpuc->constraint_list = NULL; | |
| 2559 | + | |
| 2560 | +err_shared_regs: | |
| 2561 | + kfree(cpuc->shared_regs); | |
| 2562 | + cpuc->shared_regs = NULL; | |
| 2563 | + | |
| 2564 | +err: | |
| 2565 | + return NOTIFY_BAD; | |
| 2557 | 2566 | } |
| 2558 | 2567 | |
| 2559 | 2568 | static void intel_pmu_cpu_starting(int cpu) |
| @@ -951,6 +951,14 @@ static u64 intel_cqm_event_count(struct perf_event *event) · 950 unmodified lines | ||
| 951 | 951 | if (!cqm_group_leader(event)) |
| 952 | 952 | return 0; |
| 953 | 953 | |
| 954 | + /* | |
| 955 | + * Getting up-to-date values requires an SMP IPI which is not | |
| 956 | + * possible if we're being called in interrupt context. Return | |
| 957 | + * the cached values instead. | |
| 958 | + */ | |
| 959 | + if (unlikely(in_interrupt())) | |
| 960 | + goto out; | |
| 961 | + | |
| 954 | 962 | /* |
| 955 | 963 | * Notice that we don't perform the reading of an RMID |
| 956 | 964 | * atomically, because we can't hold a spin lock across the |
| @@ -1247,7 +1255,7 @@ static inline void cqm_pick_event_reader(int cpu) · 290 unmodified lines | ||
| 1247 | 1255 | cpumask_set_cpu(cpu, &cqm_cpumask); |
| 1248 | 1256 | } |
| 1249 | 1257 | |
| 1250 | −static void intel_cqm_cpu_prepare(unsigned int cpu) | |
| 1258 | +static void intel_cqm_cpu_starting(unsigned int cpu) | |
| 1251 | 1259 | { |
| 1252 | 1260 | struct intel_pqr_state *state = &per_cpu(pqr_state, cpu); |
| 1253 | 1261 | struct cpuinfo_x86 *c = &cpu_data(cpu); |
| @@ -1288,13 +1296,11 @@ static int intel_cqm_cpu_notifier(struct notifier_block *nb, · 34 unmodified lines | ||
| 1288 | 1296 | unsigned int cpu = (unsigned long)hcpu; |
| 1289 | 1297 | |
| 1290 | 1298 | switch (action & ~CPU_TASKS_FROZEN) { |
| 1291 | − case CPU_UP_PREPARE: | |
| 1292 | − intel_cqm_cpu_prepare(cpu); | |
| 1293 | − break; | |
| 1294 | 1299 | case CPU_DOWN_PREPARE: |
| 1295 | 1300 | intel_cqm_cpu_exit(cpu); |
| 1296 | 1301 | break; |
| 1297 | 1302 | case CPU_STARTING: |
| 1303 | + intel_cqm_cpu_starting(cpu); | |
| 1298 | 1304 | cqm_pick_event_reader(cpu); |
| 1299 | 1305 | break; |
| 1300 | 1306 | } |
| @@ -1365,7 +1371,7 @@ static int __init intel_cqm_init(void) · 64 unmodified lines | ||
| 1365 | 1371 | goto out; |
| 1366 | 1372 | |
| 1367 | 1373 | for_each_online_cpu(i) { |
| 1368 | − intel_cqm_cpu_prepare(i); | |
| 1374 | + intel_cqm_cpu_starting(i); | |
| 1369 | 1375 | cqm_pick_event_reader(i); |
| 1370 | 1376 | } |
| 1371 | 1377 | |
| @@ -351,9 +351,15 @@ static int __init x86_noxsave_setup(char *s) · 350 unmodified lines | ||
| 351 | 351 | |
| 352 | 352 | setup_clear_cpu_cap(X86_FEATURE_XSAVE); |
| 353 | 353 | setup_clear_cpu_cap(X86_FEATURE_XSAVEOPT); |
| 354 | + setup_clear_cpu_cap(X86_FEATURE_XSAVEC); | |
| 354 | 355 | setup_clear_cpu_cap(X86_FEATURE_XSAVES); |
| 355 | 356 | setup_clear_cpu_cap(X86_FEATURE_AVX); |
| 356 | 357 | setup_clear_cpu_cap(X86_FEATURE_AVX2); |
| 358 | + setup_clear_cpu_cap(X86_FEATURE_AVX512F); | |
| 359 | + setup_clear_cpu_cap(X86_FEATURE_AVX512PF); | |
| 360 | + setup_clear_cpu_cap(X86_FEATURE_AVX512ER); | |
| 361 | + setup_clear_cpu_cap(X86_FEATURE_AVX512CD); | |
| 362 | + setup_clear_cpu_cap(X86_FEATURE_MPX); | |
| 357 | 363 | |
| 358 | 364 | return 1; |
| 359 | 365 | } |
| @@ -12,6 +12,7 @@ · 11 unmodified lines | ||
| 12 | 12 | #include <linux/string.h> |
| 13 | 13 | #include <linux/mm.h> |
| 14 | 14 | #include <linux/smp.h> |
| 15 | +#include <linux/slab.h> | |
| 15 | 16 | #include <linux/vmalloc.h> |
| 16 | 17 | #include <linux/uaccess.h> |
| 17 | 18 | |
| @@ -20,82 +21,82 @@ · 2 unmodified lines | ||
| 20 | 21 | #include <asm/mmu_context.h> |
| 21 | 22 | #include <asm/syscalls.h> |
| 22 | 23 | |
| 23 | −#ifdef CONFIG_SMP | |
| 24 | +/* context.lock is held for us, so we don't need any locking. */ | |
| 24 | 25 | static void flush_ldt(void *current_mm) |
| 25 | 26 | { |
| 26 | − if (current->active_mm == current_mm) | |
| 27 | − load_LDT(¤t->active_mm->context); | |
| 27 | + mm_context_t *pc; | |
| 28 | + | |
| 29 | + if (current->active_mm != current_mm) | |
| 30 | + return; | |
| 31 | + | |
| 32 | + pc = ¤t->active_mm->context; | |
| 33 | + set_ldt(pc->ldt->entries, pc->ldt->size); | |
| 28 | 34 | } |
| 29 | −#endif | |
| 30 | 35 | |
| 31 | −static int alloc_ldt(mm_context_t *pc, int mincount, int reload) | |
| 36 | +/* The caller must call finalize_ldt_struct on the result. LDT starts zeroed. */ | |
| 37 | +static struct ldt_struct *alloc_ldt_struct(int size) | |
| 32 | 38 | { |
| 33 | − void *oldldt, *newldt; | |
| 34 | − int oldsize; | |
| 35 | − | |
| 36 | − if (mincount <= pc->size) | |
| 37 | − return 0; | |
| 38 | − oldsize = pc->size; | |
| 39 | − mincount = (mincount + (PAGE_SIZE / LDT_ENTRY_SIZE - 1)) & | |
| 40 | − (~(PAGE_SIZE / LDT_ENTRY_SIZE - 1)); | |
| 41 | − if (mincount * LDT_ENTRY_SIZE > PAGE_SIZE) | |
| 42 | − newldt = vmalloc(mincount * LDT_ENTRY_SIZE); | |
| 39 | + struct ldt_struct *new_ldt; | |
| 40 | + int alloc_size; | |
| 41 | + | |
| 42 | + if (size > LDT_ENTRIES) | |
| 43 | + return NULL; | |
| 44 | + | |
| 45 | + new_ldt = kmalloc(sizeof(struct ldt_struct), GFP_KERNEL); | |
| 46 | + if (!new_ldt) | |
| 47 | + return NULL; | |
| 48 | + | |
| 49 | + BUILD_BUG_ON(LDT_ENTRY_SIZE != sizeof(struct desc_struct)); | |
| 50 | + alloc_size = size * LDT_ENTRY_SIZE; | |
| 51 | + | |
| 52 | + /* | |
| 53 | + * Xen is very picky: it requires a page-aligned LDT that has no | |
| 54 | + * trailing nonzero bytes in any page that contains LDT descriptors. | |
| 55 | + * Keep it simple: zero the whole allocation and never allocate less | |
| 56 | + * than PAGE_SIZE. | |
| 57 | + */ | |
| 58 | + if (alloc_size > PAGE_SIZE) | |
| 59 | + new_ldt->entries = vzalloc(alloc_size); | |
| 43 | 60 | else |
| 44 | − newldt = (void *)__get_free_page(GFP_KERNEL); | |
| 45 | − | |
| 46 | − if (!newldt) | |
| 47 | − return -ENOMEM; | |
| 61 | + new_ldt->entries = kzalloc(PAGE_SIZE, GFP_KERNEL); | |
| 48 | 62 | |
| 49 | − if (oldsize) | |
| 50 | − memcpy(newldt, pc->ldt, oldsize * LDT_ENTRY_SIZE); | |
| 51 | − oldldt = pc->ldt; | |
| 52 | − memset(newldt + oldsize * LDT_ENTRY_SIZE, 0, | |
| 53 | − (mincount - oldsize) * LDT_ENTRY_SIZE); | |
| 63 | + if (!new_ldt->entries) { | |
| 64 | + kfree(new_ldt); | |
| 65 | + return NULL; | |
| 66 | + } | |
| 54 | 67 | |
| 55 | − paravirt_alloc_ldt(newldt, mincount); | |
| 68 | + new_ldt->size = size; | |
| 69 | + return new_ldt; | |
| 70 | +} | |
| 56 | 71 | |
| 57 | −#ifdef CONFIG_X86_64 | |
| 58 | − /* CHECKME: Do we really need this ? */ | |
| 59 | − wmb(); | |
| 60 | −#endif | |
| 61 | − pc->ldt = newldt; | |
| 62 | − wmb(); | |
| 63 | − pc->size = mincount; | |
| 64 | − wmb(); | |
| 65 | − | |
| 66 | − if (reload) { | |
| 67 | −#ifdef CONFIG_SMP | |
| 68 | − preempt_disable(); | |
| 69 | − load_LDT(pc); | |
| 70 | − if (!cpumask_equal(mm_cpumask(current->mm), | |
| 71 | − cpumask_of(smp_processor_id()))) | |
| 72 | − smp_call_function(flush_ldt, current->mm, 1); | |
| 73 | − preempt_enable(); | |
| 74 | −#else | |
| 75 | − load_LDT(pc); | |
| 76 | −#endif | |
| 77 | − } | |
| 78 | − if (oldsize) { | |
| 79 | − paravirt_free_ldt(oldldt, oldsize); | |
| 80 | − if (oldsize * LDT_ENTRY_SIZE > PAGE_SIZE) | |
| 81 | − vfree(oldldt); | |
| 82 | − else | |
| 83 | − put_page(virt_to_page(oldldt)); | |
| 84 | − } | |
| 85 | − return 0; | |
| 72 | +/* After calling this, the LDT is immutable. */ | |
| 73 | +static void finalize_ldt_struct(struct ldt_struct *ldt) | |
| 74 | +{ | |
| 75 | + paravirt_alloc_ldt(ldt->entries, ldt->size); | |
| 86 | 76 | } |
| 87 | 77 | |
| 88 | −static inline int copy_ldt(mm_context_t *new, mm_context_t *old) | |
| 78 | +/* context.lock is held */ | |
| 79 | +static void install_ldt(struct mm_struct *current_mm, | |
| 80 | + struct ldt_struct *ldt) | |
| 89 | 81 | { |
| 90 | − int err = alloc_ldt(new, old->size, 0); | |
| 91 | − int i; | |
| 82 | + /* Synchronizes with lockless_dereference in load_mm_ldt. */ | |
| 83 | + smp_store_release(¤t_mm->context.ldt, ldt); | |
| 84 | + | |
| 85 | + /* Activate the LDT for all CPUs using current_mm. */ | |
| 86 | + on_each_cpu_mask(mm_cpumask(current_mm), flush_ldt, current_mm, true); | |
| 87 | +} | |
| 92 | 88 | |
| 93 | − if (err < 0) | |
| 94 | − return err; | |
| 89 | +static void free_ldt_struct(struct ldt_struct *ldt) | |
| 90 | +{ | |
| 91 | + if (likely(!ldt)) | |
| 92 | + return; | |
| 95 | 93 | |
| 96 | − for (i = 0; i < old->size; i++) | |
| 97 | − write_ldt_entry(new->ldt, i, old->ldt + i * LDT_ENTRY_SIZE); | |
| 98 | − return 0; | |
| 94 | + paravirt_free_ldt(ldt->entries, ldt->size); | |
| 95 | + if (ldt->size * LDT_ENTRY_SIZE > PAGE_SIZE) | |
| 96 | + vfree(ldt->entries); | |
| 97 | + else | |
| 98 | + kfree(ldt->entries); | |
| 99 | + kfree(ldt); | |
| 99 | 100 | } |
| 100 | 101 | |
| 101 | 102 | /* |
| @@ -104,17 +105,37 @@ static inline int copy_ldt(mm_context_t *new, mm_context_t *old) · 2 unmodified lines | ||
| 104 | 105 | */ |
| 105 | 106 | int init_new_context(struct task_struct *tsk, struct mm_struct *mm) |
| 106 | 107 | { |
| 108 | + struct ldt_struct *new_ldt; | |
| 107 | 109 | struct mm_struct *old_mm; |
| 108 | 110 | int retval = 0; |
| 109 | 111 | |
| 110 | 112 | mutex_init(&mm->context.lock); |
| 111 | − mm->context.size = 0; | |
| 112 | 113 | old_mm = current->mm; |
| 113 | − if (old_mm && old_mm->context.size > 0) { | |
| 114 | − mutex_lock(&old_mm->context.lock); | |
| 115 | − retval = copy_ldt(&mm->context, &old_mm->context); | |
| 116 | − mutex_unlock(&old_mm->context.lock); | |
| 114 | + if (!old_mm) { | |
| 115 | + mm->context.ldt = NULL; | |
| 116 | + return 0; | |
| 117 | 117 | } |
| 118 | + | |
| 119 | + mutex_lock(&old_mm->context.lock); | |
| 120 | + if (!old_mm->context.ldt) { | |
| 121 | + mm->context.ldt = NULL; | |
| 122 | + goto out_unlock; | |
| 123 | + } | |
| 124 | + | |
| 125 | + new_ldt = alloc_ldt_struct(old_mm->context.ldt->size); | |
| 126 | + if (!new_ldt) { | |
| 127 | + retval = -ENOMEM; | |
| 128 | + goto out_unlock; | |
| 129 | + } | |
| 130 | + | |
| 131 | + memcpy(new_ldt->entries, old_mm->context.ldt->entries, | |
| 132 | + new_ldt->size * LDT_ENTRY_SIZE); | |
| 133 | + finalize_ldt_struct(new_ldt); | |
| 134 | + | |
| 135 | + mm->context.ldt = new_ldt; | |
| 136 | + | |
| 137 | +out_unlock: | |
| 138 | + mutex_unlock(&old_mm->context.lock); | |
| 118 | 139 | return retval; |
| 119 | 140 | } |
| 120 | 141 | |
| @@ -125,53 +146,47 @@ int init_new_context(struct task_struct *tsk, struct mm_struct *mm) · 4 unmodified lines | ||
| 125 | 146 | */ |
| 126 | 147 | void destroy_context(struct mm_struct *mm) |
| 127 | 148 | { |
| 128 | − if (mm->context.size) { | |
| 129 | −#ifdef CONFIG_X86_32 | |
| 130 | − /* CHECKME: Can this ever happen ? */ | |
| 131 | − if (mm == current->active_mm) | |
| 132 | − clear_LDT(); | |
| 133 | −#endif | |
| 134 | − paravirt_free_ldt(mm->context.ldt, mm->context.size); | |
| 135 | − if (mm->context.size * LDT_ENTRY_SIZE > PAGE_SIZE) | |
| 136 | − vfree(mm->context.ldt); | |
| 137 | − else | |
| 138 | − put_page(virt_to_page(mm->context.ldt)); | |
| 139 | − mm->context.size = 0; | |
| 140 | − } | |
| 149 | + free_ldt_struct(mm->context.ldt); | |
| 150 | + mm->context.ldt = NULL; | |
| 141 | 151 | } |
| 142 | 152 | |
| 143 | 153 | static int read_ldt(void __user *ptr, unsigned long bytecount) |
| 144 | 154 | { |
| 145 | − int err; | |
| 155 | + int retval; | |
| 146 | 156 | unsigned long size; |
| 147 | 157 | struct mm_struct *mm = current->mm; |
| 148 | 158 | |
| 149 | − if (!mm->context.size) | |
| 150 | − return 0; | |
| 159 | + mutex_lock(&mm->context.lock); | |
| 160 | + | |
| 161 | + if (!mm->context.ldt) { | |
| 162 | + retval = 0; | |
| 163 | + goto out_unlock; | |
| 164 | + } | |
| 165 | + | |
| 151 | 166 | if (bytecount > LDT_ENTRY_SIZE * LDT_ENTRIES) |
| 152 | 167 | bytecount = LDT_ENTRY_SIZE * LDT_ENTRIES; |
| 153 | 168 | |
| 154 | − mutex_lock(&mm->context.lock); | |
| 155 | − size = mm->context.size * LDT_ENTRY_SIZE; | |
| 169 | + size = mm->context.ldt->size * LDT_ENTRY_SIZE; | |
| 156 | 170 | if (size > bytecount) |
| 157 | 171 | size = bytecount; |
| 158 | 172 | |
| 159 | − err = 0; | |
| 160 | − if (copy_to_user(ptr, mm->context.ldt, size)) | |
| 161 | − err = -EFAULT; | |
| 162 | − mutex_unlock(&mm->context.lock); | |
| 163 | − if (err < 0) | |
| 164 | − goto error_return; | |
| 173 | + if (copy_to_user(ptr, mm->context.ldt->entries, size)) { | |
| 174 | + retval = -EFAULT; | |
| 175 | + goto out_unlock; | |
| 176 | + } | |
| 177 | + | |
| 165 | 178 | if (size != bytecount) { |
| 166 | − /* zero-fill the rest */ | |
| 167 | − if (clear_user(ptr + size, bytecount - size) != 0) { | |
| 168 | − err = -EFAULT; | |
| 169 | − goto error_return; | |
| 179 | + /* Zero-fill the rest and pretend we read bytecount bytes. */ | |
| 180 | + if (clear_user(ptr + size, bytecount - size)) { | |
| 181 | + retval = -EFAULT; | |
| 182 | + goto out_unlock; | |
| 170 | 183 | } |
| 171 | 184 | } |
| 172 | − return bytecount; | |
| 173 | −error_return: | |
| 174 | − return err; | |
| 185 | + retval = bytecount; | |
| 186 | + | |
| 187 | +out_unlock: | |
| 188 | + mutex_unlock(&mm->context.lock); | |
| 189 | + return retval; | |
| 175 | 190 | } |
| 176 | 191 | |
| 177 | 192 | static int read_default_ldt(void __user *ptr, unsigned long bytecount) |
| @@ -195,6 +210,8 @@ static int write_ldt(void __user *ptr, unsigned long bytecount, int oldmode) · 17 unmodified lines | ||
| 195 | 210 | struct desc_struct ldt; |
| 196 | 211 | int error; |
| 197 | 212 | struct user_desc ldt_info; |
| 213 | + int oldsize, newsize; | |
| 214 | + struct ldt_struct *new_ldt, *old_ldt; | |
| 198 | 215 | |
| 199 | 216 | error = -EINVAL; |
| 200 | 217 | if (bytecount != sizeof(ldt_info)) |
| @@ -213,34 +230,39 @@ static int write_ldt(void __user *ptr, unsigned long bytecount, int oldmode) · 12 unmodified lines | ||
| 213 | 230 | goto out; |
| 214 | 231 | } |
| 215 | 232 | |
| 216 | − mutex_lock(&mm->context.lock); | |
| 217 | − if (ldt_info.entry_number >= mm->context.size) { | |
| 218 | − error = alloc_ldt(¤t->mm->context, | |
| 219 | − ldt_info.entry_number + 1, 1); | |
| 220 | − if (error < 0) | |
| 221 | − goto out_unlock; | |
| 222 | − } | |
| 223 | − | |
| 224 | − /* Allow LDTs to be cleared by the user. */ | |
| 225 | − if (ldt_info.base_addr == 0 && ldt_info.limit == 0) { | |
| 226 | − if (oldmode || LDT_empty(&ldt_info)) { | |
| 227 | − memset(&ldt, 0, sizeof(ldt)); | |
| 228 | − goto install; | |
| 233 | + if ((oldmode && !ldt_info.base_addr && !ldt_info.limit) || | |
| 234 | + LDT_empty(&ldt_info)) { | |
| 235 | + /* The user wants to clear the entry. */ | |
| 236 | + memset(&ldt, 0, sizeof(ldt)); | |
| 237 | + } else { | |
| 238 | + if (!IS_ENABLED(CONFIG_X86_16BIT) && !ldt_info.seg_32bit) { | |
| 239 | + error = -EINVAL; | |
| 240 | + goto out; | |
| 229 | 241 | } |
| 242 | + | |
| 243 | + fill_ldt(&ldt, &ldt_info); | |
| 244 | + if (oldmode) | |
| 245 | + ldt.avl = 0; | |
| 230 | 246 | } |
| 231 | 247 | |
| 232 | − if (!IS_ENABLED(CONFIG_X86_16BIT) && !ldt_info.seg_32bit) { | |
| 233 | − error = -EINVAL; | |
| 248 | + mutex_lock(&mm->context.lock); | |
| 249 | + | |
| 250 | + old_ldt = mm->context.ldt; | |
| 251 | + oldsize = old_ldt ? old_ldt->size : 0; | |
| 252 | + newsize = max((int)(ldt_info.entry_number + 1), oldsize); | |
| 253 | + | |
| 254 | + error = -ENOMEM; | |
| 255 | + new_ldt = alloc_ldt_struct(newsize); | |
| 256 | + if (!new_ldt) | |
| 234 | 257 | goto out_unlock; |
| 235 | − } | |
| 236 | 258 | |
| 237 | − fill_ldt(&ldt, &ldt_info); | |
| 238 | − if (oldmode) | |
| 239 | − ldt.avl = 0; | |
| 259 | + if (old_ldt) | |
| 260 | + memcpy(new_ldt->entries, old_ldt->entries, oldsize * LDT_ENTRY_SIZE); | |
| 261 | + new_ldt->entries[ldt_info.entry_number] = ldt; | |
| 262 | + finalize_ldt_struct(new_ldt); | |
| 240 | 263 | |
| 241 | − /* Install the new entry ... */ | |
| 242 | −install: | |
| 243 | − write_ldt_entry(mm->context.ldt, ldt_info.entry_number, &ldt); | |
| 264 | + install_ldt(mm, new_ldt); | |
| 265 | + free_ldt_struct(old_ldt); | |
| 244 | 266 | error = 0; |
| 245 | 267 | |
| 246 | 268 | out_unlock: |
| @@ -121,11 +121,11 @@ void __show_regs(struct pt_regs *regs, int all) · 120 unmodified lines | ||
| 121 | 121 | void release_thread(struct task_struct *dead_task) |
| 122 | 122 | { |
| 123 | 123 | if (dead_task->mm) { |
| 124 | − if (dead_task->mm->context.size) { | |
| 124 | + if (dead_task->mm->context.ldt) { | |
| 125 | 125 | pr_warn("WARNING: dead process %s still has LDT? <%p/%d>\n", |
| 126 | 126 | dead_task->comm, |
| 127 | 127 | dead_task->mm->context.ldt, |
| 128 | − dead_task->mm->context.size); | |
| 128 | + dead_task->mm->context.ldt->size); | |
| 129 | 129 | BUG(); |
| 130 | 130 | } |
| 131 | 131 | } |
| @@ -93,8 +93,15 @@ int restore_sigcontext(struct pt_regs *regs, struct sigcontext __user *sc) · 92 unmodified lines | ||
| 93 | 93 | COPY(r15); |
| 94 | 94 | #endif /* CONFIG_X86_64 */ |
| 95 | 95 | |
| 96 | +#ifdef CONFIG_X86_32 | |
| 96 | 97 | COPY_SEG_CPL3(cs); |
| 97 | 98 | COPY_SEG_CPL3(ss); |
| 99 | +#else /* !CONFIG_X86_32 */ | |
| 100 | + /* Kernel saves and restores only the CS segment register on signals, | |
| 101 | + * which is the bare minimum needed to allow mixed 32/64-bit code. | |
| 102 | + * App's signal handler can save/restore other segments if needed. */ | |
| 103 | + COPY_SEG_CPL3(cs); | |
| 104 | +#endif /* CONFIG_X86_32 */ | |
| 98 | 105 | |
| 99 | 106 | get_user_ex(tmpflags, &sc->flags); |
| 100 | 107 | regs->flags = (regs->flags & ~FIX_EFLAGS) | (tmpflags & FIX_EFLAGS); |
| @@ -154,9 +161,8 @@ int setup_sigcontext(struct sigcontext __user *sc, void __user *fpstate, · 53 unmodified lines | ||
| 154 | 161 | #else /* !CONFIG_X86_32 */ |
| 155 | 162 | put_user_ex(regs->flags, &sc->flags); |
| 156 | 163 | put_user_ex(regs->cs, &sc->cs); |
| 157 | − put_user_ex(0, &sc->__pad2); | |
| 158 | − put_user_ex(0, &sc->__pad1); | |
| 159 | − put_user_ex(regs->ss, &sc->ss); | |
| 164 | + put_user_ex(0, &sc->gs); | |
| 165 | + put_user_ex(0, &sc->fs); | |
| 160 | 166 | #endif /* CONFIG_X86_32 */ |
| 161 | 167 | |
| 162 | 168 | put_user_ex(fpstate, &sc->fpstate); |
| @@ -451,19 +457,9 @@ static int __setup_rt_frame(int sig, struct ksignal *ksig, · 288 unmodified lines | ||
| 451 | 457 | |
| 452 | 458 | regs->sp = (unsigned long)frame; |
| 453 | 459 | |
| 454 | − /* | |
| 455 | − * Set up the CS and SS registers to run signal handlers in | |
| 456 | − * 64-bit mode, even if the handler happens to be interrupting | |
| 457 | − * 32-bit or 16-bit code. | |
| 458 | − * | |
| 459 | − * SS is subtle. In 64-bit mode, we don't need any particular | |
| 460 | − * SS descriptor, but we do need SS to be valid. It's possible | |
| 461 | − * that the old SS is entirely bogus -- this can happen if the | |
| 462 | − * signal we're trying to deliver is #GP or #SS caused by a bad | |
| 463 | − * SS value. | |
| 464 | − */ | |
| 460 | + /* Set up the CS register to run signal handlers in 64-bit mode, | |
| 461 | + even if the handler happens to be interrupting 32-bit code. */ | |
| 465 | 462 | regs->cs = __USER_CS; |
| 466 | − regs->ss = __USER_DS; | |
| 467 | 463 | |
| 468 | 464 | return 0; |
| 469 | 465 | } |
| @@ -5,6 +5,7 @@ · 4 unmodified lines | ||
| 5 | 5 | #include <linux/mm.h> |
| 6 | 6 | #include <linux/ptrace.h> |
| 7 | 7 | #include <asm/desc.h> |
| 8 | +#include <asm/mmu_context.h> | |
| 8 | 9 | |
| 9 | 10 | unsigned long convert_ip_to_linear(struct task_struct *child, struct pt_regs *regs) |
| 10 | 11 | { |
| @@ -27,13 +28,14 @@ unsigned long convert_ip_to_linear(struct task_struct *child, struct pt_regs *re · 16 unmodified lines | ||
| 27 | 28 | struct desc_struct *desc; |
| 28 | 29 | unsigned long base; |
| 29 | 30 | |
| 30 | − seg &= ~7UL; | |
| 31 | + seg >>= 3; | |
| 31 | 32 | |
| 32 | 33 | mutex_lock(&child->mm->context.lock); |
| 33 | − if (unlikely((seg >> 3) >= child->mm->context.size)) | |
| 34 | + if (unlikely(!child->mm->context.ldt || | |
| 35 | + seg >= child->mm->context.ldt->size)) | |
| 34 | 36 | addr = -1L; /* bogus selector, access would fault */ |
| 35 | 37 | else { |
| 36 | − desc = child->mm->context.ldt + seg; | |
| 38 | + desc = &child->mm->context.ldt->entries[seg]; | |
| 37 | 39 | base = get_desc_base(desc); |
| 38 | 40 | |
| 39 | 41 | /* 16-bit code segment? */ |
| @@ -1595,7 +1595,7 @@ void kvm_lapic_reset(struct kvm_vcpu *vcpu, bool init_event) · 1594 unmodified lines | ||
| 1595 | 1595 | for (i = 0; i < APIC_LVT_NUM; i++) |
| 1596 | 1596 | apic_set_reg(apic, APIC_LVTT + 0x10 * i, APIC_LVT_MASKED); |
| 1597 | 1597 | apic_update_lvtt(apic); |
| 1598 | − if (!(vcpu->kvm->arch.disabled_quirks & KVM_QUIRK_LINT0_REENABLED)) | |
| 1598 | + if (kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_LINT0_REENABLED)) | |
| 1599 | 1599 | apic_set_reg(apic, APIC_LVT0, |
| 1600 | 1600 | SET_APIC_DELIVERY_MODE(0, APIC_MODE_EXTINT)); |
| 1601 | 1601 | apic_manage_nmi_watchdog(apic, kvm_apic_get_reg(apic, APIC_LVT0)); |
| @@ -120,6 +120,16 @@ static u8 mtrr_default_type(struct kvm_mtrr *mtrr_state) · 119 unmodified lines | ||
| 120 | 120 | return mtrr_state->deftype & IA32_MTRR_DEF_TYPE_TYPE_MASK; |
| 121 | 121 | } |
| 122 | 122 | |
| 123 | +static u8 mtrr_disabled_type(void) | |
| 124 | +{ | |
| 125 | + /* | |
| 126 | + * Intel SDM 11.11.2.2: all MTRRs are disabled when | |
| 127 | + * IA32_MTRR_DEF_TYPE.E bit is cleared, and the UC | |
| 128 | + * memory type is applied to all of physical memory. | |
| 129 | + */ | |
| 130 | + return MTRR_TYPE_UNCACHABLE; | |
| 131 | +} | |
| 132 | + | |
| 123 | 133 | /* |
| 124 | 134 | * Three terms are used in the following code: |
| 125 | 135 | * - segment, it indicates the address segments covered by fixed MTRRs. |
| @@ -434,6 +444,8 @@ struct mtrr_iter { · 308 unmodified lines | ||
| 434 | 444 | |
| 435 | 445 | /* output fields. */ |
| 436 | 446 | int mem_type; |
| 447 | + /* mtrr is completely disabled? */ | |
| 448 | + bool mtrr_disabled; | |
| 437 | 449 | /* [start, end) is not fully covered in MTRRs? */ |
| 438 | 450 | bool partial_map; |
| 439 | 451 | |
| @@ -549,7 +561,7 @@ static void mtrr_lookup_var_next(struct mtrr_iter *iter) · 109 unmodified lines | ||
| 549 | 561 | static void mtrr_lookup_start(struct mtrr_iter *iter) |
| 550 | 562 | { |
| 551 | 563 | if (!mtrr_is_enabled(iter->mtrr_state)) { |
| 552 | − iter->partial_map = true; | |
| 564 | + iter->mtrr_disabled = true; | |
| 553 | 565 | return; |
| 554 | 566 | } |
| 555 | 567 | |
| @@ -563,6 +575,7 @@ static void mtrr_lookup_init(struct mtrr_iter *iter, · 7 unmodified lines | ||
| 563 | 575 | iter->mtrr_state = mtrr_state; |
| 564 | 576 | iter->start = start; |
| 565 | 577 | iter->end = end; |
| 578 | + iter->mtrr_disabled = false; | |
| 566 | 579 | iter->partial_map = false; |
| 567 | 580 | iter->fixed = false; |
| 568 | 581 | iter->range = NULL; |
| @@ -656,15 +669,19 @@ u8 kvm_mtrr_get_guest_memory_type(struct kvm_vcpu *vcpu, gfn_t gfn) · 87 unmodified lines | ||
| 656 | 669 | return MTRR_TYPE_WRBACK; |
| 657 | 670 | } |
| 658 | 671 | |
| 659 | − /* It is not covered by MTRRs. */ | |
| 660 | − if (iter.partial_map) { | |
| 661 | − /* | |
| 662 | − * We just check one page, partially covered by MTRRs is | |
| 663 | − * impossible. | |
| 664 | − */ | |
| 665 | − WARN_ON(type != -1); | |
| 666 | − type = mtrr_default_type(mtrr_state); | |
| 667 | − } | |
| 672 | + if (iter.mtrr_disabled) | |
| 673 | + return mtrr_disabled_type(); | |
| 674 | + | |
| 675 | + /* not contained in any MTRRs. */ | |
| 676 | + if (type == -1) | |
| 677 | + return mtrr_default_type(mtrr_state); | |
| 678 | + | |
| 679 | + /* | |
| 680 | + * We just check one page, partially covered by MTRRs is | |
| 681 | + * impossible. | |
| 682 | + */ | |
| 683 | + WARN_ON(iter.partial_map); | |
| 684 | + | |
| 668 | 685 | return type; |
| 669 | 686 | } |
| 670 | 687 | EXPORT_SYMBOL_GPL(kvm_mtrr_get_guest_memory_type); |
| @@ -689,6 +706,9 @@ bool kvm_mtrr_check_gfn_range_consistency(struct kvm_vcpu *vcpu, gfn_t gfn, · 18 unmodified lines | ||
| 689 | 706 | return false; |
| 690 | 707 | } |
| 691 | 708 | |
| 709 | + if (iter.mtrr_disabled) | |
| 710 | + return true; | |
| 711 | + | |
| 692 | 712 | if (!iter.partial_map) |
| 693 | 713 | return true; |
| 694 | 714 | |
| @@ -1672,7 +1672,7 @@ static void svm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0) · 1671 unmodified lines | ||
| 1672 | 1672 | * does not do it - this results in some delay at |
| 1673 | 1673 | * reboot |
| 1674 | 1674 | */ |
| 1675 | − if (!(vcpu->kvm->arch.disabled_quirks & KVM_QUIRK_CD_NW_CLEARED)) | |
| 1675 | + if (kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_CD_NW_CLEARED)) | |
| 1676 | 1676 | cr0 &= ~(X86_CR0_CD | X86_CR0_NW); |
| 1677 | 1677 | svm->vmcb->save.cr0 = cr0; |
| 1678 | 1678 | mark_dirty(svm->vmcb, VMCB_CR); |
| @@ -8650,7 +8650,10 @@ static u64 vmx_get_mt_mask(struct kvm_vcpu *vcpu, gfn_t gfn, bool is_mmio) · 8649 unmodified lines | ||
| 8650 | 8650 | |
| 8651 | 8651 | if (kvm_read_cr0(vcpu) & X86_CR0_CD) { |
| 8652 | 8652 | ipat = VMX_EPT_IPAT_BIT; |
| 8653 | − cache = MTRR_TYPE_UNCACHABLE; | |
| 8653 | + if (kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_CD_NW_CLEARED)) | |
| 8654 | + cache = MTRR_TYPE_WRBACK; | |
| 8655 | + else | |
| 8656 | + cache = MTRR_TYPE_UNCACHABLE; | |
| 8654 | 8657 | goto exit; |
| 8655 | 8658 | } |
| 8656 | 8659 | |
| @@ -2105,7 +2105,7 @@ int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info) · 2104 unmodified lines | ||
| 2105 | 2105 | if (guest_cpuid_has_tsc_adjust(vcpu)) { |
| 2106 | 2106 | if (!msr_info->host_initiated) { |
| 2107 | 2107 | s64 adj = data - vcpu->arch.ia32_tsc_adjust_msr; |
| 2108 | − kvm_x86_ops->adjust_tsc_offset(vcpu, adj, true); | |
| 2108 | + adjust_tsc_offset_guest(vcpu, adj); | |
| 2109 | 2109 | } |
| 2110 | 2110 | vcpu->arch.ia32_tsc_adjust_msr = data; |
| 2111 | 2111 | } |
| @@ -6327,6 +6327,7 @@ static void process_smi_save_state_64(struct kvm_vcpu *vcpu, char *buf) · 4215 unmodified lines | ||
| 6327 | 6327 | static void process_smi(struct kvm_vcpu *vcpu) |
| 6328 | 6328 | { |
| 6329 | 6329 | struct kvm_segment cs, ds; |
| 6330 | + struct desc_ptr dt; | |
| 6330 | 6331 | char buf[512]; |
| 6331 | 6332 | u32 cr0; |
| 6332 | 6333 | |
| @@ -6359,6 +6360,10 @@ static void process_smi(struct kvm_vcpu *vcpu) · 26 unmodified lines | ||
| 6359 | 6360 | |
| 6360 | 6361 | kvm_x86_ops->set_cr4(vcpu, 0); |
| 6361 | 6362 | |
| 6363 | + /* Undocumented: IDT limit is set to zero on entry to SMM. */ | |
| 6364 | + dt.address = dt.size = 0; | |
| 6365 | + kvm_x86_ops->set_idt(vcpu, &dt); | |
| 6366 | + | |
| 6362 | 6367 | __kvm_set_dr(vcpu, 7, DR7_FIXED_1); |
| 6363 | 6368 | |
| 6364 | 6369 | cs.selector = (vcpu->arch.smbase >> 4) & 0xffff; |
| @@ -147,6 +147,11 @@ static inline void kvm_register_writel(struct kvm_vcpu *vcpu, · 146 unmodified lines | ||
| 147 | 147 | return kvm_register_write(vcpu, reg, val); |
| 148 | 148 | } |
| 149 | 149 | |
| 150 | +static inline bool kvm_check_has_quirk(struct kvm *kvm, u64 quirk) | |
| 151 | +{ | |
| 152 | + return !(kvm->arch.disabled_quirks & quirk); | |
| 153 | +} | |
| 154 | + | |
| 150 | 155 | void kvm_before_handle_nmi(struct kvm_vcpu *vcpu); |
| 151 | 156 | void kvm_after_handle_nmi(struct kvm_vcpu *vcpu); |
| 152 | 157 | void kvm_set_pending_timer(struct kvm_vcpu *vcpu); |
| @@ -29,7 +29,6 @@ · 28 unmodified lines | ||
| 29 | 29 | |
| 30 | 30 | #include <asm/uaccess.h> |
| 31 | 31 | #include <asm/traps.h> |
| 32 | −#include <asm/desc.h> | |
| 33 | 32 | #include <asm/user.h> |
| 34 | 33 | #include <asm/fpu/internal.h> |
| 35 | 34 | |
| @@ -181,7 +180,7 @@ void math_emulate(struct math_emu_info *info) · 145 unmodified lines | ||
| 181 | 180 | math_abort(FPU_info, SIGILL); |
| 182 | 181 | } |
| 183 | 182 | |
| 184 | − code_descriptor = LDT_DESCRIPTOR(FPU_CS); | |
| 183 | + code_descriptor = FPU_get_ldt_descriptor(FPU_CS); | |
| 185 | 184 | if (SEG_D_SIZE(code_descriptor)) { |
| 186 | 185 | /* The above test may be wrong, the book is not clear */ |
| 187 | 186 | /* Segmented 32 bit protected mode */ |
| @@ -16,9 +16,24 @@ · 15 unmodified lines | ||
| 16 | 16 | #include <linux/kernel.h> |
| 17 | 17 | #include <linux/mm.h> |
| 18 | 18 | |
| 19 | −/* s is always from a cpu register, and the cpu does bounds checking | |
| 20 | − * during register load --> no further bounds checks needed */ | |
| 21 | −#define LDT_DESCRIPTOR(s) (((struct desc_struct *)current->mm->context.ldt)[(s) >> 3]) | |
| 19 | +#include <asm/desc.h> | |
| 20 | +#include <asm/mmu_context.h> | |
| 21 | + | |
| 22 | +static inline struct desc_struct FPU_get_ldt_descriptor(unsigned seg) | |
| 23 | +{ | |
| 24 | + static struct desc_struct zero_desc; | |
| 25 | + struct desc_struct ret = zero_desc; | |
| 26 | + | |
| 27 | +#ifdef CONFIG_MODIFY_LDT_SYSCALL | |
| 28 | + seg >>= 3; | |
| 29 | + mutex_lock(¤t->mm->context.lock); | |
| 30 | + if (current->mm->context.ldt && seg < current->mm->context.ldt->size) | |
| 31 | + ret = current->mm->context.ldt->entries[seg]; | |
| 32 | + mutex_unlock(¤t->mm->context.lock); | |
| 33 | +#endif | |
| 34 | + return ret; | |
| 35 | +} | |
| 36 | + | |
| 22 | 37 | #define SEG_D_SIZE(x) ((x).b & (3 << 21)) |
| 23 | 38 | #define SEG_G_BIT(x) ((x).b & (1 << 23)) |
| 24 | 39 | #define SEG_GRANULARITY(x) (((x).b & (1 << 23)) ? 4096 : 1) |
| @@ -20,7 +20,6 @@ · 19 unmodified lines | ||
| 20 | 20 | #include <linux/stddef.h> |
| 21 | 21 | |
| 22 | 22 | #include <asm/uaccess.h> |
| 23 | −#include <asm/desc.h> | |
| 24 | 23 | |
| 25 | 24 | #include "fpu_system.h" |
| 26 | 25 | #include "exception.h" |
| @@ -158,7 +157,7 @@ static long pm_address(u_char FPU_modrm, u_char segment, · 131 unmodified lines | ||
| 158 | 157 | addr->selector = PM_REG_(segment); |
| 159 | 158 | } |
| 160 | 159 | |
| 161 | − descriptor = LDT_DESCRIPTOR(PM_REG_(segment)); | |
| 160 | + descriptor = FPU_get_ldt_descriptor(addr->selector); | |
| 162 | 161 | base_address = SEG_BASE_ADDR(descriptor); |
| 163 | 162 | address = base_address + offset; |
| 164 | 163 | limit = base_address |
| @@ -63,8 +63,6 @@ static int __ioremap_check_ram(unsigned long start_pfn, unsigned long nr_pages, · 62 unmodified lines | ||
| 63 | 63 | !PageReserved(pfn_to_page(start_pfn + i))) |
| 64 | 64 | return 1; |
| 65 | 65 | |
| 66 | − WARN_ONCE(1, "ioremap on RAM pfn 0x%lx\n", start_pfn); | |
| 67 | − | |
| 68 | 66 | return 0; |
| 69 | 67 | } |
| 70 | 68 | |
| @@ -94,7 +92,6 @@ static void __iomem *__ioremap_caller(resource_size_t phys_addr, · 23 unmodified lines | ||
| 94 | 92 | pgprot_t prot; |
| 95 | 93 | int retval; |
| 96 | 94 | void __iomem *ret_addr; |
| 97 | − int ram_region; | |
| 98 | 95 | |
| 99 | 96 | /* Don't allow wraparound or zero size */ |
| 100 | 97 | last_addr = phys_addr + size - 1; |
| @@ -117,23 +114,15 @@ static void __iomem *__ioremap_caller(resource_size_t phys_addr, · 16 unmodified lines | ||
| 117 | 114 | /* |
| 118 | 115 | * Don't allow anybody to remap normal RAM that we're using.. |
| 119 | 116 | */ |
| 120 | − /* First check if whole region can be identified as RAM or not */ | |
| 121 | − ram_region = region_is_ram(phys_addr, size); | |
| 122 | − if (ram_region > 0) { | |
| 123 | − WARN_ONCE(1, "ioremap on RAM at 0x%lx - 0x%lx\n", | |
| 124 | − (unsigned long int)phys_addr, | |
| 125 | − (unsigned long int)last_addr); | |
| 117 | + pfn = phys_addr >> PAGE_SHIFT; | |
| 118 | + last_pfn = last_addr >> PAGE_SHIFT; | |
| 119 | + if (walk_system_ram_range(pfn, last_pfn - pfn + 1, NULL, | |
| 120 | + __ioremap_check_ram) == 1) { | |
| 121 | + WARN_ONCE(1, "ioremap on RAM at %pa - %pa\n", | |
| 122 | + &phys_addr, &last_addr); | |
| 126 | 123 | return NULL; |
| 127 | 124 | } |
| 128 | 125 | |
| 129 | − /* If could not be identified(-1), check page by page */ | |
| 130 | − if (ram_region < 0) { | |
| 131 | − pfn = phys_addr >> PAGE_SHIFT; | |
| 132 | − last_pfn = last_addr >> PAGE_SHIFT; | |
| 133 | − if (walk_system_ram_range(pfn, last_pfn - pfn + 1, NULL, | |
| 134 | − __ioremap_check_ram) == 1) | |
| 135 | − return NULL; | |
| 136 | − } | |
| 137 | 126 | /* |
| 138 | 127 | * Mappings have to be page-aligned |
| 139 | 128 | */ |
| @@ -126,3 +126,10 @@ void arch_pick_mmap_layout(struct mm_struct *mm) · 125 unmodified lines | ||
| 126 | 126 | mm->get_unmapped_area = arch_get_unmapped_area_topdown; |
| 127 | 127 | } |
| 128 | 128 | } |
| 129 | + | |
| 130 | +const char *arch_vma_name(struct vm_area_struct *vma) | |
| 131 | +{ | |
| 132 | + if (vma->vm_flags & VM_MPX) | |
| 133 | + return "[mpx]"; | |
| 134 | + return NULL; | |
| 135 | +} | |
| @@ -20,20 +20,6 @@ · 19 unmodified lines | ||
| 20 | 20 | #define CREATE_TRACE_POINTS |
| 21 | 21 | #include <asm/trace/mpx.h> |
| 22 | 22 | |
| 23 | −static const char *mpx_mapping_name(struct vm_area_struct *vma) | |
| 24 | −{ | |
| 25 | − return "[mpx]"; | |
| 26 | −} | |
| 27 | − | |
| 28 | −static struct vm_operations_struct mpx_vma_ops = { | |
| 29 | − .name = mpx_mapping_name, | |
| 30 | −}; | |
| 31 | − | |
| 32 | −static int is_mpx_vma(struct vm_area_struct *vma) | |
| 33 | −{ | |
| 34 | − return (vma->vm_ops == &mpx_vma_ops); | |
| 35 | −} | |
| 36 | − | |
| 37 | 23 | static inline unsigned long mpx_bd_size_bytes(struct mm_struct *mm) |
| 38 | 24 | { |
| 39 | 25 | if (is_64bit_mm(mm)) |
| @@ -53,9 +39,6 @@ static inline unsigned long mpx_bt_size_bytes(struct mm_struct *mm) · 13 unmodified lines | ||
| 53 | 39 | /* |
| 54 | 40 | * This is really a simplified "vm_mmap". it only handles MPX |
| 55 | 41 | * bounds tables (the bounds directory is user-allocated). |
| 56 | − * | |
| 57 | − * Later on, we use the vma->vm_ops to uniquely identify these | |
| 58 | − * VMAs. | |
| 59 | 42 | */ |
| 60 | 43 | static unsigned long mpx_mmap(unsigned long len) |
| 61 | 44 | { |
| @@ -101,7 +84,6 @@ static unsigned long mpx_mmap(unsigned long len) · 39 unmodified lines | ||
| 101 | 84 | ret = -ENOMEM; |
| 102 | 85 | goto out; |
| 103 | 86 | } |
| 104 | − vma->vm_ops = &mpx_vma_ops; | |
| 105 | 87 | |
| 106 | 88 | if (vm_flags & VM_LOCKED) { |
| 107 | 89 | up_write(&mm->mmap_sem); |
| @@ -812,7 +794,7 @@ static noinline int zap_bt_entries_mapping(struct mm_struct *mm, · 704 unmodified lines | ||
| 812 | 794 | * so stop immediately and return an error. This |
| 813 | 795 | * probably results in a SIGSEGV. |
| 814 | 796 | */ |
| 815 | − if (!is_mpx_vma(vma)) | |
| 797 | + if (!(vma->vm_flags & VM_MPX)) | |
| 816 | 798 | return -EINVAL; |
| 817 | 799 | |
| 818 | 800 | len = min(vma->vm_end, end) - addr; |
| @@ -945,9 +927,9 @@ static int try_unmap_single_bt(struct mm_struct *mm, · 126 unmodified lines | ||
| 945 | 927 | * lots of tables even though we have no actual table |
| 946 | 928 | * entries in use. |
| 947 | 929 | */ |
| 948 | − while (next && is_mpx_vma(next)) | |
| 930 | + while (next && (next->vm_flags & VM_MPX)) | |
| 949 | 931 | next = next->vm_next; |
| 950 | − while (prev && is_mpx_vma(prev)) | |
| 932 | + while (prev && (prev->vm_flags & VM_MPX)) | |
| 951 | 933 | prev = prev->vm_prev; |
| 952 | 934 | /* |
| 953 | 935 | * We know 'start' and 'end' lie within an area controlled |
| @@ -117,7 +117,7 @@ static void flush_tlb_func(void *info) · 116 unmodified lines | ||
| 117 | 117 | } else { |
| 118 | 118 | unsigned long addr; |
| 119 | 119 | unsigned long nr_pages = |
| 120 | − f->flush_end - f->flush_start / PAGE_SIZE; | |
| 120 | + (f->flush_end - f->flush_start) / PAGE_SIZE; | |
| 121 | 121 | addr = f->flush_start; |
| 122 | 122 | while (addr < f->flush_end) { |
| 123 | 123 | __flush_tlb_single(addr); |
| @@ -269,7 +269,7 @@ static void emit_bpf_tail_call(u8 **pprog) · 268 unmodified lines | ||
| 269 | 269 | EMIT4(0x48, 0x8B, 0x46, /* mov rax, qword ptr [rsi + 16] */ |
| 270 | 270 | offsetof(struct bpf_array, map.max_entries)); |
| 271 | 271 | EMIT3(0x48, 0x39, 0xD0); /* cmp rax, rdx */ |
| 272 | −#define OFFSET1 44 /* number of bytes to jump */ | |
| 272 | +#define OFFSET1 47 /* number of bytes to jump */ | |
| 273 | 273 | EMIT2(X86_JBE, OFFSET1); /* jbe out */ |
| 274 | 274 | label1 = cnt; |
| 275 | 275 | |
| @@ -278,15 +278,15 @@ static void emit_bpf_tail_call(u8 **pprog) · 2 unmodified lines | ||
| 278 | 278 | */ |
| 279 | 279 | EMIT2_off32(0x8B, 0x85, -STACKSIZE + 36); /* mov eax, dword ptr [rbp - 516] */ |
| 280 | 280 | EMIT3(0x83, 0xF8, MAX_TAIL_CALL_CNT); /* cmp eax, MAX_TAIL_CALL_CNT */ |
| 281 | −#define OFFSET2 33 | |
| 281 | +#define OFFSET2 36 | |
| 282 | 282 | EMIT2(X86_JA, OFFSET2); /* ja out */ |
| 283 | 283 | label2 = cnt; |
| 284 | 284 | EMIT3(0x83, 0xC0, 0x01); /* add eax, 1 */ |
| 285 | 285 | EMIT2_off32(0x89, 0x85, -STACKSIZE + 36); /* mov dword ptr [rbp - 516], eax */ |
| 286 | 286 | |
| 287 | 287 | /* prog = array->prog[index]; */ |
| 288 | − EMIT4(0x48, 0x8D, 0x44, 0xD6); /* lea rax, [rsi + rdx * 8 + 0x50] */ | |
| 289 | − EMIT1(offsetof(struct bpf_array, prog)); | |
| 288 | + EMIT4_off32(0x48, 0x8D, 0x84, 0xD6, /* lea rax, [rsi + rdx * 8 + offsetof(...)] */ | |
| 289 | + offsetof(struct bpf_array, prog)); | |
| 290 | 290 | EMIT3(0x48, 0x8B, 0x00); /* mov rax, qword ptr [rax] */ |
| 291 | 291 | |
| 292 | 292 | /* if (prog == NULL) |
| @@ -972,6 +972,11 @@ u64 efi_mem_attributes(unsigned long phys_addr) · 971 unmodified lines | ||
| 972 | 972 | |
| 973 | 973 | static int __init arch_parse_efi_cmdline(char *str) |
| 974 | 974 | { |
| 975 | + if (!str) { | |
| 976 | + pr_warn("need at least one option\n"); | |
| 977 | + return -EINVAL; | |
| 978 | + } | |
| 979 | + | |
| 975 | 980 | if (parse_option_str(str, "old_map")) |
| 976 | 981 | set_bit(EFI_OLD_MEMMAP, &efi.flags); |
| 977 | 982 | if (parse_option_str(str, "debug")) |
| @@ -22,6 +22,7 @@ · 21 unmodified lines | ||
| 22 | 22 | #include <asm/fpu/internal.h> |
| 23 | 23 | #include <asm/debugreg.h> |
| 24 | 24 | #include <asm/cpu.h> |
| 25 | +#include <asm/mmu_context.h> | |
| 25 | 26 | |
| 26 | 27 | #ifdef CONFIG_X86_32 |
| 27 | 28 | __visible unsigned long saved_context_ebx; |
| @@ -153,7 +154,7 @@ static void fix_processor_context(void) · 125 unmodified lines | ||
| 153 | 154 | syscall_init(); /* This sets MSR_*STAR and related */ |
| 154 | 155 | #endif |
| 155 | 156 | load_TR_desc(); /* This does ltr */ |
| 156 | − load_LDT(¤t->active_mm->context); /* This does lldt */ | |
| 157 | + load_mm_ldt(current->active_mm); /* This does lldt */ | |
| 157 | 158 | |
| 158 | 159 | fpu__resume_cpu(); |
| 159 | 160 | } |
| @@ -13,13 +13,13 @@ CFLAGS_mmu.o := $(nostackp) · 12 unmodified lines | ||
| 13 | 13 | obj-y := enlighten.o setup.o multicalls.o mmu.o irq.o \ |
| 14 | 14 | time.o xen-asm.o xen-asm_$(BITS).o \ |
| 15 | 15 | grant-table.o suspend.o platform-pci-unplug.o \ |
| 16 | − p2m.o | |
| 16 | + p2m.o apic.o | |
| 17 | 17 | |
| 18 | 18 | obj-$(CONFIG_EVENT_TRACING) += trace.o |
| 19 | 19 | |
| 20 | 20 | obj-$(CONFIG_SMP) += smp.o |
| 21 | 21 | obj-$(CONFIG_PARAVIRT_SPINLOCKS)+= spinlock.o |
| 22 | 22 | obj-$(CONFIG_XEN_DEBUG_FS) += debugfs.o |
| 23 | −obj-$(CONFIG_XEN_DOM0) += apic.o vga.o | |
| 23 | +obj-$(CONFIG_XEN_DOM0) += vga.o | |
| 24 | 24 | obj-$(CONFIG_SWIOTLB_XEN) += pci-swiotlb-xen.o |
| 25 | 25 | obj-$(CONFIG_XEN_EFI) += efi.o |
| @@ -483,6 +483,7 @@ static void set_aliased_prot(void *v, pgprot_t prot) · 482 unmodified lines | ||
| 483 | 483 | pte_t pte; |
| 484 | 484 | unsigned long pfn; |
| 485 | 485 | struct page *page; |
| 486 | + unsigned char dummy; | |
| 486 | 487 | |
| 487 | 488 | ptep = lookup_address((unsigned long)v, &level); |
| 488 | 489 | BUG_ON(ptep == NULL); |
| @@ -492,6 +493,32 @@ static void set_aliased_prot(void *v, pgprot_t prot) · 3 unmodified lines | ||
| 492 | 493 | |
| 493 | 494 | pte = pfn_pte(pfn, prot); |
| 494 | 495 | |
| 496 | + /* | |
| 497 | + * Careful: update_va_mapping() will fail if the virtual address | |
| 498 | + * we're poking isn't populated in the page tables. We don't | |
| 499 | + * need to worry about the direct map (that's always in the page | |
| 500 | + * tables), but we need to be careful about vmap space. In | |
| 501 | + * particular, the top level page table can lazily propagate | |
| 502 | + * entries between processes, so if we've switched mms since we | |
| 503 | + * vmapped the target in the first place, we might not have the | |
| 504 | + * top-level page table entry populated. | |
| 505 | + * | |
| 506 | + * We disable preemption because we want the same mm active when | |
| 507 | + * we probe the target and when we issue the hypercall. We'll | |
| 508 | + * have the same nominal mm, but if we're a kernel thread, lazy | |
| 509 | + * mm dropping could change our pgd. | |
| 510 | + * | |
| 511 | + * Out of an abundance of caution, this uses __get_user() to fault | |
| 512 | + * in the target address just in case there's some obscure case | |
| 513 | + * in which the target address isn't readable. | |
| 514 | + */ | |
| 515 | + | |
| 516 | + preempt_disable(); | |
| 517 | + | |
| 518 | + pagefault_disable(); /* Avoid warnings due to being atomic. */ | |
| 519 | + __get_user(dummy, (unsigned char __user __force *)v); | |
| 520 | + pagefault_enable(); | |
| 521 | + | |
| 495 | 522 | if (HYPERVISOR_update_va_mapping((unsigned long)v, pte, 0)) |
| 496 | 523 | BUG(); |
| 497 | 524 | |
| @@ -503,6 +530,8 @@ static void set_aliased_prot(void *v, pgprot_t prot) · 5 unmodified lines | ||
| 503 | 530 | BUG(); |
| 504 | 531 | } else |
| 505 | 532 | kmap_flush_unused(); |
| 533 | + | |
| 534 | + preempt_enable(); | |
| 506 | 535 | } |
| 507 | 536 | |
| 508 | 537 | static void xen_alloc_ldt(struct desc_struct *ldt, unsigned entries) |
| @@ -510,6 +539,17 @@ static void xen_alloc_ldt(struct desc_struct *ldt, unsigned entries) · 1 unmodified line | ||
| 510 | 539 | const unsigned entries_per_page = PAGE_SIZE / LDT_ENTRY_SIZE; |
| 511 | 540 | int i; |
| 512 | 541 | |
| 542 | + /* | |
| 543 | + * We need to mark the all aliases of the LDT pages RO. We | |
| 544 | + * don't need to call vm_flush_aliases(), though, since that's | |
| 545 | + * only responsible for flushing aliases out the TLBs, not the | |
| 546 | + * page tables, and Xen will flush the TLB for us if needed. | |
| 547 | + * | |
| 548 | + * To avoid confusing future readers: none of this is necessary | |
| 549 | + * to load the LDT. The hypervisor only checks this when the | |
| 550 | + * LDT is faulted in due to subsequent descriptor access. | |
| 551 | + */ | |
| 552 | + | |
| 513 | 553 | for(i = 0; i < entries; i += entries_per_page) |
| 514 | 554 | set_aliased_prot(ldt + i, PAGE_KERNEL_RO); |
| 515 | 555 | } |
| @@ -101,17 +101,15 @@ struct dom0_vga_console_info; · 100 unmodified lines | ||
| 101 | 101 | |
| 102 | 102 | #ifdef CONFIG_XEN_DOM0 |
| 103 | 103 | void __init xen_init_vga(const struct dom0_vga_console_info *, size_t size); |
| 104 | −void __init xen_init_apic(void); | |
| 105 | 104 | #else |
| 106 | 105 | static inline void __init xen_init_vga(const struct dom0_vga_console_info *info, |
| 107 | 106 | size_t size) |
| 108 | 107 | { |
| 109 | 108 | } |
| 110 | −static inline void __init xen_init_apic(void) | |
| 111 | −{ | |
| 112 | −} | |
| 113 | 109 | #endif |
| 114 | 110 | |
| 111 | +void __init xen_init_apic(void); | |
| 112 | + | |
| 115 | 113 | #ifdef CONFIG_XEN_EFI |
| 116 | 114 | extern void xen_efi_init(void); |
| 117 | 115 | #else |
| @@ -1831,8 +1831,9 @@ EXPORT_SYMBOL(bio_endio); · 1830 unmodified lines | ||
| 1831 | 1831 | * Allocates and returns a new bio which represents @sectors from the start of |
| 1832 | 1832 | * @bio, and updates @bio to represent the remaining sectors. |
| 1833 | 1833 | * |
| 1834 | − * The newly allocated bio will point to @bio's bi_io_vec; it is the caller's | |
| 1835 | − * responsibility to ensure that @bio is not freed before the split. | |
| 1834 | + * Unless this is a discard request the newly allocated bio will point | |
| 1835 | + * to @bio's bi_io_vec; it is the caller's responsibility to ensure that | |
| 1836 | + * @bio is not freed before the split. | |
| 1836 | 1837 | */ |
| 1837 | 1838 | struct bio *bio_split(struct bio *bio, int sectors, |
| 1838 | 1839 | gfp_t gfp, struct bio_set *bs) |
| @@ -1842,7 +1843,15 @@ struct bio *bio_split(struct bio *bio, int sectors, · 3 unmodified lines | ||
| 1842 | 1843 | BUG_ON(sectors <= 0); |
| 1843 | 1844 | BUG_ON(sectors >= bio_sectors(bio)); |
| 1844 | 1845 | |
| 1845 | − split = bio_clone_fast(bio, gfp, bs); | |
| 1846 | + /* | |
| 1847 | + * Discards need a mutable bio_vec to accommodate the payload | |
| 1848 | + * required by the DSM TRIM and UNMAP commands. | |
| 1849 | + */ | |
| 1850 | + if (bio->bi_rw & REQ_DISCARD) | |
| 1851 | + split = bio_clone_bioset(bio, gfp, bs); | |
| 1852 | + else | |
| 1853 | + split = bio_clone_fast(bio, gfp, bs); | |
| 1854 | + | |
| 1846 | 1855 | if (!split) |
| 1847 | 1856 | return NULL; |
| 1848 | 1857 | |
| @@ -2009,6 +2018,7 @@ int bio_associate_blkcg(struct bio *bio, struct cgroup_subsys_state *blkcg_css) · 160 unmodified lines | ||
| 2009 | 2018 | bio->bi_css = blkcg_css; |
| 2010 | 2019 | return 0; |
| 2011 | 2020 | } |
| 2021 | +EXPORT_SYMBOL_GPL(bio_associate_blkcg); | |
| 2012 | 2022 | |
| 2013 | 2023 | /** |
| 2014 | 2024 | * bio_associate_current - associate a bio with %current |
| @@ -2039,6 +2049,7 @@ int bio_associate_current(struct bio *bio) · 24 unmodified lines | ||
| 2039 | 2049 | bio->bi_css = task_get_css(current, blkio_cgrp_id); |
| 2040 | 2050 | return 0; |
| 2041 | 2051 | } |
| 2052 | +EXPORT_SYMBOL_GPL(bio_associate_current); | |
| 2042 | 2053 | |
| 2043 | 2054 | /** |
| 2044 | 2055 | * bio_disassociate_task - undo bio_associate_current() |
| @@ -718,8 +718,12 @@ int blkg_conf_prep(struct blkcg *blkcg, const struct blkcg_policy *pol, · 717 unmodified lines | ||
| 718 | 718 | return -EINVAL; |
| 719 | 719 | |
| 720 | 720 | disk = get_gendisk(MKDEV(major, minor), &part); |
| 721 | − if (!disk || part) | |
| 721 | + if (!disk) | |
| 722 | 722 | return -EINVAL; |
| 723 | + if (part) { | |
| 724 | + put_disk(disk); | |
| 725 | + return -EINVAL; | |
| 726 | + } | |
| 723 | 727 | |
| 724 | 728 | rcu_read_lock(); |
| 725 | 729 | spin_lock_irq(disk->queue->queue_lock); |
| @@ -241,8 +241,8 @@ EXPORT_SYMBOL(blk_queue_bounce_limit); · 240 unmodified lines | ||
| 241 | 241 | * Description: |
| 242 | 242 | * Enables a low level driver to set a hard upper limit, |
| 243 | 243 | * max_hw_sectors, on the size of requests. max_hw_sectors is set by |
| 244 | − * the device driver based upon the combined capabilities of I/O | |
| 245 | − * controller and storage device. | |
| 244 | + * the device driver based upon the capabilities of the I/O | |
| 245 | + * controller. | |
| 246 | 246 | * |
| 247 | 247 | * max_sectors is a soft limit imposed by the block layer for |
| 248 | 248 | * filesystem type requests. This value can be overridden on a |
| @@ -231,7 +231,7 @@ int acpi_device_set_power(struct acpi_device *device, int state) · 230 unmodified lines | ||
| 231 | 231 | dev_warn(&device->dev, "Failed to change power state to %s\n", |
| 232 | 232 | acpi_power_state_string(state)); |
| 233 | 233 | } else { |
| 234 | − device->power.state = state; | |
| 234 | + device->power.state = target_state; | |
| 235 | 235 | ACPI_DEBUG_PRINT((ACPI_DB_INFO, |
| 236 | 236 | "Device [%s] transitioned to %s\n", |
| 237 | 237 | device->pnp.bus_id, |
| @@ -2478,6 +2478,10 @@ int ata_dev_configure(struct ata_device *dev) · 2477 unmodified lines | ||
| 2478 | 2478 | dev->max_sectors = min_t(unsigned int, ATA_MAX_SECTORS_128, |
| 2479 | 2479 | dev->max_sectors); |
| 2480 | 2480 | |
| 2481 | + if (dev->horkage & ATA_HORKAGE_MAX_SEC_1024) | |
| 2482 | + dev->max_sectors = min_t(unsigned int, ATA_MAX_SECTORS_1024, | |
| 2483 | + dev->max_sectors); | |
| 2484 | + | |
| 2481 | 2485 | if (dev->horkage & ATA_HORKAGE_MAX_SEC_LBA48) |
| 2482 | 2486 | dev->max_sectors = ATA_MAX_SECTORS_LBA48; |
| 2483 | 2487 | |
| @@ -4146,6 +4150,12 @@ static const struct ata_blacklist_entry ata_device_blacklist [] = { · 1662 unmodified lines | ||
| 4146 | 4150 | { "Slimtype DVD A DS8A8SH", NULL, ATA_HORKAGE_MAX_SEC_LBA48 }, |
| 4147 | 4151 | { "Slimtype DVD A DS8A9SH", NULL, ATA_HORKAGE_MAX_SEC_LBA48 }, |
| 4148 | 4152 | |
| 4153 | + /* | |
| 4154 | + * Causes silent data corruption with higher max sects. | |
| 4155 | + * http://lkml.kernel.org/g/x49wpy40ysk.fsf@segfault.boston.devel.redhat.com | |
| 4156 | + */ | |
| 4157 | + { "ST380013AS", "3.20", ATA_HORKAGE_MAX_SEC_1024 }, | |
| 4158 | + | |
| 4149 | 4159 | /* Devices we expect to fail diagnostics */ |
| 4150 | 4160 | |
| 4151 | 4161 | /* Devices where NCQ should be avoided */ |
| @@ -4174,9 +4184,10 @@ static const struct ata_blacklist_entry ata_device_blacklist [] = { · 22 unmodified lines | ||
| 4174 | 4184 | { "ST3320[68]13AS", "SD1[5-9]", ATA_HORKAGE_NONCQ | |
| 4175 | 4185 | ATA_HORKAGE_FIRMWARE_WARN }, |
| 4176 | 4186 | |
| 4177 | − /* Seagate Momentus SpinPoint M8 seem to have FPMDA_AA issues */ | |
| 4187 | + /* drives which fail FPDMA_AA activation (some may freeze afterwards) */ | |
| 4178 | 4188 | { "ST1000LM024 HN-M101MBB", "2AR10001", ATA_HORKAGE_BROKEN_FPDMA_AA }, |
| 4179 | 4189 | { "ST1000LM024 HN-M101MBB", "2BA30001", ATA_HORKAGE_BROKEN_FPDMA_AA }, |
| 4190 | + { "VB0250EAVER", "HPG7", ATA_HORKAGE_BROKEN_FPDMA_AA }, | |
| 4180 | 4191 | |
| 4181 | 4192 | /* Blacklist entries taken from Silicon Image 3124/3132 |
| 4182 | 4193 | Windows driver .inf file - also several Linux problem reports */ |
| @@ -4229,7 +4240,7 @@ static const struct ata_blacklist_entry ata_device_blacklist [] = { · 46 unmodified lines | ||
| 4229 | 4240 | ATA_HORKAGE_ZERO_AFTER_TRIM, }, |
| 4230 | 4241 | { "Crucial_CT*M500*", NULL, ATA_HORKAGE_NO_NCQ_TRIM | |
| 4231 | 4242 | ATA_HORKAGE_ZERO_AFTER_TRIM, }, |
| 4232 | − { "Micron_M5[15]0*", "MU01", ATA_HORKAGE_NO_NCQ_TRIM | | |
| 4243 | + { "Micron_M5[15]0_*", "MU01", ATA_HORKAGE_NO_NCQ_TRIM | | |
| 4233 | 4244 | ATA_HORKAGE_ZERO_AFTER_TRIM, }, |
| 4234 | 4245 | { "Crucial_CT*M550*", "MU01", ATA_HORKAGE_NO_NCQ_TRIM | |
| 4235 | 4246 | ATA_HORKAGE_ZERO_AFTER_TRIM, }, |
| @@ -4238,6 +4249,9 @@ static const struct ata_blacklist_entry ata_device_blacklist [] = { · 2 unmodified lines | ||
| 4238 | 4249 | { "Samsung SSD 8*", NULL, ATA_HORKAGE_NO_NCQ_TRIM | |
| 4239 | 4250 | ATA_HORKAGE_ZERO_AFTER_TRIM, }, |
| 4240 | 4251 | |
| 4252 | + /* devices that don't properly handle TRIM commands */ | |
| 4253 | + { "SuperSSpeed S238*", NULL, ATA_HORKAGE_NOTRIM, }, | |
| 4254 | + | |
| 4241 | 4255 | /* |
| 4242 | 4256 | * As defined, the DRAT (Deterministic Read After Trim) and RZAT |
| 4243 | 4257 | * (Return Zero After Trim) flags in the ATA Command Set are |
| @@ -4501,7 +4515,8 @@ static unsigned int ata_dev_set_xfermode(struct ata_device *dev) · 257 unmodified lines | ||
| 4501 | 4515 | else /* In the ancient relic department - skip all of this */ |
| 4502 | 4516 | return 0; |
| 4503 | 4517 | |
| 4504 | − err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0, 0); | |
| 4518 | + /* On some disks, this command causes spin-up, so we need longer timeout */ | |
| 4519 | + err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0, 15000); | |
| 4505 | 4520 | |
| 4506 | 4521 | DPRINTK("EXIT, err_mask=%x\n", err_mask); |
| 4507 | 4522 | return err_mask; |
| @@ -460,6 +460,13 @@ static void sata_pmp_quirks(struct ata_port *ap) · 459 unmodified lines | ||
| 460 | 460 | ATA_LFLAG_NO_SRST | |
| 461 | 461 | ATA_LFLAG_ASSUME_ATA; |
| 462 | 462 | } |
| 463 | + } else if (vendor == 0x11ab && devid == 0x4140) { | |
| 464 | + /* Marvell 4140 quirks */ | |
| 465 | + ata_for_each_link(link, ap, EDGE) { | |
| 466 | + /* port 4 is for SEMB device and it doesn't like SRST */ | |
| 467 | + if (link->pmp == 4) | |
| 468 | + link->flags |= ATA_LFLAG_DISABLED; | |
| 469 | + } | |
| 463 | 470 | } |
| 464 | 471 | } |
| 465 | 472 | |
| @@ -2568,7 +2568,8 @@ static unsigned int ata_scsiop_read_cap(struct ata_scsi_args *args, u8 *rbuf) · 2567 unmodified lines | ||
| 2568 | 2568 | rbuf[14] = (lowest_aligned >> 8) & 0x3f; |
| 2569 | 2569 | rbuf[15] = lowest_aligned; |
| 2570 | 2570 | |
| 2571 | − if (ata_id_has_trim(args->id)) { | |
| 2571 | + if (ata_id_has_trim(args->id) && | |
| 2572 | + !(dev->horkage & ATA_HORKAGE_NOTRIM)) { | |
| 2572 | 2573 | rbuf[14] |= 0x80; /* LBPME */ |
| 2573 | 2574 | |
| 2574 | 2575 | if (ata_id_has_zero_after_trim(args->id) && |
| @@ -569,6 +569,8 @@ show_ata_dev_trim(struct device *dev, · 568 unmodified lines | ||
| 569 | 569 | |
| 570 | 570 | if (!ata_id_has_trim(ata_dev->id)) |
| 571 | 571 | mode = "unsupported"; |
| 572 | + else if (ata_dev->horkage & ATA_HORKAGE_NOTRIM) | |
| 573 | + mode = "forced_unsupported"; | |
| 572 | 574 | else if (ata_dev->horkage & ATA_HORKAGE_NO_NCQ_TRIM) |
| 573 | 575 | mode = "forced_unqueued"; |
| 574 | 576 | else if (ata_fpdma_dsm_supported(ata_dev)) |
| @@ -296,11 +296,20 @@ static int regcache_rbtree_insert_to_block(struct regmap *map, · 295 unmodified lines | ||
| 296 | 296 | if (!blk) |
| 297 | 297 | return -ENOMEM; |
| 298 | 298 | |
| 299 | − present = krealloc(rbnode->cache_present, | |
| 300 | − BITS_TO_LONGS(blklen) * sizeof(*present), GFP_KERNEL); | |
| 301 | − if (!present) { | |
| 302 | − kfree(blk); | |
| 303 | − return -ENOMEM; | |
| 299 | + if (BITS_TO_LONGS(blklen) > BITS_TO_LONGS(rbnode->blklen)) { | |
| 300 | + present = krealloc(rbnode->cache_present, | |
| 301 | + BITS_TO_LONGS(blklen) * sizeof(*present), | |
| 302 | + GFP_KERNEL); | |
| 303 | + if (!present) { | |
| 304 | + kfree(blk); | |
| 305 | + return -ENOMEM; | |
| 306 | + } | |
| 307 | + | |
| 308 | + memset(present + BITS_TO_LONGS(rbnode->blklen), 0, | |
| 309 | + (BITS_TO_LONGS(blklen) - BITS_TO_LONGS(rbnode->blklen)) | |
| 310 | + * sizeof(*present)); | |
| 311 | + } else { | |
| 312 | + present = rbnode->cache_present; | |
| 304 | 313 | } |
| 305 | 314 | |
| 306 | 315 | /* insert the register value in the correct place in the rbnode block */ |
| @@ -240,19 +240,19 @@ static enum hrtimer_restart null_cmd_timer_expired(struct hrtimer *timer) · 239 unmodified lines | ||
| 240 | 240 | while ((entry = llist_del_all(&cq->list)) != NULL) { |
| 241 | 241 | entry = llist_reverse_order(entry); |
| 242 | 242 | do { |
| 243 | + struct request_queue *q = NULL; | |
| 244 | + | |
| 243 | 245 | cmd = container_of(entry, struct nullb_cmd, ll_list); |
| 244 | 246 | entry = entry->next; |
| 247 | + if (cmd->rq) | |
| 248 | + q = cmd->rq->q; | |
| 245 | 249 | end_cmd(cmd); |
| 246 | 250 | |
| 247 | − if (cmd->rq) { | |
| 248 | − struct request_queue *q = cmd->rq->q; | |
| 249 | − | |
| 250 | − if (!q->mq_ops && blk_queue_stopped(q)) { | |
| 251 | − spin_lock(q->queue_lock); | |
| 252 | − if (blk_queue_stopped(q)) | |
| 253 | − blk_start_queue(q); | |
| 254 | − spin_unlock(q->queue_lock); | |
| 255 | − } | |
| 251 | + if (q && !q->mq_ops && blk_queue_stopped(q)) { | |
| 252 | + spin_lock(q->queue_lock); | |
| 253 | + if (blk_queue_stopped(q)) | |
| 254 | + blk_start_queue(q); | |
| 255 | + spin_unlock(q->queue_lock); | |
| 256 | 256 | } |
| 257 | 257 | } while (entry); |
| 258 | 258 | } |
| @@ -523,6 +523,7 @@ void rbd_warn(struct rbd_device *rbd_dev, const char *fmt, ...) · 522 unmodified lines | ||
| 523 | 523 | # define rbd_assert(expr) ((void) 0) |
| 524 | 524 | #endif /* !RBD_DEBUG */ |
| 525 | 525 | |
| 526 | +static void rbd_osd_copyup_callback(struct rbd_obj_request *obj_request); | |
| 526 | 527 | static int rbd_img_obj_request_submit(struct rbd_obj_request *obj_request); |
| 527 | 528 | static void rbd_img_parent_read(struct rbd_obj_request *obj_request); |
| 528 | 529 | static void rbd_dev_remove_parent(struct rbd_device *rbd_dev); |
| @@ -1818,6 +1819,16 @@ static void rbd_osd_stat_callback(struct rbd_obj_request *obj_request) · 1289 unmodified lines | ||
| 1818 | 1819 | obj_request_done_set(obj_request); |
| 1819 | 1820 | } |
| 1820 | 1821 | |
| 1822 | +static void rbd_osd_call_callback(struct rbd_obj_request *obj_request) | |
| 1823 | +{ | |
| 1824 | + dout("%s: obj %p\n", __func__, obj_request); | |
| 1825 | + | |
| 1826 | + if (obj_request_img_data_test(obj_request)) | |
| 1827 | + rbd_osd_copyup_callback(obj_request); | |
| 1828 | + else | |
| 1829 | + obj_request_done_set(obj_request); | |
| 1830 | +} | |
| 1831 | + | |
| 1821 | 1832 | static void rbd_osd_req_callback(struct ceph_osd_request *osd_req, |
| 1822 | 1833 | struct ceph_msg *msg) |
| 1823 | 1834 | { |
| @@ -1866,6 +1877,8 @@ static void rbd_osd_req_callback(struct ceph_osd_request *osd_req, · 42 unmodified lines | ||
| 1866 | 1877 | rbd_osd_discard_callback(obj_request); |
| 1867 | 1878 | break; |
| 1868 | 1879 | case CEPH_OSD_OP_CALL: |
| 1880 | + rbd_osd_call_callback(obj_request); | |
| 1881 | + break; | |
| 1869 | 1882 | case CEPH_OSD_OP_NOTIFY_ACK: |
| 1870 | 1883 | case CEPH_OSD_OP_WATCH: |
| 1871 | 1884 | rbd_osd_trivial_callback(obj_request); |
| @@ -2530,13 +2543,15 @@ out_unwind: · 658 unmodified lines | ||
| 2530 | 2543 | } |
| 2531 | 2544 | |
| 2532 | 2545 | static void |
| 2533 | −rbd_img_obj_copyup_callback(struct rbd_obj_request *obj_request) | |
| 2546 | +rbd_osd_copyup_callback(struct rbd_obj_request *obj_request) | |
| 2534 | 2547 | { |
| 2535 | 2548 | struct rbd_img_request *img_request; |
| 2536 | 2549 | struct rbd_device *rbd_dev; |
| 2537 | 2550 | struct page **pages; |
| 2538 | 2551 | u32 page_count; |
| 2539 | 2552 | |
| 2553 | + dout("%s: obj %p\n", __func__, obj_request); | |
| 2554 | + | |
| 2540 | 2555 | rbd_assert(obj_request->type == OBJ_REQUEST_BIO || |
| 2541 | 2556 | obj_request->type == OBJ_REQUEST_NODATA); |
| 2542 | 2557 | rbd_assert(obj_request_img_data_test(obj_request)); |
| @@ -2563,9 +2578,7 @@ rbd_img_obj_copyup_callback(struct rbd_obj_request *obj_request) · 20 unmodified lines | ||
| 2563 | 2578 | if (!obj_request->result) |
| 2564 | 2579 | obj_request->xferred = obj_request->length; |
| 2565 | 2580 | |
| 2566 | − /* Finish up with the normal image object callback */ | |
| 2567 | − | |
| 2568 | − rbd_img_obj_callback(obj_request); | |
| 2581 | + obj_request_done_set(obj_request); | |
| 2569 | 2582 | } |
| 2570 | 2583 | |
| 2571 | 2584 | static void |
| @@ -2650,7 +2663,6 @@ rbd_img_obj_parent_read_full_callback(struct rbd_img_request *img_request) · 78 unmodified lines | ||
| 2650 | 2663 | |
| 2651 | 2664 | /* All set, send it off. */ |
| 2652 | 2665 | |
| 2653 | − orig_request->callback = rbd_img_obj_copyup_callback; | |
| 2654 | 2666 | osdc = &rbd_dev->rbd_client->client->osdc; |
| 2655 | 2667 | img_result = rbd_obj_request_submit(osdc, orig_request); |
| 2656 | 2668 | if (!img_result) |
| @@ -369,8 +369,8 @@ static void purge_persistent_gnt(struct xen_blkif *blkif) · 368 unmodified lines | ||
| 369 | 369 | return; |
| 370 | 370 | } |
| 371 | 371 | |
| 372 | − if (work_pending(&blkif->persistent_purge_work)) { | |
| 373 | − pr_alert_ratelimited("Scheduled work from previous purge is still pending, cannot purge list\n"); | |
| 372 | + if (work_busy(&blkif->persistent_purge_work)) { | |
| 373 | + pr_alert_ratelimited("Scheduled work from previous purge is still busy, cannot purge list\n"); | |
| 374 | 374 | return; |
| 375 | 375 | } |
| 376 | 376 | |
| @@ -179,6 +179,7 @@ static DEFINE_SPINLOCK(minor_lock); · 178 unmodified lines | ||
| 179 | 179 | ((_segs + SEGS_PER_INDIRECT_FRAME - 1)/SEGS_PER_INDIRECT_FRAME) |
| 180 | 180 | |
| 181 | 181 | static int blkfront_setup_indirect(struct blkfront_info *info); |
| 182 | +static int blkfront_gather_backend_features(struct blkfront_info *info); | |
| 182 | 183 | |
| 183 | 184 | static int get_id_from_freelist(struct blkfront_info *info) |
| 184 | 185 | { |
| @@ -1128,8 +1129,10 @@ static void blkif_completion(struct blk_shadow *s, struct blkfront_info *info, · 943 unmodified lines | ||
| 1128 | 1129 | * Add the used indirect page back to the list of |
| 1129 | 1130 | * available pages for indirect grefs. |
| 1130 | 1131 | */ |
| 1131 | − indirect_page = pfn_to_page(s->indirect_grants[i]->pfn); | |
| 1132 | − list_add(&indirect_page->lru, &info->indirect_pages); | |
| 1132 | + if (!info->feature_persistent) { | |
| 1133 | + indirect_page = pfn_to_page(s->indirect_grants[i]->pfn); | |
| 1134 | + list_add(&indirect_page->lru, &info->indirect_pages); | |
| 1135 | + } | |
| 1133 | 1136 | s->indirect_grants[i]->gref = GRANT_INVALID_REF; |
| 1134 | 1137 | list_add_tail(&s->indirect_grants[i]->node, &info->grants); |
| 1135 | 1138 | } |
| @@ -1519,7 +1522,7 @@ static int blkif_recover(struct blkfront_info *info) · 383 unmodified lines | ||
| 1519 | 1522 | info->shadow_free = info->ring.req_prod_pvt; |
| 1520 | 1523 | info->shadow[BLK_RING_SIZE(info)-1].req.u.rw.id = 0x0fffffff; |
| 1521 | 1524 | |
| 1522 | − rc = blkfront_setup_indirect(info); | |
| 1525 | + rc = blkfront_gather_backend_features(info); | |
| 1523 | 1526 | if (rc) { |
| 1524 | 1527 | kfree(copy); |
| 1525 | 1528 | return rc; |
| @@ -1720,20 +1723,13 @@ static void blkfront_setup_discard(struct blkfront_info *info) · 194 unmodified lines | ||
| 1720 | 1723 | |
| 1721 | 1724 | static int blkfront_setup_indirect(struct blkfront_info *info) |
| 1722 | 1725 | { |
| 1723 | − unsigned int indirect_segments, segs; | |
| 1726 | + unsigned int segs; | |
| 1724 | 1727 | int err, i; |
| 1725 | 1728 | |
| 1726 | − err = xenbus_gather(XBT_NIL, info->xbdev->otherend, | |
| 1727 | − "feature-max-indirect-segments", "%u", &indirect_segments, | |
| 1728 | − NULL); | |
| 1729 | − if (err) { | |
| 1730 | − info->max_indirect_segments = 0; | |
| 1729 | + if (info->max_indirect_segments == 0) | |
| 1731 | 1730 | segs = BLKIF_MAX_SEGMENTS_PER_REQUEST; |
| 1732 | − } else { | |
| 1733 | − info->max_indirect_segments = min(indirect_segments, | |
| 1734 | − xen_blkif_max_segments); | |
| 1731 | + else | |
| 1735 | 1732 | segs = info->max_indirect_segments; |
| 1736 | − } | |
| 1737 | 1733 | |
| 1738 | 1734 | err = fill_grant_buffer(info, (segs + INDIRECT_GREFS(segs)) * BLK_RING_SIZE(info)); |
| 1739 | 1735 | if (err) |
| @@ -1796,6 +1792,68 @@ out_of_memory: · 56 unmodified lines | ||
| 1796 | 1792 | return -ENOMEM; |
| 1797 | 1793 | } |
| 1798 | 1794 | |
| 1795 | +/* | |
| 1796 | + * Gather all backend feature-* | |
| 1797 | + */ | |
| 1798 | +static int blkfront_gather_backend_features(struct blkfront_info *info) | |
| 1799 | +{ | |
| 1800 | + int err; | |
| 1801 | + int barrier, flush, discard, persistent; | |
| 1802 | + unsigned int indirect_segments; | |
| 1803 | + | |
| 1804 | + info->feature_flush = 0; | |
| 1805 | + | |
| 1806 | + err = xenbus_gather(XBT_NIL, info->xbdev->otherend, | |
| 1807 | + "feature-barrier", "%d", &barrier, | |
| 1808 | + NULL); | |
| 1809 | + | |
| 1810 | + /* | |
| 1811 | + * If there's no "feature-barrier" defined, then it means | |
| 1812 | + * we're dealing with a very old backend which writes | |
| 1813 | + * synchronously; nothing to do. | |
| 1814 | + * | |
| 1815 | + * If there are barriers, then we use flush. | |
| 1816 | + */ | |
| 1817 | + if (!err && barrier) | |
| 1818 | + info->feature_flush = REQ_FLUSH | REQ_FUA; | |
| 1819 | + /* | |
| 1820 | + * And if there is "feature-flush-cache" use that above | |
| 1821 | + * barriers. | |
| 1822 | + */ | |
| 1823 | + err = xenbus_gather(XBT_NIL, info->xbdev->otherend, | |
| 1824 | + "feature-flush-cache", "%d", &flush, | |
| 1825 | + NULL); | |
| 1826 | + | |
| 1827 | + if (!err && flush) | |
| 1828 | + info->feature_flush = REQ_FLUSH; | |
| 1829 | + | |
| 1830 | + err = xenbus_gather(XBT_NIL, info->xbdev->otherend, | |
| 1831 | + "feature-discard", "%d", &discard, | |
| 1832 | + NULL); | |
| 1833 | + | |
| 1834 | + if (!err && discard) | |
| 1835 | + blkfront_setup_discard(info); | |
| 1836 | + | |
| 1837 | + err = xenbus_gather(XBT_NIL, info->xbdev->otherend, | |
| 1838 | + "feature-persistent", "%u", &persistent, | |
| 1839 | + NULL); | |
| 1840 | + if (err) | |
| 1841 | + info->feature_persistent = 0; | |
| 1842 | + else | |
| 1843 | + info->feature_persistent = persistent; | |
| 1844 | + | |
| 1845 | + err = xenbus_gather(XBT_NIL, info->xbdev->otherend, | |
| 1846 | + "feature-max-indirect-segments", "%u", &indirect_segments, | |
| 1847 | + NULL); | |
| 1848 | + if (err) | |
| 1849 | + info->max_indirect_segments = 0; | |
| 1850 | + else | |
| 1851 | + info->max_indirect_segments = min(indirect_segments, | |
| 1852 | + xen_blkif_max_segments); | |
| 1853 | + | |
| 1854 | + return blkfront_setup_indirect(info); | |
| 1855 | +} | |
| 1856 | + | |
| 1799 | 1857 | /* |
| 1800 | 1858 | * Invoked when the backend is finally 'ready' (and has told produced |
| 1801 | 1859 | * the details about the physical device - #sectors, size, etc). |
| @@ -1807,7 +1865,6 @@ static void blkfront_connect(struct blkfront_info *info) · 5 unmodified lines | ||
| 1807 | 1865 | unsigned int physical_sector_size; |
| 1808 | 1866 | unsigned int binfo; |
| 1809 | 1867 | int err; |
| 1810 | − int barrier, flush, discard, persistent; | |
| 1811 | 1868 | |
| 1812 | 1869 | switch (info->connected) { |
| 1813 | 1870 | case BLKIF_STATE_CONNECTED: |
| @@ -1864,48 +1921,7 @@ static void blkfront_connect(struct blkfront_info *info) · 50 unmodified lines | ||
| 1864 | 1921 | if (err != 1) |
| 1865 | 1922 | physical_sector_size = sector_size; |
| 1866 | 1923 | |
| 1867 | − info->feature_flush = 0; | |
| 1868 | − | |
| 1869 | − err = xenbus_gather(XBT_NIL, info->xbdev->otherend, | |
| 1870 | − "feature-barrier", "%d", &barrier, | |
| 1871 | − NULL); | |
| 1872 | − | |
| 1873 | − /* | |
| 1874 | − * If there's no "feature-barrier" defined, then it means | |
| 1875 | − * we're dealing with a very old backend which writes | |
| 1876 | − * synchronously; nothing to do. | |
| 1877 | − * | |
| 1878 | − * If there are barriers, then we use flush. | |
| 1879 | − */ | |
| 1880 | − if (!err && barrier) | |
| 1881 | − info->feature_flush = REQ_FLUSH | REQ_FUA; | |
| 1882 | − /* | |
| 1883 | − * And if there is "feature-flush-cache" use that above | |
| 1884 | − * barriers. | |
| 1885 | − */ | |
| 1886 | − err = xenbus_gather(XBT_NIL, info->xbdev->otherend, | |
| 1887 | − "feature-flush-cache", "%d", &flush, | |
| 1888 | − NULL); | |
| 1889 | − | |
| 1890 | − if (!err && flush) | |
| 1891 | − info->feature_flush = REQ_FLUSH; | |
| 1892 | − | |
| 1893 | − err = xenbus_gather(XBT_NIL, info->xbdev->otherend, | |
| 1894 | − "feature-discard", "%d", &discard, | |
| 1895 | − NULL); | |
| 1896 | − | |
| 1897 | − if (!err && discard) | |
| 1898 | − blkfront_setup_discard(info); | |
| 1899 | − | |
| 1900 | − err = xenbus_gather(XBT_NIL, info->xbdev->otherend, | |
| 1901 | − "feature-persistent", "%u", &persistent, | |
| 1902 | − NULL); | |
| 1903 | − if (err) | |
| 1904 | − info->feature_persistent = 0; | |
| 1905 | − else | |
| 1906 | − info->feature_persistent = persistent; | |
| 1907 | − | |
| 1908 | − err = blkfront_setup_indirect(info); | |
| 1924 | + err = blkfront_gather_backend_features(info); | |
| 1909 | 1925 | if (err) { |
| 1910 | 1926 | xenbus_dev_fatal(info->xbdev, err, "setup_indirect at %s", |
| 1911 | 1927 | info->xbdev->otherend); |
| @@ -496,10 +496,9 @@ static void zram_meta_free(struct zram_meta *meta, u64 disksize) · 495 unmodified lines | ||
| 496 | 496 | kfree(meta); |
| 497 | 497 | } |
| 498 | 498 | |
| 499 | −static struct zram_meta *zram_meta_alloc(int device_id, u64 disksize) | |
| 499 | +static struct zram_meta *zram_meta_alloc(char *pool_name, u64 disksize) | |
| 500 | 500 | { |
| 501 | 501 | size_t num_pages; |
| 502 | − char pool_name[8]; | |
| 503 | 502 | struct zram_meta *meta = kmalloc(sizeof(*meta), GFP_KERNEL); |
| 504 | 503 | |
| 505 | 504 | if (!meta) |
| @@ -512,7 +511,6 @@ static struct zram_meta *zram_meta_alloc(int device_id, u64 disksize) · 6 unmodified lines | ||
| 512 | 511 | goto out_error; |
| 513 | 512 | } |
| 514 | 513 | |
| 515 | − snprintf(pool_name, sizeof(pool_name), "zram%d", device_id); | |
| 516 | 514 | meta->mem_pool = zs_create_pool(pool_name, GFP_NOIO | __GFP_HIGHMEM); |
| 517 | 515 | if (!meta->mem_pool) { |
| 518 | 516 | pr_err("Error creating memory pool\n"); |
| @@ -1031,7 +1029,7 @@ static ssize_t disksize_store(struct device *dev, · 512 unmodified lines | ||
| 1031 | 1029 | return -EINVAL; |
| 1032 | 1030 | |
| 1033 | 1031 | disksize = PAGE_ALIGN(disksize); |
| 1034 | − meta = zram_meta_alloc(zram->disk->first_minor, disksize); | |
| 1032 | + meta = zram_meta_alloc(zram->disk->disk_name, disksize); | |
| 1035 | 1033 | if (!meta) |
| 1036 | 1034 | return -ENOMEM; |
| 1037 | 1035 | |
| @@ -472,12 +472,11 @@ int btbcm_setup_apple(struct hci_dev *hdev) · 471 unmodified lines | ||
| 472 | 472 | |
| 473 | 473 | /* Read Verbose Config Version Info */ |
| 474 | 474 | skb = btbcm_read_verbose_config(hdev); |
| 475 | − if (IS_ERR(skb)) | |
| 476 | − return PTR_ERR(skb); | |
| 477 | − | |
| 478 | − BT_INFO("%s: BCM: chip id %u build %4.4u", hdev->name, skb->data[1], | |
| 479 | − get_unaligned_le16(skb->data + 5)); | |
| 480 | − kfree_skb(skb); | |
| 475 | + if (!IS_ERR(skb)) { | |
| 476 | + BT_INFO("%s: BCM: chip id %u build %4.4u", hdev->name, skb->data[1], | |
| 477 | + get_unaligned_le16(skb->data + 5)); | |
| 478 | + kfree_skb(skb); | |
| 479 | + } | |
| 481 | 480 | |
| 482 | 481 | set_bit(HCI_QUIRK_STRICT_DUPLICATE_FILTER, &hdev->quirks); |
| 483 | 482 | |
| @@ -429,7 +429,7 @@ static int hwrng_fillfn(void *unused) · 428 unmodified lines | ||
| 429 | 429 | static void start_khwrngd(void) |
| 430 | 430 | { |
| 431 | 431 | hwrng_fill = kthread_run(hwrng_fillfn, NULL, "hwrng"); |
| 432 | − if (hwrng_fill == ERR_PTR(-ENOMEM)) { | |
| 432 | + if (IS_ERR(hwrng_fill)) { | |
| 433 | 433 | pr_err("hwrng_fill thread creation failed"); |
| 434 | 434 | hwrng_fill = NULL; |
| 435 | 435 | } |
| @@ -126,7 +126,7 @@ PARENTS(pxa3xx_ac97_bus) = { "ring_osc_60mhz", "ac97" }; · 125 unmodified lines | ||
| 126 | 126 | PARENTS(pxa3xx_sbus) = { "ring_osc_60mhz", "system_bus" }; |
| 127 | 127 | PARENTS(pxa3xx_smemcbus) = { "ring_osc_60mhz", "smemc" }; |
| 128 | 128 | |
| 129 | −#define CKEN_AB(bit) ((CKEN_ ## bit > 31) ? &CKENA : &CKENB) | |
| 129 | +#define CKEN_AB(bit) ((CKEN_ ## bit > 31) ? &CKENB : &CKENA) | |
| 130 | 130 | #define PXA3XX_CKEN(dev_id, con_id, parents, mult_lp, div_lp, mult_hp, \ |
| 131 | 131 | div_hp, bit, is_lp, flags) \ |
| 132 | 132 | PXA_CKEN(dev_id, con_id, bit, parents, mult_lp, div_lp, \ |
| @@ -661,6 +661,9 @@ static void sh_cmt_clocksource_suspend(struct clocksource *cs) · 660 unmodified lines | ||
| 661 | 661 | { |
| 662 | 662 | struct sh_cmt_channel *ch = cs_to_sh_cmt(cs); |
| 663 | 663 | |
| 664 | + if (!ch->cs_enabled) | |
| 665 | + return; | |
| 666 | + | |
| 664 | 667 | sh_cmt_stop(ch, FLAG_CLOCKSOURCE); |
| 665 | 668 | pm_genpd_syscore_poweroff(&ch->cmt->pdev->dev); |
| 666 | 669 | } |
| @@ -669,6 +672,9 @@ static void sh_cmt_clocksource_resume(struct clocksource *cs) · 2 unmodified lines | ||
| 669 | 672 | { |
| 670 | 673 | struct sh_cmt_channel *ch = cs_to_sh_cmt(cs); |
| 671 | 674 | |
| 675 | + if (!ch->cs_enabled) | |
| 676 | + return; | |
| 677 | + | |
| 672 | 678 | pm_genpd_syscore_poweron(&ch->cmt->pdev->dev); |
| 673 | 679 | sh_cmt_start(ch, FLAG_CLOCKSOURCE); |
| 674 | 680 | } |
| @@ -1002,7 +1002,7 @@ static int cpufreq_add_dev_symlink(struct cpufreq_policy *policy) · 1001 unmodified lines | ||
| 1002 | 1002 | int ret = 0; |
| 1003 | 1003 | |
| 1004 | 1004 | /* Some related CPUs might not be present (physically hotplugged) */ |
| 1005 | − for_each_cpu_and(j, policy->related_cpus, cpu_present_mask) { | |
| 1005 | + for_each_cpu(j, policy->real_cpus) { | |
| 1006 | 1006 | if (j == policy->kobj_cpu) |
| 1007 | 1007 | continue; |
| 1008 | 1008 | |
| @@ -1019,7 +1019,7 @@ static void cpufreq_remove_dev_symlink(struct cpufreq_policy *policy) · 10 unmodified lines | ||
| 1019 | 1019 | unsigned int j; |
| 1020 | 1020 | |
| 1021 | 1021 | /* Some related CPUs might not be present (physically hotplugged) */ |
| 1022 | − for_each_cpu_and(j, policy->related_cpus, cpu_present_mask) { | |
| 1022 | + for_each_cpu(j, policy->real_cpus) { | |
| 1023 | 1023 | if (j == policy->kobj_cpu) |
| 1024 | 1024 | continue; |
| 1025 | 1025 | |
| @@ -1163,11 +1163,14 @@ static struct cpufreq_policy *cpufreq_policy_alloc(struct device *dev) · 137 unmodified lines | ||
| 1163 | 1163 | if (!zalloc_cpumask_var(&policy->related_cpus, GFP_KERNEL)) |
| 1164 | 1164 | goto err_free_cpumask; |
| 1165 | 1165 | |
| 1166 | + if (!zalloc_cpumask_var(&policy->real_cpus, GFP_KERNEL)) | |
| 1167 | + goto err_free_rcpumask; | |
| 1168 | + | |
| 1166 | 1169 | ret = kobject_init_and_add(&policy->kobj, &ktype_cpufreq, &dev->kobj, |
| 1167 | 1170 | "cpufreq"); |
| 1168 | 1171 | if (ret) { |
| 1169 | 1172 | pr_err("%s: failed to init policy->kobj: %d\n", __func__, ret); |
| 1170 | − goto err_free_rcpumask; | |
| 1173 | + goto err_free_real_cpus; | |
| 1171 | 1174 | } |
| 1172 | 1175 | |
| 1173 | 1176 | INIT_LIST_HEAD(&policy->policy_list); |
| @@ -1184,6 +1187,8 @@ static struct cpufreq_policy *cpufreq_policy_alloc(struct device *dev) · 10 unmodified lines | ||
| 1184 | 1187 | |
| 1185 | 1188 | return policy; |
| 1186 | 1189 | |
| 1190 | +err_free_real_cpus: | |
| 1191 | + free_cpumask_var(policy->real_cpus); | |
| 1187 | 1192 | err_free_rcpumask: |
| 1188 | 1193 | free_cpumask_var(policy->related_cpus); |
| 1189 | 1194 | err_free_cpumask: |
| @@ -1234,6 +1239,7 @@ static void cpufreq_policy_free(struct cpufreq_policy *policy, bool notify) · 44 unmodified lines | ||
| 1234 | 1239 | write_unlock_irqrestore(&cpufreq_driver_lock, flags); |
| 1235 | 1240 | |
| 1236 | 1241 | cpufreq_policy_put_kobj(policy, notify); |
| 1242 | + free_cpumask_var(policy->real_cpus); | |
| 1237 | 1243 | free_cpumask_var(policy->related_cpus); |
| 1238 | 1244 | free_cpumask_var(policy->cpus); |
| 1239 | 1245 | kfree(policy); |
| @@ -1258,14 +1264,17 @@ static int cpufreq_add_dev(struct device *dev, struct subsys_interface *sif) · 18 unmodified lines | ||
| 1258 | 1264 | |
| 1259 | 1265 | pr_debug("adding CPU %u\n", cpu); |
| 1260 | 1266 | |
| 1261 | − /* | |
| 1262 | − * Only possible if 'cpu' wasn't physically present earlier and we are | |
| 1263 | − * here from subsys_interface add callback. A hotplug notifier will | |
| 1264 | − * follow and we will handle it like logical CPU hotplug then. For now, | |
| 1265 | − * just create the sysfs link. | |
| 1266 | − */ | |
| 1267 | − if (cpu_is_offline(cpu)) | |
| 1268 | − return add_cpu_dev_symlink(per_cpu(cpufreq_cpu_data, cpu), cpu); | |
| 1267 | + if (cpu_is_offline(cpu)) { | |
| 1268 | + /* | |
| 1269 | + * Only possible if we are here from the subsys_interface add | |
| 1270 | + * callback. A hotplug notifier will follow and we will handle | |
| 1271 | + * it as CPU online then. For now, just create the sysfs link, | |
| 1272 | + * unless there is no policy or the link is already present. | |
| 1273 | + */ | |
| 1274 | + policy = per_cpu(cpufreq_cpu_data, cpu); | |
| 1275 | + return policy && !cpumask_test_and_set_cpu(cpu, policy->real_cpus) | |
| 1276 | + ? add_cpu_dev_symlink(policy, cpu) : 0; | |
| 1277 | + } | |
| 1269 | 1278 | |
| 1270 | 1279 | if (!down_read_trylock(&cpufreq_rwsem)) |
| 1271 | 1280 | return 0; |
| @@ -1307,6 +1316,10 @@ static int cpufreq_add_dev(struct device *dev, struct subsys_interface *sif) · 35 unmodified lines | ||
| 1307 | 1316 | /* related cpus should atleast have policy->cpus */ |
| 1308 | 1317 | cpumask_or(policy->related_cpus, policy->related_cpus, policy->cpus); |
| 1309 | 1318 | |
| 1319 | + /* Remember which CPUs have been present at the policy creation time. */ | |
| 1320 | + if (!recover_policy) | |
| 1321 | + cpumask_and(policy->real_cpus, policy->cpus, cpu_present_mask); | |
| 1322 | + | |
| 1310 | 1323 | /* |
| 1311 | 1324 | * affected cpus must always be the one, which are online. We aren't |
| 1312 | 1325 | * managing offline cpus here. |
| @@ -1420,8 +1433,7 @@ nomem_out: · 107 unmodified lines | ||
| 1420 | 1433 | return ret; |
| 1421 | 1434 | } |
| 1422 | 1435 | |
| 1423 | −static int __cpufreq_remove_dev_prepare(struct device *dev, | |
| 1424 | − struct subsys_interface *sif) | |
| 1436 | +static int __cpufreq_remove_dev_prepare(struct device *dev) | |
| 1425 | 1437 | { |
| 1426 | 1438 | unsigned int cpu = dev->id; |
| 1427 | 1439 | int ret = 0; |
| @@ -1437,10 +1449,8 @@ static int __cpufreq_remove_dev_prepare(struct device *dev, · 9 unmodified lines | ||
| 1437 | 1449 | |
| 1438 | 1450 | if (has_target()) { |
| 1439 | 1451 | ret = __cpufreq_governor(policy, CPUFREQ_GOV_STOP); |
| 1440 | − if (ret) { | |
| 1452 | + if (ret) | |
| 1441 | 1453 | pr_err("%s: Failed to stop governor\n", __func__); |
| 1442 | − return ret; | |
| 1443 | − } | |
| 1444 | 1454 | } |
| 1445 | 1455 | |
| 1446 | 1456 | down_write(&policy->rwsem); |
| @@ -1473,8 +1483,7 @@ static int __cpufreq_remove_dev_prepare(struct device *dev, · 26 unmodified lines | ||
| 1473 | 1483 | return ret; |
| 1474 | 1484 | } |
| 1475 | 1485 | |
| 1476 | −static int __cpufreq_remove_dev_finish(struct device *dev, | |
| 1477 | − struct subsys_interface *sif) | |
| 1486 | +static int __cpufreq_remove_dev_finish(struct device *dev) | |
| 1478 | 1487 | { |
| 1479 | 1488 | unsigned int cpu = dev->id; |
| 1480 | 1489 | int ret; |
| @@ -1492,10 +1501,8 @@ static int __cpufreq_remove_dev_finish(struct device *dev, · 11 unmodified lines | ||
| 1492 | 1501 | /* If cpu is last user of policy, free policy */ |
| 1493 | 1502 | if (has_target()) { |
| 1494 | 1503 | ret = __cpufreq_governor(policy, CPUFREQ_GOV_POLICY_EXIT); |
| 1495 | − if (ret) { | |
| 1504 | + if (ret) | |
| 1496 | 1505 | pr_err("%s: Failed to exit governor\n", __func__); |
| 1497 | − return ret; | |
| 1498 | − } | |
| 1499 | 1506 | } |
| 1500 | 1507 | |
| 1501 | 1508 | /* |
| @@ -1506,10 +1513,6 @@ static int __cpufreq_remove_dev_finish(struct device *dev, · 4 unmodified lines | ||
| 1506 | 1513 | if (cpufreq_driver->exit) |
| 1507 | 1514 | cpufreq_driver->exit(policy); |
| 1508 | 1515 | |
| 1509 | − /* Free the policy only if the driver is getting removed. */ | |
| 1510 | − if (sif) | |
| 1511 | − cpufreq_policy_free(policy, true); | |
| 1512 | − | |
| 1513 | 1516 | return 0; |
| 1514 | 1517 | } |
| 1515 | 1518 | |
| @@ -1521,42 +1524,41 @@ static int __cpufreq_remove_dev_finish(struct device *dev, · 5 unmodified lines | ||
| 1521 | 1524 | static int cpufreq_remove_dev(struct device *dev, struct subsys_interface *sif) |
| 1522 | 1525 | { |
| 1523 | 1526 | unsigned int cpu = dev->id; |
| 1524 | − int ret; | |
| 1525 | − | |
| 1526 | − /* | |
| 1527 | − * Only possible if 'cpu' is getting physically removed now. A hotplug | |
| 1528 | − * notifier should have already been called and we just need to remove | |
| 1529 | − * link or free policy here. | |
| 1530 | − */ | |
| 1531 | − if (cpu_is_offline(cpu)) { | |
| 1532 | − struct cpufreq_policy *policy = per_cpu(cpufreq_cpu_data, cpu); | |
| 1533 | − struct cpumask mask; | |
| 1527 | + struct cpufreq_policy *policy = per_cpu(cpufreq_cpu_data, cpu); | |
| 1534 | 1528 | |
| 1535 | − if (!policy) | |
| 1536 | − return 0; | |
| 1529 | + if (!policy) | |
| 1530 | + return 0; | |
| 1537 | 1531 | |
| 1538 | − cpumask_copy(&mask, policy->related_cpus); | |
| 1539 | − cpumask_clear_cpu(cpu, &mask); | |
| 1532 | + if (cpu_online(cpu)) { | |
| 1533 | + __cpufreq_remove_dev_prepare(dev); | |
| 1534 | + __cpufreq_remove_dev_finish(dev); | |
| 1535 | + } | |
| 1540 | 1536 | |
| 1541 | − /* | |
| 1542 | − * Free policy only if all policy->related_cpus are removed | |
| 1543 | − * physically. | |
| 1544 | − */ | |
| 1545 | − if (cpumask_intersects(&mask, cpu_present_mask)) { | |
| 1546 | − remove_cpu_dev_symlink(policy, cpu); | |
| 1547 | − return 0; | |
| 1548 | − } | |
| 1537 | + cpumask_clear_cpu(cpu, policy->real_cpus); | |
| 1549 | 1538 | |
| 1539 | + if (cpumask_empty(policy->real_cpus)) { | |
| 1550 | 1540 | cpufreq_policy_free(policy, true); |
| 1551 | 1541 | return 0; |
| 1552 | 1542 | } |
| 1553 | 1543 | |
| 1554 | − ret = __cpufreq_remove_dev_prepare(dev, sif); | |
| 1544 | + if (cpu != policy->kobj_cpu) { | |
| 1545 | + remove_cpu_dev_symlink(policy, cpu); | |
| 1546 | + } else { | |
| 1547 | + /* | |
| 1548 | + * The CPU owning the policy object is going away. Move it to | |
| 1549 | + * another suitable CPU. | |
| 1550 | + */ | |
| 1551 | + unsigned int new_cpu = cpumask_first(policy->real_cpus); | |
| 1552 | + struct device *new_dev = get_cpu_device(new_cpu); | |
| 1553 | + | |
| 1554 | + dev_dbg(dev, "%s: Moving policy object to CPU%u\n", __func__, new_cpu); | |
| 1555 | 1555 | |
| 1556 | − if (!ret) | |
| 1557 | − ret = __cpufreq_remove_dev_finish(dev, sif); | |
| 1556 | + sysfs_remove_link(&new_dev->kobj, "cpufreq"); | |
| 1557 | + policy->kobj_cpu = new_cpu; | |
| 1558 | + WARN_ON(kobject_move(&policy->kobj, &new_dev->kobj)); | |
| 1559 | + } | |
| 1558 | 1560 | |
| 1559 | − return ret; | |
| 1561 | + return 0; | |
| 1560 | 1562 | } |
| 1561 | 1563 | |
| 1562 | 1564 | static void handle_update(struct work_struct *work) |
| @@ -2395,11 +2397,11 @@ static int cpufreq_cpu_callback(struct notifier_block *nfb, · 832 unmodified lines | ||
| 2395 | 2397 | break; |
| 2396 | 2398 | |
| 2397 | 2399 | case CPU_DOWN_PREPARE: |
| 2398 | − __cpufreq_remove_dev_prepare(dev, NULL); | |
| 2400 | + __cpufreq_remove_dev_prepare(dev); | |
| 2399 | 2401 | break; |
| 2400 | 2402 | |
| 2401 | 2403 | case CPU_POST_DEAD: |
| 2402 | − __cpufreq_remove_dev_finish(dev, NULL); | |
| 2404 | + __cpufreq_remove_dev_finish(dev); | |
| 2403 | 2405 | break; |
| 2404 | 2406 | |
| 2405 | 2407 | case CPU_DOWN_FAILED: |
| @@ -681,6 +681,7 @@ static struct cpu_defaults knl_params = { · 680 unmodified lines | ||
| 681 | 681 | .get_max = core_get_max_pstate, |
| 682 | 682 | .get_min = core_get_min_pstate, |
| 683 | 683 | .get_turbo = knl_get_turbo_pstate, |
| 684 | + .get_scaling = core_get_scaling, | |
| 684 | 685 | .set = core_set_pstate, |
| 685 | 686 | }, |
| 686 | 687 | }; |
| @@ -20,7 +20,7 @@ · 19 unmodified lines | ||
| 20 | 20 | #include <asm/clock.h> |
| 21 | 21 | #include <asm/idle.h> |
| 22 | 22 | |
| 23 | −#include <asm/mach-loongson/loongson.h> | |
| 23 | +#include <asm/mach-loongson64/loongson.h> | |
| 24 | 24 | |
| 25 | 25 | static uint nowait; |
| 26 | 26 | |
| @@ -905,7 +905,6 @@ static int ablk_perform(struct ablkcipher_request *req, int encrypt) · 904 unmodified lines | ||
| 905 | 905 | crypt->mode |= NPE_OP_NOT_IN_PLACE; |
| 906 | 906 | /* This was never tested by Intel |
| 907 | 907 | * for more than one dst buffer, I think. */ |
| 908 | − BUG_ON(req->dst->length < nbytes); | |
| 909 | 908 | req_ctx->dst = NULL; |
| 910 | 909 | if (!chainup_buffers(dev, req->dst, nbytes, &dst_hook, |
| 911 | 910 | flags, DMA_FROM_DEVICE)) |
| @@ -73,7 +73,8 @@ · 72 unmodified lines | ||
| 73 | 73 | ICP_QAT_HW_CIPHER_KEY_CONVERT, \ |
| 74 | 74 | ICP_QAT_HW_CIPHER_DECRYPT) |
| 75 | 75 | |
| 76 | −static atomic_t active_dev; | |
| 76 | +static DEFINE_MUTEX(algs_lock); | |
| 77 | +static unsigned int active_devs; | |
| 77 | 78 | |
| 78 | 79 | struct qat_alg_buf { |
| 79 | 80 | uint32_t len; |
| @@ -1280,7 +1281,10 @@ static struct crypto_alg qat_algs[] = { { · 1200 unmodified lines | ||
| 1280 | 1281 | |
| 1281 | 1282 | int qat_algs_register(void) |
| 1282 | 1283 | { |
| 1283 | − if (atomic_add_return(1, &active_dev) == 1) { | |
| 1284 | + int ret = 0; | |
| 1285 | + | |
| 1286 | + mutex_lock(&algs_lock); | |
| 1287 | + if (++active_devs == 1) { | |
| 1284 | 1288 | int i; |
| 1285 | 1289 | |
| 1286 | 1290 | for (i = 0; i < ARRAY_SIZE(qat_algs); i++) |
| @@ -1289,21 +1293,25 @@ int qat_algs_register(void) · 2 unmodified lines | ||
| 1289 | 1293 | CRYPTO_ALG_TYPE_AEAD | CRYPTO_ALG_ASYNC : |
| 1290 | 1294 | CRYPTO_ALG_TYPE_ABLKCIPHER | CRYPTO_ALG_ASYNC; |
| 1291 | 1295 | |
| 1292 | − return crypto_register_algs(qat_algs, ARRAY_SIZE(qat_algs)); | |
| 1296 | + ret = crypto_register_algs(qat_algs, ARRAY_SIZE(qat_algs)); | |
| 1293 | 1297 | } |
| 1294 | − return 0; | |
| 1298 | + mutex_unlock(&algs_lock); | |
| 1299 | + return ret; | |
| 1295 | 1300 | } |
| 1296 | 1301 | |
| 1297 | 1302 | int qat_algs_unregister(void) |
| 1298 | 1303 | { |
| 1299 | − if (atomic_sub_return(1, &active_dev) == 0) | |
| 1300 | − return crypto_unregister_algs(qat_algs, ARRAY_SIZE(qat_algs)); | |
| 1301 | − return 0; | |
| 1304 | + int ret = 0; | |
| 1305 | + | |
| 1306 | + mutex_lock(&algs_lock); | |
| 1307 | + if (--active_devs == 0) | |
| 1308 | + ret = crypto_unregister_algs(qat_algs, ARRAY_SIZE(qat_algs)); | |
| 1309 | + mutex_unlock(&algs_lock); | |
| 1310 | + return ret; | |
| 1302 | 1311 | } |
| 1303 | 1312 | |
| 1304 | 1313 | int qat_algs_init(void) |
| 1305 | 1314 | { |
| 1306 | − atomic_set(&active_dev, 0); | |
| 1307 | 1315 | crypto_get_default_rng(); |
| 1308 | 1316 | return 0; |
| 1309 | 1317 | } |
| @@ -48,6 +48,8 @@ · 47 unmodified lines | ||
| 48 | 48 | BIT(DMA_SLAVE_BUSWIDTH_2_BYTES) |\ |
| 49 | 49 | BIT(DMA_SLAVE_BUSWIDTH_4_BYTES)) |
| 50 | 50 | |
| 51 | +#define ATC_MAX_DSCR_TRIALS 10 | |
| 52 | + | |
| 51 | 53 | /* |
| 52 | 54 | * Initial number of descriptors to allocate for each channel. This could |
| 53 | 55 | * be increased during dma usage. |
| @@ -285,28 +287,19 @@ static struct at_desc *atc_get_desc_by_cookie(struct at_dma_chan *atchan, · 231 unmodified lines | ||
| 285 | 287 | * |
| 286 | 288 | * @current_len: the number of bytes left before reading CTRLA |
| 287 | 289 | * @ctrla: the value of CTRLA |
| 288 | − * @desc: the descriptor containing the transfer width | |
| 289 | 290 | */ |
| 290 | −static inline int atc_calc_bytes_left(int current_len, u32 ctrla, | |
| 291 | − struct at_desc *desc) | |
| 291 | +static inline int atc_calc_bytes_left(int current_len, u32 ctrla) | |
| 292 | 292 | { |
| 293 | − return current_len - ((ctrla & ATC_BTSIZE_MAX) << desc->tx_width); | |
| 294 | −} | |
| 293 | + u32 btsize = (ctrla & ATC_BTSIZE_MAX); | |
| 294 | + u32 src_width = ATC_REG_TO_SRC_WIDTH(ctrla); | |
| 295 | 295 | |
| 296 | −/** | |
| 297 | − * atc_calc_bytes_left_from_reg - calculates the number of bytes left according | |
| 298 | − * to the current value of CTRLA. | |
| 299 | − * | |
| 300 | − * @current_len: the number of bytes left before reading CTRLA | |
| 301 | − * @atchan: the channel to read CTRLA for | |
| 302 | − * @desc: the descriptor containing the transfer width | |
| 303 | − */ | |
| 304 | −static inline int atc_calc_bytes_left_from_reg(int current_len, | |
| 305 | − struct at_dma_chan *atchan, struct at_desc *desc) | |
| 306 | −{ | |
| 307 | − u32 ctrla = channel_readl(atchan, CTRLA); | |
| 308 | − | |
| 309 | − return atc_calc_bytes_left(current_len, ctrla, desc); | |
| 296 | + /* | |
| 297 | + * According to the datasheet, when reading the Control A Register | |
| 298 | + * (ctrla), the Buffer Transfer Size (btsize) bitfield refers to the | |
| 299 | + * number of transfers completed on the Source Interface. | |
| 300 | + * So btsize is always a number of source width transfers. | |
| 301 | + */ | |
| 302 | + return current_len - (btsize << src_width); | |
| 310 | 303 | } |
| 311 | 304 | |
| 312 | 305 | /** |
| @@ -320,7 +313,7 @@ static int atc_get_bytes_left(struct dma_chan *chan, dma_cookie_t cookie) · 7 unmodified lines | ||
| 320 | 313 | struct at_desc *desc_first = atc_first_active(atchan); |
| 321 | 314 | struct at_desc *desc; |
| 322 | 315 | int ret; |
| 323 | − u32 ctrla, dscr; | |
| 316 | + u32 ctrla, dscr, trials; | |
| 324 | 317 | |
| 325 | 318 | /* |
| 326 | 319 | * If the cookie doesn't match to the currently running transfer then |
| @@ -346,15 +339,82 @@ static int atc_get_bytes_left(struct dma_chan *chan, dma_cookie_t cookie) · 19 unmodified lines | ||
| 346 | 339 | * the channel's DSCR register and compare it against the value |
| 347 | 340 | * of the hardware linked list structure of each child |
| 348 | 341 | * descriptor. |
| 342 | + * | |
| 343 | + * The CTRLA register provides us with the amount of data | |
| 344 | + * already read from the source for the current child | |
| 345 | + * descriptor. So we can compute a more accurate residue by also | |
| 346 | + * removing the number of bytes corresponding to this amount of | |
| 347 | + * data. | |
| 348 | + * | |
| 349 | + * However, the DSCR and CTRLA registers cannot be read both | |
| 350 | + * atomically. Hence a race condition may occur: the first read | |
| 351 | + * register may refer to one child descriptor whereas the second | |
| 352 | + * read may refer to a later child descriptor in the list | |
| 353 | + * because of the DMA transfer progression inbetween the two | |
| 354 | + * reads. | |
| 355 | + * | |
| 356 | + * One solution could have been to pause the DMA transfer, read | |
| 357 | + * the DSCR and CTRLA then resume the DMA transfer. Nonetheless, | |
| 358 | + * this approach presents some drawbacks: | |
| 359 | + * - If the DMA transfer is paused, RX overruns or TX underruns | |
| 360 | + * are more likey to occur depending on the system latency. | |
| 361 | + * Taking the USART driver as an example, it uses a cyclic DMA | |
| 362 | + * transfer to read data from the Receive Holding Register | |
| 363 | + * (RHR) to avoid RX overruns since the RHR is not protected | |
| 364 | + * by any FIFO on most Atmel SoCs. So pausing the DMA transfer | |
| 365 | + * to compute the residue would break the USART driver design. | |
| 366 | + * - The atc_pause() function masks interrupts but we'd rather | |
| 367 | + * avoid to do so for system latency purpose. | |
| 368 | + * | |
| 369 | + * Then we'd rather use another solution: the DSCR is read a | |
| 370 | + * first time, the CTRLA is read in turn, next the DSCR is read | |
| 371 | + * a second time. If the two consecutive read values of the DSCR | |
| 372 | + * are the same then we assume both refers to the very same | |
| 373 | + * child descriptor as well as the CTRLA value read inbetween | |
| 374 | + * does. For cyclic tranfers, the assumption is that a full loop | |
| 375 | + * is "not so fast". | |
| 376 | + * If the two DSCR values are different, we read again the CTRLA | |
| 377 | + * then the DSCR till two consecutive read values from DSCR are | |
| 378 | + * equal or till the maxium trials is reach. | |
| 379 | + * This algorithm is very unlikely not to find a stable value for | |
| 380 | + * DSCR. | |
| 349 | 381 | */ |
| 350 | 382 | |
| 351 | − ctrla = channel_readl(atchan, CTRLA); | |
| 352 | − rmb(); /* ensure CTRLA is read before DSCR */ | |
| 353 | 383 | dscr = channel_readl(atchan, DSCR); |
| 384 | + rmb(); /* ensure DSCR is read before CTRLA */ | |
| 385 | + ctrla = channel_readl(atchan, CTRLA); | |
| 386 | + for (trials = 0; trials < ATC_MAX_DSCR_TRIALS; ++trials) { | |
| 387 | + u32 new_dscr; | |
| 388 | + | |
| 389 | + rmb(); /* ensure DSCR is read after CTRLA */ | |
| 390 | + new_dscr = channel_readl(atchan, DSCR); | |
| 391 | + | |
| 392 | + /* | |
| 393 | + * If the DSCR register value has not changed inside the | |
| 394 | + * DMA controller since the previous read, we assume | |
| 395 | + * that both the dscr and ctrla values refers to the | |
| 396 | + * very same descriptor. | |
| 397 | + */ | |
| 398 | + if (likely(new_dscr == dscr)) | |
| 399 | + break; | |
| 400 | + | |
| 401 | + /* | |
| 402 | + * DSCR has changed inside the DMA controller, so the | |
| 403 | + * previouly read value of CTRLA may refer to an already | |
| 404 | + * processed descriptor hence could be outdated. | |
| 405 | + * We need to update ctrla to match the current | |
| 406 | + * descriptor. | |
| 407 | + */ | |
| 408 | + dscr = new_dscr; | |
| 409 | + rmb(); /* ensure DSCR is read before CTRLA */ | |
| 410 | + ctrla = channel_readl(atchan, CTRLA); | |
| 411 | + } | |
| 412 | + if (unlikely(trials >= ATC_MAX_DSCR_TRIALS)) | |
| 413 | + return -ETIMEDOUT; | |
| 354 | 414 | |
| 355 | 415 | /* for the first descriptor we can be more accurate */ |
| 356 | 416 | if (desc_first->lli.dscr == dscr) |
| 357 | − return atc_calc_bytes_left(ret, ctrla, desc_first); | |
| 417 | + return atc_calc_bytes_left(ret, ctrla); | |
| 358 | 418 | |
| 359 | 419 | ret -= desc_first->len; |
| 360 | 420 | list_for_each_entry(desc, &desc_first->tx_list, desc_node) { |
| @@ -365,16 +425,14 @@ static int atc_get_bytes_left(struct dma_chan *chan, dma_cookie_t cookie) · 4 unmodified lines | ||
| 365 | 425 | } |
| 366 | 426 | |
| 367 | 427 | /* |
| 368 | − * For the last descriptor in the chain we can calculate | |
| 428 | + * For the current descriptor in the chain we can calculate | |
| 369 | 429 | * the remaining bytes using the channel's register. |
| 370 | − * Note that the transfer width of the first and last | |
| 371 | − * descriptor may differ. | |
| 372 | 430 | */ |
| 373 | − if (!desc->lli.dscr) | |
| 374 | − ret = atc_calc_bytes_left_from_reg(ret, atchan, desc); | |
| 431 | + ret = atc_calc_bytes_left(ret, ctrla); | |
| 375 | 432 | } else { |
| 376 | 433 | /* single transfer */ |
| 377 | − ret = atc_calc_bytes_left_from_reg(ret, atchan, desc_first); | |
| 434 | + ctrla = channel_readl(atchan, CTRLA); | |
| 435 | + ret = atc_calc_bytes_left(ret, ctrla); | |
| 378 | 436 | } |
| 379 | 437 | |
| 380 | 438 | return ret; |
| @@ -726,7 +784,6 @@ atc_prep_dma_interleaved(struct dma_chan *chan, · 345 unmodified lines | ||
| 726 | 784 | |
| 727 | 785 | desc->txd.cookie = -EBUSY; |
| 728 | 786 | desc->total_len = desc->len = len; |
| 729 | − desc->tx_width = dwidth; | |
| 730 | 787 | |
| 731 | 788 | /* set end-of-link to the last link descriptor of list*/ |
| 732 | 789 | set_desc_eol(desc); |
| @@ -804,10 +861,6 @@ atc_prep_dma_memcpy(struct dma_chan *chan, dma_addr_t dest, dma_addr_t src, · 71 unmodified lines | ||
| 804 | 861 | first->txd.cookie = -EBUSY; |
| 805 | 862 | first->total_len = len; |
| 806 | 863 | |
| 807 | − /* set transfer width for the calculation of the residue */ | |
| 808 | − first->tx_width = src_width; | |
| 809 | − prev->tx_width = src_width; | |
| 810 | − | |
| 811 | 864 | /* set end-of-link to the last link descriptor of list*/ |
| 812 | 865 | set_desc_eol(desc); |
| 813 | 866 | |
| @@ -956,10 +1009,6 @@ atc_prep_slave_sg(struct dma_chan *chan, struct scatterlist *sgl, · 142 unmodified lines | ||
| 956 | 1009 | first->txd.cookie = -EBUSY; |
| 957 | 1010 | first->total_len = total_len; |
| 958 | 1011 | |
| 959 | − /* set transfer width for the calculation of the residue */ | |
| 960 | − first->tx_width = reg_width; | |
| 961 | − prev->tx_width = reg_width; | |
| 962 | − | |
| 963 | 1012 | /* first link descriptor of list is responsible of flags */ |
| 964 | 1013 | first->txd.flags = flags; /* client is in control of this ack */ |
| 965 | 1014 | |
| @@ -1077,12 +1126,6 @@ atc_prep_dma_sg(struct dma_chan *chan, · 111 unmodified lines | ||
| 1077 | 1126 | desc->txd.cookie = 0; |
| 1078 | 1127 | desc->len = len; |
| 1079 | 1128 | |
| 1080 | − /* | |
| 1081 | − * Although we only need the transfer width for the first and | |
| 1082 | − * the last descriptor, its easier to set it to all descriptors. | |
| 1083 | − */ | |
| 1084 | − desc->tx_width = src_width; | |
| 1085 | − | |
| 1086 | 1129 | atc_desc_chain(&first, &prev, desc); |
| 1087 | 1130 | |
| 1088 | 1131 | /* update the lengths and addresses for the next loop cycle */ |
| @@ -1256,7 +1299,6 @@ atc_prep_dma_cyclic(struct dma_chan *chan, dma_addr_t buf_addr, size_t buf_len, · 167 unmodified lines | ||
| 1256 | 1299 | /* First descriptor of the chain embedds additional information */ |
| 1257 | 1300 | first->txd.cookie = -EBUSY; |
| 1258 | 1301 | first->total_len = buf_len; |
| 1259 | − first->tx_width = reg_width; | |
| 1260 | 1302 | |
| 1261 | 1303 | return &first->txd; |
| 1262 | 1304 | |
| @@ -112,6 +112,7 @@ · 111 unmodified lines | ||
| 112 | 112 | #define ATC_SRC_WIDTH_BYTE (0x0 << 24) |
| 113 | 113 | #define ATC_SRC_WIDTH_HALFWORD (0x1 << 24) |
| 114 | 114 | #define ATC_SRC_WIDTH_WORD (0x2 << 24) |
| 115 | +#define ATC_REG_TO_SRC_WIDTH(r) (((r) >> 24) & 0x3) | |
| 115 | 116 | #define ATC_DST_WIDTH_MASK (0x3 << 28) /* Destination Single Transfer Size */ |
| 116 | 117 | #define ATC_DST_WIDTH(x) ((x) << 28) |
| 117 | 118 | #define ATC_DST_WIDTH_BYTE (0x0 << 28) |
| @@ -182,7 +183,6 @@ struct at_lli { · 64 unmodified lines | ||
| 182 | 183 | * @txd: support for the async_tx api |
| 183 | 184 | * @desc_node: node on the channed descriptors list |
| 184 | 185 | * @len: descriptor byte count |
| 185 | − * @tx_width: transfer width | |
| 186 | 186 | * @total_len: total transaction byte count |
| 187 | 187 | */ |
| 188 | 188 | struct at_desc { |
| @@ -194,7 +194,6 @@ struct at_desc { · 5 unmodified lines | ||
| 194 | 194 | struct dma_async_tx_descriptor txd; |
| 195 | 195 | struct list_head desc_node; |
| 196 | 196 | size_t len; |
| 197 | − u32 tx_width; | |
| 198 | 197 | size_t total_len; |
| 199 | 198 | |
| 200 | 199 | /* Interleaved data */ |
| @@ -359,18 +359,19 @@ static void at_xdmac_start_xfer(struct at_xdmac_chan *atchan, · 358 unmodified lines | ||
| 359 | 359 | * descriptor view 2 since some fields of the configuration register |
| 360 | 360 | * depend on transfer size and src/dest addresses. |
| 361 | 361 | */ |
| 362 | − if (at_xdmac_chan_is_cyclic(atchan)) { | |
| 362 | + if (at_xdmac_chan_is_cyclic(atchan)) | |
| 363 | 363 | reg = AT_XDMAC_CNDC_NDVIEW_NDV1; |
| 364 | − at_xdmac_chan_write(atchan, AT_XDMAC_CC, first->lld.mbr_cfg); | |
| 365 | − } else if (first->lld.mbr_ubc & AT_XDMAC_MBR_UBC_NDV3) { | |
| 364 | + else if (first->lld.mbr_ubc & AT_XDMAC_MBR_UBC_NDV3) | |
| 366 | 365 | reg = AT_XDMAC_CNDC_NDVIEW_NDV3; |
| 367 | − } else { | |
| 368 | − /* | |
| 369 | − * No need to write AT_XDMAC_CC reg, it will be done when the | |
| 370 | − * descriptor is fecthed. | |
| 371 | − */ | |
| 366 | + else | |
| 372 | 367 | reg = AT_XDMAC_CNDC_NDVIEW_NDV2; |
| 373 | − } | |
| 368 | + /* | |
| 369 | + * Even if the register will be updated from the configuration in the | |
| 370 | + * descriptor when using view 2 or higher, the PROT bit won't be set | |
| 371 | + * properly. This bit can be modified only by using the channel | |
| 372 | + * configuration register. | |
| 373 | + */ | |
| 374 | + at_xdmac_chan_write(atchan, AT_XDMAC_CC, first->lld.mbr_cfg); | |
| 374 | 375 | |
| 375 | 376 | reg |= AT_XDMAC_CNDC_NDDUP |
| 376 | 377 | | AT_XDMAC_CNDC_NDSUP |
| @@ -681,15 +682,16 @@ at_xdmac_prep_slave_sg(struct dma_chan *chan, struct scatterlist *sgl, · 304 unmodified lines | ||
| 681 | 682 | desc->lld.mbr_sa = mem; |
| 682 | 683 | desc->lld.mbr_da = atchan->sconfig.dst_addr; |
| 683 | 684 | } |
| 684 | − desc->lld.mbr_cfg = atchan->cfg; | |
| 685 | − dwidth = at_xdmac_get_dwidth(desc->lld.mbr_cfg); | |
| 685 | + dwidth = at_xdmac_get_dwidth(atchan->cfg); | |
| 686 | 686 | fixed_dwidth = IS_ALIGNED(len, 1 << dwidth) |
| 687 | − ? at_xdmac_get_dwidth(desc->lld.mbr_cfg) | |
| 687 | + ? dwidth | |
| 688 | 688 | : AT_XDMAC_CC_DWIDTH_BYTE; |
| 689 | 689 | desc->lld.mbr_ubc = AT_XDMAC_MBR_UBC_NDV2 /* next descriptor view */ |
| 690 | 690 | | AT_XDMAC_MBR_UBC_NDEN /* next descriptor dst parameter update */ |
| 691 | 691 | | AT_XDMAC_MBR_UBC_NSEN /* next descriptor src parameter update */ |
| 692 | 692 | | (len >> fixed_dwidth); /* microblock length */ |
| 693 | + desc->lld.mbr_cfg = (atchan->cfg & ~AT_XDMAC_CC_DWIDTH_MASK) | | |
| 694 | + AT_XDMAC_CC_DWIDTH(fixed_dwidth); | |
| 693 | 695 | dev_dbg(chan2dev(chan), |
| 694 | 696 | "%s: lld: mbr_sa=%pad, mbr_da=%pad, mbr_ubc=0x%08x\n", |
| 695 | 697 | __func__, &desc->lld.mbr_sa, &desc->lld.mbr_da, desc->lld.mbr_ubc); |
| @@ -162,10 +162,11 @@ static void mv_chan_set_mode(struct mv_xor_chan *chan, · 161 unmodified lines | ||
| 162 | 162 | config &= ~0x7; |
| 163 | 163 | config |= op_mode; |
| 164 | 164 | |
| 165 | − if (IS_ENABLED(__BIG_ENDIAN)) | |
| 166 | − config |= XOR_DESCRIPTOR_SWAP; | |
| 167 | − else | |
| 168 | − config &= ~XOR_DESCRIPTOR_SWAP; | |
| 165 | +#if defined(__BIG_ENDIAN) | |
| 166 | + config |= XOR_DESCRIPTOR_SWAP; | |
| 167 | +#else | |
| 168 | + config &= ~XOR_DESCRIPTOR_SWAP; | |
| 169 | +#endif | |
| 169 | 170 | |
| 170 | 171 | writel_relaxed(config, XOR_CONFIG(chan)); |
| 171 | 172 | chan->current_type = type; |
| @@ -2328,7 +2328,7 @@ static dma_cookie_t pl330_tx_submit(struct dma_async_tx_descriptor *tx) · 2327 unmodified lines | ||
| 2328 | 2328 | desc->txd.callback = last->txd.callback; |
| 2329 | 2329 | desc->txd.callback_param = last->txd.callback_param; |
| 2330 | 2330 | } |
| 2331 | − last->last = false; | |
| 2331 | + desc->last = false; | |
| 2332 | 2332 | |
| 2333 | 2333 | dma_cookie_assign(&desc->txd); |
| 2334 | 2334 | |
| @@ -2623,6 +2623,7 @@ pl330_prep_dma_memcpy(struct dma_chan *chan, dma_addr_t dst, · 288 unmodified lines | ||
| 2623 | 2623 | desc->rqcfg.brst_len = 1; |
| 2624 | 2624 | |
| 2625 | 2625 | desc->rqcfg.brst_len = get_burst_len(desc, len); |
| 2626 | + desc->bytes_requested = len; | |
| 2626 | 2627 | |
| 2627 | 2628 | desc->txd.flags = flags; |
| 2628 | 2629 | |
| @@ -29,7 +29,7 @@ dma_cookie_t vchan_tx_submit(struct dma_async_tx_descriptor *tx) · 28 unmodified lines | ||
| 29 | 29 | spin_lock_irqsave(&vc->lock, flags); |
| 30 | 30 | cookie = dma_cookie_assign(tx); |
| 31 | 31 | |
| 32 | − list_move_tail(&vd->node, &vc->desc_submitted); | |
| 32 | + list_add_tail(&vd->node, &vc->desc_submitted); | |
| 33 | 33 | spin_unlock_irqrestore(&vc->lock, flags); |
| 34 | 34 | |
| 35 | 35 | dev_dbg(vc->chan.device->dev, "vchan %p: txd %p[%x]: submitted\n", |
| @@ -83,10 +83,8 @@ static void vchan_complete(unsigned long arg) · 47 unmodified lines | ||
| 83 | 83 | cb_data = vd->tx.callback_param; |
| 84 | 84 | |
| 85 | 85 | list_del(&vd->node); |
| 86 | − if (async_tx_test_ack(&vd->tx)) | |
| 87 | − list_add(&vd->node, &vc->desc_allocated); | |
| 88 | − else | |
| 89 | − vc->desc_free(vd); | |
| 86 | + | |
| 87 | + vc->desc_free(vd); | |
| 90 | 88 | |
| 91 | 89 | if (cb) |
| 92 | 90 | cb(cb_data); |
| @@ -98,13 +96,9 @@ void vchan_dma_desc_free_list(struct virt_dma_chan *vc, struct list_head *head) · 5 unmodified lines | ||
| 98 | 96 | while (!list_empty(head)) { |
| 99 | 97 | struct virt_dma_desc *vd = list_first_entry(head, |
| 100 | 98 | struct virt_dma_desc, node); |
| 101 | − if (async_tx_test_ack(&vd->tx)) { | |
| 102 | − list_move_tail(&vd->node, &vc->desc_allocated); | |
| 103 | − } else { | |
| 104 | − dev_dbg(vc->chan.device->dev, "txd %p: freeing\n", vd); | |
| 105 | − list_del(&vd->node); | |
| 106 | − vc->desc_free(vd); | |
| 107 | − } | |
| 99 | + list_del(&vd->node); | |
| 100 | + dev_dbg(vc->chan.device->dev, "txd %p: freeing\n", vd); | |
| 101 | + vc->desc_free(vd); | |
| 108 | 102 | } |
| 109 | 103 | } |
| 110 | 104 | EXPORT_SYMBOL_GPL(vchan_dma_desc_free_list); |
| @@ -114,7 +108,6 @@ void vchan_init(struct virt_dma_chan *vc, struct dma_device *dmadev) · 3 unmodified lines | ||
| 114 | 108 | dma_cookie_init(&vc->chan); |
| 115 | 109 | |
| 116 | 110 | spin_lock_init(&vc->lock); |
| 117 | − INIT_LIST_HEAD(&vc->desc_allocated); | |
| 118 | 111 | INIT_LIST_HEAD(&vc->desc_submitted); |
| 119 | 112 | INIT_LIST_HEAD(&vc->desc_issued); |
| 120 | 113 | INIT_LIST_HEAD(&vc->desc_completed); |
| @@ -29,7 +29,6 @@ struct virt_dma_chan { · 28 unmodified lines | ||
| 29 | 29 | spinlock_t lock; |
| 30 | 30 | |
| 31 | 31 | /* protected by vc.lock */ |
| 32 | − struct list_head desc_allocated; | |
| 33 | 32 | struct list_head desc_submitted; |
| 34 | 33 | struct list_head desc_issued; |
| 35 | 34 | struct list_head desc_completed; |
| @@ -56,16 +55,11 @@ static inline struct dma_async_tx_descriptor *vchan_tx_prep(struct virt_dma_chan · 20 unmodified lines | ||
| 56 | 55 | struct virt_dma_desc *vd, unsigned long tx_flags) |
| 57 | 56 | { |
| 58 | 57 | extern dma_cookie_t vchan_tx_submit(struct dma_async_tx_descriptor *); |
| 59 | − unsigned long flags; | |
| 60 | 58 | |
| 61 | 59 | dma_async_tx_descriptor_init(&vd->tx, &vc->chan); |
| 62 | 60 | vd->tx.flags = tx_flags; |
| 63 | 61 | vd->tx.tx_submit = vchan_tx_submit; |
| 64 | 62 | |
| 65 | − spin_lock_irqsave(&vc->lock, flags); | |
| 66 | − list_add_tail(&vd->node, &vc->desc_allocated); | |
| 67 | − spin_unlock_irqrestore(&vc->lock, flags); | |
| 68 | − | |
| 69 | 63 | return &vd->tx; |
| 70 | 64 | } |
| 71 | 65 | |
| @@ -128,8 +122,7 @@ static inline struct virt_dma_desc *vchan_next_desc(struct virt_dma_chan *vc) · 56 unmodified lines | ||
| 128 | 122 | } |
| 129 | 123 | |
| 130 | 124 | /** |
| 131 | − * vchan_get_all_descriptors - obtain all allocated, submitted and issued | |
| 132 | − * descriptors | |
| 125 | + * vchan_get_all_descriptors - obtain all submitted and issued descriptors | |
| 133 | 126 | * vc: virtual channel to get descriptors from |
| 134 | 127 | * head: list of descriptors found |
| 135 | 128 | * |
| @@ -141,7 +134,6 @@ static inline struct virt_dma_desc *vchan_next_desc(struct virt_dma_chan *vc) · 5 unmodified lines | ||
| 141 | 134 | static inline void vchan_get_all_descriptors(struct virt_dma_chan *vc, |
| 142 | 135 | struct list_head *head) |
| 143 | 136 | { |
| 144 | − list_splice_tail_init(&vc->desc_allocated, head); | |
| 145 | 137 | list_splice_tail_init(&vc->desc_submitted, head); |
| 146 | 138 | list_splice_tail_init(&vc->desc_issued, head); |
| 147 | 139 | list_splice_tail_init(&vc->desc_completed, head); |
| @@ -149,14 +141,11 @@ static inline void vchan_get_all_descriptors(struct virt_dma_chan *vc, · 1 unmodified line | ||
| 149 | 141 | |
| 150 | 142 | static inline void vchan_free_chan_resources(struct virt_dma_chan *vc) |
| 151 | 143 | { |
| 152 | − struct virt_dma_desc *vd; | |
| 153 | 144 | unsigned long flags; |
| 154 | 145 | LIST_HEAD(head); |
| 155 | 146 | |
| 156 | 147 | spin_lock_irqsave(&vc->lock, flags); |
| 157 | 148 | vchan_get_all_descriptors(vc, &head); |
| 158 | − list_for_each_entry(vd, &head, node) | |
| 159 | − async_tx_clear_ack(&vd->tx); | |
| 160 | 149 | spin_unlock_irqrestore(&vc->lock, flags); |
| 161 | 150 | |
| 162 | 151 | vchan_dma_desc_free_list(vc, &head); |
| @@ -111,6 +111,7 @@ · 110 unmodified lines | ||
| 111 | 111 | #define XGENE_DMA_MEM_RAM_SHUTDOWN 0xD070 |
| 112 | 112 | #define XGENE_DMA_BLK_MEM_RDY 0xD074 |
| 113 | 113 | #define XGENE_DMA_BLK_MEM_RDY_VAL 0xFFFFFFFF |
| 114 | +#define XGENE_DMA_RING_CMD_SM_OFFSET 0x8000 | |
| 114 | 115 | |
| 115 | 116 | /* X-Gene SoC EFUSE csr register and bit defination */ |
| 116 | 117 | #define XGENE_SOC_JTAG1_SHADOW 0x18 |
| @@ -1887,6 +1888,8 @@ static int xgene_dma_get_resources(struct platform_device *pdev, · 1770 unmodified lines | ||
| 1887 | 1888 | return -ENOMEM; |
| 1888 | 1889 | } |
| 1889 | 1890 | |
| 1891 | + pdma->csr_ring_cmd += XGENE_DMA_RING_CMD_SM_OFFSET; | |
| 1892 | + | |
| 1890 | 1893 | /* Get efuse csr region */ |
| 1891 | 1894 | res = platform_get_resource(pdev, IORESOURCE_MEM, 3); |
| 1892 | 1895 | if (!res) { |
| @@ -920,7 +920,7 @@ static int ppc4xx_edac_init_csrows(struct mem_ctl_info *mci, u32 mcopt1) · 919 unmodified lines | ||
| 920 | 920 | */ |
| 921 | 921 | |
| 922 | 922 | for (row = 0; row < mci->nr_csrows; row++) { |
| 923 | − struct csrow_info *csi = &mci->csrows[row]; | |
| 923 | + struct csrow_info *csi = mci->csrows[row]; | |
| 924 | 924 | |
| 925 | 925 | /* |
| 926 | 926 | * Get the configuration settings for this |
| @@ -200,7 +200,6 @@ static int palmas_usb_probe(struct platform_device *pdev) · 199 unmodified lines | ||
| 200 | 200 | status = devm_extcon_dev_register(&pdev->dev, palmas_usb->edev); |
| 201 | 201 | if (status) { |
| 202 | 202 | dev_err(&pdev->dev, "failed to register extcon device\n"); |
| 203 | − kfree(palmas_usb->edev->name); | |
| 204 | 203 | return status; |
| 205 | 204 | } |
| 206 | 205 | |
| @@ -214,7 +213,6 @@ static int palmas_usb_probe(struct platform_device *pdev) · 7 unmodified lines | ||
| 214 | 213 | if (status < 0) { |
| 215 | 214 | dev_err(&pdev->dev, "can't get IRQ %d, err %d\n", |
| 216 | 215 | palmas_usb->id_irq, status); |
| 217 | − kfree(palmas_usb->edev->name); | |
| 218 | 216 | return status; |
| 219 | 217 | } |
| 220 | 218 | } |
| @@ -229,7 +227,6 @@ static int palmas_usb_probe(struct platform_device *pdev) · 8 unmodified lines | ||
| 229 | 227 | if (status < 0) { |
| 230 | 228 | dev_err(&pdev->dev, "can't get IRQ %d, err %d\n", |
| 231 | 229 | palmas_usb->vbus_irq, status); |
| 232 | − kfree(palmas_usb->edev->name); | |
| 233 | 230 | return status; |
| 234 | 231 | } |
| 235 | 232 | } |
| @@ -239,15 +236,6 @@ static int palmas_usb_probe(struct platform_device *pdev) · 3 unmodified lines | ||
| 239 | 236 | return 0; |
| 240 | 237 | } |
| 241 | 238 | |
| 242 | −static int palmas_usb_remove(struct platform_device *pdev) | |
| 243 | −{ | |
| 244 | − struct palmas_usb *palmas_usb = platform_get_drvdata(pdev); | |
| 245 | − | |
| 246 | − kfree(palmas_usb->edev->name); | |
| 247 | − | |
| 248 | − return 0; | |
| 249 | −} | |
| 250 | − | |
| 251 | 239 | #ifdef CONFIG_PM_SLEEP |
| 252 | 240 | static int palmas_usb_suspend(struct device *dev) |
| 253 | 241 | { |
| @@ -288,7 +276,6 @@ static const struct of_device_id of_palmas_match_tbl[] = { · 34 unmodified lines | ||
| 288 | 276 | |
| 289 | 277 | static struct platform_driver palmas_usb_driver = { |
| 290 | 278 | .probe = palmas_usb_probe, |
| 291 | − .remove = palmas_usb_remove, | |
| 292 | 279 | .driver = { |
| 293 | 280 | .name = "palmas-usb", |
| 294 | 281 | .of_match_table = of_palmas_match_tbl, |
| @@ -124,25 +124,35 @@ static int find_cable_index_by_id(struct extcon_dev *edev, const unsigned int id · 123 unmodified lines | ||
| 124 | 124 | return -EINVAL; |
| 125 | 125 | } |
| 126 | 126 | |
| 127 | −static int find_cable_index_by_name(struct extcon_dev *edev, const char *name) | |
| 127 | +static int find_cable_id_by_name(struct extcon_dev *edev, const char *name) | |
| 128 | 128 | { |
| 129 | − unsigned int id = EXTCON_NONE; | |
| 129 | + unsigned int id = -EINVAL; | |
| 130 | 130 | int i = 0; |
| 131 | 131 | |
| 132 | − if (edev->max_supported == 0) | |
| 133 | − return -EINVAL; | |
| 134 | − | |
| 135 | − /* Find the the number of extcon cable */ | |
| 132 | + /* Find the id of extcon cable */ | |
| 136 | 133 | while (extcon_name[i]) { |
| 137 | 134 | if (!strncmp(extcon_name[i], name, CABLE_NAME_MAX)) { |
| 138 | 135 | id = i; |
| 139 | 136 | break; |
| 140 | 137 | } |
| 138 | + i++; | |
| 141 | 139 | } |
| 142 | 140 | |
| 143 | − if (id == EXTCON_NONE) | |
| 141 | + return id; | |
| 142 | +} | |
| 143 | + | |
| 144 | +static int find_cable_index_by_name(struct extcon_dev *edev, const char *name) | |
| 145 | +{ | |
| 146 | + unsigned int id; | |
| 147 | + | |
| 148 | + if (edev->max_supported == 0) | |
| 144 | 149 | return -EINVAL; |
| 145 | 150 | |
| 151 | + /* Find the the number of extcon cable */ | |
| 152 | + id = find_cable_id_by_name(edev, name); | |
| 153 | + if (id < 0) | |
| 154 | + return id; | |
| 155 | + | |
| 146 | 156 | return find_cable_index_by_id(edev, id); |
| 147 | 157 | } |
| 148 | 158 | |
| @@ -228,9 +238,11 @@ static ssize_t cable_state_show(struct device *dev, · 79 unmodified lines | ||
| 228 | 238 | struct extcon_cable *cable = container_of(attr, struct extcon_cable, |
| 229 | 239 | attr_state); |
| 230 | 240 | |
| 241 | + int i = cable->cable_index; | |
| 242 | + | |
| 231 | 243 | return sprintf(buf, "%d\n", |
| 232 | 244 | extcon_get_cable_state_(cable->edev, |
| 233 | − cable->cable_index)); | |
| 245 | + cable->edev->supported_cable[i])); | |
| 234 | 246 | } |
| 235 | 247 | |
| 236 | 248 | /** |
| @@ -263,20 +275,25 @@ int extcon_update_state(struct extcon_dev *edev, u32 mask, u32 state) · 26 unmodified lines | ||
| 263 | 275 | spin_lock_irqsave(&edev->lock, flags); |
| 264 | 276 | |
| 265 | 277 | if (edev->state != ((edev->state & ~mask) | (state & mask))) { |
| 278 | + u32 old_state; | |
| 279 | + | |
| 266 | 280 | if (check_mutually_exclusive(edev, (edev->state & ~mask) | |
| 267 | 281 | (state & mask))) { |
| 268 | 282 | spin_unlock_irqrestore(&edev->lock, flags); |
| 269 | 283 | return -EPERM; |
| 270 | 284 | } |
| 271 | 285 | |
| 272 | − for (index = 0; index < edev->max_supported; index++) { | |
| 273 | − if (is_extcon_changed(edev->state, state, index, &attached)) | |
| 274 | − raw_notifier_call_chain(&edev->nh[index], attached, edev); | |
| 275 | − } | |
| 276 | − | |
| 286 | + old_state = edev->state; | |
| 277 | 287 | edev->state &= ~mask; |
| 278 | 288 | edev->state |= state & mask; |
| 279 | 289 | |
| 290 | + for (index = 0; index < edev->max_supported; index++) { | |
| 291 | + if (is_extcon_changed(old_state, edev->state, index, | |
| 292 | + &attached)) | |
| 293 | + raw_notifier_call_chain(&edev->nh[index], | |
| 294 | + attached, edev); | |
| 295 | + } | |
| 296 | + | |
| 280 | 297 | /* This could be in interrupt handler */ |
| 281 | 298 | prop_buf = (char *)get_zeroed_page(GFP_ATOMIC); |
| 282 | 299 | if (prop_buf) { |
| @@ -361,8 +378,13 @@ EXPORT_SYMBOL_GPL(extcon_get_cable_state_); · 78 unmodified lines | ||
| 361 | 378 | */ |
| 362 | 379 | int extcon_get_cable_state(struct extcon_dev *edev, const char *cable_name) |
| 363 | 380 | { |
| 364 | − return extcon_get_cable_state_(edev, find_cable_index_by_name | |
| 365 | − (edev, cable_name)); | |
| 381 | + unsigned int id; | |
| 382 | + | |
| 383 | + id = find_cable_id_by_name(edev, cable_name); | |
| 384 | + if (id < 0) | |
| 385 | + return id; | |
| 386 | + | |
| 387 | + return extcon_get_cable_state_(edev, id); | |
| 366 | 388 | } |
| 367 | 389 | EXPORT_SYMBOL_GPL(extcon_get_cable_state); |
| 368 | 390 | |
| @@ -404,8 +426,13 @@ EXPORT_SYMBOL_GPL(extcon_set_cable_state_); · 35 unmodified lines | ||
| 404 | 426 | int extcon_set_cable_state(struct extcon_dev *edev, |
| 405 | 427 | const char *cable_name, bool cable_state) |
| 406 | 428 | { |
| 407 | − return extcon_set_cable_state_(edev, find_cable_index_by_name | |
| 408 | − (edev, cable_name), cable_state); | |
| 429 | + unsigned int id; | |
| 430 | + | |
| 431 | + id = find_cable_id_by_name(edev, cable_name); | |
| 432 | + if (id < 0) | |
| 433 | + return id; | |
| 434 | + | |
| 435 | + return extcon_set_cable_state_(edev, id, cable_state); | |
| 409 | 436 | } |
| 410 | 437 | EXPORT_SYMBOL_GPL(extcon_set_cable_state); |
| 411 | 438 | |
| @@ -305,10 +305,17 @@ const char *cper_mem_err_unpack(struct trace_seq *p, · 304 unmodified lines | ||
| 305 | 305 | return ret; |
| 306 | 306 | } |
| 307 | 307 | |
| 308 | −static void cper_print_mem(const char *pfx, const struct cper_sec_mem_err *mem) | |
| 308 | +static void cper_print_mem(const char *pfx, const struct cper_sec_mem_err *mem, | |
| 309 | + int len) | |
| 309 | 310 | { |
| 310 | 311 | struct cper_mem_err_compact cmem; |
| 311 | 312 | |
| 313 | + /* Don't trust UEFI 2.1/2.2 structure with bad validation bits */ | |
| 314 | + if (len == sizeof(struct cper_sec_mem_err_old) && | |
| 315 | + (mem->validation_bits & ~(CPER_MEM_VALID_RANK_NUMBER - 1))) { | |
| 316 | + pr_err(FW_WARN "valid bits set for fields beyond structure\n"); | |
| 317 | + return; | |
| 318 | + } | |
| 312 | 319 | if (mem->validation_bits & CPER_MEM_VALID_ERROR_STATUS) |
| 313 | 320 | printk("%s""error_status: 0x%016llx\n", pfx, mem->error_status); |
| 314 | 321 | if (mem->validation_bits & CPER_MEM_VALID_PA) |
| @@ -405,8 +412,10 @@ static void cper_estatus_print_section( · 90 unmodified lines | ||
| 405 | 412 | } else if (!uuid_le_cmp(*sec_type, CPER_SEC_PLATFORM_MEM)) { |
| 406 | 413 | struct cper_sec_mem_err *mem_err = (void *)(gdata + 1); |
| 407 | 414 | printk("%s""section_type: memory error\n", newpfx); |
| 408 | − if (gdata->error_data_length >= sizeof(*mem_err)) | |
| 409 | − cper_print_mem(newpfx, mem_err); | |
| 415 | + if (gdata->error_data_length >= | |
| 416 | + sizeof(struct cper_sec_mem_err_old)) | |
| 417 | + cper_print_mem(newpfx, mem_err, | |
| 418 | + gdata->error_data_length); | |
| 410 | 419 | else |
| 411 | 420 | goto err_section_too_small; |
| 412 | 421 | } else if (!uuid_le_cmp(*sec_type, CPER_SEC_PCIE)) { |
| @@ -58,6 +58,11 @@ bool efi_runtime_disabled(void) · 57 unmodified lines | ||
| 58 | 58 | |
| 59 | 59 | static int __init parse_efi_cmdline(char *str) |
| 60 | 60 | { |
| 61 | + if (!str) { | |
| 62 | + pr_warn("need at least one option\n"); | |
| 63 | + return -EINVAL; | |
| 64 | + } | |
| 65 | + | |
| 61 | 66 | if (parse_option_str(str, "noruntime")) |
| 62 | 67 | disable_runtime = true; |
| 63 | 68 | |
| @@ -1130,6 +1130,9 @@ struct amdgpu_gfx { · 1129 unmodified lines | ||
| 1130 | 1130 | uint32_t me_feature_version; |
| 1131 | 1131 | uint32_t ce_feature_version; |
| 1132 | 1132 | uint32_t pfp_feature_version; |
| 1133 | + uint32_t rlc_feature_version; | |
| 1134 | + uint32_t mec_feature_version; | |
| 1135 | + uint32_t mec2_feature_version; | |
| 1133 | 1136 | struct amdgpu_ring gfx_ring[AMDGPU_MAX_GFX_RINGS]; |
| 1134 | 1137 | unsigned num_gfx_rings; |
| 1135 | 1138 | struct amdgpu_ring compute_ring[AMDGPU_MAX_COMPUTE_RINGS]; |
| @@ -1614,6 +1617,9 @@ struct amdgpu_uvd { · 478 unmodified lines | ||
| 1614 | 1617 | #define AMDGPU_MAX_VCE_HANDLES 16 |
| 1615 | 1618 | #define AMDGPU_VCE_FIRMWARE_OFFSET 256 |
| 1616 | 1619 | |
| 1620 | +#define AMDGPU_VCE_HARVEST_VCE0 (1 << 0) | |
| 1621 | +#define AMDGPU_VCE_HARVEST_VCE1 (1 << 1) | |
| 1622 | + | |
| 1617 | 1623 | struct amdgpu_vce { |
| 1618 | 1624 | struct amdgpu_bo *vcpu_bo; |
| 1619 | 1625 | uint64_t gpu_addr; |
| @@ -1626,6 +1632,7 @@ struct amdgpu_vce { · 6 unmodified lines | ||
| 1626 | 1632 | const struct firmware *fw; /* VCE firmware */ |
| 1627 | 1633 | struct amdgpu_ring ring[AMDGPU_MAX_VCE_RINGS]; |
| 1628 | 1634 | struct amdgpu_irq_src irq; |
| 1635 | + unsigned harvest_config; | |
| 1629 | 1636 | }; |
| 1630 | 1637 | |
| 1631 | 1638 | /* |
| @@ -1635,6 +1642,7 @@ struct amdgpu_sdma { · 3 unmodified lines | ||
| 1635 | 1642 | /* SDMA firmware */ |
| 1636 | 1643 | const struct firmware *fw; |
| 1637 | 1644 | uint32_t fw_version; |
| 1645 | + uint32_t feature_version; | |
| 1638 | 1646 | |
| 1639 | 1647 | struct amdgpu_ring ring; |
| 1640 | 1648 | }; |
| @@ -1862,6 +1870,12 @@ typedef void (*amdgpu_wreg_t)(struct amdgpu_device*, uint32_t, uint32_t); · 221 unmodified lines | ||
| 1862 | 1870 | typedef uint32_t (*amdgpu_block_rreg_t)(struct amdgpu_device*, uint32_t, uint32_t); |
| 1863 | 1871 | typedef void (*amdgpu_block_wreg_t)(struct amdgpu_device*, uint32_t, uint32_t, uint32_t); |
| 1864 | 1872 | |
| 1873 | +struct amdgpu_ip_block_status { | |
| 1874 | + bool valid; | |
| 1875 | + bool sw; | |
| 1876 | + bool hw; | |
| 1877 | +}; | |
| 1878 | + | |
| 1865 | 1879 | struct amdgpu_device { |
| 1866 | 1880 | struct device *dev; |
| 1867 | 1881 | struct drm_device *ddev; |
| @@ -2004,7 +2018,7 @@ struct amdgpu_device { · 136 unmodified lines | ||
| 2004 | 2018 | |
| 2005 | 2019 | const struct amdgpu_ip_block_version *ip_blocks; |
| 2006 | 2020 | int num_ip_blocks; |
| 2007 | − bool *ip_block_enabled; | |
| 2021 | + struct amdgpu_ip_block_status *ip_block_status; | |
| 2008 | 2022 | struct mutex mn_lock; |
| 2009 | 2023 | DECLARE_HASHTABLE(mn_hash, 7); |
| 2010 | 2024 | |
| @@ -1191,8 +1191,9 @@ static int amdgpu_early_init(struct amdgpu_device *adev) · 1190 unmodified lines | ||
| 1191 | 1191 | return -EINVAL; |
| 1192 | 1192 | } |
| 1193 | 1193 | |
| 1194 | − adev->ip_block_enabled = kcalloc(adev->num_ip_blocks, sizeof(bool), GFP_KERNEL); | |
| 1195 | − if (adev->ip_block_enabled == NULL) | |
| 1194 | + adev->ip_block_status = kcalloc(adev->num_ip_blocks, | |
| 1195 | + sizeof(struct amdgpu_ip_block_status), GFP_KERNEL); | |
| 1196 | + if (adev->ip_block_status == NULL) | |
| 1196 | 1197 | return -ENOMEM; |
| 1197 | 1198 | |
| 1198 | 1199 | if (adev->ip_blocks == NULL) { |
| @@ -1203,18 +1204,18 @@ static int amdgpu_early_init(struct amdgpu_device *adev) · 4 unmodified lines | ||
| 1203 | 1204 | for (i = 0; i < adev->num_ip_blocks; i++) { |
| 1204 | 1205 | if ((amdgpu_ip_block_mask & (1 << i)) == 0) { |
| 1205 | 1206 | DRM_ERROR("disabled ip block: %d\n", i); |
| 1206 | − adev->ip_block_enabled[i] = false; | |
| 1207 | + adev->ip_block_status[i].valid = false; | |
| 1207 | 1208 | } else { |
| 1208 | 1209 | if (adev->ip_blocks[i].funcs->early_init) { |
| 1209 | 1210 | r = adev->ip_blocks[i].funcs->early_init((void *)adev); |
| 1210 | 1211 | if (r == -ENOENT) |
| 1211 | − adev->ip_block_enabled[i] = false; | |
| 1212 | + adev->ip_block_status[i].valid = false; | |
| 1212 | 1213 | else if (r) |
| 1213 | 1214 | return r; |
| 1214 | 1215 | else |
| 1215 | − adev->ip_block_enabled[i] = true; | |
| 1216 | + adev->ip_block_status[i].valid = true; | |
| 1216 | 1217 | } else { |
| 1217 | − adev->ip_block_enabled[i] = true; | |
| 1218 | + adev->ip_block_status[i].valid = true; | |
| 1218 | 1219 | } |
| 1219 | 1220 | } |
| 1220 | 1221 | } |
| @@ -1227,11 +1228,12 @@ static int amdgpu_init(struct amdgpu_device *adev) · 6 unmodified lines | ||
| 1227 | 1228 | int i, r; |
| 1228 | 1229 | |
| 1229 | 1230 | for (i = 0; i < adev->num_ip_blocks; i++) { |
| 1230 | − if (!adev->ip_block_enabled[i]) | |
| 1231 | + if (!adev->ip_block_status[i].valid) | |
| 1231 | 1232 | continue; |
| 1232 | 1233 | r = adev->ip_blocks[i].funcs->sw_init((void *)adev); |
| 1233 | 1234 | if (r) |
| 1234 | 1235 | return r; |
| 1236 | + adev->ip_block_status[i].sw = true; | |
| 1235 | 1237 | /* need to do gmc hw init early so we can allocate gpu mem */ |
| 1236 | 1238 | if (adev->ip_blocks[i].type == AMD_IP_BLOCK_TYPE_GMC) { |
| 1237 | 1239 | r = amdgpu_vram_scratch_init(adev); |
| @@ -1243,11 +1245,12 @@ static int amdgpu_init(struct amdgpu_device *adev) · 5 unmodified lines | ||
| 1243 | 1245 | r = amdgpu_wb_init(adev); |
| 1244 | 1246 | if (r) |
| 1245 | 1247 | return r; |
| 1248 | + adev->ip_block_status[i].hw = true; | |
| 1246 | 1249 | } |
| 1247 | 1250 | } |
| 1248 | 1251 | |
| 1249 | 1252 | for (i = 0; i < adev->num_ip_blocks; i++) { |
| 1250 | − if (!adev->ip_block_enabled[i]) | |
| 1253 | + if (!adev->ip_block_status[i].sw) | |
| 1251 | 1254 | continue; |
| 1252 | 1255 | /* gmc hw init is done early */ |
| 1253 | 1256 | if (adev->ip_blocks[i].type == AMD_IP_BLOCK_TYPE_GMC) |
| @@ -1255,6 +1258,7 @@ static int amdgpu_init(struct amdgpu_device *adev) · 1 unmodified line | ||
| 1255 | 1258 | r = adev->ip_blocks[i].funcs->hw_init((void *)adev); |
| 1256 | 1259 | if (r) |
| 1257 | 1260 | return r; |
| 1261 | + adev->ip_block_status[i].hw = true; | |
| 1258 | 1262 | } |
| 1259 | 1263 | |
| 1260 | 1264 | return 0; |
| @@ -1265,7 +1269,7 @@ static int amdgpu_late_init(struct amdgpu_device *adev) · 4 unmodified lines | ||
| 1265 | 1269 | int i = 0, r; |
| 1266 | 1270 | |
| 1267 | 1271 | for (i = 0; i < adev->num_ip_blocks; i++) { |
| 1268 | − if (!adev->ip_block_enabled[i]) | |
| 1272 | + if (!adev->ip_block_status[i].valid) | |
| 1269 | 1273 | continue; |
| 1270 | 1274 | /* enable clockgating to save power */ |
| 1271 | 1275 | r = adev->ip_blocks[i].funcs->set_clockgating_state((void *)adev, |
| @@ -1287,7 +1291,7 @@ static int amdgpu_fini(struct amdgpu_device *adev) · 15 unmodified lines | ||
| 1287 | 1291 | int i, r; |
| 1288 | 1292 | |
| 1289 | 1293 | for (i = adev->num_ip_blocks - 1; i >= 0; i--) { |
| 1290 | − if (!adev->ip_block_enabled[i]) | |
| 1294 | + if (!adev->ip_block_status[i].hw) | |
| 1291 | 1295 | continue; |
| 1292 | 1296 | if (adev->ip_blocks[i].type == AMD_IP_BLOCK_TYPE_GMC) { |
| 1293 | 1297 | amdgpu_wb_fini(adev); |
| @@ -1300,14 +1304,16 @@ static int amdgpu_fini(struct amdgpu_device *adev) · 6 unmodified lines | ||
| 1300 | 1304 | return r; |
| 1301 | 1305 | r = adev->ip_blocks[i].funcs->hw_fini((void *)adev); |
| 1302 | 1306 | /* XXX handle errors */ |
| 1307 | + adev->ip_block_status[i].hw = false; | |
| 1303 | 1308 | } |
| 1304 | 1309 | |
| 1305 | 1310 | for (i = adev->num_ip_blocks - 1; i >= 0; i--) { |
| 1306 | − if (!adev->ip_block_enabled[i]) | |
| 1311 | + if (!adev->ip_block_status[i].sw) | |
| 1307 | 1312 | continue; |
| 1308 | 1313 | r = adev->ip_blocks[i].funcs->sw_fini((void *)adev); |
| 1309 | 1314 | /* XXX handle errors */ |
| 1310 | − adev->ip_block_enabled[i] = false; | |
| 1315 | + adev->ip_block_status[i].sw = false; | |
| 1316 | + adev->ip_block_status[i].valid = false; | |
| 1311 | 1317 | } |
| 1312 | 1318 | |
| 1313 | 1319 | return 0; |
| @@ -1318,7 +1324,7 @@ static int amdgpu_suspend(struct amdgpu_device *adev) · 4 unmodified lines | ||
| 1318 | 1324 | int i, r; |
| 1319 | 1325 | |
| 1320 | 1326 | for (i = adev->num_ip_blocks - 1; i >= 0; i--) { |
| 1321 | − if (!adev->ip_block_enabled[i]) | |
| 1327 | + if (!adev->ip_block_status[i].valid) | |
| 1322 | 1328 | continue; |
| 1323 | 1329 | /* ungate blocks so that suspend can properly shut them down */ |
| 1324 | 1330 | r = adev->ip_blocks[i].funcs->set_clockgating_state((void *)adev, |
| @@ -1336,7 +1342,7 @@ static int amdgpu_resume(struct amdgpu_device *adev) · 11 unmodified lines | ||
| 1336 | 1342 | int i, r; |
| 1337 | 1343 | |
| 1338 | 1344 | for (i = 0; i < adev->num_ip_blocks; i++) { |
| 1339 | − if (!adev->ip_block_enabled[i]) | |
| 1345 | + if (!adev->ip_block_status[i].valid) | |
| 1340 | 1346 | continue; |
| 1341 | 1347 | r = adev->ip_blocks[i].funcs->resume(adev); |
| 1342 | 1348 | if (r) |
| @@ -1582,8 +1588,8 @@ void amdgpu_device_fini(struct amdgpu_device *adev) · 239 unmodified lines | ||
| 1582 | 1588 | amdgpu_fence_driver_fini(adev); |
| 1583 | 1589 | amdgpu_fbdev_fini(adev); |
| 1584 | 1590 | r = amdgpu_fini(adev); |
| 1585 | − kfree(adev->ip_block_enabled); | |
| 1586 | − adev->ip_block_enabled = NULL; | |
| 1591 | + kfree(adev->ip_block_status); | |
| 1592 | + adev->ip_block_status = NULL; | |
| 1587 | 1593 | adev->accel_working = false; |
| 1588 | 1594 | /* free i2c buses */ |
| 1589 | 1595 | amdgpu_i2c_fini(adev); |
| @@ -449,7 +449,7 @@ out: · 448 unmodified lines | ||
| 449 | 449 | * vital here, so they are not reported back to userspace. |
| 450 | 450 | */ |
| 451 | 451 | static void amdgpu_gem_va_update_vm(struct amdgpu_device *adev, |
| 452 | − struct amdgpu_bo_va *bo_va) | |
| 452 | + struct amdgpu_bo_va *bo_va, uint32_t operation) | |
| 453 | 453 | { |
| 454 | 454 | struct ttm_validate_buffer tv, *entry; |
| 455 | 455 | struct amdgpu_bo_list_entry *vm_bos; |
| @@ -485,7 +485,9 @@ static void amdgpu_gem_va_update_vm(struct amdgpu_device *adev, · 29 unmodified lines | ||
| 485 | 485 | if (r) |
| 486 | 486 | goto error_unlock; |
| 487 | 487 | |
| 488 | − r = amdgpu_vm_bo_update(adev, bo_va, &bo_va->bo->tbo.mem); | |
| 488 | + | |
| 489 | + if (operation == AMDGPU_VA_OP_MAP) | |
| 490 | + r = amdgpu_vm_bo_update(adev, bo_va, &bo_va->bo->tbo.mem); | |
| 489 | 491 | |
| 490 | 492 | error_unlock: |
| 491 | 493 | mutex_unlock(&bo_va->vm->mutex); |
| @@ -580,7 +582,7 @@ int amdgpu_gem_va_ioctl(struct drm_device *dev, void *data, · 88 unmodified lines | ||
| 580 | 582 | } |
| 581 | 583 | |
| 582 | 584 | if (!r && !(args->flags & AMDGPU_VM_DELAY_UPDATE)) |
| 583 | − amdgpu_gem_va_update_vm(adev, bo_va); | |
| 585 | + amdgpu_gem_va_update_vm(adev, bo_va, args->operation); | |
| 584 | 586 | |
| 585 | 587 | drm_gem_object_unreference_unlocked(gobj); |
| 586 | 588 | return r; |
| @@ -180,16 +180,16 @@ int amdgpu_ib_schedule(struct amdgpu_device *adev, unsigned num_ibs, · 179 unmodified lines | ||
| 180 | 180 | if (vm) { |
| 181 | 181 | /* do context switch */ |
| 182 | 182 | amdgpu_vm_flush(ring, vm, ib->sync.last_vm_update); |
| 183 | − } | |
| 184 | 183 | |
| 185 | − if (vm && ring->funcs->emit_gds_switch) | |
| 186 | − amdgpu_ring_emit_gds_switch(ring, ib->vm->ids[ring->idx].id, | |
| 187 | − ib->gds_base, ib->gds_size, | |
| 188 | − ib->gws_base, ib->gws_size, | |
| 189 | − ib->oa_base, ib->oa_size); | |
| 184 | + if (ring->funcs->emit_gds_switch) | |
| 185 | + amdgpu_ring_emit_gds_switch(ring, ib->vm->ids[ring->idx].id, | |
| 186 | + ib->gds_base, ib->gds_size, | |
| 187 | + ib->gws_base, ib->gws_size, | |
| 188 | + ib->oa_base, ib->oa_size); | |
| 190 | 189 | |
| 191 | − if (ring->funcs->emit_hdp_flush) | |
| 192 | − amdgpu_ring_emit_hdp_flush(ring); | |
| 190 | + if (ring->funcs->emit_hdp_flush) | |
| 191 | + amdgpu_ring_emit_hdp_flush(ring); | |
| 192 | + } | |
| 193 | 193 | |
| 194 | 194 | old_ctx = ring->current_ctx; |
| 195 | 195 | for (i = 0; i < num_ibs; ++i) { |
| @@ -242,7 +242,7 @@ static int amdgpu_info_ioctl(struct drm_device *dev, void *data, struct drm_file · 241 unmodified lines | ||
| 242 | 242 | |
| 243 | 243 | for (i = 0; i < adev->num_ip_blocks; i++) { |
| 244 | 244 | if (adev->ip_blocks[i].type == type && |
| 245 | − adev->ip_block_enabled[i]) { | |
| 245 | + adev->ip_block_status[i].valid) { | |
| 246 | 246 | ip.hw_ip_version_major = adev->ip_blocks[i].major; |
| 247 | 247 | ip.hw_ip_version_minor = adev->ip_blocks[i].minor; |
| 248 | 248 | ip.capabilities_flags = 0; |
| @@ -281,7 +281,7 @@ static int amdgpu_info_ioctl(struct drm_device *dev, void *data, struct drm_file · 32 unmodified lines | ||
| 281 | 281 | |
| 282 | 282 | for (i = 0; i < adev->num_ip_blocks; i++) |
| 283 | 283 | if (adev->ip_blocks[i].type == type && |
| 284 | − adev->ip_block_enabled[i] && | |
| 284 | + adev->ip_block_status[i].valid && | |
| 285 | 285 | count < AMDGPU_HW_IP_INSTANCE_MAX_COUNT) |
| 286 | 286 | count++; |
| 287 | 287 | |
| @@ -324,16 +324,17 @@ static int amdgpu_info_ioctl(struct drm_device *dev, void *data, struct drm_file · 36 unmodified lines | ||
| 324 | 324 | break; |
| 325 | 325 | case AMDGPU_INFO_FW_GFX_RLC: |
| 326 | 326 | fw_info.ver = adev->gfx.rlc_fw_version; |
| 327 | − fw_info.feature = 0; | |
| 327 | + fw_info.feature = adev->gfx.rlc_feature_version; | |
| 328 | 328 | break; |
| 329 | 329 | case AMDGPU_INFO_FW_GFX_MEC: |
| 330 | − if (info->query_fw.index == 0) | |
| 330 | + if (info->query_fw.index == 0) { | |
| 331 | 331 | fw_info.ver = adev->gfx.mec_fw_version; |
| 332 | − else if (info->query_fw.index == 1) | |
| 332 | + fw_info.feature = adev->gfx.mec_feature_version; | |
| 333 | + } else if (info->query_fw.index == 1) { | |
| 333 | 334 | fw_info.ver = adev->gfx.mec2_fw_version; |
| 334 | − else | |
| 335 | + fw_info.feature = adev->gfx.mec2_feature_version; | |
| 336 | + } else | |
| 335 | 337 | return -EINVAL; |
| 336 | − fw_info.feature = 0; | |
| 337 | 338 | break; |
| 338 | 339 | case AMDGPU_INFO_FW_SMC: |
| 339 | 340 | fw_info.ver = adev->pm.fw_version; |
| @@ -343,7 +344,7 @@ static int amdgpu_info_ioctl(struct drm_device *dev, void *data, struct drm_file · 3 unmodified lines | ||
| 343 | 344 | if (info->query_fw.index >= 2) |
| 344 | 345 | return -EINVAL; |
| 345 | 346 | fw_info.ver = adev->sdma[info->query_fw.index].fw_version; |
| 346 | − fw_info.feature = 0; | |
| 347 | + fw_info.feature = adev->sdma[info->query_fw.index].feature_version; | |
| 347 | 348 | break; |
| 348 | 349 | default: |
| 349 | 350 | return -EINVAL; |
| @@ -423,7 +424,7 @@ static int amdgpu_info_ioctl(struct drm_device *dev, void *data, struct drm_file · 73 unmodified lines | ||
| 423 | 424 | return n ? -EFAULT : 0; |
| 424 | 425 | } |
| 425 | 426 | case AMDGPU_INFO_DEV_INFO: { |
| 426 | − struct drm_amdgpu_info_device dev_info; | |
| 427 | + struct drm_amdgpu_info_device dev_info = {}; | |
| 427 | 428 | struct amdgpu_cu_info cu_info; |
| 428 | 429 | |
| 429 | 430 | dev_info.device_id = dev->pdev->device; |
| @@ -466,6 +467,7 @@ static int amdgpu_info_ioctl(struct drm_device *dev, void *data, struct drm_file · 36 unmodified lines | ||
| 466 | 467 | memcpy(&dev_info.cu_bitmap[0], &cu_info.bitmap[0], sizeof(cu_info.bitmap)); |
| 467 | 468 | dev_info.vram_type = adev->mc.vram_type; |
| 468 | 469 | dev_info.vram_bit_width = adev->mc.vram_width; |
| 470 | + dev_info.vce_harvest_config = adev->vce.harvest_config; | |
| 469 | 471 | |
| 470 | 472 | return copy_to_user(out, &dev_info, |
| 471 | 473 | min((size_t)size, sizeof(dev_info))) ? -EFAULT : 0; |
| @@ -374,7 +374,7 @@ static int amdgpu_uvd_cs_msg_decode(uint32_t *msg, unsigned buf_sizes[]) · 373 unmodified lines | ||
| 374 | 374 | unsigned height_in_mb = ALIGN(height / 16, 2); |
| 375 | 375 | unsigned fs_in_mb = width_in_mb * height_in_mb; |
| 376 | 376 | |
| 377 | − unsigned image_size, tmp, min_dpb_size, num_dpb_buffer; | |
| 377 | + unsigned image_size, tmp, min_dpb_size, num_dpb_buffer, min_ctx_size; | |
| 378 | 378 | |
| 379 | 379 | image_size = width * height; |
| 380 | 380 | image_size += image_size / 2; |
| @@ -466,6 +466,8 @@ static int amdgpu_uvd_cs_msg_decode(uint32_t *msg, unsigned buf_sizes[]) · 85 unmodified lines | ||
| 466 | 466 | |
| 467 | 467 | num_dpb_buffer = (le32_to_cpu(msg[59]) & 0xff) + 2; |
| 468 | 468 | min_dpb_size = image_size * num_dpb_buffer; |
| 469 | + min_ctx_size = ((width + 255) / 16) * ((height + 255) / 16) | |
| 470 | + * 16 * num_dpb_buffer + 52 * 1024; | |
| 469 | 471 | break; |
| 470 | 472 | |
| 471 | 473 | default: |
| @@ -486,6 +488,7 @@ static int amdgpu_uvd_cs_msg_decode(uint32_t *msg, unsigned buf_sizes[]) · 14 unmodified lines | ||
| 486 | 488 | |
| 487 | 489 | buf_sizes[0x1] = dpb_size; |
| 488 | 490 | buf_sizes[0x2] = image_size; |
| 491 | + buf_sizes[0x4] = min_ctx_size; | |
| 489 | 492 | return 0; |
| 490 | 493 | } |
| 491 | 494 | |
| @@ -628,6 +631,13 @@ static int amdgpu_uvd_cs_pass2(struct amdgpu_uvd_cs_ctx *ctx) · 136 unmodified lines | ||
| 628 | 631 | return -EINVAL; |
| 629 | 632 | } |
| 630 | 633 | |
| 634 | + } else if (cmd == 0x206) { | |
| 635 | + if ((end - start) < ctx->buf_sizes[4]) { | |
| 636 | + DRM_ERROR("buffer (%d) to small (%d / %d)!\n", cmd, | |
| 637 | + (unsigned)(end - start), | |
| 638 | + ctx->buf_sizes[4]); | |
| 639 | + return -EINVAL; | |
| 640 | + } | |
| 631 | 641 | } else if ((cmd != 0x100) && (cmd != 0x204)) { |
| 632 | 642 | DRM_ERROR("invalid UVD command %X!\n", cmd); |
| 633 | 643 | return -EINVAL; |
| @@ -755,9 +765,10 @@ int amdgpu_uvd_ring_parse_cs(struct amdgpu_cs_parser *parser, uint32_t ib_idx) · 121 unmodified lines | ||
| 755 | 765 | struct amdgpu_uvd_cs_ctx ctx = {}; |
| 756 | 766 | unsigned buf_sizes[] = { |
| 757 | 767 | [0x00000000] = 2048, |
| 758 | − [0x00000001] = 32 * 1024 * 1024, | |
| 759 | − [0x00000002] = 2048 * 1152 * 3, | |
| 768 | + [0x00000001] = 0xFFFFFFFF, | |
| 769 | + [0x00000002] = 0xFFFFFFFF, | |
| 760 | 770 | [0x00000003] = 2048, |
| 771 | + [0x00000004] = 0xFFFFFFFF, | |
| 761 | 772 | }; |
| 762 | 773 | struct amdgpu_ib *ib = &parser->ibs[ib_idx]; |
| 763 | 774 | int r; |
| @@ -500,6 +500,7 @@ static int cik_sdma_load_microcode(struct amdgpu_device *adev) · 499 unmodified lines | ||
| 500 | 500 | amdgpu_ucode_print_sdma_hdr(&hdr->header); |
| 501 | 501 | fw_size = le32_to_cpu(hdr->header.ucode_size_bytes) / 4; |
| 502 | 502 | adev->sdma[i].fw_version = le32_to_cpu(hdr->header.ucode_version); |
| 503 | + adev->sdma[i].feature_version = le32_to_cpu(hdr->ucode_feature_version); | |
| 503 | 504 | fw_data = (const __le32 *) |
| 504 | 505 | (adev->sdma[i].fw->data + le32_to_cpu(hdr->header.ucode_array_offset_bytes)); |
| 505 | 506 | WREG32(mmSDMA0_UCODE_ADDR + sdma_offsets[i], 0); |
| @@ -494,29 +494,67 @@ static void cz_dpm_fini(struct amdgpu_device *adev) · 493 unmodified lines | ||
| 494 | 494 | amdgpu_free_extended_power_table(adev); |
| 495 | 495 | } |
| 496 | 496 | |
| 497 | +#define ixSMUSVI_NB_CURRENTVID 0xD8230044 | |
| 498 | +#define CURRENT_NB_VID_MASK 0xff000000 | |
| 499 | +#define CURRENT_NB_VID__SHIFT 24 | |
| 500 | +#define ixSMUSVI_GFX_CURRENTVID 0xD8230048 | |
| 501 | +#define CURRENT_GFX_VID_MASK 0xff000000 | |
| 502 | +#define CURRENT_GFX_VID__SHIFT 24 | |
| 503 | + | |
| 497 | 504 | static void |
| 498 | 505 | cz_dpm_debugfs_print_current_performance_level(struct amdgpu_device *adev, |
| 499 | 506 | struct seq_file *m) |
| 500 | 507 | { |
| 508 | + struct cz_power_info *pi = cz_get_pi(adev); | |
| 501 | 509 | struct amdgpu_clock_voltage_dependency_table *table = |
| 502 | 510 | &adev->pm.dpm.dyn_state.vddc_dependency_on_sclk; |
| 503 | − u32 current_index = | |
| 504 | − (RREG32_SMC(ixTARGET_AND_CURRENT_PROFILE_INDEX) & | |
| 505 | − TARGET_AND_CURRENT_PROFILE_INDEX__CURR_SCLK_INDEX_MASK) >> | |
| 506 | − TARGET_AND_CURRENT_PROFILE_INDEX__CURR_SCLK_INDEX__SHIFT; | |
| 507 | − u32 sclk, tmp; | |
| 508 | − u16 vddc; | |
| 509 | − | |
| 510 | − if (current_index >= NUM_SCLK_LEVELS) { | |
| 511 | − seq_printf(m, "invalid dpm profile %d\n", current_index); | |
| 511 | + struct amdgpu_uvd_clock_voltage_dependency_table *uvd_table = | |
| 512 | + &adev->pm.dpm.dyn_state.uvd_clock_voltage_dependency_table; | |
| 513 | + struct amdgpu_vce_clock_voltage_dependency_table *vce_table = | |
| 514 | + &adev->pm.dpm.dyn_state.vce_clock_voltage_dependency_table; | |
| 515 | + u32 sclk_index = REG_GET_FIELD(RREG32_SMC(ixTARGET_AND_CURRENT_PROFILE_INDEX), | |
| 516 | + TARGET_AND_CURRENT_PROFILE_INDEX, CURR_SCLK_INDEX); | |
| 517 | + u32 uvd_index = REG_GET_FIELD(RREG32_SMC(ixTARGET_AND_CURRENT_PROFILE_INDEX_2), | |
| 518 | + TARGET_AND_CURRENT_PROFILE_INDEX_2, CURR_UVD_INDEX); | |
| 519 | + u32 vce_index = REG_GET_FIELD(RREG32_SMC(ixTARGET_AND_CURRENT_PROFILE_INDEX_2), | |
| 520 | + TARGET_AND_CURRENT_PROFILE_INDEX_2, CURR_VCE_INDEX); | |
| 521 | + u32 sclk, vclk, dclk, ecclk, tmp; | |
| 522 | + u16 vddnb, vddgfx; | |
| 523 | + | |
| 524 | + if (sclk_index >= NUM_SCLK_LEVELS) { | |
| 525 | + seq_printf(m, "invalid sclk dpm profile %d\n", sclk_index); | |
| 512 | 526 | } else { |
| 513 | − sclk = table->entries[current_index].clk; | |
| 514 | − tmp = (RREG32_SMC(ixSMU_VOLTAGE_STATUS) & | |
| 515 | − SMU_VOLTAGE_STATUS__SMU_VOLTAGE_CURRENT_LEVEL_MASK) >> | |
| 516 | − SMU_VOLTAGE_STATUS__SMU_VOLTAGE_CURRENT_LEVEL__SHIFT; | |
| 517 | − vddc = cz_convert_8bit_index_to_voltage(adev, (u16)tmp); | |
| 518 | − seq_printf(m, "power level %d sclk: %u vddc: %u\n", | |
| 519 | − current_index, sclk, vddc); | |
| 527 | + sclk = table->entries[sclk_index].clk; | |
| 528 | + seq_printf(m, "%u sclk: %u\n", sclk_index, sclk); | |
| 529 | + } | |
| 530 | + | |
| 531 | + tmp = (RREG32_SMC(ixSMUSVI_NB_CURRENTVID) & | |
| 532 | + CURRENT_NB_VID_MASK) >> CURRENT_NB_VID__SHIFT; | |
| 533 | + vddnb = cz_convert_8bit_index_to_voltage(adev, (u16)tmp); | |
| 534 | + tmp = (RREG32_SMC(ixSMUSVI_GFX_CURRENTVID) & | |
| 535 | + CURRENT_GFX_VID_MASK) >> CURRENT_GFX_VID__SHIFT; | |
| 536 | + vddgfx = cz_convert_8bit_index_to_voltage(adev, (u16)tmp); | |
| 537 | + seq_printf(m, "vddnb: %u vddgfx: %u\n", vddnb, vddgfx); | |
| 538 | + | |
| 539 | + seq_printf(m, "uvd %sabled\n", pi->uvd_power_gated ? "dis" : "en"); | |
| 540 | + if (!pi->uvd_power_gated) { | |
| 541 | + if (uvd_index >= CZ_MAX_HARDWARE_POWERLEVELS) { | |
| 542 | + seq_printf(m, "invalid uvd dpm level %d\n", uvd_index); | |
| 543 | + } else { | |
| 544 | + vclk = uvd_table->entries[uvd_index].vclk; | |
| 545 | + dclk = uvd_table->entries[uvd_index].dclk; | |
| 546 | + seq_printf(m, "%u uvd vclk: %u dclk: %u\n", uvd_index, vclk, dclk); | |
| 547 | + } | |
| 548 | + } | |
| 549 | + | |
| 550 | + seq_printf(m, "vce %sabled\n", pi->vce_power_gated ? "dis" : "en"); | |
| 551 | + if (!pi->vce_power_gated) { | |
| 552 | + if (vce_index >= CZ_MAX_HARDWARE_POWERLEVELS) { | |
| 553 | + seq_printf(m, "invalid vce dpm level %d\n", vce_index); | |
| 554 | + } else { | |
| 555 | + ecclk = vce_table->entries[vce_index].ecclk; | |
| 556 | + seq_printf(m, "%u vce ecclk: %u\n", vce_index, ecclk); | |
| 557 | + } | |
| 520 | 558 | } |
| 521 | 559 | } |
| 522 | 560 | |
| @@ -2632,6 +2632,7 @@ static void dce_v10_0_crtc_dpms(struct drm_crtc *crtc, int mode) · 2631 unmodified lines | ||
| 2632 | 2632 | struct drm_device *dev = crtc->dev; |
| 2633 | 2633 | struct amdgpu_device *adev = dev->dev_private; |
| 2634 | 2634 | struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc); |
| 2635 | + unsigned type; | |
| 2635 | 2636 | |
| 2636 | 2637 | switch (mode) { |
| 2637 | 2638 | case DRM_MODE_DPMS_ON: |
| @@ -2640,6 +2641,9 @@ static void dce_v10_0_crtc_dpms(struct drm_crtc *crtc, int mode) · 2 unmodified lines | ||
| 2640 | 2641 | dce_v10_0_vga_enable(crtc, true); |
| 2641 | 2642 | amdgpu_atombios_crtc_blank(crtc, ATOM_DISABLE); |
| 2642 | 2643 | dce_v10_0_vga_enable(crtc, false); |
| 2644 | + /* Make sure VBLANK interrupt is still enabled */ | |
| 2645 | + type = amdgpu_crtc_idx_to_irq_type(adev, amdgpu_crtc->crtc_id); | |
| 2646 | + amdgpu_irq_update(adev, &adev->crtc_irq, type); | |
| 2643 | 2647 | drm_vblank_post_modeset(dev, amdgpu_crtc->crtc_id); |
| 2644 | 2648 | dce_v10_0_crtc_load_lut(crtc); |
| 2645 | 2649 | break; |
| @@ -2631,6 +2631,7 @@ static void dce_v11_0_crtc_dpms(struct drm_crtc *crtc, int mode) · 2630 unmodified lines | ||
| 2631 | 2631 | struct drm_device *dev = crtc->dev; |
| 2632 | 2632 | struct amdgpu_device *adev = dev->dev_private; |
| 2633 | 2633 | struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc); |
| 2634 | + unsigned type; | |
| 2634 | 2635 | |
| 2635 | 2636 | switch (mode) { |
| 2636 | 2637 | case DRM_MODE_DPMS_ON: |
| @@ -2639,6 +2640,9 @@ static void dce_v11_0_crtc_dpms(struct drm_crtc *crtc, int mode) · 2 unmodified lines | ||
| 2639 | 2640 | dce_v11_0_vga_enable(crtc, true); |
| 2640 | 2641 | amdgpu_atombios_crtc_blank(crtc, ATOM_DISABLE); |
| 2641 | 2642 | dce_v11_0_vga_enable(crtc, false); |
| 2643 | + /* Make sure VBLANK interrupt is still enabled */ | |
| 2644 | + type = amdgpu_crtc_idx_to_irq_type(adev, amdgpu_crtc->crtc_id); | |
| 2645 | + amdgpu_irq_update(adev, &adev->crtc_irq, type); | |
| 2642 | 2646 | drm_vblank_post_modeset(dev, amdgpu_crtc->crtc_id); |
| 2643 | 2647 | dce_v11_0_crtc_load_lut(crtc); |
| 2644 | 2648 | break; |
| @@ -2561,7 +2561,7 @@ static bool gfx_v7_0_ring_emit_semaphore(struct amdgpu_ring *ring, · 2560 unmodified lines | ||
| 2561 | 2561 | * sheduling on the ring. This function schedules the IB |
| 2562 | 2562 | * on the gfx ring for execution by the GPU. |
| 2563 | 2563 | */ |
| 2564 | −static void gfx_v7_0_ring_emit_ib(struct amdgpu_ring *ring, | |
| 2564 | +static void gfx_v7_0_ring_emit_ib_gfx(struct amdgpu_ring *ring, | |
| 2565 | 2565 | struct amdgpu_ib *ib) |
| 2566 | 2566 | { |
| 2567 | 2567 | bool need_ctx_switch = ring->current_ctx != ib->ctx; |
| @@ -2569,15 +2569,10 @@ static void gfx_v7_0_ring_emit_ib(struct amdgpu_ring *ring, · 1 unmodified line | ||
| 2569 | 2569 | u32 next_rptr = ring->wptr + 5; |
| 2570 | 2570 | |
| 2571 | 2571 | /* drop the CE preamble IB for the same context */ |
| 2572 | − if ((ring->type == AMDGPU_RING_TYPE_GFX) && | |
| 2573 | − (ib->flags & AMDGPU_IB_FLAG_PREAMBLE) && | |
| 2574 | − !need_ctx_switch) | |
| 2572 | + if ((ib->flags & AMDGPU_IB_FLAG_PREAMBLE) && !need_ctx_switch) | |
| 2575 | 2573 | return; |
| 2576 | 2574 | |
| 2577 | − if (ring->type == AMDGPU_RING_TYPE_COMPUTE) | |
| 2578 | − control |= INDIRECT_BUFFER_VALID; | |
| 2579 | − | |
| 2580 | − if (need_ctx_switch && ring->type == AMDGPU_RING_TYPE_GFX) | |
| 2575 | + if (need_ctx_switch) | |
| 2581 | 2576 | next_rptr += 2; |
| 2582 | 2577 | |
| 2583 | 2578 | next_rptr += 4; |
| @@ -2588,7 +2583,7 @@ static void gfx_v7_0_ring_emit_ib(struct amdgpu_ring *ring, · 4 unmodified lines | ||
| 2588 | 2583 | amdgpu_ring_write(ring, next_rptr); |
| 2589 | 2584 | |
| 2590 | 2585 | /* insert SWITCH_BUFFER packet before first IB in the ring frame */ |
| 2591 | − if (need_ctx_switch && ring->type == AMDGPU_RING_TYPE_GFX) { | |
| 2586 | + if (need_ctx_switch) { | |
| 2592 | 2587 | amdgpu_ring_write(ring, PACKET3(PACKET3_SWITCH_BUFFER, 0)); |
| 2593 | 2588 | amdgpu_ring_write(ring, 0); |
| 2594 | 2589 | } |
| @@ -2611,6 +2606,35 @@ static void gfx_v7_0_ring_emit_ib(struct amdgpu_ring *ring, · 16 unmodified lines | ||
| 2611 | 2606 | amdgpu_ring_write(ring, control); |
| 2612 | 2607 | } |
| 2613 | 2608 | |
| 2609 | +static void gfx_v7_0_ring_emit_ib_compute(struct amdgpu_ring *ring, | |
| 2610 | + struct amdgpu_ib *ib) | |
| 2611 | +{ | |
| 2612 | + u32 header, control = 0; | |
| 2613 | + u32 next_rptr = ring->wptr + 5; | |
| 2614 | + | |
| 2615 | + control |= INDIRECT_BUFFER_VALID; | |
| 2616 | + next_rptr += 4; | |
| 2617 | + amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3)); | |
| 2618 | + amdgpu_ring_write(ring, WRITE_DATA_DST_SEL(5) | WR_CONFIRM); | |
| 2619 | + amdgpu_ring_write(ring, ring->next_rptr_gpu_addr & 0xfffffffc); | |
| 2620 | + amdgpu_ring_write(ring, upper_32_bits(ring->next_rptr_gpu_addr) & 0xffffffff); | |
| 2621 | + amdgpu_ring_write(ring, next_rptr); | |
| 2622 | + | |
| 2623 | + header = PACKET3(PACKET3_INDIRECT_BUFFER, 2); | |
| 2624 | + | |
| 2625 | + control |= ib->length_dw | | |
| 2626 | + (ib->vm ? (ib->vm->ids[ring->idx].id << 24) : 0); | |
| 2627 | + | |
| 2628 | + amdgpu_ring_write(ring, header); | |
| 2629 | + amdgpu_ring_write(ring, | |
| 2630 | +#ifdef __BIG_ENDIAN | |
| 2631 | + (2 << 0) | | |
| 2632 | +#endif | |
| 2633 | + (ib->gpu_addr & 0xFFFFFFFC)); | |
| 2634 | + amdgpu_ring_write(ring, upper_32_bits(ib->gpu_addr) & 0xFFFF); | |
| 2635 | + amdgpu_ring_write(ring, control); | |
| 2636 | +} | |
| 2637 | + | |
| 2614 | 2638 | /** |
| 2615 | 2639 | * gfx_v7_0_ring_test_ib - basic ring IB test |
| 2616 | 2640 | * |
| @@ -3056,6 +3080,8 @@ static int gfx_v7_0_cp_compute_load_microcode(struct amdgpu_device *adev) · 439 unmodified lines | ||
| 3056 | 3080 | mec_hdr = (const struct gfx_firmware_header_v1_0 *)adev->gfx.mec_fw->data; |
| 3057 | 3081 | amdgpu_ucode_print_gfx_hdr(&mec_hdr->header); |
| 3058 | 3082 | adev->gfx.mec_fw_version = le32_to_cpu(mec_hdr->header.ucode_version); |
| 3083 | + adev->gfx.mec_feature_version = le32_to_cpu( | |
| 3084 | + mec_hdr->ucode_feature_version); | |
| 3059 | 3085 | |
| 3060 | 3086 | gfx_v7_0_cp_compute_enable(adev, false); |
| 3061 | 3087 | |
| @@ -3078,6 +3104,8 @@ static int gfx_v7_0_cp_compute_load_microcode(struct amdgpu_device *adev) · 16 unmodified lines | ||
| 3078 | 3104 | mec2_hdr = (const struct gfx_firmware_header_v1_0 *)adev->gfx.mec2_fw->data; |
| 3079 | 3105 | amdgpu_ucode_print_gfx_hdr(&mec2_hdr->header); |
| 3080 | 3106 | adev->gfx.mec2_fw_version = le32_to_cpu(mec2_hdr->header.ucode_version); |
| 3107 | + adev->gfx.mec2_feature_version = le32_to_cpu( | |
| 3108 | + mec2_hdr->ucode_feature_version); | |
| 3081 | 3109 | |
| 3082 | 3110 | /* MEC2 */ |
| 3083 | 3111 | fw_data = (const __le32 *) |
| @@ -4042,6 +4070,8 @@ static int gfx_v7_0_rlc_resume(struct amdgpu_device *adev) · 958 unmodified lines | ||
| 4042 | 4070 | hdr = (const struct rlc_firmware_header_v1_0 *)adev->gfx.rlc_fw->data; |
| 4043 | 4071 | amdgpu_ucode_print_rlc_hdr(&hdr->header); |
| 4044 | 4072 | adev->gfx.rlc_fw_version = le32_to_cpu(hdr->header.ucode_version); |
| 4073 | + adev->gfx.rlc_feature_version = le32_to_cpu( | |
| 4074 | + hdr->ucode_feature_version); | |
| 4045 | 4075 | |
| 4046 | 4076 | gfx_v7_0_rlc_stop(adev); |
| 4047 | 4077 | |
| @@ -5098,7 +5128,7 @@ static void gfx_v7_0_print_status(void *handle) · 1050 unmodified lines | ||
| 5098 | 5128 | dev_info(adev->dev, " CP_HPD_EOP_CONTROL=0x%08X\n", |
| 5099 | 5129 | RREG32(mmCP_HPD_EOP_CONTROL)); |
| 5100 | 5130 | |
| 5101 | − for (queue = 0; queue < 8; i++) { | |
| 5131 | + for (queue = 0; queue < 8; queue++) { | |
| 5102 | 5132 | cik_srbm_select(adev, me, pipe, queue, 0); |
| 5103 | 5133 | dev_info(adev->dev, " queue: %d\n", queue); |
| 5104 | 5134 | dev_info(adev->dev, " CP_PQ_WPTR_POLL_CNTL=0x%08X\n", |
| @@ -5555,7 +5585,7 @@ static const struct amdgpu_ring_funcs gfx_v7_0_ring_funcs_gfx = { · 450 unmodified lines | ||
| 5555 | 5585 | .get_wptr = gfx_v7_0_ring_get_wptr_gfx, |
| 5556 | 5586 | .set_wptr = gfx_v7_0_ring_set_wptr_gfx, |
| 5557 | 5587 | .parse_cs = NULL, |
| 5558 | − .emit_ib = gfx_v7_0_ring_emit_ib, | |
| 5588 | + .emit_ib = gfx_v7_0_ring_emit_ib_gfx, | |
| 5559 | 5589 | .emit_fence = gfx_v7_0_ring_emit_fence_gfx, |
| 5560 | 5590 | .emit_semaphore = gfx_v7_0_ring_emit_semaphore, |
| 5561 | 5591 | .emit_vm_flush = gfx_v7_0_ring_emit_vm_flush, |
| @@ -5571,7 +5601,7 @@ static const struct amdgpu_ring_funcs gfx_v7_0_ring_funcs_compute = { · 9 unmodified lines | ||
| 5571 | 5601 | .get_wptr = gfx_v7_0_ring_get_wptr_compute, |
| 5572 | 5602 | .set_wptr = gfx_v7_0_ring_set_wptr_compute, |
| 5573 | 5603 | .parse_cs = NULL, |
| 5574 | − .emit_ib = gfx_v7_0_ring_emit_ib, | |
| 5604 | + .emit_ib = gfx_v7_0_ring_emit_ib_compute, | |
| 5575 | 5605 | .emit_fence = gfx_v7_0_ring_emit_fence_compute, |
| 5576 | 5606 | .emit_semaphore = gfx_v7_0_ring_emit_semaphore, |
| 5577 | 5607 | .emit_vm_flush = gfx_v7_0_ring_emit_vm_flush, |
| @@ -587,6 +587,7 @@ static int gfx_v8_0_init_microcode(struct amdgpu_device *adev) · 586 unmodified lines | ||
| 587 | 587 | int err; |
| 588 | 588 | struct amdgpu_firmware_info *info = NULL; |
| 589 | 589 | const struct common_firmware_header *header = NULL; |
| 590 | + const struct gfx_firmware_header_v1_0 *cp_hdr; | |
| 590 | 591 | |
| 591 | 592 | DRM_DEBUG("\n"); |
| 592 | 593 | |
| @@ -611,6 +612,9 @@ static int gfx_v8_0_init_microcode(struct amdgpu_device *adev) · 18 unmodified lines | ||
| 611 | 612 | err = amdgpu_ucode_validate(adev->gfx.pfp_fw); |
| 612 | 613 | if (err) |
| 613 | 614 | goto out; |
| 615 | + cp_hdr = (const struct gfx_firmware_header_v1_0 *)adev->gfx.pfp_fw->data; | |
| 616 | + adev->gfx.pfp_fw_version = le32_to_cpu(cp_hdr->header.ucode_version); | |
| 617 | + adev->gfx.pfp_feature_version = le32_to_cpu(cp_hdr->ucode_feature_version); | |
| 614 | 618 | |
| 615 | 619 | snprintf(fw_name, sizeof(fw_name), "amdgpu/%s_me.bin", chip_name); |
| 616 | 620 | err = request_firmware(&adev->gfx.me_fw, fw_name, adev->dev); |
| @@ -619,6 +623,9 @@ static int gfx_v8_0_init_microcode(struct amdgpu_device *adev) · 2 unmodified lines | ||
| 619 | 623 | err = amdgpu_ucode_validate(adev->gfx.me_fw); |
| 620 | 624 | if (err) |
| 621 | 625 | goto out; |
| 626 | + cp_hdr = (const struct gfx_firmware_header_v1_0 *)adev->gfx.me_fw->data; | |
| 627 | + adev->gfx.me_fw_version = le32_to_cpu(cp_hdr->header.ucode_version); | |
| 628 | + adev->gfx.me_feature_version = le32_to_cpu(cp_hdr->ucode_feature_version); | |
| 622 | 629 | |
| 623 | 630 | snprintf(fw_name, sizeof(fw_name), "amdgpu/%s_ce.bin", chip_name); |
| 624 | 631 | err = request_firmware(&adev->gfx.ce_fw, fw_name, adev->dev); |
| @@ -627,12 +634,18 @@ static int gfx_v8_0_init_microcode(struct amdgpu_device *adev) · 2 unmodified lines | ||
| 627 | 634 | err = amdgpu_ucode_validate(adev->gfx.ce_fw); |
| 628 | 635 | if (err) |
| 629 | 636 | goto out; |
| 637 | + cp_hdr = (const struct gfx_firmware_header_v1_0 *)adev->gfx.ce_fw->data; | |
| 638 | + adev->gfx.ce_fw_version = le32_to_cpu(cp_hdr->header.ucode_version); | |
| 639 | + adev->gfx.ce_feature_version = le32_to_cpu(cp_hdr->ucode_feature_version); | |
| 630 | 640 | |
| 631 | 641 | snprintf(fw_name, sizeof(fw_name), "amdgpu/%s_rlc.bin", chip_name); |
| 632 | 642 | err = request_firmware(&adev->gfx.rlc_fw, fw_name, adev->dev); |
| 633 | 643 | if (err) |
| 634 | 644 | goto out; |
| 635 | 645 | err = amdgpu_ucode_validate(adev->gfx.rlc_fw); |
| 646 | + cp_hdr = (const struct gfx_firmware_header_v1_0 *)adev->gfx.rlc_fw->data; | |
| 647 | + adev->gfx.rlc_fw_version = le32_to_cpu(cp_hdr->header.ucode_version); | |
| 648 | + adev->gfx.rlc_feature_version = le32_to_cpu(cp_hdr->ucode_feature_version); | |
| 636 | 649 | |
| 637 | 650 | snprintf(fw_name, sizeof(fw_name), "amdgpu/%s_mec.bin", chip_name); |
| 638 | 651 | err = request_firmware(&adev->gfx.mec_fw, fw_name, adev->dev); |
| @@ -641,6 +654,9 @@ static int gfx_v8_0_init_microcode(struct amdgpu_device *adev) · 2 unmodified lines | ||
| 641 | 654 | err = amdgpu_ucode_validate(adev->gfx.mec_fw); |
| 642 | 655 | if (err) |
| 643 | 656 | goto out; |
| 657 | + cp_hdr = (const struct gfx_firmware_header_v1_0 *)adev->gfx.mec_fw->data; | |
| 658 | + adev->gfx.mec_fw_version = le32_to_cpu(cp_hdr->header.ucode_version); | |
| 659 | + adev->gfx.mec_feature_version = le32_to_cpu(cp_hdr->ucode_feature_version); | |
| 644 | 660 | |
| 645 | 661 | snprintf(fw_name, sizeof(fw_name), "amdgpu/%s_mec2.bin", chip_name); |
| 646 | 662 | err = request_firmware(&adev->gfx.mec2_fw, fw_name, adev->dev); |
| @@ -648,6 +664,12 @@ static int gfx_v8_0_init_microcode(struct amdgpu_device *adev) · 1 unmodified line | ||
| 648 | 664 | err = amdgpu_ucode_validate(adev->gfx.mec2_fw); |
| 649 | 665 | if (err) |
| 650 | 666 | goto out; |
| 667 | + cp_hdr = (const struct gfx_firmware_header_v1_0 *) | |
| 668 | + adev->gfx.mec2_fw->data; | |
| 669 | + adev->gfx.mec2_fw_version = le32_to_cpu( | |
| 670 | + cp_hdr->header.ucode_version); | |
| 671 | + adev->gfx.mec2_feature_version = le32_to_cpu( | |
| 672 | + cp_hdr->ucode_feature_version); | |
| 651 | 673 | } else { |
| 652 | 674 | err = 0; |
| 653 | 675 | adev->gfx.mec2_fw = NULL; |
| @@ -1983,6 +2005,7 @@ static void gfx_v8_0_gpu_init(struct amdgpu_device *adev) · 1329 unmodified lines | ||
| 1983 | 2005 | adev->gfx.config.max_shader_engines = 1; |
| 1984 | 2006 | adev->gfx.config.max_tile_pipes = 2; |
| 1985 | 2007 | adev->gfx.config.max_sh_per_se = 1; |
| 2008 | + adev->gfx.config.max_backends_per_se = 2; | |
| 1986 | 2009 | |
| 1987 | 2010 | switch (adev->pdev->revision) { |
| 1988 | 2011 | case 0xc4: |
| @@ -1991,7 +2014,6 @@ static void gfx_v8_0_gpu_init(struct amdgpu_device *adev) · 2 unmodified lines | ||
| 1991 | 2014 | case 0xcc: |
| 1992 | 2015 | /* B10 */ |
| 1993 | 2016 | adev->gfx.config.max_cu_per_sh = 8; |
| 1994 | − adev->gfx.config.max_backends_per_se = 2; | |
| 1995 | 2017 | break; |
| 1996 | 2018 | case 0xc5: |
| 1997 | 2019 | case 0x81: |
| @@ -2000,14 +2022,12 @@ static void gfx_v8_0_gpu_init(struct amdgpu_device *adev) · 2 unmodified lines | ||
| 2000 | 2022 | case 0xcd: |
| 2001 | 2023 | /* B8 */ |
| 2002 | 2024 | adev->gfx.config.max_cu_per_sh = 6; |
| 2003 | − adev->gfx.config.max_backends_per_se = 2; | |
| 2004 | 2025 | break; |
| 2005 | 2026 | case 0xc6: |
| 2006 | 2027 | case 0xca: |
| 2007 | 2028 | case 0xce: |
| 2008 | 2029 | /* B6 */ |
| 2009 | 2030 | adev->gfx.config.max_cu_per_sh = 6; |
| 2010 | − adev->gfx.config.max_backends_per_se = 2; | |
| 2011 | 2031 | break; |
| 2012 | 2032 | case 0xc7: |
| 2013 | 2033 | case 0x87: |
| @@ -2015,7 +2035,6 @@ static void gfx_v8_0_gpu_init(struct amdgpu_device *adev) · 1 unmodified line | ||
| 2015 | 2035 | default: |
| 2016 | 2036 | /* B4 */ |
| 2017 | 2037 | adev->gfx.config.max_cu_per_sh = 4; |
| 2018 | − adev->gfx.config.max_backends_per_se = 1; | |
| 2019 | 2038 | break; |
| 2020 | 2039 | } |
| 2021 | 2040 | |
| @@ -2275,7 +2294,6 @@ static int gfx_v8_0_rlc_load_microcode(struct amdgpu_device *adev) · 253 unmodified lines | ||
| 2275 | 2294 | |
| 2276 | 2295 | hdr = (const struct rlc_firmware_header_v2_0 *)adev->gfx.rlc_fw->data; |
| 2277 | 2296 | amdgpu_ucode_print_rlc_hdr(&hdr->header); |
| 2278 | − adev->gfx.rlc_fw_version = le32_to_cpu(hdr->header.ucode_version); | |
| 2279 | 2297 | |
| 2280 | 2298 | fw_data = (const __le32 *)(adev->gfx.rlc_fw->data + |
| 2281 | 2299 | le32_to_cpu(hdr->header.ucode_array_offset_bytes)); |
| @@ -2361,12 +2379,6 @@ static int gfx_v8_0_cp_gfx_load_microcode(struct amdgpu_device *adev) · 79 unmodified lines | ||
| 2361 | 2379 | amdgpu_ucode_print_gfx_hdr(&pfp_hdr->header); |
| 2362 | 2380 | amdgpu_ucode_print_gfx_hdr(&ce_hdr->header); |
| 2363 | 2381 | amdgpu_ucode_print_gfx_hdr(&me_hdr->header); |
| 2364 | − adev->gfx.pfp_fw_version = le32_to_cpu(pfp_hdr->header.ucode_version); | |
| 2365 | − adev->gfx.ce_fw_version = le32_to_cpu(ce_hdr->header.ucode_version); | |
| 2366 | − adev->gfx.me_fw_version = le32_to_cpu(me_hdr->header.ucode_version); | |
| 2367 | − adev->gfx.me_feature_version = le32_to_cpu(me_hdr->ucode_feature_version); | |
| 2368 | − adev->gfx.ce_feature_version = le32_to_cpu(ce_hdr->ucode_feature_version); | |
| 2369 | − adev->gfx.pfp_feature_version = le32_to_cpu(pfp_hdr->ucode_feature_version); | |
| 2370 | 2382 | |
| 2371 | 2383 | gfx_v8_0_cp_gfx_enable(adev, false); |
| 2372 | 2384 | |
| @@ -2622,7 +2634,6 @@ static int gfx_v8_0_cp_compute_load_microcode(struct amdgpu_device *adev) · 249 unmodified lines | ||
| 2622 | 2634 | |
| 2623 | 2635 | mec_hdr = (const struct gfx_firmware_header_v1_0 *)adev->gfx.mec_fw->data; |
| 2624 | 2636 | amdgpu_ucode_print_gfx_hdr(&mec_hdr->header); |
| 2625 | − adev->gfx.mec_fw_version = le32_to_cpu(mec_hdr->header.ucode_version); | |
| 2626 | 2637 | |
| 2627 | 2638 | fw_data = (const __le32 *) |
| 2628 | 2639 | (adev->gfx.mec_fw->data + |
| @@ -2641,7 +2652,6 @@ static int gfx_v8_0_cp_compute_load_microcode(struct amdgpu_device *adev) · 12 unmodified lines | ||
| 2641 | 2652 | |
| 2642 | 2653 | mec2_hdr = (const struct gfx_firmware_header_v1_0 *)adev->gfx.mec2_fw->data; |
| 2643 | 2654 | amdgpu_ucode_print_gfx_hdr(&mec2_hdr->header); |
| 2644 | − adev->gfx.mec2_fw_version = le32_to_cpu(mec2_hdr->header.ucode_version); | |
| 2645 | 2655 | |
| 2646 | 2656 | fw_data = (const __le32 *) |
| 2647 | 2657 | (adev->gfx.mec2_fw->data + |
| @@ -3125,7 +3135,7 @@ static int gfx_v8_0_cp_compute_resume(struct amdgpu_device *adev) · 477 unmodified lines | ||
| 3125 | 3135 | WREG32(mmCP_MEC_DOORBELL_RANGE_LOWER, |
| 3126 | 3136 | AMDGPU_DOORBELL_KIQ << 2); |
| 3127 | 3137 | WREG32(mmCP_MEC_DOORBELL_RANGE_UPPER, |
| 3128 | − 0x7FFFF << 2); | |
| 3138 | + AMDGPU_DOORBELL_MEC_RING7 << 2); | |
| 3129 | 3139 | } |
| 3130 | 3140 | tmp = RREG32(mmCP_HQD_PQ_DOORBELL_CONTROL); |
| 3131 | 3141 | tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL, |
| @@ -3753,7 +3763,7 @@ static void gfx_v8_0_ring_emit_hdp_flush(struct amdgpu_ring *ring) · 621 unmodified lines | ||
| 3753 | 3763 | amdgpu_ring_write(ring, 0x20); /* poll interval */ |
| 3754 | 3764 | } |
| 3755 | 3765 | |
| 3756 | −static void gfx_v8_0_ring_emit_ib(struct amdgpu_ring *ring, | |
| 3766 | +static void gfx_v8_0_ring_emit_ib_gfx(struct amdgpu_ring *ring, | |
| 3757 | 3767 | struct amdgpu_ib *ib) |
| 3758 | 3768 | { |
| 3759 | 3769 | bool need_ctx_switch = ring->current_ctx != ib->ctx; |
| @@ -3761,15 +3771,10 @@ static void gfx_v8_0_ring_emit_ib(struct amdgpu_ring *ring, · 1 unmodified line | ||
| 3761 | 3771 | u32 next_rptr = ring->wptr + 5; |
| 3762 | 3772 | |
| 3763 | 3773 | /* drop the CE preamble IB for the same context */ |
| 3764 | − if ((ring->type == AMDGPU_RING_TYPE_GFX) && | |
| 3765 | − (ib->flags & AMDGPU_IB_FLAG_PREAMBLE) && | |
| 3766 | − !need_ctx_switch) | |
| 3774 | + if ((ib->flags & AMDGPU_IB_FLAG_PREAMBLE) && !need_ctx_switch) | |
| 3767 | 3775 | return; |
| 3768 | 3776 | |
| 3769 | − if (ring->type == AMDGPU_RING_TYPE_COMPUTE) | |
| 3770 | − control |= INDIRECT_BUFFER_VALID; | |
| 3771 | − | |
| 3772 | − if (need_ctx_switch && ring->type == AMDGPU_RING_TYPE_GFX) | |
| 3777 | + if (need_ctx_switch) | |
| 3773 | 3778 | next_rptr += 2; |
| 3774 | 3779 | |
| 3775 | 3780 | next_rptr += 4; |
| @@ -3780,7 +3785,7 @@ static void gfx_v8_0_ring_emit_ib(struct amdgpu_ring *ring, · 4 unmodified lines | ||
| 3780 | 3785 | amdgpu_ring_write(ring, next_rptr); |
| 3781 | 3786 | |
| 3782 | 3787 | /* insert SWITCH_BUFFER packet before first IB in the ring frame */ |
| 3783 | − if (need_ctx_switch && ring->type == AMDGPU_RING_TYPE_GFX) { | |
| 3788 | + if (need_ctx_switch) { | |
| 3784 | 3789 | amdgpu_ring_write(ring, PACKET3(PACKET3_SWITCH_BUFFER, 0)); |
| 3785 | 3790 | amdgpu_ring_write(ring, 0); |
| 3786 | 3791 | } |
| @@ -3803,6 +3808,36 @@ static void gfx_v8_0_ring_emit_ib(struct amdgpu_ring *ring, · 16 unmodified lines | ||
| 3803 | 3808 | amdgpu_ring_write(ring, control); |
| 3804 | 3809 | } |
| 3805 | 3810 | |
| 3811 | +static void gfx_v8_0_ring_emit_ib_compute(struct amdgpu_ring *ring, | |
| 3812 | + struct amdgpu_ib *ib) | |
| 3813 | +{ | |
| 3814 | + u32 header, control = 0; | |
| 3815 | + u32 next_rptr = ring->wptr + 5; | |
| 3816 | + | |
| 3817 | + control |= INDIRECT_BUFFER_VALID; | |
| 3818 | + | |
| 3819 | + next_rptr += 4; | |
| 3820 | + amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3)); | |
| 3821 | + amdgpu_ring_write(ring, WRITE_DATA_DST_SEL(5) | WR_CONFIRM); | |
| 3822 | + amdgpu_ring_write(ring, ring->next_rptr_gpu_addr & 0xfffffffc); | |
| 3823 | + amdgpu_ring_write(ring, upper_32_bits(ring->next_rptr_gpu_addr) & 0xffffffff); | |
| 3824 | + amdgpu_ring_write(ring, next_rptr); | |
| 3825 | + | |
| 3826 | + header = PACKET3(PACKET3_INDIRECT_BUFFER, 2); | |
| 3827 | + | |
| 3828 | + control |= ib->length_dw | | |
| 3829 | + (ib->vm ? (ib->vm->ids[ring->idx].id << 24) : 0); | |
| 3830 | + | |
| 3831 | + amdgpu_ring_write(ring, header); | |
| 3832 | + amdgpu_ring_write(ring, | |
| 3833 | +#ifdef __BIG_ENDIAN | |
| 3834 | + (2 << 0) | | |
| 3835 | +#endif | |
| 3836 | + (ib->gpu_addr & 0xFFFFFFFC)); | |
| 3837 | + amdgpu_ring_write(ring, upper_32_bits(ib->gpu_addr) & 0xFFFF); | |
| 3838 | + amdgpu_ring_write(ring, control); | |
| 3839 | +} | |
| 3840 | + | |
| 3806 | 3841 | static void gfx_v8_0_ring_emit_fence_gfx(struct amdgpu_ring *ring, u64 addr, |
| 3807 | 3842 | u64 seq, unsigned flags) |
| 3808 | 3843 | { |
| @@ -4224,7 +4259,7 @@ static const struct amdgpu_ring_funcs gfx_v8_0_ring_funcs_gfx = { · 415 unmodified lines | ||
| 4224 | 4259 | .get_wptr = gfx_v8_0_ring_get_wptr_gfx, |
| 4225 | 4260 | .set_wptr = gfx_v8_0_ring_set_wptr_gfx, |
| 4226 | 4261 | .parse_cs = NULL, |
| 4227 | − .emit_ib = gfx_v8_0_ring_emit_ib, | |
| 4262 | + .emit_ib = gfx_v8_0_ring_emit_ib_gfx, | |
| 4228 | 4263 | .emit_fence = gfx_v8_0_ring_emit_fence_gfx, |
| 4229 | 4264 | .emit_semaphore = gfx_v8_0_ring_emit_semaphore, |
| 4230 | 4265 | .emit_vm_flush = gfx_v8_0_ring_emit_vm_flush, |
| @@ -4240,7 +4275,7 @@ static const struct amdgpu_ring_funcs gfx_v8_0_ring_funcs_compute = { · 9 unmodified lines | ||
| 4240 | 4275 | .get_wptr = gfx_v8_0_ring_get_wptr_compute, |
| 4241 | 4276 | .set_wptr = gfx_v8_0_ring_set_wptr_compute, |
| 4242 | 4277 | .parse_cs = NULL, |
| 4243 | − .emit_ib = gfx_v8_0_ring_emit_ib, | |
| 4278 | + .emit_ib = gfx_v8_0_ring_emit_ib_compute, | |
| 4244 | 4279 | .emit_fence = gfx_v8_0_ring_emit_fence_compute, |
| 4245 | 4280 | .emit_semaphore = gfx_v8_0_ring_emit_semaphore, |
| 4246 | 4281 | .emit_vm_flush = gfx_v8_0_ring_emit_vm_flush, |
| @@ -121,6 +121,7 @@ static int sdma_v2_4_init_microcode(struct amdgpu_device *adev) · 120 unmodified lines | ||
| 121 | 121 | int err, i; |
| 122 | 122 | struct amdgpu_firmware_info *info = NULL; |
| 123 | 123 | const struct common_firmware_header *header = NULL; |
| 124 | + const struct sdma_firmware_header_v1_0 *hdr; | |
| 124 | 125 | |
| 125 | 126 | DRM_DEBUG("\n"); |
| 126 | 127 | |
| @@ -142,6 +143,9 @@ static int sdma_v2_4_init_microcode(struct amdgpu_device *adev) · 15 unmodified lines | ||
| 142 | 143 | err = amdgpu_ucode_validate(adev->sdma[i].fw); |
| 143 | 144 | if (err) |
| 144 | 145 | goto out; |
| 146 | + hdr = (const struct sdma_firmware_header_v1_0 *)adev->sdma[i].fw->data; | |
| 147 | + adev->sdma[i].fw_version = le32_to_cpu(hdr->header.ucode_version); | |
| 148 | + adev->sdma[i].feature_version = le32_to_cpu(hdr->ucode_feature_version); | |
| 145 | 149 | |
| 146 | 150 | if (adev->firmware.smu_load) { |
| 147 | 151 | info = &adev->firmware.ucode[AMDGPU_UCODE_ID_SDMA0 + i]; |
| @@ -541,8 +545,6 @@ static int sdma_v2_4_load_microcode(struct amdgpu_device *adev) · 393 unmodified lines | ||
| 541 | 545 | hdr = (const struct sdma_firmware_header_v1_0 *)adev->sdma[i].fw->data; |
| 542 | 546 | amdgpu_ucode_print_sdma_hdr(&hdr->header); |
| 543 | 547 | fw_size = le32_to_cpu(hdr->header.ucode_size_bytes) / 4; |
| 544 | − adev->sdma[i].fw_version = le32_to_cpu(hdr->header.ucode_version); | |
| 545 | − | |
| 546 | 548 | fw_data = (const __le32 *) |
| 547 | 549 | (adev->sdma[i].fw->data + |
| 548 | 550 | le32_to_cpu(hdr->header.ucode_array_offset_bytes)); |
| @@ -159,6 +159,7 @@ static int sdma_v3_0_init_microcode(struct amdgpu_device *adev) · 158 unmodified lines | ||
| 159 | 159 | int err, i; |
| 160 | 160 | struct amdgpu_firmware_info *info = NULL; |
| 161 | 161 | const struct common_firmware_header *header = NULL; |
| 162 | + const struct sdma_firmware_header_v1_0 *hdr; | |
| 162 | 163 | |
| 163 | 164 | DRM_DEBUG("\n"); |
| 164 | 165 | |
| @@ -183,6 +184,9 @@ static int sdma_v3_0_init_microcode(struct amdgpu_device *adev) · 18 unmodified lines | ||
| 183 | 184 | err = amdgpu_ucode_validate(adev->sdma[i].fw); |
| 184 | 185 | if (err) |
| 185 | 186 | goto out; |
| 187 | + hdr = (const struct sdma_firmware_header_v1_0 *)adev->sdma[i].fw->data; | |
| 188 | + adev->sdma[i].fw_version = le32_to_cpu(hdr->header.ucode_version); | |
| 189 | + adev->sdma[i].feature_version = le32_to_cpu(hdr->ucode_feature_version); | |
| 186 | 190 | |
| 187 | 191 | if (adev->firmware.smu_load) { |
| 188 | 192 | info = &adev->firmware.ucode[AMDGPU_UCODE_ID_SDMA0 + i]; |
| @@ -630,8 +634,6 @@ static int sdma_v3_0_load_microcode(struct amdgpu_device *adev) · 441 unmodified lines | ||
| 630 | 634 | hdr = (const struct sdma_firmware_header_v1_0 *)adev->sdma[i].fw->data; |
| 631 | 635 | amdgpu_ucode_print_sdma_hdr(&hdr->header); |
| 632 | 636 | fw_size = le32_to_cpu(hdr->header.ucode_size_bytes) / 4; |
| 633 | − adev->sdma[i].fw_version = le32_to_cpu(hdr->header.ucode_version); | |
| 634 | − | |
| 635 | 637 | fw_data = (const __le32 *) |
| 636 | 638 | (adev->sdma[i].fw->data + |
| 637 | 639 | le32_to_cpu(hdr->header.ucode_array_offset_bytes)); |
| @@ -35,6 +35,8 @@ · 34 unmodified lines | ||
| 35 | 35 | #include "oss/oss_2_0_d.h" |
| 36 | 36 | #include "oss/oss_2_0_sh_mask.h" |
| 37 | 37 | #include "gca/gfx_8_0_d.h" |
| 38 | +#include "smu/smu_7_1_2_d.h" | |
| 39 | +#include "smu/smu_7_1_2_sh_mask.h" | |
| 38 | 40 | |
| 39 | 41 | #define GRBM_GFX_INDEX__VCE_INSTANCE__SHIFT 0x04 |
| 40 | 42 | #define GRBM_GFX_INDEX__VCE_INSTANCE_MASK 0x10 |
| @@ -112,6 +114,10 @@ static int vce_v3_0_start(struct amdgpu_device *adev) · 71 unmodified lines | ||
| 112 | 114 | |
| 113 | 115 | mutex_lock(&adev->grbm_idx_mutex); |
| 114 | 116 | for (idx = 0; idx < 2; ++idx) { |
| 117 | + | |
| 118 | + if (adev->vce.harvest_config & (1 << idx)) | |
| 119 | + continue; | |
| 120 | + | |
| 115 | 121 | if(idx == 0) |
| 116 | 122 | WREG32_P(mmGRBM_GFX_INDEX, 0, |
| 117 | 123 | ~GRBM_GFX_INDEX__VCE_INSTANCE_MASK); |
| @@ -190,10 +196,52 @@ static int vce_v3_0_start(struct amdgpu_device *adev) · 72 unmodified lines | ||
| 190 | 196 | return 0; |
| 191 | 197 | } |
| 192 | 198 | |
| 199 | +#define ixVCE_HARVEST_FUSE_MACRO__ADDRESS 0xC0014074 | |
| 200 | +#define VCE_HARVEST_FUSE_MACRO__SHIFT 27 | |
| 201 | +#define VCE_HARVEST_FUSE_MACRO__MASK 0x18000000 | |
| 202 | + | |
| 203 | +static unsigned vce_v3_0_get_harvest_config(struct amdgpu_device *adev) | |
| 204 | +{ | |
| 205 | + u32 tmp; | |
| 206 | + unsigned ret; | |
| 207 | + | |
| 208 | + if (adev->flags & AMDGPU_IS_APU) | |
| 209 | + tmp = (RREG32_SMC(ixVCE_HARVEST_FUSE_MACRO__ADDRESS) & | |
| 210 | + VCE_HARVEST_FUSE_MACRO__MASK) >> | |
| 211 | + VCE_HARVEST_FUSE_MACRO__SHIFT; | |
| 212 | + else | |
| 213 | + tmp = (RREG32_SMC(ixCC_HARVEST_FUSES) & | |
| 214 | + CC_HARVEST_FUSES__VCE_DISABLE_MASK) >> | |
| 215 | + CC_HARVEST_FUSES__VCE_DISABLE__SHIFT; | |
| 216 | + | |
| 217 | + switch (tmp) { | |
| 218 | + case 1: | |
| 219 | + ret = AMDGPU_VCE_HARVEST_VCE0; | |
| 220 | + break; | |
| 221 | + case 2: | |
| 222 | + ret = AMDGPU_VCE_HARVEST_VCE1; | |
| 223 | + break; | |
| 224 | + case 3: | |
| 225 | + ret = AMDGPU_VCE_HARVEST_VCE0 | AMDGPU_VCE_HARVEST_VCE1; | |
| 226 | + break; | |
| 227 | + default: | |
| 228 | + ret = 0; | |
| 229 | + } | |
| 230 | + | |
| 231 | + return ret; | |
| 232 | +} | |
| 233 | + | |
| 193 | 234 | static int vce_v3_0_early_init(void *handle) |
| 194 | 235 | { |
| 195 | 236 | struct amdgpu_device *adev = (struct amdgpu_device *)handle; |
| 196 | 237 | |
| 238 | + adev->vce.harvest_config = vce_v3_0_get_harvest_config(adev); | |
| 239 | + | |
| 240 | + if ((adev->vce.harvest_config & | |
| 241 | + (AMDGPU_VCE_HARVEST_VCE0 | AMDGPU_VCE_HARVEST_VCE1)) == | |
| 242 | + (AMDGPU_VCE_HARVEST_VCE0 | AMDGPU_VCE_HARVEST_VCE1)) | |
| 243 | + return -ENOENT; | |
| 244 | + | |
| 197 | 245 | vce_v3_0_set_ring_funcs(adev); |
| 198 | 246 | vce_v3_0_set_irq_funcs(adev); |
| 199 | 247 | |
| @@ -357,6 +357,7 @@ int atmel_hlcdc_crtc_create(struct drm_device *dev) · 356 unmodified lines | ||
| 357 | 357 | planes->overlays[i]->base.possible_crtcs = 1 << crtc->id; |
| 358 | 358 | |
| 359 | 359 | drm_crtc_helper_add(&crtc->base, &lcdc_crtc_helper_funcs); |
| 360 | + drm_crtc_vblank_reset(&crtc->base); | |
| 360 | 361 | |
| 361 | 362 | dc->crtc = &crtc->base; |
| 362 | 363 | |
| @@ -313,20 +313,20 @@ static int atmel_hlcdc_dc_load(struct drm_device *dev) · 312 unmodified lines | ||
| 313 | 313 | |
| 314 | 314 | pm_runtime_enable(dev->dev); |
| 315 | 315 | |
| 316 | − ret = atmel_hlcdc_dc_modeset_init(dev); | |
| 316 | + ret = drm_vblank_init(dev, 1); | |
| 317 | 317 | if (ret < 0) { |
| 318 | − dev_err(dev->dev, "failed to initialize mode setting\n"); | |
| 318 | + dev_err(dev->dev, "failed to initialize vblank\n"); | |
| 319 | 319 | goto err_periph_clk_disable; |
| 320 | 320 | } |
| 321 | 321 | |
| 322 | − drm_mode_config_reset(dev); | |
| 323 | − | |
| 324 | − ret = drm_vblank_init(dev, 1); | |
| 322 | + ret = atmel_hlcdc_dc_modeset_init(dev); | |
| 325 | 323 | if (ret < 0) { |
| 326 | − dev_err(dev->dev, "failed to initialize vblank\n"); | |
| 324 | + dev_err(dev->dev, "failed to initialize mode setting\n"); | |
| 327 | 325 | goto err_periph_clk_disable; |
| 328 | 326 | } |
| 329 | 327 | |
| 328 | + drm_mode_config_reset(dev); | |
| 329 | + | |
| 330 | 330 | pm_runtime_get_sync(dev->dev); |
| 331 | 331 | ret = drm_irq_install(dev, dc->hlcdc->irq); |
| 332 | 332 | pm_runtime_put_sync(dev->dev); |
| @@ -196,7 +196,12 @@ update_connector_routing(struct drm_atomic_state *state, int conn_idx) · 195 unmodified lines | ||
| 196 | 196 | } |
| 197 | 197 | |
| 198 | 198 | funcs = connector->helper_private; |
| 199 | − new_encoder = funcs->best_encoder(connector); | |
| 199 | + | |
| 200 | + if (funcs->atomic_best_encoder) | |
| 201 | + new_encoder = funcs->atomic_best_encoder(connector, | |
| 202 | + connector_state); | |
| 203 | + else | |
| 204 | + new_encoder = funcs->best_encoder(connector); | |
| 200 | 205 | |
| 201 | 206 | if (!new_encoder) { |
| 202 | 207 | DRM_DEBUG_ATOMIC("No suitable encoder found for [CONNECTOR:%d:%s]\n", |
| @@ -229,6 +234,9 @@ update_connector_routing(struct drm_atomic_state *state, int conn_idx) · 26 unmodified lines | ||
| 229 | 234 | } |
| 230 | 235 | } |
| 231 | 236 | |
| 237 | + if (WARN_ON(!connector_state->crtc)) | |
| 238 | + return -EINVAL; | |
| 239 | + | |
| 232 | 240 | connector_state->best_encoder = new_encoder; |
| 233 | 241 | idx = drm_crtc_index(connector_state->crtc); |
| 234 | 242 | |
| @@ -5274,12 +5274,9 @@ void drm_mode_config_reset(struct drm_device *dev) · 5273 unmodified lines | ||
| 5274 | 5274 | encoder->funcs->reset(encoder); |
| 5275 | 5275 | |
| 5276 | 5276 | mutex_lock(&dev->mode_config.mutex); |
| 5277 | − drm_for_each_connector(connector, dev) { | |
| 5278 | − connector->status = connector_status_unknown; | |
| 5279 | − | |
| 5277 | + drm_for_each_connector(connector, dev) | |
| 5280 | 5278 | if (connector->funcs->reset) |
| 5281 | 5279 | connector->funcs->reset(connector); |
| 5282 | − } | |
| 5283 | 5280 | mutex_unlock(&dev->mode_config.mutex); |
| 5284 | 5281 | } |
| 5285 | 5282 | EXPORT_SYMBOL(drm_mode_config_reset); |
| @@ -1294,7 +1294,6 @@ retry: · 1293 unmodified lines | ||
| 1294 | 1294 | goto retry; |
| 1295 | 1295 | } |
| 1296 | 1296 | DRM_DEBUG_KMS("failed to dpcd write %d %d\n", tosend, ret); |
| 1297 | − WARN(1, "fail\n"); | |
| 1298 | 1297 | |
| 1299 | 1298 | return -EIO; |
| 1300 | 1299 | } |
| @@ -75,7 +75,7 @@ module_param_named(timestamp_precision_usec, drm_timestamp_precision, int, 0600) · 74 unmodified lines | ||
| 75 | 75 | module_param_named(timestamp_monotonic, drm_timestamp_monotonic, int, 0600); |
| 76 | 76 | |
| 77 | 77 | static void store_vblank(struct drm_device *dev, int crtc, |
| 78 | − unsigned vblank_count_inc, | |
| 78 | + u32 vblank_count_inc, | |
| 79 | 79 | struct timeval *t_vblank) |
| 80 | 80 | { |
| 81 | 81 | struct drm_vblank_crtc *vblank = &dev->vblank[crtc]; |
| @@ -1745,7 +1745,6 @@ static int fimc_probe(struct platform_device *pdev) · 1744 unmodified lines | ||
| 1745 | 1745 | spin_lock_init(&ctx->lock); |
| 1746 | 1746 | platform_set_drvdata(pdev, ctx); |
| 1747 | 1747 | |
| 1748 | − pm_runtime_set_active(dev); | |
| 1749 | 1748 | pm_runtime_enable(dev); |
| 1750 | 1749 | |
| 1751 | 1750 | ret = exynos_drm_ippdrv_register(ippdrv); |
| @@ -593,8 +593,7 @@ static int gsc_src_set_transf(struct device *dev, · 592 unmodified lines | ||
| 593 | 593 | |
| 594 | 594 | gsc_write(cfg, GSC_IN_CON); |
| 595 | 595 | |
| 596 | − ctx->rotation = cfg & | |
| 597 | − (GSC_IN_ROT_90 | GSC_IN_ROT_270) ? 1 : 0; | |
| 596 | + ctx->rotation = (cfg & GSC_IN_ROT_90) ? 1 : 0; | |
| 598 | 597 | *swap = ctx->rotation; |
| 599 | 598 | |
| 600 | 599 | return 0; |
| @@ -857,8 +856,7 @@ static int gsc_dst_set_transf(struct device *dev, · 256 unmodified lines | ||
| 857 | 856 | |
| 858 | 857 | gsc_write(cfg, GSC_IN_CON); |
| 859 | 858 | |
| 860 | − ctx->rotation = cfg & | |
| 861 | − (GSC_IN_ROT_90 | GSC_IN_ROT_270) ? 1 : 0; | |
| 859 | + ctx->rotation = (cfg & GSC_IN_ROT_90) ? 1 : 0; | |
| 862 | 860 | *swap = ctx->rotation; |
| 863 | 861 | |
| 864 | 862 | return 0; |
| @@ -1064,6 +1064,7 @@ static int hdmi_get_modes(struct drm_connector *connector) · 1063 unmodified lines | ||
| 1064 | 1064 | { |
| 1065 | 1065 | struct hdmi_context *hdata = ctx_from_connector(connector); |
| 1066 | 1066 | struct edid *edid; |
| 1067 | + int ret; | |
| 1067 | 1068 | |
| 1068 | 1069 | if (!hdata->ddc_adpt) |
| 1069 | 1070 | return -ENODEV; |
| @@ -1079,7 +1080,11 @@ static int hdmi_get_modes(struct drm_connector *connector) · 9 unmodified lines | ||
| 1079 | 1080 | |
| 1080 | 1081 | drm_mode_connector_update_edid_property(connector, edid); |
| 1081 | 1082 | |
| 1082 | − return drm_add_edid_modes(connector, edid); | |
| 1083 | + ret = drm_add_edid_modes(connector, edid); | |
| 1084 | + | |
| 1085 | + kfree(edid); | |
| 1086 | + | |
| 1087 | + return ret; | |
| 1083 | 1088 | } |
| 1084 | 1089 | |
| 1085 | 1090 | static int hdmi_find_phy_conf(struct hdmi_context *hdata, u32 pixel_clock) |
| @@ -718,6 +718,10 @@ static irqreturn_t mixer_irq_handler(int irq, void *arg) · 717 unmodified lines | ||
| 718 | 718 | |
| 719 | 719 | /* handling VSYNC */ |
| 720 | 720 | if (val & MXR_INT_STATUS_VSYNC) { |
| 721 | + /* vsync interrupt use different bit for read and clear */ | |
| 722 | + val |= MXR_INT_CLEAR_VSYNC; | |
| 723 | + val &= ~MXR_INT_STATUS_VSYNC; | |
| 724 | + | |
| 721 | 725 | /* interlace scan need to check shadow register */ |
| 722 | 726 | if (ctx->interlace) { |
| 723 | 727 | base = mixer_reg_read(res, MXR_GRAPHIC_BASE(0)); |
| @@ -743,11 +747,6 @@ static irqreturn_t mixer_irq_handler(int irq, void *arg) · 19 unmodified lines | ||
| 743 | 747 | |
| 744 | 748 | out: |
| 745 | 749 | /* clear interrupts */ |
| 746 | − if (~val & MXR_INT_EN_VSYNC) { | |
| 747 | − /* vsync interrupt use different bit for read and clear */ | |
| 748 | − val &= ~MXR_INT_EN_VSYNC; | |
| 749 | − val |= MXR_INT_CLEAR_VSYNC; | |
| 750 | − } | |
| 751 | 750 | mixer_reg_write(res, MXR_INT_STATUS, val); |
| 752 | 751 | |
| 753 | 752 | spin_unlock(&res->reg_slock); |
| @@ -907,8 +906,8 @@ static int mixer_enable_vblank(struct exynos_drm_crtc *crtc) · 153 unmodified lines | ||
| 907 | 906 | } |
| 908 | 907 | |
| 909 | 908 | /* enable vsync interrupt */ |
| 910 | − mixer_reg_writemask(res, MXR_INT_EN, MXR_INT_EN_VSYNC, | |
| 911 | − MXR_INT_EN_VSYNC); | |
| 909 | + mixer_reg_writemask(res, MXR_INT_STATUS, ~0, MXR_INT_CLEAR_VSYNC); | |
| 910 | + mixer_reg_writemask(res, MXR_INT_EN, ~0, MXR_INT_EN_VSYNC); | |
| 912 | 911 | |
| 913 | 912 | return 0; |
| 914 | 913 | } |
| @@ -918,7 +917,13 @@ static void mixer_disable_vblank(struct exynos_drm_crtc *crtc) · 3 unmodified lines | ||
| 918 | 917 | struct mixer_context *mixer_ctx = crtc->ctx; |
| 919 | 918 | struct mixer_resources *res = &mixer_ctx->mixer_res; |
| 920 | 919 | |
| 920 | + if (!mixer_ctx->powered) { | |
| 921 | + mixer_ctx->int_en &= MXR_INT_EN_VSYNC; | |
| 922 | + return; | |
| 923 | + } | |
| 924 | + | |
| 921 | 925 | /* disable vsync interrupt */ |
| 926 | + mixer_reg_writemask(res, MXR_INT_STATUS, ~0, MXR_INT_CLEAR_VSYNC); | |
| 922 | 927 | mixer_reg_writemask(res, MXR_INT_EN, 0, MXR_INT_EN_VSYNC); |
| 923 | 928 | } |
| 924 | 929 | |
| @@ -1047,6 +1052,8 @@ static void mixer_enable(struct exynos_drm_crtc *crtc) · 122 unmodified lines | ||
| 1047 | 1052 | |
| 1048 | 1053 | mixer_reg_writemask(res, MXR_STATUS, ~0, MXR_STATUS_SOFT_RESET); |
| 1049 | 1054 | |
| 1055 | + if (ctx->int_en & MXR_INT_EN_VSYNC) | |
| 1056 | + mixer_reg_writemask(res, MXR_INT_STATUS, ~0, MXR_INT_CLEAR_VSYNC); | |
| 1050 | 1057 | mixer_reg_write(res, MXR_INT_EN, ctx->int_en); |
| 1051 | 1058 | mixer_win_reset(ctx); |
| 1052 | 1059 | } |
| @@ -606,8 +606,6 @@ static void · 605 unmodified lines | ||
| 606 | 606 | tda998x_write_if(struct tda998x_priv *priv, uint8_t bit, uint16_t addr, |
| 607 | 607 | uint8_t *buf, size_t size) |
| 608 | 608 | { |
| 609 | − buf[PB(0)] = tda998x_cksum(buf, size); | |
| 610 | − | |
| 611 | 609 | reg_clear(priv, REG_DIP_IF_FLAGS, bit); |
| 612 | 610 | reg_write_range(priv, addr, buf, size); |
| 613 | 611 | reg_set(priv, REG_DIP_IF_FLAGS, bit); |
| @@ -627,6 +625,8 @@ tda998x_write_aif(struct tda998x_priv *priv, struct tda998x_encoder_params *p) · 13 unmodified lines | ||
| 627 | 625 | buf[PB(4)] = p->audio_frame[4]; |
| 628 | 626 | buf[PB(5)] = p->audio_frame[5] & 0xf8; /* DM_INH + LSV */ |
| 629 | 627 | |
| 628 | + buf[PB(0)] = tda998x_cksum(buf, sizeof(buf)); | |
| 629 | + | |
| 630 | 630 | tda998x_write_if(priv, DIP_IF_FLAGS_IF4, REG_IF4_HB0, buf, |
| 631 | 631 | sizeof(buf)); |
| 632 | 632 | } |
| @@ -3359,15 +3359,14 @@ int intel_freq_opcode(struct drm_i915_private *dev_priv, int val); · 3358 unmodified lines | ||
| 3359 | 3359 | #define I915_READ64(reg) dev_priv->uncore.funcs.mmio_readq(dev_priv, (reg), true) |
| 3360 | 3360 | |
| 3361 | 3361 | #define I915_READ64_2x32(lower_reg, upper_reg) ({ \ |
| 3362 | − u32 upper = I915_READ(upper_reg); \ | |
| 3363 | − u32 lower = I915_READ(lower_reg); \ | |
| 3364 | − u32 tmp = I915_READ(upper_reg); \ | |
| 3365 | − if (upper != tmp) { \ | |
| 3366 | − upper = tmp; \ | |
| 3367 | − lower = I915_READ(lower_reg); \ | |
| 3368 | − WARN_ON(I915_READ(upper_reg) != upper); \ | |
| 3369 | − } \ | |
| 3370 | − (u64)upper << 32 | lower; }) | |
| 3362 | + u32 upper, lower, tmp; \ | |
| 3363 | + tmp = I915_READ(upper_reg); \ | |
| 3364 | + do { \ | |
| 3365 | + upper = tmp; \ | |
| 3366 | + lower = I915_READ(lower_reg); \ | |
| 3367 | + tmp = I915_READ(upper_reg); \ | |
| 3368 | + } while (upper != tmp); \ | |
| 3369 | + (u64)upper << 32 | lower; }) | |
| 3371 | 3370 | |
| 3372 | 3371 | #define POSTING_READ(reg) (void)I915_READ_NOTRACE(reg) |
| 3373 | 3372 | #define POSTING_READ16(reg) (void)I915_READ16_NOTRACE(reg) |
| @@ -2003,6 +2003,17 @@ static int ggtt_bind_vma(struct i915_vma *vma, · 2002 unmodified lines | ||
| 2003 | 2003 | vma->vm->insert_entries(vma->vm, pages, |
| 2004 | 2004 | vma->node.start, |
| 2005 | 2005 | cache_level, pte_flags); |
| 2006 | + | |
| 2007 | + /* Note the inconsistency here is due to absence of the | |
| 2008 | + * aliasing ppgtt on gen4 and earlier. Though we always | |
| 2009 | + * request PIN_USER for execbuffer (translated to LOCAL_BIND), | |
| 2010 | + * without the appgtt, we cannot honour that request and so | |
| 2011 | + * must substitute it with a global binding. Since we do this | |
| 2012 | + * behind the upper layers back, we need to explicitly set | |
| 2013 | + * the bound flag ourselves. | |
| 2014 | + */ | |
| 2015 | + vma->bound |= GLOBAL_BIND; | |
| 2016 | + | |
| 2006 | 2017 | } |
| 2007 | 2018 | |
| 2008 | 2019 | if (dev_priv->mm.aliasing_ppgtt && flags & LOCAL_BIND) { |
| @@ -464,7 +464,10 @@ i915_gem_get_tiling(struct drm_device *dev, void *data, · 463 unmodified lines | ||
| 464 | 464 | } |
| 465 | 465 | |
| 466 | 466 | /* Hide bit 17 from the user -- see comment in i915_gem_set_tiling */ |
| 467 | − args->phys_swizzle_mode = args->swizzle_mode; | |
| 467 | + if (dev_priv->quirks & QUIRK_PIN_SWIZZLED_PAGES) | |
| 468 | + args->phys_swizzle_mode = I915_BIT_6_SWIZZLE_UNKNOWN; | |
| 469 | + else | |
| 470 | + args->phys_swizzle_mode = args->swizzle_mode; | |
| 468 | 471 | if (args->swizzle_mode == I915_BIT_6_SWIZZLE_9_17) |
| 469 | 472 | args->swizzle_mode = I915_BIT_6_SWIZZLE_9; |
| 470 | 473 | if (args->swizzle_mode == I915_BIT_6_SWIZZLE_9_10_17) |
| @@ -1015,15 +1015,34 @@ parse_device_mapping(struct drm_i915_private *dev_priv, · 1014 unmodified lines | ||
| 1015 | 1015 | const union child_device_config *p_child; |
| 1016 | 1016 | union child_device_config *child_dev_ptr; |
| 1017 | 1017 | int i, child_device_num, count; |
| 1018 | − u16 block_size; | |
| 1018 | + u8 expected_size; | |
| 1019 | + u16 block_size; | |
| 1019 | 1020 | |
| 1020 | 1021 | p_defs = find_section(bdb, BDB_GENERAL_DEFINITIONS); |
| 1021 | 1022 | if (!p_defs) { |
| 1022 | 1023 | DRM_DEBUG_KMS("No general definition block is found, no devices defined.\n"); |
| 1023 | 1024 | return; |
| 1024 | 1025 | } |
| 1025 | − if (p_defs->child_dev_size < sizeof(*p_child)) { | |
| 1026 | − DRM_ERROR("General definiton block child device size is too small.\n"); | |
| 1026 | + if (bdb->version < 195) { | |
| 1027 | + expected_size = 33; | |
| 1028 | + } else if (bdb->version == 195) { | |
| 1029 | + expected_size = 37; | |
| 1030 | + } else if (bdb->version <= 197) { | |
| 1031 | + expected_size = 38; | |
| 1032 | + } else { | |
| 1033 | + expected_size = 38; | |
| 1034 | + DRM_DEBUG_DRIVER("Expected child_device_config size for BDB version %u not known; assuming %u\n", | |
| 1035 | + expected_size, bdb->version); | |
| 1036 | + } | |
| 1037 | + | |
| 1038 | + if (expected_size > sizeof(*p_child)) { | |
| 1039 | + DRM_ERROR("child_device_config cannot fit in p_child\n"); | |
| 1040 | + return; | |
| 1041 | + } | |
| 1042 | + | |
| 1043 | + if (p_defs->child_dev_size != expected_size) { | |
| 1044 | + DRM_ERROR("Size mismatch; child_device_config size=%u (expected %u); bdb->version: %u\n", | |
| 1045 | + p_defs->child_dev_size, expected_size, bdb->version); | |
| 1027 | 1046 | return; |
| 1028 | 1047 | } |
| 1029 | 1048 | /* get the block size of general definitions */ |
| @@ -1070,7 +1089,7 @@ parse_device_mapping(struct drm_i915_private *dev_priv, · 40 unmodified lines | ||
| 1070 | 1089 | |
| 1071 | 1090 | child_dev_ptr = dev_priv->vbt.child_dev + count; |
| 1072 | 1091 | count++; |
| 1073 | − memcpy(child_dev_ptr, p_child, sizeof(*p_child)); | |
| 1092 | + memcpy(child_dev_ptr, p_child, p_defs->child_dev_size); | |
| 1074 | 1093 | } |
| 1075 | 1094 | return; |
| 1076 | 1095 | } |
| @@ -357,6 +357,16 @@ intel_dp_mst_mode_valid(struct drm_connector *connector, · 356 unmodified lines | ||
| 357 | 357 | return MODE_OK; |
| 358 | 358 | } |
| 359 | 359 | |
| 360 | +static struct drm_encoder *intel_mst_atomic_best_encoder(struct drm_connector *connector, | |
| 361 | + struct drm_connector_state *state) | |
| 362 | +{ | |
| 363 | + struct intel_connector *intel_connector = to_intel_connector(connector); | |
| 364 | + struct intel_dp *intel_dp = intel_connector->mst_port; | |
| 365 | + struct intel_crtc *crtc = to_intel_crtc(state->crtc); | |
| 366 | + | |
| 367 | + return &intel_dp->mst_encoders[crtc->pipe]->base.base; | |
| 368 | +} | |
| 369 | + | |
| 360 | 370 | static struct drm_encoder *intel_mst_best_encoder(struct drm_connector *connector) |
| 361 | 371 | { |
| 362 | 372 | struct intel_connector *intel_connector = to_intel_connector(connector); |
| @@ -367,6 +377,7 @@ static struct drm_encoder *intel_mst_best_encoder(struct drm_connector *connecto · 4 unmodified lines | ||
| 367 | 377 | static const struct drm_connector_helper_funcs intel_dp_mst_connector_helper_funcs = { |
| 368 | 378 | .get_modes = intel_dp_mst_get_modes, |
| 369 | 379 | .mode_valid = intel_dp_mst_mode_valid, |
| 380 | + .atomic_best_encoder = intel_mst_atomic_best_encoder, | |
| 370 | 381 | .best_encoder = intel_mst_best_encoder, |
| 371 | 382 | }; |
| 372 | 383 | |
| @@ -1274,10 +1274,12 @@ int i915_reg_read_ioctl(struct drm_device *dev, · 1273 unmodified lines | ||
| 1274 | 1274 | struct drm_i915_private *dev_priv = dev->dev_private; |
| 1275 | 1275 | struct drm_i915_reg_read *reg = data; |
| 1276 | 1276 | struct register_whitelist const *entry = whitelist; |
| 1277 | + unsigned size; | |
| 1278 | + u64 offset; | |
| 1277 | 1279 | int i, ret = 0; |
| 1278 | 1280 | |
| 1279 | 1281 | for (i = 0; i < ARRAY_SIZE(whitelist); i++, entry++) { |
| 1280 | − if (entry->offset == reg->offset && | |
| 1282 | + if (entry->offset == (reg->offset & -entry->size) && | |
| 1281 | 1283 | (1 << INTEL_INFO(dev)->gen & entry->gen_bitmask)) |
| 1282 | 1284 | break; |
| 1283 | 1285 | } |
| @@ -1285,23 +1287,33 @@ int i915_reg_read_ioctl(struct drm_device *dev, · 1 unmodified line | ||
| 1285 | 1287 | if (i == ARRAY_SIZE(whitelist)) |
| 1286 | 1288 | return -EINVAL; |
| 1287 | 1289 | |
| 1290 | + /* We use the low bits to encode extra flags as the register should | |
| 1291 | + * be naturally aligned (and those that are not so aligned merely | |
| 1292 | + * limit the available flags for that register). | |
| 1293 | + */ | |
| 1294 | + offset = entry->offset; | |
| 1295 | + size = entry->size; | |
| 1296 | + size |= reg->offset ^ offset; | |
| 1297 | + | |
| 1288 | 1298 | intel_runtime_pm_get(dev_priv); |
| 1289 | 1299 | |
| 1290 | − switch (entry->size) { | |
| 1300 | + switch (size) { | |
| 1301 | + case 8 | 1: | |
| 1302 | + reg->val = I915_READ64_2x32(offset, offset+4); | |
| 1303 | + break; | |
| 1291 | 1304 | case 8: |
| 1292 | − reg->val = I915_READ64(reg->offset); | |
| 1305 | + reg->val = I915_READ64(offset); | |
| 1293 | 1306 | break; |
| 1294 | 1307 | case 4: |
| 1295 | − reg->val = I915_READ(reg->offset); | |
| 1308 | + reg->val = I915_READ(offset); | |
| 1296 | 1309 | break; |
| 1297 | 1310 | case 2: |
| 1298 | − reg->val = I915_READ16(reg->offset); | |
| 1311 | + reg->val = I915_READ16(offset); | |
| 1299 | 1312 | break; |
| 1300 | 1313 | case 1: |
| 1301 | − reg->val = I915_READ8(reg->offset); | |
| 1314 | + reg->val = I915_READ8(offset); | |
| 1302 | 1315 | break; |
| 1303 | 1316 | default: |
| 1304 | − MISSING_CASE(entry->size); | |
| 1305 | 1317 | ret = -EINVAL; |
| 1306 | 1318 | goto out; |
| 1307 | 1319 | } |
| @@ -220,13 +220,15 @@ static int mdp4_plane_mode_set(struct drm_plane *plane, · 219 unmodified lines | ||
| 220 | 220 | uint32_t op_mode = 0; |
| 221 | 221 | uint32_t phasex_step = MDP4_VG_PHASE_STEP_DEFAULT; |
| 222 | 222 | uint32_t phasey_step = MDP4_VG_PHASE_STEP_DEFAULT; |
| 223 | − enum mdp4_frame_format frame_type = mdp4_get_frame_format(fb); | |
| 223 | + enum mdp4_frame_format frame_type; | |
| 224 | 224 | |
| 225 | 225 | if (!(crtc && fb)) { |
| 226 | 226 | DBG("%s: disabled!", mdp4_plane->name); |
| 227 | 227 | return 0; |
| 228 | 228 | } |
| 229 | 229 | |
| 230 | + frame_type = mdp4_get_frame_format(fb); | |
| 231 | + | |
| 230 | 232 | /* src values are in Q16 fixed point, convert to integer: */ |
| 231 | 233 | src_x = src_x >> 16; |
| 232 | 234 | src_y = src_y >> 16; |
| @@ -76,7 +76,20 @@ static void mdp5_prepare_commit(struct msm_kms *kms, struct drm_atomic_state *st · 75 unmodified lines | ||
| 76 | 76 | |
| 77 | 77 | static void mdp5_complete_commit(struct msm_kms *kms, struct drm_atomic_state *state) |
| 78 | 78 | { |
| 79 | + int i; | |
| 79 | 80 | struct mdp5_kms *mdp5_kms = to_mdp5_kms(to_mdp_kms(kms)); |
| 81 | + int nplanes = mdp5_kms->dev->mode_config.num_total_plane; | |
| 82 | + | |
| 83 | + for (i = 0; i < nplanes; i++) { | |
| 84 | + struct drm_plane *plane = state->planes[i]; | |
| 85 | + struct drm_plane_state *plane_state = state->plane_states[i]; | |
| 86 | + | |
| 87 | + if (!plane) | |
| 88 | + continue; | |
| 89 | + | |
| 90 | + mdp5_plane_complete_commit(plane, plane_state); | |
| 91 | + } | |
| 92 | + | |
| 80 | 93 | mdp5_disable(mdp5_kms); |
| 81 | 94 | } |
| 82 | 95 | |
| @@ -227,6 +227,8 @@ void mdp5_plane_install_properties(struct drm_plane *plane, · 226 unmodified lines | ||
| 227 | 227 | struct drm_mode_object *obj); |
| 228 | 228 | uint32_t mdp5_plane_get_flush(struct drm_plane *plane); |
| 229 | 229 | void mdp5_plane_complete_flip(struct drm_plane *plane); |
| 230 | +void mdp5_plane_complete_commit(struct drm_plane *plane, | |
| 231 | + struct drm_plane_state *state); | |
| 230 | 232 | enum mdp5_pipe mdp5_plane_pipe(struct drm_plane *plane); |
| 231 | 233 | struct drm_plane *mdp5_plane_init(struct drm_device *dev, |
| 232 | 234 | enum mdp5_pipe pipe, bool private_plane, uint32_t reg_offset); |
| @@ -31,8 +31,6 @@ struct mdp5_plane { · 30 unmodified lines | ||
| 31 | 31 | |
| 32 | 32 | uint32_t nformats; |
| 33 | 33 | uint32_t formats[32]; |
| 34 | − | |
| 35 | − bool enabled; | |
| 36 | 34 | }; |
| 37 | 35 | #define to_mdp5_plane(x) container_of(x, struct mdp5_plane, base) |
| 38 | 36 | |
| @@ -56,22 +54,6 @@ static bool plane_enabled(struct drm_plane_state *state) · 17 unmodified lines | ||
| 56 | 54 | return state->fb && state->crtc; |
| 57 | 55 | } |
| 58 | 56 | |
| 59 | −static int mdp5_plane_disable(struct drm_plane *plane) | |
| 60 | −{ | |
| 61 | − struct mdp5_plane *mdp5_plane = to_mdp5_plane(plane); | |
| 62 | − struct mdp5_kms *mdp5_kms = get_kms(plane); | |
| 63 | − enum mdp5_pipe pipe = mdp5_plane->pipe; | |
| 64 | − | |
| 65 | − DBG("%s: disable", mdp5_plane->name); | |
| 66 | − | |
| 67 | − if (mdp5_kms) { | |
| 68 | − /* Release the memory we requested earlier from the SMP: */ | |
| 69 | − mdp5_smp_release(mdp5_kms->smp, pipe); | |
| 70 | − } | |
| 71 | − | |
| 72 | − return 0; | |
| 73 | −} | |
| 74 | − | |
| 75 | 57 | static void mdp5_plane_destroy(struct drm_plane *plane) |
| 76 | 58 | { |
| 77 | 59 | struct mdp5_plane *mdp5_plane = to_mdp5_plane(plane); |
| @@ -224,7 +206,6 @@ static void mdp5_plane_atomic_update(struct drm_plane *plane, · 146 unmodified lines | ||
| 224 | 206 | |
| 225 | 207 | if (!plane_enabled(state)) { |
| 226 | 208 | to_mdp5_plane_state(state)->pending = true; |
| 227 | − mdp5_plane_disable(plane); | |
| 228 | 209 | } else if (to_mdp5_plane_state(state)->mode_changed) { |
| 229 | 210 | int ret; |
| 230 | 211 | to_mdp5_plane_state(state)->pending = true; |
| @@ -602,6 +583,20 @@ uint32_t mdp5_plane_get_flush(struct drm_plane *plane) · 371 unmodified lines | ||
| 602 | 583 | return mdp5_plane->flush_mask; |
| 603 | 584 | } |
| 604 | 585 | |
| 586 | +/* called after vsync in thread context */ | |
| 587 | +void mdp5_plane_complete_commit(struct drm_plane *plane, | |
| 588 | + struct drm_plane_state *state) | |
| 589 | +{ | |
| 590 | + struct mdp5_kms *mdp5_kms = get_kms(plane); | |
| 591 | + struct mdp5_plane *mdp5_plane = to_mdp5_plane(plane); | |
| 592 | + enum mdp5_pipe pipe = mdp5_plane->pipe; | |
| 593 | + | |
| 594 | + if (!plane_enabled(plane->state)) { | |
| 595 | + DBG("%s: free SMP", mdp5_plane->name); | |
| 596 | + mdp5_smp_release(mdp5_kms->smp, pipe); | |
| 597 | + } | |
| 598 | +} | |
| 599 | + | |
| 605 | 600 | /* initialize plane */ |
| 606 | 601 | struct drm_plane *mdp5_plane_init(struct drm_device *dev, |
| 607 | 602 | enum mdp5_pipe pipe, bool private_plane, uint32_t reg_offset) |
| @@ -34,22 +34,44 @@ · 33 unmodified lines | ||
| 34 | 34 | * and CANNOT be re-allocated (eg: MMB0 and MMB1 both tied to RGB0). |
| 35 | 35 | * |
| 36 | 36 | * For each block that can be dynamically allocated, it can be either |
| 37 | − * free, or pending/in-use by a client. The updates happen in three steps: | |
| 37 | + * free: | |
| 38 | + * The block is free. | |
| 39 | + * | |
| 40 | + * pending: | |
| 41 | + * The block is allocated to some client and not free. | |
| 42 | + * | |
| 43 | + * configured: | |
| 44 | + * The block is allocated to some client, and assigned to that | |
| 45 | + * client in MDP5_MDP_SMP_ALLOC registers. | |
| 46 | + * | |
| 47 | + * inuse: | |
| 48 | + * The block is being actively used by a client. | |
| 49 | + * | |
| 50 | + * The updates happen in the following steps: | |
| 38 | 51 | * |
| 39 | 52 | * 1) mdp5_smp_request(): |
| 40 | 53 | * When plane scanout is setup, calculate required number of |
| 41 | − * blocks needed per client, and request. Blocks not inuse or | |
| 42 | − * pending by any other client are added to client's pending | |
| 43 | − * set. | |
| 54 | + * blocks needed per client, and request. Blocks neither inuse nor | |
| 55 | + * configured nor pending by any other client are added to client's | |
| 56 | + * pending set. | |
| 57 | + * For shrinking, blocks in pending but not in configured can be freed | |
| 58 | + * directly, but those already in configured will be freed later by | |
| 59 | + * mdp5_smp_commit. | |
| 44 | 60 | * |
| 45 | 61 | * 2) mdp5_smp_configure(): |
| 46 | 62 | * As hw is programmed, before FLUSH, MDP5_MDP_SMP_ALLOC registers |
| 47 | 63 | * are configured for the union(pending, inuse) |
| 64 | + * Current pending is copied to configured. | |
| 65 | + * It is assumed that mdp5_smp_request and mdp5_smp_configure not run | |
| 66 | + * concurrently for the same pipe. | |
| 48 | 67 | * |
| 49 | 68 | * 3) mdp5_smp_commit(): |
| 50 | − * After next vblank, copy pending -> inuse. Optionally update | |
| 69 | + * After next vblank, copy configured -> inuse. Optionally update | |
| 51 | 70 | * MDP5_SMP_ALLOC registers if there are newly unused blocks |
| 52 | 71 | * |
| 72 | + * 4) mdp5_smp_release(): | |
| 73 | + * Must be called after the pipe is disabled and no longer uses any SMB | |
| 74 | + * | |
| 53 | 75 | * On the next vblank after changes have been committed to hw, the |
| 54 | 76 | * client's pending blocks become it's in-use blocks (and no-longer |
| 55 | 77 | * in-use blocks become available to other clients). |
| @@ -77,6 +99,9 @@ struct mdp5_smp { · 21 unmodified lines | ||
| 77 | 99 | struct mdp5_client_smp_state client_state[MAX_CLIENTS]; |
| 78 | 100 | }; |
| 79 | 101 | |
| 102 | +static void update_smp_state(struct mdp5_smp *smp, | |
| 103 | + u32 cid, mdp5_smp_state_t *assigned); | |
| 104 | + | |
| 80 | 105 | static inline |
| 81 | 106 | struct mdp5_kms *get_kms(struct mdp5_smp *smp) |
| 82 | 107 | { |
| @@ -149,7 +174,12 @@ static int smp_request_block(struct mdp5_smp *smp, · 66 unmodified lines | ||
| 149 | 174 | for (i = cur_nblks; i > nblks; i--) { |
| 150 | 175 | int blk = find_first_bit(ps->pending, cnt); |
| 151 | 176 | clear_bit(blk, ps->pending); |
| 152 | − /* don't clear in global smp_state until _commit() */ | |
| 177 | + | |
| 178 | + /* clear in global smp_state if not in configured | |
| 179 | + * otherwise until _commit() | |
| 180 | + */ | |
| 181 | + if (!test_bit(blk, ps->configured)) | |
| 182 | + clear_bit(blk, smp->state); | |
| 153 | 183 | } |
| 154 | 184 | } |
| 155 | 185 | |
| @@ -223,10 +253,33 @@ int mdp5_smp_request(struct mdp5_smp *smp, enum mdp5_pipe pipe, u32 fmt, u32 wid · 67 unmodified lines | ||
| 223 | 253 | /* Release SMP blocks for all clients of the pipe */ |
| 224 | 254 | void mdp5_smp_release(struct mdp5_smp *smp, enum mdp5_pipe pipe) |
| 225 | 255 | { |
| 226 | − int i, nblks; | |
| 256 | + int i; | |
| 257 | + unsigned long flags; | |
| 258 | + int cnt = smp->blk_cnt; | |
| 259 | + | |
| 260 | + for (i = 0; i < pipe2nclients(pipe); i++) { | |
| 261 | + mdp5_smp_state_t assigned; | |
| 262 | + u32 cid = pipe2client(pipe, i); | |
| 263 | + struct mdp5_client_smp_state *ps = &smp->client_state[cid]; | |
| 264 | + | |
| 265 | + spin_lock_irqsave(&smp->state_lock, flags); | |
| 266 | + | |
| 267 | + /* clear hw assignment */ | |
| 268 | + bitmap_or(assigned, ps->inuse, ps->configured, cnt); | |
| 269 | + update_smp_state(smp, CID_UNUSED, &assigned); | |
| 270 | + | |
| 271 | + /* free to global pool */ | |
| 272 | + bitmap_andnot(smp->state, smp->state, ps->pending, cnt); | |
| 273 | + bitmap_andnot(smp->state, smp->state, assigned, cnt); | |
| 274 | + | |
| 275 | + /* clear client's infor */ | |
| 276 | + bitmap_zero(ps->pending, cnt); | |
| 277 | + bitmap_zero(ps->configured, cnt); | |
| 278 | + bitmap_zero(ps->inuse, cnt); | |
| 279 | + | |
| 280 | + spin_unlock_irqrestore(&smp->state_lock, flags); | |
| 281 | + } | |
| 227 | 282 | |
| 228 | − for (i = 0, nblks = 0; i < pipe2nclients(pipe); i++) | |
| 229 | − smp_request_block(smp, pipe2client(pipe, i), 0); | |
| 230 | 283 | set_fifo_thresholds(smp, pipe, 0); |
| 231 | 284 | } |
| 232 | 285 | |
| @@ -274,12 +327,20 @@ void mdp5_smp_configure(struct mdp5_smp *smp, enum mdp5_pipe pipe) · 41 unmodified lines | ||
| 274 | 327 | u32 cid = pipe2client(pipe, i); |
| 275 | 328 | struct mdp5_client_smp_state *ps = &smp->client_state[cid]; |
| 276 | 329 | |
| 277 | − bitmap_or(assigned, ps->inuse, ps->pending, cnt); | |
| 330 | + /* | |
| 331 | + * if vblank has not happened since last smp_configure | |
| 332 | + * skip the configure for now | |
| 333 | + */ | |
| 334 | + if (!bitmap_equal(ps->inuse, ps->configured, cnt)) | |
| 335 | + continue; | |
| 336 | + | |
| 337 | + bitmap_copy(ps->configured, ps->pending, cnt); | |
| 338 | + bitmap_or(assigned, ps->inuse, ps->configured, cnt); | |
| 278 | 339 | update_smp_state(smp, cid, &assigned); |
| 279 | 340 | } |
| 280 | 341 | } |
| 281 | 342 | |
| 282 | −/* step #3: after vblank, copy pending -> inuse: */ | |
| 343 | +/* step #3: after vblank, copy configured -> inuse: */ | |
| 283 | 344 | void mdp5_smp_commit(struct mdp5_smp *smp, enum mdp5_pipe pipe) |
| 284 | 345 | { |
| 285 | 346 | int cnt = smp->blk_cnt; |
| @@ -295,7 +356,7 @@ void mdp5_smp_commit(struct mdp5_smp *smp, enum mdp5_pipe pipe) · 9 unmodified lines | ||
| 295 | 356 | * using, which can be released and made available to other |
| 296 | 357 | * clients: |
| 297 | 358 | */ |
| 298 | − if (bitmap_andnot(released, ps->inuse, ps->pending, cnt)) { | |
| 359 | + if (bitmap_andnot(released, ps->inuse, ps->configured, cnt)) { | |
| 299 | 360 | unsigned long flags; |
| 300 | 361 | |
| 301 | 362 | spin_lock_irqsave(&smp->state_lock, flags); |
| @@ -306,7 +367,7 @@ void mdp5_smp_commit(struct mdp5_smp *smp, enum mdp5_pipe pipe) · 4 unmodified lines | ||
| 306 | 367 | update_smp_state(smp, CID_UNUSED, &released); |
| 307 | 368 | } |
| 308 | 369 | |
| 309 | − bitmap_copy(ps->inuse, ps->pending, cnt); | |
| 370 | + bitmap_copy(ps->inuse, ps->configured, cnt); | |
| 310 | 371 | } |
| 311 | 372 | } |
| 312 | 373 | |
| @@ -23,6 +23,7 @@ · 22 unmodified lines | ||
| 23 | 23 | |
| 24 | 24 | struct mdp5_client_smp_state { |
| 25 | 25 | mdp5_smp_state_t inuse; |
| 26 | + mdp5_smp_state_t configured; | |
| 26 | 27 | mdp5_smp_state_t pending; |
| 27 | 28 | }; |
| 28 | 29 | |
| @@ -283,12 +283,8 @@ int msm_atomic_commit(struct drm_device *dev, · 282 unmodified lines | ||
| 283 | 283 | |
| 284 | 284 | timeout = ktime_add_ms(ktime_get(), 1000); |
| 285 | 285 | |
| 286 | − ret = msm_wait_fence_interruptable(dev, c->fence, &timeout); | |
| 287 | − if (ret) { | |
| 288 | − WARN_ON(ret); // TODO unswap state back? or?? | |
| 289 | − commit_destroy(c); | |
| 290 | − return ret; | |
| 291 | − } | |
| 286 | + /* uninterruptible wait */ | |
| 287 | + msm_wait_fence(dev, c->fence, &timeout, false); | |
| 292 | 288 | |
| 293 | 289 | complete_commit(c); |
| 294 | 290 | |
| @@ -637,8 +637,8 @@ static void msm_debugfs_cleanup(struct drm_minor *minor) · 636 unmodified lines | ||
| 637 | 637 | * Fences: |
| 638 | 638 | */ |
| 639 | 639 | |
| 640 | −int msm_wait_fence_interruptable(struct drm_device *dev, uint32_t fence, | |
| 641 | − ktime_t *timeout) | |
| 640 | +int msm_wait_fence(struct drm_device *dev, uint32_t fence, | |
| 641 | + ktime_t *timeout , bool interruptible) | |
| 642 | 642 | { |
| 643 | 643 | struct msm_drm_private *priv = dev->dev_private; |
| 644 | 644 | int ret; |
| @@ -667,7 +667,12 @@ int msm_wait_fence_interruptable(struct drm_device *dev, uint32_t fence, · 22 unmodified lines | ||
| 667 | 667 | remaining_jiffies = timespec_to_jiffies(&ts); |
| 668 | 668 | } |
| 669 | 669 | |
| 670 | − ret = wait_event_interruptible_timeout(priv->fence_event, | |
| 670 | + if (interruptible) | |
| 671 | + ret = wait_event_interruptible_timeout(priv->fence_event, | |
| 672 | + fence_completed(dev, fence), | |
| 673 | + remaining_jiffies); | |
| 674 | + else | |
| 675 | + ret = wait_event_timeout(priv->fence_event, | |
| 671 | 676 | fence_completed(dev, fence), |
| 672 | 677 | remaining_jiffies); |
| 673 | 678 | |
| @@ -853,7 +858,7 @@ static int msm_ioctl_wait_fence(struct drm_device *dev, void *data, · 179 unmodified lines | ||
| 853 | 858 | return -EINVAL; |
| 854 | 859 | } |
| 855 | 860 | |
| 856 | − return msm_wait_fence_interruptable(dev, args->fence, &timeout); | |
| 861 | + return msm_wait_fence(dev, args->fence, &timeout, true); | |
| 857 | 862 | } |
| 858 | 863 | |
| 859 | 864 | static const struct drm_ioctl_desc msm_ioctls[] = { |
| @@ -164,8 +164,8 @@ int msm_atomic_commit(struct drm_device *dev, · 163 unmodified lines | ||
| 164 | 164 | |
| 165 | 165 | int msm_register_mmu(struct drm_device *dev, struct msm_mmu *mmu); |
| 166 | 166 | |
| 167 | −int msm_wait_fence_interruptable(struct drm_device *dev, uint32_t fence, | |
| 168 | − ktime_t *timeout); | |
| 167 | +int msm_wait_fence(struct drm_device *dev, uint32_t fence, | |
| 168 | + ktime_t *timeout, bool interruptible); | |
| 169 | 169 | int msm_queue_fence_cb(struct drm_device *dev, |
| 170 | 170 | struct msm_fence_cb *cb, uint32_t fence); |
| 171 | 171 | void msm_update_fence(struct drm_device *dev, uint32_t fence); |
| @@ -460,7 +460,7 @@ int msm_gem_cpu_prep(struct drm_gem_object *obj, uint32_t op, ktime_t *timeout) · 459 unmodified lines | ||
| 460 | 460 | if (op & MSM_PREP_NOSYNC) |
| 461 | 461 | timeout = NULL; |
| 462 | 462 | |
| 463 | − ret = msm_wait_fence_interruptable(dev, fence, timeout); | |
| 463 | + ret = msm_wait_fence(dev, fence, timeout, true); | |
| 464 | 464 | } |
| 465 | 465 | |
| 466 | 466 | /* TODO cache maintenance */ |
| @@ -23,8 +23,12 @@ · 22 unmodified lines | ||
| 23 | 23 | struct sg_table *msm_gem_prime_get_sg_table(struct drm_gem_object *obj) |
| 24 | 24 | { |
| 25 | 25 | struct msm_gem_object *msm_obj = to_msm_bo(obj); |
| 26 | − BUG_ON(!msm_obj->sgt); /* should have already pinned! */ | |
| 27 | − return msm_obj->sgt; | |
| 26 | + int npages = obj->size >> PAGE_SHIFT; | |
| 27 | + | |
| 28 | + if (WARN_ON(!msm_obj->pages)) /* should have already pinned! */ | |
| 29 | + return NULL; | |
| 30 | + | |
| 31 | + return drm_prime_pages_to_sg(msm_obj->pages, npages); | |
| 28 | 32 | } |
| 29 | 33 | |
| 30 | 34 | void *msm_gem_prime_vmap(struct drm_gem_object *obj) |
| @@ -128,6 +128,7 @@ nouveau_cli_destroy(struct nouveau_cli *cli) · 127 unmodified lines | ||
| 128 | 128 | nvkm_vm_ref(NULL, &nvxx_client(&cli->base)->vm, NULL); |
| 129 | 129 | nvif_client_fini(&cli->base); |
| 130 | 130 | usif_client_fini(cli); |
| 131 | + kfree(cli); | |
| 131 | 132 | } |
| 132 | 133 | |
| 133 | 134 | static void |
| @@ -865,8 +866,10 @@ nouveau_drm_preclose(struct drm_device *dev, struct drm_file *fpriv) · 731 unmodified lines | ||
| 865 | 866 | |
| 866 | 867 | pm_runtime_get_sync(dev->dev); |
| 867 | 868 | |
| 869 | + mutex_lock(&cli->mutex); | |
| 868 | 870 | if (cli->abi16) |
| 869 | 871 | nouveau_abi16_fini(cli->abi16); |
| 872 | + mutex_unlock(&cli->mutex); | |
| 870 | 873 | |
| 871 | 874 | mutex_lock(&drm->client.mutex); |
| 872 | 875 | list_del(&cli->head); |
| @@ -92,6 +92,8 @@ static int nouveau_platform_power_down(struct nouveau_platform_gpu *gpu) · 91 unmodified lines | ||
| 92 | 92 | return 0; |
| 93 | 93 | } |
| 94 | 94 | |
| 95 | +#if IS_ENABLED(CONFIG_IOMMU_API) | |
| 96 | + | |
| 95 | 97 | static void nouveau_platform_probe_iommu(struct device *dev, |
| 96 | 98 | struct nouveau_platform_gpu *gpu) |
| 97 | 99 | { |
| @@ -158,6 +160,20 @@ static void nouveau_platform_remove_iommu(struct device *dev, · 60 unmodified lines | ||
| 158 | 160 | } |
| 159 | 161 | } |
| 160 | 162 | |
| 163 | +#else | |
| 164 | + | |
| 165 | +static void nouveau_platform_probe_iommu(struct device *dev, | |
| 166 | + struct nouveau_platform_gpu *gpu) | |
| 167 | +{ | |
| 168 | +} | |
| 169 | + | |
| 170 | +static void nouveau_platform_remove_iommu(struct device *dev, | |
| 171 | + struct nouveau_platform_gpu *gpu) | |
| 172 | +{ | |
| 173 | +} | |
| 174 | + | |
| 175 | +#endif | |
| 176 | + | |
| 161 | 177 | static int nouveau_platform_probe(struct platform_device *pdev) |
| 162 | 178 | { |
| 163 | 179 | struct nouveau_platform_gpu *gpu; |
| @@ -175,15 +175,24 @@ nouveau_gart_manager_new(struct ttm_mem_type_manager *man, · 174 unmodified lines | ||
| 175 | 175 | node->page_shift = 12; |
| 176 | 176 | |
| 177 | 177 | switch (drm->device.info.family) { |
| 178 | + case NV_DEVICE_INFO_V0_TNT: | |
| 179 | + case NV_DEVICE_INFO_V0_CELSIUS: | |
| 180 | + case NV_DEVICE_INFO_V0_KELVIN: | |
| 181 | + case NV_DEVICE_INFO_V0_RANKINE: | |
| 182 | + case NV_DEVICE_INFO_V0_CURIE: | |
| 183 | + break; | |
| 178 | 184 | case NV_DEVICE_INFO_V0_TESLA: |
| 179 | 185 | if (drm->device.info.chipset != 0x50) |
| 180 | 186 | node->memtype = (nvbo->tile_flags & 0x7f00) >> 8; |
| 181 | 187 | break; |
| 182 | 188 | case NV_DEVICE_INFO_V0_FERMI: |
| 183 | 189 | case NV_DEVICE_INFO_V0_KEPLER: |
| 190 | + case NV_DEVICE_INFO_V0_MAXWELL: | |
| 184 | 191 | node->memtype = (nvbo->tile_flags & 0xff00) >> 8; |
| 185 | 192 | break; |
| 186 | 193 | default: |
| 194 | + NV_WARN(drm, "%s: unhandled family type %x\n", __func__, | |
| 195 | + drm->device.info.family); | |
| 187 | 196 | break; |
| 188 | 197 | } |
| 189 | 198 | |
| @@ -203,7 +203,7 @@ nv04_fbcon_accel_init(struct fb_info *info) · 202 unmodified lines | ||
| 203 | 203 | if (ret) |
| 204 | 204 | return ret; |
| 205 | 205 | |
| 206 | − if (RING_SPACE(chan, 49)) { | |
| 206 | + if (RING_SPACE(chan, 49 + (device->info.chipset >= 0x11 ? 4 : 0))) { | |
| 207 | 207 | nouveau_fbcon_gpu_lockup(info); |
| 208 | 208 | return 0; |
| 209 | 209 | } |
| @@ -979,7 +979,7 @@ nv50_crtc_cursor_show_hide(struct nouveau_crtc *nv_crtc, bool show, bool update) · 978 unmodified lines | ||
| 979 | 979 | { |
| 980 | 980 | struct nv50_mast *mast = nv50_mast(nv_crtc->base.dev); |
| 981 | 981 | |
| 982 | − if (show && nv_crtc->cursor.nvbo) | |
| 982 | + if (show && nv_crtc->cursor.nvbo && nv_crtc->base.enabled) | |
| 983 | 983 | nv50_crtc_cursor_show(nv_crtc); |
| 984 | 984 | else |
| 985 | 985 | nv50_crtc_cursor_hide(nv_crtc); |
| @@ -188,7 +188,7 @@ nv50_fbcon_accel_init(struct fb_info *info) · 187 unmodified lines | ||
| 188 | 188 | if (ret) |
| 189 | 189 | return ret; |
| 190 | 190 | |
| 191 | − ret = RING_SPACE(chan, 59); | |
| 191 | + ret = RING_SPACE(chan, 58); | |
| 192 | 192 | if (ret) { |
| 193 | 193 | nouveau_fbcon_gpu_lockup(info); |
| 194 | 194 | return ret; |
| @@ -252,6 +252,7 @@ nv50_fbcon_accel_init(struct fb_info *info) · 57 unmodified lines | ||
| 252 | 252 | OUT_RING(chan, info->var.yres_virtual); |
| 253 | 253 | OUT_RING(chan, upper_32_bits(fb->vma.offset)); |
| 254 | 254 | OUT_RING(chan, lower_32_bits(fb->vma.offset)); |
| 255 | + FIRE_RING(chan); | |
| 255 | 256 | |
| 256 | 257 | return 0; |
| 257 | 258 | } |
| @@ -188,7 +188,7 @@ nvc0_fbcon_accel_init(struct fb_info *info) · 187 unmodified lines | ||
| 188 | 188 | return -EINVAL; |
| 189 | 189 | } |
| 190 | 190 | |
| 191 | − ret = RING_SPACE(chan, 60); | |
| 191 | + ret = RING_SPACE(chan, 58); | |
| 192 | 192 | if (ret) { |
| 193 | 193 | WARN_ON(1); |
| 194 | 194 | nouveau_fbcon_gpu_lockup(info); |
| @@ -809,7 +809,7 @@ exec_lookup(struct nv50_disp_priv *priv, int head, int or, u32 ctrl, · 808 unmodified lines | ||
| 809 | 809 | case 0x00000900: type = DCB_OUTPUT_DP; mask = 2; break; |
| 810 | 810 | default: |
| 811 | 811 | nv_error(priv, "unknown SOR mc 0x%08x\n", ctrl); |
| 812 | − return 0x0000; | |
| 812 | + return NULL; | |
| 813 | 813 | } |
| 814 | 814 | } |
| 815 | 815 | |
| @@ -663,6 +663,37 @@ gf100_gr_zbc_init(struct gf100_gr_priv *priv) · 662 unmodified lines | ||
| 663 | 663 | gf100_gr_zbc_clear_depth(priv, index); |
| 664 | 664 | } |
| 665 | 665 | |
| 666 | +/** | |
| 667 | + * Wait until GR goes idle. GR is considered idle if it is disabled by the | |
| 668 | + * MC (0x200) register, or GR is not busy and a context switch is not in | |
| 669 | + * progress. | |
| 670 | + */ | |
| 671 | +int | |
| 672 | +gf100_gr_wait_idle(struct gf100_gr_priv *priv) | |
| 673 | +{ | |
| 674 | + unsigned long end_jiffies = jiffies + msecs_to_jiffies(2000); | |
| 675 | + bool gr_enabled, ctxsw_active, gr_busy; | |
| 676 | + | |
| 677 | + do { | |
| 678 | + /* | |
| 679 | + * required to make sure FIFO_ENGINE_STATUS (0x2640) is | |
| 680 | + * up-to-date | |
| 681 | + */ | |
| 682 | + nv_rd32(priv, 0x400700); | |
| 683 | + | |
| 684 | + gr_enabled = nv_rd32(priv, 0x200) & 0x1000; | |
| 685 | + ctxsw_active = nv_rd32(priv, 0x2640) & 0x8000; | |
| 686 | + gr_busy = nv_rd32(priv, 0x40060c) & 0x1; | |
| 687 | + | |
| 688 | + if (!gr_enabled || (!gr_busy && !ctxsw_active)) | |
| 689 | + return 0; | |
| 690 | + } while (time_before(jiffies, end_jiffies)); | |
| 691 | + | |
| 692 | + nv_error(priv, "wait for idle timeout (en: %d, ctxsw: %d, busy: %d)\n", | |
| 693 | + gr_enabled, ctxsw_active, gr_busy); | |
| 694 | + return -EAGAIN; | |
| 695 | +} | |
| 696 | + | |
| 666 | 697 | void |
| 667 | 698 | gf100_gr_mmio(struct gf100_gr_priv *priv, const struct gf100_gr_pack *p) |
| 668 | 699 | { |
| @@ -699,7 +730,13 @@ gf100_gr_icmd(struct gf100_gr_priv *priv, const struct gf100_gr_pack *p) · 30 unmodified lines | ||
| 699 | 730 | |
| 700 | 731 | while (addr < next) { |
| 701 | 732 | nv_wr32(priv, 0x400200, addr); |
| 702 | − nv_wait(priv, 0x400700, 0x00000002, 0x00000000); | |
| 733 | + /** | |
| 734 | + * Wait for GR to go idle after submitting a | |
| 735 | + * GO_IDLE bundle | |
| 736 | + */ | |
| 737 | + if ((addr & 0xffff) == 0xe100) | |
| 738 | + gf100_gr_wait_idle(priv); | |
| 739 | + nv_wait(priv, 0x400700, 0x00000004, 0x00000000); | |
| 703 | 740 | addr += init->pitch; |
| 704 | 741 | } |
| 705 | 742 | } |
| @@ -181,6 +181,7 @@ struct gf100_gr_oclass { · 180 unmodified lines | ||
| 181 | 181 | int ppc_nr; |
| 182 | 182 | }; |
| 183 | 183 | |
| 184 | +int gf100_gr_wait_idle(struct gf100_gr_priv *); | |
| 184 | 185 | void gf100_gr_mmio(struct gf100_gr_priv *, const struct gf100_gr_pack *); |
| 185 | 186 | void gf100_gr_icmd(struct gf100_gr_priv *, const struct gf100_gr_pack *); |
| 186 | 187 | void gf100_gr_mthd(struct gf100_gr_priv *, const struct gf100_gr_pack *); |
| @@ -332,9 +332,12 @@ static void · 331 unmodified lines | ||
| 332 | 332 | nvkm_perfctx_dtor(struct nvkm_object *object) |
| 333 | 333 | { |
| 334 | 334 | struct nvkm_pm *ppm = (void *)object->engine; |
| 335 | + struct nvkm_perfctx *ctx = (void *)object; | |
| 336 | + | |
| 335 | 337 | mutex_lock(&nv_subdev(ppm)->mutex); |
| 336 | − nvkm_engctx_destroy(&ppm->context->base); | |
| 337 | − ppm->context = NULL; | |
| 338 | + nvkm_engctx_destroy(&ctx->base); | |
| 339 | + if (ppm->context == ctx) | |
| 340 | + ppm->context = NULL; | |
| 338 | 341 | mutex_unlock(&nv_subdev(ppm)->mutex); |
| 339 | 342 | } |
| 340 | 343 | |
| @@ -355,12 +358,11 @@ nvkm_perfctx_ctor(struct nvkm_object *parent, struct nvkm_object *engine, · 14 unmodified lines | ||
| 355 | 358 | mutex_lock(&nv_subdev(ppm)->mutex); |
| 356 | 359 | if (ppm->context == NULL) |
| 357 | 360 | ppm->context = ctx; |
| 358 | − mutex_unlock(&nv_subdev(ppm)->mutex); | |
| 359 | − | |
| 360 | 361 | if (ctx != ppm->context) |
| 361 | − return -EBUSY; | |
| 362 | + ret = -EBUSY; | |
| 363 | + mutex_unlock(&nv_subdev(ppm)->mutex); | |
| 362 | 364 | |
| 363 | − return 0; | |
| 365 | + return ret; | |
| 364 | 366 | } |
| 365 | 367 | |
| 366 | 368 | struct nvkm_oclass |
| @@ -1284,6 +1284,44 @@ init_zm_reg_sequence(struct nvbios_init *init) · 1283 unmodified lines | ||
| 1284 | 1284 | } |
| 1285 | 1285 | } |
| 1286 | 1286 | |
| 1287 | +/** | |
| 1288 | + * INIT_PLL_INDIRECT - opcode 0x59 | |
| 1289 | + * | |
| 1290 | + */ | |
| 1291 | +static void | |
| 1292 | +init_pll_indirect(struct nvbios_init *init) | |
| 1293 | +{ | |
| 1294 | + struct nvkm_bios *bios = init->bios; | |
| 1295 | + u32 reg = nv_ro32(bios, init->offset + 1); | |
| 1296 | + u16 addr = nv_ro16(bios, init->offset + 5); | |
| 1297 | + u32 freq = (u32)nv_ro16(bios, addr) * 1000; | |
| 1298 | + | |
| 1299 | + trace("PLL_INDIRECT\tR[0x%06x] =PLL= VBIOS[%04x] = %dkHz\n", | |
| 1300 | + reg, addr, freq); | |
| 1301 | + init->offset += 7; | |
| 1302 | + | |
| 1303 | + init_prog_pll(init, reg, freq); | |
| 1304 | +} | |
| 1305 | + | |
| 1306 | +/** | |
| 1307 | + * INIT_ZM_REG_INDIRECT - opcode 0x5a | |
| 1308 | + * | |
| 1309 | + */ | |
| 1310 | +static void | |
| 1311 | +init_zm_reg_indirect(struct nvbios_init *init) | |
| 1312 | +{ | |
| 1313 | + struct nvkm_bios *bios = init->bios; | |
| 1314 | + u32 reg = nv_ro32(bios, init->offset + 1); | |
| 1315 | + u16 addr = nv_ro16(bios, init->offset + 5); | |
| 1316 | + u32 data = nv_ro32(bios, addr); | |
| 1317 | + | |
| 1318 | + trace("ZM_REG_INDIRECT\tR[0x%06x] = VBIOS[0x%04x] = 0x%08x\n", | |
| 1319 | + reg, addr, data); | |
| 1320 | + init->offset += 7; | |
| 1321 | + | |
| 1322 | + init_wr32(init, addr, data); | |
| 1323 | +} | |
| 1324 | + | |
| 1287 | 1325 | /** |
| 1288 | 1326 | * INIT_SUB_DIRECT - opcode 0x5b |
| 1289 | 1327 | * |
| @@ -2145,6 +2183,8 @@ static struct nvbios_init_opcode { · 855 unmodified lines | ||
| 2145 | 2183 | [0x56] = { init_condition_time }, |
| 2146 | 2184 | [0x57] = { init_ltime }, |
| 2147 | 2185 | [0x58] = { init_zm_reg_sequence }, |
| 2186 | + [0x59] = { init_pll_indirect }, | |
| 2187 | + [0x5a] = { init_zm_reg_indirect }, | |
| 2148 | 2188 | [0x5b] = { init_sub_direct }, |
| 2149 | 2189 | [0x5c] = { init_jump }, |
| 2150 | 2190 | [0x5e] = { init_i2c_if }, |
| @@ -180,7 +180,8 @@ gt215_clk_info(struct nvkm_clk *clock, int clk, u32 khz, · 179 unmodified lines | ||
| 180 | 180 | struct gt215_clk_info *info) |
| 181 | 181 | { |
| 182 | 182 | struct gt215_clk_priv *priv = (void *)clock; |
| 183 | − u32 oclk, sclk, sdiv, diff; | |
| 183 | + u32 oclk, sclk, sdiv; | |
| 184 | + s32 diff; | |
| 184 | 185 | |
| 185 | 186 | info->clk = 0; |
| 186 | 187 | |
| @@ -38,6 +38,14 @@ gk20a_ibus_init_priv_ring(struct gk20a_ibus_priv *priv) · 37 unmodified lines | ||
| 38 | 38 | nv_wr32(priv, 0x12004c, 0x4); |
| 39 | 39 | nv_wr32(priv, 0x122204, 0x2); |
| 40 | 40 | nv_rd32(priv, 0x122204); |
| 41 | + | |
| 42 | + /* | |
| 43 | + * Bug: increase clock timeout to avoid operation failure at high | |
| 44 | + * gpcclk rate. | |
| 45 | + */ | |
| 46 | + nv_wr32(priv, 0x122354, 0x800); | |
| 47 | + nv_wr32(priv, 0x128328, 0x800); | |
| 48 | + nv_wr32(priv, 0x124320, 0x800); | |
| 41 | 49 | } |
| 42 | 50 | |
| 43 | 51 | static void |
| @@ -50,7 +50,12 @@ nv04_instobj_dtor(struct nvkm_object *object) · 49 unmodified lines | ||
| 50 | 50 | { |
| 51 | 51 | struct nv04_instmem_priv *priv = (void *)nvkm_instmem(object); |
| 52 | 52 | struct nv04_instobj_priv *node = (void *)object; |
| 53 | + struct nvkm_subdev *subdev = (void *)priv; | |
| 54 | + | |
| 55 | + mutex_lock(&subdev->mutex); | |
| 53 | 56 | nvkm_mm_free(&priv->heap, &node->mem); |
| 57 | + mutex_unlock(&subdev->mutex); | |
| 58 | + | |
| 54 | 59 | nvkm_instobj_destroy(&node->base); |
| 55 | 60 | } |
| 56 | 61 | |
| @@ -62,6 +67,7 @@ nv04_instobj_ctor(struct nvkm_object *parent, struct nvkm_object *engine, · 5 unmodified lines | ||
| 62 | 67 | struct nv04_instmem_priv *priv = (void *)nvkm_instmem(parent); |
| 63 | 68 | struct nv04_instobj_priv *node; |
| 64 | 69 | struct nvkm_instobj_args *args = data; |
| 70 | + struct nvkm_subdev *subdev = (void *)priv; | |
| 65 | 71 | int ret; |
| 66 | 72 | |
| 67 | 73 | if (!args->align) |
| @@ -72,8 +78,10 @@ nv04_instobj_ctor(struct nvkm_object *parent, struct nvkm_object *engine, · 4 unmodified lines | ||
| 72 | 78 | if (ret) |
| 73 | 79 | return ret; |
| 74 | 80 | |
| 81 | + mutex_lock(&subdev->mutex); | |
| 75 | 82 | ret = nvkm_mm_head(&priv->heap, 0, 1, args->size, args->size, |
| 76 | 83 | args->align, &node->mem); |
| 84 | + mutex_unlock(&subdev->mutex); | |
| 77 | 85 | if (ret) |
| 78 | 86 | return ret; |
| 79 | 87 | |
| @@ -2299,8 +2299,7 @@ radeon_atom_encoder_mode_set(struct drm_encoder *encoder, · 2298 unmodified lines | ||
| 2299 | 2299 | encoder_mode = atombios_get_encoder_mode(encoder); |
| 2300 | 2300 | if (connector && (radeon_audio != 0) && |
| 2301 | 2301 | ((encoder_mode == ATOM_ENCODER_MODE_HDMI) || |
| 2302 | − (ENCODER_MODE_IS_DP(encoder_mode) && | |
| 2303 | − drm_detect_monitor_audio(radeon_connector_edid(connector))))) | |
| 2302 | + ENCODER_MODE_IS_DP(encoder_mode))) | |
| 2304 | 2303 | radeon_audio_mode_set(encoder, adjusted_mode); |
| 2305 | 2304 | } |
| 2306 | 2305 | |
| @@ -93,30 +93,26 @@ void dce6_afmt_select_pin(struct drm_encoder *encoder) · 92 unmodified lines | ||
| 93 | 93 | struct radeon_device *rdev = encoder->dev->dev_private; |
| 94 | 94 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); |
| 95 | 95 | struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv; |
| 96 | − u32 offset; | |
| 97 | 96 | |
| 98 | − if (!dig || !dig->afmt || !dig->afmt->pin) | |
| 97 | + if (!dig || !dig->afmt || !dig->pin) | |
| 99 | 98 | return; |
| 100 | 99 | |
| 101 | − offset = dig->afmt->offset; | |
| 102 | − | |
| 103 | − WREG32(AFMT_AUDIO_SRC_CONTROL + offset, | |
| 104 | − AFMT_AUDIO_SRC_SELECT(dig->afmt->pin->id)); | |
| 100 | + WREG32(AFMT_AUDIO_SRC_CONTROL + dig->afmt->offset, | |
| 101 | + AFMT_AUDIO_SRC_SELECT(dig->pin->id)); | |
| 105 | 102 | } |
| 106 | 103 | |
| 107 | 104 | void dce6_afmt_write_latency_fields(struct drm_encoder *encoder, |
| 108 | − struct drm_connector *connector, struct drm_display_mode *mode) | |
| 105 | + struct drm_connector *connector, | |
| 106 | + struct drm_display_mode *mode) | |
| 109 | 107 | { |
| 110 | 108 | struct radeon_device *rdev = encoder->dev->dev_private; |
| 111 | 109 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); |
| 112 | 110 | struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv; |
| 113 | − u32 tmp = 0, offset; | |
| 111 | + u32 tmp = 0; | |
| 114 | 112 | |
| 115 | − if (!dig || !dig->afmt || !dig->afmt->pin) | |
| 113 | + if (!dig || !dig->afmt || !dig->pin) | |
| 116 | 114 | return; |
| 117 | 115 | |
| 118 | − offset = dig->afmt->pin->offset; | |
| 119 | − | |
| 120 | 116 | if (mode->flags & DRM_MODE_FLAG_INTERLACE) { |
| 121 | 117 | if (connector->latency_present[1]) |
| 122 | 118 | tmp = VIDEO_LIPSYNC(connector->video_latency[1]) | |
| @@ -130,24 +126,24 @@ void dce6_afmt_write_latency_fields(struct drm_encoder *encoder, · 7 unmodified lines | ||
| 130 | 126 | else |
| 131 | 127 | tmp = VIDEO_LIPSYNC(0) | AUDIO_LIPSYNC(0); |
| 132 | 128 | } |
| 133 | − WREG32_ENDPOINT(offset, AZ_F0_CODEC_PIN_CONTROL_RESPONSE_LIPSYNC, tmp); | |
| 129 | + WREG32_ENDPOINT(dig->pin->offset, | |
| 130 | + AZ_F0_CODEC_PIN_CONTROL_RESPONSE_LIPSYNC, tmp); | |
| 134 | 131 | } |
| 135 | 132 | |
| 136 | 133 | void dce6_afmt_hdmi_write_speaker_allocation(struct drm_encoder *encoder, |
| 137 | − u8 *sadb, int sad_count) | |
| 134 | + u8 *sadb, int sad_count) | |
| 138 | 135 | { |
| 139 | 136 | struct radeon_device *rdev = encoder->dev->dev_private; |
| 140 | 137 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); |
| 141 | 138 | struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv; |
| 142 | − u32 offset, tmp; | |
| 139 | + u32 tmp; | |
| 143 | 140 | |
| 144 | − if (!dig || !dig->afmt || !dig->afmt->pin) | |
| 141 | + if (!dig || !dig->afmt || !dig->pin) | |
| 145 | 142 | return; |
| 146 | 143 | |
| 147 | − offset = dig->afmt->pin->offset; | |
| 148 | − | |
| 149 | 144 | /* program the speaker allocation */ |
| 150 | − tmp = RREG32_ENDPOINT(offset, AZ_F0_CODEC_PIN_CONTROL_CHANNEL_SPEAKER); | |
| 145 | + tmp = RREG32_ENDPOINT(dig->pin->offset, | |
| 146 | + AZ_F0_CODEC_PIN_CONTROL_CHANNEL_SPEAKER); | |
| 151 | 147 | tmp &= ~(DP_CONNECTION | SPEAKER_ALLOCATION_MASK); |
| 152 | 148 | /* set HDMI mode */ |
| 153 | 149 | tmp |= HDMI_CONNECTION; |
| @@ -155,24 +151,24 @@ void dce6_afmt_hdmi_write_speaker_allocation(struct drm_encoder *encoder, · 1 unmodified line | ||
| 155 | 151 | tmp |= SPEAKER_ALLOCATION(sadb[0]); |
| 156 | 152 | else |
| 157 | 153 | tmp |= SPEAKER_ALLOCATION(5); /* stereo */ |
| 158 | − WREG32_ENDPOINT(offset, AZ_F0_CODEC_PIN_CONTROL_CHANNEL_SPEAKER, tmp); | |
| 154 | + WREG32_ENDPOINT(dig->pin->offset, | |
| 155 | + AZ_F0_CODEC_PIN_CONTROL_CHANNEL_SPEAKER, tmp); | |
| 159 | 156 | } |
| 160 | 157 | |
| 161 | 158 | void dce6_afmt_dp_write_speaker_allocation(struct drm_encoder *encoder, |
| 162 | − u8 *sadb, int sad_count) | |
| 159 | + u8 *sadb, int sad_count) | |
| 163 | 160 | { |
| 164 | 161 | struct radeon_device *rdev = encoder->dev->dev_private; |
| 165 | 162 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); |
| 166 | 163 | struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv; |
| 167 | − u32 offset, tmp; | |
| 164 | + u32 tmp; | |
| 168 | 165 | |
| 169 | − if (!dig || !dig->afmt || !dig->afmt->pin) | |
| 166 | + if (!dig || !dig->afmt || !dig->pin) | |
| 170 | 167 | return; |
| 171 | 168 | |
| 172 | − offset = dig->afmt->pin->offset; | |
| 173 | − | |
| 174 | 169 | /* program the speaker allocation */ |
| 175 | − tmp = RREG32_ENDPOINT(offset, AZ_F0_CODEC_PIN_CONTROL_CHANNEL_SPEAKER); | |
| 170 | + tmp = RREG32_ENDPOINT(dig->pin->offset, | |
| 171 | + AZ_F0_CODEC_PIN_CONTROL_CHANNEL_SPEAKER); | |
| 176 | 172 | tmp &= ~(HDMI_CONNECTION | SPEAKER_ALLOCATION_MASK); |
| 177 | 173 | /* set DP mode */ |
| 178 | 174 | tmp |= DP_CONNECTION; |
| @@ -180,13 +176,13 @@ void dce6_afmt_dp_write_speaker_allocation(struct drm_encoder *encoder, · 1 unmodified line | ||
| 180 | 176 | tmp |= SPEAKER_ALLOCATION(sadb[0]); |
| 181 | 177 | else |
| 182 | 178 | tmp |= SPEAKER_ALLOCATION(5); /* stereo */ |
| 183 | − WREG32_ENDPOINT(offset, AZ_F0_CODEC_PIN_CONTROL_CHANNEL_SPEAKER, tmp); | |
| 179 | + WREG32_ENDPOINT(dig->pin->offset, | |
| 180 | + AZ_F0_CODEC_PIN_CONTROL_CHANNEL_SPEAKER, tmp); | |
| 184 | 181 | } |
| 185 | 182 | |
| 186 | 183 | void dce6_afmt_write_sad_regs(struct drm_encoder *encoder, |
| 187 | − struct cea_sad *sads, int sad_count) | |
| 184 | + struct cea_sad *sads, int sad_count) | |
| 188 | 185 | { |
| 189 | − u32 offset; | |
| 190 | 186 | int i; |
| 191 | 187 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); |
| 192 | 188 | struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv; |
| @@ -206,11 +202,9 @@ void dce6_afmt_write_sad_regs(struct drm_encoder *encoder, · 13 unmodified lines | ||
| 206 | 202 | { AZ_F0_CODEC_PIN_CONTROL_AUDIO_DESCRIPTOR13, HDMI_AUDIO_CODING_TYPE_WMA_PRO }, |
| 207 | 203 | }; |
| 208 | 204 | |
| 209 | − if (!dig || !dig->afmt || !dig->afmt->pin) | |
| 205 | + if (!dig || !dig->afmt || !dig->pin) | |
| 210 | 206 | return; |
| 211 | 207 | |
| 212 | − offset = dig->afmt->pin->offset; | |
| 213 | − | |
| 214 | 208 | for (i = 0; i < ARRAY_SIZE(eld_reg_to_type); i++) { |
| 215 | 209 | u32 value = 0; |
| 216 | 210 | u8 stereo_freqs = 0; |
| @@ -237,7 +231,7 @@ void dce6_afmt_write_sad_regs(struct drm_encoder *encoder, · 20 unmodified lines | ||
| 237 | 231 | |
| 238 | 232 | value |= SUPPORTED_FREQUENCIES_STEREO(stereo_freqs); |
| 239 | 233 | |
| 240 | − WREG32_ENDPOINT(offset, eld_reg_to_type[i][0], value); | |
| 234 | + WREG32_ENDPOINT(dig->pin->offset, eld_reg_to_type[i][0], value); | |
| 241 | 235 | } |
| 242 | 236 | } |
| 243 | 237 | |
| @@ -253,7 +247,7 @@ void dce6_audio_enable(struct radeon_device *rdev, · 9 unmodified lines | ||
| 253 | 247 | } |
| 254 | 248 | |
| 255 | 249 | void dce6_hdmi_audio_set_dto(struct radeon_device *rdev, |
| 256 | − struct radeon_crtc *crtc, unsigned int clock) | |
| 250 | + struct radeon_crtc *crtc, unsigned int clock) | |
| 257 | 251 | { |
| 258 | 252 | /* Two dtos; generally use dto0 for HDMI */ |
| 259 | 253 | u32 value = 0; |
| @@ -272,7 +266,7 @@ void dce6_hdmi_audio_set_dto(struct radeon_device *rdev, · 12 unmodified lines | ||
| 272 | 266 | } |
| 273 | 267 | |
| 274 | 268 | void dce6_dp_audio_set_dto(struct radeon_device *rdev, |
| 275 | − struct radeon_crtc *crtc, unsigned int clock) | |
| 269 | + struct radeon_crtc *crtc, unsigned int clock) | |
| 276 | 270 | { |
| 277 | 271 | /* Two dtos; generally use dto1 for DP */ |
| 278 | 272 | u32 value = 0; |
| @@ -245,6 +245,28 @@ static struct radeon_audio_funcs dce6_dp_funcs = { · 244 unmodified lines | ||
| 245 | 245 | static void radeon_audio_enable(struct radeon_device *rdev, |
| 246 | 246 | struct r600_audio_pin *pin, u8 enable_mask) |
| 247 | 247 | { |
| 248 | + struct drm_encoder *encoder; | |
| 249 | + struct radeon_encoder *radeon_encoder; | |
| 250 | + struct radeon_encoder_atom_dig *dig; | |
| 251 | + int pin_count = 0; | |
| 252 | + | |
| 253 | + if (!pin) | |
| 254 | + return; | |
| 255 | + | |
| 256 | + if (rdev->mode_info.mode_config_initialized) { | |
| 257 | + list_for_each_entry(encoder, &rdev->ddev->mode_config.encoder_list, head) { | |
| 258 | + if (radeon_encoder_is_digital(encoder)) { | |
| 259 | + radeon_encoder = to_radeon_encoder(encoder); | |
| 260 | + dig = radeon_encoder->enc_priv; | |
| 261 | + if (dig->pin == pin) | |
| 262 | + pin_count++; | |
| 263 | + } | |
| 264 | + } | |
| 265 | + | |
| 266 | + if ((pin_count > 1) && (enable_mask == 0)) | |
| 267 | + return; | |
| 268 | + } | |
| 269 | + | |
| 248 | 270 | if (rdev->audio.funcs->enable) |
| 249 | 271 | rdev->audio.funcs->enable(rdev, pin, enable_mask); |
| 250 | 272 | } |
| @@ -336,24 +358,13 @@ void radeon_audio_endpoint_wreg(struct radeon_device *rdev, u32 offset, · 85 unmodified lines | ||
| 336 | 358 | |
| 337 | 359 | static void radeon_audio_write_sad_regs(struct drm_encoder *encoder) |
| 338 | 360 | { |
| 339 | − struct radeon_encoder *radeon_encoder; | |
| 340 | − struct drm_connector *connector; | |
| 341 | − struct radeon_connector *radeon_connector = NULL; | |
| 361 | + struct drm_connector *connector = radeon_get_connector_for_encoder(encoder); | |
| 362 | + struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); | |
| 342 | 363 | struct cea_sad *sads; |
| 343 | 364 | int sad_count; |
| 344 | 365 | |
| 345 | − list_for_each_entry(connector, | |
| 346 | − &encoder->dev->mode_config.connector_list, head) { | |
| 347 | − if (connector->encoder == encoder) { | |
| 348 | − radeon_connector = to_radeon_connector(connector); | |
| 349 | − break; | |
| 350 | − } | |
| 351 | − } | |
| 352 | − | |
| 353 | − if (!radeon_connector) { | |
| 354 | − DRM_ERROR("Couldn't find encoder's connector\n"); | |
| 366 | + if (!connector) | |
| 355 | 367 | return; |
| 356 | − } | |
| 357 | 368 | |
| 358 | 369 | sad_count = drm_edid_to_sad(radeon_connector_edid(connector), &sads); |
| 359 | 370 | if (sad_count <= 0) { |
| @@ -362,8 +373,6 @@ static void radeon_audio_write_sad_regs(struct drm_encoder *encoder) · 2 unmodified lines | ||
| 362 | 373 | } |
| 363 | 374 | BUG_ON(!sads); |
| 364 | 375 | |
| 365 | − radeon_encoder = to_radeon_encoder(encoder); | |
| 366 | − | |
| 367 | 376 | if (radeon_encoder->audio && radeon_encoder->audio->write_sad_regs) |
| 368 | 377 | radeon_encoder->audio->write_sad_regs(encoder, sads, sad_count); |
| 369 | 378 | |
| @@ -372,27 +381,16 @@ static void radeon_audio_write_sad_regs(struct drm_encoder *encoder) · 2 unmodified lines | ||
| 372 | 381 | |
| 373 | 382 | static void radeon_audio_write_speaker_allocation(struct drm_encoder *encoder) |
| 374 | 383 | { |
| 384 | + struct drm_connector *connector = radeon_get_connector_for_encoder(encoder); | |
| 375 | 385 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); |
| 376 | − struct drm_connector *connector; | |
| 377 | − struct radeon_connector *radeon_connector = NULL; | |
| 378 | 386 | u8 *sadb = NULL; |
| 379 | 387 | int sad_count; |
| 380 | 388 | |
| 381 | − list_for_each_entry(connector, | |
| 382 | − &encoder->dev->mode_config.connector_list, head) { | |
| 383 | − if (connector->encoder == encoder) { | |
| 384 | − radeon_connector = to_radeon_connector(connector); | |
| 385 | − break; | |
| 386 | − } | |
| 387 | − } | |
| 388 | − | |
| 389 | − if (!radeon_connector) { | |
| 390 | − DRM_ERROR("Couldn't find encoder's connector\n"); | |
| 389 | + if (!connector) | |
| 391 | 390 | return; |
| 392 | − } | |
| 393 | 391 | |
| 394 | − sad_count = drm_edid_to_speaker_allocation( | |
| 395 | − radeon_connector_edid(connector), &sadb); | |
| 392 | + sad_count = drm_edid_to_speaker_allocation(radeon_connector_edid(connector), | |
| 393 | + &sadb); | |
| 396 | 394 | if (sad_count < 0) { |
| 397 | 395 | DRM_DEBUG("Couldn't read Speaker Allocation Data Block: %d\n", |
| 398 | 396 | sad_count); |
| @@ -406,26 +404,13 @@ static void radeon_audio_write_speaker_allocation(struct drm_encoder *encoder) · 7 unmodified lines | ||
| 406 | 404 | } |
| 407 | 405 | |
| 408 | 406 | static void radeon_audio_write_latency_fields(struct drm_encoder *encoder, |
| 409 | − struct drm_display_mode *mode) | |
| 407 | + struct drm_display_mode *mode) | |
| 410 | 408 | { |
| 411 | − struct radeon_encoder *radeon_encoder; | |
| 412 | − struct drm_connector *connector; | |
| 413 | − struct radeon_connector *radeon_connector = 0; | |
| 414 | − | |
| 415 | − list_for_each_entry(connector, | |
| 416 | − &encoder->dev->mode_config.connector_list, head) { | |
| 417 | − if (connector->encoder == encoder) { | |
| 418 | − radeon_connector = to_radeon_connector(connector); | |
| 419 | − break; | |
| 420 | − } | |
| 421 | − } | |
| 409 | + struct drm_connector *connector = radeon_get_connector_for_encoder(encoder); | |
| 410 | + struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); | |
| 422 | 411 | |
| 423 | − if (!radeon_connector) { | |
| 424 | − DRM_ERROR("Couldn't find encoder's connector\n"); | |
| 412 | + if (!connector) | |
| 425 | 413 | return; |
| 426 | − } | |
| 427 | − | |
| 428 | − radeon_encoder = to_radeon_encoder(encoder); | |
| 429 | 414 | |
| 430 | 415 | if (radeon_encoder->audio && radeon_encoder->audio->write_latency_fields) |
| 431 | 416 | radeon_encoder->audio->write_latency_fields(encoder, connector, mode); |
| @@ -451,29 +436,23 @@ static void radeon_audio_select_pin(struct drm_encoder *encoder) · 19 unmodified lines | ||
| 451 | 436 | } |
| 452 | 437 | |
| 453 | 438 | void radeon_audio_detect(struct drm_connector *connector, |
| 439 | + struct drm_encoder *encoder, | |
| 454 | 440 | enum drm_connector_status status) |
| 455 | 441 | { |
| 456 | − struct radeon_device *rdev; | |
| 457 | − struct radeon_encoder *radeon_encoder; | |
| 442 | + struct drm_device *dev = connector->dev; | |
| 443 | + struct radeon_device *rdev = dev->dev_private; | |
| 444 | + struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); | |
| 458 | 445 | struct radeon_encoder_atom_dig *dig; |
| 459 | 446 | |
| 460 | − if (!connector || !connector->encoder) | |
| 447 | + if (!radeon_audio_chipset_supported(rdev)) | |
| 461 | 448 | return; |
| 462 | 449 | |
| 463 | − rdev = connector->encoder->dev->dev_private; | |
| 464 | − | |
| 465 | − if (!radeon_audio_chipset_supported(rdev)) | |
| 450 | + if (!radeon_encoder_is_digital(encoder)) | |
| 466 | 451 | return; |
| 467 | 452 | |
| 468 | − radeon_encoder = to_radeon_encoder(connector->encoder); | |
| 469 | 453 | dig = radeon_encoder->enc_priv; |
| 470 | 454 | |
| 471 | 455 | if (status == connector_status_connected) { |
| 472 | − if (!drm_detect_monitor_audio(radeon_connector_edid(connector))) { | |
| 473 | − radeon_encoder->audio = NULL; | |
| 474 | − return; | |
| 475 | − } | |
| 476 | − | |
| 477 | 456 | if (connector->connector_type == DRM_MODE_CONNECTOR_DisplayPort) { |
| 478 | 457 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); |
| 479 | 458 | |
| @@ -486,11 +465,17 @@ void radeon_audio_detect(struct drm_connector *connector, · 6 unmodified lines | ||
| 486 | 465 | radeon_encoder->audio = rdev->audio.hdmi_funcs; |
| 487 | 466 | } |
| 488 | 467 | |
| 489 | − dig->afmt->pin = radeon_audio_get_pin(connector->encoder); | |
| 490 | − radeon_audio_enable(rdev, dig->afmt->pin, 0xf); | |
| 468 | + if (drm_detect_monitor_audio(radeon_connector_edid(connector))) { | |
| 469 | + if (!dig->pin) | |
| 470 | + dig->pin = radeon_audio_get_pin(encoder); | |
| 471 | + radeon_audio_enable(rdev, dig->pin, 0xf); | |
| 472 | + } else { | |
| 473 | + radeon_audio_enable(rdev, dig->pin, 0); | |
| 474 | + dig->pin = NULL; | |
| 475 | + } | |
| 491 | 476 | } else { |
| 492 | − radeon_audio_enable(rdev, dig->afmt->pin, 0); | |
| 493 | − dig->afmt->pin = NULL; | |
| 477 | + radeon_audio_enable(rdev, dig->pin, 0); | |
| 478 | + dig->pin = NULL; | |
| 494 | 479 | } |
| 495 | 480 | } |
| 496 | 481 | |
| @@ -518,29 +503,18 @@ static void radeon_audio_set_dto(struct drm_encoder *encoder, unsigned int clock · 21 unmodified lines | ||
| 518 | 503 | } |
| 519 | 504 | |
| 520 | 505 | static int radeon_audio_set_avi_packet(struct drm_encoder *encoder, |
| 521 | − struct drm_display_mode *mode) | |
| 506 | + struct drm_display_mode *mode) | |
| 522 | 507 | { |
| 523 | 508 | struct radeon_device *rdev = encoder->dev->dev_private; |
| 524 | 509 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); |
| 525 | 510 | struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv; |
| 526 | − struct drm_connector *connector; | |
| 527 | − struct radeon_connector *radeon_connector = NULL; | |
| 511 | + struct drm_connector *connector = radeon_get_connector_for_encoder(encoder); | |
| 528 | 512 | u8 buffer[HDMI_INFOFRAME_HEADER_SIZE + HDMI_AVI_INFOFRAME_SIZE]; |
| 529 | 513 | struct hdmi_avi_infoframe frame; |
| 530 | 514 | int err; |
| 531 | 515 | |
| 532 | − list_for_each_entry(connector, | |
| 533 | − &encoder->dev->mode_config.connector_list, head) { | |
| 534 | − if (connector->encoder == encoder) { | |
| 535 | − radeon_connector = to_radeon_connector(connector); | |
| 536 | − break; | |
| 537 | − } | |
| 538 | − } | |
| 539 | − | |
| 540 | − if (!radeon_connector) { | |
| 541 | − DRM_ERROR("Couldn't find encoder's connector\n"); | |
| 542 | − return -ENOENT; | |
| 543 | − } | |
| 516 | + if (!connector) | |
| 517 | + return -EINVAL; | |
| 544 | 518 | |
| 545 | 519 | err = drm_hdmi_avi_infoframe_from_display_mode(&frame, mode); |
| 546 | 520 | if (err < 0) { |
| @@ -563,8 +537,8 @@ static int radeon_audio_set_avi_packet(struct drm_encoder *encoder, · 16 unmodified lines | ||
| 563 | 537 | return err; |
| 564 | 538 | } |
| 565 | 539 | |
| 566 | − if (dig && dig->afmt && | |
| 567 | − radeon_encoder->audio && radeon_encoder->audio->set_avi_packet) | |
| 540 | + if (dig && dig->afmt && radeon_encoder->audio && | |
| 541 | + radeon_encoder->audio->set_avi_packet) | |
| 568 | 542 | radeon_encoder->audio->set_avi_packet(rdev, dig->afmt->offset, |
| 569 | 543 | buffer, sizeof(buffer)); |
| 570 | 544 | |
| @@ -722,30 +696,41 @@ static void radeon_audio_hdmi_mode_set(struct drm_encoder *encoder, · 151 unmodified lines | ||
| 722 | 696 | { |
| 723 | 697 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); |
| 724 | 698 | struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv; |
| 699 | + struct drm_connector *connector = radeon_get_connector_for_encoder(encoder); | |
| 725 | 700 | |
| 726 | 701 | if (!dig || !dig->afmt) |
| 727 | 702 | return; |
| 728 | 703 | |
| 729 | − radeon_audio_set_mute(encoder, true); | |
| 704 | + if (!connector) | |
| 705 | + return; | |
| 730 | 706 | |
| 731 | − radeon_audio_write_speaker_allocation(encoder); | |
| 732 | − radeon_audio_write_sad_regs(encoder); | |
| 733 | − radeon_audio_write_latency_fields(encoder, mode); | |
| 734 | − radeon_audio_set_dto(encoder, mode->clock); | |
| 735 | − radeon_audio_set_vbi_packet(encoder); | |
| 736 | − radeon_hdmi_set_color_depth(encoder); | |
| 737 | − radeon_audio_update_acr(encoder, mode->clock); | |
| 738 | − radeon_audio_set_audio_packet(encoder); | |
| 739 | − radeon_audio_select_pin(encoder); | |
| 707 | + if (drm_detect_monitor_audio(radeon_connector_edid(connector))) { | |
| 708 | + radeon_audio_set_mute(encoder, true); | |
| 740 | 709 | |
| 741 | − if (radeon_audio_set_avi_packet(encoder, mode) < 0) | |
| 742 | − return; | |
| 710 | + radeon_audio_write_speaker_allocation(encoder); | |
| 711 | + radeon_audio_write_sad_regs(encoder); | |
| 712 | + radeon_audio_write_latency_fields(encoder, mode); | |
| 713 | + radeon_audio_set_dto(encoder, mode->clock); | |
| 714 | + radeon_audio_set_vbi_packet(encoder); | |
| 715 | + radeon_hdmi_set_color_depth(encoder); | |
| 716 | + radeon_audio_update_acr(encoder, mode->clock); | |
| 717 | + radeon_audio_set_audio_packet(encoder); | |
| 718 | + radeon_audio_select_pin(encoder); | |
| 719 | + | |
| 720 | + if (radeon_audio_set_avi_packet(encoder, mode) < 0) | |
| 721 | + return; | |
| 743 | 722 | |
| 744 | − radeon_audio_set_mute(encoder, false); | |
| 723 | + radeon_audio_set_mute(encoder, false); | |
| 724 | + } else { | |
| 725 | + radeon_hdmi_set_color_depth(encoder); | |
| 726 | + | |
| 727 | + if (radeon_audio_set_avi_packet(encoder, mode) < 0) | |
| 728 | + return; | |
| 729 | + } | |
| 745 | 730 | } |
| 746 | 731 | |
| 747 | 732 | static void radeon_audio_dp_mode_set(struct drm_encoder *encoder, |
| 748 | − struct drm_display_mode *mode) | |
| 733 | + struct drm_display_mode *mode) | |
| 749 | 734 | { |
| 750 | 735 | struct drm_device *dev = encoder->dev; |
| 751 | 736 | struct radeon_device *rdev = dev->dev_private; |
| @@ -759,22 +744,27 @@ static void radeon_audio_dp_mode_set(struct drm_encoder *encoder, · 7 unmodified lines | ||
| 759 | 744 | if (!dig || !dig->afmt) |
| 760 | 745 | return; |
| 761 | 746 | |
| 762 | − radeon_audio_write_speaker_allocation(encoder); | |
| 763 | − radeon_audio_write_sad_regs(encoder); | |
| 764 | − radeon_audio_write_latency_fields(encoder, mode); | |
| 765 | − if (rdev->clock.dp_extclk || ASIC_IS_DCE5(rdev)) | |
| 766 | − radeon_audio_set_dto(encoder, rdev->clock.default_dispclk * 10); | |
| 767 | − else | |
| 768 | − radeon_audio_set_dto(encoder, dig_connector->dp_clock); | |
| 769 | − radeon_audio_set_audio_packet(encoder); | |
| 770 | − radeon_audio_select_pin(encoder); | |
| 771 | − | |
| 772 | − if (radeon_audio_set_avi_packet(encoder, mode) < 0) | |
| 747 | + if (!connector) | |
| 773 | 748 | return; |
| 749 | + | |
| 750 | + if (drm_detect_monitor_audio(radeon_connector_edid(connector))) { | |
| 751 | + radeon_audio_write_speaker_allocation(encoder); | |
| 752 | + radeon_audio_write_sad_regs(encoder); | |
| 753 | + radeon_audio_write_latency_fields(encoder, mode); | |
| 754 | + if (rdev->clock.dp_extclk || ASIC_IS_DCE5(rdev)) | |
| 755 | + radeon_audio_set_dto(encoder, rdev->clock.default_dispclk * 10); | |
| 756 | + else | |
| 757 | + radeon_audio_set_dto(encoder, dig_connector->dp_clock); | |
| 758 | + radeon_audio_set_audio_packet(encoder); | |
| 759 | + radeon_audio_select_pin(encoder); | |
| 760 | + | |
| 761 | + if (radeon_audio_set_avi_packet(encoder, mode) < 0) | |
| 762 | + return; | |
| 763 | + } | |
| 774 | 764 | } |
| 775 | 765 | |
| 776 | 766 | void radeon_audio_mode_set(struct drm_encoder *encoder, |
| 777 | − struct drm_display_mode *mode) | |
| 767 | + struct drm_display_mode *mode) | |
| 778 | 768 | { |
| 779 | 769 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); |
| 780 | 770 | |
| @@ -68,7 +68,8 @@ struct radeon_audio_funcs · 67 unmodified lines | ||
| 68 | 68 | |
| 69 | 69 | int radeon_audio_init(struct radeon_device *rdev); |
| 70 | 70 | void radeon_audio_detect(struct drm_connector *connector, |
| 71 | − enum drm_connector_status status); | |
| 71 | + struct drm_encoder *encoder, | |
| 72 | + enum drm_connector_status status); | |
| 72 | 73 | u32 radeon_audio_endpoint_rreg(struct radeon_device *rdev, |
| 73 | 74 | u32 offset, u32 reg); |
| 74 | 75 | void radeon_audio_endpoint_wreg(struct radeon_device *rdev, |
| @@ -1255,10 +1255,15 @@ struct radeon_encoder_lvds *radeon_combios_get_lvds_info(struct radeon_encoder · 1254 unmodified lines | ||
| 1255 | 1255 | |
| 1256 | 1256 | if ((RBIOS16(tmp) == lvds->native_mode.hdisplay) && |
| 1257 | 1257 | (RBIOS16(tmp + 2) == lvds->native_mode.vdisplay)) { |
| 1258 | + u32 hss = (RBIOS16(tmp + 21) - RBIOS16(tmp + 19) - 1) * 8; | |
| 1259 | + | |
| 1260 | + if (hss > lvds->native_mode.hdisplay) | |
| 1261 | + hss = (10 - 1) * 8; | |
| 1262 | + | |
| 1258 | 1263 | lvds->native_mode.htotal = lvds->native_mode.hdisplay + |
| 1259 | 1264 | (RBIOS16(tmp + 17) - RBIOS16(tmp + 19)) * 8; |
| 1260 | 1265 | lvds->native_mode.hsync_start = lvds->native_mode.hdisplay + |
| 1261 | − (RBIOS16(tmp + 21) - RBIOS16(tmp + 19) - 1) * 8; | |
| 1266 | + hss; | |
| 1262 | 1267 | lvds->native_mode.hsync_end = lvds->native_mode.hsync_start + |
| 1263 | 1268 | (RBIOS8(tmp + 23) * 8); |
| 1264 | 1269 | |
| @@ -1379,8 +1379,16 @@ out: · 1378 unmodified lines | ||
| 1379 | 1379 | /* updated in get modes as well since we need to know if it's analog or digital */ |
| 1380 | 1380 | radeon_connector_update_scratch_regs(connector, ret); |
| 1381 | 1381 | |
| 1382 | − if (radeon_audio != 0) | |
| 1383 | − radeon_audio_detect(connector, ret); | |
| 1382 | + if ((radeon_audio != 0) && radeon_connector->use_digital) { | |
| 1383 | + const struct drm_connector_helper_funcs *connector_funcs = | |
| 1384 | + connector->helper_private; | |
| 1385 | + | |
| 1386 | + encoder = connector_funcs->best_encoder(connector); | |
| 1387 | + if (encoder && (encoder->encoder_type == DRM_MODE_ENCODER_TMDS)) { | |
| 1388 | + radeon_connector_get_edid(connector); | |
| 1389 | + radeon_audio_detect(connector, encoder, ret); | |
| 1390 | + } | |
| 1391 | + } | |
| 1384 | 1392 | |
| 1385 | 1393 | exit: |
| 1386 | 1394 | pm_runtime_mark_last_busy(connector->dev->dev); |
| @@ -1717,8 +1725,10 @@ radeon_dp_detect(struct drm_connector *connector, bool force) · 330 unmodified lines | ||
| 1717 | 1725 | |
| 1718 | 1726 | radeon_connector_update_scratch_regs(connector, ret); |
| 1719 | 1727 | |
| 1720 | − if (radeon_audio != 0) | |
| 1721 | − radeon_audio_detect(connector, ret); | |
| 1728 | + if ((radeon_audio != 0) && encoder) { | |
| 1729 | + radeon_connector_get_edid(connector); | |
| 1730 | + radeon_audio_detect(connector, encoder, ret); | |
| 1731 | + } | |
| 1722 | 1732 | |
| 1723 | 1733 | out: |
| 1724 | 1734 | pm_runtime_mark_last_busy(connector->dev->dev); |
| @@ -237,7 +237,6 @@ struct radeon_afmt { · 236 unmodified lines | ||
| 237 | 237 | int offset; |
| 238 | 238 | bool last_buffer_filled_status; |
| 239 | 239 | int id; |
| 240 | − struct r600_audio_pin *pin; | |
| 241 | 240 | }; |
| 242 | 241 | |
| 243 | 242 | struct radeon_mode_info { |
| @@ -439,6 +438,7 @@ struct radeon_encoder_atom_dig { · 195 unmodified lines | ||
| 439 | 438 | uint8_t backlight_level; |
| 440 | 439 | int panel_mode; |
| 441 | 440 | struct radeon_afmt *afmt; |
| 441 | + struct r600_audio_pin *pin; | |
| 442 | 442 | int active_mst_links; |
| 443 | 443 | }; |
| 444 | 444 | |
| @@ -490,7 +490,8 @@ pgprot_t ttm_io_prot(uint32_t caching_flags, pgprot_t tmp) · 489 unmodified lines | ||
| 490 | 490 | else if (boot_cpu_data.x86 > 3) |
| 491 | 491 | tmp = pgprot_noncached(tmp); |
| 492 | 492 | #endif |
| 493 | −#if defined(__ia64__) || defined(__arm__) || defined(__powerpc__) | |
| 493 | +#if defined(__ia64__) || defined(__arm__) || defined(__aarch64__) || \ | |
| 494 | + defined(__powerpc__) | |
| 494 | 495 | if (caching_flags & TTM_PL_FLAG_WC) |
| 495 | 496 | tmp = pgprot_writecombine(tmp); |
| 496 | 497 | else |
| @@ -2492,7 +2492,7 @@ int vmw_execbuf_process(struct drm_file *file_priv, · 2491 unmodified lines | ||
| 2492 | 2492 | ret = ttm_eu_reserve_buffers(&ticket, &sw_context->validate_nodes, |
| 2493 | 2493 | true, NULL); |
| 2494 | 2494 | if (unlikely(ret != 0)) |
| 2495 | − goto out_err; | |
| 2495 | + goto out_err_nores; | |
| 2496 | 2496 | |
| 2497 | 2497 | ret = vmw_validate_buffers(dev_priv, sw_context); |
| 2498 | 2498 | if (unlikely(ret != 0)) |
| @@ -2536,6 +2536,7 @@ int vmw_execbuf_process(struct drm_file *file_priv, · 37 unmodified lines | ||
| 2536 | 2536 | vmw_resource_relocations_free(&sw_context->res_relocations); |
| 2537 | 2537 | |
| 2538 | 2538 | vmw_fifo_commit(dev_priv, command_size); |
| 2539 | + mutex_unlock(&dev_priv->binding_mutex); | |
| 2539 | 2540 | |
| 2540 | 2541 | vmw_query_bo_switch_commit(dev_priv, sw_context); |
| 2541 | 2542 | ret = vmw_execbuf_fence_commands(file_priv, dev_priv, |
| @@ -2551,7 +2552,6 @@ int vmw_execbuf_process(struct drm_file *file_priv, · 9 unmodified lines | ||
| 2551 | 2552 | DRM_ERROR("Fence submission error. Syncing.\n"); |
| 2552 | 2553 | |
| 2553 | 2554 | vmw_resource_list_unreserve(&sw_context->resource_list, false); |
| 2554 | − mutex_unlock(&dev_priv->binding_mutex); | |
| 2555 | 2555 | |
| 2556 | 2556 | ttm_eu_fence_buffer_objects(&ticket, &sw_context->validate_nodes, |
| 2557 | 2557 | (void *) fence); |
| @@ -546,6 +546,12 @@ static const struct hid_device_id apple_devices[] = { · 545 unmodified lines | ||
| 546 | 546 | .driver_data = APPLE_HAS_FN | APPLE_ISO_KEYBOARD }, |
| 547 | 547 | { HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_WELLSPRING8_JIS), |
| 548 | 548 | .driver_data = APPLE_HAS_FN | APPLE_RDESC_JIS }, |
| 549 | + { HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_WELLSPRING9_ANSI), | |
| 550 | + .driver_data = APPLE_HAS_FN }, | |
| 551 | + { HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_WELLSPRING9_ISO), | |
| 552 | + .driver_data = APPLE_HAS_FN | APPLE_ISO_KEYBOARD }, | |
| 553 | + { HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_WELLSPRING9_JIS), | |
| 554 | + .driver_data = APPLE_HAS_FN | APPLE_RDESC_JIS }, | |
| 549 | 555 | { HID_BLUETOOTH_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_ALU_WIRELESS_2009_ANSI), |
| 550 | 556 | .driver_data = APPLE_NUMLOCK_EMULATION | APPLE_HAS_FN }, |
| 551 | 557 | { HID_BLUETOOTH_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_ALU_WIRELESS_2009_ISO), |
| @@ -1782,6 +1782,9 @@ static const struct hid_device_id hid_have_special_driver[] = { · 1781 unmodified lines | ||
| 1782 | 1782 | { HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_WELLSPRING8_ANSI) }, |
| 1783 | 1783 | { HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_WELLSPRING8_ISO) }, |
| 1784 | 1784 | { HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_WELLSPRING8_JIS) }, |
| 1785 | + { HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_WELLSPRING9_ANSI) }, | |
| 1786 | + { HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_WELLSPRING9_ISO) }, | |
| 1787 | + { HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_WELLSPRING9_JIS) }, | |
| 1785 | 1788 | { HID_BLUETOOTH_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_ALU_WIRELESS_2009_ANSI) }, |
| 1786 | 1789 | { HID_BLUETOOTH_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_ALU_WIRELESS_2009_ISO) }, |
| 1787 | 1790 | { HID_BLUETOOTH_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_ALU_WIRELESS_2009_JIS) }, |
| @@ -2463,6 +2466,9 @@ static const struct hid_device_id hid_mouse_ignore_list[] = { · 675 unmodified lines | ||
| 2463 | 2466 | { HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_WELLSPRING8_ANSI) }, |
| 2464 | 2467 | { HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_WELLSPRING8_ISO) }, |
| 2465 | 2468 | { HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_WELLSPRING8_JIS) }, |
| 2469 | + { HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_WELLSPRING9_ANSI) }, | |
| 2470 | + { HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_WELLSPRING9_ISO) }, | |
| 2471 | + { HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_WELLSPRING9_JIS) }, | |
| 2466 | 2472 | { HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_FOUNTAIN_TP_ONLY) }, |
| 2467 | 2473 | { HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_GEYSER1_TP_ONLY) }, |
| 2468 | 2474 | { } |
| @@ -356,6 +356,8 @@ static int cp2112_read(struct cp2112_device *dev, u8 *data, size_t size) · 355 unmodified lines | ||
| 356 | 356 | struct cp2112_force_read_report report; |
| 357 | 357 | int ret; |
| 358 | 358 | |
| 359 | + if (size > sizeof(dev->read_data)) | |
| 360 | + size = sizeof(dev->read_data); | |
| 359 | 361 | report.report = CP2112_DATA_READ_FORCE_SEND; |
| 360 | 362 | report.length = cpu_to_be16(size); |
| 361 | 363 | |
| @@ -142,6 +142,9 @@ · 141 unmodified lines | ||
| 142 | 142 | #define USB_DEVICE_ID_APPLE_WELLSPRING8_ANSI 0x0290 |
| 143 | 143 | #define USB_DEVICE_ID_APPLE_WELLSPRING8_ISO 0x0291 |
| 144 | 144 | #define USB_DEVICE_ID_APPLE_WELLSPRING8_JIS 0x0292 |
| 145 | +#define USB_DEVICE_ID_APPLE_WELLSPRING9_ANSI 0x0272 | |
| 146 | +#define USB_DEVICE_ID_APPLE_WELLSPRING9_ISO 0x0273 | |
| 147 | +#define USB_DEVICE_ID_APPLE_WELLSPRING9_JIS 0x0274 | |
| 145 | 148 | #define USB_DEVICE_ID_APPLE_FOUNTAIN_TP_ONLY 0x030a |
| 146 | 149 | #define USB_DEVICE_ID_APPLE_GEYSER1_TP_ONLY 0x030b |
| 147 | 150 | #define USB_DEVICE_ID_APPLE_IRCONTROL 0x8240 |
| @@ -462,12 +462,15 @@ out: · 461 unmodified lines | ||
| 462 | 462 | |
| 463 | 463 | static void hidinput_cleanup_battery(struct hid_device *dev) |
| 464 | 464 | { |
| 465 | + const struct power_supply_desc *psy_desc; | |
| 466 | + | |
| 465 | 467 | if (!dev->battery) |
| 466 | 468 | return; |
| 467 | 469 | |
| 470 | + psy_desc = dev->battery->desc; | |
| 468 | 471 | power_supply_unregister(dev->battery); |
| 469 | − kfree(dev->battery->desc->name); | |
| 470 | − kfree(dev->battery->desc); | |
| 472 | + kfree(psy_desc->name); | |
| 473 | + kfree(psy_desc); | |
| 471 | 474 | dev->battery = NULL; |
| 472 | 475 | } |
| 473 | 476 | #else /* !CONFIG_HID_BATTERY_STRENGTH */ |
| @@ -778,9 +778,16 @@ static int mt_input_mapping(struct hid_device *hdev, struct hid_input *hi, · 777 unmodified lines | ||
| 778 | 778 | /* |
| 779 | 779 | * some egalax touchscreens have "application == HID_DG_TOUCHSCREEN" |
| 780 | 780 | * for the stylus. |
| 781 | + * The check for mt_report_id ensures we don't process | |
| 782 | + * HID_DG_CONTACTCOUNT from the pen report as it is outside the physical | |
| 783 | + * collection, but within the report ID. | |
| 781 | 784 | */ |
| 782 | 785 | if (field->physical == HID_DG_STYLUS) |
| 783 | 786 | return 0; |
| 787 | + else if ((field->physical == 0) && | |
| 788 | + (field->report->id != td->mt_report_id) && | |
| 789 | + (td->mt_report_id != -1)) | |
| 790 | + return 0; | |
| 784 | 791 | |
| 785 | 792 | if (field->application == HID_DG_TOUCHSCREEN || |
| 786 | 793 | field->application == HID_DG_TOUCHPAD) |
| @@ -858,7 +858,7 @@ static int uclogic_tablet_enable(struct hid_device *hdev) · 857 unmodified lines | ||
| 858 | 858 | for (p = drvdata->rdesc; |
| 859 | 859 | p <= drvdata->rdesc + drvdata->rsize - 4;) { |
| 860 | 860 | if (p[0] == 0xFE && p[1] == 0xED && p[2] == 0x1D && |
| 861 | − p[3] < sizeof(params)) { | |
| 861 | + p[3] < ARRAY_SIZE(params)) { | |
| 862 | 862 | v = params[p[3]]; |
| 863 | 863 | put_unaligned(cpu_to_le32(v), (s32 *)p); |
| 864 | 864 | p += 4; |
| @@ -87,6 +87,9 @@ static const struct hid_blacklist { · 86 unmodified lines | ||
| 87 | 87 | { USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_MOUSE_C05A, HID_QUIRK_ALWAYS_POLL }, |
| 88 | 88 | { USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_MOUSE_C06A, HID_QUIRK_ALWAYS_POLL }, |
| 89 | 89 | { USB_VENDOR_ID_MGE, USB_DEVICE_ID_MGE_UPS, HID_QUIRK_NOGET }, |
| 90 | + { USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_SURFACE_PRO_2, HID_QUIRK_NO_INIT_REPORTS }, | |
| 91 | + { USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_TYPE_COVER_2, HID_QUIRK_NO_INIT_REPORTS }, | |
| 92 | + { USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_TOUCH_COVER_2, HID_QUIRK_NO_INIT_REPORTS }, | |
| 90 | 93 | { USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_TYPE_COVER_3, HID_QUIRK_NO_INIT_REPORTS }, |
| 91 | 94 | { USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_TYPE_COVER_3_JP, HID_QUIRK_NO_INIT_REPORTS }, |
| 92 | 95 | { USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_POWER_COVER, HID_QUIRK_NO_INIT_REPORTS }, |
| @@ -1271,17 +1271,52 @@ fail_leds: · 1270 unmodified lines | ||
| 1271 | 1271 | pad_input_dev = NULL; |
| 1272 | 1272 | wacom_wac->pad_registered = false; |
| 1273 | 1273 | fail_register_pad_input: |
| 1274 | − input_unregister_device(touch_input_dev); | |
| 1274 | + if (touch_input_dev) | |
| 1275 | + input_unregister_device(touch_input_dev); | |
| 1275 | 1276 | wacom_wac->touch_input = NULL; |
| 1276 | 1277 | wacom_wac->touch_registered = false; |
| 1277 | 1278 | fail_register_touch_input: |
| 1278 | − input_unregister_device(pen_input_dev); | |
| 1279 | + if (pen_input_dev) | |
| 1280 | + input_unregister_device(pen_input_dev); | |
| 1279 | 1281 | wacom_wac->pen_input = NULL; |
| 1280 | 1282 | wacom_wac->pen_registered = false; |
| 1281 | 1283 | fail_register_pen_input: |
| 1282 | 1284 | return error; |
| 1283 | 1285 | } |
| 1284 | 1286 | |
| 1287 | +/* | |
| 1288 | + * Not all devices report physical dimensions from HID. | |
| 1289 | + * Compute the default from hardcoded logical dimension | |
| 1290 | + * and resolution before driver overwrites them. | |
| 1291 | + */ | |
| 1292 | +static void wacom_set_default_phy(struct wacom_features *features) | |
| 1293 | +{ | |
| 1294 | + if (features->x_resolution) { | |
| 1295 | + features->x_phy = (features->x_max * 100) / | |
| 1296 | + features->x_resolution; | |
| 1297 | + features->y_phy = (features->y_max * 100) / | |
| 1298 | + features->y_resolution; | |
| 1299 | + } | |
| 1300 | +} | |
| 1301 | + | |
| 1302 | +static void wacom_calculate_res(struct wacom_features *features) | |
| 1303 | +{ | |
| 1304 | + /* set unit to "100th of a mm" for devices not reported by HID */ | |
| 1305 | + if (!features->unit) { | |
| 1306 | + features->unit = 0x11; | |
| 1307 | + features->unitExpo = -3; | |
| 1308 | + } | |
| 1309 | + | |
| 1310 | + features->x_resolution = wacom_calc_hid_res(features->x_max, | |
| 1311 | + features->x_phy, | |
| 1312 | + features->unit, | |
| 1313 | + features->unitExpo); | |
| 1314 | + features->y_resolution = wacom_calc_hid_res(features->y_max, | |
| 1315 | + features->y_phy, | |
| 1316 | + features->unit, | |
| 1317 | + features->unitExpo); | |
| 1318 | +} | |
| 1319 | + | |
| 1285 | 1320 | static void wacom_wireless_work(struct work_struct *work) |
| 1286 | 1321 | { |
| 1287 | 1322 | struct wacom *wacom = container_of(work, struct wacom, work); |
| @@ -1339,6 +1374,8 @@ static void wacom_wireless_work(struct work_struct *work) · 51 unmodified lines | ||
| 1339 | 1374 | if (wacom_wac1->features.type != INTUOSHT && |
| 1340 | 1375 | wacom_wac1->features.type != BAMBOO_PT) |
| 1341 | 1376 | wacom_wac1->features.device_type |= WACOM_DEVICETYPE_PAD; |
| 1377 | + wacom_set_default_phy(&wacom_wac1->features); | |
| 1378 | + wacom_calculate_res(&wacom_wac1->features); | |
| 1342 | 1379 | snprintf(wacom_wac1->pen_name, WACOM_NAME_MAX, "%s (WL) Pen", |
| 1343 | 1380 | wacom_wac1->features.name); |
| 1344 | 1381 | snprintf(wacom_wac1->pad_name, WACOM_NAME_MAX, "%s (WL) Pad", |
| @@ -1357,7 +1394,9 @@ static void wacom_wireless_work(struct work_struct *work) · 12 unmodified lines | ||
| 1357 | 1394 | wacom_wac2->features = |
| 1358 | 1395 | *((struct wacom_features *)id->driver_data); |
| 1359 | 1396 | wacom_wac2->features.pktlen = WACOM_PKGLEN_BBTOUCH3; |
| 1397 | + wacom_set_default_phy(&wacom_wac2->features); | |
| 1360 | 1398 | wacom_wac2->features.x_max = wacom_wac2->features.y_max = 4096; |
| 1399 | + wacom_calculate_res(&wacom_wac2->features); | |
| 1361 | 1400 | snprintf(wacom_wac2->touch_name, WACOM_NAME_MAX, |
| 1362 | 1401 | "%s (WL) Finger",wacom_wac2->features.name); |
| 1363 | 1402 | snprintf(wacom_wac2->pad_name, WACOM_NAME_MAX, |
| @@ -1405,39 +1444,6 @@ void wacom_battery_work(struct work_struct *work) · 41 unmodified lines | ||
| 1405 | 1444 | } |
| 1406 | 1445 | } |
| 1407 | 1446 | |
| 1408 | −/* | |
| 1409 | − * Not all devices report physical dimensions from HID. | |
| 1410 | − * Compute the default from hardcoded logical dimension | |
| 1411 | − * and resolution before driver overwrites them. | |
| 1412 | − */ | |
| 1413 | −static void wacom_set_default_phy(struct wacom_features *features) | |
| 1414 | −{ | |
| 1415 | − if (features->x_resolution) { | |
| 1416 | − features->x_phy = (features->x_max * 100) / | |
| 1417 | − features->x_resolution; | |
| 1418 | − features->y_phy = (features->y_max * 100) / | |
| 1419 | − features->y_resolution; | |
| 1420 | − } | |
| 1421 | −} | |
| 1422 | − | |
| 1423 | −static void wacom_calculate_res(struct wacom_features *features) | |
| 1424 | −{ | |
| 1425 | − /* set unit to "100th of a mm" for devices not reported by HID */ | |
| 1426 | − if (!features->unit) { | |
| 1427 | − features->unit = 0x11; | |
| 1428 | − features->unitExpo = -3; | |
| 1429 | − } | |
| 1430 | − | |
| 1431 | − features->x_resolution = wacom_calc_hid_res(features->x_max, | |
| 1432 | − features->x_phy, | |
| 1433 | − features->unit, | |
| 1434 | − features->unitExpo); | |
| 1435 | − features->y_resolution = wacom_calc_hid_res(features->y_max, | |
| 1436 | − features->y_phy, | |
| 1437 | − features->unit, | |
| 1438 | − features->unitExpo); | |
| 1439 | −} | |
| 1440 | − | |
| 1441 | 1447 | static size_t wacom_compute_pktlen(struct hid_device *hdev) |
| 1442 | 1448 | { |
| 1443 | 1449 | struct hid_report_enum *report_enum; |
| @@ -2213,6 +2213,9 @@ void wacom_setup_device_quirks(struct wacom *wacom) · 2212 unmodified lines | ||
| 2213 | 2213 | features->x_max = 4096; |
| 2214 | 2214 | features->y_max = 4096; |
| 2215 | 2215 | } |
| 2216 | + else if (features->pktlen == WACOM_PKGLEN_BBTOUCH) { | |
| 2217 | + features->device_type |= WACOM_DEVICETYPE_PAD; | |
| 2218 | + } | |
| 2216 | 2219 | } |
| 2217 | 2220 | |
| 2218 | 2221 | /* |
| @@ -929,6 +929,21 @@ static struct dmi_system_id i8k_dmi_table[] __initdata = { · 928 unmodified lines | ||
| 929 | 929 | |
| 930 | 930 | MODULE_DEVICE_TABLE(dmi, i8k_dmi_table); |
| 931 | 931 | |
| 932 | +static struct dmi_system_id i8k_blacklist_dmi_table[] __initdata = { | |
| 933 | + { | |
| 934 | + /* | |
| 935 | + * CPU fan speed going up and down on Dell Studio XPS 8100 | |
| 936 | + * for unknown reasons. | |
| 937 | + */ | |
| 938 | + .ident = "Dell Studio XPS 8100", | |
| 939 | + .matches = { | |
| 940 | + DMI_EXACT_MATCH(DMI_SYS_VENDOR, "Dell Inc."), | |
| 941 | + DMI_EXACT_MATCH(DMI_PRODUCT_NAME, "Studio XPS 8100"), | |
| 942 | + }, | |
| 943 | + }, | |
| 944 | + { } | |
| 945 | +}; | |
| 946 | + | |
| 932 | 947 | /* |
| 933 | 948 | * Probe for the presence of a supported laptop. |
| 934 | 949 | */ |
| @@ -940,7 +955,8 @@ static int __init i8k_probe(void) · 5 unmodified lines | ||
| 940 | 955 | /* |
| 941 | 956 | * Get DMI information |
| 942 | 957 | */ |
| 943 | − if (!dmi_check_system(i8k_dmi_table)) { | |
| 958 | + if (!dmi_check_system(i8k_dmi_table) || | |
| 959 | + dmi_check_system(i8k_blacklist_dmi_table)) { | |
| 944 | 960 | if (!ignore_dmi && !force) |
| 945 | 961 | return -ENODEV; |
| 946 | 962 | |
| @@ -582,6 +582,7 @@ static const struct of_device_id g762_dt_match[] = { · 581 unmodified lines | ||
| 582 | 582 | { .compatible = "gmt,g763" }, |
| 583 | 583 | { }, |
| 584 | 584 | }; |
| 585 | +MODULE_DEVICE_TABLE(of, g762_dt_match); | |
| 585 | 586 | |
| 586 | 587 | /* |
| 587 | 588 | * Grab clock (a required property), enable it, get (fixed) clock frequency |
| @@ -195,7 +195,7 @@ abort: · 194 unmodified lines | ||
| 195 | 195 | } |
| 196 | 196 | |
| 197 | 197 | static int nct7802_write_voltage(struct nct7802_data *data, int nr, int index, |
| 198 | − unsigned int voltage) | |
| 198 | + unsigned long voltage) | |
| 199 | 199 | { |
| 200 | 200 | int shift = 8 - REG_VOLTAGE_LIMIT_MSB_SHIFT[index - 1][nr]; |
| 201 | 201 | int err; |
| @@ -412,8 +412,9 @@ static ssize_t show_pwm(struct device *dev, · 411 unmodified lines | ||
| 412 | 412 | return sprintf(buf, "%d\n", val); |
| 413 | 413 | } |
| 414 | 414 | |
| 415 | −static ssize_t store_mode(struct device *dev, struct device_attribute *devattr, | |
| 416 | − const char *buf, size_t count) | |
| 415 | +static ssize_t store_enable(struct device *dev, | |
| 416 | + struct device_attribute *devattr, | |
| 417 | + const char *buf, size_t count) | |
| 417 | 418 | { |
| 418 | 419 | int index = to_sensor_dev_attr(devattr)->index; |
| 419 | 420 | struct nct7904_data *data = dev_get_drvdata(dev); |
| @@ -422,18 +423,18 @@ static ssize_t store_mode(struct device *dev, struct device_attribute *devattr, · 2 unmodified lines | ||
| 422 | 423 | |
| 423 | 424 | if (kstrtoul(buf, 10, &val) < 0) |
| 424 | 425 | return -EINVAL; |
| 425 | − if (val > 1 || (val && !data->fan_mode[index])) | |
| 426 | + if (val < 1 || val > 2 || (val == 2 && !data->fan_mode[index])) | |
| 426 | 427 | return -EINVAL; |
| 427 | 428 | |
| 428 | 429 | ret = nct7904_write_reg(data, BANK_3, FANCTL1_FMR_REG + index, |
| 429 | − val ? data->fan_mode[index] : 0); | |
| 430 | + val == 2 ? data->fan_mode[index] : 0); | |
| 430 | 431 | |
| 431 | 432 | return ret ? ret : count; |
| 432 | 433 | } |
| 433 | 434 | |
| 434 | −/* Return 0 for manual mode or 1 for SmartFan mode */ | |
| 435 | −static ssize_t show_mode(struct device *dev, | |
| 436 | − struct device_attribute *devattr, char *buf) | |
| 435 | +/* Return 1 for manual mode or 2 for SmartFan mode */ | |
| 436 | +static ssize_t show_enable(struct device *dev, | |
| 437 | + struct device_attribute *devattr, char *buf) | |
| 437 | 438 | { |
| 438 | 439 | int index = to_sensor_dev_attr(devattr)->index; |
| 439 | 440 | struct nct7904_data *data = dev_get_drvdata(dev); |
| @@ -443,36 +444,36 @@ static ssize_t show_mode(struct device *dev, · 3 unmodified lines | ||
| 443 | 444 | if (val < 0) |
| 444 | 445 | return val; |
| 445 | 446 | |
| 446 | − return sprintf(buf, "%d\n", val ? 1 : 0); | |
| 447 | + return sprintf(buf, "%d\n", val ? 2 : 1); | |
| 447 | 448 | } |
| 448 | 449 | |
| 449 | 450 | /* 2 attributes per channel: pwm and mode */ |
| 450 | −static SENSOR_DEVICE_ATTR(fan1_pwm, S_IRUGO | S_IWUSR, | |
| 451 | +static SENSOR_DEVICE_ATTR(pwm1, S_IRUGO | S_IWUSR, | |
| 451 | 452 | show_pwm, store_pwm, 0); |
| 452 | −static SENSOR_DEVICE_ATTR(fan1_mode, S_IRUGO | S_IWUSR, | |
| 453 | − show_mode, store_mode, 0); | |
| 454 | −static SENSOR_DEVICE_ATTR(fan2_pwm, S_IRUGO | S_IWUSR, | |
| 453 | +static SENSOR_DEVICE_ATTR(pwm1_enable, S_IRUGO | S_IWUSR, | |
| 454 | + show_enable, store_enable, 0); | |
| 455 | +static SENSOR_DEVICE_ATTR(pwm2, S_IRUGO | S_IWUSR, | |
| 455 | 456 | show_pwm, store_pwm, 1); |
| 456 | −static SENSOR_DEVICE_ATTR(fan2_mode, S_IRUGO | S_IWUSR, | |
| 457 | − show_mode, store_mode, 1); | |
| 458 | −static SENSOR_DEVICE_ATTR(fan3_pwm, S_IRUGO | S_IWUSR, | |
| 457 | +static SENSOR_DEVICE_ATTR(pwm2_enable, S_IRUGO | S_IWUSR, | |
| 458 | + show_enable, store_enable, 1); | |
| 459 | +static SENSOR_DEVICE_ATTR(pwm3, S_IRUGO | S_IWUSR, | |
| 459 | 460 | show_pwm, store_pwm, 2); |
| 460 | −static SENSOR_DEVICE_ATTR(fan3_mode, S_IRUGO | S_IWUSR, | |
| 461 | − show_mode, store_mode, 2); | |
| 462 | −static SENSOR_DEVICE_ATTR(fan4_pwm, S_IRUGO | S_IWUSR, | |
| 461 | +static SENSOR_DEVICE_ATTR(pwm3_enable, S_IRUGO | S_IWUSR, | |
| 462 | + show_enable, store_enable, 2); | |
| 463 | +static SENSOR_DEVICE_ATTR(pwm4, S_IRUGO | S_IWUSR, | |
| 463 | 464 | show_pwm, store_pwm, 3); |
| 464 | −static SENSOR_DEVICE_ATTR(fan4_mode, S_IRUGO | S_IWUSR, | |
| 465 | − show_mode, store_mode, 3); | |
| 465 | +static SENSOR_DEVICE_ATTR(pwm4_enable, S_IRUGO | S_IWUSR, | |
| 466 | + show_enable, store_enable, 3); | |
| 466 | 467 | |
| 467 | 468 | static struct attribute *nct7904_fanctl_attrs[] = { |
| 468 | − &sensor_dev_attr_fan1_pwm.dev_attr.attr, | |
| 469 | − &sensor_dev_attr_fan1_mode.dev_attr.attr, | |
| 470 | − &sensor_dev_attr_fan2_pwm.dev_attr.attr, | |
| 471 | − &sensor_dev_attr_fan2_mode.dev_attr.attr, | |
| 472 | − &sensor_dev_attr_fan3_pwm.dev_attr.attr, | |
| 473 | − &sensor_dev_attr_fan3_mode.dev_attr.attr, | |
| 474 | − &sensor_dev_attr_fan4_pwm.dev_attr.attr, | |
| 475 | − &sensor_dev_attr_fan4_mode.dev_attr.attr, | |
| 469 | + &sensor_dev_attr_pwm1.dev_attr.attr, | |
| 470 | + &sensor_dev_attr_pwm1_enable.dev_attr.attr, | |
| 471 | + &sensor_dev_attr_pwm2.dev_attr.attr, | |
| 472 | + &sensor_dev_attr_pwm2_enable.dev_attr.attr, | |
| 473 | + &sensor_dev_attr_pwm3.dev_attr.attr, | |
| 474 | + &sensor_dev_attr_pwm3_enable.dev_attr.attr, | |
| 475 | + &sensor_dev_attr_pwm4.dev_attr.attr, | |
| 476 | + &sensor_dev_attr_pwm4_enable.dev_attr.attr, | |
| 476 | 477 | NULL |
| 477 | 478 | }; |
| 478 | 479 | |
| @@ -574,6 +575,7 @@ static const struct i2c_device_id nct7904_id[] = { · 95 unmodified lines | ||
| 574 | 575 | {"nct7904", 0}, |
| 575 | 576 | {} |
| 576 | 577 | }; |
| 578 | +MODULE_DEVICE_TABLE(i2c, nct7904_id); | |
| 577 | 579 | |
| 578 | 580 | static struct i2c_driver nct7904_driver = { |
| 579 | 581 | .class = I2C_CLASS_HWMON, |
| @@ -692,7 +692,7 @@ static int i2c_bfin_twi_probe(struct platform_device *pdev) · 691 unmodified lines | ||
| 692 | 692 | |
| 693 | 693 | platform_set_drvdata(pdev, iface); |
| 694 | 694 | |
| 695 | − dev_info(&pdev->dev, "Blackfin BF5xx on-chip I2C TWI Contoller, " | |
| 695 | + dev_info(&pdev->dev, "Blackfin BF5xx on-chip I2C TWI Controller, " | |
| 696 | 696 | "regs_base@%p\n", iface->regs_base); |
| 697 | 697 | |
| 698 | 698 | return 0; |
| @@ -735,6 +735,6 @@ subsys_initcall(i2c_bfin_twi_init); · 36 unmodified lines | ||
| 735 | 735 | module_exit(i2c_bfin_twi_exit); |
| 736 | 736 | |
| 737 | 737 | MODULE_AUTHOR("Bryan Wu, Sonic Zhang"); |
| 738 | −MODULE_DESCRIPTION("Blackfin BF5xx on-chip I2C TWI Contoller Driver"); | |
| 738 | +MODULE_DESCRIPTION("Blackfin BF5xx on-chip I2C TWI Controller Driver"); | |
| 739 | 739 | MODULE_LICENSE("GPL"); |
| 740 | 740 | MODULE_ALIAS("platform:i2c-bfin-twi"); |
| @@ -1247,7 +1247,14 @@ static void omap_i2c_prepare_recovery(struct i2c_adapter *adap) · 1246 unmodified lines | ||
| 1247 | 1247 | u32 reg; |
| 1248 | 1248 | |
| 1249 | 1249 | reg = omap_i2c_read_reg(dev, OMAP_I2C_SYSTEST_REG); |
| 1250 | + /* enable test mode */ | |
| 1250 | 1251 | reg |= OMAP_I2C_SYSTEST_ST_EN; |
| 1252 | + /* select SDA/SCL IO mode */ | |
| 1253 | + reg |= 3 << OMAP_I2C_SYSTEST_TMODE_SHIFT; | |
| 1254 | + /* set SCL to high-impedance state (reset value is 0) */ | |
| 1255 | + reg |= OMAP_I2C_SYSTEST_SCL_O; | |
| 1256 | + /* set SDA to high-impedance state (reset value is 0) */ | |
| 1257 | + reg |= OMAP_I2C_SYSTEST_SDA_O; | |
| 1251 | 1258 | omap_i2c_write_reg(dev, OMAP_I2C_SYSTEST_REG, reg); |
| 1252 | 1259 | } |
| 1253 | 1260 | |
| @@ -1257,7 +1264,11 @@ static void omap_i2c_unprepare_recovery(struct i2c_adapter *adap) · 3 unmodified lines | ||
| 1257 | 1264 | u32 reg; |
| 1258 | 1265 | |
| 1259 | 1266 | reg = omap_i2c_read_reg(dev, OMAP_I2C_SYSTEST_REG); |
| 1267 | + /* restore reset values */ | |
| 1260 | 1268 | reg &= ~OMAP_I2C_SYSTEST_ST_EN; |
| 1269 | + reg &= ~OMAP_I2C_SYSTEST_TMODE_MASK; | |
| 1270 | + reg &= ~OMAP_I2C_SYSTEST_SCL_O; | |
| 1271 | + reg &= ~OMAP_I2C_SYSTEST_SDA_O; | |
| 1261 | 1272 | omap_i2c_write_reg(dev, OMAP_I2C_SYSTEST_REG, reg); |
| 1262 | 1273 | } |
| 1263 | 1274 | |
| @@ -567,6 +567,9 @@ static int i2c_generic_recovery(struct i2c_adapter *adap) · 566 unmodified lines | ||
| 567 | 567 | if (bri->prepare_recovery) |
| 568 | 568 | bri->prepare_recovery(adap); |
| 569 | 569 | |
| 570 | + bri->set_scl(adap, val); | |
| 571 | + ndelay(RECOVERY_NDELAY); | |
| 572 | + | |
| 570 | 573 | /* |
| 571 | 574 | * By this time SCL is high, as we need to give 9 falling-rising edges |
| 572 | 575 | */ |
| @@ -597,7 +600,6 @@ static int i2c_generic_recovery(struct i2c_adapter *adap) · 24 unmodified lines | ||
| 597 | 600 | |
| 598 | 601 | int i2c_generic_scl_recovery(struct i2c_adapter *adap) |
| 599 | 602 | { |
| 600 | − adap->bus_recovery_info->set_scl(adap, 1); | |
| 601 | 603 | return i2c_generic_recovery(adap); |
| 602 | 604 | } |
| 603 | 605 | EXPORT_SYMBOL_GPL(i2c_generic_scl_recovery); |
| @@ -1338,13 +1340,17 @@ static int of_dev_node_match(struct device *dev, void *data) · 734 unmodified lines | ||
| 1338 | 1340 | struct i2c_client *of_find_i2c_device_by_node(struct device_node *node) |
| 1339 | 1341 | { |
| 1340 | 1342 | struct device *dev; |
| 1343 | + struct i2c_client *client; | |
| 1341 | 1344 | |
| 1342 | − dev = bus_find_device(&i2c_bus_type, NULL, node, | |
| 1343 | − of_dev_node_match); | |
| 1345 | + dev = bus_find_device(&i2c_bus_type, NULL, node, of_dev_node_match); | |
| 1344 | 1346 | if (!dev) |
| 1345 | 1347 | return NULL; |
| 1346 | 1348 | |
| 1347 | − return i2c_verify_client(dev); | |
| 1349 | + client = i2c_verify_client(dev); | |
| 1350 | + if (!client) | |
| 1351 | + put_device(dev); | |
| 1352 | + | |
| 1353 | + return client; | |
| 1348 | 1354 | } |
| 1349 | 1355 | EXPORT_SYMBOL(of_find_i2c_device_by_node); |
| 1350 | 1356 | |
| @@ -1352,13 +1358,17 @@ EXPORT_SYMBOL(of_find_i2c_device_by_node); · 1 unmodified line | ||
| 1352 | 1358 | struct i2c_adapter *of_find_i2c_adapter_by_node(struct device_node *node) |
| 1353 | 1359 | { |
| 1354 | 1360 | struct device *dev; |
| 1361 | + struct i2c_adapter *adapter; | |
| 1355 | 1362 | |
| 1356 | − dev = bus_find_device(&i2c_bus_type, NULL, node, | |
| 1357 | − of_dev_node_match); | |
| 1363 | + dev = bus_find_device(&i2c_bus_type, NULL, node, of_dev_node_match); | |
| 1358 | 1364 | if (!dev) |
| 1359 | 1365 | return NULL; |
| 1360 | 1366 | |
| 1361 | − return i2c_verify_adapter(dev); | |
| 1367 | + adapter = i2c_verify_adapter(dev); | |
| 1368 | + if (!adapter) | |
| 1369 | + put_device(dev); | |
| 1370 | + | |
| 1371 | + return adapter; | |
| 1362 | 1372 | } |
| 1363 | 1373 | EXPORT_SYMBOL(of_find_i2c_adapter_by_node); |
| 1364 | 1374 | #else |
| @@ -80,9 +80,6 @@ static ssize_t i2c_slave_eeprom_bin_read(struct file *filp, struct kobject *kobj · 79 unmodified lines | ||
| 80 | 80 | struct eeprom_data *eeprom; |
| 81 | 81 | unsigned long flags; |
| 82 | 82 | |
| 83 | − if (off + count > attr->size) | |
| 84 | − return -EFBIG; | |
| 85 | − | |
| 86 | 83 | eeprom = dev_get_drvdata(container_of(kobj, struct device, kobj)); |
| 87 | 84 | |
| 88 | 85 | spin_lock_irqsave(&eeprom->buffer_lock, flags); |
| @@ -98,9 +95,6 @@ static ssize_t i2c_slave_eeprom_bin_write(struct file *filp, struct kobject *kob · 9 unmodified lines | ||
| 98 | 95 | struct eeprom_data *eeprom; |
| 99 | 96 | unsigned long flags; |
| 100 | 97 | |
| 101 | − if (off + count > attr->size) | |
| 102 | − return -EFBIG; | |
| 103 | − | |
| 104 | 98 | eeprom = dev_get_drvdata(container_of(kobj, struct device, kobj)); |
| 105 | 99 | |
| 106 | 100 | spin_lock_irqsave(&eeprom->buffer_lock, flags); |
| @@ -557,21 +557,21 @@ static void mma8452_transient_interrupt(struct iio_dev *indio_dev) · 556 unmodified lines | ||
| 557 | 557 | if (src & MMA8452_TRANSIENT_SRC_XTRANSE) |
| 558 | 558 | iio_push_event(indio_dev, |
| 559 | 559 | IIO_MOD_EVENT_CODE(IIO_ACCEL, 0, IIO_MOD_X, |
| 560 | − IIO_EV_TYPE_THRESH, | |
| 560 | + IIO_EV_TYPE_MAG, | |
| 561 | 561 | IIO_EV_DIR_RISING), |
| 562 | 562 | ts); |
| 563 | 563 | |
| 564 | 564 | if (src & MMA8452_TRANSIENT_SRC_YTRANSE) |
| 565 | 565 | iio_push_event(indio_dev, |
| 566 | 566 | IIO_MOD_EVENT_CODE(IIO_ACCEL, 0, IIO_MOD_Y, |
| 567 | − IIO_EV_TYPE_THRESH, | |
| 567 | + IIO_EV_TYPE_MAG, | |
| 568 | 568 | IIO_EV_DIR_RISING), |
| 569 | 569 | ts); |
| 570 | 570 | |
| 571 | 571 | if (src & MMA8452_TRANSIENT_SRC_ZTRANSE) |
| 572 | 572 | iio_push_event(indio_dev, |
| 573 | 573 | IIO_MOD_EVENT_CODE(IIO_ACCEL, 0, IIO_MOD_Z, |
| 574 | − IIO_EV_TYPE_THRESH, | |
| 574 | + IIO_EV_TYPE_MAG, | |
| 575 | 575 | IIO_EV_DIR_RISING), |
| 576 | 576 | ts); |
| 577 | 577 | } |
| @@ -644,7 +644,7 @@ static int mma8452_reg_access_dbg(struct iio_dev *indio_dev, · 66 unmodified lines | ||
| 644 | 644 | |
| 645 | 645 | static const struct iio_event_spec mma8452_transient_event[] = { |
| 646 | 646 | { |
| 647 | − .type = IIO_EV_TYPE_THRESH, | |
| 647 | + .type = IIO_EV_TYPE_MAG, | |
| 648 | 648 | .dir = IIO_EV_DIR_RISING, |
| 649 | 649 | .mask_separate = BIT(IIO_EV_INFO_ENABLE), |
| 650 | 650 | .mask_shared_by_type = BIT(IIO_EV_INFO_VALUE) | |
| @@ -299,6 +299,8 @@ static int mcp320x_probe(struct spi_device *spi) · 298 unmodified lines | ||
| 299 | 299 | indio_dev->channels = chip_info->channels; |
| 300 | 300 | indio_dev->num_channels = chip_info->num_channels; |
| 301 | 301 | |
| 302 | + adc->chip_info = chip_info; | |
| 303 | + | |
| 302 | 304 | adc->transfer[0].tx_buf = &adc->tx_buf; |
| 303 | 305 | adc->transfer[0].len = sizeof(adc->tx_buf); |
| 304 | 306 | adc->transfer[1].rx_buf = adc->rx_buf; |
| @@ -635,7 +635,7 @@ static int vf610_adc_reg_access(struct iio_dev *indio_dev, · 634 unmodified lines | ||
| 635 | 635 | struct vf610_adc *info = iio_priv(indio_dev); |
| 636 | 636 | |
| 637 | 637 | if ((readval == NULL) || |
| 638 | − (!(reg % 4) || (reg > VF610_REG_ADC_PCTL))) | |
| 638 | + ((reg % 4) || (reg > VF610_REG_ADC_PCTL))) | |
| 639 | 639 | return -EINVAL; |
| 640 | 640 | |
| 641 | 641 | *readval = readl(info->regs + reg); |
| @@ -200,7 +200,7 @@ static int stk3310_read_event(struct iio_dev *indio_dev, · 199 unmodified lines | ||
| 200 | 200 | int *val, int *val2) |
| 201 | 201 | { |
| 202 | 202 | u8 reg; |
| 203 | − u16 buf; | |
| 203 | + __be16 buf; | |
| 204 | 204 | int ret; |
| 205 | 205 | struct stk3310_data *data = iio_priv(indio_dev); |
| 206 | 206 | |
| @@ -222,7 +222,7 @@ static int stk3310_read_event(struct iio_dev *indio_dev, · 15 unmodified lines | ||
| 222 | 222 | dev_err(&data->client->dev, "register read failed\n"); |
| 223 | 223 | return ret; |
| 224 | 224 | } |
| 225 | − *val = swab16(buf); | |
| 225 | + *val = be16_to_cpu(buf); | |
| 226 | 226 | |
| 227 | 227 | return IIO_VAL_INT; |
| 228 | 228 | } |
| @@ -235,7 +235,7 @@ static int stk3310_write_event(struct iio_dev *indio_dev, · 6 unmodified lines | ||
| 235 | 235 | int val, int val2) |
| 236 | 236 | { |
| 237 | 237 | u8 reg; |
| 238 | − u16 buf; | |
| 238 | + __be16 buf; | |
| 239 | 239 | int ret; |
| 240 | 240 | unsigned int index; |
| 241 | 241 | struct stk3310_data *data = iio_priv(indio_dev); |
| @@ -252,7 +252,7 @@ static int stk3310_write_event(struct iio_dev *indio_dev, · 10 unmodified lines | ||
| 252 | 252 | else |
| 253 | 253 | return -EINVAL; |
| 254 | 254 | |
| 255 | − buf = swab16(val); | |
| 255 | + buf = cpu_to_be16(val); | |
| 256 | 256 | ret = regmap_bulk_write(data->regmap, reg, &buf, 2); |
| 257 | 257 | if (ret < 0) |
| 258 | 258 | dev_err(&client->dev, "failed to set PS threshold!\n"); |
| @@ -301,7 +301,7 @@ static int stk3310_read_raw(struct iio_dev *indio_dev, · 42 unmodified lines | ||
| 301 | 301 | int *val, int *val2, long mask) |
| 302 | 302 | { |
| 303 | 303 | u8 reg; |
| 304 | − u16 buf; | |
| 304 | + __be16 buf; | |
| 305 | 305 | int ret; |
| 306 | 306 | unsigned int index; |
| 307 | 307 | struct stk3310_data *data = iio_priv(indio_dev); |
| @@ -322,7 +322,7 @@ static int stk3310_read_raw(struct iio_dev *indio_dev, · 14 unmodified lines | ||
| 322 | 322 | mutex_unlock(&data->lock); |
| 323 | 323 | return ret; |
| 324 | 324 | } |
| 325 | − *val = swab16(buf); | |
| 325 | + *val = be16_to_cpu(buf); | |
| 326 | 326 | mutex_unlock(&data->lock); |
| 327 | 327 | return IIO_VAL_INT; |
| 328 | 328 | case IIO_CHAN_INFO_INT_TIME: |
| @@ -608,13 +608,7 @@ static int stk3310_probe(struct i2c_client *client, · 279 unmodified lines | ||
| 608 | 608 | if (ret < 0) |
| 609 | 609 | return ret; |
| 610 | 610 | |
| 611 | − ret = iio_device_register(indio_dev); | |
| 612 | − if (ret < 0) { | |
| 613 | − dev_err(&client->dev, "device_register failed\n"); | |
| 614 | − stk3310_set_state(data, STK3310_STATE_STANDBY); | |
| 615 | − } | |
| 616 | − | |
| 617 | − if (client->irq <= 0) | |
| 611 | + if (client->irq < 0) | |
| 618 | 612 | client->irq = stk3310_gpio_probe(client); |
| 619 | 613 | |
| 620 | 614 | if (client->irq >= 0) { |
| @@ -629,6 +623,12 @@ static int stk3310_probe(struct i2c_client *client, · 8 unmodified lines | ||
| 629 | 623 | client->irq); |
| 630 | 624 | } |
| 631 | 625 | |
| 626 | + ret = iio_device_register(indio_dev); | |
| 627 | + if (ret < 0) { | |
| 628 | + dev_err(&client->dev, "device_register failed\n"); | |
| 629 | + stk3310_set_state(data, STK3310_STATE_STANDBY); | |
| 630 | + } | |
| 631 | + | |
| 632 | 632 | return ret; |
| 633 | 633 | } |
| 634 | 634 | |
| @@ -90,6 +90,7 @@ config IIO_ST_MAGN_SPI_3AXIS · 89 unmodified lines | ||
| 90 | 90 | config BMC150_MAGN |
| 91 | 91 | tristate "Bosch BMC150 Magnetometer Driver" |
| 92 | 92 | depends on I2C |
| 93 | + select REGMAP_I2C | |
| 93 | 94 | select IIO_BUFFER |
| 94 | 95 | select IIO_TRIGGERED_BUFFER |
| 95 | 96 | help |
| @@ -706,11 +706,11 @@ static int bmc150_magn_init(struct bmc150_magn_data *data) · 705 unmodified lines | ||
| 706 | 706 | goto err_poweroff; |
| 707 | 707 | } |
| 708 | 708 | if (chip_id != BMC150_MAGN_CHIP_ID_VAL) { |
| 709 | − dev_err(&data->client->dev, "Invalid chip id 0x%x\n", ret); | |
| 709 | + dev_err(&data->client->dev, "Invalid chip id 0x%x\n", chip_id); | |
| 710 | 710 | ret = -ENODEV; |
| 711 | 711 | goto err_poweroff; |
| 712 | 712 | } |
| 713 | − dev_dbg(&data->client->dev, "Chip id %x\n", ret); | |
| 713 | + dev_dbg(&data->client->dev, "Chip id %x\n", chip_id); | |
| 714 | 714 | |
| 715 | 715 | preset = bmc150_magn_presets_table[BMC150_MAGN_DEFAULT_PRESET]; |
| 716 | 716 | ret = bmc150_magn_set_odr(data, preset.odr); |
| @@ -202,8 +202,8 @@ static int mmc35240_hw_set(struct mmc35240_data *data, bool set) · 201 unmodified lines | ||
| 202 | 202 | coil_bit = MMC35240_CTRL0_RESET_BIT; |
| 203 | 203 | |
| 204 | 204 | return regmap_update_bits(data->regmap, MMC35240_REG_CTRL0, |
| 205 | − MMC35240_CTRL0_REFILL_BIT, | |
| 206 | − coil_bit); | |
| 205 | + coil_bit, coil_bit); | |
| 206 | + | |
| 207 | 207 | } |
| 208 | 208 | |
| 209 | 209 | static int mmc35240_init(struct mmc35240_data *data) |
| @@ -222,14 +222,15 @@ static int mmc35240_init(struct mmc35240_data *data) · 12 unmodified lines | ||
| 222 | 222 | |
| 223 | 223 | /* |
| 224 | 224 | * make sure we restore sensor characteristics, by doing |
| 225 | − * a RESET/SET sequence | |
| 225 | + * a SET/RESET sequence, the axis polarity being naturally | |
| 226 | + * aligned after RESET | |
| 226 | 227 | */ |
| 227 | − ret = mmc35240_hw_set(data, false); | |
| 228 | + ret = mmc35240_hw_set(data, true); | |
| 228 | 229 | if (ret < 0) |
| 229 | 230 | return ret; |
| 230 | 231 | usleep_range(MMC53240_WAIT_SET_RESET, MMC53240_WAIT_SET_RESET + 1); |
| 231 | 232 | |
| 232 | − ret = mmc35240_hw_set(data, true); | |
| 233 | + ret = mmc35240_hw_set(data, false); | |
| 233 | 234 | if (ret < 0) |
| 234 | 235 | return ret; |
| 235 | 236 | |
| @@ -503,6 +504,7 @@ static int mmc35240_probe(struct i2c_client *client, · 267 unmodified lines | ||
| 503 | 504 | } |
| 504 | 505 | |
| 505 | 506 | data = iio_priv(indio_dev); |
| 507 | + i2c_set_clientdata(client, indio_dev); | |
| 506 | 508 | data->client = client; |
| 507 | 509 | data->regmap = regmap; |
| 508 | 510 | data->res = MMC35240_16_BITS_SLOW; |
| @@ -204,7 +204,7 @@ static int mlx90614_read_raw(struct iio_dev *indio_dev, · 203 unmodified lines | ||
| 204 | 204 | *val = ret; |
| 205 | 205 | return IIO_VAL_INT; |
| 206 | 206 | case IIO_CHAN_INFO_OFFSET: |
| 207 | − *val = 13657; | |
| 207 | + *val = -13657; | |
| 208 | 208 | *val2 = 500000; |
| 209 | 209 | return IIO_VAL_INT_PLUS_MICRO; |
| 210 | 210 | case IIO_CHAN_INFO_SCALE: |
| @@ -736,6 +736,10 @@ static struct ib_mr *iwch_get_dma_mr(struct ib_pd *pd, int acc) · 735 unmodified lines | ||
| 736 | 736 | /* |
| 737 | 737 | * T3 only supports 32 bits of size. |
| 738 | 738 | */ |
| 739 | + if (sizeof(phys_addr_t) > 4) { | |
| 740 | + pr_warn_once(MOD "Cannot support dma_mrs on this platform.\n"); | |
| 741 | + return ERR_PTR(-ENOTSUPP); | |
| 742 | + } | |
| 739 | 743 | bl.size = 0xffffffff; |
| 740 | 744 | bl.addr = 0; |
| 741 | 745 | kva = 0; |
| @@ -31,6 +31,8 @@ · 30 unmodified lines | ||
| 31 | 31 | * SOFTWARE. |
| 32 | 32 | */ |
| 33 | 33 | |
| 34 | +#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt | |
| 35 | + | |
| 34 | 36 | #include <linux/sched.h> |
| 35 | 37 | #include <linux/spinlock.h> |
| 36 | 38 | #include <linux/idr.h> |
| @@ -399,8 +401,8 @@ static int ipath_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) · 362 unmodified lines | ||
| 399 | 401 | u32 bar0 = 0, bar1 = 0; |
| 400 | 402 | |
| 401 | 403 | #ifdef CONFIG_X86_64 |
| 402 | − if (WARN(pat_enabled(), | |
| 403 | − "ipath needs PAT disabled, boot with nopat kernel parameter\n")) { | |
| 404 | + if (pat_enabled()) { | |
| 405 | + pr_warn("ipath needs PAT disabled, boot with nopat kernel parameter\n"); | |
| 404 | 406 | ret = -ENODEV; |
| 405 | 407 | goto bail; |
| 406 | 408 | } |
| @@ -1,21 +1,36 @@ | ||
| 1 | −/******************************************************************* | |
| 2 | − * This file is part of the Emulex RoCE Device Driver for * | |
| 3 | − * RoCE (RDMA over Converged Ethernet) adapters. * | |
| 4 | − * Copyright (C) 2008-2012 Emulex. All rights reserved. * | |
| 5 | − * EMULEX and SLI are trademarks of Emulex. * | |
| 6 | − * www.emulex.com * | |
| 7 | − * * | |
| 8 | − * This program is free software; you can redistribute it and/or * | |
| 9 | − * modify it under the terms of version 2 of the GNU General * | |
| 10 | − * Public License as published by the Free Software Foundation. * | |
| 11 | − * This program is distributed in the hope that it will be useful. * | |
| 12 | − * ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND * | |
| 13 | − * WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, * | |
| 14 | − * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE * | |
| 15 | − * DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD * | |
| 16 | − * TO BE LEGALLY INVALID. See the GNU General Public License for * | |
| 17 | − * more details, a copy of which can be found in the file COPYING * | |
| 18 | − * included with this package. * | |
| 1 | +/* This file is part of the Emulex RoCE Device Driver for | |
| 2 | + * RoCE (RDMA over Converged Ethernet) adapters. | |
| 3 | + * Copyright (C) 2012-2015 Emulex. All rights reserved. | |
| 4 | + * EMULEX and SLI are trademarks of Emulex. | |
| 5 | + * www.emulex.com | |
| 6 | + * | |
| 7 | + * This software is available to you under a choice of one of two licenses. | |
| 8 | + * You may choose to be licensed under the terms of the GNU General Public | |
| 9 | + * License (GPL) Version 2, available from the file COPYING in the main | |
| 10 | + * directory of this source tree, or the BSD license below: | |
| 11 | + * | |
| 12 | + * Redistribution and use in source and binary forms, with or without | |
| 13 | + * modification, are permitted provided that the following conditions | |
| 14 | + * are met: | |
| 15 | + * | |
| 16 | + * - Redistributions of source code must retain the above copyright notice, | |
| 17 | + * this list of conditions and the following disclaimer. | |
| 18 | + * | |
| 19 | + * - Redistributions in binary form must reproduce the above copyright | |
| 20 | + * notice, this list of conditions and the following disclaimer in | |
| 21 | + * the documentation and/or other materials provided with the distribution. | |
| 22 | + * | |
| 23 | + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" | |
| 24 | + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,THE | |
| 25 | + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE | |
| 26 | + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE | |
| 27 | + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR | |
| 28 | + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF | |
| 29 | + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR | |
| 30 | + * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, | |
| 31 | + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR | |
| 32 | + * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF | |
| 33 | + * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. | |
| 19 | 34 | * |
| 20 | 35 | * Contact Information: |
| 21 | 36 | * linux-drivers@emulex.com |
| @@ -23,7 +38,7 @@ · 1 unmodified line | ||
| 23 | 38 | * Emulex |
| 24 | 39 | * 3333 Susan Street |
| 25 | 40 | * Costa Mesa, CA 92626 |
| 26 | − *******************************************************************/ | |
| 41 | + */ | |
| 27 | 42 | |
| 28 | 43 | #ifndef __OCRDMA_H__ |
| 29 | 44 | #define __OCRDMA_H__ |
| @@ -1,21 +1,36 @@ | ||
| 1 | −/******************************************************************* | |
| 2 | − * This file is part of the Emulex RoCE Device Driver for * | |
| 3 | − * RoCE (RDMA over Converged Ethernet) adapters. * | |
| 4 | − * Copyright (C) 2008-2012 Emulex. All rights reserved. * | |
| 5 | − * EMULEX and SLI are trademarks of Emulex. * | |
| 6 | − * www.emulex.com * | |
| 7 | − * * | |
| 8 | − * This program is free software; you can redistribute it and/or * | |
| 9 | − * modify it under the terms of version 2 of the GNU General * | |
| 10 | − * Public License as published by the Free Software Foundation. * | |
| 11 | − * This program is distributed in the hope that it will be useful. * | |
| 12 | − * ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND * | |
| 13 | − * WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, * | |
| 14 | − * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE * | |
| 15 | − * DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD * | |
| 16 | − * TO BE LEGALLY INVALID. See the GNU General Public License for * | |
| 17 | − * more details, a copy of which can be found in the file COPYING * | |
| 18 | − * included with this package. * | |
| 1 | +/* This file is part of the Emulex RoCE Device Driver for | |
| 2 | + * RoCE (RDMA over Converged Ethernet) adapters. | |
| 3 | + * Copyright (C) 2012-2015 Emulex. All rights reserved. | |
| 4 | + * EMULEX and SLI are trademarks of Emulex. | |
| 5 | + * www.emulex.com | |
| 6 | + * | |
| 7 | + * This software is available to you under a choice of one of two licenses. | |
| 8 | + * You may choose to be licensed under the terms of the GNU General Public | |
| 9 | + * License (GPL) Version 2, available from the file COPYING in the main | |
| 10 | + * directory of this source tree, or the BSD license below: | |
| 11 | + * | |
| 12 | + * Redistribution and use in source and binary forms, with or without | |
| 13 | + * modification, are permitted provided that the following conditions | |
| 14 | + * are met: | |
| 15 | + * | |
| 16 | + * - Redistributions of source code must retain the above copyright notice, | |
| 17 | + * this list of conditions and the following disclaimer. | |
| 18 | + * | |
| 19 | + * - Redistributions in binary form must reproduce the above copyright | |
| 20 | + * notice, this list of conditions and the following disclaimer in | |
| 21 | + * the documentation and/or other materials provided with the distribution. | |
| 22 | + * | |
| 23 | + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" | |
| 24 | + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,THE | |
| 25 | + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE | |
| 26 | + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE | |
| 27 | + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR | |
| 28 | + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF | |
| 29 | + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR | |
| 30 | + * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, | |
| 31 | + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR | |
| 32 | + * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF | |
| 33 | + * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. | |
| 19 | 34 | * |
| 20 | 35 | * Contact Information: |
| 21 | 36 | * linux-drivers@emulex.com |
| @@ -23,7 +38,7 @@ · 1 unmodified line | ||
| 23 | 38 | * Emulex |
| 24 | 39 | * 3333 Susan Street |
| 25 | 40 | * Costa Mesa, CA 92626 |
| 26 | − *******************************************************************/ | |
| 41 | + */ | |
| 27 | 42 | |
| 28 | 43 | #ifndef __OCRDMA_ABI_H__ |
| 29 | 44 | #define __OCRDMA_ABI_H__ |
| @@ -1,21 +1,36 @@ | ||
| 1 | −/******************************************************************* | |
| 2 | − * This file is part of the Emulex RoCE Device Driver for * | |
| 3 | − * RoCE (RDMA over Converged Ethernet) adapters. * | |
| 4 | − * Copyright (C) 2008-2012 Emulex. All rights reserved. * | |
| 5 | − * EMULEX and SLI are trademarks of Emulex. * | |
| 6 | − * www.emulex.com * | |
| 7 | − * * | |
| 8 | − * This program is free software; you can redistribute it and/or * | |
| 9 | − * modify it under the terms of version 2 of the GNU General * | |
| 10 | − * Public License as published by the Free Software Foundation. * | |
| 11 | − * This program is distributed in the hope that it will be useful. * | |
| 12 | − * ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND * | |
| 13 | − * WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, * | |
| 14 | − * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE * | |
| 15 | − * DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD * | |
| 16 | − * TO BE LEGALLY INVALID. See the GNU General Public License for * | |
| 17 | − * more details, a copy of which can be found in the file COPYING * | |
| 18 | − * included with this package. * | |
| 1 | +/* This file is part of the Emulex RoCE Device Driver for | |
| 2 | + * RoCE (RDMA over Converged Ethernet) adapters. | |
| 3 | + * Copyright (C) 2012-2015 Emulex. All rights reserved. | |
| 4 | + * EMULEX and SLI are trademarks of Emulex. | |
| 5 | + * www.emulex.com | |
| 6 | + * | |
| 7 | + * This software is available to you under a choice of one of two licenses. | |
| 8 | + * You may choose to be licensed under the terms of the GNU General Public | |
| 9 | + * License (GPL) Version 2, available from the file COPYING in the main | |
| 10 | + * directory of this source tree, or the BSD license below: | |
| 11 | + * | |
| 12 | + * Redistribution and use in source and binary forms, with or without | |
| 13 | + * modification, are permitted provided that the following conditions | |
| 14 | + * are met: | |
| 15 | + * | |
| 16 | + * - Redistributions of source code must retain the above copyright notice, | |
| 17 | + * this list of conditions and the following disclaimer. | |
| 18 | + * | |
| 19 | + * - Redistributions in binary form must reproduce the above copyright | |
| 20 | + * notice, this list of conditions and the following disclaimer in | |
| 21 | + * the documentation and/or other materials provided with the distribution. | |
| 22 | + * | |
| 23 | + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" | |
| 24 | + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,THE | |
| 25 | + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE | |
| 26 | + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE | |
| 27 | + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR | |
| 28 | + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF | |
| 29 | + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR | |
| 30 | + * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, | |
| 31 | + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR | |
| 32 | + * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF | |
| 33 | + * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. | |
| 19 | 34 | * |
| 20 | 35 | * Contact Information: |
| 21 | 36 | * linux-drivers@emulex.com |
| @@ -23,7 +38,7 @@ · 1 unmodified line | ||
| 23 | 38 | * Emulex |
| 24 | 39 | * 3333 Susan Street |
| 25 | 40 | * Costa Mesa, CA 92626 |
| 26 | − *******************************************************************/ | |
| 41 | + */ | |
| 27 | 42 | |
| 28 | 43 | #include <net/neighbour.h> |
| 29 | 44 | #include <net/netevent.h> |
| @@ -1,21 +1,36 @@ | ||
| 1 | −/******************************************************************* | |
| 2 | − * This file is part of the Emulex RoCE Device Driver for * | |
| 3 | − * RoCE (RDMA over Converged Ethernet) adapters. * | |
| 4 | − * Copyright (C) 2008-2012 Emulex. All rights reserved. * | |
| 5 | − * EMULEX and SLI are trademarks of Emulex. * | |
| 6 | − * www.emulex.com * | |
| 7 | − * * | |
| 8 | − * This program is free software; you can redistribute it and/or * | |
| 9 | − * modify it under the terms of version 2 of the GNU General * | |
| 10 | − * Public License as published by the Free Software Foundation. * | |
| 11 | − * This program is distributed in the hope that it will be useful. * | |
| 12 | − * ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND * | |
| 13 | − * WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, * | |
| 14 | − * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE * | |
| 15 | − * DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD * | |
| 16 | − * TO BE LEGALLY INVALID. See the GNU General Public License for * | |
| 17 | − * more details, a copy of which can be found in the file COPYING * | |
| 18 | − * included with this package. * | |
| 1 | +/* This file is part of the Emulex RoCE Device Driver for | |
| 2 | + * RoCE (RDMA over Converged Ethernet) adapters. | |
| 3 | + * Copyright (C) 2012-2015 Emulex. All rights reserved. | |
| 4 | + * EMULEX and SLI are trademarks of Emulex. | |
| 5 | + * www.emulex.com | |
| 6 | + * | |
| 7 | + * This software is available to you under a choice of one of two licenses. | |
| 8 | + * You may choose to be licensed under the terms of the GNU General Public | |
| 9 | + * License (GPL) Version 2, available from the file COPYING in the main | |
| 10 | + * directory of this source tree, or the BSD license below: | |
| 11 | + * | |
| 12 | + * Redistribution and use in source and binary forms, with or without | |
| 13 | + * modification, are permitted provided that the following conditions | |
| 14 | + * are met: | |
| 15 | + * | |
| 16 | + * - Redistributions of source code must retain the above copyright notice, | |
| 17 | + * this list of conditions and the following disclaimer. | |
| 18 | + * | |
| 19 | + * - Redistributions in binary form must reproduce the above copyright | |
| 20 | + * notice, this list of conditions and the following disclaimer in | |
| 21 | + * the documentation and/or other materials provided with the distribution. | |
| 22 | + * | |
| 23 | + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" | |
| 24 | + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,THE | |
| 25 | + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE | |
| 26 | + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE | |
| 27 | + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR | |
| 28 | + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF | |
| 29 | + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR | |
| 30 | + * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, | |
| 31 | + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR | |
| 32 | + * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF | |
| 33 | + * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. | |
| 19 | 34 | * |
| 20 | 35 | * Contact Information: |
| 21 | 36 | * linux-drivers@emulex.com |
| @@ -23,7 +38,7 @@ · 1 unmodified line | ||
| 23 | 38 | * Emulex |
| 24 | 39 | * 3333 Susan Street |
| 25 | 40 | * Costa Mesa, CA 92626 |
| 26 | − *******************************************************************/ | |
| 41 | + */ | |
| 27 | 42 | |
| 28 | 43 | #ifndef __OCRDMA_AH_H__ |
| 29 | 44 | #define __OCRDMA_AH_H__ |
| @@ -1,21 +1,36 @@ | ||
| 1 | −/******************************************************************* | |
| 2 | − * This file is part of the Emulex RoCE Device Driver for * | |
| 3 | − * RoCE (RDMA over Converged Ethernet) CNA Adapters. * | |
| 4 | − * Copyright (C) 2008-2012 Emulex. All rights reserved. * | |
| 5 | − * EMULEX and SLI are trademarks of Emulex. * | |
| 6 | − * www.emulex.com * | |
| 7 | − * * | |
| 8 | − * This program is free software; you can redistribute it and/or * | |
| 9 | − * modify it under the terms of version 2 of the GNU General * | |
| 10 | − * Public License as published by the Free Software Foundation. * | |
| 11 | − * This program is distributed in the hope that it will be useful. * | |
| 12 | − * ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND * | |
| 13 | − * WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, * | |
| 14 | − * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE * | |
| 15 | − * DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD * | |
| 16 | − * TO BE LEGALLY INVALID. See the GNU General Public License for * | |
| 17 | − * more details, a copy of which can be found in the file COPYING * | |
| 18 | − * included with this package. * | |
| 1 | +/* This file is part of the Emulex RoCE Device Driver for | |
| 2 | + * RoCE (RDMA over Converged Ethernet) adapters. | |
| 3 | + * Copyright (C) 2012-2015 Emulex. All rights reserved. | |
| 4 | + * EMULEX and SLI are trademarks of Emulex. | |
| 5 | + * www.emulex.com | |
| 6 | + * | |
| 7 | + * This software is available to you under a choice of one of two licenses. | |
| 8 | + * You may choose to be licensed under the terms of the GNU General Public | |
| 9 | + * License (GPL) Version 2, available from the file COPYING in the main | |
| 10 | + * directory of this source tree, or the BSD license below: | |
| 11 | + * | |
| 12 | + * Redistribution and use in source and binary forms, with or without | |
| 13 | + * modification, are permitted provided that the following conditions | |
| 14 | + * are met: | |
| 15 | + * | |
| 16 | + * - Redistributions of source code must retain the above copyright notice, | |
| 17 | + * this list of conditions and the following disclaimer. | |
| 18 | + * | |
| 19 | + * - Redistributions in binary form must reproduce the above copyright | |
| 20 | + * notice, this list of conditions and the following disclaimer in | |
| 21 | + * the documentation and/or other materials provided with the distribution. | |
| 22 | + * | |
| 23 | + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" | |
| 24 | + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,THE | |
| 25 | + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE | |
| 26 | + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE | |
| 27 | + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR | |
| 28 | + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF | |
| 29 | + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR | |
| 30 | + * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, | |
| 31 | + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR | |
| 32 | + * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF | |
| 33 | + * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. | |
| 19 | 34 | * |
| 20 | 35 | * Contact Information: |
| 21 | 36 | * linux-drivers@emulex.com |
| @@ -23,7 +38,7 @@ · 1 unmodified line | ||
| 23 | 38 | * Emulex |
| 24 | 39 | * 3333 Susan Street |
| 25 | 40 | * Costa Mesa, CA 92626 |
| 26 | − *******************************************************************/ | |
| 41 | + */ | |
| 27 | 42 | |
| 28 | 43 | #include <linux/sched.h> |
| 29 | 44 | #include <linux/interrupt.h> |
| @@ -1,21 +1,36 @@ | ||
| 1 | −/******************************************************************* | |
| 2 | − * This file is part of the Emulex RoCE Device Driver for * | |
| 3 | − * RoCE (RDMA over Converged Ethernet) CNA Adapters. * | |
| 4 | − * Copyright (C) 2008-2012 Emulex. All rights reserved. * | |
| 5 | − * EMULEX and SLI are trademarks of Emulex. * | |
| 6 | − * www.emulex.com * | |
| 7 | − * * | |
| 8 | − * This program is free software; you can redistribute it and/or * | |
| 9 | − * modify it under the terms of version 2 of the GNU General * | |
| 10 | − * Public License as published by the Free Software Foundation. * | |
| 11 | − * This program is distributed in the hope that it will be useful. * | |
| 12 | − * ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND * | |
| 13 | − * WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, * | |
| 14 | − * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE * | |
| 15 | − * DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD * | |
| 16 | − * TO BE LEGALLY INVALID. See the GNU General Public License for * | |
| 17 | − * more details, a copy of which can be found in the file COPYING * | |
| 18 | − * included with this package. * | |
| 1 | +/* This file is part of the Emulex RoCE Device Driver for | |
| 2 | + * RoCE (RDMA over Converged Ethernet) adapters. | |
| 3 | + * Copyright (C) 2012-2015 Emulex. All rights reserved. | |
| 4 | + * EMULEX and SLI are trademarks of Emulex. | |
| 5 | + * www.emulex.com | |
| 6 | + * | |
| 7 | + * This software is available to you under a choice of one of two licenses. | |
| 8 | + * You may choose to be licensed under the terms of the GNU General Public | |
| 9 | + * License (GPL) Version 2, available from the file COPYING in the main | |
| 10 | + * directory of this source tree, or the BSD license below: | |
| 11 | + * | |
| 12 | + * Redistribution and use in source and binary forms, with or without | |
| 13 | + * modification, are permitted provided that the following conditions | |
| 14 | + * are met: | |
| 15 | + * | |
| 16 | + * - Redistributions of source code must retain the above copyright notice, | |
| 17 | + * this list of conditions and the following disclaimer. | |
| 18 | + * | |
| 19 | + * - Redistributions in binary form must reproduce the above copyright | |
| 20 | + * notice, this list of conditions and the following disclaimer in | |
| 21 | + * the documentation and/or other materials provided with the distribution. | |
| 22 | + * | |
| 23 | + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" | |
| 24 | + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,THE | |
| 25 | + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE | |
| 26 | + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE | |
| 27 | + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR | |
| 28 | + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF | |
| 29 | + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR | |
| 30 | + * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, | |
| 31 | + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR | |
| 32 | + * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF | |
| 33 | + * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. | |
| 19 | 34 | * |
| 20 | 35 | * Contact Information: |
| 21 | 36 | * linux-drivers@emulex.com |
| @@ -23,7 +38,7 @@ · 1 unmodified line | ||
| 23 | 38 | * Emulex |
| 24 | 39 | * 3333 Susan Street |
| 25 | 40 | * Costa Mesa, CA 92626 |
| 26 | − *******************************************************************/ | |
| 41 | + */ | |
| 27 | 42 | |
| 28 | 43 | #ifndef __OCRDMA_HW_H__ |
| 29 | 44 | #define __OCRDMA_HW_H__ |
| @@ -1,21 +1,36 @@ | ||
| 1 | −/******************************************************************* | |
| 2 | − * This file is part of the Emulex RoCE Device Driver for * | |
| 3 | − * RoCE (RDMA over Converged Ethernet) adapters. * | |
| 4 | − * Copyright (C) 2008-2012 Emulex. All rights reserved. * | |
| 5 | − * EMULEX and SLI are trademarks of Emulex. * | |
| 6 | − * www.emulex.com * | |
| 7 | − * * | |
| 8 | − * This program is free software; you can redistribute it and/or * | |
| 9 | − * modify it under the terms of version 2 of the GNU General * | |
| 10 | − * Public License as published by the Free Software Foundation. * | |
| 11 | − * This program is distributed in the hope that it will be useful. * | |
| 12 | − * ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND * | |
| 13 | − * WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, * | |
| 14 | − * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE * | |
| 15 | − * DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD * | |
| 16 | − * TO BE LEGALLY INVALID. See the GNU General Public License for * | |
| 17 | − * more details, a copy of which can be found in the file COPYING * | |
| 18 | − * included with this package. * | |
| 1 | +/* This file is part of the Emulex RoCE Device Driver for | |
| 2 | + * RoCE (RDMA over Converged Ethernet) adapters. | |
| 3 | + * Copyright (C) 2012-2015 Emulex. All rights reserved. | |
| 4 | + * EMULEX and SLI are trademarks of Emulex. | |
| 5 | + * www.emulex.com | |
| 6 | + * | |
| 7 | + * This software is available to you under a choice of one of two licenses. | |
| 8 | + * You may choose to be licensed under the terms of the GNU General Public | |
| 9 | + * License (GPL) Version 2, available from the file COPYING in the main | |
| 10 | + * directory of this source tree, or the BSD license below: | |
| 11 | + * | |
| 12 | + * Redistribution and use in source and binary forms, with or without | |
| 13 | + * modification, are permitted provided that the following conditions | |
| 14 | + * are met: | |
| 15 | + * | |
| 16 | + * - Redistributions of source code must retain the above copyright notice, | |
| 17 | + * this list of conditions and the following disclaimer. | |
| 18 | + * | |
| 19 | + * - Redistributions in binary form must reproduce the above copyright | |
| 20 | + * notice, this list of conditions and the following disclaimer in | |
| 21 | + * the documentation and/or other materials provided with the distribution. | |
| 22 | + * | |
| 23 | + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" | |
| 24 | + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,THE | |
| 25 | + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE | |
| 26 | + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE | |
| 27 | + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR | |
| 28 | + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF | |
| 29 | + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR | |
| 30 | + * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, | |
| 31 | + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR | |
| 32 | + * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF | |
| 33 | + * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. | |
| 19 | 34 | * |
| 20 | 35 | * Contact Information: |
| 21 | 36 | * linux-drivers@emulex.com |
| @@ -23,7 +38,7 @@ · 1 unmodified line | ||
| 23 | 38 | * Emulex |
| 24 | 39 | * 3333 Susan Street |
| 25 | 40 | * Costa Mesa, CA 92626 |
| 26 | − *******************************************************************/ | |
| 41 | + */ | |
| 27 | 42 | |
| 28 | 43 | #include <linux/module.h> |
| 29 | 44 | #include <linux/idr.h> |
| @@ -46,7 +61,7 @@ · 16 unmodified lines | ||
| 46 | 61 | MODULE_VERSION(OCRDMA_ROCE_DRV_VERSION); |
| 47 | 62 | MODULE_DESCRIPTION(OCRDMA_ROCE_DRV_DESC " " OCRDMA_ROCE_DRV_VERSION); |
| 48 | 63 | MODULE_AUTHOR("Emulex Corporation"); |
| 49 | −MODULE_LICENSE("GPL"); | |
| 64 | +MODULE_LICENSE("Dual BSD/GPL"); | |
| 50 | 65 | |
| 51 | 66 | static LIST_HEAD(ocrdma_dev_list); |
| 52 | 67 | static DEFINE_SPINLOCK(ocrdma_devlist_lock); |
| @@ -1,21 +1,36 @@ | ||
| 1 | −/******************************************************************* | |
| 2 | − * This file is part of the Emulex RoCE Device Driver for * | |
| 3 | − * RoCE (RDMA over Converged Ethernet) adapters. * | |
| 4 | − * Copyright (C) 2008-2012 Emulex. All rights reserved. * | |
| 5 | − * EMULEX and SLI are trademarks of Emulex. * | |
| 6 | − * www.emulex.com * | |
| 7 | − * * | |
| 8 | − * This program is free software; you can redistribute it and/or * | |
| 9 | − * modify it under the terms of version 2 of the GNU General * | |
| 10 | − * Public License as published by the Free Software Foundation. * | |
| 11 | − * This program is distributed in the hope that it will be useful. * | |
| 12 | − * ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND * | |
| 13 | − * WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, * | |
| 14 | − * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE * | |
| 15 | − * DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD * | |
| 16 | − * TO BE LEGALLY INVALID. See the GNU General Public License for * | |
| 17 | − * more details, a copy of which can be found in the file COPYING * | |
| 18 | − * included with this package. * | |
| 1 | +/* This file is part of the Emulex RoCE Device Driver for | |
| 2 | + * RoCE (RDMA over Converged Ethernet) adapters. | |
| 3 | + * Copyright (C) 2012-2015 Emulex. All rights reserved. | |
| 4 | + * EMULEX and SLI are trademarks of Emulex. | |
| 5 | + * www.emulex.com | |
| 6 | + * | |
| 7 | + * This software is available to you under a choice of one of two licenses. | |
| 8 | + * You may choose to be licensed under the terms of the GNU General Public | |
| 9 | + * License (GPL) Version 2, available from the file COPYING in the main | |
| 10 | + * directory of this source tree, or the BSD license below: | |
| 11 | + * | |
| 12 | + * Redistribution and use in source and binary forms, with or without | |
| 13 | + * modification, are permitted provided that the following conditions | |
| 14 | + * are met: | |
| 15 | + * | |
| 16 | + * - Redistributions of source code must retain the above copyright notice, | |
| 17 | + * this list of conditions and the following disclaimer. | |
| 18 | + * | |
| 19 | + * - Redistributions in binary form must reproduce the above copyright | |
| 20 | + * notice, this list of conditions and the following disclaimer in | |
| 21 | + * the documentation and/or other materials provided with the distribution. | |
| 22 | + * | |
| 23 | + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" | |
| 24 | + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,THE | |
| 25 | + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE | |
| 26 | + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE | |
| 27 | + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR | |
| 28 | + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF | |
| 29 | + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR | |
| 30 | + * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, | |
| 31 | + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR | |
| 32 | + * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF | |
| 33 | + * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. | |
| 19 | 34 | * |
| 20 | 35 | * Contact Information: |
| 21 | 36 | * linux-drivers@emulex.com |
| @@ -23,7 +38,7 @@ · 1 unmodified line | ||
| 23 | 38 | * Emulex |
| 24 | 39 | * 3333 Susan Street |
| 25 | 40 | * Costa Mesa, CA 92626 |
| 26 | − *******************************************************************/ | |
| 41 | + */ | |
| 27 | 42 | |
| 28 | 43 | #ifndef __OCRDMA_SLI_H__ |
| 29 | 44 | #define __OCRDMA_SLI_H__ |
| @@ -1,21 +1,36 @@ | ||
| 1 | −/******************************************************************* | |
| 2 | − * This file is part of the Emulex RoCE Device Driver for * | |
| 3 | − * RoCE (RDMA over Converged Ethernet) adapters. * | |
| 4 | − * Copyright (C) 2008-2014 Emulex. All rights reserved. * | |
| 5 | − * EMULEX and SLI are trademarks of Emulex. * | |
| 6 | − * www.emulex.com * | |
| 7 | − * * | |
| 8 | − * This program is free software; you can redistribute it and/or * | |
| 9 | − * modify it under the terms of version 2 of the GNU General * | |
| 10 | − * Public License as published by the Free Software Foundation. * | |
| 11 | − * This program is distributed in the hope that it will be useful. * | |
| 12 | − * ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND * | |
| 13 | − * WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, * | |
| 14 | − * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE * | |
| 15 | − * DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD * | |
| 16 | − * TO BE LEGALLY INVALID. See the GNU General Public License for * | |
| 17 | − * more details, a copy of which can be found in the file COPYING * | |
| 18 | − * included with this package. * | |
| 1 | +/* This file is part of the Emulex RoCE Device Driver for | |
| 2 | + * RoCE (RDMA over Converged Ethernet) adapters. | |
| 3 | + * Copyright (C) 2012-2015 Emulex. All rights reserved. | |
| 4 | + * EMULEX and SLI are trademarks of Emulex. | |
| 5 | + * www.emulex.com | |
| 6 | + * | |
| 7 | + * This software is available to you under a choice of one of two licenses. | |
| 8 | + * You may choose to be licensed under the terms of the GNU General Public | |
| 9 | + * License (GPL) Version 2, available from the file COPYING in the main | |
| 10 | + * directory of this source tree, or the BSD license below: | |
| 11 | + * | |
| 12 | + * Redistribution and use in source and binary forms, with or without | |
| 13 | + * modification, are permitted provided that the following conditions | |
| 14 | + * are met: | |
| 15 | + * | |
| 16 | + * - Redistributions of source code must retain the above copyright notice, | |
| 17 | + * this list of conditions and the following disclaimer. | |
| 18 | + * | |
| 19 | + * - Redistributions in binary form must reproduce the above copyright | |
| 20 | + * notice, this list of conditions and the following disclaimer in | |
| 21 | + * the documentation and/or other materials provided with the distribution. | |
| 22 | + * | |
| 23 | + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" | |
| 24 | + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,THE | |
| 25 | + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE | |
| 26 | + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE | |
| 27 | + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR | |
| 28 | + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF | |
| 29 | + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR | |
| 30 | + * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, | |
| 31 | + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR | |
| 32 | + * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF | |
| 33 | + * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. | |
| 19 | 34 | * |
| 20 | 35 | * Contact Information: |
| 21 | 36 | * linux-drivers@emulex.com |
| @@ -23,7 +38,7 @@ · 1 unmodified line | ||
| 23 | 38 | * Emulex |
| 24 | 39 | * 3333 Susan Street |
| 25 | 40 | * Costa Mesa, CA 92626 |
| 26 | − *******************************************************************/ | |
| 41 | + */ | |
| 27 | 42 | |
| 28 | 43 | #include <rdma/ib_addr.h> |
| 29 | 44 | #include <rdma/ib_pma.h> |
| @@ -1,21 +1,36 @@ | ||
| 1 | −/******************************************************************* | |
| 2 | − * This file is part of the Emulex RoCE Device Driver for * | |
| 3 | − * RoCE (RDMA over Converged Ethernet) adapters. * | |
| 4 | − * Copyright (C) 2008-2014 Emulex. All rights reserved. * | |
| 5 | − * EMULEX and SLI are trademarks of Emulex. * | |
| 6 | − * www.emulex.com * | |
| 7 | − * * | |
| 8 | − * This program is free software; you can redistribute it and/or * | |
| 9 | − * modify it under the terms of version 2 of the GNU General * | |
| 10 | − * Public License as published by the Free Software Foundation. * | |
| 11 | − * This program is distributed in the hope that it will be useful. * | |
| 12 | − * ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND * | |
| 13 | − * WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, * | |
| 14 | − * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE * | |
| 15 | − * DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD * | |
| 16 | − * TO BE LEGALLY INVALID. See the GNU General Public License for * | |
| 17 | − * more details, a copy of which can be found in the file COPYING * | |
| 18 | − * included with this package. * | |
| 1 | +/* This file is part of the Emulex RoCE Device Driver for | |
| 2 | + * RoCE (RDMA over Converged Ethernet) adapters. | |
| 3 | + * Copyright (C) 2012-2015 Emulex. All rights reserved. | |
| 4 | + * EMULEX and SLI are trademarks of Emulex. | |
| 5 | + * www.emulex.com | |
| 6 | + * | |
| 7 | + * This software is available to you under a choice of one of two licenses. | |
| 8 | + * You may choose to be licensed under the terms of the GNU General Public | |
| 9 | + * License (GPL) Version 2, available from the file COPYING in the main | |
| 10 | + * directory of this source tree, or the BSD license below: | |
| 11 | + * | |
| 12 | + * Redistribution and use in source and binary forms, with or without | |
| 13 | + * modification, are permitted provided that the following conditions | |
| 14 | + * are met: | |
| 15 | + * | |
| 16 | + * - Redistributions of source code must retain the above copyright notice, | |
| 17 | + * this list of conditions and the following disclaimer. | |
| 18 | + * | |
| 19 | + * - Redistributions in binary form must reproduce the above copyright | |
| 20 | + * notice, this list of conditions and the following disclaimer in | |
| 21 | + * the documentation and/or other materials provided with the distribution. | |
| 22 | + * | |
| 23 | + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" | |
| 24 | + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,THE | |
| 25 | + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE | |
| 26 | + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE | |
| 27 | + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR | |
| 28 | + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF | |
| 29 | + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR | |
| 30 | + * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, | |
| 31 | + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR | |
| 32 | + * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF | |
| 33 | + * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. | |
| 19 | 34 | * |
| 20 | 35 | * Contact Information: |
| 21 | 36 | * linux-drivers@emulex.com |
| @@ -23,7 +38,7 @@ · 1 unmodified line | ||
| 23 | 38 | * Emulex |
| 24 | 39 | * 3333 Susan Street |
| 25 | 40 | * Costa Mesa, CA 92626 |
| 26 | − *******************************************************************/ | |
| 41 | + */ | |
| 27 | 42 | |
| 28 | 43 | #ifndef __OCRDMA_STATS_H__ |
| 29 | 44 | #define __OCRDMA_STATS_H__ |
| @@ -1,21 +1,36 @@ | ||
| 1 | −/******************************************************************* | |
| 2 | − * This file is part of the Emulex RoCE Device Driver for * | |
| 3 | − * RoCE (RDMA over Converged Ethernet) adapters. * | |
| 4 | − * Copyright (C) 2008-2012 Emulex. All rights reserved. * | |
| 5 | − * EMULEX and SLI are trademarks of Emulex. * | |
| 6 | − * www.emulex.com * | |
| 7 | − * * | |
| 8 | − * This program is free software; you can redistribute it and/or * | |
| 9 | − * modify it under the terms of version 2 of the GNU General * | |
| 10 | − * Public License as published by the Free Software Foundation. * | |
| 11 | − * This program is distributed in the hope that it will be useful. * | |
| 12 | − * ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND * | |
| 13 | − * WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, * | |
| 14 | − * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE * | |
| 15 | − * DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD * | |
| 16 | − * TO BE LEGALLY INVALID. See the GNU General Public License for * | |
| 17 | − * more details, a copy of which can be found in the file COPYING * | |
| 18 | − * included with this package. * | |
| 1 | +/* This file is part of the Emulex RoCE Device Driver for | |
| 2 | + * RoCE (RDMA over Converged Ethernet) adapters. | |
| 3 | + * Copyright (C) 2012-2015 Emulex. All rights reserved. | |
| 4 | + * EMULEX and SLI are trademarks of Emulex. | |
| 5 | + * www.emulex.com | |
| 6 | + * | |
| 7 | + * This software is available to you under a choice of one of two licenses. | |
| 8 | + * You may choose to be licensed under the terms of the GNU General Public | |
| 9 | + * License (GPL) Version 2, available from the file COPYING in the main | |
| 10 | + * directory of this source tree, or the BSD license below: | |
| 11 | + * | |
| 12 | + * Redistribution and use in source and binary forms, with or without | |
| 13 | + * modification, are permitted provided that the following conditions | |
| 14 | + * are met: | |
| 15 | + * | |
| 16 | + * - Redistributions of source code must retain the above copyright notice, | |
| 17 | + * this list of conditions and the following disclaimer. | |
| 18 | + * | |
| 19 | + * - Redistributions in binary form must reproduce the above copyright | |
| 20 | + * notice, this list of conditions and the following disclaimer in | |
| 21 | + * the documentation and/or other materials provided with the distribution. | |
| 22 | + * | |
| 23 | + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" | |
| 24 | + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,THE | |
| 25 | + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE | |
| 26 | + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE | |
| 27 | + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR | |
| 28 | + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF | |
| 29 | + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR | |
| 30 | + * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, | |
| 31 | + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR | |
| 32 | + * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF | |
| 33 | + * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. | |
| 19 | 34 | * |
| 20 | 35 | * Contact Information: |
| 21 | 36 | * linux-drivers@emulex.com |
| @@ -23,7 +38,7 @@ · 1 unmodified line | ||
| 23 | 38 | * Emulex |
| 24 | 39 | * 3333 Susan Street |
| 25 | 40 | * Costa Mesa, CA 92626 |
| 26 | − *******************************************************************/ | |
| 41 | + */ | |
| 27 | 42 | |
| 28 | 43 | #include <linux/dma-mapping.h> |
| 29 | 44 | #include <rdma/ib_verbs.h> |
| @@ -1,21 +1,36 @@ | ||
| 1 | −/******************************************************************* | |
| 2 | − * This file is part of the Emulex RoCE Device Driver for * | |
| 3 | − * RoCE (RDMA over Converged Ethernet) adapters. * | |
| 4 | − * Copyright (C) 2008-2012 Emulex. All rights reserved. * | |
| 5 | − * EMULEX and SLI are trademarks of Emulex. * | |
| 6 | − * www.emulex.com * | |
| 7 | − * * | |
| 8 | − * This program is free software; you can redistribute it and/or * | |
| 9 | − * modify it under the terms of version 2 of the GNU General * | |
| 10 | − * Public License as published by the Free Software Foundation. * | |
| 11 | − * This program is distributed in the hope that it will be useful. * | |
| 12 | − * ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND * | |
| 13 | − * WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, * | |
| 14 | − * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE * | |
| 15 | − * DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD * | |
| 16 | − * TO BE LEGALLY INVALID. See the GNU General Public License for * | |
| 17 | − * more details, a copy of which can be found in the file COPYING * | |
| 18 | − * included with this package. * | |
| 1 | +/* This file is part of the Emulex RoCE Device Driver for | |
| 2 | + * RoCE (RDMA over Converged Ethernet) adapters. | |
| 3 | + * Copyright (C) 2012-2015 Emulex. All rights reserved. | |
| 4 | + * EMULEX and SLI are trademarks of Emulex. | |
| 5 | + * www.emulex.com | |
| 6 | + * | |
| 7 | + * This software is available to you under a choice of one of two licenses. | |
| 8 | + * You may choose to be licensed under the terms of the GNU General Public | |
| 9 | + * License (GPL) Version 2, available from the file COPYING in the main | |
| 10 | + * directory of this source tree, or the BSD license below: | |
| 11 | + * | |
| 12 | + * Redistribution and use in source and binary forms, with or without | |
| 13 | + * modification, are permitted provided that the following conditions | |
| 14 | + * are met: | |
| 15 | + * | |
| 16 | + * - Redistributions of source code must retain the above copyright notice, | |
| 17 | + * this list of conditions and the following disclaimer. | |
| 18 | + * | |
| 19 | + * - Redistributions in binary form must reproduce the above copyright | |
| 20 | + * notice, this list of conditions and the following disclaimer in | |
| 21 | + * the documentation and/or other materials provided with the distribution. | |
| 22 | + * | |
| 23 | + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" | |
| 24 | + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,THE | |
| 25 | + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE | |
| 26 | + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE | |
| 27 | + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR | |
| 28 | + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF | |
| 29 | + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR | |
| 30 | + * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, | |
| 31 | + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR | |
| 32 | + * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF | |
| 33 | + * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. | |
| 19 | 34 | * |
| 20 | 35 | * Contact Information: |
| 21 | 36 | * linux-drivers@emulex.com |
| @@ -23,7 +38,7 @@ · 1 unmodified line | ||
| 23 | 38 | * Emulex |
| 24 | 39 | * 3333 Susan Street |
| 25 | 40 | * Costa Mesa, CA 92626 |
| 26 | − *******************************************************************/ | |
| 41 | + */ | |
| 27 | 42 | |
| 28 | 43 | #ifndef __OCRDMA_VERBS_H__ |
| 29 | 44 | #define __OCRDMA_VERBS_H__ |
| @@ -177,7 +177,8 @@ int ipoib_transport_dev_init(struct net_device *dev, struct ib_device *ca) · 176 unmodified lines | ||
| 177 | 177 | else |
| 178 | 178 | size += ipoib_recvq_size * ipoib_max_conn_qp; |
| 179 | 179 | } else |
| 180 | − goto out_free_wq; | |
| 180 | + if (ret != -ENOSYS) | |
| 181 | + goto out_free_wq; | |
| 181 | 182 | |
| 182 | 183 | cq_attr.cqe = size; |
| 183 | 184 | priv->recv_cq = ib_create_cq(priv->ca, ipoib_ib_completion, NULL, |
| @@ -775,6 +775,17 @@ isert_connect_request(struct rdma_cm_id *cma_id, struct rdma_cm_event *event) · 774 unmodified lines | ||
| 775 | 775 | ret = isert_rdma_post_recvl(isert_conn); |
| 776 | 776 | if (ret) |
| 777 | 777 | goto out_conn_dev; |
| 778 | + /* | |
| 779 | + * Obtain the second reference now before isert_rdma_accept() to | |
| 780 | + * ensure that any initiator generated REJECT CM event that occurs | |
| 781 | + * asynchronously won't drop the last reference until the error path | |
| 782 | + * in iscsi_target_login_sess_out() does it's ->iscsit_free_conn() -> | |
| 783 | + * isert_free_conn() -> isert_put_conn() -> kref_put(). | |
| 784 | + */ | |
| 785 | + if (!kref_get_unless_zero(&isert_conn->kref)) { | |
| 786 | + isert_warn("conn %p connect_release is running\n", isert_conn); | |
| 787 | + goto out_conn_dev; | |
| 788 | + } | |
| 778 | 789 | |
| 779 | 790 | ret = isert_rdma_accept(isert_conn); |
| 780 | 791 | if (ret) |
| @@ -836,11 +847,6 @@ isert_connected_handler(struct rdma_cm_id *cma_id) · 55 unmodified lines | ||
| 836 | 847 | |
| 837 | 848 | isert_info("conn %p\n", isert_conn); |
| 838 | 849 | |
| 839 | − if (!kref_get_unless_zero(&isert_conn->kref)) { | |
| 840 | − isert_warn("conn %p connect_release is running\n", isert_conn); | |
| 841 | − return; | |
| 842 | − } | |
| 843 | − | |
| 844 | 850 | mutex_lock(&isert_conn->mutex); |
| 845 | 851 | if (isert_conn->state != ISER_CONN_FULL_FEATURE) |
| 846 | 852 | isert_conn->state = ISER_CONN_UP; |
| @@ -71,6 +71,18 @@ static void input_leds_event(struct input_handle *handle, unsigned int type, · 70 unmodified lines | ||
| 71 | 71 | { |
| 72 | 72 | } |
| 73 | 73 | |
| 74 | +static int input_leds_get_count(struct input_dev *dev) | |
| 75 | +{ | |
| 76 | + unsigned int led_code; | |
| 77 | + int count = 0; | |
| 78 | + | |
| 79 | + for_each_set_bit(led_code, dev->ledbit, LED_CNT) | |
| 80 | + if (input_led_info[led_code].name) | |
| 81 | + count++; | |
| 82 | + | |
| 83 | + return count; | |
| 84 | +} | |
| 85 | + | |
| 74 | 86 | static int input_leds_connect(struct input_handler *handler, |
| 75 | 87 | struct input_dev *dev, |
| 76 | 88 | const struct input_device_id *id) |
| @@ -81,7 +93,7 @@ static int input_leds_connect(struct input_handler *handler, · 4 unmodified lines | ||
| 81 | 93 | int led_no; |
| 82 | 94 | int error; |
| 83 | 95 | |
| 84 | − num_leds = bitmap_weight(dev->ledbit, LED_CNT); | |
| 96 | + num_leds = input_leds_get_count(dev); | |
| 85 | 97 | if (!num_leds) |
| 86 | 98 | return -ENXIO; |
| 87 | 99 | |
| @@ -112,7 +124,7 @@ static int input_leds_connect(struct input_handler *handler, · 24 unmodified lines | ||
| 112 | 124 | led->handle = &leds->handle; |
| 113 | 125 | led->code = led_code; |
| 114 | 126 | |
| 115 | − if (WARN_ON(!input_led_info[led_code].name)) | |
| 127 | + if (!input_led_info[led_code].name) | |
| 116 | 128 | continue; |
| 117 | 129 | |
| 118 | 130 | led->cdev.name = kasprintf(GFP_KERNEL, "%s::%s", |
| @@ -196,7 +196,7 @@ static struct tgfx __init *tgfx_probe(int parport, int *n_buttons, int n_devs) · 195 unmodified lines | ||
| 196 | 196 | if (n_buttons[i] < 1) |
| 197 | 197 | continue; |
| 198 | 198 | |
| 199 | − if (n_buttons[i] > 6) { | |
| 199 | + if (n_buttons[i] > ARRAY_SIZE(tgfx_buttons)) { | |
| 200 | 200 | printk(KERN_ERR "turbografx.c: Invalid number of buttons %d\n", n_buttons[i]); |
| 201 | 201 | err = -EINVAL; |
| 202 | 202 | goto err_unreg_devs; |
| @@ -292,3 +292,4 @@ module_platform_driver(axp20x_pek_driver); · 291 unmodified lines | ||
| 292 | 292 | MODULE_DESCRIPTION("axp20x Power Button"); |
| 293 | 293 | MODULE_AUTHOR("Carlo Caione <carlo@caione.org>"); |
| 294 | 294 | MODULE_LICENSE("GPL"); |
| 295 | +MODULE_ALIAS("platform:axp20x-pek"); | |
| @@ -183,7 +183,8 @@ static bool twl4030_vibra_check_coexist(struct twl4030_vibra_data *pdata, · 182 unmodified lines | ||
| 183 | 183 | if (pdata && pdata->coexist) |
| 184 | 184 | return true; |
| 185 | 185 | |
| 186 | − if (of_find_node_by_name(node, "codec")) { | |
| 186 | + node = of_find_node_by_name(node, "codec"); | |
| 187 | + if (node) { | |
| 187 | 188 | of_node_put(node); |
| 188 | 189 | return true; |
| 189 | 190 | } |
| @@ -20,6 +20,7 @@ · 19 unmodified lines | ||
| 20 | 20 | #include <linux/input/mt.h> |
| 21 | 21 | #include <linux/serio.h> |
| 22 | 22 | #include <linux/libps2.h> |
| 23 | +#include <linux/dmi.h> | |
| 23 | 24 | |
| 24 | 25 | #include "psmouse.h" |
| 25 | 26 | #include "alps.h" |
| @@ -99,6 +100,7 @@ static const struct alps_nibble_commands alps_v6_nibble_commands[] = { · 73 unmodified lines | ||
| 99 | 100 | #define ALPS_FOUR_BUTTONS 0x40 /* 4 direction button present */ |
| 100 | 101 | #define ALPS_PS2_INTERLEAVED 0x80 /* 3-byte PS/2 packet interleaved with |
| 101 | 102 | 6-byte ALPS packet */ |
| 103 | +#define ALPS_DELL 0x100 /* device is a Dell laptop */ | |
| 102 | 104 | #define ALPS_BUTTONPAD 0x200 /* device is a clickpad */ |
| 103 | 105 | |
| 104 | 106 | static const struct alps_model_info alps_model_data[] = { |
| @@ -251,9 +253,9 @@ static void alps_process_packet_v1_v2(struct psmouse *psmouse) · 146 unmodified lines | ||
| 251 | 253 | return; |
| 252 | 254 | } |
| 253 | 255 | |
| 254 | − /* Non interleaved V2 dualpoint has separate stick button bits */ | |
| 256 | + /* Dell non interleaved V2 dualpoint has separate stick button bits */ | |
| 255 | 257 | if (priv->proto_version == ALPS_PROTO_V2 && |
| 256 | − priv->flags == (ALPS_PASS | ALPS_DUALPOINT)) { | |
| 258 | + priv->flags == (ALPS_DELL | ALPS_PASS | ALPS_DUALPOINT)) { | |
| 257 | 259 | left |= packet[0] & 1; |
| 258 | 260 | right |= packet[0] & 2; |
| 259 | 261 | middle |= packet[0] & 4; |
| @@ -2550,6 +2552,8 @@ static int alps_set_protocol(struct psmouse *psmouse, · 2290 unmodified lines | ||
| 2550 | 2552 | priv->byte0 = protocol->byte0; |
| 2551 | 2553 | priv->mask0 = protocol->mask0; |
| 2552 | 2554 | priv->flags = protocol->flags; |
| 2555 | + if (dmi_name_in_vendors("Dell")) | |
| 2556 | + priv->flags |= ALPS_DELL; | |
| 2553 | 2557 | |
| 2554 | 2558 | priv->x_max = 2000; |
| 2555 | 2559 | priv->y_max = 1400; |
| @@ -2,6 +2,7 @@ · 1 unmodified line | ||
| 2 | 2 | * Apple USB BCM5974 (Macbook Air and Penryn Macbook Pro) multitouch driver |
| 3 | 3 | * |
| 4 | 4 | * Copyright (C) 2008 Henrik Rydberg (rydberg@euromail.se) |
| 5 | + * Copyright (C) 2015 John Horan (knasher@gmail.com) | |
| 5 | 6 | * |
| 6 | 7 | * The USB initialization and package decoding was made by |
| 7 | 8 | * Scott Shawcroft as part of the touchd user-space driver project: |
| @@ -91,6 +92,10 @@ · 83 unmodified lines | ||
| 91 | 92 | #define USB_DEVICE_ID_APPLE_WELLSPRING8_ANSI 0x0290 |
| 92 | 93 | #define USB_DEVICE_ID_APPLE_WELLSPRING8_ISO 0x0291 |
| 93 | 94 | #define USB_DEVICE_ID_APPLE_WELLSPRING8_JIS 0x0292 |
| 95 | +/* MacbookPro12,1 (2015) */ | |
| 96 | +#define USB_DEVICE_ID_APPLE_WELLSPRING9_ANSI 0x0272 | |
| 97 | +#define USB_DEVICE_ID_APPLE_WELLSPRING9_ISO 0x0273 | |
| 98 | +#define USB_DEVICE_ID_APPLE_WELLSPRING9_JIS 0x0274 | |
| 94 | 99 | |
| 95 | 100 | #define BCM5974_DEVICE(prod) { \ |
| 96 | 101 | .match_flags = (USB_DEVICE_ID_MATCH_DEVICE | \ |
| @@ -152,6 +157,10 @@ static const struct usb_device_id bcm5974_table[] = { · 55 unmodified lines | ||
| 152 | 157 | BCM5974_DEVICE(USB_DEVICE_ID_APPLE_WELLSPRING8_ANSI), |
| 153 | 158 | BCM5974_DEVICE(USB_DEVICE_ID_APPLE_WELLSPRING8_ISO), |
| 154 | 159 | BCM5974_DEVICE(USB_DEVICE_ID_APPLE_WELLSPRING8_JIS), |
| 160 | + /* MacbookPro12,1 */ | |
| 161 | + BCM5974_DEVICE(USB_DEVICE_ID_APPLE_WELLSPRING9_ANSI), | |
| 162 | + BCM5974_DEVICE(USB_DEVICE_ID_APPLE_WELLSPRING9_ISO), | |
| 163 | + BCM5974_DEVICE(USB_DEVICE_ID_APPLE_WELLSPRING9_JIS), | |
| 155 | 164 | /* Terminating entry */ |
| 156 | 165 | {} |
| 157 | 166 | }; |
| @@ -180,21 +189,47 @@ struct bt_data { · 22 unmodified lines | ||
| 180 | 189 | enum tp_type { |
| 181 | 190 | TYPE1, /* plain trackpad */ |
| 182 | 191 | TYPE2, /* button integrated in trackpad */ |
| 183 | − TYPE3 /* additional header fields since June 2013 */ | |
| 192 | + TYPE3, /* additional header fields since June 2013 */ | |
| 193 | + TYPE4 /* additional header field for pressure data */ | |
| 184 | 194 | }; |
| 185 | 195 | |
| 186 | 196 | /* trackpad finger data offsets, le16-aligned */ |
| 187 | −#define FINGER_TYPE1 (13 * sizeof(__le16)) | |
| 188 | −#define FINGER_TYPE2 (15 * sizeof(__le16)) | |
| 189 | −#define FINGER_TYPE3 (19 * sizeof(__le16)) | |
| 197 | +#define HEADER_TYPE1 (13 * sizeof(__le16)) | |
| 198 | +#define HEADER_TYPE2 (15 * sizeof(__le16)) | |
| 199 | +#define HEADER_TYPE3 (19 * sizeof(__le16)) | |
| 200 | +#define HEADER_TYPE4 (23 * sizeof(__le16)) | |
| 190 | 201 | |
| 191 | 202 | /* trackpad button data offsets */ |
| 203 | +#define BUTTON_TYPE1 0 | |
| 192 | 204 | #define BUTTON_TYPE2 15 |
| 193 | 205 | #define BUTTON_TYPE3 23 |
| 206 | +#define BUTTON_TYPE4 31 | |
| 194 | 207 | |
| 195 | 208 | /* list of device capability bits */ |
| 196 | 209 | #define HAS_INTEGRATED_BUTTON 1 |
| 197 | 210 | |
| 211 | +/* trackpad finger data block size */ | |
| 212 | +#define FSIZE_TYPE1 (14 * sizeof(__le16)) | |
| 213 | +#define FSIZE_TYPE2 (14 * sizeof(__le16)) | |
| 214 | +#define FSIZE_TYPE3 (14 * sizeof(__le16)) | |
| 215 | +#define FSIZE_TYPE4 (15 * sizeof(__le16)) | |
| 216 | + | |
| 217 | +/* offset from header to finger struct */ | |
| 218 | +#define DELTA_TYPE1 (0 * sizeof(__le16)) | |
| 219 | +#define DELTA_TYPE2 (0 * sizeof(__le16)) | |
| 220 | +#define DELTA_TYPE3 (0 * sizeof(__le16)) | |
| 221 | +#define DELTA_TYPE4 (1 * sizeof(__le16)) | |
| 222 | + | |
| 223 | +/* usb control message mode switch data */ | |
| 224 | +#define USBMSG_TYPE1 8, 0x300, 0, 0, 0x1, 0x8 | |
| 225 | +#define USBMSG_TYPE2 8, 0x300, 0, 0, 0x1, 0x8 | |
| 226 | +#define USBMSG_TYPE3 8, 0x300, 0, 0, 0x1, 0x8 | |
| 227 | +#define USBMSG_TYPE4 2, 0x302, 2, 1, 0x1, 0x0 | |
| 228 | + | |
| 229 | +/* Wellspring initialization constants */ | |
| 230 | +#define BCM5974_WELLSPRING_MODE_READ_REQUEST_ID 1 | |
| 231 | +#define BCM5974_WELLSPRING_MODE_WRITE_REQUEST_ID 9 | |
| 232 | + | |
| 198 | 233 | /* trackpad finger structure, le16-aligned */ |
| 199 | 234 | struct tp_finger { |
| 200 | 235 | __le16 origin; /* zero when switching track finger */ |
| @@ -207,14 +242,13 @@ struct tp_finger { · 6 unmodified lines | ||
| 207 | 242 | __le16 orientation; /* 16384 when point, else 15 bit angle */ |
| 208 | 243 | __le16 touch_major; /* touch area, major axis */ |
| 209 | 244 | __le16 touch_minor; /* touch area, minor axis */ |
| 210 | − __le16 unused[3]; /* zeros */ | |
| 245 | + __le16 unused[2]; /* zeros */ | |
| 246 | + __le16 pressure; /* pressure on forcetouch touchpad */ | |
| 211 | 247 | __le16 multi; /* one finger: varies, more fingers: constant */ |
| 212 | 248 | } __attribute__((packed,aligned(2))); |
| 213 | 249 | |
| 214 | 250 | /* trackpad finger data size, empirically at least ten fingers */ |
| 215 | 251 | #define MAX_FINGERS 16 |
| 216 | −#define SIZEOF_FINGER sizeof(struct tp_finger) | |
| 217 | −#define SIZEOF_ALL_FINGERS (MAX_FINGERS * SIZEOF_FINGER) | |
| 218 | 252 | #define MAX_FINGER_ORIENTATION 16384 |
| 219 | 253 | |
| 220 | 254 | /* device-specific parameters */ |
| @@ -232,8 +266,17 @@ struct bcm5974_config { · 11 unmodified lines | ||
| 232 | 266 | int bt_datalen; /* data length of the button interface */ |
| 233 | 267 | int tp_ep; /* the endpoint of the trackpad interface */ |
| 234 | 268 | enum tp_type tp_type; /* type of trackpad interface */ |
| 235 | − int tp_offset; /* offset to trackpad finger data */ | |
| 269 | + int tp_header; /* bytes in header block */ | |
| 236 | 270 | int tp_datalen; /* data length of the trackpad interface */ |
| 271 | + int tp_button; /* offset to button data */ | |
| 272 | + int tp_fsize; /* bytes in single finger block */ | |
| 273 | + int tp_delta; /* offset from header to finger struct */ | |
| 274 | + int um_size; /* usb control message length */ | |
| 275 | + int um_req_val; /* usb control message value */ | |
| 276 | + int um_req_idx; /* usb control message index */ | |
| 277 | + int um_switch_idx; /* usb control message mode switch index */ | |
| 278 | + int um_switch_on; /* usb control message mode switch on */ | |
| 279 | + int um_switch_off; /* usb control message mode switch off */ | |
| 237 | 280 | struct bcm5974_param p; /* finger pressure limits */ |
| 238 | 281 | struct bcm5974_param w; /* finger width limits */ |
| 239 | 282 | struct bcm5974_param x; /* horizontal limits */ |
| @@ -259,6 +302,24 @@ struct bcm5974 { · 19 unmodified lines | ||
| 259 | 302 | int slots[MAX_FINGERS]; /* slot assignments */ |
| 260 | 303 | }; |
| 261 | 304 | |
| 305 | +/* trackpad finger block data, le16-aligned */ | |
| 306 | +static const struct tp_finger *get_tp_finger(const struct bcm5974 *dev, int i) | |
| 307 | +{ | |
| 308 | + const struct bcm5974_config *c = &dev->cfg; | |
| 309 | + u8 *f_base = dev->tp_data + c->tp_header + c->tp_delta; | |
| 310 | + | |
| 311 | + return (const struct tp_finger *)(f_base + i * c->tp_fsize); | |
| 312 | +} | |
| 313 | + | |
| 314 | +#define DATAFORMAT(type) \ | |
| 315 | + type, \ | |
| 316 | + HEADER_##type, \ | |
| 317 | + HEADER_##type + (MAX_FINGERS) * (FSIZE_##type), \ | |
| 318 | + BUTTON_##type, \ | |
| 319 | + FSIZE_##type, \ | |
| 320 | + DELTA_##type, \ | |
| 321 | + USBMSG_##type | |
| 322 | + | |
| 262 | 323 | /* logical signal quality */ |
| 263 | 324 | #define SN_PRESSURE 45 /* pressure signal-to-noise ratio */ |
| 264 | 325 | #define SN_WIDTH 25 /* width signal-to-noise ratio */ |
| @@ -273,7 +334,7 @@ static const struct bcm5974_config bcm5974_config_table[] = { · 8 unmodified lines | ||
| 273 | 334 | USB_DEVICE_ID_APPLE_WELLSPRING_JIS, |
| 274 | 335 | 0, |
| 275 | 336 | 0x84, sizeof(struct bt_data), |
| 276 | − 0x81, TYPE1, FINGER_TYPE1, FINGER_TYPE1 + SIZEOF_ALL_FINGERS, | |
| 337 | + 0x81, DATAFORMAT(TYPE1), | |
| 277 | 338 | { SN_PRESSURE, 0, 256 }, |
| 278 | 339 | { SN_WIDTH, 0, 2048 }, |
| 279 | 340 | { SN_COORD, -4824, 5342 }, |
| @@ -286,7 +347,7 @@ static const struct bcm5974_config bcm5974_config_table[] = { · 6 unmodified lines | ||
| 286 | 347 | USB_DEVICE_ID_APPLE_WELLSPRING2_JIS, |
| 287 | 348 | 0, |
| 288 | 349 | 0x84, sizeof(struct bt_data), |
| 289 | − 0x81, TYPE1, FINGER_TYPE1, FINGER_TYPE1 + SIZEOF_ALL_FINGERS, | |
| 350 | + 0x81, DATAFORMAT(TYPE1), | |
| 290 | 351 | { SN_PRESSURE, 0, 256 }, |
| 291 | 352 | { SN_WIDTH, 0, 2048 }, |
| 292 | 353 | { SN_COORD, -4824, 4824 }, |
| @@ -299,7 +360,7 @@ static const struct bcm5974_config bcm5974_config_table[] = { · 6 unmodified lines | ||
| 299 | 360 | USB_DEVICE_ID_APPLE_WELLSPRING3_JIS, |
| 300 | 361 | HAS_INTEGRATED_BUTTON, |
| 301 | 362 | 0x84, sizeof(struct bt_data), |
| 302 | − 0x81, TYPE2, FINGER_TYPE2, FINGER_TYPE2 + SIZEOF_ALL_FINGERS, | |
| 363 | + 0x81, DATAFORMAT(TYPE2), | |
| 303 | 364 | { SN_PRESSURE, 0, 300 }, |
| 304 | 365 | { SN_WIDTH, 0, 2048 }, |
| 305 | 366 | { SN_COORD, -4460, 5166 }, |
| @@ -312,7 +373,7 @@ static const struct bcm5974_config bcm5974_config_table[] = { · 6 unmodified lines | ||
| 312 | 373 | USB_DEVICE_ID_APPLE_WELLSPRING4_JIS, |
| 313 | 374 | HAS_INTEGRATED_BUTTON, |
| 314 | 375 | 0x84, sizeof(struct bt_data), |
| 315 | − 0x81, TYPE2, FINGER_TYPE2, FINGER_TYPE2 + SIZEOF_ALL_FINGERS, | |
| 376 | + 0x81, DATAFORMAT(TYPE2), | |
| 316 | 377 | { SN_PRESSURE, 0, 300 }, |
| 317 | 378 | { SN_WIDTH, 0, 2048 }, |
| 318 | 379 | { SN_COORD, -4620, 5140 }, |
| @@ -325,7 +386,7 @@ static const struct bcm5974_config bcm5974_config_table[] = { · 6 unmodified lines | ||
| 325 | 386 | USB_DEVICE_ID_APPLE_WELLSPRING4A_JIS, |
| 326 | 387 | HAS_INTEGRATED_BUTTON, |
| 327 | 388 | 0x84, sizeof(struct bt_data), |
| 328 | − 0x81, TYPE2, FINGER_TYPE2, FINGER_TYPE2 + SIZEOF_ALL_FINGERS, | |
| 389 | + 0x81, DATAFORMAT(TYPE2), | |
| 329 | 390 | { SN_PRESSURE, 0, 300 }, |
| 330 | 391 | { SN_WIDTH, 0, 2048 }, |
| 331 | 392 | { SN_COORD, -4616, 5112 }, |
| @@ -338,7 +399,7 @@ static const struct bcm5974_config bcm5974_config_table[] = { · 6 unmodified lines | ||
| 338 | 399 | USB_DEVICE_ID_APPLE_WELLSPRING5_JIS, |
| 339 | 400 | HAS_INTEGRATED_BUTTON, |
| 340 | 401 | 0x84, sizeof(struct bt_data), |
| 341 | − 0x81, TYPE2, FINGER_TYPE2, FINGER_TYPE2 + SIZEOF_ALL_FINGERS, | |
| 402 | + 0x81, DATAFORMAT(TYPE2), | |
| 342 | 403 | { SN_PRESSURE, 0, 300 }, |
| 343 | 404 | { SN_WIDTH, 0, 2048 }, |
| 344 | 405 | { SN_COORD, -4415, 5050 }, |
| @@ -351,7 +412,7 @@ static const struct bcm5974_config bcm5974_config_table[] = { · 6 unmodified lines | ||
| 351 | 412 | USB_DEVICE_ID_APPLE_WELLSPRING6_JIS, |
| 352 | 413 | HAS_INTEGRATED_BUTTON, |
| 353 | 414 | 0x84, sizeof(struct bt_data), |
| 354 | − 0x81, TYPE2, FINGER_TYPE2, FINGER_TYPE2 + SIZEOF_ALL_FINGERS, | |
| 415 | + 0x81, DATAFORMAT(TYPE2), | |
| 355 | 416 | { SN_PRESSURE, 0, 300 }, |
| 356 | 417 | { SN_WIDTH, 0, 2048 }, |
| 357 | 418 | { SN_COORD, -4620, 5140 }, |
| @@ -364,7 +425,7 @@ static const struct bcm5974_config bcm5974_config_table[] = { · 6 unmodified lines | ||
| 364 | 425 | USB_DEVICE_ID_APPLE_WELLSPRING5A_JIS, |
| 365 | 426 | HAS_INTEGRATED_BUTTON, |
| 366 | 427 | 0x84, sizeof(struct bt_data), |
| 367 | − 0x81, TYPE2, FINGER_TYPE2, FINGER_TYPE2 + SIZEOF_ALL_FINGERS, | |
| 428 | + 0x81, DATAFORMAT(TYPE2), | |
| 368 | 429 | { SN_PRESSURE, 0, 300 }, |
| 369 | 430 | { SN_WIDTH, 0, 2048 }, |
| 370 | 431 | { SN_COORD, -4750, 5280 }, |
| @@ -377,7 +438,7 @@ static const struct bcm5974_config bcm5974_config_table[] = { · 6 unmodified lines | ||
| 377 | 438 | USB_DEVICE_ID_APPLE_WELLSPRING6A_JIS, |
| 378 | 439 | HAS_INTEGRATED_BUTTON, |
| 379 | 440 | 0x84, sizeof(struct bt_data), |
| 380 | − 0x81, TYPE2, FINGER_TYPE2, FINGER_TYPE2 + SIZEOF_ALL_FINGERS, | |
| 441 | + 0x81, DATAFORMAT(TYPE2), | |
| 381 | 442 | { SN_PRESSURE, 0, 300 }, |
| 382 | 443 | { SN_WIDTH, 0, 2048 }, |
| 383 | 444 | { SN_COORD, -4620, 5140 }, |
| @@ -390,7 +451,7 @@ static const struct bcm5974_config bcm5974_config_table[] = { · 6 unmodified lines | ||
| 390 | 451 | USB_DEVICE_ID_APPLE_WELLSPRING7_JIS, |
| 391 | 452 | HAS_INTEGRATED_BUTTON, |
| 392 | 453 | 0x84, sizeof(struct bt_data), |
| 393 | − 0x81, TYPE2, FINGER_TYPE2, FINGER_TYPE2 + SIZEOF_ALL_FINGERS, | |
| 454 | + 0x81, DATAFORMAT(TYPE2), | |
| 394 | 455 | { SN_PRESSURE, 0, 300 }, |
| 395 | 456 | { SN_WIDTH, 0, 2048 }, |
| 396 | 457 | { SN_COORD, -4750, 5280 }, |
| @@ -403,7 +464,7 @@ static const struct bcm5974_config bcm5974_config_table[] = { · 6 unmodified lines | ||
| 403 | 464 | USB_DEVICE_ID_APPLE_WELLSPRING7A_JIS, |
| 404 | 465 | HAS_INTEGRATED_BUTTON, |
| 405 | 466 | 0x84, sizeof(struct bt_data), |
| 406 | − 0x81, TYPE2, FINGER_TYPE2, FINGER_TYPE2 + SIZEOF_ALL_FINGERS, | |
| 467 | + 0x81, DATAFORMAT(TYPE2), | |
| 407 | 468 | { SN_PRESSURE, 0, 300 }, |
| 408 | 469 | { SN_WIDTH, 0, 2048 }, |
| 409 | 470 | { SN_COORD, -4750, 5280 }, |
| @@ -416,13 +477,26 @@ static const struct bcm5974_config bcm5974_config_table[] = { · 6 unmodified lines | ||
| 416 | 477 | USB_DEVICE_ID_APPLE_WELLSPRING8_JIS, |
| 417 | 478 | HAS_INTEGRATED_BUTTON, |
| 418 | 479 | 0, sizeof(struct bt_data), |
| 419 | − 0x83, TYPE3, FINGER_TYPE3, FINGER_TYPE3 + SIZEOF_ALL_FINGERS, | |
| 480 | + 0x83, DATAFORMAT(TYPE3), | |
| 420 | 481 | { SN_PRESSURE, 0, 300 }, |
| 421 | 482 | { SN_WIDTH, 0, 2048 }, |
| 422 | 483 | { SN_COORD, -4620, 5140 }, |
| 423 | 484 | { SN_COORD, -150, 6600 }, |
| 424 | 485 | { SN_ORIENT, -MAX_FINGER_ORIENTATION, MAX_FINGER_ORIENTATION } |
| 425 | 486 | }, |
| 487 | + { | |
| 488 | + USB_DEVICE_ID_APPLE_WELLSPRING9_ANSI, | |
| 489 | + USB_DEVICE_ID_APPLE_WELLSPRING9_ISO, | |
| 490 | + USB_DEVICE_ID_APPLE_WELLSPRING9_JIS, | |
| 491 | + HAS_INTEGRATED_BUTTON, | |
| 492 | + 0, sizeof(struct bt_data), | |
| 493 | + 0x83, DATAFORMAT(TYPE4), | |
| 494 | + { SN_PRESSURE, 0, 300 }, | |
| 495 | + { SN_WIDTH, 0, 2048 }, | |
| 496 | + { SN_COORD, -4828, 5345 }, | |
| 497 | + { SN_COORD, -203, 6803 }, | |
| 498 | + { SN_ORIENT, -MAX_FINGER_ORIENTATION, MAX_FINGER_ORIENTATION } | |
| 499 | + }, | |
| 426 | 500 | {} |
| 427 | 501 | }; |
| 428 | 502 | |
| @@ -549,19 +623,18 @@ static int report_tp_state(struct bcm5974 *dev, int size) · 120 unmodified lines | ||
| 549 | 623 | struct input_dev *input = dev->input; |
| 550 | 624 | int raw_n, i, n = 0; |
| 551 | 625 | |
| 552 | − if (size < c->tp_offset || (size - c->tp_offset) % SIZEOF_FINGER != 0) | |
| 626 | + if (size < c->tp_header || (size - c->tp_header) % c->tp_fsize != 0) | |
| 553 | 627 | return -EIO; |
| 554 | 628 | |
| 555 | − /* finger data, le16-aligned */ | |
| 556 | − f = (const struct tp_finger *)(dev->tp_data + c->tp_offset); | |
| 557 | − raw_n = (size - c->tp_offset) / SIZEOF_FINGER; | |
| 629 | + raw_n = (size - c->tp_header) / c->tp_fsize; | |
| 558 | 630 | |
| 559 | 631 | for (i = 0; i < raw_n; i++) { |
| 560 | − if (raw2int(f[i].touch_major) == 0) | |
| 632 | + f = get_tp_finger(dev, i); | |
| 633 | + if (raw2int(f->touch_major) == 0) | |
| 561 | 634 | continue; |
| 562 | − dev->pos[n].x = raw2int(f[i].abs_x); | |
| 563 | − dev->pos[n].y = c->y.min + c->y.max - raw2int(f[i].abs_y); | |
| 564 | − dev->index[n++] = &f[i]; | |
| 635 | + dev->pos[n].x = raw2int(f->abs_x); | |
| 636 | + dev->pos[n].y = c->y.min + c->y.max - raw2int(f->abs_y); | |
| 637 | + dev->index[n++] = f; | |
| 565 | 638 | } |
| 566 | 639 | |
| 567 | 640 | input_mt_assign_slots(input, dev->slots, dev->pos, n, 0); |
| @@ -572,32 +645,22 @@ static int report_tp_state(struct bcm5974 *dev, int size) · 4 unmodified lines | ||
| 572 | 645 | |
| 573 | 646 | input_mt_sync_frame(input); |
| 574 | 647 | |
| 575 | − report_synaptics_data(input, c, f, raw_n); | |
| 648 | + report_synaptics_data(input, c, get_tp_finger(dev, 0), raw_n); | |
| 576 | 649 | |
| 577 | − /* type 2 reports button events via ibt only */ | |
| 578 | − if (c->tp_type == TYPE2) { | |
| 579 | − int ibt = raw2int(dev->tp_data[BUTTON_TYPE2]); | |
| 650 | + /* later types report button events via integrated button only */ | |
| 651 | + if (c->caps & HAS_INTEGRATED_BUTTON) { | |
| 652 | + int ibt = raw2int(dev->tp_data[c->tp_button]); | |
| 580 | 653 | input_report_key(input, BTN_LEFT, ibt); |
| 581 | 654 | } |
| 582 | 655 | |
| 583 | − if (c->tp_type == TYPE3) | |
| 584 | − input_report_key(input, BTN_LEFT, dev->tp_data[BUTTON_TYPE3]); | |
| 585 | − | |
| 586 | 656 | input_sync(input); |
| 587 | 657 | |
| 588 | 658 | return 0; |
| 589 | 659 | } |
| 590 | 660 | |
| 591 | −/* Wellspring initialization constants */ | |
| 592 | −#define BCM5974_WELLSPRING_MODE_READ_REQUEST_ID 1 | |
| 593 | −#define BCM5974_WELLSPRING_MODE_WRITE_REQUEST_ID 9 | |
| 594 | −#define BCM5974_WELLSPRING_MODE_REQUEST_VALUE 0x300 | |
| 595 | −#define BCM5974_WELLSPRING_MODE_REQUEST_INDEX 0 | |
| 596 | −#define BCM5974_WELLSPRING_MODE_VENDOR_VALUE 0x01 | |
| 597 | −#define BCM5974_WELLSPRING_MODE_NORMAL_VALUE 0x08 | |
| 598 | − | |
| 599 | 661 | static int bcm5974_wellspring_mode(struct bcm5974 *dev, bool on) |
| 600 | 662 | { |
| 663 | + const struct bcm5974_config *c = &dev->cfg; | |
| 601 | 664 | int retval = 0, size; |
| 602 | 665 | char *data; |
| 603 | 666 | |
| @@ -605,7 +668,7 @@ static int bcm5974_wellspring_mode(struct bcm5974 *dev, bool on) · 1 unmodified line | ||
| 605 | 668 | if (dev->cfg.tp_type == TYPE3) |
| 606 | 669 | return 0; |
| 607 | 670 | |
| 608 | − data = kmalloc(8, GFP_KERNEL); | |
| 671 | + data = kmalloc(c->um_size, GFP_KERNEL); | |
| 609 | 672 | if (!data) { |
| 610 | 673 | dev_err(&dev->intf->dev, "out of memory\n"); |
| 611 | 674 | retval = -ENOMEM; |
| @@ -616,28 +679,24 @@ static int bcm5974_wellspring_mode(struct bcm5974 *dev, bool on) · 4 unmodified lines | ||
| 616 | 679 | size = usb_control_msg(dev->udev, usb_rcvctrlpipe(dev->udev, 0), |
| 617 | 680 | BCM5974_WELLSPRING_MODE_READ_REQUEST_ID, |
| 618 | 681 | USB_DIR_IN | USB_TYPE_CLASS | USB_RECIP_INTERFACE, |
| 619 | − BCM5974_WELLSPRING_MODE_REQUEST_VALUE, | |
| 620 | − BCM5974_WELLSPRING_MODE_REQUEST_INDEX, data, 8, 5000); | |
| 682 | + c->um_req_val, c->um_req_idx, data, c->um_size, 5000); | |
| 621 | 683 | |
| 622 | − if (size != 8) { | |
| 684 | + if (size != c->um_size) { | |
| 623 | 685 | dev_err(&dev->intf->dev, "could not read from device\n"); |
| 624 | 686 | retval = -EIO; |
| 625 | 687 | goto out; |
| 626 | 688 | } |
| 627 | 689 | |
| 628 | 690 | /* apply the mode switch */ |
| 629 | − data[0] = on ? | |
| 630 | − BCM5974_WELLSPRING_MODE_VENDOR_VALUE : | |
| 631 | − BCM5974_WELLSPRING_MODE_NORMAL_VALUE; | |
| 691 | + data[c->um_switch_idx] = on ? c->um_switch_on : c->um_switch_off; | |
| 632 | 692 | |
| 633 | 693 | /* write configuration */ |
| 634 | 694 | size = usb_control_msg(dev->udev, usb_sndctrlpipe(dev->udev, 0), |
| 635 | 695 | BCM5974_WELLSPRING_MODE_WRITE_REQUEST_ID, |
| 636 | 696 | USB_DIR_OUT | USB_TYPE_CLASS | USB_RECIP_INTERFACE, |
| 637 | − BCM5974_WELLSPRING_MODE_REQUEST_VALUE, | |
| 638 | − BCM5974_WELLSPRING_MODE_REQUEST_INDEX, data, 8, 5000); | |
| 697 | + c->um_req_val, c->um_req_idx, data, c->um_size, 5000); | |
| 639 | 698 | |
| 640 | − if (size != 8) { | |
| 699 | + if (size != c->um_size) { | |
| 641 | 700 | dev_err(&dev->intf->dev, "could not write to device\n"); |
| 642 | 701 | retval = -EIO; |
| 643 | 702 | goto out; |
| @@ -783,19 +783,26 @@ static int elantech_packet_check_v4(struct psmouse *psmouse) · 782 unmodified lines | ||
| 783 | 783 | struct elantech_data *etd = psmouse->private; |
| 784 | 784 | unsigned char *packet = psmouse->packet; |
| 785 | 785 | unsigned char packet_type = packet[3] & 0x03; |
| 786 | + unsigned int ic_version; | |
| 786 | 787 | bool sanity_check; |
| 787 | 788 | |
| 788 | 789 | if (etd->tp_dev && (packet[3] & 0x0f) == 0x06) |
| 789 | 790 | return PACKET_TRACKPOINT; |
| 790 | 791 | |
| 792 | + /* This represents the version of IC body. */ | |
| 793 | + ic_version = (etd->fw_version & 0x0f0000) >> 16; | |
| 794 | + | |
| 791 | 795 | /* |
| 792 | 796 | * Sanity check based on the constant bits of a packet. |
| 793 | 797 | * The constant bits change depending on the value of |
| 794 | − * the hardware flag 'crc_enabled' but are the same for | |
| 795 | − * every packet, regardless of the type. | |
| 798 | + * the hardware flag 'crc_enabled' and the version of | |
| 799 | + * the IC body, but are the same for every packet, | |
| 800 | + * regardless of the type. | |
| 796 | 801 | */ |
| 797 | 802 | if (etd->crc_enabled) |
| 798 | 803 | sanity_check = ((packet[3] & 0x08) == 0x00); |
| 804 | + else if (ic_version == 7 && etd->samples[1] == 0x2A) | |
| 805 | + sanity_check = ((packet[3] & 0x1c) == 0x10); | |
| 799 | 806 | else |
| 800 | 807 | sanity_check = ((packet[0] & 0x0c) == 0x04 && |
| 801 | 808 | (packet[3] & 0x1c) == 0x10); |
| @@ -1116,6 +1123,7 @@ static int elantech_get_resolution_v4(struct psmouse *psmouse, · 314 unmodified lines | ||
| 1116 | 1123 | * Avatar AVIU-145A2 0x361f00 ? clickpad |
| 1117 | 1124 | * Fujitsu LIFEBOOK E544 0x470f00 d0, 12, 09 2 hw buttons |
| 1118 | 1125 | * Fujitsu LIFEBOOK E554 0x570f01 40, 14, 0c 2 hw buttons |
| 1126 | + * Fujitsu T725 0x470f01 05, 12, 09 2 hw buttons | |
| 1119 | 1127 | * Fujitsu H730 0x570f00 c0, 14, 0c 3 hw buttons (**) |
| 1120 | 1128 | * Gigabyte U2442 0x450f01 58, 17, 0c 2 hw buttons |
| 1121 | 1129 | * Lenovo L430 0x350f02 b9, 15, 0c 2 hw buttons (*) |
| @@ -1167,7 +1175,7 @@ static int elantech_set_input_params(struct psmouse *psmouse) · 45 unmodified lines | ||
| 1167 | 1175 | struct input_dev *dev = psmouse->dev; |
| 1168 | 1176 | struct elantech_data *etd = psmouse->private; |
| 1169 | 1177 | unsigned int x_min = 0, y_min = 0, x_max = 0, y_max = 0, width = 0; |
| 1170 | − unsigned int x_res = 0, y_res = 0; | |
| 1178 | + unsigned int x_res = 31, y_res = 31; | |
| 1171 | 1179 | |
| 1172 | 1180 | if (elantech_set_range(psmouse, &x_min, &y_min, &x_max, &y_max, &width)) |
| 1173 | 1181 | return -1; |
| @@ -1232,8 +1240,6 @@ static int elantech_set_input_params(struct psmouse *psmouse) · 58 unmodified lines | ||
| 1232 | 1240 | /* For X to recognize me as touchpad. */ |
| 1233 | 1241 | input_set_abs_params(dev, ABS_X, x_min, x_max, 0, 0); |
| 1234 | 1242 | input_set_abs_params(dev, ABS_Y, y_min, y_max, 0, 0); |
| 1235 | − input_abs_set_res(dev, ABS_X, x_res); | |
| 1236 | − input_abs_set_res(dev, ABS_Y, y_res); | |
| 1237 | 1243 | /* |
| 1238 | 1244 | * range of pressure and width is the same as v2, |
| 1239 | 1245 | * report ABS_PRESSURE, ABS_TOOL_WIDTH for compatibility. |
| @@ -1246,8 +1252,6 @@ static int elantech_set_input_params(struct psmouse *psmouse) · 6 unmodified lines | ||
| 1246 | 1252 | input_mt_init_slots(dev, ETP_MAX_FINGERS, 0); |
| 1247 | 1253 | input_set_abs_params(dev, ABS_MT_POSITION_X, x_min, x_max, 0, 0); |
| 1248 | 1254 | input_set_abs_params(dev, ABS_MT_POSITION_Y, y_min, y_max, 0, 0); |
| 1249 | − input_abs_set_res(dev, ABS_MT_POSITION_X, x_res); | |
| 1250 | − input_abs_set_res(dev, ABS_MT_POSITION_Y, y_res); | |
| 1251 | 1255 | input_set_abs_params(dev, ABS_MT_PRESSURE, ETP_PMIN_V2, |
| 1252 | 1256 | ETP_PMAX_V2, 0, 0); |
| 1253 | 1257 | /* |
| @@ -1259,6 +1263,13 @@ static int elantech_set_input_params(struct psmouse *psmouse) · 5 unmodified lines | ||
| 1259 | 1263 | break; |
| 1260 | 1264 | } |
| 1261 | 1265 | |
| 1266 | + input_abs_set_res(dev, ABS_X, x_res); | |
| 1267 | + input_abs_set_res(dev, ABS_Y, y_res); | |
| 1268 | + if (etd->hw_version > 1) { | |
| 1269 | + input_abs_set_res(dev, ABS_MT_POSITION_X, x_res); | |
| 1270 | + input_abs_set_res(dev, ABS_MT_POSITION_Y, y_res); | |
| 1271 | + } | |
| 1272 | + | |
| 1262 | 1273 | etd->y_max = y_max; |
| 1263 | 1274 | etd->width = width; |
| 1264 | 1275 | |
| @@ -1648,6 +1659,16 @@ int elantech_init(struct psmouse *psmouse) · 383 unmodified lines | ||
| 1648 | 1659 | etd->capabilities[0], etd->capabilities[1], |
| 1649 | 1660 | etd->capabilities[2]); |
| 1650 | 1661 | |
| 1662 | + if (etd->hw_version != 1) { | |
| 1663 | + if (etd->send_cmd(psmouse, ETP_SAMPLE_QUERY, etd->samples)) { | |
| 1664 | + psmouse_err(psmouse, "failed to query sample data\n"); | |
| 1665 | + goto init_fail; | |
| 1666 | + } | |
| 1667 | + psmouse_info(psmouse, | |
| 1668 | + "Elan sample query result %02x, %02x, %02x\n", | |
| 1669 | + etd->samples[0], etd->samples[1], etd->samples[2]); | |
| 1670 | + } | |
| 1671 | + | |
| 1651 | 1672 | if (elantech_set_absolute_mode(psmouse)) { |
| 1652 | 1673 | psmouse_err(psmouse, |
| 1653 | 1674 | "failed to put touchpad into absolute mode.\n"); |
| @@ -129,6 +129,7 @@ struct elantech_data { · 128 unmodified lines | ||
| 129 | 129 | unsigned char reg_26; |
| 130 | 130 | unsigned char debug; |
| 131 | 131 | unsigned char capabilities[3]; |
| 132 | + unsigned char samples[3]; | |
| 132 | 133 | bool paritycheck; |
| 133 | 134 | bool jumpy_cursor; |
| 134 | 135 | bool reports_pressure; |
| @@ -1484,12 +1484,12 @@ static int __synaptics_init(struct psmouse *psmouse, bool absolute_mode) · 1483 unmodified lines | ||
| 1484 | 1484 | priv->pkt_type = SYN_MODEL_NEWABS(priv->model_id) ? SYN_NEWABS : SYN_OLDABS; |
| 1485 | 1485 | |
| 1486 | 1486 | psmouse_info(psmouse, |
| 1487 | − "Touchpad model: %ld, fw: %ld.%ld, id: %#lx, caps: %#lx/%#lx/%#lx, board id: %lu, fw id: %lu\n", | |
| 1487 | + "Touchpad model: %ld, fw: %ld.%ld, id: %#lx, caps: %#lx/%#lx/%#lx/%#lx, board id: %lu, fw id: %lu\n", | |
| 1488 | 1488 | SYN_ID_MODEL(priv->identity), |
| 1489 | 1489 | SYN_ID_MAJOR(priv->identity), SYN_ID_MINOR(priv->identity), |
| 1490 | 1490 | priv->model_id, |
| 1491 | 1491 | priv->capabilities, priv->ext_cap, priv->ext_cap_0c, |
| 1492 | − priv->board_id, priv->firmware_id); | |
| 1492 | + priv->ext_cap_10, priv->board_id, priv->firmware_id); | |
| 1493 | 1493 | |
| 1494 | 1494 | set_input_params(psmouse, priv); |
| 1495 | 1495 | |
| @@ -15,6 +15,7 @@ · 14 unmodified lines | ||
| 15 | 15 | */ |
| 16 | 16 | |
| 17 | 17 | #include <linux/kernel.h> |
| 18 | +#include <linux/dmi.h> | |
| 18 | 19 | #include <linux/i2c.h> |
| 19 | 20 | #include <linux/input.h> |
| 20 | 21 | #include <linux/input/mt.h> |
| @@ -34,6 +35,7 @@ struct goodix_ts_data { · 13 unmodified lines | ||
| 34 | 35 | int abs_y_max; |
| 35 | 36 | unsigned int max_touch_num; |
| 36 | 37 | unsigned int int_trigger_type; |
| 38 | + bool rotated_screen; | |
| 37 | 39 | }; |
| 38 | 40 | |
| 39 | 41 | #define GOODIX_MAX_HEIGHT 4096 |
| @@ -60,6 +62,30 @@ static const unsigned long goodix_irq_flags[] = { · 20 unmodified lines | ||
| 60 | 62 | IRQ_TYPE_LEVEL_HIGH, |
| 61 | 63 | }; |
| 62 | 64 | |
| 65 | +/* | |
| 66 | + * Those tablets have their coordinates origin at the bottom right | |
| 67 | + * of the tablet, as if rotated 180 degrees | |
| 68 | + */ | |
| 69 | +static const struct dmi_system_id rotated_screen[] = { | |
| 70 | +#if defined(CONFIG_DMI) && defined(CONFIG_X86) | |
| 71 | + { | |
| 72 | + .ident = "WinBook TW100", | |
| 73 | + .matches = { | |
| 74 | + DMI_MATCH(DMI_SYS_VENDOR, "WinBook"), | |
| 75 | + DMI_MATCH(DMI_PRODUCT_NAME, "TW100") | |
| 76 | + } | |
| 77 | + }, | |
| 78 | + { | |
| 79 | + .ident = "WinBook TW700", | |
| 80 | + .matches = { | |
| 81 | + DMI_MATCH(DMI_SYS_VENDOR, "WinBook"), | |
| 82 | + DMI_MATCH(DMI_PRODUCT_NAME, "TW700") | |
| 83 | + }, | |
| 84 | + }, | |
| 85 | +#endif | |
| 86 | + {} | |
| 87 | +}; | |
| 88 | + | |
| 63 | 89 | /** |
| 64 | 90 | * goodix_i2c_read - read data from a register of the i2c slave device. |
| 65 | 91 | * |
| @@ -129,6 +155,11 @@ static void goodix_ts_report_touch(struct goodix_ts_data *ts, u8 *coor_data) · 63 unmodified lines | ||
| 129 | 155 | int input_y = get_unaligned_le16(&coor_data[3]); |
| 130 | 156 | int input_w = get_unaligned_le16(&coor_data[5]); |
| 131 | 157 | |
| 158 | + if (ts->rotated_screen) { | |
| 159 | + input_x = ts->abs_x_max - input_x; | |
| 160 | + input_y = ts->abs_y_max - input_y; | |
| 161 | + } | |
| 162 | + | |
| 132 | 163 | input_mt_slot(ts->input_dev, id); |
| 133 | 164 | input_mt_report_slot_state(ts->input_dev, MT_TOOL_FINGER, true); |
| 134 | 165 | input_report_abs(ts->input_dev, ABS_MT_POSITION_X, input_x); |
| @@ -223,6 +254,11 @@ static void goodix_read_config(struct goodix_ts_data *ts) · 88 unmodified lines | ||
| 223 | 254 | ts->abs_y_max = GOODIX_MAX_HEIGHT; |
| 224 | 255 | ts->max_touch_num = GOODIX_MAX_CONTACTS; |
| 225 | 256 | } |
| 257 | + | |
| 258 | + ts->rotated_screen = dmi_check_system(rotated_screen); | |
| 259 | + if (ts->rotated_screen) | |
| 260 | + dev_dbg(&ts->client->dev, | |
| 261 | + "Applying '180 degrees rotated screen' quirk\n"); | |
| 226 | 262 | } |
| 227 | 263 | |
| 228 | 264 | /** |
| @@ -627,6 +627,9 @@ static int dmc_tsc10_init(struct usbtouch_usb *usbtouch) · 626 unmodified lines | ||
| 627 | 627 | goto err_out; |
| 628 | 628 | } |
| 629 | 629 | |
| 630 | + /* TSC-25 data sheet specifies a delay after the RESET command */ | |
| 631 | + msleep(150); | |
| 632 | + | |
| 630 | 633 | /* set coordinate output rate */ |
| 631 | 634 | buf[0] = buf[1] = 0xFF; |
| 632 | 635 | ret = usb_control_msg(dev, usb_rcvctrlpipe (dev, 0), |
| @@ -76,8 +76,6 @@ LIST_HEAD(hpet_map); · 75 unmodified lines | ||
| 76 | 76 | * Domain for untranslated devices - only allocated |
| 77 | 77 | * if iommu=pt passed on kernel cmd line. |
| 78 | 78 | */ |
| 79 | −static struct protection_domain *pt_domain; | |
| 80 | − | |
| 81 | 79 | static const struct iommu_ops amd_iommu_ops; |
| 82 | 80 | |
| 83 | 81 | static ATOMIC_NOTIFIER_HEAD(ppr_notifier); |
| @@ -96,7 +94,7 @@ struct iommu_dev_data { · 12 unmodified lines | ||
| 96 | 94 | struct protection_domain *domain; /* Domain the device is bound to */ |
| 97 | 95 | u16 devid; /* PCI Device ID */ |
| 98 | 96 | bool iommu_v2; /* Device can make use of IOMMUv2 */ |
| 99 | − bool passthrough; /* Default for device is pt_domain */ | |
| 97 | + bool passthrough; /* Device is identity mapped */ | |
| 100 | 98 | struct { |
| 101 | 99 | bool enabled; |
| 102 | 100 | int qdep; |
| @@ -116,7 +114,6 @@ struct iommu_cmd { · 13 unmodified lines | ||
| 116 | 114 | struct kmem_cache *amd_iommu_irq_cache; |
| 117 | 115 | |
| 118 | 116 | static void update_domain(struct protection_domain *domain); |
| 119 | −static int alloc_passthrough_domain(void); | |
| 120 | 117 | static int protection_domain_init(struct protection_domain *domain); |
| 121 | 118 | |
| 122 | 119 | /**************************************************************************** |
| @@ -2167,15 +2164,17 @@ static int attach_device(struct device *dev, · 2044 unmodified lines | ||
| 2167 | 2164 | dev_data = get_dev_data(dev); |
| 2168 | 2165 | |
| 2169 | 2166 | if (domain->flags & PD_IOMMUV2_MASK) { |
| 2170 | − if (!dev_data->iommu_v2 || !dev_data->passthrough) | |
| 2167 | + if (!dev_data->passthrough) | |
| 2171 | 2168 | return -EINVAL; |
| 2172 | 2169 | |
| 2173 | − if (pdev_iommuv2_enable(pdev) != 0) | |
| 2174 | − return -EINVAL; | |
| 2170 | + if (dev_data->iommu_v2) { | |
| 2171 | + if (pdev_iommuv2_enable(pdev) != 0) | |
| 2172 | + return -EINVAL; | |
| 2175 | 2173 | |
| 2176 | − dev_data->ats.enabled = true; | |
| 2177 | − dev_data->ats.qdep = pci_ats_queue_depth(pdev); | |
| 2178 | − dev_data->pri_tlp = pci_pri_tlp_required(pdev); | |
| 2174 | + dev_data->ats.enabled = true; | |
| 2175 | + dev_data->ats.qdep = pci_ats_queue_depth(pdev); | |
| 2176 | + dev_data->pri_tlp = pci_pri_tlp_required(pdev); | |
| 2177 | + } | |
| 2179 | 2178 | } else if (amd_iommu_iotlb_sup && |
| 2180 | 2179 | pci_enable_ats(pdev, PAGE_SHIFT) == 0) { |
| 2181 | 2180 | dev_data->ats.enabled = true; |
| @@ -2221,15 +2220,6 @@ static void __detach_device(struct iommu_dev_data *dev_data) · 39 unmodified lines | ||
| 2221 | 2220 | do_detach(head); |
| 2222 | 2221 | |
| 2223 | 2222 | spin_unlock_irqrestore(&domain->lock, flags); |
| 2224 | − | |
| 2225 | − /* | |
| 2226 | − * If we run in passthrough mode the device must be assigned to the | |
| 2227 | − * passthrough domain if it is detached from any other domain. | |
| 2228 | − * Make sure we can deassign from the pt_domain itself. | |
| 2229 | − */ | |
| 2230 | − if (dev_data->passthrough && | |
| 2231 | − (dev_data->domain == NULL && domain != pt_domain)) | |
| 2232 | − __attach_device(dev_data, pt_domain); | |
| 2233 | 2223 | } |
| 2234 | 2224 | |
| 2235 | 2225 | /* |
| @@ -2249,7 +2239,7 @@ static void detach_device(struct device *dev) · 13 unmodified lines | ||
| 2249 | 2239 | __detach_device(dev_data); |
| 2250 | 2240 | write_unlock_irqrestore(&amd_iommu_devtable_lock, flags); |
| 2251 | 2241 | |
| 2252 | − if (domain->flags & PD_IOMMUV2_MASK) | |
| 2242 | + if (domain->flags & PD_IOMMUV2_MASK && dev_data->iommu_v2) | |
| 2253 | 2243 | pdev_iommuv2_disable(to_pci_dev(dev)); |
| 2254 | 2244 | else if (dev_data->ats.enabled) |
| 2255 | 2245 | pci_disable_ats(to_pci_dev(dev)); |
| @@ -2287,17 +2277,15 @@ static int amd_iommu_add_device(struct device *dev) · 31 unmodified lines | ||
| 2287 | 2277 | |
| 2288 | 2278 | BUG_ON(!dev_data); |
| 2289 | 2279 | |
| 2290 | − if (dev_data->iommu_v2) | |
| 2280 | + if (iommu_pass_through || dev_data->iommu_v2) | |
| 2291 | 2281 | iommu_request_dm_for_dev(dev); |
| 2292 | 2282 | |
| 2293 | 2283 | /* Domains are initialized for this device - have a look what we ended up with */ |
| 2294 | 2284 | domain = iommu_get_domain_for_dev(dev); |
| 2295 | − if (domain->type == IOMMU_DOMAIN_IDENTITY) { | |
| 2285 | + if (domain->type == IOMMU_DOMAIN_IDENTITY) | |
| 2296 | 2286 | dev_data->passthrough = true; |
| 2297 | − dev->archdata.dma_ops = &nommu_dma_ops; | |
| 2298 | − } else { | |
| 2287 | + else | |
| 2299 | 2288 | dev->archdata.dma_ops = &amd_iommu_dma_ops; |
| 2300 | − } | |
| 2301 | 2289 | |
| 2302 | 2290 | out: |
| 2303 | 2291 | iommu_completion_wait(iommu); |
| @@ -2862,8 +2850,17 @@ int __init amd_iommu_init_api(void) · 558 unmodified lines | ||
| 2862 | 2850 | |
| 2863 | 2851 | int __init amd_iommu_init_dma_ops(void) |
| 2864 | 2852 | { |
| 2853 | + swiotlb = iommu_pass_through ? 1 : 0; | |
| 2865 | 2854 | iommu_detected = 1; |
| 2866 | − swiotlb = 0; | |
| 2855 | + | |
| 2856 | + /* | |
| 2857 | + * In case we don't initialize SWIOTLB (actually the common case | |
| 2858 | + * when AMD IOMMU is enabled), make sure there are global | |
| 2859 | + * dma_ops set as a fall-back for devices not handled by this | |
| 2860 | + * driver (for example non-PCI devices). | |
| 2861 | + */ | |
| 2862 | + if (!swiotlb) | |
| 2863 | + dma_ops = &nommu_dma_ops; | |
| 2867 | 2864 | |
| 2868 | 2865 | amd_iommu_stats_init(); |
| 2869 | 2866 | |
| @@ -2947,21 +2944,6 @@ out_err: · 77 unmodified lines | ||
| 2947 | 2944 | return NULL; |
| 2948 | 2945 | } |
| 2949 | 2946 | |
| 2950 | −static int alloc_passthrough_domain(void) | |
| 2951 | −{ | |
| 2952 | − if (pt_domain != NULL) | |
| 2953 | − return 0; | |
| 2954 | − | |
| 2955 | − /* allocate passthrough domain */ | |
| 2956 | − pt_domain = protection_domain_alloc(); | |
| 2957 | − if (!pt_domain) | |
| 2958 | − return -ENOMEM; | |
| 2959 | − | |
| 2960 | − pt_domain->mode = PAGE_MODE_NONE; | |
| 2961 | − | |
| 2962 | − return 0; | |
| 2963 | −} | |
| 2964 | − | |
| 2965 | 2947 | static struct iommu_domain *amd_iommu_domain_alloc(unsigned type) |
| 2966 | 2948 | { |
| 2967 | 2949 | struct protection_domain *pdomain; |
| @@ -3222,33 +3204,6 @@ static const struct iommu_ops amd_iommu_ops = { · 254 unmodified lines | ||
| 3222 | 3204 | * |
| 3223 | 3205 | *****************************************************************************/ |
| 3224 | 3206 | |
| 3225 | −int __init amd_iommu_init_passthrough(void) | |
| 3226 | −{ | |
| 3227 | − struct iommu_dev_data *dev_data; | |
| 3228 | − struct pci_dev *dev = NULL; | |
| 3229 | − int ret; | |
| 3230 | − | |
| 3231 | − ret = alloc_passthrough_domain(); | |
| 3232 | − if (ret) | |
| 3233 | − return ret; | |
| 3234 | − | |
| 3235 | − for_each_pci_dev(dev) { | |
| 3236 | − if (!check_device(&dev->dev)) | |
| 3237 | − continue; | |
| 3238 | − | |
| 3239 | − dev_data = get_dev_data(&dev->dev); | |
| 3240 | − dev_data->passthrough = true; | |
| 3241 | − | |
| 3242 | − attach_device(&dev->dev, pt_domain); | |
| 3243 | − } | |
| 3244 | − | |
| 3245 | − amd_iommu_stats_init(); | |
| 3246 | − | |
| 3247 | − pr_info("AMD-Vi: Initialized for Passthrough Mode\n"); | |
| 3248 | − | |
| 3249 | − return 0; | |
| 3250 | −} | |
| 3251 | − | |
| 3252 | 3207 | /* IOMMUv2 specific functions */ |
| 3253 | 3208 | int amd_iommu_register_ppr_notifier(struct notifier_block *nb) |
| 3254 | 3209 | { |
| @@ -3363,7 +3318,12 @@ static int __flush_pasid(struct protection_domain *domain, int pasid, · 108 unmodified lines | ||
| 3363 | 3318 | struct amd_iommu *iommu; |
| 3364 | 3319 | int qdep; |
| 3365 | 3320 | |
| 3366 | − BUG_ON(!dev_data->ats.enabled); | |
| 3321 | + /* | |
| 3322 | + There might be non-IOMMUv2 capable devices in an IOMMUv2 | |
| 3323 | + * domain. | |
| 3324 | + */ | |
| 3325 | + if (!dev_data->ats.enabled) | |
| 3326 | + continue; | |
| 3367 | 3327 | |
| 3368 | 3328 | qdep = dev_data->ats.qdep; |
| 3369 | 3329 | iommu = amd_iommu_rlookup_table[dev_data->devid]; |
| @@ -2026,14 +2026,6 @@ static bool detect_ivrs(void) · 2025 unmodified lines | ||
| 2026 | 2026 | return true; |
| 2027 | 2027 | } |
| 2028 | 2028 | |
| 2029 | −static int amd_iommu_init_dma(void) | |
| 2030 | −{ | |
| 2031 | − if (iommu_pass_through) | |
| 2032 | − return amd_iommu_init_passthrough(); | |
| 2033 | − else | |
| 2034 | − return amd_iommu_init_dma_ops(); | |
| 2035 | −} | |
| 2036 | − | |
| 2037 | 2029 | /**************************************************************************** |
| 2038 | 2030 | * |
| 2039 | 2031 | * AMD IOMMU Initialization State Machine |
| @@ -2073,7 +2065,7 @@ static int __init state_next(void) · 33 unmodified lines | ||
| 2073 | 2065 | init_state = ret ? IOMMU_INIT_ERROR : IOMMU_INTERRUPTS_EN; |
| 2074 | 2066 | break; |
| 2075 | 2067 | case IOMMU_INTERRUPTS_EN: |
| 2076 | − ret = amd_iommu_init_dma(); | |
| 2068 | + ret = amd_iommu_init_dma_ops(); | |
| 2077 | 2069 | init_state = ret ? IOMMU_INIT_ERROR : IOMMU_DMA_OPS; |
| 2078 | 2070 | break; |
| 2079 | 2071 | case IOMMU_DMA_OPS: |
| @@ -132,11 +132,19 @@ static struct device_state *get_device_state(u16 devid) · 131 unmodified lines | ||
| 132 | 132 | |
| 133 | 133 | static void free_device_state(struct device_state *dev_state) |
| 134 | 134 | { |
| 135 | + struct iommu_group *group; | |
| 136 | + | |
| 135 | 137 | /* |
| 136 | 138 | * First detach device from domain - No more PRI requests will arrive |
| 137 | 139 | * from that device after it is unbound from the IOMMUv2 domain. |
| 138 | 140 | */ |
| 139 | − iommu_detach_device(dev_state->domain, &dev_state->pdev->dev); | |
| 141 | + group = iommu_group_get(&dev_state->pdev->dev); | |
| 142 | + if (WARN_ON(!group)) | |
| 143 | + return; | |
| 144 | + | |
| 145 | + iommu_detach_group(dev_state->domain, group); | |
| 146 | + | |
| 147 | + iommu_group_put(group); | |
| 140 | 148 | |
| 141 | 149 | /* Everything is down now, free the IOMMUv2 domain */ |
| 142 | 150 | iommu_domain_free(dev_state->domain); |
| @@ -731,6 +739,7 @@ EXPORT_SYMBOL(amd_iommu_unbind_pasid); · 588 unmodified lines | ||
| 731 | 739 | int amd_iommu_init_device(struct pci_dev *pdev, int pasids) |
| 732 | 740 | { |
| 733 | 741 | struct device_state *dev_state; |
| 742 | + struct iommu_group *group; | |
| 734 | 743 | unsigned long flags; |
| 735 | 744 | int ret, tmp; |
| 736 | 745 | u16 devid; |
| @@ -776,10 +785,16 @@ int amd_iommu_init_device(struct pci_dev *pdev, int pasids) · 39 unmodified lines | ||
| 776 | 785 | if (ret) |
| 777 | 786 | goto out_free_domain; |
| 778 | 787 | |
| 779 | − ret = iommu_attach_device(dev_state->domain, &pdev->dev); | |
| 780 | − if (ret != 0) | |
| 788 | + group = iommu_group_get(&pdev->dev); | |
| 789 | + if (!group) | |
| 781 | 790 | goto out_free_domain; |
| 782 | 791 | |
| 792 | + ret = iommu_attach_group(dev_state->domain, group); | |
| 793 | + if (ret != 0) | |
| 794 | + goto out_drop_group; | |
| 795 | + | |
| 796 | + iommu_group_put(group); | |
| 797 | + | |
| 783 | 798 | spin_lock_irqsave(&state_lock, flags); |
| 784 | 799 | |
| 785 | 800 | if (__get_device_state(devid) != NULL) { |
| @@ -794,6 +809,9 @@ int amd_iommu_init_device(struct pci_dev *pdev, int pasids) · 8 unmodified lines | ||
| 794 | 809 | |
| 795 | 810 | return 0; |
| 796 | 811 | |
| 812 | +out_drop_group: | |
| 813 | + iommu_group_put(group); | |
| 814 | + | |
| 797 | 815 | out_free_domain: |
| 798 | 816 | iommu_domain_free(dev_state->domain); |
| 799 | 817 | |
| @@ -199,9 +199,10 @@ · 198 unmodified lines | ||
| 199 | 199 | * Stream table. |
| 200 | 200 | * |
| 201 | 201 | * Linear: Enough to cover 1 << IDR1.SIDSIZE entries |
| 202 | − * 2lvl: 8k L1 entries, 256 lazy entries per table (each table covers a PCI bus) | |
| 202 | + * 2lvl: 128k L1 entries, | |
| 203 | + * 256 lazy entries per table (each table covers a PCI bus) | |
| 203 | 204 | */ |
| 204 | −#define STRTAB_L1_SZ_SHIFT 16 | |
| 205 | +#define STRTAB_L1_SZ_SHIFT 20 | |
| 205 | 206 | #define STRTAB_SPLIT 8 |
| 206 | 207 | |
| 207 | 208 | #define STRTAB_L1_DESC_DWORDS 1 |
| @@ -269,10 +270,10 @@ · 61 unmodified lines | ||
| 269 | 270 | #define ARM64_TCR_TG0_SHIFT 14 |
| 270 | 271 | #define ARM64_TCR_TG0_MASK 0x3UL |
| 271 | 272 | #define CTXDESC_CD_0_TCR_IRGN0_SHIFT 8 |
| 272 | −#define ARM64_TCR_IRGN0_SHIFT 24 | |
| 273 | +#define ARM64_TCR_IRGN0_SHIFT 8 | |
| 273 | 274 | #define ARM64_TCR_IRGN0_MASK 0x3UL |
| 274 | 275 | #define CTXDESC_CD_0_TCR_ORGN0_SHIFT 10 |
| 275 | −#define ARM64_TCR_ORGN0_SHIFT 26 | |
| 276 | +#define ARM64_TCR_ORGN0_SHIFT 10 | |
| 276 | 277 | #define ARM64_TCR_ORGN0_MASK 0x3UL |
| 277 | 278 | #define CTXDESC_CD_0_TCR_SH0_SHIFT 12 |
| 278 | 279 | #define ARM64_TCR_SH0_SHIFT 12 |
| @@ -542,6 +543,9 @@ struct arm_smmu_device { · 263 unmodified lines | ||
| 542 | 543 | #define ARM_SMMU_FEAT_HYP (1 << 12) |
| 543 | 544 | u32 features; |
| 544 | 545 | |
| 546 | +#define ARM_SMMU_OPT_SKIP_PREFETCH (1 << 0) | |
| 547 | + u32 options; | |
| 548 | + | |
| 545 | 549 | struct arm_smmu_cmdq cmdq; |
| 546 | 550 | struct arm_smmu_evtq evtq; |
| 547 | 551 | struct arm_smmu_priq priq; |
| @@ -602,11 +606,35 @@ struct arm_smmu_domain { · 54 unmodified lines | ||
| 602 | 606 | static DEFINE_SPINLOCK(arm_smmu_devices_lock); |
| 603 | 607 | static LIST_HEAD(arm_smmu_devices); |
| 604 | 608 | |
| 609 | +struct arm_smmu_option_prop { | |
| 610 | + u32 opt; | |
| 611 | + const char *prop; | |
| 612 | +}; | |
| 613 | + | |
| 614 | +static struct arm_smmu_option_prop arm_smmu_options[] = { | |
| 615 | + { ARM_SMMU_OPT_SKIP_PREFETCH, "hisilicon,broken-prefetch-cmd" }, | |
| 616 | + { 0, NULL}, | |
| 617 | +}; | |
| 618 | + | |
| 605 | 619 | static struct arm_smmu_domain *to_smmu_domain(struct iommu_domain *dom) |
| 606 | 620 | { |
| 607 | 621 | return container_of(dom, struct arm_smmu_domain, domain); |
| 608 | 622 | } |
| 609 | 623 | |
| 624 | +static void parse_driver_options(struct arm_smmu_device *smmu) | |
| 625 | +{ | |
| 626 | + int i = 0; | |
| 627 | + | |
| 628 | + do { | |
| 629 | + if (of_property_read_bool(smmu->dev->of_node, | |
| 630 | + arm_smmu_options[i].prop)) { | |
| 631 | + smmu->options |= arm_smmu_options[i].opt; | |
| 632 | + dev_notice(smmu->dev, "option %s\n", | |
| 633 | + arm_smmu_options[i].prop); | |
| 634 | + } | |
| 635 | + } while (arm_smmu_options[++i].opt); | |
| 636 | +} | |
| 637 | + | |
| 610 | 638 | /* Low-level queue manipulation functions */ |
| 611 | 639 | static bool queue_full(struct arm_smmu_queue *q) |
| 612 | 640 | { |
| @@ -1036,7 +1064,8 @@ static void arm_smmu_write_strtab_ent(struct arm_smmu_device *smmu, u32 sid, · 423 unmodified lines | ||
| 1036 | 1064 | arm_smmu_sync_ste_for_sid(smmu, sid); |
| 1037 | 1065 | |
| 1038 | 1066 | /* It's likely that we'll want to use the new STE soon */ |
| 1039 | − arm_smmu_cmdq_issue_cmd(smmu, &prefetch_cmd); | |
| 1067 | + if (!(smmu->options & ARM_SMMU_OPT_SKIP_PREFETCH)) | |
| 1068 | + arm_smmu_cmdq_issue_cmd(smmu, &prefetch_cmd); | |
| 1040 | 1069 | } |
| 1041 | 1070 | |
| 1042 | 1071 | static void arm_smmu_init_bypass_stes(u64 *strtab, unsigned int nent) |
| @@ -1064,7 +1093,7 @@ static int arm_smmu_init_l2_strtab(struct arm_smmu_device *smmu, u32 sid) · 21 unmodified lines | ||
| 1064 | 1093 | return 0; |
| 1065 | 1094 | |
| 1066 | 1095 | size = 1 << (STRTAB_SPLIT + ilog2(STRTAB_STE_DWORDS) + 3); |
| 1067 | − strtab = &cfg->strtab[sid >> STRTAB_SPLIT << STRTAB_L1_DESC_DWORDS]; | |
| 1096 | + strtab = &cfg->strtab[(sid >> STRTAB_SPLIT) * STRTAB_L1_DESC_DWORDS]; | |
| 1068 | 1097 | |
| 1069 | 1098 | desc->span = STRTAB_SPLIT + 1; |
| 1070 | 1099 | desc->l2ptr = dma_zalloc_coherent(smmu->dev, size, &desc->l2ptr_dma, |
| @@ -2020,21 +2049,23 @@ static int arm_smmu_init_strtab_2lvl(struct arm_smmu_device *smmu) · 949 unmodified lines | ||
| 2020 | 2049 | { |
| 2021 | 2050 | void *strtab; |
| 2022 | 2051 | u64 reg; |
| 2023 | − u32 size; | |
| 2052 | + u32 size, l1size; | |
| 2024 | 2053 | int ret; |
| 2025 | 2054 | struct arm_smmu_strtab_cfg *cfg = &smmu->strtab_cfg; |
| 2026 | 2055 | |
| 2027 | 2056 | /* Calculate the L1 size, capped to the SIDSIZE */ |
| 2028 | 2057 | size = STRTAB_L1_SZ_SHIFT - (ilog2(STRTAB_L1_DESC_DWORDS) + 3); |
| 2029 | 2058 | size = min(size, smmu->sid_bits - STRTAB_SPLIT); |
| 2030 | − if (size + STRTAB_SPLIT < smmu->sid_bits) | |
| 2059 | + cfg->num_l1_ents = 1 << size; | |
| 2060 | + | |
| 2061 | + size += STRTAB_SPLIT; | |
| 2062 | + if (size < smmu->sid_bits) | |
| 2031 | 2063 | dev_warn(smmu->dev, |
| 2032 | 2064 | "2-level strtab only covers %u/%u bits of SID\n", |
| 2033 | − size + STRTAB_SPLIT, smmu->sid_bits); | |
| 2065 | + size, smmu->sid_bits); | |
| 2034 | 2066 | |
| 2035 | − cfg->num_l1_ents = 1 << size; | |
| 2036 | − size = cfg->num_l1_ents * (STRTAB_L1_DESC_DWORDS << 3); | |
| 2037 | − strtab = dma_zalloc_coherent(smmu->dev, size, &cfg->strtab_dma, | |
| 2067 | + l1size = cfg->num_l1_ents * (STRTAB_L1_DESC_DWORDS << 3); | |
| 2068 | + strtab = dma_zalloc_coherent(smmu->dev, l1size, &cfg->strtab_dma, | |
| 2038 | 2069 | GFP_KERNEL); |
| 2039 | 2070 | if (!strtab) { |
| 2040 | 2071 | dev_err(smmu->dev, |
| @@ -2055,8 +2086,7 @@ static int arm_smmu_init_strtab_2lvl(struct arm_smmu_device *smmu) · 14 unmodified lines | ||
| 2055 | 2086 | ret = arm_smmu_init_l1_strtab(smmu); |
| 2056 | 2087 | if (ret) |
| 2057 | 2088 | dma_free_coherent(smmu->dev, |
| 2058 | − cfg->num_l1_ents * | |
| 2059 | − (STRTAB_L1_DESC_DWORDS << 3), | |
| 2089 | + l1size, | |
| 2060 | 2090 | strtab, |
| 2061 | 2091 | cfg->strtab_dma); |
| 2062 | 2092 | return ret; |
| @@ -2573,6 +2603,8 @@ static int arm_smmu_device_dt_probe(struct platform_device *pdev) · 510 unmodified lines | ||
| 2573 | 2603 | if (irq > 0) |
| 2574 | 2604 | smmu->gerr_irq = irq; |
| 2575 | 2605 | |
| 2606 | + parse_driver_options(smmu); | |
| 2607 | + | |
| 2576 | 2608 | /* Probe the h/w */ |
| 2577 | 2609 | ret = arm_smmu_device_probe(smmu); |
| 2578 | 2610 | if (ret) |
| @@ -1830,8 +1830,9 @@ static int domain_init(struct dmar_domain *domain, int guest_width) · 1829 unmodified lines | ||
| 1830 | 1830 | |
| 1831 | 1831 | static void domain_exit(struct dmar_domain *domain) |
| 1832 | 1832 | { |
| 1833 | + struct dmar_drhd_unit *drhd; | |
| 1834 | + struct intel_iommu *iommu; | |
| 1833 | 1835 | struct page *freelist = NULL; |
| 1834 | − int i; | |
| 1835 | 1836 | |
| 1836 | 1837 | /* Domain 0 is reserved, so dont process it */ |
| 1837 | 1838 | if (!domain) |
| @@ -1851,8 +1852,10 @@ static void domain_exit(struct dmar_domain *domain) · 13 unmodified lines | ||
| 1851 | 1852 | |
| 1852 | 1853 | /* clear attached or cached domains */ |
| 1853 | 1854 | rcu_read_lock(); |
| 1854 | − for_each_set_bit(i, domain->iommu_bmp, g_num_of_iommus) | |
| 1855 | − iommu_detach_domain(domain, g_iommus[i]); | |
| 1855 | + for_each_active_iommu(iommu, drhd) | |
| 1856 | + if (domain_type_is_vm(domain) || | |
| 1857 | + test_bit(iommu->seq_id, domain->iommu_bmp)) | |
| 1858 | + iommu_detach_domain(domain, iommu); | |
| 1856 | 1859 | rcu_read_unlock(); |
| 1857 | 1860 | |
| 1858 | 1861 | dma_free_pagelist(freelist); |
| @@ -538,7 +538,7 @@ static irqreturn_t ipi_resched_interrupt(int irq, void *dev_id) · 537 unmodified lines | ||
| 538 | 538 | |
| 539 | 539 | static irqreturn_t ipi_call_interrupt(int irq, void *dev_id) |
| 540 | 540 | { |
| 541 | − smp_call_function_interrupt(); | |
| 541 | + generic_smp_call_function_interrupt(); | |
| 542 | 542 | |
| 543 | 543 | return IRQ_HANDLED; |
| 544 | 544 | } |
| @@ -524,9 +524,18 @@ gigaset_tty_open(struct tty_struct *tty) · 523 unmodified lines | ||
| 524 | 524 | cs->hw.ser->tty = tty; |
| 525 | 525 | atomic_set(&cs->hw.ser->refcnt, 1); |
| 526 | 526 | init_completion(&cs->hw.ser->dead_cmp); |
| 527 | − | |
| 528 | 527 | tty->disc_data = cs; |
| 529 | 528 | |
| 529 | + /* Set the amount of data we're willing to receive per call | |
| 530 | + * from the hardware driver to half of the input buffer size | |
| 531 | + * to leave some reserve. | |
| 532 | + * Note: We don't do flow control towards the hardware driver. | |
| 533 | + * If more data is received than will fit into the input buffer, | |
| 534 | + * it will be dropped and an error will be logged. This should | |
| 535 | + * never happen as the device is slow and the buffer size ample. | |
| 536 | + */ | |
| 537 | + tty->receive_room = RBUFSIZE/2; | |
| 538 | + | |
| 530 | 539 | /* OK.. Initialization of the datastructures and the HW is done.. Now |
| 531 | 540 | * startup system and notify the LL that we are ready to run |
| 532 | 541 | */ |
| @@ -597,28 +606,6 @@ static int gigaset_tty_hangup(struct tty_struct *tty) · 64 unmodified lines | ||
| 597 | 606 | return 0; |
| 598 | 607 | } |
| 599 | 608 | |
| 600 | −/* | |
| 601 | − * Read on the tty. | |
| 602 | − * Unused, received data goes only to the Gigaset driver. | |
| 603 | − */ | |
| 604 | −static ssize_t | |
| 605 | −gigaset_tty_read(struct tty_struct *tty, struct file *file, | |
| 606 | − unsigned char __user *buf, size_t count) | |
| 607 | −{ | |
| 608 | − return -EAGAIN; | |
| 609 | −} | |
| 610 | − | |
| 611 | −/* | |
| 612 | − * Write on the tty. | |
| 613 | − * Unused, transmit data comes only from the Gigaset driver. | |
| 614 | − */ | |
| 615 | −static ssize_t | |
| 616 | −gigaset_tty_write(struct tty_struct *tty, struct file *file, | |
| 617 | − const unsigned char *buf, size_t count) | |
| 618 | −{ | |
| 619 | − return -EAGAIN; | |
| 620 | −} | |
| 621 | − | |
| 622 | 609 | /* |
| 623 | 610 | * Ioctl on the tty. |
| 624 | 611 | * Called in process context only. |
| @@ -752,8 +739,6 @@ static struct tty_ldisc_ops gigaset_ldisc = { · 127 unmodified lines | ||
| 752 | 739 | .open = gigaset_tty_open, |
| 753 | 740 | .close = gigaset_tty_close, |
| 754 | 741 | .hangup = gigaset_tty_hangup, |
| 755 | − .read = gigaset_tty_read, | |
| 756 | − .write = gigaset_tty_write, | |
| 757 | 742 | .ioctl = gigaset_tty_ioctl, |
| 758 | 743 | .receive_buf = gigaset_tty_receive, |
| 759 | 744 | .write_wakeup = gigaset_tty_wakeup, |
| @@ -7,7 +7,7 @@ · 6 unmodified lines | ||
| 7 | 7 | #include <linux/kernel.h> |
| 8 | 8 | #include <linux/miscdevice.h> |
| 9 | 9 | #include <linux/fcntl.h> |
| 10 | −#include <linux/init.h> | |
| 10 | +#include <linux/module.h> | |
| 11 | 11 | #include <linux/delay.h> |
| 12 | 12 | #include <linux/fs.h> |
| 13 | 13 | |
| @@ -259,7 +259,7 @@ config DM_CRYPT · 258 unmodified lines | ||
| 259 | 259 | the ciphers you're going to use in the cryptoapi configuration. |
| 260 | 260 | |
| 261 | 261 | For further information on dm-crypt and userspace tools see: |
| 262 | − <http://code.google.com/p/cryptsetup/wiki/DMCrypt> | |
| 262 | + <https://gitlab.com/cryptsetup/cryptsetup/wikis/DMCrypt> | |
| 263 | 263 | |
| 264 | 264 | To compile this code as a module, choose M here: the module will |
| 265 | 265 | be called dm-crypt. |
| @@ -494,7 +494,7 @@ static int bitmap_new_disk_sb(struct bitmap *bitmap) · 493 unmodified lines | ||
| 494 | 494 | bitmap_super_t *sb; |
| 495 | 495 | unsigned long chunksize, daemon_sleep, write_behind; |
| 496 | 496 | |
| 497 | − bitmap->storage.sb_page = alloc_page(GFP_KERNEL); | |
| 497 | + bitmap->storage.sb_page = alloc_page(GFP_KERNEL | __GFP_ZERO); | |
| 498 | 498 | if (bitmap->storage.sb_page == NULL) |
| 499 | 499 | return -ENOMEM; |
| 500 | 500 | bitmap->storage.sb_page->index = 0; |
| @@ -541,6 +541,7 @@ static int bitmap_new_disk_sb(struct bitmap *bitmap) · 40 unmodified lines | ||
| 541 | 541 | sb->state = cpu_to_le32(bitmap->flags); |
| 542 | 542 | bitmap->events_cleared = bitmap->mddev->events; |
| 543 | 543 | sb->events_cleared = cpu_to_le64(bitmap->mddev->events); |
| 544 | + bitmap->mddev->bitmap_info.nodes = 0; | |
| 544 | 545 | |
| 545 | 546 | kunmap_atomic(sb); |
| 546 | 547 | |
| @@ -558,6 +559,7 @@ static int bitmap_read_sb(struct bitmap *bitmap) · 11 unmodified lines | ||
| 558 | 559 | unsigned long sectors_reserved = 0; |
| 559 | 560 | int err = -EINVAL; |
| 560 | 561 | struct page *sb_page; |
| 562 | + loff_t offset = bitmap->mddev->bitmap_info.offset; | |
| 561 | 563 | |
| 562 | 564 | if (!bitmap->storage.file && !bitmap->mddev->bitmap_info.offset) { |
| 563 | 565 | chunksize = 128 * 1024 * 1024; |
| @@ -584,9 +586,9 @@ re_read: · 20 unmodified lines | ||
| 584 | 586 | bm_blocks = ((bm_blocks+7) >> 3) + sizeof(bitmap_super_t); |
| 585 | 587 | /* to 4k blocks */ |
| 586 | 588 | bm_blocks = DIV_ROUND_UP_SECTOR_T(bm_blocks, 4096); |
| 587 | − bitmap->mddev->bitmap_info.offset += bitmap->cluster_slot * (bm_blocks << 3); | |
| 589 | + offset = bitmap->mddev->bitmap_info.offset + (bitmap->cluster_slot * (bm_blocks << 3)); | |
| 588 | 590 | pr_info("%s:%d bm slot: %d offset: %llu\n", __func__, __LINE__, |
| 589 | − bitmap->cluster_slot, (unsigned long long)bitmap->mddev->bitmap_info.offset); | |
| 591 | + bitmap->cluster_slot, offset); | |
| 590 | 592 | } |
| 591 | 593 | |
| 592 | 594 | if (bitmap->storage.file) { |
| @@ -597,7 +599,7 @@ re_read: · 4 unmodified lines | ||
| 597 | 599 | bitmap, bytes, sb_page); |
| 598 | 600 | } else { |
| 599 | 601 | err = read_sb_page(bitmap->mddev, |
| 600 | − bitmap->mddev->bitmap_info.offset, | |
| 602 | + offset, | |
| 601 | 603 | sb_page, |
| 602 | 604 | 0, sizeof(bitmap_super_t)); |
| 603 | 605 | } |
| @@ -611,8 +613,16 @@ re_read: · 7 unmodified lines | ||
| 611 | 613 | daemon_sleep = le32_to_cpu(sb->daemon_sleep) * HZ; |
| 612 | 614 | write_behind = le32_to_cpu(sb->write_behind); |
| 613 | 615 | sectors_reserved = le32_to_cpu(sb->sectors_reserved); |
| 614 | − nodes = le32_to_cpu(sb->nodes); | |
| 615 | − strlcpy(bitmap->mddev->bitmap_info.cluster_name, sb->cluster_name, 64); | |
| 616 | + /* XXX: This is a hack to ensure that we don't use clustering | |
| 617 | + * in case: | |
| 618 | + * - dm-raid is in use and | |
| 619 | + * - the nodes written in bitmap_sb is erroneous. | |
| 620 | + */ | |
| 621 | + if (!bitmap->mddev->sync_super) { | |
| 622 | + nodes = le32_to_cpu(sb->nodes); | |
| 623 | + strlcpy(bitmap->mddev->bitmap_info.cluster_name, | |
| 624 | + sb->cluster_name, 64); | |
| 625 | + } | |
| 616 | 626 | |
| 617 | 627 | /* verify that the bitmap-specific fields are valid */ |
| 618 | 628 | if (sb->magic != cpu_to_le32(BITMAP_MAGIC)) |
| @@ -671,7 +681,7 @@ out: · 52 unmodified lines | ||
| 671 | 681 | kunmap_atomic(sb); |
| 672 | 682 | /* Assiging chunksize is required for "re_read" */ |
| 673 | 683 | bitmap->mddev->bitmap_info.chunksize = chunksize; |
| 674 | − if (nodes && (bitmap->cluster_slot < 0)) { | |
| 684 | + if (err == 0 && nodes && (bitmap->cluster_slot < 0)) { | |
| 675 | 685 | err = md_setup_cluster(bitmap->mddev, nodes); |
| 676 | 686 | if (err) { |
| 677 | 687 | pr_err("%s: Could not setup cluster service (%d)\n", |
| @@ -1866,10 +1876,6 @@ int bitmap_copy_from_slot(struct mddev *mddev, int slot, · 1188 unmodified lines | ||
| 1866 | 1876 | if (IS_ERR(bitmap)) |
| 1867 | 1877 | return PTR_ERR(bitmap); |
| 1868 | 1878 | |
| 1869 | − rv = bitmap_read_sb(bitmap); | |
| 1870 | − if (rv) | |
| 1871 | − goto err; | |
| 1872 | − | |
| 1873 | 1879 | rv = bitmap_init_from_disk(bitmap, 0); |
| 1874 | 1880 | if (rv) |
| 1875 | 1881 | goto err; |
| @@ -1471,5 +1471,3 @@ module_exit(mq_exit); · 1470 unmodified lines | ||
| 1471 | 1471 | MODULE_AUTHOR("Joe Thornber <dm-devel@redhat.com>"); |
| 1472 | 1472 | MODULE_LICENSE("GPL"); |
| 1473 | 1473 | MODULE_DESCRIPTION("mq cache policy"); |
| 1474 | − | |
| 1475 | −MODULE_ALIAS("dm-cache-default"); | |
| @@ -1686,7 +1686,7 @@ static struct dm_cache_policy *smq_create(dm_cblock_t cache_size, · 1685 unmodified lines | ||
| 1686 | 1686 | |
| 1687 | 1687 | if (from_cblock(cache_size)) { |
| 1688 | 1688 | mq->cache_hit_bits = alloc_bitset(from_cblock(cache_size)); |
| 1689 | − if (!mq->cache_hit_bits && mq->cache_hit_bits) { | |
| 1689 | + if (!mq->cache_hit_bits) { | |
| 1690 | 1690 | DMERR("couldn't allocate cache hit bitset"); |
| 1691 | 1691 | goto bad_cache_hit_bits; |
| 1692 | 1692 | } |
| @@ -1789,3 +1789,5 @@ module_exit(smq_exit); · 96 unmodified lines | ||
| 1789 | 1789 | MODULE_AUTHOR("Joe Thornber <dm-devel@redhat.com>"); |
| 1790 | 1790 | MODULE_LICENSE("GPL"); |
| 1791 | 1791 | MODULE_DESCRIPTION("smq cache policy"); |
| 1792 | + | |
| 1793 | +MODULE_ALIAS("dm-cache-default"); | |
| @@ -424,6 +424,7 @@ static void free_migration(struct dm_cache_migration *mg) · 423 unmodified lines | ||
| 424 | 424 | wake_up(&cache->migration_wait); |
| 425 | 425 | |
| 426 | 426 | mempool_free(mg, cache->migration_pool); |
| 427 | + wake_worker(cache); | |
| 427 | 428 | } |
| 428 | 429 | |
| 429 | 430 | static int prealloc_data_structs(struct cache *cache, struct prealloc *p) |
| @@ -1966,6 +1967,7 @@ static void process_deferred_bios(struct cache *cache) · 1536 unmodified lines | ||
| 1966 | 1967 | * this bio might require one, we pause until there are some |
| 1967 | 1968 | * prepared mappings to process. |
| 1968 | 1969 | */ |
| 1970 | + prealloc_used = true; | |
| 1969 | 1971 | if (prealloc_data_structs(cache, &structs)) { |
| 1970 | 1972 | spin_lock_irqsave(&cache->lock, flags); |
| 1971 | 1973 | bio_list_merge(&cache->deferred_bios, &bios); |
| @@ -1981,7 +1983,6 @@ static void process_deferred_bios(struct cache *cache) · 9 unmodified lines | ||
| 1981 | 1983 | process_discard_bio(cache, &structs, bio); |
| 1982 | 1984 | else |
| 1983 | 1985 | process_bio(cache, &structs, bio); |
| 1984 | − prealloc_used = true; | |
| 1985 | 1986 | } |
| 1986 | 1987 | |
| 1987 | 1988 | if (prealloc_used) |
| @@ -2010,6 +2011,7 @@ static void process_deferred_cells(struct cache *cache) · 22 unmodified lines | ||
| 2010 | 2011 | * this bio might require one, we pause until there are some |
| 2011 | 2012 | * prepared mappings to process. |
| 2012 | 2013 | */ |
| 2014 | + prealloc_used = true; | |
| 2013 | 2015 | if (prealloc_data_structs(cache, &structs)) { |
| 2014 | 2016 | spin_lock_irqsave(&cache->lock, flags); |
| 2015 | 2017 | list_splice(&cells, &cache->deferred_cells); |
| @@ -2018,7 +2020,6 @@ static void process_deferred_cells(struct cache *cache) · 2 unmodified lines | ||
| 2018 | 2020 | } |
| 2019 | 2021 | |
| 2020 | 2022 | process_cell(cache, &structs, cell); |
| 2021 | − prealloc_used = true; | |
| 2022 | 2023 | } |
| 2023 | 2024 | |
| 2024 | 2025 | if (prealloc_used) |
| @@ -2080,6 +2081,7 @@ static void writeback_some_dirty_blocks(struct cache *cache) · 55 unmodified lines | ||
| 2080 | 2081 | if (policy_writeback_work(cache->policy, &oblock, &cblock, busy)) |
| 2081 | 2082 | break; /* no work to do */ |
| 2082 | 2083 | |
| 2084 | + prealloc_used = true; | |
| 2083 | 2085 | if (prealloc_data_structs(cache, &structs) || |
| 2084 | 2086 | get_cell(cache, oblock, &structs, &old_ocell)) { |
| 2085 | 2087 | policy_set_dirty(cache->policy, oblock); |
| @@ -2087,7 +2089,6 @@ static void writeback_some_dirty_blocks(struct cache *cache) · 1 unmodified line | ||
| 2087 | 2089 | } |
| 2088 | 2090 | |
| 2089 | 2091 | writeback(cache, &structs, oblock, cblock, old_ocell); |
| 2090 | − prealloc_used = true; | |
| 2091 | 2092 | } |
| 2092 | 2093 | |
| 2093 | 2094 | if (prealloc_used) |
| @@ -1293,8 +1293,8 @@ static int __release_metadata_snap(struct dm_pool_metadata *pmd) · 1292 unmodified lines | ||
| 1293 | 1293 | return r; |
| 1294 | 1294 | |
| 1295 | 1295 | disk_super = dm_block_data(copy); |
| 1296 | − dm_sm_dec_block(pmd->metadata_sm, le64_to_cpu(disk_super->data_mapping_root)); | |
| 1297 | − dm_sm_dec_block(pmd->metadata_sm, le64_to_cpu(disk_super->device_details_root)); | |
| 1296 | + dm_btree_del(&pmd->info, le64_to_cpu(disk_super->data_mapping_root)); | |
| 1297 | + dm_btree_del(&pmd->details_info, le64_to_cpu(disk_super->device_details_root)); | |
| 1298 | 1298 | dm_sm_dec_block(pmd->metadata_sm, held_root); |
| 1299 | 1299 | |
| 1300 | 1300 | return dm_tm_unlock(pmd->tm, copy); |
| @@ -666,16 +666,21 @@ static void requeue_io(struct thin_c *tc) · 665 unmodified lines | ||
| 666 | 666 | requeue_deferred_cells(tc); |
| 667 | 667 | } |
| 668 | 668 | |
| 669 | −static void error_retry_list(struct pool *pool) | |
| 669 | +static void error_retry_list_with_code(struct pool *pool, int error) | |
| 670 | 670 | { |
| 671 | 671 | struct thin_c *tc; |
| 672 | 672 | |
| 673 | 673 | rcu_read_lock(); |
| 674 | 674 | list_for_each_entry_rcu(tc, &pool->active_thins, list) |
| 675 | − error_thin_bio_list(tc, &tc->retry_on_resume_list, -EIO); | |
| 675 | + error_thin_bio_list(tc, &tc->retry_on_resume_list, error); | |
| 676 | 676 | rcu_read_unlock(); |
| 677 | 677 | } |
| 678 | 678 | |
| 679 | +static void error_retry_list(struct pool *pool) | |
| 680 | +{ | |
| 681 | + return error_retry_list_with_code(pool, -EIO); | |
| 682 | +} | |
| 683 | + | |
| 679 | 684 | /* |
| 680 | 685 | * This section of code contains the logic for processing a thin device's IO. |
| 681 | 686 | * Much of the code depends on pool object resources (lists, workqueues, etc) |
| @@ -2297,7 +2302,7 @@ static void do_no_space_timeout(struct work_struct *ws) · 1615 unmodified lines | ||
| 2297 | 2302 | if (get_pool_mode(pool) == PM_OUT_OF_DATA_SPACE && !pool->pf.error_if_no_space) { |
| 2298 | 2303 | pool->pf.error_if_no_space = true; |
| 2299 | 2304 | notify_of_pool_mode_change_to_oods(pool); |
| 2300 | − error_retry_list(pool); | |
| 2305 | + error_retry_list_with_code(pool, -ENOSPC); | |
| 2301 | 2306 | } |
| 2302 | 2307 | } |
| 2303 | 2308 | |
| @@ -1729,7 +1729,8 @@ static int dm_merge_bvec(struct request_queue *q, · 1728 unmodified lines | ||
| 1729 | 1729 | struct mapped_device *md = q->queuedata; |
| 1730 | 1730 | struct dm_table *map = dm_get_live_table_fast(md); |
| 1731 | 1731 | struct dm_target *ti; |
| 1732 | − sector_t max_sectors, max_size = 0; | |
| 1732 | + sector_t max_sectors; | |
| 1733 | + int max_size = 0; | |
| 1733 | 1734 | |
| 1734 | 1735 | if (unlikely(!map)) |
| 1735 | 1736 | goto out; |
| @@ -1742,18 +1743,10 @@ static int dm_merge_bvec(struct request_queue *q, · 6 unmodified lines | ||
| 1742 | 1743 | * Find maximum amount of I/O that won't need splitting |
| 1743 | 1744 | */ |
| 1744 | 1745 | max_sectors = min(max_io_len(bvm->bi_sector, ti), |
| 1745 | − (sector_t) queue_max_sectors(q)); | |
| 1746 | + (sector_t) BIO_MAX_SECTORS); | |
| 1746 | 1747 | max_size = (max_sectors << SECTOR_SHIFT) - bvm->bi_size; |
| 1747 | − | |
| 1748 | − /* | |
| 1749 | − * FIXME: this stop-gap fix _must_ be cleaned up (by passing a sector_t | |
| 1750 | − * to the targets' merge function since it holds sectors not bytes). | |
| 1751 | − * Just doing this as an interim fix for stable@ because the more | |
| 1752 | − * comprehensive cleanup of switching to sector_t will impact every | |
| 1753 | − * DM target that implements a ->merge hook. | |
| 1754 | − */ | |
| 1755 | − if (max_size > INT_MAX) | |
| 1756 | − max_size = INT_MAX; | |
| 1748 | + if (max_size < 0) | |
| 1749 | + max_size = 0; | |
| 1757 | 1750 | |
| 1758 | 1751 | /* |
| 1759 | 1752 | * merge_bvec_fn() returns number of bytes |
| @@ -1761,13 +1754,13 @@ static int dm_merge_bvec(struct request_queue *q, · 1 unmodified line | ||
| 1761 | 1754 | * max is precomputed maximal io size |
| 1762 | 1755 | */ |
| 1763 | 1756 | if (max_size && ti->type->merge) |
| 1764 | − max_size = ti->type->merge(ti, bvm, biovec, (int) max_size); | |
| 1757 | + max_size = ti->type->merge(ti, bvm, biovec, max_size); | |
| 1765 | 1758 | /* |
| 1766 | 1759 | * If the target doesn't support merge method and some of the devices |
| 1767 | − * provided their merge_bvec method (we know this by looking for the | |
| 1768 | − * max_hw_sectors that dm_set_device_limits may set), then we can't | |
| 1769 | − * allow bios with multiple vector entries. So always set max_size | |
| 1770 | − * to 0, and the code below allows just one page. | |
| 1760 | + * provided their merge_bvec method (we know this by looking at | |
| 1761 | + * queue_max_hw_sectors), then we can't allow bios with multiple vector | |
| 1762 | + * entries. So always set max_size to 0, and the code below allows | |
| 1763 | + * just one page. | |
| 1771 | 1764 | */ |
| 1772 | 1765 | else if (queue_max_hw_sectors(q) <= PAGE_SIZE >> 9) |
| 1773 | 1766 | max_size = 0; |
| @@ -44,6 +44,7 @@ struct resync_info { · 43 unmodified lines | ||
| 44 | 44 | |
| 45 | 45 | /* md_cluster_info flags */ |
| 46 | 46 | #define MD_CLUSTER_WAITING_FOR_NEWDISK 1 |
| 47 | +#define MD_CLUSTER_SUSPEND_READ_BALANCING 2 | |
| 47 | 48 | |
| 48 | 49 | |
| 49 | 50 | struct md_cluster_info { |
| @@ -275,6 +276,9 @@ clear_bit: · 225 unmodified lines | ||
| 275 | 276 | |
| 276 | 277 | static void recover_prep(void *arg) |
| 277 | 278 | { |
| 279 | + struct mddev *mddev = arg; | |
| 280 | + struct md_cluster_info *cinfo = mddev->cluster_info; | |
| 281 | + set_bit(MD_CLUSTER_SUSPEND_READ_BALANCING, &cinfo->state); | |
| 278 | 282 | } |
| 279 | 283 | |
| 280 | 284 | static void recover_slot(void *arg, struct dlm_slot *slot) |
| @@ -307,6 +311,7 @@ static void recover_done(void *arg, struct dlm_slot *slots, · 26 unmodified lines | ||
| 307 | 311 | |
| 308 | 312 | cinfo->slot_number = our_slot; |
| 309 | 313 | complete(&cinfo->completion); |
| 314 | + clear_bit(MD_CLUSTER_SUSPEND_READ_BALANCING, &cinfo->state); | |
| 310 | 315 | } |
| 311 | 316 | |
| 312 | 317 | static const struct dlm_lockspace_ops md_ls_ops = { |
| @@ -816,12 +821,17 @@ static void resync_finish(struct mddev *mddev) · 503 unmodified lines | ||
| 816 | 821 | resync_send(mddev, RESYNCING, 0, 0); |
| 817 | 822 | } |
| 818 | 823 | |
| 819 | −static int area_resyncing(struct mddev *mddev, sector_t lo, sector_t hi) | |
| 824 | +static int area_resyncing(struct mddev *mddev, int direction, | |
| 825 | + sector_t lo, sector_t hi) | |
| 820 | 826 | { |
| 821 | 827 | struct md_cluster_info *cinfo = mddev->cluster_info; |
| 822 | 828 | int ret = 0; |
| 823 | 829 | struct suspend_info *s; |
| 824 | 830 | |
| 831 | + if ((direction == READ) && | |
| 832 | + test_bit(MD_CLUSTER_SUSPEND_READ_BALANCING, &cinfo->state)) | |
| 833 | + return 1; | |
| 834 | + | |
| 825 | 835 | spin_lock_irq(&cinfo->suspend_lock); |
| 826 | 836 | if (list_empty(&cinfo->suspend_list)) |
| 827 | 837 | goto out; |
| @@ -18,7 +18,7 @@ struct md_cluster_operations { · 17 unmodified lines | ||
| 18 | 18 | int (*metadata_update_start)(struct mddev *mddev); |
| 19 | 19 | int (*metadata_update_finish)(struct mddev *mddev); |
| 20 | 20 | int (*metadata_update_cancel)(struct mddev *mddev); |
| 21 | − int (*area_resyncing)(struct mddev *mddev, sector_t lo, sector_t hi); | |
| 21 | + int (*area_resyncing)(struct mddev *mddev, int direction, sector_t lo, sector_t hi); | |
| 22 | 22 | int (*add_new_disk_start)(struct mddev *mddev, struct md_rdev *rdev); |
| 23 | 23 | int (*add_new_disk_finish)(struct mddev *mddev); |
| 24 | 24 | int (*new_disk_ack)(struct mddev *mddev, bool ack); |
| @@ -5382,6 +5382,8 @@ static void __md_stop(struct mddev *mddev) · 5381 unmodified lines | ||
| 5382 | 5382 | { |
| 5383 | 5383 | struct md_personality *pers = mddev->pers; |
| 5384 | 5384 | mddev_detach(mddev); |
| 5385 | + /* Ensure ->event_work is done */ | |
| 5386 | + flush_workqueue(md_misc_wq); | |
| 5385 | 5387 | spin_lock(&mddev->lock); |
| 5386 | 5388 | mddev->ready = 0; |
| 5387 | 5389 | mddev->pers = NULL; |
| @@ -5757,7 +5759,7 @@ static int get_bitmap_file(struct mddev *mddev, void __user * arg) · 369 unmodified lines | ||
| 5757 | 5759 | char *ptr; |
| 5758 | 5760 | int err; |
| 5759 | 5761 | |
| 5760 | − file = kmalloc(sizeof(*file), GFP_NOIO); | |
| 5762 | + file = kzalloc(sizeof(*file), GFP_NOIO); | |
| 5761 | 5763 | if (!file) |
| 5762 | 5764 | return -ENOMEM; |
| 5763 | 5765 | |
| @@ -7437,7 +7439,7 @@ int md_setup_cluster(struct mddev *mddev, int nodes) · 1673 unmodified lines | ||
| 7437 | 7439 | err = request_module("md-cluster"); |
| 7438 | 7440 | if (err) { |
| 7439 | 7441 | pr_err("md-cluster module not found.\n"); |
| 7440 | − return err; | |
| 7442 | + return -ENOENT; | |
| 7441 | 7443 | } |
| 7442 | 7444 | |
| 7443 | 7445 | spin_lock(&pers_lock); |
| @@ -138,4 +138,10 @@ int lower_bound(struct btree_node *n, uint64_t key); · 137 unmodified lines | ||
| 138 | 138 | |
| 139 | 139 | extern struct dm_block_validator btree_node_validator; |
| 140 | 140 | |
| 141 | +/* | |
| 142 | + * Value type for upper levels of multi-level btrees. | |
| 143 | + */ | |
| 144 | +extern void init_le64_type(struct dm_transaction_manager *tm, | |
| 145 | + struct dm_btree_value_type *vt); | |
| 146 | + | |
| 141 | 147 | #endif /* DM_BTREE_INTERNAL_H */ |
| @@ -544,14 +544,6 @@ static int remove_raw(struct shadow_spine *s, struct dm_btree_info *info, · 543 unmodified lines | ||
| 544 | 544 | return r; |
| 545 | 545 | } |
| 546 | 546 | |
| 547 | −static struct dm_btree_value_type le64_type = { | |
| 548 | − .context = NULL, | |
| 549 | − .size = sizeof(__le64), | |
| 550 | − .inc = NULL, | |
| 551 | − .dec = NULL, | |
| 552 | − .equal = NULL | |
| 553 | −}; | |
| 554 | − | |
| 555 | 547 | int dm_btree_remove(struct dm_btree_info *info, dm_block_t root, |
| 556 | 548 | uint64_t *keys, dm_block_t *new_root) |
| 557 | 549 | { |
| @@ -559,12 +551,14 @@ int dm_btree_remove(struct dm_btree_info *info, dm_block_t root, · 1 unmodified line | ||
| 559 | 551 | int index = 0, r = 0; |
| 560 | 552 | struct shadow_spine spine; |
| 561 | 553 | struct btree_node *n; |
| 554 | + struct dm_btree_value_type le64_vt; | |
| 562 | 555 | |
| 556 | + init_le64_type(info->tm, &le64_vt); | |
| 563 | 557 | init_shadow_spine(&spine, info); |
| 564 | 558 | for (level = 0; level < info->levels; level++) { |
| 565 | 559 | r = remove_raw(&spine, info, |
| 566 | 560 | (level == last_level ? |
| 567 | − &info->value_type : &le64_type), | |
| 561 | + &info->value_type : &le64_vt), | |
| 568 | 562 | root, keys[level], (unsigned *)&index); |
| 569 | 563 | if (r < 0) |
| 570 | 564 | break; |
| @@ -654,11 +648,13 @@ static int remove_one(struct dm_btree_info *info, dm_block_t root, · 83 unmodified lines | ||
| 654 | 648 | int index = 0, r = 0; |
| 655 | 649 | struct shadow_spine spine; |
| 656 | 650 | struct btree_node *n; |
| 651 | + struct dm_btree_value_type le64_vt; | |
| 657 | 652 | uint64_t k; |
| 658 | 653 | |
| 654 | + init_le64_type(info->tm, &le64_vt); | |
| 659 | 655 | init_shadow_spine(&spine, info); |
| 660 | 656 | for (level = 0; level < last_level; level++) { |
| 661 | − r = remove_raw(&spine, info, &le64_type, | |
| 657 | + r = remove_raw(&spine, info, &le64_vt, | |
| 662 | 658 | root, keys[level], (unsigned *) &index); |
| 663 | 659 | if (r < 0) |
| 664 | 660 | goto out; |
| @@ -689,6 +685,7 @@ static int remove_one(struct dm_btree_info *info, dm_block_t root, · 24 unmodified lines | ||
| 689 | 685 | value_ptr(n, index)); |
| 690 | 686 | |
| 691 | 687 | delete_at(n, index); |
| 688 | + keys[last_level] = k + 1ull; | |
| 692 | 689 | |
| 693 | 690 | } else |
| 694 | 691 | r = -ENODATA; |
| @@ -249,3 +249,40 @@ int shadow_root(struct shadow_spine *s) · 248 unmodified lines | ||
| 249 | 249 | { |
| 250 | 250 | return s->root; |
| 251 | 251 | } |
| 252 | + | |
| 253 | +static void le64_inc(void *context, const void *value_le) | |
| 254 | +{ | |
| 255 | + struct dm_transaction_manager *tm = context; | |
| 256 | + __le64 v_le; | |
| 257 | + | |
| 258 | + memcpy(&v_le, value_le, sizeof(v_le)); | |
| 259 | + dm_tm_inc(tm, le64_to_cpu(v_le)); | |
| 260 | +} | |
| 261 | + | |
| 262 | +static void le64_dec(void *context, const void *value_le) | |
| 263 | +{ | |
| 264 | + struct dm_transaction_manager *tm = context; | |
| 265 | + __le64 v_le; | |
| 266 | + | |
| 267 | + memcpy(&v_le, value_le, sizeof(v_le)); | |
| 268 | + dm_tm_dec(tm, le64_to_cpu(v_le)); | |
| 269 | +} | |
| 270 | + | |
| 271 | +static int le64_equal(void *context, const void *value1_le, const void *value2_le) | |
| 272 | +{ | |
| 273 | + __le64 v1_le, v2_le; | |
| 274 | + | |
| 275 | + memcpy(&v1_le, value1_le, sizeof(v1_le)); | |
| 276 | + memcpy(&v2_le, value2_le, sizeof(v2_le)); | |
| 277 | + return v1_le == v2_le; | |
| 278 | +} | |
| 279 | + | |
| 280 | +void init_le64_type(struct dm_transaction_manager *tm, | |
| 281 | + struct dm_btree_value_type *vt) | |
| 282 | +{ | |
| 283 | + vt->context = tm; | |
| 284 | + vt->size = sizeof(__le64); | |
| 285 | + vt->inc = le64_inc; | |
| 286 | + vt->dec = le64_dec; | |
| 287 | + vt->equal = le64_equal; | |
| 288 | +} | |
| @@ -667,12 +667,7 @@ static int insert(struct dm_btree_info *info, dm_block_t root, · 666 unmodified lines | ||
| 667 | 667 | struct btree_node *n; |
| 668 | 668 | struct dm_btree_value_type le64_type; |
| 669 | 669 | |
| 670 | − le64_type.context = NULL; | |
| 671 | − le64_type.size = sizeof(__le64); | |
| 672 | − le64_type.inc = NULL; | |
| 673 | − le64_type.dec = NULL; | |
| 674 | − le64_type.equal = NULL; | |
| 675 | − | |
| 670 | + init_le64_type(info->tm, &le64_type); | |
| 676 | 671 | init_shadow_spine(&spine, info); |
| 677 | 672 | |
| 678 | 673 | for (level = 0; level < (info->levels - 1); level++) { |
| @@ -336,7 +336,7 @@ static void raid1_end_read_request(struct bio *bio, int error) · 335 unmodified lines | ||
| 336 | 336 | spin_lock_irqsave(&conf->device_lock, flags); |
| 337 | 337 | if (r1_bio->mddev->degraded == conf->raid_disks || |
| 338 | 338 | (r1_bio->mddev->degraded == conf->raid_disks-1 && |
| 339 | − !test_bit(Faulty, &conf->mirrors[mirror].rdev->flags))) | |
| 339 | + test_bit(In_sync, &conf->mirrors[mirror].rdev->flags))) | |
| 340 | 340 | uptodate = 1; |
| 341 | 341 | spin_unlock_irqrestore(&conf->device_lock, flags); |
| 342 | 342 | } |
| @@ -541,7 +541,7 @@ static int read_balance(struct r1conf *conf, struct r1bio *r1_bio, int *max_sect · 198 unmodified lines | ||
| 541 | 541 | |
| 542 | 542 | if ((conf->mddev->recovery_cp < this_sector + sectors) || |
| 543 | 543 | (mddev_is_clustered(conf->mddev) && |
| 544 | − md_cluster_ops->area_resyncing(conf->mddev, this_sector, | |
| 544 | + md_cluster_ops->area_resyncing(conf->mddev, READ, this_sector, | |
| 545 | 545 | this_sector + sectors))) |
| 546 | 546 | choose_first = 1; |
| 547 | 547 | else |
| @@ -1111,7 +1111,8 @@ static void make_request(struct mddev *mddev, struct bio * bio) · 563 unmodified lines | ||
| 1111 | 1111 | ((bio_end_sector(bio) > mddev->suspend_lo && |
| 1112 | 1112 | bio->bi_iter.bi_sector < mddev->suspend_hi) || |
| 1113 | 1113 | (mddev_is_clustered(mddev) && |
| 1114 | − md_cluster_ops->area_resyncing(mddev, bio->bi_iter.bi_sector, bio_end_sector(bio))))) { | |
| 1114 | + md_cluster_ops->area_resyncing(mddev, WRITE, | |
| 1115 | + bio->bi_iter.bi_sector, bio_end_sector(bio))))) { | |
| 1115 | 1116 | /* As the suspend_* range is controlled by |
| 1116 | 1117 | * userspace, we want an interruptible |
| 1117 | 1118 | * wait. |
| @@ -1124,7 +1125,7 @@ static void make_request(struct mddev *mddev, struct bio * bio) · 6 unmodified lines | ||
| 1124 | 1125 | if (bio_end_sector(bio) <= mddev->suspend_lo || |
| 1125 | 1126 | bio->bi_iter.bi_sector >= mddev->suspend_hi || |
| 1126 | 1127 | (mddev_is_clustered(mddev) && |
| 1127 | − !md_cluster_ops->area_resyncing(mddev, | |
| 1128 | + !md_cluster_ops->area_resyncing(mddev, WRITE, | |
| 1128 | 1129 | bio->bi_iter.bi_sector, bio_end_sector(bio)))) |
| 1129 | 1130 | break; |
| 1130 | 1131 | schedule(); |
| @@ -1475,6 +1476,7 @@ static void error(struct mddev *mddev, struct md_rdev *rdev) · 344 unmodified lines | ||
| 1475 | 1476 | { |
| 1476 | 1477 | char b[BDEVNAME_SIZE]; |
| 1477 | 1478 | struct r1conf *conf = mddev->private; |
| 1479 | + unsigned long flags; | |
| 1478 | 1480 | |
| 1479 | 1481 | /* |
| 1480 | 1482 | * If it is not operational, then we have already marked it as dead |
| @@ -1494,14 +1496,13 @@ static void error(struct mddev *mddev, struct md_rdev *rdev) · 13 unmodified lines | ||
| 1494 | 1496 | return; |
| 1495 | 1497 | } |
| 1496 | 1498 | set_bit(Blocked, &rdev->flags); |
| 1499 | + spin_lock_irqsave(&conf->device_lock, flags); | |
| 1497 | 1500 | if (test_and_clear_bit(In_sync, &rdev->flags)) { |
| 1498 | − unsigned long flags; | |
| 1499 | − spin_lock_irqsave(&conf->device_lock, flags); | |
| 1500 | 1501 | mddev->degraded++; |
| 1501 | 1502 | set_bit(Faulty, &rdev->flags); |
| 1502 | − spin_unlock_irqrestore(&conf->device_lock, flags); | |
| 1503 | 1503 | } else |
| 1504 | 1504 | set_bit(Faulty, &rdev->flags); |
| 1505 | + spin_unlock_irqrestore(&conf->device_lock, flags); | |
| 1505 | 1506 | /* |
| 1506 | 1507 | * if recovery is running, make sure it aborts. |
| 1507 | 1508 | */ |
| @@ -1567,7 +1568,10 @@ static int raid1_spare_active(struct mddev *mddev) · 59 unmodified lines | ||
| 1567 | 1568 | * Find all failed disks within the RAID1 configuration |
| 1568 | 1569 | * and mark them readable. |
| 1569 | 1570 | * Called under mddev lock, so rcu protection not needed. |
| 1571 | + * device_lock used to avoid races with raid1_end_read_request | |
| 1572 | + * which expects 'In_sync' flags and ->degraded to be consistent. | |
| 1570 | 1573 | */ |
| 1574 | + spin_lock_irqsave(&conf->device_lock, flags); | |
| 1571 | 1575 | for (i = 0; i < conf->raid_disks; i++) { |
| 1572 | 1576 | struct md_rdev *rdev = conf->mirrors[i].rdev; |
| 1573 | 1577 | struct md_rdev *repl = conf->mirrors[conf->raid_disks + i].rdev; |
| @@ -1598,7 +1602,6 @@ static int raid1_spare_active(struct mddev *mddev) · 24 unmodified lines | ||
| 1598 | 1602 | sysfs_notify_dirent_safe(rdev->sysfs_state); |
| 1599 | 1603 | } |
| 1600 | 1604 | } |
| 1601 | − spin_lock_irqsave(&conf->device_lock, flags); | |
| 1602 | 1605 | mddev->degraded -= count; |
| 1603 | 1606 | spin_unlock_irqrestore(&conf->device_lock, flags); |
| 1604 | 1607 | |
| @@ -3556,6 +3556,7 @@ static struct r10conf *setup_conf(struct mddev *mddev) · 3555 unmodified lines | ||
| 3556 | 3556 | /* far_copies must be 1 */ |
| 3557 | 3557 | conf->prev.stride = conf->dev_sectors; |
| 3558 | 3558 | } |
| 3559 | + conf->reshape_safe = conf->reshape_progress; | |
| 3559 | 3560 | spin_lock_init(&conf->device_lock); |
| 3560 | 3561 | INIT_LIST_HEAD(&conf->retry_list); |
| 3561 | 3562 | |
| @@ -3760,7 +3761,6 @@ static int run(struct mddev *mddev) · 198 unmodified lines | ||
| 3760 | 3761 | } |
| 3761 | 3762 | conf->offset_diff = min_offset_diff; |
| 3762 | 3763 | |
| 3763 | − conf->reshape_safe = conf->reshape_progress; | |
| 3764 | 3764 | clear_bit(MD_RECOVERY_SYNC, &mddev->recovery); |
| 3765 | 3765 | clear_bit(MD_RECOVERY_CHECK, &mddev->recovery); |
| 3766 | 3766 | set_bit(MD_RECOVERY_RESHAPE, &mddev->recovery); |
| @@ -4103,6 +4103,7 @@ static int raid10_start_reshape(struct mddev *mddev) · 336 unmodified lines | ||
| 4103 | 4103 | conf->reshape_progress = size; |
| 4104 | 4104 | } else |
| 4105 | 4105 | conf->reshape_progress = 0; |
| 4106 | + conf->reshape_safe = conf->reshape_progress; | |
| 4106 | 4107 | spin_unlock_irq(&conf->device_lock); |
| 4107 | 4108 | |
| 4108 | 4109 | if (mddev->delta_disks && mddev->bitmap) { |
| @@ -4170,6 +4171,7 @@ abort: · 61 unmodified lines | ||
| 4170 | 4171 | rdev->new_data_offset = rdev->data_offset; |
| 4171 | 4172 | smp_wmb(); |
| 4172 | 4173 | conf->reshape_progress = MaxSector; |
| 4174 | + conf->reshape_safe = MaxSector; | |
| 4173 | 4175 | mddev->reshape_position = MaxSector; |
| 4174 | 4176 | spin_unlock_irq(&conf->device_lock); |
| 4175 | 4177 | return ret; |
| @@ -4524,6 +4526,7 @@ static void end_reshape(struct r10conf *conf) · 348 unmodified lines | ||
| 4524 | 4526 | md_finish_reshape(conf->mddev); |
| 4525 | 4527 | smp_wmb(); |
| 4526 | 4528 | conf->reshape_progress = MaxSector; |
| 4529 | + conf->reshape_safe = MaxSector; | |
| 4527 | 4530 | spin_unlock_irq(&conf->device_lock); |
| 4528 | 4531 | |
| 4529 | 4532 | /* read-ahead size must cover two whole stripes, which is |
| @@ -2162,6 +2162,9 @@ static int resize_stripes(struct r5conf *conf, int newsize) · 2161 unmodified lines | ||
| 2162 | 2162 | if (!sc) |
| 2163 | 2163 | return -ENOMEM; |
| 2164 | 2164 | |
| 2165 | + /* Need to ensure auto-resizing doesn't interfere */ | |
| 2166 | + mutex_lock(&conf->cache_size_mutex); | |
| 2167 | + | |
| 2165 | 2168 | for (i = conf->max_nr_stripes; i; i--) { |
| 2166 | 2169 | nsh = alloc_stripe(sc, GFP_KERNEL); |
| 2167 | 2170 | if (!nsh) |
| @@ -2178,6 +2181,7 @@ static int resize_stripes(struct r5conf *conf, int newsize) · 10 unmodified lines | ||
| 2178 | 2181 | kmem_cache_free(sc, nsh); |
| 2179 | 2182 | } |
| 2180 | 2183 | kmem_cache_destroy(sc); |
| 2184 | + mutex_unlock(&conf->cache_size_mutex); | |
| 2181 | 2185 | return -ENOMEM; |
| 2182 | 2186 | } |
| 2183 | 2187 | /* Step 2 - Must use GFP_NOIO now. |
| @@ -2224,6 +2228,7 @@ static int resize_stripes(struct r5conf *conf, int newsize) · 40 unmodified lines | ||
| 2224 | 2228 | } else |
| 2225 | 2229 | err = -ENOMEM; |
| 2226 | 2230 | |
| 2231 | + mutex_unlock(&conf->cache_size_mutex); | |
| 2227 | 2232 | /* Step 4, return new stripes to service */ |
| 2228 | 2233 | while(!list_empty(&newstripes)) { |
| 2229 | 2234 | nsh = list_entry(newstripes.next, struct stripe_head, lru); |
| @@ -2251,7 +2256,7 @@ static int resize_stripes(struct r5conf *conf, int newsize) · 21 unmodified lines | ||
| 2251 | 2256 | static int drop_one_stripe(struct r5conf *conf) |
| 2252 | 2257 | { |
| 2253 | 2258 | struct stripe_head *sh; |
| 2254 | − int hash = (conf->max_nr_stripes - 1) % NR_STRIPE_HASH_LOCKS; | |
| 2259 | + int hash = (conf->max_nr_stripes - 1) & STRIPE_HASH_LOCKS_MASK; | |
| 2255 | 2260 | |
| 2256 | 2261 | spin_lock_irq(conf->hash_locks + hash); |
| 2257 | 2262 | sh = get_free_stripe(conf, hash); |
| @@ -4061,8 +4066,10 @@ static void analyse_stripe(struct stripe_head *sh, struct stripe_head_state *s) · 1803 unmodified lines | ||
| 4061 | 4066 | &first_bad, &bad_sectors)) |
| 4062 | 4067 | set_bit(R5_ReadRepl, &dev->flags); |
| 4063 | 4068 | else { |
| 4064 | − if (rdev) | |
| 4069 | + if (rdev && !test_bit(Faulty, &rdev->flags)) | |
| 4065 | 4070 | set_bit(R5_NeedReplace, &dev->flags); |
| 4071 | + else | |
| 4072 | + clear_bit(R5_NeedReplace, &dev->flags); | |
| 4066 | 4073 | rdev = rcu_dereference(conf->disks[i].rdev); |
| 4067 | 4074 | clear_bit(R5_ReadRepl, &dev->flags); |
| 4068 | 4075 | } |
| @@ -5857,12 +5864,14 @@ static void raid5d(struct md_thread *thread) · 1788 unmodified lines | ||
| 5857 | 5864 | pr_debug("%d stripes handled\n", handled); |
| 5858 | 5865 | |
| 5859 | 5866 | spin_unlock_irq(&conf->device_lock); |
| 5860 | − if (test_and_clear_bit(R5_ALLOC_MORE, &conf->cache_state)) { | |
| 5867 | + if (test_and_clear_bit(R5_ALLOC_MORE, &conf->cache_state) && | |
| 5868 | + mutex_trylock(&conf->cache_size_mutex)) { | |
| 5861 | 5869 | grow_one_stripe(conf, __GFP_NOWARN); |
| 5862 | 5870 | /* Set flag even if allocation failed. This helps |
| 5863 | 5871 | * slow down allocation requests when mem is short |
| 5864 | 5872 | */ |
| 5865 | 5873 | set_bit(R5_DID_ALLOC, &conf->cache_state); |
| 5874 | + mutex_unlock(&conf->cache_size_mutex); | |
| 5866 | 5875 | } |
| 5867 | 5876 | |
| 5868 | 5877 | async_tx_issue_pending_all(); |
| @@ -5894,18 +5903,22 @@ raid5_set_cache_size(struct mddev *mddev, int size) · 25 unmodified lines | ||
| 5894 | 5903 | return -EINVAL; |
| 5895 | 5904 | |
| 5896 | 5905 | conf->min_nr_stripes = size; |
| 5906 | + mutex_lock(&conf->cache_size_mutex); | |
| 5897 | 5907 | while (size < conf->max_nr_stripes && |
| 5898 | 5908 | drop_one_stripe(conf)) |
| 5899 | 5909 | ; |
| 5910 | + mutex_unlock(&conf->cache_size_mutex); | |
| 5900 | 5911 | |
| 5901 | 5912 | |
| 5902 | 5913 | err = md_allow_write(mddev); |
| 5903 | 5914 | if (err) |
| 5904 | 5915 | return err; |
| 5905 | 5916 | |
| 5917 | + mutex_lock(&conf->cache_size_mutex); | |
| 5906 | 5918 | while (size > conf->max_nr_stripes) |
| 5907 | 5919 | if (!grow_one_stripe(conf, GFP_KERNEL)) |
| 5908 | 5920 | break; |
| 5921 | + mutex_unlock(&conf->cache_size_mutex); | |
| 5909 | 5922 | |
| 5910 | 5923 | return 0; |
| 5911 | 5924 | } |
| @@ -6371,11 +6384,19 @@ static unsigned long raid5_cache_scan(struct shrinker *shrink, · 459 unmodified lines | ||
| 6371 | 6384 | struct shrink_control *sc) |
| 6372 | 6385 | { |
| 6373 | 6386 | struct r5conf *conf = container_of(shrink, struct r5conf, shrinker); |
| 6374 | − int ret = 0; | |
| 6375 | − while (ret < sc->nr_to_scan) { | |
| 6376 | − if (drop_one_stripe(conf) == 0) | |
| 6377 | − return SHRINK_STOP; | |
| 6378 | − ret++; | |
| 6387 | + unsigned long ret = SHRINK_STOP; | |
| 6388 | + | |
| 6389 | + if (mutex_trylock(&conf->cache_size_mutex)) { | |
| 6390 | + ret= 0; | |
| 6391 | + while (ret < sc->nr_to_scan && | |
| 6392 | + conf->max_nr_stripes > conf->min_nr_stripes) { | |
| 6393 | + if (drop_one_stripe(conf) == 0) { | |
| 6394 | + ret = SHRINK_STOP; | |
| 6395 | + break; | |
| 6396 | + } | |
| 6397 | + ret++; | |
| 6398 | + } | |
| 6399 | + mutex_unlock(&conf->cache_size_mutex); | |
| 6379 | 6400 | } |
| 6380 | 6401 | return ret; |
| 6381 | 6402 | } |
| @@ -6444,6 +6465,7 @@ static struct r5conf *setup_conf(struct mddev *mddev) · 62 unmodified lines | ||
| 6444 | 6465 | goto abort; |
| 6445 | 6466 | spin_lock_init(&conf->device_lock); |
| 6446 | 6467 | seqcount_init(&conf->gen_lock); |
| 6468 | + mutex_init(&conf->cache_size_mutex); | |
| 6447 | 6469 | init_waitqueue_head(&conf->wait_for_quiescent); |
| 6448 | 6470 | for (i = 0; i < NR_STRIPE_HASH_LOCKS; i++) { |
| 6449 | 6471 | init_waitqueue_head(&conf->wait_for_stripe[i]); |
| @@ -482,7 +482,8 @@ struct r5conf { · 481 unmodified lines | ||
| 482 | 482 | */ |
| 483 | 483 | int active_name; |
| 484 | 484 | char cache_name[2][32]; |
| 485 | − struct kmem_cache *slab_cache; /* for allocating stripes */ | |
| 485 | + struct kmem_cache *slab_cache; /* for allocating stripes */ | |
| 486 | + struct mutex cache_size_mutex; /* Protect changes to cache size */ | |
| 486 | 487 | |
| 487 | 488 | int seq_flush, seq_write; |
| 488 | 489 | int quiesce; |
| @@ -38,6 +38,8 @@ · 37 unmodified lines | ||
| 38 | 38 | Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
| 39 | 39 | */ |
| 40 | 40 | |
| 41 | +#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt | |
| 42 | + | |
| 41 | 43 | #include <linux/module.h> |
| 42 | 44 | #include <linux/kernel.h> |
| 43 | 45 | #include <linux/fb.h> |
| @@ -1171,6 +1173,13 @@ static int ivtvfb_init_card(struct ivtv *itv) · 1127 unmodified lines | ||
| 1171 | 1173 | { |
| 1172 | 1174 | int rc; |
| 1173 | 1175 | |
| 1176 | +#ifdef CONFIG_X86_64 | |
| 1177 | + if (pat_enabled()) { | |
| 1178 | + pr_warn("ivtvfb needs PAT disabled, boot with nopat kernel parameter\n"); | |
| 1179 | + return -ENODEV; | |
| 1180 | + } | |
| 1181 | +#endif | |
| 1182 | + | |
| 1174 | 1183 | if (itv->osd_info) { |
| 1175 | 1184 | IVTVFB_ERR("Card %d already initialised\n", ivtvfb_card_id); |
| 1176 | 1185 | return -EBUSY; |
| @@ -1265,12 +1274,6 @@ static int __init ivtvfb_init(void) · 88 unmodified lines | ||
| 1265 | 1274 | int registered = 0; |
| 1266 | 1275 | int err; |
| 1267 | 1276 | |
| 1268 | −#ifdef CONFIG_X86_64 | |
| 1269 | − if (WARN(pat_enabled(), | |
| 1270 | − "ivtvfb needs PAT disabled, boot with nopat kernel parameter\n")) { | |
| 1271 | − return -ENODEV; | |
| 1272 | − } | |
| 1273 | −#endif | |
| 1274 | 1277 | |
| 1275 | 1278 | if (ivtvfb_card_id < -1 || ivtvfb_card_id >= IVTV_MAX_CARDS) { |
| 1276 | 1279 | printk(KERN_ERR "ivtvfb: ivtvfb_card_id parameter is out of range (valid range: -1 - %d)\n", |
| @@ -2245,6 +2245,9 @@ void omap3_gpmc_save_context(void) · 2244 unmodified lines | ||
| 2245 | 2245 | { |
| 2246 | 2246 | int i; |
| 2247 | 2247 | |
| 2248 | + if (!gpmc_base) | |
| 2249 | + return; | |
| 2250 | + | |
| 2248 | 2251 | gpmc_context.sysconfig = gpmc_read_reg(GPMC_SYSCONFIG); |
| 2249 | 2252 | gpmc_context.irqenable = gpmc_read_reg(GPMC_IRQENABLE); |
| 2250 | 2253 | gpmc_context.timeout_ctrl = gpmc_read_reg(GPMC_TIMEOUT_CONTROL); |
| @@ -2277,6 +2280,9 @@ void omap3_gpmc_restore_context(void) · 26 unmodified lines | ||
| 2277 | 2280 | { |
| 2278 | 2281 | int i; |
| 2279 | 2282 | |
| 2283 | + if (!gpmc_base) | |
| 2284 | + return; | |
| 2285 | + | |
| 2280 | 2286 | gpmc_write_reg(GPMC_SYSCONFIG, gpmc_context.sysconfig); |
| 2281 | 2287 | gpmc_write_reg(GPMC_IRQENABLE, gpmc_context.irqenable); |
| 2282 | 2288 | gpmc_write_reg(GPMC_TIMEOUT_CONTROL, gpmc_context.timeout_ctrl); |
| @@ -115,7 +115,7 @@ config MFD_CROS_EC_I2C · 114 unmodified lines | ||
| 115 | 115 | |
| 116 | 116 | config MFD_CROS_EC_SPI |
| 117 | 117 | tristate "ChromeOS Embedded Controller (SPI)" |
| 118 | − depends on MFD_CROS_EC && CROS_EC_PROTO && SPI && OF | |
| 118 | + depends on MFD_CROS_EC && CROS_EC_PROTO && SPI | |
| 119 | 119 | |
| 120 | 120 | ---help--- |
| 121 | 121 | If you say Y here, you get support for talking to the ChromeOS EC |
| @@ -651,7 +651,7 @@ static int arizona_runtime_suspend(struct device *dev) · 650 unmodified lines | ||
| 651 | 651 | |
| 652 | 652 | arizona->has_fully_powered_off = true; |
| 653 | 653 | |
| 654 | − disable_irq(arizona->irq); | |
| 654 | + disable_irq_nosync(arizona->irq); | |
| 655 | 655 | arizona_enable_reset(arizona); |
| 656 | 656 | regulator_bulk_disable(arizona->num_core_supplies, |
| 657 | 657 | arizona->core_supplies); |
| @@ -1141,10 +1141,6 @@ int arizona_dev_init(struct arizona *arizona) · 483 unmodified lines | ||
| 1141 | 1141 | arizona->pdata.gpio_defaults[i]); |
| 1142 | 1142 | } |
| 1143 | 1143 | |
| 1144 | − pm_runtime_set_autosuspend_delay(arizona->dev, 100); | |
| 1145 | − pm_runtime_use_autosuspend(arizona->dev); | |
| 1146 | − pm_runtime_enable(arizona->dev); | |
| 1147 | − | |
| 1148 | 1144 | /* Chip default */ |
| 1149 | 1145 | if (!arizona->pdata.clk32k_src) |
| 1150 | 1146 | arizona->pdata.clk32k_src = ARIZONA_32KZ_MCLK2; |
| @@ -1245,11 +1241,17 @@ int arizona_dev_init(struct arizona *arizona) · 94 unmodified lines | ||
| 1245 | 1241 | arizona->pdata.spk_fmt[i]); |
| 1246 | 1242 | } |
| 1247 | 1243 | |
| 1244 | + pm_runtime_set_active(arizona->dev); | |
| 1245 | + pm_runtime_enable(arizona->dev); | |
| 1246 | + | |
| 1248 | 1247 | /* Set up for interrupts */ |
| 1249 | 1248 | ret = arizona_irq_init(arizona); |
| 1250 | 1249 | if (ret != 0) |
| 1251 | 1250 | goto err_reset; |
| 1252 | 1251 | |
| 1252 | + pm_runtime_set_autosuspend_delay(arizona->dev, 100); | |
| 1253 | + pm_runtime_use_autosuspend(arizona->dev); | |
| 1254 | + | |
| 1253 | 1255 | arizona_request_irq(arizona, ARIZONA_IRQ_CLKGEN_ERR, "CLKGEN error", |
| 1254 | 1256 | arizona_clkgen_err, arizona); |
| 1255 | 1257 | arizona_request_irq(arizona, ARIZONA_IRQ_OVERCLOCKED, "Overclocked", |
| @@ -1278,10 +1280,6 @@ int arizona_dev_init(struct arizona *arizona) · 22 unmodified lines | ||
| 1278 | 1280 | goto err_irq; |
| 1279 | 1281 | } |
| 1280 | 1282 | |
| 1281 | −#ifdef CONFIG_PM | |
| 1282 | − regulator_disable(arizona->dcvdd); | |
| 1283 | −#endif | |
| 1284 | − | |
| 1285 | 1283 | return 0; |
| 1286 | 1284 | |
| 1287 | 1285 | err_irq: |
| @@ -438,9 +438,6 @@ static ssize_t at24_bin_write(struct file *filp, struct kobject *kobj, · 437 unmodified lines | ||
| 438 | 438 | { |
| 439 | 439 | struct at24_data *at24; |
| 440 | 440 | |
| 441 | − if (unlikely(off >= attr->size)) | |
| 442 | − return -EFBIG; | |
| 443 | − | |
| 444 | 441 | at24 = dev_get_drvdata(container_of(kobj, struct device, kobj)); |
| 445 | 442 | return at24_write(at24, buf, off, count); |
| 446 | 443 | } |
| @@ -682,7 +682,7 @@ int mei_register(struct mei_device *dev, struct device *parent) · 681 unmodified lines | ||
| 682 | 682 | /* Fill in the data structures */ |
| 683 | 683 | devno = MKDEV(MAJOR(mei_devt), dev->minor); |
| 684 | 684 | cdev_init(&dev->cdev, &mei_fops); |
| 685 | − dev->cdev.owner = mei_fops.owner; | |
| 685 | + dev->cdev.owner = parent->driver->owner; | |
| 686 | 686 | |
| 687 | 687 | /* Add the device */ |
| 688 | 688 | ret = cdev_add(&dev->cdev, devno, 1); |
| @@ -357,7 +357,7 @@ static void scif_p2p_freesg(struct scatterlist *sg) · 356 unmodified lines | ||
| 357 | 357 | } |
| 358 | 358 | |
| 359 | 359 | static struct scatterlist * |
| 360 | −scif_p2p_setsg(void __iomem *va, int page_size, int page_cnt) | |
| 360 | +scif_p2p_setsg(phys_addr_t pa, int page_size, int page_cnt) | |
| 361 | 361 | { |
| 362 | 362 | struct scatterlist *sg; |
| 363 | 363 | struct page *page; |
| @@ -368,16 +368,11 @@ scif_p2p_setsg(void __iomem *va, int page_size, int page_cnt) · 4 unmodified lines | ||
| 368 | 368 | return NULL; |
| 369 | 369 | sg_init_table(sg, page_cnt); |
| 370 | 370 | for (i = 0; i < page_cnt; i++) { |
| 371 | − page = vmalloc_to_page((void __force *)va); | |
| 372 | − if (!page) | |
| 373 | − goto p2p_sg_err; | |
| 371 | + page = pfn_to_page(pa >> PAGE_SHIFT); | |
| 374 | 372 | sg_set_page(&sg[i], page, page_size, 0); |
| 375 | − va += page_size; | |
| 373 | + pa += page_size; | |
| 376 | 374 | } |
| 377 | 375 | return sg; |
| 378 | −p2p_sg_err: | |
| 379 | − kfree(sg); | |
| 380 | − return NULL; | |
| 381 | 376 | } |
| 382 | 377 | |
| 383 | 378 | /* Init p2p mappings required to access peerdev from scifdev */ |
| @@ -395,14 +390,14 @@ scif_init_p2p_info(struct scif_dev *scifdev, struct scif_dev *peerdev) · 11 unmodified lines | ||
| 395 | 390 | p2p = kzalloc(sizeof(*p2p), GFP_KERNEL); |
| 396 | 391 | if (!p2p) |
| 397 | 392 | return NULL; |
| 398 | − p2p->ppi_sg[SCIF_PPI_MMIO] = scif_p2p_setsg(psdev->mmio->va, | |
| 393 | + p2p->ppi_sg[SCIF_PPI_MMIO] = scif_p2p_setsg(psdev->mmio->pa, | |
| 399 | 394 | PAGE_SIZE, num_mmio_pages); |
| 400 | 395 | if (!p2p->ppi_sg[SCIF_PPI_MMIO]) |
| 401 | 396 | goto free_p2p; |
| 402 | 397 | p2p->sg_nentries[SCIF_PPI_MMIO] = num_mmio_pages; |
| 403 | 398 | sg_page_shift = get_order(min(psdev->aper->len, (u64)(1 << 30))); |
| 404 | 399 | num_aper_chunks = num_aper_pages >> (sg_page_shift - PAGE_SHIFT); |
| 405 | − p2p->ppi_sg[SCIF_PPI_APER] = scif_p2p_setsg(psdev->aper->va, | |
| 400 | + p2p->ppi_sg[SCIF_PPI_APER] = scif_p2p_setsg(psdev->aper->pa, | |
| 406 | 401 | 1 << sg_page_shift, |
| 407 | 402 | num_aper_chunks); |
| 408 | 403 | p2p->sg_nentries[SCIF_PPI_APER] = num_aper_chunks; |
| @@ -208,6 +208,8 @@ static ssize_t power_ro_lock_show(struct device *dev, · 207 unmodified lines | ||
| 208 | 208 | |
| 209 | 209 | ret = snprintf(buf, PAGE_SIZE, "%d\n", locked); |
| 210 | 210 | |
| 211 | + mmc_blk_put(md); | |
| 212 | + | |
| 211 | 213 | return ret; |
| 212 | 214 | } |
| 213 | 215 | |
| @@ -779,6 +779,7 @@ config MMC_TOSHIBA_PCI · 778 unmodified lines | ||
| 779 | 779 | |
| 780 | 780 | config MMC_MTK |
| 781 | 781 | tristate "MediaTek SD/MMC Card Interface support" |
| 782 | + depends on HAS_DMA | |
| 782 | 783 | help |
| 783 | 784 | This selects the MediaTek(R) Secure digital and Multimedia card Interface. |
| 784 | 785 | If you have a machine with a integrated SD/MMC card reader, say Y or M here. |
| @@ -1062,9 +1062,14 @@ static void omap_hsmmc_do_irq(struct omap_hsmmc_host *host, int status) · 1061 unmodified lines | ||
| 1062 | 1062 | |
| 1063 | 1063 | if (status & (CTO_EN | CCRC_EN)) |
| 1064 | 1064 | end_cmd = 1; |
| 1065 | + if (host->data || host->response_busy) { | |
| 1066 | + end_trans = !end_cmd; | |
| 1067 | + host->response_busy = 0; | |
| 1068 | + } | |
| 1065 | 1069 | if (status & (CTO_EN | DTO_EN)) |
| 1066 | 1070 | hsmmc_command_incomplete(host, -ETIMEDOUT, end_cmd); |
| 1067 | − else if (status & (CCRC_EN | DCRC_EN)) | |
| 1071 | + else if (status & (CCRC_EN | DCRC_EN | DEB_EN | CEB_EN | | |
| 1072 | + BADA_EN)) | |
| 1068 | 1073 | hsmmc_command_incomplete(host, -EILSEQ, end_cmd); |
| 1069 | 1074 | |
| 1070 | 1075 | if (status & ACE_EN) { |
| @@ -1081,10 +1086,6 @@ static void omap_hsmmc_do_irq(struct omap_hsmmc_host *host, int status) · 10 unmodified lines | ||
| 1081 | 1086 | } |
| 1082 | 1087 | dev_dbg(mmc_dev(host->mmc), "AC12 err: 0x%x\n", ac12); |
| 1083 | 1088 | } |
| 1084 | − if (host->data || host->response_busy) { | |
| 1085 | − end_trans = !end_cmd; | |
| 1086 | − host->response_busy = 0; | |
| 1087 | − } | |
| 1088 | 1089 | } |
| 1089 | 1090 | |
| 1090 | 1091 | OMAP_HSMMC_WRITE(host->base, STAT, status); |
| @@ -581,13 +581,8 @@ static void esdhc_writeb_le(struct sdhci_host *host, u8 val, int reg) · 580 unmodified lines | ||
| 581 | 581 | static unsigned int esdhc_pltfm_get_max_clock(struct sdhci_host *host) |
| 582 | 582 | { |
| 583 | 583 | struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); |
| 584 | − struct pltfm_imx_data *imx_data = pltfm_host->priv; | |
| 585 | − struct esdhc_platform_data *boarddata = &imx_data->boarddata; | |
| 586 | 584 | |
| 587 | − if (boarddata->f_max && (boarddata->f_max < pltfm_host->clock)) | |
| 588 | − return boarddata->f_max; | |
| 589 | − else | |
| 590 | − return pltfm_host->clock; | |
| 585 | + return pltfm_host->clock; | |
| 591 | 586 | } |
| 592 | 587 | |
| 593 | 588 | static unsigned int esdhc_pltfm_get_min_clock(struct sdhci_host *host) |
| @@ -878,34 +873,19 @@ static const struct sdhci_pltfm_data sdhci_esdhc_imx_pdata = { · 284 unmodified lines | ||
| 878 | 873 | static int |
| 879 | 874 | sdhci_esdhc_imx_probe_dt(struct platform_device *pdev, |
| 880 | 875 | struct sdhci_host *host, |
| 881 | − struct esdhc_platform_data *boarddata) | |
| 876 | + struct pltfm_imx_data *imx_data) | |
| 882 | 877 | { |
| 883 | 878 | struct device_node *np = pdev->dev.of_node; |
| 884 | − | |
| 885 | − if (!np) | |
| 886 | − return -ENODEV; | |
| 887 | − | |
| 888 | − if (of_get_property(np, "non-removable", NULL)) | |
| 889 | − boarddata->cd_type = ESDHC_CD_PERMANENT; | |
| 890 | − | |
| 891 | − if (of_get_property(np, "fsl,cd-controller", NULL)) | |
| 892 | − boarddata->cd_type = ESDHC_CD_CONTROLLER; | |
| 879 | + struct esdhc_platform_data *boarddata = &imx_data->boarddata; | |
| 880 | + int ret; | |
| 893 | 881 | |
| 894 | 882 | if (of_get_property(np, "fsl,wp-controller", NULL)) |
| 895 | 883 | boarddata->wp_type = ESDHC_WP_CONTROLLER; |
| 896 | 884 | |
| 897 | − boarddata->cd_gpio = of_get_named_gpio(np, "cd-gpios", 0); | |
| 898 | − if (gpio_is_valid(boarddata->cd_gpio)) | |
| 899 | − boarddata->cd_type = ESDHC_CD_GPIO; | |
| 900 | − | |
| 901 | 885 | boarddata->wp_gpio = of_get_named_gpio(np, "wp-gpios", 0); |
| 902 | 886 | if (gpio_is_valid(boarddata->wp_gpio)) |
| 903 | 887 | boarddata->wp_type = ESDHC_WP_GPIO; |
| 904 | 888 | |
| 905 | − of_property_read_u32(np, "bus-width", &boarddata->max_bus_width); | |
| 906 | − | |
| 907 | − of_property_read_u32(np, "max-frequency", &boarddata->f_max); | |
| 908 | − | |
| 909 | 889 | if (of_find_property(np, "no-1-8-v", NULL)) |
| 910 | 890 | boarddata->support_vsel = false; |
| 911 | 891 | else |
| @@ -916,29 +896,119 @@ sdhci_esdhc_imx_probe_dt(struct platform_device *pdev, · 4 unmodified lines | ||
| 916 | 896 | |
| 917 | 897 | mmc_of_parse_voltage(np, &host->ocr_mask); |
| 918 | 898 | |
| 899 | + /* sdr50 and sdr104 needs work on 1.8v signal voltage */ | |
| 900 | + if ((boarddata->support_vsel) && esdhc_is_usdhc(imx_data) && | |
| 901 | + !IS_ERR(imx_data->pins_default)) { | |
| 902 | + imx_data->pins_100mhz = pinctrl_lookup_state(imx_data->pinctrl, | |
| 903 | + ESDHC_PINCTRL_STATE_100MHZ); | |
| 904 | + imx_data->pins_200mhz = pinctrl_lookup_state(imx_data->pinctrl, | |
| 905 | + ESDHC_PINCTRL_STATE_200MHZ); | |
| 906 | + if (IS_ERR(imx_data->pins_100mhz) || | |
| 907 | + IS_ERR(imx_data->pins_200mhz)) { | |
| 908 | + dev_warn(mmc_dev(host->mmc), | |
| 909 | + "could not get ultra high speed state, work on normal mode\n"); | |
| 910 | + /* | |
| 911 | + * fall back to not support uhs by specify no 1.8v quirk | |
| 912 | + */ | |
| 913 | + host->quirks2 |= SDHCI_QUIRK2_NO_1_8_V; | |
| 914 | + } | |
| 915 | + } else { | |
| 916 | + host->quirks2 |= SDHCI_QUIRK2_NO_1_8_V; | |
| 917 | + } | |
| 918 | + | |
| 919 | 919 | /* call to generic mmc_of_parse to support additional capabilities */ |
| 920 | − return mmc_of_parse(host->mmc); | |
| 920 | + ret = mmc_of_parse(host->mmc); | |
| 921 | + if (ret) | |
| 922 | + return ret; | |
| 923 | + | |
| 924 | + if (!IS_ERR_VALUE(mmc_gpio_get_cd(host->mmc))) | |
| 925 | + host->quirks &= ~SDHCI_QUIRK_BROKEN_CARD_DETECTION; | |
| 926 | + | |
| 927 | + return 0; | |
| 921 | 928 | } |
| 922 | 929 | #else |
| 923 | 930 | static inline int |
| 924 | 931 | sdhci_esdhc_imx_probe_dt(struct platform_device *pdev, |
| 925 | 932 | struct sdhci_host *host, |
| 926 | − struct esdhc_platform_data *boarddata) | |
| 933 | + struct pltfm_imx_data *imx_data) | |
| 927 | 934 | { |
| 928 | 935 | return -ENODEV; |
| 929 | 936 | } |
| 930 | 937 | #endif |
| 931 | 938 | |
| 939 | +static int sdhci_esdhc_imx_probe_nondt(struct platform_device *pdev, | |
| 940 | + struct sdhci_host *host, | |
| 941 | + struct pltfm_imx_data *imx_data) | |
| 942 | +{ | |
| 943 | + struct esdhc_platform_data *boarddata = &imx_data->boarddata; | |
| 944 | + int err; | |
| 945 | + | |
| 946 | + if (!host->mmc->parent->platform_data) { | |
| 947 | + dev_err(mmc_dev(host->mmc), "no board data!\n"); | |
| 948 | + return -EINVAL; | |
| 949 | + } | |
| 950 | + | |
| 951 | + imx_data->boarddata = *((struct esdhc_platform_data *) | |
| 952 | + host->mmc->parent->platform_data); | |
| 953 | + /* write_protect */ | |
| 954 | + if (boarddata->wp_type == ESDHC_WP_GPIO) { | |
| 955 | + err = mmc_gpio_request_ro(host->mmc, boarddata->wp_gpio); | |
| 956 | + if (err) { | |
| 957 | + dev_err(mmc_dev(host->mmc), | |
| 958 | + "failed to request write-protect gpio!\n"); | |
| 959 | + return err; | |
| 960 | + } | |
| 961 | + host->mmc->caps2 |= MMC_CAP2_RO_ACTIVE_HIGH; | |
| 962 | + } | |
| 963 | + | |
| 964 | + /* card_detect */ | |
| 965 | + switch (boarddata->cd_type) { | |
| 966 | + case ESDHC_CD_GPIO: | |
| 967 | + err = mmc_gpio_request_cd(host->mmc, boarddata->cd_gpio, 0); | |
| 968 | + if (err) { | |
| 969 | + dev_err(mmc_dev(host->mmc), | |
| 970 | + "failed to request card-detect gpio!\n"); | |
| 971 | + return err; | |
| 972 | + } | |
| 973 | + /* fall through */ | |
| 974 | + | |
| 975 | + case ESDHC_CD_CONTROLLER: | |
| 976 | + /* we have a working card_detect back */ | |
| 977 | + host->quirks &= ~SDHCI_QUIRK_BROKEN_CARD_DETECTION; | |
| 978 | + break; | |
| 979 | + | |
| 980 | + case ESDHC_CD_PERMANENT: | |
| 981 | + host->mmc->caps |= MMC_CAP_NONREMOVABLE; | |
| 982 | + break; | |
| 983 | + | |
| 984 | + case ESDHC_CD_NONE: | |
| 985 | + break; | |
| 986 | + } | |
| 987 | + | |
| 988 | + switch (boarddata->max_bus_width) { | |
| 989 | + case 8: | |
| 990 | + host->mmc->caps |= MMC_CAP_8_BIT_DATA | MMC_CAP_4_BIT_DATA; | |
| 991 | + break; | |
| 992 | + case 4: | |
| 993 | + host->mmc->caps |= MMC_CAP_4_BIT_DATA; | |
| 994 | + break; | |
| 995 | + case 1: | |
| 996 | + default: | |
| 997 | + host->quirks |= SDHCI_QUIRK_FORCE_1_BIT_DATA; | |
| 998 | + break; | |
| 999 | + } | |
| 1000 | + | |
| 1001 | + return 0; | |
| 1002 | +} | |
| 1003 | + | |
| 932 | 1004 | static int sdhci_esdhc_imx_probe(struct platform_device *pdev) |
| 933 | 1005 | { |
| 934 | 1006 | const struct of_device_id *of_id = |
| 935 | 1007 | of_match_device(imx_esdhc_dt_ids, &pdev->dev); |
| 936 | 1008 | struct sdhci_pltfm_host *pltfm_host; |
| 937 | 1009 | struct sdhci_host *host; |
| 938 | − struct esdhc_platform_data *boarddata; | |
| 939 | 1010 | int err; |
| 940 | 1011 | struct pltfm_imx_data *imx_data; |
| 941 | − bool dt = true; | |
| 942 | 1012 | |
| 943 | 1013 | host = sdhci_pltfm_init(pdev, &sdhci_esdhc_imx_pdata, 0); |
| 944 | 1014 | if (IS_ERR(host)) |
| @@ -1030,84 +1100,12 @@ static int sdhci_esdhc_imx_probe(struct platform_device *pdev) · 85 unmodified lines | ||
| 1030 | 1100 | if (imx_data->socdata->flags & ESDHC_FLAG_ERR004536) |
| 1031 | 1101 | host->quirks |= SDHCI_QUIRK_BROKEN_ADMA; |
| 1032 | 1102 | |
| 1033 | − boarddata = &imx_data->boarddata; | |
| 1034 | − if (sdhci_esdhc_imx_probe_dt(pdev, host, boarddata) < 0) { | |
| 1035 | − if (!host->mmc->parent->platform_data) { | |
| 1036 | − dev_err(mmc_dev(host->mmc), "no board data!\n"); | |
| 1037 | − err = -EINVAL; | |
| 1038 | − goto disable_clk; | |
| 1039 | − } | |
| 1040 | − imx_data->boarddata = *((struct esdhc_platform_data *) | |
| 1041 | − host->mmc->parent->platform_data); | |
| 1042 | − dt = false; | |
| 1043 | − } | |
| 1044 | − /* write_protect */ | |
| 1045 | − if (boarddata->wp_type == ESDHC_WP_GPIO && !dt) { | |
| 1046 | − err = mmc_gpio_request_ro(host->mmc, boarddata->wp_gpio); | |
| 1047 | − if (err) { | |
| 1048 | − dev_err(mmc_dev(host->mmc), | |
| 1049 | − "failed to request write-protect gpio!\n"); | |
| 1050 | − goto disable_clk; | |
| 1051 | − } | |
| 1052 | − host->mmc->caps2 |= MMC_CAP2_RO_ACTIVE_HIGH; | |
| 1053 | − } | |
| 1054 | − | |
| 1055 | − /* card_detect */ | |
| 1056 | − switch (boarddata->cd_type) { | |
| 1057 | − case ESDHC_CD_GPIO: | |
| 1058 | − if (dt) | |
| 1059 | − break; | |
| 1060 | − err = mmc_gpio_request_cd(host->mmc, boarddata->cd_gpio, 0); | |
| 1061 | − if (err) { | |
| 1062 | − dev_err(mmc_dev(host->mmc), | |
| 1063 | − "failed to request card-detect gpio!\n"); | |
| 1064 | − goto disable_clk; | |
| 1065 | − } | |
| 1066 | − /* fall through */ | |
| 1067 | − | |
| 1068 | − case ESDHC_CD_CONTROLLER: | |
| 1069 | − /* we have a working card_detect back */ | |
| 1070 | − host->quirks &= ~SDHCI_QUIRK_BROKEN_CARD_DETECTION; | |
| 1071 | − break; | |
| 1072 | − | |
| 1073 | − case ESDHC_CD_PERMANENT: | |
| 1074 | − host->mmc->caps |= MMC_CAP_NONREMOVABLE; | |
| 1075 | − break; | |
| 1076 | − | |
| 1077 | − case ESDHC_CD_NONE: | |
| 1078 | − break; | |
| 1079 | − } | |
| 1080 | − | |
| 1081 | − switch (boarddata->max_bus_width) { | |
| 1082 | − case 8: | |
| 1083 | − host->mmc->caps |= MMC_CAP_8_BIT_DATA | MMC_CAP_4_BIT_DATA; | |
| 1084 | − break; | |
| 1085 | − case 4: | |
| 1086 | − host->mmc->caps |= MMC_CAP_4_BIT_DATA; | |
| 1087 | − break; | |
| 1088 | − case 1: | |
| 1089 | − default: | |
| 1090 | − host->quirks |= SDHCI_QUIRK_FORCE_1_BIT_DATA; | |
| 1091 | − break; | |
| 1092 | − } | |
| 1093 | − | |
| 1094 | − /* sdr50 and sdr104 needs work on 1.8v signal voltage */ | |
| 1095 | − if ((boarddata->support_vsel) && esdhc_is_usdhc(imx_data) && | |
| 1096 | − !IS_ERR(imx_data->pins_default)) { | |
| 1097 | − imx_data->pins_100mhz = pinctrl_lookup_state(imx_data->pinctrl, | |
| 1098 | − ESDHC_PINCTRL_STATE_100MHZ); | |
| 1099 | − imx_data->pins_200mhz = pinctrl_lookup_state(imx_data->pinctrl, | |
| 1100 | − ESDHC_PINCTRL_STATE_200MHZ); | |
| 1101 | − if (IS_ERR(imx_data->pins_100mhz) || | |
| 1102 | − IS_ERR(imx_data->pins_200mhz)) { | |
| 1103 | − dev_warn(mmc_dev(host->mmc), | |
| 1104 | − "could not get ultra high speed state, work on normal mode\n"); | |
| 1105 | − /* fall back to not support uhs by specify no 1.8v quirk */ | |
| 1106 | − host->quirks2 |= SDHCI_QUIRK2_NO_1_8_V; | |
| 1107 | − } | |
| 1108 | − } else { | |
| 1109 | − host->quirks2 |= SDHCI_QUIRK2_NO_1_8_V; | |
| 1110 | − } | |
| 1103 | + if (of_id) | |
| 1104 | + err = sdhci_esdhc_imx_probe_dt(pdev, host, imx_data); | |
| 1105 | + else | |
| 1106 | + err = sdhci_esdhc_imx_probe_nondt(pdev, host, imx_data); | |
| 1107 | + if (err) | |
| 1108 | + goto disable_clk; | |
| 1111 | 1109 | |
| 1112 | 1110 | err = sdhci_add_host(host); |
| 1113 | 1111 | if (err) |
| @@ -45,6 +45,6 @@ · 44 unmodified lines | ||
| 45 | 45 | #define ESDHC_DMA_SYSCTL 0x40c |
| 46 | 46 | #define ESDHC_DMA_SNOOP 0x00000040 |
| 47 | 47 | |
| 48 | −#define ESDHC_HOST_CONTROL_RES 0x05 | |
| 48 | +#define ESDHC_HOST_CONTROL_RES 0x01 | |
| 49 | 49 | |
| 50 | 50 | #endif /* _DRIVERS_MMC_SDHCI_ESDHC_H */ |
| @@ -411,6 +411,7 @@ static int sdhci_pxav3_probe(struct platform_device *pdev) · 410 unmodified lines | ||
| 411 | 411 | goto err_of_parse; |
| 412 | 412 | sdhci_get_of_property(pdev); |
| 413 | 413 | pdata = pxav3_get_mmc_pdata(dev); |
| 414 | + pdev->dev.platform_data = pdata; | |
| 414 | 415 | } else if (pdata) { |
| 415 | 416 | /* on-chip device */ |
| 416 | 417 | if (pdata->flags & PXA_FLAG_CARD_PERMANENT) |
| @@ -2866,6 +2866,7 @@ int sdhci_add_host(struct sdhci_host *host) · 2865 unmodified lines | ||
| 2866 | 2866 | u32 max_current_caps; |
| 2867 | 2867 | unsigned int ocr_avail; |
| 2868 | 2868 | unsigned int override_timeout_clk; |
| 2869 | + u32 max_clk; | |
| 2869 | 2870 | int ret; |
| 2870 | 2871 | |
| 2871 | 2872 | WARN_ON(host == NULL); |
| @@ -2978,8 +2979,11 @@ int sdhci_add_host(struct sdhci_host *host) · 106 unmodified lines | ||
| 2978 | 2979 | GFP_KERNEL); |
| 2979 | 2980 | host->align_buffer = kmalloc(host->align_buffer_sz, GFP_KERNEL); |
| 2980 | 2981 | if (!host->adma_table || !host->align_buffer) { |
| 2981 | − dma_free_coherent(mmc_dev(mmc), host->adma_table_sz, | |
| 2982 | − host->adma_table, host->adma_addr); | |
| 2982 | + if (host->adma_table) | |
| 2983 | + dma_free_coherent(mmc_dev(mmc), | |
| 2984 | + host->adma_table_sz, | |
| 2985 | + host->adma_table, | |
| 2986 | + host->adma_addr); | |
| 2983 | 2987 | kfree(host->align_buffer); |
| 2984 | 2988 | pr_warn("%s: Unable to allocate ADMA buffers - falling back to standard DMA\n", |
| 2985 | 2989 | mmc_hostname(mmc)); |
| @@ -3047,18 +3051,22 @@ int sdhci_add_host(struct sdhci_host *host) · 61 unmodified lines | ||
| 3047 | 3051 | * Set host parameters. |
| 3048 | 3052 | */ |
| 3049 | 3053 | mmc->ops = &sdhci_ops; |
| 3050 | − mmc->f_max = host->max_clk; | |
| 3054 | + max_clk = host->max_clk; | |
| 3055 | + | |
| 3051 | 3056 | if (host->ops->get_min_clock) |
| 3052 | 3057 | mmc->f_min = host->ops->get_min_clock(host); |
| 3053 | 3058 | else if (host->version >= SDHCI_SPEC_300) { |
| 3054 | 3059 | if (host->clk_mul) { |
| 3055 | 3060 | mmc->f_min = (host->max_clk * host->clk_mul) / 1024; |
| 3056 | − mmc->f_max = host->max_clk * host->clk_mul; | |
| 3061 | + max_clk = host->max_clk * host->clk_mul; | |
| 3057 | 3062 | } else |
| 3058 | 3063 | mmc->f_min = host->max_clk / SDHCI_MAX_DIV_SPEC_300; |
| 3059 | 3064 | } else |
| 3060 | 3065 | mmc->f_min = host->max_clk / SDHCI_MAX_DIV_SPEC_200; |
| 3061 | 3066 | |
| 3067 | + if (!mmc->f_max || (mmc->f_max && (mmc->f_max > max_clk))) | |
| 3068 | + mmc->f_max = max_clk; | |
| 3069 | + | |
| 3062 | 3070 | if (!(host->quirks & SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK)) { |
| 3063 | 3071 | host->timeout_clk = (caps[0] & SDHCI_TIMEOUT_CLK_MASK) >> |
| 3064 | 3072 | SDHCI_TIMEOUT_CLK_SHIFT; |
| @@ -625,6 +625,23 @@ static void bond_set_dev_addr(struct net_device *bond_dev, · 624 unmodified lines | ||
| 625 | 625 | call_netdevice_notifiers(NETDEV_CHANGEADDR, bond_dev); |
| 626 | 626 | } |
| 627 | 627 | |
| 628 | +static struct slave *bond_get_old_active(struct bonding *bond, | |
| 629 | + struct slave *new_active) | |
| 630 | +{ | |
| 631 | + struct slave *slave; | |
| 632 | + struct list_head *iter; | |
| 633 | + | |
| 634 | + bond_for_each_slave(bond, slave, iter) { | |
| 635 | + if (slave == new_active) | |
| 636 | + continue; | |
| 637 | + | |
| 638 | + if (ether_addr_equal(bond->dev->dev_addr, slave->dev->dev_addr)) | |
| 639 | + return slave; | |
| 640 | + } | |
| 641 | + | |
| 642 | + return NULL; | |
| 643 | +} | |
| 644 | + | |
| 628 | 645 | /* bond_do_fail_over_mac |
| 629 | 646 | * |
| 630 | 647 | * Perform special MAC address swapping for fail_over_mac settings |
| @@ -652,6 +669,9 @@ static void bond_do_fail_over_mac(struct bonding *bond, · 21 unmodified lines | ||
| 652 | 669 | if (!new_active) |
| 653 | 670 | return; |
| 654 | 671 | |
| 672 | + if (!old_active) | |
| 673 | + old_active = bond_get_old_active(bond, new_active); | |
| 674 | + | |
| 655 | 675 | if (old_active) { |
| 656 | 676 | ether_addr_copy(tmp_mac, new_active->dev->dev_addr); |
| 657 | 677 | ether_addr_copy(saddr.sa_data, |
| @@ -766,6 +786,7 @@ static bool bond_should_notify_peers(struct bonding *bond) · 108 unmodified lines | ||
| 766 | 786 | slave ? slave->dev->name : "NULL"); |
| 767 | 787 | |
| 768 | 788 | if (!slave || !bond->send_peer_notif || |
| 789 | + !netif_carrier_ok(bond->dev) || | |
| 769 | 790 | test_bit(__LINK_STATE_LINKWATCH_PENDING, &slave->dev->state)) |
| 770 | 791 | return false; |
| 771 | 792 | |
| @@ -1725,9 +1746,16 @@ err_free: · 953 unmodified lines | ||
| 1725 | 1746 | |
| 1726 | 1747 | err_undo_flags: |
| 1727 | 1748 | /* Enslave of first slave has failed and we need to fix master's mac */ |
| 1728 | − if (!bond_has_slaves(bond) && | |
| 1729 | − ether_addr_equal_64bits(bond_dev->dev_addr, slave_dev->dev_addr)) | |
| 1730 | − eth_hw_addr_random(bond_dev); | |
| 1749 | + if (!bond_has_slaves(bond)) { | |
| 1750 | + if (ether_addr_equal_64bits(bond_dev->dev_addr, | |
| 1751 | + slave_dev->dev_addr)) | |
| 1752 | + eth_hw_addr_random(bond_dev); | |
| 1753 | + if (bond_dev->type != ARPHRD_ETHER) { | |
| 1754 | + ether_setup(bond_dev); | |
| 1755 | + bond_dev->flags |= IFF_MASTER; | |
| 1756 | + bond_dev->priv_flags &= ~IFF_TX_SKB_SHARING; | |
| 1757 | + } | |
| 1758 | + } | |
| 1731 | 1759 | |
| 1732 | 1760 | return res; |
| 1733 | 1761 | } |
| @@ -1916,6 +1944,7 @@ static int bond_release_and_destroy(struct net_device *bond_dev, · 182 unmodified lines | ||
| 1916 | 1944 | bond_dev->priv_flags |= IFF_DISABLE_NETPOLL; |
| 1917 | 1945 | netdev_info(bond_dev, "Destroying bond %s\n", |
| 1918 | 1946 | bond_dev->name); |
| 1947 | + bond_remove_proc_entry(bond); | |
| 1919 | 1948 | unregister_netdevice(bond_dev); |
| 1920 | 1949 | } |
| 1921 | 1950 | return ret; |
| @@ -577,10 +577,10 @@ static void at91_rx_overflow_err(struct net_device *dev) · 576 unmodified lines | ||
| 577 | 577 | |
| 578 | 578 | cf->can_id |= CAN_ERR_CRTL; |
| 579 | 579 | cf->data[1] = CAN_ERR_CRTL_RX_OVERFLOW; |
| 580 | − netif_receive_skb(skb); | |
| 581 | 580 | |
| 582 | 581 | stats->rx_packets++; |
| 583 | 582 | stats->rx_bytes += cf->can_dlc; |
| 583 | + netif_receive_skb(skb); | |
| 584 | 584 | } |
| 585 | 585 | |
| 586 | 586 | /** |
| @@ -642,10 +642,10 @@ static void at91_read_msg(struct net_device *dev, unsigned int mb) · 55 unmodified lines | ||
| 642 | 642 | } |
| 643 | 643 | |
| 644 | 644 | at91_read_mb(dev, mb, cf); |
| 645 | − netif_receive_skb(skb); | |
| 646 | 645 | |
| 647 | 646 | stats->rx_packets++; |
| 648 | 647 | stats->rx_bytes += cf->can_dlc; |
| 648 | + netif_receive_skb(skb); | |
| 649 | 649 | |
| 650 | 650 | can_led_event(dev, CAN_LED_EVENT_RX); |
| 651 | 651 | } |
| @@ -802,10 +802,10 @@ static int at91_poll_err(struct net_device *dev, int quota, u32 reg_sr) · 150 unmodified lines | ||
| 802 | 802 | return 0; |
| 803 | 803 | |
| 804 | 804 | at91_poll_err_frame(dev, cf, reg_sr); |
| 805 | − netif_receive_skb(skb); | |
| 806 | 805 | |
| 807 | 806 | dev->stats.rx_packets++; |
| 808 | 807 | dev->stats.rx_bytes += cf->can_dlc; |
| 808 | + netif_receive_skb(skb); | |
| 809 | 809 | |
| 810 | 810 | return 1; |
| 811 | 811 | } |
| @@ -1067,10 +1067,10 @@ static void at91_irq_err(struct net_device *dev) · 255 unmodified lines | ||
| 1067 | 1067 | return; |
| 1068 | 1068 | |
| 1069 | 1069 | at91_irq_err_state(dev, cf, new_state); |
| 1070 | − netif_rx(skb); | |
| 1071 | 1070 | |
| 1072 | 1071 | dev->stats.rx_packets++; |
| 1073 | 1072 | dev->stats.rx_bytes += cf->can_dlc; |
| 1073 | + netif_rx(skb); | |
| 1074 | 1074 | |
| 1075 | 1075 | priv->can.state = new_state; |
| 1076 | 1076 | } |
| @@ -424,10 +424,9 @@ static void bfin_can_rx(struct net_device *dev, u16 isrc) · 423 unmodified lines | ||
| 424 | 424 | cf->data[6 - i] = (6 - i) < cf->can_dlc ? (val >> 8) : 0; |
| 425 | 425 | } |
| 426 | 426 | |
| 427 | − netif_rx(skb); | |
| 428 | − | |
| 429 | 427 | stats->rx_packets++; |
| 430 | 428 | stats->rx_bytes += cf->can_dlc; |
| 429 | + netif_rx(skb); | |
| 431 | 430 | } |
| 432 | 431 | |
| 433 | 432 | static int bfin_can_err(struct net_device *dev, u16 isrc, u16 status) |
| @@ -508,10 +507,9 @@ static int bfin_can_err(struct net_device *dev, u16 isrc, u16 status) · 74 unmodified lines | ||
| 508 | 507 | |
| 509 | 508 | priv->can.state = state; |
| 510 | 509 | |
| 511 | − netif_rx(skb); | |
| 512 | − | |
| 513 | 510 | stats->rx_packets++; |
| 514 | 511 | stats->rx_bytes += cf->can_dlc; |
| 512 | + netif_rx(skb); | |
| 515 | 513 | |
| 516 | 514 | return 0; |
| 517 | 515 | } |
| @@ -504,10 +504,10 @@ static void cc770_rx(struct net_device *dev, unsigned int mo, u8 ctrl1) · 503 unmodified lines | ||
| 504 | 504 | for (i = 0; i < cf->can_dlc; i++) |
| 505 | 505 | cf->data[i] = cc770_read_reg(priv, msgobj[mo].data[i]); |
| 506 | 506 | } |
| 507 | − netif_rx(skb); | |
| 508 | 507 | |
| 509 | 508 | stats->rx_packets++; |
| 510 | 509 | stats->rx_bytes += cf->can_dlc; |
| 510 | + netif_rx(skb); | |
| 511 | 511 | } |
| 512 | 512 | |
| 513 | 513 | static int cc770_err(struct net_device *dev, u8 status) |
| @@ -584,10 +584,10 @@ static int cc770_err(struct net_device *dev, u8 status) · 70 unmodified lines | ||
| 584 | 584 | } |
| 585 | 585 | } |
| 586 | 586 | |
| 587 | − netif_rx(skb); | |
| 588 | 587 | |
| 589 | 588 | stats->rx_packets++; |
| 590 | 589 | stats->rx_bytes += cf->can_dlc; |
| 590 | + netif_rx(skb); | |
| 591 | 591 | |
| 592 | 592 | return 0; |
| 593 | 593 | } |
| @@ -577,10 +577,10 @@ static int flexcan_poll_bus_err(struct net_device *dev, u32 reg_esr) · 576 unmodified lines | ||
| 577 | 577 | return 0; |
| 578 | 578 | |
| 579 | 579 | do_bus_err(dev, cf, reg_esr); |
| 580 | − netif_receive_skb(skb); | |
| 581 | 580 | |
| 582 | 581 | dev->stats.rx_packets++; |
| 583 | 582 | dev->stats.rx_bytes += cf->can_dlc; |
| 583 | + netif_receive_skb(skb); | |
| 584 | 584 | |
| 585 | 585 | return 1; |
| 586 | 586 | } |
| @@ -622,10 +622,9 @@ static int flexcan_poll_state(struct net_device *dev, u32 reg_esr) · 35 unmodified lines | ||
| 622 | 622 | if (unlikely(new_state == CAN_STATE_BUS_OFF)) |
| 623 | 623 | can_bus_off(dev); |
| 624 | 624 | |
| 625 | − netif_receive_skb(skb); | |
| 626 | − | |
| 627 | 625 | dev->stats.rx_packets++; |
| 628 | 626 | dev->stats.rx_bytes += cf->can_dlc; |
| 627 | + netif_receive_skb(skb); | |
| 629 | 628 | |
| 630 | 629 | return 1; |
| 631 | 630 | } |
| @@ -670,10 +669,10 @@ static int flexcan_read_frame(struct net_device *dev) · 38 unmodified lines | ||
| 670 | 669 | } |
| 671 | 670 | |
| 672 | 671 | flexcan_read_fifo(dev, cf); |
| 673 | − netif_receive_skb(skb); | |
| 674 | 672 | |
| 675 | 673 | stats->rx_packets++; |
| 676 | 674 | stats->rx_bytes += cf->can_dlc; |
| 675 | + netif_receive_skb(skb); | |
| 677 | 676 | |
| 678 | 677 | can_led_event(dev, CAN_LED_EVENT_RX); |
| 679 | 678 | |
| @@ -1216,11 +1216,12 @@ static int grcan_receive(struct net_device *dev, int budget) · 1215 unmodified lines | ||
| 1216 | 1216 | cf->data[i] = (u8)(slot[j] >> shift); |
| 1217 | 1217 | } |
| 1218 | 1218 | } |
| 1219 | − netif_receive_skb(skb); | |
| 1220 | 1219 | |
| 1221 | 1220 | /* Update statistics and read pointer */ |
| 1222 | 1221 | stats->rx_packets++; |
| 1223 | 1222 | stats->rx_bytes += cf->can_dlc; |
| 1223 | + netif_receive_skb(skb); | |
| 1224 | + | |
| 1224 | 1225 | rd = grcan_ring_add(rd, GRCAN_MSG_SIZE, dma->rx.size); |
| 1225 | 1226 | } |
| 1226 | 1227 | |
| @@ -377,10 +377,9 @@ static void sja1000_rx(struct net_device *dev) · 376 unmodified lines | ||
| 377 | 377 | /* release receive buffer */ |
| 378 | 378 | sja1000_write_cmdreg(priv, CMD_RRB); |
| 379 | 379 | |
| 380 | − netif_rx(skb); | |
| 381 | − | |
| 382 | 380 | stats->rx_packets++; |
| 383 | 381 | stats->rx_bytes += cf->can_dlc; |
| 382 | + netif_rx(skb); | |
| 384 | 383 | |
| 385 | 384 | can_led_event(dev, CAN_LED_EVENT_RX); |
| 386 | 385 | } |
| @@ -484,10 +483,9 @@ static int sja1000_err(struct net_device *dev, uint8_t isrc, uint8_t status) · 97 unmodified lines | ||
| 484 | 483 | can_bus_off(dev); |
| 485 | 484 | } |
| 486 | 485 | |
| 487 | − netif_rx(skb); | |
| 488 | − | |
| 489 | 486 | stats->rx_packets++; |
| 490 | 487 | stats->rx_bytes += cf->can_dlc; |
| 488 | + netif_rx(skb); | |
| 491 | 489 | |
| 492 | 490 | return 0; |
| 493 | 491 | } |
| @@ -218,10 +218,10 @@ static void slc_bump(struct slcan *sl) · 217 unmodified lines | ||
| 218 | 218 | |
| 219 | 219 | memcpy(skb_put(skb, sizeof(struct can_frame)), |
| 220 | 220 | &cf, sizeof(struct can_frame)); |
| 221 | − netif_rx_ni(skb); | |
| 222 | 221 | |
| 223 | 222 | sl->dev->stats.rx_packets++; |
| 224 | 223 | sl->dev->stats.rx_bytes += cf.can_dlc; |
| 224 | + netif_rx_ni(skb); | |
| 225 | 225 | } |
| 226 | 226 | |
| 227 | 227 | /* parse tty input stream */ |
| @@ -1086,8 +1086,8 @@ static int mcp251x_can_probe(struct spi_device *spi) · 1085 unmodified lines | ||
| 1086 | 1086 | if (ret) |
| 1087 | 1087 | goto out_clk; |
| 1088 | 1088 | |
| 1089 | − priv->power = devm_regulator_get(&spi->dev, "vdd"); | |
| 1090 | − priv->transceiver = devm_regulator_get(&spi->dev, "xceiver"); | |
| 1089 | + priv->power = devm_regulator_get_optional(&spi->dev, "vdd"); | |
| 1090 | + priv->transceiver = devm_regulator_get_optional(&spi->dev, "xceiver"); | |
| 1091 | 1091 | if ((PTR_ERR(priv->power) == -EPROBE_DEFER) || |
| 1092 | 1092 | (PTR_ERR(priv->transceiver) == -EPROBE_DEFER)) { |
| 1093 | 1093 | ret = -EPROBE_DEFER; |
| @@ -1222,17 +1222,16 @@ static int __maybe_unused mcp251x_can_resume(struct device *dev) · 128 unmodified lines | ||
| 1222 | 1222 | struct spi_device *spi = to_spi_device(dev); |
| 1223 | 1223 | struct mcp251x_priv *priv = spi_get_drvdata(spi); |
| 1224 | 1224 | |
| 1225 | − if (priv->after_suspend & AFTER_SUSPEND_POWER) { | |
| 1225 | + if (priv->after_suspend & AFTER_SUSPEND_POWER) | |
| 1226 | 1226 | mcp251x_power_enable(priv->power, 1); |
| 1227 | + | |
| 1228 | + if (priv->after_suspend & AFTER_SUSPEND_UP) { | |
| 1229 | + mcp251x_power_enable(priv->transceiver, 1); | |
| 1227 | 1230 | queue_work(priv->wq, &priv->restart_work); |
| 1228 | 1231 | } else { |
| 1229 | − if (priv->after_suspend & AFTER_SUSPEND_UP) { | |
| 1230 | − mcp251x_power_enable(priv->transceiver, 1); | |
| 1231 | − queue_work(priv->wq, &priv->restart_work); | |
| 1232 | − } else { | |
| 1233 | − priv->after_suspend = 0; | |
| 1234 | − } | |
| 1232 | + priv->after_suspend = 0; | |
| 1235 | 1233 | } |
| 1234 | + | |
| 1236 | 1235 | priv->force_quit = 0; |
| 1237 | 1236 | enable_irq(spi->irq); |
| 1238 | 1237 | return 0; |
| @@ -747,9 +747,9 @@ static int ti_hecc_error(struct net_device *ndev, int int_status, · 746 unmodified lines | ||
| 747 | 747 | } |
| 748 | 748 | } |
| 749 | 749 | |
| 750 | − netif_rx(skb); | |
| 751 | 750 | stats->rx_packets++; |
| 752 | 751 | stats->rx_bytes += cf->can_dlc; |
| 752 | + netif_rx(skb); | |
| 753 | 753 | |
| 754 | 754 | return 0; |
| 755 | 755 | } |
| @@ -324,10 +324,9 @@ static void ems_usb_rx_can_msg(struct ems_usb *dev, struct ems_cpc_msg *msg) · 323 unmodified lines | ||
| 324 | 324 | cf->data[i] = msg->msg.can_msg.msg[i]; |
| 325 | 325 | } |
| 326 | 326 | |
| 327 | − netif_rx(skb); | |
| 328 | − | |
| 329 | 327 | stats->rx_packets++; |
| 330 | 328 | stats->rx_bytes += cf->can_dlc; |
| 329 | + netif_rx(skb); | |
| 331 | 330 | } |
| 332 | 331 | |
| 333 | 332 | static void ems_usb_rx_err(struct ems_usb *dev, struct ems_cpc_msg *msg) |
| @@ -400,10 +399,9 @@ static void ems_usb_rx_err(struct ems_usb *dev, struct ems_cpc_msg *msg) · 66 unmodified lines | ||
| 400 | 399 | stats->rx_errors++; |
| 401 | 400 | } |
| 402 | 401 | |
| 403 | − netif_rx(skb); | |
| 404 | − | |
| 405 | 402 | stats->rx_packets++; |
| 406 | 403 | stats->rx_bytes += cf->can_dlc; |
| 404 | + netif_rx(skb); | |
| 407 | 405 | } |
| 408 | 406 | |
| 409 | 407 | /* |
| @@ -301,13 +301,12 @@ static void esd_usb2_rx_event(struct esd_usb2_net_priv *priv, · 300 unmodified lines | ||
| 301 | 301 | cf->data[7] = rxerr; |
| 302 | 302 | } |
| 303 | 303 | |
| 304 | − netif_rx(skb); | |
| 305 | − | |
| 306 | 304 | priv->bec.txerr = txerr; |
| 307 | 305 | priv->bec.rxerr = rxerr; |
| 308 | 306 | |
| 309 | 307 | stats->rx_packets++; |
| 310 | 308 | stats->rx_bytes += cf->can_dlc; |
| 309 | + netif_rx(skb); | |
| 311 | 310 | } |
| 312 | 311 | } |
| 313 | 312 | |
| @@ -347,10 +346,9 @@ static void esd_usb2_rx_can_msg(struct esd_usb2_net_priv *priv, · 33 unmodified lines | ||
| 347 | 346 | cf->data[i] = msg->msg.rx.data[i]; |
| 348 | 347 | } |
| 349 | 348 | |
| 350 | − netif_rx(skb); | |
| 351 | − | |
| 352 | 349 | stats->rx_packets++; |
| 353 | 350 | stats->rx_bytes += cf->can_dlc; |
| 351 | + netif_rx(skb); | |
| 354 | 352 | } |
| 355 | 353 | |
| 356 | 354 | return; |
| @@ -526,9 +526,9 @@ static int pcan_usb_decode_error(struct pcan_usb_msg_context *mc, u8 n, · 525 unmodified lines | ||
| 526 | 526 | hwts->hwtstamp = timeval_to_ktime(tv); |
| 527 | 527 | } |
| 528 | 528 | |
| 529 | − netif_rx(skb); | |
| 530 | 529 | mc->netdev->stats.rx_packets++; |
| 531 | 530 | mc->netdev->stats.rx_bytes += cf->can_dlc; |
| 531 | + netif_rx(skb); | |
| 532 | 532 | |
| 533 | 533 | return 0; |
| 534 | 534 | } |
| @@ -659,12 +659,11 @@ static int pcan_usb_decode_data(struct pcan_usb_msg_context *mc, u8 status_len) · 124 unmodified lines | ||
| 659 | 659 | hwts = skb_hwtstamps(skb); |
| 660 | 660 | hwts->hwtstamp = timeval_to_ktime(tv); |
| 661 | 661 | |
| 662 | − /* push the skb */ | |
| 663 | − netif_rx(skb); | |
| 664 | − | |
| 665 | 662 | /* update statistics */ |
| 666 | 663 | mc->netdev->stats.rx_packets++; |
| 667 | 664 | mc->netdev->stats.rx_bytes += cf->can_dlc; |
| 665 | + /* push the skb */ | |
| 666 | + netif_rx(skb); | |
| 668 | 667 | |
| 669 | 668 | return 0; |
| 670 | 669 | |
| @@ -553,9 +553,9 @@ static int pcan_usb_pro_handle_canmsg(struct pcan_usb_pro_interface *usb_if, · 552 unmodified lines | ||
| 553 | 553 | hwts = skb_hwtstamps(skb); |
| 554 | 554 | hwts->hwtstamp = timeval_to_ktime(tv); |
| 555 | 555 | |
| 556 | − netif_rx(skb); | |
| 557 | 556 | netdev->stats.rx_packets++; |
| 558 | 557 | netdev->stats.rx_bytes += can_frame->can_dlc; |
| 558 | + netif_rx(skb); | |
| 559 | 559 | |
| 560 | 560 | return 0; |
| 561 | 561 | } |
| @@ -670,9 +670,9 @@ static int pcan_usb_pro_handle_error(struct pcan_usb_pro_interface *usb_if, · 108 unmodified lines | ||
| 670 | 670 | peak_usb_get_ts_tv(&usb_if->time_ref, le32_to_cpu(er->ts32), &tv); |
| 671 | 671 | hwts = skb_hwtstamps(skb); |
| 672 | 672 | hwts->hwtstamp = timeval_to_ktime(tv); |
| 673 | − netif_rx(skb); | |
| 674 | 673 | netdev->stats.rx_packets++; |
| 675 | 674 | netdev->stats.rx_bytes += can_frame->can_dlc; |
| 675 | + netif_rx(skb); | |
| 676 | 676 | |
| 677 | 677 | return 0; |
| 678 | 678 | } |
| @@ -461,10 +461,9 @@ static void usb_8dev_rx_err_msg(struct usb_8dev_priv *priv, · 460 unmodified lines | ||
| 461 | 461 | priv->bec.txerr = txerr; |
| 462 | 462 | priv->bec.rxerr = rxerr; |
| 463 | 463 | |
| 464 | − netif_rx(skb); | |
| 465 | − | |
| 466 | 464 | stats->rx_packets++; |
| 467 | 465 | stats->rx_bytes += cf->can_dlc; |
| 466 | + netif_rx(skb); | |
| 468 | 467 | } |
| 469 | 468 | |
| 470 | 469 | /* Read data and status frames */ |
| @@ -494,10 +493,9 @@ static void usb_8dev_rx_can_msg(struct usb_8dev_priv *priv, · 23 unmodified lines | ||
| 494 | 493 | else |
| 495 | 494 | memcpy(cf->data, msg->data, cf->can_dlc); |
| 496 | 495 | |
| 497 | − netif_rx(skb); | |
| 498 | − | |
| 499 | 496 | stats->rx_packets++; |
| 500 | 497 | stats->rx_bytes += cf->can_dlc; |
| 498 | + netif_rx(skb); | |
| 501 | 499 | |
| 502 | 500 | can_led_event(priv->netdev, CAN_LED_EVENT_RX); |
| 503 | 501 | } else { |
| @@ -696,9 +696,20 @@ static int bcm_sf2_sw_setup(struct dsa_switch *ds) · 695 unmodified lines | ||
| 696 | 696 | } |
| 697 | 697 | |
| 698 | 698 | /* Include the pseudo-PHY address and the broadcast PHY address to |
| 699 | − * divert reads towards our workaround | |
| 699 | + * divert reads towards our workaround. This is only required for | |
| 700 | + * 7445D0, since 7445E0 disconnects the internal switch pseudo-PHY such | |
| 701 | + * that we can use the regular SWITCH_MDIO master controller instead. | |
| 702 | + * | |
| 703 | + * By default, DSA initializes ds->phys_mii_mask to ds->phys_port_mask | |
| 704 | + * to have a 1:1 mapping between Port address and PHY address in order | |
| 705 | + * to utilize the slave_mii_bus instance to read from Port PHYs. This is | |
| 706 | + * not what we want here, so we initialize phys_mii_mask 0 to always | |
| 707 | + * utilize the "master" MDIO bus backed by the "mdio-unimac" driver. | |
| 700 | 708 | */ |
| 701 | − ds->phys_mii_mask |= ((1 << BRCM_PSEUDO_PHY_ADDR) | (1 << 0)); | |
| 709 | + if (of_machine_is_compatible("brcm,bcm7445d0")) | |
| 710 | + ds->phys_mii_mask |= ((1 << BRCM_PSEUDO_PHY_ADDR) | (1 << 0)); | |
| 711 | + else | |
| 712 | + ds->phys_mii_mask = 0; | |
| 702 | 713 | |
| 703 | 714 | rev = reg_readl(priv, REG_SWITCH_REVISION); |
| 704 | 715 | priv->hw_params.top_rev = (rev >> SWITCH_TOP_REV_SHIFT) & |
| @@ -1163,7 +1163,7 @@ int mv88e6xxx_leave_bridge(struct dsa_switch *ds, int port, u32 br_port_mask) · 1162 unmodified lines | ||
| 1163 | 1163 | |
| 1164 | 1164 | newfid = __ffs(ps->fid_mask); |
| 1165 | 1165 | ps->fid[port] = newfid; |
| 1166 | − ps->fid_mask &= (1 << newfid); | |
| 1166 | + ps->fid_mask &= ~(1 << newfid); | |
| 1167 | 1167 | ps->bridge_mask[fid] &= ~(1 << port); |
| 1168 | 1168 | ps->bridge_mask[newfid] = 1 << port; |
| 1169 | 1169 | |
| @@ -1763,16 +1763,9 @@ vortex_open(struct net_device *dev) · 1762 unmodified lines | ||
| 1763 | 1763 | vp->rx_ring[i].addr = cpu_to_le32(pci_map_single(VORTEX_PCI(vp), skb->data, PKT_BUF_SZ, PCI_DMA_FROMDEVICE)); |
| 1764 | 1764 | } |
| 1765 | 1765 | if (i != RX_RING_SIZE) { |
| 1766 | − int j; | |
| 1767 | 1766 | pr_emerg("%s: no memory for rx ring\n", dev->name); |
| 1768 | − for (j = 0; j < i; j++) { | |
| 1769 | − if (vp->rx_skbuff[j]) { | |
| 1770 | − dev_kfree_skb(vp->rx_skbuff[j]); | |
| 1771 | − vp->rx_skbuff[j] = NULL; | |
| 1772 | − } | |
| 1773 | − } | |
| 1774 | 1767 | retval = -ENOMEM; |
| 1775 | − goto err_free_irq; | |
| 1768 | + goto err_free_skb; | |
| 1776 | 1769 | } |
| 1777 | 1770 | /* Wrap the ring. */ |
| 1778 | 1771 | vp->rx_ring[i-1].next = cpu_to_le32(vp->rx_ring_dma); |
| @@ -1782,7 +1775,13 @@ vortex_open(struct net_device *dev) · 3 unmodified lines | ||
| 1782 | 1775 | if (!retval) |
| 1783 | 1776 | goto out; |
| 1784 | 1777 | |
| 1785 | −err_free_irq: | |
| 1778 | +err_free_skb: | |
| 1779 | + for (i = 0; i < RX_RING_SIZE; i++) { | |
| 1780 | + if (vp->rx_skbuff[i]) { | |
| 1781 | + dev_kfree_skb(vp->rx_skbuff[i]); | |
| 1782 | + vp->rx_skbuff[i] = NULL; | |
| 1783 | + } | |
| 1784 | + } | |
| 1786 | 1785 | free_irq(dev->irq, dev); |
| 1787 | 1786 | err: |
| 1788 | 1787 | if (vortex_debug > 1) |
| @@ -262,9 +262,9 @@ static u16 bnx2x_free_tx_pkt(struct bnx2x *bp, struct bnx2x_fp_txdata *txdata, · 261 unmodified lines | ||
| 262 | 262 | if (likely(skb)) { |
| 263 | 263 | (*pkts_compl)++; |
| 264 | 264 | (*bytes_compl) += skb->len; |
| 265 | + dev_kfree_skb_any(skb); | |
| 265 | 266 | } |
| 266 | 267 | |
| 267 | − dev_kfree_skb_any(skb); | |
| 268 | 268 | tx_buf->first_bd = 0; |
| 269 | 269 | tx_buf->skb = NULL; |
| 270 | 270 | |
| @@ -1718,6 +1718,22 @@ static int bnx2x_nvram_write(struct bnx2x *bp, u32 offset, u8 *data_buf, · 1717 unmodified lines | ||
| 1718 | 1718 | offset += sizeof(u32); |
| 1719 | 1719 | data_buf += sizeof(u32); |
| 1720 | 1720 | written_so_far += sizeof(u32); |
| 1721 | + | |
| 1722 | + /* At end of each 4Kb page, release nvram lock to allow MFW | |
| 1723 | + * chance to take it for its own use. | |
| 1724 | + */ | |
| 1725 | + if ((cmd_flags & MCPR_NVM_COMMAND_LAST) && | |
| 1726 | + (written_so_far < buf_size)) { | |
| 1727 | + DP(BNX2X_MSG_ETHTOOL | BNX2X_MSG_NVM, | |
| 1728 | + "Releasing NVM lock after offset 0x%x\n", | |
| 1729 | + (u32)(offset - sizeof(u32))); | |
| 1730 | + bnx2x_release_nvram_lock(bp); | |
| 1731 | + usleep_range(1000, 2000); | |
| 1732 | + rc = bnx2x_acquire_nvram_lock(bp); | |
| 1733 | + if (rc) | |
| 1734 | + return rc; | |
| 1735 | + } | |
| 1736 | + | |
| 1721 | 1737 | cmd_flags = 0; |
| 1722 | 1738 | } |
| 1723 | 1739 | |
| @@ -676,6 +676,7 @@ bnad_cq_process(struct bnad *bnad, struct bna_ccb *ccb, int budget) · 675 unmodified lines | ||
| 676 | 676 | if (!next_cmpl->valid) |
| 677 | 677 | break; |
| 678 | 678 | } |
| 679 | + packets++; | |
| 679 | 680 | |
| 680 | 681 | /* TODO: BNA_CQ_EF_LOCAL ? */ |
| 681 | 682 | if (unlikely(flags & (BNA_CQ_EF_MAC_ERROR | |
| @@ -692,7 +693,6 @@ bnad_cq_process(struct bnad *bnad, struct bna_ccb *ccb, int budget) · 10 unmodified lines | ||
| 692 | 693 | else |
| 693 | 694 | bnad_cq_setup_skb_frags(rcb, skb, sop_ci, nvecs, len); |
| 694 | 695 | |
| 695 | − packets++; | |
| 696 | 696 | rcb->rxq->rx_packets++; |
| 697 | 697 | rcb->rxq->rx_bytes += totlen; |
| 698 | 698 | ccb->bytes_per_intr += totlen; |
| @@ -104,6 +104,57 @@ static void *macb_rx_buffer(struct macb *bp, unsigned int index) · 103 unmodified lines | ||
| 104 | 104 | return bp->rx_buffers + bp->rx_buffer_size * macb_rx_ring_wrap(index); |
| 105 | 105 | } |
| 106 | 106 | |
| 107 | +/* I/O accessors */ | |
| 108 | +static u32 hw_readl_native(struct macb *bp, int offset) | |
| 109 | +{ | |
| 110 | + return __raw_readl(bp->regs + offset); | |
| 111 | +} | |
| 112 | + | |
| 113 | +static void hw_writel_native(struct macb *bp, int offset, u32 value) | |
| 114 | +{ | |
| 115 | + __raw_writel(value, bp->regs + offset); | |
| 116 | +} | |
| 117 | + | |
| 118 | +static u32 hw_readl(struct macb *bp, int offset) | |
| 119 | +{ | |
| 120 | + return readl_relaxed(bp->regs + offset); | |
| 121 | +} | |
| 122 | + | |
| 123 | +static void hw_writel(struct macb *bp, int offset, u32 value) | |
| 124 | +{ | |
| 125 | + writel_relaxed(value, bp->regs + offset); | |
| 126 | +} | |
| 127 | + | |
| 128 | +/* | |
| 129 | + * Find the CPU endianness by using the loopback bit of NCR register. When the | |
| 130 | + * CPU is in big endian we need to program swaped mode for management | |
| 131 | + * descriptor access. | |
| 132 | + */ | |
| 133 | +static bool hw_is_native_io(void __iomem *addr) | |
| 134 | +{ | |
| 135 | + u32 value = MACB_BIT(LLB); | |
| 136 | + | |
| 137 | + __raw_writel(value, addr + MACB_NCR); | |
| 138 | + value = __raw_readl(addr + MACB_NCR); | |
| 139 | + | |
| 140 | + /* Write 0 back to disable everything */ | |
| 141 | + __raw_writel(0, addr + MACB_NCR); | |
| 142 | + | |
| 143 | + return value == MACB_BIT(LLB); | |
| 144 | +} | |
| 145 | + | |
| 146 | +static bool hw_is_gem(void __iomem *addr, bool native_io) | |
| 147 | +{ | |
| 148 | + u32 id; | |
| 149 | + | |
| 150 | + if (native_io) | |
| 151 | + id = __raw_readl(addr + MACB_MID); | |
| 152 | + else | |
| 153 | + id = readl_relaxed(addr + MACB_MID); | |
| 154 | + | |
| 155 | + return MACB_BFEXT(IDNUM, id) >= 0x2; | |
| 156 | +} | |
| 157 | + | |
| 107 | 158 | static void macb_set_hwaddr(struct macb *bp) |
| 108 | 159 | { |
| 109 | 160 | u32 bottom; |
| @@ -160,7 +211,7 @@ static void macb_get_hwaddr(struct macb *bp) · 50 unmodified lines | ||
| 160 | 211 | } |
| 161 | 212 | } |
| 162 | 213 | |
| 163 | − netdev_info(bp->dev, "invalid hw address, using random\n"); | |
| 214 | + dev_info(&bp->pdev->dev, "invalid hw address, using random\n"); | |
| 164 | 215 | eth_hw_addr_random(bp->dev); |
| 165 | 216 | } |
| 166 | 217 | |
| @@ -252,7 +303,6 @@ static void macb_handle_link_change(struct net_device *dev) · 85 unmodified lines | ||
| 252 | 303 | struct macb *bp = netdev_priv(dev); |
| 253 | 304 | struct phy_device *phydev = bp->phy_dev; |
| 254 | 305 | unsigned long flags; |
| 255 | − | |
| 256 | 306 | int status_change = 0; |
| 257 | 307 | |
| 258 | 308 | spin_lock_irqsave(&bp->lock, flags); |
| @@ -449,14 +499,14 @@ err_out: · 190 unmodified lines | ||
| 449 | 499 | |
| 450 | 500 | static void macb_update_stats(struct macb *bp) |
| 451 | 501 | { |
| 452 | − u32 __iomem *reg = bp->regs + MACB_PFR; | |
| 453 | 502 | u32 *p = &bp->hw_stats.macb.rx_pause_frames; |
| 454 | 503 | u32 *end = &bp->hw_stats.macb.tx_pause_frames + 1; |
| 504 | + int offset = MACB_PFR; | |
| 455 | 505 | |
| 456 | 506 | WARN_ON((unsigned long)(end - p - 1) != (MACB_TPF - MACB_PFR) / 4); |
| 457 | 507 | |
| 458 | − for(; p < end; p++, reg++) | |
| 459 | − *p += readl_relaxed(reg); | |
| 508 | + for(; p < end; p++, offset += 4) | |
| 509 | + *p += bp->macb_reg_readl(bp, offset); | |
| 460 | 510 | } |
| 461 | 511 | |
| 462 | 512 | static int macb_halt_tx(struct macb *bp) |
| @@ -1107,12 +1157,6 @@ static void macb_poll_controller(struct net_device *dev) · 644 unmodified lines | ||
| 1107 | 1157 | } |
| 1108 | 1158 | #endif |
| 1109 | 1159 | |
| 1110 | −static inline unsigned int macb_count_tx_descriptors(struct macb *bp, | |
| 1111 | − unsigned int len) | |
| 1112 | −{ | |
| 1113 | − return (len + bp->max_tx_length - 1) / bp->max_tx_length; | |
| 1114 | −} | |
| 1115 | − | |
| 1116 | 1160 | static unsigned int macb_tx_map(struct macb *bp, |
| 1117 | 1161 | struct macb_queue *queue, |
| 1118 | 1162 | struct sk_buff *skb) |
| @@ -1263,11 +1307,11 @@ static int macb_start_xmit(struct sk_buff *skb, struct net_device *dev) · 144 unmodified lines | ||
| 1263 | 1307 | * socket buffer: skb fragments of jumbo frames may need to be |
| 1264 | 1308 | * splitted into many buffer descriptors. |
| 1265 | 1309 | */ |
| 1266 | − count = macb_count_tx_descriptors(bp, skb_headlen(skb)); | |
| 1310 | + count = DIV_ROUND_UP(skb_headlen(skb), bp->max_tx_length); | |
| 1267 | 1311 | nr_frags = skb_shinfo(skb)->nr_frags; |
| 1268 | 1312 | for (f = 0; f < nr_frags; f++) { |
| 1269 | 1313 | frag_size = skb_frag_size(&skb_shinfo(skb)->frags[f]); |
| 1270 | − count += macb_count_tx_descriptors(bp, frag_size); | |
| 1314 | + count += DIV_ROUND_UP(frag_size, bp->max_tx_length); | |
| 1271 | 1315 | } |
| 1272 | 1316 | |
| 1273 | 1317 | spin_lock_irqsave(&bp->lock, flags); |
| @@ -1603,7 +1647,6 @@ static u32 macb_dbw(struct macb *bp) · 329 unmodified lines | ||
| 1603 | 1647 | static void macb_configure_dma(struct macb *bp) |
| 1604 | 1648 | { |
| 1605 | 1649 | u32 dmacfg; |
| 1606 | − u32 tmp, ncr; | |
| 1607 | 1650 | |
| 1608 | 1651 | if (macb_is_gem(bp)) { |
| 1609 | 1652 | dmacfg = gem_readl(bp, DMACFG) & ~GEM_BF(RXBS, -1L); |
| @@ -1613,22 +1656,11 @@ static void macb_configure_dma(struct macb *bp) · 3 unmodified lines | ||
| 1613 | 1656 | dmacfg |= GEM_BIT(TXPBMS) | GEM_BF(RXBMS, -1L); |
| 1614 | 1657 | dmacfg &= ~GEM_BIT(ENDIA_PKT); |
| 1615 | 1658 | |
| 1616 | − /* Find the CPU endianness by using the loopback bit of net_ctrl | |
| 1617 | − * register. save it first. When the CPU is in big endian we | |
| 1618 | − * need to program swaped mode for management descriptor access. | |
| 1619 | − */ | |
| 1620 | − ncr = macb_readl(bp, NCR); | |
| 1621 | − __raw_writel(MACB_BIT(LLB), bp->regs + MACB_NCR); | |
| 1622 | − tmp = __raw_readl(bp->regs + MACB_NCR); | |
| 1623 | − | |
| 1624 | − if (tmp == MACB_BIT(LLB)) | |
| 1659 | + if (bp->native_io) | |
| 1625 | 1660 | dmacfg &= ~GEM_BIT(ENDIA_DESC); |
| 1626 | 1661 | else |
| 1627 | 1662 | dmacfg |= GEM_BIT(ENDIA_DESC); /* CPU in big endian */ |
| 1628 | 1663 | |
| 1629 | − /* Restore net_ctrl */ | |
| 1630 | − macb_writel(bp, NCR, ncr); | |
| 1631 | − | |
| 1632 | 1664 | if (bp->dev->features & NETIF_F_HW_CSUM) |
| 1633 | 1665 | dmacfg |= GEM_BIT(TXCOEN); |
| 1634 | 1666 | else |
| @@ -1897,19 +1929,19 @@ static int macb_change_mtu(struct net_device *dev, int new_mtu) · 262 unmodified lines | ||
| 1897 | 1929 | |
| 1898 | 1930 | static void gem_update_stats(struct macb *bp) |
| 1899 | 1931 | { |
| 1900 | − int i; | |
| 1932 | + unsigned int i; | |
| 1901 | 1933 | u32 *p = &bp->hw_stats.gem.tx_octets_31_0; |
| 1902 | 1934 | |
| 1903 | 1935 | for (i = 0; i < GEM_STATS_LEN; ++i, ++p) { |
| 1904 | 1936 | u32 offset = gem_statistics[i].offset; |
| 1905 | − u64 val = readl_relaxed(bp->regs + offset); | |
| 1937 | + u64 val = bp->macb_reg_readl(bp, offset); | |
| 1906 | 1938 | |
| 1907 | 1939 | bp->ethtool_stats[i] += val; |
| 1908 | 1940 | *p += val; |
| 1909 | 1941 | |
| 1910 | 1942 | if (offset == GEM_OCTTXL || offset == GEM_OCTRXL) { |
| 1911 | 1943 | /* Add GEM_OCTTXH, GEM_OCTRXH */ |
| 1912 | − val = readl_relaxed(bp->regs + offset + 4); | |
| 1944 | + val = bp->macb_reg_readl(bp, offset + 4); | |
| 1913 | 1945 | bp->ethtool_stats[i] += ((u64)val) << 32; |
| 1914 | 1946 | *(++p) += val; |
| 1915 | 1947 | } |
| @@ -1976,7 +2008,7 @@ static int gem_get_sset_count(struct net_device *dev, int sset) · 60 unmodified lines | ||
| 1976 | 2008 | |
| 1977 | 2009 | static void gem_get_ethtool_strings(struct net_device *dev, u32 sset, u8 *p) |
| 1978 | 2010 | { |
| 1979 | − int i; | |
| 2011 | + unsigned int i; | |
| 1980 | 2012 | |
| 1981 | 2013 | switch (sset) { |
| 1982 | 2014 | case ETH_SS_STATS: |
| @@ -2190,7 +2222,7 @@ static void macb_configure_caps(struct macb *bp, const struct macb_config *dt_co · 207 unmodified lines | ||
| 2190 | 2222 | if (dt_conf) |
| 2191 | 2223 | bp->caps = dt_conf->caps; |
| 2192 | 2224 | |
| 2193 | − if (macb_is_gem_hw(bp->regs)) { | |
| 2225 | + if (hw_is_gem(bp->regs, bp->native_io)) { | |
| 2194 | 2226 | bp->caps |= MACB_CAPS_MACB_IS_GEM; |
| 2195 | 2227 | |
| 2196 | 2228 | dcfg = gem_readl(bp, DCFG1); |
| @@ -2201,10 +2233,11 @@ static void macb_configure_caps(struct macb *bp, const struct macb_config *dt_co · 4 unmodified lines | ||
| 2201 | 2233 | bp->caps |= MACB_CAPS_FIFO_MODE; |
| 2202 | 2234 | } |
| 2203 | 2235 | |
| 2204 | − netdev_dbg(bp->dev, "Cadence caps 0x%08x\n", bp->caps); | |
| 2236 | + dev_dbg(&bp->pdev->dev, "Cadence caps 0x%08x\n", bp->caps); | |
| 2205 | 2237 | } |
| 2206 | 2238 | |
| 2207 | 2239 | static void macb_probe_queues(void __iomem *mem, |
| 2240 | + bool native_io, | |
| 2208 | 2241 | unsigned int *queue_mask, |
| 2209 | 2242 | unsigned int *num_queues) |
| 2210 | 2243 | { |
| @@ -2219,7 +2252,7 @@ static void macb_probe_queues(void __iomem *mem, · 8 unmodified lines | ||
| 2219 | 2252 | * we are early in the probe process and don't have the |
| 2220 | 2253 | * MACB_CAPS_MACB_IS_GEM flag positioned |
| 2221 | 2254 | */ |
| 2222 | − if (!macb_is_gem_hw(mem)) | |
| 2255 | + if (!hw_is_gem(mem, native_io)) | |
| 2223 | 2256 | return; |
| 2224 | 2257 | |
| 2225 | 2258 | /* bit 0 is never set but queue 0 always exists */ |
| @@ -2786,6 +2819,7 @@ static int macb_probe(struct platform_device *pdev) · 560 unmodified lines | ||
| 2786 | 2819 | struct clk *pclk, *hclk, *tx_clk; |
| 2787 | 2820 | unsigned int queue_mask, num_queues; |
| 2788 | 2821 | struct macb_platform_data *pdata; |
| 2822 | + bool native_io; | |
| 2789 | 2823 | struct phy_device *phydev; |
| 2790 | 2824 | struct net_device *dev; |
| 2791 | 2825 | struct resource *regs; |
| @@ -2794,6 +2828,11 @@ static int macb_probe(struct platform_device *pdev) · 2 unmodified lines | ||
| 2794 | 2828 | struct macb *bp; |
| 2795 | 2829 | int err; |
| 2796 | 2830 | |
| 2831 | + regs = platform_get_resource(pdev, IORESOURCE_MEM, 0); | |
| 2832 | + mem = devm_ioremap_resource(&pdev->dev, regs); | |
| 2833 | + if (IS_ERR(mem)) | |
| 2834 | + return PTR_ERR(mem); | |
| 2835 | + | |
| 2797 | 2836 | if (np) { |
| 2798 | 2837 | const struct of_device_id *match; |
| 2799 | 2838 | |
| @@ -2809,14 +2848,9 @@ static int macb_probe(struct platform_device *pdev) · 9 unmodified lines | ||
| 2809 | 2848 | if (err) |
| 2810 | 2849 | return err; |
| 2811 | 2850 | |
| 2812 | − regs = platform_get_resource(pdev, IORESOURCE_MEM, 0); | |
| 2813 | − mem = devm_ioremap_resource(&pdev->dev, regs); | |
| 2814 | − if (IS_ERR(mem)) { | |
| 2815 | − err = PTR_ERR(mem); | |
| 2816 | − goto err_disable_clocks; | |
| 2817 | − } | |
| 2851 | + native_io = hw_is_native_io(mem); | |
| 2818 | 2852 | |
| 2819 | − macb_probe_queues(mem, &queue_mask, &num_queues); | |
| 2853 | + macb_probe_queues(mem, native_io, &queue_mask, &num_queues); | |
| 2820 | 2854 | dev = alloc_etherdev_mq(sizeof(*bp), num_queues); |
| 2821 | 2855 | if (!dev) { |
| 2822 | 2856 | err = -ENOMEM; |
| @@ -2831,6 +2865,14 @@ static int macb_probe(struct platform_device *pdev) · 8 unmodified lines | ||
| 2831 | 2865 | bp->pdev = pdev; |
| 2832 | 2866 | bp->dev = dev; |
| 2833 | 2867 | bp->regs = mem; |
| 2868 | + bp->native_io = native_io; | |
| 2869 | + if (native_io) { | |
| 2870 | + bp->macb_reg_readl = hw_readl_native; | |
| 2871 | + bp->macb_reg_writel = hw_writel_native; | |
| 2872 | + } else { | |
| 2873 | + bp->macb_reg_readl = hw_readl; | |
| 2874 | + bp->macb_reg_writel = hw_writel; | |
| 2875 | + } | |
| 2834 | 2876 | bp->num_queues = num_queues; |
| 2835 | 2877 | bp->queue_mask = queue_mask; |
| 2836 | 2878 | if (macb_config) |
| @@ -2838,9 +2880,8 @@ static int macb_probe(struct platform_device *pdev) · 1 unmodified line | ||
| 2838 | 2880 | bp->pclk = pclk; |
| 2839 | 2881 | bp->hclk = hclk; |
| 2840 | 2882 | bp->tx_clk = tx_clk; |
| 2841 | − if (macb_config->jumbo_max_len) { | |
| 2883 | + if (macb_config) | |
| 2842 | 2884 | bp->jumbo_max_len = macb_config->jumbo_max_len; |
| 2843 | − } | |
| 2844 | 2885 | |
| 2845 | 2886 | spin_lock_init(&bp->lock); |
| 2846 | 2887 | |
| @@ -429,18 +429,12 @@ · 428 unmodified lines | ||
| 429 | 429 | | GEM_BF(name, value)) |
| 430 | 430 | |
| 431 | 431 | /* Register access macros */ |
| 432 | −#define macb_readl(port,reg) \ | |
| 433 | − readl_relaxed((port)->regs + MACB_##reg) | |
| 434 | −#define macb_writel(port,reg,value) \ | |
| 435 | − writel_relaxed((value), (port)->regs + MACB_##reg) | |
| 436 | −#define gem_readl(port, reg) \ | |
| 437 | − readl_relaxed((port)->regs + GEM_##reg) | |
| 438 | −#define gem_writel(port, reg, value) \ | |
| 439 | − writel_relaxed((value), (port)->regs + GEM_##reg) | |
| 440 | −#define queue_readl(queue, reg) \ | |
| 441 | − readl_relaxed((queue)->bp->regs + (queue)->reg) | |
| 442 | −#define queue_writel(queue, reg, value) \ | |
| 443 | − writel_relaxed((value), (queue)->bp->regs + (queue)->reg) | |
| 432 | +#define macb_readl(port, reg) (port)->macb_reg_readl((port), MACB_##reg) | |
| 433 | +#define macb_writel(port, reg, value) (port)->macb_reg_writel((port), MACB_##reg, (value)) | |
| 434 | +#define gem_readl(port, reg) (port)->macb_reg_readl((port), GEM_##reg) | |
| 435 | +#define gem_writel(port, reg, value) (port)->macb_reg_writel((port), GEM_##reg, (value)) | |
| 436 | +#define queue_readl(queue, reg) (queue)->bp->macb_reg_readl((queue)->bp, (queue)->reg) | |
| 437 | +#define queue_writel(queue, reg, value) (queue)->bp->macb_reg_writel((queue)->bp, (queue)->reg, (value)) | |
| 444 | 438 | |
| 445 | 439 | /* Conditional GEM/MACB macros. These perform the operation to the correct |
| 446 | 440 | * register dependent on whether the device is a GEM or a MACB. For registers |
| @@ -785,6 +779,11 @@ struct macb_queue { · 338 unmodified lines | ||
| 785 | 779 | |
| 786 | 780 | struct macb { |
| 787 | 781 | void __iomem *regs; |
| 782 | + bool native_io; | |
| 783 | + | |
| 784 | + /* hardware IO accessors */ | |
| 785 | + u32 (*macb_reg_readl)(struct macb *bp, int offset); | |
| 786 | + void (*macb_reg_writel)(struct macb *bp, int offset, u32 value); | |
| 788 | 787 | |
| 789 | 788 | unsigned int rx_tail; |
| 790 | 789 | unsigned int rx_prepared_head; |
| @@ -817,9 +816,9 @@ struct macb { · 26 unmodified lines | ||
| 817 | 816 | |
| 818 | 817 | struct mii_bus *mii_bus; |
| 819 | 818 | struct phy_device *phy_dev; |
| 820 | − unsigned int link; | |
| 821 | − unsigned int speed; | |
| 822 | − unsigned int duplex; | |
| 819 | + int link; | |
| 820 | + int speed; | |
| 821 | + int duplex; | |
| 823 | 822 | |
| 824 | 823 | u32 caps; |
| 825 | 824 | unsigned int dma_burst_length; |
| @@ -843,9 +842,4 @@ static inline bool macb_is_gem(struct macb *bp) · 17 unmodified lines | ||
| 843 | 842 | return !!(bp->caps & MACB_CAPS_MACB_IS_GEM); |
| 844 | 843 | } |
| 845 | 844 | |
| 846 | −static inline bool macb_is_gem_hw(void __iomem *addr) | |
| 847 | −{ | |
| 848 | − return !!(MACB_BFEXT(IDNUM, readl_relaxed(addr + MACB_MID)) >= 0x2); | |
| 849 | −} | |
| 850 | − | |
| 851 | 845 | #endif /* _MACB_H */ |
| @@ -16,7 +16,6 @@ if NET_VENDOR_CAVIUM · 15 unmodified lines | ||
| 16 | 16 | config THUNDER_NIC_PF |
| 17 | 17 | tristate "Thunder Physical function driver" |
| 18 | 18 | depends on 64BIT |
| 19 | − default ARCH_THUNDER | |
| 20 | 19 | select THUNDER_NIC_BGX |
| 21 | 20 | ---help--- |
| 22 | 21 | This driver supports Thunder's NIC physical function. |
| @@ -29,14 +28,12 @@ config THUNDER_NIC_PF · 6 unmodified lines | ||
| 29 | 28 | config THUNDER_NIC_VF |
| 30 | 29 | tristate "Thunder Virtual function driver" |
| 31 | 30 | depends on 64BIT |
| 32 | − default ARCH_THUNDER | |
| 33 | 31 | ---help--- |
| 34 | 32 | This driver supports Thunder's NIC virtual function |
| 35 | 33 | |
| 36 | 34 | config THUNDER_NIC_BGX |
| 37 | 35 | tristate "Thunder MAC interface driver (BGX)" |
| 38 | 36 | depends on 64BIT |
| 39 | − default ARCH_THUNDER | |
| 40 | 37 | ---help--- |
| 41 | 38 | This driver supports programming and controlling of MAC |
| 42 | 39 | interface from NIC physical function driver. |
| @@ -125,6 +125,15 @@ · 124 unmodified lines | ||
| 125 | 125 | */ |
| 126 | 126 | #define NICPF_CLK_PER_INT_TICK 2 |
| 127 | 127 | |
| 128 | +/* Time to wait before we decide that a SQ is stuck. | |
| 129 | + * | |
| 130 | + * Since both pkt rx and tx notifications are done with same CQ, | |
| 131 | + * when packets are being received at very high rate (eg: L2 forwarding) | |
| 132 | + * then freeing transmitted skbs will be delayed and watchdog | |
| 133 | + * will kick in, resetting interface. Hence keeping this value high. | |
| 134 | + */ | |
| 135 | +#define NICVF_TX_TIMEOUT (50 * HZ) | |
| 136 | + | |
| 128 | 137 | struct nicvf_cq_poll { |
| 129 | 138 | u8 cq_idx; /* Completion queue index */ |
| 130 | 139 | struct napi_struct napi; |
| @@ -216,8 +225,9 @@ struct nicvf_drv_stats { · 85 unmodified lines | ||
| 216 | 225 | /* Tx */ |
| 217 | 226 | u64 tx_frames_ok; |
| 218 | 227 | u64 tx_drops; |
| 219 | − u64 tx_busy; | |
| 220 | 228 | u64 tx_tso; |
| 229 | + u64 txq_stop; | |
| 230 | + u64 txq_wake; | |
| 221 | 231 | }; |
| 222 | 232 | |
| 223 | 233 | struct nicvf { |
| @@ -66,9 +66,10 @@ static const struct nicvf_stat nicvf_drv_stats[] = { · 65 unmodified lines | ||
| 66 | 66 | NICVF_DRV_STAT(rx_frames_jumbo), |
| 67 | 67 | NICVF_DRV_STAT(rx_drops), |
| 68 | 68 | NICVF_DRV_STAT(tx_frames_ok), |
| 69 | − NICVF_DRV_STAT(tx_busy), | |
| 70 | 69 | NICVF_DRV_STAT(tx_tso), |
| 71 | 70 | NICVF_DRV_STAT(tx_drops), |
| 71 | + NICVF_DRV_STAT(txq_stop), | |
| 72 | + NICVF_DRV_STAT(txq_wake), | |
| 72 | 73 | }; |
| 73 | 74 | |
| 74 | 75 | static const struct nicvf_stat nicvf_queue_stats[] = { |
| @@ -126,6 +127,7 @@ static void nicvf_set_msglevel(struct net_device *netdev, u32 lvl) · 51 unmodified lines | ||
| 126 | 127 | |
| 127 | 128 | static void nicvf_get_strings(struct net_device *netdev, u32 sset, u8 *data) |
| 128 | 129 | { |
| 130 | + struct nicvf *nic = netdev_priv(netdev); | |
| 129 | 131 | int stats, qidx; |
| 130 | 132 | |
| 131 | 133 | if (sset != ETH_SS_STATS) |
| @@ -141,7 +143,7 @@ static void nicvf_get_strings(struct net_device *netdev, u32 sset, u8 *data) · 9 unmodified lines | ||
| 141 | 143 | data += ETH_GSTRING_LEN; |
| 142 | 144 | } |
| 143 | 145 | |
| 144 | − for (qidx = 0; qidx < MAX_RCV_QUEUES_PER_QS; qidx++) { | |
| 146 | + for (qidx = 0; qidx < nic->qs->rq_cnt; qidx++) { | |
| 145 | 147 | for (stats = 0; stats < nicvf_n_queue_stats; stats++) { |
| 146 | 148 | sprintf(data, "rxq%d: %s", qidx, |
| 147 | 149 | nicvf_queue_stats[stats].name); |
| @@ -149,7 +151,7 @@ static void nicvf_get_strings(struct net_device *netdev, u32 sset, u8 *data) · 1 unmodified line | ||
| 149 | 151 | } |
| 150 | 152 | } |
| 151 | 153 | |
| 152 | − for (qidx = 0; qidx < MAX_SND_QUEUES_PER_QS; qidx++) { | |
| 154 | + for (qidx = 0; qidx < nic->qs->sq_cnt; qidx++) { | |
| 153 | 155 | for (stats = 0; stats < nicvf_n_queue_stats; stats++) { |
| 154 | 156 | sprintf(data, "txq%d: %s", qidx, |
| 155 | 157 | nicvf_queue_stats[stats].name); |
| @@ -170,12 +172,14 @@ static void nicvf_get_strings(struct net_device *netdev, u32 sset, u8 *data) · 14 unmodified lines | ||
| 170 | 172 | |
| 171 | 173 | static int nicvf_get_sset_count(struct net_device *netdev, int sset) |
| 172 | 174 | { |
| 175 | + struct nicvf *nic = netdev_priv(netdev); | |
| 176 | + | |
| 173 | 177 | if (sset != ETH_SS_STATS) |
| 174 | 178 | return -EINVAL; |
| 175 | 179 | |
| 176 | 180 | return nicvf_n_hw_stats + nicvf_n_drv_stats + |
| 177 | 181 | (nicvf_n_queue_stats * |
| 178 | − (MAX_RCV_QUEUES_PER_QS + MAX_SND_QUEUES_PER_QS)) + | |
| 182 | + (nic->qs->rq_cnt + nic->qs->sq_cnt)) + | |
| 179 | 183 | BGX_RX_STATS_COUNT + BGX_TX_STATS_COUNT; |
| 180 | 184 | } |
| 181 | 185 | |
| @@ -197,13 +201,13 @@ static void nicvf_get_ethtool_stats(struct net_device *netdev, · 15 unmodified lines | ||
| 197 | 201 | *(data++) = ((u64 *)&nic->drv_stats) |
| 198 | 202 | [nicvf_drv_stats[stat].index]; |
| 199 | 203 | |
| 200 | − for (qidx = 0; qidx < MAX_RCV_QUEUES_PER_QS; qidx++) { | |
| 204 | + for (qidx = 0; qidx < nic->qs->rq_cnt; qidx++) { | |
| 201 | 205 | for (stat = 0; stat < nicvf_n_queue_stats; stat++) |
| 202 | 206 | *(data++) = ((u64 *)&nic->qs->rq[qidx].stats) |
| 203 | 207 | [nicvf_queue_stats[stat].index]; |
| 204 | 208 | } |
| 205 | 209 | |
| 206 | − for (qidx = 0; qidx < MAX_SND_QUEUES_PER_QS; qidx++) { | |
| 210 | + for (qidx = 0; qidx < nic->qs->sq_cnt; qidx++) { | |
| 207 | 211 | for (stat = 0; stat < nicvf_n_queue_stats; stat++) |
| 208 | 212 | *(data++) = ((u64 *)&nic->qs->sq[qidx].stats) |
| 209 | 213 | [nicvf_queue_stats[stat].index]; |
| @@ -543,6 +547,7 @@ static int nicvf_set_channels(struct net_device *dev, · 333 unmodified lines | ||
| 543 | 547 | { |
| 544 | 548 | struct nicvf *nic = netdev_priv(dev); |
| 545 | 549 | int err = 0; |
| 550 | + bool if_up = netif_running(dev); | |
| 546 | 551 | |
| 547 | 552 | if (!channel->rx_count || !channel->tx_count) |
| 548 | 553 | return -EINVAL; |
| @@ -551,6 +556,9 @@ static int nicvf_set_channels(struct net_device *dev, · 2 unmodified lines | ||
| 551 | 556 | if (channel->tx_count > MAX_SND_QUEUES_PER_QS) |
| 552 | 557 | return -EINVAL; |
| 553 | 558 | |
| 559 | + if (if_up) | |
| 560 | + nicvf_stop(dev); | |
| 561 | + | |
| 554 | 562 | nic->qs->rq_cnt = channel->rx_count; |
| 555 | 563 | nic->qs->sq_cnt = channel->tx_count; |
| 556 | 564 | nic->qs->cq_cnt = max(nic->qs->rq_cnt, nic->qs->sq_cnt); |
| @@ -559,11 +567,9 @@ static int nicvf_set_channels(struct net_device *dev, · 2 unmodified lines | ||
| 559 | 567 | if (err) |
| 560 | 568 | return err; |
| 561 | 569 | |
| 562 | − if (!netif_running(dev)) | |
| 563 | − return err; | |
| 570 | + if (if_up) | |
| 571 | + nicvf_open(dev); | |
| 564 | 572 | |
| 565 | − nicvf_stop(dev); | |
| 566 | − nicvf_open(dev); | |
| 567 | 573 | netdev_info(dev, "Setting num Tx rings to %d, Rx rings to %d success\n", |
| 568 | 574 | nic->qs->sq_cnt, nic->qs->rq_cnt); |
| 569 | 575 | |
| @@ -234,7 +234,7 @@ static void nicvf_handle_mbx_intr(struct nicvf *nic) · 233 unmodified lines | ||
| 234 | 234 | nic->duplex == DUPLEX_FULL ? |
| 235 | 235 | "Full duplex" : "Half duplex"); |
| 236 | 236 | netif_carrier_on(nic->netdev); |
| 237 | − netif_tx_wake_all_queues(nic->netdev); | |
| 237 | + netif_tx_start_all_queues(nic->netdev); | |
| 238 | 238 | } else { |
| 239 | 239 | netdev_info(nic->netdev, "%s: Link is Down\n", |
| 240 | 240 | nic->netdev->name); |
| @@ -425,6 +425,7 @@ static void nicvf_snd_pkt_handler(struct net_device *netdev, · 184 unmodified lines | ||
| 425 | 425 | if (skb) { |
| 426 | 426 | prefetch(skb); |
| 427 | 427 | dev_consume_skb_any(skb); |
| 428 | + sq->skbuff[cqe_tx->sqe_ptr] = (u64)NULL; | |
| 428 | 429 | } |
| 429 | 430 | } |
| 430 | 431 | |
| @@ -476,12 +477,13 @@ static void nicvf_rcv_pkt_handler(struct net_device *netdev, · 45 unmodified lines | ||
| 476 | 477 | static int nicvf_cq_intr_handler(struct net_device *netdev, u8 cq_idx, |
| 477 | 478 | struct napi_struct *napi, int budget) |
| 478 | 479 | { |
| 479 | − int processed_cqe, work_done = 0; | |
| 480 | + int processed_cqe, work_done = 0, tx_done = 0; | |
| 480 | 481 | int cqe_count, cqe_head; |
| 481 | 482 | struct nicvf *nic = netdev_priv(netdev); |
| 482 | 483 | struct queue_set *qs = nic->qs; |
| 483 | 484 | struct cmp_queue *cq = &qs->cq[cq_idx]; |
| 484 | 485 | struct cqe_rx_t *cq_desc; |
| 486 | + struct netdev_queue *txq; | |
| 485 | 487 | |
| 486 | 488 | spin_lock_bh(&cq->lock); |
| 487 | 489 | loop: |
| @@ -496,8 +498,8 @@ loop: · 8 unmodified lines | ||
| 496 | 498 | cqe_head = nicvf_queue_reg_read(nic, NIC_QSET_CQ_0_7_HEAD, cq_idx) >> 9; |
| 497 | 499 | cqe_head &= 0xFFFF; |
| 498 | 500 | |
| 499 | − netdev_dbg(nic->netdev, "%s cqe_count %d cqe_head %d\n", | |
| 500 | − __func__, cqe_count, cqe_head); | |
| 501 | + netdev_dbg(nic->netdev, "%s CQ%d cqe_count %d cqe_head %d\n", | |
| 502 | + __func__, cq_idx, cqe_count, cqe_head); | |
| 501 | 503 | while (processed_cqe < cqe_count) { |
| 502 | 504 | /* Get the CQ descriptor */ |
| 503 | 505 | cq_desc = (struct cqe_rx_t *)GET_CQ_DESC(cq, cqe_head); |
| @@ -511,8 +513,8 @@ loop: · 7 unmodified lines | ||
| 511 | 513 | break; |
| 512 | 514 | } |
| 513 | 515 | |
| 514 | − netdev_dbg(nic->netdev, "cq_desc->cqe_type %d\n", | |
| 515 | − cq_desc->cqe_type); | |
| 516 | + netdev_dbg(nic->netdev, "CQ%d cq_desc->cqe_type %d\n", | |
| 517 | + cq_idx, cq_desc->cqe_type); | |
| 516 | 518 | switch (cq_desc->cqe_type) { |
| 517 | 519 | case CQE_TYPE_RX: |
| 518 | 520 | nicvf_rcv_pkt_handler(netdev, napi, cq, |
| @@ -522,6 +524,7 @@ loop: · 3 unmodified lines | ||
| 522 | 524 | case CQE_TYPE_SEND: |
| 523 | 525 | nicvf_snd_pkt_handler(netdev, cq, |
| 524 | 526 | (void *)cq_desc, CQE_TYPE_SEND); |
| 527 | + tx_done++; | |
| 525 | 528 | break; |
| 526 | 529 | case CQE_TYPE_INVALID: |
| 527 | 530 | case CQE_TYPE_RX_SPLIT: |
| @@ -532,8 +535,9 @@ loop: · 4 unmodified lines | ||
| 532 | 535 | } |
| 533 | 536 | processed_cqe++; |
| 534 | 537 | } |
| 535 | − netdev_dbg(nic->netdev, "%s processed_cqe %d work_done %d budget %d\n", | |
| 536 | − __func__, processed_cqe, work_done, budget); | |
| 538 | + netdev_dbg(nic->netdev, | |
| 539 | + "%s CQ%d processed_cqe %d work_done %d budget %d\n", | |
| 540 | + __func__, cq_idx, processed_cqe, work_done, budget); | |
| 537 | 541 | |
| 538 | 542 | /* Ring doorbell to inform H/W to reuse processed CQEs */ |
| 539 | 543 | nicvf_queue_reg_write(nic, NIC_QSET_CQ_0_7_DOOR, |
| @@ -543,6 +547,19 @@ loop: · 3 unmodified lines | ||
| 543 | 547 | goto loop; |
| 544 | 548 | |
| 545 | 549 | done: |
| 550 | + /* Wakeup TXQ if its stopped earlier due to SQ full */ | |
| 551 | + if (tx_done) { | |
| 552 | + txq = netdev_get_tx_queue(netdev, cq_idx); | |
| 553 | + if (netif_tx_queue_stopped(txq)) { | |
| 554 | + netif_tx_start_queue(txq); | |
| 555 | + nic->drv_stats.txq_wake++; | |
| 556 | + if (netif_msg_tx_err(nic)) | |
| 557 | + netdev_warn(netdev, | |
| 558 | + "%s: Transmit queue wakeup SQ%d\n", | |
| 559 | + netdev->name, cq_idx); | |
| 560 | + } | |
| 561 | + } | |
| 562 | + | |
| 546 | 563 | spin_unlock_bh(&cq->lock); |
| 547 | 564 | return work_done; |
| 548 | 565 | } |
| @@ -554,15 +571,10 @@ static int nicvf_poll(struct napi_struct *napi, int budget) · 5 unmodified lines | ||
| 554 | 571 | struct net_device *netdev = napi->dev; |
| 555 | 572 | struct nicvf *nic = netdev_priv(netdev); |
| 556 | 573 | struct nicvf_cq_poll *cq; |
| 557 | − struct netdev_queue *txq; | |
| 558 | 574 | |
| 559 | 575 | cq = container_of(napi, struct nicvf_cq_poll, napi); |
| 560 | 576 | work_done = nicvf_cq_intr_handler(netdev, cq->cq_idx, napi, budget); |
| 561 | 577 | |
| 562 | − txq = netdev_get_tx_queue(netdev, cq->cq_idx); | |
| 563 | − if (netif_tx_queue_stopped(txq)) | |
| 564 | − netif_tx_wake_queue(txq); | |
| 565 | − | |
| 566 | 578 | if (work_done < budget) { |
| 567 | 579 | /* Slow packet rate, exit polling */ |
| 568 | 580 | napi_complete(napi); |
| @@ -833,9 +845,9 @@ static netdev_tx_t nicvf_xmit(struct sk_buff *skb, struct net_device *netdev) · 264 unmodified lines | ||
| 833 | 845 | return NETDEV_TX_OK; |
| 834 | 846 | } |
| 835 | 847 | |
| 836 | − if (!nicvf_sq_append_skb(nic, skb) && !netif_tx_queue_stopped(txq)) { | |
| 848 | + if (!netif_tx_queue_stopped(txq) && !nicvf_sq_append_skb(nic, skb)) { | |
| 837 | 849 | netif_tx_stop_queue(txq); |
| 838 | − nic->drv_stats.tx_busy++; | |
| 850 | + nic->drv_stats.txq_stop++; | |
| 839 | 851 | if (netif_msg_tx_err(nic)) |
| 840 | 852 | netdev_warn(netdev, |
| 841 | 853 | "%s: Transmit ring full, stopping SQ%d\n", |
| @@ -859,7 +871,6 @@ int nicvf_stop(struct net_device *netdev) · 17 unmodified lines | ||
| 859 | 871 | nicvf_send_msg_to_pf(nic, &mbx); |
| 860 | 872 | |
| 861 | 873 | netif_carrier_off(netdev); |
| 862 | − netif_tx_disable(netdev); | |
| 863 | 874 | |
| 864 | 875 | /* Disable RBDR & QS error interrupts */ |
| 865 | 876 | for (qidx = 0; qidx < qs->rbdr_cnt; qidx++) { |
| @@ -894,6 +905,8 @@ int nicvf_stop(struct net_device *netdev) · 28 unmodified lines | ||
| 894 | 905 | kfree(cq_poll); |
| 895 | 906 | } |
| 896 | 907 | |
| 908 | + netif_tx_disable(netdev); | |
| 909 | + | |
| 897 | 910 | /* Free resources */ |
| 898 | 911 | nicvf_config_data_transfer(nic, false); |
| 899 | 912 | |
| @@ -988,6 +1001,9 @@ int nicvf_open(struct net_device *netdev) · 88 unmodified lines | ||
| 988 | 1001 | for (qidx = 0; qidx < qs->rbdr_cnt; qidx++) |
| 989 | 1002 | nicvf_enable_intr(nic, NICVF_INTR_RBDR, qidx); |
| 990 | 1003 | |
| 1004 | + nic->drv_stats.txq_stop = 0; | |
| 1005 | + nic->drv_stats.txq_wake = 0; | |
| 1006 | + | |
| 991 | 1007 | netif_carrier_on(netdev); |
| 992 | 1008 | netif_tx_start_all_queues(netdev); |
| 993 | 1009 | |
| @@ -1278,6 +1294,7 @@ static int nicvf_probe(struct pci_dev *pdev, const struct pci_device_id *ent) · 284 unmodified lines | ||
| 1278 | 1294 | netdev->hw_features = netdev->features; |
| 1279 | 1295 | |
| 1280 | 1296 | netdev->netdev_ops = &nicvf_netdev_ops; |
| 1297 | + netdev->watchdog_timeo = NICVF_TX_TIMEOUT; | |
| 1281 | 1298 | |
| 1282 | 1299 | INIT_WORK(&nic->reset_task, nicvf_reset_task); |
| 1283 | 1300 | |
| @@ -1318,11 +1335,17 @@ static void nicvf_remove(struct pci_dev *pdev) · 34 unmodified lines | ||
| 1318 | 1335 | pci_disable_device(pdev); |
| 1319 | 1336 | } |
| 1320 | 1337 | |
| 1338 | +static void nicvf_shutdown(struct pci_dev *pdev) | |
| 1339 | +{ | |
| 1340 | + nicvf_remove(pdev); | |
| 1341 | +} | |
| 1342 | + | |
| 1321 | 1343 | static struct pci_driver nicvf_driver = { |
| 1322 | 1344 | .name = DRV_NAME, |
| 1323 | 1345 | .id_table = nicvf_id_table, |
| 1324 | 1346 | .probe = nicvf_probe, |
| 1325 | 1347 | .remove = nicvf_remove, |
| 1348 | + .shutdown = nicvf_shutdown, | |
| 1326 | 1349 | }; |
| 1327 | 1350 | |
| 1328 | 1351 | static int __init nicvf_init_module(void) |
| @@ -103,9 +103,11 @@ static inline int nicvf_alloc_rcv_buffer(struct nicvf *nic, gfp_t gfp, · 102 unmodified lines | ||
| 103 | 103 | |
| 104 | 104 | /* Allocate a new page */ |
| 105 | 105 | if (!nic->rb_page) { |
| 106 | − nic->rb_page = alloc_pages(gfp | __GFP_COMP, order); | |
| 106 | + nic->rb_page = alloc_pages(gfp | __GFP_COMP | __GFP_NOWARN, | |
| 107 | + order); | |
| 107 | 108 | if (!nic->rb_page) { |
| 108 | − netdev_err(nic->netdev, "Failed to allocate new rcv buffer\n"); | |
| 109 | + netdev_err(nic->netdev, | |
| 110 | + "Failed to allocate new rcv buffer\n"); | |
| 109 | 111 | return -ENOMEM; |
| 110 | 112 | } |
| 111 | 113 | nic->rb_page_offset = 0; |
| @@ -382,7 +384,8 @@ static void nicvf_free_snd_queue(struct nicvf *nic, struct snd_queue *sq) · 270 unmodified lines | ||
| 382 | 384 | return; |
| 383 | 385 | |
| 384 | 386 | if (sq->tso_hdrs) |
| 385 | − dma_free_coherent(&nic->pdev->dev, sq->dmem.q_len, | |
| 387 | + dma_free_coherent(&nic->pdev->dev, | |
| 388 | + sq->dmem.q_len * TSO_HEADER_SIZE, | |
| 386 | 389 | sq->tso_hdrs, sq->tso_hdrs_phys); |
| 387 | 390 | |
| 388 | 391 | kfree(sq->skbuff); |
| @@ -863,10 +866,11 @@ void nicvf_sq_free_used_descs(struct net_device *netdev, struct snd_queue *sq, · 474 unmodified lines | ||
| 863 | 866 | continue; |
| 864 | 867 | } |
| 865 | 868 | skb = (struct sk_buff *)sq->skbuff[sq->head]; |
| 869 | + if (skb) | |
| 870 | + dev_kfree_skb_any(skb); | |
| 866 | 871 | atomic64_add(1, (atomic64_t *)&netdev->stats.tx_packets); |
| 867 | 872 | atomic64_add(hdr->tot_len, |
| 868 | 873 | (atomic64_t *)&netdev->stats.tx_bytes); |
| 869 | − dev_kfree_skb_any(skb); | |
| 870 | 874 | nicvf_put_sq_desc(sq, hdr->subdesc_cnt + 1); |
| 871 | 875 | } |
| 872 | 876 | } |
| @@ -992,7 +996,7 @@ static inline void nicvf_sq_add_gather_subdesc(struct snd_queue *sq, int qentry, · 119 unmodified lines | ||
| 992 | 996 | |
| 993 | 997 | memset(gather, 0, SND_QUEUE_DESC_SIZE); |
| 994 | 998 | gather->subdesc_type = SQ_DESC_TYPE_GATHER; |
| 995 | − gather->ld_type = NIC_SEND_LD_TYPE_E_LDWB; | |
| 999 | + gather->ld_type = NIC_SEND_LD_TYPE_E_LDD; | |
| 996 | 1000 | gather->size = size; |
| 997 | 1001 | gather->addr = data; |
| 998 | 1002 | } |
| @@ -1048,7 +1052,7 @@ static int nicvf_sq_append_tso(struct nicvf *nic, struct snd_queue *sq, · 49 unmodified lines | ||
| 1048 | 1052 | } |
| 1049 | 1053 | nicvf_sq_add_hdr_subdesc(sq, hdr_qentry, |
| 1050 | 1054 | seg_subdescs - 1, skb, seg_len); |
| 1051 | − sq->skbuff[hdr_qentry] = 0; | |
| 1055 | + sq->skbuff[hdr_qentry] = (u64)NULL; | |
| 1052 | 1056 | qentry = nicvf_get_nxt_sqentry(sq, qentry); |
| 1053 | 1057 | |
| 1054 | 1058 | desc_cnt += seg_subdescs; |
| @@ -1062,6 +1066,7 @@ static int nicvf_sq_append_tso(struct nicvf *nic, struct snd_queue *sq, · 7 unmodified lines | ||
| 1062 | 1066 | /* Inform HW to xmit all TSO segments */ |
| 1063 | 1067 | nicvf_queue_reg_write(nic, NIC_QSET_SQ_0_7_DOOR, |
| 1064 | 1068 | skb_get_queue_mapping(skb), desc_cnt); |
| 1069 | + nic->drv_stats.tx_tso++; | |
| 1065 | 1070 | return 1; |
| 1066 | 1071 | } |
| 1067 | 1072 | |
| @@ -62,7 +62,7 @@ · 61 unmodified lines | ||
| 62 | 62 | #define SND_QUEUE_CNT 8 |
| 63 | 63 | #define CMP_QUEUE_CNT 8 /* Max of RCV and SND qcount */ |
| 64 | 64 | |
| 65 | −#define SND_QSIZE SND_QUEUE_SIZE4 | |
| 65 | +#define SND_QSIZE SND_QUEUE_SIZE2 | |
| 66 | 66 | #define SND_QUEUE_LEN (1ULL << (SND_QSIZE + 10)) |
| 67 | 67 | #define MAX_SND_QUEUE_LEN (1ULL << (SND_QUEUE_SIZE6 + 10)) |
| 68 | 68 | #define SND_QUEUE_THRESH 2ULL |
| @@ -70,7 +70,10 @@ · 1 unmodified line | ||
| 70 | 70 | /* Since timestamp not enabled, otherwise 2 */ |
| 71 | 71 | #define MAX_CQE_PER_PKT_XMIT 1 |
| 72 | 72 | |
| 73 | −#define CMP_QSIZE CMP_QUEUE_SIZE4 | |
| 73 | +/* Keep CQ and SQ sizes same, if timestamping | |
| 74 | + * is enabled this equation will change. | |
| 75 | + */ | |
| 76 | +#define CMP_QSIZE CMP_QUEUE_SIZE2 | |
| 74 | 77 | #define CMP_QUEUE_LEN (1ULL << (CMP_QSIZE + 10)) |
| 75 | 78 | #define CMP_QUEUE_CQE_THRESH 0 |
| 76 | 79 | #define CMP_QUEUE_TIMER_THRESH 220 /* 10usec */ |
| @@ -87,7 +90,12 @@ · 10 unmodified lines | ||
| 87 | 90 | |
| 88 | 91 | #define MAX_CQES_FOR_TX ((SND_QUEUE_LEN / MIN_SQ_DESC_PER_PKT_XMIT) * \ |
| 89 | 92 | MAX_CQE_PER_PKT_XMIT) |
| 90 | −#define RQ_CQ_DROP ((CMP_QUEUE_LEN - MAX_CQES_FOR_TX) / 256) | |
| 93 | +/* Calculate number of CQEs to reserve for all SQEs. | |
| 94 | + * Its 1/256th level of CQ size. | |
| 95 | + * '+ 1' to account for pipelining | |
| 96 | + */ | |
| 97 | +#define RQ_CQ_DROP ((256 / (CMP_QUEUE_LEN / \ | |
| 98 | + (CMP_QUEUE_LEN - MAX_CQES_FOR_TX))) + 1) | |
| 91 | 99 | |
| 92 | 100 | /* Descriptor size in bytes */ |
| 93 | 101 | #define SND_QUEUE_DESC_SIZE 16 |
| @@ -673,7 +673,10 @@ static void bgx_lmac_disable(struct bgx *bgx, u8 lmacid) · 672 unmodified lines | ||
| 673 | 673 | bgx_reg_write(bgx, lmacid, BGX_CMRX_CFG, cmrx_cfg); |
| 674 | 674 | bgx_flush_dmac_addrs(bgx, lmacid); |
| 675 | 675 | |
| 676 | − if (lmac->phydev) | |
| 676 | + if ((bgx->lmac_type != BGX_MODE_XFI) && | |
| 677 | + (bgx->lmac_type != BGX_MODE_XLAUI) && | |
| 678 | + (bgx->lmac_type != BGX_MODE_40G_KR) && | |
| 679 | + (bgx->lmac_type != BGX_MODE_10G_KR) && lmac->phydev) | |
| 677 | 680 | phy_disconnect(lmac->phydev); |
| 678 | 681 | |
| 679 | 682 | lmac->phydev = NULL; |
| @@ -2332,10 +2332,11 @@ int t4_setup_debugfs(struct adapter *adap) · 2331 unmodified lines | ||
| 2332 | 2332 | EXT_MEM1_SIZE_G(size)); |
| 2333 | 2333 | } |
| 2334 | 2334 | } else { |
| 2335 | − if (i & EXT_MEM_ENABLE_F) | |
| 2335 | + if (i & EXT_MEM_ENABLE_F) { | |
| 2336 | 2336 | size = t4_read_reg(adap, MA_EXT_MEMORY_BAR_A); |
| 2337 | 2337 | add_debugfs_mem(adap, "mc", MEM_MC, |
| 2338 | 2338 | EXT_MEM_SIZE_G(size)); |
| 2339 | + } | |
| 2339 | 2340 | } |
| 2340 | 2341 | |
| 2341 | 2342 | de = debugfs_create_file_size("flash", S_IRUSR, adap->debugfs_root, adap, |
| @@ -620,6 +620,11 @@ enum be_if_flags { · 619 unmodified lines | ||
| 620 | 620 | BE_IF_FLAGS_VLAN_PROMISCUOUS |\ |
| 621 | 621 | BE_IF_FLAGS_MCAST_PROMISCUOUS) |
| 622 | 622 | |
| 623 | +#define BE_IF_EN_FLAGS (BE_IF_FLAGS_BROADCAST | BE_IF_FLAGS_PASS_L3L4_ERRORS |\ | |
| 624 | + BE_IF_FLAGS_MULTICAST | BE_IF_FLAGS_UNTAGGED) | |
| 625 | + | |
| 626 | +#define BE_IF_ALL_FILT_FLAGS (BE_IF_EN_FLAGS | BE_IF_FLAGS_ALL_PROMISCUOUS) | |
| 627 | + | |
| 623 | 628 | /* An RX interface is an object with one or more MAC addresses and |
| 624 | 629 | * filtering capabilities. */ |
| 625 | 630 | struct be_cmd_req_if_create { |
| @@ -273,6 +273,10 @@ static int be_mac_addr_set(struct net_device *netdev, void *p) · 272 unmodified lines | ||
| 273 | 273 | if (ether_addr_equal(addr->sa_data, netdev->dev_addr)) |
| 274 | 274 | return 0; |
| 275 | 275 | |
| 276 | + /* if device is not running, copy MAC to netdev->dev_addr */ | |
| 277 | + if (!netif_running(netdev)) | |
| 278 | + goto done; | |
| 279 | + | |
| 276 | 280 | /* The PMAC_ADD cmd may fail if the VF doesn't have FILTMGMT |
| 277 | 281 | * privilege or if PF did not provision the new MAC address. |
| 278 | 282 | * On BE3, this cmd will always fail if the VF doesn't have the |
| @@ -307,9 +311,9 @@ static int be_mac_addr_set(struct net_device *netdev, void *p) · 28 unmodified lines | ||
| 307 | 311 | status = -EPERM; |
| 308 | 312 | goto err; |
| 309 | 313 | } |
| 310 | − | |
| 311 | − memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len); | |
| 312 | − dev_info(dev, "MAC address changed to %pM\n", mac); | |
| 314 | +done: | |
| 315 | + ether_addr_copy(netdev->dev_addr, addr->sa_data); | |
| 316 | + dev_info(dev, "MAC address changed to %pM\n", addr->sa_data); | |
| 313 | 317 | return 0; |
| 314 | 318 | err: |
| 315 | 319 | dev_warn(dev, "MAC address change to %pM failed\n", addr->sa_data); |
| @@ -2447,10 +2451,24 @@ static void be_eq_clean(struct be_eq_obj *eqo) · 2131 unmodified lines | ||
| 2447 | 2451 | be_eq_notify(eqo->adapter, eqo->q.id, false, true, num, 0); |
| 2448 | 2452 | } |
| 2449 | 2453 | |
| 2450 | −static void be_rx_cq_clean(struct be_rx_obj *rxo) | |
| 2454 | +/* Free posted rx buffers that were not used */ | |
| 2455 | +static void be_rxq_clean(struct be_rx_obj *rxo) | |
| 2451 | 2456 | { |
| 2452 | − struct be_rx_page_info *page_info; | |
| 2453 | 2457 | struct be_queue_info *rxq = &rxo->q; |
| 2458 | + struct be_rx_page_info *page_info; | |
| 2459 | + | |
| 2460 | + while (atomic_read(&rxq->used) > 0) { | |
| 2461 | + page_info = get_rx_page_info(rxo); | |
| 2462 | + put_page(page_info->page); | |
| 2463 | + memset(page_info, 0, sizeof(*page_info)); | |
| 2464 | + } | |
| 2465 | + BUG_ON(atomic_read(&rxq->used)); | |
| 2466 | + rxq->tail = 0; | |
| 2467 | + rxq->head = 0; | |
| 2468 | +} | |
| 2469 | + | |
| 2470 | +static void be_rx_cq_clean(struct be_rx_obj *rxo) | |
| 2471 | +{ | |
| 2454 | 2472 | struct be_queue_info *rx_cq = &rxo->cq; |
| 2455 | 2473 | struct be_rx_compl_info *rxcp; |
| 2456 | 2474 | struct be_adapter *adapter = rxo->adapter; |
| @@ -2487,16 +2505,6 @@ static void be_rx_cq_clean(struct be_rx_obj *rxo) · 30 unmodified lines | ||
| 2487 | 2505 | |
| 2488 | 2506 | /* After cleanup, leave the CQ in unarmed state */ |
| 2489 | 2507 | be_cq_notify(adapter, rx_cq->id, false, 0); |
| 2490 | − | |
| 2491 | − /* Then free posted rx buffers that were not used */ | |
| 2492 | − while (atomic_read(&rxq->used) > 0) { | |
| 2493 | − page_info = get_rx_page_info(rxo); | |
| 2494 | − put_page(page_info->page); | |
| 2495 | − memset(page_info, 0, sizeof(*page_info)); | |
| 2496 | − } | |
| 2497 | − BUG_ON(atomic_read(&rxq->used)); | |
| 2498 | − rxq->tail = 0; | |
| 2499 | − rxq->head = 0; | |
| 2500 | 2508 | } |
| 2501 | 2509 | |
| 2502 | 2510 | static void be_tx_compl_clean(struct be_adapter *adapter) |
| @@ -2576,8 +2584,8 @@ static void be_evt_queues_destroy(struct be_adapter *adapter) · 73 unmodified lines | ||
| 2576 | 2584 | be_cmd_q_destroy(adapter, &eqo->q, QTYPE_EQ); |
| 2577 | 2585 | napi_hash_del(&eqo->napi); |
| 2578 | 2586 | netif_napi_del(&eqo->napi); |
| 2587 | + free_cpumask_var(eqo->affinity_mask); | |
| 2579 | 2588 | } |
| 2580 | − free_cpumask_var(eqo->affinity_mask); | |
| 2581 | 2589 | be_queue_free(adapter, &eqo->q); |
| 2582 | 2590 | } |
| 2583 | 2591 | } |
| @@ -2594,13 +2602,7 @@ static int be_evt_queues_create(struct be_adapter *adapter) · 10 unmodified lines | ||
| 2594 | 2602 | |
| 2595 | 2603 | for_all_evt_queues(adapter, eqo, i) { |
| 2596 | 2604 | int numa_node = dev_to_node(&adapter->pdev->dev); |
| 2597 | − if (!zalloc_cpumask_var(&eqo->affinity_mask, GFP_KERNEL)) | |
| 2598 | − return -ENOMEM; | |
| 2599 | − cpumask_set_cpu(cpumask_local_spread(i, numa_node), | |
| 2600 | − eqo->affinity_mask); | |
| 2601 | − netif_napi_add(adapter->netdev, &eqo->napi, be_poll, | |
| 2602 | − BE_NAPI_WEIGHT); | |
| 2603 | − napi_hash_add(&eqo->napi); | |
| 2605 | + | |
| 2604 | 2606 | aic = &adapter->aic_obj[i]; |
| 2605 | 2607 | eqo->adapter = adapter; |
| 2606 | 2608 | eqo->idx = i; |
| @@ -2616,6 +2618,14 @@ static int be_evt_queues_create(struct be_adapter *adapter) · 9 unmodified lines | ||
| 2616 | 2618 | rc = be_cmd_eq_create(adapter, eqo); |
| 2617 | 2619 | if (rc) |
| 2618 | 2620 | return rc; |
| 2621 | + | |
| 2622 | + if (!zalloc_cpumask_var(&eqo->affinity_mask, GFP_KERNEL)) | |
| 2623 | + return -ENOMEM; | |
| 2624 | + cpumask_set_cpu(cpumask_local_spread(i, numa_node), | |
| 2625 | + eqo->affinity_mask); | |
| 2626 | + netif_napi_add(adapter->netdev, &eqo->napi, be_poll, | |
| 2627 | + BE_NAPI_WEIGHT); | |
| 2628 | + napi_hash_add(&eqo->napi); | |
| 2619 | 2629 | } |
| 2620 | 2630 | return 0; |
| 2621 | 2631 | } |
| @@ -3354,13 +3364,54 @@ static void be_rx_qs_destroy(struct be_adapter *adapter) · 732 unmodified lines | ||
| 3354 | 3364 | for_all_rx_queues(adapter, rxo, i) { |
| 3355 | 3365 | q = &rxo->q; |
| 3356 | 3366 | if (q->created) { |
| 3367 | + /* If RXQs are destroyed while in an "out of buffer" | |
| 3368 | + * state, there is a possibility of an HW stall on | |
| 3369 | + * Lancer. So, post 64 buffers to each queue to relieve | |
| 3370 | + * the "out of buffer" condition. | |
| 3371 | + * Make sure there's space in the RXQ before posting. | |
| 3372 | + */ | |
| 3373 | + if (lancer_chip(adapter)) { | |
| 3374 | + be_rx_cq_clean(rxo); | |
| 3375 | + if (atomic_read(&q->used) == 0) | |
| 3376 | + be_post_rx_frags(rxo, GFP_KERNEL, | |
| 3377 | + MAX_RX_POST); | |
| 3378 | + } | |
| 3379 | + | |
| 3357 | 3380 | be_cmd_rxq_destroy(adapter, q); |
| 3358 | 3381 | be_rx_cq_clean(rxo); |
| 3382 | + be_rxq_clean(rxo); | |
| 3359 | 3383 | } |
| 3360 | 3384 | be_queue_free(adapter, q); |
| 3361 | 3385 | } |
| 3362 | 3386 | } |
| 3363 | 3387 | |
| 3388 | +static void be_disable_if_filters(struct be_adapter *adapter) | |
| 3389 | +{ | |
| 3390 | + be_cmd_pmac_del(adapter, adapter->if_handle, | |
| 3391 | + adapter->pmac_id[0], 0); | |
| 3392 | + | |
| 3393 | + be_clear_uc_list(adapter); | |
| 3394 | + | |
| 3395 | + /* The IFACE flags are enabled in the open path and cleared | |
| 3396 | + * in the close path. When a VF gets detached from the host and | |
| 3397 | + * assigned to a VM the following happens: | |
| 3398 | + * - VF's IFACE flags get cleared in the detach path | |
| 3399 | + * - IFACE create is issued by the VF in the attach path | |
| 3400 | + * Due to a bug in the BE3/Skyhawk-R FW | |
| 3401 | + * (Lancer FW doesn't have the bug), the IFACE capability flags | |
| 3402 | + * specified along with the IFACE create cmd issued by a VF are not | |
| 3403 | + * honoured by FW. As a consequence, if a *new* driver | |
| 3404 | + * (that enables/disables IFACE flags in open/close) | |
| 3405 | + * is loaded in the host and an *old* driver is * used by a VM/VF, | |
| 3406 | + * the IFACE gets created *without* the needed flags. | |
| 3407 | + * To avoid this, disable RX-filter flags only for Lancer. | |
| 3408 | + */ | |
| 3409 | + if (lancer_chip(adapter)) { | |
| 3410 | + be_cmd_rx_filter(adapter, BE_IF_ALL_FILT_FLAGS, OFF); | |
| 3411 | + adapter->if_flags &= ~BE_IF_ALL_FILT_FLAGS; | |
| 3412 | + } | |
| 3413 | +} | |
| 3414 | + | |
| 3364 | 3415 | static int be_close(struct net_device *netdev) |
| 3365 | 3416 | { |
| 3366 | 3417 | struct be_adapter *adapter = netdev_priv(netdev); |
| @@ -3373,6 +3424,8 @@ static int be_close(struct net_device *netdev) · 6 unmodified lines | ||
| 3373 | 3424 | if (!(adapter->flags & BE_FLAGS_SETUP_DONE)) |
| 3374 | 3425 | return 0; |
| 3375 | 3426 | |
| 3427 | + be_disable_if_filters(adapter); | |
| 3428 | + | |
| 3376 | 3429 | be_roce_dev_close(adapter); |
| 3377 | 3430 | |
| 3378 | 3431 | if (adapter->flags & BE_FLAGS_NAPI_ENABLED) { |
| @@ -3392,7 +3445,6 @@ static int be_close(struct net_device *netdev) · 13 unmodified lines | ||
| 3392 | 3445 | be_tx_compl_clean(adapter); |
| 3393 | 3446 | |
| 3394 | 3447 | be_rx_qs_destroy(adapter); |
| 3395 | − be_clear_uc_list(adapter); | |
| 3396 | 3448 | |
| 3397 | 3449 | for_all_evt_queues(adapter, eqo, i) { |
| 3398 | 3450 | if (msix_enabled(adapter)) |
| @@ -3477,6 +3529,31 @@ static int be_rx_qs_create(struct be_adapter *adapter) · 78 unmodified lines | ||
| 3477 | 3529 | return 0; |
| 3478 | 3530 | } |
| 3479 | 3531 | |
| 3532 | +static int be_enable_if_filters(struct be_adapter *adapter) | |
| 3533 | +{ | |
| 3534 | + int status; | |
| 3535 | + | |
| 3536 | + status = be_cmd_rx_filter(adapter, BE_IF_EN_FLAGS, ON); | |
| 3537 | + if (status) | |
| 3538 | + return status; | |
| 3539 | + | |
| 3540 | + /* For BE3 VFs, the PF programs the initial MAC address */ | |
| 3541 | + if (!(BEx_chip(adapter) && be_virtfn(adapter))) { | |
| 3542 | + status = be_cmd_pmac_add(adapter, adapter->netdev->dev_addr, | |
| 3543 | + adapter->if_handle, | |
| 3544 | + &adapter->pmac_id[0], 0); | |
| 3545 | + if (status) | |
| 3546 | + return status; | |
| 3547 | + } | |
| 3548 | + | |
| 3549 | + if (adapter->vlans_added) | |
| 3550 | + be_vid_config(adapter); | |
| 3551 | + | |
| 3552 | + be_set_rx_mode(adapter->netdev); | |
| 3553 | + | |
| 3554 | + return 0; | |
| 3555 | +} | |
| 3556 | + | |
| 3480 | 3557 | static int be_open(struct net_device *netdev) |
| 3481 | 3558 | { |
| 3482 | 3559 | struct be_adapter *adapter = netdev_priv(netdev); |
| @@ -3490,6 +3567,10 @@ static int be_open(struct net_device *netdev) · 7 unmodified lines | ||
| 3490 | 3567 | if (status) |
| 3491 | 3568 | goto err; |
| 3492 | 3569 | |
| 3570 | + status = be_enable_if_filters(adapter); | |
| 3571 | + if (status) | |
| 3572 | + goto err; | |
| 3573 | + | |
| 3493 | 3574 | status = be_irq_register(adapter); |
| 3494 | 3575 | if (status) |
| 3495 | 3576 | goto err; |
| @@ -3686,16 +3767,6 @@ static void be_cancel_err_detection(struct be_adapter *adapter) · 190 unmodified lines | ||
| 3686 | 3767 | } |
| 3687 | 3768 | } |
| 3688 | 3769 | |
| 3689 | −static void be_mac_clear(struct be_adapter *adapter) | |
| 3690 | −{ | |
| 3691 | − if (adapter->pmac_id) { | |
| 3692 | − be_cmd_pmac_del(adapter, adapter->if_handle, | |
| 3693 | − adapter->pmac_id[0], 0); | |
| 3694 | − kfree(adapter->pmac_id); | |
| 3695 | − adapter->pmac_id = NULL; | |
| 3696 | − } | |
| 3697 | −} | |
| 3698 | − | |
| 3699 | 3770 | #ifdef CONFIG_BE2NET_VXLAN |
| 3700 | 3771 | static void be_disable_vxlan_offloads(struct be_adapter *adapter) |
| 3701 | 3772 | { |
| @@ -3770,8 +3841,8 @@ static int be_clear(struct be_adapter *adapter) · 68 unmodified lines | ||
| 3770 | 3841 | #ifdef CONFIG_BE2NET_VXLAN |
| 3771 | 3842 | be_disable_vxlan_offloads(adapter); |
| 3772 | 3843 | #endif |
| 3773 | − /* delete the primary mac along with the uc-mac list */ | |
| 3774 | − be_mac_clear(adapter); | |
| 3844 | + kfree(adapter->pmac_id); | |
| 3845 | + adapter->pmac_id = NULL; | |
| 3775 | 3846 | |
| 3776 | 3847 | be_cmd_if_destroy(adapter, adapter->if_handle, 0); |
| 3777 | 3848 | |
| @@ -3782,25 +3853,11 @@ static int be_clear(struct be_adapter *adapter) · 4 unmodified lines | ||
| 3782 | 3853 | return 0; |
| 3783 | 3854 | } |
| 3784 | 3855 | |
| 3785 | −static int be_if_create(struct be_adapter *adapter, u32 *if_handle, | |
| 3786 | − u32 cap_flags, u32 vf) | |
| 3787 | −{ | |
| 3788 | − u32 en_flags; | |
| 3789 | − | |
| 3790 | − en_flags = BE_IF_FLAGS_UNTAGGED | BE_IF_FLAGS_BROADCAST | | |
| 3791 | − BE_IF_FLAGS_MULTICAST | BE_IF_FLAGS_PASS_L3L4_ERRORS | | |
| 3792 | − BE_IF_FLAGS_RSS | BE_IF_FLAGS_DEFQ_RSS; | |
| 3793 | − | |
| 3794 | − en_flags &= cap_flags; | |
| 3795 | − | |
| 3796 | − return be_cmd_if_create(adapter, cap_flags, en_flags, if_handle, vf); | |
| 3797 | −} | |
| 3798 | − | |
| 3799 | 3856 | static int be_vfs_if_create(struct be_adapter *adapter) |
| 3800 | 3857 | { |
| 3801 | 3858 | struct be_resources res = {0}; |
| 3859 | + u32 cap_flags, en_flags, vf; | |
| 3802 | 3860 | struct be_vf_cfg *vf_cfg; |
| 3803 | − u32 cap_flags, vf; | |
| 3804 | 3861 | int status; |
| 3805 | 3862 | |
| 3806 | 3863 | /* If a FW profile exists, then cap_flags are updated */ |
| @@ -3821,8 +3878,12 @@ static int be_vfs_if_create(struct be_adapter *adapter) · 14 unmodified lines | ||
| 3821 | 3878 | } |
| 3822 | 3879 | } |
| 3823 | 3880 | |
| 3824 | − status = be_if_create(adapter, &vf_cfg->if_handle, | |
| 3825 | − cap_flags, vf + 1); | |
| 3881 | + en_flags = cap_flags & (BE_IF_FLAGS_UNTAGGED | | |
| 3882 | + BE_IF_FLAGS_BROADCAST | | |
| 3883 | + BE_IF_FLAGS_MULTICAST | | |
| 3884 | + BE_IF_FLAGS_PASS_L3L4_ERRORS); | |
| 3885 | + status = be_cmd_if_create(adapter, cap_flags, en_flags, | |
| 3886 | + &vf_cfg->if_handle, vf + 1); | |
| 3826 | 3887 | if (status) |
| 3827 | 3888 | return status; |
| 3828 | 3889 | } |
| @@ -4194,15 +4255,8 @@ static int be_mac_setup(struct be_adapter *adapter) · 365 unmodified lines | ||
| 4194 | 4255 | |
| 4195 | 4256 | memcpy(adapter->netdev->dev_addr, mac, ETH_ALEN); |
| 4196 | 4257 | memcpy(adapter->netdev->perm_addr, mac, ETH_ALEN); |
| 4197 | − } else { | |
| 4198 | − /* Maybe the HW was reset; dev_addr must be re-programmed */ | |
| 4199 | − memcpy(mac, adapter->netdev->dev_addr, ETH_ALEN); | |
| 4200 | 4258 | } |
| 4201 | 4259 | |
| 4202 | − /* For BE3-R VFs, the PF programs the initial MAC address */ | |
| 4203 | − if (!(BEx_chip(adapter) && be_virtfn(adapter))) | |
| 4204 | − be_cmd_pmac_add(adapter, mac, adapter->if_handle, | |
| 4205 | − &adapter->pmac_id[0], 0); | |
| 4206 | 4260 | return 0; |
| 4207 | 4261 | } |
| 4208 | 4262 | |
| @@ -4342,6 +4396,7 @@ static int be_func_init(struct be_adapter *adapter) · 133 unmodified lines | ||
| 4342 | 4396 | static int be_setup(struct be_adapter *adapter) |
| 4343 | 4397 | { |
| 4344 | 4398 | struct device *dev = &adapter->pdev->dev; |
| 4399 | + u32 en_flags; | |
| 4345 | 4400 | int status; |
| 4346 | 4401 | |
| 4347 | 4402 | status = be_func_init(adapter); |
| @@ -4364,8 +4419,11 @@ static int be_setup(struct be_adapter *adapter) · 16 unmodified lines | ||
| 4364 | 4419 | if (status) |
| 4365 | 4420 | goto err; |
| 4366 | 4421 | |
| 4367 | − status = be_if_create(adapter, &adapter->if_handle, | |
| 4368 | − be_if_cap_flags(adapter), 0); | |
| 4422 | + /* will enable all the needed filter flags in be_open() */ | |
| 4423 | + en_flags = BE_IF_FLAGS_RSS | BE_IF_FLAGS_DEFQ_RSS; | |
| 4424 | + en_flags = en_flags & be_if_cap_flags(adapter); | |
| 4425 | + status = be_cmd_if_create(adapter, be_if_cap_flags(adapter), en_flags, | |
| 4426 | + &adapter->if_handle, 0); | |
| 4369 | 4427 | if (status) |
| 4370 | 4428 | goto err; |
| 4371 | 4429 | |
| @@ -4391,11 +4449,6 @@ static int be_setup(struct be_adapter *adapter) · 19 unmodified lines | ||
| 4391 | 4449 | dev_err(dev, "Please upgrade firmware to version >= 4.0\n"); |
| 4392 | 4450 | } |
| 4393 | 4451 | |
| 4394 | − if (adapter->vlans_added) | |
| 4395 | − be_vid_config(adapter); | |
| 4396 | − | |
| 4397 | − be_set_rx_mode(adapter->netdev); | |
| 4398 | − | |
| 4399 | 4452 | status = be_cmd_set_flow_control(adapter, adapter->tx_fc, |
| 4400 | 4453 | adapter->rx_fc); |
| 4401 | 4454 | if (status) |
| @@ -562,6 +562,7 @@ struct fec_enet_private { · 561 unmodified lines | ||
| 562 | 562 | }; |
| 563 | 563 | |
| 564 | 564 | void fec_ptp_init(struct platform_device *pdev); |
| 565 | +void fec_ptp_stop(struct platform_device *pdev); | |
| 565 | 566 | void fec_ptp_start_cyclecounter(struct net_device *ndev); |
| 566 | 567 | int fec_ptp_set(struct net_device *ndev, struct ifreq *ifr); |
| 567 | 568 | int fec_ptp_get(struct net_device *ndev, struct ifreq *ifr); |
| @@ -3142,8 +3142,8 @@ static int fec_enet_init(struct net_device *ndev) · 3141 unmodified lines | ||
| 3142 | 3142 | fep->bufdesc_size; |
| 3143 | 3143 | |
| 3144 | 3144 | /* Allocate memory for buffer descriptors. */ |
| 3145 | − cbd_base = dma_alloc_coherent(NULL, bd_size, &bd_dma, | |
| 3146 | − GFP_KERNEL); | |
| 3145 | + cbd_base = dmam_alloc_coherent(&fep->pdev->dev, bd_size, &bd_dma, | |
| 3146 | + GFP_KERNEL); | |
| 3147 | 3147 | if (!cbd_base) { |
| 3148 | 3148 | return -ENOMEM; |
| 3149 | 3149 | } |
| @@ -3431,6 +3431,12 @@ fec_probe(struct platform_device *pdev) · 281 unmodified lines | ||
| 3431 | 3431 | fep->reg_phy = NULL; |
| 3432 | 3432 | } |
| 3433 | 3433 | |
| 3434 | + pm_runtime_set_autosuspend_delay(&pdev->dev, FEC_MDIO_PM_TIMEOUT); | |
| 3435 | + pm_runtime_use_autosuspend(&pdev->dev); | |
| 3436 | + pm_runtime_get_noresume(&pdev->dev); | |
| 3437 | + pm_runtime_set_active(&pdev->dev); | |
| 3438 | + pm_runtime_enable(&pdev->dev); | |
| 3439 | + | |
| 3434 | 3440 | fec_reset_phy(pdev); |
| 3435 | 3441 | |
| 3436 | 3442 | if (fep->bufdesc_ex) |
| @@ -3465,8 +3471,6 @@ fec_probe(struct platform_device *pdev) · 28 unmodified lines | ||
| 3465 | 3471 | netif_carrier_off(ndev); |
| 3466 | 3472 | fec_enet_clk_enable(ndev, false); |
| 3467 | 3473 | pinctrl_pm_select_sleep_state(&pdev->dev); |
| 3468 | − pm_runtime_set_active(&pdev->dev); | |
| 3469 | − pm_runtime_enable(&pdev->dev); | |
| 3470 | 3474 | |
| 3471 | 3475 | ret = register_netdev(ndev); |
| 3472 | 3476 | if (ret) |
| @@ -3481,8 +3485,6 @@ fec_probe(struct platform_device *pdev) · 8 unmodified lines | ||
| 3481 | 3485 | fep->rx_copybreak = COPYBREAK_DEFAULT; |
| 3482 | 3486 | INIT_WORK(&fep->tx_timeout_work, fec_enet_timeout_work); |
| 3483 | 3487 | |
| 3484 | − pm_runtime_set_autosuspend_delay(&pdev->dev, FEC_MDIO_PM_TIMEOUT); | |
| 3485 | − pm_runtime_use_autosuspend(&pdev->dev); | |
| 3486 | 3488 | pm_runtime_mark_last_busy(&pdev->dev); |
| 3487 | 3489 | pm_runtime_put_autosuspend(&pdev->dev); |
| 3488 | 3490 | |
| @@ -3493,6 +3495,7 @@ failed_register: · 4 unmodified lines | ||
| 3493 | 3495 | failed_mii_init: |
| 3494 | 3496 | failed_irq: |
| 3495 | 3497 | failed_init: |
| 3498 | + fec_ptp_stop(pdev); | |
| 3496 | 3499 | if (fep->reg_phy) |
| 3497 | 3500 | regulator_disable(fep->reg_phy); |
| 3498 | 3501 | failed_regulator: |
| @@ -3514,14 +3517,12 @@ fec_drv_remove(struct platform_device *pdev) · 15 unmodified lines | ||
| 3514 | 3517 | struct net_device *ndev = platform_get_drvdata(pdev); |
| 3515 | 3518 | struct fec_enet_private *fep = netdev_priv(ndev); |
| 3516 | 3519 | |
| 3517 | − cancel_delayed_work_sync(&fep->time_keep); | |
| 3518 | 3520 | cancel_work_sync(&fep->tx_timeout_work); |
| 3521 | + fec_ptp_stop(pdev); | |
| 3519 | 3522 | unregister_netdev(ndev); |
| 3520 | 3523 | fec_enet_mii_remove(fep); |
| 3521 | 3524 | if (fep->reg_phy) |
| 3522 | 3525 | regulator_disable(fep->reg_phy); |
| 3523 | − if (fep->ptp_clock) | |
| 3524 | − ptp_clock_unregister(fep->ptp_clock); | |
| 3525 | 3526 | of_node_put(fep->phy_node); |
| 3526 | 3527 | free_netdev(ndev); |
| 3527 | 3528 | |
| @@ -604,6 +604,16 @@ void fec_ptp_init(struct platform_device *pdev) · 603 unmodified lines | ||
| 604 | 604 | schedule_delayed_work(&fep->time_keep, HZ); |
| 605 | 605 | } |
| 606 | 606 | |
| 607 | +void fec_ptp_stop(struct platform_device *pdev) | |
| 608 | +{ | |
| 609 | + struct net_device *ndev = platform_get_drvdata(pdev); | |
| 610 | + struct fec_enet_private *fep = netdev_priv(ndev); | |
| 611 | + | |
| 612 | + cancel_delayed_work_sync(&fep->time_keep); | |
| 613 | + if (fep->ptp_clock) | |
| 614 | + ptp_clock_unregister(fep->ptp_clock); | |
| 615 | +} | |
| 616 | + | |
| 607 | 617 | /** |
| 608 | 618 | * fec_ptp_check_pps_event |
| 609 | 619 | * @fep: the fec_enet_private structure handle |
| @@ -586,7 +586,8 @@ static int fs_enet_start_xmit(struct sk_buff *skb, struct net_device *dev) · 585 unmodified lines | ||
| 586 | 586 | frag = skb_shinfo(skb)->frags; |
| 587 | 587 | while (nr_frags) { |
| 588 | 588 | CBDC_SC(bdp, |
| 589 | − BD_ENET_TX_STATS | BD_ENET_TX_LAST | BD_ENET_TX_TC); | |
| 589 | + BD_ENET_TX_STATS | BD_ENET_TX_INTR | BD_ENET_TX_LAST | | |
| 590 | + BD_ENET_TX_TC); | |
| 590 | 591 | CBDS_SC(bdp, BD_ENET_TX_READY); |
| 591 | 592 | |
| 592 | 593 | if ((CBDR_SC(bdp) & BD_ENET_TX_WRAP) == 0) |
| @@ -110,7 +110,7 @@ static int do_pd_setup(struct fs_enet_private *fep) · 109 unmodified lines | ||
| 110 | 110 | } |
| 111 | 111 | |
| 112 | 112 | #define FEC_NAPI_RX_EVENT_MSK (FEC_ENET_RXF | FEC_ENET_RXB) |
| 113 | −#define FEC_NAPI_TX_EVENT_MSK (FEC_ENET_TXF | FEC_ENET_TXB) | |
| 113 | +#define FEC_NAPI_TX_EVENT_MSK (FEC_ENET_TXF) | |
| 114 | 114 | #define FEC_RX_EVENT (FEC_ENET_RXF) |
| 115 | 115 | #define FEC_TX_EVENT (FEC_ENET_TXF) |
| 116 | 116 | #define FEC_ERR_EVENT_MSK (FEC_ENET_HBERR | FEC_ENET_BABR | \ |
| @@ -565,22 +565,6 @@ static void gfar_ints_enable(struct gfar_private *priv) · 564 unmodified lines | ||
| 565 | 565 | } |
| 566 | 566 | } |
| 567 | 567 | |
| 568 | −static void lock_tx_qs(struct gfar_private *priv) | |
| 569 | −{ | |
| 570 | − int i; | |
| 571 | − | |
| 572 | − for (i = 0; i < priv->num_tx_queues; i++) | |
| 573 | − spin_lock(&priv->tx_queue[i]->txlock); | |
| 574 | −} | |
| 575 | − | |
| 576 | −static void unlock_tx_qs(struct gfar_private *priv) | |
| 577 | −{ | |
| 578 | − int i; | |
| 579 | − | |
| 580 | − for (i = 0; i < priv->num_tx_queues; i++) | |
| 581 | − spin_unlock(&priv->tx_queue[i]->txlock); | |
| 582 | −} | |
| 583 | − | |
| 584 | 568 | static int gfar_alloc_tx_queues(struct gfar_private *priv) |
| 585 | 569 | { |
| 586 | 570 | int i; |
| @@ -1376,7 +1360,6 @@ static int gfar_probe(struct platform_device *ofdev) · 789 unmodified lines | ||
| 1376 | 1360 | priv->dev = &ofdev->dev; |
| 1377 | 1361 | SET_NETDEV_DEV(dev, &ofdev->dev); |
| 1378 | 1362 | |
| 1379 | − spin_lock_init(&priv->bflock); | |
| 1380 | 1363 | INIT_WORK(&priv->reset_task, gfar_reset_task); |
| 1381 | 1364 | |
| 1382 | 1365 | platform_set_drvdata(ofdev, priv); |
| @@ -1470,9 +1453,8 @@ static int gfar_probe(struct platform_device *ofdev) · 87 unmodified lines | ||
| 1470 | 1453 | goto register_fail; |
| 1471 | 1454 | } |
| 1472 | 1455 | |
| 1473 | − device_init_wakeup(&dev->dev, | |
| 1474 | − priv->device_flags & | |
| 1475 | − FSL_GIANFAR_DEV_HAS_MAGIC_PACKET); | |
| 1456 | + device_set_wakeup_capable(&dev->dev, priv->device_flags & | |
| 1457 | + FSL_GIANFAR_DEV_HAS_MAGIC_PACKET); | |
| 1476 | 1458 | |
| 1477 | 1459 | /* fill out IRQ number and name fields */ |
| 1478 | 1460 | for (i = 0; i < priv->num_grps; i++) { |
| @@ -1540,48 +1522,37 @@ static int gfar_suspend(struct device *dev) · 61 unmodified lines | ||
| 1540 | 1522 | struct gfar_private *priv = dev_get_drvdata(dev); |
| 1541 | 1523 | struct net_device *ndev = priv->ndev; |
| 1542 | 1524 | struct gfar __iomem *regs = priv->gfargrp[0].regs; |
| 1543 | − unsigned long flags; | |
| 1544 | 1525 | u32 tempval; |
| 1545 | − | |
| 1546 | 1526 | int magic_packet = priv->wol_en && |
| 1547 | 1527 | (priv->device_flags & |
| 1548 | 1528 | FSL_GIANFAR_DEV_HAS_MAGIC_PACKET); |
| 1549 | 1529 | |
| 1530 | + if (!netif_running(ndev)) | |
| 1531 | + return 0; | |
| 1532 | + | |
| 1533 | + disable_napi(priv); | |
| 1534 | + netif_tx_lock(ndev); | |
| 1550 | 1535 | netif_device_detach(ndev); |
| 1536 | + netif_tx_unlock(ndev); | |
| 1551 | 1537 | |
| 1552 | − if (netif_running(ndev)) { | |
| 1538 | + gfar_halt(priv); | |
| 1553 | 1539 | |
| 1554 | − local_irq_save(flags); | |
| 1555 | − lock_tx_qs(priv); | |
| 1540 | + if (magic_packet) { | |
| 1541 | + /* Enable interrupt on Magic Packet */ | |
| 1542 | + gfar_write(®s->imask, IMASK_MAG); | |
| 1556 | 1543 | |
| 1557 | − gfar_halt_nodisable(priv); | |
| 1544 | + /* Enable Magic Packet mode */ | |
| 1545 | + tempval = gfar_read(®s->maccfg2); | |
| 1546 | + tempval |= MACCFG2_MPEN; | |
| 1547 | + gfar_write(®s->maccfg2, tempval); | |
| 1558 | 1548 | |
| 1559 | − /* Disable Tx, and Rx if wake-on-LAN is disabled. */ | |
| 1549 | + /* re-enable the Rx block */ | |
| 1560 | 1550 | tempval = gfar_read(®s->maccfg1); |
| 1561 | − | |
| 1562 | − tempval &= ~MACCFG1_TX_EN; | |
| 1563 | − | |
| 1564 | − if (!magic_packet) | |
| 1565 | − tempval &= ~MACCFG1_RX_EN; | |
| 1566 | − | |
| 1551 | + tempval |= MACCFG1_RX_EN; | |
| 1567 | 1552 | gfar_write(®s->maccfg1, tempval); |
| 1568 | 1553 | |
| 1569 | − unlock_tx_qs(priv); | |
| 1570 | − local_irq_restore(flags); | |
| 1571 | − | |
| 1572 | − disable_napi(priv); | |
| 1573 | − | |
| 1574 | − if (magic_packet) { | |
| 1575 | − /* Enable interrupt on Magic Packet */ | |
| 1576 | − gfar_write(®s->imask, IMASK_MAG); | |
| 1577 | − | |
| 1578 | − /* Enable Magic Packet mode */ | |
| 1579 | − tempval = gfar_read(®s->maccfg2); | |
| 1580 | − tempval |= MACCFG2_MPEN; | |
| 1581 | − gfar_write(®s->maccfg2, tempval); | |
| 1582 | − } else { | |
| 1583 | − phy_stop(priv->phydev); | |
| 1584 | − } | |
| 1554 | + } else { | |
| 1555 | + phy_stop(priv->phydev); | |
| 1585 | 1556 | } |
| 1586 | 1557 | |
| 1587 | 1558 | return 0; |
| @@ -1592,37 +1563,26 @@ static int gfar_resume(struct device *dev) · 4 unmodified lines | ||
| 1592 | 1563 | struct gfar_private *priv = dev_get_drvdata(dev); |
| 1593 | 1564 | struct net_device *ndev = priv->ndev; |
| 1594 | 1565 | struct gfar __iomem *regs = priv->gfargrp[0].regs; |
| 1595 | − unsigned long flags; | |
| 1596 | 1566 | u32 tempval; |
| 1597 | 1567 | int magic_packet = priv->wol_en && |
| 1598 | 1568 | (priv->device_flags & |
| 1599 | 1569 | FSL_GIANFAR_DEV_HAS_MAGIC_PACKET); |
| 1600 | 1570 | |
| 1601 | − if (!netif_running(ndev)) { | |
| 1602 | − netif_device_attach(ndev); | |
| 1571 | + if (!netif_running(ndev)) | |
| 1603 | 1572 | return 0; |
| 1604 | − } | |
| 1605 | 1573 | |
| 1606 | − if (!magic_packet && priv->phydev) | |
| 1574 | + if (magic_packet) { | |
| 1575 | + /* Disable Magic Packet mode */ | |
| 1576 | + tempval = gfar_read(®s->maccfg2); | |
| 1577 | + tempval &= ~MACCFG2_MPEN; | |
| 1578 | + gfar_write(®s->maccfg2, tempval); | |
| 1579 | + } else { | |
| 1607 | 1580 | phy_start(priv->phydev); |
| 1608 | − | |
| 1609 | − /* Disable Magic Packet mode, in case something | |
| 1610 | − * else woke us up. | |
| 1611 | − */ | |
| 1612 | − local_irq_save(flags); | |
| 1613 | − lock_tx_qs(priv); | |
| 1614 | − | |
| 1615 | − tempval = gfar_read(®s->maccfg2); | |
| 1616 | − tempval &= ~MACCFG2_MPEN; | |
| 1617 | − gfar_write(®s->maccfg2, tempval); | |
| 1581 | + } | |
| 1618 | 1582 | |
| 1619 | 1583 | gfar_start(priv); |
| 1620 | 1584 | |
| 1621 | − unlock_tx_qs(priv); | |
| 1622 | − local_irq_restore(flags); | |
| 1623 | − | |
| 1624 | 1585 | netif_device_attach(ndev); |
| 1625 | − | |
| 1626 | 1586 | enable_napi(priv); |
| 1627 | 1587 | |
| 1628 | 1588 | return 0; |
| @@ -2045,7 +2005,8 @@ static int register_grp_irqs(struct gfar_priv_grp *grp) · 416 unmodified lines | ||
| 2045 | 2005 | /* Install our interrupt handlers for Error, |
| 2046 | 2006 | * Transmit, and Receive |
| 2047 | 2007 | */ |
| 2048 | − err = request_irq(gfar_irq(grp, ER)->irq, gfar_error, 0, | |
| 2008 | + err = request_irq(gfar_irq(grp, ER)->irq, gfar_error, | |
| 2009 | + IRQF_NO_SUSPEND, | |
| 2049 | 2010 | gfar_irq(grp, ER)->name, grp); |
| 2050 | 2011 | if (err < 0) { |
| 2051 | 2012 | netif_err(priv, intr, dev, "Can't get IRQ %d\n", |
| @@ -2068,7 +2029,8 @@ static int register_grp_irqs(struct gfar_priv_grp *grp) · 16 unmodified lines | ||
| 2068 | 2029 | goto rx_irq_fail; |
| 2069 | 2030 | } |
| 2070 | 2031 | } else { |
| 2071 | − err = request_irq(gfar_irq(grp, TX)->irq, gfar_interrupt, 0, | |
| 2032 | + err = request_irq(gfar_irq(grp, TX)->irq, gfar_interrupt, | |
| 2033 | + IRQF_NO_SUSPEND, | |
| 2072 | 2034 | gfar_irq(grp, TX)->name, grp); |
| 2073 | 2035 | if (err < 0) { |
| 2074 | 2036 | netif_err(priv, intr, dev, "Can't get IRQ %d\n", |
| @@ -2169,8 +2131,6 @@ static int gfar_enet_open(struct net_device *dev) · 94 unmodified lines | ||
| 2169 | 2131 | if (err) |
| 2170 | 2132 | return err; |
| 2171 | 2133 | |
| 2172 | − device_set_wakeup_enable(&dev->dev, priv->wol_en); | |
| 2173 | − | |
| 2174 | 2134 | return err; |
| 2175 | 2135 | } |
| 2176 | 2136 | |
| @@ -1145,9 +1145,6 @@ struct gfar_private { · 1144 unmodified lines | ||
| 1145 | 1145 | int oldduplex; |
| 1146 | 1146 | int oldlink; |
| 1147 | 1147 | |
| 1148 | − /* Bitfield update lock */ | |
| 1149 | − spinlock_t bflock; | |
| 1150 | − | |
| 1151 | 1148 | uint32_t msg_enable; |
| 1152 | 1149 | |
| 1153 | 1150 | struct work_struct reset_task; |
| @@ -653,7 +653,6 @@ static void gfar_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol) · 652 unmodified lines | ||
| 653 | 653 | static int gfar_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol) |
| 654 | 654 | { |
| 655 | 655 | struct gfar_private *priv = netdev_priv(dev); |
| 656 | − unsigned long flags; | |
| 657 | 656 | |
| 658 | 657 | if (!(priv->device_flags & FSL_GIANFAR_DEV_HAS_MAGIC_PACKET) && |
| 659 | 658 | wol->wolopts != 0) |
| @@ -664,9 +663,7 @@ static int gfar_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol) · 4 unmodified lines | ||
| 664 | 663 | |
| 665 | 664 | device_set_wakeup_enable(&dev->dev, wol->wolopts & WAKE_MAGIC); |
| 666 | 665 | |
| 667 | − spin_lock_irqsave(&priv->bflock, flags); | |
| 668 | − priv->wol_en = !!device_may_wakeup(&dev->dev); | |
| 669 | − spin_unlock_irqrestore(&priv->bflock, flags); | |
| 666 | + priv->wol_en = !!device_may_wakeup(&dev->dev); | |
| 670 | 667 | |
| 671 | 668 | return 0; |
| 672 | 669 | } |
| @@ -903,27 +900,6 @@ static int gfar_check_filer_hardware(struct gfar_private *priv) · 230 unmodified lines | ||
| 903 | 900 | return 0; |
| 904 | 901 | } |
| 905 | 902 | |
| 906 | −static int gfar_comp_asc(const void *a, const void *b) | |
| 907 | −{ | |
| 908 | − return memcmp(a, b, 4); | |
| 909 | −} | |
| 910 | − | |
| 911 | −static int gfar_comp_desc(const void *a, const void *b) | |
| 912 | −{ | |
| 913 | − return -memcmp(a, b, 4); | |
| 914 | −} | |
| 915 | − | |
| 916 | −static void gfar_swap(void *a, void *b, int size) | |
| 917 | −{ | |
| 918 | − u32 *_a = a; | |
| 919 | − u32 *_b = b; | |
| 920 | − | |
| 921 | − swap(_a[0], _b[0]); | |
| 922 | − swap(_a[1], _b[1]); | |
| 923 | − swap(_a[2], _b[2]); | |
| 924 | − swap(_a[3], _b[3]); | |
| 925 | −} | |
| 926 | − | |
| 927 | 903 | /* Write a mask to filer cache */ |
| 928 | 904 | static void gfar_set_mask(u32 mask, struct filer_table *tab) |
| 929 | 905 | { |
| @@ -1273,310 +1249,6 @@ static int gfar_convert_to_filer(struct ethtool_rx_flow_spec *rule, · 343 unmodified lines | ||
| 1273 | 1249 | return 0; |
| 1274 | 1250 | } |
| 1275 | 1251 | |
| 1276 | −/* Copy size filer entries */ | |
| 1277 | −static void gfar_copy_filer_entries(struct gfar_filer_entry dst[0], | |
| 1278 | − struct gfar_filer_entry src[0], s32 size) | |
| 1279 | −{ | |
| 1280 | − while (size > 0) { | |
| 1281 | − size--; | |
| 1282 | − dst[size].ctrl = src[size].ctrl; | |
| 1283 | − dst[size].prop = src[size].prop; | |
| 1284 | − } | |
| 1285 | −} | |
| 1286 | − | |
| 1287 | −/* Delete the contents of the filer-table between start and end | |
| 1288 | − * and collapse them | |
| 1289 | − */ | |
| 1290 | −static int gfar_trim_filer_entries(u32 begin, u32 end, struct filer_table *tab) | |
| 1291 | −{ | |
| 1292 | − int length; | |
| 1293 | − | |
| 1294 | − if (end > MAX_FILER_CACHE_IDX || end < begin) | |
| 1295 | − return -EINVAL; | |
| 1296 | − | |
| 1297 | − end++; | |
| 1298 | − length = end - begin; | |
| 1299 | − | |
| 1300 | − /* Copy */ | |
| 1301 | − while (end < tab->index) { | |
| 1302 | − tab->fe[begin].ctrl = tab->fe[end].ctrl; | |
| 1303 | − tab->fe[begin++].prop = tab->fe[end++].prop; | |
| 1304 | − | |
| 1305 | − } | |
| 1306 | − /* Fill up with don't cares */ | |
| 1307 | − while (begin < tab->index) { | |
| 1308 | − tab->fe[begin].ctrl = 0x60; | |
| 1309 | − tab->fe[begin].prop = 0xFFFFFFFF; | |
| 1310 | − begin++; | |
| 1311 | − } | |
| 1312 | − | |
| 1313 | − tab->index -= length; | |
| 1314 | − return 0; | |
| 1315 | −} | |
| 1316 | − | |
| 1317 | −/* Make space on the wanted location */ | |
| 1318 | −static int gfar_expand_filer_entries(u32 begin, u32 length, | |
| 1319 | − struct filer_table *tab) | |
| 1320 | −{ | |
| 1321 | − if (length == 0 || length + tab->index > MAX_FILER_CACHE_IDX || | |
| 1322 | − begin > MAX_FILER_CACHE_IDX) | |
| 1323 | − return -EINVAL; | |
| 1324 | − | |
| 1325 | − gfar_copy_filer_entries(&(tab->fe[begin + length]), &(tab->fe[begin]), | |
| 1326 | − tab->index - length + 1); | |
| 1327 | − | |
| 1328 | − tab->index += length; | |
| 1329 | − return 0; | |
| 1330 | −} | |
| 1331 | − | |
| 1332 | −static int gfar_get_next_cluster_start(int start, struct filer_table *tab) | |
| 1333 | −{ | |
| 1334 | − for (; (start < tab->index) && (start < MAX_FILER_CACHE_IDX - 1); | |
| 1335 | − start++) { | |
| 1336 | − if ((tab->fe[start].ctrl & (RQFCR_AND | RQFCR_CLE)) == | |
| 1337 | − (RQFCR_AND | RQFCR_CLE)) | |
| 1338 | − return start; | |
| 1339 | − } | |
| 1340 | − return -1; | |
| 1341 | −} | |
| 1342 | − | |
| 1343 | −static int gfar_get_next_cluster_end(int start, struct filer_table *tab) | |
| 1344 | −{ | |
| 1345 | − for (; (start < tab->index) && (start < MAX_FILER_CACHE_IDX - 1); | |
| 1346 | − start++) { | |
| 1347 | − if ((tab->fe[start].ctrl & (RQFCR_AND | RQFCR_CLE)) == | |
| 1348 | − (RQFCR_CLE)) | |
| 1349 | − return start; | |
| 1350 | − } | |
| 1351 | − return -1; | |
| 1352 | −} | |
| 1353 | − | |
| 1354 | −/* Uses hardwares clustering option to reduce | |
| 1355 | − * the number of filer table entries | |
| 1356 | − */ | |
| 1357 | −static void gfar_cluster_filer(struct filer_table *tab) | |
| 1358 | −{ | |
| 1359 | − s32 i = -1, j, iend, jend; | |
| 1360 | − | |
| 1361 | − while ((i = gfar_get_next_cluster_start(++i, tab)) != -1) { | |
| 1362 | − j = i; | |
| 1363 | − while ((j = gfar_get_next_cluster_start(++j, tab)) != -1) { | |
| 1364 | − /* The cluster entries self and the previous one | |
| 1365 | − * (a mask) must be identical! | |
| 1366 | − */ | |
| 1367 | − if (tab->fe[i].ctrl != tab->fe[j].ctrl) | |
| 1368 | − break; | |
| 1369 | − if (tab->fe[i].prop != tab->fe[j].prop) | |
| 1370 | − break; | |
| 1371 | − if (tab->fe[i - 1].ctrl != tab->fe[j - 1].ctrl) | |
| 1372 | − break; | |
| 1373 | − if (tab->fe[i - 1].prop != tab->fe[j - 1].prop) | |
| 1374 | − break; | |
| 1375 | − iend = gfar_get_next_cluster_end(i, tab); | |
| 1376 | − jend = gfar_get_next_cluster_end(j, tab); | |
| 1377 | − if (jend == -1 || iend == -1) | |
| 1378 | − break; | |
| 1379 | − | |
| 1380 | − /* First we make some free space, where our cluster | |
| 1381 | − * element should be. Then we copy it there and finally | |
| 1382 | − * delete in from its old location. | |
| 1383 | − */ | |
| 1384 | − if (gfar_expand_filer_entries(iend, (jend - j), tab) == | |
| 1385 | − -EINVAL) | |
| 1386 | − break; | |
| 1387 | − | |
| 1388 | − gfar_copy_filer_entries(&(tab->fe[iend + 1]), | |
| 1389 | − &(tab->fe[jend + 1]), jend - j); | |
| 1390 | − | |
| 1391 | − if (gfar_trim_filer_entries(jend - 1, | |
| 1392 | − jend + (jend - j), | |
| 1393 | − tab) == -EINVAL) | |
| 1394 | − return; | |
| 1395 | − | |
| 1396 | − /* Mask out cluster bit */ | |
| 1397 | − tab->fe[iend].ctrl &= ~(RQFCR_CLE); | |
| 1398 | − } | |
| 1399 | − } | |
| 1400 | −} | |
| 1401 | − | |
| 1402 | −/* Swaps the masked bits of a1<>a2 and b1<>b2 */ | |
| 1403 | −static void gfar_swap_bits(struct gfar_filer_entry *a1, | |
| 1404 | − struct gfar_filer_entry *a2, | |
| 1405 | − struct gfar_filer_entry *b1, | |
| 1406 | − struct gfar_filer_entry *b2, u32 mask) | |
| 1407 | −{ | |
| 1408 | − u32 temp[4]; | |
| 1409 | − temp[0] = a1->ctrl & mask; | |
| 1410 | − temp[1] = a2->ctrl & mask; | |
| 1411 | − temp[2] = b1->ctrl & mask; | |
| 1412 | − temp[3] = b2->ctrl & mask; | |
| 1413 | − | |
| 1414 | − a1->ctrl &= ~mask; | |
| 1415 | − a2->ctrl &= ~mask; | |
| 1416 | − b1->ctrl &= ~mask; | |
| 1417 | − b2->ctrl &= ~mask; | |
| 1418 | − | |
| 1419 | − a1->ctrl |= temp[1]; | |
| 1420 | − a2->ctrl |= temp[0]; | |
| 1421 | − b1->ctrl |= temp[3]; | |
| 1422 | − b2->ctrl |= temp[2]; | |
| 1423 | −} | |
| 1424 | − | |
| 1425 | −/* Generate a list consisting of masks values with their start and | |
| 1426 | − * end of validity and block as indicator for parts belonging | |
| 1427 | − * together (glued by ANDs) in mask_table | |
| 1428 | − */ | |
| 1429 | −static u32 gfar_generate_mask_table(struct gfar_mask_entry *mask_table, | |
| 1430 | − struct filer_table *tab) | |
| 1431 | −{ | |
| 1432 | − u32 i, and_index = 0, block_index = 1; | |
| 1433 | − | |
| 1434 | − for (i = 0; i < tab->index; i++) { | |
| 1435 | − | |
| 1436 | − /* LSByte of control = 0 sets a mask */ | |
| 1437 | − if (!(tab->fe[i].ctrl & 0xF)) { | |
| 1438 | − mask_table[and_index].mask = tab->fe[i].prop; | |
| 1439 | − mask_table[and_index].start = i; | |
| 1440 | − mask_table[and_index].block = block_index; | |
| 1441 | − if (and_index >= 1) | |
| 1442 | − mask_table[and_index - 1].end = i - 1; | |
| 1443 | − and_index++; | |
| 1444 | − } | |
| 1445 | − /* cluster starts and ends will be separated because they should | |
| 1446 | − * hold their position | |
| 1447 | − */ | |
| 1448 | − if (tab->fe[i].ctrl & RQFCR_CLE) | |
| 1449 | − block_index++; | |
| 1450 | − /* A not set AND indicates the end of a depended block */ | |
| 1451 | − if (!(tab->fe[i].ctrl & RQFCR_AND)) | |
| 1452 | − block_index++; | |
| 1453 | − } | |
| 1454 | − | |
| 1455 | − mask_table[and_index - 1].end = i - 1; | |
| 1456 | − | |
| 1457 | − return and_index; | |
| 1458 | −} | |
| 1459 | − | |
| 1460 | −/* Sorts the entries of mask_table by the values of the masks. | |
| 1461 | − * Important: The 0xFF80 flags of the first and last entry of a | |
| 1462 | − * block must hold their position (which queue, CLusterEnable, ReJEct, | |
| 1463 | − * AND) | |
| 1464 | − */ | |
| 1465 | −static void gfar_sort_mask_table(struct gfar_mask_entry *mask_table, | |
| 1466 | − struct filer_table *temp_table, u32 and_index) | |
| 1467 | −{ | |
| 1468 | − /* Pointer to compare function (_asc or _desc) */ | |
| 1469 | − int (*gfar_comp)(const void *, const void *); | |
| 1470 | − | |
| 1471 | − u32 i, size = 0, start = 0, prev = 1; | |
| 1472 | − u32 old_first, old_last, new_first, new_last; | |
| 1473 | − | |
| 1474 | − gfar_comp = &gfar_comp_desc; | |
| 1475 | − | |
| 1476 | − for (i = 0; i < and_index; i++) { | |
| 1477 | − if (prev != mask_table[i].block) { | |
| 1478 | − old_first = mask_table[start].start + 1; | |
| 1479 | − old_last = mask_table[i - 1].end; | |
| 1480 | − sort(mask_table + start, size, | |
| 1481 | − sizeof(struct gfar_mask_entry), | |
| 1482 | − gfar_comp, &gfar_swap); | |
| 1483 | − | |
| 1484 | − /* Toggle order for every block. This makes the | |
| 1485 | − * thing more efficient! | |
| 1486 | − */ | |
| 1487 | − if (gfar_comp == gfar_comp_desc) | |
| 1488 | − gfar_comp = &gfar_comp_asc; | |
| 1489 | − else | |
| 1490 | − gfar_comp = &gfar_comp_desc; | |
| 1491 | − | |
| 1492 | − new_first = mask_table[start].start + 1; | |
| 1493 | − new_last = mask_table[i - 1].end; | |
| 1494 | − | |
| 1495 | − gfar_swap_bits(&temp_table->fe[new_first], | |
| 1496 | − &temp_table->fe[old_first], | |
| 1497 | − &temp_table->fe[new_last], | |
| 1498 | − &temp_table->fe[old_last], | |
| 1499 | − RQFCR_QUEUE | RQFCR_CLE | | |
| 1500 | − RQFCR_RJE | RQFCR_AND); | |
| 1501 | − | |
| 1502 | − start = i; | |
| 1503 | − size = 0; | |
| 1504 | − } | |
| 1505 | − size++; | |
| 1506 | − prev = mask_table[i].block; | |
| 1507 | − } | |
| 1508 | −} | |
| 1509 | − | |
| 1510 | −/* Reduces the number of masks needed in the filer table to save entries | |
| 1511 | − * This is done by sorting the masks of a depended block. A depended block is | |
| 1512 | − * identified by gluing ANDs or CLE. The sorting order toggles after every | |
| 1513 | − * block. Of course entries in scope of a mask must change their location with | |
| 1514 | − * it. | |
| 1515 | − */ | |
| 1516 | −static int gfar_optimize_filer_masks(struct filer_table *tab) | |
| 1517 | −{ | |
| 1518 | − struct filer_table *temp_table; | |
| 1519 | − struct gfar_mask_entry *mask_table; | |
| 1520 | − | |
| 1521 | − u32 and_index = 0, previous_mask = 0, i = 0, j = 0, size = 0; | |
| 1522 | − s32 ret = 0; | |
| 1523 | − | |
| 1524 | − /* We need a copy of the filer table because | |
| 1525 | − * we want to change its order | |
| 1526 | − */ | |
| 1527 | − temp_table = kmemdup(tab, sizeof(*temp_table), GFP_KERNEL); | |
| 1528 | − if (temp_table == NULL) | |
| 1529 | − return -ENOMEM; | |
| 1530 | − | |
| 1531 | − mask_table = kcalloc(MAX_FILER_CACHE_IDX / 2 + 1, | |
| 1532 | − sizeof(struct gfar_mask_entry), GFP_KERNEL); | |
| 1533 | − | |
| 1534 | − if (mask_table == NULL) { | |
| 1535 | − ret = -ENOMEM; | |
| 1536 | − goto end; | |
| 1537 | − } | |
| 1538 | − | |
| 1539 | − and_index = gfar_generate_mask_table(mask_table, tab); | |
| 1540 | − | |
| 1541 | − gfar_sort_mask_table(mask_table, temp_table, and_index); | |
| 1542 | − | |
| 1543 | − /* Now we can copy the data from our duplicated filer table to | |
| 1544 | − * the real one in the order the mask table says | |
| 1545 | − */ | |
| 1546 | − for (i = 0; i < and_index; i++) { | |
| 1547 | − size = mask_table[i].end - mask_table[i].start + 1; | |
| 1548 | − gfar_copy_filer_entries(&(tab->fe[j]), | |
| 1549 | − &(temp_table->fe[mask_table[i].start]), size); | |
| 1550 | − j += size; | |
| 1551 | − } | |
| 1552 | − | |
| 1553 | − /* And finally we just have to check for duplicated masks and drop the | |
| 1554 | − * second ones | |
| 1555 | − */ | |
| 1556 | − for (i = 0; i < tab->index && i < MAX_FILER_CACHE_IDX; i++) { | |
| 1557 | − if (tab->fe[i].ctrl == 0x80) { | |
| 1558 | − previous_mask = i++; | |
| 1559 | − break; | |
| 1560 | − } | |
| 1561 | − } | |
| 1562 | − for (; i < tab->index && i < MAX_FILER_CACHE_IDX; i++) { | |
| 1563 | − if (tab->fe[i].ctrl == 0x80) { | |
| 1564 | − if (tab->fe[i].prop == tab->fe[previous_mask].prop) { | |
| 1565 | − /* Two identical ones found! | |
| 1566 | − * So drop the second one! | |
| 1567 | − */ | |
| 1568 | − gfar_trim_filer_entries(i, i, tab); | |
| 1569 | − } else | |
| 1570 | − /* Not identical! */ | |
| 1571 | − previous_mask = i; | |
| 1572 | − } | |
| 1573 | − } | |
| 1574 | − | |
| 1575 | − kfree(mask_table); | |
| 1576 | −end: kfree(temp_table); | |
| 1577 | − return ret; | |
| 1578 | −} | |
| 1579 | − | |
| 1580 | 1252 | /* Write the bit-pattern from software's buffer to hardware registers */ |
| 1581 | 1253 | static int gfar_write_filer_table(struct gfar_private *priv, |
| 1582 | 1254 | struct filer_table *tab) |
| @@ -1586,11 +1258,10 @@ static int gfar_write_filer_table(struct gfar_private *priv, · 3 unmodified lines | ||
| 1586 | 1258 | return -EBUSY; |
| 1587 | 1259 | |
| 1588 | 1260 | /* Fill regular entries */ |
| 1589 | − for (; i < MAX_FILER_IDX - 1 && (tab->fe[i].ctrl | tab->fe[i].prop); | |
| 1590 | − i++) | |
| 1261 | + for (; i < MAX_FILER_IDX && (tab->fe[i].ctrl | tab->fe[i].prop); i++) | |
| 1591 | 1262 | gfar_write_filer(priv, i, tab->fe[i].ctrl, tab->fe[i].prop); |
| 1592 | 1263 | /* Fill the rest with fall-troughs */ |
| 1593 | − for (; i < MAX_FILER_IDX - 1; i++) | |
| 1264 | + for (; i < MAX_FILER_IDX; i++) | |
| 1594 | 1265 | gfar_write_filer(priv, i, 0x60, 0xFFFFFFFF); |
| 1595 | 1266 | /* Last entry must be default accept |
| 1596 | 1267 | * because that's what people expect |
| @@ -1624,7 +1295,6 @@ static int gfar_process_filer_changes(struct gfar_private *priv) · 27 unmodified lines | ||
| 1624 | 1295 | { |
| 1625 | 1296 | struct ethtool_flow_spec_container *j; |
| 1626 | 1297 | struct filer_table *tab; |
| 1627 | − s32 i = 0; | |
| 1628 | 1298 | s32 ret = 0; |
| 1629 | 1299 | |
| 1630 | 1300 | /* So index is set to zero, too! */ |
| @@ -1649,17 +1319,6 @@ static int gfar_process_filer_changes(struct gfar_private *priv) · 18 unmodified lines | ||
| 1649 | 1319 | } |
| 1650 | 1320 | } |
| 1651 | 1321 | |
| 1652 | − i = tab->index; | |
| 1653 | − | |
| 1654 | − /* Optimizations to save entries */ | |
| 1655 | − gfar_cluster_filer(tab); | |
| 1656 | − gfar_optimize_filer_masks(tab); | |
| 1657 | − | |
| 1658 | − pr_debug("\tSummary:\n" | |
| 1659 | − "\tData on hardware: %d\n" | |
| 1660 | − "\tCompression rate: %d%%\n", | |
| 1661 | − tab->index, 100 - (100 * tab->index) / i); | |
| 1662 | − | |
| 1663 | 1322 | /* Write everything to hardware */ |
| 1664 | 1323 | ret = gfar_write_filer_table(priv, tab); |
| 1665 | 1324 | if (ret == -EBUSY) { |
| @@ -1725,13 +1384,14 @@ static int gfar_add_cls(struct gfar_private *priv, · 59 unmodified lines | ||
| 1725 | 1384 | } |
| 1726 | 1385 | |
| 1727 | 1386 | process: |
| 1387 | + priv->rx_list.count++; | |
| 1728 | 1388 | ret = gfar_process_filer_changes(priv); |
| 1729 | 1389 | if (ret) |
| 1730 | 1390 | goto clean_list; |
| 1731 | − priv->rx_list.count++; | |
| 1732 | 1391 | return ret; |
| 1733 | 1392 | |
| 1734 | 1393 | clean_list: |
| 1394 | + priv->rx_list.count--; | |
| 1735 | 1395 | list_del(&temp->list); |
| 1736 | 1396 | clean_mem: |
| 1737 | 1397 | kfree(temp); |
| @@ -1462,7 +1462,7 @@ static int mvneta_rx(struct mvneta_port *pp, int rx_todo, · 1461 unmodified lines | ||
| 1462 | 1462 | struct mvneta_rx_queue *rxq) |
| 1463 | 1463 | { |
| 1464 | 1464 | struct net_device *dev = pp->dev; |
| 1465 | − int rx_done, rx_filled; | |
| 1465 | + int rx_done; | |
| 1466 | 1466 | u32 rcvd_pkts = 0; |
| 1467 | 1467 | u32 rcvd_bytes = 0; |
| 1468 | 1468 | |
| @@ -1473,7 +1473,6 @@ static int mvneta_rx(struct mvneta_port *pp, int rx_todo, · 4 unmodified lines | ||
| 1473 | 1473 | rx_todo = rx_done; |
| 1474 | 1474 | |
| 1475 | 1475 | rx_done = 0; |
| 1476 | − rx_filled = 0; | |
| 1477 | 1476 | |
| 1478 | 1477 | /* Fairness NAPI loop */ |
| 1479 | 1478 | while (rx_done < rx_todo) { |
| @@ -1484,7 +1483,6 @@ static int mvneta_rx(struct mvneta_port *pp, int rx_todo, · 4 unmodified lines | ||
| 1484 | 1483 | int rx_bytes, err; |
| 1485 | 1484 | |
| 1486 | 1485 | rx_done++; |
| 1487 | − rx_filled++; | |
| 1488 | 1486 | rx_status = rx_desc->status; |
| 1489 | 1487 | rx_bytes = rx_desc->data_size - (ETH_FCS_LEN + MVNETA_MH_SIZE); |
| 1490 | 1488 | data = (unsigned char *)rx_desc->buf_cookie; |
| @@ -1524,6 +1522,14 @@ static int mvneta_rx(struct mvneta_port *pp, int rx_todo, · 33 unmodified lines | ||
| 1524 | 1522 | continue; |
| 1525 | 1523 | } |
| 1526 | 1524 | |
| 1525 | + /* Refill processing */ | |
| 1526 | + err = mvneta_rx_refill(pp, rx_desc); | |
| 1527 | + if (err) { | |
| 1528 | + netdev_err(dev, "Linux processing - Can't refill\n"); | |
| 1529 | + rxq->missed++; | |
| 1530 | + goto err_drop_frame; | |
| 1531 | + } | |
| 1532 | + | |
| 1527 | 1533 | skb = build_skb(data, pp->frag_size > PAGE_SIZE ? 0 : pp->frag_size); |
| 1528 | 1534 | if (!skb) |
| 1529 | 1535 | goto err_drop_frame; |
| @@ -1543,14 +1549,6 @@ static int mvneta_rx(struct mvneta_port *pp, int rx_todo, · 13 unmodified lines | ||
| 1543 | 1549 | mvneta_rx_csum(pp, rx_status, skb); |
| 1544 | 1550 | |
| 1545 | 1551 | napi_gro_receive(&pp->napi, skb); |
| 1546 | − | |
| 1547 | − /* Refill processing */ | |
| 1548 | − err = mvneta_rx_refill(pp, rx_desc); | |
| 1549 | − if (err) { | |
| 1550 | − netdev_err(dev, "Linux processing - Can't refill\n"); | |
| 1551 | − rxq->missed++; | |
| 1552 | − rx_filled--; | |
| 1553 | − } | |
| 1554 | 1552 | } |
| 1555 | 1553 | |
| 1556 | 1554 | if (rcvd_pkts) { |
| @@ -1563,7 +1561,7 @@ static int mvneta_rx(struct mvneta_port *pp, int rx_todo, · 6 unmodified lines | ||
| 1563 | 1561 | } |
| 1564 | 1562 | |
| 1565 | 1563 | /* Update rxq management counters */ |
| 1566 | − mvneta_rxq_desc_num_update(pp, rxq, rx_done, rx_filled); | |
| 1564 | + mvneta_rxq_desc_num_update(pp, rxq, rx_done, rx_done); | |
| 1567 | 1565 | |
| 1568 | 1566 | return rx_done; |
| 1569 | 1567 | } |
| @@ -27,6 +27,8 @@ · 26 unmodified lines | ||
| 27 | 27 | #include <linux/of_address.h> |
| 28 | 28 | #include <linux/phy.h> |
| 29 | 29 | #include <linux/clk.h> |
| 30 | +#include <linux/hrtimer.h> | |
| 31 | +#include <linux/ktime.h> | |
| 30 | 32 | #include <uapi/linux/ppp_defs.h> |
| 31 | 33 | #include <net/ip.h> |
| 32 | 34 | #include <net/ipv6.h> |
| @@ -299,6 +301,7 @@ · 266 unmodified lines | ||
| 299 | 301 | |
| 300 | 302 | /* Coalescing */ |
| 301 | 303 | #define MVPP2_TXDONE_COAL_PKTS_THRESH 15 |
| 304 | +#define MVPP2_TXDONE_HRTIMER_PERIOD_NS 1000000UL | |
| 302 | 305 | #define MVPP2_RX_COAL_PKTS 32 |
| 303 | 306 | #define MVPP2_RX_COAL_USEC 100 |
| 304 | 307 | |
| @@ -660,6 +663,14 @@ struct mvpp2_pcpu_stats { · 355 unmodified lines | ||
| 660 | 663 | u64 tx_bytes; |
| 661 | 664 | }; |
| 662 | 665 | |
| 666 | +/* Per-CPU port control */ | |
| 667 | +struct mvpp2_port_pcpu { | |
| 668 | + struct hrtimer tx_done_timer; | |
| 669 | + bool timer_scheduled; | |
| 670 | + /* Tasklet for egress finalization */ | |
| 671 | + struct tasklet_struct tx_done_tasklet; | |
| 672 | +}; | |
| 673 | + | |
| 663 | 674 | struct mvpp2_port { |
| 664 | 675 | u8 id; |
| 665 | 676 | |
| @@ -679,6 +690,9 @@ struct mvpp2_port { · 13 unmodified lines | ||
| 679 | 690 | u32 pending_cause_rx; |
| 680 | 691 | struct napi_struct napi; |
| 681 | 692 | |
| 693 | + /* Per-CPU port control */ | |
| 694 | + struct mvpp2_port_pcpu __percpu *pcpu; | |
| 695 | + | |
| 682 | 696 | /* Flags */ |
| 683 | 697 | unsigned long flags; |
| 684 | 698 | |
| @@ -776,6 +790,9 @@ struct mvpp2_txq_pcpu { · 91 unmodified lines | ||
| 776 | 790 | /* Array of transmitted skb */ |
| 777 | 791 | struct sk_buff **tx_skb; |
| 778 | 792 | |
| 793 | + /* Array of transmitted buffers' physical addresses */ | |
| 794 | + dma_addr_t *tx_buffs; | |
| 795 | + | |
| 779 | 796 | /* Index of last TX DMA descriptor that was inserted */ |
| 780 | 797 | int txq_put_index; |
| 781 | 798 | |
| @@ -913,8 +930,6 @@ struct mvpp2_bm_pool { · 131 unmodified lines | ||
| 913 | 930 | /* Occupied buffers indicator */ |
| 914 | 931 | atomic_t in_use; |
| 915 | 932 | int in_use_thresh; |
| 916 | − | |
| 917 | − spinlock_t lock; | |
| 918 | 933 | }; |
| 919 | 934 | |
| 920 | 935 | struct mvpp2_buff_hdr { |
| @@ -963,9 +978,13 @@ static void mvpp2_txq_inc_get(struct mvpp2_txq_pcpu *txq_pcpu) · 42 unmodified lines | ||
| 963 | 978 | } |
| 964 | 979 | |
| 965 | 980 | static void mvpp2_txq_inc_put(struct mvpp2_txq_pcpu *txq_pcpu, |
| 966 | − struct sk_buff *skb) | |
| 981 | + struct sk_buff *skb, | |
| 982 | + struct mvpp2_tx_desc *tx_desc) | |
| 967 | 983 | { |
| 968 | 984 | txq_pcpu->tx_skb[txq_pcpu->txq_put_index] = skb; |
| 985 | + if (skb) | |
| 986 | + txq_pcpu->tx_buffs[txq_pcpu->txq_put_index] = | |
| 987 | + tx_desc->buf_phys_addr; | |
| 969 | 988 | txq_pcpu->txq_put_index++; |
| 970 | 989 | if (txq_pcpu->txq_put_index == txq_pcpu->size) |
| 971 | 990 | txq_pcpu->txq_put_index = 0; |
| @@ -3376,7 +3395,6 @@ static int mvpp2_bm_pool_create(struct platform_device *pdev, · 2404 unmodified lines | ||
| 3376 | 3395 | bm_pool->pkt_size = 0; |
| 3377 | 3396 | bm_pool->buf_num = 0; |
| 3378 | 3397 | atomic_set(&bm_pool->in_use, 0); |
| 3379 | − spin_lock_init(&bm_pool->lock); | |
| 3380 | 3398 | |
| 3381 | 3399 | return 0; |
| 3382 | 3400 | } |
| @@ -3647,7 +3665,6 @@ static struct mvpp2_bm_pool * · 264 unmodified lines | ||
| 3647 | 3665 | mvpp2_bm_pool_use(struct mvpp2_port *port, int pool, enum mvpp2_bm_type type, |
| 3648 | 3666 | int pkt_size) |
| 3649 | 3667 | { |
| 3650 | − unsigned long flags = 0; | |
| 3651 | 3668 | struct mvpp2_bm_pool *new_pool = &port->priv->bm_pools[pool]; |
| 3652 | 3669 | int num; |
| 3653 | 3670 | |
| @@ -3656,8 +3673,6 @@ mvpp2_bm_pool_use(struct mvpp2_port *port, int pool, enum mvpp2_bm_type type, · 2 unmodified lines | ||
| 3656 | 3673 | return NULL; |
| 3657 | 3674 | } |
| 3658 | 3675 | |
| 3659 | − spin_lock_irqsave(&new_pool->lock, flags); | |
| 3660 | − | |
| 3661 | 3676 | if (new_pool->type == MVPP2_BM_FREE) |
| 3662 | 3677 | new_pool->type = type; |
| 3663 | 3678 | |
| @@ -3686,8 +3701,6 @@ mvpp2_bm_pool_use(struct mvpp2_port *port, int pool, enum mvpp2_bm_type type, · 22 unmodified lines | ||
| 3686 | 3701 | if (num != pkts_num) { |
| 3687 | 3702 | WARN(1, "pool %d: %d of %d allocated\n", |
| 3688 | 3703 | new_pool->id, num, pkts_num); |
| 3689 | − /* We need to undo the bufs_add() allocations */ | |
| 3690 | − spin_unlock_irqrestore(&new_pool->lock, flags); | |
| 3691 | 3704 | return NULL; |
| 3692 | 3705 | } |
| 3693 | 3706 | } |
| @@ -3695,15 +3708,12 @@ mvpp2_bm_pool_use(struct mvpp2_port *port, int pool, enum mvpp2_bm_type type, · 1 unmodified line | ||
| 3695 | 3708 | mvpp2_bm_pool_bufsize_set(port->priv, new_pool, |
| 3696 | 3709 | MVPP2_RX_BUF_SIZE(new_pool->pkt_size)); |
| 3697 | 3710 | |
| 3698 | − spin_unlock_irqrestore(&new_pool->lock, flags); | |
| 3699 | − | |
| 3700 | 3711 | return new_pool; |
| 3701 | 3712 | } |
| 3702 | 3713 | |
| 3703 | 3714 | /* Initialize pools for swf */ |
| 3704 | 3715 | static int mvpp2_swf_bm_pool_init(struct mvpp2_port *port) |
| 3705 | 3716 | { |
| 3706 | − unsigned long flags = 0; | |
| 3707 | 3717 | int rxq; |
| 3708 | 3718 | |
| 3709 | 3719 | if (!port->pool_long) { |
| @@ -3714,9 +3724,7 @@ static int mvpp2_swf_bm_pool_init(struct mvpp2_port *port) · 4 unmodified lines | ||
| 3714 | 3724 | if (!port->pool_long) |
| 3715 | 3725 | return -ENOMEM; |
| 3716 | 3726 | |
| 3717 | − spin_lock_irqsave(&port->pool_long->lock, flags); | |
| 3718 | 3727 | port->pool_long->port_map |= (1 << port->id); |
| 3719 | − spin_unlock_irqrestore(&port->pool_long->lock, flags); | |
| 3720 | 3728 | |
| 3721 | 3729 | for (rxq = 0; rxq < rxq_number; rxq++) |
| 3722 | 3730 | mvpp2_rxq_long_pool_set(port, rxq, port->pool_long->id); |
| @@ -3730,9 +3738,7 @@ static int mvpp2_swf_bm_pool_init(struct mvpp2_port *port) · 7 unmodified lines | ||
| 3730 | 3738 | if (!port->pool_short) |
| 3731 | 3739 | return -ENOMEM; |
| 3732 | 3740 | |
| 3733 | − spin_lock_irqsave(&port->pool_short->lock, flags); | |
| 3734 | 3741 | port->pool_short->port_map |= (1 << port->id); |
| 3735 | − spin_unlock_irqrestore(&port->pool_short->lock, flags); | |
| 3736 | 3742 | |
| 3737 | 3743 | for (rxq = 0; rxq < rxq_number; rxq++) |
| 3738 | 3744 | mvpp2_rxq_short_pool_set(port, rxq, |
| @@ -3806,7 +3812,6 @@ static void mvpp2_interrupts_unmask(void *arg) · 67 unmodified lines | ||
| 3806 | 3812 | |
| 3807 | 3813 | mvpp2_write(port->priv, MVPP2_ISR_RX_TX_MASK_REG(port->id), |
| 3808 | 3814 | (MVPP2_CAUSE_MISC_SUM_MASK | |
| 3809 | − MVPP2_CAUSE_TXQ_OCCUP_DESC_ALL_MASK | | |
| 3810 | 3815 | MVPP2_CAUSE_RXQ_OCCUP_DESC_ALL_MASK)); |
| 3811 | 3816 | } |
| 3812 | 3817 | |
| @@ -4382,23 +4387,6 @@ static void mvpp2_rx_time_coal_set(struct mvpp2_port *port, · 569 unmodified lines | ||
| 4382 | 4387 | rxq->time_coal = usec; |
| 4383 | 4388 | } |
| 4384 | 4389 | |
| 4385 | −/* Set threshold for TX_DONE pkts coalescing */ | |
| 4386 | −static void mvpp2_tx_done_pkts_coal_set(void *arg) | |
| 4387 | −{ | |
| 4388 | − struct mvpp2_port *port = arg; | |
| 4389 | − int queue; | |
| 4390 | − u32 val; | |
| 4391 | − | |
| 4392 | − for (queue = 0; queue < txq_number; queue++) { | |
| 4393 | − struct mvpp2_tx_queue *txq = port->txqs[queue]; | |
| 4394 | − | |
| 4395 | − val = (txq->done_pkts_coal << MVPP2_TRANSMITTED_THRESH_OFFSET) & | |
| 4396 | − MVPP2_TRANSMITTED_THRESH_MASK; | |
| 4397 | − mvpp2_write(port->priv, MVPP2_TXQ_NUM_REG, txq->id); | |
| 4398 | − mvpp2_write(port->priv, MVPP2_TXQ_THRESH_REG, val); | |
| 4399 | − } | |
| 4400 | −} | |
| 4401 | − | |
| 4402 | 4390 | /* Free Tx queue skbuffs */ |
| 4403 | 4391 | static void mvpp2_txq_bufs_free(struct mvpp2_port *port, |
| 4404 | 4392 | struct mvpp2_tx_queue *txq, |
| @@ -4407,8 +4395,8 @@ static void mvpp2_txq_bufs_free(struct mvpp2_port *port, · 2 unmodified lines | ||
| 4407 | 4395 | int i; |
| 4408 | 4396 | |
| 4409 | 4397 | for (i = 0; i < num; i++) { |
| 4410 | − struct mvpp2_tx_desc *tx_desc = txq->descs + | |
| 4411 | − txq_pcpu->txq_get_index; | |
| 4398 | + dma_addr_t buf_phys_addr = | |
| 4399 | + txq_pcpu->tx_buffs[txq_pcpu->txq_get_index]; | |
| 4412 | 4400 | struct sk_buff *skb = txq_pcpu->tx_skb[txq_pcpu->txq_get_index]; |
| 4413 | 4401 | |
| 4414 | 4402 | mvpp2_txq_inc_get(txq_pcpu); |
| @@ -4416,8 +4404,8 @@ static void mvpp2_txq_bufs_free(struct mvpp2_port *port, · 1 unmodified line | ||
| 4416 | 4404 | if (!skb) |
| 4417 | 4405 | continue; |
| 4418 | 4406 | |
| 4419 | − dma_unmap_single(port->dev->dev.parent, tx_desc->buf_phys_addr, | |
| 4420 | − tx_desc->data_size, DMA_TO_DEVICE); | |
| 4407 | + dma_unmap_single(port->dev->dev.parent, buf_phys_addr, | |
| 4408 | + skb_headlen(skb), DMA_TO_DEVICE); | |
| 4421 | 4409 | dev_kfree_skb_any(skb); |
| 4422 | 4410 | } |
| 4423 | 4411 | } |
| @@ -4433,7 +4421,7 @@ static inline struct mvpp2_rx_queue *mvpp2_get_rx_queue(struct mvpp2_port *port, · 9 unmodified lines | ||
| 4433 | 4421 | static inline struct mvpp2_tx_queue *mvpp2_get_tx_queue(struct mvpp2_port *port, |
| 4434 | 4422 | u32 cause) |
| 4435 | 4423 | { |
| 4436 | − int queue = fls(cause >> 16) - 1; | |
| 4424 | + int queue = fls(cause) - 1; | |
| 4437 | 4425 | |
| 4438 | 4426 | return port->txqs[queue]; |
| 4439 | 4427 | } |
| @@ -4460,6 +4448,29 @@ static void mvpp2_txq_done(struct mvpp2_port *port, struct mvpp2_tx_queue *txq, · 20 unmodified lines | ||
| 4460 | 4448 | netif_tx_wake_queue(nq); |
| 4461 | 4449 | } |
| 4462 | 4450 | |
| 4451 | +static unsigned int mvpp2_tx_done(struct mvpp2_port *port, u32 cause) | |
| 4452 | +{ | |
| 4453 | + struct mvpp2_tx_queue *txq; | |
| 4454 | + struct mvpp2_txq_pcpu *txq_pcpu; | |
| 4455 | + unsigned int tx_todo = 0; | |
| 4456 | + | |
| 4457 | + while (cause) { | |
| 4458 | + txq = mvpp2_get_tx_queue(port, cause); | |
| 4459 | + if (!txq) | |
| 4460 | + break; | |
| 4461 | + | |
| 4462 | + txq_pcpu = this_cpu_ptr(txq->pcpu); | |
| 4463 | + | |
| 4464 | + if (txq_pcpu->count) { | |
| 4465 | + mvpp2_txq_done(port, txq, txq_pcpu); | |
| 4466 | + tx_todo += txq_pcpu->count; | |
| 4467 | + } | |
| 4468 | + | |
| 4469 | + cause &= ~(1 << txq->log_id); | |
| 4470 | + } | |
| 4471 | + return tx_todo; | |
| 4472 | +} | |
| 4473 | + | |
| 4463 | 4474 | /* Rx/Tx queue initialization/cleanup methods */ |
| 4464 | 4475 | |
| 4465 | 4476 | /* Allocate and initialize descriptors for aggr TXQ */ |
| @@ -4649,12 +4660,13 @@ static int mvpp2_txq_init(struct mvpp2_port *port, · 183 unmodified lines | ||
| 4649 | 4660 | txq_pcpu->tx_skb = kmalloc(txq_pcpu->size * |
| 4650 | 4661 | sizeof(*txq_pcpu->tx_skb), |
| 4651 | 4662 | GFP_KERNEL); |
| 4652 | − if (!txq_pcpu->tx_skb) { | |
| 4653 | − dma_free_coherent(port->dev->dev.parent, | |
| 4654 | − txq->size * MVPP2_DESC_ALIGNED_SIZE, | |
| 4655 | − txq->descs, txq->descs_phys); | |
| 4656 | − return -ENOMEM; | |
| 4657 | − } | |
| 4663 | + if (!txq_pcpu->tx_skb) | |
| 4664 | + goto error; | |
| 4665 | + | |
| 4666 | + txq_pcpu->tx_buffs = kmalloc(txq_pcpu->size * | |
| 4667 | + sizeof(dma_addr_t), GFP_KERNEL); | |
| 4668 | + if (!txq_pcpu->tx_buffs) | |
| 4669 | + goto error; | |
| 4658 | 4670 | |
| 4659 | 4671 | txq_pcpu->count = 0; |
| 4660 | 4672 | txq_pcpu->reserved_num = 0; |
| @@ -4663,6 +4675,19 @@ static int mvpp2_txq_init(struct mvpp2_port *port, · 2 unmodified lines | ||
| 4663 | 4675 | } |
| 4664 | 4676 | |
| 4665 | 4677 | return 0; |
| 4678 | + | |
| 4679 | +error: | |
| 4680 | + for_each_present_cpu(cpu) { | |
| 4681 | + txq_pcpu = per_cpu_ptr(txq->pcpu, cpu); | |
| 4682 | + kfree(txq_pcpu->tx_skb); | |
| 4683 | + kfree(txq_pcpu->tx_buffs); | |
| 4684 | + } | |
| 4685 | + | |
| 4686 | + dma_free_coherent(port->dev->dev.parent, | |
| 4687 | + txq->size * MVPP2_DESC_ALIGNED_SIZE, | |
| 4688 | + txq->descs, txq->descs_phys); | |
| 4689 | + | |
| 4690 | + return -ENOMEM; | |
| 4666 | 4691 | } |
| 4667 | 4692 | |
| 4668 | 4693 | /* Free allocated TXQ resources */ |
| @@ -4675,6 +4700,7 @@ static void mvpp2_txq_deinit(struct mvpp2_port *port, · 6 unmodified lines | ||
| 4675 | 4700 | for_each_present_cpu(cpu) { |
| 4676 | 4701 | txq_pcpu = per_cpu_ptr(txq->pcpu, cpu); |
| 4677 | 4702 | kfree(txq_pcpu->tx_skb); |
| 4703 | + kfree(txq_pcpu->tx_buffs); | |
| 4678 | 4704 | } |
| 4679 | 4705 | |
| 4680 | 4706 | if (txq->descs) |
| @@ -4805,7 +4831,6 @@ static int mvpp2_setup_txqs(struct mvpp2_port *port) · 124 unmodified lines | ||
| 4805 | 4831 | goto err_cleanup; |
| 4806 | 4832 | } |
| 4807 | 4833 | |
| 4808 | − on_each_cpu(mvpp2_tx_done_pkts_coal_set, port, 1); | |
| 4809 | 4834 | on_each_cpu(mvpp2_txq_sent_counter_clear, port, 1); |
| 4810 | 4835 | return 0; |
| 4811 | 4836 | |
| @@ -4887,6 +4912,49 @@ static void mvpp2_link_event(struct net_device *dev) · 75 unmodified lines | ||
| 4887 | 4912 | } |
| 4888 | 4913 | } |
| 4889 | 4914 | |
| 4915 | +static void mvpp2_timer_set(struct mvpp2_port_pcpu *port_pcpu) | |
| 4916 | +{ | |
| 4917 | + ktime_t interval; | |
| 4918 | + | |
| 4919 | + if (!port_pcpu->timer_scheduled) { | |
| 4920 | + port_pcpu->timer_scheduled = true; | |
| 4921 | + interval = ktime_set(0, MVPP2_TXDONE_HRTIMER_PERIOD_NS); | |
| 4922 | + hrtimer_start(&port_pcpu->tx_done_timer, interval, | |
| 4923 | + HRTIMER_MODE_REL_PINNED); | |
| 4924 | + } | |
| 4925 | +} | |
| 4926 | + | |
| 4927 | +static void mvpp2_tx_proc_cb(unsigned long data) | |
| 4928 | +{ | |
| 4929 | + struct net_device *dev = (struct net_device *)data; | |
| 4930 | + struct mvpp2_port *port = netdev_priv(dev); | |
| 4931 | + struct mvpp2_port_pcpu *port_pcpu = this_cpu_ptr(port->pcpu); | |
| 4932 | + unsigned int tx_todo, cause; | |
| 4933 | + | |
| 4934 | + if (!netif_running(dev)) | |
| 4935 | + return; | |
| 4936 | + port_pcpu->timer_scheduled = false; | |
| 4937 | + | |
| 4938 | + /* Process all the Tx queues */ | |
| 4939 | + cause = (1 << txq_number) - 1; | |
| 4940 | + tx_todo = mvpp2_tx_done(port, cause); | |
| 4941 | + | |
| 4942 | + /* Set the timer in case not all the packets were processed */ | |
| 4943 | + if (tx_todo) | |
| 4944 | + mvpp2_timer_set(port_pcpu); | |
| 4945 | +} | |
| 4946 | + | |
| 4947 | +static enum hrtimer_restart mvpp2_hr_timer_cb(struct hrtimer *timer) | |
| 4948 | +{ | |
| 4949 | + struct mvpp2_port_pcpu *port_pcpu = container_of(timer, | |
| 4950 | + struct mvpp2_port_pcpu, | |
| 4951 | + tx_done_timer); | |
| 4952 | + | |
| 4953 | + tasklet_schedule(&port_pcpu->tx_done_tasklet); | |
| 4954 | + | |
| 4955 | + return HRTIMER_NORESTART; | |
| 4956 | +} | |
| 4957 | + | |
| 4890 | 4958 | /* Main RX/TX processing routines */ |
| 4891 | 4959 | |
| 4892 | 4960 | /* Display more error info */ |
| @@ -5144,11 +5212,11 @@ static int mvpp2_tx_frag_process(struct mvpp2_port *port, struct sk_buff *skb, · 251 unmodified lines | ||
| 5144 | 5212 | if (i == (skb_shinfo(skb)->nr_frags - 1)) { |
| 5145 | 5213 | /* Last descriptor */ |
| 5146 | 5214 | tx_desc->command = MVPP2_TXD_L_DESC; |
| 5147 | − mvpp2_txq_inc_put(txq_pcpu, skb); | |
| 5215 | + mvpp2_txq_inc_put(txq_pcpu, skb, tx_desc); | |
| 5148 | 5216 | } else { |
| 5149 | 5217 | /* Descriptor in the middle: Not First, Not Last */ |
| 5150 | 5218 | tx_desc->command = 0; |
| 5151 | − mvpp2_txq_inc_put(txq_pcpu, NULL); | |
| 5219 | + mvpp2_txq_inc_put(txq_pcpu, NULL, tx_desc); | |
| 5152 | 5220 | } |
| 5153 | 5221 | } |
| 5154 | 5222 | |
| @@ -5214,12 +5282,12 @@ static int mvpp2_tx(struct sk_buff *skb, struct net_device *dev) · 59 unmodified lines | ||
| 5214 | 5282 | /* First and Last descriptor */ |
| 5215 | 5283 | tx_cmd |= MVPP2_TXD_F_DESC | MVPP2_TXD_L_DESC; |
| 5216 | 5284 | tx_desc->command = tx_cmd; |
| 5217 | − mvpp2_txq_inc_put(txq_pcpu, skb); | |
| 5285 | + mvpp2_txq_inc_put(txq_pcpu, skb, tx_desc); | |
| 5218 | 5286 | } else { |
| 5219 | 5287 | /* First but not Last */ |
| 5220 | 5288 | tx_cmd |= MVPP2_TXD_F_DESC | MVPP2_TXD_PADDING_DISABLE; |
| 5221 | 5289 | tx_desc->command = tx_cmd; |
| 5222 | − mvpp2_txq_inc_put(txq_pcpu, NULL); | |
| 5290 | + mvpp2_txq_inc_put(txq_pcpu, NULL, tx_desc); | |
| 5223 | 5291 | |
| 5224 | 5292 | /* Continue with other skb fragments */ |
| 5225 | 5293 | if (mvpp2_tx_frag_process(port, skb, aggr_txq, txq)) { |
| @@ -5255,6 +5323,17 @@ out: · 29 unmodified lines | ||
| 5255 | 5323 | dev_kfree_skb_any(skb); |
| 5256 | 5324 | } |
| 5257 | 5325 | |
| 5326 | + /* Finalize TX processing */ | |
| 5327 | + if (txq_pcpu->count >= txq->done_pkts_coal) | |
| 5328 | + mvpp2_txq_done(port, txq, txq_pcpu); | |
| 5329 | + | |
| 5330 | + /* Set the timer in case not all frags were processed */ | |
| 5331 | + if (txq_pcpu->count <= frags && txq_pcpu->count > 0) { | |
| 5332 | + struct mvpp2_port_pcpu *port_pcpu = this_cpu_ptr(port->pcpu); | |
| 5333 | + | |
| 5334 | + mvpp2_timer_set(port_pcpu); | |
| 5335 | + } | |
| 5336 | + | |
| 5258 | 5337 | return NETDEV_TX_OK; |
| 5259 | 5338 | } |
| 5260 | 5339 | |
| @@ -5268,10 +5347,11 @@ static inline void mvpp2_cause_error(struct net_device *dev, int cause) · 7 unmodified lines | ||
| 5268 | 5347 | netdev_err(dev, "tx fifo underrun error\n"); |
| 5269 | 5348 | } |
| 5270 | 5349 | |
| 5271 | −static void mvpp2_txq_done_percpu(void *arg) | |
| 5350 | +static int mvpp2_poll(struct napi_struct *napi, int budget) | |
| 5272 | 5351 | { |
| 5273 | − struct mvpp2_port *port = arg; | |
| 5274 | − u32 cause_rx_tx, cause_tx, cause_misc; | |
| 5352 | + u32 cause_rx_tx, cause_rx, cause_misc; | |
| 5353 | + int rx_done = 0; | |
| 5354 | + struct mvpp2_port *port = netdev_priv(napi->dev); | |
| 5275 | 5355 | |
| 5276 | 5356 | /* Rx/Tx cause register |
| 5277 | 5357 | * |
| @@ -5285,7 +5365,7 @@ static void mvpp2_txq_done_percpu(void *arg) · 7 unmodified lines | ||
| 5285 | 5365 | */ |
| 5286 | 5366 | cause_rx_tx = mvpp2_read(port->priv, |
| 5287 | 5367 | MVPP2_ISR_RX_TX_CAUSE_REG(port->id)); |
| 5288 | − cause_tx = cause_rx_tx & MVPP2_CAUSE_TXQ_OCCUP_DESC_ALL_MASK; | |
| 5368 | + cause_rx_tx &= ~MVPP2_CAUSE_TXQ_OCCUP_DESC_ALL_MASK; | |
| 5289 | 5369 | cause_misc = cause_rx_tx & MVPP2_CAUSE_MISC_SUM_MASK; |
| 5290 | 5370 | |
| 5291 | 5371 | if (cause_misc) { |
| @@ -5297,26 +5377,6 @@ static void mvpp2_txq_done_percpu(void *arg) · 5 unmodified lines | ||
| 5297 | 5377 | cause_rx_tx & ~MVPP2_CAUSE_MISC_SUM_MASK); |
| 5298 | 5378 | } |
| 5299 | 5379 | |
| 5300 | − /* Release TX descriptors */ | |
| 5301 | − if (cause_tx) { | |
| 5302 | − struct mvpp2_tx_queue *txq = mvpp2_get_tx_queue(port, cause_tx); | |
| 5303 | − struct mvpp2_txq_pcpu *txq_pcpu = this_cpu_ptr(txq->pcpu); | |
| 5304 | − | |
| 5305 | − if (txq_pcpu->count) | |
| 5306 | − mvpp2_txq_done(port, txq, txq_pcpu); | |
| 5307 | − } | |
| 5308 | −} | |
| 5309 | − | |
| 5310 | −static int mvpp2_poll(struct napi_struct *napi, int budget) | |
| 5311 | −{ | |
| 5312 | − u32 cause_rx_tx, cause_rx; | |
| 5313 | − int rx_done = 0; | |
| 5314 | − struct mvpp2_port *port = netdev_priv(napi->dev); | |
| 5315 | − | |
| 5316 | − on_each_cpu(mvpp2_txq_done_percpu, port, 1); | |
| 5317 | − | |
| 5318 | − cause_rx_tx = mvpp2_read(port->priv, | |
| 5319 | − MVPP2_ISR_RX_TX_CAUSE_REG(port->id)); | |
| 5320 | 5380 | cause_rx = cause_rx_tx & MVPP2_CAUSE_RXQ_OCCUP_DESC_ALL_MASK; |
| 5321 | 5381 | |
| 5322 | 5382 | /* Process RX packets */ |
| @@ -5561,6 +5621,8 @@ err_cleanup_rxqs: · 238 unmodified lines | ||
| 5561 | 5621 | static int mvpp2_stop(struct net_device *dev) |
| 5562 | 5622 | { |
| 5563 | 5623 | struct mvpp2_port *port = netdev_priv(dev); |
| 5624 | + struct mvpp2_port_pcpu *port_pcpu; | |
| 5625 | + int cpu; | |
| 5564 | 5626 | |
| 5565 | 5627 | mvpp2_stop_dev(port); |
| 5566 | 5628 | mvpp2_phy_disconnect(port); |
| @@ -5569,6 +5631,13 @@ static int mvpp2_stop(struct net_device *dev) · 2 unmodified lines | ||
| 5569 | 5631 | on_each_cpu(mvpp2_interrupts_mask, port, 1); |
| 5570 | 5632 | |
| 5571 | 5633 | free_irq(port->irq, port); |
| 5634 | + for_each_present_cpu(cpu) { | |
| 5635 | + port_pcpu = per_cpu_ptr(port->pcpu, cpu); | |
| 5636 | + | |
| 5637 | + hrtimer_cancel(&port_pcpu->tx_done_timer); | |
| 5638 | + port_pcpu->timer_scheduled = false; | |
| 5639 | + tasklet_kill(&port_pcpu->tx_done_tasklet); | |
| 5640 | + } | |
| 5572 | 5641 | mvpp2_cleanup_rxqs(port); |
| 5573 | 5642 | mvpp2_cleanup_txqs(port); |
| 5574 | 5643 | |
| @@ -5784,7 +5853,6 @@ static int mvpp2_ethtool_set_coalesce(struct net_device *dev, · 209 unmodified lines | ||
| 5784 | 5853 | txq->done_pkts_coal = c->tx_max_coalesced_frames; |
| 5785 | 5854 | } |
| 5786 | 5855 | |
| 5787 | − on_each_cpu(mvpp2_tx_done_pkts_coal_set, port, 1); | |
| 5788 | 5856 | return 0; |
| 5789 | 5857 | } |
| 5790 | 5858 | |
| @@ -6035,6 +6103,7 @@ static int mvpp2_port_probe(struct platform_device *pdev, · 244 unmodified lines | ||
| 6035 | 6103 | { |
| 6036 | 6104 | struct device_node *phy_node; |
| 6037 | 6105 | struct mvpp2_port *port; |
| 6106 | + struct mvpp2_port_pcpu *port_pcpu; | |
| 6038 | 6107 | struct net_device *dev; |
| 6039 | 6108 | struct resource *res; |
| 6040 | 6109 | const char *dt_mac_addr; |
| @@ -6044,7 +6113,7 @@ static int mvpp2_port_probe(struct platform_device *pdev, · 3 unmodified lines | ||
| 6044 | 6113 | int features; |
| 6045 | 6114 | int phy_mode; |
| 6046 | 6115 | int priv_common_regs_num = 2; |
| 6047 | − int err, i; | |
| 6116 | + int err, i, cpu; | |
| 6048 | 6117 | |
| 6049 | 6118 | dev = alloc_etherdev_mqs(sizeof(struct mvpp2_port), txq_number, |
| 6050 | 6119 | rxq_number); |
| @@ -6135,6 +6204,24 @@ static int mvpp2_port_probe(struct platform_device *pdev, · 84 unmodified lines | ||
| 6135 | 6204 | } |
| 6136 | 6205 | mvpp2_port_power_up(port); |
| 6137 | 6206 | |
| 6207 | + port->pcpu = alloc_percpu(struct mvpp2_port_pcpu); | |
| 6208 | + if (!port->pcpu) { | |
| 6209 | + err = -ENOMEM; | |
| 6210 | + goto err_free_txq_pcpu; | |
| 6211 | + } | |
| 6212 | + | |
| 6213 | + for_each_present_cpu(cpu) { | |
| 6214 | + port_pcpu = per_cpu_ptr(port->pcpu, cpu); | |
| 6215 | + | |
| 6216 | + hrtimer_init(&port_pcpu->tx_done_timer, CLOCK_MONOTONIC, | |
| 6217 | + HRTIMER_MODE_REL_PINNED); | |
| 6218 | + port_pcpu->tx_done_timer.function = mvpp2_hr_timer_cb; | |
| 6219 | + port_pcpu->timer_scheduled = false; | |
| 6220 | + | |
| 6221 | + tasklet_init(&port_pcpu->tx_done_tasklet, mvpp2_tx_proc_cb, | |
| 6222 | + (unsigned long)dev); | |
| 6223 | + } | |
| 6224 | + | |
| 6138 | 6225 | netif_napi_add(dev, &port->napi, mvpp2_poll, NAPI_POLL_WEIGHT); |
| 6139 | 6226 | features = NETIF_F_SG | NETIF_F_IP_CSUM; |
| 6140 | 6227 | dev->features = features | NETIF_F_RXCSUM; |
| @@ -6144,7 +6231,7 @@ static int mvpp2_port_probe(struct platform_device *pdev, · 3 unmodified lines | ||
| 6144 | 6231 | err = register_netdev(dev); |
| 6145 | 6232 | if (err < 0) { |
| 6146 | 6233 | dev_err(&pdev->dev, "failed to register netdev\n"); |
| 6147 | − goto err_free_txq_pcpu; | |
| 6234 | + goto err_free_port_pcpu; | |
| 6148 | 6235 | } |
| 6149 | 6236 | netdev_info(dev, "Using %s mac address %pM\n", mac_from, dev->dev_addr); |
| 6150 | 6237 | |
| @@ -6153,6 +6240,8 @@ static int mvpp2_port_probe(struct platform_device *pdev, · 2 unmodified lines | ||
| 6153 | 6240 | priv->port_list[id] = port; |
| 6154 | 6241 | return 0; |
| 6155 | 6242 | |
| 6243 | +err_free_port_pcpu: | |
| 6244 | + free_percpu(port->pcpu); | |
| 6156 | 6245 | err_free_txq_pcpu: |
| 6157 | 6246 | for (i = 0; i < txq_number; i++) |
| 6158 | 6247 | free_percpu(port->txqs[i]->pcpu); |
| @@ -6171,6 +6260,7 @@ static void mvpp2_port_remove(struct mvpp2_port *port) · 12 unmodified lines | ||
| 6171 | 6260 | int i; |
| 6172 | 6261 | |
| 6173 | 6262 | unregister_netdev(port->dev); |
| 6263 | + free_percpu(port->pcpu); | |
| 6174 | 6264 | free_percpu(port->stats); |
| 6175 | 6265 | for (i = 0; i < txq_number; i++) |
| 6176 | 6266 | free_percpu(port->txqs[i]->pcpu); |
| @@ -686,6 +686,7 @@ static int mlx4_cmd_wait(struct mlx4_dev *dev, u64 in_param, u64 *out_param, · 685 unmodified lines | ||
| 686 | 686 | { |
| 687 | 687 | struct mlx4_cmd *cmd = &mlx4_priv(dev)->cmd; |
| 688 | 688 | struct mlx4_cmd_context *context; |
| 689 | + long ret_wait; | |
| 689 | 690 | int err = 0; |
| 690 | 691 | |
| 691 | 692 | down(&cmd->event_sem); |
| @@ -711,8 +712,20 @@ static int mlx4_cmd_wait(struct mlx4_dev *dev, u64 in_param, u64 *out_param, · 19 unmodified lines | ||
| 711 | 712 | if (err) |
| 712 | 713 | goto out_reset; |
| 713 | 714 | |
| 714 | − if (!wait_for_completion_timeout(&context->done, | |
| 715 | − msecs_to_jiffies(timeout))) { | |
| 715 | + if (op == MLX4_CMD_SENSE_PORT) { | |
| 716 | + ret_wait = | |
| 717 | + wait_for_completion_interruptible_timeout(&context->done, | |
| 718 | + msecs_to_jiffies(timeout)); | |
| 719 | + if (ret_wait < 0) { | |
| 720 | + context->fw_status = 0; | |
| 721 | + context->out_param = 0; | |
| 722 | + context->result = 0; | |
| 723 | + } | |
| 724 | + } else { | |
| 725 | + ret_wait = (long)wait_for_completion_timeout(&context->done, | |
| 726 | + msecs_to_jiffies(timeout)); | |
| 727 | + } | |
| 728 | + if (!ret_wait) { | |
| 716 | 729 | mlx4_warn(dev, "command 0x%x timed out (go bit not cleared)\n", |
| 717 | 730 | op); |
| 718 | 731 | if (op == MLX4_CMD_NOP) { |
| @@ -246,7 +246,6 @@ static int mlx4_en_prepare_rx_desc(struct mlx4_en_priv *priv, · 245 unmodified lines | ||
| 246 | 246 | |
| 247 | 247 | static inline bool mlx4_en_is_ring_empty(struct mlx4_en_rx_ring *ring) |
| 248 | 248 | { |
| 249 | − BUG_ON((u32)(ring->prod - ring->cons) > ring->actual_size); | |
| 250 | 249 | return ring->prod == ring->cons; |
| 251 | 250 | } |
| 252 | 251 | |
| @@ -601,7 +601,7 @@ static int mlx4_eq_int(struct mlx4_dev *dev, struct mlx4_eq *eq) · 600 unmodified lines | ||
| 601 | 601 | continue; |
| 602 | 602 | mlx4_dbg(dev, "%s: Sending MLX4_PORT_CHANGE_SUBTYPE_DOWN to slave: %d, port:%d\n", |
| 603 | 603 | __func__, i, port); |
| 604 | − s_info = &priv->mfunc.master.vf_oper[slave].vport[port].state; | |
| 604 | + s_info = &priv->mfunc.master.vf_oper[i].vport[port].state; | |
| 605 | 605 | if (IFLA_VF_LINK_STATE_AUTO == s_info->link_state) { |
| 606 | 606 | eqe->event.port_change.port = |
| 607 | 607 | cpu_to_be32( |
| @@ -640,7 +640,7 @@ static int mlx4_eq_int(struct mlx4_dev *dev, struct mlx4_eq *eq) · 32 unmodified lines | ||
| 640 | 640 | continue; |
| 641 | 641 | if (i == mlx4_master_func_num(dev)) |
| 642 | 642 | continue; |
| 643 | − s_info = &priv->mfunc.master.vf_oper[slave].vport[port].state; | |
| 643 | + s_info = &priv->mfunc.master.vf_oper[i].vport[port].state; | |
| 644 | 644 | if (IFLA_VF_LINK_STATE_AUTO == s_info->link_state) { |
| 645 | 645 | eqe->event.port_change.port = |
| 646 | 646 | cpu_to_be32( |
| @@ -2273,6 +2273,11 @@ static int mlx4_allocate_default_counters(struct mlx4_dev *dev) · 2272 unmodified lines | ||
| 2273 | 2273 | } else if (err == -ENOENT) { |
| 2274 | 2274 | err = 0; |
| 2275 | 2275 | continue; |
| 2276 | + } else if (mlx4_is_slave(dev) && err == -EINVAL) { | |
| 2277 | + priv->def_counter[port] = MLX4_SINK_COUNTER_INDEX(dev); | |
| 2278 | + mlx4_warn(dev, "can't allocate counter from old PF driver, using index %d\n", | |
| 2279 | + MLX4_SINK_COUNTER_INDEX(dev)); | |
| 2280 | + err = 0; | |
| 2276 | 2281 | } else { |
| 2277 | 2282 | mlx4_err(dev, "%s: failed to allocate default counter port %d err %d\n", |
| 2278 | 2283 | __func__, port + 1, err); |
| @@ -391,6 +391,8 @@ static int handle_hca_cap(struct mlx5_core_dev *dev) · 390 unmodified lines | ||
| 391 | 391 | /* disable cmdif checksum */ |
| 392 | 392 | MLX5_SET(cmd_hca_cap, set_hca_cap, cmdif_checksum, 0); |
| 393 | 393 | |
| 394 | + MLX5_SET(cmd_hca_cap, set_hca_cap, log_uar_page_sz, PAGE_SHIFT - 12); | |
| 395 | + | |
| 394 | 396 | err = set_caps(dev, set_ctx, set_sz); |
| 395 | 397 | |
| 396 | 398 | query_ex: |
| @@ -1415,7 +1415,7 @@ static int qlcnic_83xx_copy_fw_file(struct qlcnic_adapter *adapter) · 1414 unmodified lines | ||
| 1415 | 1415 | if (fw->size & 0xF) { |
| 1416 | 1416 | addr = dest + size; |
| 1417 | 1417 | for (i = 0; i < (fw->size & 0xF); i++) |
| 1418 | − data[i] = temp[size + i]; | |
| 1418 | + data[i] = ((u8 *)temp)[size + i]; | |
| 1419 | 1419 | for (; i < 16; i++) |
| 1420 | 1420 | data[i] = 0; |
| 1421 | 1421 | ret = qlcnic_ms_mem_write128(adapter, addr, |
| @@ -4875,10 +4875,12 @@ static void rtl_init_rxcfg(struct rtl8169_private *tp) · 4874 unmodified lines | ||
| 4875 | 4875 | case RTL_GIGA_MAC_VER_46: |
| 4876 | 4876 | case RTL_GIGA_MAC_VER_47: |
| 4877 | 4877 | case RTL_GIGA_MAC_VER_48: |
| 4878 | + RTL_W32(RxConfig, RX128_INT_EN | RX_DMA_BURST | RX_EARLY_OFF); | |
| 4879 | + break; | |
| 4878 | 4880 | case RTL_GIGA_MAC_VER_49: |
| 4879 | 4881 | case RTL_GIGA_MAC_VER_50: |
| 4880 | 4882 | case RTL_GIGA_MAC_VER_51: |
| 4881 | − RTL_W32(RxConfig, RX128_INT_EN | RX_DMA_BURST | RX_EARLY_OFF); | |
| 4883 | + RTL_W32(RxConfig, RX128_INT_EN | RX_MULTI_EN | RX_DMA_BURST | RX_EARLY_OFF); | |
| 4882 | 4884 | break; |
| 4883 | 4885 | default: |
| 4884 | 4886 | RTL_W32(RxConfig, RX128_INT_EN | RX_DMA_BURST); |
| @@ -228,9 +228,7 @@ static void ravb_ring_format(struct net_device *ndev, int q) · 227 unmodified lines | ||
| 228 | 228 | struct ravb_desc *desc = NULL; |
| 229 | 229 | int rx_ring_size = sizeof(*rx_desc) * priv->num_rx_ring[q]; |
| 230 | 230 | int tx_ring_size = sizeof(*tx_desc) * priv->num_tx_ring[q]; |
| 231 | − struct sk_buff *skb; | |
| 232 | 231 | dma_addr_t dma_addr; |
| 233 | − void *buffer; | |
| 234 | 232 | int i; |
| 235 | 233 | |
| 236 | 234 | priv->cur_rx[q] = 0; |
| @@ -241,41 +239,28 @@ static void ravb_ring_format(struct net_device *ndev, int q) · 4 unmodified lines | ||
| 241 | 239 | memset(priv->rx_ring[q], 0, rx_ring_size); |
| 242 | 240 | /* Build RX ring buffer */ |
| 243 | 241 | for (i = 0; i < priv->num_rx_ring[q]; i++) { |
| 244 | − priv->rx_skb[q][i] = NULL; | |
| 245 | − skb = netdev_alloc_skb(ndev, PKT_BUF_SZ + RAVB_ALIGN - 1); | |
| 246 | − if (!skb) | |
| 247 | − break; | |
| 248 | − ravb_set_buffer_align(skb); | |
| 249 | 242 | /* RX descriptor */ |
| 250 | 243 | rx_desc = &priv->rx_ring[q][i]; |
| 251 | 244 | /* The size of the buffer should be on 16-byte boundary. */ |
| 252 | 245 | rx_desc->ds_cc = cpu_to_le16(ALIGN(PKT_BUF_SZ, 16)); |
| 253 | − dma_addr = dma_map_single(&ndev->dev, skb->data, | |
| 246 | + dma_addr = dma_map_single(&ndev->dev, priv->rx_skb[q][i]->data, | |
| 254 | 247 | ALIGN(PKT_BUF_SZ, 16), |
| 255 | 248 | DMA_FROM_DEVICE); |
| 256 | − if (dma_mapping_error(&ndev->dev, dma_addr)) { | |
| 257 | − dev_kfree_skb(skb); | |
| 258 | − break; | |
| 259 | − } | |
| 260 | − priv->rx_skb[q][i] = skb; | |
| 249 | + /* We just set the data size to 0 for a failed mapping which | |
| 250 | + * should prevent DMA from happening... | |
| 251 | + */ | |
| 252 | + if (dma_mapping_error(&ndev->dev, dma_addr)) | |
| 253 | + rx_desc->ds_cc = cpu_to_le16(0); | |
| 261 | 254 | rx_desc->dptr = cpu_to_le32(dma_addr); |
| 262 | 255 | rx_desc->die_dt = DT_FEMPTY; |
| 263 | 256 | } |
| 264 | 257 | rx_desc = &priv->rx_ring[q][i]; |
| 265 | 258 | rx_desc->dptr = cpu_to_le32((u32)priv->rx_desc_dma[q]); |
| 266 | 259 | rx_desc->die_dt = DT_LINKFIX; /* type */ |
| 267 | − priv->dirty_rx[q] = (u32)(i - priv->num_rx_ring[q]); | |
| 268 | 260 | |
| 269 | 261 | memset(priv->tx_ring[q], 0, tx_ring_size); |
| 270 | 262 | /* Build TX ring buffer */ |
| 271 | 263 | for (i = 0; i < priv->num_tx_ring[q]; i++) { |
| 272 | − priv->tx_skb[q][i] = NULL; | |
| 273 | − priv->tx_buffers[q][i] = NULL; | |
| 274 | − buffer = kmalloc(PKT_BUF_SZ + RAVB_ALIGN - 1, GFP_KERNEL); | |
| 275 | − if (!buffer) | |
| 276 | − break; | |
| 277 | − /* Aligned TX buffer */ | |
| 278 | − priv->tx_buffers[q][i] = buffer; | |
| 279 | 264 | tx_desc = &priv->tx_ring[q][i]; |
| 280 | 265 | tx_desc->die_dt = DT_EEMPTY; |
| 281 | 266 | } |
| @@ -298,7 +283,10 @@ static void ravb_ring_format(struct net_device *ndev, int q) · 16 unmodified lines | ||
| 298 | 283 | static int ravb_ring_init(struct net_device *ndev, int q) |
| 299 | 284 | { |
| 300 | 285 | struct ravb_private *priv = netdev_priv(ndev); |
| 286 | + struct sk_buff *skb; | |
| 301 | 287 | int ring_size; |
| 288 | + void *buffer; | |
| 289 | + int i; | |
| 302 | 290 | |
| 303 | 291 | /* Allocate RX and TX skb rings */ |
| 304 | 292 | priv->rx_skb[q] = kcalloc(priv->num_rx_ring[q], |
| @@ -308,12 +296,28 @@ static int ravb_ring_init(struct net_device *ndev, int q) · 3 unmodified lines | ||
| 308 | 296 | if (!priv->rx_skb[q] || !priv->tx_skb[q]) |
| 309 | 297 | goto error; |
| 310 | 298 | |
| 299 | + for (i = 0; i < priv->num_rx_ring[q]; i++) { | |
| 300 | + skb = netdev_alloc_skb(ndev, PKT_BUF_SZ + RAVB_ALIGN - 1); | |
| 301 | + if (!skb) | |
| 302 | + goto error; | |
| 303 | + ravb_set_buffer_align(skb); | |
| 304 | + priv->rx_skb[q][i] = skb; | |
| 305 | + } | |
| 306 | + | |
| 311 | 307 | /* Allocate rings for the aligned buffers */ |
| 312 | 308 | priv->tx_buffers[q] = kcalloc(priv->num_tx_ring[q], |
| 313 | 309 | sizeof(*priv->tx_buffers[q]), GFP_KERNEL); |
| 314 | 310 | if (!priv->tx_buffers[q]) |
| 315 | 311 | goto error; |
| 316 | 312 | |
| 313 | + for (i = 0; i < priv->num_tx_ring[q]; i++) { | |
| 314 | + buffer = kmalloc(PKT_BUF_SZ + RAVB_ALIGN - 1, GFP_KERNEL); | |
| 315 | + if (!buffer) | |
| 316 | + goto error; | |
| 317 | + /* Aligned TX buffer */ | |
| 318 | + priv->tx_buffers[q][i] = buffer; | |
| 319 | + } | |
| 320 | + | |
| 317 | 321 | /* Allocate all RX descriptors. */ |
| 318 | 322 | ring_size = sizeof(struct ravb_ex_rx_desc) * (priv->num_rx_ring[q] + 1); |
| 319 | 323 | priv->rx_ring[q] = dma_alloc_coherent(NULL, ring_size, |
| @@ -524,6 +528,10 @@ static bool ravb_rx(struct net_device *ndev, int *quota, int q) · 204 unmodified lines | ||
| 524 | 528 | if (--boguscnt < 0) |
| 525 | 529 | break; |
| 526 | 530 | |
| 531 | + /* We use 0-byte descriptors to mark the DMA mapping errors */ | |
| 532 | + if (!pkt_len) | |
| 533 | + continue; | |
| 534 | + | |
| 527 | 535 | if (desc_status & MSC_MC) |
| 528 | 536 | stats->multicast++; |
| 529 | 537 | |
| @@ -543,10 +551,9 @@ static bool ravb_rx(struct net_device *ndev, int *quota, int q) · 13 unmodified lines | ||
| 543 | 551 | |
| 544 | 552 | skb = priv->rx_skb[q][entry]; |
| 545 | 553 | priv->rx_skb[q][entry] = NULL; |
| 546 | − dma_sync_single_for_cpu(&ndev->dev, | |
| 547 | − le32_to_cpu(desc->dptr), | |
| 548 | − ALIGN(PKT_BUF_SZ, 16), | |
| 549 | − DMA_FROM_DEVICE); | |
| 554 | + dma_unmap_single(&ndev->dev, le32_to_cpu(desc->dptr), | |
| 555 | + ALIGN(PKT_BUF_SZ, 16), | |
| 556 | + DMA_FROM_DEVICE); | |
| 550 | 557 | get_ts &= (q == RAVB_NC) ? |
| 551 | 558 | RAVB_RXTSTAMP_TYPE_V2_L2_EVENT : |
| 552 | 559 | ~RAVB_RXTSTAMP_TYPE_V2_L2_EVENT; |
| @@ -584,17 +591,15 @@ static bool ravb_rx(struct net_device *ndev, int *quota, int q) · 31 unmodified lines | ||
| 584 | 591 | if (!skb) |
| 585 | 592 | break; /* Better luck next round. */ |
| 586 | 593 | ravb_set_buffer_align(skb); |
| 587 | − dma_unmap_single(&ndev->dev, le32_to_cpu(desc->dptr), | |
| 588 | − ALIGN(PKT_BUF_SZ, 16), | |
| 589 | − DMA_FROM_DEVICE); | |
| 590 | 594 | dma_addr = dma_map_single(&ndev->dev, skb->data, |
| 591 | 595 | le16_to_cpu(desc->ds_cc), |
| 592 | 596 | DMA_FROM_DEVICE); |
| 593 | 597 | skb_checksum_none_assert(skb); |
| 594 | − if (dma_mapping_error(&ndev->dev, dma_addr)) { | |
| 595 | − dev_kfree_skb_any(skb); | |
| 596 | − break; | |
| 597 | − } | |
| 598 | + /* We just set the data size to 0 for a failed mapping | |
| 599 | + * which should prevent DMA from happening... | |
| 600 | + */ | |
| 601 | + if (dma_mapping_error(&ndev->dev, dma_addr)) | |
| 602 | + desc->ds_cc = cpu_to_le16(0); | |
| 598 | 603 | desc->dptr = cpu_to_le32(dma_addr); |
| 599 | 604 | priv->rx_skb[q][entry] = skb; |
| 600 | 605 | } |
| @@ -1279,7 +1284,6 @@ static netdev_tx_t ravb_start_xmit(struct sk_buff *skb, struct net_device *ndev) · 678 unmodified lines | ||
| 1279 | 1284 | u32 dma_addr; |
| 1280 | 1285 | void *buffer; |
| 1281 | 1286 | u32 entry; |
| 1282 | − u32 tccr; | |
| 1283 | 1287 | |
| 1284 | 1288 | spin_lock_irqsave(&priv->lock, flags); |
| 1285 | 1289 | if (priv->cur_tx[q] - priv->dirty_tx[q] >= priv->num_tx_ring[q]) { |
| @@ -1328,9 +1332,7 @@ static netdev_tx_t ravb_start_xmit(struct sk_buff *skb, struct net_device *ndev) · 42 unmodified lines | ||
| 1328 | 1332 | dma_wmb(); |
| 1329 | 1333 | desc->die_dt = DT_FSINGLE; |
| 1330 | 1334 | |
| 1331 | − tccr = ravb_read(ndev, TCCR); | |
| 1332 | − if (!(tccr & (TCCR_TSRQ0 << q))) | |
| 1333 | − ravb_write(ndev, tccr | (TCCR_TSRQ0 << q), TCCR); | |
| 1335 | + ravb_write(ndev, ravb_read(ndev, TCCR) | (TCCR_TSRQ0 << q), TCCR); | |
| 1334 | 1336 | |
| 1335 | 1337 | priv->cur_tx[q]++; |
| 1336 | 1338 | if (priv->cur_tx[q] - priv->dirty_tx[q] >= priv->num_tx_ring[q] && |
| @@ -4821,6 +4821,7 @@ static void rocker_remove_ports(const struct rocker *rocker) · 4820 unmodified lines | ||
| 4821 | 4821 | rocker_port_ig_tbl(rocker_port, SWITCHDEV_TRANS_NONE, |
| 4822 | 4822 | ROCKER_OP_FLAG_REMOVE); |
| 4823 | 4823 | unregister_netdev(rocker_port->dev); |
| 4824 | + free_netdev(rocker_port->dev); | |
| 4824 | 4825 | } |
| 4825 | 4826 | kfree(rocker->ports); |
| 4826 | 4827 | } |
| @@ -42,7 +42,7 @@ · 41 unmodified lines | ||
| 42 | 42 | #define NSS_COMMON_CLK_DIV_MASK 0x7f |
| 43 | 43 | |
| 44 | 44 | #define NSS_COMMON_CLK_SRC_CTRL 0x14 |
| 45 | −#define NSS_COMMON_CLK_SRC_CTRL_OFFSET(x) (1 << x) | |
| 45 | +#define NSS_COMMON_CLK_SRC_CTRL_OFFSET(x) (x) | |
| 46 | 46 | /* Mode is coded on 1 bit but is different depending on the MAC ID: |
| 47 | 47 | * MAC0: QSGMII=0 RGMII=1 |
| 48 | 48 | * MAC1: QSGMII=0 SGMII=0 RGMII=1 |
| @@ -291,7 +291,7 @@ static void *ipq806x_gmac_setup(struct platform_device *pdev) · 242 unmodified lines | ||
| 291 | 291 | |
| 292 | 292 | /* Configure the clock src according to the mode */ |
| 293 | 293 | regmap_read(gmac->nss_common, NSS_COMMON_CLK_SRC_CTRL, &val); |
| 294 | − val &= ~NSS_COMMON_CLK_SRC_CTRL_OFFSET(gmac->id); | |
| 294 | + val &= ~(1 << NSS_COMMON_CLK_SRC_CTRL_OFFSET(gmac->id)); | |
| 295 | 295 | switch (gmac->phy_mode) { |
| 296 | 296 | case PHY_INTERFACE_MODE_RGMII: |
| 297 | 297 | val |= NSS_COMMON_CLK_SRC_CTRL_RGMII(gmac->id) << |
| @@ -2843,7 +2843,7 @@ int stmmac_dvr_probe(struct device *device, · 2842 unmodified lines | ||
| 2843 | 2843 | if (res->mac) |
| 2844 | 2844 | memcpy(priv->dev->dev_addr, res->mac, ETH_ALEN); |
| 2845 | 2845 | |
| 2846 | − dev_set_drvdata(device, priv); | |
| 2846 | + dev_set_drvdata(device, priv->dev); | |
| 2847 | 2847 | |
| 2848 | 2848 | /* Verify driver arguments */ |
| 2849 | 2849 | stmmac_verify_args(); |
| @@ -413,3 +413,7 @@ static int stmmac_pltfr_resume(struct device *dev) · 412 unmodified lines | ||
| 413 | 413 | SIMPLE_DEV_PM_OPS(stmmac_pltfr_pm_ops, stmmac_pltfr_suspend, |
| 414 | 414 | stmmac_pltfr_resume); |
| 415 | 415 | EXPORT_SYMBOL_GPL(stmmac_pltfr_pm_ops); |
| 416 | + | |
| 417 | +MODULE_DESCRIPTION("STMMAC 10/100/1000 Ethernet platform support"); | |
| 418 | +MODULE_AUTHOR("Giuseppe Cavallaro <peppe.cavallaro@st.com>"); | |
| 419 | +MODULE_LICENSE("GPL"); | |
| @@ -6658,10 +6658,8 @@ static netdev_tx_t niu_start_xmit(struct sk_buff *skb, · 6657 unmodified lines | ||
| 6658 | 6658 | struct sk_buff *skb_new; |
| 6659 | 6659 | |
| 6660 | 6660 | skb_new = skb_realloc_headroom(skb, len); |
| 6661 | − if (!skb_new) { | |
| 6662 | − rp->tx_errors++; | |
| 6661 | + if (!skb_new) | |
| 6663 | 6662 | goto out_drop; |
| 6664 | − } | |
| 6665 | 6663 | kfree_skb(skb); |
| 6666 | 6664 | skb = skb_new; |
| 6667 | 6665 | } else |
| @@ -793,9 +793,7 @@ static irqreturn_t cpsw_rx_interrupt(int irq, void *dev_id) · 792 unmodified lines | ||
| 793 | 793 | static int cpsw_poll(struct napi_struct *napi, int budget) |
| 794 | 794 | { |
| 795 | 795 | struct cpsw_priv *priv = napi_to_priv(napi); |
| 796 | − int num_tx, num_rx; | |
| 797 | − | |
| 798 | − num_tx = cpdma_chan_process(priv->txch, 128); | |
| 796 | + int num_rx; | |
| 799 | 797 | |
| 800 | 798 | num_rx = cpdma_chan_process(priv->rxch, budget); |
| 801 | 799 | if (num_rx < budget) { |
| @@ -810,9 +808,8 @@ static int cpsw_poll(struct napi_struct *napi, int budget) · 8 unmodified lines | ||
| 810 | 808 | } |
| 811 | 809 | } |
| 812 | 810 | |
| 813 | − if (num_rx || num_tx) | |
| 814 | − cpsw_dbg(priv, intr, "poll %d rx, %d tx pkts\n", | |
| 815 | − num_rx, num_tx); | |
| 811 | + if (num_rx) | |
| 812 | + cpsw_dbg(priv, intr, "poll %d rx pkts\n", num_rx); | |
| 816 | 813 | |
| 817 | 814 | return num_rx; |
| 818 | 815 | } |
| @@ -85,7 +85,6 @@ struct netcp_intf { · 84 unmodified lines | ||
| 85 | 85 | struct list_head rxhook_list_head; |
| 86 | 86 | unsigned int rx_queue_id; |
| 87 | 87 | void *rx_fdq[KNAV_DMA_FDQ_PER_CHAN]; |
| 88 | − u32 rx_buffer_sizes[KNAV_DMA_FDQ_PER_CHAN]; | |
| 89 | 88 | struct napi_struct rx_napi; |
| 90 | 89 | struct napi_struct tx_napi; |
| 91 | 90 | |
| @@ -223,6 +222,7 @@ void *netcp_device_find_module(struct netcp_device *netcp_device, · 131 unmodified lines | ||
| 223 | 222 | |
| 224 | 223 | /* SGMII functions */ |
| 225 | 224 | int netcp_sgmii_reset(void __iomem *sgmii_ofs, int port); |
| 225 | +bool netcp_sgmii_rtreset(void __iomem *sgmii_ofs, int port, bool set); | |
| 226 | 226 | int netcp_sgmii_get_port_link(void __iomem *sgmii_ofs, int port); |
| 227 | 227 | int netcp_sgmii_config(void __iomem *sgmii_ofs, int port, u32 interface); |
| 228 | 228 | |
| @@ -34,6 +34,7 @@ · 33 unmodified lines | ||
| 34 | 34 | #define NETCP_SOP_OFFSET (NET_IP_ALIGN + NET_SKB_PAD) |
| 35 | 35 | #define NETCP_NAPI_WEIGHT 64 |
| 36 | 36 | #define NETCP_TX_TIMEOUT (5 * HZ) |
| 37 | +#define NETCP_PACKET_SIZE (ETH_FRAME_LEN + ETH_FCS_LEN) | |
| 37 | 38 | #define NETCP_MIN_PACKET_SIZE ETH_ZLEN |
| 38 | 39 | #define NETCP_MAX_MCAST_ADDR 16 |
| 39 | 40 | |
| @@ -804,30 +805,28 @@ static void netcp_allocate_rx_buf(struct netcp_intf *netcp, int fdq) · 764 unmodified lines | ||
| 804 | 805 | if (likely(fdq == 0)) { |
| 805 | 806 | unsigned int primary_buf_len; |
| 806 | 807 | /* Allocate a primary receive queue entry */ |
| 807 | − buf_len = netcp->rx_buffer_sizes[0] + NETCP_SOP_OFFSET; | |
| 808 | + buf_len = NETCP_PACKET_SIZE + NETCP_SOP_OFFSET; | |
| 808 | 809 | primary_buf_len = SKB_DATA_ALIGN(buf_len) + |
| 809 | 810 | SKB_DATA_ALIGN(sizeof(struct skb_shared_info)); |
| 810 | 811 | |
| 811 | − if (primary_buf_len <= PAGE_SIZE) { | |
| 812 | − bufptr = netdev_alloc_frag(primary_buf_len); | |
| 813 | − pad[1] = primary_buf_len; | |
| 814 | − } else { | |
| 815 | − bufptr = kmalloc(primary_buf_len, GFP_ATOMIC | | |
| 816 | − GFP_DMA32 | __GFP_COLD); | |
| 817 | − pad[1] = 0; | |
| 818 | − } | |
| 812 | + bufptr = netdev_alloc_frag(primary_buf_len); | |
| 813 | + pad[1] = primary_buf_len; | |
| 819 | 814 | |
| 820 | 815 | if (unlikely(!bufptr)) { |
| 821 | − dev_warn_ratelimited(netcp->ndev_dev, "Primary RX buffer alloc failed\n"); | |
| 816 | + dev_warn_ratelimited(netcp->ndev_dev, | |
| 817 | + "Primary RX buffer alloc failed\n"); | |
| 822 | 818 | goto fail; |
| 823 | 819 | } |
| 824 | 820 | dma = dma_map_single(netcp->dev, bufptr, buf_len, |
| 825 | 821 | DMA_TO_DEVICE); |
| 822 | + if (unlikely(dma_mapping_error(netcp->dev, dma))) | |
| 823 | + goto fail; | |
| 824 | + | |
| 826 | 825 | pad[0] = (u32)bufptr; |
| 827 | 826 | |
| 828 | 827 | } else { |
| 829 | 828 | /* Allocate a secondary receive queue entry */ |
| 830 | − page = alloc_page(GFP_ATOMIC | GFP_DMA32 | __GFP_COLD); | |
| 829 | + page = alloc_page(GFP_ATOMIC | GFP_DMA | __GFP_COLD); | |
| 831 | 830 | if (unlikely(!page)) { |
| 832 | 831 | dev_warn_ratelimited(netcp->ndev_dev, "Secondary page alloc failed\n"); |
| 833 | 832 | goto fail; |
| @@ -1010,7 +1009,7 @@ netcp_tx_map_skb(struct sk_buff *skb, struct netcp_intf *netcp) · 176 unmodified lines | ||
| 1010 | 1009 | |
| 1011 | 1010 | /* Map the linear buffer */ |
| 1012 | 1011 | dma_addr = dma_map_single(dev, skb->data, pkt_len, DMA_TO_DEVICE); |
| 1013 | − if (unlikely(!dma_addr)) { | |
| 1012 | + if (unlikely(dma_mapping_error(dev, dma_addr))) { | |
| 1014 | 1013 | dev_err(netcp->ndev_dev, "Failed to map skb buffer\n"); |
| 1015 | 1014 | return NULL; |
| 1016 | 1015 | } |
| @@ -1546,8 +1545,8 @@ static int netcp_setup_navigator_resources(struct net_device *ndev) · 529 unmodified lines | ||
| 1546 | 1545 | knav_queue_disable_notify(netcp->rx_queue); |
| 1547 | 1546 | |
| 1548 | 1547 | /* open Rx FDQs */ |
| 1549 | − for (i = 0; i < KNAV_DMA_FDQ_PER_CHAN && | |
| 1550 | − netcp->rx_queue_depths[i] && netcp->rx_buffer_sizes[i]; ++i) { | |
| 1548 | + for (i = 0; i < KNAV_DMA_FDQ_PER_CHAN && netcp->rx_queue_depths[i]; | |
| 1549 | + ++i) { | |
| 1551 | 1550 | snprintf(name, sizeof(name), "rx-fdq-%s-%d", ndev->name, i); |
| 1552 | 1551 | netcp->rx_fdq[i] = knav_queue_open(name, KNAV_QUEUE_GP, 0); |
| 1553 | 1552 | if (IS_ERR_OR_NULL(netcp->rx_fdq[i])) { |
| @@ -1617,11 +1616,11 @@ static int netcp_ndo_open(struct net_device *ndev) · 63 unmodified lines | ||
| 1617 | 1616 | } |
| 1618 | 1617 | mutex_unlock(&netcp_modules_lock); |
| 1619 | 1618 | |
| 1620 | − netcp_rxpool_refill(netcp); | |
| 1621 | 1619 | napi_enable(&netcp->rx_napi); |
| 1622 | 1620 | napi_enable(&netcp->tx_napi); |
| 1623 | 1621 | knav_queue_enable_notify(netcp->tx_compl_q); |
| 1624 | 1622 | knav_queue_enable_notify(netcp->rx_queue); |
| 1623 | + netcp_rxpool_refill(netcp); | |
| 1625 | 1624 | netif_tx_wake_all_queues(ndev); |
| 1626 | 1625 | dev_dbg(netcp->ndev_dev, "netcp device %s opened\n", ndev->name); |
| 1627 | 1626 | return 0; |
| @@ -1941,14 +1940,6 @@ static int netcp_create_interface(struct netcp_device *netcp_device, · 313 unmodified lines | ||
| 1941 | 1940 | netcp->rx_queue_depths[0] = 128; |
| 1942 | 1941 | } |
| 1943 | 1942 | |
| 1944 | − ret = of_property_read_u32_array(node_interface, "rx-buffer-size", | |
| 1945 | − netcp->rx_buffer_sizes, | |
| 1946 | − KNAV_DMA_FDQ_PER_CHAN); | |
| 1947 | − if (ret) { | |
| 1948 | − dev_err(dev, "missing \"rx-buffer-size\" parameter\n"); | |
| 1949 | − netcp->rx_buffer_sizes[0] = 1536; | |
| 1950 | − } | |
| 1951 | − | |
| 1952 | 1943 | ret = of_property_read_u32_array(node_interface, "rx-pool", temp, 2); |
| 1953 | 1944 | if (ret < 0) { |
| 1954 | 1945 | dev_err(dev, "missing \"rx-pool\" parameter\n"); |
| @@ -2112,6 +2103,7 @@ probe_quit: · 157 unmodified lines | ||
| 2112 | 2103 | static int netcp_remove(struct platform_device *pdev) |
| 2113 | 2104 | { |
| 2114 | 2105 | struct netcp_device *netcp_device = platform_get_drvdata(pdev); |
| 2106 | + struct netcp_intf *netcp_intf, *netcp_tmp; | |
| 2115 | 2107 | struct netcp_inst_modpriv *inst_modpriv, *tmp; |
| 2116 | 2108 | struct netcp_module *module; |
| 2117 | 2109 | |
| @@ -2123,10 +2115,17 @@ static int netcp_remove(struct platform_device *pdev) · 5 unmodified lines | ||
| 2123 | 2115 | list_del(&inst_modpriv->inst_list); |
| 2124 | 2116 | kfree(inst_modpriv); |
| 2125 | 2117 | } |
| 2126 | − WARN(!list_empty(&netcp_device->interface_head), "%s interface list not empty!\n", | |
| 2127 | − pdev->name); | |
| 2128 | 2118 | |
| 2129 | − devm_kfree(&pdev->dev, netcp_device); | |
| 2119 | + /* now that all modules are removed, clean up the interfaces */ | |
| 2120 | + list_for_each_entry_safe(netcp_intf, netcp_tmp, | |
| 2121 | + &netcp_device->interface_head, | |
| 2122 | + interface_list) { | |
| 2123 | + netcp_delete_interface(netcp_device, netcp_intf->ndev); | |
| 2124 | + } | |
| 2125 | + | |
| 2126 | + WARN(!list_empty(&netcp_device->interface_head), | |
| 2127 | + "%s interface list not empty!\n", pdev->name); | |
| 2128 | + | |
| 2130 | 2129 | pm_runtime_put_sync(&pdev->dev); |
| 2131 | 2130 | pm_runtime_disable(&pdev->dev); |
| 2132 | 2131 | platform_set_drvdata(pdev, NULL); |
| @@ -1901,11 +1901,28 @@ static void gbe_port_config(struct gbe_priv *gbe_dev, struct gbe_slave *slave, · 1900 unmodified lines | ||
| 1901 | 1901 | writel(slave->mac_control, GBE_REG_ADDR(slave, emac_regs, mac_control)); |
| 1902 | 1902 | } |
| 1903 | 1903 | |
| 1904 | +static void gbe_sgmii_rtreset(struct gbe_priv *priv, | |
| 1905 | + struct gbe_slave *slave, bool set) | |
| 1906 | +{ | |
| 1907 | + void __iomem *sgmii_port_regs; | |
| 1908 | + | |
| 1909 | + if (SLAVE_LINK_IS_XGMII(slave)) | |
| 1910 | + return; | |
| 1911 | + | |
| 1912 | + if ((priv->ss_version == GBE_SS_VERSION_14) && (slave->slave_num >= 2)) | |
| 1913 | + sgmii_port_regs = priv->sgmii_port34_regs; | |
| 1914 | + else | |
| 1915 | + sgmii_port_regs = priv->sgmii_port_regs; | |
| 1916 | + | |
| 1917 | + netcp_sgmii_rtreset(sgmii_port_regs, slave->slave_num, set); | |
| 1918 | +} | |
| 1919 | + | |
| 1904 | 1920 | static void gbe_slave_stop(struct gbe_intf *intf) |
| 1905 | 1921 | { |
| 1906 | 1922 | struct gbe_priv *gbe_dev = intf->gbe_dev; |
| 1907 | 1923 | struct gbe_slave *slave = intf->slave; |
| 1908 | 1924 | |
| 1925 | + gbe_sgmii_rtreset(gbe_dev, slave, true); | |
| 1909 | 1926 | gbe_port_reset(slave); |
| 1910 | 1927 | /* Disable forwarding */ |
| 1911 | 1928 | cpsw_ale_control_set(gbe_dev->ale, slave->port_num, |
| @@ -1947,6 +1964,7 @@ static int gbe_slave_open(struct gbe_intf *gbe_intf) · 35 unmodified lines | ||
| 1947 | 1964 | |
| 1948 | 1965 | gbe_sgmii_config(priv, slave); |
| 1949 | 1966 | gbe_port_reset(slave); |
| 1967 | + gbe_sgmii_rtreset(priv, slave, false); | |
| 1950 | 1968 | gbe_port_config(priv, slave, priv->rx_packet_max); |
| 1951 | 1969 | gbe_set_slave_mac(slave, gbe_intf); |
| 1952 | 1970 | /* enable forwarding */ |
| @@ -2490,10 +2508,9 @@ static void free_secondary_ports(struct gbe_priv *gbe_dev) · 537 unmodified lines | ||
| 2490 | 2508 | { |
| 2491 | 2509 | struct gbe_slave *slave; |
| 2492 | 2510 | |
| 2493 | − for (;;) { | |
| 2511 | + while (!list_empty(&gbe_dev->secondary_slaves)) { | |
| 2494 | 2512 | slave = first_sec_slave(gbe_dev); |
| 2495 | − if (!slave) | |
| 2496 | − break; | |
| 2513 | + | |
| 2497 | 2514 | if (slave->phy) |
| 2498 | 2515 | phy_disconnect(slave->phy); |
| 2499 | 2516 | list_del(&slave->slave_list); |
| @@ -2839,14 +2856,13 @@ static int gbe_probe(struct netcp_device *netcp_device, struct device *dev, · 339 unmodified lines | ||
| 2839 | 2856 | &gbe_dev->dma_chan_name); |
| 2840 | 2857 | if (ret < 0) { |
| 2841 | 2858 | dev_err(dev, "missing \"tx-channel\" parameter\n"); |
| 2842 | − ret = -ENODEV; | |
| 2843 | − goto quit; | |
| 2859 | + return -EINVAL; | |
| 2844 | 2860 | } |
| 2845 | 2861 | |
| 2846 | 2862 | if (!strcmp(node->name, "gbe")) { |
| 2847 | 2863 | ret = get_gbe_resource_version(gbe_dev, node); |
| 2848 | 2864 | if (ret) |
| 2849 | − goto quit; | |
| 2865 | + return ret; | |
| 2850 | 2866 | |
| 2851 | 2867 | dev_dbg(dev, "ss_version: 0x%08x\n", gbe_dev->ss_version); |
| 2852 | 2868 | |
| @@ -2857,22 +2873,20 @@ static int gbe_probe(struct netcp_device *netcp_device, struct device *dev, · 4 unmodified lines | ||
| 2857 | 2873 | else |
| 2858 | 2874 | ret = -ENODEV; |
| 2859 | 2875 | |
| 2860 | − if (ret) | |
| 2861 | − goto quit; | |
| 2862 | 2876 | } else if (!strcmp(node->name, "xgbe")) { |
| 2863 | 2877 | ret = set_xgbe_ethss10_priv(gbe_dev, node); |
| 2864 | 2878 | if (ret) |
| 2865 | − goto quit; | |
| 2879 | + return ret; | |
| 2866 | 2880 | ret = netcp_xgbe_serdes_init(gbe_dev->xgbe_serdes_regs, |
| 2867 | 2881 | gbe_dev->ss_regs); |
| 2868 | − if (ret) | |
| 2869 | − goto quit; | |
| 2870 | 2882 | } else { |
| 2871 | 2883 | dev_err(dev, "unknown GBE node(%s)\n", node->name); |
| 2872 | 2884 | ret = -ENODEV; |
| 2873 | − goto quit; | |
| 2874 | 2885 | } |
| 2875 | 2886 | |
| 2887 | + if (ret) | |
| 2888 | + return ret; | |
| 2889 | + | |
| 2876 | 2890 | interfaces = of_get_child_by_name(node, "interfaces"); |
| 2877 | 2891 | if (!interfaces) |
| 2878 | 2892 | dev_err(dev, "could not find interfaces\n"); |
| @@ -2880,11 +2894,11 @@ static int gbe_probe(struct netcp_device *netcp_device, struct device *dev, · 1 unmodified line | ||
| 2880 | 2894 | ret = netcp_txpipe_init(&gbe_dev->tx_pipe, netcp_device, |
| 2881 | 2895 | gbe_dev->dma_chan_name, gbe_dev->tx_queue_id); |
| 2882 | 2896 | if (ret) |
| 2883 | − goto quit; | |
| 2897 | + return ret; | |
| 2884 | 2898 | |
| 2885 | 2899 | ret = netcp_txpipe_open(&gbe_dev->tx_pipe); |
| 2886 | 2900 | if (ret) |
| 2887 | − goto quit; | |
| 2901 | + return ret; | |
| 2888 | 2902 | |
| 2889 | 2903 | /* Create network interfaces */ |
| 2890 | 2904 | INIT_LIST_HEAD(&gbe_dev->gbe_intf_head); |
| @@ -2899,6 +2913,7 @@ static int gbe_probe(struct netcp_device *netcp_device, struct device *dev, · 8 unmodified lines | ||
| 2899 | 2913 | if (gbe_dev->num_slaves >= gbe_dev->max_num_slaves) |
| 2900 | 2914 | break; |
| 2901 | 2915 | } |
| 2916 | + of_node_put(interfaces); | |
| 2902 | 2917 | |
| 2903 | 2918 | if (!gbe_dev->num_slaves) |
| 2904 | 2919 | dev_warn(dev, "No network interface configured\n"); |
| @@ -2911,9 +2926,10 @@ static int gbe_probe(struct netcp_device *netcp_device, struct device *dev, · 6 unmodified lines | ||
| 2911 | 2926 | of_node_put(secondary_ports); |
| 2912 | 2927 | |
| 2913 | 2928 | if (!gbe_dev->num_slaves) { |
| 2914 | − dev_err(dev, "No network interface or secondary ports configured\n"); | |
| 2929 | + dev_err(dev, | |
| 2930 | + "No network interface or secondary ports configured\n"); | |
| 2915 | 2931 | ret = -ENODEV; |
| 2916 | − goto quit; | |
| 2932 | + goto free_sec_ports; | |
| 2917 | 2933 | } |
| 2918 | 2934 | |
| 2919 | 2935 | memset(&ale_params, 0, sizeof(ale_params)); |
| @@ -2927,7 +2943,7 @@ static int gbe_probe(struct netcp_device *netcp_device, struct device *dev, · 7 unmodified lines | ||
| 2927 | 2943 | if (!gbe_dev->ale) { |
| 2928 | 2944 | dev_err(gbe_dev->dev, "error initializing ale engine\n"); |
| 2929 | 2945 | ret = -ENODEV; |
| 2930 | − goto quit; | |
| 2946 | + goto free_sec_ports; | |
| 2931 | 2947 | } else { |
| 2932 | 2948 | dev_dbg(gbe_dev->dev, "Created a gbe ale engine\n"); |
| 2933 | 2949 | } |
| @@ -2943,14 +2959,8 @@ static int gbe_probe(struct netcp_device *netcp_device, struct device *dev, · 9 unmodified lines | ||
| 2943 | 2959 | *inst_priv = gbe_dev; |
| 2944 | 2960 | return 0; |
| 2945 | 2961 | |
| 2946 | −quit: | |
| 2947 | − if (gbe_dev->hw_stats) | |
| 2948 | − devm_kfree(dev, gbe_dev->hw_stats); | |
| 2949 | − cpsw_ale_destroy(gbe_dev->ale); | |
| 2950 | − if (gbe_dev->ss_regs) | |
| 2951 | − devm_iounmap(dev, gbe_dev->ss_regs); | |
| 2952 | − of_node_put(interfaces); | |
| 2953 | − devm_kfree(dev, gbe_dev); | |
| 2962 | +free_sec_ports: | |
| 2963 | + free_secondary_ports(gbe_dev); | |
| 2954 | 2964 | return ret; |
| 2955 | 2965 | } |
| 2956 | 2966 | |
| @@ -3023,12 +3033,9 @@ static int gbe_remove(struct netcp_device *netcp_device, void *inst_priv) · 66 unmodified lines | ||
| 3023 | 3033 | free_secondary_ports(gbe_dev); |
| 3024 | 3034 | |
| 3025 | 3035 | if (!list_empty(&gbe_dev->gbe_intf_head)) |
| 3026 | − dev_alert(gbe_dev->dev, "unreleased ethss interfaces present\n"); | |
| 3036 | + dev_alert(gbe_dev->dev, | |
| 3037 | + "unreleased ethss interfaces present\n"); | |
| 3027 | 3038 | |
| 3028 | − devm_kfree(gbe_dev->dev, gbe_dev->hw_stats); | |
| 3029 | − devm_iounmap(gbe_dev->dev, gbe_dev->ss_regs); | |
| 3030 | − memset(gbe_dev, 0x00, sizeof(*gbe_dev)); | |
| 3031 | − devm_kfree(gbe_dev->dev, gbe_dev); | |
| 3032 | 3039 | return 0; |
| 3033 | 3040 | } |
| 3034 | 3041 | |
| @@ -18,6 +18,9 @@ · 17 unmodified lines | ||
| 18 | 18 | |
| 19 | 19 | #include "netcp.h" |
| 20 | 20 | |
| 21 | +#define SGMII_SRESET_RESET BIT(0) | |
| 22 | +#define SGMII_SRESET_RTRESET BIT(1) | |
| 23 | + | |
| 21 | 24 | #define SGMII_REG_STATUS_LOCK BIT(4) |
| 22 | 25 | #define SGMII_REG_STATUS_LINK BIT(0) |
| 23 | 26 | #define SGMII_REG_STATUS_AUTONEG BIT(2) |
| @@ -51,12 +54,35 @@ static void sgmii_write_reg_bit(void __iomem *base, int reg, u32 val) · 27 unmodified lines | ||
| 51 | 54 | int netcp_sgmii_reset(void __iomem *sgmii_ofs, int port) |
| 52 | 55 | { |
| 53 | 56 | /* Soft reset */ |
| 54 | − sgmii_write_reg_bit(sgmii_ofs, SGMII_SRESET_REG(port), 0x1); | |
| 55 | − while (sgmii_read_reg(sgmii_ofs, SGMII_SRESET_REG(port)) != 0x0) | |
| 57 | + sgmii_write_reg_bit(sgmii_ofs, SGMII_SRESET_REG(port), | |
| 58 | + SGMII_SRESET_RESET); | |
| 59 | + | |
| 60 | + while ((sgmii_read_reg(sgmii_ofs, SGMII_SRESET_REG(port)) & | |
| 61 | + SGMII_SRESET_RESET) != 0x0) | |
| 56 | 62 | ; |
| 63 | + | |
| 57 | 64 | return 0; |
| 58 | 65 | } |
| 59 | 66 | |
| 67 | +/* port is 0 based */ | |
| 68 | +bool netcp_sgmii_rtreset(void __iomem *sgmii_ofs, int port, bool set) | |
| 69 | +{ | |
| 70 | + u32 reg; | |
| 71 | + bool oldval; | |
| 72 | + | |
| 73 | + /* Initiate a soft reset */ | |
| 74 | + reg = sgmii_read_reg(sgmii_ofs, SGMII_SRESET_REG(port)); | |
| 75 | + oldval = (reg & SGMII_SRESET_RTRESET) != 0x0; | |
| 76 | + if (set) | |
| 77 | + reg |= SGMII_SRESET_RTRESET; | |
| 78 | + else | |
| 79 | + reg &= ~SGMII_SRESET_RTRESET; | |
| 80 | + sgmii_write_reg(sgmii_ofs, SGMII_SRESET_REG(port), reg); | |
| 81 | + wmb(); | |
| 82 | + | |
| 83 | + return oldval; | |
| 84 | +} | |
| 85 | + | |
| 60 | 86 | int netcp_sgmii_get_port_link(void __iomem *sgmii_ofs, int port) |
| 61 | 87 | { |
| 62 | 88 | u32 status = 0, link = 0; |
| @@ -728,11 +728,12 @@ static int mkiss_open(struct tty_struct *tty) · 727 unmodified lines | ||
| 728 | 728 | dev->type = ARPHRD_AX25; |
| 729 | 729 | |
| 730 | 730 | /* Perform the low-level AX25 initialization. */ |
| 731 | − if ((err = ax_open(ax->dev))) { | |
| 731 | + err = ax_open(ax->dev); | |
| 732 | + if (err) | |
| 732 | 733 | goto out_free_netdev; |
| 733 | − } | |
| 734 | 734 | |
| 735 | − if (register_netdev(dev)) | |
| 735 | + err = register_netdev(dev); | |
| 736 | + if (err) | |
| 736 | 737 | goto out_free_buffers; |
| 737 | 738 | |
| 738 | 739 | /* after register_netdev() - because else printk smashes the kernel */ |
| @@ -67,8 +67,6 @@ struct ipvl_dev { · 66 unmodified lines | ||
| 67 | 67 | struct ipvl_port *port; |
| 68 | 68 | struct net_device *phy_dev; |
| 69 | 69 | struct list_head addrs; |
| 70 | − int ipv4cnt; | |
| 71 | − int ipv6cnt; | |
| 72 | 70 | struct ipvl_pcpu_stats __percpu *pcpu_stats; |
| 73 | 71 | DECLARE_BITMAP(mac_filters, IPVLAN_MAC_FILTER_SIZE); |
| 74 | 72 | netdev_features_t sfeatures; |
| @@ -106,6 +104,11 @@ static inline struct ipvl_port *ipvlan_port_get_rcu(const struct net_device *d) · 31 unmodified lines | ||
| 106 | 104 | return rcu_dereference(d->rx_handler_data); |
| 107 | 105 | } |
| 108 | 106 | |
| 107 | +static inline struct ipvl_port *ipvlan_port_get_rcu_bh(const struct net_device *d) | |
| 108 | +{ | |
| 109 | + return rcu_dereference_bh(d->rx_handler_data); | |
| 110 | +} | |
| 111 | + | |
| 109 | 112 | static inline struct ipvl_port *ipvlan_port_get_rtnl(const struct net_device *d) |
| 110 | 113 | { |
| 111 | 114 | return rtnl_dereference(d->rx_handler_data); |
| @@ -124,5 +127,5 @@ struct ipvl_addr *ipvlan_find_addr(const struct ipvl_dev *ipvlan, · 12 unmodified lines | ||
| 124 | 127 | bool ipvlan_addr_busy(struct ipvl_port *port, void *iaddr, bool is_v6); |
| 125 | 128 | struct ipvl_addr *ipvlan_ht_addr_lookup(const struct ipvl_port *port, |
| 126 | 129 | const void *iaddr, bool is_v6); |
| 127 | −void ipvlan_ht_addr_del(struct ipvl_addr *addr, bool sync); | |
| 130 | +void ipvlan_ht_addr_del(struct ipvl_addr *addr); | |
| 128 | 131 | #endif /* __IPVLAN_H */ |
| @@ -85,11 +85,9 @@ void ipvlan_ht_addr_add(struct ipvl_dev *ipvlan, struct ipvl_addr *addr) · 84 unmodified lines | ||
| 85 | 85 | hlist_add_head_rcu(&addr->hlnode, &port->hlhead[hash]); |
| 86 | 86 | } |
| 87 | 87 | |
| 88 | −void ipvlan_ht_addr_del(struct ipvl_addr *addr, bool sync) | |
| 88 | +void ipvlan_ht_addr_del(struct ipvl_addr *addr) | |
| 89 | 89 | { |
| 90 | 90 | hlist_del_init_rcu(&addr->hlnode); |
| 91 | − if (sync) | |
| 92 | − synchronize_rcu(); | |
| 93 | 91 | } |
| 94 | 92 | |
| 95 | 93 | struct ipvl_addr *ipvlan_find_addr(const struct ipvl_dev *ipvlan, |
| @@ -531,7 +529,7 @@ static int ipvlan_xmit_mode_l2(struct sk_buff *skb, struct net_device *dev) · 435 unmodified lines | ||
| 531 | 529 | int ipvlan_queue_xmit(struct sk_buff *skb, struct net_device *dev) |
| 532 | 530 | { |
| 533 | 531 | struct ipvl_dev *ipvlan = netdev_priv(dev); |
| 534 | − struct ipvl_port *port = ipvlan_port_get_rcu(ipvlan->phy_dev); | |
| 532 | + struct ipvl_port *port = ipvlan_port_get_rcu_bh(ipvlan->phy_dev); | |
| 535 | 533 | |
| 536 | 534 | if (!port) |
| 537 | 535 | goto out; |
| @@ -153,10 +153,9 @@ static int ipvlan_open(struct net_device *dev) · 152 unmodified lines | ||
| 153 | 153 | else |
| 154 | 154 | dev->flags &= ~IFF_NOARP; |
| 155 | 155 | |
| 156 | − if (ipvlan->ipv6cnt > 0 || ipvlan->ipv4cnt > 0) { | |
| 157 | − list_for_each_entry(addr, &ipvlan->addrs, anode) | |
| 158 | − ipvlan_ht_addr_add(ipvlan, addr); | |
| 159 | − } | |
| 156 | + list_for_each_entry(addr, &ipvlan->addrs, anode) | |
| 157 | + ipvlan_ht_addr_add(ipvlan, addr); | |
| 158 | + | |
| 160 | 159 | return dev_uc_add(phy_dev, phy_dev->dev_addr); |
| 161 | 160 | } |
| 162 | 161 | |
| @@ -171,10 +170,9 @@ static int ipvlan_stop(struct net_device *dev) · 8 unmodified lines | ||
| 171 | 170 | |
| 172 | 171 | dev_uc_del(phy_dev, phy_dev->dev_addr); |
| 173 | 172 | |
| 174 | − if (ipvlan->ipv6cnt > 0 || ipvlan->ipv4cnt > 0) { | |
| 175 | − list_for_each_entry(addr, &ipvlan->addrs, anode) | |
| 176 | − ipvlan_ht_addr_del(addr, !dev->dismantle); | |
| 177 | − } | |
| 173 | + list_for_each_entry(addr, &ipvlan->addrs, anode) | |
| 174 | + ipvlan_ht_addr_del(addr); | |
| 175 | + | |
| 178 | 176 | return 0; |
| 179 | 177 | } |
| 180 | 178 | |
| @@ -471,8 +469,6 @@ static int ipvlan_link_new(struct net *src_net, struct net_device *dev, · 290 unmodified lines | ||
| 471 | 469 | ipvlan->port = port; |
| 472 | 470 | ipvlan->sfeatures = IPVLAN_FEATURES; |
| 473 | 471 | INIT_LIST_HEAD(&ipvlan->addrs); |
| 474 | − ipvlan->ipv4cnt = 0; | |
| 475 | − ipvlan->ipv6cnt = 0; | |
| 476 | 472 | |
| 477 | 473 | /* TODO Probably put random address here to be presented to the |
| 478 | 474 | * world but keep using the physical-dev address for the outgoing |
| @@ -508,12 +504,12 @@ static void ipvlan_link_delete(struct net_device *dev, struct list_head *head) · 29 unmodified lines | ||
| 508 | 504 | struct ipvl_dev *ipvlan = netdev_priv(dev); |
| 509 | 505 | struct ipvl_addr *addr, *next; |
| 510 | 506 | |
| 511 | − if (ipvlan->ipv6cnt > 0 || ipvlan->ipv4cnt > 0) { | |
| 512 | − list_for_each_entry_safe(addr, next, &ipvlan->addrs, anode) { | |
| 513 | − ipvlan_ht_addr_del(addr, !dev->dismantle); | |
| 514 | − list_del(&addr->anode); | |
| 515 | − } | |
| 507 | + list_for_each_entry_safe(addr, next, &ipvlan->addrs, anode) { | |
| 508 | + ipvlan_ht_addr_del(addr); | |
| 509 | + list_del(&addr->anode); | |
| 510 | + kfree_rcu(addr, rcu); | |
| 516 | 511 | } |
| 512 | + | |
| 517 | 513 | list_del_rcu(&ipvlan->pnode); |
| 518 | 514 | unregister_netdevice_queue(dev, head); |
| 519 | 515 | netdev_upper_dev_unlink(ipvlan->phy_dev, dev); |
| @@ -627,7 +623,7 @@ static int ipvlan_add_addr6(struct ipvl_dev *ipvlan, struct in6_addr *ip6_addr) · 107 unmodified lines | ||
| 627 | 623 | memcpy(&addr->ip6addr, ip6_addr, sizeof(struct in6_addr)); |
| 628 | 624 | addr->atype = IPVL_IPV6; |
| 629 | 625 | list_add_tail(&addr->anode, &ipvlan->addrs); |
| 630 | − ipvlan->ipv6cnt++; | |
| 626 | + | |
| 631 | 627 | /* If the interface is not up, the address will be added to the hash |
| 632 | 628 | * list by ipvlan_open. |
| 633 | 629 | */ |
| @@ -645,10 +641,8 @@ static void ipvlan_del_addr6(struct ipvl_dev *ipvlan, struct in6_addr *ip6_addr) · 11 unmodified lines | ||
| 645 | 641 | if (!addr) |
| 646 | 642 | return; |
| 647 | 643 | |
| 648 | − ipvlan_ht_addr_del(addr, true); | |
| 644 | + ipvlan_ht_addr_del(addr); | |
| 649 | 645 | list_del(&addr->anode); |
| 650 | − ipvlan->ipv6cnt--; | |
| 651 | − WARN_ON(ipvlan->ipv6cnt < 0); | |
| 652 | 646 | kfree_rcu(addr, rcu); |
| 653 | 647 | |
| 654 | 648 | return; |
| @@ -661,6 +655,10 @@ static int ipvlan_addr6_event(struct notifier_block *unused, · 6 unmodified lines | ||
| 661 | 655 | struct net_device *dev = (struct net_device *)if6->idev->dev; |
| 662 | 656 | struct ipvl_dev *ipvlan = netdev_priv(dev); |
| 663 | 657 | |
| 658 | + /* FIXME IPv6 autoconf calls us from bh without RTNL */ | |
| 659 | + if (in_softirq()) | |
| 660 | + return NOTIFY_DONE; | |
| 661 | + | |
| 664 | 662 | if (!netif_is_ipvlan(dev)) |
| 665 | 663 | return NOTIFY_DONE; |
| 666 | 664 | |
| @@ -699,7 +697,7 @@ static int ipvlan_add_addr4(struct ipvl_dev *ipvlan, struct in_addr *ip4_addr) · 32 unmodified lines | ||
| 699 | 697 | memcpy(&addr->ip4addr, ip4_addr, sizeof(struct in_addr)); |
| 700 | 698 | addr->atype = IPVL_IPV4; |
| 701 | 699 | list_add_tail(&addr->anode, &ipvlan->addrs); |
| 702 | − ipvlan->ipv4cnt++; | |
| 700 | + | |
| 703 | 701 | /* If the interface is not up, the address will be added to the hash |
| 704 | 702 | * list by ipvlan_open. |
| 705 | 703 | */ |
| @@ -717,10 +715,8 @@ static void ipvlan_del_addr4(struct ipvl_dev *ipvlan, struct in_addr *ip4_addr) · 11 unmodified lines | ||
| 717 | 715 | if (!addr) |
| 718 | 716 | return; |
| 719 | 717 | |
| 720 | − ipvlan_ht_addr_del(addr, true); | |
| 718 | + ipvlan_ht_addr_del(addr); | |
| 721 | 719 | list_del(&addr->anode); |
| 722 | − ipvlan->ipv4cnt--; | |
| 723 | − WARN_ON(ipvlan->ipv4cnt < 0); | |
| 724 | 720 | kfree_rcu(addr, rcu); |
| 725 | 721 | |
| 726 | 722 | return; |
| @@ -719,6 +719,7 @@ static ssize_t macvtap_get_user(struct macvtap_queue *q, struct msghdr *m, · 718 unmodified lines | ||
| 719 | 719 | struct virtio_net_hdr vnet_hdr = { 0 }; |
| 720 | 720 | int vnet_hdr_len = 0; |
| 721 | 721 | int copylen = 0; |
| 722 | + int depth; | |
| 722 | 723 | bool zerocopy = false; |
| 723 | 724 | size_t linear; |
| 724 | 725 | ssize_t n; |
| @@ -804,6 +805,12 @@ static ssize_t macvtap_get_user(struct macvtap_queue *q, struct msghdr *m, · 79 unmodified lines | ||
| 804 | 805 | |
| 805 | 806 | skb_probe_transport_header(skb, ETH_HLEN); |
| 806 | 807 | |
| 808 | + /* Move network header to the right position for VLAN tagged packets */ | |
| 809 | + if ((skb->protocol == htons(ETH_P_8021Q) || | |
| 810 | + skb->protocol == htons(ETH_P_8021AD)) && | |
| 811 | + __vlan_get_protocol(skb, skb->protocol, &depth) != 0) | |
| 812 | + skb_set_network_header(skb, depth); | |
| 813 | + | |
| 807 | 814 | rcu_read_lock(); |
| 808 | 815 | vlan = rcu_dereference(q->vlan); |
| 809 | 816 | /* copy skb_ubuf_info for callback when skb has no error */ |
| @@ -102,6 +102,12 @@ static void ntb_netdev_rx_handler(struct ntb_transport_qp *qp, void *qp_data, · 101 unmodified lines | ||
| 102 | 102 | |
| 103 | 103 | netdev_dbg(ndev, "%s: %d byte payload received\n", __func__, len); |
| 104 | 104 | |
| 105 | + if (len < 0) { | |
| 106 | + ndev->stats.rx_errors++; | |
| 107 | + ndev->stats.rx_length_errors++; | |
| 108 | + goto enqueue_again; | |
| 109 | + } | |
| 110 | + | |
| 105 | 111 | skb_put(skb, len); |
| 106 | 112 | skb->protocol = eth_type_trans(skb, ndev); |
| 107 | 113 | skb->ip_summed = CHECKSUM_NONE; |
| @@ -121,6 +127,7 @@ static void ntb_netdev_rx_handler(struct ntb_transport_qp *qp, void *qp_data, · 13 unmodified lines | ||
| 121 | 127 | return; |
| 122 | 128 | } |
| 123 | 129 | |
| 130 | +enqueue_again: | |
| 124 | 131 | rc = ntb_transport_rx_enqueue(qp, skb, skb->data, ndev->mtu + ETH_HLEN); |
| 125 | 132 | if (rc) { |
| 126 | 133 | dev_kfree_skb(skb); |
| @@ -184,7 +191,7 @@ static int ntb_netdev_open(struct net_device *ndev) · 57 unmodified lines | ||
| 184 | 191 | |
| 185 | 192 | rc = ntb_transport_rx_enqueue(dev->qp, skb, skb->data, |
| 186 | 193 | ndev->mtu + ETH_HLEN); |
| 187 | − if (rc == -EINVAL) { | |
| 194 | + if (rc) { | |
| 188 | 195 | dev_kfree_skb(skb); |
| 189 | 196 | goto err; |
| 190 | 197 | } |
| @@ -164,7 +164,7 @@ static int dp83867_config_init(struct phy_device *phydev) · 163 unmodified lines | ||
| 164 | 164 | return ret; |
| 165 | 165 | } |
| 166 | 166 | |
| 167 | − if ((phydev->interface >= PHY_INTERFACE_MODE_RGMII_ID) || | |
| 167 | + if ((phydev->interface >= PHY_INTERFACE_MODE_RGMII_ID) && | |
| 168 | 168 | (phydev->interface <= PHY_INTERFACE_MODE_RGMII_RXID)) { |
| 169 | 169 | val = phy_read_mmd_indirect(phydev, DP83867_RGMIICTL, |
| 170 | 170 | DP83867_DEVADDR, phydev->addr); |
| @@ -421,6 +421,8 @@ static int mdio_bus_match(struct device *dev, struct device_driver *drv) · 420 unmodified lines | ||
| 421 | 421 | { |
| 422 | 422 | struct phy_device *phydev = to_phy_device(dev); |
| 423 | 423 | struct phy_driver *phydrv = to_phy_driver(drv); |
| 424 | + const int num_ids = ARRAY_SIZE(phydev->c45_ids.device_ids); | |
| 425 | + int i; | |
| 424 | 426 | |
| 425 | 427 | if (of_driver_match_device(dev, drv)) |
| 426 | 428 | return 1; |
| @@ -428,8 +430,21 @@ static int mdio_bus_match(struct device *dev, struct device_driver *drv) · 1 unmodified line | ||
| 428 | 430 | if (phydrv->match_phy_device) |
| 429 | 431 | return phydrv->match_phy_device(phydev); |
| 430 | 432 | |
| 431 | − return (phydrv->phy_id & phydrv->phy_id_mask) == | |
| 432 | − (phydev->phy_id & phydrv->phy_id_mask); | |
| 433 | + if (phydev->is_c45) { | |
| 434 | + for (i = 1; i < num_ids; i++) { | |
| 435 | + if (!(phydev->c45_ids.devices_in_package & (1 << i))) | |
| 436 | + continue; | |
| 437 | + | |
| 438 | + if ((phydrv->phy_id & phydrv->phy_id_mask) == | |
| 439 | + (phydev->c45_ids.device_ids[i] & | |
| 440 | + phydrv->phy_id_mask)) | |
| 441 | + return 1; | |
| 442 | + } | |
| 443 | + return 0; | |
| 444 | + } else { | |
| 445 | + return (phydrv->phy_id & phydrv->phy_id_mask) == | |
| 446 | + (phydev->phy_id & phydrv->phy_id_mask); | |
| 447 | + } | |
| 433 | 448 | } |
| 434 | 449 | |
| 435 | 450 | #ifdef CONFIG_PM |
| @@ -757,6 +757,7 @@ static const struct usb_device_id products[] = { · 756 unmodified lines | ||
| 757 | 757 | {QMI_FIXED_INTF(0x1199, 0x901c, 8)}, /* Sierra Wireless EM7700 */ |
| 758 | 758 | {QMI_FIXED_INTF(0x1199, 0x901f, 8)}, /* Sierra Wireless EM7355 */ |
| 759 | 759 | {QMI_FIXED_INTF(0x1199, 0x9041, 8)}, /* Sierra Wireless MC7305/MC7355 */ |
| 760 | + {QMI_FIXED_INTF(0x1199, 0x9041, 10)}, /* Sierra Wireless MC7305/MC7355 */ | |
| 760 | 761 | {QMI_FIXED_INTF(0x1199, 0x9051, 8)}, /* Netgear AirCard 340U */ |
| 761 | 762 | {QMI_FIXED_INTF(0x1199, 0x9053, 8)}, /* Sierra Wireless Modem */ |
| 762 | 763 | {QMI_FIXED_INTF(0x1199, 0x9054, 8)}, /* Sierra Wireless Modem */ |
| @@ -27,7 +27,7 @@ · 26 unmodified lines | ||
| 27 | 27 | #include <linux/usb/cdc.h> |
| 28 | 28 | |
| 29 | 29 | /* Version Information */ |
| 30 | −#define DRIVER_VERSION "v1.08.0 (2015/01/13)" | |
| 30 | +#define DRIVER_VERSION "v1.08.1 (2015/07/28)" | |
| 31 | 31 | #define DRIVER_AUTHOR "Realtek linux nic maintainers <nic_swsd@realtek.com>" |
| 32 | 32 | #define DRIVER_DESC "Realtek RTL8152/RTL8153 Based USB Ethernet Adapters" |
| 33 | 33 | #define MODULENAME "r8152" |
| @@ -1902,11 +1902,10 @@ static void rtl_drop_queued_tx(struct r8152 *tp) · 1868 unmodified lines | ||
| 1902 | 1902 | static void rtl8152_tx_timeout(struct net_device *netdev) |
| 1903 | 1903 | { |
| 1904 | 1904 | struct r8152 *tp = netdev_priv(netdev); |
| 1905 | − int i; | |
| 1906 | 1905 | |
| 1907 | 1906 | netif_warn(tp, tx_err, netdev, "Tx timeout\n"); |
| 1908 | − for (i = 0; i < RTL8152_MAX_TX; i++) | |
| 1909 | − usb_unlink_urb(tp->tx_info[i].urb); | |
| 1907 | + | |
| 1908 | + usb_queue_reset_device(tp->intf); | |
| 1910 | 1909 | } |
| 1911 | 1910 | |
| 1912 | 1911 | static void rtl8152_set_rx_mode(struct net_device *netdev) |
| @@ -2075,7 +2074,6 @@ static int rtl_start_rx(struct r8152 *tp) · 162 unmodified lines | ||
| 2075 | 2074 | { |
| 2076 | 2075 | int i, ret = 0; |
| 2077 | 2076 | |
| 2078 | − napi_disable(&tp->napi); | |
| 2079 | 2077 | INIT_LIST_HEAD(&tp->rx_done); |
| 2080 | 2078 | for (i = 0; i < RTL8152_MAX_RX; i++) { |
| 2081 | 2079 | INIT_LIST_HEAD(&tp->rx_info[i].list); |
| @@ -2083,7 +2081,6 @@ static int rtl_start_rx(struct r8152 *tp) · 1 unmodified line | ||
| 2083 | 2081 | if (ret) |
| 2084 | 2082 | break; |
| 2085 | 2083 | } |
| 2086 | − napi_enable(&tp->napi); | |
| 2087 | 2084 | |
| 2088 | 2085 | if (ret && ++i < RTL8152_MAX_RX) { |
| 2089 | 2086 | struct list_head rx_queue; |
| @@ -2166,6 +2163,7 @@ static int rtl8153_enable(struct r8152 *tp) · 76 unmodified lines | ||
| 2166 | 2163 | if (test_bit(RTL8152_UNPLUG, &tp->flags)) |
| 2167 | 2164 | return -ENODEV; |
| 2168 | 2165 | |
| 2166 | + usb_disable_lpm(tp->udev); | |
| 2169 | 2167 | set_tx_qlen(tp); |
| 2170 | 2168 | rtl_set_eee_plus(tp); |
| 2171 | 2169 | r8153_set_rx_early_timeout(tp); |
| @@ -2337,11 +2335,61 @@ static void __rtl_set_wol(struct r8152 *tp, u32 wolopts) · 165 unmodified lines | ||
| 2337 | 2335 | device_set_wakeup_enable(&tp->udev->dev, false); |
| 2338 | 2336 | } |
| 2339 | 2337 | |
| 2338 | +static void r8153_u1u2en(struct r8152 *tp, bool enable) | |
| 2339 | +{ | |
| 2340 | + u8 u1u2[8]; | |
| 2341 | + | |
| 2342 | + if (enable) | |
| 2343 | + memset(u1u2, 0xff, sizeof(u1u2)); | |
| 2344 | + else | |
| 2345 | + memset(u1u2, 0x00, sizeof(u1u2)); | |
| 2346 | + | |
| 2347 | + usb_ocp_write(tp, USB_TOLERANCE, BYTE_EN_SIX_BYTES, sizeof(u1u2), u1u2); | |
| 2348 | +} | |
| 2349 | + | |
| 2350 | +static void r8153_u2p3en(struct r8152 *tp, bool enable) | |
| 2351 | +{ | |
| 2352 | + u32 ocp_data; | |
| 2353 | + | |
| 2354 | + ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_U2P3_CTRL); | |
| 2355 | + if (enable && tp->version != RTL_VER_03 && tp->version != RTL_VER_04) | |
| 2356 | + ocp_data |= U2P3_ENABLE; | |
| 2357 | + else | |
| 2358 | + ocp_data &= ~U2P3_ENABLE; | |
| 2359 | + ocp_write_word(tp, MCU_TYPE_USB, USB_U2P3_CTRL, ocp_data); | |
| 2360 | +} | |
| 2361 | + | |
| 2362 | +static void r8153_power_cut_en(struct r8152 *tp, bool enable) | |
| 2363 | +{ | |
| 2364 | + u32 ocp_data; | |
| 2365 | + | |
| 2366 | + ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_POWER_CUT); | |
| 2367 | + if (enable) | |
| 2368 | + ocp_data |= PWR_EN | PHASE2_EN; | |
| 2369 | + else | |
| 2370 | + ocp_data &= ~(PWR_EN | PHASE2_EN); | |
| 2371 | + ocp_write_word(tp, MCU_TYPE_USB, USB_POWER_CUT, ocp_data); | |
| 2372 | + | |
| 2373 | + ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_MISC_0); | |
| 2374 | + ocp_data &= ~PCUT_STATUS; | |
| 2375 | + ocp_write_word(tp, MCU_TYPE_USB, USB_MISC_0, ocp_data); | |
| 2376 | +} | |
| 2377 | + | |
| 2378 | +static bool rtl_can_wakeup(struct r8152 *tp) | |
| 2379 | +{ | |
| 2380 | + struct usb_device *udev = tp->udev; | |
| 2381 | + | |
| 2382 | + return (udev->actconfig->desc.bmAttributes & USB_CONFIG_ATT_WAKEUP); | |
| 2383 | +} | |
| 2384 | + | |
| 2340 | 2385 | static void rtl_runtime_suspend_enable(struct r8152 *tp, bool enable) |
| 2341 | 2386 | { |
| 2342 | 2387 | if (enable) { |
| 2343 | 2388 | u32 ocp_data; |
| 2344 | 2389 | |
| 2390 | + r8153_u1u2en(tp, false); | |
| 2391 | + r8153_u2p3en(tp, false); | |
| 2392 | + | |
| 2345 | 2393 | __rtl_set_wol(tp, WAKE_ANY); |
| 2346 | 2394 | |
| 2347 | 2395 | ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_CONFIG); |
| @@ -2353,6 +2401,8 @@ static void rtl_runtime_suspend_enable(struct r8152 *tp, bool enable) · 5 unmodified lines | ||
| 2353 | 2401 | ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML); |
| 2354 | 2402 | } else { |
| 2355 | 2403 | __rtl_set_wol(tp, tp->saved_wolopts); |
| 2404 | + r8153_u2p3en(tp, true); | |
| 2405 | + r8153_u1u2en(tp, true); | |
| 2356 | 2406 | } |
| 2357 | 2407 | } |
| 2358 | 2408 | |
| @@ -2599,46 +2649,6 @@ static void r8153_hw_phy_cfg(struct r8152 *tp) · 240 unmodified lines | ||
| 2599 | 2649 | set_bit(PHY_RESET, &tp->flags); |
| 2600 | 2650 | } |
| 2601 | 2651 | |
| 2602 | −static void r8153_u1u2en(struct r8152 *tp, bool enable) | |
| 2603 | −{ | |
| 2604 | − u8 u1u2[8]; | |
| 2605 | − | |
| 2606 | − if (enable) | |
| 2607 | − memset(u1u2, 0xff, sizeof(u1u2)); | |
| 2608 | − else | |
| 2609 | − memset(u1u2, 0x00, sizeof(u1u2)); | |
| 2610 | − | |
| 2611 | − usb_ocp_write(tp, USB_TOLERANCE, BYTE_EN_SIX_BYTES, sizeof(u1u2), u1u2); | |
| 2612 | −} | |
| 2613 | − | |
| 2614 | −static void r8153_u2p3en(struct r8152 *tp, bool enable) | |
| 2615 | −{ | |
| 2616 | − u32 ocp_data; | |
| 2617 | − | |
| 2618 | − ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_U2P3_CTRL); | |
| 2619 | − if (enable) | |
| 2620 | − ocp_data |= U2P3_ENABLE; | |
| 2621 | − else | |
| 2622 | − ocp_data &= ~U2P3_ENABLE; | |
| 2623 | − ocp_write_word(tp, MCU_TYPE_USB, USB_U2P3_CTRL, ocp_data); | |
| 2624 | −} | |
| 2625 | − | |
| 2626 | −static void r8153_power_cut_en(struct r8152 *tp, bool enable) | |
| 2627 | −{ | |
| 2628 | − u32 ocp_data; | |
| 2629 | − | |
| 2630 | − ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_POWER_CUT); | |
| 2631 | − if (enable) | |
| 2632 | − ocp_data |= PWR_EN | PHASE2_EN; | |
| 2633 | − else | |
| 2634 | − ocp_data &= ~(PWR_EN | PHASE2_EN); | |
| 2635 | − ocp_write_word(tp, MCU_TYPE_USB, USB_POWER_CUT, ocp_data); | |
| 2636 | − | |
| 2637 | − ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_MISC_0); | |
| 2638 | − ocp_data &= ~PCUT_STATUS; | |
| 2639 | − ocp_write_word(tp, MCU_TYPE_USB, USB_MISC_0, ocp_data); | |
| 2640 | −} | |
| 2641 | − | |
| 2642 | 2652 | static void r8153_first_init(struct r8152 *tp) |
| 2643 | 2653 | { |
| 2644 | 2654 | u32 ocp_data; |
| @@ -2781,6 +2791,7 @@ static void rtl8153_disable(struct r8152 *tp) · 136 unmodified lines | ||
| 2781 | 2791 | r8153_disable_aldps(tp); |
| 2782 | 2792 | rtl_disable(tp); |
| 2783 | 2793 | r8153_enable_aldps(tp); |
| 2794 | + usb_enable_lpm(tp->udev); | |
| 2784 | 2795 | } |
| 2785 | 2796 | |
| 2786 | 2797 | static int rtl8152_set_speed(struct r8152 *tp, u8 autoneg, u16 speed, u8 duplex) |
| @@ -2901,9 +2912,13 @@ static void rtl8153_up(struct r8152 *tp) · 114 unmodified lines | ||
| 2901 | 2912 | if (test_bit(RTL8152_UNPLUG, &tp->flags)) |
| 2902 | 2913 | return; |
| 2903 | 2914 | |
| 2915 | + r8153_u1u2en(tp, false); | |
| 2904 | 2916 | r8153_disable_aldps(tp); |
| 2905 | 2917 | r8153_first_init(tp); |
| 2906 | 2918 | r8153_enable_aldps(tp); |
| 2919 | + r8153_u2p3en(tp, true); | |
| 2920 | + r8153_u1u2en(tp, true); | |
| 2921 | + usb_enable_lpm(tp->udev); | |
| 2907 | 2922 | } |
| 2908 | 2923 | |
| 2909 | 2924 | static void rtl8153_down(struct r8152 *tp) |
| @@ -2914,6 +2929,7 @@ static void rtl8153_down(struct r8152 *tp) · 4 unmodified lines | ||
| 2914 | 2929 | } |
| 2915 | 2930 | |
| 2916 | 2931 | r8153_u1u2en(tp, false); |
| 2932 | + r8153_u2p3en(tp, false); | |
| 2917 | 2933 | r8153_power_cut_en(tp, false); |
| 2918 | 2934 | r8153_disable_aldps(tp); |
| 2919 | 2935 | r8153_enter_oob(tp); |
| @@ -2932,8 +2948,10 @@ static void set_carrier(struct r8152 *tp) · 12 unmodified lines | ||
| 2932 | 2948 | if (!netif_carrier_ok(netdev)) { |
| 2933 | 2949 | tp->rtl_ops.enable(tp); |
| 2934 | 2950 | set_bit(RTL8152_SET_RX_MODE, &tp->flags); |
| 2951 | + napi_disable(&tp->napi); | |
| 2935 | 2952 | netif_carrier_on(netdev); |
| 2936 | 2953 | rtl_start_rx(tp); |
| 2954 | + napi_enable(&tp->napi); | |
| 2937 | 2955 | } |
| 2938 | 2956 | } else { |
| 2939 | 2957 | if (netif_carrier_ok(netdev)) { |
| @@ -3252,6 +3270,7 @@ static void r8153_init(struct r8152 *tp) · 312 unmodified lines | ||
| 3252 | 3270 | msleep(20); |
| 3253 | 3271 | } |
| 3254 | 3272 | |
| 3273 | + usb_disable_lpm(tp->udev); | |
| 3255 | 3274 | r8153_u2p3en(tp, false); |
| 3256 | 3275 | |
| 3257 | 3276 | if (tp->version == RTL_VER_04) { |
| @@ -3319,6 +3338,59 @@ static void r8153_init(struct r8152 *tp) · 61 unmodified lines | ||
| 3319 | 3338 | r8153_enable_aldps(tp); |
| 3320 | 3339 | r8152b_enable_fc(tp); |
| 3321 | 3340 | rtl_tally_reset(tp); |
| 3341 | + r8153_u2p3en(tp, true); | |
| 3342 | +} | |
| 3343 | + | |
| 3344 | +static int rtl8152_pre_reset(struct usb_interface *intf) | |
| 3345 | +{ | |
| 3346 | + struct r8152 *tp = usb_get_intfdata(intf); | |
| 3347 | + struct net_device *netdev; | |
| 3348 | + | |
| 3349 | + if (!tp) | |
| 3350 | + return 0; | |
| 3351 | + | |
| 3352 | + netdev = tp->netdev; | |
| 3353 | + if (!netif_running(netdev)) | |
| 3354 | + return 0; | |
| 3355 | + | |
| 3356 | + napi_disable(&tp->napi); | |
| 3357 | + clear_bit(WORK_ENABLE, &tp->flags); | |
| 3358 | + usb_kill_urb(tp->intr_urb); | |
| 3359 | + cancel_delayed_work_sync(&tp->schedule); | |
| 3360 | + if (netif_carrier_ok(netdev)) { | |
| 3361 | + netif_stop_queue(netdev); | |
| 3362 | + mutex_lock(&tp->control); | |
| 3363 | + tp->rtl_ops.disable(tp); | |
| 3364 | + mutex_unlock(&tp->control); | |
| 3365 | + } | |
| 3366 | + | |
| 3367 | + return 0; | |
| 3368 | +} | |
| 3369 | + | |
| 3370 | +static int rtl8152_post_reset(struct usb_interface *intf) | |
| 3371 | +{ | |
| 3372 | + struct r8152 *tp = usb_get_intfdata(intf); | |
| 3373 | + struct net_device *netdev; | |
| 3374 | + | |
| 3375 | + if (!tp) | |
| 3376 | + return 0; | |
| 3377 | + | |
| 3378 | + netdev = tp->netdev; | |
| 3379 | + if (!netif_running(netdev)) | |
| 3380 | + return 0; | |
| 3381 | + | |
| 3382 | + set_bit(WORK_ENABLE, &tp->flags); | |
| 3383 | + if (netif_carrier_ok(netdev)) { | |
| 3384 | + mutex_lock(&tp->control); | |
| 3385 | + tp->rtl_ops.enable(tp); | |
| 3386 | + rtl8152_set_rx_mode(netdev); | |
| 3387 | + mutex_unlock(&tp->control); | |
| 3388 | + netif_wake_queue(netdev); | |
| 3389 | + } | |
| 3390 | + | |
| 3391 | + napi_enable(&tp->napi); | |
| 3392 | + | |
| 3393 | + return 0; | |
| 3322 | 3394 | } |
| 3323 | 3395 | |
| 3324 | 3396 | static int rtl8152_suspend(struct usb_interface *intf, pm_message_t message) |
| @@ -3374,9 +3446,11 @@ static int rtl8152_resume(struct usb_interface *intf) · 49 unmodified lines | ||
| 3374 | 3446 | if (test_bit(SELECTIVE_SUSPEND, &tp->flags)) { |
| 3375 | 3447 | rtl_runtime_suspend_enable(tp, false); |
| 3376 | 3448 | clear_bit(SELECTIVE_SUSPEND, &tp->flags); |
| 3449 | + napi_disable(&tp->napi); | |
| 3377 | 3450 | set_bit(WORK_ENABLE, &tp->flags); |
| 3378 | 3451 | if (netif_carrier_ok(tp->netdev)) |
| 3379 | 3452 | rtl_start_rx(tp); |
| 3453 | + napi_enable(&tp->napi); | |
| 3380 | 3454 | } else { |
| 3381 | 3455 | tp->rtl_ops.up(tp); |
| 3382 | 3456 | rtl8152_set_speed(tp, AUTONEG_ENABLE, |
| @@ -3403,12 +3477,15 @@ static void rtl8152_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol) · 20 unmodified lines | ||
| 3403 | 3477 | if (usb_autopm_get_interface(tp->intf) < 0) |
| 3404 | 3478 | return; |
| 3405 | 3479 | |
| 3406 | − mutex_lock(&tp->control); | |
| 3407 | − | |
| 3408 | − wol->supported = WAKE_ANY; | |
| 3409 | − wol->wolopts = __rtl_get_wol(tp); | |
| 3410 | − | |
| 3411 | − mutex_unlock(&tp->control); | |
| 3480 | + if (!rtl_can_wakeup(tp)) { | |
| 3481 | + wol->supported = 0; | |
| 3482 | + wol->wolopts = 0; | |
| 3483 | + } else { | |
| 3484 | + mutex_lock(&tp->control); | |
| 3485 | + wol->supported = WAKE_ANY; | |
| 3486 | + wol->wolopts = __rtl_get_wol(tp); | |
| 3487 | + mutex_unlock(&tp->control); | |
| 3488 | + } | |
| 3412 | 3489 | |
| 3413 | 3490 | usb_autopm_put_interface(tp->intf); |
| 3414 | 3491 | } |
| @@ -3418,6 +3495,9 @@ static int rtl8152_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol) · 3 unmodified lines | ||
| 3418 | 3495 | struct r8152 *tp = netdev_priv(dev); |
| 3419 | 3496 | int ret; |
| 3420 | 3497 | |
| 3498 | + if (!rtl_can_wakeup(tp)) | |
| 3499 | + return -EOPNOTSUPP; | |
| 3500 | + | |
| 3421 | 3501 | ret = usb_autopm_get_interface(tp->intf); |
| 3422 | 3502 | if (ret < 0) |
| 3423 | 3503 | goto out_set_wol; |
| @@ -4059,6 +4139,9 @@ static int rtl8152_probe(struct usb_interface *intf, · 635 unmodified lines | ||
| 4059 | 4139 | goto out1; |
| 4060 | 4140 | } |
| 4061 | 4141 | |
| 4142 | + if (!rtl_can_wakeup(tp)) | |
| 4143 | + __rtl_set_wol(tp, 0); | |
| 4144 | + | |
| 4062 | 4145 | tp->saved_wolopts = __rtl_get_wol(tp); |
| 4063 | 4146 | if (tp->saved_wolopts) |
| 4064 | 4147 | device_set_wakeup_enable(&udev->dev, true); |
| @@ -4132,6 +4215,8 @@ static struct usb_driver rtl8152_driver = { · 67 unmodified lines | ||
| 4132 | 4215 | .suspend = rtl8152_suspend, |
| 4133 | 4216 | .resume = rtl8152_resume, |
| 4134 | 4217 | .reset_resume = rtl8152_resume, |
| 4218 | + .pre_reset = rtl8152_pre_reset, | |
| 4219 | + .post_reset = rtl8152_post_reset, | |
| 4135 | 4220 | .supports_autosuspend = 1, |
| 4136 | 4221 | .disable_hub_initiated_lpm = 1, |
| 4137 | 4222 | }; |
| @@ -1756,9 +1756,9 @@ static int virtnet_probe(struct virtio_device *vdev) · 1755 unmodified lines | ||
| 1756 | 1756 | /* Do we support "hardware" checksums? */ |
| 1757 | 1757 | if (virtio_has_feature(vdev, VIRTIO_NET_F_CSUM)) { |
| 1758 | 1758 | /* This opens up the world of extra features. */ |
| 1759 | − dev->hw_features |= NETIF_F_HW_CSUM|NETIF_F_SG|NETIF_F_FRAGLIST; | |
| 1759 | + dev->hw_features |= NETIF_F_HW_CSUM | NETIF_F_SG; | |
| 1760 | 1760 | if (csum) |
| 1761 | − dev->features |= NETIF_F_HW_CSUM|NETIF_F_SG|NETIF_F_FRAGLIST; | |
| 1761 | + dev->features |= NETIF_F_HW_CSUM | NETIF_F_SG; | |
| 1762 | 1762 | |
| 1763 | 1763 | if (virtio_has_feature(vdev, VIRTIO_NET_F_GSO)) { |
| 1764 | 1764 | dev->hw_features |= NETIF_F_TSO | NETIF_F_UFO |
| @@ -1828,7 +1828,8 @@ static int virtnet_probe(struct virtio_device *vdev) · 63 unmodified lines | ||
| 1828 | 1828 | else |
| 1829 | 1829 | vi->hdr_len = sizeof(struct virtio_net_hdr); |
| 1830 | 1830 | |
| 1831 | − if (virtio_has_feature(vdev, VIRTIO_F_ANY_LAYOUT)) | |
| 1831 | + if (virtio_has_feature(vdev, VIRTIO_F_ANY_LAYOUT) || | |
| 1832 | + virtio_has_feature(vdev, VIRTIO_F_VERSION_1)) | |
| 1832 | 1833 | vi->any_header_sg = true; |
| 1833 | 1834 | |
| 1834 | 1835 | if (virtio_has_feature(vdev, VIRTIO_NET_F_CTRL_VQ)) |
| @@ -589,7 +589,8 @@ static int cosa_probe(int base, int irq, int dma) · 588 unmodified lines | ||
| 589 | 589 | chan->netdev->base_addr = chan->cosa->datareg; |
| 590 | 590 | chan->netdev->irq = chan->cosa->irq; |
| 591 | 591 | chan->netdev->dma = chan->cosa->dma; |
| 592 | − if (register_hdlc_device(chan->netdev)) { | |
| 592 | + err = register_hdlc_device(chan->netdev); | |
| 593 | + if (err) { | |
| 593 | 594 | netdev_warn(chan->netdev, |
| 594 | 595 | "register_hdlc_device() failed\n"); |
| 595 | 596 | free_netdev(chan->netdev); |
| @@ -279,6 +279,7 @@ static void ath9k_hw_read_revisions(struct ath_hw *ah) · 278 unmodified lines | ||
| 279 | 279 | return; |
| 280 | 280 | case AR9300_DEVID_QCA956X: |
| 281 | 281 | ah->hw_version.macVersion = AR_SREV_VERSION_9561; |
| 282 | + return; | |
| 282 | 283 | } |
| 283 | 284 | |
| 284 | 285 | val = REG_READ(ah, AR_SREV) & AR_SREV_ID; |
| @@ -3728,7 +3728,7 @@ const u32 *b43_nphy_get_tx_gain_table(struct b43_wldev *dev) · 3727 unmodified lines | ||
| 3728 | 3728 | switch (phy->rev) { |
| 3729 | 3729 | case 6: |
| 3730 | 3730 | case 5: |
| 3731 | − if (sprom->fem.ghz5.extpa_gain == 3) | |
| 3731 | + if (sprom->fem.ghz2.extpa_gain == 3) | |
| 3732 | 3732 | return b43_ntab_tx_gain_epa_rev3_hi_pwr_2g; |
| 3733 | 3733 | /* fall through */ |
| 3734 | 3734 | case 4: |
| @@ -438,6 +438,12 @@ static inline unsigned int FH_MEM_CBBC_QUEUE(unsigned int chnl) · 437 unmodified lines | ||
| 438 | 438 | #define RX_QUEUE_MASK 255 |
| 439 | 439 | #define RX_QUEUE_SIZE_LOG 8 |
| 440 | 440 | |
| 441 | +/* | |
| 442 | + * RX related structures and functions | |
| 443 | + */ | |
| 444 | +#define RX_FREE_BUFFERS 64 | |
| 445 | +#define RX_LOW_WATERMARK 8 | |
| 446 | + | |
| 441 | 447 | /** |
| 442 | 448 | * struct iwl_rb_status - reserve buffer status |
| 443 | 449 | * host memory mapped FH registers |
| @@ -540,13 +540,11 @@ static void iwl_set_hw_address_family_8000(struct device *dev, · 539 unmodified lines | ||
| 540 | 540 | hw_addr = (const u8 *)(mac_override + |
| 541 | 541 | MAC_ADDRESS_OVERRIDE_FAMILY_8000); |
| 542 | 542 | |
| 543 | − /* The byte order is little endian 16 bit, meaning 214365 */ | |
| 544 | − data->hw_addr[0] = hw_addr[1]; | |
| 545 | − data->hw_addr[1] = hw_addr[0]; | |
| 546 | − data->hw_addr[2] = hw_addr[3]; | |
| 547 | − data->hw_addr[3] = hw_addr[2]; | |
| 548 | − data->hw_addr[4] = hw_addr[5]; | |
| 549 | − data->hw_addr[5] = hw_addr[4]; | |
| 543 | + /* | |
| 544 | + * Store the MAC address from MAO section. | |
| 545 | + * No byte swapping is required in MAO section | |
| 546 | + */ | |
| 547 | + memcpy(data->hw_addr, hw_addr, ETH_ALEN); | |
| 550 | 548 | |
| 551 | 549 | /* |
| 552 | 550 | * Force the use of the OTP MAC address in case of reserved MAC |
| @@ -660,7 +660,8 @@ struct iwl_scan_config { · 659 unmodified lines | ||
| 660 | 660 | * iwl_umac_scan_flags |
| 661 | 661 | *@IWL_UMAC_SCAN_FLAG_PREEMPTIVE: scan process triggered by this scan request |
| 662 | 662 | * can be preempted by other scan requests with higher priority. |
| 663 | − * The low priority scan is aborted. | |
| 663 | + * The low priority scan will be resumed when the higher proirity scan is | |
| 664 | + * completed. | |
| 664 | 665 | *@IWL_UMAC_SCAN_FLAG_START_NOTIF: notification will be sent to the driver |
| 665 | 666 | * when scan starts. |
| 666 | 667 | */ |
| @@ -1023,7 +1023,7 @@ static void iwl_mvm_scan_umac_dwell(struct iwl_mvm *mvm, · 1022 unmodified lines | ||
| 1023 | 1023 | cmd->scan_priority = |
| 1024 | 1024 | iwl_mvm_scan_priority(mvm, IWL_SCAN_PRIORITY_EXT_6); |
| 1025 | 1025 | |
| 1026 | − if (iwl_mvm_scan_total_iterations(params) == 0) | |
| 1026 | + if (iwl_mvm_scan_total_iterations(params) == 1) | |
| 1027 | 1027 | cmd->ooc_priority = |
| 1028 | 1028 | iwl_mvm_scan_priority(mvm, IWL_SCAN_PRIORITY_EXT_6); |
| 1029 | 1029 | else |
| @@ -1109,6 +1109,9 @@ static int iwl_mvm_scan_umac(struct iwl_mvm *mvm, struct ieee80211_vif *vif, · 79 unmodified lines | ||
| 1109 | 1109 | cmd->uid = cpu_to_le32(uid); |
| 1110 | 1110 | cmd->general_flags = cpu_to_le32(iwl_mvm_scan_umac_flags(mvm, params)); |
| 1111 | 1111 | |
| 1112 | + if (type == IWL_MVM_SCAN_SCHED) | |
| 1113 | + cmd->flags = cpu_to_le32(IWL_UMAC_SCAN_FLAG_PREEMPTIVE); | |
| 1114 | + | |
| 1112 | 1115 | if (iwl_mvm_scan_use_ebs(mvm, vif, n_iterations)) |
| 1113 | 1116 | cmd->channel_flags = IWL_SCAN_CHANNEL_FLAG_EBS | |
| 1114 | 1117 | IWL_SCAN_CHANNEL_FLAG_EBS_ACCURATE | |
| @@ -1401,6 +1401,7 @@ int iwl_mvm_set_sta_key(struct iwl_mvm *mvm, · 1400 unmodified lines | ||
| 1401 | 1401 | bool mcast = !(keyconf->flags & IEEE80211_KEY_FLAG_PAIRWISE); |
| 1402 | 1402 | u8 sta_id; |
| 1403 | 1403 | int ret; |
| 1404 | + static const u8 __maybe_unused zero_addr[ETH_ALEN] = {0}; | |
| 1404 | 1405 | |
| 1405 | 1406 | lockdep_assert_held(&mvm->mutex); |
| 1406 | 1407 | |
| @@ -1467,7 +1468,7 @@ int iwl_mvm_set_sta_key(struct iwl_mvm *mvm, · 60 unmodified lines | ||
| 1467 | 1468 | end: |
| 1468 | 1469 | IWL_DEBUG_WEP(mvm, "key: cipher=%x len=%d idx=%d sta=%pM ret=%d\n", |
| 1469 | 1470 | keyconf->cipher, keyconf->keylen, keyconf->keyidx, |
| 1470 | − sta->addr, ret); | |
| 1471 | + sta ? sta->addr : zero_addr, ret); | |
| 1471 | 1472 | return ret; |
| 1472 | 1473 | } |
| 1473 | 1474 | |
| @@ -86,7 +86,7 @@ void iwl_mvm_te_clear_data(struct iwl_mvm *mvm, · 85 unmodified lines | ||
| 86 | 86 | { |
| 87 | 87 | lockdep_assert_held(&mvm->time_event_lock); |
| 88 | 88 | |
| 89 | − if (te_data->id == TE_MAX) | |
| 89 | + if (!te_data->vif) | |
| 90 | 90 | return; |
| 91 | 91 | |
| 92 | 92 | list_del(&te_data->list); |
| @@ -252,7 +252,7 @@ void iwl_mvm_set_tx_cmd_rate(struct iwl_mvm *mvm, struct iwl_tx_cmd *tx_cmd, · 251 unmodified lines | ||
| 252 | 252 | |
| 253 | 253 | if (info->band == IEEE80211_BAND_2GHZ && |
| 254 | 254 | !iwl_mvm_bt_coex_is_shared_ant_avail(mvm)) |
| 255 | − rate_flags = BIT(mvm->cfg->non_shared_ant) << RATE_MCS_ANT_POS; | |
| 255 | + rate_flags = mvm->cfg->non_shared_ant << RATE_MCS_ANT_POS; | |
| 256 | 256 | else |
| 257 | 257 | rate_flags = |
| 258 | 258 | BIT(mvm->mgmt_last_antenna_idx) << RATE_MCS_ANT_POS; |
| @@ -368,12 +368,14 @@ static const struct pci_device_id iwl_hw_card_ids[] = { · 367 unmodified lines | ||
| 368 | 368 | /* 3165 Series */ |
| 369 | 369 | {IWL_PCI_DEVICE(0x3165, 0x4010, iwl3165_2ac_cfg)}, |
| 370 | 370 | {IWL_PCI_DEVICE(0x3165, 0x4012, iwl3165_2ac_cfg)}, |
| 371 | + {IWL_PCI_DEVICE(0x3166, 0x4212, iwl3165_2ac_cfg)}, | |
| 371 | 372 | {IWL_PCI_DEVICE(0x3165, 0x4410, iwl3165_2ac_cfg)}, |
| 372 | 373 | {IWL_PCI_DEVICE(0x3165, 0x4510, iwl3165_2ac_cfg)}, |
| 373 | 374 | {IWL_PCI_DEVICE(0x3165, 0x4110, iwl3165_2ac_cfg)}, |
| 374 | 375 | {IWL_PCI_DEVICE(0x3166, 0x4310, iwl3165_2ac_cfg)}, |
| 375 | 376 | {IWL_PCI_DEVICE(0x3166, 0x4210, iwl3165_2ac_cfg)}, |
| 376 | 377 | {IWL_PCI_DEVICE(0x3165, 0x8010, iwl3165_2ac_cfg)}, |
| 378 | + {IWL_PCI_DEVICE(0x3165, 0x8110, iwl3165_2ac_cfg)}, | |
| 377 | 379 | |
| 378 | 380 | /* 7265 Series */ |
| 379 | 381 | {IWL_PCI_DEVICE(0x095A, 0x5010, iwl7265_2ac_cfg)}, |
| @@ -426,9 +428,8 @@ static const struct pci_device_id iwl_hw_card_ids[] = { · 46 unmodified lines | ||
| 426 | 428 | {IWL_PCI_DEVICE(0x24F4, 0x1130, iwl8260_2ac_cfg)}, |
| 427 | 429 | {IWL_PCI_DEVICE(0x24F4, 0x1030, iwl8260_2ac_cfg)}, |
| 428 | 430 | {IWL_PCI_DEVICE(0x24F3, 0xC010, iwl8260_2ac_cfg)}, |
| 431 | + {IWL_PCI_DEVICE(0x24F3, 0xC110, iwl8260_2ac_cfg)}, | |
| 429 | 432 | {IWL_PCI_DEVICE(0x24F3, 0xD010, iwl8260_2ac_cfg)}, |
| 430 | − {IWL_PCI_DEVICE(0x24F4, 0xC030, iwl8260_2ac_cfg)}, | |
| 431 | − {IWL_PCI_DEVICE(0x24F4, 0xD030, iwl8260_2ac_cfg)}, | |
| 432 | 433 | {IWL_PCI_DEVICE(0x24F3, 0xC050, iwl8260_2ac_cfg)}, |
| 433 | 434 | {IWL_PCI_DEVICE(0x24F3, 0xD050, iwl8260_2ac_cfg)}, |
| 434 | 435 | {IWL_PCI_DEVICE(0x24F3, 0x8010, iwl8260_2ac_cfg)}, |
| @@ -44,15 +44,6 @@ · 43 unmodified lines | ||
| 44 | 44 | #include "iwl-io.h" |
| 45 | 45 | #include "iwl-op-mode.h" |
| 46 | 46 | |
| 47 | −/* | |
| 48 | − * RX related structures and functions | |
| 49 | − */ | |
| 50 | −#define RX_NUM_QUEUES 1 | |
| 51 | −#define RX_POST_REQ_ALLOC 2 | |
| 52 | −#define RX_CLAIM_REQ_ALLOC 8 | |
| 53 | −#define RX_POOL_SIZE ((RX_CLAIM_REQ_ALLOC - RX_POST_REQ_ALLOC) * RX_NUM_QUEUES) | |
| 54 | −#define RX_LOW_WATERMARK 8 | |
| 55 | − | |
| 56 | 47 | struct iwl_host_cmd; |
| 57 | 48 | |
| 58 | 49 | /*This file includes the declaration that are internal to the |
| @@ -86,29 +77,29 @@ struct isr_statistics { · 27 unmodified lines | ||
| 86 | 77 | * struct iwl_rxq - Rx queue |
| 87 | 78 | * @bd: driver's pointer to buffer of receive buffer descriptors (rbd) |
| 88 | 79 | * @bd_dma: bus address of buffer of receive buffer descriptors (rbd) |
| 80 | + * @pool: | |
| 81 | + * @queue: | |
| 89 | 82 | * @read: Shared index to newest available Rx buffer |
| 90 | 83 | * @write: Shared index to oldest written Rx packet |
| 91 | 84 | * @free_count: Number of pre-allocated buffers in rx_free |
| 92 | − * @used_count: Number of RBDs handled to allocator to use for allocation | |
| 93 | 85 | * @write_actual: |
| 94 | − * @rx_free: list of RBDs with allocated RB ready for use | |
| 95 | − * @rx_used: list of RBDs with no RB attached | |
| 86 | + * @rx_free: list of free SKBs for use | |
| 87 | + * @rx_used: List of Rx buffers with no SKB | |
| 96 | 88 | * @need_update: flag to indicate we need to update read/write index |
| 97 | 89 | * @rb_stts: driver's pointer to receive buffer status |
| 98 | 90 | * @rb_stts_dma: bus address of receive buffer status |
| 99 | 91 | * @lock: |
| 100 | − * @pool: initial pool of iwl_rx_mem_buffer for the queue | |
| 101 | − * @queue: actual rx queue | |
| 102 | 92 | * |
| 103 | 93 | * NOTE: rx_free and rx_used are used as a FIFO for iwl_rx_mem_buffers |
| 104 | 94 | */ |
| 105 | 95 | struct iwl_rxq { |
| 106 | 96 | __le32 *bd; |
| 107 | 97 | dma_addr_t bd_dma; |
| 98 | + struct iwl_rx_mem_buffer pool[RX_QUEUE_SIZE + RX_FREE_BUFFERS]; | |
| 99 | + struct iwl_rx_mem_buffer *queue[RX_QUEUE_SIZE]; | |
| 108 | 100 | u32 read; |
| 109 | 101 | u32 write; |
| 110 | 102 | u32 free_count; |
| 111 | − u32 used_count; | |
| 112 | 103 | u32 write_actual; |
| 113 | 104 | struct list_head rx_free; |
| 114 | 105 | struct list_head rx_used; |
| @@ -116,32 +107,6 @@ struct iwl_rxq { · 1 unmodified line | ||
| 116 | 107 | struct iwl_rb_status *rb_stts; |
| 117 | 108 | dma_addr_t rb_stts_dma; |
| 118 | 109 | spinlock_t lock; |
| 119 | − struct iwl_rx_mem_buffer pool[RX_QUEUE_SIZE]; | |
| 120 | − struct iwl_rx_mem_buffer *queue[RX_QUEUE_SIZE]; | |
| 121 | −}; | |
| 122 | − | |
| 123 | −/** | |
| 124 | − * struct iwl_rb_allocator - Rx allocator | |
| 125 | − * @pool: initial pool of allocator | |
| 126 | − * @req_pending: number of requests the allcator had not processed yet | |
| 127 | − * @req_ready: number of requests honored and ready for claiming | |
| 128 | − * @rbd_allocated: RBDs with pages allocated and ready to be handled to | |
| 129 | − * the queue. This is a list of &struct iwl_rx_mem_buffer | |
| 130 | − * @rbd_empty: RBDs with no page attached for allocator use. This is a list | |
| 131 | − * of &struct iwl_rx_mem_buffer | |
| 132 | − * @lock: protects the rbd_allocated and rbd_empty lists | |
| 133 | − * @alloc_wq: work queue for background calls | |
| 134 | − * @rx_alloc: work struct for background calls | |
| 135 | − */ | |
| 136 | −struct iwl_rb_allocator { | |
| 137 | − struct iwl_rx_mem_buffer pool[RX_POOL_SIZE]; | |
| 138 | − atomic_t req_pending; | |
| 139 | − atomic_t req_ready; | |
| 140 | − struct list_head rbd_allocated; | |
| 141 | − struct list_head rbd_empty; | |
| 142 | − spinlock_t lock; | |
| 143 | − struct workqueue_struct *alloc_wq; | |
| 144 | − struct work_struct rx_alloc; | |
| 145 | 110 | }; |
| 146 | 111 | |
| 147 | 112 | struct iwl_dma_ptr { |
| @@ -285,7 +250,7 @@ iwl_pcie_get_scratchbuf_dma(struct iwl_txq *txq, int idx) · 137 unmodified lines | ||
| 285 | 250 | /** |
| 286 | 251 | * struct iwl_trans_pcie - PCIe transport specific data |
| 287 | 252 | * @rxq: all the RX queue data |
| 288 | − * @rba: allocator for RX replenishing | |
| 253 | + * @rx_replenish: work that will be called when buffers need to be allocated | |
| 289 | 254 | * @drv - pointer to iwl_drv |
| 290 | 255 | * @trans: pointer to the generic transport area |
| 291 | 256 | * @scd_base_addr: scheduler sram base address in SRAM |
| @@ -308,7 +273,7 @@ iwl_pcie_get_scratchbuf_dma(struct iwl_txq *txq, int idx) · 16 unmodified lines | ||
| 308 | 273 | */ |
| 309 | 274 | struct iwl_trans_pcie { |
| 310 | 275 | struct iwl_rxq rxq; |
| 311 | − struct iwl_rb_allocator rba; | |
| 276 | + struct work_struct rx_replenish; | |
| 312 | 277 | struct iwl_trans *trans; |
| 313 | 278 | struct iwl_drv *drv; |
| 314 | 279 | |
| @@ -1,7 +1,7 @@ | ||
| 1 | 1 | /****************************************************************************** |
| 2 | 2 | * |
| 3 | 3 | * Copyright(c) 2003 - 2014 Intel Corporation. All rights reserved. |
| 4 | − * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH | |
| 4 | + * Copyright(c) 2013 - 2014 Intel Mobile Communications GmbH | |
| 5 | 5 | * |
| 6 | 6 | * Portions of this file are derived from the ipw3945 project, as well |
| 7 | 7 | * as portions of the ieee80211 subsystem header files. |
| @@ -74,29 +74,16 @@ · 66 unmodified lines | ||
| 74 | 74 | * resets the Rx queue buffers with new memory. |
| 75 | 75 | * |
| 76 | 76 | * The management in the driver is as follows: |
| 77 | − * + A list of pre-allocated RBDs is stored in iwl->rxq->rx_free. | |
| 78 | − * When the interrupt handler is called, the request is processed. | |
| 79 | − * The page is either stolen - transferred to the upper layer | |
| 80 | − * or reused - added immediately to the iwl->rxq->rx_free list. | |
| 81 | − * + When the page is stolen - the driver updates the matching queue's used | |
| 82 | − * count, detaches the RBD and transfers it to the queue used list. | |
| 83 | − * When there are two used RBDs - they are transferred to the allocator empty | |
| 84 | − * list. Work is then scheduled for the allocator to start allocating | |
| 85 | − * eight buffers. | |
| 86 | − * When there are another 6 used RBDs - they are transferred to the allocator | |
| 87 | − * empty list and the driver tries to claim the pre-allocated buffers and | |
| 88 | − * add them to iwl->rxq->rx_free. If it fails - it continues to claim them | |
| 89 | − * until ready. | |
| 90 | − * When there are 8+ buffers in the free list - either from allocation or from | |
| 91 | − * 8 reused unstolen pages - restock is called to update the FW and indexes. | |
| 92 | − * + In order to make sure the allocator always has RBDs to use for allocation | |
| 93 | − * the allocator has initial pool in the size of num_queues*(8-2) - the | |
| 94 | − * maximum missing RBDs per allocation request (request posted with 2 | |
| 95 | − * empty RBDs, there is no guarantee when the other 6 RBDs are supplied). | |
| 96 | − * The queues supplies the recycle of the rest of the RBDs. | |
| 77 | + * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free. When | |
| 78 | + * iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled | |
| 79 | + * to replenish the iwl->rxq->rx_free. | |
| 80 | + * + In iwl_pcie_rx_replenish (scheduled) if 'processed' != 'read' then the | |
| 81 | + * iwl->rxq is replenished and the READ INDEX is updated (updating the | |
| 82 | + * 'processed' and 'read' driver indexes as well) | |
| 97 | 83 | * + A received packet is processed and handed to the kernel network stack, |
| 98 | 84 | * detached from the iwl->rxq. The driver 'processed' index is updated. |
| 99 | − * + If there are no allocated buffers in iwl->rxq->rx_free, | |
| 85 | + * + The Host/Firmware iwl->rxq is replenished at irq thread time from the | |
| 86 | + * rx_free list. If there are no allocated buffers in iwl->rxq->rx_free, | |
| 100 | 87 | * the READ INDEX is not incremented and iwl->status(RX_STALLED) is set. |
| 101 | 88 | * If there were enough free buffers and RX_STALLED is set it is cleared. |
| 102 | 89 | * |
| @@ -105,32 +92,18 @@ · 2 unmodified lines | ||
| 105 | 92 | * |
| 106 | 93 | * iwl_rxq_alloc() Allocates rx_free |
| 107 | 94 | * iwl_pcie_rx_replenish() Replenishes rx_free list from rx_used, and calls |
| 108 | − * iwl_pcie_rxq_restock. | |
| 109 | − * Used only during initialization. | |
| 95 | + * iwl_pcie_rxq_restock | |
| 110 | 96 | * iwl_pcie_rxq_restock() Moves available buffers from rx_free into Rx |
| 111 | 97 | * queue, updates firmware pointers, and updates |
| 112 | − * the WRITE index. | |
| 113 | − * iwl_pcie_rx_allocator() Background work for allocating pages. | |
| 98 | + * the WRITE index. If insufficient rx_free buffers | |
| 99 | + * are available, schedules iwl_pcie_rx_replenish | |
| 114 | 100 | * |
| 115 | 101 | * -- enable interrupts -- |
| 116 | 102 | * ISR - iwl_rx() Detach iwl_rx_mem_buffers from pool up to the |
| 117 | 103 | * READ INDEX, detaching the SKB from the pool. |
| 118 | 104 | * Moves the packet buffer from queue to rx_used. |
| 119 | − * Posts and claims requests to the allocator. | |
| 120 | 105 | * Calls iwl_pcie_rxq_restock to refill any empty |
| 121 | 106 | * slots. |
| 122 | − * | |
| 123 | − * RBD life-cycle: | |
| 124 | − * | |
| 125 | − * Init: | |
| 126 | − * rxq.pool -> rxq.rx_used -> rxq.rx_free -> rxq.queue | |
| 127 | − * | |
| 128 | − * Regular Receive interrupt: | |
| 129 | − * Page Stolen: | |
| 130 | − * rxq.queue -> rxq.rx_used -> allocator.rbd_empty -> | |
| 131 | − * allocator.rbd_allocated -> rxq.rx_free -> rxq.queue | |
| 132 | − * Page not Stolen: | |
| 133 | − * rxq.queue -> rxq.rx_free -> rxq.queue | |
| 134 | 107 | * ... |
| 135 | 108 | * |
| 136 | 109 | */ |
| @@ -267,6 +240,10 @@ static void iwl_pcie_rxq_restock(struct iwl_trans *trans) · 130 unmodified lines | ||
| 267 | 240 | rxq->free_count--; |
| 268 | 241 | } |
| 269 | 242 | spin_unlock(&rxq->lock); |
| 243 | + /* If the pre-allocated buffer pool is dropping low, schedule to | |
| 244 | + * refill it */ | |
| 245 | + if (rxq->free_count <= RX_LOW_WATERMARK) | |
| 246 | + schedule_work(&trans_pcie->rx_replenish); | |
| 270 | 247 | |
| 271 | 248 | /* If we've added more space for the firmware to place data, tell it. |
| 272 | 249 | * Increment device's write pointer in multiples of 8. */ |
| @@ -277,44 +254,6 @@ static void iwl_pcie_rxq_restock(struct iwl_trans *trans) · 4 unmodified lines | ||
| 277 | 254 | } |
| 278 | 255 | } |
| 279 | 256 | |
| 280 | −/* | |
| 281 | − * iwl_pcie_rx_alloc_page - allocates and returns a page. | |
| 282 | − * | |
| 283 | − */ | |
| 284 | −static struct page *iwl_pcie_rx_alloc_page(struct iwl_trans *trans) | |
| 285 | −{ | |
| 286 | − struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans); | |
| 287 | − struct iwl_rxq *rxq = &trans_pcie->rxq; | |
| 288 | − struct page *page; | |
| 289 | − gfp_t gfp_mask = GFP_KERNEL; | |
| 290 | − | |
| 291 | − if (rxq->free_count > RX_LOW_WATERMARK) | |
| 292 | − gfp_mask |= __GFP_NOWARN; | |
| 293 | − | |
| 294 | − if (trans_pcie->rx_page_order > 0) | |
| 295 | − gfp_mask |= __GFP_COMP; | |
| 296 | − | |
| 297 | − /* Alloc a new receive buffer */ | |
| 298 | − page = alloc_pages(gfp_mask, trans_pcie->rx_page_order); | |
| 299 | − if (!page) { | |
| 300 | − if (net_ratelimit()) | |
| 301 | − IWL_DEBUG_INFO(trans, "alloc_pages failed, order: %d\n", | |
| 302 | − trans_pcie->rx_page_order); | |
| 303 | − /* Issue an error if the hardware has consumed more than half | |
| 304 | − * of its free buffer list and we don't have enough | |
| 305 | − * pre-allocated buffers. | |
| 306 | −` */ | |
| 307 | − if (rxq->free_count <= RX_LOW_WATERMARK && | |
| 308 | − iwl_rxq_space(rxq) > (RX_QUEUE_SIZE / 2) && | |
| 309 | − net_ratelimit()) | |
| 310 | − IWL_CRIT(trans, | |
| 311 | − "Failed to alloc_pages with GFP_KERNEL. Only %u free buffers remaining.\n", | |
| 312 | − rxq->free_count); | |
| 313 | − return NULL; | |
| 314 | − } | |
| 315 | − return page; | |
| 316 | −} | |
| 317 | − | |
| 318 | 257 | /* |
| 319 | 258 | * iwl_pcie_rxq_alloc_rbs - allocate a page for each used RBD |
| 320 | 259 | * |
| @@ -324,12 +263,13 @@ static struct page *iwl_pcie_rx_alloc_page(struct iwl_trans *trans) · 3 unmodified lines | ||
| 324 | 263 | * iwl_pcie_rxq_restock. The latter function will update the HW to use the newly |
| 325 | 264 | * allocated buffers. |
| 326 | 265 | */ |
| 327 | −static void iwl_pcie_rxq_alloc_rbs(struct iwl_trans *trans) | |
| 266 | +static void iwl_pcie_rxq_alloc_rbs(struct iwl_trans *trans, gfp_t priority) | |
| 328 | 267 | { |
| 329 | 268 | struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans); |
| 330 | 269 | struct iwl_rxq *rxq = &trans_pcie->rxq; |
| 331 | 270 | struct iwl_rx_mem_buffer *rxb; |
| 332 | 271 | struct page *page; |
| 272 | + gfp_t gfp_mask = priority; | |
| 333 | 273 | |
| 334 | 274 | while (1) { |
| 335 | 275 | spin_lock(&rxq->lock); |
| @@ -339,10 +279,32 @@ static void iwl_pcie_rxq_alloc_rbs(struct iwl_trans *trans) · 3 unmodified lines | ||
| 339 | 279 | } |
| 340 | 280 | spin_unlock(&rxq->lock); |
| 341 | 281 | |
| 282 | + if (rxq->free_count > RX_LOW_WATERMARK) | |
| 283 | + gfp_mask |= __GFP_NOWARN; | |
| 284 | + | |
| 285 | + if (trans_pcie->rx_page_order > 0) | |
| 286 | + gfp_mask |= __GFP_COMP; | |
| 287 | + | |
| 342 | 288 | /* Alloc a new receive buffer */ |
| 343 | − page = iwl_pcie_rx_alloc_page(trans); | |
| 344 | − if (!page) | |
| 289 | + page = alloc_pages(gfp_mask, trans_pcie->rx_page_order); | |
| 290 | + if (!page) { | |
| 291 | + if (net_ratelimit()) | |
| 292 | + IWL_DEBUG_INFO(trans, "alloc_pages failed, " | |
| 293 | + "order: %d\n", | |
| 294 | + trans_pcie->rx_page_order); | |
| 295 | + | |
| 296 | + if ((rxq->free_count <= RX_LOW_WATERMARK) && | |
| 297 | + net_ratelimit()) | |
| 298 | + IWL_CRIT(trans, "Failed to alloc_pages with %s." | |
| 299 | + "Only %u free buffers remaining.\n", | |
| 300 | + priority == GFP_ATOMIC ? | |
| 301 | + "GFP_ATOMIC" : "GFP_KERNEL", | |
| 302 | + rxq->free_count); | |
| 303 | + /* We don't reschedule replenish work here -- we will | |
| 304 | + * call the restock method and if it still needs | |
| 305 | + * more buffers it will schedule replenish */ | |
| 345 | 306 | return; |
| 307 | + } | |
| 346 | 308 | |
| 347 | 309 | spin_lock(&rxq->lock); |
| 348 | 310 | |
| @@ -393,7 +355,7 @@ static void iwl_pcie_rxq_free_rbs(struct iwl_trans *trans) · 44 unmodified lines | ||
| 393 | 355 | |
| 394 | 356 | lockdep_assert_held(&rxq->lock); |
| 395 | 357 | |
| 396 | − for (i = 0; i < RX_QUEUE_SIZE; i++) { | |
| 358 | + for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++) { | |
| 397 | 359 | if (!rxq->pool[i].page) |
| 398 | 360 | continue; |
| 399 | 361 | dma_unmap_page(trans->dev, rxq->pool[i].page_dma, |
| @@ -410,144 +372,32 @@ static void iwl_pcie_rxq_free_rbs(struct iwl_trans *trans) · 10 unmodified lines | ||
| 410 | 372 | * When moving to rx_free an page is allocated for the slot. |
| 411 | 373 | * |
| 412 | 374 | * Also restock the Rx queue via iwl_pcie_rxq_restock. |
| 413 | − * This is called only during initialization | |
| 375 | + * This is called as a scheduled work item (except for during initialization) | |
| 414 | 376 | */ |
| 415 | −static void iwl_pcie_rx_replenish(struct iwl_trans *trans) | |
| 377 | +static void iwl_pcie_rx_replenish(struct iwl_trans *trans, gfp_t gfp) | |
| 416 | 378 | { |
| 417 | − iwl_pcie_rxq_alloc_rbs(trans); | |
| 379 | + iwl_pcie_rxq_alloc_rbs(trans, gfp); | |
| 418 | 380 | |
| 419 | 381 | iwl_pcie_rxq_restock(trans); |
| 420 | 382 | } |
| 421 | 383 | |
| 422 | −/* | |
| 423 | − * iwl_pcie_rx_allocator - Allocates pages in the background for RX queues | |
| 424 | − * | |
| 425 | − * Allocates for each received request 8 pages | |
| 426 | − * Called as a scheduled work item. | |
| 427 | − */ | |
| 428 | −static void iwl_pcie_rx_allocator(struct iwl_trans *trans) | |
| 429 | −{ | |
| 430 | − struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans); | |
| 431 | − struct iwl_rb_allocator *rba = &trans_pcie->rba; | |
| 432 | − | |
| 433 | − while (atomic_read(&rba->req_pending)) { | |
| 434 | − int i; | |
| 435 | − struct list_head local_empty; | |
| 436 | − struct list_head local_allocated; | |
| 437 | − | |
| 438 | − INIT_LIST_HEAD(&local_allocated); | |
| 439 | − spin_lock(&rba->lock); | |
| 440 | − /* swap out the entire rba->rbd_empty to a local list */ | |
| 441 | − list_replace_init(&rba->rbd_empty, &local_empty); | |
| 442 | − spin_unlock(&rba->lock); | |
| 443 | − | |
| 444 | − for (i = 0; i < RX_CLAIM_REQ_ALLOC;) { | |
| 445 | − struct iwl_rx_mem_buffer *rxb; | |
| 446 | − struct page *page; | |
| 447 | − | |
| 448 | − /* List should never be empty - each reused RBD is | |
| 449 | − * returned to the list, and initial pool covers any | |
| 450 | − * possible gap between the time the page is allocated | |
| 451 | − * to the time the RBD is added. | |
| 452 | − */ | |
| 453 | − BUG_ON(list_empty(&local_empty)); | |
| 454 | − /* Get the first rxb from the rbd list */ | |
| 455 | − rxb = list_first_entry(&local_empty, | |
| 456 | − struct iwl_rx_mem_buffer, list); | |
| 457 | − BUG_ON(rxb->page); | |
| 458 | − | |
| 459 | − /* Alloc a new receive buffer */ | |
| 460 | − page = iwl_pcie_rx_alloc_page(trans); | |
| 461 | − if (!page) | |
| 462 | − continue; | |
| 463 | − rxb->page = page; | |
| 464 | − | |
| 465 | − /* Get physical address of the RB */ | |
| 466 | − rxb->page_dma = dma_map_page(trans->dev, page, 0, | |
| 467 | − PAGE_SIZE << trans_pcie->rx_page_order, | |
| 468 | − DMA_FROM_DEVICE); | |
| 469 | − if (dma_mapping_error(trans->dev, rxb->page_dma)) { | |
| 470 | − rxb->page = NULL; | |
| 471 | − __free_pages(page, trans_pcie->rx_page_order); | |
| 472 | − continue; | |
| 473 | − } | |
| 474 | − /* dma address must be no more than 36 bits */ | |
| 475 | − BUG_ON(rxb->page_dma & ~DMA_BIT_MASK(36)); | |
| 476 | − /* and also 256 byte aligned! */ | |
| 477 | − BUG_ON(rxb->page_dma & DMA_BIT_MASK(8)); | |
| 478 | − | |
| 479 | − /* move the allocated entry to the out list */ | |
| 480 | − list_move(&rxb->list, &local_allocated); | |
| 481 | − i++; | |
| 482 | − } | |
| 483 | − | |
| 484 | − spin_lock(&rba->lock); | |
| 485 | − /* add the allocated rbds to the allocator allocated list */ | |
| 486 | − list_splice_tail(&local_allocated, &rba->rbd_allocated); | |
| 487 | − /* add the unused rbds back to the allocator empty list */ | |
| 488 | − list_splice_tail(&local_empty, &rba->rbd_empty); | |
| 489 | − spin_unlock(&rba->lock); | |
| 490 | − | |
| 491 | − atomic_dec(&rba->req_pending); | |
| 492 | − atomic_inc(&rba->req_ready); | |
| 493 | − } | |
| 494 | −} | |
| 495 | − | |
| 496 | −/* | |
| 497 | − * iwl_pcie_rx_allocator_get - Returns the pre-allocated pages | |
| 498 | −.* | |
| 499 | −.* Called by queue when the queue posted allocation request and | |
| 500 | − * has freed 8 RBDs in order to restock itself. | |
| 501 | − */ | |
| 502 | −static int iwl_pcie_rx_allocator_get(struct iwl_trans *trans, | |
| 503 | − struct iwl_rx_mem_buffer | |
| 504 | − *out[RX_CLAIM_REQ_ALLOC]) | |
| 505 | −{ | |
| 506 | − struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans); | |
| 507 | − struct iwl_rb_allocator *rba = &trans_pcie->rba; | |
| 508 | − int i; | |
| 509 | − | |
| 510 | − if (atomic_dec_return(&rba->req_ready) < 0) { | |
| 511 | − atomic_inc(&rba->req_ready); | |
| 512 | − IWL_DEBUG_RX(trans, | |
| 513 | − "Allocation request not ready, pending requests = %d\n", | |
| 514 | − atomic_read(&rba->req_pending)); | |
| 515 | − return -ENOMEM; | |
| 516 | − } | |
| 517 | − | |
| 518 | − spin_lock(&rba->lock); | |
| 519 | − for (i = 0; i < RX_CLAIM_REQ_ALLOC; i++) { | |
| 520 | − /* Get next free Rx buffer, remove it from free list */ | |
| 521 | − out[i] = list_first_entry(&rba->rbd_allocated, | |
| 522 | − struct iwl_rx_mem_buffer, list); | |
| 523 | − list_del(&out[i]->list); | |
| 524 | − } | |
| 525 | − spin_unlock(&rba->lock); | |
| 526 | − | |
| 527 | − return 0; | |
| 528 | −} | |
| 529 | − | |
| 530 | −static void iwl_pcie_rx_allocator_work(struct work_struct *data) | |
| 384 | +static void iwl_pcie_rx_replenish_work(struct work_struct *data) | |
| 531 | 385 | { |
| 532 | − struct iwl_rb_allocator *rba_p = | |
| 533 | − container_of(data, struct iwl_rb_allocator, rx_alloc); | |
| 534 | 386 | struct iwl_trans_pcie *trans_pcie = |
| 535 | − container_of(rba_p, struct iwl_trans_pcie, rba); | |
| 387 | + container_of(data, struct iwl_trans_pcie, rx_replenish); | |
| 536 | 388 | |
| 537 | − iwl_pcie_rx_allocator(trans_pcie->trans); | |
| 389 | + iwl_pcie_rx_replenish(trans_pcie->trans, GFP_KERNEL); | |
| 538 | 390 | } |
| 539 | 391 | |
| 540 | 392 | static int iwl_pcie_rx_alloc(struct iwl_trans *trans) |
| 541 | 393 | { |
| 542 | 394 | struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans); |
| 543 | 395 | struct iwl_rxq *rxq = &trans_pcie->rxq; |
| 544 | − struct iwl_rb_allocator *rba = &trans_pcie->rba; | |
| 545 | 396 | struct device *dev = trans->dev; |
| 546 | 397 | |
| 547 | 398 | memset(&trans_pcie->rxq, 0, sizeof(trans_pcie->rxq)); |
| 548 | 399 | |
| 549 | 400 | spin_lock_init(&rxq->lock); |
| 550 | − spin_lock_init(&rba->lock); | |
| 551 | 401 | |
| 552 | 402 | if (WARN_ON(rxq->bd || rxq->rb_stts)) |
| 553 | 403 | return -EINVAL; |
| @@ -637,49 +487,15 @@ static void iwl_pcie_rx_init_rxb_lists(struct iwl_rxq *rxq) · 83 unmodified lines | ||
| 637 | 487 | INIT_LIST_HEAD(&rxq->rx_free); |
| 638 | 488 | INIT_LIST_HEAD(&rxq->rx_used); |
| 639 | 489 | rxq->free_count = 0; |
| 640 | − rxq->used_count = 0; | |
| 641 | 490 | |
| 642 | − for (i = 0; i < RX_QUEUE_SIZE; i++) | |
| 491 | + for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++) | |
| 643 | 492 | list_add(&rxq->pool[i].list, &rxq->rx_used); |
| 644 | 493 | } |
| 645 | 494 | |
| 646 | −static void iwl_pcie_rx_init_rba(struct iwl_rb_allocator *rba) | |
| 647 | −{ | |
| 648 | − int i; | |
| 649 | − | |
| 650 | − lockdep_assert_held(&rba->lock); | |
| 651 | − | |
| 652 | − INIT_LIST_HEAD(&rba->rbd_allocated); | |
| 653 | − INIT_LIST_HEAD(&rba->rbd_empty); | |
| 654 | − | |
| 655 | − for (i = 0; i < RX_POOL_SIZE; i++) | |
| 656 | − list_add(&rba->pool[i].list, &rba->rbd_empty); | |
| 657 | −} | |
| 658 | − | |
| 659 | −static void iwl_pcie_rx_free_rba(struct iwl_trans *trans) | |
| 660 | −{ | |
| 661 | − struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans); | |
| 662 | − struct iwl_rb_allocator *rba = &trans_pcie->rba; | |
| 663 | − int i; | |
| 664 | − | |
| 665 | − lockdep_assert_held(&rba->lock); | |
| 666 | − | |
| 667 | − for (i = 0; i < RX_POOL_SIZE; i++) { | |
| 668 | − if (!rba->pool[i].page) | |
| 669 | − continue; | |
| 670 | − dma_unmap_page(trans->dev, rba->pool[i].page_dma, | |
| 671 | − PAGE_SIZE << trans_pcie->rx_page_order, | |
| 672 | − DMA_FROM_DEVICE); | |
| 673 | − __free_pages(rba->pool[i].page, trans_pcie->rx_page_order); | |
| 674 | − rba->pool[i].page = NULL; | |
| 675 | − } | |
| 676 | −} | |
| 677 | − | |
| 678 | 495 | int iwl_pcie_rx_init(struct iwl_trans *trans) |
| 679 | 496 | { |
| 680 | 497 | struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans); |
| 681 | 498 | struct iwl_rxq *rxq = &trans_pcie->rxq; |
| 682 | − struct iwl_rb_allocator *rba = &trans_pcie->rba; | |
| 683 | 499 | int i, err; |
| 684 | 500 | |
| 685 | 501 | if (!rxq->bd) { |
| @@ -687,21 +503,11 @@ int iwl_pcie_rx_init(struct iwl_trans *trans) · 1 unmodified line | ||
| 687 | 503 | if (err) |
| 688 | 504 | return err; |
| 689 | 505 | } |
| 690 | − if (!rba->alloc_wq) | |
| 691 | − rba->alloc_wq = alloc_workqueue("rb_allocator", | |
| 692 | − WQ_HIGHPRI | WQ_UNBOUND, 1); | |
| 693 | − INIT_WORK(&rba->rx_alloc, iwl_pcie_rx_allocator_work); | |
| 694 | − | |
| 695 | − spin_lock(&rba->lock); | |
| 696 | − atomic_set(&rba->req_pending, 0); | |
| 697 | − atomic_set(&rba->req_ready, 0); | |
| 698 | − /* free all first - we might be reconfigured for a different size */ | |
| 699 | − iwl_pcie_rx_free_rba(trans); | |
| 700 | − iwl_pcie_rx_init_rba(rba); | |
| 701 | − spin_unlock(&rba->lock); | |
| 702 | 506 | |
| 703 | 507 | spin_lock(&rxq->lock); |
| 704 | 508 | |
| 509 | + INIT_WORK(&trans_pcie->rx_replenish, iwl_pcie_rx_replenish_work); | |
| 510 | + | |
| 705 | 511 | /* free all first - we might be reconfigured for a different size */ |
| 706 | 512 | iwl_pcie_rxq_free_rbs(trans); |
| 707 | 513 | iwl_pcie_rx_init_rxb_lists(rxq); |
| @@ -716,7 +522,7 @@ int iwl_pcie_rx_init(struct iwl_trans *trans) · 8 unmodified lines | ||
| 716 | 522 | memset(rxq->rb_stts, 0, sizeof(*rxq->rb_stts)); |
| 717 | 523 | spin_unlock(&rxq->lock); |
| 718 | 524 | |
| 719 | − iwl_pcie_rx_replenish(trans); | |
| 525 | + iwl_pcie_rx_replenish(trans, GFP_KERNEL); | |
| 720 | 526 | |
| 721 | 527 | iwl_pcie_rx_hw_init(trans, rxq); |
| 722 | 528 | |
| @@ -731,7 +537,6 @@ void iwl_pcie_rx_free(struct iwl_trans *trans) · 8 unmodified lines | ||
| 731 | 537 | { |
| 732 | 538 | struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans); |
| 733 | 539 | struct iwl_rxq *rxq = &trans_pcie->rxq; |
| 734 | − struct iwl_rb_allocator *rba = &trans_pcie->rba; | |
| 735 | 540 | |
| 736 | 541 | /*if rxq->bd is NULL, it means that nothing has been allocated, |
| 737 | 542 | * exit now */ |
| @@ -740,15 +545,7 @@ void iwl_pcie_rx_free(struct iwl_trans *trans) · 2 unmodified lines | ||
| 740 | 545 | return; |
| 741 | 546 | } |
| 742 | 547 | |
| 743 | − cancel_work_sync(&rba->rx_alloc); | |
| 744 | − if (rba->alloc_wq) { | |
| 745 | − destroy_workqueue(rba->alloc_wq); | |
| 746 | − rba->alloc_wq = NULL; | |
| 747 | − } | |
| 748 | − | |
| 749 | − spin_lock(&rba->lock); | |
| 750 | − iwl_pcie_rx_free_rba(trans); | |
| 751 | − spin_unlock(&rba->lock); | |
| 548 | + cancel_work_sync(&trans_pcie->rx_replenish); | |
| 752 | 549 | |
| 753 | 550 | spin_lock(&rxq->lock); |
| 754 | 551 | iwl_pcie_rxq_free_rbs(trans); |
| @@ -769,43 +566,6 @@ void iwl_pcie_rx_free(struct iwl_trans *trans) · 14 unmodified lines | ||
| 769 | 566 | rxq->rb_stts = NULL; |
| 770 | 567 | } |
| 771 | 568 | |
| 772 | −/* | |
| 773 | − * iwl_pcie_rx_reuse_rbd - Recycle used RBDs | |
| 774 | − * | |
| 775 | − * Called when a RBD can be reused. The RBD is transferred to the allocator. | |
| 776 | − * When there are 2 empty RBDs - a request for allocation is posted | |
| 777 | − */ | |
| 778 | −static void iwl_pcie_rx_reuse_rbd(struct iwl_trans *trans, | |
| 779 | − struct iwl_rx_mem_buffer *rxb, | |
| 780 | − struct iwl_rxq *rxq) | |
| 781 | −{ | |
| 782 | − struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans); | |
| 783 | − struct iwl_rb_allocator *rba = &trans_pcie->rba; | |
| 784 | − | |
| 785 | − /* Count the used RBDs */ | |
| 786 | − rxq->used_count++; | |
| 787 | − | |
| 788 | − /* Move the RBD to the used list, will be moved to allocator in batches | |
| 789 | − * before claiming or posting a request*/ | |
| 790 | − list_add_tail(&rxb->list, &rxq->rx_used); | |
| 791 | − | |
| 792 | − /* If we have RX_POST_REQ_ALLOC new released rx buffers - | |
| 793 | − * issue a request for allocator. Modulo RX_CLAIM_REQ_ALLOC is | |
| 794 | − * used for the case we failed to claim RX_CLAIM_REQ_ALLOC, | |
| 795 | − * after but we still need to post another request. | |
| 796 | − */ | |
| 797 | − if ((rxq->used_count % RX_CLAIM_REQ_ALLOC) == RX_POST_REQ_ALLOC) { | |
| 798 | − /* Move the 2 RBDs to the allocator ownership. | |
| 799 | − Allocator has another 6 from pool for the request completion*/ | |
| 800 | − spin_lock(&rba->lock); | |
| 801 | − list_splice_tail_init(&rxq->rx_used, &rba->rbd_empty); | |
| 802 | − spin_unlock(&rba->lock); | |
| 803 | − | |
| 804 | − atomic_inc(&rba->req_pending); | |
| 805 | − queue_work(rba->alloc_wq, &rba->rx_alloc); | |
| 806 | − } | |
| 807 | −} | |
| 808 | − | |
| 809 | 569 | static void iwl_pcie_rx_handle_rb(struct iwl_trans *trans, |
| 810 | 570 | struct iwl_rx_mem_buffer *rxb) |
| 811 | 571 | { |
| @@ -928,13 +688,13 @@ static void iwl_pcie_rx_handle_rb(struct iwl_trans *trans, · 116 unmodified lines | ||
| 928 | 688 | */ |
| 929 | 689 | __free_pages(rxb->page, trans_pcie->rx_page_order); |
| 930 | 690 | rxb->page = NULL; |
| 931 | − iwl_pcie_rx_reuse_rbd(trans, rxb, rxq); | |
| 691 | + list_add_tail(&rxb->list, &rxq->rx_used); | |
| 932 | 692 | } else { |
| 933 | 693 | list_add_tail(&rxb->list, &rxq->rx_free); |
| 934 | 694 | rxq->free_count++; |
| 935 | 695 | } |
| 936 | 696 | } else |
| 937 | − iwl_pcie_rx_reuse_rbd(trans, rxb, rxq); | |
| 697 | + list_add_tail(&rxb->list, &rxq->rx_used); | |
| 938 | 698 | } |
| 939 | 699 | |
| 940 | 700 | /* |
| @@ -944,7 +704,10 @@ static void iwl_pcie_rx_handle(struct iwl_trans *trans) · 3 unmodified lines | ||
| 944 | 704 | { |
| 945 | 705 | struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans); |
| 946 | 706 | struct iwl_rxq *rxq = &trans_pcie->rxq; |
| 947 | − u32 r, i, j; | |
| 707 | + u32 r, i; | |
| 708 | + u8 fill_rx = 0; | |
| 709 | + u32 count = 8; | |
| 710 | + int total_empty; | |
| 948 | 711 | |
| 949 | 712 | restart: |
| 950 | 713 | spin_lock(&rxq->lock); |
| @@ -957,6 +720,14 @@ restart: · 6 unmodified lines | ||
| 957 | 720 | if (i == r) |
| 958 | 721 | IWL_DEBUG_RX(trans, "HW = SW = %d\n", r); |
| 959 | 722 | |
| 723 | + /* calculate total frames need to be restock after handling RX */ | |
| 724 | + total_empty = r - rxq->write_actual; | |
| 725 | + if (total_empty < 0) | |
| 726 | + total_empty += RX_QUEUE_SIZE; | |
| 727 | + | |
| 728 | + if (total_empty > (RX_QUEUE_SIZE / 2)) | |
| 729 | + fill_rx = 1; | |
| 730 | + | |
| 960 | 731 | while (i != r) { |
| 961 | 732 | struct iwl_rx_mem_buffer *rxb; |
| 962 | 733 | |
| @@ -968,48 +739,29 @@ restart: · 5 unmodified lines | ||
| 968 | 739 | iwl_pcie_rx_handle_rb(trans, rxb); |
| 969 | 740 | |
| 970 | 741 | i = (i + 1) & RX_QUEUE_MASK; |
| 971 | − | |
| 972 | − /* If we have RX_CLAIM_REQ_ALLOC released rx buffers - | |
| 973 | − * try to claim the pre-allocated buffers from the allocator */ | |
| 974 | − if (rxq->used_count >= RX_CLAIM_REQ_ALLOC) { | |
| 975 | − struct iwl_rb_allocator *rba = &trans_pcie->rba; | |
| 976 | − struct iwl_rx_mem_buffer *out[RX_CLAIM_REQ_ALLOC]; | |
| 977 | − | |
| 978 | − /* Add the remaining 6 empty RBDs for allocator use */ | |
| 979 | − spin_lock(&rba->lock); | |
| 980 | − list_splice_tail_init(&rxq->rx_used, &rba->rbd_empty); | |
| 981 | − spin_unlock(&rba->lock); | |
| 982 | − | |
| 983 | − /* If not ready - continue, will try to reclaim later. | |
| 984 | − * No need to reschedule work - allocator exits only on | |
| 985 | − * success */ | |
| 986 | − if (!iwl_pcie_rx_allocator_get(trans, out)) { | |
| 987 | − /* If success - then RX_CLAIM_REQ_ALLOC | |
| 988 | − * buffers were retrieved and should be added | |
| 989 | − * to free list */ | |
| 990 | − rxq->used_count -= RX_CLAIM_REQ_ALLOC; | |
| 991 | − for (j = 0; j < RX_CLAIM_REQ_ALLOC; j++) { | |
| 992 | − list_add_tail(&out[j]->list, | |
| 993 | − &rxq->rx_free); | |
| 994 | − rxq->free_count++; | |
| 995 | − } | |
| 742 | + /* If there are a lot of unused frames, | |
| 743 | + * restock the Rx queue so ucode wont assert. */ | |
| 744 | + if (fill_rx) { | |
| 745 | + count++; | |
| 746 | + if (count >= 8) { | |
| 747 | + rxq->read = i; | |
| 748 | + spin_unlock(&rxq->lock); | |
| 749 | + iwl_pcie_rx_replenish(trans, GFP_ATOMIC); | |
| 750 | + count = 0; | |
| 751 | + goto restart; | |
| 996 | 752 | } |
| 997 | 753 | } |
| 998 | − /* handle restock for two cases: | |
| 999 | − * - we just pulled buffers from the allocator | |
| 1000 | − * - we have 8+ unstolen pages accumulated */ | |
| 1001 | − if (rxq->free_count >= RX_CLAIM_REQ_ALLOC) { | |
| 1002 | − rxq->read = i; | |
| 1003 | − spin_unlock(&rxq->lock); | |
| 1004 | − iwl_pcie_rxq_restock(trans); | |
| 1005 | − goto restart; | |
| 1006 | − } | |
| 1007 | 754 | } |
| 1008 | 755 | |
| 1009 | 756 | /* Backtrack one entry */ |
| 1010 | 757 | rxq->read = i; |
| 1011 | 758 | spin_unlock(&rxq->lock); |
| 1012 | 759 | |
| 760 | + if (fill_rx) | |
| 761 | + iwl_pcie_rx_replenish(trans, GFP_ATOMIC); | |
| 762 | + else | |
| 763 | + iwl_pcie_rxq_restock(trans); | |
| 764 | + | |
| 1013 | 765 | if (trans_pcie->napi.poll) |
| 1014 | 766 | napi_gro_flush(&trans_pcie->napi, false); |
| 1015 | 767 | } |
| @@ -182,7 +182,7 @@ static void iwl_trans_pcie_write_shr(struct iwl_trans *trans, u32 reg, u32 val) · 181 unmodified lines | ||
| 182 | 182 | |
| 183 | 183 | static void iwl_pcie_set_pwr(struct iwl_trans *trans, bool vaux) |
| 184 | 184 | { |
| 185 | − if (!trans->cfg->apmg_not_supported) | |
| 185 | + if (trans->cfg->apmg_not_supported) | |
| 186 | 186 | return; |
| 187 | 187 | |
| 188 | 188 | if (vaux && pci_pme_capable(to_pci_dev(trans->dev), PCI_D3cold)) |
| @@ -478,10 +478,16 @@ static void iwl_pcie_apm_stop(struct iwl_trans *trans, bool op_mode_leave) · 289 unmodified lines | ||
| 478 | 478 | if (trans->cfg->device_family == IWL_DEVICE_FAMILY_7000) |
| 479 | 479 | iwl_set_bits_prph(trans, APMG_PCIDEV_STT_REG, |
| 480 | 480 | APMG_PCIDEV_STT_VAL_WAKE_ME); |
| 481 | − else if (trans->cfg->device_family == IWL_DEVICE_FAMILY_8000) | |
| 481 | + else if (trans->cfg->device_family == IWL_DEVICE_FAMILY_8000) { | |
| 482 | + iwl_set_bit(trans, CSR_DBG_LINK_PWR_MGMT_REG, | |
| 483 | + CSR_RESET_LINK_PWR_MGMT_DISABLED); | |
| 482 | 484 | iwl_set_bit(trans, CSR_HW_IF_CONFIG_REG, |
| 483 | 485 | CSR_HW_IF_CONFIG_REG_PREPARE | |
| 484 | 486 | CSR_HW_IF_CONFIG_REG_ENABLE_PME); |
| 487 | + mdelay(1); | |
| 488 | + iwl_clear_bit(trans, CSR_DBG_LINK_PWR_MGMT_REG, | |
| 489 | + CSR_RESET_LINK_PWR_MGMT_DISABLED); | |
| 490 | + } | |
| 485 | 491 | mdelay(5); |
| 486 | 492 | } |
| 487 | 493 | |
| @@ -575,6 +581,10 @@ static int iwl_pcie_prepare_card_hw(struct iwl_trans *trans) · 87 unmodified lines | ||
| 575 | 581 | if (ret >= 0) |
| 576 | 582 | return 0; |
| 577 | 583 | |
| 584 | + iwl_set_bit(trans, CSR_DBG_LINK_PWR_MGMT_REG, | |
| 585 | + CSR_RESET_LINK_PWR_MGMT_DISABLED); | |
| 586 | + msleep(1); | |
| 587 | + | |
| 578 | 588 | for (iter = 0; iter < 10; iter++) { |
| 579 | 589 | /* If HW is not ready, prepare the conditions to check again */ |
| 580 | 590 | iwl_set_bit(trans, CSR_HW_IF_CONFIG_REG, |
| @@ -582,8 +592,10 @@ static int iwl_pcie_prepare_card_hw(struct iwl_trans *trans) · 1 unmodified line | ||
| 582 | 592 | |
| 583 | 593 | do { |
| 584 | 594 | ret = iwl_pcie_set_hw_ready(trans); |
| 585 | − if (ret >= 0) | |
| 586 | − return 0; | |
| 595 | + if (ret >= 0) { | |
| 596 | + ret = 0; | |
| 597 | + goto out; | |
| 598 | + } | |
| 587 | 599 | |
| 588 | 600 | usleep_range(200, 1000); |
| 589 | 601 | t += 200; |
| @@ -593,6 +605,10 @@ static int iwl_pcie_prepare_card_hw(struct iwl_trans *trans) · 3 unmodified lines | ||
| 593 | 605 | |
| 594 | 606 | IWL_ERR(trans, "Couldn't prepare the card\n"); |
| 595 | 607 | |
| 608 | +out: | |
| 609 | + iwl_clear_bit(trans, CSR_DBG_LINK_PWR_MGMT_REG, | |
| 610 | + CSR_RESET_LINK_PWR_MGMT_DISABLED); | |
| 611 | + | |
| 596 | 612 | return ret; |
| 597 | 613 | } |
| 598 | 614 | |
| @@ -2459,7 +2475,7 @@ struct iwl_trans *iwl_trans_pcie_alloc(struct pci_dev *pdev, · 1860 unmodified lines | ||
| 2459 | 2475 | struct iwl_trans_pcie *trans_pcie; |
| 2460 | 2476 | struct iwl_trans *trans; |
| 2461 | 2477 | u16 pci_cmd; |
| 2462 | − int err; | |
| 2478 | + int ret; | |
| 2463 | 2479 | |
| 2464 | 2480 | trans = iwl_trans_alloc(sizeof(struct iwl_trans_pcie), |
| 2465 | 2481 | &pdev->dev, cfg, &trans_ops_pcie, 0); |
| @@ -2474,8 +2490,8 @@ struct iwl_trans *iwl_trans_pcie_alloc(struct pci_dev *pdev, · 8 unmodified lines | ||
| 2474 | 2490 | spin_lock_init(&trans_pcie->ref_lock); |
| 2475 | 2491 | init_waitqueue_head(&trans_pcie->ucode_write_waitq); |
| 2476 | 2492 | |
| 2477 | − err = pci_enable_device(pdev); | |
| 2478 | − if (err) | |
| 2493 | + ret = pci_enable_device(pdev); | |
| 2494 | + if (ret) | |
| 2479 | 2495 | goto out_no_pci; |
| 2480 | 2496 | |
| 2481 | 2497 | if (!cfg->base_params->pcie_l1_allowed) { |
| @@ -2491,23 +2507,23 @@ struct iwl_trans *iwl_trans_pcie_alloc(struct pci_dev *pdev, · 9 unmodified lines | ||
| 2491 | 2507 | |
| 2492 | 2508 | pci_set_master(pdev); |
| 2493 | 2509 | |
| 2494 | − err = pci_set_dma_mask(pdev, DMA_BIT_MASK(36)); | |
| 2495 | − if (!err) | |
| 2496 | − err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(36)); | |
| 2497 | − if (err) { | |
| 2498 | − err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32)); | |
| 2499 | − if (!err) | |
| 2500 | − err = pci_set_consistent_dma_mask(pdev, | |
| 2510 | + ret = pci_set_dma_mask(pdev, DMA_BIT_MASK(36)); | |
| 2511 | + if (!ret) | |
| 2512 | + ret = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(36)); | |
| 2513 | + if (ret) { | |
| 2514 | + ret = pci_set_dma_mask(pdev, DMA_BIT_MASK(32)); | |
| 2515 | + if (!ret) | |
| 2516 | + ret = pci_set_consistent_dma_mask(pdev, | |
| 2501 | 2517 | DMA_BIT_MASK(32)); |
| 2502 | 2518 | /* both attempts failed: */ |
| 2503 | − if (err) { | |
| 2519 | + if (ret) { | |
| 2504 | 2520 | dev_err(&pdev->dev, "No suitable DMA available\n"); |
| 2505 | 2521 | goto out_pci_disable_device; |
| 2506 | 2522 | } |
| 2507 | 2523 | } |
| 2508 | 2524 | |
| 2509 | − err = pci_request_regions(pdev, DRV_NAME); | |
| 2510 | − if (err) { | |
| 2525 | + ret = pci_request_regions(pdev, DRV_NAME); | |
| 2526 | + if (ret) { | |
| 2511 | 2527 | dev_err(&pdev->dev, "pci_request_regions failed\n"); |
| 2512 | 2528 | goto out_pci_disable_device; |
| 2513 | 2529 | } |
| @@ -2515,7 +2531,7 @@ struct iwl_trans *iwl_trans_pcie_alloc(struct pci_dev *pdev, · 1 unmodified line | ||
| 2515 | 2531 | trans_pcie->hw_base = pci_ioremap_bar(pdev, 0); |
| 2516 | 2532 | if (!trans_pcie->hw_base) { |
| 2517 | 2533 | dev_err(&pdev->dev, "pci_ioremap_bar failed\n"); |
| 2518 | − err = -ENODEV; | |
| 2534 | + ret = -ENODEV; | |
| 2519 | 2535 | goto out_pci_release_regions; |
| 2520 | 2536 | } |
| 2521 | 2537 | |
| @@ -2527,9 +2543,9 @@ struct iwl_trans *iwl_trans_pcie_alloc(struct pci_dev *pdev, · 5 unmodified lines | ||
| 2527 | 2543 | trans_pcie->pci_dev = pdev; |
| 2528 | 2544 | iwl_disable_interrupts(trans); |
| 2529 | 2545 | |
| 2530 | − err = pci_enable_msi(pdev); | |
| 2531 | − if (err) { | |
| 2532 | − dev_err(&pdev->dev, "pci_enable_msi failed(0X%x)\n", err); | |
| 2546 | + ret = pci_enable_msi(pdev); | |
| 2547 | + if (ret) { | |
| 2548 | + dev_err(&pdev->dev, "pci_enable_msi failed(0X%x)\n", ret); | |
| 2533 | 2549 | /* enable rfkill interrupt: hw bug w/a */ |
| 2534 | 2550 | pci_read_config_word(pdev, PCI_COMMAND, &pci_cmd); |
| 2535 | 2551 | if (pci_cmd & PCI_COMMAND_INTX_DISABLE) { |
| @@ -2547,11 +2563,16 @@ struct iwl_trans *iwl_trans_pcie_alloc(struct pci_dev *pdev, · 11 unmodified lines | ||
| 2547 | 2563 | */ |
| 2548 | 2564 | if (trans->cfg->device_family == IWL_DEVICE_FAMILY_8000) { |
| 2549 | 2565 | unsigned long flags; |
| 2550 | − int ret; | |
| 2551 | 2566 | |
| 2552 | 2567 | trans->hw_rev = (trans->hw_rev & 0xfff0) | |
| 2553 | 2568 | (CSR_HW_REV_STEP(trans->hw_rev << 2) << 2); |
| 2554 | 2569 | |
| 2570 | + ret = iwl_pcie_prepare_card_hw(trans); | |
| 2571 | + if (ret) { | |
| 2572 | + IWL_WARN(trans, "Exit HW not ready\n"); | |
| 2573 | + goto out_pci_disable_msi; | |
| 2574 | + } | |
| 2575 | + | |
| 2555 | 2576 | /* |
| 2556 | 2577 | * in-order to recognize C step driver should read chip version |
| 2557 | 2578 | * id located at the AUX bus MISC address space. |
| @@ -2591,13 +2612,14 @@ struct iwl_trans *iwl_trans_pcie_alloc(struct pci_dev *pdev, · 33 unmodified lines | ||
| 2591 | 2612 | /* Initialize the wait queue for commands */ |
| 2592 | 2613 | init_waitqueue_head(&trans_pcie->wait_command_queue); |
| 2593 | 2614 | |
| 2594 | − if (iwl_pcie_alloc_ict(trans)) | |
| 2615 | + ret = iwl_pcie_alloc_ict(trans); | |
| 2616 | + if (ret) | |
| 2595 | 2617 | goto out_pci_disable_msi; |
| 2596 | 2618 | |
| 2597 | − err = request_threaded_irq(pdev->irq, iwl_pcie_isr, | |
| 2619 | + ret = request_threaded_irq(pdev->irq, iwl_pcie_isr, | |
| 2598 | 2620 | iwl_pcie_irq_handler, |
| 2599 | 2621 | IRQF_SHARED, DRV_NAME, trans); |
| 2600 | − if (err) { | |
| 2622 | + if (ret) { | |
| 2601 | 2623 | IWL_ERR(trans, "Error allocating IRQ %d\n", pdev->irq); |
| 2602 | 2624 | goto out_free_ict; |
| 2603 | 2625 | } |
| @@ -2617,5 +2639,5 @@ out_pci_disable_device: · 13 unmodified lines | ||
| 2617 | 2639 | pci_disable_device(pdev); |
| 2618 | 2640 | out_no_pci: |
| 2619 | 2641 | iwl_trans_free(trans); |
| 2620 | − return ERR_PTR(err); | |
| 2642 | + return ERR_PTR(ret); | |
| 2621 | 2643 | } |
| @@ -1875,8 +1875,19 @@ int iwl_trans_pcie_tx(struct iwl_trans *trans, struct sk_buff *skb, · 1874 unmodified lines | ||
| 1875 | 1875 | |
| 1876 | 1876 | /* start timer if queue currently empty */ |
| 1877 | 1877 | if (q->read_ptr == q->write_ptr) { |
| 1878 | − if (txq->wd_timeout) | |
| 1879 | − mod_timer(&txq->stuck_timer, jiffies + txq->wd_timeout); | |
| 1878 | + if (txq->wd_timeout) { | |
| 1879 | + /* | |
| 1880 | + * If the TXQ is active, then set the timer, if not, | |
| 1881 | + * set the timer in remainder so that the timer will | |
| 1882 | + * be armed with the right value when the station will | |
| 1883 | + * wake up. | |
| 1884 | + */ | |
| 1885 | + if (!txq->frozen) | |
| 1886 | + mod_timer(&txq->stuck_timer, | |
| 1887 | + jiffies + txq->wd_timeout); | |
| 1888 | + else | |
| 1889 | + txq->frozen_expiry_remainder = txq->wd_timeout; | |
| 1890 | + } | |
| 1880 | 1891 | IWL_DEBUG_RPM(trans, "Q: %d first tx - take ref\n", q->id); |
| 1881 | 1892 | iwl_trans_pcie_ref(trans); |
| 1882 | 1893 | } |
| @@ -172,6 +172,7 @@ static int rsi_load_ta_instructions(struct rsi_common *common) · 171 unmodified lines | ||
| 172 | 172 | (struct rsi_91x_sdiodev *)adapter->rsi_dev; |
| 173 | 173 | u32 len; |
| 174 | 174 | u32 num_blocks; |
| 175 | + const u8 *fw; | |
| 175 | 176 | const struct firmware *fw_entry = NULL; |
| 176 | 177 | u32 block_size = dev->tx_blk_size; |
| 177 | 178 | int status = 0; |
| @@ -200,6 +201,10 @@ static int rsi_load_ta_instructions(struct rsi_common *common) · 22 unmodified lines | ||
| 200 | 201 | return status; |
| 201 | 202 | } |
| 202 | 203 | |
| 204 | + /* Copy firmware into DMA-accessible memory */ | |
| 205 | + fw = kmemdup(fw_entry->data, fw_entry->size, GFP_KERNEL); | |
| 206 | + if (!fw) | |
| 207 | + return -ENOMEM; | |
| 203 | 208 | len = fw_entry->size; |
| 204 | 209 | |
| 205 | 210 | if (len % 4) |
| @@ -210,7 +215,8 @@ static int rsi_load_ta_instructions(struct rsi_common *common) · 4 unmodified lines | ||
| 210 | 215 | rsi_dbg(INIT_ZONE, "%s: Instruction size:%d\n", __func__, len); |
| 211 | 216 | rsi_dbg(INIT_ZONE, "%s: num blocks: %d\n", __func__, num_blocks); |
| 212 | 217 | |
| 213 | − status = rsi_copy_to_card(common, fw_entry->data, len, num_blocks); | |
| 218 | + status = rsi_copy_to_card(common, fw, len, num_blocks); | |
| 219 | + kfree(fw); | |
| 214 | 220 | release_firmware(fw_entry); |
| 215 | 221 | return status; |
| 216 | 222 | } |
| @@ -146,7 +146,10 @@ static int rsi_load_ta_instructions(struct rsi_common *common) · 145 unmodified lines | ||
| 146 | 146 | return status; |
| 147 | 147 | } |
| 148 | 148 | |
| 149 | + /* Copy firmware into DMA-accessible memory */ | |
| 149 | 150 | fw = kmemdup(fw_entry->data, fw_entry->size, GFP_KERNEL); |
| 151 | + if (!fw) | |
| 152 | + return -ENOMEM; | |
| 150 | 153 | len = fw_entry->size; |
| 151 | 154 | |
| 152 | 155 | if (len % 4) |
| @@ -158,6 +161,7 @@ static int rsi_load_ta_instructions(struct rsi_common *common) · 5 unmodified lines | ||
| 158 | 161 | rsi_dbg(INIT_ZONE, "%s: num blocks: %d\n", __func__, num_blocks); |
| 159 | 162 | |
| 160 | 163 | status = rsi_copy_to_card(common, fw, len, num_blocks); |
| 164 | + kfree(fw); | |
| 161 | 165 | release_firmware(fw_entry); |
| 162 | 166 | return status; |
| 163 | 167 | } |
| @@ -1015,9 +1015,12 @@ static void send_beacon_frame(struct ieee80211_hw *hw, · 1014 unmodified lines | ||
| 1015 | 1015 | { |
| 1016 | 1016 | struct rtl_priv *rtlpriv = rtl_priv(hw); |
| 1017 | 1017 | struct sk_buff *skb = ieee80211_beacon_get(hw, vif); |
| 1018 | + struct rtl_tcb_desc tcb_desc; | |
| 1018 | 1019 | |
| 1019 | − if (skb) | |
| 1020 | − rtlpriv->intf_ops->adapter_tx(hw, NULL, skb, NULL); | |
| 1020 | + if (skb) { | |
| 1021 | + memset(&tcb_desc, 0, sizeof(struct rtl_tcb_desc)); | |
| 1022 | + rtlpriv->intf_ops->adapter_tx(hw, NULL, skb, &tcb_desc); | |
| 1023 | + } | |
| 1021 | 1024 | } |
| 1022 | 1025 | |
| 1023 | 1026 | static void rtl_op_bss_info_changed(struct ieee80211_hw *hw, |
| @@ -385,6 +385,7 @@ module_param_named(debug, rtl8723be_mod_params.debug, int, 0444); · 384 unmodified lines | ||
| 385 | 385 | module_param_named(ips, rtl8723be_mod_params.inactiveps, bool, 0444); |
| 386 | 386 | module_param_named(swlps, rtl8723be_mod_params.swctrl_lps, bool, 0444); |
| 387 | 387 | module_param_named(fwlps, rtl8723be_mod_params.fwctrl_lps, bool, 0444); |
| 388 | +module_param_named(msi, rtl8723be_mod_params.msi_support, bool, 0444); | |
| 388 | 389 | module_param_named(disable_watchdog, rtl8723be_mod_params.disable_watchdog, |
| 389 | 390 | bool, 0444); |
| 390 | 391 | MODULE_PARM_DESC(swenc, "Set to 1 for software crypto (default 0)\n"); |
| @@ -61,6 +61,12 @@ void xenvif_skb_zerocopy_prepare(struct xenvif_queue *queue, · 60 unmodified lines | ||
| 61 | 61 | void xenvif_skb_zerocopy_complete(struct xenvif_queue *queue) |
| 62 | 62 | { |
| 63 | 63 | atomic_dec(&queue->inflight_packets); |
| 64 | + | |
| 65 | + /* Wake the dealloc thread _after_ decrementing inflight_packets so | |
| 66 | + * that if kthread_stop() has already been called, the dealloc thread | |
| 67 | + * does not wait forever with nothing to wake it. | |
| 68 | + */ | |
| 69 | + wake_up(&queue->dealloc_wq); | |
| 64 | 70 | } |
| 65 | 71 | |
| 66 | 72 | int xenvif_schedulable(struct xenvif *vif) |
| @@ -810,23 +810,17 @@ static inline struct sk_buff *xenvif_alloc_skb(unsigned int size) · 809 unmodified lines | ||
| 810 | 810 | static struct gnttab_map_grant_ref *xenvif_get_requests(struct xenvif_queue *queue, |
| 811 | 811 | struct sk_buff *skb, |
| 812 | 812 | struct xen_netif_tx_request *txp, |
| 813 | − struct gnttab_map_grant_ref *gop) | |
| 813 | + struct gnttab_map_grant_ref *gop, | |
| 814 | + unsigned int frag_overflow, | |
| 815 | + struct sk_buff *nskb) | |
| 814 | 816 | { |
| 815 | 817 | struct skb_shared_info *shinfo = skb_shinfo(skb); |
| 816 | 818 | skb_frag_t *frags = shinfo->frags; |
| 817 | 819 | u16 pending_idx = XENVIF_TX_CB(skb)->pending_idx; |
| 818 | 820 | int start; |
| 819 | 821 | pending_ring_idx_t index; |
| 820 | − unsigned int nr_slots, frag_overflow = 0; | |
| 822 | + unsigned int nr_slots; | |
| 821 | 823 | |
| 822 | − /* At this point shinfo->nr_frags is in fact the number of | |
| 823 | − * slots, which can be as large as XEN_NETBK_LEGACY_SLOTS_MAX. | |
| 824 | − */ | |
| 825 | − if (shinfo->nr_frags > MAX_SKB_FRAGS) { | |
| 826 | − frag_overflow = shinfo->nr_frags - MAX_SKB_FRAGS; | |
| 827 | − BUG_ON(frag_overflow > MAX_SKB_FRAGS); | |
| 828 | − shinfo->nr_frags = MAX_SKB_FRAGS; | |
| 829 | − } | |
| 830 | 824 | nr_slots = shinfo->nr_frags; |
| 831 | 825 | |
| 832 | 826 | /* Skip first skb fragment if it is on same page as header fragment. */ |
| @@ -841,13 +835,6 @@ static struct gnttab_map_grant_ref *xenvif_get_requests(struct xenvif_queue *que · 8 unmodified lines | ||
| 841 | 835 | } |
| 842 | 836 | |
| 843 | 837 | if (frag_overflow) { |
| 844 | − struct sk_buff *nskb = xenvif_alloc_skb(0); | |
| 845 | − if (unlikely(nskb == NULL)) { | |
| 846 | − if (net_ratelimit()) | |
| 847 | − netdev_err(queue->vif->dev, | |
| 848 | − "Can't allocate the frag_list skb.\n"); | |
| 849 | − return NULL; | |
| 850 | − } | |
| 851 | 838 | |
| 852 | 839 | shinfo = skb_shinfo(nskb); |
| 853 | 840 | frags = shinfo->frags; |
| @@ -1175,9 +1162,10 @@ static void xenvif_tx_build_gops(struct xenvif_queue *queue, · 321 unmodified lines | ||
| 1175 | 1162 | unsigned *copy_ops, |
| 1176 | 1163 | unsigned *map_ops) |
| 1177 | 1164 | { |
| 1178 | − struct gnttab_map_grant_ref *gop = queue->tx_map_ops, *request_gop; | |
| 1179 | − struct sk_buff *skb; | |
| 1165 | + struct gnttab_map_grant_ref *gop = queue->tx_map_ops; | |
| 1166 | + struct sk_buff *skb, *nskb; | |
| 1180 | 1167 | int ret; |
| 1168 | + unsigned int frag_overflow; | |
| 1181 | 1169 | |
| 1182 | 1170 | while (skb_queue_len(&queue->tx_queue) < budget) { |
| 1183 | 1171 | struct xen_netif_tx_request txreq; |
| @@ -1265,6 +1253,29 @@ static void xenvif_tx_build_gops(struct xenvif_queue *queue, · 81 unmodified lines | ||
| 1265 | 1253 | break; |
| 1266 | 1254 | } |
| 1267 | 1255 | |
| 1256 | + skb_shinfo(skb)->nr_frags = ret; | |
| 1257 | + if (data_len < txreq.size) | |
| 1258 | + skb_shinfo(skb)->nr_frags++; | |
| 1259 | + /* At this point shinfo->nr_frags is in fact the number of | |
| 1260 | + * slots, which can be as large as XEN_NETBK_LEGACY_SLOTS_MAX. | |
| 1261 | + */ | |
| 1262 | + frag_overflow = 0; | |
| 1263 | + nskb = NULL; | |
| 1264 | + if (skb_shinfo(skb)->nr_frags > MAX_SKB_FRAGS) { | |
| 1265 | + frag_overflow = skb_shinfo(skb)->nr_frags - MAX_SKB_FRAGS; | |
| 1266 | + BUG_ON(frag_overflow > MAX_SKB_FRAGS); | |
| 1267 | + skb_shinfo(skb)->nr_frags = MAX_SKB_FRAGS; | |
| 1268 | + nskb = xenvif_alloc_skb(0); | |
| 1269 | + if (unlikely(nskb == NULL)) { | |
| 1270 | + kfree_skb(skb); | |
| 1271 | + xenvif_tx_err(queue, &txreq, idx); | |
| 1272 | + if (net_ratelimit()) | |
| 1273 | + netdev_err(queue->vif->dev, | |
| 1274 | + "Can't allocate the frag_list skb.\n"); | |
| 1275 | + break; | |
| 1276 | + } | |
| 1277 | + } | |
| 1278 | + | |
| 1268 | 1279 | if (extras[XEN_NETIF_EXTRA_TYPE_GSO - 1].type) { |
| 1269 | 1280 | struct xen_netif_extra_info *gso; |
| 1270 | 1281 | gso = &extras[XEN_NETIF_EXTRA_TYPE_GSO - 1]; |
| @@ -1272,6 +1283,7 @@ static void xenvif_tx_build_gops(struct xenvif_queue *queue, · 1 unmodified line | ||
| 1272 | 1283 | if (xenvif_set_skb_gso(queue->vif, skb, gso)) { |
| 1273 | 1284 | /* Failure in xenvif_set_skb_gso is fatal. */ |
| 1274 | 1285 | kfree_skb(skb); |
| 1286 | + kfree_skb(nskb); | |
| 1275 | 1287 | break; |
| 1276 | 1288 | } |
| 1277 | 1289 | } |
| @@ -1294,9 +1306,7 @@ static void xenvif_tx_build_gops(struct xenvif_queue *queue, · 16 unmodified lines | ||
| 1294 | 1306 | |
| 1295 | 1307 | (*copy_ops)++; |
| 1296 | 1308 | |
| 1297 | − skb_shinfo(skb)->nr_frags = ret; | |
| 1298 | 1309 | if (data_len < txreq.size) { |
| 1299 | − skb_shinfo(skb)->nr_frags++; | |
| 1300 | 1310 | frag_set_pending_idx(&skb_shinfo(skb)->frags[0], |
| 1301 | 1311 | pending_idx); |
| 1302 | 1312 | xenvif_tx_create_map_op(queue, pending_idx, &txreq, gop); |
| @@ -1310,13 +1320,8 @@ static void xenvif_tx_build_gops(struct xenvif_queue *queue, · 7 unmodified lines | ||
| 1310 | 1320 | |
| 1311 | 1321 | queue->pending_cons++; |
| 1312 | 1322 | |
| 1313 | − request_gop = xenvif_get_requests(queue, skb, txfrags, gop); | |
| 1314 | − if (request_gop == NULL) { | |
| 1315 | − kfree_skb(skb); | |
| 1316 | − xenvif_tx_err(queue, &txreq, idx); | |
| 1317 | − break; | |
| 1318 | − } | |
| 1319 | − gop = request_gop; | |
| 1323 | + gop = xenvif_get_requests(queue, skb, txfrags, gop, | |
| 1324 | + frag_overflow, nskb); | |
| 1320 | 1325 | |
| 1321 | 1326 | __skb_queue_tail(&queue->tx_queue, skb); |
| 1322 | 1327 | |
| @@ -1536,7 +1541,6 @@ void xenvif_zerocopy_callback(struct ubuf_info *ubuf, bool zerocopy_success) · 213 unmodified lines | ||
| 1536 | 1541 | smp_wmb(); |
| 1537 | 1542 | queue->dealloc_prod++; |
| 1538 | 1543 | } while (ubuf); |
| 1539 | − wake_up(&queue->dealloc_wq); | |
| 1540 | 1544 | spin_unlock_irqrestore(&queue->callback_lock, flags); |
| 1541 | 1545 | |
| 1542 | 1546 | if (likely(zerocopy_success)) |
| @@ -1566,13 +1570,13 @@ static inline void xenvif_tx_dealloc_action(struct xenvif_queue *queue) · 23 unmodified lines | ||
| 1566 | 1570 | smp_rmb(); |
| 1567 | 1571 | |
| 1568 | 1572 | while (dc != dp) { |
| 1569 | − BUG_ON(gop - queue->tx_unmap_ops > MAX_PENDING_REQS); | |
| 1573 | + BUG_ON(gop - queue->tx_unmap_ops >= MAX_PENDING_REQS); | |
| 1570 | 1574 | pending_idx = |
| 1571 | 1575 | queue->dealloc_ring[pending_index(dc++)]; |
| 1572 | 1576 | |
| 1573 | − pending_idx_release[gop-queue->tx_unmap_ops] = | |
| 1577 | + pending_idx_release[gop - queue->tx_unmap_ops] = | |
| 1574 | 1578 | pending_idx; |
| 1575 | − queue->pages_to_unmap[gop-queue->tx_unmap_ops] = | |
| 1579 | + queue->pages_to_unmap[gop - queue->tx_unmap_ops] = | |
| 1576 | 1580 | queue->mmap_pages[pending_idx]; |
| 1577 | 1581 | gnttab_set_unmap_op(gop, |
| 1578 | 1582 | idx_to_kaddr(queue, pending_idx), |
| @@ -114,7 +114,7 @@ int ntb_register_device(struct ntb_dev *ntb) · 113 unmodified lines | ||
| 114 | 114 | ntb->dev.bus = &ntb_bus; |
| 115 | 115 | ntb->dev.parent = &ntb->pdev->dev; |
| 116 | 116 | ntb->dev.release = ntb_dev_release; |
| 117 | − dev_set_name(&ntb->dev, pci_name(ntb->pdev)); | |
| 117 | + dev_set_name(&ntb->dev, "%s", pci_name(ntb->pdev)); | |
| 118 | 118 | |
| 119 | 119 | ntb->ctx = NULL; |
| 120 | 120 | ntb->ctx_ops = NULL; |
| @@ -142,10 +142,11 @@ struct ntb_transport_qp { · 141 unmodified lines | ||
| 142 | 142 | |
| 143 | 143 | void (*rx_handler)(struct ntb_transport_qp *qp, void *qp_data, |
| 144 | 144 | void *data, int len); |
| 145 | + struct list_head rx_post_q; | |
| 145 | 146 | struct list_head rx_pend_q; |
| 146 | 147 | struct list_head rx_free_q; |
| 147 | − spinlock_t ntb_rx_pend_q_lock; | |
| 148 | − spinlock_t ntb_rx_free_q_lock; | |
| 148 | + /* ntb_rx_q_lock: synchronize access to rx_XXXX_q */ | |
| 149 | + spinlock_t ntb_rx_q_lock; | |
| 149 | 150 | void *rx_buff; |
| 150 | 151 | unsigned int rx_index; |
| 151 | 152 | unsigned int rx_max_entry; |
| @@ -211,6 +212,8 @@ struct ntb_transport_ctx { · 59 unmodified lines | ||
| 211 | 212 | bool link_is_up; |
| 212 | 213 | struct delayed_work link_work; |
| 213 | 214 | struct work_struct link_cleanup; |
| 215 | + | |
| 216 | + struct dentry *debugfs_node_dir; | |
| 214 | 217 | }; |
| 215 | 218 | |
| 216 | 219 | enum { |
| @@ -436,13 +439,17 @@ static ssize_t debugfs_read(struct file *filp, char __user *ubuf, size_t count, · 219 unmodified lines | ||
| 436 | 439 | char *buf; |
| 437 | 440 | ssize_t ret, out_offset, out_count; |
| 438 | 441 | |
| 442 | + qp = filp->private_data; | |
| 443 | + | |
| 444 | + if (!qp || !qp->link_is_up) | |
| 445 | + return 0; | |
| 446 | + | |
| 439 | 447 | out_count = 1000; |
| 440 | 448 | |
| 441 | 449 | buf = kmalloc(out_count, GFP_KERNEL); |
| 442 | 450 | if (!buf) |
| 443 | 451 | return -ENOMEM; |
| 444 | 452 | |
| 445 | − qp = filp->private_data; | |
| 446 | 453 | out_offset = 0; |
| 447 | 454 | out_offset += snprintf(buf + out_offset, out_count - out_offset, |
| 448 | 455 | "NTB QP stats\n"); |
| @@ -534,6 +541,27 @@ out: · 85 unmodified lines | ||
| 534 | 541 | return entry; |
| 535 | 542 | } |
| 536 | 543 | |
| 544 | +static struct ntb_queue_entry *ntb_list_mv(spinlock_t *lock, | |
| 545 | + struct list_head *list, | |
| 546 | + struct list_head *to_list) | |
| 547 | +{ | |
| 548 | + struct ntb_queue_entry *entry; | |
| 549 | + unsigned long flags; | |
| 550 | + | |
| 551 | + spin_lock_irqsave(lock, flags); | |
| 552 | + | |
| 553 | + if (list_empty(list)) { | |
| 554 | + entry = NULL; | |
| 555 | + } else { | |
| 556 | + entry = list_first_entry(list, struct ntb_queue_entry, entry); | |
| 557 | + list_move_tail(&entry->entry, to_list); | |
| 558 | + } | |
| 559 | + | |
| 560 | + spin_unlock_irqrestore(lock, flags); | |
| 561 | + | |
| 562 | + return entry; | |
| 563 | +} | |
| 564 | + | |
| 537 | 565 | static int ntb_transport_setup_qp_mw(struct ntb_transport_ctx *nt, |
| 538 | 566 | unsigned int qp_num) |
| 539 | 567 | { |
| @@ -601,13 +629,16 @@ static void ntb_free_mw(struct ntb_transport_ctx *nt, int num_mw) · 61 unmodified lines | ||
| 601 | 629 | } |
| 602 | 630 | |
| 603 | 631 | static int ntb_set_mw(struct ntb_transport_ctx *nt, int num_mw, |
| 604 | − unsigned int size) | |
| 632 | + resource_size_t size) | |
| 605 | 633 | { |
| 606 | 634 | struct ntb_transport_mw *mw = &nt->mw_vec[num_mw]; |
| 607 | 635 | struct pci_dev *pdev = nt->ndev->pdev; |
| 608 | − unsigned int xlat_size, buff_size; | |
| 636 | + size_t xlat_size, buff_size; | |
| 609 | 637 | int rc; |
| 610 | 638 | |
| 639 | + if (!size) | |
| 640 | + return -EINVAL; | |
| 641 | + | |
| 611 | 642 | xlat_size = round_up(size, mw->xlat_align_size); |
| 612 | 643 | buff_size = round_up(size, mw->xlat_align); |
| 613 | 644 | |
| @@ -627,7 +658,7 @@ static int ntb_set_mw(struct ntb_transport_ctx *nt, int num_mw, · 13 unmodified lines | ||
| 627 | 658 | if (!mw->virt_addr) { |
| 628 | 659 | mw->xlat_size = 0; |
| 629 | 660 | mw->buff_size = 0; |
| 630 | − dev_err(&pdev->dev, "Unable to alloc MW buff of size %d\n", | |
| 661 | + dev_err(&pdev->dev, "Unable to alloc MW buff of size %zu\n", | |
| 631 | 662 | buff_size); |
| 632 | 663 | return -ENOMEM; |
| 633 | 664 | } |
| @@ -867,6 +898,8 @@ static void ntb_qp_link_work(struct work_struct *work) · 233 unmodified lines | ||
| 867 | 898 | |
| 868 | 899 | if (qp->event_handler) |
| 869 | 900 | qp->event_handler(qp->cb_data, qp->link_is_up); |
| 901 | + | |
| 902 | + tasklet_schedule(&qp->rxc_db_work); | |
| 870 | 903 | } else if (nt->link_is_up) |
| 871 | 904 | schedule_delayed_work(&qp->link_work, |
| 872 | 905 | msecs_to_jiffies(NTB_LINK_DOWN_TIMEOUT)); |
| @@ -923,12 +956,12 @@ static int ntb_transport_init_queue(struct ntb_transport_ctx *nt, · 50 unmodified lines | ||
| 923 | 956 | qp->tx_max_frame = min(transport_mtu, tx_size / 2); |
| 924 | 957 | qp->tx_max_entry = tx_size / qp->tx_max_frame; |
| 925 | 958 | |
| 926 | − if (nt_debugfs_dir) { | |
| 959 | + if (nt->debugfs_node_dir) { | |
| 927 | 960 | char debugfs_name[4]; |
| 928 | 961 | |
| 929 | 962 | snprintf(debugfs_name, 4, "qp%d", qp_num); |
| 930 | 963 | qp->debugfs_dir = debugfs_create_dir(debugfs_name, |
| 931 | − nt_debugfs_dir); | |
| 964 | + nt->debugfs_node_dir); | |
| 932 | 965 | |
| 933 | 966 | qp->debugfs_stats = debugfs_create_file("stats", S_IRUSR, |
| 934 | 967 | qp->debugfs_dir, qp, |
| @@ -941,10 +974,10 @@ static int ntb_transport_init_queue(struct ntb_transport_ctx *nt, · 6 unmodified lines | ||
| 941 | 974 | INIT_DELAYED_WORK(&qp->link_work, ntb_qp_link_work); |
| 942 | 975 | INIT_WORK(&qp->link_cleanup, ntb_qp_link_cleanup_work); |
| 943 | 976 | |
| 944 | − spin_lock_init(&qp->ntb_rx_pend_q_lock); | |
| 945 | − spin_lock_init(&qp->ntb_rx_free_q_lock); | |
| 977 | + spin_lock_init(&qp->ntb_rx_q_lock); | |
| 946 | 978 | spin_lock_init(&qp->ntb_tx_free_q_lock); |
| 947 | 979 | |
| 980 | + INIT_LIST_HEAD(&qp->rx_post_q); | |
| 948 | 981 | INIT_LIST_HEAD(&qp->rx_pend_q); |
| 949 | 982 | INIT_LIST_HEAD(&qp->rx_free_q); |
| 950 | 983 | INIT_LIST_HEAD(&qp->tx_free_q); |
| @@ -1031,6 +1064,12 @@ static int ntb_transport_probe(struct ntb_client *self, struct ntb_dev *ndev) · 80 unmodified lines | ||
| 1031 | 1064 | goto err2; |
| 1032 | 1065 | } |
| 1033 | 1066 | |
| 1067 | + if (nt_debugfs_dir) { | |
| 1068 | + nt->debugfs_node_dir = | |
| 1069 | + debugfs_create_dir(pci_name(ndev->pdev), | |
| 1070 | + nt_debugfs_dir); | |
| 1071 | + } | |
| 1072 | + | |
| 1034 | 1073 | for (i = 0; i < qp_count; i++) { |
| 1035 | 1074 | rc = ntb_transport_init_queue(nt, i); |
| 1036 | 1075 | if (rc) |
| @@ -1107,22 +1146,47 @@ static void ntb_transport_free(struct ntb_client *self, struct ntb_dev *ndev) · 70 unmodified lines | ||
| 1107 | 1146 | kfree(nt); |
| 1108 | 1147 | } |
| 1109 | 1148 | |
| 1110 | −static void ntb_rx_copy_callback(void *data) | |
| 1149 | +static void ntb_complete_rxc(struct ntb_transport_qp *qp) | |
| 1111 | 1150 | { |
| 1112 | − struct ntb_queue_entry *entry = data; | |
| 1113 | − struct ntb_transport_qp *qp = entry->qp; | |
| 1114 | − void *cb_data = entry->cb_data; | |
| 1115 | − unsigned int len = entry->len; | |
| 1116 | − struct ntb_payload_header *hdr = entry->rx_hdr; | |
| 1151 | + struct ntb_queue_entry *entry; | |
| 1152 | + void *cb_data; | |
| 1153 | + unsigned int len; | |
| 1154 | + unsigned long irqflags; | |
| 1155 | + | |
| 1156 | + spin_lock_irqsave(&qp->ntb_rx_q_lock, irqflags); | |
| 1157 | + | |
| 1158 | + while (!list_empty(&qp->rx_post_q)) { | |
| 1159 | + entry = list_first_entry(&qp->rx_post_q, | |
| 1160 | + struct ntb_queue_entry, entry); | |
| 1161 | + if (!(entry->flags & DESC_DONE_FLAG)) | |
| 1162 | + break; | |
| 1163 | + | |
| 1164 | + entry->rx_hdr->flags = 0; | |
| 1165 | + iowrite32(entry->index, &qp->rx_info->entry); | |
| 1117 | 1166 | |
| 1118 | − hdr->flags = 0; | |
| 1167 | + cb_data = entry->cb_data; | |
| 1168 | + len = entry->len; | |
| 1119 | 1169 | |
| 1120 | − iowrite32(entry->index, &qp->rx_info->entry); | |
| 1170 | + list_move_tail(&entry->entry, &qp->rx_free_q); | |
| 1121 | 1171 | |
| 1122 | − ntb_list_add(&qp->ntb_rx_free_q_lock, &entry->entry, &qp->rx_free_q); | |
| 1172 | + spin_unlock_irqrestore(&qp->ntb_rx_q_lock, irqflags); | |
| 1123 | 1173 | |
| 1124 | − if (qp->rx_handler && qp->client_ready) | |
| 1125 | − qp->rx_handler(qp, qp->cb_data, cb_data, len); | |
| 1174 | + if (qp->rx_handler && qp->client_ready) | |
| 1175 | + qp->rx_handler(qp, qp->cb_data, cb_data, len); | |
| 1176 | + | |
| 1177 | + spin_lock_irqsave(&qp->ntb_rx_q_lock, irqflags); | |
| 1178 | + } | |
| 1179 | + | |
| 1180 | + spin_unlock_irqrestore(&qp->ntb_rx_q_lock, irqflags); | |
| 1181 | +} | |
| 1182 | + | |
| 1183 | +static void ntb_rx_copy_callback(void *data) | |
| 1184 | +{ | |
| 1185 | + struct ntb_queue_entry *entry = data; | |
| 1186 | + | |
| 1187 | + entry->flags |= DESC_DONE_FLAG; | |
| 1188 | + | |
| 1189 | + ntb_complete_rxc(entry->qp); | |
| 1126 | 1190 | } |
| 1127 | 1191 | |
| 1128 | 1192 | static void ntb_memcpy_rx(struct ntb_queue_entry *entry, void *offset) |
| @@ -1138,19 +1202,18 @@ static void ntb_memcpy_rx(struct ntb_queue_entry *entry, void *offset) · 9 unmodified lines | ||
| 1138 | 1202 | ntb_rx_copy_callback(entry); |
| 1139 | 1203 | } |
| 1140 | 1204 | |
| 1141 | −static void ntb_async_rx(struct ntb_queue_entry *entry, void *offset, | |
| 1142 | − size_t len) | |
| 1205 | +static void ntb_async_rx(struct ntb_queue_entry *entry, void *offset) | |
| 1143 | 1206 | { |
| 1144 | 1207 | struct dma_async_tx_descriptor *txd; |
| 1145 | 1208 | struct ntb_transport_qp *qp = entry->qp; |
| 1146 | 1209 | struct dma_chan *chan = qp->dma_chan; |
| 1147 | 1210 | struct dma_device *device; |
| 1148 | − size_t pay_off, buff_off; | |
| 1211 | + size_t pay_off, buff_off, len; | |
| 1149 | 1212 | struct dmaengine_unmap_data *unmap; |
| 1150 | 1213 | dma_cookie_t cookie; |
| 1151 | 1214 | void *buf = entry->buf; |
| 1152 | 1215 | |
| 1153 | − entry->len = len; | |
| 1216 | + len = entry->len; | |
| 1154 | 1217 | |
| 1155 | 1218 | if (!chan) |
| 1156 | 1219 | goto err; |
| @@ -1226,7 +1289,6 @@ static int ntb_process_rxc(struct ntb_transport_qp *qp) · 69 unmodified lines | ||
| 1226 | 1289 | struct ntb_payload_header *hdr; |
| 1227 | 1290 | struct ntb_queue_entry *entry; |
| 1228 | 1291 | void *offset; |
| 1229 | − int rc; | |
| 1230 | 1292 | |
| 1231 | 1293 | offset = qp->rx_buff + qp->rx_max_frame * qp->rx_index; |
| 1232 | 1294 | hdr = offset + qp->rx_max_frame - sizeof(struct ntb_payload_header); |
| @@ -1255,65 +1317,43 @@ static int ntb_process_rxc(struct ntb_transport_qp *qp) · 22 unmodified lines | ||
| 1255 | 1317 | return -EIO; |
| 1256 | 1318 | } |
| 1257 | 1319 | |
| 1258 | − entry = ntb_list_rm(&qp->ntb_rx_pend_q_lock, &qp->rx_pend_q); | |
| 1320 | + entry = ntb_list_mv(&qp->ntb_rx_q_lock, &qp->rx_pend_q, &qp->rx_post_q); | |
| 1259 | 1321 | if (!entry) { |
| 1260 | 1322 | dev_dbg(&qp->ndev->pdev->dev, "no receive buffer\n"); |
| 1261 | 1323 | qp->rx_err_no_buf++; |
| 1262 | − | |
| 1263 | − rc = -ENOMEM; | |
| 1264 | − goto err; | |
| 1324 | + return -EAGAIN; | |
| 1265 | 1325 | } |
| 1266 | 1326 | |
| 1327 | + entry->rx_hdr = hdr; | |
| 1328 | + entry->index = qp->rx_index; | |
| 1329 | + | |
| 1267 | 1330 | if (hdr->len > entry->len) { |
| 1268 | 1331 | dev_dbg(&qp->ndev->pdev->dev, |
| 1269 | 1332 | "receive buffer overflow! Wanted %d got %d\n", |
| 1270 | 1333 | hdr->len, entry->len); |
| 1271 | 1334 | qp->rx_err_oflow++; |
| 1272 | 1335 | |
| 1273 | − rc = -EIO; | |
| 1274 | − goto err; | |
| 1275 | − } | |
| 1336 | + entry->len = -EIO; | |
| 1337 | + entry->flags |= DESC_DONE_FLAG; | |
| 1276 | 1338 | |
| 1277 | − dev_dbg(&qp->ndev->pdev->dev, | |
| 1278 | − "RX OK index %u ver %u size %d into buf size %d\n", | |
| 1279 | − qp->rx_index, hdr->ver, hdr->len, entry->len); | |
| 1339 | + ntb_complete_rxc(qp); | |
| 1340 | + } else { | |
| 1341 | + dev_dbg(&qp->ndev->pdev->dev, | |
| 1342 | + "RX OK index %u ver %u size %d into buf size %d\n", | |
| 1343 | + qp->rx_index, hdr->ver, hdr->len, entry->len); | |
| 1280 | 1344 | |
| 1281 | − qp->rx_bytes += hdr->len; | |
| 1282 | − qp->rx_pkts++; | |
| 1345 | + qp->rx_bytes += hdr->len; | |
| 1346 | + qp->rx_pkts++; | |
| 1283 | 1347 | |
| 1284 | − entry->index = qp->rx_index; | |
| 1285 | − entry->rx_hdr = hdr; | |
| 1348 | + entry->len = hdr->len; | |
| 1286 | 1349 | |
| 1287 | − ntb_async_rx(entry, offset, hdr->len); | |
| 1350 | + ntb_async_rx(entry, offset); | |
| 1351 | + } | |
| 1288 | 1352 | |
| 1289 | 1353 | qp->rx_index++; |
| 1290 | 1354 | qp->rx_index %= qp->rx_max_entry; |
| 1291 | 1355 | |
| 1292 | 1356 | return 0; |
| 1293 | − | |
| 1294 | −err: | |
| 1295 | − /* FIXME: if this syncrhonous update of the rx_index gets ahead of | |
| 1296 | − * asyncrhonous ntb_rx_copy_callback of previous entry, there are three | |
| 1297 | − * scenarios: | |
| 1298 | − * | |
| 1299 | − * 1) The peer might miss this update, but observe the update | |
| 1300 | − * from the memcpy completion callback. In this case, the buffer will | |
| 1301 | − * not be freed on the peer to be reused for a different packet. The | |
| 1302 | − * successful rx of a later packet would clear the condition, but the | |
| 1303 | − * condition could persist if several rx fail in a row. | |
| 1304 | − * | |
| 1305 | − * 2) The peer may observe this update before the asyncrhonous copy of | |
| 1306 | − * prior packets is completed. The peer may overwrite the buffers of | |
| 1307 | − * the prior packets before they are copied. | |
| 1308 | − * | |
| 1309 | − * 3) Both: the peer may observe the update, and then observe the index | |
| 1310 | − * decrement by the asynchronous completion callback. Who knows what | |
| 1311 | − * badness that will cause. | |
| 1312 | − */ | |
| 1313 | − hdr->flags = 0; | |
| 1314 | − iowrite32(qp->rx_index, &qp->rx_info->entry); | |
| 1315 | − | |
| 1316 | − return rc; | |
| 1317 | 1357 | } |
| 1318 | 1358 | |
| 1319 | 1359 | static void ntb_transport_rxc_db(unsigned long data) |
| @@ -1333,7 +1373,7 @@ static void ntb_transport_rxc_db(unsigned long data) · 13 unmodified lines | ||
| 1333 | 1373 | break; |
| 1334 | 1374 | } |
| 1335 | 1375 | |
| 1336 | − if (qp->dma_chan) | |
| 1376 | + if (i && qp->dma_chan) | |
| 1337 | 1377 | dma_async_issue_pending(qp->dma_chan); |
| 1338 | 1378 | |
| 1339 | 1379 | if (i == qp->rx_max_entry) { |
| @@ -1609,7 +1649,7 @@ ntb_transport_create_queue(void *data, struct device *client_dev, · 269 unmodified lines | ||
| 1609 | 1649 | goto err1; |
| 1610 | 1650 | |
| 1611 | 1651 | entry->qp = qp; |
| 1612 | − ntb_list_add(&qp->ntb_rx_free_q_lock, &entry->entry, | |
| 1652 | + ntb_list_add(&qp->ntb_rx_q_lock, &entry->entry, | |
| 1613 | 1653 | &qp->rx_free_q); |
| 1614 | 1654 | } |
| 1615 | 1655 | |
| @@ -1634,7 +1674,7 @@ err2: · 18 unmodified lines | ||
| 1634 | 1674 | while ((entry = ntb_list_rm(&qp->ntb_tx_free_q_lock, &qp->tx_free_q))) |
| 1635 | 1675 | kfree(entry); |
| 1636 | 1676 | err1: |
| 1637 | − while ((entry = ntb_list_rm(&qp->ntb_rx_free_q_lock, &qp->rx_free_q))) | |
| 1677 | + while ((entry = ntb_list_rm(&qp->ntb_rx_q_lock, &qp->rx_free_q))) | |
| 1638 | 1678 | kfree(entry); |
| 1639 | 1679 | if (qp->dma_chan) |
| 1640 | 1680 | dma_release_channel(qp->dma_chan); |
| @@ -1652,7 +1692,6 @@ EXPORT_SYMBOL_GPL(ntb_transport_create_queue); · 11 unmodified lines | ||
| 1652 | 1692 | */ |
| 1653 | 1693 | void ntb_transport_free_queue(struct ntb_transport_qp *qp) |
| 1654 | 1694 | { |
| 1655 | − struct ntb_transport_ctx *nt = qp->transport; | |
| 1656 | 1695 | struct pci_dev *pdev; |
| 1657 | 1696 | struct ntb_queue_entry *entry; |
| 1658 | 1697 | u64 qp_bit; |
| @@ -1689,18 +1728,23 @@ void ntb_transport_free_queue(struct ntb_transport_qp *qp) · 30 unmodified lines | ||
| 1689 | 1728 | qp->tx_handler = NULL; |
| 1690 | 1729 | qp->event_handler = NULL; |
| 1691 | 1730 | |
| 1692 | − while ((entry = ntb_list_rm(&qp->ntb_rx_free_q_lock, &qp->rx_free_q))) | |
| 1731 | + while ((entry = ntb_list_rm(&qp->ntb_rx_q_lock, &qp->rx_free_q))) | |
| 1693 | 1732 | kfree(entry); |
| 1694 | 1733 | |
| 1695 | − while ((entry = ntb_list_rm(&qp->ntb_rx_pend_q_lock, &qp->rx_pend_q))) { | |
| 1696 | − dev_warn(&pdev->dev, "Freeing item from a non-empty queue\n"); | |
| 1734 | + while ((entry = ntb_list_rm(&qp->ntb_rx_q_lock, &qp->rx_pend_q))) { | |
| 1735 | + dev_warn(&pdev->dev, "Freeing item from non-empty rx_pend_q\n"); | |
| 1736 | + kfree(entry); | |
| 1737 | + } | |
| 1738 | + | |
| 1739 | + while ((entry = ntb_list_rm(&qp->ntb_rx_q_lock, &qp->rx_post_q))) { | |
| 1740 | + dev_warn(&pdev->dev, "Freeing item from non-empty rx_post_q\n"); | |
| 1697 | 1741 | kfree(entry); |
| 1698 | 1742 | } |
| 1699 | 1743 | |
| 1700 | 1744 | while ((entry = ntb_list_rm(&qp->ntb_tx_free_q_lock, &qp->tx_free_q))) |
| 1701 | 1745 | kfree(entry); |
| 1702 | 1746 | |
| 1703 | − nt->qp_bitmap_free |= qp_bit; | |
| 1747 | + qp->transport->qp_bitmap_free |= qp_bit; | |
| 1704 | 1748 | |
| 1705 | 1749 | dev_info(&pdev->dev, "NTB Transport QP %d freed\n", qp->qp_num); |
| 1706 | 1750 | } |
| @@ -1724,14 +1768,14 @@ void *ntb_transport_rx_remove(struct ntb_transport_qp *qp, unsigned int *len) · 17 unmodified lines | ||
| 1724 | 1768 | if (!qp || qp->client_ready) |
| 1725 | 1769 | return NULL; |
| 1726 | 1770 | |
| 1727 | − entry = ntb_list_rm(&qp->ntb_rx_pend_q_lock, &qp->rx_pend_q); | |
| 1771 | + entry = ntb_list_rm(&qp->ntb_rx_q_lock, &qp->rx_pend_q); | |
| 1728 | 1772 | if (!entry) |
| 1729 | 1773 | return NULL; |
| 1730 | 1774 | |
| 1731 | 1775 | buf = entry->cb_data; |
| 1732 | 1776 | *len = entry->len; |
| 1733 | 1777 | |
| 1734 | − ntb_list_add(&qp->ntb_rx_free_q_lock, &entry->entry, &qp->rx_free_q); | |
| 1778 | + ntb_list_add(&qp->ntb_rx_q_lock, &entry->entry, &qp->rx_free_q); | |
| 1735 | 1779 | |
| 1736 | 1780 | return buf; |
| 1737 | 1781 | } |
| @@ -1757,15 +1801,18 @@ int ntb_transport_rx_enqueue(struct ntb_transport_qp *qp, void *cb, void *data, · 19 unmodified lines | ||
| 1757 | 1801 | if (!qp) |
| 1758 | 1802 | return -EINVAL; |
| 1759 | 1803 | |
| 1760 | − entry = ntb_list_rm(&qp->ntb_rx_free_q_lock, &qp->rx_free_q); | |
| 1804 | + entry = ntb_list_rm(&qp->ntb_rx_q_lock, &qp->rx_free_q); | |
| 1761 | 1805 | if (!entry) |
| 1762 | 1806 | return -ENOMEM; |
| 1763 | 1807 | |
| 1764 | 1808 | entry->cb_data = cb; |
| 1765 | 1809 | entry->buf = data; |
| 1766 | 1810 | entry->len = len; |
| 1811 | + entry->flags = 0; | |
| 1812 | + | |
| 1813 | + ntb_list_add(&qp->ntb_rx_q_lock, &entry->entry, &qp->rx_pend_q); | |
| 1767 | 1814 | |
| 1768 | − ntb_list_add(&qp->ntb_rx_pend_q_lock, &entry->entry, &qp->rx_pend_q); | |
| 1815 | + tasklet_schedule(&qp->rxc_db_work); | |
| 1769 | 1816 | |
| 1770 | 1817 | return 0; |
| 1771 | 1818 | } |
| @@ -458,10 +458,15 @@ static void nd_region_notify_driver_action(struct nvdimm_bus *nvdimm_bus, · 457 unmodified lines | ||
| 458 | 458 | nvdimm_bus_unlock(dev); |
| 459 | 459 | } |
| 460 | 460 | if (is_nd_btt(dev) && probe) { |
| 461 | + struct nd_btt *nd_btt = to_nd_btt(dev); | |
| 462 | + | |
| 461 | 463 | nd_region = to_nd_region(dev->parent); |
| 462 | 464 | nvdimm_bus_lock(dev); |
| 463 | 465 | if (nd_region->btt_seed == dev) |
| 464 | 466 | nd_region_create_btt_seed(nd_region); |
| 467 | + if (nd_region->ns_seed == &nd_btt->ndns->dev && | |
| 468 | + is_nd_blk(dev->parent)) | |
| 469 | + nd_region_create_blk_seed(nd_region); | |
| 465 | 470 | nvdimm_bus_unlock(dev); |
| 466 | 471 | } |
| 467 | 472 | } |
| @@ -47,7 +47,7 @@ config OF_DYNAMIC · 46 unmodified lines | ||
| 47 | 47 | |
| 48 | 48 | config OF_ADDRESS |
| 49 | 49 | def_bool y |
| 50 | − depends on !SPARC | |
| 50 | + depends on !SPARC && HAS_IOMEM | |
| 51 | 51 | select OF_ADDRESS_PCI if PCI |
| 52 | 52 | |
| 53 | 53 | config OF_ADDRESS_PCI |
| @@ -979,7 +979,6 @@ static struct platform_driver unittest_driver = { · 978 unmodified lines | ||
| 979 | 979 | .remove = unittest_remove, |
| 980 | 980 | .driver = { |
| 981 | 981 | .name = "unittest", |
| 982 | − .owner = THIS_MODULE, | |
| 983 | 982 | .of_match_table = of_match_ptr(unittest_match), |
| 984 | 983 | }, |
| 985 | 984 | }; |
| @@ -1666,7 +1665,6 @@ static const struct i2c_device_id unittest_i2c_dev_id[] = { · 680 unmodified lines | ||
| 1666 | 1665 | static struct i2c_driver unittest_i2c_dev_driver = { |
| 1667 | 1666 | .driver = { |
| 1668 | 1667 | .name = "unittest-i2c-dev", |
| 1669 | − .owner = THIS_MODULE, | |
| 1670 | 1668 | }, |
| 1671 | 1669 | .probe = unittest_i2c_dev_probe, |
| 1672 | 1670 | .remove = unittest_i2c_dev_remove, |
| @@ -1761,7 +1759,6 @@ static const struct i2c_device_id unittest_i2c_mux_id[] = { · 88 unmodified lines | ||
| 1761 | 1759 | static struct i2c_driver unittest_i2c_mux_driver = { |
| 1762 | 1760 | .driver = { |
| 1763 | 1761 | .name = "unittest-i2c-mux", |
| 1764 | − .owner = THIS_MODULE, | |
| 1765 | 1762 | }, |
| 1766 | 1763 | .probe = unittest_i2c_mux_probe, |
| 1767 | 1764 | .remove = unittest_i2c_mux_remove, |
| @@ -891,8 +891,10 @@ parport_register_dev_model(struct parport *port, const char *name, · 890 unmodified lines | ||
| 891 | 891 | par_dev->dev.release = free_pardevice; |
| 892 | 892 | par_dev->devmodel = true; |
| 893 | 893 | ret = device_register(&par_dev->dev); |
| 894 | − if (ret) | |
| 895 | − goto err_put_dev; | |
| 894 | + if (ret) { | |
| 895 | + put_device(&par_dev->dev); | |
| 896 | + goto err_put_port; | |
| 897 | + } | |
| 896 | 898 | |
| 897 | 899 | /* Chain this onto the list */ |
| 898 | 900 | par_dev->prev = NULL; |
| @@ -907,7 +909,8 @@ parport_register_dev_model(struct parport *port, const char *name, · 8 unmodified lines | ||
| 907 | 909 | spin_unlock(&port->physport->pardevice_lock); |
| 908 | 910 | pr_debug("%s: cannot grant exclusive access for device %s\n", |
| 909 | 911 | port->name, name); |
| 910 | − goto err_put_dev; | |
| 912 | + device_unregister(&par_dev->dev); | |
| 913 | + goto err_put_port; | |
| 911 | 914 | } |
| 912 | 915 | port->flags |= PARPORT_FLAG_EXCL; |
| 913 | 916 | } |
| @@ -938,8 +941,6 @@ parport_register_dev_model(struct parport *port, const char *name, · 24 unmodified lines | ||
| 938 | 941 | |
| 939 | 942 | return par_dev; |
| 940 | 943 | |
| 941 | −err_put_dev: | |
| 942 | − put_device(&par_dev->dev); | |
| 943 | 944 | err_free_devname: |
| 944 | 945 | kfree(devname); |
| 945 | 946 | err_free_par_dev: |
| @@ -56,6 +56,7 @@ config PHY_EXYNOS_MIPI_VIDEO · 55 unmodified lines | ||
| 56 | 56 | |
| 57 | 57 | config PHY_PXA_28NM_HSIC |
| 58 | 58 | tristate "Marvell USB HSIC 28nm PHY Driver" |
| 59 | + depends on HAS_IOMEM | |
| 59 | 60 | select GENERIC_PHY |
| 60 | 61 | help |
| 61 | 62 | Enable this to support Marvell USB HSIC PHY driver for Marvell |
| @@ -66,6 +67,7 @@ config PHY_PXA_28NM_HSIC · 4 unmodified lines | ||
| 66 | 67 | |
| 67 | 68 | config PHY_PXA_28NM_USB2 |
| 68 | 69 | tristate "Marvell USB 2.0 28nm PHY Driver" |
| 70 | + depends on HAS_IOMEM | |
| 69 | 71 | select GENERIC_PHY |
| 70 | 72 | help |
| 71 | 73 | Enable this to support Marvell USB 2.0 PHY driver for Marvell |
| @@ -105,9 +105,9 @@ · 104 unmodified lines | ||
| 105 | 105 | |
| 106 | 106 | static const u32 phy_berlin_pll_dividers[] = { |
| 107 | 107 | /* Berlin 2 */ |
| 108 | − CLK_REF_DIV(0xc) | FEEDBACK_CLK_DIV(0x54), | |
| 109 | − /* Berlin 2CD */ | |
| 110 | 108 | CLK_REF_DIV(0x6) | FEEDBACK_CLK_DIV(0x55), |
| 109 | + /* Berlin 2CD/Q */ | |
| 110 | + CLK_REF_DIV(0xc) | FEEDBACK_CLK_DIV(0x54), | |
| 111 | 111 | }; |
| 112 | 112 | |
| 113 | 113 | struct phy_berlin_usb_priv { |
| @@ -212,6 +212,7 @@ void sun4i_usb_phy_set_squelch_detect(struct phy *_phy, bool enabled) · 211 unmodified lines | ||
| 212 | 212 | |
| 213 | 213 | sun4i_usb_phy_write(phy, PHY_SQUELCH_DETECT, enabled ? 0 : 2, 2); |
| 214 | 214 | } |
| 215 | +EXPORT_SYMBOL_GPL(sun4i_usb_phy_set_squelch_detect); | |
| 215 | 216 | |
| 216 | 217 | static struct phy_ops sun4i_usb_phy_ops = { |
| 217 | 218 | .init = sun4i_usb_phy_init, |
| @@ -28,7 +28,8 @@ · 27 unmodified lines | ||
| 28 | 28 | #include <linux/delay.h> |
| 29 | 29 | #include <linux/phy/omap_control_phy.h> |
| 30 | 30 | #include <linux/of_platform.h> |
| 31 | −#include <linux/spinlock.h> | |
| 31 | +#include <linux/mfd/syscon.h> | |
| 32 | +#include <linux/regmap.h> | |
| 32 | 33 | |
| 33 | 34 | #define PLL_STATUS 0x00000004 |
| 34 | 35 | #define PLL_GO 0x00000008 |
| @@ -53,6 +54,8 @@ · 18 unmodified lines | ||
| 53 | 54 | #define PLL_LOCK 0x2 |
| 54 | 55 | #define PLL_IDLE 0x1 |
| 55 | 56 | |
| 57 | +#define SATA_PLL_SOFT_RESET BIT(18) | |
| 58 | + | |
| 56 | 59 | /* |
| 57 | 60 | * This is an Empirical value that works, need to confirm the actual |
| 58 | 61 | * value required for the PIPE3PHY_PLL_CONFIGURATION2.PLL_IDLE status |
| @@ -83,10 +86,9 @@ struct ti_pipe3 { · 24 unmodified lines | ||
| 83 | 86 | struct clk *refclk; |
| 84 | 87 | struct clk *div_clk; |
| 85 | 88 | struct pipe3_dpll_map *dpll_map; |
| 86 | − bool enabled; | |
| 87 | − spinlock_t lock; /* serialize clock enable/disable */ | |
| 88 | − /* the below flag is needed specifically for SATA */ | |
| 89 | − bool refclk_enabled; | |
| 89 | + struct regmap *dpll_reset_syscon; /* ctrl. reg. acces */ | |
| 90 | + unsigned int dpll_reset_reg; /* reg. index within syscon */ | |
| 91 | + bool sata_refclk_enabled; | |
| 90 | 92 | }; |
| 91 | 93 | |
| 92 | 94 | static struct pipe3_dpll_map dpll_map_usb[] = { |
| @@ -137,6 +139,9 @@ static struct pipe3_dpll_params *ti_pipe3_get_dpll_params(struct ti_pipe3 *phy) · 44 unmodified lines | ||
| 137 | 139 | return NULL; |
| 138 | 140 | } |
| 139 | 141 | |
| 142 | +static int ti_pipe3_enable_clocks(struct ti_pipe3 *phy); | |
| 143 | +static void ti_pipe3_disable_clocks(struct ti_pipe3 *phy); | |
| 144 | + | |
| 140 | 145 | static int ti_pipe3_power_off(struct phy *x) |
| 141 | 146 | { |
| 142 | 147 | struct ti_pipe3 *phy = phy_get_drvdata(x); |
| @@ -217,6 +222,7 @@ static int ti_pipe3_init(struct phy *x) · 74 unmodified lines | ||
| 217 | 222 | u32 val; |
| 218 | 223 | int ret = 0; |
| 219 | 224 | |
| 225 | + ti_pipe3_enable_clocks(phy); | |
| 220 | 226 | /* |
| 221 | 227 | * Set pcie_pcs register to 0x96 for proper functioning of phy |
| 222 | 228 | * as recommended in AM572x TRM SPRUHZ6, section 18.5.2.2, table |
| @@ -250,33 +256,46 @@ static int ti_pipe3_exit(struct phy *x) · 27 unmodified lines | ||
| 250 | 256 | u32 val; |
| 251 | 257 | unsigned long timeout; |
| 252 | 258 | |
| 253 | − /* SATA DPLL can't be powered down due to Errata i783 and PCIe | |
| 254 | − * does not have internal DPLL | |
| 259 | + /* If dpll_reset_syscon is not present we wont power down SATA DPLL | |
| 260 | + * due to Errata i783 | |
| 255 | 261 | */ |
| 256 | − if (of_device_is_compatible(phy->dev->of_node, "ti,phy-pipe3-sata") || | |
| 257 | − of_device_is_compatible(phy->dev->of_node, "ti,phy-pipe3-pcie")) | |
| 262 | + if (of_device_is_compatible(phy->dev->of_node, "ti,phy-pipe3-sata") && | |
| 263 | + !phy->dpll_reset_syscon) | |
| 258 | 264 | return 0; |
| 259 | 265 | |
| 260 | − /* Put DPLL in IDLE mode */ | |
| 261 | − val = ti_pipe3_readl(phy->pll_ctrl_base, PLL_CONFIGURATION2); | |
| 262 | − val |= PLL_IDLE; | |
| 263 | − ti_pipe3_writel(phy->pll_ctrl_base, PLL_CONFIGURATION2, val); | |
| 266 | + /* PCIe doesn't have internal DPLL */ | |
| 267 | + if (!of_device_is_compatible(phy->dev->of_node, "ti,phy-pipe3-pcie")) { | |
| 268 | + /* Put DPLL in IDLE mode */ | |
| 269 | + val = ti_pipe3_readl(phy->pll_ctrl_base, PLL_CONFIGURATION2); | |
| 270 | + val |= PLL_IDLE; | |
| 271 | + ti_pipe3_writel(phy->pll_ctrl_base, PLL_CONFIGURATION2, val); | |
| 264 | 272 | |
| 265 | − /* wait for LDO and Oscillator to power down */ | |
| 266 | − timeout = jiffies + msecs_to_jiffies(PLL_IDLE_TIME); | |
| 267 | − do { | |
| 268 | − cpu_relax(); | |
| 269 | − val = ti_pipe3_readl(phy->pll_ctrl_base, PLL_STATUS); | |
| 270 | − if ((val & PLL_TICOPWDN) && (val & PLL_LDOPWDN)) | |
| 271 | − break; | |
| 272 | − } while (!time_after(jiffies, timeout)); | |
| 273 | + /* wait for LDO and Oscillator to power down */ | |
| 274 | + timeout = jiffies + msecs_to_jiffies(PLL_IDLE_TIME); | |
| 275 | + do { | |
| 276 | + cpu_relax(); | |
| 277 | + val = ti_pipe3_readl(phy->pll_ctrl_base, PLL_STATUS); | |
| 278 | + if ((val & PLL_TICOPWDN) && (val & PLL_LDOPWDN)) | |
| 279 | + break; | |
| 280 | + } while (!time_after(jiffies, timeout)); | |
| 281 | + | |
| 282 | + if (!(val & PLL_TICOPWDN) || !(val & PLL_LDOPWDN)) { | |
| 283 | + dev_err(phy->dev, "Failed to power down: PLL_STATUS 0x%x\n", | |
| 284 | + val); | |
| 285 | + return -EBUSY; | |
| 286 | + } | |
| 287 | + } | |
| 273 | 288 | |
| 274 | − if (!(val & PLL_TICOPWDN) || !(val & PLL_LDOPWDN)) { | |
| 275 | − dev_err(phy->dev, "Failed to power down: PLL_STATUS 0x%x\n", | |
| 276 | − val); | |
| 277 | − return -EBUSY; | |
| 289 | + /* i783: SATA needs control bit toggle after PLL unlock */ | |
| 290 | + if (of_device_is_compatible(phy->dev->of_node, "ti,phy-pipe3-sata")) { | |
| 291 | + regmap_update_bits(phy->dpll_reset_syscon, phy->dpll_reset_reg, | |
| 292 | + SATA_PLL_SOFT_RESET, SATA_PLL_SOFT_RESET); | |
| 293 | + regmap_update_bits(phy->dpll_reset_syscon, phy->dpll_reset_reg, | |
| 294 | + SATA_PLL_SOFT_RESET, 0); | |
| 278 | 295 | } |
| 279 | 296 | |
| 297 | + ti_pipe3_disable_clocks(phy); | |
| 298 | + | |
| 280 | 299 | return 0; |
| 281 | 300 | } |
| 282 | 301 | static struct phy_ops ops = { |
| @@ -306,7 +325,6 @@ static int ti_pipe3_probe(struct platform_device *pdev) · 23 unmodified lines | ||
| 306 | 325 | return -ENOMEM; |
| 307 | 326 | |
| 308 | 327 | phy->dev = &pdev->dev; |
| 309 | − spin_lock_init(&phy->lock); | |
| 310 | 328 | |
| 311 | 329 | if (!of_device_is_compatible(node, "ti,phy-pipe3-pcie")) { |
| 312 | 330 | match = of_match_device(ti_pipe3_id_table, &pdev->dev); |
| @@ -350,6 +368,21 @@ static int ti_pipe3_probe(struct platform_device *pdev) · 37 unmodified lines | ||
| 350 | 368 | } |
| 351 | 369 | } else { |
| 352 | 370 | phy->wkupclk = ERR_PTR(-ENODEV); |
| 371 | + phy->dpll_reset_syscon = syscon_regmap_lookup_by_phandle(node, | |
| 372 | + "syscon-pllreset"); | |
| 373 | + if (IS_ERR(phy->dpll_reset_syscon)) { | |
| 374 | + dev_info(&pdev->dev, | |
| 375 | + "can't get syscon-pllreset, sata dpll won't idle\n"); | |
| 376 | + phy->dpll_reset_syscon = NULL; | |
| 377 | + } else { | |
| 378 | + if (of_property_read_u32_index(node, | |
| 379 | + "syscon-pllreset", 1, | |
| 380 | + &phy->dpll_reset_reg)) { | |
| 381 | + dev_err(&pdev->dev, | |
| 382 | + "couldn't get pllreset reg. offset\n"); | |
| 383 | + return -EINVAL; | |
| 384 | + } | |
| 385 | + } | |
| 353 | 386 | } |
| 354 | 387 | |
| 355 | 388 | if (of_device_is_compatible(node, "ti,phy-pipe3-pcie")) { |
| @@ -403,6 +436,16 @@ static int ti_pipe3_probe(struct platform_device *pdev) · 47 unmodified lines | ||
| 403 | 436 | platform_set_drvdata(pdev, phy); |
| 404 | 437 | pm_runtime_enable(phy->dev); |
| 405 | 438 | |
| 439 | + /* | |
| 440 | + * Prevent auto-disable of refclk for SATA PHY due to Errata i783 | |
| 441 | + */ | |
| 442 | + if (of_device_is_compatible(node, "ti,phy-pipe3-sata")) { | |
| 443 | + if (!IS_ERR(phy->refclk)) { | |
| 444 | + clk_prepare_enable(phy->refclk); | |
| 445 | + phy->sata_refclk_enabled = true; | |
| 446 | + } | |
| 447 | + } | |
| 448 | + | |
| 406 | 449 | generic_phy = devm_phy_create(phy->dev, NULL, &ops); |
| 407 | 450 | if (IS_ERR(generic_phy)) |
| 408 | 451 | return PTR_ERR(generic_phy); |
| @@ -413,63 +456,33 @@ static int ti_pipe3_probe(struct platform_device *pdev) · 4 unmodified lines | ||
| 413 | 456 | if (IS_ERR(phy_provider)) |
| 414 | 457 | return PTR_ERR(phy_provider); |
| 415 | 458 | |
| 416 | − pm_runtime_get(&pdev->dev); | |
| 417 | − | |
| 418 | 459 | return 0; |
| 419 | 460 | } |
| 420 | 461 | |
| 421 | 462 | static int ti_pipe3_remove(struct platform_device *pdev) |
| 422 | 463 | { |
| 423 | − if (!pm_runtime_suspended(&pdev->dev)) | |
| 424 | − pm_runtime_put(&pdev->dev); | |
| 425 | 464 | pm_runtime_disable(&pdev->dev); |
| 426 | 465 | |
| 427 | 466 | return 0; |
| 428 | 467 | } |
| 429 | 468 | |
| 430 | −#ifdef CONFIG_PM | |
| 431 | −static int ti_pipe3_enable_refclk(struct ti_pipe3 *phy) | |
| 469 | +static int ti_pipe3_enable_clocks(struct ti_pipe3 *phy) | |
| 432 | 470 | { |
| 433 | − if (!IS_ERR(phy->refclk) && !phy->refclk_enabled) { | |
| 434 | − int ret; | |
| 471 | + int ret = 0; | |
| 435 | 472 | |
| 473 | + if (!IS_ERR(phy->refclk)) { | |
| 436 | 474 | ret = clk_prepare_enable(phy->refclk); |
| 437 | 475 | if (ret) { |
| 438 | 476 | dev_err(phy->dev, "Failed to enable refclk %d\n", ret); |
| 439 | 477 | return ret; |
| 440 | 478 | } |
| 441 | − phy->refclk_enabled = true; | |
| 442 | 479 | } |
| 443 | 480 | |
| 444 | − return 0; | |
| 445 | −} | |
| 446 | − | |
| 447 | −static void ti_pipe3_disable_refclk(struct ti_pipe3 *phy) | |
| 448 | −{ | |
| 449 | − if (!IS_ERR(phy->refclk)) | |
| 450 | − clk_disable_unprepare(phy->refclk); | |
| 451 | − | |
| 452 | − phy->refclk_enabled = false; | |
| 453 | −} | |
| 454 | − | |
| 455 | −static int ti_pipe3_enable_clocks(struct ti_pipe3 *phy) | |
| 456 | −{ | |
| 457 | − int ret = 0; | |
| 458 | − unsigned long flags; | |
| 459 | − | |
| 460 | − spin_lock_irqsave(&phy->lock, flags); | |
| 461 | − if (phy->enabled) | |
| 462 | − goto err1; | |
| 463 | − | |
| 464 | − ret = ti_pipe3_enable_refclk(phy); | |
| 465 | − if (ret) | |
| 466 | − goto err1; | |
| 467 | − | |
| 468 | 481 | if (!IS_ERR(phy->wkupclk)) { |
| 469 | 482 | ret = clk_prepare_enable(phy->wkupclk); |
| 470 | 483 | if (ret) { |
| 471 | 484 | dev_err(phy->dev, "Failed to enable wkupclk %d\n", ret); |
| 472 | − goto err2; | |
| 485 | + goto disable_refclk; | |
| 473 | 486 | } |
| 474 | 487 | } |
| 475 | 488 | |
| @@ -477,96 +490,43 @@ static int ti_pipe3_enable_clocks(struct ti_pipe3 *phy) · 1 unmodified line | ||
| 477 | 490 | ret = clk_prepare_enable(phy->div_clk); |
| 478 | 491 | if (ret) { |
| 479 | 492 | dev_err(phy->dev, "Failed to enable div_clk %d\n", ret); |
| 480 | − goto err3; | |
| 493 | + goto disable_wkupclk; | |
| 481 | 494 | } |
| 482 | 495 | } |
| 483 | 496 | |
| 484 | − phy->enabled = true; | |
| 485 | − spin_unlock_irqrestore(&phy->lock, flags); | |
| 486 | 497 | return 0; |
| 487 | 498 | |
| 488 | −err3: | |
| 499 | +disable_wkupclk: | |
| 489 | 500 | if (!IS_ERR(phy->wkupclk)) |
| 490 | 501 | clk_disable_unprepare(phy->wkupclk); |
| 491 | 502 | |
| 492 | −err2: | |
| 503 | +disable_refclk: | |
| 493 | 504 | if (!IS_ERR(phy->refclk)) |
| 494 | 505 | clk_disable_unprepare(phy->refclk); |
| 495 | 506 | |
| 496 | − ti_pipe3_disable_refclk(phy); | |
| 497 | −err1: | |
| 498 | − spin_unlock_irqrestore(&phy->lock, flags); | |
| 499 | 507 | return ret; |
| 500 | 508 | } |
| 501 | 509 | |
| 502 | 510 | static void ti_pipe3_disable_clocks(struct ti_pipe3 *phy) |
| 503 | 511 | { |
| 504 | − unsigned long flags; | |
| 505 | − | |
| 506 | − spin_lock_irqsave(&phy->lock, flags); | |
| 507 | − if (!phy->enabled) { | |
| 508 | − spin_unlock_irqrestore(&phy->lock, flags); | |
| 509 | − return; | |
| 510 | − } | |
| 511 | − | |
| 512 | 512 | if (!IS_ERR(phy->wkupclk)) |
| 513 | 513 | clk_disable_unprepare(phy->wkupclk); |
| 514 | − /* Don't disable refclk for SATA PHY due to Errata i783 */ | |
| 515 | − if (!of_device_is_compatible(phy->dev->of_node, "ti,phy-pipe3-sata")) | |
| 516 | − ti_pipe3_disable_refclk(phy); | |
| 514 | + if (!IS_ERR(phy->refclk)) { | |
| 515 | + clk_disable_unprepare(phy->refclk); | |
| 516 | + /* | |
| 517 | + * SATA refclk needs an additional disable as we left it | |
| 518 | + * on in probe to avoid Errata i783 | |
| 519 | + */ | |
| 520 | + if (phy->sata_refclk_enabled) { | |
| 521 | + clk_disable_unprepare(phy->refclk); | |
| 522 | + phy->sata_refclk_enabled = false; | |
| 523 | + } | |
| 524 | + } | |
| 525 | + | |
| 517 | 526 | if (!IS_ERR(phy->div_clk)) |
| 518 | 527 | clk_disable_unprepare(phy->div_clk); |
| 519 | − phy->enabled = false; | |
| 520 | − spin_unlock_irqrestore(&phy->lock, flags); | |
| 521 | 528 | } |
| 522 | 529 | |
| 523 | −static int ti_pipe3_runtime_suspend(struct device *dev) | |
| 524 | −{ | |
| 525 | − struct ti_pipe3 *phy = dev_get_drvdata(dev); | |
| 526 | − | |
| 527 | − ti_pipe3_disable_clocks(phy); | |
| 528 | − return 0; | |
| 529 | −} | |
| 530 | − | |
| 531 | −static int ti_pipe3_runtime_resume(struct device *dev) | |
| 532 | −{ | |
| 533 | − struct ti_pipe3 *phy = dev_get_drvdata(dev); | |
| 534 | − int ret = 0; | |
| 535 | − | |
| 536 | − ret = ti_pipe3_enable_clocks(phy); | |
| 537 | − return ret; | |
| 538 | −} | |
| 539 | − | |
| 540 | −static int ti_pipe3_suspend(struct device *dev) | |
| 541 | −{ | |
| 542 | − struct ti_pipe3 *phy = dev_get_drvdata(dev); | |
| 543 | − | |
| 544 | − ti_pipe3_disable_clocks(phy); | |
| 545 | − return 0; | |
| 546 | −} | |
| 547 | − | |
| 548 | −static int ti_pipe3_resume(struct device *dev) | |
| 549 | −{ | |
| 550 | − struct ti_pipe3 *phy = dev_get_drvdata(dev); | |
| 551 | − int ret; | |
| 552 | − | |
| 553 | − ret = ti_pipe3_enable_clocks(phy); | |
| 554 | − if (ret) | |
| 555 | − return ret; | |
| 556 | − | |
| 557 | − pm_runtime_disable(dev); | |
| 558 | − pm_runtime_set_active(dev); | |
| 559 | − pm_runtime_enable(dev); | |
| 560 | − return 0; | |
| 561 | −} | |
| 562 | −#endif | |
| 563 | − | |
| 564 | −static const struct dev_pm_ops ti_pipe3_pm_ops = { | |
| 565 | − SET_RUNTIME_PM_OPS(ti_pipe3_runtime_suspend, | |
| 566 | − ti_pipe3_runtime_resume, NULL) | |
| 567 | − SET_SYSTEM_SLEEP_PM_OPS(ti_pipe3_suspend, ti_pipe3_resume) | |
| 568 | −}; | |
| 569 | − | |
| 570 | 530 | static const struct of_device_id ti_pipe3_id_table[] = { |
| 571 | 531 | { |
| 572 | 532 | .compatible = "ti,phy-usb3", |
| @@ -592,7 +552,6 @@ static struct platform_driver ti_pipe3_driver = { · 19 unmodified lines | ||
| 592 | 552 | .remove = ti_pipe3_remove, |
| 593 | 553 | .driver = { |
| 594 | 554 | .name = "ti-pipe3", |
| 595 | − .pm = &ti_pipe3_pm_ops, | |
| 596 | 555 | .of_match_table = ti_pipe3_id_table, |
| 597 | 556 | }, |
| 598 | 557 | }; |
| @@ -473,6 +473,8 @@ static void bcm2835_gpio_irq_disable(struct irq_data *data) · 472 unmodified lines | ||
| 473 | 473 | |
| 474 | 474 | spin_lock_irqsave(&pc->irq_lock[bank], flags); |
| 475 | 475 | bcm2835_gpio_irq_config(pc, gpio, false); |
| 476 | + /* Clear events that were latched prior to clearing event sources */ | |
| 477 | + bcm2835_gpio_set_bit(pc, GPEDS0, gpio); | |
| 476 | 478 | clear_bit(offset, &pc->enabled_irq_map[bank]); |
| 477 | 479 | spin_unlock_irqrestore(&pc->irq_lock[bank], flags); |
| 478 | 480 | } |
| @@ -403,14 +403,13 @@ static int imx1_pinconf_set(struct pinctrl_dev *pctldev, · 402 unmodified lines | ||
| 403 | 403 | unsigned num_configs) |
| 404 | 404 | { |
| 405 | 405 | struct imx1_pinctrl *ipctl = pinctrl_dev_get_drvdata(pctldev); |
| 406 | − const struct imx1_pinctrl_soc_info *info = ipctl->info; | |
| 407 | 406 | int i; |
| 408 | 407 | |
| 409 | 408 | for (i = 0; i != num_configs; ++i) { |
| 410 | 409 | imx1_write_bit(ipctl, pin_id, configs[i] & 0x01, MX1_PUEN); |
| 411 | 410 | |
| 412 | 411 | dev_dbg(ipctl->dev, "pinconf set pullup pin %s\n", |
| 413 | − info->pins[pin_id].name); | |
| 412 | + pin_desc_get(pctldev, pin_id)->name); | |
| 414 | 413 | } |
| 415 | 414 | |
| 416 | 415 | return 0; |
| @@ -787,7 +787,6 @@ static const struct pinmux_ops abx500_pinmux_ops = { · 786 unmodified lines | ||
| 787 | 787 | .set_mux = abx500_pmx_set, |
| 788 | 788 | .gpio_request_enable = abx500_gpio_request_enable, |
| 789 | 789 | .gpio_disable_free = abx500_gpio_disable_free, |
| 790 | − .strict = true, | |
| 791 | 790 | }; |
| 792 | 791 | |
| 793 | 792 | static int abx500_get_groups_cnt(struct pinctrl_dev *pctldev) |
| @@ -823,7 +823,7 @@ static int lpc18xx_pconf_set_i2c0(struct pinctrl_dev *pctldev, · 822 unmodified lines | ||
| 823 | 823 | break; |
| 824 | 824 | |
| 825 | 825 | case PIN_CONFIG_INPUT_SCHMITT_ENABLE: |
| 826 | − if (param) | |
| 826 | + if (param_val) | |
| 827 | 827 | *reg &= ~(LPC18XX_SCU_I2C0_ZIF << shift); |
| 828 | 828 | else |
| 829 | 829 | *reg |= (LPC18XX_SCU_I2C0_ZIF << shift); |
| @@ -876,7 +876,7 @@ static int lpc18xx_pconf_set_pin(struct pinctrl_dev *pctldev, · 46 unmodified lines | ||
| 876 | 876 | break; |
| 877 | 877 | |
| 878 | 878 | case PIN_CONFIG_INPUT_SCHMITT_ENABLE: |
| 879 | − if (param) | |
| 879 | + if (param_val) | |
| 880 | 880 | *reg &= ~LPC18XX_SCU_PIN_ZIF; |
| 881 | 881 | else |
| 882 | 882 | *reg |= LPC18XX_SCU_PIN_ZIF; |
| @@ -1760,7 +1760,8 @@ static int pcs_irq_init_chained_handler(struct pcs_device *pcs, · 1759 unmodified lines | ||
| 1760 | 1760 | int res; |
| 1761 | 1761 | |
| 1762 | 1762 | res = request_irq(pcs_soc->irq, pcs_irq_handler, |
| 1763 | − IRQF_SHARED | IRQF_NO_SUSPEND, | |
| 1763 | + IRQF_SHARED | IRQF_NO_SUSPEND | | |
| 1764 | + IRQF_NO_THREAD, | |
| 1764 | 1765 | name, pcs_soc); |
| 1765 | 1766 | if (res) { |
| 1766 | 1767 | pcs_soc->irq = -1; |
| @@ -33,11 +33,6 @@ · 32 unmodified lines | ||
| 33 | 33 | #include "../core.h" |
| 34 | 34 | #include "pinctrl-samsung.h" |
| 35 | 35 | |
| 36 | −#define GROUP_SUFFIX "-grp" | |
| 37 | −#define GSUFFIX_LEN sizeof(GROUP_SUFFIX) | |
| 38 | −#define FUNCTION_SUFFIX "-mux" | |
| 39 | −#define FSUFFIX_LEN sizeof(FUNCTION_SUFFIX) | |
| 40 | − | |
| 41 | 36 | /* list of all possible config options supported */ |
| 42 | 37 | static struct pin_config { |
| 43 | 38 | const char *property; |
| @@ -224,7 +224,7 @@ struct sh_pfc_soc_info { · 223 unmodified lines | ||
| 224 | 224 | |
| 225 | 225 | /* PINMUX_GPIO_GP_ALL - Expand to a list of sh_pfc_pin entries */ |
| 226 | 226 | #define _GP_GPIO(bank, _pin, _name, sfx) \ |
| 227 | − [(bank * 32) + _pin] = { \ | |
| 227 | + { \ | |
| 228 | 228 | .pin = (bank * 32) + _pin, \ |
| 229 | 229 | .name = __stringify(_name), \ |
| 230 | 230 | .enum_id = _name##_DATA, \ |
| @@ -4,7 +4,6 @@ · 3 unmodified lines | ||
| 4 | 4 | |
| 5 | 5 | menuconfig CHROME_PLATFORMS |
| 6 | 6 | bool "Platform support for Chrome hardware" |
| 7 | − depends on X86 || ARM | |
| 8 | 7 | ---help--- |
| 9 | 8 | Say Y here to get to see options for platform support for |
| 10 | 9 | various Chromebooks and Chromeboxes. This option alone does |
| @@ -130,7 +130,7 @@ struct pm800_regulators { · 129 unmodified lines | ||
| 130 | 130 | .owner = THIS_MODULE, \ |
| 131 | 131 | .n_voltages = ARRAY_SIZE(ldo_volt_table), \ |
| 132 | 132 | .vsel_reg = PM800_##vreg##_VOUT, \ |
| 133 | − .vsel_mask = 0x1f, \ | |
| 133 | + .vsel_mask = 0xf, \ | |
| 134 | 134 | .enable_reg = PM800_##ereg, \ |
| 135 | 135 | .enable_mask = 1 << (ebit), \ |
| 136 | 136 | .volt_table = ldo_volt_table, \ |
| @@ -109,6 +109,7 @@ static int _regulator_do_set_voltage(struct regulator_dev *rdev, · 108 unmodified lines | ||
| 109 | 109 | static struct regulator *create_regulator(struct regulator_dev *rdev, |
| 110 | 110 | struct device *dev, |
| 111 | 111 | const char *supply_name); |
| 112 | +static void _regulator_put(struct regulator *regulator); | |
| 112 | 113 | |
| 113 | 114 | static const char *rdev_get_name(struct regulator_dev *rdev) |
| 114 | 115 | { |
| @@ -1105,6 +1106,9 @@ static int set_supply(struct regulator_dev *rdev, · 990 unmodified lines | ||
| 1105 | 1106 | |
| 1106 | 1107 | rdev_info(rdev, "supplied by %s\n", rdev_get_name(supply_rdev)); |
| 1107 | 1108 | |
| 1109 | + if (!try_module_get(supply_rdev->owner)) | |
| 1110 | + return -ENODEV; | |
| 1111 | + | |
| 1108 | 1112 | rdev->supply = create_regulator(supply_rdev, &rdev->dev, "SUPPLY"); |
| 1109 | 1113 | if (rdev->supply == NULL) { |
| 1110 | 1114 | err = -ENOMEM; |
| @@ -1381,9 +1385,13 @@ static int regulator_resolve_supply(struct regulator_dev *rdev) · 270 unmodified lines | ||
| 1381 | 1385 | } |
| 1382 | 1386 | |
| 1383 | 1387 | if (!r) { |
| 1384 | − dev_err(dev, "Failed to resolve %s-supply for %s\n", | |
| 1385 | − rdev->supply_name, rdev->desc->name); | |
| 1386 | − return -EPROBE_DEFER; | |
| 1388 | + if (have_full_constraints()) { | |
| 1389 | + r = dummy_regulator_rdev; | |
| 1390 | + } else { | |
| 1391 | + dev_err(dev, "Failed to resolve %s-supply for %s\n", | |
| 1392 | + rdev->supply_name, rdev->desc->name); | |
| 1393 | + return -EPROBE_DEFER; | |
| 1394 | + } | |
| 1387 | 1395 | } |
| 1388 | 1396 | |
| 1389 | 1397 | /* Recursively resolve the supply of the supply */ |
| @@ -1398,8 +1406,11 @@ static int regulator_resolve_supply(struct regulator_dev *rdev) · 8 unmodified lines | ||
| 1398 | 1406 | /* Cascade always-on state to supply */ |
| 1399 | 1407 | if (_regulator_is_enabled(rdev)) { |
| 1400 | 1408 | ret = regulator_enable(rdev->supply); |
| 1401 | − if (ret < 0) | |
| 1409 | + if (ret < 0) { | |
| 1410 | + if (rdev->supply) | |
| 1411 | + _regulator_put(rdev->supply); | |
| 1402 | 1412 | return ret; |
| 1413 | + } | |
| 1403 | 1414 | } |
| 1404 | 1415 | |
| 1405 | 1416 | return 0; |
| @@ -450,7 +450,7 @@ static struct max8973_regulator_platform_data *max8973_parse_dt( · 449 unmodified lines | ||
| 450 | 450 | pdata->control_flags |= MAX8973_CONTROL_FREQ_SHIFT_9PER_ENABLE; |
| 451 | 451 | |
| 452 | 452 | if (of_property_read_bool(np, "maxim,enable-bias-control")) |
| 453 | − pdata->control_flags |= MAX8973_BIAS_ENABLE; | |
| 453 | + pdata->control_flags |= MAX8973_CONTROL_BIAS_ENABLE; | |
| 454 | 454 | |
| 455 | 455 | return pdata; |
| 456 | 456 | } |
| @@ -34,6 +34,8 @@ · 33 unmodified lines | ||
| 34 | 34 | #include <linux/mfd/samsung/s2mps14.h> |
| 35 | 35 | #include <linux/mfd/samsung/s2mpu02.h> |
| 36 | 36 | |
| 37 | +/* The highest number of possible regulators for supported devices. */ | |
| 38 | +#define S2MPS_REGULATOR_MAX S2MPS13_REGULATOR_MAX | |
| 37 | 39 | struct s2mps11_info { |
| 38 | 40 | unsigned int rdev_num; |
| 39 | 41 | int ramp_delay2; |
| @@ -49,7 +51,7 @@ struct s2mps11_info { · 9 unmodified lines | ||
| 49 | 51 | * One bit for each S2MPS13/S2MPS14/S2MPU02 regulator whether |
| 50 | 52 | * the suspend mode was enabled. |
| 51 | 53 | */ |
| 52 | − unsigned long long s2mps14_suspend_state:50; | |
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This diff is large: its 76 lines aren’t shown here.
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This diff is large: its 165 lines aren’t shown here.
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