Merge tag 'usb-serial-4.6-rc7' of git://git.kernel.org/pub/scm/linux/kernel/git/johan/usb-serial into usb-next

Johan writes: USB-serial fixes for v4.6-rc7 Here are some more new device ids.

Greg Kroah-Hartman committed 10 years ago

Commit 545feef2 parents 792f752 74d2a91214 files · +2540 −1223Browse files

Unified · Split

214 files

.mailmap +4 −0
Documentation/devicetree/bindings/arc/archs-pct.txt +1 −1
Documentation/devicetree/bindings/arc/pct.txt +1 −1
Documentation/devicetree/bindings/arm/cpus.txt +0 −1
Documentation/devicetree/bindings/i2c/i2c-rk3x.txt +2 −2
Documentation/sysctl/vm.txt +10 −9
MAINTAINERS +12 −3
Makefile +2 −2
arch/arc/Kconfig +2 −0
arch/arc/include/asm/irqflags-arcv2.h +35 −1
arch/arc/kernel/entry-arcv2.S +9 −1
arch/arc/kernel/entry-compact.S +3 −0
arch/arc/mm/init.c +4 −0
arch/arm/boot/dts/am33xx.dtsi +1 −1
arch/arm/boot/dts/am4372.dtsi +1 −1
arch/arm/boot/dts/am57xx-beagle-x15.dts +0 −17
arch/arm/boot/dts/dm814x-clocks.dtsi +212 −31
arch/arm/boot/dts/dra62x-clocks.dtsi +26 −0
arch/arm/boot/dts/dra7xx-clocks.dtsi +17 −1
arch/arm/boot/dts/qcom-msm8974.dtsi +1 −13
arch/arm/boot/dts/r8a7791-koelsch.dts +1 −0
arch/arm/boot/dts/r8a7791-porter.dts +1 −13
arch/arm/boot/dts/r8a7791.dtsi +1 −4
arch/arm/mach-imx/devices/platform-sdhci-esdhc-imx.c +3 −2
arch/arm/mach-omap2/clockdomains7xx_data.c +1 −1
arch/arm/mach-omap2/io.c +2 −1
arch/arm/mach-omap2/omap-wakeupgen.c +7 −0
arch/arm/mach-omap2/pm34xx.c +13 −10
arch/arm/mach-shmobile/timer.c +11 −17
arch/arm64/boot/dts/socionext/uniphier-ph1-ld20-ref.dts +0 −1
arch/arm64/boot/dts/socionext/uniphier-ph1-ld20.dtsi +5 −15
arch/nios2/lib/memset.c +1 −1
arch/powerpc/include/asm/systbl.h +2 −0
arch/powerpc/include/asm/unistd.h +1 −1
arch/powerpc/include/uapi/asm/unistd.h +2 −0
arch/s390/include/asm/mmu.h +1 −1
arch/s390/include/asm/mmu_context.h +22 −6
arch/s390/include/asm/pgalloc.h +2 −2
arch/s390/include/asm/processor.h +1 −1
arch/s390/include/asm/tlbflush.h +3 −6
arch/s390/mm/init.c +2 −1
arch/s390/mm/mmap.c +3 −3
arch/s390/mm/pgalloc.c +28 −57
arch/s390/pci/pci_dma.c +10 −6
arch/x86/events/amd/core.c +1 −1
arch/x86/events/intel/core.c +1 −0
arch/x86/events/intel/lbr.c +4 −2
arch/x86/events/intel/pt.c +64 −11
arch/x86/events/intel/pt.h +3 −0
arch/x86/events/intel/rapl.c +1 −0
arch/x86/include/asm/perf_event.h +4 −0
arch/x86/kernel/apic/vector.c +2 −1
arch/x86/kernel/head_32.S +0 −6
arch/x86/kvm/vmx.c +4 −0
arch/x86/mm/setup_nx.c +3 −2
arch/x86/xen/spinlock.c +6 −0
drivers/block/rbd.c +25 −27
drivers/cpufreq/cpufreq_governor.c +2 −6
drivers/cpufreq/intel_pstate.c +5 −0
drivers/crypto/talitos.c +57 −30
drivers/edac/i7core_edac.c +1 −1
drivers/edac/sb_edac.c +1 −1
drivers/firmware/efi/vars.c +26 −11
drivers/firmware/psci.c +1 −1
drivers/gpu/drm/amd/amdgpu/amdgpu_atpx_handler.c +7 −4
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c +1 −7
drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c +4 −1
drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c +4 −1
drivers/gpu/drm/drm_dp_mst_topology.c +20 −0
drivers/gpu/drm/etnaviv/etnaviv_gpu.c +18 −13
drivers/gpu/drm/radeon/evergreen.c +153 −1
drivers/gpu/drm/radeon/evergreen_reg.h +46 −0
drivers/gpu/drm/ttm/ttm_bo.c +4 −13
drivers/gpu/drm/virtio/virtgpu_display.c +12 −0
drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c +5 −5
drivers/gpu/drm/vmwgfx/vmwgfx_fb.c +3 −3
drivers/i2c/busses/Kconfig +2 −2
drivers/i2c/busses/i2c-cpm.c +2 −2
drivers/i2c/busses/i2c-exynos5.c +19 −5
drivers/i2c/busses/i2c-ismt.c +2 −0
drivers/i2c/busses/i2c-rk3x.c +1 −0
drivers/infiniband/core/cache.c +2 −1
drivers/infiniband/core/ucm.c +4 −0
drivers/infiniband/core/ucma.c +3 −0
drivers/infiniband/core/uverbs_main.c +5 −0
drivers/infiniband/core/verbs.c +2 −1
drivers/infiniband/hw/cxgb3/iwch_provider.c +2 −0
drivers/infiniband/hw/cxgb4/cq.c +1 −1
drivers/infiniband/hw/cxgb4/provider.c +2 −0
drivers/infiniband/hw/cxgb4/qp.c +21 −3
drivers/infiniband/hw/mlx5/main.c +3 −3
drivers/infiniband/hw/nes/nes_nic.c +0 −3
drivers/infiniband/hw/qib/qib_file_ops.c +5 −0
drivers/infiniband/sw/rdmavt/qp.c +2 −2
drivers/media/usb/usbvision/usbvision-video.c +0 −7
drivers/media/v4l2-core/videobuf2-core.c +15 −5
drivers/media/v4l2-core/videobuf2-memops.c +1 −1
drivers/media/v4l2-core/videobuf2-v4l2.c +12 −8
drivers/misc/cxl/context.c +7 −0
drivers/misc/cxl/cxl.h +2 −0
drivers/misc/cxl/irq.c +0 −1
drivers/misc/cxl/native.c +31 −0
drivers/mmc/host/Kconfig +1 −0
drivers/mmc/host/sdhci-acpi.c +81 −0
drivers/mmc/host/sunxi-mmc.c +5 −0
drivers/net/Kconfig +2 −3
drivers/net/ethernet/mellanox/mlx4/en_tx.c +4 −2
drivers/net/ethernet/mellanox/mlx5/core/en.h +1 −1
drivers/net/ethernet/mellanox/mlx5/core/en_ethtool.c +4 −4
drivers/net/ethernet/mellanox/mlx5/core/en_main.c +57 −15
drivers/net/ethernet/mellanox/mlx5/core/fs_core.c +18 −30
drivers/net/ethernet/mellanox/mlx5/core/main.c +21 −4
drivers/net/ethernet/mellanox/mlx5/core/port.c +5 −5
drivers/net/ethernet/mellanox/mlx5/core/vport.c +40 −0
drivers/net/ethernet/qlogic/qlcnic/qlcnic.h +2 −2
drivers/net/ethernet/stmicro/stmmac/dwmac-socfpga.c +16 −34
drivers/net/macsec.c +42 −23
drivers/platform/x86/toshiba_acpi.c +1 −1
drivers/rapidio/devices/rio_mport_cdev.c +2 −2
drivers/s390/char/sclp_ctl.c +7 −5
drivers/scsi/cxgbi/libcxgbi.c +1 −0
drivers/soc/mediatek/mtk-scpsys.c +6 −5
drivers/staging/media/davinci_vpfe/vpfe_video.c +34 −20
drivers/staging/rdma/hfi1/TODO +1 −1
drivers/staging/rdma/hfi1/file_ops.c +35 −56
drivers/staging/rdma/hfi1/mmu_rb.c +25 −15
drivers/staging/rdma/hfi1/mmu_rb.h +2 −1
drivers/staging/rdma/hfi1/qp.c +2 −0
drivers/staging/rdma/hfi1/user_exp_rcv.c +7 −4
drivers/staging/rdma/hfi1/user_sdma.c +22 −11
drivers/thermal/hisi_thermal.c +2 −2
drivers/thermal/thermal_core.c +1 −1
drivers/tty/pty.c +8 −10
drivers/tty/tty_io.c +3 −3
drivers/usb/serial/option.c +148 −7
fs/ceph/mds_client.c +2 −4
fs/devpts/inode.c +12 −41
fs/ocfs2/dlm/dlmmaster.c +2 −0
fs/proc/task_mmu.c +30 −3
include/linux/ceph/auth.h +5 −5
include/linux/ceph/osd_client.h +0 −1
include/linux/cgroup-defs.h +1 −0
include/linux/cpuset.h +0 −6
include/linux/devpts_fs.h +3 −3
include/linux/huge_mm.h +5 −0
include/linux/lockdep.h +5 −3
include/linux/mlx5/device.h +11 −0
include/linux/mlx5/driver.h +4 −3
include/linux/mlx5/port.h +3 −3
include/linux/mlx5/vport.h +2 −0
include/linux/mm.h +4 −0
include/linux/tty_driver.h +2 −2
include/media/videobuf2-core.h +8 −0
include/net/switchdev.h +4 −0
include/rdma/ib.h +16 −0
include/sound/hda_i915.h +2 −3
include/uapi/linux/if_macsec.h +2 −2
include/uapi/linux/v4l2-dv-timings.h +20 −10
kernel/bpf/verifier.c +0 −1
kernel/cgroup.c +5 −2
kernel/cpuset.c +2 −2
kernel/events/core.c +38 −17
kernel/kcov.c +2 −1
kernel/kexec_core.c +5 −2
kernel/locking/lockdep.c +34 −3
kernel/locking/lockdep_proc.c +2 −0
kernel/workqueue.c +29 −0
lib/stackdepot.c +0 −4
mm/huge_memory.c +5 −7
mm/memcontrol.c +19 −18
mm/memory-failure.c +9 −1
mm/memory.c +40 −0
mm/migrate.c +7 −1
mm/page_io.c +5 −1
mm/swap.c +5 −0
mm/vmscan.c +15 −15
net/bridge/br_mdb.c +79 −45
net/bridge/br_multicast.c +5 −3
net/bridge/br_private.h +2 −2
net/ceph/auth.c +2 −6
net/ceph/auth_none.c +39 −32
net/ceph/auth_none.h +1 −2
net/ceph/auth_x.c +10 −11
net/ceph/auth_x.h +1 −0
net/ceph/osd_client.c +2 −4
net/ipv4/fib_frontend.c +5 −1
net/ipv6/addrconf.c +15 −33
net/switchdev/switchdev.c +6 −0
sound/hda/ext/hdac_ext_stream.c +2 −3
sound/hda/hdac_i915.c +51 −11
sound/pci/hda/hda_intel.c +4 −52
sound/pci/hda/patch_hdmi.c +1 −0
sound/pci/hda/patch_realtek.c +1 −0
sound/soc/codecs/Kconfig +1 −0
sound/soc/codecs/arizona.c +12 −0
sound/soc/codecs/arizona.h +2 −0
sound/soc/codecs/cs35l32.c +13 −4
sound/soc/codecs/cs47l24.c +3 −0
sound/soc/codecs/hdac_hdmi.c +42 −52
sound/soc/codecs/nau8825.c +71 −55
sound/soc/codecs/rt5640.c +1 −1
sound/soc/codecs/rt5640.h +18 −18
sound/soc/codecs/wm5102.c +5 −0
sound/soc/codecs/wm5110.c +2 −0
sound/soc/codecs/wm8962.c +1 −1
sound/soc/codecs/wm8997.c +2 −0
sound/soc/codecs/wm8998.c +2 −0
sound/soc/intel/Kconfig +0 −1
sound/soc/intel/haswell/sst-haswell-ipc.c +1 −1
sound/soc/intel/skylake/skl-sst-dsp.c +5 −0
sound/soc/intel/skylake/skl-topology.c +28 −14
sound/soc/intel/skylake/skl-topology.h +4 −4
sound/soc/intel/skylake/skl.c +23 −9
sound/soc/soc-dapm.c +7 −0

@@ -48,6 +48,9 @@ Felix Kuhling <fxkuehl@gmx.de> · 47 unmodified lines
48	48	Felix Moeller <felix@derklecks.de>
49	49	Filipe Lautert <filipe@icewall.org>
50	50	Franck Bui-Huu <vagabon.xyz@gmail.com>
	51	+Frank Rowand <frowand.list@gmail.com> <frowand@mvista.com>
	52	+Frank Rowand <frowand.list@gmail.com> <frank.rowand@am.sony.com>
	53	+Frank Rowand <frowand.list@gmail.com> <frank.rowand@sonymobile.com>
51	54	Frank Zago <fzago@systemfabricworks.com>
52	55	Greg Kroah-Hartman <greg@echidna.(none)>
53	56	Greg Kroah-Hartman <gregkh@suse.de>
@@ -79,6 +82,7 @@ Kay Sievers <kay.sievers@vrfy.org> · 25 unmodified lines
79	82	Kenneth W Chen <kenneth.w.chen@intel.com>
80	83	Konstantin Khlebnikov <koct9i@gmail.com> <k.khlebnikov@samsung.com>
81	84	Koushik <raghavendra.koushik@neterion.com>
	85	+Krzysztof Kozlowski <krzk@kernel.org> <k.kozlowski.k@gmail.com>
82	86	Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
83	87	Leonid I Ananiev <leonid.i.ananiev@intel.com>
84	88	Linas Vepstas <linas@austin.ibm.com>

Documentation/devicetree/bindings/arc/archs-pct.txt+1−1

@@ -2,7 +2,7 @@ · 1 unmodified line
2	2
3	3	The ARC HS can be configured with a pipeline performance monitor for counting
4	4	CPU and cache events like cache misses and hits. Like conventional PCT there
5		−are 100+ hardware conditions dynamically mapped to upto 32 counters.
	5	+are 100+ hardware conditions dynamically mapped to up to 32 counters.
6	6	It also supports overflow interrupts.
7	7
8	8	Required properties:

Documentation/devicetree/bindings/arc/pct.txt+1−1

@@ -2,7 +2,7 @@ · 1 unmodified line
2	2
3	3	The ARC700 can be configured with a pipeline performance monitor for counting
4	4	CPU and cache events like cache misses and hits. Like conventional PCT there
5		−are 100+ hardware conditions dynamically mapped to upto 32 counters
	5	+are 100+ hardware conditions dynamically mapped to up to 32 counters
6	6
7	7	Note that:
8	8	* The ARC 700 PCT does not support interrupts; although HW events may be

Documentation/devicetree/bindings/arm/cpus.txt+0−1

@@ -192,7 +192,6 @@ nodes to be present and contain the properties described below. · 191 unmodified lines
192	192	can be one of:
193	193	"allwinner,sun6i-a31"
194	194	"allwinner,sun8i-a23"
195		− "arm,psci"
196	195	"arm,realview-smp"
197	196	"brcm,bcm-nsp-smp"
198	197	"brcm,brahma-b15"

Documentation/devicetree/bindings/i2c/i2c-rk3x.txt+2−2

@@ -6,8 +6,8 @@ RK3xxx SoCs. · 5 unmodified lines
6	6	Required properties :
7	7
8	8	- reg : Offset and length of the register set for the device
9		− - compatible : should be "rockchip,rk3066-i2c", "rockchip,rk3188-i2c" or
10		− "rockchip,rk3288-i2c".
	9	+ - compatible : should be "rockchip,rk3066-i2c", "rockchip,rk3188-i2c",
	10	+ "rockchip,rk3228-i2c" or "rockchip,rk3288-i2c".
11	11	- interrupts : interrupt number
12	12	- clocks : parent clock
13	13

Documentation/sysctl/vm.txt+10−9

@@ -581,15 +581,16 @@ Specify "[Nn]ode" for node order · 580 unmodified lines
581	581	"Zone Order" orders the zonelists by zone type, then by node within each
582	582	zone. Specify "[Zz]one" for zone order.
583	583
584		−Specify "[Dd]efault" to request automatic configuration. Autoconfiguration
585		−will select "node" order in following case.
586		−(1) if the DMA zone does not exist or
587		−(2) if the DMA zone comprises greater than 50% of the available memory or
588		−(3) if any node's DMA zone comprises greater than 70% of its local memory and
589		− the amount of local memory is big enough.
590		−
591		−Otherwise, "zone" order will be selected. Default order is recommended unless
592		−this is causing problems for your system/application.
	584	+Specify "[Dd]efault" to request automatic configuration.
	585	+
	586	+On 32-bit, the Normal zone needs to be preserved for allocations accessible
	587	+by the kernel, so "zone" order will be selected.
	588	+
	589	+On 64-bit, devices that require DMA32/DMA are relatively rare, so "node"
	590	+order will be selected.
	591	+
	592	+Default order is recommended unless this is causing problems for your
	593	+system/application.
593	594
594	595	==============================================================
595	596

MAINTAINERS+12−3

@@ -6027,7 +6027,7 @@ F: include/scsi/iscsi · 6026 unmodified lines
6027	6027
6028	6028	ISCSI EXTENSIONS FOR RDMA (ISER) INITIATOR
6029	6029	M: Or Gerlitz <ogerlitz@mellanox.com>
6030		−M: Sagi Grimberg <sagig@mellanox.com>
	6030	+M: Sagi Grimberg <sagi@grimberg.me>
6031	6031	M: Roi Dayan <roid@mellanox.com>
6032	6032	L: linux-rdma@vger.kernel.org
6033	6033	S: Supported
@@ -6037,7 +6037,7 @@ Q: http://patchwork.kernel.org/project/linux-rdma/list/ · 3 unmodified lines
6037	6037	F: drivers/infiniband/ulp/iser/
6038	6038
6039	6039	ISCSI EXTENSIONS FOR RDMA (ISER) TARGET
6040		−M: Sagi Grimberg <sagig@mellanox.com>
	6040	+M: Sagi Grimberg <sagi@grimberg.me>
6041	6041	T: git git://git.kernel.org/pub/scm/linux/kernel/git/nab/target-pending.git master
6042	6042	L: linux-rdma@vger.kernel.org
6043	6043	L: target-devel@vger.kernel.org
@@ -6400,7 +6400,7 @@ F: mm/kmemleak.c · 356 unmodified lines
6400	6400	F: mm/kmemleak-test.c
6401	6401
6402	6402	KPROBES
6403		−M: Ananth N Mavinakayanahalli <ananth@in.ibm.com>
	6403	+M: Ananth N Mavinakayanahalli <ananth@linux.vnet.ibm.com>
6404	6404	M: Anil S Keshavamurthy <anil.s.keshavamurthy@intel.com>
6405	6405	M: "David S. Miller" <davem@davemloft.net>
6406	6406	M: Masami Hiramatsu <mhiramat@kernel.org>
@@ -11071,6 +11071,15 @@ S: Maintained · 4664 unmodified lines
11071	11071	F: drivers/clk/ti/
11072	11072	F: include/linux/clk/ti.h
11073	11073
	11074	+TI ETHERNET SWITCH DRIVER (CPSW)
	11075	+M: Mugunthan V N <mugunthanvnm@ti.com>
	11076	+R: Grygorii Strashko <grygorii.strashko@ti.com>
	11077	+L: linux-omap@vger.kernel.org
	11078	+L: netdev@vger.kernel.org
	11079	+S: Maintained
	11080	+F: drivers/net/ethernet/ti/cpsw*
	11081	+F: drivers/net/ethernet/ti/davinci*
	11082	+
11074	11083	TI FLASH MEDIA INTERFACE DRIVER
11075	11084	M: Alex Dubov <oakad@yahoo.com>
11076	11085	S: Maintained

Makefile+2−2

@@ -1,8 +1,8 @@
1	1	VERSION = 4
2	2	PATCHLEVEL = 6
3	3	SUBLEVEL = 0
4		−EXTRAVERSION = -rc5
5		−NAME = Blurry Fish Butt
	4	+EXTRAVERSION = -rc6
	5	+NAME = Charred Weasel
6	6
7	7	# DOCUMENTATION
8	8	# To see a list of typical targets execute "make help"

arch/arc/Kconfig+2−0

@@ -35,8 +35,10 @@ config ARC · 34 unmodified lines
35	35	select NO_BOOTMEM
36	36	select OF
37	37	select OF_EARLY_FLATTREE
	38	+ select OF_RESERVED_MEM
38	39	select PERF_USE_VMALLOC
39	40	select HAVE_DEBUG_STACKOVERFLOW
	41	+ select HAVE_GENERIC_DMA_COHERENT
40	42
41	43	config MIGHT_HAVE_PCI
42	44	bool

arch/arc/include/asm/irqflags-arcv2.h+35−1

@@ -18,6 +18,12 @@ · 17 unmodified lines
18	18	#define STATUS_AD_MASK (1<<STATUS_AD_BIT)
19	19	#define STATUS_IE_MASK (1<<STATUS_IE_BIT)
20	20
	21	+/* status32 Bits as encoded/expected by CLRI/SETI */
	22	+#define CLRI_STATUS_IE_BIT 4
	23	+
	24	+#define CLRI_STATUS_E_MASK 0xF
	25	+#define CLRI_STATUS_IE_MASK (1 << CLRI_STATUS_IE_BIT)
	26	+
21	27	#define AUX_USER_SP 0x00D
22	28	#define AUX_IRQ_CTRL 0x00E
23	29	#define AUX_IRQ_ACT 0x043 /* Active Intr across all levels */
@@ -100,6 +106,13 @@ static inline long arch_local_save_flags(void) · 76 unmodified lines
100	106	:
101	107	: "memory");
102	108
	109	+ /* To be compatible with irq_save()/irq_restore()
	110	+ * encode the irq bits as expected by CLRI/SETI
	111	+ * (this was needed to make CONFIG_TRACE_IRQFLAGS work)
	112	+ */
	113	+ temp = (1 << 5) \|
	114	+ ((!!(temp & STATUS_IE_MASK)) << CLRI_STATUS_IE_BIT) \|
	115	+ (temp & CLRI_STATUS_E_MASK);
103	116	return temp;
104	117	}
105	118
@@ -108,7 +121,7 @@ static inline long arch_local_save_flags(void) · 2 unmodified lines
108	121	*/
109	122	static inline int arch_irqs_disabled_flags(unsigned long flags)
110	123	{
111		− return !(flags & (STATUS_IE_MASK));
	124	+ return !(flags & CLRI_STATUS_IE_MASK);
112	125	}
113	126
114	127	static inline int arch_irqs_disabled(void)
@@ -128,11 +141,32 @@ static inline void arc_softirq_clear(int irq) · 13 unmodified lines
128	141
129	142	#else
130	143
	144	+#ifdef CONFIG_TRACE_IRQFLAGS
	145	+
	146	+.macro TRACE_ASM_IRQ_DISABLE
	147	+ bl trace_hardirqs_off
	148	+.endm
	149	+
	150	+.macro TRACE_ASM_IRQ_ENABLE
	151	+ bl trace_hardirqs_on
	152	+.endm
	153	+
	154	+#else
	155	+
	156	+.macro TRACE_ASM_IRQ_DISABLE
	157	+.endm
	158	+
	159	+.macro TRACE_ASM_IRQ_ENABLE
	160	+.endm
	161	+
	162	+#endif
131	163	.macro IRQ_DISABLE scratch
132	164	clri
	165	+ TRACE_ASM_IRQ_DISABLE
133	166	.endm
134	167
135	168	.macro IRQ_ENABLE scratch
	169	+ TRACE_ASM_IRQ_ENABLE
136	170	seti
137	171	.endm
138	172

arch/arc/kernel/entry-arcv2.S+9−1

@@ -69,8 +69,11 @@ ENTRY(handle_interrupt) · 68 unmodified lines
69	69
70	70	clri ; To make status32.IE agree with CPU internal state
71	71
72		− lr r0, [ICAUSE]
	72	+#ifdef CONFIG_TRACE_IRQFLAGS
	73	+ TRACE_ASM_IRQ_DISABLE
	74	+#endif
73	75
	76	+ lr r0, [ICAUSE]
74	77	mov blink, ret_from_exception
75	78
76	79	b.d arch_do_IRQ
@@ -169,6 +172,11 @@ END(EV_TLBProtV) · 92 unmodified lines
169	172
170	173	.Lrestore_regs:
171	174
	175	+ # Interrpts are actually disabled from this point on, but will get
	176	+ # reenabled after we return from interrupt/exception.
	177	+ # But irq tracer needs to be told now...
	178	+ TRACE_ASM_IRQ_ENABLE
	179	+
172	180	ld r0, [sp, PT_status32] ; U/K mode at time of entry
173	181	lr r10, [AUX_IRQ_ACT]
174	182

arch/arc/kernel/entry-compact.S+3−0

@@ -341,6 +341,9 @@ END(call_do_page_fault) · 340 unmodified lines
341	341
342	342	.Lrestore_regs:
343	343
	344	+ # Interrpts are actually disabled from this point on, but will get
	345	+ # reenabled after we return from interrupt/exception.
	346	+ # But irq tracer needs to be told now...
344	347	TRACE_ASM_IRQ_ENABLE
345	348
346	349	lr r10, [status32]

arch/arc/mm/init.c+4−0

@@ -13,6 +13,7 @@ · 12 unmodified lines
13	13	#ifdef CONFIG_BLK_DEV_INITRD
14	14	#include <linux/initrd.h>
15	15	#endif
	16	+#include <linux/of_fdt.h>
16	17	#include <linux/swap.h>
17	18	#include <linux/module.h>
18	19	#include <linux/highmem.h>
@@ -136,6 +137,9 @@ void __init setup_arch_memory(void) · 117 unmodified lines
136	137	memblock_reserve(__pa(initrd_start), initrd_end - initrd_start);
137	138	#endif
138	139
	140	+ early_init_fdt_reserve_self();
	141	+ early_init_fdt_scan_reserved_mem();
	142	+
139	143	memblock_dump_all();
140	144
141	145	/----------------- node/zones setup --------------------------/

arch/arm/boot/dts/am33xx.dtsi+1−1

@@ -860,7 +860,7 @@ · 859 unmodified lines
860	860	ti,no-idle-on-init;
861	861	reg = <0x50000000 0x2000>;
862	862	interrupts = <100>;
863		− dmas = <&edma 52>;
	863	+ dmas = <&edma 52 0>;
864	864	dma-names = "rxtx";
865	865	gpmc,num-cs = <7>;
866	866	gpmc,num-waitpins = <2>;

arch/arm/boot/dts/am4372.dtsi+1−1

@@ -884,7 +884,7 @@ · 883 unmodified lines
884	884	gpmc: gpmc@50000000 {
885	885	compatible = "ti,am3352-gpmc";
886	886	ti,hwmods = "gpmc";
887		− dmas = <&edma 52>;
	887	+ dmas = <&edma 52 0>;
888	888	dma-names = "rxtx";
889	889	clocks = <&l3s_gclk>;
890	890	clock-names = "fck";

arch/arm/boot/dts/am57xx-beagle-x15.dts+0−17

@@ -99,13 +99,6 @@ · 98 unmodified lines
99	99	#cooling-cells = <2>;
100	100	};
101	101
102		− extcon_usb1: extcon_usb1 {
103		− compatible = "linux,extcon-usb-gpio";
104		− id-gpio = <&gpio7 25 GPIO_ACTIVE_HIGH>;
105		− pinctrl-names = "default";
106		− pinctrl-0 = <&extcon_usb1_pins>;
107		− };
108		−
109	102	hdmi0: connector {
110	103	compatible = "hdmi-connector";
111	104	label = "hdmi";
@@ -349,12 +342,6 @@ · 237 unmodified lines
349	342	>;
350	343	};
351	344
352		− extcon_usb1_pins: extcon_usb1_pins {
353		− pinctrl-single,pins = <
354		− DRA7XX_CORE_IOPAD(0x37ec, PIN_INPUT_PULLUP \| MUX_MODE14) /* uart1_rtsn.gpio7_25 */
355		− >;
356		− };
357		−
358	345	tpd12s015_pins: pinmux_tpd12s015_pins {
359	346	pinctrl-single,pins = <
360	347	DRA7XX_CORE_IOPAD(0x37b0, PIN_OUTPUT \| MUX_MODE14) /* gpio7_10 CT_CP_HPD */
@@ -706,10 +693,6 @@ · 345 unmodified lines
706	693	pinctrl-0 = <&usb1_pins>;
707	694	};
708	695
709		−&omap_dwc3_1 {
710		− extcon = <&extcon_usb1>;
711		−};
712		−
713	696	&omap_dwc3_2 {
714	697	extcon = <&extcon_usb2>;
715	698	};

arch/arm/boot/dts/dm814x-clocks.dtsi+212−31

@@ -4,6 +4,157 @@ · 3 unmodified lines
4	4	* published by the Free Software Foundation.
5	5	*/
6	6
	7	+&pllss {
	8	+ /*
	9	+ * See TRM "2.6.10 Connected outputso DPLLS" and
	10	+ * "2.6.11 Connected Outputs of DPLLJ". Only clkout is
	11	+ * connected except for hdmi and usb.
	12	+ */
	13	+ adpll_mpu_ck: adpll@40 {
	14	+ #clock-cells = <1>;
	15	+ compatible = "ti,dm814-adpll-s-clock";
	16	+ reg = <0x40 0x40>;
	17	+ clocks = <&devosc_ck &devosc_ck &devosc_ck>;
	18	+ clock-names = "clkinp", "clkinpulow", "clkinphif";
	19	+ clock-output-names = "481c5040.adpll.dcoclkldo",
	20	+ "481c5040.adpll.clkout",
	21	+ "481c5040.adpll.clkoutx2",
	22	+ "481c5040.adpll.clkouthif";
	23	+ };
	24	+
	25	+ adpll_dsp_ck: adpll@80 {
	26	+ #clock-cells = <1>;
	27	+ compatible = "ti,dm814-adpll-lj-clock";
	28	+ reg = <0x80 0x30>;
	29	+ clocks = <&devosc_ck &devosc_ck>;
	30	+ clock-names = "clkinp", "clkinpulow";
	31	+ clock-output-names = "481c5080.adpll.dcoclkldo",
	32	+ "481c5080.adpll.clkout",
	33	+ "481c5080.adpll.clkoutldo";
	34	+ };
	35	+
	36	+ adpll_sgx_ck: adpll@b0 {
	37	+ #clock-cells = <1>;
	38	+ compatible = "ti,dm814-adpll-lj-clock";
	39	+ reg = <0xb0 0x30>;
	40	+ clocks = <&devosc_ck &devosc_ck>;
	41	+ clock-names = "clkinp", "clkinpulow";
	42	+ clock-output-names = "481c50b0.adpll.dcoclkldo",
	43	+ "481c50b0.adpll.clkout",
	44	+ "481c50b0.adpll.clkoutldo";
	45	+ };
	46	+
	47	+ adpll_hdvic_ck: adpll@e0 {
	48	+ #clock-cells = <1>;
	49	+ compatible = "ti,dm814-adpll-lj-clock";
	50	+ reg = <0xe0 0x30>;
	51	+ clocks = <&devosc_ck &devosc_ck>;
	52	+ clock-names = "clkinp", "clkinpulow";
	53	+ clock-output-names = "481c50e0.adpll.dcoclkldo",
	54	+ "481c50e0.adpll.clkout",
	55	+ "481c50e0.adpll.clkoutldo";
	56	+ };
	57	+
	58	+ adpll_l3_ck: adpll@110 {
	59	+ #clock-cells = <1>;
	60	+ compatible = "ti,dm814-adpll-lj-clock";
	61	+ reg = <0x110 0x30>;
	62	+ clocks = <&devosc_ck &devosc_ck>;
	63	+ clock-names = "clkinp", "clkinpulow";
	64	+ clock-output-names = "481c5110.adpll.dcoclkldo",
	65	+ "481c5110.adpll.clkout",
	66	+ "481c5110.adpll.clkoutldo";
	67	+ };
	68	+
	69	+ adpll_isp_ck: adpll@140 {
	70	+ #clock-cells = <1>;
	71	+ compatible = "ti,dm814-adpll-lj-clock";
	72	+ reg = <0x140 0x30>;
	73	+ clocks = <&devosc_ck &devosc_ck>;
	74	+ clock-names = "clkinp", "clkinpulow";
	75	+ clock-output-names = "481c5140.adpll.dcoclkldo",
	76	+ "481c5140.adpll.clkout",
	77	+ "481c5140.adpll.clkoutldo";
	78	+ };
	79	+
	80	+ adpll_dss_ck: adpll@170 {
	81	+ #clock-cells = <1>;
	82	+ compatible = "ti,dm814-adpll-lj-clock";
	83	+ reg = <0x170 0x30>;
	84	+ clocks = <&devosc_ck &devosc_ck>;
	85	+ clock-names = "clkinp", "clkinpulow";
	86	+ clock-output-names = "481c5170.adpll.dcoclkldo",
	87	+ "481c5170.adpll.clkout",
	88	+ "481c5170.adpll.clkoutldo";
	89	+ };
	90	+
	91	+ adpll_video0_ck: adpll@1a0 {
	92	+ #clock-cells = <1>;
	93	+ compatible = "ti,dm814-adpll-lj-clock";
	94	+ reg = <0x1a0 0x30>;
	95	+ clocks = <&devosc_ck &devosc_ck>;
	96	+ clock-names = "clkinp", "clkinpulow";
	97	+ clock-output-names = "481c51a0.adpll.dcoclkldo",
	98	+ "481c51a0.adpll.clkout",
	99	+ "481c51a0.adpll.clkoutldo";
	100	+ };
	101	+
	102	+ adpll_video1_ck: adpll@1d0 {
	103	+ #clock-cells = <1>;
	104	+ compatible = "ti,dm814-adpll-lj-clock";
	105	+ reg = <0x1d0 0x30>;
	106	+ clocks = <&devosc_ck &devosc_ck>;
	107	+ clock-names = "clkinp", "clkinpulow";
	108	+ clock-output-names = "481c51d0.adpll.dcoclkldo",
	109	+ "481c51d0.adpll.clkout",
	110	+ "481c51d0.adpll.clkoutldo";
	111	+ };
	112	+
	113	+ adpll_hdmi_ck: adpll@200 {
	114	+ #clock-cells = <1>;
	115	+ compatible = "ti,dm814-adpll-lj-clock";
	116	+ reg = <0x200 0x30>;
	117	+ clocks = <&devosc_ck &devosc_ck>;
	118	+ clock-names = "clkinp", "clkinpulow";
	119	+ clock-output-names = "481c5200.adpll.dcoclkldo",
	120	+ "481c5200.adpll.clkout",
	121	+ "481c5200.adpll.clkoutldo";
	122	+ };
	123	+
	124	+ adpll_audio_ck: adpll@230 {
	125	+ #clock-cells = <1>;
	126	+ compatible = "ti,dm814-adpll-lj-clock";
	127	+ reg = <0x230 0x30>;
	128	+ clocks = <&devosc_ck &devosc_ck>;
	129	+ clock-names = "clkinp", "clkinpulow";
	130	+ clock-output-names = "481c5230.adpll.dcoclkldo",
	131	+ "481c5230.adpll.clkout",
	132	+ "481c5230.adpll.clkoutldo";
	133	+ };
	134	+
	135	+ adpll_usb_ck: adpll@260 {
	136	+ #clock-cells = <1>;
	137	+ compatible = "ti,dm814-adpll-lj-clock";
	138	+ reg = <0x260 0x30>;
	139	+ clocks = <&devosc_ck &devosc_ck>;
	140	+ clock-names = "clkinp", "clkinpulow";
	141	+ clock-output-names = "481c5260.adpll.dcoclkldo",
	142	+ "481c5260.adpll.clkout",
	143	+ "481c5260.adpll.clkoutldo";
	144	+ };
	145	+
	146	+ adpll_ddr_ck: adpll@290 {
	147	+ #clock-cells = <1>;
	148	+ compatible = "ti,dm814-adpll-lj-clock";
	149	+ reg = <0x290 0x30>;
	150	+ clocks = <&devosc_ck &devosc_ck>;
	151	+ clock-names = "clkinp", "clkinpulow";
	152	+ clock-output-names = "481c5290.adpll.dcoclkldo",
	153	+ "481c5290.adpll.clkout",
	154	+ "481c5290.adpll.clkoutldo";
	155	+ };
	156	+};
	157	+
7	158	&pllss_clocks {
8	159	timer1_fck: timer1_fck {
9	160	#clock-cells = <0>;
@@ -23,6 +174,24 @@ · 13 unmodified lines
23	174	reg = <0x2e0>;
24	175	};
25	176
	177	+ /* CPTS_RFT_CLK in RMII_REFCLK_SRC, usually sourced from auiod */
	178	+ cpsw_cpts_rft_clk: cpsw_cpts_rft_clk {
	179	+ #clock-cells = <0>;
	180	+ compatible = "ti,mux-clock";
	181	+ clocks = <&adpll_video0_ck 1
	182	+ &adpll_video1_ck 1
	183	+ &adpll_audio_ck 1>;
	184	+ ti,bit-shift = <1>;
	185	+ reg = <0x2e8>;
	186	+ };
	187	+
	188	+ /* REVISIT: Set up with a proper mux using RMII_REFCLK_SRC */
	189	+ cpsw_125mhz_gclk: cpsw_125mhz_gclk {
	190	+ #clock-cells = <0>;
	191	+ compatible = "fixed-clock";
	192	+ clock-frequency = <125000000>;
	193	+ };
	194	+
26	195	sysclk18_ck: sysclk18_ck {
27	196	#clock-cells = <0>;
28	197	compatible = "ti,mux-clock";
@@ -79,37 +248,6 @@ · 50 unmodified lines
79	248	compatible = "fixed-clock";
80	249	clock-frequency = <1000000000>;
81	250	};
82		−
83		− sysclk4_ck: sysclk4_ck {
84		− #clock-cells = <0>;
85		− compatible = "fixed-clock";
86		− clock-frequency = <222000000>;
87		− };
88		−
89		− sysclk6_ck: sysclk6_ck {
90		− #clock-cells = <0>;
91		− compatible = "fixed-clock";
92		− clock-frequency = <100000000>;
93		− };
94		−
95		− sysclk10_ck: sysclk10_ck {
96		− #clock-cells = <0>;
97		− compatible = "fixed-clock";
98		− clock-frequency = <48000000>;
99		− };
100		−
101		− cpsw_125mhz_gclk: cpsw_125mhz_gclk {
102		− #clock-cells = <0>;
103		− compatible = "fixed-clock";
104		− clock-frequency = <125000000>;
105		− };
106		−
107		− cpsw_cpts_rft_clk: cpsw_cpts_rft_clk {
108		− #clock-cells = <0>;
109		− compatible = "fixed-clock";
110		− clock-frequency = <250000000>;
111		− };
112		−
113	251	};
114	252
115	253	&prcm_clocks {
@@ -138,6 +276,49 @@ · 22 unmodified lines
138	276	clock-div = <78125>;
139	277	};
140	278
	279	+ /* L4_HS 220 MHz*/
	280	+ sysclk4_ck: sysclk4_ck {
	281	+ #clock-cells = <0>;
	282	+ compatible = "ti,fixed-factor-clock";
	283	+ clocks = <&adpll_l3_ck 1>;
	284	+ ti,clock-mult = <1>;
	285	+ ti,clock-div = <1>;
	286	+ };
	287	+
	288	+ /* L4_FWCFG */
	289	+ sysclk5_ck: sysclk5_ck {
	290	+ #clock-cells = <0>;
	291	+ compatible = "ti,fixed-factor-clock";
	292	+ clocks = <&adpll_l3_ck 1>;
	293	+ ti,clock-mult = <1>;
	294	+ ti,clock-div = <2>;
	295	+ };
	296	+
	297	+ /* L4_LS 110 MHz */
	298	+ sysclk6_ck: sysclk6_ck {
	299	+ #clock-cells = <0>;
	300	+ compatible = "ti,fixed-factor-clock";
	301	+ clocks = <&adpll_l3_ck 1>;
	302	+ ti,clock-mult = <1>;
	303	+ ti,clock-div = <2>;
	304	+ };
	305	+
	306	+ sysclk8_ck: sysclk8_ck {
	307	+ #clock-cells = <0>;
	308	+ compatible = "ti,fixed-factor-clock";
	309	+ clocks = <&adpll_usb_ck 1>;
	310	+ ti,clock-mult = <1>;
	311	+ ti,clock-div = <1>;
	312	+ };
	313	+
	314	+ sysclk10_ck: sysclk10_ck {
	315	+ compatible = "ti,divider-clock";
	316	+ reg = <0x324>;
	317	+ ti,max-div = <7>;
	318	+ #clock-cells = <0>;
	319	+ clocks = <&adpll_usb_ck 1>;
	320	+ };
	321	+
141	322	aud_clkin0_ck: aud_clkin0_ck {
142	323	#clock-cells = <0>;
143	324	compatible = "fixed-clock";

arch/arm/boot/dts/dra62x-clocks.dtsi+26−0

@@ -6,6 +6,32 @@ · 5 unmodified lines
6	6
7	7	#include "dm814x-clocks.dtsi"
8	8
	9	+/* Compared to dm814x, dra62x does not have hdic, l3 or dss PLLs */
	10	+&adpll_hdvic_ck {
	11	+ status = "disabled";
	12	+};
	13	+
	14	+&adpll_l3_ck {
	15	+ status = "disabled";
	16	+};
	17	+
	18	+&adpll_dss_ck {
	19	+ status = "disabled";
	20	+};
	21	+
	22	+/* Compared to dm814x, dra62x has interconnect clocks on isp PLL */
	23	+&sysclk4_ck {
	24	+ clocks = <&adpll_isp_ck 1>;
	25	+};
	26	+
	27	+&sysclk5_ck {
	28	+ clocks = <&adpll_isp_ck 1>;
	29	+};
	30	+
	31	+&sysclk6_ck {
	32	+ clocks = <&adpll_isp_ck 1>;
	33	+};
	34	+
9	35	/*
10	36	* Compared to dm814x, dra62x has different shifts and more mux options.
11	37	* Please add the extra options for ysclk_14 and 16 if really needed.

arch/arm/boot/dts/dra7xx-clocks.dtsi+17−1

@@ -98,12 +98,20 @@ · 97 unmodified lines
98	98	clock-frequency = <32768>;
99	99	};
100	100
101		− sys_32k_ck: sys_32k_ck {
	101	+ sys_clk32_crystal_ck: sys_clk32_crystal_ck {
102	102	#clock-cells = <0>;
103	103	compatible = "fixed-clock";
104	104	clock-frequency = <32768>;
105	105	};
106	106
	107	+ sys_clk32_pseudo_ck: sys_clk32_pseudo_ck {
	108	+ #clock-cells = <0>;
	109	+ compatible = "fixed-factor-clock";
	110	+ clocks = <&sys_clkin1>;
	111	+ clock-mult = <1>;
	112	+ clock-div = <610>;
	113	+ };
	114	+
107	115	virt_12000000_ck: virt_12000000_ck {
108	116	#clock-cells = <0>;
109	117	compatible = "fixed-clock";
@@ -2170,4 +2178,12 @@ · 2060 unmodified lines
2170	2178	ti,bit-shift = <22>;
2171	2179	reg = <0x0558>;
2172	2180	};
	2181	+
	2182	+ sys_32k_ck: sys_32k_ck {
	2183	+ #clock-cells = <0>;
	2184	+ compatible = "ti,mux-clock";
	2185	+ clocks = <&sys_clk32_crystal_ck>, <&sys_clk32_pseudo_ck>, <&sys_clk32_pseudo_ck>, <&sys_clk32_pseudo_ck>;
	2186	+ ti,bit-shift = <8>;
	2187	+ reg = <0x6c4>;
	2188	+ };
2173	2189	};

arch/arm/boot/dts/qcom-msm8974.dtsi+1−13

@@ -1,6 +1,6 @@
1	1	/dts-v1/;
2	2
3		−#include <dt-bindings/interrupt-controller/arm-gic.h>
	3	+#include <dt-bindings/interrupt-controller/irq.h>
4	4	#include <dt-bindings/clock/qcom,gcc-msm8974.h>
5	5	#include "skeleton.dtsi"
6	6
@@ -460,8 +460,6 @@ · 453 unmodified lines
460	460	clock-names = "core", "iface";
461	461	#address-cells = <1>;
462	462	#size-cells = <0>;
463		− dmas = <&blsp2_dma 20>, <&blsp2_dma 21>;
464		− dma-names = "tx", "rx";
465	463	};
466	464
467	465	spmi_bus: spmi@fc4cf000 {
@@ -479,16 +477,6 @@ · 11 unmodified lines
479	477	interrupt-controller;
480	478	#interrupt-cells = <4>;
481	479	};
482		−
483		− blsp2_dma: dma-controller@f9944000 {
484		− compatible = "qcom,bam-v1.4.0";
485		− reg = <0xf9944000 0x19000>;
486		− interrupts = <GIC_SPI 239 IRQ_TYPE_LEVEL_HIGH>;
487		− clocks = <&gcc GCC_BLSP2_AHB_CLK>;
488		− clock-names = "bam_clk";
489		− #dma-cells = <1>;
490		− qcom,ee = <0>;
491		− };
492	480	};
493	481
494	482	smd {

arch/arm/boot/dts/r8a7791-koelsch.dts+1−0

@@ -661,6 +661,7 @@ · 660 unmodified lines
661	661	};
662	662
663	663	&pcie_bus_clk {
	664	+ clock-frequency = <100000000>;
664	665	status = "okay";
665	666	};
666	667

arch/arm/boot/dts/r8a7791-porter.dts+1−13

@@ -143,19 +143,11 @@ · 142 unmodified lines
143	143	};
144	144
145	145	&pfc {
146		− pinctrl-0 = <&scif_clk_pins>;
147		− pinctrl-names = "default";
148		−
149	146	scif0_pins: serial0 {
150	147	renesas,groups = "scif0_data_d";
151	148	renesas,function = "scif0";
152	149	};
153	150
154		− scif_clk_pins: scif_clk {
155		− renesas,groups = "scif_clk";
156		− renesas,function = "scif_clk";
157		− };
158		−
159	151	ether_pins: ether {
160	152	renesas,groups = "eth_link", "eth_mdio", "eth_rmii";
161	153	renesas,function = "eth";
@@ -229,11 +221,6 @@ · 67 unmodified lines
229	221	status = "okay";
230	222	};
231	223
232		−&scif_clk {
233		− clock-frequency = <14745600>;
234		− status = "okay";
235		−};
236		−
237	224	&ether {
238	225	pinctrl-0 = <&ether_pins &phy1_pins>;
239	226	pinctrl-names = "default";
@@ -414,6 +401,7 @@ · 174 unmodified lines
414	401	};
415	402
416	403	&pcie_bus_clk {
	404	+ clock-frequency = <100000000>;
417	405	status = "okay";
418	406	};
419	407

arch/arm/boot/dts/r8a7791.dtsi+1−4

@@ -1083,9 +1083,8 @@ · 1082 unmodified lines
1083	1083	pcie_bus_clk: pcie_bus_clk {
1084	1084	compatible = "fixed-clock";
1085	1085	#clock-cells = <0>;
1086		− clock-frequency = <100000000>;
	1086	+ clock-frequency = <0>;
1087	1087	clock-output-names = "pcie_bus";
1088		− status = "disabled";
1089	1088	};
1090	1089
1091	1090	/* External SCIF clock */
@@ -1094,7 +1093,6 @@ · 2 unmodified lines
1094	1093	#clock-cells = <0>;
1095	1094	/* This value must be overridden by the board. */
1096	1095	clock-frequency = <0>;
1097		− status = "disabled";
1098	1096	};
1099	1097
1100	1098	/* External USB clock - can be overridden by the board */
@@ -1112,7 +1110,6 @@ · 11 unmodified lines
1112	1110	/* This value must be overridden by the board. */
1113	1111	clock-frequency = <0>;
1114	1112	clock-output-names = "can_clk";
1115		− status = "disabled";
1116	1113	};
1117	1114
1118	1115	/* Special CPG clocks */

arch/arm/mach-imx/devices/platform-sdhci-esdhc-imx.c+3−2

@@ -71,6 +71,7 @@ struct platform_device *__init imx_add_sdhci_esdhc_imx( · 70 unmodified lines
71	71	if (!pdata)
72	72	pdata = &default_esdhc_pdata;
73	73
74		− return imx_add_platform_device(data->devid, data->id, res,
75		− ARRAY_SIZE(res), pdata, sizeof(*pdata));
	74	+ return imx_add_platform_device_dmamask(data->devid, data->id, res,
	75	+ ARRAY_SIZE(res), pdata, sizeof(*pdata),
	76	+ DMA_BIT_MASK(32));
76	77	}

arch/arm/mach-omap2/clockdomains7xx_data.c+1−1

@@ -461,7 +461,7 @@ static struct clockdomain ipu_7xx_clkdm = { · 460 unmodified lines
461	461	.cm_inst = DRA7XX_CM_CORE_AON_IPU_INST,
462	462	.clkdm_offs = DRA7XX_CM_CORE_AON_IPU_IPU_CDOFFS,
463	463	.dep_bit = DRA7XX_IPU_STATDEP_SHIFT,
464		− .flags = CLKDM_CAN_HWSUP_SWSUP,
	464	+ .flags = CLKDM_CAN_SWSUP,
465	465	};
466	466
467	467	static struct clockdomain mpu1_7xx_clkdm = {

arch/arm/mach-omap2/io.c+2−1

@@ -737,7 +737,8 @@ void __init omap5_init_late(void) · 736 unmodified lines
737	737	#ifdef CONFIG_SOC_DRA7XX
738	738	void __init dra7xx_init_early(void)
739	739	{
740		− omap2_set_globals_tap(-1, OMAP2_L4_IO_ADDRESS(DRA7XX_TAP_BASE));
	740	+ omap2_set_globals_tap(DRA7XX_CLASS,
	741	+ OMAP2_L4_IO_ADDRESS(DRA7XX_TAP_BASE));
741	742	omap2_set_globals_prcm_mpu(OMAP2_L4_IO_ADDRESS(OMAP54XX_PRCM_MPU_BASE));
742	743	omap2_control_base_init();
743	744	omap4_pm_init_early();

arch/arm/mach-omap2/omap-wakeupgen.c+7−0

@@ -274,6 +274,10 @@ static inline void omap5_irq_save_context(void) · 273 unmodified lines
274	274	*/
275	275	static void irq_save_context(void)
276	276	{
	277	+ /* DRA7 has no SAR to save */
	278	+ if (soc_is_dra7xx())
	279	+ return;
	280	+
277	281	if (!sar_base)
278	282	sar_base = omap4_get_sar_ram_base();
279	283
@@ -290,6 +294,9 @@ static void irq_sar_clear(void) · 10 unmodified lines
290	294	{
291	295	u32 val;
292	296	u32 offset = SAR_BACKUP_STATUS_OFFSET;
	297	+ /* DRA7 has no SAR to save */
	298	+ if (soc_is_dra7xx())
	299	+ return;
293	300
294	301	if (soc_is_omap54xx())
295	302	offset = OMAP5_SAR_BACKUP_STATUS_OFFSET;

arch/arm/mach-omap2/pm34xx.c+13−10

@@ -198,7 +198,6 @@ void omap_sram_idle(void) · 197 unmodified lines
198	198	int per_next_state = PWRDM_POWER_ON;
199	199	int core_next_state = PWRDM_POWER_ON;
200	200	int per_going_off;
201		− int core_prev_state;
202	201	u32 sdrc_pwr = 0;
203	202
204	203	mpu_next_state = pwrdm_read_next_pwrst(mpu_pwrdm);
@@ -278,16 +277,20 @@ void omap_sram_idle(void) · 73 unmodified lines
278	277	sdrc_write_reg(sdrc_pwr, SDRC_POWER);
279	278
280	279	/* CORE */
281		− if (core_next_state < PWRDM_POWER_ON) {
282		− core_prev_state = pwrdm_read_prev_pwrst(core_pwrdm);
283		− if (core_prev_state == PWRDM_POWER_OFF) {
284		− omap3_core_restore_context();
285		− omap3_cm_restore_context();
286		− omap3_sram_restore_context();
287		− omap2_sms_restore_context();
288		− }
	280	+ if (core_next_state < PWRDM_POWER_ON &&
	281	+ pwrdm_read_prev_pwrst(core_pwrdm) == PWRDM_POWER_OFF) {
	282	+ omap3_core_restore_context();
	283	+ omap3_cm_restore_context();
	284	+ omap3_sram_restore_context();
	285	+ omap2_sms_restore_context();
	286	+ } else {
	287	+ /*
	288	+ * In off-mode resume path above, omap3_core_restore_context
	289	+ * also handles the INTC autoidle restore done here so limit
	290	+ * this to non-off mode resume paths so we don't do it twice.
	291	+ */
	292	+ omap3_intc_resume_idle();
289	293	}
290		− omap3_intc_resume_idle();
291	294
292	295	pwrdm_post_transition(NULL);
293	296

arch/arm/mach-shmobile/timer.c+11−17

@@ -40,8 +40,7 @@ static void __init shmobile_setup_delay_hz(unsigned int max_cpu_core_hz, · 39 unmodified lines
40	40	void __init shmobile_init_delay(void)
41	41	{
42	42	struct device_node np, cpus;
43		− bool is_a7_a8_a9 = false;
44		− bool is_a15 = false;
	43	+ unsigned int div = 0;
45	44	bool has_arch_timer = false;
46	45	u32 max_freq = 0;
47	46
@@ -55,27 +54,22 @@ void __init shmobile_init_delay(void) · 7 unmodified lines
55	54	if (!of_property_read_u32(np, "clock-frequency", &freq))
56	55	max_freq = max(max_freq, freq);
57	56
58		− if (of_device_is_compatible(np, "arm,cortex-a8") \|\|
59		− of_device_is_compatible(np, "arm,cortex-a9")) {
60		− is_a7_a8_a9 = true;
61		− } else if (of_device_is_compatible(np, "arm,cortex-a7")) {
62		− is_a7_a8_a9 = true;
63		− has_arch_timer = true;
64		− } else if (of_device_is_compatible(np, "arm,cortex-a15")) {
65		− is_a15 = true;
	57	+ if (of_device_is_compatible(np, "arm,cortex-a8")) {
	58	+ div = 2;
	59	+ } else if (of_device_is_compatible(np, "arm,cortex-a9")) {
	60	+ div = 1;
	61	+ } else if (of_device_is_compatible(np, "arm,cortex-a7") \|\|
	62	+ of_device_is_compatible(np, "arm,cortex-a15")) {
	63	+ div = 1;
66	64	has_arch_timer = true;
67	65	}
68	66	}
69	67
70	68	of_node_put(cpus);
71	69
72		− if (!max_freq)
	70	+ if (!max_freq \|\| !div)
73	71	return;
74	72
75		− if (!has_arch_timer \|\| !IS_ENABLED(CONFIG_ARM_ARCH_TIMER)) {
76		− if (is_a7_a8_a9)
77		− shmobile_setup_delay_hz(max_freq, 1, 3);
78		− else if (is_a15)
79		− shmobile_setup_delay_hz(max_freq, 2, 4);
80		− }
	73	+ if (!has_arch_timer \|\| !IS_ENABLED(CONFIG_ARM_ARCH_TIMER))
	74	+ shmobile_setup_delay_hz(max_freq, 1, div);
81	75	}

arch/arm64/boot/dts/socionext/uniphier-ph1-ld20-ref.dts+0−1

@@ -70,7 +70,6 @@ · 69 unmodified lines
70	70	i2c3 = &i2c3;
71	71	i2c4 = &i2c4;
72	72	i2c5 = &i2c5;
73		− i2c6 = &i2c6;
74	73	};
75	74	};
76	75

arch/arm64/boot/dts/socionext/uniphier-ph1-ld20.dtsi+5−15

@@ -201,15 +201,12 @@ · 200 unmodified lines
201	201
202	202	i2c2: i2c@58782000 {
203	203	compatible = "socionext,uniphier-fi2c";
204		− status = "disabled";
205	204	reg = <0x58782000 0x80>;
206	205	#address-cells = <1>;
207	206	#size-cells = <0>;
208	207	interrupts = <0 43 4>;
209		− pinctrl-names = "default";
210		− pinctrl-0 = <&pinctrl_i2c2>;
211	208	clocks = <&i2c_clk>;
212		− clock-frequency = <100000>;
	209	+ clock-frequency = <400000>;
213	210	};
214	211
215	212	i2c3: i2c@58783000 {
@@ -227,12 +224,15 @@ · 11 unmodified lines
227	224
228	225	i2c4: i2c@58784000 {
229	226	compatible = "socionext,uniphier-fi2c";
	227	+ status = "disabled";
230	228	reg = <0x58784000 0x80>;
231	229	#address-cells = <1>;
232	230	#size-cells = <0>;
233	231	interrupts = <0 45 4>;
	232	+ pinctrl-names = "default";
	233	+ pinctrl-0 = <&pinctrl_i2c4>;
234	234	clocks = <&i2c_clk>;
235		− clock-frequency = <400000>;
	235	+ clock-frequency = <100000>;
236	236	};
237	237
238	238	i2c5: i2c@58785000 {
@@ -245,16 +245,6 @@ · 6 unmodified lines
245	245	clock-frequency = <400000>;
246	246	};
247	247
248		− i2c6: i2c@58786000 {
249		− compatible = "socionext,uniphier-fi2c";
250		− reg = <0x58786000 0x80>;
251		− #address-cells = <1>;
252		− #size-cells = <0>;
253		− interrupts = <0 26 4>;
254		− clocks = <&i2c_clk>;
255		− clock-frequency = <400000>;
256		− };
257		−
258	248	system_bus: system-bus@58c00000 {
259	249	compatible = "socionext,uniphier-system-bus";
260	250	status = "disabled";

arch/nios2/lib/memset.c+1−1

@@ -68,7 +68,7 @@ void memset(void s, int c, size_t count) · 67 unmodified lines
68	68	"=r" (charcnt), /* %1 Output */
69	69	"=r" (dwordcnt), /* %2 Output */
70	70	"=r" (fill8reg), /* %3 Output */
71		− "=r" (wrkrega) /* %4 Output */
	71	+ "=&r" (wrkrega) /* %4 Output only */
72	72	: "r" (c), /* %5 Input */
73	73	"0" (s), /* %0 Input/Output */
74	74	"1" (count) /* %1 Input/Output */

arch/powerpc/include/asm/systbl.h+2−0

@@ -384,3 +384,5 @@ SYSCALL(ni_syscall) · 383 unmodified lines
384	384	SYSCALL(ni_syscall)
385	385	SYSCALL(mlock2)
386	386	SYSCALL(copy_file_range)
	387	+COMPAT_SYS_SPU(preadv2)
	388	+COMPAT_SYS_SPU(pwritev2)

arch/powerpc/include/asm/unistd.h+1−1

@@ -12,7 +12,7 @@ · 11 unmodified lines
12	12	#include <uapi/asm/unistd.h>
13	13
14	14
15		−#define NR_syscalls 380
	15	+#define NR_syscalls 382
16	16
17	17	#define __NR__exit __NR_exit
18	18

arch/powerpc/include/uapi/asm/unistd.h+2−0

@@ -390,5 +390,7 @@ · 389 unmodified lines
390	390	#define __NR_membarrier 365
391	391	#define __NR_mlock2 378
392	392	#define __NR_copy_file_range 379
	393	+#define __NR_preadv2 380
	394	+#define __NR_pwritev2 381
393	395
394	396	#endif /* _UAPI_ASM_POWERPC_UNISTD_H_ */

arch/s390/include/asm/mmu.h+1−1

@@ -11,7 +11,7 @@ typedef struct { · 10 unmodified lines
11	11	spinlock_t list_lock;
12	12	struct list_head pgtable_list;
13	13	struct list_head gmap_list;
14		− unsigned long asce_bits;
	14	+ unsigned long asce;
15	15	unsigned long asce_limit;
16	16	unsigned long vdso_base;
17	17	/* The mmu context allocates 4K page tables. */

arch/s390/include/asm/mmu_context.h+22−6

@@ -26,12 +26,28 @@ static inline int init_new_context(struct task_struct *tsk, · 25 unmodified lines
26	26	mm->context.has_pgste = 0;
27	27	mm->context.use_skey = 0;
28	28	#endif
29		− if (mm->context.asce_limit == 0) {
	29	+ switch (mm->context.asce_limit) {
	30	+ case 1UL << 42:
	31	+ /*
	32	+ * forked 3-level task, fall through to set new asce with new
	33	+ * mm->pgd
	34	+ */
	35	+ case 0:
30	36	/* context created by exec, set asce limit to 4TB */
31		− mm->context.asce_bits = _ASCE_TABLE_LENGTH \|
32		− _ASCE_USER_BITS \| _ASCE_TYPE_REGION3;
33	37	mm->context.asce_limit = STACK_TOP_MAX;
34		− } else if (mm->context.asce_limit == (1UL << 31)) {
	38	+ mm->context.asce = __pa(mm->pgd) \| _ASCE_TABLE_LENGTH \|
	39	+ _ASCE_USER_BITS \| _ASCE_TYPE_REGION3;
	40	+ break;
	41	+ case 1UL << 53:
	42	+ /* forked 4-level task, set new asce with new mm->pgd */
	43	+ mm->context.asce = __pa(mm->pgd) \| _ASCE_TABLE_LENGTH \|
	44	+ _ASCE_USER_BITS \| _ASCE_TYPE_REGION2;
	45	+ break;
	46	+ case 1UL << 31:
	47	+ /* forked 2-level compat task, set new asce with new mm->pgd */
	48	+ mm->context.asce = __pa(mm->pgd) \| _ASCE_TABLE_LENGTH \|
	49	+ _ASCE_USER_BITS \| _ASCE_TYPE_SEGMENT;
	50	+ /* pgd_alloc() did not increase mm->nr_pmds */
35	51	mm_inc_nr_pmds(mm);
36	52	}
37	53	crst_table_init((unsigned long *) mm->pgd, pgd_entry_type(mm));
@@ -42,7 +58,7 @@ static inline int init_new_context(struct task_struct *tsk, · 4 unmodified lines
42	58
43	59	static inline void set_user_asce(struct mm_struct *mm)
44	60	{
45		− S390_lowcore.user_asce = mm->context.asce_bits \| __pa(mm->pgd);
	61	+ S390_lowcore.user_asce = mm->context.asce;
46	62	if (current->thread.mm_segment.ar4)
47	63	__ctl_load(S390_lowcore.user_asce, 7, 7);
48	64	set_cpu_flag(CIF_ASCE);
@@ -71,7 +87,7 @@ static inline void switch_mm(struct mm_struct prev, struct mm_struct next, · 22 unmodified lines
71	87	{
72	88	int cpu = smp_processor_id();
73	89
74		− S390_lowcore.user_asce = next->context.asce_bits \| __pa(next->pgd);
	90	+ S390_lowcore.user_asce = next->context.asce;
75	91	if (prev == next)
76	92	return;
77	93	if (MACHINE_HAS_TLB_LC)

arch/s390/include/asm/pgalloc.h+2−2

@@ -52,8 +52,8 @@ static inline unsigned long pgd_entry_type(struct mm_struct *mm) · 51 unmodified lines
52	52	return _REGION2_ENTRY_EMPTY;
53	53	}
54	54
55		−int crst_table_upgrade(struct mm_struct *, unsigned long limit);
56		−void crst_table_downgrade(struct mm_struct *, unsigned long limit);
	55	+int crst_table_upgrade(struct mm_struct *);
	56	+void crst_table_downgrade(struct mm_struct *);
57	57
58	58	static inline pud_t pud_alloc_one(struct mm_struct mm, unsigned long address)
59	59	{

arch/s390/include/asm/processor.h+1−1

@@ -175,7 +175,7 @@ extern __vector128 init_task_fpu_regs[__NUM_VXRS]; · 174 unmodified lines
175	175	regs->psw.mask = PSW_USER_BITS \| PSW_MASK_BA; \
176	176	regs->psw.addr = new_psw; \
177	177	regs->gprs[15] = new_stackp; \
178		− crst_table_downgrade(current->mm, 1UL << 31); \
	178	+ crst_table_downgrade(current->mm); \
179	179	execve_tail(); \
180	180	} while (0)
181	181

arch/s390/include/asm/tlbflush.h+3−6

@@ -110,8 +110,7 @@ static inline void __tlb_flush_asce(struct mm_struct *mm, unsigned long asce) · 109 unmodified lines
110	110	static inline void __tlb_flush_kernel(void)
111	111	{
112	112	if (MACHINE_HAS_IDTE)
113		− __tlb_flush_idte((unsigned long) init_mm.pgd \|
114		− init_mm.context.asce_bits);
	113	+ __tlb_flush_idte(init_mm.context.asce);
115	114	else
116	115	__tlb_flush_global();
117	116	}
@@ -133,8 +132,7 @@ static inline void __tlb_flush_asce(struct mm_struct *mm, unsigned long asce) · 15 unmodified lines
133	132	static inline void __tlb_flush_kernel(void)
134	133	{
135	134	if (MACHINE_HAS_TLB_LC)
136		− __tlb_flush_idte_local((unsigned long) init_mm.pgd \|
137		− init_mm.context.asce_bits);
	135	+ __tlb_flush_idte_local(init_mm.context.asce);
138	136	else
139	137	__tlb_flush_local();
140	138	}
@@ -148,8 +146,7 @@ static inline void __tlb_flush_mm(struct mm_struct * mm) · 7 unmodified lines
148	146	* only ran on the local cpu.
149	147	*/
150	148	if (MACHINE_HAS_IDTE && list_empty(&mm->context.gmap_list))
151		− __tlb_flush_asce(mm, (unsigned long) mm->pgd \|
152		− mm->context.asce_bits);
	149	+ __tlb_flush_asce(mm, mm->context.asce);
153	150	else
154	151	__tlb_flush_full(mm);
155	152	}

arch/s390/mm/init.c+2−1

@@ -89,7 +89,8 @@ void __init paging_init(void) · 88 unmodified lines
89	89	asce_bits = _ASCE_TYPE_REGION3 \| _ASCE_TABLE_LENGTH;
90	90	pgd_type = _REGION3_ENTRY_EMPTY;
91	91	}
92		− S390_lowcore.kernel_asce = (__pa(init_mm.pgd) & PAGE_MASK) \| asce_bits;
	92	+ init_mm.context.asce = (__pa(init_mm.pgd) & PAGE_MASK) \| asce_bits;
	93	+ S390_lowcore.kernel_asce = init_mm.context.asce;
93	94	clear_table((unsigned long *) init_mm.pgd, pgd_type,
94	95	sizeof(unsigned long)*2048);
95	96	vmem_map_init();

arch/s390/mm/mmap.c+3−3

@@ -174,7 +174,7 @@ int s390_mmap_check(unsigned long addr, unsigned long len, unsigned long flags) · 173 unmodified lines
174	174	if (!(flags & MAP_FIXED))
175	175	addr = 0;
176	176	if ((addr + len) >= TASK_SIZE)
177		− return crst_table_upgrade(current->mm, TASK_MAX_SIZE);
	177	+ return crst_table_upgrade(current->mm);
178	178	return 0;
179	179	}
180	180
@@ -191,7 +191,7 @@ s390_get_unmapped_area(struct file *filp, unsigned long addr, · 10 unmodified lines
191	191	return area;
192	192	if (area == -ENOMEM && !is_compat_task() && TASK_SIZE < TASK_MAX_SIZE) {
193	193	/* Upgrade the page table to 4 levels and retry. */
194		− rc = crst_table_upgrade(mm, TASK_MAX_SIZE);
	194	+ rc = crst_table_upgrade(mm);
195	195	if (rc)
196	196	return (unsigned long) rc;
197	197	area = arch_get_unmapped_area(filp, addr, len, pgoff, flags);
@@ -213,7 +213,7 @@ s390_get_unmapped_area_topdown(struct file *filp, const unsigned long addr, · 15 unmodified lines
213	213	return area;
214	214	if (area == -ENOMEM && !is_compat_task() && TASK_SIZE < TASK_MAX_SIZE) {
215	215	/* Upgrade the page table to 4 levels and retry. */
216		− rc = crst_table_upgrade(mm, TASK_MAX_SIZE);
	216	+ rc = crst_table_upgrade(mm);
217	217	if (rc)
218	218	return (unsigned long) rc;
219	219	area = arch_get_unmapped_area_topdown(filp, addr, len,

arch/s390/mm/pgalloc.c+28−57

@@ -76,81 +76,52 @@ static void __crst_table_upgrade(void *arg) · 75 unmodified lines
76	76	__tlb_flush_local();
77	77	}
78	78
79		−int crst_table_upgrade(struct mm_struct *mm, unsigned long limit)
	79	+int crst_table_upgrade(struct mm_struct *mm)
80	80	{
81	81	unsigned long table, pgd;
82		− unsigned long entry;
83		− int flush;
84	82
85		− BUG_ON(limit > TASK_MAX_SIZE);
86		− flush = 0;
87		−repeat:
	83	+ /* upgrade should only happen from 3 to 4 levels */
	84	+ BUG_ON(mm->context.asce_limit != (1UL << 42));
	85	+
88	86	table = crst_table_alloc(mm);
89	87	if (!table)
90	88	return -ENOMEM;
	89	+
91	90	spin_lock_bh(&mm->page_table_lock);
92		− if (mm->context.asce_limit < limit) {
93		− pgd = (unsigned long *) mm->pgd;
94		− if (mm->context.asce_limit <= (1UL << 31)) {
95		− entry = _REGION3_ENTRY_EMPTY;
96		− mm->context.asce_limit = 1UL << 42;
97		− mm->context.asce_bits = _ASCE_TABLE_LENGTH \|
98		− _ASCE_USER_BITS \|
99		− _ASCE_TYPE_REGION3;
100		− } else {
101		− entry = _REGION2_ENTRY_EMPTY;
102		− mm->context.asce_limit = 1UL << 53;
103		− mm->context.asce_bits = _ASCE_TABLE_LENGTH \|
104		− _ASCE_USER_BITS \|
105		− _ASCE_TYPE_REGION2;
106		− }
107		− crst_table_init(table, entry);
108		− pgd_populate(mm, (pgd_t ) table, (pud_t ) pgd);
109		− mm->pgd = (pgd_t *) table;
110		− mm->task_size = mm->context.asce_limit;
111		− table = NULL;
112		− flush = 1;
113		− }
	91	+ pgd = (unsigned long *) mm->pgd;
	92	+ crst_table_init(table, _REGION2_ENTRY_EMPTY);
	93	+ pgd_populate(mm, (pgd_t ) table, (pud_t ) pgd);
	94	+ mm->pgd = (pgd_t *) table;
	95	+ mm->context.asce_limit = 1UL << 53;
	96	+ mm->context.asce = __pa(mm->pgd) \| _ASCE_TABLE_LENGTH \|
	97	+ _ASCE_USER_BITS \| _ASCE_TYPE_REGION2;
	98	+ mm->task_size = mm->context.asce_limit;
114	99	spin_unlock_bh(&mm->page_table_lock);
115		− if (table)
116		− crst_table_free(mm, table);
117		− if (mm->context.asce_limit < limit)
118		− goto repeat;
119		− if (flush)
120		− on_each_cpu(__crst_table_upgrade, mm, 0);
	100	+
	101	+ on_each_cpu(__crst_table_upgrade, mm, 0);
121	102	return 0;
122	103	}
123	104
124		−void crst_table_downgrade(struct mm_struct *mm, unsigned long limit)
	105	+void crst_table_downgrade(struct mm_struct *mm)
125	106	{
126	107	pgd_t *pgd;
127	108
	109	+ /* downgrade should only happen from 3 to 2 levels (compat only) */
	110	+ BUG_ON(mm->context.asce_limit != (1UL << 42));
	111	+
128	112	if (current->active_mm == mm) {
129	113	clear_user_asce();
130	114	__tlb_flush_mm(mm);
131	115	}
132		− while (mm->context.asce_limit > limit) {
133		− pgd = mm->pgd;
134		− switch (pgd_val(*pgd) & _REGION_ENTRY_TYPE_MASK) {
135		− case _REGION_ENTRY_TYPE_R2:
136		− mm->context.asce_limit = 1UL << 42;
137		− mm->context.asce_bits = _ASCE_TABLE_LENGTH \|
138		− _ASCE_USER_BITS \|
139		− _ASCE_TYPE_REGION3;
140		− break;
141		− case _REGION_ENTRY_TYPE_R3:
142		− mm->context.asce_limit = 1UL << 31;
143		− mm->context.asce_bits = _ASCE_TABLE_LENGTH \|
144		− _ASCE_USER_BITS \|
145		− _ASCE_TYPE_SEGMENT;
146		− break;
147		− default:
148		− BUG();
149		− }
150		− mm->pgd = (pgd_t ) (pgd_val(pgd) & _REGION_ENTRY_ORIGIN);
151		− mm->task_size = mm->context.asce_limit;
152		− crst_table_free(mm, (unsigned long *) pgd);
153		− }
	116	+
	117	+ pgd = mm->pgd;
	118	+ mm->pgd = (pgd_t ) (pgd_val(pgd) & _REGION_ENTRY_ORIGIN);
	119	+ mm->context.asce_limit = 1UL << 31;
	120	+ mm->context.asce = __pa(mm->pgd) \| _ASCE_TABLE_LENGTH \|
	121	+ _ASCE_USER_BITS \| _ASCE_TYPE_SEGMENT;
	122	+ mm->task_size = mm->context.asce_limit;
	123	+ crst_table_free(mm, (unsigned long *) pgd);
	124	+
154	125	if (current->active_mm == mm)
155	126	set_user_asce(mm);
156	127	}

arch/s390/pci/pci_dma.c+10−6

@@ -457,7 +457,7 @@ int zpci_dma_init_device(struct zpci_dev *zdev) · 456 unmodified lines
457	457	zdev->dma_table = dma_alloc_cpu_table();
458	458	if (!zdev->dma_table) {
459	459	rc = -ENOMEM;
460		− goto out_clean;
	460	+ goto out;
461	461	}
462	462
463	463	/*
@@ -477,18 +477,22 @@ int zpci_dma_init_device(struct zpci_dev *zdev) · 13 unmodified lines
477	477	zdev->iommu_bitmap = vzalloc(zdev->iommu_pages / 8);
478	478	if (!zdev->iommu_bitmap) {
479	479	rc = -ENOMEM;
480		− goto out_reg;
	480	+ goto free_dma_table;
481	481	}
482	482
483	483	rc = zpci_register_ioat(zdev, 0, zdev->start_dma, zdev->end_dma,
484	484	(u64) zdev->dma_table);
485	485	if (rc)
486		− goto out_reg;
487		− return 0;
	486	+ goto free_bitmap;
488	487
489		−out_reg:
	488	+ return 0;
	489	+free_bitmap:
	490	+ vfree(zdev->iommu_bitmap);
	491	+ zdev->iommu_bitmap = NULL;
	492	+free_dma_table:
490	493	dma_free_cpu_table(zdev->dma_table);
491		−out_clean:
	494	+ zdev->dma_table = NULL;
	495	+out:
492	496	return rc;
493	497	}
494	498

arch/x86/events/amd/core.c+1−1

@@ -115,7 +115,7 @@ static __initconst const u64 amd_hw_cache_event_ids · 114 unmodified lines
115	115	/*
116	116	* AMD Performance Monitor K7 and later.
117	117	*/
118		−static const u64 amd_perfmon_event_map[] =
	118	+static const u64 amd_perfmon_event_map[PERF_COUNT_HW_MAX] =
119	119	{
120	120	[PERF_COUNT_HW_CPU_CYCLES] = 0x0076,
121	121	[PERF_COUNT_HW_INSTRUCTIONS] = 0x00c0,

arch/x86/events/intel/core.c+1−0

@@ -3639,6 +3639,7 @@ __init int intel_pmu_init(void) · 3638 unmodified lines
3639	3639
3640	3640	case 78: /* 14nm Skylake Mobile */
3641	3641	case 94: /* 14nm Skylake Desktop */
	3642	+ case 85: /* 14nm Skylake Server */
3642	3643	x86_pmu.late_ack = true;
3643	3644	memcpy(hw_cache_event_ids, skl_hw_cache_event_ids, sizeof(hw_cache_event_ids));
3644	3645	memcpy(hw_cache_extra_regs, skl_hw_cache_extra_regs, sizeof(hw_cache_extra_regs));

arch/x86/events/intel/lbr.c+4−2

@@ -63,7 +63,7 @@ static enum { · 62 unmodified lines
63	63
64	64	#define LBR_PLM (LBR_KERNEL \| LBR_USER)
65	65
66		−#define LBR_SEL_MASK 0x1ff /* valid bits in LBR_SELECT */
	66	+#define LBR_SEL_MASK 0x3ff /* valid bits in LBR_SELECT */
67	67	#define LBR_NOT_SUPP -1 /* LBR filter not supported */
68	68	#define LBR_IGN 0 /* ignored */
69	69
@@ -610,8 +610,10 @@ static int intel_pmu_setup_hw_lbr_filter(struct perf_event *event) · 540 unmodified lines
610	610	* The first 9 bits (LBR_SEL_MASK) in LBR_SELECT operate
611	611	* in suppress mode. So LBR_SELECT should be set to
612	612	* (~mask & LBR_SEL_MASK) \| (mask & ~LBR_SEL_MASK)
	613	+ * But the 10th bit LBR_CALL_STACK does not operate
	614	+ * in suppress mode.
613	615	*/
614		− reg->config = mask ^ x86_pmu.lbr_sel_mask;
	616	+ reg->config = mask ^ (x86_pmu.lbr_sel_mask & ~LBR_CALL_STACK);
615	617
616	618	if ((br_type & PERF_SAMPLE_BRANCH_NO_CYCLES) &&
617	619	(br_type & PERF_SAMPLE_BRANCH_NO_FLAGS) &&

arch/x86/events/intel/pt.c+64−11

@@ -136,9 +136,21 @@ static int __init pt_pmu_hw_init(void) · 135 unmodified lines
136	136	struct dev_ext_attribute *de_attrs;
137	137	struct attribute **attrs;
138	138	size_t size;
	139	+ u64 reg;
139	140	int ret;
140	141	long i;
141	142
	143	+ if (boot_cpu_has(X86_FEATURE_VMX)) {
	144	+ /*
	145	+ * Intel SDM, 36.5 "Tracing post-VMXON" says that
	146	+ * "IA32_VMX_MISC[bit 14]" being 1 means PT can trace
	147	+ * post-VMXON.
	148	+ */
	149	+ rdmsrl(MSR_IA32_VMX_MISC, reg);
	150	+ if (reg & BIT(14))
	151	+ pt_pmu.vmx = true;
	152	+ }
	153	+
142	154	attrs = NULL;
143	155
144	156	for (i = 0; i < PT_CPUID_LEAVES; i++) {
@@ -269,20 +281,23 @@ static void pt_config(struct perf_event *event) · 124 unmodified lines
269	281
270	282	reg \|= (event->attr.config & PT_CONFIG_MASK);
271	283
	284	+ event->hw.config = reg;
272	285	wrmsrl(MSR_IA32_RTIT_CTL, reg);
273	286	}
274	287
275		−static void pt_config_start(bool start)
	288	+static void pt_config_stop(struct perf_event *event)
276	289	{
277		− u64 ctl;
	290	+ u64 ctl = READ_ONCE(event->hw.config);
	291	+
	292	+ /* may be already stopped by a PMI */
	293	+ if (!(ctl & RTIT_CTL_TRACEEN))
	294	+ return;
278	295
279		− rdmsrl(MSR_IA32_RTIT_CTL, ctl);
280		− if (start)
281		− ctl \|= RTIT_CTL_TRACEEN;
282		− else
283		− ctl &= ~RTIT_CTL_TRACEEN;
	296	+ ctl &= ~RTIT_CTL_TRACEEN;
284	297	wrmsrl(MSR_IA32_RTIT_CTL, ctl);
285	298
	299	+ WRITE_ONCE(event->hw.config, ctl);
	300	+
286	301	/*
287	302	* A wrmsr that disables trace generation serializes other PT
288	303	* registers and causes all data packets to be written to memory,
@@ -291,8 +306,7 @@ static void pt_config_start(bool start) · 2 unmodified lines
291	306	* The below WMB, separating data store and aux_head store matches
292	307	* the consumer's RMB that separates aux_head load and data load.
293	308	*/
294		− if (!start)
295		− wmb();
	309	+ wmb();
296	310	}
297	311
298	312	static void pt_config_buffer(void *buf, unsigned int topa_idx,
@@ -942,11 +956,17 @@ void intel_pt_interrupt(void) · 643 unmodified lines
942	956	if (!ACCESS_ONCE(pt->handle_nmi))
943	957	return;
944	958
945		− pt_config_start(false);
	959	+ /*
	960	+ * If VMX is on and PT does not support it, don't touch anything.
	961	+ */
	962	+ if (READ_ONCE(pt->vmx_on))
	963	+ return;
946	964
947	965	if (!event)
948	966	return;
949	967
	968	+ pt_config_stop(event);
	969	+
950	970	buf = perf_get_aux(&pt->handle);
951	971	if (!buf)
952	972	return;
@@ -983,6 +1003,35 @@ void intel_pt_interrupt(void) · 30 unmodified lines
983	1003	}
984	1004	}
985	1005
	1006	+void intel_pt_handle_vmx(int on)
	1007	+{
	1008	+ struct pt *pt = this_cpu_ptr(&pt_ctx);
	1009	+ struct perf_event *event;
	1010	+ unsigned long flags;
	1011	+
	1012	+ /* PT plays nice with VMX, do nothing */
	1013	+ if (pt_pmu.vmx)
	1014	+ return;
	1015	+
	1016	+ /*
	1017	+ * VMXON will clear RTIT_CTL.TraceEn; we need to make
	1018	+ * sure to not try to set it while VMX is on. Disable
	1019	+ * interrupts to avoid racing with pmu callbacks;
	1020	+ * concurrent PMI should be handled fine.
	1021	+ */
	1022	+ local_irq_save(flags);
	1023	+ WRITE_ONCE(pt->vmx_on, on);
	1024	+
	1025	+ if (on) {
	1026	+ /* prevent pt_config_stop() from writing RTIT_CTL */
	1027	+ event = pt->handle.event;
	1028	+ if (event)
	1029	+ event->hw.config = 0;
	1030	+ }
	1031	+ local_irq_restore(flags);
	1032	+}
	1033	+EXPORT_SYMBOL_GPL(intel_pt_handle_vmx);
	1034	+
986	1035	/*
987	1036	* PMU callbacks
988	1037	*/
@@ -992,6 +1041,9 @@ static void pt_event_start(struct perf_event *event, int mode) · 3 unmodified lines
992	1041	struct pt *pt = this_cpu_ptr(&pt_ctx);
993	1042	struct pt_buffer *buf = perf_get_aux(&pt->handle);
994	1043
	1044	+ if (READ_ONCE(pt->vmx_on))
	1045	+ return;
	1046	+
995	1047	if (!buf \|\| pt_buffer_is_full(buf, pt)) {
996	1048	event->hw.state = PERF_HES_STOPPED;
997	1049	return;
@@ -1014,7 +1066,8 @@ static void pt_event_stop(struct perf_event *event, int mode) · 16 unmodified lines
1014	1066	* see comment in intel_pt_interrupt().
1015	1067	*/
1016	1068	ACCESS_ONCE(pt->handle_nmi) = 0;
1017		− pt_config_start(false);
	1069	+
	1070	+ pt_config_stop(event);
1018	1071
1019	1072	if (event->hw.state == PERF_HES_STOPPED)
1020	1073	return;

arch/x86/events/intel/pt.h+3−0

@@ -65,6 +65,7 @@ enum pt_capabilities { · 64 unmodified lines
65	65	struct pt_pmu {
66	66	struct pmu pmu;
67	67	u32 caps[PT_CPUID_REGS_NUM * PT_CPUID_LEAVES];
	68	+ bool vmx;
68	69	};
69	70
70	71	/**
@@ -107,10 +108,12 @@ struct pt_buffer { · 36 unmodified lines
107	108	* struct pt - per-cpu pt context
108	109	* @handle: perf output handle
109	110	* @handle_nmi: do handle PT PMI on this cpu, there's an active event
	111	+ * @vmx_on: 1 if VMX is ON on this cpu
110	112	*/
111	113	struct pt {
112	114	struct perf_output_handle handle;
113	115	int handle_nmi;
	116	+ int vmx_on;
114	117	};
115	118
116	119	#endif /* __INTEL_PT_H__ */

arch/x86/events/intel/rapl.c+1−0

@@ -718,6 +718,7 @@ static int __init rapl_pmu_init(void) · 717 unmodified lines
718	718	break;
719	719	case 60: /* Haswell */
720	720	case 69: /* Haswell-Celeron */
	721	+ case 70: /* Haswell GT3e */
721	722	case 61: /* Broadwell */
722	723	case 71: /* Broadwell-H */
723	724	rapl_cntr_mask = RAPL_IDX_HSW;

arch/x86/include/asm/perf_event.h+4−0

@@ -285,6 +285,10 @@ static inline void perf_events_lapic_init(void) { } · 284 unmodified lines
285	285	static inline void perf_check_microcode(void) { }
286	286	#endif
287	287
	288	+#ifdef CONFIG_CPU_SUP_INTEL
	289	+ extern void intel_pt_handle_vmx(int on);
	290	+#endif
	291	+
288	292	#if defined(CONFIG_PERF_EVENTS) && defined(CONFIG_CPU_SUP_AMD)
289	293	extern void amd_pmu_enable_virt(void);
290	294	extern void amd_pmu_disable_virt(void);

arch/x86/kernel/apic/vector.c+2−1

@@ -256,7 +256,8 @@ static void clear_irq_vector(int irq, struct apic_chip_data *data) · 255 unmodified lines
256	256	struct irq_desc *desc;
257	257	int cpu, vector;
258	258
259		− BUG_ON(!data->cfg.vector);
	259	+ if (!data->cfg.vector)
	260	+ return;
260	261
261	262	vector = data->cfg.vector;
262	263	for_each_cpu_and(cpu, data->domain, cpu_online_mask)

arch/x86/kernel/head_32.S+0−6

@@ -389,12 +389,6 @@ default_entry: · 388 unmodified lines
389	389	/* Make changes effective */
390	390	wrmsr
391	391
392		− /*
393		− * And make sure that all the mappings we set up have NX set from
394		− * the beginning.
395		− */
396		− orl $(1 << (_PAGE_BIT_NX - 32)), pa(__supported_pte_mask + 4)
397		−
398	392	enable_paging:
399	393
400	394	/*

arch/x86/kvm/vmx.c+4−0

@@ -3103,6 +3103,8 @@ static __init int vmx_disabled_by_bios(void) · 3102 unmodified lines
3103	3103
3104	3104	static void kvm_cpu_vmxon(u64 addr)
3105	3105	{
	3106	+ intel_pt_handle_vmx(1);
	3107	+
3106	3108	asm volatile (ASM_VMX_VMXON_RAX
3107	3109	: : "a"(&addr), "m"(addr)
3108	3110	: "memory", "cc");
@@ -3172,6 +3174,8 @@ static void vmclear_local_loaded_vmcss(void) · 63 unmodified lines
3172	3174	static void kvm_cpu_vmxoff(void)
3173	3175	{
3174	3176	asm volatile (__ex(ASM_VMX_VMXOFF) : : : "cc");
	3177	+
	3178	+ intel_pt_handle_vmx(0);
3175	3179	}
3176	3180
3177	3181	static void hardware_disable(void)

arch/x86/mm/setup_nx.c+3−2

@@ -32,8 +32,9 @@ early_param("noexec", noexec_setup); · 31 unmodified lines
32	32
33	33	void x86_configure_nx(void)
34	34	{
35		− /* If disable_nx is set, clear NX on all new mappings going forward. */
36		− if (disable_nx)
	35	+ if (boot_cpu_has(X86_FEATURE_NX) && !disable_nx)
	36	+ __supported_pte_mask \|= _PAGE_NX;
	37	+ else
37	38	__supported_pte_mask &= ~_PAGE_NX;
38	39	}
39	40

arch/x86/xen/spinlock.c+6−0

@@ -27,6 +27,12 @@ static bool xen_pvspin = true; · 26 unmodified lines
27	27
28	28	static void xen_qlock_kick(int cpu)
29	29	{
	30	+ int irq = per_cpu(lock_kicker_irq, cpu);
	31	+
	32	+ /* Don't kick if the target's kicker interrupt is not initialized. */
	33	+ if (irq == -1)
	34	+ return;
	35	+
30	36	xen_send_IPI_one(cpu, XEN_SPIN_UNLOCK_VECTOR);
31	37	}
32	38

drivers/block/rbd.c+25−27

@@ -538,7 +538,6 @@ static int _rbd_dev_v2_snap_size(struct rbd_device *rbd_dev, u64 snap_id, · 537 unmodified lines
538	538	u8 order, u64 snap_size);
539	539	static int _rbd_dev_v2_snap_features(struct rbd_device *rbd_dev, u64 snap_id,
540	540	u64 *snap_features);
541		−static u64 rbd_snap_id_by_name(struct rbd_device rbd_dev, const char name);
542	541
543	542	static int rbd_open(struct block_device *bdev, fmode_t mode)
544	543	{
@@ -3127,9 +3126,6 @@ static void rbd_watch_cb(u64 ver, u64 notify_id, u8 opcode, void *data) · 2582 unmodified lines
3127	3126	struct rbd_device rbd_dev = (struct rbd_device )data;
3128	3127	int ret;
3129	3128
3130		− if (!rbd_dev)
3131		− return;
3132		−
3133	3129	dout("%s: \"%s\" notify_id %llu opcode %u\n", __func__,
3134	3130	rbd_dev->header_name, (unsigned long long)notify_id,
3135	3131	(unsigned int)opcode);
@@ -3263,6 +3259,9 @@ static void rbd_dev_header_unwatch_sync(struct rbd_device *rbd_dev) · 127 unmodified lines
3263	3259
3264	3260	ceph_osdc_cancel_event(rbd_dev->watch_event);
3265	3261	rbd_dev->watch_event = NULL;
	3262	+
	3263	+ dout("%s flushing notifies\n", __func__);
	3264	+ ceph_osdc_flush_notifies(&rbd_dev->rbd_client->client->osdc);
3266	3265	}
3267	3266
3268	3267	/*
@@ -3642,21 +3641,14 @@ static void rbd_exists_validate(struct rbd_device *rbd_dev) · 373 unmodified lines
3642	3641	static void rbd_dev_update_size(struct rbd_device *rbd_dev)
3643	3642	{
3644	3643	sector_t size;
3645		− bool removing;
3646	3644
3647	3645	/*
3648		− * Don't hold the lock while doing disk operations,
3649		− * or lock ordering will conflict with the bdev mutex via:
3650		− * rbd_add() -> blkdev_get() -> rbd_open()
	3646	+ * If EXISTS is not set, rbd_dev->disk may be NULL, so don't
	3647	+ * try to update its size. If REMOVING is set, updating size
	3648	+ * is just useless work since the device can't be opened.
3651	3649	*/
3652		− spin_lock_irq(&rbd_dev->lock);
3653		− removing = test_bit(RBD_DEV_FLAG_REMOVING, &rbd_dev->flags);
3654		− spin_unlock_irq(&rbd_dev->lock);
3655		− /*
3656		− * If the device is being removed, rbd_dev->disk has
3657		− * been destroyed, so don't try to update its size
3658		− */
3659		− if (!removing) {
	3650	+ if (test_bit(RBD_DEV_FLAG_EXISTS, &rbd_dev->flags) &&
	3651	+ !test_bit(RBD_DEV_FLAG_REMOVING, &rbd_dev->flags)) {
3660	3652	size = (sector_t)rbd_dev->mapping.size / SECTOR_SIZE;
3661	3653	dout("setting size to %llu sectors", (unsigned long long)size);
3662	3654	set_capacity(rbd_dev->disk, size);
@@ -4191,7 +4183,7 @@ static int _rbd_dev_v2_snap_features(struct rbd_device *rbd_dev, u64 snap_id, · 528 unmodified lines
4191	4183	__le64 features;
4192	4184	__le64 incompat;
4193	4185	} __attribute__ ((packed)) features_buf = { 0 };
4194		− u64 incompat;
	4186	+ u64 unsup;
4195	4187	int ret;
4196	4188
4197	4189	ret = rbd_obj_method_sync(rbd_dev, rbd_dev->header_name,
@@ -4204,9 +4196,12 @@ static int _rbd_dev_v2_snap_features(struct rbd_device *rbd_dev, u64 snap_id, · 6 unmodified lines
4204	4196	if (ret < sizeof (features_buf))
4205	4197	return -ERANGE;
4206	4198
4207		− incompat = le64_to_cpu(features_buf.incompat);
4208		− if (incompat & ~RBD_FEATURES_SUPPORTED)
	4199	+ unsup = le64_to_cpu(features_buf.incompat) & ~RBD_FEATURES_SUPPORTED;
	4200	+ if (unsup) {
	4201	+ rbd_warn(rbd_dev, "image uses unsupported features: 0x%llx",
	4202	+ unsup);
4209	4203	return -ENXIO;
	4204	+ }
4210	4205
4211	4206	*snap_features = le64_to_cpu(features_buf.features);
4212	4207
@@ -5187,6 +5182,10 @@ out_err: · 974 unmodified lines
5187	5182	return ret;
5188	5183	}
5189	5184
	5185	+/*
	5186	+ * rbd_dev->header_rwsem must be locked for write and will be unlocked
	5187	+ * upon return.
	5188	+ */
5190	5189	static int rbd_dev_device_setup(struct rbd_device *rbd_dev)
5191	5190	{
5192	5191	int ret;
@@ -5195,7 +5194,7 @@ static int rbd_dev_device_setup(struct rbd_device *rbd_dev) · 2 unmodified lines
5195	5194
5196	5195	ret = rbd_dev_id_get(rbd_dev);
5197	5196	if (ret)
5198		− return ret;
	5197	+ goto err_out_unlock;
5199	5198
5200	5199	BUILD_BUG_ON(DEV_NAME_LEN
5201	5200	< sizeof (RBD_DRV_NAME) + MAX_INT_FORMAT_WIDTH);
@@ -5236,8 +5235,9 @@ static int rbd_dev_device_setup(struct rbd_device *rbd_dev) · 34 unmodified lines
5236	5235	/* Everything's ready. Announce the disk to the world. */
5237	5236
5238	5237	set_bit(RBD_DEV_FLAG_EXISTS, &rbd_dev->flags);
5239		− add_disk(rbd_dev->disk);
	5238	+ up_write(&rbd_dev->header_rwsem);
5240	5239
	5240	+ add_disk(rbd_dev->disk);
5241	5241	pr_info("%s: added with size 0x%llx\n", rbd_dev->disk->disk_name,
5242	5242	(unsigned long long) rbd_dev->mapping.size);
5243	5243
@@ -5252,6 +5252,8 @@ err_out_blkdev: · 8 unmodified lines
5252	5252	unregister_blkdev(rbd_dev->major, rbd_dev->name);
5253	5253	err_out_id:
5254	5254	rbd_dev_id_put(rbd_dev);
	5255	+err_out_unlock:
	5256	+ up_write(&rbd_dev->header_rwsem);
5255	5257	return ret;
5256	5258	}
5257	5259
@@ -5442,6 +5444,7 @@ static ssize_t do_rbd_add(struct bus_type *bus, · 184 unmodified lines
5442	5444	spec = NULL; /* rbd_dev now owns this */
5443	5445	rbd_opts = NULL; /* rbd_dev now owns this */
5444	5446
	5447	+ down_write(&rbd_dev->header_rwsem);
5445	5448	rc = rbd_dev_image_probe(rbd_dev, 0);
5446	5449	if (rc < 0)
5447	5450	goto err_out_rbd_dev;
@@ -5471,6 +5474,7 @@ out: · 23 unmodified lines
5471	5474	return rc;
5472	5475
5473	5476	err_out_rbd_dev:
	5477	+ up_write(&rbd_dev->header_rwsem);
5474	5478	rbd_dev_destroy(rbd_dev);
5475	5479	err_out_client:
5476	5480	rbd_put_client(rbdc);
@@ -5577,12 +5581,6 @@ static ssize_t do_rbd_remove(struct bus_type *bus, · 100 unmodified lines
5577	5581	return ret;
5578	5582
5579	5583	rbd_dev_header_unwatch_sync(rbd_dev);
5580		− /*
5581		− * flush remaining watch callbacks - these must be complete
5582		− * before the osd_client is shutdown
5583		− */
5584		− dout("%s: flushing notifies", __func__);
5585		− ceph_osdc_flush_notifies(&rbd_dev->rbd_client->client->osdc);
5586	5584
5587	5585	/*
5588	5586	* Don't free anything from rbd_dev->disk until after all

drivers/cpufreq/cpufreq_governor.c+2−6

@@ -193,12 +193,8 @@ unsigned int dbs_update(struct cpufreq_policy *policy) · 192 unmodified lines
193	193	wall_time = cur_wall_time - j_cdbs->prev_cpu_wall;
194	194	j_cdbs->prev_cpu_wall = cur_wall_time;
195	195
196		− if (cur_idle_time <= j_cdbs->prev_cpu_idle) {
197		− idle_time = 0;
198		− } else {
199		− idle_time = cur_idle_time - j_cdbs->prev_cpu_idle;
200		− j_cdbs->prev_cpu_idle = cur_idle_time;
201		− }
	196	+ idle_time = cur_idle_time - j_cdbs->prev_cpu_idle;
	197	+ j_cdbs->prev_cpu_idle = cur_idle_time;
202	198
203	199	if (ignore_nice) {
204	200	u64 cur_nice = kcpustat_cpu(j).cpustat[CPUTIME_NICE];

drivers/cpufreq/intel_pstate.c+5−0

@@ -813,6 +813,11 @@ static int core_get_max_pstate(void) · 812 unmodified lines
813	813	if (err)
814	814	goto skip_tar;
815	815
	816	+ /* For level 1 and 2, bits[23:16] contain the ratio */
	817	+ if (tdp_ctrl)
	818	+ tdp_ratio >>= 16;
	819	+
	820	+ tdp_ratio &= 0xff; /* ratios are only 8 bits long */
816	821	if (tdp_ratio - 1 == tar) {
817	822	max_pstate = tar;
818	823	pr_debug("max_pstate=TAC %x\n", max_pstate);

drivers/crypto/talitos.c+57−30

@@ -63,6 +63,14 @@ static void to_talitos_ptr(struct talitos_ptr *ptr, dma_addr_t dma_addr, · 62 unmodified lines
63	63	ptr->eptr = upper_32_bits(dma_addr);
64	64	}
65	65
	66	+static void copy_talitos_ptr(struct talitos_ptr *dst_ptr,
	67	+ struct talitos_ptr *src_ptr, bool is_sec1)
	68	+{
	69	+ dst_ptr->ptr = src_ptr->ptr;
	70	+ if (!is_sec1)
	71	+ dst_ptr->eptr = src_ptr->eptr;
	72	+}
	73	+
66	74	static void to_talitos_ptr_len(struct talitos_ptr *ptr, unsigned int len,
67	75	bool is_sec1)
68	76	{
@@ -1083,21 +1091,20 @@ static int ipsec_esp(struct talitos_edesc edesc, struct aead_request areq, · 1014 unmodified lines
1083	1091	sg_count = dma_map_sg(dev, areq->src, edesc->src_nents ?: 1,
1084	1092	(areq->src == areq->dst) ? DMA_BIDIRECTIONAL
1085	1093	: DMA_TO_DEVICE);
1086		−
1087	1094	/* hmac data */
1088	1095	desc->ptr[1].len = cpu_to_be16(areq->assoclen);
1089	1096	if (sg_count > 1 &&
1090	1097	(ret = sg_to_link_tbl_offset(areq->src, sg_count, 0,
1091	1098	areq->assoclen,
1092	1099	&edesc->link_tbl[tbl_off])) > 1) {
1093		− tbl_off += ret;
1094		−
1095	1100	to_talitos_ptr(&desc->ptr[1], edesc->dma_link_tbl + tbl_off *
1096	1101	sizeof(struct talitos_ptr), 0);
1097	1102	desc->ptr[1].j_extent = DESC_PTR_LNKTBL_JUMP;
1098	1103
1099	1104	dma_sync_single_for_device(dev, edesc->dma_link_tbl,
1100	1105	edesc->dma_len, DMA_BIDIRECTIONAL);
	1106	+
	1107	+ tbl_off += ret;
1101	1108	} else {
1102	1109	to_talitos_ptr(&desc->ptr[1], sg_dma_address(areq->src), 0);
1103	1110	desc->ptr[1].j_extent = 0;
@@ -1126,11 +1133,13 @@ static int ipsec_esp(struct talitos_edesc edesc, struct aead_request areq, · 22 unmodified lines
1126	1133	if (edesc->desc.hdr & DESC_HDR_MODE1_MDEU_CICV)
1127	1134	sg_link_tbl_len += authsize;
1128	1135
1129		− if (sg_count > 1 &&
1130		− (ret = sg_to_link_tbl_offset(areq->src, sg_count, areq->assoclen,
1131		− sg_link_tbl_len,
1132		− &edesc->link_tbl[tbl_off])) > 1) {
1133		− tbl_off += ret;
	1136	+ if (sg_count == 1) {
	1137	+ to_talitos_ptr(&desc->ptr[4], sg_dma_address(areq->src) +
	1138	+ areq->assoclen, 0);
	1139	+ } else if ((ret = sg_to_link_tbl_offset(areq->src, sg_count,
	1140	+ areq->assoclen, sg_link_tbl_len,
	1141	+ &edesc->link_tbl[tbl_off])) >
	1142	+ 1) {
1134	1143	desc->ptr[4].j_extent \|= DESC_PTR_LNKTBL_JUMP;
1135	1144	to_talitos_ptr(&desc->ptr[4], edesc->dma_link_tbl +
1136	1145	tbl_off *
@@ -1138,8 +1147,10 @@ static int ipsec_esp(struct talitos_edesc edesc, struct aead_request areq, · 1 unmodified line
1138	1147	dma_sync_single_for_device(dev, edesc->dma_link_tbl,
1139	1148	edesc->dma_len,
1140	1149	DMA_BIDIRECTIONAL);
1141		− } else
1142		− to_talitos_ptr(&desc->ptr[4], sg_dma_address(areq->src), 0);
	1150	+ tbl_off += ret;
	1151	+ } else {
	1152	+ copy_talitos_ptr(&desc->ptr[4], &edesc->link_tbl[tbl_off], 0);
	1153	+ }
1143	1154
1144	1155	/* cipher out */
1145	1156	desc->ptr[5].len = cpu_to_be16(cryptlen);
@@ -1151,11 +1162,13 @@ static int ipsec_esp(struct talitos_edesc edesc, struct aead_request areq, · 5 unmodified lines
1151	1162
1152	1163	edesc->icv_ool = false;
1153	1164
1154		− if (sg_count > 1 &&
1155		− (sg_count = sg_to_link_tbl_offset(areq->dst, sg_count,
	1165	+ if (sg_count == 1) {
	1166	+ to_talitos_ptr(&desc->ptr[5], sg_dma_address(areq->dst) +
	1167	+ areq->assoclen, 0);
	1168	+ } else if ((sg_count =
	1169	+ sg_to_link_tbl_offset(areq->dst, sg_count,
1156	1170	areq->assoclen, cryptlen,
1157		− &edesc->link_tbl[tbl_off])) >
1158		− 1) {
	1171	+ &edesc->link_tbl[tbl_off])) > 1) {
1159	1172	struct talitos_ptr *tbl_ptr = &edesc->link_tbl[tbl_off];
1160	1173
1161	1174	to_talitos_ptr(&desc->ptr[5], edesc->dma_link_tbl +
@@ -1178,8 +1191,9 @@ static int ipsec_esp(struct talitos_edesc edesc, struct aead_request areq, · 16 unmodified lines
1178	1191	edesc->dma_len, DMA_BIDIRECTIONAL);
1179	1192
1180	1193	edesc->icv_ool = true;
1181		− } else
1182		− to_talitos_ptr(&desc->ptr[5], sg_dma_address(areq->dst), 0);
	1194	+ } else {
	1195	+ copy_talitos_ptr(&desc->ptr[5], &edesc->link_tbl[tbl_off], 0);
	1196	+ }
1183	1197
1184	1198	/* iv out */
1185	1199	map_single_talitos_ptr(dev, &desc->ptr[6], ivsize, ctx->iv,
@@ -2629,21 +2643,11 @@ struct talitos_crypto_alg { · 1443 unmodified lines
2629	2643	struct talitos_alg_template algt;
2630	2644	};
2631	2645
2632		−static int talitos_cra_init(struct crypto_tfm *tfm)
	2646	+static int talitos_init_common(struct talitos_ctx *ctx,
	2647	+ struct talitos_crypto_alg *talitos_alg)
2633	2648	{
2634		− struct crypto_alg *alg = tfm->__crt_alg;
2635		− struct talitos_crypto_alg *talitos_alg;
2636		− struct talitos_ctx *ctx = crypto_tfm_ctx(tfm);
2637	2649	struct talitos_private *priv;
2638	2650
2639		− if ((alg->cra_flags & CRYPTO_ALG_TYPE_MASK) == CRYPTO_ALG_TYPE_AHASH)
2640		− talitos_alg = container_of(__crypto_ahash_alg(alg),
2641		− struct talitos_crypto_alg,
2642		− algt.alg.hash);
2643		− else
2644		− talitos_alg = container_of(alg, struct talitos_crypto_alg,
2645		− algt.alg.crypto);
2646		−
2647	2651	/* update context with ptr to dev */
2648	2652	ctx->dev = talitos_alg->dev;
2649	2653
@@ -2661,10 +2665,33 @@ static int talitos_cra_init(struct crypto_tfm *tfm) · 11 unmodified lines
2661	2665	return 0;
2662	2666	}
2663	2667
	2668	+static int talitos_cra_init(struct crypto_tfm *tfm)
	2669	+{
	2670	+ struct crypto_alg *alg = tfm->__crt_alg;
	2671	+ struct talitos_crypto_alg *talitos_alg;
	2672	+ struct talitos_ctx *ctx = crypto_tfm_ctx(tfm);
	2673	+
	2674	+ if ((alg->cra_flags & CRYPTO_ALG_TYPE_MASK) == CRYPTO_ALG_TYPE_AHASH)
	2675	+ talitos_alg = container_of(__crypto_ahash_alg(alg),
	2676	+ struct talitos_crypto_alg,
	2677	+ algt.alg.hash);
	2678	+ else
	2679	+ talitos_alg = container_of(alg, struct talitos_crypto_alg,
	2680	+ algt.alg.crypto);
	2681	+
	2682	+ return talitos_init_common(ctx, talitos_alg);
	2683	+}
	2684	+
2664	2685	static int talitos_cra_init_aead(struct crypto_aead *tfm)
2665	2686	{
2666		− talitos_cra_init(crypto_aead_tfm(tfm));
2667		− return 0;
	2687	+ struct aead_alg *alg = crypto_aead_alg(tfm);
	2688	+ struct talitos_crypto_alg *talitos_alg;
	2689	+ struct talitos_ctx *ctx = crypto_aead_ctx(tfm);
	2690	+
	2691	+ talitos_alg = container_of(alg, struct talitos_crypto_alg,
	2692	+ algt.alg.aead);
	2693	+
	2694	+ return talitos_init_common(ctx, talitos_alg);
2668	2695	}
2669	2696
2670	2697	static int talitos_cra_init_ahash(struct crypto_tfm *tfm)

drivers/edac/i7core_edac.c+1−1

@@ -1866,7 +1866,7 @@ static int i7core_mce_check_error(struct notifier_block *nb, unsigned long val, · 1865 unmodified lines
1866	1866
1867	1867	i7_dev = get_i7core_dev(mce->socketid);
1868	1868	if (!i7_dev)
1869		− return NOTIFY_BAD;
	1869	+ return NOTIFY_DONE;
1870	1870
1871	1871	mci = i7_dev->mci;
1872	1872	pvt = mci->pvt_info;

drivers/edac/sb_edac.c+1−1

@@ -3168,7 +3168,7 @@ static int sbridge_mce_check_error(struct notifier_block *nb, unsigned long val, · 3167 unmodified lines
3168	3168
3169	3169	mci = get_mci_for_node_id(mce->socketid);
3170	3170	if (!mci)
3171		− return NOTIFY_BAD;
	3171	+ return NOTIFY_DONE;
3172	3172	pvt = mci->pvt_info;
3173	3173
3174	3174	/*

drivers/firmware/efi/vars.c+26−11

@@ -202,29 +202,44 @@ static const struct variable_validate variable_validate[] = { · 201 unmodified lines
202	202	{ NULL_GUID, "", NULL },
203	203	};
204	204
	205	+/*
	206	+ * Check if @var_name matches the pattern given in @match_name.
	207	+ *
	208	+ * @var_name: an array of @len non-NUL characters.
	209	+ * @match_name: a NUL-terminated pattern string, optionally ending in "*". A
	210	+ * final "*" character matches any trailing characters @var_name,
	211	+ * including the case when there are none left in @var_name.
	212	+ * @match: on output, the number of non-wildcard characters in @match_name
	213	+ * that @var_name matches, regardless of the return value.
	214	+ * @return: whether @var_name fully matches @match_name.
	215	+ */
205	216	static bool
206	217	variable_matches(const char var_name, size_t len, const char match_name,
207	218	int *match)
208	219	{
209	220	for (match = 0; ; (match)++) {
210	221	char c = match_name[*match];
211		− char u = var_name[*match];
212	222
213		− /* Wildcard in the matching name means we've matched */
214		− if (c == '*')
	223	+ switch (c) {
	224	+ case '*':
	225	+ /* Wildcard in @match_name means we've matched. */
215	226	return true;
216	227
217		− /* Case sensitive match */
218		− if (!c && *match == len)
219		− return true;
	228	+ case '\0':
	229	+ /* @match_name has ended. Has @var_name too? */
	230	+ return (*match == len);
220	231
221		− if (c != u)
	232	+ default:
	233	+ /*
	234	+ * We've reached a non-wildcard char in @match_name.
	235	+ * Continue only if there's an identical character in
	236	+ * @var_name.
	237	+ */
	238	+ if (match < len && c == var_name[match])
	239	+ continue;
222	240	return false;
223		−
224		− if (!c)
225		− return true;
	241	+ }
226	242	}
227		− return true;
228	243	}
229	244
230	245	bool

drivers/firmware/psci.c+1−1

@@ -360,7 +360,7 @@ static struct cpuidle_ops psci_cpuidle_ops __initdata = { · 359 unmodified lines
360	360	.init = psci_dt_cpu_init_idle,
361	361	};
362	362
363		−CPUIDLE_METHOD_OF_DECLARE(psci, "arm,psci", &psci_cpuidle_ops);
	363	+CPUIDLE_METHOD_OF_DECLARE(psci, "psci", &psci_cpuidle_ops);
364	364	#endif
365	365	#endif
366	366

drivers/gpu/drm/amd/amdgpu/amdgpu_atpx_handler.c+7−4

@@ -63,10 +63,6 @@ bool amdgpu_has_atpx(void) { · 62 unmodified lines
63	63	return amdgpu_atpx_priv.atpx_detected;
64	64	}
65	65
66		−bool amdgpu_has_atpx_dgpu_power_cntl(void) {
67		− return amdgpu_atpx_priv.atpx.functions.power_cntl;
68		−}
69		−
70	66	/**
71	67	* amdgpu_atpx_call - call an ATPX method
72	68	*
@@ -146,6 +142,13 @@ static void amdgpu_atpx_parse_functions(struct amdgpu_atpx_functions *f, u32 mas · 73 unmodified lines
146	142	*/
147	143	static int amdgpu_atpx_validate(struct amdgpu_atpx *atpx)
148	144	{
	145	+ /* make sure required functions are enabled */
	146	+ /* dGPU power control is required */
	147	+ if (atpx->functions.power_cntl == false) {
	148	+ printk("ATPX dGPU power cntl not present, forcing\n");
	149	+ atpx->functions.power_cntl = true;
	150	+ }
	151	+
149	152	if (atpx->functions.px_params) {
150	153	union acpi_object *info;
151	154	struct atpx_px_params output;

drivers/gpu/drm/amd/amdgpu/amdgpu_device.c+1−7

@@ -62,12 +62,6 @@ static const char *amdgpu_asic_name[] = { · 61 unmodified lines
62	62	"LAST",
63	63	};
64	64
65		−#if defined(CONFIG_VGA_SWITCHEROO)
66		−bool amdgpu_has_atpx_dgpu_power_cntl(void);
67		−#else
68		−static inline bool amdgpu_has_atpx_dgpu_power_cntl(void) { return false; }
69		−#endif
70		−
71	65	bool amdgpu_device_is_px(struct drm_device *dev)
72	66	{
73	67	struct amdgpu_device *adev = dev->dev_private;
@@ -1485,7 +1479,7 @@ int amdgpu_device_init(struct amdgpu_device *adev, · 1411 unmodified lines
1485	1479
1486	1480	if (amdgpu_runtime_pm == 1)
1487	1481	runtime = true;
1488		− if (amdgpu_device_is_px(ddev) && amdgpu_has_atpx_dgpu_power_cntl())
	1482	+ if (amdgpu_device_is_px(ddev))
1489	1483	runtime = true;
1490	1484	vga_switcheroo_register_client(adev->pdev, &amdgpu_switcheroo_ops, runtime);
1491	1485	if (runtime)

drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c+4−1

@@ -910,7 +910,10 @@ static int gmc_v7_0_late_init(void *handle) · 909 unmodified lines
910	910	{
911	911	struct amdgpu_device adev = (struct amdgpu_device )handle;
912	912
913		− return amdgpu_irq_get(adev, &adev->mc.vm_fault, 0);
	913	+ if (amdgpu_vm_fault_stop != AMDGPU_VM_FAULT_STOP_ALWAYS)
	914	+ return amdgpu_irq_get(adev, &adev->mc.vm_fault, 0);
	915	+ else
	916	+ return 0;
914	917	}
915	918
916	919	static int gmc_v7_0_sw_init(void *handle)

drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c+4−1

@@ -870,7 +870,10 @@ static int gmc_v8_0_late_init(void *handle) · 869 unmodified lines
870	870	{
871	871	struct amdgpu_device adev = (struct amdgpu_device )handle;
872	872
873		− return amdgpu_irq_get(adev, &adev->mc.vm_fault, 0);
	873	+ if (amdgpu_vm_fault_stop != AMDGPU_VM_FAULT_STOP_ALWAYS)
	874	+ return amdgpu_irq_get(adev, &adev->mc.vm_fault, 0);
	875	+ else
	876	+ return 0;
874	877	}
875	878
876	879	#define mmMC_SEQ_MISC0_FIJI 0xA71

drivers/gpu/drm/drm_dp_mst_topology.c+20−0

@@ -1796,6 +1796,11 @@ int drm_dp_update_payload_part1(struct drm_dp_mst_topology_mgr *mgr) · 1795 unmodified lines
1796	1796	req_payload.start_slot = cur_slots;
1797	1797	if (mgr->proposed_vcpis[i]) {
1798	1798	port = container_of(mgr->proposed_vcpis[i], struct drm_dp_mst_port, vcpi);
	1799	+ port = drm_dp_get_validated_port_ref(mgr, port);
	1800	+ if (!port) {
	1801	+ mutex_unlock(&mgr->payload_lock);
	1802	+ return -EINVAL;
	1803	+ }
1799	1804	req_payload.num_slots = mgr->proposed_vcpis[i]->num_slots;
1800	1805	req_payload.vcpi = mgr->proposed_vcpis[i]->vcpi;
1801	1806	} else {
@@ -1823,6 +1828,9 @@ int drm_dp_update_payload_part1(struct drm_dp_mst_topology_mgr *mgr) · 21 unmodified lines
1823	1828	mgr->payloads[i].payload_state = req_payload.payload_state;
1824	1829	}
1825	1830	cur_slots += req_payload.num_slots;
	1831	+
	1832	+ if (port)
	1833	+ drm_dp_put_port(port);
1826	1834	}
1827	1835
1828	1836	for (i = 0; i < mgr->max_payloads; i++) {
@@ -2128,6 +2136,8 @@ int drm_dp_mst_topology_mgr_resume(struct drm_dp_mst_topology_mgr *mgr) · 299 unmodified lines
2128	2136
2129	2137	if (mgr->mst_primary) {
2130	2138	int sret;
	2139	+ u8 guid[16];
	2140	+
2131	2141	sret = drm_dp_dpcd_read(mgr->aux, DP_DPCD_REV, mgr->dpcd, DP_RECEIVER_CAP_SIZE);
2132	2142	if (sret != DP_RECEIVER_CAP_SIZE) {
2133	2143	DRM_DEBUG_KMS("dpcd read failed - undocked during suspend?\n");
@@ -2142,6 +2152,16 @@ int drm_dp_mst_topology_mgr_resume(struct drm_dp_mst_topology_mgr *mgr) · 8 unmodified lines
2142	2152	ret = -1;
2143	2153	goto out_unlock;
2144	2154	}
	2155	+
	2156	+ /* Some hubs forget their guids after they resume */
	2157	+ sret = drm_dp_dpcd_read(mgr->aux, DP_GUID, guid, 16);
	2158	+ if (sret != 16) {
	2159	+ DRM_DEBUG_KMS("dpcd read failed - undocked during suspend?\n");
	2160	+ ret = -1;
	2161	+ goto out_unlock;
	2162	+ }
	2163	+ drm_dp_check_mstb_guid(mgr->mst_primary, guid);
	2164	+
2145	2165	ret = 0;
2146	2166	} else
2147	2167	ret = -1;

drivers/gpu/drm/etnaviv/etnaviv_gpu.c+18−13

@@ -572,6 +572,24 @@ int etnaviv_gpu_init(struct etnaviv_gpu *gpu) · 571 unmodified lines
572	572	goto fail;
573	573	}
574	574
	575	+ /*
	576	+ * Set the GPU linear window to be at the end of the DMA window, where
	577	+ * the CMA area is likely to reside. This ensures that we are able to
	578	+ * map the command buffers while having the linear window overlap as
	579	+ * much RAM as possible, so we can optimize mappings for other buffers.
	580	+ *
	581	+ * For 3D cores only do this if MC2.0 is present, as with MC1.0 it leads
	582	+ * to different views of the memory on the individual engines.
	583	+ */
	584	+ if (!(gpu->identity.features & chipFeatures_PIPE_3D) \|\|
	585	+ (gpu->identity.minor_features0 & chipMinorFeatures0_MC20)) {
	586	+ u32 dma_mask = (u32)dma_get_required_mask(gpu->dev);
	587	+ if (dma_mask < PHYS_OFFSET + SZ_2G)
	588	+ gpu->memory_base = PHYS_OFFSET;
	589	+ else
	590	+ gpu->memory_base = dma_mask - SZ_2G + 1;
	591	+ }
	592	+
575	593	ret = etnaviv_hw_reset(gpu);
576	594	if (ret)
577	595	goto fail;
@@ -1566,7 +1584,6 @@ static int etnaviv_gpu_platform_probe(struct platform_device *pdev) · 988 unmodified lines
1566	1584	{
1567	1585	struct device *dev = &pdev->dev;
1568	1586	struct etnaviv_gpu *gpu;
1569		− u32 dma_mask;
1570	1587	int err = 0;
1571	1588
1572	1589	gpu = devm_kzalloc(dev, sizeof(*gpu), GFP_KERNEL);
@@ -1576,18 +1593,6 @@ static int etnaviv_gpu_platform_probe(struct platform_device *pdev) · 3 unmodified lines
1576	1593	gpu->dev = &pdev->dev;
1577	1594	mutex_init(&gpu->lock);
1578	1595
1579		− /*
1580		− * Set the GPU linear window to be at the end of the DMA window, where
1581		− * the CMA area is likely to reside. This ensures that we are able to
1582		− * map the command buffers while having the linear window overlap as
1583		− * much RAM as possible, so we can optimize mappings for other buffers.
1584		− */
1585		− dma_mask = (u32)dma_get_required_mask(dev);
1586		− if (dma_mask < PHYS_OFFSET + SZ_2G)
1587		− gpu->memory_base = PHYS_OFFSET;
1588		− else
1589		− gpu->memory_base = dma_mask - SZ_2G + 1;
1590		−
1591	1596	/* Map registers: */
1592	1597	gpu->mmio = etnaviv_ioremap(pdev, NULL, dev_name(gpu->dev));
1593	1598	if (IS_ERR(gpu->mmio))

drivers/gpu/drm/radeon/evergreen.c+153−1

@@ -2608,10 +2608,152 @@ static void evergreen_agp_enable(struct radeon_device *rdev) · 2607 unmodified lines
2608	2608	WREG32(VM_CONTEXT1_CNTL, 0);
2609	2609	}
2610	2610
	2611	+static const unsigned ni_dig_offsets[] =
	2612	+{
	2613	+ NI_DIG0_REGISTER_OFFSET,
	2614	+ NI_DIG1_REGISTER_OFFSET,
	2615	+ NI_DIG2_REGISTER_OFFSET,
	2616	+ NI_DIG3_REGISTER_OFFSET,
	2617	+ NI_DIG4_REGISTER_OFFSET,
	2618	+ NI_DIG5_REGISTER_OFFSET
	2619	+};
	2620	+
	2621	+static const unsigned ni_tx_offsets[] =
	2622	+{
	2623	+ NI_DCIO_UNIPHY0_UNIPHY_TX_CONTROL1,
	2624	+ NI_DCIO_UNIPHY1_UNIPHY_TX_CONTROL1,
	2625	+ NI_DCIO_UNIPHY2_UNIPHY_TX_CONTROL1,
	2626	+ NI_DCIO_UNIPHY3_UNIPHY_TX_CONTROL1,
	2627	+ NI_DCIO_UNIPHY4_UNIPHY_TX_CONTROL1,
	2628	+ NI_DCIO_UNIPHY5_UNIPHY_TX_CONTROL1
	2629	+};
	2630	+
	2631	+static const unsigned evergreen_dp_offsets[] =
	2632	+{
	2633	+ EVERGREEN_DP0_REGISTER_OFFSET,
	2634	+ EVERGREEN_DP1_REGISTER_OFFSET,
	2635	+ EVERGREEN_DP2_REGISTER_OFFSET,
	2636	+ EVERGREEN_DP3_REGISTER_OFFSET,
	2637	+ EVERGREEN_DP4_REGISTER_OFFSET,
	2638	+ EVERGREEN_DP5_REGISTER_OFFSET
	2639	+};
	2640	+
	2641	+
	2642	+/*
	2643	+ * Assumption is that EVERGREEN_CRTC_MASTER_EN enable for requested crtc
	2644	+ * We go from crtc to connector and it is not relible since it
	2645	+ * should be an opposite direction .If crtc is enable then
	2646	+ * find the dig_fe which selects this crtc and insure that it enable.
	2647	+ * if such dig_fe is found then find dig_be which selects found dig_be and
	2648	+ * insure that it enable and in DP_SST mode.
	2649	+ * if UNIPHY_PLL_CONTROL1.enable then we should disconnect timing
	2650	+ * from dp symbols clocks .
	2651	+ */
	2652	+static bool evergreen_is_dp_sst_stream_enabled(struct radeon_device *rdev,
	2653	+ unsigned crtc_id, unsigned *ret_dig_fe)
	2654	+{
	2655	+ unsigned i;
	2656	+ unsigned dig_fe;
	2657	+ unsigned dig_be;
	2658	+ unsigned dig_en_be;
	2659	+ unsigned uniphy_pll;
	2660	+ unsigned digs_fe_selected;
	2661	+ unsigned dig_be_mode;
	2662	+ unsigned dig_fe_mask;
	2663	+ bool is_enabled = false;
	2664	+ bool found_crtc = false;
	2665	+
	2666	+ /* loop through all running dig_fe to find selected crtc */
	2667	+ for (i = 0; i < ARRAY_SIZE(ni_dig_offsets); i++) {
	2668	+ dig_fe = RREG32(NI_DIG_FE_CNTL + ni_dig_offsets[i]);
	2669	+ if (dig_fe & NI_DIG_FE_CNTL_SYMCLK_FE_ON &&
	2670	+ crtc_id == NI_DIG_FE_CNTL_SOURCE_SELECT(dig_fe)) {
	2671	+ /* found running pipe */
	2672	+ found_crtc = true;
	2673	+ dig_fe_mask = 1 << i;
	2674	+ dig_fe = i;
	2675	+ break;
	2676	+ }
	2677	+ }
	2678	+
	2679	+ if (found_crtc) {
	2680	+ /* loop through all running dig_be to find selected dig_fe */
	2681	+ for (i = 0; i < ARRAY_SIZE(ni_dig_offsets); i++) {
	2682	+ dig_be = RREG32(NI_DIG_BE_CNTL + ni_dig_offsets[i]);
	2683	+ /* if dig_fe_selected by dig_be? */
	2684	+ digs_fe_selected = NI_DIG_BE_CNTL_FE_SOURCE_SELECT(dig_be);
	2685	+ dig_be_mode = NI_DIG_FE_CNTL_MODE(dig_be);
	2686	+ if (dig_fe_mask & digs_fe_selected &&
	2687	+ /* if dig_be in sst mode? */
	2688	+ dig_be_mode == NI_DIG_BE_DPSST) {
	2689	+ dig_en_be = RREG32(NI_DIG_BE_EN_CNTL +
	2690	+ ni_dig_offsets[i]);
	2691	+ uniphy_pll = RREG32(NI_DCIO_UNIPHY0_PLL_CONTROL1 +
	2692	+ ni_tx_offsets[i]);
	2693	+ /* dig_be enable and tx is running */
	2694	+ if (dig_en_be & NI_DIG_BE_EN_CNTL_ENABLE &&
	2695	+ dig_en_be & NI_DIG_BE_EN_CNTL_SYMBCLK_ON &&
	2696	+ uniphy_pll & NI_DCIO_UNIPHY0_PLL_CONTROL1_ENABLE) {
	2697	+ is_enabled = true;
	2698	+ *ret_dig_fe = dig_fe;
	2699	+ break;
	2700	+ }
	2701	+ }
	2702	+ }
	2703	+ }
	2704	+
	2705	+ return is_enabled;
	2706	+}
	2707	+
	2708	+/*
	2709	+ * Blank dig when in dp sst mode
	2710	+ * Dig ignores crtc timing
	2711	+ */
	2712	+static void evergreen_blank_dp_output(struct radeon_device *rdev,
	2713	+ unsigned dig_fe)
	2714	+{
	2715	+ unsigned stream_ctrl;
	2716	+ unsigned fifo_ctrl;
	2717	+ unsigned counter = 0;
	2718	+
	2719	+ if (dig_fe >= ARRAY_SIZE(evergreen_dp_offsets)) {
	2720	+ DRM_ERROR("invalid dig_fe %d\n", dig_fe);
	2721	+ return;
	2722	+ }
	2723	+
	2724	+ stream_ctrl = RREG32(EVERGREEN_DP_VID_STREAM_CNTL +
	2725	+ evergreen_dp_offsets[dig_fe]);
	2726	+ if (!(stream_ctrl & EVERGREEN_DP_VID_STREAM_CNTL_ENABLE)) {
	2727	+ DRM_ERROR("dig %d , should be enable\n", dig_fe);
	2728	+ return;
	2729	+ }
	2730	+
	2731	+ stream_ctrl &=~EVERGREEN_DP_VID_STREAM_CNTL_ENABLE;
	2732	+ WREG32(EVERGREEN_DP_VID_STREAM_CNTL +
	2733	+ evergreen_dp_offsets[dig_fe], stream_ctrl);
	2734	+
	2735	+ stream_ctrl = RREG32(EVERGREEN_DP_VID_STREAM_CNTL +
	2736	+ evergreen_dp_offsets[dig_fe]);
	2737	+ while (counter < 32 && stream_ctrl & EVERGREEN_DP_VID_STREAM_STATUS) {
	2738	+ msleep(1);
	2739	+ counter++;
	2740	+ stream_ctrl = RREG32(EVERGREEN_DP_VID_STREAM_CNTL +
	2741	+ evergreen_dp_offsets[dig_fe]);
	2742	+ }
	2743	+ if (counter >= 32 )
	2744	+ DRM_ERROR("counter exceeds %d\n", counter);
	2745	+
	2746	+ fifo_ctrl = RREG32(EVERGREEN_DP_STEER_FIFO + evergreen_dp_offsets[dig_fe]);
	2747	+ fifo_ctrl \|= EVERGREEN_DP_STEER_FIFO_RESET;
	2748	+ WREG32(EVERGREEN_DP_STEER_FIFO + evergreen_dp_offsets[dig_fe], fifo_ctrl);
	2749	+
	2750	+}
	2751	+
2611	2752	void evergreen_mc_stop(struct radeon_device rdev, struct evergreen_mc_save save)
2612	2753	{
2613	2754	u32 crtc_enabled, tmp, frame_count, blackout;
2614	2755	int i, j;
	2756	+ unsigned dig_fe;
2615	2757
2616	2758	if (!ASIC_IS_NODCE(rdev)) {
2617	2759	save->vga_render_control = RREG32(VGA_RENDER_CONTROL);
@@ -2651,7 +2793,17 @@ void evergreen_mc_stop(struct radeon_device rdev, struct evergreen_mc_save sav · 33 unmodified lines
2651	2793	break;
2652	2794	udelay(1);
2653	2795	}
2654		−
	2796	+ /we should disable dig if it drives dp sst/
	2797	+ /but we are in radeon_device_init and the topology is unknown/
	2798	+ /and it is available after radeon_modeset_init/
	2799	+ /the following method radeon_atom_encoder_dpms_dig/
	2800	+ /does the job if we initialize it properly/
	2801	+ /for now we do it this manually/
	2802	+ /**/
	2803	+ if (ASIC_IS_DCE5(rdev) &&
	2804	+ evergreen_is_dp_sst_stream_enabled(rdev, i ,&dig_fe))
	2805	+ evergreen_blank_dp_output(rdev, dig_fe);
	2806	+ /we could remove 6 lines below/
2655	2807	/* XXX this is a hack to avoid strange behavior with EFI on certain systems */
2656	2808	WREG32(EVERGREEN_CRTC_UPDATE_LOCK + crtc_offsets[i], 1);
2657	2809	tmp = RREG32(EVERGREEN_CRTC_CONTROL + crtc_offsets[i]);

drivers/gpu/drm/radeon/evergreen_reg.h+46−0

@@ -250,8 +250,43 @@ · 249 unmodified lines
250	250
251	251	/* HDMI blocks at 0x7030, 0x7c30, 0x10830, 0x11430, 0x12030, 0x12c30 */
252	252	#define EVERGREEN_HDMI_BASE 0x7030
	253	+/DIG block/
	254	+#define NI_DIG0_REGISTER_OFFSET (0x7000 - 0x7000)
	255	+#define NI_DIG1_REGISTER_OFFSET (0x7C00 - 0x7000)
	256	+#define NI_DIG2_REGISTER_OFFSET (0x10800 - 0x7000)
	257	+#define NI_DIG3_REGISTER_OFFSET (0x11400 - 0x7000)
	258	+#define NI_DIG4_REGISTER_OFFSET (0x12000 - 0x7000)
	259	+#define NI_DIG5_REGISTER_OFFSET (0x12C00 - 0x7000)
	260	+
	261	+
	262	+#define NI_DIG_FE_CNTL 0x7000
	263	+# define NI_DIG_FE_CNTL_SOURCE_SELECT(x) ((x) & 0x3)
	264	+# define NI_DIG_FE_CNTL_SYMCLK_FE_ON (1<<24)
	265	+
	266	+
	267	+#define NI_DIG_BE_CNTL 0x7140
	268	+# define NI_DIG_BE_CNTL_FE_SOURCE_SELECT(x) (((x) >> 8 ) & 0x3F)
	269	+# define NI_DIG_FE_CNTL_MODE(x) (((x) >> 16) & 0x7 )
	270	+
	271	+#define NI_DIG_BE_EN_CNTL 0x7144
	272	+# define NI_DIG_BE_EN_CNTL_ENABLE (1 << 0)
	273	+# define NI_DIG_BE_EN_CNTL_SYMBCLK_ON (1 << 8)
	274	+# define NI_DIG_BE_DPSST 0
253	275
254	276	/* Display Port block */
	277	+#define EVERGREEN_DP0_REGISTER_OFFSET (0x730C - 0x730C)
	278	+#define EVERGREEN_DP1_REGISTER_OFFSET (0x7F0C - 0x730C)
	279	+#define EVERGREEN_DP2_REGISTER_OFFSET (0x10B0C - 0x730C)
	280	+#define EVERGREEN_DP3_REGISTER_OFFSET (0x1170C - 0x730C)
	281	+#define EVERGREEN_DP4_REGISTER_OFFSET (0x1230C - 0x730C)
	282	+#define EVERGREEN_DP5_REGISTER_OFFSET (0x12F0C - 0x730C)
	283	+
	284	+
	285	+#define EVERGREEN_DP_VID_STREAM_CNTL 0x730C
	286	+# define EVERGREEN_DP_VID_STREAM_CNTL_ENABLE (1 << 0)
	287	+# define EVERGREEN_DP_VID_STREAM_STATUS (1 <<16)
	288	+#define EVERGREEN_DP_STEER_FIFO 0x7310
	289	+# define EVERGREEN_DP_STEER_FIFO_RESET (1 << 0)
255	290	#define EVERGREEN_DP_SEC_CNTL 0x7280
256	291	# define EVERGREEN_DP_SEC_STREAM_ENABLE (1 << 0)
257	292	# define EVERGREEN_DP_SEC_ASP_ENABLE (1 << 4)
@@ -266,4 +301,15 @@ · 8 unmodified lines
266	301	# define EVERGREEN_DP_SEC_N_BASE_MULTIPLE(x) (((x) & 0xf) << 24)
267	302	# define EVERGREEN_DP_SEC_SS_EN (1 << 28)
268	303
	304	+/DCIO_UNIPHY block/
	305	+#define NI_DCIO_UNIPHY0_UNIPHY_TX_CONTROL1 (0x6600 -0x6600)
	306	+#define NI_DCIO_UNIPHY1_UNIPHY_TX_CONTROL1 (0x6640 -0x6600)
	307	+#define NI_DCIO_UNIPHY2_UNIPHY_TX_CONTROL1 (0x6680 - 0x6600)
	308	+#define NI_DCIO_UNIPHY3_UNIPHY_TX_CONTROL1 (0x66C0 - 0x6600)
	309	+#define NI_DCIO_UNIPHY4_UNIPHY_TX_CONTROL1 (0x6700 - 0x6600)
	310	+#define NI_DCIO_UNIPHY5_UNIPHY_TX_CONTROL1 (0x6740 - 0x6600)
	311	+
	312	+#define NI_DCIO_UNIPHY0_PLL_CONTROL1 0x6618
	313	+# define NI_DCIO_UNIPHY0_PLL_CONTROL1_ENABLE (1 << 0)
	314	+
269	315	#endif

drivers/gpu/drm/ttm/ttm_bo.c+4−13

@@ -230,22 +230,13 @@ EXPORT_SYMBOL(ttm_bo_del_sub_from_lru); · 229 unmodified lines
230	230
231	231	void ttm_bo_move_to_lru_tail(struct ttm_buffer_object *bo)
232	232	{
233		− struct ttm_bo_device *bdev = bo->bdev;
234		− struct ttm_mem_type_manager *man;
	233	+ int put_count = 0;
235	234
236	235	lockdep_assert_held(&bo->resv->lock.base);
237	236
238		− if (bo->mem.placement & TTM_PL_FLAG_NO_EVICT) {
239		− list_del_init(&bo->swap);
240		− list_del_init(&bo->lru);
241		−
242		− } else {
243		− if (bo->ttm && !(bo->ttm->page_flags & TTM_PAGE_FLAG_SG))
244		− list_move_tail(&bo->swap, &bo->glob->swap_lru);
245		−
246		− man = &bdev->man[bo->mem.mem_type];
247		− list_move_tail(&bo->lru, &man->lru);
248		− }
	237	+ put_count = ttm_bo_del_from_lru(bo);
	238	+ ttm_bo_list_ref_sub(bo, put_count, true);
	239	+ ttm_bo_add_to_lru(bo);
249	240	}
250	241	EXPORT_SYMBOL(ttm_bo_move_to_lru_tail);
251	242

drivers/gpu/drm/virtio/virtgpu_display.c+12−0

@@ -267,11 +267,23 @@ static int virtio_gpu_crtc_atomic_check(struct drm_crtc *crtc, · 266 unmodified lines
267	267	return 0;
268	268	}
269	269
	270	+static void virtio_gpu_crtc_atomic_flush(struct drm_crtc *crtc,
	271	+ struct drm_crtc_state *old_state)
	272	+{
	273	+ unsigned long flags;
	274	+
	275	+ spin_lock_irqsave(&crtc->dev->event_lock, flags);
	276	+ if (crtc->state->event)
	277	+ drm_crtc_send_vblank_event(crtc, crtc->state->event);
	278	+ spin_unlock_irqrestore(&crtc->dev->event_lock, flags);
	279	+}
	280	+
270	281	static const struct drm_crtc_helper_funcs virtio_gpu_crtc_helper_funcs = {
271	282	.enable = virtio_gpu_crtc_enable,
272	283	.disable = virtio_gpu_crtc_disable,
273	284	.mode_set_nofb = virtio_gpu_crtc_mode_set_nofb,
274	285	.atomic_check = virtio_gpu_crtc_atomic_check,
	286	+ .atomic_flush = virtio_gpu_crtc_atomic_flush,
275	287	};
276	288
277	289	static void virtio_gpu_enc_mode_set(struct drm_encoder *encoder,

drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c+5−5

@@ -3293,19 +3293,19 @@ static const struct vmw_cmd_entry vmw_cmd_entries[SVGA_3D_CMD_MAX] = { · 3292 unmodified lines
3293	3293	&vmw_cmd_dx_cid_check, true, false, true),
3294	3294	VMW_CMD_DEF(SVGA_3D_CMD_DX_DEFINE_QUERY, &vmw_cmd_dx_define_query,
3295	3295	true, false, true),
3296		− VMW_CMD_DEF(SVGA_3D_CMD_DX_DESTROY_QUERY, &vmw_cmd_ok,
	3296	+ VMW_CMD_DEF(SVGA_3D_CMD_DX_DESTROY_QUERY, &vmw_cmd_dx_cid_check,
3297	3297	true, false, true),
3298	3298	VMW_CMD_DEF(SVGA_3D_CMD_DX_BIND_QUERY, &vmw_cmd_dx_bind_query,
3299	3299	true, false, true),
3300	3300	VMW_CMD_DEF(SVGA_3D_CMD_DX_SET_QUERY_OFFSET,
3301		− &vmw_cmd_ok, true, false, true),
3302		− VMW_CMD_DEF(SVGA_3D_CMD_DX_BEGIN_QUERY, &vmw_cmd_ok,
	3301	+ &vmw_cmd_dx_cid_check, true, false, true),
	3302	+ VMW_CMD_DEF(SVGA_3D_CMD_DX_BEGIN_QUERY, &vmw_cmd_dx_cid_check,
3303	3303	true, false, true),
3304		− VMW_CMD_DEF(SVGA_3D_CMD_DX_END_QUERY, &vmw_cmd_ok,
	3304	+ VMW_CMD_DEF(SVGA_3D_CMD_DX_END_QUERY, &vmw_cmd_dx_cid_check,
3305	3305	true, false, true),
3306	3306	VMW_CMD_DEF(SVGA_3D_CMD_DX_READBACK_QUERY, &vmw_cmd_invalid,
3307	3307	true, false, true),
3308		− VMW_CMD_DEF(SVGA_3D_CMD_DX_SET_PREDICATION, &vmw_cmd_invalid,
	3308	+ VMW_CMD_DEF(SVGA_3D_CMD_DX_SET_PREDICATION, &vmw_cmd_dx_cid_check,
3309	3309	true, false, true),
3310	3310	VMW_CMD_DEF(SVGA_3D_CMD_DX_SET_VIEWPORTS, &vmw_cmd_dx_cid_check,
3311	3311	true, false, true),

drivers/gpu/drm/vmwgfx/vmwgfx_fb.c+3−3

@@ -573,9 +573,9 @@ static int vmw_fb_set_par(struct fb_info *info) · 572 unmodified lines
573	573	mode = old_mode;
574	574	old_mode = NULL;
575	575	} else if (!vmw_kms_validate_mode_vram(vmw_priv,
576		− mode->hdisplay *
577		− (var->bits_per_pixel + 7) / 8,
578		− mode->vdisplay)) {
	576	+ mode->hdisplay *
	577	+ DIV_ROUND_UP(var->bits_per_pixel, 8),
	578	+ mode->vdisplay)) {
579	579	drm_mode_destroy(vmw_priv->dev, mode);
580	580	return -EINVAL;
581	581	}

drivers/i2c/busses/Kconfig+2−2

@@ -975,10 +975,10 @@ config I2C_XLR · 974 unmodified lines
975	975
976	976	config I2C_XLP9XX
977	977	tristate "XLP9XX I2C support"
978		− depends on CPU_XLP \|\| COMPILE_TEST
	978	+ depends on CPU_XLP \|\| ARCH_VULCAN \|\| COMPILE_TEST
979	979	help
980	980	This driver enables support for the on-chip I2C interface of
981		− the Broadcom XLP9xx/XLP5xx MIPS processors.
	981	+ the Broadcom XLP9xx/XLP5xx MIPS and Vulcan ARM64 processors.
982	982
983	983	This driver can also be built as a module. If so, the module will
984	984	be called i2c-xlp9xx.

drivers/i2c/busses/i2c-cpm.c+2−2

@@ -116,8 +116,8 @@ struct cpm_i2c { · 115 unmodified lines
116	116	cbd_t __iomem *rbase;
117	117	u_char *txbuf[CPM_MAXBD];
118	118	u_char *rxbuf[CPM_MAXBD];
119		− u32 txdma[CPM_MAXBD];
120		− u32 rxdma[CPM_MAXBD];
	119	+ dma_addr_t txdma[CPM_MAXBD];
	120	+ dma_addr_t rxdma[CPM_MAXBD];
121	121	};
122	122
123	123	static irqreturn_t cpm_i2c_interrupt(int irq, void *dev_id)

drivers/i2c/busses/i2c-exynos5.c+19−5

@@ -671,7 +671,9 @@ static int exynos5_i2c_xfer(struct i2c_adapter *adap, · 670 unmodified lines
671	671	return -EIO;
672	672	}
673	673
674		− clk_prepare_enable(i2c->clk);
	674	+ ret = clk_enable(i2c->clk);
	675	+ if (ret)
	676	+ return ret;
675	677
676	678	for (i = 0; i < num; i++, msgs++) {
677	679	stop = (i == num - 1);
@@ -695,7 +697,7 @@ static int exynos5_i2c_xfer(struct i2c_adapter *adap, · 17 unmodified lines
695	697	}
696	698
697	699	out:
698		− clk_disable_unprepare(i2c->clk);
	700	+ clk_disable(i2c->clk);
699	701	return ret;
700	702	}
701	703
@@ -747,7 +749,9 @@ static int exynos5_i2c_probe(struct platform_device *pdev) · 45 unmodified lines
747	749	return -ENOENT;
748	750	}
749	751
750		− clk_prepare_enable(i2c->clk);
	752	+ ret = clk_prepare_enable(i2c->clk);
	753	+ if (ret)
	754	+ return ret;
751	755
752	756	mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
753	757	i2c->regs = devm_ioremap_resource(&pdev->dev, mem);
@@ -799,6 +803,10 @@ static int exynos5_i2c_probe(struct platform_device *pdev) · 45 unmodified lines
799	803
800	804	platform_set_drvdata(pdev, i2c);
801	805
	806	+ clk_disable(i2c->clk);
	807	+
	808	+ return 0;
	809	+
802	810	err_clk:
803	811	clk_disable_unprepare(i2c->clk);
804	812	return ret;
@@ -810,6 +818,8 @@ static int exynos5_i2c_remove(struct platform_device *pdev) · 5 unmodified lines
810	818
811	819	i2c_del_adapter(&i2c->adap);
812	820
	821	+ clk_unprepare(i2c->clk);
	822	+
813	823	return 0;
814	824	}
815	825
@@ -821,6 +831,8 @@ static int exynos5_i2c_suspend_noirq(struct device *dev) · 5 unmodified lines
821	831
822	832	i2c->suspended = 1;
823	833
	834	+ clk_unprepare(i2c->clk);
	835	+
824	836	return 0;
825	837	}
826	838
@@ -830,7 +842,9 @@ static int exynos5_i2c_resume_noirq(struct device *dev) · 3 unmodified lines
830	842	struct exynos5_i2c *i2c = platform_get_drvdata(pdev);
831	843	int ret = 0;
832	844
833		− clk_prepare_enable(i2c->clk);
	845	+ ret = clk_prepare_enable(i2c->clk);
	846	+ if (ret)
	847	+ return ret;
834	848
835	849	ret = exynos5_hsi2c_clock_setup(i2c);
836	850	if (ret) {
@@ -839,7 +853,7 @@ static int exynos5_i2c_resume_noirq(struct device *dev) · 2 unmodified lines
839	853	}
840	854
841	855	exynos5_i2c_init(i2c);
842		− clk_disable_unprepare(i2c->clk);
	856	+ clk_disable(i2c->clk);
843	857	i2c->suspended = 0;
844	858
845	859	return 0;

drivers/i2c/busses/i2c-ismt.c+2−0

@@ -75,6 +75,7 @@ · 74 unmodified lines
75	75	/* PCI DIDs for the Intel SMBus Message Transport (SMT) Devices */
76	76	#define PCI_DEVICE_ID_INTEL_S1200_SMT0 0x0c59
77	77	#define PCI_DEVICE_ID_INTEL_S1200_SMT1 0x0c5a
	78	+#define PCI_DEVICE_ID_INTEL_DNV_SMT 0x19ac
78	79	#define PCI_DEVICE_ID_INTEL_AVOTON_SMT 0x1f15
79	80
80	81	#define ISMT_DESC_ENTRIES 2 /* number of descriptor entries */
@@ -180,6 +181,7 @@ struct ismt_priv { · 99 unmodified lines
180	181	static const struct pci_device_id ismt_ids[] = {
181	182	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_S1200_SMT0) },
182	183	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_S1200_SMT1) },
	184	+ { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_DNV_SMT) },
183	185	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_AVOTON_SMT) },
184	186	{ 0, }
185	187	};

drivers/i2c/busses/i2c-rk3x.c+1−0

@@ -855,6 +855,7 @@ static struct rk3x_i2c_soc_data soc_data[3] = { · 854 unmodified lines
855	855	static const struct of_device_id rk3x_i2c_match[] = {
856	856	{ .compatible = "rockchip,rk3066-i2c", .data = (void *)&soc_data[0] },
857	857	{ .compatible = "rockchip,rk3188-i2c", .data = (void *)&soc_data[1] },
	858	+ { .compatible = "rockchip,rk3228-i2c", .data = (void *)&soc_data[2] },
858	859	{ .compatible = "rockchip,rk3288-i2c", .data = (void *)&soc_data[2] },
859	860	{},
860	861	};

drivers/infiniband/core/cache.c+2−1

@@ -691,7 +691,8 @@ void ib_cache_gid_set_default_gid(struct ib_device *ib_dev, u8 port, · 690 unmodified lines
691	691	NULL);
692	692
693	693	/* Coudn't find default GID location */
694		− WARN_ON(ix < 0);
	694	+ if (WARN_ON(ix < 0))
	695	+ goto release;
695	696
696	697	zattr_type.gid_type = gid_type;
697	698

drivers/infiniband/core/ucm.c+4−0

@@ -48,6 +48,7 @@ · 47 unmodified lines
48	48
49	49	#include <asm/uaccess.h>
50	50
	51	+#include <rdma/ib.h>
51	52	#include <rdma/ib_cm.h>
52	53	#include <rdma/ib_user_cm.h>
53	54	#include <rdma/ib_marshall.h>
@@ -1103,6 +1104,9 @@ static ssize_t ib_ucm_write(struct file filp, const char __user buf, · 1049 unmodified lines
1103	1104	struct ib_ucm_cmd_hdr hdr;
1104	1105	ssize_t result;
1105	1106
	1107	+ if (WARN_ON_ONCE(!ib_safe_file_access(filp)))
	1108	+ return -EACCES;
	1109	+
1106	1110	if (len < sizeof(hdr))
1107	1111	return -EINVAL;
1108	1112

drivers/infiniband/core/ucma.c+3−0

@@ -1574,6 +1574,9 @@ static ssize_t ucma_write(struct file filp, const char __user buf, · 1573 unmodified lines
1574	1574	struct rdma_ucm_cmd_hdr hdr;
1575	1575	ssize_t ret;
1576	1576
	1577	+ if (WARN_ON_ONCE(!ib_safe_file_access(filp)))
	1578	+ return -EACCES;
	1579	+
1577	1580	if (len < sizeof(hdr))
1578	1581	return -EINVAL;
1579	1582

drivers/infiniband/core/uverbs_main.c+5−0

@@ -48,6 +48,8 @@ · 47 unmodified lines
48	48
49	49	#include <asm/uaccess.h>
50	50
	51	+#include <rdma/ib.h>
	52	+
51	53	#include "uverbs.h"
52	54
53	55	MODULE_AUTHOR("Roland Dreier");
@@ -709,6 +711,9 @@ static ssize_t ib_uverbs_write(struct file filp, const char __user buf, · 655 unmodified lines
709	711	int srcu_key;
710	712	ssize_t ret;
711	713
	714	+ if (WARN_ON_ONCE(!ib_safe_file_access(filp)))
	715	+ return -EACCES;
	716	+
712	717	if (count < sizeof hdr)
713	718	return -EINVAL;
714	719

drivers/infiniband/core/verbs.c+2−1

@@ -1860,6 +1860,7 @@ EXPORT_SYMBOL(ib_drain_rq); · 1859 unmodified lines
1860	1860	void ib_drain_qp(struct ib_qp *qp)
1861	1861	{
1862	1862	ib_drain_sq(qp);
1863		− ib_drain_rq(qp);
	1863	+ if (!qp->srq)
	1864	+ ib_drain_rq(qp);
1864	1865	}
1865	1866	EXPORT_SYMBOL(ib_drain_qp);

drivers/infiniband/hw/cxgb3/iwch_provider.c+2−0

@@ -1390,6 +1390,8 @@ int iwch_register_device(struct iwch_dev *dev) · 1389 unmodified lines
1390	1390	dev->ibdev.iwcm->add_ref = iwch_qp_add_ref;
1391	1391	dev->ibdev.iwcm->rem_ref = iwch_qp_rem_ref;
1392	1392	dev->ibdev.iwcm->get_qp = iwch_get_qp;
	1393	+ memcpy(dev->ibdev.iwcm->ifname, dev->rdev.t3cdev_p->lldev->name,
	1394	+ sizeof(dev->ibdev.iwcm->ifname));
1393	1395
1394	1396	ret = ib_register_device(&dev->ibdev, NULL);
1395	1397	if (ret)

drivers/infiniband/hw/cxgb4/cq.c+1−1

@@ -162,7 +162,7 @@ static int create_cq(struct c4iw_rdev rdev, struct t4_cq cq, · 161 unmodified lines
162	162	cq->bar2_va = c4iw_bar2_addrs(rdev, cq->cqid, T4_BAR2_QTYPE_INGRESS,
163	163	&cq->bar2_qid,
164	164	user ? &cq->bar2_pa : NULL);
165		− if (user && !cq->bar2_va) {
	165	+ if (user && !cq->bar2_pa) {
166	166	pr_warn(MOD "%s: cqid %u not in BAR2 range.\n",
167	167	pci_name(rdev->lldi.pdev), cq->cqid);
168	168	ret = -EINVAL;

drivers/infiniband/hw/cxgb4/provider.c+2−0

@@ -580,6 +580,8 @@ int c4iw_register_device(struct c4iw_dev *dev) · 579 unmodified lines
580	580	dev->ibdev.iwcm->add_ref = c4iw_qp_add_ref;
581	581	dev->ibdev.iwcm->rem_ref = c4iw_qp_rem_ref;
582	582	dev->ibdev.iwcm->get_qp = c4iw_get_qp;
	583	+ memcpy(dev->ibdev.iwcm->ifname, dev->rdev.lldi.ports[0]->name,
	584	+ sizeof(dev->ibdev.iwcm->ifname));
583	585
584	586	ret = ib_register_device(&dev->ibdev, NULL);
585	587	if (ret)

drivers/infiniband/hw/cxgb4/qp.c+21−3

@@ -185,6 +185,10 @@ void __iomem c4iw_bar2_addrs(struct c4iw_rdev rdev, unsigned int qid, · 184 unmodified lines
185	185
186	186	if (pbar2_pa)
187	187	*pbar2_pa = (rdev->bar2_pa + bar2_qoffset) & PAGE_MASK;
	188	+
	189	+ if (is_t4(rdev->lldi.adapter_type))
	190	+ return NULL;
	191	+
188	192	return rdev->bar2_kva + bar2_qoffset;
189	193	}
190	194
@@ -270,7 +274,7 @@ static int create_qp(struct c4iw_rdev rdev, struct t4_wq wq, · 79 unmodified lines
270	274	/*
271	275	* User mode must have bar2 access.
272	276	*/
273		− if (user && (!wq->sq.bar2_va \|\| !wq->rq.bar2_va)) {
	277	+ if (user && (!wq->sq.bar2_pa \|\| !wq->rq.bar2_pa)) {
274	278	pr_warn(MOD "%s: sqid %u or rqid %u not in BAR2 range.\n",
275	279	pci_name(rdev->lldi.pdev), wq->sq.qid, wq->rq.qid);
276	280	goto free_dma;
@@ -1895,13 +1899,27 @@ int c4iw_ib_query_qp(struct ib_qp ibqp, struct ib_qp_attr attr, · 1618 unmodified lines
1895	1899	void c4iw_drain_sq(struct ib_qp *ibqp)
1896	1900	{
1897	1901	struct c4iw_qp *qp = to_c4iw_qp(ibqp);
	1902	+ unsigned long flag;
	1903	+ bool need_to_wait;
1898	1904
1899		− wait_for_completion(&qp->sq_drained);
	1905	+ spin_lock_irqsave(&qp->lock, flag);
	1906	+ need_to_wait = !t4_sq_empty(&qp->wq);
	1907	+ spin_unlock_irqrestore(&qp->lock, flag);
	1908	+
	1909	+ if (need_to_wait)
	1910	+ wait_for_completion(&qp->sq_drained);
1900	1911	}
1901	1912
1902	1913	void c4iw_drain_rq(struct ib_qp *ibqp)
1903	1914	{
1904	1915	struct c4iw_qp *qp = to_c4iw_qp(ibqp);
	1916	+ unsigned long flag;
	1917	+ bool need_to_wait;
	1918	+
	1919	+ spin_lock_irqsave(&qp->lock, flag);
	1920	+ need_to_wait = !t4_rq_empty(&qp->wq);
	1921	+ spin_unlock_irqrestore(&qp->lock, flag);
1905	1922
1906		− wait_for_completion(&qp->rq_drained);
	1923	+ if (need_to_wait)
	1924	+ wait_for_completion(&qp->rq_drained);
1907	1925	}

drivers/infiniband/hw/mlx5/main.c+3−3

@@ -530,7 +530,7 @@ static int mlx5_ib_query_device(struct ib_device *ibdev, · 529 unmodified lines
530	530	sizeof(struct mlx5_wqe_ctrl_seg)) /
531	531	sizeof(struct mlx5_wqe_data_seg);
532	532	props->max_sge = min(max_rq_sg, max_sq_sg);
533		− props->max_sge_rd = props->max_sge;
	533	+ props->max_sge_rd = MLX5_MAX_SGE_RD;
534	534	props->max_cq = 1 << MLX5_CAP_GEN(mdev, log_max_cq);
535	535	props->max_cqe = (1 << MLX5_CAP_GEN(mdev, log_max_cq_sz)) - 1;
536	536	props->max_mr = 1 << MLX5_CAP_GEN(mdev, log_max_mkey);
@@ -671,8 +671,8 @@ static int mlx5_query_hca_port(struct ib_device *ibdev, u8 port, · 134 unmodified lines
671	671	struct mlx5_ib_dev *dev = to_mdev(ibdev);
672	672	struct mlx5_core_dev *mdev = dev->mdev;
673	673	struct mlx5_hca_vport_context *rep;
674		− int max_mtu;
675		− int oper_mtu;
	674	+ u16 max_mtu;
	675	+ u16 oper_mtu;
676	676	int err;
677	677	u8 ib_link_width_oper;
678	678	u8 vl_hw_cap;

drivers/infiniband/hw/nes/nes_nic.c+0−3

@@ -500,9 +500,6 @@ static int nes_netdev_start_xmit(struct sk_buff skb, struct net_device netdev) · 499 unmodified lines
500	500	* skb_shinfo(skb)->nr_frags, skb_is_gso(skb));
501	501	*/
502	502
503		− if (!netif_carrier_ok(netdev))
504		− return NETDEV_TX_OK;
505		−
506	503	if (netif_queue_stopped(netdev))
507	504	return NETDEV_TX_BUSY;
508	505

drivers/infiniband/hw/qib/qib_file_ops.c+5−0

@@ -45,6 +45,8 @@ · 44 unmodified lines
45	45	#include <linux/export.h>
46	46	#include <linux/uio.h>
47	47
	48	+#include <rdma/ib.h>
	49	+
48	50	#include "qib.h"
49	51	#include "qib_common.h"
50	52	#include "qib_user_sdma.h"
@@ -2067,6 +2069,9 @@ static ssize_t qib_write(struct file fp, const char __user data, · 2016 unmodified lines
2067	2069	ssize_t ret = 0;
2068	2070	void *dest;
2069	2071
	2072	+ if (WARN_ON_ONCE(!ib_safe_file_access(fp)))
	2073	+ return -EACCES;
	2074	+
2070	2075	if (count < sizeof(cmd.type)) {
2071	2076	ret = -EINVAL;
2072	2077	goto bail;

drivers/infiniband/sw/rdmavt/qp.c+2−2

@@ -1637,9 +1637,9 @@ bail: · 1636 unmodified lines
1637	1637	spin_unlock_irqrestore(&qp->s_hlock, flags);
1638	1638	if (nreq) {
1639	1639	if (call_send)
1640		− rdi->driver_f.schedule_send_no_lock(qp);
1641		− else
1642	1640	rdi->driver_f.do_send(qp);
	1641	+ else
	1642	+ rdi->driver_f.schedule_send_no_lock(qp);
1643	1643	}
1644	1644	return err;
1645	1645	}

drivers/media/usb/usbvision/usbvision-video.c+0−7

@@ -1452,13 +1452,6 @@ static int usbvision_probe(struct usb_interface *intf, · 1451 unmodified lines
1452	1452	printk(KERN_INFO "%s: %s found\n", __func__,
1453	1453	usbvision_device_data[model].model_string);
1454	1454
1455		− /*
1456		− * this is a security check.
1457		− * an exploit using an incorrect bInterfaceNumber is known
1458		− */
1459		− if (ifnum >= USB_MAXINTERFACES \|\| !dev->actconfig->interface[ifnum])
1460		− return -ENODEV;
1461		−
1462	1455	if (usbvision_device_data[model].interface >= 0)
1463	1456	interface = &dev->actconfig->interface[usbvision_device_data[model].interface]->altsetting[0];
1464	1457	else if (ifnum < dev->actconfig->desc.bNumInterfaces)

drivers/media/v4l2-core/videobuf2-core.c+15−5

@@ -1645,7 +1645,7 @@ static int __vb2_wait_for_done_vb(struct vb2_queue *q, int nonblocking) · 1644 unmodified lines
1645	1645	* Will sleep if required for nonblocking == false.
1646	1646	*/
1647	1647	static int __vb2_get_done_vb(struct vb2_queue q, struct vb2_buffer *vb,
1648		− int nonblocking)
	1648	+ void *pb, int nonblocking)
1649	1649	{
1650	1650	unsigned long flags;
1651	1651	int ret;
@@ -1666,10 +1666,10 @@ static int __vb2_get_done_vb(struct vb2_queue q, struct vb2_buffer *vb, · 14 unmodified lines
1666	1666	/*
1667	1667	* Only remove the buffer from done_list if v4l2_buffer can handle all
1668	1668	* the planes.
1669		− * Verifying planes is NOT necessary since it already has been checked
1670		− * before the buffer is queued/prepared. So it can never fail.
1671	1669	*/
1672		− list_del(&(*vb)->done_entry);
	1670	+ ret = call_bufop(q, verify_planes_array, *vb, pb);
	1671	+ if (!ret)
	1672	+ list_del(&(*vb)->done_entry);
1673	1673	spin_unlock_irqrestore(&q->done_lock, flags);
1674	1674
1675	1675	return ret;
@@ -1748,7 +1748,7 @@ int vb2_core_dqbuf(struct vb2_queue q, unsigned int pindex, void *pb, · 72 unmodified lines
1748	1748	struct vb2_buffer *vb = NULL;
1749	1749	int ret;
1750	1750
1751		− ret = __vb2_get_done_vb(q, &vb, nonblocking);
	1751	+ ret = __vb2_get_done_vb(q, &vb, pb, nonblocking);
1752	1752	if (ret < 0)
1753	1753	return ret;
1754	1754
@@ -2297,6 +2297,16 @@ unsigned int vb2_core_poll(struct vb2_queue q, struct file file, · 542 unmodified lines
2297	2297	if (!vb2_is_streaming(q) \|\| q->error)
2298	2298	return POLLERR;
2299	2299
	2300	+ /*
	2301	+ * If this quirk is set and QBUF hasn't been called yet then
	2302	+ * return POLLERR as well. This only affects capture queues, output
	2303	+ * queues will always initialize waiting_for_buffers to false.
	2304	+ * This quirk is set by V4L2 for backwards compatibility reasons.
	2305	+ */
	2306	+ if (q->quirk_poll_must_check_waiting_for_buffers &&
	2307	+ q->waiting_for_buffers && (req_events & (POLLIN \| POLLRDNORM)))
	2308	+ return POLLERR;
	2309	+
2300	2310	/*
2301	2311	* For output streams you can call write() as long as there are fewer
2302	2312	* buffers queued than there are buffers available.

drivers/media/v4l2-core/videobuf2-memops.c+1−1

@@ -49,7 +49,7 @@ struct frame_vector *vb2_create_framevec(unsigned long start, · 48 unmodified lines
49	49	vec = frame_vector_create(nr);
50	50	if (!vec)
51	51	return ERR_PTR(-ENOMEM);
52		− ret = get_vaddr_frames(start, nr, write, 1, vec);
	52	+ ret = get_vaddr_frames(start & PAGE_MASK, nr, write, true, vec);
53	53	if (ret < 0)
54	54	goto out_destroy;
55	55	/* We accept only complete set of PFNs */

drivers/media/v4l2-core/videobuf2-v4l2.c+12−8

@@ -74,6 +74,11 @@ static int __verify_planes_array(struct vb2_buffer *vb, const struct v4l2_buffer · 73 unmodified lines
74	74	return 0;
75	75	}
76	76
	77	+static int __verify_planes_array_core(struct vb2_buffer vb, const void pb)
	78	+{
	79	+ return __verify_planes_array(vb, pb);
	80	+}
	81	+
77	82	/**
78	83	* __verify_length() - Verify that the bytesused value for each plane fits in
79	84	* the plane length and that the data offset doesn't exceed the bytesused value.
@@ -437,6 +442,7 @@ static int __fill_vb2_buffer(struct vb2_buffer *vb, · 357 unmodified lines
437	442	}
438	443
439	444	static const struct vb2_buf_ops v4l2_buf_ops = {
	445	+ .verify_planes_array = __verify_planes_array_core,
440	446	.fill_user_buffer = __fill_v4l2_buffer,
441	447	.fill_vb2_buffer = __fill_vb2_buffer,
442	448	.copy_timestamp = __copy_timestamp,
@@ -765,6 +771,12 @@ int vb2_queue_init(struct vb2_queue *q) · 322 unmodified lines
765	771	q->is_output = V4L2_TYPE_IS_OUTPUT(q->type);
766	772	q->copy_timestamp = (q->timestamp_flags & V4L2_BUF_FLAG_TIMESTAMP_MASK)
767	773	== V4L2_BUF_FLAG_TIMESTAMP_COPY;
	774	+ /*
	775	+ * For compatibility with vb1: if QBUF hasn't been called yet, then
	776	+ * return POLLERR as well. This only affects capture queues, output
	777	+ * queues will always initialize waiting_for_buffers to false.
	778	+ */
	779	+ q->quirk_poll_must_check_waiting_for_buffers = true;
768	780
769	781	return vb2_core_queue_init(q);
770	782	}
@@ -818,14 +830,6 @@ unsigned int vb2_poll(struct vb2_queue q, struct file file, poll_table *wait) · 47 unmodified lines
818	830	poll_wait(file, &fh->wait, wait);
819	831	}
820	832
821		− /*
822		− * For compatibility with vb1: if QBUF hasn't been called yet, then
823		− * return POLLERR as well. This only affects capture queues, output
824		− * queues will always initialize waiting_for_buffers to false.
825		− */
826		− if (q->waiting_for_buffers && (req_events & (POLLIN \| POLLRDNORM)))
827		− return POLLERR;
828		−
829	833	return res \| vb2_core_poll(q, file, wait);
830	834	}
831	835	EXPORT_SYMBOL_GPL(vb2_poll);

drivers/misc/cxl/context.c+7−0

@@ -223,6 +223,13 @@ int __detach_context(struct cxl_context *ctx) · 222 unmodified lines
223	223	cxl_ops->link_ok(ctx->afu->adapter, ctx->afu));
224	224	flush_work(&ctx->fault_work); /* Only needed for dedicated process */
225	225
	226	+ /*
	227	+ * Wait until no further interrupts are presented by the PSL
	228	+ * for this context.
	229	+ */
	230	+ if (cxl_ops->irq_wait)
	231	+ cxl_ops->irq_wait(ctx);
	232	+
226	233	/* release the reference to the group leader and mm handling pid */
227	234	put_pid(ctx->pid);
228	235	put_pid(ctx->glpid);

drivers/misc/cxl/cxl.h+2−0

@@ -274,6 +274,7 @@ static const cxl_p2n_reg_t CXL_PSL_WED_An = {0x0A0}; · 273 unmodified lines
274	274	#define CXL_PSL_DSISR_An_PE (1ull << (63-4)) /* PSL Error (implementation specific) */
275	275	#define CXL_PSL_DSISR_An_AE (1ull << (63-5)) /* AFU Error */
276	276	#define CXL_PSL_DSISR_An_OC (1ull << (63-6)) /* OS Context Warning */
	277	+#define CXL_PSL_DSISR_PENDING (CXL_PSL_DSISR_TRANS \| CXL_PSL_DSISR_An_PE \| CXL_PSL_DSISR_An_AE \| CXL_PSL_DSISR_An_OC)
277	278	/* NOTE: Bits 32:63 are undefined if DSISR[DS] = 1 */
278	279	#define CXL_PSL_DSISR_An_M DSISR_NOHPTE /* PTE not found */
279	280	#define CXL_PSL_DSISR_An_P DSISR_PROTFAULT /* Storage protection violation */
@@ -855,6 +856,7 @@ struct cxl_backend_ops { · 575 unmodified lines
855	856	u64 dsisr, u64 errstat);
856	857	irqreturn_t (psl_interrupt)(int irq, void data);
857	858	int (ack_irq)(struct cxl_context ctx, u64 tfc, u64 psl_reset_mask);
	859	+ void (irq_wait)(struct cxl_context ctx);
858	860	int (attach_process)(struct cxl_context ctx, bool kernel,
859	861	u64 wed, u64 amr);
860	862	int (detach_process)(struct cxl_context ctx);

drivers/misc/cxl/irq.c+0−1

@@ -203,7 +203,6 @@ unsigned int cxl_map_irq(struct cxl *adapter, irq_hw_number_t hwirq, · 202 unmodified lines
203	203	void cxl_unmap_irq(unsigned int virq, void *cookie)
204	204	{
205	205	free_irq(virq, cookie);
206		− irq_dispose_mapping(virq);
207	206	}
208	207
209	208	int cxl_register_one_irq(struct cxl *adapter,

drivers/misc/cxl/native.c+31−0

@@ -14,6 +14,7 @@ · 13 unmodified lines
14	14	#include <linux/mutex.h>
15	15	#include <linux/mm.h>
16	16	#include <linux/uaccess.h>
	17	+#include <linux/delay.h>
17	18	#include <asm/synch.h>
18	19	#include <misc/cxl-base.h>
19	20
@@ -797,6 +798,35 @@ static irqreturn_t native_irq_multiplexed(int irq, void *data) · 777 unmodified lines
797	798	return fail_psl_irq(afu, &irq_info);
798	799	}
799	800
	801	+void native_irq_wait(struct cxl_context *ctx)
	802	+{
	803	+ u64 dsisr;
	804	+ int timeout = 1000;
	805	+ int ph;
	806	+
	807	+ /*
	808	+ * Wait until no further interrupts are presented by the PSL
	809	+ * for this context.
	810	+ */
	811	+ while (timeout--) {
	812	+ ph = cxl_p2n_read(ctx->afu, CXL_PSL_PEHandle_An) & 0xffff;
	813	+ if (ph != ctx->pe)
	814	+ return;
	815	+ dsisr = cxl_p2n_read(ctx->afu, CXL_PSL_DSISR_An);
	816	+ if ((dsisr & CXL_PSL_DSISR_PENDING) == 0)
	817	+ return;
	818	+ /*
	819	+ * We are waiting for the workqueue to process our
	820	+ * irq, so need to let that run here.
	821	+ */
	822	+ msleep(1);
	823	+ }
	824	+
	825	+ dev_warn(&ctx->afu->dev, "WARNING: waiting on DSI for PE %i"
	826	+ " DSISR %016llx!\n", ph, dsisr);
	827	+ return;
	828	+}
	829	+
800	830	static irqreturn_t native_slice_irq_err(int irq, void *data)
801	831	{
802	832	struct cxl_afu *afu = data;
@@ -1076,6 +1106,7 @@ const struct cxl_backend_ops cxl_native_ops = { · 273 unmodified lines
1076	1106	.handle_psl_slice_error = native_handle_psl_slice_error,
1077	1107	.psl_interrupt = NULL,
1078	1108	.ack_irq = native_ack_irq,
	1109	+ .irq_wait = native_irq_wait,
1079	1110	.attach_process = native_attach_process,
1080	1111	.detach_process = native_detach_process,
1081	1112	.support_attributes = native_support_attributes,

drivers/mmc/host/Kconfig+1−0

@@ -97,6 +97,7 @@ config MMC_RICOH_MMC · 96 unmodified lines
97	97	config MMC_SDHCI_ACPI
98	98	tristate "SDHCI support for ACPI enumerated SDHCI controllers"
99	99	depends on MMC_SDHCI && ACPI
	100	+ select IOSF_MBI if X86
100	101	help
101	102	This selects support for ACPI enumerated SDHCI controllers,
102	103	identified by ACPI Compatibility ID PNP0D40 or specific

drivers/mmc/host/sdhci-acpi.c+81−0

@@ -41,6 +41,11 @@ · 40 unmodified lines
41	41	#include <linux/mmc/pm.h>
42	42	#include <linux/mmc/slot-gpio.h>
43	43
	44	+#ifdef CONFIG_X86
	45	+#include <asm/cpu_device_id.h>
	46	+#include <asm/iosf_mbi.h>
	47	+#endif
	48	+
44	49	#include "sdhci.h"
45	50
46	51	enum {
@@ -116,6 +121,75 @@ static const struct sdhci_acpi_chip sdhci_acpi_chip_int = { · 69 unmodified lines
116	121	.ops = &sdhci_acpi_ops_int,
117	122	};
118	123
	124	+#ifdef CONFIG_X86
	125	+
	126	+static bool sdhci_acpi_byt(void)
	127	+{
	128	+ static const struct x86_cpu_id byt[] = {
	129	+ { X86_VENDOR_INTEL, 6, 0x37 },
	130	+ {}
	131	+ };
	132	+
	133	+ return x86_match_cpu(byt);
	134	+}
	135	+
	136	+#define BYT_IOSF_SCCEP 0x63
	137	+#define BYT_IOSF_OCP_NETCTRL0 0x1078
	138	+#define BYT_IOSF_OCP_TIMEOUT_BASE GENMASK(10, 8)
	139	+
	140	+static void sdhci_acpi_byt_setting(struct device *dev)
	141	+{
	142	+ u32 val = 0;
	143	+
	144	+ if (!sdhci_acpi_byt())
	145	+ return;
	146	+
	147	+ if (iosf_mbi_read(BYT_IOSF_SCCEP, MBI_CR_READ, BYT_IOSF_OCP_NETCTRL0,
	148	+ &val)) {
	149	+ dev_err(dev, "%s read error\n", __func__);
	150	+ return;
	151	+ }
	152	+
	153	+ if (!(val & BYT_IOSF_OCP_TIMEOUT_BASE))
	154	+ return;
	155	+
	156	+ val &= ~BYT_IOSF_OCP_TIMEOUT_BASE;
	157	+
	158	+ if (iosf_mbi_write(BYT_IOSF_SCCEP, MBI_CR_WRITE, BYT_IOSF_OCP_NETCTRL0,
	159	+ val)) {
	160	+ dev_err(dev, "%s write error\n", __func__);
	161	+ return;
	162	+ }
	163	+
	164	+ dev_dbg(dev, "%s completed\n", __func__);
	165	+}
	166	+
	167	+static bool sdhci_acpi_byt_defer(struct device *dev)
	168	+{
	169	+ if (!sdhci_acpi_byt())
	170	+ return false;
	171	+
	172	+ if (!iosf_mbi_available())
	173	+ return true;
	174	+
	175	+ sdhci_acpi_byt_setting(dev);
	176	+
	177	+ return false;
	178	+}
	179	+
	180	+#else
	181	+
	182	+static inline void sdhci_acpi_byt_setting(struct device *dev)
	183	+{
	184	+}
	185	+
	186	+static inline bool sdhci_acpi_byt_defer(struct device *dev)
	187	+{
	188	+ return false;
	189	+}
	190	+
	191	+#endif
	192	+
119	193	static int bxt_get_cd(struct mmc_host *mmc)
120	194	{
121	195	int gpio_cd = mmc_gpio_get_cd(mmc);
@@ -322,6 +396,9 @@ static int sdhci_acpi_probe(struct platform_device *pdev) · 200 unmodified lines
322	396	if (acpi_bus_get_status(device) \|\| !device->status.present)
323	397	return -ENODEV;
324	398
	399	+ if (sdhci_acpi_byt_defer(dev))
	400	+ return -EPROBE_DEFER;
	401	+
325	402	hid = acpi_device_hid(device);
326	403	uid = device->pnp.unique_id;
327	404
@@ -447,6 +524,8 @@ static int sdhci_acpi_resume(struct device *dev) · 119 unmodified lines
447	524	{
448	525	struct sdhci_acpi_host *c = dev_get_drvdata(dev);
449	526
	527	+ sdhci_acpi_byt_setting(&c->pdev->dev);
	528	+
450	529	return sdhci_resume_host(c->host);
451	530	}
452	531
@@ -470,6 +549,8 @@ static int sdhci_acpi_runtime_resume(struct device *dev) · 17 unmodified lines
470	549	{
471	550	struct sdhci_acpi_host *c = dev_get_drvdata(dev);
472	551
	552	+ sdhci_acpi_byt_setting(&c->pdev->dev);
	553	+
473	554	return sdhci_runtime_resume_host(c->host);
474	555	}
475	556

drivers/mmc/host/sunxi-mmc.c+5−0

@@ -1129,6 +1129,11 @@ static int sunxi_mmc_probe(struct platform_device *pdev) · 1128 unmodified lines
1129	1129	MMC_CAP_1_8V_DDR \|
1130	1130	MMC_CAP_ERASE \| MMC_CAP_SDIO_IRQ;
1131	1131
	1132	+ /* TODO MMC DDR is not working on A80 */
	1133	+ if (of_device_is_compatible(pdev->dev.of_node,
	1134	+ "allwinner,sun9i-a80-mmc"))
	1135	+ mmc->caps &= ~MMC_CAP_1_8V_DDR;
	1136	+
1132	1137	ret = mmc_of_parse(mmc);
1133	1138	if (ret)
1134	1139	goto error_free_dma;

drivers/net/Kconfig+2−3

@@ -62,9 +62,8 @@ config DUMMY · 61 unmodified lines
62	62	this device is consigned into oblivion) with a configurable IP
63	63	address. It is most commonly used in order to make your currently
64	64	inactive SLIP address seem like a real address for local programs.
65		− If you use SLIP or PPP, you might want to say Y here. Since this
66		− thing often comes in handy, the default is Y. It won't enlarge your
67		− kernel either. What a deal. Read about it in the Network
	65	+ If you use SLIP or PPP, you might want to say Y here. It won't
	66	+ enlarge your kernel. What a deal. Read about it in the Network
68	67	Administrator's Guide, available from
69	68	<http://www.tldp.org/docs.html#guide>.
70	69

drivers/net/ethernet/mellanox/mlx4/en_tx.c+4−2

@@ -405,7 +405,6 @@ static bool mlx4_en_process_tx_cq(struct net_device *dev, · 404 unmodified lines
405	405	u32 packets = 0;
406	406	u32 bytes = 0;
407	407	int factor = priv->cqe_factor;
408		− u64 timestamp = 0;
409	408	int done = 0;
410	409	int budget = priv->tx_work_limit;
411	410	u32 last_nr_txbb;
@@ -445,9 +444,12 @@ static bool mlx4_en_process_tx_cq(struct net_device *dev, · 33 unmodified lines
445	444	new_index = be16_to_cpu(cqe->wqe_index) & size_mask;
446	445
447	446	do {
	447	+ u64 timestamp = 0;
	448	+
448	449	txbbs_skipped += last_nr_txbb;
449	450	ring_index = (ring_index + last_nr_txbb) & size_mask;
450		− if (ring->tx_info[ring_index].ts_requested)
	451	+
	452	+ if (unlikely(ring->tx_info[ring_index].ts_requested))
451	453	timestamp = mlx4_en_get_cqe_ts(cqe);
452	454
453	455	/* free next descriptor */

drivers/net/ethernet/mellanox/mlx5/core/en.h+1−1

@@ -609,7 +609,7 @@ enum mlx5e_link_mode { · 608 unmodified lines
609	609	MLX5E_100GBASE_KR4 = 22,
610	610	MLX5E_100GBASE_LR4 = 23,
611	611	MLX5E_100BASE_TX = 24,
612		− MLX5E_100BASE_T = 25,
	612	+ MLX5E_1000BASE_T = 25,
613	613	MLX5E_10GBASE_T = 26,
614	614	MLX5E_25GBASE_CR = 27,
615	615	MLX5E_25GBASE_KR = 28,

drivers/net/ethernet/mellanox/mlx5/core/en_ethtool.c+4−4

@@ -138,10 +138,10 @@ static const struct { · 137 unmodified lines
138	138	[MLX5E_100BASE_TX] = {
139	139	.speed = 100,
140	140	},
141		− [MLX5E_100BASE_T] = {
142		− .supported = SUPPORTED_100baseT_Full,
143		− .advertised = ADVERTISED_100baseT_Full,
144		− .speed = 100,
	141	+ [MLX5E_1000BASE_T] = {
	142	+ .supported = SUPPORTED_1000baseT_Full,
	143	+ .advertised = ADVERTISED_1000baseT_Full,
	144	+ .speed = 1000,
145	145	},
146	146	[MLX5E_10GBASE_T] = {
147	147	.supported = SUPPORTED_10000baseT_Full,

drivers/net/ethernet/mellanox/mlx5/core/en_main.c+57−15

@@ -1404,24 +1404,50 @@ static int mlx5e_refresh_tirs_self_loopback_enable(struct mlx5e_priv *priv) · 1403 unmodified lines
1404	1404	return 0;
1405	1405	}
1406	1406
1407		−static int mlx5e_set_dev_port_mtu(struct net_device *netdev)
	1407	+static int mlx5e_set_mtu(struct mlx5e_priv *priv, u16 mtu)
1408	1408	{
1409		− struct mlx5e_priv *priv = netdev_priv(netdev);
1410	1409	struct mlx5_core_dev *mdev = priv->mdev;
1411		− int hw_mtu;
	1410	+ u16 hw_mtu = MLX5E_SW2HW_MTU(mtu);
1412	1411	int err;
1413	1412
1414		− err = mlx5_set_port_mtu(mdev, MLX5E_SW2HW_MTU(netdev->mtu), 1);
	1413	+ err = mlx5_set_port_mtu(mdev, hw_mtu, 1);
1415	1414	if (err)
1416	1415	return err;
1417	1416
1418		− mlx5_query_port_oper_mtu(mdev, &hw_mtu, 1);
	1417	+ /* Update vport context MTU */
	1418	+ mlx5_modify_nic_vport_mtu(mdev, hw_mtu);
	1419	+ return 0;
	1420	+}
1419	1421
1420		− if (MLX5E_HW2SW_MTU(hw_mtu) != netdev->mtu)
1421		− netdev_warn(netdev, "%s: Port MTU %d is different than netdev mtu %d\n",
1422		− __func__, MLX5E_HW2SW_MTU(hw_mtu), netdev->mtu);
	1422	+static void mlx5e_query_mtu(struct mlx5e_priv priv, u16 mtu)
	1423	+{
	1424	+ struct mlx5_core_dev *mdev = priv->mdev;
	1425	+ u16 hw_mtu = 0;
	1426	+ int err;
1423	1427
1424		− netdev->mtu = MLX5E_HW2SW_MTU(hw_mtu);
	1428	+ err = mlx5_query_nic_vport_mtu(mdev, &hw_mtu);
	1429	+ if (err \|\| !hw_mtu) /* fallback to port oper mtu */
	1430	+ mlx5_query_port_oper_mtu(mdev, &hw_mtu, 1);
	1431	+
	1432	+ *mtu = MLX5E_HW2SW_MTU(hw_mtu);
	1433	+}
	1434	+
	1435	+static int mlx5e_set_dev_port_mtu(struct net_device *netdev)
	1436	+{
	1437	+ struct mlx5e_priv *priv = netdev_priv(netdev);
	1438	+ u16 mtu;
	1439	+ int err;
	1440	+
	1441	+ err = mlx5e_set_mtu(priv, netdev->mtu);
	1442	+ if (err)
	1443	+ return err;
	1444	+
	1445	+ mlx5e_query_mtu(priv, &mtu);
	1446	+ if (mtu != netdev->mtu)
	1447	+ netdev_warn(netdev, "%s: VPort MTU %d is different than netdev mtu %d\n",
	1448	+ __func__, mtu, netdev->mtu);
	1449	+
	1450	+ netdev->mtu = mtu;
1425	1451	return 0;
1426	1452	}
1427	1453
@@ -1999,22 +2025,27 @@ static int mlx5e_set_features(struct net_device *netdev, · 571 unmodified lines
1999	2025	return err;
2000	2026	}
2001	2027
	2028	+#define MXL5_HW_MIN_MTU 64
	2029	+#define MXL5E_MIN_MTU (MXL5_HW_MIN_MTU + ETH_FCS_LEN)
	2030	+
2002	2031	static int mlx5e_change_mtu(struct net_device *netdev, int new_mtu)
2003	2032	{
2004	2033	struct mlx5e_priv *priv = netdev_priv(netdev);
2005	2034	struct mlx5_core_dev *mdev = priv->mdev;
2006	2035	bool was_opened;
2007		− int max_mtu;
	2036	+ u16 max_mtu;
	2037	+ u16 min_mtu;
2008	2038	int err = 0;
2009	2039
2010	2040	mlx5_query_port_max_mtu(mdev, &max_mtu, 1);
2011	2041
2012	2042	max_mtu = MLX5E_HW2SW_MTU(max_mtu);
	2043	+ min_mtu = MLX5E_HW2SW_MTU(MXL5E_MIN_MTU);
2013	2044
2014		− if (new_mtu > max_mtu) {
	2045	+ if (new_mtu > max_mtu \|\| new_mtu < min_mtu) {
2015	2046	netdev_err(netdev,
2016		− "%s: Bad MTU (%d) > (%d) Max\n",
2017		− __func__, new_mtu, max_mtu);
	2047	+ "%s: Bad MTU (%d), valid range is: [%d..%d]\n",
	2048	+ __func__, new_mtu, min_mtu, max_mtu);
2018	2049	return -EINVAL;
2019	2050	}
2020	2051
@@ -2602,7 +2633,16 @@ static void mlx5e_destroy_netdev(struct mlx5_core_dev mdev, void vpriv) · 581 unmodified lines
2602	2633	schedule_work(&priv->set_rx_mode_work);
2603	2634	mlx5e_disable_async_events(priv);
2604	2635	flush_scheduled_work();
2605		− unregister_netdev(netdev);
	2636	+ if (test_bit(MLX5_INTERFACE_STATE_SHUTDOWN, &mdev->intf_state)) {
	2637	+ netif_device_detach(netdev);
	2638	+ mutex_lock(&priv->state_lock);
	2639	+ if (test_bit(MLX5E_STATE_OPENED, &priv->state))
	2640	+ mlx5e_close_locked(netdev);
	2641	+ mutex_unlock(&priv->state_lock);
	2642	+ } else {
	2643	+ unregister_netdev(netdev);
	2644	+ }
	2645	+
2606	2646	mlx5e_tc_cleanup(priv);
2607	2647	mlx5e_vxlan_cleanup(priv);
2608	2648	mlx5e_destroy_flow_tables(priv);
@@ -2615,7 +2655,9 @@ static void mlx5e_destroy_netdev(struct mlx5_core_dev mdev, void vpriv) · 6 unmodified lines
2615	2655	mlx5_core_dealloc_transport_domain(priv->mdev, priv->tdn);
2616	2656	mlx5_core_dealloc_pd(priv->mdev, priv->pdn);
2617	2657	mlx5_unmap_free_uar(priv->mdev, &priv->cq_uar);
2618		− free_netdev(netdev);
	2658	+
	2659	+ if (!test_bit(MLX5_INTERFACE_STATE_SHUTDOWN, &mdev->intf_state))
	2660	+ free_netdev(netdev);
2619	2661	}
2620	2662
2621	2663	static void mlx5e_get_netdev(void vpriv)

drivers/net/ethernet/mellanox/mlx5/core/fs_core.c+18−30

@@ -1065,33 +1065,6 @@ unlock_fg: · 1064 unmodified lines
1065	1065	return rule;
1066	1066	}
1067	1067
1068		−static struct mlx5_flow_rule add_rule_to_auto_fg(struct mlx5_flow_table ft,
1069		− u8 match_criteria_enable,
1070		− u32 *match_criteria,
1071		− u32 *match_value,
1072		− u8 action,
1073		− u32 flow_tag,
1074		− struct mlx5_flow_destination *dest)
1075		−{
1076		− struct mlx5_flow_rule *rule;
1077		− struct mlx5_flow_group *g;
1078		−
1079		− g = create_autogroup(ft, match_criteria_enable, match_criteria);
1080		− if (IS_ERR(g))
1081		− return (void *)g;
1082		−
1083		− rule = add_rule_fg(g, match_value,
1084		− action, flow_tag, dest);
1085		− if (IS_ERR(rule)) {
1086		− /* Remove assumes refcount > 0 and autogroup creates a group
1087		− * with a refcount = 0.
1088		− */
1089		− tree_get_node(&g->node);
1090		− tree_remove_node(&g->node);
1091		− }
1092		− return rule;
1093		−}
1094		−
1095	1068	static struct mlx5_flow_rule *
1096	1069	_mlx5_add_flow_rule(struct mlx5_flow_table *ft,
1097	1070	u8 match_criteria_enable,
@@ -1119,8 +1092,23 @@ _mlx5_add_flow_rule(struct mlx5_flow_table *ft, · 21 unmodified lines
1119	1092	goto unlock;
1120	1093	}
1121	1094
1122		− rule = add_rule_to_auto_fg(ft, match_criteria_enable, match_criteria,
1123		− match_value, action, flow_tag, dest);
	1095	+ g = create_autogroup(ft, match_criteria_enable, match_criteria);
	1096	+ if (IS_ERR(g)) {
	1097	+ rule = (void *)g;
	1098	+ goto unlock;
	1099	+ }
	1100	+
	1101	+ rule = add_rule_fg(g, match_value,
	1102	+ action, flow_tag, dest);
	1103	+ if (IS_ERR(rule)) {
	1104	+ /* Remove assumes refcount > 0 and autogroup creates a group
	1105	+ * with a refcount = 0.
	1106	+ */
	1107	+ unlock_ref_node(&ft->node);
	1108	+ tree_get_node(&g->node);
	1109	+ tree_remove_node(&g->node);
	1110	+ return rule;
	1111	+ }
1124	1112	unlock:
1125	1113	unlock_ref_node(&ft->node);
1126	1114	return rule;
@@ -1288,7 +1276,7 @@ struct mlx5_flow_namespace mlx5_get_flow_namespace(struct mlx5_core_dev dev, · 161 unmodified lines
1288	1276	{
1289	1277	struct mlx5_flow_root_namespace *root_ns = dev->priv.root_ns;
1290	1278	int prio;
1291		− static struct fs_prio *fs_prio;
	1279	+ struct fs_prio *fs_prio;
1292	1280	struct mlx5_flow_namespace *ns;
1293	1281
1294	1282	if (!root_ns)

drivers/net/ethernet/mellanox/mlx5/core/main.c+21−4

@@ -966,7 +966,7 @@ static int mlx5_load_one(struct mlx5_core_dev dev, struct mlx5_priv priv) · 965 unmodified lines
966	966	int err;
967	967
968	968	mutex_lock(&dev->intf_state_mutex);
969		− if (dev->interface_state == MLX5_INTERFACE_STATE_UP) {
	969	+ if (test_bit(MLX5_INTERFACE_STATE_UP, &dev->intf_state)) {
970	970	dev_warn(&dev->pdev->dev, "%s: interface is up, NOP\n",
971	971	__func__);
972	972	goto out;
@@ -1133,7 +1133,8 @@ static int mlx5_load_one(struct mlx5_core_dev dev, struct mlx5_priv priv) · 160 unmodified lines
1133	1133	if (err)
1134	1134	pr_info("failed request module on %s\n", MLX5_IB_MOD);
1135	1135
1136		− dev->interface_state = MLX5_INTERFACE_STATE_UP;
	1136	+ clear_bit(MLX5_INTERFACE_STATE_DOWN, &dev->intf_state);
	1137	+ set_bit(MLX5_INTERFACE_STATE_UP, &dev->intf_state);
1137	1138	out:
1138	1139	mutex_unlock(&dev->intf_state_mutex);
1139	1140
@@ -1207,7 +1208,7 @@ static int mlx5_unload_one(struct mlx5_core_dev dev, struct mlx5_priv priv) · 67 unmodified lines
1207	1208	}
1208	1209
1209	1210	mutex_lock(&dev->intf_state_mutex);
1210		− if (dev->interface_state == MLX5_INTERFACE_STATE_DOWN) {
	1211	+ if (test_bit(MLX5_INTERFACE_STATE_DOWN, &dev->intf_state)) {
1211	1212	dev_warn(&dev->pdev->dev, "%s: interface is down, NOP\n",
1212	1213	__func__);
1213	1214	goto out;
@@ -1241,7 +1242,8 @@ static int mlx5_unload_one(struct mlx5_core_dev dev, struct mlx5_priv priv) · 27 unmodified lines
1241	1242	mlx5_cmd_cleanup(dev);
1242	1243
1243	1244	out:
1244		− dev->interface_state = MLX5_INTERFACE_STATE_DOWN;
	1245	+ clear_bit(MLX5_INTERFACE_STATE_UP, &dev->intf_state);
	1246	+ set_bit(MLX5_INTERFACE_STATE_DOWN, &dev->intf_state);
1245	1247	mutex_unlock(&dev->intf_state_mutex);
1246	1248	return err;
1247	1249	}
@@ -1452,6 +1454,18 @@ static const struct pci_error_handlers mlx5_err_handler = { · 204 unmodified lines
1452	1454	.resume = mlx5_pci_resume
1453	1455	};
1454	1456
	1457	+static void shutdown(struct pci_dev *pdev)
	1458	+{
	1459	+ struct mlx5_core_dev *dev = pci_get_drvdata(pdev);
	1460	+ struct mlx5_priv *priv = &dev->priv;
	1461	+
	1462	+ dev_info(&pdev->dev, "Shutdown was called\n");
	1463	+ /* Notify mlx5 clients that the kernel is being shut down */
	1464	+ set_bit(MLX5_INTERFACE_STATE_SHUTDOWN, &dev->intf_state);
	1465	+ mlx5_unload_one(dev, priv);
	1466	+ mlx5_pci_disable_device(dev);
	1467	+}
	1468	+
1455	1469	static const struct pci_device_id mlx5_core_pci_table[] = {
1456	1470	{ PCI_VDEVICE(MELLANOX, 0x1011) }, /* Connect-IB */
1457	1471	{ PCI_VDEVICE(MELLANOX, 0x1012), MLX5_PCI_DEV_IS_VF}, /* Connect-IB VF */
@@ -1459,6 +1473,8 @@ static const struct pci_device_id mlx5_core_pci_table[] = { · 1 unmodified line
1459	1473	{ PCI_VDEVICE(MELLANOX, 0x1014), MLX5_PCI_DEV_IS_VF}, /* ConnectX-4 VF */
1460	1474	{ PCI_VDEVICE(MELLANOX, 0x1015) }, /* ConnectX-4LX */
1461	1475	{ PCI_VDEVICE(MELLANOX, 0x1016), MLX5_PCI_DEV_IS_VF}, /* ConnectX-4LX VF */
	1476	+ { PCI_VDEVICE(MELLANOX, 0x1017) }, /* ConnectX-5 */
	1477	+ { PCI_VDEVICE(MELLANOX, 0x1018), MLX5_PCI_DEV_IS_VF}, /* ConnectX-5 VF */
1462	1478	{ 0, }
1463	1479	};
1464	1480
@@ -1469,6 +1485,7 @@ static struct pci_driver mlx5_core_driver = { · 4 unmodified lines
1469	1485	.id_table = mlx5_core_pci_table,
1470	1486	.probe = init_one,
1471	1487	.remove = remove_one,
	1488	+ .shutdown = shutdown,
1472	1489	.err_handler = &mlx5_err_handler,
1473	1490	.sriov_configure = mlx5_core_sriov_configure,
1474	1491	};

drivers/net/ethernet/mellanox/mlx5/core/port.c+5−5

@@ -247,8 +247,8 @@ int mlx5_query_port_admin_status(struct mlx5_core_dev *dev, · 246 unmodified lines
247	247	}
248	248	EXPORT_SYMBOL_GPL(mlx5_query_port_admin_status);
249	249
250		−static void mlx5_query_port_mtu(struct mlx5_core_dev dev, int admin_mtu,
251		− int max_mtu, int oper_mtu, u8 port)
	250	+static void mlx5_query_port_mtu(struct mlx5_core_dev dev, u16 admin_mtu,
	251	+ u16 max_mtu, u16 oper_mtu, u8 port)
252	252	{
253	253	u32 in[MLX5_ST_SZ_DW(pmtu_reg)];
254	254	u32 out[MLX5_ST_SZ_DW(pmtu_reg)];
@@ -268,7 +268,7 @@ static void mlx5_query_port_mtu(struct mlx5_core_dev dev, int admin_mtu, · 13 unmodified lines
268	268	*admin_mtu = MLX5_GET(pmtu_reg, out, admin_mtu);
269	269	}
270	270
271		−int mlx5_set_port_mtu(struct mlx5_core_dev *dev, int mtu, u8 port)
	271	+int mlx5_set_port_mtu(struct mlx5_core_dev *dev, u16 mtu, u8 port)
272	272	{
273	273	u32 in[MLX5_ST_SZ_DW(pmtu_reg)];
274	274	u32 out[MLX5_ST_SZ_DW(pmtu_reg)];
@@ -283,14 +283,14 @@ int mlx5_set_port_mtu(struct mlx5_core_dev *dev, int mtu, u8 port) · 8 unmodified lines
283	283	}
284	284	EXPORT_SYMBOL_GPL(mlx5_set_port_mtu);
285	285
286		−void mlx5_query_port_max_mtu(struct mlx5_core_dev dev, int max_mtu,
	286	+void mlx5_query_port_max_mtu(struct mlx5_core_dev dev, u16 max_mtu,
287	287	u8 port)
288	288	{
289	289	mlx5_query_port_mtu(dev, NULL, max_mtu, NULL, port);
290	290	}
291	291	EXPORT_SYMBOL_GPL(mlx5_query_port_max_mtu);
292	292
293		−void mlx5_query_port_oper_mtu(struct mlx5_core_dev dev, int oper_mtu,
	293	+void mlx5_query_port_oper_mtu(struct mlx5_core_dev dev, u16 oper_mtu,
294	294	u8 port)
295	295	{
296	296	mlx5_query_port_mtu(dev, NULL, NULL, oper_mtu, port);

drivers/net/ethernet/mellanox/mlx5/core/vport.c+40−0

@@ -196,6 +196,46 @@ int mlx5_modify_nic_vport_mac_address(struct mlx5_core_dev *mdev, · 195 unmodified lines
196	196	}
197	197	EXPORT_SYMBOL_GPL(mlx5_modify_nic_vport_mac_address);
198	198
	199	+int mlx5_query_nic_vport_mtu(struct mlx5_core_dev mdev, u16 mtu)
	200	+{
	201	+ int outlen = MLX5_ST_SZ_BYTES(query_nic_vport_context_out);
	202	+ u32 *out;
	203	+ int err;
	204	+
	205	+ out = mlx5_vzalloc(outlen);
	206	+ if (!out)
	207	+ return -ENOMEM;
	208	+
	209	+ err = mlx5_query_nic_vport_context(mdev, 0, out, outlen);
	210	+ if (!err)
	211	+ *mtu = MLX5_GET(query_nic_vport_context_out, out,
	212	+ nic_vport_context.mtu);
	213	+
	214	+ kvfree(out);
	215	+ return err;
	216	+}
	217	+EXPORT_SYMBOL_GPL(mlx5_query_nic_vport_mtu);
	218	+
	219	+int mlx5_modify_nic_vport_mtu(struct mlx5_core_dev *mdev, u16 mtu)
	220	+{
	221	+ int inlen = MLX5_ST_SZ_BYTES(modify_nic_vport_context_in);
	222	+ void *in;
	223	+ int err;
	224	+
	225	+ in = mlx5_vzalloc(inlen);
	226	+ if (!in)
	227	+ return -ENOMEM;
	228	+
	229	+ MLX5_SET(modify_nic_vport_context_in, in, field_select.mtu, 1);
	230	+ MLX5_SET(modify_nic_vport_context_in, in, nic_vport_context.mtu, mtu);
	231	+
	232	+ err = mlx5_modify_nic_vport_context(mdev, in, inlen);
	233	+
	234	+ kvfree(in);
	235	+ return err;
	236	+}
	237	+EXPORT_SYMBOL_GPL(mlx5_modify_nic_vport_mtu);
	238	+
199	239	int mlx5_query_nic_vport_mac_list(struct mlx5_core_dev *dev,
200	240	u32 vport,
201	241	enum mlx5_list_type list_type,

drivers/net/ethernet/qlogic/qlcnic/qlcnic.h+2−2

@@ -37,8 +37,8 @@ · 36 unmodified lines
37	37
38	38	#define _QLCNIC_LINUX_MAJOR 5
39	39	#define _QLCNIC_LINUX_MINOR 3
40		−#define _QLCNIC_LINUX_SUBVERSION 63
41		−#define QLCNIC_LINUX_VERSIONID "5.3.63"
	40	+#define _QLCNIC_LINUX_SUBVERSION 64
	41	+#define QLCNIC_LINUX_VERSIONID "5.3.64"
42	42	#define QLCNIC_DRV_IDC_VER 0x01
43	43	#define QLCNIC_DRIVER_VERSION ((_QLCNIC_LINUX_MAJOR << 16) \|\
44	44	(_QLCNIC_LINUX_MINOR << 8) \| (_QLCNIC_LINUX_SUBVERSION))

drivers/net/ethernet/stmicro/stmmac/dwmac-socfpga.c+16−34

@@ -49,7 +49,6 @@ struct socfpga_dwmac { · 48 unmodified lines
49	49	u32 reg_shift;
50	50	struct device *dev;
51	51	struct regmap *sys_mgr_base_addr;
52		− struct reset_control *stmmac_rst;
53	52	void __iomem *splitter_base;
54	53	bool f2h_ptp_ref_clk;
55	54	};
@@ -92,15 +91,6 @@ static int socfpga_dwmac_parse_data(struct socfpga_dwmac dwmac, struct device · 36 unmodified lines
92	91	struct device_node *np_splitter;
93	92	struct resource res_splitter;
94	93
95		− dwmac->stmmac_rst = devm_reset_control_get(dev,
96		− STMMAC_RESOURCE_NAME);
97		− if (IS_ERR(dwmac->stmmac_rst)) {
98		− dev_info(dev, "Could not get reset control!\n");
99		− if (PTR_ERR(dwmac->stmmac_rst) == -EPROBE_DEFER)
100		− return -EPROBE_DEFER;
101		− dwmac->stmmac_rst = NULL;
102		− }
103		−
104	94	dwmac->interface = of_get_phy_mode(np);
105	95
106	96	sys_mgr_base_addr = syscon_regmap_lookup_by_phandle(np, "altr,sysmgr-syscon");
@@ -194,30 +184,23 @@ static int socfpga_dwmac_setup(struct socfpga_dwmac *dwmac) · 87 unmodified lines
194	184	return 0;
195	185	}
196	186
197		−static void socfpga_dwmac_exit(struct platform_device pdev, void priv)
198		−{
199		− struct socfpga_dwmac *dwmac = priv;
200		−
201		− /* On socfpga platform exit, assert and hold reset to the
202		− * enet controller - the default state after a hard reset.
203		− */
204		− if (dwmac->stmmac_rst)
205		− reset_control_assert(dwmac->stmmac_rst);
206		−}
207		−
208	187	static int socfpga_dwmac_init(struct platform_device pdev, void priv)
209	188	{
210		− struct socfpga_dwmac *dwmac = priv;
	189	+ struct socfpga_dwmac *dwmac = priv;
211	190	struct net_device *ndev = platform_get_drvdata(pdev);
212	191	struct stmmac_priv *stpriv = NULL;
213	192	int ret = 0;
214	193
215		− if (ndev)
216		− stpriv = netdev_priv(ndev);
	194	+ if (!ndev)
	195	+ return -EINVAL;
	196	+
	197	+ stpriv = netdev_priv(ndev);
	198	+ if (!stpriv)
	199	+ return -EINVAL;
217	200
218	201	/* Assert reset to the enet controller before changing the phy mode */
219		− if (dwmac->stmmac_rst)
220		− reset_control_assert(dwmac->stmmac_rst);
	202	+ if (stpriv->stmmac_rst)
	203	+ reset_control_assert(stpriv->stmmac_rst);
221	204
222	205	/* Setup the phy mode in the system manager registers according to
223	206	* devicetree configuration
@@ -227,8 +210,8 @@ static int socfpga_dwmac_init(struct platform_device pdev, void priv) · 3 unmodified lines
227	210	/* Deassert reset for the phy configuration to be sampled by
228	211	* the enet controller, and operation to start in requested mode
229	212	*/
230		− if (dwmac->stmmac_rst)
231		− reset_control_deassert(dwmac->stmmac_rst);
	213	+ if (stpriv->stmmac_rst)
	214	+ reset_control_deassert(stpriv->stmmac_rst);
232	215
233	216	/* Before the enet controller is suspended, the phy is suspended.
234	217	* This causes the phy clock to be gated. The enet controller is
@@ -245,7 +228,7 @@ static int socfpga_dwmac_init(struct platform_device pdev, void priv) · 10 unmodified lines
245	228	* control register 0, and can be modified by the phy driver
246	229	* framework.
247	230	*/
248		− if (stpriv && stpriv->phydev)
	231	+ if (stpriv->phydev)
249	232	phy_resume(stpriv->phydev);
250	233
251	234	return ret;
@@ -285,14 +268,13 @@ static int socfpga_dwmac_probe(struct platform_device *pdev) · 33 unmodified lines
285	268
286	269	plat_dat->bsp_priv = dwmac;
287	270	plat_dat->init = socfpga_dwmac_init;
288		− plat_dat->exit = socfpga_dwmac_exit;
289	271	plat_dat->fix_mac_speed = socfpga_dwmac_fix_mac_speed;
290	272
291		− ret = socfpga_dwmac_init(pdev, plat_dat->bsp_priv);
292		− if (ret)
293		− return ret;
	273	+ ret = stmmac_dvr_probe(&pdev->dev, plat_dat, &stmmac_res);
	274	+ if (!ret)
	275	+ ret = socfpga_dwmac_init(pdev, dwmac);
294	276
295		− return stmmac_dvr_probe(&pdev->dev, plat_dat, &stmmac_res);
	277	+ return ret;
296	278	}
297	279
298	280	static const struct of_device_id socfpga_dwmac_match[] = {

drivers/net/macsec.c+42−23

@@ -880,12 +880,12 @@ static struct sk_buff macsec_decrypt(struct sk_buff skb, · 879 unmodified lines
880	880	macsec_skb_cb(skb)->valid = false;
881	881	skb = skb_share_check(skb, GFP_ATOMIC);
882	882	if (!skb)
883		− return NULL;
	883	+ return ERR_PTR(-ENOMEM);
884	884
885	885	req = aead_request_alloc(rx_sa->key.tfm, GFP_ATOMIC);
886	886	if (!req) {
887	887	kfree_skb(skb);
888		− return NULL;
	888	+ return ERR_PTR(-ENOMEM);
889	889	}
890	890
891	891	hdr = (struct macsec_eth_header *)skb->data;
@@ -905,7 +905,7 @@ static struct sk_buff macsec_decrypt(struct sk_buff skb, · 13 unmodified lines
905	905	skb = skb_unshare(skb, GFP_ATOMIC);
906	906	if (!skb) {
907	907	aead_request_free(req);
908		− return NULL;
	908	+ return ERR_PTR(-ENOMEM);
909	909	}
910	910	} else {
911	911	/* integrity only: all headers + data authenticated */
@@ -921,14 +921,14 @@ static struct sk_buff macsec_decrypt(struct sk_buff skb, · 9 unmodified lines
921	921	dev_hold(dev);
922	922	ret = crypto_aead_decrypt(req);
923	923	if (ret == -EINPROGRESS) {
924		− return NULL;
	924	+ return ERR_PTR(ret);
925	925	} else if (ret != 0) {
926	926	/* decryption/authentication failed
927	927	* 10.6 if validateFrames is disabled, deliver anyway
928	928	*/
929	929	if (ret != -EBADMSG) {
930	930	kfree_skb(skb);
931		− skb = NULL;
	931	+ skb = ERR_PTR(ret);
932	932	}
933	933	} else {
934	934	macsec_skb_cb(skb)->valid = true;
@@ -1146,8 +1146,10 @@ static rx_handler_result_t macsec_handle_frame(struct sk_buff **pskb) · 211 unmodified lines
1146	1146	secy->validate_frames != MACSEC_VALIDATE_DISABLED)
1147	1147	skb = macsec_decrypt(skb, dev, rx_sa, sci, secy);
1148	1148
1149		− if (!skb) {
1150		− macsec_rxsa_put(rx_sa);
	1149	+ if (IS_ERR(skb)) {
	1150	+ /* the decrypt callback needs the reference */
	1151	+ if (PTR_ERR(skb) != -EINPROGRESS)
	1152	+ macsec_rxsa_put(rx_sa);
1151	1153	rcu_read_unlock();
1152	1154	*pskb = NULL;
1153	1155	return RX_HANDLER_CONSUMED;
@@ -1161,7 +1163,8 @@ deliver: · 7 unmodified lines
1161	1163	macsec_extra_len(macsec_skb_cb(skb)->has_sci));
1162	1164	macsec_reset_skb(skb, secy->netdev);
1163	1165
1164		− macsec_rxsa_put(rx_sa);
	1166	+ if (rx_sa)
	1167	+ macsec_rxsa_put(rx_sa);
1165	1168	count_rx(dev, skb->len);
1166	1169
1167	1170	rcu_read_unlock();
@@ -1622,8 +1625,9 @@ static int macsec_add_rxsa(struct sk_buff skb, struct genl_info info) · 454 unmodified lines
1622	1625	}
1623	1626
1624	1627	rx_sa = kmalloc(sizeof(*rx_sa), GFP_KERNEL);
1625		− if (init_rx_sa(rx_sa, nla_data(tb_sa[MACSEC_SA_ATTR_KEY]), secy->key_len,
1626		− secy->icv_len)) {
	1628	+ if (!rx_sa \|\| init_rx_sa(rx_sa, nla_data(tb_sa[MACSEC_SA_ATTR_KEY]),
	1629	+ secy->key_len, secy->icv_len)) {
	1630	+ kfree(rx_sa);
1627	1631	rtnl_unlock();
1628	1632	return -ENOMEM;
1629	1633	}
@@ -1768,6 +1772,7 @@ static int macsec_add_txsa(struct sk_buff skb, struct genl_info info) · 138 unmodified lines
1768	1772	tx_sa = kmalloc(sizeof(*tx_sa), GFP_KERNEL);
1769	1773	if (!tx_sa \|\| init_tx_sa(tx_sa, nla_data(tb_sa[MACSEC_SA_ATTR_KEY]),
1770	1774	secy->key_len, secy->icv_len)) {
	1775	+ kfree(tx_sa);
1771	1776	rtnl_unlock();
1772	1777	return -ENOMEM;
1773	1778	}
@@ -2227,7 +2232,8 @@ static int nla_put_secy(struct macsec_secy secy, struct sk_buff skb) · 453 unmodified lines
2227	2232	return 1;
2228	2233
2229	2234	if (nla_put_sci(skb, MACSEC_SECY_ATTR_SCI, secy->sci) \|\|
2230		− nla_put_u64(skb, MACSEC_SECY_ATTR_CIPHER_SUITE, DEFAULT_CIPHER_ID) \|\|
	2235	+ nla_put_u64(skb, MACSEC_SECY_ATTR_CIPHER_SUITE,
	2236	+ MACSEC_DEFAULT_CIPHER_ID) \|\|
2231	2237	nla_put_u8(skb, MACSEC_SECY_ATTR_ICV_LEN, secy->icv_len) \|\|
2232	2238	nla_put_u8(skb, MACSEC_SECY_ATTR_OPER, secy->operational) \|\|
2233	2239	nla_put_u8(skb, MACSEC_SECY_ATTR_PROTECT, secy->protect_frames) \|\|
@@ -2268,7 +2274,7 @@ static int dump_secy(struct macsec_secy secy, struct net_device dev, · 34 unmodified lines
2268	2274	if (!hdr)
2269	2275	return -EMSGSIZE;
2270	2276
2271		− rtnl_lock();
	2277	+ genl_dump_check_consistent(cb, hdr, &macsec_fam);
2272	2278
2273	2279	if (nla_put_u32(skb, MACSEC_ATTR_IFINDEX, dev->ifindex))
2274	2280	goto nla_put_failure;
@@ -2429,18 +2435,17 @@ static int dump_secy(struct macsec_secy secy, struct net_device dev, · 154 unmodified lines
2429	2435
2430	2436	nla_nest_end(skb, rxsc_list);
2431	2437
2432		− rtnl_unlock();
2433		−
2434	2438	genlmsg_end(skb, hdr);
2435	2439
2436	2440	return 0;
2437	2441
2438	2442	nla_put_failure:
2439		− rtnl_unlock();
2440	2443	genlmsg_cancel(skb, hdr);
2441	2444	return -EMSGSIZE;
2442	2445	}
2443	2446
	2447	+static int macsec_generation = 1; /* protected by RTNL */
	2448	+
2444	2449	static int macsec_dump_txsc(struct sk_buff skb, struct netlink_callback cb)
2445	2450	{
2446	2451	struct net *net = sock_net(skb->sk);
@@ -2450,6 +2455,10 @@ static int macsec_dump_txsc(struct sk_buff skb, struct netlink_callback cb) · 3 unmodified lines
2450	2455	dev_idx = cb->args[0];
2451	2456
2452	2457	d = 0;
	2458	+ rtnl_lock();
	2459	+
	2460	+ cb->seq = macsec_generation;
	2461	+
2453	2462	for_each_netdev(net, dev) {
2454	2463	struct macsec_secy *secy;
2455	2464
@@ -2467,6 +2476,7 @@ next: · 11 unmodified lines
2467	2476	}
2468	2477
2469	2478	done:
	2479	+ rtnl_unlock();
2470	2480	cb->args[0] = d;
2471	2481	return skb->len;
2472	2482	}
@@ -2920,10 +2930,14 @@ static void macsec_dellink(struct net_device dev, struct list_head head) · 447 unmodified lines
2920	2930	struct net_device *real_dev = macsec->real_dev;
2921	2931	struct macsec_rxh_data *rxd = macsec_data_rtnl(real_dev);
2922	2932
	2933	+ macsec_generation++;
	2934	+
2923	2935	unregister_netdevice_queue(dev, head);
2924	2936	list_del_rcu(&macsec->secys);
2925		− if (list_empty(&rxd->secys))
	2937	+ if (list_empty(&rxd->secys)) {
2926	2938	netdev_rx_handler_unregister(real_dev);
	2939	+ kfree(rxd);
	2940	+ }
2927	2941
2928	2942	macsec_del_dev(macsec);
2929	2943	}
@@ -2945,8 +2959,10 @@ static int register_macsec_dev(struct net_device *real_dev, · 15 unmodified lines
2945	2959
2946	2960	err = netdev_rx_handler_register(real_dev, macsec_handle_frame,
2947	2961	rxd);
2948		− if (err < 0)
	2962	+ if (err < 0) {
	2963	+ kfree(rxd);
2949	2964	return err;
	2965	+ }
2950	2966	}
2951	2967
2952	2968	list_add_tail_rcu(&macsec->secys, &rxd->secys);
@@ -3066,6 +3082,8 @@ static int macsec_newlink(struct net net, struct net_device dev, · 113 unmodified lines
3066	3082	if (err < 0)
3067	3083	goto del_dev;
3068	3084
	3085	+ macsec_generation++;
	3086	+
3069	3087	dev_hold(real_dev);
3070	3088
3071	3089	return 0;
@@ -3079,7 +3097,7 @@ unregister: · 7 unmodified lines
3079	3097
3080	3098	static int macsec_validate_attr(struct nlattr tb[], struct nlattr data[])
3081	3099	{
3082		− u64 csid = DEFAULT_CIPHER_ID;
	3100	+ u64 csid = MACSEC_DEFAULT_CIPHER_ID;
3083	3101	u8 icv_len = DEFAULT_ICV_LEN;
3084	3102	int flag;
3085	3103	bool es, scb, sci;
@@ -3094,8 +3112,8 @@ static int macsec_validate_attr(struct nlattr tb[], struct nlattr data[]) · 8 unmodified lines
3094	3112	icv_len = nla_get_u8(data[IFLA_MACSEC_ICV_LEN]);
3095	3113
3096	3114	switch (csid) {
3097		− case DEFAULT_CIPHER_ID:
3098		− case DEFAULT_CIPHER_ALT:
	3115	+ case MACSEC_DEFAULT_CIPHER_ID:
	3116	+ case MACSEC_DEFAULT_CIPHER_ALT:
3099	3117	if (icv_len < MACSEC_MIN_ICV_LEN \|\|
3100	3118	icv_len > MACSEC_MAX_ICV_LEN)
3101	3119	return -EINVAL;
@@ -3129,8 +3147,8 @@ static int macsec_validate_attr(struct nlattr tb[], struct nlattr data[]) · 27 unmodified lines
3129	3147	nla_get_u8(data[IFLA_MACSEC_VALIDATION]) > MACSEC_VALIDATE_MAX)
3130	3148	return -EINVAL;
3131	3149
3132		− if ((data[IFLA_MACSEC_PROTECT] &&
3133		− nla_get_u8(data[IFLA_MACSEC_PROTECT])) &&
	3150	+ if ((data[IFLA_MACSEC_REPLAY_PROTECT] &&
	3151	+ nla_get_u8(data[IFLA_MACSEC_REPLAY_PROTECT])) &&
3134	3152	!data[IFLA_MACSEC_WINDOW])
3135	3153	return -EINVAL;
3136	3154
@@ -3168,7 +3186,8 @@ static int macsec_fill_info(struct sk_buff *skb, · 31 unmodified lines
3168	3186
3169	3187	if (nla_put_sci(skb, IFLA_MACSEC_SCI, secy->sci) \|\|
3170	3188	nla_put_u8(skb, IFLA_MACSEC_ICV_LEN, secy->icv_len) \|\|
3171		− nla_put_u64(skb, IFLA_MACSEC_CIPHER_SUITE, DEFAULT_CIPHER_ID) \|\|
	3189	+ nla_put_u64(skb, IFLA_MACSEC_CIPHER_SUITE,
	3190	+ MACSEC_DEFAULT_CIPHER_ID) \|\|
3172	3191	nla_put_u8(skb, IFLA_MACSEC_ENCODING_SA, tx_sc->encoding_sa) \|\|
3173	3192	nla_put_u8(skb, IFLA_MACSEC_ENCRYPT, tx_sc->encrypt) \|\|
3174	3193	nla_put_u8(skb, IFLA_MACSEC_PROTECT, secy->protect_frames) \|\|

drivers/platform/x86/toshiba_acpi.c+1−1

@@ -135,7 +135,7 @@ MODULE_LICENSE("GPL"); · 134 unmodified lines
135	135	/* Field definitions */
136	136	#define HCI_ACCEL_MASK 0x7fff
137	137	#define HCI_HOTKEY_DISABLE 0x0b
138		−#define HCI_HOTKEY_ENABLE 0x01
	138	+#define HCI_HOTKEY_ENABLE 0x09
139	139	#define HCI_HOTKEY_SPECIAL_FUNCTIONS 0x10
140	140	#define HCI_LCD_BRIGHTNESS_BITS 3
141	141	#define HCI_LCD_BRIGHTNESS_SHIFT (16-HCI_LCD_BRIGHTNESS_BITS)

drivers/rapidio/devices/rio_mport_cdev.c+2−2

@@ -2669,9 +2669,9 @@ static int __init mport_init(void) · 2668 unmodified lines
2669	2669
2670	2670	/* Create device class needed by udev */
2671	2671	dev_class = class_create(THIS_MODULE, DRV_NAME);
2672		− if (!dev_class) {
	2672	+ if (IS_ERR(dev_class)) {
2673	2673	rmcd_error("Unable to create " DRV_NAME " class");
2674		− return -EINVAL;
	2674	+ return PTR_ERR(dev_class);
2675	2675	}
2676	2676
2677	2677	ret = alloc_chrdev_region(&dev_number, 0, RIO_MAX_MPORTS, DRV_NAME);

drivers/s390/char/sclp_ctl.c+7−5

@@ -56,6 +56,7 @@ static int sclp_ctl_ioctl_sccb(void __user *user_area) · 55 unmodified lines
56	56	{
57	57	struct sclp_ctl_sccb ctl_sccb;
58	58	struct sccb_header *sccb;
	59	+ unsigned long copied;
59	60	int rc;
60	61
61	62	if (copy_from_user(&ctl_sccb, user_area, sizeof(ctl_sccb)))
@@ -65,14 +66,15 @@ static int sclp_ctl_ioctl_sccb(void __user *user_area) · 3 unmodified lines
65	66	sccb = (void *) get_zeroed_page(GFP_KERNEL \| GFP_DMA);
66	67	if (!sccb)
67	68	return -ENOMEM;
68		− if (copy_from_user(sccb, u64_to_uptr(ctl_sccb.sccb), sizeof(*sccb))) {
	69	+ copied = PAGE_SIZE -
	70	+ copy_from_user(sccb, u64_to_uptr(ctl_sccb.sccb), PAGE_SIZE);
	71	+ if (offsetof(struct sccb_header, length) +
	72	+ sizeof(sccb->length) > copied \|\| sccb->length > copied) {
69	73	rc = -EFAULT;
70	74	goto out_free;
71	75	}
72		− if (sccb->length > PAGE_SIZE \|\| sccb->length < 8)
73		− return -EINVAL;
74		− if (copy_from_user(sccb, u64_to_uptr(ctl_sccb.sccb), sccb->length)) {
75		− rc = -EFAULT;
	76	+ if (sccb->length < 8) {
	77	+ rc = -EINVAL;
76	78	goto out_free;
77	79	}
78	80	rc = sclp_sync_request(ctl_sccb.cmdw, sccb);

drivers/scsi/cxgbi/libcxgbi.c+1−0

@@ -688,6 +688,7 @@ static struct rt6_info find_route_ipv6(const struct in6_addr saddr, · 687 unmodified lines
688	688	{
689	689	struct flowi6 fl;
690	690
	691	+ memset(&fl, 0, sizeof(fl));
691	692	if (saddr)
692	693	memcpy(&fl.saddr, saddr, sizeof(struct in6_addr));
693	694	if (daddr)

drivers/soc/mediatek/mtk-scpsys.c+6−5

@@ -491,13 +491,14 @@ static int scpsys_probe(struct platform_device *pdev) · 490 unmodified lines
491	491	genpd->dev_ops.active_wakeup = scpsys_active_wakeup;
492	492
493	493	/*
494		− * With CONFIG_PM disabled turn on all domains to make the
495		− * hardware usable.
	494	+ * Initially turn on all domains to make the domains usable
	495	+ * with !CONFIG_PM and to get the hardware in sync with the
	496	+ * software. The unused domains will be switched off during
	497	+ * late_init time.
496	498	*/
497		− if (!IS_ENABLED(CONFIG_PM))
498		− genpd->power_on(genpd);
	499	+ genpd->power_on(genpd);
499	500
500		− pm_genpd_init(genpd, NULL, true);
	501	+ pm_genpd_init(genpd, NULL, false);
501	502	}
502	503
503	504	/*

drivers/staging/media/davinci_vpfe/vpfe_video.c+34−20

@@ -172,9 +172,11 @@ static int vpfe_prepare_pipeline(struct vpfe_video_device *video) · 171 unmodified lines
172	172	static int vpfe_update_pipe_state(struct vpfe_video_device *video)
173	173	{
174	174	struct vpfe_pipeline *pipe = &video->pipe;
	175	+ int ret;
175	176
176		− if (vpfe_prepare_pipeline(video))
177		− return vpfe_prepare_pipeline(video);
	177	+ ret = vpfe_prepare_pipeline(video);
	178	+ if (ret)
	179	+ return ret;
178	180
179	181	/*
180	182	* Find out if there is any input video
@@ -182,9 +184,10 @@ static int vpfe_update_pipe_state(struct vpfe_video_device *video) · 1 unmodified line
182	184	*/
183	185	if (pipe->input_num == 0) {
184	186	pipe->state = VPFE_PIPELINE_STREAM_CONTINUOUS;
185		− if (vpfe_update_current_ext_subdev(video)) {
	187	+ ret = vpfe_update_current_ext_subdev(video);
	188	+ if (ret) {
186	189	pr_err("Invalid external subdev\n");
187		− return vpfe_update_current_ext_subdev(video);
	190	+ return ret;
188	191	}
189	192	} else {
190	193	pipe->state = VPFE_PIPELINE_STREAM_SINGLESHOT;
@@ -667,6 +670,7 @@ static int vpfe_enum_fmt(struct file file, void priv, · 476 unmodified lines
667	670	struct v4l2_subdev *subdev;
668	671	struct v4l2_format format;
669	672	struct media_pad *remote;
	673	+ int ret;
670	674
671	675	v4l2_dbg(1, debug, &vpfe_dev->v4l2_dev, "vpfe_enum_fmt\n");
672	676
@@ -695,10 +699,11 @@ static int vpfe_enum_fmt(struct file file, void priv, · 22 unmodified lines
695	699	sd_fmt.pad = remote->index;
696	700	sd_fmt.which = V4L2_SUBDEV_FORMAT_ACTIVE;
697	701	/* get output format of remote subdev */
698		− if (v4l2_subdev_call(subdev, pad, get_fmt, NULL, &sd_fmt)) {
	702	+ ret = v4l2_subdev_call(subdev, pad, get_fmt, NULL, &sd_fmt);
	703	+ if (ret) {
699	704	v4l2_err(&vpfe_dev->v4l2_dev,
700	705	"invalid remote subdev for video node\n");
701		− return v4l2_subdev_call(subdev, pad, get_fmt, NULL, &sd_fmt);
	706	+ return ret;
702	707	}
703	708	/* convert to pix format */
704	709	mbus.code = sd_fmt.format.code;
@@ -725,6 +730,7 @@ static int vpfe_s_fmt(struct file file, void priv, · 20 unmodified lines
725	730	struct vpfe_video_device *video = video_drvdata(file);
726	731	struct vpfe_device *vpfe_dev = video->vpfe_dev;
727	732	struct v4l2_format format;
	733	+ int ret;
728	734
729	735	v4l2_dbg(1, debug, &vpfe_dev->v4l2_dev, "vpfe_s_fmt\n");
730	736	/* If streaming is started, return error */
@@ -733,8 +739,9 @@ static int vpfe_s_fmt(struct file file, void priv, · 2 unmodified lines
733	739	return -EBUSY;
734	740	}
735	741	/* get adjacent subdev's output pad format */
736		− if (__vpfe_video_get_format(video, &format))
737		− return __vpfe_video_get_format(video, &format);
	742	+ ret = __vpfe_video_get_format(video, &format);
	743	+ if (ret)
	744	+ return ret;
738	745	*fmt = format;
739	746	video->fmt = *fmt;
740	747	return 0;
@@ -757,11 +764,13 @@ static int vpfe_try_fmt(struct file file, void priv, · 16 unmodified lines
757	764	struct vpfe_video_device *video = video_drvdata(file);
758	765	struct vpfe_device *vpfe_dev = video->vpfe_dev;
759	766	struct v4l2_format format;
	767	+ int ret;
760	768
761	769	v4l2_dbg(1, debug, &vpfe_dev->v4l2_dev, "vpfe_try_fmt\n");
762	770	/* get adjacent subdev's output pad format */
763		− if (__vpfe_video_get_format(video, &format))
764		− return __vpfe_video_get_format(video, &format);
	771	+ ret = __vpfe_video_get_format(video, &format);
	772	+ if (ret)
	773	+ return ret;
765	774
766	775	*fmt = format;
767	776	return 0;
@@ -838,8 +847,9 @@ static int vpfe_s_input(struct file file, void priv, unsigned int index) · 70 unmodified lines
838	847
839	848	v4l2_dbg(1, debug, &vpfe_dev->v4l2_dev, "vpfe_s_input\n");
840	849
841		− if (mutex_lock_interruptible(&video->lock))
842		− return mutex_lock_interruptible(&video->lock);
	850	+ ret = mutex_lock_interruptible(&video->lock);
	851	+ if (ret)
	852	+ return ret;
843	853	/*
844	854	* If streaming is started return device busy
845	855	* error
@@ -940,8 +950,9 @@ static int vpfe_s_std(struct file file, void priv, v4l2_std_id std_id) · 94 unmodified lines
940	950	v4l2_dbg(1, debug, &vpfe_dev->v4l2_dev, "vpfe_s_std\n");
941	951
942	952	/* Call decoder driver function to set the standard */
943		− if (mutex_lock_interruptible(&video->lock))
944		− return mutex_lock_interruptible(&video->lock);
	953	+ ret = mutex_lock_interruptible(&video->lock);
	954	+ if (ret)
	955	+ return ret;
945	956	sdinfo = video->current_ext_subdev;
946	957	/* If streaming is started, return device busy error */
947	958	if (video->started) {
@@ -1327,8 +1338,9 @@ static int vpfe_reqbufs(struct file file, void priv, · 379 unmodified lines
1327	1338	return -EINVAL;
1328	1339	}
1329	1340
1330		− if (mutex_lock_interruptible(&video->lock))
1331		− return mutex_lock_interruptible(&video->lock);
	1341	+ ret = mutex_lock_interruptible(&video->lock);
	1342	+ if (ret)
	1343	+ return ret;
1332	1344
1333	1345	if (video->io_usrs != 0) {
1334	1346	v4l2_err(&vpfe_dev->v4l2_dev, "Only one IO user allowed\n");
@@ -1354,10 +1366,11 @@ static int vpfe_reqbufs(struct file file, void priv, · 19 unmodified lines
1354	1366	q->buf_struct_size = sizeof(struct vpfe_cap_buffer);
1355	1367	q->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC;
1356	1368
1357		− if (vb2_queue_init(q)) {
	1369	+ ret = vb2_queue_init(q);
	1370	+ if (ret) {
1358	1371	v4l2_err(&vpfe_dev->v4l2_dev, "vb2_queue_init() failed\n");
1359	1372	vb2_dma_contig_cleanup_ctx(vpfe_dev->pdev);
1360		− return vb2_queue_init(q);
	1373	+ return ret;
1361	1374	}
1362	1375
1363	1376	fh->io_allowed = 1;
@@ -1533,8 +1546,9 @@ static int vpfe_streamoff(struct file file, void priv, · 169 unmodified lines
1533	1546	return -EINVAL;
1534	1547	}
1535	1548
1536		− if (mutex_lock_interruptible(&video->lock))
1537		− return mutex_lock_interruptible(&video->lock);
	1549	+ ret = mutex_lock_interruptible(&video->lock);
	1550	+ if (ret)
	1551	+ return ret;
1538	1552
1539	1553	vpfe_stop_capture(video);
1540	1554	ret = vb2_streamoff(&video->buffer_queue, buf_type);

drivers/staging/rdma/hfi1/TODO+1−1

@@ -3,4 +3,4 @@ July, 2015 · 2 unmodified lines
3	3	- Remove unneeded file entries in sysfs
4	4	- Remove software processing of IB protocol and place in library for use
5	5	by qib, ipath (if still present), hfi1, and eventually soft-roce
6		−
	6	+- Replace incorrect uAPI

drivers/staging/rdma/hfi1/file_ops.c+35−56

@@ -49,6 +49,8 @@ · 48 unmodified lines
49	49	#include <linux/vmalloc.h>
50	50	#include <linux/io.h>
51	51
	52	+#include <rdma/ib.h>
	53	+
52	54	#include "hfi.h"
53	55	#include "pio.h"
54	56	#include "device.h"
@@ -190,6 +192,10 @@ static ssize_t hfi1_file_write(struct file fp, const char __user data, · 135 unmodified lines
190	192	int uctxt_required = 1;
191	193	int must_be_root = 0;
192	194
	195	+ /* FIXME: This interface cannot continue out of staging */
	196	+ if (WARN_ON_ONCE(!ib_safe_file_access(fp)))
	197	+ return -EACCES;
	198	+
193	199	if (count < sizeof(cmd)) {
194	200	ret = -EINVAL;
195	201	goto bail;
@@ -791,15 +797,16 @@ static int hfi1_file_close(struct inode inode, struct file fp) · 595 unmodified lines
791	797	spin_unlock_irqrestore(&dd->uctxt_lock, flags);
792	798
793	799	dd->rcd[uctxt->ctxt] = NULL;
	800	+
	801	+ hfi1_user_exp_rcv_free(fdata);
	802	+ hfi1_clear_ctxt_pkey(dd, uctxt->ctxt);
	803	+
794	804	uctxt->rcvwait_to = 0;
795	805	uctxt->piowait_to = 0;
796	806	uctxt->rcvnowait = 0;
797	807	uctxt->pionowait = 0;
798	808	uctxt->event_flags = 0;
799	809
800		− hfi1_user_exp_rcv_free(fdata);
801		− hfi1_clear_ctxt_pkey(dd, uctxt->ctxt);
802		−
803	810	hfi1_stats.sps_ctxts--;
804	811	if (++dd->freectxts == dd->num_user_contexts)
805	812	aspm_enable_all(dd);
@@ -1127,27 +1134,13 @@ bail: · 321 unmodified lines
1127	1134
1128	1135	static int user_init(struct file *fp)
1129	1136	{
1130		− int ret;
1131	1137	unsigned int rcvctrl_ops = 0;
1132	1138	struct hfi1_filedata *fd = fp->private_data;
1133	1139	struct hfi1_ctxtdata *uctxt = fd->uctxt;
1134	1140
1135	1141	/* make sure that the context has already been setup */
1136		− if (!test_bit(HFI1_CTXT_SETUP_DONE, &uctxt->event_flags)) {
1137		− ret = -EFAULT;
1138		− goto done;
1139		− }
1140		−
1141		− /*
1142		− * Subctxts don't need to initialize anything since master
1143		− * has done it.
1144		− */
1145		− if (fd->subctxt) {
1146		− ret = wait_event_interruptible(uctxt->wait, !test_bit(
1147		− HFI1_CTXT_MASTER_UNINIT,
1148		− &uctxt->event_flags));
1149		− goto expected;
1150		− }
	1142	+ if (!test_bit(HFI1_CTXT_SETUP_DONE, &uctxt->event_flags))
	1143	+ return -EFAULT;
1151	1144
1152	1145	/* initialize poll variables... */
1153	1146	uctxt->urgent = 0;
@@ -1202,19 +1195,7 @@ static int user_init(struct file *fp) · 48 unmodified lines
1202	1195	wake_up(&uctxt->wait);
1203	1196	}
1204	1197
1205		−expected:
1206		− /*
1207		− * Expected receive has to be setup for all processes (including
1208		− * shared contexts). However, it has to be done after the master
1209		− * context has been fully configured as it depends on the
1210		− * eager/expected split of the RcvArray entries.
1211		− * Setting it up here ensures that the subcontexts will be waiting
1212		− * (due to the above wait_event_interruptible() until the master
1213		− * is setup.
1214		− */
1215		− ret = hfi1_user_exp_rcv_init(fp);
1216		−done:
1217		− return ret;
	1198	+ return 0;
1218	1199	}
1219	1200
1220	1201	static int get_ctxt_info(struct file fp, void __user ubase, __u32 len)
@@ -1261,7 +1242,7 @@ static int setup_ctxt(struct file *fp) · 40 unmodified lines
1261	1242	int ret = 0;
1262	1243
1263	1244	/*
1264		− * Context should be set up only once (including allocation and
	1245	+ * Context should be set up only once, including allocation and
1265	1246	* programming of eager buffers. This is done if context sharing
1266	1247	* is not requested or by the master process.
1267	1248	*/
@@ -1282,8 +1263,27 @@ static int setup_ctxt(struct file *fp) · 14 unmodified lines
1282	1263	if (ret)
1283	1264	goto done;
1284	1265	}
	1266	+ } else {
	1267	+ ret = wait_event_interruptible(uctxt->wait, !test_bit(
	1268	+ HFI1_CTXT_MASTER_UNINIT,
	1269	+ &uctxt->event_flags));
	1270	+ if (ret)
	1271	+ goto done;
1285	1272	}
	1273	+
1286	1274	ret = hfi1_user_sdma_alloc_queues(uctxt, fp);
	1275	+ if (ret)
	1276	+ goto done;
	1277	+ /*
	1278	+ * Expected receive has to be setup for all processes (including
	1279	+ * shared contexts). However, it has to be done after the master
	1280	+ * context has been fully configured as it depends on the
	1281	+ * eager/expected split of the RcvArray entries.
	1282	+ * Setting it up here ensures that the subcontexts will be waiting
	1283	+ * (due to the above wait_event_interruptible() until the master
	1284	+ * is setup.
	1285	+ */
	1286	+ ret = hfi1_user_exp_rcv_init(fp);
1287	1287	if (ret)
1288	1288	goto done;
1289	1289
@@ -1565,29 +1565,8 @@ static loff_t ui_lseek(struct file *filp, loff_t offset, int whence) · 275 unmodified lines
1565	1565	{
1566	1566	struct hfi1_devdata *dd = filp->private_data;
1567	1567
1568		− switch (whence) {
1569		− case SEEK_SET:
1570		− break;
1571		− case SEEK_CUR:
1572		− offset += filp->f_pos;
1573		− break;
1574		− case SEEK_END:
1575		− offset = ((dd->kregend - dd->kregbase) + DC8051_DATA_MEM_SIZE) -
1576		− offset;
1577		− break;
1578		− default:
1579		− return -EINVAL;
1580		− }
1581		−
1582		− if (offset < 0)
1583		− return -EINVAL;
1584		−
1585		− if (offset >= (dd->kregend - dd->kregbase) + DC8051_DATA_MEM_SIZE)
1586		− return -EINVAL;
1587		−
1588		− filp->f_pos = offset;
1589		−
1590		− return filp->f_pos;
	1568	+ return fixed_size_llseek(filp, offset, whence,
	1569	+ (dd->kregend - dd->kregbase) + DC8051_DATA_MEM_SIZE);
1591	1570	}
1592	1571
1593	1572	/* NOTE: assumes unsigned long is 8 bytes */

drivers/staging/rdma/hfi1/mmu_rb.c+25−15

@@ -71,6 +71,7 @@ static inline void mmu_notifier_range_start(struct mmu_notifier *, · 70 unmodified lines
71	71	struct mm_struct *,
72	72	unsigned long, unsigned long);
73	73	static void mmu_notifier_mem_invalidate(struct mmu_notifier *,
	74	+ struct mm_struct *,
74	75	unsigned long, unsigned long);
75	76	static struct mmu_rb_node __mmu_rb_search(struct mmu_rb_handler ,
76	77	unsigned long, unsigned long);
@@ -137,7 +138,7 @@ void hfi1_mmu_rb_unregister(struct rb_root *root) · 60 unmodified lines
137	138	rbnode = rb_entry(node, struct mmu_rb_node, node);
138	139	rb_erase(node, root);
139	140	if (handler->ops->remove)
140		− handler->ops->remove(root, rbnode, false);
	141	+ handler->ops->remove(root, rbnode, NULL);
141	142	}
142	143	}
143	144
@@ -176,7 +177,7 @@ unlock: · 32 unmodified lines
176	177	return ret;
177	178	}
178	179
179		−/* Caller must host handler lock */
	180	+/* Caller must hold handler lock */
180	181	static struct mmu_rb_node __mmu_rb_search(struct mmu_rb_handler handler,
181	182	unsigned long addr,
182	183	unsigned long len)
@@ -200,15 +201,21 @@ static struct mmu_rb_node __mmu_rb_search(struct mmu_rb_handler handler, · 17 unmodified lines
200	201	return node;
201	202	}
202	203
	204	+/* Caller must not hold handler lock. */
203	205	static void __mmu_rb_remove(struct mmu_rb_handler *handler,
204		− struct mmu_rb_node *node, bool arg)
	206	+ struct mmu_rb_node node, struct mm_struct mm)
205	207	{
	208	+ unsigned long flags;
	209	+
206	210	/* Validity of handler and node pointers has been checked by caller. */
207	211	hfi1_cdbg(MMU, "Removing node addr 0x%llx, len %u", node->addr,
208	212	node->len);
	213	+ spin_lock_irqsave(&handler->lock, flags);
209	214	__mmu_int_rb_remove(node, handler->root);
	215	+ spin_unlock_irqrestore(&handler->lock, flags);
	216	+
210	217	if (handler->ops->remove)
211		− handler->ops->remove(handler->root, node, arg);
	218	+ handler->ops->remove(handler->root, node, mm);
212	219	}
213	220
214	221	struct mmu_rb_node hfi1_mmu_rb_search(struct rb_root root, unsigned long addr,
@@ -231,14 +238,11 @@ struct mmu_rb_node hfi1_mmu_rb_search(struct rb_root root, unsigned long addr, · 16 unmodified lines
231	238	void hfi1_mmu_rb_remove(struct rb_root root, struct mmu_rb_node node)
232	239	{
233	240	struct mmu_rb_handler *handler = find_mmu_handler(root);
234		− unsigned long flags;
235	241
236	242	if (!handler \|\| !node)
237	243	return;
238	244
239		− spin_lock_irqsave(&handler->lock, flags);
240		− __mmu_rb_remove(handler, node, false);
241		− spin_unlock_irqrestore(&handler->lock, flags);
	245	+ __mmu_rb_remove(handler, node, NULL);
242	246	}
243	247
244	248	static struct mmu_rb_handler find_mmu_handler(struct rb_root root)
@@ -260,7 +264,7 @@ unlock: · 15 unmodified lines
260	264	static inline void mmu_notifier_page(struct mmu_notifier *mn,
261	265	struct mm_struct *mm, unsigned long addr)
262	266	{
263		− mmu_notifier_mem_invalidate(mn, addr, addr + PAGE_SIZE);
	267	+ mmu_notifier_mem_invalidate(mn, mm, addr, addr + PAGE_SIZE);
264	268	}
265	269
266	270	static inline void mmu_notifier_range_start(struct mmu_notifier *mn,
@@ -268,25 +272,31 @@ static inline void mmu_notifier_range_start(struct mmu_notifier *mn, · 1 unmodified line
268	272	unsigned long start,
269	273	unsigned long end)
270	274	{
271		− mmu_notifier_mem_invalidate(mn, start, end);
	275	+ mmu_notifier_mem_invalidate(mn, mm, start, end);
272	276	}
273	277
274	278	static void mmu_notifier_mem_invalidate(struct mmu_notifier *mn,
	279	+ struct mm_struct *mm,
275	280	unsigned long start, unsigned long end)
276	281	{
277	282	struct mmu_rb_handler *handler =
278	283	container_of(mn, struct mmu_rb_handler, mn);
279	284	struct rb_root *root = handler->root;
280		− struct mmu_rb_node *node;
	285	+ struct mmu_rb_node node, ptr = NULL;
281	286	unsigned long flags;
282	287
283	288	spin_lock_irqsave(&handler->lock, flags);
284		− for (node = __mmu_int_rb_iter_first(root, start, end - 1); node;
285		− node = __mmu_int_rb_iter_next(node, start, end - 1)) {
	289	+ for (node = __mmu_int_rb_iter_first(root, start, end - 1);
	290	+ node; node = ptr) {
	291	+ /* Guard against node removal. */
	292	+ ptr = __mmu_int_rb_iter_next(node, start, end - 1);
286	293	hfi1_cdbg(MMU, "Invalidating node addr 0x%llx, len %u",
287	294	node->addr, node->len);
288		− if (handler->ops->invalidate(root, node))
289		− __mmu_rb_remove(handler, node, true);
	295	+ if (handler->ops->invalidate(root, node)) {
	296	+ spin_unlock_irqrestore(&handler->lock, flags);
	297	+ __mmu_rb_remove(handler, node, mm);
	298	+ spin_lock_irqsave(&handler->lock, flags);
	299	+ }
290	300	}
291	301	spin_unlock_irqrestore(&handler->lock, flags);
292	302	}

drivers/staging/rdma/hfi1/mmu_rb.h+2−1

@@ -59,7 +59,8 @@ struct mmu_rb_node { · 58 unmodified lines
59	59	struct mmu_rb_ops {
60	60	bool (filter)(struct mmu_rb_node , unsigned long, unsigned long);
61	61	int (insert)(struct rb_root , struct mmu_rb_node *);
62		− void (remove)(struct rb_root , struct mmu_rb_node *, bool);
	62	+ void (remove)(struct rb_root , struct mmu_rb_node *,
	63	+ struct mm_struct *);
63	64	int (invalidate)(struct rb_root , struct mmu_rb_node *);
64	65	};
65	66

drivers/staging/rdma/hfi1/qp.c+2−0

@@ -519,10 +519,12 @@ static void iowait_sdma_drained(struct iowait *wait) · 518 unmodified lines
519	519	* do the flush work until that QP's
520	520	* sdma work has finished.
521	521	*/
	522	+ spin_lock(&qp->s_lock);
522	523	if (qp->s_flags & RVT_S_WAIT_DMA) {
523	524	qp->s_flags &= ~RVT_S_WAIT_DMA;
524	525	hfi1_schedule_send(qp);
525	526	}
	527	+ spin_unlock(&qp->s_lock);
526	528	}
527	529
528	530	/**

drivers/staging/rdma/hfi1/user_exp_rcv.c+7−4

@@ -87,7 +87,8 @@ static u32 find_phys_blocks(struct page *, unsigned, struct tid_pageset ); · 86 unmodified lines
87	87	static int set_rcvarray_entry(struct file *, unsigned long, u32,
88	88	struct tid_group , struct page *, unsigned);
89	89	static int mmu_rb_insert(struct rb_root , struct mmu_rb_node );
90		−static void mmu_rb_remove(struct rb_root , struct mmu_rb_node , bool);
	90	+static void mmu_rb_remove(struct rb_root , struct mmu_rb_node ,
	91	+ struct mm_struct *);
91	92	static int mmu_rb_invalidate(struct rb_root , struct mmu_rb_node );
92	93	static int program_rcvarray(struct file , unsigned long, struct tid_group ,
93	94	struct tid_pageset , unsigned, u16, struct page *,
@@ -254,6 +255,8 @@ int hfi1_user_exp_rcv_free(struct hfi1_filedata *fd) · 160 unmodified lines
254	255	struct hfi1_ctxtdata *uctxt = fd->uctxt;
255	256	struct tid_group grp, gptr;
256	257
	258	+ if (!test_bit(HFI1_CTXT_SETUP_DONE, &uctxt->event_flags))
	259	+ return 0;
257	260	/*
258	261	* The notifier would have been removed when the process'es mm
259	262	* was freed.
@@ -899,7 +902,7 @@ static int unprogram_rcvarray(struct file *fp, u32 tidinfo, · 639 unmodified lines
899	902	if (!node \|\| node->rcventry != (uctxt->expected_base + rcventry))
900	903	return -EBADF;
901	904	if (HFI1_CAP_IS_USET(TID_UNMAP))
902		− mmu_rb_remove(&fd->tid_rb_root, &node->mmu, false);
	905	+ mmu_rb_remove(&fd->tid_rb_root, &node->mmu, NULL);
903	906	else
904	907	hfi1_mmu_rb_remove(&fd->tid_rb_root, &node->mmu);
905	908
@@ -965,7 +968,7 @@ static void unlock_exp_tids(struct hfi1_ctxtdata *uctxt, · 59 unmodified lines
965	968	continue;
966	969	if (HFI1_CAP_IS_USET(TID_UNMAP))
967	970	mmu_rb_remove(&fd->tid_rb_root,
968		− &node->mmu, false);
	971	+ &node->mmu, NULL);
969	972	else
970	973	hfi1_mmu_rb_remove(&fd->tid_rb_root,
971	974	&node->mmu);
@@ -1032,7 +1035,7 @@ static int mmu_rb_insert(struct rb_root root, struct mmu_rb_node node) · 60 unmodified lines
1032	1035	}
1033	1036
1034	1037	static void mmu_rb_remove(struct rb_root root, struct mmu_rb_node node,
1035		− bool notifier)
	1038	+ struct mm_struct *mm)
1036	1039	{
1037	1040	struct hfi1_filedata *fdata =
1038	1041	container_of(root, struct hfi1_filedata, tid_rb_root);

drivers/staging/rdma/hfi1/user_sdma.c+22−11

@@ -278,7 +278,8 @@ static inline void pq_update(struct hfi1_user_sdma_pkt_q *); · 277 unmodified lines
278	278	static void user_sdma_free_request(struct user_sdma_request *, bool);
279	279	static int pin_vector_pages(struct user_sdma_request *,
280	280	struct user_sdma_iovec *);
281		−static void unpin_vector_pages(struct mm_struct , struct page *, unsigned);
	281	+static void unpin_vector_pages(struct mm_struct , struct page *, unsigned,
	282	+ unsigned);
282	283	static int check_header_template(struct user_sdma_request *,
283	284	struct hfi1_pkt_header *, u32, u32);
284	285	static int set_txreq_header(struct user_sdma_request *,
@@ -299,7 +300,8 @@ static int defer_packet_queue( · 14 unmodified lines
299	300	static void activate_packet_queue(struct iowait *, int);
300	301	static bool sdma_rb_filter(struct mmu_rb_node *, unsigned long, unsigned long);
301	302	static int sdma_rb_insert(struct rb_root , struct mmu_rb_node );
302		−static void sdma_rb_remove(struct rb_root , struct mmu_rb_node , bool);
	303	+static void sdma_rb_remove(struct rb_root , struct mmu_rb_node ,
	304	+ struct mm_struct *);
303	305	static int sdma_rb_invalidate(struct rb_root , struct mmu_rb_node );
304	306
305	307	static struct mmu_rb_ops sdma_rb_ops = {
@@ -1063,8 +1065,10 @@ static int pin_vector_pages(struct user_sdma_request *req, · 757 unmodified lines
1063	1065	rb_node = hfi1_mmu_rb_search(&pq->sdma_rb_root,
1064	1066	(unsigned long)iovec->iov.iov_base,
1065	1067	iovec->iov.iov_len);
1066		− if (rb_node)
	1068	+ if (rb_node && !IS_ERR(rb_node))
1067	1069	node = container_of(rb_node, struct sdma_mmu_node, rb);
	1070	+ else
	1071	+ rb_node = NULL;
1068	1072
1069	1073	if (!node) {
1070	1074	node = kzalloc(sizeof(*node), GFP_KERNEL);
@@ -1107,7 +1111,8 @@ retry: · 36 unmodified lines
1107	1111	goto bail;
1108	1112	}
1109	1113	if (pinned != npages) {
1110		− unpin_vector_pages(current->mm, pages, pinned);
	1114	+ unpin_vector_pages(current->mm, pages, node->npages,
	1115	+ pinned);
1111	1116	ret = -EFAULT;
1112	1117	goto bail;
1113	1118	}
@@ -1147,9 +1152,9 @@ bail: · 33 unmodified lines
1147	1152	}
1148	1153
1149	1154	static void unpin_vector_pages(struct mm_struct mm, struct page *pages,
1150		− unsigned npages)
	1155	+ unsigned start, unsigned npages)
1151	1156	{
1152		− hfi1_release_user_pages(mm, pages, npages, 0);
	1157	+ hfi1_release_user_pages(mm, pages + start, npages, 0);
1153	1158	kfree(pages);
1154	1159	}
1155	1160
@@ -1502,7 +1507,7 @@ static void user_sdma_free_request(struct user_sdma_request *req, bool unpin) · 346 unmodified lines
1502	1507	&req->pq->sdma_rb_root,
1503	1508	(unsigned long)req->iovs[i].iov.iov_base,
1504	1509	req->iovs[i].iov.iov_len);
1505		− if (!mnode)
	1510	+ if (!mnode \|\| IS_ERR(mnode))
1506	1511	continue;
1507	1512
1508	1513	node = container_of(mnode, struct sdma_mmu_node, rb);
@@ -1547,7 +1552,7 @@ static int sdma_rb_insert(struct rb_root root, struct mmu_rb_node mnode) · 38 unmodified lines
1547	1552	}
1548	1553
1549	1554	static void sdma_rb_remove(struct rb_root root, struct mmu_rb_node mnode,
1550		− bool notifier)
	1555	+ struct mm_struct *mm)
1551	1556	{
1552	1557	struct sdma_mmu_node *node =
1553	1558	container_of(mnode, struct sdma_mmu_node, rb);
@@ -1557,14 +1562,20 @@ static void sdma_rb_remove(struct rb_root root, struct mmu_rb_node mnode, · 3 unmodified lines
1557	1562	node->pq->n_locked -= node->npages;
1558	1563	spin_unlock(&node->pq->evict_lock);
1559	1564
1560		− unpin_vector_pages(notifier ? NULL : current->mm, node->pages,
	1565	+ /*
	1566	+ * If mm is set, we are being called by the MMU notifier and we
	1567	+ * should not pass a mm_struct to unpin_vector_page(). This is to
	1568	+ * prevent a deadlock when hfi1_release_user_pages() attempts to
	1569	+ * take the mmap_sem, which the MMU notifier has already taken.
	1570	+ */
	1571	+ unpin_vector_pages(mm ? NULL : current->mm, node->pages, 0,
1561	1572	node->npages);
1562	1573	/*
1563	1574	* If called by the MMU notifier, we have to adjust the pinned
1564	1575	* page count ourselves.
1565	1576	*/
1566		− if (notifier)
1567		− current->mm->pinned_vm -= node->npages;
	1577	+ if (mm)
	1578	+ mm->pinned_vm -= node->npages;
1568	1579	kfree(node);
1569	1580	}
1570	1581

drivers/thermal/hisi_thermal.c+2−2

@@ -68,12 +68,12 @@ static inline int _step_to_temp(int step) · 67 unmodified lines
68	68	* Every step equals (1 * 200) / 255 celsius, and finally
69	69	* need convert to millicelsius.
70	70	*/
71		− return (HISI_TEMP_BASE + (step * 200 / 255)) * 1000;
	71	+ return (HISI_TEMP_BASE * 1000 + (step * 200000 / 255));
72	72	}
73	73
74	74	static inline long _temp_to_step(long temp)
75	75	{
76		− return ((temp / 1000 - HISI_TEMP_BASE) * 255 / 200);
	76	+ return ((temp - HISI_TEMP_BASE * 1000) * 255) / 200000;
77	77	}
78	78
79	79	static long hisi_thermal_get_sensor_temp(struct hisi_thermal_data *data,

drivers/thermal/thermal_core.c+1−1

@@ -959,7 +959,7 @@ static DEVICE_ATTR(sustainable_power, S_IWUSR \| S_IRUGO, sustainable_power_show, · 958 unmodified lines
959	959	struct thermal_zone_device *tz = to_thermal_zone(dev); \
960	960	\
961	961	if (tz->tzp) \
962		− return sprintf(buf, "%u\n", tz->tzp->name); \
	962	+ return sprintf(buf, "%d\n", tz->tzp->name); \
963	963	else \
964	964	return -EIO; \
965	965	} \

drivers/tty/pty.c+8−10

@@ -626,7 +626,7 @@ static int pty_unix98_ioctl(struct tty_struct *tty, · 625 unmodified lines
626	626	*/
627	627
628	628	static struct tty_struct ptm_unix98_lookup(struct tty_driver driver,
629		− struct inode *ptm_inode, int idx)
	629	+ struct file *file, int idx)
630	630	{
631	631	/* Master must be open via /dev/ptmx */
632	632	return ERR_PTR(-EIO);
@@ -642,12 +642,12 @@ static struct tty_struct ptm_unix98_lookup(struct tty_driver driver, · 9 unmodified lines
642	642	*/
643	643
644	644	static struct tty_struct pts_unix98_lookup(struct tty_driver driver,
645		− struct inode *pts_inode, int idx)
	645	+ struct file *file, int idx)
646	646	{
647	647	struct tty_struct *tty;
648	648
649	649	mutex_lock(&devpts_mutex);
650		− tty = devpts_get_priv(pts_inode);
	650	+ tty = devpts_get_priv(file->f_path.dentry);
651	651	mutex_unlock(&devpts_mutex);
652	652	/* Master must be open before slave */
653	653	if (!tty)
@@ -722,7 +722,7 @@ static int ptmx_open(struct inode inode, struct file filp) · 68 unmodified lines
722	722	{
723	723	struct pts_fs_info *fsi;
724	724	struct tty_struct *tty;
725		− struct inode *slave_inode;
	725	+ struct dentry *dentry;
726	726	int retval;
727	727	int index;
728	728
@@ -769,14 +769,12 @@ static int ptmx_open(struct inode inode, struct file filp) · 40 unmodified lines
769	769
770	770	tty_add_file(tty, filp);
771	771
772		− slave_inode = devpts_pty_new(fsi,
773		− MKDEV(UNIX98_PTY_SLAVE_MAJOR, index), index,
774		− tty->link);
775		− if (IS_ERR(slave_inode)) {
776		− retval = PTR_ERR(slave_inode);
	772	+ dentry = devpts_pty_new(fsi, index, tty->link);
	773	+ if (IS_ERR(dentry)) {
	774	+ retval = PTR_ERR(dentry);
777	775	goto err_release;
778	776	}
779		− tty->link->driver_data = slave_inode;
	777	+ tty->link->driver_data = dentry;
780	778
781	779	retval = ptm_driver->ops->open(tty, filp);
782	780	if (retval)

drivers/tty/tty_io.c+3−3

@@ -1367,12 +1367,12 @@ static ssize_t tty_line_name(struct tty_driver driver, int index, char p) · 1366 unmodified lines
1367	1367	* Locking: tty_mutex must be held. If the tty is found, bump the tty kref.
1368	1368	*/
1369	1369	static struct tty_struct tty_driver_lookup_tty(struct tty_driver driver,
1370		− struct inode *inode, int idx)
	1370	+ struct file *file, int idx)
1371	1371	{
1372	1372	struct tty_struct *tty;
1373	1373
1374	1374	if (driver->ops->lookup)
1375		− tty = driver->ops->lookup(driver, inode, idx);
	1375	+ tty = driver->ops->lookup(driver, file, idx);
1376	1376	else
1377	1377	tty = driver->ttys[idx];
1378	1378
@@ -2040,7 +2040,7 @@ static struct tty_struct tty_open_by_driver(dev_t device, struct inode inode, · 661 unmodified lines
2040	2040	}
2041	2041
2042	2042	/* check whether we're reopening an existing tty */
2043		− tty = tty_driver_lookup_tty(driver, inode, index);
	2043	+ tty = tty_driver_lookup_tty(driver, filp, index);
2044	2044	if (IS_ERR(tty)) {
2045	2045	mutex_unlock(&tty_mutex);
2046	2046	goto out;

drivers/usb/serial/option.c+148−7

@@ -375,18 +375,22 @@ static void option_instat_callback(struct urb *urb); · 374 unmodified lines
375	375	#define HAIER_PRODUCT_CE81B 0x10f8
376	376	#define HAIER_PRODUCT_CE100 0x2009
377	377
378		−/* Cinterion (formerly Siemens) products */
379		−#define SIEMENS_VENDOR_ID 0x0681
380		−#define CINTERION_VENDOR_ID 0x1e2d
	378	+/* Gemalto's Cinterion products (formerly Siemens) */
	379	+#define SIEMENS_VENDOR_ID 0x0681
	380	+#define CINTERION_VENDOR_ID 0x1e2d
	381	+#define CINTERION_PRODUCT_HC25_MDMNET 0x0040
381	382	#define CINTERION_PRODUCT_HC25_MDM 0x0047
382		−#define CINTERION_PRODUCT_HC25_MDMNET 0x0040
	383	+#define CINTERION_PRODUCT_HC28_MDMNET 0x004A /* same for HC28J */
383	384	#define CINTERION_PRODUCT_HC28_MDM 0x004C
384		−#define CINTERION_PRODUCT_HC28_MDMNET 0x004A /* same for HC28J */
385	385	#define CINTERION_PRODUCT_EU3_E 0x0051
386	386	#define CINTERION_PRODUCT_EU3_P 0x0052
387	387	#define CINTERION_PRODUCT_PH8 0x0053
388	388	#define CINTERION_PRODUCT_AHXX 0x0055
389	389	#define CINTERION_PRODUCT_PLXX 0x0060
	390	+#define CINTERION_PRODUCT_PH8_2RMNET 0x0082
	391	+#define CINTERION_PRODUCT_PH8_AUDIO 0x0083
	392	+#define CINTERION_PRODUCT_AHXX_2RMNET 0x0084
	393	+#define CINTERION_PRODUCT_AHXX_AUDIO 0x0085
390	394
391	395	/* Olivetti products */
392	396	#define OLIVETTI_VENDOR_ID 0x0b3c
@@ -633,6 +637,10 @@ static const struct option_blacklist_info telit_le922_blacklist_usbcfg3 = { · 240 unmodified lines
633	637	.reserved = BIT(1) \| BIT(2) \| BIT(3),
634	638	};
635	639
	640	+static const struct option_blacklist_info cinterion_rmnet2_blacklist = {
	641	+ .reserved = BIT(4) \| BIT(5),
	642	+};
	643	+
636	644	static const struct usb_device_id option_ids[] = {
637	645	{ USB_DEVICE(OPTION_VENDOR_ID, OPTION_PRODUCT_COLT) },
638	646	{ USB_DEVICE(OPTION_VENDOR_ID, OPTION_PRODUCT_RICOLA) },
@@ -1602,7 +1610,79 @@ static const struct usb_device_id option_ids[] = { · 963 unmodified lines
1602	1610	.driver_info = (kernel_ulong_t)&net_intf3_blacklist },
1603	1611	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0178, 0xff, 0xff, 0xff),
1604	1612	.driver_info = (kernel_ulong_t)&net_intf3_blacklist },
1605		− { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0xffe9, 0xff, 0xff, 0xff) },
	1613	+ { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0xff42, 0xff, 0xff, 0xff) },
	1614	+ { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0xff43, 0xff, 0xff, 0xff) },
	1615	+ { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0xff44, 0xff, 0xff, 0xff) },
	1616	+ { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0xff45, 0xff, 0xff, 0xff) },
	1617	+ { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0xff46, 0xff, 0xff, 0xff) },
	1618	+ { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0xff47, 0xff, 0xff, 0xff) },
	1619	+ { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0xff48, 0xff, 0xff, 0xff) },
	1620	+ { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0xff49, 0xff, 0xff, 0xff) },
	1621	+ { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0xff4a, 0xff, 0xff, 0xff) },
	1622	+ { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0xff4b, 0xff, 0xff, 0xff) },
	1623	+ { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0xff4c, 0xff, 0xff, 0xff) },
	1624	+ { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0xff4d, 0xff, 0xff, 0xff) },
	1625	+ { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0xff4e, 0xff, 0xff, 0xff) },
	1626	+ { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0xff4f, 0xff, 0xff, 0xff) },
	1627	+ { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0xff50, 0xff, 0xff, 0xff) },
	1628	+ { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0xff51, 0xff, 0xff, 0xff) },
	1629	+ { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0xff52, 0xff, 0xff, 0xff) },
	1630	+ { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0xff53, 0xff, 0xff, 0xff) },
	1631	+ { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0xff54, 0xff, 0xff, 0xff) },
	1632	+ { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0xff55, 0xff, 0xff, 0xff) },
	1633	+ { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0xff56, 0xff, 0xff, 0xff) },
	1634	+ { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0xff57, 0xff, 0xff, 0xff) },
	1635	+ { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0xff58, 0xff, 0xff, 0xff) },
	1636	+ { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0xff59, 0xff, 0xff, 0xff) },
	1637	+ { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0xff5a, 0xff, 0xff, 0xff) },
	1638	+ { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0xff5b, 0xff, 0xff, 0xff) },
	1639	+ { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0xff5c, 0xff, 0xff, 0xff) },
	1640	+ { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0xff5d, 0xff, 0xff, 0xff) },
	1641	+ { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0xff5e, 0xff, 0xff, 0xff) },
	1642	+ { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0xff5f, 0xff, 0xff, 0xff) },
	1643	+ { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0xff60, 0xff, 0xff, 0xff) },
	1644	+ { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0xff61, 0xff, 0xff, 0xff) },
	1645	+ { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0xff62, 0xff, 0xff, 0xff) },
	1646	+ { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0xff63, 0xff, 0xff, 0xff) },
	1647	+ { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0xff64, 0xff, 0xff, 0xff) },
	1648	+ { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0xff65, 0xff, 0xff, 0xff) },
	1649	+ { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0xff66, 0xff, 0xff, 0xff) },
	1650	+ { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0xff67, 0xff, 0xff, 0xff) },
	1651	+ { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0xff68, 0xff, 0xff, 0xff) },
	1652	+ { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0xff69, 0xff, 0xff, 0xff) },
	1653	+ { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0xff6a, 0xff, 0xff, 0xff) },
	1654	+ { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0xff6b, 0xff, 0xff, 0xff) },
	1655	+ { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0xff6c, 0xff, 0xff, 0xff) },
	1656	+ { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0xff6d, 0xff, 0xff, 0xff) },
	1657	+ { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0xff6e, 0xff, 0xff, 0xff) },
	1658	+ { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0xff6f, 0xff, 0xff, 0xff) },
	1659	+ { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0xff70, 0xff, 0xff, 0xff) },
	1660	+ { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0xff71, 0xff, 0xff, 0xff) },
	1661	+ { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0xff72, 0xff, 0xff, 0xff) },
	1662	+ { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0xff73, 0xff, 0xff, 0xff) },
	1663	+ { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0xff74, 0xff, 0xff, 0xff) },
	1664	+ { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0xff75, 0xff, 0xff, 0xff) },
	1665	+ { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0xff76, 0xff, 0xff, 0xff) },
	1666	+ { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0xff77, 0xff, 0xff, 0xff) },
	1667	+ { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0xff78, 0xff, 0xff, 0xff) },
	1668	+ { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0xff79, 0xff, 0xff, 0xff) },
	1669	+ { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0xff7a, 0xff, 0xff, 0xff) },
	1670	+ { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0xff7b, 0xff, 0xff, 0xff) },
	1671	+ { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0xff7c, 0xff, 0xff, 0xff) },
	1672	+ { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0xff7d, 0xff, 0xff, 0xff) },
	1673	+ { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0xff7e, 0xff, 0xff, 0xff) },
	1674	+ { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0xff7f, 0xff, 0xff, 0xff) },
	1675	+ { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0xff80, 0xff, 0xff, 0xff) },
	1676	+ { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0xff81, 0xff, 0xff, 0xff) },
	1677	+ { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0xff82, 0xff, 0xff, 0xff) },
	1678	+ { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0xff83, 0xff, 0xff, 0xff) },
	1679	+ { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0xff84, 0xff, 0xff, 0xff) },
	1680	+ { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0xff85, 0xff, 0xff, 0xff) },
	1681	+ { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0xff86, 0xff, 0xff, 0xff) },
	1682	+ { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0xff87, 0xff, 0xff, 0xff) },
	1683	+ { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0xff88, 0xff, 0xff, 0xff) },
	1684	+ { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0xff89, 0xff, 0xff, 0xff) },
	1685	+ { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0xff8a, 0xff, 0xff, 0xff) },
1606	1686	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0xff8b, 0xff, 0xff, 0xff) },
1607	1687	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0xff8c, 0xff, 0xff, 0xff) },
1608	1688	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0xff8d, 0xff, 0xff, 0xff) },
@@ -1613,6 +1693,61 @@ static const struct usb_device_id option_ids[] = { · 4 unmodified lines
1613	1693	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0xff92, 0xff, 0xff, 0xff) },
1614	1694	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0xff93, 0xff, 0xff, 0xff) },
1615	1695	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0xff94, 0xff, 0xff, 0xff) },
	1696	+ { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0xff9f, 0xff, 0xff, 0xff) },
	1697	+ { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0xffa0, 0xff, 0xff, 0xff) },
	1698	+ { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0xffa1, 0xff, 0xff, 0xff) },
	1699	+ { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0xffa2, 0xff, 0xff, 0xff) },
	1700	+ { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0xffa3, 0xff, 0xff, 0xff) },
	1701	+ { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0xffa4, 0xff, 0xff, 0xff) },
	1702	+ { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0xffa5, 0xff, 0xff, 0xff) },
	1703	+ { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0xffa6, 0xff, 0xff, 0xff) },
	1704	+ { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0xffa7, 0xff, 0xff, 0xff) },
	1705	+ { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0xffa8, 0xff, 0xff, 0xff) },
	1706	+ { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0xffa9, 0xff, 0xff, 0xff) },
	1707	+ { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0xffaa, 0xff, 0xff, 0xff) },
	1708	+ { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0xffab, 0xff, 0xff, 0xff) },
	1709	+ { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0xffac, 0xff, 0xff, 0xff) },
	1710	+ { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0xffae, 0xff, 0xff, 0xff) },
	1711	+ { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0xffaf, 0xff, 0xff, 0xff) },
	1712	+ { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0xffb0, 0xff, 0xff, 0xff) },
	1713	+ { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0xffb1, 0xff, 0xff, 0xff) },
	1714	+ { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0xffb2, 0xff, 0xff, 0xff) },
	1715	+ { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0xffb3, 0xff, 0xff, 0xff) },
	1716	+ { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0xffb4, 0xff, 0xff, 0xff) },
	1717	+ { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0xffb5, 0xff, 0xff, 0xff) },
	1718	+ { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0xffb6, 0xff, 0xff, 0xff) },
	1719	+ { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0xffb7, 0xff, 0xff, 0xff) },
	1720	+ { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0xffb8, 0xff, 0xff, 0xff) },
	1721	+ { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0xffb9, 0xff, 0xff, 0xff) },
	1722	+ { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0xffba, 0xff, 0xff, 0xff) },
	1723	+ { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0xffbb, 0xff, 0xff, 0xff) },
	1724	+ { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0xffbc, 0xff, 0xff, 0xff) },
	1725	+ { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0xffbd, 0xff, 0xff, 0xff) },
	1726	+ { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0xffbe, 0xff, 0xff, 0xff) },
	1727	+ { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0xffbf, 0xff, 0xff, 0xff) },
	1728	+ { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0xffc0, 0xff, 0xff, 0xff) },
	1729	+ { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0xffc1, 0xff, 0xff, 0xff) },
	1730	+ { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0xffc2, 0xff, 0xff, 0xff) },
	1731	+ { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0xffc3, 0xff, 0xff, 0xff) },
	1732	+ { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0xffc4, 0xff, 0xff, 0xff) },
	1733	+ { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0xffc5, 0xff, 0xff, 0xff) },
	1734	+ { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0xffc6, 0xff, 0xff, 0xff) },
	1735	+ { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0xffc7, 0xff, 0xff, 0xff) },
	1736	+ { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0xffc8, 0xff, 0xff, 0xff) },
	1737	+ { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0xffc9, 0xff, 0xff, 0xff) },
	1738	+ { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0xffca, 0xff, 0xff, 0xff) },
	1739	+ { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0xffcb, 0xff, 0xff, 0xff) },
	1740	+ { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0xffcc, 0xff, 0xff, 0xff) },
	1741	+ { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0xffcd, 0xff, 0xff, 0xff) },
	1742	+ { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0xffce, 0xff, 0xff, 0xff) },
	1743	+ { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0xffcf, 0xff, 0xff, 0xff) },
	1744	+ { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0xffd0, 0xff, 0xff, 0xff) },
	1745	+ { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0xffd1, 0xff, 0xff, 0xff) },
	1746	+ { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0xffd2, 0xff, 0xff, 0xff) },
	1747	+ { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0xffd3, 0xff, 0xff, 0xff) },
	1748	+ { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0xffd4, 0xff, 0xff, 0xff) },
	1749	+ { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0xffd5, 0xff, 0xff, 0xff) },
	1750	+ { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0xffe9, 0xff, 0xff, 0xff) },
1616	1751	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0xffec, 0xff, 0xff, 0xff) },
1617	1752	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0xffee, 0xff, 0xff, 0xff) },
1618	1753	{ USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0xfff6, 0xff, 0xff, 0xff) },
@@ -1712,7 +1847,13 @@ static const struct usb_device_id option_ids[] = { · 93 unmodified lines
1712	1847	{ USB_DEVICE_INTERFACE_CLASS(CINTERION_VENDOR_ID, CINTERION_PRODUCT_AHXX, 0xff) },
1713	1848	{ USB_DEVICE(CINTERION_VENDOR_ID, CINTERION_PRODUCT_PLXX),
1714	1849	.driver_info = (kernel_ulong_t)&net_intf4_blacklist },
1715		− { USB_DEVICE(CINTERION_VENDOR_ID, CINTERION_PRODUCT_HC28_MDM) },
	1850	+ { USB_DEVICE_INTERFACE_CLASS(CINTERION_VENDOR_ID, CINTERION_PRODUCT_PH8_2RMNET, 0xff),
	1851	+ .driver_info = (kernel_ulong_t)&cinterion_rmnet2_blacklist },
	1852	+ { USB_DEVICE_INTERFACE_CLASS(CINTERION_VENDOR_ID, CINTERION_PRODUCT_PH8_AUDIO, 0xff),
	1853	+ .driver_info = (kernel_ulong_t)&net_intf4_blacklist },
	1854	+ { USB_DEVICE_INTERFACE_CLASS(CINTERION_VENDOR_ID, CINTERION_PRODUCT_AHXX_2RMNET, 0xff) },
	1855	+ { USB_DEVICE_INTERFACE_CLASS(CINTERION_VENDOR_ID, CINTERION_PRODUCT_AHXX_AUDIO, 0xff) },
	1856	+ { USB_DEVICE(CINTERION_VENDOR_ID, CINTERION_PRODUCT_HC28_MDM) },
1716	1857	{ USB_DEVICE(CINTERION_VENDOR_ID, CINTERION_PRODUCT_HC28_MDMNET) },
1717	1858	{ USB_DEVICE(SIEMENS_VENDOR_ID, CINTERION_PRODUCT_HC25_MDM) },
1718	1859	{ USB_DEVICE(SIEMENS_VENDOR_ID, CINTERION_PRODUCT_HC25_MDMNET) },

fs/ceph/mds_client.c+2−4

@@ -386,9 +386,7 @@ void ceph_put_mds_session(struct ceph_mds_session *s) · 385 unmodified lines
386	386	atomic_read(&s->s_ref), atomic_read(&s->s_ref)-1);
387	387	if (atomic_dec_and_test(&s->s_ref)) {
388	388	if (s->s_auth.authorizer)
389		− ceph_auth_destroy_authorizer(
390		− s->s_mdsc->fsc->client->monc.auth,
391		− s->s_auth.authorizer);
	389	+ ceph_auth_destroy_authorizer(s->s_auth.authorizer);
392	390	kfree(s);
393	391	}
394	392	}
@@ -3900,7 +3898,7 @@ static struct ceph_auth_handshake get_authorizer(struct ceph_connection con, · 3505 unmodified lines
3900	3898	struct ceph_auth_handshake *auth = &s->s_auth;
3901	3899
3902	3900	if (force_new && auth->authorizer) {
3903		− ceph_auth_destroy_authorizer(ac, auth->authorizer);
	3901	+ ceph_auth_destroy_authorizer(auth->authorizer);
3904	3902	auth->authorizer = NULL;
3905	3903	}
3906	3904	if (!auth->authorizer) {

fs/devpts/inode.c+12−41

@@ -604,8 +604,7 @@ void devpts_put_ref(struct pts_fs_info *fsi) · 603 unmodified lines
604	604	*
605	605	* The created inode is returned. Remove it from /dev/pts/ by devpts_pty_kill.
606	606	*/
607		−struct inode devpts_pty_new(struct pts_fs_info fsi, dev_t device, int index,
608		− void *priv)
	607	+struct dentry devpts_pty_new(struct pts_fs_info fsi, int index, void *priv)
609	608	{
610	609	struct dentry *dentry;
611	610	struct super_block *sb;
@@ -629,25 +628,21 @@ struct inode devpts_pty_new(struct pts_fs_info fsi, dev_t device, int index, · 17 unmodified lines
629	628	inode->i_uid = opts->setuid ? opts->uid : current_fsuid();
630	629	inode->i_gid = opts->setgid ? opts->gid : current_fsgid();
631	630	inode->i_mtime = inode->i_atime = inode->i_ctime = CURRENT_TIME;
632		− init_special_inode(inode, S_IFCHR\|opts->mode, device);
633		− inode->i_private = priv;
	631	+ init_special_inode(inode, S_IFCHR\|opts->mode, MKDEV(UNIX98_PTY_SLAVE_MAJOR, index));
634	632
635	633	sprintf(s, "%d", index);
636	634
637		− inode_lock(d_inode(root));
638		−
639	635	dentry = d_alloc_name(root, s);
640	636	if (dentry) {
	637	+ dentry->d_fsdata = priv;
641	638	d_add(dentry, inode);
642	639	fsnotify_create(d_inode(root), dentry);
643	640	} else {
644	641	iput(inode);
645		− inode = ERR_PTR(-ENOMEM);
	642	+ dentry = ERR_PTR(-ENOMEM);
646	643	}
647	644
648		− inode_unlock(d_inode(root));
649		−
650		− return inode;
	645	+ return dentry;
651	646	}
652	647
653	648	/**
@@ -656,24 +651,10 @@ struct inode devpts_pty_new(struct pts_fs_info fsi, dev_t device, int index, · 2 unmodified lines
656	651	*
657	652	* Returns whatever was passed as priv in devpts_pty_new for a given inode.
658	653	*/
659		−void devpts_get_priv(struct inode pts_inode)
	654	+void devpts_get_priv(struct dentry dentry)
660	655	{
661		− struct dentry *dentry;
662		− void *priv = NULL;
663		−
664		− BUG_ON(pts_inode->i_rdev == MKDEV(TTYAUX_MAJOR, PTMX_MINOR));
665		−
666		− /* Ensure dentry has not been deleted by devpts_pty_kill() */
667		− dentry = d_find_alias(pts_inode);
668		− if (!dentry)
669		− return NULL;
670		−
671		− if (pts_inode->i_sb->s_magic == DEVPTS_SUPER_MAGIC)
672		− priv = pts_inode->i_private;
673		−
674		− dput(dentry);
675		−
676		− return priv;
	656	+ WARN_ON_ONCE(dentry->d_sb->s_magic != DEVPTS_SUPER_MAGIC);
	657	+ return dentry->d_fsdata;
677	658	}
678	659
679	660	/**
@@ -682,24 +663,14 @@ void devpts_get_priv(struct inode pts_inode) · 2 unmodified lines
682	663	*
683	664	* This is an inverse operation of devpts_pty_new.
684	665	*/
685		−void devpts_pty_kill(struct inode *inode)
	666	+void devpts_pty_kill(struct dentry *dentry)
686	667	{
687		− struct super_block *sb = pts_sb_from_inode(inode);
688		− struct dentry *root = sb->s_root;
689		− struct dentry *dentry;
	668	+ WARN_ON_ONCE(dentry->d_sb->s_magic != DEVPTS_SUPER_MAGIC);
690	669
691		− BUG_ON(inode->i_rdev == MKDEV(TTYAUX_MAJOR, PTMX_MINOR));
692		−
693		− inode_lock(d_inode(root));
694		−
695		− dentry = d_find_alias(inode);
696		−
697		− drop_nlink(inode);
	670	+ dentry->d_fsdata = NULL;
	671	+ drop_nlink(dentry->d_inode);
698	672	d_delete(dentry);
699	673	dput(dentry); /* d_alloc_name() in devpts_pty_new() */
700		− dput(dentry); /* d_find_alias above */
701		−
702		− inode_unlock(d_inode(root));
703	674	}
704	675
705	676	static int __init init_devpts_fs(void)

fs/ocfs2/dlm/dlmmaster.c+2−0

@@ -2455,6 +2455,8 @@ int dlm_deref_lockres_done_handler(struct o2net_msg msg, u32 len, void data, · 2454 unmodified lines
2455	2455
2456	2456	spin_unlock(&dlm->spinlock);
2457	2457
	2458	+ ret = 0;
	2459	+
2458	2460	done:
2459	2461	dlm_put(dlm);
2460	2462	return ret;

fs/proc/task_mmu.c+30−3

@@ -1518,6 +1518,32 @@ static struct page can_gather_numa_stats(pte_t pte, struct vm_area_struct vma, · 1517 unmodified lines
1518	1518	return page;
1519	1519	}
1520	1520
	1521	+#ifdef CONFIG_TRANSPARENT_HUGEPAGE
	1522	+static struct page *can_gather_numa_stats_pmd(pmd_t pmd,
	1523	+ struct vm_area_struct *vma,
	1524	+ unsigned long addr)
	1525	+{
	1526	+ struct page *page;
	1527	+ int nid;
	1528	+
	1529	+ if (!pmd_present(pmd))
	1530	+ return NULL;
	1531	+
	1532	+ page = vm_normal_page_pmd(vma, addr, pmd);
	1533	+ if (!page)
	1534	+ return NULL;
	1535	+
	1536	+ if (PageReserved(page))
	1537	+ return NULL;
	1538	+
	1539	+ nid = page_to_nid(page);
	1540	+ if (!node_isset(nid, node_states[N_MEMORY]))
	1541	+ return NULL;
	1542	+
	1543	+ return page;
	1544	+}
	1545	+#endif
	1546	+
1521	1547	static int gather_pte_stats(pmd_t *pmd, unsigned long addr,
1522	1548	unsigned long end, struct mm_walk *walk)
1523	1549	{
@@ -1527,14 +1553,14 @@ static int gather_pte_stats(pmd_t *pmd, unsigned long addr, · 3 unmodified lines
1527	1553	pte_t *orig_pte;
1528	1554	pte_t *pte;
1529	1555
	1556	+#ifdef CONFIG_TRANSPARENT_HUGEPAGE
1530	1557	ptl = pmd_trans_huge_lock(pmd, vma);
1531	1558	if (ptl) {
1532		− pte_t huge_pte = (pte_t )pmd;
1533	1559	struct page *page;
1534	1560
1535		− page = can_gather_numa_stats(huge_pte, vma, addr);
	1561	+ page = can_gather_numa_stats_pmd(*pmd, vma, addr);
1536	1562	if (page)
1537		− gather_stats(page, md, pte_dirty(huge_pte),
	1563	+ gather_stats(page, md, pmd_dirty(*pmd),
1538	1564	HPAGE_PMD_SIZE/PAGE_SIZE);
1539	1565	spin_unlock(ptl);
1540	1566	return 0;
@@ -1542,6 +1568,7 @@ static int gather_pte_stats(pmd_t *pmd, unsigned long addr, · 1 unmodified line
1542	1568
1543	1569	if (pmd_trans_unstable(pmd))
1544	1570	return 0;
	1571	+#endif
1545	1572	orig_pte = pte = pte_offset_map_lock(walk->mm, pmd, addr, &ptl);
1546	1573	do {
1547	1574	struct page page = can_gather_numa_stats(pte, vma, addr);

include/linux/ceph/auth.h+5−5

@@ -12,9 +12,12 @@ · 11 unmodified lines
12	12	*/
13	13
14	14	struct ceph_auth_client;
15		−struct ceph_authorizer;
16	15	struct ceph_msg;
17	16
	17	+struct ceph_authorizer {
	18	+ void (destroy)(struct ceph_authorizer );
	19	+};
	20	+
18	21	struct ceph_auth_handshake {
19	22	struct ceph_authorizer *authorizer;
20	23	void *authorizer_buf;
@@ -62,8 +65,6 @@ struct ceph_auth_client_ops { · 41 unmodified lines
62	65	struct ceph_auth_handshake *auth);
63	66	int (verify_authorizer_reply)(struct ceph_auth_client ac,
64	67	struct ceph_authorizer *a, size_t len);
65		− void (destroy_authorizer)(struct ceph_auth_client ac,
66		− struct ceph_authorizer *a);
67	68	void (invalidate_authorizer)(struct ceph_auth_client ac,
68	69	int peer_type);
69	70
@@ -112,8 +113,7 @@ extern int ceph_auth_is_authenticated(struct ceph_auth_client *ac); · 42 unmodified lines
112	113	extern int ceph_auth_create_authorizer(struct ceph_auth_client *ac,
113	114	int peer_type,
114	115	struct ceph_auth_handshake *auth);
115		−extern void ceph_auth_destroy_authorizer(struct ceph_auth_client *ac,
116		− struct ceph_authorizer *a);
	116	+void ceph_auth_destroy_authorizer(struct ceph_authorizer *a);
117	117	extern int ceph_auth_update_authorizer(struct ceph_auth_client *ac,
118	118	int peer_type,
119	119	struct ceph_auth_handshake *a);

include/linux/ceph/osd_client.h+0−1

@@ -16,7 +16,6 @@ struct ceph_msg; · 15 unmodified lines
16	16	struct ceph_snap_context;
17	17	struct ceph_osd_request;
18	18	struct ceph_osd_client;
19		−struct ceph_authorizer;
20	19
21	20	/*
22	21	* completion callback for async writepages

include/linux/cgroup-defs.h+1−0

@@ -444,6 +444,7 @@ struct cgroup_subsys { · 443 unmodified lines
444	444	int (can_attach)(struct cgroup_taskset tset);
445	445	void (cancel_attach)(struct cgroup_taskset tset);
446	446	void (attach)(struct cgroup_taskset tset);
	447	+ void (*post_attach)(void);
447	448	int (can_fork)(struct task_struct task);
448	449	void (cancel_fork)(struct task_struct task);
449	450	void (fork)(struct task_struct task);

include/linux/cpuset.h+0−6

@@ -137,8 +137,6 @@ static inline void set_mems_allowed(nodemask_t nodemask) · 136 unmodified lines
137	137	task_unlock(current);
138	138	}
139	139
140		−extern void cpuset_post_attach_flush(void);
141		−
142	140	#else /* !CONFIG_CPUSETS */
143	141
144	142	static inline bool cpusets_enabled(void) { return false; }
@@ -245,10 +243,6 @@ static inline bool read_mems_allowed_retry(unsigned int seq) · 100 unmodified lines
245	243	return false;
246	244	}
247	245
248		−static inline void cpuset_post_attach_flush(void)
249		−{
250		−}
251		−
252	246	#endif /* !CONFIG_CPUSETS */
253	247
254	248	#endif /* _LINUX_CPUSET_H */

include/linux/devpts_fs.h+3−3

@@ -27,11 +27,11 @@ int devpts_new_index(struct pts_fs_info *); · 26 unmodified lines
27	27	void devpts_kill_index(struct pts_fs_info *, int);
28	28
29	29	/* mknod in devpts */
30		−struct inode devpts_pty_new(struct pts_fs_info , dev_t, int, void *);
	30	+struct dentry devpts_pty_new(struct pts_fs_info , int, void *);
31	31	/* get private structure */
32		−void devpts_get_priv(struct inode pts_inode);
	32	+void devpts_get_priv(struct dentry );
33	33	/* unlink */
34		−void devpts_pty_kill(struct inode *inode);
	34	+void devpts_pty_kill(struct dentry *);
35	35
36	36	#endif
37	37

include/linux/huge_mm.h+5−0

@@ -152,6 +152,7 @@ static inline bool is_huge_zero_pmd(pmd_t pmd) · 151 unmodified lines
152	152	}
153	153
154	154	struct page *get_huge_zero_page(void);
	155	+void put_huge_zero_page(void);
155	156
156	157	#else /* CONFIG_TRANSPARENT_HUGEPAGE */
157	158	#define HPAGE_PMD_SHIFT ({ BUILD_BUG(); 0; })
@@ -208,6 +209,10 @@ static inline bool is_huge_zero_page(struct page *page) · 50 unmodified lines
208	209	return false;
209	210	}
210	211
	212	+static inline void put_huge_zero_page(void)
	213	+{
	214	+ BUILD_BUG();
	215	+}
211	216
212	217	static inline struct page follow_devmap_pmd(struct vm_area_struct vma,
213	218	unsigned long addr, pmd_t *pmd, int flags)

include/linux/lockdep.h+5−3

@@ -196,9 +196,11 @@ struct lock_list { · 195 unmodified lines
196	196	* We record lock dependency chains, so that we can cache them:
197	197	*/
198	198	struct lock_chain {
199		− u8 irq_context;
200		− u8 depth;
201		− u16 base;
	199	+ /* see BUILD_BUG_ON()s in lookup_chain_cache() */
	200	+ unsigned int irq_context : 2,
	201	+ depth : 6,
	202	+ base : 24;
	203	+ /* 4 byte hole */
202	204	struct hlist_node entry;
203	205	u64 chain_key;
204	206	};

include/linux/mlx5/device.h+11−0

@@ -392,6 +392,17 @@ enum { · 391 unmodified lines
392	392	MLX5_CAP_OFF_CMDIF_CSUM = 46,
393	393	};
394	394
	395	+enum {
	396	+ /*
	397	+ * Max wqe size for rdma read is 512 bytes, so this
	398	+ * limits our max_sge_rd as the wqe needs to fit:
	399	+ * - ctrl segment (16 bytes)
	400	+ * - rdma segment (16 bytes)
	401	+ * - scatter elements (16 bytes each)
	402	+ */
	403	+ MLX5_MAX_SGE_RD = (512 - 16 - 16) / 16
	404	+};
	405	+
395	406	struct mlx5_inbox_hdr {
396	407	__be16 opcode;
397	408	u8 rsvd[4];

include/linux/mlx5/driver.h+4−3

@@ -519,8 +519,9 @@ enum mlx5_device_state { · 518 unmodified lines
519	519	};
520	520
521	521	enum mlx5_interface_state {
522		− MLX5_INTERFACE_STATE_DOWN,
523		− MLX5_INTERFACE_STATE_UP,
	522	+ MLX5_INTERFACE_STATE_DOWN = BIT(0),
	523	+ MLX5_INTERFACE_STATE_UP = BIT(1),
	524	+ MLX5_INTERFACE_STATE_SHUTDOWN = BIT(2),
524	525	};
525	526
526	527	enum mlx5_pci_status {
@@ -544,7 +545,7 @@ struct mlx5_core_dev { · 17 unmodified lines
544	545	enum mlx5_device_state state;
545	546	/* sync interface state */
546	547	struct mutex intf_state_mutex;
547		− enum mlx5_interface_state interface_state;
	548	+ unsigned long intf_state;
548	549	void (event) (struct mlx5_core_dev dev,
549	550	enum mlx5_dev_event event,
550	551	unsigned long param);

include/linux/mlx5/port.h+3−3

@@ -54,9 +54,9 @@ int mlx5_set_port_admin_status(struct mlx5_core_dev *dev, · 53 unmodified lines
54	54	int mlx5_query_port_admin_status(struct mlx5_core_dev *dev,
55	55	enum mlx5_port_status *status);
56	56
57		−int mlx5_set_port_mtu(struct mlx5_core_dev *dev, int mtu, u8 port);
58		−void mlx5_query_port_max_mtu(struct mlx5_core_dev dev, int max_mtu, u8 port);
59		−void mlx5_query_port_oper_mtu(struct mlx5_core_dev dev, int oper_mtu,
	57	+int mlx5_set_port_mtu(struct mlx5_core_dev *dev, u16 mtu, u8 port);
	58	+void mlx5_query_port_max_mtu(struct mlx5_core_dev dev, u16 max_mtu, u8 port);
	59	+void mlx5_query_port_oper_mtu(struct mlx5_core_dev dev, u16 oper_mtu,
60	60	u8 port);
61	61
62	62	int mlx5_query_port_vl_hw_cap(struct mlx5_core_dev *dev,

include/linux/mlx5/vport.h+2−0

@@ -45,6 +45,8 @@ int mlx5_query_nic_vport_mac_address(struct mlx5_core_dev *mdev, · 44 unmodified lines
45	45	u16 vport, u8 *addr);
46	46	int mlx5_modify_nic_vport_mac_address(struct mlx5_core_dev *dev,
47	47	u16 vport, u8 *addr);
	48	+int mlx5_query_nic_vport_mtu(struct mlx5_core_dev mdev, u16 mtu);
	49	+int mlx5_modify_nic_vport_mtu(struct mlx5_core_dev *mdev, u16 mtu);
48	50	int mlx5_query_nic_vport_system_image_guid(struct mlx5_core_dev *mdev,
49	51	u64 *system_image_guid);
50	52	int mlx5_query_nic_vport_node_guid(struct mlx5_core_dev mdev, u64 node_guid);

include/linux/mm.h+4−0

@@ -1031,6 +1031,8 @@ static inline bool page_mapped(struct page *page) · 1030 unmodified lines
1031	1031	page = compound_head(page);
1032	1032	if (atomic_read(compound_mapcount_ptr(page)) >= 0)
1033	1033	return true;
	1034	+ if (PageHuge(page))
	1035	+ return false;
1034	1036	for (i = 0; i < hpage_nr_pages(page); i++) {
1035	1037	if (atomic_read(&page[i]._mapcount) >= 0)
1036	1038	return true;
@@ -1138,6 +1140,8 @@ struct zap_details { · 101 unmodified lines
1138	1140
1139	1141	struct page vm_normal_page(struct vm_area_struct vma, unsigned long addr,
1140	1142	pte_t pte);
	1143	+struct page vm_normal_page_pmd(struct vm_area_struct vma, unsigned long addr,
	1144	+ pmd_t pmd);
1141	1145
1142	1146	int zap_vma_ptes(struct vm_area_struct *vma, unsigned long address,
1143	1147	unsigned long size);

include/linux/tty_driver.h+2−2

@@ -7,7 +7,7 @@ · 6 unmodified lines
7	7	* defined; unless noted otherwise, they are optional, and can be
8	8	* filled in with a null pointer.
9	9	*
10		− * struct tty_struct * (lookup)(struct tty_driver self, int idx)
	10	+ * struct tty_struct * (lookup)(struct tty_driver self, struct file *, int idx)
11	11	*
12	12	* Return the tty device corresponding to idx, NULL if there is not
13	13	* one currently in use and an ERR_PTR value on error. Called under
@@ -250,7 +250,7 @@ struct serial_icounter_struct; · 236 unmodified lines
250	250
251	251	struct tty_operations {
252	252	struct tty_struct * (lookup)(struct tty_driver driver,
253		− struct inode *inode, int idx);
	253	+ struct file *filp, int idx);
254	254	int (install)(struct tty_driver driver, struct tty_struct *tty);
255	255	void (remove)(struct tty_driver driver, struct tty_struct *tty);
256	256	int (open)(struct tty_struct tty, struct file * filp);

include/media/videobuf2-core.h+8−0

@@ -375,6 +375,9 @@ struct vb2_ops { · 374 unmodified lines
375	375	/**
376	376	* struct vb2_ops - driver-specific callbacks
377	377	*
	378	+ * @verify_planes_array: Verify that a given user space structure contains
	379	+ * enough planes for the buffer. This is called
	380	+ * for each dequeued buffer.
378	381	* @fill_user_buffer: given a vb2_buffer fill in the userspace structure.
379	382	* For V4L2 this is a struct v4l2_buffer.
380	383	* @fill_vb2_buffer: given a userspace structure, fill in the vb2_buffer.
@@ -384,6 +387,7 @@ struct vb2_ops { · 3 unmodified lines
384	387	* the vb2_buffer struct.
385	388	*/
386	389	struct vb2_buf_ops {
	390	+ int (verify_planes_array)(struct vb2_buffer vb, const void *pb);
387	391	void (fill_user_buffer)(struct vb2_buffer vb, void *pb);
388	392	int (fill_vb2_buffer)(struct vb2_buffer vb, const void *pb,
389	393	struct vb2_plane *planes);
@@ -400,6 +404,9 @@ struct vb2_buf_ops { · 10 unmodified lines
400	404	* @fileio_read_once: report EOF after reading the first buffer
401	405	* @fileio_write_immediately: queue buffer after each write() call
402	406	* @allow_zero_bytesused: allow bytesused == 0 to be passed to the driver
	407	+ * @quirk_poll_must_check_waiting_for_buffers: Return POLLERR at poll when QBUF
	408	+ * has not been called. This is a vb1 idiom that has been adopted
	409	+ * also by vb2.
403	410	* @lock: pointer to a mutex that protects the vb2_queue struct. The
404	411	* driver can set this to a mutex to let the v4l2 core serialize
405	412	* the queuing ioctls. If the driver wants to handle locking
@@ -463,6 +470,7 @@ struct vb2_queue { · 57 unmodified lines
463	470	unsigned fileio_read_once:1;
464	471	unsigned fileio_write_immediately:1;
465	472	unsigned allow_zero_bytesused:1;
	473	+ unsigned quirk_poll_must_check_waiting_for_buffers:1;
466	474
467	475	struct mutex *lock;
468	476	void *owner;

include/net/switchdev.h+4−0

@@ -54,6 +54,8 @@ struct switchdev_attr { · 53 unmodified lines
54	54	struct net_device *orig_dev;
55	55	enum switchdev_attr_id id;
56	56	u32 flags;
	57	+ void *complete_priv;
	58	+ void (complete)(struct net_device dev, int err, void *priv);
57	59	union {
58	60	struct netdev_phys_item_id ppid; /* PORT_PARENT_ID */
59	61	u8 stp_state; /* PORT_STP_STATE */
@@ -75,6 +77,8 @@ struct switchdev_obj { · 15 unmodified lines
75	77	struct net_device *orig_dev;
76	78	enum switchdev_obj_id id;
77	79	u32 flags;
	80	+ void *complete_priv;
	81	+ void (complete)(struct net_device dev, int err, void *priv);
78	82	};
79	83
80	84	/* SWITCHDEV_OBJ_ID_PORT_VLAN */

include/rdma/ib.h+16−0

@@ -34,6 +34,7 @@ · 33 unmodified lines
34	34	#define _RDMA_IB_H
35	35
36	36	#include <linux/types.h>
	37	+#include <linux/sched.h>
37	38
38	39	struct ib_addr {
39	40	union {
@@ -86,4 +87,19 @@ struct sockaddr_ib { · 46 unmodified lines
86	87	__u64 sib_scope_id;
87	88	};
88	89
	90	+/*
	91	+ * The IB interfaces that use write() as bi-directional ioctl() are
	92	+ * fundamentally unsafe, since there are lots of ways to trigger "write()"
	93	+ * calls from various contexts with elevated privileges. That includes the
	94	+ * traditional suid executable error message writes, but also various kernel
	95	+ * interfaces that can write to file descriptors.
	96	+ *
	97	+ * This function provides protection for the legacy API by restricting the
	98	+ * calling context.
	99	+ */
	100	+static inline bool ib_safe_file_access(struct file *filp)
	101	+{
	102	+ return filp->f_cred == current_cred() && segment_eq(get_fs(), USER_DS);
	103	+}
	104	+
89	105	#endif /* _RDMA_IB_H */

include/sound/hda_i915.h+2−3

@@ -9,7 +9,7 @@ · 8 unmodified lines
9	9	#ifdef CONFIG_SND_HDA_I915
10	10	int snd_hdac_set_codec_wakeup(struct hdac_bus *bus, bool enable);
11	11	int snd_hdac_display_power(struct hdac_bus *bus, bool enable);
12		−int snd_hdac_get_display_clk(struct hdac_bus *bus);
	12	+void snd_hdac_i915_set_bclk(struct hdac_bus *bus);
13	13	int snd_hdac_sync_audio_rate(struct hdac_bus *bus, hda_nid_t nid, int rate);
14	14	int snd_hdac_acomp_get_eld(struct hdac_bus *bus, hda_nid_t nid,
15	15	bool audio_enabled, char buffer, int max_bytes);
@@ -25,9 +25,8 @@ static inline int snd_hdac_display_power(struct hdac_bus *bus, bool enable) · 9 unmodified lines
25	25	{
26	26	return 0;
27	27	}
28		−static inline int snd_hdac_get_display_clk(struct hdac_bus *bus)
	28	+static inline void snd_hdac_i915_set_bclk(struct hdac_bus *bus)
29	29	{
30		− return 0;
31	30	}
32	31	static inline int snd_hdac_sync_audio_rate(struct hdac_bus *bus, hda_nid_t nid,
33	32	int rate)

include/uapi/linux/if_macsec.h+2−2

@@ -19,8 +19,8 @@ · 18 unmodified lines
19	19
20	20	#define MACSEC_MAX_KEY_LEN 128
21	21
22		−#define DEFAULT_CIPHER_ID 0x0080020001000001ULL
23		−#define DEFAULT_CIPHER_ALT 0x0080C20001000001ULL
	22	+#define MACSEC_DEFAULT_CIPHER_ID 0x0080020001000001ULL
	23	+#define MACSEC_DEFAULT_CIPHER_ALT 0x0080C20001000001ULL
24	24
25	25	#define MACSEC_MIN_ICV_LEN 8
26	26	#define MACSEC_MAX_ICV_LEN 32

include/uapi/linux/v4l2-dv-timings.h+20−10

@@ -183,7 +183,8 @@ · 182 unmodified lines
183	183
184	184	#define V4L2_DV_BT_CEA_3840X2160P24 { \
185	185	.type = V4L2_DV_BT_656_1120, \
186		− V4L2_INIT_BT_TIMINGS(3840, 2160, 0, V4L2_DV_HSYNC_POS_POL, \
	186	+ V4L2_INIT_BT_TIMINGS(3840, 2160, 0, \
	187	+ V4L2_DV_HSYNC_POS_POL \| V4L2_DV_VSYNC_POS_POL, \
187	188	297000000, 1276, 88, 296, 8, 10, 72, 0, 0, 0, \
188	189	V4L2_DV_BT_STD_CEA861, \
189	190	V4L2_DV_FL_CAN_REDUCE_FPS \| V4L2_DV_FL_IS_CE_VIDEO) \
@@ -191,14 +192,16 @@ · 1 unmodified line
191	192
192	193	#define V4L2_DV_BT_CEA_3840X2160P25 { \
193	194	.type = V4L2_DV_BT_656_1120, \
194		− V4L2_INIT_BT_TIMINGS(3840, 2160, 0, V4L2_DV_HSYNC_POS_POL, \
	195	+ V4L2_INIT_BT_TIMINGS(3840, 2160, 0, \
	196	+ V4L2_DV_HSYNC_POS_POL \| V4L2_DV_VSYNC_POS_POL, \
195	197	297000000, 1056, 88, 296, 8, 10, 72, 0, 0, 0, \
196	198	V4L2_DV_BT_STD_CEA861, V4L2_DV_FL_IS_CE_VIDEO) \
197	199	}
198	200
199	201	#define V4L2_DV_BT_CEA_3840X2160P30 { \
200	202	.type = V4L2_DV_BT_656_1120, \
201		− V4L2_INIT_BT_TIMINGS(3840, 2160, 0, V4L2_DV_HSYNC_POS_POL, \
	203	+ V4L2_INIT_BT_TIMINGS(3840, 2160, 0, \
	204	+ V4L2_DV_HSYNC_POS_POL \| V4L2_DV_VSYNC_POS_POL, \
202	205	297000000, 176, 88, 296, 8, 10, 72, 0, 0, 0, \
203	206	V4L2_DV_BT_STD_CEA861, \
204	207	V4L2_DV_FL_CAN_REDUCE_FPS \| V4L2_DV_FL_IS_CE_VIDEO) \
@@ -206,14 +209,16 @@ · 1 unmodified line
206	209
207	210	#define V4L2_DV_BT_CEA_3840X2160P50 { \
208	211	.type = V4L2_DV_BT_656_1120, \
209		− V4L2_INIT_BT_TIMINGS(3840, 2160, 0, V4L2_DV_HSYNC_POS_POL, \
	212	+ V4L2_INIT_BT_TIMINGS(3840, 2160, 0, \
	213	+ V4L2_DV_HSYNC_POS_POL \| V4L2_DV_VSYNC_POS_POL, \
210	214	594000000, 1056, 88, 296, 8, 10, 72, 0, 0, 0, \
211	215	V4L2_DV_BT_STD_CEA861, V4L2_DV_FL_IS_CE_VIDEO) \
212	216	}
213	217
214	218	#define V4L2_DV_BT_CEA_3840X2160P60 { \
215	219	.type = V4L2_DV_BT_656_1120, \
216		− V4L2_INIT_BT_TIMINGS(3840, 2160, 0, V4L2_DV_HSYNC_POS_POL, \
	220	+ V4L2_INIT_BT_TIMINGS(3840, 2160, 0, \
	221	+ V4L2_DV_HSYNC_POS_POL \| V4L2_DV_VSYNC_POS_POL, \
217	222	594000000, 176, 88, 296, 8, 10, 72, 0, 0, 0, \
218	223	V4L2_DV_BT_STD_CEA861, \
219	224	V4L2_DV_FL_CAN_REDUCE_FPS \| V4L2_DV_FL_IS_CE_VIDEO) \
@@ -221,7 +226,8 @@ · 1 unmodified line
221	226
222	227	#define V4L2_DV_BT_CEA_4096X2160P24 { \
223	228	.type = V4L2_DV_BT_656_1120, \
224		− V4L2_INIT_BT_TIMINGS(4096, 2160, 0, V4L2_DV_HSYNC_POS_POL, \
	229	+ V4L2_INIT_BT_TIMINGS(4096, 2160, 0, \
	230	+ V4L2_DV_HSYNC_POS_POL \| V4L2_DV_VSYNC_POS_POL, \
225	231	297000000, 1020, 88, 296, 8, 10, 72, 0, 0, 0, \
226	232	V4L2_DV_BT_STD_CEA861, \
227	233	V4L2_DV_FL_CAN_REDUCE_FPS \| V4L2_DV_FL_IS_CE_VIDEO) \
@@ -229,14 +235,16 @@ · 1 unmodified line
229	235
230	236	#define V4L2_DV_BT_CEA_4096X2160P25 { \
231	237	.type = V4L2_DV_BT_656_1120, \
232		− V4L2_INIT_BT_TIMINGS(4096, 2160, 0, V4L2_DV_HSYNC_POS_POL, \
	238	+ V4L2_INIT_BT_TIMINGS(4096, 2160, 0, \
	239	+ V4L2_DV_HSYNC_POS_POL \| V4L2_DV_VSYNC_POS_POL, \
233	240	297000000, 968, 88, 128, 8, 10, 72, 0, 0, 0, \
234	241	V4L2_DV_BT_STD_CEA861, V4L2_DV_FL_IS_CE_VIDEO) \
235	242	}
236	243
237	244	#define V4L2_DV_BT_CEA_4096X2160P30 { \
238	245	.type = V4L2_DV_BT_656_1120, \
239		− V4L2_INIT_BT_TIMINGS(4096, 2160, 0, V4L2_DV_HSYNC_POS_POL, \
	246	+ V4L2_INIT_BT_TIMINGS(4096, 2160, 0, \
	247	+ V4L2_DV_HSYNC_POS_POL \| V4L2_DV_VSYNC_POS_POL, \
240	248	297000000, 88, 88, 128, 8, 10, 72, 0, 0, 0, \
241	249	V4L2_DV_BT_STD_CEA861, \
242	250	V4L2_DV_FL_CAN_REDUCE_FPS \| V4L2_DV_FL_IS_CE_VIDEO) \
@@ -244,14 +252,16 @@ · 1 unmodified line
244	252
245	253	#define V4L2_DV_BT_CEA_4096X2160P50 { \
246	254	.type = V4L2_DV_BT_656_1120, \
247		− V4L2_INIT_BT_TIMINGS(4096, 2160, 0, V4L2_DV_HSYNC_POS_POL, \
	255	+ V4L2_INIT_BT_TIMINGS(4096, 2160, 0, \
	256	+ V4L2_DV_HSYNC_POS_POL \| V4L2_DV_VSYNC_POS_POL, \
248	257	594000000, 968, 88, 128, 8, 10, 72, 0, 0, 0, \
249	258	V4L2_DV_BT_STD_CEA861, V4L2_DV_FL_IS_CE_VIDEO) \
250	259	}
251	260
252	261	#define V4L2_DV_BT_CEA_4096X2160P60 { \
253	262	.type = V4L2_DV_BT_656_1120, \
254		− V4L2_INIT_BT_TIMINGS(4096, 2160, 0, V4L2_DV_HSYNC_POS_POL, \
	263	+ V4L2_INIT_BT_TIMINGS(4096, 2160, 0, \
	264	+ V4L2_DV_HSYNC_POS_POL \| V4L2_DV_VSYNC_POS_POL, \
255	265	594000000, 88, 88, 128, 8, 10, 72, 0, 0, 0, \
256	266	V4L2_DV_BT_STD_CEA861, \
257	267	V4L2_DV_FL_CAN_REDUCE_FPS \| V4L2_DV_FL_IS_CE_VIDEO) \

kernel/bpf/verifier.c+0−1

@@ -2030,7 +2030,6 @@ static int replace_map_fd_with_map_ptr(struct verifier_env *env) · 2029 unmodified lines
2030	2030	if (IS_ERR(map)) {
2031	2031	verbose("fd %d is not pointing to valid bpf_map\n",
2032	2032	insn->imm);
2033		− fdput(f);
2034	2033	return PTR_ERR(map);
2035	2034	}
2036	2035

kernel/cgroup.c+5−2

@@ -2825,9 +2825,10 @@ static ssize_t __cgroup_procs_write(struct kernfs_open_file of, char buf, · 2824 unmodified lines
2825	2825	size_t nbytes, loff_t off, bool threadgroup)
2826	2826	{
2827	2827	struct task_struct *tsk;
	2828	+ struct cgroup_subsys *ss;
2828	2829	struct cgroup *cgrp;
2829	2830	pid_t pid;
2830		− int ret;
	2831	+ int ssid, ret;
2831	2832
2832	2833	if (kstrtoint(strstrip(buf), 0, &pid) \|\| pid < 0)
2833	2834	return -EINVAL;
@@ -2875,8 +2876,10 @@ out_unlock_rcu: · 41 unmodified lines
2875	2876	rcu_read_unlock();
2876	2877	out_unlock_threadgroup:
2877	2878	percpu_up_write(&cgroup_threadgroup_rwsem);
	2879	+ for_each_subsys(ss, ssid)
	2880	+ if (ss->post_attach)
	2881	+ ss->post_attach();
2878	2882	cgroup_kn_unlock(of->kn);
2879		− cpuset_post_attach_flush();
2880	2883	return ret ?: nbytes;
2881	2884	}
2882	2885

kernel/cpuset.c+2−2

@@ -58,7 +58,6 @@ · 57 unmodified lines
58	58	#include <asm/uaccess.h>
59	59	#include <linux/atomic.h>
60	60	#include <linux/mutex.h>
61		−#include <linux/workqueue.h>
62	61	#include <linux/cgroup.h>
63	62	#include <linux/wait.h>
64	63
@@ -1016,7 +1015,7 @@ static void cpuset_migrate_mm(struct mm_struct mm, const nodemask_t from, · 951 unmodified lines
1016	1015	}
1017	1016	}
1018	1017
1019		−void cpuset_post_attach_flush(void)
	1018	+static void cpuset_post_attach(void)
1020	1019	{
1021	1020	flush_workqueue(cpuset_migrate_mm_wq);
1022	1021	}
@@ -2087,6 +2086,7 @@ struct cgroup_subsys cpuset_cgrp_subsys = { · 1064 unmodified lines
2087	2086	.can_attach = cpuset_can_attach,
2088	2087	.cancel_attach = cpuset_cancel_attach,
2089	2088	.attach = cpuset_attach,
	2089	+ .post_attach = cpuset_post_attach,
2090	2090	.bind = cpuset_bind,
2091	2091	.legacy_cftypes = files,
2092	2092	.early_init = true,

kernel/events/core.c+38−17

@@ -412,7 +412,8 @@ int perf_cpu_time_max_percent_handler(struct ctl_table *table, int write, · 411 unmodified lines
412	412	if (ret \|\| !write)
413	413	return ret;
414	414
415		− if (sysctl_perf_cpu_time_max_percent == 100) {
	415	+ if (sysctl_perf_cpu_time_max_percent == 100 \|\|
	416	+ sysctl_perf_cpu_time_max_percent == 0) {
416	417	printk(KERN_WARNING
417	418	"perf: Dynamic interrupt throttling disabled, can hang your system!\n");
418	419	WRITE_ONCE(perf_sample_allowed_ns, 0);
@@ -1105,6 +1106,7 @@ static void put_ctx(struct perf_event_context *ctx) · 686 unmodified lines
1105	1106	* function.
1106	1107	*
1107	1108	* Lock order:
	1109	+ * cred_guard_mutex
1108	1110	* task_struct::perf_event_mutex
1109	1111	* perf_event_context::mutex
1110	1112	* perf_event::child_mutex;
@@ -3420,7 +3422,6 @@ static struct task_struct * · 2309 unmodified lines
3420	3422	find_lively_task_by_vpid(pid_t vpid)
3421	3423	{
3422	3424	struct task_struct *task;
3423		− int err;
3424	3425
3425	3426	rcu_read_lock();
3426	3427	if (!vpid)
@@ -3434,16 +3435,7 @@ find_lively_task_by_vpid(pid_t vpid) · 7 unmodified lines
3434	3435	if (!task)
3435	3436	return ERR_PTR(-ESRCH);
3436	3437
3437		− /* Reuse ptrace permission checks for now. */
3438		− err = -EACCES;
3439		− if (!ptrace_may_access(task, PTRACE_MODE_READ_REALCREDS))
3440		− goto errout;
3441		−
3442	3438	return task;
3443		−errout:
3444		− put_task_struct(task);
3445		− return ERR_PTR(err);
3446		−
3447	3439	}
3448	3440
3449	3441	/*
@@ -8413,6 +8405,24 @@ SYSCALL_DEFINE5(perf_event_open, · 4963 unmodified lines
8413	8405
8414	8406	get_online_cpus();
8415	8407
	8408	+ if (task) {
	8409	+ err = mutex_lock_interruptible(&task->signal->cred_guard_mutex);
	8410	+ if (err)
	8411	+ goto err_cpus;
	8412	+
	8413	+ /*
	8414	+ * Reuse ptrace permission checks for now.
	8415	+ *
	8416	+ * We must hold cred_guard_mutex across this and any potential
	8417	+ * perf_install_in_context() call for this new event to
	8418	+ * serialize against exec() altering our credentials (and the
	8419	+ * perf_event_exit_task() that could imply).
	8420	+ */
	8421	+ err = -EACCES;
	8422	+ if (!ptrace_may_access(task, PTRACE_MODE_READ_REALCREDS))
	8423	+ goto err_cred;
	8424	+ }
	8425	+
8416	8426	if (flags & PERF_FLAG_PID_CGROUP)
8417	8427	cgroup_fd = pid;
8418	8428
@@ -8420,7 +8430,7 @@ SYSCALL_DEFINE5(perf_event_open, · 1 unmodified line
8420	8430	NULL, NULL, cgroup_fd);
8421	8431	if (IS_ERR(event)) {
8422	8432	err = PTR_ERR(event);
8423		− goto err_cpus;
	8433	+ goto err_cred;
8424	8434	}
8425	8435
8426	8436	if (is_sampling_event(event)) {
@@ -8479,11 +8489,6 @@ SYSCALL_DEFINE5(perf_event_open, · 52 unmodified lines
8479	8489	goto err_context;
8480	8490	}
8481	8491
8482		− if (task) {
8483		− put_task_struct(task);
8484		− task = NULL;
8485		− }
8486		−
8487	8492	/*
8488	8493	* Look up the group leader (we will attach this event to it):
8489	8494	*/
@@ -8581,6 +8586,11 @@ SYSCALL_DEFINE5(perf_event_open, · 91 unmodified lines
8581	8586
8582	8587	WARN_ON_ONCE(ctx->parent_ctx);
8583	8588
	8589	+ /*
	8590	+ * This is the point on no return; we cannot fail hereafter. This is
	8591	+ * where we start modifying current state.
	8592	+ */
	8593	+
8584	8594	if (move_group) {
8585	8595	/*
8586	8596	* See perf_event_ctx_lock() for comments on the details
@@ -8652,6 +8662,11 @@ SYSCALL_DEFINE5(perf_event_open, · 65 unmodified lines
8652	8662	mutex_unlock(&gctx->mutex);
8653	8663	mutex_unlock(&ctx->mutex);
8654	8664
	8665	+ if (task) {
	8666	+ mutex_unlock(&task->signal->cred_guard_mutex);
	8667	+ put_task_struct(task);
	8668	+ }
	8669	+
8655	8670	put_online_cpus();
8656	8671
8657	8672	mutex_lock(&current->perf_event_mutex);
@@ -8684,6 +8699,9 @@ err_alloc: · 26 unmodified lines
8684	8699	*/
8685	8700	if (!event_file)
8686	8701	free_event(event);
	8702	+err_cred:
	8703	+ if (task)
	8704	+ mutex_unlock(&task->signal->cred_guard_mutex);
8687	8705	err_cpus:
8688	8706	put_online_cpus();
8689	8707	err_task:
@@ -8968,6 +8986,9 @@ static void perf_event_exit_task_context(struct task_struct *child, int ctxn) · 278 unmodified lines
8968	8986
8969	8987	/*
8970	8988	* When a child task exits, feed back event values to parent events.
	8989	+ *
	8990	+ * Can be called with cred_guard_mutex held when called from
	8991	+ * install_exec_creds().
8971	8992	*/
8972	8993	void perf_event_exit_task(struct task_struct *child)
8973	8994	{

kernel/kcov.c+2−1

@@ -1,5 +1,6 @@
1	1	#define pr_fmt(fmt) "kcov: " fmt
2	2
	3	+#define DISABLE_BRANCH_PROFILING
3	4	#include <linux/compiler.h>
4	5	#include <linux/types.h>
5	6	#include <linux/file.h>
@@ -43,7 +44,7 @@ struct kcov { · 37 unmodified lines
43	44	* Entry point from instrumented code.
44	45	* This is called once per basic-block/edge.
45	46	*/
46		−void __sanitizer_cov_trace_pc(void)
	47	+void notrace __sanitizer_cov_trace_pc(void)
47	48	{
48	49	struct task_struct *t;
49	50	enum kcov_mode mode;

kernel/kexec_core.c+5−2

@@ -1415,6 +1415,9 @@ static int __init crash_save_vmcoreinfo_init(void) · 1414 unmodified lines
1415	1415	VMCOREINFO_OFFSET(page, lru);
1416	1416	VMCOREINFO_OFFSET(page, _mapcount);
1417	1417	VMCOREINFO_OFFSET(page, private);
	1418	+ VMCOREINFO_OFFSET(page, compound_dtor);
	1419	+ VMCOREINFO_OFFSET(page, compound_order);
	1420	+ VMCOREINFO_OFFSET(page, compound_head);
1418	1421	VMCOREINFO_OFFSET(pglist_data, node_zones);
1419	1422	VMCOREINFO_OFFSET(pglist_data, nr_zones);
1420	1423	#ifdef CONFIG_FLAT_NODE_MEM_MAP
@@ -1447,8 +1450,8 @@ static int __init crash_save_vmcoreinfo_init(void) · 26 unmodified lines
1447	1450	#ifdef CONFIG_X86
1448	1451	VMCOREINFO_NUMBER(KERNEL_IMAGE_SIZE);
1449	1452	#endif
1450		−#ifdef CONFIG_HUGETLBFS
1451		− VMCOREINFO_SYMBOL(free_huge_page);
	1453	+#ifdef CONFIG_HUGETLB_PAGE
	1454	+ VMCOREINFO_NUMBER(HUGETLB_PAGE_DTOR);
1452	1455	#endif
1453	1456
1454	1457	arch_crash_save_vmcoreinfo();

kernel/locking/lockdep.c+34−3

@@ -2176,15 +2176,37 @@ cache_hit: · 2175 unmodified lines
2176	2176	chain->irq_context = hlock->irq_context;
2177	2177	i = get_first_held_lock(curr, hlock);
2178	2178	chain->depth = curr->lockdep_depth + 1 - i;
	2179	+
	2180	+ BUILD_BUG_ON((1UL << 24) <= ARRAY_SIZE(chain_hlocks));
	2181	+ BUILD_BUG_ON((1UL << 6) <= ARRAY_SIZE(curr->held_locks));
	2182	+ BUILD_BUG_ON((1UL << 8*sizeof(chain_hlocks[0])) <= ARRAY_SIZE(lock_classes));
	2183	+
2179	2184	if (likely(nr_chain_hlocks + chain->depth <= MAX_LOCKDEP_CHAIN_HLOCKS)) {
2180	2185	chain->base = nr_chain_hlocks;
2181		− nr_chain_hlocks += chain->depth;
2182	2186	for (j = 0; j < chain->depth - 1; j++, i++) {
2183	2187	int lock_id = curr->held_locks[i].class_idx - 1;
2184	2188	chain_hlocks[chain->base + j] = lock_id;
2185	2189	}
2186	2190	chain_hlocks[chain->base + j] = class - lock_classes;
2187	2191	}
	2192	+
	2193	+ if (nr_chain_hlocks < MAX_LOCKDEP_CHAIN_HLOCKS)
	2194	+ nr_chain_hlocks += chain->depth;
	2195	+
	2196	+#ifdef CONFIG_DEBUG_LOCKDEP
	2197	+ /*
	2198	+ * Important for check_no_collision().
	2199	+ */
	2200	+ if (unlikely(nr_chain_hlocks > MAX_LOCKDEP_CHAIN_HLOCKS)) {
	2201	+ if (debug_locks_off_graph_unlock())
	2202	+ return 0;
	2203	+
	2204	+ print_lockdep_off("BUG: MAX_LOCKDEP_CHAIN_HLOCKS too low!");
	2205	+ dump_stack();
	2206	+ return 0;
	2207	+ }
	2208	+#endif
	2209	+
2188	2210	hlist_add_head_rcu(&chain->entry, hash_head);
2189	2211	debug_atomic_inc(chain_lookup_misses);
2190	2212	inc_chains();
@@ -2932,6 +2954,11 @@ static int mark_irqflags(struct task_struct curr, struct held_lock hlock) · 741 unmodified lines
2932	2954	return 1;
2933	2955	}
2934	2956
	2957	+static inline unsigned int task_irq_context(struct task_struct *task)
	2958	+{
	2959	+ return 2 * !!task->hardirq_context + !!task->softirq_context;
	2960	+}
	2961	+
2935	2962	static int separate_irq_context(struct task_struct *curr,
2936	2963	struct held_lock *hlock)
2937	2964	{
@@ -2940,8 +2967,6 @@ static int separate_irq_context(struct task_struct *curr, · 2 unmodified lines
2940	2967	/*
2941	2968	* Keep track of points where we cross into an interrupt context:
2942	2969	*/
2943		− hlock->irq_context = 2*(curr->hardirq_context ? 1 : 0) +
2944		− curr->softirq_context;
2945	2970	if (depth) {
2946	2971	struct held_lock *prev_hlock;
2947	2972
@@ -2973,6 +2998,11 @@ static inline int mark_irqflags(struct task_struct *curr, · 25 unmodified lines
2973	2998	return 1;
2974	2999	}
2975	3000
	3001	+static inline unsigned int task_irq_context(struct task_struct *task)
	3002	+{
	3003	+ return 0;
	3004	+}
	3005	+
2976	3006	static inline int separate_irq_context(struct task_struct *curr,
2977	3007	struct held_lock *hlock)
2978	3008	{
@@ -3241,6 +3271,7 @@ static int __lock_acquire(struct lockdep_map *lock, unsigned int subclass, · 262 unmodified lines
3241	3271	hlock->acquire_ip = ip;
3242	3272	hlock->instance = lock;
3243	3273	hlock->nest_lock = nest_lock;
	3274	+ hlock->irq_context = task_irq_context(curr);
3244	3275	hlock->trylock = trylock;
3245	3276	hlock->read = read;
3246	3277	hlock->check = check;

kernel/locking/lockdep_proc.c+2−0

@@ -141,6 +141,8 @@ static int lc_show(struct seq_file m, void v) · 140 unmodified lines
141	141	int i;
142	142
143	143	if (v == SEQ_START_TOKEN) {
	144	+ if (nr_chain_hlocks > MAX_LOCKDEP_CHAIN_HLOCKS)
	145	+ seq_printf(m, "(buggered) ");
144	146	seq_printf(m, "all lock chains:\n");
145	147	return 0;
146	148	}

kernel/workqueue.c+29−0

@@ -666,6 +666,35 @@ static void set_work_pool_and_clear_pending(struct work_struct *work, · 665 unmodified lines
666	666	*/
667	667	smp_wmb();
668	668	set_work_data(work, (unsigned long)pool_id << WORK_OFFQ_POOL_SHIFT, 0);
	669	+ /*
	670	+ * The following mb guarantees that previous clear of a PENDING bit
	671	+ * will not be reordered with any speculative LOADS or STORES from
	672	+ * work->current_func, which is executed afterwards. This possible
	673	+ * reordering can lead to a missed execution on attempt to qeueue
	674	+ * the same @work. E.g. consider this case:
	675	+ *
	676	+ * CPU#0 CPU#1
	677	+ * ---------------------------- --------------------------------
	678	+ *
	679	+ * 1 STORE event_indicated
	680	+ * 2 queue_work_on() {
	681	+ * 3 test_and_set_bit(PENDING)
	682	+ * 4 } set_..._and_clear_pending() {
	683	+ * 5 set_work_data() # clear bit
	684	+ * 6 smp_mb()
	685	+ * 7 work->current_func() {
	686	+ * 8 LOAD event_indicated
	687	+ * }
	688	+ *
	689	+ * Without an explicit full barrier speculative LOAD on line 8 can
	690	+ * be executed before CPU#0 does STORE on line 1. If that happens,
	691	+ * CPU#0 observes the PENDING bit is still set and new execution of
	692	+ * a @work is not queued in a hope, that CPU#1 will eventually
	693	+ * finish the queued @work. Meanwhile CPU#1 does not see
	694	+ * event_indicated is set, because speculative LOAD was executed
	695	+ * before actual STORE.
	696	+ */
	697	+ smp_mb();
669	698	}
670	699
671	700	static void clear_work_data(struct work_struct *work)

lib/stackdepot.c+0−4

@@ -210,10 +210,6 @@ depot_stack_handle_t depot_save_stack(struct stack_trace *trace, · 209 unmodified lines
210	210	goto fast_exit;
211	211
212	212	hash = hash_stack(trace->entries, trace->nr_entries);
213		− /* Bad luck, we won't store this stack. */
214		− if (hash == 0)
215		− goto exit;
216		−
217	213	bucket = &stack_table[hash & STACK_HASH_MASK];
218	214
219	215	/*

mm/huge_memory.c+5−7

@@ -232,7 +232,7 @@ retry: · 231 unmodified lines
232	232	return READ_ONCE(huge_zero_page);
233	233	}
234	234
235		−static void put_huge_zero_page(void)
	235	+void put_huge_zero_page(void)
236	236	{
237	237	/*
238	238	* Counter should never go to zero here. Only shrinker can put
@@ -1684,12 +1684,12 @@ int zap_huge_pmd(struct mmu_gather tlb, struct vm_area_struct vma, · 1445 unmodified lines
1684	1684	if (vma_is_dax(vma)) {
1685	1685	spin_unlock(ptl);
1686	1686	if (is_huge_zero_pmd(orig_pmd))
1687		− put_huge_zero_page();
	1687	+ tlb_remove_page(tlb, pmd_page(orig_pmd));
1688	1688	} else if (is_huge_zero_pmd(orig_pmd)) {
1689	1689	pte_free(tlb->mm, pgtable_trans_huge_withdraw(tlb->mm, pmd));
1690	1690	atomic_long_dec(&tlb->mm->nr_ptes);
1691	1691	spin_unlock(ptl);
1692		− put_huge_zero_page();
	1692	+ tlb_remove_page(tlb, pmd_page(orig_pmd));
1693	1693	} else {
1694	1694	struct page *page = pmd_page(orig_pmd);
1695	1695	page_remove_rmap(page, true);
@@ -1960,10 +1960,9 @@ int khugepaged_enter_vma_merge(struct vm_area_struct *vma, · 264 unmodified lines
1960	1960	* page fault if needed.
1961	1961	*/
1962	1962	return 0;
1963		− if (vma->vm_ops)
	1963	+ if (vma->vm_ops \|\| (vm_flags & VM_NO_THP))
1964	1964	/* khugepaged not yet working on file or special mappings */
1965	1965	return 0;
1966		− VM_BUG_ON_VMA(vm_flags & VM_NO_THP, vma);
1967	1966	hstart = (vma->vm_start + ~HPAGE_PMD_MASK) & HPAGE_PMD_MASK;
1968	1967	hend = vma->vm_end & HPAGE_PMD_MASK;
1969	1968	if (hstart < hend)
@@ -2352,8 +2351,7 @@ static bool hugepage_vma_check(struct vm_area_struct *vma) · 382 unmodified lines
2352	2351	return false;
2353	2352	if (is_vma_temporary_stack(vma))
2354	2353	return false;
2355		− VM_BUG_ON_VMA(vma->vm_flags & VM_NO_THP, vma);
2356		− return true;
	2354	+ return !(vma->vm_flags & VM_NO_THP);
2357	2355	}
2358	2356
2359	2357	static void collapse_huge_page(struct mm_struct *mm,

mm/memcontrol.c+19−18

@@ -207,6 +207,7 @@ static void mem_cgroup_oom_notify(struct mem_cgroup *memcg); · 206 unmodified lines
207	207	/* "mc" and its members are protected by cgroup_mutex */
208	208	static struct move_charge_struct {
209	209	spinlock_t lock; /* for from, to */
	210	+ struct mm_struct *mm;
210	211	struct mem_cgroup *from;
211	212	struct mem_cgroup *to;
212	213	unsigned long flags;
@@ -4667,6 +4668,8 @@ static void __mem_cgroup_clear_mc(void) · 4454 unmodified lines
4667	4668
4668	4669	static void mem_cgroup_clear_mc(void)
4669	4670	{
	4671	+ struct mm_struct *mm = mc.mm;
	4672	+
4670	4673	/*
4671	4674	* we must clear moving_task before waking up waiters at the end of
4672	4675	* task migration.
@@ -4676,7 +4679,10 @@ static void mem_cgroup_clear_mc(void) · 3 unmodified lines
4676	4679	spin_lock(&mc.lock);
4677	4680	mc.from = NULL;
4678	4681	mc.to = NULL;
	4682	+ mc.mm = NULL;
4679	4683	spin_unlock(&mc.lock);
	4684	+
	4685	+ mmput(mm);
4680	4686	}
4681	4687
4682	4688	static int mem_cgroup_can_attach(struct cgroup_taskset *tset)
@@ -4733,6 +4739,7 @@ static int mem_cgroup_can_attach(struct cgroup_taskset *tset) · 50 unmodified lines
4733	4739	VM_BUG_ON(mc.moved_swap);
4734	4740
4735	4741	spin_lock(&mc.lock);
	4742	+ mc.mm = mm;
4736	4743	mc.from = from;
4737	4744	mc.to = memcg;
4738	4745	mc.flags = move_flags;
@@ -4742,8 +4749,9 @@ static int mem_cgroup_can_attach(struct cgroup_taskset *tset) · 3 unmodified lines
4742	4749	ret = mem_cgroup_precharge_mc(mm);
4743	4750	if (ret)
4744	4751	mem_cgroup_clear_mc();
	4752	+ } else {
	4753	+ mmput(mm);
4745	4754	}
4746		− mmput(mm);
4747	4755	return ret;
4748	4756	}
4749	4757
@@ -4852,11 +4860,11 @@ put: /* get_mctgt_type() gets the page */ · 102 unmodified lines
4852	4860	return ret;
4853	4861	}
4854	4862
4855		−static void mem_cgroup_move_charge(struct mm_struct *mm)
	4863	+static void mem_cgroup_move_charge(void)
4856	4864	{
4857	4865	struct mm_walk mem_cgroup_move_charge_walk = {
4858	4866	.pmd_entry = mem_cgroup_move_charge_pte_range,
4859		− .mm = mm,
	4867	+ .mm = mc.mm,
4860	4868	};
4861	4869
4862	4870	lru_add_drain_all();
@@ -4868,7 +4876,7 @@ static void mem_cgroup_move_charge(struct mm_struct *mm) · 5 unmodified lines
4868	4876	atomic_inc(&mc.from->moving_account);
4869	4877	synchronize_rcu();
4870	4878	retry:
4871		− if (unlikely(!down_read_trylock(&mm->mmap_sem))) {
	4879	+ if (unlikely(!down_read_trylock(&mc.mm->mmap_sem))) {
4872	4880	/*
4873	4881	* Someone who are holding the mmap_sem might be waiting in
4874	4882	* waitq. So we cancel all extra charges, wake up all waiters,
@@ -4885,23 +4893,16 @@ retry: · 10 unmodified lines
4885	4893	* additional charge, the page walk just aborts.
4886	4894	*/
4887	4895	walk_page_range(0, ~0UL, &mem_cgroup_move_charge_walk);
4888		− up_read(&mm->mmap_sem);
	4896	+ up_read(&mc.mm->mmap_sem);
4889	4897	atomic_dec(&mc.from->moving_account);
4890	4898	}
4891	4899
4892		−static void mem_cgroup_move_task(struct cgroup_taskset *tset)
	4900	+static void mem_cgroup_move_task(void)
4893	4901	{
4894		− struct cgroup_subsys_state *css;
4895		− struct task_struct *p = cgroup_taskset_first(tset, &css);
4896		− struct mm_struct *mm = get_task_mm(p);
4897		−
4898		− if (mm) {
4899		− if (mc.to)
4900		− mem_cgroup_move_charge(mm);
4901		− mmput(mm);
4902		− }
4903		− if (mc.to)
	4902	+ if (mc.to) {
	4903	+ mem_cgroup_move_charge();
4904	4904	mem_cgroup_clear_mc();
	4905	+ }
4905	4906	}
4906	4907	#else /* !CONFIG_MMU */
4907	4908	static int mem_cgroup_can_attach(struct cgroup_taskset *tset)
@@ -4911,7 +4912,7 @@ static int mem_cgroup_can_attach(struct cgroup_taskset *tset) · 3 unmodified lines
4911	4912	static void mem_cgroup_cancel_attach(struct cgroup_taskset *tset)
4912	4913	{
4913	4914	}
4914		−static void mem_cgroup_move_task(struct cgroup_taskset *tset)
	4915	+static void mem_cgroup_move_task(void)
4915	4916	{
4916	4917	}
4917	4918	#endif
@@ -5195,7 +5196,7 @@ struct cgroup_subsys memory_cgrp_subsys = { · 277 unmodified lines
5195	5196	.css_reset = mem_cgroup_css_reset,
5196	5197	.can_attach = mem_cgroup_can_attach,
5197	5198	.cancel_attach = mem_cgroup_cancel_attach,
5198		− .attach = mem_cgroup_move_task,
	5199	+ .post_attach = mem_cgroup_move_task,
5199	5200	.bind = mem_cgroup_bind,
5200	5201	.dfl_cftypes = memory_files,
5201	5202	.legacy_cftypes = mem_cgroup_legacy_files,

mm/memory-failure.c+9−1

@@ -888,7 +888,15 @@ int get_hwpoison_page(struct page *page) · 887 unmodified lines
888	888	}
889	889	}
890	890
891		− return get_page_unless_zero(head);
	891	+ if (get_page_unless_zero(head)) {
	892	+ if (head == compound_head(page))
	893	+ return 1;
	894	+
	895	+ pr_info("MCE: %#lx cannot catch tail\n", page_to_pfn(page));
	896	+ put_page(head);
	897	+ }
	898	+
	899	+ return 0;
892	900	}
893	901	EXPORT_SYMBOL_GPL(get_hwpoison_page);
894	902

mm/memory.c+40−0

@@ -789,6 +789,46 @@ out: · 788 unmodified lines
789	789	return pfn_to_page(pfn);
790	790	}
791	791
	792	+#ifdef CONFIG_TRANSPARENT_HUGEPAGE
	793	+struct page vm_normal_page_pmd(struct vm_area_struct vma, unsigned long addr,
	794	+ pmd_t pmd)
	795	+{
	796	+ unsigned long pfn = pmd_pfn(pmd);
	797	+
	798	+ /*
	799	+ * There is no pmd_special() but there may be special pmds, e.g.
	800	+ * in a direct-access (dax) mapping, so let's just replicate the
	801	+ * !HAVE_PTE_SPECIAL case from vm_normal_page() here.
	802	+ */
	803	+ if (unlikely(vma->vm_flags & (VM_PFNMAP\|VM_MIXEDMAP))) {
	804	+ if (vma->vm_flags & VM_MIXEDMAP) {
	805	+ if (!pfn_valid(pfn))
	806	+ return NULL;
	807	+ goto out;
	808	+ } else {
	809	+ unsigned long off;
	810	+ off = (addr - vma->vm_start) >> PAGE_SHIFT;
	811	+ if (pfn == vma->vm_pgoff + off)
	812	+ return NULL;
	813	+ if (!is_cow_mapping(vma->vm_flags))
	814	+ return NULL;
	815	+ }
	816	+ }
	817	+
	818	+ if (is_zero_pfn(pfn))
	819	+ return NULL;
	820	+ if (unlikely(pfn > highest_memmap_pfn))
	821	+ return NULL;
	822	+
	823	+ /*
	824	+ * NOTE! We still have PageReserved() pages in the page tables.
	825	+ * eg. VDSO mappings can cause them to exist.
	826	+ */
	827	+out:
	828	+ return pfn_to_page(pfn);
	829	+}
	830	+#endif
	831	+
792	832	/*
793	833	* copy one vm_area from one task to the other. Assumes the page tables
794	834	* already present in the new task to be cleared in the whole range

mm/migrate.c+7−1

@@ -975,7 +975,13 @@ out: · 974 unmodified lines
975	975	dec_zone_page_state(page, NR_ISOLATED_ANON +
976	976	page_is_file_cache(page));
977	977	/* Soft-offlined page shouldn't go through lru cache list */
978		− if (reason == MR_MEMORY_FAILURE) {
	978	+ if (reason == MR_MEMORY_FAILURE && rc == MIGRATEPAGE_SUCCESS) {
	979	+ /*
	980	+ * With this release, we free successfully migrated
	981	+ * page and set PG_HWPoison on just freed page
	982	+ * intentionally. Although it's rather weird, it's how
	983	+ * HWPoison flag works at the moment.
	984	+ */
979	985	put_page(page);
980	986	if (!test_set_page_hwpoison(page))
981	987	num_poisoned_pages_inc();

mm/page_io.c+5−1

@@ -353,7 +353,11 @@ int swap_readpage(struct page *page) · 352 unmodified lines
353	353
354	354	ret = bdev_read_page(sis->bdev, swap_page_sector(page), page);
355	355	if (!ret) {
356		− swap_slot_free_notify(page);
	356	+ if (trylock_page(page)) {
	357	+ swap_slot_free_notify(page);
	358	+ unlock_page(page);
	359	+ }
	360	+
357	361	count_vm_event(PSWPIN);
358	362	return 0;
359	363	}

mm/swap.c+5−0

@@ -728,6 +728,11 @@ void release_pages(struct page **pages, int nr, bool cold) · 727 unmodified lines
728	728	zone = NULL;
729	729	}
730	730
	731	+ if (is_huge_zero_page(page)) {
	732	+ put_huge_zero_page();
	733	+ continue;
	734	+ }
	735	+
731	736	page = compound_head(page);
732	737	if (!put_page_testzero(page))
733	738	continue;

mm/vmscan.c+15−15

@@ -2553,7 +2553,7 @@ static bool shrink_zones(struct zonelist zonelist, struct scan_control sc) · 2552 unmodified lines
2553	2553	sc->gfp_mask \|= __GFP_HIGHMEM;
2554	2554
2555	2555	for_each_zone_zonelist_nodemask(zone, z, zonelist,
2556		− requested_highidx, sc->nodemask) {
	2556	+ gfp_zone(sc->gfp_mask), sc->nodemask) {
2557	2557	enum zone_type classzone_idx;
2558	2558
2559	2559	if (!populated_zone(zone))
@@ -3318,6 +3318,20 @@ static void kswapd_try_to_sleep(pg_data_t *pgdat, int order, · 758 unmodified lines
3318	3318	/* Try to sleep for a short interval */
3319	3319	if (prepare_kswapd_sleep(pgdat, order, remaining,
3320	3320	balanced_classzone_idx)) {
	3321	+ /*
	3322	+ * Compaction records what page blocks it recently failed to
	3323	+ * isolate pages from and skips them in the future scanning.
	3324	+ * When kswapd is going to sleep, it is reasonable to assume
	3325	+ * that pages and compaction may succeed so reset the cache.
	3326	+ */
	3327	+ reset_isolation_suitable(pgdat);
	3328	+
	3329	+ /*
	3330	+ * We have freed the memory, now we should compact it to make
	3331	+ * allocation of the requested order possible.
	3332	+ */
	3333	+ wakeup_kcompactd(pgdat, order, classzone_idx);
	3334	+
3321	3335	remaining = schedule_timeout(HZ/10);
3322	3336	finish_wait(&pgdat->kswapd_wait, &wait);
3323	3337	prepare_to_wait(&pgdat->kswapd_wait, &wait, TASK_INTERRUPTIBLE);
@@ -3341,20 +3355,6 @@ static void kswapd_try_to_sleep(pg_data_t *pgdat, int order, · 17 unmodified lines
3341	3355	*/
3342	3356	set_pgdat_percpu_threshold(pgdat, calculate_normal_threshold);
3343	3357
3344		− /*
3345		− * Compaction records what page blocks it recently failed to
3346		− * isolate pages from and skips them in the future scanning.
3347		− * When kswapd is going to sleep, it is reasonable to assume
3348		− * that pages and compaction may succeed so reset the cache.
3349		− */
3350		− reset_isolation_suitable(pgdat);
3351		−
3352		− /*
3353		− * We have freed the memory, now we should compact it to make
3354		− * allocation of the requested order possible.
3355		− */
3356		− wakeup_kcompactd(pgdat, order, classzone_idx);
3357		−
3358	3358	if (!kthread_should_stop())
3359	3359	schedule();
3360	3360

net/bridge/br_mdb.c+79−45

@@ -61,6 +61,19 @@ static void __mdb_entry_fill_flags(struct br_mdb_entry *e, unsigned char flags) · 60 unmodified lines
61	61	e->flags \|= MDB_FLAGS_OFFLOAD;
62	62	}
63	63
	64	+static void __mdb_entry_to_br_ip(struct br_mdb_entry entry, struct br_ip ip)
	65	+{
	66	+ memset(ip, 0, sizeof(struct br_ip));
	67	+ ip->vid = entry->vid;
	68	+ ip->proto = entry->addr.proto;
	69	+ if (ip->proto == htons(ETH_P_IP))
	70	+ ip->u.ip4 = entry->addr.u.ip4;
	71	+#if IS_ENABLED(CONFIG_IPV6)
	72	+ else
	73	+ ip->u.ip6 = entry->addr.u.ip6;
	74	+#endif
	75	+}
	76	+
64	77	static int br_mdb_fill_info(struct sk_buff skb, struct netlink_callback cb,
65	78	struct net_device *dev)
66	79	{
@@ -243,9 +256,45 @@ static inline size_t rtnl_mdb_nlmsg_size(void) · 176 unmodified lines
243	256	+ nla_total_size(sizeof(struct br_mdb_entry));
244	257	}
245	258
246		−static void __br_mdb_notify(struct net_device dev, struct br_mdb_entry entry,
247		− int type, struct net_bridge_port_group *pg)
	259	+struct br_mdb_complete_info {
	260	+ struct net_bridge_port *port;
	261	+ struct br_ip ip;
	262	+};
	263	+
	264	+static void br_mdb_complete(struct net_device dev, int err, void priv)
248	265	{
	266	+ struct br_mdb_complete_info *data = priv;
	267	+ struct net_bridge_port_group __rcu **pp;
	268	+ struct net_bridge_port_group *p;
	269	+ struct net_bridge_mdb_htable *mdb;
	270	+ struct net_bridge_mdb_entry *mp;
	271	+ struct net_bridge_port *port = data->port;
	272	+ struct net_bridge *br = port->br;
	273	+
	274	+ if (err)
	275	+ goto err;
	276	+
	277	+ spin_lock_bh(&br->multicast_lock);
	278	+ mdb = mlock_dereference(br->mdb, br);
	279	+ mp = br_mdb_ip_get(mdb, &data->ip);
	280	+ if (!mp)
	281	+ goto out;
	282	+ for (pp = &mp->ports; (p = mlock_dereference(*pp, br)) != NULL;
	283	+ pp = &p->next) {
	284	+ if (p->port != port)
	285	+ continue;
	286	+ p->flags \|= MDB_PG_FLAGS_OFFLOAD;
	287	+ }
	288	+out:
	289	+ spin_unlock_bh(&br->multicast_lock);
	290	+err:
	291	+ kfree(priv);
	292	+}
	293	+
	294	+static void __br_mdb_notify(struct net_device dev, struct net_bridge_port p,
	295	+ struct br_mdb_entry *entry, int type)
	296	+{
	297	+ struct br_mdb_complete_info *complete_info;
249	298	struct switchdev_obj_port_mdb mdb = {
250	299	.obj = {
251	300	.id = SWITCHDEV_OBJ_ID_PORT_MDB,
@@ -268,9 +317,14 @@ static void __br_mdb_notify(struct net_device dev, struct br_mdb_entry entry, · 16 unmodified lines
268	317
269	318	mdb.obj.orig_dev = port_dev;
270	319	if (port_dev && type == RTM_NEWMDB) {
271		− err = switchdev_port_obj_add(port_dev, &mdb.obj);
272		− if (!err && pg)
273		− pg->flags \|= MDB_PG_FLAGS_OFFLOAD;
	320	+ complete_info = kmalloc(sizeof(*complete_info), GFP_ATOMIC);
	321	+ if (complete_info) {
	322	+ complete_info->port = p;
	323	+ __mdb_entry_to_br_ip(entry, &complete_info->ip);
	324	+ mdb.obj.complete_priv = complete_info;
	325	+ mdb.obj.complete = br_mdb_complete;
	326	+ switchdev_port_obj_add(port_dev, &mdb.obj);
	327	+ }
274	328	} else if (port_dev && type == RTM_DELMDB) {
275	329	switchdev_port_obj_del(port_dev, &mdb.obj);
276	330	}
@@ -291,21 +345,21 @@ errout: · 14 unmodified lines
291	345	rtnl_set_sk_err(net, RTNLGRP_MDB, err);
292	346	}
293	347
294		−void br_mdb_notify(struct net_device dev, struct net_bridge_port_group pg,
295		− int type)
	348	+void br_mdb_notify(struct net_device dev, struct net_bridge_port port,
	349	+ struct br_ip *group, int type, u8 flags)
296	350	{
297	351	struct br_mdb_entry entry;
298	352
299	353	memset(&entry, 0, sizeof(entry));
300		− entry.ifindex = pg->port->dev->ifindex;
301		− entry.addr.proto = pg->addr.proto;
302		− entry.addr.u.ip4 = pg->addr.u.ip4;
	354	+ entry.ifindex = port->dev->ifindex;
	355	+ entry.addr.proto = group->proto;
	356	+ entry.addr.u.ip4 = group->u.ip4;
303	357	#if IS_ENABLED(CONFIG_IPV6)
304		− entry.addr.u.ip6 = pg->addr.u.ip6;
	358	+ entry.addr.u.ip6 = group->u.ip6;
305	359	#endif
306		− entry.vid = pg->addr.vid;
307		− __mdb_entry_fill_flags(&entry, pg->flags);
308		− __br_mdb_notify(dev, &entry, type, pg);
	360	+ entry.vid = group->vid;
	361	+ __mdb_entry_fill_flags(&entry, flags);
	362	+ __br_mdb_notify(dev, port, &entry, type);
309	363	}
310	364
311	365	static int nlmsg_populate_rtr_fill(struct sk_buff *skb,
@@ -450,8 +504,7 @@ static int br_mdb_parse(struct sk_buff skb, struct nlmsghdr nlh, · 138 unmodified lines
450	504	}
451	505
452	506	static int br_mdb_add_group(struct net_bridge br, struct net_bridge_port port,
453		− struct br_ip *group, unsigned char state,
454		− struct net_bridge_port_group **pg)
	507	+ struct br_ip *group, unsigned char state)
455	508	{
456	509	struct net_bridge_mdb_entry *mp;
457	510	struct net_bridge_port_group *p;
@@ -482,7 +535,6 @@ static int br_mdb_add_group(struct net_bridge br, struct net_bridge_port port, · 24 unmodified lines
482	535	if (unlikely(!p))
483	536	return -ENOMEM;
484	537	rcu_assign_pointer(*pp, p);
485		− *pg = p;
486	538	if (state == MDB_TEMPORARY)
487	539	mod_timer(&p->timer, now + br->multicast_membership_interval);
488	540
@@ -490,8 +542,7 @@ static int br_mdb_add_group(struct net_bridge br, struct net_bridge_port port, · 1 unmodified line
490	542	}
491	543
492	544	static int __br_mdb_add(struct net net, struct net_bridge br,
493		− struct br_mdb_entry *entry,
494		− struct net_bridge_port_group **pg)
	545	+ struct br_mdb_entry *entry)
495	546	{
496	547	struct br_ip ip;
497	548	struct net_device *dev;
@@ -509,18 +560,10 @@ static int __br_mdb_add(struct net net, struct net_bridge br, · 11 unmodified lines
509	560	if (!p \|\| p->br != br \|\| p->state == BR_STATE_DISABLED)
510	561	return -EINVAL;
511	562
512		− memset(&ip, 0, sizeof(ip));
513		− ip.vid = entry->vid;
514		− ip.proto = entry->addr.proto;
515		− if (ip.proto == htons(ETH_P_IP))
516		− ip.u.ip4 = entry->addr.u.ip4;
517		−#if IS_ENABLED(CONFIG_IPV6)
518		− else
519		− ip.u.ip6 = entry->addr.u.ip6;
520		−#endif
	563	+ __mdb_entry_to_br_ip(entry, &ip);
521	564
522	565	spin_lock_bh(&br->multicast_lock);
523		− ret = br_mdb_add_group(br, p, &ip, entry->state, pg);
	566	+ ret = br_mdb_add_group(br, p, &ip, entry->state);
524	567	spin_unlock_bh(&br->multicast_lock);
525	568	return ret;
526	569	}
@@ -528,7 +571,6 @@ static int __br_mdb_add(struct net net, struct net_bridge br, · 1 unmodified line
528	571	static int br_mdb_add(struct sk_buff skb, struct nlmsghdr nlh)
529	572	{
530	573	struct net *net = sock_net(skb->sk);
531		− struct net_bridge_port_group *pg;
532	574	struct net_bridge_vlan_group *vg;
533	575	struct net_device dev, pdev;
534	576	struct br_mdb_entry *entry;
@@ -558,15 +600,15 @@ static int br_mdb_add(struct sk_buff skb, struct nlmsghdr nlh) · 23 unmodified lines
558	600	if (br_vlan_enabled(br) && vg && entry->vid == 0) {
559	601	list_for_each_entry(v, &vg->vlan_list, vlist) {
560	602	entry->vid = v->vid;
561		− err = __br_mdb_add(net, br, entry, &pg);
	603	+ err = __br_mdb_add(net, br, entry);
562	604	if (err)
563	605	break;
564		− __br_mdb_notify(dev, entry, RTM_NEWMDB, pg);
	606	+ __br_mdb_notify(dev, p, entry, RTM_NEWMDB);
565	607	}
566	608	} else {
567		− err = __br_mdb_add(net, br, entry, &pg);
	609	+ err = __br_mdb_add(net, br, entry);
568	610	if (!err)
569		− __br_mdb_notify(dev, entry, RTM_NEWMDB, pg);
	611	+ __br_mdb_notify(dev, p, entry, RTM_NEWMDB);
570	612	}
571	613
572	614	return err;
@@ -584,15 +626,7 @@ static int __br_mdb_del(struct net_bridge br, struct br_mdb_entry entry) · 11 unmodified lines
584	626	if (!netif_running(br->dev) \|\| br->multicast_disabled)
585	627	return -EINVAL;
586	628
587		− memset(&ip, 0, sizeof(ip));
588		− ip.vid = entry->vid;
589		− ip.proto = entry->addr.proto;
590		− if (ip.proto == htons(ETH_P_IP))
591		− ip.u.ip4 = entry->addr.u.ip4;
592		−#if IS_ENABLED(CONFIG_IPV6)
593		− else
594		− ip.u.ip6 = entry->addr.u.ip6;
595		−#endif
	629	+ __mdb_entry_to_br_ip(entry, &ip);
596	630
597	631	spin_lock_bh(&br->multicast_lock);
598	632	mdb = mlock_dereference(br->mdb, br);
@@ -662,12 +696,12 @@ static int br_mdb_del(struct sk_buff skb, struct nlmsghdr nlh) · 63 unmodified lines
662	696	entry->vid = v->vid;
663	697	err = __br_mdb_del(br, entry);
664	698	if (!err)
665		− __br_mdb_notify(dev, entry, RTM_DELMDB, NULL);
	699	+ __br_mdb_notify(dev, p, entry, RTM_DELMDB);
666	700	}
667	701	} else {
668	702	err = __br_mdb_del(br, entry);
669	703	if (!err)
670		− __br_mdb_notify(dev, entry, RTM_DELMDB, NULL);
	704	+ __br_mdb_notify(dev, p, entry, RTM_DELMDB);
671	705	}
672	706
673	707	return err;

net/bridge/br_multicast.c+5−3

@@ -283,7 +283,8 @@ static void br_multicast_del_pg(struct net_bridge *br, · 282 unmodified lines
283	283	rcu_assign_pointer(*pp, p->next);
284	284	hlist_del_init(&p->mglist);
285	285	del_timer(&p->timer);
286		− br_mdb_notify(br->dev, p, RTM_DELMDB);
	286	+ br_mdb_notify(br->dev, p->port, &pg->addr, RTM_DELMDB,
	287	+ p->flags);
287	288	call_rcu_bh(&p->rcu, br_multicast_free_pg);
288	289
289	290	if (!mp->ports && !mp->mglist &&
@@ -705,7 +706,7 @@ static int br_multicast_add_group(struct net_bridge *br, · 415 unmodified lines
705	706	if (unlikely(!p))
706	707	goto err;
707	708	rcu_assign_pointer(*pp, p);
708		− br_mdb_notify(br->dev, p, RTM_NEWMDB);
	709	+ br_mdb_notify(br->dev, port, group, RTM_NEWMDB, 0);
709	710
710	711	found:
711	712	mod_timer(&p->timer, now + br->multicast_membership_interval);
@@ -1461,7 +1462,8 @@ br_multicast_leave_group(struct net_bridge *br, · 749 unmodified lines
1461	1462	hlist_del_init(&p->mglist);
1462	1463	del_timer(&p->timer);
1463	1464	call_rcu_bh(&p->rcu, br_multicast_free_pg);
1464		− br_mdb_notify(br->dev, p, RTM_DELMDB);
	1465	+ br_mdb_notify(br->dev, port, group, RTM_DELMDB,
	1466	+ p->flags);
1465	1467
1466	1468	if (!mp->ports && !mp->mglist &&
1467	1469	netif_running(br->dev))

net/bridge/br_private.h+2−2

@@ -560,8 +560,8 @@ br_multicast_new_port_group(struct net_bridge_port port, struct br_ip group, · 559 unmodified lines
560	560	unsigned char flags);
561	561	void br_mdb_init(void);
562	562	void br_mdb_uninit(void);
563		−void br_mdb_notify(struct net_device dev, struct net_bridge_port_group pg,
564		− int type);
	563	+void br_mdb_notify(struct net_device dev, struct net_bridge_port port,
	564	+ struct br_ip *group, int type, u8 flags);
565	565	void br_rtr_notify(struct net_device dev, struct net_bridge_port port,
566	566	int type);
567	567

net/ceph/auth.c+2−6

@@ -293,13 +293,9 @@ int ceph_auth_create_authorizer(struct ceph_auth_client *ac, · 292 unmodified lines
293	293	}
294	294	EXPORT_SYMBOL(ceph_auth_create_authorizer);
295	295
296		−void ceph_auth_destroy_authorizer(struct ceph_auth_client *ac,
297		− struct ceph_authorizer *a)
	296	+void ceph_auth_destroy_authorizer(struct ceph_authorizer *a)
298	297	{
299		− mutex_lock(&ac->mutex);
300		− if (ac->ops && ac->ops->destroy_authorizer)
301		− ac->ops->destroy_authorizer(ac, a);
302		− mutex_unlock(&ac->mutex);
	298	+ a->destroy(a);
303	299	}
304	300	EXPORT_SYMBOL(ceph_auth_destroy_authorizer);
305	301

net/ceph/auth_none.c+39−32

@@ -16,7 +16,6 @@ static void reset(struct ceph_auth_client *ac) · 15 unmodified lines
16	16	struct ceph_auth_none_info *xi = ac->private;
17	17
18	18	xi->starting = true;
19		− xi->built_authorizer = false;
20	19	}
21	20
22	21	static void destroy(struct ceph_auth_client *ac)
@@ -39,6 +38,27 @@ static int should_authenticate(struct ceph_auth_client *ac) · 16 unmodified lines
39	38	return xi->starting;
40	39	}
41	40
	41	+static int ceph_auth_none_build_authorizer(struct ceph_auth_client *ac,
	42	+ struct ceph_none_authorizer *au)
	43	+{
	44	+ void *p = au->buf;
	45	+ void *const end = p + sizeof(au->buf);
	46	+ int ret;
	47	+
	48	+ ceph_encode_8_safe(&p, end, 1, e_range);
	49	+ ret = ceph_entity_name_encode(ac->name, &p, end);
	50	+ if (ret < 0)
	51	+ return ret;
	52	+
	53	+ ceph_encode_64_safe(&p, end, ac->global_id, e_range);
	54	+ au->buf_len = p - (void *)au->buf;
	55	+ dout("%s built authorizer len %d\n", __func__, au->buf_len);
	56	+ return 0;
	57	+
	58	+e_range:
	59	+ return -ERANGE;
	60	+}
	61	+
42	62	static int build_request(struct ceph_auth_client ac, void buf, void *end)
43	63	{
44	64	return 0;
@@ -57,32 +77,32 @@ static int handle_reply(struct ceph_auth_client *ac, int result, · 12 unmodified lines
57	77	return result;
58	78	}
59	79
	80	+static void ceph_auth_none_destroy_authorizer(struct ceph_authorizer *a)
	81	+{
	82	+ kfree(a);
	83	+}
	84	+
60	85	/*
61		− * build an 'authorizer' with our entity_name and global_id. we can
62		− * reuse a single static copy since it is identical for all services
63		− * we connect to.
	86	+ * build an 'authorizer' with our entity_name and global_id. it is
	87	+ * identical for all services we connect to.
64	88	*/
65	89	static int ceph_auth_none_create_authorizer(
66	90	struct ceph_auth_client *ac, int peer_type,
67	91	struct ceph_auth_handshake *auth)
68	92	{
69		− struct ceph_auth_none_info *ai = ac->private;
70		− struct ceph_none_authorizer *au = &ai->au;
71		− void p, end;
	93	+ struct ceph_none_authorizer *au;
72	94	int ret;
73	95
74		− if (!ai->built_authorizer) {
75		− p = au->buf;
76		− end = p + sizeof(au->buf);
77		− ceph_encode_8(&p, 1);
78		− ret = ceph_entity_name_encode(ac->name, &p, end - 8);
79		− if (ret < 0)
80		− goto bad;
81		− ceph_decode_need(&p, end, sizeof(u64), bad2);
82		− ceph_encode_64(&p, ac->global_id);
83		− au->buf_len = p - (void *)au->buf;
84		− ai->built_authorizer = true;
85		− dout("built authorizer len %d\n", au->buf_len);
	96	+ au = kmalloc(sizeof(*au), GFP_NOFS);
	97	+ if (!au)
	98	+ return -ENOMEM;
	99	+
	100	+ au->base.destroy = ceph_auth_none_destroy_authorizer;
	101	+
	102	+ ret = ceph_auth_none_build_authorizer(ac, au);
	103	+ if (ret) {
	104	+ kfree(au);
	105	+ return ret;
86	106	}
87	107
88	108	auth->authorizer = (struct ceph_authorizer *) au;
@@ -92,17 +112,6 @@ static int ceph_auth_none_create_authorizer( · 3 unmodified lines
92	112	auth->authorizer_reply_buf_len = sizeof (au->reply_buf);
93	113
94	114	return 0;
95		−
96		−bad2:
97		− ret = -ERANGE;
98		−bad:
99		− return ret;
100		−}
101		−
102		−static void ceph_auth_none_destroy_authorizer(struct ceph_auth_client *ac,
103		− struct ceph_authorizer *a)
104		−{
105		− /* nothing to do */
106	115	}
107	116
108	117	static const struct ceph_auth_client_ops ceph_auth_none_ops = {
@@ -114,7 +123,6 @@ static const struct ceph_auth_client_ops ceph_auth_none_ops = { · 5 unmodified lines
114	123	.build_request = build_request,
115	124	.handle_reply = handle_reply,
116	125	.create_authorizer = ceph_auth_none_create_authorizer,
117		− .destroy_authorizer = ceph_auth_none_destroy_authorizer,
118	126	};
119	127
120	128	int ceph_auth_none_init(struct ceph_auth_client *ac)
@@ -127,7 +135,6 @@ int ceph_auth_none_init(struct ceph_auth_client *ac) · 6 unmodified lines
127	135	return -ENOMEM;
128	136
129	137	xi->starting = true;
130		− xi->built_authorizer = false;
131	138
132	139	ac->protocol = CEPH_AUTH_NONE;
133	140	ac->private = xi;

net/ceph/auth_none.h+1−2

@@ -12,6 +12,7 @@ · 11 unmodified lines
12	12	*/
13	13
14	14	struct ceph_none_authorizer {
	15	+ struct ceph_authorizer base;
15	16	char buf[128];
16	17	int buf_len;
17	18	char reply_buf[0];
@@ -19,8 +20,6 @@ struct ceph_none_authorizer { · 1 unmodified line
19	20
20	21	struct ceph_auth_none_info {
21	22	bool starting;
22		− bool built_authorizer;
23		− struct ceph_none_authorizer au; /* we only need one; it's static */
24	23	};
25	24
26	25	int ceph_auth_none_init(struct ceph_auth_client *ac);

net/ceph/auth_x.c+10−11

@@ -565,6 +565,14 @@ static int ceph_x_handle_reply(struct ceph_auth_client *ac, int result, · 564 unmodified lines
565	565	return -EAGAIN;
566	566	}
567	567
	568	+static void ceph_x_destroy_authorizer(struct ceph_authorizer *a)
	569	+{
	570	+ struct ceph_x_authorizer au = (void )a;
	571	+
	572	+ ceph_x_authorizer_cleanup(au);
	573	+ kfree(au);
	574	+}
	575	+
568	576	static int ceph_x_create_authorizer(
569	577	struct ceph_auth_client *ac, int peer_type,
570	578	struct ceph_auth_handshake *auth)
@@ -581,6 +589,8 @@ static int ceph_x_create_authorizer( · 10 unmodified lines
581	589	if (!au)
582	590	return -ENOMEM;
583	591
	592	+ au->base.destroy = ceph_x_destroy_authorizer;
	593	+
584	594	ret = ceph_x_build_authorizer(ac, th, au);
585	595	if (ret) {
586	596	kfree(au);
@@ -643,16 +653,6 @@ static int ceph_x_verify_authorizer_reply(struct ceph_auth_client *ac, · 56 unmodified lines
643	653	return ret;
644	654	}
645	655
646		−static void ceph_x_destroy_authorizer(struct ceph_auth_client *ac,
647		− struct ceph_authorizer *a)
648		−{
649		− struct ceph_x_authorizer au = (void )a;
650		−
651		− ceph_x_authorizer_cleanup(au);
652		− kfree(au);
653		−}
654		−
655		−
656	656	static void ceph_x_reset(struct ceph_auth_client *ac)
657	657	{
658	658	struct ceph_x_info *xi = ac->private;
@@ -770,7 +770,6 @@ static const struct ceph_auth_client_ops ceph_x_ops = { · 111 unmodified lines
770	770	.create_authorizer = ceph_x_create_authorizer,
771	771	.update_authorizer = ceph_x_update_authorizer,
772	772	.verify_authorizer_reply = ceph_x_verify_authorizer_reply,
773		− .destroy_authorizer = ceph_x_destroy_authorizer,
774	773	.invalidate_authorizer = ceph_x_invalidate_authorizer,
775	774	.reset = ceph_x_reset,
776	775	.destroy = ceph_x_destroy,

net/ceph/auth_x.h+1−0

@@ -26,6 +26,7 @@ struct ceph_x_ticket_handler { · 25 unmodified lines
26	26
27	27
28	28	struct ceph_x_authorizer {
	29	+ struct ceph_authorizer base;
29	30	struct ceph_crypto_key session_key;
30	31	struct ceph_buffer *buf;
31	32	unsigned int service;

net/ceph/osd_client.c+2−4

@@ -1087,10 +1087,8 @@ static void put_osd(struct ceph_osd *osd) · 1086 unmodified lines
1087	1087	dout("put_osd %p %d -> %d\n", osd, atomic_read(&osd->o_ref),
1088	1088	atomic_read(&osd->o_ref) - 1);
1089	1089	if (atomic_dec_and_test(&osd->o_ref)) {
1090		− struct ceph_auth_client *ac = osd->o_osdc->client->monc.auth;
1091		−
1092	1090	if (osd->o_auth.authorizer)
1093		− ceph_auth_destroy_authorizer(ac, osd->o_auth.authorizer);
	1091	+ ceph_auth_destroy_authorizer(osd->o_auth.authorizer);
1094	1092	kfree(osd);
1095	1093	}
1096	1094	}
@@ -2984,7 +2982,7 @@ static struct ceph_auth_handshake get_authorizer(struct ceph_connection con, · 1887 unmodified lines
2984	2982	struct ceph_auth_handshake *auth = &o->o_auth;
2985	2983
2986	2984	if (force_new && auth->authorizer) {
2987		− ceph_auth_destroy_authorizer(ac, auth->authorizer);
	2985	+ ceph_auth_destroy_authorizer(auth->authorizer);
2988	2986	auth->authorizer = NULL;
2989	2987	}
2990	2988	if (!auth->authorizer) {

net/ipv4/fib_frontend.c+5−1

@@ -904,7 +904,11 @@ void fib_del_ifaddr(struct in_ifaddr ifa, struct in_ifaddr iprim) · 903 unmodified lines
904	904	if (ifa->ifa_flags & IFA_F_SECONDARY) {
905	905	prim = inet_ifa_byprefix(in_dev, any, ifa->ifa_mask);
906	906	if (!prim) {
907		− pr_warn("%s: bug: prim == NULL\n", __func__);
	907	+ /* if the device has been deleted, we don't perform
	908	+ * address promotion
	909	+ */
	910	+ if (!in_dev->dead)
	911	+ pr_warn("%s: bug: prim == NULL\n", __func__);
908	912	return;
909	913	}
910	914	if (iprim && iprim != prim) {

net/ipv6/addrconf.c+15−33

@@ -3176,35 +3176,9 @@ static void addrconf_gre_config(struct net_device *dev) · 3175 unmodified lines
3176	3176	}
3177	3177	#endif
3178	3178
3179		−#if IS_ENABLED(CONFIG_NET_L3_MASTER_DEV)
3180		−/* If the host route is cached on the addr struct make sure it is associated
3181		− * with the proper table. e.g., enslavement can change and if so the cached
3182		− * host route needs to move to the new table.
3183		− */
3184		−static void l3mdev_check_host_rt(struct inet6_dev *idev,
3185		− struct inet6_ifaddr *ifp)
3186		−{
3187		− if (ifp->rt) {
3188		− u32 tb_id = l3mdev_fib_table(idev->dev) ? : RT6_TABLE_LOCAL;
3189		−
3190		− if (tb_id != ifp->rt->rt6i_table->tb6_id) {
3191		− ip6_del_rt(ifp->rt);
3192		− ifp->rt = NULL;
3193		− }
3194		− }
3195		−}
3196		−#else
3197		−static void l3mdev_check_host_rt(struct inet6_dev *idev,
3198		− struct inet6_ifaddr *ifp)
3199		−{
3200		−}
3201		−#endif
3202		−
3203	3179	static int fixup_permanent_addr(struct inet6_dev *idev,
3204	3180	struct inet6_ifaddr *ifp)
3205	3181	{
3206		− l3mdev_check_host_rt(idev, ifp);
3207		−
3208	3182	if (!ifp->rt) {
3209	3183	struct rt6_info *rt;
3210	3184
@@ -3304,6 +3278,9 @@ static int addrconf_notify(struct notifier_block *this, unsigned long event, · 93 unmodified lines
3304	3278	break;
3305	3279
3306	3280	if (event == NETDEV_UP) {
	3281	+ /* restore routes for permanent addresses */
	3282	+ addrconf_permanent_addr(dev);
	3283	+
3307	3284	if (!addrconf_qdisc_ok(dev)) {
3308	3285	/* device is not ready yet. */
3309	3286	pr_info("ADDRCONF(NETDEV_UP): %s: link is not ready\n",
@@ -3337,9 +3314,6 @@ static int addrconf_notify(struct notifier_block *this, unsigned long event, · 27 unmodified lines
3337	3314	run_pending = 1;
3338	3315	}
3339	3316
3340		− /* restore routes for permanent addresses */
3341		− addrconf_permanent_addr(dev);
3342		−
3343	3317	switch (dev->type) {
3344	3318	#if IS_ENABLED(CONFIG_IPV6_SIT)
3345	3319	case ARPHRD_SIT:
@@ -3556,6 +3530,8 @@ restart: · 210 unmodified lines
3556	3530
3557	3531	INIT_LIST_HEAD(&del_list);
3558	3532	list_for_each_entry_safe(ifa, tmp, &idev->addr_list, if_list) {
	3533	+ struct rt6_info *rt = NULL;
	3534	+
3559	3535	addrconf_del_dad_work(ifa);
3560	3536
3561	3537	write_unlock_bh(&idev->lock);
@@ -3568,6 +3544,9 @@ restart: · 6 unmodified lines
3568	3544	ifa->state = 0;
3569	3545	if (!(ifa->flags & IFA_F_NODAD))
3570	3546	ifa->flags \|= IFA_F_TENTATIVE;
	3547	+
	3548	+ rt = ifa->rt;
	3549	+ ifa->rt = NULL;
3571	3550	} else {
3572	3551	state = ifa->state;
3573	3552	ifa->state = INET6_IFADDR_STATE_DEAD;
@@ -3578,6 +3557,9 @@ restart: · 4 unmodified lines
3578	3557
3579	3558	spin_unlock_bh(&ifa->lock);
3580	3559
	3560	+ if (rt)
	3561	+ ip6_del_rt(rt);
	3562	+
3581	3563	if (state != INET6_IFADDR_STATE_DEAD) {
3582	3564	__ipv6_ifa_notify(RTM_DELADDR, ifa);
3583	3565	inet6addr_notifier_call_chain(NETDEV_DOWN, ifa);
@@ -5343,10 +5325,10 @@ static void __ipv6_ifa_notify(int event, struct inet6_ifaddr *ifp) · 1759 unmodified lines
5343	5325	if (rt)
5344	5326	ip6_del_rt(rt);
5345	5327	}
5346		− dst_hold(&ifp->rt->dst);
5347		−
5348		− ip6_del_rt(ifp->rt);
5349		−
	5328	+ if (ifp->rt) {
	5329	+ dst_hold(&ifp->rt->dst);
	5330	+ ip6_del_rt(ifp->rt);
	5331	+ }
5350	5332	rt_genid_bump_ipv6(net);
5351	5333	break;
5352	5334	}

net/switchdev/switchdev.c+6−0

@@ -305,6 +305,8 @@ static void switchdev_port_attr_set_deferred(struct net_device *dev, · 304 unmodified lines
305	305	if (err && err != -EOPNOTSUPP)
306	306	netdev_err(dev, "failed (err=%d) to set attribute (id=%d)\n",
307	307	err, attr->id);
	308	+ if (attr->complete)
	309	+ attr->complete(dev, err, attr->complete_priv);
308	310	}
309	311
310	312	static int switchdev_port_attr_set_defer(struct net_device *dev,
@@ -434,6 +436,8 @@ static void switchdev_port_obj_add_deferred(struct net_device *dev, · 123 unmodified lines
434	436	if (err && err != -EOPNOTSUPP)
435	437	netdev_err(dev, "failed (err=%d) to add object (id=%d)\n",
436	438	err, obj->id);
	439	+ if (obj->complete)
	440	+ obj->complete(dev, err, obj->complete_priv);
437	441	}
438	442
439	443	static int switchdev_port_obj_add_defer(struct net_device *dev,
@@ -502,6 +506,8 @@ static void switchdev_port_obj_del_deferred(struct net_device *dev, · 62 unmodified lines
502	506	if (err && err != -EOPNOTSUPP)
503	507	netdev_err(dev, "failed (err=%d) to del object (id=%d)\n",
504	508	err, obj->id);
	509	+ if (obj->complete)
	510	+ obj->complete(dev, err, obj->complete_priv);
505	511	}
506	512
507	513	static int switchdev_port_obj_del_defer(struct net_device *dev,

sound/hda/ext/hdac_ext_stream.c+2−3

@@ -104,12 +104,11 @@ EXPORT_SYMBOL_GPL(snd_hdac_ext_stream_init_all); · 103 unmodified lines
104	104	*/
105	105	void snd_hdac_stream_free_all(struct hdac_ext_bus *ebus)
106	106	{
107		− struct hdac_stream *s;
	107	+ struct hdac_stream s, _s;
108	108	struct hdac_ext_stream *stream;
109	109	struct hdac_bus *bus = ebus_to_hbus(ebus);
110	110
111		− while (!list_empty(&bus->stream_list)) {
112		− s = list_first_entry(&bus->stream_list, struct hdac_stream, list);
	111	+ list_for_each_entry_safe(s, _s, &bus->stream_list, list) {
113	112	stream = stream_to_hdac_ext_stream(s);
114	113	snd_hdac_ext_stream_decouple(ebus, stream, false);
115	114	list_del(&s->list);

sound/hda/hdac_i915.c+51−11

@@ -20,6 +20,7 @@ · 19 unmodified lines
20	20	#include <sound/core.h>
21	21	#include <sound/hdaudio.h>
22	22	#include <sound/hda_i915.h>
	23	+#include <sound/hda_register.h>
23	24
24	25	static struct i915_audio_component *hdac_acomp;
25	26
@@ -97,26 +98,65 @@ int snd_hdac_display_power(struct hdac_bus *bus, bool enable) · 71 unmodified lines
97	98	}
98	99	EXPORT_SYMBOL_GPL(snd_hdac_display_power);
99	100
	101	+#define CONTROLLER_IN_GPU(pci) (((pci)->device == 0x0a0c) \|\| \
	102	+ ((pci)->device == 0x0c0c) \|\| \
	103	+ ((pci)->device == 0x0d0c) \|\| \
	104	+ ((pci)->device == 0x160c))
	105	+
100	106	/**
101		− * snd_hdac_get_display_clk - Get CDCLK in kHz
	107	+ * snd_hdac_i915_set_bclk - Reprogram BCLK for HSW/BDW
102	108	* @bus: HDA core bus
103	109	*
104		− * This function is supposed to be used only by a HD-audio controller
105		− * driver that needs the interaction with i915 graphics.
	110	+ * Intel HSW/BDW display HDA controller is in GPU. Both its power and link BCLK
	111	+ * depends on GPU. Two Extended Mode registers EM4 (M value) and EM5 (N Value)
	112	+ * are used to convert CDClk (Core Display Clock) to 24MHz BCLK:
	113	+ * BCLK = CDCLK * M / N
	114	+ * The values will be lost when the display power well is disabled and need to
	115	+ * be restored to avoid abnormal playback speed.
106	116	*
107		− * This function queries CDCLK value in kHz from the graphics driver and
108		− * returns the value. A negative code is returned in error.
	117	+ * Call this function at initializing and changing power well, as well as
	118	+ * at ELD notifier for the hotplug.
109	119	*/
110		−int snd_hdac_get_display_clk(struct hdac_bus *bus)
	120	+void snd_hdac_i915_set_bclk(struct hdac_bus *bus)
111	121	{
112	122	struct i915_audio_component *acomp = bus->audio_component;
	123	+ struct pci_dev *pci = to_pci_dev(bus->dev);
	124	+ int cdclk_freq;
	125	+ unsigned int bclk_m, bclk_n;
	126	+
	127	+ if (!acomp \|\| !acomp->ops \|\| !acomp->ops->get_cdclk_freq)
	128	+ return; /* only for i915 binding */
	129	+ if (!CONTROLLER_IN_GPU(pci))
	130	+ return; /* only HSW/BDW */
	131	+
	132	+ cdclk_freq = acomp->ops->get_cdclk_freq(acomp->dev);
	133	+ switch (cdclk_freq) {
	134	+ case 337500:
	135	+ bclk_m = 16;
	136	+ bclk_n = 225;
	137	+ break;
	138	+
	139	+ case 450000:
	140	+ default: /* default CDCLK 450MHz */
	141	+ bclk_m = 4;
	142	+ bclk_n = 75;
	143	+ break;
	144	+
	145	+ case 540000:
	146	+ bclk_m = 4;
	147	+ bclk_n = 90;
	148	+ break;
	149	+
	150	+ case 675000:
	151	+ bclk_m = 8;
	152	+ bclk_n = 225;
	153	+ break;
	154	+ }
113	155
114		− if (!acomp \|\| !acomp->ops)
115		− return -ENODEV;
116		−
117		− return acomp->ops->get_cdclk_freq(acomp->dev);
	156	+ snd_hdac_chip_writew(bus, HSW_EM4, bclk_m);
	157	+ snd_hdac_chip_writew(bus, HSW_EM5, bclk_n);
118	158	}
119		−EXPORT_SYMBOL_GPL(snd_hdac_get_display_clk);
	159	+EXPORT_SYMBOL_GPL(snd_hdac_i915_set_bclk);
120	160
121	161	/* There is a fixed mapping between audio pin node and display port
122	162	* on current Intel platforms:

sound/pci/hda/hda_intel.c+4−52

@@ -857,50 +857,6 @@ static int param_set_xint(const char val, const struct kernel_param kp) · 856 unmodified lines
857	857	#define azx_del_card_list(chip) /* NOP */
858	858	#endif /* CONFIG_PM */
859	859
860		−/* Intel HSW/BDW display HDA controller is in GPU. Both its power and link BCLK
861		− * depends on GPU. Two Extended Mode registers EM4 (M value) and EM5 (N Value)
862		− * are used to convert CDClk (Core Display Clock) to 24MHz BCLK:
863		− * BCLK = CDCLK * M / N
864		− * The values will be lost when the display power well is disabled and need to
865		− * be restored to avoid abnormal playback speed.
866		− */
867		−static void haswell_set_bclk(struct hda_intel *hda)
868		−{
869		− struct azx *chip = &hda->chip;
870		− int cdclk_freq;
871		− unsigned int bclk_m, bclk_n;
872		−
873		− if (!hda->need_i915_power)
874		− return;
875		−
876		− cdclk_freq = snd_hdac_get_display_clk(azx_bus(chip));
877		− switch (cdclk_freq) {
878		− case 337500:
879		− bclk_m = 16;
880		− bclk_n = 225;
881		− break;
882		−
883		− case 450000:
884		− default: /* default CDCLK 450MHz */
885		− bclk_m = 4;
886		− bclk_n = 75;
887		− break;
888		−
889		− case 540000:
890		− bclk_m = 4;
891		− bclk_n = 90;
892		− break;
893		−
894		− case 675000:
895		− bclk_m = 8;
896		− bclk_n = 225;
897		− break;
898		− }
899		−
900		− azx_writew(chip, HSW_EM4, bclk_m);
901		− azx_writew(chip, HSW_EM5, bclk_n);
902		−}
903		−
904	860	#if defined(CONFIG_PM_SLEEP) \|\| defined(SUPPORT_VGA_SWITCHEROO)
905	861	/*
906	862	* power management
@@ -958,7 +914,7 @@ static int azx_resume(struct device *dev) · 51 unmodified lines
958	914	if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL
959	915	&& hda->need_i915_power) {
960	916	snd_hdac_display_power(azx_bus(chip), true);
961		− haswell_set_bclk(hda);
	917	+ snd_hdac_i915_set_bclk(azx_bus(chip));
962	918	}
963	919	if (chip->msi)
964	920	if (pci_enable_msi(pci) < 0)
@@ -1058,7 +1014,7 @@ static int azx_runtime_resume(struct device *dev) · 93 unmodified lines
1058	1014	bus = azx_bus(chip);
1059	1015	if (hda->need_i915_power) {
1060	1016	snd_hdac_display_power(bus, true);
1061		− haswell_set_bclk(hda);
	1017	+ snd_hdac_i915_set_bclk(bus);
1062	1018	} else {
1063	1019	/* toggle codec wakeup bit for STATESTS read */
1064	1020	snd_hdac_set_codec_wakeup(bus, true);
@@ -1796,12 +1752,8 @@ static int azx_first_init(struct azx *chip) · 731 unmodified lines
1796	1752	/* initialize chip */
1797	1753	azx_init_pci(chip);
1798	1754
1799		− if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL) {
1800		− struct hda_intel *hda;
1801		−
1802		− hda = container_of(chip, struct hda_intel, chip);
1803		− haswell_set_bclk(hda);
1804		− }
	1755	+ if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL)
	1756	+ snd_hdac_i915_set_bclk(bus);
1805	1757
1806	1758	hda_intel_init_chip(chip, (probe_only[dev] & 2) == 0);
1807	1759

sound/pci/hda/patch_hdmi.c+1−0

@@ -2232,6 +2232,7 @@ static void intel_pin_eld_notify(void *audio_ptr, int port) · 2231 unmodified lines
2232	2232	if (atomic_read(&(codec)->core.in_pm))
2233	2233	return;
2234	2234
	2235	+ snd_hdac_i915_set_bclk(&codec->bus->core);
2235	2236	check_presence_and_report(codec, pin_nid);
2236	2237	}
2237	2238

sound/pci/hda/patch_realtek.c+1−0

@@ -5584,6 +5584,7 @@ static const struct snd_pci_quirk alc269_fixup_tbl[] = { · 5583 unmodified lines
5584	5584	SND_PCI_QUIRK(0x17aa, 0x5034, "Thinkpad T450", ALC292_FIXUP_TPT440_DOCK),
5585	5585	SND_PCI_QUIRK(0x17aa, 0x5036, "Thinkpad T450s", ALC292_FIXUP_TPT440_DOCK),
5586	5586	SND_PCI_QUIRK(0x17aa, 0x503c, "Thinkpad L450", ALC292_FIXUP_TPT440_DOCK),
	5587	+ SND_PCI_QUIRK(0x17aa, 0x504a, "ThinkPad X260", ALC292_FIXUP_TPT440_DOCK),
5587	5588	SND_PCI_QUIRK(0x17aa, 0x504b, "Thinkpad", ALC293_FIXUP_LENOVO_SPK_NOISE),
5588	5589	SND_PCI_QUIRK(0x17aa, 0x5109, "Thinkpad", ALC269_FIXUP_LIMIT_INT_MIC_BOOST),
5589	5590	SND_PCI_QUIRK(0x17aa, 0x3bf8, "Quanta FL1", ALC269_FIXUP_PCM_44K),

sound/soc/codecs/Kconfig+1−0

@@ -629,6 +629,7 @@ config SND_SOC_RT5514 · 628 unmodified lines
629	629
630	630	config SND_SOC_RT5616
631	631	tristate "Realtek RT5616 CODEC"
	632	+ depends on I2C
632	633
633	634	config SND_SOC_RT5631
634	635	tristate "Realtek ALC5631/RT5631 CODEC"

sound/soc/codecs/arizona.c+12−0

@@ -249,6 +249,18 @@ int arizona_init_spk(struct snd_soc_codec *codec) · 248 unmodified lines
249	249	}
250	250	EXPORT_SYMBOL_GPL(arizona_init_spk);
251	251
	252	+int arizona_free_spk(struct snd_soc_codec *codec)
	253	+{
	254	+ struct arizona_priv *priv = snd_soc_codec_get_drvdata(codec);
	255	+ struct arizona *arizona = priv->arizona;
	256	+
	257	+ arizona_free_irq(arizona, ARIZONA_IRQ_SPK_OVERHEAT_WARN, arizona);
	258	+ arizona_free_irq(arizona, ARIZONA_IRQ_SPK_OVERHEAT, arizona);
	259	+
	260	+ return 0;
	261	+}
	262	+EXPORT_SYMBOL_GPL(arizona_free_spk);
	263	+
252	264	static const struct snd_soc_dapm_route arizona_mono_routes[] = {
253	265	{ "OUT1R", NULL, "OUT1L" },
254	266	{ "OUT2R", NULL, "OUT2L" },

sound/soc/codecs/arizona.h+2−0

@@ -307,6 +307,8 @@ extern int arizona_init_spk(struct snd_soc_codec *codec); · 306 unmodified lines
307	307	extern int arizona_init_gpio(struct snd_soc_codec *codec);
308	308	extern int arizona_init_mono(struct snd_soc_codec *codec);
309	309
	310	+extern int arizona_free_spk(struct snd_soc_codec *codec);
	311	+
310	312	extern int arizona_init_dai(struct arizona_priv *priv, int dai);
311	313
312	314	int arizona_set_output_mode(struct snd_soc_codec *codec, int output,

sound/soc/codecs/cs35l32.c+13−4

@@ -274,7 +274,9 @@ static int cs35l32_handle_of_data(struct i2c_client *i2c_client, · 273 unmodified lines
274	274	if (of_property_read_u32(np, "cirrus,sdout-share", &val) >= 0)
275	275	pdata->sdout_share = val;
276	276
277		− of_property_read_u32(np, "cirrus,boost-manager", &val);
	277	+ if (of_property_read_u32(np, "cirrus,boost-manager", &val))
	278	+ val = -1u;
	279	+
278	280	switch (val) {
279	281	case CS35L32_BOOST_MGR_AUTO:
280	282	case CS35L32_BOOST_MGR_AUTO_AUDIO:
@@ -282,13 +284,15 @@ static int cs35l32_handle_of_data(struct i2c_client *i2c_client, · 1 unmodified line
282	284	case CS35L32_BOOST_MGR_FIXED:
283	285	pdata->boost_mng = val;
284	286	break;
	287	+ case -1u:
285	288	default:
286	289	dev_err(&i2c_client->dev,
287	290	"Wrong cirrus,boost-manager DT value %d\n", val);
288	291	pdata->boost_mng = CS35L32_BOOST_MGR_BYPASS;
289	292	}
290	293
291		− of_property_read_u32(np, "cirrus,sdout-datacfg", &val);
	294	+ if (of_property_read_u32(np, "cirrus,sdout-datacfg", &val))
	295	+ val = -1u;
292	296	switch (val) {
293	297	case CS35L32_DATA_CFG_LR_VP:
294	298	case CS35L32_DATA_CFG_LR_STAT:
@@ -296,13 +300,15 @@ static int cs35l32_handle_of_data(struct i2c_client *i2c_client, · 1 unmodified line
296	300	case CS35L32_DATA_CFG_LR_VPSTAT:
297	301	pdata->sdout_datacfg = val;
298	302	break;
	303	+ case -1u:
299	304	default:
300	305	dev_err(&i2c_client->dev,
301	306	"Wrong cirrus,sdout-datacfg DT value %d\n", val);
302	307	pdata->sdout_datacfg = CS35L32_DATA_CFG_LR;
303	308	}
304	309
305		− of_property_read_u32(np, "cirrus,battery-threshold", &val);
	310	+ if (of_property_read_u32(np, "cirrus,battery-threshold", &val))
	311	+ val = -1u;
306	312	switch (val) {
307	313	case CS35L32_BATT_THRESH_3_1V:
308	314	case CS35L32_BATT_THRESH_3_2V:
@@ -310,13 +316,15 @@ static int cs35l32_handle_of_data(struct i2c_client *i2c_client, · 1 unmodified line
310	316	case CS35L32_BATT_THRESH_3_4V:
311	317	pdata->batt_thresh = val;
312	318	break;
	319	+ case -1u:
313	320	default:
314	321	dev_err(&i2c_client->dev,
315	322	"Wrong cirrus,battery-threshold DT value %d\n", val);
316	323	pdata->batt_thresh = CS35L32_BATT_THRESH_3_3V;
317	324	}
318	325
319		− of_property_read_u32(np, "cirrus,battery-recovery", &val);
	326	+ if (of_property_read_u32(np, "cirrus,battery-recovery", &val))
	327	+ val = -1u;
320	328	switch (val) {
321	329	case CS35L32_BATT_RECOV_3_1V:
322	330	case CS35L32_BATT_RECOV_3_2V:
@@ -326,6 +334,7 @@ static int cs35l32_handle_of_data(struct i2c_client *i2c_client, · 3 unmodified lines
326	334	case CS35L32_BATT_RECOV_3_6V:
327	335	pdata->batt_recov = val;
328	336	break;
	337	+ case -1u:
329	338	default:
330	339	dev_err(&i2c_client->dev,
331	340	"Wrong cirrus,battery-recovery DT value %d\n", val);

sound/soc/codecs/cs47l24.c+3−0

@@ -1108,6 +1108,9 @@ static int cs47l24_codec_remove(struct snd_soc_codec *codec) · 1107 unmodified lines
1108	1108	priv->core.arizona->dapm = NULL;
1109	1109
1110	1110	arizona_free_irq(arizona, ARIZONA_IRQ_DSP_IRQ1, priv);
	1111	+
	1112	+ arizona_free_spk(codec);
	1113	+
1111	1114	return 0;
1112	1115	}
1113	1116

sound/soc/codecs/hdac_hdmi.c+42−52

@@ -1420,32 +1420,39 @@ static int hdmi_codec_remove(struct snd_soc_codec *codec) · 1419 unmodified lines
1420	1420	}
1421	1421
1422	1422	#ifdef CONFIG_PM
1423		−static int hdmi_codec_resume(struct snd_soc_codec *codec)
	1423	+static int hdmi_codec_prepare(struct device *dev)
1424	1424	{
1425		− struct hdac_ext_device *edev = snd_soc_codec_get_drvdata(codec);
	1425	+ struct hdac_ext_device *edev = to_hda_ext_device(dev);
	1426	+ struct hdac_device *hdac = &edev->hdac;
	1427	+
	1428	+ pm_runtime_get_sync(&edev->hdac.dev);
	1429	+
	1430	+ /*
	1431	+ * Power down afg.
	1432	+ * codec_read is preferred over codec_write to set the power state.
	1433	+ * This way verb is send to set the power state and response
	1434	+ * is received. So setting power state is ensured without using loop
	1435	+ * to read the state.
	1436	+ */
	1437	+ snd_hdac_codec_read(hdac, hdac->afg, 0, AC_VERB_SET_POWER_STATE,
	1438	+ AC_PWRST_D3);
	1439	+
	1440	+ return 0;
	1441	+}
	1442	+
	1443	+static void hdmi_codec_complete(struct device *dev)
	1444	+{
	1445	+ struct hdac_ext_device *edev = to_hda_ext_device(dev);
1426	1446	struct hdac_hdmi_priv *hdmi = edev->private_data;
1427	1447	struct hdac_hdmi_pin *pin;
1428	1448	struct hdac_device *hdac = &edev->hdac;
1429		− struct hdac_bus *bus = hdac->bus;
1430		− int err;
1431		− unsigned long timeout;
1432		−
1433		− hdac_hdmi_skl_enable_all_pins(&edev->hdac);
1434		− hdac_hdmi_skl_enable_dp12(&edev->hdac);
1435	1449
1436	1450	/* Power up afg */
1437		− if (!snd_hdac_check_power_state(hdac, hdac->afg, AC_PWRST_D0)) {
1438		−
1439		− snd_hdac_codec_write(hdac, hdac->afg, 0,
1440		− AC_VERB_SET_POWER_STATE, AC_PWRST_D0);
	1451	+ snd_hdac_codec_read(hdac, hdac->afg, 0, AC_VERB_SET_POWER_STATE,
	1452	+ AC_PWRST_D0);
1441	1453
1442		− /* Wait till power state is set to D0 */
1443		− timeout = jiffies + msecs_to_jiffies(1000);
1444		− while (!snd_hdac_check_power_state(hdac, hdac->afg, AC_PWRST_D0)
1445		− && time_before(jiffies, timeout)) {
1446		− msleep(50);
1447		− }
1448		− }
	1454	+ hdac_hdmi_skl_enable_all_pins(&edev->hdac);
	1455	+ hdac_hdmi_skl_enable_dp12(&edev->hdac);
1449	1456
1450	1457	/*
1451	1458	* As the ELD notify callback request is not entertained while the
@@ -1455,28 +1462,16 @@ static int hdmi_codec_resume(struct snd_soc_codec *codec) · 3 unmodified lines
1455	1462	list_for_each_entry(pin, &hdmi->pin_list, head)
1456	1463	hdac_hdmi_present_sense(pin, 1);
1457	1464
1458		− /*
1459		− * Codec power is turned ON during controller resume.
1460		− * Turn it OFF here
1461		− */
1462		− err = snd_hdac_display_power(bus, false);
1463		− if (err < 0) {
1464		− dev_err(bus->dev,
1465		− "Cannot turn OFF display power on i915, err: %d\n",
1466		− err);
1467		− return err;
1468		− }
1469		−
1470		− return 0;
	1465	+ pm_runtime_put_sync(&edev->hdac.dev);
1471	1466	}
1472	1467	#else
1473		−#define hdmi_codec_resume NULL
	1468	+#define hdmi_codec_prepare NULL
	1469	+#define hdmi_codec_complete NULL
1474	1470	#endif
1475	1471
1476	1472	static struct snd_soc_codec_driver hdmi_hda_codec = {
1477	1473	.probe = hdmi_codec_probe,
1478	1474	.remove = hdmi_codec_remove,
1479		− .resume = hdmi_codec_resume,
1480	1475	.idle_bias_off = true,
1481	1476	};
1482	1477
@@ -1561,7 +1556,6 @@ static int hdac_hdmi_runtime_suspend(struct device *dev) · 78 unmodified lines
1561	1556	struct hdac_ext_device *edev = to_hda_ext_device(dev);
1562	1557	struct hdac_device *hdac = &edev->hdac;
1563	1558	struct hdac_bus *bus = hdac->bus;
1564		− unsigned long timeout;
1565	1559	int err;
1566	1560
1567	1561	dev_dbg(dev, "Enter: %s\n", __func__);
@@ -1570,20 +1564,15 @@ static int hdac_hdmi_runtime_suspend(struct device *dev) · 2 unmodified lines
1570	1564	if (!bus)
1571	1565	return 0;
1572	1566
1573		− /* Power down afg */
1574		− if (!snd_hdac_check_power_state(hdac, hdac->afg, AC_PWRST_D3)) {
1575		− snd_hdac_codec_write(hdac, hdac->afg, 0,
1576		− AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
1577		−
1578		− /* Wait till power state is set to D3 */
1579		− timeout = jiffies + msecs_to_jiffies(1000);
1580		− while (!snd_hdac_check_power_state(hdac, hdac->afg, AC_PWRST_D3)
1581		− && time_before(jiffies, timeout)) {
1582		−
1583		− msleep(50);
1584		− }
1585		− }
1586		−
	1567	+ /*
	1568	+ * Power down afg.
	1569	+ * codec_read is preferred over codec_write to set the power state.
	1570	+ * This way verb is send to set the power state and response
	1571	+ * is received. So setting power state is ensured without using loop
	1572	+ * to read the state.
	1573	+ */
	1574	+ snd_hdac_codec_read(hdac, hdac->afg, 0, AC_VERB_SET_POWER_STATE,
	1575	+ AC_PWRST_D3);
1587	1576	err = snd_hdac_display_power(bus, false);
1588	1577	if (err < 0) {
1589	1578	dev_err(bus->dev, "Cannot turn on display power on i915\n");
@@ -1616,9 +1605,8 @@ static int hdac_hdmi_runtime_resume(struct device *dev) · 26 unmodified lines
1616	1605	hdac_hdmi_skl_enable_dp12(&edev->hdac);
1617	1606
1618	1607	/* Power up afg */
1619		− if (!snd_hdac_check_power_state(hdac, hdac->afg, AC_PWRST_D0))
1620		− snd_hdac_codec_write(hdac, hdac->afg, 0,
1621		− AC_VERB_SET_POWER_STATE, AC_PWRST_D0);
	1608	+ snd_hdac_codec_read(hdac, hdac->afg, 0, AC_VERB_SET_POWER_STATE,
	1609	+ AC_PWRST_D0);
1622	1610
1623	1611	return 0;
1624	1612	}
@@ -1629,6 +1617,8 @@ static int hdac_hdmi_runtime_resume(struct device *dev) · 4 unmodified lines
1629	1617
1630	1618	static const struct dev_pm_ops hdac_hdmi_pm = {
1631	1619	SET_RUNTIME_PM_OPS(hdac_hdmi_runtime_suspend, hdac_hdmi_runtime_resume, NULL)
	1620	+ .prepare = hdmi_codec_prepare,
	1621	+ .complete = hdmi_codec_complete,
1632	1622	};
1633	1623
1634	1624	static const struct hda_device_id hdmi_list[] = {

sound/soc/codecs/nau8825.c+71−55

@@ -343,9 +343,12 @@ static const struct snd_soc_dapm_widget nau8825_dapm_widgets[] = { · 342 unmodified lines
343	343	SND_SOC_DAPM_SUPPLY("ADC Power", NAU8825_REG_ANALOG_ADC_2, 6, 0, NULL,
344	344	0),
345	345
346		− /* ADC for button press detection */
347		− SND_SOC_DAPM_ADC("SAR", NULL, NAU8825_REG_SAR_CTRL,
348		− NAU8825_SAR_ADC_EN_SFT, 0),
	346	+ /* ADC for button press detection. A dapm supply widget is used to
	347	+ * prevent dapm_power_widgets keeping the codec at SND_SOC_BIAS_ON
	348	+ * during suspend.
	349	+ */
	350	+ SND_SOC_DAPM_SUPPLY("SAR", NAU8825_REG_SAR_CTRL,
	351	+ NAU8825_SAR_ADC_EN_SFT, 0, NULL, 0),
349	352
350	353	SND_SOC_DAPM_PGA_S("ADACL", 2, NAU8825_REG_RDAC, 12, 0, NULL, 0),
351	354	SND_SOC_DAPM_PGA_S("ADACR", 2, NAU8825_REG_RDAC, 13, 0, NULL, 0),
@@ -607,6 +610,16 @@ static bool nau8825_is_jack_inserted(struct regmap *regmap) · 255 unmodified lines
607	610
608	611	static void nau8825_restart_jack_detection(struct regmap *regmap)
609	612	{
	613	+ /* Chip needs one FSCLK cycle in order to generate interrupts,
	614	+ * as we cannot guarantee one will be provided by the system. Turning
	615	+ * master mode on then off enables us to generate that FSCLK cycle
	616	+ * with a minimum of contention on the clock bus.
	617	+ */
	618	+ regmap_update_bits(regmap, NAU8825_REG_I2S_PCM_CTRL2,
	619	+ NAU8825_I2S_MS_MASK, NAU8825_I2S_MS_MASTER);
	620	+ regmap_update_bits(regmap, NAU8825_REG_I2S_PCM_CTRL2,
	621	+ NAU8825_I2S_MS_MASK, NAU8825_I2S_MS_SLAVE);
	622	+
610	623	/* this will restart the entire jack detection process including MIC/GND
611	624	* switching and create interrupts. We have to go from 0 to 1 and back
612	625	* to 0 to restart.
@@ -728,7 +741,10 @@ static irqreturn_t nau8825_interrupt(int irq, void *data) · 115 unmodified lines
728	741	struct regmap *regmap = nau8825->regmap;
729	742	int active_irq, clear_irq = 0, event = 0, event_mask = 0;
730	743
731		− regmap_read(regmap, NAU8825_REG_IRQ_STATUS, &active_irq);
	744	+ if (regmap_read(regmap, NAU8825_REG_IRQ_STATUS, &active_irq)) {
	745	+ dev_err(nau8825->dev, "failed to read irq status\n");
	746	+ return IRQ_NONE;
	747	+ }
732	748
733	749	if ((active_irq & NAU8825_JACK_EJECTION_IRQ_MASK) ==
734	750	NAU8825_JACK_EJECTION_DETECTED) {
@@ -1141,33 +1157,74 @@ static int nau8825_set_bias_level(struct snd_soc_codec *codec, · 406 unmodified lines
1141	1157	return ret;
1142	1158	}
1143	1159	}
1144		−
1145		− ret = regcache_sync(nau8825->regmap);
1146		− if (ret) {
1147		− dev_err(codec->dev,
1148		− "Failed to sync cache: %d\n", ret);
1149		− return ret;
1150		− }
1151	1160	}
1152		−
1153	1161	break;
1154	1162
1155	1163	case SND_SOC_BIAS_OFF:
1156	1164	if (nau8825->mclk_freq)
1157	1165	clk_disable_unprepare(nau8825->mclk);
1158		−
1159		− regcache_mark_dirty(nau8825->regmap);
1160	1166	break;
1161	1167	}
1162	1168	return 0;
1163	1169	}
1164	1170
	1171	+#ifdef CONFIG_PM
	1172	+static int nau8825_suspend(struct snd_soc_codec *codec)
	1173	+{
	1174	+ struct nau8825 *nau8825 = snd_soc_codec_get_drvdata(codec);
	1175	+
	1176	+ disable_irq(nau8825->irq);
	1177	+ regcache_cache_only(nau8825->regmap, true);
	1178	+ regcache_mark_dirty(nau8825->regmap);
	1179	+
	1180	+ return 0;
	1181	+}
	1182	+
	1183	+static int nau8825_resume(struct snd_soc_codec *codec)
	1184	+{
	1185	+ struct nau8825 *nau8825 = snd_soc_codec_get_drvdata(codec);
	1186	+
	1187	+ /* The chip may lose power and reset in S3. regcache_sync restores
	1188	+ * register values including configurations for sysclk, irq, and
	1189	+ * jack/button detection.
	1190	+ */
	1191	+ regcache_cache_only(nau8825->regmap, false);
	1192	+ regcache_sync(nau8825->regmap);
	1193	+
	1194	+ /* Check the jack plug status directly. If the headset is unplugged
	1195	+ * during S3 when the chip has no power, there will be no jack
	1196	+ * detection irq even after the nau8825_restart_jack_detection below,
	1197	+ * because the chip just thinks no headset has ever been plugged in.
	1198	+ */
	1199	+ if (!nau8825_is_jack_inserted(nau8825->regmap)) {
	1200	+ nau8825_eject_jack(nau8825);
	1201	+ snd_soc_jack_report(nau8825->jack, 0, SND_JACK_HEADSET);
	1202	+ }
	1203	+
	1204	+ enable_irq(nau8825->irq);
	1205	+
	1206	+ /* Run jack detection to check the type (OMTP or CTIA) of the headset
	1207	+ * if there is one. This handles the case where a different type of
	1208	+ * headset is plugged in during S3. This triggers an IRQ iff a headset
	1209	+ * is already plugged in.
	1210	+ */
	1211	+ nau8825_restart_jack_detection(nau8825->regmap);
	1212	+
	1213	+ return 0;
	1214	+}
	1215	+#else
	1216	+#define nau8825_suspend NULL
	1217	+#define nau8825_resume NULL
	1218	+#endif
	1219	+
1165	1220	static struct snd_soc_codec_driver nau8825_codec_driver = {
1166	1221	.probe = nau8825_codec_probe,
1167	1222	.set_sysclk = nau8825_set_sysclk,
1168	1223	.set_pll = nau8825_set_pll,
1169	1224	.set_bias_level = nau8825_set_bias_level,
1170	1225	.suspend_bias_off = true,
	1226	+ .suspend = nau8825_suspend,
	1227	+ .resume = nau8825_resume,
1171	1228
1172	1229	.controls = nau8825_controls,
1173	1230	.num_controls = ARRAY_SIZE(nau8825_controls),
@@ -1277,16 +1334,6 @@ static int nau8825_setup_irq(struct nau8825 *nau8825) · 103 unmodified lines
1277	1334	regmap_update_bits(regmap, NAU8825_REG_ENA_CTRL,
1278	1335	NAU8825_ENABLE_DACR, NAU8825_ENABLE_DACR);
1279	1336
1280		− /* Chip needs one FSCLK cycle in order to generate interrupts,
1281		− * as we cannot guarantee one will be provided by the system. Turning
1282		− * master mode on then off enables us to generate that FSCLK cycle
1283		− * with a minimum of contention on the clock bus.
1284		− */
1285		− regmap_update_bits(regmap, NAU8825_REG_I2S_PCM_CTRL2,
1286		− NAU8825_I2S_MS_MASK, NAU8825_I2S_MS_MASTER);
1287		− regmap_update_bits(regmap, NAU8825_REG_I2S_PCM_CTRL2,
1288		− NAU8825_I2S_MS_MASK, NAU8825_I2S_MS_SLAVE);
1289		−
1290	1337	ret = devm_request_threaded_irq(nau8825->dev, nau8825->irq, NULL,
1291	1338	nau8825_interrupt, IRQF_TRIGGER_LOW \| IRQF_ONESHOT,
1292	1339	"nau8825", nau8825);
@@ -1354,36 +1401,6 @@ static int nau8825_i2c_remove(struct i2c_client *client) · 61 unmodified lines
1354	1401	return 0;
1355	1402	}
1356	1403
1357		−#ifdef CONFIG_PM_SLEEP
1358		−static int nau8825_suspend(struct device *dev)
1359		−{
1360		− struct i2c_client *client = to_i2c_client(dev);
1361		− struct nau8825 *nau8825 = dev_get_drvdata(dev);
1362		−
1363		− disable_irq(client->irq);
1364		− regcache_cache_only(nau8825->regmap, true);
1365		− regcache_mark_dirty(nau8825->regmap);
1366		−
1367		− return 0;
1368		−}
1369		−
1370		−static int nau8825_resume(struct device *dev)
1371		−{
1372		− struct i2c_client *client = to_i2c_client(dev);
1373		− struct nau8825 *nau8825 = dev_get_drvdata(dev);
1374		−
1375		− regcache_cache_only(nau8825->regmap, false);
1376		− regcache_sync(nau8825->regmap);
1377		− enable_irq(client->irq);
1378		−
1379		− return 0;
1380		−}
1381		−#endif
1382		−
1383		−static const struct dev_pm_ops nau8825_pm = {
1384		− SET_SYSTEM_SLEEP_PM_OPS(nau8825_suspend, nau8825_resume)
1385		−};
1386		−
1387	1404	static const struct i2c_device_id nau8825_i2c_ids[] = {
1388	1405	{ "nau8825", 0 },
1389	1406	{ }
@@ -1410,7 +1427,6 @@ static struct i2c_driver nau8825_driver = { · 20 unmodified lines
1410	1427	.name = "nau8825",
1411	1428	.of_match_table = of_match_ptr(nau8825_of_ids),
1412	1429	.acpi_match_table = ACPI_PTR(nau8825_acpi_match),
1413		− .pm = &nau8825_pm,
1414	1430	},
1415	1431	.probe = nau8825_i2c_probe,
1416	1432	.remove = nau8825_i2c_remove,

sound/soc/codecs/rt5640.c+1−1

@@ -359,7 +359,7 @@ static const DECLARE_TLV_DB_RANGE(bst_tlv, · 358 unmodified lines
359	359
360	360	/* Interface data select */
361	361	static const char * const rt5640_data_select[] = {
362		− "Normal", "left copy to right", "right copy to left", "Swap"};
	362	+ "Normal", "Swap", "left copy to right", "right copy to left"};
363	363
364	364	static SOC_ENUM_SINGLE_DECL(rt5640_if1_dac_enum, RT5640_DIG_INF_DATA,
365	365	RT5640_IF1_DAC_SEL_SFT, rt5640_data_select);

sound/soc/codecs/rt5640.h+18−18

@@ -443,39 +443,39 @@ · 442 unmodified lines
443	443	#define RT5640_IF1_DAC_SEL_MASK (0x3 << 14)
444	444	#define RT5640_IF1_DAC_SEL_SFT 14
445	445	#define RT5640_IF1_DAC_SEL_NOR (0x0 << 14)
446		−#define RT5640_IF1_DAC_SEL_L2R (0x1 << 14)
447		−#define RT5640_IF1_DAC_SEL_R2L (0x2 << 14)
448		−#define RT5640_IF1_DAC_SEL_SWAP (0x3 << 14)
	446	+#define RT5640_IF1_DAC_SEL_SWAP (0x1 << 14)
	447	+#define RT5640_IF1_DAC_SEL_L2R (0x2 << 14)
	448	+#define RT5640_IF1_DAC_SEL_R2L (0x3 << 14)
449	449	#define RT5640_IF1_ADC_SEL_MASK (0x3 << 12)
450	450	#define RT5640_IF1_ADC_SEL_SFT 12
451	451	#define RT5640_IF1_ADC_SEL_NOR (0x0 << 12)
452		−#define RT5640_IF1_ADC_SEL_L2R (0x1 << 12)
453		−#define RT5640_IF1_ADC_SEL_R2L (0x2 << 12)
454		−#define RT5640_IF1_ADC_SEL_SWAP (0x3 << 12)
	452	+#define RT5640_IF1_ADC_SEL_SWAP (0x1 << 12)
	453	+#define RT5640_IF1_ADC_SEL_L2R (0x2 << 12)
	454	+#define RT5640_IF1_ADC_SEL_R2L (0x3 << 12)
455	455	#define RT5640_IF2_DAC_SEL_MASK (0x3 << 10)
456	456	#define RT5640_IF2_DAC_SEL_SFT 10
457	457	#define RT5640_IF2_DAC_SEL_NOR (0x0 << 10)
458		−#define RT5640_IF2_DAC_SEL_L2R (0x1 << 10)
459		−#define RT5640_IF2_DAC_SEL_R2L (0x2 << 10)
460		−#define RT5640_IF2_DAC_SEL_SWAP (0x3 << 10)
	458	+#define RT5640_IF2_DAC_SEL_SWAP (0x1 << 10)
	459	+#define RT5640_IF2_DAC_SEL_L2R (0x2 << 10)
	460	+#define RT5640_IF2_DAC_SEL_R2L (0x3 << 10)
461	461	#define RT5640_IF2_ADC_SEL_MASK (0x3 << 8)
462	462	#define RT5640_IF2_ADC_SEL_SFT 8
463	463	#define RT5640_IF2_ADC_SEL_NOR (0x0 << 8)
464		−#define RT5640_IF2_ADC_SEL_L2R (0x1 << 8)
465		−#define RT5640_IF2_ADC_SEL_R2L (0x2 << 8)
466		−#define RT5640_IF2_ADC_SEL_SWAP (0x3 << 8)
	464	+#define RT5640_IF2_ADC_SEL_SWAP (0x1 << 8)
	465	+#define RT5640_IF2_ADC_SEL_L2R (0x2 << 8)
	466	+#define RT5640_IF2_ADC_SEL_R2L (0x3 << 8)
467	467	#define RT5640_IF3_DAC_SEL_MASK (0x3 << 6)
468	468	#define RT5640_IF3_DAC_SEL_SFT 6
469	469	#define RT5640_IF3_DAC_SEL_NOR (0x0 << 6)
470		−#define RT5640_IF3_DAC_SEL_L2R (0x1 << 6)
471		−#define RT5640_IF3_DAC_SEL_R2L (0x2 << 6)
472		−#define RT5640_IF3_DAC_SEL_SWAP (0x3 << 6)
	470	+#define RT5640_IF3_DAC_SEL_SWAP (0x1 << 6)
	471	+#define RT5640_IF3_DAC_SEL_L2R (0x2 << 6)
	472	+#define RT5640_IF3_DAC_SEL_R2L (0x3 << 6)
473	473	#define RT5640_IF3_ADC_SEL_MASK (0x3 << 4)
474	474	#define RT5640_IF3_ADC_SEL_SFT 4
475	475	#define RT5640_IF3_ADC_SEL_NOR (0x0 << 4)
476		−#define RT5640_IF3_ADC_SEL_L2R (0x1 << 4)
477		−#define RT5640_IF3_ADC_SEL_R2L (0x2 << 4)
478		−#define RT5640_IF3_ADC_SEL_SWAP (0x3 << 4)
	476	+#define RT5640_IF3_ADC_SEL_SWAP (0x1 << 4)
	477	+#define RT5640_IF3_ADC_SEL_L2R (0x2 << 4)
	478	+#define RT5640_IF3_ADC_SEL_R2L (0x3 << 4)
479	479
480	480	/* REC Left Mixer Control 1 (0x3b) */
481	481	#define RT5640_G_HP_L_RM_L_MASK (0x7 << 13)

sound/soc/codecs/wm5102.c+5−0

@@ -1955,11 +1955,16 @@ err_adsp2_codec_probe: · 1954 unmodified lines
1955	1955	static int wm5102_codec_remove(struct snd_soc_codec *codec)
1956	1956	{
1957	1957	struct wm5102_priv *priv = snd_soc_codec_get_drvdata(codec);
	1958	+ struct arizona *arizona = priv->core.arizona;
1958	1959
1959	1960	wm_adsp2_codec_remove(&priv->core.adsp[0], codec);
1960	1961
1961	1962	priv->core.arizona->dapm = NULL;
1962	1963
	1964	+ arizona_free_irq(arizona, ARIZONA_IRQ_DSP_IRQ1, priv);
	1965	+
	1966	+ arizona_free_spk(codec);
	1967	+
1963	1968	return 0;
1964	1969	}
1965	1970

sound/soc/codecs/wm5110.c+2−0

@@ -2298,6 +2298,8 @@ static int wm5110_codec_remove(struct snd_soc_codec *codec) · 2297 unmodified lines
2298	2298
2299	2299	arizona_free_irq(arizona, ARIZONA_IRQ_DSP_IRQ1, priv);
2300	2300
	2301	+ arizona_free_spk(codec);
	2302	+
2301	2303	return 0;
2302	2304	}
2303	2305

sound/soc/codecs/wm8962.c+1−1

@@ -2471,7 +2471,7 @@ static void wm8962_configure_bclk(struct snd_soc_codec *codec) · 2470 unmodified lines
2471	2471	break;
2472	2472	default:
2473	2473	dev_warn(codec->dev, "Unknown DSPCLK divisor read back\n");
2474		− dspclk = wm8962->sysclk;
	2474	+ dspclk = wm8962->sysclk_rate;
2475	2475	}
2476	2476
2477	2477	dev_dbg(codec->dev, "DSPCLK is %dHz, BCLK %d\n", dspclk, wm8962->bclk);

sound/soc/codecs/wm8997.c+2−0

@@ -1072,6 +1072,8 @@ static int wm8997_codec_remove(struct snd_soc_codec *codec) · 1071 unmodified lines
1072	1072
1073	1073	priv->core.arizona->dapm = NULL;
1074	1074
	1075	+ arizona_free_spk(codec);
	1076	+
1075	1077	return 0;
1076	1078	}
1077	1079

sound/soc/codecs/wm8998.c+2−0

@@ -1324,6 +1324,8 @@ static int wm8998_codec_remove(struct snd_soc_codec *codec) · 1323 unmodified lines
1324	1324
1325	1325	priv->core.arizona->dapm = NULL;
1326	1326
	1327	+ arizona_free_spk(codec);
	1328	+
1327	1329	return 0;
1328	1330	}
1329	1331

sound/soc/intel/Kconfig+0−1

@@ -163,7 +163,6 @@ config SND_SOC_INTEL_SKYLAKE · 162 unmodified lines
163	163	tristate
164	164	select SND_HDA_EXT_CORE
165	165	select SND_SOC_TOPOLOGY
166		− select SND_HDA_I915
167	166	select SND_SOC_INTEL_SST
168	167
169	168	config SND_SOC_INTEL_SKL_RT286_MACH

sound/soc/intel/haswell/sst-haswell-ipc.c+1−1

@@ -1345,7 +1345,7 @@ int sst_hsw_stream_reset(struct sst_hsw hsw, struct sst_hsw_stream stream) · 1344 unmodified lines
1345	1345	return 0;
1346	1346
1347	1347	/* wait for pause to complete before we reset the stream */
1348		− while (stream->running && tries--)
	1348	+ while (stream->running && --tries)
1349	1349	msleep(1);
1350	1350	if (!tries) {
1351	1351	dev_err(hsw->dev, "error: reset stream %d still running\n",

sound/soc/intel/skylake/skl-sst-dsp.c+5−0

@@ -336,6 +336,11 @@ void skl_dsp_free(struct sst_dsp *dsp) · 335 unmodified lines
336	336	skl_ipc_int_disable(dsp);
337	337
338	338	free_irq(dsp->irq, dsp);
	339	+ dsp->cl_dev.ops.cl_cleanup_controller(dsp);
	340	+ skl_cldma_int_disable(dsp);
	341	+ skl_ipc_op_int_disable(dsp);
	342	+ skl_ipc_int_disable(dsp);
	343	+
339	344	skl_dsp_disable_core(dsp);
340	345	}
341	346	EXPORT_SYMBOL_GPL(skl_dsp_free);

sound/soc/intel/skylake/skl-topology.c+28−14

@@ -239,6 +239,7 @@ static void skl_tplg_update_buffer_size(struct skl_sst *ctx, · 238 unmodified lines
239	239	{
240	240	int multiplier = 1;
241	241	struct skl_module_fmt in_fmt, out_fmt;
	242	+ int in_rate, out_rate;
242	243
243	244
244	245	/* Since fixups is applied to pin 0 only, ibs, obs needs
@@ -249,15 +250,24 @@ static void skl_tplg_update_buffer_size(struct skl_sst *ctx, · 4 unmodified lines
249	250
250	251	if (mcfg->m_type == SKL_MODULE_TYPE_SRCINT)
251	252	multiplier = 5;
252		− mcfg->ibs = (in_fmt->s_freq / 1000) *
253		− (mcfg->in_fmt->channels) *
254		− (mcfg->in_fmt->bit_depth >> 3) *
255		− multiplier;
256		−
257		− mcfg->obs = (mcfg->out_fmt->s_freq / 1000) *
258		− (mcfg->out_fmt->channels) *
259		− (mcfg->out_fmt->bit_depth >> 3) *
260		− multiplier;
	253	+
	254	+ if (in_fmt->s_freq % 1000)
	255	+ in_rate = (in_fmt->s_freq / 1000) + 1;
	256	+ else
	257	+ in_rate = (in_fmt->s_freq / 1000);
	258	+
	259	+ mcfg->ibs = in_rate * (mcfg->in_fmt->channels) *
	260	+ (mcfg->in_fmt->bit_depth >> 3) *
	261	+ multiplier;
	262	+
	263	+ if (mcfg->out_fmt->s_freq % 1000)
	264	+ out_rate = (mcfg->out_fmt->s_freq / 1000) + 1;
	265	+ else
	266	+ out_rate = (mcfg->out_fmt->s_freq / 1000);
	267	+
	268	+ mcfg->obs = out_rate * (mcfg->out_fmt->channels) *
	269	+ (mcfg->out_fmt->bit_depth >> 3) *
	270	+ multiplier;
261	271	}
262	272
263	273	static int skl_tplg_update_be_blob(struct snd_soc_dapm_widget *w,
@@ -485,11 +495,15 @@ skl_tplg_init_pipe_modules(struct skl skl, struct skl_pipe pipe) · 221 unmodified lines
485	495	if (!skl_is_pipe_mcps_avail(skl, mconfig))
486	496	return -ENOMEM;
487	497
	498	+ skl_tplg_alloc_pipe_mcps(skl, mconfig);
	499	+
488	500	if (mconfig->is_loadable && ctx->dsp->fw_ops.load_mod) {
489	501	ret = ctx->dsp->fw_ops.load_mod(ctx->dsp,
490	502	mconfig->id.module_id, mconfig->guid);
491	503	if (ret < 0)
492	504	return ret;
	505	+
	506	+ mconfig->m_state = SKL_MODULE_LOADED;
493	507	}
494	508
495	509	/* update blob if blob is null for be with default value */
@@ -509,7 +523,6 @@ skl_tplg_init_pipe_modules(struct skl skl, struct skl_pipe pipe) · 13 unmodified lines
509	523	ret = skl_tplg_set_module_params(w, ctx);
510	524	if (ret < 0)
511	525	return ret;
512		− skl_tplg_alloc_pipe_mcps(skl, mconfig);
513	526	}
514	527
515	528	return 0;
@@ -524,7 +537,8 @@ static int skl_tplg_unload_pipe_modules(struct skl_sst *ctx, · 8 unmodified lines
524	537	list_for_each_entry(w_module, &pipe->w_list, node) {
525	538	mconfig = w_module->w->priv;
526	539
527		− if (mconfig->is_loadable && ctx->dsp->fw_ops.unload_mod)
	540	+ if (mconfig->is_loadable && ctx->dsp->fw_ops.unload_mod &&
	541	+ mconfig->m_state > SKL_MODULE_UNINIT)
528	542	return ctx->dsp->fw_ops.unload_mod(ctx->dsp,
529	543	mconfig->id.module_id);
530	544	}
@@ -558,6 +572,9 @@ static int skl_tplg_mixer_dapm_pre_pmu_event(struct snd_soc_dapm_widget *w, · 27 unmodified lines
558	572	if (!skl_is_pipe_mem_avail(skl, mconfig))
559	573	return -ENOMEM;
560	574
	575	+ skl_tplg_alloc_pipe_mem(skl, mconfig);
	576	+ skl_tplg_alloc_pipe_mcps(skl, mconfig);
	577	+
561	578	/*
562	579	* Create a list of modules for pipe.
563	580	* This list contains modules from source to sink
@@ -601,9 +618,6 @@ static int skl_tplg_mixer_dapm_pre_pmu_event(struct snd_soc_dapm_widget *w, · 37 unmodified lines
601	618	src_module = dst_module;
602	619	}
603	620
604		− skl_tplg_alloc_pipe_mem(skl, mconfig);
605		− skl_tplg_alloc_pipe_mcps(skl, mconfig);
606		−
607	621	return 0;
608	622	}
609	623

sound/soc/intel/skylake/skl-topology.h+4−4

@@ -274,10 +274,10 @@ struct skl_pipe { · 273 unmodified lines
274	274
275	275	enum skl_module_state {
276	276	SKL_MODULE_UNINIT = 0,
277		− SKL_MODULE_INIT_DONE = 1,
278		− SKL_MODULE_LOADED = 2,
279		− SKL_MODULE_UNLOADED = 3,
280		− SKL_MODULE_BIND_DONE = 4
	277	+ SKL_MODULE_LOADED = 1,
	278	+ SKL_MODULE_INIT_DONE = 2,
	279	+ SKL_MODULE_BIND_DONE = 3,
	280	+ SKL_MODULE_UNLOADED = 4,
281	281	};
282	282
283	283	struct skl_module_cfg {

sound/soc/intel/skylake/skl.c+23−9

@@ -222,6 +222,7 @@ static int skl_suspend(struct device *dev) · 221 unmodified lines
222	222	struct hdac_ext_bus *ebus = pci_get_drvdata(pci);
223	223	struct skl *skl = ebus_to_skl(ebus);
224	224	struct hdac_bus *bus = ebus_to_hbus(ebus);
	225	+ int ret = 0;
225	226
226	227	/*
227	228	* Do not suspend if streams which are marked ignore suspend are
@@ -232,10 +233,20 @@ static int skl_suspend(struct device *dev) · 4 unmodified lines
232	233	enable_irq_wake(bus->irq);
233	234	pci_save_state(pci);
234	235	pci_disable_device(pci);
235		− return 0;
236	236	} else {
237		− return _skl_suspend(ebus);
	237	+ ret = _skl_suspend(ebus);
	238	+ if (ret < 0)
	239	+ return ret;
	240	+ }
	241	+
	242	+ if (IS_ENABLED(CONFIG_SND_SOC_HDAC_HDMI)) {
	243	+ ret = snd_hdac_display_power(bus, false);
	244	+ if (ret < 0)
	245	+ dev_err(bus->dev,
	246	+ "Cannot turn OFF display power on i915\n");
238	247	}
	248	+
	249	+ return ret;
239	250	}
240	251
241	252	static int skl_resume(struct device *dev)
@@ -316,17 +327,20 @@ static int skl_free(struct hdac_ext_bus *ebus) · 74 unmodified lines
316	327
317	328	if (bus->irq >= 0)
318	329	free_irq(bus->irq, (void *)bus);
319		− if (bus->remap_addr)
320		− iounmap(bus->remap_addr);
321		−
322	330	snd_hdac_bus_free_stream_pages(bus);
323	331	snd_hdac_stream_free_all(ebus);
324	332	snd_hdac_link_free_all(ebus);
	333	+
	334	+ if (bus->remap_addr)
	335	+ iounmap(bus->remap_addr);
	336	+
325	337	pci_release_regions(skl->pci);
326	338	pci_disable_device(skl->pci);
327	339
328	340	snd_hdac_ext_bus_exit(ebus);
329	341
	342	+ if (IS_ENABLED(CONFIG_SND_SOC_HDAC_HDMI))
	343	+ snd_hdac_i915_exit(&ebus->bus);
330	344	return 0;
331	345	}
332	346
@@ -719,12 +733,12 @@ static void skl_remove(struct pci_dev *pci) · 386 unmodified lines
719	733	if (skl->tplg)
720	734	release_firmware(skl->tplg);
721	735
722		− if (IS_ENABLED(CONFIG_SND_SOC_HDAC_HDMI))
723		− snd_hdac_i915_exit(&ebus->bus);
724		−
725	736	if (pci_dev_run_wake(pci))
726	737	pm_runtime_get_noresume(&pci->dev);
727		− pci_dev_put(pci);
	738	+
	739	+ /* codec removal, invoke bus_device_remove */
	740	+ snd_hdac_ext_bus_device_remove(ebus);
	741	+
728	742	skl_platform_unregister(&pci->dev);
729	743	skl_free_dsp(skl);
730	744	skl_machine_device_unregister(skl);

sound/soc/soc-dapm.c+7−0

@@ -2188,6 +2188,13 @@ static ssize_t dapm_widget_show_component(struct snd_soc_component *cmpnt, · 2187 unmodified lines
2188	2188	int count = 0;
2189	2189	char *state = "not set";
2190	2190
	2191	+ /* card won't be set for the dummy component, as a spot fix
	2192	+ * we're checking for that case specifically here but in future
	2193	+ * we will ensure that the dummy component looks like others.
	2194	+ */
	2195	+ if (!cmpnt->card)
	2196	+ return 0;
	2197	+
2191	2198	list_for_each_entry(w, &cmpnt->card->widgets, list) {
2192	2199	if (w->dapm != dapm)
2193	2200	continue;