- constification of 'struct bin_attribute' in various HID driver (Thomas Weißschuh)
Unified · Split
| @@ -0,0 +1,9 @@ | ||
| 1 | +# SPDX-License-Identifier: GPL-2.0 | |
| 2 | + | |
| 3 | +check-private-items = true | |
| 4 | + | |
| 5 | +disallowed-macros = [ | |
| 6 | + # The `clippy::dbg_macro` lint only works with `std::dbg!`, thus we simulate | |
| 7 | + # it here, see: https://github.com/rust-lang/rust-clippy/issues/11303. | |
| 8 | + { path = "kernel::dbg", reason = "the `dbg!` macro is intended as a debugging tool" }, | |
| 9 | +] | |
| @@ -103,6 +103,7 @@ modules.order · 102 unmodified lines | ||
| 103 | 103 | # We don't want to ignore the following even if they are dot-files |
| 104 | 104 | # |
| 105 | 105 | !.clang-format |
| 106 | +!.clippy.toml | |
| 106 | 107 | !.cocciconfig |
| 107 | 108 | !.editorconfig |
| 108 | 109 | !.get_maintainer.ignore |
| @@ -128,6 +129,7 @@ series · 19 unmodified lines | ||
| 128 | 129 | |
| 129 | 130 | # ctags files |
| 130 | 131 | tags |
| 132 | +!tags/ | |
| 131 | 133 | TAGS |
| 132 | 134 | |
| 133 | 135 | # cscope files |
| @@ -342,6 +342,70 @@ Description: Specific uncompressed frame descriptors · 341 unmodified lines | ||
| 342 | 342 | support |
| 343 | 343 | ========================= ===================================== |
| 344 | 344 | |
| 345 | +What: /config/usb-gadget/gadget/functions/uvc.name/streaming/framebased | |
| 346 | +Date: Sept 2024 | |
| 347 | +KernelVersion: 5.15 | |
| 348 | +Description: Framebased format descriptors | |
| 349 | + | |
| 350 | +What: /config/usb-gadget/gadget/functions/uvc.name/streaming/framebased/name | |
| 351 | +Date: Sept 2024 | |
| 352 | +KernelVersion: 5.15 | |
| 353 | +Description: Specific framebased format descriptors | |
| 354 | + | |
| 355 | + ================== ======================================= | |
| 356 | + bFormatIndex unique id for this format descriptor; | |
| 357 | + only defined after parent header is | |
| 358 | + linked into the streaming class; | |
| 359 | + read-only | |
| 360 | + bmaControls this format's data for bmaControls in | |
| 361 | + the streaming header | |
| 362 | + bmInterlaceFlags specifies interlace information, | |
| 363 | + read-only | |
| 364 | + bAspectRatioY the X dimension of the picture aspect | |
| 365 | + ratio, read-only | |
| 366 | + bAspectRatioX the Y dimension of the picture aspect | |
| 367 | + ratio, read-only | |
| 368 | + bDefaultFrameIndex optimum frame index for this stream | |
| 369 | + bBitsPerPixel number of bits per pixel used to | |
| 370 | + specify color in the decoded video | |
| 371 | + frame | |
| 372 | + guidFormat globally unique id used to identify | |
| 373 | + stream-encoding format | |
| 374 | + ================== ======================================= | |
| 375 | + | |
| 376 | +What: /config/usb-gadget/gadget/functions/uvc.name/streaming/framebased/name/name | |
| 377 | +Date: Sept 2024 | |
| 378 | +KernelVersion: 5.15 | |
| 379 | +Description: Specific framebased frame descriptors | |
| 380 | + | |
| 381 | + ========================= ===================================== | |
| 382 | + bFrameIndex unique id for this framedescriptor; | |
| 383 | + only defined after parent format is | |
| 384 | + linked into the streaming header; | |
| 385 | + read-only | |
| 386 | + dwFrameInterval indicates how frame interval can be | |
| 387 | + programmed; a number of values | |
| 388 | + separated by newline can be specified | |
| 389 | + dwDefaultFrameInterval the frame interval the device would | |
| 390 | + like to use as default | |
| 391 | + dwBytesPerLine Specifies the number of bytes per line | |
| 392 | + of video for packed fixed frame size | |
| 393 | + formats, allowing the receiver to | |
| 394 | + perform stride alignment of the video. | |
| 395 | + If the bVariableSize value (above) is | |
| 396 | + TRUE (1), or if the format does not | |
| 397 | + permit such alignment, this value shall | |
| 398 | + be set to zero (0). | |
| 399 | + dwMaxBitRate the maximum bit rate at the shortest | |
| 400 | + frame interval in bps | |
| 401 | + dwMinBitRate the minimum bit rate at the longest | |
| 402 | + frame interval in bps | |
| 403 | + wHeight height of decoded bitmap frame in px | |
| 404 | + wWidth width of decoded bitmam frame in px | |
| 405 | + bmCapabilities still image support, fixed frame-rate | |
| 406 | + support | |
| 407 | + ========================= ===================================== | |
| 408 | + | |
| 345 | 409 | What: /config/usb-gadget/gadget/functions/uvc.name/streaming/header |
| 346 | 410 | Date: Dec 2014 |
| 347 | 411 | KernelVersion: 4.0 |
| @@ -0,0 +1,25 @@ | ||
| 1 | +What: /sys/kernel/debug/vfio/<device>/migration/hisi_acc/dev_data | |
| 2 | +Date: Jan 2025 | |
| 3 | +KernelVersion: 6.13 | |
| 4 | +Contact: Longfang Liu <liulongfang@huawei.com> | |
| 5 | +Description: Read the configuration data and some status data | |
| 6 | + required for device live migration. These data include device | |
| 7 | + status data, queue configuration data, some task configuration | |
| 8 | + data and device attribute data. The output format of the data | |
| 9 | + is defined by the live migration driver. | |
| 10 | + | |
| 11 | +What: /sys/kernel/debug/vfio/<device>/migration/hisi_acc/migf_data | |
| 12 | +Date: Jan 2025 | |
| 13 | +KernelVersion: 6.13 | |
| 14 | +Contact: Longfang Liu <liulongfang@huawei.com> | |
| 15 | +Description: Read the data from the last completed live migration. | |
| 16 | + This data includes the same device status data as in "dev_data". | |
| 17 | + The migf_data is the dev_data that is migrated. | |
| 18 | + | |
| 19 | +What: /sys/kernel/debug/vfio/<device>/migration/hisi_acc/cmd_state | |
| 20 | +Date: Jan 2025 | |
| 21 | +KernelVersion: 6.13 | |
| 22 | +Contact: Longfang Liu <liulongfang@huawei.com> | |
| 23 | +Description: Used to obtain the device command sending and receiving | |
| 24 | + channel status. Returns failure or success logs based on the | |
| 25 | + results. | |
| @@ -8,17 +8,18 @@ Description: Read-only. Attribute group to describe the magic bits · 7 unmodified lines | ||
| 8 | 8 | Each attribute under this group defines a bit range of the |
| 9 | 9 | perf_event_attr.config. Supported attribute are listed |
| 10 | 10 | below:: |
| 11 | − event = "config:0-31" - event ID | |
| 12 | 11 | |
| 13 | − For example:: | |
| 12 | + event = "config:0-31" - event ID | |
| 14 | 13 | |
| 15 | − l1_to_l2_lat = "event=0x1" | |
| 14 | + For example:: | |
| 15 | + | |
| 16 | + l1_to_l2_lat = "event=0x1" | |
| 16 | 17 | |
| 17 | 18 | What: /sys/bus/event_source/devices/vpa_pmu/events |
| 18 | 19 | Date: November 2024 |
| 19 | 20 | Contact: Linux on PowerPC Developer List <linuxppc-dev@lists.ozlabs.org> |
| 20 | −Description: Read-only. Attribute group to describe performance monitoring | |
| 21 | +Description: Read-only. Attribute group to describe performance monitoring | |
| 21 | 22 | events for the Virtual Processor Area events. Each attribute |
| 22 | − in this group describes a single performance monitoring event | |
| 23 | − supported by vpa_pmu. The name of the file is the name of | |
| 24 | − the event (See ABI/testing/sysfs-bus-event_source-devices-events). | |
| 23 | + in this group describes a single performance monitoring event | |
| 24 | + supported by vpa_pmu. The name of the file is the name of | |
| 25 | + the event (See ABI/testing/sysfs-bus-event_source-devices-events). | |
| @@ -2268,6 +2268,30 @@ Description: · 2267 unmodified lines | ||
| 2268 | 2268 | An example format is 16-bytes, 2-digits-per-byte, HEX-string |
| 2269 | 2269 | representing the sensor unique ID number. |
| 2270 | 2270 | |
| 2271 | +What: /sys/bus/iio/devices/iio:deviceX/filter_type_available | |
| 2272 | +What: /sys/bus/iio/devices/iio:deviceX/in_voltage-voltage_filter_mode_available | |
| 2273 | +KernelVersion: 6.1 | |
| 2274 | +Contact: linux-iio@vger.kernel.org | |
| 2275 | +Description: | |
| 2276 | + Reading returns a list with the possible filter modes. Options | |
| 2277 | + for the attribute: | |
| 2278 | + | |
| 2279 | + * "sinc3" - The digital sinc3 filter. Moderate 1st | |
| 2280 | + conversion time. Good noise performance. | |
| 2281 | + * "sinc4" - Sinc 4. Excellent noise performance. Long | |
| 2282 | + 1st conversion time. | |
| 2283 | + * "sinc5" - The digital sinc5 filter. Excellent noise | |
| 2284 | + performance | |
| 2285 | + * "sinc4+sinc1" - Sinc4 + averaging by 8. Low 1st conversion | |
| 2286 | + time. | |
| 2287 | + * "sinc3+rej60" - Sinc3 + 60Hz rejection. | |
| 2288 | + * "sinc3+sinc1" - Sinc3 + averaging by 8. Low 1st conversion | |
| 2289 | + time. | |
| 2290 | + * "sinc3+pf1" - Sinc3 + device specific Post Filter 1. | |
| 2291 | + * "sinc3+pf2" - Sinc3 + device specific Post Filter 2. | |
| 2292 | + * "sinc3+pf3" - Sinc3 + device specific Post Filter 3. | |
| 2293 | + * "sinc3+pf4" - Sinc3 + device specific Post Filter 4. | |
| 2294 | + | |
| 2271 | 2295 | What: /sys/.../events/in_proximity_thresh_either_runningperiod |
| 2272 | 2296 | KernelVersion: 6.6 |
| 2273 | 2297 | Contact: linux-iio@vger.kernel.org |
| @@ -2339,3 +2363,11 @@ KernelVersion: 6.10 · 65 unmodified lines | ||
| 2339 | 2363 | Contact: linux-iio@vger.kernel.org |
| 2340 | 2364 | Description: |
| 2341 | 2365 | The value of current sense resistor in Ohms. |
| 2366 | + | |
| 2367 | +What: /sys/.../iio:deviceX/in_attention_input | |
| 2368 | +KernelVersion: 6.13 | |
| 2369 | +Contact: linux-iio@vger.kernel.org | |
| 2370 | +Description: | |
| 2371 | + Value representing the user's attention to the system expressed | |
| 2372 | + in units as percentage. This usually means if the user is | |
| 2373 | + looking at the screen or not. | |
| @@ -1,46 +0,0 @@ | ||
| 1 | −What: /sys/bus/iio/devices/iio:deviceX/in_voltage-voltage_filter_mode_available | |
| 2 | −KernelVersion: 6.2 | |
| 3 | −Contact: linux-iio@vger.kernel.org | |
| 4 | −Description: | |
| 5 | − Reading returns a list with the possible filter modes. | |
| 6 | − | |
| 7 | − * "sinc4" - Sinc 4. Excellent noise performance. Long | |
| 8 | − 1st conversion time. No natural 50/60Hz rejection. | |
| 9 | − | |
| 10 | − * "sinc4+sinc1" - Sinc4 + averaging by 8. Low 1st conversion | |
| 11 | − time. | |
| 12 | − | |
| 13 | − * "sinc3" - Sinc3. Moderate 1st conversion time. | |
| 14 | − Good noise performance. | |
| 15 | − | |
| 16 | − * "sinc3+rej60" - Sinc3 + 60Hz rejection. At a sampling | |
| 17 | − frequency of 50Hz, achieves simultaneous 50Hz and 60Hz | |
| 18 | − rejection. | |
| 19 | − | |
| 20 | − * "sinc3+sinc1" - Sinc3 + averaging by 8. Low 1st conversion | |
| 21 | − time. Best used with a sampling frequency of at least | |
| 22 | − 216.19Hz. | |
| 23 | − | |
| 24 | − * "sinc3+pf1" - Sinc3 + Post Filter 1. 53dB rejection @ | |
| 25 | − 50Hz, 58dB rejection @ 60Hz. | |
| 26 | − | |
| 27 | − * "sinc3+pf2" - Sinc3 + Post Filter 2. 70dB rejection @ | |
| 28 | − 50Hz, 70dB rejection @ 60Hz. | |
| 29 | − | |
| 30 | − * "sinc3+pf3" - Sinc3 + Post Filter 3. 99dB rejection @ | |
| 31 | − 50Hz, 103dB rejection @ 60Hz. | |
| 32 | − | |
| 33 | − * "sinc3+pf4" - Sinc3 + Post Filter 4. 103dB rejection @ | |
| 34 | − 50Hz, 109dB rejection @ 60Hz. | |
| 35 | − | |
| 36 | −What: /sys/bus/iio/devices/iio:deviceX/in_voltageY-voltageZ_filter_mode | |
| 37 | −KernelVersion: 6.2 | |
| 38 | −Contact: linux-iio@vger.kernel.org | |
| 39 | −Description: | |
| 40 | − Set the filter mode of the differential channel. When the filter | |
| 41 | − mode changes, the in_voltageY-voltageZ_sampling_frequency and | |
| 42 | − in_voltageY-voltageZ_sampling_frequency_available attributes | |
| 43 | − might also change to accommodate the new filter mode. | |
| 44 | − If the current sampling frequency is out of range for the new | |
| 45 | − filter mode, the sampling frequency will be changed to the | |
| 46 | − closest valid one. | |
| @@ -163,6 +163,17 @@ Description: · 162 unmodified lines | ||
| 163 | 163 | will be present in sysfs. Writing 1 to this file |
| 164 | 164 | will perform reset. |
| 165 | 165 | |
| 166 | +What: /sys/bus/pci/devices/.../reset_subordinate | |
| 167 | +Date: October 2024 | |
| 168 | +Contact: linux-pci@vger.kernel.org | |
| 169 | +Description: | |
| 170 | + This is visible only for bridge devices. If you want to reset | |
| 171 | + all devices attached through the subordinate bus of a specific | |
| 172 | + bridge device, writing 1 to this will try to do it. This will | |
| 173 | + affect all devices attached to the system through this bridge | |
| 174 | + similiar to writing 1 to their individual "reset" file, so use | |
| 175 | + with caution. | |
| 176 | + | |
| 166 | 177 | What: /sys/bus/pci/devices/.../vpd |
| 167 | 178 | Date: February 2008 |
| 168 | 179 | Contact: Ben Hutchings <bwh@kernel.org> |
| @@ -149,6 +149,19 @@ Description: · 148 unmodified lines | ||
| 149 | 149 | advertise to the partner. The currently used capabilities are in |
| 150 | 150 | brackets. Selection happens by writing to the file. |
| 151 | 151 | |
| 152 | +What: /sys/class/typec/<port>/usb_capability | |
| 153 | +Date: November 2024 | |
| 154 | +Contact: Heikki Krogerus <heikki.krogerus@linux.intel.com> | |
| 155 | +Description: Lists the supported USB Modes. The default USB mode that is used | |
| 156 | + next time with the Enter_USB Message is in brackets. The default | |
| 157 | + mode can be changed by writing to the file when supported by the | |
| 158 | + driver. | |
| 159 | + | |
| 160 | + Valid values: | |
| 161 | + - usb2 (USB 2.0) | |
| 162 | + - usb3 (USB 3.2) | |
| 163 | + - usb4 (USB4) | |
| 164 | + | |
| 152 | 165 | USB Type-C partner devices (eg. /sys/class/typec/port0-partner/) |
| 153 | 166 | |
| 154 | 167 | What: /sys/class/typec/<port>-partner/accessory_mode |
| @@ -220,6 +233,20 @@ Description: · 65 unmodified lines | ||
| 220 | 233 | directory exists, it will have an attribute file for every VDO |
| 221 | 234 | in Discover Identity command result. |
| 222 | 235 | |
| 236 | +What: /sys/class/typec/<port>-partner/usb_mode | |
| 237 | +Date: November 2024 | |
| 238 | +Contact: Heikki Krogerus <heikki.krogerus@linux.intel.com> | |
| 239 | +Description: The USB Modes that the partner device supports. The active mode | |
| 240 | + is displayed in brackets. The active USB mode can be changed by | |
| 241 | + writing to this file when the port driver is able to send Data | |
| 242 | + Reset Message to the partner. That requires USB Power Delivery | |
| 243 | + contract between the partner and the port. | |
| 244 | + | |
| 245 | + Valid values: | |
| 246 | + - usb2 (USB 2.0) | |
| 247 | + - usb3 (USB 3.2) | |
| 248 | + - usb4 (USB4) | |
| 249 | + | |
| 223 | 250 | USB Type-C cable devices (eg. /sys/class/typec/port0-cable/) |
| 224 | 251 | |
| 225 | 252 | Note: Electronically Marked Cables will have a device also for one cable plug |
| @@ -76,7 +76,7 @@ Description: · 75 unmodified lines | ||
| 76 | 76 | timeout when the pretimeout interrupt is delivered. Pretimeout |
| 77 | 77 | is an optional feature. |
| 78 | 78 | |
| 79 | −What: /sys/class/watchdog/watchdogn/pretimeout_avaialable_governors | |
| 79 | +What: /sys/class/watchdog/watchdogn/pretimeout_available_governors | |
| 80 | 80 | Date: February 2017 |
| 81 | 81 | Contact: Wim Van Sebroeck <wim@iguana.be> |
| 82 | 82 | Description: |
| @@ -311,10 +311,13 @@ Description: Do background GC aggressively when set. Set to 0 by default. · 310 unmodified lines | ||
| 311 | 311 | GC approach and turns SSR mode on. |
| 312 | 312 | gc urgent low(2): lowers the bar of checking I/O idling in |
| 313 | 313 | order to process outstanding discard commands and GC a |
| 314 | − little bit aggressively. uses cost benefit GC approach. | |
| 314 | + little bit aggressively. always uses cost benefit GC approach, | |
| 315 | + and will override age-threshold GC approach if ATGC is enabled | |
| 316 | + at the same time. | |
| 315 | 317 | gc urgent mid(3): does GC forcibly in a period of given |
| 316 | 318 | gc_urgent_sleep_time and executes a mid level of I/O idling check. |
| 317 | − uses cost benefit GC approach. | |
| 319 | + always uses cost benefit GC approach, and will override | |
| 320 | + age-threshold GC approach if ATGC is enabled at the same time. | |
| 318 | 321 | |
| 319 | 322 | What: /sys/fs/f2fs/<disk>/gc_urgent_sleep_time |
| 320 | 323 | Date: August 2017 |
| @@ -819,3 +822,9 @@ Description: It controls the valid block ratio threshold not to trigger excessiv · 498 unmodified lines | ||
| 819 | 822 | for zoned deivces. The initial value of it is 95(%). F2FS will stop the |
| 820 | 823 | background GC thread from intiating GC for sections having valid blocks |
| 821 | 824 | exceeding the ratio. |
| 825 | + | |
| 826 | +What: /sys/fs/f2fs/<disk>/max_read_extent_count | |
| 827 | +Date: November 2024 | |
| 828 | +Contact: "Chao Yu" <chao@kernel.org> | |
| 829 | +Description: It controls max read extent count for per-inode, the value of threshold | |
| 830 | + is 10240 by default. | |
| @@ -117,6 +117,35 @@ by the PCI endpoint function driver. · 116 unmodified lines | ||
| 117 | 117 | The PCI endpoint function driver should use pci_epc_mem_free_addr() to |
| 118 | 118 | free the memory space allocated using pci_epc_mem_alloc_addr(). |
| 119 | 119 | |
| 120 | +* pci_epc_map_addr() | |
| 121 | + | |
| 122 | + A PCI endpoint function driver should use pci_epc_map_addr() to map to a RC | |
| 123 | + PCI address the CPU address of local memory obtained with | |
| 124 | + pci_epc_mem_alloc_addr(). | |
| 125 | + | |
| 126 | +* pci_epc_unmap_addr() | |
| 127 | + | |
| 128 | + A PCI endpoint function driver should use pci_epc_unmap_addr() to unmap the | |
| 129 | + CPU address of local memory mapped to a RC address with pci_epc_map_addr(). | |
| 130 | + | |
| 131 | +* pci_epc_mem_map() | |
| 132 | + | |
| 133 | + A PCI endpoint controller may impose constraints on the RC PCI addresses that | |
| 134 | + can be mapped. The function pci_epc_mem_map() allows endpoint function | |
| 135 | + drivers to allocate and map controller memory while handling such | |
| 136 | + constraints. This function will determine the size of the memory that must be | |
| 137 | + allocated with pci_epc_mem_alloc_addr() for successfully mapping a RC PCI | |
| 138 | + address range. This function will also indicate the size of the PCI address | |
| 139 | + range that was actually mapped, which can be less than the requested size, as | |
| 140 | + well as the offset into the allocated memory to use for accessing the mapped | |
| 141 | + RC PCI address range. | |
| 142 | + | |
| 143 | +* pci_epc_mem_unmap() | |
| 144 | + | |
| 145 | + A PCI endpoint function driver can use pci_epc_mem_unmap() to unmap and free | |
| 146 | + controller memory that was allocated and mapped using pci_epc_mem_map(). | |
| 147 | + | |
| 148 | + | |
| 120 | 149 | Other EPC APIs |
| 121 | 150 | ~~~~~~~~~~~~~~ |
| 122 | 151 | |
| @@ -18,3 +18,4 @@ PCI Bus Subsystem · 17 unmodified lines | ||
| 18 | 18 | pcieaer-howto |
| 19 | 19 | endpoint/index |
| 20 | 20 | boot-interrupts |
| 21 | + tph | |
| @@ -217,8 +217,12 @@ capability structure except the PCI Express capability structure, · 216 unmodified lines | ||
| 217 | 217 | that is shared between many drivers including the service drivers. |
| 218 | 218 | RMW Capability accessors (pcie_capability_clear_and_set_word(), |
| 219 | 219 | pcie_capability_set_word(), and pcie_capability_clear_word()) protect |
| 220 | −a selected set of PCI Express Capability Registers (Link Control | |
| 221 | −Register and Root Control Register). Any change to those registers | |
| 222 | −should be performed using RMW accessors to avoid problems due to | |
| 223 | −concurrent updates. For the up-to-date list of protected registers, | |
| 224 | −see pcie_capability_clear_and_set_word(). | |
| 220 | +a selected set of PCI Express Capability Registers: | |
| 221 | + | |
| 222 | +* Link Control Register | |
| 223 | +* Root Control Register | |
| 224 | +* Link Control 2 Register | |
| 225 | + | |
| 226 | +Any change to those registers should be performed using RMW accessors to | |
| 227 | +avoid problems due to concurrent updates. For the up-to-date list of | |
| 228 | +protected registers, see pcie_capability_clear_and_set_word(). | |
| @@ -0,0 +1,132 @@ | ||
| 1 | +.. SPDX-License-Identifier: GPL-2.0 | |
| 2 | + | |
| 3 | + | |
| 4 | +=========== | |
| 5 | +TPH Support | |
| 6 | +=========== | |
| 7 | + | |
| 8 | +:Copyright: 2024 Advanced Micro Devices, Inc. | |
| 9 | +:Authors: - Eric van Tassell <eric.vantassell@amd.com> | |
| 10 | + - Wei Huang <wei.huang2@amd.com> | |
| 11 | + | |
| 12 | + | |
| 13 | +Overview | |
| 14 | +======== | |
| 15 | + | |
| 16 | +TPH (TLP Processing Hints) is a PCIe feature that allows endpoint devices | |
| 17 | +to provide optimization hints for requests that target memory space. | |
| 18 | +These hints, in a format called Steering Tags (STs), are embedded in the | |
| 19 | +requester's TLP headers, enabling the system hardware, such as the Root | |
| 20 | +Complex, to better manage platform resources for these requests. | |
| 21 | + | |
| 22 | +For example, on platforms with TPH-based direct data cache injection | |
| 23 | +support, an endpoint device can include appropriate STs in its DMA | |
| 24 | +traffic to specify which cache the data should be written to. This allows | |
| 25 | +the CPU core to have a higher probability of getting data from cache, | |
| 26 | +potentially improving performance and reducing latency in data | |
| 27 | +processing. | |
| 28 | + | |
| 29 | + | |
| 30 | +How to Use TPH | |
| 31 | +============== | |
| 32 | + | |
| 33 | +TPH is presented as an optional extended capability in PCIe. The Linux | |
| 34 | +kernel handles TPH discovery during boot, but it is up to the device | |
| 35 | +driver to request TPH enablement if it is to be utilized. Once enabled, | |
| 36 | +the driver uses the provided API to obtain the Steering Tag for the | |
| 37 | +target memory and to program the ST into the device's ST table. | |
| 38 | + | |
| 39 | +Enable TPH support in Linux | |
| 40 | +--------------------------- | |
| 41 | + | |
| 42 | +To support TPH, the kernel must be built with the CONFIG_PCIE_TPH option | |
| 43 | +enabled. | |
| 44 | + | |
| 45 | +Manage TPH | |
| 46 | +---------- | |
| 47 | + | |
| 48 | +To enable TPH for a device, use the following function:: | |
| 49 | + | |
| 50 | + int pcie_enable_tph(struct pci_dev *pdev, int mode); | |
| 51 | + | |
| 52 | +This function enables TPH support for device with a specific ST mode. | |
| 53 | +Current supported modes include: | |
| 54 | + | |
| 55 | + * PCI_TPH_ST_NS_MODE - NO ST Mode | |
| 56 | + * PCI_TPH_ST_IV_MODE - Interrupt Vector Mode | |
| 57 | + * PCI_TPH_ST_DS_MODE - Device Specific Mode | |
| 58 | + | |
| 59 | +`pcie_enable_tph()` checks whether the requested mode is actually | |
| 60 | +supported by the device before enabling. The device driver can figure out | |
| 61 | +which TPH mode is supported and can be properly enabled based on the | |
| 62 | +return value of `pcie_enable_tph()`. | |
| 63 | + | |
| 64 | +To disable TPH, use the following function:: | |
| 65 | + | |
| 66 | + void pcie_disable_tph(struct pci_dev *pdev); | |
| 67 | + | |
| 68 | +Manage ST | |
| 69 | +--------- | |
| 70 | + | |
| 71 | +Steering Tags are platform specific. PCIe spec does not specify where STs | |
| 72 | +are from. Instead PCI Firmware Specification defines an ACPI _DSM method | |
| 73 | +(see the `Revised _DSM for Cache Locality TPH Features ECN | |
| 74 | +<https://members.pcisig.com/wg/PCI-SIG/document/15470>`_) for retrieving | |
| 75 | +STs for a target memory of various properties. This method is what is | |
| 76 | +supported in this implementation. | |
| 77 | + | |
| 78 | +To retrieve a Steering Tag for a target memory associated with a specific | |
| 79 | +CPU, use the following function:: | |
| 80 | + | |
| 81 | + int pcie_tph_get_cpu_st(struct pci_dev *pdev, enum tph_mem_type type, | |
| 82 | + unsigned int cpu_uid, u16 *tag); | |
| 83 | + | |
| 84 | +The `type` argument is used to specify the memory type, either volatile | |
| 85 | +or persistent, of the target memory. The `cpu_uid` argument specifies the | |
| 86 | +CPU where the memory is associated to. | |
| 87 | + | |
| 88 | +After the ST value is retrieved, the device driver can use the following | |
| 89 | +function to write the ST into the device:: | |
| 90 | + | |
| 91 | + int pcie_tph_set_st_entry(struct pci_dev *pdev, unsigned int index, | |
| 92 | + u16 tag); | |
| 93 | + | |
| 94 | +The `index` argument is the ST table entry index the ST tag will be | |
| 95 | +written into. `pcie_tph_set_st_entry()` will figure out the proper | |
| 96 | +location of ST table, either in the MSI-X table or in the TPH Extended | |
| 97 | +Capability space, and write the Steering Tag into the ST entry pointed by | |
| 98 | +the `index` argument. | |
| 99 | + | |
| 100 | +It is completely up to the driver to decide how to use these TPH | |
| 101 | +functions. For example a network device driver can use the TPH APIs above | |
| 102 | +to update the Steering Tag when interrupt affinity of a RX/TX queue has | |
| 103 | +been changed. Here is a sample code for IRQ affinity notifier: | |
| 104 | + | |
| 105 | +.. code-block:: c | |
| 106 | + | |
| 107 | + static void irq_affinity_notified(struct irq_affinity_notify *notify, | |
| 108 | + const cpumask_t *mask) | |
| 109 | + { | |
| 110 | + struct drv_irq *irq; | |
| 111 | + unsigned int cpu_id; | |
| 112 | + u16 tag; | |
| 113 | + | |
| 114 | + irq = container_of(notify, struct drv_irq, affinity_notify); | |
| 115 | + cpumask_copy(irq->cpu_mask, mask); | |
| 116 | + | |
| 117 | + /* Pick a right CPU as the target - here is just an example */ | |
| 118 | + cpu_id = cpumask_first(irq->cpu_mask); | |
| 119 | + | |
| 120 | + if (pcie_tph_get_cpu_st(irq->pdev, TPH_MEM_TYPE_VM, cpu_id, | |
| 121 | + &tag)) | |
| 122 | + return; | |
| 123 | + | |
| 124 | + if (pcie_tph_set_st_entry(irq->pdev, irq->msix_nr, tag)) | |
| 125 | + return; | |
| 126 | + } | |
| 127 | + | |
| 128 | +Disable TPH system-wide | |
| 129 | +----------------------- | |
| 130 | + | |
| 131 | +There is a kernel command line option available to control TPH feature: | |
| 132 | + * "notph": TPH will be disabled for all endpoint devices. | |
| @@ -18,8 +18,11 @@ set ``CONFIG_SECURITY_APPARMOR=y`` · 17 unmodified lines | ||
| 18 | 18 | |
| 19 | 19 | If AppArmor should be selected as the default security module then set:: |
| 20 | 20 | |
| 21 | − CONFIG_DEFAULT_SECURITY="apparmor" | |
| 22 | − CONFIG_SECURITY_APPARMOR_BOOTPARAM_VALUE=1 | |
| 21 | + CONFIG_DEFAULT_SECURITY_APPARMOR=y | |
| 22 | + | |
| 23 | +The CONFIG_LSM parameter manages the order and selection of LSMs. | |
| 24 | +Specify apparmor as the first "major" module (e.g. AppArmor, SELinux, Smack) | |
| 25 | +in the list. | |
| 23 | 26 | |
| 24 | 27 | Build the kernel |
| 25 | 28 | |
| @@ -174,6 +174,7 @@ is applicable:: · 173 unmodified lines | ||
| 174 | 174 | SCSI Appropriate SCSI support is enabled. |
| 175 | 175 | A lot of drivers have their options described inside |
| 176 | 176 | the Documentation/scsi/ sub-directory. |
| 177 | + SDW SoundWire support is enabled. | |
| 177 | 178 | SECURITY Different security models are enabled. |
| 178 | 179 | SELINUX SELinux support is enabled. |
| 179 | 180 | SERIAL Serial support is enabled. |
| @@ -4686,6 +4686,10 @@ · 4685 unmodified lines | ||
| 4686 | 4686 | nomio [S390] Do not use MIO instructions. |
| 4687 | 4687 | norid [S390] ignore the RID field and force use of |
| 4688 | 4688 | one PCI domain per PCI function |
| 4689 | + notph [PCIE] If the PCIE_TPH kernel config parameter | |
| 4690 | + is enabled, this kernel boot option can be used | |
| 4691 | + to disable PCIe TLP Processing Hints support | |
| 4692 | + system-wide. | |
| 4689 | 4693 | |
| 4690 | 4694 | pcie_aspm= [PCIE] Forcibly enable or ignore PCIe Active State Power |
| 4691 | 4695 | Management. |
| @@ -6071,6 +6075,10 @@ · 1379 unmodified lines | ||
| 6071 | 6075 | non-zero "wait" parameter. See weight_single |
| 6072 | 6076 | and weight_many. |
| 6073 | 6077 | |
| 6078 | + sdw_mclk_divider=[SDW] | |
| 6079 | + Specify the MCLK divider for Intel SoundWire buses in | |
| 6080 | + case the BIOS does not provide the clock rate properly. | |
| 6081 | + | |
| 6074 | 6082 | skew_tick= [KNL,EARLY] Offset the periodic timer tick per cpu to mitigate |
| 6075 | 6083 | xtime_lock contention on larger systems, and/or RCU lock |
| 6076 | 6084 | contention on all systems with CONFIG_MAXSMP set. |
| @@ -6158,6 +6166,16 @@ · 81 unmodified lines | ||
| 6158 | 6166 | For more information see Documentation/mm/slub.rst. |
| 6159 | 6167 | (slub_nomerge legacy name also accepted for now) |
| 6160 | 6168 | |
| 6169 | + slab_strict_numa [MM] | |
| 6170 | + Support memory policies on a per object level | |
| 6171 | + in the slab allocator. The default is for memory | |
| 6172 | + policies to be applied at the folio level when | |
| 6173 | + a new folio is needed or a partial folio is | |
| 6174 | + retrieved from the lists. Increases overhead | |
| 6175 | + in the slab fastpaths but gains more accurate | |
| 6176 | + NUMA kernel object placement which helps with slow | |
| 6177 | + interconnects in NUMA systems. | |
| 6178 | + | |
| 6161 | 6179 | slram= [HW,MTD] |
| 6162 | 6180 | |
| 6163 | 6181 | smart2= [HW] |
| @@ -20,6 +20,11 @@ Documentation/driver-api/media/index.rst · 19 unmodified lines | ||
| 20 | 20 | - for driver development information and Kernel APIs used by |
| 21 | 21 | media devices; |
| 22 | 22 | |
| 23 | +Documentation/process/debugging/media_specific_debugging_guide.rst | |
| 24 | + | |
| 25 | + - for advice about essential tools and techniques to debug drivers on this | |
| 26 | + subsystem | |
| 27 | + | |
| 23 | 28 | .. toctree:: |
| 24 | 29 | :caption: Table of Contents |
| 25 | 30 | :maxdepth: 2 |
| @@ -337,3 +337,13 @@ Each "watch" costs roughly 90 bytes on a 32-bit kernel, and roughly 160 bytes · 336 unmodified lines | ||
| 337 | 337 | on a 64-bit one. |
| 338 | 338 | The current default value for ``max_user_watches`` is 4% of the |
| 339 | 339 | available low memory, divided by the "watch" cost in bytes. |
| 340 | + | |
| 341 | +5. /proc/sys/fs/fuse - Configuration options for FUSE filesystems | |
| 342 | +===================================================================== | |
| 343 | + | |
| 344 | +This directory contains the following configuration options for FUSE | |
| 345 | +filesystems: | |
| 346 | + | |
| 347 | +``/proc/sys/fs/fuse/max_pages_limit`` is a read/write file for | |
| 348 | +setting/getting the maximum number of pages that can be used for servicing | |
| 349 | +requests in FUSE. | |
| @@ -401,6 +401,15 @@ The upper bound on the number of tasks that are checked. · 400 unmodified lines | ||
| 401 | 401 | This file shows up if ``CONFIG_DETECT_HUNG_TASK`` is enabled. |
| 402 | 402 | |
| 403 | 403 | |
| 404 | +hung_task_detect_count | |
| 405 | +====================== | |
| 406 | + | |
| 407 | +Indicates the total number of tasks that have been detected as hung since | |
| 408 | +the system boot. | |
| 409 | + | |
| 410 | +This file shows up if ``CONFIG_DETECT_HUNG_TASK`` is enabled. | |
| 411 | + | |
| 412 | + | |
| 404 | 413 | hung_task_timeout_secs |
| 405 | 414 | ====================== |
| 406 | 415 | |
| @@ -258,6 +258,8 @@ stable kernels. · 257 unmodified lines | ||
| 258 | 258 | | Hisilicon | Hip{08,09,10,10C| #162001900 | N/A | |
| 259 | 259 | | | ,11} SMMU PMCG | | | |
| 260 | 260 | +----------------+-----------------+-----------------+-----------------------------+ |
| 261 | +| Hisilicon | Hip09 | #162100801 | HISILICON_ERRATUM_162100801 | | |
| 262 | ++----------------+-----------------+-----------------+-----------------------------+ | |
| 261 | 263 | +----------------+-----------------+-----------------+-----------------------------+ |
| 262 | 264 | | Qualcomm Tech. | Kryo/Falkor v1 | E1003 | QCOM_FALKOR_ERRATUM_1003 | |
| 263 | 265 | +----------------+-----------------+-----------------+-----------------------------+ |
| @@ -239,6 +239,9 @@ The following keys are defined: · 238 unmodified lines | ||
| 239 | 239 | ratified in commit 98918c844281 ("Merge pull request #1217 from |
| 240 | 240 | riscv/zawrs") of riscv-isa-manual. |
| 241 | 241 | |
| 242 | + * :c:macro:`RISCV_HWPROBE_EXT_SUPM`: The Supm extension is supported as | |
| 243 | + defined in version 1.0 of the RISC-V Pointer Masking extensions. | |
| 244 | + | |
| 242 | 245 | * :c:macro:`RISCV_HWPROBE_KEY_CPUPERF_0`: Deprecated. Returns similar values to |
| 243 | 246 | :c:macro:`RISCV_HWPROBE_KEY_MISALIGNED_SCALAR_PERF`, but the key was |
| 244 | 247 | mistakenly classified as a bitmask rather than a value. |
| @@ -274,3 +277,19 @@ The following keys are defined: · 29 unmodified lines | ||
| 274 | 277 | represent the highest userspace virtual address usable. |
| 275 | 278 | |
| 276 | 279 | * :c:macro:`RISCV_HWPROBE_KEY_TIME_CSR_FREQ`: Frequency (in Hz) of `time CSR`. |
| 280 | + | |
| 281 | +* :c:macro:`RISCV_HWPROBE_KEY_MISALIGNED_VECTOR_PERF`: An enum value describing the | |
| 282 | + performance of misaligned vector accesses on the selected set of processors. | |
| 283 | + | |
| 284 | + * :c:macro:`RISCV_HWPROBE_MISALIGNED_VECTOR_UNKNOWN`: The performance of misaligned | |
| 285 | + vector accesses is unknown. | |
| 286 | + | |
| 287 | + * :c:macro:`RISCV_HWPROBE_MISALIGNED_VECTOR_SLOW`: 32-bit misaligned accesses using vector | |
| 288 | + registers are slower than the equivalent quantity of byte accesses via vector registers. | |
| 289 | + Misaligned accesses may be supported directly in hardware, or trapped and emulated by software. | |
| 290 | + | |
| 291 | + * :c:macro:`RISCV_HWPROBE_MISALIGNED_VECTOR_FAST`: 32-bit misaligned accesses using vector | |
| 292 | + registers are faster than the equivalent quantity of byte accesses via vector registers. | |
| 293 | + | |
| 294 | + * :c:macro:`RISCV_HWPROBE_MISALIGNED_VECTOR_UNSUPPORTED`: Misaligned vector accesses are | |
| 295 | + not supported at all and will generate a misaligned address fault. | |
| @@ -68,3 +68,19 @@ Misaligned accesses · 67 unmodified lines | ||
| 68 | 68 | Misaligned scalar accesses are supported in userspace, but they may perform |
| 69 | 69 | poorly. Misaligned vector accesses are only supported if the Zicclsm extension |
| 70 | 70 | is supported. |
| 71 | + | |
| 72 | +Pointer masking | |
| 73 | +--------------- | |
| 74 | + | |
| 75 | +Support for pointer masking in userspace (the Supm extension) is provided via | |
| 76 | +the ``PR_SET_TAGGED_ADDR_CTRL`` and ``PR_GET_TAGGED_ADDR_CTRL`` ``prctl()`` | |
| 77 | +operations. Pointer masking is disabled by default. To enable it, userspace | |
| 78 | +must call ``PR_SET_TAGGED_ADDR_CTRL`` with the ``PR_PMLEN`` field set to the | |
| 79 | +number of mask/tag bits needed by the application. ``PR_PMLEN`` is interpreted | |
| 80 | +as a lower bound; if the kernel is unable to satisfy the request, the | |
| 81 | +``PR_SET_TAGGED_ADDR_CTRL`` operation will fail. The actual number of tag bits | |
| 82 | +is returned in ``PR_PMLEN`` by the ``PR_GET_TAGGED_ADDR_CTRL`` operation. | |
| 83 | + | |
| 84 | +Additionally, when pointer masking is enabled (``PR_PMLEN`` is greater than 0), | |
| 85 | +a tagged address ABI is supported, with the same interface and behavior as | |
| 86 | +documented for AArch64 (Documentation/arch/arm64/tagged-address-abi.rst). | |
| @@ -896,10 +896,19 @@ Offset/size: 0x260/4 · 895 unmodified lines | ||
| 896 | 896 | |
| 897 | 897 | The kernel runtime start address is determined by the following algorithm:: |
| 898 | 898 | |
| 899 | − if (relocatable_kernel) | |
| 900 | − runtime_start = align_up(load_address, kernel_alignment) | |
| 901 | − else | |
| 902 | − runtime_start = pref_address | |
| 899 | + if (relocatable_kernel) { | |
| 900 | + if (load_address < pref_address) | |
| 901 | + load_address = pref_address; | |
| 902 | + runtime_start = align_up(load_address, kernel_alignment); | |
| 903 | + } else { | |
| 904 | + runtime_start = pref_address; | |
| 905 | + } | |
| 906 | + | |
| 907 | +Hence the necessary memory window location and size can be estimated by | |
| 908 | +a boot loader as:: | |
| 909 | + | |
| 910 | + memory_window_start = runtime_start; | |
| 911 | + memory_window_size = init_size; | |
| 903 | 912 | |
| 904 | 913 | ============ =============== |
| 905 | 914 | Field name: handover_offset |
| @@ -55,14 +55,16 @@ scope. · 54 unmodified lines | ||
| 55 | 55 | What about __vmalloc(GFP_NOFS) |
| 56 | 56 | ============================== |
| 57 | 57 | |
| 58 | −vmalloc doesn't support GFP_NOFS semantic because there are hardcoded | |
| 59 | −GFP_KERNEL allocations deep inside the allocator which are quite non-trivial | |
| 60 | −to fix up. That means that calling ``vmalloc`` with GFP_NOFS/GFP_NOIO is | |
| 61 | −almost always a bug. The good news is that the NOFS/NOIO semantic can be | |
| 62 | −achieved by the scope API. | |
| 58 | +Since v5.17, and specifically after the commit 451769ebb7e79 ("mm/vmalloc: | |
| 59 | +alloc GFP_NO{FS,IO} for vmalloc"), GFP_NOFS/GFP_NOIO are now supported in | |
| 60 | +``[k]vmalloc`` by implicitly using scope API. | |
| 61 | + | |
| 62 | +In earlier kernels ``vmalloc`` didn't support GFP_NOFS semantic because there | |
| 63 | +were hardcoded GFP_KERNEL allocations deep inside the allocator. That means | |
| 64 | +that calling ``vmalloc`` with GFP_NOFS/GFP_NOIO was almost always a bug. | |
| 63 | 65 | |
| 64 | 66 | In the ideal world, upper layers should already mark dangerous contexts |
| 65 | −and so no special care is required and vmalloc should be called without | |
| 66 | −any problems. Sometimes if the context is not really clear or there are | |
| 67 | −layering violations then the recommended way around that is to wrap ``vmalloc`` | |
| 68 | −by the scope API with a comment explaining the problem. | |
| 67 | +and so no special care is required and ``vmalloc`` should be called without any | |
| 68 | +problems. Sometimes if the context is not really clear or there are layering | |
| 69 | +violations then the recommended way around that (on pre-v5.17 kernels) is to | |
| 70 | +wrap ``vmalloc`` by the scope API with a comment explaining the problem. | |
| @@ -52,6 +52,7 @@ Library functionality that is used throughout the kernel. · 51 unmodified lines | ||
| 52 | 52 | wrappers/atomic_bitops |
| 53 | 53 | floating-point |
| 54 | 54 | union_find |
| 55 | + min_heap | |
| 55 | 56 | |
| 56 | 57 | Low level entry and exit |
| 57 | 58 | ======================== |
| @@ -0,0 +1,300 @@ | ||
| 1 | +.. SPDX-License-Identifier: GPL-2.0 | |
| 2 | + | |
| 3 | +============ | |
| 4 | +Min Heap API | |
| 5 | +============ | |
| 6 | + | |
| 7 | +Introduction | |
| 8 | +============ | |
| 9 | + | |
| 10 | +The Min Heap API provides a set of functions and macros for managing min-heaps | |
| 11 | +in the Linux kernel. A min-heap is a binary tree structure where the value of | |
| 12 | +each node is less than or equal to the values of its children, ensuring that | |
| 13 | +the smallest element is always at the root. | |
| 14 | + | |
| 15 | +This document provides a guide to the Min Heap API, detailing how to define and | |
| 16 | +use min-heaps. Users should not directly call functions with **__min_heap_*()** | |
| 17 | +prefixes, but should instead use the provided macro wrappers. | |
| 18 | + | |
| 19 | +In addition to the standard version of the functions, the API also includes a | |
| 20 | +set of inline versions for performance-critical scenarios. These inline | |
| 21 | +functions have the same names as their non-inline counterparts but include an | |
| 22 | +**_inline** suffix. For example, **__min_heap_init_inline** and its | |
| 23 | +corresponding macro wrapper **min_heap_init_inline**. The inline versions allow | |
| 24 | +custom comparison and swap functions to be called directly, rather than through | |
| 25 | +indirect function calls. This can significantly reduce overhead, especially | |
| 26 | +when CONFIG_MITIGATION_RETPOLINE is enabled, as indirect function calls become | |
| 27 | +more expensive. As with the non-inline versions, it is important to use the | |
| 28 | +macro wrappers for inline functions instead of directly calling the functions | |
| 29 | +themselves. | |
| 30 | + | |
| 31 | +Data Structures | |
| 32 | +=============== | |
| 33 | + | |
| 34 | +Min-Heap Definition | |
| 35 | +------------------- | |
| 36 | + | |
| 37 | +The core data structure for representing a min-heap is defined using the | |
| 38 | +**MIN_HEAP_PREALLOCATED** and **DEFINE_MIN_HEAP** macros. These macros allow | |
| 39 | +you to define a min-heap with a preallocated buffer or dynamically allocated | |
| 40 | +memory. | |
| 41 | + | |
| 42 | +Example: | |
| 43 | + | |
| 44 | +.. code-block:: c | |
| 45 | + | |
| 46 | + #define MIN_HEAP_PREALLOCATED(_type, _name, _nr) | |
| 47 | + struct _name { | |
| 48 | + int nr; /* Number of elements in the heap */ | |
| 49 | + int size; /* Maximum number of elements that can be held */ | |
| 50 | + _type *data; /* Pointer to the heap data */ | |
| 51 | + _type preallocated[_nr]; /* Static preallocated array */ | |
| 52 | + } | |
| 53 | + | |
| 54 | + #define DEFINE_MIN_HEAP(_type, _name) MIN_HEAP_PREALLOCATED(_type, _name, 0) | |
| 55 | + | |
| 56 | +A typical heap structure will include a counter for the number of elements | |
| 57 | +(`nr`), the maximum capacity of the heap (`size`), and a pointer to an array of | |
| 58 | +elements (`data`). Optionally, you can specify a static array for preallocated | |
| 59 | +heap storage using **MIN_HEAP_PREALLOCATED**. | |
| 60 | + | |
| 61 | +Min Heap Callbacks | |
| 62 | +------------------ | |
| 63 | + | |
| 64 | +The **struct min_heap_callbacks** provides customization options for ordering | |
| 65 | +elements in the heap and swapping them. It contains two function pointers: | |
| 66 | + | |
| 67 | +.. code-block:: c | |
| 68 | + | |
| 69 | + struct min_heap_callbacks { | |
| 70 | + bool (*less)(const void *lhs, const void *rhs, void *args); | |
| 71 | + void (*swp)(void *lhs, void *rhs, void *args); | |
| 72 | + }; | |
| 73 | + | |
| 74 | +- **less** is the comparison function used to establish the order of elements. | |
| 75 | +- **swp** is a function for swapping elements in the heap. If swp is set to | |
| 76 | + NULL, the default swap function will be used, which swaps the elements based on their size | |
| 77 | + | |
| 78 | +Macro Wrappers | |
| 79 | +============== | |
| 80 | + | |
| 81 | +The following macro wrappers are provided for interacting with the heap in a | |
| 82 | +user-friendly manner. Each macro corresponds to a function that operates on the | |
| 83 | +heap, and they abstract away direct calls to internal functions. | |
| 84 | + | |
| 85 | +Each macro accepts various parameters that are detailed below. | |
| 86 | + | |
| 87 | +Heap Initialization | |
| 88 | +-------------------- | |
| 89 | + | |
| 90 | +.. code-block:: c | |
| 91 | + | |
| 92 | + min_heap_init(heap, data, size); | |
| 93 | + | |
| 94 | +- **heap**: A pointer to the min-heap structure to be initialized. | |
| 95 | +- **data**: A pointer to the buffer where the heap elements will be stored. If | |
| 96 | + `NULL`, the preallocated buffer within the heap structure will be used. | |
| 97 | +- **size**: The maximum number of elements the heap can hold. | |
| 98 | + | |
| 99 | +This macro initializes the heap, setting its initial state. If `data` is | |
| 100 | +`NULL`, the preallocated memory inside the heap structure will be used for | |
| 101 | +storage. Otherwise, the user-provided buffer is used. The operation is **O(1)**. | |
| 102 | + | |
| 103 | +**Inline Version:** min_heap_init_inline(heap, data, size) | |
| 104 | + | |
| 105 | +Accessing the Top Element | |
| 106 | +------------------------- | |
| 107 | + | |
| 108 | +.. code-block:: c | |
| 109 | + | |
| 110 | + element = min_heap_peek(heap); | |
| 111 | + | |
| 112 | +- **heap**: A pointer to the min-heap from which to retrieve the smallest | |
| 113 | + element. | |
| 114 | + | |
| 115 | +This macro returns a pointer to the smallest element (the root) of the heap, or | |
| 116 | +`NULL` if the heap is empty. The operation is **O(1)**. | |
| 117 | + | |
| 118 | +**Inline Version:** min_heap_peek_inline(heap) | |
| 119 | + | |
| 120 | +Heap Insertion | |
| 121 | +-------------- | |
| 122 | + | |
| 123 | +.. code-block:: c | |
| 124 | + | |
| 125 | + success = min_heap_push(heap, element, callbacks, args); | |
| 126 | + | |
| 127 | +- **heap**: A pointer to the min-heap into which the element should be inserted. | |
| 128 | +- **element**: A pointer to the element to be inserted into the heap. | |
| 129 | +- **callbacks**: A pointer to a `struct min_heap_callbacks` providing the | |
| 130 | + `less` and `swp` functions. | |
| 131 | +- **args**: Optional arguments passed to the `less` and `swp` functions. | |
| 132 | + | |
| 133 | +This macro inserts an element into the heap. It returns `true` if the insertion | |
| 134 | +was successful and `false` if the heap is full. The operation is **O(log n)**. | |
| 135 | + | |
| 136 | +**Inline Version:** min_heap_push_inline(heap, element, callbacks, args) | |
| 137 | + | |
| 138 | +Heap Removal | |
| 139 | +------------ | |
| 140 | + | |
| 141 | +.. code-block:: c | |
| 142 | + | |
| 143 | + success = min_heap_pop(heap, callbacks, args); | |
| 144 | + | |
| 145 | +- **heap**: A pointer to the min-heap from which to remove the smallest element. | |
| 146 | +- **callbacks**: A pointer to a `struct min_heap_callbacks` providing the | |
| 147 | + `less` and `swp` functions. | |
| 148 | +- **args**: Optional arguments passed to the `less` and `swp` functions. | |
| 149 | + | |
| 150 | +This macro removes the smallest element (the root) from the heap. It returns | |
| 151 | +`true` if the element was successfully removed, or `false` if the heap is | |
| 152 | +empty. The operation is **O(log n)**. | |
| 153 | + | |
| 154 | +**Inline Version:** min_heap_pop_inline(heap, callbacks, args) | |
| 155 | + | |
| 156 | +Heap Maintenance | |
| 157 | +---------------- | |
| 158 | + | |
| 159 | +You can use the following macros to maintain the heap's structure: | |
| 160 | + | |
| 161 | +.. code-block:: c | |
| 162 | + | |
| 163 | + min_heap_sift_down(heap, pos, callbacks, args); | |
| 164 | + | |
| 165 | +- **heap**: A pointer to the min-heap. | |
| 166 | +- **pos**: The index from which to start sifting down. | |
| 167 | +- **callbacks**: A pointer to a `struct min_heap_callbacks` providing the | |
| 168 | + `less` and `swp` functions. | |
| 169 | +- **args**: Optional arguments passed to the `less` and `swp` functions. | |
| 170 | + | |
| 171 | +This macro restores the heap property by moving the element at the specified | |
| 172 | +index (`pos`) down the heap until it is in the correct position. The operation | |
| 173 | +is **O(log n)**. | |
| 174 | + | |
| 175 | +**Inline Version:** min_heap_sift_down_inline(heap, pos, callbacks, args) | |
| 176 | + | |
| 177 | +.. code-block:: c | |
| 178 | + | |
| 179 | + min_heap_sift_up(heap, idx, callbacks, args); | |
| 180 | + | |
| 181 | +- **heap**: A pointer to the min-heap. | |
| 182 | +- **idx**: The index of the element to sift up. | |
| 183 | +- **callbacks**: A pointer to a `struct min_heap_callbacks` providing the | |
| 184 | + `less` and `swp` functions. | |
| 185 | +- **args**: Optional arguments passed to the `less` and `swp` functions. | |
| 186 | + | |
| 187 | +This macro restores the heap property by moving the element at the specified | |
| 188 | +index (`idx`) up the heap. The operation is **O(log n)**. | |
| 189 | + | |
| 190 | +**Inline Version:** min_heap_sift_up_inline(heap, idx, callbacks, args) | |
| 191 | + | |
| 192 | +.. code-block:: c | |
| 193 | + | |
| 194 | + min_heapify_all(heap, callbacks, args); | |
| 195 | + | |
| 196 | +- **heap**: A pointer to the min-heap. | |
| 197 | +- **callbacks**: A pointer to a `struct min_heap_callbacks` providing the | |
| 198 | + `less` and `swp` functions. | |
| 199 | +- **args**: Optional arguments passed to the `less` and `swp` functions. | |
| 200 | + | |
| 201 | +This macro ensures that the entire heap satisfies the heap property. It is | |
| 202 | +called when the heap is built from scratch or after many modifications. The | |
| 203 | +operation is **O(n)**. | |
| 204 | + | |
| 205 | +**Inline Version:** min_heapify_all_inline(heap, callbacks, args) | |
| 206 | + | |
| 207 | +Removing Specific Elements | |
| 208 | +-------------------------- | |
| 209 | + | |
| 210 | +.. code-block:: c | |
| 211 | + | |
| 212 | + success = min_heap_del(heap, idx, callbacks, args); | |
| 213 | + | |
| 214 | +- **heap**: A pointer to the min-heap. | |
| 215 | +- **idx**: The index of the element to delete. | |
| 216 | +- **callbacks**: A pointer to a `struct min_heap_callbacks` providing the | |
| 217 | + `less` and `swp` functions. | |
| 218 | +- **args**: Optional arguments passed to the `less` and `swp` functions. | |
| 219 | + | |
| 220 | +This macro removes an element at the specified index (`idx`) from the heap and | |
| 221 | +restores the heap property. The operation is **O(log n)**. | |
| 222 | + | |
| 223 | +**Inline Version:** min_heap_del_inline(heap, idx, callbacks, args) | |
| 224 | + | |
| 225 | +Other Utilities | |
| 226 | +=============== | |
| 227 | + | |
| 228 | +- **min_heap_full(heap)**: Checks whether the heap is full. | |
| 229 | + Complexity: **O(1)**. | |
| 230 | + | |
| 231 | +.. code-block:: c | |
| 232 | + | |
| 233 | + bool full = min_heap_full(heap); | |
| 234 | + | |
| 235 | +- `heap`: A pointer to the min-heap to check. | |
| 236 | + | |
| 237 | +This macro returns `true` if the heap is full, otherwise `false`. | |
| 238 | + | |
| 239 | +**Inline Version:** min_heap_full_inline(heap) | |
| 240 | + | |
| 241 | +- **min_heap_empty(heap)**: Checks whether the heap is empty. | |
| 242 | + Complexity: **O(1)**. | |
| 243 | + | |
| 244 | +.. code-block:: c | |
| 245 | + | |
| 246 | + bool empty = min_heap_empty(heap); | |
| 247 | + | |
| 248 | +- `heap`: A pointer to the min-heap to check. | |
| 249 | + | |
| 250 | +This macro returns `true` if the heap is empty, otherwise `false`. | |
| 251 | + | |
| 252 | +**Inline Version:** min_heap_empty_inline(heap) | |
| 253 | + | |
| 254 | +Example Usage | |
| 255 | +============= | |
| 256 | + | |
| 257 | +An example usage of the min-heap API would involve defining a heap structure, | |
| 258 | +initializing it, and inserting and removing elements as needed. | |
| 259 | + | |
| 260 | +.. code-block:: c | |
| 261 | + | |
| 262 | + #include <linux/min_heap.h> | |
| 263 | + | |
| 264 | + int my_less_function(const void *lhs, const void *rhs, void *args) { | |
| 265 | + return (*(int *)lhs < *(int *)rhs); | |
| 266 | + } | |
| 267 | + | |
| 268 | + struct min_heap_callbacks heap_cb = { | |
| 269 | + .less = my_less_function, /* Comparison function for heap order */ | |
| 270 | + .swp = NULL, /* Use default swap function */ | |
| 271 | + }; | |
| 272 | + | |
| 273 | + void example_usage(void) { | |
| 274 | + /* Pre-populate the buffer with elements */ | |
| 275 | + int buffer[5] = {5, 2, 8, 1, 3}; | |
| 276 | + /* Declare a min-heap */ | |
| 277 | + DEFINE_MIN_HEAP(int, my_heap); | |
| 278 | + | |
| 279 | + /* Initialize the heap with preallocated buffer and size */ | |
| 280 | + min_heap_init(&my_heap, buffer, 5); | |
| 281 | + | |
| 282 | + /* Build the heap using min_heapify_all */ | |
| 283 | + my_heap.nr = 5; /* Set the number of elements in the heap */ | |
| 284 | + min_heapify_all(&my_heap, &heap_cb, NULL); | |
| 285 | + | |
| 286 | + /* Peek at the top element (should be 1 in this case) */ | |
| 287 | + int *top = min_heap_peek(&my_heap); | |
| 288 | + pr_info("Top element: %d\n", *top); | |
| 289 | + | |
| 290 | + /* Pop the top element (1) and get the new top (2) */ | |
| 291 | + min_heap_pop(&my_heap, &heap_cb, NULL); | |
| 292 | + top = min_heap_peek(&my_heap); | |
| 293 | + pr_info("New top element: %d\n", *top); | |
| 294 | + | |
| 295 | + /* Insert a new element (0) and recheck the top */ | |
| 296 | + int new_element = 0; | |
| 297 | + min_heap_push(&my_heap, &new_element, &heap_cb, NULL); | |
| 298 | + top = min_heap_peek(&my_heap); | |
| 299 | + pr_info("Top element after insertion: %d\n", *top); | |
| 300 | + } | |
| @@ -46,7 +46,7 @@ Please note that due to macro expansion that argument needs to be a · 45 unmodified lines | ||
| 46 | 46 | preprocessor symbol. E.g. to export the symbol ``usb_stor_suspend`` into the |
| 47 | 47 | namespace ``USB_STORAGE``, use:: |
| 48 | 48 | |
| 49 | − EXPORT_SYMBOL_NS(usb_stor_suspend, USB_STORAGE); | |
| 49 | + EXPORT_SYMBOL_NS(usb_stor_suspend, "USB_STORAGE"); | |
| 50 | 50 | |
| 51 | 51 | The corresponding ksymtab entry struct ``kernel_symbol`` will have the member |
| 52 | 52 | ``namespace`` set accordingly. A symbol that is exported without a namespace will |
| @@ -68,7 +68,7 @@ is to define the default namespace in the ``Makefile`` of the subsystem. E.g. to · 15 unmodified lines | ||
| 68 | 68 | export all symbols defined in usb-common into the namespace USB_COMMON, add a |
| 69 | 69 | line like this to drivers/usb/common/Makefile:: |
| 70 | 70 | |
| 71 | − ccflags-y += -DDEFAULT_SYMBOL_NAMESPACE=USB_COMMON | |
| 71 | + ccflags-y += -DDEFAULT_SYMBOL_NAMESPACE='"USB_COMMON"' | |
| 72 | 72 | |
| 73 | 73 | That will affect all EXPORT_SYMBOL() and EXPORT_SYMBOL_GPL() statements. A |
| 74 | 74 | symbol exported with EXPORT_SYMBOL_NS() while this definition is present, will |
| @@ -79,7 +79,7 @@ A second option to define the default namespace is directly in the compilation · 4 unmodified lines | ||
| 79 | 79 | unit as preprocessor statement. The above example would then read:: |
| 80 | 80 | |
| 81 | 81 | #undef DEFAULT_SYMBOL_NAMESPACE |
| 82 | − #define DEFAULT_SYMBOL_NAMESPACE USB_COMMON | |
| 82 | + #define DEFAULT_SYMBOL_NAMESPACE "USB_COMMON" | |
| 83 | 83 | |
| 84 | 84 | within the corresponding compilation unit before any EXPORT_SYMBOL macro is |
| 85 | 85 | used. |
| @@ -94,7 +94,7 @@ for the namespaces it uses symbols from. E.g. a module using the · 8 unmodified lines | ||
| 94 | 94 | usb_stor_suspend symbol from above, needs to import the namespace USB_STORAGE |
| 95 | 95 | using a statement like:: |
| 96 | 96 | |
| 97 | − MODULE_IMPORT_NS(USB_STORAGE); | |
| 97 | + MODULE_IMPORT_NS("USB_STORAGE"); | |
| 98 | 98 | |
| 99 | 99 | This will create a ``modinfo`` tag in the module for each imported namespace. |
| 100 | 100 | This has the side effect, that the imported namespaces of a module can be |
| @@ -0,0 +1,168 @@ | ||
| 1 | +.. SPDX-License-Identifier: GPL-2.0 | |
| 2 | + | |
| 3 | +=================================== | |
| 4 | +Using AutoFDO with the Linux kernel | |
| 5 | +=================================== | |
| 6 | + | |
| 7 | +This enables AutoFDO build support for the kernel when using | |
| 8 | +the Clang compiler. AutoFDO (Auto-Feedback-Directed Optimization) | |
| 9 | +is a type of profile-guided optimization (PGO) used to enhance the | |
| 10 | +performance of binary executables. It gathers information about the | |
| 11 | +frequency of execution of various code paths within a binary using | |
| 12 | +hardware sampling. This data is then used to guide the compiler's | |
| 13 | +optimization decisions, resulting in a more efficient binary. AutoFDO | |
| 14 | +is a powerful optimization technique, and data indicates that it can | |
| 15 | +significantly improve kernel performance. It's especially beneficial | |
| 16 | +for workloads affected by front-end stalls. | |
| 17 | + | |
| 18 | +For AutoFDO builds, unlike non-FDO builds, the user must supply a | |
| 19 | +profile. Acquiring an AutoFDO profile can be done in several ways. | |
| 20 | +AutoFDO profiles are created by converting hardware sampling using | |
| 21 | +the "perf" tool. It is crucial that the workload used to create these | |
| 22 | +perf files is representative; they must exhibit runtime | |
| 23 | +characteristics similar to the workloads that are intended to be | |
| 24 | +optimized. Failure to do so will result in the compiler optimizing | |
| 25 | +for the wrong objective. | |
| 26 | + | |
| 27 | +The AutoFDO profile often encapsulates the program's behavior. If the | |
| 28 | +performance-critical codes are architecture-independent, the profile | |
| 29 | +can be applied across platforms to achieve performance gains. For | |
| 30 | +instance, using the profile generated on Intel architecture to build | |
| 31 | +a kernel for AMD architecture can also yield performance improvements. | |
| 32 | + | |
| 33 | +There are two methods for acquiring a representative profile: | |
| 34 | +(1) Sample real workloads using a production environment. | |
| 35 | +(2) Generate the profile using a representative load test. | |
| 36 | +When enabling the AutoFDO build configuration without providing an | |
| 37 | +AutoFDO profile, the compiler only modifies the dwarf information in | |
| 38 | +the kernel without impacting runtime performance. It's advisable to | |
| 39 | +use a kernel binary built with the same AutoFDO configuration to | |
| 40 | +collect the perf profile. While it's possible to use a kernel built | |
| 41 | +with different options, it may result in inferior performance. | |
| 42 | + | |
| 43 | +One can collect profiles using AutoFDO build for the previous kernel. | |
| 44 | +AutoFDO employs relative line numbers to match the profiles, offering | |
| 45 | +some tolerance for source changes. This mode is commonly used in a | |
| 46 | +production environment for profile collection. | |
| 47 | + | |
| 48 | +In a profile collection based on a load test, the AutoFDO collection | |
| 49 | +process consists of the following steps: | |
| 50 | + | |
| 51 | +#. Initial build: The kernel is built with AutoFDO options | |
| 52 | + without a profile. | |
| 53 | + | |
| 54 | +#. Profiling: The above kernel is then run with a representative | |
| 55 | + workload to gather execution frequency data. This data is | |
| 56 | + collected using hardware sampling, via perf. AutoFDO is most | |
| 57 | + effective on platforms supporting advanced PMU features like | |
| 58 | + LBR on Intel machines. | |
| 59 | + | |
| 60 | +#. AutoFDO profile generation: Perf output file is converted to | |
| 61 | + the AutoFDO profile via offline tools. | |
| 62 | + | |
| 63 | +The support requires a Clang compiler LLVM 17 or later. | |
| 64 | + | |
| 65 | +Preparation | |
| 66 | +=========== | |
| 67 | + | |
| 68 | +Configure the kernel with:: | |
| 69 | + | |
| 70 | + CONFIG_AUTOFDO_CLANG=y | |
| 71 | + | |
| 72 | +Customization | |
| 73 | +============= | |
| 74 | + | |
| 75 | +The default CONFIG_AUTOFDO_CLANG setting covers kernel space objects for | |
| 76 | +AutoFDO builds. One can, however, enable or disable AutoFDO build for | |
| 77 | +individual files and directories by adding a line similar to the following | |
| 78 | +to the respective kernel Makefile: | |
| 79 | + | |
| 80 | +- For enabling a single file (e.g. foo.o) :: | |
| 81 | + | |
| 82 | + AUTOFDO_PROFILE_foo.o := y | |
| 83 | + | |
| 84 | +- For enabling all files in one directory :: | |
| 85 | + | |
| 86 | + AUTOFDO_PROFILE := y | |
| 87 | + | |
| 88 | +- For disabling one file :: | |
| 89 | + | |
| 90 | + AUTOFDO_PROFILE_foo.o := n | |
| 91 | + | |
| 92 | +- For disabling all files in one directory :: | |
| 93 | + | |
| 94 | + AUTOFDO_PROFILE := n | |
| 95 | + | |
| 96 | +Workflow | |
| 97 | +======== | |
| 98 | + | |
| 99 | +Here is an example workflow for AutoFDO kernel: | |
| 100 | + | |
| 101 | +1) Build the kernel on the host machine with LLVM enabled, | |
| 102 | + for example, :: | |
| 103 | + | |
| 104 | + $ make menuconfig LLVM=1 | |
| 105 | + | |
| 106 | + Turn on AutoFDO build config:: | |
| 107 | + | |
| 108 | + CONFIG_AUTOFDO_CLANG=y | |
| 109 | + | |
| 110 | + With a configuration that with LLVM enabled, use the following command:: | |
| 111 | + | |
| 112 | + $ scripts/config -e AUTOFDO_CLANG | |
| 113 | + | |
| 114 | + After getting the config, build with :: | |
| 115 | + | |
| 116 | + $ make LLVM=1 | |
| 117 | + | |
| 118 | +2) Install the kernel on the test machine. | |
| 119 | + | |
| 120 | +3) Run the load tests. The '-c' option in perf specifies the sample | |
| 121 | + event period. We suggest using a suitable prime number, like 500009, | |
| 122 | + for this purpose. | |
| 123 | + | |
| 124 | + - For Intel platforms:: | |
| 125 | + | |
| 126 | + $ perf record -e BR_INST_RETIRED.NEAR_TAKEN:k -a -N -b -c <count> -o <perf_file> -- <loadtest> | |
| 127 | + | |
| 128 | + - For AMD platforms: | |
| 129 | + | |
| 130 | + The supported systems are: Zen3 with BRS, or Zen4 with amd_lbr_v2. To check, | |
| 131 | + | |
| 132 | + For Zen3:: | |
| 133 | + | |
| 134 | + $ cat proc/cpuinfo | grep " brs" | |
| 135 | + | |
| 136 | + For Zen4:: | |
| 137 | + | |
| 138 | + $ cat proc/cpuinfo | grep amd_lbr_v2 | |
| 139 | + | |
| 140 | + The following command generated the perf data file:: | |
| 141 | + | |
| 142 | + $ perf record --pfm-events RETIRED_TAKEN_BRANCH_INSTRUCTIONS:k -a -N -b -c <count> -o <perf_file> -- <loadtest> | |
| 143 | + | |
| 144 | +4) (Optional) Download the raw perf file to the host machine. | |
| 145 | + | |
| 146 | +5) To generate an AutoFDO profile, two offline tools are available: | |
| 147 | + create_llvm_prof and llvm_profgen. The create_llvm_prof tool is part | |
| 148 | + of the AutoFDO project and can be found on GitHub | |
| 149 | + (https://github.com/google/autofdo), version v0.30.1 or later. | |
| 150 | + The llvm_profgen tool is included in the LLVM compiler itself. It's | |
| 151 | + important to note that the version of llvm_profgen doesn't need to match | |
| 152 | + the version of Clang. It needs to be the LLVM 19 release of Clang | |
| 153 | + or later, or just from the LLVM trunk. :: | |
| 154 | + | |
| 155 | + $ llvm-profgen --kernel --binary=<vmlinux> --perfdata=<perf_file> -o <profile_file> | |
| 156 | + | |
| 157 | + or :: | |
| 158 | + | |
| 159 | + $ create_llvm_prof --binary=<vmlinux> --profile=<perf_file> --format=extbinary --out=<profile_file> | |
| 160 | + | |
| 161 | + Note that multiple AutoFDO profile files can be merged into one via:: | |
| 162 | + | |
| 163 | + $ llvm-profdata merge -o <profile_file> <profile_1> <profile_2> ... <profile_n> | |
| 164 | + | |
| 165 | +6) Rebuild the kernel using the AutoFDO profile file with the same config as step 1, | |
| 166 | + (Note CONFIG_AUTOFDO_CLANG needs to be enabled):: | |
| 167 | + | |
| 168 | + $ make LLVM=1 CLANG_AUTOFDO_PROFILE=<profile_file> | |
| @@ -250,25 +250,17 @@ variables for .cocciconfig is as follows: · 249 unmodified lines | ||
| 250 | 250 | - Your directory from which spatch is called is processed next |
| 251 | 251 | - The directory provided with the ``--dir`` option is processed last, if used |
| 252 | 252 | |
| 253 | −Since coccicheck runs through make, it naturally runs from the kernel | |
| 254 | −proper dir; as such the second rule above would be implied for picking up a | |
| 255 | −.cocciconfig when using ``make coccicheck``. | |
| 256 | − | |
| 257 | 253 | ``make coccicheck`` also supports using M= targets. If you do not supply |
| 258 | 254 | any M= target, it is assumed you want to target the entire kernel. |
| 259 | 255 | The kernel coccicheck script has:: |
| 260 | 256 | |
| 261 | − if [ "$KBUILD_EXTMOD" = "" ] ; then | |
| 262 | − OPTIONS="--dir $srctree $COCCIINCLUDE" | |
| 263 | − else | |
| 264 | − OPTIONS="--dir $KBUILD_EXTMOD $COCCIINCLUDE" | |
| 265 | − fi | |
| 266 | − | |
| 267 | −KBUILD_EXTMOD is set when an explicit target with M= is used. For both cases | |
| 268 | −the spatch ``--dir`` argument is used, as such third rule applies when whether | |
| 269 | −M= is used or not, and when M= is used the target directory can have its own | |
| 270 | −.cocciconfig file. When M= is not passed as an argument to coccicheck the | |
| 271 | −target directory is the same as the directory from where spatch was called. | |
| 257 | + OPTIONS="--dir $srcroot $COCCIINCLUDE" | |
| 258 | + | |
| 259 | +Here, $srcroot refers to the source directory of the target: it points to the | |
| 260 | +external module's source directory when M= used, and otherwise, to the kernel | |
| 261 | +source directory. The third rule ensures the spatch reads the .cocciconfig from | |
| 262 | +the target directory, allowing external modules to have their own .cocciconfig | |
| 263 | +file. | |
| 272 | 264 | |
| 273 | 265 | If not using the kernel's coccicheck target, keep the above precedence |
| 274 | 266 | order logic of .cocciconfig reading. If using the kernel's coccicheck target, |
| @@ -34,6 +34,8 @@ Documentation/dev-tools/testing-overview.rst · 33 unmodified lines | ||
| 34 | 34 | ktap |
| 35 | 35 | checkuapi |
| 36 | 36 | gpio-sloppy-logic-analyzer |
| 37 | + autofdo | |
| 38 | + propeller | |
| 37 | 39 | |
| 38 | 40 | |
| 39 | 41 | .. only:: subproject and html |
| @@ -0,0 +1,162 @@ | ||
| 1 | +.. SPDX-License-Identifier: GPL-2.0 | |
| 2 | + | |
| 3 | +===================================== | |
| 4 | +Using Propeller with the Linux kernel | |
| 5 | +===================================== | |
| 6 | + | |
| 7 | +This enables Propeller build support for the kernel when using Clang | |
| 8 | +compiler. Propeller is a profile-guided optimization (PGO) method used | |
| 9 | +to optimize binary executables. Like AutoFDO, it utilizes hardware | |
| 10 | +sampling to gather information about the frequency of execution of | |
| 11 | +different code paths within a binary. Unlike AutoFDO, this information | |
| 12 | +is then used right before linking phase to optimize (among others) | |
| 13 | +block layout within and across functions. | |
| 14 | + | |
| 15 | +A few important notes about adopting Propeller optimization: | |
| 16 | + | |
| 17 | +#. Although it can be used as a standalone optimization step, it is | |
| 18 | + strongly recommended to apply Propeller on top of AutoFDO, | |
| 19 | + AutoFDO+ThinLTO or Instrument FDO. The rest of this document | |
| 20 | + assumes this paradigm. | |
| 21 | + | |
| 22 | +#. Propeller uses another round of profiling on top of | |
| 23 | + AutoFDO/AutoFDO+ThinLTO/iFDO. The whole build process involves | |
| 24 | + "build-afdo - train-afdo - build-propeller - train-propeller - | |
| 25 | + build-optimized". | |
| 26 | + | |
| 27 | +#. Propeller requires LLVM 19 release or later for Clang/Clang++ | |
| 28 | + and the linker(ld.lld). | |
| 29 | + | |
| 30 | +#. In addition to LLVM toolchain, Propeller requires a profiling | |
| 31 | + conversion tool: https://github.com/google/autofdo with a release | |
| 32 | + after v0.30.1: https://github.com/google/autofdo/releases/tag/v0.30.1. | |
| 33 | + | |
| 34 | +The Propeller optimization process involves the following steps: | |
| 35 | + | |
| 36 | +#. Initial building: Build the AutoFDO or AutoFDO+ThinLTO binary as | |
| 37 | + you would normally do, but with a set of compile-time / link-time | |
| 38 | + flags, so that a special metadata section is created within the | |
| 39 | + kernel binary. The special section is only intend to be used by the | |
| 40 | + profiling tool, it is not part of the runtime image, nor does it | |
| 41 | + change kernel run time text sections. | |
| 42 | + | |
| 43 | +#. Profiling: The above kernel is then run with a representative | |
| 44 | + workload to gather execution frequency data. This data is collected | |
| 45 | + using hardware sampling, via perf. Propeller is most effective on | |
| 46 | + platforms supporting advanced PMU features like LBR on Intel | |
| 47 | + machines. This step is the same as profiling the kernel for AutoFDO | |
| 48 | + (the exact perf parameters can be different). | |
| 49 | + | |
| 50 | +#. Propeller profile generation: Perf output file is converted to a | |
| 51 | + pair of Propeller profiles via an offline tool. | |
| 52 | + | |
| 53 | +#. Optimized build: Build the AutoFDO or AutoFDO+ThinLTO optimized | |
| 54 | + binary as you would normally do, but with a compile-time / | |
| 55 | + link-time flag to pick up the Propeller compile time and link time | |
| 56 | + profiles. This build step uses 3 profiles - the AutoFDO profile, | |
| 57 | + the Propeller compile-time profile and the Propeller link-time | |
| 58 | + profile. | |
| 59 | + | |
| 60 | +#. Deployment: The optimized kernel binary is deployed and used | |
| 61 | + in production environments, providing improved performance | |
| 62 | + and reduced latency. | |
| 63 | + | |
| 64 | +Preparation | |
| 65 | +=========== | |
| 66 | + | |
| 67 | +Configure the kernel with:: | |
| 68 | + | |
| 69 | + CONFIG_AUTOFDO_CLANG=y | |
| 70 | + CONFIG_PROPELLER_CLANG=y | |
| 71 | + | |
| 72 | +Customization | |
| 73 | +============= | |
| 74 | + | |
| 75 | +The default CONFIG_PROPELLER_CLANG setting covers kernel space objects | |
| 76 | +for Propeller builds. One can, however, enable or disable Propeller build | |
| 77 | +for individual files and directories by adding a line similar to the | |
| 78 | +following to the respective kernel Makefile: | |
| 79 | + | |
| 80 | +- For enabling a single file (e.g. foo.o):: | |
| 81 | + | |
| 82 | + PROPELLER_PROFILE_foo.o := y | |
| 83 | + | |
| 84 | +- For enabling all files in one directory:: | |
| 85 | + | |
| 86 | + PROPELLER_PROFILE := y | |
| 87 | + | |
| 88 | +- For disabling one file:: | |
| 89 | + | |
| 90 | + PROPELLER_PROFILE_foo.o := n | |
| 91 | + | |
| 92 | +- For disabling all files in one directory:: | |
| 93 | + | |
| 94 | + PROPELLER__PROFILE := n | |
| 95 | + | |
| 96 | + | |
| 97 | +Workflow | |
| 98 | +======== | |
| 99 | + | |
| 100 | +Here is an example workflow for building an AutoFDO+Propeller kernel: | |
| 101 | + | |
| 102 | +1) Assuming an AutoFDO profile is already collected following | |
| 103 | + instructions in the AutoFDO document, build the kernel on the host | |
| 104 | + machine, with AutoFDO and Propeller build configs :: | |
| 105 | + | |
| 106 | + CONFIG_AUTOFDO_CLANG=y | |
| 107 | + CONFIG_PROPELLER_CLANG=y | |
| 108 | + | |
| 109 | + and :: | |
| 110 | + | |
| 111 | + $ make LLVM=1 CLANG_AUTOFDO_PROFILE=<autofdo-profile-name> | |
| 112 | + | |
| 113 | +2) Install the kernel on the test machine. | |
| 114 | + | |
| 115 | +3) Run the load tests. The '-c' option in perf specifies the sample | |
| 116 | + event period. We suggest using a suitable prime number, like 500009, | |
| 117 | + for this purpose. | |
| 118 | + | |
| 119 | + - For Intel platforms:: | |
| 120 | + | |
| 121 | + $ perf record -e BR_INST_RETIRED.NEAR_TAKEN:k -a -N -b -c <count> -o <perf_file> -- <loadtest> | |
| 122 | + | |
| 123 | + - For AMD platforms:: | |
| 124 | + | |
| 125 | + $ perf record --pfm-event RETIRED_TAKEN_BRANCH_INSTRUCTIONS:k -a -N -b -c <count> -o <perf_file> -- <loadtest> | |
| 126 | + | |
| 127 | + Note you can repeat the above steps to collect multiple <perf_file>s. | |
| 128 | + | |
| 129 | +4) (Optional) Download the raw perf file(s) to the host machine. | |
| 130 | + | |
| 131 | +5) Use the create_llvm_prof tool (https://github.com/google/autofdo) to | |
| 132 | + generate Propeller profile. :: | |
| 133 | + | |
| 134 | + $ create_llvm_prof --binary=<vmlinux> --profile=<perf_file> | |
| 135 | + --format=propeller --propeller_output_module_name | |
| 136 | + --out=<propeller_profile_prefix>_cc_profile.txt | |
| 137 | + --propeller_symorder=<propeller_profile_prefix>_ld_profile.txt | |
| 138 | + | |
| 139 | + "<propeller_profile_prefix>" can be something like "/home/user/dir/any_string". | |
| 140 | + | |
| 141 | + This command generates a pair of Propeller profiles: | |
| 142 | + "<propeller_profile_prefix>_cc_profile.txt" and | |
| 143 | + "<propeller_profile_prefix>_ld_profile.txt". | |
| 144 | + | |
| 145 | + If there are more than 1 perf_file collected in the previous step, | |
| 146 | + you can create a temp list file "<perf_file_list>" with each line | |
| 147 | + containing one perf file name and run:: | |
| 148 | + | |
| 149 | + $ create_llvm_prof --binary=<vmlinux> --profile=@<perf_file_list> | |
| 150 | + --format=propeller --propeller_output_module_name | |
| 151 | + --out=<propeller_profile_prefix>_cc_profile.txt | |
| 152 | + --propeller_symorder=<propeller_profile_prefix>_ld_profile.txt | |
| 153 | + | |
| 154 | +6) Rebuild the kernel using the AutoFDO and Propeller | |
| 155 | + profiles. :: | |
| 156 | + | |
| 157 | + CONFIG_AUTOFDO_CLANG=y | |
| 158 | + CONFIG_PROPELLER_CLANG=y | |
| 159 | + | |
| 160 | + and :: | |
| 161 | + | |
| 162 | + $ make LLVM=1 CLANG_AUTOFDO_PROFILE=<profile_file> CLANG_PROPELLER_PROFILE_PREFIX=<propeller_profile_prefix> | |
| @@ -0,0 +1,42 @@ | ||
| 1 | +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) | |
| 2 | +%YAML 1.2 | |
| 3 | +--- | |
| 4 | +$id: http://devicetree.org/schemas/arm/airoha,en7581-chip-scu.yaml# | |
| 5 | +$schema: http://devicetree.org/meta-schemas/core.yaml# | |
| 6 | + | |
| 7 | +title: Airoha Chip SCU Controller for EN7581 SoC | |
| 8 | + | |
| 9 | +maintainers: | |
| 10 | + - Lorenzo Bianconi <lorenzo@kernel.org> | |
| 11 | + | |
| 12 | +description: | |
| 13 | + The airoha chip-scu block provides a configuration interface for clock, | |
| 14 | + io-muxing and other functionalities used by multiple controllers (e.g. clock, | |
| 15 | + pinctrl, ecc) on EN7581 SoC. | |
| 16 | + | |
| 17 | +properties: | |
| 18 | + compatible: | |
| 19 | + items: | |
| 20 | + - enum: | |
| 21 | + - airoha,en7581-chip-scu | |
| 22 | + - const: syscon | |
| 23 | + | |
| 24 | + reg: | |
| 25 | + maxItems: 1 | |
| 26 | + | |
| 27 | +required: | |
| 28 | + - compatible | |
| 29 | + - reg | |
| 30 | + | |
| 31 | +additionalProperties: false | |
| 32 | + | |
| 33 | +examples: | |
| 34 | + - | | |
| 35 | + soc { | |
| 36 | + #address-cells = <2>; | |
| 37 | + #size-cells = <2>; | |
| 38 | + syscon@1fa20000 { | |
| 39 | + compatible = "airoha,en7581-chip-scu", "syscon"; | |
| 40 | + reg = <0x0 0x1fa20000 0x0 0x388>; | |
| 41 | + }; | |
| 42 | + }; | |
| @@ -253,6 +253,46 @@ properties: · 252 unmodified lines | ||
| 253 | 253 | |
| 254 | 254 | additionalProperties: false |
| 255 | 255 | |
| 256 | + sink-wait-cap-time-ms: | |
| 257 | + description: Represents the max time in ms that USB Type-C port (in sink | |
| 258 | + role) should wait for the port partner (source role) to send source caps. | |
| 259 | + SinkWaitCap timer starts when port in sink role attaches to the source. | |
| 260 | + This timer will stop when sink receives PD source cap advertisement before | |
| 261 | + timeout in which case it'll move to capability negotiation stage. A | |
| 262 | + timeout leads to a hard reset message by the port. | |
| 263 | + minimum: 310 | |
| 264 | + maximum: 620 | |
| 265 | + default: 310 | |
| 266 | + | |
| 267 | + ps-source-off-time-ms: | |
| 268 | + description: Represents the max time in ms that a DRP in source role should | |
| 269 | + take to turn off power after the PsSourceOff timer starts. PsSourceOff | |
| 270 | + timer starts when a sink's PHY layer receives EOP of the GoodCRC message | |
| 271 | + (corresponding to an Accept message sent in response to a PR_Swap or a | |
| 272 | + FR_Swap request). This timer stops when last bit of GoodCRC EOP | |
| 273 | + corresponding to the received PS_RDY message is transmitted by the PHY | |
| 274 | + layer. A timeout shall lead to error recovery in the type-c port. | |
| 275 | + minimum: 750 | |
| 276 | + maximum: 920 | |
| 277 | + default: 920 | |
| 278 | + | |
| 279 | + cc-debounce-time-ms: | |
| 280 | + description: Represents the max time in ms that a port shall wait to | |
| 281 | + determine if it's attached to a partner. | |
| 282 | + minimum: 100 | |
| 283 | + maximum: 200 | |
| 284 | + default: 200 | |
| 285 | + | |
| 286 | + sink-bc12-completion-time-ms: | |
| 287 | + description: Represents the max time in ms that a port in sink role takes | |
| 288 | + to complete Battery Charger (BC1.2) Detection. BC1.2 detection is a | |
| 289 | + hardware mechanism, which in some TCPC implementations, can run in | |
| 290 | + parallel once the Type-C connection state machine reaches the "potential | |
| 291 | + connect as sink" state. In TCPCs where this causes delays to respond to | |
| 292 | + the incoming PD messages, sink-bc12-completion-time-ms is used to delay | |
| 293 | + PD negotiation till BC1.2 detection completes. | |
| 294 | + default: 0 | |
| 295 | + | |
| 256 | 296 | dependencies: |
| 257 | 297 | sink-vdos-v1: [ sink-vdos ] |
| 258 | 298 | sink-vdos: [ sink-vdos-v1 ] |
| @@ -380,7 +420,7 @@ examples: · 121 unmodified lines | ||
| 380 | 420 | }; |
| 381 | 421 | |
| 382 | 422 | # USB-C connector attached to a typec port controller(ptn5110), which has |
| 383 | − # power delivery support and enables drp. | |
| 423 | + # power delivery support, explicitly defines time properties and enables drp. | |
| 384 | 424 | - | |
| 385 | 425 | #include <dt-bindings/usb/pd.h> |
| 386 | 426 | typec: ptn5110 { |
| @@ -393,6 +433,10 @@ examples: · 6 unmodified lines | ||
| 393 | 433 | sink-pdos = <PDO_FIXED(5000, 2000, PDO_FIXED_USB_COMM) |
| 394 | 434 | PDO_VAR(5000, 12000, 2000)>; |
| 395 | 435 | op-sink-microwatt = <10000000>; |
| 436 | + sink-wait-cap-time-ms = <465>; | |
| 437 | + ps-source-off-time-ms = <835>; | |
| 438 | + cc-debounce-time-ms = <101>; | |
| 439 | + sink-bc12-completion-time-ms = <500>; | |
| 396 | 440 | }; |
| 397 | 441 | }; |
| 398 | 442 | |
| @@ -26,6 +26,7 @@ properties: · 25 unmodified lines | ||
| 26 | 26 | - enum: |
| 27 | 27 | - qcom,qcm2290-gpi-dma |
| 28 | 28 | - qcom,qdu1000-gpi-dma |
| 29 | + - qcom,sar2130p-gpi-dma | |
| 29 | 30 | - qcom,sc7280-gpi-dma |
| 30 | 31 | - qcom,sdx75-gpi-dma |
| 31 | 32 | - qcom,sm6115-gpi-dma |
| @@ -4,18 +4,16 @@ · 3 unmodified lines | ||
| 4 | 4 | $id: http://devicetree.org/schemas/dma/renesas,rz-dmac.yaml# |
| 5 | 5 | $schema: http://devicetree.org/meta-schemas/core.yaml# |
| 6 | 6 | |
| 7 | −title: Renesas RZ/{G2L,G2UL,V2L} DMA Controller | |
| 7 | +title: Renesas RZ DMA Controller | |
| 8 | 8 | |
| 9 | 9 | maintainers: |
| 10 | 10 | - Biju Das <biju.das.jz@bp.renesas.com> |
| 11 | 11 | |
| 12 | −allOf: | |
| 13 | − - $ref: dma-controller.yaml# | |
| 14 | − | |
| 15 | 12 | properties: |
| 16 | 13 | compatible: |
| 17 | 14 | items: |
| 18 | 15 | - enum: |
| 16 | + - renesas,r7s72100-dmac # RZ/A1H | |
| 19 | 17 | - renesas,r9a07g043-dmac # RZ/G2UL and RZ/Five |
| 20 | 18 | - renesas,r9a07g044-dmac # RZ/G2{L,LC} |
| 21 | 19 | - renesas,r9a07g054-dmac # RZ/V2L |
| @@ -93,13 +91,26 @@ required: · 71 unmodified lines | ||
| 93 | 91 | - reg |
| 94 | 92 | - interrupts |
| 95 | 93 | - interrupt-names |
| 96 | − - clocks | |
| 97 | − - clock-names | |
| 98 | 94 | - '#dma-cells' |
| 99 | 95 | - dma-channels |
| 100 | − - power-domains | |
| 101 | − - resets | |
| 102 | − - reset-names | |
| 96 | + | |
| 97 | +allOf: | |
| 98 | + - $ref: dma-controller.yaml# | |
| 99 | + | |
| 100 | + - if: | |
| 101 | + not: | |
| 102 | + properties: | |
| 103 | + compatible: | |
| 104 | + contains: | |
| 105 | + enum: | |
| 106 | + - renesas,r7s72100-dmac | |
| 107 | + then: | |
| 108 | + required: | |
| 109 | + - clocks | |
| 110 | + - clock-names | |
| 111 | + - power-domains | |
| 112 | + - resets | |
| 113 | + - reset-names | |
| 103 | 114 | |
| 104 | 115 | additionalProperties: false |
| 105 | 116 | |
| @@ -27,11 +27,16 @@ allOf: · 26 unmodified lines | ||
| 27 | 27 | |
| 28 | 28 | properties: |
| 29 | 29 | compatible: |
| 30 | − items: | |
| 31 | − - enum: | |
| 32 | − - microchip,mpfs-pdma | |
| 33 | − - sifive,fu540-c000-pdma | |
| 34 | − - const: sifive,pdma0 | |
| 30 | + oneOf: | |
| 31 | + - items: | |
| 32 | + - const: microchip,pic64gx-pdma | |
| 33 | + - const: microchip,mpfs-pdma | |
| 34 | + - const: sifive,pdma0 | |
| 35 | + - items: | |
| 36 | + - enum: | |
| 37 | + - microchip,mpfs-pdma | |
| 38 | + - sifive,fu540-c000-pdma | |
| 39 | + - const: sifive,pdma0 | |
| 35 | 40 | description: |
| 36 | 41 | Should be "sifive,<chip>-pdma" and "sifive,pdma<version>". |
| 37 | 42 | Supported compatible strings are - |
| @@ -96,6 +96,12 @@ properties: · 95 unmodified lines | ||
| 96 | 96 | including the update of the LLI if any |
| 97 | 97 | 0x3: at channel level, the transfer complete event is generated at the |
| 98 | 98 | end of the last LLI |
| 99 | + -bit 16: Prevent packing/unpacking mode | |
| 100 | + 0x0: pack/unpack enabled when source data width/burst != destination data width/burst | |
| 101 | + 0x1: memory data width/burst forced to peripheral data width/burst to prevent pack/unpack | |
| 102 | + -bit 17: Prevent additional transfers due to linked-list refactoring | |
| 103 | + 0x0: don't prevent additional transfers for optimal performance | |
| 104 | + 0x1: prevent additional transfer to accommodate user constraints such as single transfer | |
| 99 | 105 | |
| 100 | 106 | required: |
| 101 | 107 | - compatible |
| @@ -33,6 +33,7 @@ properties: · 32 unmodified lines | ||
| 33 | 33 | - allwinner,sun50i-a100-i2c |
| 34 | 34 | - allwinner,sun50i-h616-i2c |
| 35 | 35 | - allwinner,sun50i-r329-i2c |
| 36 | + - allwinner,sun55i-a523-i2c | |
| 36 | 37 | - const: allwinner,sun8i-v536-i2c |
| 37 | 38 | - const: allwinner,sun6i-a31-i2c |
| 38 | 39 | - const: marvell,mv64xxx-i2c |
| @@ -97,6 +97,22 @@ properties: · 96 unmodified lines | ||
| 97 | 97 | - const: tx |
| 98 | 98 | - const: rx |
| 99 | 99 | |
| 100 | + snps,bus-capacitance-pf: | |
| 101 | + $ref: /schemas/types.yaml#/definitions/uint32 | |
| 102 | + description: | |
| 103 | + This property indicates the bus capacitance in picofarads (pF). | |
| 104 | + This value is used to compute the tHIGH and tLOW periods for high speed | |
| 105 | + mode. | |
| 106 | + enum: [100, 400] | |
| 107 | + default: 100 | |
| 108 | + | |
| 109 | + snps,clk-freq-optimized: | |
| 110 | + description: | |
| 111 | + This property indicates whether the hardware reduce its clock frequency | |
| 112 | + by reducing the internal latency required to generate the high period and | |
| 113 | + low period of SCL line. | |
| 114 | + type: boolean | |
| 115 | + | |
| 100 | 116 | unevaluatedProperties: false |
| 101 | 117 | |
| 102 | 118 | required: |
| @@ -121,6 +137,8 @@ examples: · 18 unmodified lines | ||
| 121 | 137 | i2c-sda-hold-time-ns = <300>; |
| 122 | 138 | i2c-sda-falling-time-ns = <300>; |
| 123 | 139 | i2c-scl-falling-time-ns = <300>; |
| 140 | + snps,bus-capacitance-pf = <400>; | |
| 141 | + snps,clk-freq-optimized; | |
| 124 | 142 | }; |
| 125 | 143 | - | |
| 126 | 144 | i2c@2000 { |
| @@ -22,6 +22,7 @@ select: · 21 unmodified lines | ||
| 22 | 22 | enum: |
| 23 | 23 | - st,nomadik-i2c |
| 24 | 24 | - mobileye,eyeq5-i2c |
| 25 | + - mobileye,eyeq6h-i2c | |
| 25 | 26 | required: |
| 26 | 27 | - compatible |
| 27 | 28 | |
| @@ -29,15 +30,15 @@ properties: · 1 unmodified line | ||
| 29 | 30 | compatible: |
| 30 | 31 | oneOf: |
| 31 | 32 | - items: |
| 32 | − - const: st,nomadik-i2c | |
| 33 | + - enum: | |
| 34 | + - st,nomadik-i2c | |
| 35 | + - mobileye,eyeq5-i2c | |
| 36 | + - mobileye,eyeq6h-i2c | |
| 33 | 37 | - const: arm,primecell |
| 34 | 38 | - items: |
| 35 | 39 | - const: stericsson,db8500-i2c |
| 36 | 40 | - const: st,nomadik-i2c |
| 37 | 41 | - const: arm,primecell |
| 38 | − - items: | |
| 39 | − - const: mobileye,eyeq5-i2c | |
| 40 | − - const: arm,primecell | |
| 41 | 42 | |
| 42 | 43 | reg: |
| 43 | 44 | maxItems: 1 |
| @@ -54,7 +55,7 @@ properties: · 10 unmodified lines | ||
| 54 | 55 | - items: |
| 55 | 56 | - const: mclk |
| 56 | 57 | - const: apb_pclk |
| 57 | − # Clock name in DB8500 or EyeQ5 | |
| 58 | + # Clock name in DB8500 or EyeQ | |
| 58 | 59 | - items: |
| 59 | 60 | - const: i2cclk |
| 60 | 61 | - const: apb_pclk |
| @@ -67,7 +68,7 @@ properties: · 6 unmodified lines | ||
| 67 | 68 | |
| 68 | 69 | clock-frequency: |
| 69 | 70 | minimum: 1 |
| 70 | − maximum: 400000 | |
| 71 | + maximum: 3400000 | |
| 71 | 72 | |
| 72 | 73 | mobileye,olb: |
| 73 | 74 | $ref: /schemas/types.yaml#/definitions/phandle-array |
| @@ -37,6 +37,10 @@ properties: · 36 unmodified lines | ||
| 37 | 37 | to both the positive and negative inputs of a differential ADC. |
| 38 | 38 | The first value specifies the positive input pin, the second |
| 39 | 39 | specifies the negative input pin. |
| 40 | + There are also some ADCs, where the differential channel has dedicated | |
| 41 | + positive and negative inputs which can be used to measure differential | |
| 42 | + voltage levels. For those setups, this property can be configured with | |
| 43 | + the 'reg' property for both inputs (i.e. diff-channels = <reg reg>). | |
| 40 | 44 | |
| 41 | 45 | single-channel: |
| 42 | 46 | $ref: /schemas/types.yaml#/definitions/uint32 |
| @@ -28,6 +28,7 @@ description: | · 27 unmodified lines | ||
| 28 | 28 | Datasheets for supported chips: |
| 29 | 29 | https://www.analog.com/media/en/technical-documentation/data-sheets/AD4111.pdf |
| 30 | 30 | https://www.analog.com/media/en/technical-documentation/data-sheets/AD4112.pdf |
| 31 | + <AD4113: not released yet> | |
| 31 | 32 | https://www.analog.com/media/en/technical-documentation/data-sheets/AD4114.pdf |
| 32 | 33 | https://www.analog.com/media/en/technical-documentation/data-sheets/AD4115.pdf |
| 33 | 34 | https://www.analog.com/media/en/technical-documentation/data-sheets/AD4116.pdf |
| @@ -44,6 +45,7 @@ properties: · 10 unmodified lines | ||
| 44 | 45 | enum: |
| 45 | 46 | - adi,ad4111 |
| 46 | 47 | - adi,ad4112 |
| 48 | + - adi,ad4113 | |
| 47 | 49 | - adi,ad4114 |
| 48 | 50 | - adi,ad4115 |
| 49 | 51 | - adi,ad4116 |
| @@ -331,6 +333,7 @@ allOf: · 281 unmodified lines | ||
| 331 | 333 | enum: |
| 332 | 334 | - adi,ad4111 |
| 333 | 335 | - adi,ad4112 |
| 336 | + - adi,ad4113 | |
| 334 | 337 | - adi,ad4114 |
| 335 | 338 | - adi,ad4115 |
| 336 | 339 | - adi,ad4116 |
| @@ -25,6 +25,8 @@ description: | · 24 unmodified lines | ||
| 25 | 25 | * https://www.analog.com/en/products/ad7386-4.html |
| 26 | 26 | * https://www.analog.com/en/products/ad7387-4.html |
| 27 | 27 | * https://www.analog.com/en/products/ad7388-4.html |
| 28 | + * https://www.analog.com/en/products/adaq4370-4.html | |
| 29 | + * https://www.analog.com/en/products/adaq4380-4.html | |
| 28 | 30 | |
| 29 | 31 | |
| 30 | 32 | $ref: /schemas/spi/spi-peripheral-props.yaml# |
| @@ -46,6 +48,8 @@ properties: · 15 unmodified lines | ||
| 46 | 48 | - adi,ad7386-4 |
| 47 | 49 | - adi,ad7387-4 |
| 48 | 50 | - adi,ad7388-4 |
| 51 | + - adi,adaq4370-4 | |
| 52 | + - adi,adaq4380-4 | |
| 49 | 53 | |
| 50 | 54 | reg: |
| 51 | 55 | maxItems: 1 |
| @@ -70,6 +74,20 @@ properties: · 18 unmodified lines | ||
| 70 | 74 | refin-supply: |
| 71 | 75 | description: |
| 72 | 76 | A 2.5V to 3.3V supply for external reference voltage, for ad7380-4 only. |
| 77 | + For adaq devices, a 5V supply voltage. A 3.3V internal reference is | |
| 78 | + derived from it. Connect to vs-p-supply for normal operation. | |
| 79 | + | |
| 80 | + vs-p-supply: | |
| 81 | + description: | |
| 82 | + Amplifiers positive supply. | |
| 83 | + | |
| 84 | + vs-n-supply: | |
| 85 | + description: | |
| 86 | + Amplifiers negative supply. | |
| 87 | + | |
| 88 | + ldo-supply: | |
| 89 | + description: | |
| 90 | + LDO supply. Connect to vs-p-supply or a 3.6 to 5.5 V supply. | |
| 73 | 91 | |
| 74 | 92 | aina-supply: |
| 75 | 93 | description: |
| @@ -97,12 +115,45 @@ properties: · 21 unmodified lines | ||
| 97 | 115 | specify the ALERT interrupt. |
| 98 | 116 | maxItems: 1 |
| 99 | 117 | |
| 118 | + "#address-cells": | |
| 119 | + const: 1 | |
| 120 | + | |
| 121 | + "#size-cells": | |
| 122 | + const: 0 | |
| 123 | + | |
| 100 | 124 | required: |
| 101 | 125 | - compatible |
| 102 | 126 | - reg |
| 103 | 127 | - vcc-supply |
| 104 | 128 | - vlogic-supply |
| 105 | 129 | |
| 130 | +patternProperties: | |
| 131 | + "^channel@[0-3]$": | |
| 132 | + $ref: adc.yaml | |
| 133 | + type: object | |
| 134 | + | |
| 135 | + properties: | |
| 136 | + reg: | |
| 137 | + description: | |
| 138 | + The channel number. From 0 to 3 corresponding to channels A,B,C,D | |
| 139 | + minimum: 0 | |
| 140 | + maximum: 3 | |
| 141 | + | |
| 142 | + adi,gain-milli: | |
| 143 | + description: | |
| 144 | + The hardware gain applied to the ADC input (in milli units). | |
| 145 | + If not present, default to 1000 (no actual gain applied). | |
| 146 | + Refer to the typical connection diagrams section of the datasheet for | |
| 147 | + pin wiring. | |
| 148 | + $ref: /schemas/types.yaml#/definitions/uint16 | |
| 149 | + enum: [300, 600, 1000, 1600] | |
| 150 | + default: 1000 | |
| 151 | + | |
| 152 | + required: | |
| 153 | + - reg | |
| 154 | + | |
| 155 | + additionalProperties: false | |
| 156 | + | |
| 106 | 157 | unevaluatedProperties: false |
| 107 | 158 | |
| 108 | 159 | allOf: |
| @@ -140,6 +191,7 @@ allOf: · 31 unmodified lines | ||
| 140 | 191 | aind-supply: false |
| 141 | 192 | |
| 142 | 193 | # ad7380-4 uses refin-supply as external reference. |
| 194 | + # adaq devices use internal reference only, derived from refin-supply | |
| 143 | 195 | # All other chips from ad738x family use refio as optional external reference. |
| 144 | 196 | # When refio-supply is omitted, internal reference is used. |
| 145 | 197 | - if: |
| @@ -147,6 +199,8 @@ allOf: · 1 unmodified line | ||
| 147 | 199 | compatible: |
| 148 | 200 | enum: |
| 149 | 201 | - adi,ad7380-4 |
| 202 | + - adi,adaq4370-4 | |
| 203 | + - adi,adaq4380-4 | |
| 150 | 204 | then: |
| 151 | 205 | properties: |
| 152 | 206 | refio-supply: false |
| @@ -156,6 +210,27 @@ allOf: · 3 unmodified lines | ||
| 156 | 210 | properties: |
| 157 | 211 | refin-supply: false |
| 158 | 212 | |
| 213 | + # adaq devices need more supplies and using channel to declare gain property | |
| 214 | + # only applies to adaq devices | |
| 215 | + - if: | |
| 216 | + properties: | |
| 217 | + compatible: | |
| 218 | + enum: | |
| 219 | + - adi,adaq4370-4 | |
| 220 | + - adi,adaq4380-4 | |
| 221 | + then: | |
| 222 | + required: | |
| 223 | + - vs-p-supply | |
| 224 | + - vs-n-supply | |
| 225 | + - ldo-supply | |
| 226 | + else: | |
| 227 | + properties: | |
| 228 | + vs-p-supply: false | |
| 229 | + vs-n-supply: false | |
| 230 | + ldo-supply: false | |
| 231 | + patternProperties: | |
| 232 | + "^channel@[0-3]$": false | |
| 233 | + | |
| 159 | 234 | examples: |
| 160 | 235 | - | |
| 161 | 236 | #include <dt-bindings/interrupt-controller/irq.h> |
| @@ -180,3 +255,48 @@ examples: · 18 unmodified lines | ||
| 180 | 255 | refio-supply = <&supply_2_5V>; |
| 181 | 256 | }; |
| 182 | 257 | }; |
| 258 | + | |
| 259 | + - | | |
| 260 | + #include <dt-bindings/interrupt-controller/irq.h> | |
| 261 | + | |
| 262 | + spi { | |
| 263 | + #address-cells = <1>; | |
| 264 | + #size-cells = <0>; | |
| 265 | + | |
| 266 | + adc@0 { | |
| 267 | + compatible = "adi,adaq4380-4"; | |
| 268 | + reg = <0>; | |
| 269 | + | |
| 270 | + spi-cpol; | |
| 271 | + spi-cpha; | |
| 272 | + spi-max-frequency = <80000000>; | |
| 273 | + | |
| 274 | + interrupts = <27 IRQ_TYPE_EDGE_FALLING>; | |
| 275 | + interrupt-parent = <&gpio0>; | |
| 276 | + | |
| 277 | + vcc-supply = <&supply_3_3V>; | |
| 278 | + vlogic-supply = <&supply_3_3V>; | |
| 279 | + refin-supply = <&supply_5V>; | |
| 280 | + vs-p-supply = <&supply_5V>; | |
| 281 | + vs-n-supply = <&supply_0V>; | |
| 282 | + ldo-supply = <&supply_5V>; | |
| 283 | + | |
| 284 | + #address-cells = <1>; | |
| 285 | + #size-cells = <0>; | |
| 286 | + | |
| 287 | + channel@0 { | |
| 288 | + reg = <0>; | |
| 289 | + adi,gain-milli = /bits/ 16 <300>; | |
| 290 | + }; | |
| 291 | + | |
| 292 | + channel@2 { | |
| 293 | + reg = <2>; | |
| 294 | + adi,gain-milli = /bits/ 16 <600>; | |
| 295 | + }; | |
| 296 | + | |
| 297 | + channel@3 { | |
| 298 | + reg = <3>; | |
| 299 | + adi,gain-milli = /bits/ 16 <1000>; | |
| 300 | + }; | |
| 301 | + }; | |
| 302 | + }; | |
| @@ -14,6 +14,11 @@ description: | · 13 unmodified lines | ||
| 14 | 14 | https://www.analog.com/media/en/technical-documentation/data-sheets/AD7605-4.pdf |
| 15 | 15 | https://www.analog.com/media/en/technical-documentation/data-sheets/ad7606_7606-6_7606-4.pdf |
| 16 | 16 | https://www.analog.com/media/en/technical-documentation/data-sheets/AD7606B.pdf |
| 17 | + https://www.analog.com/media/en/technical-documentation/data-sheets/ad7606c-16.pdf | |
| 18 | + https://www.analog.com/media/en/technical-documentation/data-sheets/ad7606c-18.pdf | |
| 19 | + https://www.analog.com/media/en/technical-documentation/data-sheets/ad7607.pdf | |
| 20 | + https://www.analog.com/media/en/technical-documentation/data-sheets/ad7608.pdf | |
| 21 | + https://www.analog.com/media/en/technical-documentation/data-sheets/ad7609.pdf | |
| 17 | 22 | https://www.analog.com/media/en/technical-documentation/data-sheets/AD7616.pdf |
| 18 | 23 | |
| 19 | 24 | properties: |
| @@ -24,11 +29,27 @@ properties: · 4 unmodified lines | ||
| 24 | 29 | - adi,ad7606-6 |
| 25 | 30 | - adi,ad7606-8 # Referred to as AD7606 (without -8) in the datasheet |
| 26 | 31 | - adi,ad7606b |
| 32 | + - adi,ad7606c-16 | |
| 33 | + - adi,ad7606c-18 | |
| 34 | + - adi,ad7607 | |
| 35 | + - adi,ad7608 | |
| 36 | + - adi,ad7609 | |
| 27 | 37 | - adi,ad7616 |
| 28 | 38 | |
| 29 | 39 | reg: |
| 30 | 40 | maxItems: 1 |
| 31 | 41 | |
| 42 | + "#address-cells": | |
| 43 | + const: 1 | |
| 44 | + | |
| 45 | + "#size-cells": | |
| 46 | + const: 0 | |
| 47 | + | |
| 48 | + # According to the datasheet, "Data is clocked in from SDI on the falling | |
| 49 | + # edge of SCLK, while data is clocked out on DOUTA on the rising edge of | |
| 50 | + # SCLK". Also, even if not stated textually in the datasheet, it is made | |
| 51 | + # clear on the diagrams that sclk idles at high. Subsequently, in case SPI | |
| 52 | + # interface is used, the correct way is to only set spi-cpol. | |
| 32 | 53 | spi-cpha: true |
| 33 | 54 | |
| 34 | 55 | spi-cpol: true |
| @@ -114,18 +135,91 @@ properties: · 79 unmodified lines | ||
| 114 | 135 | assumed that the pins are hardwired to VDD. |
| 115 | 136 | type: boolean |
| 116 | 137 | |
| 138 | + pwms: | |
| 139 | + description: | |
| 140 | + In case the conversion is triggered by a PWM instead of a GPIO plugged to | |
| 141 | + the CONVST pin, the PWM must be referenced. | |
| 142 | + The first is the PWM connected to CONVST or CONVST1 for the chips with the | |
| 143 | + 2nd PWM connected to CONVST2, if CONVST2 is available and not shorted to | |
| 144 | + CONVST1. | |
| 145 | + minItems: 1 | |
| 146 | + maxItems: 2 | |
| 147 | + | |
| 148 | + pwm-names: | |
| 149 | + items: | |
| 150 | + - const: convst1 | |
| 151 | + - const: convst2 | |
| 152 | + | |
| 153 | + io-backends: | |
| 154 | + description: | |
| 155 | + A reference to the iio-backend, which is responsible handling the BUSY | |
| 156 | + pin's falling edge and communication. | |
| 157 | + An example of backend can be found at | |
| 158 | + http://analogdevicesinc.github.io/hdl/library/axi_ad7606x/index.html | |
| 159 | + | |
| 160 | + | |
| 161 | +patternProperties: | |
| 162 | + "^channel@[1-8]$": | |
| 163 | + type: object | |
| 164 | + $ref: adc.yaml | |
| 165 | + unevaluatedProperties: false | |
| 166 | + | |
| 167 | + properties: | |
| 168 | + reg: | |
| 169 | + description: | |
| 170 | + The channel number, as specified in the datasheet (from 1 to 8). | |
| 171 | + minimum: 1 | |
| 172 | + maximum: 8 | |
| 173 | + | |
| 174 | + diff-channels: | |
| 175 | + description: | |
| 176 | + Each channel can be configured as a bipolar differential channel. | |
| 177 | + The ADC uses the same positive and negative inputs for this. | |
| 178 | + This property must be specified as 'reg' (or the channel number) for | |
| 179 | + both positive and negative inputs (i.e. diff-channels = <reg reg>). | |
| 180 | + Since the configuration is bipolar differential, the 'bipolar' | |
| 181 | + property is required. | |
| 182 | + items: | |
| 183 | + minimum: 1 | |
| 184 | + maximum: 8 | |
| 185 | + | |
| 186 | + bipolar: | |
| 187 | + description: | |
| 188 | + The ADC channels can be configured as | |
| 189 | + * Bipolar single-ended | |
| 190 | + * Unipolar single-ended | |
| 191 | + * Bipolar differential | |
| 192 | + Therefore in the DT, if no channel node is specified, it is considered | |
| 193 | + 'unipolar single-ended'. So for the other configurations the 'bipolar' | |
| 194 | + property must be specified. If 'diff-channels' is specified, it is | |
| 195 | + considered a bipolar differential channel. Otherwise it is bipolar | |
| 196 | + single-ended. | |
| 197 | + | |
| 198 | + required: | |
| 199 | + - reg | |
| 200 | + - bipolar | |
| 201 | + | |
| 117 | 202 | required: |
| 118 | 203 | - compatible |
| 119 | 204 | - reg |
| 120 | − - spi-cpha | |
| 121 | 205 | - avcc-supply |
| 122 | 206 | - vdrive-supply |
| 123 | − - interrupts | |
| 124 | − - adi,conversion-start-gpios | |
| 125 | 207 | |
| 126 | 208 | allOf: |
| 127 | 209 | - $ref: /schemas/spi/spi-peripheral-props.yaml# |
| 128 | 210 | |
| 211 | + - oneOf: | |
| 212 | + - required: | |
| 213 | + - adi,conversion-start-gpios | |
| 214 | + - required: | |
| 215 | + - pwms | |
| 216 | + | |
| 217 | + - oneOf: | |
| 218 | + - required: | |
| 219 | + - interrupts | |
| 220 | + - required: | |
| 221 | + - io-backends | |
| 222 | + | |
| 129 | 223 | - if: |
| 130 | 224 | properties: |
| 131 | 225 | compatible: |
| @@ -162,17 +256,66 @@ allOf: · 30 unmodified lines | ||
| 162 | 256 | - adi,ad7606-4 |
| 163 | 257 | - adi,ad7606-6 |
| 164 | 258 | - adi,ad7606-8 |
| 259 | + - adi,ad7607 | |
| 260 | + - adi,ad7608 | |
| 261 | + - adi,ad7609 | |
| 165 | 262 | then: |
| 166 | 263 | properties: |
| 167 | 264 | adi,sw-mode: false |
| 168 | 265 | else: |
| 169 | 266 | properties: |
| 267 | + pwms: | |
| 268 | + maxItems: 1 | |
| 269 | + pwm-names: | |
| 270 | + maxItems: 1 | |
| 170 | 271 | adi,conversion-start-gpios: |
| 171 | 272 | maxItems: 1 |
| 172 | 273 | |
| 274 | + - if: | |
| 275 | + not: | |
| 276 | + required: | |
| 277 | + - adi,sw-mode | |
| 278 | + then: | |
| 279 | + patternProperties: | |
| 280 | + "^channel@[1-8]$": false | |
| 281 | + | |
| 282 | + - if: | |
| 283 | + not: | |
| 284 | + properties: | |
| 285 | + compatible: | |
| 286 | + enum: | |
| 287 | + - adi,ad7606c-16 | |
| 288 | + - adi,ad7606c-18 | |
| 289 | + then: | |
| 290 | + patternProperties: | |
| 291 | + "^channel@[1-8]$": false | |
| 292 | + | |
| 173 | 293 | unevaluatedProperties: false |
| 174 | 294 | |
| 175 | 295 | examples: |
| 296 | + - | | |
| 297 | + #include <dt-bindings/gpio/gpio.h> | |
| 298 | + iio-backend { | |
| 299 | + #address-cells = <1>; | |
| 300 | + #size-cells = <0>; | |
| 301 | + adi_adc@0 { | |
| 302 | + compatible = "adi,ad7606b"; | |
| 303 | + reg = <0>; | |
| 304 | + pwms = <&axi_pwm_gen 0 0>; | |
| 305 | + | |
| 306 | + avcc-supply = <&adc_vref>; | |
| 307 | + vdrive-supply = <&vdd_supply>; | |
| 308 | + | |
| 309 | + reset-gpios = <&gpio0 91 GPIO_ACTIVE_HIGH>; | |
| 310 | + standby-gpios = <&gpio0 90 GPIO_ACTIVE_LOW>; | |
| 311 | + adi,range-gpios = <&gpio0 89 GPIO_ACTIVE_HIGH>; | |
| 312 | + adi,oversampling-ratio-gpios = <&gpio0 88 GPIO_ACTIVE_HIGH | |
| 313 | + &gpio0 87 GPIO_ACTIVE_HIGH | |
| 314 | + &gpio0 86 GPIO_ACTIVE_HIGH>; | |
| 315 | + io-backends = <&iio_backend>; | |
| 316 | + }; | |
| 317 | + }; | |
| 318 | + | |
| 176 | 319 | - | |
| 177 | 320 | #include <dt-bindings/gpio/gpio.h> |
| 178 | 321 | #include <dt-bindings/interrupt-controller/irq.h> |
| @@ -185,7 +328,6 @@ examples: · 6 unmodified lines | ||
| 185 | 328 | reg = <0>; |
| 186 | 329 | spi-max-frequency = <1000000>; |
| 187 | 330 | spi-cpol; |
| 188 | − spi-cpha; | |
| 189 | 331 | |
| 190 | 332 | avcc-supply = <&adc_vref>; |
| 191 | 333 | vdrive-supply = <&vdd_supply>; |
| @@ -202,4 +344,53 @@ examples: · 10 unmodified lines | ||
| 202 | 344 | standby-gpios = <&gpio 24 GPIO_ACTIVE_LOW>; |
| 203 | 345 | }; |
| 204 | 346 | }; |
| 347 | + - | | |
| 348 | + #include <dt-bindings/gpio/gpio.h> | |
| 349 | + #include <dt-bindings/interrupt-controller/irq.h> | |
| 350 | + spi { | |
| 351 | + #address-cells = <1>; | |
| 352 | + #size-cells = <0>; | |
| 353 | + | |
| 354 | + adc@0 { | |
| 355 | + compatible = "adi,ad7606c-18"; | |
| 356 | + reg = <0>; | |
| 357 | + | |
| 358 | + #address-cells = <1>; | |
| 359 | + #size-cells = <0>; | |
| 360 | + | |
| 361 | + spi-max-frequency = <1000000>; | |
| 362 | + spi-cpol; | |
| 363 | + | |
| 364 | + avcc-supply = <&adc_vref>; | |
| 365 | + vdrive-supply = <&vdd_supply>; | |
| 366 | + | |
| 367 | + interrupts = <25 IRQ_TYPE_EDGE_FALLING>; | |
| 368 | + interrupt-parent = <&gpio>; | |
| 369 | + | |
| 370 | + adi,conversion-start-gpios = <&gpio 17 GPIO_ACTIVE_HIGH>; | |
| 371 | + reset-gpios = <&gpio 27 GPIO_ACTIVE_HIGH>; | |
| 372 | + adi,first-data-gpios = <&gpio 22 GPIO_ACTIVE_HIGH>; | |
| 373 | + standby-gpios = <&gpio 24 GPIO_ACTIVE_LOW>; | |
| 374 | + | |
| 375 | + adi,sw-mode; | |
| 376 | + | |
| 377 | + channel@1 { | |
| 378 | + reg = <1>; | |
| 379 | + diff-channels = <1 1>; | |
| 380 | + bipolar; | |
| 381 | + }; | |
| 382 | + | |
| 383 | + channel@3 { | |
| 384 | + reg = <3>; | |
| 385 | + bipolar; | |
| 386 | + }; | |
| 387 | + | |
| 388 | + channel@8 { | |
| 389 | + reg = <8>; | |
| 390 | + diff-channels = <8 8>; | |
| 391 | + bipolar; | |
| 392 | + }; | |
| 393 | + | |
| 394 | + }; | |
| 395 | + }; | |
| 205 | 396 | ... |
| @@ -0,0 +1,176 @@ | ||
| 1 | +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) | |
| 2 | +%YAML 1.2 | |
| 3 | +--- | |
| 4 | +$id: http://devicetree.org/schemas/iio/adc/adi,ad7625.yaml# | |
| 5 | +$schema: http://devicetree.org/meta-schemas/core.yaml# | |
| 6 | + | |
| 7 | +title: Analog Devices Fast PulSAR Analog to Digital Converters | |
| 8 | + | |
| 9 | +maintainers: | |
| 10 | + - Michael Hennerich <Michael.Hennerich@analog.com> | |
| 11 | + - Nuno Sá <nuno.sa@analog.com> | |
| 12 | + | |
| 13 | +description: | | |
| 14 | + A family of single channel differential analog to digital converters. | |
| 15 | + | |
| 16 | + * https://www.analog.com/en/products/ad7625.html | |
| 17 | + * https://www.analog.com/en/products/ad7626.html | |
| 18 | + * https://www.analog.com/en/products/ad7960.html | |
| 19 | + * https://www.analog.com/en/products/ad7961.html | |
| 20 | + | |
| 21 | +properties: | |
| 22 | + compatible: | |
| 23 | + enum: | |
| 24 | + - adi,ad7625 | |
| 25 | + - adi,ad7626 | |
| 26 | + - adi,ad7960 | |
| 27 | + - adi,ad7961 | |
| 28 | + | |
| 29 | + vdd1-supply: true | |
| 30 | + vdd2-supply: true | |
| 31 | + vio-supply: true | |
| 32 | + | |
| 33 | + ref-supply: | |
| 34 | + description: | |
| 35 | + Voltage regulator for the external reference voltage (REF). | |
| 36 | + | |
| 37 | + refin-supply: | |
| 38 | + description: | |
| 39 | + Voltage regulator for the reference buffer input (REFIN). | |
| 40 | + | |
| 41 | + clocks: | |
| 42 | + description: | |
| 43 | + The clock connected to the CLK pins, gated by the clk_gate PWM. | |
| 44 | + maxItems: 1 | |
| 45 | + | |
| 46 | + pwms: | |
| 47 | + items: | |
| 48 | + - description: PWM connected to the CNV input on the ADC. | |
| 49 | + - description: PWM that gates the clock connected to the ADC's CLK input. | |
| 50 | + | |
| 51 | + pwm-names: | |
| 52 | + items: | |
| 53 | + - const: cnv | |
| 54 | + - const: clk_gate | |
| 55 | + | |
| 56 | + io-backends: | |
| 57 | + description: | |
| 58 | + The AXI ADC IP block connected to the D+/- and DCO+/- lines of the | |
| 59 | + ADC. An example backend can be found at | |
| 60 | + http://analogdevicesinc.github.io/hdl/projects/pulsar_lvds/index.html. | |
| 61 | + maxItems: 1 | |
| 62 | + | |
| 63 | + adi,no-dco: | |
| 64 | + $ref: /schemas/types.yaml#/definitions/flag | |
| 65 | + description: | |
| 66 | + Indicates the wiring of the DCO+/- lines. If true, then they are | |
| 67 | + grounded and the device is in self-clocked mode. If this is not | |
| 68 | + present, then the device is in echoed clock mode. | |
| 69 | + | |
| 70 | + adi,en0-always-on: | |
| 71 | + $ref: /schemas/types.yaml#/definitions/flag | |
| 72 | + description: | |
| 73 | + Indicates if EN0 is hard-wired to the high state. If neither this | |
| 74 | + nor en0-gpios are present, then EN0 is hard-wired low. | |
| 75 | + | |
| 76 | + adi,en1-always-on: | |
| 77 | + $ref: /schemas/types.yaml#/definitions/flag | |
| 78 | + description: | |
| 79 | + Indicates if EN1 is hard-wired to the high state. If neither this | |
| 80 | + nor en1-gpios are present, then EN1 is hard-wired low. | |
| 81 | + | |
| 82 | + adi,en2-always-on: | |
| 83 | + $ref: /schemas/types.yaml#/definitions/flag | |
| 84 | + description: | |
| 85 | + Indicates if EN2 is hard-wired to the high state. If neither this | |
| 86 | + nor en2-gpios are present, then EN2 is hard-wired low. | |
| 87 | + | |
| 88 | + adi,en3-always-on: | |
| 89 | + $ref: /schemas/types.yaml#/definitions/flag | |
| 90 | + description: | |
| 91 | + Indicates if EN3 is hard-wired to the high state. If neither this | |
| 92 | + nor en3-gpios are present, then EN3 is hard-wired low. | |
| 93 | + | |
| 94 | + en0-gpios: | |
| 95 | + description: | |
| 96 | + Configurable EN0 pin. | |
| 97 | + | |
| 98 | + en1-gpios: | |
| 99 | + description: | |
| 100 | + Configurable EN1 pin. | |
| 101 | + | |
| 102 | + en2-gpios: | |
| 103 | + description: | |
| 104 | + Configurable EN2 pin. | |
| 105 | + | |
| 106 | + en3-gpios: | |
| 107 | + description: | |
| 108 | + Configurable EN3 pin. | |
| 109 | + | |
| 110 | +required: | |
| 111 | + - compatible | |
| 112 | + - vdd1-supply | |
| 113 | + - vdd2-supply | |
| 114 | + - vio-supply | |
| 115 | + - clocks | |
| 116 | + - pwms | |
| 117 | + - pwm-names | |
| 118 | + - io-backends | |
| 119 | + | |
| 120 | +allOf: | |
| 121 | + - if: | |
| 122 | + required: | |
| 123 | + - ref-supply | |
| 124 | + then: | |
| 125 | + properties: | |
| 126 | + refin-supply: false | |
| 127 | + - if: | |
| 128 | + required: | |
| 129 | + - refin-supply | |
| 130 | + then: | |
| 131 | + properties: | |
| 132 | + ref-supply: false | |
| 133 | + - if: | |
| 134 | + properties: | |
| 135 | + compatible: | |
| 136 | + contains: | |
| 137 | + enum: | |
| 138 | + - adi,ad7625 | |
| 139 | + - adi,ad7626 | |
| 140 | + then: | |
| 141 | + properties: | |
| 142 | + en2-gpios: false | |
| 143 | + en3-gpios: false | |
| 144 | + adi,en2-always-on: false | |
| 145 | + adi,en3-always-on: false | |
| 146 | + | |
| 147 | + - if: | |
| 148 | + properties: | |
| 149 | + compatible: | |
| 150 | + contains: | |
| 151 | + enum: | |
| 152 | + - adi,ad7960 | |
| 153 | + - adi,ad7961 | |
| 154 | + then: | |
| 155 | + # ad796x parts must have one of the two supplies | |
| 156 | + oneOf: | |
| 157 | + - required: [ref-supply] | |
| 158 | + - required: [refin-supply] | |
| 159 | + | |
| 160 | +additionalProperties: false | |
| 161 | + | |
| 162 | +examples: | |
| 163 | + - | | |
| 164 | + #include <dt-bindings/gpio/gpio.h> | |
| 165 | + adc { | |
| 166 | + compatible = "adi,ad7625"; | |
| 167 | + vdd1-supply = <&supply_5V>; | |
| 168 | + vdd2-supply = <&supply_2_5V>; | |
| 169 | + vio-supply = <&supply_2_5V>; | |
| 170 | + io-backends = <&axi_adc>; | |
| 171 | + clocks = <&ref_clk>; | |
| 172 | + pwms = <&axi_pwm_gen 0 0>, <&axi_pwm_gen 1 0>; | |
| 173 | + pwm-names = "cnv", "clk_gate"; | |
| 174 | + en0-gpios = <&gpio0 86 GPIO_ACTIVE_HIGH>; | |
| 175 | + en1-gpios = <&gpio0 87 GPIO_ACTIVE_HIGH>; | |
| 176 | + }; | |
| @@ -0,0 +1,110 @@ | ||
| 1 | +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) | |
| 2 | +%YAML 1.2 | |
| 3 | +--- | |
| 4 | +$id: http://devicetree.org/schemas/iio/adc/adi,ad7779.yaml# | |
| 5 | +$schema: http://devicetree.org/meta-schemas/core.yaml# | |
| 6 | + | |
| 7 | +title: Analog Devices AD777X family 8-Channel, 24-Bit, Simultaneous Sampling ADCs | |
| 8 | + | |
| 9 | +maintainers: | |
| 10 | + - Ramona Nechita <ramona.nechita@analog.com> | |
| 11 | + | |
| 12 | +description: | | |
| 13 | + The AD777X family consist of 8-channel, simultaneous sampling analog-to- | |
| 14 | + digital converter (ADC). Eight full Σ-Δ ADCs are on-chip. The | |
| 15 | + AD7771 provides an ultralow input current to allow direct sensor | |
| 16 | + connection. Each input channel has a programmable gain stage | |
| 17 | + allowing gains of 1, 2, 4, and 8 to map lower amplitude sensor | |
| 18 | + outputs into the full-scale ADC input range, maximizing the | |
| 19 | + dynamic range of the signal chain. | |
| 20 | + | |
| 21 | + https://www.analog.com/media/en/technical-documentation/data-sheets/ad7770.pdf | |
| 22 | + https://www.analog.com/media/en/technical-documentation/data-sheets/ad7771.pdf | |
| 23 | + https://www.analog.com/media/en/technical-documentation/data-sheets/ad7779.pdf | |
| 24 | + | |
| 25 | +$ref: /schemas/spi/spi-peripheral-props.yaml# | |
| 26 | + | |
| 27 | +properties: | |
| 28 | + compatible: | |
| 29 | + enum: | |
| 30 | + - adi,ad7770 | |
| 31 | + - adi,ad7771 | |
| 32 | + - adi,ad7779 | |
| 33 | + | |
| 34 | + reg: | |
| 35 | + maxItems: 1 | |
| 36 | + | |
| 37 | + '#address-cells': | |
| 38 | + const: 1 | |
| 39 | + | |
| 40 | + '#size-cells': | |
| 41 | + const: 0 | |
| 42 | + | |
| 43 | + clocks: | |
| 44 | + maxItems: 1 | |
| 45 | + | |
| 46 | + avdd1-supply: | |
| 47 | + description: Front-End analog supply AVDD1. Can be used as conversion ref. | |
| 48 | + | |
| 49 | + avdd2-supply: | |
| 50 | + description: AVDD2 Analog Supply from 2.2 V to 3.6 V. | |
| 51 | + | |
| 52 | + avdd4-supply: | |
| 53 | + description: AVDD4 SAR Analog Supply and Reference Source. | |
| 54 | + | |
| 55 | + interrupts: | |
| 56 | + minItems: 1 | |
| 57 | + items: | |
| 58 | + - description: | | |
| 59 | + adc_rdy: Interrupt line for DRDY signal which indicates the end of | |
| 60 | + conversion independently of the interface selected to read back the | |
| 61 | + Σ-∆ conversion. | |
| 62 | + - description: | | |
| 63 | + Alert: The chip includes self diagnostic features to guarantee the | |
| 64 | + correct operation. If an error is detected, the ALERT pin is pulled | |
| 65 | + high to generate an external interruption to the controller. | |
| 66 | + | |
| 67 | + interrupt-names: | |
| 68 | + minItems: 1 | |
| 69 | + maxItems: 2 | |
| 70 | + items: | |
| 71 | + enum: | |
| 72 | + - adc_rdy | |
| 73 | + - alert | |
| 74 | + | |
| 75 | + start-gpios: | |
| 76 | + description: | |
| 77 | + Pin that controls start synchronization pulse. | |
| 78 | + maxItems: 1 | |
| 79 | + | |
| 80 | + reset-gpios: | |
| 81 | + maxItems: 1 | |
| 82 | + | |
| 83 | +required: | |
| 84 | + - compatible | |
| 85 | + - reg | |
| 86 | + - clocks | |
| 87 | + - interrupts | |
| 88 | + | |
| 89 | +unevaluatedProperties: false | |
| 90 | + | |
| 91 | +examples: | |
| 92 | + - | | |
| 93 | + #include <dt-bindings/gpio/gpio.h> | |
| 94 | + #include <dt-bindings/interrupt-controller/irq.h> | |
| 95 | + spi { | |
| 96 | + #address-cells = <1>; | |
| 97 | + #size-cells = <0>; | |
| 98 | + | |
| 99 | + adc@0 { | |
| 100 | + compatible = "adi,ad7779"; | |
| 101 | + reg = <0>; | |
| 102 | + start-gpios = <&gpio0 87 GPIO_ACTIVE_LOW>; | |
| 103 | + reset-gpios = <&gpio0 93 GPIO_ACTIVE_LOW>; | |
| 104 | + interrupt-parent = <&intc>; | |
| 105 | + interrupts = <0 56 IRQ_TYPE_LEVEL_HIGH>; | |
| 106 | + interrupt-names = "adc_rdy"; | |
| 107 | + clocks = <&adc_clk>; | |
| 108 | + }; | |
| 109 | + }; | |
| 110 | +... | |
| @@ -98,6 +98,7 @@ allOf: · 97 unmodified lines | ||
| 98 | 98 | compatible: |
| 99 | 99 | contains: |
| 100 | 100 | enum: |
| 101 | + - amlogic,meson8-saradc | |
| 101 | 102 | - amlogic,meson8b-saradc |
| 102 | 103 | - amlogic,meson8m2-saradc |
| 103 | 104 | then: |
| @@ -0,0 +1,86 @@ | ||
| 1 | +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) | |
| 2 | +%YAML 1.2 | |
| 3 | +--- | |
| 4 | +$id: http://devicetree.org/schemas/iio/adc/gehc,pmc-adc.yaml# | |
| 5 | +$schema: http://devicetree.org/meta-schemas/core.yaml# | |
| 6 | + | |
| 7 | +title: GE HealthCare PMC Analog to Digital Converter (ADC) | |
| 8 | + | |
| 9 | +maintainers: | |
| 10 | + - Herve Codina <herve.codina@bootlin.com> | |
| 11 | + | |
| 12 | +description: | |
| 13 | + The GE HealthCare PMC ADC is a 16-Channel (voltage and current), 16-Bit ADC | |
| 14 | + with an I2C Interface. | |
| 15 | + | |
| 16 | +properties: | |
| 17 | + compatible: | |
| 18 | + const: gehc,pmc-adc | |
| 19 | + | |
| 20 | + reg: | |
| 21 | + maxItems: 1 | |
| 22 | + | |
| 23 | + vdd-supply: | |
| 24 | + description: | |
| 25 | + Regulator for the VDD power supply. | |
| 26 | + | |
| 27 | + vdda-supply: | |
| 28 | + description: | |
| 29 | + Regulator for the VDD analog (VDDA) power supply. | |
| 30 | + | |
| 31 | + vddio-supply: | |
| 32 | + description: | |
| 33 | + Regulator for the VDD IO (VDDIO) power supply. | |
| 34 | + | |
| 35 | + vref-supply: | |
| 36 | + description: | |
| 37 | + Regulator for the voltage reference power supply. | |
| 38 | + | |
| 39 | + clocks: | |
| 40 | + maxItems: 1 | |
| 41 | + description: | |
| 42 | + The component uses an external oscillator (osc) if an external oscillator | |
| 43 | + is connected to its clock pins. Otherwise, it uses an internal reference | |
| 44 | + clock. | |
| 45 | + | |
| 46 | + clock-names: | |
| 47 | + items: | |
| 48 | + - const: osc | |
| 49 | + | |
| 50 | + "#io-channel-cells": | |
| 51 | + const: 2 | |
| 52 | + description: | | |
| 53 | + The first cell is the channel type (dt-bindings/iio/adc/gehc,pmc-adc.h | |
| 54 | + defines these values): | |
| 55 | + - 0: voltage | |
| 56 | + - 1: current | |
| 57 | + The second cell is the channel number from 0 to 15. | |
| 58 | + | |
| 59 | +required: | |
| 60 | + - compatible | |
| 61 | + - reg | |
| 62 | + - vdd-supply | |
| 63 | + - vdda-supply | |
| 64 | + - vddio-supply | |
| 65 | + - vref-supply | |
| 66 | + - '#io-channel-cells' | |
| 67 | + | |
| 68 | +additionalProperties: false | |
| 69 | + | |
| 70 | +examples: | |
| 71 | + - | | |
| 72 | + i2c { | |
| 73 | + #address-cells = <1>; | |
| 74 | + #size-cells = <0>; | |
| 75 | + | |
| 76 | + adc@14 { | |
| 77 | + compatible = "gehc,pmc-adc"; | |
| 78 | + reg = <0x14>; | |
| 79 | + vdd-supply = <®_vdd>; | |
| 80 | + vdda-supply = <®_vdda>; | |
| 81 | + vddio-supply = <®_vddio>; | |
| 82 | + vref-supply = <®_vref>; | |
| 83 | + #io-channel-cells = <2>; | |
| 84 | + }; | |
| 85 | + }; | |
| 86 | +... | |
| @@ -30,7 +30,7 @@ properties: · 29 unmodified lines | ||
| 30 | 30 | maxItems: 1 |
| 31 | 31 | |
| 32 | 32 | spi-max-frequency: |
| 33 | − maximum: 30000000 | |
| 33 | + maximum: 66000000 | |
| 34 | 34 | |
| 35 | 35 | reset-gpios: |
| 36 | 36 | maxItems: 1 |
| @@ -60,6 +60,12 @@ properties: · 23 unmodified lines | ||
| 60 | 60 | $ref: /schemas/types.yaml#/definitions/uint32 |
| 61 | 61 | enum: [0, 1, 2, 3] |
| 62 | 62 | |
| 63 | + io-backends: | |
| 64 | + description: The iio backend reference. | |
| 65 | + Device can be optionally connected to the "axi-ad3552r IP" fpga-based | |
| 66 | + QSPI + DDR (Double Data Rate) controller to reach high speed transfers. | |
| 67 | + maxItems: 1 | |
| 68 | + | |
| 63 | 69 | '#address-cells': |
| 64 | 70 | const: 1 |
| 65 | 71 | |
| @@ -128,6 +134,7 @@ patternProperties: · 62 unmodified lines | ||
| 128 | 134 | - custom-output-range-config |
| 129 | 135 | |
| 130 | 136 | allOf: |
| 137 | + - $ref: /schemas/spi/spi-peripheral-props.yaml# | |
| 131 | 138 | - if: |
| 132 | 139 | properties: |
| 133 | 140 | compatible: |
| @@ -26,16 +26,47 @@ properties: · 25 unmodified lines | ||
| 26 | 26 | vdd-supply: true |
| 27 | 27 | vss-supply: true |
| 28 | 28 | |
| 29 | + vcc-supply: | |
| 30 | + description: | |
| 31 | + Supply that powers the chip. | |
| 32 | + | |
| 33 | + iovcc-supply: | |
| 34 | + description: | |
| 35 | + Supply for the digital interface. | |
| 36 | + | |
| 37 | + vrefp-supply: | |
| 38 | + description: | |
| 39 | + Positive referance input voltage range. From 5v to (vdd - 2.5) | |
| 40 | + | |
| 41 | + vrefn-supply: | |
| 42 | + description: | |
| 43 | + Negative referance input voltage range. From (vss + 2.5) to 0. | |
| 44 | + | |
| 29 | 45 | adi,rbuf-gain2-en: |
| 30 | 46 | description: Specify to allow an external amplifier to be connected in a |
| 31 | 47 | gain of two configuration. |
| 32 | 48 | type: boolean |
| 33 | 49 | |
| 50 | + reset-gpios: | |
| 51 | + maxItems: 1 | |
| 52 | + | |
| 53 | + clear-gpios: | |
| 54 | + maxItems: 1 | |
| 55 | + | |
| 56 | + ldac-gpios: | |
| 57 | + description: | |
| 58 | + LDAC pin to be used as a hardware trigger to update the DAC channels. | |
| 59 | + maxItems: 1 | |
| 60 | + | |
| 34 | 61 | required: |
| 35 | 62 | - compatible |
| 36 | 63 | - reg |
| 37 | 64 | - vdd-supply |
| 38 | 65 | - vss-supply |
| 66 | + - vcc-supply | |
| 67 | + - iovcc-supply | |
| 68 | + - vrefp-supply | |
| 69 | + - vrefn-supply | |
| 39 | 70 | |
| 40 | 71 | allOf: |
| 41 | 72 | - $ref: /schemas/spi/spi-peripheral-props.yaml# |
| @@ -44,6 +75,7 @@ unevaluatedProperties: false · 2 unmodified lines | ||
| 44 | 75 | |
| 45 | 76 | examples: |
| 46 | 77 | - | |
| 78 | + #include <dt-bindings/gpio/gpio.h> | |
| 47 | 79 | spi { |
| 48 | 80 | #address-cells = <1>; |
| 49 | 81 | #size-cells = <0>; |
| @@ -53,6 +85,13 @@ examples: · 3 unmodified lines | ||
| 53 | 85 | reg = <0>; |
| 54 | 86 | vss-supply = <&dac_vss>; |
| 55 | 87 | vdd-supply = <&dac_vdd>; |
| 88 | + vcc-supply = <&dac_vcc>; | |
| 89 | + iovcc-supply = <&dac_iovcc>; | |
| 90 | + vrefp-supply = <&dac_vrefp>; | |
| 91 | + vrefn-supply = <&dac_vrefn>; | |
| 92 | + reset-gpios = <&gpio_bd 16 GPIO_ACTIVE_LOW>; | |
| 93 | + clear-gpios = <&gpio_bd 17 GPIO_ACTIVE_LOW>; | |
| 94 | + ldac-gpios = <&gpio_bd 18 GPIO_ACTIVE_HIGH>; | |
| 56 | 95 | }; |
| 57 | 96 | }; |
| 58 | 97 | ... |
| @@ -0,0 +1,164 @@ | ||
| 1 | +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) | |
| 2 | +# Copyright 2024 Analog Devices Inc. | |
| 3 | +%YAML 1.2 | |
| 4 | +--- | |
| 5 | +$id: http://devicetree.org/schemas/iio/dac/adi,ad8460.yaml# | |
| 6 | +$schema: http://devicetree.org/meta-schemas/core.yaml# | |
| 7 | + | |
| 8 | +title: Analog Devices AD8460 DAC | |
| 9 | + | |
| 10 | +maintainers: | |
| 11 | + - Mariel Tinaco <mariel.tinaco@analog.com> | |
| 12 | + | |
| 13 | +description: | | |
| 14 | + Analog Devices AD8460 110 V High Voltage, 1 A High Current, | |
| 15 | + Arbitrary Waveform Generator with Integrated 14-Bit High Speed DAC | |
| 16 | + https://www.analog.com/media/en/technical-documentation/data-sheets/ad8460.pdf | |
| 17 | + | |
| 18 | +properties: | |
| 19 | + compatible: | |
| 20 | + enum: | |
| 21 | + - adi,ad8460 | |
| 22 | + | |
| 23 | + reg: | |
| 24 | + maxItems: 1 | |
| 25 | + | |
| 26 | + clocks: | |
| 27 | + maxItems: 1 | |
| 28 | + | |
| 29 | + dmas: | |
| 30 | + maxItems: 1 | |
| 31 | + | |
| 32 | + dma-names: | |
| 33 | + items: | |
| 34 | + - const: tx | |
| 35 | + | |
| 36 | + spi-max-frequency: | |
| 37 | + maximum: 20000000 | |
| 38 | + | |
| 39 | + hvcc-supply: | |
| 40 | + description: Positive high voltage power supply line | |
| 41 | + | |
| 42 | + hvee-supply: | |
| 43 | + description: Negative high voltage power supply line | |
| 44 | + | |
| 45 | + vcc-5v-supply: | |
| 46 | + description: Low voltage power supply | |
| 47 | + | |
| 48 | + vref-5v-supply: | |
| 49 | + description: Reference voltage for analog low voltage | |
| 50 | + | |
| 51 | + dvdd-3p3v-supply: | |
| 52 | + description: Digital supply bypass | |
| 53 | + | |
| 54 | + avdd-3p3v-supply: | |
| 55 | + description: Analog supply bypass | |
| 56 | + | |
| 57 | + refio-1p2v-supply: | |
| 58 | + description: Drive voltage in the range of 1.2V maximum to as low as | |
| 59 | + low as 0.12V through the REF_IO pin to adjust full scale output span | |
| 60 | + | |
| 61 | + adi,external-resistor-ohms: | |
| 62 | + description: Specify value of external resistor connected to FS_ADJ pin | |
| 63 | + to establish internal HVDAC's reference current I_REF | |
| 64 | + minimum: 2000 | |
| 65 | + maximum: 20000 | |
| 66 | + default: 2000 | |
| 67 | + | |
| 68 | + adi,range-microvolt: | |
| 69 | + description: Voltage output range specified as <minimum, maximum> | |
| 70 | + items: | |
| 71 | + - minimum: -55000000 | |
| 72 | + maximum: 0 | |
| 73 | + default: 0 | |
| 74 | + - minimum: 0 | |
| 75 | + maximum: 55000000 | |
| 76 | + default: 0 | |
| 77 | + | |
| 78 | + adi,range-microamp: | |
| 79 | + description: Current output range specified as <minimum, maximum> | |
| 80 | + items: | |
| 81 | + - minimum: -1000000 | |
| 82 | + maximum: 0 | |
| 83 | + default: 0 | |
| 84 | + - minimum: 0 | |
| 85 | + maximum: 1000000 | |
| 86 | + default: 0 | |
| 87 | + | |
| 88 | + adi,max-millicelsius: | |
| 89 | + description: Overtemperature threshold | |
| 90 | + minimum: 0 | |
| 91 | + maximum: 150000 | |
| 92 | + default: 0 | |
| 93 | + | |
| 94 | + shutdown-reset-gpios: | |
| 95 | + description: Corresponds to SDN_RESET pin. To exit shutdown | |
| 96 | + or sleep mode, pulse SDN_RESET HIGH, then leave LOW. | |
| 97 | + maxItems: 1 | |
| 98 | + | |
| 99 | + reset-gpios: | |
| 100 | + description: Manual Power On Reset (POR). Pull this GPIO pin | |
| 101 | + LOW and then HIGH to reset all digital registers to default | |
| 102 | + maxItems: 1 | |
| 103 | + | |
| 104 | + shutdown-gpios: | |
| 105 | + description: Corresponds to SDN_IO pin. Shutdown may be | |
| 106 | + initiated by the user, by pulsing SDN_IO high. To exit shutdown, | |
| 107 | + pulse SDN_IO low, then float. | |
| 108 | + maxItems: 1 | |
| 109 | + | |
| 110 | +required: | |
| 111 | + - compatible | |
| 112 | + - reg | |
| 113 | + - clocks | |
| 114 | + - hvcc-supply | |
| 115 | + - hvee-supply | |
| 116 | + - vcc-5v-supply | |
| 117 | + - vref-5v-supply | |
| 118 | + - dvdd-3p3v-supply | |
| 119 | + - avdd-3p3v-supply | |
| 120 | + - refio-1p2v-supply | |
| 121 | + | |
| 122 | +allOf: | |
| 123 | + - $ref: /schemas/spi/spi-peripheral-props.yaml# | |
| 124 | + | |
| 125 | +unevaluatedProperties: false | |
| 126 | + | |
| 127 | +examples: | |
| 128 | + - | | |
| 129 | + #include <dt-bindings/gpio/gpio.h> | |
| 130 | + | |
| 131 | + spi { | |
| 132 | + #address-cells = <1>; | |
| 133 | + #size-cells = <0>; | |
| 134 | + | |
| 135 | + dac@0 { | |
| 136 | + compatible = "adi,ad8460"; | |
| 137 | + reg = <0>; | |
| 138 | + spi-max-frequency = <8000000>; | |
| 139 | + | |
| 140 | + dmas = <&tx_dma 0>; | |
| 141 | + dma-names = "tx"; | |
| 142 | + | |
| 143 | + shutdown-reset-gpios = <&gpio 86 GPIO_ACTIVE_HIGH>; | |
| 144 | + reset-gpios = <&gpio 91 GPIO_ACTIVE_LOW>; | |
| 145 | + shutdown-gpios = <&gpio 88 GPIO_ACTIVE_HIGH>; | |
| 146 | + | |
| 147 | + clocks = <&sync_ext_clk>; | |
| 148 | + | |
| 149 | + hvcc-supply = <&hvcc>; | |
| 150 | + hvee-supply = <&hvee>; | |
| 151 | + vcc-5v-supply = <&vcc_5>; | |
| 152 | + vref-5v-supply = <&vref_5>; | |
| 153 | + dvdd-3p3v-supply = <&dvdd_3_3>; | |
| 154 | + avdd-3p3v-supply = <&avdd_3_3>; | |
| 155 | + refio-1p2v-supply = <&refio_1_2>; | |
| 156 | + | |
| 157 | + adi,external-resistor-ohms = <2000>; | |
| 158 | + adi,range-microvolt = <(-40000000) 40000000>; | |
| 159 | + adi,range-microamp = <0 50000>; | |
| 160 | + adi,max-millicelsius = <50000>; | |
| 161 | + }; | |
| 162 | + }; | |
| 163 | + | |
| 164 | +... | |
| @@ -19,11 +19,13 @@ description: | · 18 unmodified lines | ||
| 19 | 19 | memory via DMA into the DAC. |
| 20 | 20 | |
| 21 | 21 | https://wiki.analog.com/resources/fpga/docs/axi_dac_ip |
| 22 | + https://analogdevicesinc.github.io/hdl/library/axi_ad3552r/index.html | |
| 22 | 23 | |
| 23 | 24 | properties: |
| 24 | 25 | compatible: |
| 25 | 26 | enum: |
| 26 | 27 | - adi,axi-dac-9.1.b |
| 28 | + - adi,axi-ad3552r | |
| 27 | 29 | |
| 28 | 30 | reg: |
| 29 | 31 | maxItems: 1 |
| @@ -36,7 +38,14 @@ properties: · 6 unmodified lines | ||
| 36 | 38 | - const: tx |
| 37 | 39 | |
| 38 | 40 | clocks: |
| 39 | − maxItems: 1 | |
| 41 | + minItems: 1 | |
| 42 | + maxItems: 2 | |
| 43 | + | |
| 44 | + clock-names: | |
| 45 | + items: | |
| 46 | + - const: s_axi_aclk | |
| 47 | + - const: dac_clk | |
| 48 | + minItems: 1 | |
| 40 | 49 | |
| 41 | 50 | '#io-backend-cells': |
| 42 | 51 | const: 0 |
| @@ -47,7 +56,29 @@ required: · 4 unmodified lines | ||
| 47 | 56 | - reg |
| 48 | 57 | - clocks |
| 49 | 58 | |
| 50 | −additionalProperties: false | |
| 59 | +allOf: | |
| 60 | + - if: | |
| 61 | + properties: | |
| 62 | + compatible: | |
| 63 | + contains: | |
| 64 | + const: adi,axi-ad3552r | |
| 65 | + then: | |
| 66 | + $ref: /schemas/spi/spi-controller.yaml# | |
| 67 | + properties: | |
| 68 | + clocks: | |
| 69 | + minItems: 2 | |
| 70 | + clock-names: | |
| 71 | + minItems: 2 | |
| 72 | + required: | |
| 73 | + - clock-names | |
| 74 | + else: | |
| 75 | + properties: | |
| 76 | + clocks: | |
| 77 | + maxItems: 1 | |
| 78 | + clock-names: | |
| 79 | + maxItems: 1 | |
| 80 | + | |
| 81 | +unevaluatedProperties: false | |
| 51 | 82 | |
| 52 | 83 | examples: |
| 53 | 84 | - | |
| @@ -57,6 +88,38 @@ examples: · 3 unmodified lines | ||
| 57 | 88 | dmas = <&tx_dma 0>; |
| 58 | 89 | dma-names = "tx"; |
| 59 | 90 | #io-backend-cells = <0>; |
| 60 | − clocks = <&axi_clk>; | |
| 91 | + clocks = <&clkc 15>; | |
| 92 | + clock-names = "s_axi_aclk"; | |
| 93 | + }; | |
| 94 | + | |
| 95 | + - | | |
| 96 | + #include <dt-bindings/gpio/gpio.h> | |
| 97 | + axi_dac: spi@44a70000 { | |
| 98 | + compatible = "adi,axi-ad3552r"; | |
| 99 | + reg = <0x44a70000 0x1000>; | |
| 100 | + dmas = <&dac_tx_dma 0>; | |
| 101 | + dma-names = "tx"; | |
| 102 | + #io-backend-cells = <0>; | |
| 103 | + clocks = <&clkc 15>, <&ref_clk>; | |
| 104 | + clock-names = "s_axi_aclk", "dac_clk"; | |
| 105 | + | |
| 106 | + #address-cells = <1>; | |
| 107 | + #size-cells = <0>; | |
| 108 | + | |
| 109 | + dac@0 { | |
| 110 | + compatible = "adi,ad3552r"; | |
| 111 | + reg = <0>; | |
| 112 | + reset-gpios = <&gpio0 92 GPIO_ACTIVE_HIGH>; | |
| 113 | + io-backends = <&axi_dac>; | |
| 114 | + spi-max-frequency = <20000000>; | |
| 115 | + | |
| 116 | + #address-cells = <1>; | |
| 117 | + #size-cells = <0>; | |
| 118 | + | |
| 119 | + channel@0 { | |
| 120 | + reg = <0>; | |
| 121 | + adi,output-range-microvolt = <(-10000000) (10000000)>; | |
| 122 | + }; | |
| 123 | + }; | |
| 61 | 124 | }; |
| 62 | 125 | ... |
| @@ -0,0 +1,79 @@ | ||
| 1 | +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) | |
| 2 | +%YAML 1.2 | |
| 3 | +--- | |
| 4 | +$id: http://devicetree.org/schemas/iio/imu/bosch,bmi270.yaml# | |
| 5 | +$schema: http://devicetree.org/meta-schemas/core.yaml# | |
| 6 | + | |
| 7 | +title: Bosch BMI270 6-Axis IMU | |
| 8 | + | |
| 9 | +maintainers: | |
| 10 | + - Alex Lanzano <lanzano.alex@gmail.com> | |
| 11 | + | |
| 12 | +description: | | |
| 13 | + BMI270 is a 6-axis inertial measurement unit that can measure acceleration and | |
| 14 | + angular velocity. The sensor also supports configurable interrupt events such | |
| 15 | + as motion, step counter, and wrist motion gestures. The sensor can communicate | |
| 16 | + I2C or SPI. | |
| 17 | + https://www.bosch-sensortec.com/products/motion-sensors/imus/bmi270/ | |
| 18 | + | |
| 19 | +properties: | |
| 20 | + compatible: | |
| 21 | + enum: | |
| 22 | + - bosch,bmi260 | |
| 23 | + - bosch,bmi270 | |
| 24 | + | |
| 25 | + reg: | |
| 26 | + maxItems: 1 | |
| 27 | + | |
| 28 | + vdd-supply: true | |
| 29 | + vddio-supply: true | |
| 30 | + | |
| 31 | + interrupts: | |
| 32 | + minItems: 1 | |
| 33 | + maxItems: 2 | |
| 34 | + | |
| 35 | + interrupt-names: | |
| 36 | + minItems: 1 | |
| 37 | + maxItems: 2 | |
| 38 | + items: | |
| 39 | + enum: | |
| 40 | + - INT1 | |
| 41 | + - INT2 | |
| 42 | + | |
| 43 | + drive-open-drain: | |
| 44 | + description: | |
| 45 | + set if the specified interrupt pins should be configured as | |
| 46 | + open drain. If not set, defaults to push-pull. | |
| 47 | + | |
| 48 | + mount-matrix: | |
| 49 | + description: | |
| 50 | + an optional 3x3 mounting rotation matrix. | |
| 51 | + | |
| 52 | +required: | |
| 53 | + - compatible | |
| 54 | + - reg | |
| 55 | + - vdd-supply | |
| 56 | + - vddio-supply | |
| 57 | + | |
| 58 | +allOf: | |
| 59 | + - $ref: /schemas/spi/spi-peripheral-props.yaml# | |
| 60 | + | |
| 61 | +unevaluatedProperties: false | |
| 62 | + | |
| 63 | +examples: | |
| 64 | + - | | |
| 65 | + #include <dt-bindings/interrupt-controller/irq.h> | |
| 66 | + i2c { | |
| 67 | + #address-cells = <1>; | |
| 68 | + #size-cells = <0>; | |
| 69 | + | |
| 70 | + imu@68 { | |
| 71 | + compatible = "bosch,bmi270"; | |
| 72 | + reg = <0x68>; | |
| 73 | + vdd-supply = <&vdd>; | |
| 74 | + vddio-supply = <&vddio>; | |
| 75 | + interrupt-parent = <&gpio1>; | |
| 76 | + interrupts = <16 IRQ_TYPE_EDGE_RISING>; | |
| 77 | + interrupt-names = "INT1"; | |
| 78 | + }; | |
| 79 | + }; | |
| @@ -0,0 +1,51 @@ | ||
| 1 | +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) | |
| 2 | +%YAML 1.2 | |
| 3 | +--- | |
| 4 | +$id: http://devicetree.org/schemas/iio/imu/bosch,smi240.yaml# | |
| 5 | +$schema: http://devicetree.org/meta-schemas/core.yaml# | |
| 6 | + | |
| 7 | +title: Bosch smi240 imu | |
| 8 | + | |
| 9 | +maintainers: | |
| 10 | + - Jianping Shen <Jianping.Shen@de.bosch.com> | |
| 11 | + | |
| 12 | +description: | |
| 13 | + Inertial Measurement Unit with Accelerometer and Gyroscope | |
| 14 | + with a measurement range of +/-300°/s and up to 16g. | |
| 15 | + https://www.bosch-semiconductors.com/mems-sensors/highly-automated-driving/smi240/ | |
| 16 | + | |
| 17 | +properties: | |
| 18 | + compatible: | |
| 19 | + const: bosch,smi240 | |
| 20 | + | |
| 21 | + reg: | |
| 22 | + maxItems: 1 | |
| 23 | + | |
| 24 | + vdd-supply: true | |
| 25 | + vddio-supply: true | |
| 26 | + | |
| 27 | +required: | |
| 28 | + - compatible | |
| 29 | + - reg | |
| 30 | + - vdd-supply | |
| 31 | + - vddio-supply | |
| 32 | + | |
| 33 | +allOf: | |
| 34 | + - $ref: /schemas/spi/spi-peripheral-props.yaml# | |
| 35 | + | |
| 36 | +unevaluatedProperties: false | |
| 37 | + | |
| 38 | +examples: | |
| 39 | + - | | |
| 40 | + spi { | |
| 41 | + #address-cells = <1>; | |
| 42 | + #size-cells = <0>; | |
| 43 | + | |
| 44 | + imu@0 { | |
| 45 | + compatible = "bosch,smi240"; | |
| 46 | + reg = <0>; | |
| 47 | + vdd-supply = <&vdd>; | |
| 48 | + vddio-supply = <&vddio>; | |
| 49 | + spi-max-frequency = <10000000>; | |
| 50 | + }; | |
| 51 | + }; | |
| @@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# · 6 unmodified lines | ||
| 7 | 7 | title: InvenSense ICM-426xx Inertial Measurement Unit |
| 8 | 8 | |
| 9 | 9 | maintainers: |
| 10 | − - Jean-Baptiste Maneyrol <jmaneyrol@invensense.com> | |
| 10 | + - Jean-Baptiste Maneyrol <jean-baptiste.maneyrol@tdk.com> | |
| 11 | 11 | |
| 12 | 12 | description: | |
| 13 | 13 | 6-axis MotionTracking device that combines a 3-axis gyroscope and a 3-axis |
| @@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# · 6 unmodified lines | ||
| 7 | 7 | title: InvenSense MPU-6050 Six-Axis (Gyro + Accelerometer) MEMS MotionTracking Device |
| 8 | 8 | |
| 9 | 9 | maintainers: |
| 10 | − - Jean-Baptiste Maneyrol <jmaneyrol@invensense.com> | |
| 10 | + - Jean-Baptiste Maneyrol <jean-baptiste.maneyrol@tdk.com> | |
| 11 | 11 | |
| 12 | 12 | description: | |
| 13 | 13 | These devices support both I2C and SPI bus interfaces. |
| @@ -36,6 +36,11 @@ properties: · 22 unmodified lines | ||
| 36 | 36 | - items: |
| 37 | 37 | - const: invensense,icm20608d |
| 38 | 38 | - const: invensense,icm20608 |
| 39 | + - items: | |
| 40 | + - enum: | |
| 41 | + - invensense,iam20680hp | |
| 42 | + - invensense,iam20680ht | |
| 43 | + - const: invensense,iam20680 | |
| 39 | 44 | |
| 40 | 45 | reg: |
| 41 | 46 | maxItems: 1 |
| @@ -15,7 +15,9 @@ description: | · 14 unmodified lines | ||
| 15 | 15 | |
| 16 | 16 | properties: |
| 17 | 17 | compatible: |
| 18 | − const: ti,opt3001 | |
| 18 | + enum: | |
| 19 | + - ti,opt3001 | |
| 20 | + - ti,opt3002 | |
| 19 | 21 | |
| 20 | 22 | reg: |
| 21 | 23 | maxItems: 1 |
| @@ -1,64 +0,0 @@ | ||
| 1 | −# SPDX-License-Identifier: GPL-2.0+ | |
| 2 | −%YAML 1.2 | |
| 3 | −--- | |
| 4 | −$id: http://devicetree.org/schemas/iio/light/veml6030.yaml# | |
| 5 | −$schema: http://devicetree.org/meta-schemas/core.yaml# | |
| 6 | − | |
| 7 | −title: VEML6030 Ambient Light Sensor (ALS) | |
| 8 | − | |
| 9 | −maintainers: | |
| 10 | − - Rishi Gupta <gupt21@gmail.com> | |
| 11 | − | |
| 12 | −description: | | |
| 13 | − Bindings for the ambient light sensor veml6030 from Vishay | |
| 14 | − Semiconductors over an i2c interface. | |
| 15 | − | |
| 16 | − Irrespective of whether interrupt is used or not, application | |
| 17 | − can get the ALS and White channel reading from IIO raw interface. | |
| 18 | − | |
| 19 | − If the interrupts are used, application will receive an IIO event | |
| 20 | − whenever configured threshold is crossed. | |
| 21 | − | |
| 22 | − Specifications about the sensor can be found at: | |
| 23 | − https://www.vishay.com/docs/84366/veml6030.pdf | |
| 24 | − | |
| 25 | −properties: | |
| 26 | − compatible: | |
| 27 | − enum: | |
| 28 | − - vishay,veml6030 | |
| 29 | − | |
| 30 | − reg: | |
| 31 | − description: | |
| 32 | − I2C address of the device. | |
| 33 | − enum: | |
| 34 | − - 0x10 # ADDR pin pulled down | |
| 35 | − - 0x48 # ADDR pin pulled up | |
| 36 | − | |
| 37 | − interrupts: | |
| 38 | − description: | |
| 39 | − interrupt mapping for IRQ. Configure with IRQ_TYPE_LEVEL_LOW. | |
| 40 | − Refer to interrupt-controller/interrupts.txt for generic | |
| 41 | − interrupt client node bindings. | |
| 42 | − maxItems: 1 | |
| 43 | − | |
| 44 | −required: | |
| 45 | − - compatible | |
| 46 | − - reg | |
| 47 | − | |
| 48 | −additionalProperties: false | |
| 49 | − | |
| 50 | −examples: | |
| 51 | − - | | |
| 52 | − #include <dt-bindings/interrupt-controller/irq.h> | |
| 53 | − | |
| 54 | − i2c { | |
| 55 | − #address-cells = <1>; | |
| 56 | − #size-cells = <0>; | |
| 57 | − | |
| 58 | − light-sensor@10 { | |
| 59 | − compatible = "vishay,veml6030"; | |
| 60 | − reg = <0x10>; | |
| 61 | − interrupts = <12 IRQ_TYPE_LEVEL_LOW>; | |
| 62 | − }; | |
| 63 | − }; | |
| 64 | −... | |
| @@ -0,0 +1,107 @@ | ||
| 1 | +# SPDX-License-Identifier: GPL-2.0+ | |
| 2 | +%YAML 1.2 | |
| 3 | +--- | |
| 4 | +$id: http://devicetree.org/schemas/iio/light/vishay,veml6030.yaml# | |
| 5 | +$schema: http://devicetree.org/meta-schemas/core.yaml# | |
| 6 | + | |
| 7 | +title: VEML3235, VEML6030, VEML6035 and VEML7700 Ambient Light Sensors (ALS) | |
| 8 | + | |
| 9 | +maintainers: | |
| 10 | + - Rishi Gupta <gupt21@gmail.com> | |
| 11 | + | |
| 12 | +description: | | |
| 13 | + Bindings for the ambient light sensors veml6030 and veml6035 from | |
| 14 | + Vishay Semiconductors over an i2c interface. | |
| 15 | + | |
| 16 | + Irrespective of whether interrupt is used or not, application | |
| 17 | + can get the ALS and White channel reading from IIO raw interface. | |
| 18 | + | |
| 19 | + If the interrupts are used, application will receive an IIO event | |
| 20 | + whenever configured threshold is crossed. | |
| 21 | + | |
| 22 | + Specifications about the sensors can be found at: | |
| 23 | + https://www.vishay.com/docs/80131/veml3235.pdf | |
| 24 | + https://www.vishay.com/docs/84366/veml6030.pdf | |
| 25 | + https://www.vishay.com/docs/84889/veml6035.pdf | |
| 26 | + https://www.vishay.com/docs/84286/veml7700.pdf | |
| 27 | + | |
| 28 | +properties: | |
| 29 | + compatible: | |
| 30 | + enum: | |
| 31 | + - vishay,veml3235 | |
| 32 | + - vishay,veml6030 | |
| 33 | + - vishay,veml6035 | |
| 34 | + - vishay,veml7700 | |
| 35 | + | |
| 36 | + reg: | |
| 37 | + maxItems: 1 | |
| 38 | + | |
| 39 | + interrupts: | |
| 40 | + description: | |
| 41 | + interrupt mapping for IRQ. Configure with IRQ_TYPE_LEVEL_LOW. | |
| 42 | + Refer to interrupt-controller/interrupts.txt for generic | |
| 43 | + interrupt client node bindings. | |
| 44 | + maxItems: 1 | |
| 45 | + | |
| 46 | + vdd-supply: true | |
| 47 | + | |
| 48 | +required: | |
| 49 | + - compatible | |
| 50 | + - reg | |
| 51 | + - vdd-supply | |
| 52 | + | |
| 53 | +allOf: | |
| 54 | + - if: | |
| 55 | + properties: | |
| 56 | + compatible: | |
| 57 | + enum: | |
| 58 | + - vishay,veml6030 | |
| 59 | + then: | |
| 60 | + properties: | |
| 61 | + reg: | |
| 62 | + enum: | |
| 63 | + - 0x10 # ADDR pin pulled down | |
| 64 | + - 0x48 # ADDR pin pulled up | |
| 65 | + | |
| 66 | + - if: | |
| 67 | + properties: | |
| 68 | + compatible: | |
| 69 | + enum: | |
| 70 | + - vishay,veml6035 | |
| 71 | + then: | |
| 72 | + properties: | |
| 73 | + reg: | |
| 74 | + enum: | |
| 75 | + - 0x29 | |
| 76 | + | |
| 77 | + - if: | |
| 78 | + properties: | |
| 79 | + compatible: | |
| 80 | + enum: | |
| 81 | + - vishay,veml3235 | |
| 82 | + - vishay,veml7700 | |
| 83 | + then: | |
| 84 | + properties: | |
| 85 | + reg: | |
| 86 | + enum: | |
| 87 | + - 0x10 | |
| 88 | + interrupts: false | |
| 89 | + | |
| 90 | +additionalProperties: false | |
| 91 | + | |
| 92 | +examples: | |
| 93 | + - | | |
| 94 | + #include <dt-bindings/interrupt-controller/irq.h> | |
| 95 | + | |
| 96 | + i2c { | |
| 97 | + #address-cells = <1>; | |
| 98 | + #size-cells = <0>; | |
| 99 | + | |
| 100 | + light-sensor@10 { | |
| 101 | + compatible = "vishay,veml6030"; | |
| 102 | + reg = <0x10>; | |
| 103 | + interrupts = <12 IRQ_TYPE_LEVEL_LOW>; | |
| 104 | + vdd-supply = <&vdd>; | |
| 105 | + }; | |
| 106 | + }; | |
| 107 | +... | |
| @@ -4,7 +4,7 @@ · 3 unmodified lines | ||
| 4 | 4 | $id: http://devicetree.org/schemas/iio/light/vishay,veml6075.yaml# |
| 5 | 5 | $schema: http://devicetree.org/meta-schemas/core.yaml# |
| 6 | 6 | |
| 7 | −title: Vishay VEML6075 UVA/B and VEML6040 RGBW sensors | |
| 7 | +title: Vishay VEML6070 UVA, VEML6075 UVA/B and VEML6040 RGBW sensors | |
| 8 | 8 | |
| 9 | 9 | maintainers: |
| 10 | 10 | - Javier Carrasco <javier.carrasco.cruz@gmail.com> |
| @@ -16,11 +16,19 @@ properties: · 5 unmodified lines | ||
| 16 | 16 | compatible: |
| 17 | 17 | enum: |
| 18 | 18 | - vishay,veml6040 |
| 19 | + - vishay,veml6070 | |
| 19 | 20 | - vishay,veml6075 |
| 20 | 21 | |
| 21 | 22 | reg: |
| 22 | 23 | maxItems: 1 |
| 23 | 24 | |
| 25 | + vishay,rset-ohms: | |
| 26 | + description: | |
| 27 | + Resistor used to select the integration time. | |
| 28 | + default: 270000 | |
| 29 | + minimum: 75000 | |
| 30 | + maximum: 1200000 | |
| 31 | + | |
| 24 | 32 | vdd-supply: true |
| 25 | 33 | |
| 26 | 34 | required: |
| @@ -28,6 +36,17 @@ required: · 1 unmodified line | ||
| 28 | 36 | - reg |
| 29 | 37 | - vdd-supply |
| 30 | 38 | |
| 39 | +allOf: | |
| 40 | + - if: | |
| 41 | + properties: | |
| 42 | + compatible: | |
| 43 | + enum: | |
| 44 | + - vishay,veml6040 | |
| 45 | + - vishay,veml6075 | |
| 46 | + then: | |
| 47 | + properties: | |
| 48 | + vishay,rset-ohms: false | |
| 49 | + | |
| 31 | 50 | additionalProperties: false |
| 32 | 51 | |
| 33 | 52 | examples: |
| @@ -0,0 +1,46 @@ | ||
| 1 | +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause | |
| 2 | +%YAML 1.2 | |
| 3 | +--- | |
| 4 | +$id: http://devicetree.org/schemas/iio/magnetometer/allegromicro,als31300.yaml# | |
| 5 | +$schema: http://devicetree.org/meta-schemas/core.yaml# | |
| 6 | + | |
| 7 | +title: Allegro MicroSystems ALS31300 3-D Linear Hall Effect sensor | |
| 8 | + | |
| 9 | +maintainers: | |
| 10 | + - Neil Armstrong <neil.armstrong@linaro.org> | |
| 11 | + | |
| 12 | +properties: | |
| 13 | + $nodename: | |
| 14 | + pattern: '^magnetometer@[0-9a-f]+$' | |
| 15 | + | |
| 16 | + compatible: | |
| 17 | + enum: | |
| 18 | + - allegromicro,als31300-500 # Factory configured at 500 Gauss input range | |
| 19 | + - allegromicro,als31300-1000 # Factory configured at 1000 Gauss input range | |
| 20 | + - allegromicro,als31300-2000 # Factory configured at 2000 Gauss input range | |
| 21 | + | |
| 22 | + reg: | |
| 23 | + maxItems: 1 | |
| 24 | + | |
| 25 | + vcc-supply: | |
| 26 | + description: 5.5V supply | |
| 27 | + | |
| 28 | + interrupts: | |
| 29 | + maxItems: 1 | |
| 30 | + | |
| 31 | +required: | |
| 32 | + - compatible | |
| 33 | + | |
| 34 | +additionalProperties: false | |
| 35 | + | |
| 36 | +examples: | |
| 37 | + - | | |
| 38 | + i2c { | |
| 39 | + #address-cells = <1>; | |
| 40 | + #size-cells = <0>; | |
| 41 | + magnetometer@61 { | |
| 42 | + compatible = "allegromicro,als31300-500"; | |
| 43 | + reg = <0x61>; | |
| 44 | + vcc-supply = <&hall_vcc>; | |
| 45 | + }; | |
| 46 | + }; | |
| @@ -47,15 +47,33 @@ properties: · 46 unmodified lines | ||
| 47 | 47 | maxItems: 1 |
| 48 | 48 | |
| 49 | 49 | interrupts: |
| 50 | − description: | |
| 51 | − interrupt mapping for IRQ (BMP085 only) | |
| 52 | 50 | maxItems: 1 |
| 53 | 51 | |
| 52 | + drive-open-drain: | |
| 53 | + description: | |
| 54 | + set if the interrupt pin should be configured as open drain. | |
| 55 | + If not set, defaults to push-pull configuration. | |
| 56 | + type: boolean | |
| 57 | + | |
| 54 | 58 | required: |
| 55 | 59 | - compatible |
| 56 | 60 | - vddd-supply |
| 57 | 61 | - vdda-supply |
| 58 | 62 | |
| 63 | +allOf: | |
| 64 | + - if: | |
| 65 | + properties: | |
| 66 | + compatible: | |
| 67 | + not: | |
| 68 | + contains: | |
| 69 | + enum: | |
| 70 | + - bosch,bmp085 | |
| 71 | + - bosch,bmp380 | |
| 72 | + - bosch,bmp580 | |
| 73 | + then: | |
| 74 | + properties: | |
| 75 | + interrupts: false | |
| 76 | + | |
| 59 | 77 | additionalProperties: false |
| 60 | 78 | |
| 61 | 79 | examples: |
| @@ -23,6 +23,9 @@ properties: · 22 unmodified lines | ||
| 23 | 23 | vdd-supply: |
| 24 | 24 | description: provide VDD power to the sensor. |
| 25 | 25 | |
| 26 | + interrupts: | |
| 27 | + maxItems: 1 | |
| 28 | + | |
| 26 | 29 | required: |
| 27 | 30 | - compatible |
| 28 | 31 | - reg |
| @@ -31,6 +34,7 @@ additionalProperties: false · 2 unmodified lines | ||
| 31 | 34 | |
| 32 | 35 | examples: |
| 33 | 36 | - | |
| 37 | + #include <dt-bindings/interrupt-controller/irq.h> | |
| 34 | 38 | i2c { |
| 35 | 39 | #address-cells = <1>; |
| 36 | 40 | #size-cells = <0>; |
| @@ -38,5 +42,7 @@ examples: · 1 unmodified line | ||
| 38 | 42 | compatible = "ti,tmp006"; |
| 39 | 43 | reg = <0x40>; |
| 40 | 44 | vdd-supply = <&ldo4_reg>; |
| 45 | + interrupt-parent = <&gpio1>; | |
| 46 | + interrupts = <4 IRQ_TYPE_EDGE_FALLING>; | |
| 41 | 47 | }; |
| 42 | 48 | }; |
| @@ -28,6 +28,7 @@ properties: · 27 unmodified lines | ||
| 28 | 28 | - mediatek,mt6331-keys |
| 29 | 29 | - mediatek,mt6357-keys |
| 30 | 30 | - mediatek,mt6358-keys |
| 31 | + - mediatek,mt6359-keys | |
| 31 | 32 | - mediatek,mt6397-keys |
| 32 | 33 | |
| 33 | 34 | power-off-time-sec: true |
| @@ -41,7 +41,7 @@ properties: · 40 unmodified lines | ||
| 41 | 41 | device, hence no steps need to be passed. |
| 42 | 42 | |
| 43 | 43 | rotary-encoder,rollover: |
| 44 | − $ref: /schemas/types.yaml#/definitions/int32 | |
| 44 | + $ref: /schemas/types.yaml#/definitions/flag | |
| 45 | 45 | description: |
| 46 | 46 | Automatic rollover when the rotary value becomes |
| 47 | 47 | greater than the specified steps or smaller than 0. For absolute axis only. |
| @@ -0,0 +1,62 @@ | ||
| 1 | +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) | |
| 2 | +%YAML 1.2 | |
| 3 | +--- | |
| 4 | +$id: http://devicetree.org/schemas/input/touchscreen/novatek,nvt-ts.yaml# | |
| 5 | +$schema: http://devicetree.org/meta-schemas/core.yaml# | |
| 6 | + | |
| 7 | +title: Novatek NVT Touchscreen Controller | |
| 8 | + | |
| 9 | +maintainers: | |
| 10 | + - Hans de Goede <hdegoede@redhat.com> | |
| 11 | + | |
| 12 | +allOf: | |
| 13 | + - $ref: touchscreen.yaml# | |
| 14 | + | |
| 15 | +properties: | |
| 16 | + compatible: | |
| 17 | + enum: | |
| 18 | + - novatek,nt11205-ts | |
| 19 | + - novatek,nt36672a-ts | |
| 20 | + | |
| 21 | + reg: | |
| 22 | + maxItems: 1 | |
| 23 | + | |
| 24 | + interrupts: | |
| 25 | + maxItems: 1 | |
| 26 | + | |
| 27 | + reset-gpios: | |
| 28 | + maxItems: 1 | |
| 29 | + | |
| 30 | + vcc-supply: true | |
| 31 | + iovcc-supply: true | |
| 32 | + | |
| 33 | +required: | |
| 34 | + - compatible | |
| 35 | + - reg | |
| 36 | + - interrupts | |
| 37 | + | |
| 38 | +unevaluatedProperties: false | |
| 39 | + | |
| 40 | +examples: | |
| 41 | + - | | |
| 42 | + #include <dt-bindings/gpio/gpio.h> | |
| 43 | + #include <dt-bindings/interrupt-controller/arm-gic.h> | |
| 44 | + i2c { | |
| 45 | + #address-cells = <1>; | |
| 46 | + #size-cells = <0>; | |
| 47 | + touchscreen@1 { | |
| 48 | + compatible = "novatek,nt36672a-ts"; | |
| 49 | + reg = <0x01>; | |
| 50 | + interrupts-extended = <&tlmm 31 IRQ_TYPE_EDGE_RISING>; | |
| 51 | + reset-gpios = <&tlmm 32 GPIO_ACTIVE_LOW>; | |
| 52 | + vcc-supply = <&vreg_l22a_2p85>; | |
| 53 | + iovcc-supply = <&vreg_l14a_1p8>; | |
| 54 | + pinctrl-0 = <&ts_int_default &ts_reset_default>; | |
| 55 | + pinctrl-1 = <&ts_int_sleep &ts_reset_sleep>; | |
| 56 | + pinctrl-names = "default", "sleep"; | |
| 57 | + touchscreen-size-x = <1080>; | |
| 58 | + touchscreen-size-y = <2246>; | |
| 59 | + }; | |
| 60 | + }; | |
| 61 | + | |
| 62 | +... | |
| @@ -26,6 +26,7 @@ properties: · 25 unmodified lines | ||
| 26 | 26 | - items: |
| 27 | 27 | - enum: |
| 28 | 28 | - qcom,qcm2290-cpu-bwmon |
| 29 | + - qcom,qcs8300-cpu-bwmon | |
| 29 | 30 | - qcom,sa8775p-cpu-bwmon |
| 30 | 31 | - qcom,sc7180-cpu-bwmon |
| 31 | 32 | - qcom,sc7280-cpu-bwmon |
| @@ -40,6 +41,7 @@ properties: · 8 unmodified lines | ||
| 40 | 41 | - const: qcom,sdm845-bwmon # BWMON v4, unified register space |
| 41 | 42 | - items: |
| 42 | 43 | - enum: |
| 44 | + - qcom,qcs8300-llcc-bwmon | |
| 43 | 45 | - qcom,sa8775p-llcc-bwmon |
| 44 | 46 | - qcom,sc7180-llcc-bwmon |
| 45 | 47 | - qcom,sc8280xp-llcc-bwmon |
| @@ -0,0 +1,73 @@ | ||
| 1 | +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause | |
| 2 | +%YAML 1.2 | |
| 3 | +--- | |
| 4 | +$id: http://devicetree.org/schemas/interconnect/qcom,qcs615-rpmh.yaml# | |
| 5 | +$schema: http://devicetree.org/meta-schemas/core.yaml# | |
| 6 | + | |
| 7 | +title: Qualcomm RPMh Network-On-Chip Interconnect on QCS615 | |
| 8 | + | |
| 9 | +maintainers: | |
| 10 | + - Raviteja Laggyshetty <quic_rlaggysh@quicinc.com> | |
| 11 | + | |
| 12 | +description: | | |
| 13 | + RPMh interconnect providers support system bandwidth requirements through | |
| 14 | + RPMh hardware accelerators known as Bus Clock Manager (BCM). The provider is | |
| 15 | + able to communicate with the BCM through the Resource State Coordinator (RSC) | |
| 16 | + associated with each execution environment. Provider nodes must point to at | |
| 17 | + least one RPMh device child node pertaining to their RSC and each provider | |
| 18 | + can map to multiple RPMh resources. | |
| 19 | + | |
| 20 | + See also: include/dt-bindings/interconnect/qcom,qcs615-rpmh.h | |
| 21 | + | |
| 22 | +properties: | |
| 23 | + compatible: | |
| 24 | + enum: | |
| 25 | + - qcom,qcs615-aggre1-noc | |
| 26 | + - qcom,qcs615-camnoc-virt | |
| 27 | + - qcom,qcs615-config-noc | |
| 28 | + - qcom,qcs615-dc-noc | |
| 29 | + - qcom,qcs615-gem-noc | |
| 30 | + - qcom,qcs615-ipa-virt | |
| 31 | + - qcom,qcs615-mc-virt | |
| 32 | + - qcom,qcs615-mmss-noc | |
| 33 | + - qcom,qcs615-system-noc | |
| 34 | + | |
| 35 | + reg: | |
| 36 | + maxItems: 1 | |
| 37 | + | |
| 38 | +required: | |
| 39 | + - compatible | |
| 40 | + | |
| 41 | +allOf: | |
| 42 | + - $ref: qcom,rpmh-common.yaml# | |
| 43 | + - if: | |
| 44 | + properties: | |
| 45 | + compatible: | |
| 46 | + contains: | |
| 47 | + enum: | |
| 48 | + - qcom,qcs615-camnoc-virt | |
| 49 | + - qcom,qcs615-ipa-virt | |
| 50 | + - qcom,qcs615-mc-virt | |
| 51 | + then: | |
| 52 | + properties: | |
| 53 | + reg: false | |
| 54 | + else: | |
| 55 | + required: | |
| 56 | + - reg | |
| 57 | + | |
| 58 | +unevaluatedProperties: false | |
| 59 | + | |
| 60 | +examples: | |
| 61 | + - | | |
| 62 | + gem_noc: interconnect@9680000 { | |
| 63 | + compatible = "qcom,qcs615-gem-noc"; | |
| 64 | + reg = <0x9680000 0x3e200>; | |
| 65 | + #interconnect-cells = <2>; | |
| 66 | + qcom,bcm-voters = <&apps_bcm_voter>; | |
| 67 | + }; | |
| 68 | + | |
| 69 | + mc_virt: interconnect-2 { | |
| 70 | + compatible = "qcom,qcs615-mc-virt"; | |
| 71 | + #interconnect-cells = <2>; | |
| 72 | + qcom,bcm-voters = <&apps_bcm_voter>; | |
| 73 | + }; | |
| @@ -0,0 +1,72 @@ | ||
| 1 | +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause | |
| 2 | +%YAML 1.2 | |
| 3 | +--- | |
| 4 | +$id: http://devicetree.org/schemas/interconnect/qcom,qcs8300-rpmh.yaml# | |
| 5 | +$schema: http://devicetree.org/meta-schemas/core.yaml# | |
| 6 | + | |
| 7 | +title: Qualcomm RPMh Network-On-Chip Interconnect on QCS8300 | |
| 8 | + | |
| 9 | +maintainers: | |
| 10 | + - Raviteja Laggyshetty <quic_rlaggysh@quicinc.com> | |
| 11 | + | |
| 12 | +description: | | |
| 13 | + RPMh interconnect providers support system bandwidth requirements through | |
| 14 | + RPMh hardware accelerators known as Bus Clock Manager (BCM). | |
| 15 | + | |
| 16 | + See also: include/dt-bindings/interconnect/qcom,qcs8300-rpmh.h | |
| 17 | + | |
| 18 | +properties: | |
| 19 | + compatible: | |
| 20 | + enum: | |
| 21 | + - qcom,qcs8300-aggre1-noc | |
| 22 | + - qcom,qcs8300-aggre2-noc | |
| 23 | + - qcom,qcs8300-clk-virt | |
| 24 | + - qcom,qcs8300-config-noc | |
| 25 | + - qcom,qcs8300-dc-noc | |
| 26 | + - qcom,qcs8300-gem-noc | |
| 27 | + - qcom,qcs8300-gpdsp-anoc | |
| 28 | + - qcom,qcs8300-lpass-ag-noc | |
| 29 | + - qcom,qcs8300-mc-virt | |
| 30 | + - qcom,qcs8300-mmss-noc | |
| 31 | + - qcom,qcs8300-nspa-noc | |
| 32 | + - qcom,qcs8300-pcie-anoc | |
| 33 | + - qcom,qcs8300-system-noc | |
| 34 | + | |
| 35 | + reg: | |
| 36 | + maxItems: 1 | |
| 37 | + | |
| 38 | +required: | |
| 39 | + - compatible | |
| 40 | + | |
| 41 | +allOf: | |
| 42 | + - $ref: qcom,rpmh-common.yaml# | |
| 43 | + - if: | |
| 44 | + properties: | |
| 45 | + compatible: | |
| 46 | + contains: | |
| 47 | + enum: | |
| 48 | + - qcom,qcs8300-clk-virt | |
| 49 | + - qcom,qcs8300-mc-virt | |
| 50 | + then: | |
| 51 | + properties: | |
| 52 | + reg: false | |
| 53 | + else: | |
| 54 | + required: | |
| 55 | + - reg | |
| 56 | + | |
| 57 | +unevaluatedProperties: false | |
| 58 | + | |
| 59 | +examples: | |
| 60 | + - | | |
| 61 | + gem_noc: interconnect@9100000 { | |
| 62 | + compatible = "qcom,qcs8300-gem-noc"; | |
| 63 | + reg = <0x9100000 0xf7080>; | |
| 64 | + #interconnect-cells = <2>; | |
| 65 | + qcom,bcm-voters = <&apps_bcm_voter>; | |
| 66 | + }; | |
| 67 | + | |
| 68 | + clk_virt: interconnect-0 { | |
| 69 | + compatible = "qcom,qcs8300-clk-virt"; | |
| 70 | + #interconnect-cells = <2>; | |
| 71 | + qcom,bcm-voters = <&apps_bcm_voter>; | |
| 72 | + }; | |
| @@ -0,0 +1,117 @@ | ||
| 1 | +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) | |
| 2 | +%YAML 1.2 | |
| 3 | +--- | |
| 4 | +$id: http://devicetree.org/schemas/interconnect/qcom,sar2130p-rpmh.yaml# | |
| 5 | +$schema: http://devicetree.org/meta-schemas/core.yaml# | |
| 6 | + | |
| 7 | +title: Qualcomm RPMh Network-On-Chip Interconnect on SAR2130P | |
| 8 | + | |
| 9 | +maintainers: | |
| 10 | + - Dmitry Baryshkov <dmitry.baryshkov@linaro.org> | |
| 11 | + - Georgi Djakov <djakov@kernel.org> | |
| 12 | + | |
| 13 | +description: | | |
| 14 | + RPMh interconnect providers support system bandwidth requirements through | |
| 15 | + RPMh hardware accelerators known as Bus Clock Manager (BCM). The provider is | |
| 16 | + able to communicate with the BCM through the Resource State Coordinator (RSC) | |
| 17 | + associated with each execution environment. Provider nodes must point to at | |
| 18 | + least one RPMh device child node pertaining to their RSC and each provider | |
| 19 | + can map to multiple RPMh resources. | |
| 20 | + | |
| 21 | + See also:: include/dt-bindings/interconnect/qcom,sar2130p-rpmh.h | |
| 22 | + | |
| 23 | +properties: | |
| 24 | + compatible: | |
| 25 | + enum: | |
| 26 | + - qcom,sar2130p-clk-virt | |
| 27 | + - qcom,sar2130p-config-noc | |
| 28 | + - qcom,sar2130p-gem-noc | |
| 29 | + - qcom,sar2130p-lpass-ag-noc | |
| 30 | + - qcom,sar2130p-mc-virt | |
| 31 | + - qcom,sar2130p-mmss-noc | |
| 32 | + - qcom,sar2130p-nsp-noc | |
| 33 | + - qcom,sar2130p-pcie-anoc | |
| 34 | + - qcom,sar2130p-system-noc | |
| 35 | + | |
| 36 | + reg: | |
| 37 | + maxItems: 1 | |
| 38 | + | |
| 39 | + clocks: | |
| 40 | + minItems: 1 | |
| 41 | + maxItems: 2 | |
| 42 | + | |
| 43 | +required: | |
| 44 | + - compatible | |
| 45 | + | |
| 46 | +allOf: | |
| 47 | + - $ref: qcom,rpmh-common.yaml# | |
| 48 | + - if: | |
| 49 | + properties: | |
| 50 | + compatible: | |
| 51 | + contains: | |
| 52 | + enum: | |
| 53 | + - qcom,sar2130p-clk-virt | |
| 54 | + - qcom,sar2130p-mc-virt | |
| 55 | + then: | |
| 56 | + properties: | |
| 57 | + reg: false | |
| 58 | + else: | |
| 59 | + required: | |
| 60 | + - reg | |
| 61 | + | |
| 62 | + - if: | |
| 63 | + properties: | |
| 64 | + compatible: | |
| 65 | + contains: | |
| 66 | + enum: | |
| 67 | + - qcom,sar2130p-pcie-anoc | |
| 68 | + then: | |
| 69 | + properties: | |
| 70 | + clocks: | |
| 71 | + items: | |
| 72 | + - description: aggre-NOC PCIe AXI clock | |
| 73 | + - description: cfg-NOC PCIe a-NOC AHB clock | |
| 74 | + | |
| 75 | + - if: | |
| 76 | + properties: | |
| 77 | + compatible: | |
| 78 | + contains: | |
| 79 | + enum: | |
| 80 | + - qcom,sar2130p-system-noc | |
| 81 | + then: | |
| 82 | + properties: | |
| 83 | + clocks: | |
| 84 | + items: | |
| 85 | + - description: aggre USB3 PRIM AXI clock | |
| 86 | + | |
| 87 | + - if: | |
| 88 | + properties: | |
| 89 | + compatible: | |
| 90 | + contains: | |
| 91 | + enum: | |
| 92 | + - qcom,sar2130p-system-noc | |
| 93 | + - qcom,sar2130p-pcie-anoc | |
| 94 | + then: | |
| 95 | + required: | |
| 96 | + - clocks | |
| 97 | + else: | |
| 98 | + properties: | |
| 99 | + clocks: false | |
| 100 | + | |
| 101 | +unevaluatedProperties: false | |
| 102 | + | |
| 103 | +examples: | |
| 104 | + - | | |
| 105 | + clk_virt: interconnect-0 { | |
| 106 | + compatible = "qcom,sar2130p-clk-virt"; | |
| 107 | + #interconnect-cells = <2>; | |
| 108 | + qcom,bcm-voters = <&apps_bcm_voter>; | |
| 109 | + }; | |
| 110 | + | |
| 111 | + aggre1_noc: interconnect@1680000 { | |
| 112 | + compatible = "qcom,sar2130p-system-noc"; | |
| 113 | + reg = <0x01680000 0x29080>; | |
| 114 | + #interconnect-cells = <2>; | |
| 115 | + clocks = <&gcc_prim_axi_clk>; | |
| 116 | + qcom,bcm-voters = <&apps_bcm_voter>; | |
| 117 | + }; | |
| @@ -15,6 +15,8 @@ properties: · 14 unmodified lines | ||
| 15 | 15 | |
| 16 | 16 | reg: |
| 17 | 17 | oneOf: |
| 18 | + - items: | |
| 19 | + - description: mailbox data registers | |
| 18 | 20 | - items: |
| 19 | 21 | - description: mailbox control & data registers |
| 20 | 22 | - description: mailbox interrupt registers |
| @@ -23,6 +25,7 @@ properties: · 2 unmodified lines | ||
| 23 | 25 | - description: mailbox control registers |
| 24 | 26 | - description: mailbox interrupt registers |
| 25 | 27 | - description: mailbox data registers |
| 28 | + deprecated: true | |
| 26 | 29 | |
| 27 | 30 | interrupts: |
| 28 | 31 | maxItems: 1 |
| @@ -41,12 +44,12 @@ additionalProperties: false · 12 unmodified lines | ||
| 41 | 44 | examples: |
| 42 | 45 | - | |
| 43 | 46 | soc { |
| 44 | − #address-cells = <2>; | |
| 45 | − #size-cells = <2>; | |
| 46 | − mbox: mailbox@37020000 { | |
| 47 | + #address-cells = <1>; | |
| 48 | + #size-cells = <1>; | |
| 49 | + | |
| 50 | + mailbox@37020800 { | |
| 47 | 51 | compatible = "microchip,mpfs-mailbox"; |
| 48 | − reg = <0x0 0x37020000 0x0 0x58>, <0x0 0x2000318C 0x0 0x40>, | |
| 49 | − <0x0 0x37020800 0x0 0x100>; | |
| 52 | + reg = <0x37020800 0x100>; | |
| 50 | 53 | interrupt-parent = <&L1>; |
| 51 | 54 | interrupts = <96>; |
| 52 | 55 | #mbox-cells = <1>; |
| @@ -165,12 +165,13 @@ allOf: · 164 unmodified lines | ||
| 165 | 165 | - if: |
| 166 | 166 | properties: |
| 167 | 167 | compatible: |
| 168 | − enum: | |
| 169 | − - qcom,msm8953-apcs-kpss-global | |
| 170 | − - qcom,msm8994-apcs-kpss-global | |
| 171 | − - qcom,msm8996-apcs-hmss-global | |
| 172 | − - qcom,qcm2290-apcs-hmss-global | |
| 173 | − - qcom,sdm845-apss-shared | |
| 168 | + contains: | |
| 169 | + enum: | |
| 170 | + - qcom,msm8953-apcs-kpss-global | |
| 171 | + - qcom,msm8994-apcs-kpss-global | |
| 172 | + - qcom,msm8996-apcs-hmss-global | |
| 173 | + - qcom,qcm2290-apcs-hmss-global | |
| 174 | + - qcom,sdm845-apss-shared | |
| 174 | 175 | then: |
| 175 | 176 | properties: |
| 176 | 177 | clocks: false |
| @@ -28,6 +28,7 @@ properties: · 27 unmodified lines | ||
| 28 | 28 | - qcom,qdu1000-ipcc |
| 29 | 29 | - qcom,sa8255p-ipcc |
| 30 | 30 | - qcom,sa8775p-ipcc |
| 31 | + - qcom,sar2130p-ipcc | |
| 31 | 32 | - qcom,sc7280-ipcc |
| 32 | 33 | - qcom,sc8280xp-ipcc |
| 33 | 34 | - qcom,sdx75-ipcc |
| @@ -38,6 +39,7 @@ properties: · 4 unmodified lines | ||
| 38 | 39 | - qcom,sm8450-ipcc |
| 39 | 40 | - qcom,sm8550-ipcc |
| 40 | 41 | - qcom,sm8650-ipcc |
| 42 | + - qcom,sm8750-ipcc | |
| 41 | 43 | - qcom,x1e80100-ipcc |
| 42 | 44 | - const: qcom,ipcc |
| 43 | 45 | |
| @@ -0,0 +1,89 @@ | ||
| 1 | +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) | |
| 2 | +%YAML 1.2 | |
| 3 | +--- | |
| 4 | +$id: http://devicetree.org/schemas/mailbox/thead,th1520-mbox.yaml# | |
| 5 | +$schema: http://devicetree.org/meta-schemas/core.yaml# | |
| 6 | + | |
| 7 | +title: T-head TH1520 Mailbox Controller | |
| 8 | + | |
| 9 | +description: | |
| 10 | + The T-head mailbox controller enables communication and coordination between | |
| 11 | + cores within the SoC by passing messages (e.g., data, status, and control) | |
| 12 | + through mailbox channels. It also allows one core to signal another processor | |
| 13 | + using interrupts via the Interrupt Controller Unit (ICU). | |
| 14 | + | |
| 15 | +maintainers: | |
| 16 | + - Michal Wilczynski <m.wilczynski@samsung.com> | |
| 17 | + | |
| 18 | +properties: | |
| 19 | + compatible: | |
| 20 | + const: thead,th1520-mbox | |
| 21 | + | |
| 22 | + clocks: | |
| 23 | + items: | |
| 24 | + - description: Clock for the local mailbox | |
| 25 | + - description: Clock for remote ICU 0 | |
| 26 | + - description: Clock for remote ICU 1 | |
| 27 | + - description: Clock for remote ICU 2 | |
| 28 | + | |
| 29 | + clock-names: | |
| 30 | + items: | |
| 31 | + - const: clk-local | |
| 32 | + - const: clk-remote-icu0 | |
| 33 | + - const: clk-remote-icu1 | |
| 34 | + - const: clk-remote-icu2 | |
| 35 | + | |
| 36 | + reg: | |
| 37 | + items: | |
| 38 | + - description: Mailbox local base address | |
| 39 | + - description: Remote ICU 0 base address | |
| 40 | + - description: Remote ICU 1 base address | |
| 41 | + - description: Remote ICU 2 base address | |
| 42 | + | |
| 43 | + reg-names: | |
| 44 | + items: | |
| 45 | + - const: local | |
| 46 | + - const: remote-icu0 | |
| 47 | + - const: remote-icu1 | |
| 48 | + - const: remote-icu2 | |
| 49 | + | |
| 50 | + interrupts: | |
| 51 | + maxItems: 1 | |
| 52 | + | |
| 53 | + '#mbox-cells': | |
| 54 | + const: 1 | |
| 55 | + description: | |
| 56 | + The one and only cell describes destination CPU ID. | |
| 57 | + | |
| 58 | +required: | |
| 59 | + - compatible | |
| 60 | + - clocks | |
| 61 | + - clock-names | |
| 62 | + - reg | |
| 63 | + - reg-names | |
| 64 | + - interrupts | |
| 65 | + - '#mbox-cells' | |
| 66 | + | |
| 67 | +additionalProperties: false | |
| 68 | + | |
| 69 | +examples: | |
| 70 | + - | | |
| 71 | + #include <dt-bindings/clock/thead,th1520-clk-ap.h> | |
| 72 | + soc { | |
| 73 | + #address-cells = <2>; | |
| 74 | + #size-cells = <2>; | |
| 75 | + mailbox@ffffc38000 { | |
| 76 | + compatible = "thead,th1520-mbox"; | |
| 77 | + reg = <0xff 0xffc38000 0x0 0x4000>, | |
| 78 | + <0xff 0xffc44000 0x0 0x1000>, | |
| 79 | + <0xff 0xffc4c000 0x0 0x1000>, | |
| 80 | + <0xff 0xffc54000 0x0 0x1000>; | |
| 81 | + reg-names = "local", "remote-icu0", "remote-icu1", "remote-icu2"; | |
| 82 | + clocks = <&clk CLK_MBOX0>, <&clk CLK_MBOX1>, <&clk CLK_MBOX2>, | |
| 83 | + <&clk CLK_MBOX3>; | |
| 84 | + clock-names = "clk-local", "clk-remote-icu0", "clk-remote-icu1", | |
| 85 | + "clk-remote-icu2"; | |
| 86 | + interrupts = <28>; | |
| 87 | + #mbox-cells = <1>; | |
| 88 | + }; | |
| 89 | + }; | |
| @@ -0,0 +1,90 @@ | ||
| 1 | +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) | |
| 2 | +%YAML 1.2 | |
| 3 | +--- | |
| 4 | +$id: http://devicetree.org/schemas/mfd/airoha,en7581-gpio-sysctl.yaml# | |
| 5 | +$schema: http://devicetree.org/meta-schemas/core.yaml# | |
| 6 | + | |
| 7 | +title: Airoha EN7581 GPIO System Controller | |
| 8 | + | |
| 9 | +maintainers: | |
| 10 | + - Christian Marangi <ansuelsmth@gmail.com> | |
| 11 | + - Lorenzo Bianconi <lorenzo@kernel.org> | |
| 12 | + | |
| 13 | +description: | |
| 14 | + Airoha EN7581 SoC GPIO system controller which provided a register map | |
| 15 | + for controlling the GPIO, pins and PWM of the SoC. | |
| 16 | + | |
| 17 | +properties: | |
| 18 | + compatible: | |
| 19 | + items: | |
| 20 | + - const: airoha,en7581-gpio-sysctl | |
| 21 | + - const: syscon | |
| 22 | + - const: simple-mfd | |
| 23 | + | |
| 24 | + reg: | |
| 25 | + maxItems: 1 | |
| 26 | + | |
| 27 | + pinctrl: | |
| 28 | + type: object | |
| 29 | + $ref: /schemas/pinctrl/airoha,en7581-pinctrl.yaml | |
| 30 | + description: | |
| 31 | + Child node definition for EN7581 Pin controller | |
| 32 | + | |
| 33 | + pwm: | |
| 34 | + type: object | |
| 35 | + $ref: /schemas/pwm/airoha,en7581-pwm.yaml | |
| 36 | + description: | |
| 37 | + Child node definition for EN7581 PWM controller | |
| 38 | + | |
| 39 | +required: | |
| 40 | + - compatible | |
| 41 | + - reg | |
| 42 | + | |
| 43 | +additionalProperties: false | |
| 44 | + | |
| 45 | +examples: | |
| 46 | + - | | |
| 47 | + #include <dt-bindings/interrupt-controller/arm-gic.h> | |
| 48 | + | |
| 49 | + system-controller@1fbf0200 { | |
| 50 | + compatible = "airoha,en7581-gpio-sysctl", "syscon", "simple-mfd"; | |
| 51 | + reg = <0x1fbf0200 0xc0>; | |
| 52 | + | |
| 53 | + pinctrl { | |
| 54 | + compatible = "airoha,en7581-pinctrl"; | |
| 55 | + | |
| 56 | + interrupt-parent = <&gic>; | |
| 57 | + interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>; | |
| 58 | + | |
| 59 | + gpio-controller; | |
| 60 | + #gpio-cells = <2>; | |
| 61 | + | |
| 62 | + interrupt-controller; | |
| 63 | + #interrupt-cells = <2>; | |
| 64 | + | |
| 65 | + mmc-pins { | |
| 66 | + mux { | |
| 67 | + function = "emmc"; | |
| 68 | + groups = "emmc"; | |
| 69 | + }; | |
| 70 | + }; | |
| 71 | + | |
| 72 | + mdio-pins { | |
| 73 | + mux { | |
| 74 | + function = "mdio"; | |
| 75 | + groups = "mdio"; | |
| 76 | + }; | |
| 77 | + | |
| 78 | + conf { | |
| 79 | + pins = "gpio2"; | |
| 80 | + output-enable; | |
| 81 | + }; | |
| 82 | + }; | |
| 83 | + }; | |
| 84 | + | |
| 85 | + pwm { | |
| 86 | + compatible = "airoha,en7581-pwm"; | |
| 87 | + | |
| 88 | + #pwm-cells = <3>; | |
| 89 | + }; | |
| 90 | + }; | |
| @@ -1,7 +1,7 @@ | ||
| 1 | 1 | # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) |
| 2 | 2 | %YAML 1.2 |
| 3 | 3 | --- |
| 4 | −$id: http://devicetree.org/schemas/fuse/renesas,rcar-efuse.yaml# | |
| 4 | +$id: http://devicetree.org/schemas/nvmem/renesas,rcar-efuse.yaml# | |
| 5 | 5 | $schema: http://devicetree.org/meta-schemas/core.yaml# |
| 6 | 6 | |
| 7 | 7 | title: R-Car E-FUSE connected to PFC |
| @@ -13,6 +13,9 @@ description: · 5 unmodified lines | ||
| 13 | 13 | The E-FUSE is a type of non-volatile memory, which is accessible through the |
| 14 | 14 | Pin Function Controller (PFC) on some R-Car Gen4 SoCs. |
| 15 | 15 | |
| 16 | +allOf: | |
| 17 | + - $ref: nvmem.yaml# | |
| 18 | + | |
| 16 | 19 | properties: |
| 17 | 20 | compatible: |
| 18 | 21 | enum: |
| @@ -39,17 +42,27 @@ required: · 20 unmodified lines | ||
| 39 | 42 | - power-domains |
| 40 | 43 | - resets |
| 41 | 44 | |
| 42 | −additionalProperties: false | |
| 45 | +unevaluatedProperties: false | |
| 43 | 46 | |
| 44 | 47 | examples: |
| 45 | 48 | - | |
| 46 | − #include <dt-bindings/clock/r8a779a0-cpg-mssr.h> | |
| 47 | − #include <dt-bindings/power/r8a779a0-sysc.h> | |
| 48 | − | |
| 49 | − fuse: fuse@e6078800 { | |
| 50 | − compatible = "renesas,r8a779a0-efuse"; | |
| 51 | − reg = <0xe6078800 0x100>; | |
| 52 | − clocks = <&cpg CPG_MOD 916>; | |
| 53 | − power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; | |
| 54 | − resets = <&cpg 916>; | |
| 49 | + #include <dt-bindings/clock/r8a779f0-cpg-mssr.h> | |
| 50 | + #include <dt-bindings/power/r8a779f0-sysc.h> | |
| 51 | + | |
| 52 | + fuse@e6078800 { | |
| 53 | + compatible = "renesas,r8a779f0-efuse"; | |
| 54 | + reg = <0xe6078800 0x200>; | |
| 55 | + clocks = <&cpg CPG_MOD 915>; | |
| 56 | + power-domains = <&sysc R8A779F0_PD_ALWAYS_ON>; | |
| 57 | + resets = <&cpg 915>; | |
| 58 | + | |
| 59 | + nvmem-layout { | |
| 60 | + compatible = "fixed-layout"; | |
| 61 | + #address-cells = <1>; | |
| 62 | + #size-cells = <1>; | |
| 63 | + | |
| 64 | + calib@144 { | |
| 65 | + reg = <0x144 0x08>; | |
| 66 | + }; | |
| 67 | + }; | |
| 55 | 68 | }; |
| @@ -1,7 +1,7 @@ | ||
| 1 | 1 | # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) |
| 2 | 2 | %YAML 1.2 |
| 3 | 3 | --- |
| 4 | −$id: http://devicetree.org/schemas/fuse/renesas,rcar-otp.yaml# | |
| 4 | +$id: http://devicetree.org/schemas/nvmem/renesas,rcar-otp.yaml# | |
| 5 | 5 | $schema: http://devicetree.org/meta-schemas/core.yaml# |
| 6 | 6 | |
| 7 | 7 | title: R-Car E-FUSE connected to OTP_MEM |
| @@ -13,6 +13,9 @@ description: · 5 unmodified lines | ||
| 13 | 13 | The E-FUSE is a type of non-volatile memory, which is accessible through the |
| 14 | 14 | One-Time Programmable Memory (OTP_MEM) module on some R-Car Gen4 SoCs. |
| 15 | 15 | |
| 16 | +allOf: | |
| 17 | + - $ref: nvmem.yaml# | |
| 18 | + | |
| 16 | 19 | properties: |
| 17 | 20 | compatible: |
| 18 | 21 | enum: |
| @@ -22,17 +25,19 @@ properties: · 3 unmodified lines | ||
| 22 | 25 | reg: |
| 23 | 26 | items: |
| 24 | 27 | - description: OTP_MEM_0 |
| 25 | − - description: OTP_MEM_1 | |
| 28 | + - description: OTP_MEM_1. | |
| 29 | + The addresses of cells defined under the optional nvmem-layout | |
| 30 | + subnode are relative to this register bank. | |
| 26 | 31 | |
| 27 | 32 | required: |
| 28 | 33 | - compatible |
| 29 | 34 | - reg |
| 30 | 35 | |
| 31 | −additionalProperties: false | |
| 36 | +unevaluatedProperties: false | |
| 32 | 37 | |
| 33 | 38 | examples: |
| 34 | 39 | - | |
| 35 | − otp: otp@e61be000 { | |
| 36 | − compatible = "renesas,r8a779g0-otp"; | |
| 37 | − reg = <0xe61be000 0x1000>, <0xe61bf000 0x1000>; | |
| 40 | + otp@e61be000 { | |
| 41 | + compatible = "renesas,r8a779g0-otp"; | |
| 42 | + reg = <0xe61be000 0x1000>, <0xe61bf000 0x1000>; | |
| 38 | 43 | }; |
| @@ -1,52 +0,0 @@ | ||
| 1 | −= Spreadtrum SC27XX PMIC eFuse device tree bindings = | |
| 2 | − | |
| 3 | −Required properties: | |
| 4 | −- compatible: Should be one of the following. | |
| 5 | − "sprd,sc2720-efuse" | |
| 6 | − "sprd,sc2721-efuse" | |
| 7 | − "sprd,sc2723-efuse" | |
| 8 | − "sprd,sc2730-efuse" | |
| 9 | − "sprd,sc2731-efuse" | |
| 10 | −- reg: Specify the address offset of efuse controller. | |
| 11 | −- hwlocks: Reference to a phandle of a hwlock provider node. | |
| 12 | − | |
| 13 | −= Data cells = | |
| 14 | −Are child nodes of eFuse, bindings of which as described in | |
| 15 | −bindings/nvmem/nvmem.txt | |
| 16 | − | |
| 17 | −Example: | |
| 18 | − | |
| 19 | − sc2731_pmic: pmic@0 { | |
| 20 | − compatible = "sprd,sc2731"; | |
| 21 | − reg = <0>; | |
| 22 | − spi-max-frequency = <26000000>; | |
| 23 | − interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>; | |
| 24 | − interrupt-controller; | |
| 25 | − #interrupt-cells = <2>; | |
| 26 | − #address-cells = <1>; | |
| 27 | − #size-cells = <0>; | |
| 28 | − | |
| 29 | − efuse@380 { | |
| 30 | − compatible = "sprd,sc2731-efuse"; | |
| 31 | − reg = <0x380>; | |
| 32 | − #address-cells = <1>; | |
| 33 | − #size-cells = <1>; | |
| 34 | − hwlocks = <&hwlock 12>; | |
| 35 | − | |
| 36 | − /* Data cells */ | |
| 37 | − thermal_calib: calib@10 { | |
| 38 | − reg = <0x10 0x2>; | |
| 39 | − }; | |
| 40 | − }; | |
| 41 | − }; | |
| 42 | − | |
| 43 | −= Data consumers = | |
| 44 | −Are device nodes which consume nvmem data cells. | |
| 45 | − | |
| 46 | −Example: | |
| 47 | − | |
| 48 | − thermal { | |
| 49 | − ... | |
| 50 | − nvmem-cells = <&thermal_calib>; | |
| 51 | − nvmem-cell-names = "calibration"; | |
| 52 | − }; | |
| @@ -0,0 +1,68 @@ | ||
| 1 | +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause | |
| 2 | +%YAML 1.2 | |
| 3 | +--- | |
| 4 | +$id: http://devicetree.org/schemas/nvmem/sprd,sc2731-efuse.yaml# | |
| 5 | +$schema: http://devicetree.org/meta-schemas/core.yaml# | |
| 6 | + | |
| 7 | +title: Spreadtrum SC27XX PMIC eFuse | |
| 8 | + | |
| 9 | +maintainers: | |
| 10 | + - Orson Zhai <orsonzhai@gmail.com> | |
| 11 | + - Baolin Wang <baolin.wang7@gmail.com> | |
| 12 | + - Chunyan Zhang <zhang.lyra@gmail.com> | |
| 13 | + | |
| 14 | +properties: | |
| 15 | + compatible: | |
| 16 | + enum: | |
| 17 | + - sprd,sc2720-efuse | |
| 18 | + - sprd,sc2721-efuse | |
| 19 | + - sprd,sc2723-efuse | |
| 20 | + - sprd,sc2730-efuse | |
| 21 | + - sprd,sc2731-efuse | |
| 22 | + | |
| 23 | + reg: | |
| 24 | + maxItems: 1 | |
| 25 | + | |
| 26 | + hwlocks: | |
| 27 | + maxItems: 1 | |
| 28 | + | |
| 29 | +required: | |
| 30 | + - compatible | |
| 31 | + - reg | |
| 32 | + - hwlocks | |
| 33 | + | |
| 34 | +allOf: | |
| 35 | + - $ref: nvmem.yaml# | |
| 36 | + - $ref: nvmem-deprecated-cells.yaml# | |
| 37 | + | |
| 38 | +unevaluatedProperties: false | |
| 39 | + | |
| 40 | +examples: | |
| 41 | + - | | |
| 42 | + pmic { | |
| 43 | + #address-cells = <1>; | |
| 44 | + #size-cells = <0>; | |
| 45 | + | |
| 46 | + efuse@380 { | |
| 47 | + compatible = "sprd,sc2731-efuse"; | |
| 48 | + reg = <0x380>; | |
| 49 | + hwlocks = <&hwlock 12>; | |
| 50 | + #address-cells = <1>; | |
| 51 | + #size-cells = <1>; | |
| 52 | + | |
| 53 | + /* Data cells */ | |
| 54 | + fgu_calib: calib@6 { | |
| 55 | + reg = <0x6 0x2>; | |
| 56 | + bits = <0 9>; | |
| 57 | + }; | |
| 58 | + | |
| 59 | + adc_big_scale: calib@24 { | |
| 60 | + reg = <0x24 0x2>; | |
| 61 | + }; | |
| 62 | + | |
| 63 | + adc_small_scale: calib@26 { | |
| 64 | + reg = <0x26 0x2>; | |
| 65 | + }; | |
| 66 | + }; | |
| 67 | + }; | |
| 68 | +... | |
| @@ -0,0 +1,61 @@ | ||
| 1 | +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause | |
| 2 | +%YAML 1.2 | |
| 3 | +--- | |
| 4 | +$id: http://devicetree.org/schemas/nvmem/sprd,ums312-efuse.yaml# | |
| 5 | +$schema: http://devicetree.org/meta-schemas/core.yaml# | |
| 6 | + | |
| 7 | +title: Spreadtrum UMS312 eFuse | |
| 8 | + | |
| 9 | +maintainers: | |
| 10 | + - Orson Zhai <orsonzhai@gmail.com> | |
| 11 | + - Baolin Wang <baolin.wang7@gmail.com> | |
| 12 | + - Chunyan Zhang <zhang.lyra@gmail.com> | |
| 13 | + | |
| 14 | +properties: | |
| 15 | + compatible: | |
| 16 | + const: sprd,ums312-efuse | |
| 17 | + | |
| 18 | + reg: | |
| 19 | + maxItems: 1 | |
| 20 | + | |
| 21 | + clocks: | |
| 22 | + maxItems: 1 | |
| 23 | + | |
| 24 | + clock-names: | |
| 25 | + const: enable | |
| 26 | + | |
| 27 | + hwlocks: | |
| 28 | + maxItems: 1 | |
| 29 | + | |
| 30 | +required: | |
| 31 | + - compatible | |
| 32 | + - reg | |
| 33 | + - clocks | |
| 34 | + - clock-names | |
| 35 | + - hwlocks | |
| 36 | + | |
| 37 | +allOf: | |
| 38 | + - $ref: nvmem.yaml# | |
| 39 | + - $ref: nvmem-deprecated-cells.yaml# | |
| 40 | + | |
| 41 | +unevaluatedProperties: false | |
| 42 | + | |
| 43 | +examples: | |
| 44 | + - | | |
| 45 | + #include <dt-bindings/clock/sprd,ums512-clk.h> | |
| 46 | + | |
| 47 | + efuse@32240000 { | |
| 48 | + compatible = "sprd,ums312-efuse"; | |
| 49 | + reg = <0x32240000 0x10000>; | |
| 50 | + clocks = <&aonapb_gate CLK_EFUSE_EB>; | |
| 51 | + clock-names = "enable"; | |
| 52 | + hwlocks = <&hwlock 8>; | |
| 53 | + #address-cells = <1>; | |
| 54 | + #size-cells = <1>; | |
| 55 | + | |
| 56 | + /* Data cells */ | |
| 57 | + thermal_calib: calib@10 { | |
| 58 | + reg = <0x10 0x2>; | |
| 59 | + }; | |
| 60 | + }; | |
| 61 | +... | |
| @@ -1,39 +0,0 @@ | ||
| 1 | −= Spreadtrum eFuse device tree bindings = | |
| 2 | − | |
| 3 | −Required properties: | |
| 4 | −- compatible: Should be "sprd,ums312-efuse". | |
| 5 | −- reg: Specify the address offset of efuse controller. | |
| 6 | −- clock-names: Should be "enable". | |
| 7 | −- clocks: The phandle and specifier referencing the controller's clock. | |
| 8 | −- hwlocks: Reference to a phandle of a hwlock provider node. | |
| 9 | − | |
| 10 | −= Data cells = | |
| 11 | −Are child nodes of eFuse, bindings of which as described in | |
| 12 | −bindings/nvmem/nvmem.txt | |
| 13 | − | |
| 14 | −Example: | |
| 15 | − | |
| 16 | − ap_efuse: efuse@32240000 { | |
| 17 | − compatible = "sprd,ums312-efuse"; | |
| 18 | − reg = <0 0x32240000 0 0x10000>; | |
| 19 | − clock-names = "enable"; | |
| 20 | − hwlocks = <&hwlock 8>; | |
| 21 | − clocks = <&aonapb_gate CLK_EFUSE_EB>; | |
| 22 | − | |
| 23 | − /* Data cells */ | |
| 24 | − thermal_calib: calib@10 { | |
| 25 | − reg = <0x10 0x2>; | |
| 26 | − }; | |
| 27 | − }; | |
| 28 | − | |
| 29 | −= Data consumers = | |
| 30 | −Are device nodes which consume nvmem data cells. | |
| 31 | − | |
| 32 | −Example: | |
| 33 | − | |
| 34 | − thermal { | |
| 35 | − ... | |
| 36 | − | |
| 37 | − nvmem-cells = <&thermal_calib>; | |
| 38 | − nvmem-cell-names = "calibration"; | |
| 39 | − }; | |
| @@ -1,40 +0,0 @@ | ||
| 1 | −Zodiac Inflight Innovations RAVE EEPROM Bindings | |
| 2 | − | |
| 3 | −RAVE SP EEPROM device is a "MFD cell" device exposing physical EEPROM | |
| 4 | −attached to RAVE Supervisory Processor. It is expected that its Device | |
| 5 | −Tree node is specified as a child of the node corresponding to the | |
| 6 | −parent RAVE SP device (as documented in | |
| 7 | −Documentation/devicetree/bindings/mfd/zii,rave-sp.txt) | |
| 8 | − | |
| 9 | −Required properties: | |
| 10 | − | |
| 11 | −- compatible: Should be "zii,rave-sp-eeprom" | |
| 12 | − | |
| 13 | −Optional properties: | |
| 14 | − | |
| 15 | −- zii,eeprom-name: Unique EEPROM identifier describing its function in the | |
| 16 | − system. Will be used as created NVMEM deivce's name. | |
| 17 | − | |
| 18 | −Data cells: | |
| 19 | − | |
| 20 | −Data cells are child nodes of eerpom node, bindings for which are | |
| 21 | −documented in Documentation/devicetree/bindings/nvmem/nvmem.txt | |
| 22 | − | |
| 23 | −Example: | |
| 24 | − | |
| 25 | − rave-sp { | |
| 26 | − compatible = "zii,rave-sp-rdu1"; | |
| 27 | − current-speed = <38400>; | |
| 28 | − | |
| 29 | − eeprom@a4 { | |
| 30 | − compatible = "zii,rave-sp-eeprom"; | |
| 31 | − reg = <0xa4 0x4000>; | |
| 32 | − #address-cells = <1>; | |
| 33 | − #size-cells = <1>; | |
| 34 | − zii,eeprom-name = "main-eeprom"; | |
| 35 | − | |
| 36 | − wdt_timeout: wdt-timeout@81 { | |
| 37 | − reg = <0x81 2>; | |
| 38 | − }; | |
| 39 | − }; | |
| 40 | − } | |
| @@ -0,0 +1,54 @@ | ||
| 1 | +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) | |
| 2 | +%YAML 1.2 | |
| 3 | +--- | |
| 4 | +$id: http://devicetree.org/schemas/nvmem/zii,rave-sp-eeprom.yaml# | |
| 5 | +$schema: http://devicetree.org/meta-schemas/core.yaml# | |
| 6 | + | |
| 7 | +title: Zodiac Inflight Innovations RAVE EEPROM | |
| 8 | + | |
| 9 | +maintainers: | |
| 10 | + - Frank Li <Frank.Li@nxp.com> | |
| 11 | + | |
| 12 | +description: | |
| 13 | + RAVE SP EEPROM device is a "MFD cell" device exposing physical EEPROM | |
| 14 | + attached to RAVE Supervisory Processor. It is expected that its Device | |
| 15 | + Tree node is specified as a child of the node corresponding to the | |
| 16 | + parent RAVE SP device (as documented in | |
| 17 | + Documentation/devicetree/bindings/mfd/zii,rave-sp.yaml) | |
| 18 | + | |
| 19 | +properties: | |
| 20 | + compatible: | |
| 21 | + const: zii,rave-sp-eeprom | |
| 22 | + | |
| 23 | + reg: | |
| 24 | + maxItems: 1 | |
| 25 | + | |
| 26 | + zii,eeprom-name: | |
| 27 | + $ref: /schemas/types.yaml#/definitions/string | |
| 28 | + description: | |
| 29 | + Unique EEPROM identifier describing its function in the | |
| 30 | + system. Will be used as created NVMEM deivce's name. | |
| 31 | + | |
| 32 | +required: | |
| 33 | + - compatible | |
| 34 | + | |
| 35 | +allOf: | |
| 36 | + - $ref: nvmem.yaml# | |
| 37 | + - $ref: nvmem-deprecated-cells.yaml# | |
| 38 | + | |
| 39 | +unevaluatedProperties: false | |
| 40 | + | |
| 41 | +examples: | |
| 42 | + - | | |
| 43 | + eeprom@a4 { | |
| 44 | + compatible = "zii,rave-sp-eeprom"; | |
| 45 | + reg = <0xa4 0x4000>; | |
| 46 | + #address-cells = <1>; | |
| 47 | + #size-cells = <1>; | |
| 48 | + zii,eeprom-name = "main-eeprom"; | |
| 49 | + | |
| 50 | + wdt-timeout@81 { | |
| 51 | + reg = <0x81 2>; | |
| 52 | + }; | |
| 53 | + }; | |
| 54 | + | |
| @@ -45,7 +45,25 @@ patternProperties: · 44 unmodified lines | ||
| 45 | 45 | clock-latency-ns: true |
| 46 | 46 | opp-hz: true |
| 47 | 47 | opp-microvolt: true |
| 48 | − opp-supported-hw: true | |
| 48 | + opp-supported-hw: | |
| 49 | + items: | |
| 50 | + items: | |
| 51 | + - description: | |
| 52 | + The revision of the SoC the OPP is supported by. | |
| 53 | + This can be easily obtained from the datasheet of the | |
| 54 | + part being ordered/used. For example, it will be 0x01 for SR1.0 | |
| 55 | + | |
| 56 | + - description: | |
| 57 | + The eFuse bits that indicate the particular OPP is available. | |
| 58 | + The device datasheet has a table talking about Device Speed Grades. | |
| 59 | + This table is to be sorted with only the unique elements of the | |
| 60 | + MAXIMUM OPERATING FREQUENCY starting from the first row which | |
| 61 | + tells the lowest OPP, to the highest. The corresponding bits | |
| 62 | + need to be set based on N elements of speed grade the device supports. | |
| 63 | + So, if there are 3 possible unique MAXIMUM OPERATING FREQUENCY | |
| 64 | + in the table, then BIT(0) | (1) | (2) will be set, which means | |
| 65 | + the value shall be 0x7. | |
| 66 | + | |
| 49 | 67 | opp-suspend: true |
| 50 | 68 | turbo-mode: true |
| 51 | 69 | |
| @@ -149,7 +149,7 @@ allOf: · 148 unmodified lines | ||
| 149 | 149 | then: |
| 150 | 150 | properties: |
| 151 | 151 | clocks: |
| 152 | − minItems: 4 | |
| 152 | + minItems: 6 | |
| 153 | 153 | |
| 154 | 154 | clock-names: |
| 155 | 155 | items: |
| @@ -178,7 +178,7 @@ allOf: · 22 unmodified lines | ||
| 178 | 178 | then: |
| 179 | 179 | properties: |
| 180 | 180 | clocks: |
| 181 | − minItems: 4 | |
| 181 | + minItems: 6 | |
| 182 | 182 | |
| 183 | 183 | clock-names: |
| 184 | 184 | items: |
| @@ -207,6 +207,7 @@ allOf: · 22 unmodified lines | ||
| 207 | 207 | properties: |
| 208 | 208 | clocks: |
| 209 | 209 | minItems: 4 |
| 210 | + maxItems: 4 | |
| 210 | 211 | |
| 211 | 212 | clock-names: |
| 212 | 213 | items: |
| @@ -17,6 +17,12 @@ properties: · 16 unmodified lines | ||
| 17 | 17 | compatible: |
| 18 | 18 | const: microchip,pcie-host-1.0 # PolarFire |
| 19 | 19 | |
| 20 | + reg: | |
| 21 | + minItems: 3 | |
| 22 | + | |
| 23 | + reg-names: | |
| 24 | + minItems: 3 | |
| 25 | + | |
| 20 | 26 | clocks: |
| 21 | 27 | description: |
| 22 | 28 | Fabric Interface Controllers, FICs, are the interface between the FPGA |
| @@ -62,8 +68,9 @@ examples: · 39 unmodified lines | ||
| 62 | 68 | pcie0: pcie@2030000000 { |
| 63 | 69 | compatible = "microchip,pcie-host-1.0"; |
| 64 | 70 | reg = <0x0 0x70000000 0x0 0x08000000>, |
| 65 | − <0x0 0x43000000 0x0 0x00010000>; | |
| 66 | − reg-names = "cfg", "apb"; | |
| 71 | + <0x0 0x43008000 0x0 0x00002000>, | |
| 72 | + <0x0 0x4300a000 0x0 0x00002000>; | |
| 73 | + reg-names = "cfg", "bridge", "ctrl"; | |
| 67 | 74 | device_type = "pci"; |
| 68 | 75 | #address-cells = <3>; |
| 69 | 76 | #size-cells = <2>; |
| @@ -18,12 +18,18 @@ allOf: · 17 unmodified lines | ||
| 18 | 18 | |
| 19 | 19 | properties: |
| 20 | 20 | reg: |
| 21 | − maxItems: 2 | |
| 21 | + maxItems: 3 | |
| 22 | + minItems: 2 | |
| 22 | 23 | |
| 23 | 24 | reg-names: |
| 24 | − items: | |
| 25 | − - const: cfg | |
| 26 | − - const: apb | |
| 25 | + oneOf: | |
| 26 | + - items: | |
| 27 | + - const: cfg | |
| 28 | + - const: apb | |
| 29 | + - items: | |
| 30 | + - const: cfg | |
| 31 | + - const: bridge | |
| 32 | + - const: ctrl | |
| 27 | 33 | |
| 28 | 34 | interrupts: |
| 29 | 35 | minItems: 1 |
| @@ -81,6 +81,10 @@ properties: · 80 unmodified lines | ||
| 81 | 81 | vddpe-3v3-supply: |
| 82 | 82 | description: PCIe endpoint power supply |
| 83 | 83 | |
| 84 | + operating-points-v2: true | |
| 85 | + opp-table: | |
| 86 | + type: object | |
| 87 | + | |
| 84 | 88 | required: |
| 85 | 89 | - reg |
| 86 | 90 | - reg-names |
| @@ -70,10 +70,6 @@ properties: · 69 unmodified lines | ||
| 70 | 70 | - const: msi7 |
| 71 | 71 | - const: global |
| 72 | 72 | |
| 73 | − operating-points-v2: true | |
| 74 | − opp-table: | |
| 75 | − type: object | |
| 76 | − | |
| 77 | 73 | resets: |
| 78 | 74 | maxItems: 1 |
| 79 | 75 | |
| @@ -20,6 +20,7 @@ properties: · 19 unmodified lines | ||
| 20 | 20 | - const: qcom,pcie-sm8550 |
| 21 | 21 | - items: |
| 22 | 22 | - enum: |
| 23 | + - qcom,sar2130p-pcie | |
| 23 | 24 | - qcom,pcie-sm8650 |
| 24 | 25 | - const: qcom,pcie-sm8550 |
| 25 | 26 | |
| @@ -39,7 +40,7 @@ properties: · 13 unmodified lines | ||
| 39 | 40 | |
| 40 | 41 | clocks: |
| 41 | 42 | minItems: 7 |
| 42 | − maxItems: 8 | |
| 43 | + maxItems: 9 | |
| 43 | 44 | |
| 44 | 45 | clock-names: |
| 45 | 46 | minItems: 7 |
| @@ -52,6 +53,7 @@ properties: · 6 unmodified lines | ||
| 52 | 53 | - const: ddrss_sf_tbu # PCIe SF TBU clock |
| 53 | 54 | - const: noc_aggr # Aggre NoC PCIe AXI clock |
| 54 | 55 | - const: cnoc_sf_axi # Config NoC PCIe1 AXI clock |
| 56 | + - const: qmip_pcie_ahb # QMIP PCIe AHB clock | |
| 55 | 57 | |
| 56 | 58 | interrupts: |
| 57 | 59 | minItems: 8 |
| @@ -47,9 +47,10 @@ properties: · 46 unmodified lines | ||
| 47 | 47 | |
| 48 | 48 | interrupts: |
| 49 | 49 | minItems: 8 |
| 50 | − maxItems: 8 | |
| 50 | + maxItems: 9 | |
| 51 | 51 | |
| 52 | 52 | interrupt-names: |
| 53 | + minItems: 8 | |
| 53 | 54 | items: |
| 54 | 55 | - const: msi0 |
| 55 | 56 | - const: msi1 |
| @@ -59,6 +60,7 @@ properties: · 3 unmodified lines | ||
| 59 | 60 | - const: msi5 |
| 60 | 61 | - const: msi6 |
| 61 | 62 | - const: msi7 |
| 63 | + - const: global | |
| 62 | 64 | |
| 63 | 65 | resets: |
| 64 | 66 | minItems: 1 |
| @@ -130,9 +132,10 @@ examples: · 65 unmodified lines | ||
| 130 | 132 | <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>, |
| 131 | 133 | <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>, |
| 132 | 134 | <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>, |
| 133 | − <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>; | |
| 135 | + <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>, | |
| 136 | + <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>; | |
| 134 | 137 | interrupt-names = "msi0", "msi1", "msi2", "msi3", |
| 135 | − "msi4", "msi5", "msi6", "msi7"; | |
| 138 | + "msi4", "msi5", "msi6", "msi7", "global"; | |
| 136 | 139 | #interrupt-cells = <1>; |
| 137 | 140 | interrupt-map-mask = <0 0 0 0x7>; |
| 138 | 141 | interrupt-map = <0 0 0 1 &intc 0 0 0 149 IRQ_TYPE_LEVEL_HIGH>, /* int_a */ |
| @@ -26,6 +26,7 @@ properties: · 25 unmodified lines | ||
| 26 | 26 | - qcom,pcie-ipq8064-v2 |
| 27 | 27 | - qcom,pcie-ipq8074 |
| 28 | 28 | - qcom,pcie-ipq8074-gen3 |
| 29 | + - qcom,pcie-ipq9574 | |
| 29 | 30 | - qcom,pcie-msm8996 |
| 30 | 31 | - qcom,pcie-qcs404 |
| 31 | 32 | - qcom,pcie-sdm845 |
| @@ -164,6 +165,7 @@ allOf: · 132 unmodified lines | ||
| 164 | 165 | enum: |
| 165 | 166 | - qcom,pcie-ipq6018 |
| 166 | 167 | - qcom,pcie-ipq8074-gen3 |
| 168 | + - qcom,pcie-ipq9574 | |
| 167 | 169 | then: |
| 168 | 170 | properties: |
| 169 | 171 | reg: |
| @@ -400,6 +402,53 @@ allOf: · 230 unmodified lines | ||
| 400 | 402 | - const: axi_m_sticky # AXI Master Sticky reset |
| 401 | 403 | - const: axi_s_sticky # AXI Slave Sticky reset |
| 402 | 404 | |
| 405 | + - if: | |
| 406 | + properties: | |
| 407 | + compatible: | |
| 408 | + contains: | |
| 409 | + enum: | |
| 410 | + - qcom,pcie-ipq9574 | |
| 411 | + then: | |
| 412 | + properties: | |
| 413 | + clocks: | |
| 414 | + minItems: 6 | |
| 415 | + maxItems: 6 | |
| 416 | + clock-names: | |
| 417 | + items: | |
| 418 | + - const: axi_m # AXI Master clock | |
| 419 | + - const: axi_s # AXI Slave clock | |
| 420 | + - const: axi_bridge | |
| 421 | + - const: rchng | |
| 422 | + - const: ahb | |
| 423 | + - const: aux | |
| 424 | + | |
| 425 | + resets: | |
| 426 | + minItems: 8 | |
| 427 | + maxItems: 8 | |
| 428 | + reset-names: | |
| 429 | + items: | |
| 430 | + - const: pipe # PIPE reset | |
| 431 | + - const: sticky # Core Sticky reset | |
| 432 | + - const: axi_s_sticky # AXI Slave Sticky reset | |
| 433 | + - const: axi_s # AXI Slave reset | |
| 434 | + - const: axi_m_sticky # AXI Master Sticky reset | |
| 435 | + - const: axi_m # AXI Master reset | |
| 436 | + - const: aux # AUX Reset | |
| 437 | + - const: ahb # AHB Reset | |
| 438 | + | |
| 439 | + interrupts: | |
| 440 | + minItems: 8 | |
| 441 | + interrupt-names: | |
| 442 | + items: | |
| 443 | + - const: msi0 | |
| 444 | + - const: msi1 | |
| 445 | + - const: msi2 | |
| 446 | + - const: msi3 | |
| 447 | + - const: msi4 | |
| 448 | + - const: msi5 | |
| 449 | + - const: msi6 | |
| 450 | + - const: msi7 | |
| 451 | + | |
| 403 | 452 | - if: |
| 404 | 453 | properties: |
| 405 | 454 | compatible: |
| @@ -510,6 +559,7 @@ allOf: · 104 unmodified lines | ||
| 510 | 559 | - qcom,pcie-ipq8064v2 |
| 511 | 560 | - qcom,pcie-ipq8074 |
| 512 | 561 | - qcom,pcie-ipq8074-gen3 |
| 562 | + - qcom,pcie-ipq9574 | |
| 513 | 563 | - qcom,pcie-qcs404 |
| 514 | 564 | then: |
| 515 | 565 | required: |
| @@ -230,7 +230,6 @@ examples: · 229 unmodified lines | ||
| 230 | 230 | |
| 231 | 231 | interrupts = <25>, <24>; |
| 232 | 232 | interrupt-names = "msi", "hp"; |
| 233 | − #interrupt-cells = <1>; | |
| 234 | 233 | |
| 235 | 234 | reset-gpios = <&port0 0 1>; |
| 236 | 235 | |
| @@ -16,6 +16,13 @@ properties: · 15 unmodified lines | ||
| 16 | 16 | compatible: |
| 17 | 17 | const: starfive,jh7110-pcie |
| 18 | 18 | |
| 19 | + | |
| 20 | + reg: | |
| 21 | + maxItems: 2 | |
| 22 | + | |
| 23 | + reg-names: | |
| 24 | + maxItems: 2 | |
| 25 | + | |
| 19 | 26 | clocks: |
| 20 | 27 | items: |
| 21 | 28 | - description: NOC bus clock |
| @@ -18,16 +18,8 @@ properties: · 17 unmodified lines | ||
| 18 | 18 | const: brcm,ns-usb2-phy |
| 19 | 19 | |
| 20 | 20 | reg: |
| 21 | − anyOf: | |
| 22 | − - maxItems: 1 | |
| 23 | − description: PHY control register | |
| 24 | − - maxItems: 1 | |
| 25 | − description: iomem address range of DMU (Device Management Unit) | |
| 26 | − deprecated: true | |
| 27 | − | |
| 28 | − reg-names: | |
| 29 | − items: | |
| 30 | − - const: dmu | |
| 21 | + maxItems: 1 | |
| 22 | + description: PHY control register | |
| 31 | 23 | |
| 32 | 24 | brcm,syscon-clkset: |
| 33 | 25 | description: phandle to syscon for clkset register |
| @@ -50,12 +42,7 @@ required: · 16 unmodified lines | ||
| 50 | 42 | - clocks |
| 51 | 43 | - clock-names |
| 52 | 44 | - "#phy-cells" |
| 53 | − | |
| 54 | −oneOf: | |
| 55 | − - required: | |
| 56 | − - brcm,syscon-clkset | |
| 57 | − - required: | |
| 58 | − - reg-names | |
| 45 | + - brcm,syscon-clkset | |
| 59 | 46 | |
| 60 | 47 | additionalProperties: false |
| 61 | 48 | |
| @@ -11,12 +11,17 @@ maintainers: · 10 unmodified lines | ||
| 11 | 11 | |
| 12 | 12 | properties: |
| 13 | 13 | compatible: |
| 14 | − enum: | |
| 15 | − - fsl,imx8mq-usb-phy | |
| 16 | − - fsl,imx8mp-usb-phy | |
| 14 | + oneOf: | |
| 15 | + - enum: | |
| 16 | + - fsl,imx8mq-usb-phy | |
| 17 | + - fsl,imx8mp-usb-phy | |
| 18 | + - items: | |
| 19 | + - const: fsl,imx95-usb-phy | |
| 20 | + - const: fsl,imx8mp-usb-phy | |
| 17 | 21 | |
| 18 | 22 | reg: |
| 19 | − maxItems: 1 | |
| 23 | + minItems: 1 | |
| 24 | + maxItems: 2 | |
| 20 | 25 | |
| 21 | 26 | "#phy-cells": |
| 22 | 27 | const: 0 |
| @@ -89,7 +94,34 @@ required: · 66 unmodified lines | ||
| 89 | 94 | - clocks |
| 90 | 95 | - clock-names |
| 91 | 96 | |
| 92 | −additionalProperties: false | |
| 97 | +allOf: | |
| 98 | + - if: | |
| 99 | + properties: | |
| 100 | + compatible: | |
| 101 | + contains: | |
| 102 | + enum: | |
| 103 | + - fsl,imx95-usb-phy | |
| 104 | + then: | |
| 105 | + properties: | |
| 106 | + reg: | |
| 107 | + items: | |
| 108 | + - description: USB PHY Control range | |
| 109 | + - description: USB PHY TCA Block range | |
| 110 | + else: | |
| 111 | + properties: | |
| 112 | + reg: | |
| 113 | + maxItems: 1 | |
| 114 | + | |
| 115 | + - if: | |
| 116 | + properties: | |
| 117 | + compatible: | |
| 118 | + contains: | |
| 119 | + enum: | |
| 120 | + - fsl,imx95-usb-phy | |
| 121 | + then: | |
| 122 | + $ref: /schemas/usb/usb-switch.yaml# | |
| 123 | + | |
| 124 | +unevaluatedProperties: false | |
| 93 | 125 | |
| 94 | 126 | examples: |
| 95 | 127 | - | |
| @@ -32,6 +32,7 @@ properties: · 31 unmodified lines | ||
| 32 | 32 | - enum: |
| 33 | 33 | - fsl,imx8dxl-usbphy |
| 34 | 34 | - fsl,imx8qm-usbphy |
| 35 | + - fsl,imx8qxp-usbphy | |
| 35 | 36 | - fsl,imx8ulp-usbphy |
| 36 | 37 | - const: fsl,imx7ulp-usbphy |
| 37 | 38 | |
| @@ -125,6 +125,16 @@ properties: · 124 unmodified lines | ||
| 125 | 125 | $ref: /schemas/types.yaml#/definitions/uint32 |
| 126 | 126 | default: 28 |
| 127 | 127 | |
| 128 | + power-domains: | |
| 129 | + description: | |
| 130 | + The TPHY of MediaTek should exist within a power domain. The | |
| 131 | + developer should be aware that the hardware design of MediaTek TPHY | |
| 132 | + does not require the addition of MTCMOS. If the power to the TPHY | |
| 133 | + is turned off, it will impact other functions. From the current | |
| 134 | + perspective of USB hardware design, even if MTCMOS is added to the | |
| 135 | + TPHY, it should remain always on. | |
| 136 | + maxItems: 1 | |
| 137 | + | |
| 128 | 138 | # Required child node: |
| 129 | 139 | patternProperties: |
| 130 | 140 | "^(usb|pcie|sata)-phy@[0-9a-f]+$": |
| @@ -8,6 +8,7 @@ title: Microchip Sparx5 Serdes controller · 7 unmodified lines | ||
| 8 | 8 | |
| 9 | 9 | maintainers: |
| 10 | 10 | - Steen Hegelund <steen.hegelund@microchip.com> |
| 11 | + - Daniel Machon <daniel.machon@microchip.com> | |
| 11 | 12 | |
| 12 | 13 | description: | |
| 13 | 14 | The Sparx5 SERDES interfaces share the same basic functionality, but |
| @@ -62,12 +63,26 @@ description: | · 48 unmodified lines | ||
| 62 | 63 | * 10.3125 Gbps (10GBASE-R/10GBASE-KR/USXGMII) |
| 63 | 64 | * 25.78125 Gbps (25GBASE-KR/25GBASE-CR/25GBASE-SR/25GBASE-LR/25GBASE-ER) |
| 64 | 65 | |
| 66 | + lan969x has ten SERDES10G interfaces that share the same features, operating | |
| 67 | + modes and data rates as the equivalent Sparx5 SERDES10G interfaces. | |
| 68 | + | |
| 65 | 69 | properties: |
| 66 | 70 | $nodename: |
| 67 | 71 | pattern: "^serdes@[0-9a-f]+$" |
| 68 | 72 | |
| 69 | 73 | compatible: |
| 70 | − const: microchip,sparx5-serdes | |
| 74 | + oneOf: | |
| 75 | + - enum: | |
| 76 | + - microchip,sparx5-serdes | |
| 77 | + - microchip,lan9691-serdes | |
| 78 | + - items: | |
| 79 | + - enum: | |
| 80 | + - microchip,lan9698-serdes | |
| 81 | + - microchip,lan9696-serdes | |
| 82 | + - microchip,lan9694-serdes | |
| 83 | + - microchip,lan9693-serdes | |
| 84 | + - microchip,lan9692-serdes | |
| 85 | + - const: microchip,lan9691-serdes | |
| 71 | 86 | |
| 72 | 87 | reg: |
| 73 | 88 | minItems: 1 |
| @@ -0,0 +1,55 @@ | ||
| 1 | +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause | |
| 2 | +%YAML 1.2 | |
| 3 | +--- | |
| 4 | +$id: http://devicetree.org/schemas/phy/nxp,ptn3222.yaml# | |
| 5 | +$schema: http://devicetree.org/meta-schemas/core.yaml# | |
| 6 | + | |
| 7 | +title: NXP PTN3222 1-port eUSB2 to USB2 redriver | |
| 8 | + | |
| 9 | +maintainers: | |
| 10 | + - Dmitry Baryshkov <dmitry.baryshkov@linaro.org> | |
| 11 | + | |
| 12 | +properties: | |
| 13 | + compatible: | |
| 14 | + enum: | |
| 15 | + - nxp,ptn3222 | |
| 16 | + | |
| 17 | + reg: | |
| 18 | + maxItems: 1 | |
| 19 | + | |
| 20 | + "#phy-cells": | |
| 21 | + const: 0 | |
| 22 | + | |
| 23 | + vdd1v8-supply: | |
| 24 | + description: power supply (1.8V) | |
| 25 | + | |
| 26 | + vdd3v3-supply: | |
| 27 | + description: power supply (3.3V) | |
| 28 | + | |
| 29 | + reset-gpios: true | |
| 30 | + | |
| 31 | +required: | |
| 32 | + - compatible | |
| 33 | + - reg | |
| 34 | + - '#phy-cells' | |
| 35 | + | |
| 36 | +additionalProperties: false | |
| 37 | + | |
| 38 | +examples: | |
| 39 | + - | | |
| 40 | + #include <dt-bindings/gpio/gpio.h> | |
| 41 | + | |
| 42 | + i2c { | |
| 43 | + #address-cells = <1>; | |
| 44 | + #size-cells = <0>; | |
| 45 | + | |
| 46 | + redriver@4f { | |
| 47 | + compatible = "nxp,ptn3222"; | |
| 48 | + reg = <0x4f>; | |
| 49 | + #phy-cells = <0>; | |
| 50 | + vdd3v3-supply = <&vreg_3p3>; | |
| 51 | + vdd1v8-supply = <&vreg_1p8>; | |
| 52 | + reset-gpios = <&gpio_reset GPIO_ACTIVE_LOW>; | |
| 53 | + }; | |
| 54 | + }; | |
| 55 | +... | |
| @@ -96,7 +96,7 @@ patternProperties: · 95 unmodified lines | ||
| 96 | 96 | Specifies the type of PHY for which the group of PHY lanes is used. |
| 97 | 97 | Refer include/dt-bindings/phy/phy.h. Constants from the header should be used. |
| 98 | 98 | $ref: /schemas/types.yaml#/definitions/uint32 |
| 99 | − enum: [2, 4] | |
| 99 | + enum: [2, 4, 8, 9] | |
| 100 | 100 | |
| 101 | 101 | cdns,num-lanes: |
| 102 | 102 | description: |
| @@ -1,43 +0,0 @@ | ||
| 1 | −ROCKCHIP HDMI PHY WITH INNO IP BLOCK | |
| 2 | − | |
| 3 | −Required properties: | |
| 4 | − - compatible : should be one of the listed compatibles: | |
| 5 | − * "rockchip,rk3228-hdmi-phy", | |
| 6 | − * "rockchip,rk3328-hdmi-phy"; | |
| 7 | − - reg : Address and length of the hdmi phy control register set | |
| 8 | − - clocks : phandle + clock specifier for the phy clocks | |
| 9 | − - clock-names : string, clock name, must contain "sysclk" for system | |
| 10 | − control and register configuration, "refoclk" for crystal- | |
| 11 | − oscillator reference PLL clock input and "refpclk" for pclk- | |
| 12 | − based refeference PLL clock input. | |
| 13 | − - #clock-cells: should be 0. | |
| 14 | − - clock-output-names : shall be the name for the output clock. | |
| 15 | − - interrupts : phandle + interrupt specified for the hdmiphy interrupt | |
| 16 | − - #phy-cells : must be 0. See ./phy-bindings.txt for details. | |
| 17 | − | |
| 18 | −Optional properties for rk3328-hdmi-phy: | |
| 19 | − - nvmem-cells = phandle + nvmem specifier for the cpu-version efuse | |
| 20 | − - nvmem-cell-names : "cpu-version" to read the chip version, required | |
| 21 | − for adjustment to some frequency settings | |
| 22 | − | |
| 23 | −Example: | |
| 24 | − hdmi_phy: hdmi-phy@12030000 { | |
| 25 | − compatible = "rockchip,rk3228-hdmi-phy"; | |
| 26 | − reg = <0x12030000 0x10000>; | |
| 27 | − #phy-cells = <0>; | |
| 28 | − clocks = <&cru PCLK_HDMI_PHY>, <&xin24m>, <&cru DCLK_HDMIPHY>; | |
| 29 | − clock-names = "sysclk", "refoclk", "refpclk"; | |
| 30 | − #clock-cells = <0>; | |
| 31 | − clock-output-names = "hdmi_phy"; | |
| 32 | − status = "disabled"; | |
| 33 | − }; | |
| 34 | − | |
| 35 | −Then the PHY can be used in other nodes such as: | |
| 36 | − | |
| 37 | − hdmi: hdmi@200a0000 { | |
| 38 | − compatible = "rockchip,rk3228-dw-hdmi"; | |
| 39 | − ... | |
| 40 | − phys = <&hdmi_phy>; | |
| 41 | − phy-names = "hdmi"; | |
| 42 | − ... | |
| 43 | − }; | |
| @@ -13,6 +13,7 @@ maintainers: · 12 unmodified lines | ||
| 13 | 13 | properties: |
| 14 | 14 | compatible: |
| 15 | 15 | enum: |
| 16 | + - rockchip,rk3576-usbdp-phy | |
| 16 | 17 | - rockchip,rk3588-usbdp-phy |
| 17 | 18 | |
| 18 | 19 | reg: |
| @@ -17,6 +17,7 @@ description: · 16 unmodified lines | ||
| 17 | 17 | properties: |
| 18 | 18 | compatible: |
| 19 | 19 | enum: |
| 20 | + - qcom,sa8775p-edp-phy | |
| 20 | 21 | - qcom,sc7280-edp-phy |
| 21 | 22 | - qcom,sc8180x-edp-phy |
| 22 | 23 | - qcom,sc8280xp-dp-phy |
| @@ -18,6 +18,7 @@ properties: · 17 unmodified lines | ||
| 18 | 18 | enum: |
| 19 | 19 | - qcom,msm8998-qmp-usb3-phy |
| 20 | 20 | - qcom,qcm2290-qmp-usb3-phy |
| 21 | + - qcom,qcs615-qmp-usb3-phy | |
| 21 | 22 | - qcom,sdm660-qmp-usb3-phy |
| 22 | 23 | - qcom,sm6115-qmp-usb3-phy |
| 23 | 24 | |
| @@ -96,6 +97,7 @@ allOf: · 72 unmodified lines | ||
| 96 | 97 | contains: |
| 97 | 98 | enum: |
| 98 | 99 | - qcom,msm8998-qmp-usb3-phy |
| 100 | + - qcom,qcs615-qmp-usb3-phy | |
| 99 | 101 | - qcom,sdm660-qmp-usb3-phy |
| 100 | 102 | then: |
| 101 | 103 | properties: |
| @@ -25,6 +25,7 @@ properties: · 24 unmodified lines | ||
| 25 | 25 | - qcom,msm8996-qusb2-phy |
| 26 | 26 | - qcom,msm8998-qusb2-phy |
| 27 | 27 | - qcom,qcm2290-qusb2-phy |
| 28 | + - qcom,qcs615-qusb2-phy | |
| 28 | 29 | - qcom,sdm660-qusb2-phy |
| 29 | 30 | - qcom,sm4250-qusb2-phy |
| 30 | 31 | - qcom,sm6115-qusb2-phy |
| @@ -15,7 +15,12 @@ description: · 14 unmodified lines | ||
| 15 | 15 | |
| 16 | 16 | properties: |
| 17 | 17 | compatible: |
| 18 | − const: qcom,sa8775p-dwmac-sgmii-phy | |
| 18 | + oneOf: | |
| 19 | + - items: | |
| 20 | + - enum: | |
| 21 | + - qcom,qcs8300-dwmac-sgmii-phy | |
| 22 | + - const: qcom,sa8775p-dwmac-sgmii-phy | |
| 23 | + - const: qcom,sa8775p-dwmac-sgmii-phy | |
| 19 | 24 | |
| 20 | 25 | reg: |
| 21 | 26 | items: |
| @@ -41,6 +41,7 @@ properties: · 40 unmodified lines | ||
| 41 | 41 | - qcom,x1e80100-qmp-gen3x2-pcie-phy |
| 42 | 42 | - qcom,x1e80100-qmp-gen4x2-pcie-phy |
| 43 | 43 | - qcom,x1e80100-qmp-gen4x4-pcie-phy |
| 44 | + - qcom,x1e80100-qmp-gen4x8-pcie-phy | |
| 44 | 45 | |
| 45 | 46 | reg: |
| 46 | 47 | minItems: 1 |
| @@ -172,6 +173,7 @@ allOf: · 125 unmodified lines | ||
| 172 | 173 | - qcom,x1e80100-qmp-gen3x2-pcie-phy |
| 173 | 174 | - qcom,x1e80100-qmp-gen4x2-pcie-phy |
| 174 | 175 | - qcom,x1e80100-qmp-gen4x4-pcie-phy |
| 176 | + - qcom,x1e80100-qmp-gen4x8-pcie-phy | |
| 175 | 177 | then: |
| 176 | 178 | properties: |
| 177 | 179 | clocks: |
| @@ -202,6 +204,7 @@ allOf: · 24 unmodified lines | ||
| 202 | 204 | - qcom,sm8650-qmp-gen4x2-pcie-phy |
| 203 | 205 | - qcom,x1e80100-qmp-gen4x2-pcie-phy |
| 204 | 206 | - qcom,x1e80100-qmp-gen4x4-pcie-phy |
| 207 | + - qcom,x1e80100-qmp-gen4x8-pcie-phy | |
| 205 | 208 | then: |
| 206 | 209 | properties: |
| 207 | 210 | resets: |
| @@ -15,26 +15,35 @@ description: · 14 unmodified lines | ||
| 15 | 15 | |
| 16 | 16 | properties: |
| 17 | 17 | compatible: |
| 18 | − enum: | |
| 19 | − - qcom,msm8996-qmp-ufs-phy | |
| 20 | − - qcom,msm8998-qmp-ufs-phy | |
| 21 | − - qcom,sa8775p-qmp-ufs-phy | |
| 22 | − - qcom,sc7180-qmp-ufs-phy | |
| 23 | − - qcom,sc7280-qmp-ufs-phy | |
| 24 | − - qcom,sc8180x-qmp-ufs-phy | |
| 25 | − - qcom,sc8280xp-qmp-ufs-phy | |
| 26 | − - qcom,sdm845-qmp-ufs-phy | |
| 27 | − - qcom,sm6115-qmp-ufs-phy | |
| 28 | − - qcom,sm6125-qmp-ufs-phy | |
| 29 | − - qcom,sm6350-qmp-ufs-phy | |
| 30 | − - qcom,sm7150-qmp-ufs-phy | |
| 31 | − - qcom,sm8150-qmp-ufs-phy | |
| 32 | − - qcom,sm8250-qmp-ufs-phy | |
| 33 | − - qcom,sm8350-qmp-ufs-phy | |
| 34 | − - qcom,sm8450-qmp-ufs-phy | |
| 35 | − - qcom,sm8475-qmp-ufs-phy | |
| 36 | − - qcom,sm8550-qmp-ufs-phy | |
| 37 | − - qcom,sm8650-qmp-ufs-phy | |
| 18 | + oneOf: | |
| 19 | + - items: | |
| 20 | + - enum: | |
| 21 | + - qcom,qcs615-qmp-ufs-phy | |
| 22 | + - const: qcom,sm6115-qmp-ufs-phy | |
| 23 | + - items: | |
| 24 | + - enum: | |
| 25 | + - qcom,qcs8300-qmp-ufs-phy | |
| 26 | + - const: qcom,sa8775p-qmp-ufs-phy | |
| 27 | + - enum: | |
| 28 | + - qcom,msm8996-qmp-ufs-phy | |
| 29 | + - qcom,msm8998-qmp-ufs-phy | |
| 30 | + - qcom,sa8775p-qmp-ufs-phy | |
| 31 | + - qcom,sc7180-qmp-ufs-phy | |
| 32 | + - qcom,sc7280-qmp-ufs-phy | |
| 33 | + - qcom,sc8180x-qmp-ufs-phy | |
| 34 | + - qcom,sc8280xp-qmp-ufs-phy | |
| 35 | + - qcom,sdm845-qmp-ufs-phy | |
| 36 | + - qcom,sm6115-qmp-ufs-phy | |
| 37 | + - qcom,sm6125-qmp-ufs-phy | |
| 38 | + - qcom,sm6350-qmp-ufs-phy | |
| 39 | + - qcom,sm7150-qmp-ufs-phy | |
| 40 | + - qcom,sm8150-qmp-ufs-phy | |
| 41 | + - qcom,sm8250-qmp-ufs-phy | |
| 42 | + - qcom,sm8350-qmp-ufs-phy | |
| 43 | + - qcom,sm8450-qmp-ufs-phy | |
| 44 | + - qcom,sm8475-qmp-ufs-phy | |
| 45 | + - qcom,sm8550-qmp-ufs-phy | |
| 46 | + - qcom,sm8650-qmp-ufs-phy | |
| 38 | 47 | |
| 39 | 48 | reg: |
| 40 | 49 | maxItems: 1 |
| @@ -20,6 +20,7 @@ properties: · 19 unmodified lines | ||
| 20 | 20 | - qcom,ipq8074-qmp-usb3-phy |
| 21 | 21 | - qcom,ipq9574-qmp-usb3-phy |
| 22 | 22 | - qcom,msm8996-qmp-usb3-phy |
| 23 | + - qcom,qcs8300-qmp-usb3-uni-phy | |
| 23 | 24 | - qcom,qdu1000-qmp-usb3-uni-phy |
| 24 | 25 | - qcom,sa8775p-qmp-usb3-uni-phy |
| 25 | 26 | - qcom,sc8180x-qmp-usb3-uni-phy |
| @@ -111,6 +112,7 @@ allOf: · 85 unmodified lines | ||
| 111 | 112 | compatible: |
| 112 | 113 | contains: |
| 113 | 114 | enum: |
| 115 | + - qcom,qcs8300-qmp-usb3-uni-phy | |
| 114 | 116 | - qcom,qdu1000-qmp-usb3-uni-phy |
| 115 | 117 | - qcom,sa8775p-qmp-usb3-uni-phy |
| 116 | 118 | - qcom,sc8180x-qmp-usb3-uni-phy |
| @@ -17,6 +17,7 @@ properties: · 16 unmodified lines | ||
| 17 | 17 | oneOf: |
| 18 | 18 | - items: |
| 19 | 19 | - enum: |
| 20 | + - qcom,sar2130p-snps-eusb2-phy | |
| 20 | 21 | - qcom,sdx75-snps-eusb2-phy |
| 21 | 22 | - qcom,sm8650-snps-eusb2-phy |
| 22 | 23 | - qcom,x1e80100-snps-eusb2-phy |
| @@ -22,6 +22,7 @@ properties: · 21 unmodified lines | ||
| 22 | 22 | - const: qcom,usb-snps-hs-5nm-phy |
| 23 | 23 | - items: |
| 24 | 24 | - enum: |
| 25 | + - qcom,qcs8300-usb-hs-phy | |
| 25 | 26 | - qcom,qdu1000-usb-hs-phy |
| 26 | 27 | - qcom,sc7280-usb-hs-phy |
| 27 | 28 | - qcom,sc8180x-usb-hs-phy |
| @@ -20,6 +20,7 @@ properties: · 19 unmodified lines | ||
| 20 | 20 | - rockchip,rk3366-usb2phy |
| 21 | 21 | - rockchip,rk3399-usb2phy |
| 22 | 22 | - rockchip,rk3568-usb2phy |
| 23 | + - rockchip,rk3576-usb2phy | |
| 23 | 24 | - rockchip,rk3588-usb2phy |
| 24 | 25 | - rockchip,rv1108-usb2phy |
| 25 | 26 | |
| @@ -34,10 +35,15 @@ properties: · 8 unmodified lines | ||
| 34 | 35 | const: 0 |
| 35 | 36 | |
| 36 | 37 | clocks: |
| 37 | − maxItems: 1 | |
| 38 | + minItems: 1 | |
| 39 | + maxItems: 3 | |
| 38 | 40 | |
| 39 | 41 | clock-names: |
| 40 | − const: phyclk | |
| 42 | + minItems: 1 | |
| 43 | + items: | |
| 44 | + - const: phyclk | |
| 45 | + - const: aclk | |
| 46 | + - const: aclk_slv | |
| 41 | 47 | |
| 42 | 48 | assigned-clocks: |
| 43 | 49 | description: |
| @@ -172,6 +178,41 @@ allOf: · 128 unmodified lines | ||
| 172 | 178 | - interrupts |
| 173 | 179 | - interrupt-names |
| 174 | 180 | |
| 181 | + - if: | |
| 182 | + properties: | |
| 183 | + compatible: | |
| 184 | + contains: | |
| 185 | + enum: | |
| 186 | + - rockchip,px30-usb2phy | |
| 187 | + - rockchip,rk3128-usb2phy | |
| 188 | + - rockchip,rk3228-usb2phy | |
| 189 | + - rockchip,rk3308-usb2phy | |
| 190 | + - rockchip,rk3328-usb2phy | |
| 191 | + - rockchip,rk3366-usb2phy | |
| 192 | + - rockchip,rk3399-usb2phy | |
| 193 | + - rockchip,rk3568-usb2phy | |
| 194 | + - rockchip,rk3588-usb2phy | |
| 195 | + - rockchip,rv1108-usb2phy | |
| 196 | + then: | |
| 197 | + properties: | |
| 198 | + clocks: | |
| 199 | + maxItems: 1 | |
| 200 | + clock-names: | |
| 201 | + maxItems: 1 | |
| 202 | + | |
| 203 | + - if: | |
| 204 | + properties: | |
| 205 | + compatible: | |
| 206 | + contains: | |
| 207 | + enum: | |
| 208 | + - rockchip,rk3576-usb2phy | |
| 209 | + then: | |
| 210 | + properties: | |
| 211 | + clocks: | |
| 212 | + minItems: 3 | |
| 213 | + clock-names: | |
| 214 | + minItems: 3 | |
| 215 | + | |
| 175 | 216 | additionalProperties: false |
| 176 | 217 | |
| 177 | 218 | examples: |
| @@ -0,0 +1,97 @@ | ||
| 1 | +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) | |
| 2 | +%YAML 1.2 | |
| 3 | +--- | |
| 4 | +$id: http://devicetree.org/schemas/phy/rockchip,rk3228-hdmi-phy.yaml# | |
| 5 | +$schema: http://devicetree.org/meta-schemas/core.yaml# | |
| 6 | + | |
| 7 | +title: Rockchip HDMI PHY with Innosilicon IP block | |
| 8 | + | |
| 9 | +maintainers: | |
| 10 | + - Heiko Stuebner <heiko@sntech.de> | |
| 11 | + | |
| 12 | +properties: | |
| 13 | + compatible: | |
| 14 | + enum: | |
| 15 | + - rockchip,rk3228-hdmi-phy | |
| 16 | + - rockchip,rk3328-hdmi-phy | |
| 17 | + | |
| 18 | + reg: | |
| 19 | + maxItems: 1 | |
| 20 | + | |
| 21 | + clocks: | |
| 22 | + maxItems: 3 | |
| 23 | + | |
| 24 | + clock-names: | |
| 25 | + items: | |
| 26 | + - const: sysclk | |
| 27 | + - const: refoclk | |
| 28 | + - const: refpclk | |
| 29 | + | |
| 30 | + clock-output-names: | |
| 31 | + description: | |
| 32 | + The hdmiphy output clock name, that gets fed back to the CRU. | |
| 33 | + | |
| 34 | + "#clock-cells": | |
| 35 | + const: 0 | |
| 36 | + | |
| 37 | + interrupts: | |
| 38 | + maxItems: 1 | |
| 39 | + | |
| 40 | + nvmem-cells: | |
| 41 | + maxItems: 1 | |
| 42 | + description: A phandle + nvmem specifier for the cpu-version efuse | |
| 43 | + for adjustment to some frequency settings, depending on cpu-version | |
| 44 | + | |
| 45 | + nvmem-cell-names: | |
| 46 | + items: | |
| 47 | + - const: cpu-version | |
| 48 | + | |
| 49 | + '#phy-cells': | |
| 50 | + const: 0 | |
| 51 | + | |
| 52 | +required: | |
| 53 | + - compatible | |
| 54 | + - reg | |
| 55 | + - clocks | |
| 56 | + - clock-names | |
| 57 | + - clock-output-names | |
| 58 | + - '#clock-cells' | |
| 59 | + - '#phy-cells' | |
| 60 | + | |
| 61 | +allOf: | |
| 62 | + - if: | |
| 63 | + properties: | |
| 64 | + compatible: | |
| 65 | + contains: | |
| 66 | + const: rockchip,rk3228-hdmi-phy | |
| 67 | + | |
| 68 | + then: | |
| 69 | + properties: | |
| 70 | + interrupts: false | |
| 71 | + | |
| 72 | + - if: | |
| 73 | + properties: | |
| 74 | + compatible: | |
| 75 | + contains: | |
| 76 | + const: rockchip,rk3328-hdmi-phy | |
| 77 | + | |
| 78 | + then: | |
| 79 | + required: | |
| 80 | + - interrupts | |
| 81 | + | |
| 82 | +additionalProperties: false | |
| 83 | + | |
| 84 | +examples: | |
| 85 | + - | | |
| 86 | + | |
| 87 | + #include <dt-bindings/clock/rk3228-cru.h> | |
| 88 | + hdmi_phy: phy@12030000 { | |
| 89 | + compatible = "rockchip,rk3228-hdmi-phy"; | |
| 90 | + reg = <0x12030000 0x10000>; | |
| 91 | + #phy-cells = <0>; | |
| 92 | + clocks = <&cru PCLK_HDMI_PHY>, <&xin24m>, <&cru DCLK_HDMI_PHY>; | |
| 93 | + clock-names = "sysclk", "refoclk", "refpclk"; | |
| 94 | + #clock-cells = <0>; | |
| 95 | + | |
| 96 | + clock-output-names = "hdmi_phy"; | |
| 97 | + }; | |
| @@ -0,0 +1,119 @@ | ||
| 1 | +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) | |
| 2 | +%YAML 1.2 | |
| 3 | +--- | |
| 4 | +$id: http://devicetree.org/schemas/phy/st,stm32mp25-combophy.yaml# | |
| 5 | +$schema: http://devicetree.org/meta-schemas/core.yaml# | |
| 6 | + | |
| 7 | +title: STMicroelectronics STM32MP25 USB3/PCIe COMBOPHY | |
| 8 | + | |
| 9 | +maintainers: | |
| 10 | + - Christian Bruel <christian.bruel@foss.st.com> | |
| 11 | + | |
| 12 | +description: | |
| 13 | + Single lane PHY shared (exclusive) between the USB3 and PCIe controllers. | |
| 14 | + Supports 5Gbit/s for USB3 and PCIe gen2 or 2.5Gbit/s for PCIe gen1. | |
| 15 | + | |
| 16 | +properties: | |
| 17 | + compatible: | |
| 18 | + const: st,stm32mp25-combophy | |
| 19 | + | |
| 20 | + reg: | |
| 21 | + maxItems: 1 | |
| 22 | + | |
| 23 | + "#phy-cells": | |
| 24 | + const: 1 | |
| 25 | + | |
| 26 | + clocks: | |
| 27 | + minItems: 2 | |
| 28 | + items: | |
| 29 | + - description: apb Bus clock mandatory to access registers. | |
| 30 | + - description: ker Internal RCC reference clock for USB3 or PCIe | |
| 31 | + - description: pad Optional on board clock input for PCIe only. Typically an | |
| 32 | + external 100Mhz oscillator wired on dedicated CLKIN pad. Used as reference | |
| 33 | + clock input instead of the ker | |
| 34 | + | |
| 35 | + clock-names: | |
| 36 | + minItems: 2 | |
| 37 | + items: | |
| 38 | + - const: apb | |
| 39 | + - const: ker | |
| 40 | + - const: pad | |
| 41 | + | |
| 42 | + resets: | |
| 43 | + maxItems: 1 | |
| 44 | + | |
| 45 | + reset-names: | |
| 46 | + const: phy | |
| 47 | + | |
| 48 | + power-domains: | |
| 49 | + maxItems: 1 | |
| 50 | + | |
| 51 | + wakeup-source: true | |
| 52 | + | |
| 53 | + interrupts: | |
| 54 | + maxItems: 1 | |
| 55 | + description: interrupt used for wakeup | |
| 56 | + | |
| 57 | + access-controllers: | |
| 58 | + maxItems: 1 | |
| 59 | + description: Phandle to the rifsc device to check access right. | |
| 60 | + | |
| 61 | + st,ssc-on: | |
| 62 | + $ref: /schemas/types.yaml#/definitions/flag | |
| 63 | + description: | |
| 64 | + A property whose presence indicates that the Spread Spectrum Clocking is active. | |
| 65 | + | |
| 66 | + st,rx-equalizer: | |
| 67 | + $ref: /schemas/types.yaml#/definitions/uint32 | |
| 68 | + minimum: 0 | |
| 69 | + maximum: 7 | |
| 70 | + default: 2 | |
| 71 | + description: | |
| 72 | + A 3 bit value to tune the RX fixed equalizer setting for optimal eye compliance | |
| 73 | + | |
| 74 | + st,output-micro-ohms: | |
| 75 | + minimum: 3999000 | |
| 76 | + maximum: 6090000 | |
| 77 | + default: 4968000 | |
| 78 | + description: | |
| 79 | + A value property to tune the Single Ended Output Impedance, simulations results | |
| 80 | + at 25C for a VDDP=0.8V. The hardware accepts discrete values in this range. | |
| 81 | + | |
| 82 | + st,output-vswing-microvolt: | |
| 83 | + minimum: 442000 | |
| 84 | + maximum: 803000 | |
| 85 | + default: 803000 | |
| 86 | + description: | |
| 87 | + A value property in microvolt to tune the Single Ended Output Voltage Swing to change the | |
| 88 | + Vlo, Vhi for a VDDP = 0.8V. The hardware accepts discrete values in this range. | |
| 89 | + | |
| 90 | +required: | |
| 91 | + - compatible | |
| 92 | + - reg | |
| 93 | + - "#phy-cells" | |
| 94 | + - clocks | |
| 95 | + - clock-names | |
| 96 | + - resets | |
| 97 | + - reset-names | |
| 98 | + | |
| 99 | +additionalProperties: false | |
| 100 | + | |
| 101 | +examples: | |
| 102 | + - | | |
| 103 | + #include <dt-bindings/clock/st,stm32mp25-rcc.h> | |
| 104 | + #include <dt-bindings/interrupt-controller/arm-gic.h> | |
| 105 | + #include <dt-bindings/reset/st,stm32mp25-rcc.h> | |
| 106 | + | |
| 107 | + phy@480c0000 { | |
| 108 | + compatible = "st,stm32mp25-combophy"; | |
| 109 | + reg = <0x480c0000 0x1000>; | |
| 110 | + #phy-cells = <1>; | |
| 111 | + clocks = <&rcc CK_BUS_USB3PCIEPHY>, <&rcc CK_KER_USB3PCIEPHY>; | |
| 112 | + clock-names = "apb", "ker"; | |
| 113 | + resets = <&rcc USB3PCIEPHY_R>; | |
| 114 | + reset-names = "phy"; | |
| 115 | + access-controllers = <&rifsc 67>; | |
| 116 | + power-domains = <&CLUSTER_PD>; | |
| 117 | + wakeup-source; | |
| 118 | + interrupts-extended = <&exti1 45 IRQ_TYPE_EDGE_FALLING>; | |
| 119 | + }; | |
| @@ -14,10 +14,15 @@ properties: · 13 unmodified lines | ||
| 14 | 14 | pattern: "^can-phy" |
| 15 | 15 | |
| 16 | 16 | compatible: |
| 17 | − enum: | |
| 18 | − - nxp,tjr1443 | |
| 19 | − - ti,tcan1042 | |
| 20 | − - ti,tcan1043 | |
| 17 | + oneOf: | |
| 18 | + - items: | |
| 19 | + - enum: | |
| 20 | + - microchip,ata6561 | |
| 21 | + - const: ti,tcan1042 | |
| 22 | + - enum: | |
| 23 | + - ti,tcan1042 | |
| 24 | + - ti,tcan1043 | |
| 25 | + - nxp,tjr1443 | |
| 21 | 26 | |
| 22 | 27 | '#phy-cells': |
| 23 | 28 | const: 0 |
| @@ -0,0 +1,400 @@ | ||
| 1 | +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) | |
| 2 | +%YAML 1.2 | |
| 3 | +--- | |
| 4 | +$id: http://devicetree.org/schemas/pinctrl/airoha,en7581-pinctrl.yaml# | |
| 5 | +$schema: http://devicetree.org/meta-schemas/core.yaml# | |
| 6 | + | |
| 7 | +title: Airoha EN7581 Pin Controller | |
| 8 | + | |
| 9 | +maintainers: | |
| 10 | + - Lorenzo Bianconi <lorenzo@kernel.org> | |
| 11 | + | |
| 12 | +description: | |
| 13 | + The Airoha's EN7581 Pin controller is used to control SoC pins. | |
| 14 | + | |
| 15 | +properties: | |
| 16 | + compatible: | |
| 17 | + const: airoha,en7581-pinctrl | |
| 18 | + | |
| 19 | + interrupts: | |
| 20 | + maxItems: 1 | |
| 21 | + | |
| 22 | + gpio-controller: true | |
| 23 | + | |
| 24 | + '#gpio-cells': | |
| 25 | + const: 2 | |
| 26 | + | |
| 27 | + interrupt-controller: true | |
| 28 | + | |
| 29 | + '#interrupt-cells': | |
| 30 | + const: 2 | |
| 31 | + | |
| 32 | +allOf: | |
| 33 | + - $ref: pinctrl.yaml# | |
| 34 | + | |
| 35 | +required: | |
| 36 | + - compatible | |
| 37 | + - interrupts | |
| 38 | + - gpio-controller | |
| 39 | + - "#gpio-cells" | |
| 40 | + - interrupt-controller | |
| 41 | + - "#interrupt-cells" | |
| 42 | + | |
| 43 | +patternProperties: | |
| 44 | + '-pins$': | |
| 45 | + type: object | |
| 46 | + | |
| 47 | + patternProperties: | |
| 48 | + '^mux(-|$)': | |
| 49 | + type: object | |
| 50 | + | |
| 51 | + description: | |
| 52 | + pinmux configuration nodes. | |
| 53 | + | |
| 54 | + $ref: /schemas/pinctrl/pinmux-node.yaml | |
| 55 | + | |
| 56 | + properties: | |
| 57 | + function: | |
| 58 | + description: | |
| 59 | + A string containing the name of the function to mux to the group. | |
| 60 | + enum: [pon, tod_1pps, sipo, mdio, uart, i2c, jtag, pcm, spi, | |
| 61 | + pcm_spi, i2s, emmc, pnand, pcie_reset, pwm, phy1_led0, | |
| 62 | + phy2_led0, phy3_led0, phy4_led0, phy1_led1, phy2_led1, | |
| 63 | + phy3_led1, phy4_led1] | |
| 64 | + | |
| 65 | + groups: | |
| 66 | + description: | |
| 67 | + An array of strings. Each string contains the name of a group. | |
| 68 | + | |
| 69 | + required: | |
| 70 | + - function | |
| 71 | + - groups | |
| 72 | + | |
| 73 | + allOf: | |
| 74 | + - if: | |
| 75 | + properties: | |
| 76 | + function: | |
| 77 | + const: pon | |
| 78 | + then: | |
| 79 | + properties: | |
| 80 | + groups: | |
| 81 | + enum: [pon] | |
| 82 | + - if: | |
| 83 | + properties: | |
| 84 | + function: | |
| 85 | + const: tod_1pps | |
| 86 | + then: | |
| 87 | + properties: | |
| 88 | + groups: | |
| 89 | + enum: [pon_tod_1pps, gsw_tod_1pps] | |
| 90 | + - if: | |
| 91 | + properties: | |
| 92 | + function: | |
| 93 | + const: sipo | |
| 94 | + then: | |
| 95 | + properties: | |
| 96 | + groups: | |
| 97 | + enum: [sipo, sipo_rclk] | |
| 98 | + - if: | |
| 99 | + properties: | |
| 100 | + function: | |
| 101 | + const: mdio | |
| 102 | + then: | |
| 103 | + properties: | |
| 104 | + groups: | |
| 105 | + enum: [mdio] | |
| 106 | + - if: | |
| 107 | + properties: | |
| 108 | + function: | |
| 109 | + const: uart | |
| 110 | + then: | |
| 111 | + properties: | |
| 112 | + groups: | |
| 113 | + items: | |
| 114 | + enum: [uart2, uart2_cts_rts, hsuart, hsuart_cts_rts, | |
| 115 | + uart4, uart5] | |
| 116 | + maxItems: 2 | |
| 117 | + - if: | |
| 118 | + properties: | |
| 119 | + function: | |
| 120 | + const: i2c | |
| 121 | + then: | |
| 122 | + properties: | |
| 123 | + groups: | |
| 124 | + enum: [i2c1] | |
| 125 | + - if: | |
| 126 | + properties: | |
| 127 | + function: | |
| 128 | + const: jtag | |
| 129 | + then: | |
| 130 | + properties: | |
| 131 | + groups: | |
| 132 | + enum: [jtag_udi, jtag_dfd] | |
| 133 | + - if: | |
| 134 | + properties: | |
| 135 | + function: | |
| 136 | + const: pcm | |
| 137 | + then: | |
| 138 | + properties: | |
| 139 | + groups: | |
| 140 | + enum: [pcm1, pcm2] | |
| 141 | + - if: | |
| 142 | + properties: | |
| 143 | + function: | |
| 144 | + const: spi | |
| 145 | + then: | |
| 146 | + properties: | |
| 147 | + groups: | |
| 148 | + items: | |
| 149 | + enum: [spi_quad, spi_cs1] | |
| 150 | + maxItems: 2 | |
| 151 | + - if: | |
| 152 | + properties: | |
| 153 | + function: | |
| 154 | + const: pcm_spi | |
| 155 | + then: | |
| 156 | + properties: | |
| 157 | + groups: | |
| 158 | + items: | |
| 159 | + enum: [pcm_spi, pcm_spi_int, pcm_spi_rst, pcm_spi_cs1, | |
| 160 | + pcm_spi_cs2_p156, pcm_spi_cs2_p128, pcm_spi_cs3, | |
| 161 | + pcm_spi_cs4] | |
| 162 | + maxItems: 7 | |
| 163 | + - if: | |
| 164 | + properties: | |
| 165 | + function: | |
| 166 | + const: i2c | |
| 167 | + then: | |
| 168 | + properties: | |
| 169 | + groups: | |
| 170 | + enum: [i2s] | |
| 171 | + - if: | |
| 172 | + properties: | |
| 173 | + function: | |
| 174 | + const: emmc | |
| 175 | + then: | |
| 176 | + properties: | |
| 177 | + groups: | |
| 178 | + enum: [emmc] | |
| 179 | + - if: | |
| 180 | + properties: | |
| 181 | + function: | |
| 182 | + const: pnand | |
| 183 | + then: | |
| 184 | + properties: | |
| 185 | + groups: | |
| 186 | + enum: [pnand] | |
| 187 | + - if: | |
| 188 | + properties: | |
| 189 | + function: | |
| 190 | + const: pcie_reset | |
| 191 | + then: | |
| 192 | + properties: | |
| 193 | + groups: | |
| 194 | + enum: [pcie_reset0, pcie_reset1, pcie_reset2] | |
| 195 | + - if: | |
| 196 | + properties: | |
| 197 | + function: | |
| 198 | + const: pwm | |
| 199 | + then: | |
| 200 | + properties: | |
| 201 | + groups: | |
| 202 | + enum: [gpio0, gpio1, gpio2, gpio3, gpio4, gpio5, gpio6, | |
| 203 | + gpio7, gpio8, gpio9, gpio10, gpio11, gpio12, gpio13, | |
| 204 | + gpio14, gpio15, gpio16, gpio17, gpio18, gpio19, | |
| 205 | + gpio20, gpio21, gpio22, gpio23, gpio24, gpio25, | |
| 206 | + gpio26, gpio27, gpio28, gpio29, gpio30, gpio31, | |
| 207 | + gpio36, gpio37, gpio38, gpio39, gpio40, gpio41, | |
| 208 | + gpio42, gpio43, gpio44, gpio45, gpio46, gpio47] | |
| 209 | + - if: | |
| 210 | + properties: | |
| 211 | + function: | |
| 212 | + const: phy1_led0 | |
| 213 | + then: | |
| 214 | + properties: | |
| 215 | + groups: | |
| 216 | + enum: [gpio33, gpio34, gpio35, gpio42] | |
| 217 | + - if: | |
| 218 | + properties: | |
| 219 | + function: | |
| 220 | + const: phy2_led0 | |
| 221 | + then: | |
| 222 | + properties: | |
| 223 | + groups: | |
| 224 | + enum: [gpio33, gpio34, gpio35, gpio42] | |
| 225 | + - if: | |
| 226 | + properties: | |
| 227 | + function: | |
| 228 | + const: phy3_led0 | |
| 229 | + then: | |
| 230 | + properties: | |
| 231 | + groups: | |
| 232 | + enum: [gpio33, gpio34, gpio35, gpio42] | |
| 233 | + - if: | |
| 234 | + properties: | |
| 235 | + function: | |
| 236 | + const: phy4_led0 | |
| 237 | + then: | |
| 238 | + properties: | |
| 239 | + groups: | |
| 240 | + enum: [gpio33, gpio34, gpio35, gpio42] | |
| 241 | + - if: | |
| 242 | + properties: | |
| 243 | + function: | |
| 244 | + const: phy1_led1 | |
| 245 | + then: | |
| 246 | + properties: | |
| 247 | + groups: | |
| 248 | + enum: [gpio43, gpio44, gpio45, gpio46] | |
| 249 | + - if: | |
| 250 | + properties: | |
| 251 | + function: | |
| 252 | + const: phy2_led1 | |
| 253 | + then: | |
| 254 | + properties: | |
| 255 | + groups: | |
| 256 | + enum: [gpio43, gpio44, gpio45, gpio46] | |
| 257 | + - if: | |
| 258 | + properties: | |
| 259 | + function: | |
| 260 | + const: phy3_led1 | |
| 261 | + then: | |
| 262 | + properties: | |
| 263 | + groups: | |
| 264 | + enum: [gpio43, gpio44, gpio45, gpio46] | |
| 265 | + - if: | |
| 266 | + properties: | |
| 267 | + function: | |
| 268 | + const: phy4_led1 | |
| 269 | + then: | |
| 270 | + properties: | |
| 271 | + groups: | |
| 272 | + enum: [gpio43, gpio44, gpio45, gpio46] | |
| 273 | + | |
| 274 | + additionalProperties: false | |
| 275 | + | |
| 276 | + '^conf(-|$)': | |
| 277 | + type: object | |
| 278 | + | |
| 279 | + description: | |
| 280 | + pinconf configuration nodes. | |
| 281 | + | |
| 282 | + $ref: /schemas/pinctrl/pincfg-node.yaml | |
| 283 | + | |
| 284 | + properties: | |
| 285 | + pins: | |
| 286 | + description: | |
| 287 | + An array of strings. Each string contains the name of a pin. | |
| 288 | + items: | |
| 289 | + enum: [uart1_txd, uart1_rxd, i2c_scl, i2c_sda, spi_cs0, spi_clk, | |
| 290 | + spi_mosi, spi_miso, gpio0, gpio1, gpio2, gpio3, gpio4, | |
| 291 | + gpio5, gpio6, gpio7, gpio8, gpio9, gpio10, gpio11, gpio12, | |
| 292 | + gpio13, gpio14, gpio15, gpio16, gpio17, gpio18, gpio19, | |
| 293 | + gpio20, gpio21, gpio22, gpio23, gpio24, gpio25, gpio26, | |
| 294 | + gpio27, gpio28, gpio29, gpio30, gpio31, gpio32, gpio33, | |
| 295 | + gpio34, gpio35, gpio36, gpio37, gpio38, gpio39, gpio40, | |
| 296 | + gpio41, gpio42, gpio43, gpio44, gpio45, gpio46, | |
| 297 | + pcie_reset0, pcie_reset1, pcie_reset2] | |
| 298 | + minItems: 1 | |
| 299 | + maxItems: 58 | |
| 300 | + | |
| 301 | + bias-disable: true | |
| 302 | + | |
| 303 | + bias-pull-up: true | |
| 304 | + | |
| 305 | + bias-pull-down: true | |
| 306 | + | |
| 307 | + input-enable: true | |
| 308 | + | |
| 309 | + output-enable: true | |
| 310 | + | |
| 311 | + output-low: true | |
| 312 | + | |
| 313 | + output-high: true | |
| 314 | + | |
| 315 | + drive-open-drain: true | |
| 316 | + | |
| 317 | + drive-strength: | |
| 318 | + description: | |
| 319 | + Selects the drive strength for MIO pins, in mA. | |
| 320 | + enum: [2, 4, 6, 8] | |
| 321 | + | |
| 322 | + required: | |
| 323 | + - pins | |
| 324 | + | |
| 325 | + additionalProperties: false | |
| 326 | + | |
| 327 | + additionalProperties: false | |
| 328 | + | |
| 329 | +additionalProperties: false | |
| 330 | + | |
| 331 | +examples: | |
| 332 | + - | | |
| 333 | + #include <dt-bindings/interrupt-controller/arm-gic.h> | |
| 334 | + | |
| 335 | + pinctrl { | |
| 336 | + compatible = "airoha,en7581-pinctrl"; | |
| 337 | + | |
| 338 | + interrupt-parent = <&gic>; | |
| 339 | + interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>; | |
| 340 | + | |
| 341 | + gpio-controller; | |
| 342 | + #gpio-cells = <2>; | |
| 343 | + | |
| 344 | + interrupt-controller; | |
| 345 | + #interrupt-cells = <2>; | |
| 346 | + | |
| 347 | + pcie1-rst-pins { | |
| 348 | + conf { | |
| 349 | + pins = "pcie_reset1"; | |
| 350 | + drive-open-drain = <1>; | |
| 351 | + }; | |
| 352 | + }; | |
| 353 | + | |
| 354 | + pwm-pins { | |
| 355 | + mux { | |
| 356 | + function = "pwm"; | |
| 357 | + groups = "gpio18"; | |
| 358 | + }; | |
| 359 | + }; | |
| 360 | + | |
| 361 | + spi-pins { | |
| 362 | + mux { | |
| 363 | + function = "spi"; | |
| 364 | + groups = "spi_quad", "spi_cs1"; | |
| 365 | + }; | |
| 366 | + }; | |
| 367 | + | |
| 368 | + uart2-pins { | |
| 369 | + mux { | |
| 370 | + function = "uart"; | |
| 371 | + groups = "uart2", "uart2_cts_rts"; | |
| 372 | + }; | |
| 373 | + }; | |
| 374 | + | |
| 375 | + uar5-pins { | |
| 376 | + mux { | |
| 377 | + function = "uart"; | |
| 378 | + groups = "uart5"; | |
| 379 | + }; | |
| 380 | + }; | |
| 381 | + | |
| 382 | + mmc-pins { | |
| 383 | + mux { | |
| 384 | + function = "emmc"; | |
| 385 | + groups = "emmc"; | |
| 386 | + }; | |
| 387 | + }; | |
| 388 | + | |
| 389 | + mdio-pins { | |
| 390 | + mux { | |
| 391 | + function = "mdio"; | |
| 392 | + groups = "mdio"; | |
| 393 | + }; | |
| 394 | + | |
| 395 | + conf { | |
| 396 | + pins = "gpio2"; | |
| 397 | + output-enable; | |
| 398 | + }; | |
| 399 | + }; | |
| 400 | + }; | |
| @@ -46,7 +46,7 @@ patternProperties: · 45 unmodified lines | ||
| 46 | 46 | - const: gpio |
| 47 | 47 | |
| 48 | 48 | gpio-line-names: |
| 49 | − minItems: 86 # AXG | |
| 49 | + minItems: 83 # Meson8b | |
| 50 | 50 | maxItems: 120 # Meson8 |
| 51 | 51 | |
| 52 | 52 | unevaluatedProperties: |
| @@ -0,0 +1,127 @@ | ||
| 1 | +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause | |
| 2 | +%YAML 1.2 | |
| 3 | +--- | |
| 4 | +$id: http://devicetree.org/schemas/pinctrl/canaan,k230-pinctrl.yaml# | |
| 5 | +$schema: http://devicetree.org/meta-schemas/core.yaml# | |
| 6 | + | |
| 7 | +title: Canaan Kendryte K230 Pin Controller | |
| 8 | + | |
| 9 | +maintainers: | |
| 10 | + - Ze Huang <18771902331@163.com> | |
| 11 | + | |
| 12 | +description: | |
| 13 | + The Canaan Kendryte K230 platform includes 64 IO pins, each capable of | |
| 14 | + multiplexing up to 5 different functions. Pin function configuration is | |
| 15 | + performed on a per-pin basis. | |
| 16 | + | |
| 17 | +properties: | |
| 18 | + compatible: | |
| 19 | + const: canaan,k230-pinctrl | |
| 20 | + | |
| 21 | + reg: | |
| 22 | + maxItems: 1 | |
| 23 | + | |
| 24 | +patternProperties: | |
| 25 | + '-pins$': | |
| 26 | + type: object | |
| 27 | + additionalProperties: false | |
| 28 | + description: | |
| 29 | + A pinctrl node should contain at least one subnode representing the | |
| 30 | + pinctrl groups available on the machine. | |
| 31 | + | |
| 32 | + patternProperties: | |
| 33 | + '-cfg$': | |
| 34 | + type: object | |
| 35 | + allOf: | |
| 36 | + - $ref: /schemas/pinctrl/pincfg-node.yaml | |
| 37 | + - $ref: /schemas/pinctrl/pinmux-node.yaml | |
| 38 | + additionalProperties: false | |
| 39 | + description: | |
| 40 | + Each subnode will list the pins it needs, and how they should | |
| 41 | + be configured, with regard to muxer configuration, bias, input | |
| 42 | + enable/disable, input schmitt trigger, slew-rate enable/disable, | |
| 43 | + slew-rate, drive strength. | |
| 44 | + | |
| 45 | + properties: | |
| 46 | + pinmux: | |
| 47 | + description: | |
| 48 | + The list of GPIOs and their mux settings that properties in | |
| 49 | + the node apply to. This should be set with the macro | |
| 50 | + 'K230_PINMUX(pin, mode)' | |
| 51 | + | |
| 52 | + bias-disable: true | |
| 53 | + | |
| 54 | + bias-pull-up: true | |
| 55 | + | |
| 56 | + bias-pull-down: true | |
| 57 | + | |
| 58 | + drive-strength: | |
| 59 | + minimum: 0 | |
| 60 | + maximum: 15 | |
| 61 | + | |
| 62 | + input-enable: true | |
| 63 | + | |
| 64 | + output-enable: true | |
| 65 | + | |
| 66 | + input-schmitt-enable: true | |
| 67 | + | |
| 68 | + slew-rate: | |
| 69 | + description: | | |
| 70 | + slew rate control enable | |
| 71 | + 0: disable | |
| 72 | + 1: enable | |
| 73 | + | |
| 74 | + enum: [0, 1] | |
| 75 | + | |
| 76 | + power-source: | |
| 77 | + description: | | |
| 78 | + Specifies the power source voltage for the IO bank that the | |
| 79 | + pin belongs to. Each bank of IO pins operate at a specific, | |
| 80 | + fixed voltage levels. Incorrect voltage configuration can | |
| 81 | + damage the chip. The defined constants represent the | |
| 82 | + possible voltage configurations: | |
| 83 | + | |
| 84 | + - K230_MSC_3V3 (value 0): 3.3V power supply | |
| 85 | + - K230_MSC_1V8 (value 1): 1.8V power supply | |
| 86 | + | |
| 87 | + The following banks have the corresponding voltage | |
| 88 | + configurations: | |
| 89 | + | |
| 90 | + - bank IO0 to IO1: Fixed at 1.8V | |
| 91 | + - bank IO2 to IO13: Fixed at 1.8V | |
| 92 | + - bank IO14 to IO25: Fixed at 1.8V | |
| 93 | + - bank IO26 to IO37: Fixed at 1.8V | |
| 94 | + - bank IO38 to IO49: Fixed at 1.8V | |
| 95 | + - bank IO50 to IO61: Fixed at 3.3V | |
| 96 | + - bank IO62 to IO63: Fixed at 1.8V | |
| 97 | + | |
| 98 | + enum: [0, 1] | |
| 99 | + | |
| 100 | + required: | |
| 101 | + - pinmux | |
| 102 | + | |
| 103 | +required: | |
| 104 | + - compatible | |
| 105 | + - reg | |
| 106 | + | |
| 107 | +additionalProperties: false | |
| 108 | + | |
| 109 | +examples: | |
| 110 | + - | | |
| 111 | + pinctrl@91105000 { | |
| 112 | + compatible = "canaan,k230-pinctrl"; | |
| 113 | + reg = <0x91105000 0x100>; | |
| 114 | + | |
| 115 | + uart2-pins { | |
| 116 | + uart2-pins-cfg { | |
| 117 | + pinmux = <0x503>, /* uart2 txd */ | |
| 118 | + <0x603>; /* uart2 rxd */ | |
| 119 | + slew-rate = <0>; | |
| 120 | + drive-strength = <4>; | |
| 121 | + power-source = <1>; | |
| 122 | + input-enable; | |
| 123 | + output-enable; | |
| 124 | + bias-disable; | |
| 125 | + }; | |
| 126 | + }; | |
| 127 | + }; | |
| @@ -1,33 +0,0 @@ | ||
| 1 | −* Freescale IMX35 IOMUX Controller | |
| 2 | − | |
| 3 | −Please refer to fsl,imx-pinctrl.txt in this directory for common binding part | |
| 4 | −and usage. | |
| 5 | − | |
| 6 | −Required properties: | |
| 7 | −- compatible: "fsl,imx35-iomuxc" | |
| 8 | −- fsl,pins: two integers array, represents a group of pins mux and config | |
| 9 | − setting. The format is fsl,pins = <PIN_FUNC_ID CONFIG>, PIN_FUNC_ID is a | |
| 10 | − pin working on a specific function, CONFIG is the pad setting value like | |
| 11 | − pull-up for this pin. Please refer to imx35 datasheet for the valid pad | |
| 12 | − config settings. | |
| 13 | − | |
| 14 | −CONFIG bits definition: | |
| 15 | −PAD_CTL_DRIVE_VOLAGAGE_18 (1 << 13) | |
| 16 | −PAD_CTL_DRIVE_VOLAGAGE_33 (0 << 13) | |
| 17 | −PAD_CTL_HYS (1 << 8) | |
| 18 | −PAD_CTL_PKE (1 << 7) | |
| 19 | −PAD_CTL_PUE (1 << 6) | |
| 20 | −PAD_CTL_PUS_100K_DOWN (0 << 4) | |
| 21 | −PAD_CTL_PUS_47K_UP (1 << 4) | |
| 22 | −PAD_CTL_PUS_100K_UP (2 << 4) | |
| 23 | −PAD_CTL_PUS_22K_UP (3 << 4) | |
| 24 | −PAD_CTL_ODE_CMOS (0 << 3) | |
| 25 | −PAD_CTL_ODE_OPENDRAIN (1 << 3) | |
| 26 | −PAD_CTL_DSE_NOMINAL (0 << 1) | |
| 27 | −PAD_CTL_DSE_HIGH (1 << 1) | |
| 28 | −PAD_CTL_DSE_MAX (2 << 1) | |
| 29 | −PAD_CTL_SRE_FAST (1 << 0) | |
| 30 | −PAD_CTL_SRE_SLOW (0 << 0) | |
| 31 | − | |
| 32 | −Refer to imx35-pinfunc.h in device tree source folder for all available | |
| 33 | −imx35 PIN_FUNC_ID. | |
| @@ -1,10 +1,10 @@ | ||
| 1 | 1 | # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause |
| 2 | 2 | %YAML 1.2 |
| 3 | 3 | --- |
| 4 | −$id: http://devicetree.org/schemas/pinctrl/fsl,imx6ul-pinctrl.yaml# | |
| 4 | +$id: http://devicetree.org/schemas/pinctrl/fsl,imx35-pinctrl.yaml# | |
| 5 | 5 | $schema: http://devicetree.org/meta-schemas/core.yaml# |
| 6 | 6 | |
| 7 | −title: Freescale IMX6UL IOMUX Controller | |
| 7 | +title: Freescale IMX35/IMX5x/IMX6 IOMUX Controller | |
| 8 | 8 | |
| 9 | 9 | maintainers: |
| 10 | 10 | - Dong Aisheng <aisheng.dong@nxp.com> |
| @@ -18,9 +18,21 @@ allOf: · 7 unmodified lines | ||
| 18 | 18 | |
| 19 | 19 | properties: |
| 20 | 20 | compatible: |
| 21 | − enum: | |
| 22 | − - fsl,imx6ul-iomuxc | |
| 23 | − - fsl,imx6ull-iomuxc-snvs | |
| 21 | + oneOf: | |
| 22 | + - enum: | |
| 23 | + - fsl,imx35-iomuxc | |
| 24 | + - fsl,imx51-iomuxc | |
| 25 | + - fsl,imx53-iomuxc | |
| 26 | + - fsl,imx6dl-iomuxc | |
| 27 | + - fsl,imx6q-iomuxc | |
| 28 | + - fsl,imx6sl-iomuxc | |
| 29 | + - fsl,imx6sll-iomuxc | |
| 30 | + - fsl,imx6sx-iomuxc | |
| 31 | + - fsl,imx6ul-iomuxc | |
| 32 | + - fsl,imx6ull-iomuxc-snvs | |
| 33 | + - items: | |
| 34 | + - const: fsl,imx50-iomuxc | |
| 35 | + - const: fsl,imx53-iomuxc | |
| 24 | 36 | |
| 25 | 37 | reg: |
| 26 | 38 | maxItems: 1 |
| @@ -39,9 +51,9 @@ patternProperties: · 12 unmodified lines | ||
| 39 | 51 | each entry consists of 6 integers and represents the mux and config |
| 40 | 52 | setting for one pin. The first 5 integers <mux_reg conf_reg input_reg |
| 41 | 53 | mux_val input_val> are specified using a PIN_FUNC_ID macro, which can |
| 42 | − be found in <arch/arm/boot/dts/imx6ul-pinfunc.h>. The last integer | |
| 54 | + be found in <arch/arm/boot/dts/nxp/imx/imx*-pinfunc.h>. The last integer | |
| 43 | 55 | CONFIG is the pad setting value like pull-up on this pin. Please |
| 44 | − refer to i.MX6UL Reference Manual for detailed CONFIG settings. | |
| 56 | + refer to matching i.MX Reference Manual for detailed CONFIG settings. | |
| 45 | 57 | $ref: /schemas/types.yaml#/definitions/uint32-matrix |
| 46 | 58 | items: |
| 47 | 59 | items: |
| @@ -56,7 +68,41 @@ patternProperties: · 8 unmodified lines | ||
| 56 | 68 | - description: | |
| 57 | 69 | "input_val" indicates the select input value to be applied. |
| 58 | 70 | - description: | |
| 59 | − "pad_setting" indicates the pad configuration value to be applied: | |
| 71 | + "pad_setting" indicates the pad configuration value to be applied. | |
| 72 | + Common i.MX35 | |
| 73 | + PAD_CTL_DRIVE_VOLAGAGE_18 (1 << 13) | |
| 74 | + PAD_CTL_DRIVE_VOLAGAGE_33 (0 << 13) | |
| 75 | + PAD_CTL_HYS (1 << 8) | |
| 76 | + PAD_CTL_PKE (1 << 7) | |
| 77 | + PAD_CTL_PUE (1 << 6) | |
| 78 | + PAD_CTL_PUS_100K_DOWN (0 << 4) | |
| 79 | + PAD_CTL_PUS_47K_UP (1 << 4) | |
| 80 | + PAD_CTL_PUS_100K_UP (2 << 4) | |
| 81 | + PAD_CTL_PUS_22K_UP (3 << 4) | |
| 82 | + PAD_CTL_ODE_CMOS (0 << 3) | |
| 83 | + PAD_CTL_ODE_OPENDRAIN (1 << 3) | |
| 84 | + PAD_CTL_DSE_NOMINAL (0 << 1) | |
| 85 | + PAD_CTL_DSE_HIGH (1 << 1) | |
| 86 | + PAD_CTL_DSE_MAX (2 << 1) | |
| 87 | + PAD_CTL_SRE_FAST (1 << 0) | |
| 88 | + PAD_CTL_SRE_SLOW (0 << 0) | |
| 89 | + Common i.MX50/i.MX51/i.MX53 bits | |
| 90 | + PAD_CTL_HVE (1 << 13) | |
| 91 | + PAD_CTL_HYS (1 << 8) | |
| 92 | + PAD_CTL_PKE (1 << 7) | |
| 93 | + PAD_CTL_PUE (1 << 6) | |
| 94 | + PAD_CTL_PUS_100K_DOWN (0 << 4) | |
| 95 | + PAD_CTL_PUS_47K_UP (1 << 4) | |
| 96 | + PAD_CTL_PUS_100K_UP (2 << 4) | |
| 97 | + PAD_CTL_PUS_22K_UP (3 << 4) | |
| 98 | + PAD_CTL_ODE (1 << 3) | |
| 99 | + PAD_CTL_DSE_LOW (0 << 1) | |
| 100 | + PAD_CTL_DSE_MED (1 << 1) | |
| 101 | + PAD_CTL_DSE_HIGH (2 << 1) | |
| 102 | + PAD_CTL_DSE_MAX (3 << 1) | |
| 103 | + PAD_CTL_SRE_FAST (1 << 0) | |
| 104 | + PAD_CTL_SRE_SLOW (0 << 0) | |
| 105 | + Common i.MX6 bits | |
| 60 | 106 | PAD_CTL_HYS (1 << 16) |
| 61 | 107 | PAD_CTL_PUS_100K_DOWN (0 << 14) |
| 62 | 108 | PAD_CTL_PUS_47K_UP (1 << 14) |
| @@ -69,6 +115,11 @@ patternProperties: · 6 unmodified lines | ||
| 69 | 115 | PAD_CTL_SPEED_MED (1 << 6) |
| 70 | 116 | PAD_CTL_SPEED_HIGH (3 << 6) |
| 71 | 117 | PAD_CTL_DSE_DISABLE (0 << 3) |
| 118 | + PAD_CTL_SRE_FAST (1 << 0) | |
| 119 | + PAD_CTL_SRE_SLOW (0 << 0) | |
| 120 | + i.MX6SL/MX6SLL specific bits | |
| 121 | + PAD_CTL_LVE (1 << 22) (MX6SL/SLL only) | |
| 122 | + i.MX6SLL/i.MX6SX/i.MX6UL/i.MX6ULL specific bits | |
| 72 | 123 | PAD_CTL_DSE_260ohm (1 << 3) |
| 73 | 124 | PAD_CTL_DSE_130ohm (2 << 3) |
| 74 | 125 | PAD_CTL_DSE_87ohm (3 << 3) |
| @@ -76,8 +127,14 @@ patternProperties: · 1 unmodified line | ||
| 76 | 127 | PAD_CTL_DSE_52ohm (5 << 3) |
| 77 | 128 | PAD_CTL_DSE_43ohm (6 << 3) |
| 78 | 129 | PAD_CTL_DSE_37ohm (7 << 3) |
| 79 | − PAD_CTL_SRE_FAST (1 << 0) | |
| 80 | − PAD_CTL_SRE_SLOW (0 << 0) | |
| 130 | + i.MX6DL/i.MX6Q/i.MX6SL specific bits | |
| 131 | + PAD_CTL_DSE_240ohm (1 << 3) | |
| 132 | + PAD_CTL_DSE_120ohm (2 << 3) | |
| 133 | + PAD_CTL_DSE_80ohm (3 << 3) | |
| 134 | + PAD_CTL_DSE_60ohm (4 << 3) | |
| 135 | + PAD_CTL_DSE_48ohm (5 << 3) | |
| 136 | + PAD_CTL_DSE_40ohm (6 << 3) | |
| 137 | + PAD_CTL_DSE_34ohm (7 << 3) | |
| 81 | 138 | |
| 82 | 139 | required: |
| 83 | 140 | - fsl,pins |
| @@ -114,3 +171,14 @@ examples: · 30 unmodified lines | ||
| 114 | 171 | >; |
| 115 | 172 | }; |
| 116 | 173 | }; |
| 174 | + - | | |
| 175 | + iomuxc_mx6q: pinctrl@20e0000 { | |
| 176 | + compatible = "fsl,imx6q-iomuxc"; | |
| 177 | + reg = <0x20e0000 0x4000>; | |
| 178 | + | |
| 179 | + pinctrl_uart4: uart4grp { | |
| 180 | + fsl,pins = | |
| 181 | + <0x288 0x658 0x000 0x3 0x0 0x140>, | |
| 182 | + <0x28c 0x65c 0x938 0x3 0x3 0x140>; | |
| 183 | + }; | |
| 184 | + }; | |
| @@ -1,32 +0,0 @@ | ||
| 1 | −* Freescale IMX50 IOMUX Controller | |
| 2 | − | |
| 3 | −Please refer to fsl,imx-pinctrl.txt in this directory for common binding part | |
| 4 | −and usage. | |
| 5 | − | |
| 6 | −Required properties: | |
| 7 | −- compatible: "fsl,imx50-iomuxc" | |
| 8 | −- fsl,pins: two integers array, represents a group of pins mux and config | |
| 9 | − setting. The format is fsl,pins = <PIN_FUNC_ID CONFIG>, PIN_FUNC_ID is a | |
| 10 | − pin working on a specific function, CONFIG is the pad setting value like | |
| 11 | − pull-up for this pin. Please refer to imx50 datasheet for the valid pad | |
| 12 | − config settings. | |
| 13 | − | |
| 14 | −CONFIG bits definition: | |
| 15 | −PAD_CTL_HVE (1 << 13) | |
| 16 | −PAD_CTL_HYS (1 << 8) | |
| 17 | −PAD_CTL_PKE (1 << 7) | |
| 18 | −PAD_CTL_PUE (1 << 6) | |
| 19 | −PAD_CTL_PUS_100K_DOWN (0 << 4) | |
| 20 | −PAD_CTL_PUS_47K_UP (1 << 4) | |
| 21 | −PAD_CTL_PUS_100K_UP (2 << 4) | |
| 22 | −PAD_CTL_PUS_22K_UP (3 << 4) | |
| 23 | −PAD_CTL_ODE (1 << 3) | |
| 24 | −PAD_CTL_DSE_LOW (0 << 1) | |
| 25 | −PAD_CTL_DSE_MED (1 << 1) | |
| 26 | −PAD_CTL_DSE_HIGH (2 << 1) | |
| 27 | −PAD_CTL_DSE_MAX (3 << 1) | |
| 28 | −PAD_CTL_SRE_FAST (1 << 0) | |
| 29 | −PAD_CTL_SRE_SLOW (0 << 0) | |
| 30 | − | |
| 31 | −Refer to imx50-pinfunc.h in device tree source folder for all available | |
| 32 | −imx50 PIN_FUNC_ID. | |
| @@ -1,32 +0,0 @@ | ||
| 1 | −* Freescale IMX51 IOMUX Controller | |
| 2 | − | |
| 3 | −Please refer to fsl,imx-pinctrl.txt in this directory for common binding part | |
| 4 | −and usage. | |
| 5 | − | |
| 6 | −Required properties: | |
| 7 | −- compatible: "fsl,imx51-iomuxc" | |
| 8 | −- fsl,pins: two integers array, represents a group of pins mux and config | |
| 9 | − setting. The format is fsl,pins = <PIN_FUNC_ID CONFIG>, PIN_FUNC_ID is a | |
| 10 | − pin working on a specific function, CONFIG is the pad setting value like | |
| 11 | − pull-up for this pin. Please refer to imx51 datasheet for the valid pad | |
| 12 | − config settings. | |
| 13 | − | |
| 14 | −CONFIG bits definition: | |
| 15 | −PAD_CTL_HVE (1 << 13) | |
| 16 | −PAD_CTL_HYS (1 << 8) | |
| 17 | −PAD_CTL_PKE (1 << 7) | |
| 18 | −PAD_CTL_PUE (1 << 6) | |
| 19 | −PAD_CTL_PUS_100K_DOWN (0 << 4) | |
| 20 | −PAD_CTL_PUS_47K_UP (1 << 4) | |
| 21 | −PAD_CTL_PUS_100K_UP (2 << 4) | |
| 22 | −PAD_CTL_PUS_22K_UP (3 << 4) | |
| 23 | −PAD_CTL_ODE (1 << 3) | |
| 24 | −PAD_CTL_DSE_LOW (0 << 1) | |
| 25 | −PAD_CTL_DSE_MED (1 << 1) | |
| 26 | −PAD_CTL_DSE_HIGH (2 << 1) | |
| 27 | −PAD_CTL_DSE_MAX (3 << 1) | |
| 28 | −PAD_CTL_SRE_FAST (1 << 0) | |
| 29 | −PAD_CTL_SRE_SLOW (0 << 0) | |
| 30 | − | |
| 31 | −Refer to imx51-pinfunc.h in device tree source folder for all available | |
| 32 | −imx51 PIN_FUNC_ID. | |
| @@ -1,32 +0,0 @@ | ||
| 1 | −* Freescale IMX53 IOMUX Controller | |
| 2 | − | |
| 3 | −Please refer to fsl,imx-pinctrl.txt in this directory for common binding part | |
| 4 | −and usage. | |
| 5 | − | |
| 6 | −Required properties: | |
| 7 | −- compatible: "fsl,imx53-iomuxc" | |
| 8 | −- fsl,pins: two integers array, represents a group of pins mux and config | |
| 9 | − setting. The format is fsl,pins = <PIN_FUNC_ID CONFIG>, PIN_FUNC_ID is a | |
| 10 | − pin working on a specific function, CONFIG is the pad setting value like | |
| 11 | − pull-up for this pin. Please refer to imx53 datasheet for the valid pad | |
| 12 | − config settings. | |
| 13 | − | |
| 14 | −CONFIG bits definition: | |
| 15 | −PAD_CTL_HVE (1 << 13) | |
| 16 | −PAD_CTL_HYS (1 << 8) | |
| 17 | −PAD_CTL_PKE (1 << 7) | |
| 18 | −PAD_CTL_PUE (1 << 6) | |
| 19 | −PAD_CTL_PUS_100K_DOWN (0 << 4) | |
| 20 | −PAD_CTL_PUS_47K_UP (1 << 4) | |
| 21 | −PAD_CTL_PUS_100K_UP (2 << 4) | |
| 22 | −PAD_CTL_PUS_22K_UP (3 << 4) | |
| 23 | −PAD_CTL_ODE (1 << 3) | |
| 24 | −PAD_CTL_DSE_LOW (0 << 1) | |
| 25 | −PAD_CTL_DSE_MED (1 << 1) | |
| 26 | −PAD_CTL_DSE_HIGH (2 << 1) | |
| 27 | −PAD_CTL_DSE_MAX (3 << 1) | |
| 28 | −PAD_CTL_SRE_FAST (1 << 0) | |
| 29 | −PAD_CTL_SRE_SLOW (0 << 0) | |
| 30 | − | |
| 31 | −Refer to imx53-pinfunc.h in device tree source folder for all available | |
| 32 | −imx53 PIN_FUNC_ID. | |
| @@ -1,38 +0,0 @@ | ||
| 1 | −* Freescale IMX6 DualLite/Solo IOMUX Controller | |
| 2 | − | |
| 3 | −Please refer to fsl,imx-pinctrl.txt in this directory for common binding part | |
| 4 | −and usage. | |
| 5 | − | |
| 6 | −Required properties: | |
| 7 | −- compatible: "fsl,imx6dl-iomuxc" | |
| 8 | −- fsl,pins: two integers array, represents a group of pins mux and config | |
| 9 | − setting. The format is fsl,pins = <PIN_FUNC_ID CONFIG>, PIN_FUNC_ID is a | |
| 10 | − pin working on a specific function, CONFIG is the pad setting value like | |
| 11 | − pull-up for this pin. Please refer to imx6dl datasheet for the valid pad | |
| 12 | − config settings. | |
| 13 | − | |
| 14 | −CONFIG bits definition: | |
| 15 | −PAD_CTL_HYS (1 << 16) | |
| 16 | −PAD_CTL_PUS_100K_DOWN (0 << 14) | |
| 17 | −PAD_CTL_PUS_47K_UP (1 << 14) | |
| 18 | −PAD_CTL_PUS_100K_UP (2 << 14) | |
| 19 | −PAD_CTL_PUS_22K_UP (3 << 14) | |
| 20 | −PAD_CTL_PUE (1 << 13) | |
| 21 | −PAD_CTL_PKE (1 << 12) | |
| 22 | −PAD_CTL_ODE (1 << 11) | |
| 23 | −PAD_CTL_SPEED_LOW (1 << 6) | |
| 24 | −PAD_CTL_SPEED_MED (2 << 6) | |
| 25 | −PAD_CTL_SPEED_HIGH (3 << 6) | |
| 26 | −PAD_CTL_DSE_DISABLE (0 << 3) | |
| 27 | −PAD_CTL_DSE_240ohm (1 << 3) | |
| 28 | −PAD_CTL_DSE_120ohm (2 << 3) | |
| 29 | −PAD_CTL_DSE_80ohm (3 << 3) | |
| 30 | −PAD_CTL_DSE_60ohm (4 << 3) | |
| 31 | −PAD_CTL_DSE_48ohm (5 << 3) | |
| 32 | −PAD_CTL_DSE_40ohm (6 << 3) | |
| 33 | −PAD_CTL_DSE_34ohm (7 << 3) | |
| 34 | −PAD_CTL_SRE_FAST (1 << 0) | |
| 35 | −PAD_CTL_SRE_SLOW (0 << 0) | |
| 36 | − | |
| 37 | −Refer to imx6dl-pinfunc.h in device tree source folder for all available | |
| 38 | −imx6dl PIN_FUNC_ID. | |
| @@ -1,38 +0,0 @@ | ||
| 1 | −* Freescale IMX6Q IOMUX Controller | |
| 2 | − | |
| 3 | −Please refer to fsl,imx-pinctrl.txt in this directory for common binding part | |
| 4 | −and usage. | |
| 5 | − | |
| 6 | −Required properties: | |
| 7 | −- compatible: "fsl,imx6q-iomuxc" | |
| 8 | −- fsl,pins: two integers array, represents a group of pins mux and config | |
| 9 | − setting. The format is fsl,pins = <PIN_FUNC_ID CONFIG>, PIN_FUNC_ID is a | |
| 10 | − pin working on a specific function, CONFIG is the pad setting value like | |
| 11 | − pull-up for this pin. Please refer to imx6q datasheet for the valid pad | |
| 12 | − config settings. | |
| 13 | − | |
| 14 | −CONFIG bits definition: | |
| 15 | −PAD_CTL_HYS (1 << 16) | |
| 16 | −PAD_CTL_PUS_100K_DOWN (0 << 14) | |
| 17 | −PAD_CTL_PUS_47K_UP (1 << 14) | |
| 18 | −PAD_CTL_PUS_100K_UP (2 << 14) | |
| 19 | −PAD_CTL_PUS_22K_UP (3 << 14) | |
| 20 | −PAD_CTL_PUE (1 << 13) | |
| 21 | −PAD_CTL_PKE (1 << 12) | |
| 22 | −PAD_CTL_ODE (1 << 11) | |
| 23 | −PAD_CTL_SPEED_LOW (1 << 6) | |
| 24 | −PAD_CTL_SPEED_MED (2 << 6) | |
| 25 | −PAD_CTL_SPEED_HIGH (3 << 6) | |
| 26 | −PAD_CTL_DSE_DISABLE (0 << 3) | |
| 27 | −PAD_CTL_DSE_240ohm (1 << 3) | |
| 28 | −PAD_CTL_DSE_120ohm (2 << 3) | |
| 29 | −PAD_CTL_DSE_80ohm (3 << 3) | |
| 30 | −PAD_CTL_DSE_60ohm (4 << 3) | |
| 31 | −PAD_CTL_DSE_48ohm (5 << 3) | |
| 32 | −PAD_CTL_DSE_40ohm (6 << 3) | |
| 33 | −PAD_CTL_DSE_34ohm (7 << 3) | |
| 34 | −PAD_CTL_SRE_FAST (1 << 0) | |
| 35 | −PAD_CTL_SRE_SLOW (0 << 0) | |
| 36 | − | |
| 37 | −Refer to imx6q-pinfunc.h in device tree source folder for all available | |
| 38 | −imx6q PIN_FUNC_ID. | |
| @@ -1,39 +0,0 @@ | ||
| 1 | −* Freescale IMX6 SoloLite IOMUX Controller | |
| 2 | − | |
| 3 | −Please refer to fsl,imx-pinctrl.txt in this directory for common binding part | |
| 4 | −and usage. | |
| 5 | − | |
| 6 | −Required properties: | |
| 7 | −- compatible: "fsl,imx6sl-iomuxc" | |
| 8 | −- fsl,pins: two integers array, represents a group of pins mux and config | |
| 9 | − setting. The format is fsl,pins = <PIN_FUNC_ID CONFIG>, PIN_FUNC_ID is a | |
| 10 | − pin working on a specific function, CONFIG is the pad setting value like | |
| 11 | − pull-up for this pin. Please refer to imx6sl datasheet for the valid pad | |
| 12 | − config settings. | |
| 13 | − | |
| 14 | −CONFIG bits definition: | |
| 15 | −PAD_CTL_LVE (1 << 22) | |
| 16 | −PAD_CTL_HYS (1 << 16) | |
| 17 | −PAD_CTL_PUS_100K_DOWN (0 << 14) | |
| 18 | −PAD_CTL_PUS_47K_UP (1 << 14) | |
| 19 | −PAD_CTL_PUS_100K_UP (2 << 14) | |
| 20 | −PAD_CTL_PUS_22K_UP (3 << 14) | |
| 21 | −PAD_CTL_PUE (1 << 13) | |
| 22 | −PAD_CTL_PKE (1 << 12) | |
| 23 | −PAD_CTL_ODE (1 << 11) | |
| 24 | −PAD_CTL_SPEED_LOW (1 << 6) | |
| 25 | −PAD_CTL_SPEED_MED (2 << 6) | |
| 26 | −PAD_CTL_SPEED_HIGH (3 << 6) | |
| 27 | −PAD_CTL_DSE_DISABLE (0 << 3) | |
| 28 | −PAD_CTL_DSE_240ohm (1 << 3) | |
| 29 | −PAD_CTL_DSE_120ohm (2 << 3) | |
| 30 | −PAD_CTL_DSE_80ohm (3 << 3) | |
| 31 | −PAD_CTL_DSE_60ohm (4 << 3) | |
| 32 | −PAD_CTL_DSE_48ohm (5 << 3) | |
| 33 | −PAD_CTL_DSE_40ohm (6 << 3) | |
| 34 | −PAD_CTL_DSE_34ohm (7 << 3) | |
| 35 | −PAD_CTL_SRE_FAST (1 << 0) | |
| 36 | −PAD_CTL_SRE_SLOW (0 << 0) | |
| 37 | − | |
| 38 | −Refer to imx6sl-pinfunc.h in device tree source folder for all available | |
| 39 | −imx6sl PIN_FUNC_ID. | |
| @@ -1,40 +0,0 @@ | ||
| 1 | −* Freescale i.MX6 SLL IOMUX Controller | |
| 2 | − | |
| 3 | −Please refer to fsl,imx-pinctrl.txt in this directory for common binding part | |
| 4 | −and usage. | |
| 5 | − | |
| 6 | −Required properties: | |
| 7 | −- compatible: "fsl,imx6sll-iomuxc" | |
| 8 | −- fsl,pins: each entry consists of 6 integers and represents the mux and config | |
| 9 | − setting for one pin. The first 5 integers <mux_reg conf_reg input_reg mux_val | |
| 10 | − input_val> are specified using a PIN_FUNC_ID macro, which can be found in | |
| 11 | − imx6sll-pinfunc.h under device tree source folder. The last integer CONFIG is | |
| 12 | − the pad setting value like pull-up on this pin. Please refer to i.MX6SLL | |
| 13 | − Reference Manual for detailed CONFIG settings. | |
| 14 | − | |
| 15 | −CONFIG bits definition: | |
| 16 | −PAD_CTL_LVE (1 << 22) | |
| 17 | −PAD_CTL_HYS (1 << 16) | |
| 18 | −PAD_CTL_PUS_100K_DOWN (0 << 14) | |
| 19 | −PAD_CTL_PUS_47K_UP (1 << 14) | |
| 20 | −PAD_CTL_PUS_100K_UP (2 << 14) | |
| 21 | −PAD_CTL_PUS_22K_UP (3 << 14) | |
| 22 | −PAD_CTL_PUE (1 << 13) | |
| 23 | −PAD_CTL_PKE (1 << 12) | |
| 24 | −PAD_CTL_ODE (1 << 11) | |
| 25 | −PAD_CTL_SPEED_LOW (0 << 6) | |
| 26 | −PAD_CTL_SPEED_MED (1 << 6) | |
| 27 | −PAD_CTL_SPEED_HIGH (3 << 6) | |
| 28 | −PAD_CTL_DSE_DISABLE (0 << 3) | |
| 29 | −PAD_CTL_DSE_260ohm (1 << 3) | |
| 30 | −PAD_CTL_DSE_130ohm (2 << 3) | |
| 31 | −PAD_CTL_DSE_87ohm (3 << 3) | |
| 32 | −PAD_CTL_DSE_65ohm (4 << 3) | |
| 33 | −PAD_CTL_DSE_52ohm (5 << 3) | |
| 34 | −PAD_CTL_DSE_43ohm (6 << 3) | |
| 35 | −PAD_CTL_DSE_37ohm (7 << 3) | |
| 36 | −PAD_CTL_SRE_FAST (1 << 0) | |
| 37 | −PAD_CTL_SRE_SLOW (0 << 0) | |
| 38 | − | |
| 39 | −Refer to imx6sll-pinfunc.h in device tree source folder for all available | |
| 40 | −imx6sll PIN_FUNC_ID. | |
| @@ -1,36 +0,0 @@ | ||
| 1 | −* Freescale i.MX6 SoloX IOMUX Controller | |
| 2 | − | |
| 3 | −Please refer to fsl,imx-pinctrl.txt in this directory for common binding part | |
| 4 | −and usage. | |
| 5 | − | |
| 6 | −Required properties: | |
| 7 | −- compatible: "fsl,imx6sx-iomuxc" | |
| 8 | −- fsl,pins: each entry consists of 6 integers and represents the mux and config | |
| 9 | − setting for one pin. The first 5 integers <mux_reg conf_reg input_reg mux_val | |
| 10 | − input_val> are specified using a PIN_FUNC_ID macro, which can be found in | |
| 11 | − imx6sx-pinfunc.h under device tree source folder. The last integer CONFIG is | |
| 12 | − the pad setting value like pull-up on this pin. Please refer to i.MX6 SoloX | |
| 13 | − Reference Manual for detailed CONFIG settings. | |
| 14 | − | |
| 15 | −CONFIG bits definition: | |
| 16 | −PAD_CTL_HYS (1 << 16) | |
| 17 | −PAD_CTL_PUS_100K_DOWN (0 << 14) | |
| 18 | −PAD_CTL_PUS_47K_UP (1 << 14) | |
| 19 | −PAD_CTL_PUS_100K_UP (2 << 14) | |
| 20 | −PAD_CTL_PUS_22K_UP (3 << 14) | |
| 21 | −PAD_CTL_PUE (1 << 13) | |
| 22 | −PAD_CTL_PKE (1 << 12) | |
| 23 | −PAD_CTL_ODE (1 << 11) | |
| 24 | −PAD_CTL_SPEED_LOW (0 << 6) | |
| 25 | −PAD_CTL_SPEED_MED (1 << 6) | |
| 26 | −PAD_CTL_SPEED_HIGH (3 << 6) | |
| 27 | −PAD_CTL_DSE_DISABLE (0 << 3) | |
| 28 | −PAD_CTL_DSE_260ohm (1 << 3) | |
| 29 | −PAD_CTL_DSE_130ohm (2 << 3) | |
| 30 | −PAD_CTL_DSE_87ohm (3 << 3) | |
| 31 | −PAD_CTL_DSE_65ohm (4 << 3) | |
| 32 | −PAD_CTL_DSE_52ohm (5 << 3) | |
| 33 | −PAD_CTL_DSE_43ohm (6 << 3) | |
| 34 | −PAD_CTL_DSE_37ohm (7 << 3) | |
| 35 | −PAD_CTL_SRE_FAST (1 << 0) | |
| 36 | −PAD_CTL_SRE_SLOW (0 << 0) | |
| @@ -0,0 +1,161 @@ | ||
| 1 | +# SPDX-License-Identifier: GPL-2.0-only | |
| 2 | +%YAML 1.2 | |
| 3 | +--- | |
| 4 | +$id: http://devicetree.org/schemas/pinctrl/microchip,mcp23s08.yaml# | |
| 5 | +$schema: http://devicetree.org/meta-schemas/core.yaml# | |
| 6 | + | |
| 7 | +title: Microchip I/O expander with serial interface (I2C/SPI) | |
| 8 | + | |
| 9 | +maintainers: | |
| 10 | + - Himanshu Bhavani <himanshu.bhavani@siliconsignals.io> | |
| 11 | + | |
| 12 | +description: | |
| 13 | + Microchip MCP23008, MCP23017, MCP23S08, MCP23S17, MCP23S18 GPIO expander | |
| 14 | + chips.These chips provide 8 or 16 GPIO pins with either I2C or SPI interface. | |
| 15 | + | |
| 16 | +allOf: | |
| 17 | + - $ref: /schemas/spi/spi-peripheral-props.yaml# | |
| 18 | + | |
| 19 | +properties: | |
| 20 | + compatible: | |
| 21 | + enum: | |
| 22 | + - microchip,mcp23s08 | |
| 23 | + - microchip,mcp23s17 | |
| 24 | + - microchip,mcp23s18 | |
| 25 | + - microchip,mcp23008 | |
| 26 | + - microchip,mcp23017 | |
| 27 | + - microchip,mcp23018 | |
| 28 | + | |
| 29 | + reg: | |
| 30 | + maxItems: 1 | |
| 31 | + | |
| 32 | + gpio-controller: true | |
| 33 | + | |
| 34 | + '#gpio-cells': | |
| 35 | + const: 2 | |
| 36 | + | |
| 37 | + interrupt-controller: true | |
| 38 | + | |
| 39 | + '#interrupt-cells': | |
| 40 | + const: 2 | |
| 41 | + | |
| 42 | + interrupts: | |
| 43 | + maxItems: 1 | |
| 44 | + | |
| 45 | + reset-gpios: | |
| 46 | + description: GPIO specifier for active-low reset pin. | |
| 47 | + maxItems: 1 | |
| 48 | + | |
| 49 | + microchip,spi-present-mask: | |
| 50 | + description: | |
| 51 | + Multiple SPI chips can share the same SPI chipselect. Set a bit in | |
| 52 | + bit0-7 in this mask to 1 if there is a chip connected with the | |
| 53 | + corresponding spi address set. For example if you have a chip with | |
| 54 | + address 3 connected, you have to set bit3 to 1, which is 0x08. mcp23s08 | |
| 55 | + chip variant only supports bits 0-3. It is not possible to mix mcp23s08 | |
| 56 | + and mcp23s17 on the same chipselect. Set at least one bit to 1 for SPI | |
| 57 | + chips. | |
| 58 | + $ref: /schemas/types.yaml#/definitions/uint8 | |
| 59 | + | |
| 60 | + microchip,irq-mirror: | |
| 61 | + type: boolean | |
| 62 | + description: | |
| 63 | + Sets the mirror flag in the IOCON register. Devices with two interrupt | |
| 64 | + outputs (these are the devices ending with 17 and those that have 16 IOs) | |
| 65 | + have two IO banks IO 0-7 form bank 1 and IO 8-15 are bank 2. These chips | |
| 66 | + have two different interrupt outputs One for bank 1 and another for | |
| 67 | + bank 2. If irq-mirror is set, both interrupts are generated regardless of | |
| 68 | + the bank that an input change occurred on. If it is not set,the interrupt | |
| 69 | + are only generated for the bank they belong to. | |
| 70 | + | |
| 71 | + microchip,irq-active-high: | |
| 72 | + type: boolean | |
| 73 | + description: | |
| 74 | + Sets the INTPOL flag in the IOCON register.This configures the IRQ output | |
| 75 | + polarity as active high. | |
| 76 | + | |
| 77 | + drive-open-drain: | |
| 78 | + type: boolean | |
| 79 | + description: | |
| 80 | + Sets the ODR flag in the IOCON register. This configures the IRQ output as | |
| 81 | + open drain active low. | |
| 82 | + | |
| 83 | + pinmux: | |
| 84 | + type: object | |
| 85 | + properties: | |
| 86 | + pins: | |
| 87 | + description: | |
| 88 | + The list of GPIO pins controlled by this node. Each pin name | |
| 89 | + corresponds to a physical pin on the GPIO expander. | |
| 90 | + items: | |
| 91 | + pattern: '^gpio([0-9]|[1][0-5])$' | |
| 92 | + maxItems: 16 | |
| 93 | + | |
| 94 | + bias-pull-up: | |
| 95 | + type: boolean | |
| 96 | + description: | |
| 97 | + Configures pull-up resistors for the GPIO pins. Absence of this | |
| 98 | + property will leave the configuration in its default state. | |
| 99 | + | |
| 100 | + required: | |
| 101 | + - pins | |
| 102 | + | |
| 103 | + additionalProperties: false | |
| 104 | + | |
| 105 | +required: | |
| 106 | + - compatible | |
| 107 | + - reg | |
| 108 | + - gpio-controller | |
| 109 | + - '#gpio-cells' | |
| 110 | + | |
| 111 | +unevaluatedProperties: false | |
| 112 | + | |
| 113 | +examples: | |
| 114 | + - | | |
| 115 | + #include <dt-bindings/interrupt-controller/irq.h> | |
| 116 | + #include <dt-bindings/gpio/gpio.h> | |
| 117 | + | |
| 118 | + i2c { | |
| 119 | + #address-cells = <1>; | |
| 120 | + #size-cells = <0>; | |
| 121 | + | |
| 122 | + gpio@21 { | |
| 123 | + compatible = "microchip,mcp23017"; | |
| 124 | + reg = <0x21>; | |
| 125 | + gpio-controller; | |
| 126 | + #gpio-cells = <2>; | |
| 127 | + | |
| 128 | + interrupt-parent = <&gpio1>; | |
| 129 | + interrupts = <17 IRQ_TYPE_LEVEL_LOW>; | |
| 130 | + interrupt-controller; | |
| 131 | + #interrupt-cells = <2>; | |
| 132 | + | |
| 133 | + microchip,irq-mirror; | |
| 134 | + pinctrl-names = "default"; | |
| 135 | + pinctrl-0 = <&pinctrl_i2c_gpio0>, <&gpiopullups>; | |
| 136 | + reset-gpios = <&gpio6 15 GPIO_ACTIVE_LOW>; | |
| 137 | + | |
| 138 | + gpiopullups: pinmux { | |
| 139 | + pins = "gpio0", "gpio1", "gpio2", "gpio3", | |
| 140 | + "gpio4", "gpio5", "gpio6", "gpio7", | |
| 141 | + "gpio8", "gpio9", "gpio10", "gpio11", | |
| 142 | + "gpio12", "gpio13", "gpio14", "gpio15"; | |
| 143 | + bias-pull-up; | |
| 144 | + }; | |
| 145 | + }; | |
| 146 | + }; | |
| 147 | + | |
| 148 | + - | | |
| 149 | + spi { | |
| 150 | + #address-cells = <1>; | |
| 151 | + #size-cells = <0>; | |
| 152 | + | |
| 153 | + gpio@0 { | |
| 154 | + compatible = "microchip,mcp23s17"; | |
| 155 | + reg = <0>; | |
| 156 | + gpio-controller; | |
| 157 | + #gpio-cells = <2>; | |
| 158 | + spi-max-frequency = <1000000>; | |
| 159 | + microchip,spi-present-mask = /bits/ 8 <0x01>; | |
| 160 | + }; | |
| 161 | + }; | |
| @@ -12,14 +12,24 @@ maintainers: · 11 unmodified lines | ||
| 12 | 12 | |
| 13 | 13 | properties: |
| 14 | 14 | compatible: |
| 15 | − enum: | |
| 16 | − - microchip,lan966x-pinctrl | |
| 17 | − - microchip,sparx5-pinctrl | |
| 18 | − - mscc,jaguar2-pinctrl | |
| 19 | − - mscc,luton-pinctrl | |
| 20 | − - mscc,ocelot-pinctrl | |
| 21 | − - mscc,serval-pinctrl | |
| 22 | − - mscc,servalt-pinctrl | |
| 15 | + oneOf: | |
| 16 | + - enum: | |
| 17 | + - microchip,lan966x-pinctrl | |
| 18 | + - microchip,lan9691-pinctrl | |
| 19 | + - microchip,sparx5-pinctrl | |
| 20 | + - mscc,jaguar2-pinctrl | |
| 21 | + - mscc,luton-pinctrl | |
| 22 | + - mscc,ocelot-pinctrl | |
| 23 | + - mscc,serval-pinctrl | |
| 24 | + - mscc,servalt-pinctrl | |
| 25 | + - items: | |
| 26 | + - enum: | |
| 27 | + - microchip,lan9698-pinctrl | |
| 28 | + - microchip,lan9696-pinctrl | |
| 29 | + - microchip,lan9694-pinctrl | |
| 30 | + - microchip,lan9693-pinctrl | |
| 31 | + - microchip,lan9692-pinctrl | |
| 32 | + - const: microchip,lan9691-pinctrl | |
| 23 | 33 | |
| 24 | 34 | reg: |
| 25 | 35 | items: |
| @@ -85,6 +95,7 @@ allOf: · 59 unmodified lines | ||
| 85 | 95 | contains: |
| 86 | 96 | enum: |
| 87 | 97 | - microchip,lan966x-pinctrl |
| 98 | + - microchip,lan9691-pinctrl | |
| 88 | 99 | - microchip,sparx5-pinctrl |
| 89 | 100 | then: |
| 90 | 101 | properties: |
| @@ -1,148 +0,0 @@ | ||
| 1 | −Microchip MCP2308/MCP23S08/MCP23017/MCP23S17 driver for | |
| 2 | −8-/16-bit I/O expander with serial interface (I2C/SPI) | |
| 3 | − | |
| 4 | −Required properties: | |
| 5 | −- compatible : Should be | |
| 6 | − - "mcp,mcp23s08" (DEPRECATED) for 8 GPIO SPI version | |
| 7 | − - "mcp,mcp23s17" (DEPRECATED) for 16 GPIO SPI version | |
| 8 | − - "mcp,mcp23008" (DEPRECATED) for 8 GPIO I2C version or | |
| 9 | − - "mcp,mcp23017" (DEPRECATED) for 16 GPIO I2C version of the chip | |
| 10 | − | |
| 11 | − - "microchip,mcp23s08" for 8 GPIO SPI version | |
| 12 | − - "microchip,mcp23s17" for 16 GPIO SPI version | |
| 13 | − - "microchip,mcp23s18" for 16 GPIO SPI version | |
| 14 | − - "microchip,mcp23008" for 8 GPIO I2C version or | |
| 15 | − - "microchip,mcp23017" for 16 GPIO I2C version of the chip | |
| 16 | − - "microchip,mcp23018" for 16 GPIO I2C version | |
| 17 | − NOTE: Do not use the old mcp prefix any more. It is deprecated and will be | |
| 18 | − removed. | |
| 19 | −- #gpio-cells : Should be two. | |
| 20 | − - first cell is the pin number | |
| 21 | − - second cell is used to specify flags as described in | |
| 22 | − 'Documentation/devicetree/bindings/gpio/gpio.txt'. Allowed values defined by | |
| 23 | − 'include/dt-bindings/gpio/gpio.h' (e.g. GPIO_ACTIVE_LOW). | |
| 24 | −- gpio-controller : Marks the device node as a GPIO controller. | |
| 25 | −- reg : For an address on its bus. I2C uses this a the I2C address of the chip. | |
| 26 | − SPI uses this to specify the chipselect line which the chip is | |
| 27 | − connected to. The driver and the SPI variant of the chip support | |
| 28 | − multiple chips on the same chipselect. Have a look at | |
| 29 | − microchip,spi-present-mask below. | |
| 30 | − | |
| 31 | −Required device specific properties (only for SPI chips): | |
| 32 | −- mcp,spi-present-mask (DEPRECATED) | |
| 33 | −- microchip,spi-present-mask : This is a present flag, that makes only sense for SPI | |
| 34 | − chips - as the name suggests. Multiple SPI chips can share the same | |
| 35 | − SPI chipselect. Set a bit in bit0-7 in this mask to 1 if there is a | |
| 36 | − chip connected with the corresponding spi address set. For example if | |
| 37 | − you have a chip with address 3 connected, you have to set bit3 to 1, | |
| 38 | − which is 0x08. mcp23s08 chip variant only supports bits 0-3. It is not | |
| 39 | − possible to mix mcp23s08 and mcp23s17 on the same chipselect. Set at | |
| 40 | − least one bit to 1 for SPI chips. | |
| 41 | − NOTE: Do not use the old mcp prefix any more. It is deprecated and will be | |
| 42 | − removed. | |
| 43 | −- spi-max-frequency = The maximum frequency this chip is able to handle | |
| 44 | − | |
| 45 | −Optional properties: | |
| 46 | −- #interrupt-cells : Should be two. | |
| 47 | − - first cell is the pin number | |
| 48 | − - second cell is used to specify flags. | |
| 49 | −- interrupt-controller: Marks the device node as a interrupt controller. | |
| 50 | −- drive-open-drain: Sets the ODR flag in the IOCON register. This configures | |
| 51 | − the IRQ output as open drain active low. | |
| 52 | −- reset-gpios: Corresponds to the active-low RESET# pin for the chip | |
| 53 | − | |
| 54 | −Optional device specific properties: | |
| 55 | −- microchip,irq-mirror: Sets the mirror flag in the IOCON register. Devices | |
| 56 | − with two interrupt outputs (these are the devices ending with 17 and | |
| 57 | − those that have 16 IOs) have two IO banks: IO 0-7 form bank 1 and | |
| 58 | − IO 8-15 are bank 2. These chips have two different interrupt outputs: | |
| 59 | − One for bank 1 and another for bank 2. If irq-mirror is set, both | |
| 60 | − interrupts are generated regardless of the bank that an input change | |
| 61 | − occurred on. If it is not set, the interrupt are only generated for the | |
| 62 | − bank they belong to. | |
| 63 | − On devices with only one interrupt output this property is useless. | |
| 64 | −- microchip,irq-active-high: Sets the INTPOL flag in the IOCON register. This | |
| 65 | − configures the IRQ output polarity as active high. | |
| 66 | − | |
| 67 | −Example I2C (with interrupt): | |
| 68 | −gpiom1: gpio@20 { | |
| 69 | − compatible = "microchip,mcp23017"; | |
| 70 | − gpio-controller; | |
| 71 | − #gpio-cells = <2>; | |
| 72 | − reg = <0x20>; | |
| 73 | − | |
| 74 | − interrupt-parent = <&gpio1>; | |
| 75 | − interrupts = <17 IRQ_TYPE_LEVEL_LOW>; | |
| 76 | − interrupt-controller; | |
| 77 | − #interrupt-cells=<2>; | |
| 78 | − microchip,irq-mirror; | |
| 79 | −}; | |
| 80 | − | |
| 81 | −Example SPI: | |
| 82 | −gpiom1: gpio@0 { | |
| 83 | − compatible = "microchip,mcp23s17"; | |
| 84 | − gpio-controller; | |
| 85 | − #gpio-cells = <2>; | |
| 86 | − microchip,spi-present-mask = <0x01>; | |
| 87 | − reg = <0>; | |
| 88 | − spi-max-frequency = <1000000>; | |
| 89 | −}; | |
| 90 | − | |
| 91 | −Pull-up configuration | |
| 92 | −===================== | |
| 93 | − | |
| 94 | −If pins are used as output, they can also be configured with pull-ups. This is | |
| 95 | −done with pinctrl. | |
| 96 | − | |
| 97 | −Please refer file <devicetree/bindings/pinctrl/pinctrl-bindings.txt> | |
| 98 | −for details of the common pinctrl bindings used by client devices, | |
| 99 | −including the meaning of the phrase "pin configuration node". | |
| 100 | − | |
| 101 | −Optional Pinmux properties: | |
| 102 | −-------------------------- | |
| 103 | −Following properties are required if default setting of pins are required | |
| 104 | −at boot. | |
| 105 | −- pinctrl-names: A pinctrl state named per <pinctrl-bindings.txt>. | |
| 106 | −- pinctrl[0...n]: Properties to contain the phandle for pinctrl states per | |
| 107 | − <pinctrl-bindings.txt>. | |
| 108 | − | |
| 109 | −The pin configurations are defined as child of the pinctrl states node. Each | |
| 110 | −sub-node have following properties: | |
| 111 | − | |
| 112 | −Required properties: | |
| 113 | −------------------ | |
| 114 | −- pins: List of pins. Valid values of pins properties are: | |
| 115 | − gpio0 ... gpio7 for the devices with 8 GPIO pins and | |
| 116 | − gpio0 ... gpio15 for the devices with 16 GPIO pins. | |
| 117 | − | |
| 118 | −Optional properties: | |
| 119 | −------------------- | |
| 120 | −The following optional property is defined in the pinmux DT binding document | |
| 121 | −<pinctrl-bindings.txt>. Absence of this property will leave the configuration | |
| 122 | −in its default state. | |
| 123 | − bias-pull-up | |
| 124 | − | |
| 125 | −Example with pinctrl to pull-up output pins: | |
| 126 | −gpio21: gpio@21 { | |
| 127 | − compatible = "microchip,mcp23017"; | |
| 128 | − gpio-controller; | |
| 129 | − #gpio-cells = <0x2>; | |
| 130 | − reg = <0x21>; | |
| 131 | − interrupt-parent = <&socgpio>; | |
| 132 | − interrupts = <0x17 0x8>; | |
| 133 | − interrupt-names = "mcp23017@21 irq"; | |
| 134 | − interrupt-controller; | |
| 135 | − #interrupt-cells = <0x2>; | |
| 136 | − microchip,irq-mirror; | |
| 137 | − pinctrl-names = "default"; | |
| 138 | − pinctrl-0 = <&i2cgpio0irq>, <&gpio21pullups>; | |
| 139 | − reset-gpios = <&gpio6 15 GPIO_ACTIVE_LOW>; | |
| 140 | − | |
| 141 | − gpio21pullups: pinmux { | |
| 142 | − pins = "gpio0", "gpio1", "gpio2", "gpio3", | |
| 143 | − "gpio4", "gpio5", "gpio6", "gpio7", | |
| 144 | − "gpio8", "gpio9", "gpio10", "gpio11", | |
| 145 | − "gpio12", "gpio13", "gpio14", "gpio15"; | |
| 146 | − bias-pull-up; | |
| 147 | − }; | |
| 148 | −}; | |
| @@ -33,6 +33,10 @@ properties: · 32 unmodified lines | ||
| 33 | 33 | - ti,omap5-padconf |
| 34 | 34 | - ti,j7200-padconf |
| 35 | 35 | - const: pinctrl-single |
| 36 | + - items: | |
| 37 | + - enum: | |
| 38 | + - marvell,pxa1908-padconf | |
| 39 | + - const: pinconf-single | |
| 36 | 40 | |
| 37 | 41 | reg: |
| 38 | 42 | maxItems: 1 |
| @@ -0,0 +1,114 @@ | ||
| 1 | +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) | |
| 2 | +%YAML 1.2 | |
| 3 | +--- | |
| 4 | +$id: http://devicetree.org/schemas/pinctrl/qcom,ipq5424-tlmm.yaml# | |
| 5 | +$schema: http://devicetree.org/meta-schemas/core.yaml# | |
| 6 | + | |
| 7 | +title: Qualcomm IPQ5424 TLMM pin controller | |
| 8 | + | |
| 9 | +maintainers: | |
| 10 | + - Bjorn Andersson <andersson@kernel.org> | |
| 11 | + | |
| 12 | +description: | |
| 13 | + Top Level Mode Multiplexer pin controller in Qualcomm IPQ5424 SoC. | |
| 14 | + | |
| 15 | +allOf: | |
| 16 | + - $ref: /schemas/pinctrl/qcom,tlmm-common.yaml# | |
| 17 | + | |
| 18 | +properties: | |
| 19 | + compatible: | |
| 20 | + const: qcom,ipq5424-tlmm | |
| 21 | + | |
| 22 | + reg: | |
| 23 | + maxItems: 1 | |
| 24 | + | |
| 25 | + interrupts: | |
| 26 | + maxItems: 1 | |
| 27 | + | |
| 28 | + gpio-reserved-ranges: | |
| 29 | + minItems: 1 | |
| 30 | + maxItems: 25 | |
| 31 | + | |
| 32 | + gpio-line-names: | |
| 33 | + maxItems: 50 | |
| 34 | + | |
| 35 | +patternProperties: | |
| 36 | + "-state$": | |
| 37 | + oneOf: | |
| 38 | + - $ref: "#/$defs/qcom-ipq5424-tlmm-state" | |
| 39 | + - patternProperties: | |
| 40 | + "-pins$": | |
| 41 | + $ref: "#/$defs/qcom-ipq5424-tlmm-state" | |
| 42 | + additionalProperties: false | |
| 43 | + | |
| 44 | +$defs: | |
| 45 | + qcom-ipq5424-tlmm-state: | |
| 46 | + type: object | |
| 47 | + description: | |
| 48 | + Pinctrl node's client devices use subnodes for desired pin configuration. | |
| 49 | + Client device subnodes use below standard properties. | |
| 50 | + $ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state | |
| 51 | + unevaluatedProperties: false | |
| 52 | + | |
| 53 | + properties: | |
| 54 | + pins: | |
| 55 | + description: | |
| 56 | + List of gpio pins affected by the properties specified in this | |
| 57 | + subnode. | |
| 58 | + items: | |
| 59 | + pattern: "^gpio([0-9]|[1-4][0-9])$" | |
| 60 | + minItems: 1 | |
| 61 | + maxItems: 50 | |
| 62 | + | |
| 63 | + function: | |
| 64 | + description: | |
| 65 | + Specify the alternative function to be configured for the specified | |
| 66 | + pins. | |
| 67 | + | |
| 68 | + enum: [ atest_char, atest_char0, atest_char1, atest_char2, atest_char3, | |
| 69 | + atest_tic, audio_pri, audio_pri0, audio_pri1, audio_sec, | |
| 70 | + audio_sec0, audio_sec1, core_voltage, cri_trng0, cri_trng1, | |
| 71 | + cri_trng2, cri_trng3, cxc_clk, cxc_data, dbg_out, gcc_plltest, | |
| 72 | + gcc_tlmm, gpio, i2c0_scl, i2c0_sda, i2c1_scl, i2c1_sda, i2c11, | |
| 73 | + mac0, mac1, mdc_mst, mdc_slv, mdio_mst, mdio_slv, pcie0_clk, | |
| 74 | + pcie0_wake, pcie1_clk, pcie1_wake, pcie2_clk, pcie2_wake, | |
| 75 | + pcie3_clk, pcie3_wake, pll_test, prng_rosc0, prng_rosc1, | |
| 76 | + prng_rosc2, prng_rosc3, PTA0_0, PTA0_1, PTA0_2, PTA10, PTA11, | |
| 77 | + pwm0, pwm1, pwm2, qdss_cti_trig_in_a0, qdss_cti_trig_out_a0, | |
| 78 | + qdss_cti_trig_in_a1, qdss_cti_trig_out_a1, qdss_cti_trig_in_b0, | |
| 79 | + qdss_cti_trig_out_b0, qdss_cti_trig_in_b1, qdss_cti_trig_out_b1, | |
| 80 | + qdss_traceclk_a, qdss_tracectl_a, qdss_tracedata_a, qspi_clk, | |
| 81 | + qspi_cs, qspi_data, resout, rx0, rx1, rx2, sdc_clk, sdc_cmd, | |
| 82 | + sdc_data, spi0, spi1, spi10, spi11, tsens_max, uart0, uart1, | |
| 83 | + wci_txd, wci_rxd, wsi_clk, wsi_data ] | |
| 84 | + | |
| 85 | + required: | |
| 86 | + - pins | |
| 87 | + | |
| 88 | +required: | |
| 89 | + - compatible | |
| 90 | + - reg | |
| 91 | + | |
| 92 | +unevaluatedProperties: false | |
| 93 | + | |
| 94 | +examples: | |
| 95 | + - | | |
| 96 | + #include <dt-bindings/interrupt-controller/arm-gic.h> | |
| 97 | + | |
| 98 | + tlmm: pinctrl@1000000 { | |
| 99 | + compatible = "qcom,ipq5424-tlmm"; | |
| 100 | + reg = <0x01000000 0x300000>; | |
| 101 | + gpio-controller; | |
| 102 | + #gpio-cells = <0x2>; | |
| 103 | + gpio-ranges = <&tlmm 0 0 50>; | |
| 104 | + interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>; | |
| 105 | + interrupt-controller; | |
| 106 | + #interrupt-cells = <0x2>; | |
| 107 | + | |
| 108 | + uart1_pins: uart1-state { | |
| 109 | + pins = "gpio43", "gpio44"; | |
| 110 | + function = "uart1"; | |
| 111 | + drive-strength = <8>; | |
| 112 | + bias-pull-up; | |
| 113 | + }; | |
| 114 | + }; | |
| @@ -48,6 +48,7 @@ properties: · 47 unmodified lines | ||
| 48 | 48 | - qcom,pm8916-gpio |
| 49 | 49 | - qcom,pm8917-gpio |
| 50 | 50 | - qcom,pm8921-gpio |
| 51 | + - qcom,pm8937-gpio | |
| 51 | 52 | - qcom,pm8941-gpio |
| 52 | 53 | - qcom,pm8950-gpio |
| 53 | 54 | - qcom,pm8953-gpio |
| @@ -184,6 +185,7 @@ allOf: · 130 unmodified lines | ||
| 184 | 185 | - qcom,pm8226-gpio |
| 185 | 186 | - qcom,pm8350b-gpio |
| 186 | 187 | - qcom,pm8550ve-gpio |
| 188 | + - qcom,pm8937-gpio | |
| 187 | 189 | - qcom,pm8950-gpio |
| 188 | 190 | - qcom,pm8953-gpio |
| 189 | 191 | - qcom,pmi632-gpio |
| @@ -468,6 +470,7 @@ $defs: · 278 unmodified lines | ||
| 468 | 470 | - gpio1-gpio6 for pm8550vs |
| 469 | 471 | - gpio1-gpio38 for pm8917 |
| 470 | 472 | - gpio1-gpio44 for pm8921 |
| 473 | + - gpio1-gpio8 for pm8937 (hole on gpio3, gpio4 and gpio6) | |
| 471 | 474 | - gpio1-gpio36 for pm8941 |
| 472 | 475 | - gpio1-gpio8 for pm8950 (hole on gpio3) |
| 473 | 476 | - gpio1-gpio8 for pm8953 (hole on gpio3 and gpio6) |
| @@ -22,6 +22,7 @@ properties: · 21 unmodified lines | ||
| 22 | 22 | - qcom,pm8226-mpp |
| 23 | 23 | - qcom,pm8841-mpp |
| 24 | 24 | - qcom,pm8916-mpp |
| 25 | + - qcom,pm8937-mpp | |
| 25 | 26 | - qcom,pm8941-mpp |
| 26 | 27 | - qcom,pm8950-mpp |
| 27 | 28 | - qcom,pmi8950-mpp |
| @@ -92,6 +93,7 @@ $defs: · 64 unmodified lines | ||
| 92 | 93 | this subnode. Valid pins are |
| 93 | 94 | - mpp1-mpp4 for pm8841 |
| 94 | 95 | - mpp1-mpp4 for pm8916 |
| 96 | + - mpp1-mpp4 for pm8937 | |
| 95 | 97 | - mpp1-mpp8 for pm8941 |
| 96 | 98 | - mpp1-mpp4 for pm8950 |
| 97 | 99 | - mpp1-mpp4 for pmi8950 |
| @@ -0,0 +1,124 @@ | ||
| 1 | +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) | |
| 2 | +%YAML 1.2 | |
| 3 | +--- | |
| 4 | +$id: http://devicetree.org/schemas/pinctrl/qcom,qcs615-tlmm.yaml# | |
| 5 | +$schema: http://devicetree.org/meta-schemas/core.yaml# | |
| 6 | + | |
| 7 | +title: Qualcomm Technologies, Inc. QCS615 TLMM block | |
| 8 | + | |
| 9 | +maintainers: | |
| 10 | + - Lijuan Gao <quic_lijuang@quicinc.com> | |
| 11 | + | |
| 12 | +description: | |
| 13 | + Top Level Mode Multiplexer pin controller in Qualcomm QCS615 SoC. | |
| 14 | + | |
| 15 | +allOf: | |
| 16 | + - $ref: /schemas/pinctrl/qcom,tlmm-common.yaml# | |
| 17 | + | |
| 18 | +properties: | |
| 19 | + compatible: | |
| 20 | + const: qcom,qcs615-tlmm | |
| 21 | + | |
| 22 | + reg: | |
| 23 | + maxItems: 3 | |
| 24 | + | |
| 25 | + reg-names: | |
| 26 | + items: | |
| 27 | + - const: east | |
| 28 | + - const: west | |
| 29 | + - const: south | |
| 30 | + | |
| 31 | + interrupts: | |
| 32 | + maxItems: 1 | |
| 33 | + | |
| 34 | + gpio-reserved-ranges: | |
| 35 | + minItems: 1 | |
| 36 | + maxItems: 62 | |
| 37 | + | |
| 38 | + gpio-line-names: | |
| 39 | + maxItems: 123 | |
| 40 | + | |
| 41 | +patternProperties: | |
| 42 | + "-state$": | |
| 43 | + oneOf: | |
| 44 | + - $ref: "#/$defs/qcom-qcs615-tlmm-state" | |
| 45 | + - type: object | |
| 46 | + patternProperties: | |
| 47 | + "-pins$": | |
| 48 | + $ref: "#/$defs/qcom-qcs615-tlmm-state" | |
| 49 | + additionalProperties: false | |
| 50 | + | |
| 51 | +$defs: | |
| 52 | + qcom-qcs615-tlmm-state: | |
| 53 | + type: object | |
| 54 | + description: | |
| 55 | + Pinctrl node's client devices use subnodes for desired pin configuration. | |
| 56 | + Client device subnodes use below standard properties. | |
| 57 | + $ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state | |
| 58 | + unevaluatedProperties: false | |
| 59 | + | |
| 60 | + properties: | |
| 61 | + pins: | |
| 62 | + description: | |
| 63 | + List of gpio pins affected by the properties specified in this | |
| 64 | + subnode. | |
| 65 | + items: | |
| 66 | + oneOf: | |
| 67 | + - pattern: "^gpio([0-9]|[1-9][0-9]|1[0-1][0-9]|12[0-2])$" | |
| 68 | + - enum: [ sdc1_clk, sdc1_cmd, sdc1_data, sdc1_rclk, | |
| 69 | + sdc2_clk, sdc2_cmd, sdc2_data, ufs_reset ] | |
| 70 | + minItems: 1 | |
| 71 | + maxItems: 36 | |
| 72 | + | |
| 73 | + function: | |
| 74 | + description: | |
| 75 | + Specify the alternative function to be configured for the specified | |
| 76 | + pins. | |
| 77 | + enum: [ gpio, adsp_ext, agera_pll, aoss_cti, atest_char, atest_tsens, | |
| 78 | + atest_usb, cam_mclk, cci_async, cci_i2c, cci_timer, copy_gp, | |
| 79 | + copy_phase, cri_trng, dbg_out_clk, ddr_bist, ddr_pxi, dp_hot, | |
| 80 | + edp_hot, edp_lcd, emac_gcc, emac_phy_intr, forced_usb, gcc_gp, | |
| 81 | + gp_pdm, gps_tx, hs0_mi2s, hs1_mi2s, jitter_bist, ldo_en, | |
| 82 | + ldo_update, m_voc, mclk1, mclk2, mdp_vsync, mdp_vsync0_out, | |
| 83 | + mdp_vsync1_out, mdp_vsync2_out, mdp_vsync3_out, mdp_vsync4_out, | |
| 84 | + mdp_vsync5_out, mi2s_1, mss_lte, nav_pps_in, nav_pps_out, | |
| 85 | + pa_indicator_or, pcie_clk_req, pcie_ep_rst, phase_flag, pll_bist, | |
| 86 | + pll_bypassnl, pll_reset_n, prng_rosc, qdss_cti, qdss_gpio, | |
| 87 | + qlink_enable, qlink_request, qspi, qup0, qup1, rgmii, | |
| 88 | + sd_write_protect, sp_cmu, ter_mi2s, tgu_ch, uim1, uim2, usb0_hs, | |
| 89 | + usb1_hs, usb_phy_ps, vfr_1, vsense_trigger_mirnat, wlan, wsa_clk, | |
| 90 | + wsa_data ] | |
| 91 | + | |
| 92 | + required: | |
| 93 | + - pins | |
| 94 | + | |
| 95 | +required: | |
| 96 | + - compatible | |
| 97 | + - reg | |
| 98 | + - reg-names | |
| 99 | + | |
| 100 | +unevaluatedProperties: false | |
| 101 | + | |
| 102 | +examples: | |
| 103 | + - | | |
| 104 | + #include <dt-bindings/interrupt-controller/arm-gic.h> | |
| 105 | + | |
| 106 | + tlmm: pinctrl@3000000 { | |
| 107 | + compatible = "qcom,qcs615-tlmm"; | |
| 108 | + reg = <0x03100000 0x300000>, | |
| 109 | + <0x03500000 0x300000>, | |
| 110 | + <0x03c00000 0x300000>; | |
| 111 | + reg-names = "east", "west", "south"; | |
| 112 | + interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>; | |
| 113 | + gpio-ranges = <&tlmm 0 0 123>; | |
| 114 | + gpio-controller; | |
| 115 | + #gpio-cells = <2>; | |
| 116 | + interrupt-controller; | |
| 117 | + #interrupt-cells = <2>; | |
| 118 | + | |
| 119 | + qup3-uart2-state { | |
| 120 | + pins ="gpio16", "gpio17"; | |
| 121 | + function = "qup0"; | |
| 122 | + }; | |
| 123 | + }; | |
| 124 | +... | |
| @@ -0,0 +1,118 @@ | ||
| 1 | +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) | |
| 2 | +%YAML 1.2 | |
| 3 | +--- | |
| 4 | +$id: http://devicetree.org/schemas/pinctrl/qcom,qcs8300-tlmm.yaml# | |
| 5 | +$schema: http://devicetree.org/meta-schemas/core.yaml# | |
| 6 | + | |
| 7 | +title: Qualcomm Technologies, Inc. QCS8300 TLMM block | |
| 8 | + | |
| 9 | +maintainers: | |
| 10 | + - Jingyi Wang <quic_jingyw@quicinc.com> | |
| 11 | + | |
| 12 | +description: | | |
| 13 | + Top Level Mode Multiplexer pin controller in Qualcomm QCS8300 SoC. | |
| 14 | + | |
| 15 | +allOf: | |
| 16 | + - $ref: /schemas/pinctrl/qcom,tlmm-common.yaml# | |
| 17 | + | |
| 18 | +properties: | |
| 19 | + compatible: | |
| 20 | + const: qcom,qcs8300-tlmm | |
| 21 | + | |
| 22 | + reg: | |
| 23 | + maxItems: 1 | |
| 24 | + | |
| 25 | + interrupts: | |
| 26 | + maxItems: 1 | |
| 27 | + | |
| 28 | + gpio-reserved-ranges: | |
| 29 | + minItems: 1 | |
| 30 | + maxItems: 67 | |
| 31 | + | |
| 32 | + gpio-line-names: | |
| 33 | + maxItems: 133 | |
| 34 | + | |
| 35 | +patternProperties: | |
| 36 | + "-state$": | |
| 37 | + oneOf: | |
| 38 | + - $ref: "#/$defs/qcom-qcs8300-tlmm-state" | |
| 39 | + - patternProperties: | |
| 40 | + "-pins$": | |
| 41 | + $ref: "#/$defs/qcom-qcs8300-tlmm-state" | |
| 42 | + additionalProperties: false | |
| 43 | + | |
| 44 | +$defs: | |
| 45 | + qcom-qcs8300-tlmm-state: | |
| 46 | + type: object | |
| 47 | + description: | |
| 48 | + Pinctrl node's client devices use subnodes for desired pin configuration. | |
| 49 | + Client device subnodes use below standard properties. | |
| 50 | + $ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state | |
| 51 | + unevaluatedProperties: false | |
| 52 | + | |
| 53 | + properties: | |
| 54 | + pins: | |
| 55 | + description: | |
| 56 | + List of gpio pins affected by the properties specified in this | |
| 57 | + subnode. | |
| 58 | + items: | |
| 59 | + oneOf: | |
| 60 | + - pattern: "^gpio([0-9]|[1-9][0-9]|1[0-2][0-9]|13[0-2])$" | |
| 61 | + - enum: [ ufs_reset, sdc1_rclk, sdc1_clk, sdc1_cmd, sdc1_data ] | |
| 62 | + minItems: 1 | |
| 63 | + maxItems: 36 | |
| 64 | + | |
| 65 | + function: | |
| 66 | + description: | |
| 67 | + Specify the alternative function to be configured for the specified | |
| 68 | + pins. | |
| 69 | + | |
| 70 | + enum: [ aoss_cti, atest_char, atest_usb2, audio_ref, cam_mclk, | |
| 71 | + cci_async, cci_i2c_scl, cci_i2c_sda, cci_timer, cri_trng, | |
| 72 | + dbg_out, ddr_bist, ddr_pxi0, ddr_pxi1, ddr_pxi2, ddr_pxi3, | |
| 73 | + edp0_hot, edp0_lcd, edp1_lcd, egpio, emac0_mcg0, emac0_mcg1, | |
| 74 | + emac0_mcg2, emac0_mcg3, emac0_mdc, emac0_mdio, emac0_ptp_aux, | |
| 75 | + emac0_ptp_pps, gcc_gp1, gcc_gp2, gcc_gp3, gcc_gp4, gcc_gp5, | |
| 76 | + gpio, hs0_mi2s, hs1_mi2s, hs2_mi2s, ibi_i3c, jitter_bist, | |
| 77 | + mdp0_vsync0, mdp0_vsync1, mdp0_vsync3, mdp0_vsync6, mdp0_vsync7, | |
| 78 | + mdp_vsync, mi2s1_data0, mi2s1_data1, mi2s1_sck, mi2s1_ws, | |
| 79 | + mi2s2_data0, mi2s2_data1, mi2s2_sck, mi2s2_ws, mi2s_mclk0, | |
| 80 | + mi2s_mclk1, pcie0_clkreq, pcie1_clkreq, phase_flag, pll_bist, | |
| 81 | + pll_clk, prng_rosc0, prng_rosc1, prng_rosc2, prng_rosc3, | |
| 82 | + qdss_cti, qdss_gpio, qup0_se0, qup0_se1, qup0_se2, qup0_se3, | |
| 83 | + qup0_se4, qup0_se5, qup0_se6, qup0_se7, qup1_se0, qup1_se1, | |
| 84 | + qup1_se2, qup1_se3, qup1_se4, qup1_se5, qup1_se6, qup1_se7, | |
| 85 | + qup2_se0, sailss_emac0, sailss_ospi, sail_top, sgmii_phy, | |
| 86 | + tb_trig, tgu_ch0, tgu_ch1, tgu_ch2, tgu_ch3, tsense_pwm1, | |
| 87 | + tsense_pwm2, tsense_pwm3, tsense_pwm4, usb2phy_ac, | |
| 88 | + vsense_trigger ] | |
| 89 | + | |
| 90 | + required: | |
| 91 | + - pins | |
| 92 | + | |
| 93 | +required: | |
| 94 | + - compatible | |
| 95 | + - reg | |
| 96 | + | |
| 97 | +unevaluatedProperties: false | |
| 98 | + | |
| 99 | +examples: | |
| 100 | + - | | |
| 101 | + #include <dt-bindings/interrupt-controller/arm-gic.h> | |
| 102 | + | |
| 103 | + tlmm: pinctrl@f100000 { | |
| 104 | + compatible = "qcom,qcs8300-tlmm"; | |
| 105 | + reg = <0x0f100000 0x300000>; | |
| 106 | + interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>; | |
| 107 | + gpio-controller; | |
| 108 | + #gpio-cells = <2>; | |
| 109 | + gpio-ranges = <&tlmm 0 0 133>; | |
| 110 | + interrupt-controller; | |
| 111 | + #interrupt-cells = <2>; | |
| 112 | + | |
| 113 | + qup-uart7-state { | |
| 114 | + pins = "gpio43", "gpio44"; | |
| 115 | + function = "qup0_se7"; | |
| 116 | + }; | |
| 117 | + }; | |
| 118 | +... | |
| @@ -17,7 +17,13 @@ allOf: · 16 unmodified lines | ||
| 17 | 17 | |
| 18 | 18 | properties: |
| 19 | 19 | compatible: |
| 20 | − const: qcom,sa8775p-tlmm | |
| 20 | + oneOf: | |
| 21 | + - items: | |
| 22 | + - enum: | |
| 23 | + - qcom,sa8255p-tlmm | |
| 24 | + - const: qcom,sa8775p-tlmm | |
| 25 | + - items: | |
| 26 | + - const: qcom,sa8775p-tlmm | |
| 21 | 27 | |
| 22 | 28 | reg: |
| 23 | 29 | maxItems: 1 |
| @@ -0,0 +1,138 @@ | ||
| 1 | +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) | |
| 2 | +%YAML 1.2 | |
| 3 | +--- | |
| 4 | +$id: http://devicetree.org/schemas/pinctrl/qcom,sar2130p-tlmm.yaml# | |
| 5 | +$schema: http://devicetree.org/meta-schemas/core.yaml# | |
| 6 | + | |
| 7 | +title: Qualcomm Technologies, Inc. SAR2130P TLMM block | |
| 8 | + | |
| 9 | +maintainers: | |
| 10 | + - Dmitry Baryshkov <dmitry.baryshkov@linaro.org> | |
| 11 | + | |
| 12 | +description: | |
| 13 | + Top Level Mode Multiplexer pin controller in Qualcomm SAR2130P SoC. | |
| 14 | + | |
| 15 | +allOf: | |
| 16 | + - $ref: /schemas/pinctrl/qcom,tlmm-common.yaml# | |
| 17 | + | |
| 18 | +properties: | |
| 19 | + compatible: | |
| 20 | + const: qcom,sar2130p-tlmm | |
| 21 | + | |
| 22 | + reg: | |
| 23 | + maxItems: 1 | |
| 24 | + | |
| 25 | + interrupts: | |
| 26 | + maxItems: 1 | |
| 27 | + | |
| 28 | + gpio-reserved-ranges: | |
| 29 | + minItems: 1 | |
| 30 | + maxItems: 78 | |
| 31 | + | |
| 32 | + gpio-line-names: | |
| 33 | + maxItems: 156 | |
| 34 | + | |
| 35 | +patternProperties: | |
| 36 | + "-state$": | |
| 37 | + oneOf: | |
| 38 | + - $ref: "#/$defs/qcom-sar2130p-tlmm-state" | |
| 39 | + - patternProperties: | |
| 40 | + "-pins$": | |
| 41 | + $ref: "#/$defs/qcom-sar2130p-tlmm-state" | |
| 42 | + additionalProperties: false | |
| 43 | + | |
| 44 | +$defs: | |
| 45 | + qcom-sar2130p-tlmm-state: | |
| 46 | + type: object | |
| 47 | + description: | |
| 48 | + Pinctrl node's client devices use subnodes for desired pin configuration. | |
| 49 | + Client device subnodes use below standard properties. | |
| 50 | + $ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state | |
| 51 | + unevaluatedProperties: false | |
| 52 | + | |
| 53 | + properties: | |
| 54 | + pins: | |
| 55 | + description: | |
| 56 | + List of gpio pins affected by the properties specified in this | |
| 57 | + subnode. | |
| 58 | + items: | |
| 59 | + oneOf: | |
| 60 | + - pattern: "^gpio([0-9]|[1-9][0-9]|1[0-4][0-9]|15[0-5])$" | |
| 61 | + - enum: [ sdc1_clk, sdc1_cmd, sdc1_data, sdc1_rclk ] | |
| 62 | + minItems: 1 | |
| 63 | + maxItems: 36 | |
| 64 | + | |
| 65 | + function: | |
| 66 | + description: | |
| 67 | + Specify the alternative function to be configured for the specified | |
| 68 | + pins. | |
| 69 | + enum: [ aoss_cti, atest_char, atest_char0, atest_char1, atest_char2, | |
| 70 | + atest_char3, atest_usb0, atest_usb00, atest_usb01, atest_usb02, | |
| 71 | + atest_usb03, audio_ref, cam_mclk, cci_async, cci_i2c, | |
| 72 | + cci_timer0, cci_timer1, cci_timer2, cci_timer3, cci_timer4, | |
| 73 | + cri_trng, cri_trng0, cri_trng1, dbg_out, ddr_bist, ddr_pxi0, | |
| 74 | + ddr_pxi1, ddr_pxi2, ddr_pxi3, dp0_hot, ext_mclk0, ext_mclk1, | |
| 75 | + gcc_gp1, gcc_gp2, gcc_gp3, gpio, host2wlan_sol, i2s0_data0, | |
| 76 | + i2s0_data1, i2s0_sck, i2s0_ws, ibi_i3c, jitter_bist, mdp_vsync, | |
| 77 | + mdp_vsync0, mdp_vsync1, mdp_vsync2, mdp_vsync3, pcie0_clkreqn, | |
| 78 | + pcie1_clkreqn, phase_flag0, phase_flag1, phase_flag10, | |
| 79 | + phase_flag11, phase_flag12, phase_flag13, phase_flag14, | |
| 80 | + phase_flag15, phase_flag16, phase_flag17, phase_flag18, | |
| 81 | + phase_flag19, phase_flag2, phase_flag20, phase_flag21, | |
| 82 | + phase_flag22, phase_flag23, phase_flag24, phase_flag25, | |
| 83 | + phase_flag26, phase_flag27, phase_flag28, phase_flag29, | |
| 84 | + phase_flag3, phase_flag30, phase_flag31, phase_flag4, | |
| 85 | + phase_flag5, phase_flag6, phase_flag7, phase_flag8, | |
| 86 | + phase_flag9, pll_bist, pll_clk, prng_rosc0, prng_rosc1, | |
| 87 | + prng_rosc2, prng_rosc3, qdss_cti, qdss_gpio, qdss_gpio0, | |
| 88 | + qdss_gpio1, qdss_gpio10, qdss_gpio11, qdss_gpio12, qdss_gpio13, | |
| 89 | + qdss_gpio14, qdss_gpio15, qdss_gpio2, qdss_gpio3, qdss_gpio4, | |
| 90 | + qdss_gpio5, qdss_gpio6, qdss_gpio7, qdss_gpio8, qdss_gpio9, | |
| 91 | + qspi0, qspi1, qspi2, qspi3, qspi_clk, qspi_cs0, qspi_cs1, qup0, | |
| 92 | + qup1, qup2, qup3, qup4, qup5, qup6, qup7, qup8, qup9, qup10, | |
| 93 | + qup11, tb_trig, tgu_ch0, tgu_ch1, tgu_ch2, tgu_ch3, | |
| 94 | + tmess_prng0, tmess_prng1, tmess_prng2, tmess_prng3, | |
| 95 | + tsense_pwm1, tsense_pwm2, usb0_phy, vsense_trigger ] | |
| 96 | + | |
| 97 | + required: | |
| 98 | + - pins | |
| 99 | + | |
| 100 | +required: | |
| 101 | + - compatible | |
| 102 | + - reg | |
| 103 | + | |
| 104 | +unevaluatedProperties: false | |
| 105 | + | |
| 106 | +examples: | |
| 107 | + - | | |
| 108 | + #include <dt-bindings/interrupt-controller/arm-gic.h> | |
| 109 | + pinctrl@f100000 { | |
| 110 | + compatible = "qcom,sar2130p-tlmm"; | |
| 111 | + reg = <0x0f100000 0x300000>; | |
| 112 | + gpio-controller; | |
| 113 | + #gpio-cells = <2>; | |
| 114 | + gpio-ranges = <&tlmm 0 0 156>; | |
| 115 | + interrupt-controller; | |
| 116 | + #interrupt-cells = <2>; | |
| 117 | + interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>; | |
| 118 | + | |
| 119 | + gpio-wo-state { | |
| 120 | + pins = "gpio1"; | |
| 121 | + function = "gpio"; | |
| 122 | + }; | |
| 123 | + | |
| 124 | + uart-w-state { | |
| 125 | + rx-pins { | |
| 126 | + pins = "gpio26"; | |
| 127 | + function = "qup7"; | |
| 128 | + bias-pull-up; | |
| 129 | + }; | |
| 130 | + | |
| 131 | + tx-pins { | |
| 132 | + pins = "gpio27"; | |
| 133 | + function = "qup7"; | |
| 134 | + bias-disable; | |
| 135 | + }; | |
| 136 | + }; | |
| 137 | + }; | |
| 138 | +... | |
| @@ -16,7 +16,11 @@ description: · 15 unmodified lines | ||
| 16 | 16 | |
| 17 | 17 | properties: |
| 18 | 18 | compatible: |
| 19 | − const: qcom,sm8650-lpass-lpi-pinctrl | |
| 19 | + oneOf: | |
| 20 | + - const: qcom,sm8650-lpass-lpi-pinctrl | |
| 21 | + - items: | |
| 22 | + - const: qcom,sm8750-lpass-lpi-pinctrl | |
| 23 | + - const: qcom,sm8650-lpass-lpi-pinctrl | |
| 20 | 24 | |
| 21 | 25 | reg: |
| 22 | 26 | items: |
| @@ -0,0 +1,138 @@ | ||
| 1 | +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) | |
| 2 | +%YAML 1.2 | |
| 3 | +--- | |
| 4 | +$id: http://devicetree.org/schemas/pinctrl/qcom,sm8750-tlmm.yaml# | |
| 5 | +$schema: http://devicetree.org/meta-schemas/core.yaml# | |
| 6 | + | |
| 7 | +title: Qualcomm Technologies, Inc. SM8750 TLMM block | |
| 8 | + | |
| 9 | +maintainers: | |
| 10 | + - Melody Olvera <quic_molvera@quicinc.com> | |
| 11 | + | |
| 12 | +description: | |
| 13 | + Top Level Mode Multiplexer pin controller in Qualcomm SM8750 SoC. | |
| 14 | + | |
| 15 | +allOf: | |
| 16 | + - $ref: /schemas/pinctrl/qcom,tlmm-common.yaml# | |
| 17 | + | |
| 18 | +properties: | |
| 19 | + compatible: | |
| 20 | + const: qcom,sm8750-tlmm | |
| 21 | + | |
| 22 | + reg: | |
| 23 | + maxItems: 1 | |
| 24 | + | |
| 25 | + interrupts: | |
| 26 | + maxItems: 1 | |
| 27 | + | |
| 28 | + gpio-reserved-ranges: | |
| 29 | + minItems: 1 | |
| 30 | + maxItems: 108 | |
| 31 | + | |
| 32 | + gpio-line-names: | |
| 33 | + maxItems: 215 | |
| 34 | + | |
| 35 | +patternProperties: | |
| 36 | + "-state$": | |
| 37 | + oneOf: | |
| 38 | + - $ref: "#/$defs/qcom-sm8750-tlmm-state" | |
| 39 | + - patternProperties: | |
| 40 | + "-pins$": | |
| 41 | + $ref: "#/$defs/qcom-sm8750-tlmm-state" | |
| 42 | + additionalProperties: false | |
| 43 | + | |
| 44 | +$defs: | |
| 45 | + qcom-sm8750-tlmm-state: | |
| 46 | + type: object | |
| 47 | + description: | |
| 48 | + Pinctrl node's client devices use subnodes for desired pin configuration. | |
| 49 | + Client device subnodes use below standard properties. | |
| 50 | + $ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state | |
| 51 | + unevaluatedProperties: false | |
| 52 | + | |
| 53 | + properties: | |
| 54 | + pins: | |
| 55 | + description: | |
| 56 | + List of gpio pins affected by the properties specified in this | |
| 57 | + subnode. | |
| 58 | + items: | |
| 59 | + oneOf: | |
| 60 | + - pattern: "^gpio([0-9]|[1-9][0-9]|1[0-9][0-9]|20[0-9]|21[0-4])$" | |
| 61 | + - enum: [ ufs_reset, sdc2_clk, sdc2_cmd, sdc2_data ] | |
| 62 | + minItems: 1 | |
| 63 | + maxItems: 36 | |
| 64 | + | |
| 65 | + function: | |
| 66 | + description: | |
| 67 | + Specify the alternative function to be configured for the specified | |
| 68 | + pins. | |
| 69 | + enum: [ gpio, aoss_cti, atest_char, atest_usb, audio_ext_mclk0, | |
| 70 | + audio_ext_mclk1, audio_ref_clk, cam_aon_mclk2, cam_aon_mclk4, | |
| 71 | + cam_mclk, cci_async_in, cci_i2c_scl, cci_i2c_sda, cci_timer, | |
| 72 | + cmu_rng, coex_uart1_rx, coex_uart1_tx, coex_uart2_rx, | |
| 73 | + coex_uart2_tx, dbg_out_clk, ddr_bist_complete, ddr_bist_fail, | |
| 74 | + ddr_bist_start, ddr_bist_stop, ddr_pxi0, ddr_pxi1, ddr_pxi2, | |
| 75 | + ddr_pxi3, dp_hot, egpio, gcc_gp1, gcc_gp2, gcc_gp3, gnss_adc0, | |
| 76 | + gnss_adc1, i2chub0_se0, i2chub0_se1, i2chub0_se2, i2chub0_se3, | |
| 77 | + i2chub0_se4, i2chub0_se5, i2chub0_se6, i2chub0_se7, i2chub0_se8, | |
| 78 | + i2chub0_se9, i2s0_data0, i2s0_data1, i2s0_sck, i2s0_ws, | |
| 79 | + i2s1_data0, i2s1_data1, i2s1_sck, i2s1_ws, ibi_i3c, jitter_bist, | |
| 80 | + mdp_esync0_out, mdp_esync1_out, mdp_vsync, mdp_vsync0_out, | |
| 81 | + mdp_vsync1_out, mdp_vsync2_out, mdp_vsync3_out, mdp_vsync5_out, | |
| 82 | + mdp_vsync_e, nav_gpio0, nav_gpio1, nav_gpio2, nav_gpio3, | |
| 83 | + pcie0_clk_req_n, phase_flag, pll_bist_sync, pll_clk_aux, | |
| 84 | + prng_rosc0, prng_rosc1, prng_rosc2, prng_rosc3, qdss_cti, | |
| 85 | + qlink_big_enable, qlink_big_request, qlink_little_enable, | |
| 86 | + qlink_little_request, qlink_wmss, qspi0, qspi1, qspi2, qspi3, | |
| 87 | + qspi_clk, qspi_cs, qup1_se0, qup1_se1, qup1_se2, qup1_se3, | |
| 88 | + qup1_se4, qup1_se5, qup1_se6, qup1_se7, qup2_se0, qup2_se1, | |
| 89 | + qup2_se2, qup2_se3, qup2_se4, qup2_se5, qup2_se6, qup2_se7, | |
| 90 | + sd_write_protect, sdc40, sdc41, sdc42, sdc43, sdc4_clk, | |
| 91 | + sdc4_cmd, tb_trig_sdc2, tb_trig_sdc4, tmess_prng0, tmess_prng1, | |
| 92 | + tmess_prng2, tmess_prng3, tsense_pwm1, tsense_pwm2, tsense_pwm3, | |
| 93 | + tsense_pwm4, uim0_clk, uim0_data, uim0_present, uim0_reset, | |
| 94 | + uim1_clk, uim1_data, uim1_present, uim1_reset, usb1_hs, usb_phy, | |
| 95 | + vfr_0, vfr_1, vsense_trigger_mirnat, wcn_sw, wcn_sw_ctrl ] | |
| 96 | + | |
| 97 | + required: | |
| 98 | + - pins | |
| 99 | + | |
| 100 | +required: | |
| 101 | + - compatible | |
| 102 | + - reg | |
| 103 | + | |
| 104 | +unevaluatedProperties: false | |
| 105 | + | |
| 106 | +examples: | |
| 107 | + - | | |
| 108 | + #include <dt-bindings/interrupt-controller/arm-gic.h> | |
| 109 | + tlmm: pinctrl@f100000 { | |
| 110 | + compatible = "qcom,sm8750-tlmm"; | |
| 111 | + reg = <0x0f100000 0x300000>; | |
| 112 | + gpio-controller; | |
| 113 | + #gpio-cells = <2>; | |
| 114 | + gpio-ranges = <&tlmm 0 0 216>; | |
| 115 | + interrupt-controller; | |
| 116 | + #interrupt-cells = <2>; | |
| 117 | + interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>; | |
| 118 | + | |
| 119 | + gpio-wo-state { | |
| 120 | + pins = "gpio1"; | |
| 121 | + function = "gpio"; | |
| 122 | + }; | |
| 123 | + | |
| 124 | + uart-w-state { | |
| 125 | + rx-pins { | |
| 126 | + pins = "gpio60"; | |
| 127 | + function = "qup1_se7"; | |
| 128 | + bias-pull-up; | |
| 129 | + }; | |
| 130 | + | |
| 131 | + tx-pins { | |
| 132 | + pins = "gpio61"; | |
| 133 | + function = "qup1_se7"; | |
| 134 | + bias-disable; | |
| 135 | + }; | |
| 136 | + }; | |
| 137 | + }; | |
| 138 | +... | |
| @@ -119,6 +119,10 @@ additionalProperties: · 118 unmodified lines | ||
| 119 | 119 | bias-disable: true |
| 120 | 120 | bias-pull-down: true |
| 121 | 121 | bias-pull-up: true |
| 122 | + input-schmitt-enable: true | |
| 123 | + input-schmitt-disable: true | |
| 124 | + drive-open-drain: true | |
| 125 | + drive-push-pull: true | |
| 122 | 126 | renesas,output-impedance: |
| 123 | 127 | description: |
| 124 | 128 | Output impedance for pins on the RZ/V2H(P) SoC. The value provided by this |
| @@ -42,10 +42,13 @@ properties: · 41 unmodified lines | ||
| 42 | 42 | - samsung,exynos5433-wakeup-eint |
| 43 | 43 | - samsung,exynos7885-wakeup-eint |
| 44 | 44 | - samsung,exynos850-wakeup-eint |
| 45 | + - samsung,exynos8895-wakeup-eint | |
| 45 | 46 | - const: samsung,exynos7-wakeup-eint |
| 46 | 47 | - items: |
| 47 | 48 | - enum: |
| 48 | 49 | - google,gs101-wakeup-eint |
| 50 | + - samsung,exynos9810-wakeup-eint | |
| 51 | + - samsung,exynos990-wakeup-eint | |
| 49 | 52 | - samsung,exynosautov9-wakeup-eint |
| 50 | 53 | - const: samsung,exynos850-wakeup-eint |
| 51 | 54 | - const: samsung,exynos7-wakeup-eint |
| @@ -91,14 +94,18 @@ allOf: · 39 unmodified lines | ||
| 91 | 94 | - if: |
| 92 | 95 | properties: |
| 93 | 96 | compatible: |
| 94 | − # Match without "contains", to skip newer variants which are still | |
| 95 | − # compatible with samsung,exynos7-wakeup-eint | |
| 96 | − enum: | |
| 97 | − - samsung,s5pv210-wakeup-eint | |
| 98 | − - samsung,exynos4210-wakeup-eint | |
| 99 | − - samsung,exynos5433-wakeup-eint | |
| 100 | − - samsung,exynos7-wakeup-eint | |
| 101 | − - samsung,exynos7885-wakeup-eint | |
| 97 | + oneOf: | |
| 98 | + # Match without "contains", to skip newer variants which are still | |
| 99 | + # compatible with samsung,exynos7-wakeup-eint | |
| 100 | + - enum: | |
| 101 | + - samsung,exynos4210-wakeup-eint | |
| 102 | + - samsung,exynos7-wakeup-eint | |
| 103 | + - samsung,s5pv210-wakeup-eint | |
| 104 | + - contains: | |
| 105 | + enum: | |
| 106 | + - samsung,exynos5433-wakeup-eint | |
| 107 | + - samsung,exynos7885-wakeup-eint | |
| 108 | + - samsung,exynos8895-wakeup-eint | |
| 102 | 109 | then: |
| 103 | 110 | properties: |
| 104 | 111 | interrupts: |
| @@ -53,6 +53,9 @@ properties: · 52 unmodified lines | ||
| 53 | 53 | - samsung,exynos7-pinctrl |
| 54 | 54 | - samsung,exynos7885-pinctrl |
| 55 | 55 | - samsung,exynos850-pinctrl |
| 56 | + - samsung,exynos8895-pinctrl | |
| 57 | + - samsung,exynos9810-pinctrl | |
| 58 | + - samsung,exynos990-pinctrl | |
| 56 | 59 | - samsung,exynosautov9-pinctrl |
| 57 | 60 | - samsung,exynosautov920-pinctrl |
| 58 | 61 | - tesla,fsd-pinctrl |
| @@ -26,6 +26,10 @@ properties: · 25 unmodified lines | ||
| 26 | 26 | reg: |
| 27 | 27 | maxItems: 1 |
| 28 | 28 | |
| 29 | + gpio-line-names: | |
| 30 | + minItems: 5 | |
| 31 | + maxItems: 17 | |
| 32 | + | |
| 29 | 33 | interrupts: |
| 30 | 34 | maxItems: 1 |
| 31 | 35 | |
| @@ -87,6 +91,45 @@ required: · 55 unmodified lines | ||
| 87 | 91 | |
| 88 | 92 | allOf: |
| 89 | 93 | - $ref: pinctrl.yaml# |
| 94 | + - if: | |
| 95 | + properties: | |
| 96 | + compatible: | |
| 97 | + contains: | |
| 98 | + enum: | |
| 99 | + - semtech,sx1501q | |
| 100 | + - semtech,sx1504q | |
| 101 | + - semtech,sx1507q | |
| 102 | + then: | |
| 103 | + properties: | |
| 104 | + gpio-line-names: | |
| 105 | + minItems: 5 | |
| 106 | + maxItems: 5 | |
| 107 | + - if: | |
| 108 | + properties: | |
| 109 | + compatible: | |
| 110 | + contains: | |
| 111 | + enum: | |
| 112 | + - semtech,sx1502q | |
| 113 | + - semtech,sx1505q | |
| 114 | + - semtech,sx1508q | |
| 115 | + then: | |
| 116 | + properties: | |
| 117 | + gpio-line-names: | |
| 118 | + minItems: 9 | |
| 119 | + maxItems: 9 | |
| 120 | + - if: | |
| 121 | + properties: | |
| 122 | + compatible: | |
| 123 | + contains: | |
| 124 | + enum: | |
| 125 | + - semtech,sx1503q | |
| 126 | + - semtech,sx1506q | |
| 127 | + - semtech,sx1509q | |
| 128 | + then: | |
| 129 | + properties: | |
| 130 | + gpio-line-names: | |
| 131 | + minItems: 17 | |
| 132 | + maxItems: 17 | |
| 90 | 133 | - if: |
| 91 | 134 | not: |
| 92 | 135 | properties: |
| @@ -58,7 +58,7 @@ patternProperties: · 57 unmodified lines | ||
| 58 | 58 | pinmux: |
| 59 | 59 | description: | |
| 60 | 60 | The list of GPIOs and their mux settings that properties in the |
| 61 | − node apply to. This should be set using the GPIOMUX or GPIOMUX2 | |
| 61 | + node apply to. This should be set using the PINMUX or PINMUX2 | |
| 62 | 62 | macro. |
| 63 | 63 | |
| 64 | 64 | bias-pull-up: |
| @@ -0,0 +1,124 @@ | ||
| 1 | +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause | |
| 2 | +%YAML 1.2 | |
| 3 | +--- | |
| 4 | +$id: http://devicetree.org/schemas/pinctrl/spacemit,k1-pinctrl.yaml# | |
| 5 | +$schema: http://devicetree.org/meta-schemas/core.yaml# | |
| 6 | + | |
| 7 | +title: SpacemiT K1 SoC Pin Controller | |
| 8 | + | |
| 9 | +maintainers: | |
| 10 | + - Yixun Lan <dlan@gentoo.org> | |
| 11 | + | |
| 12 | +properties: | |
| 13 | + compatible: | |
| 14 | + const: spacemit,k1-pinctrl | |
| 15 | + | |
| 16 | + reg: | |
| 17 | + items: | |
| 18 | + - description: pinctrl io memory base | |
| 19 | + | |
| 20 | +patternProperties: | |
| 21 | + '-cfg$': | |
| 22 | + type: object | |
| 23 | + additionalProperties: false | |
| 24 | + | |
| 25 | + description: | |
| 26 | + A pinctrl node should contain at least one subnode representing the | |
| 27 | + pinctrl groups available on the machine. | |
| 28 | + | |
| 29 | + patternProperties: | |
| 30 | + '-pins$': | |
| 31 | + type: object | |
| 32 | + additionalProperties: false | |
| 33 | + | |
| 34 | + description: | |
| 35 | + Each subnode will list the pins it needs, and how they should | |
| 36 | + be configured, with regard to muxer configuration, bias pull, | |
| 37 | + drive strength, input schmitt trigger, slew rate, power source. | |
| 38 | + | |
| 39 | + allOf: | |
| 40 | + - $ref: pincfg-node.yaml# | |
| 41 | + - $ref: pinmux-node.yaml# | |
| 42 | + | |
| 43 | + properties: | |
| 44 | + pinmux: | |
| 45 | + description: | |
| 46 | + The list of GPIOs and their mux settings that properties in the | |
| 47 | + node apply to. This should be set using the K1_PADCONF macro to | |
| 48 | + construct the value. | |
| 49 | + | |
| 50 | + bias-disable: true | |
| 51 | + | |
| 52 | + bias-pull-down: true | |
| 53 | + | |
| 54 | + bias-pull-up: | |
| 55 | + description: | | |
| 56 | + typical value for selecting bias pull up or strong pull up. | |
| 57 | + 0: normal bias pull up | |
| 58 | + 1: strong bias pull up | |
| 59 | + enum: [ 0, 1 ] | |
| 60 | + | |
| 61 | + drive-strength: | |
| 62 | + description: | | |
| 63 | + typical current when output high level. | |
| 64 | + 1.8V output: 11, 21, 32, 42 (mA) | |
| 65 | + 3.3V output: 7, 10, 13, 16, 19, 23, 26, 29 (mA) | |
| 66 | + | |
| 67 | + input-schmitt: | |
| 68 | + description: | | |
| 69 | + typical threshold for schmitt trigger. | |
| 70 | + 0: buffer mode | |
| 71 | + 1: trigger mode | |
| 72 | + 2, 3: trigger mode | |
| 73 | + $ref: /schemas/types.yaml#/definitions/uint32 | |
| 74 | + enum: [ 0, 1, 2, 3 ] | |
| 75 | + | |
| 76 | + power-source: | |
| 77 | + description: external power supplies at 1.8v or 3.3v. | |
| 78 | + enum: [ 1800, 3300 ] | |
| 79 | + | |
| 80 | + slew-rate: | |
| 81 | + description: | | |
| 82 | + slew rate for output buffer. | |
| 83 | + 0: disable it | |
| 84 | + 1: enable it (via bundled value from drive strength) | |
| 85 | + 2: slow speed 0 | |
| 86 | + 3: slow speed 1 | |
| 87 | + 4: medium speed | |
| 88 | + 5: fast speed | |
| 89 | + enum: [ 0, 1, 2, 3, 4, 5 ] | |
| 90 | + | |
| 91 | + required: | |
| 92 | + - pinmux | |
| 93 | + | |
| 94 | +required: | |
| 95 | + - compatible | |
| 96 | + - reg | |
| 97 | + | |
| 98 | +additionalProperties: false | |
| 99 | + | |
| 100 | +examples: | |
| 101 | + - | | |
| 102 | + #define K1_PADCONF(pin, func) (((pin) << 16) | (func)) | |
| 103 | + | |
| 104 | + soc { | |
| 105 | + #address-cells = <2>; | |
| 106 | + #size-cells = <2>; | |
| 107 | + | |
| 108 | + pinctrl@d401e000 { | |
| 109 | + compatible = "spacemit,k1-pinctrl"; | |
| 110 | + reg = <0x0 0xd401e000 0x0 0x400>; | |
| 111 | + | |
| 112 | + uart0_2_cfg: uart0-2-cfg { | |
| 113 | + uart0-2-pins { | |
| 114 | + pinmux = <K1_PADCONF(68, 2)>, | |
| 115 | + <K1_PADCONF(69, 2)>; | |
| 116 | + | |
| 117 | + bias-pull-up = <0>; | |
| 118 | + drive-strength = <32>; | |
| 119 | + }; | |
| 120 | + }; | |
| 121 | + }; | |
| 122 | + }; | |
| 123 | + | |
| 124 | +... | |
| @@ -0,0 +1,176 @@ | ||
| 1 | +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) | |
| 2 | +%YAML 1.2 | |
| 3 | +--- | |
| 4 | +$id: http://devicetree.org/schemas/pinctrl/thead,th1520-pinctrl.yaml# | |
| 5 | +$schema: http://devicetree.org/meta-schemas/core.yaml# | |
| 6 | + | |
| 7 | +title: T-Head TH1520 SoC pin controller | |
| 8 | + | |
| 9 | +maintainers: | |
| 10 | + - Emil Renner Berthing <emil.renner.berthing@canonical.com> | |
| 11 | + | |
| 12 | +description: | | |
| 13 | + Pinmux and pinconf controller in the T-Head TH1520 RISC-V SoC. | |
| 14 | + | |
| 15 | + The TH1520 has 3 groups of pads each controlled from different memory ranges. | |
| 16 | + Confusingly the memory ranges are named | |
| 17 | + PADCTRL_AOSYS -> PAD Group 1 | |
| 18 | + PADCTRL1_APSYS -> PAD Group 2 | |
| 19 | + PADCTRL0_APSYS -> PAD Group 3 | |
| 20 | + | |
| 21 | + Each pad can be muxed individually to up to 6 different functions. For most | |
| 22 | + pads only a few of those 6 configurations are valid though, and a few pads in | |
| 23 | + group 1 does not support muxing at all. | |
| 24 | + | |
| 25 | + Pinconf is fairly regular except for a few pads in group 1 that either can't | |
| 26 | + be configured or has some special functions. The rest have configurable drive | |
| 27 | + strength, input enable, schmitt trigger, slew rate, pull-up and pull-down in | |
| 28 | + addition to a special strong pull up. | |
| 29 | + | |
| 30 | + Certain pads in group 1 can be muxed to AUDIO_PA0 - AUDIO_PA30 functions and | |
| 31 | + are then meant to be used by the audio co-processor. Each such pad can then | |
| 32 | + be further muxed to either audio GPIO or one of 4 functions such as UART, I2C | |
| 33 | + and I2S. If the audio pad is muxed to one of the 4 functions then pinconf is | |
| 34 | + also configured in different registers. All of this is done from a different | |
| 35 | + AUDIO_IOCTRL memory range and is left to the audio co-processor for now. | |
| 36 | + | |
| 37 | +properties: | |
| 38 | + compatible: | |
| 39 | + enum: | |
| 40 | + - thead,th1520-pinctrl | |
| 41 | + reg: | |
| 42 | + maxItems: 1 | |
| 43 | + | |
| 44 | + clocks: | |
| 45 | + maxItems: 1 | |
| 46 | + | |
| 47 | + thead,pad-group: | |
| 48 | + description: | | |
| 49 | + Select the pad group that is associated with the pin controller instance. | |
| 50 | + | |
| 51 | + Base Address Name Group | |
| 52 | + 0xFF_FFF4_A000 PADCTRL_AOSYS 1 | |
| 53 | + 0xFF_E7F3_C000 PADCTRL1_APSYS 2 | |
| 54 | + 0xFF_EC00_7000 PADCTRL0_APSYS 3 | |
| 55 | + | |
| 56 | + $ref: /schemas/types.yaml#/definitions/uint32 | |
| 57 | + enum: [1, 2, 3] | |
| 58 | + | |
| 59 | +required: | |
| 60 | + - compatible | |
| 61 | + - reg | |
| 62 | + - clocks | |
| 63 | + | |
| 64 | +patternProperties: | |
| 65 | + '-[0-9]+$': | |
| 66 | + type: object | |
| 67 | + additionalProperties: false | |
| 68 | + | |
| 69 | + patternProperties: | |
| 70 | + '-pins$': | |
| 71 | + type: object | |
| 72 | + allOf: | |
| 73 | + - $ref: /schemas/pinctrl/pincfg-node.yaml# | |
| 74 | + - $ref: /schemas/pinctrl/pinmux-node.yaml# | |
| 75 | + | |
| 76 | + additionalProperties: false | |
| 77 | + | |
| 78 | + description: | |
| 79 | + A pinctrl node should contain at least one subnode describing one | |
| 80 | + or more pads and their associated pinmux and pinconf settings. | |
| 81 | + | |
| 82 | + properties: | |
| 83 | + pins: | |
| 84 | + description: List of pads that properties in the node apply to. | |
| 85 | + | |
| 86 | + function: | |
| 87 | + enum: [ gpio, pwm, uart, ir, i2c, spi, qspi, sdio, audio, i2s, | |
| 88 | + gmac0, gmac1, dpu0, dpu1, isp, hdmi, bootsel, debug, | |
| 89 | + clock, jtag, iso7816, efuse, reset ] | |
| 90 | + description: The mux function to select for the given pins. | |
| 91 | + | |
| 92 | + bias-disable: true | |
| 93 | + | |
| 94 | + bias-pull-up: | |
| 95 | + oneOf: | |
| 96 | + - type: boolean | |
| 97 | + description: Enable the regular 48kOhm pull-up | |
| 98 | + - enum: [ 2100, 48000 ] | |
| 99 | + description: Enable the strong 2.1kOhm pull-up or regular 48kOhm pull-up | |
| 100 | + | |
| 101 | + bias-pull-down: | |
| 102 | + oneOf: | |
| 103 | + - type: boolean | |
| 104 | + - const: 44000 | |
| 105 | + description: Enable the regular 44kOhm pull-down | |
| 106 | + | |
| 107 | + drive-strength: | |
| 108 | + enum: [ 1, 2, 3, 5, 7, 8, 10, 12, 13, 15, 16, 18, 20, 21, 23, 25 ] | |
| 109 | + description: Drive strength in mA | |
| 110 | + | |
| 111 | + input-enable: true | |
| 112 | + | |
| 113 | + input-disable: true | |
| 114 | + | |
| 115 | + input-schmitt-enable: true | |
| 116 | + | |
| 117 | + input-schmitt-disable: true | |
| 118 | + | |
| 119 | + slew-rate: | |
| 120 | + maximum: 1 | |
| 121 | + | |
| 122 | + required: | |
| 123 | + - pins | |
| 124 | + | |
| 125 | +additionalProperties: false | |
| 126 | + | |
| 127 | +examples: | |
| 128 | + - | | |
| 129 | + padctrl0_apsys: pinctrl@ec007000 { | |
| 130 | + compatible = "thead,th1520-pinctrl"; | |
| 131 | + reg = <0xec007000 0x1000>; | |
| 132 | + clocks = <&apb_clk>; | |
| 133 | + thead,pad-group = <3>; | |
| 134 | + | |
| 135 | + uart0_pins: uart0-0 { | |
| 136 | + tx-pins { | |
| 137 | + pins = "UART0_TXD"; | |
| 138 | + function = "uart"; | |
| 139 | + bias-disable; | |
| 140 | + drive-strength = <3>; | |
| 141 | + input-disable; | |
| 142 | + input-schmitt-disable; | |
| 143 | + slew-rate = <0>; | |
| 144 | + }; | |
| 145 | + | |
| 146 | + rx-pins { | |
| 147 | + pins = "UART0_RXD"; | |
| 148 | + function = "uart"; | |
| 149 | + bias-disable; | |
| 150 | + drive-strength = <1>; | |
| 151 | + input-enable; | |
| 152 | + input-schmitt-enable; | |
| 153 | + slew-rate = <0>; | |
| 154 | + }; | |
| 155 | + }; | |
| 156 | + }; | |
| 157 | + | |
| 158 | + padctrl1_apsys: pinctrl@e7f3c000 { | |
| 159 | + compatible = "thead,th1520-pinctrl"; | |
| 160 | + reg = <0xe7f3c000 0x1000>; | |
| 161 | + clocks = <&apb_clk>; | |
| 162 | + thead,pad-group = <2>; | |
| 163 | + | |
| 164 | + i2c5_pins: i2c5-0 { | |
| 165 | + i2c-pins { | |
| 166 | + pins = "QSPI1_CSN0", /* I2C5_SCL */ | |
| 167 | + "QSPI1_D0_MOSI"; /* I2C5_SDA */ | |
| 168 | + function = "i2c"; | |
| 169 | + bias-pull-up = <2100>; | |
| 170 | + drive-strength = <7>; | |
| 171 | + input-enable; | |
| 172 | + input-schmitt-enable; | |
| 173 | + slew-rate = <0>; | |
| 174 | + }; | |
| 175 | + }; | |
| 176 | + }; | |
| @@ -0,0 +1,278 @@ | ||
| 1 | +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause | |
| 2 | +%YAML 1.2 | |
| 3 | +--- | |
| 4 | +$id: http://devicetree.org/schemas/pinctrl/xlnx,versal-pinctrl.yaml# | |
| 5 | +$schema: http://devicetree.org/meta-schemas/core.yaml# | |
| 6 | + | |
| 7 | +title: Xilinx Versal Pinctrl | |
| 8 | + | |
| 9 | +maintainers: | |
| 10 | + - Sai Krishna Potthuri <sai.krishna.potthuri@amd.com> | |
| 11 | + | |
| 12 | +description: | | |
| 13 | + Please refer to pinctrl-bindings.txt in this directory for details of the | |
| 14 | + common pinctrl bindings used by client devices, including the meaning of the | |
| 15 | + phrase "pin configuration node". | |
| 16 | + | |
| 17 | + Versal's pin configuration nodes act as a container for an arbitrary number of | |
| 18 | + subnodes. Each of these subnodes represents some desired configuration for a | |
| 19 | + pin, a group, or a list of pins or groups. This configuration can include the | |
| 20 | + mux function to select on those pin(s)/group(s), and various pin configuration | |
| 21 | + parameters, such as pull-up, slew rate, etc. | |
| 22 | + | |
| 23 | + Each configuration node can consist of multiple nodes describing the pinmux and | |
| 24 | + pinconf options. Those nodes can be pinmux nodes or pinconf nodes. | |
| 25 | + | |
| 26 | +properties: | |
| 27 | + compatible: | |
| 28 | + const: xlnx,versal-pinctrl | |
| 29 | + | |
| 30 | +patternProperties: | |
| 31 | + '^(.*-)?(default|gpio-grp)$': | |
| 32 | + type: object | |
| 33 | + patternProperties: | |
| 34 | + '^mux': | |
| 35 | + type: object | |
| 36 | + description: | |
| 37 | + Pinctrl node's client devices use subnodes for pin muxes, | |
| 38 | + which in turn use below standard properties. | |
| 39 | + $ref: pinmux-node.yaml# | |
| 40 | + | |
| 41 | + properties: | |
| 42 | + pins: | |
| 43 | + description: | |
| 44 | + List of pins to select (either this or "groups" must be specified) | |
| 45 | + $ref: "#/$defs/pins/properties/pins" | |
| 46 | + | |
| 47 | + groups: | |
| 48 | + description: | |
| 49 | + List of groups to select (either this or "pins" must be | |
| 50 | + specified), available groups for this subnode. | |
| 51 | + anyOf: | |
| 52 | + - pattern: '^((LPD|PMC)_)MIO([0-9]|[1-6][0-9]|7[0-7])$' | |
| 53 | + - $ref: "#/$defs/pins/properties/groups" | |
| 54 | + | |
| 55 | + function: | |
| 56 | + description: | |
| 57 | + Specify the alternative function to be configured for the | |
| 58 | + given pin groups. | |
| 59 | + enum: [spi0, spi0_ss, spi1, spi1_ss, can0, can1, i2c0, i2c1, i2c_pmc, ttc0_clk, | |
| 60 | + ttc0_wav, ttc1_clk, ttc1_wav, ttc2_clk, ttc2_wav, ttc3_clk, ttc3_wav, wwdt0, | |
| 61 | + wwdt1, sysmon_i2c0, sysmon_i2c0_alrt, uart0, uart0_ctrl, uart1, uart1_ctrl, | |
| 62 | + gpio0, gpio1, gpio2, emio0, gem0, gem1, trace0, trace0_clk, mdio0, mdio1, gem_tsu0, | |
| 63 | + pcie0, smap0, usb0, sd0, sd0_pc, sd0_cd, sd0_wp, sd1, sd1_pc, sd1_wp, sd1_cd, | |
| 64 | + ospi0, ospi0_ss, qspi0, qspi0_fbclk, qspi0_ss, test_clk, test_scan, tamper_trigger] | |
| 65 | + | |
| 66 | + required: | |
| 67 | + - function | |
| 68 | + | |
| 69 | + oneOf: | |
| 70 | + - required: [ groups ] | |
| 71 | + - required: [ pins ] | |
| 72 | + | |
| 73 | + additionalProperties: false | |
| 74 | + | |
| 75 | + '^conf': | |
| 76 | + type: object | |
| 77 | + description: | |
| 78 | + Pinctrl node's client devices use subnodes for pin configurations, | |
| 79 | + which in turn use the standard properties below. | |
| 80 | + allOf: | |
| 81 | + - $ref: pincfg-node.yaml# | |
| 82 | + - $ref: "#/$defs/pins" | |
| 83 | + | |
| 84 | + additionalProperties: false | |
| 85 | + | |
| 86 | +allOf: | |
| 87 | + - $ref: pinctrl.yaml# | |
| 88 | + | |
| 89 | +required: | |
| 90 | + - compatible | |
| 91 | + | |
| 92 | +additionalProperties: false | |
| 93 | + | |
| 94 | +$defs: | |
| 95 | + pins: | |
| 96 | + properties: | |
| 97 | + groups: | |
| 98 | + description: | |
| 99 | + List of pin groups to select in this subnode. | |
| 100 | + items: | |
| 101 | + enum: [spi0_0_grp, spi0_1_grp, spi0_2_grp, spi0_3_grp, spi0_4_grp, spi0_5_grp, | |
| 102 | + spi0_ss_0_grp, spi0_ss_1_grp, spi0_ss_2_grp, spi0_ss_3_grp, spi0_ss_4_grp, | |
| 103 | + spi0_ss_5_grp, spi0_ss_6_grp, spi0_ss_7_grp, spi0_ss_8_grp, spi0_ss_9_grp, | |
| 104 | + spi0_ss_10_grp, spi0_ss_11_grp, spi0_ss_12_grp, spi0_ss_13_grp, spi0_ss_14_grp, | |
| 105 | + spi0_ss_15_grp, spi0_ss_16_grp, spi0_ss_17_grp, spi1_0_grp, spi1_1_grp, | |
| 106 | + spi1_2_grp, spi1_3_grp, spi1_4_grp, spi1_5_grp, spi1_ss_0_grp, spi1_ss_1_grp, | |
| 107 | + spi1_ss_2_grp, spi1_ss_3_grp, spi1_ss_4_grp, spi1_ss_5_grp, spi1_ss_6_grp, | |
| 108 | + spi1_ss_7_grp, spi1_ss_8_grp, spi1_ss_9_grp, spi1_ss_10_grp, spi1_ss_11_grp, | |
| 109 | + spi1_ss_12_grp, spi1_ss_13_grp, spi1_ss_14_grp, spi1_ss_15_grp, spi1_ss_16_grp | |
| 110 | + spi1_ss_17_grp, can0_0_grp, can0_1_grp, can0_2_grp, can0_3_grp, can0_4_grp, | |
| 111 | + can0_5_grp, can0_6_grp, can0_7_grp, can0_8_grp, can0_9_grp, can0_10_grp, | |
| 112 | + can0_11_grp, can0_12_grp, can0_13_grp, can0_14_grp, can0_15_grp, can0_16_grp, | |
| 113 | + can0_17_grp, can1_0_grp, can1_1_grp, can1_2_grp, can1_3_grp, can1_4_grp, | |
| 114 | + can1_5_grp, can1_6_grp, can1_7_grp, can1_8_grp, can1_9_grp, can1_10_grp, | |
| 115 | + can1_11_grp, can1_12_grp, can1_13_grp, can1_14_grp, can1_15_grp, can1_16_grp, | |
| 116 | + can1_17_grp, can1_18_grp, i2c0_0_grp, i2c0_1_grp, i2c0_2_grp, i2c0_3_grp, | |
| 117 | + i2c0_4_grp, i2c0_5_grp, i2c0_6_grp, i2c0_7_grp, i2c0_8_grp, i2c0_9_grp, | |
| 118 | + i2c0_10_grp, i2c0_11_grp, i2c0_12_grp, i2c0_13_grp, i2c0_14_grp, i2c0_15_grp, | |
| 119 | + i2c0_16_grp, i2c0_17_grp, i2c1_0_grp, i2c1_1_grp, i2c1_2_grp, i2c1_3_grp, | |
| 120 | + i2c1_4_grp, i2c1_5_grp, i2c1_6_grp, i2c1_7_grp, i2c1_8_grp, i2c1_9_grp, | |
| 121 | + i2c1_10_grp, i2c1_11_grp, i2c1_12_grp, i2c1_13_grp, i2c1_14_grp, i2c1_15_grp, | |
| 122 | + i2c1_16_grp, i2c1_17_grp, i2c1_18_grp, i2c_pmc_0_grp, i2c_pmc_1_grp, | |
| 123 | + i2c_pmc_2_grp, i2c_pmc_3_grp, i2c_pmc_4_grp, i2c_pmc_5_grp, i2c_pmc_6_grp, | |
| 124 | + i2c_pmc_7_grp, i2c_pmc_8_grp, i2c_pmc_9_grp, i2c_pmc_10_grp, i2c_pmc_11_grp, | |
| 125 | + i2c_pmc_12_grp, ttc0_clk_0_grp, ttc0_clk_1_grp, ttc0_clk_2_grp, ttc0_clk_3_grp, | |
| 126 | + ttc0_clk_4_grp, ttc0_clk_5_grp, ttc0_clk_6_grp, ttc0_clk_7_grp, ttc0_clk_8_grp, | |
| 127 | + ttc0_wav_0_grp, ttc0_wav_1_grp, ttc0_wav_2_grp, ttc0_wav_3_grp, ttc0_wav_4_grp, | |
| 128 | + ttc0_wav_5_grp, ttc0_wav_6_grp, ttc0_wav_7_grp, ttc0_wav_8_grp, ttc1_clk_0_grp, | |
| 129 | + ttc1_clk_1_grp, ttc1_clk_2_grp, ttc1_clk_3_grp, ttc1_clk_4_grp, ttc1_clk_5_grp, | |
| 130 | + ttc1_clk_6_grp, ttc1_clk_7_grp, ttc1_clk_8_grp, ttc1_wav_0_grp, ttc1_wav_1_grp, | |
| 131 | + ttc1_wav_2_grp, ttc1_wav_3_grp, ttc1_wav_4_grp, ttc1_wav_5_grp, ttc1_wav_6_grp, | |
| 132 | + ttc1_wav_7_grp, ttc1_wav_8_grp, ttc2_clk_0_grp, ttc2_clk_1_grp, ttc2_clk_2_grp, | |
| 133 | + ttc2_clk_3_grp, ttc2_clk_4_grp, ttc2_clk_5_grp, ttc2_clk_6_grp, ttc2_clk_7_grp, | |
| 134 | + ttc2_clk_8_grp, ttc2_wav_0_grp, ttc2_wav_1_grp, ttc2_wav_2_grp, ttc2_wav_3_grp, | |
| 135 | + ttc2_wav_4_grp, ttc2_wav_5_grp, ttc2_wav_6_grp, ttc2_wav_7_grp, ttc2_wav_8_grp, | |
| 136 | + ttc3_clk_0_grp, ttc3_clk_1_grp, ttc3_clk_2_grp, ttc3_clk_3_grp, ttc3_clk_4_grp, | |
| 137 | + ttc3_clk_5_grp, ttc3_clk_6_grp, ttc3_clk_7_grp, ttc3_clk_8_grp, ttc3_wav_0_grp, | |
| 138 | + ttc3_wav_1_grp, ttc3_wav_2_grp, ttc3_wav_3_grp, ttc3_wav_4_grp, ttc3_wav_5_grp, | |
| 139 | + ttc3_wav_6_grp, ttc3_wav_7_grp, ttc3_wav_8_grp, wwdt0_0_grp, wwdt0_1_grp, | |
| 140 | + wwdt0_2_grp, wwdt0_3_grp, wwdt0_4_grp, wwdt0_5_grp, wwdt1_0_grp, wwdt1_1_grp, | |
| 141 | + wwdt1_2_grp, wwdt1_3_grp, wwdt1_4_grp, wwdt1_5_grp, sysmon_i2c0_0_grp, | |
| 142 | + sysmon_i2c0_1_grp, sysmon_i2c0_2_grp, sysmon_i2c0_3_grp, sysmon_i2c0_4_grp, | |
| 143 | + sysmon_i2c0_5_grp, sysmon_i2c0_6_grp, sysmon_i2c0_7_grp, sysmon_i2c0_8_grp, | |
| 144 | + sysmon_i2c0_9_grp, sysmon_i2c0_10_grp, sysmon_i2c0_11_grp, sysmon_i2c0_12_grp, | |
| 145 | + sysmon_i2c0_13_grp, sysmon_i2c0_14_grp, sysmon_i2c0_15_grp, | |
| 146 | + sysmon_i2c0_16_grp, sysmon_i2c0_17_grp, sysmon_i2c0_alrt_0_grp, | |
| 147 | + sysmon_i2c0_alrt_1_grp, sysmon_i2c0_alrt_2_grp, sysmon_i2c0_alrt_3_grp, | |
| 148 | + sysmon_i2c0_alrt_4_grp, sysmon_i2c0_alrt_5_grp, sysmon_i2c0_alrt_6_grp, | |
| 149 | + sysmon_i2c0_alrt_7_grp, sysmon_i2c0_alrt_8_grp, sysmon_i2c0_alrt_9_grp, | |
| 150 | + sysmon_i2c0_alrt_10_grp, sysmon_i2c0_alrt_11_grp, sysmon_i2c0_alrt_12_grp, | |
| 151 | + sysmon_i2c0_alrt_13_grp, sysmon_i2c0_alrt_14_grp, sysmon_i2c0_alrt_15_grp, | |
| 152 | + sysmon_i2c0_alrt_16_grp, sysmon_i2c0_alrt_17_grp, uart0_0_grp, uart0_1_grp, | |
| 153 | + uart0_2_grp, uart0_3_grp, uart0_4_grp, uart0_5_grp, uart0_6_grp, uart0_7_grp, | |
| 154 | + uart0_8_grp, uart0_ctrl_0_grp, uart0_ctrl_1_grp, uart0_ctrl_2_grp, | |
| 155 | + uart0_ctrl_3_grp, uart0_ctrl_4_grp, uart0_ctrl_5_grp, uart0_ctrl_6_grp, | |
| 156 | + uart0_ctrl_7_grp, uart0_ctrl_8_grp, uart1_0_grp, uart1_1_grp, uart1_2_grp, | |
| 157 | + uart1_3_grp, uart1_4_grp, uart1_5_grp, uart1_6_grp, uart1_7_grp, uart1_8_grp, | |
| 158 | + uart1_ctrl_0_grp, uart1_ctrl_1_grp, uart1_ctrl_2_grp, uart1_ctrl_3_grp, | |
| 159 | + uart1_ctrl_4_grp, uart1_ctrl_5_grp, uart1_ctrl_6_grp, uart1_ctrl_7_grp, | |
| 160 | + uart1_ctrl_8_grp, gpio0_0_grp, gpio0_1_grp, gpio0_2_grp, gpio0_3_grp, | |
| 161 | + gpio0_4_grp, gpio0_5_grp, gpio0_6_grp, gpio0_7_grp, gpio0_8_grp, gpio0_9_grp, | |
| 162 | + gpio0_10_grp, gpio0_11_grp, gpio0_12_grp, gpio0_13_grp, gpio0_14_grp, | |
| 163 | + gpio0_15_grp, gpio0_16_grp, gpio0_17_grp, gpio0_18_grp, gpio0_19_grp, | |
| 164 | + gpio0_20_grp, gpio0_21_grp, gpio0_22_grp, gpio0_23_grp, gpio0_24_grp, | |
| 165 | + gpio0_25_grp, gpio1_0_grp, gpio1_1_grp, gpio1_2_grp, gpio1_3_grp, gpio1_4_grp, | |
| 166 | + gpio1_5_grp, gpio1_6_grp, gpio1_7_grp, gpio1_8_grp, gpio1_9_grp, | |
| 167 | + gpio1_10_grp, gpio1_11_grp, gpio1_12_grp, gpio1_13_grp, gpio1_14_grp, | |
| 168 | + gpio1_15_grp, gpio1_16_grp, gpio1_17_grp, gpio1_18_grp, gpio1_19_grp, | |
| 169 | + gpio1_20_grp, gpio1_21_grp, gpio1_22_grp, gpio1_23_grp, gpio1_24_grp, | |
| 170 | + gpio1_25_grp, gpio2_0_grp, gpio2_1_grp, gpio2_2_grp, gpio2_3_grp, gpio2_4_grp, | |
| 171 | + gpio2_5_grp, gpio2_6_grp, gpio2_7_grp, gpio2_8_grp, gpio2_9_grp, gpio2_10_grp, | |
| 172 | + gpio2_11_grp, gpio2_12_grp, gpio2_13_grp, gpio2_14_grp, gpio2_15_grp, | |
| 173 | + gpio2_16_grp, gpio2_17_grp, gpio2_18_grp, gpio2_19_grp, gpio2_20_grp, | |
| 174 | + gpio2_21_grp, gpio2_22_grp, gpio2_23_grp, gpio2_24_grp, gpio2_25_grp, | |
| 175 | + emio0_0_grp, emio0_1_grp, emio0_2_grp, emio0_3_grp, emio0_4_grp, emio0_5_grp, | |
| 176 | + emio0_6_grp, emio0_7_grp, emio0_8_grp, emio0_9_grp, emio0_10_grp, | |
| 177 | + emio0_11_grp, emio0_12_grp, emio0_13_grp, emio0_14_grp, emio0_15_grp, | |
| 178 | + emio0_16_grp, emio0_17_grp, emio0_18_grp, emio0_19_grp, emio0_20_grp, | |
| 179 | + emio0_21_grp, emio0_22_grp, emio0_23_grp, emio0_24_grp, emio0_25_grp, | |
| 180 | + emio0_26_grp, emio0_27_grp, emio0_28_grp, emio0_29_grp, emio0_30_grp, | |
| 181 | + emio0_31_grp, emio0_32_grp, emio0_33_grp, emio0_34_grp, emio0_35_grp, | |
| 182 | + emio0_36_grp, emio0_37_grp, emio0_38_grp, emio0_39_grp, emio0_40_grp, | |
| 183 | + emio0_41_grp, emio0_42_grp, emio0_43_grp, emio0_44_grp, emio0_45_grp, | |
| 184 | + emio0_46_grp, emio0_47_grp, emio0_48_grp, emio0_49_grp, emio0_50_grp, | |
| 185 | + emio0_51_grp, emio0_52_grp, emio0_53_grp, emio0_54_grp, emio0_55_grp, | |
| 186 | + emio0_56_grp, emio0_57_grp, emio0_58_grp, emio0_59_grp, emio0_60_grp, | |
| 187 | + emio0_61_grp, emio0_62_grp, emio0_63_grp, emio0_64_grp, emio0_65_grp, | |
| 188 | + emio0_66_grp, emio0_67_grp, emio0_68_grp, emio0_69_grp, emio0_70_grp, | |
| 189 | + emio0_71_grp, emio0_72_grp, emio0_73_grp, emio0_74_grp, emio0_75_grp, | |
| 190 | + emio0_76_grp, emio0_77_grp, gem0_0_grp, gem0_1_grp, gem1_0_grp, gem1_1_grp, | |
| 191 | + trace0_0_grp, trace0_1_grp, trace0_2_grp, trace0_clk_0_grp, trace0_clk_1_grp, | |
| 192 | + trace0_clk_2_grp, mdio0_0_grp, mdio0_1_grp, mdio1_0_grp, mdio1_1_grp, | |
| 193 | + gem_tsu0_0_grp, gem_tsu0_1_grp, gem_tsu0_2_grp, gem_tsu0_3_grp, pcie0_0_grp, | |
| 194 | + pcie0_1_grp, pcie0_2_grp, smap0_0_grp, usb0_0_grp, sd0_0_grp, sd0_1_grp, | |
| 195 | + sd0_2_grp, sd0_3_grp, sd0_4_grp, sd0_5_grp, sd0_6_grp, sd0_7_grp, sd0_8_grp, | |
| 196 | + sd0_9_grp, sd0_10_grp, sd0_11_grp, sd0_12_grp, sd0_13_grp, sd0_14_grp, | |
| 197 | + sd0_15_grp, sd0_16_grp, sd0_17_grp, sd0_18_grp, sd0_19_grp, sd0_20_grp, | |
| 198 | + sd0_21_grp, sd0_pc_0_grp, sd0_pc_1_grp, sd0_cd_0_grp, sd0_cd_1_grp, | |
| 199 | + sd0_wp_0_grp, sd0_wp_1_grp, sd1_0_grp, sd1_1_grp, sd1_2_grp, sd1_3_grp, | |
| 200 | + sd1_4_grp, sd1_5_grp, sd1_6_grp, sd1_7_grp, sd1_8_grp, sd1_9_grp, sd1_10_grp, | |
| 201 | + sd1_11_grp, sd1_12_grp, sd1_13_grp, sd1_14_grp, sd1_15_grp, sd1_16_grp, | |
| 202 | + sd1_17_grp, sd1_18_grp, sd1_19_grp, sd1_20_grp, sd1_21_grp, sd1_pc_0_grp, | |
| 203 | + sd1_pc_1_grp, sd1_cd_0_grp, sd1_cd_1_grp, sd1_wp_0_grp, sd1_wp_1_grp, | |
| 204 | + ospi0_0_grp, ospi0_ss_0_grp, qspi0_0_grp, qspi0_fbclk_0_grp, qspi0_ss_0_grp, | |
| 205 | + test_clk_0_grp, test_scan_0_grp, tamper_trigger_0_grp] | |
| 206 | + minItems: 1 | |
| 207 | + maxItems: 78 | |
| 208 | + | |
| 209 | + pins: | |
| 210 | + description: | |
| 211 | + List of pin names to select in this subnode. | |
| 212 | + items: | |
| 213 | + pattern: '^((LPD|PMC)_)MIO([0-9]|[1-6][0-9]|7[0-7])$' | |
| 214 | + minItems: 1 | |
| 215 | + maxItems: 78 | |
| 216 | + | |
| 217 | + bias-pull-up: true | |
| 218 | + bias-pull-down: true | |
| 219 | + bias-disable: true | |
| 220 | + input-schmitt-enable: true | |
| 221 | + input-schmitt-disable: true | |
| 222 | + bias-high-impedance: true | |
| 223 | + low-power-enable: true | |
| 224 | + low-power-disable: true | |
| 225 | + | |
| 226 | + slew-rate: | |
| 227 | + enum: [0, 1] | |
| 228 | + | |
| 229 | + output-enable: | |
| 230 | + description: | |
| 231 | + This will internally disable the tri-state for MIO pins. | |
| 232 | + | |
| 233 | + drive-strength: | |
| 234 | + description: | |
| 235 | + Selects the drive strength for MIO pins, in mA. | |
| 236 | + enum: [2, 4, 8, 12] | |
| 237 | + | |
| 238 | + power-source: | |
| 239 | + enum: [0, 1] | |
| 240 | + | |
| 241 | + oneOf: | |
| 242 | + - required: [ groups ] | |
| 243 | + - required: [ pins ] | |
| 244 | + | |
| 245 | + additionalProperties: false | |
| 246 | + | |
| 247 | +examples: | |
| 248 | + - | | |
| 249 | + #include <dt-bindings/pinctrl/pinctrl-zynqmp.h> | |
| 250 | + pinctrl { | |
| 251 | + compatible = "xlnx,versal-pinctrl"; | |
| 252 | + | |
| 253 | + uart0-default { | |
| 254 | + mux { | |
| 255 | + groups = "uart0_4_grp", "uart0_5_grp"; | |
| 256 | + function = "uart0"; | |
| 257 | + }; | |
| 258 | + | |
| 259 | + conf { | |
| 260 | + groups = "uart0_4_grp"; | |
| 261 | + slew-rate = <SLEW_RATE_SLOW>; | |
| 262 | + power-source = <IO_STANDARD_LVCMOS18>; | |
| 263 | + }; | |
| 264 | + | |
| 265 | + conf-rx { | |
| 266 | + pins = "PMC_MIO42"; | |
| 267 | + bias-pull-up; | |
| 268 | + }; | |
| 269 | + | |
| 270 | + conf-tx { | |
| 271 | + pins = "PMC_MIO43"; | |
| 272 | + bias-disable; | |
| 273 | + input-schmitt-disable; | |
| 274 | + }; | |
| 275 | + }; | |
| 276 | + }; | |
| 277 | + | |
| 278 | +... | |
| @@ -31,6 +31,10 @@ properties: · 30 unmodified lines | ||
| 31 | 31 | allOf: |
| 32 | 32 | - $ref: reboot-mode.yaml# |
| 33 | 33 | |
| 34 | +patternProperties: | |
| 35 | + "^mode-.*$": | |
| 36 | + maxItems: 1 | |
| 37 | + | |
| 34 | 38 | required: |
| 35 | 39 | - compatible |
| 36 | 40 | - nvmem-cells |
| @@ -54,6 +54,10 @@ required: · 53 unmodified lines | ||
| 54 | 54 | - compatible |
| 55 | 55 | - reg |
| 56 | 56 | |
| 57 | +patternProperties: | |
| 58 | + "^mode-.*$": | |
| 59 | + maxItems: 1 | |
| 60 | + | |
| 57 | 61 | unevaluatedProperties: false |
| 58 | 62 | |
| 59 | 63 | allOf: |
| @@ -75,6 +79,9 @@ allOf: · 15 unmodified lines | ||
| 75 | 79 | reg-names: |
| 76 | 80 | items: |
| 77 | 81 | - const: pon |
| 82 | + else: | |
| 83 | + patternProperties: | |
| 84 | + "^mode-.*$": false | |
| 78 | 85 | |
| 79 | 86 | # Special case for pm8941, which doesn't store reset mode |
| 80 | 87 | - if: |
| @@ -28,13 +28,13 @@ description: | · 27 unmodified lines | ||
| 28 | 28 | |
| 29 | 29 | properties: |
| 30 | 30 | mode-normal: |
| 31 | − $ref: /schemas/types.yaml#/definitions/uint32 | |
| 31 | + $ref: /schemas/types.yaml#/definitions/uint32-array | |
| 32 | 32 | description: |
| 33 | 33 | Default value to set on a reboot if no command was provided. |
| 34 | 34 | |
| 35 | 35 | patternProperties: |
| 36 | 36 | "^mode-.*$": |
| 37 | − $ref: /schemas/types.yaml#/definitions/uint32 | |
| 37 | + $ref: /schemas/types.yaml#/definitions/uint32-array | |
| 38 | 38 | |
| 39 | 39 | additionalProperties: true |
| 40 | 40 | |
| @@ -32,6 +32,10 @@ properties: · 31 unmodified lines | ||
| 32 | 32 | allOf: |
| 33 | 33 | - $ref: reboot-mode.yaml# |
| 34 | 34 | |
| 35 | +patternProperties: | |
| 36 | + "^mode-.*$": | |
| 37 | + maxItems: 1 | |
| 38 | + | |
| 35 | 39 | unevaluatedProperties: false |
| 36 | 40 | |
| 37 | 41 | required: |
| @@ -31,6 +31,10 @@ properties: · 30 unmodified lines | ||
| 31 | 31 | $ref: /schemas/types.yaml#/definitions/uint32 |
| 32 | 32 | description: Offset in the register map for the reboot register (in bytes). |
| 33 | 33 | |
| 34 | + reg: | |
| 35 | + maxItems: 1 | |
| 36 | + description: Base address and size for the reboot register. | |
| 37 | + | |
| 34 | 38 | regmap: |
| 35 | 39 | $ref: /schemas/types.yaml#/definitions/phandle |
| 36 | 40 | deprecated: true |
| @@ -45,9 +49,14 @@ properties: · 8 unmodified lines | ||
| 45 | 49 | priority: |
| 46 | 50 | default: 192 |
| 47 | 51 | |
| 52 | +oneOf: | |
| 53 | + - required: | |
| 54 | + - offset | |
| 55 | + - required: | |
| 56 | + - reg | |
| 57 | + | |
| 48 | 58 | required: |
| 49 | 59 | - compatible |
| 50 | − - offset | |
| 51 | 60 | |
| 52 | 61 | additionalProperties: false |
| 53 | 62 | |
| @@ -60,7 +60,6 @@ examples: · 59 unmodified lines | ||
| 60 | 60 | pmic { |
| 61 | 61 | #address-cells = <1>; |
| 62 | 62 | #size-cells = <0>; |
| 63 | − #interrupt-cells = <4>; | |
| 64 | 63 | |
| 65 | 64 | charger@1000 { |
| 66 | 65 | compatible = "qcom,pmi8998-charger"; |
| @@ -27,6 +27,11 @@ properties: · 26 unmodified lines | ||
| 27 | 27 | battery-detect-gpios: |
| 28 | 28 | maxItems: 1 |
| 29 | 29 | |
| 30 | + bat-detect-gpio: | |
| 31 | + maxItems: 1 | |
| 32 | + deprecated: true | |
| 33 | + description: use battery-detect-gpios instead | |
| 34 | + | |
| 30 | 35 | interrupts: |
| 31 | 36 | maxItems: 1 |
| 32 | 37 | |
| @@ -0,0 +1,48 @@ | ||
| 1 | +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause | |
| 2 | +%YAML 1.2 | |
| 3 | +--- | |
| 4 | +$id: http://devicetree.org/schemas/power/supply/ti,twl6030-charger.yaml# | |
| 5 | +$schema: http://devicetree.org/meta-schemas/core.yaml# | |
| 6 | + | |
| 7 | +title: TWL6030/32 BCI (Battery Charger Interface) | |
| 8 | + | |
| 9 | +description: | |
| 10 | + The battery charger needs to be configured to do any charging besides of | |
| 11 | + precharging. The GPADC in the PMIC has to be used to get the related | |
| 12 | + voltages. | |
| 13 | + | |
| 14 | +maintainers: | |
| 15 | + - Andreas Kemnade <andreas@kemnade.info> | |
| 16 | + | |
| 17 | +allOf: | |
| 18 | + - $ref: power-supply.yaml# | |
| 19 | + | |
| 20 | +properties: | |
| 21 | + compatible: | |
| 22 | + oneOf: | |
| 23 | + - const: ti,twl6030-charger | |
| 24 | + - items: | |
| 25 | + - const: ti,twl6032-charger | |
| 26 | + - const: ti,twl6030-charger | |
| 27 | + | |
| 28 | + interrupts: | |
| 29 | + items: | |
| 30 | + - description: Charger Control Interrupt | |
| 31 | + - description: Charger Fault Interrupt | |
| 32 | + | |
| 33 | + io-channels: | |
| 34 | + items: | |
| 35 | + - description: VBUS Voltage Channel | |
| 36 | + | |
| 37 | + io-channel-names: | |
| 38 | + items: | |
| 39 | + - const: vusb | |
| 40 | + | |
| 41 | + monitored-battery: true | |
| 42 | + | |
| 43 | +required: | |
| 44 | + - compatible | |
| 45 | + - interrupts | |
| 46 | + - monitored-battery | |
| 47 | + | |
| 48 | +additionalProperties: false | |
| @@ -0,0 +1,34 @@ | ||
| 1 | +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) | |
| 2 | +%YAML 1.2 | |
| 3 | +--- | |
| 4 | +$id: http://devicetree.org/schemas/pwm/airoha,en7581-pwm.yaml# | |
| 5 | +$schema: http://devicetree.org/meta-schemas/core.yaml# | |
| 6 | + | |
| 7 | +title: Airoha EN7581 PWM Controller | |
| 8 | + | |
| 9 | +maintainers: | |
| 10 | + - Lorenzo Bianconi <lorenzo@kernel.org> | |
| 11 | + | |
| 12 | +allOf: | |
| 13 | + - $ref: pwm.yaml# | |
| 14 | + | |
| 15 | +properties: | |
| 16 | + compatible: | |
| 17 | + const: airoha,en7581-pwm | |
| 18 | + | |
| 19 | + "#pwm-cells": | |
| 20 | + const: 3 | |
| 21 | + | |
| 22 | +required: | |
| 23 | + - compatible | |
| 24 | + - "#pwm-cells" | |
| 25 | + | |
| 26 | +additionalProperties: false | |
| 27 | + | |
| 28 | +examples: | |
| 29 | + - | | |
| 30 | + pwm { | |
| 31 | + compatible = "airoha,en7581-pwm"; | |
| 32 | + | |
| 33 | + #pwm-cells = <3>; | |
| 34 | + }; | |
| @@ -16,7 +16,12 @@ description: · 15 unmodified lines | ||
| 16 | 16 | |
| 17 | 17 | properties: |
| 18 | 18 | compatible: |
| 19 | − const: qcom,pmi8998-lab-ibb | |
| 19 | + oneOf: | |
| 20 | + - const: qcom,pmi8998-lab-ibb | |
| 21 | + - items: | |
| 22 | + - enum: | |
| 23 | + - qcom,pmi8950-lab-ibb | |
| 24 | + - const: qcom,pmi8998-lab-ibb | |
| 20 | 25 | |
| 21 | 26 | lab: |
| 22 | 27 | type: object |
| @@ -16,6 +16,7 @@ description: · 15 unmodified lines | ||
| 16 | 16 | properties: |
| 17 | 17 | compatible: |
| 18 | 18 | enum: |
| 19 | + - qcom,sar2130p-adsp-pas | |
| 19 | 20 | - qcom,sm8350-adsp-pas |
| 20 | 21 | - qcom,sm8350-cdsp-pas |
| 21 | 22 | - qcom,sm8350-slpi-pas |
| @@ -61,6 +62,7 @@ allOf: · 39 unmodified lines | ||
| 61 | 62 | properties: |
| 62 | 63 | compatible: |
| 63 | 64 | enum: |
| 65 | + - qcom,sar2130p-adsp-pas | |
| 64 | 66 | - qcom,sm8350-adsp-pas |
| 65 | 67 | - qcom,sm8350-cdsp-pas |
| 66 | 68 | - qcom,sm8350-slpi-pas |
| @@ -101,6 +103,7 @@ allOf: · 34 unmodified lines | ||
| 101 | 103 | properties: |
| 102 | 104 | compatible: |
| 103 | 105 | enum: |
| 106 | + - qcom,sar2130p-adsp-pas | |
| 104 | 107 | - qcom,sm8350-adsp-pas |
| 105 | 108 | - qcom,sm8350-slpi-pas |
| 106 | 109 | - qcom,sm8450-adsp-pas |
| @@ -15,16 +15,20 @@ description: · 14 unmodified lines | ||
| 15 | 15 | |
| 16 | 16 | properties: |
| 17 | 17 | compatible: |
| 18 | − enum: | |
| 19 | − - qcom,sdx75-mpss-pas | |
| 20 | − - qcom,sm8550-adsp-pas | |
| 21 | − - qcom,sm8550-cdsp-pas | |
| 22 | − - qcom,sm8550-mpss-pas | |
| 23 | − - qcom,sm8650-adsp-pas | |
| 24 | − - qcom,sm8650-cdsp-pas | |
| 25 | − - qcom,sm8650-mpss-pas | |
| 26 | − - qcom,x1e80100-adsp-pas | |
| 27 | − - qcom,x1e80100-cdsp-pas | |
| 18 | + oneOf: | |
| 19 | + - enum: | |
| 20 | + - qcom,sdx75-mpss-pas | |
| 21 | + - qcom,sm8550-adsp-pas | |
| 22 | + - qcom,sm8550-cdsp-pas | |
| 23 | + - qcom,sm8550-mpss-pas | |
| 24 | + - qcom,sm8650-adsp-pas | |
| 25 | + - qcom,sm8650-cdsp-pas | |
| 26 | + - qcom,sm8650-mpss-pas | |
| 27 | + - qcom,x1e80100-adsp-pas | |
| 28 | + - qcom,x1e80100-cdsp-pas | |
| 29 | + - items: | |
| 30 | + - const: qcom,sm8750-adsp-pas | |
| 31 | + - const: qcom,sm8550-adsp-pas | |
| 28 | 32 | |
| 29 | 33 | reg: |
| 30 | 34 | maxItems: 1 |
| @@ -82,6 +86,20 @@ allOf: · 51 unmodified lines | ||
| 82 | 86 | maxItems: 5 |
| 83 | 87 | memory-region: |
| 84 | 88 | maxItems: 2 |
| 89 | + - if: | |
| 90 | + properties: | |
| 91 | + compatible: | |
| 92 | + contains: | |
| 93 | + enum: | |
| 94 | + - qcom,sm8750-adsp-pas | |
| 95 | + then: | |
| 96 | + properties: | |
| 97 | + interrupts: | |
| 98 | + maxItems: 6 | |
| 99 | + interrupt-names: | |
| 100 | + maxItems: 6 | |
| 101 | + memory-region: | |
| 102 | + maxItems: 2 | |
| 85 | 103 | - if: |
| 86 | 104 | properties: |
| 87 | 105 | compatible: |
| @@ -129,10 +147,12 @@ allOf: · 41 unmodified lines | ||
| 129 | 147 | - if: |
| 130 | 148 | properties: |
| 131 | 149 | compatible: |
| 132 | − enum: | |
| 133 | − - qcom,sm8550-adsp-pas | |
| 134 | − - qcom,sm8650-adsp-pas | |
| 135 | − - qcom,x1e80100-adsp-pas | |
| 150 | + contains: | |
| 151 | + enum: | |
| 152 | + - qcom,sm8550-adsp-pas | |
| 153 | + - qcom,sm8650-adsp-pas | |
| 154 | + - qcom,sm8750-adsp-pas | |
| 155 | + - qcom,x1e80100-adsp-pas | |
| 136 | 156 | then: |
| 137 | 157 | properties: |
| 138 | 158 | power-domains: |
| @@ -128,6 +128,18 @@ properties: · 127 unmodified lines | ||
| 128 | 128 | changes to interrupts as frozen at commit ccbddab ("Merge pull |
| 129 | 129 | request #42 from riscv/jhauser-2023-RC4") of riscv-aia. |
| 130 | 130 | |
| 131 | + - const: smmpm | |
| 132 | + description: | | |
| 133 | + The standard Smmpm extension for M-mode pointer masking as | |
| 134 | + ratified at commit d70011dde6c2 ("Update to ratified state") | |
| 135 | + of riscv-j-extension. | |
| 136 | + | |
| 137 | + - const: smnpm | |
| 138 | + description: | | |
| 139 | + The standard Smnpm extension for next-mode pointer masking as | |
| 140 | + ratified at commit d70011dde6c2 ("Update to ratified state") | |
| 141 | + of riscv-j-extension. | |
| 142 | + | |
| 131 | 143 | - const: smstateen |
| 132 | 144 | description: | |
| 133 | 145 | The standard Smstateen extension for controlling access to CSRs |
| @@ -147,12 +159,46 @@ properties: · 13 unmodified lines | ||
| 147 | 159 | and mode-based filtering as ratified at commit 01d1df0 ("Add ability |
| 148 | 160 | to manually trigger workflow. (#2)") of riscv-count-overflow. |
| 149 | 161 | |
| 162 | + - const: ssnpm | |
| 163 | + description: | | |
| 164 | + The standard Ssnpm extension for next-mode pointer masking as | |
| 165 | + ratified at commit d70011dde6c2 ("Update to ratified state") | |
| 166 | + of riscv-j-extension. | |
| 167 | + | |
| 150 | 168 | - const: sstc |
| 151 | 169 | description: | |
| 152 | 170 | The standard Sstc supervisor-level extension for time compare as |
| 153 | 171 | ratified at commit 3f9ed34 ("Add ability to manually trigger |
| 154 | 172 | workflow. (#2)") of riscv-time-compare. |
| 155 | 173 | |
| 174 | + - const: svade | |
| 175 | + description: | | |
| 176 | + The standard Svade supervisor-level extension for SW-managed PTE A/D | |
| 177 | + bit updates as ratified in the 20240213 version of the privileged | |
| 178 | + ISA specification. | |
| 179 | + | |
| 180 | + Both Svade and Svadu extensions control the hardware behavior when | |
| 181 | + the PTE A/D bits need to be set. The default behavior for the four | |
| 182 | + possible combinations of these extensions in the device tree are: | |
| 183 | + 1) Neither Svade nor Svadu present in DT => It is technically | |
| 184 | + unknown whether the platform uses Svade or Svadu. Supervisor | |
| 185 | + software should be prepared to handle either hardware updating | |
| 186 | + of the PTE A/D bits or page faults when they need updated. | |
| 187 | + 2) Only Svade present in DT => Supervisor must assume Svade to be | |
| 188 | + always enabled. | |
| 189 | + 3) Only Svadu present in DT => Supervisor must assume Svadu to be | |
| 190 | + always enabled. | |
| 191 | + 4) Both Svade and Svadu present in DT => Supervisor must assume | |
| 192 | + Svadu turned-off at boot time. To use Svadu, supervisor must | |
| 193 | + explicitly enable it using the SBI FWFT extension. | |
| 194 | + | |
| 195 | + - const: svadu | |
| 196 | + description: | | |
| 197 | + The standard Svadu supervisor-level extension for hardware updating | |
| 198 | + of PTE A/D bits as ratified in the 20240528 version of the | |
| 199 | + privileged ISA specification. Please refer to Svade dt-binding | |
| 200 | + description for more details. | |
| 201 | + | |
| 156 | 202 | - const: svinval |
| 157 | 203 | description: |
| 158 | 204 | The standard Svinval supervisor-level extension for fine-grained |
| @@ -178,6 +224,12 @@ properties: · 19 unmodified lines | ||
| 178 | 224 | as ratified at commit 4a69197e5617 ("Update to ratified state") of |
| 179 | 225 | riscv-svvptc. |
| 180 | 226 | |
| 227 | + - const: zabha | |
| 228 | + description: | | |
| 229 | + The Zabha extension for Byte and Halfword Atomic Memory Operations | |
| 230 | + as ratified at commit 49f49c842ff9 ("Update to Rafified state") of | |
| 231 | + riscv-zabha. | |
| 232 | + | |
| 181 | 233 | - const: zacas |
| 182 | 234 | description: | |
| 183 | 235 | The Zacas extension for Atomic Compare-and-Swap (CAS) instructions |
| @@ -290,6 +342,12 @@ properties: · 106 unmodified lines | ||
| 290 | 342 | in commit 64074bc ("Update version numbers for Zfh/Zfinx") of |
| 291 | 343 | riscv-isa-manual. |
| 292 | 344 | |
| 345 | + - const: ziccrse | |
| 346 | + description: | |
| 347 | + The standard Ziccrse extension which provides forward progress | |
| 348 | + guarantee on LR/SC sequences, as ratified in commit b1d806605f87 | |
| 349 | + ("Updated to ratified state.") of the riscv profiles specification. | |
| 350 | + | |
| 293 | 351 | - const: zk |
| 294 | 352 | description: |
| 295 | 353 | The standard Zk Standard Scalar cryptography extension as ratified |
| @@ -30,7 +30,9 @@ properties: · 29 unmodified lines | ||
| 30 | 30 | - const: allwinner,sun50i-a64-rtc |
| 31 | 31 | - const: allwinner,sun8i-h3-rtc |
| 32 | 32 | - items: |
| 33 | − - const: allwinner,sun20i-d1-rtc | |
| 33 | + - enum: | |
| 34 | + - allwinner,sun20i-d1-rtc | |
| 35 | + - allwinner,sun55i-a523-rtc | |
| 34 | 36 | - const: allwinner,sun50i-r329-rtc |
| 35 | 37 | |
| 36 | 38 | reg: |
| @@ -0,0 +1,63 @@ | ||
| 1 | +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) | |
| 2 | +# Copyright (C) 2024 Amlogic, Inc. All rights reserved | |
| 3 | +%YAML 1.2 | |
| 4 | +--- | |
| 5 | +$id: http://devicetree.org/schemas/rtc/amlogic,a4-rtc.yaml# | |
| 6 | +$schema: http://devicetree.org/meta-schemas/core.yaml# | |
| 7 | + | |
| 8 | +title: Amlogic A4 and A5 RTC | |
| 9 | + | |
| 10 | +maintainers: | |
| 11 | + - Yiting Deng <yiting.deng@amlogic.com> | |
| 12 | + - Xianwei Zhao <xianwei.zhao@amlogic.com> | |
| 13 | + | |
| 14 | +allOf: | |
| 15 | + - $ref: rtc.yaml# | |
| 16 | + | |
| 17 | +properties: | |
| 18 | + compatible: | |
| 19 | + enum: | |
| 20 | + - amlogic,a4-rtc | |
| 21 | + - amlogic,a5-rtc | |
| 22 | + | |
| 23 | + reg: | |
| 24 | + maxItems: 1 | |
| 25 | + | |
| 26 | + clocks: | |
| 27 | + items: | |
| 28 | + - description: RTC clock source, available 24M or 32K crystal | |
| 29 | + oscillator source. when using 24M, need to divide 24M into 32K. | |
| 30 | + - description: RTC module accesses the clock of the apb bus. | |
| 31 | + | |
| 32 | + clock-names: | |
| 33 | + items: | |
| 34 | + - const: osc | |
| 35 | + - const: sys | |
| 36 | + | |
| 37 | + interrupts: | |
| 38 | + maxItems: 1 | |
| 39 | + | |
| 40 | +required: | |
| 41 | + - compatible | |
| 42 | + - reg | |
| 43 | + - clocks | |
| 44 | + - clock-names | |
| 45 | + - interrupts | |
| 46 | + | |
| 47 | +additionalProperties: false | |
| 48 | + | |
| 49 | +examples: | |
| 50 | + - | | |
| 51 | + #include <dt-bindings/interrupt-controller/arm-gic.h> | |
| 52 | + apb { | |
| 53 | + #address-cells = <2>; | |
| 54 | + #size-cells = <2>; | |
| 55 | + | |
| 56 | + rtc@8e600 { | |
| 57 | + compatible = "amlogic,a4-rtc"; | |
| 58 | + reg = <0x0 0x8e600 0x0 0x38>; | |
| 59 | + clocks = <&xtal_32k>, <&clkc_periphs 1>; | |
| 60 | + clock-names = "osc", "sys"; | |
| 61 | + interrupts = <GIC_SPI 131 IRQ_TYPE_EDGE_RISING>; | |
| 62 | + }; | |
| 63 | + }; | |
| @@ -1,7 +1,7 @@ | ||
| 1 | 1 | # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) |
| 2 | 2 | %YAML 1.2 |
| 3 | 3 | --- |
| 4 | −$id: http://devicetree.org/schemas/rtc/microchip,mfps-rtc.yaml# | |
| 4 | +$id: http://devicetree.org/schemas/rtc/microchip,mpfs-rtc.yaml# | |
| 5 | 5 | |
| 6 | 6 | $schema: http://devicetree.org/meta-schemas/core.yaml# |
| 7 | 7 | |
| @@ -12,12 +12,14 @@ allOf: · 4 unmodified lines | ||
| 12 | 12 | |
| 13 | 13 | maintainers: |
| 14 | 14 | - Daire McNamara <daire.mcnamara@microchip.com> |
| 15 | − - Lewis Hanly <lewis.hanly@microchip.com> | |
| 16 | 15 | |
| 17 | 16 | properties: |
| 18 | 17 | compatible: |
| 19 | − enum: | |
| 20 | − - microchip,mpfs-rtc | |
| 18 | + oneOf: | |
| 19 | + - items: | |
| 20 | + - const: microchip,pic64gx-rtc | |
| 21 | + - const: microchip,mpfs-rtc | |
| 22 | + - const: microchip,mpfs-rtc | |
| 21 | 23 | |
| 22 | 24 | reg: |
| 23 | 25 | maxItems: 1 |
| @@ -0,0 +1,84 @@ | ||
| 1 | +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) | |
| 2 | +%YAML 1.2 | |
| 3 | +--- | |
| 4 | +$id: http://devicetree.org/schemas/rtc/renesas,rz-rtca3.yaml# | |
| 5 | +$schema: http://devicetree.org/meta-schemas/core.yaml# | |
| 6 | + | |
| 7 | +title: Renesas RTCA-3 Real Time Clock | |
| 8 | + | |
| 9 | +maintainers: | |
| 10 | + - Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> | |
| 11 | + | |
| 12 | +allOf: | |
| 13 | + - $ref: rtc.yaml# | |
| 14 | + | |
| 15 | +properties: | |
| 16 | + compatible: | |
| 17 | + items: | |
| 18 | + - enum: | |
| 19 | + - renesas,r9a08g045-rtca3 # RZ/G3S | |
| 20 | + - const: renesas,rz-rtca3 | |
| 21 | + | |
| 22 | + reg: | |
| 23 | + maxItems: 1 | |
| 24 | + | |
| 25 | + interrupts: | |
| 26 | + items: | |
| 27 | + - description: Alarm interrupt | |
| 28 | + - description: Periodic interrupt | |
| 29 | + - description: Carry interrupt | |
| 30 | + | |
| 31 | + interrupt-names: | |
| 32 | + items: | |
| 33 | + - const: alarm | |
| 34 | + - const: period | |
| 35 | + - const: carry | |
| 36 | + | |
| 37 | + clocks: | |
| 38 | + items: | |
| 39 | + - description: RTC bus clock | |
| 40 | + - description: RTC counter clock | |
| 41 | + | |
| 42 | + clock-names: | |
| 43 | + items: | |
| 44 | + - const: bus | |
| 45 | + - const: counter | |
| 46 | + | |
| 47 | + power-domains: | |
| 48 | + maxItems: 1 | |
| 49 | + | |
| 50 | + resets: | |
| 51 | + items: | |
| 52 | + - description: VBATTB module reset | |
| 53 | + | |
| 54 | +required: | |
| 55 | + - compatible | |
| 56 | + - reg | |
| 57 | + - interrupts | |
| 58 | + - interrupt-names | |
| 59 | + - clocks | |
| 60 | + - clock-names | |
| 61 | + - power-domains | |
| 62 | + - resets | |
| 63 | + | |
| 64 | +additionalProperties: false | |
| 65 | + | |
| 66 | +examples: | |
| 67 | + - | | |
| 68 | + #include <dt-bindings/clock/r9a08g045-cpg.h> | |
| 69 | + #include <dt-bindings/clock/renesas,r9a08g045-vbattb.h> | |
| 70 | + #include <dt-bindings/interrupt-controller/arm-gic.h> | |
| 71 | + #include <dt-bindings/interrupt-controller/irq.h> | |
| 72 | + | |
| 73 | + rtc@1004ec00 { | |
| 74 | + compatible = "renesas,r9a08g045-rtca3", "renesas,rz-rtca3"; | |
| 75 | + reg = <0x1004ec00 0x400>; | |
| 76 | + interrupts = <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>, | |
| 77 | + <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>, | |
| 78 | + <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>; | |
| 79 | + interrupt-names = "alarm", "period", "carry"; | |
| 80 | + clocks = <&cpg CPG_MOD R9A08G045_VBAT_BCLK>, <&vbattclk VBATTB_VBATTCLK>; | |
| 81 | + clock-names = "bus", "counter"; | |
| 82 | + power-domains = <&cpg>; | |
| 83 | + resets = <&cpg R9A08G045_VBAT_BRESETN>; | |
| 84 | + }; | |
| @@ -18,16 +18,15 @@ properties: · 17 unmodified lines | ||
| 18 | 18 | description: prop-encoded-array <a b> |
| 19 | 19 | $ref: /schemas/types.yaml#/definitions/uint32-array |
| 20 | 20 | items: |
| 21 | − items: | |
| 22 | − - description: Delay between rts signal and beginning of data sent in | |
| 23 | − milliseconds. It corresponds to the delay before sending data. | |
| 24 | − default: 0 | |
| 25 | − maximum: 100 | |
| 26 | − - description: Delay between end of data sent and rts signal in milliseconds. | |
| 27 | − It corresponds to the delay after sending data and actual release | |
| 28 | − of the line. | |
| 29 | − default: 0 | |
| 30 | − maximum: 100 | |
| 21 | + - description: Delay between rts signal and beginning of data sent in | |
| 22 | + milliseconds. It corresponds to the delay before sending data. | |
| 23 | + default: 0 | |
| 24 | + maximum: 100 | |
| 25 | + - description: Delay between end of data sent and rts signal in milliseconds. | |
| 26 | + It corresponds to the delay after sending data and actual release | |
| 27 | + of the line. | |
| 28 | + default: 0 | |
| 29 | + maximum: 100 | |
| 31 | 30 | |
| 32 | 31 | rs485-rts-active-high: |
| 33 | 32 | description: drive RTS high when sending (this is the default). |
| @@ -27,6 +27,7 @@ properties: · 26 unmodified lines | ||
| 27 | 27 | - samsung,exynos4210-uart |
| 28 | 28 | - samsung,exynos5433-uart |
| 29 | 29 | - samsung,exynos850-uart |
| 30 | + - samsung,exynos8895-uart | |
| 30 | 31 | - items: |
| 31 | 32 | - enum: |
| 32 | 33 | - samsung,exynos7-uart |
| @@ -160,18 +161,27 @@ allOf: · 127 unmodified lines | ||
| 160 | 161 | contains: |
| 161 | 162 | enum: |
| 162 | 163 | - google,gs101-uart |
| 164 | + - samsung,exynos8895-uart | |
| 163 | 165 | then: |
| 164 | 166 | required: |
| 165 | 167 | - samsung,uart-fifosize |
| 166 | 168 | properties: |
| 167 | − reg-io-width: false | |
| 168 | − | |
| 169 | 169 | clocks: |
| 170 | 170 | maxItems: 2 |
| 171 | 171 | |
| 172 | 172 | clock-names: |
| 173 | 173 | maxItems: 2 |
| 174 | 174 | |
| 175 | + - if: | |
| 176 | + properties: | |
| 177 | + compatible: | |
| 178 | + contains: | |
| 179 | + enum: | |
| 180 | + - google,gs101-uart | |
| 181 | + then: | |
| 182 | + properties: | |
| 183 | + reg-io-width: false | |
| 184 | + | |
| 175 | 185 | unevaluatedProperties: false |
| 176 | 186 | |
| 177 | 187 | examples: |
| @@ -37,6 +37,8 @@ properties: · 36 unmodified lines | ||
| 37 | 37 | - const: renesas,rzn1-uart |
| 38 | 38 | - items: |
| 39 | 39 | - enum: |
| 40 | + - brcm,bcm11351-dw-apb-uart | |
| 41 | + - brcm,bcm21664-dw-apb-uart | |
| 40 | 42 | - rockchip,px30-uart |
| 41 | 43 | - rockchip,rk1808-uart |
| 42 | 44 | - rockchip,rk3036-uart |
| @@ -48,18 +50,13 @@ properties: · 5 unmodified lines | ||
| 48 | 50 | - rockchip,rk3328-uart |
| 49 | 51 | - rockchip,rk3368-uart |
| 50 | 52 | - rockchip,rk3399-uart |
| 53 | + - rockchip,rk3528-uart | |
| 51 | 54 | - rockchip,rk3568-uart |
| 55 | + - rockchip,rk3576-uart | |
| 52 | 56 | - rockchip,rk3588-uart |
| 53 | 57 | - rockchip,rv1108-uart |
| 54 | 58 | - rockchip,rv1126-uart |
| 55 | − - const: snps,dw-apb-uart | |
| 56 | − - items: | |
| 57 | − - enum: | |
| 58 | − - brcm,bcm11351-dw-apb-uart | |
| 59 | − - brcm,bcm21664-dw-apb-uart | |
| 60 | − - const: snps,dw-apb-uart | |
| 61 | − - items: | |
| 62 | − - enum: | |
| 59 | + - sophgo,sg2044-uart | |
| 63 | 60 | - starfive,jh7100-hsuart |
| 64 | 61 | - starfive,jh7100-uart |
| 65 | 62 | - starfive,jh7110-uart |
| @@ -17,6 +17,7 @@ properties: · 16 unmodified lines | ||
| 17 | 17 | oneOf: |
| 18 | 18 | - items: |
| 19 | 19 | - enum: |
| 20 | + - sprd,sc9632-uart | |
| 20 | 21 | - sprd,sc9860-uart |
| 21 | 22 | - sprd,sc9863a-uart |
| 22 | 23 | - sprd,ums512-uart |
| @@ -25,6 +25,7 @@ properties: · 24 unmodified lines | ||
| 25 | 25 | - items: |
| 26 | 26 | - enum: |
| 27 | 27 | - mediatek,mt8186-spmi |
| 28 | + - mediatek,mt8188-spmi | |
| 28 | 29 | - const: mediatek,mt8195-spmi |
| 29 | 30 | |
| 30 | 31 | reg: |
| @@ -19,7 +19,11 @@ description: | · 18 unmodified lines | ||
| 19 | 19 | |
| 20 | 20 | properties: |
| 21 | 21 | compatible: |
| 22 | − const: qcom,x1e80100-spmi-pmic-arb | |
| 22 | + oneOf: | |
| 23 | + - items: | |
| 24 | + - const: qcom,sar2130p-spmi-pmic-arb | |
| 25 | + - const: qcom,x1e80100-spmi-pmic-arb | |
| 26 | + - const: qcom,x1e80100-spmi-pmic-arb | |
| 23 | 27 | |
| 24 | 28 | reg: |
| 25 | 29 | items: |
| @@ -26,6 +26,7 @@ properties: · 25 unmodified lines | ||
| 26 | 26 | - qcom,msm8994-ufshc |
| 27 | 27 | - qcom,msm8996-ufshc |
| 28 | 28 | - qcom,msm8998-ufshc |
| 29 | + - qcom,qcs8300-ufshc | |
| 29 | 30 | - qcom,sa8775p-ufshc |
| 30 | 31 | - qcom,sc7180-ufshc |
| 31 | 32 | - qcom,sc7280-ufshc |
| @@ -146,6 +147,7 @@ allOf: · 114 unmodified lines | ||
| 146 | 147 | contains: |
| 147 | 148 | enum: |
| 148 | 149 | - qcom,msm8998-ufshc |
| 150 | + - qcom,qcs8300-ufshc | |
| 149 | 151 | - qcom,sa8775p-ufshc |
| 150 | 152 | - qcom,sc7280-ufshc |
| 151 | 153 | - qcom,sc8180x-ufshc |
| @@ -25,6 +25,7 @@ properties: · 24 unmodified lines | ||
| 25 | 25 | - allwinner,sun20i-d1-musb |
| 26 | 26 | - allwinner,sun50i-a100-musb |
| 27 | 27 | - allwinner,sun50i-h6-musb |
| 28 | + - allwinner,sun55i-a523-musb | |
| 28 | 29 | - const: allwinner,sun8i-a33-musb |
| 29 | 30 | - items: |
| 30 | 31 | - const: allwinner,sun50i-h616-musb |
| @@ -61,18 +61,15 @@ additionalProperties: false · 60 unmodified lines | ||
| 61 | 61 | |
| 62 | 62 | examples: |
| 63 | 63 | - | |
| 64 | − #include <dt-bindings/gpio/tegra194-gpio.h> | |
| 65 | 64 | #include <dt-bindings/interrupt-controller/arm-gic.h> |
| 66 | 65 | i2c { |
| 67 | 66 | #address-cells = <1>; |
| 68 | 67 | #size-cells = <0>; |
| 69 | − #interrupt-cells = <2>; | |
| 70 | 68 | |
| 71 | 69 | typec@8 { |
| 72 | 70 | compatible = "cypress,cypd4226"; |
| 73 | 71 | reg = <0x08>; |
| 74 | − interrupt-parent = <&gpio_aon>; | |
| 75 | − interrupts = <TEGRA194_AON_GPIO(BB, 2) IRQ_TYPE_LEVEL_LOW>; | |
| 72 | + interrupts = <2 IRQ_TYPE_LEVEL_LOW>; | |
| 76 | 73 | firmware-name = "nvidia,jetson-agx-xavier"; |
| 77 | 74 | #address-cells = <1>; |
| 78 | 75 | #size-cells = <0>; |
| @@ -12,7 +12,11 @@ maintainers: · 11 unmodified lines | ||
| 12 | 12 | |
| 13 | 13 | properties: |
| 14 | 14 | compatible: |
| 15 | − const: fsl,imx8mp-dwc3 | |
| 15 | + oneOf: | |
| 16 | + - items: | |
| 17 | + - const: fsl,imx95-dwc3 | |
| 18 | + - const: fsl,imx8mp-dwc3 | |
| 19 | + - const: fsl,imx8mp-dwc3 | |
| 16 | 20 | |
| 17 | 21 | reg: |
| 18 | 22 | items: |
| @@ -32,6 +32,7 @@ properties: · 31 unmodified lines | ||
| 32 | 32 | - allwinner,sun50i-a64-ehci |
| 33 | 33 | - allwinner,sun50i-h6-ehci |
| 34 | 34 | - allwinner,sun50i-h616-ehci |
| 35 | + - allwinner,sun55i-a523-ehci | |
| 35 | 36 | - allwinner,sun5i-a13-ehci |
| 36 | 37 | - allwinner,sun6i-a31-ehci |
| 37 | 38 | - allwinner,sun7i-a20-ehci |
| @@ -19,6 +19,7 @@ properties: · 18 unmodified lines | ||
| 19 | 19 | - allwinner,sun50i-a64-ohci |
| 20 | 20 | - allwinner,sun50i-h6-ohci |
| 21 | 21 | - allwinner,sun50i-h616-ohci |
| 22 | + - allwinner,sun55i-a523-ohci | |
| 22 | 23 | - allwinner,sun5i-a13-ohci |
| 23 | 24 | - allwinner,sun6i-a31-ohci |
| 24 | 25 | - allwinner,sun7i-a20-ohci |
| @@ -62,7 +62,14 @@ allOf: · 61 unmodified lines | ||
| 62 | 62 | peer-hub: true |
| 63 | 63 | vdd-supply: true |
| 64 | 64 | |
| 65 | −additionalProperties: false | |
| 65 | +patternProperties: | |
| 66 | + "^.*@[0-9a-f]{1,2}$": | |
| 67 | + description: The hard wired USB devices | |
| 68 | + type: object | |
| 69 | + $ref: /schemas/usb/usb-device.yaml | |
| 70 | + additionalProperties: true | |
| 71 | + | |
| 72 | +unevaluatedProperties: false | |
| 66 | 73 | |
| 67 | 74 | examples: |
| 68 | 75 | - | |
| @@ -69,6 +69,7 @@ examples: · 68 unmodified lines | ||
| 69 | 69 | PDO_FIXED_DATA_SWAP | |
| 70 | 70 | PDO_FIXED_DUAL_ROLE) |
| 71 | 71 | PDO_FIXED(9000, 2000, 0)>; |
| 72 | + sink-bc12-completion-time-ms = <500>; | |
| 72 | 73 | }; |
| 73 | 74 | }; |
| 74 | 75 | }; |
| @@ -14,8 +14,11 @@ maintainers: · 13 unmodified lines | ||
| 14 | 14 | |
| 15 | 15 | properties: |
| 16 | 16 | compatible: |
| 17 | − enum: | |
| 18 | − - microchip,mpfs-musb | |
| 17 | + oneOf: | |
| 18 | + - items: | |
| 19 | + - const: microchip,pic64gx-musb | |
| 20 | + - const: microchip,mpfs-musb | |
| 21 | + - const: microchip,mpfs-musb | |
| 19 | 22 | |
| 20 | 23 | dr_mode: true |
| 21 | 24 | |
| @@ -26,8 +26,10 @@ properties: · 25 unmodified lines | ||
| 26 | 26 | - qcom,msm8998-dwc3 |
| 27 | 27 | - qcom,qcm2290-dwc3 |
| 28 | 28 | - qcom,qcs404-dwc3 |
| 29 | + - qcom,qcs8300-dwc3 | |
| 29 | 30 | - qcom,qdu1000-dwc3 |
| 30 | 31 | - qcom,sa8775p-dwc3 |
| 32 | + - qcom,sar2130p-dwc3 | |
| 31 | 33 | - qcom,sc7180-dwc3 |
| 32 | 34 | - qcom,sc7280-dwc3 |
| 33 | 35 | - qcom,sc8180x-dwc3 |
| @@ -201,6 +203,7 @@ allOf: · 167 unmodified lines | ||
| 201 | 203 | - qcom,msm8953-dwc3 |
| 202 | 204 | - qcom,msm8996-dwc3 |
| 203 | 205 | - qcom,msm8998-dwc3 |
| 206 | + - qcom,qcs8300-dwc3 | |
| 204 | 207 | - qcom,sa8775p-dwc3 |
| 205 | 208 | - qcom,sc7180-dwc3 |
| 206 | 209 | - qcom,sc7280-dwc3 |
| @@ -338,6 +341,7 @@ allOf: · 131 unmodified lines | ||
| 338 | 341 | contains: |
| 339 | 342 | enum: |
| 340 | 343 | - qcom,qcm2290-dwc3 |
| 344 | + - qcom,sar2130p-dwc3 | |
| 341 | 345 | - qcom,sc8180x-dwc3 |
| 342 | 346 | - qcom,sc8180x-dwc3-mp |
| 343 | 347 | - qcom,sm6115-dwc3 |
| @@ -465,6 +469,7 @@ allOf: · 121 unmodified lines | ||
| 465 | 469 | - qcom,ipq4019-dwc3 |
| 466 | 470 | - qcom,ipq8064-dwc3 |
| 467 | 471 | - qcom,msm8994-dwc3 |
| 472 | + - qcom,qcs8300-dwc3 | |
| 468 | 473 | - qcom,qdu1000-dwc3 |
| 469 | 474 | - qcom,sa8775p-dwc3 |
| 470 | 475 | - qcom,sc7180-dwc3 |
| @@ -490,6 +495,7 @@ allOf: · 19 unmodified lines | ||
| 490 | 495 | minItems: 4 |
| 491 | 496 | maxItems: 5 |
| 492 | 497 | interrupt-names: |
| 498 | + minItems: 4 | |
| 493 | 499 | items: |
| 494 | 500 | - const: pwr_event |
| 495 | 501 | - const: hs_phy_irq |
| @@ -76,6 +76,10 @@ properties: · 75 unmodified lines | ||
| 76 | 76 | Integer to use BUSWAIT register. |
| 77 | 77 | |
| 78 | 78 | renesas,enable-gpio: |
| 79 | + deprecated: true | |
| 80 | + maxItems: 1 | |
| 81 | + | |
| 82 | + renesas,enable-gpios: | |
| 79 | 83 | maxItems: 1 |
| 80 | 84 | description: | |
| 81 | 85 | gpio specifier to check GPIO determining if USB function should be |
| @@ -27,6 +27,7 @@ select: · 26 unmodified lines | ||
| 27 | 27 | enum: |
| 28 | 28 | - rockchip,rk3328-dwc3 |
| 29 | 29 | - rockchip,rk3568-dwc3 |
| 30 | + - rockchip,rk3576-dwc3 | |
| 30 | 31 | - rockchip,rk3588-dwc3 |
| 31 | 32 | required: |
| 32 | 33 | - compatible |
| @@ -37,6 +38,7 @@ properties: · 4 unmodified lines | ||
| 37 | 38 | - enum: |
| 38 | 39 | - rockchip,rk3328-dwc3 |
| 39 | 40 | - rockchip,rk3568-dwc3 |
| 41 | + - rockchip,rk3576-dwc3 | |
| 40 | 42 | - rockchip,rk3588-dwc3 |
| 41 | 43 | - const: snps,dwc3 |
| 42 | 44 | |
| @@ -113,7 +115,9 @@ allOf: · 70 unmodified lines | ||
| 113 | 115 | properties: |
| 114 | 116 | compatible: |
| 115 | 117 | contains: |
| 116 | − const: rockchip,rk3568-dwc3 | |
| 118 | + enum: | |
| 119 | + - rockchip,rk3568-dwc3 | |
| 120 | + - rockchip,rk3576-dwc3 | |
| 117 | 121 | then: |
| 118 | 122 | properties: |
| 119 | 123 | clocks: |
| @@ -0,0 +1,49 @@ | ||
| 1 | +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) | |
| 2 | +%YAML 1.2 | |
| 3 | +--- | |
| 4 | +$id: http://devicetree.org/schemas/usb/ti,tusb1046.yaml# | |
| 5 | +$schema: http://devicetree.org/meta-schemas/core.yaml# | |
| 6 | + | |
| 7 | +title: Texas Instruments TUSB1046-DCI Type-C crosspoint switch | |
| 8 | + | |
| 9 | +maintainers: | |
| 10 | + - Romain Gantois <romain.gantois@bootlin.com> | |
| 11 | + | |
| 12 | +allOf: | |
| 13 | + - $ref: usb-switch.yaml# | |
| 14 | + | |
| 15 | +properties: | |
| 16 | + compatible: | |
| 17 | + const: ti,tusb1046 | |
| 18 | + | |
| 19 | + reg: | |
| 20 | + maxItems: 1 | |
| 21 | + | |
| 22 | +required: | |
| 23 | + - compatible | |
| 24 | + - reg | |
| 25 | + - port | |
| 26 | + | |
| 27 | +unevaluatedProperties: false | |
| 28 | + | |
| 29 | +examples: | |
| 30 | + - | | |
| 31 | + i2c { | |
| 32 | + #address-cells = <1>; | |
| 33 | + #size-cells = <0>; | |
| 34 | + | |
| 35 | + typec-mux@44 { | |
| 36 | + compatible = "ti,tusb1046"; | |
| 37 | + reg = <0x44>; | |
| 38 | + | |
| 39 | + mode-switch; | |
| 40 | + orientation-switch; | |
| 41 | + | |
| 42 | + port { | |
| 43 | + endpoint { | |
| 44 | + remote-endpoint = <&typec_controller>; | |
| 45 | + }; | |
| 46 | + }; | |
| 47 | + }; | |
| 48 | + }; | |
| 49 | +... | |
| @@ -0,0 +1,55 @@ | ||
| 1 | +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) | |
| 2 | +%YAML 1.2 | |
| 3 | +--- | |
| 4 | +$id: http://devicetree.org/schemas/usb/ti,tusb73x0-pci.yaml# | |
| 5 | +$schema: http://devicetree.org/meta-schemas/core.yaml# | |
| 6 | + | |
| 7 | +title: TUSB73x0 USB 3.0 xHCI Host Controller (PCIe) | |
| 8 | + | |
| 9 | +maintainers: | |
| 10 | + - Francesco Dolcini <francesco.dolcini@toradex.com> | |
| 11 | + | |
| 12 | +description: | |
| 13 | + TUSB73x0 USB 3.0 xHCI Host Controller via PCIe x1 Gen2 interface. | |
| 14 | + The TUSB7320 supports up to two downstream ports, the TUSB7340 supports up | |
| 15 | + to four downstream ports, both variants share the same PCI device ID. | |
| 16 | + | |
| 17 | +properties: | |
| 18 | + compatible: | |
| 19 | + const: pci104c,8241 | |
| 20 | + | |
| 21 | + reg: | |
| 22 | + maxItems: 1 | |
| 23 | + | |
| 24 | + ti,pwron-active-high: | |
| 25 | + $ref: /schemas/types.yaml#/definitions/flag | |
| 26 | + description: | |
| 27 | + Configure the polarity of the PWRONx# signals. When this is present, the | |
| 28 | + PWRONx# pins are active high and their internal pull-down resistors are | |
| 29 | + disabled. When this is absent, the PWRONx# pins are active low (default) | |
| 30 | + and their internal pull-down resistors are enabled. | |
| 31 | + | |
| 32 | +required: | |
| 33 | + - compatible | |
| 34 | + - reg | |
| 35 | + | |
| 36 | +allOf: | |
| 37 | + - $ref: usb-xhci.yaml | |
| 38 | + | |
| 39 | +additionalProperties: false | |
| 40 | + | |
| 41 | +examples: | |
| 42 | + - | | |
| 43 | + pcie@0 { | |
| 44 | + reg = <0x0 0x1000>; | |
| 45 | + ranges = <0x02000000 0x0 0x100000 0x10000000 0x0 0x0>; | |
| 46 | + #address-cells = <3>; | |
| 47 | + #size-cells = <2>; | |
| 48 | + device_type = "pci"; | |
| 49 | + | |
| 50 | + usb@0 { | |
| 51 | + compatible = "pci104c,8241"; | |
| 52 | + reg = <0x0 0x0 0x0 0x0 0x0>; | |
| 53 | + ti,pwron-active-high; | |
| 54 | + }; | |
| 55 | + }; | |
| @@ -83,6 +83,8 @@ patternProperties: · 82 unmodified lines | ||
| 83 | 83 | description: ALFA Network Inc. |
| 84 | 84 | "^allegro,.*": |
| 85 | 85 | description: Allegro DVT |
| 86 | + "^allegromicro,.*": | |
| 87 | + description: Allegro MicroSystems, Inc. | |
| 86 | 88 | "^alliedvision,.*": |
| 87 | 89 | description: Allied Vision Technologies GmbH |
| 88 | 90 | "^allo,.*": |
| @@ -565,6 +567,8 @@ patternProperties: · 476 unmodified lines | ||
| 565 | 567 | description: GE Fanuc Intelligent Platforms Embedded Systems, Inc. |
| 566 | 568 | "^GEFanuc,.*": |
| 567 | 569 | description: GE Fanuc Intelligent Platforms Embedded Systems, Inc. |
| 570 | + "^gehc,.*": | |
| 571 | + description: GE HealthCare | |
| 568 | 572 | "^gemei,.*": |
| 569 | 573 | description: Gemei Digital Technology Co., Ltd. |
| 570 | 574 | "^gemtek,.*": |
| @@ -0,0 +1,47 @@ | ||
| 1 | +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) | |
| 2 | +%YAML 1.2 | |
| 3 | +--- | |
| 4 | +$id: http://devicetree.org/schemas/watchdog/airoha,en7581-wdt.yaml# | |
| 5 | +$schema: http://devicetree.org/meta-schemas/core.yaml# | |
| 6 | + | |
| 7 | +title: Airoha EN7581 Watchdog Timer | |
| 8 | + | |
| 9 | +maintainers: | |
| 10 | + - Christian Marangi <ansuelsmth@gmail.com> | |
| 11 | + | |
| 12 | +allOf: | |
| 13 | + - $ref: watchdog.yaml# | |
| 14 | + | |
| 15 | +properties: | |
| 16 | + compatible: | |
| 17 | + const: airoha,en7581-wdt | |
| 18 | + | |
| 19 | + reg: | |
| 20 | + maxItems: 1 | |
| 21 | + | |
| 22 | + clocks: | |
| 23 | + description: BUS clock (timer ticks at half the BUS clock) | |
| 24 | + maxItems: 1 | |
| 25 | + | |
| 26 | + clock-names: | |
| 27 | + const: bus | |
| 28 | + | |
| 29 | +required: | |
| 30 | + - compatible | |
| 31 | + - reg | |
| 32 | + - clocks | |
| 33 | + - clock-names | |
| 34 | + | |
| 35 | +unevaluatedProperties: false | |
| 36 | + | |
| 37 | +examples: | |
| 38 | + - | | |
| 39 | + #include <dt-bindings/clock/en7523-clk.h> | |
| 40 | + | |
| 41 | + watchdog@1fbf0100 { | |
| 42 | + compatible = "airoha,en7581-wdt"; | |
| 43 | + reg = <0x1fbf0100 0x3c>; | |
| 44 | + | |
| 45 | + clocks = <&scuclk EN7523_CLK_BUS>; | |
| 46 | + clock-names = "bus"; | |
| 47 | + }; | |
| @@ -48,6 +48,8 @@ properties: · 47 unmodified lines | ||
| 48 | 48 | clocks: |
| 49 | 49 | maxItems: 1 |
| 50 | 50 | |
| 51 | + big-endian: true | |
| 52 | + | |
| 51 | 53 | fsl,ext-reset-output: |
| 52 | 54 | $ref: /schemas/types.yaml#/definitions/flag |
| 53 | 55 | description: | |
| @@ -93,6 +95,18 @@ allOf: · 39 unmodified lines | ||
| 93 | 95 | properties: |
| 94 | 96 | fsl,suspend-in-wait: false |
| 95 | 97 | |
| 98 | + - if: | |
| 99 | + not: | |
| 100 | + properties: | |
| 101 | + compatible: | |
| 102 | + contains: | |
| 103 | + enum: | |
| 104 | + - fsl,ls1012a-wdt | |
| 105 | + - fsl,ls1043a-wdt | |
| 106 | + then: | |
| 107 | + properties: | |
| 108 | + big-endian: false | |
| 109 | + | |
| 96 | 110 | unevaluatedProperties: false |
| 97 | 111 | |
| 98 | 112 | examples: |
| @@ -26,6 +26,8 @@ properties: · 25 unmodified lines | ||
| 26 | 26 | - qcom,apss-wdt-msm8994 |
| 27 | 27 | - qcom,apss-wdt-qcm2290 |
| 28 | 28 | - qcom,apss-wdt-qcs404 |
| 29 | + - qcom,apss-wdt-qcs615 | |
| 30 | + - qcom,apss-wdt-qcs8300 | |
| 29 | 31 | - qcom,apss-wdt-sa8255p |
| 30 | 32 | - qcom,apss-wdt-sa8775p |
| 31 | 33 | - qcom,apss-wdt-sc7180 |
| @@ -26,6 +26,7 @@ properties: · 25 unmodified lines | ||
| 26 | 26 | - samsung,exynos7-wdt # for Exynos7 |
| 27 | 27 | - samsung,exynos850-wdt # for Exynos850 |
| 28 | 28 | - samsung,exynosautov9-wdt # for Exynosautov9 |
| 29 | + - samsung,exynosautov920-wdt # for Exynosautov920 | |
| 29 | 30 | - items: |
| 30 | 31 | - enum: |
| 31 | 32 | - tesla,fsd-wdt |
| @@ -77,6 +78,7 @@ allOf: · 45 unmodified lines | ||
| 77 | 78 | - samsung,exynos7-wdt |
| 78 | 79 | - samsung,exynos850-wdt |
| 79 | 80 | - samsung,exynosautov9-wdt |
| 81 | + - samsung,exynosautov920-wdt | |
| 80 | 82 | then: |
| 81 | 83 | required: |
| 82 | 84 | - samsung,syscon-phandle |
| @@ -88,6 +90,7 @@ allOf: · 5 unmodified lines | ||
| 88 | 90 | - google,gs101-wdt |
| 89 | 91 | - samsung,exynos850-wdt |
| 90 | 92 | - samsung,exynosautov9-wdt |
| 93 | + - samsung,exynosautov920-wdt | |
| 91 | 94 | then: |
| 92 | 95 | properties: |
| 93 | 96 | clocks: |
| @@ -533,6 +533,7 @@ identifiers: *[ function/type ...]* · 532 unmodified lines | ||
| 533 | 533 | Include documentation for each *function* and *type* in *source*. |
| 534 | 534 | If no *function* is specified, the documentation for all functions |
| 535 | 535 | and types in the *source* will be included. |
| 536 | + *type* can be a struct, union, enum, or typedef identifier. | |
| 536 | 537 | |
| 537 | 538 | Examples:: |
| 538 | 539 | |
| @@ -24,7 +24,6 @@ Auxiliary Device Creation · 23 unmodified lines | ||
| 24 | 24 | |
| 25 | 25 | .. kernel-doc:: drivers/base/auxiliary.c |
| 26 | 26 | :identifiers: auxiliary_device_init __auxiliary_device_add |
| 27 | − auxiliary_find_device | |
| 28 | 27 | |
| 29 | 28 | Auxiliary Device Memory Model and Lifespan |
| 30 | 29 | ------------------------------------------ |
| @@ -394,7 +394,6 @@ PCI · 393 unmodified lines | ||
| 394 | 394 | pcim_enable_device() : after success, some PCI ops become managed |
| 395 | 395 | pcim_iomap() : do iomap() on a single BAR |
| 396 | 396 | pcim_iomap_regions() : do request_region() and iomap() on multiple BARs |
| 397 | − pcim_iomap_regions_request_all() : do request_region() on all and iomap() on multiple BARs | |
| 398 | 397 | pcim_iomap_table() : array of mapped addresses indexed by BAR |
| 399 | 398 | pcim_iounmap() : do iounmap() on a single BAR |
| 400 | 399 | pcim_iounmap_regions() : do iounmap() and release_region() on multiple BARs |
| @@ -459,7 +458,6 @@ SERDEV · 58 unmodified lines | ||
| 459 | 458 | |
| 460 | 459 | SLAVE DMA ENGINE |
| 461 | 460 | devm_acpi_dma_controller_register() |
| 462 | − devm_acpi_dma_controller_free() | |
| 463 | 461 | |
| 464 | 462 | SPI |
| 465 | 463 | devm_spi_alloc_host() |
| @@ -46,6 +46,9 @@ PCI Support Library · 45 unmodified lines | ||
| 46 | 46 | .. kernel-doc:: drivers/pci/pci-sysfs.c |
| 47 | 47 | :internal: |
| 48 | 48 | |
| 49 | +.. kernel-doc:: drivers/pci/tph.c | |
| 50 | + :export: | |
| 51 | + | |
| 49 | 52 | PCI Hotplug Support Library |
| 50 | 53 | --------------------------- |
| 51 | 54 | |
| @@ -11,7 +11,7 @@ Introduction · 10 unmodified lines | ||
| 11 | 11 | ============ |
| 12 | 12 | |
| 13 | 13 | This framework is designed to abstract complex power-up sequences that are |
| 14 | −shared between multiple logical devices in the linux kernel. | |
| 14 | +shared between multiple logical devices in the Linux kernel. | |
| 15 | 15 | |
| 16 | 16 | The intention is to allow consumers to obtain a power sequencing handle |
| 17 | 17 | exposed by the power sequence provider and delegate the actual requesting and |
| @@ -25,7 +25,7 @@ The power sequencing API uses a number of terms specific to the subsystem: · 7 unmodified lines | ||
| 25 | 25 | |
| 26 | 26 | Unit |
| 27 | 27 | |
| 28 | − A unit is a discreet chunk of a power sequence. For instance one unit may | |
| 28 | + A unit is a discrete chunk of a power sequence. For instance one unit may | |
| 29 | 29 | enable a set of regulators, another may enable a specific GPIO. Units can |
| 30 | 30 | define dependencies in the form of other units that must be enabled before |
| 31 | 31 | it itself can be. |
| @@ -62,7 +62,7 @@ Provider interface · 30 unmodified lines | ||
| 62 | 62 | The provider API is admittedly not nearly as straightforward as the one for |
| 63 | 63 | consumers but it makes up for it in flexibility. |
| 64 | 64 | |
| 65 | −Each provider can logically split the power-up sequence into descrete chunks | |
| 65 | +Each provider can logically split the power-up sequence into discrete chunks | |
| 66 | 66 | (units) and define their dependencies. They can then expose named targets that |
| 67 | 67 | consumers may use as the final point in the sequence that they wish to reach. |
| 68 | 68 | |
| @@ -72,7 +72,7 @@ register with the pwrseq subsystem by calling pwrseq_device_register(). · 3 unmodified lines | ||
| 72 | 72 | Dynamic consumer matching |
| 73 | 73 | ------------------------- |
| 74 | 74 | |
| 75 | −The main difference between pwrseq and other linux kernel providers is the | |
| 75 | +The main difference between pwrseq and other Linux kernel providers is the | |
| 76 | 76 | mechanism for dynamic matching of consumers and providers. Every power sequence |
| 77 | 77 | provider driver must implement the `match()` callback and pass it to the pwrseq |
| 78 | 78 | core when registering with the subsystems. |
| @@ -20,7 +20,7 @@ · 19 unmodified lines | ||
| 20 | 20 | | openrisc: | ok | |
| 21 | 21 | | parisc: | TODO | |
| 22 | 22 | | powerpc: | ok | |
| 23 | − | riscv: | TODO | | |
| 23 | + | riscv: | ok | | |
| 24 | 24 | | s390: | TODO | |
| 25 | 25 | | sh: | TODO | |
| 26 | 26 | | sparc: | ok | |
| @@ -442,7 +442,7 @@ which can be used to communicate directly with the autofs filesystem. · 441 unmodified lines | ||
| 442 | 442 | It requires CAP_SYS_ADMIN for access. |
| 443 | 443 | |
| 444 | 444 | The 'ioctl's that can be used on this device are described in a separate |
| 445 | −document `autofs-mount-control.txt`, and are summarised briefly here. | |
| 445 | +document `autofs-mount-control.rst`, and are summarised briefly here. | |
| 446 | 446 | Each ioctl is passed a pointer to an `autofs_dev_ioctl` structure:: |
| 447 | 447 | |
| 448 | 448 | struct autofs_dev_ioctl { |
| @@ -36,7 +36,7 @@ None · 35 unmodified lines | ||
| 36 | 36 | Usage |
| 37 | 37 | ===== |
| 38 | 38 | |
| 39 | −If you're just interested in OCFS2, then please see ocfs2.txt. The | |
| 39 | +If you're just interested in OCFS2, then please see ocfs2.rst. The | |
| 40 | 40 | rest of this document will be geared towards those who want to use |
| 41 | 41 | dlmfs for easy to setup and easy to use clustered locking in |
| 42 | 42 | userspace. |
| @@ -943,3 +943,47 @@ NVMe Zoned Namespace devices · 942 unmodified lines | ||
| 943 | 943 | can start before the zone-capacity and span across zone-capacity boundary. |
| 944 | 944 | Such spanning segments are also considered as usable segments. All blocks |
| 945 | 945 | past the zone-capacity are considered unusable in these segments. |
| 946 | + | |
| 947 | +Device aliasing feature | |
| 948 | +----------------------- | |
| 949 | + | |
| 950 | +f2fs can utilize a special file called a "device aliasing file." This file allows | |
| 951 | +the entire storage device to be mapped with a single, large extent, not using | |
| 952 | +the usual f2fs node structures. This mapped area is pinned and primarily intended | |
| 953 | +for holding the space. | |
| 954 | + | |
| 955 | +Essentially, this mechanism allows a portion of the f2fs area to be temporarily | |
| 956 | +reserved and used by another filesystem or for different purposes. Once that | |
| 957 | +external usage is complete, the device aliasing file can be deleted, releasing | |
| 958 | +the reserved space back to F2FS for its own use. | |
| 959 | + | |
| 960 | +<use-case> | |
| 961 | + | |
| 962 | +# ls /dev/vd* | |
| 963 | +/dev/vdb (32GB) /dev/vdc (32GB) | |
| 964 | +# mkfs.ext4 /dev/vdc | |
| 965 | +# mkfs.f2fs -c /dev/vdc@vdc.file /dev/vdb | |
| 966 | +# mount /dev/vdb /mnt/f2fs | |
| 967 | +# ls -l /mnt/f2fs | |
| 968 | +vdc.file | |
| 969 | +# df -h | |
| 970 | +/dev/vdb 64G 33G 32G 52% /mnt/f2fs | |
| 971 | + | |
| 972 | +# mount -o loop /dev/vdc /mnt/ext4 | |
| 973 | +# df -h | |
| 974 | +/dev/vdb 64G 33G 32G 52% /mnt/f2fs | |
| 975 | +/dev/loop7 32G 24K 30G 1% /mnt/ext4 | |
| 976 | +# umount /mnt/ext4 | |
| 977 | + | |
| 978 | +# f2fs_io getflags /mnt/f2fs/vdc.file | |
| 979 | +get a flag on /mnt/f2fs/vdc.file ret=0, flags=nocow(pinned),immutable | |
| 980 | +# f2fs_io setflags noimmutable /mnt/f2fs/vdc.file | |
| 981 | +get a flag on noimmutable ret=0, flags=800010 | |
| 982 | +set a flag on /mnt/f2fs/vdc.file ret=0, flags=noimmutable | |
| 983 | +# rm /mnt/f2fs/vdc.file | |
| 984 | +# df -h | |
| 985 | +/dev/vdb 64G 753M 64G 2% /mnt/f2fs | |
| 986 | + | |
| 987 | +So, the key idea is, user can do any file operations on /dev/vdc, and | |
| 988 | +reclaim the space after the use, while the space is counted as /data. | |
| 989 | +That doesn't require modifying partition size and filesystem format. | |
| @@ -16,7 +16,7 @@ btrfs filesystems. Like fscrypt, not too much filesystem-specific · 15 unmodified lines | ||
| 16 | 16 | code is needed to support fs-verity. |
| 17 | 17 | |
| 18 | 18 | fs-verity is similar to `dm-verity |
| 19 | −<https://www.kernel.org/doc/Documentation/device-mapper/verity.txt>`_ | |
| 19 | +<https://www.kernel.org/doc/Documentation/admin-guide/device-mapper/verity.rst>`_ | |
| 20 | 20 | but works on files rather than block devices. On regular files on |
| 21 | 21 | filesystems supporting fs-verity, userspace can execute an ioctl that |
| 22 | 22 | causes the filesystem to build a Merkle tree for the file and persist |
| @@ -770,7 +770,8 @@ process the parameters it is given. · 769 unmodified lines | ||
| 770 | 770 | |
| 771 | 771 | * :: |
| 772 | 772 | |
| 773 | − bool fs_validate_description(const struct fs_parameter_description *desc); | |
| 773 | + bool fs_validate_description(const char *name, | |
| 774 | + const struct fs_parameter_description *desc); | |
| 774 | 775 | |
| 775 | 776 | This performs some validation checks on a parameter description. It |
| 776 | 777 | returns true if the description is good and false if it is not. It will |
| @@ -531,7 +531,7 @@ this retry process in the next article. · 530 unmodified lines | ||
| 531 | 531 | Automount points are locations in the filesystem where an attempt to |
| 532 | 532 | lookup a name can trigger changes to how that lookup should be |
| 533 | 533 | handled, in particular by mounting a filesystem there. These are |
| 534 | −covered in greater detail in autofs.txt in the Linux documentation | |
| 534 | +covered in greater detail in autofs.rst in the Linux documentation | |
| 535 | 535 | tree, but a few notes specifically related to path lookup are in order |
| 536 | 536 | here. |
| 537 | 537 | |
| @@ -379,4 +379,4 @@ Papers and other documentation on dcache locking · 378 unmodified lines | ||
| 379 | 379 | |
| 380 | 380 | 2. http://lse.sourceforge.net/locking/dcache/dcache.html |
| 381 | 381 | |
| 382 | −3. path-lookup.md in this directory. | |
| 382 | +3. path-lookup.rst in this directory. | |
| @@ -315,7 +315,7 @@ the above threads) is: · 314 unmodified lines | ||
| 315 | 315 | 2) The cpio archive format chosen by the kernel is simpler and cleaner (and |
| 316 | 316 | thus easier to create and parse) than any of the (literally dozens of) |
| 317 | 317 | various tar archive formats. The complete initramfs archive format is |
| 318 | − explained in buffer-format.txt, created in usr/gen_init_cpio.c, and | |
| 318 | + explained in buffer-format.rst, created in usr/gen_init_cpio.c, and | |
| 319 | 319 | extracted in init/initramfs.c. All three together come to less than 26k |
| 320 | 320 | total of human-readable text. |
| 321 | 321 | |
| @@ -27,6 +27,8 @@ The following chips are supported by this driver: · 26 unmodified lines | ||
| 27 | 27 | * `AD7386-4 <https://www.analog.com/en/products/ad7386-4.html>`_ |
| 28 | 28 | * `AD7387-4 <https://www.analog.com/en/products/ad7387-4.html>`_ |
| 29 | 29 | * `AD7388-4 <https://www.analog.com/en/products/ad7388-4.html>`_ |
| 30 | +* `ADAQ4370-4 <https://www.analog.com/en/products/adaq4370-4.html>`_ | |
| 31 | +* `ADAQ4380-4 <https://www.analog.com/en/products/adaq4380-4.html>`_ | |
| 30 | 32 | |
| 31 | 33 | |
| 32 | 34 | Supported features |
| @@ -47,6 +49,12 @@ ad7380-4 · 14 unmodified lines | ||
| 47 | 49 | ad7380-4 supports only an external reference voltage (2.5V to 3.3V). It must be |
| 48 | 50 | declared in the device tree as ``refin-supply``. |
| 49 | 51 | |
| 52 | +ADAQ devices | |
| 53 | +~~~~~~~~~~~~ | |
| 54 | + | |
| 55 | +adaq4370-4 and adaq4380-4 don't have an external reference, but use a 3.3V | |
| 56 | +internal reference derived from one of its supplies (``refin-supply``) | |
| 57 | + | |
| 50 | 58 | All other devices from ad738x family |
| 51 | 59 | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ |
| 52 | 60 | |
| @@ -121,6 +129,14 @@ Example for AD7386/7/8 (2 channels parts): · 68 unmodified lines | ||
| 121 | 129 | |
| 122 | 130 | When enabling sequencer mode, the effective sampling rate is divided by two. |
| 123 | 131 | |
| 132 | +Gain (ADAQ devices only) | |
| 133 | +~~~~~~~~~~~~~~~~~~~~~~~~ | |
| 134 | + | |
| 135 | +ADAQ devices have a pin selectable gain in front of each ADC. The appropriate | |
| 136 | +gain is selectable from device tree using the ``adi,gain-milli`` property. | |
| 137 | +Refer to the typical connection diagrams section of the datasheet for pin | |
| 138 | +wiring. | |
| 139 | + | |
| 124 | 140 | Unimplemented features |
| 125 | 141 | ---------------------- |
| 126 | 142 | |
| @@ -0,0 +1,144 @@ | ||
| 1 | +.. SPDX-License-Identifier: GPL-2.0-only | |
| 2 | + | |
| 3 | +============= | |
| 4 | +AD7606 driver | |
| 5 | +============= | |
| 6 | + | |
| 7 | +ADC driver for Analog Devices Inc. AD7606 and similar devices. The module name | |
| 8 | +is ``ad7606``. | |
| 9 | + | |
| 10 | +Supported devices | |
| 11 | +================= | |
| 12 | + | |
| 13 | +The following chips are supported by this driver: | |
| 14 | + | |
| 15 | +* `AD7605 <https://www.analog.com/en/products/ad7605.html>`_ | |
| 16 | +* `AD7606 <https://www.analog.com/en/products/ad7606.html>`_ | |
| 17 | +* `AD7606B <https://www.analog.com/en/products/ad7606b.html>`_ | |
| 18 | +* `AD7616 <https://www.analog.com/en/products/ad7616.html>`_ | |
| 19 | + | |
| 20 | +Supported features | |
| 21 | +================== | |
| 22 | + | |
| 23 | +SPI wiring modes | |
| 24 | +---------------- | |
| 25 | + | |
| 26 | +These ADCs can output data on several SDO lines (1/2/4/8). The driver | |
| 27 | +currently supports only 1 SDO line. | |
| 28 | + | |
| 29 | +Parallel wiring mode | |
| 30 | +-------------------- | |
| 31 | + | |
| 32 | +There is also a parallel interface, with 16 lines (that can be reduced to 8 in | |
| 33 | +byte mode). The parallel interface is selected by declaring the device as | |
| 34 | +platform in the device tree (with no io-backends node defined, see below). | |
| 35 | + | |
| 36 | +IIO-backend mode | |
| 37 | +---------------- | |
| 38 | + | |
| 39 | +This mode allows to reach the best sample rates, but it requires an external | |
| 40 | +hardware (eg HDL or APU) to handle the low level communication. | |
| 41 | +The backend mode is enabled when through the definition of the "io-backends" | |
| 42 | +property in the device tree. | |
| 43 | + | |
| 44 | +The reference configuration for the current implementation of IIO-backend mode | |
| 45 | +is the HDL reference provided by ADI: | |
| 46 | +https://wiki.analog.com/resources/eval/user-guides/ad7606x-fmc/hdl | |
| 47 | + | |
| 48 | +This implementation embeds an IIO-backend compatible IP (adi-axi-adc) and a PWM | |
| 49 | +connected to the conversion trigger pin. | |
| 50 | + | |
| 51 | +.. code-block:: | |
| 52 | + | |
| 53 | + +---+ +---------------------------- | |
| 54 | + | | +-------+ |AD76xx | |
| 55 | + | A | controls | | | | |
| 56 | + | D |-------------->| PWM |-------------->| cnvst | |
| 57 | + | 7 | | | | | |
| 58 | + | 6 | +-------+ | | |
| 59 | + | 0 | controls +-----------+-----------+ | | |
| 60 | + | 6 |---------->| | |<--| frstdata | |
| 61 | + | | | Backend | Backend |<--| busy | |
| 62 | + | D | | Driver | | | | |
| 63 | + | R | | | |-->| clk | |
| 64 | + | I | requests |+---------+| DMA | | | |
| 65 | + | V |----------->| Buffer ||<---- |<=>| DATA | |
| 66 | + | E | |+---------+| | | | |
| 67 | + | R | +-----------+-----------+ | | |
| 68 | + | |-------------------------------------->| reset/configuration gpios | |
| 69 | + +---+ +----------------------------- | |
| 70 | + | |
| 71 | + | |
| 72 | +Software and hardware modes | |
| 73 | +--------------------------- | |
| 74 | + | |
| 75 | +While all the AD7606/AD7616 series parts can be configured using GPIOs, some of | |
| 76 | +them can be configured using register. | |
| 77 | + | |
| 78 | +The chips that support software mode have more values available for configuring | |
| 79 | +the device, as well as more settings, and allow to control the range and | |
| 80 | +calibration per channel. | |
| 81 | + | |
| 82 | +The following settings are available per channel in software mode: | |
| 83 | + - Scale | |
| 84 | + | |
| 85 | +Also, there is a broader choice of oversampling ratios in software mode. | |
| 86 | + | |
| 87 | +Conversion triggering | |
| 88 | +--------------------- | |
| 89 | + | |
| 90 | +The conversion can be triggered by two distinct ways: | |
| 91 | + | |
| 92 | + - A GPIO is connected to the conversion trigger pin, and this GPIO is controlled | |
| 93 | + by the driver directly. In this configuration, the driver sets back the | |
| 94 | + conversion trigger pin to high as soon as it has read all the conversions. | |
| 95 | + | |
| 96 | + - An external source is connected to the conversion trigger pin. In the | |
| 97 | + current implementation, it must be a PWM. In this configuration, the driver | |
| 98 | + does not control directly the conversion trigger pin. Instead, it can | |
| 99 | + control the PWM's frequency. This trigger is enabled only for iio-backend. | |
| 100 | + | |
| 101 | +Reference voltage | |
| 102 | +----------------- | |
| 103 | + | |
| 104 | +2 possible reference voltage sources are supported: | |
| 105 | + | |
| 106 | + - Internal reference (2.5V) | |
| 107 | + - External reference (2.5V) | |
| 108 | + | |
| 109 | +The source is determined by the device tree. If ``refin-supply`` is present, | |
| 110 | +then the external reference is used, otherwise the internal reference is used. | |
| 111 | + | |
| 112 | +Oversampling | |
| 113 | +------------ | |
| 114 | + | |
| 115 | +This family supports oversampling to improve SNR. | |
| 116 | +In software mode, the following ratios are available: | |
| 117 | +1 (oversampling disabled)/2/4/8/16/32/64/128/256. | |
| 118 | + | |
| 119 | +Unimplemented features | |
| 120 | +---------------------- | |
| 121 | + | |
| 122 | +- 2/4/8 SDO lines | |
| 123 | +- CRC indication | |
| 124 | +- Calibration | |
| 125 | + | |
| 126 | +Device buffers | |
| 127 | +============== | |
| 128 | + | |
| 129 | +IIO triggered buffer | |
| 130 | +-------------------- | |
| 131 | + | |
| 132 | +This driver supports IIO triggered buffers, with a "built in" trigger, i.e the | |
| 133 | +trigger is allocated and linked by the driver, and a new conversion is triggered | |
| 134 | +as soon as the samples are transferred, and a timestamp channel is added to make | |
| 135 | +up for the potential jitter induced by the delays in the interrupt handling. | |
| 136 | + | |
| 137 | +IIO backend buffer | |
| 138 | +------------------ | |
| 139 | + | |
| 140 | +When IIO backend is used, the trigger is not needed, and the sample rate is | |
| 141 | +considered as stable. There is no timestamp channel. The communication is | |
| 142 | +delegated to an external logic, called a backend, and the backend's driver | |
| 143 | +handles the buffer. When this mode is enabled, the driver cannot control the | |
| 144 | +conversion pin, because the busy pin is bound to the backend. | |
| @@ -0,0 +1,91 @@ | ||
| 1 | +.. SPDX-License-Identifier: GPL-2.0-only | |
| 2 | + | |
| 3 | +==================== | |
| 4 | +AD7625 driver | |
| 5 | +==================== | |
| 6 | + | |
| 7 | +ADC driver for Analog Devices Inc. AD7625, AD7626, AD7960, and AD7961 | |
| 8 | +devices. The module name is ``ad7625``. | |
| 9 | + | |
| 10 | +Supported devices | |
| 11 | +================= | |
| 12 | + | |
| 13 | +The following chips are supported by this driver: | |
| 14 | + | |
| 15 | +* `AD7625 <https://www.analog.com/AD7625>`_ | |
| 16 | +* `AD7626 <https://www.analog.com/AD7626>`_ | |
| 17 | +* `AD7960 <https://www.analog.com/AD7960>`_ | |
| 18 | +* `AD7961 <https://www.analog.com/AD7961>`_ | |
| 19 | + | |
| 20 | +The driver requires use of the Pulsar LVDS HDL project: | |
| 21 | + | |
| 22 | +* `Pulsar LVDS HDL <http://analogdevicesinc.github.io/hdl/projects/pulsar_lvds/index.html>`_ | |
| 23 | + | |
| 24 | +To trigger conversions and enable subsequent data transfer, the devices | |
| 25 | +require coupled PWM signals with a phase offset. | |
| 26 | + | |
| 27 | +Supported features | |
| 28 | +================== | |
| 29 | + | |
| 30 | +Conversion control modes | |
| 31 | +------------------------ | |
| 32 | + | |
| 33 | +The driver currently supports one of two possible LVDS conversion control methods. | |
| 34 | + | |
| 35 | +Echoed-Clock interface mode | |
| 36 | +^^^^^^^^^^^^^^^^^^^^^^^^^^^ | |
| 37 | + | |
| 38 | +.. code-block:: | |
| 39 | + | |
| 40 | + +----------------+ | |
| 41 | + +xxxxxxxxxxxxxxxxxxxxxxxxxx| CNV | | |
| 42 | + X | | | |
| 43 | + v | HOST | | |
| 44 | + +----------------------------+ | | | |
| 45 | + | CNV+/CNV- DCO+/DCO- |xxxxxxx>| CLK_IN | | |
| 46 | + | | | | | |
| 47 | + | | | | | |
| 48 | + | AD7625 D+/D- |xxxxxxx>| DATA_IN | | |
| 49 | + | | | | | |
| 50 | + | | | | | |
| 51 | + | CLK+/CLK- |<xxxxxxx| CLK & CLK_GATE | | |
| 52 | + +----------------------------+ | | | |
| 53 | + +----------------+ | |
| 54 | + | |
| 55 | +Reference voltage | |
| 56 | +----------------- | |
| 57 | + | |
| 58 | +Three possible reference voltage sources are supported: | |
| 59 | + | |
| 60 | +- Internal reference (only available on AD7625 and AD7626) | |
| 61 | +- External reference and internal buffer | |
| 62 | +- External reference | |
| 63 | + | |
| 64 | +The source is determined by the device tree. If ``ref-supply`` is present, then | |
| 65 | +the external reference is used. If ``refin-supply`` is present, then the internal | |
| 66 | +buffer is used. If neither is present, then the internal reference is used. | |
| 67 | + | |
| 68 | +Unimplemented features | |
| 69 | +---------------------- | |
| 70 | + | |
| 71 | +- Self-clocked mode | |
| 72 | + | |
| 73 | + | |
| 74 | +Device attributes | |
| 75 | +================= | |
| 76 | + | |
| 77 | +The AD762x is a fully-differential ADC and has the following attributes: | |
| 78 | + | |
| 79 | ++---------------------------------------+--------------------------------------------------------------+ | |
| 80 | +| Attribute | Description | | |
| 81 | ++=======================================+==============================================================+ | |
| 82 | +| ``scale`` | Scale factor to convert raw value from buffered reads to mV. | | |
| 83 | ++---------------------------------------+--------------------------------------------------------------+ | |
| 84 | + | |
| 85 | + | |
| 86 | +Device buffers | |
| 87 | +============== | |
| 88 | + | |
| 89 | +This driver supports IIO triggered buffers. | |
| 90 | + | |
| 91 | +See :doc:`iio_devbuf` for more information. | |
| @@ -22,7 +22,7 @@ This driver supports also IIO buffers. · 21 unmodified lines | ||
| 22 | 22 | |
| 23 | 23 | The IMU continuously performs an autocalibration procedure if (and only if) |
| 24 | 24 | operating in fusion mode. The magnetometer autocalibration can however be |
| 25 | −disabled writing 0 in the sysfs in_magn_calibration_fast_enable attribute. | |
| 25 | +disabled by writing 0 in the sysfs in_magn_calibration_fast_enable attribute. | |
| 26 | 26 | |
| 27 | 27 | The driver provides access to autocalibration flags (i.e. you can known if |
| 28 | 28 | the IMU has successfully autocalibrated) and to the calibration data blob. |
| @@ -21,6 +21,8 @@ Industrial I/O Kernel Drivers · 20 unmodified lines | ||
| 21 | 21 | ad4000 |
| 22 | 22 | ad4695 |
| 23 | 23 | ad7380 |
| 24 | + ad7606 | |
| 25 | + ad7625 | |
| 24 | 26 | ad7944 |
| 25 | 27 | adis16475 |
| 26 | 28 | adis16480 |
| @@ -264,7 +264,7 @@ events on a read. Their layout is:: · 263 unmodified lines | ||
| 264 | 264 | struct timeval time; |
| 265 | 265 | unsigned short type; |
| 266 | 266 | unsigned short code; |
| 267 | − unsigned int value; | |
| 267 | + int value; | |
| 268 | 268 | }; |
| 269 | 269 | |
| 270 | 270 | ``time`` is the timestamp, it returns the time at which the event happened. |
| @@ -137,12 +137,18 @@ Specify the output directory when building the kernel. · 136 unmodified lines | ||
| 137 | 137 | This variable can also be used to point to the kernel output directory when |
| 138 | 138 | building external modules against a pre-built kernel in a separate build |
| 139 | 139 | directory. Please note that this does NOT specify the output directory for the |
| 140 | −external modules themselves. | |
| 140 | +external modules themselves. (Use KBUILD_EXTMOD_OUTPUT for that purpose.) | |
| 141 | 141 | |
| 142 | 142 | The output directory can also be specified using "O=...". |
| 143 | 143 | |
| 144 | 144 | Setting "O=..." takes precedence over KBUILD_OUTPUT. |
| 145 | 145 | |
| 146 | +KBUILD_EXTMOD_OUTPUT | |
| 147 | +-------------------- | |
| 148 | +Specify the output directory for external modules. | |
| 149 | + | |
| 150 | +Setting "MO=..." takes precedence over KBUILD_EXTMOD_OUTPUT. | |
| 151 | + | |
| 146 | 152 | KBUILD_EXTRA_WARN |
| 147 | 153 | ----------------- |
| 148 | 154 | Specify the extra build checks. The same value can be assigned by passing |
| @@ -412,8 +412,8 @@ choices:: · 411 unmodified lines | ||
| 412 | 412 | <choice block> |
| 413 | 413 | "endchoice" |
| 414 | 414 | |
| 415 | −This defines a choice group and accepts any of the above attributes as | |
| 416 | −options. | |
| 415 | +This defines a choice group and accepts "prompt", "default", "depends on", and | |
| 416 | +"help" attributes as options. | |
| 417 | 417 | |
| 418 | 418 | A choice only allows a single config entry to be selected. |
| 419 | 419 | |
| @@ -179,6 +179,9 @@ yet. Bug reports are always welcome at the issue tracker below! · 178 unmodified lines | ||
| 179 | 179 | * - s390 |
| 180 | 180 | - Maintained |
| 181 | 181 | - ``LLVM=1`` (LLVM >= 18.1.0), ``CC=clang`` (LLVM < 18.1.0) |
| 182 | + * - sparc (sparc64 only) | |
| 183 | + - Maintained | |
| 184 | + - ``CC=clang LLVM_IAS=0`` (LLVM >= 20) | |
| 182 | 185 | * - um (User Mode) |
| 183 | 186 | - Maintained |
| 184 | 187 | - ``LLVM=1`` |
| @@ -449,6 +449,20 @@ $(obj) · 448 unmodified lines | ||
| 449 | 449 | to prerequisites are referenced with $(src) (because they are not |
| 450 | 450 | generated files). |
| 451 | 451 | |
| 452 | +$(srcroot) | |
| 453 | + $(srcroot) refers to the root of the source you are building, which can be | |
| 454 | + either the kernel source or the external modules source, depending on whether | |
| 455 | + KBUILD_EXTMOD is set. This can be either a relative or an absolute path, but | |
| 456 | + if KBUILD_ABS_SRCTREE=1 is set, it is always an absolute path. | |
| 457 | + | |
| 458 | +$(srctree) | |
| 459 | + $(srctree) refers to the root of the kernel source tree. When building the | |
| 460 | + kernel, this is the same as $(srcroot). | |
| 461 | + | |
| 462 | +$(objtree) | |
| 463 | + $(objtree) refers to the root of the kernel object tree. It is ``.`` when | |
| 464 | + building the kernel, but it is different when building external modules. | |
| 465 | + | |
| 452 | 466 | $(kecho) |
| 453 | 467 | echoing information to user in a rule is often a good practice |
| 454 | 468 | but when execution ``make -s`` one does not expect to see any output |
| @@ -59,6 +59,12 @@ Command Syntax · 58 unmodified lines | ||
| 59 | 59 | |
| 60 | 60 | $ make -C /lib/modules/`uname -r`/build M=$PWD modules_install |
| 61 | 61 | |
| 62 | + Starting from Linux 6.13, you can use the -f option instead of -C. This | |
| 63 | + will avoid unnecessary change of the working directory. The external | |
| 64 | + module will be output to the directory where you invoke make. | |
| 65 | + | |
| 66 | + $ make -f /lib/modules/`uname -r`/build/Makefile M=$PWD | |
| 67 | + | |
| 62 | 68 | Options |
| 63 | 69 | ------- |
| 64 | 70 | |
| @@ -66,7 +72,10 @@ Options · 1 unmodified line | ||
| 66 | 72 | of the kernel output directory if the kernel was built in a separate |
| 67 | 73 | build directory.) |
| 68 | 74 | |
| 69 | − make -C $KDIR M=$PWD | |
| 75 | + You can optionally pass MO= option if you want to build the modules in | |
| 76 | + a separate directory. | |
| 77 | + | |
| 78 | + make -C $KDIR M=$PWD [MO=$BUILD_DIR] | |
| 70 | 79 | |
| 71 | 80 | -C $KDIR |
| 72 | 81 | The directory that contains the kernel and relevant build |
| @@ -80,6 +89,9 @@ Options · 7 unmodified lines | ||
| 80 | 89 | directory where the external module (kbuild file) is |
| 81 | 90 | located. |
| 82 | 91 | |
| 92 | + MO=$BUILD_DIR | |
| 93 | + Specifies a separate output directory for the external module. | |
| 94 | + | |
| 83 | 95 | Targets |
| 84 | 96 | ------- |
| 85 | 97 | |
| @@ -215,6 +227,21 @@ Separate Kbuild File and Makefile · 129 unmodified lines | ||
| 215 | 227 | consisting of several hundred lines, and here it really pays |
| 216 | 228 | off to separate the kbuild part from the rest. |
| 217 | 229 | |
| 230 | + Linux 6.13 and later support another way. The external module Makefile | |
| 231 | + can include the kernel Makefile directly, rather than invoking sub Make. | |
| 232 | + | |
| 233 | + Example 3:: | |
| 234 | + | |
| 235 | + --> filename: Kbuild | |
| 236 | + obj-m := 8123.o | |
| 237 | + 8123-y := 8123_if.o 8123_pci.o | |
| 238 | + | |
| 239 | + --> filename: Makefile | |
| 240 | + KDIR ?= /lib/modules/$(shell uname -r)/build | |
| 241 | + export KBUILD_EXTMOD := $(realpath $(dir $(lastword $(MAKEFILE_LIST)))) | |
| 242 | + include $(KDIR)/Makefile | |
| 243 | + | |
| 244 | + | |
| 218 | 245 | Building Multiple Modules |
| 219 | 246 | ------------------------- |
| 220 | 247 | |
| @@ -587,7 +587,7 @@ Defined in ``include/linux/export.h`` · 586 unmodified lines | ||
| 587 | 587 | |
| 588 | 588 | Similar to :c:func:`EXPORT_SYMBOL()` except that the symbols |
| 589 | 589 | exported by :c:func:`EXPORT_SYMBOL_GPL()` can only be seen by |
| 590 | −modules with a :c:func:`MODULE_LICENSE()` that specifies a GPL | |
| 590 | +modules with a :c:func:`MODULE_LICENSE()` that specifies a GPLv2 | |
| 591 | 591 | compatible license. It implies that the function is considered an |
| 592 | 592 | internal implementation issue, and not really an interface. Some |
| 593 | 593 | maintainers and developers may however require EXPORT_SYMBOL_GPL() |
| @@ -175,6 +175,15 @@ can be influenced by kernel parameters: · 174 unmodified lines | ||
| 175 | 175 | ``slab_max_order`` to 0, what cause minimum possible order of |
| 176 | 176 | slabs allocation. |
| 177 | 177 | |
| 178 | +``slab_strict_numa`` | |
| 179 | + Enables the application of memory policies on each | |
| 180 | + allocation. This results in more accurate placement of | |
| 181 | + objects which may result in the reduction of accesses | |
| 182 | + to remote nodes. The default is to only apply memory | |
| 183 | + policies at the folio level when a new folio is acquired | |
| 184 | + or a folio is retrieved from the lists. Enabling this | |
| 185 | + option reduces the fastpath performance of the slab allocator. | |
| 186 | + | |
| 178 | 187 | SLUB Debug output |
| 179 | 188 | ================= |
| 180 | 189 | |
| @@ -51,7 +51,7 @@ Such userspace applications includes, but are not limited to: · 50 unmodified lines | ||
| 51 | 51 | - mbimcli (included with the libmbim [3] library), and |
| 52 | 52 | - ModemManager [4] |
| 53 | 53 | |
| 54 | −Establishing a MBIM IP session reequires at least these actions by the | |
| 54 | +Establishing a MBIM IP session requires at least these actions by the | |
| 55 | 55 | management application: |
| 56 | 56 | |
| 57 | 57 | - open the control channel |
| @@ -51,7 +51,7 @@ and send them to the device for encryption and transmission. · 50 unmodified lines | ||
| 51 | 51 | RX |
| 52 | 52 | -- |
| 53 | 53 | |
| 54 | −On the receive side if the device handled decryption and authentication | |
| 54 | +On the receive side, if the device handled decryption and authentication | |
| 55 | 55 | successfully, the driver will set the decrypted bit in the associated |
| 56 | 56 | :c:type:`struct sk_buff <sk_buff>`. The packets reach the TCP stack and |
| 57 | 57 | are handled normally. ``ktls`` is informed when data is queued to the socket |
| @@ -120,8 +120,9 @@ before installing the connection state in the kernel. · 62 unmodified lines | ||
| 120 | 120 | RX |
| 121 | 121 | -- |
| 122 | 122 | |
| 123 | −In RX direction local networking stack has little control over the segmentation, | |
| 124 | −so the initial records' TCP sequence number may be anywhere inside the segment. | |
| 123 | +In the RX direction, the local networking stack has little control over | |
| 124 | +segmentation, so the initial records' TCP sequence number may be anywhere | |
| 125 | +inside the segment. | |
| 125 | 126 | |
| 126 | 127 | Normal operation |
| 127 | 128 | ================ |
| @@ -138,8 +139,8 @@ There are no guarantees on record length or record segmentation. In particular · 10 unmodified lines | ||
| 138 | 139 | segments may start at any point of a record and contain any number of records. |
| 139 | 140 | Assuming segments are received in order, the device should be able to perform |
| 140 | 141 | crypto operations and authentication regardless of segmentation. For this |
| 141 | −to be possible device has to keep small amount of segment-to-segment state. | |
| 142 | −This includes at least: | |
| 142 | +to be possible, the device has to keep a small amount of segment-to-segment | |
| 143 | +state. This includes at least: | |
| 143 | 144 | |
| 144 | 145 | * partial headers (if a segment carried only a part of the TLS header) |
| 145 | 146 | * partial data block |
| @@ -175,12 +176,12 @@ and packet transformation functions) the device validates the Layer 4 · 29 unmodified lines | ||
| 175 | 176 | checksum and performs a 5-tuple lookup to find any TLS connection the packet |
| 176 | 177 | may belong to (technically a 4-tuple |
| 177 | 178 | lookup is sufficient - IP addresses and TCP port numbers, as the protocol |
| 178 | −is always TCP). If connection is matched device confirms if the TCP sequence | |
| 179 | −number is the expected one and proceeds to TLS handling (record delineation, | |
| 180 | −decryption, authentication for each record in the packet). The device leaves | |
| 181 | −the record framing unmodified, the stack takes care of record decapsulation. | |
| 182 | −Device indicates successful handling of TLS offload in the per-packet context | |
| 183 | −(descriptor) passed to the host. | |
| 179 | +is always TCP). If the packet is matched to a connection, the device confirms | |
| 180 | +if the TCP sequence number is the expected one and proceeds to TLS handling | |
| 181 | +(record delineation, decryption, authentication for each record in the packet). | |
| 182 | +The device leaves the record framing unmodified, the stack takes care of record | |
| 183 | +decapsulation. Device indicates successful handling of TLS offload in the | |
| 184 | +per-packet context (descriptor) passed to the host. | |
| 184 | 185 | |
| 185 | 186 | Upon reception of a TLS offloaded packet, the driver sets |
| 186 | 187 | the :c:member:`decrypted` mark in :c:type:`struct sk_buff <sk_buff>` |
| @@ -439,7 +440,7 @@ by the driver: · 252 unmodified lines | ||
| 439 | 440 | * ``rx_tls_resync_req_end`` - number of times the TLS async resync request |
| 440 | 441 | properly ended with providing the HW tracked tcp-seq. |
| 441 | 442 | * ``rx_tls_resync_req_skip`` - number of times the TLS async resync request |
| 442 | − procedure was started by not properly ended. | |
| 443 | + procedure was started but not properly ended. | |
| 443 | 444 | * ``rx_tls_resync_res_ok`` - number of times the TLS resync response call to |
| 444 | 445 | the driver was successfully handled. |
| 445 | 446 | * ``rx_tls_resync_res_skip`` - number of times the TLS resync response call to |
| @@ -507,8 +508,8 @@ in packets as seen on the wire. · 61 unmodified lines | ||
| 507 | 508 | Transport layer transparency |
| 508 | 509 | ---------------------------- |
| 509 | 510 | |
| 510 | −The device should not modify any packet headers for the purpose | |
| 511 | −of the simplifying TLS offload. | |
| 511 | +For the purpose of simplifying TLS offload, the device should not modify any | |
| 512 | +packet headers. | |
| 512 | 513 | |
| 513 | 514 | The device should not depend on any packet headers beyond what is strictly |
| 514 | 515 | necessary for TLS offload. |
| @@ -0,0 +1,223 @@ | ||
| 1 | +.. SPDX-License-Identifier: GPL-2.0 | |
| 2 | + | |
| 3 | +======================================== | |
| 4 | +Debugging advice for driver development | |
| 5 | +======================================== | |
| 6 | + | |
| 7 | +This document serves as a general starting point and lookup for debugging | |
| 8 | +device drivers. | |
| 9 | +While this guide focuses on debugging that requires re-compiling the | |
| 10 | +module/kernel, the :doc:`userspace debugging guide | |
| 11 | +</process/debugging/userspace_debugging_guide>` will guide | |
| 12 | +you through tools like dynamic debug, ftrace and other tools useful for | |
| 13 | +debugging issues and behavior. | |
| 14 | +For general debugging advice, see the :doc:`general advice document | |
| 15 | +</process/debugging/index>`. | |
| 16 | + | |
| 17 | +.. contents:: | |
| 18 | + :depth: 3 | |
| 19 | + | |
| 20 | +The following sections show you the available tools. | |
| 21 | + | |
| 22 | +printk() & friends | |
| 23 | +------------------ | |
| 24 | + | |
| 25 | +These are derivatives of printf() with varying destinations and support for | |
| 26 | +being dynamically turned on or off, or lack thereof. | |
| 27 | + | |
| 28 | +Simple printk() | |
| 29 | +~~~~~~~~~~~~~~~ | |
| 30 | + | |
| 31 | +The classic, can be used to great effect for quick and dirty development | |
| 32 | +of new modules or to extract arbitrary necessary data for troubleshooting. | |
| 33 | + | |
| 34 | +Prerequisite: ``CONFIG_PRINTK`` (usually enabled by default) | |
| 35 | + | |
| 36 | +**Pros**: | |
| 37 | + | |
| 38 | +- No need to learn anything, simple to use | |
| 39 | +- Easy to modify exactly to your needs (formatting of the data (See: | |
| 40 | + :doc:`/core-api/printk-formats`), visibility in the log) | |
| 41 | +- Can cause delays in the execution of the code (beneficial to confirm whether | |
| 42 | + timing is a factor) | |
| 43 | + | |
| 44 | +**Cons**: | |
| 45 | + | |
| 46 | +- Requires rebuilding the kernel/module | |
| 47 | +- Can cause delays in the execution of the code (which can cause issues to be | |
| 48 | + not reproducible) | |
| 49 | + | |
| 50 | +For the full documentation see :doc:`/core-api/printk-basics` | |
| 51 | + | |
| 52 | +Trace_printk | |
| 53 | +~~~~~~~~~~~~ | |
| 54 | + | |
| 55 | +Prerequisite: ``CONFIG_DYNAMIC_FTRACE`` & ``#include <linux/ftrace.h>`` | |
| 56 | + | |
| 57 | +It is a tiny bit less comfortable to use than printk(), because you will have | |
| 58 | +to read the messages from the trace file (See: :ref:`read_ftrace_log` | |
| 59 | +instead of from the kernel log, but very useful when printk() adds unwanted | |
| 60 | +delays into the code execution, causing issues to be flaky or hidden.) | |
| 61 | + | |
| 62 | +If the processing of this still causes timing issues then you can try | |
| 63 | +trace_puts(). | |
| 64 | + | |
| 65 | +For the full Documentation see trace_printk() | |
| 66 | + | |
| 67 | +dev_dbg | |
| 68 | +~~~~~~~ | |
| 69 | + | |
| 70 | +Print statement, which can be targeted by | |
| 71 | +:ref:`process/debugging/userspace_debugging_guide:dynamic debug` that contains | |
| 72 | +additional information about the device used within the context. | |
| 73 | + | |
| 74 | +**When is it appropriate to leave a debug print in the code?** | |
| 75 | + | |
| 76 | +Permanent debug statements have to be useful for a developer to troubleshoot | |
| 77 | +driver misbehavior. Judging that is a bit more of an art than a science, but | |
| 78 | +some guidelines are in the :ref:`Coding style guidelines | |
| 79 | +<process/coding-style:13) printing kernel messages>`. In almost all cases the | |
| 80 | +debug statements shouldn't be upstreamed, as a working driver is supposed to be | |
| 81 | +silent. | |
| 82 | + | |
| 83 | +Custom printk | |
| 84 | +~~~~~~~~~~~~~ | |
| 85 | + | |
| 86 | +Example:: | |
| 87 | + | |
| 88 | + #define core_dbg(fmt, arg...) do { \ | |
| 89 | + if (core_debug) \ | |
| 90 | + printk(KERN_DEBUG pr_fmt("core: " fmt), ## arg); \ | |
| 91 | + } while (0) | |
| 92 | + | |
| 93 | +**When should you do this?** | |
| 94 | + | |
| 95 | +It is better to just use a pr_debug(), which can later be turned on/off with | |
| 96 | +dynamic debug. Additionally, a lot of drivers activate these prints via a | |
| 97 | +variable like ``core_debug`` set by a module parameter. However, Module | |
| 98 | +parameters `are not recommended anymore | |
| 99 | +<https://lore.kernel.org/all/2024032757-surcharge-grime-d3dd@gregkh>`_. | |
| 100 | + | |
| 101 | +Ftrace | |
| 102 | +------ | |
| 103 | + | |
| 104 | +Creating a custom Ftrace tracepoint | |
| 105 | +~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ | |
| 106 | + | |
| 107 | +A tracepoint adds a hook into your code that will be called and logged when the | |
| 108 | +tracepoint is enabled. This can be used, for example, to trace hitting a | |
| 109 | +conditional branch or to dump the internal state at specific points of the code | |
| 110 | +flow during a debugging session. | |
| 111 | + | |
| 112 | +Here is a basic description of :ref:`how to implement new tracepoints | |
| 113 | +<trace/tracepoints:usage>`. | |
| 114 | + | |
| 115 | +For the full event tracing documentation see :doc:`/trace/events` | |
| 116 | + | |
| 117 | +For the full Ftrace documentation see :doc:`/trace/ftrace` | |
| 118 | + | |
| 119 | +DebugFS | |
| 120 | +------- | |
| 121 | + | |
| 122 | +Prerequisite: ``CONFIG_DEBUG_FS` & `#include <linux/debugfs.h>`` | |
| 123 | + | |
| 124 | +DebugFS differs from the other approaches of debugging, as it doesn't write | |
| 125 | +messages to the kernel log nor add traces to the code. Instead it allows the | |
| 126 | +developer to handle a set of files. | |
| 127 | +With these files you can either store values of variables or make | |
| 128 | +register/memory dumps or you can make these files writable and modify | |
| 129 | +values/settings in the driver. | |
| 130 | + | |
| 131 | +Possible use-cases among others: | |
| 132 | + | |
| 133 | +- Store register values | |
| 134 | +- Keep track of variables | |
| 135 | +- Store errors | |
| 136 | +- Store settings | |
| 137 | +- Toggle a setting like debug on/off | |
| 138 | +- Error injection | |
| 139 | + | |
| 140 | +This is especially useful, when the size of a data dump would be hard to digest | |
| 141 | +as part of the general kernel log (for example when dumping raw bitstream data) | |
| 142 | +or when you are not interested in all the values all the time, but with the | |
| 143 | +possibility to inspect them. | |
| 144 | + | |
| 145 | +The general idea is: | |
| 146 | + | |
| 147 | +- Create a directory during probe (``struct dentry *parent = | |
| 148 | + debugfs_create_dir("my_driver", NULL);``) | |
| 149 | +- Create a file (``debugfs_create_u32("my_value", 444, parent, &my_variable);``) | |
| 150 | + | |
| 151 | + - In this example the file is found in | |
| 152 | + ``/sys/kernel/debug/my_driver/my_value`` (with read permissions for | |
| 153 | + user/group/all) | |
| 154 | + - any read of the file will return the current contents of the variable | |
| 155 | + ``my_variable`` | |
| 156 | + | |
| 157 | +- Clean up the directory when removing the device | |
| 158 | + (``debugfs_remove_recursive(parent);``) | |
| 159 | + | |
| 160 | +For the full documentation see :doc:`/filesystems/debugfs`. | |
| 161 | + | |
| 162 | +KASAN, UBSAN, lockdep and other error checkers | |
| 163 | +---------------------------------------------- | |
| 164 | + | |
| 165 | +KASAN (Kernel Address Sanitizer) | |
| 166 | +~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ | |
| 167 | + | |
| 168 | +Prerequisite: ``CONFIG_KASAN`` | |
| 169 | + | |
| 170 | +KASAN is a dynamic memory error detector that helps to find use-after-free and | |
| 171 | +out-of-bounds bugs. It uses compile-time instrumentation to check every memory | |
| 172 | +access. | |
| 173 | + | |
| 174 | +For the full documentation see :doc:`/dev-tools/kasan`. | |
| 175 | + | |
| 176 | +UBSAN (Undefined Behavior Sanitizer) | |
| 177 | +~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ | |
| 178 | + | |
| 179 | +Prerequisite: ``CONFIG_UBSAN`` | |
| 180 | + | |
| 181 | +UBSAN relies on compiler instrumentation and runtime checks to detect undefined | |
| 182 | +behavior. It is designed to find a variety of issues, including signed integer | |
| 183 | +overflow, array index out of bounds, and more. | |
| 184 | + | |
| 185 | +For the full documentation see :doc:`/dev-tools/ubsan` | |
| 186 | + | |
| 187 | +lockdep (Lock Dependency Validator) | |
| 188 | +~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ | |
| 189 | + | |
| 190 | +Prerequisite: ``CONFIG_DEBUG_LOCKDEP`` | |
| 191 | + | |
| 192 | +lockdep is a runtime lock dependency validator that detects potential deadlocks | |
| 193 | +and other locking-related issues in the kernel. | |
| 194 | +It tracks lock acquisitions and releases, building a dependency graph that is | |
| 195 | +analyzed for potential deadlocks. | |
| 196 | +lockdep is especially useful for validating the correctness of lock ordering in | |
| 197 | +the kernel. | |
| 198 | + | |
| 199 | +PSI (Pressure stall information tracking) | |
| 200 | +~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ | |
| 201 | + | |
| 202 | +Prerequisite: ``CONFIG_PSI`` | |
| 203 | + | |
| 204 | +PSI is a measurement tool to identify excessive overcommits on hardware | |
| 205 | +resources, that can cause performance disruptions or even OOM kills. | |
| 206 | + | |
| 207 | +device coredump | |
| 208 | +--------------- | |
| 209 | + | |
| 210 | +Prerequisite: ``#include <linux/devcoredump.h>`` | |
| 211 | + | |
| 212 | +Provides the infrastructure for a driver to provide arbitrary data to userland. | |
| 213 | +It is most often used in conjunction with udev or similar userland application | |
| 214 | +to listen for kernel uevents, which indicate that the dump is ready. Udev has | |
| 215 | +rules to copy that file somewhere for long-term storage and analysis, as by | |
| 216 | +default, the data for the dump is automatically cleaned up after 5 minutes. | |
| 217 | +That data is analyzed with driver-specific tools or GDB. | |
| 218 | + | |
| 219 | +You can find an example implementation at: | |
| 220 | +`drivers/media/platform/qcom/venus/core.c | |
| 221 | +<https://elixir.bootlin.com/linux/v6.11.6/source/drivers/media/platform/qcom/venus/core.c#L30>`__ | |
| 222 | + | |
| 223 | +**Copyright** ©2024 : Collabora | |
| @@ -0,0 +1,78 @@ | ||
| 1 | +.. SPDX-License-Identifier: GPL-2.0 | |
| 2 | + | |
| 3 | +============================================ | |
| 4 | +Debugging advice for Linux Kernel developers | |
| 5 | +============================================ | |
| 6 | + | |
| 7 | +general guides | |
| 8 | +-------------- | |
| 9 | + | |
| 10 | +.. toctree:: | |
| 11 | + :maxdepth: 1 | |
| 12 | + | |
| 13 | + driver_development_debugging_guide | |
| 14 | + userspace_debugging_guide | |
| 15 | + | |
| 16 | +.. only:: subproject and html | |
| 17 | + | |
| 18 | +subsystem specific guides | |
| 19 | +------------------------- | |
| 20 | + | |
| 21 | +.. toctree:: | |
| 22 | + :maxdepth: 1 | |
| 23 | + | |
| 24 | + media_specific_debugging_guide | |
| 25 | + | |
| 26 | +.. only:: subproject and html | |
| 27 | + | |
| 28 | + Indices | |
| 29 | + ======= | |
| 30 | + | |
| 31 | + * :ref:`genindex` | |
| 32 | + | |
| 33 | +General debugging advice | |
| 34 | +======================== | |
| 35 | + | |
| 36 | +Depending on the issue, a different set of tools is available to track down the | |
| 37 | +problem or even to realize whether there is one in the first place. | |
| 38 | + | |
| 39 | +As a first step you have to figure out what kind of issue you want to debug. | |
| 40 | +Depending on the answer, your methodology and choice of tools may vary. | |
| 41 | + | |
| 42 | +Do I need to debug with limited access? | |
| 43 | +--------------------------------------- | |
| 44 | + | |
| 45 | +Do you have limited access to the machine or are you unable to stop the running | |
| 46 | +execution? | |
| 47 | + | |
| 48 | +In this case your debugging capability depends on built-in debugging support of | |
| 49 | +provided distribution kernel. | |
| 50 | +The :doc:`/process/debugging/userspace_debugging_guide` provides a brief | |
| 51 | +overview over a range of possible debugging tools in that situation. You can | |
| 52 | +check the capability of your kernel, in most cases, by looking into config file | |
| 53 | +within the /boot directory. | |
| 54 | + | |
| 55 | +Do I have root access to the system? | |
| 56 | +------------------------------------ | |
| 57 | + | |
| 58 | +Are you easily able to replace the module in question or to install a new | |
| 59 | +kernel? | |
| 60 | + | |
| 61 | +In that case your range of available tools is a lot bigger, you can find the | |
| 62 | +tools in the :doc:`/process/debugging/driver_development_debugging_guide`. | |
| 63 | + | |
| 64 | +Is timing a factor? | |
| 65 | +------------------- | |
| 66 | + | |
| 67 | +It is important to understand if the problem you want to debug manifests itself | |
| 68 | +consistently (i.e. given a set of inputs you always get the same, incorrect | |
| 69 | +output), or inconsistently. If it manifests itself inconsistently, some timing | |
| 70 | +factor might be at play. If inserting delays into the code does change the | |
| 71 | +behavior, then quite likely timing is a factor. | |
| 72 | + | |
| 73 | +When timing does alter the outcome of the code execution using a simple | |
| 74 | +printk() for debugging purposes may not work, a similar alternative is to use | |
| 75 | +trace_printk() , which logs the debug messages to the trace file instead of the | |
| 76 | +kernel log. | |
| 77 | + | |
| 78 | +**Copyright** ©2024 : Collabora | |
| @@ -0,0 +1,180 @@ | ||
| 1 | +.. SPDX-License-Identifier: GPL-2.0 | |
| 2 | + | |
| 3 | +============================================ | |
| 4 | +Debugging and tracing in the media subsystem | |
| 5 | +============================================ | |
| 6 | + | |
| 7 | +This document serves as a starting point and lookup for debugging device | |
| 8 | +drivers in the media subsystem and to debug these drivers from userspace. | |
| 9 | + | |
| 10 | +.. contents:: | |
| 11 | + :depth: 3 | |
| 12 | + | |
| 13 | +General debugging advice | |
| 14 | +------------------------ | |
| 15 | + | |
| 16 | +For general advice see the :doc:`general advice document | |
| 17 | +</process/debugging/index>`. | |
| 18 | + | |
| 19 | +The following sections show you some of the available tools. | |
| 20 | + | |
| 21 | +dev_debug module parameter | |
| 22 | +-------------------------- | |
| 23 | + | |
| 24 | +Every video device provides a ``dev_debug`` parameter, which allows to get | |
| 25 | +further insights into the IOCTLs in the background.:: | |
| 26 | + | |
| 27 | + # cat /sys/class/video4linux/video3/name | |
| 28 | + rkvdec | |
| 29 | + # echo 0xff > /sys/class/video4linux/video3/dev_debug | |
| 30 | + # dmesg -wH | |
| 31 | + [...] videodev: v4l2_open: video3: open (0) | |
| 32 | + [ +0.000036] video3: VIDIOC_QUERYCAP: driver=rkvdec, card=rkvdec, | |
| 33 | + bus=platform:rkvdec, version=0x00060900, capabilities=0x84204000, | |
| 34 | + device_caps=0x04204000 | |
| 35 | + | |
| 36 | +For the full documentation see :ref:`driver-api/media/v4l2-dev:video device | |
| 37 | +debugging` | |
| 38 | + | |
| 39 | +dev_dbg() / v4l2_dbg() | |
| 40 | +---------------------- | |
| 41 | + | |
| 42 | +Two debug print statements, which are specific for devices and for the v4l2 | |
| 43 | +subsystem, avoid adding these to your final submission unless they have | |
| 44 | +long-term value for investigations. | |
| 45 | + | |
| 46 | +For a general overview please see the | |
| 47 | +:ref:`process/debugging/driver_development_debugging_guide:printk() & friends` | |
| 48 | +guide. | |
| 49 | + | |
| 50 | +- Difference between both? | |
| 51 | + | |
| 52 | + - v4l2_dbg() utilizes v4l2_printk() under the hood, which further uses | |
| 53 | + printk() directly, thus it cannot be targeted by dynamic debug | |
| 54 | + - dev_dbg() can be targeted by dynamic debug | |
| 55 | + - v4l2_dbg() has a more specific prefix format for the media subsystem, while | |
| 56 | + dev_dbg only highlights the driver name and the location of the log | |
| 57 | + | |
| 58 | +Dynamic debug | |
| 59 | +------------- | |
| 60 | + | |
| 61 | +A method to trim down the debug output to your needs. | |
| 62 | + | |
| 63 | +For general advice see the | |
| 64 | +:ref:`process/debugging/userspace_debugging_guide:dynamic debug` guide. | |
| 65 | + | |
| 66 | +Here is one example, that enables all available pr_debug()'s within the file:: | |
| 67 | + | |
| 68 | + $ alias ddcmd='echo $* > /proc/dynamic_debug/control' | |
| 69 | + $ ddcmd '-p; file v4l2-h264.c +p' | |
| 70 | + $ grep =p /proc/dynamic_debug/control | |
| 71 | + drivers/media/v4l2-core/v4l2-h264.c:372 [v4l2_h264]print_ref_list_b =p | |
| 72 | + "ref_pic_list_b%u (cur_poc %u%c) %s" | |
| 73 | + drivers/media/v4l2-core/v4l2-h264.c:333 [v4l2_h264]print_ref_list_p =p | |
| 74 | + "ref_pic_list_p (cur_poc %u%c) %s\n" | |
| 75 | + | |
| 76 | +Ftrace | |
| 77 | +------ | |
| 78 | + | |
| 79 | +An internal kernel tracer that can trace static predefined events, function | |
| 80 | +calls, etc. Very useful for debugging problems without changing the kernel and | |
| 81 | +understanding the behavior of subsystems. | |
| 82 | + | |
| 83 | +For general advice see the | |
| 84 | +:ref:`process/debugging/userspace_debugging_guide:ftrace` guide. | |
| 85 | + | |
| 86 | +DebugFS | |
| 87 | +------- | |
| 88 | + | |
| 89 | +This tool allows you to dump or modify internal values of your driver to files | |
| 90 | +in a custom filesystem. | |
| 91 | + | |
| 92 | +For general advice see the | |
| 93 | +:ref:`process/debugging/driver_development_debugging_guide:debugfs` guide. | |
| 94 | + | |
| 95 | +Perf & alternatives | |
| 96 | +------------------- | |
| 97 | + | |
| 98 | +Tools to measure the various stats on a running system to diagnose issues. | |
| 99 | + | |
| 100 | +For general advice see the | |
| 101 | +:ref:`process/debugging/userspace_debugging_guide:perf & alternatives` guide. | |
| 102 | + | |
| 103 | +Example for media devices: | |
| 104 | + | |
| 105 | +Gather statistics data for a decoding job: (This example is on a RK3399 SoC | |
| 106 | +with the rkvdec codec driver using the `fluster test suite | |
| 107 | +<https://github.com/fluendo/fluster>`__):: | |
| 108 | + | |
| 109 | + perf stat -d python3 fluster.py run -d GStreamer-H.264-V4L2SL-Gst1.0 -ts | |
| 110 | + JVT-AVC_V1 -tv AUD_MW_E -j1 | |
| 111 | + ... | |
| 112 | + Performance counter stats for 'python3 fluster.py run -d | |
| 113 | + GStreamer-H.264-V4L2SL-Gst1.0 -ts JVT-AVC_V1 -tv AUD_MW_E -j1 -v': | |
| 114 | + | |
| 115 | + 7794.23 msec task-clock:u # 0.697 CPUs utilized | |
| 116 | + 0 context-switches:u # 0.000 /sec | |
| 117 | + 0 cpu-migrations:u # 0.000 /sec | |
| 118 | + 11901 page-faults:u # 1.527 K/sec | |
| 119 | + 882671556 cycles:u # 0.113 GHz (95.79%) | |
| 120 | + 711708695 instructions:u # 0.81 insn per cycle (95.79%) | |
| 121 | + 10581935 branches:u # 1.358 M/sec (15.13%) | |
| 122 | + 6871144 branch-misses:u # 64.93% of all branches (95.79%) | |
| 123 | + 281716547 L1-dcache-loads:u # 36.144 M/sec (95.79%) | |
| 124 | + 9019581 L1-dcache-load-misses:u # 3.20% of all L1-dcache accesses (95.79%) | |
| 125 | + <not supported> LLC-loads:u | |
| 126 | + <not supported> LLC-load-misses:u | |
| 127 | + | |
| 128 | + 11.180830431 seconds time elapsed | |
| 129 | + | |
| 130 | + 1.502318000 seconds user | |
| 131 | + 6.377221000 seconds sys | |
| 132 | + | |
| 133 | +The availability of events and metrics depends on the system you are running. | |
| 134 | + | |
| 135 | +Error checking & panic analysis | |
| 136 | +------------------------------- | |
| 137 | + | |
| 138 | +Various Kernel configuration options to enhance error detection of the Linux | |
| 139 | +Kernel with the cost of lowering performance. | |
| 140 | + | |
| 141 | +For general advice see the | |
| 142 | +:ref:`process/debugging/driver_development_debugging_guide:kasan, ubsan, | |
| 143 | +lockdep and other error checkers` guide. | |
| 144 | + | |
| 145 | +Driver verification with v4l2-compliance | |
| 146 | +---------------------------------------- | |
| 147 | + | |
| 148 | +To verify, that a driver adheres to the v4l2 API, the tool v4l2-compliance is | |
| 149 | +used, which is part of the `v4l_utils | |
| 150 | +<https://git.linuxtv.org/v4l-utils.git>`__, a suite of userspace tools to work | |
| 151 | +with the media subsystem. | |
| 152 | + | |
| 153 | +To see the detailed media topology (and check it) use:: | |
| 154 | + | |
| 155 | + v4l2-compliance -M /dev/mediaX --verbose | |
| 156 | + | |
| 157 | +You can also run a full compliance check for all devices referenced in the | |
| 158 | +media topology with:: | |
| 159 | + | |
| 160 | + v4l2-compliance -m /dev/mediaX | |
| 161 | + | |
| 162 | +Debugging problems with receiving video | |
| 163 | +--------------------------------------- | |
| 164 | + | |
| 165 | +Implementing vidioc_log_status in the driver: this can log the current status | |
| 166 | +to the kernel log. It's called by v4l2-ctl --log-status. Very useful for | |
| 167 | +debugging problems with receiving video (TV/S-Video/HDMI/etc) since the video | |
| 168 | +signal is external (so unpredictable). Less useful with camera sensor inputs | |
| 169 | +since you have control over what the camera sensor does. | |
| 170 | + | |
| 171 | +Usually you can just assign the default:: | |
| 172 | + | |
| 173 | + .vidioc_log_status = v4l2_ctrl_log_status, | |
| 174 | + | |
| 175 | +But you can also create your own callback, to create a custom status log. | |
| 176 | + | |
| 177 | +You can find an example in the cobalt driver | |
| 178 | +(`drivers/media/pci/cobalt/cobalt-v4l2.c <https://elixir.bootlin.com/linux/v6.11.6/source/drivers/media/pci/cobalt/cobalt-v4l2.c#L567>`__). | |
| 179 | + | |
| 180 | +**Copyright** ©2024 : Collabora | |
| @@ -0,0 +1,280 @@ | ||
| 1 | +.. SPDX-License-Identifier: GPL-2.0 | |
| 2 | + | |
| 3 | +========================== | |
| 4 | +Userspace debugging advice | |
| 5 | +========================== | |
| 6 | + | |
| 7 | +This document provides a brief overview of common tools to debug the Linux | |
| 8 | +Kernel from userspace. | |
| 9 | +For debugging advice aimed at driver developers go :doc:`here | |
| 10 | +</process/debugging/driver_development_debugging_guide>`. | |
| 11 | +For general debugging advice, see :doc:`general advice document | |
| 12 | +</process/debugging/index>`. | |
| 13 | + | |
| 14 | +.. contents:: | |
| 15 | + :depth: 3 | |
| 16 | + | |
| 17 | +The following sections show you the available tools. | |
| 18 | + | |
| 19 | +Dynamic debug | |
| 20 | +------------- | |
| 21 | + | |
| 22 | +Mechanism to filter what ends up in the kernel log by dis-/en-abling log | |
| 23 | +messages. | |
| 24 | + | |
| 25 | +Prerequisite: ``CONFIG_DYNAMIC_DEBUG`` | |
| 26 | + | |
| 27 | +Dynamic debug is only able to target: | |
| 28 | + | |
| 29 | +- pr_debug() | |
| 30 | +- dev_dbg() | |
| 31 | +- print_hex_dump_debug() | |
| 32 | +- print_hex_dump_bytes() | |
| 33 | + | |
| 34 | +Therefore the usability of this tool is, as of now, quite limited as there is | |
| 35 | +no uniform rule for adding debug prints to the codebase, resulting in a variety | |
| 36 | +of ways these prints are implemented. | |
| 37 | + | |
| 38 | +Also, note that most debug statements are implemented as a variation of | |
| 39 | +dprintk(), which have to be activated via a parameter in respective module, | |
| 40 | +dynamic debug is unable to do that step for you. | |
| 41 | + | |
| 42 | +Here is one example, that enables all available pr_debug()'s within the file:: | |
| 43 | + | |
| 44 | + $ alias ddcmd='echo $* > /proc/dynamic_debug/control' | |
| 45 | + $ ddcmd '-p; file v4l2-h264.c +p' | |
| 46 | + $ grep =p /proc/dynamic_debug/control | |
| 47 | + drivers/media/v4l2-core/v4l2-h264.c:372 [v4l2_h264]print_ref_list_b =p | |
| 48 | + "ref_pic_list_b%u (cur_poc %u%c) %s" | |
| 49 | + drivers/media/v4l2-core/v4l2-h264.c:333 [v4l2_h264]print_ref_list_p =p | |
| 50 | + "ref_pic_list_p (cur_poc %u%c) %s\n" | |
| 51 | + | |
| 52 | +**When should you use this over Ftrace ?** | |
| 53 | + | |
| 54 | +- When the code contains one of the valid print statements (see above) or when | |
| 55 | + you have added multiple pr_debug() statements during development | |
| 56 | +- When timing is not an issue, meaning if multiple pr_debug() statements in | |
| 57 | + the code won't cause delays | |
| 58 | +- When you care more about receiving specific log messages than tracing the | |
| 59 | + pattern of how a function is called | |
| 60 | + | |
| 61 | +For the full documentation see :doc:`/admin-guide/dynamic-debug-howto` | |
| 62 | + | |
| 63 | +Ftrace | |
| 64 | +------ | |
| 65 | + | |
| 66 | +Prerequisite: ``CONFIG_DYNAMIC_FTRACE`` | |
| 67 | + | |
| 68 | +This tool uses the tracefs file system for the control files and output files. | |
| 69 | +That file system will be mounted as a ``tracing`` directory, which can be found | |
| 70 | +in either ``/sys/kernel/`` or ``/sys/debug/kernel/``. | |
| 71 | + | |
| 72 | +Some of the most important operations for debugging are: | |
| 73 | + | |
| 74 | +- You can perform a function trace by adding a function name to the | |
| 75 | + ``set_ftrace_filter`` file (which accepts any function name found within the | |
| 76 | + ``available_filter_functions`` file) or you can specifically disable certain | |
| 77 | + functions by adding their names to the ``set_ftrace_notrace`` file (more info | |
| 78 | + at: :ref:`trace/ftrace:dynamic ftrace`). | |
| 79 | +- In order to find out where calls originate from you can activate the | |
| 80 | + ``func_stack_trace`` option under ``options/func_stack_trace``. | |
| 81 | +- Tracing the children of a function call and showing the return values are | |
| 82 | + possible by adding the desired function in the ``set_graph_function`` file | |
| 83 | + (requires config ``FUNCTION_GRAPH_RETVAL``); more info at | |
| 84 | + :ref:`trace/ftrace:dynamic ftrace with the function graph tracer`. | |
| 85 | + | |
| 86 | +For the full Ftrace documentation see :doc:`/trace/ftrace` | |
| 87 | + | |
| 88 | +Or you could also trace for specific events by :ref:`using event tracing | |
| 89 | +<trace/events:2. using event tracing>`, which can be defined as described here: | |
| 90 | +:ref:`Creating a custom Ftrace tracepoint | |
| 91 | +<process/debugging/driver_development_debugging_guide:ftrace>`. | |
| 92 | + | |
| 93 | +For the full Ftrace event tracing documentation see :doc:`/trace/events` | |
| 94 | + | |
| 95 | +.. _read_ftrace_log: | |
| 96 | + | |
| 97 | +Reading the ftrace log | |
| 98 | +~~~~~~~~~~~~~~~~~~~~~~ | |
| 99 | + | |
| 100 | +The ``trace`` file can be read just like any other file (``cat``, ``tail``, | |
| 101 | +``head``, ``vim``, etc.), the size of the file is limited by the | |
| 102 | +``buffer_size_kb`` (``echo 1000 > buffer_size_kb``). The | |
| 103 | +:ref:`trace/ftrace:trace_pipe` will behave similarly to the ``trace`` file, but | |
| 104 | +whenever you read from the file the content is consumed. | |
| 105 | + | |
| 106 | +Kernelshark | |
| 107 | +~~~~~~~~~~~ | |
| 108 | + | |
| 109 | +A GUI interface to visualize the traces as a graph and list view from the | |
| 110 | +output of the `trace-cmd | |
| 111 | +<https://git.kernel.org/pub/scm/utils/trace-cmd/trace-cmd.git/>`__ application. | |
| 112 | + | |
| 113 | +For the full documentation see `<https://kernelshark.org/Documentation.html>`__ | |
| 114 | + | |
| 115 | +Perf & alternatives | |
| 116 | +------------------- | |
| 117 | + | |
| 118 | +The tools mentioned above provide ways to inspect kernel code, results, | |
| 119 | +variable values, etc. Sometimes you have to find out first where to look and | |
| 120 | +for those cases, a box of performance tracking tools can help you to frame the | |
| 121 | +issue. | |
| 122 | + | |
| 123 | +Why should you do a performance analysis? | |
| 124 | +~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ | |
| 125 | + | |
| 126 | +A performance analysis is a good first step when among other reasons: | |
| 127 | + | |
| 128 | +- you cannot define the issue | |
| 129 | +- you do not know where it occurs | |
| 130 | +- the running system should not be interrupted or it is a remote system, where | |
| 131 | + you cannot install a new module/kernel | |
| 132 | + | |
| 133 | +How to do a simple analysis with linux tools? | |
| 134 | +~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ | |
| 135 | + | |
| 136 | +For the start of a performance analysis, you can start with the usual tools | |
| 137 | +like: | |
| 138 | + | |
| 139 | +- ``top`` / ``htop`` / ``atop`` (*get an overview of the system load, see | |
| 140 | + spikes on specific processes*) | |
| 141 | +- ``mpstat -P ALL`` (*look at the load distribution among CPUs*) | |
| 142 | +- ``iostat -x`` (*observe input and output devices utilization and performance*) | |
| 143 | +- ``vmstat`` (*overview of memory usage on the system*) | |
| 144 | +- ``pidstat`` (*similar to* ``vmstat`` *but per process, to dial it down to the | |
| 145 | + target*) | |
| 146 | +- ``strace -tp $PID`` (*once you know the process, you can figure out how it | |
| 147 | + communicates with the Kernel*) | |
| 148 | + | |
| 149 | +These should help to narrow down the areas to look at sufficiently. | |
| 150 | + | |
| 151 | +Diving deeper with perf | |
| 152 | +~~~~~~~~~~~~~~~~~~~~~~~ | |
| 153 | + | |
| 154 | +The **perf** tool provides a series of metrics and events to further dial down | |
| 155 | +on issues. | |
| 156 | + | |
| 157 | +Prerequisite: build or install perf on your system | |
| 158 | + | |
| 159 | +Gather statistics data for finding all files starting with ``gcc`` in ``/usr``:: | |
| 160 | + | |
| 161 | + # perf stat -d find /usr -name 'gcc*' | wc -l | |
| 162 | + | |
| 163 | + Performance counter stats for 'find /usr -name gcc*': | |
| 164 | + | |
| 165 | + 1277.81 msec task-clock # 0.997 CPUs utilized | |
| 166 | + 9 context-switches # 7.043 /sec | |
| 167 | + 1 cpu-migrations # 0.783 /sec | |
| 168 | + 704 page-faults # 550.943 /sec | |
| 169 | + 766548897 cycles # 0.600 GHz (97.15%) | |
| 170 | + 798285467 instructions # 1.04 insn per cycle (97.15%) | |
| 171 | + 57582731 branches # 45.064 M/sec (2.85%) | |
| 172 | + 3842573 branch-misses # 6.67% of all branches (97.15%) | |
| 173 | + 281616097 L1-dcache-loads # 220.390 M/sec (97.15%) | |
| 174 | + 4220975 L1-dcache-load-misses # 1.50% of all L1-dcache accesses (97.15%) | |
| 175 | + <not supported> LLC-loads | |
| 176 | + <not supported> LLC-load-misses | |
| 177 | + | |
| 178 | + 1.281746009 seconds time elapsed | |
| 179 | + | |
| 180 | + 0.508796000 seconds user | |
| 181 | + 0.773209000 seconds sys | |
| 182 | + | |
| 183 | + | |
| 184 | + 52 | |
| 185 | + | |
| 186 | +The availability of events and metrics depends on the system you are running. | |
| 187 | + | |
| 188 | +For the full documentation see | |
| 189 | +`<https://perf.wiki.kernel.org/index.php/Main_Page>`__ | |
| 190 | + | |
| 191 | +Perfetto | |
| 192 | +~~~~~~~~ | |
| 193 | + | |
| 194 | +A set of tools to measure and analyze how well applications and systems perform. | |
| 195 | +You can use it to: | |
| 196 | + | |
| 197 | +* identify bottlenecks | |
| 198 | +* optimize code | |
| 199 | +* make software run faster and more efficiently. | |
| 200 | + | |
| 201 | +**What is the difference between perfetto and perf?** | |
| 202 | + | |
| 203 | +* perf is tool as part of and specialized for the Linux Kernel and has CLI user | |
| 204 | + interface. | |
| 205 | +* perfetto cross-platform performance analysis stack, has extended | |
| 206 | + functionality into userspace and provides a WEB user interface. | |
| 207 | + | |
| 208 | +For the full documentation see `<https://perfetto.dev/docs/>`__ | |
| 209 | + | |
| 210 | +Kernel panic analysis tools | |
| 211 | +--------------------------- | |
| 212 | + | |
| 213 | + To capture the crash dump please use ``Kdump`` & ``Kexec``. Below you can find | |
| 214 | + some advice for analysing the data. | |
| 215 | + | |
| 216 | + For the full documentation see the :doc:`/admin-guide/kdump/kdump` | |
| 217 | + | |
| 218 | + In order to find the corresponding line in the code you can use `faddr2line | |
| 219 | + <https://elixir.bootlin.com/linux/v6.11.6/source/scripts/faddr2line>`__; note | |
| 220 | + that you need to enable ``CONFIG_DEBUG_INFO`` for that to work. | |
| 221 | + | |
| 222 | + An alternative to using ``faddr2line`` is the use of ``objdump`` (and its | |
| 223 | + derivatives for the different platforms like ``aarch64-linux-gnu-objdump``). | |
| 224 | + Take this line as an example: | |
| 225 | + | |
| 226 | + ``[ +0.000240] rkvdec_device_run+0x50/0x138 [rockchip_vdec]``. | |
| 227 | + | |
| 228 | + We can find the corresponding line of code by executing:: | |
| 229 | + | |
| 230 | + aarch64-linux-gnu-objdump -dS drivers/staging/media/rkvdec/rockchip-vdec.ko | grep rkvdec_device_run\>: -A 40 | |
| 231 | + 0000000000000ac8 <rkvdec_device_run>: | |
| 232 | + ac8: d503201f nop | |
| 233 | + acc: d503201f nop | |
| 234 | + { | |
| 235 | + ad0: d503233f paciasp | |
| 236 | + ad4: a9bd7bfd stp x29, x30, [sp, #-48]! | |
| 237 | + ad8: 910003fd mov x29, sp | |
| 238 | + adc: a90153f3 stp x19, x20, [sp, #16] | |
| 239 | + ae0: a9025bf5 stp x21, x22, [sp, #32] | |
| 240 | + const struct rkvdec_coded_fmt_desc *desc = ctx->coded_fmt_desc; | |
| 241 | + ae4: f9411814 ldr x20, [x0, #560] | |
| 242 | + struct rkvdec_dev *rkvdec = ctx->dev; | |
| 243 | + ae8: f9418015 ldr x21, [x0, #768] | |
| 244 | + if (WARN_ON(!desc)) | |
| 245 | + aec: b4000654 cbz x20, bb4 <rkvdec_device_run+0xec> | |
| 246 | + ret = pm_runtime_resume_and_get(rkvdec->dev); | |
| 247 | + af0: f943d2b6 ldr x22, [x21, #1952] | |
| 248 | + ret = __pm_runtime_resume(dev, RPM_GET_PUT); | |
| 249 | + af4: aa0003f3 mov x19, x0 | |
| 250 | + af8: 52800081 mov w1, #0x4 // #4 | |
| 251 | + afc: aa1603e0 mov x0, x22 | |
| 252 | + b00: 94000000 bl 0 <__pm_runtime_resume> | |
| 253 | + if (ret < 0) { | |
| 254 | + b04: 37f80340 tbnz w0, #31, b6c <rkvdec_device_run+0xa4> | |
| 255 | + dev_warn(rkvdec->dev, "Not good\n"); | |
| 256 | + b08: f943d2a0 ldr x0, [x21, #1952] | |
| 257 | + b0c: 90000001 adrp x1, 0 <rkvdec_try_ctrl-0x8> | |
| 258 | + b10: 91000021 add x1, x1, #0x0 | |
| 259 | + b14: 94000000 bl 0 <_dev_warn> | |
| 260 | + *bad = 1; | |
| 261 | + b18: d2800001 mov x1, #0x0 // #0 | |
| 262 | + ... | |
| 263 | + | |
| 264 | + Meaning, in this line from the crash dump:: | |
| 265 | + | |
| 266 | + [ +0.000240] rkvdec_device_run+0x50/0x138 [rockchip_vdec] | |
| 267 | + | |
| 268 | + I can take the ``0x50`` as offset, which I have to add to the base address | |
| 269 | + of the corresponding function, which I find in this line:: | |
| 270 | + | |
| 271 | + 0000000000000ac8 <rkvdec_device_run>: | |
| 272 | + | |
| 273 | + The result of ``0xac8 + 0x50 = 0xb18`` | |
| 274 | + And when I search for that address within the function I get the | |
| 275 | + following line:: | |
| 276 | + | |
| 277 | + *bad = 1; | |
| 278 | + b18: d2800001 mov x1, #0x0 | |
| 279 | + | |
| 280 | +**Copyright** ©2024 : Collabora | |
| @@ -72,13 +72,15 @@ beyond). · 71 unmodified lines | ||
| 72 | 72 | Dealing with bugs |
| 73 | 73 | ----------------- |
| 74 | 74 | |
| 75 | −Bugs are a fact of life; it is important that we handle them properly. | |
| 76 | −The documents below describe our policies around the handling of a couple | |
| 77 | −of special classes of bugs: regressions and security problems. | |
| 75 | +Bugs are a fact of life; it is important that we handle them properly. The | |
| 76 | +documents below provide general advice about debugging and describe our | |
| 77 | +policies around the handling of a couple of special classes of bugs: | |
| 78 | +regressions and security problems. | |
| 78 | 79 | |
| 79 | 80 | .. toctree:: |
| 80 | 81 | :maxdepth: 1 |
| 81 | 82 | |
| 83 | + debugging/index | |
| 82 | 84 | handling-regressions |
| 83 | 85 | security-bugs |
| 84 | 86 | cve |
| @@ -471,14 +471,16 @@ _`MODULE_LICENSE` · 470 unmodified lines | ||
| 471 | 471 | source files. |
| 472 | 472 | |
| 473 | 473 | "Proprietary" The module is under a proprietary license. |
| 474 | − This string is solely for proprietary third | |
| 475 | − party modules and cannot be used for modules | |
| 476 | − which have their source code in the kernel | |
| 477 | − tree. Modules tagged that way are tainting | |
| 478 | − the kernel with the 'P' flag when loaded and | |
| 479 | − the kernel module loader refuses to link such | |
| 480 | − modules against symbols which are exported | |
| 481 | − with EXPORT_SYMBOL_GPL(). | |
| 474 | + "Proprietary" is to be understood only as | |
| 475 | + "The license is not compatible to GPLv2". | |
| 476 | + This string is solely for non-GPL2 compatible | |
| 477 | + third party modules and cannot be used for | |
| 478 | + modules which have their source code in the | |
| 479 | + kernel tree. Modules tagged that way are | |
| 480 | + tainting the kernel with the 'P' flag when | |
| 481 | + loaded and the kernel module loader refuses | |
| 482 | + to link such modules against symbols which | |
| 483 | + are exported with EXPORT_SYMBOL_GPL(). | |
| 482 | 484 | ============================= ============================================= |
| 483 | 485 | |
| 484 | 486 | |
| @@ -227,3 +227,149 @@ The equivalent in Rust may look like (ignoring documentation): · 226 unmodified lines | ||
| 227 | 227 | That is, the equivalent of ``GPIO_LINE_DIRECTION_IN`` would be referred to as |
| 228 | 228 | ``gpio::LineDirection::In``. In particular, it should not be named |
| 229 | 229 | ``gpio::gpio_line_direction::GPIO_LINE_DIRECTION_IN``. |
| 230 | + | |
| 231 | + | |
| 232 | +Lints | |
| 233 | +----- | |
| 234 | + | |
| 235 | +In Rust, it is possible to ``allow`` particular warnings (diagnostics, lints) | |
| 236 | +locally, making the compiler ignore instances of a given warning within a given | |
| 237 | +function, module, block, etc. | |
| 238 | + | |
| 239 | +It is similar to ``#pragma GCC diagnostic push`` + ``ignored`` + ``pop`` in C | |
| 240 | +[#]_: | |
| 241 | + | |
| 242 | +.. code-block:: c | |
| 243 | + | |
| 244 | + #pragma GCC diagnostic push | |
| 245 | + #pragma GCC diagnostic ignored "-Wunused-function" | |
| 246 | + static void f(void) {} | |
| 247 | + #pragma GCC diagnostic pop | |
| 248 | + | |
| 249 | +.. [#] In this particular case, the kernel's ``__{always,maybe}_unused`` | |
| 250 | + attributes (C23's ``[[maybe_unused]]``) may be used; however, the example | |
| 251 | + is meant to reflect the equivalent lint in Rust discussed afterwards. | |
| 252 | + | |
| 253 | +But way less verbose: | |
| 254 | + | |
| 255 | +.. code-block:: rust | |
| 256 | + | |
| 257 | + #[allow(dead_code)] | |
| 258 | + fn f() {} | |
| 259 | + | |
| 260 | +By that virtue, it makes it possible to comfortably enable more diagnostics by | |
| 261 | +default (i.e. outside ``W=`` levels). In particular, those that may have some | |
| 262 | +false positives but that are otherwise quite useful to keep enabled to catch | |
| 263 | +potential mistakes. | |
| 264 | + | |
| 265 | +On top of that, Rust provides the ``expect`` attribute which takes this further. | |
| 266 | +It makes the compiler warn if the warning was not produced. For instance, the | |
| 267 | +following will ensure that, when ``f()`` is called somewhere, we will have to | |
| 268 | +remove the attribute: | |
| 269 | + | |
| 270 | +.. code-block:: rust | |
| 271 | + | |
| 272 | + #[expect(dead_code)] | |
| 273 | + fn f() {} | |
| 274 | + | |
| 275 | +If we do not, we get a warning from the compiler:: | |
| 276 | + | |
| 277 | + warning: this lint expectation is unfulfilled | |
| 278 | + --> x.rs:3:10 | |
| 279 | + | | |
| 280 | + 3 | #[expect(dead_code)] | |
| 281 | + | ^^^^^^^^^ | |
| 282 | + | | |
| 283 | + = note: `#[warn(unfulfilled_lint_expectations)]` on by default | |
| 284 | + | |
| 285 | +This means that ``expect``\ s do not get forgotten when they are not needed, which | |
| 286 | +may happen in several situations, e.g.: | |
| 287 | + | |
| 288 | +- Temporary attributes added while developing. | |
| 289 | + | |
| 290 | +- Improvements in lints in the compiler, Clippy or custom tools which may | |
| 291 | + remove a false positive. | |
| 292 | + | |
| 293 | +- When the lint is not needed anymore because it was expected that it would be | |
| 294 | + removed at some point, such as the ``dead_code`` example above. | |
| 295 | + | |
| 296 | +It also increases the visibility of the remaining ``allow``\ s and reduces the | |
| 297 | +chance of misapplying one. | |
| 298 | + | |
| 299 | +Thus prefer ``expect`` over ``allow`` unless: | |
| 300 | + | |
| 301 | +- Conditional compilation triggers the warning in some cases but not others. | |
| 302 | + | |
| 303 | + If there are only a few cases where the warning triggers (or does not | |
| 304 | + trigger) compared to the total number of cases, then one may consider using | |
| 305 | + a conditional ``expect`` (i.e. ``cfg_attr(..., expect(...))``). Otherwise, | |
| 306 | + it is likely simpler to just use ``allow``. | |
| 307 | + | |
| 308 | +- Inside macros, when the different invocations may create expanded code that | |
| 309 | + triggers the warning in some cases but not in others. | |
| 310 | + | |
| 311 | +- When code may trigger a warning for some architectures but not others, such | |
| 312 | + as an ``as`` cast to a C FFI type. | |
| 313 | + | |
| 314 | +As a more developed example, consider for instance this program: | |
| 315 | + | |
| 316 | +.. code-block:: rust | |
| 317 | + | |
| 318 | + fn g() {} | |
| 319 | + | |
| 320 | + fn main() { | |
| 321 | + #[cfg(CONFIG_X)] | |
| 322 | + g(); | |
| 323 | + } | |
| 324 | + | |
| 325 | +Here, function ``g()`` is dead code if ``CONFIG_X`` is not set. Can we use | |
| 326 | +``expect`` here? | |
| 327 | + | |
| 328 | +.. code-block:: rust | |
| 329 | + | |
| 330 | + #[expect(dead_code)] | |
| 331 | + fn g() {} | |
| 332 | + | |
| 333 | + fn main() { | |
| 334 | + #[cfg(CONFIG_X)] | |
| 335 | + g(); | |
| 336 | + } | |
| 337 | + | |
| 338 | +This would emit a lint if ``CONFIG_X`` is set, since it is not dead code in that | |
| 339 | +configuration. Therefore, in cases like this, we cannot use ``expect`` as-is. | |
| 340 | + | |
| 341 | +A simple possibility is using ``allow``: | |
| 342 | + | |
| 343 | +.. code-block:: rust | |
| 344 | + | |
| 345 | + #[allow(dead_code)] | |
| 346 | + fn g() {} | |
| 347 | + | |
| 348 | + fn main() { | |
| 349 | + #[cfg(CONFIG_X)] | |
| 350 | + g(); | |
| 351 | + } | |
| 352 | + | |
| 353 | +An alternative would be using a conditional ``expect``: | |
| 354 | + | |
| 355 | +.. code-block:: rust | |
| 356 | + | |
| 357 | + #[cfg_attr(not(CONFIG_X), expect(dead_code))] | |
| 358 | + fn g() {} | |
| 359 | + | |
| 360 | + fn main() { | |
| 361 | + #[cfg(CONFIG_X)] | |
| 362 | + g(); | |
| 363 | + } | |
| 364 | + | |
| 365 | +This would ensure that, if someone introduces another call to ``g()`` somewhere | |
| 366 | +(e.g. unconditionally), then it would be spotted that it is not dead code | |
| 367 | +anymore. However, the ``cfg_attr`` is more complex than a simple ``allow``. | |
| 368 | + | |
| 369 | +Therefore, it is likely that it is not worth using conditional ``expect``\ s when | |
| 370 | +more than one or two configurations are involved or when the lint may be | |
| 371 | +triggered due to non-local changes (such as ``dead_code``). | |
| 372 | + | |
| 373 | +For more information about diagnostics in Rust, please see: | |
| 374 | + | |
| 375 | + https://doc.rust-lang.org/stable/reference/attributes/diagnostics.html | |
| @@ -87,6 +87,23 @@ they should generally work out of the box, e.g.:: · 86 unmodified lines | ||
| 87 | 87 | zypper install rust rust1.79-src rust-bindgen clang |
| 88 | 88 | |
| 89 | 89 | |
| 90 | +Ubuntu | |
| 91 | +****** | |
| 92 | + | |
| 93 | +Ubuntu LTS and non-LTS (interim) releases provide recent Rust releases and thus | |
| 94 | +they should generally work out of the box, e.g.:: | |
| 95 | + | |
| 96 | + apt install rustc-1.80 rust-1.80-src bindgen-0.65 rustfmt-1.80 rust-1.80-clippy | |
| 97 | + | |
| 98 | +``RUST_LIB_SRC`` needs to be set when using the versioned packages, e.g.:: | |
| 99 | + | |
| 100 | + RUST_LIB_SRC=/usr/src/rustc-$(rustc-1.80 --version | cut -d' ' -f2)/library | |
| 101 | + | |
| 102 | +In addition, ``bindgen-0.65`` is available in newer releases (24.04 LTS and | |
| 103 | +24.10), but it may not be available in older ones (20.04 LTS and 22.04 LTS), | |
| 104 | +thus ``bindgen`` may need to be built manually (please see below). | |
| 105 | + | |
| 106 | + | |
| 90 | 107 | Requirements: Building |
| 91 | 108 | ---------------------- |
| 92 | 109 | |
| @@ -42,7 +42,7 @@ If you are interested in the deep debugging of HD-audio, read the · 41 unmodified lines | ||
| 42 | 42 | HD-audio specification at first. The specification is found on |
| 43 | 43 | Intel's web page, for example: |
| 44 | 44 | |
| 45 | −* https://www.intel.com/standards/hdaudio/ | |
| 45 | +* https://www.intel.com/content/www/us/en/standards/high-definition-audio-specification.html | |
| 46 | 46 | |
| 47 | 47 | |
| 48 | 48 | HD-Audio Controller |
| @@ -35,6 +35,9 @@ The graph for the STM32MP1-DK1 sound card is shown in picture: · 34 unmodified lines | ||
| 35 | 35 | :alt: Example DAPM graph |
| 36 | 36 | :align: center |
| 37 | 37 | |
| 38 | +You can also generate compatible graph for your sound card using | |
| 39 | +`tools/sound/dapm-graph` utility. | |
| 40 | + | |
| 38 | 41 | DAPM power domains |
| 39 | 42 | ================== |
| 40 | 43 | |
| @@ -1033,9 +1033,13 @@ explains which is which. · 1032 unmodified lines | ||
| 1033 | 1033 | irqs-off: 'd' interrupts are disabled. '.' otherwise. |
| 1034 | 1034 | |
| 1035 | 1035 | need-resched: |
| 1036 | + - 'B' all, TIF_NEED_RESCHED, PREEMPT_NEED_RESCHED and TIF_RESCHED_LAZY is set, | |
| 1036 | 1037 | - 'N' both TIF_NEED_RESCHED and PREEMPT_NEED_RESCHED is set, |
| 1037 | 1038 | - 'n' only TIF_NEED_RESCHED is set, |
| 1038 | 1039 | - 'p' only PREEMPT_NEED_RESCHED is set, |
| 1040 | + - 'L' both PREEMPT_NEED_RESCHED and TIF_RESCHED_LAZY is set, | |
| 1041 | + - 'b' both TIF_NEED_RESCHED and TIF_RESCHED_LAZY is set, | |
| 1042 | + - 'l' only TIF_RESCHED_LAZY is set | |
| 1039 | 1043 | - '.' otherwise. |
| 1040 | 1044 | |
| 1041 | 1045 | hardirq/softirq: |
| @@ -43,7 +43,7 @@ Tenete presente che per via dell'espansione delle macro questo argomento deve · 42 unmodified lines | ||
| 43 | 43 | essere un simbolo di preprocessore. Per esempio per esportare il |
| 44 | 44 | simbolo ``usb_stor_suspend`` nello spazio dei nomi ``USB_STORAGE`` usate:: |
| 45 | 45 | |
| 46 | − EXPORT_SYMBOL_NS(usb_stor_suspend, USB_STORAGE); | |
| 46 | + EXPORT_SYMBOL_NS(usb_stor_suspend, "USB_STORAGE"); | |
| 47 | 47 | |
| 48 | 48 | Di conseguenza, nella tabella dei simboli del kernel ci sarà una voce |
| 49 | 49 | rappresentata dalla struttura ``kernel_symbol`` che avrà il campo |
| @@ -69,7 +69,7 @@ Per esempio per esportare tutti i simboli definiti in usb-common nello spazio · 19 unmodified lines | ||
| 69 | 69 | dei nomi USB_COMMON, si può aggiungere la seguente linea in |
| 70 | 70 | drivers/usb/common/Makefile:: |
| 71 | 71 | |
| 72 | − ccflags-y += -DDEFAULT_SYMBOL_NAMESPACE=USB_COMMON | |
| 72 | + ccflags-y += -DDEFAULT_SYMBOL_NAMESPACE='"USB_COMMON"' | |
| 73 | 73 | |
| 74 | 74 | Questo cambierà tutte le macro EXPORT_SYMBOL() ed EXPORT_SYMBOL_GPL(). Invece, |
| 75 | 75 | un simbolo esportato con EXPORT_SYMBOL_NS() non verrà cambiato e il simbolo |
| @@ -79,7 +79,7 @@ Una seconda possibilità è quella di definire il simbolo di preprocessore · 3 unmodified lines | ||
| 79 | 79 | direttamente nei file da compilare. L'esempio precedente diventerebbe:: |
| 80 | 80 | |
| 81 | 81 | #undef DEFAULT_SYMBOL_NAMESPACE |
| 82 | − #define DEFAULT_SYMBOL_NAMESPACE USB_COMMON | |
| 82 | + #define DEFAULT_SYMBOL_NAMESPACE "USB_COMMON" | |
| 83 | 83 | |
| 84 | 84 | Questo va messo prima di un qualsiasi uso di EXPORT_SYMBOL. |
| 85 | 85 | |
| @@ -94,7 +94,7 @@ dei nomi che contiene i simboli desiderati. Per esempio un modulo che · 8 unmodified lines | ||
| 94 | 94 | usa il simbolo usb_stor_suspend deve importare lo spazio dei nomi |
| 95 | 95 | USB_STORAGE usando la seguente dichiarazione:: |
| 96 | 96 | |
| 97 | − MODULE_IMPORT_NS(USB_STORAGE); | |
| 97 | + MODULE_IMPORT_NS("USB_STORAGE"); | |
| 98 | 98 | |
| 99 | 99 | Questo creerà un'etichetta ``modinfo`` per ogni spazio dei nomi |
| 100 | 100 | importato. Un risvolto di questo fatto è che gli spazi dei |
| @@ -48,7 +48,7 @@ · 47 unmodified lines | ||
| 48 | 48 | 要是一个预处理器符号。例如，要把符号 ``usb_stor_suspend`` 导出到命名空间 ``USB_STORAGE``， |
| 49 | 49 | 请使用:: |
| 50 | 50 | |
| 51 | − EXPORT_SYMBOL_NS(usb_stor_suspend, USB_STORAGE); | |
| 51 | + EXPORT_SYMBOL_NS(usb_stor_suspend, "USB_STORAGE"); | |
| 52 | 52 | |
| 53 | 53 | 相应的 ksymtab 条目结构体 ``kernel_symbol`` 将有相应的成员 ``命名空间`` 集。 |
| 54 | 54 | 导出时未指明命名空间的符号将指向 ``NULL`` 。如果没有定义命名空间，则默认没有。 |
| @@ -66,7 +66,7 @@ · 11 unmodified lines | ||
| 66 | 66 | 子系统的 ``Makefile`` 中定义默认命名空间。例如，如果要将usb-common中定义的所有符号导 |
| 67 | 67 | 出到USB_COMMON命名空间，可以在drivers/usb/common/Makefile中添加这样一行:: |
| 68 | 68 | |
| 69 | − ccflags-y += -DDEFAULT_SYMBOL_NAMESPACE=USB_COMMON | |
| 69 | + ccflags-y += -DDEFAULT_SYMBOL_NAMESPACE='"USB_COMMON"' | |
| 70 | 70 | |
| 71 | 71 | 这将影响所有 EXPORT_SYMBOL() 和 EXPORT_SYMBOL_GPL() 语句。当这个定义存在时， |
| 72 | 72 | 用EXPORT_SYMBOL_NS()导出的符号仍然会被导出到作为命名空间参数传递的命名空间中， |
| @@ -76,7 +76,7 @@ · 3 unmodified lines | ||
| 76 | 76 | 成:: |
| 77 | 77 | |
| 78 | 78 | #undef DEFAULT_SYMBOL_NAMESPACE |
| 79 | − #define DEFAULT_SYMBOL_NAMESPACE USB_COMMON | |
| 79 | + #define DEFAULT_SYMBOL_NAMESPACE "USB_COMMON" | |
| 80 | 80 | |
| 81 | 81 | 应置于相关编译单元中任何 EXPORT_SYMBOL 宏之前 |
| 82 | 82 | |
| @@ -88,7 +88,7 @@ · 5 unmodified lines | ||
| 88 | 88 | 表示它所使用的命名空间的符号。例如，一个使用usb_stor_suspend符号的 |
| 89 | 89 | 模块，需要使用如下语句导入命名空间USB_STORAGE:: |
| 90 | 90 | |
| 91 | − MODULE_IMPORT_NS(USB_STORAGE); | |
| 91 | + MODULE_IMPORT_NS("USB_STORAGE"); | |
| 92 | 92 | |
| 93 | 93 | 这将在模块中为每个导入的命名空间创建一个 ``modinfo`` 标签。这也顺带 |
| 94 | 94 | 使得可以用modinfo检查模块已导入的命名空间:: |
| @@ -120,16 +120,6 @@ coh901327_wdt: · 119 unmodified lines | ||
| 120 | 120 | |
| 121 | 121 | ------------------------------------------------- |
| 122 | 122 | |
| 123 | −cpu5wdt: | |
| 124 | − port: | |
| 125 | − base address of watchdog card, default is 0x91 | |
| 126 | − verbose: | |
| 127 | − be verbose, default is 0 (no) | |
| 128 | − ticks: | |
| 129 | − count down ticks, default is 10000 | |
| 130 | − | |
| 131 | −------------------------------------------------- | |
| 132 | − | |
| 133 | 123 | cpwd: |
| 134 | 124 | wd0_timeout: |
| 135 | 125 | Default watchdog0 timeout in 1/10secs |
| @@ -1218,6 +1218,14 @@ F: Documentation/devicetree/bindings/perf/amlogic,g12-ddr-pmu.yaml · 1217 unmodified lines | ||
| 1218 | 1218 | F: drivers/perf/amlogic/ |
| 1219 | 1219 | F: include/soc/amlogic/ |
| 1220 | 1220 | |
| 1221 | +AMLOGIC RTC DRIVER | |
| 1222 | +M: Yiting Deng <yiting.deng@amlogic.com> | |
| 1223 | +M: Xianwei Zhao <xianwei.zhao@amlogic.com> | |
| 1224 | +L: linux-amlogic@lists.infradead.org | |
| 1225 | +S: Maintained | |
| 1226 | +F: Documentation/devicetree/bindings/rtc/amlogic,a4-rtc.yaml | |
| 1227 | +F: drivers/rtc/rtc-amlogic-a4.c | |
| 1228 | + | |
| 1221 | 1229 | AMPHENOL CHIPCAP 2 HUMIDITY-TEMPERATURE IIO DRIVER |
| 1222 | 1230 | M: Javier Carrasco <javier.carrasco.cruz@gmail.com> |
| 1223 | 1231 | L: linux-hwmon@vger.kernel.org |
| @@ -1271,7 +1279,6 @@ M: Cosmin Tanislav <cosmin.tanislav@analog.com> · 47 unmodified lines | ||
| 1271 | 1279 | L: linux-iio@vger.kernel.org |
| 1272 | 1280 | S: Supported |
| 1273 | 1281 | W: https://ez.analog.com/linux-software-drivers |
| 1274 | −F: Documentation/ABI/testing/sysfs-bus-iio-adc-ad4130 | |
| 1275 | 1282 | F: Documentation/devicetree/bindings/iio/adc/adi,ad4130.yaml |
| 1276 | 1283 | F: drivers/iio/adc/ad4130.c |
| 1277 | 1284 | |
| @@ -1336,6 +1343,17 @@ F: Documentation/devicetree/bindings/iio/addac/adi,ad74413r.yaml · 58 unmodified lines | ||
| 1336 | 1343 | F: drivers/iio/addac/ad74413r.c |
| 1337 | 1344 | F: include/dt-bindings/iio/addac/adi,ad74413r.h |
| 1338 | 1345 | |
| 1346 | +ANALOG DEVICES INC AD7625 DRIVER | |
| 1347 | +M: Michael Hennerich <Michael.Hennerich@analog.com> | |
| 1348 | +M: Nuno Sá <nuno.sa@analog.com> | |
| 1349 | +R: Trevor Gamblin <tgamblin@baylibre.com> | |
| 1350 | +S: Supported | |
| 1351 | +W: https://ez.analog.com/linux-software-drivers | |
| 1352 | +W: http://analogdevicesinc.github.io/hdl/projects/pulsar_lvds/index.html | |
| 1353 | +F: Documentation/devicetree/bindings/iio/adc/adi,ad7625.yaml | |
| 1354 | +F: Documentation/iio/ad7625.rst | |
| 1355 | +F: drivers/iio/adc/ad7625.c | |
| 1356 | + | |
| 1339 | 1357 | ANALOG DEVICES INC AD7768-1 DRIVER |
| 1340 | 1358 | M: Michael Hennerich <Michael.Hennerich@analog.com> |
| 1341 | 1359 | L: linux-iio@vger.kernel.org |
| @@ -1363,6 +1381,14 @@ F: Documentation/ABI/testing/debugfs-iio-ad9467 · 21 unmodified lines | ||
| 1363 | 1381 | F: Documentation/devicetree/bindings/iio/adc/adi,ad9467.yaml |
| 1364 | 1382 | F: drivers/iio/adc/ad9467.c |
| 1365 | 1383 | |
| 1384 | +ANALOG DEVICES INC AD8460 DRIVER | |
| 1385 | +M: Mariel Tinaco <Mariel.Tinaco@analog.com> | |
| 1386 | +L: linux-iio@vger.kernel.org | |
| 1387 | +S: Supported | |
| 1388 | +W: https://ez.analog.com/linux-software-drivers | |
| 1389 | +F: Documentation/devicetree/bindings/iio/dac/adi,ad8460.yaml | |
| 1390 | +F: drivers/iio/dac/ad8460.c | |
| 1391 | + | |
| 1366 | 1392 | ANALOG DEVICES INC AD9739a DRIVER |
| 1367 | 1393 | M: Nuno Sa <nuno.sa@analog.com> |
| 1368 | 1394 | M: Dragos Bogdan <dragos.bogdan@analog.com> |
| @@ -1563,6 +1589,7 @@ F: Documentation/ABI/testing/sysfs-bus-iio-frequency-adf4350 · 194 unmodified lines | ||
| 1563 | 1589 | F: Documentation/devicetree/bindings/iio/*/adi,* |
| 1564 | 1590 | F: Documentation/devicetree/bindings/iio/adc/lltc,ltc2496.yaml |
| 1565 | 1591 | F: Documentation/devicetree/bindings/iio/adc/lltc,ltc2497.yaml |
| 1592 | +F: Documentation/iio/ad7606.rst | |
| 1566 | 1593 | F: drivers/iio/*/ad* |
| 1567 | 1594 | F: drivers/iio/adc/ltc249* |
| 1568 | 1595 | F: drivers/iio/amplifiers/hmc425a.c |
| @@ -2213,7 +2240,7 @@ F: drivers/mmc/host/usdhi6rol0.c · 644 unmodified lines | ||
| 2213 | 2240 | F: drivers/pinctrl/pinctrl-artpec* |
| 2214 | 2241 | |
| 2215 | 2242 | ARM/ASPEED I2C DRIVER |
| 2216 | −M: Brendan Higgins <brendanhiggins@google.com> | |
| 2243 | +M: Ryan Chen <ryan_chen@aspeedtech.com> | |
| 2217 | 2244 | R: Benjamin Herrenschmidt <benh@kernel.crashing.org> |
| 2218 | 2245 | R: Joel Stanley <joel@jms.id.au> |
| 2219 | 2246 | L: linux-i2c@vger.kernel.org |
| @@ -2924,6 +2951,7 @@ Q: http://patchwork.kernel.org/project/linux-renesas-soc/list/ · 704 unmodified lines | ||
| 2924 | 2951 | C: irc://irc.libera.chat/renesas-soc |
| 2925 | 2952 | T: git git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel.git next |
| 2926 | 2953 | F: Documentation/devicetree/bindings/hwinfo/renesas,prr.yaml |
| 2954 | +F: Documentation/devicetree/bindings/nvmem/renesas,* | |
| 2927 | 2955 | F: Documentation/devicetree/bindings/soc/renesas/ |
| 2928 | 2956 | F: arch/arm/boot/dts/renesas/ |
| 2929 | 2957 | F: arch/arm/configs/shmobile_defconfig |
| @@ -2931,6 +2959,7 @@ F: arch/arm/include/debug/renesas-scif.S · 1 unmodified line | ||
| 2931 | 2959 | F: arch/arm/mach-shmobile/ |
| 2932 | 2960 | F: arch/arm64/boot/dts/renesas/ |
| 2933 | 2961 | F: arch/riscv/boot/dts/renesas/ |
| 2962 | +F: drivers/nvmem/rcar-efuse.c | |
| 2934 | 2963 | F: drivers/pmdomain/renesas/ |
| 2935 | 2964 | F: drivers/soc/renesas/ |
| 2936 | 2965 | F: include/linux/soc/renesas/ |
| @@ -3686,6 +3715,13 @@ F: kernel/audit* · 749 unmodified lines | ||
| 3686 | 3715 | F: lib/*audit.c |
| 3687 | 3716 | K: \baudit_[a-z_0-9]\+\b |
| 3688 | 3717 | |
| 3718 | +AUTOFDO BUILD | |
| 3719 | +M: Rong Xu <xur@google.com> | |
| 3720 | +M: Han Shen <shenhan@google.com> | |
| 3721 | +S: Supported | |
| 3722 | +F: Documentation/dev-tools/autofdo.rst | |
| 3723 | +F: scripts/Makefile.autofdo | |
| 3724 | + | |
| 3689 | 3725 | AUXILIARY BUS DRIVER |
| 3690 | 3726 | M: Greg Kroah-Hartman <gregkh@linuxfoundation.org> |
| 3691 | 3727 | R: Dave Ertman <david.m.ertman@intel.com> |
| @@ -4036,6 +4072,13 @@ S: Maintained · 344 unmodified lines | ||
| 4036 | 4072 | F: Documentation/devicetree/bindings/iio/accel/bosch,bma400.yaml |
| 4037 | 4073 | F: drivers/iio/accel/bma400* |
| 4038 | 4074 | |
| 4075 | +BOSCH SENSORTEC BMI270 IMU IIO DRIVER | |
| 4076 | +M: Alex Lanzano <lanzano.alex@gmail.com> | |
| 4077 | +L: linux-iio@vger.kernel.org | |
| 4078 | +S: Maintained | |
| 4079 | +F: Documentation/devicetree/bindings/iio/imu/bosch,bmi270.yaml | |
| 4080 | +F: drivers/iio/imu/bmi270/ | |
| 4081 | + | |
| 4039 | 4082 | BOSCH SENSORTEC BMI323 IMU IIO DRIVER |
| 4040 | 4083 | M: Jagath Jog J <jagathjog1996@gmail.com> |
| 4041 | 4084 | L: linux-iio@vger.kernel.org |
| @@ -9483,6 +9526,14 @@ M: Kieran Bingham <kbingham@kernel.org> · 5441 unmodified lines | ||
| 9483 | 9526 | S: Supported |
| 9484 | 9527 | F: scripts/gdb/ |
| 9485 | 9528 | |
| 9529 | +GE HEALTHCARE PMC ADC DRIVER | |
| 9530 | +M: Herve Codina <herve.codina@bootlin.com> | |
| 9531 | +L: linux-iio@vger.kernel.org | |
| 9532 | +S: Maintained | |
| 9533 | +F: Documentation/devicetree/bindings/iio/adc/gehc,pmc-adc.yaml | |
| 9534 | +F: drivers/iio/adc/gehc-pmc-adc.c | |
| 9535 | +F: include/dt-bindings/iio/adc/gehc,pmc-adc.h | |
| 9536 | + | |
| 9486 | 9537 | GEMINI CRYPTO DRIVER |
| 9487 | 9538 | M: Corentin Labbe <clabbe@baylibre.com> |
| 9488 | 9539 | L: linux-crypto@vger.kernel.org |
| @@ -9718,6 +9769,11 @@ L: platform-driver-x86@vger.kernel.org · 229 unmodified lines | ||
| 9718 | 9769 | S: Maintained |
| 9719 | 9770 | F: drivers/platform/x86/gpd-pocket-fan.c |
| 9720 | 9771 | |
| 9772 | +GPIB DRIVERS | |
| 9773 | +M: Dave Penkler <dpenkler@gmail.com> | |
| 9774 | +S: Maintained | |
| 9775 | +F: drivers/staging/gpib/ | |
| 9776 | + | |
| 9721 | 9777 | GPIO ACPI SUPPORT |
| 9722 | 9778 | M: Mika Westerberg <mika.westerberg@linux.intel.com> |
| 9723 | 9779 | M: Andy Shevchenko <andriy.shevchenko@linux.intel.com> |
| @@ -10702,6 +10758,14 @@ S: Maintained · 978 unmodified lines | ||
| 10702 | 10758 | F: Documentation/devicetree/bindings/i2c/marvell,mv64xxx-i2c.yaml |
| 10703 | 10759 | F: drivers/i2c/busses/i2c-mv64xxx.c |
| 10704 | 10760 | |
| 10761 | +I2C OF COMPONENT PROBER | |
| 10762 | +M: Chen-Yu Tsai <wenst@chromium.org> | |
| 10763 | +L: linux-i2c@vger.kernel.org | |
| 10764 | +L: devicetree@vger.kernel.org | |
| 10765 | +S: Maintained | |
| 10766 | +F: drivers/i2c/i2c-core-of-prober.c | |
| 10767 | +F: include/linux/i2c-of-prober.h | |
| 10768 | + | |
| 10705 | 10769 | I2C OVER PARALLEL PORT |
| 10706 | 10770 | M: Jean Delvare <jdelvare@suse.com> |
| 10707 | 10771 | L: linux-i2c@vger.kernel.org |
| @@ -11641,7 +11705,7 @@ F: drivers/usb/misc/usb-ljca.c · 933 unmodified lines | ||
| 11641 | 11705 | F: include/linux/usb/ljca.h |
| 11642 | 11706 | |
| 11643 | 11707 | INTEL MANAGEMENT ENGINE (mei) |
| 11644 | −M: Tomas Winkler <tomas.winkler@intel.com> | |
| 11708 | +M: Alexander Usyskin <alexander.usyskin@intel.com> | |
| 11645 | 11709 | L: linux-kernel@vger.kernel.org |
| 11646 | 11710 | S: Supported |
| 11647 | 11711 | F: Documentation/driver-api/mei/* |
| @@ -11922,7 +11986,7 @@ F: Documentation/devicetree/bindings/media/i2c/isil,isl79987.yaml · 274 unmodified lines | ||
| 11922 | 11986 | F: drivers/media/i2c/isl7998x.c |
| 11923 | 11987 | |
| 11924 | 11988 | INVENSENSE ICM-426xx IMU DRIVER |
| 11925 | −M: Jean-Baptiste Maneyrol <jmaneyrol@invensense.com> | |
| 11989 | +M: Jean-Baptiste Maneyrol <jean-baptiste.maneyrol@tdk.com> | |
| 11926 | 11990 | L: linux-iio@vger.kernel.org |
| 11927 | 11991 | S: Maintained |
| 11928 | 11992 | W: https://invensense.tdk.com/ |
| @@ -11937,6 +12001,14 @@ S: Maintained · 8 unmodified lines | ||
| 11937 | 12001 | F: Documentation/devicetree/bindings/iio/gyroscope/invensense,mpu3050.yaml |
| 11938 | 12002 | F: drivers/iio/gyro/mpu3050* |
| 11939 | 12003 | |
| 12004 | +INVENSENSE MPU-6050 IMU DRIVER | |
| 12005 | +M: Jean-Baptiste Maneyrol <jean-baptiste.maneyrol@tdk.com> | |
| 12006 | +L: linux-iio@vger.kernel.org | |
| 12007 | +S: Maintained | |
| 12008 | +W: https://invensense.tdk.com/ | |
| 12009 | +F: Documentation/devicetree/bindings/iio/imu/invensense,mpu6050.yaml | |
| 12010 | +F: drivers/iio/imu/inv_mpu6050/ | |
| 12011 | + | |
| 11940 | 12012 | IOC3 ETHERNET DRIVER |
| 11941 | 12013 | M: Thomas Bogendoerfer <tsbogend@alpha.franken.de> |
| 11942 | 12014 | L: linux-mips@vger.kernel.org |
| @@ -12403,7 +12475,7 @@ F: mm/usercopy.c · 460 unmodified lines | ||
| 12403 | 12475 | F: security/Kconfig.hardening |
| 12404 | 12476 | K: \b(add|choose)_random_kstack_offset\b |
| 12405 | 12477 | K: \b__check_(object_size|heap_object)\b |
| 12406 | −K: \b__counted_by\b | |
| 12478 | +K: \b__counted_by(_le|_be)?\b | |
| 12407 | 12479 | |
| 12408 | 12480 | KERNEL JANITORS |
| 12409 | 12481 | L: kernel-janitors@vger.kernel.org |
| @@ -12436,6 +12508,7 @@ F: include/trace/misc/sunrpc.h · 26 unmodified lines | ||
| 12436 | 12508 | F: include/uapi/linux/nfsd/ |
| 12437 | 12509 | F: include/uapi/linux/sunrpc/ |
| 12438 | 12510 | F: net/sunrpc/ |
| 12511 | +F: tools/net/sunrpc/ | |
| 12439 | 12512 | |
| 12440 | 12513 | KERNEL PACMAN PACKAGING (in addition to generic KERNEL BUILD) |
| 12441 | 12514 | M: Thomas Weißschuh <linux@weissschuh.net> |
| @@ -13407,12 +13480,12 @@ S: Maintained · 965 unmodified lines | ||
| 13407 | 13480 | F: Documentation/devicetree/bindings/gpio/loongson,ls-gpio.yaml |
| 13408 | 13481 | F: drivers/gpio/gpio-loongson-64bit.c |
| 13409 | 13482 | |
| 13410 | −LOONGSON LS2X APB DMA DRIVER | |
| 13483 | +LOONGSON-2 APB DMA DRIVER | |
| 13411 | 13484 | M: Binbin Zhou <zhoubinbin@loongson.cn> |
| 13412 | 13485 | L: dmaengine@vger.kernel.org |
| 13413 | 13486 | S: Maintained |
| 13414 | 13487 | F: Documentation/devicetree/bindings/dma/loongson,ls2x-apbdma.yaml |
| 13415 | −F: drivers/dma/ls2x-apb-dma.c | |
| 13488 | +F: drivers/dma/loongson2-apb-dma.c | |
| 13416 | 13489 | |
| 13417 | 13490 | LOONGSON LS2X I2C DRIVER |
| 13418 | 13491 | M: Binbin Zhou <zhoubinbin@loongson.cn> |
| @@ -13744,6 +13817,7 @@ F: Documentation/devicetree/bindings/mfd/marvell,88pm886-a1.yaml · 325 unmodified lines | ||
| 13744 | 13817 | F: drivers/input/misc/88pm886-onkey.c |
| 13745 | 13818 | F: drivers/mfd/88pm886.c |
| 13746 | 13819 | F: drivers/regulator/88pm886-regulator.c |
| 13820 | +F: drivers/rtc/rtc-88pm886.c | |
| 13747 | 13821 | F: include/linux/mfd/88pm886.h |
| 13748 | 13822 | |
| 13749 | 13823 | MARVELL ARMADA 3700 PHY DRIVERS |
| @@ -13926,6 +14000,12 @@ R: schalla@marvell.com · 176 unmodified lines | ||
| 13926 | 14000 | R: vattunuru@marvell.com |
| 13927 | 14001 | F: drivers/vdpa/octeon_ep/ |
| 13928 | 14002 | |
| 14003 | +MARVELL OCTEON HOTPLUG DRIVER | |
| 14004 | +R: Shijith Thotton <sthotton@marvell.com> | |
| 14005 | +R: Vamsi Attunuru <vattunuru@marvell.com> | |
| 14006 | +S: Supported | |
| 14007 | +F: drivers/pci/hotplug/octep_hp.c | |
| 14008 | + | |
| 13929 | 14009 | MATROX FRAMEBUFFER DRIVER |
| 13930 | 14010 | L: linux-fbdev@vger.kernel.org |
| 13931 | 14011 | S: Orphan |
| @@ -15585,6 +15665,15 @@ F: arch/arm/boot/dts/marvell/armada-xp-crs326-24g-2s.dts · 1653 unmodified lines | ||
| 15585 | 15665 | F: arch/arm/boot/dts/marvell/armada-xp-crs328-4c-20s-4s-bit.dts |
| 15586 | 15666 | F: arch/arm/boot/dts/marvell/armada-xp-crs328-4c-20s-4s.dts |
| 15587 | 15667 | |
| 15668 | +MIN HEAP | |
| 15669 | +M: Kuan-Wei Chiu <visitorckw@gmail.com> | |
| 15670 | +L: linux-kernel@vger.kernel.org | |
| 15671 | +S: Maintained | |
| 15672 | +F: Documentation/core-api/min_heap.rst | |
| 15673 | +F: include/linux/min_heap.h | |
| 15674 | +F: lib/min_heap.c | |
| 15675 | +F: lib/test_min_heap.c | |
| 15676 | + | |
| 15588 | 15677 | MIPI CCS, SMIA AND SMIA++ IMAGE SENSOR DRIVER |
| 15589 | 15678 | M: Sakari Ailus <sakari.ailus@linux.intel.com> |
| 15590 | 15679 | L: linux-media@vger.kernel.org |
| @@ -16288,6 +16377,7 @@ X: include/net/wext.h · 697 unmodified lines | ||
| 16288 | 16377 | X: net/9p/ |
| 16289 | 16378 | X: net/bluetooth/ |
| 16290 | 16379 | X: net/can/ |
| 16380 | +X: net/ceph/ | |
| 16291 | 16381 | X: net/mac80211/ |
| 16292 | 16382 | X: net/rfkill/ |
| 16293 | 16383 | X: net/wireless/ |
| @@ -16570,6 +16660,7 @@ NOVATEK NVT-TS I2C TOUCHSCREEN DRIVER · 276 unmodified lines | ||
| 16570 | 16660 | M: Hans de Goede <hdegoede@redhat.com> |
| 16571 | 16661 | L: linux-input@vger.kernel.org |
| 16572 | 16662 | S: Maintained |
| 16663 | +F: Documentation/devicetree/bindings/input/touchscreen/novatek,nvt-ts.yaml | |
| 16573 | 16664 | F: drivers/input/touchscreen/novatek-nvt-ts.c |
| 16574 | 16665 | |
| 16575 | 16666 | NSDEPS |
| @@ -17983,8 +18074,8 @@ M: Bartosz Golaszewski <brgl@bgdev.pl> · 1407 unmodified lines | ||
| 17983 | 18074 | L: linux-pci@vger.kernel.org |
| 17984 | 18075 | S: Maintained |
| 17985 | 18076 | T: git git://git.kernel.org/pub/scm/linux/kernel/git/pci/pci.git |
| 17986 | −F: drivers/pci/pwrctl/* | |
| 17987 | −F: include/linux/pci-pwrctl.h | |
| 18077 | +F: drivers/pci/pwrctrl/* | |
| 18078 | +F: include/linux/pci-pwrctrl.h | |
| 17988 | 18079 | |
| 17989 | 18080 | PCI SUBSYSTEM |
| 17990 | 18081 | M: Bjorn Helgaas <bhelgaas@google.com> |
| @@ -18006,6 +18097,15 @@ F: include/linux/of_pci.h · 15 unmodified lines | ||
| 18006 | 18097 | F: include/linux/pci* |
| 18007 | 18098 | F: include/uapi/linux/pci* |
| 18008 | 18099 | |
| 18100 | +PCIE BANDWIDTH CONTROLLER | |
| 18101 | +M: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com> | |
| 18102 | +L: linux-pci@vger.kernel.org | |
| 18103 | +S: Supported | |
| 18104 | +F: drivers/pci/pcie/bwctrl.c | |
| 18105 | +F: drivers/thermal/pcie_cooling.c | |
| 18106 | +F: include/linux/pci-bwctrl.h | |
| 18107 | +F: tools/testing/selftests/pcie_bwctrl/ | |
| 18108 | + | |
| 18009 | 18109 | PCIE DRIVER FOR AMAZON ANNAPURNA LABS |
| 18010 | 18110 | M: Jonathan Chocron <jonnyc@amazon.com> |
| 18011 | 18111 | L: linux-pci@vger.kernel.org |
| @@ -18305,6 +18405,13 @@ F: drivers/pinctrl/ · 293 unmodified lines | ||
| 18305 | 18405 | F: include/dt-bindings/pinctrl/ |
| 18306 | 18406 | F: include/linux/pinctrl/ |
| 18307 | 18407 | |
| 18408 | +PIN CONTROLLER - AIROHA | |
| 18409 | +M: Lorenzo Bianconi <lorenzo@kernel.org> | |
| 18410 | +L: linux-mediatek@lists.infradead.org (moderated for non-subscribers) | |
| 18411 | +S: Maintained | |
| 18412 | +F: Documentation/devicetree/bindings/pinctrl/airoha,en7581-pinctrl.yaml | |
| 18413 | +F: drivers/pinctrl/mediatek/pinctrl-airoha.c | |
| 18414 | + | |
| 18308 | 18415 | PIN CONTROLLER - AMD |
| 18309 | 18416 | M: Basavaraj Natikar <Basavaraj.Natikar@amd.com> |
| 18310 | 18417 | M: Shyam Sundar S K <Shyam-sundar.S-k@amd.com> |
| @@ -18616,6 +18723,13 @@ S: Maintained · 305 unmodified lines | ||
| 18616 | 18723 | F: include/linux/psi* |
| 18617 | 18724 | F: kernel/sched/psi.c |
| 18618 | 18725 | |
| 18726 | +PROPELLER BUILD | |
| 18727 | +M: Rong Xu <xur@google.com> | |
| 18728 | +M: Han Shen <shenhan@google.com> | |
| 18729 | +S: Supported | |
| 18730 | +F: Documentation/dev-tools/propeller.rst | |
| 18731 | +F: scripts/Makefile.propeller | |
| 18732 | + | |
| 18619 | 18733 | PRINTK |
| 18620 | 18734 | M: Petr Mladek <pmladek@suse.com> |
| 18621 | 18735 | R: Steven Rostedt <rostedt@goodmis.org> |
| @@ -19832,6 +19946,14 @@ S: Supported · 1210 unmodified lines | ||
| 19832 | 19946 | F: Documentation/devicetree/bindings/timer/renesas,rz-mtu3.yaml |
| 19833 | 19947 | F: drivers/counter/rz-mtu3-cnt.c |
| 19834 | 19948 | |
| 19949 | +RENESAS RTCA-3 RTC DRIVER | |
| 19950 | +M: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> | |
| 19951 | +L: linux-rtc@vger.kernel.org | |
| 19952 | +L: linux-renesas-soc@vger.kernel.org | |
| 19953 | +S: Supported | |
| 19954 | +F: Documentation/devicetree/bindings/rtc/renesas,rz-rtca3.yaml | |
| 19955 | +F: drivers/rtc/rtc-renesas-rtca3.c | |
| 19956 | + | |
| 19835 | 19957 | RENESAS RZ/N1 A5PSW SWITCH DRIVER |
| 19836 | 19958 | M: Clément Léger <clement.leger@bootlin.com> |
| 19837 | 19959 | L: linux-renesas-soc@vger.kernel.org |
| @@ -20062,10 +20184,14 @@ L: linux-riscv@lists.infradead.org · 224 unmodified lines | ||
| 20062 | 20184 | S: Maintained |
| 20063 | 20185 | T: git https://github.com/pdp7/linux.git |
| 20064 | 20186 | F: Documentation/devicetree/bindings/clock/thead,th1520-clk-ap.yaml |
| 20187 | +F: Documentation/devicetree/bindings/mailbox/thead,th1520-mbox.yaml | |
| 20065 | 20188 | F: Documentation/devicetree/bindings/net/thead,th1520-gmac.yaml |
| 20189 | +F: Documentation/devicetree/bindings/pinctrl/thead,th1520-pinctrl.yaml | |
| 20066 | 20190 | F: arch/riscv/boot/dts/thead/ |
| 20067 | 20191 | F: drivers/clk/thead/clk-th1520-ap.c |
| 20192 | +F: drivers/mailbox/mailbox-th1520.c | |
| 20068 | 20193 | F: drivers/net/ethernet/stmicro/stmmac/dwmac-thead.c |
| 20194 | +F: drivers/pinctrl/pinctrl-th1520.c | |
| 20069 | 20195 | F: include/dt-bindings/clock/thead,th1520-clk-ap.h |
| 20070 | 20196 | |
| 20071 | 20197 | RNBD BLOCK DRIVERS |
| @@ -20346,13 +20472,22 @@ B: https://github.com/Rust-for-Linux/linux/issues · 274 unmodified lines | ||
| 20346 | 20472 | C: zulip://rust-for-linux.zulipchat.com |
| 20347 | 20473 | P: https://rust-for-linux.com/contributing |
| 20348 | 20474 | T: git https://github.com/Rust-for-Linux/linux.git rust-next |
| 20475 | +F: .clippy.toml | |
| 20349 | 20476 | F: Documentation/rust/ |
| 20477 | +F: include/trace/events/rust_sample.h | |
| 20350 | 20478 | F: rust/ |
| 20351 | 20479 | F: samples/rust/ |
| 20352 | 20480 | F: scripts/*rust* |
| 20353 | 20481 | F: tools/testing/selftests/rust/ |
| 20354 | 20482 | K: \b(?i:rust)\b |
| 20355 | 20483 | |
| 20484 | +RUST [ALLOC] | |
| 20485 | +M: Danilo Krummrich <dakr@kernel.org> | |
| 20486 | +L: rust-for-linux@vger.kernel.org | |
| 20487 | +S: Maintained | |
| 20488 | +F: rust/kernel/alloc.rs | |
| 20489 | +F: rust/kernel/alloc/ | |
| 20490 | + | |
| 20356 | 20491 | RXRPC SOCKETS (AF_RXRPC) |
| 20357 | 20492 | M: David Howells <dhowells@redhat.com> |
| 20358 | 20493 | M: Marc Dionne <marc.dionne@auristor.com> |
| @@ -22089,17 +22224,6 @@ L: linux-media@vger.kernel.org · 1730 unmodified lines | ||
| 22089 | 22224 | S: Maintained |
| 22090 | 22225 | F: drivers/staging/media/atomisp/ |
| 22091 | 22226 | |
| 22092 | −STAGING - FIELDBUS SUBSYSTEM | |
| 22093 | −M: Sven Van Asbroeck <TheSven73@gmail.com> | |
| 22094 | −S: Maintained | |
| 22095 | −F: drivers/staging/fieldbus/* | |
| 22096 | −F: drivers/staging/fieldbus/Documentation/ | |
| 22097 | − | |
| 22098 | −STAGING - HMS ANYBUS-S BUS | |
| 22099 | −M: Sven Van Asbroeck <TheSven73@gmail.com> | |
| 22100 | −S: Maintained | |
| 22101 | −F: drivers/staging/fieldbus/anybuss/ | |
| 22102 | − | |
| 22103 | 22227 | STAGING - INDUSTRIAL IO |
| 22104 | 22228 | M: Jonathan Cameron <jic23@kernel.org> |
| 22105 | 22229 | L: linux-iio@vger.kernel.org |
| @@ -22114,18 +22238,6 @@ L: linux-tegra@vger.kernel.org · 8 unmodified lines | ||
| 22114 | 22238 | S: Maintained |
| 22115 | 22239 | F: drivers/staging/nvec/ |
| 22116 | 22240 | |
| 22117 | −STAGING - OLPC SECONDARY DISPLAY CONTROLLER (DCON) | |
| 22118 | −M: Jens Frederich <jfrederich@gmail.com> | |
| 22119 | −M: Jon Nettleton <jon.nettleton@gmail.com> | |
| 22120 | −S: Maintained | |
| 22121 | −W: http://wiki.laptop.org/go/DCON | |
| 22122 | −F: drivers/staging/olpc_dcon/ | |
| 22123 | − | |
| 22124 | −STAGING - REALTEK RTL8712U DRIVERS | |
| 22125 | −M: Florian Schilhabel <florian.c.schilhabel@googlemail.com>. | |
| 22126 | −S: Odd Fixes | |
| 22127 | −F: drivers/staging/rtl8712/ | |
| 22128 | − | |
| 22129 | 22241 | STAGING - SEPS525 LCD CONTROLLER DRIVERS |
| 22130 | 22242 | M: Michael Hennerich <michael.hennerich@analog.com> |
| 22131 | 22243 | L: linux-fbdev@vger.kernel.org |
| @@ -22141,11 +22253,6 @@ L: linux-fbdev@vger.kernel.org · 9 unmodified lines | ||
| 22141 | 22253 | S: Maintained |
| 22142 | 22254 | F: drivers/staging/sm750fb/ |
| 22143 | 22255 | |
| 22144 | −STAGING - VIA VT665X DRIVERS | |
| 22145 | −M: Philipp Hortmann <philipp.g.hortmann@gmail.com> | |
| 22146 | −S: Odd Fixes | |
| 22147 | −F: drivers/staging/vt665?/ | |
| 22148 | − | |
| 22149 | 22256 | STAGING SUBSYSTEM |
| 22150 | 22257 | M: Greg Kroah-Hartman <gregkh@linuxfoundation.org> |
| 22151 | 22258 | L: linux-staging@lists.linux.dev |
| @@ -22300,7 +22407,7 @@ F: drivers/char/hw_random/jh7110-trng.c · 148 unmodified lines | ||
| 22300 | 22407 | |
| 22301 | 22408 | STARFIVE WATCHDOG DRIVER |
| 22302 | 22409 | M: Xingyu Wu <xingyu.wu@starfivetech.com> |
| 22303 | −M: Samin Guo <samin.guo@starfivetech.com> | |
| 22410 | +M: Ziv Xu <ziv.xu@starfivetech.com> | |
| 22304 | 22411 | S: Supported |
| 22305 | 22412 | F: Documentation/devicetree/bindings/watchdog/starfive* |
| 22306 | 22413 | F: drivers/watchdog/starfive-wdt.c |
| @@ -22382,6 +22489,12 @@ F: drivers/*/stm32-*timer* · 75 unmodified lines | ||
| 22382 | 22489 | F: drivers/pwm/pwm-stm32* |
| 22383 | 22490 | F: include/linux/*/stm32-*tim* |
| 22384 | 22491 | |
| 22492 | +STM32MP25 USB3/PCIE COMBOPHY DRIVER | |
| 22493 | +M: Christian Bruel <christian.bruel@foss.st.com> | |
| 22494 | +S: Maintained | |
| 22495 | +F: Documentation/devicetree/bindings/phy/st,stm32mp25-combophy.yaml | |
| 22496 | +F: drivers/phy/st/phy-stm32-combophy.c | |
| 22497 | + | |
| 22385 | 22498 | STMMAC ETHERNET DRIVER |
| 22386 | 22499 | M: Alexandre Torgue <alexandre.torgue@foss.st.com> |
| 22387 | 22500 | M: Jose Abreu <joabreu@synopsys.com> |
| @@ -23971,7 +24084,9 @@ F: drivers/ufs/host/*dwc* · 1583 unmodified lines | ||
| 23971 | 24084 | |
| 23972 | 24085 | UNIVERSAL FLASH STORAGE HOST CONTROLLER DRIVER EXYNOS HOOKS |
| 23973 | 24086 | M: Alim Akhtar <alim.akhtar@samsung.com> |
| 24087 | +R: Peter Griffin <peter.griffin@linaro.org> | |
| 23974 | 24088 | L: linux-scsi@vger.kernel.org |
| 24089 | +L: linux-samsung-soc@vger.kernel.org | |
| 23975 | 24090 | S: Maintained |
| 23976 | 24091 | F: drivers/ufs/host/ufs-exynos* |
| 23977 | 24092 | |
| @@ -24298,6 +24413,13 @@ L: linux-usb@vger.kernel.org · 320 unmodified lines | ||
| 24298 | 24413 | S: Orphan |
| 24299 | 24414 | F: drivers/usb/typec/tcpm/ |
| 24300 | 24415 | |
| 24416 | +USB TYPEC TUSB1046 MUX DRIVER | |
| 24417 | +M: Romain Gantois <romain.gantois@bootlin.com> | |
| 24418 | +L: linux-usb@vger.kernel.org | |
| 24419 | +S: Maintained | |
| 24420 | +F: Documentation/devicetree/bindings/usb/ti,tusb1046.yaml | |
| 24421 | +F: drivers/usb/typec/mux/tusb1046.c | |
| 24422 | + | |
| 24301 | 24423 | USB UHCI DRIVER |
| 24302 | 24424 | M: Alan Stern <stern@rowland.harvard.edu> |
| 24303 | 24425 | L: linux-usb@vger.kernel.org |
| @@ -24851,6 +24973,18 @@ S: Maintained · 547 unmodified lines | ||
| 24851 | 24973 | F: drivers/input/serio/userio.c |
| 24852 | 24974 | F: include/uapi/linux/userio.h |
| 24853 | 24975 | |
| 24976 | +VISHAY VEML3235 AMBIENT LIGHT SENSOR DRIVER | |
| 24977 | +M: Javier Carrasco <javier.carrasco.cruz@gmail.com> | |
| 24978 | +S: Maintained | |
| 24979 | +F: Documentation/devicetree/bindings/iio/light/vishay,veml6030.yaml | |
| 24980 | +F: drivers/iio/light/veml3235.c | |
| 24981 | + | |
| 24982 | +VISHAY VEML6030 AMBIENT LIGHT SENSOR DRIVER | |
| 24983 | +M: Javier Carrasco <javier.carrasco.cruz@gmail.com> | |
| 24984 | +S: Maintained | |
| 24985 | +F: Documentation/devicetree/bindings/iio/light/vishay,veml6030.yaml | |
| 24986 | +F: drivers/iio/light/veml6030.c | |
| 24987 | + | |
| 24854 | 24988 | VISHAY VEML6075 UVA AND UVB LIGHT SENSOR DRIVER |
| 24855 | 24989 | M: Javier Carrasco <javier.carrasco.cruz@gmail.com> |
| 24856 | 24990 | S: Maintained |
| @@ -1,8 +1,8 @@ | ||
| 1 | 1 | # SPDX-License-Identifier: GPL-2.0 |
| 2 | 2 | VERSION = 6 |
| 3 | −PATCHLEVEL = 12 | |
| 3 | +PATCHLEVEL = 13 | |
| 4 | 4 | SUBLEVEL = 0 |
| 5 | −EXTRAVERSION = | |
| 5 | +EXTRAVERSION = -rc1 | |
| 6 | 6 | NAME = Baby Opossum Posse |
| 7 | 7 | |
| 8 | 8 | # *DOCUMENTATION* |
| @@ -40,7 +40,7 @@ __all: · 31 unmodified lines | ||
| 40 | 40 | |
| 41 | 41 | this-makefile := $(lastword $(MAKEFILE_LIST)) |
| 42 | 42 | abs_srctree := $(realpath $(dir $(this-makefile))) |
| 43 | −abs_objtree := $(CURDIR) | |
| 43 | +abs_output := $(CURDIR) | |
| 44 | 44 | |
| 45 | 45 | ifneq ($(sub_make_done),1) |
| 46 | 46 | |
| @@ -134,6 +134,10 @@ ifeq ("$(origin M)", "command line") · 87 unmodified lines | ||
| 134 | 134 | KBUILD_EXTMOD := $(M) |
| 135 | 135 | endif |
| 136 | 136 | |
| 137 | +ifeq ("$(origin MO)", "command line") | |
| 138 | + KBUILD_EXTMOD_OUTPUT := $(MO) | |
| 139 | +endif | |
| 140 | + | |
| 137 | 141 | $(if $(word 2, $(KBUILD_EXTMOD)), \ |
| 138 | 142 | $(error building multiple external modules is not supported)) |
| 139 | 143 | |
| @@ -176,18 +180,41 @@ export KBUILD_EXTRA_WARN · 36 unmodified lines | ||
| 176 | 180 | # The O= assignment takes precedence over the KBUILD_OUTPUT environment |
| 177 | 181 | # variable. |
| 178 | 182 | |
| 179 | −# Do we want to change the working directory? | |
| 180 | 183 | ifeq ("$(origin O)", "command line") |
| 181 | 184 | KBUILD_OUTPUT := $(O) |
| 182 | 185 | endif |
| 183 | 186 | |
| 184 | −ifneq ($(KBUILD_OUTPUT),) | |
| 187 | +ifdef KBUILD_EXTMOD | |
| 188 | + ifdef KBUILD_OUTPUT | |
| 189 | + objtree := $(realpath $(KBUILD_OUTPUT)) | |
| 190 | + $(if $(objtree),,$(error specified kernel directory "$(KBUILD_OUTPUT)" does not exist)) | |
| 191 | + else | |
| 192 | + objtree := $(abs_srctree) | |
| 193 | + endif | |
| 194 | + # If Make is invoked from the kernel directory (either kernel | |
| 195 | + # source directory or kernel build directory), external modules | |
| 196 | + # are built in $(KBUILD_EXTMOD) for backward compatibility, | |
| 197 | + # otherwise, built in the current directory. | |
| 198 | + output := $(or $(KBUILD_EXTMOD_OUTPUT),$(if $(filter $(CURDIR),$(objtree) $(abs_srctree)),$(KBUILD_EXTMOD))) | |
| 199 | + # KBUILD_EXTMOD might be a relative path. Remember its absolute path before | |
| 200 | + # Make changes the working directory. | |
| 201 | + srcroot := $(realpath $(KBUILD_EXTMOD)) | |
| 202 | + $(if $(srcroot),,$(error specified external module directory "$(KBUILD_EXTMOD)" does not exist)) | |
| 203 | +else | |
| 204 | + objtree := . | |
| 205 | + output := $(KBUILD_OUTPUT) | |
| 206 | +endif | |
| 207 | + | |
| 208 | +export objtree srcroot | |
| 209 | + | |
| 210 | +# Do we want to change the working directory? | |
| 211 | +ifneq ($(output),) | |
| 185 | 212 | # $(realpath ...) gets empty if the path does not exist. Run 'mkdir -p' first. |
| 186 | −$(shell mkdir -p "$(KBUILD_OUTPUT)") | |
| 213 | +$(shell mkdir -p "$(output)") | |
| 187 | 214 | # $(realpath ...) resolves symlinks |
| 188 | −abs_objtree := $(realpath $(KBUILD_OUTPUT)) | |
| 189 | −$(if $(abs_objtree),,$(error failed to create output directory "$(KBUILD_OUTPUT)")) | |
| 190 | −endif # ifneq ($(KBUILD_OUTPUT),) | |
| 215 | +abs_output := $(realpath $(output)) | |
| 216 | +$(if $(abs_output),,$(error failed to create output directory "$(output)")) | |
| 217 | +endif | |
| 191 | 218 | |
| 192 | 219 | ifneq ($(words $(subst :, ,$(abs_srctree))), 1) |
| 193 | 220 | $(error source directory cannot contain spaces or colons) |
| @@ -197,7 +224,7 @@ export sub_make_done := 1 · 3 unmodified lines | ||
| 197 | 224 | |
| 198 | 225 | endif # sub_make_done |
| 199 | 226 | |
| 200 | −ifeq ($(abs_objtree),$(CURDIR)) | |
| 227 | +ifeq ($(abs_output),$(CURDIR)) | |
| 201 | 228 | # Suppress "Entering directory ..." if we are at the final work directory. |
| 202 | 229 | no-print-directory := --no-print-directory |
| 203 | 230 | else |
| @@ -221,43 +248,41 @@ $(filter-out $(this-makefile), $(MAKECMDGOALS)) __all: __sub-make · 17 unmodified lines | ||
| 221 | 248 | |
| 222 | 249 | # Invoke a second make in the output directory, passing relevant variables |
| 223 | 250 | __sub-make: |
| 224 | − $(Q)$(MAKE) $(no-print-directory) -C $(abs_objtree) \ | |
| 251 | + $(Q)$(MAKE) $(no-print-directory) -C $(abs_output) \ | |
| 225 | 252 | -f $(abs_srctree)/Makefile $(MAKECMDGOALS) |
| 226 | 253 | |
| 227 | 254 | else # need-sub-make |
| 228 | 255 | |
| 229 | 256 | # We process the rest of the Makefile if this is the final invocation of make |
| 230 | 257 | |
| 231 | −ifeq ($(abs_srctree),$(abs_objtree)) | |
| 232 | − # building in the source tree | |
| 233 | − srctree := . | |
| 234 | − building_out_of_srctree := | |
| 235 | −else | |
| 236 | − ifeq ($(abs_srctree)/,$(dir $(abs_objtree))) | |
| 237 | − # building in a subdirectory of the source tree | |
| 238 | − srctree := .. | |
| 239 | − else | |
| 240 | − srctree := $(abs_srctree) | |
| 241 | − endif | |
| 242 | − building_out_of_srctree := 1 | |
| 258 | +ifndef KBUILD_EXTMOD | |
| 259 | +srcroot := $(abs_srctree) | |
| 243 | 260 | endif |
| 244 | 261 | |
| 245 | −ifneq ($(KBUILD_ABS_SRCTREE),) | |
| 246 | −srctree := $(abs_srctree) | |
| 262 | +ifeq ($(srcroot),$(CURDIR)) | |
| 263 | +building_out_of_srctree := | |
| 264 | +else | |
| 265 | +export building_out_of_srctree := 1 | |
| 247 | 266 | endif |
| 248 | 267 | |
| 249 | −objtree := . | |
| 268 | +ifdef KBUILD_ABS_SRCTREE | |
| 269 | + # Do nothing. Use the absolute path. | |
| 270 | +else ifeq ($(srcroot),$(CURDIR)) | |
| 271 | + # Building in the source. | |
| 272 | + srcroot := . | |
| 273 | +else ifeq ($(srcroot)/,$(dir $(CURDIR))) | |
| 274 | + # Building in a subdirectory of the source. | |
| 275 | + srcroot := .. | |
| 276 | +endif | |
| 250 | 277 | |
| 251 | −VPATH := | |
| 278 | +export srctree := $(if $(KBUILD_EXTMOD),$(abs_srctree),$(srcroot)) | |
| 252 | 279 | |
| 253 | −ifeq ($(KBUILD_EXTMOD),) | |
| 254 | 280 | ifdef building_out_of_srctree |
| 255 | −VPATH := $(srctree) | |
| 256 | −endif | |
| 281 | +export VPATH := $(srcroot) | |
| 282 | +else | |
| 283 | +VPATH := | |
| 257 | 284 | endif |
| 258 | 285 | |
| 259 | −export building_out_of_srctree srctree objtree VPATH | |
| 260 | − | |
| 261 | 286 | # To make sure we do not include .config for any of the *config targets |
| 262 | 287 | # catch them early, and hand them over to scripts/kconfig/Makefile |
| 263 | 288 | # It is allowed to specify more targets when calling make, including |
| @@ -276,7 +301,7 @@ no-dot-config-targets := $(clean-targets) \ · 12 unmodified lines | ||
| 276 | 301 | outputmakefile rustavailable rustfmt rustfmtcheck |
| 277 | 302 | no-sync-config-targets := $(no-dot-config-targets) %install modules_sign kernelrelease \ |
| 278 | 303 | image_name |
| 279 | −single-targets := %.a %.i %.ko %.lds %.ll %.lst %.mod %.o %.rsi %.s %.symtypes %/ | |
| 304 | +single-targets := %.a %.i %.ko %.lds %.ll %.lst %.mod %.o %.rsi %.s %/ | |
| 280 | 305 | |
| 281 | 306 | config-build := |
| 282 | 307 | mixed-build := |
| @@ -354,7 +379,7 @@ else # !mixed-build · 71 unmodified lines | ||
| 354 | 379 | include $(srctree)/scripts/Kbuild.include |
| 355 | 380 | |
| 356 | 381 | # Read KERNELRELEASE from include/config/kernel.release (if it exists) |
| 357 | −KERNELRELEASE = $(call read-file, include/config/kernel.release) | |
| 382 | +KERNELRELEASE = $(call read-file, $(objtree)/include/config/kernel.release) | |
| 358 | 383 | KERNELVERSION = $(VERSION)$(if $(PATCHLEVEL),.$(PATCHLEVEL)$(if $(SUBLEVEL),.$(SUBLEVEL)))$(EXTRAVERSION) |
| 359 | 384 | export VERSION PATCHLEVEL SUBLEVEL KERNELRELEASE KERNELVERSION |
| 360 | 385 | |
| @@ -446,18 +471,23 @@ KBUILD_USERLDFLAGS := $(USERLDFLAGS) · 85 unmodified lines | ||
| 446 | 471 | export rust_common_flags := --edition=2021 \ |
| 447 | 472 | -Zbinary_dep_depinfo=y \ |
| 448 | 473 | -Astable_features \ |
| 449 | − -Dunsafe_op_in_unsafe_fn \ | |
| 450 | 474 | -Dnon_ascii_idents \ |
| 475 | + -Dunsafe_op_in_unsafe_fn \ | |
| 476 | + -Wmissing_docs \ | |
| 451 | 477 | -Wrust_2018_idioms \ |
| 452 | 478 | -Wunreachable_pub \ |
| 453 | − -Wmissing_docs \ | |
| 454 | − -Wrustdoc::missing_crate_level_docs \ | |
| 455 | 479 | -Wclippy::all \ |
| 480 | + -Wclippy::ignored_unit_patterns \ | |
| 456 | 481 | -Wclippy::mut_mut \ |
| 457 | 482 | -Wclippy::needless_bitwise_bool \ |
| 458 | 483 | -Wclippy::needless_continue \ |
| 484 | + -Aclippy::needless_lifetimes \ | |
| 459 | 485 | -Wclippy::no_mangle_with_rust_abi \ |
| 460 | − -Wclippy::dbg_macro | |
| 486 | + -Wclippy::undocumented_unsafe_blocks \ | |
| 487 | + -Wclippy::unnecessary_safety_comment \ | |
| 488 | + -Wclippy::unnecessary_safety_doc \ | |
| 489 | + -Wrustdoc::missing_crate_level_docs \ | |
| 490 | + -Wrustdoc::unescaped_backticks | |
| 461 | 491 | |
| 462 | 492 | KBUILD_HOSTCFLAGS := $(KBUILD_USERHOSTCFLAGS) $(HOST_LFS_CFLAGS) \ |
| 463 | 493 | $(HOSTCFLAGS) -I $(srctree)/scripts/include |
| @@ -508,7 +538,7 @@ KGZIP = gzip · 44 unmodified lines | ||
| 508 | 538 | KBZIP2 = bzip2 |
| 509 | 539 | KLZOP = lzop |
| 510 | 540 | LZMA = lzma |
| 511 | −LZ4 = lz4c | |
| 541 | +LZ4 = lz4 | |
| 512 | 542 | XZ = xz |
| 513 | 543 | ZSTD = zstd |
| 514 | 544 | |
| @@ -538,7 +568,7 @@ USERINCLUDE := \ · 23 unmodified lines | ||
| 538 | 568 | LINUXINCLUDE := \ |
| 539 | 569 | -I$(srctree)/arch/$(SRCARCH)/include \ |
| 540 | 570 | -I$(objtree)/arch/$(SRCARCH)/include/generated \ |
| 541 | − $(if $(building_out_of_srctree),-I$(srctree)/include) \ | |
| 571 | + -I$(srctree)/include \ | |
| 542 | 572 | -I$(objtree)/include \ |
| 543 | 573 | $(USERINCLUDE) |
| 544 | 574 | |
| @@ -582,6 +612,9 @@ endif · 37 unmodified lines | ||
| 582 | 612 | # Allows the usage of unstable features in stable compilers. |
| 583 | 613 | export RUSTC_BOOTSTRAP := 1 |
| 584 | 614 | |
| 615 | +# Allows finding `.clippy.toml` in out-of-srctree builds. | |
| 616 | +export CLIPPY_CONF_DIR := $(srctree) | |
| 617 | + | |
| 585 | 618 | export ARCH SRCARCH CONFIG_SHELL BASH HOSTCC KBUILD_HOSTCFLAGS CROSS_COMPILE LD CC HOSTPKG_CONFIG |
| 586 | 619 | export RUSTC RUSTDOC RUSTFMT RUSTC_OR_CLIPPY_QUIET RUSTC_OR_CLIPPY BINDGEN |
| 587 | 620 | export HOSTRUSTC KBUILD_HOSTRUSTFLAGS |
| @@ -621,13 +654,25 @@ ifdef building_out_of_srctree · 33 unmodified lines | ||
| 621 | 654 | # At the same time when output Makefile generated, generate .gitignore to |
| 622 | 655 | # ignore whole output directory |
| 623 | 656 | |
| 657 | +ifdef KBUILD_EXTMOD | |
| 658 | +print_env_for_makefile = \ | |
| 659 | + echo "export KBUILD_OUTPUT = $(objtree)"; \ | |
| 660 | + echo "export KBUILD_EXTMOD = $(realpath $(srcroot))" ; \ | |
| 661 | + echo "export KBUILD_EXTMOD_OUTPUT = $(CURDIR)" | |
| 662 | +else | |
| 663 | +print_env_for_makefile = \ | |
| 664 | + echo "export KBUILD_OUTPUT = $(CURDIR)" | |
| 665 | +endif | |
| 666 | + | |
| 624 | 667 | quiet_cmd_makefile = GEN Makefile |
| 625 | 668 | cmd_makefile = { \ |
| 626 | − echo "\# Automatically generated by $(srctree)/Makefile: don't edit"; \ | |
| 627 | − echo "include $(srctree)/Makefile"; \ | |
| 669 | + echo "\# Automatically generated by $(abs_srctree)/Makefile: don't edit"; \ | |
| 670 | + $(print_env_for_makefile); \ | |
| 671 | + echo "include $(abs_srctree)/Makefile"; \ | |
| 628 | 672 | } > Makefile |
| 629 | 673 | |
| 630 | 674 | outputmakefile: |
| 675 | +ifeq ($(KBUILD_EXTMOD),) | |
| 631 | 676 | @if [ -f $(srctree)/.config -o \ |
| 632 | 677 | -d $(srctree)/include/config -o \ |
| 633 | 678 | -d $(srctree)/arch/$(SRCARCH)/include/generated ]; then \ |
| @@ -637,7 +682,16 @@ outputmakefile: · 3 unmodified lines | ||
| 637 | 682 | echo >&2 "***"; \ |
| 638 | 683 | false; \ |
| 639 | 684 | fi |
| 640 | − $(Q)ln -fsn $(srctree) source | |
| 685 | +else | |
| 686 | + @if [ -f $(srcroot)/modules.order ]; then \ | |
| 687 | + echo >&2 "***"; \ | |
| 688 | + echo >&2 "*** The external module source tree is not clean."; \ | |
| 689 | + echo >&2 "*** Please run 'make -C $(abs_srctree) M=$(realpath $(srcroot)) clean'"; \ | |
| 690 | + echo >&2 "***"; \ | |
| 691 | + false; \ | |
| 692 | + fi | |
| 693 | +endif | |
| 694 | + $(Q)ln -fsn $(srcroot) source | |
| 641 | 695 | $(call cmd,makefile) |
| 642 | 696 | $(Q)test -e .gitignore || \ |
| 643 | 697 | { echo "# this is build directory, ignore it"; echo "*"; } > .gitignore |
| @@ -709,7 +763,7 @@ endif · 65 unmodified lines | ||
| 709 | 763 | # in addition to whatever we do anyway. |
| 710 | 764 | # Just "make" or "make all" shall build modules as well |
| 711 | 765 | |
| 712 | −ifneq ($(filter all modules nsdeps %compile_commands.json clang-%,$(MAKECMDGOALS)),) | |
| 766 | +ifneq ($(filter all modules nsdeps compile_commands.json clang-%,$(MAKECMDGOALS)),) | |
| 713 | 767 | KBUILD_MODULES := 1 |
| 714 | 768 | endif |
| 715 | 769 | |
| @@ -720,7 +774,7 @@ endif · 4 unmodified lines | ||
| 720 | 774 | export KBUILD_MODULES KBUILD_BUILTIN |
| 721 | 775 | |
| 722 | 776 | ifdef need-config |
| 723 | −include include/config/auto.conf | |
| 777 | +include $(objtree)/include/config/auto.conf | |
| 724 | 778 | endif |
| 725 | 779 | |
| 726 | 780 | ifeq ($(KBUILD_EXTMOD),) |
| @@ -781,17 +835,22 @@ $(KCONFIG_CONFIG): · 54 unmodified lines | ||
| 781 | 835 | else # !may-sync-config |
| 782 | 836 | # External modules and some install targets need include/generated/autoconf.h |
| 783 | 837 | # and include/config/auto.conf but do not care if they are up-to-date. |
| 784 | −# Use auto.conf to trigger the test | |
| 785 | −PHONY += include/config/auto.conf | |
| 786 | − | |
| 787 | −include/config/auto.conf: | |
| 788 | − @test -e include/generated/autoconf.h -a -e $@ || ( \ | |
| 789 | − echo >&2; \ | |
| 790 | − echo >&2 " ERROR: Kernel configuration is invalid."; \ | |
| 791 | − echo >&2 " include/generated/autoconf.h or $@ are missing.";\ | |
| 792 | − echo >&2 " Run 'make oldconfig && make prepare' on kernel src to fix it."; \ | |
| 793 | − echo >&2 ; \ | |
| 794 | − /bin/false) | |
| 838 | +# Use auto.conf to show the error message | |
| 839 | + | |
| 840 | +checked-configs := $(addprefix $(objtree)/, include/generated/autoconf.h include/generated/rustc_cfg include/config/auto.conf) | |
| 841 | +missing-configs := $(filter-out $(wildcard $(checked-configs)), $(checked-configs)) | |
| 842 | + | |
| 843 | +ifdef missing-configs | |
| 844 | +PHONY += $(objtree)/include/config/auto.conf | |
| 845 | + | |
| 846 | +$(objtree)/include/config/auto.conf: | |
| 847 | + @echo >&2 '***' | |
| 848 | + @echo >&2 '*** ERROR: Kernel configuration is invalid. The following files are missing:' | |
| 849 | + @printf >&2 '*** - %s\n' $(missing-configs) | |
| 850 | + @echo >&2 '*** Run "make oldconfig && make prepare" on kernel source to fix it.' | |
| 851 | + @echo >&2 '***' | |
| 852 | + @/bin/false | |
| 853 | +endif | |
| 795 | 854 | |
| 796 | 855 | endif # may-sync-config |
| 797 | 856 | endif # need-config |
| @@ -1005,8 +1064,10 @@ ifdef CONFIG_CC_IS_GCC · 207 unmodified lines | ||
| 1005 | 1064 | KBUILD_CFLAGS += -fconserve-stack |
| 1006 | 1065 | endif |
| 1007 | 1066 | |
| 1008 | −# change __FILE__ to the relative path from the srctree | |
| 1009 | −KBUILD_CPPFLAGS += $(call cc-option,-fmacro-prefix-map=$(srctree)/=) | |
| 1067 | +# change __FILE__ to the relative path to the source directory | |
| 1068 | +ifdef building_out_of_srctree | |
| 1069 | +KBUILD_CPPFLAGS += $(call cc-option,-fmacro-prefix-map=$(srcroot)/=) | |
| 1070 | +endif | |
| 1010 | 1071 | |
| 1011 | 1072 | # include additional Makefiles when needed |
| 1012 | 1073 | include-y := scripts/Makefile.extrawarn |
| @@ -1018,6 +1079,8 @@ include-$(CONFIG_KMSAN) += scripts/Makefile.kmsan · 5 unmodified lines | ||
| 1018 | 1079 | include-$(CONFIG_UBSAN) += scripts/Makefile.ubsan |
| 1019 | 1080 | include-$(CONFIG_KCOV) += scripts/Makefile.kcov |
| 1020 | 1081 | include-$(CONFIG_RANDSTRUCT) += scripts/Makefile.randstruct |
| 1082 | +include-$(CONFIG_AUTOFDO_CLANG) += scripts/Makefile.autofdo | |
| 1083 | +include-$(CONFIG_PROPELLER_CLANG) += scripts/Makefile.propeller | |
| 1021 | 1084 | include-$(CONFIG_GCC_PLUGINS) += scripts/Makefile.gcc-plugins |
| 1022 | 1085 | |
| 1023 | 1086 | include $(addprefix $(srctree)/, $(include-y)) |
| @@ -1098,10 +1161,6 @@ export MODLIB · 74 unmodified lines | ||
| 1098 | 1161 | |
| 1099 | 1162 | PHONY += prepare0 |
| 1100 | 1163 | |
| 1101 | −export extmod_prefix = $(if $(KBUILD_EXTMOD),$(KBUILD_EXTMOD)/) | |
| 1102 | −export MODORDER := $(extmod_prefix)modules.order | |
| 1103 | −export MODULES_NSDEPS := $(extmod_prefix)modules.nsdeps | |
| 1104 | − | |
| 1105 | 1164 | ifeq ($(KBUILD_EXTMOD),) |
| 1106 | 1165 | |
| 1107 | 1166 | build-dir := . |
| @@ -1196,7 +1255,8 @@ PHONY += prepare archprepare · 88 unmodified lines | ||
| 1196 | 1255 | |
| 1197 | 1256 | archprepare: outputmakefile archheaders archscripts scripts include/config/kernel.release \ |
| 1198 | 1257 | asm-generic $(version_h) include/generated/utsrelease.h \ |
| 1199 | − include/generated/compile.h include/generated/autoconf.h remove-stale-files | |
| 1258 | + include/generated/compile.h include/generated/autoconf.h \ | |
| 1259 | + include/generated/rustc_cfg remove-stale-files | |
| 1200 | 1260 | |
| 1201 | 1261 | prepare0: archprepare |
| 1202 | 1262 | $(Q)$(MAKE) $(build)=scripts/mod |
| @@ -1427,6 +1487,10 @@ ifdef CONFIG_OF_EARLY_FLATTREE · 224 unmodified lines | ||
| 1427 | 1487 | all: dtbs |
| 1428 | 1488 | endif |
| 1429 | 1489 | |
| 1490 | +ifdef CONFIG_GENERIC_BUILTIN_DTB | |
| 1491 | +vmlinux: dtbs | |
| 1492 | +endif | |
| 1493 | + | |
| 1430 | 1494 | endif |
| 1431 | 1495 | |
| 1432 | 1496 | PHONY += scripts_dtc |
| @@ -1494,7 +1558,8 @@ CLEAN_FILES += vmlinux.symvers modules-only.symvers \ · 61 unmodified lines | ||
| 1494 | 1558 | modules.builtin modules.builtin.modinfo modules.nsdeps \ |
| 1495 | 1559 | modules.builtin.ranges vmlinux.o.map \ |
| 1496 | 1560 | compile_commands.json rust/test \ |
| 1497 | − rust-project.json .vmlinux.objs .vmlinux.export.c | |
| 1561 | + rust-project.json .vmlinux.objs .vmlinux.export.c \ | |
| 1562 | + .builtin-dtbs-list .builtin-dtb.S | |
| 1498 | 1563 | |
| 1499 | 1564 | # Directories & files removed with 'make mrproper' |
| 1500 | 1565 | MRPROPER_FILES += include/config include/generated \ |
| @@ -1602,7 +1667,6 @@ help: · 101 unmodified lines | ||
| 1602 | 1667 | @echo ' with a stack size larger than MINSTACKSIZE (default: 100)' |
| 1603 | 1668 | @echo ' versioncheck - Sanity check on version.h usage' |
| 1604 | 1669 | @echo ' includecheck - Check for duplicate included header files' |
| 1605 | − @echo ' export_report - List the usages of all exported symbols' | |
| 1606 | 1670 | @echo ' headerdep - Detect inclusion cycles in headers' |
| 1607 | 1671 | @echo ' coccicheck - Check with Coccinelle' |
| 1608 | 1672 | @echo ' clang-analyzer - Check with clang static analyzer' |
| @@ -1743,18 +1807,9 @@ rusttest: prepare · 134 unmodified lines | ||
| 1743 | 1807 | # Formatting targets |
| 1744 | 1808 | PHONY += rustfmt rustfmtcheck |
| 1745 | 1809 | |
| 1746 | −# We skip `rust/alloc` since we want to minimize the diff w.r.t. upstream. | |
| 1747 | −# | |
| 1748 | −# We match using absolute paths since `find` does not resolve them | |
| 1749 | −# when matching, which is a problem when e.g. `srctree` is `..`. | |
| 1750 | −# We `grep` afterwards in order to remove the directory entry itself. | |
| 1751 | 1810 | rustfmt: |
| 1752 | − $(Q)find $(abs_srctree) -type f -name '*.rs' \ | |
| 1753 | − -o -path $(abs_srctree)/rust/alloc -prune \ | |
| 1754 | − -o -path $(abs_objtree)/rust/test -prune \ | |
| 1755 | − | grep -Fv $(abs_srctree)/rust/alloc \ | |
| 1756 | − | grep -Fv $(abs_objtree)/rust/test \ | |
| 1757 | − | grep -Fv generated \ | |
| 1811 | + $(Q)find $(srctree) $(RCS_FIND_IGNORE) \ | |
| 1812 | + -type f -a -name '*.rs' -a ! -name '*generated*' -print \ | |
| 1758 | 1813 | | xargs $(RUSTFMT) $(rustfmt_flags) |
| 1759 | 1814 | |
| 1760 | 1815 | rustfmtcheck: rustfmt_flags = --check |
| @@ -1793,14 +1848,10 @@ filechk_kernel.release = echo $(KERNELRELEASE) · 32 unmodified lines | ||
| 1793 | 1848 | KBUILD_BUILTIN := |
| 1794 | 1849 | KBUILD_MODULES := 1 |
| 1795 | 1850 | |
| 1796 | −build-dir := $(KBUILD_EXTMOD) | |
| 1851 | +build-dir := . | |
| 1797 | 1852 | |
| 1798 | −compile_commands.json: $(extmod_prefix)compile_commands.json | |
| 1799 | −PHONY += compile_commands.json | |
| 1800 | − | |
| 1801 | −clean-dirs := $(KBUILD_EXTMOD) | |
| 1802 | −clean: private rm-files := $(KBUILD_EXTMOD)/Module.symvers $(KBUILD_EXTMOD)/modules.nsdeps \ | |
| 1803 | − $(KBUILD_EXTMOD)/compile_commands.json | |
| 1853 | +clean-dirs := . | |
| 1854 | +clean: private rm-files := Module.symvers modules.nsdeps compile_commands.json | |
| 1804 | 1855 | |
| 1805 | 1856 | PHONY += prepare |
| 1806 | 1857 | # now expand this into a simple variable to reduce the cost of shell evaluations |
| @@ -1859,7 +1910,7 @@ endif · 52 unmodified lines | ||
| 1859 | 1910 | |
| 1860 | 1911 | ifdef CONFIG_MODULES |
| 1861 | 1912 | |
| 1862 | −$(MODORDER): $(build-dir) | |
| 1913 | +modules.order: $(build-dir) | |
| 1863 | 1914 | @: |
| 1864 | 1915 | |
| 1865 | 1916 | # KBUILD_MODPOST_NOFINAL can be set to skip the final link of modules. |
| @@ -1870,7 +1921,7 @@ ifneq ($(KBUILD_MODPOST_NOFINAL),1) · 4 unmodified lines | ||
| 1870 | 1921 | endif |
| 1871 | 1922 | |
| 1872 | 1923 | PHONY += modules_check |
| 1873 | −modules_check: $(MODORDER) | |
| 1924 | +modules_check: modules.order | |
| 1874 | 1925 | $(Q)$(CONFIG_SHELL) $(srctree)/scripts/modules-check.sh $< |
| 1875 | 1926 | |
| 1876 | 1927 | else # CONFIG_MODULES |
| @@ -1911,15 +1962,15 @@ $(single-ko): single_modules · 34 unmodified lines | ||
| 1911 | 1962 | $(single-no-ko): $(build-dir) |
| 1912 | 1963 | @: |
| 1913 | 1964 | |
| 1914 | −# Remove MODORDER when done because it is not the real one. | |
| 1965 | +# Remove modules.order when done because it is not the real one. | |
| 1915 | 1966 | PHONY += single_modules |
| 1916 | 1967 | single_modules: $(single-no-ko) modules_prepare |
| 1917 | − $(Q){ $(foreach m, $(single-ko), echo $(extmod_prefix)$(m:%.ko=%.o);) } > $(MODORDER) | |
| 1968 | + $(Q){ $(foreach m, $(single-ko), echo $(m:%.ko=%.o);) } > modules.order | |
| 1918 | 1969 | $(Q)$(MAKE) -f $(srctree)/scripts/Makefile.modpost |
| 1919 | 1970 | ifneq ($(KBUILD_MODPOST_NOFINAL),1) |
| 1920 | 1971 | $(Q)$(MAKE) -f $(srctree)/scripts/Makefile.modfinal |
| 1921 | 1972 | endif |
| 1922 | − $(Q)rm -f $(MODORDER) | |
| 1973 | + $(Q)rm -f modules.order | |
| 1923 | 1974 | |
| 1924 | 1975 | single-goals := $(addprefix $(build-dir)/, $(single-no-ko)) |
| 1925 | 1976 | |
| @@ -1927,6 +1978,8 @@ KBUILD_MODULES := 1 · 1 unmodified line | ||
| 1927 | 1978 | |
| 1928 | 1979 | endif |
| 1929 | 1980 | |
| 1981 | +prepare: outputmakefile | |
| 1982 | + | |
| 1930 | 1983 | # Preset locale variables to speed up the build process. Limit locale |
| 1931 | 1984 | # tweaks to this spot to avoid wrong language settings when running |
| 1932 | 1985 | # make menuconfig etc. |
| @@ -1942,7 +1995,7 @@ $(clean-dirs): · 9 unmodified lines | ||
| 1942 | 1995 | |
| 1943 | 1996 | clean: $(clean-dirs) |
| 1944 | 1997 | $(call cmd,rmfiles) |
| 1945 | − @find $(or $(KBUILD_EXTMOD), .) $(RCS_FIND_IGNORE) \ | |
| 1998 | + @find . $(RCS_FIND_IGNORE) \ | |
| 1946 | 1999 | \( -name '*.[aios]' -o -name '*.rsi' -o -name '*.ko' -o -name '.*.cmd' \ |
| 1947 | 2000 | -o -name '*.ko.*' \ |
| 1948 | 2001 | -o -name '*.dtb' -o -name '*.dtbo' \ |
| @@ -1975,7 +2028,12 @@ tags TAGS cscope gtags: FORCE · 26 unmodified lines | ||
| 1975 | 2028 | PHONY += rust-analyzer |
| 1976 | 2029 | rust-analyzer: |
| 1977 | 2030 | +$(Q)$(CONFIG_SHELL) $(srctree)/scripts/rust_is_available.sh |
| 2031 | +ifdef KBUILD_EXTMOD | |
| 2032 | +# FIXME: external modules must not descend into a sub-directory of the kernel | |
| 2033 | + $(Q)$(MAKE) $(build)=$(objtree)/rust src=$(srctree)/rust $@ | |
| 2034 | +else | |
| 1978 | 2035 | $(Q)$(MAKE) $(build)=rust $@ |
| 2036 | +endif | |
| 1979 | 2037 | |
| 1980 | 2038 | # Script to generate missing namespace dependencies |
| 1981 | 2039 | # --------------------------------------------------------------------------- |
| @@ -1991,12 +2049,12 @@ nsdeps: modules · 9 unmodified lines | ||
| 1991 | 2049 | quiet_cmd_gen_compile_commands = GEN $@ |
| 1992 | 2050 | cmd_gen_compile_commands = $(PYTHON3) $< -a $(AR) -o $@ $(filter-out $<, $(real-prereqs)) |
| 1993 | 2051 | |
| 1994 | −$(extmod_prefix)compile_commands.json: $(srctree)/scripts/clang-tools/gen_compile_commands.py \ | |
| 2052 | +compile_commands.json: $(srctree)/scripts/clang-tools/gen_compile_commands.py \ | |
| 1995 | 2053 | $(if $(KBUILD_EXTMOD),, vmlinux.a $(KBUILD_VMLINUX_LIBS)) \ |
| 1996 | − $(if $(CONFIG_MODULES), $(MODORDER)) FORCE | |
| 2054 | + $(if $(CONFIG_MODULES), modules.order) FORCE | |
| 1997 | 2055 | $(call if_changed,gen_compile_commands) |
| 1998 | 2056 | |
| 1999 | −targets += $(extmod_prefix)compile_commands.json | |
| 2057 | +targets += compile_commands.json | |
| 2000 | 2058 | |
| 2001 | 2059 | PHONY += clang-tidy clang-analyzer |
| 2002 | 2060 | |
| @@ -2004,7 +2062,7 @@ ifdef CONFIG_CC_IS_CLANG · 1 unmodified line | ||
| 2004 | 2062 | quiet_cmd_clang_tools = CHECK $< |
| 2005 | 2063 | cmd_clang_tools = $(PYTHON3) $(srctree)/scripts/clang-tools/run-clang-tools.py $@ $< |
| 2006 | 2064 | |
| 2007 | −clang-tidy clang-analyzer: $(extmod_prefix)compile_commands.json | |
| 2065 | +clang-tidy clang-analyzer: compile_commands.json | |
| 2008 | 2066 | $(call cmd,clang_tools) |
| 2009 | 2067 | else |
| 2010 | 2068 | clang-tidy clang-analyzer: |
| @@ -2015,7 +2073,7 @@ endif · 4 unmodified lines | ||
| 2015 | 2073 | # Scripts to check various things for consistency |
| 2016 | 2074 | # --------------------------------------------------------------------------- |
| 2017 | 2075 | |
| 2018 | −PHONY += includecheck versioncheck coccicheck export_report | |
| 2076 | +PHONY += includecheck versioncheck coccicheck | |
| 2019 | 2077 | |
| 2020 | 2078 | includecheck: |
| 2021 | 2079 | find $(srctree)/* $(RCS_FIND_IGNORE) \ |
| @@ -2030,9 +2088,6 @@ versioncheck: · 8 unmodified lines | ||
| 2030 | 2088 | coccicheck: |
| 2031 | 2089 | $(Q)$(BASH) $(srctree)/scripts/$@ |
| 2032 | 2090 | |
| 2033 | −export_report: | |
| 2034 | − $(PERL) $(srctree)/scripts/export_report.pl | |
| 2035 | − | |
| 2036 | 2091 | PHONY += checkstack kernelrelease kernelversion image_name |
| 2037 | 2092 | |
| 2038 | 2093 | # UML needs a little special treatment here. It wants to use the host |
| @@ -812,6 +812,45 @@ config LTO_CLANG_THIN · 811 unmodified lines | ||
| 812 | 812 | If unsure, say Y. |
| 813 | 813 | endchoice |
| 814 | 814 | |
| 815 | +config ARCH_SUPPORTS_AUTOFDO_CLANG | |
| 816 | + bool | |
| 817 | + | |
| 818 | +config AUTOFDO_CLANG | |
| 819 | + bool "Enable Clang's AutoFDO build (EXPERIMENTAL)" | |
| 820 | + depends on ARCH_SUPPORTS_AUTOFDO_CLANG | |
| 821 | + depends on CC_IS_CLANG && CLANG_VERSION >= 170000 | |
| 822 | + help | |
| 823 | + This option enables Clang’s AutoFDO build. When | |
| 824 | + an AutoFDO profile is specified in variable | |
| 825 | + CLANG_AUTOFDO_PROFILE during the build process, | |
| 826 | + Clang uses the profile to optimize the kernel. | |
| 827 | + | |
| 828 | + If no profile is specified, AutoFDO options are | |
| 829 | + still passed to Clang to facilitate the collection | |
| 830 | + of perf data for creating an AutoFDO profile in | |
| 831 | + subsequent builds. | |
| 832 | + | |
| 833 | + If unsure, say N. | |
| 834 | + | |
| 835 | +config ARCH_SUPPORTS_PROPELLER_CLANG | |
| 836 | + bool | |
| 837 | + | |
| 838 | +config PROPELLER_CLANG | |
| 839 | + bool "Enable Clang's Propeller build" | |
| 840 | + depends on ARCH_SUPPORTS_PROPELLER_CLANG | |
| 841 | + depends on CC_IS_CLANG && CLANG_VERSION >= 190000 | |
| 842 | + help | |
| 843 | + This option enables Clang’s Propeller build. When the Propeller | |
| 844 | + profiles is specified in variable CLANG_PROPELLER_PROFILE_PREFIX | |
| 845 | + during the build process, Clang uses the profiles to optimize | |
| 846 | + the kernel. | |
| 847 | + | |
| 848 | + If no profile is specified, Propeller options are still passed | |
| 849 | + to Clang to facilitate the collection of perf data for creating | |
| 850 | + the Propeller profiles in subsequent builds. | |
| 851 | + | |
| 852 | + If unsure, say N. | |
| 853 | + | |
| 815 | 854 | config ARCH_SUPPORTS_CFI_CLANG |
| 816 | 855 | bool |
| 817 | 856 | help |
| @@ -3,7 +3,7 @@ · 2 unmodified lines | ||
| 3 | 3 | #define _ALPHA_SPINLOCK_TYPES_H |
| 4 | 4 | |
| 5 | 5 | #ifndef __LINUX_SPINLOCK_TYPES_RAW_H |
| 6 | −# error "please don't include this file directly" | |
| 6 | +# error "Please do not include this file directly." | |
| 7 | 7 | #endif |
| 8 | 8 | |
| 9 | 9 | typedef struct { |
| @@ -64,7 +64,7 @@ static int __pci_mmap_fits(struct pci_dev *pdev, int num, · 63 unmodified lines | ||
| 64 | 64 | * Return: %0 on success, negative error code otherwise |
| 65 | 65 | */ |
| 66 | 66 | static int pci_mmap_resource(struct kobject *kobj, |
| 67 | − struct bin_attribute *attr, | |
| 67 | + const struct bin_attribute *attr, | |
| 68 | 68 | struct vm_area_struct *vma, int sparse) |
| 69 | 69 | { |
| 70 | 70 | struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj)); |
| @@ -93,14 +93,14 @@ static int pci_mmap_resource(struct kobject *kobj, · 22 unmodified lines | ||
| 93 | 93 | } |
| 94 | 94 | |
| 95 | 95 | static int pci_mmap_resource_sparse(struct file *filp, struct kobject *kobj, |
| 96 | − struct bin_attribute *attr, | |
| 96 | + const struct bin_attribute *attr, | |
| 97 | 97 | struct vm_area_struct *vma) |
| 98 | 98 | { |
| 99 | 99 | return pci_mmap_resource(kobj, attr, vma, 1); |
| 100 | 100 | } |
| 101 | 101 | |
| 102 | 102 | static int pci_mmap_resource_dense(struct file *filp, struct kobject *kobj, |
| 103 | − struct bin_attribute *attr, | |
| 103 | + const struct bin_attribute *attr, | |
| 104 | 104 | struct vm_area_struct *vma) |
| 105 | 105 | { |
| 106 | 106 | return pci_mmap_resource(kobj, attr, vma, 0); |
| @@ -264,13 +264,13 @@ stack_protector_prepare: prepare0 · 263 unmodified lines | ||
| 264 | 264 | -mstack-protector-guard=tls \ |
| 265 | 265 | -mstack-protector-guard-offset=$(shell \ |
| 266 | 266 | awk '{if ($$2 == "TSK_STACK_CANARY") print $$3;}'\ |
| 267 | − include/generated/asm-offsets.h)) | |
| 267 | + $(objtree)/include/generated/asm-offsets.h)) | |
| 268 | 268 | else |
| 269 | 269 | stack_protector_prepare: prepare0 |
| 270 | 270 | $(eval SSP_PLUGIN_CFLAGS := \ |
| 271 | 271 | -fplugin-arg-arm_ssp_per_task_plugin-offset=$(shell \ |
| 272 | 272 | awk '{if ($$2 == "TSK_STACK_CANARY") print $$3;}'\ |
| 273 | − include/generated/asm-offsets.h)) | |
| 273 | + $(objtree)/include/generated/asm-offsets.h)) | |
| 274 | 274 | $(eval KBUILD_CFLAGS += $(SSP_PLUGIN_CFLAGS)) |
| 275 | 275 | $(eval GCC_PLUGINS_CFLAGS += $(SSP_PLUGIN_CFLAGS)) |
| 276 | 276 | endif |
| @@ -516,7 +516,7 @@ static void locomo_remove(struct platform_device *dev) · 515 unmodified lines | ||
| 516 | 516 | */ |
| 517 | 517 | static struct platform_driver locomo_device_driver = { |
| 518 | 518 | .probe = locomo_probe, |
| 519 | − .remove_new = locomo_remove, | |
| 519 | + .remove = locomo_remove, | |
| 520 | 520 | #ifdef CONFIG_PM |
| 521 | 521 | .suspend = locomo_suspend, |
| 522 | 522 | .resume = locomo_resume, |
| @@ -1154,7 +1154,7 @@ static struct dev_pm_ops sa1111_pm_ops = { · 1153 unmodified lines | ||
| 1154 | 1154 | */ |
| 1155 | 1155 | static struct platform_driver sa1111_device_driver = { |
| 1156 | 1156 | .probe = sa1111_probe, |
| 1157 | − .remove_new = sa1111_remove, | |
| 1157 | + .remove = sa1111_remove, | |
| 1158 | 1158 | .driver = { |
| 1159 | 1159 | .name = "sa1111", |
| 1160 | 1160 | .pm = &sa1111_pm_ops, |
| @@ -250,7 +250,7 @@ static void scoop_remove(struct platform_device *pdev) · 249 unmodified lines | ||
| 250 | 250 | |
| 251 | 251 | static struct platform_driver scoop_driver = { |
| 252 | 252 | .probe = scoop_probe, |
| 253 | − .remove_new = scoop_remove, | |
| 253 | + .remove = scoop_remove, | |
| 254 | 254 | .suspend = scoop_suspend, |
| 255 | 255 | .resume = scoop_resume, |
| 256 | 256 | .driver = { |
| @@ -9,13 +9,17 @@ · 8 unmodified lines | ||
| 9 | 9 | |
| 10 | 10 | #define JUMP_LABEL_NOP_SIZE 4 |
| 11 | 11 | |
| 12 | +/* This macro is also expanded on the Rust side. */ | |
| 13 | +#define ARCH_STATIC_BRANCH_ASM(key, label) \ | |
| 14 | + "1:\n\t" \ | |
| 15 | + WASM(nop) "\n\t" \ | |
| 16 | + ".pushsection __jump_table, \"aw\"\n\t" \ | |
| 17 | + ".word 1b, " label ", " key "\n\t" \ | |
| 18 | + ".popsection\n\t" \ | |
| 19 | + | |
| 12 | 20 | static __always_inline bool arch_static_branch(struct static_key *key, bool branch) |
| 13 | 21 | { |
| 14 | − asm goto("1:\n\t" | |
| 15 | − WASM(nop) "\n\t" | |
| 16 | − ".pushsection __jump_table, \"aw\"\n\t" | |
| 17 | − ".word 1b, %l[l_yes], %c0\n\t" | |
| 18 | − ".popsection\n\t" | |
| 22 | + asm goto(ARCH_STATIC_BRANCH_ASM("%c0", "%l[l_yes]") | |
| 19 | 23 | : : "i" (&((char *)key)[branch]) : : l_yes); |
| 20 | 24 | |
| 21 | 25 | return false; |
| @@ -3,7 +3,7 @@ · 2 unmodified lines | ||
| 3 | 3 | #define __ASM_SPINLOCK_TYPES_H |
| 4 | 4 | |
| 5 | 5 | #ifndef __LINUX_SPINLOCK_TYPES_RAW_H |
| 6 | −# error "please don't include this file directly" | |
| 6 | +# error "Please do not include this file directly." | |
| 7 | 7 | #endif |
| 8 | 8 | |
| 9 | 9 | #define TICKET_SHIFT 16 |
| @@ -25,6 +25,7 @@ · 24 unmodified lines | ||
| 25 | 25 | #include <asm/tls.h> |
| 26 | 26 | #include <asm/system_info.h> |
| 27 | 27 | #include <asm/uaccess-asm.h> |
| 28 | +#include <asm/kasan_def.h> | |
| 28 | 29 | |
| 29 | 30 | #include "entry-header.S" |
| 30 | 31 | #include <asm/probes.h> |
| @@ -561,6 +562,13 @@ ENTRY(__switch_to) · 530 unmodified lines | ||
| 561 | 562 | @ entries covering the vmalloc region. |
| 562 | 563 | @ |
| 563 | 564 | ldr r2, [ip] |
| 565 | +#ifdef CONFIG_KASAN_VMALLOC | |
| 566 | + @ Also dummy read from the KASAN shadow memory for the new stack if we | |
| 567 | + @ are using KASAN | |
| 568 | + mov_l r2, KASAN_SHADOW_OFFSET | |
| 569 | + add r2, r2, ip, lsr #KASAN_SHADOW_SCALE_SHIFT | |
| 570 | + ldr r2, [r2] | |
| 571 | +#endif | |
| 564 | 572 | #endif |
| 565 | 573 | |
| 566 | 574 | @ When CONFIG_THREAD_INFO_IN_TASK=n, the update of SP itself is what |
| @@ -6,7 +6,6 @@ menuconfig ARCH_MXC · 5 unmodified lines | ||
| 6 | 6 | select CLKSRC_IMX_GPT |
| 7 | 7 | select GENERIC_IRQ_CHIP |
| 8 | 8 | select GPIOLIB |
| 9 | − select PINCTRL | |
| 10 | 9 | select PM_OPP if PM |
| 11 | 10 | select SOC_BUS |
| 12 | 11 | select SRAM |
| @@ -49,7 +48,6 @@ config SOC_IMX31 · 36 unmodified lines | ||
| 49 | 48 | config SOC_IMX35 |
| 50 | 49 | bool "i.MX35 support" |
| 51 | 50 | select MXC_AVIC |
| 52 | − select PINCTRL_IMX35 | |
| 53 | 51 | help |
| 54 | 52 | This enables support for Freescale i.MX35 processor |
| 55 | 53 | |
| @@ -61,7 +59,6 @@ config SOC_IMX1 · 5 unmodified lines | ||
| 61 | 59 | bool "i.MX1 support" |
| 62 | 60 | select CPU_ARM920T |
| 63 | 61 | select MXC_AVIC |
| 64 | − select PINCTRL_IMX1 | |
| 65 | 62 | help |
| 66 | 63 | This enables support for Freescale i.MX1 processor |
| 67 | 64 | |
| @@ -73,7 +70,6 @@ config SOC_IMX25 · 5 unmodified lines | ||
| 73 | 70 | bool "i.MX25 support" |
| 74 | 71 | select CPU_ARM926T |
| 75 | 72 | select MXC_AVIC |
| 76 | − select PINCTRL_IMX25 | |
| 77 | 73 | help |
| 78 | 74 | This enables support for Freescale i.MX25 processor |
| 79 | 75 | |
| @@ -81,7 +77,6 @@ config SOC_IMX27 · 1 unmodified line | ||
| 81 | 77 | bool "i.MX27 support" |
| 82 | 78 | select CPU_ARM926T |
| 83 | 79 | select MXC_AVIC |
| 84 | − select PINCTRL_IMX27 | |
| 85 | 80 | help |
| 86 | 81 | This enables support for Freescale i.MX27 processor |
| 87 | 82 | |
| @@ -98,7 +93,6 @@ config SOC_IMX5 · 10 unmodified lines | ||
| 98 | 93 | |
| 99 | 94 | config SOC_IMX50 |
| 100 | 95 | bool "i.MX50 support" |
| 101 | − select PINCTRL_IMX50 | |
| 102 | 96 | select SOC_IMX5 |
| 103 | 97 | |
| 104 | 98 | help |
| @@ -106,14 +100,12 @@ config SOC_IMX50 · 1 unmodified line | ||
| 106 | 100 | |
| 107 | 101 | config SOC_IMX51 |
| 108 | 102 | bool "i.MX51 support" |
| 109 | − select PINCTRL_IMX51 | |
| 110 | 103 | select SOC_IMX5 |
| 111 | 104 | help |
| 112 | 105 | This enables support for Freescale i.MX51 processor |
| 113 | 106 | |
| 114 | 107 | config SOC_IMX53 |
| 115 | 108 | bool "i.MX53 support" |
| 116 | − select PINCTRL_IMX53 | |
| 117 | 109 | select SOC_IMX5 |
| 118 | 110 | |
| 119 | 111 | help |
| @@ -137,7 +129,6 @@ config SOC_IMX6Q · 17 unmodified lines | ||
| 137 | 129 | select ARM_ERRATA_775420 |
| 138 | 130 | select HAVE_ARM_SCU if SMP |
| 139 | 131 | select HAVE_ARM_TWD |
| 140 | − select PINCTRL_IMX6Q | |
| 141 | 132 | select SOC_IMX6 |
| 142 | 133 | |
| 143 | 134 | help |
| @@ -147,7 +138,6 @@ config SOC_IMX6SL · 3 unmodified lines | ||
| 147 | 138 | bool "i.MX6 SoloLite support" |
| 148 | 139 | select ARM_ERRATA_754322 |
| 149 | 140 | select ARM_ERRATA_775420 |
| 150 | − select PINCTRL_IMX6SL | |
| 151 | 141 | select SOC_IMX6 |
| 152 | 142 | |
| 153 | 143 | help |
| @@ -157,7 +147,6 @@ config SOC_IMX6SLL · 3 unmodified lines | ||
| 157 | 147 | bool "i.MX6 SoloLiteLite support" |
| 158 | 148 | select ARM_ERRATA_754322 |
| 159 | 149 | select ARM_ERRATA_775420 |
| 160 | − select PINCTRL_IMX6SLL | |
| 161 | 150 | select SOC_IMX6 |
| 162 | 151 | |
| 163 | 152 | help |
| @@ -167,7 +156,6 @@ config SOC_IMX6SX · 3 unmodified lines | ||
| 167 | 156 | bool "i.MX6 SoloX support" |
| 168 | 157 | select ARM_ERRATA_754322 |
| 169 | 158 | select ARM_ERRATA_775420 |
| 170 | − select PINCTRL_IMX6SX | |
| 171 | 159 | select SOC_IMX6 |
| 172 | 160 | |
| 173 | 161 | help |
| @@ -175,7 +163,6 @@ config SOC_IMX6SX · 1 unmodified line | ||
| 175 | 163 | |
| 176 | 164 | config SOC_IMX6UL |
| 177 | 165 | bool "i.MX6 UltraLite support" |
| 178 | − select PINCTRL_IMX6UL | |
| 179 | 166 | select SOC_IMX6 |
| 180 | 167 | select ARM_ERRATA_814220 |
| 181 | 168 | |
| @@ -211,7 +198,6 @@ config SOC_IMX7D_CM4 · 29 unmodified lines | ||
| 211 | 198 | |
| 212 | 199 | config SOC_IMX7D |
| 213 | 200 | bool "i.MX7 Dual support" |
| 214 | − select PINCTRL_IMX7D | |
| 215 | 201 | select SOC_IMX7D_CA7 if ARCH_MULTI_V7 |
| 216 | 202 | select SOC_IMX7D_CM4 if ARM_SINGLE_ARMV7M |
| 217 | 203 | select ARM_ERRATA_814220 if ARCH_MULTI_V7 |
| @@ -221,7 +207,6 @@ config SOC_IMX7D · 3 unmodified lines | ||
| 221 | 207 | config SOC_IMX7ULP |
| 222 | 208 | bool "i.MX7ULP support" |
| 223 | 209 | select CLKSRC_IMX_TPM |
| 224 | − select PINCTRL_IMX7ULP | |
| 225 | 210 | select SOC_IMX7D_CA7 if ARCH_MULTI_V7 |
| 226 | 211 | select SOC_IMX7D_CM4 if ARM_SINGLE_ARMV7M |
| 227 | 212 | help |
| @@ -237,7 +222,6 @@ config SOC_IMXRT · 9 unmodified lines | ||
| 237 | 222 | config SOC_VF610 |
| 238 | 223 | bool "Vybrid Family VF610 support" |
| 239 | 224 | select ARM_GIC if ARCH_MULTI_V7 |
| 240 | − select PINCTRL_VF610 | |
| 241 | 225 | |
| 242 | 226 | help |
| 243 | 227 | This enables support for Freescale Vybrid VF610 processor. |
| @@ -596,7 +596,7 @@ static struct platform_driver imx_mmdc_driver = { · 595 unmodified lines | ||
| 596 | 596 | .of_match_table = imx_mmdc_dt_ids, |
| 597 | 597 | }, |
| 598 | 598 | .probe = imx_mmdc_probe, |
| 599 | − .remove_new = imx_mmdc_remove, | |
| 599 | + .remove = imx_mmdc_remove, | |
| 600 | 600 | }; |
| 601 | 601 | |
| 602 | 602 | static int __init imx_mmdc_init(void) |
| @@ -832,7 +832,7 @@ static void omap_system_dma_remove(struct platform_device *pdev) · 831 unmodified lines | ||
| 832 | 832 | |
| 833 | 833 | static struct platform_driver omap_system_dma_driver = { |
| 834 | 834 | .probe = omap_system_dma_probe, |
| 835 | − .remove_new = omap_system_dma_remove, | |
| 835 | + .remove = omap_system_dma_remove, | |
| 836 | 836 | .driver = { |
| 837 | 837 | .name = "omap_dma_system" |
| 838 | 838 | }, |
| @@ -919,7 +919,7 @@ static void sharpsl_pm_remove(struct platform_device *pdev) · 918 unmodified lines | ||
| 919 | 919 | |
| 920 | 920 | static struct platform_driver sharpsl_pm_driver = { |
| 921 | 921 | .probe = sharpsl_pm_probe, |
| 922 | − .remove_new = sharpsl_pm_remove, | |
| 922 | + .remove = sharpsl_pm_remove, | |
| 923 | 923 | .suspend = sharpsl_pm_suspend, |
| 924 | 924 | .resume = sharpsl_pm_resume, |
| 925 | 925 | .driver = { |
| @@ -188,7 +188,7 @@ static void jornada_ssp_remove(struct platform_device *dev) · 187 unmodified lines | ||
| 188 | 188 | |
| 189 | 189 | struct platform_driver jornadassp_driver = { |
| 190 | 190 | .probe = jornada_ssp_probe, |
| 191 | − .remove_new = jornada_ssp_remove, | |
| 191 | + .remove = jornada_ssp_remove, | |
| 192 | 192 | .driver = { |
| 193 | 193 | .name = "jornada_ssp", |
| 194 | 194 | }, |
| @@ -423,7 +423,7 @@ static const struct dev_pm_ops neponset_pm_ops = { · 422 unmodified lines | ||
| 423 | 423 | |
| 424 | 424 | static struct platform_driver neponset_device_driver = { |
| 425 | 425 | .probe = neponset_probe, |
| 426 | − .remove_new = neponset_remove, | |
| 426 | + .remove = neponset_remove, | |
| 427 | 427 | .driver = { |
| 428 | 428 | .name = "neponset", |
| 429 | 429 | .pm = PM_OPS, |
| @@ -23,6 +23,7 @@ · 22 unmodified lines | ||
| 23 | 23 | */ |
| 24 | 24 | #include <linux/module.h> |
| 25 | 25 | #include <linux/errno.h> |
| 26 | +#include <linux/kasan.h> | |
| 26 | 27 | #include <linux/mm.h> |
| 27 | 28 | #include <linux/vmalloc.h> |
| 28 | 29 | #include <linux/io.h> |
| @@ -115,16 +116,40 @@ int ioremap_page(unsigned long virt, unsigned long phys, · 86 unmodified lines | ||
| 115 | 116 | } |
| 116 | 117 | EXPORT_SYMBOL(ioremap_page); |
| 117 | 118 | |
| 119 | +#ifdef CONFIG_KASAN | |
| 120 | +static unsigned long arm_kasan_mem_to_shadow(unsigned long addr) | |
| 121 | +{ | |
| 122 | + return (unsigned long)kasan_mem_to_shadow((void *)addr); | |
| 123 | +} | |
| 124 | +#else | |
| 125 | +static unsigned long arm_kasan_mem_to_shadow(unsigned long addr) | |
| 126 | +{ | |
| 127 | + return 0; | |
| 128 | +} | |
| 129 | +#endif | |
| 130 | + | |
| 131 | +static void memcpy_pgd(struct mm_struct *mm, unsigned long start, | |
| 132 | + unsigned long end) | |
| 133 | +{ | |
| 134 | + end = ALIGN(end, PGDIR_SIZE); | |
| 135 | + memcpy(pgd_offset(mm, start), pgd_offset_k(start), | |
| 136 | + sizeof(pgd_t) * (pgd_index(end) - pgd_index(start))); | |
| 137 | +} | |
| 138 | + | |
| 118 | 139 | void __check_vmalloc_seq(struct mm_struct *mm) |
| 119 | 140 | { |
| 120 | 141 | int seq; |
| 121 | 142 | |
| 122 | 143 | do { |
| 123 | − seq = atomic_read(&init_mm.context.vmalloc_seq); | |
| 124 | − memcpy(pgd_offset(mm, VMALLOC_START), | |
| 125 | − pgd_offset_k(VMALLOC_START), | |
| 126 | − sizeof(pgd_t) * (pgd_index(VMALLOC_END) - | |
| 127 | − pgd_index(VMALLOC_START))); | |
| 144 | + seq = atomic_read_acquire(&init_mm.context.vmalloc_seq); | |
| 145 | + memcpy_pgd(mm, VMALLOC_START, VMALLOC_END); | |
| 146 | + if (IS_ENABLED(CONFIG_KASAN_VMALLOC)) { | |
| 147 | + unsigned long start = | |
| 148 | + arm_kasan_mem_to_shadow(VMALLOC_START); | |
| 149 | + unsigned long end = | |
| 150 | + arm_kasan_mem_to_shadow(VMALLOC_END); | |
| 151 | + memcpy_pgd(mm, start, end); | |
| 152 | + } | |
| 128 | 153 | /* |
| 129 | 154 | * Use a store-release so that other CPUs that observe the |
| 130 | 155 | * counter's new value are guaranteed to see the results of the |
| @@ -55,6 +55,34 @@ extern unsigned int VFP_arch_feroceon __alias(VFP_arch); · 54 unmodified lines | ||
| 55 | 55 | */ |
| 56 | 56 | union vfp_state *vfp_current_hw_state[NR_CPUS]; |
| 57 | 57 | |
| 58 | +/* | |
| 59 | + * Claim ownership of the VFP unit. | |
| 60 | + * | |
| 61 | + * The caller may change VFP registers until vfp_state_release() is called. | |
| 62 | + * | |
| 63 | + * local_bh_disable() is used to disable preemption and to disable VFP | |
| 64 | + * processing in softirq context. On PREEMPT_RT kernels local_bh_disable() is | |
| 65 | + * not sufficient because it only serializes soft interrupt related sections | |
| 66 | + * via a local lock, but stays preemptible. Disabling preemption is the right | |
| 67 | + * choice here as bottom half processing is always in thread context on RT | |
| 68 | + * kernels so it implicitly prevents bottom half processing as well. | |
| 69 | + */ | |
| 70 | +static void vfp_state_hold(void) | |
| 71 | +{ | |
| 72 | + if (!IS_ENABLED(CONFIG_PREEMPT_RT)) | |
| 73 | + local_bh_disable(); | |
| 74 | + else | |
| 75 | + preempt_disable(); | |
| 76 | +} | |
| 77 | + | |
| 78 | +static void vfp_state_release(void) | |
| 79 | +{ | |
| 80 | + if (!IS_ENABLED(CONFIG_PREEMPT_RT)) | |
| 81 | + local_bh_enable(); | |
| 82 | + else | |
| 83 | + preempt_enable(); | |
| 84 | +} | |
| 85 | + | |
| 58 | 86 | /* |
| 59 | 87 | * Is 'thread's most up to date state stored in this CPUs hardware? |
| 60 | 88 | * Must be called from non-preemptible context. |
| @@ -240,7 +268,7 @@ static void vfp_panic(char *reason, u32 inst) · 179 unmodified lines | ||
| 240 | 268 | /* |
| 241 | 269 | * Process bitmask of exception conditions. |
| 242 | 270 | */ |
| 243 | −static void vfp_raise_exceptions(u32 exceptions, u32 inst, u32 fpscr, struct pt_regs *regs) | |
| 271 | +static int vfp_raise_exceptions(u32 exceptions, u32 inst, u32 fpscr) | |
| 244 | 272 | { |
| 245 | 273 | int si_code = 0; |
| 246 | 274 | |
| @@ -248,8 +276,7 @@ static void vfp_raise_exceptions(u32 exceptions, u32 inst, u32 fpscr, struct pt_ · 1 unmodified line | ||
| 248 | 276 | |
| 249 | 277 | if (exceptions == VFP_EXCEPTION_ERROR) { |
| 250 | 278 | vfp_panic("unhandled bounce", inst); |
| 251 | − vfp_raise_sigfpe(FPE_FLTINV, regs); | |
| 252 | − return; | |
| 279 | + return FPE_FLTINV; | |
| 253 | 280 | } |
| 254 | 281 | |
| 255 | 282 | /* |
| @@ -277,8 +304,7 @@ static void vfp_raise_exceptions(u32 exceptions, u32 inst, u32 fpscr, struct pt_ · 21 unmodified lines | ||
| 277 | 304 | RAISE(FPSCR_OFC, FPSCR_OFE, FPE_FLTOVF); |
| 278 | 305 | RAISE(FPSCR_IOC, FPSCR_IOE, FPE_FLTINV); |
| 279 | 306 | |
| 280 | − if (si_code) | |
| 281 | − vfp_raise_sigfpe(si_code, regs); | |
| 307 | + return si_code; | |
| 282 | 308 | } |
| 283 | 309 | |
| 284 | 310 | /* |
| @@ -324,6 +350,8 @@ static u32 vfp_emulate_instruction(u32 inst, u32 fpscr, struct pt_regs *regs) · 39 unmodified lines | ||
| 324 | 350 | static void VFP_bounce(u32 trigger, u32 fpexc, struct pt_regs *regs) |
| 325 | 351 | { |
| 326 | 352 | u32 fpscr, orig_fpscr, fpsid, exceptions; |
| 353 | + int si_code2 = 0; | |
| 354 | + int si_code = 0; | |
| 327 | 355 | |
| 328 | 356 | pr_debug("VFP: bounce: trigger %08x fpexc %08x\n", trigger, fpexc); |
| 329 | 357 | |
| @@ -369,8 +397,8 @@ static void VFP_bounce(u32 trigger, u32 fpexc, struct pt_regs *regs) · 39 unmodified lines | ||
| 369 | 397 | * unallocated VFP instruction but with FPSCR.IXE set and not |
| 370 | 398 | * on VFP subarch 1. |
| 371 | 399 | */ |
| 372 | − vfp_raise_exceptions(VFP_EXCEPTION_ERROR, trigger, fpscr, regs); | |
| 373 | − return; | |
| 400 | + si_code = vfp_raise_exceptions(VFP_EXCEPTION_ERROR, trigger, fpscr); | |
| 401 | + goto exit; | |
| 374 | 402 | } |
| 375 | 403 | |
| 376 | 404 | /* |
| @@ -394,14 +422,14 @@ static void VFP_bounce(u32 trigger, u32 fpexc, struct pt_regs *regs) · 17 unmodified lines | ||
| 394 | 422 | */ |
| 395 | 423 | exceptions = vfp_emulate_instruction(trigger, fpscr, regs); |
| 396 | 424 | if (exceptions) |
| 397 | − vfp_raise_exceptions(exceptions, trigger, orig_fpscr, regs); | |
| 425 | + si_code2 = vfp_raise_exceptions(exceptions, trigger, orig_fpscr); | |
| 398 | 426 | |
| 399 | 427 | /* |
| 400 | 428 | * If there isn't a second FP instruction, exit now. Note that |
| 401 | 429 | * the FPEXC.FP2V bit is valid only if FPEXC.EX is 1. |
| 402 | 430 | */ |
| 403 | 431 | if ((fpexc & (FPEXC_EX | FPEXC_FP2V)) != (FPEXC_EX | FPEXC_FP2V)) |
| 404 | − return; | |
| 432 | + goto exit; | |
| 405 | 433 | |
| 406 | 434 | /* |
| 407 | 435 | * The barrier() here prevents fpinst2 being read |
| @@ -413,7 +441,13 @@ static void VFP_bounce(u32 trigger, u32 fpexc, struct pt_regs *regs) · 5 unmodified lines | ||
| 413 | 441 | emulate: |
| 414 | 442 | exceptions = vfp_emulate_instruction(trigger, orig_fpscr, regs); |
| 415 | 443 | if (exceptions) |
| 416 | − vfp_raise_exceptions(exceptions, trigger, orig_fpscr, regs); | |
| 444 | + si_code = vfp_raise_exceptions(exceptions, trigger, orig_fpscr); | |
| 445 | +exit: | |
| 446 | + vfp_state_release(); | |
| 447 | + if (si_code2) | |
| 448 | + vfp_raise_sigfpe(si_code2, regs); | |
| 449 | + if (si_code) | |
| 450 | + vfp_raise_sigfpe(si_code, regs); | |
| 417 | 451 | } |
| 418 | 452 | |
| 419 | 453 | static void vfp_enable(void *unused) |
| @@ -512,11 +546,9 @@ static inline void vfp_pm_init(void) { } · 92 unmodified lines | ||
| 512 | 546 | */ |
| 513 | 547 | void vfp_sync_hwstate(struct thread_info *thread) |
| 514 | 548 | { |
| 515 | − unsigned int cpu = get_cpu(); | |
| 549 | + vfp_state_hold(); | |
| 516 | 550 | |
| 517 | − local_bh_disable(); | |
| 518 | − | |
| 519 | − if (vfp_state_in_hw(cpu, thread)) { | |
| 551 | + if (vfp_state_in_hw(raw_smp_processor_id(), thread)) { | |
| 520 | 552 | u32 fpexc = fmrx(FPEXC); |
| 521 | 553 | |
| 522 | 554 | /* |
| @@ -527,8 +559,7 @@ void vfp_sync_hwstate(struct thread_info *thread) · 4 unmodified lines | ||
| 527 | 559 | fmxr(FPEXC, fpexc); |
| 528 | 560 | } |
| 529 | 561 | |
| 530 | − local_bh_enable(); | |
| 531 | − put_cpu(); | |
| 562 | + vfp_state_release(); | |
| 532 | 563 | } |
| 533 | 564 | |
| 534 | 565 | /* Ensure that the thread reloads the hardware VFP state on the next use. */ |
| @@ -683,7 +714,7 @@ static int vfp_support_entry(struct pt_regs *regs, u32 trigger) · 148 unmodified lines | ||
| 683 | 714 | if (!user_mode(regs)) |
| 684 | 715 | return vfp_kmode_exception(regs, trigger); |
| 685 | 716 | |
| 686 | − local_bh_disable(); | |
| 717 | + vfp_state_hold(); | |
| 687 | 718 | fpexc = fmrx(FPEXC); |
| 688 | 719 | |
| 689 | 720 | /* |
| @@ -748,6 +779,7 @@ static int vfp_support_entry(struct pt_regs *regs, u32 trigger) · 58 unmodified lines | ||
| 748 | 779 | * replay the instruction that trapped. |
| 749 | 780 | */ |
| 750 | 781 | fmxr(FPEXC, fpexc); |
| 782 | + vfp_state_release(); | |
| 751 | 783 | } else { |
| 752 | 784 | /* Check for synchronous or asynchronous exceptions */ |
| 753 | 785 | if (!(fpexc & (FPEXC_EX | FPEXC_DEX))) { |
| @@ -762,17 +794,17 @@ static int vfp_support_entry(struct pt_regs *regs, u32 trigger) · 8 unmodified lines | ||
| 762 | 794 | if (!(fpscr & FPSCR_IXE)) { |
| 763 | 795 | if (!(fpscr & FPSCR_LENGTH_MASK)) { |
| 764 | 796 | pr_debug("not VFP\n"); |
| 765 | − local_bh_enable(); | |
| 797 | + vfp_state_release(); | |
| 766 | 798 | return -ENOEXEC; |
| 767 | 799 | } |
| 768 | 800 | fpexc |= FPEXC_DEX; |
| 769 | 801 | } |
| 770 | 802 | } |
| 771 | 803 | bounce: regs->ARM_pc += 4; |
| 804 | + /* VFP_bounce() will invoke vfp_state_release() */ | |
| 772 | 805 | VFP_bounce(trigger, fpexc, regs); |
| 773 | 806 | } |
| 774 | 807 | |
| 775 | − local_bh_enable(); | |
| 776 | 808 | return 0; |
| 777 | 809 | } |
| 778 | 810 | |
| @@ -837,7 +869,7 @@ void kernel_neon_begin(void) · 58 unmodified lines | ||
| 837 | 869 | unsigned int cpu; |
| 838 | 870 | u32 fpexc; |
| 839 | 871 | |
| 840 | − local_bh_disable(); | |
| 872 | + vfp_state_hold(); | |
| 841 | 873 | |
| 842 | 874 | /* |
| 843 | 875 | * Kernel mode NEON is only allowed outside of hardirq context with |
| @@ -868,7 +900,7 @@ void kernel_neon_end(void) · 24 unmodified lines | ||
| 868 | 900 | { |
| 869 | 901 | /* Disable the NEON/VFP unit. */ |
| 870 | 902 | fmxr(FPEXC, fmrx(FPEXC) & ~FPEXC_EN); |
| 871 | − local_bh_enable(); | |
| 903 | + vfp_state_release(); | |
| 872 | 904 | } |
| 873 | 905 | EXPORT_SYMBOL(kernel_neon_end); |
| 874 | 906 | |
| @@ -14,7 +14,6 @@ config ARM64 · 13 unmodified lines | ||
| 14 | 14 | select ARCH_HAS_DEBUG_WX |
| 15 | 15 | select ARCH_BINFMT_ELF_EXTRA_PHDRS |
| 16 | 16 | select ARCH_BINFMT_ELF_STATE |
| 17 | − select ARCH_CORRECT_STACKTRACE_ON_KRETPROBE | |
| 18 | 17 | select ARCH_ENABLE_HUGEPAGE_MIGRATION if HUGETLB_PAGE && MIGRATION |
| 19 | 18 | select ARCH_ENABLE_MEMORY_HOTPLUG |
| 20 | 19 | select ARCH_ENABLE_MEMORY_HOTREMOVE |
| @@ -1236,6 +1235,17 @@ config HISILICON_ERRATUM_161600802 · 1215 unmodified lines | ||
| 1236 | 1235 | |
| 1237 | 1236 | If unsure, say Y. |
| 1238 | 1237 | |
| 1238 | +config HISILICON_ERRATUM_162100801 | |
| 1239 | + bool "Hip09 162100801 erratum support" | |
| 1240 | + default y | |
| 1241 | + help | |
| 1242 | + When enabling GICv4.1 in hip09, VMAPP will fail to clear some caches | |
| 1243 | + during unmapping operation, which will cause some vSGIs lost. | |
| 1244 | + To fix the issue, invalidate related vPE cache through GICR_INVALLR | |
| 1245 | + after VMOVP. | |
| 1246 | + | |
| 1247 | + If unsure, say Y. | |
| 1248 | + | |
| 1239 | 1249 | config QCOM_FALKOR_ERRATUM_1003 |
| 1240 | 1250 | bool "Falkor E1003: Incorrect translation due to ASID change" |
| 1241 | 1251 | default y |
| @@ -71,7 +71,7 @@ stack_protector_prepare: prepare0 · 70 unmodified lines | ||
| 71 | 71 | -mstack-protector-guard-reg=sp_el0 \ |
| 72 | 72 | -mstack-protector-guard-offset=$(shell \ |
| 73 | 73 | awk '{if ($$2 == "TSK_STACK_CANARY") print $$3;}' \ |
| 74 | − include/generated/asm-offsets.h)) | |
| 74 | + $(objtree)/include/generated/asm-offsets.h)) | |
| 75 | 75 | endif |
| 76 | 76 | |
| 77 | 77 | ifeq ($(CONFIG_ARM64_BTI_KERNEL),y) |
| @@ -14,6 +14,7 @@ · 13 unmodified lines | ||
| 14 | 14 | compatible = "melfas,mip4_ts"; |
| 15 | 15 | reg = <0x34>; |
| 16 | 16 | interrupts-extended = <&pio 88 IRQ_TYPE_LEVEL_LOW>; |
| 17 | + status = "fail-needs-probe"; | |
| 17 | 18 | }; |
| 18 | 19 | |
| 19 | 20 | /* |
| @@ -26,6 +27,7 @@ · 6 unmodified lines | ||
| 26 | 27 | reg = <0x20>; |
| 27 | 28 | hid-descr-addr = <0x0020>; |
| 28 | 29 | interrupts-extended = <&pio 88 IRQ_TYPE_LEVEL_LOW>; |
| 30 | + status = "fail-needs-probe"; | |
| 29 | 31 | }; |
| 30 | 32 | |
| 31 | 33 | /* Lenovo Ideapad C330 uses G2Touch touchscreen as a 2nd source touchscreen */ |
| @@ -35,6 +37,7 @@ · 3 unmodified lines | ||
| 35 | 37 | hid-descr-addr = <0x0001>; |
| 36 | 38 | interrupt-parent = <&pio>; |
| 37 | 39 | interrupts = <88 IRQ_TYPE_LEVEL_LOW>; |
| 40 | + status = "fail-needs-probe"; | |
| 38 | 41 | }; |
| 39 | 42 | }; |
| 40 | 43 | |
| @@ -47,6 +50,8 @@ · 6 unmodified lines | ||
| 47 | 50 | trackpad2: trackpad@2c { |
| 48 | 51 | compatible = "hid-over-i2c"; |
| 49 | 52 | interrupts-extended = <&pio 117 IRQ_TYPE_LEVEL_LOW>; |
| 53 | + pinctrl-names = "default"; | |
| 54 | + pinctrl-0 = <&trackpad_irq>; | |
| 50 | 55 | reg = <0x2c>; |
| 51 | 56 | hid-descr-addr = <0x0020>; |
| 52 | 57 | /* |
| @@ -58,6 +63,7 @@ · 5 unmodified lines | ||
| 58 | 63 | */ |
| 59 | 64 | vdd-supply = <&mt6397_vgp6_reg>; |
| 60 | 65 | wakeup-source; |
| 66 | + status = "fail-needs-probe"; | |
| 61 | 67 | }; |
| 62 | 68 | }; |
| 63 | 69 | |
| @@ -82,3 +88,11 @@ · 18 unmodified lines | ||
| 82 | 88 | }; |
| 83 | 89 | }; |
| 84 | 90 | }; |
| 91 | + | |
| 92 | +&touchscreen { | |
| 93 | + status = "fail-needs-probe"; | |
| 94 | +}; | |
| 95 | + | |
| 96 | +&trackpad { | |
| 97 | + status = "fail-needs-probe"; | |
| 98 | +}; | |
| @@ -358,12 +358,12 @@ · 357 unmodified lines | ||
| 358 | 358 | &i2c4 { |
| 359 | 359 | clock-frequency = <400000>; |
| 360 | 360 | status = "okay"; |
| 361 | − pinctrl-names = "default"; | |
| 362 | − pinctrl-0 = <&trackpad_irq>; | |
| 363 | 361 | |
| 364 | 362 | trackpad: trackpad@15 { |
| 365 | 363 | compatible = "elan,ekth3000"; |
| 366 | 364 | interrupts-extended = <&pio 117 IRQ_TYPE_LEVEL_LOW>; |
| 365 | + pinctrl-names = "default"; | |
| 366 | + pinctrl-0 = <&trackpad_irq>; | |
| 367 | 367 | reg = <0x15>; |
| 368 | 368 | vcc-supply = <&mt6397_vgp6_reg>; |
| 369 | 369 | wakeup-source; |
| @@ -18,7 +18,7 @@ · 17 unmodified lines | ||
| 18 | 18 | |
| 19 | 19 | #include "aes-ce-setkey.h" |
| 20 | 20 | |
| 21 | −MODULE_IMPORT_NS(CRYPTO_INTERNAL); | |
| 21 | +MODULE_IMPORT_NS("CRYPTO_INTERNAL"); | |
| 22 | 22 | |
| 23 | 23 | static int num_rounds(struct crypto_aes_ctx *ctx) |
| 24 | 24 | { |
| @@ -1048,7 +1048,7 @@ unregister_ciphers: · 1047 unmodified lines | ||
| 1048 | 1048 | |
| 1049 | 1049 | #ifdef USE_V8_CRYPTO_EXTENSIONS |
| 1050 | 1050 | module_cpu_feature_match(AES, aes_init); |
| 1051 | −EXPORT_SYMBOL_NS(ce_aes_mac_update, CRYPTO_INTERNAL); | |
| 1051 | +EXPORT_SYMBOL_NS(ce_aes_mac_update, "CRYPTO_INTERNAL"); | |
| 1052 | 1052 | #else |
| 1053 | 1053 | module_init(aes_init); |
| 1054 | 1054 | EXPORT_SYMBOL(neon_aes_ecb_encrypt); |
| @@ -19,10 +19,14 @@ · 18 unmodified lines | ||
| 19 | 19 | #define JUMP_TABLE_ENTRY(key, label) \ |
| 20 | 20 | ".pushsection __jump_table, \"aw\"\n\t" \ |
| 21 | 21 | ".align 3\n\t" \ |
| 22 | − ".long 1b - ., %l["#label"] - .\n\t" \ | |
| 23 | − ".quad %c0 - .\n\t" \ | |
| 24 | − ".popsection\n\t" \ | |
| 25 | − : : "i"(key) : : label | |
| 22 | + ".long 1b - ., " label " - .\n\t" \ | |
| 23 | + ".quad " key " - .\n\t" \ | |
| 24 | + ".popsection\n\t" | |
| 25 | + | |
| 26 | +/* This macro is also expanded on the Rust side. */ | |
| 27 | +#define ARCH_STATIC_BRANCH_ASM(key, label) \ | |
| 28 | + "1: nop\n\t" \ | |
| 29 | + JUMP_TABLE_ENTRY(key, label) | |
| 26 | 30 | |
| 27 | 31 | static __always_inline bool arch_static_branch(struct static_key * const key, |
| 28 | 32 | const bool branch) |
| @@ -30,8 +34,8 @@ static __always_inline bool arch_static_branch(struct static_key * const key, · 1 unmodified line | ||
| 30 | 34 | char *k = &((char *)key)[branch]; |
| 31 | 35 | |
| 32 | 36 | asm goto( |
| 33 | − "1: nop \n\t" | |
| 34 | − JUMP_TABLE_ENTRY(k, l_yes) | |
| 37 | + ARCH_STATIC_BRANCH_ASM("%c0", "%l[l_yes]") | |
| 38 | + : : "i"(k) : : l_yes | |
| 35 | 39 | ); |
| 36 | 40 | |
| 37 | 41 | return false; |
| @@ -43,9 +47,11 @@ static __always_inline bool arch_static_branch_jump(struct static_key * const ke · 5 unmodified lines | ||
| 43 | 47 | const bool branch) |
| 44 | 48 | { |
| 45 | 49 | char *k = &((char *)key)[branch]; |
| 50 | + | |
| 46 | 51 | asm goto( |
| 47 | 52 | "1: b %l[l_yes] \n\t" |
| 48 | − JUMP_TABLE_ENTRY(k, l_yes) | |
| 53 | + JUMP_TABLE_ENTRY("%c0", "%l[l_yes]") | |
| 54 | + : : "i"(k) : : l_yes | |
| 49 | 55 | ); |
| 50 | 56 | return false; |
| 51 | 57 | l_yes: |
| @@ -6,7 +6,7 @@ · 5 unmodified lines | ||
| 6 | 6 | #define __ASM_SPINLOCK_TYPES_H |
| 7 | 7 | |
| 8 | 8 | #if !defined(__LINUX_SPINLOCK_TYPES_RAW_H) && !defined(__ASM_SPINLOCK_H) |
| 9 | −# error "please don't include this file directly" | |
| 9 | +# error "Please do not include this file directly." | |
| 10 | 10 | #endif |
| 11 | 11 | |
| 12 | 12 | #include <asm-generic/qspinlock_types.h> |
| @@ -951,7 +951,7 @@ u64 kvm_vcpu_apply_reg_masks(const struct kvm_vcpu *vcpu, · 950 unmodified lines | ||
| 951 | 951 | return v; |
| 952 | 952 | } |
| 953 | 953 | |
| 954 | −static void set_sysreg_masks(struct kvm *kvm, int sr, u64 res0, u64 res1) | |
| 954 | +static __always_inline void set_sysreg_masks(struct kvm *kvm, int sr, u64 res0, u64 res1) | |
| 955 | 955 | { |
| 956 | 956 | int i = sr - __SANITISED_REG_START__; |
| 957 | 957 | |
| @@ -274,12 +274,23 @@ void kvm_pmu_vcpu_destroy(struct kvm_vcpu *vcpu) · 273 unmodified lines | ||
| 274 | 274 | irq_work_sync(&vcpu->arch.pmu.overflow_work); |
| 275 | 275 | } |
| 276 | 276 | |
| 277 | −bool kvm_pmu_counter_is_hyp(struct kvm_vcpu *vcpu, unsigned int idx) | |
| 277 | +static u64 kvm_pmu_hyp_counter_mask(struct kvm_vcpu *vcpu) | |
| 278 | 278 | { |
| 279 | − unsigned int hpmn; | |
| 279 | + unsigned int hpmn, n; | |
| 280 | 280 | |
| 281 | − if (!vcpu_has_nv(vcpu) || idx == ARMV8_PMU_CYCLE_IDX) | |
| 282 | − return false; | |
| 281 | + if (!vcpu_has_nv(vcpu)) | |
| 282 | + return 0; | |
| 283 | + | |
| 284 | + hpmn = SYS_FIELD_GET(MDCR_EL2, HPMN, __vcpu_sys_reg(vcpu, MDCR_EL2)); | |
| 285 | + n = vcpu->kvm->arch.pmcr_n; | |
| 286 | + | |
| 287 | + /* | |
| 288 | + * Programming HPMN to a value greater than PMCR_EL0.N is | |
| 289 | + * CONSTRAINED UNPREDICTABLE. Make the implementation choice that an | |
| 290 | + * UNKNOWN number of counters (in our case, zero) are reserved for EL2. | |
| 291 | + */ | |
| 292 | + if (hpmn >= n) | |
| 293 | + return 0; | |
| 283 | 294 | |
| 284 | 295 | /* |
| 285 | 296 | * Programming HPMN=0 is CONSTRAINED UNPREDICTABLE if FEAT_HPMN0 isn't |
| @@ -288,20 +299,22 @@ bool kvm_pmu_counter_is_hyp(struct kvm_vcpu *vcpu, unsigned int idx) · 2 unmodified lines | ||
| 288 | 299 | * implementation choice that all counters are included in the second |
| 289 | 300 | * range reserved for EL2/EL3. |
| 290 | 301 | */ |
| 291 | − hpmn = SYS_FIELD_GET(MDCR_EL2, HPMN, __vcpu_sys_reg(vcpu, MDCR_EL2)); | |
| 292 | − return idx >= hpmn; | |
| 302 | + return GENMASK(n - 1, hpmn); | |
| 303 | +} | |
| 304 | + | |
| 305 | +bool kvm_pmu_counter_is_hyp(struct kvm_vcpu *vcpu, unsigned int idx) | |
| 306 | +{ | |
| 307 | + return kvm_pmu_hyp_counter_mask(vcpu) & BIT(idx); | |
| 293 | 308 | } |
| 294 | 309 | |
| 295 | 310 | u64 kvm_pmu_accessible_counter_mask(struct kvm_vcpu *vcpu) |
| 296 | 311 | { |
| 297 | 312 | u64 mask = kvm_pmu_implemented_counter_mask(vcpu); |
| 298 | − u64 hpmn; | |
| 299 | 313 | |
| 300 | 314 | if (!vcpu_has_nv(vcpu) || vcpu_is_el2(vcpu)) |
| 301 | 315 | return mask; |
| 302 | 316 | |
| 303 | − hpmn = SYS_FIELD_GET(MDCR_EL2, HPMN, __vcpu_sys_reg(vcpu, MDCR_EL2)); | |
| 304 | − return mask & ~GENMASK(vcpu->kvm->arch.pmcr_n - 1, hpmn); | |
| 317 | + return mask & ~kvm_pmu_hyp_counter_mask(vcpu); | |
| 305 | 318 | } |
| 306 | 319 | |
| 307 | 320 | u64 kvm_pmu_implemented_counter_mask(struct kvm_vcpu *vcpu) |
| @@ -375,15 +388,30 @@ void kvm_pmu_disable_counter_mask(struct kvm_vcpu *vcpu, u64 val) · 67 unmodified lines | ||
| 375 | 388 | } |
| 376 | 389 | } |
| 377 | 390 | |
| 378 | −static u64 kvm_pmu_overflow_status(struct kvm_vcpu *vcpu) | |
| 391 | +/* | |
| 392 | + * Returns the PMU overflow state, which is true if there exists an event | |
| 393 | + * counter where the values of the global enable control, PMOVSSET_EL0[n], and | |
| 394 | + * PMINTENSET_EL1[n] are all 1. | |
| 395 | + */ | |
| 396 | +static bool kvm_pmu_overflow_status(struct kvm_vcpu *vcpu) | |
| 379 | 397 | { |
| 380 | − u64 reg = 0; | |
| 398 | + u64 reg = __vcpu_sys_reg(vcpu, PMOVSSET_EL0); | |
| 381 | 399 | |
| 382 | − if ((kvm_vcpu_read_pmcr(vcpu) & ARMV8_PMU_PMCR_E)) { | |
| 383 | − reg = __vcpu_sys_reg(vcpu, PMOVSSET_EL0); | |
| 384 | − reg &= __vcpu_sys_reg(vcpu, PMCNTENSET_EL0); | |
| 385 | − reg &= __vcpu_sys_reg(vcpu, PMINTENSET_EL1); | |
| 386 | − } | |
| 400 | + reg &= __vcpu_sys_reg(vcpu, PMINTENSET_EL1); | |
| 401 | + | |
| 402 | + /* | |
| 403 | + * PMCR_EL0.E is the global enable control for event counters available | |
| 404 | + * to EL0 and EL1. | |
| 405 | + */ | |
| 406 | + if (!(kvm_vcpu_read_pmcr(vcpu) & ARMV8_PMU_PMCR_E)) | |
| 407 | + reg &= kvm_pmu_hyp_counter_mask(vcpu); | |
| 408 | + | |
| 409 | + /* | |
| 410 | + * Otherwise, MDCR_EL2.HPME is the global enable control for event | |
| 411 | + * counters reserved for EL2. | |
| 412 | + */ | |
| 413 | + if (!(vcpu_read_sys_reg(vcpu, MDCR_EL2) & MDCR_EL2_HPME)) | |
| 414 | + reg &= ~kvm_pmu_hyp_counter_mask(vcpu); | |
| 387 | 415 | |
| 388 | 416 | return reg; |
| 389 | 417 | } |
| @@ -396,7 +424,7 @@ static void kvm_pmu_update_state(struct kvm_vcpu *vcpu) · 6 unmodified lines | ||
| 396 | 424 | if (!kvm_vcpu_has_pmu(vcpu)) |
| 397 | 425 | return; |
| 398 | 426 | |
| 399 | − overflow = !!kvm_pmu_overflow_status(vcpu); | |
| 427 | + overflow = kvm_pmu_overflow_status(vcpu); | |
| 400 | 428 | if (pmu->irq_level == overflow) |
| 401 | 429 | return; |
| 402 | 430 | |
| @@ -287,7 +287,10 @@ static int vgic_debug_show(struct seq_file *s, void *v) · 286 unmodified lines | ||
| 287 | 287 | * Expect this to succeed, as iter_mark_lpis() takes a reference on |
| 288 | 288 | * every LPI to be visited. |
| 289 | 289 | */ |
| 290 | − irq = vgic_get_irq(kvm, vcpu, iter->intid); | |
| 290 | + if (iter->intid < VGIC_NR_PRIVATE_IRQS) | |
| 291 | + irq = vgic_get_vcpu_irq(vcpu, iter->intid); | |
| 292 | + else | |
| 293 | + irq = vgic_get_irq(kvm, iter->intid); | |
| 291 | 294 | if (WARN_ON_ONCE(!irq)) |
| 292 | 295 | return -EINVAL; |
| 293 | 296 | |
| @@ -322,7 +322,7 @@ int vgic_init(struct kvm *kvm) · 321 unmodified lines | ||
| 322 | 322 | goto out; |
| 323 | 323 | |
| 324 | 324 | for (i = 0; i < VGIC_NR_PRIVATE_IRQS; i++) { |
| 325 | − struct vgic_irq *irq = vgic_get_irq(kvm, vcpu, i); | |
| 325 | + struct vgic_irq *irq = vgic_get_vcpu_irq(vcpu, i); | |
| 326 | 326 | |
| 327 | 327 | switch (dist->vgic_model) { |
| 328 | 328 | case KVM_DEV_TYPE_ARM_VGIC_V3: |
| @@ -31,6 +31,41 @@ static int vgic_its_commit_v0(struct vgic_its *its); · 30 unmodified lines | ||
| 31 | 31 | static int update_lpi_config(struct kvm *kvm, struct vgic_irq *irq, |
| 32 | 32 | struct kvm_vcpu *filter_vcpu, bool needs_inv); |
| 33 | 33 | |
| 34 | +#define vgic_its_read_entry_lock(i, g, valp, t) \ | |
| 35 | + ({ \ | |
| 36 | + int __sz = vgic_its_get_abi(i)->t##_esz; \ | |
| 37 | + struct kvm *__k = (i)->dev->kvm; \ | |
| 38 | + int __ret; \ | |
| 39 | + \ | |
| 40 | + BUILD_BUG_ON(NR_ITS_ABIS == 1 && \ | |
| 41 | + sizeof(*(valp)) != ABI_0_ESZ); \ | |
| 42 | + if (NR_ITS_ABIS > 1 && \ | |
| 43 | + KVM_BUG_ON(__sz != sizeof(*(valp)), __k)) \ | |
| 44 | + __ret = -EINVAL; \ | |
| 45 | + else \ | |
| 46 | + __ret = kvm_read_guest_lock(__k, (g), \ | |
| 47 | + valp, __sz); \ | |
| 48 | + __ret; \ | |
| 49 | + }) | |
| 50 | + | |
| 51 | +#define vgic_its_write_entry_lock(i, g, val, t) \ | |
| 52 | + ({ \ | |
| 53 | + int __sz = vgic_its_get_abi(i)->t##_esz; \ | |
| 54 | + struct kvm *__k = (i)->dev->kvm; \ | |
| 55 | + typeof(val) __v = (val); \ | |
| 56 | + int __ret; \ | |
| 57 | + \ | |
| 58 | + BUILD_BUG_ON(NR_ITS_ABIS == 1 && \ | |
| 59 | + sizeof(__v) != ABI_0_ESZ); \ | |
| 60 | + if (NR_ITS_ABIS > 1 && \ | |
| 61 | + KVM_BUG_ON(__sz != sizeof(__v), __k)) \ | |
| 62 | + __ret = -EINVAL; \ | |
| 63 | + else \ | |
| 64 | + __ret = vgic_write_guest_lock(__k, (g), \ | |
| 65 | + &__v, __sz); \ | |
| 66 | + __ret; \ | |
| 67 | + }) | |
| 68 | + | |
| 34 | 69 | /* |
| 35 | 70 | * Creates a new (reference to a) struct vgic_irq for a given LPI. |
| 36 | 71 | * If this LPI is already mapped on another ITS, we increase its refcount |
| @@ -42,7 +77,7 @@ static struct vgic_irq *vgic_add_lpi(struct kvm *kvm, u32 intid, · 5 unmodified lines | ||
| 42 | 77 | struct kvm_vcpu *vcpu) |
| 43 | 78 | { |
| 44 | 79 | struct vgic_dist *dist = &kvm->arch.vgic; |
| 45 | − struct vgic_irq *irq = vgic_get_irq(kvm, NULL, intid), *oldirq; | |
| 80 | + struct vgic_irq *irq = vgic_get_irq(kvm, intid), *oldirq; | |
| 46 | 81 | unsigned long flags; |
| 47 | 82 | int ret; |
| 48 | 83 | |
| @@ -419,7 +454,7 @@ static int its_sync_lpi_pending_table(struct kvm_vcpu *vcpu) · 370 unmodified lines | ||
| 419 | 454 | last_byte_offset = byte_offset; |
| 420 | 455 | } |
| 421 | 456 | |
| 422 | − irq = vgic_get_irq(vcpu->kvm, NULL, intid); | |
| 457 | + irq = vgic_get_irq(vcpu->kvm, intid); | |
| 423 | 458 | if (!irq) |
| 424 | 459 | continue; |
| 425 | 460 | |
| @@ -794,7 +829,7 @@ static int vgic_its_cmd_handle_discard(struct kvm *kvm, struct vgic_its *its, · 368 unmodified lines | ||
| 794 | 829 | |
| 795 | 830 | its_free_ite(kvm, ite); |
| 796 | 831 | |
| 797 | − return vgic_its_write_entry_lock(its, gpa, 0, ite_esz); | |
| 832 | + return vgic_its_write_entry_lock(its, gpa, 0ULL, ite); | |
| 798 | 833 | } |
| 799 | 834 | |
| 800 | 835 | return E_ITS_DISCARD_UNMAPPED_INTERRUPT; |
| @@ -1143,7 +1178,6 @@ static int vgic_its_cmd_handle_mapd(struct kvm *kvm, struct vgic_its *its, · 342 unmodified lines | ||
| 1143 | 1178 | bool valid = its_cmd_get_validbit(its_cmd); |
| 1144 | 1179 | u8 num_eventid_bits = its_cmd_get_size(its_cmd); |
| 1145 | 1180 | gpa_t itt_addr = its_cmd_get_ittaddr(its_cmd); |
| 1146 | − int dte_esz = vgic_its_get_abi(its)->dte_esz; | |
| 1147 | 1181 | struct its_device *device; |
| 1148 | 1182 | gpa_t gpa; |
| 1149 | 1183 | |
| @@ -1168,7 +1202,7 @@ static int vgic_its_cmd_handle_mapd(struct kvm *kvm, struct vgic_its *its, · 18 unmodified lines | ||
| 1168 | 1202 | * is an error, so we are done in any case. |
| 1169 | 1203 | */ |
| 1170 | 1204 | if (!valid) |
| 1171 | − return vgic_its_write_entry_lock(its, gpa, 0, dte_esz); | |
| 1205 | + return vgic_its_write_entry_lock(its, gpa, 0ULL, dte); | |
| 1172 | 1206 | |
| 1173 | 1207 | device = vgic_its_alloc_device(its, device_id, itt_addr, |
| 1174 | 1208 | num_eventid_bits); |
| @@ -1288,7 +1322,7 @@ int vgic_its_invall(struct kvm_vcpu *vcpu) · 113 unmodified lines | ||
| 1288 | 1322 | unsigned long intid; |
| 1289 | 1323 | |
| 1290 | 1324 | xa_for_each(&dist->lpi_xa, intid, irq) { |
| 1291 | − irq = vgic_get_irq(kvm, NULL, intid); | |
| 1325 | + irq = vgic_get_irq(kvm, intid); | |
| 1292 | 1326 | if (!irq) |
| 1293 | 1327 | continue; |
| 1294 | 1328 | |
| @@ -1354,7 +1388,7 @@ static int vgic_its_cmd_handle_movall(struct kvm *kvm, struct vgic_its *its, · 59 unmodified lines | ||
| 1354 | 1388 | return 0; |
| 1355 | 1389 | |
| 1356 | 1390 | xa_for_each(&dist->lpi_xa, intid, irq) { |
| 1357 | − irq = vgic_get_irq(kvm, NULL, intid); | |
| 1391 | + irq = vgic_get_irq(kvm, intid); | |
| 1358 | 1392 | if (!irq) |
| 1359 | 1393 | continue; |
| 1360 | 1394 | |
| @@ -2090,7 +2124,7 @@ static int scan_its_table(struct vgic_its *its, gpa_t base, int size, u32 esz, · 729 unmodified lines | ||
| 2090 | 2124 | * vgic_its_save_ite - Save an interrupt translation entry at @gpa |
| 2091 | 2125 | */ |
| 2092 | 2126 | static int vgic_its_save_ite(struct vgic_its *its, struct its_device *dev, |
| 2093 | − struct its_ite *ite, gpa_t gpa, int ite_esz) | |
| 2127 | + struct its_ite *ite, gpa_t gpa) | |
| 2094 | 2128 | { |
| 2095 | 2129 | u32 next_offset; |
| 2096 | 2130 | u64 val; |
| @@ -2101,7 +2135,7 @@ static int vgic_its_save_ite(struct vgic_its *its, struct its_device *dev, · 4 unmodified lines | ||
| 2101 | 2135 | ite->collection->collection_id; |
| 2102 | 2136 | val = cpu_to_le64(val); |
| 2103 | 2137 | |
| 2104 | − return vgic_its_write_entry_lock(its, gpa, val, ite_esz); | |
| 2138 | + return vgic_its_write_entry_lock(its, gpa, val, ite); | |
| 2105 | 2139 | } |
| 2106 | 2140 | |
| 2107 | 2141 | /** |
| @@ -2201,7 +2235,7 @@ static int vgic_its_save_itt(struct vgic_its *its, struct its_device *device) · 93 unmodified lines | ||
| 2201 | 2235 | if (ite->irq->hw && !kvm_vgic_global_state.has_gicv4_1) |
| 2202 | 2236 | return -EACCES; |
| 2203 | 2237 | |
| 2204 | − ret = vgic_its_save_ite(its, device, ite, gpa, ite_esz); | |
| 2238 | + ret = vgic_its_save_ite(its, device, ite, gpa); | |
| 2205 | 2239 | if (ret) |
| 2206 | 2240 | return ret; |
| 2207 | 2241 | } |
| @@ -2240,10 +2274,9 @@ static int vgic_its_restore_itt(struct vgic_its *its, struct its_device *dev) · 32 unmodified lines | ||
| 2240 | 2274 | * @its: ITS handle |
| 2241 | 2275 | * @dev: ITS device |
| 2242 | 2276 | * @ptr: GPA |
| 2243 | − * @dte_esz: device table entry size | |
| 2244 | 2277 | */ |
| 2245 | 2278 | static int vgic_its_save_dte(struct vgic_its *its, struct its_device *dev, |
| 2246 | − gpa_t ptr, int dte_esz) | |
| 2279 | + gpa_t ptr) | |
| 2247 | 2280 | { |
| 2248 | 2281 | u64 val, itt_addr_field; |
| 2249 | 2282 | u32 next_offset; |
| @@ -2256,7 +2289,7 @@ static int vgic_its_save_dte(struct vgic_its *its, struct its_device *dev, · 6 unmodified lines | ||
| 2256 | 2289 | (dev->num_eventid_bits - 1)); |
| 2257 | 2290 | val = cpu_to_le64(val); |
| 2258 | 2291 | |
| 2259 | − return vgic_its_write_entry_lock(its, ptr, val, dte_esz); | |
| 2292 | + return vgic_its_write_entry_lock(its, ptr, val, dte); | |
| 2260 | 2293 | } |
| 2261 | 2294 | |
| 2262 | 2295 | /** |
| @@ -2332,10 +2365,8 @@ static int vgic_its_device_cmp(void *priv, const struct list_head *a, · 69 unmodified lines | ||
| 2332 | 2365 | */ |
| 2333 | 2366 | static int vgic_its_save_device_tables(struct vgic_its *its) |
| 2334 | 2367 | { |
| 2335 | − const struct vgic_its_abi *abi = vgic_its_get_abi(its); | |
| 2336 | 2368 | u64 baser = its->baser_device_table; |
| 2337 | 2369 | struct its_device *dev; |
| 2338 | − int dte_esz = abi->dte_esz; | |
| 2339 | 2370 | |
| 2340 | 2371 | if (!(baser & GITS_BASER_VALID)) |
| 2341 | 2372 | return 0; |
| @@ -2354,7 +2385,7 @@ static int vgic_its_save_device_tables(struct vgic_its *its) · 12 unmodified lines | ||
| 2354 | 2385 | if (ret) |
| 2355 | 2386 | return ret; |
| 2356 | 2387 | |
| 2357 | − ret = vgic_its_save_dte(its, dev, eaddr, dte_esz); | |
| 2388 | + ret = vgic_its_save_dte(its, dev, eaddr); | |
| 2358 | 2389 | if (ret) |
| 2359 | 2390 | return ret; |
| 2360 | 2391 | } |
| @@ -2435,7 +2466,7 @@ static int vgic_its_restore_device_tables(struct vgic_its *its) · 74 unmodified lines | ||
| 2435 | 2466 | |
| 2436 | 2467 | static int vgic_its_save_cte(struct vgic_its *its, |
| 2437 | 2468 | struct its_collection *collection, |
| 2438 | − gpa_t gpa, int esz) | |
| 2469 | + gpa_t gpa) | |
| 2439 | 2470 | { |
| 2440 | 2471 | u64 val; |
| 2441 | 2472 | |
| @@ -2444,7 +2475,7 @@ static int vgic_its_save_cte(struct vgic_its *its, · 2 unmodified lines | ||
| 2444 | 2475 | collection->collection_id); |
| 2445 | 2476 | val = cpu_to_le64(val); |
| 2446 | 2477 | |
| 2447 | − return vgic_its_write_entry_lock(its, gpa, val, esz); | |
| 2478 | + return vgic_its_write_entry_lock(its, gpa, val, cte); | |
| 2448 | 2479 | } |
| 2449 | 2480 | |
| 2450 | 2481 | /* |
| @@ -2452,7 +2483,7 @@ static int vgic_its_save_cte(struct vgic_its *its, · 1 unmodified line | ||
| 2452 | 2483 | * Return +1 on success, 0 if the entry was invalid (which should be |
| 2453 | 2484 | * interpreted as end-of-table), and a negative error value for generic errors. |
| 2454 | 2485 | */ |
| 2455 | −static int vgic_its_restore_cte(struct vgic_its *its, gpa_t gpa, int esz) | |
| 2486 | +static int vgic_its_restore_cte(struct vgic_its *its, gpa_t gpa) | |
| 2456 | 2487 | { |
| 2457 | 2488 | struct its_collection *collection; |
| 2458 | 2489 | struct kvm *kvm = its->dev->kvm; |
| @@ -2460,7 +2491,7 @@ static int vgic_its_restore_cte(struct vgic_its *its, gpa_t gpa, int esz) · 1 unmodified line | ||
| 2460 | 2491 | u64 val; |
| 2461 | 2492 | int ret; |
| 2462 | 2493 | |
| 2463 | − ret = vgic_its_read_entry_lock(its, gpa, &val, esz); | |
| 2494 | + ret = vgic_its_read_entry_lock(its, gpa, &val, cte); | |
| 2464 | 2495 | if (ret) |
| 2465 | 2496 | return ret; |
| 2466 | 2497 | val = le64_to_cpu(val); |
| @@ -2507,7 +2538,7 @@ static int vgic_its_save_collection_table(struct vgic_its *its) · 40 unmodified lines | ||
| 2507 | 2538 | max_size = GITS_BASER_NR_PAGES(baser) * SZ_64K; |
| 2508 | 2539 | |
| 2509 | 2540 | list_for_each_entry(collection, &its->collection_list, coll_list) { |
| 2510 | − ret = vgic_its_save_cte(its, collection, gpa, cte_esz); | |
| 2541 | + ret = vgic_its_save_cte(its, collection, gpa); | |
| 2511 | 2542 | if (ret) |
| 2512 | 2543 | return ret; |
| 2513 | 2544 | gpa += cte_esz; |
| @@ -2521,7 +2552,7 @@ static int vgic_its_save_collection_table(struct vgic_its *its) · 7 unmodified lines | ||
| 2521 | 2552 | * table is not fully filled, add a last dummy element |
| 2522 | 2553 | * with valid bit unset |
| 2523 | 2554 | */ |
| 2524 | − return vgic_its_write_entry_lock(its, gpa, 0, cte_esz); | |
| 2555 | + return vgic_its_write_entry_lock(its, gpa, 0ULL, cte); | |
| 2525 | 2556 | } |
| 2526 | 2557 | |
| 2527 | 2558 | /* |
| @@ -2546,7 +2577,7 @@ static int vgic_its_restore_collection_table(struct vgic_its *its) · 18 unmodified lines | ||
| 2546 | 2577 | max_size = GITS_BASER_NR_PAGES(baser) * SZ_64K; |
| 2547 | 2578 | |
| 2548 | 2579 | while (read < max_size) { |
| 2549 | − ret = vgic_its_restore_cte(its, gpa, cte_esz); | |
| 2580 | + ret = vgic_its_restore_cte(its, gpa); | |
| 2550 | 2581 | if (ret <= 0) |
| 2551 | 2582 | break; |
| 2552 | 2583 | gpa += cte_esz; |
| @@ -148,7 +148,7 @@ static void vgic_mmio_write_sgir(struct kvm_vcpu *source_vcpu, · 147 unmodified lines | ||
| 148 | 148 | if (!(targets & (1U << c))) |
| 149 | 149 | continue; |
| 150 | 150 | |
| 151 | − irq = vgic_get_irq(source_vcpu->kvm, vcpu, intid); | |
| 151 | + irq = vgic_get_vcpu_irq(vcpu, intid); | |
| 152 | 152 | |
| 153 | 153 | raw_spin_lock_irqsave(&irq->irq_lock, flags); |
| 154 | 154 | irq->pending_latch = true; |
| @@ -167,7 +167,7 @@ static unsigned long vgic_mmio_read_target(struct kvm_vcpu *vcpu, · 12 unmodified lines | ||
| 167 | 167 | u64 val = 0; |
| 168 | 168 | |
| 169 | 169 | for (i = 0; i < len; i++) { |
| 170 | − struct vgic_irq *irq = vgic_get_irq(vcpu->kvm, vcpu, intid + i); | |
| 170 | + struct vgic_irq *irq = vgic_get_vcpu_irq(vcpu, intid + i); | |
| 171 | 171 | |
| 172 | 172 | val |= (u64)irq->targets << (i * 8); |
| 173 | 173 | |
| @@ -191,7 +191,7 @@ static void vgic_mmio_write_target(struct kvm_vcpu *vcpu, · 17 unmodified lines | ||
| 191 | 191 | return; |
| 192 | 192 | |
| 193 | 193 | for (i = 0; i < len; i++) { |
| 194 | − struct vgic_irq *irq = vgic_get_irq(vcpu->kvm, NULL, intid + i); | |
| 194 | + struct vgic_irq *irq = vgic_get_irq(vcpu->kvm, intid + i); | |
| 195 | 195 | int target; |
| 196 | 196 | |
| 197 | 197 | raw_spin_lock_irqsave(&irq->irq_lock, flags); |
| @@ -213,7 +213,7 @@ static unsigned long vgic_mmio_read_sgipend(struct kvm_vcpu *vcpu, · 15 unmodified lines | ||
| 213 | 213 | u64 val = 0; |
| 214 | 214 | |
| 215 | 215 | for (i = 0; i < len; i++) { |
| 216 | − struct vgic_irq *irq = vgic_get_irq(vcpu->kvm, vcpu, intid + i); | |
| 216 | + struct vgic_irq *irq = vgic_get_vcpu_irq(vcpu, intid + i); | |
| 217 | 217 | |
| 218 | 218 | val |= (u64)irq->source << (i * 8); |
| 219 | 219 | |
| @@ -231,7 +231,7 @@ static void vgic_mmio_write_sgipendc(struct kvm_vcpu *vcpu, · 11 unmodified lines | ||
| 231 | 231 | unsigned long flags; |
| 232 | 232 | |
| 233 | 233 | for (i = 0; i < len; i++) { |
| 234 | − struct vgic_irq *irq = vgic_get_irq(vcpu->kvm, vcpu, intid + i); | |
| 234 | + struct vgic_irq *irq = vgic_get_vcpu_irq(vcpu, intid + i); | |
| 235 | 235 | |
| 236 | 236 | raw_spin_lock_irqsave(&irq->irq_lock, flags); |
| 237 | 237 | |
| @@ -253,7 +253,7 @@ static void vgic_mmio_write_sgipends(struct kvm_vcpu *vcpu, · 15 unmodified lines | ||
| 253 | 253 | unsigned long flags; |
| 254 | 254 | |
| 255 | 255 | for (i = 0; i < len; i++) { |
| 256 | − struct vgic_irq *irq = vgic_get_irq(vcpu->kvm, vcpu, intid + i); | |
| 256 | + struct vgic_irq *irq = vgic_get_vcpu_irq(vcpu, intid + i); | |
| 257 | 257 | |
| 258 | 258 | raw_spin_lock_irqsave(&irq->irq_lock, flags); |
| 259 | 259 | |
| @@ -194,7 +194,7 @@ static unsigned long vgic_mmio_read_irouter(struct kvm_vcpu *vcpu, · 193 unmodified lines | ||
| 194 | 194 | gpa_t addr, unsigned int len) |
| 195 | 195 | { |
| 196 | 196 | int intid = VGIC_ADDR_TO_INTID(addr, 64); |
| 197 | − struct vgic_irq *irq = vgic_get_irq(vcpu->kvm, NULL, intid); | |
| 197 | + struct vgic_irq *irq = vgic_get_irq(vcpu->kvm, intid); | |
| 198 | 198 | unsigned long ret = 0; |
| 199 | 199 | |
| 200 | 200 | if (!irq) |
| @@ -220,7 +220,7 @@ static void vgic_mmio_write_irouter(struct kvm_vcpu *vcpu, · 19 unmodified lines | ||
| 220 | 220 | if (addr & 4) |
| 221 | 221 | return; |
| 222 | 222 | |
| 223 | − irq = vgic_get_irq(vcpu->kvm, NULL, intid); | |
| 223 | + irq = vgic_get_irq(vcpu->kvm, intid); | |
| 224 | 224 | |
| 225 | 225 | if (!irq) |
| 226 | 226 | return; |
| @@ -530,6 +530,7 @@ static void vgic_mmio_write_invlpi(struct kvm_vcpu *vcpu, · 303 unmodified lines | ||
| 530 | 530 | unsigned long val) |
| 531 | 531 | { |
| 532 | 532 | struct vgic_irq *irq; |
| 533 | + u32 intid; | |
| 533 | 534 | |
| 534 | 535 | /* |
| 535 | 536 | * If the guest wrote only to the upper 32bit part of the |
| @@ -541,9 +542,13 @@ static void vgic_mmio_write_invlpi(struct kvm_vcpu *vcpu, · 5 unmodified lines | ||
| 541 | 542 | if ((addr & 4) || !vgic_lpis_enabled(vcpu)) |
| 542 | 543 | return; |
| 543 | 544 | |
| 545 | + intid = lower_32_bits(val); | |
| 546 | + if (intid < VGIC_MIN_LPI) | |
| 547 | + return; | |
| 548 | + | |
| 544 | 549 | vgic_set_rdist_busy(vcpu, true); |
| 545 | 550 | |
| 546 | − irq = vgic_get_irq(vcpu->kvm, NULL, lower_32_bits(val)); | |
| 551 | + irq = vgic_get_irq(vcpu->kvm, intid); | |
| 547 | 552 | if (irq) { |
| 548 | 553 | vgic_its_inv_lpi(vcpu->kvm, irq); |
| 549 | 554 | vgic_put_irq(vcpu->kvm, irq); |
| @@ -1020,7 +1025,7 @@ int vgic_v3_has_attr_regs(struct kvm_device *dev, struct kvm_device_attr *attr) · 470 unmodified lines | ||
| 1020 | 1025 | |
| 1021 | 1026 | static void vgic_v3_queue_sgi(struct kvm_vcpu *vcpu, u32 sgi, bool allow_group1) |
| 1022 | 1027 | { |
| 1023 | − struct vgic_irq *irq = vgic_get_irq(vcpu->kvm, vcpu, sgi); | |
| 1028 | + struct vgic_irq *irq = vgic_get_vcpu_irq(vcpu, sgi); | |
| 1024 | 1029 | unsigned long flags; |
| 1025 | 1030 | |
| 1026 | 1031 | raw_spin_lock_irqsave(&irq->irq_lock, flags); |
| @@ -50,7 +50,7 @@ unsigned long vgic_mmio_read_group(struct kvm_vcpu *vcpu, · 49 unmodified lines | ||
| 50 | 50 | |
| 51 | 51 | /* Loop over all IRQs affected by this read */ |
| 52 | 52 | for (i = 0; i < len * 8; i++) { |
| 53 | − struct vgic_irq *irq = vgic_get_irq(vcpu->kvm, vcpu, intid + i); | |
| 53 | + struct vgic_irq *irq = vgic_get_vcpu_irq(vcpu, intid + i); | |
| 54 | 54 | |
| 55 | 55 | if (irq->group) |
| 56 | 56 | value |= BIT(i); |
| @@ -74,7 +74,7 @@ void vgic_mmio_write_group(struct kvm_vcpu *vcpu, gpa_t addr, · 17 unmodified lines | ||
| 74 | 74 | unsigned long flags; |
| 75 | 75 | |
| 76 | 76 | for (i = 0; i < len * 8; i++) { |
| 77 | − struct vgic_irq *irq = vgic_get_irq(vcpu->kvm, vcpu, intid + i); | |
| 77 | + struct vgic_irq *irq = vgic_get_vcpu_irq(vcpu, intid + i); | |
| 78 | 78 | |
| 79 | 79 | raw_spin_lock_irqsave(&irq->irq_lock, flags); |
| 80 | 80 | irq->group = !!(val & BIT(i)); |
| @@ -102,7 +102,7 @@ unsigned long vgic_mmio_read_enable(struct kvm_vcpu *vcpu, · 21 unmodified lines | ||
| 102 | 102 | |
| 103 | 103 | /* Loop over all IRQs affected by this read */ |
| 104 | 104 | for (i = 0; i < len * 8; i++) { |
| 105 | − struct vgic_irq *irq = vgic_get_irq(vcpu->kvm, vcpu, intid + i); | |
| 105 | + struct vgic_irq *irq = vgic_get_vcpu_irq(vcpu, intid + i); | |
| 106 | 106 | |
| 107 | 107 | if (irq->enabled) |
| 108 | 108 | value |= (1U << i); |
| @@ -122,7 +122,7 @@ void vgic_mmio_write_senable(struct kvm_vcpu *vcpu, · 13 unmodified lines | ||
| 122 | 122 | unsigned long flags; |
| 123 | 123 | |
| 124 | 124 | for_each_set_bit(i, &val, len * 8) { |
| 125 | − struct vgic_irq *irq = vgic_get_irq(vcpu->kvm, vcpu, intid + i); | |
| 125 | + struct vgic_irq *irq = vgic_get_vcpu_irq(vcpu, intid + i); | |
| 126 | 126 | |
| 127 | 127 | raw_spin_lock_irqsave(&irq->irq_lock, flags); |
| 128 | 128 | if (irq->hw && vgic_irq_is_sgi(irq->intid)) { |
| @@ -171,7 +171,7 @@ void vgic_mmio_write_cenable(struct kvm_vcpu *vcpu, · 42 unmodified lines | ||
| 171 | 171 | unsigned long flags; |
| 172 | 172 | |
| 173 | 173 | for_each_set_bit(i, &val, len * 8) { |
| 174 | − struct vgic_irq *irq = vgic_get_irq(vcpu->kvm, vcpu, intid + i); | |
| 174 | + struct vgic_irq *irq = vgic_get_vcpu_irq(vcpu, intid + i); | |
| 175 | 175 | |
| 176 | 176 | raw_spin_lock_irqsave(&irq->irq_lock, flags); |
| 177 | 177 | if (irq->hw && vgic_irq_is_sgi(irq->intid) && irq->enabled) |
| @@ -193,7 +193,7 @@ int vgic_uaccess_write_senable(struct kvm_vcpu *vcpu, · 15 unmodified lines | ||
| 193 | 193 | unsigned long flags; |
| 194 | 194 | |
| 195 | 195 | for_each_set_bit(i, &val, len * 8) { |
| 196 | − struct vgic_irq *irq = vgic_get_irq(vcpu->kvm, vcpu, intid + i); | |
| 196 | + struct vgic_irq *irq = vgic_get_vcpu_irq(vcpu, intid + i); | |
| 197 | 197 | |
| 198 | 198 | raw_spin_lock_irqsave(&irq->irq_lock, flags); |
| 199 | 199 | irq->enabled = true; |
| @@ -214,7 +214,7 @@ int vgic_uaccess_write_cenable(struct kvm_vcpu *vcpu, · 14 unmodified lines | ||
| 214 | 214 | unsigned long flags; |
| 215 | 215 | |
| 216 | 216 | for_each_set_bit(i, &val, len * 8) { |
| 217 | − struct vgic_irq *irq = vgic_get_irq(vcpu->kvm, vcpu, intid + i); | |
| 217 | + struct vgic_irq *irq = vgic_get_vcpu_irq(vcpu, intid + i); | |
| 218 | 218 | |
| 219 | 219 | raw_spin_lock_irqsave(&irq->irq_lock, flags); |
| 220 | 220 | irq->enabled = false; |
| @@ -236,7 +236,7 @@ static unsigned long __read_pending(struct kvm_vcpu *vcpu, · 15 unmodified lines | ||
| 236 | 236 | |
| 237 | 237 | /* Loop over all IRQs affected by this read */ |
| 238 | 238 | for (i = 0; i < len * 8; i++) { |
| 239 | − struct vgic_irq *irq = vgic_get_irq(vcpu->kvm, vcpu, intid + i); | |
| 239 | + struct vgic_irq *irq = vgic_get_vcpu_irq(vcpu, intid + i); | |
| 240 | 240 | unsigned long flags; |
| 241 | 241 | bool val; |
| 242 | 242 | |
| @@ -309,7 +309,7 @@ static void __set_pending(struct kvm_vcpu *vcpu, gpa_t addr, unsigned int len, · 66 unmodified lines | ||
| 309 | 309 | unsigned long flags; |
| 310 | 310 | |
| 311 | 311 | for_each_set_bit(i, &val, len * 8) { |
| 312 | − struct vgic_irq *irq = vgic_get_irq(vcpu->kvm, vcpu, intid + i); | |
| 312 | + struct vgic_irq *irq = vgic_get_vcpu_irq(vcpu, intid + i); | |
| 313 | 313 | |
| 314 | 314 | /* GICD_ISPENDR0 SGI bits are WI when written from the guest. */ |
| 315 | 315 | if (is_vgic_v2_sgi(vcpu, irq) && !is_user) { |
| @@ -395,7 +395,7 @@ static void __clear_pending(struct kvm_vcpu *vcpu, · 79 unmodified lines | ||
| 395 | 395 | unsigned long flags; |
| 396 | 396 | |
| 397 | 397 | for_each_set_bit(i, &val, len * 8) { |
| 398 | − struct vgic_irq *irq = vgic_get_irq(vcpu->kvm, vcpu, intid + i); | |
| 398 | + struct vgic_irq *irq = vgic_get_vcpu_irq(vcpu, intid + i); | |
| 399 | 399 | |
| 400 | 400 | /* GICD_ICPENDR0 SGI bits are WI when written from the guest. */ |
| 401 | 401 | if (is_vgic_v2_sgi(vcpu, irq) && !is_user) { |
| @@ -494,7 +494,7 @@ static unsigned long __vgic_mmio_read_active(struct kvm_vcpu *vcpu, · 92 unmodified lines | ||
| 494 | 494 | |
| 495 | 495 | /* Loop over all IRQs affected by this read */ |
| 496 | 496 | for (i = 0; i < len * 8; i++) { |
| 497 | − struct vgic_irq *irq = vgic_get_irq(vcpu->kvm, vcpu, intid + i); | |
| 497 | + struct vgic_irq *irq = vgic_get_vcpu_irq(vcpu, intid + i); | |
| 498 | 498 | |
| 499 | 499 | /* |
| 500 | 500 | * Even for HW interrupts, don't evaluate the HW state as |
| @@ -598,7 +598,7 @@ static void __vgic_mmio_write_cactive(struct kvm_vcpu *vcpu, · 97 unmodified lines | ||
| 598 | 598 | int i; |
| 599 | 599 | |
| 600 | 600 | for_each_set_bit(i, &val, len * 8) { |
| 601 | − struct vgic_irq *irq = vgic_get_irq(vcpu->kvm, vcpu, intid + i); | |
| 601 | + struct vgic_irq *irq = vgic_get_vcpu_irq(vcpu, intid + i); | |
| 602 | 602 | vgic_mmio_change_active(vcpu, irq, false); |
| 603 | 603 | vgic_put_irq(vcpu->kvm, irq); |
| 604 | 604 | } |
| @@ -635,7 +635,7 @@ static void __vgic_mmio_write_sactive(struct kvm_vcpu *vcpu, · 30 unmodified lines | ||
| 635 | 635 | int i; |
| 636 | 636 | |
| 637 | 637 | for_each_set_bit(i, &val, len * 8) { |
| 638 | − struct vgic_irq *irq = vgic_get_irq(vcpu->kvm, vcpu, intid + i); | |
| 638 | + struct vgic_irq *irq = vgic_get_vcpu_irq(vcpu, intid + i); | |
| 639 | 639 | vgic_mmio_change_active(vcpu, irq, true); |
| 640 | 640 | vgic_put_irq(vcpu->kvm, irq); |
| 641 | 641 | } |
| @@ -672,7 +672,7 @@ unsigned long vgic_mmio_read_priority(struct kvm_vcpu *vcpu, · 30 unmodified lines | ||
| 672 | 672 | u64 val = 0; |
| 673 | 673 | |
| 674 | 674 | for (i = 0; i < len; i++) { |
| 675 | − struct vgic_irq *irq = vgic_get_irq(vcpu->kvm, vcpu, intid + i); | |
| 675 | + struct vgic_irq *irq = vgic_get_vcpu_irq(vcpu, intid + i); | |
| 676 | 676 | |
| 677 | 677 | val |= (u64)irq->priority << (i * 8); |
| 678 | 678 | |
| @@ -698,7 +698,7 @@ void vgic_mmio_write_priority(struct kvm_vcpu *vcpu, · 19 unmodified lines | ||
| 698 | 698 | unsigned long flags; |
| 699 | 699 | |
| 700 | 700 | for (i = 0; i < len; i++) { |
| 701 | − struct vgic_irq *irq = vgic_get_irq(vcpu->kvm, vcpu, intid + i); | |
| 701 | + struct vgic_irq *irq = vgic_get_vcpu_irq(vcpu, intid + i); | |
| 702 | 702 | |
| 703 | 703 | raw_spin_lock_irqsave(&irq->irq_lock, flags); |
| 704 | 704 | /* Narrow the priority range to what we actually support */ |
| @@ -719,7 +719,7 @@ unsigned long vgic_mmio_read_config(struct kvm_vcpu *vcpu, · 14 unmodified lines | ||
| 719 | 719 | int i; |
| 720 | 720 | |
| 721 | 721 | for (i = 0; i < len * 4; i++) { |
| 722 | − struct vgic_irq *irq = vgic_get_irq(vcpu->kvm, vcpu, intid + i); | |
| 722 | + struct vgic_irq *irq = vgic_get_vcpu_irq(vcpu, intid + i); | |
| 723 | 723 | |
| 724 | 724 | if (irq->config == VGIC_CONFIG_EDGE) |
| 725 | 725 | value |= (2U << (i * 2)); |
| @@ -750,7 +750,7 @@ void vgic_mmio_write_config(struct kvm_vcpu *vcpu, · 24 unmodified lines | ||
| 750 | 750 | if (intid + i < VGIC_NR_PRIVATE_IRQS) |
| 751 | 751 | continue; |
| 752 | 752 | |
| 753 | − irq = vgic_get_irq(vcpu->kvm, vcpu, intid + i); | |
| 753 | + irq = vgic_get_irq(vcpu->kvm, intid + i); | |
| 754 | 754 | raw_spin_lock_irqsave(&irq->irq_lock, flags); |
| 755 | 755 | |
| 756 | 756 | if (test_bit(i * 2 + 1, &val)) |
| @@ -775,7 +775,7 @@ u32 vgic_read_irq_line_level_info(struct kvm_vcpu *vcpu, u32 intid) · 18 unmodified lines | ||
| 775 | 775 | if ((intid + i) < VGIC_NR_SGIS || (intid + i) >= nr_irqs) |
| 776 | 776 | continue; |
| 777 | 777 | |
| 778 | − irq = vgic_get_irq(vcpu->kvm, vcpu, intid + i); | |
| 778 | + irq = vgic_get_vcpu_irq(vcpu, intid + i); | |
| 779 | 779 | if (irq->config == VGIC_CONFIG_LEVEL && irq->line_level) |
| 780 | 780 | val |= (1U << i); |
| 781 | 781 | |
| @@ -799,7 +799,7 @@ void vgic_write_irq_line_level_info(struct kvm_vcpu *vcpu, u32 intid, · 17 unmodified lines | ||
| 799 | 799 | if ((intid + i) < VGIC_NR_SGIS || (intid + i) >= nr_irqs) |
| 800 | 800 | continue; |
| 801 | 801 | |
| 802 | − irq = vgic_get_irq(vcpu->kvm, vcpu, intid + i); | |
| 802 | + irq = vgic_get_vcpu_irq(vcpu, intid + i); | |
| 803 | 803 | |
| 804 | 804 | /* |
| 805 | 805 | * Line level is set irrespective of irq type |
| @@ -72,7 +72,7 @@ void vgic_v2_fold_lr_state(struct kvm_vcpu *vcpu) · 71 unmodified lines | ||
| 72 | 72 | kvm_notify_acked_irq(vcpu->kvm, 0, |
| 73 | 73 | intid - VGIC_NR_PRIVATE_IRQS); |
| 74 | 74 | |
| 75 | − irq = vgic_get_irq(vcpu->kvm, vcpu, intid); | |
| 75 | + irq = vgic_get_vcpu_irq(vcpu, intid); | |
| 76 | 76 | |
| 77 | 77 | raw_spin_lock(&irq->irq_lock); |
| 78 | 78 | |
| @@ -65,7 +65,7 @@ void vgic_v3_fold_lr_state(struct kvm_vcpu *vcpu) · 64 unmodified lines | ||
| 65 | 65 | kvm_notify_acked_irq(vcpu->kvm, 0, |
| 66 | 66 | intid - VGIC_NR_PRIVATE_IRQS); |
| 67 | 67 | |
| 68 | − irq = vgic_get_irq(vcpu->kvm, vcpu, intid); | |
| 68 | + irq = vgic_get_vcpu_irq(vcpu, intid); | |
| 69 | 69 | if (!irq) /* An LPI could have been unmapped. */ |
| 70 | 70 | continue; |
| 71 | 71 | |
| @@ -123,7 +123,7 @@ static void vgic_v4_enable_vsgis(struct kvm_vcpu *vcpu) · 122 unmodified lines | ||
| 123 | 123 | * IRQ. The SGI code will do its magic. |
| 124 | 124 | */ |
| 125 | 125 | for (i = 0; i < VGIC_NR_SGIS; i++) { |
| 126 | − struct vgic_irq *irq = vgic_get_irq(vcpu->kvm, vcpu, i); | |
| 126 | + struct vgic_irq *irq = vgic_get_vcpu_irq(vcpu, i); | |
| 127 | 127 | struct irq_desc *desc; |
| 128 | 128 | unsigned long flags; |
| 129 | 129 | int ret; |
| @@ -160,7 +160,7 @@ static void vgic_v4_disable_vsgis(struct kvm_vcpu *vcpu) · 30 unmodified lines | ||
| 160 | 160 | int i; |
| 161 | 161 | |
| 162 | 162 | for (i = 0; i < VGIC_NR_SGIS; i++) { |
| 163 | − struct vgic_irq *irq = vgic_get_irq(vcpu->kvm, vcpu, i); | |
| 163 | + struct vgic_irq *irq = vgic_get_vcpu_irq(vcpu, i); | |
| 164 | 164 | struct irq_desc *desc; |
| 165 | 165 | unsigned long flags; |
| 166 | 166 | int ret; |
| @@ -84,17 +84,11 @@ static struct vgic_irq *vgic_get_lpi(struct kvm *kvm, u32 intid) · 83 unmodified lines | ||
| 84 | 84 | * struct vgic_irq. It also increases the refcount, so any caller is expected |
| 85 | 85 | * to call vgic_put_irq() once it's finished with this IRQ. |
| 86 | 86 | */ |
| 87 | −struct vgic_irq *vgic_get_irq(struct kvm *kvm, struct kvm_vcpu *vcpu, | |
| 88 | − u32 intid) | |
| 87 | +struct vgic_irq *vgic_get_irq(struct kvm *kvm, u32 intid) | |
| 89 | 88 | { |
| 90 | − /* SGIs and PPIs */ | |
| 91 | − if (intid <= VGIC_MAX_PRIVATE) { | |
| 92 | − intid = array_index_nospec(intid, VGIC_MAX_PRIVATE + 1); | |
| 93 | − return &vcpu->arch.vgic_cpu.private_irqs[intid]; | |
| 94 | − } | |
| 95 | − | |
| 96 | 89 | /* SPIs */ |
| 97 | − if (intid < (kvm->arch.vgic.nr_spis + VGIC_NR_PRIVATE_IRQS)) { | |
| 90 | + if (intid >= VGIC_NR_PRIVATE_IRQS && | |
| 91 | + intid < (kvm->arch.vgic.nr_spis + VGIC_NR_PRIVATE_IRQS)) { | |
| 98 | 92 | intid = array_index_nospec(intid, kvm->arch.vgic.nr_spis + VGIC_NR_PRIVATE_IRQS); |
| 99 | 93 | return &kvm->arch.vgic.spis[intid - VGIC_NR_PRIVATE_IRQS]; |
| 100 | 94 | } |
| @@ -106,6 +100,20 @@ struct vgic_irq *vgic_get_irq(struct kvm *kvm, struct kvm_vcpu *vcpu, · 5 unmodified lines | ||
| 106 | 100 | return NULL; |
| 107 | 101 | } |
| 108 | 102 | |
| 103 | +struct vgic_irq *vgic_get_vcpu_irq(struct kvm_vcpu *vcpu, u32 intid) | |
| 104 | +{ | |
| 105 | + if (WARN_ON(!vcpu)) | |
| 106 | + return NULL; | |
| 107 | + | |
| 108 | + /* SGIs and PPIs */ | |
| 109 | + if (intid < VGIC_NR_PRIVATE_IRQS) { | |
| 110 | + intid = array_index_nospec(intid, VGIC_NR_PRIVATE_IRQS); | |
| 111 | + return &vcpu->arch.vgic_cpu.private_irqs[intid]; | |
| 112 | + } | |
| 113 | + | |
| 114 | + return vgic_get_irq(vcpu->kvm, intid); | |
| 115 | +} | |
| 116 | + | |
| 109 | 117 | /* |
| 110 | 118 | * We can't do anything in here, because we lack the kvm pointer to |
| 111 | 119 | * lock and remove the item from the lpi_list. So we keep this function |
| @@ -437,7 +445,10 @@ int kvm_vgic_inject_irq(struct kvm *kvm, struct kvm_vcpu *vcpu, · 325 unmodified lines | ||
| 437 | 445 | |
| 438 | 446 | trace_vgic_update_irq_pending(vcpu ? vcpu->vcpu_idx : 0, intid, level); |
| 439 | 447 | |
| 440 | − irq = vgic_get_irq(kvm, vcpu, intid); | |
| 448 | + if (intid < VGIC_NR_PRIVATE_IRQS) | |
| 449 | + irq = vgic_get_vcpu_irq(vcpu, intid); | |
| 450 | + else | |
| 451 | + irq = vgic_get_irq(kvm, intid); | |
| 441 | 452 | if (!irq) |
| 442 | 453 | return -EINVAL; |
| 443 | 454 | |
| @@ -499,7 +510,7 @@ static inline void kvm_vgic_unmap_irq(struct vgic_irq *irq) · 55 unmodified lines | ||
| 499 | 510 | int kvm_vgic_map_phys_irq(struct kvm_vcpu *vcpu, unsigned int host_irq, |
| 500 | 511 | u32 vintid, struct irq_ops *ops) |
| 501 | 512 | { |
| 502 | − struct vgic_irq *irq = vgic_get_irq(vcpu->kvm, vcpu, vintid); | |
| 513 | + struct vgic_irq *irq = vgic_get_vcpu_irq(vcpu, vintid); | |
| 503 | 514 | unsigned long flags; |
| 504 | 515 | int ret; |
| 505 | 516 | |
| @@ -524,7 +535,7 @@ int kvm_vgic_map_phys_irq(struct kvm_vcpu *vcpu, unsigned int host_irq, · 18 unmodified lines | ||
| 524 | 535 | */ |
| 525 | 536 | void kvm_vgic_reset_mapped_irq(struct kvm_vcpu *vcpu, u32 vintid) |
| 526 | 537 | { |
| 527 | − struct vgic_irq *irq = vgic_get_irq(vcpu->kvm, vcpu, vintid); | |
| 538 | + struct vgic_irq *irq = vgic_get_vcpu_irq(vcpu, vintid); | |
| 528 | 539 | unsigned long flags; |
| 529 | 540 | |
| 530 | 541 | if (!irq->hw) |
| @@ -547,7 +558,7 @@ int kvm_vgic_unmap_phys_irq(struct kvm_vcpu *vcpu, unsigned int vintid) · 16 unmodified lines | ||
| 547 | 558 | if (!vgic_initialized(vcpu->kvm)) |
| 548 | 559 | return -EAGAIN; |
| 549 | 560 | |
| 550 | − irq = vgic_get_irq(vcpu->kvm, vcpu, vintid); | |
| 561 | + irq = vgic_get_vcpu_irq(vcpu, vintid); | |
| 551 | 562 | BUG_ON(!irq); |
| 552 | 563 | |
| 553 | 564 | raw_spin_lock_irqsave(&irq->irq_lock, flags); |
| @@ -560,7 +571,7 @@ int kvm_vgic_unmap_phys_irq(struct kvm_vcpu *vcpu, unsigned int vintid) · 6 unmodified lines | ||
| 560 | 571 | |
| 561 | 572 | int kvm_vgic_get_map(struct kvm_vcpu *vcpu, unsigned int vintid) |
| 562 | 573 | { |
| 563 | − struct vgic_irq *irq = vgic_get_irq(vcpu->kvm, vcpu, vintid); | |
| 574 | + struct vgic_irq *irq = vgic_get_vcpu_irq(vcpu, vintid); | |
| 564 | 575 | unsigned long flags; |
| 565 | 576 | int ret = -1; |
| 566 | 577 | |
| @@ -596,7 +607,7 @@ int kvm_vgic_set_owner(struct kvm_vcpu *vcpu, unsigned int intid, void *owner) · 29 unmodified lines | ||
| 596 | 607 | if (!irq_is_ppi(intid) && !vgic_valid_spi(vcpu->kvm, intid)) |
| 597 | 608 | return -EINVAL; |
| 598 | 609 | |
| 599 | − irq = vgic_get_irq(vcpu->kvm, vcpu, intid); | |
| 610 | + irq = vgic_get_vcpu_irq(vcpu, intid); | |
| 600 | 611 | raw_spin_lock_irqsave(&irq->irq_lock, flags); |
| 601 | 612 | if (irq->owner && irq->owner != owner) |
| 602 | 613 | ret = -EEXIST; |
| @@ -1008,7 +1019,7 @@ bool kvm_vgic_map_is_active(struct kvm_vcpu *vcpu, unsigned int vintid) · 405 unmodified lines | ||
| 1008 | 1019 | if (!vgic_initialized(vcpu->kvm)) |
| 1009 | 1020 | return false; |
| 1010 | 1021 | |
| 1011 | − irq = vgic_get_irq(vcpu->kvm, vcpu, vintid); | |
| 1022 | + irq = vgic_get_vcpu_irq(vcpu, vintid); | |
| 1012 | 1023 | raw_spin_lock_irqsave(&irq->irq_lock, flags); |
| 1013 | 1024 | map_is_active = irq->hw && irq->active; |
| 1014 | 1025 | raw_spin_unlock_irqrestore(&irq->irq_lock, flags); |
| @@ -146,29 +146,6 @@ static inline int vgic_write_guest_lock(struct kvm *kvm, gpa_t gpa, · 145 unmodified lines | ||
| 146 | 146 | return ret; |
| 147 | 147 | } |
| 148 | 148 | |
| 149 | −static inline int vgic_its_read_entry_lock(struct vgic_its *its, gpa_t eaddr, | |
| 150 | − u64 *eval, unsigned long esize) | |
| 151 | −{ | |
| 152 | − struct kvm *kvm = its->dev->kvm; | |
| 153 | − | |
| 154 | − if (KVM_BUG_ON(esize != sizeof(*eval), kvm)) | |
| 155 | − return -EINVAL; | |
| 156 | − | |
| 157 | − return kvm_read_guest_lock(kvm, eaddr, eval, esize); | |
| 158 | − | |
| 159 | −} | |
| 160 | − | |
| 161 | −static inline int vgic_its_write_entry_lock(struct vgic_its *its, gpa_t eaddr, | |
| 162 | − u64 eval, unsigned long esize) | |
| 163 | −{ | |
| 164 | − struct kvm *kvm = its->dev->kvm; | |
| 165 | − | |
| 166 | − if (KVM_BUG_ON(esize != sizeof(eval), kvm)) | |
| 167 | − return -EINVAL; | |
| 168 | − | |
| 169 | − return vgic_write_guest_lock(kvm, eaddr, &eval, esize); | |
| 170 | −} | |
| 171 | − | |
| 172 | 149 | /* |
| 173 | 150 | * This struct provides an intermediate representation of the fields contained |
| 174 | 151 | * in the GICH_VMCR and ICH_VMCR registers, such that code exporting the GIC |
| @@ -202,8 +179,8 @@ int vgic_v2_parse_attr(struct kvm_device *dev, struct kvm_device_attr *attr, · 27 unmodified lines | ||
| 202 | 179 | const struct vgic_register_region * |
| 203 | 180 | vgic_get_mmio_region(struct kvm_vcpu *vcpu, struct vgic_io_device *iodev, |
| 204 | 181 | gpa_t addr, int len); |
| 205 | −struct vgic_irq *vgic_get_irq(struct kvm *kvm, struct kvm_vcpu *vcpu, | |
| 206 | − u32 intid); | |
| 182 | +struct vgic_irq *vgic_get_irq(struct kvm *kvm, u32 intid); | |
| 183 | +struct vgic_irq *vgic_get_vcpu_irq(struct kvm_vcpu *vcpu, u32 intid); | |
| 207 | 184 | void vgic_put_irq(struct kvm *kvm, struct vgic_irq *irq); |
| 208 | 185 | bool vgic_get_phys_line_level(struct vgic_irq *irq); |
| 209 | 186 | void vgic_irq_set_phys_pending(struct vgic_irq *irq, bool pending); |
| @@ -9,7 +9,7 @@ · 8 unmodified lines | ||
| 9 | 9 | #define _ASM_SPINLOCK_TYPES_H |
| 10 | 10 | |
| 11 | 11 | #ifndef __LINUX_SPINLOCK_TYPES_RAW_H |
| 12 | −# error "please don't include this file directly" | |
| 12 | +# error "Please do not include this file directly." | |
| 13 | 13 | #endif |
| 14 | 14 | |
| 15 | 15 | typedef struct { |
| @@ -23,6 +23,7 @@ config LOONGARCH · 22 unmodified lines | ||
| 23 | 23 | select ARCH_HAS_KERNEL_FPU_SUPPORT if CPU_HAS_FPU |
| 24 | 24 | select ARCH_HAS_NMI_SAFE_THIS_CPU_OPS |
| 25 | 25 | select ARCH_HAS_NON_OVERLAPPING_ADDRESS_SPACE |
| 26 | + select ARCH_HAS_PREEMPT_LAZY | |
| 26 | 27 | select ARCH_HAS_PTE_DEVMAP |
| 27 | 28 | select ARCH_HAS_PTE_SPECIAL |
| 28 | 29 | select ARCH_HAS_SET_MEMORY |
| @@ -66,6 +67,7 @@ config LOONGARCH · 37 unmodified lines | ||
| 66 | 67 | select ARCH_SUPPORTS_LTO_CLANG |
| 67 | 68 | select ARCH_SUPPORTS_LTO_CLANG_THIN |
| 68 | 69 | select ARCH_SUPPORTS_NUMA_BALANCING |
| 70 | + select ARCH_SUPPORTS_RT | |
| 69 | 71 | select ARCH_USE_BUILTIN_BSWAP |
| 70 | 72 | select ARCH_USE_CMPXCHG_LOCKREF |
| 71 | 73 | select ARCH_USE_QUEUED_RWLOCKS |
| @@ -155,6 +157,7 @@ config LOONGARCH · 83 unmodified lines | ||
| 155 | 157 | select HAVE_PERF_EVENTS |
| 156 | 158 | select HAVE_PERF_REGS |
| 157 | 159 | select HAVE_PERF_USER_STACK_DUMP |
| 160 | + select HAVE_POSIX_CPU_TIMERS_TASK_WORK | |
| 158 | 161 | select HAVE_PREEMPT_DYNAMIC_KEY |
| 159 | 162 | select HAVE_REGS_AND_STACK_ACCESS_API |
| 160 | 163 | select HAVE_RELIABLE_STACKTRACE if UNWINDER_ORC |
| @@ -59,7 +59,7 @@ endif · 58 unmodified lines | ||
| 59 | 59 | |
| 60 | 60 | ifdef CONFIG_64BIT |
| 61 | 61 | ld-emul = $(64bit-emul) |
| 62 | −cflags-y += -mabi=lp64s | |
| 62 | +cflags-y += -mabi=lp64s -mcmodel=normal | |
| 63 | 63 | endif |
| 64 | 64 | |
| 65 | 65 | cflags-y += -pipe $(CC_FLAGS_NO_FPU) |
| @@ -104,7 +104,7 @@ ifdef CONFIG_OBJTOOL · 38 unmodified lines | ||
| 104 | 104 | KBUILD_CFLAGS += -fno-jump-tables |
| 105 | 105 | endif |
| 106 | 106 | |
| 107 | −KBUILD_RUSTFLAGS += --target=loongarch64-unknown-none-softfloat | |
| 107 | +KBUILD_RUSTFLAGS += --target=loongarch64-unknown-none-softfloat -Ccode-model=small | |
| 108 | 108 | KBUILD_RUSTFLAGS_KERNEL += -Zdirect-access-external-data=yes |
| 109 | 109 | KBUILD_RUSTFLAGS_MODULE += -Zdirect-access-external-data=no |
| 110 | 110 | |
| @@ -266,7 +266,7 @@ · 265 unmodified lines | ||
| 266 | 266 | status = "disabled"; |
| 267 | 267 | }; |
| 268 | 268 | |
| 269 | − dma-controller@1fe00c20 { | |
| 269 | + apbdma2: dma-controller@1fe00c20 { | |
| 270 | 270 | compatible = "loongson,ls2k1000-apbdma"; |
| 271 | 271 | reg = <0x0 0x1fe00c20 0x0 0x8>; |
| 272 | 272 | interrupt-parent = <&liointc1>; |
| @@ -276,7 +276,7 @@ · 3 unmodified lines | ||
| 276 | 276 | status = "disabled"; |
| 277 | 277 | }; |
| 278 | 278 | |
| 279 | − dma-controller@1fe00c30 { | |
| 279 | + apbdma3: dma-controller@1fe00c30 { | |
| 280 | 280 | compatible = "loongson,ls2k1000-apbdma"; |
| 281 | 281 | reg = <0x0 0x1fe00c30 0x0 0x8>; |
| 282 | 282 | interrupt-parent = <&liointc1>; |
| @@ -352,6 +352,19 @@ · 69 unmodified lines | ||
| 352 | 352 | status = "disabled"; |
| 353 | 353 | }; |
| 354 | 354 | |
| 355 | + i2s: i2s@1fe2d000 { | |
| 356 | + compatible = "loongson,ls2k1000-i2s"; | |
| 357 | + reg = <0 0x1fe2d000 0 0x14>, | |
| 358 | + <0 0x1fe00438 0 0x8>; | |
| 359 | + interrupt-parent = <&liointc0>; | |
| 360 | + interrupts = <5 IRQ_TYPE_LEVEL_HIGH>; | |
| 361 | + clocks = <&clk LOONGSON2_APB_CLK>; | |
| 362 | + dmas = <&apbdma2 0>, <&apbdma3 0>; | |
| 363 | + dma-names = "tx", "rx"; | |
| 364 | + #sound-dai-cells = <0>; | |
| 365 | + status = "disabled"; | |
| 366 | + }; | |
| 367 | + | |
| 355 | 368 | spi0: spi@1fff0220 { |
| 356 | 369 | compatible = "loongson,ls2k1000-spi"; |
| 357 | 370 | reg = <0x0 0x1fff0220 0x0 0x10>; |
| @@ -173,6 +173,22 @@ · 172 unmodified lines | ||
| 173 | 173 | status = "disabled"; |
| 174 | 174 | }; |
| 175 | 175 | |
| 176 | + i2c@1fe00120 { | |
| 177 | + compatible = "loongson,ls2k-i2c"; | |
| 178 | + reg = <0x0 0x1fe00120 0x0 0x8>; | |
| 179 | + interrupt-parent = <&liointc>; | |
| 180 | + interrupts = <8 IRQ_TYPE_LEVEL_HIGH>; | |
| 181 | + status = "disabled"; | |
| 182 | + }; | |
| 183 | + | |
| 184 | + i2c@1fe00130 { | |
| 185 | + compatible = "loongson,ls2k-i2c"; | |
| 186 | + reg = <0x0 0x1fe00130 0x0 0x8>; | |
| 187 | + interrupt-parent = <&liointc>; | |
| 188 | + interrupts = <9 IRQ_TYPE_LEVEL_HIGH>; | |
| 189 | + status = "disabled"; | |
| 190 | + }; | |
| 191 | + | |
| 176 | 192 | uart0: serial@1fe001e0 { |
| 177 | 193 | compatible = "ns16550a"; |
| 178 | 194 | reg = <0x0 0x1fe001e0 0x0 0x10>; |
| @@ -243,9 +259,11 @@ · 64 unmodified lines | ||
| 243 | 259 | status = "disabled"; |
| 244 | 260 | }; |
| 245 | 261 | |
| 246 | − hda@7,0 { | |
| 262 | + i2s@7,0 { | |
| 247 | 263 | reg = <0x3800 0x0 0x0 0x0 0x0>; |
| 248 | − interrupts = <58 IRQ_TYPE_LEVEL_HIGH>; | |
| 264 | + interrupts = <78 IRQ_TYPE_LEVEL_HIGH>, | |
| 265 | + <79 IRQ_TYPE_LEVEL_HIGH>; | |
| 266 | + interrupt-names = "tx", "rx"; | |
| 249 | 267 | interrupt-parent = <&pic>; |
| 250 | 268 | status = "disabled"; |
| 251 | 269 | }; |
| @@ -1,4 +1,5 @@ | ||
| 1 | 1 | # CONFIG_LOCALVERSION_AUTO is not set |
| 2 | +CONFIG_KERNEL_ZSTD=y | |
| 2 | 3 | CONFIG_SYSVIPC=y |
| 3 | 4 | CONFIG_POSIX_MQUEUE=y |
| 4 | 5 | CONFIG_NO_HZ=y |
| @@ -70,6 +71,14 @@ CONFIG_ACPI_IPMI=m · 65 unmodified lines | ||
| 70 | 71 | CONFIG_ACPI_HOTPLUG_CPU=y |
| 71 | 72 | CONFIG_ACPI_PCI_SLOT=y |
| 72 | 73 | CONFIG_ACPI_HOTPLUG_MEMORY=y |
| 74 | +CONFIG_ACPI_BGRT=y | |
| 75 | +CONFIG_CPU_FREQ=y | |
| 76 | +CONFIG_CPU_FREQ_GOV_POWERSAVE=y | |
| 77 | +CONFIG_CPU_FREQ_GOV_USERSPACE=y | |
| 78 | +CONFIG_CPU_FREQ_GOV_ONDEMAND=y | |
| 79 | +CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y | |
| 80 | +CONFIG_CPU_FREQ_GOV_SCHEDUTIL=y | |
| 81 | +CONFIG_LOONGSON3_CPUFREQ=m | |
| 73 | 82 | CONFIG_VIRTUALIZATION=y |
| 74 | 83 | CONFIG_KVM=m |
| 75 | 84 | CONFIG_JUMP_LABEL=y |
| @@ -78,6 +87,9 @@ CONFIG_MODULE_FORCE_LOAD=y · 2 unmodified lines | ||
| 78 | 87 | CONFIG_MODULE_UNLOAD=y |
| 79 | 88 | CONFIG_MODULE_FORCE_UNLOAD=y |
| 80 | 89 | CONFIG_MODVERSIONS=y |
| 90 | +CONFIG_MODULE_COMPRESS=y | |
| 91 | +CONFIG_MODULE_COMPRESS_ZSTD=y | |
| 92 | +CONFIG_MODULE_DECOMPRESS=y | |
| 81 | 93 | CONFIG_BLK_DEV_ZONED=y |
| 82 | 94 | CONFIG_BLK_DEV_THROTTLING=y |
| 83 | 95 | CONFIG_BLK_WBT=y |
| @@ -85,6 +97,8 @@ CONFIG_BLK_CGROUP_IOLATENCY=y · 1 unmodified line | ||
| 85 | 97 | CONFIG_BLK_CGROUP_FC_APPID=y |
| 86 | 98 | CONFIG_BLK_CGROUP_IOCOST=y |
| 87 | 99 | CONFIG_BLK_CGROUP_IOPRIO=y |
| 100 | +CONFIG_BLK_INLINE_ENCRYPTION=y | |
| 101 | +CONFIG_BLK_INLINE_ENCRYPTION_FALLBACK=y | |
| 88 | 102 | CONFIG_PARTITION_ADVANCED=y |
| 89 | 103 | CONFIG_BSD_DISKLABEL=y |
| 90 | 104 | CONFIG_UNIXWARE_DISKLABEL=y |
| @@ -413,7 +427,16 @@ CONFIG_PARPORT_PC=y · 322 unmodified lines | ||
| 413 | 427 | CONFIG_PARPORT_SERIAL=y |
| 414 | 428 | CONFIG_PARPORT_PC_FIFO=y |
| 415 | 429 | CONFIG_ZRAM=m |
| 430 | +CONFIG_ZRAM_BACKEND_LZ4=y | |
| 431 | +CONFIG_ZRAM_BACKEND_LZ4HC=y | |
| 432 | +CONFIG_ZRAM_BACKEND_ZSTD=y | |
| 433 | +CONFIG_ZRAM_BACKEND_DEFLATE=y | |
| 434 | +CONFIG_ZRAM_BACKEND_842=y | |
| 435 | +CONFIG_ZRAM_BACKEND_LZO=y | |
| 416 | 436 | CONFIG_ZRAM_DEF_COMP_ZSTD=y |
| 437 | +CONFIG_ZRAM_WRITEBACK=y | |
| 438 | +CONFIG_ZRAM_MEMORY_TRACKING=y | |
| 439 | +CONFIG_ZRAM_MULTI_COMP=y | |
| 417 | 440 | CONFIG_BLK_DEV_LOOP=y |
| 418 | 441 | CONFIG_BLK_DEV_DRBD=m |
| 419 | 442 | CONFIG_BLK_DEV_NBD=m |
| @@ -433,6 +456,9 @@ CONFIG_NVME_TARGET_RDMA=m · 13 unmodified lines | ||
| 433 | 456 | CONFIG_NVME_TARGET_FC=m |
| 434 | 457 | CONFIG_NVME_TARGET_TCP=m |
| 435 | 458 | CONFIG_EEPROM_AT24=m |
| 459 | +CONFIG_PVPANIC=y | |
| 460 | +CONFIG_PVPANIC_MMIO=m | |
| 461 | +CONFIG_PVPANIC_PCI=m | |
| 436 | 462 | CONFIG_BLK_DEV_SD=y |
| 437 | 463 | CONFIG_BLK_DEV_SR=y |
| 438 | 464 | CONFIG_CHR_DEV_SG=y |
| @@ -470,12 +496,10 @@ CONFIG_PATA_ATIIXP=y · 31 unmodified lines | ||
| 470 | 496 | CONFIG_PATA_PCMCIA=m |
| 471 | 497 | CONFIG_MD=y |
| 472 | 498 | CONFIG_BLK_DEV_MD=m |
| 473 | −CONFIG_MD_LINEAR=m | |
| 474 | 499 | CONFIG_MD_RAID0=m |
| 475 | 500 | CONFIG_MD_RAID1=m |
| 476 | 501 | CONFIG_MD_RAID10=m |
| 477 | 502 | CONFIG_MD_RAID456=m |
| 478 | −CONFIG_MD_MULTIPATH=m | |
| 479 | 503 | CONFIG_BCACHE=m |
| 480 | 504 | CONFIG_BLK_DEV_DM=y |
| 481 | 505 | CONFIG_DM_CRYPT=m |
| @@ -489,6 +513,16 @@ CONFIG_DM_ZERO=m · 7 unmodified lines | ||
| 489 | 513 | CONFIG_DM_MULTIPATH=m |
| 490 | 514 | CONFIG_DM_MULTIPATH_QL=m |
| 491 | 515 | CONFIG_DM_MULTIPATH_ST=m |
| 516 | +CONFIG_DM_MULTIPATH_HST=m | |
| 517 | +CONFIG_DM_MULTIPATH_IOA=m | |
| 518 | +CONFIG_DM_INIT=y | |
| 519 | +CONFIG_DM_UEVENT=y | |
| 520 | +CONFIG_DM_VERITY=m | |
| 521 | +CONFIG_DM_VERITY_VERIFY_ROOTHASH_SIG=y | |
| 522 | +CONFIG_DM_VERITY_FEC=y | |
| 523 | +CONFIG_DM_INTEGRITY=m | |
| 524 | +CONFIG_DM_ZONED=m | |
| 525 | +CONFIG_DM_VDO=m | |
| 492 | 526 | CONFIG_TARGET_CORE=m |
| 493 | 527 | CONFIG_TCM_IBLOCK=m |
| 494 | 528 | CONFIG_TCM_FILEIO=m |
| @@ -500,6 +534,13 @@ CONFIG_NETDEVICES=y · 5 unmodified lines | ||
| 500 | 534 | CONFIG_BONDING=m |
| 501 | 535 | CONFIG_DUMMY=y |
| 502 | 536 | CONFIG_WIREGUARD=m |
| 537 | +CONFIG_IFB=m | |
| 538 | +CONFIG_NET_TEAM=m | |
| 539 | +CONFIG_NET_TEAM_MODE_BROADCAST=m | |
| 540 | +CONFIG_NET_TEAM_MODE_ROUNDROBIN=m | |
| 541 | +CONFIG_NET_TEAM_MODE_RANDOM=m | |
| 542 | +CONFIG_NET_TEAM_MODE_ACTIVEBACKUP=m | |
| 543 | +CONFIG_NET_TEAM_MODE_LOADBALANCE=m | |
| 503 | 544 | CONFIG_MACVLAN=m |
| 504 | 545 | CONFIG_MACVTAP=m |
| 505 | 546 | CONFIG_IPVLAN=m |
| @@ -580,12 +621,14 @@ CONFIG_PPP_ASYNC=m · 74 unmodified lines | ||
| 580 | 621 | CONFIG_PPP_SYNC_TTY=m |
| 581 | 622 | CONFIG_USB_RTL8150=m |
| 582 | 623 | CONFIG_USB_RTL8152=m |
| 624 | +CONFIG_USB_USBNET=m | |
| 583 | 625 | # CONFIG_USB_NET_AX8817X is not set |
| 584 | 626 | # CONFIG_USB_NET_AX88179_178A is not set |
| 585 | 627 | CONFIG_USB_NET_CDC_EEM=m |
| 586 | 628 | CONFIG_USB_NET_HUAWEI_CDC_NCM=m |
| 587 | 629 | CONFIG_USB_NET_CDC_MBIM=m |
| 588 | 630 | # CONFIG_USB_NET_NET1080 is not set |
| 631 | +CONFIG_USB_NET_RNDIS_HOST=m | |
| 589 | 632 | # CONFIG_USB_BELKIN is not set |
| 590 | 633 | # CONFIG_USB_ARMLINUX is not set |
| 591 | 634 | # CONFIG_USB_NET_ZAURUS is not set |
| @@ -594,10 +637,11 @@ CONFIG_ATH9K_HTC=m · 2 unmodified lines | ||
| 594 | 637 | CONFIG_IWLWIFI=m |
| 595 | 638 | CONFIG_IWLDVM=m |
| 596 | 639 | CONFIG_IWLMVM=m |
| 597 | −CONFIG_HOSTAP=m | |
| 598 | 640 | CONFIG_MT7601U=m |
| 599 | 641 | CONFIG_RT2X00=m |
| 600 | 642 | CONFIG_RT2800USB=m |
| 643 | +CONFIG_RTL8180=m | |
| 644 | +CONFIG_RTL8187=m | |
| 601 | 645 | CONFIG_RTL8192CE=m |
| 602 | 646 | CONFIG_RTL8192SE=m |
| 603 | 647 | CONFIG_RTL8192DE=m |
| @@ -607,18 +651,26 @@ CONFIG_RTL8188EE=m · 3 unmodified lines | ||
| 607 | 651 | CONFIG_RTL8192EE=m |
| 608 | 652 | CONFIG_RTL8821AE=m |
| 609 | 653 | CONFIG_RTL8192CU=m |
| 654 | +CONFIG_RTL8192DU=m | |
| 610 | 655 | # CONFIG_RTLWIFI_DEBUG is not set |
| 611 | 656 | CONFIG_RTL8XXXU=m |
| 612 | 657 | CONFIG_RTW88=m |
| 613 | 658 | CONFIG_RTW88_8822BE=m |
| 659 | +CONFIG_RTW88_8822BU=m | |
| 614 | 660 | CONFIG_RTW88_8822CE=m |
| 661 | +CONFIG_RTW88_8822CU=m | |
| 615 | 662 | CONFIG_RTW88_8723DE=m |
| 663 | +CONFIG_RTW88_8723DU=m | |
| 616 | 664 | CONFIG_RTW88_8821CE=m |
| 665 | +CONFIG_RTW88_8821CU=m | |
| 617 | 666 | CONFIG_RTW89=m |
| 667 | +CONFIG_RTW89_8851BE=m | |
| 618 | 668 | CONFIG_RTW89_8852AE=m |
| 669 | +CONFIG_RTW89_8852BE=m | |
| 670 | +CONFIG_RTW89_8852BTE=m | |
| 619 | 671 | CONFIG_RTW89_8852CE=m |
| 672 | +CONFIG_RTW89_8922AE=m | |
| 620 | 673 | CONFIG_ZD1211RW=m |
| 621 | −CONFIG_USB_NET_RNDIS_WLAN=m | |
| 622 | 674 | CONFIG_USB4_NET=m |
| 623 | 675 | CONFIG_INPUT_MOUSEDEV=y |
| 624 | 676 | CONFIG_INPUT_MOUSEDEV_PSAUX=y |
| @@ -651,6 +703,9 @@ CONFIG_HW_RANDOM=y · 26 unmodified lines | ||
| 651 | 703 | CONFIG_HW_RANDOM_VIRTIO=m |
| 652 | 704 | CONFIG_I2C_CHARDEV=y |
| 653 | 705 | CONFIG_I2C_PIIX4=y |
| 706 | +CONFIG_I2C_DESIGNWARE_CORE=y | |
| 707 | +CONFIG_I2C_DESIGNWARE_SLAVE=y | |
| 708 | +CONFIG_I2C_DESIGNWARE_PCI=y | |
| 654 | 709 | CONFIG_I2C_GPIO=y |
| 655 | 710 | CONFIG_I2C_LS2X=y |
| 656 | 711 | CONFIG_SPI=y |
| @@ -727,11 +782,22 @@ CONFIG_SND_HDA_CODEC_CONEXANT=y · 70 unmodified lines | ||
| 727 | 782 | CONFIG_SND_USB_AUDIO=m |
| 728 | 783 | CONFIG_SND_SOC=m |
| 729 | 784 | CONFIG_SND_SOC_LOONGSON_CARD=m |
| 785 | +CONFIG_SND_SOC_ES7134=m | |
| 786 | +CONFIG_SND_SOC_ES7241=m | |
| 787 | +CONFIG_SND_SOC_ES8311=m | |
| 788 | +CONFIG_SND_SOC_ES8316=m | |
| 789 | +CONFIG_SND_SOC_ES8323=m | |
| 790 | +CONFIG_SND_SOC_ES8326=m | |
| 791 | +CONFIG_SND_SOC_ES8328_I2C=m | |
| 792 | +CONFIG_SND_SOC_ES8328_SPI=m | |
| 793 | +CONFIG_SND_SOC_UDA1334=m | |
| 794 | +CONFIG_SND_SOC_UDA1342=m | |
| 730 | 795 | CONFIG_SND_VIRTIO=m |
| 731 | 796 | CONFIG_HIDRAW=y |
| 732 | 797 | CONFIG_UHID=m |
| 733 | 798 | CONFIG_HID_A4TECH=m |
| 734 | 799 | CONFIG_HID_CHERRY=m |
| 800 | +CONFIG_HID_ELAN=m | |
| 735 | 801 | CONFIG_HID_LOGITECH=m |
| 736 | 802 | CONFIG_HID_LOGITECH_DJ=m |
| 737 | 803 | CONFIG_LOGITECH_FF=y |
| @@ -740,7 +806,11 @@ CONFIG_LOGIG940_FF=y · 2 unmodified lines | ||
| 740 | 806 | CONFIG_HID_MICROSOFT=m |
| 741 | 807 | CONFIG_HID_MULTITOUCH=m |
| 742 | 808 | CONFIG_HID_SUNPLUS=m |
| 809 | +CONFIG_HID_WACOM=m | |
| 743 | 810 | CONFIG_USB_HIDDEV=y |
| 811 | +CONFIG_I2C_HID_ACPI=m | |
| 812 | +CONFIG_I2C_HID_OF=m | |
| 813 | +CONFIG_I2C_HID_OF_ELAN=m | |
| 744 | 814 | CONFIG_USB=y |
| 745 | 815 | CONFIG_USB_OTG=y |
| 746 | 816 | CONFIG_USB_MON=y |
| @@ -775,7 +845,7 @@ CONFIG_RTC_CLASS=y · 28 unmodified lines | ||
| 775 | 845 | CONFIG_RTC_DRV_EFI=y |
| 776 | 846 | CONFIG_RTC_DRV_LOONGSON=y |
| 777 | 847 | CONFIG_DMADEVICES=y |
| 778 | −CONFIG_LS2X_APB_DMA=y | |
| 848 | +CONFIG_LOONGSON2_APB_DMA=y | |
| 779 | 849 | CONFIG_UDMABUF=y |
| 780 | 850 | CONFIG_DMABUF_HEAPS=y |
| 781 | 851 | CONFIG_DMABUF_HEAPS_SYSTEM=y |
| @@ -852,6 +922,9 @@ CONFIG_F2FS_FS=m · 70 unmodified lines | ||
| 852 | 922 | CONFIG_F2FS_FS_SECURITY=y |
| 853 | 923 | CONFIG_F2FS_CHECK_FS=y |
| 854 | 924 | CONFIG_F2FS_FS_COMPRESSION=y |
| 925 | +CONFIG_FS_ENCRYPTION=y | |
| 926 | +CONFIG_FS_ENCRYPTION_INLINE_CRYPT=y | |
| 927 | +CONFIG_FS_VERITY=y | |
| 855 | 928 | CONFIG_FANOTIFY=y |
| 856 | 929 | CONFIG_FANOTIFY_ACCESS_PERMISSIONS=y |
| 857 | 930 | CONFIG_QUOTA=y |
| @@ -904,16 +977,14 @@ CONFIG_SQUASHFS_ZSTD=y · 46 unmodified lines | ||
| 904 | 977 | CONFIG_MINIX_FS=m |
| 905 | 978 | CONFIG_ROMFS_FS=m |
| 906 | 979 | CONFIG_PSTORE=m |
| 907 | −CONFIG_PSTORE_LZO_COMPRESS=m | |
| 908 | −CONFIG_PSTORE_LZ4_COMPRESS=m | |
| 909 | −CONFIG_PSTORE_LZ4HC_COMPRESS=m | |
| 910 | −CONFIG_PSTORE_842_COMPRESS=y | |
| 911 | −CONFIG_PSTORE_ZSTD_COMPRESS=y | |
| 912 | −CONFIG_PSTORE_ZSTD_COMPRESS_DEFAULT=y | |
| 980 | +CONFIG_PSTORE_COMPRESS=y | |
| 913 | 981 | CONFIG_SYSV_FS=m |
| 914 | 982 | CONFIG_UFS_FS=m |
| 915 | 983 | CONFIG_EROFS_FS=m |
| 916 | 984 | CONFIG_EROFS_FS_ZIP_LZMA=y |
| 985 | +CONFIG_EROFS_FS_ZIP_DEFLATE=y | |
| 986 | +CONFIG_EROFS_FS_ZIP_ZSTD=y | |
| 987 | +CONFIG_EROFS_FS_ONDEMAND=y | |
| 917 | 988 | CONFIG_EROFS_FS_PCPU_KTHREAD=y |
| 918 | 989 | CONFIG_NFS_FS=y |
| 919 | 990 | CONFIG_NFS_V3_ACL=y |
| @@ -24,6 +24,16 @@ static inline int prepare_hugepage_range(struct file *file, · 23 unmodified lines | ||
| 24 | 24 | return 0; |
| 25 | 25 | } |
| 26 | 26 | |
| 27 | +#define __HAVE_ARCH_HUGE_PTE_CLEAR | |
| 28 | +static inline void huge_pte_clear(struct mm_struct *mm, unsigned long addr, | |
| 29 | + pte_t *ptep, unsigned long sz) | |
| 30 | +{ | |
| 31 | + pte_t clear; | |
| 32 | + | |
| 33 | + pte_val(clear) = (unsigned long)invalid_pte_table; | |
| 34 | + set_pte_at(mm, addr, ptep, clear); | |
| 35 | +} | |
| 36 | + | |
| 27 | 37 | #define __HAVE_ARCH_HUGE_PTEP_GET_AND_CLEAR |
| 28 | 38 | static inline pte_t huge_ptep_get_and_clear(struct mm_struct *mm, |
| 29 | 39 | unsigned long addr, pte_t *ptep) |
| @@ -683,7 +683,17 @@ DEF_EMIT_REG2I16_FORMAT(blt, blt_op) · 682 unmodified lines | ||
| 683 | 683 | DEF_EMIT_REG2I16_FORMAT(bge, bge_op) |
| 684 | 684 | DEF_EMIT_REG2I16_FORMAT(bltu, bltu_op) |
| 685 | 685 | DEF_EMIT_REG2I16_FORMAT(bgeu, bgeu_op) |
| 686 | −DEF_EMIT_REG2I16_FORMAT(jirl, jirl_op) | |
| 686 | + | |
| 687 | +static inline void emit_jirl(union loongarch_instruction *insn, | |
| 688 | + enum loongarch_gpr rd, | |
| 689 | + enum loongarch_gpr rj, | |
| 690 | + int offset) | |
| 691 | +{ | |
| 692 | + insn->reg2i16_format.opcode = jirl_op; | |
| 693 | + insn->reg2i16_format.immediate = offset; | |
| 694 | + insn->reg2i16_format.rd = rd; | |
| 695 | + insn->reg2i16_format.rj = rj; | |
| 696 | +} | |
| 687 | 697 | |
| 688 | 698 | #define DEF_EMIT_REG2BSTRD_FORMAT(NAME, OP) \ |
| 689 | 699 | static inline void emit_##NAME(union loongarch_instruction *insn, \ |
| @@ -13,18 +13,22 @@ · 12 unmodified lines | ||
| 13 | 13 | |
| 14 | 14 | #define JUMP_LABEL_NOP_SIZE 4 |
| 15 | 15 | |
| 16 | −#define JUMP_TABLE_ENTRY \ | |
| 16 | +/* This macro is also expanded on the Rust side. */ | |
| 17 | +#define JUMP_TABLE_ENTRY(key, label) \ | |
| 17 | 18 | ".pushsection __jump_table, \"aw\" \n\t" \ |
| 18 | 19 | ".align 3 \n\t" \ |
| 19 | − ".long 1b - ., %l[l_yes] - . \n\t" \ | |
| 20 | − ".quad %0 - . \n\t" \ | |
| 20 | + ".long 1b - ., " label " - . \n\t" \ | |
| 21 | + ".quad " key " - . \n\t" \ | |
| 21 | 22 | ".popsection \n\t" |
| 22 | 23 | |
| 24 | +#define ARCH_STATIC_BRANCH_ASM(key, label) \ | |
| 25 | + "1: nop \n\t" \ | |
| 26 | + JUMP_TABLE_ENTRY(key, label) | |
| 27 | + | |
| 23 | 28 | static __always_inline bool arch_static_branch(struct static_key * const key, const bool branch) |
| 24 | 29 | { |
| 25 | 30 | asm goto( |
| 26 | − "1: nop \n\t" | |
| 27 | − JUMP_TABLE_ENTRY | |
| 31 | + ARCH_STATIC_BRANCH_ASM("%0", "%l[l_yes]") | |
| 28 | 32 | : : "i"(&((char *)key)[branch]) : : l_yes); |
| 29 | 33 | |
| 30 | 34 | return false; |
| @@ -37,7 +41,7 @@ static __always_inline bool arch_static_branch_jump(struct static_key * const ke · 6 unmodified lines | ||
| 37 | 41 | { |
| 38 | 42 | asm goto( |
| 39 | 43 | "1: b %l[l_yes] \n\t" |
| 40 | − JUMP_TABLE_ENTRY | |
| 44 | + JUMP_TABLE_ENTRY("%0", "%l[l_yes]") | |
| 41 | 45 | : : "i"(&((char *)key)[branch]) : : l_yes); |
| 42 | 46 | |
| 43 | 47 | return false; |
| @@ -66,8 +66,9 @@ register unsigned long current_stack_pointer __asm__("$sp"); · 65 unmodified lines | ||
| 66 | 66 | * - pending work-to-be-done flags are in LSW |
| 67 | 67 | * - other flags in MSW |
| 68 | 68 | */ |
| 69 | −#define TIF_SIGPENDING 1 /* signal pending */ | |
| 70 | −#define TIF_NEED_RESCHED 2 /* rescheduling necessary */ | |
| 69 | +#define TIF_NEED_RESCHED 0 /* rescheduling necessary */ | |
| 70 | +#define TIF_NEED_RESCHED_LAZY 1 /* lazy rescheduling necessary */ | |
| 71 | +#define TIF_SIGPENDING 2 /* signal pending */ | |
| 71 | 72 | #define TIF_NOTIFY_RESUME 3 /* callback before returning to user */ |
| 72 | 73 | #define TIF_NOTIFY_SIGNAL 4 /* signal notifications exist */ |
| 73 | 74 | #define TIF_RESTORE_SIGMASK 5 /* restore signal mask in do_signal() */ |
| @@ -88,8 +89,9 @@ register unsigned long current_stack_pointer __asm__("$sp"); · 14 unmodified lines | ||
| 88 | 89 | #define TIF_LBT_CTX_LIVE 20 /* LBT context must be preserved */ |
| 89 | 90 | #define TIF_PATCH_PENDING 21 /* pending live patching update */ |
| 90 | 91 | |
| 91 | −#define _TIF_SIGPENDING (1<<TIF_SIGPENDING) | |
| 92 | 92 | #define _TIF_NEED_RESCHED (1<<TIF_NEED_RESCHED) |
| 93 | +#define _TIF_NEED_RESCHED_LAZY (1<<TIF_NEED_RESCHED_LAZY) | |
| 94 | +#define _TIF_SIGPENDING (1<<TIF_SIGPENDING) | |
| 93 | 95 | #define _TIF_NOTIFY_RESUME (1<<TIF_NOTIFY_RESUME) |
| 94 | 96 | #define _TIF_NOTIFY_SIGNAL (1<<TIF_NOTIFY_SIGNAL) |
| 95 | 97 | #define _TIF_NOHZ (1<<TIF_NOHZ) |
| @@ -95,7 +95,7 @@ static void __init init_screen_info(void) · 94 unmodified lines | ||
| 95 | 95 | memset(si, 0, sizeof(*si)); |
| 96 | 96 | early_memunmap(si, sizeof(*si)); |
| 97 | 97 | |
| 98 | − memblock_reserve(screen_info.lfb_base, screen_info.lfb_size); | |
| 98 | + memblock_reserve(__screen_info_lfb_base(&screen_info), screen_info.lfb_size); | |
| 99 | 99 | } |
| 100 | 100 | |
| 101 | 101 | void __init efi_init(void) |
| @@ -332,7 +332,7 @@ u32 larch_insn_gen_jirl(enum loongarch_gpr rd, enum loongarch_gpr rj, int imm) · 331 unmodified lines | ||
| 332 | 332 | return INSN_BREAK; |
| 333 | 333 | } |
| 334 | 334 | |
| 335 | − emit_jirl(&insn, rj, rd, imm >> 2); | |
| 335 | + emit_jirl(&insn, rd, rj, imm >> 2); | |
| 336 | 336 | |
| 337 | 337 | return insn.word; |
| 338 | 338 | } |
| @@ -82,7 +82,7 @@ void show_ipi_list(struct seq_file *p, int prec) · 81 unmodified lines | ||
| 82 | 82 | for (i = 0; i < NR_IPI; i++) { |
| 83 | 83 | seq_printf(p, "%*s%u:%s", prec - 1, "IPI", i, prec >= 4 ? " " : ""); |
| 84 | 84 | for_each_online_cpu(cpu) |
| 85 | − seq_printf(p, "%10u ", per_cpu(irq_stat, cpu).ipi_irqs[i]); | |
| 85 | + seq_put_decimal_ull_width(p, " ", per_cpu(irq_stat, cpu).ipi_irqs[i], 10); | |
| 86 | 86 | seq_printf(p, " LoongArch %d %s\n", i + 1, ipi_types[i]); |
| 87 | 87 | } |
| 88 | 88 | } |
| @@ -127,7 +127,11 @@ void sync_counter(void) · 126 unmodified lines | ||
| 127 | 127 | int constant_clockevent_init(void) |
| 128 | 128 | { |
| 129 | 129 | unsigned int cpu = smp_processor_id(); |
| 130 | − unsigned long min_delta = 0x600; | |
| 130 | +#ifdef CONFIG_PREEMPT_RT | |
| 131 | + unsigned long min_delta = 100; | |
| 132 | +#else | |
| 133 | + unsigned long min_delta = 1000; | |
| 134 | +#endif | |
| 131 | 135 | unsigned long max_delta = (1UL << 48) - 1; |
| 132 | 136 | struct clock_event_device *cd; |
| 133 | 137 | static int irq = 0, timer_irq_installed = 0; |
| @@ -156,7 +156,7 @@ static int kvm_handle_csr(struct kvm_vcpu *vcpu, larch_inst inst) · 155 unmodified lines | ||
| 156 | 156 | |
| 157 | 157 | int kvm_emu_iocsr(larch_inst inst, struct kvm_run *run, struct kvm_vcpu *vcpu) |
| 158 | 158 | { |
| 159 | − int ret; | |
| 159 | + int idx, ret; | |
| 160 | 160 | unsigned long *val; |
| 161 | 161 | u32 addr, rd, rj, opcode; |
| 162 | 162 | |
| @@ -167,7 +167,6 @@ int kvm_emu_iocsr(larch_inst inst, struct kvm_run *run, struct kvm_vcpu *vcpu) · 4 unmodified lines | ||
| 167 | 167 | rj = inst.reg2_format.rj; |
| 168 | 168 | opcode = inst.reg2_format.opcode; |
| 169 | 169 | addr = vcpu->arch.gprs[rj]; |
| 170 | − ret = EMULATE_DO_IOCSR; | |
| 171 | 170 | run->iocsr_io.phys_addr = addr; |
| 172 | 171 | run->iocsr_io.is_write = 0; |
| 173 | 172 | val = &vcpu->arch.gprs[rd]; |
| @@ -207,20 +206,28 @@ int kvm_emu_iocsr(larch_inst inst, struct kvm_run *run, struct kvm_vcpu *vcpu) · 33 unmodified lines | ||
| 207 | 206 | } |
| 208 | 207 | |
| 209 | 208 | if (run->iocsr_io.is_write) { |
| 210 | − if (!kvm_io_bus_write(vcpu, KVM_IOCSR_BUS, addr, run->iocsr_io.len, val)) | |
| 209 | + idx = srcu_read_lock(&vcpu->kvm->srcu); | |
| 210 | + ret = kvm_io_bus_write(vcpu, KVM_IOCSR_BUS, addr, run->iocsr_io.len, val); | |
| 211 | + srcu_read_unlock(&vcpu->kvm->srcu, idx); | |
| 212 | + if (ret == 0) | |
| 211 | 213 | ret = EMULATE_DONE; |
| 212 | − else | |
| 214 | + else { | |
| 215 | + ret = EMULATE_DO_IOCSR; | |
| 213 | 216 | /* Save data and let user space to write it */ |
| 214 | 217 | memcpy(run->iocsr_io.data, val, run->iocsr_io.len); |
| 215 | − | |
| 218 | + } | |
| 216 | 219 | trace_kvm_iocsr(KVM_TRACE_IOCSR_WRITE, run->iocsr_io.len, addr, val); |
| 217 | 220 | } else { |
| 218 | − if (!kvm_io_bus_read(vcpu, KVM_IOCSR_BUS, addr, run->iocsr_io.len, val)) | |
| 221 | + idx = srcu_read_lock(&vcpu->kvm->srcu); | |
| 222 | + ret = kvm_io_bus_read(vcpu, KVM_IOCSR_BUS, addr, run->iocsr_io.len, val); | |
| 223 | + srcu_read_unlock(&vcpu->kvm->srcu, idx); | |
| 224 | + if (ret == 0) | |
| 219 | 225 | ret = EMULATE_DONE; |
| 220 | − else | |
| 226 | + else { | |
| 227 | + ret = EMULATE_DO_IOCSR; | |
| 221 | 228 | /* Save register id for iocsr read completion */ |
| 222 | 229 | vcpu->arch.io_gpr = rd; |
| 223 | − | |
| 230 | + } | |
| 224 | 231 | trace_kvm_iocsr(KVM_TRACE_IOCSR_READ, run->iocsr_io.len, addr, NULL); |
| 225 | 232 | } |
| 226 | 233 | |
| @@ -359,7 +366,7 @@ static int kvm_handle_gspr(struct kvm_vcpu *vcpu) · 132 unmodified lines | ||
| 359 | 366 | |
| 360 | 367 | int kvm_emu_mmio_read(struct kvm_vcpu *vcpu, larch_inst inst) |
| 361 | 368 | { |
| 362 | − int ret; | |
| 369 | + int idx, ret; | |
| 363 | 370 | unsigned int op8, opcode, rd; |
| 364 | 371 | struct kvm_run *run = vcpu->run; |
| 365 | 372 | |
| @@ -464,8 +471,10 @@ int kvm_emu_mmio_read(struct kvm_vcpu *vcpu, larch_inst inst) · 98 unmodified lines | ||
| 464 | 471 | * it need not return to user space to handle the mmio |
| 465 | 472 | * exception. |
| 466 | 473 | */ |
| 474 | + idx = srcu_read_lock(&vcpu->kvm->srcu); | |
| 467 | 475 | ret = kvm_io_bus_read(vcpu, KVM_MMIO_BUS, vcpu->arch.badv, |
| 468 | 476 | run->mmio.len, &vcpu->arch.gprs[rd]); |
| 477 | + srcu_read_unlock(&vcpu->kvm->srcu, idx); | |
| 469 | 478 | if (!ret) { |
| 470 | 479 | update_pc(&vcpu->arch); |
| 471 | 480 | vcpu->mmio_needed = 0; |
| @@ -531,7 +540,7 @@ int kvm_complete_mmio_read(struct kvm_vcpu *vcpu, struct kvm_run *run) · 59 unmodified lines | ||
| 531 | 540 | |
| 532 | 541 | int kvm_emu_mmio_write(struct kvm_vcpu *vcpu, larch_inst inst) |
| 533 | 542 | { |
| 534 | − int ret; | |
| 543 | + int idx, ret; | |
| 535 | 544 | unsigned int rd, op8, opcode; |
| 536 | 545 | unsigned long curr_pc, rd_val = 0; |
| 537 | 546 | struct kvm_run *run = vcpu->run; |
| @@ -631,7 +640,9 @@ int kvm_emu_mmio_write(struct kvm_vcpu *vcpu, larch_inst inst) · 93 unmodified lines | ||
| 631 | 640 | * it need not return to user space to handle the mmio |
| 632 | 641 | * exception. |
| 633 | 642 | */ |
| 643 | + idx = srcu_read_lock(&vcpu->kvm->srcu); | |
| 634 | 644 | ret = kvm_io_bus_write(vcpu, KVM_MMIO_BUS, vcpu->arch.badv, run->mmio.len, data); |
| 645 | + srcu_read_unlock(&vcpu->kvm->srcu, idx); | |
| 635 | 646 | if (!ret) |
| 636 | 647 | return EMULATE_DONE; |
| 637 | 648 | |
| @@ -98,7 +98,7 @@ static void write_mailbox(struct kvm_vcpu *vcpu, int offset, uint64_t data, int · 97 unmodified lines | ||
| 98 | 98 | |
| 99 | 99 | static int send_ipi_data(struct kvm_vcpu *vcpu, gpa_t addr, uint64_t data) |
| 100 | 100 | { |
| 101 | − int i, ret; | |
| 101 | + int i, idx, ret; | |
| 102 | 102 | uint32_t val = 0, mask = 0; |
| 103 | 103 | |
| 104 | 104 | /* |
| @@ -107,7 +107,9 @@ static int send_ipi_data(struct kvm_vcpu *vcpu, gpa_t addr, uint64_t data) · 2 unmodified lines | ||
| 107 | 107 | */ |
| 108 | 108 | if ((data >> 27) & 0xf) { |
| 109 | 109 | /* Read the old val */ |
| 110 | + idx = srcu_read_lock(&vcpu->kvm->srcu); | |
| 110 | 111 | ret = kvm_io_bus_read(vcpu, KVM_IOCSR_BUS, addr, sizeof(val), &val); |
| 112 | + srcu_read_unlock(&vcpu->kvm->srcu, idx); | |
| 111 | 113 | if (unlikely(ret)) { |
| 112 | 114 | kvm_err("%s: : read date from addr %llx failed\n", __func__, addr); |
| 113 | 115 | return ret; |
| @@ -121,7 +123,9 @@ static int send_ipi_data(struct kvm_vcpu *vcpu, gpa_t addr, uint64_t data) · 7 unmodified lines | ||
| 121 | 123 | val &= mask; |
| 122 | 124 | } |
| 123 | 125 | val |= ((uint32_t)(data >> 32) & ~mask); |
| 126 | + idx = srcu_read_lock(&vcpu->kvm->srcu); | |
| 124 | 127 | ret = kvm_io_bus_write(vcpu, KVM_IOCSR_BUS, addr, sizeof(val), &val); |
| 128 | + srcu_read_unlock(&vcpu->kvm->srcu, idx); | |
| 125 | 129 | if (unlikely(ret)) |
| 126 | 130 | kvm_err("%s: : write date to addr %llx failed\n", __func__, addr); |
| 127 | 131 | |
| @@ -240,7 +240,7 @@ static void kvm_late_check_requests(struct kvm_vcpu *vcpu) · 239 unmodified lines | ||
| 240 | 240 | */ |
| 241 | 241 | static int kvm_enter_guest_check(struct kvm_vcpu *vcpu) |
| 242 | 242 | { |
| 243 | − int ret; | |
| 243 | + int idx, ret; | |
| 244 | 244 | |
| 245 | 245 | /* |
| 246 | 246 | * Check conditions before entering the guest |
| @@ -249,7 +249,9 @@ static int kvm_enter_guest_check(struct kvm_vcpu *vcpu) · 2 unmodified lines | ||
| 249 | 249 | if (ret < 0) |
| 250 | 250 | return ret; |
| 251 | 251 | |
| 252 | + idx = srcu_read_lock(&vcpu->kvm->srcu); | |
| 252 | 253 | ret = kvm_check_requests(vcpu); |
| 254 | + srcu_read_unlock(&vcpu->kvm->srcu, idx); | |
| 253 | 255 | |
| 254 | 256 | return ret; |
| 255 | 257 | } |
| @@ -289,7 +289,7 @@ static void setup_tlb_handler(int cpu) · 288 unmodified lines | ||
| 289 | 289 | /* Avoid lockdep warning */ |
| 290 | 290 | rcutree_report_cpu_starting(cpu); |
| 291 | 291 | |
| 292 | −#ifdef CONFIG_NUMA | |
| 292 | +#if defined(CONFIG_NUMA) && !defined(CONFIG_PREEMPT_RT) | |
| 293 | 293 | vec_sz = sizeof(exception_handlers); |
| 294 | 294 | |
| 295 | 295 | if (pcpu_handlers[cpu]) |
| @@ -179,15 +179,15 @@ static void __build_epilogue(struct jit_ctx *ctx, bool is_tail_call) · 178 unmodified lines | ||
| 179 | 179 | |
| 180 | 180 | if (!is_tail_call) { |
| 181 | 181 | /* Set return value */ |
| 182 | − move_reg(ctx, LOONGARCH_GPR_A0, regmap[BPF_REG_0]); | |
| 182 | + emit_insn(ctx, addiw, LOONGARCH_GPR_A0, regmap[BPF_REG_0], 0); | |
| 183 | 183 | /* Return to the caller */ |
| 184 | − emit_insn(ctx, jirl, LOONGARCH_GPR_RA, LOONGARCH_GPR_ZERO, 0); | |
| 184 | + emit_insn(ctx, jirl, LOONGARCH_GPR_ZERO, LOONGARCH_GPR_RA, 0); | |
| 185 | 185 | } else { |
| 186 | 186 | /* |
| 187 | 187 | * Call the next bpf prog and skip the first instruction |
| 188 | 188 | * of TCC initialization. |
| 189 | 189 | */ |
| 190 | − emit_insn(ctx, jirl, LOONGARCH_GPR_T3, LOONGARCH_GPR_ZERO, 1); | |
| 190 | + emit_insn(ctx, jirl, LOONGARCH_GPR_ZERO, LOONGARCH_GPR_T3, 1); | |
| 191 | 191 | } |
| 192 | 192 | } |
| 193 | 193 | |
| @@ -904,7 +904,7 @@ static int build_insn(const struct bpf_insn *insn, struct jit_ctx *ctx, bool ext · 710 unmodified lines | ||
| 904 | 904 | return ret; |
| 905 | 905 | |
| 906 | 906 | move_addr(ctx, t1, func_addr); |
| 907 | − emit_insn(ctx, jirl, t1, LOONGARCH_GPR_RA, 0); | |
| 907 | + emit_insn(ctx, jirl, LOONGARCH_GPR_RA, t1, 0); | |
| 908 | 908 | move_reg(ctx, regmap[BPF_REG_0], LOONGARCH_GPR_A0); |
| 909 | 909 | break; |
| 910 | 910 | |
| @@ -19,7 +19,7 @@ ccflags-vdso := \ · 18 unmodified lines | ||
| 19 | 19 | cflags-vdso := $(ccflags-vdso) \ |
| 20 | 20 | -isystem $(shell $(CC) -print-file-name=include) \ |
| 21 | 21 | $(filter -W%,$(filter-out -Wa$(comma)%,$(KBUILD_CFLAGS))) \ |
| 22 | − -O2 -g -fno-strict-aliasing -fno-common -fno-builtin \ | |
| 22 | + -std=gnu11 -O2 -g -fno-strict-aliasing -fno-common -fno-builtin \ | |
| 23 | 23 | -fno-stack-protector -fno-jump-tables -DDISABLE_BRANCH_PROFILING \ |
| 24 | 24 | $(call cc-option, -fno-asynchronous-unwind-tables) \ |
| 25 | 25 | $(call cc-option, -fno-stack-protector) |
| @@ -93,7 +93,7 @@ static struct platform_device mcf_uart = { · 92 unmodified lines | ||
| 93 | 93 | .dev.platform_data = mcf_uart_platform_data, |
| 94 | 94 | }; |
| 95 | 95 | |
| 96 | −#if IS_ENABLED(CONFIG_FEC) | |
| 96 | +#ifdef MCFFEC_BASE0 | |
| 97 | 97 | |
| 98 | 98 | #ifdef CONFIG_M5441x |
| 99 | 99 | #define FEC_NAME "enet-fec" |
| @@ -145,6 +145,7 @@ static struct platform_device mcf_fec0 = { · 45 unmodified lines | ||
| 145 | 145 | .platform_data = FEC_PDATA, |
| 146 | 146 | } |
| 147 | 147 | }; |
| 148 | +#endif /* MCFFEC_BASE0 */ | |
| 148 | 149 | |
| 149 | 150 | #ifdef MCFFEC_BASE1 |
| 150 | 151 | static struct resource mcf_fec1_resources[] = { |
| @@ -182,7 +183,6 @@ static struct platform_device mcf_fec1 = { · 31 unmodified lines | ||
| 182 | 183 | } |
| 183 | 184 | }; |
| 184 | 185 | #endif /* MCFFEC_BASE1 */ |
| 185 | −#endif /* CONFIG_FEC */ | |
| 186 | 186 | |
| 187 | 187 | #if IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI) |
| 188 | 188 | /* |
| @@ -624,12 +624,12 @@ static struct platform_device mcf_flexcan0 = { · 435 unmodified lines | ||
| 624 | 624 | |
| 625 | 625 | static struct platform_device *mcf_devices[] __initdata = { |
| 626 | 626 | &mcf_uart, |
| 627 | −#if IS_ENABLED(CONFIG_FEC) | |
| 627 | +#ifdef MCFFEC_BASE0 | |
| 628 | 628 | &mcf_fec0, |
| 629 | +#endif | |
| 629 | 630 | #ifdef MCFFEC_BASE1 |
| 630 | 631 | &mcf_fec1, |
| 631 | 632 | #endif |
| 632 | −#endif | |
| 633 | 633 | #if IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI) |
| 634 | 634 | &mcf_qspi, |
| 635 | 635 | #endif |
| @@ -503,6 +503,7 @@ CONFIG_UHID=m · 502 unmodified lines | ||
| 503 | 503 | # CONFIG_USB_SUPPORT is not set |
| 504 | 504 | CONFIG_RTC_CLASS=y |
| 505 | 505 | # CONFIG_RTC_NVMEM is not set |
| 506 | +CONFIG_RTC_DRV_M48T59=m | |
| 506 | 507 | CONFIG_RTC_DRV_MSM6242=m |
| 507 | 508 | CONFIG_RTC_DRV_RP5C01=m |
| 508 | 509 | CONFIG_RTC_DRV_GENERIC=m |
| @@ -391,6 +391,7 @@ CONFIG_UHID=m · 390 unmodified lines | ||
| 391 | 391 | # CONFIG_USB_SUPPORT is not set |
| 392 | 392 | CONFIG_RTC_CLASS=y |
| 393 | 393 | # CONFIG_RTC_NVMEM is not set |
| 394 | +CONFIG_RTC_DRV_M48T59=y | |
| 394 | 395 | CONFIG_RTC_DRV_GENERIC=m |
| 395 | 396 | # CONFIG_VIRTIO_MENU is not set |
| 396 | 397 | # CONFIG_VHOST_MENU is not set |
| @@ -392,6 +392,7 @@ CONFIG_UHID=m · 391 unmodified lines | ||
| 392 | 392 | # CONFIG_USB_SUPPORT is not set |
| 393 | 393 | CONFIG_RTC_CLASS=y |
| 394 | 394 | # CONFIG_RTC_NVMEM is not set |
| 395 | +CONFIG_RTC_DRV_M48T59=y | |
| 395 | 396 | CONFIG_RTC_DRV_GENERIC=m |
| 396 | 397 | # CONFIG_VIRTIO_MENU is not set |
| 397 | 398 | # CONFIG_VHOST_MENU is not set |
| @@ -136,7 +136,7 @@ static inline void gpio_free(unsigned gpio) · 135 unmodified lines | ||
| 136 | 136 | * read-modify-write as well as those controlled by the EPORT and GPIO modules. |
| 137 | 137 | */ |
| 138 | 138 | #define MCFGPIO_SCR_START 40 |
| 139 | −#elif defined(CONFIGM5441x) | |
| 139 | +#elif defined(CONFIG_M5441x) | |
| 140 | 140 | /* The m5441x EPORT doesn't have its own GPIO port, uses PORT C */ |
| 141 | 141 | #define MCFGPIO_SCR_START 0 |
| 142 | 142 | #else |
| @@ -4,24 +4,7 @@ · 3 unmodified lines | ||
| 4 | 4 | |
| 5 | 5 | #include <asm/irq.h> |
| 6 | 6 | |
| 7 | −typedef struct { | |
| 8 | − unsigned char | |
| 9 | − ctrl, | |
| 10 | − bcd_sec, | |
| 11 | − bcd_min, | |
| 12 | − bcd_hr, | |
| 13 | − bcd_dow, | |
| 14 | − bcd_dom, | |
| 15 | − bcd_mth, | |
| 16 | − bcd_year; | |
| 17 | −} MK48T02; | |
| 18 | − | |
| 19 | −#define RTC_WRITE 0x80 | |
| 20 | −#define RTC_READ 0x40 | |
| 21 | −#define RTC_STOP 0x20 | |
| 22 | − | |
| 23 | −#define m147_rtc ((MK48T02 * volatile)0xfffe07f8) | |
| 24 | − | |
| 7 | +#define MVME147_RTC_BASE 0xfffe0000 | |
| 25 | 8 | |
| 26 | 9 | struct pcc_regs { |
| 27 | 10 | volatile u_long dma_tadr; |
| @@ -24,23 +24,7 @@ typedef struct { · 23 unmodified lines | ||
| 24 | 24 | |
| 25 | 25 | #define mvmelp ((*(volatile MVMElpPtr)(MVME_LPR_BASE))) |
| 26 | 26 | |
| 27 | −typedef struct { | |
| 28 | − unsigned char | |
| 29 | − ctrl, | |
| 30 | − bcd_sec, | |
| 31 | − bcd_min, | |
| 32 | − bcd_hr, | |
| 33 | − bcd_dow, | |
| 34 | − bcd_dom, | |
| 35 | − bcd_mth, | |
| 36 | − bcd_year; | |
| 37 | −} MK48T08_t, *MK48T08ptr_t; | |
| 38 | − | |
| 39 | −#define RTC_WRITE 0x80 | |
| 40 | −#define RTC_READ 0x40 | |
| 41 | −#define RTC_STOP 0x20 | |
| 42 | − | |
| 43 | −#define MVME_RTC_BASE 0xfffc1ff8 | |
| 27 | +#define MVME_RTC_BASE 0xfffc0000 | |
| 44 | 28 | |
| 45 | 29 | #define MVME_I596_BASE 0xfff46000 |
| 46 | 30 | |
| @@ -19,8 +19,9 @@ · 18 unmodified lines | ||
| 19 | 19 | #include <linux/linkage.h> |
| 20 | 20 | #include <linux/init.h> |
| 21 | 21 | #include <linux/major.h> |
| 22 | −#include <linux/rtc.h> | |
| 23 | 22 | #include <linux/interrupt.h> |
| 23 | +#include <linux/platform_device.h> | |
| 24 | +#include <linux/rtc/m48t59.h> | |
| 24 | 25 | |
| 25 | 26 | #include <asm/bootinfo.h> |
| 26 | 27 | #include <asm/bootinfo-vme.h> |
| @@ -36,13 +37,9 @@ · 9 unmodified lines | ||
| 36 | 37 | |
| 37 | 38 | static void mvme147_get_model(char *model); |
| 38 | 39 | static void __init mvme147_sched_init(void); |
| 39 | −extern int mvme147_hwclk (int, struct rtc_time *); | |
| 40 | 40 | extern void mvme147_reset (void); |
| 41 | 41 | |
| 42 | 42 | |
| 43 | −static int bcd2int (unsigned char b); | |
| 44 | − | |
| 45 | − | |
| 46 | 43 | int __init mvme147_parse_bootinfo(const struct bi_record *bi) |
| 47 | 44 | { |
| 48 | 45 | uint16_t tag = be16_to_cpu(bi->tag); |
| @@ -80,7 +77,6 @@ void __init config_mvme147(void) · 31 unmodified lines | ||
| 80 | 77 | { |
| 81 | 78 | mach_sched_init = mvme147_sched_init; |
| 82 | 79 | mach_init_IRQ = mvme147_init_IRQ; |
| 83 | − mach_hwclk = mvme147_hwclk; | |
| 84 | 80 | mach_reset = mvme147_reset; |
| 85 | 81 | mach_get_model = mvme147_get_model; |
| 86 | 82 | |
| @@ -89,6 +85,28 @@ void __init config_mvme147(void) · 2 unmodified lines | ||
| 89 | 85 | vme_brdtype = VME_TYPE_MVME147; |
| 90 | 86 | } |
| 91 | 87 | |
| 88 | +static struct resource m48t59_rsrc[] = { | |
| 89 | + DEFINE_RES_MEM(MVME147_RTC_BASE, 0x800), | |
| 90 | +}; | |
| 91 | + | |
| 92 | +static struct m48t59_plat_data m48t59_data = { | |
| 93 | + .type = M48T59RTC_TYPE_M48T02, | |
| 94 | + .yy_offset = 70, | |
| 95 | +}; | |
| 96 | + | |
| 97 | +static int __init mvme147_platform_init(void) | |
| 98 | +{ | |
| 99 | + if (!MACH_IS_MVME147) | |
| 100 | + return 0; | |
| 101 | + | |
| 102 | + platform_device_register_resndata(NULL, "rtc-m48t59", -1, | |
| 103 | + m48t59_rsrc, ARRAY_SIZE(m48t59_rsrc), | |
| 104 | + &m48t59_data, sizeof(m48t59_data)); | |
| 105 | + return 0; | |
| 106 | +} | |
| 107 | + | |
| 108 | +arch_initcall(mvme147_platform_init); | |
| 109 | + | |
| 92 | 110 | static u64 mvme147_read_clk(struct clocksource *cs); |
| 93 | 111 | |
| 94 | 112 | static struct clocksource mvme147_clk = { |
| @@ -162,31 +180,6 @@ static u64 mvme147_read_clk(struct clocksource *cs) · 67 unmodified lines | ||
| 162 | 180 | return ticks; |
| 163 | 181 | } |
| 164 | 182 | |
| 165 | −static int bcd2int (unsigned char b) | |
| 166 | −{ | |
| 167 | − return ((b>>4)*10 + (b&15)); | |
| 168 | −} | |
| 169 | − | |
| 170 | −int mvme147_hwclk(int op, struct rtc_time *t) | |
| 171 | −{ | |
| 172 | − if (!op) { | |
| 173 | − m147_rtc->ctrl = RTC_READ; | |
| 174 | − t->tm_year = bcd2int (m147_rtc->bcd_year); | |
| 175 | − t->tm_mon = bcd2int(m147_rtc->bcd_mth) - 1; | |
| 176 | − t->tm_mday = bcd2int (m147_rtc->bcd_dom); | |
| 177 | − t->tm_hour = bcd2int (m147_rtc->bcd_hr); | |
| 178 | − t->tm_min = bcd2int (m147_rtc->bcd_min); | |
| 179 | − t->tm_sec = bcd2int (m147_rtc->bcd_sec); | |
| 180 | − m147_rtc->ctrl = 0; | |
| 181 | − if (t->tm_year < 70) | |
| 182 | − t->tm_year += 100; | |
| 183 | − } else { | |
| 184 | − /* FIXME Setting the time is not yet supported */ | |
| 185 | − return -EOPNOTSUPP; | |
| 186 | − } | |
| 187 | − return 0; | |
| 188 | −} | |
| 189 | − | |
| 190 | 183 | static void scc_delay(void) |
| 191 | 184 | { |
| 192 | 185 | __asm__ __volatile__ ("nop; nop;"); |
| @@ -3,4 +3,4 @@ · 2 unmodified lines | ||
| 3 | 3 | # Makefile for Linux arch/m68k/mvme16x source directory |
| 4 | 4 | # |
| 5 | 5 | |
| 6 | −obj-y := config.o rtc.o | |
| 6 | +obj-y := config.o | |
| @@ -21,9 +21,10 @@ · 20 unmodified lines | ||
| 21 | 21 | #include <linux/linkage.h> |
| 22 | 22 | #include <linux/init.h> |
| 23 | 23 | #include <linux/major.h> |
| 24 | −#include <linux/rtc.h> | |
| 25 | 24 | #include <linux/interrupt.h> |
| 26 | 25 | #include <linux/module.h> |
| 26 | +#include <linux/platform_device.h> | |
| 27 | +#include <linux/rtc/m48t59.h> | |
| 27 | 28 | |
| 28 | 29 | #include <asm/bootinfo.h> |
| 29 | 30 | #include <asm/bootinfo-vme.h> |
| @@ -39,16 +40,10 @@ · 9 unmodified lines | ||
| 39 | 40 | |
| 40 | 41 | extern t_bdid mvme_bdid; |
| 41 | 42 | |
| 42 | −static MK48T08ptr_t volatile rtc = (MK48T08ptr_t)MVME_RTC_BASE; | |
| 43 | − | |
| 44 | 43 | static void mvme16x_get_model(char *model); |
| 45 | 44 | extern void mvme16x_sched_init(void); |
| 46 | −extern int mvme16x_hwclk (int, struct rtc_time *); | |
| 47 | 45 | extern void mvme16x_reset (void); |
| 48 | 46 | |
| 49 | −int bcd2int (unsigned char b); | |
| 50 | − | |
| 51 | − | |
| 52 | 47 | unsigned short mvme16x_config; |
| 53 | 48 | EXPORT_SYMBOL(mvme16x_config); |
| 54 | 49 | |
| @@ -268,7 +263,6 @@ void __init config_mvme16x(void) · 213 unmodified lines | ||
| 268 | 263 | |
| 269 | 264 | mach_sched_init = mvme16x_sched_init; |
| 270 | 265 | mach_init_IRQ = mvme16x_init_IRQ; |
| 271 | − mach_hwclk = mvme16x_hwclk; | |
| 272 | 266 | mach_reset = mvme16x_reset; |
| 273 | 267 | mach_get_model = mvme16x_get_model; |
| 274 | 268 | mach_get_hardware_list = mvme16x_get_hardware_list; |
| @@ -312,6 +306,28 @@ void __init config_mvme16x(void) · 37 unmodified lines | ||
| 312 | 306 | } |
| 313 | 307 | } |
| 314 | 308 | |
| 309 | +static struct resource m48t59_rsrc[] = { | |
| 310 | + DEFINE_RES_MEM(MVME_RTC_BASE, 0x2000), | |
| 311 | +}; | |
| 312 | + | |
| 313 | +static struct m48t59_plat_data m48t59_data = { | |
| 314 | + .type = M48T59RTC_TYPE_M48T08, | |
| 315 | + .yy_offset = 70, | |
| 316 | +}; | |
| 317 | + | |
| 318 | +static int __init mvme16x_platform_init(void) | |
| 319 | +{ | |
| 320 | + if (!MACH_IS_MVME16x) | |
| 321 | + return 0; | |
| 322 | + | |
| 323 | + platform_device_register_resndata(NULL, "rtc-m48t59", -1, | |
| 324 | + m48t59_rsrc, ARRAY_SIZE(m48t59_rsrc), | |
| 325 | + &m48t59_data, sizeof(m48t59_data)); | |
| 326 | + return 0; | |
| 327 | +} | |
| 328 | + | |
| 329 | +arch_initcall(mvme16x_platform_init); | |
| 330 | + | |
| 315 | 331 | static irqreturn_t mvme16x_abort_int (int irq, void *dev_id) |
| 316 | 332 | { |
| 317 | 333 | unsigned long *new = (unsigned long *)vectors; |
| @@ -426,28 +442,3 @@ static u64 mvme16x_read_clk(struct clocksource *cs) · 108 unmodified lines | ||
| 426 | 442 | |
| 427 | 443 | return ticks; |
| 428 | 444 | } |
| 429 | − | |
| 430 | −int bcd2int (unsigned char b) | |
| 431 | −{ | |
| 432 | − return ((b>>4)*10 + (b&15)); | |
| 433 | −} | |
| 434 | − | |
| 435 | −int mvme16x_hwclk(int op, struct rtc_time *t) | |
| 436 | −{ | |
| 437 | − if (!op) { | |
| 438 | − rtc->ctrl = RTC_READ; | |
| 439 | − t->tm_year = bcd2int (rtc->bcd_year); | |
| 440 | − t->tm_mon = bcd2int(rtc->bcd_mth) - 1; | |
| 441 | − t->tm_mday = bcd2int (rtc->bcd_dom); | |
| 442 | − t->tm_hour = bcd2int (rtc->bcd_hr); | |
| 443 | − t->tm_min = bcd2int (rtc->bcd_min); | |
| 444 | − t->tm_sec = bcd2int (rtc->bcd_sec); | |
| 445 | − rtc->ctrl = 0; | |
| 446 | − if (t->tm_year < 70) | |
| 447 | − t->tm_year += 100; | |
| 448 | − } else { | |
| 449 | − /* FIXME Setting the time is not yet supported */ | |
| 450 | − return -EOPNOTSUPP; | |
| 451 | − } | |
| 452 | − return 0; | |
| 453 | −} | |
| @@ -1,165 +0,0 @@ | ||
| 1 | −// SPDX-License-Identifier: GPL-2.0 | |
| 2 | −/* | |
| 3 | − * Real Time Clock interface for Linux on the MVME16x | |
| 4 | − * | |
| 5 | − * Based on the PC driver by Paul Gortmaker. | |
| 6 | − */ | |
| 7 | − | |
| 8 | −#define RTC_VERSION "1.00" | |
| 9 | − | |
| 10 | −#include <linux/types.h> | |
| 11 | −#include <linux/errno.h> | |
| 12 | −#include <linux/miscdevice.h> | |
| 13 | −#include <linux/ioport.h> | |
| 14 | −#include <linux/capability.h> | |
| 15 | −#include <linux/fcntl.h> | |
| 16 | −#include <linux/init.h> | |
| 17 | −#include <linux/poll.h> | |
| 18 | −#include <linux/rtc.h> /* For struct rtc_time and ioctls, etc */ | |
| 19 | −#include <linux/bcd.h> | |
| 20 | −#include <asm/mvme16xhw.h> | |
| 21 | − | |
| 22 | −#include <asm/io.h> | |
| 23 | −#include <linux/uaccess.h> | |
| 24 | −#include <asm/setup.h> | |
| 25 | − | |
| 26 | −/* | |
| 27 | − * We sponge a minor off of the misc major. No need slurping | |
| 28 | − * up another valuable major dev number for this. If you add | |
| 29 | − * an ioctl, make sure you don't conflict with SPARC's RTC | |
| 30 | − * ioctls. | |
| 31 | − */ | |
| 32 | − | |
| 33 | −static const unsigned char days_in_mo[] = | |
| 34 | −{0, 31, 28, 31, 30, 31, 30, 31, 31, 30, 31, 30, 31}; | |
| 35 | − | |
| 36 | −static atomic_t rtc_ready = ATOMIC_INIT(1); | |
| 37 | − | |
| 38 | −static long rtc_ioctl(struct file *file, unsigned int cmd, unsigned long arg) | |
| 39 | −{ | |
| 40 | − volatile MK48T08ptr_t rtc = (MK48T08ptr_t)MVME_RTC_BASE; | |
| 41 | − unsigned long flags; | |
| 42 | − struct rtc_time wtime; | |
| 43 | − void __user *argp = (void __user *)arg; | |
| 44 | − | |
| 45 | − switch (cmd) { | |
| 46 | − case RTC_RD_TIME: /* Read the time/date from RTC */ | |
| 47 | − { | |
| 48 | − local_irq_save(flags); | |
| 49 | − /* Ensure clock and real-time-mode-register are accessible */ | |
| 50 | − rtc->ctrl = RTC_READ; | |
| 51 | − memset(&wtime, 0, sizeof(struct rtc_time)); | |
| 52 | − wtime.tm_sec = bcd2bin(rtc->bcd_sec); | |
| 53 | − wtime.tm_min = bcd2bin(rtc->bcd_min); | |
| 54 | − wtime.tm_hour = bcd2bin(rtc->bcd_hr); | |
| 55 | − wtime.tm_mday = bcd2bin(rtc->bcd_dom); | |
| 56 | − wtime.tm_mon = bcd2bin(rtc->bcd_mth)-1; | |
| 57 | − wtime.tm_year = bcd2bin(rtc->bcd_year); | |
| 58 | − if (wtime.tm_year < 70) | |
| 59 | − wtime.tm_year += 100; | |
| 60 | − wtime.tm_wday = bcd2bin(rtc->bcd_dow)-1; | |
| 61 | − rtc->ctrl = 0; | |
| 62 | − local_irq_restore(flags); | |
| 63 | − return copy_to_user(argp, &wtime, sizeof wtime) ? | |
| 64 | − -EFAULT : 0; | |
| 65 | − } | |
| 66 | − case RTC_SET_TIME: /* Set the RTC */ | |
| 67 | − { | |
| 68 | − struct rtc_time rtc_tm; | |
| 69 | − unsigned char mon, day, hrs, min, sec, leap_yr; | |
| 70 | − unsigned int yrs; | |
| 71 | − | |
| 72 | − if (!capable(CAP_SYS_ADMIN)) | |
| 73 | − return -EACCES; | |
| 74 | − | |
| 75 | − if (copy_from_user(&rtc_tm, argp, sizeof(struct rtc_time))) | |
| 76 | − return -EFAULT; | |
| 77 | − | |
| 78 | − yrs = rtc_tm.tm_year; | |
| 79 | − if (yrs < 1900) | |
| 80 | − yrs += 1900; | |
| 81 | − mon = rtc_tm.tm_mon + 1; /* tm_mon starts at zero */ | |
| 82 | − day = rtc_tm.tm_mday; | |
| 83 | − hrs = rtc_tm.tm_hour; | |
| 84 | − min = rtc_tm.tm_min; | |
| 85 | − sec = rtc_tm.tm_sec; | |
| 86 | − | |
| 87 | − leap_yr = ((!(yrs % 4) && (yrs % 100)) || !(yrs % 400)); | |
| 88 | − | |
| 89 | − if ((mon > 12) || (day == 0)) | |
| 90 | − return -EINVAL; | |
| 91 | − | |
| 92 | − if (day > (days_in_mo[mon] + ((mon == 2) && leap_yr))) | |
| 93 | − return -EINVAL; | |
| 94 | − | |
| 95 | − if ((hrs >= 24) || (min >= 60) || (sec >= 60)) | |
| 96 | − return -EINVAL; | |
| 97 | − | |
| 98 | − if (yrs >= 2070) | |
| 99 | − return -EINVAL; | |
| 100 | − | |
| 101 | − local_irq_save(flags); | |
| 102 | − rtc->ctrl = RTC_WRITE; | |
| 103 | − | |
| 104 | − rtc->bcd_sec = bin2bcd(sec); | |
| 105 | − rtc->bcd_min = bin2bcd(min); | |
| 106 | − rtc->bcd_hr = bin2bcd(hrs); | |
| 107 | − rtc->bcd_dom = bin2bcd(day); | |
| 108 | − rtc->bcd_mth = bin2bcd(mon); | |
| 109 | − rtc->bcd_year = bin2bcd(yrs%100); | |
| 110 | − | |
| 111 | − rtc->ctrl = 0; | |
| 112 | − local_irq_restore(flags); | |
| 113 | − return 0; | |
| 114 | − } | |
| 115 | − default: | |
| 116 | − return -EINVAL; | |
| 117 | − } | |
| 118 | −} | |
| 119 | − | |
| 120 | −/* | |
| 121 | − * We enforce only one user at a time here with the open/close. | |
| 122 | − */ | |
| 123 | −static int rtc_open(struct inode *inode, struct file *file) | |
| 124 | −{ | |
| 125 | − if( !atomic_dec_and_test(&rtc_ready) ) | |
| 126 | − { | |
| 127 | − atomic_inc( &rtc_ready ); | |
| 128 | − return -EBUSY; | |
| 129 | − } | |
| 130 | − return 0; | |
| 131 | −} | |
| 132 | − | |
| 133 | −static int rtc_release(struct inode *inode, struct file *file) | |
| 134 | −{ | |
| 135 | − atomic_inc( &rtc_ready ); | |
| 136 | − return 0; | |
| 137 | −} | |
| 138 | − | |
| 139 | −/* | |
| 140 | − * The various file operations we support. | |
| 141 | − */ | |
| 142 | − | |
| 143 | −static const struct file_operations rtc_fops = { | |
| 144 | − .unlocked_ioctl = rtc_ioctl, | |
| 145 | − .open = rtc_open, | |
| 146 | − .release = rtc_release, | |
| 147 | − .llseek = noop_llseek, | |
| 148 | −}; | |
| 149 | − | |
| 150 | −static struct miscdevice rtc_dev= | |
| 151 | −{ | |
| 152 | − .minor = RTC_MINOR, | |
| 153 | − .name = "rtc", | |
| 154 | − .fops = &rtc_fops | |
| 155 | −}; | |
| 156 | − | |
| 157 | −static int __init rtc_MK48T08_init(void) | |
| 158 | −{ | |
| 159 | − if (!MACH_IS_MVME16x) | |
| 160 | − return -ENODEV; | |
| 161 | − | |
| 162 | − pr_info("MK48T08 Real Time Clock Driver v%s\n", RTC_VERSION); | |
| 163 | − return misc_register(&rtc_dev); | |
| 164 | −} | |
| 165 | −device_initcall(rtc_MK48T08_init); | |
| @@ -70,7 +70,6 @@ · 69 unmodified lines | ||
| 70 | 70 | device_type = "pci"; |
| 71 | 71 | #address-cells = <3>; |
| 72 | 72 | #size-cells = <2>; |
| 73 | − #interrupt-cells = <2>; | |
| 74 | 73 | msi-parent = <&msi>; |
| 75 | 74 | |
| 76 | 75 | reg = <0 0x1a000000 0 0x02000000>, |
| @@ -234,7 +233,7 @@ · 157 unmodified lines | ||
| 234 | 233 | }; |
| 235 | 234 | }; |
| 236 | 235 | |
| 237 | − pci_bridge@9,0 { | |
| 236 | + pcie@9,0 { | |
| 238 | 237 | compatible = "pci0014,7a19.1", |
| 239 | 238 | "pci0014,7a19", |
| 240 | 239 | "pciclass060400", |
| @@ -244,12 +243,16 @@ · 3 unmodified lines | ||
| 244 | 243 | interrupts = <32 IRQ_TYPE_LEVEL_HIGH>; |
| 245 | 244 | interrupt-parent = <&pic>; |
| 246 | 245 | |
| 246 | + #address-cells = <3>; | |
| 247 | + #size-cells = <2>; | |
| 248 | + device_type = "pci"; | |
| 247 | 249 | #interrupt-cells = <1>; |
| 248 | 250 | interrupt-map-mask = <0 0 0 0>; |
| 249 | 251 | interrupt-map = <0 0 0 0 &pic 32 IRQ_TYPE_LEVEL_HIGH>; |
| 252 | + ranges; | |
| 250 | 253 | }; |
| 251 | 254 | |
| 252 | − pci_bridge@a,0 { | |
| 255 | + pcie@a,0 { | |
| 253 | 256 | compatible = "pci0014,7a09.1", |
| 254 | 257 | "pci0014,7a09", |
| 255 | 258 | "pciclass060400", |
| @@ -259,12 +262,16 @@ · 3 unmodified lines | ||
| 259 | 262 | interrupts = <33 IRQ_TYPE_LEVEL_HIGH>; |
| 260 | 263 | interrupt-parent = <&pic>; |
| 261 | 264 | |
| 265 | + #address-cells = <3>; | |
| 266 | + #size-cells = <2>; | |
| 267 | + device_type = "pci"; | |
| 262 | 268 | #interrupt-cells = <1>; |
| 263 | 269 | interrupt-map-mask = <0 0 0 0>; |
| 264 | 270 | interrupt-map = <0 0 0 0 &pic 33 IRQ_TYPE_LEVEL_HIGH>; |
| 271 | + ranges; | |
| 265 | 272 | }; |
| 266 | 273 | |
| 267 | − pci_bridge@b,0 { | |
| 274 | + pcie@b,0 { | |
| 268 | 275 | compatible = "pci0014,7a09.1", |
| 269 | 276 | "pci0014,7a09", |
| 270 | 277 | "pciclass060400", |
| @@ -274,12 +281,16 @@ · 3 unmodified lines | ||
| 274 | 281 | interrupts = <34 IRQ_TYPE_LEVEL_HIGH>; |
| 275 | 282 | interrupt-parent = <&pic>; |
| 276 | 283 | |
| 284 | + #address-cells = <3>; | |
| 285 | + #size-cells = <2>; | |
| 286 | + device_type = "pci"; | |
| 277 | 287 | #interrupt-cells = <1>; |
| 278 | 288 | interrupt-map-mask = <0 0 0 0>; |
| 279 | 289 | interrupt-map = <0 0 0 0 &pic 34 IRQ_TYPE_LEVEL_HIGH>; |
| 290 | + ranges; | |
| 280 | 291 | }; |
| 281 | 292 | |
| 282 | − pci_bridge@c,0 { | |
| 293 | + pcie@c,0 { | |
| 283 | 294 | compatible = "pci0014,7a09.1", |
| 284 | 295 | "pci0014,7a09", |
| 285 | 296 | "pciclass060400", |
| @@ -289,12 +300,16 @@ · 3 unmodified lines | ||
| 289 | 300 | interrupts = <35 IRQ_TYPE_LEVEL_HIGH>; |
| 290 | 301 | interrupt-parent = <&pic>; |
| 291 | 302 | |
| 303 | + #address-cells = <3>; | |
| 304 | + #size-cells = <2>; | |
| 305 | + device_type = "pci"; | |
| 292 | 306 | #interrupt-cells = <1>; |
| 293 | 307 | interrupt-map-mask = <0 0 0 0>; |
| 294 | 308 | interrupt-map = <0 0 0 0 &pic 35 IRQ_TYPE_LEVEL_HIGH>; |
| 309 | + ranges; | |
| 295 | 310 | }; |
| 296 | 311 | |
| 297 | − pci_bridge@d,0 { | |
| 312 | + pcie@d,0 { | |
| 298 | 313 | compatible = "pci0014,7a19.1", |
| 299 | 314 | "pci0014,7a19", |
| 300 | 315 | "pciclass060400", |
| @@ -304,12 +319,16 @@ · 3 unmodified lines | ||
| 304 | 319 | interrupts = <36 IRQ_TYPE_LEVEL_HIGH>; |
| 305 | 320 | interrupt-parent = <&pic>; |
| 306 | 321 | |
| 322 | + #address-cells = <3>; | |
| 323 | + #size-cells = <2>; | |
| 324 | + device_type = "pci"; | |
| 307 | 325 | #interrupt-cells = <1>; |
| 308 | 326 | interrupt-map-mask = <0 0 0 0>; |
| 309 | 327 | interrupt-map = <0 0 0 0 &pic 36 IRQ_TYPE_LEVEL_HIGH>; |
| 328 | + ranges; | |
| 310 | 329 | }; |
| 311 | 330 | |
| 312 | − pci_bridge@e,0 { | |
| 331 | + pcie@e,0 { | |
| 313 | 332 | compatible = "pci0014,7a09.1", |
| 314 | 333 | "pci0014,7a09", |
| 315 | 334 | "pciclass060400", |
| @@ -319,12 +338,16 @@ · 3 unmodified lines | ||
| 319 | 338 | interrupts = <37 IRQ_TYPE_LEVEL_HIGH>; |
| 320 | 339 | interrupt-parent = <&pic>; |
| 321 | 340 | |
| 341 | + #address-cells = <3>; | |
| 342 | + #size-cells = <2>; | |
| 343 | + device_type = "pci"; | |
| 322 | 344 | #interrupt-cells = <1>; |
| 323 | 345 | interrupt-map-mask = <0 0 0 0>; |
| 324 | 346 | interrupt-map = <0 0 0 0 &pic 37 IRQ_TYPE_LEVEL_HIGH>; |
| 347 | + ranges; | |
| 325 | 348 | }; |
| 326 | 349 | |
| 327 | − pci_bridge@f,0 { | |
| 350 | + pcie@f,0 { | |
| 328 | 351 | compatible = "pci0014,7a29.1", |
| 329 | 352 | "pci0014,7a29", |
| 330 | 353 | "pciclass060400", |
| @@ -334,12 +357,16 @@ · 3 unmodified lines | ||
| 334 | 357 | interrupts = <40 IRQ_TYPE_LEVEL_HIGH>; |
| 335 | 358 | interrupt-parent = <&pic>; |
| 336 | 359 | |
| 360 | + #address-cells = <3>; | |
| 361 | + #size-cells = <2>; | |
| 362 | + device_type = "pci"; | |
| 337 | 363 | #interrupt-cells = <1>; |
| 338 | 364 | interrupt-map-mask = <0 0 0 0>; |
| 339 | 365 | interrupt-map = <0 0 0 0 &pic 40 IRQ_TYPE_LEVEL_HIGH>; |
| 366 | + ranges; | |
| 340 | 367 | }; |
| 341 | 368 | |
| 342 | − pci_bridge@10,0 { | |
| 369 | + pcie@10,0 { | |
| 343 | 370 | compatible = "pci0014,7a19.1", |
| 344 | 371 | "pci0014,7a19", |
| 345 | 372 | "pciclass060400", |
| @@ -349,12 +376,16 @@ · 3 unmodified lines | ||
| 349 | 376 | interrupts = <41 IRQ_TYPE_LEVEL_HIGH>; |
| 350 | 377 | interrupt-parent = <&pic>; |
| 351 | 378 | |
| 379 | + #address-cells = <3>; | |
| 380 | + #size-cells = <2>; | |
| 381 | + device_type = "pci"; | |
| 352 | 382 | #interrupt-cells = <1>; |
| 353 | 383 | interrupt-map-mask = <0 0 0 0>; |
| 354 | 384 | interrupt-map = <0 0 0 0 &pic 41 IRQ_TYPE_LEVEL_HIGH>; |
| 385 | + ranges; | |
| 355 | 386 | }; |
| 356 | 387 | |
| 357 | − pci_bridge@11,0 { | |
| 388 | + pcie@11,0 { | |
| 358 | 389 | compatible = "pci0014,7a29.1", |
| 359 | 390 | "pci0014,7a29", |
| 360 | 391 | "pciclass060400", |
| @@ -364,12 +395,16 @@ · 3 unmodified lines | ||
| 364 | 395 | interrupts = <42 IRQ_TYPE_LEVEL_HIGH>; |
| 365 | 396 | interrupt-parent = <&pic>; |
| 366 | 397 | |
| 398 | + #address-cells = <3>; | |
| 399 | + #size-cells = <2>; | |
| 400 | + device_type = "pci"; | |
| 367 | 401 | #interrupt-cells = <1>; |
| 368 | 402 | interrupt-map-mask = <0 0 0 0>; |
| 369 | 403 | interrupt-map = <0 0 0 0 &pic 42 IRQ_TYPE_LEVEL_HIGH>; |
| 404 | + ranges; | |
| 370 | 405 | }; |
| 371 | 406 | |
| 372 | − pci_bridge@12,0 { | |
| 407 | + pcie@12,0 { | |
| 373 | 408 | compatible = "pci0014,7a19.1", |
| 374 | 409 | "pci0014,7a19", |
| 375 | 410 | "pciclass060400", |
| @@ -379,12 +414,16 @@ · 3 unmodified lines | ||
| 379 | 414 | interrupts = <43 IRQ_TYPE_LEVEL_HIGH>; |
| 380 | 415 | interrupt-parent = <&pic>; |
| 381 | 416 | |
| 417 | + #address-cells = <3>; | |
| 418 | + #size-cells = <2>; | |
| 419 | + device_type = "pci"; | |
| 382 | 420 | #interrupt-cells = <1>; |
| 383 | 421 | interrupt-map-mask = <0 0 0 0>; |
| 384 | 422 | interrupt-map = <0 0 0 0 &pic 43 IRQ_TYPE_LEVEL_HIGH>; |
| 423 | + ranges; | |
| 385 | 424 | }; |
| 386 | 425 | |
| 387 | − pci_bridge@13,0 { | |
| 426 | + pcie@13,0 { | |
| 388 | 427 | compatible = "pci0014,7a29.1", |
| 389 | 428 | "pci0014,7a29", |
| 390 | 429 | "pciclass060400", |
| @@ -394,12 +433,16 @@ · 3 unmodified lines | ||
| 394 | 433 | interrupts = <38 IRQ_TYPE_LEVEL_HIGH>; |
| 395 | 434 | interrupt-parent = <&pic>; |
| 396 | 435 | |
| 436 | + #address-cells = <3>; | |
| 437 | + #size-cells = <2>; | |
| 438 | + device_type = "pci"; | |
| 397 | 439 | #interrupt-cells = <1>; |
| 398 | 440 | interrupt-map-mask = <0 0 0 0>; |
| 399 | 441 | interrupt-map = <0 0 0 0 &pic 38 IRQ_TYPE_LEVEL_HIGH>; |
| 442 | + ranges; | |
| 400 | 443 | }; |
| 401 | 444 | |
| 402 | − pci_bridge@14,0 { | |
| 445 | + pcie@14,0 { | |
| 403 | 446 | compatible = "pci0014,7a19.1", |
| 404 | 447 | "pci0014,7a19", |
| 405 | 448 | "pciclass060400", |
| @@ -409,9 +452,13 @@ · 3 unmodified lines | ||
| 409 | 452 | interrupts = <39 IRQ_TYPE_LEVEL_HIGH>; |
| 410 | 453 | interrupt-parent = <&pic>; |
| 411 | 454 | |
| 455 | + #address-cells = <3>; | |
| 456 | + #size-cells = <2>; | |
| 457 | + device_type = "pci"; | |
| 412 | 458 | #interrupt-cells = <1>; |
| 413 | 459 | interrupt-map-mask = <0 0 0 0>; |
| 414 | 460 | interrupt-map = <0 0 0 0 &pic 39 IRQ_TYPE_LEVEL_HIGH>; |
| 461 | + ranges; | |
| 415 | 462 | }; |
| 416 | 463 | }; |
| 417 | 464 | |
| @@ -1,270 +0,0 @@ | ||
| 1 | −// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) | |
| 2 | −/* | |
| 3 | − * Copyright 2023 Mobileye Vision Technologies Ltd. | |
| 4 | − */ | |
| 5 | − | |
| 6 | −#include <dt-bindings/clock/mobileye,eyeq5-clk.h> | |
| 7 | − | |
| 8 | −/ { | |
| 9 | − /* Fixed clock */ | |
| 10 | − xtal: xtal { | |
| 11 | − compatible = "fixed-clock"; | |
| 12 | − #clock-cells = <0>; | |
| 13 | − clock-frequency = <30000000>; | |
| 14 | − }; | |
| 15 | − | |
| 16 | −/* PLL_CPU derivatives */ | |
| 17 | − occ_cpu: occ-cpu { | |
| 18 | − compatible = "fixed-factor-clock"; | |
| 19 | − clocks = <&olb EQ5C_PLL_CPU>; | |
| 20 | − #clock-cells = <0>; | |
| 21 | − clock-div = <1>; | |
| 22 | − clock-mult = <1>; | |
| 23 | − }; | |
| 24 | − si_css0_ref_clk: si-css0-ref-clk { /* gate ClkRstGen_si_css0_ref */ | |
| 25 | − compatible = "fixed-factor-clock"; | |
| 26 | − clocks = <&occ_cpu>; | |
| 27 | − #clock-cells = <0>; | |
| 28 | − clock-div = <1>; | |
| 29 | − clock-mult = <1>; | |
| 30 | − }; | |
| 31 | − cpc_clk: cpc-clk { | |
| 32 | − compatible = "fixed-factor-clock"; | |
| 33 | − clocks = <&si_css0_ref_clk>; | |
| 34 | − #clock-cells = <0>; | |
| 35 | − clock-div = <1>; | |
| 36 | − clock-mult = <1>; | |
| 37 | − }; | |
| 38 | − core0_clk: core0-clk { | |
| 39 | − compatible = "fixed-factor-clock"; | |
| 40 | − clocks = <&si_css0_ref_clk>; | |
| 41 | − #clock-cells = <0>; | |
| 42 | − clock-div = <1>; | |
| 43 | − clock-mult = <1>; | |
| 44 | − }; | |
| 45 | − core1_clk: core1-clk { | |
| 46 | − compatible = "fixed-factor-clock"; | |
| 47 | − clocks = <&si_css0_ref_clk>; | |
| 48 | − #clock-cells = <0>; | |
| 49 | − clock-div = <1>; | |
| 50 | − clock-mult = <1>; | |
| 51 | − }; | |
| 52 | − core2_clk: core2-clk { | |
| 53 | − compatible = "fixed-factor-clock"; | |
| 54 | − clocks = <&si_css0_ref_clk>; | |
| 55 | − #clock-cells = <0>; | |
| 56 | − clock-div = <1>; | |
| 57 | − clock-mult = <1>; | |
| 58 | − }; | |
| 59 | − core3_clk: core3-clk { | |
| 60 | − compatible = "fixed-factor-clock"; | |
| 61 | − clocks = <&si_css0_ref_clk>; | |
| 62 | − #clock-cells = <0>; | |
| 63 | − clock-div = <1>; | |
| 64 | − clock-mult = <1>; | |
| 65 | − }; | |
| 66 | − cm_clk: cm-clk { | |
| 67 | − compatible = "fixed-factor-clock"; | |
| 68 | − clocks = <&si_css0_ref_clk>; | |
| 69 | − #clock-cells = <0>; | |
| 70 | − clock-div = <1>; | |
| 71 | − clock-mult = <1>; | |
| 72 | − }; | |
| 73 | − mem_clk: mem-clk { | |
| 74 | − compatible = "fixed-factor-clock"; | |
| 75 | − clocks = <&si_css0_ref_clk>; | |
| 76 | − #clock-cells = <0>; | |
| 77 | − clock-div = <1>; | |
| 78 | − clock-mult = <1>; | |
| 79 | − }; | |
| 80 | − occ_isram: occ-isram { | |
| 81 | − compatible = "fixed-factor-clock"; | |
| 82 | − clocks = <&olb EQ5C_PLL_CPU>; | |
| 83 | − #clock-cells = <0>; | |
| 84 | − clock-div = <2>; | |
| 85 | − clock-mult = <1>; | |
| 86 | − }; | |
| 87 | − isram_clk: isram-clk { /* gate ClkRstGen_isram */ | |
| 88 | − compatible = "fixed-factor-clock"; | |
| 89 | − clocks = <&occ_isram>; | |
| 90 | − #clock-cells = <0>; | |
| 91 | − clock-div = <1>; | |
| 92 | − clock-mult = <1>; | |
| 93 | − }; | |
| 94 | − occ_dbu: occ-dbu { | |
| 95 | − compatible = "fixed-factor-clock"; | |
| 96 | − clocks = <&olb EQ5C_PLL_CPU>; | |
| 97 | − #clock-cells = <0>; | |
| 98 | − clock-div = <10>; | |
| 99 | − clock-mult = <1>; | |
| 100 | − }; | |
| 101 | − si_dbu_tp_pclk: si-dbu-tp-pclk { /* gate ClkRstGen_dbu */ | |
| 102 | − compatible = "fixed-factor-clock"; | |
| 103 | − clocks = <&occ_dbu>; | |
| 104 | − #clock-cells = <0>; | |
| 105 | − clock-div = <1>; | |
| 106 | − clock-mult = <1>; | |
| 107 | − }; | |
| 108 | −/* PLL_VDI derivatives */ | |
| 109 | − occ_vdi: occ-vdi { | |
| 110 | − compatible = "fixed-factor-clock"; | |
| 111 | − clocks = <&olb EQ5C_PLL_VDI>; | |
| 112 | − #clock-cells = <0>; | |
| 113 | − clock-div = <2>; | |
| 114 | − clock-mult = <1>; | |
| 115 | − }; | |
| 116 | − vdi_clk: vdi-clk { /* gate ClkRstGen_vdi */ | |
| 117 | − compatible = "fixed-factor-clock"; | |
| 118 | − clocks = <&occ_vdi>; | |
| 119 | − #clock-cells = <0>; | |
| 120 | − clock-div = <1>; | |
| 121 | − clock-mult = <1>; | |
| 122 | − }; | |
| 123 | − occ_can_ser: occ-can-ser { | |
| 124 | − compatible = "fixed-factor-clock"; | |
| 125 | − clocks = <&olb EQ5C_PLL_VDI>; | |
| 126 | − #clock-cells = <0>; | |
| 127 | − clock-div = <16>; | |
| 128 | − clock-mult = <1>; | |
| 129 | − }; | |
| 130 | − can_ser_clk: can-ser-clk { /* gate ClkRstGen_can_ser */ | |
| 131 | − compatible = "fixed-factor-clock"; | |
| 132 | − clocks = <&occ_can_ser>; | |
| 133 | − #clock-cells = <0>; | |
| 134 | − clock-div = <1>; | |
| 135 | − clock-mult = <1>; | |
| 136 | − }; | |
| 137 | − i2c_ser_clk: i2c-ser-clk { | |
| 138 | − compatible = "fixed-factor-clock"; | |
| 139 | − clocks = <&olb EQ5C_PLL_VDI>; | |
| 140 | − #clock-cells = <0>; | |
| 141 | − clock-div = <20>; | |
| 142 | − clock-mult = <1>; | |
| 143 | − }; | |
| 144 | −/* PLL_PER derivatives */ | |
| 145 | − occ_periph: occ-periph { | |
| 146 | − compatible = "fixed-factor-clock"; | |
| 147 | − clocks = <&olb EQ5C_PLL_PER>; | |
| 148 | − #clock-cells = <0>; | |
| 149 | − clock-div = <16>; | |
| 150 | − clock-mult = <1>; | |
| 151 | − }; | |
| 152 | − periph_clk: periph-clk { | |
| 153 | − compatible = "fixed-factor-clock"; | |
| 154 | − clocks = <&occ_periph>; | |
| 155 | − #clock-cells = <0>; | |
| 156 | − clock-div = <1>; | |
| 157 | − clock-mult = <1>; | |
| 158 | − }; | |
| 159 | − can_clk: can-clk { | |
| 160 | − compatible = "fixed-factor-clock"; | |
| 161 | − clocks = <&occ_periph>; | |
| 162 | − #clock-cells = <0>; | |
| 163 | − clock-div = <1>; | |
| 164 | − clock-mult = <1>; | |
| 165 | − }; | |
| 166 | − spi_clk: spi-clk { | |
| 167 | − compatible = "fixed-factor-clock"; | |
| 168 | − clocks = <&occ_periph>; | |
| 169 | − #clock-cells = <0>; | |
| 170 | − clock-div = <1>; | |
| 171 | − clock-mult = <1>; | |
| 172 | − }; | |
| 173 | − uart_clk: uart-clk { | |
| 174 | − compatible = "fixed-factor-clock"; | |
| 175 | − clocks = <&occ_periph>; | |
| 176 | − #clock-cells = <0>; | |
| 177 | − clock-div = <1>; | |
| 178 | − clock-mult = <1>; | |
| 179 | − }; | |
| 180 | − i2c_clk: i2c-clk { | |
| 181 | − compatible = "fixed-factor-clock"; | |
| 182 | − clocks = <&occ_periph>; | |
| 183 | − #clock-cells = <0>; | |
| 184 | − clock-div = <1>; | |
| 185 | − clock-mult = <1>; | |
| 186 | − clock-output-names = "i2c_clk"; | |
| 187 | − }; | |
| 188 | − timer_clk: timer-clk { | |
| 189 | − compatible = "fixed-factor-clock"; | |
| 190 | − clocks = <&occ_periph>; | |
| 191 | − #clock-cells = <0>; | |
| 192 | − clock-div = <1>; | |
| 193 | − clock-mult = <1>; | |
| 194 | − clock-output-names = "timer_clk"; | |
| 195 | − }; | |
| 196 | − gpio_clk: gpio-clk { | |
| 197 | − compatible = "fixed-factor-clock"; | |
| 198 | − clocks = <&occ_periph>; | |
| 199 | − #clock-cells = <0>; | |
| 200 | − clock-div = <1>; | |
| 201 | − clock-mult = <1>; | |
| 202 | − clock-output-names = "gpio_clk"; | |
| 203 | − }; | |
| 204 | − emmc_sys_clk: emmc-sys-clk { | |
| 205 | − compatible = "fixed-factor-clock"; | |
| 206 | − clocks = <&olb EQ5C_PLL_PER>; | |
| 207 | − #clock-cells = <0>; | |
| 208 | − clock-div = <10>; | |
| 209 | − clock-mult = <1>; | |
| 210 | − clock-output-names = "emmc_sys_clk"; | |
| 211 | − }; | |
| 212 | − ccf_ctrl_clk: ccf-ctrl-clk { | |
| 213 | − compatible = "fixed-factor-clock"; | |
| 214 | − clocks = <&olb EQ5C_PLL_PER>; | |
| 215 | − #clock-cells = <0>; | |
| 216 | − clock-div = <4>; | |
| 217 | − clock-mult = <1>; | |
| 218 | − clock-output-names = "ccf_ctrl_clk"; | |
| 219 | − }; | |
| 220 | − occ_mjpeg_core: occ-mjpeg-core { | |
| 221 | − compatible = "fixed-factor-clock"; | |
| 222 | − clocks = <&olb EQ5C_PLL_PER>; | |
| 223 | − #clock-cells = <0>; | |
| 224 | − clock-div = <2>; | |
| 225 | − clock-mult = <1>; | |
| 226 | − clock-output-names = "occ_mjpeg_core"; | |
| 227 | − }; | |
| 228 | − hsm_clk: hsm-clk { /* gate ClkRstGen_hsm */ | |
| 229 | − compatible = "fixed-factor-clock"; | |
| 230 | − clocks = <&occ_mjpeg_core>; | |
| 231 | − #clock-cells = <0>; | |
| 232 | − clock-div = <1>; | |
| 233 | − clock-mult = <1>; | |
| 234 | − clock-output-names = "hsm_clk"; | |
| 235 | − }; | |
| 236 | − mjpeg_core_clk: mjpeg-core-clk { /* gate ClkRstGen_mjpeg_gen */ | |
| 237 | − compatible = "fixed-factor-clock"; | |
| 238 | − clocks = <&occ_mjpeg_core>; | |
| 239 | − #clock-cells = <0>; | |
| 240 | − clock-div = <1>; | |
| 241 | − clock-mult = <1>; | |
| 242 | − clock-output-names = "mjpeg_core_clk"; | |
| 243 | − }; | |
| 244 | − fcmu_a_clk: fcmu-a-clk { | |
| 245 | − compatible = "fixed-factor-clock"; | |
| 246 | − clocks = <&olb EQ5C_PLL_PER>; | |
| 247 | − #clock-cells = <0>; | |
| 248 | − clock-div = <20>; | |
| 249 | − clock-mult = <1>; | |
| 250 | − clock-output-names = "fcmu_a_clk"; | |
| 251 | − }; | |
| 252 | − occ_pci_sys: occ-pci-sys { | |
| 253 | − compatible = "fixed-factor-clock"; | |
| 254 | − clocks = <&olb EQ5C_PLL_PER>; | |
| 255 | − #clock-cells = <0>; | |
| 256 | − clock-div = <8>; | |
| 257 | − clock-mult = <1>; | |
| 258 | − clock-output-names = "occ_pci_sys"; | |
| 259 | − }; | |
| 260 | − pclk: pclk { | |
| 261 | − compatible = "fixed-clock"; | |
| 262 | − #clock-cells = <0>; | |
| 263 | − clock-frequency = <250000000>; /* 250MHz */ | |
| 264 | − }; | |
| 265 | − tsu_clk: tsu-clk { | |
| 266 | − compatible = "fixed-clock"; | |
| 267 | − #clock-cells = <0>; | |
| 268 | − clock-frequency = <125000000>; /* 125MHz */ | |
| 269 | − }; | |
| 270 | −}; | |
| @@ -5,7 +5,7 @@ · 4 unmodified lines | ||
| 5 | 5 | |
| 6 | 6 | #include <dt-bindings/interrupt-controller/mips-gic.h> |
| 7 | 7 | |
| 8 | −#include "eyeq5-clocks.dtsi" | |
| 8 | +#include <dt-bindings/clock/mobileye,eyeq5-clk.h> | |
| 9 | 9 | |
| 10 | 10 | / { |
| 11 | 11 | #address-cells = <2>; |
| @@ -17,7 +17,7 @@ · 5 unmodified lines | ||
| 17 | 17 | device_type = "cpu"; |
| 18 | 18 | compatible = "img,i6500"; |
| 19 | 19 | reg = <0>; |
| 20 | − clocks = <&core0_clk>; | |
| 20 | + clocks = <&olb EQ5C_CPU_CORE0>; | |
| 21 | 21 | }; |
| 22 | 22 | }; |
| 23 | 23 | |
| @@ -64,6 +64,24 @@ · 40 unmodified lines | ||
| 64 | 64 | #interrupt-cells = <1>; |
| 65 | 65 | }; |
| 66 | 66 | |
| 67 | + xtal: xtal { | |
| 68 | + compatible = "fixed-clock"; | |
| 69 | + #clock-cells = <0>; | |
| 70 | + clock-frequency = <30000000>; | |
| 71 | + }; | |
| 72 | + | |
| 73 | + pclk: pclk { | |
| 74 | + compatible = "fixed-clock"; | |
| 75 | + #clock-cells = <0>; | |
| 76 | + clock-frequency = <250000000>; /* 250MHz */ | |
| 77 | + }; | |
| 78 | + | |
| 79 | + tsu_clk: tsu-clk { | |
| 80 | + compatible = "fixed-clock"; | |
| 81 | + #clock-cells = <0>; | |
| 82 | + clock-frequency = <125000000>; /* 125MHz */ | |
| 83 | + }; | |
| 84 | + | |
| 67 | 85 | soc: soc { |
| 68 | 86 | #address-cells = <2>; |
| 69 | 87 | #size-cells = <2>; |
| @@ -76,7 +94,7 @@ · 6 unmodified lines | ||
| 76 | 94 | reg-io-width = <4>; |
| 77 | 95 | interrupt-parent = <&gic>; |
| 78 | 96 | interrupts = <GIC_SHARED 6 IRQ_TYPE_LEVEL_HIGH>; |
| 79 | − clocks = <&uart_clk>, <&occ_periph>; | |
| 97 | + clocks = <&olb EQ5C_PER_UART>, <&olb EQ5C_PER_OCC>; | |
| 80 | 98 | clock-names = "uartclk", "apb_pclk"; |
| 81 | 99 | resets = <&olb 0 10>; |
| 82 | 100 | pinctrl-names = "default"; |
| @@ -89,7 +107,7 @@ · 6 unmodified lines | ||
| 89 | 107 | reg-io-width = <4>; |
| 90 | 108 | interrupt-parent = <&gic>; |
| 91 | 109 | interrupts = <GIC_SHARED 6 IRQ_TYPE_LEVEL_HIGH>; |
| 92 | − clocks = <&uart_clk>, <&occ_periph>; | |
| 110 | + clocks = <&olb EQ5C_PER_UART>, <&olb EQ5C_PER_OCC>; | |
| 93 | 111 | clock-names = "uartclk", "apb_pclk"; |
| 94 | 112 | resets = <&olb 0 11>; |
| 95 | 113 | pinctrl-names = "default"; |
| @@ -102,7 +120,7 @@ · 6 unmodified lines | ||
| 102 | 120 | reg-io-width = <4>; |
| 103 | 121 | interrupt-parent = <&gic>; |
| 104 | 122 | interrupts = <GIC_SHARED 6 IRQ_TYPE_LEVEL_HIGH>; |
| 105 | − clocks = <&uart_clk>, <&occ_periph>; | |
| 123 | + clocks = <&olb EQ5C_PER_UART>, <&olb EQ5C_PER_OCC>; | |
| 106 | 124 | clock-names = "uartclk", "apb_pclk"; |
| 107 | 125 | resets = <&olb 0 12>; |
| 108 | 126 | pinctrl-names = "default"; |
| @@ -135,7 +153,7 @@ · 26 unmodified lines | ||
| 135 | 153 | timer { |
| 136 | 154 | compatible = "mti,gic-timer"; |
| 137 | 155 | interrupts = <GIC_LOCAL 1 IRQ_TYPE_NONE>; |
| 138 | − clocks = <&core0_clk>; | |
| 156 | + clocks = <&olb EQ5C_CPU_CORE0>; | |
| 139 | 157 | }; |
| 140 | 158 | }; |
| 141 | 159 | }; |
| @@ -1,52 +0,0 @@ | ||
| 1 | −// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) | |
| 2 | −/* | |
| 3 | − * Copyright 2023 Mobileye Vision Technologies Ltd. | |
| 4 | − */ | |
| 5 | − | |
| 6 | −#include <dt-bindings/clock/mobileye,eyeq5-clk.h> | |
| 7 | − | |
| 8 | −/ { | |
| 9 | − xtal: clock-30000000 { | |
| 10 | − compatible = "fixed-clock"; | |
| 11 | − #clock-cells = <0>; | |
| 12 | − clock-frequency = <30000000>; | |
| 13 | − }; | |
| 14 | − | |
| 15 | − pll_west: clock-2000000000-west { | |
| 16 | − compatible = "fixed-clock"; | |
| 17 | − #clock-cells = <0>; | |
| 18 | − clock-frequency = <2000000000>; | |
| 19 | − }; | |
| 20 | − | |
| 21 | − pll_cpu: clock-2000000000-cpu { | |
| 22 | − compatible = "fixed-clock"; | |
| 23 | − #clock-cells = <0>; | |
| 24 | − clock-frequency = <2000000000>; | |
| 25 | − }; | |
| 26 | − | |
| 27 | − /* pll-cpu derivatives */ | |
| 28 | − occ_cpu: clock-2000000000-occ-cpu { | |
| 29 | − compatible = "fixed-factor-clock"; | |
| 30 | − clocks = <&pll_cpu>; | |
| 31 | − #clock-cells = <0>; | |
| 32 | − clock-div = <1>; | |
| 33 | − clock-mult = <1>; | |
| 34 | − }; | |
| 35 | − | |
| 36 | − /* pll-west derivatives */ | |
| 37 | − occ_periph_w: clock-200000000 { | |
| 38 | − compatible = "fixed-factor-clock"; | |
| 39 | − clocks = <&pll_west>; | |
| 40 | − #clock-cells = <0>; | |
| 41 | − clock-div = <10>; | |
| 42 | − clock-mult = <1>; | |
| 43 | − }; | |
| 44 | − uart_clk: clock-200000000-uart { | |
| 45 | − compatible = "fixed-factor-clock"; | |
| 46 | − clocks = <&occ_periph_w>; | |
| 47 | − #clock-cells = <0>; | |
| 48 | − clock-div = <1>; | |
| 49 | − clock-mult = <1>; | |
| 50 | − }; | |
| 51 | − | |
| 52 | −}; | |
| @@ -5,7 +5,7 @@ · 4 unmodified lines | ||
| 5 | 5 | |
| 6 | 6 | #include <dt-bindings/interrupt-controller/mips-gic.h> |
| 7 | 7 | |
| 8 | −#include "eyeq6h-fixed-clocks.dtsi" | |
| 8 | +#include <dt-bindings/clock/mobileye,eyeq5-clk.h> | |
| 9 | 9 | |
| 10 | 10 | / { |
| 11 | 11 | #address-cells = <2>; |
| @@ -17,7 +17,7 @@ · 5 unmodified lines | ||
| 17 | 17 | device_type = "cpu"; |
| 18 | 18 | compatible = "img,i6500"; |
| 19 | 19 | reg = <0>; |
| 20 | − clocks = <&occ_cpu>; | |
| 20 | + clocks = <&olb_central EQ6HC_CENTRAL_CPU_OCC>; | |
| 21 | 21 | }; |
| 22 | 22 | }; |
| 23 | 23 | |
| @@ -32,19 +32,42 @@ · 8 unmodified lines | ||
| 32 | 32 | #interrupt-cells = <1>; |
| 33 | 33 | }; |
| 34 | 34 | |
| 35 | + xtal: clock-30000000 { | |
| 36 | + compatible = "fixed-clock"; | |
| 37 | + #clock-cells = <0>; | |
| 38 | + clock-frequency = <30000000>; | |
| 39 | + }; | |
| 40 | + | |
| 35 | 41 | soc: soc { |
| 36 | 42 | compatible = "simple-bus"; |
| 37 | 43 | #address-cells = <2>; |
| 38 | 44 | #size-cells = <2>; |
| 39 | 45 | ranges; |
| 40 | 46 | |
| 47 | + olb_acc: system-controller@d2003000 { | |
| 48 | + compatible = "mobileye,eyeq6h-acc-olb", "syscon"; | |
| 49 | + reg = <0x0 0xd2003000 0x0 0x1000>; | |
| 50 | + #reset-cells = <1>; | |
| 51 | + #clock-cells = <1>; | |
| 52 | + clocks = <&xtal>; | |
| 53 | + clock-names = "ref"; | |
| 54 | + }; | |
| 55 | + | |
| 56 | + olb_central: system-controller@d3100000 { | |
| 57 | + compatible = "mobileye,eyeq6h-central-olb", "syscon"; | |
| 58 | + reg = <0x0 0xd3100000 0x0 0x1000>; | |
| 59 | + #clock-cells = <1>; | |
| 60 | + clocks = <&xtal>; | |
| 61 | + clock-names = "ref"; | |
| 62 | + }; | |
| 63 | + | |
| 41 | 64 | uart0: serial@d3331000 { |
| 42 | 65 | compatible = "arm,pl011", "arm,primecell"; |
| 43 | 66 | reg = <0 0xd3331000 0x0 0x1000>; |
| 44 | 67 | reg-io-width = <4>; |
| 45 | 68 | interrupt-parent = <&gic>; |
| 46 | 69 | interrupts = <GIC_SHARED 43 IRQ_TYPE_LEVEL_HIGH>; |
| 47 | − clocks = <&occ_periph_w>, <&occ_periph_w>; | |
| 70 | + clocks = <&olb_west EQ6HC_WEST_PER_UART>, <&olb_west EQ6HC_WEST_PER_OCC>; | |
| 48 | 71 | clock-names = "uartclk", "apb_pclk"; |
| 49 | 72 | }; |
| 50 | 73 | |
| @@ -56,6 +79,15 @@ · 5 unmodified lines | ||
| 56 | 79 | pinctrl-single,function-mask = <0xffff>; |
| 57 | 80 | }; |
| 58 | 81 | |
| 82 | + olb_west: system-controller@d3338000 { | |
| 83 | + compatible = "mobileye,eyeq6h-west-olb", "syscon"; | |
| 84 | + reg = <0x0 0xd3338000 0x0 0x1000>; | |
| 85 | + #reset-cells = <1>; | |
| 86 | + #clock-cells = <1>; | |
| 87 | + clocks = <&xtal>; | |
| 88 | + clock-names = "ref"; | |
| 89 | + }; | |
| 90 | + | |
| 59 | 91 | pinctrl_east: pinctrl@d3357000 { |
| 60 | 92 | compatible = "pinctrl-single"; |
| 61 | 93 | reg = <0x0 0xd3357000 0x0 0xb0>; |
| @@ -64,6 +96,23 @@ · 2 unmodified lines | ||
| 64 | 96 | pinctrl-single,function-mask = <0xffff>; |
| 65 | 97 | }; |
| 66 | 98 | |
| 99 | + olb_east: system-controller@d3358000 { | |
| 100 | + compatible = "mobileye,eyeq6h-east-olb", "syscon"; | |
| 101 | + reg = <0x0 0xd3358000 0x0 0x1000>; | |
| 102 | + #reset-cells = <1>; | |
| 103 | + #clock-cells = <1>; | |
| 104 | + clocks = <&xtal>; | |
| 105 | + clock-names = "ref"; | |
| 106 | + }; | |
| 107 | + | |
| 108 | + olb_south: system-controller@d8013000 { | |
| 109 | + compatible = "mobileye,eyeq6h-south-olb", "syscon"; | |
| 110 | + reg = <0x0 0xd8013000 0x0 0x1000>; | |
| 111 | + #clock-cells = <1>; | |
| 112 | + clocks = <&xtal>; | |
| 113 | + clock-names = "ref"; | |
| 114 | + }; | |
| 115 | + | |
| 67 | 116 | pinctrl_south: pinctrl@d8014000 { |
| 68 | 117 | compatible = "pinctrl-single"; |
| 69 | 118 | reg = <0x0 0xd8014000 0x0 0xf8>; |
| @@ -72,6 +121,22 @@ · 2 unmodified lines | ||
| 72 | 121 | pinctrl-single,function-mask = <0xffff>; |
| 73 | 122 | }; |
| 74 | 123 | |
| 124 | + olb_ddr0: system-controller@e4080000 { | |
| 125 | + compatible = "mobileye,eyeq6h-ddr0-olb", "syscon"; | |
| 126 | + reg = <0x0 0xe4080000 0x0 0x1000>; | |
| 127 | + #clock-cells = <1>; | |
| 128 | + clocks = <&xtal>; | |
| 129 | + clock-names = "ref"; | |
| 130 | + }; | |
| 131 | + | |
| 132 | + olb_ddr1: system-controller@e4081000 { | |
| 133 | + compatible = "mobileye,eyeq6h-ddr1-olb", "syscon"; | |
| 134 | + reg = <0x0 0xe4081000 0x0 0x1000>; | |
| 135 | + #clock-cells = <1>; | |
| 136 | + clocks = <&xtal>; | |
| 137 | + clock-names = "ref"; | |
| 138 | + }; | |
| 139 | + | |
| 75 | 140 | gic: interrupt-controller@f0920000 { |
| 76 | 141 | compatible = "mti,gic"; |
| 77 | 142 | reg = <0x0 0xf0920000 0x0 0x20000>; |
| @@ -89,7 +154,7 @@ · 11 unmodified lines | ||
| 89 | 154 | timer { |
| 90 | 155 | compatible = "mti,gic-timer"; |
| 91 | 156 | interrupts = <GIC_LOCAL 1 IRQ_TYPE_NONE>; |
| 92 | − clocks = <&occ_cpu>; | |
| 157 | + clocks = <&olb_central EQ6HC_CENTRAL_CPU_OCC>; | |
| 93 | 158 | }; |
| 94 | 159 | }; |
| 95 | 160 | }; |
| @@ -61,6 +61,8 @@ · 60 unmodified lines | ||
| 61 | 61 | }; |
| 62 | 62 | |
| 63 | 63 | &soc { |
| 64 | + ranges = <0x0 0x18000000 0x20000>; | |
| 65 | + | |
| 64 | 66 | intc: interrupt-controller@3000 { |
| 65 | 67 | compatible = "realtek,rtl9300-intc", "realtek,rtl-intc"; |
| 66 | 68 | reg = <0x3000 0x18>, <0x3018 0x18>; |
| @@ -88,6 +90,17 @@ · 21 unmodified lines | ||
| 88 | 90 | interrupts = <7>, <8>, <9>, <10>, <11>; |
| 89 | 91 | clocks = <&lx_clk>; |
| 90 | 92 | }; |
| 93 | + | |
| 94 | + snand: spi@1a400 { | |
| 95 | + compatible = "realtek,rtl9301-snand"; | |
| 96 | + reg = <0x1a400 0x44>; | |
| 97 | + interrupt-parent = <&intc>; | |
| 98 | + interrupts = <19>; | |
| 99 | + clocks = <&lx_clk>; | |
| 100 | + #address-cells = <1>; | |
| 101 | + #size-cells = <0>; | |
| 102 | + status = "disabled"; | |
| 103 | + }; | |
| 91 | 104 | }; |
| 92 | 105 | |
| 93 | 106 | &uart0 { |
| @@ -59,6 +59,7 @@ · 58 unmodified lines | ||
| 59 | 59 | #endif |
| 60 | 60 | .endm |
| 61 | 61 | |
| 62 | + __HEAD | |
| 62 | 63 | #ifndef CONFIG_NO_EXCEPT_FILL |
| 63 | 64 | /* |
| 64 | 65 | * Reserved space for exception handlers. |
| @@ -61,6 +61,7 @@ SECTIONS · 60 unmodified lines | ||
| 61 | 61 | /* read-only */ |
| 62 | 62 | _text = .; /* Text and read-only data */ |
| 63 | 63 | .text : { |
| 64 | + HEAD_TEXT | |
| 64 | 65 | TEXT_TEXT |
| 65 | 66 | SCHED_TEXT |
| 66 | 67 | LOCK_TEXT |
| @@ -749,7 +749,7 @@ static void bridge_remove(struct platform_device *pdev) · 748 unmodified lines | ||
| 749 | 749 | |
| 750 | 750 | static struct platform_driver bridge_driver = { |
| 751 | 751 | .probe = bridge_probe, |
| 752 | − .remove_new = bridge_remove, | |
| 752 | + .remove = bridge_remove, | |
| 753 | 753 | .driver = { |
| 754 | 754 | .name = "xtalk-bridge", |
| 755 | 755 | } |
| @@ -87,7 +87,7 @@ int ftrace_enable_ftrace_graph_caller(void) · 86 unmodified lines | ||
| 87 | 87 | |
| 88 | 88 | int ftrace_disable_ftrace_graph_caller(void) |
| 89 | 89 | { |
| 90 | − static_key_enable(&ftrace_graph_enable.key); | |
| 90 | + static_key_disable(&ftrace_graph_enable.key); | |
| 91 | 91 | return 0; |
| 92 | 92 | } |
| 93 | 93 | #endif |
| @@ -403,10 +403,12 @@ PHONY += stack_protector_prepare · 402 unmodified lines | ||
| 403 | 403 | stack_protector_prepare: prepare0 |
| 404 | 404 | ifdef CONFIG_PPC64 |
| 405 | 405 | $(eval KBUILD_CFLAGS += -mstack-protector-guard=tls -mstack-protector-guard-reg=r13 \ |
| 406 | − -mstack-protector-guard-offset=$(shell awk '{if ($$2 == "PACA_CANARY") print $$3;}' include/generated/asm-offsets.h)) | |
| 406 | + -mstack-protector-guard-offset=$(shell awk '{if ($$2 == "PACA_CANARY") print $$3;}' \ | |
| 407 | + $(objtree)/include/generated/asm-offsets.h)) | |
| 407 | 408 | else |
| 408 | 409 | $(eval KBUILD_CFLAGS += -mstack-protector-guard=tls -mstack-protector-guard-reg=r2 \ |
| 409 | − -mstack-protector-guard-offset=$(shell awk '{if ($$2 == "TASK_CANARY") print $$3;}' include/generated/asm-offsets.h)) | |
| 410 | + -mstack-protector-guard-offset=$(shell awk '{if ($$2 == "TASK_CANARY") print $$3;}' \ | |
| 411 | + $(objtree)/include/generated/asm-offsets.h)) | |
| 410 | 412 | endif |
| 411 | 413 | endif |
| 412 | 414 | |
| @@ -74,4 +74,4 @@ MODULE_DESCRIPTION("IBM VMX cryptographic acceleration instructions " · 73 unmodified lines | ||
| 74 | 74 | "support on Power 8"); |
| 75 | 75 | MODULE_LICENSE("GPL"); |
| 76 | 76 | MODULE_VERSION("1.0.0"); |
| 77 | −MODULE_IMPORT_NS(CRYPTO_INTERNAL); | |
| 77 | +MODULE_IMPORT_NS("CRYPTO_INTERNAL"); | |
| @@ -3,7 +3,7 @@ · 2 unmodified lines | ||
| 3 | 3 | #define _ASM_POWERPC_SIMPLE_SPINLOCK_TYPES_H |
| 4 | 4 | |
| 5 | 5 | #ifndef __LINUX_SPINLOCK_TYPES_RAW_H |
| 6 | −# error "please don't include this file directly" | |
| 6 | +# error "Please do not include this file directly." | |
| 7 | 7 | #endif |
| 8 | 8 | |
| 9 | 9 | typedef struct { |
| @@ -3,7 +3,7 @@ · 2 unmodified lines | ||
| 3 | 3 | #define _ASM_POWERPC_SPINLOCK_TYPES_H |
| 4 | 4 | |
| 5 | 5 | #ifndef __LINUX_SPINLOCK_TYPES_RAW_H |
| 6 | −# error "please don't include this file directly" | |
| 6 | +# error "Please do not include this file directly." | |
| 7 | 7 | #endif |
| 8 | 8 | |
| 9 | 9 | #ifdef CONFIG_PPC_QUEUED_SPINLOCKS |
| @@ -2848,7 +2848,7 @@ static void __init fixup_device_tree_chrp(void) · 2847 unmodified lines | ||
| 2848 | 2848 | #endif |
| 2849 | 2849 | |
| 2850 | 2850 | #if defined(CONFIG_PPC64) && defined(CONFIG_PPC_PMAC) |
| 2851 | −static void __init fixup_device_tree_pmac(void) | |
| 2851 | +static void __init fixup_device_tree_pmac64(void) | |
| 2852 | 2852 | { |
| 2853 | 2853 | phandle u3, i2c, mpic; |
| 2854 | 2854 | u32 u3_rev; |
| @@ -2888,7 +2888,31 @@ static void __init fixup_device_tree_pmac(void) · 33 unmodified lines | ||
| 2888 | 2888 | &parent, sizeof(parent)); |
| 2889 | 2889 | } |
| 2890 | 2890 | #else |
| 2891 | −#define fixup_device_tree_pmac() | |
| 2891 | +#define fixup_device_tree_pmac64() | |
| 2892 | +#endif | |
| 2893 | + | |
| 2894 | +#ifdef CONFIG_PPC_PMAC | |
| 2895 | +static void __init fixup_device_tree_pmac(void) | |
| 2896 | +{ | |
| 2897 | + __be32 val = 1; | |
| 2898 | + char type[8]; | |
| 2899 | + phandle node; | |
| 2900 | + | |
| 2901 | + // Some pmacs are missing #size-cells on escc nodes | |
| 2902 | + for (node = 0; prom_next_node(&node); ) { | |
| 2903 | + type[0] = '\0'; | |
| 2904 | + prom_getprop(node, "device_type", type, sizeof(type)); | |
| 2905 | + if (prom_strcmp(type, "escc")) | |
| 2906 | + continue; | |
| 2907 | + | |
| 2908 | + if (prom_getproplen(node, "#size-cells") != PROM_ERROR) | |
| 2909 | + continue; | |
| 2910 | + | |
| 2911 | + prom_setprop(node, NULL, "#size-cells", &val, sizeof(val)); | |
| 2912 | + } | |
| 2913 | +} | |
| 2914 | +#else | |
| 2915 | +static inline void fixup_device_tree_pmac(void) { } | |
| 2892 | 2916 | #endif |
| 2893 | 2917 | |
| 2894 | 2918 | #ifdef CONFIG_PPC_EFIKA |
| @@ -3111,6 +3135,7 @@ static void __init fixup_device_tree(void) · 216 unmodified lines | ||
| 3111 | 3135 | { |
| 3112 | 3136 | fixup_device_tree_chrp(); |
| 3113 | 3137 | fixup_device_tree_pmac(); |
| 3138 | + fixup_device_tree_pmac64(); | |
| 3114 | 3139 | fixup_device_tree_efika(); |
| 3115 | 3140 | fixup_device_tree_pasemi(); |
| 3116 | 3141 | } |
| @@ -10,7 +10,6 @@ · 9 unmodified lines | ||
| 10 | 10 | #include <linux/memblock.h> |
| 11 | 11 | #include <linux/mem_encrypt.h> |
| 12 | 12 | #include <linux/cc_platform.h> |
| 13 | −#include <linux/mem_encrypt.h> | |
| 14 | 13 | #include <asm/machdep.h> |
| 15 | 14 | #include <asm/svm.h> |
| 16 | 15 | #include <asm/swiotlb.h> |
| @@ -32,6 +32,7 @@ config RISCV · 31 unmodified lines | ||
| 32 | 32 | select ARCH_HAS_FORTIFY_SOURCE |
| 33 | 33 | select ARCH_HAS_GCOV_PROFILE_ALL |
| 34 | 34 | select ARCH_HAS_GIGANTIC_PAGE |
| 35 | + select ARCH_HAS_HW_PTE_YOUNG | |
| 35 | 36 | select ARCH_HAS_KCOV |
| 36 | 37 | select ARCH_HAS_KERNEL_FPU_SUPPORT if 64BIT && FPU |
| 37 | 38 | select ARCH_HAS_MEMBARRIER_CALLBACKS |
| @@ -83,6 +84,7 @@ config RISCV · 45 unmodified lines | ||
| 83 | 84 | select ARCH_WANT_OPTIMIZE_HUGETLB_VMEMMAP |
| 84 | 85 | select ARCH_WANTS_NO_INSTR |
| 85 | 86 | select ARCH_WANTS_THP_SWAP if HAVE_ARCH_TRANSPARENT_HUGEPAGE |
| 87 | + select ARCH_WEAK_RELEASE_ACQUIRE if ARCH_USE_QUEUED_SPINLOCKS | |
| 86 | 88 | select BINFMT_FLAT_NO_DATA_START_OFFSET if !MMU |
| 87 | 89 | select BUILDTIME_TABLE_SORT if MMU |
| 88 | 90 | select CLINT_TIMER if RISCV_M_MODE |
| @@ -116,6 +118,7 @@ config RISCV · 27 unmodified lines | ||
| 116 | 118 | select GENERIC_VDSO_TIME_NS if HAVE_GENERIC_VDSO |
| 117 | 119 | select HARDIRQS_SW_RESEND |
| 118 | 120 | select HAS_IOPORT if MMU |
| 121 | + select HAVE_ALIGNED_STRUCT_PAGE | |
| 119 | 122 | select HAVE_ARCH_AUDITSYSCALL |
| 120 | 123 | select HAVE_ARCH_HUGE_VMALLOC if HAVE_ARCH_HUGE_VMAP |
| 121 | 124 | select HAVE_ARCH_HUGE_VMAP if MMU && 64BIT |
| @@ -507,6 +510,39 @@ config NODES_SHIFT · 385 unmodified lines | ||
| 507 | 510 | Specify the maximum number of NUMA Nodes available on the target |
| 508 | 511 | system. Increases memory reserved to accommodate various tables. |
| 509 | 512 | |
| 513 | +choice | |
| 514 | + prompt "RISC-V spinlock type" | |
| 515 | + default RISCV_COMBO_SPINLOCKS | |
| 516 | + | |
| 517 | +config RISCV_TICKET_SPINLOCKS | |
| 518 | + bool "Using ticket spinlock" | |
| 519 | + | |
| 520 | +config RISCV_QUEUED_SPINLOCKS | |
| 521 | + bool "Using queued spinlock" | |
| 522 | + depends on SMP && MMU && NONPORTABLE | |
| 523 | + select ARCH_USE_QUEUED_SPINLOCKS | |
| 524 | + help | |
| 525 | + The queued spinlock implementation requires the forward progress | |
| 526 | + guarantee of cmpxchg()/xchg() atomic operations: CAS with Zabha or | |
| 527 | + LR/SC with Ziccrse provide such guarantee. | |
| 528 | + | |
| 529 | + Select this if and only if Zabha or Ziccrse is available on your | |
| 530 | + platform, RISCV_QUEUED_SPINLOCKS must not be selected for platforms | |
| 531 | + without one of those extensions. | |
| 532 | + | |
| 533 | + If unsure, select RISCV_COMBO_SPINLOCKS, which will use qspinlocks | |
| 534 | + when supported and otherwise ticket spinlocks. | |
| 535 | + | |
| 536 | +config RISCV_COMBO_SPINLOCKS | |
| 537 | + bool "Using combo spinlock" | |
| 538 | + depends on SMP && MMU | |
| 539 | + select ARCH_USE_QUEUED_SPINLOCKS | |
| 540 | + help | |
| 541 | + Embed both queued spinlock and ticket lock so that the spinlock | |
| 542 | + implementation can be chosen at runtime. | |
| 543 | + | |
| 544 | +endchoice | |
| 545 | + | |
| 510 | 546 | config RISCV_ALTERNATIVE |
| 511 | 547 | bool |
| 512 | 548 | depends on !XIP_KERNEL |
| @@ -532,6 +568,17 @@ config RISCV_ISA_C · 19 unmodified lines | ||
| 532 | 568 | |
| 533 | 569 | If you don't know what to do here, say Y. |
| 534 | 570 | |
| 571 | +config RISCV_ISA_SUPM | |
| 572 | + bool "Supm extension for userspace pointer masking" | |
| 573 | + depends on 64BIT | |
| 574 | + default y | |
| 575 | + help | |
| 576 | + Add support for pointer masking in userspace (Supm) when the | |
| 577 | + underlying hardware extension (Smnpm or Ssnpm) is detected at boot. | |
| 578 | + | |
| 579 | + If this option is disabled, userspace will be unable to use | |
| 580 | + the prctl(PR_{SET,GET}_TAGGED_ADDR_CTRL) API. | |
| 581 | + | |
| 535 | 582 | config RISCV_ISA_SVNAPOT |
| 536 | 583 | bool "Svnapot extension support for supervisor mode NAPOT pages" |
| 537 | 584 | depends on 64BIT && MMU |
| @@ -633,6 +680,40 @@ config RISCV_ISA_ZAWRS · 95 unmodified lines | ||
| 633 | 680 | use of these instructions in the kernel when the Zawrs extension is |
| 634 | 681 | detected at boot. |
| 635 | 682 | |
| 683 | +config TOOLCHAIN_HAS_ZABHA | |
| 684 | + bool | |
| 685 | + default y | |
| 686 | + depends on !64BIT || $(cc-option,-mabi=lp64 -march=rv64ima_zabha) | |
| 687 | + depends on !32BIT || $(cc-option,-mabi=ilp32 -march=rv32ima_zabha) | |
| 688 | + depends on AS_HAS_OPTION_ARCH | |
| 689 | + | |
| 690 | +config RISCV_ISA_ZABHA | |
| 691 | + bool "Zabha extension support for atomic byte/halfword operations" | |
| 692 | + depends on TOOLCHAIN_HAS_ZABHA | |
| 693 | + depends on RISCV_ALTERNATIVE | |
| 694 | + default y | |
| 695 | + help | |
| 696 | + Enable the use of the Zabha ISA-extension to implement kernel | |
| 697 | + byte/halfword atomic memory operations when it is detected at boot. | |
| 698 | + | |
| 699 | + If you don't know what to do here, say Y. | |
| 700 | + | |
| 701 | +config TOOLCHAIN_HAS_ZACAS | |
| 702 | + bool | |
| 703 | + default y | |
| 704 | + depends on !64BIT || $(cc-option,-mabi=lp64 -march=rv64ima_zacas) | |
| 705 | + depends on !32BIT || $(cc-option,-mabi=ilp32 -march=rv32ima_zacas) | |
| 706 | + depends on AS_HAS_OPTION_ARCH | |
| 707 | + | |
| 708 | +config RISCV_ISA_ZACAS | |
| 709 | + bool "Zacas extension support for atomic CAS" | |
| 710 | + depends on TOOLCHAIN_HAS_ZACAS | |
| 711 | + depends on RISCV_ALTERNATIVE | |
| 712 | + default y | |
| 713 | + help | |
| 714 | + Enable the use of the Zacas ISA-extension to implement kernel atomic | |
| 715 | + cmpxchg operations when it is detected at boot. | |
| 716 | + | |
| 636 | 717 | If you don't know what to do here, say Y. |
| 637 | 718 | |
| 638 | 719 | config TOOLCHAIN_HAS_ZBB |
| @@ -786,10 +867,24 @@ config THREAD_SIZE_ORDER · 147 unmodified lines | ||
| 786 | 867 | |
| 787 | 868 | config RISCV_MISALIGNED |
| 788 | 869 | bool |
| 870 | + help | |
| 871 | + Embed support for detecting and emulating misaligned | |
| 872 | + scalar or vector loads and stores. | |
| 873 | + | |
| 874 | +config RISCV_SCALAR_MISALIGNED | |
| 875 | + bool | |
| 876 | + select RISCV_MISALIGNED | |
| 789 | 877 | select SYSCTL_ARCH_UNALIGN_ALLOW |
| 790 | 878 | help |
| 791 | 879 | Embed support for emulating misaligned loads and stores. |
| 792 | 880 | |
| 881 | +config RISCV_VECTOR_MISALIGNED | |
| 882 | + bool | |
| 883 | + select RISCV_MISALIGNED | |
| 884 | + depends on RISCV_ISA_V | |
| 885 | + help | |
| 886 | + Enable detecting support for vector misaligned loads and stores. | |
| 887 | + | |
| 793 | 888 | choice |
| 794 | 889 | prompt "Unaligned Accesses Support" |
| 795 | 890 | default RISCV_PROBE_UNALIGNED_ACCESS |
| @@ -801,7 +896,7 @@ choice · 5 unmodified lines | ||
| 801 | 896 | |
| 802 | 897 | config RISCV_PROBE_UNALIGNED_ACCESS |
| 803 | 898 | bool "Probe for hardware unaligned access support" |
| 804 | − select RISCV_MISALIGNED | |
| 899 | + select RISCV_SCALAR_MISALIGNED | |
| 805 | 900 | help |
| 806 | 901 | During boot, the kernel will run a series of tests to determine the |
| 807 | 902 | speed of unaligned accesses. This probing will dynamically determine |
| @@ -812,7 +907,7 @@ config RISCV_PROBE_UNALIGNED_ACCESS · 4 unmodified lines | ||
| 812 | 907 | |
| 813 | 908 | config RISCV_EMULATED_UNALIGNED_ACCESS |
| 814 | 909 | bool "Emulate unaligned access where system support is missing" |
| 815 | − select RISCV_MISALIGNED | |
| 910 | + select RISCV_SCALAR_MISALIGNED | |
| 816 | 911 | help |
| 817 | 912 | If unaligned memory accesses trap into the kernel as they are not |
| 818 | 913 | supported by the system, the kernel will emulate the unaligned |
| @@ -841,6 +936,46 @@ config RISCV_EFFICIENT_UNALIGNED_ACCESS · 22 unmodified lines | ||
| 841 | 936 | |
| 842 | 937 | endchoice |
| 843 | 938 | |
| 939 | +choice | |
| 940 | + prompt "Vector unaligned Accesses Support" | |
| 941 | + depends on RISCV_ISA_V | |
| 942 | + default RISCV_PROBE_VECTOR_UNALIGNED_ACCESS | |
| 943 | + help | |
| 944 | + This determines the level of support for vector unaligned accesses. This | |
| 945 | + information is used by the kernel to perform optimizations. It is also | |
| 946 | + exposed to user space via the hwprobe syscall. The hardware will be | |
| 947 | + probed at boot by default. | |
| 948 | + | |
| 949 | +config RISCV_PROBE_VECTOR_UNALIGNED_ACCESS | |
| 950 | + bool "Probe speed of vector unaligned accesses" | |
| 951 | + select RISCV_VECTOR_MISALIGNED | |
| 952 | + depends on RISCV_ISA_V | |
| 953 | + help | |
| 954 | + During boot, the kernel will run a series of tests to determine the | |
| 955 | + speed of vector unaligned accesses if they are supported. This probing | |
| 956 | + will dynamically determine the speed of vector unaligned accesses on | |
| 957 | + the underlying system if they are supported. | |
| 958 | + | |
| 959 | +config RISCV_SLOW_VECTOR_UNALIGNED_ACCESS | |
| 960 | + bool "Assume the system supports slow vector unaligned memory accesses" | |
| 961 | + depends on NONPORTABLE | |
| 962 | + help | |
| 963 | + Assume that the system supports slow vector unaligned memory accesses. The | |
| 964 | + kernel and userspace programs may not be able to run at all on systems | |
| 965 | + that do not support unaligned memory accesses. | |
| 966 | + | |
| 967 | +config RISCV_EFFICIENT_VECTOR_UNALIGNED_ACCESS | |
| 968 | + bool "Assume the system supports fast vector unaligned memory accesses" | |
| 969 | + depends on NONPORTABLE | |
| 970 | + help | |
| 971 | + Assume that the system supports fast vector unaligned memory accesses. When | |
| 972 | + enabled, this option improves the performance of the kernel on such | |
| 973 | + systems. However, the kernel and userspace programs will run much more | |
| 974 | + slowly, or will not be able to run at all, on systems that do not | |
| 975 | + support efficient unaligned memory accesses. | |
| 976 | + | |
| 977 | +endchoice | |
| 978 | + | |
| 844 | 979 | source "arch/riscv/Kconfig.vendor" |
| 845 | 980 | |
| 846 | 981 | endmenu # "Platform type" |
| @@ -82,6 +82,12 @@ else · 81 unmodified lines | ||
| 82 | 82 | riscv-march-$(CONFIG_TOOLCHAIN_NEEDS_EXPLICIT_ZICSR_ZIFENCEI) := $(riscv-march-y)_zicsr_zifencei |
| 83 | 83 | endif |
| 84 | 84 | |
| 85 | +# Check if the toolchain supports Zacas | |
| 86 | +riscv-march-$(CONFIG_TOOLCHAIN_HAS_ZACAS) := $(riscv-march-y)_zacas | |
| 87 | + | |
| 88 | +# Check if the toolchain supports Zabha | |
| 89 | +riscv-march-$(CONFIG_TOOLCHAIN_HAS_ZABHA) := $(riscv-march-y)_zabha | |
| 90 | + | |
| 85 | 91 | # Remove F,D,V from isa string for all. Keep extensions between "fd" and "v" by |
| 86 | 92 | # matching non-v and non-multi-letter extensions out with the filter ([^v_]*) |
| 87 | 93 | KBUILD_CFLAGS += -march=$(shell echo $(riscv-march-y) | sed -E 's/(rv32ima|rv64ima)fd([^v_]*)v?/\1\2/') |
| @@ -129,7 +135,7 @@ stack_protector_prepare: prepare0 · 41 unmodified lines | ||
| 129 | 135 | -mstack-protector-guard-reg=tp \ |
| 130 | 136 | -mstack-protector-guard-offset=$(shell \ |
| 131 | 137 | awk '{if ($$2 == "TSK_STACK_CANARY") print $$3;}' \ |
| 132 | − include/generated/asm-offsets.h)) | |
| 138 | + $(objtree)/include/generated/asm-offsets.h)) | |
| 133 | 139 | endif |
| 134 | 140 | |
| 135 | 141 | # arch specific predefines for sparse |
| @@ -167,6 +167,7 @@ CONFIG_PINCTRL_SOPHGO_CV1800B=y · 166 unmodified lines | ||
| 167 | 167 | CONFIG_PINCTRL_SOPHGO_CV1812H=y |
| 168 | 168 | CONFIG_PINCTRL_SOPHGO_SG2000=y |
| 169 | 169 | CONFIG_PINCTRL_SOPHGO_SG2002=y |
| 170 | +CONFIG_GPIO_DWAPB=y | |
| 170 | 171 | CONFIG_GPIO_SIFIVE=y |
| 171 | 172 | CONFIG_POWER_RESET_GPIO_RESTART=y |
| 172 | 173 | CONFIG_SENSORS_SFCTEMP=m |
| @@ -6,10 +6,12 @@ generic-y += early_ioremap.h · 5 unmodified lines | ||
| 6 | 6 | generic-y += flat.h |
| 7 | 7 | generic-y += kvm_para.h |
| 8 | 8 | generic-y += mmzone.h |
| 9 | +generic-y += mcs_spinlock.h | |
| 9 | 10 | generic-y += parport.h |
| 10 | −generic-y += spinlock.h | |
| 11 | 11 | generic-y += spinlock_types.h |
| 12 | +generic-y += ticket_spinlock.h | |
| 12 | 13 | generic-y += qrwlock.h |
| 13 | 14 | generic-y += qrwlock_types.h |
| 15 | +generic-y += qspinlock.h | |
| 14 | 16 | generic-y += user.h |
| 15 | 17 | generic-y += vmlinux.lds.h |
| @@ -12,30 +12,43 @@ · 11 unmodified lines | ||
| 12 | 12 | #include <asm/fence.h> |
| 13 | 13 | #include <asm/hwcap.h> |
| 14 | 14 | #include <asm/insn-def.h> |
| 15 | − | |
| 16 | −#define __arch_xchg_masked(sc_sfx, prepend, append, r, p, n) \ | |
| 17 | −({ \ | |
| 18 | − u32 *__ptr32b = (u32 *)((ulong)(p) & ~0x3); \ | |
| 19 | − ulong __s = ((ulong)(p) & (0x4 - sizeof(*p))) * BITS_PER_BYTE; \ | |
| 20 | − ulong __mask = GENMASK(((sizeof(*p)) * BITS_PER_BYTE) - 1, 0) \ | |
| 21 | − << __s; \ | |
| 22 | − ulong __newx = (ulong)(n) << __s; \ | |
| 23 | − ulong __retx; \ | |
| 24 | − ulong __rc; \ | |
| 25 | − \ | |
| 26 | − __asm__ __volatile__ ( \ | |
| 27 | − prepend \ | |
| 28 | − "0: lr.w %0, %2\n" \ | |
| 29 | − " and %1, %0, %z4\n" \ | |
| 30 | − " or %1, %1, %z3\n" \ | |
| 31 | − " sc.w" sc_sfx " %1, %1, %2\n" \ | |
| 32 | − " bnez %1, 0b\n" \ | |
| 33 | − append \ | |
| 34 | − : "=&r" (__retx), "=&r" (__rc), "+A" (*(__ptr32b)) \ | |
| 35 | − : "rJ" (__newx), "rJ" (~__mask) \ | |
| 36 | − : "memory"); \ | |
| 37 | − \ | |
| 38 | − r = (__typeof__(*(p)))((__retx & __mask) >> __s); \ | |
| 15 | +#include <asm/cpufeature-macros.h> | |
| 16 | + | |
| 17 | +#define __arch_xchg_masked(sc_sfx, swap_sfx, prepend, sc_append, \ | |
| 18 | + swap_append, r, p, n) \ | |
| 19 | +({ \ | |
| 20 | + if (IS_ENABLED(CONFIG_RISCV_ISA_ZABHA) && \ | |
| 21 | + riscv_has_extension_unlikely(RISCV_ISA_EXT_ZABHA)) { \ | |
| 22 | + __asm__ __volatile__ ( \ | |
| 23 | + prepend \ | |
| 24 | + " amoswap" swap_sfx " %0, %z2, %1\n" \ | |
| 25 | + swap_append \ | |
| 26 | + : "=&r" (r), "+A" (*(p)) \ | |
| 27 | + : "rJ" (n) \ | |
| 28 | + : "memory"); \ | |
| 29 | + } else { \ | |
| 30 | + u32 *__ptr32b = (u32 *)((ulong)(p) & ~0x3); \ | |
| 31 | + ulong __s = ((ulong)(p) & (0x4 - sizeof(*p))) * BITS_PER_BYTE; \ | |
| 32 | + ulong __mask = GENMASK(((sizeof(*p)) * BITS_PER_BYTE) - 1, 0) \ | |
| 33 | + << __s; \ | |
| 34 | + ulong __newx = (ulong)(n) << __s; \ | |
| 35 | + ulong __retx; \ | |
| 36 | + ulong __rc; \ | |
| 37 | + \ | |
| 38 | + __asm__ __volatile__ ( \ | |
| 39 | + prepend \ | |
| 40 | + "0: lr.w %0, %2\n" \ | |
| 41 | + " and %1, %0, %z4\n" \ | |
| 42 | + " or %1, %1, %z3\n" \ | |
| 43 | + " sc.w" sc_sfx " %1, %1, %2\n" \ | |
| 44 | + " bnez %1, 0b\n" \ | |
| 45 | + sc_append \ | |
| 46 | + : "=&r" (__retx), "=&r" (__rc), "+A" (*(__ptr32b)) \ | |
| 47 | + : "rJ" (__newx), "rJ" (~__mask) \ | |
| 48 | + : "memory"); \ | |
| 49 | + \ | |
| 50 | + r = (__typeof__(*(p)))((__retx & __mask) >> __s); \ | |
| 51 | + } \ | |
| 39 | 52 | }) |
| 40 | 53 | |
| 41 | 54 | #define __arch_xchg(sfx, prepend, append, r, p, n) \ |
| @@ -58,8 +71,13 @@ · 16 unmodified lines | ||
| 58 | 71 | \ |
| 59 | 72 | switch (sizeof(*__ptr)) { \ |
| 60 | 73 | case 1: \ |
| 74 | + __arch_xchg_masked(sc_sfx, ".b" swap_sfx, \ | |
| 75 | + prepend, sc_append, swap_append, \ | |
| 76 | + __ret, __ptr, __new); \ | |
| 77 | + break; \ | |
| 61 | 78 | case 2: \ |
| 62 | − __arch_xchg_masked(sc_sfx, prepend, sc_append, \ | |
| 79 | + __arch_xchg_masked(sc_sfx, ".h" swap_sfx, \ | |
| 80 | + prepend, sc_append, swap_append, \ | |
| 63 | 81 | __ret, __ptr, __new); \ |
| 64 | 82 | break; \ |
| 65 | 83 | case 4: \ |
| @@ -106,55 +124,90 @@ · 40 unmodified lines | ||
| 106 | 124 | * store NEW in MEM. Return the initial value in MEM. Success is |
| 107 | 125 | * indicated by comparing RETURN with OLD. |
| 108 | 126 | */ |
| 109 | − | |
| 110 | −#define __arch_cmpxchg_masked(sc_sfx, prepend, append, r, p, o, n) \ | |
| 111 | −({ \ | |
| 112 | − u32 *__ptr32b = (u32 *)((ulong)(p) & ~0x3); \ | |
| 113 | − ulong __s = ((ulong)(p) & (0x4 - sizeof(*p))) * BITS_PER_BYTE; \ | |
| 114 | − ulong __mask = GENMASK(((sizeof(*p)) * BITS_PER_BYTE) - 1, 0) \ | |
| 115 | − << __s; \ | |
| 116 | − ulong __newx = (ulong)(n) << __s; \ | |
| 117 | − ulong __oldx = (ulong)(o) << __s; \ | |
| 118 | − ulong __retx; \ | |
| 119 | − ulong __rc; \ | |
| 120 | − \ | |
| 121 | − __asm__ __volatile__ ( \ | |
| 122 | − prepend \ | |
| 123 | − "0: lr.w %0, %2\n" \ | |
| 124 | − " and %1, %0, %z5\n" \ | |
| 125 | − " bne %1, %z3, 1f\n" \ | |
| 126 | − " and %1, %0, %z6\n" \ | |
| 127 | − " or %1, %1, %z4\n" \ | |
| 128 | − " sc.w" sc_sfx " %1, %1, %2\n" \ | |
| 129 | − " bnez %1, 0b\n" \ | |
| 130 | − append \ | |
| 131 | − "1:\n" \ | |
| 132 | − : "=&r" (__retx), "=&r" (__rc), "+A" (*(__ptr32b)) \ | |
| 133 | − : "rJ" ((long)__oldx), "rJ" (__newx), \ | |
| 134 | − "rJ" (__mask), "rJ" (~__mask) \ | |
| 135 | − : "memory"); \ | |
| 136 | − \ | |
| 137 | − r = (__typeof__(*(p)))((__retx & __mask) >> __s); \ | |
| 127 | +#define __arch_cmpxchg_masked(sc_sfx, cas_sfx, \ | |
| 128 | + sc_prepend, sc_append, \ | |
| 129 | + cas_prepend, cas_append, \ | |
| 130 | + r, p, o, n) \ | |
| 131 | +({ \ | |
| 132 | + if (IS_ENABLED(CONFIG_RISCV_ISA_ZABHA) && \ | |
| 133 | + IS_ENABLED(CONFIG_RISCV_ISA_ZACAS) && \ | |
| 134 | + riscv_has_extension_unlikely(RISCV_ISA_EXT_ZABHA) && \ | |
| 135 | + riscv_has_extension_unlikely(RISCV_ISA_EXT_ZACAS)) { \ | |
| 136 | + r = o; \ | |
| 137 | + \ | |
| 138 | + __asm__ __volatile__ ( \ | |
| 139 | + cas_prepend \ | |
| 140 | + " amocas" cas_sfx " %0, %z2, %1\n" \ | |
| 141 | + cas_append \ | |
| 142 | + : "+&r" (r), "+A" (*(p)) \ | |
| 143 | + : "rJ" (n) \ | |
| 144 | + : "memory"); \ | |
| 145 | + } else { \ | |
| 146 | + u32 *__ptr32b = (u32 *)((ulong)(p) & ~0x3); \ | |
| 147 | + ulong __s = ((ulong)(p) & (0x4 - sizeof(*p))) * BITS_PER_BYTE; \ | |
| 148 | + ulong __mask = GENMASK(((sizeof(*p)) * BITS_PER_BYTE) - 1, 0) \ | |
| 149 | + << __s; \ | |
| 150 | + ulong __newx = (ulong)(n) << __s; \ | |
| 151 | + ulong __oldx = (ulong)(o) << __s; \ | |
| 152 | + ulong __retx; \ | |
| 153 | + ulong __rc; \ | |
| 154 | + \ | |
| 155 | + __asm__ __volatile__ ( \ | |
| 156 | + sc_prepend \ | |
| 157 | + "0: lr.w %0, %2\n" \ | |
| 158 | + " and %1, %0, %z5\n" \ | |
| 159 | + " bne %1, %z3, 1f\n" \ | |
| 160 | + " and %1, %0, %z6\n" \ | |
| 161 | + " or %1, %1, %z4\n" \ | |
| 162 | + " sc.w" sc_sfx " %1, %1, %2\n" \ | |
| 163 | + " bnez %1, 0b\n" \ | |
| 164 | + sc_append \ | |
| 165 | + "1:\n" \ | |
| 166 | + : "=&r" (__retx), "=&r" (__rc), "+A" (*(__ptr32b)) \ | |
| 167 | + : "rJ" ((long)__oldx), "rJ" (__newx), \ | |
| 168 | + "rJ" (__mask), "rJ" (~__mask) \ | |
| 169 | + : "memory"); \ | |
| 170 | + \ | |
| 171 | + r = (__typeof__(*(p)))((__retx & __mask) >> __s); \ | |
| 172 | + } \ | |
| 138 | 173 | }) |
| 139 | 174 | |
| 140 | −#define __arch_cmpxchg(lr_sfx, sc_sfx, prepend, append, r, p, co, o, n) \ | |
| 175 | +#define __arch_cmpxchg(lr_sfx, sc_sfx, cas_sfx, \ | |
| 176 | + sc_prepend, sc_append, \ | |
| 177 | + cas_prepend, cas_append, \ | |
| 178 | + r, p, co, o, n) \ | |
| 141 | 179 | ({ \ |
| 142 | − register unsigned int __rc; \ | |
| 180 | + if (IS_ENABLED(CONFIG_RISCV_ISA_ZACAS) && \ | |
| 181 | + riscv_has_extension_unlikely(RISCV_ISA_EXT_ZACAS)) { \ | |
| 182 | + r = o; \ | |
| 143 | 183 | \ |
| 144 | − __asm__ __volatile__ ( \ | |
| 145 | − prepend \ | |
| 146 | − "0: lr" lr_sfx " %0, %2\n" \ | |
| 147 | − " bne %0, %z3, 1f\n" \ | |
| 148 | − " sc" sc_sfx " %1, %z4, %2\n" \ | |
| 149 | − " bnez %1, 0b\n" \ | |
| 150 | − append \ | |
| 151 | − "1:\n" \ | |
| 152 | − : "=&r" (r), "=&r" (__rc), "+A" (*(p)) \ | |
| 153 | − : "rJ" (co o), "rJ" (n) \ | |
| 154 | − : "memory"); \ | |
| 184 | + __asm__ __volatile__ ( \ | |
| 185 | + cas_prepend \ | |
| 186 | + " amocas" cas_sfx " %0, %z2, %1\n" \ | |
| 187 | + cas_append \ | |
| 188 | + : "+&r" (r), "+A" (*(p)) \ | |
| 189 | + : "rJ" (n) \ | |
| 190 | + : "memory"); \ | |
| 191 | + } else { \ | |
| 192 | + register unsigned int __rc; \ | |
| 193 | + \ | |
| 194 | + __asm__ __volatile__ ( \ | |
| 195 | + sc_prepend \ | |
| 196 | + "0: lr" lr_sfx " %0, %2\n" \ | |
| 197 | + " bne %0, %z3, 1f\n" \ | |
| 198 | + " sc" sc_sfx " %1, %z4, %2\n" \ | |
| 199 | + " bnez %1, 0b\n" \ | |
| 200 | + sc_append \ | |
| 201 | + "1:\n" \ | |
| 202 | + : "=&r" (r), "=&r" (__rc), "+A" (*(p)) \ | |
| 203 | + : "rJ" (co o), "rJ" (n) \ | |
| 204 | + : "memory"); \ | |
| 205 | + } \ | |
| 155 | 206 | }) |
| 156 | 207 | |
| 157 | −#define _arch_cmpxchg(ptr, old, new, sc_sfx, prepend, append) \ | |
| 208 | +#define _arch_cmpxchg(ptr, old, new, sc_sfx, cas_sfx, \ | |
| 209 | + sc_prepend, sc_append, \ | |
| 210 | + cas_prepend, cas_append) \ | |
| 158 | 211 | ({ \ |
| 159 | 212 | __typeof__(ptr) __ptr = (ptr); \ |
| 160 | 213 | __typeof__(*(__ptr)) __old = (old); \ |
| @@ -163,17 +216,28 @@ · 2 unmodified lines | ||
| 163 | 216 | \ |
| 164 | 217 | switch (sizeof(*__ptr)) { \ |
| 165 | 218 | case 1: \ |
| 219 | + __arch_cmpxchg_masked(sc_sfx, ".b" cas_sfx, \ | |
| 220 | + sc_prepend, sc_append, \ | |
| 221 | + cas_prepend, cas_append, \ | |
| 222 | + __ret, __ptr, __old, __new); \ | |
| 223 | + break; \ | |
| 166 | 224 | case 2: \ |
| 167 | − __arch_cmpxchg_masked(sc_sfx, prepend, append, \ | |
| 168 | − __ret, __ptr, __old, __new); \ | |
| 225 | + __arch_cmpxchg_masked(sc_sfx, ".h" cas_sfx, \ | |
| 226 | + sc_prepend, sc_append, \ | |
| 227 | + cas_prepend, cas_append, \ | |
| 228 | + __ret, __ptr, __old, __new); \ | |
| 169 | 229 | break; \ |
| 170 | 230 | case 4: \ |
| 171 | − __arch_cmpxchg(".w", ".w" sc_sfx, prepend, append, \ | |
| 172 | − __ret, __ptr, (long), __old, __new); \ | |
| 231 | + __arch_cmpxchg(".w", ".w" sc_sfx, ".w" cas_sfx, \ | |
| 232 | + sc_prepend, sc_append, \ | |
| 233 | + cas_prepend, cas_append, \ | |
| 234 | + __ret, __ptr, (long), __old, __new); \ | |
| 173 | 235 | break; \ |
| 174 | 236 | case 8: \ |
| 175 | − __arch_cmpxchg(".d", ".d" sc_sfx, prepend, append, \ | |
| 176 | − __ret, __ptr, /**/, __old, __new); \ | |
| 237 | + __arch_cmpxchg(".d", ".d" sc_sfx, ".d" cas_sfx, \ | |
| 238 | + sc_prepend, sc_append, \ | |
| 239 | + cas_prepend, cas_append, \ | |
| 240 | + __ret, __ptr, /**/, __old, __new); \ | |
| 177 | 241 | break; \ |
| 178 | 242 | default: \ |
| 179 | 243 | BUILD_BUG(); \ |
| @@ -181,17 +245,40 @@ · 1 unmodified line | ||
| 181 | 245 | (__typeof__(*(__ptr)))__ret; \ |
| 182 | 246 | }) |
| 183 | 247 | |
| 248 | +/* | |
| 249 | + * These macros are here to improve the readability of the arch_cmpxchg_XXX() | |
| 250 | + * macros. | |
| 251 | + */ | |
| 252 | +#define SC_SFX(x) x | |
| 253 | +#define CAS_SFX(x) x | |
| 254 | +#define SC_PREPEND(x) x | |
| 255 | +#define SC_APPEND(x) x | |
| 256 | +#define CAS_PREPEND(x) x | |
| 257 | +#define CAS_APPEND(x) x | |
| 258 | + | |
| 184 | 259 | #define arch_cmpxchg_relaxed(ptr, o, n) \ |
| 185 | − _arch_cmpxchg((ptr), (o), (n), "", "", "") | |
| 260 | + _arch_cmpxchg((ptr), (o), (n), \ | |
| 261 | + SC_SFX(""), CAS_SFX(""), \ | |
| 262 | + SC_PREPEND(""), SC_APPEND(""), \ | |
| 263 | + CAS_PREPEND(""), CAS_APPEND("")) | |
| 186 | 264 | |
| 187 | 265 | #define arch_cmpxchg_acquire(ptr, o, n) \ |
| 188 | − _arch_cmpxchg((ptr), (o), (n), "", "", RISCV_ACQUIRE_BARRIER) | |
| 266 | + _arch_cmpxchg((ptr), (o), (n), \ | |
| 267 | + SC_SFX(""), CAS_SFX(""), \ | |
| 268 | + SC_PREPEND(""), SC_APPEND(RISCV_ACQUIRE_BARRIER), \ | |
| 269 | + CAS_PREPEND(""), CAS_APPEND(RISCV_ACQUIRE_BARRIER)) | |
| 189 | 270 | |
| 190 | 271 | #define arch_cmpxchg_release(ptr, o, n) \ |
| 191 | − _arch_cmpxchg((ptr), (o), (n), "", RISCV_RELEASE_BARRIER, "") | |
| 272 | + _arch_cmpxchg((ptr), (o), (n), \ | |
| 273 | + SC_SFX(""), CAS_SFX(""), \ | |
| 274 | + SC_PREPEND(RISCV_RELEASE_BARRIER), SC_APPEND(""), \ | |
| 275 | + CAS_PREPEND(RISCV_RELEASE_BARRIER), CAS_APPEND("")) | |
| 192 | 276 | |
| 193 | 277 | #define arch_cmpxchg(ptr, o, n) \ |
| 194 | − _arch_cmpxchg((ptr), (o), (n), ".rl", "", " fence rw, rw\n") | |
| 278 | + _arch_cmpxchg((ptr), (o), (n), \ | |
| 279 | + SC_SFX(".rl"), CAS_SFX(".aqrl"), \ | |
| 280 | + SC_PREPEND(""), SC_APPEND(RISCV_FULL_BARRIER), \ | |
| 281 | + CAS_PREPEND(""), CAS_APPEND("")) | |
| 195 | 282 | |
| 196 | 283 | #define arch_cmpxchg_local(ptr, o, n) \ |
| 197 | 284 | arch_cmpxchg_relaxed((ptr), (o), (n)) |
| @@ -226,6 +313,44 @@ · 28 unmodified lines | ||
| 226 | 313 | arch_cmpxchg_release((ptr), (o), (n)); \ |
| 227 | 314 | }) |
| 228 | 315 | |
| 316 | +#if defined(CONFIG_64BIT) && defined(CONFIG_RISCV_ISA_ZACAS) | |
| 317 | + | |
| 318 | +#define system_has_cmpxchg128() riscv_has_extension_unlikely(RISCV_ISA_EXT_ZACAS) | |
| 319 | + | |
| 320 | +union __u128_halves { | |
| 321 | + u128 full; | |
| 322 | + struct { | |
| 323 | + u64 low, high; | |
| 324 | + }; | |
| 325 | +}; | |
| 326 | + | |
| 327 | +#define __arch_cmpxchg128(p, o, n, cas_sfx) \ | |
| 328 | +({ \ | |
| 329 | + __typeof__(*(p)) __o = (o); \ | |
| 330 | + union __u128_halves __hn = { .full = (n) }; \ | |
| 331 | + union __u128_halves __ho = { .full = (__o) }; \ | |
| 332 | + register unsigned long t1 asm ("t1") = __hn.low; \ | |
| 333 | + register unsigned long t2 asm ("t2") = __hn.high; \ | |
| 334 | + register unsigned long t3 asm ("t3") = __ho.low; \ | |
| 335 | + register unsigned long t4 asm ("t4") = __ho.high; \ | |
| 336 | + \ | |
| 337 | + __asm__ __volatile__ ( \ | |
| 338 | + " amocas.q" cas_sfx " %0, %z3, %2" \ | |
| 339 | + : "+&r" (t3), "+&r" (t4), "+A" (*(p)) \ | |
| 340 | + : "rJ" (t1), "rJ" (t2) \ | |
| 341 | + : "memory"); \ | |
| 342 | + \ | |
| 343 | + ((u128)t4 << 64) | t3; \ | |
| 344 | +}) | |
| 345 | + | |
| 346 | +#define arch_cmpxchg128(ptr, o, n) \ | |
| 347 | + __arch_cmpxchg128((ptr), (o), (n), ".aqrl") | |
| 348 | + | |
| 349 | +#define arch_cmpxchg128_local(ptr, o, n) \ | |
| 350 | + __arch_cmpxchg128((ptr), (o), (n), "") | |
| 351 | + | |
| 352 | +#endif /* CONFIG_64BIT && CONFIG_RISCV_ISA_ZACAS */ | |
| 353 | + | |
| 229 | 354 | #ifdef CONFIG_RISCV_ISA_ZAWRS |
| 230 | 355 | /* |
| 231 | 356 | * Despite wrs.nto being "WRS-with-no-timeout", in the absence of changes to |
| @@ -245,6 +370,11 @@ static __always_inline void __cmpwait(volatile void *ptr, · 13 unmodified lines | ||
| 245 | 370 | : : : : no_zawrs); |
| 246 | 371 | |
| 247 | 372 | switch (size) { |
| 373 | + case 1: | |
| 374 | + fallthrough; | |
| 375 | + case 2: | |
| 376 | + /* RISC-V doesn't have lr instructions on byte and half-word. */ | |
| 377 | + goto no_zawrs; | |
| 248 | 378 | case 4: |
| 249 | 379 | asm volatile( |
| 250 | 380 | " lr.w %0, %1\n" |
| @@ -9,7 +9,6 @@ · 8 unmodified lines | ||
| 9 | 9 | */ |
| 10 | 10 | #include <linux/types.h> |
| 11 | 11 | #include <linux/sched.h> |
| 12 | −#include <linux/sched/task_stack.h> | |
| 13 | 12 | #include <asm-generic/compat.h> |
| 14 | 13 | |
| 15 | 14 | static inline int is_compat_task(void) |
| @@ -0,0 +1,66 @@ | ||
| 1 | +/* SPDX-License-Identifier: GPL-2.0-only */ | |
| 2 | +/* | |
| 3 | + * Copyright 2022-2024 Rivos, Inc | |
| 4 | + */ | |
| 5 | + | |
| 6 | +#ifndef _ASM_CPUFEATURE_MACROS_H | |
| 7 | +#define _ASM_CPUFEATURE_MACROS_H | |
| 8 | + | |
| 9 | +#include <asm/hwcap.h> | |
| 10 | +#include <asm/alternative-macros.h> | |
| 11 | + | |
| 12 | +#define STANDARD_EXT 0 | |
| 13 | + | |
| 14 | +bool __riscv_isa_extension_available(const unsigned long *isa_bitmap, unsigned int bit); | |
| 15 | +#define riscv_isa_extension_available(isa_bitmap, ext) \ | |
| 16 | + __riscv_isa_extension_available(isa_bitmap, RISCV_ISA_EXT_##ext) | |
| 17 | + | |
| 18 | +static __always_inline bool __riscv_has_extension_likely(const unsigned long vendor, | |
| 19 | + const unsigned long ext) | |
| 20 | +{ | |
| 21 | + asm goto(ALTERNATIVE("j %l[l_no]", "nop", %[vendor], %[ext], 1) | |
| 22 | + : | |
| 23 | + : [vendor] "i" (vendor), [ext] "i" (ext) | |
| 24 | + : | |
| 25 | + : l_no); | |
| 26 | + | |
| 27 | + return true; | |
| 28 | +l_no: | |
| 29 | + return false; | |
| 30 | +} | |
| 31 | + | |
| 32 | +static __always_inline bool __riscv_has_extension_unlikely(const unsigned long vendor, | |
| 33 | + const unsigned long ext) | |
| 34 | +{ | |
| 35 | + asm goto(ALTERNATIVE("nop", "j %l[l_yes]", %[vendor], %[ext], 1) | |
| 36 | + : | |
| 37 | + : [vendor] "i" (vendor), [ext] "i" (ext) | |
| 38 | + : | |
| 39 | + : l_yes); | |
| 40 | + | |
| 41 | + return false; | |
| 42 | +l_yes: | |
| 43 | + return true; | |
| 44 | +} | |
| 45 | + | |
| 46 | +static __always_inline bool riscv_has_extension_unlikely(const unsigned long ext) | |
| 47 | +{ | |
| 48 | + compiletime_assert(ext < RISCV_ISA_EXT_MAX, "ext must be < RISCV_ISA_EXT_MAX"); | |
| 49 | + | |
| 50 | + if (IS_ENABLED(CONFIG_RISCV_ALTERNATIVE)) | |
| 51 | + return __riscv_has_extension_unlikely(STANDARD_EXT, ext); | |
| 52 | + | |
| 53 | + return __riscv_isa_extension_available(NULL, ext); | |
| 54 | +} | |
| 55 | + | |
| 56 | +static __always_inline bool riscv_has_extension_likely(const unsigned long ext) | |
| 57 | +{ | |
| 58 | + compiletime_assert(ext < RISCV_ISA_EXT_MAX, "ext must be < RISCV_ISA_EXT_MAX"); | |
| 59 | + | |
| 60 | + if (IS_ENABLED(CONFIG_RISCV_ALTERNATIVE)) | |
| 61 | + return __riscv_has_extension_likely(STANDARD_EXT, ext); | |
| 62 | + | |
| 63 | + return __riscv_isa_extension_available(NULL, ext); | |
| 64 | +} | |
| 65 | + | |
| 66 | +#endif /* _ASM_CPUFEATURE_MACROS_H */ | |
| @@ -8,9 +8,12 @@ · 7 unmodified lines | ||
| 8 | 8 | |
| 9 | 9 | #include <linux/bitmap.h> |
| 10 | 10 | #include <linux/jump_label.h> |
| 11 | +#include <linux/workqueue.h> | |
| 12 | +#include <linux/kconfig.h> | |
| 13 | +#include <linux/percpu-defs.h> | |
| 14 | +#include <linux/threads.h> | |
| 11 | 15 | #include <asm/hwcap.h> |
| 12 | −#include <asm/alternative-macros.h> | |
| 13 | −#include <asm/errno.h> | |
| 16 | +#include <asm/cpufeature-macros.h> | |
| 14 | 17 | |
| 15 | 18 | /* |
| 16 | 19 | * These are probed via a device_initcall(), via either the SBI or directly |
| @@ -31,7 +34,7 @@ DECLARE_PER_CPU(struct riscv_cpuinfo, riscv_cpuinfo); · 14 unmodified lines | ||
| 31 | 34 | /* Per-cpu ISA extensions. */ |
| 32 | 35 | extern struct riscv_isainfo hart_isa[NR_CPUS]; |
| 33 | 36 | |
| 34 | −void riscv_user_isa_enable(void); | |
| 37 | +void __init riscv_user_isa_enable(void); | |
| 35 | 38 | |
| 36 | 39 | #define _RISCV_ISA_EXT_DATA(_name, _id, _subset_exts, _subset_exts_size, _validate) { \ |
| 37 | 40 | .name = #_name, \ |
| @@ -58,8 +61,9 @@ void riscv_user_isa_enable(void); · 20 unmodified lines | ||
| 58 | 61 | #define __RISCV_ISA_EXT_SUPERSET_VALIDATE(_name, _id, _sub_exts, _validate) \ |
| 59 | 62 | _RISCV_ISA_EXT_DATA(_name, _id, _sub_exts, ARRAY_SIZE(_sub_exts), _validate) |
| 60 | 63 | |
| 61 | −#if defined(CONFIG_RISCV_MISALIGNED) | |
| 62 | 64 | bool check_unaligned_access_emulated_all_cpus(void); |
| 65 | +#if defined(CONFIG_RISCV_SCALAR_MISALIGNED) | |
| 66 | +void check_unaligned_access_emulated(struct work_struct *work __always_unused); | |
| 63 | 67 | void unaligned_emulation_finish(void); |
| 64 | 68 | bool unaligned_ctl_available(void); |
| 65 | 69 | DECLARE_PER_CPU(long, misaligned_access_speed); |
| @@ -70,6 +74,12 @@ static inline bool unaligned_ctl_available(void) · 4 unmodified lines | ||
| 70 | 74 | } |
| 71 | 75 | #endif |
| 72 | 76 | |
| 77 | +bool check_vector_unaligned_access_emulated_all_cpus(void); | |
| 78 | +#if defined(CONFIG_RISCV_VECTOR_MISALIGNED) | |
| 79 | +void check_vector_unaligned_access_emulated(struct work_struct *work __always_unused); | |
| 80 | +DECLARE_PER_CPU(long, vector_misaligned_access); | |
| 81 | +#endif | |
| 82 | + | |
| 73 | 83 | #if defined(CONFIG_RISCV_PROBE_UNALIGNED_ACCESS) |
| 74 | 84 | DECLARE_STATIC_KEY_FALSE(fast_unaligned_access_speed_key); |
| 75 | 85 | |
| @@ -103,61 +113,6 @@ extern const size_t riscv_isa_ext_count; · 27 unmodified lines | ||
| 103 | 113 | extern bool riscv_isa_fallback; |
| 104 | 114 | |
| 105 | 115 | unsigned long riscv_isa_extension_base(const unsigned long *isa_bitmap); |
| 106 | − | |
| 107 | −#define STANDARD_EXT 0 | |
| 108 | − | |
| 109 | −bool __riscv_isa_extension_available(const unsigned long *isa_bitmap, unsigned int bit); | |
| 110 | −#define riscv_isa_extension_available(isa_bitmap, ext) \ | |
| 111 | − __riscv_isa_extension_available(isa_bitmap, RISCV_ISA_EXT_##ext) | |
| 112 | − | |
| 113 | −static __always_inline bool __riscv_has_extension_likely(const unsigned long vendor, | |
| 114 | − const unsigned long ext) | |
| 115 | −{ | |
| 116 | − asm goto(ALTERNATIVE("j %l[l_no]", "nop", %[vendor], %[ext], 1) | |
| 117 | − : | |
| 118 | − : [vendor] "i" (vendor), [ext] "i" (ext) | |
| 119 | − : | |
| 120 | − : l_no); | |
| 121 | − | |
| 122 | − return true; | |
| 123 | −l_no: | |
| 124 | − return false; | |
| 125 | −} | |
| 126 | − | |
| 127 | −static __always_inline bool __riscv_has_extension_unlikely(const unsigned long vendor, | |
| 128 | − const unsigned long ext) | |
| 129 | −{ | |
| 130 | − asm goto(ALTERNATIVE("nop", "j %l[l_yes]", %[vendor], %[ext], 1) | |
| 131 | − : | |
| 132 | − : [vendor] "i" (vendor), [ext] "i" (ext) | |
| 133 | − : | |
| 134 | − : l_yes); | |
| 135 | − | |
| 136 | − return false; | |
| 137 | −l_yes: | |
| 138 | − return true; | |
| 139 | −} | |
| 140 | − | |
| 141 | −static __always_inline bool riscv_has_extension_unlikely(const unsigned long ext) | |
| 142 | −{ | |
| 143 | − compiletime_assert(ext < RISCV_ISA_EXT_MAX, "ext must be < RISCV_ISA_EXT_MAX"); | |
| 144 | − | |
| 145 | − if (IS_ENABLED(CONFIG_RISCV_ALTERNATIVE)) | |
| 146 | − return __riscv_has_extension_unlikely(STANDARD_EXT, ext); | |
| 147 | − | |
| 148 | − return __riscv_isa_extension_available(NULL, ext); | |
| 149 | −} | |
| 150 | − | |
| 151 | −static __always_inline bool riscv_has_extension_likely(const unsigned long ext) | |
| 152 | −{ | |
| 153 | − compiletime_assert(ext < RISCV_ISA_EXT_MAX, "ext must be < RISCV_ISA_EXT_MAX"); | |
| 154 | − | |
| 155 | − if (IS_ENABLED(CONFIG_RISCV_ALTERNATIVE)) | |
| 156 | − return __riscv_has_extension_likely(STANDARD_EXT, ext); | |
| 157 | − | |
| 158 | − return __riscv_isa_extension_available(NULL, ext); | |
| 159 | −} | |
| 160 | − | |
| 161 | 116 | static __always_inline bool riscv_cpu_has_extension_likely(int cpu, const unsigned long ext) |
| 162 | 117 | { |
| 163 | 118 | compiletime_assert(ext < RISCV_ISA_EXT_MAX, "ext must be < RISCV_ISA_EXT_MAX"); |
| @@ -119,6 +119,10 @@ · 118 unmodified lines | ||
| 119 | 119 | |
| 120 | 120 | /* HSTATUS flags */ |
| 121 | 121 | #ifdef CONFIG_64BIT |
| 122 | +#define HSTATUS_HUPMM _AC(0x3000000000000, UL) | |
| 123 | +#define HSTATUS_HUPMM_PMLEN_0 _AC(0x0000000000000, UL) | |
| 124 | +#define HSTATUS_HUPMM_PMLEN_7 _AC(0x2000000000000, UL) | |
| 125 | +#define HSTATUS_HUPMM_PMLEN_16 _AC(0x3000000000000, UL) | |
| 122 | 126 | #define HSTATUS_VSXL _AC(0x300000000, UL) |
| 123 | 127 | #define HSTATUS_VSXL_SHIFT 32 |
| 124 | 128 | #endif |
| @@ -195,6 +199,11 @@ · 70 unmodified lines | ||
| 195 | 199 | /* xENVCFG flags */ |
| 196 | 200 | #define ENVCFG_STCE (_AC(1, ULL) << 63) |
| 197 | 201 | #define ENVCFG_PBMTE (_AC(1, ULL) << 62) |
| 202 | +#define ENVCFG_ADUE (_AC(1, ULL) << 61) | |
| 203 | +#define ENVCFG_PMM (_AC(0x3, ULL) << 32) | |
| 204 | +#define ENVCFG_PMM_PMLEN_0 (_AC(0x0, ULL) << 32) | |
| 205 | +#define ENVCFG_PMM_PMLEN_7 (_AC(0x2, ULL) << 32) | |
| 206 | +#define ENVCFG_PMM_PMLEN_16 (_AC(0x3, ULL) << 32) | |
| 198 | 207 | #define ENVCFG_CBZE (_AC(1, UL) << 7) |
| 199 | 208 | #define ENVCFG_CBCFE (_AC(1, UL) << 6) |
| 200 | 209 | #define ENVCFG_CBIE_SHIFT 4 |
| @@ -216,6 +225,12 @@ · 15 unmodified lines | ||
| 216 | 225 | #define SMSTATEEN0_SSTATEEN0_SHIFT 63 |
| 217 | 226 | #define SMSTATEEN0_SSTATEEN0 (_ULL(1) << SMSTATEEN0_SSTATEEN0_SHIFT) |
| 218 | 227 | |
| 228 | +/* mseccfg bits */ | |
| 229 | +#define MSECCFG_PMM ENVCFG_PMM | |
| 230 | +#define MSECCFG_PMM_PMLEN_0 ENVCFG_PMM_PMLEN_0 | |
| 231 | +#define MSECCFG_PMM_PMLEN_7 ENVCFG_PMM_PMLEN_7 | |
| 232 | +#define MSECCFG_PMM_PMLEN_16 ENVCFG_PMM_PMLEN_16 | |
| 233 | + | |
| 219 | 234 | /* symbolic CSR names: */ |
| 220 | 235 | #define CSR_CYCLE 0xc00 |
| 221 | 236 | #define CSR_TIME 0xc01 |
| @@ -382,6 +397,8 @@ · 160 unmodified lines | ||
| 382 | 397 | #define CSR_MIP 0x344 |
| 383 | 398 | #define CSR_PMPCFG0 0x3a0 |
| 384 | 399 | #define CSR_PMPADDR0 0x3b0 |
| 400 | +#define CSR_MSECCFG 0x747 | |
| 401 | +#define CSR_MSECCFGH 0x757 | |
| 385 | 402 | #define CSR_MVENDORID 0xf11 |
| 386 | 403 | #define CSR_MARCHID 0xf12 |
| 387 | 404 | #define CSR_MIMPID 0xf13 |
| @@ -33,6 +33,7 @@ static inline int handle_misaligned_load(struct pt_regs *regs) · 32 unmodified lines | ||
| 33 | 33 | { |
| 34 | 34 | return -1; |
| 35 | 35 | } |
| 36 | + | |
| 36 | 37 | static inline int handle_misaligned_store(struct pt_regs *regs) |
| 37 | 38 | { |
| 38 | 39 | return -1; |
| @@ -93,6 +93,13 @@ · 92 unmodified lines | ||
| 93 | 93 | #define RISCV_ISA_EXT_ZCMOP 84 |
| 94 | 94 | #define RISCV_ISA_EXT_ZAWRS 85 |
| 95 | 95 | #define RISCV_ISA_EXT_SVVPTC 86 |
| 96 | +#define RISCV_ISA_EXT_SMMPM 87 | |
| 97 | +#define RISCV_ISA_EXT_SMNPM 88 | |
| 98 | +#define RISCV_ISA_EXT_SSNPM 89 | |
| 99 | +#define RISCV_ISA_EXT_ZABHA 90 | |
| 100 | +#define RISCV_ISA_EXT_ZICCRSE 91 | |
| 101 | +#define RISCV_ISA_EXT_SVADE 92 | |
| 102 | +#define RISCV_ISA_EXT_SVADU 93 | |
| 96 | 103 | |
| 97 | 104 | #define RISCV_ISA_EXT_XLINUXENVCFG 127 |
| 98 | 105 | |
| @@ -101,8 +108,10 @@ · 2 unmodified lines | ||
| 101 | 108 | |
| 102 | 109 | #ifdef CONFIG_RISCV_M_MODE |
| 103 | 110 | #define RISCV_ISA_EXT_SxAIA RISCV_ISA_EXT_SMAIA |
| 111 | +#define RISCV_ISA_EXT_SUPM RISCV_ISA_EXT_SMNPM | |
| 104 | 112 | #else |
| 105 | 113 | #define RISCV_ISA_EXT_SxAIA RISCV_ISA_EXT_SSAIA |
| 114 | +#define RISCV_ISA_EXT_SUPM RISCV_ISA_EXT_SSNPM | |
| 106 | 115 | #endif |
| 107 | 116 | |
| 108 | 117 | #endif /* _ASM_RISCV_HWCAP_H */ |
| @@ -8,7 +8,7 @@ · 7 unmodified lines | ||
| 8 | 8 | |
| 9 | 9 | #include <uapi/asm/hwprobe.h> |
| 10 | 10 | |
| 11 | −#define RISCV_HWPROBE_MAX_KEY 9 | |
| 11 | +#define RISCV_HWPROBE_MAX_KEY 10 | |
| 12 | 12 | |
| 13 | 13 | static inline bool riscv_hwprobe_key_is_valid(__s64 key) |
| 14 | 14 | { |
| @@ -16,21 +16,28 @@ · 15 unmodified lines | ||
| 16 | 16 | |
| 17 | 17 | #define JUMP_LABEL_NOP_SIZE 4 |
| 18 | 18 | |
| 19 | +#define JUMP_TABLE_ENTRY(key, label) \ | |
| 20 | + ".pushsection __jump_table, \"aw\" \n\t" \ | |
| 21 | + ".align " RISCV_LGPTR " \n\t" \ | |
| 22 | + ".long 1b - ., " label " - . \n\t" \ | |
| 23 | + "" RISCV_PTR " " key " - . \n\t" \ | |
| 24 | + ".popsection \n\t" | |
| 25 | + | |
| 26 | +/* This macro is also expanded on the Rust side. */ | |
| 27 | +#define ARCH_STATIC_BRANCH_ASM(key, label) \ | |
| 28 | + " .align 2 \n\t" \ | |
| 29 | + " .option push \n\t" \ | |
| 30 | + " .option norelax \n\t" \ | |
| 31 | + " .option norvc \n\t" \ | |
| 32 | + "1: nop \n\t" \ | |
| 33 | + " .option pop \n\t" \ | |
| 34 | + JUMP_TABLE_ENTRY(key, label) | |
| 35 | + | |
| 19 | 36 | static __always_inline bool arch_static_branch(struct static_key * const key, |
| 20 | 37 | const bool branch) |
| 21 | 38 | { |
| 22 | 39 | asm goto( |
| 23 | − " .align 2 \n\t" | |
| 24 | − " .option push \n\t" | |
| 25 | − " .option norelax \n\t" | |
| 26 | − " .option norvc \n\t" | |
| 27 | − "1: nop \n\t" | |
| 28 | − " .option pop \n\t" | |
| 29 | − " .pushsection __jump_table, \"aw\" \n\t" | |
| 30 | − " .align " RISCV_LGPTR " \n\t" | |
| 31 | − " .long 1b - ., %l[label] - . \n\t" | |
| 32 | − " " RISCV_PTR " %0 - . \n\t" | |
| 33 | − " .popsection \n\t" | |
| 40 | + ARCH_STATIC_BRANCH_ASM("%0", "%l[label]") | |
| 34 | 41 | : : "i"(&((char *)key)[branch]) : : label); |
| 35 | 42 | |
| 36 | 43 | return false; |
| @@ -38,21 +45,20 @@ label: · 1 unmodified line | ||
| 38 | 45 | return true; |
| 39 | 46 | } |
| 40 | 47 | |
| 48 | +#define ARCH_STATIC_BRANCH_JUMP_ASM(key, label) \ | |
| 49 | + " .align 2 \n\t" \ | |
| 50 | + " .option push \n\t" \ | |
| 51 | + " .option norelax \n\t" \ | |
| 52 | + " .option norvc \n\t" \ | |
| 53 | + "1: j " label " \n\t" \ | |
| 54 | + " .option pop \n\t" \ | |
| 55 | + JUMP_TABLE_ENTRY(key, label) | |
| 56 | + | |
| 41 | 57 | static __always_inline bool arch_static_branch_jump(struct static_key * const key, |
| 42 | 58 | const bool branch) |
| 43 | 59 | { |
| 44 | 60 | asm goto( |
| 45 | − " .align 2 \n\t" | |
| 46 | − " .option push \n\t" | |
| 47 | − " .option norelax \n\t" | |
| 48 | − " .option norvc \n\t" | |
| 49 | − "1: j %l[label] \n\t" | |
| 50 | − " .option pop \n\t" | |
| 51 | − " .pushsection __jump_table, \"aw\" \n\t" | |
| 52 | − " .align " RISCV_LGPTR " \n\t" | |
| 53 | − " .long 1b - ., %l[label] - . \n\t" | |
| 54 | − " " RISCV_PTR " %0 - . \n\t" | |
| 55 | − " .popsection \n\t" | |
| 61 | + ARCH_STATIC_BRANCH_JUMP_ASM("%0", "%l[label]") | |
| 56 | 62 | : : "i"(&((char *)key)[branch]) : : label); |
| 57 | 63 | |
| 58 | 64 | return false; |
| @@ -25,9 +25,16 @@ typedef struct { · 24 unmodified lines | ||
| 25 | 25 | #ifdef CONFIG_BINFMT_ELF_FDPIC |
| 26 | 26 | unsigned long exec_fdpic_loadmap; |
| 27 | 27 | unsigned long interp_fdpic_loadmap; |
| 28 | +#endif | |
| 29 | + unsigned long flags; | |
| 30 | +#ifdef CONFIG_RISCV_ISA_SUPM | |
| 31 | + u8 pmlen; | |
| 28 | 32 | #endif |
| 29 | 33 | } mm_context_t; |
| 30 | 34 | |
| 35 | +/* Lock the pointer masking mode because this mm is multithreaded */ | |
| 36 | +#define MM_CONTEXT_LOCK_PMLEN 0 | |
| 37 | + | |
| 31 | 38 | #define cntx2asid(cntx) ((cntx) & SATP_ASID_MASK) |
| 32 | 39 | #define cntx2version(cntx) ((cntx) & ~SATP_ASID_MASK) |
| 33 | 40 | |
| @@ -20,6 +20,9 @@ void switch_mm(struct mm_struct *prev, struct mm_struct *next, · 19 unmodified lines | ||
| 20 | 20 | static inline void activate_mm(struct mm_struct *prev, |
| 21 | 21 | struct mm_struct *next) |
| 22 | 22 | { |
| 23 | +#ifdef CONFIG_RISCV_ISA_SUPM | |
| 24 | + next->context.pmlen = 0; | |
| 25 | +#endif | |
| 23 | 26 | switch_mm(prev, next, NULL); |
| 24 | 27 | } |
| 25 | 28 | |
| @@ -30,11 +33,21 @@ static inline int init_new_context(struct task_struct *tsk, · 4 unmodified lines | ||
| 30 | 33 | #ifdef CONFIG_MMU |
| 31 | 34 | atomic_long_set(&mm->context.id, 0); |
| 32 | 35 | #endif |
| 36 | + if (IS_ENABLED(CONFIG_RISCV_ISA_SUPM)) | |
| 37 | + clear_bit(MM_CONTEXT_LOCK_PMLEN, &mm->context.flags); | |
| 33 | 38 | return 0; |
| 34 | 39 | } |
| 35 | 40 | |
| 36 | 41 | DECLARE_STATIC_KEY_FALSE(use_asid_allocator); |
| 37 | 42 | |
| 43 | +#ifdef CONFIG_RISCV_ISA_SUPM | |
| 44 | +#define mm_untag_mask mm_untag_mask | |
| 45 | +static inline unsigned long mm_untag_mask(struct mm_struct *mm) | |
| 46 | +{ | |
| 47 | + return -1UL >> mm->context.pmlen; | |
| 48 | +} | |
| 49 | +#endif | |
| 50 | + | |
| 38 | 51 | #include <asm-generic/mmu_context.h> |
| 39 | 52 | |
| 40 | 53 | #endif /* _ASM_RISCV_MMU_CONTEXT_H */ |
| @@ -113,6 +113,7 @@ · 112 unmodified lines | ||
| 113 | 113 | #include <asm/tlbflush.h> |
| 114 | 114 | #include <linux/mm_types.h> |
| 115 | 115 | #include <asm/compat.h> |
| 116 | +#include <asm/cpufeature.h> | |
| 116 | 117 | |
| 117 | 118 | #define __page_val_to_pfn(_val) (((_val) & _PAGE_PFN_MASK) >> _PAGE_PFN_SHIFT) |
| 118 | 119 | |
| @@ -284,7 +285,6 @@ static inline pte_t pud_pte(pud_t pud) · 165 unmodified lines | ||
| 284 | 285 | } |
| 285 | 286 | |
| 286 | 287 | #ifdef CONFIG_RISCV_ISA_SVNAPOT |
| 287 | −#include <asm/cpufeature.h> | |
| 288 | 288 | |
| 289 | 289 | static __always_inline bool has_svnapot(void) |
| 290 | 290 | { |
| @@ -655,6 +655,17 @@ static inline pgprot_t pgprot_writecombine(pgprot_t _prot) · 364 unmodified lines | ||
| 655 | 655 | return __pgprot(prot); |
| 656 | 656 | } |
| 657 | 657 | |
| 658 | +/* | |
| 659 | + * Both Svade and Svadu control the hardware behavior when the PTE A/D bits need to be set. By | |
| 660 | + * default the M-mode firmware enables the hardware updating scheme when only Svadu is present in | |
| 661 | + * DT. | |
| 662 | + */ | |
| 663 | +#define arch_has_hw_pte_young arch_has_hw_pte_young | |
| 664 | +static inline bool arch_has_hw_pte_young(void) | |
| 665 | +{ | |
| 666 | + return riscv_has_extension_unlikely(RISCV_ISA_EXT_SVADU); | |
| 667 | +} | |
| 668 | + | |
| 658 | 669 | /* |
| 659 | 670 | * THP functions |
| 660 | 671 | */ |
| @@ -102,6 +102,7 @@ struct thread_struct { · 101 unmodified lines | ||
| 102 | 102 | unsigned long s[12]; /* s[0]: frame pointer */ |
| 103 | 103 | struct __riscv_d_ext_state fstate; |
| 104 | 104 | unsigned long bad_cause; |
| 105 | + unsigned long envcfg; | |
| 105 | 106 | u32 riscv_v_flags; |
| 106 | 107 | u32 vstate_ctrl; |
| 107 | 108 | struct __riscv_v_ext_state vstate; |
| @@ -177,6 +178,14 @@ extern int set_unalign_ctl(struct task_struct *tsk, unsigned int val); · 69 unmodified lines | ||
| 177 | 178 | #define RISCV_SET_ICACHE_FLUSH_CTX(arg1, arg2) riscv_set_icache_flush_ctx(arg1, arg2) |
| 178 | 179 | extern int riscv_set_icache_flush_ctx(unsigned long ctx, unsigned long per_thread); |
| 179 | 180 | |
| 181 | +#ifdef CONFIG_RISCV_ISA_SUPM | |
| 182 | +/* PR_{SET,GET}_TAGGED_ADDR_CTRL prctl */ | |
| 183 | +long set_tagged_addr_ctrl(struct task_struct *task, unsigned long arg); | |
| 184 | +long get_tagged_addr_ctrl(struct task_struct *task); | |
| 185 | +#define SET_TAGGED_ADDR_CTRL(arg) set_tagged_addr_ctrl(current, arg) | |
| 186 | +#define GET_TAGGED_ADDR_CTRL() get_tagged_addr_ctrl(current) | |
| 187 | +#endif | |
| 188 | + | |
| 180 | 189 | #endif /* __ASSEMBLY__ */ |
| 181 | 190 | |
| 182 | 191 | #endif /* _ASM_RISCV_PROCESSOR_H */ |
| @@ -0,0 +1,47 @@ | ||
| 1 | +/* SPDX-License-Identifier: GPL-2.0 */ | |
| 2 | + | |
| 3 | +#ifndef __ASM_RISCV_SPINLOCK_H | |
| 4 | +#define __ASM_RISCV_SPINLOCK_H | |
| 5 | + | |
| 6 | +#ifdef CONFIG_RISCV_COMBO_SPINLOCKS | |
| 7 | +#define _Q_PENDING_LOOPS (1 << 9) | |
| 8 | + | |
| 9 | +#define __no_arch_spinlock_redefine | |
| 10 | +#include <asm/ticket_spinlock.h> | |
| 11 | +#include <asm/qspinlock.h> | |
| 12 | +#include <asm/jump_label.h> | |
| 13 | + | |
| 14 | +/* | |
| 15 | + * TODO: Use an alternative instead of a static key when we are able to parse | |
| 16 | + * the extensions string earlier in the boot process. | |
| 17 | + */ | |
| 18 | +DECLARE_STATIC_KEY_TRUE(qspinlock_key); | |
| 19 | + | |
| 20 | +#define SPINLOCK_BASE_DECLARE(op, type, type_lock) \ | |
| 21 | +static __always_inline type arch_spin_##op(type_lock lock) \ | |
| 22 | +{ \ | |
| 23 | + if (static_branch_unlikely(&qspinlock_key)) \ | |
| 24 | + return queued_spin_##op(lock); \ | |
| 25 | + return ticket_spin_##op(lock); \ | |
| 26 | +} | |
| 27 | + | |
| 28 | +SPINLOCK_BASE_DECLARE(lock, void, arch_spinlock_t *) | |
| 29 | +SPINLOCK_BASE_DECLARE(unlock, void, arch_spinlock_t *) | |
| 30 | +SPINLOCK_BASE_DECLARE(is_locked, int, arch_spinlock_t *) | |
| 31 | +SPINLOCK_BASE_DECLARE(is_contended, int, arch_spinlock_t *) | |
| 32 | +SPINLOCK_BASE_DECLARE(trylock, bool, arch_spinlock_t *) | |
| 33 | +SPINLOCK_BASE_DECLARE(value_unlocked, int, arch_spinlock_t) | |
| 34 | + | |
| 35 | +#elif defined(CONFIG_RISCV_QUEUED_SPINLOCKS) | |
| 36 | + | |
| 37 | +#include <asm/qspinlock.h> | |
| 38 | + | |
| 39 | +#else | |
| 40 | + | |
| 41 | +#include <asm/ticket_spinlock.h> | |
| 42 | + | |
| 43 | +#endif | |
| 44 | + | |
| 45 | +#include <asm/qrwlock.h> | |
| 46 | + | |
| 47 | +#endif /* __ASM_RISCV_SPINLOCK_H */ | |
| @@ -70,6 +70,24 @@ static __always_inline bool has_fpu(void) { return false; } · 69 unmodified lines | ||
| 70 | 70 | #define __switch_to_fpu(__prev, __next) do { } while (0) |
| 71 | 71 | #endif |
| 72 | 72 | |
| 73 | +static inline void envcfg_update_bits(struct task_struct *task, | |
| 74 | + unsigned long mask, unsigned long val) | |
| 75 | +{ | |
| 76 | + unsigned long envcfg; | |
| 77 | + | |
| 78 | + envcfg = (task->thread.envcfg & ~mask) | val; | |
| 79 | + task->thread.envcfg = envcfg; | |
| 80 | + if (task == current) | |
| 81 | + csr_write(CSR_ENVCFG, envcfg); | |
| 82 | +} | |
| 83 | + | |
| 84 | +static inline void __switch_to_envcfg(struct task_struct *next) | |
| 85 | +{ | |
| 86 | + asm volatile (ALTERNATIVE("nop", "csrw " __stringify(CSR_ENVCFG) ", %0", | |
| 87 | + 0, RISCV_ISA_EXT_XLINUXENVCFG, 1) | |
| 88 | + :: "r" (next->thread.envcfg) : "memory"); | |
| 89 | +} | |
| 90 | + | |
| 73 | 91 | extern struct task_struct *__switch_to(struct task_struct *, |
| 74 | 92 | struct task_struct *); |
| 75 | 93 | |
| @@ -103,6 +121,7 @@ do { \ · 27 unmodified lines | ||
| 103 | 121 | __switch_to_vector(__prev, __next); \ |
| 104 | 122 | if (switch_to_should_flush_icache(__next)) \ |
| 105 | 123 | local_flush_icache_all(); \ |
| 124 | + __switch_to_envcfg(__next); \ | |
| 106 | 125 | ((last) = __switch_to(__prev, __next)); \ |
| 107 | 126 | } while (0) |
| 108 | 127 | |
| @@ -9,8 +9,41 @@ · 8 unmodified lines | ||
| 9 | 9 | #define _ASM_RISCV_UACCESS_H |
| 10 | 10 | |
| 11 | 11 | #include <asm/asm-extable.h> |
| 12 | +#include <asm/cpufeature.h> | |
| 12 | 13 | #include <asm/pgtable.h> /* for TASK_SIZE */ |
| 13 | 14 | |
| 15 | +#ifdef CONFIG_RISCV_ISA_SUPM | |
| 16 | +static inline unsigned long __untagged_addr_remote(struct mm_struct *mm, unsigned long addr) | |
| 17 | +{ | |
| 18 | + if (riscv_has_extension_unlikely(RISCV_ISA_EXT_SUPM)) { | |
| 19 | + u8 pmlen = mm->context.pmlen; | |
| 20 | + | |
| 21 | + /* Virtual addresses are sign-extended; physical addresses are zero-extended. */ | |
| 22 | + if (IS_ENABLED(CONFIG_MMU)) | |
| 23 | + return (long)(addr << pmlen) >> pmlen; | |
| 24 | + else | |
| 25 | + return (addr << pmlen) >> pmlen; | |
| 26 | + } | |
| 27 | + | |
| 28 | + return addr; | |
| 29 | +} | |
| 30 | + | |
| 31 | +#define untagged_addr(addr) ({ \ | |
| 32 | + unsigned long __addr = (__force unsigned long)(addr); \ | |
| 33 | + (__force __typeof__(addr))__untagged_addr_remote(current->mm, __addr); \ | |
| 34 | +}) | |
| 35 | + | |
| 36 | +#define untagged_addr_remote(mm, addr) ({ \ | |
| 37 | + unsigned long __addr = (__force unsigned long)(addr); \ | |
| 38 | + mmap_assert_locked(mm); \ | |
| 39 | + (__force __typeof__(addr))__untagged_addr_remote(mm, __addr); \ | |
| 40 | +}) | |
| 41 | + | |
| 42 | +#define access_ok(addr, size) likely(__access_ok(untagged_addr(addr), size)) | |
| 43 | +#else | |
| 44 | +#define untagged_addr(addr) (addr) | |
| 45 | +#endif | |
| 46 | + | |
| 14 | 47 | /* |
| 15 | 48 | * User space memory access functions |
| 16 | 49 | */ |
| @@ -130,7 +163,7 @@ do { \ · 113 unmodified lines | ||
| 130 | 163 | */ |
| 131 | 164 | #define __get_user(x, ptr) \ |
| 132 | 165 | ({ \ |
| 133 | − const __typeof__(*(ptr)) __user *__gu_ptr = (ptr); \ | |
| 166 | + const __typeof__(*(ptr)) __user *__gu_ptr = untagged_addr(ptr); \ | |
| 134 | 167 | long __gu_err = 0; \ |
| 135 | 168 | \ |
| 136 | 169 | __chk_user_ptr(__gu_ptr); \ |
| @@ -246,7 +279,7 @@ do { \ · 109 unmodified lines | ||
| 246 | 279 | */ |
| 247 | 280 | #define __put_user(x, ptr) \ |
| 248 | 281 | ({ \ |
| 249 | − __typeof__(*(ptr)) __user *__gu_ptr = (ptr); \ | |
| 282 | + __typeof__(*(ptr)) __user *__gu_ptr = untagged_addr(ptr); \ | |
| 250 | 283 | __typeof__(*__gu_ptr) __val = (x); \ |
| 251 | 284 | long __pu_err = 0; \ |
| 252 | 285 | \ |
| @@ -293,13 +326,13 @@ unsigned long __must_check __asm_copy_from_user(void *to, · 40 unmodified lines | ||
| 293 | 326 | static inline unsigned long |
| 294 | 327 | raw_copy_from_user(void *to, const void __user *from, unsigned long n) |
| 295 | 328 | { |
| 296 | − return __asm_copy_from_user(to, from, n); | |
| 329 | + return __asm_copy_from_user(to, untagged_addr(from), n); | |
| 297 | 330 | } |
| 298 | 331 | |
| 299 | 332 | static inline unsigned long |
| 300 | 333 | raw_copy_to_user(void __user *to, const void *from, unsigned long n) |
| 301 | 334 | { |
| 302 | − return __asm_copy_to_user(to, from, n); | |
| 335 | + return __asm_copy_to_user(untagged_addr(to), from, n); | |
| 303 | 336 | } |
| 304 | 337 | |
| 305 | 338 | extern long strncpy_from_user(char *dest, const char __user *src, long count); |
| @@ -314,7 +347,7 @@ unsigned long __must_check clear_user(void __user *to, unsigned long n) · 8 unmodified lines | ||
| 314 | 347 | { |
| 315 | 348 | might_fault(); |
| 316 | 349 | return access_ok(to, n) ? |
| 317 | − __clear_user(to, n) : n; | |
| 350 | + __clear_user(untagged_addr(to), n) : n; | |
| 318 | 351 | } |
| 319 | 352 | |
| 320 | 353 | #define __get_kernel_nofault(dst, src, type, err_label) \ |
| @@ -21,6 +21,7 @@ · 20 unmodified lines | ||
| 21 | 21 | |
| 22 | 22 | extern unsigned long riscv_v_vsize; |
| 23 | 23 | int riscv_v_setup_vsize(void); |
| 24 | +bool insn_is_vector(u32 insn_buf); | |
| 24 | 25 | bool riscv_v_first_use_handler(struct pt_regs *regs); |
| 25 | 26 | void kernel_vector_begin(void); |
| 26 | 27 | void kernel_vector_end(void); |
| @@ -268,6 +269,7 @@ struct pt_regs; · 241 unmodified lines | ||
| 268 | 269 | |
| 269 | 270 | static inline int riscv_v_setup_vsize(void) { return -EOPNOTSUPP; } |
| 270 | 271 | static __always_inline bool has_vector(void) { return false; } |
| 272 | +static __always_inline bool insn_is_vector(u32 insn_buf) { return false; } | |
| 271 | 273 | static inline bool riscv_v_first_use_handler(struct pt_regs *regs) { return false; } |
| 272 | 274 | static inline bool riscv_v_vstate_query(struct pt_regs *regs) { return false; } |
| 273 | 275 | static inline bool riscv_v_vstate_ctrl_user_allowed(void) { return false; } |
| @@ -72,6 +72,7 @@ struct riscv_hwprobe { · 71 unmodified lines | ||
| 72 | 72 | #define RISCV_HWPROBE_EXT_ZCF (1ULL << 46) |
| 73 | 73 | #define RISCV_HWPROBE_EXT_ZCMOP (1ULL << 47) |
| 74 | 74 | #define RISCV_HWPROBE_EXT_ZAWRS (1ULL << 48) |
| 75 | +#define RISCV_HWPROBE_EXT_SUPM (1ULL << 49) | |
| 75 | 76 | #define RISCV_HWPROBE_KEY_CPUPERF_0 5 |
| 76 | 77 | #define RISCV_HWPROBE_MISALIGNED_UNKNOWN (0 << 0) |
| 77 | 78 | #define RISCV_HWPROBE_MISALIGNED_EMULATED (1 << 0) |
| @@ -88,6 +89,11 @@ struct riscv_hwprobe { · 10 unmodified lines | ||
| 88 | 89 | #define RISCV_HWPROBE_MISALIGNED_SCALAR_SLOW 2 |
| 89 | 90 | #define RISCV_HWPROBE_MISALIGNED_SCALAR_FAST 3 |
| 90 | 91 | #define RISCV_HWPROBE_MISALIGNED_SCALAR_UNSUPPORTED 4 |
| 92 | +#define RISCV_HWPROBE_KEY_MISALIGNED_VECTOR_PERF 10 | |
| 93 | +#define RISCV_HWPROBE_MISALIGNED_VECTOR_UNKNOWN 0 | |
| 94 | +#define RISCV_HWPROBE_MISALIGNED_VECTOR_SLOW 2 | |
| 95 | +#define RISCV_HWPROBE_MISALIGNED_VECTOR_FAST 3 | |
| 96 | +#define RISCV_HWPROBE_MISALIGNED_VECTOR_UNSUPPORTED 4 | |
| 91 | 97 | /* Increase RISCV_HWPROBE_MAX_KEY when adding items. */ |
| 92 | 98 | |
| 93 | 99 | /* Flags */ |
| @@ -175,6 +175,10 @@ enum KVM_RISCV_ISA_EXT_ID { · 174 unmodified lines | ||
| 175 | 175 | KVM_RISCV_ISA_EXT_ZCF, |
| 176 | 176 | KVM_RISCV_ISA_EXT_ZCMOP, |
| 177 | 177 | KVM_RISCV_ISA_EXT_ZAWRS, |
| 178 | + KVM_RISCV_ISA_EXT_SMNPM, | |
| 179 | + KVM_RISCV_ISA_EXT_SSNPM, | |
| 180 | + KVM_RISCV_ISA_EXT_SVADE, | |
| 181 | + KVM_RISCV_ISA_EXT_SVADU, | |
| 178 | 182 | KVM_RISCV_ISA_EXT_MAX, |
| 179 | 183 | }; |
| 180 | 184 | |
| @@ -75,7 +75,8 @@ obj-$(CONFIG_MMU) += vdso.o vdso/ · 74 unmodified lines | ||
| 75 | 75 | |
| 76 | 76 | obj-$(CONFIG_RISCV_MISALIGNED) += traps_misaligned.o |
| 77 | 77 | obj-$(CONFIG_RISCV_MISALIGNED) += unaligned_access_speed.o |
| 78 | −obj-$(CONFIG_RISCV_PROBE_UNALIGNED_ACCESS) += copy-unaligned.o | |
| 78 | +obj-$(CONFIG_RISCV_PROBE_UNALIGNED_ACCESS) += copy-unaligned.o | |
| 79 | +obj-$(CONFIG_RISCV_PROBE_VECTOR_UNALIGNED_ACCESS) += vec-copy-unaligned.o | |
| 79 | 80 | |
| 80 | 81 | obj-$(CONFIG_FPU) += fpu.o |
| 81 | 82 | obj-$(CONFIG_FPU) += kernel_mode_fpu.o |
| @@ -10,4 +10,9 @@ · 9 unmodified lines | ||
| 10 | 10 | void __riscv_copy_words_unaligned(void *dst, const void *src, size_t size); |
| 11 | 11 | void __riscv_copy_bytes_unaligned(void *dst, const void *src, size_t size); |
| 12 | 12 | |
| 13 | +#ifdef CONFIG_RISCV_PROBE_VECTOR_UNALIGNED_ACCESS | |
| 14 | +void __riscv_copy_vec_words_unaligned(void *dst, const void *src, size_t size); | |
| 15 | +void __riscv_copy_vec_bytes_unaligned(void *dst, const void *src, size_t size); | |
| 16 | +#endif | |
| 17 | + | |
| 13 | 18 | #endif /* __RISCV_KERNEL_COPY_UNALIGNED_H */ |
| @@ -29,6 +29,8 @@ · 28 unmodified lines | ||
| 29 | 29 | |
| 30 | 30 | #define NUM_ALPHA_EXTS ('z' - 'a' + 1) |
| 31 | 31 | |
| 32 | +static bool any_cpu_has_zicboz; | |
| 33 | + | |
| 32 | 34 | unsigned long elf_hwcap __read_mostly; |
| 33 | 35 | |
| 34 | 36 | /* Host ISA bitmap */ |
| @@ -99,6 +101,7 @@ static int riscv_ext_zicboz_validate(const struct riscv_isa_ext_data *data, · 64 unmodified lines | ||
| 99 | 101 | pr_err("Zicboz disabled as cboz-block-size present, but is not a power-of-2\n"); |
| 100 | 102 | return -EINVAL; |
| 101 | 103 | } |
| 104 | + any_cpu_has_zicboz = true; | |
| 102 | 105 | return 0; |
| 103 | 106 | } |
| 104 | 107 | |
| @@ -133,6 +136,16 @@ static int riscv_ext_zcf_validate(const struct riscv_isa_ext_data *data, · 28 unmodified lines | ||
| 133 | 136 | return -EPROBE_DEFER; |
| 134 | 137 | } |
| 135 | 138 | |
| 139 | +static int riscv_ext_svadu_validate(const struct riscv_isa_ext_data *data, | |
| 140 | + const unsigned long *isa_bitmap) | |
| 141 | +{ | |
| 142 | + /* SVADE has already been detected, use SVADE only */ | |
| 143 | + if (__riscv_isa_extension_available(isa_bitmap, RISCV_ISA_EXT_SVADE)) | |
| 144 | + return -EOPNOTSUPP; | |
| 145 | + | |
| 146 | + return 0; | |
| 147 | +} | |
| 148 | + | |
| 136 | 149 | static const unsigned int riscv_zk_bundled_exts[] = { |
| 137 | 150 | RISCV_ISA_EXT_ZBKB, |
| 138 | 151 | RISCV_ISA_EXT_ZBKC, |
| @@ -315,6 +328,7 @@ const struct riscv_isa_ext_data riscv_isa_ext[] = { · 176 unmodified lines | ||
| 315 | 328 | riscv_ext_zicbom_validate), |
| 316 | 329 | __RISCV_ISA_EXT_SUPERSET_VALIDATE(zicboz, RISCV_ISA_EXT_ZICBOZ, riscv_xlinuxenvcfg_exts, |
| 317 | 330 | riscv_ext_zicboz_validate), |
| 331 | + __RISCV_ISA_EXT_DATA(ziccrse, RISCV_ISA_EXT_ZICCRSE), | |
| 318 | 332 | __RISCV_ISA_EXT_DATA(zicntr, RISCV_ISA_EXT_ZICNTR), |
| 319 | 333 | __RISCV_ISA_EXT_DATA(zicond, RISCV_ISA_EXT_ZICOND), |
| 320 | 334 | __RISCV_ISA_EXT_DATA(zicsr, RISCV_ISA_EXT_ZICSR), |
| @@ -323,6 +337,7 @@ const struct riscv_isa_ext_data riscv_isa_ext[] = { · 2 unmodified lines | ||
| 323 | 337 | __RISCV_ISA_EXT_DATA(zihintpause, RISCV_ISA_EXT_ZIHINTPAUSE), |
| 324 | 338 | __RISCV_ISA_EXT_DATA(zihpm, RISCV_ISA_EXT_ZIHPM), |
| 325 | 339 | __RISCV_ISA_EXT_DATA(zimop, RISCV_ISA_EXT_ZIMOP), |
| 340 | + __RISCV_ISA_EXT_DATA(zabha, RISCV_ISA_EXT_ZABHA), | |
| 326 | 341 | __RISCV_ISA_EXT_DATA(zacas, RISCV_ISA_EXT_ZACAS), |
| 327 | 342 | __RISCV_ISA_EXT_DATA(zawrs, RISCV_ISA_EXT_ZAWRS), |
| 328 | 343 | __RISCV_ISA_EXT_DATA(zfa, RISCV_ISA_EXT_ZFA), |
| @@ -375,10 +390,15 @@ const struct riscv_isa_ext_data riscv_isa_ext[] = { · 46 unmodified lines | ||
| 375 | 390 | __RISCV_ISA_EXT_BUNDLE(zvksg, riscv_zvksg_bundled_exts), |
| 376 | 391 | __RISCV_ISA_EXT_DATA(zvkt, RISCV_ISA_EXT_ZVKT), |
| 377 | 392 | __RISCV_ISA_EXT_DATA(smaia, RISCV_ISA_EXT_SMAIA), |
| 393 | + __RISCV_ISA_EXT_DATA(smmpm, RISCV_ISA_EXT_SMMPM), | |
| 394 | + __RISCV_ISA_EXT_SUPERSET(smnpm, RISCV_ISA_EXT_SMNPM, riscv_xlinuxenvcfg_exts), | |
| 378 | 395 | __RISCV_ISA_EXT_DATA(smstateen, RISCV_ISA_EXT_SMSTATEEN), |
| 379 | 396 | __RISCV_ISA_EXT_DATA(ssaia, RISCV_ISA_EXT_SSAIA), |
| 380 | 397 | __RISCV_ISA_EXT_DATA(sscofpmf, RISCV_ISA_EXT_SSCOFPMF), |
| 398 | + __RISCV_ISA_EXT_SUPERSET(ssnpm, RISCV_ISA_EXT_SSNPM, riscv_xlinuxenvcfg_exts), | |
| 381 | 399 | __RISCV_ISA_EXT_DATA(sstc, RISCV_ISA_EXT_SSTC), |
| 400 | + __RISCV_ISA_EXT_DATA(svade, RISCV_ISA_EXT_SVADE), | |
| 401 | + __RISCV_ISA_EXT_DATA_VALIDATE(svadu, RISCV_ISA_EXT_SVADU, riscv_ext_svadu_validate), | |
| 382 | 402 | __RISCV_ISA_EXT_DATA(svinval, RISCV_ISA_EXT_SVINVAL), |
| 383 | 403 | __RISCV_ISA_EXT_DATA(svnapot, RISCV_ISA_EXT_SVNAPOT), |
| 384 | 404 | __RISCV_ISA_EXT_DATA(svpbmt, RISCV_ISA_EXT_SVPBMT), |
| @@ -918,10 +938,12 @@ unsigned long riscv_get_elf_hwcap(void) · 533 unmodified lines | ||
| 918 | 938 | return hwcap; |
| 919 | 939 | } |
| 920 | 940 | |
| 921 | −void riscv_user_isa_enable(void) | |
| 941 | +void __init riscv_user_isa_enable(void) | |
| 922 | 942 | { |
| 923 | − if (riscv_cpu_has_extension_unlikely(smp_processor_id(), RISCV_ISA_EXT_ZICBOZ)) | |
| 924 | − csr_set(CSR_ENVCFG, ENVCFG_CBZE); | |
| 943 | + if (riscv_has_extension_unlikely(RISCV_ISA_EXT_ZICBOZ)) | |
| 944 | + current->thread.envcfg |= ENVCFG_CBZE; | |
| 945 | + else if (any_cpu_has_zicboz) | |
| 946 | + pr_warn("Zicboz disabled as it is unavailable on some harts\n"); | |
| 925 | 947 | } |
| 926 | 948 | |
| 927 | 949 | #ifdef CONFIG_RISCV_ALTERNATIVE |
| @@ -170,7 +170,7 @@ SYM_FUNC_END(__fstate_restore) · 169 unmodified lines | ||
| 170 | 170 | __access_func(f31) |
| 171 | 171 | |
| 172 | 172 | |
| 173 | −#ifdef CONFIG_RISCV_MISALIGNED | |
| 173 | +#ifdef CONFIG_RISCV_SCALAR_MISALIGNED | |
| 174 | 174 | |
| 175 | 175 | /* |
| 176 | 176 | * Disable compressed instructions set to keep a constant offset between FP |
| @@ -224,4 +224,4 @@ SYM_FUNC_START(get_f64_reg) · 47 unmodified lines | ||
| 224 | 224 | fp_access_epilogue |
| 225 | 225 | SYM_FUNC_END(get_f64_reg) |
| 226 | 226 | |
| 227 | −#endif /* CONFIG_RISCV_MISALIGNED */ | |
| 227 | +#endif /* CONFIG_RISCV_SCALAR_MISALIGNED */ | |
| @@ -7,6 +7,7 @@ · 6 unmodified lines | ||
| 7 | 7 | * Copyright (C) 2017 SiFive |
| 8 | 8 | */ |
| 9 | 9 | |
| 10 | +#include <linux/bitfield.h> | |
| 10 | 11 | #include <linux/cpu.h> |
| 11 | 12 | #include <linux/kernel.h> |
| 12 | 13 | #include <linux/sched.h> |
| @@ -180,6 +181,10 @@ void flush_thread(void) · 167 unmodified lines | ||
| 180 | 181 | memset(¤t->thread.vstate, 0, sizeof(struct __riscv_v_ext_state)); |
| 181 | 182 | clear_tsk_thread_flag(current, TIF_RISCV_V_DEFER_RESTORE); |
| 182 | 183 | #endif |
| 184 | +#ifdef CONFIG_RISCV_ISA_SUPM | |
| 185 | + if (riscv_has_extension_unlikely(RISCV_ISA_EXT_SUPM)) | |
| 186 | + envcfg_update_bits(current, ENVCFG_PMM, ENVCFG_PMM_PMLEN_0); | |
| 187 | +#endif | |
| 183 | 188 | } |
| 184 | 189 | |
| 185 | 190 | void arch_release_task_struct(struct task_struct *tsk) |
| @@ -208,6 +213,10 @@ int copy_thread(struct task_struct *p, const struct kernel_clone_args *args) · 22 unmodified lines | ||
| 208 | 213 | unsigned long tls = args->tls; |
| 209 | 214 | struct pt_regs *childregs = task_pt_regs(p); |
| 210 | 215 | |
| 216 | + /* Ensure all threads in this mm have the same pointer masking mode. */ | |
| 217 | + if (IS_ENABLED(CONFIG_RISCV_ISA_SUPM) && p->mm && (clone_flags & CLONE_VM)) | |
| 218 | + set_bit(MM_CONTEXT_LOCK_PMLEN, &p->mm->context.flags); | |
| 219 | + | |
| 211 | 220 | memset(&p->thread.s, 0, sizeof(p->thread.s)); |
| 212 | 221 | |
| 213 | 222 | /* p->thread holds context to be restored by __switch_to() */ |
| @@ -242,3 +251,148 @@ void __init arch_task_cache_init(void) · 28 unmodified lines | ||
| 242 | 251 | { |
| 243 | 252 | riscv_v_setup_ctx_cache(); |
| 244 | 253 | } |
| 254 | + | |
| 255 | +#ifdef CONFIG_RISCV_ISA_SUPM | |
| 256 | +enum { | |
| 257 | + PMLEN_0 = 0, | |
| 258 | + PMLEN_7 = 7, | |
| 259 | + PMLEN_16 = 16, | |
| 260 | +}; | |
| 261 | + | |
| 262 | +static bool have_user_pmlen_7; | |
| 263 | +static bool have_user_pmlen_16; | |
| 264 | + | |
| 265 | +/* | |
| 266 | + * Control the relaxed ABI allowing tagged user addresses into the kernel. | |
| 267 | + */ | |
| 268 | +static unsigned int tagged_addr_disabled; | |
| 269 | + | |
| 270 | +long set_tagged_addr_ctrl(struct task_struct *task, unsigned long arg) | |
| 271 | +{ | |
| 272 | + unsigned long valid_mask = PR_PMLEN_MASK | PR_TAGGED_ADDR_ENABLE; | |
| 273 | + struct thread_info *ti = task_thread_info(task); | |
| 274 | + struct mm_struct *mm = task->mm; | |
| 275 | + unsigned long pmm; | |
| 276 | + u8 pmlen; | |
| 277 | + | |
| 278 | + if (is_compat_thread(ti)) | |
| 279 | + return -EINVAL; | |
| 280 | + | |
| 281 | + if (arg & ~valid_mask) | |
| 282 | + return -EINVAL; | |
| 283 | + | |
| 284 | + /* | |
| 285 | + * Prefer the smallest PMLEN that satisfies the user's request, | |
| 286 | + * in case choosing a larger PMLEN has a performance impact. | |
| 287 | + */ | |
| 288 | + pmlen = FIELD_GET(PR_PMLEN_MASK, arg); | |
| 289 | + if (pmlen == PMLEN_0) { | |
| 290 | + pmm = ENVCFG_PMM_PMLEN_0; | |
| 291 | + } else if (pmlen <= PMLEN_7 && have_user_pmlen_7) { | |
| 292 | + pmlen = PMLEN_7; | |
| 293 | + pmm = ENVCFG_PMM_PMLEN_7; | |
| 294 | + } else if (pmlen <= PMLEN_16 && have_user_pmlen_16) { | |
| 295 | + pmlen = PMLEN_16; | |
| 296 | + pmm = ENVCFG_PMM_PMLEN_16; | |
| 297 | + } else { | |
| 298 | + return -EINVAL; | |
| 299 | + } | |
| 300 | + | |
| 301 | + /* | |
| 302 | + * Do not allow the enabling of the tagged address ABI if globally | |
| 303 | + * disabled via sysctl abi.tagged_addr_disabled, if pointer masking | |
| 304 | + * is disabled for userspace. | |
| 305 | + */ | |
| 306 | + if (arg & PR_TAGGED_ADDR_ENABLE && (tagged_addr_disabled || !pmlen)) | |
| 307 | + return -EINVAL; | |
| 308 | + | |
| 309 | + if (!(arg & PR_TAGGED_ADDR_ENABLE)) | |
| 310 | + pmlen = PMLEN_0; | |
| 311 | + | |
| 312 | + if (mmap_write_lock_killable(mm)) | |
| 313 | + return -EINTR; | |
| 314 | + | |
| 315 | + if (test_bit(MM_CONTEXT_LOCK_PMLEN, &mm->context.flags) && mm->context.pmlen != pmlen) { | |
| 316 | + mmap_write_unlock(mm); | |
| 317 | + return -EBUSY; | |
| 318 | + } | |
| 319 | + | |
| 320 | + envcfg_update_bits(task, ENVCFG_PMM, pmm); | |
| 321 | + mm->context.pmlen = pmlen; | |
| 322 | + | |
| 323 | + mmap_write_unlock(mm); | |
| 324 | + | |
| 325 | + return 0; | |
| 326 | +} | |
| 327 | + | |
| 328 | +long get_tagged_addr_ctrl(struct task_struct *task) | |
| 329 | +{ | |
| 330 | + struct thread_info *ti = task_thread_info(task); | |
| 331 | + long ret = 0; | |
| 332 | + | |
| 333 | + if (is_compat_thread(ti)) | |
| 334 | + return -EINVAL; | |
| 335 | + | |
| 336 | + /* | |
| 337 | + * The mm context's pmlen is set only when the tagged address ABI is | |
| 338 | + * enabled, so the effective PMLEN must be extracted from envcfg.PMM. | |
| 339 | + */ | |
| 340 | + switch (task->thread.envcfg & ENVCFG_PMM) { | |
| 341 | + case ENVCFG_PMM_PMLEN_7: | |
| 342 | + ret = FIELD_PREP(PR_PMLEN_MASK, PMLEN_7); | |
| 343 | + break; | |
| 344 | + case ENVCFG_PMM_PMLEN_16: | |
| 345 | + ret = FIELD_PREP(PR_PMLEN_MASK, PMLEN_16); | |
| 346 | + break; | |
| 347 | + } | |
| 348 | + | |
| 349 | + if (task->mm->context.pmlen) | |
| 350 | + ret |= PR_TAGGED_ADDR_ENABLE; | |
| 351 | + | |
| 352 | + return ret; | |
| 353 | +} | |
| 354 | + | |
| 355 | +static bool try_to_set_pmm(unsigned long value) | |
| 356 | +{ | |
| 357 | + csr_set(CSR_ENVCFG, value); | |
| 358 | + return (csr_read_clear(CSR_ENVCFG, ENVCFG_PMM) & ENVCFG_PMM) == value; | |
| 359 | +} | |
| 360 | + | |
| 361 | +/* | |
| 362 | + * Global sysctl to disable the tagged user addresses support. This control | |
| 363 | + * only prevents the tagged address ABI enabling via prctl() and does not | |
| 364 | + * disable it for tasks that already opted in to the relaxed ABI. | |
| 365 | + */ | |
| 366 | + | |
| 367 | +static struct ctl_table tagged_addr_sysctl_table[] = { | |
| 368 | + { | |
| 369 | + .procname = "tagged_addr_disabled", | |
| 370 | + .mode = 0644, | |
| 371 | + .data = &tagged_addr_disabled, | |
| 372 | + .maxlen = sizeof(int), | |
| 373 | + .proc_handler = proc_dointvec_minmax, | |
| 374 | + .extra1 = SYSCTL_ZERO, | |
| 375 | + .extra2 = SYSCTL_ONE, | |
| 376 | + }, | |
| 377 | +}; | |
| 378 | + | |
| 379 | +static int __init tagged_addr_init(void) | |
| 380 | +{ | |
| 381 | + if (!riscv_has_extension_unlikely(RISCV_ISA_EXT_SUPM)) | |
| 382 | + return 0; | |
| 383 | + | |
| 384 | + /* | |
| 385 | + * envcfg.PMM is a WARL field. Detect which values are supported. | |
| 386 | + * Assume the supported PMLEN values are the same on all harts. | |
| 387 | + */ | |
| 388 | + csr_clear(CSR_ENVCFG, ENVCFG_PMM); | |
| 389 | + have_user_pmlen_7 = try_to_set_pmm(ENVCFG_PMM_PMLEN_7); | |
| 390 | + have_user_pmlen_16 = try_to_set_pmm(ENVCFG_PMM_PMLEN_16); | |
| 391 | + | |
| 392 | + if (!register_sysctl("abi", tagged_addr_sysctl_table)) | |
| 393 | + return -EINVAL; | |
| 394 | + | |
| 395 | + return 0; | |
| 396 | +} | |
| 397 | +core_initcall(tagged_addr_init); | |
| 398 | +#endif /* CONFIG_RISCV_ISA_SUPM */ | |
| @@ -28,6 +28,9 @@ enum riscv_regset { · 27 unmodified lines | ||
| 28 | 28 | #ifdef CONFIG_RISCV_ISA_V |
| 29 | 29 | REGSET_V, |
| 30 | 30 | #endif |
| 31 | +#ifdef CONFIG_RISCV_ISA_SUPM | |
| 32 | + REGSET_TAGGED_ADDR_CTRL, | |
| 33 | +#endif | |
| 31 | 34 | }; |
| 32 | 35 | |
| 33 | 36 | static int riscv_gpr_get(struct task_struct *target, |
| @@ -152,6 +155,35 @@ static int riscv_vr_set(struct task_struct *target, · 118 unmodified lines | ||
| 152 | 155 | } |
| 153 | 156 | #endif |
| 154 | 157 | |
| 158 | +#ifdef CONFIG_RISCV_ISA_SUPM | |
| 159 | +static int tagged_addr_ctrl_get(struct task_struct *target, | |
| 160 | + const struct user_regset *regset, | |
| 161 | + struct membuf to) | |
| 162 | +{ | |
| 163 | + long ctrl = get_tagged_addr_ctrl(target); | |
| 164 | + | |
| 165 | + if (IS_ERR_VALUE(ctrl)) | |
| 166 | + return ctrl; | |
| 167 | + | |
| 168 | + return membuf_write(&to, &ctrl, sizeof(ctrl)); | |
| 169 | +} | |
| 170 | + | |
| 171 | +static int tagged_addr_ctrl_set(struct task_struct *target, | |
| 172 | + const struct user_regset *regset, | |
| 173 | + unsigned int pos, unsigned int count, | |
| 174 | + const void *kbuf, const void __user *ubuf) | |
| 175 | +{ | |
| 176 | + int ret; | |
| 177 | + long ctrl; | |
| 178 | + | |
| 179 | + ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &ctrl, 0, -1); | |
| 180 | + if (ret) | |
| 181 | + return ret; | |
| 182 | + | |
| 183 | + return set_tagged_addr_ctrl(target, ctrl); | |
| 184 | +} | |
| 185 | +#endif | |
| 186 | + | |
| 155 | 187 | static const struct user_regset riscv_user_regset[] = { |
| 156 | 188 | [REGSET_X] = { |
| 157 | 189 | .core_note_type = NT_PRSTATUS, |
| @@ -182,6 +214,16 @@ static const struct user_regset riscv_user_regset[] = { · 24 unmodified lines | ||
| 182 | 214 | .set = riscv_vr_set, |
| 183 | 215 | }, |
| 184 | 216 | #endif |
| 217 | +#ifdef CONFIG_RISCV_ISA_SUPM | |
| 218 | + [REGSET_TAGGED_ADDR_CTRL] = { | |
| 219 | + .core_note_type = NT_RISCV_TAGGED_ADDR_CTRL, | |
| 220 | + .n = 1, | |
| 221 | + .size = sizeof(long), | |
| 222 | + .align = sizeof(long), | |
| 223 | + .regset_get = tagged_addr_ctrl_get, | |
| 224 | + .set = tagged_addr_ctrl_set, | |
| 225 | + }, | |
| 226 | +#endif | |
| 185 | 227 | }; |
| 186 | 228 | |
| 187 | 229 | static const struct user_regset_view riscv_user_native_view = { |
| @@ -244,6 +244,42 @@ static void __init parse_dtb(void) · 243 unmodified lines | ||
| 244 | 244 | #endif |
| 245 | 245 | } |
| 246 | 246 | |
| 247 | +#if defined(CONFIG_RISCV_COMBO_SPINLOCKS) | |
| 248 | +DEFINE_STATIC_KEY_TRUE(qspinlock_key); | |
| 249 | +EXPORT_SYMBOL(qspinlock_key); | |
| 250 | +#endif | |
| 251 | + | |
| 252 | +static void __init riscv_spinlock_init(void) | |
| 253 | +{ | |
| 254 | + char *using_ext = NULL; | |
| 255 | + | |
| 256 | + if (IS_ENABLED(CONFIG_RISCV_TICKET_SPINLOCKS)) { | |
| 257 | + pr_info("Ticket spinlock: enabled\n"); | |
| 258 | + return; | |
| 259 | + } | |
| 260 | + | |
| 261 | + if (IS_ENABLED(CONFIG_RISCV_ISA_ZABHA) && | |
| 262 | + IS_ENABLED(CONFIG_RISCV_ISA_ZACAS) && | |
| 263 | + riscv_isa_extension_available(NULL, ZABHA) && | |
| 264 | + riscv_isa_extension_available(NULL, ZACAS)) { | |
| 265 | + using_ext = "using Zabha"; | |
| 266 | + } else if (riscv_isa_extension_available(NULL, ZICCRSE)) { | |
| 267 | + using_ext = "using Ziccrse"; | |
| 268 | + } | |
| 269 | +#if defined(CONFIG_RISCV_COMBO_SPINLOCKS) | |
| 270 | + else { | |
| 271 | + static_branch_disable(&qspinlock_key); | |
| 272 | + pr_info("Ticket spinlock: enabled\n"); | |
| 273 | + return; | |
| 274 | + } | |
| 275 | +#endif | |
| 276 | + | |
| 277 | + if (!using_ext) | |
| 278 | + pr_err("Queued spinlock without Zabha or Ziccrse"); | |
| 279 | + else | |
| 280 | + pr_info("Queued spinlock %s: enabled\n", using_ext); | |
| 281 | +} | |
| 282 | + | |
| 247 | 283 | extern void __init init_rt_signal_env(void); |
| 248 | 284 | |
| 249 | 285 | void __init setup_arch(char **cmdline_p) |
| @@ -297,6 +333,7 @@ void __init setup_arch(char **cmdline_p) · 47 unmodified lines | ||
| 297 | 333 | riscv_set_dma_cache_alignment(); |
| 298 | 334 | |
| 299 | 335 | riscv_user_isa_enable(); |
| 336 | + riscv_spinlock_init(); | |
| 300 | 337 | } |
| 301 | 338 | |
| 302 | 339 | bool arch_cpu_is_hotpluggable(int cpu) |
| @@ -233,8 +233,6 @@ asmlinkage __visible void smp_callin(void) · 232 unmodified lines | ||
| 233 | 233 | numa_add_cpu(curr_cpuid); |
| 234 | 234 | set_cpu_online(curr_cpuid, true); |
| 235 | 235 | |
| 236 | − riscv_user_isa_enable(); | |
| 237 | − | |
| 238 | 236 | /* |
| 239 | 237 | * Remote cache and TLB flushes are ignored while the CPU is offline, |
| 240 | 238 | * so flush them both right now just in case. |
| @@ -14,7 +14,7 @@ · 13 unmodified lines | ||
| 14 | 14 | |
| 15 | 15 | void suspend_save_csrs(struct suspend_context *context) |
| 16 | 16 | { |
| 17 | − if (riscv_cpu_has_extension_unlikely(smp_processor_id(), RISCV_ISA_EXT_XLINUXENVCFG)) | |
| 17 | + if (riscv_has_extension_unlikely(RISCV_ISA_EXT_XLINUXENVCFG)) | |
| 18 | 18 | context->envcfg = csr_read(CSR_ENVCFG); |
| 19 | 19 | context->tvec = csr_read(CSR_TVEC); |
| 20 | 20 | context->ie = csr_read(CSR_IE); |
| @@ -37,7 +37,7 @@ void suspend_save_csrs(struct suspend_context *context) · 16 unmodified lines | ||
| 37 | 37 | void suspend_restore_csrs(struct suspend_context *context) |
| 38 | 38 | { |
| 39 | 39 | csr_write(CSR_SCRATCH, 0); |
| 40 | − if (riscv_cpu_has_extension_unlikely(smp_processor_id(), RISCV_ISA_EXT_XLINUXENVCFG)) | |
| 40 | + if (riscv_has_extension_unlikely(RISCV_ISA_EXT_XLINUXENVCFG)) | |
| 41 | 41 | csr_write(CSR_ENVCFG, context->envcfg); |
| 42 | 42 | csr_write(CSR_TVEC, context->tvec); |
| 43 | 43 | csr_write(CSR_IE, context->ie); |
| @@ -150,6 +150,9 @@ static void hwprobe_isa_ext0(struct riscv_hwprobe *pair, · 149 unmodified lines | ||
| 150 | 150 | EXT_KEY(ZFH); |
| 151 | 151 | EXT_KEY(ZFHMIN); |
| 152 | 152 | } |
| 153 | + | |
| 154 | + if (IS_ENABLED(CONFIG_RISCV_ISA_SUPM)) | |
| 155 | + EXT_KEY(SUPM); | |
| 153 | 156 | #undef EXT_KEY |
| 154 | 157 | } |
| 155 | 158 | |
| @@ -201,6 +204,43 @@ static u64 hwprobe_misaligned(const struct cpumask *cpus) · 45 unmodified lines | ||
| 201 | 204 | } |
| 202 | 205 | #endif |
| 203 | 206 | |
| 207 | +#ifdef CONFIG_RISCV_VECTOR_MISALIGNED | |
| 208 | +static u64 hwprobe_vec_misaligned(const struct cpumask *cpus) | |
| 209 | +{ | |
| 210 | + int cpu; | |
| 211 | + u64 perf = -1ULL; | |
| 212 | + | |
| 213 | + /* Return if supported or not even if speed wasn't probed */ | |
| 214 | + for_each_cpu(cpu, cpus) { | |
| 215 | + int this_perf = per_cpu(vector_misaligned_access, cpu); | |
| 216 | + | |
| 217 | + if (perf == -1ULL) | |
| 218 | + perf = this_perf; | |
| 219 | + | |
| 220 | + if (perf != this_perf) { | |
| 221 | + perf = RISCV_HWPROBE_MISALIGNED_VECTOR_UNKNOWN; | |
| 222 | + break; | |
| 223 | + } | |
| 224 | + } | |
| 225 | + | |
| 226 | + if (perf == -1ULL) | |
| 227 | + return RISCV_HWPROBE_MISALIGNED_VECTOR_UNKNOWN; | |
| 228 | + | |
| 229 | + return perf; | |
| 230 | +} | |
| 231 | +#else | |
| 232 | +static u64 hwprobe_vec_misaligned(const struct cpumask *cpus) | |
| 233 | +{ | |
| 234 | + if (IS_ENABLED(CONFIG_RISCV_EFFICIENT_VECTOR_UNALIGNED_ACCESS)) | |
| 235 | + return RISCV_HWPROBE_MISALIGNED_VECTOR_FAST; | |
| 236 | + | |
| 237 | + if (IS_ENABLED(CONFIG_RISCV_SLOW_VECTOR_UNALIGNED_ACCESS)) | |
| 238 | + return RISCV_HWPROBE_MISALIGNED_VECTOR_SLOW; | |
| 239 | + | |
| 240 | + return RISCV_HWPROBE_MISALIGNED_VECTOR_UNKNOWN; | |
| 241 | +} | |
| 242 | +#endif | |
| 243 | + | |
| 204 | 244 | static void hwprobe_one_pair(struct riscv_hwprobe *pair, |
| 205 | 245 | const struct cpumask *cpus) |
| 206 | 246 | { |
| @@ -229,6 +269,10 @@ static void hwprobe_one_pair(struct riscv_hwprobe *pair, · 22 unmodified lines | ||
| 229 | 269 | pair->value = hwprobe_misaligned(cpus); |
| 230 | 270 | break; |
| 231 | 271 | |
| 272 | + case RISCV_HWPROBE_KEY_MISALIGNED_VECTOR_PERF: | |
| 273 | + pair->value = hwprobe_vec_misaligned(cpus); | |
| 274 | + break; | |
| 275 | + | |
| 232 | 276 | case RISCV_HWPROBE_KEY_ZICBOZ_BLOCK_SIZE: |
| 233 | 277 | pair->value = 0; |
| 234 | 278 | if (hwprobe_ext0_has(cpus, RISCV_HWPROBE_EXT_ZICBOZ)) |
| @@ -16,6 +16,7 @@ · 15 unmodified lines | ||
| 16 | 16 | #include <asm/entry-common.h> |
| 17 | 17 | #include <asm/hwprobe.h> |
| 18 | 18 | #include <asm/cpufeature.h> |
| 19 | +#include <asm/vector.h> | |
| 19 | 20 | |
| 20 | 21 | #define INSN_MATCH_LB 0x3 |
| 21 | 22 | #define INSN_MASK_LB 0x707f |
| @@ -320,12 +321,37 @@ union reg_data { · 298 unmodified lines | ||
| 320 | 321 | u64 data_u64; |
| 321 | 322 | }; |
| 322 | 323 | |
| 323 | −static bool unaligned_ctl __read_mostly; | |
| 324 | − | |
| 325 | 324 | /* sysctl hooks */ |
| 326 | 325 | int unaligned_enabled __read_mostly = 1; /* Enabled by default */ |
| 327 | 326 | |
| 328 | −int handle_misaligned_load(struct pt_regs *regs) | |
| 327 | +#ifdef CONFIG_RISCV_VECTOR_MISALIGNED | |
| 328 | +static int handle_vector_misaligned_load(struct pt_regs *regs) | |
| 329 | +{ | |
| 330 | + unsigned long epc = regs->epc; | |
| 331 | + unsigned long insn; | |
| 332 | + | |
| 333 | + if (get_insn(regs, epc, &insn)) | |
| 334 | + return -1; | |
| 335 | + | |
| 336 | + /* Only return 0 when in check_vector_unaligned_access_emulated */ | |
| 337 | + if (*this_cpu_ptr(&vector_misaligned_access) == RISCV_HWPROBE_MISALIGNED_VECTOR_UNKNOWN) { | |
| 338 | + *this_cpu_ptr(&vector_misaligned_access) = RISCV_HWPROBE_MISALIGNED_VECTOR_UNSUPPORTED; | |
| 339 | + regs->epc = epc + INSN_LEN(insn); | |
| 340 | + return 0; | |
| 341 | + } | |
| 342 | + | |
| 343 | + /* If vector instruction we don't emulate it yet */ | |
| 344 | + regs->epc = epc; | |
| 345 | + return -1; | |
| 346 | +} | |
| 347 | +#else | |
| 348 | +static int handle_vector_misaligned_load(struct pt_regs *regs) | |
| 349 | +{ | |
| 350 | + return -1; | |
| 351 | +} | |
| 352 | +#endif | |
| 353 | + | |
| 354 | +static int handle_scalar_misaligned_load(struct pt_regs *regs) | |
| 329 | 355 | { |
| 330 | 356 | union reg_data val; |
| 331 | 357 | unsigned long epc = regs->epc; |
| @@ -433,7 +459,7 @@ int handle_misaligned_load(struct pt_regs *regs) · 101 unmodified lines | ||
| 433 | 459 | return 0; |
| 434 | 460 | } |
| 435 | 461 | |
| 436 | −int handle_misaligned_store(struct pt_regs *regs) | |
| 462 | +static int handle_scalar_misaligned_store(struct pt_regs *regs) | |
| 437 | 463 | { |
| 438 | 464 | union reg_data val; |
| 439 | 465 | unsigned long epc = regs->epc; |
| @@ -524,11 +550,96 @@ int handle_misaligned_store(struct pt_regs *regs) · 84 unmodified lines | ||
| 524 | 550 | return 0; |
| 525 | 551 | } |
| 526 | 552 | |
| 527 | −static bool check_unaligned_access_emulated(int cpu) | |
| 553 | +int handle_misaligned_load(struct pt_regs *regs) | |
| 554 | +{ | |
| 555 | + unsigned long epc = regs->epc; | |
| 556 | + unsigned long insn; | |
| 557 | + | |
| 558 | + if (IS_ENABLED(CONFIG_RISCV_VECTOR_MISALIGNED)) { | |
| 559 | + if (get_insn(regs, epc, &insn)) | |
| 560 | + return -1; | |
| 561 | + | |
| 562 | + if (insn_is_vector(insn)) | |
| 563 | + return handle_vector_misaligned_load(regs); | |
| 564 | + } | |
| 565 | + | |
| 566 | + if (IS_ENABLED(CONFIG_RISCV_SCALAR_MISALIGNED)) | |
| 567 | + return handle_scalar_misaligned_load(regs); | |
| 568 | + | |
| 569 | + return -1; | |
| 570 | +} | |
| 571 | + | |
| 572 | +int handle_misaligned_store(struct pt_regs *regs) | |
| 528 | 573 | { |
| 574 | + if (IS_ENABLED(CONFIG_RISCV_SCALAR_MISALIGNED)) | |
| 575 | + return handle_scalar_misaligned_store(regs); | |
| 576 | + | |
| 577 | + return -1; | |
| 578 | +} | |
| 579 | + | |
| 580 | +#ifdef CONFIG_RISCV_VECTOR_MISALIGNED | |
| 581 | +void check_vector_unaligned_access_emulated(struct work_struct *work __always_unused) | |
| 582 | +{ | |
| 583 | + long *mas_ptr = this_cpu_ptr(&vector_misaligned_access); | |
| 584 | + unsigned long tmp_var; | |
| 585 | + | |
| 586 | + *mas_ptr = RISCV_HWPROBE_MISALIGNED_VECTOR_UNKNOWN; | |
| 587 | + | |
| 588 | + kernel_vector_begin(); | |
| 589 | + /* | |
| 590 | + * In pre-13.0.0 versions of GCC, vector registers cannot appear in | |
| 591 | + * the clobber list. This inline asm clobbers v0, but since we do not | |
| 592 | + * currently build the kernel with V enabled, the v0 clobber arg is not | |
| 593 | + * needed (as the compiler will not emit vector code itself). If the kernel | |
| 594 | + * is changed to build with V enabled, the clobber arg will need to be | |
| 595 | + * added here. | |
| 596 | + */ | |
| 597 | + __asm__ __volatile__ ( | |
| 598 | + ".balign 4\n\t" | |
| 599 | + ".option push\n\t" | |
| 600 | + ".option arch, +zve32x\n\t" | |
| 601 | + " vsetivli zero, 1, e16, m1, ta, ma\n\t" // Vectors of 16b | |
| 602 | + " vle16.v v0, (%[ptr])\n\t" // Load bytes | |
| 603 | + ".option pop\n\t" | |
| 604 | + : : [ptr] "r" ((u8 *)&tmp_var + 1)); | |
| 605 | + kernel_vector_end(); | |
| 606 | +} | |
| 607 | + | |
| 608 | +bool check_vector_unaligned_access_emulated_all_cpus(void) | |
| 609 | +{ | |
| 610 | + int cpu; | |
| 611 | + | |
| 612 | + if (!has_vector()) { | |
| 613 | + for_each_online_cpu(cpu) | |
| 614 | + per_cpu(vector_misaligned_access, cpu) = RISCV_HWPROBE_MISALIGNED_VECTOR_UNSUPPORTED; | |
| 615 | + return false; | |
| 616 | + } | |
| 617 | + | |
| 618 | + schedule_on_each_cpu(check_vector_unaligned_access_emulated); | |
| 619 | + | |
| 620 | + for_each_online_cpu(cpu) | |
| 621 | + if (per_cpu(vector_misaligned_access, cpu) | |
| 622 | + == RISCV_HWPROBE_MISALIGNED_VECTOR_UNKNOWN) | |
| 623 | + return false; | |
| 624 | + | |
| 625 | + return true; | |
| 626 | +} | |
| 627 | +#else | |
| 628 | +bool check_vector_unaligned_access_emulated_all_cpus(void) | |
| 629 | +{ | |
| 630 | + return false; | |
| 631 | +} | |
| 632 | +#endif | |
| 633 | + | |
| 634 | +#ifdef CONFIG_RISCV_SCALAR_MISALIGNED | |
| 635 | + | |
| 636 | +static bool unaligned_ctl __read_mostly; | |
| 637 | + | |
| 638 | +void check_unaligned_access_emulated(struct work_struct *work __always_unused) | |
| 639 | +{ | |
| 640 | + int cpu = smp_processor_id(); | |
| 529 | 641 | long *mas_ptr = per_cpu_ptr(&misaligned_access_speed, cpu); |
| 530 | 642 | unsigned long tmp_var, tmp_val; |
| 531 | − bool misaligned_emu_detected; | |
| 532 | 643 | |
| 533 | 644 | *mas_ptr = RISCV_HWPROBE_MISALIGNED_SCALAR_UNKNOWN; |
| 534 | 645 | |
| @@ -536,19 +647,16 @@ static bool check_unaligned_access_emulated(int cpu) · 1 unmodified line | ||
| 536 | 647 | " "REG_L" %[tmp], 1(%[ptr])\n" |
| 537 | 648 | : [tmp] "=r" (tmp_val) : [ptr] "r" (&tmp_var) : "memory"); |
| 538 | 649 | |
| 539 | − misaligned_emu_detected = (*mas_ptr == RISCV_HWPROBE_MISALIGNED_SCALAR_EMULATED); | |
| 540 | 650 | /* |
| 541 | 651 | * If unaligned_ctl is already set, this means that we detected that all |
| 542 | 652 | * CPUS uses emulated misaligned access at boot time. If that changed |
| 543 | 653 | * when hotplugging the new cpu, this is something we don't handle. |
| 544 | 654 | */ |
| 545 | − if (unlikely(unaligned_ctl && !misaligned_emu_detected)) { | |
| 655 | + if (unlikely(unaligned_ctl && (*mas_ptr != RISCV_HWPROBE_MISALIGNED_SCALAR_EMULATED))) { | |
| 546 | 656 | pr_crit("CPU misaligned accesses non homogeneous (expected all emulated)\n"); |
| 547 | 657 | while (true) |
| 548 | 658 | cpu_relax(); |
| 549 | 659 | } |
| 550 | − | |
| 551 | − return misaligned_emu_detected; | |
| 552 | 660 | } |
| 553 | 661 | |
| 554 | 662 | bool check_unaligned_access_emulated_all_cpus(void) |
| @@ -560,8 +668,11 @@ bool check_unaligned_access_emulated_all_cpus(void) · 5 unmodified lines | ||
| 560 | 668 | * accesses emulated since tasks requesting such control can run on any |
| 561 | 669 | * CPU. |
| 562 | 670 | */ |
| 671 | + schedule_on_each_cpu(check_unaligned_access_emulated); | |
| 672 | + | |
| 563 | 673 | for_each_online_cpu(cpu) |
| 564 | − if (!check_unaligned_access_emulated(cpu)) | |
| 674 | + if (per_cpu(misaligned_access_speed, cpu) | |
| 675 | + != RISCV_HWPROBE_MISALIGNED_SCALAR_EMULATED) | |
| 565 | 676 | return false; |
| 566 | 677 | |
| 567 | 678 | unaligned_ctl = true; |
| @@ -572,3 +683,9 @@ bool unaligned_ctl_available(void) · 4 unmodified lines | ||
| 572 | 683 | { |
| 573 | 684 | return unaligned_ctl; |
| 574 | 685 | } |
| 686 | +#else | |
| 687 | +bool check_unaligned_access_emulated_all_cpus(void) | |
| 688 | +{ | |
| 689 | + return false; | |
| 690 | +} | |
| 691 | +#endif | |
| @@ -6,11 +6,13 @@ · 5 unmodified lines | ||
| 6 | 6 | #include <linux/cpu.h> |
| 7 | 7 | #include <linux/cpumask.h> |
| 8 | 8 | #include <linux/jump_label.h> |
| 9 | +#include <linux/kthread.h> | |
| 9 | 10 | #include <linux/mm.h> |
| 10 | 11 | #include <linux/smp.h> |
| 11 | 12 | #include <linux/types.h> |
| 12 | 13 | #include <asm/cpufeature.h> |
| 13 | 14 | #include <asm/hwprobe.h> |
| 15 | +#include <asm/vector.h> | |
| 14 | 16 | |
| 15 | 17 | #include "copy-unaligned.h" |
| 16 | 18 | |
| @@ -19,7 +21,8 @@ · 2 unmodified lines | ||
| 19 | 21 | #define MISALIGNED_BUFFER_ORDER get_order(MISALIGNED_BUFFER_SIZE) |
| 20 | 22 | #define MISALIGNED_COPY_SIZE ((MISALIGNED_BUFFER_SIZE / 2) - 0x80) |
| 21 | 23 | |
| 22 | −DEFINE_PER_CPU(long, misaligned_access_speed); | |
| 24 | +DEFINE_PER_CPU(long, misaligned_access_speed) = RISCV_HWPROBE_MISALIGNED_SCALAR_UNKNOWN; | |
| 25 | +DEFINE_PER_CPU(long, vector_misaligned_access) = RISCV_HWPROBE_MISALIGNED_VECTOR_UNSUPPORTED; | |
| 23 | 26 | |
| 24 | 27 | #ifdef CONFIG_RISCV_PROBE_UNALIGNED_ACCESS |
| 25 | 28 | static cpumask_t fast_misaligned_access; |
| @@ -191,6 +194,7 @@ static int riscv_online_cpu(unsigned int cpu) · 165 unmodified lines | ||
| 191 | 194 | if (per_cpu(misaligned_access_speed, cpu) != RISCV_HWPROBE_MISALIGNED_SCALAR_UNKNOWN) |
| 192 | 195 | goto exit; |
| 193 | 196 | |
| 197 | + check_unaligned_access_emulated(NULL); | |
| 194 | 198 | buf = alloc_pages(GFP_KERNEL, MISALIGNED_BUFFER_ORDER); |
| 195 | 199 | if (!buf) { |
| 196 | 200 | pr_warn("Allocation failure, not measuring misaligned performance\n"); |
| @@ -259,23 +263,159 @@ out: · 62 unmodified lines | ||
| 259 | 263 | kfree(bufs); |
| 260 | 264 | return 0; |
| 261 | 265 | } |
| 266 | +#else /* CONFIG_RISCV_PROBE_UNALIGNED_ACCESS */ | |
| 267 | +static int check_unaligned_access_speed_all_cpus(void) | |
| 268 | +{ | |
| 269 | + return 0; | |
| 270 | +} | |
| 271 | +#endif | |
| 262 | 272 | |
| 263 | −static int check_unaligned_access_all_cpus(void) | |
| 273 | +#ifdef CONFIG_RISCV_PROBE_VECTOR_UNALIGNED_ACCESS | |
| 274 | +static void check_vector_unaligned_access(struct work_struct *work __always_unused) | |
| 264 | 275 | { |
| 265 | − bool all_cpus_emulated = check_unaligned_access_emulated_all_cpus(); | |
| 276 | + int cpu = smp_processor_id(); | |
| 277 | + u64 start_cycles, end_cycles; | |
| 278 | + u64 word_cycles; | |
| 279 | + u64 byte_cycles; | |
| 280 | + int ratio; | |
| 281 | + unsigned long start_jiffies, now; | |
| 282 | + struct page *page; | |
| 283 | + void *dst; | |
| 284 | + void *src; | |
| 285 | + long speed = RISCV_HWPROBE_MISALIGNED_VECTOR_SLOW; | |
| 266 | 286 | |
| 267 | − if (!all_cpus_emulated) | |
| 268 | − return check_unaligned_access_speed_all_cpus(); | |
| 287 | + if (per_cpu(vector_misaligned_access, cpu) != RISCV_HWPROBE_MISALIGNED_VECTOR_UNKNOWN) | |
| 288 | + return; | |
| 289 | + | |
| 290 | + page = alloc_pages(GFP_KERNEL, MISALIGNED_BUFFER_ORDER); | |
| 291 | + if (!page) { | |
| 292 | + pr_warn("Allocation failure, not measuring vector misaligned performance\n"); | |
| 293 | + return; | |
| 294 | + } | |
| 295 | + | |
| 296 | + /* Make an unaligned destination buffer. */ | |
| 297 | + dst = (void *)((unsigned long)page_address(page) | 0x1); | |
| 298 | + /* Unalign src as well, but differently (off by 1 + 2 = 3). */ | |
| 299 | + src = dst + (MISALIGNED_BUFFER_SIZE / 2); | |
| 300 | + src += 2; | |
| 301 | + word_cycles = -1ULL; | |
| 302 | + | |
| 303 | + /* Do a warmup. */ | |
| 304 | + kernel_vector_begin(); | |
| 305 | + __riscv_copy_vec_words_unaligned(dst, src, MISALIGNED_COPY_SIZE); | |
| 269 | 306 | |
| 307 | + start_jiffies = jiffies; | |
| 308 | + while ((now = jiffies) == start_jiffies) | |
| 309 | + cpu_relax(); | |
| 310 | + | |
| 311 | + /* | |
| 312 | + * For a fixed amount of time, repeatedly try the function, and take | |
| 313 | + * the best time in cycles as the measurement. | |
| 314 | + */ | |
| 315 | + while (time_before(jiffies, now + (1 << MISALIGNED_ACCESS_JIFFIES_LG2))) { | |
| 316 | + start_cycles = get_cycles64(); | |
| 317 | + /* Ensure the CSR read can't reorder WRT to the copy. */ | |
| 318 | + mb(); | |
| 319 | + __riscv_copy_vec_words_unaligned(dst, src, MISALIGNED_COPY_SIZE); | |
| 320 | + /* Ensure the copy ends before the end time is snapped. */ | |
| 321 | + mb(); | |
| 322 | + end_cycles = get_cycles64(); | |
| 323 | + if ((end_cycles - start_cycles) < word_cycles) | |
| 324 | + word_cycles = end_cycles - start_cycles; | |
| 325 | + } | |
| 326 | + | |
| 327 | + byte_cycles = -1ULL; | |
| 328 | + __riscv_copy_vec_bytes_unaligned(dst, src, MISALIGNED_COPY_SIZE); | |
| 329 | + start_jiffies = jiffies; | |
| 330 | + while ((now = jiffies) == start_jiffies) | |
| 331 | + cpu_relax(); | |
| 332 | + | |
| 333 | + while (time_before(jiffies, now + (1 << MISALIGNED_ACCESS_JIFFIES_LG2))) { | |
| 334 | + start_cycles = get_cycles64(); | |
| 335 | + /* Ensure the CSR read can't reorder WRT to the copy. */ | |
| 336 | + mb(); | |
| 337 | + __riscv_copy_vec_bytes_unaligned(dst, src, MISALIGNED_COPY_SIZE); | |
| 338 | + /* Ensure the copy ends before the end time is snapped. */ | |
| 339 | + mb(); | |
| 340 | + end_cycles = get_cycles64(); | |
| 341 | + if ((end_cycles - start_cycles) < byte_cycles) | |
| 342 | + byte_cycles = end_cycles - start_cycles; | |
| 343 | + } | |
| 344 | + | |
| 345 | + kernel_vector_end(); | |
| 346 | + | |
| 347 | + /* Don't divide by zero. */ | |
| 348 | + if (!word_cycles || !byte_cycles) { | |
| 349 | + pr_warn("cpu%d: rdtime lacks granularity needed to measure unaligned vector access speed\n", | |
| 350 | + cpu); | |
| 351 | + | |
| 352 | + return; | |
| 353 | + } | |
| 354 | + | |
| 355 | + if (word_cycles < byte_cycles) | |
| 356 | + speed = RISCV_HWPROBE_MISALIGNED_VECTOR_FAST; | |
| 357 | + | |
| 358 | + ratio = div_u64((byte_cycles * 100), word_cycles); | |
| 359 | + pr_info("cpu%d: Ratio of vector byte access time to vector unaligned word access is %d.%02d, unaligned accesses are %s\n", | |
| 360 | + cpu, | |
| 361 | + ratio / 100, | |
| 362 | + ratio % 100, | |
| 363 | + (speed == RISCV_HWPROBE_MISALIGNED_VECTOR_FAST) ? "fast" : "slow"); | |
| 364 | + | |
| 365 | + per_cpu(vector_misaligned_access, cpu) = speed; | |
| 366 | +} | |
| 367 | + | |
| 368 | +static int riscv_online_cpu_vec(unsigned int cpu) | |
| 369 | +{ | |
| 370 | + if (!has_vector()) | |
| 371 | + return 0; | |
| 372 | + | |
| 373 | + if (per_cpu(vector_misaligned_access, cpu) != RISCV_HWPROBE_MISALIGNED_VECTOR_UNSUPPORTED) | |
| 374 | + return 0; | |
| 375 | + | |
| 376 | + check_vector_unaligned_access_emulated(NULL); | |
| 377 | + check_vector_unaligned_access(NULL); | |
| 270 | 378 | return 0; |
| 271 | 379 | } |
| 272 | −#else /* CONFIG_RISCV_PROBE_UNALIGNED_ACCESS */ | |
| 273 | −static int check_unaligned_access_all_cpus(void) | |
| 380 | + | |
| 381 | +/* Measure unaligned access speed on all CPUs present at boot in parallel. */ | |
| 382 | +static int vec_check_unaligned_access_speed_all_cpus(void *unused __always_unused) | |
| 274 | 383 | { |
| 275 | − check_unaligned_access_emulated_all_cpus(); | |
| 384 | + schedule_on_each_cpu(check_vector_unaligned_access); | |
| 385 | + | |
| 386 | + /* | |
| 387 | + * Setup hotplug callbacks for any new CPUs that come online or go | |
| 388 | + * offline. | |
| 389 | + */ | |
| 390 | + cpuhp_setup_state_nocalls(CPUHP_AP_ONLINE_DYN, "riscv:online", | |
| 391 | + riscv_online_cpu_vec, NULL); | |
| 276 | 392 | |
| 277 | 393 | return 0; |
| 278 | 394 | } |
| 395 | +#else /* CONFIG_RISCV_PROBE_VECTOR_UNALIGNED_ACCESS */ | |
| 396 | +static int vec_check_unaligned_access_speed_all_cpus(void *unused __always_unused) | |
| 397 | +{ | |
| 398 | + return 0; | |
| 399 | +} | |
| 279 | 400 | #endif |
| 280 | 401 | |
| 402 | +static int check_unaligned_access_all_cpus(void) | |
| 403 | +{ | |
| 404 | + bool all_cpus_emulated, all_cpus_vec_unsupported; | |
| 405 | + | |
| 406 | + all_cpus_emulated = check_unaligned_access_emulated_all_cpus(); | |
| 407 | + all_cpus_vec_unsupported = check_vector_unaligned_access_emulated_all_cpus(); | |
| 408 | + | |
| 409 | + if (!all_cpus_vec_unsupported && | |
| 410 | + IS_ENABLED(CONFIG_RISCV_PROBE_VECTOR_UNALIGNED_ACCESS)) { | |
| 411 | + kthread_run(vec_check_unaligned_access_speed_all_cpus, | |
| 412 | + NULL, "vec_check_unaligned_access_speed_all_cpus"); | |
| 413 | + } | |
| 414 | + | |
| 415 | + if (!all_cpus_emulated) | |
| 416 | + return check_unaligned_access_speed_all_cpus(); | |
| 417 | + | |
| 418 | + return 0; | |
| 419 | +} | |
| 420 | + | |
| 281 | 421 | arch_initcall(check_unaligned_access_all_cpus); |
| @@ -45,7 +45,7 @@ $(obj)/vdso.o: $(obj)/vdso.so · 44 unmodified lines | ||
| 45 | 45 | |
| 46 | 46 | # link rule for the .so file, .lds has to be first |
| 47 | 47 | $(obj)/vdso.so.dbg: $(obj)/vdso.lds $(obj-vdso) FORCE |
| 48 | − $(call if_changed,vdsold) | |
| 48 | + $(call if_changed,vdsold_and_check) | |
| 49 | 49 | LDFLAGS_vdso.so.dbg = -shared -soname=linux-vdso.so.1 \ |
| 50 | 50 | --build-id=sha1 --hash-style=both --eh-frame-hdr |
| 51 | 51 | |
| @@ -65,7 +65,8 @@ include/generated/vdso-offsets.h: $(obj)/vdso.so.dbg FORCE · 13 unmodified lines | ||
| 65 | 65 | # actual build commands |
| 66 | 66 | # The DSO images are built using a special linker script |
| 67 | 67 | # Make sure only to export the intended __vdso_xxx symbol offsets. |
| 68 | −quiet_cmd_vdsold = VDSOLD $@ | |
| 69 | − cmd_vdsold = $(LD) $(ld_flags) -T $(filter-out FORCE,$^) -o $@.tmp && \ | |
| 68 | +quiet_cmd_vdsold_and_check = VDSOLD $@ | |
| 69 | + cmd_vdsold_and_check = $(LD) $(ld_flags) -T $(filter-out FORCE,$^) -o $@.tmp && \ | |
| 70 | 70 | $(OBJCOPY) $(patsubst %, -G __vdso_%, $(vdso-syms)) $@.tmp $@ && \ |
| 71 | − rm $@.tmp | |
| 71 | + rm $@.tmp && \ | |
| 72 | + $(cmd_vdso_check) | |
| @@ -0,0 +1,58 @@ | ||
| 1 | +/* SPDX-License-Identifier: GPL-2.0 */ | |
| 2 | +/* Copyright (C) 2024 Rivos Inc. */ | |
| 3 | + | |
| 4 | +#include <linux/args.h> | |
| 5 | +#include <linux/linkage.h> | |
| 6 | +#include <asm/asm.h> | |
| 7 | + | |
| 8 | + .text | |
| 9 | + | |
| 10 | +#define WORD_EEW 32 | |
| 11 | + | |
| 12 | +#define WORD_SEW CONCATENATE(e, WORD_EEW) | |
| 13 | +#define VEC_L CONCATENATE(vle, WORD_EEW).v | |
| 14 | +#define VEC_S CONCATENATE(vle, WORD_EEW).v | |
| 15 | + | |
| 16 | +/* void __riscv_copy_vec_words_unaligned(void *, const void *, size_t) */ | |
| 17 | +/* Performs a memcpy without aligning buffers, using word loads and stores. */ | |
| 18 | +/* Note: The size is truncated to a multiple of WORD_EEW */ | |
| 19 | +SYM_FUNC_START(__riscv_copy_vec_words_unaligned) | |
| 20 | + andi a4, a2, ~(WORD_EEW-1) | |
| 21 | + beqz a4, 2f | |
| 22 | + add a3, a1, a4 | |
| 23 | + .option push | |
| 24 | + .option arch, +zve32x | |
| 25 | +1: | |
| 26 | + vsetivli t0, 8, WORD_SEW, m8, ta, ma | |
| 27 | + VEC_L v0, (a1) | |
| 28 | + VEC_S v0, (a0) | |
| 29 | + addi a0, a0, WORD_EEW | |
| 30 | + addi a1, a1, WORD_EEW | |
| 31 | + bltu a1, a3, 1b | |
| 32 | + | |
| 33 | +2: | |
| 34 | + .option pop | |
| 35 | + ret | |
| 36 | +SYM_FUNC_END(__riscv_copy_vec_words_unaligned) | |
| 37 | + | |
| 38 | +/* void __riscv_copy_vec_bytes_unaligned(void *, const void *, size_t) */ | |
| 39 | +/* Performs a memcpy without aligning buffers, using only byte accesses. */ | |
| 40 | +/* Note: The size is truncated to a multiple of 8 */ | |
| 41 | +SYM_FUNC_START(__riscv_copy_vec_bytes_unaligned) | |
| 42 | + andi a4, a2, ~(8-1) | |
| 43 | + beqz a4, 2f | |
| 44 | + add a3, a1, a4 | |
| 45 | + .option push | |
| 46 | + .option arch, +zve32x | |
| 47 | +1: | |
| 48 | + vsetivli t0, 8, e8, m8, ta, ma | |
| 49 | + vle8.v v0, (a1) | |
| 50 | + vse8.v v0, (a0) | |
| 51 | + addi a0, a0, 8 | |
| 52 | + addi a1, a1, 8 | |
| 53 | + bltu a1, a3, 1b | |
| 54 | + | |
| 55 | +2: | |
| 56 | + .option pop | |
| 57 | + ret | |
| 58 | +SYM_FUNC_END(__riscv_copy_vec_bytes_unaligned) | |
| @@ -66,7 +66,7 @@ void __init riscv_v_setup_ctx_cache(void) · 65 unmodified lines | ||
| 66 | 66 | #endif |
| 67 | 67 | } |
| 68 | 68 | |
| 69 | −static bool insn_is_vector(u32 insn_buf) | |
| 69 | +bool insn_is_vector(u32 insn_buf) | |
| 70 | 70 | { |
| 71 | 71 | u32 opcode = insn_buf & __INSN_OPCODE_MASK; |
| 72 | 72 | u32 width, csr; |
| @@ -551,6 +551,10 @@ static void kvm_riscv_vcpu_setup_config(struct kvm_vcpu *vcpu) · 550 unmodified lines | ||
| 551 | 551 | if (riscv_isa_extension_available(isa, ZICBOZ)) |
| 552 | 552 | cfg->henvcfg |= ENVCFG_CBZE; |
| 553 | 553 | |
| 554 | + if (riscv_isa_extension_available(isa, SVADU) && | |
| 555 | + !riscv_isa_extension_available(isa, SVADE)) | |
| 556 | + cfg->henvcfg |= ENVCFG_ADUE; | |
| 557 | + | |
| 554 | 558 | if (riscv_has_extension_unlikely(RISCV_ISA_EXT_SMSTATEEN)) { |
| 555 | 559 | cfg->hstateen0 |= SMSTATEEN0_HSENVCFG; |
| 556 | 560 | if (riscv_isa_extension_available(isa, SSAIA)) |
| @@ -15,6 +15,7 @@ · 14 unmodified lines | ||
| 15 | 15 | #include <asm/cacheflush.h> |
| 16 | 16 | #include <asm/cpufeature.h> |
| 17 | 17 | #include <asm/kvm_vcpu_vector.h> |
| 18 | +#include <asm/pgtable.h> | |
| 18 | 19 | #include <asm/vector.h> |
| 19 | 20 | |
| 20 | 21 | #define KVM_RISCV_BASE_ISA_MASK GENMASK(25, 0) |
| @@ -34,10 +35,14 @@ static const unsigned long kvm_isa_ext_arr[] = { · 13 unmodified lines | ||
| 34 | 35 | [KVM_RISCV_ISA_EXT_M] = RISCV_ISA_EXT_m, |
| 35 | 36 | [KVM_RISCV_ISA_EXT_V] = RISCV_ISA_EXT_v, |
| 36 | 37 | /* Multi letter extensions (alphabetically sorted) */ |
| 38 | + [KVM_RISCV_ISA_EXT_SMNPM] = RISCV_ISA_EXT_SSNPM, | |
| 37 | 39 | KVM_ISA_EXT_ARR(SMSTATEEN), |
| 38 | 40 | KVM_ISA_EXT_ARR(SSAIA), |
| 39 | 41 | KVM_ISA_EXT_ARR(SSCOFPMF), |
| 42 | + KVM_ISA_EXT_ARR(SSNPM), | |
| 40 | 43 | KVM_ISA_EXT_ARR(SSTC), |
| 44 | + KVM_ISA_EXT_ARR(SVADE), | |
| 45 | + KVM_ISA_EXT_ARR(SVADU), | |
| 41 | 46 | KVM_ISA_EXT_ARR(SVINVAL), |
| 42 | 47 | KVM_ISA_EXT_ARR(SVNAPOT), |
| 43 | 48 | KVM_ISA_EXT_ARR(SVPBMT), |
| @@ -110,6 +115,12 @@ static bool kvm_riscv_vcpu_isa_enable_allowed(unsigned long ext) · 66 unmodified lines | ||
| 110 | 115 | case KVM_RISCV_ISA_EXT_SSCOFPMF: |
| 111 | 116 | /* Sscofpmf depends on interrupt filtering defined in ssaia */ |
| 112 | 117 | return __riscv_isa_extension_available(NULL, RISCV_ISA_EXT_SSAIA); |
| 118 | + case KVM_RISCV_ISA_EXT_SVADU: | |
| 119 | + /* | |
| 120 | + * The henvcfg.ADUE is read-only zero if menvcfg.ADUE is zero. | |
| 121 | + * Guest OS can use Svadu only when host OS enable Svadu. | |
| 122 | + */ | |
| 123 | + return arch_has_hw_pte_young(); | |
| 113 | 124 | case KVM_RISCV_ISA_EXT_V: |
| 114 | 125 | return riscv_v_vstate_ctrl_user_allowed(); |
| 115 | 126 | default: |
| @@ -127,8 +138,10 @@ static bool kvm_riscv_vcpu_isa_disable_allowed(unsigned long ext) · 11 unmodified lines | ||
| 127 | 138 | case KVM_RISCV_ISA_EXT_C: |
| 128 | 139 | case KVM_RISCV_ISA_EXT_I: |
| 129 | 140 | case KVM_RISCV_ISA_EXT_M: |
| 141 | + case KVM_RISCV_ISA_EXT_SMNPM: | |
| 130 | 142 | /* There is not architectural config bit to disable sscofpmf completely */ |
| 131 | 143 | case KVM_RISCV_ISA_EXT_SSCOFPMF: |
| 144 | + case KVM_RISCV_ISA_EXT_SSNPM: | |
| 132 | 145 | case KVM_RISCV_ISA_EXT_SSTC: |
| 133 | 146 | case KVM_RISCV_ISA_EXT_SVINVAL: |
| 134 | 147 | case KVM_RISCV_ISA_EXT_SVNAPOT: |
| @@ -181,6 +194,12 @@ static bool kvm_riscv_vcpu_isa_disable_allowed(unsigned long ext) · 46 unmodified lines | ||
| 181 | 194 | /* Extensions which can be disabled using Smstateen */ |
| 182 | 195 | case KVM_RISCV_ISA_EXT_SSAIA: |
| 183 | 196 | return riscv_has_extension_unlikely(RISCV_ISA_EXT_SMSTATEEN); |
| 197 | + case KVM_RISCV_ISA_EXT_SVADE: | |
| 198 | + /* | |
| 199 | + * The henvcfg.ADUE is read-only zero if menvcfg.ADUE is zero. | |
| 200 | + * Svade is not allowed to disable when the platform use Svade. | |
| 201 | + */ | |
| 202 | + return arch_has_hw_pte_young(); | |
| 184 | 203 | default: |
| 185 | 204 | break; |
| 186 | 205 | } |
| @@ -87,6 +87,7 @@ config S390 · 86 unmodified lines | ||
| 87 | 87 | select ARCH_HAS_MEMBARRIER_SYNC_CORE |
| 88 | 88 | select ARCH_HAS_MEM_ENCRYPT |
| 89 | 89 | select ARCH_HAS_NMI_SAFE_THIS_CPU_OPS |
| 90 | + select ARCH_HAS_PREEMPT_LAZY | |
| 90 | 91 | select ARCH_HAS_PTE_SPECIAL |
| 91 | 92 | select ARCH_HAS_SCALED_CPUTIME |
| 92 | 93 | select ARCH_HAS_SET_DIRECT_MAP |
| @@ -218,6 +219,7 @@ config S390 · 125 unmodified lines | ||
| 218 | 219 | select HAVE_PERF_EVENTS |
| 219 | 220 | select HAVE_PERF_REGS |
| 220 | 221 | select HAVE_PERF_USER_STACK_DUMP |
| 222 | + select HAVE_PREEMPT_DYNAMIC_KEY | |
| 221 | 223 | select HAVE_REGS_AND_STACK_ACCESS_API |
| 222 | 224 | select HAVE_RELIABLE_STACKTRACE |
| 223 | 225 | select HAVE_RETHOOK |
| @@ -1168,4 +1168,4 @@ MODULE_ALIAS_CRYPTO("aes-all"); · 1167 unmodified lines | ||
| 1168 | 1168 | |
| 1169 | 1169 | MODULE_DESCRIPTION("Rijndael (AES) Cipher Algorithm"); |
| 1170 | 1170 | MODULE_LICENSE("GPL"); |
| 1171 | −MODULE_IMPORT_NS(CRYPTO_INTERNAL); | |
| 1171 | +MODULE_IMPORT_NS("CRYPTO_INTERNAL"); | |
| @@ -66,14 +66,15 @@ typedef int (debug_header_proc_t) (debug_info_t *id, · 65 unmodified lines | ||
| 66 | 66 | struct debug_view *view, |
| 67 | 67 | int area, |
| 68 | 68 | debug_entry_t *entry, |
| 69 | − char *out_buf); | |
| 69 | + char *out_buf, size_t out_buf_size); | |
| 70 | 70 | |
| 71 | 71 | typedef int (debug_format_proc_t) (debug_info_t *id, |
| 72 | 72 | struct debug_view *view, char *out_buf, |
| 73 | + size_t out_buf_size, | |
| 73 | 74 | const char *in_buf); |
| 74 | 75 | typedef int (debug_prolog_proc_t) (debug_info_t *id, |
| 75 | 76 | struct debug_view *view, |
| 76 | − char *out_buf); | |
| 77 | + char *out_buf, size_t out_buf_size); | |
| 77 | 78 | typedef int (debug_input_proc_t) (debug_info_t *id, |
| 78 | 79 | struct debug_view *view, |
| 79 | 80 | struct file *file, |
| @@ -81,7 +82,8 @@ typedef int (debug_input_proc_t) (debug_info_t *id, · 1 unmodified line | ||
| 81 | 82 | size_t in_buf_size, loff_t *offset); |
| 82 | 83 | |
| 83 | 84 | int debug_dflt_header_fn(debug_info_t *id, struct debug_view *view, |
| 84 | − int area, debug_entry_t *entry, char *out_buf); | |
| 85 | + int area, debug_entry_t *entry, | |
| 86 | + char *out_buf, size_t out_buf_size); | |
| 85 | 87 | |
| 86 | 88 | struct debug_view { |
| 87 | 89 | char name[DEBUG_MAX_NAME_LEN]; |
| @@ -17,8 +17,8 @@ · 16 unmodified lines | ||
| 17 | 17 | #define GMAP_NOTIFY_MPROT 0x1 |
| 18 | 18 | |
| 19 | 19 | /* Status bits only for huge segment entries */ |
| 20 | −#define _SEGMENT_ENTRY_GMAP_IN 0x8000 /* invalidation notify bit */ | |
| 21 | −#define _SEGMENT_ENTRY_GMAP_UC 0x4000 /* dirty (migration) */ | |
| 20 | +#define _SEGMENT_ENTRY_GMAP_IN 0x0800 /* invalidation notify bit */ | |
| 21 | +#define _SEGMENT_ENTRY_GMAP_UC 0x0002 /* dirty (migration) */ | |
| 22 | 22 | |
| 23 | 23 | /** |
| 24 | 24 | * struct gmap_struct - guest address space |
| @@ -10,6 +10,8 @@ · 9 unmodified lines | ||
| 10 | 10 | #define _ASM_S390_HUGETLB_H |
| 11 | 11 | |
| 12 | 12 | #include <linux/pgtable.h> |
| 13 | +#include <linux/swap.h> | |
| 14 | +#include <linux/swapops.h> | |
| 13 | 15 | #include <asm/page.h> |
| 14 | 16 | |
| 15 | 17 | #define hugepages_supported() (MACHINE_HAS_EDAT1) |
| @@ -78,7 +80,7 @@ static inline int huge_pte_none(pte_t pte) · 62 unmodified lines | ||
| 78 | 80 | #define __HAVE_ARCH_HUGE_PTE_NONE_MOSTLY |
| 79 | 81 | static inline int huge_pte_none_mostly(pte_t pte) |
| 80 | 82 | { |
| 81 | − return huge_pte_none(pte); | |
| 83 | + return huge_pte_none(pte) || is_pte_marker(pte); | |
| 82 | 84 | } |
| 83 | 85 | |
| 84 | 86 | #define __HAVE_ARCH_HUGE_PTE_MKUFFD_WP |
| @@ -94,11 +94,16 @@ union ipte_control { · 93 unmodified lines | ||
| 94 | 94 | }; |
| 95 | 95 | }; |
| 96 | 96 | |
| 97 | +/* | |
| 98 | + * Utility is defined as two bytes but having it four bytes wide | |
| 99 | + * generates more efficient code. Since the following bytes are | |
| 100 | + * reserved this makes no functional difference. | |
| 101 | + */ | |
| 97 | 102 | union sca_utility { |
| 98 | − __u16 val; | |
| 103 | + __u32 val; | |
| 99 | 104 | struct { |
| 100 | − __u16 mtcr : 1; | |
| 101 | − __u16 reserved : 15; | |
| 105 | + __u32 mtcr : 1; | |
| 106 | + __u32 : 31; | |
| 102 | 107 | }; |
| 103 | 108 | }; |
| 104 | 109 | |
| @@ -107,7 +112,7 @@ struct bsca_block { · 2 unmodified lines | ||
| 107 | 112 | __u64 reserved[5]; |
| 108 | 113 | __u64 mcn; |
| 109 | 114 | union sca_utility utility; |
| 110 | − __u8 reserved2[6]; | |
| 115 | + __u8 reserved2[4]; | |
| 111 | 116 | struct bsca_entry cpu[KVM_S390_BSCA_CPU_SLOTS]; |
| 112 | 117 | }; |
| 113 | 118 | |
| @@ -115,7 +120,7 @@ struct esca_block { · 1 unmodified line | ||
| 115 | 120 | union ipte_control ipte_control; |
| 116 | 121 | __u64 reserved1[6]; |
| 117 | 122 | union sca_utility utility; |
| 118 | − __u8 reserved2[6]; | |
| 123 | + __u8 reserved2[4]; | |
| 119 | 124 | __u64 mcn[4]; |
| 120 | 125 | __u64 reserved3[20]; |
| 121 | 126 | struct esca_entry cpu[KVM_S390_ESCA_CPU_SLOTS]; |
| @@ -277,7 +277,8 @@ static inline int is_module_addr(void *addr) · 276 unmodified lines | ||
| 277 | 277 | #define _REGION1_ENTRY_EMPTY (_REGION_ENTRY_TYPE_R1 | _REGION_ENTRY_INVALID) |
| 278 | 278 | #define _REGION2_ENTRY (_REGION_ENTRY_TYPE_R2 | _REGION_ENTRY_LENGTH) |
| 279 | 279 | #define _REGION2_ENTRY_EMPTY (_REGION_ENTRY_TYPE_R2 | _REGION_ENTRY_INVALID) |
| 280 | −#define _REGION3_ENTRY (_REGION_ENTRY_TYPE_R3 | _REGION_ENTRY_LENGTH) | |
| 280 | +#define _REGION3_ENTRY (_REGION_ENTRY_TYPE_R3 | _REGION_ENTRY_LENGTH | \ | |
| 281 | + _REGION3_ENTRY_PRESENT) | |
| 281 | 282 | #define _REGION3_ENTRY_EMPTY (_REGION_ENTRY_TYPE_R3 | _REGION_ENTRY_INVALID) |
| 282 | 283 | |
| 283 | 284 | #define _REGION3_ENTRY_HARDWARE_BITS 0xfffffffffffff6ffUL |
| @@ -285,18 +286,27 @@ static inline int is_module_addr(void *addr) · 1 unmodified line | ||
| 285 | 286 | #define _REGION3_ENTRY_ORIGIN_LARGE ~0x7fffffffUL /* large page address */ |
| 286 | 287 | #define _REGION3_ENTRY_DIRTY 0x2000 /* SW region dirty bit */ |
| 287 | 288 | #define _REGION3_ENTRY_YOUNG 0x1000 /* SW region young bit */ |
| 289 | +#define _REGION3_ENTRY_COMM 0x0010 /* Common-Region, marks swap entry */ | |
| 288 | 290 | #define _REGION3_ENTRY_LARGE 0x0400 /* RTTE-format control, large page */ |
| 289 | −#define _REGION3_ENTRY_WRITE 0x0002 /* SW region write bit */ | |
| 290 | −#define _REGION3_ENTRY_READ 0x0001 /* SW region read bit */ | |
| 291 | +#define _REGION3_ENTRY_WRITE 0x8000 /* SW region write bit */ | |
| 292 | +#define _REGION3_ENTRY_READ 0x4000 /* SW region read bit */ | |
| 291 | 293 | |
| 292 | 294 | #ifdef CONFIG_MEM_SOFT_DIRTY |
| 293 | −#define _REGION3_ENTRY_SOFT_DIRTY 0x4000 /* SW region soft dirty bit */ | |
| 295 | +#define _REGION3_ENTRY_SOFT_DIRTY 0x0002 /* SW region soft dirty bit */ | |
| 294 | 296 | #else |
| 295 | 297 | #define _REGION3_ENTRY_SOFT_DIRTY 0x0000 /* SW region soft dirty bit */ |
| 296 | 298 | #endif |
| 297 | 299 | |
| 298 | 300 | #define _REGION_ENTRY_BITS 0xfffffffffffff22fUL |
| 299 | 301 | |
| 302 | +/* | |
| 303 | + * SW region present bit. For non-leaf region-third-table entries, bits 62-63 | |
| 304 | + * indicate the TABLE LENGTH and both must be set to 1. But such entries | |
| 305 | + * would always be considered as present, so it is safe to use bit 63 as | |
| 306 | + * PRESENT bit for PUD. | |
| 307 | + */ | |
| 308 | +#define _REGION3_ENTRY_PRESENT 0x0001 | |
| 309 | + | |
| 300 | 310 | /* Bits in the segment table entry */ |
| 301 | 311 | #define _SEGMENT_ENTRY_BITS 0xfffffffffffffe3fUL |
| 302 | 312 | #define _SEGMENT_ENTRY_HARDWARE_BITS 0xfffffffffffffe3cUL |
| @@ -308,21 +318,29 @@ static inline int is_module_addr(void *addr) · 5 unmodified lines | ||
| 308 | 318 | #define _SEGMENT_ENTRY_INVALID 0x20 /* invalid segment table entry */ |
| 309 | 319 | #define _SEGMENT_ENTRY_TYPE_MASK 0x0c /* segment table type mask */ |
| 310 | 320 | |
| 311 | −#define _SEGMENT_ENTRY (0) | |
| 321 | +#define _SEGMENT_ENTRY (_SEGMENT_ENTRY_PRESENT) | |
| 312 | 322 | #define _SEGMENT_ENTRY_EMPTY (_SEGMENT_ENTRY_INVALID) |
| 313 | 323 | |
| 314 | 324 | #define _SEGMENT_ENTRY_DIRTY 0x2000 /* SW segment dirty bit */ |
| 315 | 325 | #define _SEGMENT_ENTRY_YOUNG 0x1000 /* SW segment young bit */ |
| 326 | + | |
| 327 | +#define _SEGMENT_ENTRY_COMM 0x0010 /* Common-Segment, marks swap entry */ | |
| 316 | 328 | #define _SEGMENT_ENTRY_LARGE 0x0400 /* STE-format control, large page */ |
| 317 | −#define _SEGMENT_ENTRY_WRITE 0x0002 /* SW segment write bit */ | |
| 318 | −#define _SEGMENT_ENTRY_READ 0x0001 /* SW segment read bit */ | |
| 329 | +#define _SEGMENT_ENTRY_WRITE 0x8000 /* SW segment write bit */ | |
| 330 | +#define _SEGMENT_ENTRY_READ 0x4000 /* SW segment read bit */ | |
| 319 | 331 | |
| 320 | 332 | #ifdef CONFIG_MEM_SOFT_DIRTY |
| 321 | −#define _SEGMENT_ENTRY_SOFT_DIRTY 0x4000 /* SW segment soft dirty bit */ | |
| 333 | +#define _SEGMENT_ENTRY_SOFT_DIRTY 0x0002 /* SW segment soft dirty bit */ | |
| 322 | 334 | #else |
| 323 | 335 | #define _SEGMENT_ENTRY_SOFT_DIRTY 0x0000 /* SW segment soft dirty bit */ |
| 324 | 336 | #endif |
| 325 | 337 | |
| 338 | +#define _SEGMENT_ENTRY_PRESENT 0x0001 /* SW segment present bit */ | |
| 339 | + | |
| 340 | +/* Common bits in region and segment table entries, for swap entries */ | |
| 341 | +#define _RST_ENTRY_COMM 0x0010 /* Common-Region/Segment, marks swap entry */ | |
| 342 | +#define _RST_ENTRY_INVALID 0x0020 /* invalid region/segment table entry */ | |
| 343 | + | |
| 326 | 344 | #define _CRST_ENTRIES 2048 /* number of region/segment table entries */ |
| 327 | 345 | #define _PAGE_ENTRIES 256 /* number of page table entries */ |
| 328 | 346 | |
| @@ -454,17 +472,22 @@ static inline int is_module_addr(void *addr) · 125 unmodified lines | ||
| 454 | 472 | /* |
| 455 | 473 | * Segment entry (large page) protection definitions. |
| 456 | 474 | */ |
| 457 | −#define SEGMENT_NONE __pgprot(_SEGMENT_ENTRY_INVALID | \ | |
| 475 | +#define SEGMENT_NONE __pgprot(_SEGMENT_ENTRY_PRESENT | \ | |
| 476 | + _SEGMENT_ENTRY_INVALID | \ | |
| 458 | 477 | _SEGMENT_ENTRY_PROTECT) |
| 459 | −#define SEGMENT_RO __pgprot(_SEGMENT_ENTRY_PROTECT | \ | |
| 478 | +#define SEGMENT_RO __pgprot(_SEGMENT_ENTRY_PRESENT | \ | |
| 479 | + _SEGMENT_ENTRY_PROTECT | \ | |
| 460 | 480 | _SEGMENT_ENTRY_READ | \ |
| 461 | 481 | _SEGMENT_ENTRY_NOEXEC) |
| 462 | −#define SEGMENT_RX __pgprot(_SEGMENT_ENTRY_PROTECT | \ | |
| 482 | +#define SEGMENT_RX __pgprot(_SEGMENT_ENTRY_PRESENT | \ | |
| 483 | + _SEGMENT_ENTRY_PROTECT | \ | |
| 463 | 484 | _SEGMENT_ENTRY_READ) |
| 464 | −#define SEGMENT_RW __pgprot(_SEGMENT_ENTRY_READ | \ | |
| 485 | +#define SEGMENT_RW __pgprot(_SEGMENT_ENTRY_PRESENT | \ | |
| 486 | + _SEGMENT_ENTRY_READ | \ | |
| 465 | 487 | _SEGMENT_ENTRY_WRITE | \ |
| 466 | 488 | _SEGMENT_ENTRY_NOEXEC) |
| 467 | −#define SEGMENT_RWX __pgprot(_SEGMENT_ENTRY_READ | \ | |
| 489 | +#define SEGMENT_RWX __pgprot(_SEGMENT_ENTRY_PRESENT | \ | |
| 490 | + _SEGMENT_ENTRY_READ | \ | |
| 468 | 491 | _SEGMENT_ENTRY_WRITE) |
| 469 | 492 | #define SEGMENT_KERNEL __pgprot(_SEGMENT_ENTRY | \ |
| 470 | 493 | _SEGMENT_ENTRY_LARGE | \ |
| @@ -491,6 +514,7 @@ static inline int is_module_addr(void *addr) · 20 unmodified lines | ||
| 491 | 514 | */ |
| 492 | 515 | |
| 493 | 516 | #define REGION3_KERNEL __pgprot(_REGION_ENTRY_TYPE_R3 | \ |
| 517 | + _REGION3_ENTRY_PRESENT | \ | |
| 494 | 518 | _REGION3_ENTRY_LARGE | \ |
| 495 | 519 | _REGION3_ENTRY_READ | \ |
| 496 | 520 | _REGION3_ENTRY_WRITE | \ |
| @@ -498,12 +522,14 @@ static inline int is_module_addr(void *addr) · 1 unmodified line | ||
| 498 | 522 | _REGION3_ENTRY_DIRTY | \ |
| 499 | 523 | _REGION_ENTRY_NOEXEC) |
| 500 | 524 | #define REGION3_KERNEL_RO __pgprot(_REGION_ENTRY_TYPE_R3 | \ |
| 525 | + _REGION3_ENTRY_PRESENT | \ | |
| 501 | 526 | _REGION3_ENTRY_LARGE | \ |
| 502 | 527 | _REGION3_ENTRY_READ | \ |
| 503 | 528 | _REGION3_ENTRY_YOUNG | \ |
| 504 | 529 | _REGION_ENTRY_PROTECT | \ |
| 505 | 530 | _REGION_ENTRY_NOEXEC) |
| 506 | 531 | #define REGION3_KERNEL_EXEC __pgprot(_REGION_ENTRY_TYPE_R3 | \ |
| 532 | + _REGION3_ENTRY_PRESENT | \ | |
| 507 | 533 | _REGION3_ENTRY_LARGE | \ |
| 508 | 534 | _REGION3_ENTRY_READ | \ |
| 509 | 535 | _REGION3_ENTRY_WRITE | \ |
| @@ -746,7 +772,7 @@ static inline int pud_present(pud_t pud) · 236 unmodified lines | ||
| 746 | 772 | { |
| 747 | 773 | if (pud_folded(pud)) |
| 748 | 774 | return 1; |
| 749 | − return (pud_val(pud) & _REGION_ENTRY_ORIGIN) != 0UL; | |
| 775 | + return (pud_val(pud) & _REGION3_ENTRY_PRESENT) != 0; | |
| 750 | 776 | } |
| 751 | 777 | |
| 752 | 778 | static inline int pud_none(pud_t pud) |
| @@ -761,13 +787,18 @@ static inline bool pud_leaf(pud_t pud) · 8 unmodified lines | ||
| 761 | 787 | { |
| 762 | 788 | if ((pud_val(pud) & _REGION_ENTRY_TYPE_MASK) != _REGION_ENTRY_TYPE_R3) |
| 763 | 789 | return 0; |
| 764 | − return !!(pud_val(pud) & _REGION3_ENTRY_LARGE); | |
| 790 | + return (pud_present(pud) && (pud_val(pud) & _REGION3_ENTRY_LARGE) != 0); | |
| 791 | +} | |
| 792 | + | |
| 793 | +static inline int pmd_present(pmd_t pmd) | |
| 794 | +{ | |
| 795 | + return (pmd_val(pmd) & _SEGMENT_ENTRY_PRESENT) != 0; | |
| 765 | 796 | } |
| 766 | 797 | |
| 767 | 798 | #define pmd_leaf pmd_leaf |
| 768 | 799 | static inline bool pmd_leaf(pmd_t pmd) |
| 769 | 800 | { |
| 770 | − return (pmd_val(pmd) & _SEGMENT_ENTRY_LARGE) != 0; | |
| 801 | + return (pmd_present(pmd) && (pmd_val(pmd) & _SEGMENT_ENTRY_LARGE) != 0); | |
| 771 | 802 | } |
| 772 | 803 | |
| 773 | 804 | static inline int pmd_bad(pmd_t pmd) |
| @@ -799,11 +830,6 @@ static inline int p4d_bad(p4d_t p4d) · 25 unmodified lines | ||
| 799 | 830 | return (p4d_val(p4d) & ~_REGION_ENTRY_BITS) != 0; |
| 800 | 831 | } |
| 801 | 832 | |
| 802 | −static inline int pmd_present(pmd_t pmd) | |
| 803 | −{ | |
| 804 | − return pmd_val(pmd) != _SEGMENT_ENTRY_EMPTY; | |
| 805 | −} | |
| 806 | − | |
| 807 | 833 | static inline int pmd_none(pmd_t pmd) |
| 808 | 834 | { |
| 809 | 835 | return pmd_val(pmd) == _SEGMENT_ENTRY_EMPTY; |
| @@ -1851,7 +1877,7 @@ static inline pmd_t pmdp_collapse_flush(struct vm_area_struct *vma, · 1041 unmodified lines | ||
| 1851 | 1877 | |
| 1852 | 1878 | static inline int pmd_trans_huge(pmd_t pmd) |
| 1853 | 1879 | { |
| 1854 | − return pmd_val(pmd) & _SEGMENT_ENTRY_LARGE; | |
| 1880 | + return pmd_leaf(pmd); | |
| 1855 | 1881 | } |
| 1856 | 1882 | |
| 1857 | 1883 | #define has_transparent_hugepage has_transparent_hugepage |
| @@ -1911,6 +1937,53 @@ static inline swp_entry_t __swp_entry(unsigned long type, unsigned long offset) · 53 unmodified lines | ||
| 1911 | 1937 | #define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) }) |
| 1912 | 1938 | #define __swp_entry_to_pte(x) ((pte_t) { (x).val }) |
| 1913 | 1939 | |
| 1940 | +/* | |
| 1941 | + * 64 bit swap entry format for REGION3 and SEGMENT table entries (RSTE) | |
| 1942 | + * Bits 59 and 63 are used to indicate the swap entry. Bit 58 marks the rste | |
| 1943 | + * as invalid. | |
| 1944 | + * A swap entry is indicated by bit pattern (rste & 0x011) == 0x010 | |
| 1945 | + * | offset |Xtype |11TT|S0| | |
| 1946 | + * |0000000000111111111122222222223333333333444444444455|555555|5566|66| | |
| 1947 | + * |0123456789012345678901234567890123456789012345678901|234567|8901|23| | |
| 1948 | + * | |
| 1949 | + * Bits 0-51 store the offset. | |
| 1950 | + * Bits 53-57 store the type. | |
| 1951 | + * Bit 62 (S) is used for softdirty tracking. | |
| 1952 | + * Bits 60-61 (TT) indicate the table type: 0x01 for REGION3 and 0x00 for SEGMENT. | |
| 1953 | + * Bit 52 (X) is unused. | |
| 1954 | + */ | |
| 1955 | + | |
| 1956 | +#define __SWP_OFFSET_MASK_RSTE ((1UL << 52) - 1) | |
| 1957 | +#define __SWP_OFFSET_SHIFT_RSTE 12 | |
| 1958 | +#define __SWP_TYPE_MASK_RSTE ((1UL << 5) - 1) | |
| 1959 | +#define __SWP_TYPE_SHIFT_RSTE 6 | |
| 1960 | + | |
| 1961 | +/* | |
| 1962 | + * TT bits set to 0x00 == SEGMENT. For REGION3 entries, caller must add R3 | |
| 1963 | + * bits 0x01. See also __set_huge_pte_at(). | |
| 1964 | + */ | |
| 1965 | +static inline unsigned long mk_swap_rste(unsigned long type, unsigned long offset) | |
| 1966 | +{ | |
| 1967 | + unsigned long rste; | |
| 1968 | + | |
| 1969 | + rste = _RST_ENTRY_INVALID | _RST_ENTRY_COMM; | |
| 1970 | + rste |= (offset & __SWP_OFFSET_MASK_RSTE) << __SWP_OFFSET_SHIFT_RSTE; | |
| 1971 | + rste |= (type & __SWP_TYPE_MASK_RSTE) << __SWP_TYPE_SHIFT_RSTE; | |
| 1972 | + return rste; | |
| 1973 | +} | |
| 1974 | + | |
| 1975 | +static inline unsigned long __swp_type_rste(swp_entry_t entry) | |
| 1976 | +{ | |
| 1977 | + return (entry.val >> __SWP_TYPE_SHIFT_RSTE) & __SWP_TYPE_MASK_RSTE; | |
| 1978 | +} | |
| 1979 | + | |
| 1980 | +static inline unsigned long __swp_offset_rste(swp_entry_t entry) | |
| 1981 | +{ | |
| 1982 | + return (entry.val >> __SWP_OFFSET_SHIFT_RSTE) & __SWP_OFFSET_MASK_RSTE; | |
| 1983 | +} | |
| 1984 | + | |
| 1985 | +#define __rste_to_swp_entry(rste) ((swp_entry_t) { rste }) | |
| 1986 | + | |
| 1914 | 1987 | extern int vmem_add_mapping(unsigned long start, unsigned long size); |
| 1915 | 1988 | extern void vmem_remove_mapping(unsigned long start, unsigned long size); |
| 1916 | 1989 | extern int __vmem_map_4k_page(unsigned long addr, unsigned long phys, pgprot_t prot, bool alloc); |
| @@ -130,10 +130,24 @@ static __always_inline bool should_resched(int preempt_offset) · 129 unmodified lines | ||
| 130 | 130 | #define init_idle_preempt_count(p, cpu) do { } while (0) |
| 131 | 131 | |
| 132 | 132 | #ifdef CONFIG_PREEMPTION |
| 133 | −extern void preempt_schedule(void); | |
| 134 | −#define __preempt_schedule() preempt_schedule() | |
| 135 | −extern void preempt_schedule_notrace(void); | |
| 136 | −#define __preempt_schedule_notrace() preempt_schedule_notrace() | |
| 133 | + | |
| 134 | +void preempt_schedule(void); | |
| 135 | +void preempt_schedule_notrace(void); | |
| 136 | + | |
| 137 | +#ifdef CONFIG_PREEMPT_DYNAMIC | |
| 138 | + | |
| 139 | +void dynamic_preempt_schedule(void); | |
| 140 | +void dynamic_preempt_schedule_notrace(void); | |
| 141 | +#define __preempt_schedule() dynamic_preempt_schedule() | |
| 142 | +#define __preempt_schedule_notrace() dynamic_preempt_schedule_notrace() | |
| 143 | + | |
| 144 | +#else /* CONFIG_PREEMPT_DYNAMIC */ | |
| 145 | + | |
| 146 | +#define __preempt_schedule() preempt_schedule() | |
| 147 | +#define __preempt_schedule_notrace() preempt_schedule_notrace() | |
| 148 | + | |
| 149 | +#endif /* CONFIG_PREEMPT_DYNAMIC */ | |
| 150 | + | |
| 137 | 151 | #endif /* CONFIG_PREEMPTION */ |
| 138 | 152 | |
| 139 | 153 | #endif /* __ASM_PREEMPT_H */ |
| @@ -82,9 +82,10 @@ static inline void arch_spin_unlock(arch_spinlock_t *lp) · 81 unmodified lines | ||
| 82 | 82 | kcsan_release(); |
| 83 | 83 | asm_inline volatile( |
| 84 | 84 | ALTERNATIVE("nop", ".insn rre,0xb2fa0000,7,0", ALT_FACILITY(49)) /* NIAI 7 */ |
| 85 | − " sth %1,%0\n" | |
| 86 | − : "=R" (((unsigned short *) &lp->lock)[1]) | |
| 87 | − : "d" (0) : "cc", "memory"); | |
| 85 | + " mvhhi %[lock],0\n" | |
| 86 | + : [lock] "=Q" (((unsigned short *)&lp->lock)[1]) | |
| 87 | + : | |
| 88 | + : "memory"); | |
| 88 | 89 | } |
| 89 | 90 | |
| 90 | 91 | /* |
| @@ -3,7 +3,7 @@ · 2 unmodified lines | ||
| 3 | 3 | #define __ASM_SPINLOCK_TYPES_H |
| 4 | 4 | |
| 5 | 5 | #ifndef __LINUX_SPINLOCK_TYPES_RAW_H |
| 6 | −# error "please don't include this file directly" | |
| 6 | +# error "Please do not include this file directly." | |
| 7 | 7 | #endif |
| 8 | 8 | |
| 9 | 9 | typedef struct { |
| @@ -61,44 +61,45 @@ void arch_setup_new_exec(void); · 60 unmodified lines | ||
| 61 | 61 | /* |
| 62 | 62 | * thread information flags bit numbers |
| 63 | 63 | */ |
| 64 | −/* _TIF_WORK bits */ | |
| 65 | 64 | #define TIF_NOTIFY_RESUME 0 /* callback before returning to user */ |
| 66 | 65 | #define TIF_SIGPENDING 1 /* signal pending */ |
| 67 | 66 | #define TIF_NEED_RESCHED 2 /* rescheduling necessary */ |
| 68 | −#define TIF_UPROBE 3 /* breakpointed or single-stepping */ | |
| 69 | −#define TIF_GUARDED_STORAGE 4 /* load guarded storage control block */ | |
| 67 | +#define TIF_NEED_RESCHED_LAZY 3 /* lazy rescheduling needed */ | |
| 68 | +#define TIF_UPROBE 4 /* breakpointed or single-stepping */ | |
| 70 | 69 | #define TIF_PATCH_PENDING 5 /* pending live patching update */ |
| 71 | 70 | #define TIF_PGSTE 6 /* New mm's will use 4K page tables */ |
| 72 | 71 | #define TIF_NOTIFY_SIGNAL 7 /* signal notifications exist */ |
| 72 | +#define TIF_GUARDED_STORAGE 8 /* load guarded storage control block */ | |
| 73 | 73 | #define TIF_ISOLATE_BP_GUEST 9 /* Run KVM guests with isolated BP */ |
| 74 | 74 | #define TIF_PER_TRAP 10 /* Need to handle PER trap on exit to usermode */ |
| 75 | − | |
| 76 | 75 | #define TIF_31BIT 16 /* 32bit process */ |
| 77 | 76 | #define TIF_MEMDIE 17 /* is terminating due to OOM killer */ |
| 78 | 77 | #define TIF_RESTORE_SIGMASK 18 /* restore signal mask in do_signal() */ |
| 79 | 78 | #define TIF_SINGLE_STEP 19 /* This task is single stepped */ |
| 80 | 79 | #define TIF_BLOCK_STEP 20 /* This task is block stepped */ |
| 81 | 80 | #define TIF_UPROBE_SINGLESTEP 21 /* This task is uprobe single stepped */ |
| 82 | − | |
| 83 | −/* _TIF_TRACE bits */ | |
| 84 | 81 | #define TIF_SYSCALL_TRACE 24 /* syscall trace active */ |
| 85 | 82 | #define TIF_SYSCALL_AUDIT 25 /* syscall auditing active */ |
| 86 | 83 | #define TIF_SECCOMP 26 /* secure computing */ |
| 87 | 84 | #define TIF_SYSCALL_TRACEPOINT 27 /* syscall tracepoint instrumentation */ |
| 88 | 85 | |
| 89 | 86 | #define _TIF_NOTIFY_RESUME BIT(TIF_NOTIFY_RESUME) |
| 90 | −#define _TIF_NOTIFY_SIGNAL BIT(TIF_NOTIFY_SIGNAL) | |
| 91 | 87 | #define _TIF_SIGPENDING BIT(TIF_SIGPENDING) |
| 92 | 88 | #define _TIF_NEED_RESCHED BIT(TIF_NEED_RESCHED) |
| 89 | +#define _TIF_NEED_RESCHED_LAZY BIT(TIF_NEED_RESCHED_LAZY) | |
| 93 | 90 | #define _TIF_UPROBE BIT(TIF_UPROBE) |
| 94 | −#define _TIF_GUARDED_STORAGE BIT(TIF_GUARDED_STORAGE) | |
| 95 | 91 | #define _TIF_PATCH_PENDING BIT(TIF_PATCH_PENDING) |
| 92 | +#define _TIF_PGSTE BIT(TIF_PGSTE) | |
| 93 | +#define _TIF_NOTIFY_SIGNAL BIT(TIF_NOTIFY_SIGNAL) | |
| 94 | +#define _TIF_GUARDED_STORAGE BIT(TIF_GUARDED_STORAGE) | |
| 96 | 95 | #define _TIF_ISOLATE_BP_GUEST BIT(TIF_ISOLATE_BP_GUEST) |
| 97 | 96 | #define _TIF_PER_TRAP BIT(TIF_PER_TRAP) |
| 98 | − | |
| 99 | 97 | #define _TIF_31BIT BIT(TIF_31BIT) |
| 98 | +#define _TIF_MEMDIE BIT(TIF_MEMDIE) | |
| 99 | +#define _TIF_RESTORE_SIGMASK BIT(TIF_RESTORE_SIGMASK) | |
| 100 | 100 | #define _TIF_SINGLE_STEP BIT(TIF_SINGLE_STEP) |
| 101 | − | |
| 101 | +#define _TIF_BLOCK_STEP BIT(TIF_BLOCK_STEP) | |
| 102 | +#define _TIF_UPROBE_SINGLESTEP BIT(TIF_UPROBE_SINGLESTEP) | |
| 102 | 103 | #define _TIF_SYSCALL_TRACE BIT(TIF_SYSCALL_TRACE) |
| 103 | 104 | #define _TIF_SYSCALL_AUDIT BIT(TIF_SYSCALL_AUDIT) |
| 104 | 105 | #define _TIF_SECCOMP BIT(TIF_SECCOMP) |
| @@ -46,11 +46,6 @@ static inline void __tlb_flush_mm(struct mm_struct *mm) · 45 unmodified lines | ||
| 46 | 46 | { |
| 47 | 47 | unsigned long gmap_asce; |
| 48 | 48 | |
| 49 | − /* | |
| 50 | − * If the machine has IDTE we prefer to do a per mm flush | |
| 51 | − * on all cpus instead of doing a local flush if the mm | |
| 52 | − * only ran on the local cpu. | |
| 53 | − */ | |
| 54 | 49 | preempt_disable(); |
| 55 | 50 | atomic_inc(&mm->context.flush_count); |
| 56 | 51 | /* Reset TLB flush mask */ |
| @@ -77,12 +77,14 @@ static debug_info_t *debug_info_create(const char *name, int pages_per_area, · 76 unmodified lines | ||
| 77 | 77 | static void debug_info_get(debug_info_t *); |
| 78 | 78 | static void debug_info_put(debug_info_t *); |
| 79 | 79 | static int debug_prolog_level_fn(debug_info_t *id, |
| 80 | − struct debug_view *view, char *out_buf); | |
| 80 | + struct debug_view *view, char *out_buf, | |
| 81 | + size_t out_buf_size); | |
| 81 | 82 | static int debug_input_level_fn(debug_info_t *id, struct debug_view *view, |
| 82 | 83 | struct file *file, const char __user *user_buf, |
| 83 | 84 | size_t user_buf_size, loff_t *offset); |
| 84 | 85 | static int debug_prolog_pages_fn(debug_info_t *id, |
| 85 | − struct debug_view *view, char *out_buf); | |
| 86 | + struct debug_view *view, char *out_buf, | |
| 87 | + size_t out_buf_size); | |
| 86 | 88 | static int debug_input_pages_fn(debug_info_t *id, struct debug_view *view, |
| 87 | 89 | struct file *file, const char __user *user_buf, |
| 88 | 90 | size_t user_buf_size, loff_t *offset); |
| @@ -90,9 +92,11 @@ static int debug_input_flush_fn(debug_info_t *id, struct debug_view *view, · 1 unmodified line | ||
| 90 | 92 | struct file *file, const char __user *user_buf, |
| 91 | 93 | size_t user_buf_size, loff_t *offset); |
| 92 | 94 | static int debug_hex_ascii_format_fn(debug_info_t *id, struct debug_view *view, |
| 93 | − char *out_buf, const char *in_buf); | |
| 95 | + char *out_buf, size_t out_buf_size, | |
| 96 | + const char *in_buf); | |
| 94 | 97 | static int debug_sprintf_format_fn(debug_info_t *id, struct debug_view *view, |
| 95 | − char *out_buf, const char *inbuf); | |
| 98 | + char *out_buf, size_t out_buf_size, | |
| 99 | + const char *inbuf); | |
| 96 | 100 | static void debug_areas_swap(debug_info_t *a, debug_info_t *b); |
| 97 | 101 | static void debug_events_append(debug_info_t *dest, debug_info_t *src); |
| 98 | 102 | |
| @@ -391,8 +395,10 @@ static int debug_format_entry(file_private_info_t *p_info) · 292 unmodified lines | ||
| 391 | 395 | |
| 392 | 396 | if (p_info->act_entry == DEBUG_PROLOG_ENTRY) { |
| 393 | 397 | /* print prolog */ |
| 394 | − if (view->prolog_proc) | |
| 395 | − len += view->prolog_proc(id_snap, view, p_info->temp_buf); | |
| 398 | + if (view->prolog_proc) { | |
| 399 | + len += view->prolog_proc(id_snap, view, p_info->temp_buf, | |
| 400 | + sizeof(p_info->temp_buf)); | |
| 401 | + } | |
| 396 | 402 | goto out; |
| 397 | 403 | } |
| 398 | 404 | if (!id_snap->areas) /* this is true, if we have a prolog only view */ |
| @@ -402,12 +408,16 @@ static int debug_format_entry(file_private_info_t *p_info) · 3 unmodified lines | ||
| 402 | 408 | |
| 403 | 409 | if (act_entry->clock == 0LL) |
| 404 | 410 | goto out; /* empty entry */ |
| 405 | − if (view->header_proc) | |
| 411 | + if (view->header_proc) { | |
| 406 | 412 | len += view->header_proc(id_snap, view, p_info->act_area, |
| 407 | − act_entry, p_info->temp_buf + len); | |
| 408 | − if (view->format_proc) | |
| 413 | + act_entry, p_info->temp_buf + len, | |
| 414 | + sizeof(p_info->temp_buf) - len); | |
| 415 | + } | |
| 416 | + if (view->format_proc) { | |
| 409 | 417 | len += view->format_proc(id_snap, view, p_info->temp_buf + len, |
| 418 | + sizeof(p_info->temp_buf) - len, | |
| 410 | 419 | DEBUG_DATA(act_entry)); |
| 420 | + } | |
| 411 | 421 | out: |
| 412 | 422 | return len; |
| 413 | 423 | } |
| @@ -1292,9 +1302,9 @@ static inline int debug_get_uint(char *buf) · 878 unmodified lines | ||
| 1292 | 1302 | */ |
| 1293 | 1303 | |
| 1294 | 1304 | static int debug_prolog_pages_fn(debug_info_t *id, struct debug_view *view, |
| 1295 | − char *out_buf) | |
| 1305 | + char *out_buf, size_t out_buf_size) | |
| 1296 | 1306 | { |
| 1297 | − return sprintf(out_buf, "%i\n", id->pages_per_area); | |
| 1307 | + return scnprintf(out_buf, out_buf_size, "%i\n", id->pages_per_area); | |
| 1298 | 1308 | } |
| 1299 | 1309 | |
| 1300 | 1310 | /* |
| @@ -1341,14 +1351,14 @@ out: · 40 unmodified lines | ||
| 1341 | 1351 | * prints out actual debug level |
| 1342 | 1352 | */ |
| 1343 | 1353 | static int debug_prolog_level_fn(debug_info_t *id, struct debug_view *view, |
| 1344 | − char *out_buf) | |
| 1354 | + char *out_buf, size_t out_buf_size) | |
| 1345 | 1355 | { |
| 1346 | 1356 | int rc = 0; |
| 1347 | 1357 | |
| 1348 | 1358 | if (id->level == DEBUG_OFF_LEVEL) |
| 1349 | − rc = sprintf(out_buf, "-\n"); | |
| 1359 | + rc = scnprintf(out_buf, out_buf_size, "-\n"); | |
| 1350 | 1360 | else |
| 1351 | − rc = sprintf(out_buf, "%i\n", id->level); | |
| 1361 | + rc = scnprintf(out_buf, out_buf_size, "%i\n", id->level); | |
| 1352 | 1362 | return rc; |
| 1353 | 1363 | } |
| 1354 | 1364 | |
| @@ -1465,22 +1475,24 @@ out: · 110 unmodified lines | ||
| 1465 | 1475 | * prints debug data in hex/ascii format |
| 1466 | 1476 | */ |
| 1467 | 1477 | static int debug_hex_ascii_format_fn(debug_info_t *id, struct debug_view *view, |
| 1468 | − char *out_buf, const char *in_buf) | |
| 1478 | + char *out_buf, size_t out_buf_size, const char *in_buf) | |
| 1469 | 1479 | { |
| 1470 | 1480 | int i, rc = 0; |
| 1471 | 1481 | |
| 1472 | − for (i = 0; i < id->buf_size; i++) | |
| 1473 | − rc += sprintf(out_buf + rc, "%02x ", ((unsigned char *) in_buf)[i]); | |
| 1474 | − rc += sprintf(out_buf + rc, "| "); | |
| 1482 | + for (i = 0; i < id->buf_size; i++) { | |
| 1483 | + rc += scnprintf(out_buf + rc, out_buf_size - rc, | |
| 1484 | + "%02x ", ((unsigned char *)in_buf)[i]); | |
| 1485 | + } | |
| 1486 | + rc += scnprintf(out_buf + rc, out_buf_size - rc, "| "); | |
| 1475 | 1487 | for (i = 0; i < id->buf_size; i++) { |
| 1476 | 1488 | unsigned char c = in_buf[i]; |
| 1477 | 1489 | |
| 1478 | 1490 | if (isascii(c) && isprint(c)) |
| 1479 | − rc += sprintf(out_buf + rc, "%c", c); | |
| 1491 | + rc += scnprintf(out_buf + rc, out_buf_size - rc, "%c", c); | |
| 1480 | 1492 | else |
| 1481 | − rc += sprintf(out_buf + rc, "."); | |
| 1493 | + rc += scnprintf(out_buf + rc, out_buf_size - rc, "."); | |
| 1482 | 1494 | } |
| 1483 | − rc += sprintf(out_buf + rc, "\n"); | |
| 1495 | + rc += scnprintf(out_buf + rc, out_buf_size - rc, "\n"); | |
| 1484 | 1496 | return rc; |
| 1485 | 1497 | } |
| 1486 | 1498 | |
| @@ -1488,7 +1500,8 @@ static int debug_hex_ascii_format_fn(debug_info_t *id, struct debug_view *view, · 1 unmodified line | ||
| 1488 | 1500 | * prints header for debug entry |
| 1489 | 1501 | */ |
| 1490 | 1502 | int debug_dflt_header_fn(debug_info_t *id, struct debug_view *view, |
| 1491 | − int area, debug_entry_t *entry, char *out_buf) | |
| 1503 | + int area, debug_entry_t *entry, char *out_buf, | |
| 1504 | + size_t out_buf_size) | |
| 1492 | 1505 | { |
| 1493 | 1506 | unsigned long sec, usec; |
| 1494 | 1507 | unsigned long caller; |
| @@ -1505,9 +1518,9 @@ int debug_dflt_header_fn(debug_info_t *id, struct debug_view *view, · 10 unmodified lines | ||
| 1505 | 1518 | else |
| 1506 | 1519 | except_str = "-"; |
| 1507 | 1520 | caller = (unsigned long) entry->caller; |
| 1508 | − rc += sprintf(out_buf, "%02i %011ld:%06lu %1u %1s %04u %px ", | |
| 1509 | − area, sec, usec, level, except_str, | |
| 1510 | − entry->cpu, (void *)caller); | |
| 1521 | + rc += scnprintf(out_buf, out_buf_size, "%02i %011ld:%06lu %1u %1s %04u %px ", | |
| 1522 | + area, sec, usec, level, except_str, | |
| 1523 | + entry->cpu, (void *)caller); | |
| 1511 | 1524 | return rc; |
| 1512 | 1525 | } |
| 1513 | 1526 | EXPORT_SYMBOL(debug_dflt_header_fn); |
| @@ -1520,7 +1533,7 @@ EXPORT_SYMBOL(debug_dflt_header_fn); · 6 unmodified lines | ||
| 1520 | 1533 | #define DEBUG_SPRINTF_MAX_ARGS 10 |
| 1521 | 1534 | |
| 1522 | 1535 | static int debug_sprintf_format_fn(debug_info_t *id, struct debug_view *view, |
| 1523 | − char *out_buf, const char *inbuf) | |
| 1536 | + char *out_buf, size_t out_buf_size, const char *inbuf) | |
| 1524 | 1537 | { |
| 1525 | 1538 | debug_sprintf_entry_t *curr_event = (debug_sprintf_entry_t *)inbuf; |
| 1526 | 1539 | int num_longs, num_used_args = 0, i, rc = 0; |
| @@ -1533,8 +1546,9 @@ static int debug_sprintf_format_fn(debug_info_t *id, struct debug_view *view, · 6 unmodified lines | ||
| 1533 | 1546 | goto out; /* bufsize of entry too small */ |
| 1534 | 1547 | if (num_longs == 1) { |
| 1535 | 1548 | /* no args, we use only the string */ |
| 1536 | − strcpy(out_buf, curr_event->string); | |
| 1537 | − rc = strlen(curr_event->string); | |
| 1549 | + rc = strscpy(out_buf, curr_event->string, out_buf_size); | |
| 1550 | + if (rc == -E2BIG) | |
| 1551 | + rc = out_buf_size; | |
| 1538 | 1552 | goto out; |
| 1539 | 1553 | } |
| 1540 | 1554 | |
| @@ -1546,12 +1560,13 @@ static int debug_sprintf_format_fn(debug_info_t *id, struct debug_view *view, · 5 unmodified lines | ||
| 1546 | 1560 | for (i = 0; i < num_used_args; i++) |
| 1547 | 1561 | index[i] = i; |
| 1548 | 1562 | |
| 1549 | − rc = sprintf(out_buf, curr_event->string, curr_event->args[index[0]], | |
| 1550 | − curr_event->args[index[1]], curr_event->args[index[2]], | |
| 1551 | − curr_event->args[index[3]], curr_event->args[index[4]], | |
| 1552 | − curr_event->args[index[5]], curr_event->args[index[6]], | |
| 1553 | − curr_event->args[index[7]], curr_event->args[index[8]], | |
| 1554 | − curr_event->args[index[9]]); | |
| 1563 | + rc = scnprintf(out_buf, out_buf_size, | |
| 1564 | + curr_event->string, curr_event->args[index[0]], | |
| 1565 | + curr_event->args[index[1]], curr_event->args[index[2]], | |
| 1566 | + curr_event->args[index[3]], curr_event->args[index[4]], | |
| 1567 | + curr_event->args[index[5]], curr_event->args[index[6]], | |
| 1568 | + curr_event->args[index[7]], curr_event->args[index[8]], | |
| 1569 | + curr_event->args[index[9]]); | |
| 1555 | 1570 | out: |
| 1556 | 1571 | return rc; |
| 1557 | 1572 | } |
| @@ -430,9 +430,13 @@ SYM_CODE_START(\name) · 429 unmodified lines | ||
| 430 | 430 | SYM_CODE_END(\name) |
| 431 | 431 | .endm |
| 432 | 432 | |
| 433 | + .section .irqentry.text, "ax" | |
| 434 | + | |
| 433 | 435 | INT_HANDLER ext_int_handler,__LC_EXT_OLD_PSW,do_ext_irq |
| 434 | 436 | INT_HANDLER io_int_handler,__LC_IO_OLD_PSW,do_io_irq |
| 435 | 437 | |
| 438 | + .section .kprobes.text, "ax" | |
| 439 | + | |
| 436 | 440 | /* |
| 437 | 441 | * Machine check handler routines |
| 438 | 442 | */ |
| @@ -489,6 +489,12 @@ int __init arch_init_kprobes(void) · 488 unmodified lines | ||
| 489 | 489 | return 0; |
| 490 | 490 | } |
| 491 | 491 | |
| 492 | +int __init arch_populate_kprobe_blacklist(void) | |
| 493 | +{ | |
| 494 | + return kprobe_add_area_blacklist((unsigned long)__irqentry_text_start, | |
| 495 | + (unsigned long)__irqentry_text_end); | |
| 496 | +} | |
| 497 | + | |
| 492 | 498 | int arch_trampoline_kprobe(struct kprobe *p) |
| 493 | 499 | { |
| 494 | 500 | return 0; |
| @@ -180,39 +180,27 @@ static int sf_buffer_available(struct cpu_hw_sf *cpuhw) · 179 unmodified lines | ||
| 180 | 180 | */ |
| 181 | 181 | static void free_sampling_buffer(struct sf_buffer *sfb) |
| 182 | 182 | { |
| 183 | − unsigned long *sdbt, *curr; | |
| 184 | − | |
| 185 | − if (!sfb->sdbt) | |
| 186 | − return; | |
| 183 | + unsigned long *sdbt, *curr, *head; | |
| 187 | 184 | |
| 188 | 185 | sdbt = sfb->sdbt; |
| 189 | − curr = sdbt; | |
| 190 | − | |
| 186 | + if (!sdbt) | |
| 187 | + return; | |
| 188 | + sfb->sdbt = NULL; | |
| 191 | 189 | /* Free the SDBT after all SDBs are processed... */ |
| 192 | − while (1) { | |
| 193 | − if (!*curr || !sdbt) | |
| 194 | − break; | |
| 195 | − | |
| 196 | − /* Process table-link entries */ | |
| 190 | + head = sdbt; | |
| 191 | + curr = sdbt; | |
| 192 | + do { | |
| 197 | 193 | if (is_link_entry(curr)) { |
| 194 | + /* Process table-link entries */ | |
| 198 | 195 | curr = get_next_sdbt(curr); |
| 199 | − if (sdbt) | |
| 200 | − free_page((unsigned long)sdbt); | |
| 201 | − | |
| 202 | − /* If the origin is reached, sampling buffer is freed */ | |
| 203 | − if (curr == sfb->sdbt) | |
| 204 | − break; | |
| 205 | − else | |
| 206 | − sdbt = curr; | |
| 196 | + free_page((unsigned long)sdbt); | |
| 197 | + sdbt = curr; | |
| 207 | 198 | } else { |
| 208 | 199 | /* Process SDB pointer */ |
| 209 | − if (*curr) { | |
| 210 | − free_page((unsigned long)phys_to_virt(*curr)); | |
| 211 | − curr++; | |
| 212 | − } | |
| 200 | + free_page((unsigned long)phys_to_virt(*curr)); | |
| 201 | + curr++; | |
| 213 | 202 | } |
| 214 | − } | |
| 215 | − | |
| 203 | + } while (curr != head); | |
| 216 | 204 | memset(sfb, 0, sizeof(*sfb)); |
| 217 | 205 | } |
| 218 | 206 | |
| @@ -151,7 +151,7 @@ void arch_stack_walk_user_common(stack_trace_consume_fn consume_entry, void *coo · 150 unmodified lines | ||
| 151 | 151 | break; |
| 152 | 152 | } |
| 153 | 153 | if (!store_ip(consume_entry, cookie, entry, perf, ip)) |
| 154 | − return; | |
| 154 | + break; | |
| 155 | 155 | first = false; |
| 156 | 156 | } |
| 157 | 157 | pagefault_enable(); |
| @@ -129,8 +129,8 @@ static void ipte_lock_simple(struct kvm *kvm) · 128 unmodified lines | ||
| 129 | 129 | retry: |
| 130 | 130 | read_lock(&kvm->arch.sca_lock); |
| 131 | 131 | ic = kvm_s390_get_ipte_control(kvm); |
| 132 | + old = READ_ONCE(*ic); | |
| 132 | 133 | do { |
| 133 | − old = READ_ONCE(*ic); | |
| 134 | 134 | if (old.k) { |
| 135 | 135 | read_unlock(&kvm->arch.sca_lock); |
| 136 | 136 | cond_resched(); |
| @@ -138,7 +138,7 @@ retry: · 1 unmodified line | ||
| 138 | 138 | } |
| 139 | 139 | new = old; |
| 140 | 140 | new.k = 1; |
| 141 | − } while (cmpxchg(&ic->val, old.val, new.val) != old.val); | |
| 141 | + } while (!try_cmpxchg(&ic->val, &old.val, new.val)); | |
| 142 | 142 | read_unlock(&kvm->arch.sca_lock); |
| 143 | 143 | out: |
| 144 | 144 | mutex_unlock(&kvm->arch.ipte_mutex); |
| @@ -154,11 +154,11 @@ static void ipte_unlock_simple(struct kvm *kvm) · 9 unmodified lines | ||
| 154 | 154 | goto out; |
| 155 | 155 | read_lock(&kvm->arch.sca_lock); |
| 156 | 156 | ic = kvm_s390_get_ipte_control(kvm); |
| 157 | + old = READ_ONCE(*ic); | |
| 157 | 158 | do { |
| 158 | − old = READ_ONCE(*ic); | |
| 159 | 159 | new = old; |
| 160 | 160 | new.k = 0; |
| 161 | − } while (cmpxchg(&ic->val, old.val, new.val) != old.val); | |
| 161 | + } while (!try_cmpxchg(&ic->val, &old.val, new.val)); | |
| 162 | 162 | read_unlock(&kvm->arch.sca_lock); |
| 163 | 163 | wake_up(&kvm->arch.ipte_wq); |
| 164 | 164 | out: |
| @@ -172,8 +172,8 @@ static void ipte_lock_siif(struct kvm *kvm) · 7 unmodified lines | ||
| 172 | 172 | retry: |
| 173 | 173 | read_lock(&kvm->arch.sca_lock); |
| 174 | 174 | ic = kvm_s390_get_ipte_control(kvm); |
| 175 | + old = READ_ONCE(*ic); | |
| 175 | 176 | do { |
| 176 | − old = READ_ONCE(*ic); | |
| 177 | 177 | if (old.kg) { |
| 178 | 178 | read_unlock(&kvm->arch.sca_lock); |
| 179 | 179 | cond_resched(); |
| @@ -182,7 +182,7 @@ retry: · 2 unmodified lines | ||
| 182 | 182 | new = old; |
| 183 | 183 | new.k = 1; |
| 184 | 184 | new.kh++; |
| 185 | − } while (cmpxchg(&ic->val, old.val, new.val) != old.val); | |
| 185 | + } while (!try_cmpxchg(&ic->val, &old.val, new.val)); | |
| 186 | 186 | read_unlock(&kvm->arch.sca_lock); |
| 187 | 187 | } |
| 188 | 188 | |
| @@ -192,13 +192,13 @@ static void ipte_unlock_siif(struct kvm *kvm) · 3 unmodified lines | ||
| 192 | 192 | |
| 193 | 193 | read_lock(&kvm->arch.sca_lock); |
| 194 | 194 | ic = kvm_s390_get_ipte_control(kvm); |
| 195 | + old = READ_ONCE(*ic); | |
| 195 | 196 | do { |
| 196 | − old = READ_ONCE(*ic); | |
| 197 | 197 | new = old; |
| 198 | 198 | new.kh--; |
| 199 | 199 | if (!new.kh) |
| 200 | 200 | new.k = 0; |
| 201 | − } while (cmpxchg(&ic->val, old.val, new.val) != old.val); | |
| 201 | + } while (!try_cmpxchg(&ic->val, &old.val, new.val)); | |
| 202 | 202 | read_unlock(&kvm->arch.sca_lock); |
| 203 | 203 | if (!new.kh) |
| 204 | 204 | wake_up(&kvm->arch.ipte_wq); |
| @@ -118,8 +118,6 @@ static int sca_inject_ext_call(struct kvm_vcpu *vcpu, int src_id) · 117 unmodified lines | ||
| 118 | 118 | |
| 119 | 119 | static void sca_clear_ext_call(struct kvm_vcpu *vcpu) |
| 120 | 120 | { |
| 121 | − int rc, expect; | |
| 122 | − | |
| 123 | 121 | if (!kvm_s390_use_sca_entries()) |
| 124 | 122 | return; |
| 125 | 123 | kvm_s390_clear_cpuflags(vcpu, CPUSTAT_ECALL_PEND); |
| @@ -128,23 +126,16 @@ static void sca_clear_ext_call(struct kvm_vcpu *vcpu) · 2 unmodified lines | ||
| 128 | 126 | struct esca_block *sca = vcpu->kvm->arch.sca; |
| 129 | 127 | union esca_sigp_ctrl *sigp_ctrl = |
| 130 | 128 | &(sca->cpu[vcpu->vcpu_id].sigp_ctrl); |
| 131 | − union esca_sigp_ctrl old; | |
| 132 | 129 | |
| 133 | − old = READ_ONCE(*sigp_ctrl); | |
| 134 | − expect = old.value; | |
| 135 | − rc = cmpxchg(&sigp_ctrl->value, old.value, 0); | |
| 130 | + WRITE_ONCE(sigp_ctrl->value, 0); | |
| 136 | 131 | } else { |
| 137 | 132 | struct bsca_block *sca = vcpu->kvm->arch.sca; |
| 138 | 133 | union bsca_sigp_ctrl *sigp_ctrl = |
| 139 | 134 | &(sca->cpu[vcpu->vcpu_id].sigp_ctrl); |
| 140 | − union bsca_sigp_ctrl old; | |
| 141 | 135 | |
| 142 | − old = READ_ONCE(*sigp_ctrl); | |
| 143 | − expect = old.value; | |
| 144 | − rc = cmpxchg(&sigp_ctrl->value, old.value, 0); | |
| 136 | + WRITE_ONCE(sigp_ctrl->value, 0); | |
| 145 | 137 | } |
| 146 | 138 | read_unlock(&vcpu->kvm->arch.sca_lock); |
| 147 | − WARN_ON(rc != expect); /* cannot clear? */ | |
| 148 | 139 | } |
| 149 | 140 | |
| 150 | 141 | int psw_extint_disabled(struct kvm_vcpu *vcpu) |
| @@ -247,12 +238,12 @@ static inline int gisa_set_iam(struct kvm_s390_gisa *gisa, u8 iam) · 96 unmodified lines | ||
| 247 | 238 | { |
| 248 | 239 | u64 word, _word; |
| 249 | 240 | |
| 241 | + word = READ_ONCE(gisa->u64.word[0]); | |
| 250 | 242 | do { |
| 251 | − word = READ_ONCE(gisa->u64.word[0]); | |
| 252 | 243 | if ((u64)gisa != word >> 32) |
| 253 | 244 | return -EBUSY; |
| 254 | 245 | _word = (word & ~0xffUL) | iam; |
| 255 | − } while (cmpxchg(&gisa->u64.word[0], word, _word) != word); | |
| 246 | + } while (!try_cmpxchg(&gisa->u64.word[0], &word, _word)); | |
| 256 | 247 | |
| 257 | 248 | return 0; |
| 258 | 249 | } |
| @@ -270,10 +261,10 @@ static inline void gisa_clear_ipm(struct kvm_s390_gisa *gisa) · 11 unmodified lines | ||
| 270 | 261 | { |
| 271 | 262 | u64 word, _word; |
| 272 | 263 | |
| 264 | + word = READ_ONCE(gisa->u64.word[0]); | |
| 273 | 265 | do { |
| 274 | − word = READ_ONCE(gisa->u64.word[0]); | |
| 275 | 266 | _word = word & ~(0xffUL << 24); |
| 276 | − } while (cmpxchg(&gisa->u64.word[0], word, _word) != word); | |
| 267 | + } while (!try_cmpxchg(&gisa->u64.word[0], &word, _word)); | |
| 277 | 268 | } |
| 278 | 269 | |
| 279 | 270 | /** |
| @@ -291,14 +282,14 @@ static inline u8 gisa_get_ipm_or_restore_iam(struct kvm_s390_gisa_interrupt *gi) · 11 unmodified lines | ||
| 291 | 282 | u8 pending_mask, alert_mask; |
| 292 | 283 | u64 word, _word; |
| 293 | 284 | |
| 285 | + word = READ_ONCE(gi->origin->u64.word[0]); | |
| 294 | 286 | do { |
| 295 | − word = READ_ONCE(gi->origin->u64.word[0]); | |
| 296 | 287 | alert_mask = READ_ONCE(gi->alert.mask); |
| 297 | 288 | pending_mask = (u8)(word >> 24) & alert_mask; |
| 298 | 289 | if (pending_mask) |
| 299 | 290 | return pending_mask; |
| 300 | 291 | _word = (word & ~0xffUL) | alert_mask; |
| 301 | − } while (cmpxchg(&gi->origin->u64.word[0], word, _word) != word); | |
| 292 | + } while (!try_cmpxchg(&gi->origin->u64.word[0], &word, _word)); | |
| 302 | 293 | |
| 303 | 294 | return 0; |
| 304 | 295 | } |
| @@ -1937,11 +1937,11 @@ static void kvm_s390_update_topology_change_report(struct kvm *kvm, bool val) · 1936 unmodified lines | ||
| 1937 | 1937 | |
| 1938 | 1938 | read_lock(&kvm->arch.sca_lock); |
| 1939 | 1939 | sca = kvm->arch.sca; |
| 1940 | + old = READ_ONCE(sca->utility); | |
| 1940 | 1941 | do { |
| 1941 | − old = READ_ONCE(sca->utility); | |
| 1942 | 1942 | new = old; |
| 1943 | 1943 | new.mtcr = val; |
| 1944 | − } while (cmpxchg(&sca->utility.val, old.val, new.val) != old.val); | |
| 1944 | + } while (!try_cmpxchg(&sca->utility.val, &old.val, new.val)); | |
| 1945 | 1945 | read_unlock(&kvm->arch.sca_lock); |
| 1946 | 1946 | } |
| 1947 | 1947 | |
| @@ -208,13 +208,12 @@ static inline int account_mem(unsigned long nr_pages) · 207 unmodified lines | ||
| 208 | 208 | |
| 209 | 209 | page_limit = rlimit(RLIMIT_MEMLOCK) >> PAGE_SHIFT; |
| 210 | 210 | |
| 211 | + cur_pages = atomic_long_read(&user->locked_vm); | |
| 211 | 212 | do { |
| 212 | − cur_pages = atomic_long_read(&user->locked_vm); | |
| 213 | 213 | new_pages = cur_pages + nr_pages; |
| 214 | 214 | if (new_pages > page_limit) |
| 215 | 215 | return -ENOMEM; |
| 216 | − } while (atomic_long_cmpxchg(&user->locked_vm, cur_pages, | |
| 217 | − new_pages) != cur_pages); | |
| 216 | + } while (!atomic_long_try_cmpxchg(&user->locked_vm, &cur_pages, new_pages)); | |
| 218 | 217 | |
| 219 | 218 | atomic64_add(nr_pages, ¤t->mm->pinned_vm); |
| 220 | 219 | |
| @@ -15,6 +15,7 @@ · 14 unmodified lines | ||
| 15 | 15 | #include <linux/percpu.h> |
| 16 | 16 | #include <linux/io.h> |
| 17 | 17 | #include <asm/alternative.h> |
| 18 | +#include <asm/asm.h> | |
| 18 | 19 | |
| 19 | 20 | int spin_retry = -1; |
| 20 | 21 | |
| @@ -76,24 +77,43 @@ static inline int arch_load_niai4(int *lock) · 55 unmodified lines | ||
| 76 | 77 | |
| 77 | 78 | asm_inline volatile( |
| 78 | 79 | ALTERNATIVE("nop", ".insn rre,0xb2fa0000,4,0", ALT_FACILITY(49)) /* NIAI 4 */ |
| 79 | − " l %0,%1\n" | |
| 80 | − : "=d" (owner) : "Q" (*lock) : "memory"); | |
| 80 | + " l %[owner],%[lock]\n" | |
| 81 | + : [owner] "=d" (owner) : [lock] "R" (*lock) : "memory"); | |
| 81 | 82 | return owner; |
| 82 | 83 | } |
| 83 | 84 | |
| 84 | −static inline int arch_cmpxchg_niai8(int *lock, int old, int new) | |
| 85 | +#ifdef __HAVE_ASM_FLAG_OUTPUTS__ | |
| 86 | + | |
| 87 | +static inline int arch_try_cmpxchg_niai8(int *lock, int old, int new) | |
| 88 | +{ | |
| 89 | + int cc; | |
| 90 | + | |
| 91 | + asm_inline volatile( | |
| 92 | + ALTERNATIVE("nop", ".insn rre,0xb2fa0000,8,0", ALT_FACILITY(49)) /* NIAI 8 */ | |
| 93 | + " cs %[old],%[new],%[lock]\n" | |
| 94 | + : [old] "+d" (old), [lock] "+Q" (*lock), "=@cc" (cc) | |
| 95 | + : [new] "d" (new) | |
| 96 | + : "memory"); | |
| 97 | + return cc == 0; | |
| 98 | +} | |
| 99 | + | |
| 100 | +#else /* __HAVE_ASM_FLAG_OUTPUTS__ */ | |
| 101 | + | |
| 102 | +static inline int arch_try_cmpxchg_niai8(int *lock, int old, int new) | |
| 85 | 103 | { |
| 86 | 104 | int expected = old; |
| 87 | 105 | |
| 88 | 106 | asm_inline volatile( |
| 89 | 107 | ALTERNATIVE("nop", ".insn rre,0xb2fa0000,8,0", ALT_FACILITY(49)) /* NIAI 8 */ |
| 90 | − " cs %0,%3,%1\n" | |
| 91 | − : "=d" (old), "=Q" (*lock) | |
| 92 | − : "0" (old), "d" (new), "Q" (*lock) | |
| 108 | + " cs %[old],%[new],%[lock]\n" | |
| 109 | + : [old] "+d" (old), [lock] "+Q" (*lock) | |
| 110 | + : [new] "d" (new) | |
| 93 | 111 | : "cc", "memory"); |
| 94 | 112 | return expected == old; |
| 95 | 113 | } |
| 96 | 114 | |
| 115 | +#endif /* __HAVE_ASM_FLAG_OUTPUTS__ */ | |
| 116 | + | |
| 97 | 117 | static inline struct spin_wait *arch_spin_decode_tail(int lock) |
| 98 | 118 | { |
| 99 | 119 | int ix, cpu; |
| @@ -226,7 +246,7 @@ static inline void arch_spin_lock_classic(arch_spinlock_t *lp) · 126 unmodified lines | ||
| 226 | 246 | /* Try to get the lock if it is free. */ |
| 227 | 247 | if (!owner) { |
| 228 | 248 | new = (old & _Q_TAIL_MASK) | lockval; |
| 229 | − if (arch_cmpxchg_niai8(&lp->lock, old, new)) { | |
| 249 | + if (arch_try_cmpxchg_niai8(&lp->lock, old, new)) { | |
| 230 | 250 | /* Got the lock */ |
| 231 | 251 | return; |
| 232 | 252 | } |
| @@ -338,7 +338,8 @@ done: · 337 unmodified lines | ||
| 338 | 338 | handle_fault_error_nolock(regs, 0); |
| 339 | 339 | else |
| 340 | 340 | do_sigsegv(regs, SEGV_MAPERR); |
| 341 | − } else if (fault & (VM_FAULT_SIGBUS | VM_FAULT_HWPOISON)) { | |
| 341 | + } else if (fault & (VM_FAULT_SIGBUS | VM_FAULT_HWPOISON | | |
| 342 | + VM_FAULT_HWPOISON_LARGE)) { | |
| 342 | 343 | if (!user_mode(regs)) |
| 343 | 344 | handle_fault_error_nolock(regs, 0); |
| 344 | 345 | else |
| @@ -587,7 +587,8 @@ int __gmap_link(struct gmap *gmap, unsigned long gaddr, unsigned long vmaddr) · 586 unmodified lines | ||
| 587 | 587 | if (pmd_leaf(*pmd)) { |
| 588 | 588 | *table = (pmd_val(*pmd) & |
| 589 | 589 | _SEGMENT_ENTRY_HARDWARE_BITS_LARGE) |
| 590 | − | _SEGMENT_ENTRY_GMAP_UC; | |
| 590 | + | _SEGMENT_ENTRY_GMAP_UC | |
| 591 | + | _SEGMENT_ENTRY; | |
| 591 | 592 | } else |
| 592 | 593 | *table = pmd_val(*pmd) & |
| 593 | 594 | _SEGMENT_ENTRY_HARDWARE_BITS; |
| @@ -2396,7 +2397,8 @@ static void gmap_pmdp_clear(struct mm_struct *mm, unsigned long vmaddr, · 1802 unmodified lines | ||
| 2396 | 2397 | gaddr = __gmap_segment_gaddr((unsigned long *)pmdp); |
| 2397 | 2398 | pmdp_notify_gmap(gmap, pmdp, gaddr); |
| 2398 | 2399 | WARN_ON(pmd_val(*pmdp) & ~(_SEGMENT_ENTRY_HARDWARE_BITS_LARGE | |
| 2399 | − _SEGMENT_ENTRY_GMAP_UC)); | |
| 2400 | + _SEGMENT_ENTRY_GMAP_UC | | |
| 2401 | + _SEGMENT_ENTRY)); | |
| 2400 | 2402 | if (purge) |
| 2401 | 2403 | __pmdp_csp(pmdp); |
| 2402 | 2404 | set_pmd(pmdp, __pmd(_SEGMENT_ENTRY_EMPTY)); |
| @@ -2450,7 +2452,8 @@ void gmap_pmdp_idte_local(struct mm_struct *mm, unsigned long vmaddr) · 47 unmodified lines | ||
| 2450 | 2452 | gaddr = __gmap_segment_gaddr(entry); |
| 2451 | 2453 | pmdp_notify_gmap(gmap, pmdp, gaddr); |
| 2452 | 2454 | WARN_ON(*entry & ~(_SEGMENT_ENTRY_HARDWARE_BITS_LARGE | |
| 2453 | − _SEGMENT_ENTRY_GMAP_UC)); | |
| 2455 | + _SEGMENT_ENTRY_GMAP_UC | | |
| 2456 | + _SEGMENT_ENTRY)); | |
| 2454 | 2457 | if (MACHINE_HAS_TLB_GUEST) |
| 2455 | 2458 | __pmdp_idte(gaddr, pmdp, IDTE_GUEST_ASCE, |
| 2456 | 2459 | gmap->asce, IDTE_LOCAL); |
| @@ -2485,7 +2488,8 @@ void gmap_pmdp_idte_global(struct mm_struct *mm, unsigned long vmaddr) · 28 unmodified lines | ||
| 2485 | 2488 | gaddr = __gmap_segment_gaddr(entry); |
| 2486 | 2489 | pmdp_notify_gmap(gmap, pmdp, gaddr); |
| 2487 | 2490 | WARN_ON(*entry & ~(_SEGMENT_ENTRY_HARDWARE_BITS_LARGE | |
| 2488 | − _SEGMENT_ENTRY_GMAP_UC)); | |
| 2491 | + _SEGMENT_ENTRY_GMAP_UC | | |
| 2492 | + _SEGMENT_ENTRY)); | |
| 2489 | 2493 | if (MACHINE_HAS_TLB_GUEST) |
| 2490 | 2494 | __pmdp_idte(gaddr, pmdp, IDTE_GUEST_ASCE, |
| 2491 | 2495 | gmap->asce, IDTE_GLOBAL); |
| @@ -24,6 +24,7 @@ · 23 unmodified lines | ||
| 24 | 24 | |
| 25 | 25 | static inline unsigned long __pte_to_rste(pte_t pte) |
| 26 | 26 | { |
| 27 | + swp_entry_t arch_entry; | |
| 27 | 28 | unsigned long rste; |
| 28 | 29 | |
| 29 | 30 | /* |
| @@ -48,6 +49,7 @@ static inline unsigned long __pte_to_rste(pte_t pte) · 18 unmodified lines | ||
| 48 | 49 | */ |
| 49 | 50 | if (pte_present(pte)) { |
| 50 | 51 | rste = pte_val(pte) & PAGE_MASK; |
| 52 | + rste |= _SEGMENT_ENTRY_PRESENT; | |
| 51 | 53 | rste |= move_set_bit(pte_val(pte), _PAGE_READ, |
| 52 | 54 | _SEGMENT_ENTRY_READ); |
| 53 | 55 | rste |= move_set_bit(pte_val(pte), _PAGE_WRITE, |
| @@ -66,6 +68,10 @@ static inline unsigned long __pte_to_rste(pte_t pte) · 12 unmodified lines | ||
| 66 | 68 | #endif |
| 67 | 69 | rste |= move_set_bit(pte_val(pte), _PAGE_NOEXEC, |
| 68 | 70 | _SEGMENT_ENTRY_NOEXEC); |
| 71 | + } else if (!pte_none(pte)) { | |
| 72 | + /* swap pte */ | |
| 73 | + arch_entry = __pte_to_swp_entry(pte); | |
| 74 | + rste = mk_swap_rste(__swp_type(arch_entry), __swp_offset(arch_entry)); | |
| 69 | 75 | } else |
| 70 | 76 | rste = _SEGMENT_ENTRY_EMPTY; |
| 71 | 77 | return rste; |
| @@ -73,13 +79,18 @@ static inline unsigned long __pte_to_rste(pte_t pte) · 1 unmodified line | ||
| 73 | 79 | |
| 74 | 80 | static inline pte_t __rste_to_pte(unsigned long rste) |
| 75 | 81 | { |
| 82 | + swp_entry_t arch_entry; | |
| 76 | 83 | unsigned long pteval; |
| 77 | − int present; | |
| 84 | + int present, none; | |
| 85 | + pte_t pte; | |
| 78 | 86 | |
| 79 | − if ((rste & _REGION_ENTRY_TYPE_MASK) == _REGION_ENTRY_TYPE_R3) | |
| 87 | + if ((rste & _REGION_ENTRY_TYPE_MASK) == _REGION_ENTRY_TYPE_R3) { | |
| 80 | 88 | present = pud_present(__pud(rste)); |
| 81 | − else | |
| 89 | + none = pud_none(__pud(rste)); | |
| 90 | + } else { | |
| 82 | 91 | present = pmd_present(__pmd(rste)); |
| 92 | + none = pmd_none(__pmd(rste)); | |
| 93 | + } | |
| 83 | 94 | |
| 84 | 95 | /* |
| 85 | 96 | * Convert encoding pmd / pud bits pte bits |
| @@ -114,6 +125,11 @@ static inline pte_t __rste_to_pte(unsigned long rste) · 28 unmodified lines | ||
| 114 | 125 | pteval |= move_set_bit(rste, _SEGMENT_ENTRY_SOFT_DIRTY, _PAGE_SOFT_DIRTY); |
| 115 | 126 | #endif |
| 116 | 127 | pteval |= move_set_bit(rste, _SEGMENT_ENTRY_NOEXEC, _PAGE_NOEXEC); |
| 128 | + } else if (!none) { | |
| 129 | + /* swap rste */ | |
| 130 | + arch_entry = __rste_to_swp_entry(rste); | |
| 131 | + pte = mk_swap_pte(__swp_type_rste(arch_entry), __swp_offset_rste(arch_entry)); | |
| 132 | + pteval = pte_val(pte); | |
| 117 | 133 | } else |
| 118 | 134 | pteval = _PAGE_INVALID; |
| 119 | 135 | return __pte(pteval); |
| @@ -148,8 +164,6 @@ void __set_huge_pte_at(struct mm_struct *mm, unsigned long addr, · 28 unmodified lines | ||
| 148 | 164 | unsigned long rste; |
| 149 | 165 | |
| 150 | 166 | rste = __pte_to_rste(pte); |
| 151 | − if (!MACHINE_HAS_NX) | |
| 152 | − rste &= ~_SEGMENT_ENTRY_NOEXEC; | |
| 153 | 167 | |
| 154 | 168 | /* Set correct table type for 2G hugepages */ |
| 155 | 169 | if ((pte_val(*ptep) & _REGION_ENTRY_TYPE_MASK) == _REGION_ENTRY_TYPE_R3) { |
| @@ -223,11 +237,10 @@ pte_t *huge_pte_offset(struct mm_struct *mm, · 67 unmodified lines | ||
| 223 | 237 | p4dp = p4d_offset(pgdp, addr); |
| 224 | 238 | if (p4d_present(*p4dp)) { |
| 225 | 239 | pudp = pud_offset(p4dp, addr); |
| 226 | − if (pud_present(*pudp)) { | |
| 227 | − if (pud_leaf(*pudp)) | |
| 228 | − return (pte_t *) pudp; | |
| 240 | + if (sz == PUD_SIZE) | |
| 241 | + return (pte_t *)pudp; | |
| 242 | + if (pud_present(*pudp)) | |
| 229 | 243 | pmdp = pmd_offset(pudp, addr); |
| 230 | − } | |
| 231 | 244 | } |
| 232 | 245 | } |
| 233 | 246 | return (pte_t *) pmdp; |
| @@ -779,8 +779,9 @@ int zpci_hot_reset_device(struct zpci_dev *zdev) · 778 unmodified lines | ||
| 779 | 779 | * @fh: Current Function Handle of the device to be created |
| 780 | 780 | * @state: Initial state after creation either Standby or Configured |
| 781 | 781 | * |
| 782 | − * Creates a new zpci device and adds it to its, possibly newly created, zbus | |
| 783 | − * as well as zpci_list. | |
| 782 | + * Allocates a new struct zpci_dev and queries the platform for its details. | |
| 783 | + * If successful the device can subsequently be added to the zPCI subsystem | |
| 784 | + * using zpci_add_device(). | |
| 784 | 785 | * |
| 785 | 786 | * Returns: the zdev on success or an error pointer otherwise |
| 786 | 787 | */ |
| @@ -803,7 +804,6 @@ struct zpci_dev *zpci_create_device(u32 fid, u32 fh, enum zpci_state state) · 16 unmodified lines | ||
| 803 | 804 | goto error; |
| 804 | 805 | zdev->state = state; |
| 805 | 806 | |
| 806 | − kref_init(&zdev->kref); | |
| 807 | 807 | mutex_init(&zdev->state_lock); |
| 808 | 808 | mutex_init(&zdev->fmb_lock); |
| 809 | 809 | mutex_init(&zdev->kzdev_lock); |
| @@ -816,6 +816,17 @@ error: · 6 unmodified lines | ||
| 816 | 816 | return ERR_PTR(rc); |
| 817 | 817 | } |
| 818 | 818 | |
| 819 | +/** | |
| 820 | + * zpci_add_device() - Add a previously created zPCI device to the zPCI subsystem | |
| 821 | + * @zdev: The zPCI device to be added | |
| 822 | + * | |
| 823 | + * A struct zpci_dev is added to the zPCI subsystem and to a virtual PCI bus creating | |
| 824 | + * a new one as necessary. A hotplug slot is created and events start to be handled. | |
| 825 | + * If successful from this point on zpci_zdev_get() and zpci_zdev_put() must be used. | |
| 826 | + * If adding the struct zpci_dev fails the device was not added and should be freed. | |
| 827 | + * | |
| 828 | + * Return: 0 on success, or an error code otherwise | |
| 829 | + */ | |
| 819 | 830 | int zpci_add_device(struct zpci_dev *zdev) |
| 820 | 831 | { |
| 821 | 832 | int rc; |
| @@ -829,6 +840,7 @@ int zpci_add_device(struct zpci_dev *zdev) · 7 unmodified lines | ||
| 829 | 840 | if (rc) |
| 830 | 841 | goto error_destroy_iommu; |
| 831 | 842 | |
| 843 | + kref_init(&zdev->kref); | |
| 832 | 844 | spin_lock(&zpci_list_lock); |
| 833 | 845 | list_add_tail(&zdev->entry, &zpci_list); |
| 834 | 846 | spin_unlock(&zpci_list_lock); |
| @@ -928,10 +940,8 @@ void zpci_device_reserved(struct zpci_dev *zdev) · 93 unmodified lines | ||
| 928 | 940 | void zpci_release_device(struct kref *kref) |
| 929 | 941 | { |
| 930 | 942 | struct zpci_dev *zdev = container_of(kref, struct zpci_dev, kref); |
| 931 | − int ret; | |
| 932 | 943 | |
| 933 | − if (zdev->has_hp_slot) | |
| 934 | − zpci_exit_slot(zdev); | |
| 944 | + WARN_ON(zdev->state != ZPCI_FN_STATE_RESERVED); | |
| 935 | 945 | |
| 936 | 946 | if (zdev->zbus->bus) |
| 937 | 947 | zpci_bus_remove_device(zdev, false); |
| @@ -939,28 +949,14 @@ void zpci_release_device(struct kref *kref) · 1 unmodified line | ||
| 939 | 949 | if (zdev_enabled(zdev)) |
| 940 | 950 | zpci_disable_device(zdev); |
| 941 | 951 | |
| 942 | − switch (zdev->state) { | |
| 943 | − case ZPCI_FN_STATE_CONFIGURED: | |
| 944 | − ret = sclp_pci_deconfigure(zdev->fid); | |
| 945 | − zpci_dbg(3, "deconf fid:%x, rc:%d\n", zdev->fid, ret); | |
| 946 | − fallthrough; | |
| 947 | − case ZPCI_FN_STATE_STANDBY: | |
| 948 | − if (zdev->has_hp_slot) | |
| 949 | − zpci_exit_slot(zdev); | |
| 950 | − spin_lock(&zpci_list_lock); | |
| 951 | − list_del(&zdev->entry); | |
| 952 | − spin_unlock(&zpci_list_lock); | |
| 953 | − zpci_dbg(3, "rsv fid:%x\n", zdev->fid); | |
| 954 | − fallthrough; | |
| 955 | − case ZPCI_FN_STATE_RESERVED: | |
| 956 | − if (zdev->has_resources) | |
| 957 | − zpci_cleanup_bus_resources(zdev); | |
| 958 | − zpci_bus_device_unregister(zdev); | |
| 959 | − zpci_destroy_iommu(zdev); | |
| 960 | − fallthrough; | |
| 961 | − default: | |
| 962 | − break; | |
| 963 | − } | |
| 952 | + if (zdev->has_hp_slot) | |
| 953 | + zpci_exit_slot(zdev); | |
| 954 | + | |
| 955 | + if (zdev->has_resources) | |
| 956 | + zpci_cleanup_bus_resources(zdev); | |
| 957 | + | |
| 958 | + zpci_bus_device_unregister(zdev); | |
| 959 | + zpci_destroy_iommu(zdev); | |
| 964 | 960 | zpci_dbg(3, "rem fid:%x\n", zdev->fid); |
| 965 | 961 | kfree_rcu(zdev, rcu); |
| 966 | 962 | } |
| @@ -1121,7 +1117,8 @@ static void zpci_add_devices(struct list_head *scan_list) · 154 unmodified lines | ||
| 1121 | 1117 | list_sort(NULL, scan_list, &zpci_cmp_rid); |
| 1122 | 1118 | list_for_each_entry_safe(zdev, tmp, scan_list, entry) { |
| 1123 | 1119 | list_del_init(&zdev->entry); |
| 1124 | − zpci_add_device(zdev); | |
| 1120 | + if (zpci_add_device(zdev)) | |
| 1121 | + kfree(zdev); | |
| 1125 | 1122 | } |
| 1126 | 1123 | } |
| 1127 | 1124 | |
| @@ -53,7 +53,7 @@ static int zpci_bus_prepare_device(struct zpci_dev *zdev) · 52 unmodified lines | ||
| 53 | 53 | zpci_setup_bus_resources(zdev); |
| 54 | 54 | for (i = 0; i < PCI_STD_NUM_BARS; i++) { |
| 55 | 55 | if (zdev->bars[i].res) |
| 56 | − pci_bus_add_resource(zdev->zbus->bus, zdev->bars[i].res, 0); | |
| 56 | + pci_bus_add_resource(zdev->zbus->bus, zdev->bars[i].res); | |
| 57 | 57 | } |
| 58 | 58 | } |
| 59 | 59 | |
| @@ -340,7 +340,10 @@ static void __zpci_event_availability(struct zpci_ccdf_avail *ccdf) · 339 unmodified lines | ||
| 340 | 340 | zdev = zpci_create_device(ccdf->fid, ccdf->fh, ZPCI_FN_STATE_CONFIGURED); |
| 341 | 341 | if (IS_ERR(zdev)) |
| 342 | 342 | break; |
| 343 | − zpci_add_device(zdev); | |
| 343 | + if (zpci_add_device(zdev)) { | |
| 344 | + kfree(zdev); | |
| 345 | + break; | |
| 346 | + } | |
| 344 | 347 | } else { |
| 345 | 348 | /* the configuration request may be stale */ |
| 346 | 349 | if (zdev->state != ZPCI_FN_STATE_STANDBY) |
| @@ -354,7 +357,10 @@ static void __zpci_event_availability(struct zpci_ccdf_avail *ccdf) · 7 unmodified lines | ||
| 354 | 357 | zdev = zpci_create_device(ccdf->fid, ccdf->fh, ZPCI_FN_STATE_STANDBY); |
| 355 | 358 | if (IS_ERR(zdev)) |
| 356 | 359 | break; |
| 357 | − zpci_add_device(zdev); | |
| 360 | + if (zpci_add_device(zdev)) { | |
| 361 | + kfree(zdev); | |
| 362 | + break; | |
| 363 | + } | |
| 358 | 364 | } else { |
| 359 | 365 | zpci_update_fh(zdev, ccdf->fh); |
| 360 | 366 | } |
| @@ -110,7 +110,7 @@ static void switch_drv_remove(struct platform_device *pdev) · 109 unmodified lines | ||
| 110 | 110 | |
| 111 | 111 | static struct platform_driver switch_driver = { |
| 112 | 112 | .probe = switch_drv_probe, |
| 113 | − .remove_new = switch_drv_remove, | |
| 113 | + .remove = switch_drv_remove, | |
| 114 | 114 | .driver = { |
| 115 | 115 | .name = DRV_NAME, |
| 116 | 116 | }, |
| @@ -3,7 +3,7 @@ · 2 unmodified lines | ||
| 3 | 3 | #define __ASM_SH_SPINLOCK_TYPES_H |
| 4 | 4 | |
| 5 | 5 | #ifndef __LINUX_SPINLOCK_TYPES_RAW_H |
| 6 | −# error "please don't include this file directly" | |
| 6 | +# error "Please do not include this file directly." | |
| 7 | 7 | #endif |
| 8 | 8 | |
| 9 | 9 | typedef struct { |
| @@ -132,7 +132,7 @@ static int show_cpuinfo(struct seq_file *m, void *v) · 131 unmodified lines | ||
| 132 | 132 | |
| 133 | 133 | static void *c_start(struct seq_file *m, loff_t *pos) |
| 134 | 134 | { |
| 135 | − return *pos < NR_CPUS ? cpu_data + *pos : NULL; | |
| 135 | + return *pos < nr_cpu_ids ? cpu_data + *pos : NULL; | |
| 136 | 136 | } |
| 137 | 137 | static void *c_next(struct seq_file *m, void *v, loff_t *pos) |
| 138 | 138 | { |
| @@ -29,7 +29,7 @@ UTS_MACHINE := sparc · 28 unmodified lines | ||
| 29 | 29 | # versions of gcc. Some gcc versions won't pass -Av8 to binutils when you |
| 30 | 30 | # give -mcpu=v8. This silently worked with older bintutils versions but |
| 31 | 31 | # does not any more. |
| 32 | −KBUILD_CFLAGS += -m32 -mcpu=v8 -pipe -mno-fpu -fcall-used-g5 -fcall-used-g7 | |
| 32 | +KBUILD_CFLAGS += -m32 -mcpu=v8 -pipe -mno-fpu $(call cc-option,-fcall-used-g5) $(call cc-option,-fcall-used-g7) | |
| 33 | 33 | KBUILD_CFLAGS += -Wa,-Av8 |
| 34 | 34 | |
| 35 | 35 | KBUILD_AFLAGS += -m32 -Wa,-Av8 |
| @@ -45,7 +45,7 @@ export BITS := 64 · 9 unmodified lines | ||
| 45 | 45 | UTS_MACHINE := sparc64 |
| 46 | 46 | |
| 47 | 47 | KBUILD_CFLAGS += -m64 -pipe -mno-fpu -mcpu=ultrasparc -mcmodel=medlow |
| 48 | −KBUILD_CFLAGS += -ffixed-g4 -ffixed-g5 -fcall-used-g7 -Wno-sign-compare | |
| 48 | +KBUILD_CFLAGS += -ffixed-g4 -ffixed-g5 $(call cc-option,-fcall-used-g7) -Wno-sign-compare | |
| 49 | 49 | KBUILD_CFLAGS += -Wa,--undeclared-regs |
| 50 | 50 | KBUILD_CFLAGS += $(call cc-option,-mtune=ultrasparc3) |
| 51 | 51 | KBUILD_AFLAGS += -m64 -mcpu=ultrasparc -Wa,--undeclared-regs |
| @@ -17,7 +17,7 @@ struct hvtramp_descr { · 16 unmodified lines | ||
| 17 | 17 | __u64 fault_info_va; |
| 18 | 18 | __u64 fault_info_pa; |
| 19 | 19 | __u64 thread_reg; |
| 20 | − struct hvtramp_mapping maps[1]; | |
| 20 | + struct hvtramp_mapping maps[]; | |
| 21 | 21 | }; |
| 22 | 22 | |
| 23 | 23 | void hv_cpu_startup(unsigned long hvdescr_pa); |
| @@ -243,7 +243,7 @@ static struct platform_driver ecpp_driver = { · 242 unmodified lines | ||
| 243 | 243 | .of_match_table = ecpp_match, |
| 244 | 244 | }, |
| 245 | 245 | .probe = ecpp_probe, |
| 246 | − .remove_new = ecpp_remove, | |
| 246 | + .remove = ecpp_remove, | |
| 247 | 247 | }; |
| 248 | 248 | |
| 249 | 249 | static int parport_pc_find_nonpci_ports(int autoirq, int autodma) |
| @@ -814,7 +814,7 @@ static struct platform_driver us3mc_driver = { · 813 unmodified lines | ||
| 814 | 814 | .of_match_table = us3mc_match, |
| 815 | 815 | }, |
| 816 | 816 | .probe = us3mc_probe, |
| 817 | − .remove_new = us3mc_remove, | |
| 817 | + .remove = us3mc_remove, | |
| 818 | 818 | }; |
| 819 | 819 | |
| 820 | 820 | static inline bool us3mc_platform(void) |
| @@ -297,9 +297,7 @@ static void ldom_startcpu_cpuid(unsigned int cpu, unsigned long thread_reg, · 296 unmodified lines | ||
| 297 | 297 | unsigned long hv_err; |
| 298 | 298 | int i; |
| 299 | 299 | |
| 300 | − hdesc = kzalloc(sizeof(*hdesc) + | |
| 301 | − (sizeof(struct hvtramp_mapping) * | |
| 302 | − num_kernel_image_mappings - 1), | |
| 300 | + hdesc = kzalloc(struct_size(hdesc, maps, num_kernel_image_mappings), | |
| 303 | 301 | GFP_KERNEL); |
| 304 | 302 | if (!hdesc) { |
| 305 | 303 | printk(KERN_ERR "ldom_startcpu_cpuid: Cannot allocate " |
| @@ -255,6 +255,7 @@ static void mostek_write_byte(struct device *dev, u32 ofs, u8 val) · 254 unmodified lines | ||
| 255 | 255 | static struct m48t59_plat_data m48t59_data = { |
| 256 | 256 | .read_byte = mostek_read_byte, |
| 257 | 257 | .write_byte = mostek_write_byte, |
| 258 | + .yy_offset = 68, | |
| 258 | 259 | }; |
| 259 | 260 | |
| 260 | 261 | /* resource is set at runtime */ |
| @@ -544,6 +544,7 @@ static void mostek_write_byte(struct device *dev, u32 ofs, u8 val) · 543 unmodified lines | ||
| 544 | 544 | static struct m48t59_plat_data m48t59_data = { |
| 545 | 545 | .read_byte = mostek_read_byte, |
| 546 | 546 | .write_byte = mostek_write_byte, |
| 547 | + .yy_offset = 68, | |
| 547 | 548 | }; |
| 548 | 549 | |
| 549 | 550 | static struct platform_device m48t59_rtc = { |
| @@ -48,6 +48,11 @@ SECTIONS · 47 unmodified lines | ||
| 48 | 48 | { |
| 49 | 49 | _text = .; |
| 50 | 50 | HEAD_TEXT |
| 51 | + ALIGN_FUNCTION(); | |
| 52 | +#ifdef CONFIG_SPARC64 | |
| 53 | + /* Match text section symbols in head_64.S first */ | |
| 54 | + *head_64.o(.text) | |
| 55 | +#endif | |
| 51 | 56 | TEXT_TEXT |
| 52 | 57 | SCHED_TEXT |
| 53 | 58 | LOCK_TEXT |
| @@ -46,7 +46,7 @@ CFL := $(PROFILING) -mcmodel=medlow -fPIC -O2 -fasynchronous-unwind-tables -m64 · 45 unmodified lines | ||
| 46 | 46 | -fno-omit-frame-pointer -foptimize-sibling-calls \ |
| 47 | 47 | -DDISABLE_BRANCH_PROFILING -DBUILD_VDSO |
| 48 | 48 | |
| 49 | −SPARC_REG_CFLAGS = -ffixed-g4 -ffixed-g5 -fcall-used-g5 -fcall-used-g7 | |
| 49 | +SPARC_REG_CFLAGS = -ffixed-g4 -ffixed-g5 $(call cc-option,-fcall-used-g5) $(call cc-option,-fcall-used-g7) | |
| 50 | 50 | |
| 51 | 51 | $(vobjs): KBUILD_CFLAGS := $(filter-out $(RANDSTRUCT_CFLAGS) $(GCC_PLUGINS_CFLAGS) $(SPARC_REG_CFLAGS),$(KBUILD_CFLAGS)) $(CFL) |
| 52 | 52 | |
| @@ -86,6 +86,11 @@ notrace static long vdso_fallback_gettimeofday(struct __kernel_old_timeval *tv, · 85 unmodified lines | ||
| 86 | 86 | } |
| 87 | 87 | |
| 88 | 88 | #ifdef CONFIG_SPARC64 |
| 89 | +notrace static __always_inline u64 __shr64(u64 val, int amt) | |
| 90 | +{ | |
| 91 | + return val >> amt; | |
| 92 | +} | |
| 93 | + | |
| 89 | 94 | notrace static __always_inline u64 vread_tick(void) |
| 90 | 95 | { |
| 91 | 96 | u64 ret; |
| @@ -102,6 +107,21 @@ notrace static __always_inline u64 vread_tick_stick(void) · 10 unmodified lines | ||
| 102 | 107 | return ret; |
| 103 | 108 | } |
| 104 | 109 | #else |
| 110 | +notrace static __always_inline u64 __shr64(u64 val, int amt) | |
| 111 | +{ | |
| 112 | + u64 ret; | |
| 113 | + | |
| 114 | + __asm__ __volatile__("sllx %H1, 32, %%g1\n\t" | |
| 115 | + "srl %L1, 0, %L1\n\t" | |
| 116 | + "or %%g1, %L1, %%g1\n\t" | |
| 117 | + "srlx %%g1, %2, %L0\n\t" | |
| 118 | + "srlx %L0, 32, %H0" | |
| 119 | + : "=r" (ret) | |
| 120 | + : "r" (val), "r" (amt) | |
| 121 | + : "g1"); | |
| 122 | + return ret; | |
| 123 | +} | |
| 124 | + | |
| 105 | 125 | notrace static __always_inline u64 vread_tick(void) |
| 106 | 126 | { |
| 107 | 127 | register unsigned long long ret asm("o4"); |
| @@ -154,7 +174,7 @@ notrace static __always_inline int do_realtime(struct vvar_data *vvar, · 46 unmodified lines | ||
| 154 | 174 | ts->tv_sec = vvar->wall_time_sec; |
| 155 | 175 | ns = vvar->wall_time_snsec; |
| 156 | 176 | ns += vgetsns(vvar); |
| 157 | − ns >>= vvar->clock.shift; | |
| 177 | + ns = __shr64(ns, vvar->clock.shift); | |
| 158 | 178 | } while (unlikely(vvar_read_retry(vvar, seq))); |
| 159 | 179 | |
| 160 | 180 | ts->tv_sec += __iter_div_u64_rem(ns, NSEC_PER_SEC, &ns); |
| @@ -174,7 +194,7 @@ notrace static __always_inline int do_realtime_stick(struct vvar_data *vvar, · 13 unmodified lines | ||
| 174 | 194 | ts->tv_sec = vvar->wall_time_sec; |
| 175 | 195 | ns = vvar->wall_time_snsec; |
| 176 | 196 | ns += vgetsns_stick(vvar); |
| 177 | − ns >>= vvar->clock.shift; | |
| 197 | + ns = __shr64(ns, vvar->clock.shift); | |
| 178 | 198 | } while (unlikely(vvar_read_retry(vvar, seq))); |
| 179 | 199 | |
| 180 | 200 | ts->tv_sec += __iter_div_u64_rem(ns, NSEC_PER_SEC, &ns); |
| @@ -194,7 +214,7 @@ notrace static __always_inline int do_monotonic(struct vvar_data *vvar, · 13 unmodified lines | ||
| 194 | 214 | ts->tv_sec = vvar->monotonic_time_sec; |
| 195 | 215 | ns = vvar->monotonic_time_snsec; |
| 196 | 216 | ns += vgetsns(vvar); |
| 197 | − ns >>= vvar->clock.shift; | |
| 217 | + ns = __shr64(ns, vvar->clock.shift); | |
| 198 | 218 | } while (unlikely(vvar_read_retry(vvar, seq))); |
| 199 | 219 | |
| 200 | 220 | ts->tv_sec += __iter_div_u64_rem(ns, NSEC_PER_SEC, &ns); |
| @@ -214,7 +234,7 @@ notrace static __always_inline int do_monotonic_stick(struct vvar_data *vvar, · 13 unmodified lines | ||
| 214 | 234 | ts->tv_sec = vvar->monotonic_time_sec; |
| 215 | 235 | ns = vvar->monotonic_time_snsec; |
| 216 | 236 | ns += vgetsns_stick(vvar); |
| 217 | − ns >>= vvar->clock.shift; | |
| 237 | + ns = __shr64(ns, vvar->clock.shift); | |
| 218 | 238 | } while (unlikely(vvar_read_retry(vvar, seq))); |
| 219 | 239 | |
| 220 | 240 | ts->tv_sec += __iter_div_u64_rem(ns, NSEC_PER_SEC, &ns); |
| @@ -5,6 +5,7 @@ menu "UML-specific options" · 4 unmodified lines | ||
| 5 | 5 | config UML |
| 6 | 6 | bool |
| 7 | 7 | default y |
| 8 | + select ARCH_WANTS_DYNAMIC_TASK_STRUCT | |
| 8 | 9 | select ARCH_HAS_CPU_FINALIZE_INIT |
| 9 | 10 | select ARCH_HAS_FORTIFY_SOURCE |
| 10 | 11 | select ARCH_HAS_GCOV_PROFILE_ALL |
| @@ -32,6 +33,8 @@ config UML · 21 unmodified lines | ||
| 32 | 33 | select HAVE_ARCH_VMAP_STACK |
| 33 | 34 | select HAVE_RUST |
| 34 | 35 | select ARCH_HAS_UBSAN |
| 36 | + select HAVE_ARCH_TRACEHOOK | |
| 37 | + select THREAD_INFO_IN_TASK | |
| 35 | 38 | |
| 36 | 39 | config MMU |
| 37 | 40 | bool |
| @@ -94,7 +97,7 @@ config MAY_HAVE_RUNTIME_DEPS · 56 unmodified lines | ||
| 94 | 97 | |
| 95 | 98 | config STATIC_LINK |
| 96 | 99 | bool "Force a static link" |
| 97 | − depends on CC_CAN_LINK_STATIC_NO_RUNTIME_DEPS || !MAY_HAVE_RUNTIME_DEPS | |
| 100 | + depends on !MAY_HAVE_RUNTIME_DEPS | |
| 98 | 101 | help |
| 99 | 102 | This option gives you the ability to force a static link of UML. |
| 100 | 103 | Normally, UML is linked as a shared binary. This is inconvenient for |
| @@ -209,8 +212,8 @@ config MMAPPER · 108 unmodified lines | ||
| 209 | 212 | |
| 210 | 213 | config PGTABLE_LEVELS |
| 211 | 214 | int |
| 212 | − default 3 if 3_LEVEL_PGTABLES | |
| 213 | − default 2 | |
| 215 | + default 4 if 64BIT | |
| 216 | + default 2 if !64BIT | |
| 214 | 217 | |
| 215 | 218 | config UML_TIME_TRAVEL_SUPPORT |
| 216 | 219 | bool |
| @@ -227,6 +230,21 @@ config UML_TIME_TRAVEL_SUPPORT · 10 unmodified lines | ||
| 227 | 230 | |
| 228 | 231 | It is safe to say Y, but you probably don't need this. |
| 229 | 232 | |
| 233 | +config UML_MAX_USERSPACE_ITERATIONS | |
| 234 | + int | |
| 235 | + prompt "Maximum number of unscheduled userspace iterations" | |
| 236 | + default 10000 | |
| 237 | + depends on UML_TIME_TRAVEL_SUPPORT | |
| 238 | + help | |
| 239 | + In UML inf-cpu and ext time-travel mode userspace can run without being | |
| 240 | + interrupted. This will eventually overwhelm the kernel and create OOM | |
| 241 | + situations (mainly RCU not running). This setting specifies the number | |
| 242 | + of kernel/userspace switches (minor/major page fault, signal or syscall) | |
| 243 | + for the same userspace thread before the sched_clock is advanced by a | |
| 244 | + jiffie to trigger scheduling. | |
| 245 | + | |
| 246 | + Setting it to zero disables the feature. | |
| 247 | + | |
| 230 | 248 | config KASAN_SHADOW_OFFSET |
| 231 | 249 | hex |
| 232 | 250 | depends on KASAN |
| @@ -61,7 +61,8 @@ KBUILD_CFLAGS += $(CFLAGS) $(CFLAGS-y) -D__arch_um__ \ · 60 unmodified lines | ||
| 61 | 61 | $(ARCH_INCLUDE) $(MODE_INCLUDE) -Dvmap=kernel_vmap \ |
| 62 | 62 | -Dlongjmp=kernel_longjmp -Dsetjmp=kernel_setjmp \ |
| 63 | 63 | -Din6addr_loopback=kernel_in6addr_loopback \ |
| 64 | − -Din6addr_any=kernel_in6addr_any -Dstrrchr=kernel_strrchr | |
| 64 | + -Din6addr_any=kernel_in6addr_any -Dstrrchr=kernel_strrchr \ | |
| 65 | + -D__close_range=kernel__close_range | |
| 65 | 66 | |
| 66 | 67 | KBUILD_RUSTFLAGS += -Crelocation-model=pie |
| 67 | 68 | |
| @@ -70,7 +71,9 @@ KBUILD_AFLAGS += $(ARCH_INCLUDE) · 2 unmodified lines | ||
| 70 | 71 | USER_CFLAGS = $(patsubst $(KERNEL_DEFINES),,$(patsubst -I%,,$(KBUILD_CFLAGS))) \ |
| 71 | 72 | $(ARCH_INCLUDE) $(MODE_INCLUDE) $(filter -I%,$(CFLAGS)) \ |
| 72 | 73 | -D_FILE_OFFSET_BITS=64 -idirafter $(srctree)/include \ |
| 73 | − -idirafter $(objtree)/include -D__KERNEL__ -D__UM_HOST__ | |
| 74 | + -idirafter $(objtree)/include -D__KERNEL__ -D__UM_HOST__ \ | |
| 75 | + -include $(srctree)/include/linux/compiler-version.h \ | |
| 76 | + -include $(srctree)/include/linux/kconfig.h | |
| 74 | 77 | |
| 75 | 78 | #This will adjust *FLAGS accordingly to the platform. |
| 76 | 79 | include $(srctree)/$(ARCH_DIR)/Makefile-os-Linux |
| @@ -3,15 +3,15 @@ · 2 unmodified lines | ||
| 3 | 3 | # Licensed under the GPL |
| 4 | 4 | # |
| 5 | 5 | |
| 6 | −GPROF_OPT += -pg | |
| 6 | +export UM_GPROF_OPT += -pg | |
| 7 | 7 | |
| 8 | 8 | ifdef CONFIG_CC_IS_CLANG |
| 9 | −GCOV_OPT += -fprofile-instr-generate -fcoverage-mapping | |
| 9 | +export UM_GCOV_OPT += -fprofile-instr-generate -fcoverage-mapping | |
| 10 | 10 | else |
| 11 | −GCOV_OPT += -fprofile-arcs -ftest-coverage | |
| 11 | +export UM_GCOV_OPT += -fprofile-arcs -ftest-coverage | |
| 12 | 12 | endif |
| 13 | 13 | |
| 14 | −CFLAGS-$(CONFIG_GCOV) += $(GCOV_OPT) | |
| 15 | −CFLAGS-$(CONFIG_GPROF) += $(GPROF_OPT) | |
| 16 | −LINK-$(CONFIG_GCOV) += $(GCOV_OPT) | |
| 17 | −LINK-$(CONFIG_GPROF) += $(GPROF_OPT) | |
| 14 | +CFLAGS-$(CONFIG_GCOV) += $(UM_GCOV_OPT) | |
| 15 | +CFLAGS-$(CONFIG_GPROF) += $(UM_GPROF_OPT) | |
| 16 | +LINK-$(CONFIG_GCOV) += $(UM_GCOV_OPT) | |
| 17 | +LINK-$(CONFIG_GPROF) += $(UM_GPROF_OPT) | |
| @@ -1,4 +1,3 @@ | ||
| 1 | −CONFIG_3_LEVEL_PGTABLES=y | |
| 2 | 1 | # CONFIG_COMPACTION is not set |
| 3 | 2 | CONFIG_BINFMT_MISC=m |
| 4 | 3 | CONFIG_HOSTFS=y |
| @@ -161,6 +161,8 @@ static __noreturn int winch_thread(void *arg) · 160 unmodified lines | ||
| 161 | 161 | int count; |
| 162 | 162 | char c = 1; |
| 163 | 163 | |
| 164 | + os_set_pdeathsig(); | |
| 165 | + | |
| 164 | 166 | pty_fd = data->pty_fd; |
| 165 | 167 | pipe_fd = data->pipe_fd; |
| 166 | 168 | count = write(pipe_fd, &c, sizeof(c)); |
| @@ -48,6 +48,7 @@ MODULE_PARM_DESC(mixer, MIXER_HELP); · 47 unmodified lines | ||
| 48 | 48 | #ifndef MODULE |
| 49 | 49 | static int set_dsp(char *name, int *add) |
| 50 | 50 | { |
| 51 | + *add = 0; | |
| 51 | 52 | dsp = name; |
| 52 | 53 | return 0; |
| 53 | 54 | } |
| @@ -56,6 +57,7 @@ __uml_setup("dsp=", set_dsp, "dsp=<dsp device>\n" DSP_HELP); · 2 unmodified lines | ||
| 56 | 57 | |
| 57 | 58 | static int set_mixer(char *name, int *add) |
| 58 | 59 | { |
| 60 | + *add = 0; | |
| 59 | 61 | mixer = name; |
| 60 | 62 | return 0; |
| 61 | 63 | } |
| @@ -336,7 +336,7 @@ static struct platform_driver uml_net_driver = { · 335 unmodified lines | ||
| 336 | 336 | |
| 337 | 337 | static void net_device_release(struct device *dev) |
| 338 | 338 | { |
| 339 | − struct uml_net *device = dev_get_drvdata(dev); | |
| 339 | + struct uml_net *device = container_of(dev, struct uml_net, pdev.dev); | |
| 340 | 340 | struct net_device *netdev = device->dev; |
| 341 | 341 | struct uml_net_private *lp = netdev_priv(netdev); |
| 342 | 342 | |
| @@ -176,7 +176,7 @@ static void uml_rtc_remove(struct platform_device *pdev) · 175 unmodified lines | ||
| 176 | 176 | |
| 177 | 177 | static struct platform_driver uml_rtc_driver = { |
| 178 | 178 | .probe = uml_rtc_probe, |
| 179 | − .remove_new = uml_rtc_remove, | |
| 179 | + .remove = uml_rtc_remove, | |
| 180 | 180 | .driver = { |
| 181 | 181 | .name = "uml-rtc", |
| 182 | 182 | }, |
| @@ -779,7 +779,7 @@ static int ubd_open_dev(struct ubd *ubd_dev) · 778 unmodified lines | ||
| 779 | 779 | |
| 780 | 780 | static void ubd_device_release(struct device *dev) |
| 781 | 781 | { |
| 782 | − struct ubd *ubd_dev = dev_get_drvdata(dev); | |
| 782 | + struct ubd *ubd_dev = container_of(dev, struct ubd, pdev.dev); | |
| 783 | 783 | |
| 784 | 784 | blk_mq_free_tag_set(&ubd_dev->tag_set); |
| 785 | 785 | *ubd_dev = ((struct ubd) DEFAULT_UBD); |
| @@ -898,6 +898,8 @@ static int ubd_add(int n, char **error_out) · 112 unmodified lines | ||
| 898 | 898 | if (err) |
| 899 | 899 | goto out_cleanup_disk; |
| 900 | 900 | |
| 901 | + ubd_dev->disk = disk; | |
| 902 | + | |
| 901 | 903 | return 0; |
| 902 | 904 | |
| 903 | 905 | out_cleanup_disk: |
| @@ -1499,6 +1501,7 @@ int io_thread(void *arg) · 595 unmodified lines | ||
| 1499 | 1501 | { |
| 1500 | 1502 | int n, count, written, res; |
| 1501 | 1503 | |
| 1504 | + os_set_pdeathsig(); | |
| 1502 | 1505 | os_fix_helper_signals(); |
| 1503 | 1506 | |
| 1504 | 1507 | while(1){ |
| @@ -815,7 +815,8 @@ static struct platform_driver uml_net_driver = { · 814 unmodified lines | ||
| 815 | 815 | |
| 816 | 816 | static void vector_device_release(struct device *dev) |
| 817 | 817 | { |
| 818 | − struct vector_device *device = dev_get_drvdata(dev); | |
| 818 | + struct vector_device *device = | |
| 819 | + container_of(dev, struct vector_device, pdev.dev); | |
| 819 | 820 | struct net_device *netdev = device->dev; |
| 820 | 821 | |
| 821 | 822 | list_del(&device->list); |
| @@ -10,6 +10,7 @@ · 9 unmodified lines | ||
| 10 | 10 | /* Feature bits */ |
| 11 | 11 | #define VHOST_USER_F_PROTOCOL_FEATURES 30 |
| 12 | 12 | /* Protocol feature bits */ |
| 13 | +#define VHOST_USER_PROTOCOL_F_MQ 0 | |
| 13 | 14 | #define VHOST_USER_PROTOCOL_F_REPLY_ACK 3 |
| 14 | 15 | #define VHOST_USER_PROTOCOL_F_SLAVE_REQ 5 |
| 15 | 16 | #define VHOST_USER_PROTOCOL_F_CONFIG 9 |
| @@ -23,7 +24,8 @@ · 7 unmodified lines | ||
| 23 | 24 | /* Supported transport features */ |
| 24 | 25 | #define VHOST_USER_SUPPORTED_F BIT_ULL(VHOST_USER_F_PROTOCOL_FEATURES) |
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This diff is larger than a page shows: the files after these aren’t listed. Clone the repository to see all of it.