Required due to dependencies in following patches.
Unified · Split
| @@ -100,10 +100,6 @@ modules.order · 99 unmodified lines | ||
| 100 | 100 | /include/ksym/ |
| 101 | 101 | /arch/*/include/generated/ |
| 102 | 102 | |
| 103 | −# Generated lkdtm tests | |
| 104 | −/tools/testing/selftests/lkdtm/*.sh | |
| 105 | −!/tools/testing/selftests/lkdtm/run.sh | |
| 106 | − | |
| 107 | 103 | # stgit generated dirs |
| 108 | 104 | patches-* |
| 109 | 105 | |
| @@ -18,7 +18,7 @@ may look as follows:: · 17 unmodified lines | ||
| 18 | 18 | |
| 19 | 19 | $ ls -l /sys/bus/acpi/devices/INT3404:00/ |
| 20 | 20 | total 0 |
| 21 | −... | |
| 21 | + ... | |
| 22 | 22 | -r--r--r-- 1 root root 4096 Dec 13 20:38 state0 |
| 23 | 23 | -r--r--r-- 1 root root 4096 Dec 13 20:38 state1 |
| 24 | 24 | -r--r--r-- 1 root root 4096 Dec 13 20:38 state10 |
| @@ -38,7 +38,7 @@ where each of the "state*" files represents one performance state of the fan · 13 unmodified lines | ||
| 38 | 38 | and contains a colon-separated list of 5 integer numbers (fields) with the |
| 39 | 39 | following interpretation:: |
| 40 | 40 | |
| 41 | −control_percent:trip_point_index:speed_rpm:noise_level_mdb:power_mw | |
| 41 | + control_percent:trip_point_index:speed_rpm:noise_level_mdb:power_mw | |
| 42 | 42 | |
| 43 | 43 | * ``control_percent``: The percent value to be used to set the fan speed to a |
| 44 | 44 | specific level using the _FSL object (0-100). |
| @@ -102,7 +102,7 @@ Required sub-node properties: · 101 unmodified lines | ||
| 102 | 102 | [1] Documentation/devicetree/bindings/clock/clock-bindings.txt |
| 103 | 103 | [2] Documentation/devicetree/bindings/power/power-domain.yaml |
| 104 | 104 | [3] Documentation/devicetree/bindings/thermal/thermal.txt |
| 105 | −[4] Documentation/devicetree/bindings/sram/sram.txt | |
| 105 | +[4] Documentation/devicetree/bindings/sram/sram.yaml | |
| 106 | 106 | [5] Documentation/devicetree/bindings/reset/reset.txt |
| 107 | 107 | |
| 108 | 108 | Example: |
| @@ -109,7 +109,7 @@ Required properties: · 108 unmodified lines | ||
| 109 | 109 | [0] http://infocenter.arm.com/help/topic/com.arm.doc.dui0922b/index.html |
| 110 | 110 | [1] Documentation/devicetree/bindings/clock/clock-bindings.txt |
| 111 | 111 | [2] Documentation/devicetree/bindings/thermal/thermal.txt |
| 112 | −[3] Documentation/devicetree/bindings/sram/sram.txt | |
| 112 | +[3] Documentation/devicetree/bindings/sram/sram.yaml | |
| 113 | 113 | [4] Documentation/devicetree/bindings/power/power-domain.yaml |
| 114 | 114 | |
| 115 | 115 | Example: |
| @@ -62,7 +62,7 @@ Timer node: · 61 unmodified lines | ||
| 62 | 62 | |
| 63 | 63 | Syscon reboot node: |
| 64 | 64 | |
| 65 | −See Documentation/devicetree/bindings/power/reset/syscon-reboot.txt for the | |
| 65 | +See Documentation/devicetree/bindings/power/reset/syscon-reboot.yaml for the | |
| 66 | 66 | detailed list of properties, the two values defined below are specific to the |
| 67 | 67 | BCM6328-style timer: |
| 68 | 68 | |
| @@ -216,7 +216,7 @@ properties: · 215 unmodified lines | ||
| 216 | 216 | $ref: '/schemas/types.yaml#/definitions/phandle-array' |
| 217 | 217 | description: | |
| 218 | 218 | List of phandles to idle state nodes supported |
| 219 | − by this cpu (see ./idle-states.txt). | |
| 219 | + by this cpu (see ./idle-states.yaml). | |
| 220 | 220 | |
| 221 | 221 | capacity-dmips-mhz: |
| 222 | 222 | $ref: '/schemas/types.yaml#/definitions/uint32' |
| @@ -160,7 +160,7 @@ properties: · 159 unmodified lines | ||
| 160 | 160 | items: |
| 161 | 161 | - enum: |
| 162 | 162 | - armadeus,imx6dl-apf6 # APF6 (Solo) SoM |
| 163 | − - armadeus,imx6dl-apf6dldev # APF6 (Solo) SoM on APF6Dev board | |
| 163 | + - armadeus,imx6dl-apf6dev # APF6 (Solo) SoM on APF6Dev board | |
| 164 | 164 | - eckelmann,imx6dl-ci4x10 |
| 165 | 165 | - emtrion,emcon-mx6 # emCON-MX6S or emCON-MX6DL SoM |
| 166 | 166 | - emtrion,emcon-mx6-avari # emCON-MX6S or emCON-MX6DL SoM on Avari Base |
| @@ -1,7 +1,7 @@ | ||
| 1 | 1 | * Hisilicon Hi3519 System Controller Block |
| 2 | 2 | |
| 3 | 3 | This bindings use the following binding: |
| 4 | −Documentation/devicetree/bindings/mfd/syscon.txt | |
| 4 | +Documentation/devicetree/bindings/mfd/syscon.yaml | |
| 5 | 5 | |
| 6 | 6 | Required properties: |
| 7 | 7 | - compatible: "hisilicon,hi3519-sysctrl". |
| @@ -81,4 +81,4 @@ Example: · 80 unmodified lines | ||
| 81 | 81 | }; |
| 82 | 82 | }; |
| 83 | 83 | |
| 84 | −[1]. Documentation/devicetree/bindings/arm/idle-states.txt | |
| 84 | +[1]. Documentation/devicetree/bindings/arm/idle-states.yaml | |
| @@ -17,7 +17,7 @@ am335x and am437x only: · 16 unmodified lines | ||
| 17 | 17 | - pm-sram: Phandles to ocmcram nodes to be used for power management. |
| 18 | 18 | First should be type 'protect-exec' for the driver to use to copy |
| 19 | 19 | and run PM functions, second should be regular pool to be used for |
| 20 | − data region for code. See Documentation/devicetree/bindings/sram/sram.txt | |
| 20 | + data region for code. See Documentation/devicetree/bindings/sram/sram.yaml | |
| 21 | 21 | for more details. |
| 22 | 22 | |
| 23 | 23 | Examples: |
| @@ -100,13 +100,14 @@ properties: · 99 unmodified lines | ||
| 100 | 100 | bindings in [1]) must specify this property. |
| 101 | 101 | |
| 102 | 102 | [1] Kernel documentation - ARM idle states bindings |
| 103 | − Documentation/devicetree/bindings/arm/idle-states.txt | |
| 104 | − | |
| 105 | − "#power-domain-cells": | |
| 106 | − description: | |
| 107 | − The number of cells in a PM domain specifier as per binding in [3]. | |
| 108 | − Must be 0 as to represent a single PM domain. | |
| 103 | + Documentation/devicetree/bindings/arm/idle-states.yaml | |
| 109 | 104 | |
| 105 | +patternProperties: | |
| 106 | + "^power-domain-": | |
| 107 | + allOf: | |
| 108 | + - $ref: "../power/power-domain.yaml#" | |
| 109 | + type: object | |
| 110 | + description: | | |
| 110 | 111 | ARM systems can have multiple cores, sometimes in an hierarchical |
| 111 | 112 | arrangement. This often, but not always, maps directly to the processor |
| 112 | 113 | power topology of the system. Individual nodes in a topology have their |
| @@ -122,14 +123,8 @@ properties: · 9 unmodified lines | ||
| 122 | 123 | helps to implement support for OSI mode and OS implementations may choose |
| 123 | 124 | to mandate it. |
| 124 | 125 | |
| 125 | − [3] Documentation/devicetree/bindings/power/power_domain.txt | |
| 126 | − [4] Documentation/devicetree/bindings/power/domain-idle-state.txt | |
| 127 | − | |
| 128 | − power-domains: | |
| 129 | − $ref: '/schemas/types.yaml#/definitions/phandle-array' | |
| 130 | − description: | |
| 131 | − List of phandles and PM domain specifiers, as defined by bindings of the | |
| 132 | − PM domain provider. | |
| 126 | + [3] Documentation/devicetree/bindings/power/power-domain.yaml | |
| 127 | + [4] Documentation/devicetree/bindings/power/domain-idle-state.yaml | |
| 133 | 128 | |
| 134 | 129 | required: |
| 135 | 130 | - compatible |
| @@ -199,7 +194,7 @@ examples: · 63 unmodified lines | ||
| 199 | 194 | |
| 200 | 195 | CPU0: cpu@0 { |
| 201 | 196 | device_type = "cpu"; |
| 202 | − compatible = "arm,cortex-a53", "arm,armv8"; | |
| 197 | + compatible = "arm,cortex-a53"; | |
| 203 | 198 | reg = <0x0>; |
| 204 | 199 | enable-method = "psci"; |
| 205 | 200 | power-domains = <&CPU_PD0>; |
| @@ -208,7 +203,7 @@ examples: · 2 unmodified lines | ||
| 208 | 203 | |
| 209 | 204 | CPU1: cpu@1 { |
| 210 | 205 | device_type = "cpu"; |
| 211 | − compatible = "arm,cortex-a57", "arm,armv8"; | |
| 206 | + compatible = "arm,cortex-a53"; | |
| 212 | 207 | reg = <0x100>; |
| 213 | 208 | enable-method = "psci"; |
| 214 | 209 | power-domains = <&CPU_PD1>; |
| @@ -224,6 +219,9 @@ examples: · 9 unmodified lines | ||
| 224 | 219 | exit-latency-us = <10>; |
| 225 | 220 | min-residency-us = <100>; |
| 226 | 221 | }; |
| 222 | + }; | |
| 223 | + | |
| 224 | + domain-idle-states { | |
| 227 | 225 | |
| 228 | 226 | CLUSTER_RET: cluster-retention { |
| 229 | 227 | compatible = "domain-idle-state"; |
| @@ -247,19 +245,19 @@ examples: · 17 unmodified lines | ||
| 247 | 245 | compatible = "arm,psci-1.0"; |
| 248 | 246 | method = "smc"; |
| 249 | 247 | |
| 250 | − CPU_PD0: cpu-pd0 { | |
| 248 | + CPU_PD0: power-domain-cpu0 { | |
| 251 | 249 | #power-domain-cells = <0>; |
| 252 | 250 | domain-idle-states = <&CPU_PWRDN>; |
| 253 | 251 | power-domains = <&CLUSTER_PD>; |
| 254 | 252 | }; |
| 255 | 253 | |
| 256 | − CPU_PD1: cpu-pd1 { | |
| 254 | + CPU_PD1: power-domain-cpu1 { | |
| 257 | 255 | #power-domain-cells = <0>; |
| 258 | 256 | domain-idle-states = <&CPU_PWRDN>; |
| 259 | 257 | power-domains = <&CLUSTER_PD>; |
| 260 | 258 | }; |
| 261 | 259 | |
| 262 | − CLUSTER_PD: cluster-pd { | |
| 260 | + CLUSTER_PD: power-domain-cluster { | |
| 263 | 261 | #power-domain-cells = <0>; |
| 264 | 262 | domain-idle-states = <&CLUSTER_RET>, <&CLUSTER_PWRDN>; |
| 265 | 263 | }; |
| @@ -52,7 +52,7 @@ required: · 51 unmodified lines | ||
| 52 | 52 | |
| 53 | 53 | examples: |
| 54 | 54 | - | |
| 55 | − mlahb: ahb { | |
| 55 | + mlahb: ahb@38000000 { | |
| 56 | 56 | compatible = "st,mlahb", "simple-bus"; |
| 57 | 57 | #address-cells = <1>; |
| 58 | 58 | #size-cells = <1>; |
| @@ -70,7 +70,6 @@ examples: · 69 unmodified lines | ||
| 70 | 70 | #size-cells = <0>; |
| 71 | 71 | |
| 72 | 72 | pmic@3e3 { |
| 73 | − compatible = "..."; | |
| 74 | 73 | reg = <0x3e3>; |
| 75 | 74 | |
| 76 | 75 | /* ... */ |
| @@ -40,7 +40,7 @@ additionalProperties: false · 39 unmodified lines | ||
| 40 | 40 | |
| 41 | 41 | examples: |
| 42 | 42 | - | |
| 43 | − osc24M: clk@01c20050 { | |
| 43 | + osc24M: clk@1c20050 { | |
| 44 | 44 | #clock-cells = <0>; |
| 45 | 45 | compatible = "allwinner,sun4i-a10-osc-clk"; |
| 46 | 46 | reg = <0x01c20050 0x4>; |
| @@ -41,7 +41,7 @@ additionalProperties: false · 40 unmodified lines | ||
| 41 | 41 | |
| 42 | 42 | examples: |
| 43 | 43 | - | |
| 44 | − clk@0600005c { | |
| 44 | + clk@600005c { | |
| 45 | 45 | #clock-cells = <0>; |
| 46 | 46 | compatible = "allwinner,sun9i-a80-gt-clk"; |
| 47 | 47 | reg = <0x0600005c 0x4>; |
| @@ -42,7 +42,7 @@ properties: · 41 unmodified lines | ||
| 42 | 42 | be part of GCC and hence the TSENS properties can also be part |
| 43 | 43 | of the GCC/clock-controller node. |
| 44 | 44 | For more details on the TSENS properties please refer |
| 45 | − Documentation/devicetree/bindings/thermal/qcom-tsens.txt | |
| 45 | + Documentation/devicetree/bindings/thermal/qcom-tsens.yaml | |
| 46 | 46 | |
| 47 | 47 | nvmem-cell-names: |
| 48 | 48 | minItems: 1 |
| @@ -49,11 +49,7 @@ examples: · 48 unmodified lines | ||
| 49 | 49 | resets = <&tcon_ch0_clk 0>; |
| 50 | 50 | |
| 51 | 51 | port { |
| 52 | − #address-cells = <1>; | |
| 53 | − #size-cells = <0>; | |
| 54 | − | |
| 55 | − tve0_in_tcon0: endpoint@0 { | |
| 56 | − reg = <0>; | |
| 52 | + tve0_in_tcon0: endpoint { | |
| 57 | 53 | remote-endpoint = <&tcon0_out_tve0>; |
| 58 | 54 | }; |
| 59 | 55 | }; |
| @@ -79,21 +79,15 @@ examples: · 78 unmodified lines | ||
| 79 | 79 | #size-cells = <0>; |
| 80 | 80 | |
| 81 | 81 | anx6345_in: port@0 { |
| 82 | − #address-cells = <1>; | |
| 83 | − #size-cells = <0>; | |
| 84 | 82 | reg = <0>; |
| 85 | − anx6345_in_tcon0: endpoint@0 { | |
| 86 | − reg = <0>; | |
| 83 | + anx6345_in_tcon0: endpoint { | |
| 87 | 84 | remote-endpoint = <&tcon0_out_anx6345>; |
| 88 | 85 | }; |
| 89 | 86 | }; |
| 90 | 87 | |
| 91 | 88 | anx6345_out: port@1 { |
| 92 | − #address-cells = <1>; | |
| 93 | − #size-cells = <0>; | |
| 94 | 89 | reg = <1>; |
| 95 | − anx6345_out_panel: endpoint@0 { | |
| 96 | − reg = <0>; | |
| 90 | + anx6345_out_panel: endpoint { | |
| 97 | 91 | remote-endpoint = <&panel_in_edp>; |
| 98 | 92 | }; |
| 99 | 93 | }; |
| @@ -37,6 +37,8 @@ examples: · 36 unmodified lines | ||
| 37 | 37 | dsi@ff450000 { |
| 38 | 38 | #address-cells = <1>; |
| 39 | 39 | #size-cells = <0>; |
| 40 | + reg = <0xff450000 0x1000>; | |
| 41 | + | |
| 40 | 42 | panel@0 { |
| 41 | 43 | compatible = "leadtek,ltk500hd1829"; |
| 42 | 44 | reg = <0>; |
| @@ -37,6 +37,8 @@ examples: · 36 unmodified lines | ||
| 37 | 37 | dsi@ff450000 { |
| 38 | 38 | #address-cells = <1>; |
| 39 | 39 | #size-cells = <0>; |
| 40 | + reg = <0xff450000 0x1000>; | |
| 41 | + | |
| 40 | 42 | panel@0 { |
| 41 | 43 | compatible = "xinpeng,xpp055c272"; |
| 42 | 44 | reg = <0>; |
| @@ -174,10 +174,6 @@ examples: · 173 unmodified lines | ||
| 174 | 174 | }; |
| 175 | 175 | }; |
| 176 | 176 | |
| 177 | − soc@1c00000 { | |
| 178 | − lcdc0: lcdc@1c0c000 { | |
| 179 | − compatible = "allwinner,sun4i-a10-lcdc"; | |
| 180 | − }; | |
| 181 | − }; | |
| 177 | + lcdc0: lcdc { }; | |
| 182 | 178 | |
| 183 | 179 | ... |
| @@ -37,7 +37,7 @@ Optional nodes: · 36 unmodified lines | ||
| 37 | 37 | supports a single port with a single endpoint. |
| 38 | 38 | |
| 39 | 39 | - See also Documentation/devicetree/bindings/display/tilcdc/panel.txt and |
| 40 | − Documentation/devicetree/bindings/display/tilcdc/tfp410.txt for connecting | |
| 40 | + Documentation/devicetree/bindings/display/bridge/ti,tfp410.txt for connecting | |
| 41 | 41 | tfp410 DVI encoder or lcd panel to lcdc |
| 42 | 42 | |
| 43 | 43 | [1] There is an errata about AM335x color wiring. For 16-bit color mode |
| @@ -143,7 +143,7 @@ examples: · 142 unmodified lines | ||
| 143 | 143 | #size-cells = <2>; |
| 144 | 144 | dma-coherent; |
| 145 | 145 | dma-ranges; |
| 146 | − ranges; | |
| 146 | + ranges = <0x0 0x30800000 0x0 0x30800000 0x0 0x05000000>; | |
| 147 | 147 | |
| 148 | 148 | ti,sci-dev-id = <118>; |
| 149 | 149 | |
| @@ -169,16 +169,4 @@ examples: · 19 unmodified lines | ||
| 169 | 169 | ti,sci-rm-range-rflow = <0x6>; /* GP RFLOW */ |
| 170 | 170 | }; |
| 171 | 171 | }; |
| 172 | − | |
| 173 | − mcasp0: mcasp@02B00000 { | |
| 174 | − dmas = <&main_udmap 0xc400>, <&main_udmap 0x4400>; | |
| 175 | − dma-names = "tx", "rx"; | |
| 176 | − }; | |
| 177 | − | |
| 178 | − crypto: crypto@4E00000 { | |
| 179 | − compatible = "ti,sa2ul-crypto"; | |
| 180 | − | |
| 181 | − dmas = <&main_udmap 0xc000>, <&main_udmap 0x4000>, <&main_udmap 0x4001>; | |
| 182 | − dma-names = "tx", "rx1", "rx2"; | |
| 183 | − }; | |
| 184 | 172 | }; |
| @@ -84,31 +84,31 @@ examples: · 83 unmodified lines | ||
| 84 | 84 | gpu_opp_table: opp_table0 { |
| 85 | 85 | compatible = "operating-points-v2"; |
| 86 | 86 | |
| 87 | − opp@533000000 { | |
| 87 | + opp-533000000 { | |
| 88 | 88 | opp-hz = /bits/ 64 <533000000>; |
| 89 | 89 | opp-microvolt = <1250000>; |
| 90 | 90 | }; |
| 91 | − opp@450000000 { | |
| 91 | + opp-450000000 { | |
| 92 | 92 | opp-hz = /bits/ 64 <450000000>; |
| 93 | 93 | opp-microvolt = <1150000>; |
| 94 | 94 | }; |
| 95 | − opp@400000000 { | |
| 95 | + opp-400000000 { | |
| 96 | 96 | opp-hz = /bits/ 64 <400000000>; |
| 97 | 97 | opp-microvolt = <1125000>; |
| 98 | 98 | }; |
| 99 | − opp@350000000 { | |
| 99 | + opp-350000000 { | |
| 100 | 100 | opp-hz = /bits/ 64 <350000000>; |
| 101 | 101 | opp-microvolt = <1075000>; |
| 102 | 102 | }; |
| 103 | − opp@266000000 { | |
| 103 | + opp-266000000 { | |
| 104 | 104 | opp-hz = /bits/ 64 <266000000>; |
| 105 | 105 | opp-microvolt = <1025000>; |
| 106 | 106 | }; |
| 107 | − opp@160000000 { | |
| 107 | + opp-160000000 { | |
| 108 | 108 | opp-hz = /bits/ 64 <160000000>; |
| 109 | 109 | opp-microvolt = <925000>; |
| 110 | 110 | }; |
| 111 | − opp@100000000 { | |
| 111 | + opp-100000000 { | |
| 112 | 112 | opp-hz = /bits/ 64 <100000000>; |
| 113 | 113 | opp-microvolt = <912500>; |
| 114 | 114 | }; |
| @@ -138,31 +138,31 @@ examples: · 137 unmodified lines | ||
| 138 | 138 | gpu_opp_table: opp_table0 { |
| 139 | 139 | compatible = "operating-points-v2"; |
| 140 | 140 | |
| 141 | − opp@533000000 { | |
| 141 | + opp-533000000 { | |
| 142 | 142 | opp-hz = /bits/ 64 <533000000>; |
| 143 | 143 | opp-microvolt = <1250000>; |
| 144 | 144 | }; |
| 145 | − opp@450000000 { | |
| 145 | + opp-450000000 { | |
| 146 | 146 | opp-hz = /bits/ 64 <450000000>; |
| 147 | 147 | opp-microvolt = <1150000>; |
| 148 | 148 | }; |
| 149 | − opp@400000000 { | |
| 149 | + opp-400000000 { | |
| 150 | 150 | opp-hz = /bits/ 64 <400000000>; |
| 151 | 151 | opp-microvolt = <1125000>; |
| 152 | 152 | }; |
| 153 | − opp@350000000 { | |
| 153 | + opp-350000000 { | |
| 154 | 154 | opp-hz = /bits/ 64 <350000000>; |
| 155 | 155 | opp-microvolt = <1075000>; |
| 156 | 156 | }; |
| 157 | − opp@266000000 { | |
| 157 | + opp-266000000 { | |
| 158 | 158 | opp-hz = /bits/ 64 <266000000>; |
| 159 | 159 | opp-microvolt = <1025000>; |
| 160 | 160 | }; |
| 161 | − opp@160000000 { | |
| 161 | + opp-160000000 { | |
| 162 | 162 | opp-hz = /bits/ 64 <160000000>; |
| 163 | 163 | opp-microvolt = <925000>; |
| 164 | 164 | }; |
| 165 | − opp@100000000 { | |
| 165 | + opp-100000000 { | |
| 166 | 166 | opp-hz = /bits/ 64 <100000000>; |
| 167 | 167 | opp-microvolt = <912500>; |
| 168 | 168 | }; |
| @@ -123,7 +123,7 @@ examples: · 122 unmodified lines | ||
| 123 | 123 | samsung,syscon-phandle = <&pmu_system_controller>; |
| 124 | 124 | |
| 125 | 125 | /* NTC thermistor is a hwmon device */ |
| 126 | − ncp15wb473@0 { | |
| 126 | + ncp15wb473 { | |
| 127 | 127 | compatible = "murata,ncp15wb473"; |
| 128 | 128 | pullup-uv = <1800000>; |
| 129 | 129 | pullup-ohm = <47000>; |
| @@ -62,7 +62,7 @@ required: · 61 unmodified lines | ||
| 62 | 62 | |
| 63 | 63 | examples: |
| 64 | 64 | - | |
| 65 | − i2c@00000000 { | |
| 65 | + i2c { | |
| 66 | 66 | #address-cells = <1>; |
| 67 | 67 | #size-cells = <0>; |
| 68 | 68 | gt928@5d { |
| @@ -1,7 +1,7 @@ | ||
| 1 | 1 | Texas Instruments TWL family (twl4030) pwrbutton module |
| 2 | 2 | |
| 3 | 3 | This module is part of the TWL4030. For more details about the whole |
| 4 | −chip see Documentation/devicetree/bindings/mfd/twl-familly.txt. | |
| 4 | +chip see Documentation/devicetree/bindings/mfd/twl-family.txt. | |
| 5 | 5 | |
| 6 | 6 | This module provides a simple power button event via an Interrupt. |
| 7 | 7 | |
| @@ -85,7 +85,7 @@ properties: · 84 unmodified lines | ||
| 85 | 85 | # LED will act as a back-light, controlled by the framebuffer system |
| 86 | 86 | - backlight |
| 87 | 87 | # LED will turn on (but for leds-gpio see "default-state" property in |
| 88 | − # Documentation/devicetree/bindings/leds/leds-gpio.txt) | |
| 88 | + # Documentation/devicetree/bindings/leds/leds-gpio.yaml) | |
| 89 | 89 | - default-on |
| 90 | 90 | # LED "double" flashes at a load average based rate |
| 91 | 91 | - heartbeat |
| @@ -5,7 +5,7 @@ where single bits in a certain register can turn on/off a · 4 unmodified lines | ||
| 5 | 5 | single LED. The register bit LEDs appear as children to the |
| 6 | 6 | syscon device, with the proper compatible string. For the |
| 7 | 7 | syscon bindings see: |
| 8 | −Documentation/devicetree/bindings/mfd/syscon.txt | |
| 8 | +Documentation/devicetree/bindings/mfd/syscon.yaml | |
| 9 | 9 | |
| 10 | 10 | Each LED is represented as a sub-node of the syscon device. Each |
| 11 | 11 | node's name represents the name of the corresponding LED. |
| @@ -177,7 +177,7 @@ examples: · 176 unmodified lines | ||
| 177 | 177 | }; |
| 178 | 178 | }; |
| 179 | 179 | |
| 180 | − i2c5: i2c@4807c000 { | |
| 180 | + i2c { | |
| 181 | 181 | clock-frequency = <400000>; |
| 182 | 182 | #address-cells = <1>; |
| 183 | 183 | #size-cells = <0>; |
| @@ -32,7 +32,7 @@ Required only for "ti,emif-am3352" and "ti,emif-am4372": · 31 unmodified lines | ||
| 32 | 32 | - sram : Phandles for generic sram driver nodes, |
| 33 | 33 | first should be type 'protect-exec' for the driver to use to copy |
| 34 | 34 | and run PM functions, second should be regular pool to be used for |
| 35 | − data region for code. See Documentation/devicetree/bindings/sram/sram.txt | |
| 35 | + data region for code. See Documentation/devicetree/bindings/sram/sram.yaml | |
| 36 | 36 | for more details. |
| 37 | 37 | |
| 38 | 38 | Optional properties: |
| @@ -97,14 +97,14 @@ examples: · 96 unmodified lines | ||
| 97 | 97 | regulators { |
| 98 | 98 | compatible = "maxim,max77650-regulator"; |
| 99 | 99 | |
| 100 | − max77650_ldo: regulator@0 { | |
| 100 | + max77650_ldo: regulator-ldo { | |
| 101 | 101 | regulator-compatible = "ldo"; |
| 102 | 102 | regulator-name = "max77650-ldo"; |
| 103 | 103 | regulator-min-microvolt = <1350000>; |
| 104 | 104 | regulator-max-microvolt = <2937500>; |
| 105 | 105 | }; |
| 106 | 106 | |
| 107 | − max77650_sbb0: regulator@1 { | |
| 107 | + max77650_sbb0: regulator-sbb0 { | |
| 108 | 108 | regulator-compatible = "sbb0"; |
| 109 | 109 | regulator-name = "max77650-sbb0"; |
| 110 | 110 | regulator-min-microvolt = <800000>; |
| @@ -26,8 +26,8 @@ Required properties: · 25 unmodified lines | ||
| 26 | 26 | ldo6, ldo7, ldo8 |
| 27 | 27 | |
| 28 | 28 | - xxx-supply: Input voltage supply regulator. |
| 29 | − These entries are require if regulators are enabled for a device. Missing of these | |
| 30 | − properties can cause the regulator registration fails. | |
| 29 | + These entries are required if regulators are enabled for a device. Missing these | |
| 30 | + properties can cause the regulator registration to fail. | |
| 31 | 31 | If some of input supply is powered through battery or always-on supply then |
| 32 | 32 | also it is require to have these parameters with proper node handle of always |
| 33 | 33 | on power supply. |
File renamed without changes.
| @@ -20,7 +20,7 @@ RAVE SP consists of the following sub-devices: · 19 unmodified lines | ||
| 20 | 20 | Device Description |
| 21 | 21 | ------ ----------- |
| 22 | 22 | rave-sp-wdt : Watchdog |
| 23 | −rave-sp-nvmem : Interface to onborad EEPROM | |
| 23 | +rave-sp-nvmem : Interface to onboard EEPROM | |
| 24 | 24 | rave-sp-backlight : Display backlight |
| 25 | 25 | rave-sp-hwmon : Interface to onboard hardware sensors |
| 26 | 26 | rave-sp-leds : Interface to onboard LEDs |
| @@ -26,7 +26,7 @@ For generic IOMMU bindings, see · 25 unmodified lines | ||
| 26 | 26 | Documentation/devicetree/bindings/iommu/iommu.txt. |
| 27 | 27 | |
| 28 | 28 | For arm-smmu binding, see: |
| 29 | −Documentation/devicetree/bindings/iommu/arm,smmu.txt. | |
| 29 | +Documentation/devicetree/bindings/iommu/arm,smmu.yaml. | |
| 30 | 30 | |
| 31 | 31 | Required properties: |
| 32 | 32 | |
| @@ -370,6 +370,7 @@ examples: · 369 unmodified lines | ||
| 370 | 370 | mmc3: mmc@1c12000 { |
| 371 | 371 | #address-cells = <1>; |
| 372 | 372 | #size-cells = <0>; |
| 373 | + reg = <0x1c12000 0x200>; | |
| 373 | 374 | pinctrl-names = "default"; |
| 374 | 375 | pinctrl-0 = <&mmc3_pins_a>; |
| 375 | 376 | vmmc-supply = <®_vmmc3>; |
| @@ -27,7 +27,7 @@ Required properties of NAND chips: · 26 unmodified lines | ||
| 27 | 27 | - reg: shall contain the native Chip Select ids from 0 to max supported by |
| 28 | 28 | the cadence nand flash controller |
| 29 | 29 | |
| 30 | −See Documentation/devicetree/bindings/mtd/nand.txt for more details on | |
| 30 | +See Documentation/devicetree/bindings/mtd/nand-controller.yaml for more details on | |
| 31 | 31 | generic bindings. |
| 32 | 32 | |
| 33 | 33 | Example: |
| @@ -45,7 +45,7 @@ Optional properties: · 44 unmodified lines | ||
| 45 | 45 | switch queue |
| 46 | 46 | |
| 47 | 47 | - resets: a single phandle and reset identifier pair. See |
| 48 | − Documentation/devicetree/binding/reset/reset.txt for details. | |
| 48 | + Documentation/devicetree/bindings/reset/reset.txt for details. | |
| 49 | 49 | |
| 50 | 50 | - reset-names: If the "reset" property is specified, this property should have |
| 51 | 51 | the value "switch" to denote the switch reset line. |
| @@ -76,6 +76,8 @@ examples: · 75 unmodified lines | ||
| 76 | 76 | qfprom: eeprom@700000 { |
| 77 | 77 | #address-cells = <1>; |
| 78 | 78 | #size-cells = <1>; |
| 79 | + reg = <0x00700000 0x100000>; | |
| 80 | + | |
| 79 | 81 | wp-gpios = <&gpio1 3 GPIO_ACTIVE_HIGH>; |
| 80 | 82 | |
| 81 | 83 | /* ... */ |
| @@ -86,7 +86,7 @@ examples: · 85 unmodified lines | ||
| 86 | 86 | #include <dt-bindings/clock/sun4i-a10-ccu.h> |
| 87 | 87 | #include <dt-bindings/reset/sun4i-a10-ccu.h> |
| 88 | 88 | |
| 89 | − usbphy: phy@01c13400 { | |
| 89 | + usbphy: phy@1c13400 { | |
| 90 | 90 | #phy-cells = <1>; |
| 91 | 91 | compatible = "allwinner,sun4i-a10-usb-phy"; |
| 92 | 92 | reg = <0x01c13400 0x10>, <0x01c14800 0x4>, <0x01c1c800 0x4>; |
| @@ -17,7 +17,7 @@ description: |+ · 16 unmodified lines | ||
| 17 | 17 | "aspeed,ast2400-scu", "syscon", "simple-mfd" |
| 18 | 18 | |
| 19 | 19 | Refer to the the bindings described in |
| 20 | − Documentation/devicetree/bindings/mfd/syscon.txt | |
| 20 | + Documentation/devicetree/bindings/mfd/syscon.yaml | |
| 21 | 21 | |
| 22 | 22 | properties: |
| 23 | 23 | compatible: |
| @@ -18,7 +18,7 @@ description: |+ · 17 unmodified lines | ||
| 18 | 18 | "aspeed,g5-scu", "syscon", "simple-mfd" |
| 19 | 19 | |
| 20 | 20 | Refer to the the bindings described in |
| 21 | − Documentation/devicetree/bindings/mfd/syscon.txt | |
| 21 | + Documentation/devicetree/bindings/mfd/syscon.yaml | |
| 22 | 22 | |
| 23 | 23 | properties: |
| 24 | 24 | compatible: |
| @@ -17,7 +17,7 @@ description: |+ · 16 unmodified lines | ||
| 17 | 17 | "aspeed,ast2600-scu", "syscon", "simple-mfd" |
| 18 | 18 | |
| 19 | 19 | Refer to the the bindings described in |
| 20 | − Documentation/devicetree/bindings/mfd/syscon.txt | |
| 20 | + Documentation/devicetree/bindings/mfd/syscon.yaml | |
| 21 | 21 | |
| 22 | 22 | properties: |
| 23 | 23 | compatible: |
| @@ -248,7 +248,7 @@ examples: · 247 unmodified lines | ||
| 248 | 248 | }; |
| 249 | 249 | |
| 250 | 250 | //Example 3 pin groups |
| 251 | − pinctrl@60020000 { | |
| 251 | + pinctrl { | |
| 252 | 252 | usart1_pins_a: usart1-0 { |
| 253 | 253 | pins1 { |
| 254 | 254 | pinmux = <STM32_PINMUX('A', 9, AF7)>; |
| @@ -18,7 +18,7 @@ description: |+ · 17 unmodified lines | ||
| 18 | 18 | "amlogic,meson-gx-hhi-sysctrl", "simple-mfd", "syscon" |
| 19 | 19 | |
| 20 | 20 | Refer to the the bindings described in |
| 21 | − Documentation/devicetree/bindings/mfd/syscon.txt | |
| 21 | + Documentation/devicetree/bindings/mfd/syscon.yaml | |
| 22 | 22 | |
| 23 | 23 | properties: |
| 24 | 24 | compatible: |
| @@ -1,33 +0,0 @@ | ||
| 1 | −PM Domain Idle State Node: | |
| 2 | − | |
| 3 | −A domain idle state node represents the state parameters that will be used to | |
| 4 | −select the state when there are no active components in the domain. | |
| 5 | − | |
| 6 | −The state node has the following parameters - | |
| 7 | − | |
| 8 | −- compatible: | |
| 9 | − Usage: Required | |
| 10 | − Value type: <string> | |
| 11 | − Definition: Must be "domain-idle-state". | |
| 12 | − | |
| 13 | −- entry-latency-us | |
| 14 | − Usage: Required | |
| 15 | − Value type: <prop-encoded-array> | |
| 16 | − Definition: u32 value representing worst case latency in | |
| 17 | − microseconds required to enter the idle state. | |
| 18 | − The exit-latency-us duration may be guaranteed | |
| 19 | − only after entry-latency-us has passed. | |
| 20 | − | |
| 21 | −- exit-latency-us | |
| 22 | − Usage: Required | |
| 23 | − Value type: <prop-encoded-array> | |
| 24 | − Definition: u32 value representing worst case latency | |
| 25 | − in microseconds required to exit the idle state. | |
| 26 | − | |
| 27 | −- min-residency-us | |
| 28 | − Usage: Required | |
| 29 | − Value type: <prop-encoded-array> | |
| 30 | − Definition: u32 value representing minimum residency duration | |
| 31 | − in microseconds after which the idle state will yield | |
| 32 | − power benefits after overcoming the overhead in entering | |
| 33 | −i the idle state. | |
| @@ -0,0 +1,64 @@ | ||
| 1 | +# SPDX-License-Identifier: GPL-2.0 | |
| 2 | +%YAML 1.2 | |
| 3 | +--- | |
| 4 | +$id: http://devicetree.org/schemas/power/domain-idle-state.yaml# | |
| 5 | +$schema: http://devicetree.org/meta-schemas/core.yaml# | |
| 6 | + | |
| 7 | +title: PM Domain Idle States binding description | |
| 8 | + | |
| 9 | +maintainers: | |
| 10 | + - Ulf Hansson <ulf.hansson@linaro.org> | |
| 11 | + | |
| 12 | +description: | |
| 13 | + A domain idle state node represents the state parameters that will be used to | |
| 14 | + select the state when there are no active components in the PM domain. | |
| 15 | + | |
| 16 | +properties: | |
| 17 | + $nodename: | |
| 18 | + const: domain-idle-states | |
| 19 | + | |
| 20 | +patternProperties: | |
| 21 | + "^(cpu|cluster|domain)-": | |
| 22 | + type: object | |
| 23 | + description: | |
| 24 | + Each state node represents a domain idle state description. | |
| 25 | + | |
| 26 | + properties: | |
| 27 | + compatible: | |
| 28 | + const: domain-idle-state | |
| 29 | + | |
| 30 | + entry-latency-us: | |
| 31 | + description: | |
| 32 | + The worst case latency in microseconds required to enter the idle | |
| 33 | + state. Note that, the exit-latency-us duration may be guaranteed only | |
| 34 | + after the entry-latency-us has passed. | |
| 35 | + | |
| 36 | + exit-latency-us: | |
| 37 | + description: | |
| 38 | + The worst case latency in microseconds required to exit the idle | |
| 39 | + state. | |
| 40 | + | |
| 41 | + min-residency-us: | |
| 42 | + description: | |
| 43 | + The minimum residency duration in microseconds after which the idle | |
| 44 | + state will yield power benefits, after overcoming the overhead while | |
| 45 | + entering the idle state. | |
| 46 | + | |
| 47 | + required: | |
| 48 | + - compatible | |
| 49 | + - entry-latency-us | |
| 50 | + - exit-latency-us | |
| 51 | + - min-residency-us | |
| 52 | + | |
| 53 | +examples: | |
| 54 | + - | | |
| 55 | + | |
| 56 | + domain-idle-states { | |
| 57 | + domain_retention: domain-retention { | |
| 58 | + compatible = "domain-idle-state"; | |
| 59 | + entry-latency-us = <20>; | |
| 60 | + exit-latency-us = <40>; | |
| 61 | + min-residency-us = <80>; | |
| 62 | + }; | |
| 63 | + }; | |
| 64 | +... | |
| @@ -25,22 +25,20 @@ description: |+ · 24 unmodified lines | ||
| 25 | 25 | |
| 26 | 26 | properties: |
| 27 | 27 | $nodename: |
| 28 | − pattern: "^(power-controller|power-domain)(@.*)?$" | |
| 28 | + pattern: "^(power-controller|power-domain)([@-].*)?$" | |
| 29 | 29 | |
| 30 | 30 | domain-idle-states: |
| 31 | 31 | $ref: /schemas/types.yaml#/definitions/phandle-array |
| 32 | − description: | |
| 33 | − A phandle of an idle-state that shall be soaked into a generic domain | |
| 34 | − power state. The idle state definitions are compatible with | |
| 35 | − domain-idle-state specified in | |
| 36 | − Documentation/devicetree/bindings/power/domain-idle-state.txt | |
| 37 | − phandles that are not compatible with domain-idle-state will be ignored. | |
| 38 | − The domain-idle-state property reflects the idle state of this PM domain | |
| 39 | − and not the idle states of the devices or sub-domains in the PM domain. | |
| 40 | − Devices and sub-domains have their own idle-states independent | |
| 41 | − of the parent domain's idle states. In the absence of this property, | |
| 42 | − the domain would be considered as capable of being powered-on | |
| 43 | − or powered-off. | |
| 32 | + description: | | |
| 33 | + Phandles of idle states that defines the available states for the | |
| 34 | + power-domain provider. The idle state definitions are compatible with the | |
| 35 | + domain-idle-state bindings, specified in ./domain-idle-state.yaml. | |
| 36 | + | |
| 37 | + Note that, the domain-idle-state property reflects the idle states of this | |
| 38 | + PM domain and not the idle states of the devices or sub-domains in the PM | |
| 39 | + domain. Devices and sub-domains have their own idle states independent of | |
| 40 | + the parent domain's idle states. In the absence of this property, the | |
| 41 | + domain would be considered as capable of being powered-on or powered-off. | |
| 44 | 42 | |
| 45 | 43 | operating-points-v2: |
| 46 | 44 | $ref: /schemas/types.yaml#/definitions/phandle-array |
| @@ -109,4 +109,4 @@ Example: · 108 unmodified lines | ||
| 109 | 109 | required-opps = <&domain1_opp_1>; |
| 110 | 110 | }; |
| 111 | 111 | |
| 112 | −[1]. Documentation/devicetree/bindings/power/domain-idle-state.txt | |
| 112 | +[1]. Documentation/devicetree/bindings/power/domain-idle-state.yaml | |
| @@ -161,7 +161,7 @@ The regulator node houses sub-nodes for each regulator within the device. Each · 160 unmodified lines | ||
| 161 | 161 | sub-node is identified using the node's name, with valid values listed for each |
| 162 | 162 | of the PMICs below. |
| 163 | 163 | |
| 164 | −pm8005: | |
| 164 | +pm8004: | |
| 165 | 165 | s2, s5 |
| 166 | 166 | |
| 167 | 167 | pm8005: |
| @@ -191,7 +191,7 @@ patternProperties: · 190 unmodified lines | ||
| 191 | 191 | |
| 192 | 192 | examples: |
| 193 | 193 | - | |
| 194 | − xyzreg: regulator@0 { | |
| 194 | + xyzreg: regulator { | |
| 195 | 195 | regulator-min-microvolt = <1000000>; |
| 196 | 196 | regulator-max-microvolt = <2500000>; |
| 197 | 197 | regulator-always-on; |
| @@ -23,7 +23,11 @@ properties: · 22 unmodified lines | ||
| 23 | 23 | description: Global reset register offset and bit offset. |
| 24 | 24 | allOf: |
| 25 | 25 | - $ref: /schemas/types.yaml#/definitions/uint32-array |
| 26 | − - maxItems: 2 | |
| 26 | + items: | |
| 27 | + - description: Register offset | |
| 28 | + - description: Register bit offset | |
| 29 | + minimum: 0 | |
| 30 | + maximum: 31 | |
| 27 | 31 | |
| 28 | 32 | "#reset-cells": |
| 29 | 33 | minimum: 2 |
| @@ -3,4 +3,4 @@ STMicroelectronics STM32MP1 Peripheral Reset Controller · 2 unmodified lines | ||
| 3 | 3 | |
| 4 | 4 | The RCC IP is both a reset and a clock controller. |
| 5 | 5 | |
| 6 | −Please see Documentation/devicetree/bindings/clock/st,stm32mp1-rcc.txt | |
| 6 | +Please see Documentation/devicetree/bindings/clock/st,stm32mp1-rcc.yaml | |
| @@ -36,7 +36,7 @@ SAI subnodes required properties: · 35 unmodified lines | ||
| 36 | 36 | - clock-names: Must contain "sai_ck". |
| 37 | 37 | Must also contain "MCLK", if SAI shares a master clock, |
| 38 | 38 | with a SAI set as MCLK clock provider. |
| 39 | − - dmas: see Documentation/devicetree/bindings/dma/stm32-dma.txt | |
| 39 | + - dmas: see Documentation/devicetree/bindings/dma/st,stm32-dma.yaml | |
| 40 | 40 | - dma-names: identifier string for each DMA request line |
| 41 | 41 | "tx": if sai sub-block is configured as playback DAI |
| 42 | 42 | "rx": if sai sub-block is configured as capture DAI |
| @@ -10,7 +10,7 @@ Required properties: · 9 unmodified lines | ||
| 10 | 10 | - clock-names: must contain "kclk" |
| 11 | 11 | - interrupts: cpu DAI interrupt line |
| 12 | 12 | - dmas: DMA specifiers for audio data DMA and iec control flow DMA |
| 13 | − See STM32 DMA bindings, Documentation/devicetree/bindings/dma/stm32-dma.txt | |
| 13 | + See STM32 DMA bindings, Documentation/devicetree/bindings/dma/st,stm32-dma.yaml | |
| 14 | 14 | - dma-names: two dmas have to be defined, "rx" and "rx-ctrl" |
| 15 | 15 | |
| 16 | 16 | Optional properties: |
| @@ -49,7 +49,7 @@ properties: · 48 unmodified lines | ||
| 49 | 49 | dmas: |
| 50 | 50 | description: | |
| 51 | 51 | DMA specifiers for tx and rx dma. DMA fifo mode must be used. See |
| 52 | − the STM32 DMA bindings Documentation/devicetree/bindings/dma/stm32-dma.txt. | |
| 52 | + the STM32 DMA bindings Documentation/devicetree/bindings/dma/st,stm32-dma.yaml. | |
| 53 | 53 | items: |
| 54 | 54 | - description: rx DMA channel |
| 55 | 55 | - description: tx DMA channel |
| @@ -125,7 +125,7 @@ examples: · 124 unmodified lines | ||
| 125 | 125 | #size-cells = <1>; |
| 126 | 126 | ranges; |
| 127 | 127 | |
| 128 | − sram_a: sram@00000000 { | |
| 128 | + sram_a: sram@0 { | |
| 129 | 129 | compatible = "mmio-sram"; |
| 130 | 130 | reg = <0x00000000 0xc000>; |
| 131 | 131 | #address-cells = <1>; |
| @@ -17,7 +17,7 @@ description: |+ · 16 unmodified lines | ||
| 17 | 17 | "brcm,bcm2711-avs-monitor", "syscon", "simple-mfd" |
| 18 | 18 | |
| 19 | 19 | Refer to the the bindings described in |
| 20 | − Documentation/devicetree/bindings/mfd/syscon.txt | |
| 20 | + Documentation/devicetree/bindings/mfd/syscon.yaml | |
| 21 | 21 | |
| 22 | 22 | properties: |
| 23 | 23 | compatible: |
| @@ -87,7 +87,7 @@ additionalProperties: false · 86 unmodified lines | ||
| 87 | 87 | |
| 88 | 88 | examples: |
| 89 | 89 | - | |
| 90 | − timer { | |
| 90 | + timer@1c20c00 { | |
| 91 | 91 | compatible = "allwinner,sun4i-a10-timer"; |
| 92 | 92 | reg = <0x01c20c00 0x400>; |
| 93 | 93 | interrupts = <22>, |
| @@ -151,8 +151,8 @@ The details of these operations are: · 150 unmodified lines | ||
| 151 | 151 | Note that callbacks will always be invoked from the DMA |
| 152 | 152 | engines tasklet, never from interrupt context. |
| 153 | 153 | |
| 154 | −Optional: per descriptor metadata | |
| 155 | −--------------------------------- | |
| 154 | + **Optional: per descriptor metadata** | |
| 155 | + | |
| 156 | 156 | DMAengine provides two ways for metadata support. |
| 157 | 157 | |
| 158 | 158 | DESC_METADATA_CLIENT |
| @@ -199,12 +199,15 @@ Optional: per descriptor metadata · 40 unmodified lines | ||
| 199 | 199 | DESC_METADATA_CLIENT |
| 200 | 200 | |
| 201 | 201 | - DMA_MEM_TO_DEV / DEV_MEM_TO_MEM: |
| 202 | + | |
| 202 | 203 | 1. prepare the descriptor (dmaengine_prep_*) |
| 203 | 204 | construct the metadata in the client's buffer |
| 204 | 205 | 2. use dmaengine_desc_attach_metadata() to attach the buffer to the |
| 205 | 206 | descriptor |
| 206 | 207 | 3. submit the transfer |
| 208 | + | |
| 207 | 209 | - DMA_DEV_TO_MEM: |
| 210 | + | |
| 208 | 211 | 1. prepare the descriptor (dmaengine_prep_*) |
| 209 | 212 | 2. use dmaengine_desc_attach_metadata() to attach the buffer to the |
| 210 | 213 | descriptor |
| @@ -215,6 +218,7 @@ Optional: per descriptor metadata · 4 unmodified lines | ||
| 215 | 218 | DESC_METADATA_ENGINE |
| 216 | 219 | |
| 217 | 220 | - DMA_MEM_TO_DEV / DEV_MEM_TO_MEM: |
| 221 | + | |
| 218 | 222 | 1. prepare the descriptor (dmaengine_prep_*) |
| 219 | 223 | 2. use dmaengine_desc_get_metadata_ptr() to get the pointer to the |
| 220 | 224 | engine's metadata area |
| @@ -222,7 +226,9 @@ Optional: per descriptor metadata · 1 unmodified line | ||
| 222 | 226 | 4. use dmaengine_desc_set_metadata_len() to tell the DMA engine the |
| 223 | 227 | amount of data the client has placed into the metadata buffer |
| 224 | 228 | 5. submit the transfer |
| 229 | + | |
| 225 | 230 | - DMA_DEV_TO_MEM: |
| 231 | + | |
| 226 | 232 | 1. prepare the descriptor (dmaengine_prep_*) |
| 227 | 233 | 2. submit the transfer |
| 228 | 234 | 3. on transfer completion, use dmaengine_desc_get_metadata_ptr() to get |
| @@ -278,8 +284,8 @@ Optional: per descriptor metadata · 49 unmodified lines | ||
| 278 | 284 | |
| 279 | 285 | void dma_async_issue_pending(struct dma_chan *chan); |
| 280 | 286 | |
| 281 | −Further APIs: | |
| 282 | −------------- | |
| 287 | +Further APIs | |
| 288 | +------------ | |
| 283 | 289 | |
| 284 | 290 | 1. Terminate APIs |
| 285 | 291 | |
| @@ -164,9 +164,9 @@ file. · 163 unmodified lines | ||
| 164 | 164 | void __iomem *base; |
| 165 | 165 | }; |
| 166 | 166 | |
| 167 | − struct dentry *debugfs_create_regset32(const char *name, umode_t mode, | |
| 168 | − struct dentry *parent, | |
| 169 | − struct debugfs_regset32 *regset); | |
| 167 | + debugfs_create_regset32(const char *name, umode_t mode, | |
| 168 | + struct dentry *parent, | |
| 169 | + struct debugfs_regset32 *regset); | |
| 170 | 170 | |
| 171 | 171 | void debugfs_print_regs32(struct seq_file *s, struct debugfs_reg32 *regs, |
| 172 | 172 | int nregs, void __iomem *base, char *prefix); |
| @@ -20,8 +20,7 @@ Usage Notes · 19 unmodified lines | ||
| 20 | 20 | ----------- |
| 21 | 21 | |
| 22 | 22 | This driver does not auto-detect devices. You will have to instantiate the |
| 23 | −devices explicitly. Please see Documentation/i2c/instantiating-devices for | |
| 24 | −details. | |
| 23 | +devices explicitly. Please see :doc:`/i2c/instantiating-devices` for details. | |
| 25 | 24 | |
| 26 | 25 | |
| 27 | 26 | Sysfs entries |
| @@ -693,7 +693,7 @@ ALLWINNER CPUFREQ DRIVER · 692 unmodified lines | ||
| 693 | 693 | M: Yangtao Li <tiny.windzz@gmail.com> |
| 694 | 694 | L: linux-pm@vger.kernel.org |
| 695 | 695 | S: Maintained |
| 696 | −F: Documentation/devicetree/bindings/opp/sun50i-nvmem-cpufreq.txt | |
| 696 | +F: Documentation/devicetree/bindings/opp/allwinner,sun50i-h6-operating-points.yaml | |
| 697 | 697 | F: drivers/cpufreq/sun50i-cpufreq-nvmem.c |
| 698 | 698 | |
| 699 | 699 | ALLWINNER CRYPTO DRIVERS |
| @@ -4017,7 +4017,7 @@ M: Cheng-Yi Chiang <cychiang@chromium.org> · 3317 unmodified lines | ||
| 4017 | 4017 | S: Maintained |
| 4018 | 4018 | R: Enric Balletbo i Serra <enric.balletbo@collabora.com> |
| 4019 | 4019 | R: Guenter Roeck <groeck@chromium.org> |
| 4020 | −F: Documentation/devicetree/bindings/sound/google,cros-ec-codec.txt | |
| 4020 | +F: Documentation/devicetree/bindings/sound/google,cros-ec-codec.yaml | |
| 4021 | 4021 | F: sound/soc/codecs/cros_ec_codec.* |
| 4022 | 4022 | |
| 4023 | 4023 | CIRRUS LOGIC AUDIO CODEC DRIVERS |
| @@ -4475,7 +4475,7 @@ L: linux-media@vger.kernel.org · 451 unmodified lines | ||
| 4475 | 4475 | T: git git://linuxtv.org/media_tree.git |
| 4476 | 4476 | S: Maintained |
| 4477 | 4477 | F: drivers/media/platform/sunxi/sun6i-csi/ |
| 4478 | −F: Documentation/devicetree/bindings/media/sun6i-csi.txt | |
| 4478 | +F: Documentation/devicetree/bindings/media/allwinner,sun6i-a31-csi.yaml | |
| 4479 | 4479 | |
| 4480 | 4480 | CW1200 WLAN driver |
| 4481 | 4481 | M: Solomon Peachy <pizza@shaftnet.org> |
| @@ -5668,7 +5668,7 @@ L: dri-devel@lists.freedesktop.org · 1186 unmodified lines | ||
| 5668 | 5668 | T: git git://anongit.freedesktop.org/drm/drm-misc |
| 5669 | 5669 | S: Maintained |
| 5670 | 5670 | F: drivers/gpu/drm/stm |
| 5671 | −F: Documentation/devicetree/bindings/display/st,stm32-ltdc.txt | |
| 5671 | +F: Documentation/devicetree/bindings/display/st,stm32-ltdc.yaml | |
| 5672 | 5672 | |
| 5673 | 5673 | DRM DRIVERS FOR TI LCDC |
| 5674 | 5674 | M: Jyri Sarha <jsarha@ti.com> |
| @@ -7738,7 +7738,7 @@ Hyper-V CORE AND DRIVERS · 2063 unmodified lines | ||
| 7738 | 7738 | M: "K. Y. Srinivasan" <kys@microsoft.com> |
| 7739 | 7739 | M: Haiyang Zhang <haiyangz@microsoft.com> |
| 7740 | 7740 | M: Stephen Hemminger <sthemmin@microsoft.com> |
| 7741 | −M: Sasha Levin <sashal@kernel.org> | |
| 7741 | +M: Wei Liu <wei.liu@kernel.org> | |
| 7742 | 7742 | T: git git://git.kernel.org/pub/scm/linux/kernel/git/hyperv/linux.git |
| 7743 | 7743 | L: linux-hyperv@vger.kernel.org |
| 7744 | 7744 | S: Supported |
| @@ -10164,7 +10164,7 @@ MAXBOTIX ULTRASONIC RANGER IIO DRIVER · 2419 unmodified lines | ||
| 10164 | 10164 | M: Andreas Klinger <ak@it-klinger.de> |
| 10165 | 10165 | L: linux-iio@vger.kernel.org |
| 10166 | 10166 | S: Maintained |
| 10167 | −F: Documentation/devicetree/bindings/iio/proximity/maxbotix,mb1232.txt | |
| 10167 | +F: Documentation/devicetree/bindings/iio/proximity/maxbotix,mb1232.yaml | |
| 10168 | 10168 | F: drivers/iio/proximity/mb1232.c |
| 10169 | 10169 | |
| 10170 | 10170 | MAXIM MAX77650 PMIC MFD DRIVER |
| @@ -10467,7 +10467,7 @@ M: Hugues Fruchet <hugues.fruchet@st.com> · 296 unmodified lines | ||
| 10467 | 10467 | L: linux-media@vger.kernel.org |
| 10468 | 10468 | T: git git://linuxtv.org/media_tree.git |
| 10469 | 10469 | S: Supported |
| 10470 | −F: Documentation/devicetree/bindings/media/st,stm32-dcmi.txt | |
| 10470 | +F: Documentation/devicetree/bindings/media/st,stm32-dcmi.yaml | |
| 10471 | 10471 | F: drivers/media/platform/stm32/stm32-dcmi.c |
| 10472 | 10472 | |
| 10473 | 10473 | MEDIA DRIVERS FOR NVIDIA TEGRA - VDE |
| @@ -12952,7 +12952,6 @@ M: Robert Richter <rrichter@marvell.com> · 2478 unmodified lines | ||
| 12952 | 12952 | L: linux-pci@vger.kernel.org |
| 12953 | 12953 | L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) |
| 12954 | 12954 | S: Supported |
| 12955 | −F: Documentation/devicetree/bindings/pci/pci-thunder-* | |
| 12956 | 12955 | F: drivers/pci/controller/pci-thunder-* |
| 12957 | 12956 | |
| 12958 | 12957 | PCIE DRIVER FOR HISILICON |
| @@ -14227,7 +14226,7 @@ F: include/dt-bindings/reset/ · 1268 unmodified lines | ||
| 14227 | 14226 | F: include/linux/reset.h |
| 14228 | 14227 | F: include/linux/reset/ |
| 14229 | 14228 | F: include/linux/reset-controller.h |
| 14230 | −K: \b(?:devm_|of_)?reset_control(?:ler_[a-z]+|_[a-z_]+)?\b | |
| 14229 | +K: \b(?:devm_|of_)?reset_control(?:ler_[a-z]+|_[a-z_]+)?\b | |
| 14231 | 14230 | |
| 14232 | 14231 | RESTARTABLE SEQUENCES SUPPORT |
| 14233 | 14232 | M: Mathieu Desnoyers <mathieu.desnoyers@efficios.com> |
| @@ -15922,7 +15921,7 @@ F: drivers/*/stm32-*timer* · 1688 unmodified lines | ||
| 15922 | 15921 | F: drivers/pwm/pwm-stm32* |
| 15923 | 15922 | F: include/linux/*/stm32-*tim* |
| 15924 | 15923 | F: Documentation/ABI/testing/*timer-stm32 |
| 15925 | −F: Documentation/devicetree/bindings/*/stm32-*timer* | |
| 15924 | +F: Documentation/devicetree/bindings/*/*stm32-*timer* | |
| 15926 | 15925 | F: Documentation/devicetree/bindings/pwm/pwm-stm32* |
| 15927 | 15926 | |
| 15928 | 15927 | STMMAC ETHERNET DRIVER |
| @@ -16081,6 +16080,8 @@ SYNOPSYS DESIGNWARE 8250 UART DRIVER · 152 unmodified lines | ||
| 16081 | 16080 | R: Andy Shevchenko <andriy.shevchenko@linux.intel.com> |
| 16082 | 16081 | S: Maintained |
| 16083 | 16082 | F: drivers/tty/serial/8250/8250_dw.c |
| 16083 | +F: drivers/tty/serial/8250/8250_dwlib.* | |
| 16084 | +F: drivers/tty/serial/8250/8250_lpss.c | |
| 16084 | 16085 | |
| 16085 | 16086 | SYNOPSYS DESIGNWARE APB GPIO DRIVER |
| 16086 | 16087 | M: Hoan Tran <hoan@os.amperecomputing.com> |
| @@ -2,7 +2,7 @@ · 1 unmodified line | ||
| 2 | 2 | VERSION = 5 |
| 3 | 3 | PATCHLEVEL = 6 |
| 4 | 4 | SUBLEVEL = 0 |
| 5 | −EXTRAVERSION = -rc4 | |
| 5 | +EXTRAVERSION = -rc5 | |
| 6 | 6 | NAME = Kleptomaniac Octopus |
| 7 | 7 | |
| 8 | 8 | # *DOCUMENTATION* |
| @@ -738,8 +738,9 @@ config HAVE_STACK_VALIDATION · 737 unmodified lines | ||
| 738 | 738 | config HAVE_RELIABLE_STACKTRACE |
| 739 | 739 | bool |
| 740 | 740 | help |
| 741 | − Architecture has a save_stack_trace_tsk_reliable() function which | |
| 742 | − only returns a stack trace if it can guarantee the trace is reliable. | |
| 741 | + Architecture has either save_stack_trace_tsk_reliable() or | |
| 742 | + arch_stack_walk_reliable() function which only returns a stack trace | |
| 743 | + if it can guarantee the trace is reliable. | |
| 743 | 744 | |
| 744 | 745 | config HAVE_ARCH_HASH |
| 745 | 746 | bool |
| @@ -526,11 +526,11 @@ · 525 unmodified lines | ||
| 526 | 526 | * Supply voltage supervisor on board will not allow opp50 so |
| 527 | 527 | * disable it and set opp100 as suspend OPP. |
| 528 | 528 | */ |
| 529 | − opp50@300000000 { | |
| 529 | + opp50-300000000 { | |
| 530 | 530 | status = "disabled"; |
| 531 | 531 | }; |
| 532 | 532 | |
| 533 | − opp100@600000000 { | |
| 533 | + opp100-600000000 { | |
| 534 | 534 | opp-suspend; |
| 535 | 535 | }; |
| 536 | 536 | }; |
| @@ -21,6 +21,7 @@ · 20 unmodified lines | ||
| 21 | 21 | |
| 22 | 22 | aliases { |
| 23 | 23 | ethernet0 = &genet; |
| 24 | + pcie0 = &pcie0; | |
| 24 | 25 | }; |
| 25 | 26 | |
| 26 | 27 | leds { |
| @@ -31,6 +32,8 @@ · 4 unmodified lines | ||
| 31 | 32 | pwr { |
| 32 | 33 | label = "PWR"; |
| 33 | 34 | gpios = <&expgpio 2 GPIO_ACTIVE_LOW>; |
| 35 | + default-state = "keep"; | |
| 36 | + linux,default-trigger = "default-on"; | |
| 34 | 37 | }; |
| 35 | 38 | }; |
| 36 | 39 | |
| @@ -26,6 +26,8 @@ · 25 unmodified lines | ||
| 26 | 26 | pwr { |
| 27 | 27 | label = "PWR"; |
| 28 | 28 | gpios = <&expgpio 2 GPIO_ACTIVE_LOW>; |
| 29 | + default-state = "keep"; | |
| 30 | + linux,default-trigger = "default-on"; | |
| 29 | 31 | }; |
| 30 | 32 | }; |
| 31 | 33 | }; |
| @@ -27,6 +27,8 @@ · 26 unmodified lines | ||
| 27 | 27 | pwr { |
| 28 | 28 | label = "PWR"; |
| 29 | 29 | gpios = <&expgpio 2 GPIO_ACTIVE_LOW>; |
| 30 | + default-state = "keep"; | |
| 31 | + linux,default-trigger = "default-on"; | |
| 30 | 32 | }; |
| 31 | 33 | }; |
| 32 | 34 | |
| @@ -61,10 +61,10 @@ · 60 unmodified lines | ||
| 61 | 61 | regulator-max-microvolt = <1800000>; |
| 62 | 62 | }; |
| 63 | 63 | |
| 64 | − evm_3v3: fixedregulator-evm3v3 { | |
| 64 | + vsys_3v3: fixedregulator-vsys3v3 { | |
| 65 | 65 | /* Output of Cntlr A of TPS43351-Q1 on dra7-evm */ |
| 66 | 66 | compatible = "regulator-fixed"; |
| 67 | − regulator-name = "evm_3v3"; | |
| 67 | + regulator-name = "vsys_3v3"; | |
| 68 | 68 | regulator-min-microvolt = <3300000>; |
| 69 | 69 | regulator-max-microvolt = <3300000>; |
| 70 | 70 | vin-supply = <&evm_12v0>; |
| @@ -3474,6 +3474,7 @@ · 3473 unmodified lines | ||
| 3474 | 3474 | clocks = <&l4per3_clkctrl DRA7_L4PER3_TIMER13_CLKCTRL 24>; |
| 3475 | 3475 | clock-names = "fck"; |
| 3476 | 3476 | interrupts = <GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>; |
| 3477 | + ti,timer-pwm; | |
| 3477 | 3478 | }; |
| 3478 | 3479 | }; |
| 3479 | 3480 | |
| @@ -3501,6 +3502,7 @@ · 21 unmodified lines | ||
| 3501 | 3502 | clocks = <&l4per3_clkctrl DRA7_L4PER3_TIMER14_CLKCTRL 24>; |
| 3502 | 3503 | clock-names = "fck"; |
| 3503 | 3504 | interrupts = <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>; |
| 3505 | + ti,timer-pwm; | |
| 3504 | 3506 | }; |
| 3505 | 3507 | }; |
| 3506 | 3508 | |
| @@ -3528,6 +3530,7 @@ · 21 unmodified lines | ||
| 3528 | 3530 | clocks = <&l4per3_clkctrl DRA7_L4PER3_TIMER15_CLKCTRL 24>; |
| 3529 | 3531 | clock-names = "fck"; |
| 3530 | 3532 | interrupts = <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>; |
| 3533 | + ti,timer-pwm; | |
| 3531 | 3534 | }; |
| 3532 | 3535 | }; |
| 3533 | 3536 | |
| @@ -3555,6 +3558,7 @@ · 21 unmodified lines | ||
| 3555 | 3558 | clocks = <&l4per3_clkctrl DRA7_L4PER3_TIMER16_CLKCTRL 24>; |
| 3556 | 3559 | clock-names = "fck"; |
| 3557 | 3560 | interrupts = <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>; |
| 3561 | + ti,timer-pwm; | |
| 3558 | 3562 | }; |
| 3559 | 3563 | }; |
| 3560 | 3564 | |
| @@ -184,6 +184,7 @@ · 183 unmodified lines | ||
| 184 | 184 | device_type = "pci"; |
| 185 | 185 | ranges = <0x81000000 0 0 0x03000 0 0x00010000 |
| 186 | 186 | 0x82000000 0 0x20013000 0x13000 0 0xffed000>; |
| 187 | + dma-ranges = <0x02000000 0x0 0x00000000 0x00000000 0x1 0x00000000>; | |
| 187 | 188 | bus-range = <0x00 0xff>; |
| 188 | 189 | #interrupt-cells = <1>; |
| 189 | 190 | num-lanes = <1>; |
| @@ -238,6 +239,7 @@ · 48 unmodified lines | ||
| 238 | 239 | device_type = "pci"; |
| 239 | 240 | ranges = <0x81000000 0 0 0x03000 0 0x00010000 |
| 240 | 241 | 0x82000000 0 0x30013000 0x13000 0 0xffed000>; |
| 242 | + dma-ranges = <0x02000000 0x0 0x00000000 0x00000000 0x1 0x00000000>; | |
| 241 | 243 | bus-range = <0x00 0xff>; |
| 242 | 244 | #interrupt-cells = <1>; |
| 243 | 245 | num-lanes = <1>; |
| @@ -128,3 +128,8 @@ · 127 unmodified lines | ||
| 128 | 128 | &usb4_tm { |
| 129 | 129 | status = "disabled"; |
| 130 | 130 | }; |
| 131 | + | |
| 132 | +&mmc3 { | |
| 133 | + /* dra76x is not affected by i887 */ | |
| 134 | + max-frequency = <96000000>; | |
| 135 | +}; | |
| @@ -796,16 +796,6 @@ · 795 unmodified lines | ||
| 796 | 796 | clock-div = <1>; |
| 797 | 797 | }; |
| 798 | 798 | |
| 799 | − ipu1_gfclk_mux: ipu1_gfclk_mux@520 { | |
| 800 | − #clock-cells = <0>; | |
| 801 | − compatible = "ti,mux-clock"; | |
| 802 | − clocks = <&dpll_abe_m2x2_ck>, <&dpll_core_h22x2_ck>; | |
| 803 | − ti,bit-shift = <24>; | |
| 804 | − reg = <0x0520>; | |
| 805 | − assigned-clocks = <&ipu1_gfclk_mux>; | |
| 806 | − assigned-clock-parents = <&dpll_core_h22x2_ck>; | |
| 807 | − }; | |
| 808 | − | |
| 809 | 799 | dummy_ck: dummy_ck { |
| 810 | 800 | #clock-cells = <0>; |
| 811 | 801 | compatible = "fixed-clock"; |
| @@ -1564,6 +1554,8 @@ · 752 unmodified lines | ||
| 1564 | 1554 | compatible = "ti,clkctrl"; |
| 1565 | 1555 | reg = <0x20 0x4>; |
| 1566 | 1556 | #clock-cells = <2>; |
| 1557 | + assigned-clocks = <&ipu1_clkctrl DRA7_IPU1_MMU_IPU1_CLKCTRL 24>; | |
| 1558 | + assigned-clock-parents = <&dpll_core_h22x2_ck>; | |
| 1567 | 1559 | }; |
| 1568 | 1560 | |
| 1569 | 1561 | ipu_clkctrl: ipu-clkctrl@50 { |
| @@ -275,7 +275,7 @@ · 274 unmodified lines | ||
| 275 | 275 | |
| 276 | 276 | /* SRAM on Colibri nEXT_CS0 */ |
| 277 | 277 | sram@0,0 { |
| 278 | − compatible = "cypress,cy7c1019dv33-10zsxi, mtd-ram"; | |
| 278 | + compatible = "cypress,cy7c1019dv33-10zsxi", "mtd-ram"; | |
| 279 | 279 | reg = <0 0 0x00010000>; |
| 280 | 280 | #address-cells = <1>; |
| 281 | 281 | #size-cells = <1>; |
| @@ -286,7 +286,7 @@ · 4 unmodified lines | ||
| 286 | 286 | |
| 287 | 287 | /* SRAM on Colibri nEXT_CS1 */ |
| 288 | 288 | sram@1,0 { |
| 289 | − compatible = "cypress,cy7c1019dv33-10zsxi, mtd-ram"; | |
| 289 | + compatible = "cypress,cy7c1019dv33-10zsxi", "mtd-ram"; | |
| 290 | 290 | reg = <1 0 0x00010000>; |
| 291 | 291 | #address-cells = <1>; |
| 292 | 292 | #size-cells = <1>; |
| @@ -192,7 +192,6 @@ · 191 unmodified lines | ||
| 192 | 192 | pinctrl-0 = <&pinctrl_usdhc4>; |
| 193 | 193 | bus-width = <8>; |
| 194 | 194 | non-removable; |
| 195 | − vmmc-supply = <&vdd_emmc_1p8>; | |
| 196 | 195 | status = "disabled"; |
| 197 | 196 | }; |
| 198 | 197 | |
| @@ -336,7 +336,6 @@ · 335 unmodified lines | ||
| 336 | 336 | assigned-clock-rates = <400000000>; |
| 337 | 337 | bus-width = <8>; |
| 338 | 338 | fsl,tuning-step = <2>; |
| 339 | − max-frequency = <100000000>; | |
| 340 | 339 | vmmc-supply = <®_module_3v3>; |
| 341 | 340 | vqmmc-supply = <®_DCDC3>; |
| 342 | 341 | non-removable; |
| @@ -44,7 +44,7 @@ · 43 unmodified lines | ||
| 44 | 44 | opp-hz = /bits/ 64 <792000000>; |
| 45 | 45 | opp-microvolt = <1000000>; |
| 46 | 46 | clock-latency-ns = <150000>; |
| 47 | − opp-supported-hw = <0xd>, <0xf>; | |
| 47 | + opp-supported-hw = <0xd>, <0x7>; | |
| 48 | 48 | opp-suspend; |
| 49 | 49 | }; |
| 50 | 50 | |
| @@ -52,7 +52,7 @@ · 1 unmodified line | ||
| 52 | 52 | opp-hz = /bits/ 64 <996000000>; |
| 53 | 53 | opp-microvolt = <1100000>; |
| 54 | 54 | clock-latency-ns = <150000>; |
| 55 | − opp-supported-hw = <0xc>, <0xf>; | |
| 55 | + opp-supported-hw = <0xc>, <0x7>; | |
| 56 | 56 | opp-suspend; |
| 57 | 57 | }; |
| 58 | 58 | |
| @@ -60,7 +60,7 @@ · 1 unmodified line | ||
| 60 | 60 | opp-hz = /bits/ 64 <1200000000>; |
| 61 | 61 | opp-microvolt = <1225000>; |
| 62 | 62 | clock-latency-ns = <150000>; |
| 63 | − opp-supported-hw = <0x8>, <0xf>; | |
| 63 | + opp-supported-hw = <0x8>, <0x3>; | |
| 64 | 64 | opp-suspend; |
| 65 | 65 | }; |
| 66 | 66 | }; |
| @@ -747,7 +747,7 @@ · 746 unmodified lines | ||
| 747 | 747 | }; |
| 748 | 748 | |
| 749 | 749 | mdio0: mdio@2d24000 { |
| 750 | − compatible = "fsl,etsec2-mdio"; | |
| 750 | + compatible = "gianfar"; | |
| 751 | 751 | device_type = "mdio"; |
| 752 | 752 | #address-cells = <1>; |
| 753 | 753 | #size-cells = <0>; |
| @@ -756,7 +756,7 @@ · 2 unmodified lines | ||
| 756 | 756 | }; |
| 757 | 757 | |
| 758 | 758 | mdio1: mdio@2d64000 { |
| 759 | − compatible = "fsl,etsec2-mdio"; | |
| 759 | + compatible = "gianfar"; | |
| 760 | 760 | device_type = "mdio"; |
| 761 | 761 | #address-cells = <1>; |
| 762 | 762 | #size-cells = <0>; |
| @@ -182,6 +182,14 @@ · 181 unmodified lines | ||
| 182 | 182 | pwm-names = "enable", "direction"; |
| 183 | 183 | direction-duty-cycle-ns = <10000000>; |
| 184 | 184 | }; |
| 185 | + | |
| 186 | + backlight: backlight { | |
| 187 | + compatible = "led-backlight"; | |
| 188 | + | |
| 189 | + leds = <&backlight_led>; | |
| 190 | + brightness-levels = <31 63 95 127 159 191 223 255>; | |
| 191 | + default-brightness-level = <6>; | |
| 192 | + }; | |
| 185 | 193 | }; |
| 186 | 194 | |
| 187 | 195 | &dss { |
| @@ -205,6 +213,8 @@ · 17 unmodified lines | ||
| 205 | 213 | vddi-supply = <&lcd_regulator>; |
| 206 | 214 | reset-gpios = <&gpio4 5 GPIO_ACTIVE_HIGH>; /* gpio101 */ |
| 207 | 215 | |
| 216 | + backlight = <&backlight>; | |
| 217 | + | |
| 208 | 218 | width-mm = <50>; |
| 209 | 219 | height-mm = <89>; |
| 210 | 220 | |
| @@ -393,12 +403,11 @@ · 182 unmodified lines | ||
| 393 | 403 | ramp-up-us = <1024>; |
| 394 | 404 | ramp-down-us = <8193>; |
| 395 | 405 | |
| 396 | − led@0 { | |
| 406 | + backlight_led: led@0 { | |
| 397 | 407 | reg = <0>; |
| 398 | 408 | led-sources = <2>; |
| 399 | 409 | ti,led-mode = <0>; |
| 400 | 410 | label = ":backlight"; |
| 401 | − linux,default-trigger = "backlight"; | |
| 402 | 411 | }; |
| 403 | 412 | |
| 404 | 413 | led@1 { |
| @@ -377,7 +377,7 @@ · 376 unmodified lines | ||
| 377 | 377 | }; |
| 378 | 378 | |
| 379 | 379 | sata: sata@fc600000 { |
| 380 | − compatible = "renesas,sata-r8a7779", "renesas,rcar-sata"; | |
| 380 | + compatible = "renesas,sata-r8a7779"; | |
| 381 | 381 | reg = <0xfc600000 0x200000>; |
| 382 | 382 | interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>; |
| 383 | 383 | clocks = <&mstp1_clks R8A7779_CLK_SATA>; |
| @@ -178,6 +178,7 @@ CONFIG_SCHED_TRACER=y · 177 unmodified lines | ||
| 178 | 178 | CONFIG_STACK_TRACER=y |
| 179 | 179 | CONFIG_FUNCTION_PROFILER=y |
| 180 | 180 | CONFIG_TEST_KSTRTOX=y |
| 181 | +CONFIG_DEBUG_FS=y | |
| 181 | 182 | CONFIG_KGDB=y |
| 182 | 183 | CONFIG_KGDB_KDB=y |
| 183 | 184 | CONFIG_STRICT_DEVMEM=y |
| @@ -375,6 +375,7 @@ CONFIG_BACKLIGHT_GENERIC=m · 374 unmodified lines | ||
| 375 | 375 | CONFIG_BACKLIGHT_PWM=m |
| 376 | 376 | CONFIG_BACKLIGHT_PANDORA=m |
| 377 | 377 | CONFIG_BACKLIGHT_GPIO=m |
| 378 | +CONFIG_BACKLIGHT_LED=m | |
| 378 | 379 | CONFIG_FRAMEBUFFER_CONSOLE=y |
| 379 | 380 | CONFIG_FRAMEBUFFER_CONSOLE_ROTATION=y |
| 380 | 381 | CONFIG_LOGO=y |
| @@ -157,6 +157,7 @@ CONFIG_NLS_ISO8859_1=y · 156 unmodified lines | ||
| 157 | 157 | CONFIG_PRINTK_TIME=y |
| 158 | 158 | CONFIG_DEBUG_INFO=y |
| 159 | 159 | CONFIG_MAGIC_SYSRQ=y |
| 160 | +CONFIG_DEBUG_FS=y | |
| 160 | 161 | CONFIG_DETECT_HUNG_TASK=y |
| 161 | 162 | # CONFIG_SCHED_DEBUG is not set |
| 162 | 163 | CONFIG_FUNCTION_TRACER=y |
| @@ -91,6 +91,8 @@ AFLAGS_suspend-imx6.o :=-Wa,-march=armv7-a · 90 unmodified lines | ||
| 91 | 91 | obj-$(CONFIG_SOC_IMX6) += suspend-imx6.o |
| 92 | 92 | obj-$(CONFIG_SOC_IMX53) += suspend-imx53.o |
| 93 | 93 | endif |
| 94 | +AFLAGS_resume-imx6.o :=-Wa,-march=armv7-a | |
| 95 | +obj-$(CONFIG_SOC_IMX6) += resume-imx6.o | |
| 94 | 96 | obj-$(CONFIG_SOC_IMX6) += pm-imx6.o |
| 95 | 97 | |
| 96 | 98 | obj-$(CONFIG_SOC_IMX1) += mach-imx1.o |
| @@ -109,17 +109,17 @@ void imx_cpu_die(unsigned int cpu); · 108 unmodified lines | ||
| 109 | 109 | int imx_cpu_kill(unsigned int cpu); |
| 110 | 110 | |
| 111 | 111 | #ifdef CONFIG_SUSPEND |
| 112 | −void v7_cpu_resume(void); | |
| 113 | 112 | void imx53_suspend(void __iomem *ocram_vbase); |
| 114 | 113 | extern const u32 imx53_suspend_sz; |
| 115 | 114 | void imx6_suspend(void __iomem *ocram_vbase); |
| 116 | 115 | #else |
| 117 | −static inline void v7_cpu_resume(void) {} | |
| 118 | 116 | static inline void imx53_suspend(void __iomem *ocram_vbase) {} |
| 119 | 117 | static const u32 imx53_suspend_sz; |
| 120 | 118 | static inline void imx6_suspend(void __iomem *ocram_vbase) {} |
| 121 | 119 | #endif |
| 122 | 120 | |
| 121 | +void v7_cpu_resume(void); | |
| 122 | + | |
| 123 | 123 | void imx6_pm_ccm_init(const char *ccm_compat); |
| 124 | 124 | void imx6q_pm_init(void); |
| 125 | 125 | void imx6dl_pm_init(void); |
| @@ -0,0 +1,24 @@ | ||
| 1 | +/* SPDX-License-Identifier: GPL-2.0-or-later */ | |
| 2 | +/* | |
| 3 | + * Copyright 2014 Freescale Semiconductor, Inc. | |
| 4 | + */ | |
| 5 | + | |
| 6 | +#include <linux/linkage.h> | |
| 7 | +#include <asm/assembler.h> | |
| 8 | +#include <asm/asm-offsets.h> | |
| 9 | +#include <asm/hardware/cache-l2x0.h> | |
| 10 | +#include "hardware.h" | |
| 11 | + | |
| 12 | +/* | |
| 13 | + * The following code must assume it is running from physical address | |
| 14 | + * where absolute virtual addresses to the data section have to be | |
| 15 | + * turned into relative ones. | |
| 16 | + */ | |
| 17 | + | |
| 18 | +ENTRY(v7_cpu_resume) | |
| 19 | + bl v7_invalidate_l1 | |
| 20 | +#ifdef CONFIG_CACHE_L2X0 | |
| 21 | + bl l2c310_early_resume | |
| 22 | +#endif | |
| 23 | + b cpu_resume | |
| 24 | +ENDPROC(v7_cpu_resume) | |
| @@ -327,17 +327,3 @@ resume: · 326 unmodified lines | ||
| 327 | 327 | |
| 328 | 328 | ret lr |
| 329 | 329 | ENDPROC(imx6_suspend) |
| 330 | − | |
| 331 | −/* | |
| 332 | − * The following code must assume it is running from physical address | |
| 333 | − * where absolute virtual addresses to the data section have to be | |
| 334 | − * turned into relative ones. | |
| 335 | − */ | |
| 336 | − | |
| 337 | −ENTRY(v7_cpu_resume) | |
| 338 | − bl v7_invalidate_l1 | |
| 339 | −#ifdef CONFIG_CACHE_L2X0 | |
| 340 | − bl l2c310_early_resume | |
| 341 | −#endif | |
| 342 | − b cpu_resume | |
| 343 | −ENDPROC(v7_cpu_resume) | |
| @@ -9,7 +9,6 @@ menuconfig ARCH_MESON · 8 unmodified lines | ||
| 9 | 9 | select CACHE_L2X0 |
| 10 | 10 | select PINCTRL |
| 11 | 11 | select PINCTRL_MESON |
| 12 | − select COMMON_CLK | |
| 13 | 12 | select HAVE_ARM_SCU if SMP |
| 14 | 13 | select HAVE_ARM_TWD if SMP |
| 15 | 14 | |
| @@ -16,7 +16,7 @@ hwmod-common = omap_hwmod.o omap_hwmod_reset.o \ · 15 unmodified lines | ||
| 16 | 16 | clock-common = clock.o |
| 17 | 17 | secure-common = omap-smc.o omap-secure.o |
| 18 | 18 | |
| 19 | −obj-$(CONFIG_ARCH_OMAP2) += $(omap-2-3-common) $(hwmod-common) $(secure-common) | |
| 19 | +obj-$(CONFIG_ARCH_OMAP2) += $(omap-2-3-common) $(hwmod-common) | |
| 20 | 20 | obj-$(CONFIG_ARCH_OMAP3) += $(omap-2-3-common) $(hwmod-common) $(secure-common) |
| 21 | 21 | obj-$(CONFIG_ARCH_OMAP4) += $(hwmod-common) $(secure-common) |
| 22 | 22 | obj-$(CONFIG_SOC_AM33XX) += $(hwmod-common) $(secure-common) |
| @@ -431,7 +431,6 @@ void __init omap2420_init_early(void) · 430 unmodified lines | ||
| 431 | 431 | omap_hwmod_init_postsetup(); |
| 432 | 432 | omap_clk_soc_init = omap2420_dt_clk_init; |
| 433 | 433 | rate_table = omap2420_rate_table; |
| 434 | − omap_secure_init(); | |
| 435 | 434 | } |
| 436 | 435 | |
| 437 | 436 | void __init omap2420_init_late(void) |
| @@ -456,7 +455,6 @@ void __init omap2430_init_early(void) · 18 unmodified lines | ||
| 456 | 455 | omap_hwmod_init_postsetup(); |
| 457 | 456 | omap_clk_soc_init = omap2430_dt_clk_init; |
| 458 | 457 | rate_table = omap2430_rate_table; |
| 459 | − omap_secure_init(); | |
| 460 | 458 | } |
| 461 | 459 | |
| 462 | 460 | void __init omap2430_init_late(void) |
| @@ -327,7 +327,7 @@ · 326 unmodified lines | ||
| 327 | 327 | #size-cells = <0>; |
| 328 | 328 | |
| 329 | 329 | bus-width = <4>; |
| 330 | − max-frequency = <50000000>; | |
| 330 | + max-frequency = <60000000>; | |
| 331 | 331 | |
| 332 | 332 | non-removable; |
| 333 | 333 | disable-wp; |
| @@ -593,6 +593,7 @@ · 592 unmodified lines | ||
| 593 | 593 | compatible = "brcm,bcm43438-bt"; |
| 594 | 594 | interrupt-parent = <&gpio_intc>; |
| 595 | 595 | interrupts = <95 IRQ_TYPE_LEVEL_HIGH>; |
| 596 | + interrupt-names = "host-wakeup"; | |
| 596 | 597 | shutdown-gpios = <&gpio GPIOX_17 GPIO_ACTIVE_HIGH>; |
| 597 | 598 | max-speed = <2000000>; |
| 598 | 599 | clocks = <&wifi32k>; |
| @@ -52,11 +52,6 @@ · 51 unmodified lines | ||
| 52 | 52 | compatible = "ethernet-phy-ieee802.3-c22"; |
| 53 | 53 | reg = <0>; |
| 54 | 54 | }; |
| 55 | − | |
| 56 | − ethphy1: ethernet-phy@1 { | |
| 57 | − compatible = "ethernet-phy-ieee802.3-c22"; | |
| 58 | − reg = <1>; | |
| 59 | − }; | |
| 60 | 55 | }; |
| 61 | 56 | }; |
| 62 | 57 | |
| @@ -102,7 +102,7 @@ · 101 unmodified lines | ||
| 102 | 102 | }; |
| 103 | 103 | |
| 104 | 104 | gmac0: ethernet@ff800000 { |
| 105 | − compatible = "altr,socfpga-stmmac", "snps,dwmac-3.74a", "snps,dwmac"; | |
| 105 | + compatible = "altr,socfpga-stmmac-a10-s10", "snps,dwmac-3.74a", "snps,dwmac"; | |
| 106 | 106 | reg = <0xff800000 0x2000>; |
| 107 | 107 | interrupts = <0 90 4>; |
| 108 | 108 | interrupt-names = "macirq"; |
| @@ -118,7 +118,7 @@ · 9 unmodified lines | ||
| 118 | 118 | }; |
| 119 | 119 | |
| 120 | 120 | gmac1: ethernet@ff802000 { |
| 121 | − compatible = "altr,socfpga-stmmac", "snps,dwmac-3.74a", "snps,dwmac"; | |
| 121 | + compatible = "altr,socfpga-stmmac-a10-s10", "snps,dwmac-3.74a", "snps,dwmac"; | |
| 122 | 122 | reg = <0xff802000 0x2000>; |
| 123 | 123 | interrupts = <0 91 4>; |
| 124 | 124 | interrupt-names = "macirq"; |
| @@ -134,7 +134,7 @@ · 9 unmodified lines | ||
| 134 | 134 | }; |
| 135 | 135 | |
| 136 | 136 | gmac2: ethernet@ff804000 { |
| 137 | − compatible = "altr,socfpga-stmmac", "snps,dwmac-3.74a", "snps,dwmac"; | |
| 137 | + compatible = "altr,socfpga-stmmac-a10-s10", "snps,dwmac-3.74a", "snps,dwmac"; | |
| 138 | 138 | reg = <0xff804000 0x2000>; |
| 139 | 139 | interrupts = <0 92 4>; |
| 140 | 140 | interrupt-names = "macirq"; |
| @@ -773,7 +773,7 @@ CONFIG_ARCH_R8A774A1=y · 772 unmodified lines | ||
| 773 | 773 | CONFIG_ARCH_R8A774B1=y |
| 774 | 774 | CONFIG_ARCH_R8A774C0=y |
| 775 | 775 | CONFIG_ARCH_R8A7795=y |
| 776 | −CONFIG_ARCH_R8A7796=y | |
| 776 | +CONFIG_ARCH_R8A77960=y | |
| 777 | 777 | CONFIG_ARCH_R8A77961=y |
| 778 | 778 | CONFIG_ARCH_R8A77965=y |
| 779 | 779 | CONFIG_ARCH_R8A77970=y |
| @@ -260,14 +260,26 @@ asmlinkage void post_ttbr_update_workaround(void) · 259 unmodified lines | ||
| 260 | 260 | CONFIG_CAVIUM_ERRATUM_27456)); |
| 261 | 261 | } |
| 262 | 262 | |
| 263 | −static int asids_init(void) | |
| 263 | +static int asids_update_limit(void) | |
| 264 | 264 | { |
| 265 | − asid_bits = get_cpu_asid_bits(); | |
| 265 | + unsigned long num_available_asids = NUM_USER_ASIDS; | |
| 266 | + | |
| 267 | + if (arm64_kernel_unmapped_at_el0()) | |
| 268 | + num_available_asids /= 2; | |
| 266 | 269 | /* |
| 267 | 270 | * Expect allocation after rollover to fail if we don't have at least |
| 268 | 271 | * one more ASID than CPUs. ASID #0 is reserved for init_mm. |
| 269 | 272 | */ |
| 270 | − WARN_ON(NUM_USER_ASIDS - 1 <= num_possible_cpus()); | |
| 273 | + WARN_ON(num_available_asids - 1 <= num_possible_cpus()); | |
| 274 | + pr_info("ASID allocator initialised with %lu entries\n", | |
| 275 | + num_available_asids); | |
| 276 | + return 0; | |
| 277 | +} | |
| 278 | +arch_initcall(asids_update_limit); | |
| 279 | + | |
| 280 | +static int asids_init(void) | |
| 281 | +{ | |
| 282 | + asid_bits = get_cpu_asid_bits(); | |
| 271 | 283 | atomic64_set(&asid_generation, ASID_FIRST_VERSION); |
| 272 | 284 | asid_map = kcalloc(BITS_TO_LONGS(NUM_USER_ASIDS), sizeof(*asid_map), |
| 273 | 285 | GFP_KERNEL); |
| @@ -282,8 +294,6 @@ static int asids_init(void) · 8 unmodified lines | ||
| 282 | 294 | */ |
| 283 | 295 | if (IS_ENABLED(CONFIG_UNMAP_KERNEL_AT_EL0)) |
| 284 | 296 | set_kpti_asid_bits(); |
| 285 | − | |
| 286 | − pr_info("ASID allocator initialised with %lu entries\n", NUM_USER_ASIDS); | |
| 287 | 297 | return 0; |
| 288 | 298 | } |
| 289 | 299 | early_initcall(asids_init); |
| @@ -2193,11 +2193,13 @@ static struct cpu_spec * __init setup_cpu_spec(unsigned long offset, · 2192 unmodified lines | ||
| 2193 | 2193 | * oprofile_cpu_type already has a value, then we are |
| 2194 | 2194 | * possibly overriding a real PVR with a logical one, |
| 2195 | 2195 | * and, in that case, keep the current value for |
| 2196 | − * oprofile_cpu_type. | |
| 2196 | + * oprofile_cpu_type. Futhermore, let's ensure that the | |
| 2197 | + * fix for the PMAO bug is enabled on compatibility mode. | |
| 2197 | 2198 | */ |
| 2198 | 2199 | if (old.oprofile_cpu_type != NULL) { |
| 2199 | 2200 | t->oprofile_cpu_type = old.oprofile_cpu_type; |
| 2200 | 2201 | t->oprofile_type = old.oprofile_type; |
| 2202 | + t->cpu_features |= old.cpu_features & CPU_FTR_PMAO_BUG; | |
| 2201 | 2203 | } |
| 2202 | 2204 | } |
| 2203 | 2205 | |
| @@ -331,11 +331,13 @@ int hw_breakpoint_handler(struct die_args *args) · 330 unmodified lines | ||
| 331 | 331 | } |
| 332 | 332 | |
| 333 | 333 | info->type &= ~HW_BRK_TYPE_EXTRANEOUS_IRQ; |
| 334 | − if (!dar_within_range(regs->dar, info)) | |
| 335 | − info->type |= HW_BRK_TYPE_EXTRANEOUS_IRQ; | |
| 336 | − | |
| 337 | − if (!IS_ENABLED(CONFIG_PPC_8xx) && !stepping_handler(regs, bp, info)) | |
| 338 | − goto out; | |
| 334 | + if (IS_ENABLED(CONFIG_PPC_8xx)) { | |
| 335 | + if (!dar_within_range(regs->dar, info)) | |
| 336 | + info->type |= HW_BRK_TYPE_EXTRANEOUS_IRQ; | |
| 337 | + } else { | |
| 338 | + if (!stepping_handler(regs, bp, info)) | |
| 339 | + goto out; | |
| 340 | + } | |
| 339 | 341 | |
| 340 | 342 | /* |
| 341 | 343 | * As a policy, the callback is invoked in a 'trigger-after-execute' |
| @@ -303,6 +303,12 @@ SECTIONS · 302 unmodified lines | ||
| 303 | 303 | *(.branch_lt) |
| 304 | 304 | } |
| 305 | 305 | |
| 306 | +#ifdef CONFIG_DEBUG_INFO_BTF | |
| 307 | + .BTF : AT(ADDR(.BTF) - LOAD_OFFSET) { | |
| 308 | + *(.BTF) | |
| 309 | + } | |
| 310 | +#endif | |
| 311 | + | |
| 306 | 312 | .opd : AT(ADDR(.opd) - LOAD_OFFSET) { |
| 307 | 313 | __start_opd = .; |
| 308 | 314 | KEEP(*(.opd)) |
| @@ -373,7 +373,9 @@ static inline bool flush_coherent_icache(unsigned long addr) · 372 unmodified lines | ||
| 373 | 373 | */ |
| 374 | 374 | if (cpu_has_feature(CPU_FTR_COHERENT_ICACHE)) { |
| 375 | 375 | mb(); /* sync */ |
| 376 | + allow_read_from_user((const void __user *)addr, L1_CACHE_BYTES); | |
| 376 | 377 | icbi((void *)addr); |
| 378 | + prevent_read_from_user((const void __user *)addr, L1_CACHE_BYTES); | |
| 377 | 379 | mb(); /* sync */ |
| 378 | 380 | isync(); |
| 379 | 381 | return true; |
| @@ -121,6 +121,7 @@ config ARCH_FLATMEM_ENABLE · 120 unmodified lines | ||
| 121 | 121 | |
| 122 | 122 | config ARCH_SPARSEMEM_ENABLE |
| 123 | 123 | def_bool y |
| 124 | + depends on MMU | |
| 124 | 125 | select SPARSEMEM_VMEMMAP_ENABLE |
| 125 | 126 | |
| 126 | 127 | config ARCH_SELECT_MEMORY_MODEL |
| @@ -10,4 +10,28 @@ config SOC_SIFIVE · 9 unmodified lines | ||
| 10 | 10 | help |
| 11 | 11 | This enables support for SiFive SoC platform hardware. |
| 12 | 12 | |
| 13 | +config SOC_VIRT | |
| 14 | + bool "QEMU Virt Machine" | |
| 15 | + select VIRTIO_PCI | |
| 16 | + select VIRTIO_BALLOON | |
| 17 | + select VIRTIO_MMIO | |
| 18 | + select VIRTIO_CONSOLE | |
| 19 | + select VIRTIO_NET | |
| 20 | + select NET_9P_VIRTIO | |
| 21 | + select VIRTIO_BLK | |
| 22 | + select SCSI_VIRTIO | |
| 23 | + select DRM_VIRTIO_GPU | |
| 24 | + select HW_RANDOM_VIRTIO | |
| 25 | + select RPMSG_CHAR | |
| 26 | + select RPMSG_VIRTIO | |
| 27 | + select CRYPTO_DEV_VIRTIO | |
| 28 | + select VIRTIO_INPUT | |
| 29 | + select POWER_RESET_SYSCON | |
| 30 | + select POWER_RESET_SYSCON_POWEROFF | |
| 31 | + select GOLDFISH | |
| 32 | + select RTC_DRV_GOLDFISH | |
| 33 | + select SIFIVE_PLIC | |
| 34 | + help | |
| 35 | + This enables support for QEMU Virt Machine. | |
| 36 | + | |
| 13 | 37 | endmenu |
| @@ -13,8 +13,10 @@ LDFLAGS_vmlinux := · 12 unmodified lines | ||
| 13 | 13 | ifeq ($(CONFIG_DYNAMIC_FTRACE),y) |
| 14 | 14 | LDFLAGS_vmlinux := --no-relax |
| 15 | 15 | endif |
| 16 | −KBUILD_AFLAGS_MODULE += -fPIC | |
| 17 | −KBUILD_CFLAGS_MODULE += -fPIC | |
| 16 | + | |
| 17 | +ifeq ($(CONFIG_64BIT)$(CONFIG_CMODEL_MEDLOW),yy) | |
| 18 | +KBUILD_CFLAGS_MODULE += -mcmodel=medany | |
| 19 | +endif | |
| 18 | 20 | |
| 19 | 21 | export BITS |
| 20 | 22 | ifeq ($(CONFIG_ARCH_RV64I),y) |
| @@ -2,6 +2,7 @@ · 1 unmodified line | ||
| 2 | 2 | /* Copyright (c) 2018-2019 SiFive, Inc */ |
| 3 | 3 | |
| 4 | 4 | #include "fu540-c000.dtsi" |
| 5 | +#include <dt-bindings/gpio/gpio.h> | |
| 5 | 6 | |
| 6 | 7 | /* Clock frequency (in Hz) of the PCB crystal for rtcclk */ |
| 7 | 8 | #define RTCCLK_FREQ 1000000 |
| @@ -41,6 +42,10 @@ · 33 unmodified lines | ||
| 41 | 42 | clock-frequency = <RTCCLK_FREQ>; |
| 42 | 43 | clock-output-names = "rtcclk"; |
| 43 | 44 | }; |
| 45 | + gpio-restart { | |
| 46 | + compatible = "gpio-restart"; | |
| 47 | + gpios = <&gpio 10 GPIO_ACTIVE_LOW>; | |
| 48 | + }; | |
| 44 | 49 | }; |
| 45 | 50 | |
| 46 | 51 | &uart0 { |
| @@ -15,6 +15,7 @@ CONFIG_BLK_DEV_INITRD=y · 14 unmodified lines | ||
| 15 | 15 | CONFIG_EXPERT=y |
| 16 | 16 | CONFIG_BPF_SYSCALL=y |
| 17 | 17 | CONFIG_SOC_SIFIVE=y |
| 18 | +CONFIG_SOC_VIRT=y | |
| 18 | 19 | CONFIG_SMP=y |
| 19 | 20 | CONFIG_MODULES=y |
| 20 | 21 | CONFIG_MODULE_UNLOAD=y |
| @@ -30,7 +31,6 @@ CONFIG_IP_PNP_BOOTP=y · 9 unmodified lines | ||
| 30 | 31 | CONFIG_IP_PNP_RARP=y |
| 31 | 32 | CONFIG_NETLINK_DIAG=y |
| 32 | 33 | CONFIG_NET_9P=y |
| 33 | −CONFIG_NET_9P_VIRTIO=y | |
| 34 | 34 | CONFIG_PCI=y |
| 35 | 35 | CONFIG_PCIEPORTBUS=y |
| 36 | 36 | CONFIG_PCI_HOST_GENERIC=y |
| @@ -38,15 +38,12 @@ CONFIG_PCIE_XILINX=y · 1 unmodified line | ||
| 38 | 38 | CONFIG_DEVTMPFS=y |
| 39 | 39 | CONFIG_DEVTMPFS_MOUNT=y |
| 40 | 40 | CONFIG_BLK_DEV_LOOP=y |
| 41 | −CONFIG_VIRTIO_BLK=y | |
| 42 | 41 | CONFIG_BLK_DEV_SD=y |
| 43 | 42 | CONFIG_BLK_DEV_SR=y |
| 44 | −CONFIG_SCSI_VIRTIO=y | |
| 45 | 43 | CONFIG_ATA=y |
| 46 | 44 | CONFIG_SATA_AHCI=y |
| 47 | 45 | CONFIG_SATA_AHCI_PLATFORM=y |
| 48 | 46 | CONFIG_NETDEVICES=y |
| 49 | −CONFIG_VIRTIO_NET=y | |
| 50 | 47 | CONFIG_MACB=y |
| 51 | 48 | CONFIG_E1000E=y |
| 52 | 49 | CONFIG_R8169=y |
| @@ -57,15 +54,13 @@ CONFIG_SERIAL_8250_CONSOLE=y · 4 unmodified lines | ||
| 57 | 54 | CONFIG_SERIAL_OF_PLATFORM=y |
| 58 | 55 | CONFIG_SERIAL_EARLYCON_RISCV_SBI=y |
| 59 | 56 | CONFIG_HVC_RISCV_SBI=y |
| 60 | −CONFIG_VIRTIO_CONSOLE=y | |
| 61 | 57 | CONFIG_HW_RANDOM=y |
| 62 | −CONFIG_HW_RANDOM_VIRTIO=y | |
| 63 | 58 | CONFIG_SPI=y |
| 64 | 59 | CONFIG_SPI_SIFIVE=y |
| 65 | 60 | # CONFIG_PTP_1588_CLOCK is not set |
| 61 | +CONFIG_POWER_RESET=y | |
| 66 | 62 | CONFIG_DRM=y |
| 67 | 63 | CONFIG_DRM_RADEON=y |
| 68 | −CONFIG_DRM_VIRTIO_GPU=y | |
| 69 | 64 | CONFIG_FRAMEBUFFER_CONSOLE=y |
| 70 | 65 | CONFIG_USB=y |
| 71 | 66 | CONFIG_USB_XHCI_HCD=y |
| @@ -78,12 +73,7 @@ CONFIG_USB_STORAGE=y · 6 unmodified lines | ||
| 78 | 73 | CONFIG_USB_UAS=y |
| 79 | 74 | CONFIG_MMC=y |
| 80 | 75 | CONFIG_MMC_SPI=y |
| 81 | −CONFIG_VIRTIO_PCI=y | |
| 82 | −CONFIG_VIRTIO_BALLOON=y | |
| 83 | −CONFIG_VIRTIO_INPUT=y | |
| 84 | −CONFIG_VIRTIO_MMIO=y | |
| 85 | −CONFIG_RPMSG_CHAR=y | |
| 86 | −CONFIG_RPMSG_VIRTIO=y | |
| 76 | +CONFIG_RTC_CLASS=y | |
| 87 | 77 | CONFIG_EXT4_FS=y |
| 88 | 78 | CONFIG_EXT4_FS_POSIX_ACL=y |
| 89 | 79 | CONFIG_AUTOFS4_FS=y |
| @@ -98,7 +88,6 @@ CONFIG_NFS_V4_2=y · 8 unmodified lines | ||
| 98 | 88 | CONFIG_ROOT_NFS=y |
| 99 | 89 | CONFIG_9P_FS=y |
| 100 | 90 | CONFIG_CRYPTO_USER_API_HASH=y |
| 101 | −CONFIG_CRYPTO_DEV_VIRTIO=y | |
| 102 | 91 | CONFIG_PRINTK_TIME=y |
| 103 | 92 | CONFIG_DEBUG_FS=y |
| 104 | 93 | CONFIG_DEBUG_PAGEALLOC=y |
| @@ -14,6 +14,7 @@ CONFIG_CHECKPOINT_RESTORE=y · 13 unmodified lines | ||
| 14 | 14 | CONFIG_BLK_DEV_INITRD=y |
| 15 | 15 | CONFIG_EXPERT=y |
| 16 | 16 | CONFIG_BPF_SYSCALL=y |
| 17 | +CONFIG_SOC_VIRT=y | |
| 17 | 18 | CONFIG_ARCH_RV32I=y |
| 18 | 19 | CONFIG_SMP=y |
| 19 | 20 | CONFIG_MODULES=y |
| @@ -30,7 +31,6 @@ CONFIG_IP_PNP_BOOTP=y · 10 unmodified lines | ||
| 30 | 31 | CONFIG_IP_PNP_RARP=y |
| 31 | 32 | CONFIG_NETLINK_DIAG=y |
| 32 | 33 | CONFIG_NET_9P=y |
| 33 | −CONFIG_NET_9P_VIRTIO=y | |
| 34 | 34 | CONFIG_PCI=y |
| 35 | 35 | CONFIG_PCIEPORTBUS=y |
| 36 | 36 | CONFIG_PCI_HOST_GENERIC=y |
| @@ -38,15 +38,12 @@ CONFIG_PCIE_XILINX=y · 1 unmodified line | ||
| 38 | 38 | CONFIG_DEVTMPFS=y |
| 39 | 39 | CONFIG_DEVTMPFS_MOUNT=y |
| 40 | 40 | CONFIG_BLK_DEV_LOOP=y |
| 41 | −CONFIG_VIRTIO_BLK=y | |
| 42 | 41 | CONFIG_BLK_DEV_SD=y |
| 43 | 42 | CONFIG_BLK_DEV_SR=y |
| 44 | −CONFIG_SCSI_VIRTIO=y | |
| 45 | 43 | CONFIG_ATA=y |
| 46 | 44 | CONFIG_SATA_AHCI=y |
| 47 | 45 | CONFIG_SATA_AHCI_PLATFORM=y |
| 48 | 46 | CONFIG_NETDEVICES=y |
| 49 | −CONFIG_VIRTIO_NET=y | |
| 50 | 47 | CONFIG_MACB=y |
| 51 | 48 | CONFIG_E1000E=y |
| 52 | 49 | CONFIG_R8169=y |
| @@ -57,13 +54,11 @@ CONFIG_SERIAL_8250_CONSOLE=y · 4 unmodified lines | ||
| 57 | 54 | CONFIG_SERIAL_OF_PLATFORM=y |
| 58 | 55 | CONFIG_SERIAL_EARLYCON_RISCV_SBI=y |
| 59 | 56 | CONFIG_HVC_RISCV_SBI=y |
| 60 | −CONFIG_VIRTIO_CONSOLE=y | |
| 61 | 57 | CONFIG_HW_RANDOM=y |
| 62 | −CONFIG_HW_RANDOM_VIRTIO=y | |
| 63 | 58 | # CONFIG_PTP_1588_CLOCK is not set |
| 59 | +CONFIG_POWER_RESET=y | |
| 64 | 60 | CONFIG_DRM=y |
| 65 | 61 | CONFIG_DRM_RADEON=y |
| 66 | −CONFIG_DRM_VIRTIO_GPU=y | |
| 67 | 62 | CONFIG_FRAMEBUFFER_CONSOLE=y |
| 68 | 63 | CONFIG_USB=y |
| 69 | 64 | CONFIG_USB_XHCI_HCD=y |
| @@ -74,13 +69,7 @@ CONFIG_USB_OHCI_HCD=y · 4 unmodified lines | ||
| 74 | 69 | CONFIG_USB_OHCI_HCD_PLATFORM=y |
| 75 | 70 | CONFIG_USB_STORAGE=y |
| 76 | 71 | CONFIG_USB_UAS=y |
| 77 | −CONFIG_VIRTIO_PCI=y | |
| 78 | −CONFIG_VIRTIO_BALLOON=y | |
| 79 | −CONFIG_VIRTIO_INPUT=y | |
| 80 | −CONFIG_VIRTIO_MMIO=y | |
| 81 | −CONFIG_RPMSG_CHAR=y | |
| 82 | −CONFIG_RPMSG_VIRTIO=y | |
| 83 | −CONFIG_SIFIVE_PLIC=y | |
| 72 | +CONFIG_RTC_CLASS=y | |
| 84 | 73 | CONFIG_EXT4_FS=y |
| 85 | 74 | CONFIG_EXT4_FS_POSIX_ACL=y |
| 86 | 75 | CONFIG_AUTOFS4_FS=y |
| @@ -95,7 +84,6 @@ CONFIG_NFS_V4_2=y · 8 unmodified lines | ||
| 95 | 84 | CONFIG_ROOT_NFS=y |
| 96 | 85 | CONFIG_9P_FS=y |
| 97 | 86 | CONFIG_CRYPTO_USER_API_HASH=y |
| 98 | −CONFIG_CRYPTO_DEV_VIRTIO=y | |
| 99 | 87 | CONFIG_PRINTK_TIME=y |
| 100 | 88 | CONFIG_DEBUG_FS=y |
| 101 | 89 | CONFIG_DEBUG_PAGEALLOC=y |
| @@ -28,13 +28,6 @@ static inline int syscall_get_nr(struct task_struct *task, · 27 unmodified lines | ||
| 28 | 28 | return regs->a7; |
| 29 | 29 | } |
| 30 | 30 | |
| 31 | −static inline void syscall_set_nr(struct task_struct *task, | |
| 32 | − struct pt_regs *regs, | |
| 33 | − int sysno) | |
| 34 | −{ | |
| 35 | − regs->a7 = sysno; | |
| 36 | −} | |
| 37 | − | |
| 38 | 31 | static inline void syscall_rollback(struct task_struct *task, |
| 39 | 32 | struct pt_regs *regs) |
| 40 | 33 | { |
| @@ -228,20 +228,13 @@ check_syscall_nr: · 227 unmodified lines | ||
| 228 | 228 | /* Check to make sure we don't jump to a bogus syscall number. */ |
| 229 | 229 | li t0, __NR_syscalls |
| 230 | 230 | la s0, sys_ni_syscall |
| 231 | − /* | |
| 232 | − * The tracer can change syscall number to valid/invalid value. | |
| 233 | − * We use syscall_set_nr helper in syscall_trace_enter thus we | |
| 234 | − * cannot trust the current value in a7 and have to reload from | |
| 235 | − * the current task pt_regs. | |
| 236 | − */ | |
| 237 | − REG_L a7, PT_A7(sp) | |
| 238 | 231 | /* |
| 239 | 232 | * Syscall number held in a7. |
| 240 | 233 | * If syscall number is above allowed value, redirect to ni_syscall. |
| 241 | 234 | */ |
| 242 | 235 | bge a7, t0, 1f |
| 243 | 236 | /* |
| 244 | − * Check if syscall is rejected by tracer or seccomp, i.e., a7 == -1. | |
| 237 | + * Check if syscall is rejected by tracer, i.e., a7 == -1. | |
| 245 | 238 | * If yes, we pretend it was executed. |
| 246 | 239 | */ |
| 247 | 240 | li t1, -1 |
| @@ -334,6 +327,7 @@ work_resched: · 86 unmodified lines | ||
| 334 | 327 | handle_syscall_trace_enter: |
| 335 | 328 | move a0, sp |
| 336 | 329 | call do_syscall_trace_enter |
| 330 | + move t0, a0 | |
| 337 | 331 | REG_L a0, PT_A0(sp) |
| 338 | 332 | REG_L a1, PT_A1(sp) |
| 339 | 333 | REG_L a2, PT_A2(sp) |
| @@ -342,6 +336,7 @@ handle_syscall_trace_enter: · 2 unmodified lines | ||
| 342 | 336 | REG_L a5, PT_A5(sp) |
| 343 | 337 | REG_L a6, PT_A6(sp) |
| 344 | 338 | REG_L a7, PT_A7(sp) |
| 339 | + bnez t0, ret_from_syscall_rejected | |
| 345 | 340 | j check_syscall_nr |
| 346 | 341 | handle_syscall_trace_exit: |
| 347 | 342 | move a0, sp |
| @@ -8,6 +8,10 @@ · 7 unmodified lines | ||
| 8 | 8 | #include <linux/err.h> |
| 9 | 9 | #include <linux/errno.h> |
| 10 | 10 | #include <linux/moduleloader.h> |
| 11 | +#include <linux/vmalloc.h> | |
| 12 | +#include <linux/sizes.h> | |
| 13 | +#include <asm/pgtable.h> | |
| 14 | +#include <asm/sections.h> | |
| 11 | 15 | |
| 12 | 16 | static int apply_r_riscv_32_rela(struct module *me, u32 *location, Elf_Addr v) |
| 13 | 17 | { |
| @@ -386,3 +390,15 @@ int apply_relocate_add(Elf_Shdr *sechdrs, const char *strtab, · 372 unmodified lines | ||
| 386 | 390 | |
| 387 | 391 | return 0; |
| 388 | 392 | } |
| 393 | + | |
| 394 | +#if defined(CONFIG_MMU) && defined(CONFIG_64BIT) | |
| 395 | +#define VMALLOC_MODULE_START \ | |
| 396 | + max(PFN_ALIGN((unsigned long)&_end - SZ_2G), VMALLOC_START) | |
| 397 | +void *module_alloc(unsigned long size) | |
| 398 | +{ | |
| 399 | + return __vmalloc_node_range(size, 1, VMALLOC_MODULE_START, | |
| 400 | + VMALLOC_END, GFP_KERNEL, | |
| 401 | + PAGE_KERNEL_EXEC, 0, NUMA_NO_NODE, | |
| 402 | + __builtin_return_address(0)); | |
| 403 | +} | |
| 404 | +#endif | |
| @@ -148,21 +148,19 @@ long arch_ptrace(struct task_struct *child, long request, · 147 unmodified lines | ||
| 148 | 148 | * Allows PTRACE_SYSCALL to work. These are called from entry.S in |
| 149 | 149 | * {handle,ret_from}_syscall. |
| 150 | 150 | */ |
| 151 | −__visible void do_syscall_trace_enter(struct pt_regs *regs) | |
| 151 | +__visible int do_syscall_trace_enter(struct pt_regs *regs) | |
| 152 | 152 | { |
| 153 | 153 | if (test_thread_flag(TIF_SYSCALL_TRACE)) |
| 154 | 154 | if (tracehook_report_syscall_entry(regs)) |
| 155 | − syscall_set_nr(current, regs, -1); | |
| 155 | + return -1; | |
| 156 | 156 | |
| 157 | 157 | /* |
| 158 | 158 | * Do the secure computing after ptrace; failures should be fast. |
| 159 | 159 | * If this fails we might have return value in a0 from seccomp |
| 160 | 160 | * (via SECCOMP_RET_ERRNO/TRACE). |
| 161 | 161 | */ |
| 162 | − if (secure_computing() == -1) { | |
| 163 | − syscall_set_nr(current, regs, -1); | |
| 164 | − return; | |
| 165 | − } | |
| 162 | + if (secure_computing() == -1) | |
| 163 | + return -1; | |
| 166 | 164 | |
| 167 | 165 | #ifdef CONFIG_HAVE_SYSCALL_TRACEPOINTS |
| 168 | 166 | if (test_thread_flag(TIF_SYSCALL_TRACEPOINT)) |
| @@ -170,6 +168,7 @@ __visible void do_syscall_trace_enter(struct pt_regs *regs) · 1 unmodified line | ||
| 170 | 168 | #endif |
| 171 | 169 | |
| 172 | 170 | audit_syscall_entry(regs->a7, regs->a0, regs->a1, regs->a2, regs->a3); |
| 171 | + return 0; | |
| 173 | 172 | } |
| 174 | 173 | |
| 175 | 174 | __visible void do_syscall_trace_exit(struct pt_regs *regs) |
| @@ -131,7 +131,7 @@ void __init setup_bootmem(void) · 130 unmodified lines | ||
| 131 | 131 | for_each_memblock(memory, reg) { |
| 132 | 132 | phys_addr_t end = reg->base + reg->size; |
| 133 | 133 | |
| 134 | − if (reg->base <= vmlinux_end && vmlinux_end <= end) { | |
| 134 | + if (reg->base <= vmlinux_start && vmlinux_end <= end) { | |
| 135 | 135 | mem_size = min(reg->size, (phys_addr_t)-PAGE_OFFSET); |
| 136 | 136 | |
| 137 | 137 | /* |
| @@ -752,6 +752,12 @@ static inline int pmd_write(pmd_t pmd) · 751 unmodified lines | ||
| 752 | 752 | return (pmd_val(pmd) & _SEGMENT_ENTRY_WRITE) != 0; |
| 753 | 753 | } |
| 754 | 754 | |
| 755 | +#define pud_write pud_write | |
| 756 | +static inline int pud_write(pud_t pud) | |
| 757 | +{ | |
| 758 | + return (pud_val(pud) & _REGION3_ENTRY_WRITE) != 0; | |
| 759 | +} | |
| 760 | + | |
| 755 | 761 | static inline int pmd_dirty(pmd_t pmd) |
| 756 | 762 | { |
| 757 | 763 | return (pmd_val(pmd) & _SEGMENT_ENTRY_DIRTY) != 0; |
| @@ -424,7 +424,7 @@ static void zpci_map_resources(struct pci_dev *pdev) · 423 unmodified lines | ||
| 424 | 424 | |
| 425 | 425 | if (zpci_use_mio(zdev)) |
| 426 | 426 | pdev->resource[i].start = |
| 427 | − (resource_size_t __force) zdev->bars[i].mio_wb; | |
| 427 | + (resource_size_t __force) zdev->bars[i].mio_wt; | |
| 428 | 428 | else |
| 429 | 429 | pdev->resource[i].start = (resource_size_t __force) |
| 430 | 430 | pci_iomap_range_fh(pdev, i, 0, 0); |
| @@ -531,7 +531,7 @@ static int zpci_setup_bus_resources(struct zpci_dev *zdev, · 100 unmodified lines | ||
| 531 | 531 | flags |= IORESOURCE_MEM_64; |
| 532 | 532 | |
| 533 | 533 | if (zpci_use_mio(zdev)) |
| 534 | − addr = (unsigned long) zdev->bars[i].mio_wb; | |
| 534 | + addr = (unsigned long) zdev->bars[i].mio_wt; | |
| 535 | 535 | else |
| 536 | 536 | addr = ZPCI_ADDR(entry); |
| 537 | 537 | size = 1UL << zdev->bars[i].size; |
| @@ -19,7 +19,14 @@ struct task_struct; · 18 unmodified lines | ||
| 19 | 19 | void io_bitmap_share(struct task_struct *tsk); |
| 20 | 20 | void io_bitmap_exit(void); |
| 21 | 21 | |
| 22 | −void tss_update_io_bitmap(void); | |
| 22 | +void native_tss_update_io_bitmap(void); | |
| 23 | + | |
| 24 | +#ifdef CONFIG_PARAVIRT_XXL | |
| 25 | +#include <asm/paravirt.h> | |
| 26 | +#else | |
| 27 | +#define tss_update_io_bitmap native_tss_update_io_bitmap | |
| 28 | +#endif | |
| 29 | + | |
| 23 | 30 | #else |
| 24 | 31 | static inline void io_bitmap_share(struct task_struct *tsk) { } |
| 25 | 32 | static inline void io_bitmap_exit(void) { } |
| @@ -295,6 +295,13 @@ static inline void write_idt_entry(gate_desc *dt, int entry, const gate_desc *g) · 294 unmodified lines | ||
| 295 | 295 | PVOP_VCALL3(cpu.write_idt_entry, dt, entry, g); |
| 296 | 296 | } |
| 297 | 297 | |
| 298 | +#ifdef CONFIG_X86_IOPL_IOPERM | |
| 299 | +static inline void tss_update_io_bitmap(void) | |
| 300 | +{ | |
| 301 | + PVOP_VCALL0(cpu.update_io_bitmap); | |
| 302 | +} | |
| 303 | +#endif | |
| 304 | + | |
| 298 | 305 | static inline void paravirt_activate_mm(struct mm_struct *prev, |
| 299 | 306 | struct mm_struct *next) |
| 300 | 307 | { |
| @@ -140,6 +140,10 @@ struct pv_cpu_ops { · 139 unmodified lines | ||
| 140 | 140 | |
| 141 | 141 | void (*load_sp0)(unsigned long sp0); |
| 142 | 142 | |
| 143 | +#ifdef CONFIG_X86_IOPL_IOPERM | |
| 144 | + void (*update_io_bitmap)(void); | |
| 145 | +#endif | |
| 146 | + | |
| 143 | 147 | void (*wbinvd)(void); |
| 144 | 148 | |
| 145 | 149 | /* cpuid emulation, mostly so that caps bits can be disabled */ |
| @@ -445,7 +445,7 @@ static __always_inline void setup_pku(struct cpuinfo_x86 *c) · 444 unmodified lines | ||
| 445 | 445 | * cpuid bit to be set. We need to ensure that we |
| 446 | 446 | * update that bit in this CPU's "cpu_info". |
| 447 | 447 | */ |
| 448 | − get_cpu_cap(c); | |
| 448 | + set_cpu_cap(c, X86_FEATURE_OSPKE); | |
| 449 | 449 | } |
| 450 | 450 | |
| 451 | 451 | #ifdef CONFIG_X86_INTEL_MEMORY_PROTECTION_KEYS |
| @@ -30,6 +30,7 @@ · 29 unmodified lines | ||
| 30 | 30 | #include <asm/timer.h> |
| 31 | 31 | #include <asm/special_insns.h> |
| 32 | 32 | #include <asm/tlb.h> |
| 33 | +#include <asm/io_bitmap.h> | |
| 33 | 34 | |
| 34 | 35 | /* |
| 35 | 36 | * nop stub, which must not clobber anything *including the stack* to |
| @@ -341,6 +342,10 @@ struct paravirt_patch_template pv_ops = { · 305 unmodified lines | ||
| 341 | 342 | .cpu.iret = native_iret, |
| 342 | 343 | .cpu.swapgs = native_swapgs, |
| 343 | 344 | |
| 345 | +#ifdef CONFIG_X86_IOPL_IOPERM | |
| 346 | + .cpu.update_io_bitmap = native_tss_update_io_bitmap, | |
| 347 | +#endif | |
| 348 | + | |
| 344 | 349 | .cpu.start_context_switch = paravirt_nop, |
| 345 | 350 | .cpu.end_context_switch = paravirt_nop, |
| 346 | 351 | |
| @@ -374,7 +374,7 @@ static void tss_copy_io_bitmap(struct tss_struct *tss, struct io_bitmap *iobm) · 373 unmodified lines | ||
| 374 | 374 | /** |
| 375 | 375 | * tss_update_io_bitmap - Update I/O bitmap before exiting to usermode |
| 376 | 376 | */ |
| 377 | −void tss_update_io_bitmap(void) | |
| 377 | +void native_tss_update_io_bitmap(void) | |
| 378 | 378 | { |
| 379 | 379 | struct tss_struct *tss = this_cpu_ptr(&cpu_tss_rw); |
| 380 | 380 | struct thread_struct *t = ¤t->thread; |
| @@ -363,13 +363,8 @@ static void ptdump_walk_pgd_level_core(struct seq_file *m, · 362 unmodified lines | ||
| 363 | 363 | { |
| 364 | 364 | const struct ptdump_range ptdump_ranges[] = { |
| 365 | 365 | #ifdef CONFIG_X86_64 |
| 366 | − | |
| 367 | −#define normalize_addr_shift (64 - (__VIRTUAL_MASK_SHIFT + 1)) | |
| 368 | −#define normalize_addr(u) ((signed long)((u) << normalize_addr_shift) >> \ | |
| 369 | − normalize_addr_shift) | |
| 370 | − | |
| 371 | 366 | {0, PTRS_PER_PGD * PGD_LEVEL_MULT / 2}, |
| 372 | − {normalize_addr(PTRS_PER_PGD * PGD_LEVEL_MULT / 2), ~0UL}, | |
| 367 | + {GUARD_HOLE_END_ADDR, ~0UL}, | |
| 373 | 368 | #else |
| 374 | 369 | {0, ~0UL}, |
| 375 | 370 | #endif |
| @@ -180,7 +180,7 @@ void efi_sync_low_kernel_mappings(void) · 179 unmodified lines | ||
| 180 | 180 | static inline phys_addr_t |
| 181 | 181 | virt_to_phys_or_null_size(void *va, unsigned long size) |
| 182 | 182 | { |
| 183 | − bool bad_size; | |
| 183 | + phys_addr_t pa; | |
| 184 | 184 | |
| 185 | 185 | if (!va) |
| 186 | 186 | return 0; |
| @@ -188,16 +188,13 @@ virt_to_phys_or_null_size(void *va, unsigned long size) · 1 unmodified line | ||
| 188 | 188 | if (virt_addr_valid(va)) |
| 189 | 189 | return virt_to_phys(va); |
| 190 | 190 | |
| 191 | − /* | |
| 192 | − * A fully aligned variable on the stack is guaranteed not to | |
| 193 | − * cross a page bounary. Try to catch strings on the stack by | |
| 194 | − * checking that 'size' is a power of two. | |
| 195 | − */ | |
| 196 | − bad_size = size > PAGE_SIZE || !is_power_of_2(size); | |
| 191 | + pa = slow_virt_to_phys(va); | |
| 197 | 192 | |
| 198 | − WARN_ON(!IS_ALIGNED((unsigned long)va, size) || bad_size); | |
| 193 | + /* check if the object crosses a page boundary */ | |
| 194 | + if (WARN_ON((pa ^ (pa + size - 1)) & PAGE_MASK)) | |
| 195 | + return 0; | |
| 199 | 196 | |
| 200 | − return slow_virt_to_phys(va); | |
| 197 | + return pa; | |
| 201 | 198 | } |
| 202 | 199 | |
| 203 | 200 | #define virt_to_phys_or_null(addr) \ |
| @@ -568,85 +565,25 @@ efi_thunk_set_virtual_address_map(unsigned long memory_map_size, · 364 unmodified lines | ||
| 568 | 565 | |
| 569 | 566 | static efi_status_t efi_thunk_get_time(efi_time_t *tm, efi_time_cap_t *tc) |
| 570 | 567 | { |
| 571 | − efi_status_t status; | |
| 572 | − u32 phys_tm, phys_tc; | |
| 573 | − unsigned long flags; | |
| 574 | − | |
| 575 | − spin_lock(&rtc_lock); | |
| 576 | − spin_lock_irqsave(&efi_runtime_lock, flags); | |
| 577 | − | |
| 578 | − phys_tm = virt_to_phys_or_null(tm); | |
| 579 | − phys_tc = virt_to_phys_or_null(tc); | |
| 580 | − | |
| 581 | − status = efi_thunk(get_time, phys_tm, phys_tc); | |
| 582 | − | |
| 583 | − spin_unlock_irqrestore(&efi_runtime_lock, flags); | |
| 584 | − spin_unlock(&rtc_lock); | |
| 585 | − | |
| 586 | − return status; | |
| 568 | + return EFI_UNSUPPORTED; | |
| 587 | 569 | } |
| 588 | 570 | |
| 589 | 571 | static efi_status_t efi_thunk_set_time(efi_time_t *tm) |
| 590 | 572 | { |
| 591 | − efi_status_t status; | |
| 592 | − u32 phys_tm; | |
| 593 | − unsigned long flags; | |
| 594 | − | |
| 595 | − spin_lock(&rtc_lock); | |
| 596 | − spin_lock_irqsave(&efi_runtime_lock, flags); | |
| 597 | − | |
| 598 | − phys_tm = virt_to_phys_or_null(tm); | |
| 599 | − | |
| 600 | − status = efi_thunk(set_time, phys_tm); | |
| 601 | − | |
| 602 | − spin_unlock_irqrestore(&efi_runtime_lock, flags); | |
| 603 | − spin_unlock(&rtc_lock); | |
| 604 | − | |
| 605 | − return status; | |
| 573 | + return EFI_UNSUPPORTED; | |
| 606 | 574 | } |
| 607 | 575 | |
| 608 | 576 | static efi_status_t |
| 609 | 577 | efi_thunk_get_wakeup_time(efi_bool_t *enabled, efi_bool_t *pending, |
| 610 | 578 | efi_time_t *tm) |
| 611 | 579 | { |
| 612 | − efi_status_t status; | |
| 613 | − u32 phys_enabled, phys_pending, phys_tm; | |
| 614 | − unsigned long flags; | |
| 615 | − | |
| 616 | − spin_lock(&rtc_lock); | |
| 617 | − spin_lock_irqsave(&efi_runtime_lock, flags); | |
| 618 | − | |
| 619 | − phys_enabled = virt_to_phys_or_null(enabled); | |
| 620 | − phys_pending = virt_to_phys_or_null(pending); | |
| 621 | − phys_tm = virt_to_phys_or_null(tm); | |
| 622 | − | |
| 623 | − status = efi_thunk(get_wakeup_time, phys_enabled, | |
| 624 | − phys_pending, phys_tm); | |
| 625 | − | |
| 626 | − spin_unlock_irqrestore(&efi_runtime_lock, flags); | |
| 627 | − spin_unlock(&rtc_lock); | |
| 628 | − | |
| 629 | − return status; | |
| 580 | + return EFI_UNSUPPORTED; | |
| 630 | 581 | } |
| 631 | 582 | |
| 632 | 583 | static efi_status_t |
| 633 | 584 | efi_thunk_set_wakeup_time(efi_bool_t enabled, efi_time_t *tm) |
| 634 | 585 | { |
| 635 | − efi_status_t status; | |
| 636 | − u32 phys_tm; | |
| 637 | − unsigned long flags; | |
| 638 | − | |
| 639 | − spin_lock(&rtc_lock); | |
| 640 | − spin_lock_irqsave(&efi_runtime_lock, flags); | |
| 641 | − | |
| 642 | − phys_tm = virt_to_phys_or_null(tm); | |
| 643 | − | |
| 644 | − status = efi_thunk(set_wakeup_time, enabled, phys_tm); | |
| 645 | − | |
| 646 | − spin_unlock_irqrestore(&efi_runtime_lock, flags); | |
| 647 | − spin_unlock(&rtc_lock); | |
| 648 | − | |
| 649 | − return status; | |
| 586 | + return EFI_UNSUPPORTED; | |
| 650 | 587 | } |
| 651 | 588 | |
| 652 | 589 | static unsigned long efi_name_size(efi_char16_t *name) |
| @@ -658,6 +595,8 @@ static efi_status_t · 5 unmodified lines | ||
| 658 | 595 | efi_thunk_get_variable(efi_char16_t *name, efi_guid_t *vendor, |
| 659 | 596 | u32 *attr, unsigned long *data_size, void *data) |
| 660 | 597 | { |
| 598 | + u8 buf[24] __aligned(8); | |
| 599 | + efi_guid_t *vnd = PTR_ALIGN((efi_guid_t *)buf, sizeof(*vnd)); | |
| 661 | 600 | efi_status_t status; |
| 662 | 601 | u32 phys_name, phys_vendor, phys_attr; |
| 663 | 602 | u32 phys_data_size, phys_data; |
| @@ -665,14 +604,19 @@ efi_thunk_get_variable(efi_char16_t *name, efi_guid_t *vendor, · 1 unmodified line | ||
| 665 | 604 | |
| 666 | 605 | spin_lock_irqsave(&efi_runtime_lock, flags); |
| 667 | 606 | |
| 607 | + *vnd = *vendor; | |
| 608 | + | |
| 668 | 609 | phys_data_size = virt_to_phys_or_null(data_size); |
| 669 | − phys_vendor = virt_to_phys_or_null(vendor); | |
| 610 | + phys_vendor = virt_to_phys_or_null(vnd); | |
| 670 | 611 | phys_name = virt_to_phys_or_null_size(name, efi_name_size(name)); |
| 671 | 612 | phys_attr = virt_to_phys_or_null(attr); |
| 672 | 613 | phys_data = virt_to_phys_or_null_size(data, *data_size); |
| 673 | 614 | |
| 674 | − status = efi_thunk(get_variable, phys_name, phys_vendor, | |
| 675 | − phys_attr, phys_data_size, phys_data); | |
| 615 | + if (!phys_name || (data && !phys_data)) | |
| 616 | + status = EFI_INVALID_PARAMETER; | |
| 617 | + else | |
| 618 | + status = efi_thunk(get_variable, phys_name, phys_vendor, | |
| 619 | + phys_attr, phys_data_size, phys_data); | |
| 676 | 620 | |
| 677 | 621 | spin_unlock_irqrestore(&efi_runtime_lock, flags); |
| 678 | 622 | |
| @@ -683,19 +627,25 @@ static efi_status_t · 4 unmodified lines | ||
| 683 | 627 | efi_thunk_set_variable(efi_char16_t *name, efi_guid_t *vendor, |
| 684 | 628 | u32 attr, unsigned long data_size, void *data) |
| 685 | 629 | { |
| 630 | + u8 buf[24] __aligned(8); | |
| 631 | + efi_guid_t *vnd = PTR_ALIGN((efi_guid_t *)buf, sizeof(*vnd)); | |
| 686 | 632 | u32 phys_name, phys_vendor, phys_data; |
| 687 | 633 | efi_status_t status; |
| 688 | 634 | unsigned long flags; |
| 689 | 635 | |
| 690 | 636 | spin_lock_irqsave(&efi_runtime_lock, flags); |
| 691 | 637 | |
| 638 | + *vnd = *vendor; | |
| 639 | + | |
| 692 | 640 | phys_name = virt_to_phys_or_null_size(name, efi_name_size(name)); |
| 693 | − phys_vendor = virt_to_phys_or_null(vendor); | |
| 641 | + phys_vendor = virt_to_phys_or_null(vnd); | |
| 694 | 642 | phys_data = virt_to_phys_or_null_size(data, data_size); |
| 695 | 643 | |
| 696 | − /* If data_size is > sizeof(u32) we've got problems */ | |
| 697 | − status = efi_thunk(set_variable, phys_name, phys_vendor, | |
| 698 | − attr, data_size, phys_data); | |
| 644 | + if (!phys_name || !phys_data) | |
| 645 | + status = EFI_INVALID_PARAMETER; | |
| 646 | + else | |
| 647 | + status = efi_thunk(set_variable, phys_name, phys_vendor, | |
| 648 | + attr, data_size, phys_data); | |
| 699 | 649 | |
| 700 | 650 | spin_unlock_irqrestore(&efi_runtime_lock, flags); |
| 701 | 651 | |
| @@ -707,6 +657,8 @@ efi_thunk_set_variable_nonblocking(efi_char16_t *name, efi_guid_t *vendor, · 5 unmodified lines | ||
| 707 | 657 | u32 attr, unsigned long data_size, |
| 708 | 658 | void *data) |
| 709 | 659 | { |
| 660 | + u8 buf[24] __aligned(8); | |
| 661 | + efi_guid_t *vnd = PTR_ALIGN((efi_guid_t *)buf, sizeof(*vnd)); | |
| 710 | 662 | u32 phys_name, phys_vendor, phys_data; |
| 711 | 663 | efi_status_t status; |
| 712 | 664 | unsigned long flags; |
| @@ -714,13 +666,17 @@ efi_thunk_set_variable_nonblocking(efi_char16_t *name, efi_guid_t *vendor, · 1 unmodified line | ||
| 714 | 666 | if (!spin_trylock_irqsave(&efi_runtime_lock, flags)) |
| 715 | 667 | return EFI_NOT_READY; |
| 716 | 668 | |
| 669 | + *vnd = *vendor; | |
| 670 | + | |
| 717 | 671 | phys_name = virt_to_phys_or_null_size(name, efi_name_size(name)); |
| 718 | − phys_vendor = virt_to_phys_or_null(vendor); | |
| 672 | + phys_vendor = virt_to_phys_or_null(vnd); | |
| 719 | 673 | phys_data = virt_to_phys_or_null_size(data, data_size); |
| 720 | 674 | |
| 721 | − /* If data_size is > sizeof(u32) we've got problems */ | |
| 722 | − status = efi_thunk(set_variable, phys_name, phys_vendor, | |
| 723 | − attr, data_size, phys_data); | |
| 675 | + if (!phys_name || !phys_data) | |
| 676 | + status = EFI_INVALID_PARAMETER; | |
| 677 | + else | |
| 678 | + status = efi_thunk(set_variable, phys_name, phys_vendor, | |
| 679 | + attr, data_size, phys_data); | |
| 724 | 680 | |
| 725 | 681 | spin_unlock_irqrestore(&efi_runtime_lock, flags); |
| 726 | 682 | |
| @@ -732,39 +688,36 @@ efi_thunk_get_next_variable(unsigned long *name_size, · 5 unmodified lines | ||
| 732 | 688 | efi_char16_t *name, |
| 733 | 689 | efi_guid_t *vendor) |
| 734 | 690 | { |
| 691 | + u8 buf[24] __aligned(8); | |
| 692 | + efi_guid_t *vnd = PTR_ALIGN((efi_guid_t *)buf, sizeof(*vnd)); | |
| 735 | 693 | efi_status_t status; |
| 736 | 694 | u32 phys_name_size, phys_name, phys_vendor; |
| 737 | 695 | unsigned long flags; |
| 738 | 696 | |
| 739 | 697 | spin_lock_irqsave(&efi_runtime_lock, flags); |
| 740 | 698 | |
| 699 | + *vnd = *vendor; | |
| 700 | + | |
| 741 | 701 | phys_name_size = virt_to_phys_or_null(name_size); |
| 742 | − phys_vendor = virt_to_phys_or_null(vendor); | |
| 702 | + phys_vendor = virt_to_phys_or_null(vnd); | |
| 743 | 703 | phys_name = virt_to_phys_or_null_size(name, *name_size); |
| 744 | 704 | |
| 745 | − status = efi_thunk(get_next_variable, phys_name_size, | |
| 746 | − phys_name, phys_vendor); | |
| 705 | + if (!phys_name) | |
| 706 | + status = EFI_INVALID_PARAMETER; | |
| 707 | + else | |
| 708 | + status = efi_thunk(get_next_variable, phys_name_size, | |
| 709 | + phys_name, phys_vendor); | |
| 747 | 710 | |
| 748 | 711 | spin_unlock_irqrestore(&efi_runtime_lock, flags); |
| 749 | 712 | |
| 713 | + *vendor = *vnd; | |
| 750 | 714 | return status; |
| 751 | 715 | } |
| 752 | 716 | |
| 753 | 717 | static efi_status_t |
| 754 | 718 | efi_thunk_get_next_high_mono_count(u32 *count) |
| 755 | 719 | { |
| 756 | − efi_status_t status; | |
| 757 | − u32 phys_count; | |
| 758 | − unsigned long flags; | |
| 759 | − | |
| 760 | − spin_lock_irqsave(&efi_runtime_lock, flags); | |
| 761 | − | |
| 762 | − phys_count = virt_to_phys_or_null(count); | |
| 763 | − status = efi_thunk(get_next_high_mono_count, phys_count); | |
| 764 | − | |
| 765 | − spin_unlock_irqrestore(&efi_runtime_lock, flags); | |
| 766 | − | |
| 767 | − return status; | |
| 720 | + return EFI_UNSUPPORTED; | |
| 768 | 721 | } |
| 769 | 722 | |
| 770 | 723 | static void |
| @@ -72,6 +72,9 @@ · 71 unmodified lines | ||
| 72 | 72 | #include <asm/mwait.h> |
| 73 | 73 | #include <asm/pci_x86.h> |
| 74 | 74 | #include <asm/cpu.h> |
| 75 | +#ifdef CONFIG_X86_IOPL_IOPERM | |
| 76 | +#include <asm/io_bitmap.h> | |
| 77 | +#endif | |
| 75 | 78 | |
| 76 | 79 | #ifdef CONFIG_ACPI |
| 77 | 80 | #include <linux/acpi.h> |
| @@ -837,6 +840,25 @@ static void xen_load_sp0(unsigned long sp0) · 759 unmodified lines | ||
| 837 | 840 | this_cpu_write(cpu_tss_rw.x86_tss.sp0, sp0); |
| 838 | 841 | } |
| 839 | 842 | |
| 843 | +#ifdef CONFIG_X86_IOPL_IOPERM | |
| 844 | +static void xen_update_io_bitmap(void) | |
| 845 | +{ | |
| 846 | + struct physdev_set_iobitmap iobitmap; | |
| 847 | + struct tss_struct *tss = this_cpu_ptr(&cpu_tss_rw); | |
| 848 | + | |
| 849 | + native_tss_update_io_bitmap(); | |
| 850 | + | |
| 851 | + iobitmap.bitmap = (uint8_t *)(&tss->x86_tss) + | |
| 852 | + tss->x86_tss.io_bitmap_base; | |
| 853 | + if (tss->x86_tss.io_bitmap_base == IO_BITMAP_OFFSET_INVALID) | |
| 854 | + iobitmap.nr_ports = 0; | |
| 855 | + else | |
| 856 | + iobitmap.nr_ports = IO_BITMAP_BITS; | |
| 857 | + | |
| 858 | + HYPERVISOR_physdev_op(PHYSDEVOP_set_iobitmap, &iobitmap); | |
| 859 | +} | |
| 860 | +#endif | |
| 861 | + | |
| 840 | 862 | static void xen_io_delay(void) |
| 841 | 863 | { |
| 842 | 864 | } |
| @@ -1047,6 +1069,9 @@ static const struct pv_cpu_ops xen_cpu_ops __initconst = { · 204 unmodified lines | ||
| 1047 | 1069 | .write_idt_entry = xen_write_idt_entry, |
| 1048 | 1070 | .load_sp0 = xen_load_sp0, |
| 1049 | 1071 | |
| 1072 | +#ifdef CONFIG_X86_IOPL_IOPERM | |
| 1073 | + .update_io_bitmap = xen_update_io_bitmap, | |
| 1074 | +#endif | |
| 1050 | 1075 | .io_delay = xen_io_delay, |
| 1051 | 1076 | |
| 1052 | 1077 | /* Xen takes care of %gs when switching to usermode for us */ |
| @@ -610,12 +610,13 @@ struct bfq_group *bfq_find_set_group(struct bfq_data *bfqd, · 609 unmodified lines | ||
| 610 | 610 | */ |
| 611 | 611 | entity = &bfqg->entity; |
| 612 | 612 | for_each_entity(entity) { |
| 613 | − bfqg = container_of(entity, struct bfq_group, entity); | |
| 614 | − if (bfqg != bfqd->root_group) { | |
| 615 | − parent = bfqg_parent(bfqg); | |
| 613 | + struct bfq_group *curr_bfqg = container_of(entity, | |
| 614 | + struct bfq_group, entity); | |
| 615 | + if (curr_bfqg != bfqd->root_group) { | |
| 616 | + parent = bfqg_parent(curr_bfqg); | |
| 616 | 617 | if (!parent) |
| 617 | 618 | parent = bfqd->root_group; |
| 618 | − bfq_group_set_parent(bfqg, parent); | |
| 619 | + bfq_group_set_parent(curr_bfqg, parent); | |
| 619 | 620 | } |
| 620 | 621 | } |
| 621 | 622 | |
| @@ -1663,12 +1663,6 @@ int kblockd_schedule_work(struct work_struct *work) · 1662 unmodified lines | ||
| 1663 | 1663 | } |
| 1664 | 1664 | EXPORT_SYMBOL(kblockd_schedule_work); |
| 1665 | 1665 | |
| 1666 | −int kblockd_schedule_work_on(int cpu, struct work_struct *work) | |
| 1667 | −{ | |
| 1668 | − return queue_work_on(cpu, kblockd_workqueue, work); | |
| 1669 | −} | |
| 1670 | −EXPORT_SYMBOL(kblockd_schedule_work_on); | |
| 1671 | − | |
| 1672 | 1666 | int kblockd_mod_delayed_work_on(int cpu, struct delayed_work *dwork, |
| 1673 | 1667 | unsigned long delay) |
| 1674 | 1668 | { |
| @@ -5228,6 +5228,7 @@ static int binder_open(struct inode *nodp, struct file *filp) · 5227 unmodified lines | ||
| 5228 | 5228 | binder_dev = container_of(filp->private_data, |
| 5229 | 5229 | struct binder_device, miscdev); |
| 5230 | 5230 | } |
| 5231 | + refcount_inc(&binder_dev->ref); | |
| 5231 | 5232 | proc->context = &binder_dev->context; |
| 5232 | 5233 | binder_alloc_init(&proc->alloc); |
| 5233 | 5234 | |
| @@ -5405,6 +5406,7 @@ static int binder_node_release(struct binder_node *node, int refs) · 171 unmodified lines | ||
| 5405 | 5406 | static void binder_deferred_release(struct binder_proc *proc) |
| 5406 | 5407 | { |
| 5407 | 5408 | struct binder_context *context = proc->context; |
| 5409 | + struct binder_device *device; | |
| 5408 | 5410 | struct rb_node *n; |
| 5409 | 5411 | int threads, nodes, incoming_refs, outgoing_refs, active_transactions; |
| 5410 | 5412 | |
| @@ -5421,6 +5423,12 @@ static void binder_deferred_release(struct binder_proc *proc) · 10 unmodified lines | ||
| 5421 | 5423 | context->binder_context_mgr_node = NULL; |
| 5422 | 5424 | } |
| 5423 | 5425 | mutex_unlock(&context->context_mgr_node_lock); |
| 5426 | + device = container_of(proc->context, struct binder_device, context); | |
| 5427 | + if (refcount_dec_and_test(&device->ref)) { | |
| 5428 | + kfree(context->name); | |
| 5429 | + kfree(device); | |
| 5430 | + } | |
| 5431 | + proc->context = NULL; | |
| 5424 | 5432 | binder_inner_proc_lock(proc); |
| 5425 | 5433 | /* |
| 5426 | 5434 | * Make sure proc stays alive after we |
| @@ -6077,6 +6085,7 @@ static int __init init_binder_device(const char *name) · 650 unmodified lines | ||
| 6077 | 6085 | binder_device->miscdev.minor = MISC_DYNAMIC_MINOR; |
| 6078 | 6086 | binder_device->miscdev.name = name; |
| 6079 | 6087 | |
| 6088 | + refcount_set(&binder_device->ref, 1); | |
| 6080 | 6089 | binder_device->context.binder_context_mgr_uid = INVALID_UID; |
| 6081 | 6090 | binder_device->context.name = name; |
| 6082 | 6091 | mutex_init(&binder_device->context.context_mgr_node_lock); |
| @@ -8,6 +8,7 @@ · 7 unmodified lines | ||
| 8 | 8 | #include <linux/list.h> |
| 9 | 9 | #include <linux/miscdevice.h> |
| 10 | 10 | #include <linux/mutex.h> |
| 11 | +#include <linux/refcount.h> | |
| 11 | 12 | #include <linux/stddef.h> |
| 12 | 13 | #include <linux/types.h> |
| 13 | 14 | #include <linux/uidgid.h> |
| @@ -33,6 +34,7 @@ struct binder_device { · 19 unmodified lines | ||
| 33 | 34 | struct miscdevice miscdev; |
| 34 | 35 | struct binder_context context; |
| 35 | 36 | struct inode *binderfs_inode; |
| 37 | + refcount_t ref; | |
| 36 | 38 | }; |
| 37 | 39 | |
| 38 | 40 | /** |
| @@ -154,6 +154,7 @@ static int binderfs_binder_device_create(struct inode *ref_inode, · 153 unmodified lines | ||
| 154 | 154 | if (!name) |
| 155 | 155 | goto err; |
| 156 | 156 | |
| 157 | + refcount_set(&device->ref, 1); | |
| 157 | 158 | device->binderfs_inode = inode; |
| 158 | 159 | device->context.binder_context_mgr_uid = INVALID_UID; |
| 159 | 160 | device->context.name = name; |
| @@ -257,8 +258,10 @@ static void binderfs_evict_inode(struct inode *inode) · 97 unmodified lines | ||
| 257 | 258 | ida_free(&binderfs_minors, device->miscdev.minor); |
| 258 | 259 | mutex_unlock(&binderfs_minors_mutex); |
| 259 | 260 | |
| 260 | − kfree(device->context.name); | |
| 261 | − kfree(device); | |
| 261 | + if (refcount_dec_and_test(&device->ref)) { | |
| 262 | + kfree(device->context.name); | |
| 263 | + kfree(device); | |
| 264 | + } | |
| 262 | 265 | } |
| 263 | 266 | |
| 264 | 267 | /** |
| @@ -718,6 +718,8 @@ static void __device_links_queue_sync_state(struct device *dev, · 717 unmodified lines | ||
| 718 | 718 | { |
| 719 | 719 | struct device_link *link; |
| 720 | 720 | |
| 721 | + if (!dev_has_sync_state(dev)) | |
| 722 | + return; | |
| 721 | 723 | if (dev->state_synced) |
| 722 | 724 | return; |
| 723 | 725 | |
| @@ -745,25 +747,31 @@ static void __device_links_queue_sync_state(struct device *dev, · 21 unmodified lines | ||
| 745 | 747 | /** |
| 746 | 748 | * device_links_flush_sync_list - Call sync_state() on a list of devices |
| 747 | 749 | * @list: List of devices to call sync_state() on |
| 750 | + * @dont_lock_dev: Device for which lock is already held by the caller | |
| 748 | 751 | * |
| 749 | 752 | * Calls sync_state() on all the devices that have been queued for it. This |
| 750 | − * function is used in conjunction with __device_links_queue_sync_state(). | |
| 753 | + * function is used in conjunction with __device_links_queue_sync_state(). The | |
| 754 | + * @dont_lock_dev parameter is useful when this function is called from a | |
| 755 | + * context where a device lock is already held. | |
| 751 | 756 | */ |
| 752 | −static void device_links_flush_sync_list(struct list_head *list) | |
| 757 | +static void device_links_flush_sync_list(struct list_head *list, | |
| 758 | + struct device *dont_lock_dev) | |
| 753 | 759 | { |
| 754 | 760 | struct device *dev, *tmp; |
| 755 | 761 | |
| 756 | 762 | list_for_each_entry_safe(dev, tmp, list, links.defer_sync) { |
| 757 | 763 | list_del_init(&dev->links.defer_sync); |
| 758 | 764 | |
| 759 | − device_lock(dev); | |
| 765 | + if (dev != dont_lock_dev) | |
| 766 | + device_lock(dev); | |
| 760 | 767 | |
| 761 | 768 | if (dev->bus->sync_state) |
| 762 | 769 | dev->bus->sync_state(dev); |
| 763 | 770 | else if (dev->driver && dev->driver->sync_state) |
| 764 | 771 | dev->driver->sync_state(dev); |
| 765 | 772 | |
| 766 | − device_unlock(dev); | |
| 773 | + if (dev != dont_lock_dev) | |
| 774 | + device_unlock(dev); | |
| 767 | 775 | |
| 768 | 776 | put_device(dev); |
| 769 | 777 | } |
| @@ -801,7 +809,7 @@ void device_links_supplier_sync_state_resume(void) · 31 unmodified lines | ||
| 801 | 809 | out: |
| 802 | 810 | device_links_write_unlock(); |
| 803 | 811 | |
| 804 | − device_links_flush_sync_list(&sync_list); | |
| 812 | + device_links_flush_sync_list(&sync_list, NULL); | |
| 805 | 813 | } |
| 806 | 814 | |
| 807 | 815 | static int sync_state_resume_initcall(void) |
| @@ -813,7 +821,7 @@ late_initcall(sync_state_resume_initcall); · 5 unmodified lines | ||
| 813 | 821 | |
| 814 | 822 | static void __device_links_supplier_defer_sync(struct device *sup) |
| 815 | 823 | { |
| 816 | − if (list_empty(&sup->links.defer_sync)) | |
| 824 | + if (list_empty(&sup->links.defer_sync) && dev_has_sync_state(sup)) | |
| 817 | 825 | list_add_tail(&sup->links.defer_sync, &deferred_sync); |
| 818 | 826 | } |
| 819 | 827 | |
| @@ -865,6 +873,11 @@ void device_links_driver_bound(struct device *dev) · 45 unmodified lines | ||
| 865 | 873 | driver_deferred_probe_add(link->consumer); |
| 866 | 874 | } |
| 867 | 875 | |
| 876 | + if (defer_sync_state_count) | |
| 877 | + __device_links_supplier_defer_sync(dev); | |
| 878 | + else | |
| 879 | + __device_links_queue_sync_state(dev, &sync_list); | |
| 880 | + | |
| 868 | 881 | list_for_each_entry(link, &dev->links.suppliers, c_node) { |
| 869 | 882 | if (!(link->flags & DL_FLAG_MANAGED)) |
| 870 | 883 | continue; |
| @@ -883,7 +896,7 @@ void device_links_driver_bound(struct device *dev) · 12 unmodified lines | ||
| 883 | 896 | |
| 884 | 897 | device_links_write_unlock(); |
| 885 | 898 | |
| 886 | − device_links_flush_sync_list(&sync_list); | |
| 899 | + device_links_flush_sync_list(&sync_list, dev); | |
| 887 | 900 | } |
| 888 | 901 | |
| 889 | 902 | static void device_link_drop_managed(struct device_link *link) |
| @@ -608,6 +608,13 @@ static void software_node_release(struct kobject *kobj) · 607 unmodified lines | ||
| 608 | 608 | { |
| 609 | 609 | struct swnode *swnode = kobj_to_swnode(kobj); |
| 610 | 610 | |
| 611 | + if (swnode->parent) { | |
| 612 | + ida_simple_remove(&swnode->parent->child_ids, swnode->id); | |
| 613 | + list_del(&swnode->entry); | |
| 614 | + } else { | |
| 615 | + ida_simple_remove(&swnode_root_ids, swnode->id); | |
| 616 | + } | |
| 617 | + | |
| 611 | 618 | if (swnode->allocated) { |
| 612 | 619 | property_entries_free(swnode->node->properties); |
| 613 | 620 | kfree(swnode->node); |
| @@ -773,13 +780,6 @@ void fwnode_remove_software_node(struct fwnode_handle *fwnode) · 159 unmodified lines | ||
| 773 | 780 | if (!swnode) |
| 774 | 781 | return; |
| 775 | 782 | |
| 776 | − if (swnode->parent) { | |
| 777 | − ida_simple_remove(&swnode->parent->child_ids, swnode->id); | |
| 778 | − list_del(&swnode->entry); | |
| 779 | − } else { | |
| 780 | − ida_simple_remove(&swnode_root_ids, swnode->id); | |
| 781 | − } | |
| 782 | − | |
| 783 | 783 | kobject_put(&swnode->kobj); |
| 784 | 784 | } |
| 785 | 785 | EXPORT_SYMBOL_GPL(fwnode_remove_software_node); |
| @@ -213,6 +213,7 @@ struct blkfront_info · 212 unmodified lines | ||
| 213 | 213 | struct blk_mq_tag_set tag_set; |
| 214 | 214 | struct blkfront_ring_info *rinfo; |
| 215 | 215 | unsigned int nr_rings; |
| 216 | + unsigned int rinfo_size; | |
| 216 | 217 | /* Save uncomplete reqs and bios for migration. */ |
| 217 | 218 | struct list_head requests; |
| 218 | 219 | struct bio_list bio_list; |
| @@ -259,6 +260,18 @@ static int blkfront_setup_indirect(struct blkfront_ring_info *rinfo); · 40 unmodified lines | ||
| 259 | 260 | static void blkfront_gather_backend_features(struct blkfront_info *info); |
| 260 | 261 | static int negotiate_mq(struct blkfront_info *info); |
| 261 | 262 | |
| 263 | +#define for_each_rinfo(info, ptr, idx) \ | |
| 264 | + for ((ptr) = (info)->rinfo, (idx) = 0; \ | |
| 265 | + (idx) < (info)->nr_rings; \ | |
| 266 | + (idx)++, (ptr) = (void *)(ptr) + (info)->rinfo_size) | |
| 267 | + | |
| 268 | +static inline struct blkfront_ring_info * | |
| 269 | +get_rinfo(const struct blkfront_info *info, unsigned int i) | |
| 270 | +{ | |
| 271 | + BUG_ON(i >= info->nr_rings); | |
| 272 | + return (void *)info->rinfo + i * info->rinfo_size; | |
| 273 | +} | |
| 274 | + | |
| 262 | 275 | static int get_id_from_freelist(struct blkfront_ring_info *rinfo) |
| 263 | 276 | { |
| 264 | 277 | unsigned long free = rinfo->shadow_free; |
| @@ -883,8 +896,7 @@ static blk_status_t blkif_queue_rq(struct blk_mq_hw_ctx *hctx, · 618 unmodified lines | ||
| 883 | 896 | struct blkfront_info *info = hctx->queue->queuedata; |
| 884 | 897 | struct blkfront_ring_info *rinfo = NULL; |
| 885 | 898 | |
| 886 | − BUG_ON(info->nr_rings <= qid); | |
| 887 | − rinfo = &info->rinfo[qid]; | |
| 899 | + rinfo = get_rinfo(info, qid); | |
| 888 | 900 | blk_mq_start_request(qd->rq); |
| 889 | 901 | spin_lock_irqsave(&rinfo->ring_lock, flags); |
| 890 | 902 | if (RING_FULL(&rinfo->ring)) |
| @@ -1181,6 +1193,7 @@ static int xlvbd_alloc_gendisk(blkif_sector_t capacity, · 290 unmodified lines | ||
| 1181 | 1193 | static void xlvbd_release_gendisk(struct blkfront_info *info) |
| 1182 | 1194 | { |
| 1183 | 1195 | unsigned int minor, nr_minors, i; |
| 1196 | + struct blkfront_ring_info *rinfo; | |
| 1184 | 1197 | |
| 1185 | 1198 | if (info->rq == NULL) |
| 1186 | 1199 | return; |
| @@ -1188,9 +1201,7 @@ static void xlvbd_release_gendisk(struct blkfront_info *info) · 1 unmodified line | ||
| 1188 | 1201 | /* No more blkif_request(). */ |
| 1189 | 1202 | blk_mq_stop_hw_queues(info->rq); |
| 1190 | 1203 | |
| 1191 | − for (i = 0; i < info->nr_rings; i++) { | |
| 1192 | − struct blkfront_ring_info *rinfo = &info->rinfo[i]; | |
| 1193 | − | |
| 1204 | + for_each_rinfo(info, rinfo, i) { | |
| 1194 | 1205 | /* No more gnttab callback work. */ |
| 1195 | 1206 | gnttab_cancel_free_callback(&rinfo->callback); |
| 1196 | 1207 | |
| @@ -1339,6 +1350,7 @@ free_shadow: · 142 unmodified lines | ||
| 1339 | 1350 | static void blkif_free(struct blkfront_info *info, int suspend) |
| 1340 | 1351 | { |
| 1341 | 1352 | unsigned int i; |
| 1353 | + struct blkfront_ring_info *rinfo; | |
| 1342 | 1354 | |
| 1343 | 1355 | /* Prevent new requests being issued until we fix things up. */ |
| 1344 | 1356 | info->connected = suspend ? |
| @@ -1347,8 +1359,8 @@ static void blkif_free(struct blkfront_info *info, int suspend) · 2 unmodified lines | ||
| 1347 | 1359 | if (info->rq) |
| 1348 | 1360 | blk_mq_stop_hw_queues(info->rq); |
| 1349 | 1361 | |
| 1350 | − for (i = 0; i < info->nr_rings; i++) | |
| 1351 | − blkif_free_ring(&info->rinfo[i]); | |
| 1362 | + for_each_rinfo(info, rinfo, i) | |
| 1363 | + blkif_free_ring(rinfo); | |
| 1352 | 1364 | |
| 1353 | 1365 | kvfree(info->rinfo); |
| 1354 | 1366 | info->rinfo = NULL; |
| @@ -1775,6 +1787,7 @@ static int talk_to_blkback(struct xenbus_device *dev, · 420 unmodified lines | ||
| 1775 | 1787 | int err; |
| 1776 | 1788 | unsigned int i, max_page_order; |
| 1777 | 1789 | unsigned int ring_page_order; |
| 1790 | + struct blkfront_ring_info *rinfo; | |
| 1778 | 1791 | |
| 1779 | 1792 | if (!info) |
| 1780 | 1793 | return -ENODEV; |
| @@ -1788,9 +1801,7 @@ static int talk_to_blkback(struct xenbus_device *dev, · 7 unmodified lines | ||
| 1788 | 1801 | if (err) |
| 1789 | 1802 | goto destroy_blkring; |
| 1790 | 1803 | |
| 1791 | − for (i = 0; i < info->nr_rings; i++) { | |
| 1792 | − struct blkfront_ring_info *rinfo = &info->rinfo[i]; | |
| 1793 | − | |
| 1804 | + for_each_rinfo(info, rinfo, i) { | |
| 1794 | 1805 | /* Create shared ring, alloc event channel. */ |
| 1795 | 1806 | err = setup_blkring(dev, rinfo); |
| 1796 | 1807 | if (err) |
| @@ -1815,7 +1826,7 @@ again: · 18 unmodified lines | ||
| 1815 | 1826 | |
| 1816 | 1827 | /* We already got the number of queues/rings in _probe */ |
| 1817 | 1828 | if (info->nr_rings == 1) { |
| 1818 | − err = write_per_ring_nodes(xbt, &info->rinfo[0], dev->nodename); | |
| 1829 | + err = write_per_ring_nodes(xbt, info->rinfo, dev->nodename); | |
| 1819 | 1830 | if (err) |
| 1820 | 1831 | goto destroy_blkring; |
| 1821 | 1832 | } else { |
| @@ -1837,10 +1848,10 @@ again: · 15 unmodified lines | ||
| 1837 | 1848 | goto abort_transaction; |
| 1838 | 1849 | } |
| 1839 | 1850 | |
| 1840 | − for (i = 0; i < info->nr_rings; i++) { | |
| 1851 | + for_each_rinfo(info, rinfo, i) { | |
| 1841 | 1852 | memset(path, 0, pathsize); |
| 1842 | 1853 | snprintf(path, pathsize, "%s/queue-%u", dev->nodename, i); |
| 1843 | − err = write_per_ring_nodes(xbt, &info->rinfo[i], path); | |
| 1854 | + err = write_per_ring_nodes(xbt, rinfo, path); | |
| 1844 | 1855 | if (err) { |
| 1845 | 1856 | kfree(path); |
| 1846 | 1857 | goto destroy_blkring; |
| @@ -1868,9 +1879,8 @@ again: · 21 unmodified lines | ||
| 1868 | 1879 | goto destroy_blkring; |
| 1869 | 1880 | } |
| 1870 | 1881 | |
| 1871 | − for (i = 0; i < info->nr_rings; i++) { | |
| 1882 | + for_each_rinfo(info, rinfo, i) { | |
| 1872 | 1883 | unsigned int j; |
| 1873 | − struct blkfront_ring_info *rinfo = &info->rinfo[i]; | |
| 1874 | 1884 | |
| 1875 | 1885 | for (j = 0; j < BLK_RING_SIZE(info); j++) |
| 1876 | 1886 | rinfo->shadow[j].req.u.rw.id = j + 1; |
| @@ -1900,6 +1910,7 @@ static int negotiate_mq(struct blkfront_info *info) · 23 unmodified lines | ||
| 1900 | 1910 | { |
| 1901 | 1911 | unsigned int backend_max_queues; |
| 1902 | 1912 | unsigned int i; |
| 1913 | + struct blkfront_ring_info *rinfo; | |
| 1903 | 1914 | |
| 1904 | 1915 | BUG_ON(info->nr_rings); |
| 1905 | 1916 | |
| @@ -1911,20 +1922,16 @@ static int negotiate_mq(struct blkfront_info *info) · 5 unmodified lines | ||
| 1911 | 1922 | if (!info->nr_rings) |
| 1912 | 1923 | info->nr_rings = 1; |
| 1913 | 1924 | |
| 1914 | − info->rinfo = kvcalloc(info->nr_rings, | |
| 1915 | − struct_size(info->rinfo, shadow, | |
| 1916 | − BLK_RING_SIZE(info)), | |
| 1917 | − GFP_KERNEL); | |
| 1925 | + info->rinfo_size = struct_size(info->rinfo, shadow, | |
| 1926 | + BLK_RING_SIZE(info)); | |
| 1927 | + info->rinfo = kvcalloc(info->nr_rings, info->rinfo_size, GFP_KERNEL); | |
| 1918 | 1928 | if (!info->rinfo) { |
| 1919 | 1929 | xenbus_dev_fatal(info->xbdev, -ENOMEM, "allocating ring_info structure"); |
| 1920 | 1930 | info->nr_rings = 0; |
| 1921 | 1931 | return -ENOMEM; |
| 1922 | 1932 | } |
| 1923 | 1933 | |
| 1924 | − for (i = 0; i < info->nr_rings; i++) { | |
| 1925 | − struct blkfront_ring_info *rinfo; | |
| 1926 | − | |
| 1927 | − rinfo = &info->rinfo[i]; | |
| 1934 | + for_each_rinfo(info, rinfo, i) { | |
| 1928 | 1935 | INIT_LIST_HEAD(&rinfo->indirect_pages); |
| 1929 | 1936 | INIT_LIST_HEAD(&rinfo->grants); |
| 1930 | 1937 | rinfo->dev_info = info; |
| @@ -2017,6 +2024,7 @@ static int blkif_recover(struct blkfront_info *info) · 86 unmodified lines | ||
| 2017 | 2024 | int rc; |
| 2018 | 2025 | struct bio *bio; |
| 2019 | 2026 | unsigned int segs; |
| 2027 | + struct blkfront_ring_info *rinfo; | |
| 2020 | 2028 | |
| 2021 | 2029 | blkfront_gather_backend_features(info); |
| 2022 | 2030 | /* Reset limits changed by blk_mq_update_nr_hw_queues(). */ |
| @@ -2024,9 +2032,7 @@ static int blkif_recover(struct blkfront_info *info) · 1 unmodified line | ||
| 2024 | 2032 | segs = info->max_indirect_segments ? : BLKIF_MAX_SEGMENTS_PER_REQUEST; |
| 2025 | 2033 | blk_queue_max_segments(info->rq, segs / GRANTS_PER_PSEG); |
| 2026 | 2034 | |
| 2027 | − for (r_index = 0; r_index < info->nr_rings; r_index++) { | |
| 2028 | − struct blkfront_ring_info *rinfo = &info->rinfo[r_index]; | |
| 2029 | − | |
| 2035 | + for_each_rinfo(info, rinfo, r_index) { | |
| 2030 | 2036 | rc = blkfront_setup_indirect(rinfo); |
| 2031 | 2037 | if (rc) |
| 2032 | 2038 | return rc; |
| @@ -2036,10 +2042,7 @@ static int blkif_recover(struct blkfront_info *info) · 3 unmodified lines | ||
| 2036 | 2042 | /* Now safe for us to use the shared ring */ |
| 2037 | 2043 | info->connected = BLKIF_STATE_CONNECTED; |
| 2038 | 2044 | |
| 2039 | − for (r_index = 0; r_index < info->nr_rings; r_index++) { | |
| 2040 | − struct blkfront_ring_info *rinfo; | |
| 2041 | − | |
| 2042 | − rinfo = &info->rinfo[r_index]; | |
| 2045 | + for_each_rinfo(info, rinfo, r_index) { | |
| 2043 | 2046 | /* Kick any other new requests queued since we resumed */ |
| 2044 | 2047 | kick_pending_request_queues(rinfo); |
| 2045 | 2048 | } |
| @@ -2072,13 +2075,13 @@ static int blkfront_resume(struct xenbus_device *dev) · 26 unmodified lines | ||
| 2072 | 2075 | struct blkfront_info *info = dev_get_drvdata(&dev->dev); |
| 2073 | 2076 | int err = 0; |
| 2074 | 2077 | unsigned int i, j; |
| 2078 | + struct blkfront_ring_info *rinfo; | |
| 2075 | 2079 | |
| 2076 | 2080 | dev_dbg(&dev->dev, "blkfront_resume: %s\n", dev->nodename); |
| 2077 | 2081 | |
| 2078 | 2082 | bio_list_init(&info->bio_list); |
| 2079 | 2083 | INIT_LIST_HEAD(&info->requests); |
| 2080 | − for (i = 0; i < info->nr_rings; i++) { | |
| 2081 | − struct blkfront_ring_info *rinfo = &info->rinfo[i]; | |
| 2084 | + for_each_rinfo(info, rinfo, i) { | |
| 2082 | 2085 | struct bio_list merge_bio; |
| 2083 | 2086 | struct blk_shadow *shadow = rinfo->shadow; |
| 2084 | 2087 | |
| @@ -2337,6 +2340,7 @@ static void blkfront_connect(struct blkfront_info *info) · 252 unmodified lines | ||
| 2337 | 2340 | unsigned int binfo; |
| 2338 | 2341 | char *envp[] = { "RESIZE=1", NULL }; |
| 2339 | 2342 | int err, i; |
| 2343 | + struct blkfront_ring_info *rinfo; | |
| 2340 | 2344 | |
| 2341 | 2345 | switch (info->connected) { |
| 2342 | 2346 | case BLKIF_STATE_CONNECTED: |
| @@ -2394,8 +2398,8 @@ static void blkfront_connect(struct blkfront_info *info) · 51 unmodified lines | ||
| 2394 | 2398 | "physical-sector-size", |
| 2395 | 2399 | sector_size); |
| 2396 | 2400 | blkfront_gather_backend_features(info); |
| 2397 | − for (i = 0; i < info->nr_rings; i++) { | |
| 2398 | − err = blkfront_setup_indirect(&info->rinfo[i]); | |
| 2401 | + for_each_rinfo(info, rinfo, i) { | |
| 2402 | + err = blkfront_setup_indirect(rinfo); | |
| 2399 | 2403 | if (err) { |
| 2400 | 2404 | xenbus_dev_fatal(info->xbdev, err, "setup_indirect at %s", |
| 2401 | 2405 | info->xbdev->otherend); |
| @@ -2416,8 +2420,8 @@ static void blkfront_connect(struct blkfront_info *info) · 14 unmodified lines | ||
| 2416 | 2420 | |
| 2417 | 2421 | /* Kick pending requests. */ |
| 2418 | 2422 | info->connected = BLKIF_STATE_CONNECTED; |
| 2419 | − for (i = 0; i < info->nr_rings; i++) | |
| 2420 | − kick_pending_request_queues(&info->rinfo[i]); | |
| 2423 | + for_each_rinfo(info, rinfo, i) | |
| 2424 | + kick_pending_request_queues(rinfo); | |
| 2421 | 2425 | |
| 2422 | 2426 | device_add_disk(&info->xbdev->dev, info->gd, NULL); |
| 2423 | 2427 | |
| @@ -2652,9 +2656,9 @@ static void purge_persistent_grants(struct blkfront_info *info) · 228 unmodified lines | ||
| 2652 | 2656 | { |
| 2653 | 2657 | unsigned int i; |
| 2654 | 2658 | unsigned long flags; |
| 2659 | + struct blkfront_ring_info *rinfo; | |
| 2655 | 2660 | |
| 2656 | − for (i = 0; i < info->nr_rings; i++) { | |
| 2657 | − struct blkfront_ring_info *rinfo = &info->rinfo[i]; | |
| 2661 | + for_each_rinfo(info, rinfo, i) { | |
| 2658 | 2662 | struct grant *gnt_list_entry, *tmp; |
| 2659 | 2663 | |
| 2660 | 2664 | spin_lock_irqsave(&rinfo->ring_lock, flags); |
| @@ -1400,7 +1400,7 @@ static void sysc_init_revision_quirks(struct sysc *ddata) · 1399 unmodified lines | ||
| 1400 | 1400 | } |
| 1401 | 1401 | |
| 1402 | 1402 | /* 1-wire needs module's internal clocks enabled for reset */ |
| 1403 | −static void sysc_clk_enable_quirk_hdq1w(struct sysc *ddata) | |
| 1403 | +static void sysc_pre_reset_quirk_hdq1w(struct sysc *ddata) | |
| 1404 | 1404 | { |
| 1405 | 1405 | int offset = 0x0c; /* HDQ_CTRL_STATUS */ |
| 1406 | 1406 | u16 val; |
| @@ -1488,7 +1488,7 @@ static void sysc_init_module_quirks(struct sysc *ddata) · 81 unmodified lines | ||
| 1488 | 1488 | return; |
| 1489 | 1489 | |
| 1490 | 1490 | if (ddata->cfg.quirks & SYSC_MODULE_QUIRK_HDQ1W) { |
| 1491 | − ddata->clk_enable_quirk = sysc_clk_enable_quirk_hdq1w; | |
| 1491 | + ddata->clk_disable_quirk = sysc_pre_reset_quirk_hdq1w; | |
| 1492 | 1492 | |
| 1493 | 1493 | return; |
| 1494 | 1494 | } |
| @@ -108,6 +108,7 @@ static int dma_buf_release(struct inode *inode, struct file *file) · 107 unmodified lines | ||
| 108 | 108 | dma_resv_fini(dmabuf->resv); |
| 109 | 109 | |
| 110 | 110 | module_put(dmabuf->owner); |
| 111 | + kfree(dmabuf->name); | |
| 111 | 112 | kfree(dmabuf); |
| 112 | 113 | return 0; |
| 113 | 114 | } |
| @@ -1947,8 +1947,6 @@ static void dma_tc_handle(struct coh901318_chan *cohc) · 1946 unmodified lines | ||
| 1947 | 1947 | return; |
| 1948 | 1948 | } |
| 1949 | 1949 | |
| 1950 | − spin_lock(&cohc->lock); | |
| 1951 | − | |
| 1952 | 1950 | /* |
| 1953 | 1951 | * When we reach this point, at least one queue item |
| 1954 | 1952 | * should have been moved over from cohc->queue to |
| @@ -1969,8 +1967,6 @@ static void dma_tc_handle(struct coh901318_chan *cohc) · 14 unmodified lines | ||
| 1969 | 1967 | if (coh901318_queue_start(cohc) == NULL) |
| 1970 | 1968 | cohc->busy = 0; |
| 1971 | 1969 | |
| 1972 | − spin_unlock(&cohc->lock); | |
| 1973 | − | |
| 1974 | 1970 | /* |
| 1975 | 1971 | * This tasklet will remove items from cohc->active |
| 1976 | 1972 | * and thus terminates them. |
| @@ -204,6 +204,7 @@ static int idxd_wq_cdev_dev_setup(struct idxd_wq *wq) · 203 unmodified lines | ||
| 204 | 204 | minor = ida_simple_get(&cdev_ctx->minor_ida, 0, MINORMASK, GFP_KERNEL); |
| 205 | 205 | if (minor < 0) { |
| 206 | 206 | rc = minor; |
| 207 | + kfree(dev); | |
| 207 | 208 | goto ida_err; |
| 208 | 209 | } |
| 209 | 210 | |
| @@ -212,7 +213,6 @@ static int idxd_wq_cdev_dev_setup(struct idxd_wq *wq) · 2 unmodified lines | ||
| 212 | 213 | rc = device_register(dev); |
| 213 | 214 | if (rc < 0) { |
| 214 | 215 | dev_err(&idxd->pdev->dev, "device register failed\n"); |
| 215 | − put_device(dev); | |
| 216 | 216 | goto dev_reg_err; |
| 217 | 217 | } |
| 218 | 218 | idxd_cdev->minor = minor; |
| @@ -221,8 +221,8 @@ static int idxd_wq_cdev_dev_setup(struct idxd_wq *wq) · 2 unmodified lines | ||
| 221 | 221 | |
| 222 | 222 | dev_reg_err: |
| 223 | 223 | ida_simple_remove(&cdev_ctx->minor_ida, MINOR(dev->devt)); |
| 224 | + put_device(dev); | |
| 224 | 225 | ida_err: |
| 225 | − kfree(dev); | |
| 226 | 226 | idxd_cdev->dev = NULL; |
| 227 | 227 | return rc; |
| 228 | 228 | } |
| @@ -124,6 +124,7 @@ static int idxd_config_bus_probe(struct device *dev) · 123 unmodified lines | ||
| 124 | 124 | rc = idxd_device_config(idxd); |
| 125 | 125 | if (rc < 0) { |
| 126 | 126 | spin_unlock_irqrestore(&idxd->dev_lock, flags); |
| 127 | + module_put(THIS_MODULE); | |
| 127 | 128 | dev_warn(dev, "Device config failed: %d\n", rc); |
| 128 | 129 | return rc; |
| 129 | 130 | } |
| @@ -132,6 +133,7 @@ static int idxd_config_bus_probe(struct device *dev) · 2 unmodified lines | ||
| 132 | 133 | rc = idxd_device_enable(idxd); |
| 133 | 134 | if (rc < 0) { |
| 134 | 135 | spin_unlock_irqrestore(&idxd->dev_lock, flags); |
| 136 | + module_put(THIS_MODULE); | |
| 135 | 137 | dev_warn(dev, "Device enable failed: %d\n", rc); |
| 136 | 138 | return rc; |
| 137 | 139 | } |
| @@ -142,6 +144,7 @@ static int idxd_config_bus_probe(struct device *dev) · 4 unmodified lines | ||
| 142 | 144 | rc = idxd_register_dma_device(idxd); |
| 143 | 145 | if (rc < 0) { |
| 144 | 146 | spin_unlock_irqrestore(&idxd->dev_lock, flags); |
| 147 | + module_put(THIS_MODULE); | |
| 145 | 148 | dev_dbg(dev, "Failed to register dmaengine device\n"); |
| 146 | 149 | return rc; |
| 147 | 150 | } |
| @@ -516,7 +519,7 @@ static ssize_t group_tokens_reserved_store(struct device *dev, · 368 unmodified lines | ||
| 516 | 519 | if (val > idxd->max_tokens) |
| 517 | 520 | return -EINVAL; |
| 518 | 521 | |
| 519 | − if (val > idxd->nr_tokens) | |
| 522 | + if (val > idxd->nr_tokens + group->tokens_reserved) | |
| 520 | 523 | return -EINVAL; |
| 521 | 524 | |
| 522 | 525 | group->tokens_reserved = val; |
| @@ -901,6 +904,20 @@ static ssize_t wq_size_show(struct device *dev, struct device_attribute *attr, · 378 unmodified lines | ||
| 901 | 904 | return sprintf(buf, "%u\n", wq->size); |
| 902 | 905 | } |
| 903 | 906 | |
| 907 | +static int total_claimed_wq_size(struct idxd_device *idxd) | |
| 908 | +{ | |
| 909 | + int i; | |
| 910 | + int wq_size = 0; | |
| 911 | + | |
| 912 | + for (i = 0; i < idxd->max_wqs; i++) { | |
| 913 | + struct idxd_wq *wq = &idxd->wqs[i]; | |
| 914 | + | |
| 915 | + wq_size += wq->size; | |
| 916 | + } | |
| 917 | + | |
| 918 | + return wq_size; | |
| 919 | +} | |
| 920 | + | |
| 904 | 921 | static ssize_t wq_size_store(struct device *dev, |
| 905 | 922 | struct device_attribute *attr, const char *buf, |
| 906 | 923 | size_t count) |
| @@ -920,7 +937,7 @@ static ssize_t wq_size_store(struct device *dev, · 13 unmodified lines | ||
| 920 | 937 | if (wq->state != IDXD_WQ_DISABLED) |
| 921 | 938 | return -EPERM; |
| 922 | 939 | |
| 923 | − if (size > idxd->max_wq_size) | |
| 940 | + if (size + total_claimed_wq_size(idxd) - wq->size > idxd->max_wq_size) | |
| 924 | 941 | return -EINVAL; |
| 925 | 942 | |
| 926 | 943 | wq->size = size; |
| @@ -999,12 +1016,14 @@ static ssize_t wq_type_store(struct device *dev, · 72 unmodified lines | ||
| 999 | 1016 | return -EPERM; |
| 1000 | 1017 | |
| 1001 | 1018 | old_type = wq->type; |
| 1002 | − if (sysfs_streq(buf, idxd_wq_type_names[IDXD_WQT_KERNEL])) | |
| 1019 | + if (sysfs_streq(buf, idxd_wq_type_names[IDXD_WQT_NONE])) | |
| 1020 | + wq->type = IDXD_WQT_NONE; | |
| 1021 | + else if (sysfs_streq(buf, idxd_wq_type_names[IDXD_WQT_KERNEL])) | |
| 1003 | 1022 | wq->type = IDXD_WQT_KERNEL; |
| 1004 | 1023 | else if (sysfs_streq(buf, idxd_wq_type_names[IDXD_WQT_USER])) |
| 1005 | 1024 | wq->type = IDXD_WQT_USER; |
| 1006 | 1025 | else |
| 1007 | − wq->type = IDXD_WQT_NONE; | |
| 1026 | + return -EINVAL; | |
| 1008 | 1027 | |
| 1009 | 1028 | /* If we are changing queue type, clear the name */ |
| 1010 | 1029 | if (wq->type != old_type) |
| @@ -1331,13 +1331,14 @@ static void sdma_free_chan_resources(struct dma_chan *chan) · 1330 unmodified lines | ||
| 1331 | 1331 | |
| 1332 | 1332 | sdma_channel_synchronize(chan); |
| 1333 | 1333 | |
| 1334 | − if (sdmac->event_id0) | |
| 1334 | + if (sdmac->event_id0 >= 0) | |
| 1335 | 1335 | sdma_event_disable(sdmac, sdmac->event_id0); |
| 1336 | 1336 | if (sdmac->event_id1) |
| 1337 | 1337 | sdma_event_disable(sdmac, sdmac->event_id1); |
| 1338 | 1338 | |
| 1339 | 1339 | sdmac->event_id0 = 0; |
| 1340 | 1340 | sdmac->event_id1 = 0; |
| 1341 | + sdmac->context_loaded = false; | |
| 1341 | 1342 | |
| 1342 | 1343 | sdma_set_channel_priority(sdmac, 0); |
| 1343 | 1344 | |
| @@ -1631,7 +1632,7 @@ static int sdma_config(struct dma_chan *chan, · 287 unmodified lines | ||
| 1631 | 1632 | memcpy(&sdmac->slave_config, dmaengine_cfg, sizeof(*dmaengine_cfg)); |
| 1632 | 1633 | |
| 1633 | 1634 | /* Set ENBLn earlier to make sure dma request triggered after that */ |
| 1634 | − if (sdmac->event_id0) { | |
| 1635 | + if (sdmac->event_id0 >= 0) { | |
| 1635 | 1636 | if (sdmac->event_id0 >= sdmac->sdma->drvdata->num_events) |
| 1636 | 1637 | return -EINVAL; |
| 1637 | 1638 | sdma_event_enable(sdmac, sdmac->event_id0); |
| @@ -281,7 +281,7 @@ static struct tegra_dma_desc *tegra_dma_desc_get( · 280 unmodified lines | ||
| 281 | 281 | |
| 282 | 282 | /* Do not allocate if desc are waiting for ack */ |
| 283 | 283 | list_for_each_entry(dma_desc, &tdc->free_dma_desc, node) { |
| 284 | − if (async_tx_test_ack(&dma_desc->txd)) { | |
| 284 | + if (async_tx_test_ack(&dma_desc->txd) && !dma_desc->cb_count) { | |
| 285 | 285 | list_del(&dma_desc->node); |
| 286 | 286 | spin_unlock_irqrestore(&tdc->lock, flags); |
| 287 | 287 | dma_desc->txd.flags = 0; |
| @@ -756,10 +756,6 @@ static int tegra_dma_terminate_all(struct dma_chan *dc) · 468 unmodified lines | ||
| 756 | 756 | bool was_busy; |
| 757 | 757 | |
| 758 | 758 | spin_lock_irqsave(&tdc->lock, flags); |
| 759 | − if (list_empty(&tdc->pending_sg_req)) { | |
| 760 | − spin_unlock_irqrestore(&tdc->lock, flags); | |
| 761 | − return 0; | |
| 762 | − } | |
| 763 | 759 | |
| 764 | 760 | if (!tdc->busy) |
| 765 | 761 | goto skip_dma_stop; |
| @@ -5,6 +5,7 @@ · 4 unmodified lines | ||
| 5 | 5 | */ |
| 6 | 6 | |
| 7 | 7 | #include <linux/kernel.h> |
| 8 | +#include <linux/delay.h> | |
| 8 | 9 | #include <linux/dmaengine.h> |
| 9 | 10 | #include <linux/dma-mapping.h> |
| 10 | 11 | #include <linux/dmapool.h> |
| @@ -96,6 +97,24 @@ struct udma_match_data { · 85 unmodified lines | ||
| 96 | 97 | u32 level_start_idx[]; |
| 97 | 98 | }; |
| 98 | 99 | |
| 100 | +struct udma_hwdesc { | |
| 101 | + size_t cppi5_desc_size; | |
| 102 | + void *cppi5_desc_vaddr; | |
| 103 | + dma_addr_t cppi5_desc_paddr; | |
| 104 | + | |
| 105 | + /* TR descriptor internal pointers */ | |
| 106 | + void *tr_req_base; | |
| 107 | + struct cppi5_tr_resp_t *tr_resp_base; | |
| 108 | +}; | |
| 109 | + | |
| 110 | +struct udma_rx_flush { | |
| 111 | + struct udma_hwdesc hwdescs[2]; | |
| 112 | + | |
| 113 | + size_t buffer_size; | |
| 114 | + void *buffer_vaddr; | |
| 115 | + dma_addr_t buffer_paddr; | |
| 116 | +}; | |
| 117 | + | |
| 99 | 118 | struct udma_dev { |
| 100 | 119 | struct dma_device ddev; |
| 101 | 120 | struct device *dev; |
| @@ -112,6 +131,8 @@ struct udma_dev { · 10 unmodified lines | ||
| 112 | 131 | struct list_head desc_to_purge; |
| 113 | 132 | spinlock_t lock; |
| 114 | 133 | |
| 134 | + struct udma_rx_flush rx_flush; | |
| 135 | + | |
| 115 | 136 | int tchan_cnt; |
| 116 | 137 | int echan_cnt; |
| 117 | 138 | int rchan_cnt; |
| @@ -130,16 +151,6 @@ struct udma_dev { · 12 unmodified lines | ||
| 130 | 151 | u32 psil_base; |
| 131 | 152 | }; |
| 132 | 153 | |
| 133 | −struct udma_hwdesc { | |
| 134 | − size_t cppi5_desc_size; | |
| 135 | − void *cppi5_desc_vaddr; | |
| 136 | − dma_addr_t cppi5_desc_paddr; | |
| 137 | − | |
| 138 | − /* TR descriptor internal pointers */ | |
| 139 | − void *tr_req_base; | |
| 140 | − struct cppi5_tr_resp_t *tr_resp_base; | |
| 141 | −}; | |
| 142 | − | |
| 143 | 154 | struct udma_desc { |
| 144 | 155 | struct virt_dma_desc vd; |
| 145 | 156 | |
| @@ -169,7 +180,7 @@ enum udma_chan_state { · 23 unmodified lines | ||
| 169 | 180 | |
| 170 | 181 | struct udma_tx_drain { |
| 171 | 182 | struct delayed_work work; |
| 172 | − unsigned long jiffie; | |
| 183 | + ktime_t tstamp; | |
| 173 | 184 | u32 residue; |
| 174 | 185 | }; |
| 175 | 186 | |
| @@ -502,7 +513,7 @@ static bool udma_is_chan_paused(struct udma_chan *uc) · 326 unmodified lines | ||
| 502 | 513 | { |
| 503 | 514 | u32 val, pause_mask; |
| 504 | 515 | |
| 505 | − switch (uc->desc->dir) { | |
| 516 | + switch (uc->config.dir) { | |
| 506 | 517 | case DMA_DEV_TO_MEM: |
| 507 | 518 | val = udma_rchanrt_read(uc->rchan, |
| 508 | 519 | UDMA_RCHAN_RT_PEER_RT_EN_REG); |
| @@ -551,12 +562,17 @@ static void udma_sync_for_device(struct udma_chan *uc, int idx) · 42 unmodified lines | ||
| 551 | 562 | } |
| 552 | 563 | } |
| 553 | 564 | |
| 565 | +static inline dma_addr_t udma_get_rx_flush_hwdesc_paddr(struct udma_chan *uc) | |
| 566 | +{ | |
| 567 | + return uc->ud->rx_flush.hwdescs[uc->config.pkt_mode].cppi5_desc_paddr; | |
| 568 | +} | |
| 569 | + | |
| 554 | 570 | static int udma_push_to_ring(struct udma_chan *uc, int idx) |
| 555 | 571 | { |
| 556 | 572 | struct udma_desc *d = uc->desc; |
| 557 | − | |
| 558 | 573 | struct k3_ring *ring = NULL; |
| 559 | − int ret = -EINVAL; | |
| 574 | + dma_addr_t paddr; | |
| 575 | + int ret; | |
| 560 | 576 | |
| 561 | 577 | switch (uc->config.dir) { |
| 562 | 578 | case DMA_DEV_TO_MEM: |
| @@ -567,21 +583,37 @@ static int udma_push_to_ring(struct udma_chan *uc, int idx) · 4 unmodified lines | ||
| 567 | 583 | ring = uc->tchan->t_ring; |
| 568 | 584 | break; |
| 569 | 585 | default: |
| 570 | − break; | |
| 586 | + return -EINVAL; | |
| 571 | 587 | } |
| 572 | 588 | |
| 573 | − if (ring) { | |
| 574 | − dma_addr_t desc_addr = udma_curr_cppi5_desc_paddr(d, idx); | |
| 589 | + /* RX flush packet: idx == -1 is only passed in case of DEV_TO_MEM */ | |
| 590 | + if (idx == -1) { | |
| 591 | + paddr = udma_get_rx_flush_hwdesc_paddr(uc); | |
| 592 | + } else { | |
| 593 | + paddr = udma_curr_cppi5_desc_paddr(d, idx); | |
| 575 | 594 | |
| 576 | 595 | wmb(); /* Ensure that writes are not moved over this point */ |
| 577 | 596 | udma_sync_for_device(uc, idx); |
| 578 | − ret = k3_ringacc_ring_push(ring, &desc_addr); | |
| 579 | − uc->in_ring_cnt++; | |
| 580 | 597 | } |
| 581 | 598 | |
| 599 | + ret = k3_ringacc_ring_push(ring, &paddr); | |
| 600 | + if (!ret) | |
| 601 | + uc->in_ring_cnt++; | |
| 602 | + | |
| 582 | 603 | return ret; |
| 583 | 604 | } |
| 584 | 605 | |
| 606 | +static bool udma_desc_is_rx_flush(struct udma_chan *uc, dma_addr_t addr) | |
| 607 | +{ | |
| 608 | + if (uc->config.dir != DMA_DEV_TO_MEM) | |
| 609 | + return false; | |
| 610 | + | |
| 611 | + if (addr == udma_get_rx_flush_hwdesc_paddr(uc)) | |
| 612 | + return true; | |
| 613 | + | |
| 614 | + return false; | |
| 615 | +} | |
| 616 | + | |
| 585 | 617 | static int udma_pop_from_ring(struct udma_chan *uc, dma_addr_t *addr) |
| 586 | 618 | { |
| 587 | 619 | struct k3_ring *ring = NULL; |
| @@ -610,6 +642,10 @@ static int udma_pop_from_ring(struct udma_chan *uc, dma_addr_t *addr) · 22 unmodified lines | ||
| 610 | 642 | if (cppi5_desc_is_tdcm(*addr)) |
| 611 | 643 | return ret; |
| 612 | 644 | |
| 645 | + /* Check for flush descriptor */ | |
| 646 | + if (udma_desc_is_rx_flush(uc, *addr)) | |
| 647 | + return -ENOENT; | |
| 648 | + | |
| 613 | 649 | d = udma_udma_desc_from_paddr(uc, *addr); |
| 614 | 650 | |
| 615 | 651 | if (d) |
| @@ -890,6 +926,9 @@ static int udma_stop(struct udma_chan *uc) · 274 unmodified lines | ||
| 890 | 926 | |
| 891 | 927 | switch (uc->config.dir) { |
| 892 | 928 | case DMA_DEV_TO_MEM: |
| 929 | + if (!uc->cyclic && !uc->desc) | |
| 930 | + udma_push_to_ring(uc, -1); | |
| 931 | + | |
| 893 | 932 | udma_rchanrt_write(uc->rchan, UDMA_RCHAN_RT_PEER_RT_EN_REG, |
| 894 | 933 | UDMA_PEER_RT_EN_ENABLE | |
| 895 | 934 | UDMA_PEER_RT_EN_TEARDOWN); |
| @@ -946,9 +985,10 @@ static bool udma_is_desc_really_done(struct udma_chan *uc, struct udma_desc *d) · 50 unmodified lines | ||
| 946 | 985 | peer_bcnt = udma_tchanrt_read(uc->tchan, UDMA_TCHAN_RT_PEER_BCNT_REG); |
| 947 | 986 | bcnt = udma_tchanrt_read(uc->tchan, UDMA_TCHAN_RT_BCNT_REG); |
| 948 | 987 | |
| 988 | + /* Transfer is incomplete, store current residue and time stamp */ | |
| 949 | 989 | if (peer_bcnt < bcnt) { |
| 950 | 990 | uc->tx_drain.residue = bcnt - peer_bcnt; |
| 951 | − uc->tx_drain.jiffie = jiffies; | |
| 991 | + uc->tx_drain.tstamp = ktime_get(); | |
| 952 | 992 | return false; |
| 953 | 993 | } |
| 954 | 994 | |
| @@ -961,35 +1001,59 @@ static void udma_check_tx_completion(struct work_struct *work) · 6 unmodified lines | ||
| 961 | 1001 | tx_drain.work.work); |
| 962 | 1002 | bool desc_done = true; |
| 963 | 1003 | u32 residue_diff; |
| 964 | − unsigned long jiffie_diff, delay; | |
| 1004 | + ktime_t time_diff; | |
| 1005 | + unsigned long delay; | |
| 1006 | + | |
| 1007 | + while (1) { | |
| 1008 | + if (uc->desc) { | |
| 1009 | + /* Get previous residue and time stamp */ | |
| 1010 | + residue_diff = uc->tx_drain.residue; | |
| 1011 | + time_diff = uc->tx_drain.tstamp; | |
| 1012 | + /* | |
| 1013 | + * Get current residue and time stamp or see if | |
| 1014 | + * transfer is complete | |
| 1015 | + */ | |
| 1016 | + desc_done = udma_is_desc_really_done(uc, uc->desc); | |
| 1017 | + } | |
| 965 | 1018 | |
| 966 | − if (uc->desc) { | |
| 967 | − residue_diff = uc->tx_drain.residue; | |
| 968 | − jiffie_diff = uc->tx_drain.jiffie; | |
| 969 | − desc_done = udma_is_desc_really_done(uc, uc->desc); | |
| 970 | − } | |
| 971 | − | |
| 972 | − if (!desc_done) { | |
| 973 | − jiffie_diff = uc->tx_drain.jiffie - jiffie_diff; | |
| 974 | − residue_diff -= uc->tx_drain.residue; | |
| 975 | − if (residue_diff) { | |
| 976 | − /* Try to guess when we should check next time */ | |
| 977 | − residue_diff /= jiffie_diff; | |
| 978 | − delay = uc->tx_drain.residue / residue_diff / 3; | |
| 979 | − if (jiffies_to_msecs(delay) < 5) | |
| 980 | − delay = 0; | |
| 981 | − } else { | |
| 982 | − /* No progress, check again in 1 second */ | |
| 983 | − delay = HZ; | |
| 1019 | + if (!desc_done) { | |
| 1020 | + /* | |
| 1021 | + * Find the time delta and residue delta w.r.t | |
| 1022 | + * previous poll | |
| 1023 | + */ | |
| 1024 | + time_diff = ktime_sub(uc->tx_drain.tstamp, | |
| 1025 | + time_diff) + 1; | |
| 1026 | + residue_diff -= uc->tx_drain.residue; | |
| 1027 | + if (residue_diff) { | |
| 1028 | + /* | |
| 1029 | + * Try to guess when we should check | |
| 1030 | + * next time by calculating rate at | |
| 1031 | + * which data is being drained at the | |
| 1032 | + * peer device | |
| 1033 | + */ | |
| 1034 | + delay = (time_diff / residue_diff) * | |
| 1035 | + uc->tx_drain.residue; | |
| 1036 | + } else { | |
| 1037 | + /* No progress, check again in 1 second */ | |
| 1038 | + schedule_delayed_work(&uc->tx_drain.work, HZ); | |
| 1039 | + break; | |
| 1040 | + } | |
| 1041 | + | |
| 1042 | + usleep_range(ktime_to_us(delay), | |
| 1043 | + ktime_to_us(delay) + 10); | |
| 1044 | + continue; | |
| 984 | 1045 | } |
| 985 | 1046 | |
| 986 | − schedule_delayed_work(&uc->tx_drain.work, delay); | |
| 987 | − } else if (uc->desc) { | |
| 988 | − struct udma_desc *d = uc->desc; | |
| 1047 | + if (uc->desc) { | |
| 1048 | + struct udma_desc *d = uc->desc; | |
| 989 | 1049 | |
| 990 | − uc->bcnt += d->residue; | |
| 991 | − udma_start(uc); | |
| 992 | − vchan_cookie_complete(&d->vd); | |
| 1050 | + uc->bcnt += d->residue; | |
| 1051 | + udma_start(uc); | |
| 1052 | + vchan_cookie_complete(&d->vd); | |
| 1053 | + break; | |
| 1054 | + } | |
| 1055 | + | |
| 1056 | + break; | |
| 993 | 1057 | } |
| 994 | 1058 | } |
| 995 | 1059 | |
| @@ -1033,29 +1097,27 @@ static irqreturn_t udma_ring_irq_handler(int irq, void *data) · 37 unmodified lines | ||
| 1033 | 1097 | goto out; |
| 1034 | 1098 | } |
| 1035 | 1099 | |
| 1036 | − if (uc->cyclic) { | |
| 1037 | − /* push the descriptor back to the ring */ | |
| 1038 | − if (d == uc->desc) { | |
| 1100 | + if (d == uc->desc) { | |
| 1101 | + /* active descriptor */ | |
| 1102 | + if (uc->cyclic) { | |
| 1039 | 1103 | udma_cyclic_packet_elapsed(uc); |
| 1040 | 1104 | vchan_cyclic_callback(&d->vd); |
| 1041 | − } | |
| 1042 | − } else { | |
| 1043 | − bool desc_done = false; | |
| 1044 | − | |
| 1045 | − if (d == uc->desc) { | |
| 1046 | − desc_done = udma_is_desc_really_done(uc, d); | |
| 1047 | − | |
| 1048 | − if (desc_done) { | |
| 1105 | + } else { | |
| 1106 | + if (udma_is_desc_really_done(uc, d)) { | |
| 1049 | 1107 | uc->bcnt += d->residue; |
| 1050 | 1108 | udma_start(uc); |
| 1109 | + vchan_cookie_complete(&d->vd); | |
| 1051 | 1110 | } else { |
| 1052 | 1111 | schedule_delayed_work(&uc->tx_drain.work, |
| 1053 | 1112 | 0); |
| 1054 | 1113 | } |
| 1055 | 1114 | } |
| 1056 | − | |
| 1057 | − if (desc_done) | |
| 1058 | − vchan_cookie_complete(&d->vd); | |
| 1115 | + } else { | |
| 1116 | + /* | |
| 1117 | + * terminated descriptor, mark the descriptor as | |
| 1118 | + * completed to update the channel's cookie marker | |
| 1119 | + */ | |
| 1120 | + dma_cookie_complete(&d->vd.tx); | |
| 1059 | 1121 | } |
| 1060 | 1122 | } |
| 1061 | 1123 | out: |
| @@ -1965,36 +2027,81 @@ static struct udma_desc *udma_alloc_tr_desc(struct udma_chan *uc, · 903 unmodified lines | ||
| 1965 | 2027 | return d; |
| 1966 | 2028 | } |
| 1967 | 2029 | |
| 2030 | +/** | |
| 2031 | + * udma_get_tr_counters - calculate TR counters for a given length | |
| 2032 | + * @len: Length of the trasnfer | |
| 2033 | + * @align_to: Preferred alignment | |
| 2034 | + * @tr0_cnt0: First TR icnt0 | |
| 2035 | + * @tr0_cnt1: First TR icnt1 | |
| 2036 | + * @tr1_cnt0: Second (if used) TR icnt0 | |
| 2037 | + * | |
| 2038 | + * For len < SZ_64K only one TR is enough, tr1_cnt0 is not updated | |
| 2039 | + * For len >= SZ_64K two TRs are used in a simple way: | |
| 2040 | + * First TR: SZ_64K-alignment blocks (tr0_cnt0, tr0_cnt1) | |
| 2041 | + * Second TR: the remaining length (tr1_cnt0) | |
| 2042 | + * | |
| 2043 | + * Returns the number of TRs the length needs (1 or 2) | |
| 2044 | + * -EINVAL if the length can not be supported | |
| 2045 | + */ | |
| 2046 | +static int udma_get_tr_counters(size_t len, unsigned long align_to, | |
| 2047 | + u16 *tr0_cnt0, u16 *tr0_cnt1, u16 *tr1_cnt0) | |
| 2048 | +{ | |
| 2049 | + if (len < SZ_64K) { | |
| 2050 | + *tr0_cnt0 = len; | |
| 2051 | + *tr0_cnt1 = 1; | |
| 2052 | + | |
| 2053 | + return 1; | |
| 2054 | + } | |
| 2055 | + | |
| 2056 | + if (align_to > 3) | |
| 2057 | + align_to = 3; | |
| 2058 | + | |
| 2059 | +realign: | |
| 2060 | + *tr0_cnt0 = SZ_64K - BIT(align_to); | |
| 2061 | + if (len / *tr0_cnt0 >= SZ_64K) { | |
| 2062 | + if (align_to) { | |
| 2063 | + align_to--; | |
| 2064 | + goto realign; | |
| 2065 | + } | |
| 2066 | + return -EINVAL; | |
| 2067 | + } | |
| 2068 | + | |
| 2069 | + *tr0_cnt1 = len / *tr0_cnt0; | |
| 2070 | + *tr1_cnt0 = len % *tr0_cnt0; | |
| 2071 | + | |
| 2072 | + return 2; | |
| 2073 | +} | |
| 2074 | + | |
| 1968 | 2075 | static struct udma_desc * |
| 1969 | 2076 | udma_prep_slave_sg_tr(struct udma_chan *uc, struct scatterlist *sgl, |
| 1970 | 2077 | unsigned int sglen, enum dma_transfer_direction dir, |
| 1971 | 2078 | unsigned long tx_flags, void *context) |
| 1972 | 2079 | { |
| 1973 | − enum dma_slave_buswidth dev_width; | |
| 1974 | 2080 | struct scatterlist *sgent; |
| 1975 | 2081 | struct udma_desc *d; |
| 1976 | − size_t tr_size; | |
| 1977 | 2082 | struct cppi5_tr_type1_t *tr_req = NULL; |
| 2083 | + u16 tr0_cnt0, tr0_cnt1, tr1_cnt0; | |
| 1978 | 2084 | unsigned int i; |
| 1979 | − u32 burst; | |
| 2085 | + size_t tr_size; | |
| 2086 | + int num_tr = 0; | |
| 2087 | + int tr_idx = 0; | |
| 1980 | 2088 | |
| 1981 | − if (dir == DMA_DEV_TO_MEM) { | |
| 1982 | − dev_width = uc->cfg.src_addr_width; | |
| 1983 | − burst = uc->cfg.src_maxburst; | |
| 1984 | − } else if (dir == DMA_MEM_TO_DEV) { | |
| 1985 | − dev_width = uc->cfg.dst_addr_width; | |
| 1986 | − burst = uc->cfg.dst_maxburst; | |
| 1987 | − } else { | |
| 1988 | − dev_err(uc->ud->dev, "%s: bad direction?\n", __func__); | |
| 2089 | + if (!is_slave_direction(dir)) { | |
| 2090 | + dev_err(uc->ud->dev, "Only slave cyclic is supported\n"); | |
| 1989 | 2091 | return NULL; |
| 1990 | 2092 | } |
| 1991 | 2093 | |
| 1992 | − if (!burst) | |
| 1993 | − burst = 1; | |
| 2094 | + /* estimate the number of TRs we will need */ | |
| 2095 | + for_each_sg(sgl, sgent, sglen, i) { | |
| 2096 | + if (sg_dma_len(sgent) < SZ_64K) | |
| 2097 | + num_tr++; | |
| 2098 | + else | |
| 2099 | + num_tr += 2; | |
| 2100 | + } | |
| 1994 | 2101 | |
| 1995 | 2102 | /* Now allocate and setup the descriptor. */ |
| 1996 | 2103 | tr_size = sizeof(struct cppi5_tr_type1_t); |
| 1997 | − d = udma_alloc_tr_desc(uc, tr_size, sglen, dir); | |
| 2104 | + d = udma_alloc_tr_desc(uc, tr_size, num_tr, dir); | |
| 1998 | 2105 | if (!d) |
| 1999 | 2106 | return NULL; |
| 2000 | 2107 | |
| @@ -2002,19 +2109,46 @@ udma_prep_slave_sg_tr(struct udma_chan *uc, struct scatterlist *sgl, · 1 unmodified line | ||
| 2002 | 2109 | |
| 2003 | 2110 | tr_req = d->hwdesc[0].tr_req_base; |
| 2004 | 2111 | for_each_sg(sgl, sgent, sglen, i) { |
| 2005 | − d->residue += sg_dma_len(sgent); | |
| 2112 | + dma_addr_t sg_addr = sg_dma_address(sgent); | |
| 2113 | + | |
| 2114 | + num_tr = udma_get_tr_counters(sg_dma_len(sgent), __ffs(sg_addr), | |
| 2115 | + &tr0_cnt0, &tr0_cnt1, &tr1_cnt0); | |
| 2116 | + if (num_tr < 0) { | |
| 2117 | + dev_err(uc->ud->dev, "size %u is not supported\n", | |
| 2118 | + sg_dma_len(sgent)); | |
| 2119 | + udma_free_hwdesc(uc, d); | |
| 2120 | + kfree(d); | |
| 2121 | + return NULL; | |
| 2122 | + } | |
| 2006 | 2123 | |
| 2007 | 2124 | cppi5_tr_init(&tr_req[i].flags, CPPI5_TR_TYPE1, false, false, |
| 2008 | 2125 | CPPI5_TR_EVENT_SIZE_COMPLETION, 0); |
| 2009 | 2126 | cppi5_tr_csf_set(&tr_req[i].flags, CPPI5_TR_CSF_SUPR_EVT); |
| 2010 | 2127 | |
| 2011 | − tr_req[i].addr = sg_dma_address(sgent); | |
| 2012 | − tr_req[i].icnt0 = burst * dev_width; | |
| 2013 | − tr_req[i].dim1 = burst * dev_width; | |
| 2014 | − tr_req[i].icnt1 = sg_dma_len(sgent) / tr_req[i].icnt0; | |
| 2128 | + tr_req[tr_idx].addr = sg_addr; | |
| 2129 | + tr_req[tr_idx].icnt0 = tr0_cnt0; | |
| 2130 | + tr_req[tr_idx].icnt1 = tr0_cnt1; | |
| 2131 | + tr_req[tr_idx].dim1 = tr0_cnt0; | |
| 2132 | + tr_idx++; | |
| 2133 | + | |
| 2134 | + if (num_tr == 2) { | |
| 2135 | + cppi5_tr_init(&tr_req[tr_idx].flags, CPPI5_TR_TYPE1, | |
| 2136 | + false, false, | |
| 2137 | + CPPI5_TR_EVENT_SIZE_COMPLETION, 0); | |
| 2138 | + cppi5_tr_csf_set(&tr_req[tr_idx].flags, | |
| 2139 | + CPPI5_TR_CSF_SUPR_EVT); | |
| 2140 | + | |
| 2141 | + tr_req[tr_idx].addr = sg_addr + tr0_cnt1 * tr0_cnt0; | |
| 2142 | + tr_req[tr_idx].icnt0 = tr1_cnt0; | |
| 2143 | + tr_req[tr_idx].icnt1 = 1; | |
| 2144 | + tr_req[tr_idx].dim1 = tr1_cnt0; | |
| 2145 | + tr_idx++; | |
| 2146 | + } | |
| 2147 | + | |
| 2148 | + d->residue += sg_dma_len(sgent); | |
| 2015 | 2149 | } |
| 2016 | 2150 | |
| 2017 | − cppi5_tr_csf_set(&tr_req[i - 1].flags, CPPI5_TR_CSF_EOP); | |
| 2151 | + cppi5_tr_csf_set(&tr_req[tr_idx - 1].flags, CPPI5_TR_CSF_EOP); | |
| 2018 | 2152 | |
| 2019 | 2153 | return d; |
| 2020 | 2154 | } |
| @@ -2319,47 +2453,66 @@ udma_prep_dma_cyclic_tr(struct udma_chan *uc, dma_addr_t buf_addr, · 298 unmodified lines | ||
| 2319 | 2453 | size_t buf_len, size_t period_len, |
| 2320 | 2454 | enum dma_transfer_direction dir, unsigned long flags) |
| 2321 | 2455 | { |
| 2322 | − enum dma_slave_buswidth dev_width; | |
| 2323 | 2456 | struct udma_desc *d; |
| 2324 | − size_t tr_size; | |
| 2457 | + size_t tr_size, period_addr; | |
| 2325 | 2458 | struct cppi5_tr_type1_t *tr_req; |
| 2326 | − unsigned int i; | |
| 2327 | 2459 | unsigned int periods = buf_len / period_len; |
| 2328 | − u32 burst; | |
| 2460 | + u16 tr0_cnt0, tr0_cnt1, tr1_cnt0; | |
| 2461 | + unsigned int i; | |
| 2462 | + int num_tr; | |
| 2329 | 2463 | |
| 2330 | − if (dir == DMA_DEV_TO_MEM) { | |
| 2331 | − dev_width = uc->cfg.src_addr_width; | |
| 2332 | − burst = uc->cfg.src_maxburst; | |
| 2333 | − } else if (dir == DMA_MEM_TO_DEV) { | |
| 2334 | − dev_width = uc->cfg.dst_addr_width; | |
| 2335 | − burst = uc->cfg.dst_maxburst; | |
| 2336 | − } else { | |
| 2337 | − dev_err(uc->ud->dev, "%s: bad direction?\n", __func__); | |
| 2464 | + if (!is_slave_direction(dir)) { | |
| 2465 | + dev_err(uc->ud->dev, "Only slave cyclic is supported\n"); | |
| 2338 | 2466 | return NULL; |
| 2339 | 2467 | } |
| 2340 | 2468 | |
| 2341 | − if (!burst) | |
| 2342 | − burst = 1; | |
| 2469 | + num_tr = udma_get_tr_counters(period_len, __ffs(buf_addr), &tr0_cnt0, | |
| 2470 | + &tr0_cnt1, &tr1_cnt0); | |
| 2471 | + if (num_tr < 0) { | |
| 2472 | + dev_err(uc->ud->dev, "size %zu is not supported\n", | |
| 2473 | + period_len); | |
| 2474 | + return NULL; | |
| 2475 | + } | |
| 2343 | 2476 | |
| 2344 | 2477 | /* Now allocate and setup the descriptor. */ |
| 2345 | 2478 | tr_size = sizeof(struct cppi5_tr_type1_t); |
| 2346 | − d = udma_alloc_tr_desc(uc, tr_size, periods, dir); | |
| 2479 | + d = udma_alloc_tr_desc(uc, tr_size, periods * num_tr, dir); | |
| 2347 | 2480 | if (!d) |
| 2348 | 2481 | return NULL; |
| 2349 | 2482 | |
| 2350 | 2483 | tr_req = d->hwdesc[0].tr_req_base; |
| 2484 | + period_addr = buf_addr; | |
| 2351 | 2485 | for (i = 0; i < periods; i++) { |
| 2352 | − cppi5_tr_init(&tr_req[i].flags, CPPI5_TR_TYPE1, false, false, | |
| 2353 | − CPPI5_TR_EVENT_SIZE_COMPLETION, 0); | |
| 2486 | + int tr_idx = i * num_tr; | |
| 2354 | 2487 | |
| 2355 | − tr_req[i].addr = buf_addr + period_len * i; | |
| 2356 | − tr_req[i].icnt0 = dev_width; | |
| 2357 | − tr_req[i].icnt1 = period_len / dev_width; | |
| 2358 | − tr_req[i].dim1 = dev_width; | |
| 2488 | + cppi5_tr_init(&tr_req[tr_idx].flags, CPPI5_TR_TYPE1, false, | |
| 2489 | + false, CPPI5_TR_EVENT_SIZE_COMPLETION, 0); | |
| 2490 | + | |
| 2491 | + tr_req[tr_idx].addr = period_addr; | |
| 2492 | + tr_req[tr_idx].icnt0 = tr0_cnt0; | |
| 2493 | + tr_req[tr_idx].icnt1 = tr0_cnt1; | |
| 2494 | + tr_req[tr_idx].dim1 = tr0_cnt0; | |
| 2495 | + | |
| 2496 | + if (num_tr == 2) { | |
| 2497 | + cppi5_tr_csf_set(&tr_req[tr_idx].flags, | |
| 2498 | + CPPI5_TR_CSF_SUPR_EVT); | |
| 2499 | + tr_idx++; | |
| 2500 | + | |
| 2501 | + cppi5_tr_init(&tr_req[tr_idx].flags, CPPI5_TR_TYPE1, | |
| 2502 | + false, false, | |
| 2503 | + CPPI5_TR_EVENT_SIZE_COMPLETION, 0); | |
| 2504 | + | |
| 2505 | + tr_req[tr_idx].addr = period_addr + tr0_cnt1 * tr0_cnt0; | |
| 2506 | + tr_req[tr_idx].icnt0 = tr1_cnt0; | |
| 2507 | + tr_req[tr_idx].icnt1 = 1; | |
| 2508 | + tr_req[tr_idx].dim1 = tr1_cnt0; | |
| 2509 | + } | |
| 2359 | 2510 | |
| 2360 | 2511 | if (!(flags & DMA_PREP_INTERRUPT)) |
| 2361 | − cppi5_tr_csf_set(&tr_req[i].flags, | |
| 2512 | + cppi5_tr_csf_set(&tr_req[tr_idx].flags, | |
| 2362 | 2513 | CPPI5_TR_CSF_SUPR_EVT); |
| 2514 | + | |
| 2515 | + period_addr += period_len; | |
| 2363 | 2516 | } |
| 2364 | 2517 | |
| 2365 | 2518 | return d; |
| @@ -2517,29 +2670,12 @@ udma_prep_dma_memcpy(struct dma_chan *chan, dma_addr_t dest, dma_addr_t src, · 151 unmodified lines | ||
| 2517 | 2670 | return NULL; |
| 2518 | 2671 | } |
| 2519 | 2672 | |
| 2520 | − if (len < SZ_64K) { | |
| 2521 | − num_tr = 1; | |
| 2522 | − tr0_cnt0 = len; | |
| 2523 | − tr0_cnt1 = 1; | |
| 2524 | − } else { | |
| 2525 | − unsigned long align_to = __ffs(src | dest); | |
| 2526 | − | |
| 2527 | − if (align_to > 3) | |
| 2528 | − align_to = 3; | |
| 2529 | − /* | |
| 2530 | − * Keep simple: tr0: SZ_64K-alignment blocks, | |
| 2531 | − * tr1: the remaining | |
| 2532 | − */ | |
| 2533 | − num_tr = 2; | |
| 2534 | − tr0_cnt0 = (SZ_64K - BIT(align_to)); | |
| 2535 | − if (len / tr0_cnt0 >= SZ_64K) { | |
| 2536 | − dev_err(uc->ud->dev, "size %zu is not supported\n", | |
| 2537 | − len); | |
| 2538 | − return NULL; | |
| 2539 | − } | |
| 2540 | − | |
| 2541 | − tr0_cnt1 = len / tr0_cnt0; | |
| 2542 | − tr1_cnt0 = len % tr0_cnt0; | |
| 2673 | + num_tr = udma_get_tr_counters(len, __ffs(src | dest), &tr0_cnt0, | |
| 2674 | + &tr0_cnt1, &tr1_cnt0); | |
| 2675 | + if (num_tr < 0) { | |
| 2676 | + dev_err(uc->ud->dev, "size %zu is not supported\n", | |
| 2677 | + len); | |
| 2678 | + return NULL; | |
| 2543 | 2679 | } |
| 2544 | 2680 | |
| 2545 | 2681 | d = udma_alloc_tr_desc(uc, tr_size, num_tr, DMA_MEM_TO_MEM); |
| @@ -2631,6 +2767,9 @@ static enum dma_status udma_tx_status(struct dma_chan *chan, · 85 unmodified lines | ||
| 2631 | 2767 | |
| 2632 | 2768 | ret = dma_cookie_status(chan, cookie, txstate); |
| 2633 | 2769 | |
| 2770 | + if (!udma_is_chan_running(uc)) | |
| 2771 | + ret = DMA_COMPLETE; | |
| 2772 | + | |
| 2634 | 2773 | if (ret == DMA_IN_PROGRESS && udma_is_chan_paused(uc)) |
| 2635 | 2774 | ret = DMA_PAUSED; |
| 2636 | 2775 | |
| @@ -2697,11 +2836,8 @@ static int udma_pause(struct dma_chan *chan) · 60 unmodified lines | ||
| 2697 | 2836 | { |
| 2698 | 2837 | struct udma_chan *uc = to_udma_chan(chan); |
| 2699 | 2838 | |
| 2700 | − if (!uc->desc) | |
| 2701 | − return -EINVAL; | |
| 2702 | − | |
| 2703 | 2839 | /* pause the channel */ |
| 2704 | − switch (uc->desc->dir) { | |
| 2840 | + switch (uc->config.dir) { | |
| 2705 | 2841 | case DMA_DEV_TO_MEM: |
| 2706 | 2842 | udma_rchanrt_update_bits(uc->rchan, |
| 2707 | 2843 | UDMA_RCHAN_RT_PEER_RT_EN_REG, |
| @@ -2730,11 +2866,8 @@ static int udma_resume(struct dma_chan *chan) · 22 unmodified lines | ||
| 2730 | 2866 | { |
| 2731 | 2867 | struct udma_chan *uc = to_udma_chan(chan); |
| 2732 | 2868 | |
| 2733 | − if (!uc->desc) | |
| 2734 | − return -EINVAL; | |
| 2735 | − | |
| 2736 | 2869 | /* resume the channel */ |
| 2737 | − switch (uc->desc->dir) { | |
| 2870 | + switch (uc->config.dir) { | |
| 2738 | 2871 | case DMA_DEV_TO_MEM: |
| 2739 | 2872 | udma_rchanrt_update_bits(uc->rchan, |
| 2740 | 2873 | UDMA_RCHAN_RT_PEER_RT_EN_REG, |
| @@ -3248,6 +3381,98 @@ static int udma_setup_resources(struct udma_dev *ud) · 507 unmodified lines | ||
| 3248 | 3381 | return ch_count; |
| 3249 | 3382 | } |
| 3250 | 3383 | |
| 3384 | +static int udma_setup_rx_flush(struct udma_dev *ud) | |
| 3385 | +{ | |
| 3386 | + struct udma_rx_flush *rx_flush = &ud->rx_flush; | |
| 3387 | + struct cppi5_desc_hdr_t *tr_desc; | |
| 3388 | + struct cppi5_tr_type1_t *tr_req; | |
| 3389 | + struct cppi5_host_desc_t *desc; | |
| 3390 | + struct device *dev = ud->dev; | |
| 3391 | + struct udma_hwdesc *hwdesc; | |
| 3392 | + size_t tr_size; | |
| 3393 | + | |
| 3394 | + /* Allocate 1K buffer for discarded data on RX channel teardown */ | |
| 3395 | + rx_flush->buffer_size = SZ_1K; | |
| 3396 | + rx_flush->buffer_vaddr = devm_kzalloc(dev, rx_flush->buffer_size, | |
| 3397 | + GFP_KERNEL); | |
| 3398 | + if (!rx_flush->buffer_vaddr) | |
| 3399 | + return -ENOMEM; | |
| 3400 | + | |
| 3401 | + rx_flush->buffer_paddr = dma_map_single(dev, rx_flush->buffer_vaddr, | |
| 3402 | + rx_flush->buffer_size, | |
| 3403 | + DMA_TO_DEVICE); | |
| 3404 | + if (dma_mapping_error(dev, rx_flush->buffer_paddr)) | |
| 3405 | + return -ENOMEM; | |
| 3406 | + | |
| 3407 | + /* Set up descriptor to be used for TR mode */ | |
| 3408 | + hwdesc = &rx_flush->hwdescs[0]; | |
| 3409 | + tr_size = sizeof(struct cppi5_tr_type1_t); | |
| 3410 | + hwdesc->cppi5_desc_size = cppi5_trdesc_calc_size(tr_size, 1); | |
| 3411 | + hwdesc->cppi5_desc_size = ALIGN(hwdesc->cppi5_desc_size, | |
| 3412 | + ud->desc_align); | |
| 3413 | + | |
| 3414 | + hwdesc->cppi5_desc_vaddr = devm_kzalloc(dev, hwdesc->cppi5_desc_size, | |
| 3415 | + GFP_KERNEL); | |
| 3416 | + if (!hwdesc->cppi5_desc_vaddr) | |
| 3417 | + return -ENOMEM; | |
| 3418 | + | |
| 3419 | + hwdesc->cppi5_desc_paddr = dma_map_single(dev, hwdesc->cppi5_desc_vaddr, | |
| 3420 | + hwdesc->cppi5_desc_size, | |
| 3421 | + DMA_TO_DEVICE); | |
| 3422 | + if (dma_mapping_error(dev, hwdesc->cppi5_desc_paddr)) | |
| 3423 | + return -ENOMEM; | |
| 3424 | + | |
| 3425 | + /* Start of the TR req records */ | |
| 3426 | + hwdesc->tr_req_base = hwdesc->cppi5_desc_vaddr + tr_size; | |
| 3427 | + /* Start address of the TR response array */ | |
| 3428 | + hwdesc->tr_resp_base = hwdesc->tr_req_base + tr_size; | |
| 3429 | + | |
| 3430 | + tr_desc = hwdesc->cppi5_desc_vaddr; | |
| 3431 | + cppi5_trdesc_init(tr_desc, 1, tr_size, 0, 0); | |
| 3432 | + cppi5_desc_set_pktids(tr_desc, 0, CPPI5_INFO1_DESC_FLOWID_DEFAULT); | |
| 3433 | + cppi5_desc_set_retpolicy(tr_desc, 0, 0); | |
| 3434 | + | |
| 3435 | + tr_req = hwdesc->tr_req_base; | |
| 3436 | + cppi5_tr_init(&tr_req->flags, CPPI5_TR_TYPE1, false, false, | |
| 3437 | + CPPI5_TR_EVENT_SIZE_COMPLETION, 0); | |
| 3438 | + cppi5_tr_csf_set(&tr_req->flags, CPPI5_TR_CSF_SUPR_EVT); | |
| 3439 | + | |
| 3440 | + tr_req->addr = rx_flush->buffer_paddr; | |
| 3441 | + tr_req->icnt0 = rx_flush->buffer_size; | |
| 3442 | + tr_req->icnt1 = 1; | |
| 3443 | + | |
| 3444 | + /* Set up descriptor to be used for packet mode */ | |
| 3445 | + hwdesc = &rx_flush->hwdescs[1]; | |
| 3446 | + hwdesc->cppi5_desc_size = ALIGN(sizeof(struct cppi5_host_desc_t) + | |
| 3447 | + CPPI5_INFO0_HDESC_EPIB_SIZE + | |
| 3448 | + CPPI5_INFO0_HDESC_PSDATA_MAX_SIZE, | |
| 3449 | + ud->desc_align); | |
| 3450 | + | |
| 3451 | + hwdesc->cppi5_desc_vaddr = devm_kzalloc(dev, hwdesc->cppi5_desc_size, | |
| 3452 | + GFP_KERNEL); | |
| 3453 | + if (!hwdesc->cppi5_desc_vaddr) | |
| 3454 | + return -ENOMEM; | |
| 3455 | + | |
| 3456 | + hwdesc->cppi5_desc_paddr = dma_map_single(dev, hwdesc->cppi5_desc_vaddr, | |
| 3457 | + hwdesc->cppi5_desc_size, | |
| 3458 | + DMA_TO_DEVICE); | |
| 3459 | + if (dma_mapping_error(dev, hwdesc->cppi5_desc_paddr)) | |
| 3460 | + return -ENOMEM; | |
| 3461 | + | |
| 3462 | + desc = hwdesc->cppi5_desc_vaddr; | |
| 3463 | + cppi5_hdesc_init(desc, 0, 0); | |
| 3464 | + cppi5_desc_set_pktids(&desc->hdr, 0, CPPI5_INFO1_DESC_FLOWID_DEFAULT); | |
| 3465 | + cppi5_desc_set_retpolicy(&desc->hdr, 0, 0); | |
| 3466 | + | |
| 3467 | + cppi5_hdesc_attach_buf(desc, | |
| 3468 | + rx_flush->buffer_paddr, rx_flush->buffer_size, | |
| 3469 | + rx_flush->buffer_paddr, rx_flush->buffer_size); | |
| 3470 | + | |
| 3471 | + dma_sync_single_for_device(dev, hwdesc->cppi5_desc_paddr, | |
| 3472 | + hwdesc->cppi5_desc_size, DMA_TO_DEVICE); | |
| 3473 | + return 0; | |
| 3474 | +} | |
| 3475 | + | |
| 3251 | 3476 | #define TI_UDMAC_BUSWIDTHS (BIT(DMA_SLAVE_BUSWIDTH_1_BYTE) | \ |
| 3252 | 3477 | BIT(DMA_SLAVE_BUSWIDTH_2_BYTES) | \ |
| 3253 | 3478 | BIT(DMA_SLAVE_BUSWIDTH_3_BYTES) | \ |
| @@ -3361,6 +3586,10 @@ static int udma_probe(struct platform_device *pdev) · 107 unmodified lines | ||
| 3361 | 3586 | if (ud->desc_align < dma_get_cache_alignment()) |
| 3362 | 3587 | ud->desc_align = dma_get_cache_alignment(); |
| 3363 | 3588 | |
| 3589 | + ret = udma_setup_rx_flush(ud); | |
| 3590 | + if (ret) | |
| 3591 | + return ret; | |
| 3592 | + | |
| 3364 | 3593 | for (i = 0; i < ud->tchan_cnt; i++) { |
| 3365 | 3594 | struct udma_tchan *tchan = &ud->tchans[i]; |
| 3366 | 3595 | |
| @@ -479,20 +479,14 @@ static void handle_error(struct mem_ctl_info *mci, struct synps_ecc_status *p) · 478 unmodified lines | ||
| 479 | 479 | pinf = &p->ceinfo; |
| 480 | 480 | if (!priv->p_data->quirks) { |
| 481 | 481 | snprintf(priv->message, SYNPS_EDAC_MSG_SIZE, |
| 482 | − "DDR ECC error type:%s Row %d Bank %d Col %d ", | |
| 483 | − "CE", pinf->row, pinf->bank, pinf->col); | |
| 484 | − snprintf(priv->message, SYNPS_EDAC_MSG_SIZE, | |
| 485 | − "Bit Position: %d Data: 0x%08x\n", | |
| 482 | + "DDR ECC error type:%s Row %d Bank %d Col %d Bit Position: %d Data: 0x%08x", | |
| 483 | + "CE", pinf->row, pinf->bank, pinf->col, | |
| 486 | 484 | pinf->bitpos, pinf->data); |
| 487 | 485 | } else { |
| 488 | 486 | snprintf(priv->message, SYNPS_EDAC_MSG_SIZE, |
| 489 | − "DDR ECC error type:%s Row %d Bank %d Col %d ", | |
| 490 | − "CE", pinf->row, pinf->bank, pinf->col); | |
| 491 | − snprintf(priv->message, SYNPS_EDAC_MSG_SIZE, | |
| 492 | − "BankGroup Number %d Block Number %d ", | |
| 493 | − pinf->bankgrpnr, pinf->blknr); | |
| 494 | − snprintf(priv->message, SYNPS_EDAC_MSG_SIZE, | |
| 495 | − "Bit Position: %d Data: 0x%08x\n", | |
| 487 | + "DDR ECC error type:%s Row %d Bank %d Col %d BankGroup Number %d Block Number %d Bit Position: %d Data: 0x%08x", | |
| 488 | + "CE", pinf->row, pinf->bank, pinf->col, | |
| 489 | + pinf->bankgrpnr, pinf->blknr, | |
| 496 | 490 | pinf->bitpos, pinf->data); |
| 497 | 491 | } |
| 498 | 492 | |
| @@ -509,10 +503,8 @@ static void handle_error(struct mem_ctl_info *mci, struct synps_ecc_status *p) · 10 unmodified lines | ||
| 509 | 503 | "UE", pinf->row, pinf->bank, pinf->col); |
| 510 | 504 | } else { |
| 511 | 505 | snprintf(priv->message, SYNPS_EDAC_MSG_SIZE, |
| 512 | − "DDR ECC error type :%s Row %d Bank %d Col %d ", | |
| 513 | − "UE", pinf->row, pinf->bank, pinf->col); | |
| 514 | − snprintf(priv->message, SYNPS_EDAC_MSG_SIZE, | |
| 515 | − "BankGroup Number %d Block Number %d", | |
| 506 | + "DDR ECC error type :%s Row %d Bank %d Col %d BankGroup Number %d Block Number %d", | |
| 507 | + "UE", pinf->row, pinf->bank, pinf->col, | |
| 516 | 508 | pinf->bankgrpnr, pinf->blknr); |
| 517 | 509 | } |
| 518 | 510 | |
| @@ -552,7 +552,7 @@ int __init efi_config_parse_tables(void *config_tables, int count, int sz, · 551 unmodified lines | ||
| 552 | 552 | |
| 553 | 553 | seed = early_memremap(efi.rng_seed, sizeof(*seed)); |
| 554 | 554 | if (seed != NULL) { |
| 555 | − size = seed->size; | |
| 555 | + size = READ_ONCE(seed->size); | |
| 556 | 556 | early_memunmap(seed, sizeof(*seed)); |
| 557 | 557 | } else { |
| 558 | 558 | pr_err("Could not map UEFI random seed!\n"); |
| @@ -562,7 +562,7 @@ int __init efi_config_parse_tables(void *config_tables, int count, int sz, · 3 unmodified lines | ||
| 562 | 562 | sizeof(*seed) + size); |
| 563 | 563 | if (seed != NULL) { |
| 564 | 564 | pr_notice("seeding entropy pool\n"); |
| 565 | − add_bootloader_randomness(seed->bits, seed->size); | |
| 565 | + add_bootloader_randomness(seed->bits, size); | |
| 566 | 566 | early_memunmap(seed, sizeof(*seed) + size); |
| 567 | 567 | } else { |
| 568 | 568 | pr_err("Could not map UEFI random seed!\n"); |
| @@ -29,6 +29,7 @@ struct imx_sc_chan { · 28 unmodified lines | ||
| 29 | 29 | struct mbox_client cl; |
| 30 | 30 | struct mbox_chan *ch; |
| 31 | 31 | int idx; |
| 32 | + struct completion tx_done; | |
| 32 | 33 | }; |
| 33 | 34 | |
| 34 | 35 | struct imx_sc_ipc { |
| @@ -100,6 +101,14 @@ int imx_scu_get_handle(struct imx_sc_ipc **ipc) · 65 unmodified lines | ||
| 100 | 101 | } |
| 101 | 102 | EXPORT_SYMBOL(imx_scu_get_handle); |
| 102 | 103 | |
| 104 | +/* Callback called when the word of a message is ack-ed, eg read by SCU */ | |
| 105 | +static void imx_scu_tx_done(struct mbox_client *cl, void *mssg, int r) | |
| 106 | +{ | |
| 107 | + struct imx_sc_chan *sc_chan = container_of(cl, struct imx_sc_chan, cl); | |
| 108 | + | |
| 109 | + complete(&sc_chan->tx_done); | |
| 110 | +} | |
| 111 | + | |
| 103 | 112 | static void imx_scu_rx_callback(struct mbox_client *c, void *msg) |
| 104 | 113 | { |
| 105 | 114 | struct imx_sc_chan *sc_chan = container_of(c, struct imx_sc_chan, cl); |
| @@ -149,6 +158,19 @@ static int imx_scu_ipc_write(struct imx_sc_ipc *sc_ipc, void *msg) · 43 unmodified lines | ||
| 149 | 158 | |
| 150 | 159 | for (i = 0; i < hdr->size; i++) { |
| 151 | 160 | sc_chan = &sc_ipc->chans[i % 4]; |
| 161 | + | |
| 162 | + /* | |
| 163 | + * SCU requires that all messages words are written | |
| 164 | + * sequentially but linux MU driver implements multiple | |
| 165 | + * independent channels for each register so ordering between | |
| 166 | + * different channels must be ensured by SCU API interface. | |
| 167 | + * | |
| 168 | + * Wait for tx_done before every send to ensure that no | |
| 169 | + * queueing happens at the mailbox channel level. | |
| 170 | + */ | |
| 171 | + wait_for_completion(&sc_chan->tx_done); | |
| 172 | + reinit_completion(&sc_chan->tx_done); | |
| 173 | + | |
| 152 | 174 | ret = mbox_send_message(sc_chan->ch, &data[i]); |
| 153 | 175 | if (ret < 0) |
| 154 | 176 | return ret; |
| @@ -247,6 +269,11 @@ static int imx_scu_probe(struct platform_device *pdev) · 92 unmodified lines | ||
| 247 | 269 | cl->knows_txdone = true; |
| 248 | 270 | cl->rx_callback = imx_scu_rx_callback; |
| 249 | 271 | |
| 272 | + /* Initial tx_done completion as "done" */ | |
| 273 | + cl->tx_done = imx_scu_tx_done; | |
| 274 | + init_completion(&sc_chan->tx_done); | |
| 275 | + complete(&sc_chan->tx_done); | |
| 276 | + | |
| 250 | 277 | sc_chan->sc_ipc = sc_ipc; |
| 251 | 278 | sc_chan->idx = i % 4; |
| 252 | 279 | sc_chan->ch = mbox_request_channel_byname(cl, chan_name); |
| @@ -16,7 +16,7 @@ struct imx_sc_msg_req_misc_set_ctrl { · 15 unmodified lines | ||
| 16 | 16 | u32 ctrl; |
| 17 | 17 | u32 val; |
| 18 | 18 | u16 resource; |
| 19 | −} __packed; | |
| 19 | +} __packed __aligned(4); | |
| 20 | 20 | |
| 21 | 21 | struct imx_sc_msg_req_cpu_start { |
| 22 | 22 | struct imx_sc_rpc_msg hdr; |
| @@ -24,18 +24,18 @@ struct imx_sc_msg_req_cpu_start { · 1 unmodified line | ||
| 24 | 24 | u32 address_lo; |
| 25 | 25 | u16 resource; |
| 26 | 26 | u8 enable; |
| 27 | −} __packed; | |
| 27 | +} __packed __aligned(4); | |
| 28 | 28 | |
| 29 | 29 | struct imx_sc_msg_req_misc_get_ctrl { |
| 30 | 30 | struct imx_sc_rpc_msg hdr; |
| 31 | 31 | u32 ctrl; |
| 32 | 32 | u16 resource; |
| 33 | −} __packed; | |
| 33 | +} __packed __aligned(4); | |
| 34 | 34 | |
| 35 | 35 | struct imx_sc_msg_resp_misc_get_ctrl { |
| 36 | 36 | struct imx_sc_rpc_msg hdr; |
| 37 | 37 | u32 val; |
| 38 | −} __packed; | |
| 38 | +} __packed __aligned(4); | |
| 39 | 39 | |
| 40 | 40 | /* |
| 41 | 41 | * This function sets a miscellaneous control value. |
| @@ -61,7 +61,7 @@ struct imx_sc_msg_req_set_resource_power_mode { · 60 unmodified lines | ||
| 61 | 61 | struct imx_sc_rpc_msg hdr; |
| 62 | 62 | u16 resource; |
| 63 | 63 | u8 mode; |
| 64 | −} __packed; | |
| 64 | +} __packed __aligned(4); | |
| 65 | 65 | |
| 66 | 66 | #define IMX_SCU_PD_NAME_SIZE 20 |
| 67 | 67 | struct imx_sc_pm_domain { |
| @@ -52,7 +52,7 @@ · 51 unmodified lines | ||
| 52 | 52 | * 1. Primary ring |
| 53 | 53 | * 2. Async ring |
| 54 | 54 | */ |
| 55 | −#define GFX10_NUM_GFX_RINGS 2 | |
| 55 | +#define GFX10_NUM_GFX_RINGS_NV1X 1 | |
| 56 | 56 | #define GFX10_MEC_HPD_SIZE 2048 |
| 57 | 57 | |
| 58 | 58 | #define F32_CE_PROGRAM_RAM_SIZE 65536 |
| @@ -1304,7 +1304,7 @@ static int gfx_v10_0_sw_init(void *handle) · 1245 unmodified lines | ||
| 1304 | 1304 | case CHIP_NAVI14: |
| 1305 | 1305 | case CHIP_NAVI12: |
| 1306 | 1306 | adev->gfx.me.num_me = 1; |
| 1307 | − adev->gfx.me.num_pipe_per_me = 2; | |
| 1307 | + adev->gfx.me.num_pipe_per_me = 1; | |
| 1308 | 1308 | adev->gfx.me.num_queue_per_pipe = 1; |
| 1309 | 1309 | adev->gfx.mec.num_mec = 2; |
| 1310 | 1310 | adev->gfx.mec.num_pipe_per_mec = 4; |
| @@ -2710,18 +2710,20 @@ static int gfx_v10_0_cp_gfx_start(struct amdgpu_device *adev) · 1399 unmodified lines | ||
| 2710 | 2710 | amdgpu_ring_commit(ring); |
| 2711 | 2711 | |
| 2712 | 2712 | /* submit cs packet to copy state 0 to next available state */ |
| 2713 | − ring = &adev->gfx.gfx_ring[1]; | |
| 2714 | − r = amdgpu_ring_alloc(ring, 2); | |
| 2715 | − if (r) { | |
| 2716 | − DRM_ERROR("amdgpu: cp failed to lock ring (%d).\n", r); | |
| 2717 | − return r; | |
| 2718 | − } | |
| 2719 | − | |
| 2720 | − amdgpu_ring_write(ring, PACKET3(PACKET3_CLEAR_STATE, 0)); | |
| 2721 | − amdgpu_ring_write(ring, 0); | |
| 2713 | + if (adev->gfx.num_gfx_rings > 1) { | |
| 2714 | + /* maximum supported gfx ring is 2 */ | |
| 2715 | + ring = &adev->gfx.gfx_ring[1]; | |
| 2716 | + r = amdgpu_ring_alloc(ring, 2); | |
| 2717 | + if (r) { | |
| 2718 | + DRM_ERROR("amdgpu: cp failed to lock ring (%d).\n", r); | |
| 2719 | + return r; | |
| 2720 | + } | |
| 2722 | 2721 | |
| 2723 | − amdgpu_ring_commit(ring); | |
| 2722 | + amdgpu_ring_write(ring, PACKET3(PACKET3_CLEAR_STATE, 0)); | |
| 2723 | + amdgpu_ring_write(ring, 0); | |
| 2724 | 2724 | |
| 2725 | + amdgpu_ring_commit(ring); | |
| 2726 | + } | |
| 2725 | 2727 | return 0; |
| 2726 | 2728 | } |
| 2727 | 2729 | |
| @@ -2818,39 +2820,41 @@ static int gfx_v10_0_cp_gfx_resume(struct amdgpu_device *adev) · 90 unmodified lines | ||
| 2818 | 2820 | mutex_unlock(&adev->srbm_mutex); |
| 2819 | 2821 | |
| 2820 | 2822 | /* Init gfx ring 1 for pipe 1 */ |
| 2821 | − mutex_lock(&adev->srbm_mutex); | |
| 2822 | − gfx_v10_0_cp_gfx_switch_pipe(adev, PIPE_ID1); | |
| 2823 | − ring = &adev->gfx.gfx_ring[1]; | |
| 2824 | − rb_bufsz = order_base_2(ring->ring_size / 8); | |
| 2825 | − tmp = REG_SET_FIELD(0, CP_RB1_CNTL, RB_BUFSZ, rb_bufsz); | |
| 2826 | − tmp = REG_SET_FIELD(tmp, CP_RB1_CNTL, RB_BLKSZ, rb_bufsz - 2); | |
| 2827 | − WREG32_SOC15(GC, 0, mmCP_RB1_CNTL, tmp); | |
| 2828 | − /* Initialize the ring buffer's write pointers */ | |
| 2829 | − ring->wptr = 0; | |
| 2830 | − WREG32_SOC15(GC, 0, mmCP_RB1_WPTR, lower_32_bits(ring->wptr)); | |
| 2831 | − WREG32_SOC15(GC, 0, mmCP_RB1_WPTR_HI, upper_32_bits(ring->wptr)); | |
| 2832 | − /* Set the wb address wether it's enabled or not */ | |
| 2833 | − rptr_addr = adev->wb.gpu_addr + (ring->rptr_offs * 4); | |
| 2834 | − WREG32_SOC15(GC, 0, mmCP_RB1_RPTR_ADDR, lower_32_bits(rptr_addr)); | |
| 2835 | − WREG32_SOC15(GC, 0, mmCP_RB1_RPTR_ADDR_HI, upper_32_bits(rptr_addr) & | |
| 2836 | − CP_RB1_RPTR_ADDR_HI__RB_RPTR_ADDR_HI_MASK); | |
| 2837 | − wptr_gpu_addr = adev->wb.gpu_addr + (ring->wptr_offs * 4); | |
| 2838 | − WREG32_SOC15(GC, 0, mmCP_RB_WPTR_POLL_ADDR_LO, | |
| 2839 | − lower_32_bits(wptr_gpu_addr)); | |
| 2840 | − WREG32_SOC15(GC, 0, mmCP_RB_WPTR_POLL_ADDR_HI, | |
| 2841 | − upper_32_bits(wptr_gpu_addr)); | |
| 2842 | − | |
| 2843 | − mdelay(1); | |
| 2844 | − WREG32_SOC15(GC, 0, mmCP_RB1_CNTL, tmp); | |
| 2845 | − | |
| 2846 | − rb_addr = ring->gpu_addr >> 8; | |
| 2847 | − WREG32_SOC15(GC, 0, mmCP_RB1_BASE, rb_addr); | |
| 2848 | − WREG32_SOC15(GC, 0, mmCP_RB1_BASE_HI, upper_32_bits(rb_addr)); | |
| 2849 | − WREG32_SOC15(GC, 0, mmCP_RB1_ACTIVE, 1); | |
| 2850 | − | |
| 2851 | − gfx_v10_0_cp_gfx_set_doorbell(adev, ring); | |
| 2852 | − mutex_unlock(&adev->srbm_mutex); | |
| 2853 | − | |
| 2823 | + if (adev->gfx.num_gfx_rings > 1) { | |
| 2824 | + mutex_lock(&adev->srbm_mutex); | |
| 2825 | + gfx_v10_0_cp_gfx_switch_pipe(adev, PIPE_ID1); | |
| 2826 | + /* maximum supported gfx ring is 2 */ | |
| 2827 | + ring = &adev->gfx.gfx_ring[1]; | |
| 2828 | + rb_bufsz = order_base_2(ring->ring_size / 8); | |
| 2829 | + tmp = REG_SET_FIELD(0, CP_RB1_CNTL, RB_BUFSZ, rb_bufsz); | |
| 2830 | + tmp = REG_SET_FIELD(tmp, CP_RB1_CNTL, RB_BLKSZ, rb_bufsz - 2); | |
| 2831 | + WREG32_SOC15(GC, 0, mmCP_RB1_CNTL, tmp); | |
| 2832 | + /* Initialize the ring buffer's write pointers */ | |
| 2833 | + ring->wptr = 0; | |
| 2834 | + WREG32_SOC15(GC, 0, mmCP_RB1_WPTR, lower_32_bits(ring->wptr)); | |
| 2835 | + WREG32_SOC15(GC, 0, mmCP_RB1_WPTR_HI, upper_32_bits(ring->wptr)); | |
| 2836 | + /* Set the wb address wether it's enabled or not */ | |
| 2837 | + rptr_addr = adev->wb.gpu_addr + (ring->rptr_offs * 4); | |
| 2838 | + WREG32_SOC15(GC, 0, mmCP_RB1_RPTR_ADDR, lower_32_bits(rptr_addr)); | |
| 2839 | + WREG32_SOC15(GC, 0, mmCP_RB1_RPTR_ADDR_HI, upper_32_bits(rptr_addr) & | |
| 2840 | + CP_RB1_RPTR_ADDR_HI__RB_RPTR_ADDR_HI_MASK); | |
| 2841 | + wptr_gpu_addr = adev->wb.gpu_addr + (ring->wptr_offs * 4); | |
| 2842 | + WREG32_SOC15(GC, 0, mmCP_RB_WPTR_POLL_ADDR_LO, | |
| 2843 | + lower_32_bits(wptr_gpu_addr)); | |
| 2844 | + WREG32_SOC15(GC, 0, mmCP_RB_WPTR_POLL_ADDR_HI, | |
| 2845 | + upper_32_bits(wptr_gpu_addr)); | |
| 2846 | + | |
| 2847 | + mdelay(1); | |
| 2848 | + WREG32_SOC15(GC, 0, mmCP_RB1_CNTL, tmp); | |
| 2849 | + | |
| 2850 | + rb_addr = ring->gpu_addr >> 8; | |
| 2851 | + WREG32_SOC15(GC, 0, mmCP_RB1_BASE, rb_addr); | |
| 2852 | + WREG32_SOC15(GC, 0, mmCP_RB1_BASE_HI, upper_32_bits(rb_addr)); | |
| 2853 | + WREG32_SOC15(GC, 0, mmCP_RB1_ACTIVE, 1); | |
| 2854 | + | |
| 2855 | + gfx_v10_0_cp_gfx_set_doorbell(adev, ring); | |
| 2856 | + mutex_unlock(&adev->srbm_mutex); | |
| 2857 | + } | |
| 2854 | 2858 | /* Switch to pipe 0 */ |
| 2855 | 2859 | mutex_lock(&adev->srbm_mutex); |
| 2856 | 2860 | gfx_v10_0_cp_gfx_switch_pipe(adev, PIPE_ID0); |
| @@ -3513,6 +3517,7 @@ static int gfx_v10_0_kcq_init_queue(struct amdgpu_ring *ring) · 656 unmodified lines | ||
| 3513 | 3517 | |
| 3514 | 3518 | /* reset ring buffer */ |
| 3515 | 3519 | ring->wptr = 0; |
| 3520 | + atomic64_set((atomic64_t *)&adev->wb.wb[ring->wptr_offs], 0); | |
| 3516 | 3521 | amdgpu_ring_clear_ring(ring); |
| 3517 | 3522 | } else { |
| 3518 | 3523 | amdgpu_ring_clear_ring(ring); |
| @@ -3966,7 +3971,8 @@ static int gfx_v10_0_early_init(void *handle) · 447 unmodified lines | ||
| 3966 | 3971 | { |
| 3967 | 3972 | struct amdgpu_device *adev = (struct amdgpu_device *)handle; |
| 3968 | 3973 | |
| 3969 | − adev->gfx.num_gfx_rings = GFX10_NUM_GFX_RINGS; | |
| 3974 | + adev->gfx.num_gfx_rings = GFX10_NUM_GFX_RINGS_NV1X; | |
| 3975 | + | |
| 3970 | 3976 | adev->gfx.num_compute_rings = AMDGPU_MAX_COMPUTE_RINGS; |
| 3971 | 3977 | |
| 3972 | 3978 | gfx_v10_0_set_kiq_pm4_funcs(adev); |
| @@ -3663,6 +3663,7 @@ static int gfx_v9_0_kcq_init_queue(struct amdgpu_ring *ring) · 3662 unmodified lines | ||
| 3663 | 3663 | |
| 3664 | 3664 | /* reset ring buffer */ |
| 3665 | 3665 | ring->wptr = 0; |
| 3666 | + atomic64_set((atomic64_t *)&adev->wb.wb[ring->wptr_offs], 0); | |
| 3666 | 3667 | amdgpu_ring_clear_ring(ring); |
| 3667 | 3668 | } else { |
| 3668 | 3669 | amdgpu_ring_clear_ring(ring); |
| @@ -1422,6 +1422,73 @@ static void s3_handle_mst(struct drm_device *dev, bool suspend) · 1421 unmodified lines | ||
| 1422 | 1422 | drm_kms_helper_hotplug_event(dev); |
| 1423 | 1423 | } |
| 1424 | 1424 | |
| 1425 | +static int amdgpu_dm_smu_write_watermarks_table(struct amdgpu_device *adev) | |
| 1426 | +{ | |
| 1427 | + struct smu_context *smu = &adev->smu; | |
| 1428 | + int ret = 0; | |
| 1429 | + | |
| 1430 | + if (!is_support_sw_smu(adev)) | |
| 1431 | + return 0; | |
| 1432 | + | |
| 1433 | + /* This interface is for dGPU Navi1x.Linux dc-pplib interface depends | |
| 1434 | + * on window driver dc implementation. | |
| 1435 | + * For Navi1x, clock settings of dcn watermarks are fixed. the settings | |
| 1436 | + * should be passed to smu during boot up and resume from s3. | |
| 1437 | + * boot up: dc calculate dcn watermark clock settings within dc_create, | |
| 1438 | + * dcn20_resource_construct | |
| 1439 | + * then call pplib functions below to pass the settings to smu: | |
| 1440 | + * smu_set_watermarks_for_clock_ranges | |
| 1441 | + * smu_set_watermarks_table | |
| 1442 | + * navi10_set_watermarks_table | |
| 1443 | + * smu_write_watermarks_table | |
| 1444 | + * | |
| 1445 | + * For Renoir, clock settings of dcn watermark are also fixed values. | |
| 1446 | + * dc has implemented different flow for window driver: | |
| 1447 | + * dc_hardware_init / dc_set_power_state | |
| 1448 | + * dcn10_init_hw | |
| 1449 | + * notify_wm_ranges | |
| 1450 | + * set_wm_ranges | |
| 1451 | + * -- Linux | |
| 1452 | + * smu_set_watermarks_for_clock_ranges | |
| 1453 | + * renoir_set_watermarks_table | |
| 1454 | + * smu_write_watermarks_table | |
| 1455 | + * | |
| 1456 | + * For Linux, | |
| 1457 | + * dc_hardware_init -> amdgpu_dm_init | |
| 1458 | + * dc_set_power_state --> dm_resume | |
| 1459 | + * | |
| 1460 | + * therefore, this function apply to navi10/12/14 but not Renoir | |
| 1461 | + * * | |
| 1462 | + */ | |
| 1463 | + switch(adev->asic_type) { | |
| 1464 | + case CHIP_NAVI10: | |
| 1465 | + case CHIP_NAVI14: | |
| 1466 | + case CHIP_NAVI12: | |
| 1467 | + break; | |
| 1468 | + default: | |
| 1469 | + return 0; | |
| 1470 | + } | |
| 1471 | + | |
| 1472 | + mutex_lock(&smu->mutex); | |
| 1473 | + | |
| 1474 | + /* pass data to smu controller */ | |
| 1475 | + if ((smu->watermarks_bitmap & WATERMARKS_EXIST) && | |
| 1476 | + !(smu->watermarks_bitmap & WATERMARKS_LOADED)) { | |
| 1477 | + ret = smu_write_watermarks_table(smu); | |
| 1478 | + | |
| 1479 | + if (ret) { | |
| 1480 | + mutex_unlock(&smu->mutex); | |
| 1481 | + DRM_ERROR("Failed to update WMTABLE!\n"); | |
| 1482 | + return ret; | |
| 1483 | + } | |
| 1484 | + smu->watermarks_bitmap |= WATERMARKS_LOADED; | |
| 1485 | + } | |
| 1486 | + | |
| 1487 | + mutex_unlock(&smu->mutex); | |
| 1488 | + | |
| 1489 | + return 0; | |
| 1490 | +} | |
| 1491 | + | |
| 1425 | 1492 | /** |
| 1426 | 1493 | * dm_hw_init() - Initialize DC device |
| 1427 | 1494 | * @handle: The base driver device containing the amdgpu_dm device. |
| @@ -1700,6 +1767,8 @@ static int dm_resume(void *handle) · 272 unmodified lines | ||
| 1700 | 1767 | |
| 1701 | 1768 | amdgpu_dm_irq_resume_late(adev); |
| 1702 | 1769 | |
| 1770 | + amdgpu_dm_smu_write_watermarks_table(adev); | |
| 1771 | + | |
| 1703 | 1772 | return 0; |
| 1704 | 1773 | } |
| 1705 | 1774 | |
| @@ -451,6 +451,7 @@ static void dm_dp_destroy_mst_connector(struct drm_dp_mst_topology_mgr *mgr, · 450 unmodified lines | ||
| 451 | 451 | aconnector->dc_sink); |
| 452 | 452 | dc_sink_release(aconnector->dc_sink); |
| 453 | 453 | aconnector->dc_sink = NULL; |
| 454 | + aconnector->dc_link->cur_link_settings.lane_count = 0; | |
| 454 | 455 | } |
| 455 | 456 | |
| 456 | 457 | drm_connector_unregister(connector); |
| @@ -840,8 +840,8 @@ static void hubbub1_det_request_size( · 839 unmodified lines | ||
| 840 | 840 | |
| 841 | 841 | hubbub1_get_blk256_size(&blk256_width, &blk256_height, bpe); |
| 842 | 842 | |
| 843 | − swath_bytes_horz_wc = height * blk256_height * bpe; | |
| 844 | − swath_bytes_vert_wc = width * blk256_width * bpe; | |
| 843 | + swath_bytes_horz_wc = width * blk256_height * bpe; | |
| 844 | + swath_bytes_vert_wc = height * blk256_width * bpe; | |
| 845 | 845 | |
| 846 | 846 | *req128_horz_wc = (2 * swath_bytes_horz_wc <= detile_buf_size) ? |
| 847 | 847 | false : /* full 256B request */ |
| @@ -222,7 +222,7 @@ int smu_set_soft_freq_range(struct smu_context *smu, enum smu_clk_type clk_type, · 221 unmodified lines | ||
| 222 | 222 | { |
| 223 | 223 | int ret = 0; |
| 224 | 224 | |
| 225 | − if (min <= 0 && max <= 0) | |
| 225 | + if (min < 0 && max < 0) | |
| 226 | 226 | return -EINVAL; |
| 227 | 227 | |
| 228 | 228 | if (!smu_clk_dpm_is_enabled(smu, clk_type)) |
| @@ -111,8 +111,8 @@ static struct smu_12_0_cmn2aisc_mapping renoir_clk_map[SMU_CLK_COUNT] = { · 110 unmodified lines | ||
| 111 | 111 | CLK_MAP(GFXCLK, CLOCK_GFXCLK), |
| 112 | 112 | CLK_MAP(SCLK, CLOCK_GFXCLK), |
| 113 | 113 | CLK_MAP(SOCCLK, CLOCK_SOCCLK), |
| 114 | − CLK_MAP(UCLK, CLOCK_UMCCLK), | |
| 115 | − CLK_MAP(MCLK, CLOCK_UMCCLK), | |
| 114 | + CLK_MAP(UCLK, CLOCK_FCLK), | |
| 115 | + CLK_MAP(MCLK, CLOCK_FCLK), | |
| 116 | 116 | }; |
| 117 | 117 | |
| 118 | 118 | static struct smu_12_0_cmn2aisc_mapping renoir_table_map[SMU_TABLE_COUNT] = { |
| @@ -280,7 +280,7 @@ static int renoir_print_clk_levels(struct smu_context *smu, · 161 unmodified lines | ||
| 280 | 280 | break; |
| 281 | 281 | case SMU_MCLK: |
| 282 | 282 | count = NUM_MEMCLK_DPM_LEVELS; |
| 283 | − cur_value = metrics.ClockFrequency[CLOCK_UMCCLK]; | |
| 283 | + cur_value = metrics.ClockFrequency[CLOCK_FCLK]; | |
| 284 | 284 | break; |
| 285 | 285 | case SMU_DCEFCLK: |
| 286 | 286 | count = NUM_DCFCLK_DPM_LEVELS; |
| @@ -458,9 +458,6 @@ int smu_v12_0_set_soft_freq_limited_range(struct smu_context *smu, enum smu_clk_ · 457 unmodified lines | ||
| 458 | 458 | { |
| 459 | 459 | int ret = 0; |
| 460 | 460 | |
| 461 | − if (max < min) | |
| 462 | − return -EINVAL; | |
| 463 | − | |
| 464 | 461 | switch (clk_type) { |
| 465 | 462 | case SMU_GFXCLK: |
| 466 | 463 | case SMU_SCLK: |
| @@ -210,8 +210,7 @@ static int anx6345_dp_link_training(struct anx6345 *anx6345) · 209 unmodified lines | ||
| 210 | 210 | if (err) |
| 211 | 211 | return err; |
| 212 | 212 | |
| 213 | − dpcd[0] = drm_dp_max_link_rate(anx6345->dpcd); | |
| 214 | − dpcd[0] = drm_dp_link_rate_to_bw_code(dpcd[0]); | |
| 213 | + dpcd[0] = dp_bw; | |
| 215 | 214 | err = regmap_write(anx6345->map[I2C_IDX_DPTX], |
| 216 | 215 | SP_DP_MAIN_LINK_BW_SET_REG, dpcd[0]); |
| 217 | 216 | if (err) |
| @@ -254,11 +254,16 @@ static void *drm_gem_shmem_vmap_locked(struct drm_gem_shmem_object *shmem) · 253 unmodified lines | ||
| 254 | 254 | if (ret) |
| 255 | 255 | goto err_zero_use; |
| 256 | 256 | |
| 257 | − if (obj->import_attach) | |
| 257 | + if (obj->import_attach) { | |
| 258 | 258 | shmem->vaddr = dma_buf_vmap(obj->import_attach->dmabuf); |
| 259 | − else | |
| 259 | + } else { | |
| 260 | + pgprot_t prot = PAGE_KERNEL; | |
| 261 | + | |
| 262 | + if (!shmem->map_cached) | |
| 263 | + prot = pgprot_writecombine(prot); | |
| 260 | 264 | shmem->vaddr = vmap(shmem->pages, obj->size >> PAGE_SHIFT, |
| 261 | − VM_MAP, pgprot_writecombine(PAGE_KERNEL)); | |
| 265 | + VM_MAP, prot); | |
| 266 | + } | |
| 262 | 267 | |
| 263 | 268 | if (!shmem->vaddr) { |
| 264 | 269 | DRM_DEBUG_KMS("Failed to vmap pages\n"); |
| @@ -540,8 +545,9 @@ int drm_gem_shmem_mmap(struct drm_gem_object *obj, struct vm_area_struct *vma) · 275 unmodified lines | ||
| 540 | 545 | } |
| 541 | 546 | |
| 542 | 547 | vma->vm_flags |= VM_MIXEDMAP | VM_DONTEXPAND; |
| 543 | − vma->vm_page_prot = pgprot_writecombine(vm_get_page_prot(vma->vm_flags)); | |
| 544 | − vma->vm_page_prot = pgprot_decrypted(vma->vm_page_prot); | |
| 548 | + vma->vm_page_prot = vm_get_page_prot(vma->vm_flags); | |
| 549 | + if (!shmem->map_cached) | |
| 550 | + vma->vm_page_prot = pgprot_writecombine(vma->vm_page_prot); | |
| 545 | 551 | vma->vm_ops = &drm_gem_shmem_vm_ops; |
| 546 | 552 | |
| 547 | 553 | return 0; |
| @@ -1773,8 +1773,9 @@ static int exynos_dsi_probe(struct platform_device *pdev) · 1772 unmodified lines | ||
| 1773 | 1773 | ret = devm_regulator_bulk_get(dev, ARRAY_SIZE(dsi->supplies), |
| 1774 | 1774 | dsi->supplies); |
| 1775 | 1775 | if (ret) { |
| 1776 | − dev_info(dev, "failed to get regulators: %d\n", ret); | |
| 1777 | − return -EPROBE_DEFER; | |
| 1776 | + if (ret != -EPROBE_DEFER) | |
| 1777 | + dev_info(dev, "failed to get regulators: %d\n", ret); | |
| 1778 | + return ret; | |
| 1778 | 1779 | } |
| 1779 | 1780 | |
| 1780 | 1781 | dsi->clks = devm_kcalloc(dev, |
| @@ -1787,9 +1788,10 @@ static int exynos_dsi_probe(struct platform_device *pdev) · 6 unmodified lines | ||
| 1787 | 1788 | dsi->clks[i] = devm_clk_get(dev, clk_names[i]); |
| 1788 | 1789 | if (IS_ERR(dsi->clks[i])) { |
| 1789 | 1790 | if (strcmp(clk_names[i], "sclk_mipi") == 0) { |
| 1790 | − strcpy(clk_names[i], OLD_SCLK_MIPI_CLK_NAME); | |
| 1791 | − i--; | |
| 1792 | − continue; | |
| 1791 | + dsi->clks[i] = devm_clk_get(dev, | |
| 1792 | + OLD_SCLK_MIPI_CLK_NAME); | |
| 1793 | + if (!IS_ERR(dsi->clks[i])) | |
| 1794 | + continue; | |
| 1793 | 1795 | } |
| 1794 | 1796 | |
| 1795 | 1797 | dev_info(dev, "failed to get the clock: %s\n", |
| @@ -1805,18 +1805,10 @@ static int hdmi_resources_init(struct hdmi_context *hdata) · 1804 unmodified lines | ||
| 1805 | 1805 | |
| 1806 | 1806 | hdata->reg_hdmi_en = devm_regulator_get_optional(dev, "hdmi-en"); |
| 1807 | 1807 | |
| 1808 | − if (PTR_ERR(hdata->reg_hdmi_en) != -ENODEV) { | |
| 1808 | + if (PTR_ERR(hdata->reg_hdmi_en) != -ENODEV) | |
| 1809 | 1809 | if (IS_ERR(hdata->reg_hdmi_en)) |
| 1810 | 1810 | return PTR_ERR(hdata->reg_hdmi_en); |
| 1811 | 1811 | |
| 1812 | − ret = regulator_enable(hdata->reg_hdmi_en); | |
| 1813 | − if (ret) { | |
| 1814 | − DRM_DEV_ERROR(dev, | |
| 1815 | − "failed to enable hdmi-en regulator\n"); | |
| 1816 | − return ret; | |
| 1817 | − } | |
| 1818 | − } | |
| 1819 | − | |
| 1820 | 1812 | return hdmi_bridge_init(hdata); |
| 1821 | 1813 | } |
| 1822 | 1814 | |
| @@ -2023,6 +2015,15 @@ static int hdmi_probe(struct platform_device *pdev) · 200 unmodified lines | ||
| 2023 | 2015 | } |
| 2024 | 2016 | } |
| 2025 | 2017 | |
| 2018 | + if (!IS_ERR(hdata->reg_hdmi_en)) { | |
| 2019 | + ret = regulator_enable(hdata->reg_hdmi_en); | |
| 2020 | + if (ret) { | |
| 2021 | + DRM_DEV_ERROR(dev, | |
| 2022 | + "failed to enable hdmi-en regulator\n"); | |
| 2023 | + goto err_hdmiphy; | |
| 2024 | + } | |
| 2025 | + } | |
| 2026 | + | |
| 2026 | 2027 | pm_runtime_enable(dev); |
| 2027 | 2028 | |
| 2028 | 2029 | audio_infoframe = &hdata->audio.infoframe; |
| @@ -2047,7 +2048,8 @@ err_unregister_audio: · 18 unmodified lines | ||
| 2047 | 2048 | |
| 2048 | 2049 | err_rpm_disable: |
| 2049 | 2050 | pm_runtime_disable(dev); |
| 2050 | − | |
| 2051 | + if (!IS_ERR(hdata->reg_hdmi_en)) | |
| 2052 | + regulator_disable(hdata->reg_hdmi_en); | |
| 2051 | 2053 | err_hdmiphy: |
| 2052 | 2054 | if (hdata->hdmiphy_port) |
| 2053 | 2055 | put_device(&hdata->hdmiphy_port->dev); |
| @@ -83,7 +83,6 @@ · 82 unmodified lines | ||
| 83 | 83 | #define VSIZE_OFST 20 |
| 84 | 84 | #define LDI_INT_EN 0x741C |
| 85 | 85 | #define FRAME_END_INT_EN_OFST 1 |
| 86 | −#define UNDERFLOW_INT_EN_OFST 2 | |
| 87 | 86 | #define LDI_CTRL 0x7420 |
| 88 | 87 | #define BPP_OFST 3 |
| 89 | 88 | #define DATA_GATE_EN BIT(2) |
| @@ -46,7 +46,6 @@ struct ade_hw_ctx { · 45 unmodified lines | ||
| 46 | 46 | struct clk *media_noc_clk; |
| 47 | 47 | struct clk *ade_pix_clk; |
| 48 | 48 | struct reset_control *reset; |
| 49 | − struct work_struct display_reset_wq; | |
| 50 | 49 | bool power_on; |
| 51 | 50 | int irq; |
| 52 | 51 | |
| @@ -136,7 +135,6 @@ static void ade_init(struct ade_hw_ctx *ctx) · 83 unmodified lines | ||
| 136 | 135 | */ |
| 137 | 136 | ade_update_bits(base + ADE_CTRL, FRM_END_START_OFST, |
| 138 | 137 | FRM_END_START_MASK, REG_EFFECTIVE_IN_ADEEN_FRMEND); |
| 139 | − ade_update_bits(base + LDI_INT_EN, UNDERFLOW_INT_EN_OFST, MASK(1), 1); | |
| 140 | 138 | } |
| 141 | 139 | |
| 142 | 140 | static bool ade_crtc_mode_fixup(struct drm_crtc *crtc, |
| @@ -304,17 +302,6 @@ static void ade_crtc_disable_vblank(struct drm_crtc *crtc) · 161 unmodified lines | ||
| 304 | 302 | MASK(1), 0); |
| 305 | 303 | } |
| 306 | 304 | |
| 307 | −static void drm_underflow_wq(struct work_struct *work) | |
| 308 | −{ | |
| 309 | − struct ade_hw_ctx *ctx = container_of(work, struct ade_hw_ctx, | |
| 310 | − display_reset_wq); | |
| 311 | − struct drm_device *drm_dev = ctx->crtc->dev; | |
| 312 | − struct drm_atomic_state *state; | |
| 313 | − | |
| 314 | − state = drm_atomic_helper_suspend(drm_dev); | |
| 315 | − drm_atomic_helper_resume(drm_dev, state); | |
| 316 | −} | |
| 317 | − | |
| 318 | 305 | static irqreturn_t ade_irq_handler(int irq, void *data) |
| 319 | 306 | { |
| 320 | 307 | struct ade_hw_ctx *ctx = data; |
| @@ -331,12 +318,6 @@ static irqreturn_t ade_irq_handler(int irq, void *data) · 10 unmodified lines | ||
| 331 | 318 | MASK(1), 1); |
| 332 | 319 | drm_crtc_handle_vblank(crtc); |
| 333 | 320 | } |
| 334 | − if (status & BIT(UNDERFLOW_INT_EN_OFST)) { | |
| 335 | − ade_update_bits(base + LDI_INT_CLR, UNDERFLOW_INT_EN_OFST, | |
| 336 | − MASK(1), 1); | |
| 337 | − DRM_ERROR("LDI underflow!"); | |
| 338 | − schedule_work(&ctx->display_reset_wq); | |
| 339 | − } | |
| 340 | 321 | |
| 341 | 322 | return IRQ_HANDLED; |
| 342 | 323 | } |
| @@ -919,7 +900,6 @@ static void *ade_hw_ctx_alloc(struct platform_device *pdev, · 576 unmodified lines | ||
| 919 | 900 | if (ret) |
| 920 | 901 | return ERR_PTR(-EIO); |
| 921 | 902 | |
| 922 | − INIT_WORK(&ctx->display_reset_wq, drm_underflow_wq); | |
| 923 | 903 | ctx->crtc = crtc; |
| 924 | 904 | |
| 925 | 905 | return ctx; |
| @@ -4466,13 +4466,19 @@ static void icl_dbuf_disable(struct drm_i915_private *dev_priv) · 4465 unmodified lines | ||
| 4466 | 4466 | |
| 4467 | 4467 | static void icl_mbus_init(struct drm_i915_private *dev_priv) |
| 4468 | 4468 | { |
| 4469 | − u32 val; | |
| 4469 | + u32 mask, val; | |
| 4470 | 4470 | |
| 4471 | − val = MBUS_ABOX_BT_CREDIT_POOL1(16) | | |
| 4472 | − MBUS_ABOX_BT_CREDIT_POOL2(16) | | |
| 4473 | − MBUS_ABOX_B_CREDIT(1) | | |
| 4474 | − MBUS_ABOX_BW_CREDIT(1); | |
| 4471 | + mask = MBUS_ABOX_BT_CREDIT_POOL1_MASK | | |
| 4472 | + MBUS_ABOX_BT_CREDIT_POOL2_MASK | | |
| 4473 | + MBUS_ABOX_B_CREDIT_MASK | | |
| 4474 | + MBUS_ABOX_BW_CREDIT_MASK; | |
| 4475 | 4475 | |
| 4476 | + val = I915_READ(MBUS_ABOX_CTL); | |
| 4477 | + val &= ~mask; | |
| 4478 | + val |= MBUS_ABOX_BT_CREDIT_POOL1(16) | | |
| 4479 | + MBUS_ABOX_BT_CREDIT_POOL2(16) | | |
| 4480 | + MBUS_ABOX_B_CREDIT(1) | | |
| 4481 | + MBUS_ABOX_BW_CREDIT(1); | |
| 4476 | 4482 | I915_WRITE(MBUS_ABOX_CTL, val); |
| 4477 | 4483 | } |
| 4478 | 4484 | |
| @@ -4968,8 +4974,21 @@ static void tgl_bw_buddy_init(struct drm_i915_private *dev_priv) · 489 unmodified lines | ||
| 4968 | 4974 | I915_WRITE(BW_BUDDY1_CTL, BW_BUDDY_DISABLE); |
| 4969 | 4975 | I915_WRITE(BW_BUDDY2_CTL, BW_BUDDY_DISABLE); |
| 4970 | 4976 | } else { |
| 4977 | + u32 val; | |
| 4978 | + | |
| 4971 | 4979 | I915_WRITE(BW_BUDDY1_PAGE_MASK, table[i].page_mask); |
| 4972 | 4980 | I915_WRITE(BW_BUDDY2_PAGE_MASK, table[i].page_mask); |
| 4981 | + | |
| 4982 | + /* Wa_22010178259:tgl */ | |
| 4983 | + val = I915_READ(BW_BUDDY1_CTL); | |
| 4984 | + val &= ~BW_BUDDY_TLB_REQ_TIMER_MASK; | |
| 4985 | + val |= REG_FIELD_PREP(BW_BUDDY_TLB_REQ_TIMER_MASK, 0x8); | |
| 4986 | + I915_WRITE(BW_BUDDY1_CTL, val); | |
| 4987 | + | |
| 4988 | + val = I915_READ(BW_BUDDY2_CTL); | |
| 4989 | + val &= ~BW_BUDDY_TLB_REQ_TIMER_MASK; | |
| 4990 | + val |= REG_FIELD_PREP(BW_BUDDY_TLB_REQ_TIMER_MASK, 0x8); | |
| 4991 | + I915_WRITE(BW_BUDDY2_CTL, val); | |
| 4973 | 4992 | } |
| 4974 | 4993 | } |
| 4975 | 4994 | |
| @@ -852,10 +852,12 @@ void intel_psr_enable(struct intel_dp *intel_dp, · 851 unmodified lines | ||
| 852 | 852 | { |
| 853 | 853 | struct drm_i915_private *dev_priv = dp_to_i915(intel_dp); |
| 854 | 854 | |
| 855 | − if (!crtc_state->has_psr) | |
| 855 | + if (!CAN_PSR(dev_priv) || dev_priv->psr.dp != intel_dp) | |
| 856 | 856 | return; |
| 857 | 857 | |
| 858 | − if (WARN_ON(!CAN_PSR(dev_priv))) | |
| 858 | + dev_priv->psr.force_mode_changed = false; | |
| 859 | + | |
| 860 | + if (!crtc_state->has_psr) | |
| 859 | 861 | return; |
| 860 | 862 | |
| 861 | 863 | WARN_ON(dev_priv->drrs.dp); |
| @@ -1009,6 +1011,8 @@ void intel_psr_update(struct intel_dp *intel_dp, · 147 unmodified lines | ||
| 1009 | 1011 | if (!CAN_PSR(dev_priv) || READ_ONCE(psr->dp) != intel_dp) |
| 1010 | 1012 | return; |
| 1011 | 1013 | |
| 1014 | + dev_priv->psr.force_mode_changed = false; | |
| 1015 | + | |
| 1012 | 1016 | mutex_lock(&dev_priv->psr.lock); |
| 1013 | 1017 | |
| 1014 | 1018 | enable = crtc_state->has_psr && psr_global_enabled(psr->debug); |
| @@ -1534,7 +1538,7 @@ void intel_psr_atomic_check(struct drm_connector *connector, · 519 unmodified lines | ||
| 1534 | 1538 | struct drm_crtc_state *crtc_state; |
| 1535 | 1539 | |
| 1536 | 1540 | if (!CAN_PSR(dev_priv) || !new_state->crtc || |
| 1537 | − dev_priv->psr.initially_probed) | |
| 1541 | + !dev_priv->psr.force_mode_changed) | |
| 1538 | 1542 | return; |
| 1539 | 1543 | |
| 1540 | 1544 | intel_connector = to_intel_connector(connector); |
| @@ -1545,5 +1549,18 @@ void intel_psr_atomic_check(struct drm_connector *connector, · 4 unmodified lines | ||
| 1545 | 1549 | crtc_state = drm_atomic_get_new_crtc_state(new_state->state, |
| 1546 | 1550 | new_state->crtc); |
| 1547 | 1551 | crtc_state->mode_changed = true; |
| 1548 | − dev_priv->psr.initially_probed = true; | |
| 1552 | +} | |
| 1553 | + | |
| 1554 | +void intel_psr_set_force_mode_changed(struct intel_dp *intel_dp) | |
| 1555 | +{ | |
| 1556 | + struct drm_i915_private *dev_priv; | |
| 1557 | + | |
| 1558 | + if (!intel_dp) | |
| 1559 | + return; | |
| 1560 | + | |
| 1561 | + dev_priv = dp_to_i915(intel_dp); | |
| 1562 | + if (!CAN_PSR(dev_priv) || intel_dp != dev_priv->psr.dp) | |
| 1563 | + return; | |
| 1564 | + | |
| 1565 | + dev_priv->psr.force_mode_changed = true; | |
| 1549 | 1566 | } |
| @@ -40,5 +40,6 @@ bool intel_psr_enabled(struct intel_dp *intel_dp); · 39 unmodified lines | ||
| 40 | 40 | void intel_psr_atomic_check(struct drm_connector *connector, |
| 41 | 41 | struct drm_connector_state *old_state, |
| 42 | 42 | struct drm_connector_state *new_state); |
| 43 | +void intel_psr_set_force_mode_changed(struct intel_dp *intel_dp); | |
| 43 | 44 | |
| 44 | 45 | #endif /* __INTEL_PSR_H__ */ |
| @@ -225,6 +225,7 @@ static void __i915_gem_free_objects(struct drm_i915_private *i915, · 224 unmodified lines | ||
| 225 | 225 | |
| 226 | 226 | /* But keep the pointer alive for RCU-protected lookups */ |
| 227 | 227 | call_rcu(&obj->rcu, __i915_gem_free_object_rcu); |
| 228 | + cond_resched(); | |
| 228 | 229 | } |
| 229 | 230 | intel_runtime_pm_put(&i915->runtime_pm, wakeref); |
| 230 | 231 | } |
| @@ -570,7 +570,7 @@ static bool assert_mmap_offset(struct drm_i915_private *i915, · 569 unmodified lines | ||
| 570 | 570 | |
| 571 | 571 | obj = i915_gem_object_create_internal(i915, size); |
| 572 | 572 | if (IS_ERR(obj)) |
| 573 | − return PTR_ERR(obj); | |
| 573 | + return false; | |
| 574 | 574 | |
| 575 | 575 | mmo = mmap_offset_attach(obj, I915_MMAP_OFFSET_GTT, NULL); |
| 576 | 576 | i915_gem_object_put(obj); |
| @@ -147,24 +147,32 @@ long intel_gt_retire_requests_timeout(struct intel_gt *gt, long timeout) · 146 unmodified lines | ||
| 147 | 147 | |
| 148 | 148 | fence = i915_active_fence_get(&tl->last_request); |
| 149 | 149 | if (fence) { |
| 150 | + mutex_unlock(&tl->mutex); | |
| 151 | + | |
| 150 | 152 | timeout = dma_fence_wait_timeout(fence, |
| 151 | 153 | interruptible, |
| 152 | 154 | timeout); |
| 153 | 155 | dma_fence_put(fence); |
| 156 | + | |
| 157 | + /* Retirement is best effort */ | |
| 158 | + if (!mutex_trylock(&tl->mutex)) { | |
| 159 | + active_count++; | |
| 160 | + goto out_active; | |
| 161 | + } | |
| 154 | 162 | } |
| 155 | 163 | } |
| 156 | 164 | |
| 157 | 165 | if (!retire_requests(tl) || flush_submission(gt)) |
| 158 | 166 | active_count++; |
| 167 | + mutex_unlock(&tl->mutex); | |
| 159 | 168 | |
| 160 | − spin_lock(&timelines->lock); | |
| 169 | +out_active: spin_lock(&timelines->lock); | |
| 161 | 170 | |
| 162 | − /* Resume iteration after dropping lock */ | |
| 171 | + /* Resume list iteration after reacquiring spinlock */ | |
| 163 | 172 | list_safe_reset_next(tl, tn, link); |
| 164 | 173 | if (atomic_dec_and_test(&tl->active_count)) |
| 165 | 174 | list_del(&tl->link); |
| 166 | 175 | |
| 167 | − mutex_unlock(&tl->mutex); | |
| 168 | 176 | |
| 169 | 177 | /* Defer the final release to after the spinlock */ |
| 170 | 178 | if (refcount_dec_and_test(&tl->kref.refcount)) { |
| @@ -575,24 +575,19 @@ static void icl_ctx_workarounds_init(struct intel_engine_cs *engine, · 574 unmodified lines | ||
| 575 | 575 | static void tgl_ctx_workarounds_init(struct intel_engine_cs *engine, |
| 576 | 576 | struct i915_wa_list *wal) |
| 577 | 577 | { |
| 578 | − u32 val; | |
| 579 | − | |
| 580 | 578 | /* Wa_1409142259:tgl */ |
| 581 | 579 | WA_SET_BIT_MASKED(GEN11_COMMON_SLICE_CHICKEN3, |
| 582 | 580 | GEN12_DISABLE_CPS_AWARE_COLOR_PIPE); |
| 583 | 581 | |
| 584 | − /* Wa_1604555607:tgl */ | |
| 585 | − val = intel_uncore_read(engine->uncore, FF_MODE2); | |
| 586 | − val &= ~FF_MODE2_TDS_TIMER_MASK; | |
| 587 | − val |= FF_MODE2_TDS_TIMER_128; | |
| 588 | 582 | /* |
| 589 | − * FIXME: FF_MODE2 register is not readable till TGL B0. We can | |
| 590 | − * enable verification of WA from the later steppings, which enables | |
| 591 | − * the read of FF_MODE2. | |
| 583 | + * Wa_1604555607:gen12 and Wa_1608008084:gen12 | |
| 584 | + * FF_MODE2 register will return the wrong value when read. The default | |
| 585 | + * value for this register is zero for all fields and there are no bit | |
| 586 | + * masks. So instead of doing a RMW we should just write the TDS timer | |
| 587 | + * value for Wa_1604555607. | |
| 592 | 588 | */ |
| 593 | − wa_add(wal, FF_MODE2, FF_MODE2_TDS_TIMER_MASK, val, | |
| 594 | − IS_TGL_REVID(engine->i915, TGL_REVID_A0, TGL_REVID_A0) ? 0 : | |
| 595 | − FF_MODE2_TDS_TIMER_MASK); | |
| 589 | + wa_add(wal, FF_MODE2, FF_MODE2_TDS_TIMER_MASK, | |
| 590 | + FF_MODE2_TDS_TIMER_128, 0); | |
| 596 | 591 | } |
| 597 | 592 | |
| 598 | 593 | static void |
| @@ -56,6 +56,7 @@ · 55 unmodified lines | ||
| 56 | 56 | #include "display/intel_hotplug.h" |
| 57 | 57 | #include "display/intel_overlay.h" |
| 58 | 58 | #include "display/intel_pipe_crc.h" |
| 59 | +#include "display/intel_psr.h" | |
| 59 | 60 | #include "display/intel_sprite.h" |
| 60 | 61 | #include "display/intel_vga.h" |
| 61 | 62 | |
| @@ -330,6 +331,8 @@ static int i915_driver_modeset_probe(struct drm_i915_private *i915) · 268 unmodified lines | ||
| 330 | 331 | |
| 331 | 332 | intel_init_ipc(i915); |
| 332 | 333 | |
| 334 | + intel_psr_set_force_mode_changed(i915->psr.dp); | |
| 335 | + | |
| 333 | 336 | return 0; |
| 334 | 337 | |
| 335 | 338 | cleanup_gem: |
| @@ -505,7 +505,7 @@ struct i915_psr { · 504 unmodified lines | ||
| 505 | 505 | bool dc3co_enabled; |
| 506 | 506 | u32 dc3co_exit_delay; |
| 507 | 507 | struct delayed_work idle_work; |
| 508 | − bool initially_probed; | |
| 508 | + bool force_mode_changed; | |
| 509 | 509 | }; |
| 510 | 510 | |
| 511 | 511 | #define QUIRK_LVDS_SSC_DISABLE (1<<1) |
| @@ -1954,9 +1954,10 @@ out: · 1953 unmodified lines | ||
| 1954 | 1954 | return i915_vma_get(oa_bo->vma); |
| 1955 | 1955 | } |
| 1956 | 1956 | |
| 1957 | −static int emit_oa_config(struct i915_perf_stream *stream, | |
| 1958 | − struct i915_oa_config *oa_config, | |
| 1959 | − struct intel_context *ce) | |
| 1957 | +static struct i915_request * | |
| 1958 | +emit_oa_config(struct i915_perf_stream *stream, | |
| 1959 | + struct i915_oa_config *oa_config, | |
| 1960 | + struct intel_context *ce) | |
| 1960 | 1961 | { |
| 1961 | 1962 | struct i915_request *rq; |
| 1962 | 1963 | struct i915_vma *vma; |
| @@ -1964,7 +1965,7 @@ static int emit_oa_config(struct i915_perf_stream *stream, · 1 unmodified line | ||
| 1964 | 1965 | |
| 1965 | 1966 | vma = get_oa_vma(stream, oa_config); |
| 1966 | 1967 | if (IS_ERR(vma)) |
| 1967 | − return PTR_ERR(vma); | |
| 1968 | + return ERR_CAST(vma); | |
| 1968 | 1969 | |
| 1969 | 1970 | err = i915_vma_pin(vma, 0, 0, PIN_GLOBAL | PIN_HIGH); |
| 1970 | 1971 | if (err) |
| @@ -1989,13 +1990,17 @@ static int emit_oa_config(struct i915_perf_stream *stream, · 18 unmodified lines | ||
| 1989 | 1990 | err = rq->engine->emit_bb_start(rq, |
| 1990 | 1991 | vma->node.start, 0, |
| 1991 | 1992 | I915_DISPATCH_SECURE); |
| 1993 | + if (err) | |
| 1994 | + goto err_add_request; | |
| 1995 | + | |
| 1996 | + i915_request_get(rq); | |
| 1992 | 1997 | err_add_request: |
| 1993 | 1998 | i915_request_add(rq); |
| 1994 | 1999 | err_vma_unpin: |
| 1995 | 2000 | i915_vma_unpin(vma); |
| 1996 | 2001 | err_vma_put: |
| 1997 | 2002 | i915_vma_put(vma); |
| 1998 | − return err; | |
| 2003 | + return err ? ERR_PTR(err) : rq; | |
| 1999 | 2004 | } |
| 2000 | 2005 | |
| 2001 | 2006 | static struct intel_context *oa_context(struct i915_perf_stream *stream) |
| @@ -2003,7 +2008,8 @@ static struct intel_context *oa_context(struct i915_perf_stream *stream) · 1 unmodified line | ||
| 2003 | 2008 | return stream->pinned_ctx ?: stream->engine->kernel_context; |
| 2004 | 2009 | } |
| 2005 | 2010 | |
| 2006 | −static int hsw_enable_metric_set(struct i915_perf_stream *stream) | |
| 2011 | +static struct i915_request * | |
| 2012 | +hsw_enable_metric_set(struct i915_perf_stream *stream) | |
| 2007 | 2013 | { |
| 2008 | 2014 | struct intel_uncore *uncore = stream->uncore; |
| 2009 | 2015 | |
| @@ -2406,7 +2412,8 @@ static int lrc_configure_all_contexts(struct i915_perf_stream *stream, · 396 unmodified lines | ||
| 2406 | 2412 | return oa_configure_all_contexts(stream, regs, ARRAY_SIZE(regs)); |
| 2407 | 2413 | } |
| 2408 | 2414 | |
| 2409 | −static int gen8_enable_metric_set(struct i915_perf_stream *stream) | |
| 2415 | +static struct i915_request * | |
| 2416 | +gen8_enable_metric_set(struct i915_perf_stream *stream) | |
| 2410 | 2417 | { |
| 2411 | 2418 | struct intel_uncore *uncore = stream->uncore; |
| 2412 | 2419 | struct i915_oa_config *oa_config = stream->oa_config; |
| @@ -2448,7 +2455,7 @@ static int gen8_enable_metric_set(struct i915_perf_stream *stream) · 35 unmodified lines | ||
| 2448 | 2455 | */ |
| 2449 | 2456 | ret = lrc_configure_all_contexts(stream, oa_config); |
| 2450 | 2457 | if (ret) |
| 2451 | − return ret; | |
| 2458 | + return ERR_PTR(ret); | |
| 2452 | 2459 | |
| 2453 | 2460 | return emit_oa_config(stream, oa_config, oa_context(stream)); |
| 2454 | 2461 | } |
| @@ -2460,7 +2467,8 @@ static u32 oag_report_ctx_switches(const struct i915_perf_stream *stream) · 5 unmodified lines | ||
| 2460 | 2467 | 0 : GEN12_OAG_OA_DEBUG_DISABLE_CTX_SWITCH_REPORTS); |
| 2461 | 2468 | } |
| 2462 | 2469 | |
| 2463 | −static int gen12_enable_metric_set(struct i915_perf_stream *stream) | |
| 2470 | +static struct i915_request * | |
| 2471 | +gen12_enable_metric_set(struct i915_perf_stream *stream) | |
| 2464 | 2472 | { |
| 2465 | 2473 | struct intel_uncore *uncore = stream->uncore; |
| 2466 | 2474 | struct i915_oa_config *oa_config = stream->oa_config; |
| @@ -2491,7 +2499,7 @@ static int gen12_enable_metric_set(struct i915_perf_stream *stream) · 24 unmodified lines | ||
| 2491 | 2499 | */ |
| 2492 | 2500 | ret = gen12_configure_all_contexts(stream, oa_config); |
| 2493 | 2501 | if (ret) |
| 2494 | − return ret; | |
| 2502 | + return ERR_PTR(ret); | |
| 2495 | 2503 | |
| 2496 | 2504 | /* |
| 2497 | 2505 | * For Gen12, performance counters are context |
| @@ -2501,7 +2509,7 @@ static int gen12_enable_metric_set(struct i915_perf_stream *stream) · 3 unmodified lines | ||
| 2501 | 2509 | if (stream->ctx) { |
| 2502 | 2510 | ret = gen12_configure_oar_context(stream, true); |
| 2503 | 2511 | if (ret) |
| 2504 | − return ret; | |
| 2512 | + return ERR_PTR(ret); | |
| 2505 | 2513 | } |
| 2506 | 2514 | |
| 2507 | 2515 | return emit_oa_config(stream, oa_config, oa_context(stream)); |
| @@ -2696,6 +2704,20 @@ static const struct i915_perf_stream_ops i915_oa_stream_ops = { · 188 unmodified lines | ||
| 2696 | 2704 | .read = i915_oa_read, |
| 2697 | 2705 | }; |
| 2698 | 2706 | |
| 2707 | +static int i915_perf_stream_enable_sync(struct i915_perf_stream *stream) | |
| 2708 | +{ | |
| 2709 | + struct i915_request *rq; | |
| 2710 | + | |
| 2711 | + rq = stream->perf->ops.enable_metric_set(stream); | |
| 2712 | + if (IS_ERR(rq)) | |
| 2713 | + return PTR_ERR(rq); | |
| 2714 | + | |
| 2715 | + i915_request_wait(rq, 0, MAX_SCHEDULE_TIMEOUT); | |
| 2716 | + i915_request_put(rq); | |
| 2717 | + | |
| 2718 | + return 0; | |
| 2719 | +} | |
| 2720 | + | |
| 2699 | 2721 | /** |
| 2700 | 2722 | * i915_oa_stream_init - validate combined props for OA stream and init |
| 2701 | 2723 | * @stream: An i915 perf stream |
| @@ -2829,7 +2851,7 @@ static int i915_oa_stream_init(struct i915_perf_stream *stream, · 127 unmodified lines | ||
| 2829 | 2851 | stream->ops = &i915_oa_stream_ops; |
| 2830 | 2852 | perf->exclusive_stream = stream; |
| 2831 | 2853 | |
| 2832 | − ret = perf->ops.enable_metric_set(stream); | |
| 2854 | + ret = i915_perf_stream_enable_sync(stream); | |
| 2833 | 2855 | if (ret) { |
| 2834 | 2856 | DRM_DEBUG("Unable to enable metric set\n"); |
| 2835 | 2857 | goto err_enable; |
| @@ -3147,7 +3169,7 @@ static long i915_perf_config_locked(struct i915_perf_stream *stream, · 311 unmodified lines | ||
| 3147 | 3169 | return -EINVAL; |
| 3148 | 3170 | |
| 3149 | 3171 | if (config != stream->oa_config) { |
| 3150 | − int err; | |
| 3172 | + struct i915_request *rq; | |
| 3151 | 3173 | |
| 3152 | 3174 | /* |
| 3153 | 3175 | * If OA is bound to a specific context, emit the |
| @@ -3158,11 +3180,13 @@ static long i915_perf_config_locked(struct i915_perf_stream *stream, · 4 unmodified lines | ||
| 3158 | 3180 | * When set globally, we use a low priority kernel context, |
| 3159 | 3181 | * so it will effectively take effect when idle. |
| 3160 | 3182 | */ |
| 3161 | − err = emit_oa_config(stream, config, oa_context(stream)); | |
| 3162 | − if (err == 0) | |
| 3183 | + rq = emit_oa_config(stream, config, oa_context(stream)); | |
| 3184 | + if (!IS_ERR(rq)) { | |
| 3163 | 3185 | config = xchg(&stream->oa_config, config); |
| 3164 | − else | |
| 3165 | − ret = err; | |
| 3186 | + i915_request_put(rq); | |
| 3187 | + } else { | |
| 3188 | + ret = PTR_ERR(rq); | |
| 3189 | + } | |
| 3166 | 3190 | } |
| 3167 | 3191 | |
| 3168 | 3192 | i915_oa_config_put(config); |
| @@ -339,7 +339,8 @@ struct i915_oa_ops { · 338 unmodified lines | ||
| 339 | 339 | * counter reports being sampled. May apply system constraints such as |
| 340 | 340 | * disabling EU clock gating as required. |
| 341 | 341 | */ |
| 342 | − int (*enable_metric_set)(struct i915_perf_stream *stream); | |
| 342 | + struct i915_request * | |
| 343 | + (*enable_metric_set)(struct i915_perf_stream *stream); | |
| 343 | 344 | |
| 344 | 345 | /** |
| 345 | 346 | * @disable_metric_set: Remove system constraints associated with using |
| @@ -7757,6 +7757,7 @@ enum { · 7756 unmodified lines | ||
| 7757 | 7757 | #define BW_BUDDY1_CTL _MMIO(0x45140) |
| 7758 | 7758 | #define BW_BUDDY2_CTL _MMIO(0x45150) |
| 7759 | 7759 | #define BW_BUDDY_DISABLE REG_BIT(31) |
| 7760 | +#define BW_BUDDY_TLB_REQ_TIMER_MASK REG_GENMASK(21, 16) | |
| 7760 | 7761 | |
| 7761 | 7762 | #define BW_BUDDY1_PAGE_MASK _MMIO(0x45144) |
| 7762 | 7763 | #define BW_BUDDY2_PAGE_MASK _MMIO(0x45154) |
| @@ -275,7 +275,7 @@ bool i915_request_retire(struct i915_request *rq) · 274 unmodified lines | ||
| 275 | 275 | spin_unlock_irq(&rq->lock); |
| 276 | 276 | |
| 277 | 277 | remove_from_client(rq); |
| 278 | − list_del(&rq->link); | |
| 278 | + list_del_rcu(&rq->link); | |
| 279 | 279 | |
| 280 | 280 | intel_context_exit(rq->context); |
| 281 | 281 | intel_context_unpin(rq->context); |
| @@ -721,6 +721,8 @@ __i915_request_create(struct intel_context *ce, gfp_t gfp) · 439 unmodified lines | ||
| 721 | 721 | rq->infix = rq->ring->emit; /* end of header; start of user payload */ |
| 722 | 722 | |
| 723 | 723 | intel_context_mark_active(ce); |
| 724 | + list_add_tail_rcu(&rq->link, &tl->requests); | |
| 725 | + | |
| 724 | 726 | return rq; |
| 725 | 727 | |
| 726 | 728 | err_unwind: |
| @@ -777,13 +779,23 @@ i915_request_await_start(struct i915_request *rq, struct i915_request *signal) · 50 unmodified lines | ||
| 777 | 779 | GEM_BUG_ON(i915_request_timeline(rq) == |
| 778 | 780 | rcu_access_pointer(signal->timeline)); |
| 779 | 781 | |
| 782 | + if (i915_request_started(signal)) | |
| 783 | + return 0; | |
| 784 | + | |
| 780 | 785 | fence = NULL; |
| 781 | 786 | rcu_read_lock(); |
| 782 | 787 | spin_lock_irq(&signal->lock); |
| 783 | − if (!i915_request_started(signal) && | |
| 784 | − !list_is_first(&signal->link, | |
| 785 | − &rcu_dereference(signal->timeline)->requests)) { | |
| 786 | − struct i915_request *prev = list_prev_entry(signal, link); | |
| 788 | + do { | |
| 789 | + struct list_head *pos = READ_ONCE(signal->link.prev); | |
| 790 | + struct i915_request *prev; | |
| 791 | + | |
| 792 | + /* Confirm signal has not been retired, the link is valid */ | |
| 793 | + if (unlikely(i915_request_started(signal))) | |
| 794 | + break; | |
| 795 | + | |
| 796 | + /* Is signal the earliest request on its timeline? */ | |
| 797 | + if (pos == &rcu_dereference(signal->timeline)->requests) | |
| 798 | + break; | |
| 787 | 799 | |
| 788 | 800 | /* |
| 789 | 801 | * Peek at the request before us in the timeline. That |
| @@ -791,13 +803,18 @@ i915_request_await_start(struct i915_request *rq, struct i915_request *signal) · 1 unmodified line | ||
| 791 | 803 | * after acquiring a reference to it, confirm that it is |
| 792 | 804 | * still part of the signaler's timeline. |
| 793 | 805 | */ |
| 794 | − if (i915_request_get_rcu(prev)) { | |
| 795 | − if (list_next_entry(prev, link) == signal) | |
| 796 | − fence = &prev->fence; | |
| 797 | − else | |
| 798 | − i915_request_put(prev); | |
| 806 | + prev = list_entry(pos, typeof(*prev), link); | |
| 807 | + if (!i915_request_get_rcu(prev)) | |
| 808 | + break; | |
| 809 | + | |
| 810 | + /* After the strong barrier, confirm prev is still attached */ | |
| 811 | + if (unlikely(READ_ONCE(prev->link.next) != &signal->link)) { | |
| 812 | + i915_request_put(prev); | |
| 813 | + break; | |
| 799 | 814 | } |
| 800 | − } | |
| 815 | + | |
| 816 | + fence = &prev->fence; | |
| 817 | + } while (0); | |
| 801 | 818 | spin_unlock_irq(&signal->lock); |
| 802 | 819 | rcu_read_unlock(); |
| 803 | 820 | if (!fence) |
| @@ -1242,8 +1259,6 @@ __i915_request_add_to_timeline(struct i915_request *rq) · 438 unmodified lines | ||
| 1242 | 1259 | 0); |
| 1243 | 1260 | } |
| 1244 | 1261 | |
| 1245 | − list_add_tail(&rq->link, &timeline->requests); | |
| 1246 | − | |
| 1247 | 1262 | /* |
| 1248 | 1263 | * Make sure that no request gazumped us - if it was allocated after |
| 1249 | 1264 | * our i915_request_alloc() and called __i915_request_add() before |
| @@ -486,6 +486,7 @@ static void mtk_drm_crtc_hw_config(struct mtk_drm_crtc *mtk_crtc) · 485 unmodified lines | ||
| 486 | 486 | } |
| 487 | 487 | #if IS_REACHABLE(CONFIG_MTK_CMDQ) |
| 488 | 488 | if (mtk_crtc->cmdq_client) { |
| 489 | + mbox_flush(mtk_crtc->cmdq_client->chan, 2000); | |
| 489 | 490 | cmdq_handle = cmdq_pkt_create(mtk_crtc->cmdq_client, PAGE_SIZE); |
| 490 | 491 | cmdq_pkt_clear_event(cmdq_handle, mtk_crtc->cmdq_event); |
| 491 | 492 | cmdq_pkt_wfe(cmdq_handle, mtk_crtc->cmdq_event); |
| @@ -636,10 +637,18 @@ static const struct drm_crtc_helper_funcs mtk_crtc_helper_funcs = { · 144 unmodified lines | ||
| 636 | 637 | |
| 637 | 638 | static int mtk_drm_crtc_init(struct drm_device *drm, |
| 638 | 639 | struct mtk_drm_crtc *mtk_crtc, |
| 639 | − struct drm_plane *primary, | |
| 640 | − struct drm_plane *cursor, unsigned int pipe) | |
| 640 | + unsigned int pipe) | |
| 641 | 641 | { |
| 642 | − int ret; | |
| 642 | + struct drm_plane *primary = NULL; | |
| 643 | + struct drm_plane *cursor = NULL; | |
| 644 | + int i, ret; | |
| 645 | + | |
| 646 | + for (i = 0; i < mtk_crtc->layer_nr; i++) { | |
| 647 | + if (mtk_crtc->planes[i].type == DRM_PLANE_TYPE_PRIMARY) | |
| 648 | + primary = &mtk_crtc->planes[i]; | |
| 649 | + else if (mtk_crtc->planes[i].type == DRM_PLANE_TYPE_CURSOR) | |
| 650 | + cursor = &mtk_crtc->planes[i]; | |
| 651 | + } | |
| 643 | 652 | |
| 644 | 653 | ret = drm_crtc_init_with_planes(drm, &mtk_crtc->base, primary, cursor, |
| 645 | 654 | &mtk_crtc_funcs, NULL); |
| @@ -689,11 +698,12 @@ static int mtk_drm_crtc_num_comp_planes(struct mtk_drm_crtc *mtk_crtc, · 43 unmodified lines | ||
| 689 | 698 | } |
| 690 | 699 | |
| 691 | 700 | static inline |
| 692 | −enum drm_plane_type mtk_drm_crtc_plane_type(unsigned int plane_idx) | |
| 701 | +enum drm_plane_type mtk_drm_crtc_plane_type(unsigned int plane_idx, | |
| 702 | + unsigned int num_planes) | |
| 693 | 703 | { |
| 694 | 704 | if (plane_idx == 0) |
| 695 | 705 | return DRM_PLANE_TYPE_PRIMARY; |
| 696 | − else if (plane_idx == 1) | |
| 706 | + else if (plane_idx == (num_planes - 1)) | |
| 697 | 707 | return DRM_PLANE_TYPE_CURSOR; |
| 698 | 708 | else |
| 699 | 709 | return DRM_PLANE_TYPE_OVERLAY; |
| @@ -712,7 +722,8 @@ static int mtk_drm_crtc_init_comp_planes(struct drm_device *drm_dev, · 12 unmodified lines | ||
| 712 | 722 | ret = mtk_plane_init(drm_dev, |
| 713 | 723 | &mtk_crtc->planes[mtk_crtc->layer_nr], |
| 714 | 724 | BIT(pipe), |
| 715 | − mtk_drm_crtc_plane_type(mtk_crtc->layer_nr), | |
| 725 | + mtk_drm_crtc_plane_type(mtk_crtc->layer_nr, | |
| 726 | + num_planes), | |
| 716 | 727 | mtk_ddp_comp_supported_rotations(comp)); |
| 717 | 728 | if (ret) |
| 718 | 729 | return ret; |
| @@ -807,9 +818,7 @@ int mtk_drm_crtc_create(struct drm_device *drm_dev, · 88 unmodified lines | ||
| 807 | 818 | return ret; |
| 808 | 819 | } |
| 809 | 820 | |
| 810 | − ret = mtk_drm_crtc_init(drm_dev, mtk_crtc, &mtk_crtc->planes[0], | |
| 811 | − mtk_crtc->layer_nr > 1 ? &mtk_crtc->planes[1] : | |
| 812 | − NULL, pipe); | |
| 821 | + ret = mtk_drm_crtc_init(drm_dev, mtk_crtc, pipe); | |
| 813 | 822 | if (ret < 0) |
| 814 | 823 | return ret; |
| 815 | 824 | |
| @@ -828,7 +837,8 @@ int mtk_drm_crtc_create(struct drm_device *drm_dev, · 12 unmodified lines | ||
| 828 | 837 | drm_crtc_index(&mtk_crtc->base)); |
| 829 | 838 | mtk_crtc->cmdq_client = NULL; |
| 830 | 839 | } |
| 831 | − ret = of_property_read_u32_index(dev->of_node, "mediatek,gce-events", | |
| 840 | + ret = of_property_read_u32_index(priv->mutex_node, | |
| 841 | + "mediatek,gce-events", | |
| 832 | 842 | drm_crtc_index(&mtk_crtc->base), |
| 833 | 843 | &mtk_crtc->cmdq_event); |
| 834 | 844 | if (ret) |
| @@ -471,6 +471,7 @@ int mtk_ddp_comp_init(struct device *dev, struct device_node *node, · 470 unmodified lines | ||
| 471 | 471 | /* Only DMA capable components need the LARB property */ |
| 472 | 472 | comp->larb_dev = NULL; |
| 473 | 473 | if (type != MTK_DISP_OVL && |
| 474 | + type != MTK_DISP_OVL_2L && | |
| 474 | 475 | type != MTK_DISP_RDMA && |
| 475 | 476 | type != MTK_DISP_WDMA) |
| 476 | 477 | return 0; |
| @@ -80,6 +80,7 @@ static int mtk_plane_atomic_async_check(struct drm_plane *plane, · 79 unmodified lines | ||
| 80 | 80 | struct drm_plane_state *state) |
| 81 | 81 | { |
| 82 | 82 | struct drm_crtc_state *crtc_state; |
| 83 | + int ret; | |
| 83 | 84 | |
| 84 | 85 | if (plane != state->crtc->cursor) |
| 85 | 86 | return -EINVAL; |
| @@ -90,6 +91,11 @@ static int mtk_plane_atomic_async_check(struct drm_plane *plane, · 4 unmodified lines | ||
| 90 | 91 | if (!plane->state->fb) |
| 91 | 92 | return -EINVAL; |
| 92 | 93 | |
| 94 | + ret = mtk_drm_crtc_plane_check(state->crtc, plane, | |
| 95 | + to_mtk_plane_state(state)); | |
| 96 | + if (ret) | |
| 97 | + return ret; | |
| 98 | + | |
| 93 | 99 | if (state->state) |
| 94 | 100 | crtc_state = drm_atomic_get_existing_crtc_state(state->state, |
| 95 | 101 | state->crtc); |
| @@ -115,6 +121,7 @@ static void mtk_plane_atomic_async_update(struct drm_plane *plane, · 19 unmodified lines | ||
| 115 | 121 | plane->state->src_y = new_state->src_y; |
| 116 | 122 | plane->state->src_h = new_state->src_h; |
| 117 | 123 | plane->state->src_w = new_state->src_w; |
| 124 | + swap(plane->state->fb, new_state->fb); | |
| 118 | 125 | state->pending.async_dirty = true; |
| 119 | 126 | |
| 120 | 127 | mtk_drm_crtc_async_update(new_state->crtc, plane, new_state); |
| @@ -601,33 +601,27 @@ static irqreturn_t panfrost_mmu_irq_handler_thread(int irq, void *data) · 600 unmodified lines | ||
| 601 | 601 | source_id = (fault_status >> 16); |
| 602 | 602 | |
| 603 | 603 | /* Page fault only */ |
| 604 | − if ((status & mask) == BIT(i)) { | |
| 605 | − WARN_ON(exception_type < 0xC1 || exception_type > 0xC4); | |
| 606 | − | |
| 604 | + ret = -1; | |
| 605 | + if ((status & mask) == BIT(i) && (exception_type & 0xF8) == 0xC0) | |
| 607 | 606 | ret = panfrost_mmu_map_fault_addr(pfdev, i, addr); |
| 608 | − if (!ret) { | |
| 609 | − mmu_write(pfdev, MMU_INT_CLEAR, BIT(i)); | |
| 610 | − status &= ~mask; | |
| 611 | − continue; | |
| 612 | − } | |
| 613 | − } | |
| 614 | 607 | |
| 615 | − /* terminal fault, print info about the fault */ | |
| 616 | − dev_err(pfdev->dev, | |
| 617 | − "Unhandled Page fault in AS%d at VA 0x%016llX\n" | |
| 618 | − "Reason: %s\n" | |
| 619 | − "raw fault status: 0x%X\n" | |
| 620 | − "decoded fault status: %s\n" | |
| 621 | − "exception type 0x%X: %s\n" | |
| 622 | − "access type 0x%X: %s\n" | |
| 623 | − "source id 0x%X\n", | |
| 624 | − i, addr, | |
| 625 | − "TODO", | |
| 626 | − fault_status, | |
| 627 | − (fault_status & (1 << 10) ? "DECODER FAULT" : "SLAVE FAULT"), | |
| 628 | − exception_type, panfrost_exception_name(pfdev, exception_type), | |
| 629 | − access_type, access_type_name(pfdev, fault_status), | |
| 630 | − source_id); | |
| 608 | + if (ret) | |
| 609 | + /* terminal fault, print info about the fault */ | |
| 610 | + dev_err(pfdev->dev, | |
| 611 | + "Unhandled Page fault in AS%d at VA 0x%016llX\n" | |
| 612 | + "Reason: %s\n" | |
| 613 | + "raw fault status: 0x%X\n" | |
| 614 | + "decoded fault status: %s\n" | |
| 615 | + "exception type 0x%X: %s\n" | |
| 616 | + "access type 0x%X: %s\n" | |
| 617 | + "source id 0x%X\n", | |
| 618 | + i, addr, | |
| 619 | + "TODO", | |
| 620 | + fault_status, | |
| 621 | + (fault_status & (1 << 10) ? "DECODER FAULT" : "SLAVE FAULT"), | |
| 622 | + exception_type, panfrost_exception_name(pfdev, exception_type), | |
| 623 | + access_type, access_type_name(pfdev, fault_status), | |
| 624 | + source_id); | |
| 631 | 625 | |
| 632 | 626 | mmu_write(pfdev, MMU_INT_CLEAR, mask); |
| 633 | 627 | |
| @@ -106,48 +106,128 @@ static const struct de2_fmt_info de2_formats[] = { · 105 unmodified lines | ||
| 106 | 106 | .rgb = true, |
| 107 | 107 | .csc = SUN8I_CSC_MODE_OFF, |
| 108 | 108 | }, |
| 109 | + { | |
| 110 | + /* for DE2 VI layer which ignores alpha */ | |
| 111 | + .drm_fmt = DRM_FORMAT_XRGB4444, | |
| 112 | + .de2_fmt = SUN8I_MIXER_FBFMT_ARGB4444, | |
| 113 | + .rgb = true, | |
| 114 | + .csc = SUN8I_CSC_MODE_OFF, | |
| 115 | + }, | |
| 109 | 116 | { |
| 110 | 117 | .drm_fmt = DRM_FORMAT_ABGR4444, |
| 111 | 118 | .de2_fmt = SUN8I_MIXER_FBFMT_ABGR4444, |
| 112 | 119 | .rgb = true, |
| 113 | 120 | .csc = SUN8I_CSC_MODE_OFF, |
| 114 | 121 | }, |
| 122 | + { | |
| 123 | + /* for DE2 VI layer which ignores alpha */ | |
| 124 | + .drm_fmt = DRM_FORMAT_XBGR4444, | |
| 125 | + .de2_fmt = SUN8I_MIXER_FBFMT_ABGR4444, | |
| 126 | + .rgb = true, | |
| 127 | + .csc = SUN8I_CSC_MODE_OFF, | |
| 128 | + }, | |
| 115 | 129 | { |
| 116 | 130 | .drm_fmt = DRM_FORMAT_RGBA4444, |
| 117 | 131 | .de2_fmt = SUN8I_MIXER_FBFMT_RGBA4444, |
| 118 | 132 | .rgb = true, |
| 119 | 133 | .csc = SUN8I_CSC_MODE_OFF, |
| 120 | 134 | }, |
| 135 | + { | |
| 136 | + /* for DE2 VI layer which ignores alpha */ | |
| 137 | + .drm_fmt = DRM_FORMAT_RGBX4444, | |
| 138 | + .de2_fmt = SUN8I_MIXER_FBFMT_RGBA4444, | |
| 139 | + .rgb = true, | |
| 140 | + .csc = SUN8I_CSC_MODE_OFF, | |
| 141 | + }, | |
| 121 | 142 | { |
| 122 | 143 | .drm_fmt = DRM_FORMAT_BGRA4444, |
| 123 | 144 | .de2_fmt = SUN8I_MIXER_FBFMT_BGRA4444, |
| 124 | 145 | .rgb = true, |
| 125 | 146 | .csc = SUN8I_CSC_MODE_OFF, |
| 126 | 147 | }, |
| 148 | + { | |
| 149 | + /* for DE2 VI layer which ignores alpha */ | |
| 150 | + .drm_fmt = DRM_FORMAT_BGRX4444, | |
| 151 | + .de2_fmt = SUN8I_MIXER_FBFMT_BGRA4444, | |
| 152 | + .rgb = true, | |
| 153 | + .csc = SUN8I_CSC_MODE_OFF, | |
| 154 | + }, | |
| 127 | 155 | { |
| 128 | 156 | .drm_fmt = DRM_FORMAT_ARGB1555, |
| 129 | 157 | .de2_fmt = SUN8I_MIXER_FBFMT_ARGB1555, |
| 130 | 158 | .rgb = true, |
| 131 | 159 | .csc = SUN8I_CSC_MODE_OFF, |
| 132 | 160 | }, |
| 161 | + { | |
| 162 | + /* for DE2 VI layer which ignores alpha */ | |
| 163 | + .drm_fmt = DRM_FORMAT_XRGB1555, | |
| 164 | + .de2_fmt = SUN8I_MIXER_FBFMT_ARGB1555, | |
| 165 | + .rgb = true, | |
| 166 | + .csc = SUN8I_CSC_MODE_OFF, | |
| 167 | + }, | |
| 133 | 168 | { |
| 134 | 169 | .drm_fmt = DRM_FORMAT_ABGR1555, |
| 135 | 170 | .de2_fmt = SUN8I_MIXER_FBFMT_ABGR1555, |
| 136 | 171 | .rgb = true, |
| 137 | 172 | .csc = SUN8I_CSC_MODE_OFF, |
| 138 | 173 | }, |
| 174 | + { | |
| 175 | + /* for DE2 VI layer which ignores alpha */ | |
| 176 | + .drm_fmt = DRM_FORMAT_XBGR1555, | |
| 177 | + .de2_fmt = SUN8I_MIXER_FBFMT_ABGR1555, | |
| 178 | + .rgb = true, | |
| 179 | + .csc = SUN8I_CSC_MODE_OFF, | |
| 180 | + }, | |
| 139 | 181 | { |
| 140 | 182 | .drm_fmt = DRM_FORMAT_RGBA5551, |
| 141 | 183 | .de2_fmt = SUN8I_MIXER_FBFMT_RGBA5551, |
| 142 | 184 | .rgb = true, |
| 143 | 185 | .csc = SUN8I_CSC_MODE_OFF, |
| 144 | 186 | }, |
| 187 | + { | |
| 188 | + /* for DE2 VI layer which ignores alpha */ | |
| 189 | + .drm_fmt = DRM_FORMAT_RGBX5551, | |
| 190 | + .de2_fmt = SUN8I_MIXER_FBFMT_RGBA5551, | |
| 191 | + .rgb = true, | |
| 192 | + .csc = SUN8I_CSC_MODE_OFF, | |
| 193 | + }, | |
| 145 | 194 | { |
| 146 | 195 | .drm_fmt = DRM_FORMAT_BGRA5551, |
| 147 | 196 | .de2_fmt = SUN8I_MIXER_FBFMT_BGRA5551, |
| 148 | 197 | .rgb = true, |
| 149 | 198 | .csc = SUN8I_CSC_MODE_OFF, |
| 150 | 199 | }, |
| 200 | + { | |
| 201 | + /* for DE2 VI layer which ignores alpha */ | |
| 202 | + .drm_fmt = DRM_FORMAT_BGRX5551, | |
| 203 | + .de2_fmt = SUN8I_MIXER_FBFMT_BGRA5551, | |
| 204 | + .rgb = true, | |
| 205 | + .csc = SUN8I_CSC_MODE_OFF, | |
| 206 | + }, | |
| 207 | + { | |
| 208 | + .drm_fmt = DRM_FORMAT_ARGB2101010, | |
| 209 | + .de2_fmt = SUN8I_MIXER_FBFMT_ARGB2101010, | |
| 210 | + .rgb = true, | |
| 211 | + .csc = SUN8I_CSC_MODE_OFF, | |
| 212 | + }, | |
| 213 | + { | |
| 214 | + .drm_fmt = DRM_FORMAT_ABGR2101010, | |
| 215 | + .de2_fmt = SUN8I_MIXER_FBFMT_ABGR2101010, | |
| 216 | + .rgb = true, | |
| 217 | + .csc = SUN8I_CSC_MODE_OFF, | |
| 218 | + }, | |
| 219 | + { | |
| 220 | + .drm_fmt = DRM_FORMAT_RGBA1010102, | |
| 221 | + .de2_fmt = SUN8I_MIXER_FBFMT_RGBA1010102, | |
| 222 | + .rgb = true, | |
| 223 | + .csc = SUN8I_CSC_MODE_OFF, | |
| 224 | + }, | |
| 225 | + { | |
| 226 | + .drm_fmt = DRM_FORMAT_BGRA1010102, | |
| 227 | + .de2_fmt = SUN8I_MIXER_FBFMT_BGRA1010102, | |
| 228 | + .rgb = true, | |
| 229 | + .csc = SUN8I_CSC_MODE_OFF, | |
| 230 | + }, | |
| 151 | 231 | { |
| 152 | 232 | .drm_fmt = DRM_FORMAT_UYVY, |
| 153 | 233 | .de2_fmt = SUN8I_MIXER_FBFMT_UYVY, |
| @@ -196,12 +276,6 @@ static const struct de2_fmt_info de2_formats[] = { · 42 unmodified lines | ||
| 196 | 276 | .rgb = false, |
| 197 | 277 | .csc = SUN8I_CSC_MODE_YUV2RGB, |
| 198 | 278 | }, |
| 199 | − { | |
| 200 | − .drm_fmt = DRM_FORMAT_YUV444, | |
| 201 | − .de2_fmt = SUN8I_MIXER_FBFMT_RGB888, | |
| 202 | − .rgb = true, | |
| 203 | − .csc = SUN8I_CSC_MODE_YUV2RGB, | |
| 204 | − }, | |
| 205 | 279 | { |
| 206 | 280 | .drm_fmt = DRM_FORMAT_YUV422, |
| 207 | 281 | .de2_fmt = SUN8I_MIXER_FBFMT_YUV422, |
| @@ -220,12 +294,6 @@ static const struct de2_fmt_info de2_formats[] = { · 12 unmodified lines | ||
| 220 | 294 | .rgb = false, |
| 221 | 295 | .csc = SUN8I_CSC_MODE_YUV2RGB, |
| 222 | 296 | }, |
| 223 | − { | |
| 224 | − .drm_fmt = DRM_FORMAT_YVU444, | |
| 225 | − .de2_fmt = SUN8I_MIXER_FBFMT_RGB888, | |
| 226 | − .rgb = true, | |
| 227 | − .csc = SUN8I_CSC_MODE_YVU2RGB, | |
| 228 | − }, | |
| 229 | 297 | { |
| 230 | 298 | .drm_fmt = DRM_FORMAT_YVU422, |
| 231 | 299 | .de2_fmt = SUN8I_MIXER_FBFMT_YUV422, |
| @@ -244,6 +312,18 @@ static const struct de2_fmt_info de2_formats[] = { · 12 unmodified lines | ||
| 244 | 312 | .rgb = false, |
| 245 | 313 | .csc = SUN8I_CSC_MODE_YVU2RGB, |
| 246 | 314 | }, |
| 315 | + { | |
| 316 | + .drm_fmt = DRM_FORMAT_P010, | |
| 317 | + .de2_fmt = SUN8I_MIXER_FBFMT_P010_YUV, | |
| 318 | + .rgb = false, | |
| 319 | + .csc = SUN8I_CSC_MODE_YUV2RGB, | |
| 320 | + }, | |
| 321 | + { | |
| 322 | + .drm_fmt = DRM_FORMAT_P210, | |
| 323 | + .de2_fmt = SUN8I_MIXER_FBFMT_P210_YUV, | |
| 324 | + .rgb = false, | |
| 325 | + .csc = SUN8I_CSC_MODE_YUV2RGB, | |
| 326 | + }, | |
| 247 | 327 | }; |
| 248 | 328 | |
| 249 | 329 | const struct de2_fmt_info *sun8i_mixer_format_info(u32 format) |
| @@ -93,6 +93,10 @@ · 92 unmodified lines | ||
| 93 | 93 | #define SUN8I_MIXER_FBFMT_ABGR1555 17 |
| 94 | 94 | #define SUN8I_MIXER_FBFMT_RGBA5551 18 |
| 95 | 95 | #define SUN8I_MIXER_FBFMT_BGRA5551 19 |
| 96 | +#define SUN8I_MIXER_FBFMT_ARGB2101010 20 | |
| 97 | +#define SUN8I_MIXER_FBFMT_ABGR2101010 21 | |
| 98 | +#define SUN8I_MIXER_FBFMT_RGBA1010102 22 | |
| 99 | +#define SUN8I_MIXER_FBFMT_BGRA1010102 23 | |
| 96 | 100 | |
| 97 | 101 | #define SUN8I_MIXER_FBFMT_YUYV 0 |
| 98 | 102 | #define SUN8I_MIXER_FBFMT_UYVY 1 |
| @@ -109,6 +113,13 @@ · 10 unmodified lines | ||
| 109 | 113 | /* format 12 is semi-planar YUV411 UVUV */ |
| 110 | 114 | /* format 13 is semi-planar YUV411 VUVU */ |
| 111 | 115 | #define SUN8I_MIXER_FBFMT_YUV411 14 |
| 116 | +/* format 15 doesn't exist */ | |
| 117 | +/* format 16 is P010 YVU */ | |
| 118 | +#define SUN8I_MIXER_FBFMT_P010_YUV 17 | |
| 119 | +/* format 18 is P210 YVU */ | |
| 120 | +#define SUN8I_MIXER_FBFMT_P210_YUV 19 | |
| 121 | +/* format 20 is packed YVU444 10-bit */ | |
| 122 | +/* format 21 is packed YUV444 10-bit */ | |
| 112 | 123 | |
| 113 | 124 | /* |
| 114 | 125 | * Sub-engines listed bellow are unused for now. The EN registers are here only |
| @@ -398,24 +398,66 @@ static const struct drm_plane_funcs sun8i_vi_layer_funcs = { · 397 unmodified lines | ||
| 398 | 398 | }; |
| 399 | 399 | |
| 400 | 400 | /* |
| 401 | − * While all RGB formats are supported, VI planes don't support | |
| 402 | − * alpha blending, so there is no point having formats with alpha | |
| 403 | − * channel if their opaque analog exist. | |
| 401 | + * While DE2 VI layer supports same RGB formats as UI layer, alpha | |
| 402 | + * channel is ignored. This structure lists all unique variants | |
| 403 | + * where alpha channel is replaced with "don't care" (X) channel. | |
| 404 | 404 | */ |
| 405 | 405 | static const u32 sun8i_vi_layer_formats[] = { |
| 406 | + DRM_FORMAT_BGR565, | |
| 407 | + DRM_FORMAT_BGR888, | |
| 408 | + DRM_FORMAT_BGRX4444, | |
| 409 | + DRM_FORMAT_BGRX5551, | |
| 410 | + DRM_FORMAT_BGRX8888, | |
| 411 | + DRM_FORMAT_RGB565, | |
| 412 | + DRM_FORMAT_RGB888, | |
| 413 | + DRM_FORMAT_RGBX4444, | |
| 414 | + DRM_FORMAT_RGBX5551, | |
| 415 | + DRM_FORMAT_RGBX8888, | |
| 416 | + DRM_FORMAT_XBGR1555, | |
| 417 | + DRM_FORMAT_XBGR4444, | |
| 418 | + DRM_FORMAT_XBGR8888, | |
| 419 | + DRM_FORMAT_XRGB1555, | |
| 420 | + DRM_FORMAT_XRGB4444, | |
| 421 | + DRM_FORMAT_XRGB8888, | |
| 422 | + | |
| 423 | + DRM_FORMAT_NV16, | |
| 424 | + DRM_FORMAT_NV12, | |
| 425 | + DRM_FORMAT_NV21, | |
| 426 | + DRM_FORMAT_NV61, | |
| 427 | + DRM_FORMAT_UYVY, | |
| 428 | + DRM_FORMAT_VYUY, | |
| 429 | + DRM_FORMAT_YUYV, | |
| 430 | + DRM_FORMAT_YVYU, | |
| 431 | + DRM_FORMAT_YUV411, | |
| 432 | + DRM_FORMAT_YUV420, | |
| 433 | + DRM_FORMAT_YUV422, | |
| 434 | + DRM_FORMAT_YVU411, | |
| 435 | + DRM_FORMAT_YVU420, | |
| 436 | + DRM_FORMAT_YVU422, | |
| 437 | +}; | |
| 438 | + | |
| 439 | +static const u32 sun8i_vi_layer_de3_formats[] = { | |
| 406 | 440 | DRM_FORMAT_ABGR1555, |
| 441 | + DRM_FORMAT_ABGR2101010, | |
| 407 | 442 | DRM_FORMAT_ABGR4444, |
| 443 | + DRM_FORMAT_ABGR8888, | |
| 408 | 444 | DRM_FORMAT_ARGB1555, |
| 445 | + DRM_FORMAT_ARGB2101010, | |
| 409 | 446 | DRM_FORMAT_ARGB4444, |
| 447 | + DRM_FORMAT_ARGB8888, | |
| 410 | 448 | DRM_FORMAT_BGR565, |
| 411 | 449 | DRM_FORMAT_BGR888, |
| 450 | + DRM_FORMAT_BGRA1010102, | |
| 412 | 451 | DRM_FORMAT_BGRA5551, |
| 413 | 452 | DRM_FORMAT_BGRA4444, |
| 453 | + DRM_FORMAT_BGRA8888, | |
| 414 | 454 | DRM_FORMAT_BGRX8888, |
| 415 | 455 | DRM_FORMAT_RGB565, |
| 416 | 456 | DRM_FORMAT_RGB888, |
| 457 | + DRM_FORMAT_RGBA1010102, | |
| 417 | 458 | DRM_FORMAT_RGBA4444, |
| 418 | 459 | DRM_FORMAT_RGBA5551, |
| 460 | + DRM_FORMAT_RGBA8888, | |
| 419 | 461 | DRM_FORMAT_RGBX8888, |
| 420 | 462 | DRM_FORMAT_XBGR8888, |
| 421 | 463 | DRM_FORMAT_XRGB8888, |
| @@ -424,6 +466,8 @@ static const u32 sun8i_vi_layer_formats[] = { · 2 unmodified lines | ||
| 424 | 466 | DRM_FORMAT_NV12, |
| 425 | 467 | DRM_FORMAT_NV21, |
| 426 | 468 | DRM_FORMAT_NV61, |
| 469 | + DRM_FORMAT_P010, | |
| 470 | + DRM_FORMAT_P210, | |
| 427 | 471 | DRM_FORMAT_UYVY, |
| 428 | 472 | DRM_FORMAT_VYUY, |
| 429 | 473 | DRM_FORMAT_YUYV, |
| @@ -431,11 +475,9 @@ static const u32 sun8i_vi_layer_formats[] = { · 1 unmodified line | ||
| 431 | 475 | DRM_FORMAT_YUV411, |
| 432 | 476 | DRM_FORMAT_YUV420, |
| 433 | 477 | DRM_FORMAT_YUV422, |
| 434 | − DRM_FORMAT_YUV444, | |
| 435 | 478 | DRM_FORMAT_YVU411, |
| 436 | 479 | DRM_FORMAT_YVU420, |
| 437 | 480 | DRM_FORMAT_YVU422, |
| 438 | − DRM_FORMAT_YVU444, | |
| 439 | 481 | }; |
| 440 | 482 | |
| 441 | 483 | struct sun8i_vi_layer *sun8i_vi_layer_init_one(struct drm_device *drm, |
| @@ -443,19 +485,27 @@ struct sun8i_vi_layer *sun8i_vi_layer_init_one(struct drm_device *drm, · 1 unmodified line | ||
| 443 | 485 | int index) |
| 444 | 486 | { |
| 445 | 487 | u32 supported_encodings, supported_ranges; |
| 488 | + unsigned int plane_cnt, format_count; | |
| 446 | 489 | struct sun8i_vi_layer *layer; |
| 447 | − unsigned int plane_cnt; | |
| 490 | + const u32 *formats; | |
| 448 | 491 | int ret; |
| 449 | 492 | |
| 450 | 493 | layer = devm_kzalloc(drm->dev, sizeof(*layer), GFP_KERNEL); |
| 451 | 494 | if (!layer) |
| 452 | 495 | return ERR_PTR(-ENOMEM); |
| 453 | 496 | |
| 497 | + if (mixer->cfg->is_de3) { | |
| 498 | + formats = sun8i_vi_layer_de3_formats; | |
| 499 | + format_count = ARRAY_SIZE(sun8i_vi_layer_de3_formats); | |
| 500 | + } else { | |
| 501 | + formats = sun8i_vi_layer_formats; | |
| 502 | + format_count = ARRAY_SIZE(sun8i_vi_layer_formats); | |
| 503 | + } | |
| 504 | + | |
| 454 | 505 | /* possible crtcs are set later */ |
| 455 | 506 | ret = drm_universal_plane_init(drm, &layer->plane, 0, |
| 456 | 507 | &sun8i_vi_layer_funcs, |
| 457 | − sun8i_vi_layer_formats, | |
| 458 | − ARRAY_SIZE(sun8i_vi_layer_formats), | |
| 508 | + formats, format_count, | |
| 459 | 509 | NULL, DRM_PLANE_TYPE_OVERLAY, NULL); |
| 460 | 510 | if (ret) { |
| 461 | 511 | dev_err(drm->dev, "Couldn't initialize layer\n"); |
| @@ -515,6 +515,7 @@ static int ttm_buffer_object_transfer(struct ttm_buffer_object *bo, · 514 unmodified lines | ||
| 515 | 515 | fbo->base.base.resv = &fbo->base.base._resv; |
| 516 | 516 | |
| 517 | 517 | dma_resv_init(&fbo->base.base._resv); |
| 518 | + fbo->base.base.dev = NULL; | |
| 518 | 519 | ret = dma_resv_trylock(&fbo->base.base._resv); |
| 519 | 520 | WARN_ON(!ret); |
| 520 | 521 | |
| @@ -42,8 +42,8 @@ static int virtio_gpu_resource_id_get(struct virtio_gpu_device *vgdev, · 41 unmodified lines | ||
| 42 | 42 | * "f91a9dd35715 Fix unlinking resources from hash |
| 43 | 43 | * table." (Feb 2019) fixes the bug. |
| 44 | 44 | */ |
| 45 | − static int handle; | |
| 46 | − handle++; | |
| 45 | + static atomic_t seqno = ATOMIC_INIT(0); | |
| 46 | + int handle = atomic_inc_return(&seqno); | |
| 47 | 47 | *resid = handle + 1; |
| 48 | 48 | } else { |
| 49 | 49 | int handle = ida_alloc(&vgdev->resource_ida, GFP_KERNEL); |
| @@ -99,6 +99,7 @@ struct drm_gem_object *virtio_gpu_create_object(struct drm_device *dev, · 49 unmodified lines | ||
| 99 | 99 | return NULL; |
| 100 | 100 | |
| 101 | 101 | bo->base.base.funcs = &virtio_gpu_gem_funcs; |
| 102 | + bo->base.map_cached = true; | |
| 102 | 103 | return &bo->base.base; |
| 103 | 104 | } |
| 104 | 105 | |
| @@ -193,8 +193,7 @@ static void mousevsc_on_receive_device_info(struct mousevsc_dev *input_device, · 192 unmodified lines | ||
| 193 | 193 | goto cleanup; |
| 194 | 194 | |
| 195 | 195 | /* The pointer is not NULL when we resume from hibernation */ |
| 196 | − if (input_device->hid_desc != NULL) | |
| 197 | − kfree(input_device->hid_desc); | |
| 196 | + kfree(input_device->hid_desc); | |
| 198 | 197 | input_device->hid_desc = kmemdup(desc, desc->bLength, GFP_ATOMIC); |
| 199 | 198 | |
| 200 | 199 | if (!input_device->hid_desc) |
| @@ -207,8 +206,7 @@ static void mousevsc_on_receive_device_info(struct mousevsc_dev *input_device, · 6 unmodified lines | ||
| 207 | 206 | } |
| 208 | 207 | |
| 209 | 208 | /* The pointer is not NULL when we resume from hibernation */ |
| 210 | − if (input_device->report_desc != NULL) | |
| 211 | − kfree(input_device->report_desc); | |
| 209 | + kfree(input_device->report_desc); | |
| 212 | 210 | input_device->report_desc = kzalloc(input_device->report_desc_size, |
| 213 | 211 | GFP_ATOMIC); |
| 214 | 212 | |
| @@ -413,7 +413,7 @@ static int ADT7462_REG_VOLT(struct adt7462_data *data, int which) · 412 unmodified lines | ||
| 413 | 413 | return 0x95; |
| 414 | 414 | break; |
| 415 | 415 | } |
| 416 | − return -ENODEV; | |
| 416 | + return 0; | |
| 417 | 417 | } |
| 418 | 418 | |
| 419 | 419 | /* Provide labels for sysfs */ |
| @@ -18,6 +18,59 @@ · 17 unmodified lines | ||
| 18 | 18 | #define XDPE122_AMD_625MV 0x10 /* AMD mode 6.25mV */ |
| 19 | 19 | #define XDPE122_PAGE_NUM 2 |
| 20 | 20 | |
| 21 | +static int xdpe122_read_word_data(struct i2c_client *client, int page, int reg) | |
| 22 | +{ | |
| 23 | + const struct pmbus_driver_info *info = pmbus_get_driver_info(client); | |
| 24 | + long val; | |
| 25 | + s16 exponent; | |
| 26 | + s32 mantissa; | |
| 27 | + int ret; | |
| 28 | + | |
| 29 | + switch (reg) { | |
| 30 | + case PMBUS_VOUT_OV_FAULT_LIMIT: | |
| 31 | + case PMBUS_VOUT_UV_FAULT_LIMIT: | |
| 32 | + ret = pmbus_read_word_data(client, page, reg); | |
| 33 | + if (ret < 0) | |
| 34 | + return ret; | |
| 35 | + | |
| 36 | + /* Convert register value to LINEAR11 data. */ | |
| 37 | + exponent = ((s16)ret) >> 11; | |
| 38 | + mantissa = ((s16)((ret & GENMASK(10, 0)) << 5)) >> 5; | |
| 39 | + val = mantissa * 1000L; | |
| 40 | + if (exponent >= 0) | |
| 41 | + val <<= exponent; | |
| 42 | + else | |
| 43 | + val >>= -exponent; | |
| 44 | + | |
| 45 | + /* Convert data to VID register. */ | |
| 46 | + switch (info->vrm_version[page]) { | |
| 47 | + case vr13: | |
| 48 | + if (val >= 500) | |
| 49 | + return 1 + DIV_ROUND_CLOSEST(val - 500, 10); | |
| 50 | + return 0; | |
| 51 | + case vr12: | |
| 52 | + if (val >= 250) | |
| 53 | + return 1 + DIV_ROUND_CLOSEST(val - 250, 5); | |
| 54 | + return 0; | |
| 55 | + case imvp9: | |
| 56 | + if (val >= 200) | |
| 57 | + return 1 + DIV_ROUND_CLOSEST(val - 200, 10); | |
| 58 | + return 0; | |
| 59 | + case amd625mv: | |
| 60 | + if (val >= 200 && val <= 1550) | |
| 61 | + return DIV_ROUND_CLOSEST((1550 - val) * 100, | |
| 62 | + 625); | |
| 63 | + return 0; | |
| 64 | + default: | |
| 65 | + return -EINVAL; | |
| 66 | + } | |
| 67 | + default: | |
| 68 | + return -ENODATA; | |
| 69 | + } | |
| 70 | + | |
| 71 | + return 0; | |
| 72 | +} | |
| 73 | + | |
| 21 | 74 | static int xdpe122_identify(struct i2c_client *client, |
| 22 | 75 | struct pmbus_driver_info *info) |
| 23 | 76 | { |
| @@ -70,6 +123,7 @@ static struct pmbus_driver_info xdpe122_info = { · 46 unmodified lines | ||
| 70 | 123 | PMBUS_HAVE_TEMP | PMBUS_HAVE_STATUS_TEMP | |
| 71 | 124 | PMBUS_HAVE_POUT | PMBUS_HAVE_PIN | PMBUS_HAVE_STATUS_INPUT, |
| 72 | 125 | .identify = xdpe122_identify, |
| 126 | + .read_word_data = xdpe122_read_word_data, | |
| 73 | 127 | }; |
| 74 | 128 | |
| 75 | 129 | static int xdpe122_probe(struct i2c_client *client, |
| @@ -1191,6 +1191,7 @@ struct ib_cm_id *ib_cm_insert_listen(struct ib_device *device, · 1190 unmodified lines | ||
| 1191 | 1191 | /* Sharing an ib_cm_id with different handlers is not |
| 1192 | 1192 | * supported */ |
| 1193 | 1193 | spin_unlock_irqrestore(&cm.lock, flags); |
| 1194 | + ib_destroy_cm_id(cm_id); | |
| 1194 | 1195 | return ERR_PTR(-EINVAL); |
| 1195 | 1196 | } |
| 1196 | 1197 | refcount_inc(&cm_id_priv->refcount); |
| @@ -3218,19 +3218,26 @@ int rdma_resolve_addr(struct rdma_cm_id *id, struct sockaddr *src_addr, · 3217 unmodified lines | ||
| 3218 | 3218 | int ret; |
| 3219 | 3219 | |
| 3220 | 3220 | id_priv = container_of(id, struct rdma_id_private, id); |
| 3221 | + memcpy(cma_dst_addr(id_priv), dst_addr, rdma_addr_size(dst_addr)); | |
| 3221 | 3222 | if (id_priv->state == RDMA_CM_IDLE) { |
| 3222 | 3223 | ret = cma_bind_addr(id, src_addr, dst_addr); |
| 3223 | − if (ret) | |
| 3224 | + if (ret) { | |
| 3225 | + memset(cma_dst_addr(id_priv), 0, | |
| 3226 | + rdma_addr_size(dst_addr)); | |
| 3224 | 3227 | return ret; |
| 3228 | + } | |
| 3225 | 3229 | } |
| 3226 | 3230 | |
| 3227 | − if (cma_family(id_priv) != dst_addr->sa_family) | |
| 3231 | + if (cma_family(id_priv) != dst_addr->sa_family) { | |
| 3232 | + memset(cma_dst_addr(id_priv), 0, rdma_addr_size(dst_addr)); | |
| 3228 | 3233 | return -EINVAL; |
| 3234 | + } | |
| 3229 | 3235 | |
| 3230 | − if (!cma_comp_exch(id_priv, RDMA_CM_ADDR_BOUND, RDMA_CM_ADDR_QUERY)) | |
| 3236 | + if (!cma_comp_exch(id_priv, RDMA_CM_ADDR_BOUND, RDMA_CM_ADDR_QUERY)) { | |
| 3237 | + memset(cma_dst_addr(id_priv), 0, rdma_addr_size(dst_addr)); | |
| 3231 | 3238 | return -EINVAL; |
| 3239 | + } | |
| 3232 | 3240 | |
| 3233 | − memcpy(cma_dst_addr(id_priv), dst_addr, rdma_addr_size(dst_addr)); | |
| 3234 | 3241 | if (cma_any_addr(dst_addr)) { |
| 3235 | 3242 | ret = cma_resolve_loopback(id_priv); |
| 3236 | 3243 | } else { |
| @@ -338,6 +338,20 @@ static inline struct ib_qp *_ib_create_qp(struct ib_device *dev, · 337 unmodified lines | ||
| 338 | 338 | qp->pd = pd; |
| 339 | 339 | qp->uobject = uobj; |
| 340 | 340 | qp->real_qp = qp; |
| 341 | + | |
| 342 | + qp->qp_type = attr->qp_type; | |
| 343 | + qp->rwq_ind_tbl = attr->rwq_ind_tbl; | |
| 344 | + qp->send_cq = attr->send_cq; | |
| 345 | + qp->recv_cq = attr->recv_cq; | |
| 346 | + qp->srq = attr->srq; | |
| 347 | + qp->rwq_ind_tbl = attr->rwq_ind_tbl; | |
| 348 | + qp->event_handler = attr->event_handler; | |
| 349 | + | |
| 350 | + atomic_set(&qp->usecnt, 0); | |
| 351 | + spin_lock_init(&qp->mr_lock); | |
| 352 | + INIT_LIST_HEAD(&qp->rdma_mrs); | |
| 353 | + INIT_LIST_HEAD(&qp->sig_mrs); | |
| 354 | + | |
| 341 | 355 | /* |
| 342 | 356 | * We don't track XRC QPs for now, because they don't have PD |
| 343 | 357 | * and more importantly they are created internaly by driver, |
| @@ -159,8 +159,10 @@ static void dealloc_work_entries(struct iwcm_id_private *cm_id_priv) · 158 unmodified lines | ||
| 159 | 159 | { |
| 160 | 160 | struct list_head *e, *tmp; |
| 161 | 161 | |
| 162 | − list_for_each_safe(e, tmp, &cm_id_priv->work_free_list) | |
| 162 | + list_for_each_safe(e, tmp, &cm_id_priv->work_free_list) { | |
| 163 | + list_del(e); | |
| 163 | 164 | kfree(list_entry(e, struct iwcm_work, free_list)); |
| 165 | + } | |
| 164 | 166 | } |
| 165 | 167 | |
| 166 | 168 | static int alloc_work_entries(struct iwcm_id_private *cm_id_priv, int count) |
| @@ -1757,6 +1757,8 @@ static int nldev_stat_set_doit(struct sk_buff *skb, struct nlmsghdr *nlh, · 1756 unmodified lines | ||
| 1757 | 1757 | if (ret) |
| 1758 | 1758 | goto err_msg; |
| 1759 | 1759 | } else { |
| 1760 | + if (!tb[RDMA_NLDEV_ATTR_RES_LQPN]) | |
| 1761 | + goto err_msg; | |
| 1760 | 1762 | qpn = nla_get_u32(tb[RDMA_NLDEV_ATTR_RES_LQPN]); |
| 1761 | 1763 | if (tb[RDMA_NLDEV_ATTR_STAT_COUNTER_ID]) { |
| 1762 | 1764 | cntn = nla_get_u32(tb[RDMA_NLDEV_ATTR_STAT_COUNTER_ID]); |
| @@ -273,6 +273,23 @@ static int rdma_rw_init_single_wr(struct rdma_rw_ctx *ctx, struct ib_qp *qp, · 272 unmodified lines | ||
| 273 | 273 | return 1; |
| 274 | 274 | } |
| 275 | 275 | |
| 276 | +static void rdma_rw_unmap_sg(struct ib_device *dev, struct scatterlist *sg, | |
| 277 | + u32 sg_cnt, enum dma_data_direction dir) | |
| 278 | +{ | |
| 279 | + if (is_pci_p2pdma_page(sg_page(sg))) | |
| 280 | + pci_p2pdma_unmap_sg(dev->dma_device, sg, sg_cnt, dir); | |
| 281 | + else | |
| 282 | + ib_dma_unmap_sg(dev, sg, sg_cnt, dir); | |
| 283 | +} | |
| 284 | + | |
| 285 | +static int rdma_rw_map_sg(struct ib_device *dev, struct scatterlist *sg, | |
| 286 | + u32 sg_cnt, enum dma_data_direction dir) | |
| 287 | +{ | |
| 288 | + if (is_pci_p2pdma_page(sg_page(sg))) | |
| 289 | + return pci_p2pdma_map_sg(dev->dma_device, sg, sg_cnt, dir); | |
| 290 | + return ib_dma_map_sg(dev, sg, sg_cnt, dir); | |
| 291 | +} | |
| 292 | + | |
| 276 | 293 | /** |
| 277 | 294 | * rdma_rw_ctx_init - initialize a RDMA READ/WRITE context |
| 278 | 295 | * @ctx: context to initialize |
| @@ -295,11 +312,7 @@ int rdma_rw_ctx_init(struct rdma_rw_ctx *ctx, struct ib_qp *qp, u8 port_num, · 16 unmodified lines | ||
| 295 | 312 | struct ib_device *dev = qp->pd->device; |
| 296 | 313 | int ret; |
| 297 | 314 | |
| 298 | − if (is_pci_p2pdma_page(sg_page(sg))) | |
| 299 | − ret = pci_p2pdma_map_sg(dev->dma_device, sg, sg_cnt, dir); | |
| 300 | − else | |
| 301 | − ret = ib_dma_map_sg(dev, sg, sg_cnt, dir); | |
| 302 | − | |
| 315 | + ret = rdma_rw_map_sg(dev, sg, sg_cnt, dir); | |
| 303 | 316 | if (!ret) |
| 304 | 317 | return -ENOMEM; |
| 305 | 318 | sg_cnt = ret; |
| @@ -338,7 +351,7 @@ int rdma_rw_ctx_init(struct rdma_rw_ctx *ctx, struct ib_qp *qp, u8 port_num, · 32 unmodified lines | ||
| 338 | 351 | return ret; |
| 339 | 352 | |
| 340 | 353 | out_unmap_sg: |
| 341 | − ib_dma_unmap_sg(dev, sg, sg_cnt, dir); | |
| 354 | + rdma_rw_unmap_sg(dev, sg, sg_cnt, dir); | |
| 342 | 355 | return ret; |
| 343 | 356 | } |
| 344 | 357 | EXPORT_SYMBOL(rdma_rw_ctx_init); |
| @@ -588,11 +601,7 @@ void rdma_rw_ctx_destroy(struct rdma_rw_ctx *ctx, struct ib_qp *qp, u8 port_num, · 243 unmodified lines | ||
| 588 | 601 | break; |
| 589 | 602 | } |
| 590 | 603 | |
| 591 | − if (is_pci_p2pdma_page(sg_page(sg))) | |
| 592 | − pci_p2pdma_unmap_sg(qp->pd->device->dma_device, sg, | |
| 593 | − sg_cnt, dir); | |
| 594 | − else | |
| 595 | − ib_dma_unmap_sg(qp->pd->device, sg, sg_cnt, dir); | |
| 604 | + rdma_rw_unmap_sg(qp->pd->device, sg, sg_cnt, dir); | |
| 596 | 605 | } |
| 597 | 606 | EXPORT_SYMBOL(rdma_rw_ctx_destroy); |
| 598 | 607 | |
| @@ -340,15 +340,19 @@ static struct ib_ports_pkeys *get_new_pps(const struct ib_qp *qp, · 339 unmodified lines | ||
| 340 | 340 | return NULL; |
| 341 | 341 | |
| 342 | 342 | if (qp_attr_mask & IB_QP_PORT) |
| 343 | − new_pps->main.port_num = | |
| 344 | − (qp_pps) ? qp_pps->main.port_num : qp_attr->port_num; | |
| 343 | + new_pps->main.port_num = qp_attr->port_num; | |
| 344 | + else if (qp_pps) | |
| 345 | + new_pps->main.port_num = qp_pps->main.port_num; | |
| 346 | + | |
| 345 | 347 | if (qp_attr_mask & IB_QP_PKEY_INDEX) |
| 346 | − new_pps->main.pkey_index = (qp_pps) ? qp_pps->main.pkey_index : | |
| 347 | − qp_attr->pkey_index; | |
| 348 | + new_pps->main.pkey_index = qp_attr->pkey_index; | |
| 349 | + else if (qp_pps) | |
| 350 | + new_pps->main.pkey_index = qp_pps->main.pkey_index; | |
| 351 | + | |
| 348 | 352 | if ((qp_attr_mask & IB_QP_PKEY_INDEX) && (qp_attr_mask & IB_QP_PORT)) |
| 349 | 353 | new_pps->main.state = IB_PORT_PKEY_VALID; |
| 350 | 354 | |
| 351 | − if (!(qp_attr_mask & (IB_QP_PKEY_INDEX || IB_QP_PORT)) && qp_pps) { | |
| 355 | + if (!(qp_attr_mask & (IB_QP_PKEY_INDEX | IB_QP_PORT)) && qp_pps) { | |
| 352 | 356 | new_pps->main.port_num = qp_pps->main.port_num; |
| 353 | 357 | new_pps->main.pkey_index = qp_pps->main.pkey_index; |
| 354 | 358 | if (qp_pps->main.state != IB_PORT_PKEY_NOT_VALID) |
| @@ -181,14 +181,28 @@ ib_umem_odp_alloc_child(struct ib_umem_odp *root, unsigned long addr, · 180 unmodified lines | ||
| 181 | 181 | odp_data->page_shift = PAGE_SHIFT; |
| 182 | 182 | odp_data->notifier.ops = ops; |
| 183 | 183 | |
| 184 | + /* | |
| 185 | + * A mmget must be held when registering a notifier, the owming_mm only | |
| 186 | + * has a mm_grab at this point. | |
| 187 | + */ | |
| 188 | + if (!mmget_not_zero(umem->owning_mm)) { | |
| 189 | + ret = -EFAULT; | |
| 190 | + goto out_free; | |
| 191 | + } | |
| 192 | + | |
| 184 | 193 | odp_data->tgid = get_pid(root->tgid); |
| 185 | 194 | ret = ib_init_umem_odp(odp_data, ops); |
| 186 | − if (ret) { | |
| 187 | − put_pid(odp_data->tgid); | |
| 188 | − kfree(odp_data); | |
| 189 | − return ERR_PTR(ret); | |
| 190 | − } | |
| 195 | + if (ret) | |
| 196 | + goto out_tgid; | |
| 197 | + mmput(umem->owning_mm); | |
| 191 | 198 | return odp_data; |
| 199 | + | |
| 200 | +out_tgid: | |
| 201 | + put_pid(odp_data->tgid); | |
| 202 | + mmput(umem->owning_mm); | |
| 203 | +out_free: | |
| 204 | + kfree(odp_data); | |
| 205 | + return ERR_PTR(ret); | |
| 192 | 206 | } |
| 193 | 207 | EXPORT_SYMBOL(ib_umem_odp_alloc_child); |
| 194 | 208 | |
| @@ -1445,16 +1445,7 @@ static int create_qp(struct uverbs_attr_bundle *attrs, · 1444 unmodified lines | ||
| 1445 | 1445 | if (ret) |
| 1446 | 1446 | goto err_cb; |
| 1447 | 1447 | |
| 1448 | − qp->pd = pd; | |
| 1449 | − qp->send_cq = attr.send_cq; | |
| 1450 | − qp->recv_cq = attr.recv_cq; | |
| 1451 | − qp->srq = attr.srq; | |
| 1452 | − qp->rwq_ind_tbl = ind_tbl; | |
| 1453 | − qp->event_handler = attr.event_handler; | |
| 1454 | − qp->qp_type = attr.qp_type; | |
| 1455 | − atomic_set(&qp->usecnt, 0); | |
| 1456 | 1448 | atomic_inc(&pd->usecnt); |
| 1457 | − qp->port = 0; | |
| 1458 | 1449 | if (attr.send_cq) |
| 1459 | 1450 | atomic_inc(&attr.send_cq->usecnt); |
| 1460 | 1451 | if (attr.recv_cq) |
| @@ -1193,16 +1193,6 @@ struct ib_qp *ib_create_qp(struct ib_pd *pd, · 1192 unmodified lines | ||
| 1193 | 1193 | if (ret) |
| 1194 | 1194 | goto err; |
| 1195 | 1195 | |
| 1196 | − qp->qp_type = qp_init_attr->qp_type; | |
| 1197 | − qp->rwq_ind_tbl = qp_init_attr->rwq_ind_tbl; | |
| 1198 | − | |
| 1199 | − atomic_set(&qp->usecnt, 0); | |
| 1200 | − qp->mrs_used = 0; | |
| 1201 | − spin_lock_init(&qp->mr_lock); | |
| 1202 | − INIT_LIST_HEAD(&qp->rdma_mrs); | |
| 1203 | − INIT_LIST_HEAD(&qp->sig_mrs); | |
| 1204 | − qp->port = 0; | |
| 1205 | − | |
| 1206 | 1196 | if (qp_init_attr->qp_type == IB_QPT_XRC_TGT) { |
| 1207 | 1197 | struct ib_qp *xrc_qp = |
| 1208 | 1198 | create_xrc_qp_user(qp, qp_init_attr); |
| @@ -515,10 +515,11 @@ static inline void hfi1_handle_packet(struct hfi1_packet *packet, · 514 unmodified lines | ||
| 515 | 515 | opa_get_lid(packet->dlid, 9B)); |
| 516 | 516 | if (!mcast) |
| 517 | 517 | goto drop; |
| 518 | + rcu_read_lock(); | |
| 518 | 519 | list_for_each_entry_rcu(p, &mcast->qp_list, list) { |
| 519 | 520 | packet->qp = p->qp; |
| 520 | 521 | if (hfi1_do_pkey_check(packet)) |
| 521 | − goto drop; | |
| 522 | + goto unlock_drop; | |
| 522 | 523 | spin_lock_irqsave(&packet->qp->r_lock, flags); |
| 523 | 524 | packet_handler = qp_ok(packet); |
| 524 | 525 | if (likely(packet_handler)) |
| @@ -527,6 +528,7 @@ static inline void hfi1_handle_packet(struct hfi1_packet *packet, · 2 unmodified lines | ||
| 527 | 528 | ibp->rvp.n_pkt_drops++; |
| 528 | 529 | spin_unlock_irqrestore(&packet->qp->r_lock, flags); |
| 529 | 530 | } |
| 531 | + rcu_read_unlock(); | |
| 530 | 532 | /* |
| 531 | 533 | * Notify rvt_multicast_detach() if it is waiting for us |
| 532 | 534 | * to finish. |
| @@ -641,6 +641,7 @@ struct mlx5_ib_mr { · 640 unmodified lines | ||
| 641 | 641 | |
| 642 | 642 | /* For ODP and implicit */ |
| 643 | 643 | atomic_t num_deferred_work; |
| 644 | + wait_queue_head_t q_deferred_work; | |
| 644 | 645 | struct xarray implicit_children; |
| 645 | 646 | union { |
| 646 | 647 | struct rcu_head rcu; |
| @@ -235,7 +235,8 @@ static void free_implicit_child_mr(struct mlx5_ib_mr *mr, bool need_imr_xlt) · 234 unmodified lines | ||
| 235 | 235 | mr->parent = NULL; |
| 236 | 236 | mlx5_mr_cache_free(mr->dev, mr); |
| 237 | 237 | ib_umem_odp_release(odp); |
| 238 | − atomic_dec(&imr->num_deferred_work); | |
| 238 | + if (atomic_dec_and_test(&imr->num_deferred_work)) | |
| 239 | + wake_up(&imr->q_deferred_work); | |
| 239 | 240 | } |
| 240 | 241 | |
| 241 | 242 | static void free_implicit_child_mr_work(struct work_struct *work) |
| @@ -554,6 +555,7 @@ struct mlx5_ib_mr *mlx5_ib_alloc_implicit_mr(struct mlx5_ib_pd *pd, · 312 unmodified lines | ||
| 554 | 555 | imr->umem = &umem_odp->umem; |
| 555 | 556 | imr->is_odp_implicit = true; |
| 556 | 557 | atomic_set(&imr->num_deferred_work, 0); |
| 558 | + init_waitqueue_head(&imr->q_deferred_work); | |
| 557 | 559 | xa_init(&imr->implicit_children); |
| 558 | 560 | |
| 559 | 561 | err = mlx5_ib_update_xlt(imr, 0, |
| @@ -611,10 +613,7 @@ void mlx5_ib_free_implicit_mr(struct mlx5_ib_mr *imr) · 51 unmodified lines | ||
| 611 | 613 | * under xa_lock while the child is in the xarray. Thus at this point |
| 612 | 614 | * it is only decreasing, and all work holding it is now on the wq. |
| 613 | 615 | */ |
| 614 | − if (atomic_read(&imr->num_deferred_work)) { | |
| 615 | − flush_workqueue(system_unbound_wq); | |
| 616 | − WARN_ON(atomic_read(&imr->num_deferred_work)); | |
| 617 | − } | |
| 616 | + wait_event(imr->q_deferred_work, !atomic_read(&imr->num_deferred_work)); | |
| 618 | 617 | |
| 619 | 618 | /* |
| 620 | 619 | * Fence the imr before we destroy the children. This allows us to |
| @@ -645,10 +644,7 @@ void mlx5_ib_fence_odp_mr(struct mlx5_ib_mr *mr) · 24 unmodified lines | ||
| 645 | 644 | /* Wait for all running page-fault handlers to finish. */ |
| 646 | 645 | synchronize_srcu(&mr->dev->odp_srcu); |
| 647 | 646 | |
| 648 | − if (atomic_read(&mr->num_deferred_work)) { | |
| 649 | − flush_workqueue(system_unbound_wq); | |
| 650 | − WARN_ON(atomic_read(&mr->num_deferred_work)); | |
| 651 | − } | |
| 647 | + wait_event(mr->q_deferred_work, !atomic_read(&mr->num_deferred_work)); | |
| 652 | 648 | |
| 653 | 649 | dma_fence_odp_mr(mr); |
| 654 | 650 | } |
| @@ -1720,7 +1716,8 @@ static void destroy_prefetch_work(struct prefetch_mr_work *work) · 1065 unmodified lines | ||
| 1720 | 1716 | u32 i; |
| 1721 | 1717 | |
| 1722 | 1718 | for (i = 0; i < work->num_sge; ++i) |
| 1723 | − atomic_dec(&work->frags[i].mr->num_deferred_work); | |
| 1719 | + if (atomic_dec_and_test(&work->frags[i].mr->num_deferred_work)) | |
| 1720 | + wake_up(&work->frags[i].mr->q_deferred_work); | |
| 1724 | 1721 | kvfree(work); |
| 1725 | 1722 | } |
| 1726 | 1723 | |
| @@ -329,8 +329,10 @@ void qib_ib_rcv(struct qib_ctxtdata *rcd, void *rhdr, void *data, u32 tlen) · 328 unmodified lines | ||
| 329 | 329 | if (mcast == NULL) |
| 330 | 330 | goto drop; |
| 331 | 331 | this_cpu_inc(ibp->pmastats->n_multicast_rcv); |
| 332 | + rcu_read_lock(); | |
| 332 | 333 | list_for_each_entry_rcu(p, &mcast->qp_list, list) |
| 333 | 334 | qib_qp_rcv(rcd, hdr, 1, data, tlen, p->qp); |
| 335 | + rcu_read_unlock(); | |
| 334 | 336 | /* |
| 335 | 337 | * Notify rvt_multicast_detach() if it is waiting for us |
| 336 | 338 | * to finish. |
| @@ -388,6 +388,9 @@ static struct siw_device *siw_device_create(struct net_device *netdev) · 387 unmodified lines | ||
| 388 | 388 | { .max_segment_size = SZ_2G }; |
| 389 | 389 | base_dev->num_comp_vectors = num_possible_cpus(); |
| 390 | 390 | |
| 391 | + xa_init_flags(&sdev->qp_xa, XA_FLAGS_ALLOC1); | |
| 392 | + xa_init_flags(&sdev->mem_xa, XA_FLAGS_ALLOC1); | |
| 393 | + | |
| 391 | 394 | ib_set_device_ops(base_dev, &siw_device_ops); |
| 392 | 395 | rv = ib_device_set_netdev(base_dev, netdev, 1); |
| 393 | 396 | if (rv) |
| @@ -415,9 +418,6 @@ static struct siw_device *siw_device_create(struct net_device *netdev) · 21 unmodified lines | ||
| 415 | 418 | sdev->attrs.max_srq_wr = SIW_MAX_SRQ_WR; |
| 416 | 419 | sdev->attrs.max_srq_sge = SIW_MAX_SGE; |
| 417 | 420 | |
| 418 | − xa_init_flags(&sdev->qp_xa, XA_FLAGS_ALLOC1); | |
| 419 | − xa_init_flags(&sdev->mem_xa, XA_FLAGS_ALLOC1); | |
| 420 | − | |
| 421 | 421 | INIT_LIST_HEAD(&sdev->cep_list); |
| 422 | 422 | INIT_LIST_HEAD(&sdev->qp_list); |
| 423 | 423 | |
| @@ -445,6 +445,11 @@ struct icc_path *of_icc_get(struct device *dev, const char *name) · 444 unmodified lines | ||
| 445 | 445 | path->name = kasprintf(GFP_KERNEL, "%s-%s", |
| 446 | 446 | src_node->name, dst_node->name); |
| 447 | 447 | |
| 448 | + if (!path->name) { | |
| 449 | + kfree(path); | |
| 450 | + return ERR_PTR(-ENOMEM); | |
| 451 | + } | |
| 452 | + | |
| 448 | 453 | return path; |
| 449 | 454 | } |
| 450 | 455 | EXPORT_SYMBOL_GPL(of_icc_get); |
| @@ -579,6 +584,10 @@ struct icc_path *icc_get(struct device *dev, const int src_id, const int dst_id) · 128 unmodified lines | ||
| 579 | 584 | } |
| 580 | 585 | |
| 581 | 586 | path->name = kasprintf(GFP_KERNEL, "%s-%s", src->name, dst->name); |
| 587 | + if (!path->name) { | |
| 588 | + kfree(path); | |
| 589 | + path = ERR_PTR(-ENOMEM); | |
| 590 | + } | |
| 582 | 591 | out: |
| 583 | 592 | mutex_unlock(&icc_lock); |
| 584 | 593 | return path; |
| @@ -67,7 +67,6 @@ · 66 unmodified lines | ||
| 67 | 67 | #include <linux/blkdev.h> |
| 68 | 68 | #include <linux/kthread.h> |
| 69 | 69 | #include <linux/random.h> |
| 70 | −#include <linux/sched/signal.h> | |
| 71 | 70 | #include <trace/events/bcache.h> |
| 72 | 71 | |
| 73 | 72 | #define MAX_OPEN_BUCKETS 128 |
| @@ -734,21 +733,8 @@ int bch_open_buckets_alloc(struct cache_set *c) · 660 unmodified lines | ||
| 734 | 733 | |
| 735 | 734 | int bch_cache_allocator_start(struct cache *ca) |
| 736 | 735 | { |
| 737 | − struct task_struct *k; | |
| 738 | − | |
| 739 | − /* | |
| 740 | − * In case previous btree check operation occupies too many | |
| 741 | − * system memory for bcache btree node cache, and the | |
| 742 | − * registering process is selected by OOM killer. Here just | |
| 743 | − * ignore the SIGKILL sent by OOM killer if there is, to | |
| 744 | − * avoid kthread_run() being failed by pending signals. The | |
| 745 | − * bcache registering process will exit after the registration | |
| 746 | − * done. | |
| 747 | − */ | |
| 748 | − if (signal_pending(current)) | |
| 749 | − flush_signals(current); | |
| 750 | − | |
| 751 | − k = kthread_run(bch_allocator_thread, ca, "bcache_allocator"); | |
| 736 | + struct task_struct *k = kthread_run(bch_allocator_thread, | |
| 737 | + ca, "bcache_allocator"); | |
| 752 | 738 | if (IS_ERR(k)) |
| 753 | 739 | return PTR_ERR(k); |
| 754 | 740 | |
| @@ -34,7 +34,6 @@ · 33 unmodified lines | ||
| 34 | 34 | #include <linux/random.h> |
| 35 | 35 | #include <linux/rcupdate.h> |
| 36 | 36 | #include <linux/sched/clock.h> |
| 37 | −#include <linux/sched/signal.h> | |
| 38 | 37 | #include <linux/rculist.h> |
| 39 | 38 | #include <linux/delay.h> |
| 40 | 39 | #include <trace/events/bcache.h> |
| @@ -1914,18 +1913,6 @@ static int bch_gc_thread(void *arg) · 1873 unmodified lines | ||
| 1914 | 1913 | |
| 1915 | 1914 | int bch_gc_thread_start(struct cache_set *c) |
| 1916 | 1915 | { |
| 1917 | − /* | |
| 1918 | − * In case previous btree check operation occupies too many | |
| 1919 | − * system memory for bcache btree node cache, and the | |
| 1920 | − * registering process is selected by OOM killer. Here just | |
| 1921 | − * ignore the SIGKILL sent by OOM killer if there is, to | |
| 1922 | − * avoid kthread_run() being failed by pending signals. The | |
| 1923 | − * bcache registering process will exit after the registration | |
| 1924 | − * done. | |
| 1925 | − */ | |
| 1926 | − if (signal_pending(current)) | |
| 1927 | − flush_signals(current); | |
| 1928 | − | |
| 1929 | 1916 | c->gc_thread = kthread_run(bch_gc_thread, c, "bcache_gc"); |
| 1930 | 1917 | return PTR_ERR_OR_ZERO(c->gc_thread); |
| 1931 | 1918 | } |
| @@ -20,8 +20,13 @@ · 19 unmodified lines | ||
| 20 | 20 | struct dm_bio_details { |
| 21 | 21 | struct gendisk *bi_disk; |
| 22 | 22 | u8 bi_partno; |
| 23 | + int __bi_remaining; | |
| 23 | 24 | unsigned long bi_flags; |
| 24 | 25 | struct bvec_iter bi_iter; |
| 26 | + bio_end_io_t *bi_end_io; | |
| 27 | +#if defined(CONFIG_BLK_DEV_INTEGRITY) | |
| 28 | + struct bio_integrity_payload *bi_integrity; | |
| 29 | +#endif | |
| 25 | 30 | }; |
| 26 | 31 | |
| 27 | 32 | static inline void dm_bio_record(struct dm_bio_details *bd, struct bio *bio) |
| @@ -30,6 +35,11 @@ static inline void dm_bio_record(struct dm_bio_details *bd, struct bio *bio) · 2 unmodified lines | ||
| 30 | 35 | bd->bi_partno = bio->bi_partno; |
| 31 | 36 | bd->bi_flags = bio->bi_flags; |
| 32 | 37 | bd->bi_iter = bio->bi_iter; |
| 38 | + bd->__bi_remaining = atomic_read(&bio->__bi_remaining); | |
| 39 | + bd->bi_end_io = bio->bi_end_io; | |
| 40 | +#if defined(CONFIG_BLK_DEV_INTEGRITY) | |
| 41 | + bd->bi_integrity = bio_integrity(bio); | |
| 42 | +#endif | |
| 33 | 43 | } |
| 34 | 44 | |
| 35 | 45 | static inline void dm_bio_restore(struct dm_bio_details *bd, struct bio *bio) |
| @@ -38,6 +48,11 @@ static inline void dm_bio_restore(struct dm_bio_details *bd, struct bio *bio) · 2 unmodified lines | ||
| 38 | 48 | bio->bi_partno = bd->bi_partno; |
| 39 | 49 | bio->bi_flags = bd->bi_flags; |
| 40 | 50 | bio->bi_iter = bd->bi_iter; |
| 51 | + atomic_set(&bio->__bi_remaining, bd->__bi_remaining); | |
| 52 | + bio->bi_end_io = bd->bi_end_io; | |
| 53 | +#if defined(CONFIG_BLK_DEV_INTEGRITY) | |
| 54 | + bio->bi_integrity = bd->bi_integrity; | |
| 55 | +#endif | |
| 41 | 56 | } |
| 42 | 57 | |
| 43 | 58 | #endif |
| @@ -2846,8 +2846,8 @@ static void cache_postsuspend(struct dm_target *ti) · 2845 unmodified lines | ||
| 2846 | 2846 | prevent_background_work(cache); |
| 2847 | 2847 | BUG_ON(atomic_read(&cache->nr_io_migrations)); |
| 2848 | 2848 | |
| 2849 | − cancel_delayed_work(&cache->waker); | |
| 2850 | − flush_workqueue(cache->wq); | |
| 2849 | + cancel_delayed_work_sync(&cache->waker); | |
| 2850 | + drain_workqueue(cache->wq); | |
| 2851 | 2851 | WARN_ON(cache->tracker.in_flight); |
| 2852 | 2852 | |
| 2853 | 2853 | /* |
| @@ -3492,7 +3492,7 @@ static void cache_io_hints(struct dm_target *ti, struct queue_limits *limits) · 638 unmodified lines | ||
| 3492 | 3492 | |
| 3493 | 3493 | static struct target_type cache_target = { |
| 3494 | 3494 | .name = "cache", |
| 3495 | − .version = {2, 1, 0}, | |
| 3495 | + .version = {2, 2, 0}, | |
| 3496 | 3496 | .module = THIS_MODULE, |
| 3497 | 3497 | .ctr = cache_ctr, |
| 3498 | 3498 | .dtr = cache_dtr, |
| @@ -6,6 +6,8 @@ · 5 unmodified lines | ||
| 6 | 6 | * This file is released under the GPL. |
| 7 | 7 | */ |
| 8 | 8 | |
| 9 | +#include "dm-bio-record.h" | |
| 10 | + | |
| 9 | 11 | #include <linux/compiler.h> |
| 10 | 12 | #include <linux/module.h> |
| 11 | 13 | #include <linux/device-mapper.h> |
| @@ -201,17 +203,19 @@ struct dm_integrity_c { · 189 unmodified lines | ||
| 201 | 203 | __u8 log2_blocks_per_bitmap_bit; |
| 202 | 204 | |
| 203 | 205 | unsigned char mode; |
| 204 | − int suspending; | |
| 205 | 206 | |
| 206 | 207 | int failed; |
| 207 | 208 | |
| 208 | 209 | struct crypto_shash *internal_hash; |
| 209 | 210 | |
| 211 | + struct dm_target *ti; | |
| 212 | + | |
| 210 | 213 | /* these variables are locked with endio_wait.lock */ |
| 211 | 214 | struct rb_root in_progress; |
| 212 | 215 | struct list_head wait_list; |
| 213 | 216 | wait_queue_head_t endio_wait; |
| 214 | 217 | struct workqueue_struct *wait_wq; |
| 218 | + struct workqueue_struct *offload_wq; | |
| 215 | 219 | |
| 216 | 220 | unsigned char commit_seq; |
| 217 | 221 | commit_id_t commit_ids[N_COMMIT_IDS]; |
| @@ -293,11 +297,7 @@ struct dm_integrity_io { · 75 unmodified lines | ||
| 293 | 297 | |
| 294 | 298 | struct completion *completion; |
| 295 | 299 | |
| 296 | − struct gendisk *orig_bi_disk; | |
| 297 | − u8 orig_bi_partno; | |
| 298 | − bio_end_io_t *orig_bi_end_io; | |
| 299 | − struct bio_integrity_payload *orig_bi_integrity; | |
| 300 | − struct bvec_iter orig_bi_iter; | |
| 300 | + struct dm_bio_details bio_details; | |
| 301 | 301 | }; |
| 302 | 302 | |
| 303 | 303 | struct journal_completion { |
| @@ -1439,7 +1439,7 @@ static void dec_in_flight(struct dm_integrity_io *dio) · 1135 unmodified lines | ||
| 1439 | 1439 | dio->range.logical_sector += dio->range.n_sectors; |
| 1440 | 1440 | bio_advance(bio, dio->range.n_sectors << SECTOR_SHIFT); |
| 1441 | 1441 | INIT_WORK(&dio->work, integrity_bio_wait); |
| 1442 | − queue_work(ic->wait_wq, &dio->work); | |
| 1442 | + queue_work(ic->offload_wq, &dio->work); | |
| 1443 | 1443 | return; |
| 1444 | 1444 | } |
| 1445 | 1445 | do_endio_flush(ic, dio); |
| @@ -1450,14 +1450,9 @@ static void integrity_end_io(struct bio *bio) · 4 unmodified lines | ||
| 1450 | 1450 | { |
| 1451 | 1451 | struct dm_integrity_io *dio = dm_per_bio_data(bio, sizeof(struct dm_integrity_io)); |
| 1452 | 1452 | |
| 1453 | − bio->bi_iter = dio->orig_bi_iter; | |
| 1454 | − bio->bi_disk = dio->orig_bi_disk; | |
| 1455 | − bio->bi_partno = dio->orig_bi_partno; | |
| 1456 | − if (dio->orig_bi_integrity) { | |
| 1457 | − bio->bi_integrity = dio->orig_bi_integrity; | |
| 1453 | + dm_bio_restore(&dio->bio_details, bio); | |
| 1454 | + if (bio->bi_integrity) | |
| 1458 | 1455 | bio->bi_opf |= REQ_INTEGRITY; |
| 1459 | − } | |
| 1460 | − bio->bi_end_io = dio->orig_bi_end_io; | |
| 1461 | 1456 | |
| 1462 | 1457 | if (dio->completion) |
| 1463 | 1458 | complete(dio->completion); |
| @@ -1542,7 +1537,7 @@ static void integrity_metadata(struct work_struct *w) · 78 unmodified lines | ||
| 1542 | 1537 | } |
| 1543 | 1538 | } |
| 1544 | 1539 | |
| 1545 | − __bio_for_each_segment(bv, bio, iter, dio->orig_bi_iter) { | |
| 1540 | + __bio_for_each_segment(bv, bio, iter, dio->bio_details.bi_iter) { | |
| 1546 | 1541 | unsigned pos; |
| 1547 | 1542 | char *mem, *checksums_ptr; |
| 1548 | 1543 | |
| @@ -1586,7 +1581,7 @@ again: · 37 unmodified lines | ||
| 1586 | 1581 | if (likely(checksums != checksums_onstack)) |
| 1587 | 1582 | kfree(checksums); |
| 1588 | 1583 | } else { |
| 1589 | − struct bio_integrity_payload *bip = dio->orig_bi_integrity; | |
| 1584 | + struct bio_integrity_payload *bip = dio->bio_details.bi_integrity; | |
| 1590 | 1585 | |
| 1591 | 1586 | if (bip) { |
| 1592 | 1587 | struct bio_vec biv; |
| @@ -1865,7 +1860,7 @@ static void dm_integrity_map_continue(struct dm_integrity_io *dio, bool from_map · 272 unmodified lines | ||
| 1865 | 1860 | |
| 1866 | 1861 | if (need_sync_io && from_map) { |
| 1867 | 1862 | INIT_WORK(&dio->work, integrity_bio_wait); |
| 1868 | − queue_work(ic->metadata_wq, &dio->work); | |
| 1863 | + queue_work(ic->offload_wq, &dio->work); | |
| 1869 | 1864 | return; |
| 1870 | 1865 | } |
| 1871 | 1866 | |
| @@ -2005,20 +2000,13 @@ offload_to_thread: · 133 unmodified lines | ||
| 2005 | 2000 | } else |
| 2006 | 2001 | dio->completion = NULL; |
| 2007 | 2002 | |
| 2008 | − dio->orig_bi_iter = bio->bi_iter; | |
| 2009 | − | |
| 2010 | − dio->orig_bi_disk = bio->bi_disk; | |
| 2011 | − dio->orig_bi_partno = bio->bi_partno; | |
| 2003 | + dm_bio_record(&dio->bio_details, bio); | |
| 2012 | 2004 | bio_set_dev(bio, ic->dev->bdev); |
| 2013 | − | |
| 2014 | − dio->orig_bi_integrity = bio_integrity(bio); | |
| 2015 | 2005 | bio->bi_integrity = NULL; |
| 2016 | 2006 | bio->bi_opf &= ~REQ_INTEGRITY; |
| 2017 | − | |
| 2018 | − dio->orig_bi_end_io = bio->bi_end_io; | |
| 2019 | 2007 | bio->bi_end_io = integrity_end_io; |
| 2020 | − | |
| 2021 | 2008 | bio->bi_iter.bi_size = dio->range.n_sectors << SECTOR_SHIFT; |
| 2009 | + | |
| 2022 | 2010 | generic_make_request(bio); |
| 2023 | 2011 | |
| 2024 | 2012 | if (need_sync_io) { |
| @@ -2315,7 +2303,7 @@ static void integrity_writer(struct work_struct *w) · 290 unmodified lines | ||
| 2315 | 2303 | unsigned prev_free_sectors; |
| 2316 | 2304 | |
| 2317 | 2305 | /* the following test is not needed, but it tests the replay code */ |
| 2318 | − if (READ_ONCE(ic->suspending) && !ic->meta_dev) | |
| 2306 | + if (unlikely(dm_suspended(ic->ti)) && !ic->meta_dev) | |
| 2319 | 2307 | return; |
| 2320 | 2308 | |
| 2321 | 2309 | spin_lock_irq(&ic->endio_wait.lock); |
| @@ -2376,7 +2364,7 @@ static void integrity_recalc(struct work_struct *w) · 54 unmodified lines | ||
| 2376 | 2364 | |
| 2377 | 2365 | next_chunk: |
| 2378 | 2366 | |
| 2379 | − if (unlikely(READ_ONCE(ic->suspending))) | |
| 2367 | + if (unlikely(dm_suspended(ic->ti))) | |
| 2380 | 2368 | goto unlock_ret; |
| 2381 | 2369 | |
| 2382 | 2370 | range.logical_sector = le64_to_cpu(ic->sb->recalc_sector); |
| @@ -2501,7 +2489,7 @@ static void bitmap_block_work(struct work_struct *w) · 118 unmodified lines | ||
| 2501 | 2489 | dio->range.n_sectors, BITMAP_OP_TEST_ALL_SET)) { |
| 2502 | 2490 | remove_range(ic, &dio->range); |
| 2503 | 2491 | INIT_WORK(&dio->work, integrity_bio_wait); |
| 2504 | − queue_work(ic->wait_wq, &dio->work); | |
| 2492 | + queue_work(ic->offload_wq, &dio->work); | |
| 2505 | 2493 | } else { |
| 2506 | 2494 | block_bitmap_op(ic, ic->journal, dio->range.logical_sector, |
| 2507 | 2495 | dio->range.n_sectors, BITMAP_OP_SET); |
| @@ -2524,7 +2512,7 @@ static void bitmap_block_work(struct work_struct *w) · 16 unmodified lines | ||
| 2524 | 2512 | |
| 2525 | 2513 | remove_range(ic, &dio->range); |
| 2526 | 2514 | INIT_WORK(&dio->work, integrity_bio_wait); |
| 2527 | − queue_work(ic->wait_wq, &dio->work); | |
| 2515 | + queue_work(ic->offload_wq, &dio->work); | |
| 2528 | 2516 | } |
| 2529 | 2517 | |
| 2530 | 2518 | queue_delayed_work(ic->commit_wq, &ic->bitmap_flush_work, ic->bitmap_flush_interval); |
| @@ -2804,8 +2792,6 @@ static void dm_integrity_postsuspend(struct dm_target *ti) · 273 unmodified lines | ||
| 2804 | 2792 | |
| 2805 | 2793 | del_timer_sync(&ic->autocommit_timer); |
| 2806 | 2794 | |
| 2807 | − WRITE_ONCE(ic->suspending, 1); | |
| 2808 | − | |
| 2809 | 2795 | if (ic->recalc_wq) |
| 2810 | 2796 | drain_workqueue(ic->recalc_wq); |
| 2811 | 2797 | |
| @@ -2834,8 +2820,6 @@ static void dm_integrity_postsuspend(struct dm_target *ti) · 22 unmodified lines | ||
| 2834 | 2820 | #endif |
| 2835 | 2821 | } |
| 2836 | 2822 | |
| 2837 | − WRITE_ONCE(ic->suspending, 0); | |
| 2838 | − | |
| 2839 | 2823 | BUG_ON(!RB_EMPTY_ROOT(&ic->in_progress)); |
| 2840 | 2824 | |
| 2841 | 2825 | ic->journal_uptodate = true; |
| @@ -2888,17 +2872,24 @@ static void dm_integrity_resume(struct dm_target *ti) · 46 unmodified lines | ||
| 2888 | 2872 | } else { |
| 2889 | 2873 | replay_journal(ic); |
| 2890 | 2874 | if (ic->mode == 'B') { |
| 2891 | − int mode; | |
| 2892 | 2875 | ic->sb->flags |= cpu_to_le32(SB_FLAG_DIRTY_BITMAP); |
| 2893 | 2876 | ic->sb->log2_blocks_per_bitmap_bit = ic->log2_blocks_per_bitmap_bit; |
| 2894 | 2877 | r = sync_rw_sb(ic, REQ_OP_WRITE, REQ_FUA); |
| 2895 | 2878 | if (unlikely(r)) |
| 2896 | 2879 | dm_integrity_io_error(ic, "writing superblock", r); |
| 2897 | 2880 | |
| 2898 | − mode = ic->recalculate_flag ? BITMAP_OP_SET : BITMAP_OP_CLEAR; | |
| 2899 | − block_bitmap_op(ic, ic->journal, 0, ic->provided_data_sectors, mode); | |
| 2900 | − block_bitmap_op(ic, ic->recalc_bitmap, 0, ic->provided_data_sectors, mode); | |
| 2901 | − block_bitmap_op(ic, ic->may_write_bitmap, 0, ic->provided_data_sectors, mode); | |
| 2881 | + block_bitmap_op(ic, ic->journal, 0, ic->provided_data_sectors, BITMAP_OP_CLEAR); | |
| 2882 | + block_bitmap_op(ic, ic->recalc_bitmap, 0, ic->provided_data_sectors, BITMAP_OP_CLEAR); | |
| 2883 | + block_bitmap_op(ic, ic->may_write_bitmap, 0, ic->provided_data_sectors, BITMAP_OP_CLEAR); | |
| 2884 | + if (ic->sb->flags & cpu_to_le32(SB_FLAG_RECALCULATING) && | |
| 2885 | + le64_to_cpu(ic->sb->recalc_sector) < ic->provided_data_sectors) { | |
| 2886 | + block_bitmap_op(ic, ic->journal, le64_to_cpu(ic->sb->recalc_sector), | |
| 2887 | + ic->provided_data_sectors - le64_to_cpu(ic->sb->recalc_sector), BITMAP_OP_SET); | |
| 2888 | + block_bitmap_op(ic, ic->recalc_bitmap, le64_to_cpu(ic->sb->recalc_sector), | |
| 2889 | + ic->provided_data_sectors - le64_to_cpu(ic->sb->recalc_sector), BITMAP_OP_SET); | |
| 2890 | + block_bitmap_op(ic, ic->may_write_bitmap, le64_to_cpu(ic->sb->recalc_sector), | |
| 2891 | + ic->provided_data_sectors - le64_to_cpu(ic->sb->recalc_sector), BITMAP_OP_SET); | |
| 2892 | + } | |
| 2902 | 2893 | rw_journal_sectors(ic, REQ_OP_WRITE, REQ_FUA | REQ_SYNC, 0, |
| 2903 | 2894 | ic->n_bitmap_blocks * (BITMAP_BLOCK_SIZE >> SECTOR_SHIFT), NULL); |
| 2904 | 2895 | } |
| @@ -2967,7 +2958,7 @@ static void dm_integrity_status(struct dm_target *ti, status_type_t type, · 62 unmodified lines | ||
| 2967 | 2958 | DMEMIT(" meta_device:%s", ic->meta_dev->name); |
| 2968 | 2959 | if (ic->sectors_per_block != 1) |
| 2969 | 2960 | DMEMIT(" block_size:%u", ic->sectors_per_block << SECTOR_SHIFT); |
| 2970 | − if (ic->recalculate_flag) | |
| 2961 | + if (ic->sb->flags & cpu_to_le32(SB_FLAG_RECALCULATING)) | |
| 2971 | 2962 | DMEMIT(" recalculate"); |
| 2972 | 2963 | DMEMIT(" journal_sectors:%u", ic->initial_sectors - SB_SECTORS); |
| 2973 | 2964 | DMEMIT(" interleave_sectors:%u", 1U << ic->sb->log2_interleave_sectors); |
| @@ -3623,6 +3614,7 @@ static int dm_integrity_ctr(struct dm_target *ti, unsigned argc, char **argv) · 649 unmodified lines | ||
| 3623 | 3614 | } |
| 3624 | 3615 | ti->private = ic; |
| 3625 | 3616 | ti->per_io_data_size = sizeof(struct dm_integrity_io); |
| 3617 | + ic->ti = ti; | |
| 3626 | 3618 | |
| 3627 | 3619 | ic->in_progress = RB_ROOT; |
| 3628 | 3620 | INIT_LIST_HEAD(&ic->wait_list); |
| @@ -3836,6 +3828,14 @@ static int dm_integrity_ctr(struct dm_target *ti, unsigned argc, char **argv) · 207 unmodified lines | ||
| 3836 | 3828 | goto bad; |
| 3837 | 3829 | } |
| 3838 | 3830 | |
| 3831 | + ic->offload_wq = alloc_workqueue("dm-integrity-offload", WQ_MEM_RECLAIM, | |
| 3832 | + METADATA_WORKQUEUE_MAX_ACTIVE); | |
| 3833 | + if (!ic->offload_wq) { | |
| 3834 | + ti->error = "Cannot allocate workqueue"; | |
| 3835 | + r = -ENOMEM; | |
| 3836 | + goto bad; | |
| 3837 | + } | |
| 3838 | + | |
| 3839 | 3839 | ic->commit_wq = alloc_workqueue("dm-integrity-commit", WQ_MEM_RECLAIM, 1); |
| 3840 | 3840 | if (!ic->commit_wq) { |
| 3841 | 3841 | ti->error = "Cannot allocate workqueue"; |
| @@ -4140,6 +4140,8 @@ static void dm_integrity_dtr(struct dm_target *ti) · 298 unmodified lines | ||
| 4140 | 4140 | destroy_workqueue(ic->metadata_wq); |
| 4141 | 4141 | if (ic->wait_wq) |
| 4142 | 4142 | destroy_workqueue(ic->wait_wq); |
| 4143 | + if (ic->offload_wq) | |
| 4144 | + destroy_workqueue(ic->offload_wq); | |
| 4143 | 4145 | if (ic->commit_wq) |
| 4144 | 4146 | destroy_workqueue(ic->commit_wq); |
| 4145 | 4147 | if (ic->writer_wq) |
| @@ -4200,7 +4202,7 @@ static void dm_integrity_dtr(struct dm_target *ti) · 54 unmodified lines | ||
| 4200 | 4202 | |
| 4201 | 4203 | static struct target_type integrity_target = { |
| 4202 | 4204 | .name = "integrity", |
| 4203 | − .version = {1, 4, 0}, | |
| 4205 | + .version = {1, 5, 0}, | |
| 4204 | 4206 | .module = THIS_MODULE, |
| 4205 | 4207 | .features = DM_TARGET_SINGLETON | DM_TARGET_INTEGRITY, |
| 4206 | 4208 | .ctr = dm_integrity_ctr, |
| @@ -2053,7 +2053,7 @@ static int multipath_busy(struct dm_target *ti) · 2052 unmodified lines | ||
| 2053 | 2053 | *---------------------------------------------------------------*/ |
| 2054 | 2054 | static struct target_type multipath_target = { |
| 2055 | 2055 | .name = "multipath", |
| 2056 | − .version = {1, 13, 0}, | |
| 2056 | + .version = {1, 14, 0}, | |
| 2057 | 2057 | .features = DM_TARGET_SINGLETON | DM_TARGET_IMMUTABLE | |
| 2058 | 2058 | DM_TARGET_PASSES_INTEGRITY, |
| 2059 | 2059 | .module = THIS_MODULE, |
| @@ -960,9 +960,9 @@ int dm_pool_metadata_close(struct dm_pool_metadata *pmd) · 959 unmodified lines | ||
| 960 | 960 | DMWARN("%s: __commit_transaction() failed, error = %d", |
| 961 | 961 | __func__, r); |
| 962 | 962 | } |
| 963 | + pmd_write_unlock(pmd); | |
| 963 | 964 | if (!pmd->fail_io) |
| 964 | 965 | __destroy_persistent_data_objects(pmd); |
| 965 | − pmd_write_unlock(pmd); | |
| 966 | 966 | |
| 967 | 967 | kfree(pmd); |
| 968 | 968 | return 0; |
| @@ -1221,7 +1221,7 @@ bad: · 1220 unmodified lines | ||
| 1221 | 1221 | |
| 1222 | 1222 | static struct target_type verity_target = { |
| 1223 | 1223 | .name = "verity", |
| 1224 | − .version = {1, 5, 0}, | |
| 1224 | + .version = {1, 6, 0}, | |
| 1225 | 1225 | .module = THIS_MODULE, |
| 1226 | 1226 | .ctr = verity_ctr, |
| 1227 | 1227 | .dtr = verity_dtr, |
| @@ -625,6 +625,12 @@ static void writecache_add_to_freelist(struct dm_writecache *wc, struct wc_entry · 624 unmodified lines | ||
| 625 | 625 | wc->freelist_size++; |
| 626 | 626 | } |
| 627 | 627 | |
| 628 | +static inline void writecache_verify_watermark(struct dm_writecache *wc) | |
| 629 | +{ | |
| 630 | + if (unlikely(wc->freelist_size + wc->writeback_size <= wc->freelist_high_watermark)) | |
| 631 | + queue_work(wc->writeback_wq, &wc->writeback_work); | |
| 632 | +} | |
| 633 | + | |
| 628 | 634 | static struct wc_entry *writecache_pop_from_freelist(struct dm_writecache *wc, sector_t expected_sector) |
| 629 | 635 | { |
| 630 | 636 | struct wc_entry *e; |
| @@ -650,8 +656,8 @@ static struct wc_entry *writecache_pop_from_freelist(struct dm_writecache *wc, s · 19 unmodified lines | ||
| 650 | 656 | list_del(&e->lru); |
| 651 | 657 | } |
| 652 | 658 | wc->freelist_size--; |
| 653 | − if (unlikely(wc->freelist_size + wc->writeback_size <= wc->freelist_high_watermark)) | |
| 654 | − queue_work(wc->writeback_wq, &wc->writeback_work); | |
| 659 | + | |
| 660 | + writecache_verify_watermark(wc); | |
| 655 | 661 | |
| 656 | 662 | return e; |
| 657 | 663 | } |
| @@ -842,7 +848,7 @@ static void writecache_suspend(struct dm_target *ti) · 184 unmodified lines | ||
| 842 | 848 | } |
| 843 | 849 | wc_unlock(wc); |
| 844 | 850 | |
| 845 | − flush_workqueue(wc->writeback_wq); | |
| 851 | + drain_workqueue(wc->writeback_wq); | |
| 846 | 852 | |
| 847 | 853 | wc_lock(wc); |
| 848 | 854 | if (flush_on_suspend) |
| @@ -965,6 +971,8 @@ erase_this: · 116 unmodified lines | ||
| 965 | 971 | writecache_commit_flushed(wc, false); |
| 966 | 972 | } |
| 967 | 973 | |
| 974 | + writecache_verify_watermark(wc); | |
| 975 | + | |
| 968 | 976 | wc_unlock(wc); |
| 969 | 977 | } |
| 970 | 978 | |
| @@ -2312,7 +2320,7 @@ static void writecache_status(struct dm_target *ti, status_type_t type, · 1341 unmodified lines | ||
| 2312 | 2320 | |
| 2313 | 2321 | static struct target_type writecache_target = { |
| 2314 | 2322 | .name = "writecache", |
| 2315 | − .version = {1, 1, 1}, | |
| 2323 | + .version = {1, 2, 0}, | |
| 2316 | 2324 | .module = THIS_MODULE, |
| 2317 | 2325 | .ctr = writecache_ctr, |
| 2318 | 2326 | .dtr = writecache_dtr, |
| @@ -533,8 +533,9 @@ static int dmz_queue_chunk_work(struct dmz_target *dmz, struct bio *bio) · 532 unmodified lines | ||
| 533 | 533 | |
| 534 | 534 | /* Get the BIO chunk work. If one is not active yet, create one */ |
| 535 | 535 | cw = radix_tree_lookup(&dmz->chunk_rxtree, chunk); |
| 536 | − if (!cw) { | |
| 537 | − | |
| 536 | + if (cw) { | |
| 537 | + dmz_get_chunk_work(cw); | |
| 538 | + } else { | |
| 538 | 539 | /* Create a new chunk work */ |
| 539 | 540 | cw = kmalloc(sizeof(struct dm_chunk_work), GFP_NOIO); |
| 540 | 541 | if (unlikely(!cw)) { |
| @@ -543,7 +544,7 @@ static int dmz_queue_chunk_work(struct dmz_target *dmz, struct bio *bio) · 2 unmodified lines | ||
| 543 | 544 | } |
| 544 | 545 | |
| 545 | 546 | INIT_WORK(&cw->work, dmz_chunk_work); |
| 546 | − refcount_set(&cw->refcount, 0); | |
| 547 | + refcount_set(&cw->refcount, 1); | |
| 547 | 548 | cw->target = dmz; |
| 548 | 549 | cw->chunk = chunk; |
| 549 | 550 | bio_list_init(&cw->bio_list); |
| @@ -556,7 +557,6 @@ static int dmz_queue_chunk_work(struct dmz_target *dmz, struct bio *bio) · 6 unmodified lines | ||
| 556 | 557 | } |
| 557 | 558 | |
| 558 | 559 | bio_list_add(&cw->bio_list, bio); |
| 559 | − dmz_get_chunk_work(cw); | |
| 560 | 560 | |
| 561 | 561 | dmz_reclaim_bio_acc(dmz->reclaim); |
| 562 | 562 | if (queue_work(dmz->chunk_wq, &cw->work)) |
| @@ -967,7 +967,7 @@ static int dmz_iterate_devices(struct dm_target *ti, · 404 unmodified lines | ||
| 967 | 967 | |
| 968 | 968 | static struct target_type dmz_type = { |
| 969 | 969 | .name = "zoned", |
| 970 | − .version = {1, 0, 0}, | |
| 970 | + .version = {1, 1, 0}, | |
| 971 | 971 | .features = DM_TARGET_SINGLETON | DM_TARGET_ZONED_HM, |
| 972 | 972 | .module = THIS_MODULE, |
| 973 | 973 | .ctr = dmz_ctr, |
| @@ -1788,7 +1788,8 @@ static int dm_any_congested(void *congested_data, int bdi_bits) · 1787 unmodified lines | ||
| 1788 | 1788 | * With request-based DM we only need to check the |
| 1789 | 1789 | * top-level queue for congestion. |
| 1790 | 1790 | */ |
| 1791 | − r = md->queue->backing_dev_info->wb.state & bdi_bits; | |
| 1791 | + struct backing_dev_info *bdi = md->queue->backing_dev_info; | |
| 1792 | + r = bdi->wb.congested->state & bdi_bits; | |
| 1792 | 1793 | } else { |
| 1793 | 1794 | map = dm_get_live_table_fast(md); |
| 1794 | 1795 | if (map) |
| @@ -1854,15 +1855,6 @@ static const struct dax_operations dm_dax_ops; · 59 unmodified lines | ||
| 1854 | 1855 | |
| 1855 | 1856 | static void dm_wq_work(struct work_struct *work); |
| 1856 | 1857 | |
| 1857 | −static void dm_init_normal_md_queue(struct mapped_device *md) | |
| 1858 | −{ | |
| 1859 | − /* | |
| 1860 | − * Initialize aspects of queue that aren't relevant for blk-mq | |
| 1861 | − */ | |
| 1862 | − md->queue->backing_dev_info->congested_data = md; | |
| 1863 | − md->queue->backing_dev_info->congested_fn = dm_any_congested; | |
| 1864 | −} | |
| 1865 | − | |
| 1866 | 1858 | static void cleanup_mapped_device(struct mapped_device *md) |
| 1867 | 1859 | { |
| 1868 | 1860 | if (md->wq) |
| @@ -2249,6 +2241,12 @@ struct queue_limits *dm_get_queue_limits(struct mapped_device *md) · 380 unmodified lines | ||
| 2249 | 2241 | } |
| 2250 | 2242 | EXPORT_SYMBOL_GPL(dm_get_queue_limits); |
| 2251 | 2243 | |
| 2244 | +static void dm_init_congested_fn(struct mapped_device *md) | |
| 2245 | +{ | |
| 2246 | + md->queue->backing_dev_info->congested_data = md; | |
| 2247 | + md->queue->backing_dev_info->congested_fn = dm_any_congested; | |
| 2248 | +} | |
| 2249 | + | |
| 2252 | 2250 | /* |
| 2253 | 2251 | * Setup the DM device's queue based on md's type |
| 2254 | 2252 | */ |
| @@ -2265,11 +2263,12 @@ int dm_setup_md_queue(struct mapped_device *md, struct dm_table *t) · 10 unmodified lines | ||
| 2265 | 2263 | DMERR("Cannot initialize queue for request-based dm-mq mapped device"); |
| 2266 | 2264 | return r; |
| 2267 | 2265 | } |
| 2266 | + dm_init_congested_fn(md); | |
| 2268 | 2267 | break; |
| 2269 | 2268 | case DM_TYPE_BIO_BASED: |
| 2270 | 2269 | case DM_TYPE_DAX_BIO_BASED: |
| 2271 | 2270 | case DM_TYPE_NVME_BIO_BASED: |
| 2272 | − dm_init_normal_md_queue(md); | |
| 2271 | + dm_init_congested_fn(md); | |
| 2273 | 2272 | break; |
| 2274 | 2273 | case DM_TYPE_NONE: |
| 2275 | 2274 | WARN_ON_ONCE(true); |
| @@ -2368,6 +2367,7 @@ static void __dm_destroy(struct mapped_device *md, bool wait) · 92 unmodified lines | ||
| 2368 | 2367 | map = dm_get_live_table(md, &srcu_idx); |
| 2369 | 2368 | if (!dm_suspended_md(md)) { |
| 2370 | 2369 | dm_table_presuspend_targets(map); |
| 2370 | + set_bit(DMF_SUSPENDED, &md->flags); | |
| 2371 | 2371 | dm_table_postsuspend_targets(map); |
| 2372 | 2372 | } |
| 2373 | 2373 | /* dm_put_live_table must be before msleep, otherwise deadlock is possible */ |
| @@ -639,9 +639,9 @@ int media_get_pad_index(struct media_entity *entity, bool is_sink, · 638 unmodified lines | ||
| 639 | 639 | return -EINVAL; |
| 640 | 640 | |
| 641 | 641 | for (i = 0; i < entity->num_pads; i++) { |
| 642 | − if (entity->pads[i].flags == MEDIA_PAD_FL_SINK) | |
| 642 | + if (entity->pads[i].flags & MEDIA_PAD_FL_SINK) | |
| 643 | 643 | pad_is_sink = true; |
| 644 | − else if (entity->pads[i].flags == MEDIA_PAD_FL_SOURCE) | |
| 644 | + else if (entity->pads[i].flags & MEDIA_PAD_FL_SOURCE) | |
| 645 | 645 | pad_is_sink = false; |
| 646 | 646 | else |
| 647 | 647 | continue; /* This is an error! */ |
| @@ -27,17 +27,17 @@ static const struct v4l2_fwht_pixfmt_info v4l2_fwht_pixfmts[] = { · 26 unmodified lines | ||
| 27 | 27 | { V4L2_PIX_FMT_BGR24, 3, 3, 1, 3, 3, 1, 1, 3, 1, FWHT_FL_PIXENC_RGB}, |
| 28 | 28 | { V4L2_PIX_FMT_RGB24, 3, 3, 1, 3, 3, 1, 1, 3, 1, FWHT_FL_PIXENC_RGB}, |
| 29 | 29 | { V4L2_PIX_FMT_HSV24, 3, 3, 1, 3, 3, 1, 1, 3, 1, FWHT_FL_PIXENC_HSV}, |
| 30 | − { V4L2_PIX_FMT_BGR32, 4, 4, 1, 4, 4, 1, 1, 3, 1, FWHT_FL_PIXENC_RGB}, | |
| 31 | − { V4L2_PIX_FMT_XBGR32, 4, 4, 1, 4, 4, 1, 1, 3, 1, FWHT_FL_PIXENC_RGB}, | |
| 30 | + { V4L2_PIX_FMT_BGR32, 4, 4, 1, 4, 4, 1, 1, 4, 1, FWHT_FL_PIXENC_RGB}, | |
| 31 | + { V4L2_PIX_FMT_XBGR32, 4, 4, 1, 4, 4, 1, 1, 4, 1, FWHT_FL_PIXENC_RGB}, | |
| 32 | 32 | { V4L2_PIX_FMT_ABGR32, 4, 4, 1, 4, 4, 1, 1, 4, 1, FWHT_FL_PIXENC_RGB}, |
| 33 | − { V4L2_PIX_FMT_RGB32, 4, 4, 1, 4, 4, 1, 1, 3, 1, FWHT_FL_PIXENC_RGB}, | |
| 34 | − { V4L2_PIX_FMT_XRGB32, 4, 4, 1, 4, 4, 1, 1, 3, 1, FWHT_FL_PIXENC_RGB}, | |
| 33 | + { V4L2_PIX_FMT_RGB32, 4, 4, 1, 4, 4, 1, 1, 4, 1, FWHT_FL_PIXENC_RGB}, | |
| 34 | + { V4L2_PIX_FMT_XRGB32, 4, 4, 1, 4, 4, 1, 1, 4, 1, FWHT_FL_PIXENC_RGB}, | |
| 35 | 35 | { V4L2_PIX_FMT_ARGB32, 4, 4, 1, 4, 4, 1, 1, 4, 1, FWHT_FL_PIXENC_RGB}, |
| 36 | − { V4L2_PIX_FMT_BGRX32, 4, 4, 1, 4, 4, 1, 1, 3, 1, FWHT_FL_PIXENC_RGB}, | |
| 36 | + { V4L2_PIX_FMT_BGRX32, 4, 4, 1, 4, 4, 1, 1, 4, 1, FWHT_FL_PIXENC_RGB}, | |
| 37 | 37 | { V4L2_PIX_FMT_BGRA32, 4, 4, 1, 4, 4, 1, 1, 4, 1, FWHT_FL_PIXENC_RGB}, |
| 38 | − { V4L2_PIX_FMT_RGBX32, 4, 4, 1, 4, 4, 1, 1, 3, 1, FWHT_FL_PIXENC_RGB}, | |
| 38 | + { V4L2_PIX_FMT_RGBX32, 4, 4, 1, 4, 4, 1, 1, 4, 1, FWHT_FL_PIXENC_RGB}, | |
| 39 | 39 | { V4L2_PIX_FMT_RGBA32, 4, 4, 1, 4, 4, 1, 1, 4, 1, FWHT_FL_PIXENC_RGB}, |
| 40 | − { V4L2_PIX_FMT_HSV32, 4, 4, 1, 4, 4, 1, 1, 3, 1, FWHT_FL_PIXENC_HSV}, | |
| 40 | + { V4L2_PIX_FMT_HSV32, 4, 4, 1, 4, 4, 1, 1, 4, 1, FWHT_FL_PIXENC_HSV}, | |
| 41 | 41 | { V4L2_PIX_FMT_GREY, 1, 1, 1, 1, 0, 1, 1, 1, 1, FWHT_FL_PIXENC_RGB}, |
| 42 | 42 | }; |
| 43 | 43 | |
| @@ -175,22 +175,14 @@ static int prepare_raw_frame(struct fwht_raw_frame *rf, · 131 unmodified lines | ||
| 175 | 175 | case V4L2_PIX_FMT_RGB32: |
| 176 | 176 | case V4L2_PIX_FMT_XRGB32: |
| 177 | 177 | case V4L2_PIX_FMT_HSV32: |
| 178 | − rf->cr = rf->luma + 1; | |
| 179 | − rf->cb = rf->cr + 2; | |
| 180 | − rf->luma += 2; | |
| 181 | − break; | |
| 182 | − case V4L2_PIX_FMT_BGR32: | |
| 183 | − case V4L2_PIX_FMT_XBGR32: | |
| 184 | − rf->cb = rf->luma; | |
| 185 | − rf->cr = rf->cb + 2; | |
| 186 | − rf->luma++; | |
| 187 | − break; | |
| 188 | 178 | case V4L2_PIX_FMT_ARGB32: |
| 189 | 179 | rf->alpha = rf->luma; |
| 190 | 180 | rf->cr = rf->luma + 1; |
| 191 | 181 | rf->cb = rf->cr + 2; |
| 192 | 182 | rf->luma += 2; |
| 193 | 183 | break; |
| 184 | + case V4L2_PIX_FMT_BGR32: | |
| 185 | + case V4L2_PIX_FMT_XBGR32: | |
| 194 | 186 | case V4L2_PIX_FMT_ABGR32: |
| 195 | 187 | rf->cb = rf->luma; |
| 196 | 188 | rf->cr = rf->cb + 2; |
| @@ -198,10 +190,6 @@ static int prepare_raw_frame(struct fwht_raw_frame *rf, · 1 unmodified line | ||
| 198 | 190 | rf->alpha = rf->cr + 1; |
| 199 | 191 | break; |
| 200 | 192 | case V4L2_PIX_FMT_BGRX32: |
| 201 | − rf->cb = rf->luma + 1; | |
| 202 | − rf->cr = rf->cb + 2; | |
| 203 | − rf->luma += 2; | |
| 204 | − break; | |
| 205 | 193 | case V4L2_PIX_FMT_BGRA32: |
| 206 | 194 | rf->alpha = rf->luma; |
| 207 | 195 | rf->cb = rf->luma + 1; |
| @@ -209,10 +197,6 @@ static int prepare_raw_frame(struct fwht_raw_frame *rf, · 1 unmodified line | ||
| 209 | 197 | rf->luma += 2; |
| 210 | 198 | break; |
| 211 | 199 | case V4L2_PIX_FMT_RGBX32: |
| 212 | − rf->cr = rf->luma; | |
| 213 | − rf->cb = rf->cr + 2; | |
| 214 | − rf->luma++; | |
| 215 | − break; | |
| 216 | 200 | case V4L2_PIX_FMT_RGBA32: |
| 217 | 201 | rf->alpha = rf->luma + 3; |
| 218 | 202 | rf->cr = rf->luma; |
| @@ -635,8 +635,6 @@ static void pulse8_cec_adap_free(struct cec_adapter *adap) · 634 unmodified lines | ||
| 635 | 635 | cancel_delayed_work_sync(&pulse8->ping_eeprom_work); |
| 636 | 636 | cancel_work_sync(&pulse8->irq_work); |
| 637 | 637 | cancel_work_sync(&pulse8->tx_work); |
| 638 | − serio_close(pulse8->serio); | |
| 639 | − serio_set_drvdata(pulse8->serio, NULL); | |
| 640 | 638 | kfree(pulse8); |
| 641 | 639 | } |
| 642 | 640 | |
| @@ -652,6 +650,9 @@ static void pulse8_disconnect(struct serio *serio) · 9 unmodified lines | ||
| 652 | 650 | struct pulse8 *pulse8 = serio_get_drvdata(serio); |
| 653 | 651 | |
| 654 | 652 | cec_unregister_adapter(pulse8->adap); |
| 653 | + pulse8->serio = NULL; | |
| 654 | + serio_set_drvdata(serio, NULL); | |
| 655 | + serio_close(serio); | |
| 655 | 656 | } |
| 656 | 657 | |
| 657 | 658 | static int pulse8_setup(struct pulse8 *pulse8, struct serio *serio, |
| @@ -840,6 +841,8 @@ static int pulse8_connect(struct serio *serio, struct serio_driver *drv) · 182 unmodified lines | ||
| 840 | 841 | serio_set_drvdata(serio, pulse8); |
| 841 | 842 | INIT_WORK(&pulse8->irq_work, pulse8_irq_work_handler); |
| 842 | 843 | INIT_WORK(&pulse8->tx_work, pulse8_tx_work_handler); |
| 844 | + INIT_DELAYED_WORK(&pulse8->ping_eeprom_work, | |
| 845 | + pulse8_ping_eeprom_work_handler); | |
| 843 | 846 | mutex_init(&pulse8->lock); |
| 844 | 847 | spin_lock_init(&pulse8->msg_lock); |
| 845 | 848 | pulse8->config_pending = false; |
| @@ -865,17 +868,16 @@ static int pulse8_connect(struct serio *serio, struct serio_driver *drv) · 19 unmodified lines | ||
| 865 | 868 | pulse8->restoring_config = true; |
| 866 | 869 | } |
| 867 | 870 | |
| 868 | − INIT_DELAYED_WORK(&pulse8->ping_eeprom_work, | |
| 869 | − pulse8_ping_eeprom_work_handler); | |
| 870 | 871 | schedule_delayed_work(&pulse8->ping_eeprom_work, PING_PERIOD); |
| 871 | 872 | |
| 872 | 873 | return 0; |
| 873 | 874 | |
| 874 | 875 | close_serio: |
| 876 | + pulse8->serio = NULL; | |
| 877 | + serio_set_drvdata(serio, NULL); | |
| 875 | 878 | serio_close(serio); |
| 876 | 879 | delete_adap: |
| 877 | 880 | cec_delete_adapter(pulse8->adap); |
| 878 | − serio_set_drvdata(serio, NULL); | |
| 879 | 881 | free_device: |
| 880 | 882 | kfree(pulse8); |
| 881 | 883 | return err; |
| @@ -880,12 +880,12 @@ int v4l2_m2m_register_media_controller(struct v4l2_m2m_dev *m2m_dev, · 879 unmodified lines | ||
| 880 | 880 | goto err_rel_entity1; |
| 881 | 881 | |
| 882 | 882 | /* Connect the three entities */ |
| 883 | − ret = media_create_pad_link(m2m_dev->source, 0, &m2m_dev->proc, 1, | |
| 883 | + ret = media_create_pad_link(m2m_dev->source, 0, &m2m_dev->proc, 0, | |
| 884 | 884 | MEDIA_LNK_FL_IMMUTABLE | MEDIA_LNK_FL_ENABLED); |
| 885 | 885 | if (ret) |
| 886 | 886 | goto err_rel_entity2; |
| 887 | 887 | |
| 888 | − ret = media_create_pad_link(&m2m_dev->proc, 0, &m2m_dev->sink, 0, | |
| 888 | + ret = media_create_pad_link(&m2m_dev->proc, 1, &m2m_dev->sink, 0, | |
| 889 | 889 | MEDIA_LNK_FL_IMMUTABLE | MEDIA_LNK_FL_ENABLED); |
| 890 | 890 | if (ret) |
| 891 | 891 | goto err_rm_links0; |
| @@ -2112,8 +2112,8 @@ exit_done: · 2111 unmodified lines | ||
| 2112 | 2112 | return status; |
| 2113 | 2113 | } |
| 2114 | 2114 | |
| 2115 | −static int altera_get_note(u8 *p, s32 program_size, | |
| 2116 | − s32 *offset, char *key, char *value, int length) | |
| 2115 | +static int altera_get_note(u8 *p, s32 program_size, s32 *offset, | |
| 2116 | + char *key, char *value, int keylen, int vallen) | |
| 2117 | 2117 | /* |
| 2118 | 2118 | * Gets key and value of NOTE fields in the JBC file. |
| 2119 | 2119 | * Can be called in two modes: if offset pointer is NULL, |
| @@ -2170,7 +2170,7 @@ static int altera_get_note(u8 *p, s32 program_size, · 50 unmodified lines | ||
| 2170 | 2170 | &p[note_table + (8 * i) + 4])]; |
| 2171 | 2171 | |
| 2172 | 2172 | if (value != NULL) |
| 2173 | − strlcpy(value, value_ptr, length); | |
| 2173 | + strlcpy(value, value_ptr, vallen); | |
| 2174 | 2174 | |
| 2175 | 2175 | } |
| 2176 | 2176 | } |
| @@ -2189,13 +2189,13 @@ static int altera_get_note(u8 *p, s32 program_size, · 12 unmodified lines | ||
| 2189 | 2189 | strlcpy(key, &p[note_strings + |
| 2190 | 2190 | get_unaligned_be32( |
| 2191 | 2191 | &p[note_table + (8 * i)])], |
| 2192 | − length); | |
| 2192 | + keylen); | |
| 2193 | 2193 | |
| 2194 | 2194 | if (value != NULL) |
| 2195 | 2195 | strlcpy(value, &p[note_strings + |
| 2196 | 2196 | get_unaligned_be32( |
| 2197 | 2197 | &p[note_table + (8 * i) + 4])], |
| 2198 | − length); | |
| 2198 | + vallen); | |
| 2199 | 2199 | |
| 2200 | 2200 | *offset = i + 1; |
| 2201 | 2201 | } |
| @@ -2449,7 +2449,7 @@ int altera_init(struct altera_config *config, const struct firmware *fw) · 247 unmodified lines | ||
| 2449 | 2449 | __func__, (format_version == 2) ? "Jam STAPL" : |
| 2450 | 2450 | "pre-standardized Jam 1.1"); |
| 2451 | 2451 | while (altera_get_note((u8 *)fw->data, fw->size, |
| 2452 | − &offset, key, value, 256) == 0) | |
| 2452 | + &offset, key, value, 32, 256) == 0) | |
| 2453 | 2453 | printk(KERN_INFO "%s: NOTE \"%s\" = \"%s\"\n", |
| 2454 | 2454 | __func__, key, value); |
| 2455 | 2455 | } |
| @@ -24,8 +24,6 @@ static int arm_pmu_acpi_register_irq(int cpu) · 23 unmodified lines | ||
| 24 | 24 | int gsi, trigger; |
| 25 | 25 | |
| 26 | 26 | gicc = acpi_cpu_get_madt_gicc(cpu); |
| 27 | − if (WARN_ON(!gicc)) | |
| 28 | − return -EINVAL; | |
| 29 | 27 | |
| 30 | 28 | gsi = gicc->performance_interrupt; |
| 31 | 29 | |
| @@ -64,11 +62,10 @@ static void arm_pmu_acpi_unregister_irq(int cpu) · 32 unmodified lines | ||
| 64 | 62 | int gsi; |
| 65 | 63 | |
| 66 | 64 | gicc = acpi_cpu_get_madt_gicc(cpu); |
| 67 | − if (!gicc) | |
| 68 | − return; | |
| 69 | 65 | |
| 70 | 66 | gsi = gicc->performance_interrupt; |
| 71 | − acpi_unregister_gsi(gsi); | |
| 67 | + if (gsi) | |
| 68 | + acpi_unregister_gsi(gsi); | |
| 72 | 69 | } |
| 73 | 70 | |
| 74 | 71 | #if IS_ENABLED(CONFIG_ARM_SPE_PMU) |
| @@ -388,9 +388,10 @@ static void ddr_perf_counter_enable(struct ddr_pmu *pmu, int config, · 387 unmodified lines | ||
| 388 | 388 | |
| 389 | 389 | if (enable) { |
| 390 | 390 | /* |
| 391 | − * must disable first, then enable again | |
| 392 | − * otherwise, cycle counter will not work | |
| 393 | − * if previous state is enabled. | |
| 391 | + * cycle counter is special which should firstly write 0 then | |
| 392 | + * write 1 into CLEAR bit to clear it. Other counters only | |
| 393 | + * need write 0 into CLEAR bit and it turns out to be 1 by | |
| 394 | + * hardware. Below enable flow is harmless for all counters. | |
| 394 | 395 | */ |
| 395 | 396 | writel(0, pmu->base + reg); |
| 396 | 397 | val = CNTL_EN | CNTL_CLEAR; |
| @@ -398,7 +399,8 @@ static void ddr_perf_counter_enable(struct ddr_pmu *pmu, int config, · 1 unmodified line | ||
| 398 | 399 | writel(val, pmu->base + reg); |
| 399 | 400 | } else { |
| 400 | 401 | /* Disable counter */ |
| 401 | − writel(0, pmu->base + reg); | |
| 402 | + val = readl_relaxed(pmu->base + reg) & CNTL_EN_MASK; | |
| 403 | + writel(val, pmu->base + reg); | |
| 402 | 404 | } |
| 403 | 405 | } |
| 404 | 406 | |
| @@ -49,7 +49,7 @@ · 48 unmodified lines | ||
| 49 | 49 | #define SUNXI_LOS_BIAS(n) ((n) << 3) |
| 50 | 50 | #define SUNXI_LOS_BIAS_MASK GENMASK(5, 3) |
| 51 | 51 | #define SUNXI_TXVBOOSTLVL(n) ((n) << 0) |
| 52 | −#define SUNXI_TXVBOOSTLVL_MASK GENMASK(0, 2) | |
| 52 | +#define SUNXI_TXVBOOSTLVL_MASK GENMASK(2, 0) | |
| 53 | 53 | |
| 54 | 54 | struct sun50i_usb3_phy { |
| 55 | 55 | struct phy *phy; |
| @@ -186,29 +186,6 @@ enum sata_phy_ctrl_regs { · 185 unmodified lines | ||
| 186 | 186 | PHY_CTRL_1_RESET = BIT(0), |
| 187 | 187 | }; |
| 188 | 188 | |
| 189 | −static inline void __iomem *brcm_sata_pcb_base(struct brcm_sata_port *port) | |
| 190 | −{ | |
| 191 | − struct brcm_sata_phy *priv = port->phy_priv; | |
| 192 | − u32 size = 0; | |
| 193 | − | |
| 194 | − switch (priv->version) { | |
| 195 | − case BRCM_SATA_PHY_STB_16NM: | |
| 196 | − case BRCM_SATA_PHY_STB_28NM: | |
| 197 | − case BRCM_SATA_PHY_IPROC_NS2: | |
| 198 | − case BRCM_SATA_PHY_DSL_28NM: | |
| 199 | − size = SATA_PCB_REG_28NM_SPACE_SIZE; | |
| 200 | − break; | |
| 201 | − case BRCM_SATA_PHY_STB_40NM: | |
| 202 | − size = SATA_PCB_REG_40NM_SPACE_SIZE; | |
| 203 | − break; | |
| 204 | − default: | |
| 205 | − dev_err(priv->dev, "invalid phy version\n"); | |
| 206 | − break; | |
| 207 | − } | |
| 208 | − | |
| 209 | − return priv->phy_base + (port->portnum * size); | |
| 210 | −} | |
| 211 | − | |
| 212 | 189 | static inline void __iomem *brcm_sata_ctrl_base(struct brcm_sata_port *port) |
| 213 | 190 | { |
| 214 | 191 | struct brcm_sata_phy *priv = port->phy_priv; |
| @@ -226,19 +203,34 @@ static inline void __iomem *brcm_sata_ctrl_base(struct brcm_sata_port *port) · 11 unmodified lines | ||
| 226 | 203 | return priv->ctrl_base + (port->portnum * size); |
| 227 | 204 | } |
| 228 | 205 | |
| 229 | −static void brcm_sata_phy_wr(void __iomem *pcb_base, u32 bank, | |
| 206 | +static void brcm_sata_phy_wr(struct brcm_sata_port *port, u32 bank, | |
| 230 | 207 | u32 ofs, u32 msk, u32 value) |
| 231 | 208 | { |
| 209 | + struct brcm_sata_phy *priv = port->phy_priv; | |
| 210 | + void __iomem *pcb_base = priv->phy_base; | |
| 232 | 211 | u32 tmp; |
| 233 | 212 | |
| 213 | + if (priv->version == BRCM_SATA_PHY_STB_40NM) | |
| 214 | + bank += (port->portnum * SATA_PCB_REG_40NM_SPACE_SIZE); | |
| 215 | + else | |
| 216 | + pcb_base += (port->portnum * SATA_PCB_REG_28NM_SPACE_SIZE); | |
| 217 | + | |
| 234 | 218 | writel(bank, pcb_base + SATA_PCB_BANK_OFFSET); |
| 235 | 219 | tmp = readl(pcb_base + SATA_PCB_REG_OFFSET(ofs)); |
| 236 | 220 | tmp = (tmp & msk) | value; |
| 237 | 221 | writel(tmp, pcb_base + SATA_PCB_REG_OFFSET(ofs)); |
| 238 | 222 | } |
| 239 | 223 | |
| 240 | −static u32 brcm_sata_phy_rd(void __iomem *pcb_base, u32 bank, u32 ofs) | |
| 224 | +static u32 brcm_sata_phy_rd(struct brcm_sata_port *port, u32 bank, u32 ofs) | |
| 241 | 225 | { |
| 226 | + struct brcm_sata_phy *priv = port->phy_priv; | |
| 227 | + void __iomem *pcb_base = priv->phy_base; | |
| 228 | + | |
| 229 | + if (priv->version == BRCM_SATA_PHY_STB_40NM) | |
| 230 | + bank += (port->portnum * SATA_PCB_REG_40NM_SPACE_SIZE); | |
| 231 | + else | |
| 232 | + pcb_base += (port->portnum * SATA_PCB_REG_28NM_SPACE_SIZE); | |
| 233 | + | |
| 242 | 234 | writel(bank, pcb_base + SATA_PCB_BANK_OFFSET); |
| 243 | 235 | return readl(pcb_base + SATA_PCB_REG_OFFSET(ofs)); |
| 244 | 236 | } |
| @@ -250,16 +242,15 @@ static u32 brcm_sata_phy_rd(void __iomem *pcb_base, u32 bank, u32 ofs) · 5 unmodified lines | ||
| 250 | 242 | |
| 251 | 243 | static void brcm_stb_sata_ssc_init(struct brcm_sata_port *port) |
| 252 | 244 | { |
| 253 | − void __iomem *base = brcm_sata_pcb_base(port); | |
| 254 | 245 | struct brcm_sata_phy *priv = port->phy_priv; |
| 255 | 246 | u32 tmp; |
| 256 | 247 | |
| 257 | 248 | /* override the TX spread spectrum setting */ |
| 258 | 249 | tmp = TXPMD_CONTROL1_TX_SSC_EN_FRC_VAL | TXPMD_CONTROL1_TX_SSC_EN_FRC; |
| 259 | − brcm_sata_phy_wr(base, TXPMD_REG_BANK, TXPMD_CONTROL1, ~tmp, tmp); | |
| 250 | + brcm_sata_phy_wr(port, TXPMD_REG_BANK, TXPMD_CONTROL1, ~tmp, tmp); | |
| 260 | 251 | |
| 261 | 252 | /* set fixed min freq */ |
| 262 | − brcm_sata_phy_wr(base, TXPMD_REG_BANK, TXPMD_TX_FREQ_CTRL_CONTROL2, | |
| 253 | + brcm_sata_phy_wr(port, TXPMD_REG_BANK, TXPMD_TX_FREQ_CTRL_CONTROL2, | |
| 263 | 254 | ~TXPMD_TX_FREQ_CTRL_CONTROL2_FMIN_MASK, |
| 264 | 255 | STB_FMIN_VAL_DEFAULT); |
| 265 | 256 | |
| @@ -271,7 +262,7 @@ static void brcm_stb_sata_ssc_init(struct brcm_sata_port *port) · 5 unmodified lines | ||
| 271 | 262 | tmp = STB_FMAX_VAL_DEFAULT; |
| 272 | 263 | } |
| 273 | 264 | |
| 274 | − brcm_sata_phy_wr(base, TXPMD_REG_BANK, TXPMD_TX_FREQ_CTRL_CONTROL3, | |
| 265 | + brcm_sata_phy_wr(port, TXPMD_REG_BANK, TXPMD_TX_FREQ_CTRL_CONTROL3, | |
| 275 | 266 | ~TXPMD_TX_FREQ_CTRL_CONTROL3_FMAX_MASK, tmp); |
| 276 | 267 | } |
| 277 | 268 | |
| @@ -280,7 +271,6 @@ static void brcm_stb_sata_ssc_init(struct brcm_sata_port *port) · 2 unmodified lines | ||
| 280 | 271 | |
| 281 | 272 | static int brcm_stb_sata_rxaeq_init(struct brcm_sata_port *port) |
| 282 | 273 | { |
| 283 | − void __iomem *base = brcm_sata_pcb_base(port); | |
| 284 | 274 | u32 tmp = 0, reg = 0; |
| 285 | 275 | |
| 286 | 276 | switch (port->rxaeq_mode) { |
| @@ -301,8 +291,8 @@ static int brcm_stb_sata_rxaeq_init(struct brcm_sata_port *port) · 14 unmodified lines | ||
| 301 | 291 | break; |
| 302 | 292 | } |
| 303 | 293 | |
| 304 | − brcm_sata_phy_wr(base, AEQRX_REG_BANK_0, reg, ~tmp, tmp); | |
| 305 | − brcm_sata_phy_wr(base, AEQRX_REG_BANK_1, reg, ~tmp, tmp); | |
| 294 | + brcm_sata_phy_wr(port, AEQRX_REG_BANK_0, reg, ~tmp, tmp); | |
| 295 | + brcm_sata_phy_wr(port, AEQRX_REG_BANK_1, reg, ~tmp, tmp); | |
| 306 | 296 | |
| 307 | 297 | return 0; |
| 308 | 298 | } |
| @@ -316,18 +306,17 @@ static int brcm_stb_sata_init(struct brcm_sata_port *port) · 7 unmodified lines | ||
| 316 | 306 | |
| 317 | 307 | static int brcm_stb_sata_16nm_ssc_init(struct brcm_sata_port *port) |
| 318 | 308 | { |
| 319 | − void __iomem *base = brcm_sata_pcb_base(port); | |
| 320 | 309 | u32 tmp, value; |
| 321 | 310 | |
| 322 | 311 | /* Reduce CP tail current to 1/16th of its default value */ |
| 323 | − brcm_sata_phy_wr(base, PLL1_REG_BANK, PLL1_ACTRL6, 0, 0x141); | |
| 312 | + brcm_sata_phy_wr(port, PLL1_REG_BANK, PLL1_ACTRL6, 0, 0x141); | |
| 324 | 313 | |
| 325 | 314 | /* Turn off CP tail current boost */ |
| 326 | − brcm_sata_phy_wr(base, PLL1_REG_BANK, PLL1_ACTRL8, 0, 0xc006); | |
| 315 | + brcm_sata_phy_wr(port, PLL1_REG_BANK, PLL1_ACTRL8, 0, 0xc006); | |
| 327 | 316 | |
| 328 | 317 | /* Set a specific AEQ equalizer value */ |
| 329 | 318 | tmp = AEQ_FRC_EQ_FORCE_VAL | AEQ_FRC_EQ_FORCE; |
| 330 | − brcm_sata_phy_wr(base, AEQRX_REG_BANK_0, AEQ_FRC_EQ, | |
| 319 | + brcm_sata_phy_wr(port, AEQRX_REG_BANK_0, AEQ_FRC_EQ, | |
| 331 | 320 | ~(tmp | AEQ_RFZ_FRC_VAL | |
| 332 | 321 | AEQ_FRC_EQ_VAL_MASK << AEQ_FRC_EQ_VAL_SHIFT), |
| 333 | 322 | tmp | 32 << AEQ_FRC_EQ_VAL_SHIFT); |
| @@ -337,7 +326,7 @@ static int brcm_stb_sata_16nm_ssc_init(struct brcm_sata_port *port) · 3 unmodified lines | ||
| 337 | 326 | value = 0x52; |
| 338 | 327 | else |
| 339 | 328 | value = 0; |
| 340 | − brcm_sata_phy_wr(base, RXPMD_REG_BANK, RXPMD_RX_CDR_CONTROL1, | |
| 329 | + brcm_sata_phy_wr(port, RXPMD_REG_BANK, RXPMD_RX_CDR_CONTROL1, | |
| 341 | 330 | ~RXPMD_RX_PPM_VAL_MASK, value); |
| 342 | 331 | |
| 343 | 332 | /* Set proportional loop bandwith Gen1/2/3 */ |
| @@ -352,7 +341,7 @@ static int brcm_stb_sata_16nm_ssc_init(struct brcm_sata_port *port) · 8 unmodified lines | ||
| 352 | 341 | value = 1 << RXPMD_G1_CDR_PROP_BW_SHIFT | |
| 353 | 342 | 1 << RXPMD_G2_CDR_PROP_BW_SHIFT | |
| 354 | 343 | 1 << RXPMD_G3_CDR_PROB_BW_SHIFT; |
| 355 | − brcm_sata_phy_wr(base, RXPMD_REG_BANK, RXPMD_RX_CDR_CDR_PROP_BW, ~tmp, | |
| 344 | + brcm_sata_phy_wr(port, RXPMD_REG_BANK, RXPMD_RX_CDR_CDR_PROP_BW, ~tmp, | |
| 356 | 345 | value); |
| 357 | 346 | |
| 358 | 347 | /* Set CDR integral loop acquisition bandwidth for Gen1/2/3 */ |
| @@ -365,7 +354,7 @@ static int brcm_stb_sata_16nm_ssc_init(struct brcm_sata_port *port) · 6 unmodified lines | ||
| 365 | 354 | 1 << RXPMD_G3_CDR_ACQ_INT_BW_SHIFT; |
| 366 | 355 | else |
| 367 | 356 | value = 0; |
| 368 | − brcm_sata_phy_wr(base, RXPMD_REG_BANK, RXPMD_RX_CDR_CDR_ACQ_INTEG_BW, | |
| 357 | + brcm_sata_phy_wr(port, RXPMD_REG_BANK, RXPMD_RX_CDR_CDR_ACQ_INTEG_BW, | |
| 369 | 358 | ~tmp, value); |
| 370 | 359 | |
| 371 | 360 | /* Set CDR integral loop locking bandwidth to 1 for Gen 1/2/3 */ |
| @@ -378,7 +367,7 @@ static int brcm_stb_sata_16nm_ssc_init(struct brcm_sata_port *port) · 6 unmodified lines | ||
| 378 | 367 | 1 << RXPMD_G3_CDR_LOCK_INT_BW_SHIFT; |
| 379 | 368 | else |
| 380 | 369 | value = 0; |
| 381 | − brcm_sata_phy_wr(base, RXPMD_REG_BANK, RXPMD_RX_CDR_CDR_LOCK_INTEG_BW, | |
| 370 | + brcm_sata_phy_wr(port, RXPMD_REG_BANK, RXPMD_RX_CDR_CDR_LOCK_INTEG_BW, | |
| 382 | 371 | ~tmp, value); |
| 383 | 372 | |
| 384 | 373 | /* Set no guard band and clamp CDR */ |
| @@ -387,11 +376,11 @@ static int brcm_stb_sata_16nm_ssc_init(struct brcm_sata_port *port) · 2 unmodified lines | ||
| 387 | 376 | value = 0x51; |
| 388 | 377 | else |
| 389 | 378 | value = 0; |
| 390 | − brcm_sata_phy_wr(base, RXPMD_REG_BANK, RXPMD_RX_FREQ_MON_CONTROL1, | |
| 379 | + brcm_sata_phy_wr(port, RXPMD_REG_BANK, RXPMD_RX_FREQ_MON_CONTROL1, | |
| 391 | 380 | ~tmp, RXPMD_MON_CORRECT_EN | value); |
| 392 | 381 | |
| 393 | 382 | /* Turn on/off SSC */ |
| 394 | − brcm_sata_phy_wr(base, TX_REG_BANK, TX_ACTRL5, ~TX_ACTRL5_SSC_EN, | |
| 383 | + brcm_sata_phy_wr(port, TX_REG_BANK, TX_ACTRL5, ~TX_ACTRL5_SSC_EN, | |
| 395 | 384 | port->ssc_en ? TX_ACTRL5_SSC_EN : 0); |
| 396 | 385 | |
| 397 | 386 | return 0; |
| @@ -411,7 +400,6 @@ static int brcm_ns2_sata_init(struct brcm_sata_port *port) · 13 unmodified lines | ||
| 411 | 400 | { |
| 412 | 401 | int try; |
| 413 | 402 | unsigned int val; |
| 414 | − void __iomem *base = brcm_sata_pcb_base(port); | |
| 415 | 403 | void __iomem *ctrl_base = brcm_sata_ctrl_base(port); |
| 416 | 404 | struct device *dev = port->phy_priv->dev; |
| 417 | 405 | |
| @@ -421,24 +409,24 @@ static int brcm_ns2_sata_init(struct brcm_sata_port *port) · 3 unmodified lines | ||
| 421 | 409 | val |= (0x4 << OOB_CTRL1_BURST_MIN_SHIFT); |
| 422 | 410 | val |= (0x9 << OOB_CTRL1_WAKE_IDLE_MAX_SHIFT); |
| 423 | 411 | val |= (0x3 << OOB_CTRL1_WAKE_IDLE_MIN_SHIFT); |
| 424 | − brcm_sata_phy_wr(base, OOB_REG_BANK, OOB_CTRL1, 0x0, val); | |
| 412 | + brcm_sata_phy_wr(port, OOB_REG_BANK, OOB_CTRL1, 0x0, val); | |
| 425 | 413 | val = 0x0; |
| 426 | 414 | val |= (0x1b << OOB_CTRL2_RESET_IDLE_MAX_SHIFT); |
| 427 | 415 | val |= (0x2 << OOB_CTRL2_BURST_CNT_SHIFT); |
| 428 | 416 | val |= (0x9 << OOB_CTRL2_RESET_IDLE_MIN_SHIFT); |
| 429 | − brcm_sata_phy_wr(base, OOB_REG_BANK, OOB_CTRL2, 0x0, val); | |
| 417 | + brcm_sata_phy_wr(port, OOB_REG_BANK, OOB_CTRL2, 0x0, val); | |
| 430 | 418 | |
| 431 | 419 | /* Configure PHY PLL register bank 1 */ |
| 432 | 420 | val = NS2_PLL1_ACTRL2_MAGIC; |
| 433 | − brcm_sata_phy_wr(base, PLL1_REG_BANK, PLL1_ACTRL2, 0x0, val); | |
| 421 | + brcm_sata_phy_wr(port, PLL1_REG_BANK, PLL1_ACTRL2, 0x0, val); | |
| 434 | 422 | val = NS2_PLL1_ACTRL3_MAGIC; |
| 435 | − brcm_sata_phy_wr(base, PLL1_REG_BANK, PLL1_ACTRL3, 0x0, val); | |
| 423 | + brcm_sata_phy_wr(port, PLL1_REG_BANK, PLL1_ACTRL3, 0x0, val); | |
| 436 | 424 | val = NS2_PLL1_ACTRL4_MAGIC; |
| 437 | − brcm_sata_phy_wr(base, PLL1_REG_BANK, PLL1_ACTRL4, 0x0, val); | |
| 425 | + brcm_sata_phy_wr(port, PLL1_REG_BANK, PLL1_ACTRL4, 0x0, val); | |
| 438 | 426 | |
| 439 | 427 | /* Configure PHY BLOCK0 register bank */ |
| 440 | 428 | /* Set oob_clk_sel to refclk/2 */ |
| 441 | − brcm_sata_phy_wr(base, BLOCK0_REG_BANK, BLOCK0_SPARE, | |
| 429 | + brcm_sata_phy_wr(port, BLOCK0_REG_BANK, BLOCK0_SPARE, | |
| 442 | 430 | ~BLOCK0_SPARE_OOB_CLK_SEL_MASK, |
| 443 | 431 | BLOCK0_SPARE_OOB_CLK_SEL_REFBY2); |
| 444 | 432 | |
| @@ -451,7 +439,7 @@ static int brcm_ns2_sata_init(struct brcm_sata_port *port) · 6 unmodified lines | ||
| 451 | 439 | /* Wait for PHY PLL lock by polling pll_lock bit */ |
| 452 | 440 | try = 50; |
| 453 | 441 | while (try) { |
| 454 | − val = brcm_sata_phy_rd(base, BLOCK0_REG_BANK, | |
| 442 | + val = brcm_sata_phy_rd(port, BLOCK0_REG_BANK, | |
| 455 | 443 | BLOCK0_XGXSSTATUS); |
| 456 | 444 | if (val & BLOCK0_XGXSSTATUS_PLL_LOCK) |
| 457 | 445 | break; |
| @@ -471,9 +459,7 @@ static int brcm_ns2_sata_init(struct brcm_sata_port *port) · 13 unmodified lines | ||
| 471 | 459 | |
| 472 | 460 | static int brcm_nsp_sata_init(struct brcm_sata_port *port) |
| 473 | 461 | { |
| 474 | − struct brcm_sata_phy *priv = port->phy_priv; | |
| 475 | 462 | struct device *dev = port->phy_priv->dev; |
| 476 | − void __iomem *base = priv->phy_base; | |
| 477 | 463 | unsigned int oob_bank; |
| 478 | 464 | unsigned int val, try; |
| 479 | 465 | |
| @@ -490,36 +476,36 @@ static int brcm_nsp_sata_init(struct brcm_sata_port *port) · 10 unmodified lines | ||
| 490 | 476 | val |= (0x06 << OOB_CTRL1_BURST_MIN_SHIFT); |
| 491 | 477 | val |= (0x0f << OOB_CTRL1_WAKE_IDLE_MAX_SHIFT); |
| 492 | 478 | val |= (0x06 << OOB_CTRL1_WAKE_IDLE_MIN_SHIFT); |
| 493 | − brcm_sata_phy_wr(base, oob_bank, OOB_CTRL1, 0x0, val); | |
| 479 | + brcm_sata_phy_wr(port, oob_bank, OOB_CTRL1, 0x0, val); | |
| 494 | 480 | |
| 495 | 481 | val = 0x0; |
| 496 | 482 | val |= (0x2e << OOB_CTRL2_RESET_IDLE_MAX_SHIFT); |
| 497 | 483 | val |= (0x02 << OOB_CTRL2_BURST_CNT_SHIFT); |
| 498 | 484 | val |= (0x16 << OOB_CTRL2_RESET_IDLE_MIN_SHIFT); |
| 499 | − brcm_sata_phy_wr(base, oob_bank, OOB_CTRL2, 0x0, val); | |
| 485 | + brcm_sata_phy_wr(port, oob_bank, OOB_CTRL2, 0x0, val); | |
| 500 | 486 | |
| 501 | 487 | |
| 502 | − brcm_sata_phy_wr(base, PLL_REG_BANK_0, PLL_ACTRL2, | |
| 488 | + brcm_sata_phy_wr(port, PLL_REG_BANK_0, PLL_ACTRL2, | |
| 503 | 489 | ~(PLL_ACTRL2_SELDIV_MASK << PLL_ACTRL2_SELDIV_SHIFT), |
| 504 | 490 | 0x0c << PLL_ACTRL2_SELDIV_SHIFT); |
| 505 | 491 | |
| 506 | − brcm_sata_phy_wr(base, PLL_REG_BANK_0, PLL_CAP_CONTROL, | |
| 492 | + brcm_sata_phy_wr(port, PLL_REG_BANK_0, PLL_CAP_CONTROL, | |
| 507 | 493 | 0xff0, 0x4f0); |
| 508 | 494 | |
| 509 | 495 | val = PLLCONTROL_0_FREQ_DET_RESTART | PLLCONTROL_0_FREQ_MONITOR; |
| 510 | − brcm_sata_phy_wr(base, PLL_REG_BANK_0, PLL_REG_BANK_0_PLLCONTROL_0, | |
| 496 | + brcm_sata_phy_wr(port, PLL_REG_BANK_0, PLL_REG_BANK_0_PLLCONTROL_0, | |
| 511 | 497 | ~val, val); |
| 512 | 498 | val = PLLCONTROL_0_SEQ_START; |
| 513 | − brcm_sata_phy_wr(base, PLL_REG_BANK_0, PLL_REG_BANK_0_PLLCONTROL_0, | |
| 499 | + brcm_sata_phy_wr(port, PLL_REG_BANK_0, PLL_REG_BANK_0_PLLCONTROL_0, | |
| 514 | 500 | ~val, 0); |
| 515 | 501 | mdelay(10); |
| 516 | − brcm_sata_phy_wr(base, PLL_REG_BANK_0, PLL_REG_BANK_0_PLLCONTROL_0, | |
| 502 | + brcm_sata_phy_wr(port, PLL_REG_BANK_0, PLL_REG_BANK_0_PLLCONTROL_0, | |
| 517 | 503 | ~val, val); |
| 518 | 504 | |
| 519 | 505 | /* Wait for pll_seq_done bit */ |
| 520 | 506 | try = 50; |
| 521 | 507 | while (--try) { |
| 522 | − val = brcm_sata_phy_rd(base, BLOCK0_REG_BANK, | |
| 508 | + val = brcm_sata_phy_rd(port, BLOCK0_REG_BANK, | |
| 523 | 509 | BLOCK0_XGXSSTATUS); |
| 524 | 510 | if (val & BLOCK0_XGXSSTATUS_PLL_LOCK) |
| 525 | 511 | break; |
| @@ -546,27 +532,25 @@ static int brcm_nsp_sata_init(struct brcm_sata_port *port) · 20 unmodified lines | ||
| 546 | 532 | |
| 547 | 533 | static int brcm_sr_sata_init(struct brcm_sata_port *port) |
| 548 | 534 | { |
| 549 | − struct brcm_sata_phy *priv = port->phy_priv; | |
| 550 | 535 | struct device *dev = port->phy_priv->dev; |
| 551 | − void __iomem *base = priv->phy_base; | |
| 552 | 536 | unsigned int val, try; |
| 553 | 537 | |
| 554 | 538 | /* Configure PHY PLL register bank 1 */ |
| 555 | 539 | val = SR_PLL1_ACTRL2_MAGIC; |
| 556 | − brcm_sata_phy_wr(base, PLL1_REG_BANK, PLL1_ACTRL2, 0x0, val); | |
| 540 | + brcm_sata_phy_wr(port, PLL1_REG_BANK, PLL1_ACTRL2, 0x0, val); | |
| 557 | 541 | val = SR_PLL1_ACTRL3_MAGIC; |
| 558 | − brcm_sata_phy_wr(base, PLL1_REG_BANK, PLL1_ACTRL3, 0x0, val); | |
| 542 | + brcm_sata_phy_wr(port, PLL1_REG_BANK, PLL1_ACTRL3, 0x0, val); | |
| 559 | 543 | val = SR_PLL1_ACTRL4_MAGIC; |
| 560 | − brcm_sata_phy_wr(base, PLL1_REG_BANK, PLL1_ACTRL4, 0x0, val); | |
| 544 | + brcm_sata_phy_wr(port, PLL1_REG_BANK, PLL1_ACTRL4, 0x0, val); | |
| 561 | 545 | |
| 562 | 546 | /* Configure PHY PLL register bank 0 */ |
| 563 | 547 | val = SR_PLL0_ACTRL6_MAGIC; |
| 564 | − brcm_sata_phy_wr(base, PLL_REG_BANK_0, PLL_ACTRL6, 0x0, val); | |
| 548 | + brcm_sata_phy_wr(port, PLL_REG_BANK_0, PLL_ACTRL6, 0x0, val); | |
| 565 | 549 | |
| 566 | 550 | /* Wait for PHY PLL lock by polling pll_lock bit */ |
| 567 | 551 | try = 50; |
| 568 | 552 | do { |
| 569 | − val = brcm_sata_phy_rd(base, BLOCK0_REG_BANK, | |
| 553 | + val = brcm_sata_phy_rd(port, BLOCK0_REG_BANK, | |
| 570 | 554 | BLOCK0_XGXSSTATUS); |
| 571 | 555 | if (val & BLOCK0_XGXSSTATUS_PLL_LOCK) |
| 572 | 556 | break; |
| @@ -581,7 +565,7 @@ static int brcm_sr_sata_init(struct brcm_sata_port *port) · 8 unmodified lines | ||
| 581 | 565 | } |
| 582 | 566 | |
| 583 | 567 | /* Invert Tx polarity */ |
| 584 | − brcm_sata_phy_wr(base, TX_REG_BANK, TX_ACTRL0, | |
| 568 | + brcm_sata_phy_wr(port, TX_REG_BANK, TX_ACTRL0, | |
| 585 | 569 | ~TX_ACTRL0_TXPOL_FLIP, TX_ACTRL0_TXPOL_FLIP); |
| 586 | 570 | |
| 587 | 571 | /* Configure OOB control to handle 100MHz reference clock */ |
| @@ -589,52 +573,51 @@ static int brcm_sr_sata_init(struct brcm_sata_port *port) · 1 unmodified line | ||
| 589 | 573 | (0x4 << OOB_CTRL1_BURST_MIN_SHIFT) | |
| 590 | 574 | (0x8 << OOB_CTRL1_WAKE_IDLE_MAX_SHIFT) | |
| 591 | 575 | (0x3 << OOB_CTRL1_WAKE_IDLE_MIN_SHIFT)); |
| 592 | − brcm_sata_phy_wr(base, OOB_REG_BANK, OOB_CTRL1, 0x0, val); | |
| 576 | + brcm_sata_phy_wr(port, OOB_REG_BANK, OOB_CTRL1, 0x0, val); | |
| 593 | 577 | val = ((0x1b << OOB_CTRL2_RESET_IDLE_MAX_SHIFT) | |
| 594 | 578 | (0x2 << OOB_CTRL2_BURST_CNT_SHIFT) | |
| 595 | 579 | (0x9 << OOB_CTRL2_RESET_IDLE_MIN_SHIFT)); |
| 596 | − brcm_sata_phy_wr(base, OOB_REG_BANK, OOB_CTRL2, 0x0, val); | |
| 580 | + brcm_sata_phy_wr(port, OOB_REG_BANK, OOB_CTRL2, 0x0, val); | |
| 597 | 581 | |
| 598 | 582 | return 0; |
| 599 | 583 | } |
| 600 | 584 | |
| 601 | 585 | static int brcm_dsl_sata_init(struct brcm_sata_port *port) |
| 602 | 586 | { |
| 603 | − void __iomem *base = brcm_sata_pcb_base(port); | |
| 604 | 587 | struct device *dev = port->phy_priv->dev; |
| 605 | 588 | unsigned int try; |
| 606 | 589 | u32 tmp; |
| 607 | 590 | |
| 608 | − brcm_sata_phy_wr(base, PLL1_REG_BANK, PLL1_ACTRL7, 0, 0x873); | |
| 591 | + brcm_sata_phy_wr(port, PLL1_REG_BANK, PLL1_ACTRL7, 0, 0x873); | |
| 609 | 592 | |
| 610 | − brcm_sata_phy_wr(base, PLL1_REG_BANK, PLL1_ACTRL6, 0, 0xc000); | |
| 593 | + brcm_sata_phy_wr(port, PLL1_REG_BANK, PLL1_ACTRL6, 0, 0xc000); | |
| 611 | 594 | |
| 612 | − brcm_sata_phy_wr(base, PLL_REG_BANK_0, PLL_REG_BANK_0_PLLCONTROL_0, | |
| 595 | + brcm_sata_phy_wr(port, PLL_REG_BANK_0, PLL_REG_BANK_0_PLLCONTROL_0, | |
| 613 | 596 | 0, 0x3089); |
| 614 | 597 | usleep_range(1000, 2000); |
| 615 | 598 | |
| 616 | − brcm_sata_phy_wr(base, PLL_REG_BANK_0, PLL_REG_BANK_0_PLLCONTROL_0, | |
| 599 | + brcm_sata_phy_wr(port, PLL_REG_BANK_0, PLL_REG_BANK_0_PLLCONTROL_0, | |
| 617 | 600 | 0, 0x3088); |
| 618 | 601 | usleep_range(1000, 2000); |
| 619 | 602 | |
| 620 | − brcm_sata_phy_wr(base, AEQRX_REG_BANK_1, AEQRX_SLCAL0_CTRL0, | |
| 603 | + brcm_sata_phy_wr(port, AEQRX_REG_BANK_1, AEQRX_SLCAL0_CTRL0, | |
| 621 | 604 | 0, 0x3000); |
| 622 | 605 | |
| 623 | − brcm_sata_phy_wr(base, AEQRX_REG_BANK_1, AEQRX_SLCAL1_CTRL0, | |
| 606 | + brcm_sata_phy_wr(port, AEQRX_REG_BANK_1, AEQRX_SLCAL1_CTRL0, | |
| 624 | 607 | 0, 0x3000); |
| 625 | 608 | usleep_range(1000, 2000); |
| 626 | 609 | |
| 627 | − brcm_sata_phy_wr(base, PLL_REG_BANK_0, PLL_CAP_CHARGE_TIME, 0, 0x32); | |
| 610 | + brcm_sata_phy_wr(port, PLL_REG_BANK_0, PLL_CAP_CHARGE_TIME, 0, 0x32); | |
| 628 | 611 | |
| 629 | − brcm_sata_phy_wr(base, PLL_REG_BANK_0, PLL_VCO_CAL_THRESH, 0, 0xa); | |
| 612 | + brcm_sata_phy_wr(port, PLL_REG_BANK_0, PLL_VCO_CAL_THRESH, 0, 0xa); | |
| 630 | 613 | |
| 631 | − brcm_sata_phy_wr(base, PLL_REG_BANK_0, PLL_FREQ_DET_TIME, 0, 0x64); | |
| 614 | + brcm_sata_phy_wr(port, PLL_REG_BANK_0, PLL_FREQ_DET_TIME, 0, 0x64); | |
| 632 | 615 | usleep_range(1000, 2000); |
| 633 | 616 | |
| 634 | 617 | /* Acquire PLL lock */ |
| 635 | 618 | try = 50; |
| 636 | 619 | while (try) { |
| 637 | − tmp = brcm_sata_phy_rd(base, BLOCK0_REG_BANK, | |
| 620 | + tmp = brcm_sata_phy_rd(port, BLOCK0_REG_BANK, | |
| 638 | 621 | BLOCK0_XGXSSTATUS); |
| 639 | 622 | if (tmp & BLOCK0_XGXSSTATUS_PLL_LOCK) |
| 640 | 623 | break; |
| @@ -687,10 +670,9 @@ static int brcm_sata_phy_init(struct phy *phy) · 46 unmodified lines | ||
| 687 | 670 | |
| 688 | 671 | static void brcm_stb_sata_calibrate(struct brcm_sata_port *port) |
| 689 | 672 | { |
| 690 | − void __iomem *base = brcm_sata_pcb_base(port); | |
| 691 | 673 | u32 tmp = BIT(8); |
| 692 | 674 | |
| 693 | − brcm_sata_phy_wr(base, RXPMD_REG_BANK, RXPMD_RX_FREQ_MON_CONTROL1, | |
| 675 | + brcm_sata_phy_wr(port, RXPMD_REG_BANK, RXPMD_RX_FREQ_MON_CONTROL1, | |
| 694 | 676 | ~tmp, tmp); |
| 695 | 677 | } |
| 696 | 678 | |
| @@ -20,6 +20,7 @@ · 19 unmodified lines | ||
| 20 | 20 | |
| 21 | 21 | #define PHY_MDM6600_PHY_DELAY_MS 4000 /* PHY enable 2.2s to 3.5s */ |
| 22 | 22 | #define PHY_MDM6600_ENABLED_DELAY_MS 8000 /* 8s more total for MDM6600 */ |
| 23 | +#define PHY_MDM6600_WAKE_KICK_MS 600 /* time on after GPIO toggle */ | |
| 23 | 24 | #define MDM6600_MODEM_IDLE_DELAY_MS 1000 /* modem after USB suspend */ |
| 24 | 25 | #define MDM6600_MODEM_WAKE_DELAY_MS 200 /* modem response after idle */ |
| 25 | 26 | |
| @@ -243,10 +244,24 @@ static irqreturn_t phy_mdm6600_wakeirq_thread(int irq, void *data) · 217 unmodified lines | ||
| 243 | 244 | { |
| 244 | 245 | struct phy_mdm6600 *ddata = data; |
| 245 | 246 | struct gpio_desc *mode_gpio1; |
| 247 | + int error, wakeup; | |
| 246 | 248 | |
| 247 | 249 | mode_gpio1 = ddata->mode_gpios->desc[PHY_MDM6600_MODE1]; |
| 248 | − dev_dbg(ddata->dev, "OOB wake on mode_gpio1: %i\n", | |
| 249 | − gpiod_get_value(mode_gpio1)); | |
| 250 | + wakeup = gpiod_get_value(mode_gpio1); | |
| 251 | + if (!wakeup) | |
| 252 | + return IRQ_NONE; | |
| 253 | + | |
| 254 | + dev_dbg(ddata->dev, "OOB wake on mode_gpio1: %i\n", wakeup); | |
| 255 | + error = pm_runtime_get_sync(ddata->dev); | |
| 256 | + if (error < 0) { | |
| 257 | + pm_runtime_put_noidle(ddata->dev); | |
| 258 | + | |
| 259 | + return IRQ_NONE; | |
| 260 | + } | |
| 261 | + | |
| 262 | + /* Just wake-up and kick the autosuspend timer */ | |
| 263 | + pm_runtime_mark_last_busy(ddata->dev); | |
| 264 | + pm_runtime_put_autosuspend(ddata->dev); | |
| 250 | 265 | |
| 251 | 266 | return IRQ_HANDLED; |
| 252 | 267 | } |
| @@ -496,8 +511,14 @@ static void phy_mdm6600_modem_wake(struct work_struct *work) · 243 unmodified lines | ||
| 496 | 511 | |
| 497 | 512 | ddata = container_of(work, struct phy_mdm6600, modem_wake_work.work); |
| 498 | 513 | phy_mdm6600_wake_modem(ddata); |
| 514 | + | |
| 515 | + /* | |
| 516 | + * The modem does not always stay awake 1.2 seconds after toggling | |
| 517 | + * the wake GPIO, and sometimes it idles after about some 600 ms | |
| 518 | + * making writes time out. | |
| 519 | + */ | |
| 499 | 520 | schedule_delayed_work(&ddata->modem_wake_work, |
| 500 | − msecs_to_jiffies(MDM6600_MODEM_IDLE_DELAY_MS)); | |
| 521 | + msecs_to_jiffies(PHY_MDM6600_WAKE_KICK_MS)); | |
| 501 | 522 | } |
| 502 | 523 | |
| 503 | 524 | static int __maybe_unused phy_mdm6600_runtime_suspend(struct device *dev) |
| @@ -688,11 +688,9 @@ struct phy *phy_get(struct device *dev, const char *string) · 687 unmodified lines | ||
| 688 | 688 | get_device(&phy->dev); |
| 689 | 689 | |
| 690 | 690 | link = device_link_add(dev, &phy->dev, DL_FLAG_STATELESS); |
| 691 | − if (!link) { | |
| 692 | − dev_err(dev, "failed to create device link to %s\n", | |
| 691 | + if (!link) | |
| 692 | + dev_dbg(dev, "failed to create device link to %s\n", | |
| 693 | 693 | dev_name(phy->dev.parent)); |
| 694 | − return ERR_PTR(-EINVAL); | |
| 695 | − } | |
| 696 | 694 | |
| 697 | 695 | return phy; |
| 698 | 696 | } |
| @@ -803,11 +801,9 @@ struct phy *devm_of_phy_get(struct device *dev, struct device_node *np, · 104 unmodified lines | ||
| 803 | 801 | } |
| 804 | 802 | |
| 805 | 803 | link = device_link_add(dev, &phy->dev, DL_FLAG_STATELESS); |
| 806 | − if (!link) { | |
| 807 | − dev_err(dev, "failed to create device link to %s\n", | |
| 804 | + if (!link) | |
| 805 | + dev_dbg(dev, "failed to create device link to %s\n", | |
| 808 | 806 | dev_name(phy->dev.parent)); |
| 809 | − return ERR_PTR(-EINVAL); | |
| 810 | − } | |
| 811 | 807 | |
| 812 | 808 | return phy; |
| 813 | 809 | } |
| @@ -852,11 +848,9 @@ struct phy *devm_of_phy_get_by_index(struct device *dev, struct device_node *np, · 38 unmodified lines | ||
| 852 | 848 | devres_add(dev, ptr); |
| 853 | 849 | |
| 854 | 850 | link = device_link_add(dev, &phy->dev, DL_FLAG_STATELESS); |
| 855 | − if (!link) { | |
| 856 | − dev_err(dev, "failed to create device link to %s\n", | |
| 851 | + if (!link) | |
| 852 | + dev_dbg(dev, "failed to create device link to %s\n", | |
| 857 | 853 | dev_name(phy->dev.parent)); |
| 858 | − return ERR_PTR(-EINVAL); | |
| 859 | − } | |
| 860 | 854 | |
| 861 | 855 | return phy; |
| 862 | 856 | } |
| @@ -80,20 +80,20 @@ static int phy_gmii_sel_mode(struct phy *phy, enum phy_mode mode, int submode) · 79 unmodified lines | ||
| 80 | 80 | break; |
| 81 | 81 | |
| 82 | 82 | case PHY_INTERFACE_MODE_MII: |
| 83 | − mode = AM33XX_GMII_SEL_MODE_MII; | |
| 83 | + case PHY_INTERFACE_MODE_GMII: | |
| 84 | + gmii_sel_mode = AM33XX_GMII_SEL_MODE_MII; | |
| 84 | 85 | break; |
| 85 | 86 | |
| 86 | 87 | default: |
| 87 | − dev_warn(dev, | |
| 88 | − "port%u: unsupported mode: \"%s\". Defaulting to MII.\n", | |
| 89 | − if_phy->id, phy_modes(rgmii_id)); | |
| 88 | + dev_warn(dev, "port%u: unsupported mode: \"%s\"\n", | |
| 89 | + if_phy->id, phy_modes(submode)); | |
| 90 | 90 | return -EINVAL; |
| 91 | 91 | } |
| 92 | 92 | |
| 93 | 93 | if_phy->phy_if_mode = submode; |
| 94 | 94 | |
| 95 | 95 | dev_dbg(dev, "%s id:%u mode:%u rgmii_id:%d rmii_clk_ext:%d\n", |
| 96 | − __func__, if_phy->id, mode, rgmii_id, | |
| 96 | + __func__, if_phy->id, submode, rgmii_id, | |
| 97 | 97 | if_phy->rmii_clock_external); |
| 98 | 98 | |
| 99 | 99 | regfield = if_phy->fields[PHY_GMII_SEL_PORT_MODE]; |
| @@ -88,7 +88,7 @@ static int stm32_vrefbuf_disable(struct regulator_dev *rdev) · 87 unmodified lines | ||
| 88 | 88 | } |
| 89 | 89 | |
| 90 | 90 | val = readl_relaxed(priv->base + STM32_VREFBUF_CSR); |
| 91 | − val = (val & ~STM32_ENVR) | STM32_HIZ; | |
| 91 | + val &= ~STM32_ENVR; | |
| 92 | 92 | writel_relaxed(val, priv->base + STM32_VREFBUF_CSR); |
| 93 | 93 | |
| 94 | 94 | pm_runtime_mark_last_busy(priv->dev); |
| @@ -175,6 +175,7 @@ static const struct regulator_desc stm32_vrefbuf_regu = { · 80 unmodified lines | ||
| 175 | 175 | .volt_table = stm32_vrefbuf_voltages, |
| 176 | 176 | .n_voltages = ARRAY_SIZE(stm32_vrefbuf_voltages), |
| 177 | 177 | .ops = &stm32_vrefbuf_volt_ops, |
| 178 | + .off_on_delay = 1000, | |
| 178 | 179 | .type = REGULATOR_VOLTAGE, |
| 179 | 180 | .owner = THIS_MODULE, |
| 180 | 181 | }; |
| @@ -51,6 +51,7 @@ config RESET_BRCMSTB · 50 unmodified lines | ||
| 51 | 51 | |
| 52 | 52 | config RESET_BRCMSTB_RESCAL |
| 53 | 53 | bool "Broadcom STB RESCAL reset controller" |
| 54 | + depends on HAS_IOMEM | |
| 54 | 55 | default ARCH_BRCMSTB || COMPILE_TEST |
| 55 | 56 | help |
| 56 | 57 | This enables the RESCAL reset controller for SATA, PCIe0, or PCIe1 on |
| @@ -73,7 +74,7 @@ config RESET_IMX7 · 16 unmodified lines | ||
| 73 | 74 | |
| 74 | 75 | config RESET_INTEL_GW |
| 75 | 76 | bool "Intel Reset Controller Driver" |
| 76 | − depends on OF | |
| 77 | + depends on OF && HAS_IOMEM | |
| 77 | 78 | select REGMAP_MMIO |
| 78 | 79 | help |
| 79 | 80 | This enables the reset controller driver for Intel Gateway SoCs. |
| @@ -25,7 +25,7 @@ struct imx_sc_msg_misc_get_soc_id { · 24 unmodified lines | ||
| 25 | 25 | u32 id; |
| 26 | 26 | } resp; |
| 27 | 27 | } data; |
| 28 | −} __packed; | |
| 28 | +} __packed __aligned(4); | |
| 29 | 29 | |
| 30 | 30 | struct imx_sc_msg_misc_get_soc_uid { |
| 31 | 31 | struct imx_sc_rpc_msg hdr; |
| @@ -149,6 +149,7 @@ struct atmel_qspi { · 148 unmodified lines | ||
| 149 | 149 | struct clk *qspick; |
| 150 | 150 | struct platform_device *pdev; |
| 151 | 151 | const struct atmel_qspi_caps *caps; |
| 152 | + resource_size_t mmap_size; | |
| 152 | 153 | u32 pending; |
| 153 | 154 | u32 mr; |
| 154 | 155 | u32 scr; |
| @@ -329,6 +330,14 @@ static int atmel_qspi_exec_op(struct spi_mem *mem, const struct spi_mem_op *op) · 174 unmodified lines | ||
| 329 | 330 | u32 sr, offset; |
| 330 | 331 | int err; |
| 331 | 332 | |
| 333 | + /* | |
| 334 | + * Check if the address exceeds the MMIO window size. An improvement | |
| 335 | + * would be to add support for regular SPI mode and fall back to it | |
| 336 | + * when the flash memories overrun the controller's memory space. | |
| 337 | + */ | |
| 338 | + if (op->addr.val + op->data.nbytes > aq->mmap_size) | |
| 339 | + return -ENOTSUPP; | |
| 340 | + | |
| 332 | 341 | err = atmel_qspi_set_cfg(aq, op, &offset); |
| 333 | 342 | if (err) |
| 334 | 343 | return err; |
| @@ -480,6 +489,8 @@ static int atmel_qspi_probe(struct platform_device *pdev) · 145 unmodified lines | ||
| 480 | 489 | goto exit; |
| 481 | 490 | } |
| 482 | 491 | |
| 492 | + aq->mmap_size = resource_size(res); | |
| 493 | + | |
| 483 | 494 | /* Get the peripheral clock */ |
| 484 | 495 | aq->pclk = devm_clk_get(&pdev->dev, "pclk"); |
| 485 | 496 | if (IS_ERR(aq->pclk)) |
| @@ -366,7 +366,6 @@ static int bcm63xx_hsspi_probe(struct platform_device *pdev) · 365 unmodified lines | ||
| 366 | 366 | goto out_disable_clk; |
| 367 | 367 | |
| 368 | 368 | rate = clk_get_rate(pll_clk); |
| 369 | − clk_disable_unprepare(pll_clk); | |
| 370 | 369 | if (!rate) { |
| 371 | 370 | ret = -EINVAL; |
| 372 | 371 | goto out_disable_pll_clk; |
| @@ -130,6 +130,7 @@ struct omap2_mcspi { · 129 unmodified lines | ||
| 130 | 130 | int fifo_depth; |
| 131 | 131 | bool slave_aborted; |
| 132 | 132 | unsigned int pin_dir:1; |
| 133 | + size_t max_xfer_len; | |
| 133 | 134 | }; |
| 134 | 135 | |
| 135 | 136 | struct omap2_mcspi_cs { |
| @@ -974,20 +975,12 @@ static int omap2_mcspi_setup_transfer(struct spi_device *spi, · 838 unmodified lines | ||
| 974 | 975 | * Note that we currently allow DMA only if we get a channel |
| 975 | 976 | * for both rx and tx. Otherwise we'll do PIO for both rx and tx. |
| 976 | 977 | */ |
| 977 | −static int omap2_mcspi_request_dma(struct spi_device *spi) | |
| 978 | +static int omap2_mcspi_request_dma(struct omap2_mcspi *mcspi, | |
| 979 | + struct omap2_mcspi_dma *mcspi_dma) | |
| 978 | 980 | { |
| 979 | − struct spi_master *master = spi->master; | |
| 980 | − struct omap2_mcspi *mcspi; | |
| 981 | − struct omap2_mcspi_dma *mcspi_dma; | |
| 982 | 981 | int ret = 0; |
| 983 | 982 | |
| 984 | − mcspi = spi_master_get_devdata(master); | |
| 985 | − mcspi_dma = mcspi->dma_channels + spi->chip_select; | |
| 986 | − | |
| 987 | − init_completion(&mcspi_dma->dma_rx_completion); | |
| 988 | − init_completion(&mcspi_dma->dma_tx_completion); | |
| 989 | − | |
| 990 | − mcspi_dma->dma_rx = dma_request_chan(&master->dev, | |
| 983 | + mcspi_dma->dma_rx = dma_request_chan(mcspi->dev, | |
| 991 | 984 | mcspi_dma->dma_rx_ch_name); |
| 992 | 985 | if (IS_ERR(mcspi_dma->dma_rx)) { |
| 993 | 986 | ret = PTR_ERR(mcspi_dma->dma_rx); |
| @@ -995,7 +988,7 @@ static int omap2_mcspi_request_dma(struct spi_device *spi) · 1 unmodified line | ||
| 995 | 988 | goto no_dma; |
| 996 | 989 | } |
| 997 | 990 | |
| 998 | − mcspi_dma->dma_tx = dma_request_chan(&master->dev, | |
| 991 | + mcspi_dma->dma_tx = dma_request_chan(mcspi->dev, | |
| 999 | 992 | mcspi_dma->dma_tx_ch_name); |
| 1000 | 993 | if (IS_ERR(mcspi_dma->dma_tx)) { |
| 1001 | 994 | ret = PTR_ERR(mcspi_dma->dma_tx); |
| @@ -1004,20 +997,40 @@ static int omap2_mcspi_request_dma(struct spi_device *spi) · 2 unmodified lines | ||
| 1004 | 997 | mcspi_dma->dma_rx = NULL; |
| 1005 | 998 | } |
| 1006 | 999 | |
| 1000 | + init_completion(&mcspi_dma->dma_rx_completion); | |
| 1001 | + init_completion(&mcspi_dma->dma_tx_completion); | |
| 1002 | + | |
| 1007 | 1003 | no_dma: |
| 1008 | 1004 | return ret; |
| 1009 | 1005 | } |
| 1010 | 1006 | |
| 1007 | +static void omap2_mcspi_release_dma(struct spi_master *master) | |
| 1008 | +{ | |
| 1009 | + struct omap2_mcspi *mcspi = spi_master_get_devdata(master); | |
| 1010 | + struct omap2_mcspi_dma *mcspi_dma; | |
| 1011 | + int i; | |
| 1012 | + | |
| 1013 | + for (i = 0; i < master->num_chipselect; i++) { | |
| 1014 | + mcspi_dma = &mcspi->dma_channels[i]; | |
| 1015 | + | |
| 1016 | + if (mcspi_dma->dma_rx) { | |
| 1017 | + dma_release_channel(mcspi_dma->dma_rx); | |
| 1018 | + mcspi_dma->dma_rx = NULL; | |
| 1019 | + } | |
| 1020 | + if (mcspi_dma->dma_tx) { | |
| 1021 | + dma_release_channel(mcspi_dma->dma_tx); | |
| 1022 | + mcspi_dma->dma_tx = NULL; | |
| 1023 | + } | |
| 1024 | + } | |
| 1025 | +} | |
| 1026 | + | |
| 1011 | 1027 | static int omap2_mcspi_setup(struct spi_device *spi) |
| 1012 | 1028 | { |
| 1013 | 1029 | int ret; |
| 1014 | 1030 | struct omap2_mcspi *mcspi = spi_master_get_devdata(spi->master); |
| 1015 | 1031 | struct omap2_mcspi_regs *ctx = &mcspi->ctx; |
| 1016 | − struct omap2_mcspi_dma *mcspi_dma; | |
| 1017 | 1032 | struct omap2_mcspi_cs *cs = spi->controller_state; |
| 1018 | 1033 | |
| 1019 | − mcspi_dma = &mcspi->dma_channels[spi->chip_select]; | |
| 1020 | − | |
| 1021 | 1034 | if (!cs) { |
| 1022 | 1035 | cs = kzalloc(sizeof *cs, GFP_KERNEL); |
| 1023 | 1036 | if (!cs) |
| @@ -1042,13 +1055,6 @@ static int omap2_mcspi_setup(struct spi_device *spi) · 18 unmodified lines | ||
| 1042 | 1055 | } |
| 1043 | 1056 | } |
| 1044 | 1057 | |
| 1045 | − if (!mcspi_dma->dma_rx || !mcspi_dma->dma_tx) { | |
| 1046 | − ret = omap2_mcspi_request_dma(spi); | |
| 1047 | − if (ret) | |
| 1048 | − dev_warn(&spi->dev, "not using DMA for McSPI (%d)\n", | |
| 1049 | − ret); | |
| 1050 | − } | |
| 1051 | − | |
| 1052 | 1058 | ret = pm_runtime_get_sync(mcspi->dev); |
| 1053 | 1059 | if (ret < 0) { |
| 1054 | 1060 | pm_runtime_put_noidle(mcspi->dev); |
| @@ -1065,12 +1071,8 @@ static int omap2_mcspi_setup(struct spi_device *spi) · 10 unmodified lines | ||
| 1065 | 1071 | |
| 1066 | 1072 | static void omap2_mcspi_cleanup(struct spi_device *spi) |
| 1067 | 1073 | { |
| 1068 | − struct omap2_mcspi *mcspi; | |
| 1069 | − struct omap2_mcspi_dma *mcspi_dma; | |
| 1070 | 1074 | struct omap2_mcspi_cs *cs; |
| 1071 | 1075 | |
| 1072 | − mcspi = spi_master_get_devdata(spi->master); | |
| 1073 | − | |
| 1074 | 1076 | if (spi->controller_state) { |
| 1075 | 1077 | /* Unlink controller state from context save list */ |
| 1076 | 1078 | cs = spi->controller_state; |
| @@ -1079,19 +1081,6 @@ static void omap2_mcspi_cleanup(struct spi_device *spi) · 2 unmodified lines | ||
| 1079 | 1081 | kfree(cs); |
| 1080 | 1082 | } |
| 1081 | 1083 | |
| 1082 | − if (spi->chip_select < spi->master->num_chipselect) { | |
| 1083 | − mcspi_dma = &mcspi->dma_channels[spi->chip_select]; | |
| 1084 | − | |
| 1085 | − if (mcspi_dma->dma_rx) { | |
| 1086 | − dma_release_channel(mcspi_dma->dma_rx); | |
| 1087 | − mcspi_dma->dma_rx = NULL; | |
| 1088 | − } | |
| 1089 | − if (mcspi_dma->dma_tx) { | |
| 1090 | − dma_release_channel(mcspi_dma->dma_tx); | |
| 1091 | − mcspi_dma->dma_tx = NULL; | |
| 1092 | − } | |
| 1093 | − } | |
| 1094 | − | |
| 1095 | 1084 | if (gpio_is_valid(spi->cs_gpio)) |
| 1096 | 1085 | gpio_free(spi->cs_gpio); |
| 1097 | 1086 | } |
| @@ -1302,9 +1291,24 @@ static bool omap2_mcspi_can_dma(struct spi_master *master, · 204 unmodified lines | ||
| 1302 | 1291 | if (spi_controller_is_slave(master)) |
| 1303 | 1292 | return true; |
| 1304 | 1293 | |
| 1294 | + master->dma_rx = mcspi_dma->dma_rx; | |
| 1295 | + master->dma_tx = mcspi_dma->dma_tx; | |
| 1296 | + | |
| 1305 | 1297 | return (xfer->len >= DMA_MIN_BYTES); |
| 1306 | 1298 | } |
| 1307 | 1299 | |
| 1300 | +static size_t omap2_mcspi_max_xfer_size(struct spi_device *spi) | |
| 1301 | +{ | |
| 1302 | + struct omap2_mcspi *mcspi = spi_master_get_devdata(spi->master); | |
| 1303 | + struct omap2_mcspi_dma *mcspi_dma = | |
| 1304 | + &mcspi->dma_channels[spi->chip_select]; | |
| 1305 | + | |
| 1306 | + if (mcspi->max_xfer_len && mcspi_dma->dma_rx) | |
| 1307 | + return mcspi->max_xfer_len; | |
| 1308 | + | |
| 1309 | + return SIZE_MAX; | |
| 1310 | +} | |
| 1311 | + | |
| 1308 | 1312 | static int omap2_mcspi_controller_setup(struct omap2_mcspi *mcspi) |
| 1309 | 1313 | { |
| 1310 | 1314 | struct spi_master *master = mcspi->master; |
| @@ -1373,6 +1377,11 @@ static struct omap2_mcspi_platform_config omap4_pdata = { · 62 unmodified lines | ||
| 1373 | 1377 | .regs_offset = OMAP4_MCSPI_REG_OFFSET, |
| 1374 | 1378 | }; |
| 1375 | 1379 | |
| 1380 | +static struct omap2_mcspi_platform_config am654_pdata = { | |
| 1381 | + .regs_offset = OMAP4_MCSPI_REG_OFFSET, | |
| 1382 | + .max_xfer_len = SZ_4K - 1, | |
| 1383 | +}; | |
| 1384 | + | |
| 1376 | 1385 | static const struct of_device_id omap_mcspi_of_match[] = { |
| 1377 | 1386 | { |
| 1378 | 1387 | .compatible = "ti,omap2-mcspi", |
| @@ -1382,6 +1391,10 @@ static const struct of_device_id omap_mcspi_of_match[] = { · 3 unmodified lines | ||
| 1382 | 1391 | .compatible = "ti,omap4-mcspi", |
| 1383 | 1392 | .data = &omap4_pdata, |
| 1384 | 1393 | }, |
| 1394 | + { | |
| 1395 | + .compatible = "ti,am654-mcspi", | |
| 1396 | + .data = &am654_pdata, | |
| 1397 | + }, | |
| 1385 | 1398 | { }, |
| 1386 | 1399 | }; |
| 1387 | 1400 | MODULE_DEVICE_TABLE(of, omap_mcspi_of_match); |
| @@ -1439,6 +1452,10 @@ static int omap2_mcspi_probe(struct platform_device *pdev) · 51 unmodified lines | ||
| 1439 | 1452 | mcspi->pin_dir = pdata->pin_dir; |
| 1440 | 1453 | } |
| 1441 | 1454 | regs_offset = pdata->regs_offset; |
| 1455 | + if (pdata->max_xfer_len) { | |
| 1456 | + mcspi->max_xfer_len = pdata->max_xfer_len; | |
| 1457 | + master->max_transfer_size = omap2_mcspi_max_xfer_size; | |
| 1458 | + } | |
| 1442 | 1459 | |
| 1443 | 1460 | r = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
| 1444 | 1461 | mcspi->base = devm_ioremap_resource(&pdev->dev, r); |
| @@ -1464,6 +1481,11 @@ static int omap2_mcspi_probe(struct platform_device *pdev) · 19 unmodified lines | ||
| 1464 | 1481 | for (i = 0; i < master->num_chipselect; i++) { |
| 1465 | 1482 | sprintf(mcspi->dma_channels[i].dma_rx_ch_name, "rx%d", i); |
| 1466 | 1483 | sprintf(mcspi->dma_channels[i].dma_tx_ch_name, "tx%d", i); |
| 1484 | + | |
| 1485 | + status = omap2_mcspi_request_dma(mcspi, | |
| 1486 | + &mcspi->dma_channels[i]); | |
| 1487 | + if (status == -EPROBE_DEFER) | |
| 1488 | + goto free_master; | |
| 1467 | 1489 | } |
| 1468 | 1490 | |
| 1469 | 1491 | status = platform_get_irq(pdev, 0); |
| @@ -1501,6 +1523,7 @@ disable_pm: · 31 unmodified lines | ||
| 1501 | 1523 | pm_runtime_put_sync(&pdev->dev); |
| 1502 | 1524 | pm_runtime_disable(&pdev->dev); |
| 1503 | 1525 | free_master: |
| 1526 | + omap2_mcspi_release_dma(master); | |
| 1504 | 1527 | spi_master_put(master); |
| 1505 | 1528 | return status; |
| 1506 | 1529 | } |
| @@ -1510,6 +1533,8 @@ static int omap2_mcspi_remove(struct platform_device *pdev) · 3 unmodified lines | ||
| 1510 | 1533 | struct spi_master *master = platform_get_drvdata(pdev); |
| 1511 | 1534 | struct omap2_mcspi *mcspi = spi_master_get_devdata(master); |
| 1512 | 1535 | |
| 1536 | + omap2_mcspi_release_dma(master); | |
| 1537 | + | |
| 1513 | 1538 | pm_runtime_dont_use_autosuspend(mcspi->dev); |
| 1514 | 1539 | pm_runtime_put_sync(mcspi->dev); |
| 1515 | 1540 | pm_runtime_disable(&pdev->dev); |
| @@ -70,6 +70,10 @@ MODULE_ALIAS("platform:pxa2xx-spi"); · 69 unmodified lines | ||
| 70 | 70 | #define LPSS_CAPS_CS_EN_SHIFT 9 |
| 71 | 71 | #define LPSS_CAPS_CS_EN_MASK (0xf << LPSS_CAPS_CS_EN_SHIFT) |
| 72 | 72 | |
| 73 | +#define LPSS_PRIV_CLOCK_GATE 0x38 | |
| 74 | +#define LPSS_PRIV_CLOCK_GATE_CLK_CTL_MASK 0x3 | |
| 75 | +#define LPSS_PRIV_CLOCK_GATE_CLK_CTL_FORCE_ON 0x3 | |
| 76 | + | |
| 73 | 77 | struct lpss_config { |
| 74 | 78 | /* LPSS offset from drv_data->ioaddr */ |
| 75 | 79 | unsigned offset; |
| @@ -86,6 +90,8 @@ struct lpss_config { · 10 unmodified lines | ||
| 86 | 90 | unsigned cs_sel_shift; |
| 87 | 91 | unsigned cs_sel_mask; |
| 88 | 92 | unsigned cs_num; |
| 93 | + /* Quirks */ | |
| 94 | + unsigned cs_clk_stays_gated : 1; | |
| 89 | 95 | }; |
| 90 | 96 | |
| 91 | 97 | /* Keep these sorted with enum pxa_ssp_type */ |
| @@ -156,6 +162,7 @@ static const struct lpss_config lpss_platforms[] = { · 64 unmodified lines | ||
| 156 | 162 | .tx_threshold_hi = 56, |
| 157 | 163 | .cs_sel_shift = 8, |
| 158 | 164 | .cs_sel_mask = 3 << 8, |
| 165 | + .cs_clk_stays_gated = true, | |
| 159 | 166 | }, |
| 160 | 167 | }; |
| 161 | 168 | |
| @@ -383,6 +390,22 @@ static void lpss_ssp_cs_control(struct spi_device *spi, bool enable) · 221 unmodified lines | ||
| 383 | 390 | else |
| 384 | 391 | value |= LPSS_CS_CONTROL_CS_HIGH; |
| 385 | 392 | __lpss_ssp_write_priv(drv_data, config->reg_cs_ctrl, value); |
| 393 | + if (config->cs_clk_stays_gated) { | |
| 394 | + u32 clkgate; | |
| 395 | + | |
| 396 | + /* | |
| 397 | + * Changing CS alone when dynamic clock gating is on won't | |
| 398 | + * actually flip CS at that time. This ruins SPI transfers | |
| 399 | + * that specify delays, or have no data. Toggle the clock mode | |
| 400 | + * to force on briefly to poke the CS pin to move. | |
| 401 | + */ | |
| 402 | + clkgate = __lpss_ssp_read_priv(drv_data, LPSS_PRIV_CLOCK_GATE); | |
| 403 | + value = (clkgate & ~LPSS_PRIV_CLOCK_GATE_CLK_CTL_MASK) | | |
| 404 | + LPSS_PRIV_CLOCK_GATE_CLK_CTL_FORCE_ON; | |
| 405 | + | |
| 406 | + __lpss_ssp_write_priv(drv_data, LPSS_PRIV_CLOCK_GATE, value); | |
| 407 | + __lpss_ssp_write_priv(drv_data, LPSS_PRIV_CLOCK_GATE, clkgate); | |
| 408 | + } | |
| 386 | 409 | } |
| 387 | 410 | |
| 388 | 411 | static void cs_assert(struct spi_device *spi) |
| @@ -1217,6 +1217,11 @@ static int spi_qup_suspend(struct device *device) · 1216 unmodified lines | ||
| 1217 | 1217 | struct spi_qup *controller = spi_master_get_devdata(master); |
| 1218 | 1218 | int ret; |
| 1219 | 1219 | |
| 1220 | + if (pm_runtime_suspended(device)) { | |
| 1221 | + ret = spi_qup_pm_resume_runtime(device); | |
| 1222 | + if (ret) | |
| 1223 | + return ret; | |
| 1224 | + } | |
| 1220 | 1225 | ret = spi_master_suspend(master); |
| 1221 | 1226 | if (ret) |
| 1222 | 1227 | return ret; |
| @@ -1225,10 +1230,8 @@ static int spi_qup_suspend(struct device *device) · 2 unmodified lines | ||
| 1225 | 1230 | if (ret) |
| 1226 | 1231 | return ret; |
| 1227 | 1232 | |
| 1228 | − if (!pm_runtime_suspended(device)) { | |
| 1229 | − clk_disable_unprepare(controller->cclk); | |
| 1230 | − clk_disable_unprepare(controller->iclk); | |
| 1231 | − } | |
| 1233 | + clk_disable_unprepare(controller->cclk); | |
| 1234 | + clk_disable_unprepare(controller->iclk); | |
| 1232 | 1235 | return 0; |
| 1233 | 1236 | } |
| 1234 | 1237 | |
| @@ -401,9 +401,6 @@ static void zynqmp_qspi_chipselect(struct spi_device *qspi, bool is_high) · 400 unmodified lines | ||
| 401 | 401 | |
| 402 | 402 | zynqmp_gqspi_write(xqspi, GQSPI_GEN_FIFO_OFST, genfifoentry); |
| 403 | 403 | |
| 404 | − /* Dummy generic FIFO entry */ | |
| 405 | − zynqmp_gqspi_write(xqspi, GQSPI_GEN_FIFO_OFST, 0x0); | |
| 406 | − | |
| 407 | 404 | /* Manually start the generic FIFO command */ |
| 408 | 405 | zynqmp_gqspi_write(xqspi, GQSPI_CONFIG_OFST, |
| 409 | 406 | zynqmp_gqspi_read(xqspi, GQSPI_CONFIG_OFST) | |
| @@ -2639,7 +2639,7 @@ int spi_register_controller(struct spi_controller *ctlr) · 2638 unmodified lines | ||
| 2639 | 2639 | if (ctlr->use_gpio_descriptors) { |
| 2640 | 2640 | status = spi_get_gpio_descs(ctlr); |
| 2641 | 2641 | if (status) |
| 2642 | − return status; | |
| 2642 | + goto free_bus_id; | |
| 2643 | 2643 | /* |
| 2644 | 2644 | * A controller using GPIO descriptors always |
| 2645 | 2645 | * supports SPI_CS_HIGH if need be. |
| @@ -2649,7 +2649,7 @@ int spi_register_controller(struct spi_controller *ctlr) · 3 unmodified lines | ||
| 2649 | 2649 | /* Legacy code path for GPIOs from DT */ |
| 2650 | 2650 | status = of_spi_get_gpio_numbers(ctlr); |
| 2651 | 2651 | if (status) |
| 2652 | − return status; | |
| 2652 | + goto free_bus_id; | |
| 2653 | 2653 | } |
| 2654 | 2654 | } |
| 2655 | 2655 | |
| @@ -2657,17 +2657,14 @@ int spi_register_controller(struct spi_controller *ctlr) · 1 unmodified line | ||
| 2657 | 2657 | * Even if it's just one always-selected device, there must |
| 2658 | 2658 | * be at least one chipselect. |
| 2659 | 2659 | */ |
| 2660 | − if (!ctlr->num_chipselect) | |
| 2661 | − return -EINVAL; | |
| 2660 | + if (!ctlr->num_chipselect) { | |
| 2661 | + status = -EINVAL; | |
| 2662 | + goto free_bus_id; | |
| 2663 | + } | |
| 2662 | 2664 | |
| 2663 | 2665 | status = device_add(&ctlr->dev); |
| 2664 | − if (status < 0) { | |
| 2665 | − /* free bus id */ | |
| 2666 | − mutex_lock(&board_lock); | |
| 2667 | − idr_remove(&spi_master_idr, ctlr->bus_num); | |
| 2668 | − mutex_unlock(&board_lock); | |
| 2669 | − goto done; | |
| 2670 | − } | |
| 2666 | + if (status < 0) | |
| 2667 | + goto free_bus_id; | |
| 2671 | 2668 | dev_dbg(dev, "registered %s %s\n", |
| 2672 | 2669 | spi_controller_is_slave(ctlr) ? "slave" : "master", |
| 2673 | 2670 | dev_name(&ctlr->dev)); |
| @@ -2683,11 +2680,7 @@ int spi_register_controller(struct spi_controller *ctlr) · 9 unmodified lines | ||
| 2683 | 2680 | status = spi_controller_initialize_queue(ctlr); |
| 2684 | 2681 | if (status) { |
| 2685 | 2682 | device_del(&ctlr->dev); |
| 2686 | − /* free bus id */ | |
| 2687 | − mutex_lock(&board_lock); | |
| 2688 | − idr_remove(&spi_master_idr, ctlr->bus_num); | |
| 2689 | − mutex_unlock(&board_lock); | |
| 2690 | − goto done; | |
| 2683 | + goto free_bus_id; | |
| 2691 | 2684 | } |
| 2692 | 2685 | } |
| 2693 | 2686 | /* add statistics */ |
| @@ -2702,7 +2695,12 @@ int spi_register_controller(struct spi_controller *ctlr) · 8 unmodified lines | ||
| 2702 | 2695 | /* Register devices from the device tree and ACPI */ |
| 2703 | 2696 | of_register_spi_devices(ctlr); |
| 2704 | 2697 | acpi_register_spi_devices(ctlr); |
| 2705 | −done: | |
| 2698 | + return status; | |
| 2699 | + | |
| 2700 | +free_bus_id: | |
| 2701 | + mutex_lock(&board_lock); | |
| 2702 | + idr_remove(&spi_master_idr, ctlr->bus_num); | |
| 2703 | + mutex_unlock(&board_lock); | |
| 2706 | 2704 | return status; |
| 2707 | 2705 | } |
| 2708 | 2706 | EXPORT_SYMBOL_GPL(spi_register_controller); |
| @@ -396,6 +396,7 @@ spidev_ioctl(struct file *filp, unsigned int cmd, unsigned long arg) · 395 unmodified lines | ||
| 396 | 396 | else |
| 397 | 397 | retval = get_user(tmp, (u32 __user *)arg); |
| 398 | 398 | if (retval == 0) { |
| 399 | + struct spi_controller *ctlr = spi->controller; | |
| 399 | 400 | u32 save = spi->mode; |
| 400 | 401 | |
| 401 | 402 | if (tmp & ~SPI_MODE_MASK) { |
| @@ -403,6 +404,10 @@ spidev_ioctl(struct file *filp, unsigned int cmd, unsigned long arg) · 1 unmodified line | ||
| 403 | 404 | break; |
| 404 | 405 | } |
| 405 | 406 | |
| 407 | + if (ctlr->use_gpio_descriptors && ctlr->cs_gpiods && | |
| 408 | + ctlr->cs_gpiods[spi->chip_select]) | |
| 409 | + tmp |= SPI_CS_HIGH; | |
| 410 | + | |
| 406 | 411 | tmp |= spi->mode & ~SPI_MODE_MASK; |
| 407 | 412 | spi->mode = (u16)tmp; |
| 408 | 413 | retval = spi_setup(spi); |
| @@ -558,13 +558,13 @@ static int hantro_attach_func(struct hantro_dev *vpu, · 557 unmodified lines | ||
| 558 | 558 | goto err_rel_entity1; |
| 559 | 559 | |
| 560 | 560 | /* Connect the three entities */ |
| 561 | − ret = media_create_pad_link(&func->vdev.entity, 0, &func->proc, 1, | |
| 561 | + ret = media_create_pad_link(&func->vdev.entity, 0, &func->proc, 0, | |
| 562 | 562 | MEDIA_LNK_FL_IMMUTABLE | |
| 563 | 563 | MEDIA_LNK_FL_ENABLED); |
| 564 | 564 | if (ret) |
| 565 | 565 | goto err_rel_entity2; |
| 566 | 566 | |
| 567 | − ret = media_create_pad_link(&func->proc, 0, &func->sink, 0, | |
| 567 | + ret = media_create_pad_link(&func->proc, 1, &func->sink, 0, | |
| 568 | 568 | MEDIA_LNK_FL_IMMUTABLE | |
| 569 | 569 | MEDIA_LNK_FL_ENABLED); |
| 570 | 570 | if (ret) |
| @@ -51,9 +51,7 @@ static void __speakup_set_selection(struct work_struct *work) · 50 unmodified lines | ||
| 51 | 51 | goto unref; |
| 52 | 52 | } |
| 53 | 53 | |
| 54 | − console_lock(); | |
| 55 | 54 | set_selection_kernel(&sel, tty); |
| 56 | − console_unlock(); | |
| 57 | 55 | |
| 58 | 56 | unref: |
| 59 | 57 | tty_kref_put(tty); |
| @@ -93,5 +93,5 @@ Some properties are recognized either by SPI and SDIO versions: · 92 unmodified lines | ||
| 93 | 93 | Must contains 64 hexadecimal digits. Not supported in current version. |
| 94 | 94 | |
| 95 | 95 | WFx driver also supports `mac-address` and `local-mac-address` as described in |
| 96 | −Documentation/devicetree/binding/net/ethernet.txt | |
| 96 | +Documentation/devicetree/bindings/net/ethernet.txt | |
| 97 | 97 | |
| @@ -212,6 +212,19 @@ unlock: · 211 unmodified lines | ||
| 212 | 212 | return rc; |
| 213 | 213 | } |
| 214 | 214 | |
| 215 | +static void destroy_session(struct kref *ref) | |
| 216 | +{ | |
| 217 | + struct amdtee_session *sess = container_of(ref, struct amdtee_session, | |
| 218 | + refcount); | |
| 219 | + | |
| 220 | + /* Unload the TA from TEE */ | |
| 221 | + handle_unload_ta(sess->ta_handle); | |
| 222 | + mutex_lock(&session_list_mutex); | |
| 223 | + list_del(&sess->list_node); | |
| 224 | + mutex_unlock(&session_list_mutex); | |
| 225 | + kfree(sess); | |
| 226 | +} | |
| 227 | + | |
| 215 | 228 | int amdtee_open_session(struct tee_context *ctx, |
| 216 | 229 | struct tee_ioctl_open_session_arg *arg, |
| 217 | 230 | struct tee_param *param) |
| @@ -236,15 +249,13 @@ int amdtee_open_session(struct tee_context *ctx, · 18 unmodified lines | ||
| 236 | 249 | |
| 237 | 250 | /* Load the TA binary into TEE environment */ |
| 238 | 251 | handle_load_ta(ta, ta_size, arg); |
| 239 | − if (arg->ret == TEEC_SUCCESS) { | |
| 240 | − mutex_lock(&session_list_mutex); | |
| 241 | − sess = alloc_session(ctxdata, arg->session); | |
| 242 | − mutex_unlock(&session_list_mutex); | |
| 243 | − } | |
| 244 | − | |
| 245 | 252 | if (arg->ret != TEEC_SUCCESS) |
| 246 | 253 | goto out; |
| 247 | 254 | |
| 255 | + mutex_lock(&session_list_mutex); | |
| 256 | + sess = alloc_session(ctxdata, arg->session); | |
| 257 | + mutex_unlock(&session_list_mutex); | |
| 258 | + | |
| 248 | 259 | if (!sess) { |
| 249 | 260 | rc = -ENOMEM; |
| 250 | 261 | goto out; |
| @@ -259,40 +270,29 @@ int amdtee_open_session(struct tee_context *ctx, · 8 unmodified lines | ||
| 259 | 270 | |
| 260 | 271 | if (i >= TEE_NUM_SESSIONS) { |
| 261 | 272 | pr_err("reached maximum session count %d\n", TEE_NUM_SESSIONS); |
| 273 | + kref_put(&sess->refcount, destroy_session); | |
| 262 | 274 | rc = -ENOMEM; |
| 263 | 275 | goto out; |
| 264 | 276 | } |
| 265 | 277 | |
| 266 | 278 | /* Open session with loaded TA */ |
| 267 | 279 | handle_open_session(arg, &session_info, param); |
| 268 | − | |
| 269 | − if (arg->ret == TEEC_SUCCESS) { | |
| 270 | − sess->session_info[i] = session_info; | |
| 271 | − set_session_id(sess->ta_handle, i, &arg->session); | |
| 272 | − } else { | |
| 280 | + if (arg->ret != TEEC_SUCCESS) { | |
| 273 | 281 | pr_err("open_session failed %d\n", arg->ret); |
| 274 | 282 | spin_lock(&sess->lock); |
| 275 | 283 | clear_bit(i, sess->sess_mask); |
| 276 | 284 | spin_unlock(&sess->lock); |
| 285 | + kref_put(&sess->refcount, destroy_session); | |
| 286 | + goto out; | |
| 277 | 287 | } |
| 288 | + | |
| 289 | + sess->session_info[i] = session_info; | |
| 290 | + set_session_id(sess->ta_handle, i, &arg->session); | |
| 278 | 291 | out: |
| 279 | 292 | free_pages((u64)ta, get_order(ta_size)); |
| 280 | 293 | return rc; |
| 281 | 294 | } |
| 282 | 295 | |
| 283 | −static void destroy_session(struct kref *ref) | |
| 284 | −{ | |
| 285 | − struct amdtee_session *sess = container_of(ref, struct amdtee_session, | |
| 286 | − refcount); | |
| 287 | − | |
| 288 | − /* Unload the TA from TEE */ | |
| 289 | − handle_unload_ta(sess->ta_handle); | |
| 290 | − mutex_lock(&session_list_mutex); | |
| 291 | − list_del(&sess->list_node); | |
| 292 | − mutex_unlock(&session_list_mutex); | |
| 293 | − kfree(sess); | |
| 294 | −} | |
| 295 | − | |
| 296 | 296 | int amdtee_close_session(struct tee_context *ctx, u32 session) |
| 297 | 297 | { |
| 298 | 298 | struct amdtee_context_data *ctxdata = ctx->data; |
| @@ -18,6 +18,7 @@ · 17 unmodified lines | ||
| 18 | 18 | #include <linux/sched.h> |
| 19 | 19 | #include <linux/serdev.h> |
| 20 | 20 | #include <linux/slab.h> |
| 21 | +#include <linux/platform_data/x86/apple.h> | |
| 21 | 22 | |
| 22 | 23 | static bool is_registered; |
| 23 | 24 | static DEFINE_IDA(ctrl_ida); |
| @@ -631,6 +632,15 @@ static int acpi_serdev_check_resources(struct serdev_controller *ctrl, · 607 unmodified lines | ||
| 631 | 632 | if (ret) |
| 632 | 633 | return ret; |
| 633 | 634 | |
| 635 | + /* | |
| 636 | + * Apple machines provide an empty resource template, so on those | |
| 637 | + * machines just look for immediate children with a "baud" property | |
| 638 | + * (from the _DSM method) instead. | |
| 639 | + */ | |
| 640 | + if (!lookup.controller_handle && x86_apple_machine && | |
| 641 | + !acpi_dev_get_property(adev, "baud", ACPI_TYPE_BUFFER, NULL)) | |
| 642 | + acpi_get_parent(adev->handle, &lookup.controller_handle); | |
| 643 | + | |
| 634 | 644 | /* Make sure controller and ResourceSource handle match */ |
| 635 | 645 | if (ACPI_HANDLE(ctrl->dev.parent) != lookup.controller_handle) |
| 636 | 646 | return -ENODEV; |
| @@ -25,6 +25,14 @@ · 24 unmodified lines | ||
| 25 | 25 | |
| 26 | 26 | #include "8250.h" |
| 27 | 27 | |
| 28 | +#define PCI_DEVICE_ID_ACCES_COM_2S 0x1052 | |
| 29 | +#define PCI_DEVICE_ID_ACCES_COM_4S 0x105d | |
| 30 | +#define PCI_DEVICE_ID_ACCES_COM_8S 0x106c | |
| 31 | +#define PCI_DEVICE_ID_ACCES_COM232_8 0x10a8 | |
| 32 | +#define PCI_DEVICE_ID_ACCES_COM_2SM 0x10d2 | |
| 33 | +#define PCI_DEVICE_ID_ACCES_COM_4SM 0x10db | |
| 34 | +#define PCI_DEVICE_ID_ACCES_COM_8SM 0x10ea | |
| 35 | + | |
| 28 | 36 | #define PCI_DEVICE_ID_COMMTECH_4224PCI335 0x0002 |
| 29 | 37 | #define PCI_DEVICE_ID_COMMTECH_4222PCI335 0x0004 |
| 30 | 38 | #define PCI_DEVICE_ID_COMMTECH_2324PCI335 0x000a |
| @@ -677,6 +685,22 @@ static int __maybe_unused exar_resume(struct device *dev) · 646 unmodified lines | ||
| 677 | 685 | |
| 678 | 686 | static SIMPLE_DEV_PM_OPS(exar_pci_pm, exar_suspend, exar_resume); |
| 679 | 687 | |
| 688 | +static const struct exar8250_board acces_com_2x = { | |
| 689 | + .num_ports = 2, | |
| 690 | + .setup = pci_xr17c154_setup, | |
| 691 | +}; | |
| 692 | + | |
| 693 | +static const struct exar8250_board acces_com_4x = { | |
| 694 | + .num_ports = 4, | |
| 695 | + .setup = pci_xr17c154_setup, | |
| 696 | +}; | |
| 697 | + | |
| 698 | +static const struct exar8250_board acces_com_8x = { | |
| 699 | + .num_ports = 8, | |
| 700 | + .setup = pci_xr17c154_setup, | |
| 701 | +}; | |
| 702 | + | |
| 703 | + | |
| 680 | 704 | static const struct exar8250_board pbn_fastcom335_2 = { |
| 681 | 705 | .num_ports = 2, |
| 682 | 706 | .setup = pci_fastcom335_setup, |
| @@ -745,6 +769,15 @@ static const struct exar8250_board pbn_exar_XR17V8358 = { · 62 unmodified lines | ||
| 745 | 769 | } |
| 746 | 770 | |
| 747 | 771 | static const struct pci_device_id exar_pci_tbl[] = { |
| 772 | + EXAR_DEVICE(ACCESSIO, ACCES_COM_2S, acces_com_2x), | |
| 773 | + EXAR_DEVICE(ACCESSIO, ACCES_COM_4S, acces_com_4x), | |
| 774 | + EXAR_DEVICE(ACCESSIO, ACCES_COM_8S, acces_com_8x), | |
| 775 | + EXAR_DEVICE(ACCESSIO, ACCES_COM232_8, acces_com_8x), | |
| 776 | + EXAR_DEVICE(ACCESSIO, ACCES_COM_2SM, acces_com_2x), | |
| 777 | + EXAR_DEVICE(ACCESSIO, ACCES_COM_4SM, acces_com_4x), | |
| 778 | + EXAR_DEVICE(ACCESSIO, ACCES_COM_8SM, acces_com_8x), | |
| 779 | + | |
| 780 | + | |
| 748 | 781 | CONNECT_DEVICE(XR17C152, UART_2_232, pbn_connect), |
| 749 | 782 | CONNECT_DEVICE(XR17C154, UART_4_232, pbn_connect), |
| 750 | 783 | CONNECT_DEVICE(XR17C158, UART_8_232, pbn_connect), |
| @@ -264,6 +264,7 @@ struct lpuart_port { · 263 unmodified lines | ||
| 264 | 264 | int rx_dma_rng_buf_len; |
| 265 | 265 | unsigned int dma_tx_nents; |
| 266 | 266 | wait_queue_head_t dma_wait; |
| 267 | + bool id_allocated; | |
| 267 | 268 | }; |
| 268 | 269 | |
| 269 | 270 | struct lpuart_soc_data { |
| @@ -2390,6 +2391,8 @@ static int __init lpuart32_imx_early_console_setup(struct earlycon_device *devic · 2120 unmodified lines | ||
| 2390 | 2391 | OF_EARLYCON_DECLARE(lpuart, "fsl,vf610-lpuart", lpuart_early_console_setup); |
| 2391 | 2392 | OF_EARLYCON_DECLARE(lpuart32, "fsl,ls1021a-lpuart", lpuart32_early_console_setup); |
| 2392 | 2393 | OF_EARLYCON_DECLARE(lpuart32, "fsl,imx7ulp-lpuart", lpuart32_imx_early_console_setup); |
| 2394 | +EARLYCON_DECLARE(lpuart, lpuart_early_console_setup); | |
| 2395 | +EARLYCON_DECLARE(lpuart32, lpuart32_early_console_setup); | |
| 2393 | 2396 | |
| 2394 | 2397 | #define LPUART_CONSOLE (&lpuart_console) |
| 2395 | 2398 | #define LPUART32_CONSOLE (&lpuart32_console) |
| @@ -2420,19 +2423,6 @@ static int lpuart_probe(struct platform_device *pdev) · 24 unmodified lines | ||
| 2420 | 2423 | if (!sport) |
| 2421 | 2424 | return -ENOMEM; |
| 2422 | 2425 | |
| 2423 | − ret = of_alias_get_id(np, "serial"); | |
| 2424 | − if (ret < 0) { | |
| 2425 | − ret = ida_simple_get(&fsl_lpuart_ida, 0, UART_NR, GFP_KERNEL); | |
| 2426 | − if (ret < 0) { | |
| 2427 | − dev_err(&pdev->dev, "port line is full, add device failed\n"); | |
| 2428 | − return ret; | |
| 2429 | − } | |
| 2430 | − } | |
| 2431 | − if (ret >= ARRAY_SIZE(lpuart_ports)) { | |
| 2432 | − dev_err(&pdev->dev, "serial%d out of range\n", ret); | |
| 2433 | − return -EINVAL; | |
| 2434 | − } | |
| 2435 | − sport->port.line = ret; | |
| 2436 | 2426 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
| 2437 | 2427 | sport->port.membase = devm_ioremap_resource(&pdev->dev, res); |
| 2438 | 2428 | if (IS_ERR(sport->port.membase)) |
| @@ -2477,9 +2467,25 @@ static int lpuart_probe(struct platform_device *pdev) · 38 unmodified lines | ||
| 2477 | 2467 | } |
| 2478 | 2468 | } |
| 2479 | 2469 | |
| 2470 | + ret = of_alias_get_id(np, "serial"); | |
| 2471 | + if (ret < 0) { | |
| 2472 | + ret = ida_simple_get(&fsl_lpuart_ida, 0, UART_NR, GFP_KERNEL); | |
| 2473 | + if (ret < 0) { | |
| 2474 | + dev_err(&pdev->dev, "port line is full, add device failed\n"); | |
| 2475 | + return ret; | |
| 2476 | + } | |
| 2477 | + sport->id_allocated = true; | |
| 2478 | + } | |
| 2479 | + if (ret >= ARRAY_SIZE(lpuart_ports)) { | |
| 2480 | + dev_err(&pdev->dev, "serial%d out of range\n", ret); | |
| 2481 | + ret = -EINVAL; | |
| 2482 | + goto failed_out_of_range; | |
| 2483 | + } | |
| 2484 | + sport->port.line = ret; | |
| 2485 | + | |
| 2480 | 2486 | ret = lpuart_enable_clks(sport); |
| 2481 | 2487 | if (ret) |
| 2482 | − return ret; | |
| 2488 | + goto failed_clock_enable; | |
| 2483 | 2489 | sport->port.uartclk = lpuart_get_baud_clk_rate(sport); |
| 2484 | 2490 | |
| 2485 | 2491 | lpuart_ports[sport->port.line] = sport; |
| @@ -2529,6 +2535,10 @@ static int lpuart_probe(struct platform_device *pdev) · 43 unmodified lines | ||
| 2529 | 2535 | failed_attach_port: |
| 2530 | 2536 | failed_irq_request: |
| 2531 | 2537 | lpuart_disable_clks(sport); |
| 2538 | +failed_clock_enable: | |
| 2539 | +failed_out_of_range: | |
| 2540 | + if (sport->id_allocated) | |
| 2541 | + ida_simple_remove(&fsl_lpuart_ida, sport->port.line); | |
| 2532 | 2542 | return ret; |
| 2533 | 2543 | } |
| 2534 | 2544 | |
| @@ -2538,7 +2548,8 @@ static int lpuart_remove(struct platform_device *pdev) · 3 unmodified lines | ||
| 2538 | 2548 | |
| 2539 | 2549 | uart_remove_one_port(&lpuart_reg, &sport->port); |
| 2540 | 2550 | |
| 2541 | − ida_simple_remove(&fsl_lpuart_ida, sport->port.line); | |
| 2551 | + if (sport->id_allocated) | |
| 2552 | + ida_simple_remove(&fsl_lpuart_ida, sport->port.line); | |
| 2542 | 2553 | |
| 2543 | 2554 | lpuart_disable_clks(sport); |
| 2544 | 2555 | |
| @@ -851,7 +851,7 @@ static int mvebu_uart_probe(struct platform_device *pdev) · 850 unmodified lines | ||
| 851 | 851 | |
| 852 | 852 | port->membase = devm_ioremap_resource(&pdev->dev, reg); |
| 853 | 853 | if (IS_ERR(port->membase)) |
| 854 | − return -PTR_ERR(port->membase); | |
| 854 | + return PTR_ERR(port->membase); | |
| 855 | 855 | |
| 856 | 856 | mvuart = devm_kzalloc(&pdev->dev, sizeof(struct mvebu_uart), |
| 857 | 857 | GFP_KERNEL); |
| @@ -181,7 +181,7 @@ int set_selection_user(const struct tiocl_selection __user *sel, · 180 unmodified lines | ||
| 181 | 181 | return set_selection_kernel(&v, tty); |
| 182 | 182 | } |
| 183 | 183 | |
| 184 | −int set_selection_kernel(struct tiocl_selection *v, struct tty_struct *tty) | |
| 184 | +static int __set_selection_kernel(struct tiocl_selection *v, struct tty_struct *tty) | |
| 185 | 185 | { |
| 186 | 186 | struct vc_data *vc = vc_cons[fg_console].d; |
| 187 | 187 | int new_sel_start, new_sel_end, spc; |
| @@ -214,7 +214,6 @@ int set_selection_kernel(struct tiocl_selection *v, struct tty_struct *tty) · 26 unmodified lines | ||
| 214 | 214 | if (ps > pe) /* make sel_start <= sel_end */ |
| 215 | 215 | swap(ps, pe); |
| 216 | 216 | |
| 217 | − mutex_lock(&sel_lock); | |
| 218 | 217 | if (sel_cons != vc_cons[fg_console].d) { |
| 219 | 218 | clear_selection(); |
| 220 | 219 | sel_cons = vc_cons[fg_console].d; |
| @@ -260,10 +259,9 @@ int set_selection_kernel(struct tiocl_selection *v, struct tty_struct *tty) · 39 unmodified lines | ||
| 260 | 259 | break; |
| 261 | 260 | case TIOCL_SELPOINTER: |
| 262 | 261 | highlight_pointer(pe); |
| 263 | − goto unlock; | |
| 262 | + return 0; | |
| 264 | 263 | default: |
| 265 | − ret = -EINVAL; | |
| 266 | − goto unlock; | |
| 264 | + return -EINVAL; | |
| 267 | 265 | } |
| 268 | 266 | |
| 269 | 267 | /* remove the pointer */ |
| @@ -285,7 +283,7 @@ int set_selection_kernel(struct tiocl_selection *v, struct tty_struct *tty) · 15 unmodified lines | ||
| 285 | 283 | else if (new_sel_start == sel_start) |
| 286 | 284 | { |
| 287 | 285 | if (new_sel_end == sel_end) /* no action required */ |
| 288 | − goto unlock; | |
| 286 | + return 0; | |
| 289 | 287 | else if (new_sel_end > sel_end) /* extend to right */ |
| 290 | 288 | highlight(sel_end + 2, new_sel_end); |
| 291 | 289 | else /* contract from right */ |
| @@ -313,8 +311,7 @@ int set_selection_kernel(struct tiocl_selection *v, struct tty_struct *tty) · 21 unmodified lines | ||
| 313 | 311 | if (!bp) { |
| 314 | 312 | printk(KERN_WARNING "selection: kmalloc() failed\n"); |
| 315 | 313 | clear_selection(); |
| 316 | − ret = -ENOMEM; | |
| 317 | − goto unlock; | |
| 314 | + return -ENOMEM; | |
| 318 | 315 | } |
| 319 | 316 | kfree(sel_buffer); |
| 320 | 317 | sel_buffer = bp; |
| @@ -339,8 +336,20 @@ int set_selection_kernel(struct tiocl_selection *v, struct tty_struct *tty) · 18 unmodified lines | ||
| 339 | 336 | } |
| 340 | 337 | } |
| 341 | 338 | sel_buffer_lth = bp - sel_buffer; |
| 342 | −unlock: | |
| 339 | + | |
| 340 | + return ret; | |
| 341 | +} | |
| 342 | + | |
| 343 | +int set_selection_kernel(struct tiocl_selection *v, struct tty_struct *tty) | |
| 344 | +{ | |
| 345 | + int ret; | |
| 346 | + | |
| 347 | + mutex_lock(&sel_lock); | |
| 348 | + console_lock(); | |
| 349 | + ret = __set_selection_kernel(v, tty); | |
| 350 | + console_unlock(); | |
| 343 | 351 | mutex_unlock(&sel_lock); |
| 352 | + | |
| 344 | 353 | return ret; |
| 345 | 354 | } |
| 346 | 355 | EXPORT_SYMBOL_GPL(set_selection_kernel); |
| @@ -3046,10 +3046,8 @@ int tioclinux(struct tty_struct *tty, unsigned long arg) · 3045 unmodified lines | ||
| 3046 | 3046 | switch (type) |
| 3047 | 3047 | { |
| 3048 | 3048 | case TIOCL_SETSEL: |
| 3049 | − console_lock(); | |
| 3050 | 3049 | ret = set_selection_user((struct tiocl_selection |
| 3051 | 3050 | __user *)(p+1), tty); |
| 3052 | − console_unlock(); | |
| 3053 | 3051 | break; |
| 3054 | 3052 | case TIOCL_PASTESEL: |
| 3055 | 3053 | ret = paste_selection(tty); |
| @@ -2550,7 +2550,7 @@ found: · 2549 unmodified lines | ||
| 2550 | 2550 | /* Update ring only if removed request is on pending_req_list list */ |
| 2551 | 2551 | if (req_on_hw_ring) { |
| 2552 | 2552 | link_trb->buffer = TRB_BUFFER(priv_ep->trb_pool_dma + |
| 2553 | − (priv_req->start_trb * TRB_SIZE)); | |
| 2553 | + ((priv_req->end_trb + 1) * TRB_SIZE)); | |
| 2554 | 2554 | link_trb->control = (link_trb->control & TRB_CYCLE) | |
| 2555 | 2555 | TRB_TYPE(TRB_LINK) | TRB_CHAIN; |
| 2556 | 2556 | |
| @@ -2595,11 +2595,21 @@ int __cdns3_gadget_ep_clear_halt(struct cdns3_endpoint *priv_ep) · 38 unmodified lines | ||
| 2595 | 2595 | { |
| 2596 | 2596 | struct cdns3_device *priv_dev = priv_ep->cdns3_dev; |
| 2597 | 2597 | struct usb_request *request; |
| 2598 | + struct cdns3_request *priv_req; | |
| 2599 | + struct cdns3_trb *trb = NULL; | |
| 2598 | 2600 | int ret; |
| 2599 | 2601 | int val; |
| 2600 | 2602 | |
| 2601 | 2603 | trace_cdns3_halt(priv_ep, 0, 0); |
| 2602 | 2604 | |
| 2605 | + request = cdns3_next_request(&priv_ep->pending_req_list); | |
| 2606 | + if (request) { | |
| 2607 | + priv_req = to_cdns3_request(request); | |
| 2608 | + trb = priv_req->trb; | |
| 2609 | + if (trb) | |
| 2610 | + trb->control = trb->control ^ TRB_CYCLE; | |
| 2611 | + } | |
| 2612 | + | |
| 2603 | 2613 | writel(EP_CMD_CSTALL | EP_CMD_EPRST, &priv_dev->regs->ep_cmd); |
| 2604 | 2614 | |
| 2605 | 2615 | /* wait for EPRST cleared */ |
| @@ -2610,10 +2620,11 @@ int __cdns3_gadget_ep_clear_halt(struct cdns3_endpoint *priv_ep) · 4 unmodified lines | ||
| 2610 | 2620 | |
| 2611 | 2621 | priv_ep->flags &= ~(EP_STALLED | EP_STALL_PENDING); |
| 2612 | 2622 | |
| 2613 | − request = cdns3_next_request(&priv_ep->pending_req_list); | |
| 2614 | − | |
| 2615 | − if (request) | |
| 2623 | + if (request) { | |
| 2624 | + if (trb) | |
| 2625 | + trb->control = trb->control ^ TRB_CYCLE; | |
| 2616 | 2626 | cdns3_rearm_transfer(priv_ep, 1); |
| 2627 | + } | |
| 2617 | 2628 | |
| 2618 | 2629 | cdns3_start_all_request(priv_dev, priv_ep); |
| 2619 | 2630 | return ret; |
| @@ -988,13 +988,17 @@ int usb_remove_device(struct usb_device *udev) · 987 unmodified lines | ||
| 988 | 988 | { |
| 989 | 989 | struct usb_hub *hub; |
| 990 | 990 | struct usb_interface *intf; |
| 991 | + int ret; | |
| 991 | 992 | |
| 992 | 993 | if (!udev->parent) /* Can't remove a root hub */ |
| 993 | 994 | return -EINVAL; |
| 994 | 995 | hub = usb_hub_to_struct_hub(udev->parent); |
| 995 | 996 | intf = to_usb_interface(hub->intfdev); |
| 996 | 997 | |
| 997 | − usb_autopm_get_interface(intf); | |
| 998 | + ret = usb_autopm_get_interface(intf); | |
| 999 | + if (ret < 0) | |
| 1000 | + return ret; | |
| 1001 | + | |
| 998 | 1002 | set_bit(udev->portnum, hub->removed_bits); |
| 999 | 1003 | hub_port_logical_disconnect(hub, udev->portnum); |
| 1000 | 1004 | usb_autopm_put_interface(intf); |
| @@ -1866,7 +1870,7 @@ static int hub_probe(struct usb_interface *intf, const struct usb_device_id *id) · 865 unmodified lines | ||
| 1866 | 1870 | |
| 1867 | 1871 | if (id->driver_info & HUB_QUIRK_DISABLE_AUTOSUSPEND) { |
| 1868 | 1872 | hub->quirk_disable_autosuspend = 1; |
| 1869 | − usb_autopm_get_interface(intf); | |
| 1873 | + usb_autopm_get_interface_no_resume(intf); | |
| 1870 | 1874 | } |
| 1871 | 1875 | |
| 1872 | 1876 | if (hub_configure(hub, &desc->endpoint[0].desc) >= 0) |
| @@ -213,7 +213,10 @@ static int usb_port_runtime_resume(struct device *dev) · 212 unmodified lines | ||
| 213 | 213 | if (!port_dev->is_superspeed && peer) |
| 214 | 214 | pm_runtime_get_sync(&peer->dev); |
| 215 | 215 | |
| 216 | − usb_autopm_get_interface(intf); | |
| 216 | + retval = usb_autopm_get_interface(intf); | |
| 217 | + if (retval < 0) | |
| 218 | + return retval; | |
| 219 | + | |
| 217 | 220 | retval = usb_hub_set_port_power(hdev, hub, port1, true); |
| 218 | 221 | msleep(hub_power_on_good_delay(hub)); |
| 219 | 222 | if (udev && !retval) { |
| @@ -266,7 +269,10 @@ static int usb_port_runtime_suspend(struct device *dev) · 46 unmodified lines | ||
| 266 | 269 | if (usb_port_block_power_off) |
| 267 | 270 | return -EBUSY; |
| 268 | 271 | |
| 269 | − usb_autopm_get_interface(intf); | |
| 272 | + retval = usb_autopm_get_interface(intf); | |
| 273 | + if (retval < 0) | |
| 274 | + return retval; | |
| 275 | + | |
| 270 | 276 | retval = usb_hub_set_port_power(hdev, hub, port1, false); |
| 271 | 277 | usb_clear_port_feature(hdev, port1, USB_PORT_FEAT_C_CONNECTION); |
| 272 | 278 | if (!port_dev->is_superspeed) |
| @@ -231,6 +231,9 @@ static const struct usb_device_id usb_quirk_list[] = { · 230 unmodified lines | ||
| 231 | 231 | /* Logitech PTZ Pro Camera */ |
| 232 | 232 | { USB_DEVICE(0x046d, 0x0853), .driver_info = USB_QUIRK_DELAY_INIT }, |
| 233 | 233 | |
| 234 | + /* Logitech Screen Share */ | |
| 235 | + { USB_DEVICE(0x046d, 0x086c), .driver_info = USB_QUIRK_NO_LPM }, | |
| 236 | + | |
| 234 | 237 | /* Logitech Quickcam Fusion */ |
| 235 | 238 | { USB_DEVICE(0x046d, 0x08c1), .driver_info = USB_QUIRK_RESET_RESUME }, |
| 236 | 239 | |
| @@ -1071,7 +1071,14 @@ static void dwc3_prepare_one_trb_sg(struct dwc3_ep *dep, · 1070 unmodified lines | ||
| 1071 | 1071 | unsigned int rem = length % maxp; |
| 1072 | 1072 | unsigned chain = true; |
| 1073 | 1073 | |
| 1074 | − if (sg_is_last(s)) | |
| 1074 | + /* | |
| 1075 | + * IOMMU driver is coalescing the list of sgs which shares a | |
| 1076 | + * page boundary into one and giving it to USB driver. With | |
| 1077 | + * this the number of sgs mapped is not equal to the number of | |
| 1078 | + * sgs passed. So mark the chain bit to false if it isthe last | |
| 1079 | + * mapped sg. | |
| 1080 | + */ | |
| 1081 | + if (i == remaining - 1) | |
| 1075 | 1082 | chain = false; |
| 1076 | 1083 | |
| 1077 | 1084 | if (rem && usb_endpoint_dir_out(dep->endpoint.desc) && !chain) { |
| @@ -424,10 +424,6 @@ static int usb251xb_get_ofdata(struct usb251xb *hub, · 423 unmodified lines | ||
| 424 | 424 | return err; |
| 425 | 425 | } |
| 426 | 426 | |
| 427 | − hub->vdd = devm_regulator_get(dev, "vdd"); | |
| 428 | − if (IS_ERR(hub->vdd)) | |
| 429 | − return PTR_ERR(hub->vdd); | |
| 430 | − | |
| 431 | 427 | if (of_property_read_u16_array(np, "vendor-id", &hub->vendor_id, 1)) |
| 432 | 428 | hub->vendor_id = USB251XB_DEF_VENDOR_ID; |
| 433 | 429 | |
| @@ -640,6 +636,13 @@ static int usb251xb_get_ofdata(struct usb251xb *hub, · 206 unmodified lines | ||
| 640 | 636 | } |
| 641 | 637 | #endif /* CONFIG_OF */ |
| 642 | 638 | |
| 639 | +static void usb251xb_regulator_disable_action(void *data) | |
| 640 | +{ | |
| 641 | + struct usb251xb *hub = data; | |
| 642 | + | |
| 643 | + regulator_disable(hub->vdd); | |
| 644 | +} | |
| 645 | + | |
| 643 | 646 | static int usb251xb_probe(struct usb251xb *hub) |
| 644 | 647 | { |
| 645 | 648 | struct device *dev = hub->dev; |
| @@ -676,10 +679,19 @@ static int usb251xb_probe(struct usb251xb *hub) · 30 unmodified lines | ||
| 676 | 679 | if (err) |
| 677 | 680 | return err; |
| 678 | 681 | |
| 682 | + hub->vdd = devm_regulator_get(dev, "vdd"); | |
| 683 | + if (IS_ERR(hub->vdd)) | |
| 684 | + return PTR_ERR(hub->vdd); | |
| 685 | + | |
| 679 | 686 | err = regulator_enable(hub->vdd); |
| 680 | 687 | if (err) |
| 681 | 688 | return err; |
| 682 | 689 | |
| 690 | + err = devm_add_action_or_reset(dev, | |
| 691 | + usb251xb_regulator_disable_action, hub); | |
| 692 | + if (err) | |
| 693 | + return err; | |
| 694 | + | |
| 683 | 695 | err = usb251xb_connect(hub); |
| 684 | 696 | if (err) { |
| 685 | 697 | dev_err(dev, "Failed to connect hub (%d)\n", err); |
| @@ -1258,6 +1258,12 @@ UNUSUAL_DEV( 0x090a, 0x1200, 0x0000, 0x9999, · 1257 unmodified lines | ||
| 1258 | 1258 | USB_SC_RBC, USB_PR_BULK, NULL, |
| 1259 | 1259 | 0 ), |
| 1260 | 1260 | |
| 1261 | +UNUSUAL_DEV(0x090c, 0x1000, 0x1100, 0x1100, | |
| 1262 | + "Samsung", | |
| 1263 | + "Flash Drive FIT", | |
| 1264 | + USB_SC_DEVICE, USB_PR_DEVICE, NULL, | |
| 1265 | + US_FL_MAX_SECTORS_64), | |
| 1266 | + | |
| 1261 | 1267 | /* aeb */ |
| 1262 | 1268 | UNUSUAL_DEV( 0x090c, 0x1132, 0x0000, 0xffff, |
| 1263 | 1269 | "Feiya", |
| @@ -456,6 +456,13 @@ config BACKLIGHT_RAVE_SP · 455 unmodified lines | ||
| 456 | 456 | help |
| 457 | 457 | Support for backlight control on RAVE SP device. |
| 458 | 458 | |
| 459 | +config BACKLIGHT_LED | |
| 460 | + tristate "Generic LED based Backlight Driver" | |
| 461 | + depends on LEDS_CLASS && OF | |
| 462 | + help | |
| 463 | + If you have a LCD backlight adjustable by LED class driver, say Y | |
| 464 | + to enable this driver. | |
| 465 | + | |
| 459 | 466 | endif # BACKLIGHT_CLASS_DEVICE |
| 460 | 467 | |
| 461 | 468 | endmenu |
| @@ -57,3 +57,4 @@ obj-$(CONFIG_BACKLIGHT_TPS65217) += tps65217_bl.o · 56 unmodified lines | ||
| 57 | 57 | obj-$(CONFIG_BACKLIGHT_WM831X) += wm831x_bl.o |
| 58 | 58 | obj-$(CONFIG_BACKLIGHT_ARCXCNN) += arcxcnn_bl.o |
| 59 | 59 | obj-$(CONFIG_BACKLIGHT_RAVE_SP) += rave-sp-backlight.o |
| 60 | +obj-$(CONFIG_BACKLIGHT_LED) += led_bl.o | |
| @@ -0,0 +1,260 @@ | ||
| 1 | +// SPDX-License-Identifier: GPL-2.0 | |
| 2 | +/* | |
| 3 | + * Copyright (C) 2015-2019 Texas Instruments Incorporated - http://www.ti.com/ | |
| 4 | + * Author: Tomi Valkeinen <tomi.valkeinen@ti.com> | |
| 5 | + * | |
| 6 | + * Based on pwm_bl.c | |
| 7 | + */ | |
| 8 | + | |
| 9 | +#include <linux/backlight.h> | |
| 10 | +#include <linux/leds.h> | |
| 11 | +#include <linux/module.h> | |
| 12 | +#include <linux/platform_device.h> | |
| 13 | + | |
| 14 | +struct led_bl_data { | |
| 15 | + struct device *dev; | |
| 16 | + struct backlight_device *bl_dev; | |
| 17 | + struct led_classdev **leds; | |
| 18 | + bool enabled; | |
| 19 | + int nb_leds; | |
| 20 | + unsigned int *levels; | |
| 21 | + unsigned int default_brightness; | |
| 22 | + unsigned int max_brightness; | |
| 23 | +}; | |
| 24 | + | |
| 25 | +static void led_bl_set_brightness(struct led_bl_data *priv, int level) | |
| 26 | +{ | |
| 27 | + int i; | |
| 28 | + int bkl_brightness; | |
| 29 | + | |
| 30 | + if (priv->levels) | |
| 31 | + bkl_brightness = priv->levels[level]; | |
| 32 | + else | |
| 33 | + bkl_brightness = level; | |
| 34 | + | |
| 35 | + for (i = 0; i < priv->nb_leds; i++) | |
| 36 | + led_set_brightness(priv->leds[i], bkl_brightness); | |
| 37 | + | |
| 38 | + priv->enabled = true; | |
| 39 | +} | |
| 40 | + | |
| 41 | +static void led_bl_power_off(struct led_bl_data *priv) | |
| 42 | +{ | |
| 43 | + int i; | |
| 44 | + | |
| 45 | + if (!priv->enabled) | |
| 46 | + return; | |
| 47 | + | |
| 48 | + for (i = 0; i < priv->nb_leds; i++) | |
| 49 | + led_set_brightness(priv->leds[i], LED_OFF); | |
| 50 | + | |
| 51 | + priv->enabled = false; | |
| 52 | +} | |
| 53 | + | |
| 54 | +static int led_bl_update_status(struct backlight_device *bl) | |
| 55 | +{ | |
| 56 | + struct led_bl_data *priv = bl_get_data(bl); | |
| 57 | + int brightness = bl->props.brightness; | |
| 58 | + | |
| 59 | + if (bl->props.power != FB_BLANK_UNBLANK || | |
| 60 | + bl->props.fb_blank != FB_BLANK_UNBLANK || | |
| 61 | + bl->props.state & BL_CORE_FBBLANK) | |
| 62 | + brightness = 0; | |
| 63 | + | |
| 64 | + if (brightness > 0) | |
| 65 | + led_bl_set_brightness(priv, brightness); | |
| 66 | + else | |
| 67 | + led_bl_power_off(priv); | |
| 68 | + | |
| 69 | + return 0; | |
| 70 | +} | |
| 71 | + | |
| 72 | +static const struct backlight_ops led_bl_ops = { | |
| 73 | + .update_status = led_bl_update_status, | |
| 74 | +}; | |
| 75 | + | |
| 76 | +static int led_bl_get_leds(struct device *dev, | |
| 77 | + struct led_bl_data *priv) | |
| 78 | +{ | |
| 79 | + int i, nb_leds, ret; | |
| 80 | + struct device_node *node = dev->of_node; | |
| 81 | + struct led_classdev **leds; | |
| 82 | + unsigned int max_brightness; | |
| 83 | + unsigned int default_brightness; | |
| 84 | + | |
| 85 | + ret = of_count_phandle_with_args(node, "leds", NULL); | |
| 86 | + if (ret < 0) { | |
| 87 | + dev_err(dev, "Unable to get led count\n"); | |
| 88 | + return -EINVAL; | |
| 89 | + } | |
| 90 | + | |
| 91 | + nb_leds = ret; | |
| 92 | + if (nb_leds < 1) { | |
| 93 | + dev_err(dev, "At least one LED must be specified!\n"); | |
| 94 | + return -EINVAL; | |
| 95 | + } | |
| 96 | + | |
| 97 | + leds = devm_kzalloc(dev, sizeof(struct led_classdev *) * nb_leds, | |
| 98 | + GFP_KERNEL); | |
| 99 | + if (!leds) | |
| 100 | + return -ENOMEM; | |
| 101 | + | |
| 102 | + for (i = 0; i < nb_leds; i++) { | |
| 103 | + leds[i] = devm_of_led_get(dev, i); | |
| 104 | + if (IS_ERR(leds[i])) | |
| 105 | + return PTR_ERR(leds[i]); | |
| 106 | + } | |
| 107 | + | |
| 108 | + /* check that the LEDs all have the same brightness range */ | |
| 109 | + max_brightness = leds[0]->max_brightness; | |
| 110 | + for (i = 1; i < nb_leds; i++) { | |
| 111 | + if (max_brightness != leds[i]->max_brightness) { | |
| 112 | + dev_err(dev, "LEDs must have identical ranges\n"); | |
| 113 | + return -EINVAL; | |
| 114 | + } | |
| 115 | + } | |
| 116 | + | |
| 117 | + /* get the default brightness from the first LED from the list */ | |
| 118 | + default_brightness = leds[0]->brightness; | |
| 119 | + | |
| 120 | + priv->nb_leds = nb_leds; | |
| 121 | + priv->leds = leds; | |
| 122 | + priv->max_brightness = max_brightness; | |
| 123 | + priv->default_brightness = default_brightness; | |
| 124 | + | |
| 125 | + return 0; | |
| 126 | +} | |
| 127 | + | |
| 128 | +static int led_bl_parse_levels(struct device *dev, | |
| 129 | + struct led_bl_data *priv) | |
| 130 | +{ | |
| 131 | + struct device_node *node = dev->of_node; | |
| 132 | + int num_levels; | |
| 133 | + u32 value; | |
| 134 | + int ret; | |
| 135 | + | |
| 136 | + if (!node) | |
| 137 | + return -ENODEV; | |
| 138 | + | |
| 139 | + num_levels = of_property_count_u32_elems(node, "brightness-levels"); | |
| 140 | + if (num_levels > 1) { | |
| 141 | + int i; | |
| 142 | + unsigned int db; | |
| 143 | + u32 *levels = NULL; | |
| 144 | + | |
| 145 | + levels = devm_kzalloc(dev, sizeof(u32) * num_levels, | |
| 146 | + GFP_KERNEL); | |
| 147 | + if (!levels) | |
| 148 | + return -ENOMEM; | |
| 149 | + | |
| 150 | + ret = of_property_read_u32_array(node, "brightness-levels", | |
| 151 | + levels, | |
| 152 | + num_levels); | |
| 153 | + if (ret < 0) | |
| 154 | + return ret; | |
| 155 | + | |
| 156 | + /* | |
| 157 | + * Try to map actual LED brightness to backlight brightness | |
| 158 | + * level | |
| 159 | + */ | |
| 160 | + db = priv->default_brightness; | |
| 161 | + for (i = 0 ; i < num_levels; i++) { | |
| 162 | + if ((i && db > levels[i-1]) && db <= levels[i]) | |
| 163 | + break; | |
| 164 | + } | |
| 165 | + priv->default_brightness = i; | |
| 166 | + priv->max_brightness = num_levels - 1; | |
| 167 | + priv->levels = levels; | |
| 168 | + } else if (num_levels >= 0) | |
| 169 | + dev_warn(dev, "Not enough levels defined\n"); | |
| 170 | + | |
| 171 | + ret = of_property_read_u32(node, "default-brightness-level", &value); | |
| 172 | + if (!ret && value <= priv->max_brightness) | |
| 173 | + priv->default_brightness = value; | |
| 174 | + else if (!ret && value > priv->max_brightness) | |
| 175 | + dev_warn(dev, "Invalid default brightness. Ignoring it\n"); | |
| 176 | + | |
| 177 | + return 0; | |
| 178 | +} | |
| 179 | + | |
| 180 | +static int led_bl_probe(struct platform_device *pdev) | |
| 181 | +{ | |
| 182 | + struct backlight_properties props; | |
| 183 | + struct led_bl_data *priv; | |
| 184 | + int ret, i; | |
| 185 | + | |
| 186 | + priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL); | |
| 187 | + if (!priv) | |
| 188 | + return -ENOMEM; | |
| 189 | + | |
| 190 | + platform_set_drvdata(pdev, priv); | |
| 191 | + | |
| 192 | + priv->dev = &pdev->dev; | |
| 193 | + | |
| 194 | + ret = led_bl_get_leds(&pdev->dev, priv); | |
| 195 | + if (ret) | |
| 196 | + return ret; | |
| 197 | + | |
| 198 | + ret = led_bl_parse_levels(&pdev->dev, priv); | |
| 199 | + if (ret < 0) { | |
| 200 | + dev_err(&pdev->dev, "Failed to parse DT data\n"); | |
| 201 | + return ret; | |
| 202 | + } | |
| 203 | + | |
| 204 | + memset(&props, 0, sizeof(struct backlight_properties)); | |
| 205 | + props.type = BACKLIGHT_RAW; | |
| 206 | + props.max_brightness = priv->max_brightness; | |
| 207 | + props.brightness = priv->default_brightness; | |
| 208 | + props.power = (priv->default_brightness > 0) ? FB_BLANK_POWERDOWN : | |
| 209 | + FB_BLANK_UNBLANK; | |
| 210 | + priv->bl_dev = backlight_device_register(dev_name(&pdev->dev), | |
| 211 | + &pdev->dev, priv, &led_bl_ops, &props); | |
| 212 | + if (IS_ERR(priv->bl_dev)) { | |
| 213 | + dev_err(&pdev->dev, "Failed to register backlight\n"); | |
| 214 | + return PTR_ERR(priv->bl_dev); | |
| 215 | + } | |
| 216 | + | |
| 217 | + for (i = 0; i < priv->nb_leds; i++) | |
| 218 | + led_sysfs_disable(priv->leds[i]); | |
| 219 | + | |
| 220 | + backlight_update_status(priv->bl_dev); | |
| 221 | + | |
| 222 | + return 0; | |
| 223 | +} | |
| 224 | + | |
| 225 | +static int led_bl_remove(struct platform_device *pdev) | |
| 226 | +{ | |
| 227 | + struct led_bl_data *priv = platform_get_drvdata(pdev); | |
| 228 | + struct backlight_device *bl = priv->bl_dev; | |
| 229 | + int i; | |
| 230 | + | |
| 231 | + backlight_device_unregister(bl); | |
| 232 | + | |
| 233 | + led_bl_power_off(priv); | |
| 234 | + for (i = 0; i < priv->nb_leds; i++) | |
| 235 | + led_sysfs_enable(priv->leds[i]); | |
| 236 | + | |
| 237 | + return 0; | |
| 238 | +} | |
| 239 | + | |
| 240 | +static const struct of_device_id led_bl_of_match[] = { | |
| 241 | + { .compatible = "led-backlight" }, | |
| 242 | + { } | |
| 243 | +}; | |
| 244 | + | |
| 245 | +MODULE_DEVICE_TABLE(of, led_bl_of_match); | |
| 246 | + | |
| 247 | +static struct platform_driver led_bl_driver = { | |
| 248 | + .driver = { | |
| 249 | + .name = "led-backlight", | |
| 250 | + .of_match_table = of_match_ptr(led_bl_of_match), | |
| 251 | + }, | |
| 252 | + .probe = led_bl_probe, | |
| 253 | + .remove = led_bl_remove, | |
| 254 | +}; | |
| 255 | + | |
| 256 | +module_platform_driver(led_bl_driver); | |
| 257 | + | |
| 258 | +MODULE_DESCRIPTION("LED based Backlight Driver"); | |
| 259 | +MODULE_LICENSE("GPL"); | |
| 260 | +MODULE_ALIAS("platform:led-backlight"); | |
| @@ -1316,6 +1316,9 @@ static int vgacon_font_get(struct vc_data *c, struct console_font *font) · 1315 unmodified lines | ||
| 1316 | 1316 | static int vgacon_resize(struct vc_data *c, unsigned int width, |
| 1317 | 1317 | unsigned int height, unsigned int user) |
| 1318 | 1318 | { |
| 1319 | + if ((width << 1) * height > vga_vram_size) | |
| 1320 | + return -EINVAL; | |
| 1321 | + | |
| 1319 | 1322 | if (width % 2 || width > screen_info.orig_video_cols || |
| 1320 | 1323 | height > (screen_info.orig_video_lines * vga_default_font_height)/ |
| 1321 | 1324 | c->vc_font.height) |
| @@ -52,7 +52,7 @@ struct xen_pcibk_dev_data { · 51 unmodified lines | ||
| 52 | 52 | unsigned int ack_intr:1; /* .. and ACK-ing */ |
| 53 | 53 | unsigned long handled; |
| 54 | 54 | unsigned int irq; /* Saved in case device transitions to MSI/MSI-X */ |
| 55 | − char irq_name[0]; /* xen-pcibk[000:04:00.0] */ | |
| 55 | + char irq_name[]; /* xen-pcibk[000:04:00.0] */ | |
| 56 | 56 | }; |
| 57 | 57 | |
| 58 | 58 | /* Used by XenBus and xen_pcibk_ops.c */ |
| @@ -313,6 +313,8 @@ static int process_msg(void) · 312 unmodified lines | ||
| 313 | 313 | req->msg.type = state.msg.type; |
| 314 | 314 | req->msg.len = state.msg.len; |
| 315 | 315 | req->body = state.body; |
| 316 | + /* write body, then update state */ | |
| 317 | + virt_wmb(); | |
| 316 | 318 | req->state = xb_req_state_got_reply; |
| 317 | 319 | req->cb(req); |
| 318 | 320 | } else |
| @@ -395,6 +397,8 @@ static int process_writes(void) · 76 unmodified lines | ||
| 395 | 397 | if (state.req->state == xb_req_state_aborted) |
| 396 | 398 | kfree(state.req); |
| 397 | 399 | else { |
| 400 | + /* write err, then update state */ | |
| 401 | + virt_wmb(); | |
| 398 | 402 | state.req->state = xb_req_state_got_reply; |
| 399 | 403 | wake_up(&state.req->wq); |
| 400 | 404 | } |
| @@ -239,9 +239,9 @@ int xenbus_dev_probe(struct device *_dev) · 238 unmodified lines | ||
| 239 | 239 | goto fail; |
| 240 | 240 | } |
| 241 | 241 | |
| 242 | − spin_lock(&dev->reclaim_lock); | |
| 242 | + down(&dev->reclaim_sem); | |
| 243 | 243 | err = drv->probe(dev, id); |
| 244 | − spin_unlock(&dev->reclaim_lock); | |
| 244 | + up(&dev->reclaim_sem); | |
| 245 | 245 | if (err) |
| 246 | 246 | goto fail_put; |
| 247 | 247 | |
| @@ -271,9 +271,9 @@ int xenbus_dev_remove(struct device *_dev) · 23 unmodified lines | ||
| 271 | 271 | free_otherend_watch(dev); |
| 272 | 272 | |
| 273 | 273 | if (drv->remove) { |
| 274 | − spin_lock(&dev->reclaim_lock); | |
| 274 | + down(&dev->reclaim_sem); | |
| 275 | 275 | drv->remove(dev); |
| 276 | − spin_unlock(&dev->reclaim_lock); | |
| 276 | + up(&dev->reclaim_sem); | |
| 277 | 277 | } |
| 278 | 278 | |
| 279 | 279 | module_put(drv->driver.owner); |
| @@ -473,7 +473,7 @@ int xenbus_probe_node(struct xen_bus_type *bus, · 193 unmodified lines | ||
| 473 | 473 | goto fail; |
| 474 | 474 | |
| 475 | 475 | dev_set_name(&xendev->dev, "%s", devname); |
| 476 | − spin_lock_init(&xendev->reclaim_lock); | |
| 476 | + sema_init(&xendev->reclaim_sem, 1); | |
| 477 | 477 | |
| 478 | 478 | /* Register with generic device framework. */ |
| 479 | 479 | err = device_register(&xendev->dev); |
| @@ -45,6 +45,7 @@ · 44 unmodified lines | ||
| 45 | 45 | #include <linux/mm.h> |
| 46 | 46 | #include <linux/notifier.h> |
| 47 | 47 | #include <linux/export.h> |
| 48 | +#include <linux/semaphore.h> | |
| 48 | 49 | |
| 49 | 50 | #include <asm/page.h> |
| 50 | 51 | #include <asm/pgtable.h> |
| @@ -257,10 +258,10 @@ static int backend_reclaim_memory(struct device *dev, void *data) · 206 unmodified lines | ||
| 257 | 258 | drv = to_xenbus_driver(dev->driver); |
| 258 | 259 | if (drv && drv->reclaim_memory) { |
| 259 | 260 | xdev = to_xenbus_device(dev); |
| 260 | − if (!spin_trylock(&xdev->reclaim_lock)) | |
| 261 | + if (down_trylock(&xdev->reclaim_sem)) | |
| 261 | 262 | return 0; |
| 262 | 263 | drv->reclaim_memory(xdev); |
| 263 | − spin_unlock(&xdev->reclaim_lock); | |
| 264 | + up(&xdev->reclaim_sem); | |
| 264 | 265 | } |
| 265 | 266 | return 0; |
| 266 | 267 | } |
| @@ -191,8 +191,11 @@ static bool xenbus_ok(void) · 190 unmodified lines | ||
| 191 | 191 | |
| 192 | 192 | static bool test_reply(struct xb_req_data *req) |
| 193 | 193 | { |
| 194 | − if (req->state == xb_req_state_got_reply || !xenbus_ok()) | |
| 194 | + if (req->state == xb_req_state_got_reply || !xenbus_ok()) { | |
| 195 | + /* read req->state before all other fields */ | |
| 196 | + virt_rmb(); | |
| 195 | 197 | return true; |
| 198 | + } | |
| 196 | 199 | |
| 197 | 200 | /* Make sure to reread req->state each time. */ |
| 198 | 201 | barrier(); |
| @@ -202,7 +205,7 @@ static bool test_reply(struct xb_req_data *req) · 3 unmodified lines | ||
| 202 | 205 | |
| 203 | 206 | static void *read_reply(struct xb_req_data *req) |
| 204 | 207 | { |
| 205 | − while (req->state != xb_req_state_got_reply) { | |
| 208 | + do { | |
| 206 | 209 | wait_event(req->wq, test_reply(req)); |
| 207 | 210 | |
| 208 | 211 | if (!xenbus_ok()) |
| @@ -216,7 +219,7 @@ static void *read_reply(struct xb_req_data *req) · 7 unmodified lines | ||
| 216 | 219 | if (req->err) |
| 217 | 220 | return ERR_PTR(req->err); |
| 218 | 221 | |
| 219 | − } | |
| 222 | + } while (req->state != xb_req_state_got_reply); | |
| 220 | 223 | |
| 221 | 224 | return req->body; |
| 222 | 225 | } |
| @@ -7783,6 +7783,7 @@ static inline blk_status_t btrfs_lookup_and_bind_dio_csum(struct inode *inode, · 7782 unmodified lines | ||
| 7783 | 7783 | { |
| 7784 | 7784 | struct btrfs_io_bio *io_bio = btrfs_io_bio(bio); |
| 7785 | 7785 | struct btrfs_io_bio *orig_io_bio = btrfs_io_bio(dip->orig_bio); |
| 7786 | + u16 csum_size; | |
| 7786 | 7787 | blk_status_t ret; |
| 7787 | 7788 | |
| 7788 | 7789 | /* |
| @@ -7802,7 +7803,8 @@ static inline blk_status_t btrfs_lookup_and_bind_dio_csum(struct inode *inode, · 13 unmodified lines | ||
| 7802 | 7803 | |
| 7803 | 7804 | file_offset -= dip->logical_offset; |
| 7804 | 7805 | file_offset >>= inode->i_sb->s_blocksize_bits; |
| 7805 | − io_bio->csum = (u8 *)(((u32 *)orig_io_bio->csum) + file_offset); | |
| 7806 | + csum_size = btrfs_super_csum_size(btrfs_sb(inode->i_sb)->super_copy); | |
| 7807 | + io_bio->csum = orig_io_bio->csum + csum_size * file_offset; | |
| 7806 | 7808 | |
| 7807 | 7809 | return 0; |
| 7808 | 7810 | } |
| @@ -324,6 +324,8 @@ static struct vfsmount *cifs_dfs_do_automount(struct dentry *mntpt) · 323 unmodified lines | ||
| 324 | 324 | if (full_path == NULL) |
| 325 | 325 | goto cdda_exit; |
| 326 | 326 | |
| 327 | + convert_delimiter(full_path, '\\'); | |
| 328 | + | |
| 327 | 329 | cifs_dbg(FYI, "%s: full_path: %s\n", __func__, full_path); |
| 328 | 330 | |
| 329 | 331 | if (!cifs_sb_master_tlink(cifs_sb)) { |
| @@ -530,6 +530,8 @@ cifs_show_options(struct seq_file *s, struct dentry *root) · 529 unmodified lines | ||
| 530 | 530 | |
| 531 | 531 | if (tcon->seal) |
| 532 | 532 | seq_puts(s, ",seal"); |
| 533 | + else if (tcon->ses->server->ignore_signature) | |
| 534 | + seq_puts(s, ",signloosely"); | |
| 533 | 535 | if (tcon->nocase) |
| 534 | 536 | seq_puts(s, ",nocase"); |
| 535 | 537 | if (tcon->local_lease) |
| @@ -1281,6 +1281,7 @@ struct cifs_fid { · 1280 unmodified lines | ||
| 1281 | 1281 | __u64 volatile_fid; /* volatile file id for smb2 */ |
| 1282 | 1282 | __u8 lease_key[SMB2_LEASE_KEY_SIZE]; /* lease key for smb2 */ |
| 1283 | 1283 | __u8 create_guid[16]; |
| 1284 | + __u32 access; | |
| 1284 | 1285 | struct cifs_pending_open *pending_open; |
| 1285 | 1286 | unsigned int epoch; |
| 1286 | 1287 | #ifdef CONFIG_CIFS_DEBUG2 |
| @@ -1741,6 +1742,12 @@ static inline bool is_retryable_error(int error) · 454 unmodified lines | ||
| 1741 | 1742 | return false; |
| 1742 | 1743 | } |
| 1743 | 1744 | |
| 1745 | + | |
| 1746 | +/* cifs_get_writable_file() flags */ | |
| 1747 | +#define FIND_WR_ANY 0 | |
| 1748 | +#define FIND_WR_FSUID_ONLY 1 | |
| 1749 | +#define FIND_WR_WITH_DELETE 2 | |
| 1750 | + | |
| 1744 | 1751 | #define MID_FREE 0 |
| 1745 | 1752 | #define MID_REQUEST_ALLOCATED 1 |
| 1746 | 1753 | #define MID_REQUEST_SUBMITTED 2 |
| @@ -134,11 +134,12 @@ extern bool backup_cred(struct cifs_sb_info *); · 133 unmodified lines | ||
| 134 | 134 | extern bool is_size_safe_to_change(struct cifsInodeInfo *, __u64 eof); |
| 135 | 135 | extern void cifs_update_eof(struct cifsInodeInfo *cifsi, loff_t offset, |
| 136 | 136 | unsigned int bytes_written); |
| 137 | −extern struct cifsFileInfo *find_writable_file(struct cifsInodeInfo *, bool); | |
| 137 | +extern struct cifsFileInfo *find_writable_file(struct cifsInodeInfo *, int); | |
| 138 | 138 | extern int cifs_get_writable_file(struct cifsInodeInfo *cifs_inode, |
| 139 | − bool fsuid_only, | |
| 139 | + int flags, | |
| 140 | 140 | struct cifsFileInfo **ret_file); |
| 141 | 141 | extern int cifs_get_writable_path(struct cifs_tcon *tcon, const char *name, |
| 142 | + int flags, | |
| 142 | 143 | struct cifsFileInfo **ret_file); |
| 143 | 144 | extern struct cifsFileInfo *find_readable_file(struct cifsInodeInfo *, bool); |
| 144 | 145 | extern int cifs_get_readable_path(struct cifs_tcon *tcon, const char *name, |
| @@ -1492,6 +1492,7 @@ openRetry: · 1491 unmodified lines | ||
| 1492 | 1492 | *oplock = rsp->OplockLevel; |
| 1493 | 1493 | /* cifs fid stays in le */ |
| 1494 | 1494 | oparms->fid->netfid = rsp->Fid; |
| 1495 | + oparms->fid->access = desired_access; | |
| 1495 | 1496 | |
| 1496 | 1497 | /* Let caller know file was created so we can set the mode. */ |
| 1497 | 1498 | /* Do we care about the CreateAction in any other cases? */ |
| @@ -2115,7 +2116,7 @@ cifs_writev_requeue(struct cifs_writedata *wdata) · 617 unmodified lines | ||
| 2115 | 2116 | wdata2->tailsz = tailsz; |
| 2116 | 2117 | wdata2->bytes = cur_len; |
| 2117 | 2118 | |
| 2118 | − rc = cifs_get_writable_file(CIFS_I(inode), false, | |
| 2119 | + rc = cifs_get_writable_file(CIFS_I(inode), FIND_WR_ANY, | |
| 2119 | 2120 | &wdata2->cfile); |
| 2120 | 2121 | if (!wdata2->cfile) { |
| 2121 | 2122 | cifs_dbg(VFS, "No writable handle to retry writepages rc=%d\n", |
| @@ -1958,7 +1958,7 @@ struct cifsFileInfo *find_readable_file(struct cifsInodeInfo *cifs_inode, · 1957 unmodified lines | ||
| 1958 | 1958 | |
| 1959 | 1959 | /* Return -EBADF if no handle is found and general rc otherwise */ |
| 1960 | 1960 | int |
| 1961 | −cifs_get_writable_file(struct cifsInodeInfo *cifs_inode, bool fsuid_only, | |
| 1961 | +cifs_get_writable_file(struct cifsInodeInfo *cifs_inode, int flags, | |
| 1962 | 1962 | struct cifsFileInfo **ret_file) |
| 1963 | 1963 | { |
| 1964 | 1964 | struct cifsFileInfo *open_file, *inv_file = NULL; |
| @@ -1966,7 +1966,8 @@ cifs_get_writable_file(struct cifsInodeInfo *cifs_inode, bool fsuid_only, · 1 unmodified line | ||
| 1966 | 1966 | bool any_available = false; |
| 1967 | 1967 | int rc = -EBADF; |
| 1968 | 1968 | unsigned int refind = 0; |
| 1969 | − | |
| 1969 | + bool fsuid_only = flags & FIND_WR_FSUID_ONLY; | |
| 1970 | + bool with_delete = flags & FIND_WR_WITH_DELETE; | |
| 1970 | 1971 | *ret_file = NULL; |
| 1971 | 1972 | |
| 1972 | 1973 | /* |
| @@ -1998,6 +1999,8 @@ refind_writable: · 25 unmodified lines | ||
| 1998 | 1999 | continue; |
| 1999 | 2000 | if (fsuid_only && !uid_eq(open_file->uid, current_fsuid())) |
| 2000 | 2001 | continue; |
| 2002 | + if (with_delete && !(open_file->fid.access & DELETE)) | |
| 2003 | + continue; | |
| 2001 | 2004 | if (OPEN_FMODE(open_file->f_flags) & FMODE_WRITE) { |
| 2002 | 2005 | if (!open_file->invalidHandle) { |
| 2003 | 2006 | /* found a good writable file */ |
| @@ -2045,12 +2048,12 @@ refind_writable: · 41 unmodified lines | ||
| 2045 | 2048 | } |
| 2046 | 2049 | |
| 2047 | 2050 | struct cifsFileInfo * |
| 2048 | −find_writable_file(struct cifsInodeInfo *cifs_inode, bool fsuid_only) | |
| 2051 | +find_writable_file(struct cifsInodeInfo *cifs_inode, int flags) | |
| 2049 | 2052 | { |
| 2050 | 2053 | struct cifsFileInfo *cfile; |
| 2051 | 2054 | int rc; |
| 2052 | 2055 | |
| 2053 | − rc = cifs_get_writable_file(cifs_inode, fsuid_only, &cfile); | |
| 2056 | + rc = cifs_get_writable_file(cifs_inode, flags, &cfile); | |
| 2054 | 2057 | if (rc) |
| 2055 | 2058 | cifs_dbg(FYI, "couldn't find writable handle rc=%d", rc); |
| 2056 | 2059 | |
| @@ -2059,6 +2062,7 @@ find_writable_file(struct cifsInodeInfo *cifs_inode, bool fsuid_only) · 2 unmodified lines | ||
| 2059 | 2062 | |
| 2060 | 2063 | int |
| 2061 | 2064 | cifs_get_writable_path(struct cifs_tcon *tcon, const char *name, |
| 2065 | + int flags, | |
| 2062 | 2066 | struct cifsFileInfo **ret_file) |
| 2063 | 2067 | { |
| 2064 | 2068 | struct list_head *tmp; |
| @@ -2085,7 +2089,7 @@ cifs_get_writable_path(struct cifs_tcon *tcon, const char *name, · 20 unmodified lines | ||
| 2085 | 2089 | kfree(full_path); |
| 2086 | 2090 | cinode = CIFS_I(d_inode(cfile->dentry)); |
| 2087 | 2091 | spin_unlock(&tcon->open_file_lock); |
| 2088 | − return cifs_get_writable_file(cinode, 0, ret_file); | |
| 2092 | + return cifs_get_writable_file(cinode, flags, ret_file); | |
| 2089 | 2093 | } |
| 2090 | 2094 | |
| 2091 | 2095 | spin_unlock(&tcon->open_file_lock); |
| @@ -2162,7 +2166,8 @@ static int cifs_partialpagewrite(struct page *page, unsigned from, unsigned to) · 70 unmodified lines | ||
| 2162 | 2166 | if (mapping->host->i_size - offset < (loff_t)to) |
| 2163 | 2167 | to = (unsigned)(mapping->host->i_size - offset); |
| 2164 | 2168 | |
| 2165 | − rc = cifs_get_writable_file(CIFS_I(mapping->host), false, &open_file); | |
| 2169 | + rc = cifs_get_writable_file(CIFS_I(mapping->host), FIND_WR_ANY, | |
| 2170 | + &open_file); | |
| 2166 | 2171 | if (!rc) { |
| 2167 | 2172 | bytes_written = cifs_write(open_file, open_file->pid, |
| 2168 | 2173 | write_data, to - from, &offset); |
| @@ -2355,7 +2360,7 @@ retry: · 186 unmodified lines | ||
| 2355 | 2360 | if (cfile) |
| 2356 | 2361 | cifsFileInfo_put(cfile); |
| 2357 | 2362 | |
| 2358 | − rc = cifs_get_writable_file(CIFS_I(inode), false, &cfile); | |
| 2363 | + rc = cifs_get_writable_file(CIFS_I(inode), FIND_WR_ANY, &cfile); | |
| 2359 | 2364 | |
| 2360 | 2365 | /* in case of an error store it to return later */ |
| 2361 | 2366 | if (rc) |
| @@ -653,8 +653,8 @@ cifs_all_info_to_fattr(struct cifs_fattr *fattr, FILE_ALL_INFO *info, · 652 unmodified lines | ||
| 653 | 653 | */ |
| 654 | 654 | if ((fattr->cf_nlink < 1) && !tcon->unix_ext && |
| 655 | 655 | !info->DeletePending) { |
| 656 | − cifs_dbg(1, "bogus file nlink value %u\n", | |
| 657 | − fattr->cf_nlink); | |
| 656 | + cifs_dbg(VFS, "bogus file nlink value %u\n", | |
| 657 | + fattr->cf_nlink); | |
| 658 | 658 | fattr->cf_flags |= CIFS_FATTR_UNKNOWN_NLINK; |
| 659 | 659 | } |
| 660 | 660 | } |
| @@ -2073,6 +2073,7 @@ int cifs_revalidate_dentry_attr(struct dentry *dentry) · 1412 unmodified lines | ||
| 2073 | 2073 | struct inode *inode = d_inode(dentry); |
| 2074 | 2074 | struct super_block *sb = dentry->d_sb; |
| 2075 | 2075 | char *full_path = NULL; |
| 2076 | + int count = 0; | |
| 2076 | 2077 | |
| 2077 | 2078 | if (inode == NULL) |
| 2078 | 2079 | return -ENOENT; |
| @@ -2094,15 +2095,18 @@ int cifs_revalidate_dentry_attr(struct dentry *dentry) · 15 unmodified lines | ||
| 2094 | 2095 | full_path, inode, inode->i_count.counter, |
| 2095 | 2096 | dentry, cifs_get_time(dentry), jiffies); |
| 2096 | 2097 | |
| 2098 | +again: | |
| 2097 | 2099 | if (cifs_sb_master_tcon(CIFS_SB(sb))->unix_ext) |
| 2098 | 2100 | rc = cifs_get_inode_info_unix(&inode, full_path, sb, xid); |
| 2099 | 2101 | else |
| 2100 | 2102 | rc = cifs_get_inode_info(&inode, full_path, NULL, sb, |
| 2101 | 2103 | xid, NULL); |
| 2102 | − | |
| 2104 | + if (rc == -EAGAIN && count++ < 10) | |
| 2105 | + goto again; | |
| 2103 | 2106 | out: |
| 2104 | 2107 | kfree(full_path); |
| 2105 | 2108 | free_xid(xid); |
| 2109 | + | |
| 2106 | 2110 | return rc; |
| 2107 | 2111 | } |
| 2108 | 2112 | |
| @@ -2278,7 +2282,7 @@ cifs_set_file_size(struct inode *inode, struct iattr *attrs, · 169 unmodified lines | ||
| 2278 | 2282 | * writebehind data than the SMB timeout for the SetPathInfo |
| 2279 | 2283 | * request would allow |
| 2280 | 2284 | */ |
| 2281 | − open_file = find_writable_file(cifsInode, true); | |
| 2285 | + open_file = find_writable_file(cifsInode, FIND_WR_FSUID_ONLY); | |
| 2282 | 2286 | if (open_file) { |
| 2283 | 2287 | tcon = tlink_tcon(open_file->tlink); |
| 2284 | 2288 | server = tcon->ses->server; |
| @@ -2428,7 +2432,7 @@ cifs_setattr_unix(struct dentry *direntry, struct iattr *attrs) · 143 unmodified lines | ||
| 2428 | 2432 | args->ctime = NO_CHANGE_64; |
| 2429 | 2433 | |
| 2430 | 2434 | args->device = 0; |
| 2431 | − open_file = find_writable_file(cifsInode, true); | |
| 2435 | + open_file = find_writable_file(cifsInode, FIND_WR_FSUID_ONLY); | |
| 2432 | 2436 | if (open_file) { |
| 2433 | 2437 | u16 nfid = open_file->fid.netfid; |
| 2434 | 2438 | u32 npid = open_file->pid; |
| @@ -2531,7 +2535,7 @@ cifs_setattr_nounix(struct dentry *direntry, struct iattr *attrs) · 96 unmodified lines | ||
| 2531 | 2535 | rc = 0; |
| 2532 | 2536 | |
| 2533 | 2537 | if (attrs->ia_valid & ATTR_MTIME) { |
| 2534 | − rc = cifs_get_writable_file(cifsInode, false, &wfile); | |
| 2538 | + rc = cifs_get_writable_file(cifsInode, FIND_WR_ANY, &wfile); | |
| 2535 | 2539 | if (!rc) { |
| 2536 | 2540 | tcon = tlink_tcon(wfile->tlink); |
| 2537 | 2541 | rc = tcon->ses->server->ops->flush(xid, tcon, &wfile->fid); |
| @@ -766,7 +766,7 @@ smb_set_file_info(struct inode *inode, const char *full_path, · 765 unmodified lines | ||
| 766 | 766 | struct cifs_tcon *tcon; |
| 767 | 767 | |
| 768 | 768 | /* if the file is already open for write, just use that fileid */ |
| 769 | − open_file = find_writable_file(cinode, true); | |
| 769 | + open_file = find_writable_file(cinode, FIND_WR_FSUID_ONLY); | |
| 770 | 770 | if (open_file) { |
| 771 | 771 | fid.netfid = open_file->fid.netfid; |
| 772 | 772 | netpid = open_file->pid; |
| @@ -521,7 +521,7 @@ smb2_mkdir_setinfo(struct inode *inode, const char *name, · 520 unmodified lines | ||
| 521 | 521 | cifs_i = CIFS_I(inode); |
| 522 | 522 | dosattrs = cifs_i->cifsAttrs | ATTR_READONLY; |
| 523 | 523 | data.Attributes = cpu_to_le32(dosattrs); |
| 524 | − cifs_get_writable_path(tcon, name, &cfile); | |
| 524 | + cifs_get_writable_path(tcon, name, FIND_WR_ANY, &cfile); | |
| 525 | 525 | tmprc = smb2_compound_op(xid, tcon, cifs_sb, name, |
| 526 | 526 | FILE_WRITE_ATTRIBUTES, FILE_CREATE, |
| 527 | 527 | CREATE_NOT_FILE, ACL_NO_MODE, |
| @@ -577,7 +577,7 @@ smb2_rename_path(const unsigned int xid, struct cifs_tcon *tcon, · 49 unmodified lines | ||
| 577 | 577 | { |
| 578 | 578 | struct cifsFileInfo *cfile; |
| 579 | 579 | |
| 580 | − cifs_get_writable_path(tcon, from_name, &cfile); | |
| 580 | + cifs_get_writable_path(tcon, from_name, FIND_WR_WITH_DELETE, &cfile); | |
| 581 | 581 | |
| 582 | 582 | return smb2_set_path_attr(xid, tcon, from_name, to_name, |
| 583 | 583 | cifs_sb, DELETE, SMB2_OP_RENAME, cfile); |
| @@ -1364,6 +1364,7 @@ smb2_set_fid(struct cifsFileInfo *cfile, struct cifs_fid *fid, __u32 oplock) · 1363 unmodified lines | ||
| 1364 | 1364 | |
| 1365 | 1365 | cfile->fid.persistent_fid = fid->persistent_fid; |
| 1366 | 1366 | cfile->fid.volatile_fid = fid->volatile_fid; |
| 1367 | + cfile->fid.access = fid->access; | |
| 1367 | 1368 | #ifdef CONFIG_CIFS_DEBUG2 |
| 1368 | 1369 | cfile->fid.mid = fid->mid; |
| 1369 | 1370 | #endif /* CIFS_DEBUG2 */ |
| @@ -3327,7 +3328,7 @@ static loff_t smb3_llseek(struct file *file, struct cifs_tcon *tcon, loff_t offs · 1957 unmodified lines | ||
| 3327 | 3328 | * some servers (Windows2016) will not reflect recent writes in |
| 3328 | 3329 | * QUERY_ALLOCATED_RANGES until SMB2_flush is called. |
| 3329 | 3330 | */ |
| 3330 | − wrcfile = find_writable_file(cifsi, false); | |
| 3331 | + wrcfile = find_writable_file(cifsi, FIND_WR_ANY); | |
| 3331 | 3332 | if (wrcfile) { |
| 3332 | 3333 | filemap_write_and_wait(inode->i_mapping); |
| 3333 | 3334 | smb2_flush_file(xid, tcon, &wrcfile->fid); |
| @@ -2771,6 +2771,7 @@ SMB2_open(const unsigned int xid, struct cifs_open_parms *oparms, __le16 *path, · 2770 unmodified lines | ||
| 2771 | 2771 | atomic_inc(&tcon->num_remote_opens); |
| 2772 | 2772 | oparms->fid->persistent_fid = rsp->PersistentFileId; |
| 2773 | 2773 | oparms->fid->volatile_fid = rsp->VolatileFileId; |
| 2774 | + oparms->fid->access = oparms->desired_access; | |
| 2774 | 2775 | #ifdef CONFIG_CIFS_DEBUG2 |
| 2775 | 2776 | oparms->fid->mid = le64_to_cpu(rsp->sync_hdr.MessageId); |
| 2776 | 2777 | #endif /* CIFS_DEBUG2 */ |
| @@ -1090,21 +1090,12 @@ static const struct file_operations fops_regset32 = { · 1089 unmodified lines | ||
| 1090 | 1090 | * This function creates a file in debugfs with the given name that reports |
| 1091 | 1091 | * the names and values of a set of 32-bit registers. If the @mode variable |
| 1092 | 1092 | * is so set it can be read from. Writing is not supported. |
| 1093 | − * | |
| 1094 | − * This function will return a pointer to a dentry if it succeeds. This | |
| 1095 | − * pointer must be passed to the debugfs_remove() function when the file is | |
| 1096 | − * to be removed (no automatic cleanup happens if your module is unloaded, | |
| 1097 | − * you are responsible here.) If an error occurs, ERR_PTR(-ERROR) will be | |
| 1098 | − * returned. | |
| 1099 | − * | |
| 1100 | − * If debugfs is not enabled in the kernel, the value ERR_PTR(-ENODEV) will | |
| 1101 | − * be returned. | |
| 1102 | 1093 | */ |
| 1103 | −struct dentry *debugfs_create_regset32(const char *name, umode_t mode, | |
| 1104 | − struct dentry *parent, | |
| 1105 | − struct debugfs_regset32 *regset) | |
| 1094 | +void debugfs_create_regset32(const char *name, umode_t mode, | |
| 1095 | + struct dentry *parent, | |
| 1096 | + struct debugfs_regset32 *regset) | |
| 1106 | 1097 | { |
| 1107 | − return debugfs_create_file(name, mode, parent, regset, &fops_regset32); | |
| 1098 | + debugfs_create_file(name, mode, parent, regset, &fops_regset32); | |
| 1108 | 1099 | } |
| 1109 | 1100 | EXPORT_SYMBOL_GPL(debugfs_create_regset32); |
| 1110 | 1101 | |
| @@ -750,6 +750,13 @@ static struct inode *fat_alloc_inode(struct super_block *sb) · 749 unmodified lines | ||
| 750 | 750 | return NULL; |
| 751 | 751 | |
| 752 | 752 | init_rwsem(&ei->truncate_lock); |
| 753 | + /* Zeroing to allow iput() even if partial initialized inode. */ | |
| 754 | + ei->mmu_private = 0; | |
| 755 | + ei->i_start = 0; | |
| 756 | + ei->i_logstart = 0; | |
| 757 | + ei->i_attrs = 0; | |
| 758 | + ei->i_pos = 0; | |
| 759 | + | |
| 753 | 760 | return &ei->vfs_inode; |
| 754 | 761 | } |
| 755 | 762 | |
| @@ -1374,16 +1381,6 @@ out: · 618 unmodified lines | ||
| 1374 | 1381 | return 0; |
| 1375 | 1382 | } |
| 1376 | 1383 | |
| 1377 | −static void fat_dummy_inode_init(struct inode *inode) | |
| 1378 | −{ | |
| 1379 | − /* Initialize this dummy inode to work as no-op. */ | |
| 1380 | − MSDOS_I(inode)->mmu_private = 0; | |
| 1381 | − MSDOS_I(inode)->i_start = 0; | |
| 1382 | − MSDOS_I(inode)->i_logstart = 0; | |
| 1383 | − MSDOS_I(inode)->i_attrs = 0; | |
| 1384 | − MSDOS_I(inode)->i_pos = 0; | |
| 1385 | −} | |
| 1386 | − | |
| 1387 | 1384 | static int fat_read_root(struct inode *inode) |
| 1388 | 1385 | { |
| 1389 | 1386 | struct msdos_sb_info *sbi = MSDOS_SB(inode->i_sb); |
| @@ -1844,13 +1841,11 @@ int fat_fill_super(struct super_block *sb, void *data, int silent, int isvfat, · 454 unmodified lines | ||
| 1844 | 1841 | fat_inode = new_inode(sb); |
| 1845 | 1842 | if (!fat_inode) |
| 1846 | 1843 | goto out_fail; |
| 1847 | − fat_dummy_inode_init(fat_inode); | |
| 1848 | 1844 | sbi->fat_inode = fat_inode; |
| 1849 | 1845 | |
| 1850 | 1846 | fsinfo_inode = new_inode(sb); |
| 1851 | 1847 | if (!fsinfo_inode) |
| 1852 | 1848 | goto out_fail; |
| 1853 | − fat_dummy_inode_init(fsinfo_inode); | |
| 1854 | 1849 | fsinfo_inode->i_ino = MSDOS_FSINFO_INO; |
| 1855 | 1850 | sbi->fsinfo_inode = fsinfo_inode; |
| 1856 | 1851 | insert_inode_hash(fsinfo_inode); |
| @@ -735,8 +735,9 @@ static void send_sigio_to_task(struct task_struct *p, · 734 unmodified lines | ||
| 735 | 735 | return; |
| 736 | 736 | |
| 737 | 737 | switch (signum) { |
| 738 | − kernel_siginfo_t si; | |
| 739 | − default: | |
| 738 | + default: { | |
| 739 | + kernel_siginfo_t si; | |
| 740 | + | |
| 740 | 741 | /* Queue a rt signal with the appropriate fd as its |
| 741 | 742 | value. We use SI_SIGIO as the source, not |
| 742 | 743 | SI_KERNEL, since kernel signals always get |
| @@ -769,6 +770,7 @@ static void send_sigio_to_task(struct task_struct *p, · 26 unmodified lines | ||
| 769 | 770 | si.si_fd = fd; |
| 770 | 771 | if (!do_send_sig_info(signum, &si, p, type)) |
| 771 | 772 | break; |
| 773 | + } | |
| 772 | 774 | /* fall-through - fall back on the old plain SIGIO signal */ |
| 773 | 775 | case 0: |
| 774 | 776 | do_send_sig_info(SIGIO, SEND_SIG_PRIV, p, type); |
| @@ -502,7 +502,7 @@ next: · 501 unmodified lines | ||
| 502 | 502 | if (worker->mm) |
| 503 | 503 | work->flags |= IO_WQ_WORK_HAS_MM; |
| 504 | 504 | |
| 505 | − if (wq->get_work && !(work->flags & IO_WQ_WORK_INTERNAL)) { | |
| 505 | + if (wq->get_work) { | |
| 506 | 506 | put_work = work; |
| 507 | 507 | wq->get_work(work); |
| 508 | 508 | } |
| @@ -747,6 +747,17 @@ static bool io_wq_can_queue(struct io_wqe *wqe, struct io_wqe_acct *acct, · 238 unmodified lines | ||
| 747 | 747 | return true; |
| 748 | 748 | } |
| 749 | 749 | |
| 750 | +static void io_run_cancel(struct io_wq_work *work) | |
| 751 | +{ | |
| 752 | + do { | |
| 753 | + struct io_wq_work *old_work = work; | |
| 754 | + | |
| 755 | + work->flags |= IO_WQ_WORK_CANCEL; | |
| 756 | + work->func(&work); | |
| 757 | + work = (work == old_work) ? NULL : work; | |
| 758 | + } while (work); | |
| 759 | +} | |
| 760 | + | |
| 750 | 761 | static void io_wqe_enqueue(struct io_wqe *wqe, struct io_wq_work *work) |
| 751 | 762 | { |
| 752 | 763 | struct io_wqe_acct *acct = io_work_get_acct(wqe, work); |
| @@ -760,8 +771,7 @@ static void io_wqe_enqueue(struct io_wqe *wqe, struct io_wq_work *work) · 7 unmodified lines | ||
| 760 | 771 | * It's close enough to not be an issue, fork() has the same delay. |
| 761 | 772 | */ |
| 762 | 773 | if (unlikely(!io_wq_can_queue(wqe, acct, work))) { |
| 763 | − work->flags |= IO_WQ_WORK_CANCEL; | |
| 764 | − work->func(&work); | |
| 774 | + io_run_cancel(work); | |
| 765 | 775 | return; |
| 766 | 776 | } |
| 767 | 777 | |
| @@ -900,8 +910,7 @@ static enum io_wq_cancel io_wqe_cancel_cb_work(struct io_wqe *wqe, · 132 unmodified lines | ||
| 900 | 910 | spin_unlock_irqrestore(&wqe->lock, flags); |
| 901 | 911 | |
| 902 | 912 | if (found) { |
| 903 | − work->flags |= IO_WQ_WORK_CANCEL; | |
| 904 | − work->func(&work); | |
| 913 | + io_run_cancel(work); | |
| 905 | 914 | return IO_WQ_CANCEL_OK; |
| 906 | 915 | } |
| 907 | 916 | |
| @@ -976,8 +985,7 @@ static enum io_wq_cancel io_wqe_cancel_work(struct io_wqe *wqe, · 68 unmodified lines | ||
| 976 | 985 | spin_unlock_irqrestore(&wqe->lock, flags); |
| 977 | 986 | |
| 978 | 987 | if (found) { |
| 979 | − work->flags |= IO_WQ_WORK_CANCEL; | |
| 980 | − work->func(&work); | |
| 988 | + io_run_cancel(work); | |
| 981 | 989 | return IO_WQ_CANCEL_OK; |
| 982 | 990 | } |
| 983 | 991 | |
| @@ -1049,42 +1057,6 @@ enum io_wq_cancel io_wq_cancel_pid(struct io_wq *wq, pid_t pid) · 65 unmodified lines | ||
| 1049 | 1057 | return ret; |
| 1050 | 1058 | } |
| 1051 | 1059 | |
| 1052 | −struct io_wq_flush_data { | |
| 1053 | − struct io_wq_work work; | |
| 1054 | − struct completion done; | |
| 1055 | −}; | |
| 1056 | − | |
| 1057 | −static void io_wq_flush_func(struct io_wq_work **workptr) | |
| 1058 | −{ | |
| 1059 | − struct io_wq_work *work = *workptr; | |
| 1060 | − struct io_wq_flush_data *data; | |
| 1061 | − | |
| 1062 | − data = container_of(work, struct io_wq_flush_data, work); | |
| 1063 | − complete(&data->done); | |
| 1064 | −} | |
| 1065 | − | |
| 1066 | −/* | |
| 1067 | − * Doesn't wait for previously queued work to finish. When this completes, | |
| 1068 | − * it just means that previously queued work was started. | |
| 1069 | − */ | |
| 1070 | −void io_wq_flush(struct io_wq *wq) | |
| 1071 | −{ | |
| 1072 | − struct io_wq_flush_data data; | |
| 1073 | − int node; | |
| 1074 | − | |
| 1075 | − for_each_node(node) { | |
| 1076 | − struct io_wqe *wqe = wq->wqes[node]; | |
| 1077 | − | |
| 1078 | − if (!node_online(node)) | |
| 1079 | − continue; | |
| 1080 | − init_completion(&data.done); | |
| 1081 | − INIT_IO_WORK(&data.work, io_wq_flush_func); | |
| 1082 | − data.work.flags |= IO_WQ_WORK_INTERNAL; | |
| 1083 | − io_wqe_enqueue(wqe, &data.work); | |
| 1084 | − wait_for_completion(&data.done); | |
| 1085 | − } | |
| 1086 | −} | |
| 1087 | − | |
| 1088 | 1060 | struct io_wq *io_wq_create(unsigned bounded, struct io_wq_data *data) |
| 1089 | 1061 | { |
| 1090 | 1062 | int ret = -ENOMEM, node; |
| @@ -8,7 +8,6 @@ enum { · 7 unmodified lines | ||
| 8 | 8 | IO_WQ_WORK_HAS_MM = 2, |
| 9 | 9 | IO_WQ_WORK_HASHED = 4, |
| 10 | 10 | IO_WQ_WORK_UNBOUND = 32, |
| 11 | − IO_WQ_WORK_INTERNAL = 64, | |
| 12 | 11 | IO_WQ_WORK_CB = 128, |
| 13 | 12 | IO_WQ_WORK_NO_CANCEL = 256, |
| 14 | 13 | IO_WQ_WORK_CONCURRENT = 512, |
| @@ -100,7 +99,6 @@ void io_wq_destroy(struct io_wq *wq); · 85 unmodified lines | ||
| 100 | 99 | |
| 101 | 100 | void io_wq_enqueue(struct io_wq *wq, struct io_wq_work *work); |
| 102 | 101 | void io_wq_enqueue_hashed(struct io_wq *wq, struct io_wq_work *work, void *val); |
| 103 | −void io_wq_flush(struct io_wq *wq); | |
| 104 | 102 | |
| 105 | 103 | void io_wq_cancel_all(struct io_wq *wq); |
| 106 | 104 | enum io_wq_cancel io_wq_cancel_work(struct io_wq *wq, struct io_wq_work *cwork); |
| @@ -191,6 +191,7 @@ struct fixed_file_data { · 190 unmodified lines | ||
| 191 | 191 | struct llist_head put_llist; |
| 192 | 192 | struct work_struct ref_work; |
| 193 | 193 | struct completion done; |
| 194 | + struct rcu_head rcu; | |
| 194 | 195 | }; |
| 195 | 196 | |
| 196 | 197 | struct io_ring_ctx { |
| @@ -999,6 +1000,7 @@ static void io_kill_timeout(struct io_kiocb *req) · 802 unmodified lines | ||
| 999 | 1000 | if (ret != -1) { |
| 1000 | 1001 | atomic_inc(&req->ctx->cq_timeouts); |
| 1001 | 1002 | list_del_init(&req->list); |
| 1003 | + req->flags |= REQ_F_COMP_LOCKED; | |
| 1002 | 1004 | io_cqring_fill_event(req, 0); |
| 1003 | 1005 | io_put_req(req); |
| 1004 | 1006 | } |
| @@ -5329,6 +5331,26 @@ static void io_file_ref_kill(struct percpu_ref *ref) · 4324 unmodified lines | ||
| 5329 | 5331 | complete(&data->done); |
| 5330 | 5332 | } |
| 5331 | 5333 | |
| 5334 | +static void __io_file_ref_exit_and_free(struct rcu_head *rcu) | |
| 5335 | +{ | |
| 5336 | + struct fixed_file_data *data = container_of(rcu, struct fixed_file_data, | |
| 5337 | + rcu); | |
| 5338 | + percpu_ref_exit(&data->refs); | |
| 5339 | + kfree(data); | |
| 5340 | +} | |
| 5341 | + | |
| 5342 | +static void io_file_ref_exit_and_free(struct rcu_head *rcu) | |
| 5343 | +{ | |
| 5344 | + /* | |
| 5345 | + * We need to order our exit+free call against the potentially | |
| 5346 | + * existing call_rcu() for switching to atomic. One way to do that | |
| 5347 | + * is to have this rcu callback queue the final put and free, as we | |
| 5348 | + * could otherwise have a pre-existing atomic switch complete _after_ | |
| 5349 | + * the free callback we queued. | |
| 5350 | + */ | |
| 5351 | + call_rcu(rcu, __io_file_ref_exit_and_free); | |
| 5352 | +} | |
| 5353 | + | |
| 5332 | 5354 | static int io_sqe_files_unregister(struct io_ring_ctx *ctx) |
| 5333 | 5355 | { |
| 5334 | 5356 | struct fixed_file_data *data = ctx->file_data; |
| @@ -5341,14 +5363,13 @@ static int io_sqe_files_unregister(struct io_ring_ctx *ctx) · 6 unmodified lines | ||
| 5341 | 5363 | flush_work(&data->ref_work); |
| 5342 | 5364 | wait_for_completion(&data->done); |
| 5343 | 5365 | io_ring_file_ref_flush(data); |
| 5344 | − percpu_ref_exit(&data->refs); | |
| 5345 | 5366 | |
| 5346 | 5367 | __io_sqe_files_unregister(ctx); |
| 5347 | 5368 | nr_tables = DIV_ROUND_UP(ctx->nr_user_files, IORING_MAX_FILES_TABLE); |
| 5348 | 5369 | for (i = 0; i < nr_tables; i++) |
| 5349 | 5370 | kfree(data->table[i].files); |
| 5350 | 5371 | kfree(data->table); |
| 5351 | − kfree(data); | |
| 5372 | + call_rcu(&data->rcu, io_file_ref_exit_and_free); | |
| 5352 | 5373 | ctx->file_data = NULL; |
| 5353 | 5374 | ctx->nr_user_files = 0; |
| 5354 | 5375 | return 0; |
| @@ -753,20 +753,6 @@ int locks_delete_block(struct file_lock *waiter) · 752 unmodified lines | ||
| 753 | 753 | { |
| 754 | 754 | int status = -ENOENT; |
| 755 | 755 | |
| 756 | − /* | |
| 757 | − * If fl_blocker is NULL, it won't be set again as this thread | |
| 758 | − * "owns" the lock and is the only one that might try to claim | |
| 759 | − * the lock. So it is safe to test fl_blocker locklessly. | |
| 760 | − * Also if fl_blocker is NULL, this waiter is not listed on | |
| 761 | − * fl_blocked_requests for some lock, so no other request can | |
| 762 | − * be added to the list of fl_blocked_requests for this | |
| 763 | − * request. So if fl_blocker is NULL, it is safe to | |
| 764 | − * locklessly check if fl_blocked_requests is empty. If both | |
| 765 | − * of these checks succeed, there is no need to take the lock. | |
| 766 | − */ | |
| 767 | − if (waiter->fl_blocker == NULL && | |
| 768 | − list_empty(&waiter->fl_blocked_requests)) | |
| 769 | − return status; | |
| 770 | 756 | spin_lock(&blocked_lock_lock); |
| 771 | 757 | if (waiter->fl_blocker) |
| 772 | 758 | status = 0; |
| @@ -96,6 +96,11 @@ struct drm_gem_shmem_object { · 95 unmodified lines | ||
| 96 | 96 | * The address are un-mapped when the count reaches zero. |
| 97 | 97 | */ |
| 98 | 98 | unsigned int vmap_use_count; |
| 99 | + | |
| 100 | + /** | |
| 101 | + * @map_cached: map object cached (instead of using writecombine). | |
| 102 | + */ | |
| 103 | + bool map_cached; | |
| 99 | 104 | }; |
| 100 | 105 | |
| 101 | 106 | #define to_drm_gem_shmem_obj(obj) \ |
| @@ -1494,7 +1494,6 @@ static inline void put_dev_sector(Sector p) · 1493 unmodified lines | ||
| 1494 | 1494 | } |
| 1495 | 1495 | |
| 1496 | 1496 | int kblockd_schedule_work(struct work_struct *work); |
| 1497 | −int kblockd_schedule_work_on(int cpu, struct work_struct *work); | |
| 1498 | 1497 | int kblockd_mod_delayed_work_on(int cpu, struct delayed_work *dwork, unsigned long delay); |
| 1499 | 1498 | |
| 1500 | 1499 | #define MODULE_ALIAS_BLOCKDEV(major,minor) \ |
| @@ -127,9 +127,9 @@ struct dentry *debugfs_create_blob(const char *name, umode_t mode, · 126 unmodified lines | ||
| 127 | 127 | struct dentry *parent, |
| 128 | 128 | struct debugfs_blob_wrapper *blob); |
| 129 | 129 | |
| 130 | −struct dentry *debugfs_create_regset32(const char *name, umode_t mode, | |
| 131 | − struct dentry *parent, | |
| 132 | − struct debugfs_regset32 *regset); | |
| 130 | +void debugfs_create_regset32(const char *name, umode_t mode, | |
| 131 | + struct dentry *parent, | |
| 132 | + struct debugfs_regset32 *regset); | |
| 133 | 133 | |
| 134 | 134 | void debugfs_print_regs32(struct seq_file *s, const struct debugfs_reg32 *regs, |
| 135 | 135 | int nregs, void __iomem *base, char *prefix); |
| @@ -304,11 +304,10 @@ static inline struct dentry *debugfs_create_blob(const char *name, umode_t mode, · 168 unmodified lines | ||
| 304 | 304 | return ERR_PTR(-ENODEV); |
| 305 | 305 | } |
| 306 | 306 | |
| 307 | −static inline struct dentry *debugfs_create_regset32(const char *name, | |
| 308 | − umode_t mode, struct dentry *parent, | |
| 309 | − struct debugfs_regset32 *regset) | |
| 307 | +static inline void debugfs_create_regset32(const char *name, umode_t mode, | |
| 308 | + struct dentry *parent, | |
| 309 | + struct debugfs_regset32 *regset) | |
| 310 | 310 | { |
| 311 | − return ERR_PTR(-ENODEV); | |
| 312 | 311 | } |
| 313 | 312 | |
| 314 | 313 | static inline void debugfs_print_regs32(struct seq_file *s, const struct debugfs_reg32 *regs, |
| @@ -798,6 +798,17 @@ static inline struct device_node *dev_of_node(struct device *dev) · 797 unmodified lines | ||
| 798 | 798 | return dev->of_node; |
| 799 | 799 | } |
| 800 | 800 | |
| 801 | +static inline bool dev_has_sync_state(struct device *dev) | |
| 802 | +{ | |
| 803 | + if (!dev) | |
| 804 | + return false; | |
| 805 | + if (dev->driver && dev->driver->sync_state) | |
| 806 | + return true; | |
| 807 | + if (dev->bus && dev->bus->sync_state) | |
| 808 | + return true; | |
| 809 | + return false; | |
| 810 | +} | |
| 811 | + | |
| 801 | 812 | /* |
| 802 | 813 | * High level routines for use by the bus drivers |
| 803 | 814 | */ |
| @@ -2715,6 +2715,10 @@ static inline bool debug_pagealloc_enabled_static(void) · 2714 unmodified lines | ||
| 2715 | 2715 | #if defined(CONFIG_DEBUG_PAGEALLOC) || defined(CONFIG_ARCH_HAS_SET_DIRECT_MAP) |
| 2716 | 2716 | extern void __kernel_map_pages(struct page *page, int numpages, int enable); |
| 2717 | 2717 | |
| 2718 | +/* | |
| 2719 | + * When called in DEBUG_PAGEALLOC context, the call should most likely be | |
| 2720 | + * guarded by debug_pagealloc_enabled() or debug_pagealloc_enabled_static() | |
| 2721 | + */ | |
| 2718 | 2722 | static inline void |
| 2719 | 2723 | kernel_map_pages(struct page *page, int numpages, int enable) |
| 2720 | 2724 | { |
| @@ -11,6 +11,7 @@ struct omap2_mcspi_platform_config { · 10 unmodified lines | ||
| 11 | 11 | unsigned short num_cs; |
| 12 | 12 | unsigned int regs_offset; |
| 13 | 13 | unsigned int pin_dir:1; |
| 14 | + size_t max_xfer_len; | |
| 14 | 15 | }; |
| 15 | 16 | |
| 16 | 17 | struct omap2_mcspi_device_config { |
| @@ -1157,7 +1157,7 @@ struct snd_soc_pcm_runtime { · 1156 unmodified lines | ||
| 1157 | 1157 | ((i) < rtd->num_codecs) && ((dai) = rtd->codec_dais[i]); \ |
| 1158 | 1158 | (i)++) |
| 1159 | 1159 | #define for_each_rtd_codec_dai_rollback(rtd, i, dai) \ |
| 1160 | − for (; ((--i) >= 0) && ((dai) = rtd->codec_dais[i]);) | |
| 1160 | + for (; (--(i) >= 0) && ((dai) = rtd->codec_dais[i]);) | |
| 1161 | 1161 | |
| 1162 | 1162 | void snd_soc_close_delayed_work(struct snd_soc_pcm_runtime *rtd); |
| 1163 | 1163 | |
| @@ -272,9 +272,9 @@ enum { · 271 unmodified lines | ||
| 272 | 272 | #define DM_DEV_SET_GEOMETRY _IOWR(DM_IOCTL, DM_DEV_SET_GEOMETRY_CMD, struct dm_ioctl) |
| 273 | 273 | |
| 274 | 274 | #define DM_VERSION_MAJOR 4 |
| 275 | −#define DM_VERSION_MINOR 41 | |
| 275 | +#define DM_VERSION_MINOR 42 | |
| 276 | 276 | #define DM_VERSION_PATCHLEVEL 0 |
| 277 | −#define DM_VERSION_EXTRA "-ioctl (2019-09-16)" | |
| 277 | +#define DM_VERSION_EXTRA "-ioctl (2020-02-27)" | |
| 278 | 278 | |
| 279 | 279 | /* Status bits */ |
| 280 | 280 | #define DM_READONLY_FLAG (1 << 0) /* In/Out */ |
| @@ -46,7 +46,7 @@ struct vtpm_shared_page { · 45 unmodified lines | ||
| 46 | 46 | uint8_t pad; |
| 47 | 47 | |
| 48 | 48 | uint8_t nr_extra_pages; /* extra pages for long packets; may be zero */ |
| 49 | − uint32_t extra_pages[0]; /* grant IDs; length in nr_extra_pages */ | |
| 49 | + uint32_t extra_pages[]; /* grant IDs; length in nr_extra_pages */ | |
| 50 | 50 | }; |
| 51 | 51 | |
| 52 | 52 | #endif |
| @@ -42,6 +42,7 @@ · 41 unmodified lines | ||
| 42 | 42 | #include <linux/completion.h> |
| 43 | 43 | #include <linux/init.h> |
| 44 | 44 | #include <linux/slab.h> |
| 45 | +#include <linux/semaphore.h> | |
| 45 | 46 | #include <xen/interface/xen.h> |
| 46 | 47 | #include <xen/interface/grant_table.h> |
| 47 | 48 | #include <xen/interface/io/xenbus.h> |
| @@ -76,7 +77,7 @@ struct xenbus_device { · 28 unmodified lines | ||
| 76 | 77 | enum xenbus_state state; |
| 77 | 78 | struct completion down; |
| 78 | 79 | struct work_struct work; |
| 79 | − spinlock_t reclaim_lock; | |
| 80 | + struct semaphore reclaim_sem; | |
| 80 | 81 | }; |
| 81 | 82 | |
| 82 | 83 | static inline struct xenbus_device *to_xenbus_device(struct device *dev) |
| @@ -619,8 +619,8 @@ static void forget_original_parent(struct task_struct *father, · 618 unmodified lines | ||
| 619 | 619 | reaper = find_new_reaper(father, reaper); |
| 620 | 620 | list_for_each_entry(p, &father->children, sibling) { |
| 621 | 621 | for_each_thread(p, t) { |
| 622 | − t->real_parent = reaper; | |
| 623 | − BUG_ON((!t->ptrace) != (t->parent == father)); | |
| 622 | + RCU_INIT_POINTER(t->real_parent, reaper); | |
| 623 | + BUG_ON((!t->ptrace) != (rcu_access_pointer(t->parent) == father)); | |
| 624 | 624 | if (likely(!t->ptrace)) |
| 625 | 625 | t->parent = t->real_parent; |
| 626 | 626 | if (t->pdeath_signal) |
| @@ -1508,7 +1508,7 @@ static int copy_sighand(unsigned long clone_flags, struct task_struct *tsk) · 1507 unmodified lines | ||
| 1508 | 1508 | return 0; |
| 1509 | 1509 | } |
| 1510 | 1510 | sig = kmem_cache_alloc(sighand_cachep, GFP_KERNEL); |
| 1511 | − rcu_assign_pointer(tsk->sighand, sig); | |
| 1511 | + RCU_INIT_POINTER(tsk->sighand, sig); | |
| 1512 | 1512 | if (!sig) |
| 1513 | 1513 | return -ENOMEM; |
| 1514 | 1514 | |
| @@ -8337,6 +8337,8 @@ static inline void update_sg_wakeup_stats(struct sched_domain *sd, · 8336 unmodified lines | ||
| 8337 | 8337 | |
| 8338 | 8338 | sgs->group_capacity = group->sgc->capacity; |
| 8339 | 8339 | |
| 8340 | + sgs->group_weight = group->group_weight; | |
| 8341 | + | |
| 8340 | 8342 | sgs->group_type = group_classify(sd->imbalance_pct, group, sgs); |
| 8341 | 8343 | |
| 8342 | 8344 | /* |
| @@ -1896,8 +1896,11 @@ static ssize_t sysfs_blk_trace_attr_store(struct device *dev, · 1895 unmodified lines | ||
| 1896 | 1896 | } |
| 1897 | 1897 | |
| 1898 | 1898 | ret = 0; |
| 1899 | − if (bt == NULL) | |
| 1899 | + if (bt == NULL) { | |
| 1900 | 1900 | ret = blk_trace_setup_queue(q, bdev); |
| 1901 | + bt = rcu_dereference_protected(q->blk_trace, | |
| 1902 | + lockdep_is_held(&q->blk_trace_mutex)); | |
| 1903 | + } | |
| 1901 | 1904 | |
| 1902 | 1905 | if (ret == 0) { |
| 1903 | 1906 | if (attr == &dev_attr_act_mask) |
| @@ -3043,8 +3043,7 @@ void set_pmd_migration_entry(struct page_vma_mapped_walk *pvmw, · 3042 unmodified lines | ||
| 3043 | 3043 | return; |
| 3044 | 3044 | |
| 3045 | 3045 | flush_cache_range(vma, address, address + HPAGE_PMD_SIZE); |
| 3046 | − pmdval = *pvmw->pmd; | |
| 3047 | − pmdp_invalidate(vma, address, pvmw->pmd); | |
| 3046 | + pmdval = pmdp_invalidate(vma, address, pvmw->pmd); | |
| 3048 | 3047 | if (pmd_dirty(pmdval)) |
| 3049 | 3048 | set_page_dirty(page); |
| 3050 | 3049 | entry = make_migration_entry(page, pmd_write(pmdval)); |
| @@ -2257,7 +2257,7 @@ static inline bool cow_user_page(struct page *dst, struct page *src, · 2256 unmodified lines | ||
| 2257 | 2257 | bool ret; |
| 2258 | 2258 | void *kaddr; |
| 2259 | 2259 | void __user *uaddr; |
| 2260 | − bool force_mkyoung; | |
| 2260 | + bool locked = false; | |
| 2261 | 2261 | struct vm_area_struct *vma = vmf->vma; |
| 2262 | 2262 | struct mm_struct *mm = vma->vm_mm; |
| 2263 | 2263 | unsigned long addr = vmf->address; |
| @@ -2282,11 +2282,11 @@ static inline bool cow_user_page(struct page *dst, struct page *src, · 18 unmodified lines | ||
| 2282 | 2282 | * On architectures with software "accessed" bits, we would |
| 2283 | 2283 | * take a double page fault, so mark it accessed here. |
| 2284 | 2284 | */ |
| 2285 | − force_mkyoung = arch_faults_on_old_pte() && !pte_young(vmf->orig_pte); | |
| 2286 | − if (force_mkyoung) { | |
| 2285 | + if (arch_faults_on_old_pte() && !pte_young(vmf->orig_pte)) { | |
| 2287 | 2286 | pte_t entry; |
| 2288 | 2287 | |
| 2289 | 2288 | vmf->pte = pte_offset_map_lock(mm, vmf->pmd, addr, &vmf->ptl); |
| 2289 | + locked = true; | |
| 2290 | 2290 | if (!likely(pte_same(*vmf->pte, vmf->orig_pte))) { |
| 2291 | 2291 | /* |
| 2292 | 2292 | * Other thread has already handled the fault |
| @@ -2310,18 +2310,37 @@ static inline bool cow_user_page(struct page *dst, struct page *src, · 17 unmodified lines | ||
| 2310 | 2310 | * zeroes. |
| 2311 | 2311 | */ |
| 2312 | 2312 | if (__copy_from_user_inatomic(kaddr, uaddr, PAGE_SIZE)) { |
| 2313 | + if (locked) | |
| 2314 | + goto warn; | |
| 2315 | + | |
| 2316 | + /* Re-validate under PTL if the page is still mapped */ | |
| 2317 | + vmf->pte = pte_offset_map_lock(mm, vmf->pmd, addr, &vmf->ptl); | |
| 2318 | + locked = true; | |
| 2319 | + if (!likely(pte_same(*vmf->pte, vmf->orig_pte))) { | |
| 2320 | + /* The PTE changed under us. Retry page fault. */ | |
| 2321 | + ret = false; | |
| 2322 | + goto pte_unlock; | |
| 2323 | + } | |
| 2324 | + | |
| 2313 | 2325 | /* |
| 2314 | − * Give a warn in case there can be some obscure | |
| 2315 | − * use-case | |
| 2326 | + * The same page can be mapped back since last copy attampt. | |
| 2327 | + * Try to copy again under PTL. | |
| 2316 | 2328 | */ |
| 2317 | − WARN_ON_ONCE(1); | |
| 2318 | − clear_page(kaddr); | |
| 2329 | + if (__copy_from_user_inatomic(kaddr, uaddr, PAGE_SIZE)) { | |
| 2330 | + /* | |
| 2331 | + * Give a warn in case there can be some obscure | |
| 2332 | + * use-case | |
| 2333 | + */ | |
| 2334 | +warn: | |
| 2335 | + WARN_ON_ONCE(1); | |
| 2336 | + clear_page(kaddr); | |
| 2337 | + } | |
| 2319 | 2338 | } |
| 2320 | 2339 | |
| 2321 | 2340 | ret = true; |
| 2322 | 2341 | |
| 2323 | 2342 | pte_unlock: |
| 2324 | − if (force_mkyoung) | |
| 2343 | + if (locked) | |
| 2325 | 2344 | pte_unmap_unlock(vmf->pte, vmf->ptl); |
| 2326 | 2345 | kunmap_atomic(kaddr); |
| 2327 | 2346 | flush_dcache_page(dst); |
| @@ -574,7 +574,13 @@ EXPORT_SYMBOL_GPL(restore_online_page_callback); · 573 unmodified lines | ||
| 574 | 574 | |
| 575 | 575 | void generic_online_page(struct page *page, unsigned int order) |
| 576 | 576 | { |
| 577 | − kernel_map_pages(page, 1 << order, 1); | |
| 577 | + /* | |
| 578 | + * Freeing the page with debug_pagealloc enabled will try to unmap it, | |
| 579 | + * so we should map it first. This is better than introducing a special | |
| 580 | + * case in page freeing fast path. | |
| 581 | + */ | |
| 582 | + if (debug_pagealloc_enabled_static()) | |
| 583 | + kernel_map_pages(page, 1 << order, 1); | |
| 578 | 584 | __free_pages_core(page, order); |
| 579 | 585 | totalram_pages_add(1UL << order); |
| 580 | 586 | #ifdef CONFIG_HIGHMEM |
| @@ -161,6 +161,31 @@ static unsigned long change_pte_range(struct vm_area_struct *vma, pmd_t *pmd, · 160 unmodified lines | ||
| 161 | 161 | return pages; |
| 162 | 162 | } |
| 163 | 163 | |
| 164 | +/* | |
| 165 | + * Used when setting automatic NUMA hinting protection where it is | |
| 166 | + * critical that a numa hinting PMD is not confused with a bad PMD. | |
| 167 | + */ | |
| 168 | +static inline int pmd_none_or_clear_bad_unless_trans_huge(pmd_t *pmd) | |
| 169 | +{ | |
| 170 | + pmd_t pmdval = pmd_read_atomic(pmd); | |
| 171 | + | |
| 172 | + /* See pmd_none_or_trans_huge_or_clear_bad for info on barrier */ | |
| 173 | +#ifdef CONFIG_TRANSPARENT_HUGEPAGE | |
| 174 | + barrier(); | |
| 175 | +#endif | |
| 176 | + | |
| 177 | + if (pmd_none(pmdval)) | |
| 178 | + return 1; | |
| 179 | + if (pmd_trans_huge(pmdval)) | |
| 180 | + return 0; | |
| 181 | + if (unlikely(pmd_bad(pmdval))) { | |
| 182 | + pmd_clear_bad(pmd); | |
| 183 | + return 1; | |
| 184 | + } | |
| 185 | + | |
| 186 | + return 0; | |
| 187 | +} | |
| 188 | + | |
| 164 | 189 | static inline unsigned long change_pmd_range(struct vm_area_struct *vma, |
| 165 | 190 | pud_t *pud, unsigned long addr, unsigned long end, |
| 166 | 191 | pgprot_t newprot, int dirty_accountable, int prot_numa) |
| @@ -178,8 +203,17 @@ static inline unsigned long change_pmd_range(struct vm_area_struct *vma, · 11 unmodified lines | ||
| 178 | 203 | unsigned long this_pages; |
| 179 | 204 | |
| 180 | 205 | next = pmd_addr_end(addr, end); |
| 181 | − if (!is_swap_pmd(*pmd) && !pmd_trans_huge(*pmd) && !pmd_devmap(*pmd) | |
| 182 | − && pmd_none_or_clear_bad(pmd)) | |
| 206 | + | |
| 207 | + /* | |
| 208 | + * Automatic NUMA balancing walks the tables with mmap_sem | |
| 209 | + * held for read. It's possible a parallel update to occur | |
| 210 | + * between pmd_trans_huge() and a pmd_none_or_clear_bad() | |
| 211 | + * check leading to a false positive and clearing. | |
| 212 | + * Hence, it's necessary to atomically read the PMD value | |
| 213 | + * for all the checks. | |
| 214 | + */ | |
| 215 | + if (!is_swap_pmd(*pmd) && !pmd_devmap(*pmd) && | |
| 216 | + pmd_none_or_clear_bad_unless_trans_huge(pmd)) | |
| 183 | 217 | goto next; |
| 184 | 218 | |
| 185 | 219 | /* invoke the mmu notifier if the pmd is populated */ |
| @@ -41,7 +41,6 @@ · 40 unmodified lines | ||
| 41 | 41 | #include <linux/workqueue.h> |
| 42 | 42 | #include <linux/slab.h> |
| 43 | 43 | #include <linux/spinlock.h> |
| 44 | −#include <linux/rwlock.h> | |
| 45 | 44 | #include <linux/zpool.h> |
| 46 | 45 | #include <linux/magic.h> |
| 47 | 46 | |
File mode changed from 100644 to 100755.
| @@ -649,8 +649,6 @@ snd_sgio2audio_pcm_pointer(struct snd_pcm_substream *substream) · 648 unmodified lines | ||
| 649 | 649 | static const struct snd_pcm_ops snd_sgio2audio_playback1_ops = { |
| 650 | 650 | .open = snd_sgio2audio_playback1_open, |
| 651 | 651 | .close = snd_sgio2audio_pcm_close, |
| 652 | − .hw_params = snd_sgio2audio_pcm_hw_params, | |
| 653 | − .hw_free = snd_sgio2audio_pcm_hw_free, | |
| 654 | 652 | .prepare = snd_sgio2audio_pcm_prepare, |
| 655 | 653 | .trigger = snd_sgio2audio_pcm_trigger, |
| 656 | 654 | .pointer = snd_sgio2audio_pcm_pointer, |
| @@ -659,8 +657,6 @@ static const struct snd_pcm_ops snd_sgio2audio_playback1_ops = { · 2 unmodified lines | ||
| 659 | 657 | static const struct snd_pcm_ops snd_sgio2audio_playback2_ops = { |
| 660 | 658 | .open = snd_sgio2audio_playback2_open, |
| 661 | 659 | .close = snd_sgio2audio_pcm_close, |
| 662 | − .hw_params = snd_sgio2audio_pcm_hw_params, | |
| 663 | − .hw_free = snd_sgio2audio_pcm_hw_free, | |
| 664 | 660 | .prepare = snd_sgio2audio_pcm_prepare, |
| 665 | 661 | .trigger = snd_sgio2audio_pcm_trigger, |
| 666 | 662 | .pointer = snd_sgio2audio_pcm_pointer, |
| @@ -669,8 +665,6 @@ static const struct snd_pcm_ops snd_sgio2audio_playback2_ops = { · 2 unmodified lines | ||
| 669 | 665 | static const struct snd_pcm_ops snd_sgio2audio_capture_ops = { |
| 670 | 666 | .open = snd_sgio2audio_capture_open, |
| 671 | 667 | .close = snd_sgio2audio_pcm_close, |
| 672 | − .hw_params = snd_sgio2audio_pcm_hw_params, | |
| 673 | − .hw_free = snd_sgio2audio_pcm_hw_free, | |
| 674 | 668 | .prepare = snd_sgio2audio_pcm_prepare, |
| 675 | 669 | .trigger = snd_sgio2audio_pcm_trigger, |
| 676 | 670 | .pointer = snd_sgio2audio_pcm_pointer, |
| @@ -2447,6 +2447,7 @@ static const struct snd_pci_quirk alc882_fixup_tbl[] = { · 2446 unmodified lines | ||
| 2447 | 2447 | SND_PCI_QUIRK(0x1071, 0x8258, "Evesham Voyaeger", ALC882_FIXUP_EAPD), |
| 2448 | 2448 | SND_PCI_QUIRK(0x1458, 0xa002, "Gigabyte EP45-DS3/Z87X-UD3H", ALC889_FIXUP_FRONT_HP_NO_PRESENCE), |
| 2449 | 2449 | SND_PCI_QUIRK(0x1458, 0xa0b8, "Gigabyte AZ370-Gaming", ALC1220_FIXUP_GB_DUAL_CODECS), |
| 2450 | + SND_PCI_QUIRK(0x1458, 0xa0cd, "Gigabyte X570 Aorus Master", ALC1220_FIXUP_CLEVO_P950), | |
| 2450 | 2451 | SND_PCI_QUIRK(0x1462, 0x1228, "MSI-GP63", ALC1220_FIXUP_CLEVO_P950), |
| 2451 | 2452 | SND_PCI_QUIRK(0x1462, 0x1276, "MSI-GL73", ALC1220_FIXUP_CLEVO_P950), |
| 2452 | 2453 | SND_PCI_QUIRK(0x1462, 0x1293, "MSI-GP65", ALC1220_FIXUP_CLEVO_P950), |
| @@ -5920,7 +5921,8 @@ enum { · 3467 unmodified lines | ||
| 5920 | 5921 | ALC289_FIXUP_DUAL_SPK, |
| 5921 | 5922 | ALC294_FIXUP_SPK2_TO_DAC1, |
| 5922 | 5923 | ALC294_FIXUP_ASUS_DUAL_SPK, |
| 5923 | − | |
| 5924 | + ALC285_FIXUP_THINKPAD_HEADSET_JACK, | |
| 5925 | + ALC294_FIXUP_ASUS_HPE, | |
| 5924 | 5926 | }; |
| 5925 | 5927 | |
| 5926 | 5928 | static const struct hda_fixup alc269_fixups[] = { |
| @@ -6684,6 +6686,8 @@ static const struct hda_fixup alc269_fixups[] = { · 757 unmodified lines | ||
| 6684 | 6686 | [ALC285_FIXUP_SPEAKER2_TO_DAC1] = { |
| 6685 | 6687 | .type = HDA_FIXUP_FUNC, |
| 6686 | 6688 | .v.func = alc285_fixup_speaker2_to_dac1, |
| 6689 | + .chained = true, | |
| 6690 | + .chain_id = ALC269_FIXUP_THINKPAD_ACPI | |
| 6687 | 6691 | }, |
| 6688 | 6692 | [ALC256_FIXUP_DELL_INSPIRON_7559_SUBWOOFER] = { |
| 6689 | 6693 | .type = HDA_FIXUP_PINS, |
| @@ -7040,7 +7044,23 @@ static const struct hda_fixup alc269_fixups[] = { · 350 unmodified lines | ||
| 7040 | 7044 | .chained = true, |
| 7041 | 7045 | .chain_id = ALC294_FIXUP_SPK2_TO_DAC1 |
| 7042 | 7046 | }, |
| 7043 | − | |
| 7047 | + [ALC285_FIXUP_THINKPAD_HEADSET_JACK] = { | |
| 7048 | + .type = HDA_FIXUP_FUNC, | |
| 7049 | + .v.func = alc_fixup_headset_jack, | |
| 7050 | + .chained = true, | |
| 7051 | + .chain_id = ALC285_FIXUP_SPEAKER2_TO_DAC1 | |
| 7052 | + }, | |
| 7053 | + [ALC294_FIXUP_ASUS_HPE] = { | |
| 7054 | + .type = HDA_FIXUP_VERBS, | |
| 7055 | + .v.verbs = (const struct hda_verb[]) { | |
| 7056 | + /* Set EAPD high */ | |
| 7057 | + { 0x20, AC_VERB_SET_COEF_INDEX, 0x0f }, | |
| 7058 | + { 0x20, AC_VERB_SET_PROC_COEF, 0x7774 }, | |
| 7059 | + { } | |
| 7060 | + }, | |
| 7061 | + .chained = true, | |
| 7062 | + .chain_id = ALC294_FIXUP_ASUS_HEADSET_MIC | |
| 7063 | + }, | |
| 7044 | 7064 | }; |
| 7045 | 7065 | |
| 7046 | 7066 | static const struct snd_pci_quirk alc269_fixup_tbl[] = { |
| @@ -7115,6 +7135,8 @@ static const struct snd_pci_quirk alc269_fixup_tbl[] = { · 68 unmodified lines | ||
| 7115 | 7135 | SND_PCI_QUIRK(0x1028, 0x0935, "Dell", ALC274_FIXUP_DELL_AIO_LINEOUT_VERB), |
| 7116 | 7136 | SND_PCI_QUIRK(0x1028, 0x097e, "Dell Precision", ALC289_FIXUP_DUAL_SPK), |
| 7117 | 7137 | SND_PCI_QUIRK(0x1028, 0x097d, "Dell Precision", ALC289_FIXUP_DUAL_SPK), |
| 7138 | + SND_PCI_QUIRK(0x1028, 0x098d, "Dell Precision", ALC233_FIXUP_ASUS_MIC_NO_PRESENCE), | |
| 7139 | + SND_PCI_QUIRK(0x1028, 0x09bf, "Dell Precision", ALC233_FIXUP_ASUS_MIC_NO_PRESENCE), | |
| 7118 | 7140 | SND_PCI_QUIRK(0x1028, 0x164a, "Dell", ALC293_FIXUP_DELL1_MIC_NO_PRESENCE), |
| 7119 | 7141 | SND_PCI_QUIRK(0x1028, 0x164b, "Dell", ALC293_FIXUP_DELL1_MIC_NO_PRESENCE), |
| 7120 | 7142 | SND_PCI_QUIRK(0x103c, 0x1586, "HP", ALC269_FIXUP_HP_MUTE_LED_MIC2), |
| @@ -7204,6 +7226,7 @@ static const struct snd_pci_quirk alc269_fixup_tbl[] = { · 83 unmodified lines | ||
| 7204 | 7226 | SND_PCI_QUIRK(0x1043, 0x16e3, "ASUS UX50", ALC269_FIXUP_STEREO_DMIC), |
| 7205 | 7227 | SND_PCI_QUIRK(0x1043, 0x17d1, "ASUS UX431FL", ALC294_FIXUP_ASUS_DUAL_SPK), |
| 7206 | 7228 | SND_PCI_QUIRK(0x1043, 0x18b1, "Asus MJ401TA", ALC256_FIXUP_ASUS_HEADSET_MIC), |
| 7229 | + SND_PCI_QUIRK(0x1043, 0x19ce, "ASUS B9450FA", ALC294_FIXUP_ASUS_HPE), | |
| 7207 | 7230 | SND_PCI_QUIRK(0x1043, 0x1a13, "Asus G73Jw", ALC269_FIXUP_ASUS_G73JW), |
| 7208 | 7231 | SND_PCI_QUIRK(0x1043, 0x1a30, "ASUS X705UD", ALC256_FIXUP_ASUS_MIC), |
| 7209 | 7232 | SND_PCI_QUIRK(0x1043, 0x1b13, "Asus U41SV", ALC269_FIXUP_INV_DMIC), |
| @@ -7274,8 +7297,8 @@ static const struct snd_pci_quirk alc269_fixup_tbl[] = { · 64 unmodified lines | ||
| 7274 | 7297 | SND_PCI_QUIRK(0x17aa, 0x224c, "Thinkpad", ALC298_FIXUP_TPT470_DOCK), |
| 7275 | 7298 | SND_PCI_QUIRK(0x17aa, 0x224d, "Thinkpad", ALC298_FIXUP_TPT470_DOCK), |
| 7276 | 7299 | SND_PCI_QUIRK(0x17aa, 0x225d, "Thinkpad T480", ALC269_FIXUP_LIMIT_INT_MIC_BOOST), |
| 7277 | − SND_PCI_QUIRK(0x17aa, 0x2292, "Thinkpad X1 Yoga 7th", ALC285_FIXUP_SPEAKER2_TO_DAC1), | |
| 7278 | − SND_PCI_QUIRK(0x17aa, 0x2293, "Thinkpad X1 Carbon 7th", ALC285_FIXUP_SPEAKER2_TO_DAC1), | |
| 7300 | + SND_PCI_QUIRK(0x17aa, 0x2292, "Thinkpad X1 Yoga 7th", ALC285_FIXUP_THINKPAD_HEADSET_JACK), | |
| 7301 | + SND_PCI_QUIRK(0x17aa, 0x2293, "Thinkpad X1 Carbon 7th", ALC285_FIXUP_THINKPAD_HEADSET_JACK), | |
| 7279 | 7302 | SND_PCI_QUIRK(0x17aa, 0x30bb, "ThinkCentre AIO", ALC233_FIXUP_LENOVO_LINE2_MIC_HOTKEY), |
| 7280 | 7303 | SND_PCI_QUIRK(0x17aa, 0x30e2, "ThinkCentre AIO", ALC233_FIXUP_LENOVO_LINE2_MIC_HOTKEY), |
| 7281 | 7304 | SND_PCI_QUIRK(0x17aa, 0x310c, "ThinkCentre Station", ALC294_FIXUP_LENOVO_MIC_LOCATION), |
| @@ -1406,7 +1406,7 @@ config SND_SOC_WM8737 · 1405 unmodified lines | ||
| 1406 | 1406 | depends on SND_SOC_I2C_AND_SPI |
| 1407 | 1407 | |
| 1408 | 1408 | config SND_SOC_WM8741 |
| 1409 | − tristate "Wolfson Microelectronics WM8737 DAC" | |
| 1409 | + tristate "Wolfson Microelectronics WM8741 DAC" | |
| 1410 | 1410 | depends on SND_SOC_I2C_AND_SPI |
| 1411 | 1411 | |
| 1412 | 1412 | config SND_SOC_WM8750 |
| @@ -1564,13 +1564,15 @@ int pcm512x_probe(struct device *dev, struct regmap *regmap) · 1563 unmodified lines | ||
| 1564 | 1564 | } |
| 1565 | 1565 | |
| 1566 | 1566 | pcm512x->sclk = devm_clk_get(dev, NULL); |
| 1567 | − if (PTR_ERR(pcm512x->sclk) == -EPROBE_DEFER) | |
| 1568 | − return -EPROBE_DEFER; | |
| 1567 | + if (PTR_ERR(pcm512x->sclk) == -EPROBE_DEFER) { | |
| 1568 | + ret = -EPROBE_DEFER; | |
| 1569 | + goto err; | |
| 1570 | + } | |
| 1569 | 1571 | if (!IS_ERR(pcm512x->sclk)) { |
| 1570 | 1572 | ret = clk_prepare_enable(pcm512x->sclk); |
| 1571 | 1573 | if (ret != 0) { |
| 1572 | 1574 | dev_err(dev, "Failed to enable SCLK: %d\n", ret); |
| 1573 | − return ret; | |
| 1575 | + goto err; | |
| 1574 | 1576 | } |
| 1575 | 1577 | } |
| 1576 | 1578 | |
| @@ -664,7 +664,7 @@ static int rt1015_hw_params(struct snd_pcm_substream *substream, · 663 unmodified lines | ||
| 664 | 664 | snd_soc_component_update_bits(component, RT1015_TDM_MASTER, |
| 665 | 665 | RT1015_I2S_DL_MASK, val_len); |
| 666 | 666 | snd_soc_component_update_bits(component, RT1015_CLK2, |
| 667 | − RT1015_FS_PD_MASK, pre_div); | |
| 667 | + RT1015_FS_PD_MASK, pre_div << RT1015_FS_PD_SFT); | |
| 668 | 668 | |
| 669 | 669 | return 0; |
| 670 | 670 | } |
| @@ -857,6 +857,7 @@ struct snd_soc_dai_driver rt1015_dai[] = { · 186 unmodified lines | ||
| 857 | 857 | .rates = RT1015_STEREO_RATES, |
| 858 | 858 | .formats = RT1015_FORMATS, |
| 859 | 859 | }, |
| 860 | + .ops = &rt1015_aif_dai_ops, | |
| 860 | 861 | } |
| 861 | 862 | }; |
| 862 | 863 | |
| @@ -215,7 +215,8 @@ static int tas2562_set_bitwidth(struct tas2562_data *tas2562, int bitwidth) · 214 unmodified lines | ||
| 215 | 215 | break; |
| 216 | 216 | |
| 217 | 217 | default: |
| 218 | − dev_info(tas2562->dev, "Not supported params format\n"); | |
| 218 | + dev_info(tas2562->dev, "Unsupported bitwidth format\n"); | |
| 219 | + return -EINVAL; | |
| 219 | 220 | } |
| 220 | 221 | |
| 221 | 222 | ret = snd_soc_component_update_bits(tas2562->component, |
| @@ -251,7 +252,7 @@ static int tas2562_hw_params(struct snd_pcm_substream *substream, · 29 unmodified lines | ||
| 251 | 252 | |
| 252 | 253 | ret = tas2562_set_samplerate(tas2562, params_rate(params)); |
| 253 | 254 | if (ret) |
| 254 | − dev_err(tas2562->dev, "set bitwidth failed, %d\n", ret); | |
| 255 | + dev_err(tas2562->dev, "set sample rate failed, %d\n", ret); | |
| 255 | 256 | |
| 256 | 257 | return ret; |
| 257 | 258 | } |
| @@ -34,8 +34,8 @@ static ssize_t skl_print_pins(struct skl_module_pin *m_pin, char *buf, · 33 unmodified lines | ||
| 34 | 34 | int i; |
| 35 | 35 | ssize_t ret = 0; |
| 36 | 36 | |
| 37 | − for (i = 0; i < max_pin; i++) | |
| 38 | − ret += snprintf(buf + size, MOD_BUF - size, | |
| 37 | + for (i = 0; i < max_pin; i++) { | |
| 38 | + ret += scnprintf(buf + size, MOD_BUF - size, | |
| 39 | 39 | "%s %d\n\tModule %d\n\tInstance %d\n\t" |
| 40 | 40 | "In-used %s\n\tType %s\n" |
| 41 | 41 | "\tState %d\n\tIndex %d\n", |
| @@ -45,13 +45,15 @@ static ssize_t skl_print_pins(struct skl_module_pin *m_pin, char *buf, · 3 unmodified lines | ||
| 45 | 45 | m_pin[i].in_use ? "Used" : "Unused", |
| 46 | 46 | m_pin[i].is_dynamic ? "Dynamic" : "Static", |
| 47 | 47 | m_pin[i].pin_state, i); |
| 48 | + size += ret; | |
| 49 | + } | |
| 48 | 50 | return ret; |
| 49 | 51 | } |
| 50 | 52 | |
| 51 | 53 | static ssize_t skl_print_fmt(struct skl_module_fmt *fmt, char *buf, |
| 52 | 54 | ssize_t size, bool direction) |
| 53 | 55 | { |
| 54 | − return snprintf(buf + size, MOD_BUF - size, | |
| 56 | + return scnprintf(buf + size, MOD_BUF - size, | |
| 55 | 57 | "%s\n\tCh %d\n\tFreq %d\n\tBit depth %d\n\t" |
| 56 | 58 | "Valid bit depth %d\n\tCh config %#x\n\tInterleaving %d\n\t" |
| 57 | 59 | "Sample Type %d\n\tCh Map %#x\n", |
| @@ -75,16 +77,16 @@ static ssize_t module_read(struct file *file, char __user *user_buf, · 17 unmodified lines | ||
| 75 | 77 | if (!buf) |
| 76 | 78 | return -ENOMEM; |
| 77 | 79 | |
| 78 | − ret = snprintf(buf, MOD_BUF, "Module:\n\tUUID %pUL\n\tModule id %d\n" | |
| 80 | + ret = scnprintf(buf, MOD_BUF, "Module:\n\tUUID %pUL\n\tModule id %d\n" | |
| 79 | 81 | "\tInstance id %d\n\tPvt_id %d\n", mconfig->guid, |
| 80 | 82 | mconfig->id.module_id, mconfig->id.instance_id, |
| 81 | 83 | mconfig->id.pvt_id); |
| 82 | 84 | |
| 83 | − ret += snprintf(buf + ret, MOD_BUF - ret, | |
| 85 | + ret += scnprintf(buf + ret, MOD_BUF - ret, | |
| 84 | 86 | "Resources:\n\tCPC %#x\n\tIBS %#x\n\tOBS %#x\t\n", |
| 85 | 87 | res->cpc, res->ibs, res->obs); |
| 86 | 88 | |
| 87 | − ret += snprintf(buf + ret, MOD_BUF - ret, | |
| 89 | + ret += scnprintf(buf + ret, MOD_BUF - ret, | |
| 88 | 90 | "Module data:\n\tCore %d\n\tIn queue %d\n\t" |
| 89 | 91 | "Out queue %d\n\tType %s\n", |
| 90 | 92 | mconfig->core_id, mconfig->max_in_queue, |
| @@ -94,38 +96,38 @@ static ssize_t module_read(struct file *file, char __user *user_buf, · 3 unmodified lines | ||
| 94 | 96 | ret += skl_print_fmt(mconfig->in_fmt, buf, ret, true); |
| 95 | 97 | ret += skl_print_fmt(mconfig->out_fmt, buf, ret, false); |
| 96 | 98 | |
| 97 | − ret += snprintf(buf + ret, MOD_BUF - ret, | |
| 99 | + ret += scnprintf(buf + ret, MOD_BUF - ret, | |
| 98 | 100 | "Fixup:\n\tParams %#x\n\tConverter %#x\n", |
| 99 | 101 | mconfig->params_fixup, mconfig->converter); |
| 100 | 102 | |
| 101 | − ret += snprintf(buf + ret, MOD_BUF - ret, | |
| 103 | + ret += scnprintf(buf + ret, MOD_BUF - ret, | |
| 102 | 104 | "Module Gateway:\n\tType %#x\n\tVbus %#x\n\tHW conn %#x\n\tSlot %#x\n", |
| 103 | 105 | mconfig->dev_type, mconfig->vbus_id, |
| 104 | 106 | mconfig->hw_conn_type, mconfig->time_slot); |
| 105 | 107 | |
| 106 | − ret += snprintf(buf + ret, MOD_BUF - ret, | |
| 108 | + ret += scnprintf(buf + ret, MOD_BUF - ret, | |
| 107 | 109 | "Pipeline:\n\tID %d\n\tPriority %d\n\tConn Type %d\n\t" |
| 108 | 110 | "Pages %#x\n", mconfig->pipe->ppl_id, |
| 109 | 111 | mconfig->pipe->pipe_priority, mconfig->pipe->conn_type, |
| 110 | 112 | mconfig->pipe->memory_pages); |
| 111 | 113 | |
| 112 | − ret += snprintf(buf + ret, MOD_BUF - ret, | |
| 114 | + ret += scnprintf(buf + ret, MOD_BUF - ret, | |
| 113 | 115 | "\tParams:\n\t\tHost DMA %d\n\t\tLink DMA %d\n", |
| 114 | 116 | mconfig->pipe->p_params->host_dma_id, |
| 115 | 117 | mconfig->pipe->p_params->link_dma_id); |
| 116 | 118 | |
| 117 | − ret += snprintf(buf + ret, MOD_BUF - ret, | |
| 119 | + ret += scnprintf(buf + ret, MOD_BUF - ret, | |
| 118 | 120 | "\tPCM params:\n\t\tCh %d\n\t\tFreq %d\n\t\tFormat %d\n", |
| 119 | 121 | mconfig->pipe->p_params->ch, |
| 120 | 122 | mconfig->pipe->p_params->s_freq, |
| 121 | 123 | mconfig->pipe->p_params->s_fmt); |
| 122 | 124 | |
| 123 | − ret += snprintf(buf + ret, MOD_BUF - ret, | |
| 125 | + ret += scnprintf(buf + ret, MOD_BUF - ret, | |
| 124 | 126 | "\tLink %#x\n\tStream %#x\n", |
| 125 | 127 | mconfig->pipe->p_params->linktype, |
| 126 | 128 | mconfig->pipe->p_params->stream); |
| 127 | 129 | |
| 128 | − ret += snprintf(buf + ret, MOD_BUF - ret, | |
| 130 | + ret += scnprintf(buf + ret, MOD_BUF - ret, | |
| 129 | 131 | "\tState %d\n\tPassthru %s\n", |
| 130 | 132 | mconfig->pipe->state, |
| 131 | 133 | mconfig->pipe->passthru ? "true" : "false"); |
| @@ -135,7 +137,7 @@ static ssize_t module_read(struct file *file, char __user *user_buf, · 3 unmodified lines | ||
| 135 | 137 | ret += skl_print_pins(mconfig->m_out_pin, buf, |
| 136 | 138 | mconfig->max_out_queue, ret, false); |
| 137 | 139 | |
| 138 | − ret += snprintf(buf + ret, MOD_BUF - ret, | |
| 140 | + ret += scnprintf(buf + ret, MOD_BUF - ret, | |
| 139 | 141 | "Other:\n\tDomain %d\n\tHomogeneous Input %s\n\t" |
| 140 | 142 | "Homogeneous Output %s\n\tIn Queue Mask %d\n\t" |
| 141 | 143 | "Out Queue Mask %d\n\tDMA ID %d\n\tMem Pages %d\n\t" |
| @@ -191,7 +193,7 @@ static ssize_t fw_softreg_read(struct file *file, char __user *user_buf, · 49 unmodified lines | ||
| 191 | 193 | __ioread32_copy(d->fw_read_buff, fw_reg_addr, w0_stat_sz >> 2); |
| 192 | 194 | |
| 193 | 195 | for (offset = 0; offset < FW_REG_SIZE; offset += 16) { |
| 194 | − ret += snprintf(tmp + ret, FW_REG_BUF - ret, "%#.4x: ", offset); | |
| 196 | + ret += scnprintf(tmp + ret, FW_REG_BUF - ret, "%#.4x: ", offset); | |
| 195 | 197 | hex_dump_to_buffer(d->fw_read_buff + offset, 16, 16, 4, |
| 196 | 198 | tmp + ret, FW_REG_BUF - ret, 0); |
| 197 | 199 | ret += strlen(tmp + ret); |
| @@ -384,9 +384,11 @@ static int skl_clk_dev_probe(struct platform_device *pdev) · 383 unmodified lines | ||
| 384 | 384 | &clks[i], clk_pdata, i); |
| 385 | 385 | |
| 386 | 386 | if (IS_ERR(data->clk[data->avail_clk_cnt])) { |
| 387 | − ret = PTR_ERR(data->clk[data->avail_clk_cnt++]); | |
| 387 | + ret = PTR_ERR(data->clk[data->avail_clk_cnt]); | |
| 388 | 388 | goto err_unreg_skl_clk; |
| 389 | 389 | } |
| 390 | + | |
| 391 | + data->avail_clk_cnt++; | |
| 390 | 392 | } |
| 391 | 393 | |
| 392 | 394 | platform_set_drvdata(pdev, data); |
| @@ -8,6 +8,7 @@ · 7 unmodified lines | ||
| 8 | 8 | #include <linux/module.h> |
| 9 | 9 | #include <sound/pcm_params.h> |
| 10 | 10 | #include <linux/regmap.h> |
| 11 | +#include <linux/reset.h> | |
| 11 | 12 | #include <sound/soc.h> |
| 12 | 13 | #include <sound/soc-dai.h> |
| 13 | 14 | |
| @@ -378,6 +379,11 @@ static int g12a_tohdmitx_probe(struct platform_device *pdev) · 364 unmodified lines | ||
| 378 | 379 | struct device *dev = &pdev->dev; |
| 379 | 380 | void __iomem *regs; |
| 380 | 381 | struct regmap *map; |
| 382 | + int ret; | |
| 383 | + | |
| 384 | + ret = device_reset(dev); | |
| 385 | + if (ret) | |
| 386 | + return ret; | |
| 381 | 387 | |
| 382 | 388 | regs = devm_platform_ioremap_resource(pdev, 0); |
| 383 | 389 | if (IS_ERR(regs)) |
| @@ -451,7 +451,7 @@ int snd_soc_pcm_component_sync_stop(struct snd_pcm_substream *substream) · 450 unmodified lines | ||
| 451 | 451 | int i, ret; |
| 452 | 452 | |
| 453 | 453 | for_each_rtd_components(rtd, i, component) { |
| 454 | − if (component->driver->ioctl) { | |
| 454 | + if (component->driver->sync_stop) { | |
| 455 | 455 | ret = component->driver->sync_stop(component, |
| 456 | 456 | substream); |
| 457 | 457 | if (ret < 0) |
| @@ -299,7 +299,7 @@ static int soc_compr_free_fe(struct snd_compr_stream *cstream) · 298 unmodified lines | ||
| 299 | 299 | for_each_dpcm_be(fe, stream, dpcm) |
| 300 | 300 | dpcm->state = SND_SOC_DPCM_LINK_STATE_FREE; |
| 301 | 301 | |
| 302 | − snd_soc_dapm_stream_stop(fe, stream); | |
| 302 | + dpcm_dapm_stream_event(fe, stream, SND_SOC_DAPM_STREAM_STOP); | |
| 303 | 303 | |
| 304 | 304 | fe->dpcm[stream].state = SND_SOC_DPCM_STATE_CLOSE; |
| 305 | 305 | fe->dpcm[stream].runtime_update = SND_SOC_DPCM_UPDATE_NO; |
| @@ -4772,7 +4772,7 @@ static void soc_dapm_shutdown_dapm(struct snd_soc_dapm_context *dapm) · 4771 unmodified lines | ||
| 4772 | 4772 | continue; |
| 4773 | 4773 | if (w->power) { |
| 4774 | 4774 | dapm_seq_insert(w, &down_list, false); |
| 4775 | − w->power = 0; | |
| 4775 | + w->new_power = 0; | |
| 4776 | 4776 | powerdown = 1; |
| 4777 | 4777 | } |
| 4778 | 4778 | } |
| @@ -2006,7 +2006,7 @@ static int dpcm_fe_dai_shutdown(struct snd_pcm_substream *substream) · 2005 unmodified lines | ||
| 2006 | 2006 | soc_pcm_close(substream); |
| 2007 | 2007 | |
| 2008 | 2008 | /* run the stream event for each BE */ |
| 2009 | − snd_soc_dapm_stream_stop(fe, stream); | |
| 2009 | + dpcm_dapm_stream_event(fe, stream, SND_SOC_DAPM_STREAM_STOP); | |
| 2010 | 2010 | |
| 2011 | 2011 | fe->dpcm[stream].state = SND_SOC_DPCM_STATE_CLOSE; |
| 2012 | 2012 | dpcm_set_fe_update_state(fe, stream, SND_SOC_DPCM_UPDATE_NO); |
| @@ -3171,16 +3171,16 @@ static ssize_t dpcm_show_state(struct snd_soc_pcm_runtime *fe, · 1158 unmodified lines | ||
| 3171 | 3171 | unsigned long flags; |
| 3172 | 3172 | |
| 3173 | 3173 | /* FE state */ |
| 3174 | − offset += snprintf(buf + offset, size - offset, | |
| 3174 | + offset += scnprintf(buf + offset, size - offset, | |
| 3175 | 3175 | "[%s - %s]\n", fe->dai_link->name, |
| 3176 | 3176 | stream ? "Capture" : "Playback"); |
| 3177 | 3177 | |
| 3178 | − offset += snprintf(buf + offset, size - offset, "State: %s\n", | |
| 3178 | + offset += scnprintf(buf + offset, size - offset, "State: %s\n", | |
| 3179 | 3179 | dpcm_state_string(fe->dpcm[stream].state)); |
| 3180 | 3180 | |
| 3181 | 3181 | if ((fe->dpcm[stream].state >= SND_SOC_DPCM_STATE_HW_PARAMS) && |
| 3182 | 3182 | (fe->dpcm[stream].state <= SND_SOC_DPCM_STATE_STOP)) |
| 3183 | − offset += snprintf(buf + offset, size - offset, | |
| 3183 | + offset += scnprintf(buf + offset, size - offset, | |
| 3184 | 3184 | "Hardware Params: " |
| 3185 | 3185 | "Format = %s, Channels = %d, Rate = %d\n", |
| 3186 | 3186 | snd_pcm_format_name(params_format(params)), |
| @@ -3188,10 +3188,10 @@ static ssize_t dpcm_show_state(struct snd_soc_pcm_runtime *fe, · 1 unmodified line | ||
| 3188 | 3188 | params_rate(params)); |
| 3189 | 3189 | |
| 3190 | 3190 | /* BEs state */ |
| 3191 | − offset += snprintf(buf + offset, size - offset, "Backends:\n"); | |
| 3191 | + offset += scnprintf(buf + offset, size - offset, "Backends:\n"); | |
| 3192 | 3192 | |
| 3193 | 3193 | if (list_empty(&fe->dpcm[stream].be_clients)) { |
| 3194 | − offset += snprintf(buf + offset, size - offset, | |
| 3194 | + offset += scnprintf(buf + offset, size - offset, | |
| 3195 | 3195 | " No active DSP links\n"); |
| 3196 | 3196 | goto out; |
| 3197 | 3197 | } |
| @@ -3201,16 +3201,16 @@ static ssize_t dpcm_show_state(struct snd_soc_pcm_runtime *fe, · 3 unmodified lines | ||
| 3201 | 3201 | struct snd_soc_pcm_runtime *be = dpcm->be; |
| 3202 | 3202 | params = &dpcm->hw_params; |
| 3203 | 3203 | |
| 3204 | − offset += snprintf(buf + offset, size - offset, | |
| 3204 | + offset += scnprintf(buf + offset, size - offset, | |
| 3205 | 3205 | "- %s\n", be->dai_link->name); |
| 3206 | 3206 | |
| 3207 | − offset += snprintf(buf + offset, size - offset, | |
| 3207 | + offset += scnprintf(buf + offset, size - offset, | |
| 3208 | 3208 | " State: %s\n", |
| 3209 | 3209 | dpcm_state_string(be->dpcm[stream].state)); |
| 3210 | 3210 | |
| 3211 | 3211 | if ((be->dpcm[stream].state >= SND_SOC_DPCM_STATE_HW_PARAMS) && |
| 3212 | 3212 | (be->dpcm[stream].state <= SND_SOC_DPCM_STATE_STOP)) |
| 3213 | − offset += snprintf(buf + offset, size - offset, | |
| 3213 | + offset += scnprintf(buf + offset, size - offset, | |
| 3214 | 3214 | " Hardware Params: " |
| 3215 | 3215 | "Format = %s, Channels = %d, Rate = %d\n", |
| 3216 | 3216 | snd_pcm_format_name(params_format(params)), |
| @@ -2377,8 +2377,11 @@ static int soc_tplg_link_elems_load(struct soc_tplg *tplg, · 2376 unmodified lines | ||
| 2377 | 2377 | } |
| 2378 | 2378 | |
| 2379 | 2379 | ret = soc_tplg_link_config(tplg, _link); |
| 2380 | − if (ret < 0) | |
| 2380 | + if (ret < 0) { | |
| 2381 | + if (!abi_match) | |
| 2382 | + kfree(_link); | |
| 2381 | 2383 | return ret; |
| 2384 | + } | |
| 2382 | 2385 | |
| 2383 | 2386 | /* offset by version-specific struct size and |
| 2384 | 2387 | * real priv data size |
| @@ -2542,7 +2545,7 @@ static int soc_tplg_manifest_load(struct soc_tplg *tplg, · 157 unmodified lines | ||
| 2542 | 2545 | { |
| 2543 | 2546 | struct snd_soc_tplg_manifest *manifest, *_manifest; |
| 2544 | 2547 | bool abi_match; |
| 2545 | − int err; | |
| 2548 | + int ret = 0; | |
| 2546 | 2549 | |
| 2547 | 2550 | if (tplg->pass != SOC_TPLG_PASS_MANIFEST) |
| 2548 | 2551 | return 0; |
| @@ -2555,19 +2558,19 @@ static int soc_tplg_manifest_load(struct soc_tplg *tplg, · 6 unmodified lines | ||
| 2555 | 2558 | _manifest = manifest; |
| 2556 | 2559 | } else { |
| 2557 | 2560 | abi_match = false; |
| 2558 | − err = manifest_new_ver(tplg, manifest, &_manifest); | |
| 2559 | − if (err < 0) | |
| 2560 | − return err; | |
| 2561 | + ret = manifest_new_ver(tplg, manifest, &_manifest); | |
| 2562 | + if (ret < 0) | |
| 2563 | + return ret; | |
| 2561 | 2564 | } |
| 2562 | 2565 | |
| 2563 | 2566 | /* pass control to component driver for optional further init */ |
| 2564 | 2567 | if (tplg->comp && tplg->ops && tplg->ops->manifest) |
| 2565 | − return tplg->ops->manifest(tplg->comp, tplg->index, _manifest); | |
| 2568 | + ret = tplg->ops->manifest(tplg->comp, tplg->index, _manifest); | |
| 2566 | 2569 | |
| 2567 | 2570 | if (!abi_match) /* free the duplicated one */ |
| 2568 | 2571 | kfree(_manifest); |
| 2569 | 2572 | |
| 2570 | − return 0; | |
| 2573 | + return ret; | |
| 2571 | 2574 | } |
| 2572 | 2575 | |
| 2573 | 2576 | /* validate header magic, size and type */ |
| @@ -499,7 +499,7 @@ int snd_sof_ipc_stream_posn(struct snd_soc_component *scomp, · 498 unmodified lines | ||
| 499 | 499 | |
| 500 | 500 | /* send IPC to the DSP */ |
| 501 | 501 | err = sof_ipc_tx_message(sdev->ipc, |
| 502 | − stream.hdr.cmd, &stream, sizeof(stream), &posn, | |
| 502 | + stream.hdr.cmd, &stream, sizeof(stream), posn, | |
| 503 | 503 | sizeof(*posn)); |
| 504 | 504 | if (err < 0) { |
| 505 | 505 | dev_err(sdev->dev, "error: failed to get stream %d position\n", |
| @@ -1543,20 +1543,20 @@ static int stm32_sai_sub_probe(struct platform_device *pdev) · 1542 unmodified lines | ||
| 1543 | 1543 | return ret; |
| 1544 | 1544 | } |
| 1545 | 1545 | |
| 1546 | − ret = devm_snd_soc_register_component(&pdev->dev, &stm32_component, | |
| 1547 | − &sai->cpu_dai_drv, 1); | |
| 1546 | + ret = snd_dmaengine_pcm_register(&pdev->dev, conf, 0); | |
| 1547 | + if (ret) { | |
| 1548 | + dev_err(&pdev->dev, "Could not register pcm dma\n"); | |
| 1549 | + return ret; | |
| 1550 | + } | |
| 1551 | + | |
| 1552 | + ret = snd_soc_register_component(&pdev->dev, &stm32_component, | |
| 1553 | + &sai->cpu_dai_drv, 1); | |
| 1548 | 1554 | if (ret) |
| 1549 | 1555 | return ret; |
| 1550 | 1556 | |
| 1551 | 1557 | if (STM_SAI_PROTOCOL_IS_SPDIF(sai)) |
| 1552 | 1558 | conf = &stm32_sai_pcm_config_spdif; |
| 1553 | 1559 | |
| 1554 | − ret = devm_snd_dmaengine_pcm_register(&pdev->dev, conf, 0); | |
| 1555 | − if (ret) { | |
| 1556 | − dev_err(&pdev->dev, "Could not register pcm dma\n"); | |
| 1557 | − return ret; | |
| 1558 | − } | |
| 1559 | − | |
| 1560 | 1560 | return 0; |
| 1561 | 1561 | } |
| 1562 | 1562 | |
| @@ -1565,6 +1565,8 @@ static int stm32_sai_sub_remove(struct platform_device *pdev) · 2 unmodified lines | ||
| 1565 | 1565 | struct stm32_sai_sub_data *sai = dev_get_drvdata(&pdev->dev); |
| 1566 | 1566 | |
| 1567 | 1567 | clk_unprepare(sai->pdata->pclk); |
| 1568 | + snd_dmaengine_pcm_unregister(&pdev->dev); | |
| 1569 | + snd_soc_unregister_component(&pdev->dev); | |
| 1568 | 1570 | |
| 1569 | 1571 | return 0; |
| 1570 | 1572 | } |
| @@ -512,6 +512,8 @@ · 511 unmodified lines | ||
| 512 | 512 | #define MSR_K7_HWCR 0xc0010015 |
| 513 | 513 | #define MSR_K7_HWCR_SMMLOCK_BIT 0 |
| 514 | 514 | #define MSR_K7_HWCR_SMMLOCK BIT_ULL(MSR_K7_HWCR_SMMLOCK_BIT) |
| 515 | +#define MSR_K7_HWCR_IRPERF_EN_BIT 30 | |
| 516 | +#define MSR_K7_HWCR_IRPERF_EN BIT_ULL(MSR_K7_HWCR_IRPERF_EN_BIT) | |
| 515 | 517 | #define MSR_K7_FID_VID_CTL 0xc0010041 |
| 516 | 518 | #define MSR_K7_FID_VID_STATUS 0xc0010042 |
| 517 | 519 | |
| @@ -390,6 +390,7 @@ struct kvm_sync_regs { · 389 unmodified lines | ||
| 390 | 390 | #define KVM_STATE_NESTED_GUEST_MODE 0x00000001 |
| 391 | 391 | #define KVM_STATE_NESTED_RUN_PENDING 0x00000002 |
| 392 | 392 | #define KVM_STATE_NESTED_EVMCS 0x00000004 |
| 393 | +#define KVM_STATE_NESTED_MTF_PENDING 0x00000008 | |
| 393 | 394 | |
| 394 | 395 | #define KVM_STATE_NESTED_SMM_GUEST_MODE 0x00000001 |
| 395 | 396 | #define KVM_STATE_NESTED_SMM_VMXON 0x00000002 |
| @@ -239,7 +239,6 @@ buildid.*:: · 238 unmodified lines | ||
| 239 | 239 | set buildid.dir to /dev/null. The default is $HOME/.debug |
| 240 | 240 | |
| 241 | 241 | annotate.*:: |
| 242 | − These options work only for TUI. | |
| 243 | 242 | These are in control of addresses, jump function, source code |
| 244 | 243 | in lines of assembly code from a specific program. |
| 245 | 244 | |
| @@ -269,6 +268,8 @@ annotate.*:: · 23 unmodified lines | ||
| 269 | 268 | │ mov (%rdi),%rdx |
| 270 | 269 | │ return n; |
| 271 | 270 | |
| 271 | + This option works with tui, stdio2 browsers. | |
| 272 | + | |
| 272 | 273 | annotate.use_offset:: |
| 273 | 274 | Basing on a first address of a loaded function, offset can be used. |
| 274 | 275 | Instead of using original addresses of assembly code, |
| @@ -287,6 +288,8 @@ annotate.*:: · 12 unmodified lines | ||
| 287 | 288 | |
| 288 | 289 | 368:│ mov 0x8(%r14),%rdi |
| 289 | 290 | |
| 291 | + This option works with tui, stdio2 browsers. | |
| 292 | + | |
| 290 | 293 | annotate.jump_arrows:: |
| 291 | 294 | There can be jump instruction among assembly code. |
| 292 | 295 | Depending on a boolean value of jump_arrows, |
| @@ -306,6 +309,8 @@ annotate.*:: · 13 unmodified lines | ||
| 306 | 309 | │1330: mov %r15,%r10 |
| 307 | 310 | │1333: cmp %r15,%r14 |
| 308 | 311 | |
| 312 | + This option works with tui browser. | |
| 313 | + | |
| 309 | 314 | annotate.show_linenr:: |
| 310 | 315 | When showing source code if this option is 'true', |
| 311 | 316 | line numbers are printed as below. |
| @@ -325,6 +330,8 @@ annotate.*:: · 13 unmodified lines | ||
| 325 | 330 | │ array++; |
| 326 | 331 | │ } |
| 327 | 332 | |
| 333 | + This option works with tui, stdio2 browsers. | |
| 334 | + | |
| 328 | 335 | annotate.show_nr_jumps:: |
| 329 | 336 | Let's see a part of assembly code. |
| 330 | 337 | |
| @@ -335,6 +342,8 @@ annotate.*:: · 4 unmodified lines | ||
| 335 | 342 | |
| 336 | 343 | │1 1382: movb $0x1,-0x270(%rbp) |
| 337 | 344 | |
| 345 | + This option works with tui, stdio2 browsers. | |
| 346 | + | |
| 338 | 347 | annotate.show_total_period:: |
| 339 | 348 | To compare two records on an instruction base, with this option |
| 340 | 349 | provided, display total number of samples that belong to a line |
| @@ -348,11 +357,30 @@ annotate.*:: · 7 unmodified lines | ||
| 348 | 357 | |
| 349 | 358 | 99.93 │ mov %eax,%eax |
| 350 | 359 | |
| 360 | + This option works with tui, stdio2, stdio browsers. | |
| 361 | + | |
| 362 | + annotate.show_nr_samples:: | |
| 363 | + By default perf annotate shows percentage of samples. This option | |
| 364 | + can be used to print absolute number of samples. Ex, when set as | |
| 365 | + false: | |
| 366 | + | |
| 367 | + Percent│ | |
| 368 | + 74.03 │ mov %fs:0x28,%rax | |
| 369 | + | |
| 370 | + When set as true: | |
| 371 | + | |
| 372 | + Samples│ | |
| 373 | + 6 │ mov %fs:0x28,%rax | |
| 374 | + | |
| 375 | + This option works with tui, stdio2, stdio browsers. | |
| 376 | + | |
| 351 | 377 | annotate.offset_level:: |
| 352 | 378 | Default is '1', meaning just jump targets will have offsets show right beside |
| 353 | 379 | the instruction. When set to '2' 'call' instructions will also have its offsets |
| 354 | 380 | shown, 3 or higher will show offsets for all instructions. |
| 355 | 381 | |
| 382 | + This option works with tui, stdio2 browsers. | |
| 383 | + | |
| 356 | 384 | hist.*:: |
| 357 | 385 | hist.percentage:: |
| 358 | 386 | This option control the way to calculate overhead of filtered entries - |
| @@ -490,6 +518,12 @@ top.*:: · 131 unmodified lines | ||
| 490 | 518 | column by default. |
| 491 | 519 | The default is 'true'. |
| 492 | 520 | |
| 521 | + top.call-graph:: | |
| 522 | + This is identical to 'call-graph.record-mode', except it is | |
| 523 | + applicable only for 'top' subcommand. This option ONLY setup | |
| 524 | + the unwind method. To enable 'perf top' to actually use it, | |
| 525 | + the command line option -g must be specified. | |
| 526 | + | |
| 493 | 527 | man.*:: |
| 494 | 528 | man.viewer:: |
| 495 | 529 | This option can assign a tool to view manual pages when 'help' |
| @@ -517,6 +551,16 @@ record.*:: · 21 unmodified lines | ||
| 517 | 551 | But if this option is 'no-cache', it will not update the build-id cache. |
| 518 | 552 | 'skip' skips post-processing and does not update the cache. |
| 519 | 553 | |
| 554 | + record.call-graph:: | |
| 555 | + This is identical to 'call-graph.record-mode', except it is | |
| 556 | + applicable only for 'record' subcommand. This option ONLY setup | |
| 557 | + the unwind method. To enable 'perf record' to actually use it, | |
| 558 | + the command line option -g must be specified. | |
| 559 | + | |
| 560 | + record.aio:: | |
| 561 | + Use 'n' control blocks in asynchronous (Posix AIO) trace writing | |
| 562 | + mode ('n' default: 1, max: 4). | |
| 563 | + | |
| 520 | 564 | diff.*:: |
| 521 | 565 | diff.order:: |
| 522 | 566 | This option sets the number of columns to sort the result. |
| @@ -566,6 +610,11 @@ trace.*:: · 43 unmodified lines | ||
| 566 | 610 | "libbeauty", the default, to use the same argument beautifiers used in the |
| 567 | 611 | strace-like sys_enter+sys_exit lines. |
| 568 | 612 | |
| 613 | +ftrace.*:: | |
| 614 | + ftrace.tracer:: | |
| 615 | + Can be used to select the default tracer. Possible values are | |
| 616 | + 'function' and 'function_graph'. | |
| 617 | + | |
| 569 | 618 | llvm.*:: |
| 570 | 619 | llvm.clang-path:: |
| 571 | 620 | Path to clang. If omit, search it from $PATH. |
| @@ -610,6 +659,29 @@ scripts.*:: · 38 unmodified lines | ||
| 610 | 659 | The script gets the same options passed as a full perf script, |
| 611 | 660 | in particular -i perfdata file, --cpu, --tid |
| 612 | 661 | |
| 662 | +convert.*:: | |
| 663 | + | |
| 664 | + convert.queue-size:: | |
| 665 | + Limit the size of ordered_events queue, so we could control | |
| 666 | + allocation size of perf data files without proper finished | |
| 667 | + round events. | |
| 668 | + | |
| 669 | +intel-pt.*:: | |
| 670 | + | |
| 671 | + intel-pt.cache-divisor:: | |
| 672 | + | |
| 673 | + intel-pt.mispred-all:: | |
| 674 | + If set, Intel PT decoder will set the mispred flag on all | |
| 675 | + branches. | |
| 676 | + | |
| 677 | +auxtrace.*:: | |
| 678 | + | |
| 679 | + auxtrace.dumpdir:: | |
| 680 | + s390 only. The directory to save the auxiliary trace buffer | |
| 681 | + can be changed using this option. Ex, auxtrace.dumpdir=/tmp. | |
| 682 | + If the directory does not exist or has the wrong file type, | |
| 683 | + the current directory is used. | |
| 684 | + | |
| 613 | 685 | SEE ALSO |
| 614 | 686 | -------- |
| 615 | 687 | linkperf:perf[1] |
| @@ -858,21 +858,6 @@ static void cs_etm_recording_free(struct auxtrace_record *itr) · 857 unmodified lines | ||
| 858 | 858 | free(ptr); |
| 859 | 859 | } |
| 860 | 860 | |
| 861 | −static int cs_etm_read_finish(struct auxtrace_record *itr, int idx) | |
| 862 | −{ | |
| 863 | − struct cs_etm_recording *ptr = | |
| 864 | − container_of(itr, struct cs_etm_recording, itr); | |
| 865 | − struct evsel *evsel; | |
| 866 | − | |
| 867 | − evlist__for_each_entry(ptr->evlist, evsel) { | |
| 868 | − if (evsel->core.attr.type == ptr->cs_etm_pmu->type) | |
| 869 | − return perf_evlist__enable_event_idx(ptr->evlist, | |
| 870 | − evsel, idx); | |
| 871 | − } | |
| 872 | − | |
| 873 | − return -EINVAL; | |
| 874 | −} | |
| 875 | − | |
| 876 | 861 | struct auxtrace_record *cs_etm_record_init(int *err) |
| 877 | 862 | { |
| 878 | 863 | struct perf_pmu *cs_etm_pmu; |
| @@ -892,6 +877,7 @@ struct auxtrace_record *cs_etm_record_init(int *err) · 13 unmodified lines | ||
| 892 | 877 | } |
| 893 | 878 | |
| 894 | 879 | ptr->cs_etm_pmu = cs_etm_pmu; |
| 880 | + ptr->itr.pmu = cs_etm_pmu; | |
| 895 | 881 | ptr->itr.parse_snapshot_options = cs_etm_parse_snapshot_options; |
| 896 | 882 | ptr->itr.recording_options = cs_etm_recording_options; |
| 897 | 883 | ptr->itr.info_priv_size = cs_etm_info_priv_size; |
| @@ -901,7 +887,7 @@ struct auxtrace_record *cs_etm_record_init(int *err) · 3 unmodified lines | ||
| 901 | 887 | ptr->itr.snapshot_finish = cs_etm_snapshot_finish; |
| 902 | 888 | ptr->itr.reference = cs_etm_reference; |
| 903 | 889 | ptr->itr.free = cs_etm_recording_free; |
| 904 | − ptr->itr.read_finish = cs_etm_read_finish; | |
| 890 | + ptr->itr.read_finish = auxtrace_record__read_finish; | |
| 905 | 891 | |
| 906 | 892 | *err = 0; |
| 907 | 893 | return &ptr->itr; |
| @@ -158,20 +158,6 @@ static void arm_spe_recording_free(struct auxtrace_record *itr) · 157 unmodified lines | ||
| 158 | 158 | free(sper); |
| 159 | 159 | } |
| 160 | 160 | |
| 161 | −static int arm_spe_read_finish(struct auxtrace_record *itr, int idx) | |
| 162 | −{ | |
| 163 | − struct arm_spe_recording *sper = | |
| 164 | − container_of(itr, struct arm_spe_recording, itr); | |
| 165 | − struct evsel *evsel; | |
| 166 | − | |
| 167 | − evlist__for_each_entry(sper->evlist, evsel) { | |
| 168 | − if (evsel->core.attr.type == sper->arm_spe_pmu->type) | |
| 169 | − return perf_evlist__enable_event_idx(sper->evlist, | |
| 170 | − evsel, idx); | |
| 171 | − } | |
| 172 | − return -EINVAL; | |
| 173 | −} | |
| 174 | − | |
| 175 | 161 | struct auxtrace_record *arm_spe_recording_init(int *err, |
| 176 | 162 | struct perf_pmu *arm_spe_pmu) |
| 177 | 163 | { |
| @@ -189,12 +175,13 @@ struct auxtrace_record *arm_spe_recording_init(int *err, · 11 unmodified lines | ||
| 189 | 175 | } |
| 190 | 176 | |
| 191 | 177 | sper->arm_spe_pmu = arm_spe_pmu; |
| 178 | + sper->itr.pmu = arm_spe_pmu; | |
| 192 | 179 | sper->itr.recording_options = arm_spe_recording_options; |
| 193 | 180 | sper->itr.info_priv_size = arm_spe_info_priv_size; |
| 194 | 181 | sper->itr.info_fill = arm_spe_info_fill; |
| 195 | 182 | sper->itr.free = arm_spe_recording_free; |
| 196 | 183 | sper->itr.reference = arm_spe_reference; |
| 197 | − sper->itr.read_finish = arm_spe_read_finish; | |
| 184 | + sper->itr.read_finish = auxtrace_record__read_finish; | |
| 198 | 185 | sper->itr.alignment = 0; |
| 199 | 186 | |
| 200 | 187 | *err = 0; |
| @@ -517,3 +517,5 @@ · 516 unmodified lines | ||
| 517 | 517 | 433 common fspick sys_fspick |
| 518 | 518 | 434 common pidfd_open sys_pidfd_open |
| 519 | 519 | 435 nospu clone3 ppc_clone3 |
| 520 | +437 common openat2 sys_openat2 | |
| 521 | +438 common pidfd_getfd sys_pidfd_getfd | |
| @@ -413,20 +413,6 @@ out_err: · 412 unmodified lines | ||
| 413 | 413 | return err; |
| 414 | 414 | } |
| 415 | 415 | |
| 416 | −static int intel_bts_read_finish(struct auxtrace_record *itr, int idx) | |
| 417 | −{ | |
| 418 | − struct intel_bts_recording *btsr = | |
| 419 | − container_of(itr, struct intel_bts_recording, itr); | |
| 420 | − struct evsel *evsel; | |
| 421 | − | |
| 422 | − evlist__for_each_entry(btsr->evlist, evsel) { | |
| 423 | − if (evsel->core.attr.type == btsr->intel_bts_pmu->type) | |
| 424 | − return perf_evlist__enable_event_idx(btsr->evlist, | |
| 425 | − evsel, idx); | |
| 426 | − } | |
| 427 | − return -EINVAL; | |
| 428 | −} | |
| 429 | − | |
| 430 | 416 | struct auxtrace_record *intel_bts_recording_init(int *err) |
| 431 | 417 | { |
| 432 | 418 | struct perf_pmu *intel_bts_pmu = perf_pmu__find(INTEL_BTS_PMU_NAME); |
| @@ -447,6 +433,7 @@ struct auxtrace_record *intel_bts_recording_init(int *err) · 14 unmodified lines | ||
| 447 | 433 | } |
| 448 | 434 | |
| 449 | 435 | btsr->intel_bts_pmu = intel_bts_pmu; |
| 436 | + btsr->itr.pmu = intel_bts_pmu; | |
| 450 | 437 | btsr->itr.recording_options = intel_bts_recording_options; |
| 451 | 438 | btsr->itr.info_priv_size = intel_bts_info_priv_size; |
| 452 | 439 | btsr->itr.info_fill = intel_bts_info_fill; |
| @@ -456,7 +443,7 @@ struct auxtrace_record *intel_bts_recording_init(int *err) · 3 unmodified lines | ||
| 456 | 443 | btsr->itr.find_snapshot = intel_bts_find_snapshot; |
| 457 | 444 | btsr->itr.parse_snapshot_options = intel_bts_parse_snapshot_options; |
| 458 | 445 | btsr->itr.reference = intel_bts_reference; |
| 459 | − btsr->itr.read_finish = intel_bts_read_finish; | |
| 446 | + btsr->itr.read_finish = auxtrace_record__read_finish; | |
| 460 | 447 | btsr->itr.alignment = sizeof(struct branch); |
| 461 | 448 | return &btsr->itr; |
| 462 | 449 | } |
| @@ -1166,20 +1166,6 @@ static u64 intel_pt_reference(struct auxtrace_record *itr __maybe_unused) · 1165 unmodified lines | ||
| 1166 | 1166 | return rdtsc(); |
| 1167 | 1167 | } |
| 1168 | 1168 | |
| 1169 | −static int intel_pt_read_finish(struct auxtrace_record *itr, int idx) | |
| 1170 | −{ | |
| 1171 | − struct intel_pt_recording *ptr = | |
| 1172 | − container_of(itr, struct intel_pt_recording, itr); | |
| 1173 | − struct evsel *evsel; | |
| 1174 | − | |
| 1175 | − evlist__for_each_entry(ptr->evlist, evsel) { | |
| 1176 | − if (evsel->core.attr.type == ptr->intel_pt_pmu->type) | |
| 1177 | − return perf_evlist__enable_event_idx(ptr->evlist, evsel, | |
| 1178 | − idx); | |
| 1179 | − } | |
| 1180 | − return -EINVAL; | |
| 1181 | −} | |
| 1182 | − | |
| 1183 | 1169 | struct auxtrace_record *intel_pt_recording_init(int *err) |
| 1184 | 1170 | { |
| 1185 | 1171 | struct perf_pmu *intel_pt_pmu = perf_pmu__find(INTEL_PT_PMU_NAME); |
| @@ -1200,6 +1186,7 @@ struct auxtrace_record *intel_pt_recording_init(int *err) · 14 unmodified lines | ||
| 1200 | 1186 | } |
| 1201 | 1187 | |
| 1202 | 1188 | ptr->intel_pt_pmu = intel_pt_pmu; |
| 1189 | + ptr->itr.pmu = intel_pt_pmu; | |
| 1203 | 1190 | ptr->itr.recording_options = intel_pt_recording_options; |
| 1204 | 1191 | ptr->itr.info_priv_size = intel_pt_info_priv_size; |
| 1205 | 1192 | ptr->itr.info_fill = intel_pt_info_fill; |
| @@ -1209,7 +1196,7 @@ struct auxtrace_record *intel_pt_recording_init(int *err) · 3 unmodified lines | ||
| 1209 | 1196 | ptr->itr.find_snapshot = intel_pt_find_snapshot; |
| 1210 | 1197 | ptr->itr.parse_snapshot_options = intel_pt_parse_snapshot_options; |
| 1211 | 1198 | ptr->itr.reference = intel_pt_reference; |
| 1212 | − ptr->itr.read_finish = intel_pt_read_finish; | |
| 1199 | + ptr->itr.read_finish = auxtrace_record__read_finish; | |
| 1213 | 1200 | /* |
| 1214 | 1201 | * Decoding starts at a PSB packet. Minimum PSB period is 2K so 4K |
| 1215 | 1202 | * should give at least 1 PSB per sample. |
| @@ -566,6 +566,8 @@ int cmd_annotate(int argc, const char **argv) · 565 unmodified lines | ||
| 566 | 566 | if (ret < 0) |
| 567 | 567 | return ret; |
| 568 | 568 | |
| 569 | + annotation_config__init(&annotate.opts); | |
| 570 | + | |
| 569 | 571 | argc = parse_options(argc, argv, options, annotate_usage, 0); |
| 570 | 572 | if (argc) { |
| 571 | 573 | /* |
| @@ -605,8 +607,6 @@ int cmd_annotate(int argc, const char **argv) · 33 unmodified lines | ||
| 605 | 607 | if (ret < 0) |
| 606 | 608 | goto out_delete; |
| 607 | 609 | |
| 608 | − annotation_config__init(); | |
| 609 | − | |
| 610 | 610 | symbol_conf.try_vmlinux_path = true; |
| 611 | 611 | |
| 612 | 612 | ret = symbol__init(&annotate.session->header.env); |
| @@ -449,7 +449,8 @@ static int perf_del_probe_events(struct strfilter *filter) · 448 unmodified lines | ||
| 449 | 449 | ret = probe_file__del_strlist(kfd, klist); |
| 450 | 450 | if (ret < 0) |
| 451 | 451 | goto error; |
| 452 | − } | |
| 452 | + } else if (ret == -ENOMEM) | |
| 453 | + goto error; | |
| 453 | 454 | |
| 454 | 455 | ret2 = probe_file__get_events(ufd, filter, ulist); |
| 455 | 456 | if (ret2 == 0) { |
| @@ -459,7 +460,8 @@ static int perf_del_probe_events(struct strfilter *filter) · 3 unmodified lines | ||
| 459 | 460 | ret2 = probe_file__del_strlist(ufd, ulist); |
| 460 | 461 | if (ret2 < 0) |
| 461 | 462 | goto error; |
| 462 | − } | |
| 463 | + } else if (ret2 == -ENOMEM) | |
| 464 | + goto error; | |
| 463 | 465 | |
| 464 | 466 | if (ret == -ENOENT && ret2 == -ENOENT) |
| 465 | 467 | pr_warning("\"%s\" does not hit any event.\n", str); |
| @@ -1507,7 +1507,7 @@ repeat: · 1506 unmodified lines | ||
| 1507 | 1507 | symbol_conf.priv_size += sizeof(u32); |
| 1508 | 1508 | symbol_conf.sort_by_name = true; |
| 1509 | 1509 | } |
| 1510 | − annotation_config__init(); | |
| 1510 | + annotation_config__init(&report.annotation_opts); | |
| 1511 | 1511 | } |
| 1512 | 1512 | |
| 1513 | 1513 | if (symbol__init(&session->header.env) < 0) |
| @@ -143,7 +143,7 @@ static int perf_top__parse_source(struct perf_top *top, struct hist_entry *he) · 142 unmodified lines | ||
| 143 | 143 | return err; |
| 144 | 144 | } |
| 145 | 145 | |
| 146 | − err = symbol__annotate(&he->ms, evsel, 0, &top->annotation_opts, NULL); | |
| 146 | + err = symbol__annotate(&he->ms, evsel, &top->annotation_opts, NULL); | |
| 147 | 147 | if (err == 0) { |
| 148 | 148 | top->sym_filter_entry = he; |
| 149 | 149 | } else { |
| @@ -1683,7 +1683,7 @@ int cmd_top(int argc, const char **argv) · 1533 unmodified lines | ||
| 1683 | 1683 | if (status < 0) |
| 1684 | 1684 | goto out_delete_evlist; |
| 1685 | 1685 | |
| 1686 | − annotation_config__init(); | |
| 1686 | + annotation_config__init(&top.annotation_opts); | |
| 1687 | 1687 | |
| 1688 | 1688 | symbol_conf.try_vmlinux_path = (symbol_conf.vmlinux_name == NULL); |
| 1689 | 1689 | status = symbol__init(NULL); |
| @@ -3,7 +3,7 @@ · 2 unmodified lines | ||
| 3 | 3 | #ifndef _PERF_BPF_PID_FILTER_ |
| 4 | 4 | #define _PERF_BPF_PID_FILTER_ |
| 5 | 5 | |
| 6 | −#include <bpf/bpf.h> | |
| 6 | +#include <bpf.h> | |
| 7 | 7 | |
| 8 | 8 | #define pid_filter(name) pid_map(name, bool) |
| 9 | 9 | |
| @@ -1,6 +1,6 @@ | ||
| 1 | 1 | // SPDX-License-Identifier: GPL-2.0 |
| 2 | 2 | |
| 3 | −#include <bpf/bpf.h> | |
| 3 | +#include <bpf.h> | |
| 4 | 4 | |
| 5 | 5 | struct bpf_map SEC("maps") __bpf_stdout__ = { |
| 6 | 6 | .type = BPF_MAP_TYPE_PERF_EVENT_ARRAY, |
| @@ -1,6 +1,6 @@ | ||
| 1 | 1 | // SPDX-License-Identifier: LGPL-2.1 |
| 2 | 2 | |
| 3 | −#include <bpf/bpf.h> | |
| 3 | +#include <bpf.h> | |
| 4 | 4 | |
| 5 | 5 | static int (*bpf_get_current_pid_tgid)(void) = (void *)BPF_FUNC_get_current_pid_tgid; |
| 6 | 6 | |
| @@ -14,7 +14,7 @@ add_probe_vfs_getname() { · 13 unmodified lines | ||
| 14 | 14 | if [ $had_vfs_getname -eq 1 ] ; then |
| 15 | 15 | line=$(perf probe -L getname_flags 2>&1 | egrep 'result.*=.*filename;' | sed -r 's/[[:space:]]+([[:digit:]]+)[[:space:]]+result->uptr.*/\1/') |
| 16 | 16 | perf probe -q "vfs_getname=getname_flags:${line} pathname=result->name:string" || \ |
| 17 | − perf probe $verbose "vfs_getname=getname_flags:${line} pathname=filename:string" | |
| 17 | + perf probe $verbose "vfs_getname=getname_flags:${line} pathname=filename:ustring" | |
| 18 | 18 | fi |
| 19 | 19 | } |
| 20 | 20 | |
| @@ -754,10 +754,9 @@ static int annotate_browser__run(struct annotate_browser *browser, · 753 unmodified lines | ||
| 754 | 754 | "? Search string backwards\n"); |
| 755 | 755 | continue; |
| 756 | 756 | case 'r': |
| 757 | − { | |
| 758 | − script_browse(NULL, NULL); | |
| 759 | − continue; | |
| 760 | − } | |
| 757 | + script_browse(NULL, NULL); | |
| 758 | + annotate_browser__show(&browser->b, title, help); | |
| 759 | + continue; | |
| 761 | 760 | case 'k': |
| 762 | 761 | notes->options->show_linenr = !notes->options->show_linenr; |
| 763 | 762 | break; |
| @@ -834,13 +833,13 @@ show_sup_ins: · 70 unmodified lines | ||
| 834 | 833 | map_symbol__annotation_dump(ms, evsel, browser->opts); |
| 835 | 834 | continue; |
| 836 | 835 | case 't': |
| 837 | − if (notes->options->show_total_period) { | |
| 838 | − notes->options->show_total_period = false; | |
| 839 | − notes->options->show_nr_samples = true; | |
| 840 | − } else if (notes->options->show_nr_samples) | |
| 841 | − notes->options->show_nr_samples = false; | |
| 836 | + if (symbol_conf.show_total_period) { | |
| 837 | + symbol_conf.show_total_period = false; | |
| 838 | + symbol_conf.show_nr_samples = true; | |
| 839 | + } else if (symbol_conf.show_nr_samples) | |
| 840 | + symbol_conf.show_nr_samples = false; | |
| 842 | 841 | else |
| 843 | − notes->options->show_total_period = true; | |
| 842 | + symbol_conf.show_total_period = true; | |
| 844 | 843 | annotation__update_column_widths(notes); |
| 845 | 844 | continue; |
| 846 | 845 | case 'c': |
| @@ -174,7 +174,7 @@ static int symbol__gtk_annotate(struct map_symbol *ms, struct evsel *evsel, · 173 unmodified lines | ||
| 174 | 174 | if (ms->map->dso->annotate_warned) |
| 175 | 175 | return -1; |
| 176 | 176 | |
| 177 | − err = symbol__annotate(ms, evsel, 0, &annotation__default_options, NULL); | |
| 177 | + err = symbol__annotate(ms, evsel, &annotation__default_options, NULL); | |
| 178 | 178 | if (err) { |
| 179 | 179 | char msg[BUFSIZ]; |
| 180 | 180 | symbol__strerror_disassemble(ms, err, msg, sizeof(msg)); |
| @@ -1143,93 +1143,70 @@ out: · 1142 unmodified lines | ||
| 1143 | 1143 | } |
| 1144 | 1144 | |
| 1145 | 1145 | struct annotate_args { |
| 1146 | − size_t privsize; | |
| 1147 | − struct arch *arch; | |
| 1148 | − struct map_symbol ms; | |
| 1149 | − struct evsel *evsel; | |
| 1146 | + struct arch *arch; | |
| 1147 | + struct map_symbol ms; | |
| 1148 | + struct evsel *evsel; | |
| 1150 | 1149 | struct annotation_options *options; |
| 1151 | − s64 offset; | |
| 1152 | − char *line; | |
| 1153 | − int line_nr; | |
| 1150 | + s64 offset; | |
| 1151 | + char *line; | |
| 1152 | + int line_nr; | |
| 1154 | 1153 | }; |
| 1155 | 1154 | |
| 1156 | −static void annotation_line__delete(struct annotation_line *al) | |
| 1155 | +static void annotation_line__init(struct annotation_line *al, | |
| 1156 | + struct annotate_args *args, | |
| 1157 | + int nr) | |
| 1157 | 1158 | { |
| 1158 | − void *ptr = (void *) al - al->privsize; | |
| 1159 | + al->offset = args->offset; | |
| 1160 | + al->line = strdup(args->line); | |
| 1161 | + al->line_nr = args->line_nr; | |
| 1162 | + al->data_nr = nr; | |
| 1163 | +} | |
| 1159 | 1164 | |
| 1165 | +static void annotation_line__exit(struct annotation_line *al) | |
| 1166 | +{ | |
| 1160 | 1167 | free_srcline(al->path); |
| 1161 | 1168 | zfree(&al->line); |
| 1162 | − free(ptr); | |
| 1163 | 1169 | } |
| 1164 | 1170 | |
| 1165 | −/* | |
| 1166 | − * Allocating the annotation line data with following | |
| 1167 | − * structure: | |
| 1168 | − * | |
| 1169 | − * -------------------------------------- | |
| 1170 | − * private space | struct annotation_line | |
| 1171 | − * -------------------------------------- | |
| 1172 | − * | |
| 1173 | − * Size of the private space is stored in 'struct annotation_line'. | |
| 1174 | − * | |
| 1175 | − */ | |
| 1176 | −static struct annotation_line * | |
| 1177 | −annotation_line__new(struct annotate_args *args, size_t privsize) | |
| 1171 | +static size_t disasm_line_size(int nr) | |
| 1178 | 1172 | { |
| 1179 | 1173 | struct annotation_line *al; |
| 1180 | − struct evsel *evsel = args->evsel; | |
| 1181 | − size_t size = privsize + sizeof(*al); | |
| 1182 | − int nr = 1; | |
| 1183 | − | |
| 1184 | − if (perf_evsel__is_group_event(evsel)) | |
| 1185 | − nr = evsel->core.nr_members; | |
| 1186 | 1174 | |
| 1187 | − size += sizeof(al->data[0]) * nr; | |
| 1188 | − | |
| 1189 | − al = zalloc(size); | |
| 1190 | − if (al) { | |
| 1191 | − al = (void *) al + privsize; | |
| 1192 | − al->privsize = privsize; | |
| 1193 | − al->offset = args->offset; | |
| 1194 | − al->line = strdup(args->line); | |
| 1195 | − al->line_nr = args->line_nr; | |
| 1196 | − al->data_nr = nr; | |
| 1197 | − } | |
| 1198 | − | |
| 1199 | − return al; | |
| 1175 | + return (sizeof(struct disasm_line) + (sizeof(al->data[0]) * nr)); | |
| 1200 | 1176 | } |
| 1201 | 1177 | |
| 1202 | 1178 | /* |
| 1203 | 1179 | * Allocating the disasm annotation line data with |
| 1204 | 1180 | * following structure: |
| 1205 | 1181 | * |
| 1206 | − * ------------------------------------------------------------ | |
| 1207 | − * privsize space | struct disasm_line | struct annotation_line | |
| 1208 | − * ------------------------------------------------------------ | |
| 1182 | + * ------------------------------------------- | |
| 1183 | + * struct disasm_line | struct annotation_line | |
| 1184 | + * ------------------------------------------- | |
| 1209 | 1185 | * |
| 1210 | 1186 | * We have 'struct annotation_line' member as last member |
| 1211 | 1187 | * of 'struct disasm_line' to have an easy access. |
| 1212 | − * | |
| 1213 | 1188 | */ |
| 1214 | 1189 | static struct disasm_line *disasm_line__new(struct annotate_args *args) |
| 1215 | 1190 | { |
| 1216 | 1191 | struct disasm_line *dl = NULL; |
| 1217 | − struct annotation_line *al; | |
| 1218 | − size_t privsize = args->privsize + offsetof(struct disasm_line, al); | |
| 1192 | + int nr = 1; | |
| 1219 | 1193 | |
| 1220 | − al = annotation_line__new(args, privsize); | |
| 1221 | − if (al != NULL) { | |
| 1222 | − dl = disasm_line(al); | |
| 1194 | + if (perf_evsel__is_group_event(args->evsel)) | |
| 1195 | + nr = args->evsel->core.nr_members; | |
| 1223 | 1196 | |
| 1224 | − if (dl->al.line == NULL) | |
| 1225 | − goto out_delete; | |
| 1197 | + dl = zalloc(disasm_line_size(nr)); | |
| 1198 | + if (!dl) | |
| 1199 | + return NULL; | |
| 1226 | 1200 | |
| 1227 | − if (args->offset != -1) { | |
| 1228 | − if (disasm_line__parse(dl->al.line, &dl->ins.name, &dl->ops.raw) < 0) | |
| 1229 | − goto out_free_line; | |
| 1201 | + annotation_line__init(&dl->al, args, nr); | |
| 1202 | + if (dl->al.line == NULL) | |
| 1203 | + goto out_delete; | |
| 1230 | 1204 | |
| 1231 | − disasm_line__init_ins(dl, args->arch, &args->ms); | |
| 1232 | − } | |
| 1205 | + if (args->offset != -1) { | |
| 1206 | + if (disasm_line__parse(dl->al.line, &dl->ins.name, &dl->ops.raw) < 0) | |
| 1207 | + goto out_free_line; | |
| 1208 | + | |
| 1209 | + disasm_line__init_ins(dl, args->arch, &args->ms); | |
| 1233 | 1210 | } |
| 1234 | 1211 | |
| 1235 | 1212 | return dl; |
| @@ -1248,7 +1225,8 @@ void disasm_line__free(struct disasm_line *dl) · 12 unmodified lines | ||
| 1248 | 1225 | else |
| 1249 | 1226 | ins__delete(&dl->ops); |
| 1250 | 1227 | zfree(&dl->ins.name); |
| 1251 | − annotation_line__delete(&dl->al); | |
| 1228 | + annotation_line__exit(&dl->al); | |
| 1229 | + free(dl); | |
| 1252 | 1230 | } |
| 1253 | 1231 | |
| 1254 | 1232 | int disasm_line__scnprintf(struct disasm_line *dl, char *bf, size_t size, bool raw, int max_ins_name) |
| @@ -2149,13 +2127,12 @@ void symbol__calc_percent(struct symbol *sym, struct evsel *evsel) · 894 unmodified lines | ||
| 2149 | 2127 | annotation__calc_percent(notes, evsel, symbol__size(sym)); |
| 2150 | 2128 | } |
| 2151 | 2129 | |
| 2152 | −int symbol__annotate(struct map_symbol *ms, struct evsel *evsel, size_t privsize, | |
| 2130 | +int symbol__annotate(struct map_symbol *ms, struct evsel *evsel, | |
| 2153 | 2131 | struct annotation_options *options, struct arch **parch) |
| 2154 | 2132 | { |
| 2155 | 2133 | struct symbol *sym = ms->sym; |
| 2156 | 2134 | struct annotation *notes = symbol__annotation(sym); |
| 2157 | 2135 | struct annotate_args args = { |
| 2158 | − .privsize = privsize, | |
| 2159 | 2136 | .evsel = evsel, |
| 2160 | 2137 | .options = options, |
| 2161 | 2138 | }; |
| @@ -2644,6 +2621,8 @@ void annotation__set_offsets(struct annotation *notes, s64 size) · 482 unmodified lines | ||
| 2644 | 2621 | struct annotation_line *al; |
| 2645 | 2622 | |
| 2646 | 2623 | notes->max_line_len = 0; |
| 2624 | + notes->nr_entries = 0; | |
| 2625 | + notes->nr_asm_entries = 0; | |
| 2647 | 2626 | |
| 2648 | 2627 | list_for_each_entry(al, ¬es->src->source, node) { |
| 2649 | 2628 | size_t line_len = strlen(al->line); |
| @@ -2790,7 +2769,7 @@ int symbol__tty_annotate(struct map_symbol *ms, struct evsel *evsel, · 140 unmodified lines | ||
| 2790 | 2769 | struct symbol *sym = ms->sym; |
| 2791 | 2770 | struct rb_root source_line = RB_ROOT; |
| 2792 | 2771 | |
| 2793 | − if (symbol__annotate(ms, evsel, 0, opts, NULL) < 0) | |
| 2772 | + if (symbol__annotate(ms, evsel, opts, NULL) < 0) | |
| 2794 | 2773 | return -1; |
| 2795 | 2774 | |
| 2796 | 2775 | symbol__calc_percent(sym, evsel); |
| @@ -2915,9 +2894,9 @@ static void __annotation_line__write(struct annotation_line *al, struct annotati · 118 unmodified lines | ||
| 2915 | 2894 | percent = annotation_data__percent(&al->data[i], percent_type); |
| 2916 | 2895 | |
| 2917 | 2896 | obj__set_percent_color(obj, percent, current_entry); |
| 2918 | − if (notes->options->show_total_period) { | |
| 2897 | + if (symbol_conf.show_total_period) { | |
| 2919 | 2898 | obj__printf(obj, "%11" PRIu64 " ", al->data[i].he.period); |
| 2920 | − } else if (notes->options->show_nr_samples) { | |
| 2899 | + } else if (symbol_conf.show_nr_samples) { | |
| 2921 | 2900 | obj__printf(obj, "%6" PRIu64 " ", |
| 2922 | 2901 | al->data[i].he.nr_samples); |
| 2923 | 2902 | } else { |
| @@ -2931,8 +2910,8 @@ static void __annotation_line__write(struct annotation_line *al, struct annotati · 7 unmodified lines | ||
| 2931 | 2910 | obj__printf(obj, "%-*s", pcnt_width, " "); |
| 2932 | 2911 | else { |
| 2933 | 2912 | obj__printf(obj, "%-*s", pcnt_width, |
| 2934 | − notes->options->show_total_period ? "Period" : | |
| 2935 | − notes->options->show_nr_samples ? "Samples" : "Percent"); | |
| 2913 | + symbol_conf.show_total_period ? "Period" : | |
| 2914 | + symbol_conf.show_nr_samples ? "Samples" : "Percent"); | |
| 2936 | 2915 | } |
| 2937 | 2916 | } |
| 2938 | 2917 | |
| @@ -3070,7 +3049,7 @@ int symbol__annotate2(struct map_symbol *ms, struct evsel *evsel, · 131 unmodified lines | ||
| 3070 | 3049 | if (perf_evsel__is_group_event(evsel)) |
| 3071 | 3050 | nr_pcnt = evsel->core.nr_members; |
| 3072 | 3051 | |
| 3073 | − err = symbol__annotate(ms, evsel, 0, options, parch); | |
| 3052 | + err = symbol__annotate(ms, evsel, options, parch); | |
| 3074 | 3053 | if (err) |
| 3075 | 3054 | goto out_free_offsets; |
| 3076 | 3055 | |
| @@ -3094,69 +3073,46 @@ out_free_offsets: · 17 unmodified lines | ||
| 3094 | 3073 | return err; |
| 3095 | 3074 | } |
| 3096 | 3075 | |
| 3097 | −#define ANNOTATION__CFG(n) \ | |
| 3098 | − { .name = #n, .value = &annotation__default_options.n, } | |
| 3099 | − | |
| 3100 | −/* | |
| 3101 | − * Keep the entries sorted, they are bsearch'ed | |
| 3102 | − */ | |
| 3103 | −static struct annotation_config { | |
| 3104 | − const char *name; | |
| 3105 | − void *value; | |
| 3106 | −} annotation__configs[] = { | |
| 3107 | − ANNOTATION__CFG(hide_src_code), | |
| 3108 | − ANNOTATION__CFG(jump_arrows), | |
| 3109 | − ANNOTATION__CFG(offset_level), | |
| 3110 | − ANNOTATION__CFG(show_linenr), | |
| 3111 | − ANNOTATION__CFG(show_nr_jumps), | |
| 3112 | − ANNOTATION__CFG(show_nr_samples), | |
| 3113 | − ANNOTATION__CFG(show_total_period), | |
| 3114 | − ANNOTATION__CFG(use_offset), | |
| 3115 | −}; | |
| 3116 | − | |
| 3117 | −#undef ANNOTATION__CFG | |
| 3118 | − | |
| 3119 | −static int annotation_config__cmp(const void *name, const void *cfgp) | |
| 3120 | −{ | |
| 3121 | − const struct annotation_config *cfg = cfgp; | |
| 3122 | − | |
| 3123 | − return strcmp(name, cfg->name); | |
| 3124 | −} | |
| 3125 | − | |
| 3126 | −static int annotation__config(const char *var, const char *value, | |
| 3127 | − void *data __maybe_unused) | |
| 3076 | +static int annotation__config(const char *var, const char *value, void *data) | |
| 3128 | 3077 | { |
| 3129 | − struct annotation_config *cfg; | |
| 3130 | − const char *name; | |
| 3078 | + struct annotation_options *opt = data; | |
| 3131 | 3079 | |
| 3132 | 3080 | if (!strstarts(var, "annotate.")) |
| 3133 | 3081 | return 0; |
| 3134 | 3082 | |
| 3135 | − name = var + 9; | |
| 3136 | − cfg = bsearch(name, annotation__configs, ARRAY_SIZE(annotation__configs), | |
| 3137 | − sizeof(struct annotation_config), annotation_config__cmp); | |
| 3138 | − | |
| 3139 | − if (cfg == NULL) | |
| 3140 | − pr_debug("%s variable unknown, ignoring...", var); | |
| 3141 | − else if (strcmp(var, "annotate.offset_level") == 0) { | |
| 3142 | − perf_config_int(cfg->value, name, value); | |
| 3143 | − | |
| 3144 | − if (*(int *)cfg->value > ANNOTATION__MAX_OFFSET_LEVEL) | |
| 3145 | − *(int *)cfg->value = ANNOTATION__MAX_OFFSET_LEVEL; | |
| 3146 | − else if (*(int *)cfg->value < ANNOTATION__MIN_OFFSET_LEVEL) | |
| 3147 | − *(int *)cfg->value = ANNOTATION__MIN_OFFSET_LEVEL; | |
| 3083 | + if (!strcmp(var, "annotate.offset_level")) { | |
| 3084 | + perf_config_u8(&opt->offset_level, "offset_level", value); | |
| 3085 | + | |
| 3086 | + if (opt->offset_level > ANNOTATION__MAX_OFFSET_LEVEL) | |
| 3087 | + opt->offset_level = ANNOTATION__MAX_OFFSET_LEVEL; | |
| 3088 | + else if (opt->offset_level < ANNOTATION__MIN_OFFSET_LEVEL) | |
| 3089 | + opt->offset_level = ANNOTATION__MIN_OFFSET_LEVEL; | |
| 3090 | + } else if (!strcmp(var, "annotate.hide_src_code")) { | |
| 3091 | + opt->hide_src_code = perf_config_bool("hide_src_code", value); | |
| 3092 | + } else if (!strcmp(var, "annotate.jump_arrows")) { | |
| 3093 | + opt->jump_arrows = perf_config_bool("jump_arrows", value); | |
| 3094 | + } else if (!strcmp(var, "annotate.show_linenr")) { | |
| 3095 | + opt->show_linenr = perf_config_bool("show_linenr", value); | |
| 3096 | + } else if (!strcmp(var, "annotate.show_nr_jumps")) { | |
| 3097 | + opt->show_nr_jumps = perf_config_bool("show_nr_jumps", value); | |
| 3098 | + } else if (!strcmp(var, "annotate.show_nr_samples")) { | |
| 3099 | + symbol_conf.show_nr_samples = perf_config_bool("show_nr_samples", | |
| 3100 | + value); | |
| 3101 | + } else if (!strcmp(var, "annotate.show_total_period")) { | |
| 3102 | + symbol_conf.show_total_period = perf_config_bool("show_total_period", | |
| 3103 | + value); | |
| 3104 | + } else if (!strcmp(var, "annotate.use_offset")) { | |
| 3105 | + opt->use_offset = perf_config_bool("use_offset", value); | |
| 3148 | 3106 | } else { |
| 3149 | − *(bool *)cfg->value = perf_config_bool(name, value); | |
| 3107 | + pr_debug("%s variable unknown, ignoring...", var); | |
| 3150 | 3108 | } |
| 3109 | + | |
| 3151 | 3110 | return 0; |
| 3152 | 3111 | } |
| 3153 | 3112 | |
| 3154 | −void annotation_config__init(void) | |
| 3113 | +void annotation_config__init(struct annotation_options *opt) | |
| 3155 | 3114 | { |
| 3156 | − perf_config(annotation__config, NULL); | |
| 3157 | − | |
| 3158 | − annotation__default_options.show_total_period = symbol_conf.show_total_period; | |
| 3159 | − annotation__default_options.show_nr_samples = symbol_conf.show_nr_samples; | |
| 3115 | + perf_config(annotation__config, opt); | |
| 3160 | 3116 | } |
| 3161 | 3117 | |
| 3162 | 3118 | static unsigned int parse_percent_type(char *str1, char *str2) |
| @@ -83,8 +83,6 @@ struct annotation_options { · 82 unmodified lines | ||
| 83 | 83 | full_path, |
| 84 | 84 | show_linenr, |
| 85 | 85 | show_nr_jumps, |
| 86 | − show_nr_samples, | |
| 87 | − show_total_period, | |
| 88 | 86 | show_minmax_cycle, |
| 89 | 87 | show_asm_raw, |
| 90 | 88 | annotate_src; |
| @@ -141,7 +139,6 @@ struct annotation_line { · 50 unmodified lines | ||
| 141 | 139 | u64 cycles; |
| 142 | 140 | u64 cycles_max; |
| 143 | 141 | u64 cycles_min; |
| 144 | − size_t privsize; | |
| 145 | 142 | char *path; |
| 146 | 143 | u32 idx; |
| 147 | 144 | int idx_asm; |
| @@ -309,7 +306,7 @@ static inline int annotation__cycles_width(struct annotation *notes) · 161 unmodified lines | ||
| 309 | 306 | |
| 310 | 307 | static inline int annotation__pcnt_width(struct annotation *notes) |
| 311 | 308 | { |
| 312 | − return (notes->options->show_total_period ? 12 : 7) * notes->nr_events; | |
| 309 | + return (symbol_conf.show_total_period ? 12 : 7) * notes->nr_events; | |
| 313 | 310 | } |
| 314 | 311 | |
| 315 | 312 | static inline bool annotation_line__filter(struct annotation_line *al, struct annotation *notes) |
| @@ -352,7 +349,7 @@ struct annotated_source *symbol__hists(struct symbol *sym, int nr_hists); · 36 unmodified lines | ||
| 352 | 349 | void symbol__annotate_zero_histograms(struct symbol *sym); |
| 353 | 350 | |
| 354 | 351 | int symbol__annotate(struct map_symbol *ms, |
| 355 | − struct evsel *evsel, size_t privsize, | |
| 352 | + struct evsel *evsel, | |
| 356 | 353 | struct annotation_options *options, |
| 357 | 354 | struct arch **parch); |
| 358 | 355 | int symbol__annotate2(struct map_symbol *ms, |
| @@ -413,7 +410,7 @@ static inline int symbol__tui_annotate(struct map_symbol *ms __maybe_unused, · 54 unmodified lines | ||
| 413 | 410 | } |
| 414 | 411 | #endif |
| 415 | 412 | |
| 416 | −void annotation_config__init(void); | |
| 413 | +void annotation_config__init(struct annotation_options *opt); | |
| 417 | 414 | |
| 418 | 415 | int annotate_parse_percent_type(const struct option *opt, const char *_str, |
| 419 | 416 | int unset); |
| @@ -629,8 +629,10 @@ int auxtrace_record__options(struct auxtrace_record *itr, · 628 unmodified lines | ||
| 629 | 629 | struct evlist *evlist, |
| 630 | 630 | struct record_opts *opts) |
| 631 | 631 | { |
| 632 | − if (itr) | |
| 632 | + if (itr) { | |
| 633 | + itr->evlist = evlist; | |
| 633 | 634 | return itr->recording_options(itr, evlist, opts); |
| 635 | + } | |
| 634 | 636 | return 0; |
| 635 | 637 | } |
| 636 | 638 | |
| @@ -664,6 +666,24 @@ int auxtrace_parse_snapshot_options(struct auxtrace_record *itr, · 27 unmodified lines | ||
| 664 | 666 | return -EINVAL; |
| 665 | 667 | } |
| 666 | 668 | |
| 669 | +int auxtrace_record__read_finish(struct auxtrace_record *itr, int idx) | |
| 670 | +{ | |
| 671 | + struct evsel *evsel; | |
| 672 | + | |
| 673 | + if (!itr->evlist || !itr->pmu) | |
| 674 | + return -EINVAL; | |
| 675 | + | |
| 676 | + evlist__for_each_entry(itr->evlist, evsel) { | |
| 677 | + if (evsel->core.attr.type == itr->pmu->type) { | |
| 678 | + if (evsel->disabled) | |
| 679 | + return 0; | |
| 680 | + return perf_evlist__enable_event_idx(itr->evlist, evsel, | |
| 681 | + idx); | |
| 682 | + } | |
| 683 | + } | |
| 684 | + return -EINVAL; | |
| 685 | +} | |
| 686 | + | |
| 667 | 687 | /* |
| 668 | 688 | * Event record size is 16-bit which results in a maximum size of about 64KiB. |
| 669 | 689 | * Allow about 4KiB for the rest of the sample record, to give a maximum |
| @@ -29,6 +29,7 @@ struct record_opts; · 28 unmodified lines | ||
| 29 | 29 | struct perf_record_auxtrace_error; |
| 30 | 30 | struct perf_record_auxtrace_info; |
| 31 | 31 | struct events_stats; |
| 32 | +struct perf_pmu; | |
| 32 | 33 | |
| 33 | 34 | enum auxtrace_error_type { |
| 34 | 35 | PERF_AUXTRACE_ERROR_ITRACE = 1, |
| @@ -322,6 +323,8 @@ struct auxtrace_mmap_params { · 287 unmodified lines | ||
| 322 | 323 | * @read_finish: called after reading from an auxtrace mmap |
| 323 | 324 | * @alignment: alignment (if any) for AUX area data |
| 324 | 325 | * @default_aux_sample_size: default sample size for --aux sample option |
| 326 | + * @pmu: associated pmu | |
| 327 | + * @evlist: selected events list | |
| 325 | 328 | */ |
| 326 | 329 | struct auxtrace_record { |
| 327 | 330 | int (*recording_options)(struct auxtrace_record *itr, |
| @@ -346,6 +349,8 @@ struct auxtrace_record { · 18 unmodified lines | ||
| 346 | 349 | int (*read_finish)(struct auxtrace_record *itr, int idx); |
| 347 | 350 | unsigned int alignment; |
| 348 | 351 | unsigned int default_aux_sample_size; |
| 352 | + struct perf_pmu *pmu; | |
| 353 | + struct evlist *evlist; | |
| 349 | 354 | }; |
| 350 | 355 | |
| 351 | 356 | /** |
| @@ -537,6 +542,7 @@ int auxtrace_record__find_snapshot(struct auxtrace_record *itr, int idx, · 185 unmodified lines | ||
| 537 | 542 | struct auxtrace_mmap *mm, |
| 538 | 543 | unsigned char *data, u64 *head, u64 *old); |
| 539 | 544 | u64 auxtrace_record__reference(struct auxtrace_record *itr); |
| 545 | +int auxtrace_record__read_finish(struct auxtrace_record *itr, int idx); | |
| 540 | 546 | |
| 541 | 547 | int auxtrace_index__auxtrace_event(struct list_head *head, union perf_event *event, |
| 542 | 548 | off_t file_offset); |
| @@ -374,6 +374,18 @@ int perf_config_int(int *dest, const char *name, const char *value) · 373 unmodified lines | ||
| 374 | 374 | return 0; |
| 375 | 375 | } |
| 376 | 376 | |
| 377 | +int perf_config_u8(u8 *dest, const char *name, const char *value) | |
| 378 | +{ | |
| 379 | + long ret = 0; | |
| 380 | + | |
| 381 | + if (!perf_parse_long(value, &ret)) { | |
| 382 | + bad_config(name); | |
| 383 | + return -1; | |
| 384 | + } | |
| 385 | + *dest = ret; | |
| 386 | + return 0; | |
| 387 | +} | |
| 388 | + | |
| 377 | 389 | static int perf_config_bool_or_int(const char *name, const char *value, int *is_bool) |
| 378 | 390 | { |
| 379 | 391 | int ret; |
| @@ -29,6 +29,7 @@ typedef int (*config_fn_t)(const char *, const char *, void *); · 28 unmodified lines | ||
| 29 | 29 | int perf_default_config(const char *, const char *, void *); |
| 30 | 30 | int perf_config(config_fn_t fn, void *); |
| 31 | 31 | int perf_config_int(int *dest, const char *, const char *); |
| 32 | +int perf_config_u8(u8 *dest, const char *name, const char *value); | |
| 32 | 33 | int perf_config_u64(u64 *dest, const char *, const char *); |
| 33 | 34 | int perf_config_bool(const char *, const char *); |
| 34 | 35 | int config_error_nonbool(const char *); |
| @@ -301,10 +301,15 @@ int probe_file__get_events(int fd, struct strfilter *filter, · 300 unmodified lines | ||
| 301 | 301 | p = strchr(ent->s, ':'); |
| 302 | 302 | if ((p && strfilter__compare(filter, p + 1)) || |
| 303 | 303 | strfilter__compare(filter, ent->s)) { |
| 304 | − strlist__add(plist, ent->s); | |
| 304 | + ret = strlist__add(plist, ent->s); | |
| 305 | + if (ret == -ENOMEM) { | |
| 306 | + pr_err("strlist__add failed with -ENOMEM\n"); | |
| 307 | + goto out; | |
| 308 | + } | |
| 305 | 309 | ret = 0; |
| 306 | 310 | } |
| 307 | 311 | } |
| 312 | +out: | |
| 308 | 313 | strlist__delete(namelist); |
| 309 | 314 | |
| 310 | 315 | return ret; |
| @@ -511,7 +516,11 @@ static int probe_cache__load(struct probe_cache *pcache) · 200 unmodified lines | ||
| 511 | 516 | ret = -EINVAL; |
| 512 | 517 | goto out; |
| 513 | 518 | } |
| 514 | − strlist__add(entry->tevlist, buf); | |
| 519 | + ret = strlist__add(entry->tevlist, buf); | |
| 520 | + if (ret == -ENOMEM) { | |
| 521 | + pr_err("strlist__add failed with -ENOMEM\n"); | |
| 522 | + goto out; | |
| 523 | + } | |
| 515 | 524 | } |
| 516 | 525 | } |
| 517 | 526 | out: |
| @@ -672,7 +681,12 @@ int probe_cache__add_entry(struct probe_cache *pcache, · 154 unmodified lines | ||
| 672 | 681 | command = synthesize_probe_trace_command(&tevs[i]); |
| 673 | 682 | if (!command) |
| 674 | 683 | goto out_err; |
| 675 | − strlist__add(entry->tevlist, command); | |
| 684 | + ret = strlist__add(entry->tevlist, command); | |
| 685 | + if (ret == -ENOMEM) { | |
| 686 | + pr_err("strlist__add failed with -ENOMEM\n"); | |
| 687 | + goto out_err; | |
| 688 | + } | |
| 689 | + | |
| 676 | 690 | free(command); |
| 677 | 691 | } |
| 678 | 692 | list_add_tail(&entry->node, &pcache->entries); |
| @@ -853,9 +867,15 @@ int probe_cache__scan_sdt(struct probe_cache *pcache, const char *pathname) · 174 unmodified lines | ||
| 853 | 867 | break; |
| 854 | 868 | } |
| 855 | 869 | |
| 856 | − strlist__add(entry->tevlist, buf); | |
| 870 | + ret = strlist__add(entry->tevlist, buf); | |
| 871 | + | |
| 857 | 872 | free(buf); |
| 858 | 873 | entry = NULL; |
| 874 | + | |
| 875 | + if (ret == -ENOMEM) { | |
| 876 | + pr_err("strlist__add failed with -ENOMEM\n"); | |
| 877 | + break; | |
| 878 | + } | |
| 859 | 879 | } |
| 860 | 880 | if (entry) { |
| 861 | 881 | list_del_init(&entry->node); |
| @@ -0,0 +1,2 @@ | ||
| 1 | +*.sh | |
| 2 | +!run.sh | |
| @@ -2,4 +2,5 @@ pidfd_open_test · 1 unmodified line | ||
| 2 | 2 | pidfd_poll_test |
| 3 | 3 | pidfd_test |
| 4 | 4 | pidfd_wait |
| 5 | +pidfd_fdinfo_test | |
| 5 | 6 | pidfd_getfd_test |