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Merge tag 'qcom-arm64-fixes-for-5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/fixes

Qualcomm ARM64 DT fixes for v5.19 This removes duplicate includes in the sc7180-trogdor files, which accidentally ended up disabling nodes intended to be enabled. It corrects identifiers for CPU6/7 on MSM8994. On SM8450 the UFS node's interconnects property is updated to match the #interconnect-cells, avoiding sync_state issues and the GIC ITS is defined, to correct the references from the PCIe nodes. On SDM845 the display subsystem's AHB clock is corrected and on msm8992 devices, the supplies for lvs 1 and 2 are correctly specified. Lastly, a welcome addition of Konrad as reviewer for the Qualcomm SoC. * tag 'qcom-arm64-fixes-for-5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: arm64: dts: qcom: msm8992-*: Fix vdd_lvs1_2-supply typo MAINTAINERS: Add myself as a reviewer for Qualcomm ARM/64 support arm64: dts: qcom: sdm845: use dispcc AHB clock for mdss node arm64: dts: qcom: sm8450 add ITS device tree node arm64: dts: qcom: msm8994: Fix CPU6/7 reg values arm64: dts: qcom: sm8450: fix interconnects property of UFS node arm64: dts: qcom: Remove duplicate sc7180-trogdor include on lazor/homestar

Arnd Bergmann committed 4 years ago

Commit 7ecd8a72 parents f99d621 5fb77958 files · +20 −9Browse files

Unified · Split

8 files
  1. MAINTAINERS +1 −0
  2. arch/arm64/boot/dts/qcom/msm8992-lg-bullhead.dtsi +1 −1
  3. arch/arm64/boot/dts/qcom/msm8992-xiaomi-libra.dts +1 −1
  4. arch/arm64/boot/dts/qcom/msm8994.dtsi +2 −2
  5. arch/arm64/boot/dts/qcom/sc7180-trogdor-homestar.dtsi +1 −1
  6. arch/arm64/boot/dts/qcom/sc7180-trogdor-lazor.dtsi +1 −1
  7. arch/arm64/boot/dts/qcom/sdm845.dtsi +1 −1
  8. arch/arm64/boot/dts/qcom/sm8450.dtsi +12 −2
MAINTAINERS+1−0
@@ -2540,6 +2540,7 @@ W: http://www.armlinux.org.uk/ · 2539 unmodified lines
25402540 ARM/QUALCOMM SUPPORT
25412541 M: Andy Gross <agross@kernel.org>
25422542 M: Bjorn Andersson <bjorn.andersson@linaro.org>
2543+R: Konrad Dybcio <konrad.dybcio@somainline.org>
25432544 L: linux-arm-msm@vger.kernel.org
25442545 S: Maintained
25452546 T: git git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux.git
arch/arm64/boot/dts/qcom/msm8992-lg-bullhead.dtsi+1−1
@@ -74,7 +74,7 @@ · 73 unmodified lines
7474 vdd_l17_29-supply = <&vph_pwr>;
7575 vdd_l20_21-supply = <&vph_pwr>;
7676 vdd_l25-supply = <&pm8994_s5>;
77− vdd_lvs1_2 = <&pm8994_s4>;
77+ vdd_lvs1_2-supply = <&pm8994_s4>;
7878
7979 /* S1, S2, S6 and S12 are managed by RPMPD */
8080
arch/arm64/boot/dts/qcom/msm8992-xiaomi-libra.dts+1−1
@@ -171,7 +171,7 @@ · 170 unmodified lines
171171 vdd_l17_29-supply = <&vph_pwr>;
172172 vdd_l20_21-supply = <&vph_pwr>;
173173 vdd_l25-supply = <&pm8994_s5>;
174− vdd_lvs1_2 = <&pm8994_s4>;
174+ vdd_lvs1_2-supply = <&pm8994_s4>;
175175
176176 /* S1, S2, S6 and S12 are managed by RPMPD */
177177
arch/arm64/boot/dts/qcom/msm8994.dtsi+2−2
@@ -100,7 +100,7 @@ · 99 unmodified lines
100100 CPU6: cpu@102 {
101101 device_type = "cpu";
102102 compatible = "arm,cortex-a57";
103− reg = <0x0 0x101>;
103+ reg = <0x0 0x102>;
104104 enable-method = "psci";
105105 next-level-cache = <&L2_1>;
106106 };
@@ -108,7 +108,7 @@ · 1 unmodified line
108108 CPU7: cpu@103 {
109109 device_type = "cpu";
110110 compatible = "arm,cortex-a57";
111− reg = <0x0 0x101>;
111+ reg = <0x0 0x103>;
112112 enable-method = "psci";
113113 next-level-cache = <&L2_1>;
114114 };
arch/arm64/boot/dts/qcom/sc7180-trogdor-homestar.dtsi+1−1
@@ -5,7 +5,7 @@ · 4 unmodified lines
55 * Copyright 2021 Google LLC.
66 */
77
8−#include "sc7180-trogdor.dtsi"
8+/* This file must be included after sc7180-trogdor.dtsi */
99
1010 / {
1111 /* BOARD-SPECIFIC TOP LEVEL NODES */
arch/arm64/boot/dts/qcom/sc7180-trogdor-lazor.dtsi+1−1
@@ -5,7 +5,7 @@ · 4 unmodified lines
55 * Copyright 2020 Google LLC.
66 */
77
8−#include "sc7180-trogdor.dtsi"
8+/* This file must be included after sc7180-trogdor.dtsi */
99
1010 &ap_sar_sensor {
1111 semtech,cs0-ground;
arch/arm64/boot/dts/qcom/sdm845.dtsi+1−1
@@ -4244,7 +4244,7 @@ · 4243 unmodified lines
42444244
42454245 power-domains = <&dispcc MDSS_GDSC>;
42464246
4247− clocks = <&gcc GCC_DISP_AHB_CLK>,
4247+ clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>,
42484248 <&dispcc DISP_CC_MDSS_MDP_CLK>;
42494249 clock-names = "iface", "core";
42504250
arch/arm64/boot/dts/qcom/sm8450.dtsi+12−2
@@ -2853,6 +2853,16 @@ · 2852 unmodified lines
28532853 reg = <0x0 0x17100000 0x0 0x10000>, /* GICD */
28542854 <0x0 0x17180000 0x0 0x200000>; /* GICR * 8 */
28552855 interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
2856+ #address-cells = <2>;
2857+ #size-cells = <2>;
2858+ ranges;
2859+
2860+ gic_its: msi-controller@17140000 {
2861+ compatible = "arm,gic-v3-its";
2862+ reg = <0x0 0x17140000 0x0 0x20000>;
2863+ msi-controller;
2864+ #msi-cells = <1>;
2865+ };
28562866 };
28572867
28582868 timer@17420000 {
@@ -3037,8 +3047,8 @@ · 178 unmodified lines
30373047
30383048 iommus = <&apps_smmu 0xe0 0x0>;
30393049
3040− interconnects = <&aggre1_noc MASTER_UFS_MEM &mc_virt SLAVE_EBI1>,
3041− <&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_UFS_MEM_CFG>;
3050+ interconnects = <&aggre1_noc MASTER_UFS_MEM 0 &mc_virt SLAVE_EBI1 0>,
3051+ <&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_UFS_MEM_CFG 0>;
30423052 interconnect-names = "ufs-ddr", "cpu-ufs";
30433053 clock-names =
30443054 "core_clk",