History

Merge tag 'mips_6.14' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux

Pull MIPS updates from Thomas Bogendoerfer: "Cleanups and fixes" * tag 'mips_6.14' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux: MIPS: pci-legacy: Override pci_address_to_pio MIPS: Loongson64: env: Use str_on_off() helper in prom_lefi_init_env() MIPS: migrate to generic rule for built-in DTBs mips: fix shmctl/semctl/msgctl syscall for o32 mips/math-emu: fix emulation of the prefx instruction MIPS: Loongson: Add comments for interface_info MIPS: Loongson64: remove ROM Size unit in boardinfo MIPS: traps: Use str_enabled_disabled() in parity_protection_init() MIPS: ftrace: Declare ftrace_get_parent_ra_addr() as static Revert "MIPS: csrc-r4k: Select HAVE_UNSTABLE_SCHED_CLOCK if SMP && 64BIT" MIPS: Fix the wrong format specifier MIPS: Add a blank line after __HEAD MIPS: kernel: Rename read/write_c0_ecc to read/writec0_errctl

Linus Torvalds committed 1 year ago

Commit 805ba042 parents 816cef9 df1b8d625 files · +52 −71Browse files

Unified · Split

25 files
  1. arch/mips/Kconfig +2 −1
  2. arch/mips/Makefile +0 −3
  3. arch/mips/boot/dts/Makefile +0 −2
  4. arch/mips/boot/dts/brcm/Makefile +0 −2
  5. arch/mips/boot/dts/cavium-octeon/Makefile +0 −2
  6. arch/mips/boot/dts/ingenic/Makefile +0 −2
  7. arch/mips/boot/dts/lantiq/Makefile +0 −2
  8. arch/mips/boot/dts/loongson/Makefile +0 −2
  9. arch/mips/boot/dts/mscc/Makefile +0 −3
  10. arch/mips/boot/dts/mti/Makefile +0 −2
  11. arch/mips/boot/dts/pic32/Makefile +0 −2
  12. arch/mips/boot/dts/ralink/Makefile +0 −2
  13. arch/mips/include/asm/mach-loongson64/boot_param.h +4 −4
  14. arch/mips/include/asm/mipsregs.h +2 −2
  15. arch/mips/kernel/cevt-bcm1480.c +1 −1
  16. arch/mips/kernel/ftrace.c +1 −1
  17. arch/mips/kernel/head.S +1 −0
  18. arch/mips/kernel/mips-mt.c +3 −4
  19. arch/mips/kernel/spram.c +0 −4
  20. arch/mips/kernel/syscalls/syscall_o32.tbl +3 −3
  21. arch/mips/kernel/traps.c +24 −23
  22. arch/mips/loongson64/boardinfo.c +0 −2
  23. arch/mips/loongson64/env.c +2 −1
  24. arch/mips/math-emu/cp1emu.c +1 −1
  25. arch/mips/pci/pci-legacy.c +8 −0
arch/mips/Kconfig+2−1
@@ -29,10 +29,12 @@ config MIPS · 28 unmodified lines
2929 select ARCH_WANT_IPC_PARSE_VERSION
3030 select ARCH_WANT_LD_ORPHAN_WARN
3131 select BUILDTIME_TABLE_SORT
32+ select BUILTIN_DTB_ALL if BUILTIN_DTB
3233 select CLONE_BACKWARDS
3334 select CPU_NO_EFFICIENT_FFS if (TARGET_ISA_REV < 1)
3435 select CPU_PM if CPU_IDLE || SUSPEND
3536 select GENERIC_ATOMIC64 if !64BIT
37+ select GENERIC_BUILTIN_DTB if BUILTIN_DTB
3638 select GENERIC_CMOS_UPDATE
3739 select GENERIC_CPU_AUTOPROBE
3840 select GENERIC_GETTIMEOFDAY
@@ -1084,7 +1086,6 @@ config CSRC_IOASIC · 1045 unmodified lines
10841086
10851087 config CSRC_R4K
10861088 select CLOCKSOURCE_WATCHDOG if CPU_FREQ
1087− select HAVE_UNSTABLE_SCHED_CLOCK if SMP && 64BIT
10881089 bool
10891090
10901091 config CSRC_SB1250
arch/mips/Makefile+0−3
@@ -423,9 +423,6 @@ endif · 422 unmodified lines
423423
424424 CLEAN_FILES += vmlinux.32 vmlinux.64
425425
426−# device-trees
427−core-y += arch/mips/boot/dts/
428−
429426 archprepare:
430427 ifdef CONFIG_MIPS32_N32
431428 @$(kecho) ' Checking missing-syscalls for N32'
arch/mips/boot/dts/Makefile+0−2
@@ -16,5 +16,3 @@ subdir-$(CONFIG_ATH79) += qca · 15 unmodified lines
1616 subdir-$(CONFIG_RALINK) += ralink
1717 subdir-$(CONFIG_MACH_REALTEK_RTL) += realtek
1818 subdir-$(CONFIG_FIT_IMAGE_FDT_XILFPGA) += xilfpga
19−
20−obj-$(CONFIG_BUILTIN_DTB) := $(addsuffix /, $(subdir-y))
arch/mips/boot/dts/brcm/Makefile+0−2
@@ -33,5 +33,3 @@ dtb-$(CONFIG_DT_NONE) += \ · 32 unmodified lines
3333 bcm97420c.dtb \
3434 bcm97425svmb.dtb \
3535 bcm97435svmb.dtb
36−
37−obj-$(CONFIG_BUILTIN_DTB) += $(addsuffix .o, $(dtb-y))
arch/mips/boot/dts/cavium-octeon/Makefile+0−2
@@ -1,4 +1,2 @@
11 # SPDX-License-Identifier: GPL-2.0
22 dtb-$(CONFIG_CAVIUM_OCTEON_SOC) += octeon_3xxx.dtb octeon_68xx.dtb
3−
4−obj-$(CONFIG_BUILTIN_DTB) += $(addsuffix .o, $(dtb-y))
arch/mips/boot/dts/ingenic/Makefile+0−2
@@ -5,5 +5,3 @@ dtb-$(CONFIG_JZ4770_GCW0) += gcw0.dtb · 4 unmodified lines
55 dtb-$(CONFIG_JZ4780_CI20) += ci20.dtb
66 dtb-$(CONFIG_X1000_CU1000_NEO) += cu1000-neo.dtb
77 dtb-$(CONFIG_X1830_CU1830_NEO) += cu1830-neo.dtb
8−
9−obj-$(CONFIG_BUILTIN_DTB) += $(addsuffix .o, $(dtb-y))
arch/mips/boot/dts/lantiq/Makefile+0−2
@@ -1,4 +1,2 @@
11 # SPDX-License-Identifier: GPL-2.0
22 dtb-$(CONFIG_DT_EASY50712) += danube_easy50712.dtb
3−
4−obj-$(CONFIG_BUILTIN_DTB) += $(addsuffix .o, $(dtb-y))
arch/mips/boot/dts/loongson/Makefile+0−2
@@ -5,5 +5,3 @@ dtb-$(CONFIG_MACH_LOONGSON64) += loongson64c_4core_rs780e.dtb · 4 unmodified lines
55 dtb-$(CONFIG_MACH_LOONGSON64) += loongson64c_8core_rs780e.dtb
66 dtb-$(CONFIG_MACH_LOONGSON64) += loongson64g_4core_ls7a.dtb
77 dtb-$(CONFIG_MACH_LOONGSON64) += loongson64v_4core_virtio.dtb
8−
9−obj-$(CONFIG_BUILTIN_DTB) += $(addsuffix .o, $(dtb-y))
arch/mips/boot/dts/mscc/Makefile+0−3
@@ -8,6 +8,3 @@ dtb-$(CONFIG_SOC_VCOREIII) += \ · 7 unmodified lines
88 ocelot_pcb123.dtb \
99 serval_pcb105.dtb \
1010 serval_pcb106.dtb
11−
12−
13−obj-$(CONFIG_BUILTIN_DTB) += $(addsuffix .o, $(dtb-y))
arch/mips/boot/dts/mti/Makefile+0−2
@@ -1,5 +1,3 @@
11 # SPDX-License-Identifier: GPL-2.0
22 dtb-$(CONFIG_MIPS_MALTA) += malta.dtb
33 dtb-$(CONFIG_LEGACY_BOARD_SEAD3) += sead3.dtb
4−
5−obj-$(CONFIG_BUILTIN_DTB) += $(addsuffix .o, $(dtb-y))
arch/mips/boot/dts/pic32/Makefile+0−2
@@ -3,5 +3,3 @@ dtb-$(CONFIG_DTB_PIC32_MZDA_SK) += pic32mzda_sk.dtb · 2 unmodified lines
33
44 dtb-$(CONFIG_DTB_PIC32_NONE) += \
55 pic32mzda_sk.dtb
6−
7−obj-$(CONFIG_BUILTIN_DTB) += $(addsuffix .o, $(dtb-y))
arch/mips/boot/dts/ralink/Makefile+0−2
@@ -10,5 +10,3 @@ dtb-$(CONFIG_SOC_MT7621) += \ · 9 unmodified lines
1010 mt7621-gnubee-gb-pc1.dtb \
1111 mt7621-gnubee-gb-pc2.dtb \
1212 mt7621-tplink-hc220-g5-v1.dtb
13−
14−obj-$(CONFIG_BUILTIN_DTB) += $(addsuffix .o, $(dtb-y))
arch/mips/include/asm/mach-loongson64/boot_param.h+4−4
@@ -128,10 +128,10 @@ struct irq_source_routing_table { · 127 unmodified lines
128128 } __packed;
129129
130130 struct interface_info {
131− u16 vers; /* version of the specificition */
132− u16 size;
133− u8 flag;
134− char description[64];
131+ u16 vers; /* version of the specification */
132+ u16 size; /* size of this interface */
133+ u8 flag; /* used or unused */
134+ char description[64]; /* description for each change */
135135 } __packed;
136136
137137 #define MAX_RESOURCE_NUMBER 128
arch/mips/include/asm/mipsregs.h+2−2
@@ -2039,8 +2039,8 @@ do { \ · 2038 unmodified lines
20392039 #define read_c0_perfcntr3_64() __read_64bit_c0_register($25, 7)
20402040 #define write_c0_perfcntr3_64(val) __write_64bit_c0_register($25, 7, val)
20412041
2042−#define read_c0_ecc() __read_32bit_c0_register($26, 0)
2043−#define write_c0_ecc(val) __write_32bit_c0_register($26, 0, val)
2042+#define read_c0_errctl() __read_32bit_c0_register($26, 0)
2043+#define write_c0_errctl(val) __write_32bit_c0_register($26, 0, val)
20442044
20452045 #define read_c0_derraddr0() __read_ulong_c0_register($26, 1)
20462046 #define write_c0_derraddr0(val) __write_ulong_c0_register($26, 1, val)
arch/mips/kernel/cevt-bcm1480.c+1−1
@@ -103,7 +103,7 @@ void sb1480_clockevent_init(void) · 102 unmodified lines
103103
104104 BUG_ON(cpu > 3); /* Only have 4 general purpose timers */
105105
106− sprintf(name, "bcm1480-counter-%d", cpu);
106+ sprintf(name, "bcm1480-counter-%u", cpu);
107107 cd->name = name;
108108 cd->features = CLOCK_EVT_FEAT_PERIODIC |
109109 CLOCK_EVT_FEAT_ONESHOT;
arch/mips/kernel/ftrace.c+1−1
@@ -248,7 +248,7 @@ int ftrace_disable_ftrace_graph_caller(void) · 247 unmodified lines
248248 #define S_R_SP (0xafb0 << 16) /* s{d,w} R, offset(sp) */
249249 #define OFFSET_MASK 0xffff /* stack offset range: 0 ~ PT_SIZE */
250250
251−unsigned long ftrace_get_parent_ra_addr(unsigned long self_ra, unsigned long
251+static unsigned long ftrace_get_parent_ra_addr(unsigned long self_ra, unsigned long
252252 old_parent_ra, unsigned long parent_ra_addr, unsigned long fp)
253253 {
254254 unsigned long sp, ip, tmp;
arch/mips/kernel/head.S+1−0
@@ -60,6 +60,7 @@ · 59 unmodified lines
6060 .endm
6161
6262 __HEAD
63+
6364 #ifndef CONFIG_NO_EXCEPT_FILL
6465 /*
6566 * Reserved space for exception handlers.
arch/mips/kernel/mips-mt.c+3−4
@@ -122,9 +122,8 @@ void mips_mt_set_cpuoptions(void) · 121 unmodified lines
122122 unsigned long ectlval;
123123 unsigned long itcblkgrn;
124124
125− /* ErrCtl register is known as "ecc" to Linux */
126− ectlval = read_c0_ecc();
127− write_c0_ecc(ectlval | (0x1 << 26));
125+ ectlval = read_c0_errctl();
126+ write_c0_errctl(ectlval | (0x1 << 26));
128127 ehb();
129128 #define INDEX_0 (0x80000000)
130129 #define INDEX_8 (0x80000008)
@@ -145,7 +144,7 @@ void mips_mt_set_cpuoptions(void) · 14 unmodified lines
145144 ehb();
146145 /* Write out to ITU with CACHE op */
147146 cache_op(Index_Store_Tag_D, INDEX_0);
148− write_c0_ecc(ectlval);
147+ write_c0_errctl(ectlval);
149148 ehb();
150149 printk("Mapped %ld ITC cells starting at 0x%08x\n",
151150 ((itcblkgrn & 0x7fe00000) >> 20), itc_base);
arch/mips/kernel/spram.c+0−4
@@ -26,10 +26,6 @@ · 25 unmodified lines
2626
2727 #define ERRCTL_SPRAM (1 << 28)
2828
29−/* errctl access */
30−#define read_c0_errctl(x) read_c0_ecc(x)
31−#define write_c0_errctl(x) write_c0_ecc(x)
32−
3329 /*
3430 * Different semantics to the set_c0_* function built by __BUILD_SET_C0
3531 */
arch/mips/kernel/syscalls/syscall_o32.tbl+3−3
@@ -382,15 +382,15 @@ · 381 unmodified lines
382382 368 o32 io_pgetevents sys_io_pgetevents_time32 compat_sys_io_pgetevents
383383 # room for arch specific calls
384384 393 o32 semget sys_semget
385−394 o32 semctl sys_semctl compat_sys_semctl
385+394 o32 semctl sys_old_semctl compat_sys_old_semctl
386386 395 o32 shmget sys_shmget
387−396 o32 shmctl sys_shmctl compat_sys_shmctl
387+396 o32 shmctl sys_old_shmctl compat_sys_old_shmctl
388388 397 o32 shmat sys_shmat compat_sys_shmat
389389 398 o32 shmdt sys_shmdt
390390 399 o32 msgget sys_msgget
391391 400 o32 msgsnd sys_msgsnd compat_sys_msgsnd
392392 401 o32 msgrcv sys_msgrcv compat_sys_msgrcv
393−402 o32 msgctl sys_msgctl compat_sys_msgctl
393+402 o32 msgctl sys_old_msgctl compat_sys_old_msgctl
394394 403 o32 clock_gettime64 sys_clock_gettime sys_clock_gettime
395395 404 o32 clock_settime64 sys_clock_settime sys_clock_settime
396396 405 o32 clock_adjtime64 sys_clock_adjtime sys_clock_adjtime
arch/mips/kernel/traps.c+24−23
@@ -38,6 +38,7 @@ · 37 unmodified lines
3838 #include <linux/kdb.h>
3939 #include <linux/irq.h>
4040 #include <linux/perf_event.h>
41+#include <linux/string_choices.h>
4142
4243 #include <asm/addrspace.h>
4344 #include <asm/bootinfo.h>
@@ -1705,10 +1706,10 @@ static inline __init void parity_protection_init(void) · 1661 unmodified lines
17051706 l2parity &= l1parity;
17061707
17071708 /* Probe L1 ECC support */
1708− cp0_ectl = read_c0_ecc();
1709− write_c0_ecc(cp0_ectl | ERRCTL_PE);
1709+ cp0_ectl = read_c0_errctl();
1710+ write_c0_errctl(cp0_ectl | ERRCTL_PE);
17101711 back_to_back_c0_hazard();
1711− cp0_ectl = read_c0_ecc();
1712+ cp0_ectl = read_c0_errctl();
17121713
17131714 /* Probe L2 ECC support */
17141715 gcr_ectl = read_gcr_err_control();
@@ -1727,9 +1728,9 @@ static inline __init void parity_protection_init(void) · 12 unmodified lines
17271728 cp0_ectl |= ERRCTL_PE;
17281729 else
17291730 cp0_ectl &= ~ERRCTL_PE;
1730− write_c0_ecc(cp0_ectl);
1731+ write_c0_errctl(cp0_ectl);
17311732 back_to_back_c0_hazard();
1732− WARN_ON(!!(read_c0_ecc() & ERRCTL_PE) != l1parity);
1733+ WARN_ON(!!(read_c0_errctl() & ERRCTL_PE) != l1parity);
17331734
17341735 /* Configure L2 ECC checking */
17351736 if (l2parity)
@@ -1741,8 +1742,8 @@ static inline __init void parity_protection_init(void) · 5 unmodified lines
17411742 gcr_ectl &= CM_GCR_ERR_CONTROL_L2_ECC_EN;
17421743 WARN_ON(!!gcr_ectl != l2parity);
17431744
1744− pr_info("Cache parity protection %sabled\n",
1745− l1parity ? "en" : "dis");
1745+ pr_info("Cache parity protection %s\n",
1746+ str_enabled_disabled(l1parity));
17461747 return;
17471748 }
17481749
@@ -1761,18 +1762,18 @@ static inline __init void parity_protection_init(void) · 12 unmodified lines
17611762 unsigned long errctl;
17621763 unsigned int l1parity_present, l2parity_present;
17631764
1764− errctl = read_c0_ecc();
1765+ errctl = read_c0_errctl();
17651766 errctl &= ~(ERRCTL_PE|ERRCTL_L2P);
17661767
17671768 /* probe L1 parity support */
1768− write_c0_ecc(errctl | ERRCTL_PE);
1769+ write_c0_errctl(errctl | ERRCTL_PE);
17691770 back_to_back_c0_hazard();
1770− l1parity_present = (read_c0_ecc() & ERRCTL_PE);
1771+ l1parity_present = (read_c0_errctl() & ERRCTL_PE);
17711772
17721773 /* probe L2 parity support */
1773− write_c0_ecc(errctl|ERRCTL_L2P);
1774+ write_c0_errctl(errctl|ERRCTL_L2P);
17741775 back_to_back_c0_hazard();
1775− l2parity_present = (read_c0_ecc() & ERRCTL_L2P);
1776+ l2parity_present = (read_c0_errctl() & ERRCTL_L2P);
17761777
17771778 if (l1parity_present && l2parity_present) {
17781779 if (l1parity)
@@ -1791,20 +1792,20 @@ static inline __init void parity_protection_init(void) · 12 unmodified lines
17911792
17921793 printk(KERN_INFO "Writing ErrCtl register=%08lx\n", errctl);
17931794
1794− write_c0_ecc(errctl);
1795+ write_c0_errctl(errctl);
17951796 back_to_back_c0_hazard();
1796− errctl = read_c0_ecc();
1797+ errctl = read_c0_errctl();
17971798 printk(KERN_INFO "Readback ErrCtl register=%08lx\n", errctl);
17981799
17991800 if (l1parity_present)
1800− printk(KERN_INFO "Cache parity protection %sabled\n",
1801− (errctl & ERRCTL_PE) ? "en" : "dis");
1801+ pr_info("Cache parity protection %s\n",
1802+ str_enabled_disabled(errctl & ERRCTL_PE));
18021803
18031804 if (l2parity_present) {
18041805 if (l1parity_present && l1parity)
18051806 errctl ^= ERRCTL_L2P;
1806− printk(KERN_INFO "L2 cache parity protection %sabled\n",
1807− (errctl & ERRCTL_L2P) ? "en" : "dis");
1807+ pr_info("L2 cache parity protection %s\n",
1808+ str_enabled_disabled(errctl & ERRCTL_L2P));
18081809 }
18091810 }
18101811 break;
@@ -1812,11 +1813,11 @@ static inline __init void parity_protection_init(void) · 1 unmodified line
18121813 case CPU_5KC:
18131814 case CPU_5KE:
18141815 case CPU_LOONGSON32:
1815− write_c0_ecc(0x80000000);
1816+ write_c0_errctl(0x80000000);
18161817 back_to_back_c0_hazard();
18171818 /* Set the PE bit (bit 31) in the c0_errctl register. */
1818− printk(KERN_INFO "Cache parity protection %sabled\n",
1819− (read_c0_ecc() & 0x80000000) ? "en" : "dis");
1819+ pr_info("Cache parity protection %s\n",
1820+ str_enabled_disabled(read_c0_errctl() & 0x80000000));
18201821 break;
18211822 case CPU_20KC:
18221823 case CPU_25KF:
@@ -1887,8 +1888,8 @@ asmlinkage void do_ftlb(void) · 64 unmodified lines
18871888 if ((cpu_has_mips_r2_r6) &&
18881889 (((current_cpu_data.processor_id & 0xff0000) == PRID_COMP_MIPS) ||
18891890 ((current_cpu_data.processor_id & 0xff0000) == PRID_COMP_LOONGSON))) {
1890− pr_err("FTLB error exception, cp0_ecc=0x%08x:\n",
1891− read_c0_ecc());
1891+ pr_err("FTLB error exception, cp0_errctl=0x%08x:\n",
1892+ read_c0_errctl());
18921893 pr_err("cp0_errorepc == %0*lx\n", field, read_c0_errorepc());
18931894 reg_val = read_c0_cacheerr();
18941895 pr_err("c0_cacheerr == %08x\n", reg_val);
arch/mips/loongson64/boardinfo.c+0−2
@@ -21,13 +21,11 @@ static ssize_t boardinfo_show(struct kobject *kobj, · 20 unmodified lines
2121 "BIOS Info\n"
2222 "Vendor\t\t\t: %s\n"
2323 "Version\t\t\t: %s\n"
24− "ROM Size\t\t: %d KB\n"
2524 "Release Date\t\t: %s\n",
2625 strsep(&tmp_board_manufacturer, "-"),
2726 eboard->name,
2827 strsep(&tmp_bios_vendor, "-"),
2928 einter->description,
30− einter->size,
3129 especial->special_name);
3230 }
3331 static struct kobj_attribute boardinfo_attr = __ATTR(boardinfo, 0444,
arch/mips/loongson64/env.c+2−1
@@ -17,6 +17,7 @@ · 16 unmodified lines
1717 #include <linux/dma-map-ops.h>
1818 #include <linux/export.h>
1919 #include <linux/pci_ids.h>
20+#include <linux/string_choices.h>
2021 #include <asm/bootinfo.h>
2122 #include <loongson.h>
2223 #include <boot_param.h>
@@ -162,7 +163,7 @@ void __init prom_lefi_init_env(void) · 139 unmodified lines
162163 dma_default_coherent = !eirq_source->dma_noncoherent;
163164 }
164165
165− pr_info("Firmware: Coherent DMA: %s\n", dma_default_coherent ? "on" : "off");
166+ pr_info("Firmware: Coherent DMA: %s\n", str_on_off(dma_default_coherent));
166167
167168 loongson_sysconf.restart_addr = boot_p->reset_system.ResetWarm;
168169 loongson_sysconf.poweroff_addr = boot_p->reset_system.Shutdown;
arch/mips/math-emu/cp1emu.c+1−1
@@ -1660,7 +1660,7 @@ static int fpux_emu(struct pt_regs *xcp, struct mips_fpu_struct *ctx, · 1659 unmodified lines
16601660 break;
16611661 }
16621662
1663− case 0x3:
1663+ case 0x7:
16641664 if (MIPSInst_FUNC(ir) != pfetch_op)
16651665 return SIGILL;
16661666
arch/mips/pci/pci-legacy.c+8−0
@@ -29,6 +29,14 @@ static LIST_HEAD(controllers); · 28 unmodified lines
2929
3030 static int pci_initialized;
3131
32+unsigned long pci_address_to_pio(phys_addr_t address)
33+{
34+ if (address > IO_SPACE_LIMIT)
35+ return (unsigned long)-1;
36+
37+ return (unsigned long) address;
38+}
39+
3240 /*
3341 * We need to avoid collisions with `mirrored' VGA ports
3442 * and other strange ISA hardware, so we always want the

Keyboard shortcuts

General

Show keyboard shortcuts
?
Focus the current search
/

Issues and pull requests

Open filters
f

Issues, pull requests and Inbox

Select next item
j↓
Select previous item
k↑
Open selected item
Enter
Dismiss filters or clear selection
Esc

Repository code

Go to file
t