In order to manage ringbuffer priority to its fullest userspace should know how many ringbuffers it has to work with. Add a parameter to return the number of active rings.
Unified · Split
| @@ -57,6 +57,9 @@ int adreno_get_param(struct msm_gpu *gpu, uint32_t param, uint64_t *value) · 56 unmodified lines | |||
| 57 | return ret; | 57 | return ret; |
| 58 | } | 58 | } |
| 59 | return -EINVAL; | 59 | return -EINVAL; |
| 60 | case MSM_PARAM_NR_RINGS: | ||
| 61 | *value = gpu->nr_rings; | ||
| 62 | return 0; | ||
| 60 | default: | 63 | default: |
| 61 | DBG("%s: invalid param: %u", gpu->name, param); | 64 | DBG("%s: invalid param: %u", gpu->name, param); |
| 62 | return -EINVAL; | 65 | return -EINVAL; |
| @@ -73,6 +73,7 @@ struct drm_msm_timespec { · 72 unmodified lines | |||
| 73 | #define MSM_PARAM_MAX_FREQ 0x04 | 73 | #define MSM_PARAM_MAX_FREQ 0x04 |
| 74 | #define MSM_PARAM_TIMESTAMP 0x05 | 74 | #define MSM_PARAM_TIMESTAMP 0x05 |
| 75 | #define MSM_PARAM_GMEM_BASE 0x06 | 75 | #define MSM_PARAM_GMEM_BASE 0x06 |
| 76 | #define MSM_PARAM_NR_RINGS 0x07 | ||
| 76 | 77 | ||
| 77 | struct drm_msm_param { | 78 | struct drm_msm_param { |
| 78 | __u32 pipe; /* in, MSM_PIPE_x */ | 79 | __u32 pipe; /* in, MSM_PIPE_x */ |