History

Merge branches 'apple/dart', 'arm/mediatek', 'arm/msm', 'arm/smmu', 'ppc/pamu', 'x86/vt-d', 'x86/amd' and 'vfio-notifier-fix' into next

Joerg Roedel committed 4 years ago

Commit b0dacee8 parents ee53543 de78657 8b9ad48 b11deb2 cae8d1f 0d647b3 42bb5aa fa7e9ec787 files · +9031 −4685Browse files

Unified · Split

787 files
  1. .mailmap +3 −0
  2. Documentation/arm64/memory-tagging-extension.rst +2 −2
  3. Documentation/arm64/silicon-errata.rst +3 −0
  4. Documentation/devicetree/bindings/clock/imx8m-clock.yaml +0 −4
  5. Documentation/devicetree/bindings/clock/microchip,mpfs.yaml +11 −2
  6. Documentation/devicetree/bindings/display/bridge/renesas,lvds.yaml +0 −4
  7. Documentation/devicetree/bindings/display/renesas,du.yaml +0 −23
  8. Documentation/devicetree/bindings/hwmon/ti,tmp421.yaml +3 −4
  9. Documentation/devicetree/bindings/iio/adc/st,stm32-adc.yaml +0 −2
  10. Documentation/devicetree/bindings/iommu/arm,smmu.yaml +23 −2
  11. Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml +23 −11
  12. Documentation/devicetree/bindings/iommu/samsung,sysmmu.yaml +0 −10
  13. Documentation/devicetree/bindings/leds/leds-mt6360.yaml +0 −2
  14. Documentation/devicetree/bindings/mfd/atmel-flexcom.txt +1 −1
  15. Documentation/devicetree/bindings/mmc/nvidia,tegra20-sdhci.yaml +1 −6
  16. Documentation/devicetree/bindings/mtd/gpmi-nand.yaml +0 −2
  17. Documentation/devicetree/bindings/net/can/bosch,c_can.yaml +0 −3
  18. Documentation/devicetree/bindings/net/dsa/realtek.yaml +14 −21
  19. Documentation/devicetree/bindings/pci/apple,pcie.yaml +0 −3
  20. Documentation/devicetree/bindings/phy/brcm,sata-phy.yaml +4 −6
  21. Documentation/devicetree/bindings/pinctrl/pincfg-node.yaml +10 −2
  22. Documentation/devicetree/bindings/regulator/richtek,rt5190a-regulator.yaml +1 −1
  23. Documentation/devicetree/bindings/rtc/allwinner,sun6i-a31-rtc.yaml +0 −10
  24. Documentation/devicetree/bindings/rtc/microchip,mfps-rtc.yaml +12 −3
  25. Documentation/devicetree/bindings/serial/samsung_uart.yaml +0 −4
  26. Documentation/devicetree/bindings/sound/allwinner,sun4i-a10-i2s.yaml +0 −1
  27. Documentation/devicetree/bindings/sound/ti,j721e-cpb-audio.yaml +0 −2
  28. Documentation/devicetree/bindings/thermal/rcar-gen3-thermal.yaml +0 −1
  29. Documentation/devicetree/bindings/ufs/cdns,ufshc.yaml +3 −0
  30. Documentation/devicetree/bindings/usb/samsung,exynos-usb2.yaml +1 −0
  31. Documentation/filesystems/f2fs.rst +0 −70
  32. Documentation/process/embargoed-hardware-issues.rst +4 −3
  33. Documentation/security/siphash.rst +28 −18
  34. Documentation/virt/kvm/api.rst +17 −7
  35. Documentation/vm/page_owner.rst +3 −2
  36. MAINTAINERS +36 −16
  37. Makefile +1 −1
  38. arch/arm/boot/dts/am33xx-l4.dtsi +2 −0
  39. arch/arm/boot/dts/am3517-evm.dts +40 −5
  40. arch/arm/boot/dts/am3517-som.dtsi +9 −0
  41. arch/arm/boot/dts/at91-dvk_su60_somc.dtsi +1 −1
  42. arch/arm/boot/dts/at91-kizbox3-hs.dts +1 −1
  43. arch/arm/boot/dts/at91-kizbox3_common.dtsi +1 −1
  44. arch/arm/boot/dts/at91-q5xr5.dts +1 −1
  45. arch/arm/boot/dts/at91-sama5d27_wlsom1.dtsi +1 −1
  46. arch/arm/boot/dts/at91-sama5d27_wlsom1_ek.dts +1 −1
  47. arch/arm/boot/dts/at91-sama5d2_xplained.dts +1 −1
  48. arch/arm/boot/dts/at91-sama5d3_xplained.dts +4 −4
  49. arch/arm/boot/dts/at91-sama5d4_ma5d4.dtsi +1 −1
  50. arch/arm/boot/dts/at91-sama5d4_xplained.dts +3 −3
  51. arch/arm/boot/dts/at91-sama5d4ek.dts +1 −1
  52. arch/arm/boot/dts/at91-sama7g5ek.dts +2 −2
  53. arch/arm/boot/dts/at91-vinco.dts +1 −1
  54. arch/arm/boot/dts/at91rm9200ek.dts +2 −2
  55. arch/arm/boot/dts/at91sam9260ek.dts +1 −1
  56. arch/arm/boot/dts/at91sam9261ek.dts +1 −1
  57. arch/arm/boot/dts/at91sam9263ek.dts +1 −1
  58. arch/arm/boot/dts/at91sam9g20ek_common.dtsi +44 −1
  59. arch/arm/boot/dts/at91sam9m10g45ek.dts +1 −1
  60. arch/arm/boot/dts/at91sam9n12ek.dts +1 −1
  61. arch/arm/boot/dts/at91sam9rlek.dts +1 −1
  62. arch/arm/boot/dts/at91sam9x5ek.dtsi +1 −1
  63. arch/arm/boot/dts/dra7-l4.dtsi +2 −2
  64. arch/arm/boot/dts/imx6qdl-apalis.dtsi +8 −2
  65. arch/arm/boot/dts/imx6ull-colibri.dtsi +1 −1
  66. arch/arm/boot/dts/logicpd-som-lv-35xx-devkit.dts +15 −0
  67. arch/arm/boot/dts/logicpd-som-lv-37xx-devkit.dts +15 −0
  68. arch/arm/boot/dts/logicpd-som-lv.dtsi +0 −15
  69. arch/arm/boot/dts/omap3-gta04.dtsi +2 −0
  70. arch/arm/boot/dts/sama5d3xmb.dtsi +1 −1
  71. arch/arm/boot/dts/sama5d3xmb_cmp.dtsi +1 −1
  72. arch/arm/boot/dts/sama7g5.dtsi +9 −9
  73. arch/arm/boot/dts/usb_a9263.dts +1 −1
  74. arch/arm/configs/multi_v7_defconfig +1 −0
  75. arch/arm/configs/tegra_defconfig +2 −1
  76. arch/arm/include/asm/io.h +3 −0
  77. arch/arm/mach-exynos/Kconfig +0 −1
  78. arch/arm/mach-omap2/omap4-common.c +2 −0
  79. arch/arm/mm/ioremap.c +8 −0
  80. arch/arm64/boot/dts/amlogic/meson-g12b-a311d.dtsi +0 −40
  81. arch/arm64/boot/dts/amlogic/meson-g12b-s922x.dtsi +0 −40
  82. arch/arm64/boot/dts/amlogic/meson-s4.dtsi +4 −4
  83. arch/arm64/boot/dts/amlogic/meson-sm1-bananapi-m5.dts +1 −0
  84. arch/arm64/boot/dts/amlogic/meson-sm1.dtsi +0 −20
  85. arch/arm64/boot/dts/freescale/imx8mm-venice-gw71xx.dtsi +3 −1
  86. arch/arm64/boot/dts/freescale/imx8mm-venice-gw72xx.dtsi +3 −1
  87. arch/arm64/boot/dts/freescale/imx8mm-venice-gw73xx.dtsi +3 −1
  88. arch/arm64/boot/dts/freescale/imx8mn-ddr4-evk.dts +4 −0
  89. arch/arm64/boot/dts/freescale/imx8mn.dtsi +5 −5
  90. arch/arm64/boot/dts/freescale/imx8mq-tqma8mq.dtsi +1 −1
  91. arch/arm64/boot/dts/freescale/imx8qm.dtsi +1 −1
  92. arch/arm64/boot/dts/nvidia/tegra186-p3310.dtsi +4 −4
  93. arch/arm64/boot/dts/nvidia/tegra186-p3509-0000+p3636-0001.dts +4 −4
  94. arch/arm64/boot/dts/nvidia/tegra194-p2888.dtsi +3 −3
  95. arch/arm64/boot/dts/nvidia/tegra194-p3668.dtsi +3 −3
  96. arch/arm64/boot/dts/nvidia/tegra210-p2180.dtsi +3 −3
  97. arch/arm64/boot/dts/nvidia/tegra210-p2894.dtsi +4 −4
  98. arch/arm64/boot/dts/nvidia/tegra210-p3450-0000.dts +4 −4
  99. arch/arm64/boot/dts/nvidia/tegra210-smaug.dts +2 −2
  100. arch/arm64/include/asm/io.h +4 −0
  101. arch/arm64/include/asm/kvm_emulate.h +1 −0
  102. arch/arm64/kernel/Makefile +4 −0
  103. arch/arm64/kernel/cpu_errata.c +2 −0
  104. arch/arm64/kernel/cpufeature.c +1 −2
  105. arch/arm64/kernel/elfcore.c +1 −1
  106. arch/arm64/kernel/vdso/Makefile +0 −3
  107. arch/arm64/kernel/vdso32/Makefile +0 −3
  108. arch/arm64/kvm/hyp/nvhe/host.S +9 −9
  109. arch/arm64/kvm/inject_fault.c +28 −0
  110. arch/arm64/kvm/mmu.c +19 −0
  111. arch/arm64/kvm/pmu-emul.c +22 −1
  112. arch/arm64/kvm/psci.c +2 −1
  113. arch/arm64/mm/ioremap.c +8 −0
  114. arch/mips/include/asm/timex.h +4 −4
  115. arch/mips/kernel/time.c +3 −8
  116. arch/parisc/Kconfig +1 −0
  117. arch/parisc/configs/generic-32bit_defconfig +3 −1
  118. arch/parisc/configs/generic-64bit_defconfig +2 −1
  119. arch/parisc/include/asm/pgtable.h +1 −1
  120. arch/parisc/kernel/cache.c +3 −15
  121. arch/parisc/kernel/kprobes.c +1 −1
  122. arch/parisc/kernel/patch.c +14 −11
  123. arch/parisc/kernel/processor.c +9 −2
  124. arch/parisc/kernel/setup.c +2 −0
  125. arch/parisc/kernel/time.c +1 −5
  126. arch/parisc/kernel/traps.c +1 −1
  127. arch/parisc/math-emu/dfadd.c +1 −1
  128. arch/parisc/math-emu/dfsub.c +1 −1
  129. arch/parisc/math-emu/sfadd.c +1 −1
  130. arch/parisc/math-emu/sfsub.c +1 −1
  131. arch/powerpc/kernel/vdso/gettimeofday.S +7 −2
  132. arch/powerpc/kvm/book3s_32_sr.S +21 −5
  133. arch/powerpc/platforms/pseries/papr_scm.c +2 −5
  134. arch/powerpc/platforms/pseries/vas-sysfs.c +14 −5
  135. arch/powerpc/platforms/pseries/vas.c +12 −11
  136. arch/powerpc/platforms/pseries/vas.h +1 −1
  137. arch/riscv/boot/dts/microchip/microchip-mpfs-fabric.dtsi +14 −2
  138. arch/riscv/boot/dts/microchip/microchip-mpfs-icicle-kit.dts +1 −1
  139. arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi +5 −5
  140. arch/riscv/configs/defconfig +1 −0
  141. arch/riscv/configs/rv32_defconfig +1 −0
  142. arch/riscv/kernel/patch.c +1 −1
  143. arch/riscv/kvm/vcpu_sbi.c +3 −2
  144. arch/riscv/mm/init.c +19 −2
  145. arch/s390/Makefile +10 −0
  146. arch/s390/kvm/kvm-s390.c +10 −1
  147. arch/s390/mm/gmap.c +7 −0
  148. arch/x86/Kconfig +1 −1
  149. arch/x86/entry/entry_64.S +3 −0
  150. arch/x86/include/asm/intel-family.h +3 −0
  151. arch/x86/include/asm/microcode.h +2 −0
  152. arch/x86/include/asm/pgtable_types.h +0 −4
  153. arch/x86/include/asm/static_call.h +1 −0
  154. arch/x86/kernel/cpu/microcode/core.c +3 −3
  155. arch/x86/kernel/fpu/core.c +26 −41
  156. arch/x86/kernel/unwind_orc.c +4 −4
  157. arch/x86/kvm/cpuid.c +19 −5
  158. arch/x86/kvm/mmu.h +24 −0
  159. arch/x86/kvm/mmu/mmu.c +55 −36
  160. arch/x86/kvm/mmu/spte.c +28 −0
  161. arch/x86/kvm/mmu/spte.h +3 −7
  162. arch/x86/kvm/mmu/tdp_iter.h +32 −2
  163. arch/x86/kvm/mmu/tdp_mmu.c +61 −36
  164. arch/x86/kvm/svm/pmu.c +25 −3
  165. arch/x86/kvm/svm/sev.c +38 −4
  166. arch/x86/kvm/vmx/vmx.c +1 −1
  167. arch/x86/kvm/x86.c +7 −1
  168. arch/x86/lib/copy_user_64.S +52 −35
  169. arch/x86/lib/putuser.S +4 −0
  170. arch/x86/lib/retpoline.S +1 −1
  171. arch/x86/mm/init_64.c +3 −2
  172. arch/x86/mm/pat/set_memory.c +0 −11
  173. arch/x86/pci/xen.c +5 −1
  174. arch/x86/platform/pvh/head.S +1 −0
  175. arch/x86/power/cpu.c +9 −1
  176. arch/x86/xen/xen-head.S +1 −0
  177. block/bfq-iosched.c +9 −3
  178. block/blk-core.c +0 −4
  179. block/blk-iocost.c +11 −1
  180. block/blk-mq.c +1 −8
  181. drivers/acpi/processor_idle.c +2 −6
  182. drivers/amba/bus.c +36 −1
  183. drivers/android/binder.c +9 −1
  184. drivers/base/arch_topology.c +10 −1
  185. drivers/base/dd.c +5 −0
  186. drivers/base/firmware_loader/main.c +17 −0
  187. drivers/base/platform.c +19 −2
  188. drivers/base/topology.c +10 −0
  189. drivers/block/Kconfig +16 −0
  190. drivers/block/ataflop.c +6 −4
  191. drivers/block/floppy.c +40 −21
  192. drivers/bus/fsl-mc/fsl-mc-bus.c +22 −2
  193. drivers/bus/fsl-mc/fsl-mc-msi.c +5 −1
  194. drivers/bus/imx-weim.c +2 −3
  195. drivers/bus/mhi/host/pci_generic.c +2 −0
  196. drivers/bus/sunxi-rsb.c +2 −0
  197. drivers/bus/ti-sysc.c +15 −1
  198. drivers/char/ipmi/ipmi_msghandler.c +6 −1
  199. drivers/char/ipmi/ipmi_si_intf.c +1 −4
  200. drivers/char/random.c +8 −1
  201. drivers/clk/microchip/clk-mpfs.c +164 −31
  202. drivers/clk/qcom/clk-rcg2.c +1 −1
  203. drivers/clk/sunxi-ng/ccu-sun6i-rtc.c +2 −0
  204. drivers/clk/sunxi/clk-sun9i-mmc.c +2 −0
  205. drivers/cpufreq/qcom-cpufreq-hw.c +57 −13
  206. drivers/cpufreq/sun50i-cpufreq-nvmem.c +3 −1
  207. drivers/dma-buf/dma-buf.c +4 −4
  208. drivers/firewire/core-card.c +3 −0
  209. drivers/firewire/core-cdev.c +3 −1
  210. drivers/firewire/core-topology.c +3 −6
  211. drivers/firewire/core-transaction.c +16 −14
  212. drivers/firewire/sbp2.c +7 −6
  213. drivers/gpio/gpio-mvebu.c +0 −7
  214. drivers/gpio/gpio-pca953x.c +2 −2
  215. drivers/gpio/gpio-visconti.c +2 −5
  216. drivers/gpio/gpiolib-of.c +1 −1
  217. drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c +5 −0
  218. drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c +70 −35
  219. drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c +3 −1
  220. drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c +10 −0
  221. drivers/gpu/drm/amd/amdgpu/vi.c +16 −1
  222. drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c +37 −46
  223. drivers/gpu/drm/amd/amdkfd/kfd_priv.h +1 −1
  224. drivers/gpu/drm/amd/amdkfd/kfd_process_queue_manager.c +7 −3
  225. drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c +1 −1
  226. drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c +1 −0
  227. drivers/gpu/drm/amd/display/dc/dcn31/dcn31_init.c +0 −5
  228. drivers/gpu/drm/amd/pm/amdgpu_dpm.c +39 −0
  229. drivers/gpu/drm/amd/pm/legacy-dpm/legacy_dpm.c +0 −10
  230. drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c +0 −35
  231. drivers/gpu/drm/amd/pm/powerplay/amd_powerplay.c +0 −10
  232. drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c +1 −7
  233. drivers/gpu/drm/bridge/Kconfig +1 −0
  234. drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c +26 −8
  235. drivers/gpu/drm/i915/display/intel_fbc.c +1 −1
  236. drivers/gpu/drm/i915/i915_reg.h +3 −3
  237. drivers/gpu/drm/i915/i915_vma.c +7 −4
  238. drivers/gpu/drm/msm/dp/dp_display.c +0 −6
  239. drivers/gpu/drm/msm/dp/dp_panel.c +0 −11
  240. drivers/gpu/drm/msm/dp/dp_panel.h +0 −1
  241. drivers/gpu/drm/nouveau/nouveau_backlight.c +5 −4
  242. drivers/gpu/drm/nouveau/nvkm/engine/device/tegra.c +1 −1
  243. drivers/gpu/drm/sun4i/sun4i_frontend.c +0 −3
  244. drivers/gpu/drm/vc4/vc4_hdmi.c +1 −0
  245. drivers/gpu/drm/vmwgfx/vmwgfx_cmd.c +8 −5
  246. drivers/gpu/drm/vmwgfx/vmwgfx_drv.h +8 −0
  247. drivers/gpu/drm/vmwgfx/vmwgfx_fb.c +1 −1
  248. drivers/gpu/drm/vmwgfx/vmwgfx_fence.c +21 −7
  249. drivers/gpu/drm/vmwgfx/vmwgfx_irq.c +18 −8
  250. drivers/gpu/drm/vmwgfx/vmwgfx_kms.c +5 −3
  251. drivers/hwmon/Kconfig +1 −1
  252. drivers/hwmon/adt7470.c +2 −2
  253. drivers/hwmon/asus_wmi_sensors.c +1 −1
  254. drivers/hwmon/f71882fg.c +3 −2
  255. drivers/hwmon/pmbus/delta-ahe50dc-fan.c +16 −0
  256. drivers/hwmon/pmbus/pmbus_core.c +3 −0
  257. drivers/hwmon/pmbus/xdpe12284.c +1 −1
  258. drivers/hwmon/tmp401.c +11 −0
  259. drivers/idle/intel_idle.c +15 −12
  260. drivers/iio/adc/ad7280a.c +6 −6
  261. drivers/iio/chemical/scd4x.c +4 −1
  262. drivers/iio/dac/ad3552r.c +3 −3
  263. drivers/iio/dac/ad5446.c +1 −1
  264. drivers/iio/dac/ad5592r-base.c +1 −1
  265. drivers/iio/dac/ltc2688.c +1 −1
  266. drivers/iio/dac/ti-dac5571.c +18 −10
  267. drivers/iio/filter/Kconfig +1 −0
  268. drivers/iio/imu/bmi160/bmi160_core.c +14 −6
  269. drivers/iio/imu/inv_icm42600/inv_icm42600_i2c.c +9 −6
  270. drivers/iio/magnetometer/ak8975.c +1 −0
  271. drivers/iio/proximity/sx9324.c +25 −7
  272. drivers/iio/proximity/sx_common.c +1 −0
  273. drivers/infiniband/hw/irdma/cm.c +10 −23
  274. drivers/infiniband/hw/irdma/utils.c +9 −12
  275. drivers/infiniband/hw/irdma/verbs.c +2 −2
  276. drivers/infiniband/sw/rxe/rxe_mcast.c +35 −46
  277. drivers/infiniband/sw/rxe/rxe_resp.c +25 −10
  278. drivers/infiniband/sw/siw/siw_cm.c +4 −3
  279. drivers/interconnect/core.c +7 −1
  280. drivers/interconnect/qcom/sc7180.c +0 −21
  281. drivers/interconnect/qcom/sdx55.c +0 −21
  282. drivers/iommu/amd/amd_iommu_types.h +4 −0
  283. drivers/iommu/amd/init.c +5 −3
  284. drivers/iommu/amd/iommu.c +9 −7
  285. drivers/iommu/amd/iommu_v2.c +11 −1
  286. drivers/iommu/apple-dart.c +5 −5
  287. drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-sva.c +19 −3
  288. drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c +2 −0
  289. drivers/iommu/arm/arm-smmu/arm-smmu-impl.c +2 −1
  290. drivers/iommu/arm/arm-smmu/arm-smmu-nvidia.c +30 −0
  291. drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c +1 −0
  292. drivers/iommu/arm/arm-smmu/arm-smmu.c +5 −3
  293. drivers/iommu/dma-iommu.c +21 −4
  294. drivers/iommu/fsl_pamu.c +3 −0
  295. drivers/iommu/fsl_pamu_domain.c +1 −0
  296. drivers/iommu/intel/iommu.c +140 −103
  297. drivers/iommu/intel/pasid.c +42 −3
  298. drivers/iommu/intel/pasid.h +2 −0
  299. drivers/iommu/intel/svm.c +4 −0
  300. drivers/iommu/iommu.c +260 −103
  301. drivers/iommu/msm_iommu.c +15 −7
  302. drivers/iommu/mtk_iommu.c +709 −271
  303. drivers/iommu/mtk_iommu.h +0 −101
  304. drivers/iommu/mtk_iommu_v1.c +139 −103
  305. drivers/iommu/s390-iommu.c +12 −3
  306. drivers/memory/renesas-rpc-if.c +46 −14
  307. drivers/misc/eeprom/at25.c +11 −8
  308. drivers/mmc/core/mmc.c +19 −4
  309. drivers/mmc/host/sdhci-msm.c +42 −0
  310. drivers/mmc/host/sunxi-mmc.c +3 −2
  311. drivers/mtd/nand/raw/mtk_ecc.c +8 −4
  312. drivers/mtd/nand/raw/qcom_nandc.c +13 −11
  313. drivers/mtd/nand/raw/sh_flctl.c +8 −6
  314. drivers/net/can/grcan.c +24 −22
  315. drivers/net/dsa/b53/b53_common.c +7 −29
  316. drivers/net/dsa/b53/b53_priv.h +13 −11
  317. drivers/net/dsa/b53/b53_serdes.c +51 −23
  318. drivers/net/dsa/b53/b53_serdes.h +3 −6
  319. drivers/net/dsa/b53/b53_srab.c +1 −3
  320. drivers/net/dsa/bcm_sf2.c +3 −0
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  678. net/ipv4/tcp_output.c +1 −0
  679. net/ipv4/tcp_rate.c +8 −3
  680. net/ipv6/inet6_hashtables.c +2 −2
  681. net/ipv6/ip6_gre.c +8 −8
  682. net/ipv6/mcast.c +4 −4
  683. net/ipv6/netfilter.c +8 −2
  684. net/ipv6/syncookies.c +2 −1
  685. net/mac80211/mlme.c +6 −0
  686. net/mac80211/rx.c +1 −2
  687. net/mctp/device.c +1 −1
  688. net/netfilter/ipvs/ip_vs_conn.c +1 −1
  689. net/netfilter/nf_conntrack_proto_tcp.c +6 −15
  690. net/netfilter/nf_conntrack_standalone.c +1 −1
  691. net/netfilter/nft_set_rbtree.c +5 −1
  692. net/netfilter/nft_socket.c +38 −14
  693. net/netlink/af_netlink.c +0 −1
  694. net/nfc/core.c +14 −15
  695. net/nfc/netlink.c +2 −2
  696. net/rds/tcp.c +16 −2
  697. net/rds/tcp.h +1 −1
  698. net/rds/tcp_connect.c +4 −1
  699. net/rds/tcp_listen.c +4 −1
  700. net/rxrpc/local_object.c +3 −0
  701. net/sched/act_pedit.c +22 −4
  702. net/sctp/sm_sideeffect.c +4 −0
  703. net/smc/af_smc.c +95 −42
  704. net/smc/smc.h +29 −0
  705. net/smc/smc_close.c +4 −1
  706. net/smc/smc_rx.c +2 −2
  707. net/sunrpc/auth_gss/gss_rpc_upcall.c +1 −0
  708. net/sunrpc/clnt.c +40 −4
  709. net/sunrpc/xprtsock.c +31 −4
  710. net/tls/tls_device.c +10 −5
  711. net/wireless/nl80211.c +16 −2
  712. net/wireless/scan.c +1 −1
  713. net/xdp/xsk.c +14 −1
  714. net/xdp/xsk_buff_pool.c +12 −4
  715. samples/trace_events/trace_custom_sched.h +3 −3
  716. scripts/Makefile.build +1 −1
  717. scripts/link-vmlinux.sh +1 −1
  718. sound/firewire/fireworks/fireworks_hwdep.c +1 −0
  719. sound/pci/hda/patch_realtek.c +9 −6
  720. sound/soc/atmel/mchp-pdmc.c +1 −0
  721. sound/soc/codecs/da7219.c +10 −4
  722. sound/soc/codecs/max98090.c +4 −1
  723. sound/soc/codecs/rt9120.c +0 −1
  724. sound/soc/codecs/wm8958-dsp2.c +4 −4
  725. sound/soc/generic/simple-card-utils.c +1 −1
  726. sound/soc/meson/aiu-acodec-ctrl.c +1 −1
  727. sound/soc/meson/aiu-codec-ctrl.c +1 −1
  728. sound/soc/meson/axg-card.c +0 −1
  729. sound/soc/meson/axg-tdm-interface.c +5 −21
  730. sound/soc/meson/g12a-tohdmitx.c +1 −1
  731. sound/soc/soc-generic-dmaengine-pcm.c +3 −3
  732. sound/soc/soc-ops.c +18 −2
  733. sound/soc/sof/sof-pci-dev.c +5 −0
  734. tools/include/uapi/linux/kvm.h +9 −1
  735. tools/objtool/check.c +49 −45
  736. tools/objtool/elf.c +166 −23
  737. tools/objtool/include/objtool/elf.h +2 −2
  738. tools/objtool/include/objtool/objtool.h +1 −1
  739. tools/objtool/objtool.c +0 −1
  740. tools/perf/arch/arm64/util/arm-spe.c +10 −0
  741. tools/perf/arch/arm64/util/machine.c +0 −21
  742. tools/perf/arch/powerpc/util/Build +0 −1
  743. tools/perf/arch/powerpc/util/machine.c +0 −25
  744. tools/perf/arch/s390/util/machine.c +0 −16
  745. tools/perf/bench/numa.c +2 −0
  746. tools/perf/tests/attr/README +1 −0
  747. tools/perf/tests/attr/test-record-spe-physical-address +12 −0
  748. tools/perf/tests/shell/test_arm_coresight.sh +0 −1
  749. tools/perf/util/arm-spe.c +3 −2
  750. tools/perf/util/session.c +1 −1
  751. tools/perf/util/symbol-elf.c +1 −1
  752. tools/perf/util/symbol.c +27 −10
  753. tools/perf/util/symbol.h +1 −2
  754. tools/power/x86/intel-speed-select/Makefile +1 −1
  755. tools/testing/selftests/drivers/net/ocelot/tc_flower_chains.sh +1 −1
  756. tools/testing/selftests/net/Makefile +5 −1
  757. tools/testing/selftests/net/bpf/Makefile +14 −0
  758. tools/testing/selftests/net/bpf/nat6to4.c +285 −0
  759. tools/testing/selftests/net/fcnal-test.sh +12 −0
  760. tools/testing/selftests/net/forwarding/Makefile +33 −0
  761. tools/testing/selftests/net/forwarding/mirror_gre_bridge_1q.sh +3 −0
  762. tools/testing/selftests/net/so_txtime.c +2 −2
  763. tools/testing/selftests/net/udpgro_frglist.sh +101 −0
  764. tools/testing/selftests/seccomp/seccomp_bpf.c +5 −5
  765. tools/testing/selftests/vm/Makefile +5 −5
  766. tools/testing/selftests/wireguard/netns.sh +23 −11
  767. tools/testing/selftests/wireguard/qemu/.gitignore +1 −0
  768. tools/testing/selftests/wireguard/qemu/Makefile +136 −69
  769. tools/testing/selftests/wireguard/qemu/arch/aarch64.config +4 −1
  770. tools/testing/selftests/wireguard/qemu/arch/aarch64_be.config +4 −1
  771. tools/testing/selftests/wireguard/qemu/arch/arm.config +4 −1
  772. tools/testing/selftests/wireguard/qemu/arch/armeb.config +4 −1
  773. tools/testing/selftests/wireguard/qemu/arch/i686.config +2 −1
  774. tools/testing/selftests/wireguard/qemu/arch/m68k.config +1 −1
  775. tools/testing/selftests/wireguard/qemu/arch/mips.config +1 −1
  776. tools/testing/selftests/wireguard/qemu/arch/mips64.config +1 −1
  777. tools/testing/selftests/wireguard/qemu/arch/mips64el.config +1 −1
  778. tools/testing/selftests/wireguard/qemu/arch/mipsel.config +1 −1
  779. tools/testing/selftests/wireguard/qemu/arch/powerpc.config +1 −1
  780. tools/testing/selftests/wireguard/qemu/arch/powerpc64.config +13 −0
  781. tools/testing/selftests/wireguard/qemu/arch/powerpc64le.config +1 −1
  782. tools/testing/selftests/wireguard/qemu/arch/riscv32.config +12 −0
  783. tools/testing/selftests/wireguard/qemu/arch/riscv64.config +12 −0
  784. tools/testing/selftests/wireguard/qemu/arch/s390x.config +6 −0
  785. tools/testing/selftests/wireguard/qemu/arch/x86_64.config +2 −1
  786. tools/testing/selftests/wireguard/qemu/init.c +0 −6
  787. virt/kvm/kvm_main.c +1 −0
.mailmap+3−0
@@ -45,6 +45,7 @@ Andrey Konovalov <andreyknvl@gmail.com> <andreyknvl@google.com> · 44 unmodified lines
4545 Andrey Ryabinin <ryabinin.a.a@gmail.com> <a.ryabinin@samsung.com>
4646 Andrey Ryabinin <ryabinin.a.a@gmail.com> <aryabinin@virtuozzo.com>
4747 Andrzej Hajda <andrzej.hajda@intel.com> <a.hajda@samsung.com>
48+André Almeida <andrealmeid@igalia.com> <andrealmeid@collabora.com>
4849 Andy Adamson <andros@citi.umich.edu>
4950 Antoine Tenart <atenart@kernel.org> <antoine.tenart@bootlin.com>
5051 Antoine Tenart <atenart@kernel.org> <antoine.tenart@free-electrons.com>
@@ -204,6 +205,7 @@ Juha Yrjola <at solidboot.com> · 153 unmodified lines
204205 Juha Yrjola <juha.yrjola@nokia.com>
205206 Juha Yrjola <juha.yrjola@solidboot.com>
206207 Julien Thierry <julien.thierry.kdev@gmail.com> <julien.thierry@arm.com>
208+Kalle Valo <kvalo@kernel.org> <kvalo@codeaurora.org>
207209 Kalyan Thota <quic_kalyant@quicinc.com> <kalyan_t@codeaurora.org>
208210 Kay Sievers <kay.sievers@vrfy.org>
209211 Kees Cook <keescook@chromium.org> <kees.cook@canonical.com>
@@ -249,6 +251,7 @@ Mark Yao <markyao0591@gmail.com> <mark.yao@rock-chips.com> · 39 unmodified lines
249251 Martin Kepplinger <martink@posteo.de> <martin.kepplinger@ginzinger.com>
250252 Martin Kepplinger <martink@posteo.de> <martin.kepplinger@puri.sm>
251253 Martin Kepplinger <martink@posteo.de> <martin.kepplinger@theobroma-systems.com>
254+Martyna Szapar-Mudlaw <martyna.szapar-mudlaw@linux.intel.com> <martyna.szapar-mudlaw@intel.com>
252255 Mathieu Othacehe <m.othacehe@gmail.com>
253256 Matthew Wilcox <willy@infradead.org> <matthew.r.wilcox@intel.com>
254257 Matthew Wilcox <willy@infradead.org> <matthew@wil.cx>
Documentation/arm64/memory-tagging-extension.rst+2−2
@@ -228,10 +228,10 @@ Core dump support · 227 unmodified lines
228228 -----------------
229229
230230 The allocation tags for user memory mapped with ``PROT_MTE`` are dumped
231−in the core file as additional ``PT_ARM_MEMTAG_MTE`` segments. The
231+in the core file as additional ``PT_AARCH64_MEMTAG_MTE`` segments. The
232232 program header for such segment is defined as:
233233
234−:``p_type``: ``PT_ARM_MEMTAG_MTE``
234+:``p_type``: ``PT_AARCH64_MEMTAG_MTE``
235235 :``p_flags``: 0
236236 :``p_offset``: segment file offset
237237 :``p_vaddr``: segment virtual address, same as the corresponding
Documentation/arm64/silicon-errata.rst+3−0
@@ -189,6 +189,9 @@ stable kernels. · 188 unmodified lines
189189 +----------------+-----------------+-----------------+-----------------------------+
190190 | Qualcomm Tech. | Kryo4xx Silver | N/A | ARM64_ERRATUM_1024718 |
191191 +----------------+-----------------+-----------------+-----------------------------+
192+| Qualcomm Tech. | Kryo4xx Gold | N/A | ARM64_ERRATUM_1286807 |
193++----------------+-----------------+-----------------+-----------------------------+
194+
192195 +----------------+-----------------+-----------------+-----------------------------+
193196 | Fujitsu | A64FX | E#010001 | FUJITSU_ERRATUM_010001 |
194197 +----------------+-----------------+-----------------+-----------------------------+
Documentation/devicetree/bindings/clock/imx8m-clock.yaml+0−4
@@ -55,8 +55,6 @@ allOf: · 54 unmodified lines
5555 then:
5656 properties:
5757 clocks:
58− minItems: 7
59− maxItems: 7
6058 items:
6159 - description: 32k osc
6260 - description: 25m osc
@@ -66,8 +64,6 @@ allOf: · 3 unmodified lines
6664 - description: ext3 clock input
6765 - description: ext4 clock input
6866 clock-names:
69− minItems: 7
70− maxItems: 7
7167 items:
7268 - const: ckil
7369 - const: osc_25m
Documentation/devicetree/bindings/clock/microchip,mpfs.yaml+11−2
@@ -22,7 +22,16 @@ properties: · 21 unmodified lines
2222 const: microchip,mpfs-clkcfg
2323
2424 reg:
25− maxItems: 1
25+ items:
26+ - description: |
27+ clock config registers:
28+ These registers contain enable, reset & divider tables for the, cpu,
29+ axi, ahb and rtc/mtimer reference clocks as well as enable and reset
30+ for the peripheral clocks.
31+ - description: |
32+ mss pll dri registers:
33+ Block of registers responsible for dynamic reconfiguration of the mss
34+ pll
2635
2736 clocks:
2837 maxItems: 1
@@ -51,7 +60,7 @@ examples: · 22 unmodified lines
5160 #size-cells = <2>;
5261 clkcfg: clock-controller@20002000 {
5362 compatible = "microchip,mpfs-clkcfg";
54− reg = <0x0 0x20002000 0x0 0x1000>;
63+ reg = <0x0 0x20002000 0x0 0x1000>, <0x0 0x3E001000 0x0 0x1000>;
5564 clocks = <&ref>;
5665 #clock-cells = <1>;
5766 };
Documentation/devicetree/bindings/display/bridge/renesas,lvds.yaml+0−4
@@ -95,7 +95,6 @@ then: · 94 unmodified lines
9595 properties:
9696 clocks:
9797 minItems: 1
98− maxItems: 4
9998 items:
10099 - description: Functional clock
101100 - description: EXTAL input clock
@@ -104,7 +103,6 @@ then: · 2 unmodified lines
104103
105104 clock-names:
106105 minItems: 1
107− maxItems: 4
108106 items:
109107 - const: fck
110108 # The LVDS encoder can use the EXTAL or DU_DOTCLKINx clocks.
@@ -128,12 +126,10 @@ then: · 17 unmodified lines
128126 else:
129127 properties:
130128 clocks:
131− maxItems: 1
132129 items:
133130 - description: Functional clock
134131
135132 clock-names:
136− maxItems: 1
137133 items:
138134 - const: fck
139135
Documentation/devicetree/bindings/display/renesas,du.yaml+0−23
@@ -109,7 +109,6 @@ allOf: · 108 unmodified lines
109109 properties:
110110 clocks:
111111 minItems: 1
112− maxItems: 3
113112 items:
114113 - description: Functional clock
115114 - description: DU_DOTCLKIN0 input clock
@@ -117,7 +116,6 @@ allOf: · 1 unmodified line
117116
118117 clock-names:
119118 minItems: 1
120− maxItems: 3
121119 items:
122120 - const: du.0
123121 - pattern: '^dclkin\.[01]$'
@@ -159,7 +157,6 @@ allOf: · 35 unmodified lines
159157 properties:
160158 clocks:
161159 minItems: 2
162− maxItems: 4
163160 items:
164161 - description: Functional clock for DU0
165162 - description: Functional clock for DU1
@@ -168,7 +165,6 @@ allOf: · 2 unmodified lines
168165
169166 clock-names:
170167 minItems: 2
171− maxItems: 4
172168 items:
173169 - const: du.0
174170 - const: du.1
@@ -216,7 +212,6 @@ allOf: · 41 unmodified lines
216212 properties:
217213 clocks:
218214 minItems: 2
219− maxItems: 4
220215 items:
221216 - description: Functional clock for DU0
222217 - description: Functional clock for DU1
@@ -225,7 +220,6 @@ allOf: · 2 unmodified lines
225220
226221 clock-names:
227222 minItems: 2
228− maxItems: 4
229223 items:
230224 - const: du.0
231225 - const: du.1
@@ -271,7 +265,6 @@ allOf: · 39 unmodified lines
271265 properties:
272266 clocks:
273267 minItems: 2
274− maxItems: 4
275268 items:
276269 - description: Functional clock for DU0
277270 - description: Functional clock for DU1
@@ -280,7 +273,6 @@ allOf: · 2 unmodified lines
280273
281274 clock-names:
282275 minItems: 2
283− maxItems: 4
284276 items:
285277 - const: du.0
286278 - const: du.1
@@ -327,7 +319,6 @@ allOf: · 40 unmodified lines
327319 properties:
328320 clocks:
329321 minItems: 2
330− maxItems: 4
331322 items:
332323 - description: Functional clock for DU0
333324 - description: Functional clock for DU1
@@ -336,7 +327,6 @@ allOf: · 2 unmodified lines
336327
337328 clock-names:
338329 minItems: 2
339− maxItems: 4
340330 items:
341331 - const: du.0
342332 - const: du.1
@@ -386,7 +376,6 @@ allOf: · 43 unmodified lines
386376 properties:
387377 clocks:
388378 minItems: 3
389− maxItems: 6
390379 items:
391380 - description: Functional clock for DU0
392381 - description: Functional clock for DU1
@@ -397,7 +386,6 @@ allOf: · 4 unmodified lines
397386
398387 clock-names:
399388 minItems: 3
400− maxItems: 6
401389 items:
402390 - const: du.0
403391 - const: du.1
@@ -448,7 +436,6 @@ allOf: · 44 unmodified lines
448436 properties:
449437 clocks:
450438 minItems: 4
451− maxItems: 8
452439 items:
453440 - description: Functional clock for DU0
454441 - description: Functional clock for DU1
@@ -461,7 +448,6 @@ allOf: · 6 unmodified lines
461448
462449 clock-names:
463450 minItems: 4
464− maxItems: 8
465451 items:
466452 - const: du.0
467453 - const: du.1
@@ -525,7 +511,6 @@ allOf: · 57 unmodified lines
525511 properties:
526512 clocks:
527513 minItems: 3
528− maxItems: 6
529514 items:
530515 - description: Functional clock for DU0
531516 - description: Functional clock for DU1
@@ -536,7 +521,6 @@ allOf: · 4 unmodified lines
536521
537522 clock-names:
538523 minItems: 3
539− maxItems: 6
540524 items:
541525 - const: du.0
542526 - const: du.1
@@ -596,7 +580,6 @@ allOf: · 53 unmodified lines
596580 properties:
597581 clocks:
598582 minItems: 3
599− maxItems: 6
600583 items:
601584 - description: Functional clock for DU0
602585 - description: Functional clock for DU1
@@ -607,7 +590,6 @@ allOf: · 4 unmodified lines
607590
608591 clock-names:
609592 minItems: 3
610− maxItems: 6
611593 items:
612594 - const: du.0
613595 - const: du.1
@@ -666,14 +648,12 @@ allOf: · 52 unmodified lines
666648 properties:
667649 clocks:
668650 minItems: 1
669− maxItems: 2
670651 items:
671652 - description: Functional clock for DU0
672653 - description: DU_DOTCLKIN0 input clock
673654
674655 clock-names:
675656 minItems: 1
676− maxItems: 2
677657 items:
678658 - const: du.0
679659 - const: dclkin.0
@@ -723,7 +703,6 @@ allOf: · 43 unmodified lines
723703 properties:
724704 clocks:
725705 minItems: 2
726− maxItems: 4
727706 items:
728707 - description: Functional clock for DU0
729708 - description: Functional clock for DU1
@@ -732,7 +711,6 @@ allOf: · 2 unmodified lines
732711
733712 clock-names:
734713 minItems: 2
735− maxItems: 4
736714 items:
737715 - const: du.0
738716 - const: du.1
@@ -791,7 +769,6 @@ allOf: · 52 unmodified lines
791769 - description: Functional clock
792770
793771 clock-names:
794− maxItems: 1
795772 items:
796773 - const: du.0
797774
Documentation/devicetree/bindings/hwmon/ti,tmp421.yaml+3−4
@@ -58,10 +58,9 @@ patternProperties: · 57 unmodified lines
5858 description: |
5959 The value (two's complement) to be programmed in the channel specific N correction register.
6060 For remote channels only.
61− $ref: /schemas/types.yaml#/definitions/uint32
62− items:
63− minimum: 0
64− maximum: 255
61+ $ref: /schemas/types.yaml#/definitions/int32
62+ minimum: -128
63+ maximum: 127
6564
6665 required:
6766 - reg
Documentation/devicetree/bindings/iio/adc/st,stm32-adc.yaml+0−2
@@ -138,7 +138,6 @@ allOf: · 137 unmodified lines
138138 - const: bus
139139 - const: adc
140140 minItems: 1
141− maxItems: 2
142141
143142 interrupts:
144143 items:
@@ -170,7 +169,6 @@ allOf: · 25 unmodified lines
170169 - const: bus
171170 - const: adc
172171 minItems: 1
173− maxItems: 2
174172
175173 interrupts:
176174 items:
Documentation/devicetree/bindings/iommu/arm,smmu.yaml+23−2
@@ -37,8 +37,10 @@ properties: · 36 unmodified lines
3737 - qcom,sc7180-smmu-500
3838 - qcom,sc7280-smmu-500
3939 - qcom,sc8180x-smmu-500
40+ - qcom,sc8280xp-smmu-500
4041 - qcom,sdm845-smmu-500
4142 - qcom,sdx55-smmu-500
43+ - qcom,sdx65-smmu-500
4244 - qcom,sm6350-smmu-500
4345 - qcom,sm8150-smmu-500
4446 - qcom,sm8250-smmu-500
@@ -62,8 +64,9 @@ properties: · 17 unmodified lines
6264 for improved performance.
6365 items:
6466 - enum:
65− - nvidia,tegra194-smmu
6667 - nvidia,tegra186-smmu
68+ - nvidia,tegra194-smmu
69+ - nvidia,tegra234-smmu
6770 - const: nvidia,smmu-500
6871 - items:
6972 - const: arm,mmu-500
@@ -157,6 +160,17 @@ properties: · 87 unmodified lines
157160 power-domains:
158161 maxItems: 1
159162
163+ nvidia,memory-controller:
164+ description: |
165+ A phandle to the memory controller on NVIDIA Tegra186 and later SoCs.
166+ The memory controller needs to be programmed with a mapping of memory
167+ client IDs to ARM SMMU stream IDs.
168+
169+ If this property is absent, the mapping programmed by early firmware
170+ will be used and it is not guaranteed that IOMMU translations will be
171+ enabled for any given device.
172+ $ref: /schemas/types.yaml#/definitions/phandle
173+
160174 required:
161175 - compatible
162176 - reg
@@ -172,13 +186,20 @@ allOf: · 9 unmodified lines
172186 compatible:
173187 contains:
174188 enum:
175− - nvidia,tegra194-smmu
176189 - nvidia,tegra186-smmu
190+ - nvidia,tegra194-smmu
191+ - nvidia,tegra234-smmu
177192 then:
178193 properties:
179194 reg:
180195 minItems: 1
181196 maxItems: 2
197+
198+ # The reference to the memory controller is required to ensure that the
199+ # memory client to stream ID mapping can be done synchronously with the
200+ # IOMMU attachment.
201+ required:
202+ - nvidia,memory-controller
182203 else:
183204 properties:
184205 reg:
Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml+23−11
@@ -76,7 +76,11 @@ properties: · 75 unmodified lines
7676 - mediatek,mt8167-m4u # generation two
7777 - mediatek,mt8173-m4u # generation two
7878 - mediatek,mt8183-m4u # generation two
79+ - mediatek,mt8186-iommu-mm # generation two
7980 - mediatek,mt8192-m4u # generation two
81+ - mediatek,mt8195-iommu-vdo # generation two
82+ - mediatek,mt8195-iommu-vpp # generation two
83+ - mediatek,mt8195-iommu-infra # generation two
8084
8185 - description: mt7623 generation one
8286 items:
@@ -119,7 +123,9 @@ properties: · 36 unmodified lines
119123 dt-binding/memory/mt8167-larb-port.h for mt8167,
120124 dt-binding/memory/mt8173-larb-port.h for mt8173,
121125 dt-binding/memory/mt8183-larb-port.h for mt8183,
126+ dt-binding/memory/mt8186-memory-port.h for mt8186,
122127 dt-binding/memory/mt8192-larb-port.h for mt8192.
128+ dt-binding/memory/mt8195-memory-port.h for mt8195.
123129
124130 power-domains:
125131 maxItems: 1
@@ -128,7 +134,6 @@ required: · 2 unmodified lines
128134 - compatible
129135 - reg
130136 - interrupts
131− - mediatek,larbs
132137 - '#iommu-cells'
133138
134139 allOf:
@@ -140,7 +145,10 @@ allOf: · 5 unmodified lines
140145 - mediatek,mt2701-m4u
141146 - mediatek,mt2712-m4u
142147 - mediatek,mt8173-m4u
148+ - mediatek,mt8186-iommu-mm
143149 - mediatek,mt8192-m4u
150+ - mediatek,mt8195-iommu-vdo
151+ - mediatek,mt8195-iommu-vpp
144152
145153 then:
146154 required:
@@ -150,12 +158,26 @@ allOf: · 3 unmodified lines
150158 properties:
151159 compatible:
152160 enum:
161+ - mediatek,mt8186-iommu-mm
153162 - mediatek,mt8192-m4u
163+ - mediatek,mt8195-iommu-vdo
164+ - mediatek,mt8195-iommu-vpp
154165
155166 then:
156167 required:
157168 - power-domains
158169
170+ - if: # The IOMMUs don't have larbs.
171+ not:
172+ properties:
173+ compatible:
174+ contains:
175+ const: mediatek,mt8195-iommu-infra
176+
177+ then:
178+ required:
179+ - mediatek,larbs
180+
159181 additionalProperties: false
160182
161183 examples:
@@ -173,13 +195,3 @@ examples: · 11 unmodified lines
173195 <&larb3>, <&larb4>, <&larb5>;
174196 #iommu-cells = <1>;
175197 };
176−
177− - |
178− #include <dt-bindings/memory/mt8173-larb-port.h>
179−
180− /* Example for a client device */
181− display {
182− compatible = "mediatek,mt8173-disp";
183− iommus = <&iommu M4U_PORT_DISP_OVL0>,
184− <&iommu M4U_PORT_DISP_RDMA0>;
185− };
Documentation/devicetree/bindings/iommu/samsung,sysmmu.yaml+0−10
@@ -86,16 +86,6 @@ examples: · 85 unmodified lines
8686 - |
8787 #include <dt-bindings/clock/exynos5250.h>
8888
89− gsc_0: scaler@13e00000 {
90− compatible = "samsung,exynos5-gsc";
91− reg = <0x13e00000 0x1000>;
92− interrupts = <0 85 0>;
93− power-domains = <&pd_gsc>;
94− clocks = <&clock CLK_GSCL0>;
95− clock-names = "gscl";
96− iommus = <&sysmmu_gsc0>;
97− };
98−
9989 sysmmu_gsc0: iommu@13e80000 {
10090 compatible = "samsung,exynos-sysmmu";
10191 reg = <0x13E80000 0x1000>;
Documentation/devicetree/bindings/leds/leds-mt6360.yaml+0−2
@@ -43,8 +43,6 @@ patternProperties: · 42 unmodified lines
4343 - 4 # LED output FLASH1
4444 - 5 # LED output FLASH2
4545
46−unevaluatedProperties: false
47−
4846 required:
4947 - compatible
5048 - "#address-cells"
Documentation/devicetree/bindings/mfd/atmel-flexcom.txt+1−1
@@ -54,7 +54,7 @@ flexcom@f8034000 { · 53 unmodified lines
5454 clock-names = "spi_clk";
5555 atmel,fifo-size = <32>;
5656
57− mtd_dataflash@0 {
57+ flash@0 {
5858 compatible = "atmel,at25f512b";
5959 reg = <0>;
6060 spi-max-frequency = <20000000>;
Documentation/devicetree/bindings/mmc/nvidia,tegra20-sdhci.yaml+1−6
@@ -202,22 +202,17 @@ allOf: · 201 unmodified lines
202202 clocks:
203203 items:
204204 - description: module clock
205− minItems: 1
206− maxItems: 1
207205 else:
208206 properties:
209207 clocks:
210208 items:
211209 - description: module clock
212210 - description: timeout clock
213− minItems: 2
214− maxItems: 2
211+
215212 clock-names:
216213 items:
217214 - const: sdhci
218215 - const: tmclk
219− minItems: 2
220− maxItems: 2
221216 required:
222217 - clock-names
223218
Documentation/devicetree/bindings/mtd/gpmi-nand.yaml+0−2
@@ -147,8 +147,6 @@ allOf: · 146 unmodified lines
147147 - description: SoC gpmi io clock
148148 - description: SoC gpmi bch apb clock
149149 clock-names:
150− minItems: 2
151− maxItems: 2
152150 items:
153151 - const: gpmi_io
154152 - const: gpmi_bch_apb
Documentation/devicetree/bindings/net/can/bosch,c_can.yaml+0−3
@@ -80,8 +80,6 @@ if: · 79 unmodified lines
8080 then:
8181 properties:
8282 interrupts:
83− minItems: 4
84− maxItems: 4
8583 items:
8684 - description: Error and status IRQ
8785 - description: Message object IRQ
@@ -91,7 +89,6 @@ then: · 3 unmodified lines
9189 else:
9290 properties:
9391 interrupts:
94− maxItems: 1
9592 items:
9693 - description: Error and status IRQ
9794
Documentation/devicetree/bindings/net/dsa/realtek.yaml+14−21
@@ -27,32 +27,25 @@ description: · 26 unmodified lines
2727 The realtek-mdio driver is an MDIO driver and it must be inserted inside
2828 an MDIO node.
2929
30+ The compatible string is only used to identify which (silicon) family the
31+ switch belongs to. Roughly speaking, a family is any set of Realtek switches
32+ whose chip identification register(s) have a common location and semantics.
33+ The different models in a given family can be automatically disambiguated by
34+ parsing the chip identification register(s) according to the given family,
35+ avoiding the need for a unique compatible string for each model.
36+
3037 properties:
3138 compatible:
3239 enum:
3340 - realtek,rtl8365mb
34− - realtek,rtl8366
3541 - realtek,rtl8366rb
36− - realtek,rtl8366s
37− - realtek,rtl8367
38− - realtek,rtl8367b
39− - realtek,rtl8367rb
40− - realtek,rtl8367s
41− - realtek,rtl8368s
42− - realtek,rtl8369
43− - realtek,rtl8370
4442 description: |
45− realtek,rtl8365mb: 4+1 ports
46− realtek,rtl8366: 5+1 ports
47− realtek,rtl8366rb: 5+1 ports
48− realtek,rtl8366s: 5+1 ports
49− realtek,rtl8367:
50− realtek,rtl8367b:
51− realtek,rtl8367rb: 5+2 ports
52− realtek,rtl8367s: 5+2 ports
53− realtek,rtl8368s: 8 ports
54− realtek,rtl8369: 8+1 ports
55− realtek,rtl8370: 8+2 ports
43+ realtek,rtl8365mb:
44+ Use with models RTL8363NB, RTL8363NB-VB, RTL8363SC, RTL8363SC-VB,
45+ RTL8364NB, RTL8364NB-VB, RTL8365MB, RTL8366SC, RTL8367RB-VB, RTL8367S,
46+ RTL8367SB, RTL8370MB, RTL8310SR
47+ realtek,rtl8366rb:
48+ Use with models RTL8366RB, RTL8366S
5649
5750 mdc-gpios:
5851 description: GPIO line for the MDC clock line.
@@ -335,7 +328,7 @@ examples: · 276 unmodified lines
335328 #size-cells = <0>;
336329
337330 switch@29 {
338− compatible = "realtek,rtl8367s";
331+ compatible = "realtek,rtl8365mb";
339332 reg = <29>;
340333
341334 reset-gpios = <&gpio2 20 GPIO_ACTIVE_LOW>;
Documentation/devicetree/bindings/pci/apple,pcie.yaml+0−3
@@ -142,7 +142,6 @@ examples: · 141 unmodified lines
142142 device_type = "pci";
143143 reg = <0x0 0x0 0x0 0x0 0x0>;
144144 reset-gpios = <&pinctrl_ap 152 0>;
145− max-link-speed = <2>;
146145
147146 #address-cells = <3>;
148147 #size-cells = <2>;
@@ -153,7 +152,6 @@ examples: · 4 unmodified lines
153152 device_type = "pci";
154153 reg = <0x800 0x0 0x0 0x0 0x0>;
155154 reset-gpios = <&pinctrl_ap 153 0>;
156− max-link-speed = <2>;
157155
158156 #address-cells = <3>;
159157 #size-cells = <2>;
@@ -164,7 +162,6 @@ examples: · 4 unmodified lines
164162 device_type = "pci";
165163 reg = <0x1000 0x0 0x0 0x0 0x0>;
166164 reset-gpios = <&pinctrl_ap 33 0>;
167− max-link-speed = <1>;
168165
169166 #address-cells = <3>;
170167 #size-cells = <2>;
Documentation/devicetree/bindings/phy/brcm,sata-phy.yaml+4−6
@@ -102,19 +102,17 @@ if: · 101 unmodified lines
102102 then:
103103 properties:
104104 reg:
105− maxItems: 2
105+ minItems: 2
106+
106107 reg-names:
107− items:
108− - const: "phy"
109− - const: "phy-ctrl"
108+ minItems: 2
110109 else:
111110 properties:
112111 reg:
113112 maxItems: 1
113+
114114 reg-names:
115115 maxItems: 1
116− items:
117− - const: "phy"
118116
119117 required:
120118 - compatible
Documentation/devicetree/bindings/pinctrl/pincfg-node.yaml+10−2
@@ -52,11 +52,19 @@ properties: · 51 unmodified lines
5252 hardware supporting it the pull strength in Ohm.
5353
5454 drive-push-pull:
55− type: boolean
55+ oneOf:
56+ - type: boolean
57+ - $ref: /schemas/types.yaml#/definitions/uint32
58+ enum: [ 0, 1 ]
59+ deprecated: true
5660 description: drive actively high and low
5761
5862 drive-open-drain:
59− type: boolean
63+ oneOf:
64+ - type: boolean
65+ - $ref: /schemas/types.yaml#/definitions/uint32
66+ const: 1 # No known cases of 0
67+ deprecated: true
6068 description: drive with open drain
6169
6270 drive-open-source:
Documentation/devicetree/bindings/regulator/richtek,rt5190a-regulator.yaml+1−1
@@ -58,7 +58,7 @@ properties: · 57 unmodified lines
5858 type: object
5959 $ref: regulator.yaml#
6060 description: |
61− regulator description for buck1 and buck4.
61+ regulator description for buck1 to buck4, and ldo.
6262
6363 properties:
6464 regulator-allowed-modes:
Documentation/devicetree/bindings/rtc/allwinner,sun6i-a31-rtc.yaml+0−10
@@ -71,7 +71,6 @@ allOf: · 70 unmodified lines
7171 then:
7272 properties:
7373 clock-output-names:
74− minItems: 1
7574 maxItems: 1
7675
7776 - if:
@@ -102,7 +101,6 @@ allOf: · 24 unmodified lines
102101 properties:
103102 clock-output-names:
104103 minItems: 3
105− maxItems: 3
106104
107105 - if:
108106 properties:
@@ -113,16 +111,12 @@ allOf: · 4 unmodified lines
113111 then:
114112 properties:
115113 clocks:
116− minItems: 3
117− maxItems: 3
118114 items:
119115 - description: Bus clock for register access
120116 - description: 24 MHz oscillator
121117 - description: 32 kHz clock from the CCU
122118
123119 clock-names:
124− minItems: 3
125− maxItems: 3
126120 items:
127121 - const: bus
128122 - const: hosc
@@ -142,7 +136,6 @@ allOf: · 13 unmodified lines
142136 properties:
143137 clocks:
144138 minItems: 3
145− maxItems: 4
146139 items:
147140 - description: Bus clock for register access
148141 - description: 24 MHz oscillator
@@ -151,7 +144,6 @@ allOf: · 2 unmodified lines
151144
152145 clock-names:
153146 minItems: 3
154− maxItems: 4
155147 items:
156148 - const: bus
157149 - const: hosc
@@ -174,14 +166,12 @@ allOf: · 16 unmodified lines
174166 then:
175167 properties:
176168 interrupts:
177− minItems: 1
178169 maxItems: 1
179170
180171 else:
181172 properties:
182173 interrupts:
183174 minItems: 2
184− maxItems: 2
185175
186176 required:
187177 - "#clock-cells"
Documentation/devicetree/bindings/rtc/microchip,mfps-rtc.yaml+12−3
@@ -31,11 +31,19 @@ properties: · 30 unmodified lines
3131 to that of the RTC's count register.
3232
3333 clocks:
34− maxItems: 1
34+ items:
35+ - description: |
36+ AHB clock
37+ - description: |
38+ Reference clock: divided by the prescaler to create a time-based
39+ strobe (typically 1 Hz) for the calendar counter. By default, the rtc
40+ on the PolarFire SoC shares it's reference with MTIMER so this will
41+ be a 1 MHz clock.
3542
3643 clock-names:
3744 items:
3845 - const: rtc
46+ - const: rtcref
3947
4048 required:
4149 - compatible
@@ -48,11 +56,12 @@ additionalProperties: false · 6 unmodified lines
4856
4957 examples:
5058 - |
59+ #include "dt-bindings/clock/microchip,mpfs-clock.h"
5160 rtc@20124000 {
5261 compatible = "microchip,mpfs-rtc";
5362 reg = <0x20124000 0x1000>;
54− clocks = <&clkcfg 21>;
55− clock-names = "rtc";
63+ clocks = <&clkcfg CLK_RTC>, <&clkcfg CLK_RTCREF>;
64+ clock-names = "rtc", "rtcref";
5665 interrupts = <80>, <81>;
5766 };
5867 ...
Documentation/devicetree/bindings/serial/samsung_uart.yaml+0−4
@@ -100,7 +100,6 @@ allOf: · 99 unmodified lines
100100 maxItems: 3
101101 clock-names:
102102 minItems: 2
103− maxItems: 3
104103 items:
105104 - const: uart
106105 - pattern: '^clk_uart_baud[0-1]$'
@@ -118,11 +117,8 @@ allOf: · 11 unmodified lines
118117 then:
119118 properties:
120119 clocks:
121− minItems: 2
122120 maxItems: 2
123121 clock-names:
124− minItems: 2
125− maxItems: 2
126122 items:
127123 - const: uart
128124 - const: clk_uart_baud0
Documentation/devicetree/bindings/sound/allwinner,sun4i-a10-i2s.yaml+0−1
@@ -89,7 +89,6 @@ allOf: · 88 unmodified lines
8989 properties:
9090 dmas:
9191 minItems: 1
92− maxItems: 2
9392 items:
9493 - description: RX DMA Channel
9594 - description: TX DMA Channel
Documentation/devicetree/bindings/sound/ti,j721e-cpb-audio.yaml+0−2
@@ -80,7 +80,6 @@ allOf: · 79 unmodified lines
8080 then:
8181 properties:
8282 clocks:
83− minItems: 6
8483 items:
8584 - description: AUXCLK clock for McASP used by CPB audio
8685 - description: Parent for CPB_McASP auxclk (for 48KHz)
@@ -107,7 +106,6 @@ allOf: · 20 unmodified lines
107106 then:
108107 properties:
109108 clocks:
110− maxItems: 4
111109 items:
112110 - description: AUXCLK clock for McASP used by CPB audio
113111 - description: Parent for CPB_McASP auxclk (for 48KHz)
Documentation/devicetree/bindings/thermal/rcar-gen3-thermal.yaml+0−1
@@ -67,7 +67,6 @@ then: · 66 unmodified lines
6767 properties:
6868 reg:
6969 minItems: 2
70− maxItems: 3
7170 items:
7271 - description: TSC1 registers
7372 - description: TSC2 registers
Documentation/devicetree/bindings/ufs/cdns,ufshc.yaml+3−0
@@ -43,6 +43,9 @@ properties: · 42 unmodified lines
4343 - const: phy_clk
4444 - const: ref_clk
4545
46+ power-domains:
47+ maxItems: 1
48+
4649 reg:
4750 maxItems: 1
4851
Documentation/devicetree/bindings/usb/samsung,exynos-usb2.yaml+1−0
@@ -62,6 +62,7 @@ required: · 61 unmodified lines
6262 - interrupts
6363 - phys
6464 - phy-names
65+ - reg
6566
6667 allOf:
6768 - if:
Documentation/filesystems/f2fs.rst+0−70
@@ -235,12 +235,6 @@ offgrpjquota Turn off group journalled quota. · 234 unmodified lines
235235 offprjjquota Turn off project journalled quota.
236236 quota Enable plain user disk quota accounting.
237237 noquota Disable all plain disk quota option.
238−whint_mode=%s Control which write hints are passed down to block
239− layer. This supports "off", "user-based", and
240− "fs-based". In "off" mode (default), f2fs does not pass
241− down hints. In "user-based" mode, f2fs tries to pass
242− down hints given by users. And in "fs-based" mode, f2fs
243− passes down hints with its policy.
244238 alloc_mode=%s Adjust block allocation policy, which supports "reuse"
245239 and "default".
246240 fsync_mode=%s Control the policy of fsync. Currently supports "posix",
@@ -751,70 +745,6 @@ In order to identify whether the data in the victim segment are valid or not, · 504 unmodified lines
751745 F2FS manages a bitmap. Each bit represents the validity of a block, and the
752746 bitmap is composed of a bit stream covering whole blocks in main area.
753747
754−Write-hint Policy
755−-----------------
756−
757−1) whint_mode=off. F2FS only passes down WRITE_LIFE_NOT_SET.
758−
759−2) whint_mode=user-based. F2FS tries to pass down hints given by
760−users.
761−
762−===================== ======================== ===================
763−User F2FS Block
764−===================== ======================== ===================
765−N/A META WRITE_LIFE_NOT_SET
766−N/A HOT_NODE "
767−N/A WARM_NODE "
768−N/A COLD_NODE "
769−ioctl(COLD) COLD_DATA WRITE_LIFE_EXTREME
770−extension list " "
771−
772−-- buffered io
773−WRITE_LIFE_EXTREME COLD_DATA WRITE_LIFE_EXTREME
774−WRITE_LIFE_SHORT HOT_DATA WRITE_LIFE_SHORT
775−WRITE_LIFE_NOT_SET WARM_DATA WRITE_LIFE_NOT_SET
776−WRITE_LIFE_NONE " "
777−WRITE_LIFE_MEDIUM " "
778−WRITE_LIFE_LONG " "
779−
780−-- direct io
781−WRITE_LIFE_EXTREME COLD_DATA WRITE_LIFE_EXTREME
782−WRITE_LIFE_SHORT HOT_DATA WRITE_LIFE_SHORT
783−WRITE_LIFE_NOT_SET WARM_DATA WRITE_LIFE_NOT_SET
784−WRITE_LIFE_NONE " WRITE_LIFE_NONE
785−WRITE_LIFE_MEDIUM " WRITE_LIFE_MEDIUM
786−WRITE_LIFE_LONG " WRITE_LIFE_LONG
787−===================== ======================== ===================
788−
789−3) whint_mode=fs-based. F2FS passes down hints with its policy.
790−
791−===================== ======================== ===================
792−User F2FS Block
793−===================== ======================== ===================
794−N/A META WRITE_LIFE_MEDIUM;
795−N/A HOT_NODE WRITE_LIFE_NOT_SET
796−N/A WARM_NODE "
797−N/A COLD_NODE WRITE_LIFE_NONE
798−ioctl(COLD) COLD_DATA WRITE_LIFE_EXTREME
799−extension list " "
800−
801−-- buffered io
802−WRITE_LIFE_EXTREME COLD_DATA WRITE_LIFE_EXTREME
803−WRITE_LIFE_SHORT HOT_DATA WRITE_LIFE_SHORT
804−WRITE_LIFE_NOT_SET WARM_DATA WRITE_LIFE_LONG
805−WRITE_LIFE_NONE " "
806−WRITE_LIFE_MEDIUM " "
807−WRITE_LIFE_LONG " "
808−
809−-- direct io
810−WRITE_LIFE_EXTREME COLD_DATA WRITE_LIFE_EXTREME
811−WRITE_LIFE_SHORT HOT_DATA WRITE_LIFE_SHORT
812−WRITE_LIFE_NOT_SET WARM_DATA WRITE_LIFE_NOT_SET
813−WRITE_LIFE_NONE " WRITE_LIFE_NONE
814−WRITE_LIFE_MEDIUM " WRITE_LIFE_MEDIUM
815−WRITE_LIFE_LONG " WRITE_LIFE_LONG
816−===================== ======================== ===================
817−
818748 Fallocate(2) Policy
819749 -------------------
820750
Documentation/process/embargoed-hardware-issues.rst+4−3
@@ -244,10 +244,11 @@ disclosure of a particular issue, unless requested by a response team or by · 243 unmodified lines
244244 an involved disclosed party. The current ambassadors list:
245245
246246 ============= ========================================================
247− ARM Grant Likely <grant.likely@arm.com>
248247 AMD Tom Lendacky <tom.lendacky@amd.com>
249− IBM Z Christian Borntraeger <borntraeger@de.ibm.com>
250− IBM Power Anton Blanchard <anton@linux.ibm.com>
248+ Ampere Darren Hart <darren@os.amperecomputing.com>
249+ ARM Catalin Marinas <catalin.marinas@arm.com>
250+ IBM Power Anton Blanchard <anton@linux.ibm.com>
251+ IBM Z Christian Borntraeger <borntraeger@de.ibm.com>
251252 Intel Tony Luck <tony.luck@intel.com>
252253 Qualcomm Trilok Soni <tsoni@codeaurora.org>
253254
Documentation/security/siphash.rst+28−18
@@ -121,26 +121,36 @@ even scarier, uses an easily brute-forcable 64-bit key (with a 32-bit output) · 120 unmodified lines
121121 instead of SipHash's 128-bit key. However, this may appeal to some
122122 high-performance `jhash` users.
123123
124−Danger!
125−
126−Do not ever use HalfSipHash except for as a hashtable key function, and only
127−then when you can be absolutely certain that the outputs will never be
128−transmitted out of the kernel. This is only remotely useful over `jhash` as a
129−means of mitigating hashtable flooding denial of service attacks.
130−
131−Generating a HalfSipHash key
132−============================
124+HalfSipHash support is provided through the "hsiphash" family of functions.
125+
126+.. warning::
127+ Do not ever use the hsiphash functions except for as a hashtable key
128+ function, and only then when you can be absolutely certain that the outputs
129+ will never be transmitted out of the kernel. This is only remotely useful
130+ over `jhash` as a means of mitigating hashtable flooding denial of service
131+ attacks.
132+
133+On 64-bit kernels, the hsiphash functions actually implement SipHash-1-3, a
134+reduced-round variant of SipHash, instead of HalfSipHash-1-3. This is because in
135+64-bit code, SipHash-1-3 is no slower than HalfSipHash-1-3, and can be faster.
136+Note, this does *not* mean that in 64-bit kernels the hsiphash functions are the
137+same as the siphash ones, or that they are secure; the hsiphash functions still
138+use a less secure reduced-round algorithm and truncate their outputs to 32
139+bits.
140+
141+Generating a hsiphash key
142+=========================
133143
134144 Keys should always be generated from a cryptographically secure source of
135−random numbers, either using get_random_bytes or get_random_once:
145+random numbers, either using get_random_bytes or get_random_once::
136146
137−hsiphash_key_t key;
138−get_random_bytes(&key, sizeof(key));
147+ hsiphash_key_t key;
148+ get_random_bytes(&key, sizeof(key));
139149
140150 If you're not deriving your key from here, you're doing it wrong.
141151
142−Using the HalfSipHash functions
143−===============================
152+Using the hsiphash functions
153+============================
144154
145155 There are two variants of the function, one that takes a list of integers, and
146156 one that takes a buffer::
@@ -183,7 +193,7 @@ You may then iterate like usual over the returned hash bucket. · 36 unmodified lines
183193 Performance
184194 ===========
185195
186−HalfSipHash is roughly 3 times slower than JenkinsHash. For many replacements,
187−this will not be a problem, as the hashtable lookup isn't the bottleneck. And
188−in general, this is probably a good sacrifice to make for the security and DoS
189−resistance of HalfSipHash.
196+hsiphash() is roughly 3 times slower than jhash(). For many replacements, this
197+will not be a problem, as the hashtable lookup isn't the bottleneck. And in
198+general, this is probably a good sacrifice to make for the security and DoS
199+resistance of hsiphash().
Documentation/virt/kvm/api.rst+17−7
@@ -5986,16 +5986,16 @@ should put the acknowledged interrupt vector into the 'epr' field. · 5985 unmodified lines
59865986 #define KVM_SYSTEM_EVENT_RESET 2
59875987 #define KVM_SYSTEM_EVENT_CRASH 3
59885988 __u32 type;
5989− __u64 flags;
5989+ __u32 ndata;
5990+ __u64 data[16];
59905991 } system_event;
59915992
59925993 If exit_reason is KVM_EXIT_SYSTEM_EVENT then the vcpu has triggered
59935994 a system-level event using some architecture specific mechanism (hypercall
59945995 or some special instruction). In case of ARM64, this is triggered using
5995−HVC instruction based PSCI call from the vcpu. The 'type' field describes
5996−the system-level event type. The 'flags' field describes architecture
5997−specific flags for the system-level event.
5996+HVC instruction based PSCI call from the vcpu.
59985997
5998+The 'type' field describes the system-level event type.
59995999 Valid values for 'type' are:
60006000
60016001 - KVM_SYSTEM_EVENT_SHUTDOWN -- the guest has requested a shutdown of the
@@ -6010,10 +6010,20 @@ Valid values for 'type' are: · 8 unmodified lines
60106010 to ignore the request, or to gather VM memory core dump and/or
60116011 reset/shutdown of the VM.
60126012
6013−Valid flags are:
6013+If KVM_CAP_SYSTEM_EVENT_DATA is present, the 'data' field can contain
6014+architecture specific information for the system-level event. Only
6015+the first `ndata` items (possibly zero) of the data array are valid.
60146016
6015− - KVM_SYSTEM_EVENT_RESET_FLAG_PSCI_RESET2 (arm64 only) -- the guest issued
6016− a SYSTEM_RESET2 call according to v1.1 of the PSCI specification.
6017+ - for arm64, data[0] is set to KVM_SYSTEM_EVENT_RESET_FLAG_PSCI_RESET2 if
6018+ the guest issued a SYSTEM_RESET2 call according to v1.1 of the PSCI
6019+ specification.
6020+
6021+ - for RISC-V, data[0] is set to the value of the second argument of the
6022+ ``sbi_system_reset`` call.
6023+
6024+Previous versions of Linux defined a `flags` member in this struct. The
6025+field is now aliased to `data[0]`. Userspace can assume that it is only
6026+written if ndata is greater than 0.
60176027
60186028 ::
60196029
Documentation/vm/page_owner.rst+3−2
@@ -110,7 +110,7 @@ Usage · 109 unmodified lines
110110 If you want to sort by the page nums of buf, use the ``-m`` parameter.
111111 The detailed parameters are:
112112
113− fundamental function:
113+ fundamental function::
114114
115115 Sort:
116116 -a Sort by memory allocation time.
@@ -122,7 +122,7 @@ Usage · 5 unmodified lines
122122 -s Sort by stack trace.
123123 -t Sort by times (default).
124124
125− additional function:
125+ additional function::
126126
127127 Cull:
128128 --cull <rules>
@@ -153,6 +153,7 @@ Usage · 24 unmodified lines
153153
154154 STANDARD FORMAT SPECIFIERS
155155 ==========================
156+::
156157
157158 KEY LONG DESCRIPTION
158159 p pid process ID
MAINTAINERS+36−16
@@ -2638,6 +2638,7 @@ L: linux-samsung-soc@vger.kernel.org · 2637 unmodified lines
26382638 S: Maintained
26392639 C: irc://irc.libera.chat/linux-exynos
26402640 Q: https://patchwork.kernel.org/project/linux-samsung-soc/list/
2641+B: mailto:linux-samsung-soc@vger.kernel.org
26412642 T: git git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux.git
26422643 F: Documentation/arm/samsung/
26432644 F: Documentation/devicetree/bindings/arm/samsung/
@@ -3564,8 +3565,9 @@ M: Andy Gospodarek <andy@greyhouse.net> · 920 unmodified lines
35643565 L: netdev@vger.kernel.org
35653566 S: Supported
35663567 W: http://sourceforge.net/projects/bonding/
3568+F: Documentation/networking/bonding.rst
35673569 F: drivers/net/bonding/
3568−F: include/net/bonding.h
3570+F: include/net/bond*
35693571 F: include/uapi/linux/if_bonding.h
35703572
35713573 BOSCH SENSORTEC BMA400 ACCELEROMETER IIO DRIVER
@@ -3907,7 +3909,9 @@ BROADCOM BNXT_EN 50 GIGABIT ETHERNET DRIVER · 335 unmodified lines
39073909 M: Michael Chan <michael.chan@broadcom.com>
39083910 L: netdev@vger.kernel.org
39093911 S: Supported
3912+F: drivers/firmware/broadcom/tee_bnxt_fw.c
39103913 F: drivers/net/ethernet/broadcom/bnxt/
3914+F: include/linux/firmware/broadcom/tee_bnxt_fw.h
39113915
39123916 BROADCOM BRCM80211 IEEE802.11n WIRELESS DRIVER
39133917 M: Arend van Spriel <aspriel@gmail.com>
@@ -5430,6 +5434,7 @@ F: net/ax25/sysctl_net_ax25.c · 1516 unmodified lines
54305434
54315435 DATA ACCESS MONITOR
54325436 M: SeongJae Park <sj@kernel.org>
5437+L: damon@lists.linux.dev
54335438 L: linux-mm@kvack.org
54345439 S: Maintained
54355440 F: Documentation/ABI/testing/sysfs-kernel-mm-damon
@@ -5908,7 +5913,7 @@ R: Benjamin Gaignard <benjamin.gaignard@collabora.com> · 472 unmodified lines
59085913 R: Liam Mark <lmark@codeaurora.org>
59095914 R: Laura Abbott <labbott@redhat.com>
59105915 R: Brian Starkey <Brian.Starkey@arm.com>
5911−R: John Stultz <john.stultz@linaro.org>
5916+R: John Stultz <jstultz@google.com>
59125917 L: linux-media@vger.kernel.org
59135918 L: dri-devel@lists.freedesktop.org
59145919 L: linaro-mm-sig@lists.linaro.org (moderated for non-subscribers)
@@ -6578,7 +6583,7 @@ F: drivers/gpu/drm/gma500/ · 663 unmodified lines
65786583 DRM DRIVERS FOR HISILICON
65796584 M: Xinliang Liu <xinliang.liu@linaro.org>
65806585 M: Tian Tao <tiantao6@hisilicon.com>
6581−R: John Stultz <john.stultz@linaro.org>
6586+R: John Stultz <jstultz@google.com>
65826587 R: Xinwei Kong <kong.kongxinwei@hisilicon.com>
65836588 R: Chen Feng <puck.chen@hisilicon.com>
65846589 L: dri-devel@lists.freedesktop.org
@@ -7490,7 +7495,7 @@ F: Documentation/hwmon/f71805f.rst · 905 unmodified lines
74907495 F: drivers/hwmon/f71805f.c
74917496
74927497 FADDR2LINE
7493−M: Josh Poimboeuf <jpoimboe@redhat.com>
7498+M: Josh Poimboeuf <jpoimboe@kernel.org>
74947499 S: Maintained
74957500 F: scripts/faddr2line
74967501
@@ -8103,7 +8108,7 @@ M: Ingo Molnar <mingo@redhat.com> · 606 unmodified lines
81038108 R: Peter Zijlstra <peterz@infradead.org>
81048109 R: Darren Hart <dvhart@infradead.org>
81058110 R: Davidlohr Bueso <dave@stgolabs.net>
8106−R: André Almeida <andrealmeid@collabora.com>
8111+R: André Almeida <andrealmeid@igalia.com>
81078112 L: linux-kernel@vger.kernel.org
81088113 S: Maintained
81098114 T: git git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git locking/core
@@ -8376,7 +8381,7 @@ M: Linus Walleij <linus.walleij@linaro.org> · 266 unmodified lines
83768381 M: Bartosz Golaszewski <brgl@bgdev.pl>
83778382 L: linux-gpio@vger.kernel.org
83788383 S: Maintained
8379−T: git git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio.git
8384+T: git git://git.kernel.org/pub/scm/linux/kernel/git/brgl/linux.git
83808385 F: Documentation/ABI/obsolete/sysfs-gpio
83818386 F: Documentation/ABI/testing/gpio-cdev
83828387 F: Documentation/admin-guide/gpio/
@@ -8839,7 +8844,7 @@ F: Documentation/devicetree/bindings/net/hisilicon*.txt · 456 unmodified lines
88398844 F: drivers/net/ethernet/hisilicon/
88408845
88418846 HIKEY960 ONBOARD USB GPIO HUB DRIVER
8842−M: John Stultz <john.stultz@linaro.org>
8847+M: John Stultz <jstultz@google.com>
88438848 L: linux-kernel@vger.kernel.org
88448849 S: Maintained
88458850 F: drivers/misc/hisi_hikey_usb.c
@@ -10122,7 +10127,7 @@ S: Supported · 1276 unmodified lines
1012210127 F: drivers/net/wireless/intel/iwlegacy/
1012310128
1012410129 INTEL WIRELESS WIFI LINK (iwlwifi)
10125−M: Luca Coelho <luciano.coelho@intel.com>
10130+M: Gregory Greenman <gregory.greenman@intel.com>
1012610131 L: linux-wireless@vger.kernel.org
1012710132 S: Supported
1012810133 W: https://wireless.wiki.kernel.org/en/users/drivers/iwlwifi
@@ -10231,8 +10236,6 @@ F: drivers/net/ethernet/sgi/ioc3-eth.c · 102 unmodified lines
1023110236 IOMAP FILESYSTEM LIBRARY
1023210237 M: Christoph Hellwig <hch@infradead.org>
1023310238 M: Darrick J. Wong <djwong@kernel.org>
10234−M: linux-xfs@vger.kernel.org
10235−M: linux-fsdevel@vger.kernel.org
1023610239 L: linux-xfs@vger.kernel.org
1023710240 L: linux-fsdevel@vger.kernel.org
1023810241 S: Supported
@@ -11341,7 +11344,7 @@ F: drivers/mmc/host/litex_mmc.c · 1102 unmodified lines
1134111344 N: litex
1134211345
1134311346 LIVE PATCHING
11344−M: Josh Poimboeuf <jpoimboe@redhat.com>
11347+M: Josh Poimboeuf <jpoimboe@kernel.org>
1134511348 M: Jiri Kosina <jikos@kernel.org>
1134611349 M: Miroslav Benes <mbenes@suse.cz>
1134711350 M: Petr Mladek <pmladek@suse.com>
@@ -11967,6 +11970,7 @@ M: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> · 619 unmodified lines
1196711970 M: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
1196811971 L: linux-pm@vger.kernel.org
1196911972 S: Supported
11973+B: mailto:linux-samsung-soc@vger.kernel.org
1197011974 F: Documentation/devicetree/bindings/power/supply/maxim,max14577.yaml
1197111975 F: Documentation/devicetree/bindings/power/supply/maxim,max77693.yaml
1197211976 F: drivers/power/supply/max14577_charger.c
@@ -11978,6 +11982,7 @@ M: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> · 5 unmodified lines
1197811982 M: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
1197911983 L: linux-kernel@vger.kernel.org
1198011984 S: Supported
11985+B: mailto:linux-samsung-soc@vger.kernel.org
1198111986 F: Documentation/devicetree/bindings/*/maxim,max14577.yaml
1198211987 F: Documentation/devicetree/bindings/*/maxim,max77686.yaml
1198311988 F: Documentation/devicetree/bindings/*/maxim,max77693.yaml
@@ -12671,6 +12676,7 @@ MEMORY CONTROLLER DRIVERS · 687 unmodified lines
1267112676 M: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
1267212677 L: linux-kernel@vger.kernel.org
1267312678 S: Maintained
12679+B: mailto:krzysztof.kozlowski@linaro.org
1267412680 T: git git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl.git
1267512681 F: Documentation/devicetree/bindings/memory-controllers/
1267612682 F: drivers/memory/
@@ -13619,6 +13625,7 @@ F: net/core/drop_monitor.c · 942 unmodified lines
1361913625
1362013626 NETWORKING DRIVERS
1362113627 M: "David S. Miller" <davem@davemloft.net>
13628+M: Eric Dumazet <edumazet@google.com>
1362213629 M: Jakub Kicinski <kuba@kernel.org>
1362313630 M: Paolo Abeni <pabeni@redhat.com>
1362413631 L: netdev@vger.kernel.org
@@ -13666,6 +13673,7 @@ F: tools/testing/selftests/drivers/net/dsa/ · 41 unmodified lines
1366613673
1366713674 NETWORKING [GENERAL]
1366813675 M: "David S. Miller" <davem@davemloft.net>
13676+M: Eric Dumazet <edumazet@google.com>
1366913677 M: Jakub Kicinski <kuba@kernel.org>
1367013678 M: Paolo Abeni <pabeni@redhat.com>
1367113679 L: netdev@vger.kernel.org
@@ -14212,7 +14220,7 @@ F: lib/objagg.c · 540 unmodified lines
1421214220 F: lib/test_objagg.c
1421314221
1421414222 OBJTOOL
14215−M: Josh Poimboeuf <jpoimboe@redhat.com>
14223+M: Josh Poimboeuf <jpoimboe@kernel.org>
1421614224 M: Peter Zijlstra <peterz@infradead.org>
1421714225 S: Supported
1421814226 F: tools/objtool/
@@ -15463,7 +15471,8 @@ F: tools/perf/ · 1244 unmodified lines
1546315471 PERFORMANCE EVENTS TOOLING ARM64
1546415472 R: John Garry <john.garry@huawei.com>
1546515473 R: Will Deacon <will@kernel.org>
15466−R: Mathieu Poirier <mathieu.poirier@linaro.org>
15474+R: James Clark <james.clark@arm.com>
15475+R: Mike Leach <mike.leach@linaro.org>
1546715476 R: Leo Yan <leo.yan@linaro.org>
1546815477 L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
1546915478 S: Supported
@@ -15603,6 +15612,7 @@ L: linux-samsung-soc@vger.kernel.org · 133 unmodified lines
1560315612 S: Maintained
1560415613 C: irc://irc.libera.chat/linux-exynos
1560515614 Q: https://patchwork.kernel.org/project/linux-samsung-soc/list/
15615+B: mailto:linux-samsung-soc@vger.kernel.org
1560615616 T: git git://git.kernel.org/pub/scm/linux/kernel/git/pinctrl/samsung.git
1560715617 F: Documentation/devicetree/bindings/pinctrl/samsung,pinctrl*yaml
1560815618 F: drivers/pinctrl/samsung/
@@ -17319,6 +17329,7 @@ M: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> · 1710 unmodified lines
1731917329 M: Sylwester Nawrocki <s.nawrocki@samsung.com>
1732017330 L: alsa-devel@alsa-project.org (moderated for non-subscribers)
1732117331 S: Supported
17332+B: mailto:linux-samsung-soc@vger.kernel.org
1732217333 F: Documentation/devicetree/bindings/sound/samsung*
1732317334 F: sound/soc/samsung/
1732417335
@@ -17363,6 +17374,7 @@ M: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com> · 38 unmodified lines
1736317374 L: linux-kernel@vger.kernel.org
1736417375 L: linux-samsung-soc@vger.kernel.org
1736517376 S: Supported
17377+B: mailto:linux-samsung-soc@vger.kernel.org
1736617378 F: Documentation/devicetree/bindings/clock/samsung,s2mps11.yaml
1736717379 F: Documentation/devicetree/bindings/mfd/samsung,s2m*.yaml
1736817380 F: Documentation/devicetree/bindings/mfd/samsung,s5m*.yaml
@@ -18777,7 +18789,7 @@ F: include/dt-bindings/reset/starfive-jh7100.h · 1408 unmodified lines
1877718789
1877818790 STATIC BRANCH/CALL
1877918791 M: Peter Zijlstra <peterz@infradead.org>
18780−M: Josh Poimboeuf <jpoimboe@redhat.com>
18792+M: Josh Poimboeuf <jpoimboe@kernel.org>
1878118793 M: Jason Baron <jbaron@akamai.com>
1878218794 R: Steven Rostedt <rostedt@goodmis.org>
1878318795 R: Ard Biesheuvel <ardb@kernel.org>
@@ -19778,7 +19790,7 @@ F: drivers/net/wireless/ti/ · 994 unmodified lines
1977819790 F: include/linux/wl12xx.h
1977919791
1978019792 TIMEKEEPING, CLOCKSOURCE CORE, NTP, ALARMTIMER
19781−M: John Stultz <john.stultz@linaro.org>
19793+M: John Stultz <jstultz@google.com>
1978219794 M: Thomas Gleixner <tglx@linutronix.de>
1978319795 R: Stephen Boyd <sboyd@kernel.org>
1978419796 L: linux-kernel@vger.kernel.org
@@ -21428,6 +21440,15 @@ F: arch/x86/include/asm/uv/ · 1643 unmodified lines
2142821440 F: arch/x86/kernel/apic/x2apic_uv_x.c
2142921441 F: arch/x86/platform/uv/
2143021442
21443+X86 STACK UNWINDING
21444+M: Josh Poimboeuf <jpoimboe@kernel.org>
21445+M: Peter Zijlstra <peterz@infradead.org>
21446+S: Supported
21447+F: arch/x86/include/asm/unwind*.h
21448+F: arch/x86/kernel/dumpstack.c
21449+F: arch/x86/kernel/stacktrace.c
21450+F: arch/x86/kernel/unwind_*.c
21451+
2143121452 X86 VDSO
2143221453 M: Andy Lutomirski <luto@kernel.org>
2143321454 L: linux-kernel@vger.kernel.org
@@ -21590,7 +21611,6 @@ F: drivers/xen/*swiotlb* · 156 unmodified lines
2159021611 XFS FILESYSTEM
2159121612 C: irc://irc.oftc.net/xfs
2159221613 M: Darrick J. Wong <djwong@kernel.org>
21593−M: linux-xfs@vger.kernel.org
2159421614 L: linux-xfs@vger.kernel.org
2159521615 S: Supported
2159621616 W: http://xfs.org/
Makefile+1−1
@@ -2,7 +2,7 @@ · 1 unmodified line
22 VERSION = 5
33 PATCHLEVEL = 18
44 SUBLEVEL = 0
5−EXTRAVERSION = -rc4
5+EXTRAVERSION = -rc7
66 NAME = Superb Owl
77
88 # *DOCUMENTATION*
arch/arm/boot/dts/am33xx-l4.dtsi+2−0
@@ -263,6 +263,8 @@ · 262 unmodified lines
263263 compatible = "ti,am3359-tscadc";
264264 reg = <0x0 0x1000>;
265265 interrupts = <16>;
266+ clocks = <&adc_tsc_fck>;
267+ clock-names = "fck";
266268 status = "disabled";
267269 dmas = <&edma 53 0>, <&edma 57 0>;
268270 dma-names = "fifo0", "fifo1";
arch/arm/boot/dts/am3517-evm.dts+40−5
@@ -161,6 +161,8 @@ · 160 unmodified lines
161161
162162 /* HS USB Host PHY on PORT 1 */
163163 hsusb1_phy: hsusb1_phy {
164+ pinctrl-names = "default";
165+ pinctrl-0 = <&hsusb1_rst_pins>;
164166 compatible = "usb-nop-xceiv";
165167 reset-gpios = <&gpio2 25 GPIO_ACTIVE_LOW>; /* gpio_57 */
166168 #phy-cells = <0>;
@@ -168,7 +170,9 @@ · 1 unmodified line
168170 };
169171
170172 &davinci_emac {
171− status = "okay";
173+ pinctrl-names = "default";
174+ pinctrl-0 = <&ethernet_pins>;
175+ status = "okay";
172176 };
173177
174178 &davinci_mdio {
@@ -193,6 +197,8 @@ · 18 unmodified lines
193197 };
194198
195199 &i2c2 {
200+ pinctrl-names = "default";
201+ pinctrl-0 = <&i2c2_pins>;
196202 clock-frequency = <400000>;
197203 /* User DIP swithes [1:8] / User LEDS [1:2] */
198204 tca6416: gpio@21 {
@@ -205,6 +211,8 @@ · 6 unmodified lines
205211 };
206212
207213 &i2c3 {
214+ pinctrl-names = "default";
215+ pinctrl-0 = <&i2c3_pins>;
208216 clock-frequency = <400000>;
209217 };
210218
@@ -223,6 +231,8 @@ · 12 unmodified lines
223231 };
224232
225233 &usbhshost {
234+ pinctrl-names = "default";
235+ pinctrl-0 = <&hsusb1_pins>;
226236 port1-mode = "ehci-phy";
227237 };
228238
@@ -231,8 +241,35 @@ · 2 unmodified lines
231241 };
232242
233243 &omap3_pmx_core {
234− pinctrl-names = "default";
235− pinctrl-0 = <&hsusb1_rst_pins>;
244+
245+ ethernet_pins: pinmux_ethernet_pins {
246+ pinctrl-single,pins = <
247+ OMAP3_CORE1_IOPAD(0x21fe, PIN_INPUT | MUX_MODE0) /* rmii_mdio_data */
248+ OMAP3_CORE1_IOPAD(0x2200, MUX_MODE0) /* rmii_mdio_clk */
249+ OMAP3_CORE1_IOPAD(0x2202, PIN_INPUT_PULLDOWN | MUX_MODE0) /* rmii_rxd0 */
250+ OMAP3_CORE1_IOPAD(0x2204, PIN_INPUT_PULLDOWN | MUX_MODE0) /* rmii_rxd1 */
251+ OMAP3_CORE1_IOPAD(0x2206, PIN_INPUT_PULLDOWN | MUX_MODE0) /* rmii_crs_dv */
252+ OMAP3_CORE1_IOPAD(0x2208, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* rmii_rxer */
253+ OMAP3_CORE1_IOPAD(0x220a, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* rmii_txd0 */
254+ OMAP3_CORE1_IOPAD(0x220c, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* rmii_txd1 */
255+ OMAP3_CORE1_IOPAD(0x220e, PIN_OUTPUT_PULLDOWN |MUX_MODE0) /* rmii_txen */
256+ OMAP3_CORE1_IOPAD(0x2210, PIN_INPUT_PULLDOWN | MUX_MODE0) /* rmii_50mhz_clk */
257+ >;
258+ };
259+
260+ i2c2_pins: pinmux_i2c2_pins {
261+ pinctrl-single,pins = <
262+ OMAP3_CORE1_IOPAD(0x21be, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c2_scl */
263+ OMAP3_CORE1_IOPAD(0x21c0, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c2_sda */
264+ >;
265+ };
266+
267+ i2c3_pins: pinmux_i2c3_pins {
268+ pinctrl-single,pins = <
269+ OMAP3_CORE1_IOPAD(0x21c2, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c3_scl */
270+ OMAP3_CORE1_IOPAD(0x21c4, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c3_sda */
271+ >;
272+ };
236273
237274 leds_pins: pinmux_leds_pins {
238275 pinctrl-single,pins = <
@@ -300,8 +337,6 @@ · 61 unmodified lines
300337 };
301338
302339 &omap3_pmx_core2 {
303− pinctrl-names = "default";
304− pinctrl-0 = <&hsusb1_pins>;
305340
306341 hsusb1_pins: pinmux_hsusb1_pins {
307342 pinctrl-single,pins = <
arch/arm/boot/dts/am3517-som.dtsi+9−0
@@ -69,6 +69,8 @@ · 68 unmodified lines
6969 };
7070
7171 &i2c1 {
72+ pinctrl-names = "default";
73+ pinctrl-0 = <&i2c1_pins>;
7274 clock-frequency = <400000>;
7375
7476 s35390a: s35390a@30 {
@@ -179,6 +181,13 @@ · 104 unmodified lines
179181
180182 &omap3_pmx_core {
181183
184+ i2c1_pins: pinmux_i2c1_pins {
185+ pinctrl-single,pins = <
186+ OMAP3_CORE1_IOPAD(0x21ba, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c1_scl */
187+ OMAP3_CORE1_IOPAD(0x21bc, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c1_sda */
188+ >;
189+ };
190+
182191 wl12xx_buffer_pins: pinmux_wl12xx_buffer_pins {
183192 pinctrl-single,pins = <
184193 OMAP3_CORE1_IOPAD(0x2156, PIN_OUTPUT | MUX_MODE4) /* mmc1_dat7.gpio_129 */
arch/arm/boot/dts/at91-dvk_su60_somc.dtsi+1−1
@@ -44,7 +44,7 @@ · 43 unmodified lines
4444 status = "okay";
4545
4646 /* spi0.0: 4M Flash Macronix MX25R4035FM1IL0 */
47− spi-flash@0 {
47+ flash@0 {
4848 compatible = "mxicy,mx25u4035", "jedec,spi-nor";
4949 spi-max-frequency = <33000000>;
5050 reg = <0>;
arch/arm/boot/dts/at91-kizbox3-hs.dts+1−1
@@ -225,7 +225,7 @@ · 224 unmodified lines
225225 pinctrl_pio_io_reset: gpio_io_reset {
226226 pinmux = <PIN_PB30__GPIO>;
227227 bias-disable;
228− drive-open-drain;
228+ drive-open-drain = <1>;
229229 output-low;
230230 };
231231 pinctrl_pio_input: gpio_input {
arch/arm/boot/dts/at91-kizbox3_common.dtsi+1−1
@@ -211,7 +211,7 @@ · 210 unmodified lines
211211 pinmux = <PIN_PD12__FLEXCOM4_IO0>, //DATA
212212 <PIN_PD13__FLEXCOM4_IO1>; //CLK
213213 bias-disable;
214− drive-open-drain;
214+ drive-open-drain = <1>;
215215 };
216216
217217 pinctrl_pwm0 {
arch/arm/boot/dts/at91-q5xr5.dts+1−1
@@ -125,7 +125,7 @@ · 124 unmodified lines
125125 cs-gpios = <&pioA 3 GPIO_ACTIVE_HIGH>, <&pioC 11 GPIO_ACTIVE_LOW>, <0>, <0>;
126126 status = "okay";
127127
128− m25p80@0 {
128+ flash@0 {
129129 compatible = "jedec,spi-nor";
130130 spi-max-frequency = <20000000>;
131131 reg = <0>;
arch/arm/boot/dts/at91-sama5d27_wlsom1.dtsi+1−1
@@ -214,7 +214,7 @@ · 213 unmodified lines
214214 pinctrl-0 = <&pinctrl_qspi1_default>;
215215 status = "disabled";
216216
217− qspi1_flash: spi_flash@0 {
217+ qspi1_flash: flash@0 {
218218 #address-cells = <1>;
219219 #size-cells = <1>;
220220 compatible = "jedec,spi-nor";
arch/arm/boot/dts/at91-sama5d27_wlsom1_ek.dts+1−1
@@ -191,7 +191,7 @@ · 190 unmodified lines
191191 &qspi1 {
192192 status = "okay";
193193
194− qspi1_flash: spi_flash@0 {
194+ qspi1_flash: flash@0 {
195195 status = "okay";
196196 };
197197 };
arch/arm/boot/dts/at91-sama5d2_xplained.dts+1−1
@@ -137,7 +137,7 @@ · 136 unmodified lines
137137 pinctrl-0 = <&pinctrl_spi0_default>;
138138 status = "okay";
139139
140− m25p80@0 {
140+ flash@0 {
141141 compatible = "atmel,at25df321a";
142142 reg = <0>;
143143 spi-max-frequency = <50000000>;
arch/arm/boot/dts/at91-sama5d3_xplained.dts+4−4
@@ -57,8 +57,8 @@ · 56 unmodified lines
5757 };
5858
5959 spi0: spi@f0004000 {
60− pinctrl-names = "default";
61− pinctrl-0 = <&pinctrl_spi0_cs>;
60+ pinctrl-names = "default", "cs";
61+ pinctrl-1 = <&pinctrl_spi0_cs>;
6262 cs-gpios = <&pioD 13 0>, <0>, <0>, <&pioD 16 0>;
6363 status = "okay";
6464 };
@@ -171,8 +171,8 @@ · 106 unmodified lines
171171 };
172172
173173 spi1: spi@f8008000 {
174− pinctrl-names = "default";
175− pinctrl-0 = <&pinctrl_spi1_cs>;
174+ pinctrl-names = "default", "cs";
175+ pinctrl-1 = <&pinctrl_spi1_cs>;
176176 cs-gpios = <&pioC 25 0>;
177177 status = "okay";
178178 };
arch/arm/boot/dts/at91-sama5d4_ma5d4.dtsi+1−1
@@ -49,7 +49,7 @@ · 48 unmodified lines
4949 cs-gpios = <&pioC 3 0>, <0>, <0>, <0>;
5050 status = "okay";
5151
52− m25p80@0 {
52+ flash@0 {
5353 compatible = "atmel,at25df321a";
5454 spi-max-frequency = <50000000>;
5555 reg = <0>;
arch/arm/boot/dts/at91-sama5d4_xplained.dts+3−3
@@ -81,8 +81,8 @@ · 80 unmodified lines
8181 };
8282
8383 spi1: spi@fc018000 {
84− pinctrl-names = "default";
85− pinctrl-0 = <&pinctrl_spi0_cs>;
84+ pinctrl-names = "default", "cs";
85+ pinctrl-1 = <&pinctrl_spi1_cs>;
8686 cs-gpios = <&pioB 21 0>;
8787 status = "okay";
8888 };
@@ -140,7 +140,7 @@ · 51 unmodified lines
140140 atmel,pins =
141141 <AT91_PIOE 1 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>;
142142 };
143− pinctrl_spi0_cs: spi0_cs_default {
143+ pinctrl_spi1_cs: spi1_cs_default {
144144 atmel,pins =
145145 <AT91_PIOB 21 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
146146 };
arch/arm/boot/dts/at91-sama5d4ek.dts+1−1
@@ -65,7 +65,7 @@ · 64 unmodified lines
6565 spi0: spi@f8010000 {
6666 cs-gpios = <&pioC 3 0>, <0>, <0>, <0>;
6767 status = "okay";
68− m25p80@0 {
68+ flash@0 {
6969 compatible = "atmel,at25df321a";
7070 spi-max-frequency = <50000000>;
7171 reg = <0>;
arch/arm/boot/dts/at91-sama7g5ek.dts+2−2
@@ -495,7 +495,7 @@ · 494 unmodified lines
495495 pinctrl_flx3_default: flx3_default {
496496 pinmux = <PIN_PD16__FLEXCOM3_IO0>,
497497 <PIN_PD17__FLEXCOM3_IO1>;
498− bias-disable;
498+ bias-pull-up;
499499 };
500500
501501 pinctrl_flx4_default: flx4_default {
@@ -655,7 +655,7 @@ · 153 unmodified lines
655655 <PIN_PB21__QSPI0_INT>;
656656 bias-disable;
657657 slew-rate = <0>;
658− atmel,drive-strength = <ATMEL_PIO_DRVSTR_HI>;
658+ atmel,drive-strength = <ATMEL_PIO_DRVSTR_ME>;
659659 };
660660
661661 pinctrl_sdmmc0_default: sdmmc0_default {
arch/arm/boot/dts/at91-vinco.dts+1−1
@@ -59,7 +59,7 @@ · 58 unmodified lines
5959 spi0: spi@f8010000 {
6060 cs-gpios = <&pioC 3 0>, <0>, <0>, <0>;
6161 status = "okay";
62− m25p80@0 {
62+ flash@0 {
6363 compatible = "n25q32b", "jedec,spi-nor";
6464 spi-max-frequency = <50000000>;
6565 reg = <0>;
arch/arm/boot/dts/at91rm9200ek.dts+2−2
@@ -73,7 +73,7 @@ · 72 unmodified lines
7373 spi0: spi@fffe0000 {
7474 status = "okay";
7575 cs-gpios = <&pioA 3 0>, <0>, <0>, <0>;
76− mtd_dataflash@0 {
76+ flash@0 {
7777 compatible = "atmel,at45", "atmel,dataflash";
7878 spi-max-frequency = <15000000>;
7979 reg = <0>;
@@ -94,7 +94,7 @@ · 14 unmodified lines
9494 status = "okay";
9595 };
9696
97− nor_flash@10000000 {
97+ flash@10000000 {
9898 compatible = "cfi-flash";
9999 reg = <0x10000000 0x800000>;
100100 linux,mtd-name = "physmap-flash.0";
arch/arm/boot/dts/at91sam9260ek.dts+1−1
@@ -92,7 +92,7 @@ · 91 unmodified lines
9292
9393 spi0: spi@fffc8000 {
9494 cs-gpios = <0>, <&pioC 11 0>, <0>, <0>;
95− mtd_dataflash@1 {
95+ flash@1 {
9696 compatible = "atmel,at45", "atmel,dataflash";
9797 spi-max-frequency = <50000000>;
9898 reg = <1>;
arch/arm/boot/dts/at91sam9261ek.dts+1−1
@@ -145,7 +145,7 @@ · 144 unmodified lines
145145 cs-gpios = <&pioA 3 0>, <0>, <&pioA 28 0>, <0>;
146146 status = "okay";
147147
148− mtd_dataflash@0 {
148+ flash@0 {
149149 compatible = "atmel,at45", "atmel,dataflash";
150150 reg = <0>;
151151 spi-max-frequency = <15000000>;
arch/arm/boot/dts/at91sam9263ek.dts+1−1
@@ -95,7 +95,7 @@ · 94 unmodified lines
9595 spi0: spi@fffa4000 {
9696 status = "okay";
9797 cs-gpios = <&pioA 5 0>, <0>, <0>, <0>;
98− mtd_dataflash@0 {
98+ flash@0 {
9999 compatible = "atmel,at45", "atmel,dataflash";
100100 spi-max-frequency = <50000000>;
101101 reg = <0>;
arch/arm/boot/dts/at91sam9g20ek_common.dtsi+44−1
@@ -110,7 +110,7 @@ · 109 unmodified lines
110110
111111 spi0: spi@fffc8000 {
112112 cs-gpios = <0>, <&pioC 11 0>, <0>, <0>;
113− mtd_dataflash@1 {
113+ flash@1 {
114114 compatible = "atmel,at45", "atmel,dataflash";
115115 spi-max-frequency = <50000000>;
116116 reg = <1>;
@@ -214,11 +214,23 @@ · 97 unmodified lines
214214 24c512@50 {
215215 compatible = "atmel,24c512";
216216 reg = <0x50>;
217+ vcc-supply = <&reg_3v3>;
217218 };
218219
219220 wm8731: wm8731@1b {
220221 compatible = "wm8731";
221222 reg = <0x1b>;
223+
224+ /* PCK0 at 12MHz */
225+ clocks = <&pmc PMC_TYPE_SYSTEM 8>;
226+ clock-names = "mclk";
227+ assigned-clocks = <&pmc PMC_TYPE_SYSTEM 8>;
228+ assigned-clock-rates = <12000000>;
229+
230+ HPVDD-supply = <&vcc_dac>;
231+ AVDD-supply = <&vcc_dac>;
232+ DCVDD-supply = <&reg_3v3>;
233+ DBVDD-supply = <&reg_3v3>;
222234 };
223235 };
224236
@@ -254,4 +266,35 @@ · 29 unmodified lines
254266 atmel,ssc-controller = <&ssc0>;
255267 atmel,audio-codec = <&wm8731>;
256268 };
269+
270+ reg_5v: fixedregulator0 {
271+ compatible = "regulator-fixed";
272+ regulator-name = "5V";
273+ regulator-min-microvolt = <5000000>;
274+ regulator-max-microvolt = <5000000>;
275+ };
276+
277+ reg_3v3: fixedregulator1 {
278+ compatible = "regulator-fixed";
279+ regulator-name = "3V3";
280+ vin-supply = <&reg_5v>;
281+ regulator-min-microvolt = <3300000>;
282+ regulator-max-microvolt = <3300000>;
283+ };
284+
285+ reg_1v: fixedregulator2 {
286+ compatible = "regulator-fixed";
287+ regulator-name = "1V";
288+ vin-supply = <&reg_5v>;
289+ regulator-min-microvolt = <1000000>;
290+ regulator-max-microvolt = <1000000>;
291+ };
292+
293+ vcc_dac: fixedregulator3 {
294+ compatible = "regulator-fixed";
295+ regulator-name = "VCC_DAC";
296+ vin-supply = <&reg_3v3>;
297+ regulator-min-microvolt = <3300000>;
298+ regulator-max-microvolt = <3300000>;
299+ };
257300 };
arch/arm/boot/dts/at91sam9m10g45ek.dts+1−1
@@ -167,7 +167,7 @@ · 166 unmodified lines
167167 spi0: spi@fffa4000{
168168 status = "okay";
169169 cs-gpios = <&pioB 3 0>, <0>, <0>, <0>;
170− mtd_dataflash@0 {
170+ flash@0 {
171171 compatible = "atmel,at45", "atmel,dataflash";
172172 spi-max-frequency = <13000000>;
173173 reg = <0>;
arch/arm/boot/dts/at91sam9n12ek.dts+1−1
@@ -119,7 +119,7 @@ · 118 unmodified lines
119119 spi0: spi@f0000000 {
120120 status = "okay";
121121 cs-gpios = <&pioA 14 0>, <0>, <0>, <0>;
122− m25p80@0 {
122+ flash@0 {
123123 compatible = "atmel,at25df321a";
124124 spi-max-frequency = <50000000>;
125125 reg = <0>;
arch/arm/boot/dts/at91sam9rlek.dts+1−1
@@ -180,7 +180,7 @@ · 179 unmodified lines
180180 spi0: spi@fffcc000 {
181181 status = "okay";
182182 cs-gpios = <&pioA 28 0>, <0>, <0>, <0>;
183− mtd_dataflash@0 {
183+ flash@0 {
184184 compatible = "atmel,at45", "atmel,dataflash";
185185 spi-max-frequency = <15000000>;
186186 reg = <0>;
arch/arm/boot/dts/at91sam9x5ek.dtsi+1−1
@@ -125,7 +125,7 @@ · 124 unmodified lines
125125 cs-gpios = <&pioA 14 0>, <0>, <0>, <0>;
126126 status = "disabled"; /* conflicts with mmc1 */
127127
128− m25p80@0 {
128+ flash@0 {
129129 compatible = "atmel,at25df321a";
130130 spi-max-frequency = <50000000>;
131131 reg = <0>;
arch/arm/boot/dts/dra7-l4.dtsi+2−2
@@ -4188,11 +4188,11 @@ · 4187 unmodified lines
41884188 reg = <0x1d0010 0x4>;
41894189 reg-names = "sysc";
41904190 ti,sysc-midle = <SYSC_IDLE_FORCE>,
4191− <SYSC_IDLE_NO>,
4192− <SYSC_IDLE_SMART>;
4191+ <SYSC_IDLE_NO>;
41934192 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
41944193 <SYSC_IDLE_NO>,
41954194 <SYSC_IDLE_SMART>;
4195+ power-domains = <&prm_vpe>;
41964196 clocks = <&vpe_clkctrl DRA7_VPE_VPE_CLKCTRL 0>;
41974197 clock-names = "fck";
41984198 #address-cells = <1>;
arch/arm/boot/dts/imx6qdl-apalis.dtsi+8−2
@@ -286,6 +286,8 @@ · 285 unmodified lines
286286 codec: sgtl5000@a {
287287 compatible = "fsl,sgtl5000";
288288 reg = <0x0a>;
289+ pinctrl-names = "default";
290+ pinctrl-0 = <&pinctrl_sgtl5000>;
289291 clocks = <&clks IMX6QDL_CLK_CKO>;
290292 VDDA-supply = <&reg_module_3v3_audio>;
291293 VDDIO-supply = <&reg_module_3v3>;
@@ -517,8 +519,6 @@ · 225 unmodified lines
517519 MX6QDL_PAD_DISP0_DAT21__AUD4_TXD 0x130b0
518520 MX6QDL_PAD_DISP0_DAT22__AUD4_TXFS 0x130b0
519521 MX6QDL_PAD_DISP0_DAT23__AUD4_RXD 0x130b0
520− /* SGTL5000 sys_mclk */
521− MX6QDL_PAD_GPIO_5__CCM_CLKO1 0x130b0
522522 >;
523523 };
524524
@@ -811,6 +811,12 @@ · 286 unmodified lines
811811 >;
812812 };
813813
814+ pinctrl_sgtl5000: sgtl5000grp {
815+ fsl,pins = <
816+ MX6QDL_PAD_GPIO_5__CCM_CLKO1 0x130b0
817+ >;
818+ };
819+
814820 pinctrl_spdif: spdifgrp {
815821 fsl,pins = <
816822 MX6QDL_PAD_GPIO_16__SPDIF_IN 0x1b0b0
arch/arm/boot/dts/imx6ull-colibri.dtsi+1−1
@@ -37,7 +37,7 @@ · 36 unmodified lines
3737
3838 reg_sd1_vmmc: regulator-sd1-vmmc {
3939 compatible = "regulator-gpio";
40− gpio = <&gpio5 9 GPIO_ACTIVE_HIGH>;
40+ gpios = <&gpio5 9 GPIO_ACTIVE_HIGH>;
4141 pinctrl-names = "default";
4242 pinctrl-0 = <&pinctrl_snvs_reg_sd>;
4343 regulator-always-on;
arch/arm/boot/dts/logicpd-som-lv-35xx-devkit.dts+15−0
@@ -11,3 +11,18 @@ · 10 unmodified lines
1111 model = "LogicPD Zoom OMAP35xx SOM-LV Development Kit";
1212 compatible = "logicpd,dm3730-som-lv-devkit", "ti,omap3430", "ti,omap3";
1313 };
14+
15+&omap3_pmx_core2 {
16+ pinctrl-names = "default";
17+ pinctrl-0 = <&hsusb2_2_pins>;
18+ hsusb2_2_pins: pinmux_hsusb2_2_pins {
19+ pinctrl-single,pins = <
20+ OMAP3430_CORE2_IOPAD(0x25f0, PIN_OUTPUT | MUX_MODE3) /* etk_d10.hsusb2_clk */
21+ OMAP3430_CORE2_IOPAD(0x25f2, PIN_OUTPUT | MUX_MODE3) /* etk_d11.hsusb2_stp */
22+ OMAP3430_CORE2_IOPAD(0x25f4, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d12.hsusb2_dir */
23+ OMAP3430_CORE2_IOPAD(0x25f6, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d13.hsusb2_nxt */
24+ OMAP3430_CORE2_IOPAD(0x25f8, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d14.hsusb2_data0 */
25+ OMAP3430_CORE2_IOPAD(0x25fa, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d15.hsusb2_data1 */
26+ >;
27+ };
28+};
arch/arm/boot/dts/logicpd-som-lv-37xx-devkit.dts+15−0
@@ -11,3 +11,18 @@ · 10 unmodified lines
1111 model = "LogicPD Zoom DM3730 SOM-LV Development Kit";
1212 compatible = "logicpd,dm3730-som-lv-devkit", "ti,omap3630", "ti,omap3";
1313 };
14+
15+&omap3_pmx_core2 {
16+ pinctrl-names = "default";
17+ pinctrl-0 = <&hsusb2_2_pins>;
18+ hsusb2_2_pins: pinmux_hsusb2_2_pins {
19+ pinctrl-single,pins = <
20+ OMAP3630_CORE2_IOPAD(0x25f0, PIN_OUTPUT | MUX_MODE3) /* etk_d10.hsusb2_clk */
21+ OMAP3630_CORE2_IOPAD(0x25f2, PIN_OUTPUT | MUX_MODE3) /* etk_d11.hsusb2_stp */
22+ OMAP3630_CORE2_IOPAD(0x25f4, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d12.hsusb2_dir */
23+ OMAP3630_CORE2_IOPAD(0x25f6, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d13.hsusb2_nxt */
24+ OMAP3630_CORE2_IOPAD(0x25f8, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d14.hsusb2_data0 */
25+ OMAP3630_CORE2_IOPAD(0x25fa, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d15.hsusb2_data1 */
26+ >;
27+ };
28+};
arch/arm/boot/dts/logicpd-som-lv.dtsi+0−15
@@ -265,21 +265,6 @@ · 264 unmodified lines
265265 };
266266 };
267267
268−&omap3_pmx_core2 {
269− pinctrl-names = "default";
270− pinctrl-0 = <&hsusb2_2_pins>;
271− hsusb2_2_pins: pinmux_hsusb2_2_pins {
272− pinctrl-single,pins = <
273− OMAP3630_CORE2_IOPAD(0x25f0, PIN_OUTPUT | MUX_MODE3) /* etk_d10.hsusb2_clk */
274− OMAP3630_CORE2_IOPAD(0x25f2, PIN_OUTPUT | MUX_MODE3) /* etk_d11.hsusb2_stp */
275− OMAP3630_CORE2_IOPAD(0x25f4, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d12.hsusb2_dir */
276− OMAP3630_CORE2_IOPAD(0x25f6, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d13.hsusb2_nxt */
277− OMAP3630_CORE2_IOPAD(0x25f8, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d14.hsusb2_data0 */
278− OMAP3630_CORE2_IOPAD(0x25fa, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d15.hsusb2_data1 */
279− >;
280− };
281−};
282−
283268 &uart2 {
284269 interrupts-extended = <&intc 73 &omap3_pmx_core OMAP3_UART2_RX>;
285270 pinctrl-names = "default";
arch/arm/boot/dts/omap3-gta04.dtsi+2−0
@@ -31,6 +31,8 @@ · 30 unmodified lines
3131 aliases {
3232 display0 = &lcd;
3333 display1 = &tv0;
34+ /delete-property/ mmc2;
35+ /delete-property/ mmc3;
3436 };
3537
3638 ldo_3v3: fixedregulator {
arch/arm/boot/dts/sama5d3xmb.dtsi+1−1
@@ -26,7 +26,7 @@ · 25 unmodified lines
2626 spi0: spi@f0004000 {
2727 dmas = <0>, <0>; /* Do not use DMA for spi0 */
2828
29− m25p80@0 {
29+ flash@0 {
3030 compatible = "atmel,at25df321a";
3131 spi-max-frequency = <50000000>;
3232 reg = <0>;
arch/arm/boot/dts/sama5d3xmb_cmp.dtsi+1−1
@@ -25,7 +25,7 @@ · 24 unmodified lines
2525 spi0: spi@f0004000 {
2626 dmas = <0>, <0>; /* Do not use DMA for spi0 */
2727
28− m25p80@0 {
28+ flash@0 {
2929 compatible = "atmel,at25df321a";
3030 spi-max-frequency = <50000000>;
3131 reg = <0>;
arch/arm/boot/dts/sama7g5.dtsi+9−9
@@ -601,9 +601,9 @@ · 600 unmodified lines
601601 #size-cells = <0>;
602602 clocks = <&pmc PMC_TYPE_PERIPHERAL 39>;
603603 atmel,fifo-size = <32>;
604− dmas = <&dma0 AT91_XDMAC_DT_PERID(7)>,
605− <&dma0 AT91_XDMAC_DT_PERID(8)>;
606− dma-names = "rx", "tx";
604+ dmas = <&dma0 AT91_XDMAC_DT_PERID(8)>,
605+ <&dma0 AT91_XDMAC_DT_PERID(7)>;
606+ dma-names = "tx", "rx";
607607 status = "disabled";
608608 };
609609 };
@@ -786,9 +786,9 @@ · 176 unmodified lines
786786 #size-cells = <0>;
787787 clocks = <&pmc PMC_TYPE_PERIPHERAL 46>;
788788 atmel,fifo-size = <32>;
789− dmas = <&dma0 AT91_XDMAC_DT_PERID(21)>,
790− <&dma0 AT91_XDMAC_DT_PERID(22)>;
791− dma-names = "rx", "tx";
789+ dmas = <&dma0 AT91_XDMAC_DT_PERID(22)>,
790+ <&dma0 AT91_XDMAC_DT_PERID(21)>;
791+ dma-names = "tx", "rx";
792792 status = "disabled";
793793 };
794794 };
@@ -810,9 +810,9 @@ · 15 unmodified lines
810810 #size-cells = <0>;
811811 clocks = <&pmc PMC_TYPE_PERIPHERAL 47>;
812812 atmel,fifo-size = <32>;
813− dmas = <&dma0 AT91_XDMAC_DT_PERID(23)>,
814− <&dma0 AT91_XDMAC_DT_PERID(24)>;
815− dma-names = "rx", "tx";
813+ dmas = <&dma0 AT91_XDMAC_DT_PERID(24)>,
814+ <&dma0 AT91_XDMAC_DT_PERID(23)>;
815+ dma-names = "tx", "rx";
816816 status = "disabled";
817817 };
818818 };
arch/arm/boot/dts/usb_a9263.dts+1−1
@@ -60,7 +60,7 @@ · 59 unmodified lines
6060 spi0: spi@fffa4000 {
6161 cs-gpios = <&pioB 15 GPIO_ACTIVE_HIGH>;
6262 status = "okay";
63− mtd_dataflash@0 {
63+ flash@0 {
6464 compatible = "atmel,at45", "atmel,dataflash";
6565 reg = <0>;
6666 spi-max-frequency = <15000000>;
arch/arm/configs/multi_v7_defconfig+1−0
@@ -673,6 +673,7 @@ CONFIG_VIDEO_STI_DELTA=m · 672 unmodified lines
673673 CONFIG_VIDEO_RENESAS_FDP1=m
674674 CONFIG_VIDEO_RENESAS_JPU=m
675675 CONFIG_VIDEO_RENESAS_VSP1=m
676+CONFIG_VIDEO_TEGRA_VDE=m
676677 CONFIG_V4L_TEST_DRIVERS=y
677678 CONFIG_VIDEO_VIVID=m
678679 CONFIG_VIDEO_ADV7180=m
arch/arm/configs/tegra_defconfig+2−1
@@ -286,7 +286,8 @@ CONFIG_SERIO_NVEC_PS2=y · 285 unmodified lines
286286 CONFIG_NVEC_POWER=y
287287 CONFIG_NVEC_PAZ00=y
288288 CONFIG_STAGING_MEDIA=y
289−CONFIG_TEGRA_VDE=y
289+CONFIG_V4L_MEM2MEM_DRIVERS=y
290+CONFIG_VIDEO_TEGRA_VDE=y
290291 CONFIG_CHROME_PLATFORMS=y
291292 CONFIG_CROS_EC=y
292293 CONFIG_CROS_EC_I2C=m
arch/arm/include/asm/io.h+3−0
@@ -440,6 +440,9 @@ extern void pci_iounmap(struct pci_dev *dev, void __iomem *addr); · 439 unmodified lines
440440 #define ARCH_HAS_VALID_PHYS_ADDR_RANGE
441441 extern int valid_phys_addr_range(phys_addr_t addr, size_t size);
442442 extern int valid_mmap_phys_addr_range(unsigned long pfn, size_t size);
443+extern bool arch_memremap_can_ram_remap(resource_size_t offset, size_t size,
444+ unsigned long flags);
445+#define arch_memremap_can_ram_remap arch_memremap_can_ram_remap
443446 #endif
444447
445448 /*
arch/arm/mach-exynos/Kconfig+0−1
@@ -17,7 +17,6 @@ menuconfig ARCH_EXYNOS · 16 unmodified lines
1717 select EXYNOS_PMU
1818 select EXYNOS_SROM
1919 select EXYNOS_PM_DOMAINS if PM_GENERIC_DOMAINS
20− select GPIOLIB
2120 select HAVE_ARM_ARCH_TIMER if ARCH_EXYNOS5
2221 select HAVE_ARM_SCU if SMP
2322 select PINCTRL
arch/arm/mach-omap2/omap4-common.c+2−0
@@ -314,10 +314,12 @@ void __init omap_gic_of_init(void) · 313 unmodified lines
314314
315315 np = of_find_compatible_node(NULL, NULL, "arm,cortex-a9-gic");
316316 gic_dist_base_addr = of_iomap(np, 0);
317+ of_node_put(np);
317318 WARN_ON(!gic_dist_base_addr);
318319
319320 np = of_find_compatible_node(NULL, NULL, "arm,cortex-a9-twd-timer");
320321 twd_base = of_iomap(np, 0);
322+ of_node_put(np);
321323 WARN_ON(!twd_base);
322324
323325 skip_errata_init:
arch/arm/mm/ioremap.c+8−0
@@ -493,3 +493,11 @@ void __init early_ioremap_init(void) · 492 unmodified lines
493493 {
494494 early_ioremap_setup();
495495 }
496+
497+bool arch_memremap_can_ram_remap(resource_size_t offset, size_t size,
498+ unsigned long flags)
499+{
500+ unsigned long pfn = PHYS_PFN(offset);
501+
502+ return memblock_is_map_memory(pfn);
503+}
arch/arm64/boot/dts/amlogic/meson-g12b-a311d.dtsi+0−40
@@ -11,26 +11,6 @@ · 10 unmodified lines
1111 compatible = "operating-points-v2";
1212 opp-shared;
1313
14− opp-100000000 {
15− opp-hz = /bits/ 64 <100000000>;
16− opp-microvolt = <731000>;
17− };
18−
19− opp-250000000 {
20− opp-hz = /bits/ 64 <250000000>;
21− opp-microvolt = <731000>;
22− };
23−
24− opp-500000000 {
25− opp-hz = /bits/ 64 <500000000>;
26− opp-microvolt = <731000>;
27− };
28−
29− opp-667000000 {
30− opp-hz = /bits/ 64 <667000000>;
31− opp-microvolt = <731000>;
32− };
33−
3414 opp-1000000000 {
3515 opp-hz = /bits/ 64 <1000000000>;
3616 opp-microvolt = <761000>;
@@ -71,26 +51,6 @@ · 34 unmodified lines
7151 compatible = "operating-points-v2";
7252 opp-shared;
7353
74− opp-100000000 {
75− opp-hz = /bits/ 64 <100000000>;
76− opp-microvolt = <731000>;
77− };
78−
79− opp-250000000 {
80− opp-hz = /bits/ 64 <250000000>;
81− opp-microvolt = <731000>;
82− };
83−
84− opp-500000000 {
85− opp-hz = /bits/ 64 <500000000>;
86− opp-microvolt = <731000>;
87− };
88−
89− opp-667000000 {
90− opp-hz = /bits/ 64 <667000000>;
91− opp-microvolt = <731000>;
92− };
93−
9454 opp-1000000000 {
9555 opp-hz = /bits/ 64 <1000000000>;
9656 opp-microvolt = <731000>;
arch/arm64/boot/dts/amlogic/meson-g12b-s922x.dtsi+0−40
@@ -11,26 +11,6 @@ · 10 unmodified lines
1111 compatible = "operating-points-v2";
1212 opp-shared;
1313
14− opp-100000000 {
15− opp-hz = /bits/ 64 <100000000>;
16− opp-microvolt = <731000>;
17− };
18−
19− opp-250000000 {
20− opp-hz = /bits/ 64 <250000000>;
21− opp-microvolt = <731000>;
22− };
23−
24− opp-500000000 {
25− opp-hz = /bits/ 64 <500000000>;
26− opp-microvolt = <731000>;
27− };
28−
29− opp-667000000 {
30− opp-hz = /bits/ 64 <667000000>;
31− opp-microvolt = <731000>;
32− };
33−
3414 opp-1000000000 {
3515 opp-hz = /bits/ 64 <1000000000>;
3616 opp-microvolt = <731000>;
@@ -76,26 +56,6 @@ · 39 unmodified lines
7656 compatible = "operating-points-v2";
7757 opp-shared;
7858
79− opp-100000000 {
80− opp-hz = /bits/ 64 <100000000>;
81− opp-microvolt = <751000>;
82− };
83−
84− opp-250000000 {
85− opp-hz = /bits/ 64 <250000000>;
86− opp-microvolt = <751000>;
87− };
88−
89− opp-500000000 {
90− opp-hz = /bits/ 64 <500000000>;
91− opp-microvolt = <751000>;
92− };
93−
94− opp-667000000 {
95− opp-hz = /bits/ 64 <667000000>;
96− opp-microvolt = <751000>;
97− };
98−
9959 opp-1000000000 {
10060 opp-hz = /bits/ 64 <1000000000>;
10161 opp-microvolt = <771000>;
arch/arm64/boot/dts/amlogic/meson-s4.dtsi+4−4
@@ -13,28 +13,28 @@ · 12 unmodified lines
1313
1414 cpu0: cpu@0 {
1515 device_type = "cpu";
16− compatible = "arm,cortex-a35","arm,armv8";
16+ compatible = "arm,cortex-a35";
1717 reg = <0x0 0x0>;
1818 enable-method = "psci";
1919 };
2020
2121 cpu1: cpu@1 {
2222 device_type = "cpu";
23− compatible = "arm,cortex-a35","arm,armv8";
23+ compatible = "arm,cortex-a35";
2424 reg = <0x0 0x1>;
2525 enable-method = "psci";
2626 };
2727
2828 cpu2: cpu@2 {
2929 device_type = "cpu";
30− compatible = "arm,cortex-a35","arm,armv8";
30+ compatible = "arm,cortex-a35";
3131 reg = <0x0 0x2>;
3232 enable-method = "psci";
3333 };
3434
3535 cpu3: cpu@3 {
3636 device_type = "cpu";
37− compatible = "arm,cortex-a35","arm,armv8";
37+ compatible = "arm,cortex-a35";
3838 reg = <0x0 0x3>;
3939 enable-method = "psci";
4040 };
arch/arm64/boot/dts/amlogic/meson-sm1-bananapi-m5.dts+1−0
@@ -437,6 +437,7 @@ · 436 unmodified lines
437437 "",
438438 "eMMC_RST#", /* BOOT_12 */
439439 "eMMC_DS", /* BOOT_13 */
440+ "", "",
440441 /* GPIOC */
441442 "SD_D0_B", /* GPIOC_0 */
442443 "SD_D1_B", /* GPIOC_1 */
arch/arm64/boot/dts/amlogic/meson-sm1.dtsi+0−20
@@ -95,26 +95,6 @@ · 94 unmodified lines
9595 compatible = "operating-points-v2";
9696 opp-shared;
9797
98− opp-100000000 {
99− opp-hz = /bits/ 64 <100000000>;
100− opp-microvolt = <730000>;
101− };
102−
103− opp-250000000 {
104− opp-hz = /bits/ 64 <250000000>;
105− opp-microvolt = <730000>;
106− };
107−
108− opp-500000000 {
109− opp-hz = /bits/ 64 <500000000>;
110− opp-microvolt = <730000>;
111− };
112−
113− opp-667000000 {
114− opp-hz = /bits/ 64 <666666666>;
115− opp-microvolt = <750000>;
116− };
117−
11898 opp-1000000000 {
11999 opp-hz = /bits/ 64 <1000000000>;
120100 opp-microvolt = <770000>;
arch/arm64/boot/dts/freescale/imx8mm-venice-gw71xx.dtsi+3−1
@@ -146,12 +146,14 @@ · 145 unmodified lines
146146
147147 &usbotg1 {
148148 dr_mode = "otg";
149+ over-current-active-low;
149150 vbus-supply = <&reg_usb_otg1_vbus>;
150151 status = "okay";
151152 };
152153
153154 &usbotg2 {
154155 dr_mode = "host";
156+ disable-over-current;
155157 status = "okay";
156158 };
157159
@@ -215,7 +217,7 @@ · 57 unmodified lines
215217 fsl,pins = <
216218 MX8MM_IOMUXC_ECSPI2_SCLK_ECSPI2_SCLK 0xd6
217219 MX8MM_IOMUXC_ECSPI2_MOSI_ECSPI2_MOSI 0xd6
218− MX8MM_IOMUXC_ECSPI2_SCLK_ECSPI2_SCLK 0xd6
220+ MX8MM_IOMUXC_ECSPI2_MISO_ECSPI2_MISO 0xd6
219221 MX8MM_IOMUXC_ECSPI2_SS0_GPIO5_IO13 0xd6
220222 >;
221223 };
arch/arm64/boot/dts/freescale/imx8mm-venice-gw72xx.dtsi+3−1
@@ -211,12 +211,14 @@ · 210 unmodified lines
211211
212212 &usbotg1 {
213213 dr_mode = "otg";
214+ over-current-active-low;
214215 vbus-supply = <&reg_usb_otg1_vbus>;
215216 status = "okay";
216217 };
217218
218219 &usbotg2 {
219220 dr_mode = "host";
221+ disable-over-current;
220222 vbus-supply = <&reg_usb_otg2_vbus>;
221223 status = "okay";
222224 };
@@ -309,7 +311,7 @@ · 86 unmodified lines
309311 fsl,pins = <
310312 MX8MM_IOMUXC_ECSPI2_SCLK_ECSPI2_SCLK 0xd6
311313 MX8MM_IOMUXC_ECSPI2_MOSI_ECSPI2_MOSI 0xd6
312− MX8MM_IOMUXC_ECSPI2_SCLK_ECSPI2_SCLK 0xd6
314+ MX8MM_IOMUXC_ECSPI2_MISO_ECSPI2_MISO 0xd6
313315 MX8MM_IOMUXC_ECSPI2_SS0_GPIO5_IO13 0xd6
314316 >;
315317 };
arch/arm64/boot/dts/freescale/imx8mm-venice-gw73xx.dtsi+3−1
@@ -238,12 +238,14 @@ · 237 unmodified lines
238238
239239 &usbotg1 {
240240 dr_mode = "otg";
241+ over-current-active-low;
241242 vbus-supply = <&reg_usb_otg1_vbus>;
242243 status = "okay";
243244 };
244245
245246 &usbotg2 {
246247 dr_mode = "host";
248+ disable-over-current;
247249 vbus-supply = <&reg_usb_otg2_vbus>;
248250 status = "okay";
249251 };
@@ -358,7 +360,7 @@ · 108 unmodified lines
358360 fsl,pins = <
359361 MX8MM_IOMUXC_ECSPI2_SCLK_ECSPI2_SCLK 0xd6
360362 MX8MM_IOMUXC_ECSPI2_MOSI_ECSPI2_MOSI 0xd6
361− MX8MM_IOMUXC_ECSPI2_SCLK_ECSPI2_SCLK 0xd6
363+ MX8MM_IOMUXC_ECSPI2_MISO_ECSPI2_MISO 0xd6
362364 MX8MM_IOMUXC_ECSPI2_SS0_GPIO5_IO13 0xd6
363365 >;
364366 };
arch/arm64/boot/dts/freescale/imx8mn-ddr4-evk.dts+4−0
@@ -59,6 +59,10 @@ · 58 unmodified lines
5959 interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
6060 rohm,reset-snvs-powered;
6161
62+ #clock-cells = <0>;
63+ clocks = <&osc_32k 0>;
64+ clock-output-names = "clk-32k-out";
65+
6266 regulators {
6367 buck1_reg: BUCK1 {
6468 regulator-name = "buck1";
arch/arm64/boot/dts/freescale/imx8mn.dtsi+5−5
@@ -293,7 +293,7 @@ · 292 unmodified lines
293293 ranges;
294294
295295 sai2: sai@30020000 {
296− compatible = "fsl,imx8mm-sai", "fsl,imx8mq-sai";
296+ compatible = "fsl,imx8mn-sai", "fsl,imx8mq-sai";
297297 reg = <0x30020000 0x10000>;
298298 interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
299299 clocks = <&clk IMX8MN_CLK_SAI2_IPG>,
@@ -307,7 +307,7 @@ · 7 unmodified lines
307307 };
308308
309309 sai3: sai@30030000 {
310− compatible = "fsl,imx8mm-sai", "fsl,imx8mq-sai";
310+ compatible = "fsl,imx8mn-sai", "fsl,imx8mq-sai";
311311 reg = <0x30030000 0x10000>;
312312 interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
313313 clocks = <&clk IMX8MN_CLK_SAI3_IPG>,
@@ -321,7 +321,7 @@ · 7 unmodified lines
321321 };
322322
323323 sai5: sai@30050000 {
324− compatible = "fsl,imx8mm-sai", "fsl,imx8mq-sai";
324+ compatible = "fsl,imx8mn-sai", "fsl,imx8mq-sai";
325325 reg = <0x30050000 0x10000>;
326326 interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>;
327327 clocks = <&clk IMX8MN_CLK_SAI5_IPG>,
@@ -337,7 +337,7 @@ · 9 unmodified lines
337337 };
338338
339339 sai6: sai@30060000 {
340− compatible = "fsl,imx8mm-sai", "fsl,imx8mq-sai";
340+ compatible = "fsl,imx8mn-sai", "fsl,imx8mq-sai";
341341 reg = <0x30060000 0x10000>;
342342 interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>;
343343 clocks = <&clk IMX8MN_CLK_SAI6_IPG>,
@@ -394,7 +394,7 @@ · 50 unmodified lines
394394 };
395395
396396 sai7: sai@300b0000 {
397− compatible = "fsl,imx8mm-sai", "fsl,imx8mq-sai";
397+ compatible = "fsl,imx8mn-sai", "fsl,imx8mq-sai";
398398 reg = <0x300b0000 0x10000>;
399399 interrupts = <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>;
400400 clocks = <&clk IMX8MN_CLK_SAI7_IPG>,
arch/arm64/boot/dts/freescale/imx8mq-tqma8mq.dtsi+1−1
@@ -253,7 +253,7 @@ · 252 unmodified lines
253253 #address-cells = <1>;
254254 #size-cells = <1>;
255255 spi-max-frequency = <84000000>;
256− spi-tx-bus-width = <4>;
256+ spi-tx-bus-width = <1>;
257257 spi-rx-bus-width = <4>;
258258 };
259259 };
arch/arm64/boot/dts/freescale/imx8qm.dtsi+1−1
@@ -196,7 +196,7 @@ · 195 unmodified lines
196196 };
197197
198198 clk: clock-controller {
199− compatible = "fsl,imx8qxp-clk", "fsl,scu-clk";
199+ compatible = "fsl,imx8qm-clk", "fsl,scu-clk";
200200 #clock-cells = <2>;
201201 };
202202
arch/arm64/boot/dts/nvidia/tegra186-p3310.dtsi+4−4
@@ -262,25 +262,25 @@ · 261 unmodified lines
262262 gpio4 {
263263 pins = "gpio4";
264264 function = "32k-out1";
265− drive-push-pull;
265+ drive-push-pull = <1>;
266266 };
267267
268268 gpio5 {
269269 pins = "gpio5";
270270 function = "gpio";
271− drive-push-pull;
271+ drive-push-pull = <0>;
272272 };
273273
274274 gpio6 {
275275 pins = "gpio6";
276276 function = "gpio";
277− drive-push-pull;
277+ drive-push-pull = <1>;
278278 };
279279
280280 gpio7 {
281281 pins = "gpio7";
282282 function = "gpio";
283− drive-push-pull;
283+ drive-push-pull = <0>;
284284 };
285285 };
286286
arch/arm64/boot/dts/nvidia/tegra186-p3509-0000+p3636-0001.dts+4−4
@@ -462,25 +462,25 @@ · 461 unmodified lines
462462 gpio4 {
463463 pins = "gpio4";
464464 function = "32k-out1";
465− drive-push-pull;
465+ drive-push-pull = <1>;
466466 };
467467
468468 gpio5 {
469469 pins = "gpio5";
470470 function = "gpio";
471− drive-push-pull;
471+ drive-push-pull = <0>;
472472 };
473473
474474 gpio6 {
475475 pins = "gpio6";
476476 function = "gpio";
477− drive-push-pull;
477+ drive-push-pull = <1>;
478478 };
479479
480480 gpio7 {
481481 pins = "gpio7";
482482 function = "gpio";
483− drive-push-pull;
483+ drive-push-pull = <1>;
484484 };
485485 };
486486
arch/arm64/boot/dts/nvidia/tegra194-p2888.dtsi+3−3
@@ -174,19 +174,19 @@ · 173 unmodified lines
174174 gpio4 {
175175 pins = "gpio4";
176176 function = "32k-out1";
177− drive-push-pull;
177+ drive-push-pull = <1>;
178178 };
179179
180180 gpio6 {
181181 pins = "gpio6";
182182 function = "gpio";
183− drive-push-pull;
183+ drive-push-pull = <1>;
184184 };
185185
186186 gpio7 {
187187 pins = "gpio7";
188188 function = "gpio";
189− drive-push-pull;
189+ drive-push-pull = <0>;
190190 };
191191 };
192192
arch/arm64/boot/dts/nvidia/tegra194-p3668.dtsi+3−3
@@ -148,19 +148,19 @@ · 147 unmodified lines
148148 gpio4 {
149149 pins = "gpio4";
150150 function = "32k-out1";
151− drive-push-pull;
151+ drive-push-pull = <1>;
152152 };
153153
154154 gpio6 {
155155 pins = "gpio6";
156156 function = "gpio";
157− drive-push-pull;
157+ drive-push-pull = <1>;
158158 };
159159
160160 gpio7 {
161161 pins = "gpio7";
162162 function = "gpio";
163− drive-push-pull;
163+ drive-push-pull = <0>;
164164 };
165165 };
166166
arch/arm64/boot/dts/nvidia/tegra210-p2180.dtsi+3−3
@@ -59,7 +59,7 @@ · 58 unmodified lines
5959 gpio1 {
6060 pins = "gpio1";
6161 function = "fps-out";
62− drive-push-pull;
62+ drive-push-pull = <1>;
6363 maxim,active-fps-source = <MAX77620_FPS_SRC_0>;
6464 maxim,active-fps-power-up-slot = <7>;
6565 maxim,active-fps-power-down-slot = <0>;
@@ -68,7 +68,7 @@ · 2 unmodified lines
6868 gpio2_3 {
6969 pins = "gpio2", "gpio3";
7070 function = "fps-out";
71− drive-open-drain;
71+ drive-open-drain = <1>;
7272 maxim,active-fps-source = <MAX77620_FPS_SRC_0>;
7373 };
7474
@@ -80,7 +80,7 @@ · 5 unmodified lines
8080 gpio5_6_7 {
8181 pins = "gpio5", "gpio6", "gpio7";
8282 function = "gpio";
83− drive-push-pull;
83+ drive-push-pull = <1>;
8484 };
8585 };
8686
arch/arm64/boot/dts/nvidia/tegra210-p2894.dtsi+4−4
@@ -1351,7 +1351,7 @@ · 1350 unmodified lines
13511351 gpio1 {
13521352 pins = "gpio1";
13531353 function = "fps-out";
1354− drive-push-pull;
1354+ drive-push-pull = <1>;
13551355 maxim,active-fps-source = <MAX77620_FPS_SRC_0>;
13561356 maxim,active-fps-power-up-slot = <7>;
13571357 maxim,active-fps-power-down-slot = <0>;
@@ -1360,14 +1360,14 @@ · 2 unmodified lines
13601360 gpio2 {
13611361 pins = "gpio2";
13621362 function = "fps-out";
1363− drive-open-drain;
1363+ drive-open-drain = <1>;
13641364 maxim,active-fps-source = <MAX77620_FPS_SRC_0>;
13651365 };
13661366
13671367 gpio3 {
13681368 pins = "gpio3";
13691369 function = "fps-out";
1370− drive-open-drain;
1370+ drive-open-drain = <1>;
13711371 maxim,active-fps-source = <MAX77620_FPS_SRC_0>;
13721372 };
13731373
@@ -1379,7 +1379,7 @@ · 5 unmodified lines
13791379 gpio5_6_7 {
13801380 pins = "gpio5", "gpio6", "gpio7";
13811381 function = "gpio";
1382− drive-push-pull;
1382+ drive-push-pull = <1>;
13831383 };
13841384 };
13851385
arch/arm64/boot/dts/nvidia/tegra210-p3450-0000.dts+4−4
@@ -195,7 +195,7 @@ · 194 unmodified lines
195195 gpio1 {
196196 pins = "gpio1";
197197 function = "fps-out";
198− drive-push-pull;
198+ drive-push-pull = <1>;
199199 maxim,active-fps-source = <MAX77620_FPS_SRC_NONE>;
200200 maxim,active-fps-power-up-slot = <0>;
201201 maxim,active-fps-power-down-slot = <7>;
@@ -204,7 +204,7 @@ · 2 unmodified lines
204204 gpio2 {
205205 pins = "gpio2";
206206 function = "fps-out";
207− drive-open-drain;
207+ drive-open-drain = <1>;
208208 maxim,active-fps-source = <MAX77620_FPS_SRC_0>;
209209 maxim,active-fps-power-up-slot = <0>;
210210 maxim,active-fps-power-down-slot = <7>;
@@ -213,7 +213,7 @@ · 2 unmodified lines
213213 gpio3 {
214214 pins = "gpio3";
215215 function = "fps-out";
216− drive-open-drain;
216+ drive-open-drain = <1>;
217217 maxim,active-fps-source = <MAX77620_FPS_SRC_0>;
218218 maxim,active-fps-power-up-slot = <4>;
219219 maxim,active-fps-power-down-slot = <3>;
@@ -227,7 +227,7 @@ · 7 unmodified lines
227227 gpio5_6_7 {
228228 pins = "gpio5", "gpio6", "gpio7";
229229 function = "gpio";
230− drive-push-pull;
230+ drive-push-pull = <1>;
231231 };
232232 };
233233
arch/arm64/boot/dts/nvidia/tegra210-smaug.dts+2−2
@@ -1386,7 +1386,7 @@ · 1385 unmodified lines
13861386 gpio3 {
13871387 pins = "gpio3";
13881388 function = "fps-out";
1389− drive-open-drain;
1389+ drive-open-drain = <1>;
13901390 maxim,active-fps-source = <MAX77620_FPS_SRC_0>;
13911391 maxim,active-fps-power-up-slot = <4>;
13921392 maxim,active-fps-power-down-slot = <2>;
@@ -1395,7 +1395,7 @@ · 2 unmodified lines
13951395 gpio5_6 {
13961396 pins = "gpio5", "gpio6";
13971397 function = "gpio";
1398− drive-push-pull;
1398+ drive-push-pull = <1>;
13991399 };
14001400
14011401 gpio4 {
arch/arm64/include/asm/io.h+4−0
@@ -192,4 +192,8 @@ extern void __iomem *ioremap_cache(phys_addr_t phys_addr, size_t size); · 191 unmodified lines
192192 extern int valid_phys_addr_range(phys_addr_t addr, size_t size);
193193 extern int valid_mmap_phys_addr_range(unsigned long pfn, size_t size);
194194
195+extern bool arch_memremap_can_ram_remap(resource_size_t offset, size_t size,
196+ unsigned long flags);
197+#define arch_memremap_can_ram_remap arch_memremap_can_ram_remap
198+
195199 #endif /* __ASM_IO_H */
arch/arm64/include/asm/kvm_emulate.h+1−0
@@ -40,6 +40,7 @@ void kvm_inject_undefined(struct kvm_vcpu *vcpu); · 39 unmodified lines
4040 void kvm_inject_vabt(struct kvm_vcpu *vcpu);
4141 void kvm_inject_dabt(struct kvm_vcpu *vcpu, unsigned long addr);
4242 void kvm_inject_pabt(struct kvm_vcpu *vcpu, unsigned long addr);
43+void kvm_inject_size_fault(struct kvm_vcpu *vcpu);
4344
4445 void kvm_vcpu_wfi(struct kvm_vcpu *vcpu);
4546
arch/arm64/kernel/Makefile+4−0
@@ -75,6 +75,10 @@ obj-$(CONFIG_ARM64_MTE) += mte.o · 74 unmodified lines
7575 obj-y += vdso-wrap.o
7676 obj-$(CONFIG_COMPAT_VDSO) += vdso32-wrap.o
7777
78+# Force dependency (vdso*-wrap.S includes vdso.so through incbin)
79+$(obj)/vdso-wrap.o: $(obj)/vdso/vdso.so
80+$(obj)/vdso32-wrap.o: $(obj)/vdso32/vdso.so
81+
7882 obj-y += probes/
7983 head-y := head.o
8084 extra-y += $(head-y) vmlinux.lds
arch/arm64/kernel/cpu_errata.c+2−0
@@ -208,6 +208,8 @@ static const struct arm64_cpu_capabilities arm64_repeat_tlbi_list[] = { · 207 unmodified lines
208208 #ifdef CONFIG_ARM64_ERRATUM_1286807
209209 {
210210 ERRATA_MIDR_RANGE(MIDR_CORTEX_A76, 0, 0, 3, 0),
211+ /* Kryo4xx Gold (rcpe to rfpe) => (r0p0 to r3p0) */
212+ ERRATA_MIDR_RANGE(MIDR_QCOM_KRYO_4XX_GOLD, 0xc, 0xe, 0xf, 0xe),
211213 },
212214 #endif
213215 {},
arch/arm64/kernel/cpufeature.c+1−2
@@ -654,7 +654,6 @@ static const struct __ftr_reg_entry { · 653 unmodified lines
654654 ARM64_FTR_REG(SYS_ID_AA64ISAR0_EL1, ftr_id_aa64isar0),
655655 ARM64_FTR_REG_OVERRIDE(SYS_ID_AA64ISAR1_EL1, ftr_id_aa64isar1,
656656 &id_aa64isar1_override),
657− ARM64_FTR_REG(SYS_ID_AA64ISAR2_EL1, ftr_id_aa64isar2),
658657 ARM64_FTR_REG_OVERRIDE(SYS_ID_AA64ISAR2_EL1, ftr_id_aa64isar2,
659658 &id_aa64isar2_override),
660659
@@ -810,7 +809,7 @@ static void __init sort_ftr_regs(void) · 149 unmodified lines
810809 * to sys_id for subsequent binary search in get_arm64_ftr_reg()
811810 * to work correctly.
812811 */
813− BUG_ON(arm64_ftr_regs[i].sys_id < arm64_ftr_regs[i - 1].sys_id);
812+ BUG_ON(arm64_ftr_regs[i].sys_id <= arm64_ftr_regs[i - 1].sys_id);
814813 }
815814 }
816815
arch/arm64/kernel/elfcore.c+1−1
@@ -95,7 +95,7 @@ int elf_core_write_extra_phdrs(struct coredump_params *cprm, loff_t offset) · 94 unmodified lines
9595 for_each_mte_vma(current, vma) {
9696 struct elf_phdr phdr;
9797
98− phdr.p_type = PT_ARM_MEMTAG_MTE;
98+ phdr.p_type = PT_AARCH64_MEMTAG_MTE;
9999 phdr.p_offset = offset;
100100 phdr.p_vaddr = vma->vm_start;
101101 phdr.p_paddr = 0;
arch/arm64/kernel/vdso/Makefile+0−3
@@ -52,9 +52,6 @@ GCOV_PROFILE := n · 51 unmodified lines
5252 targets += vdso.lds
5353 CPPFLAGS_vdso.lds += -P -C -U$(ARCH)
5454
55−# Force dependency (incbin is bad)
56−$(obj)/vdso.o : $(obj)/vdso.so
57−
5855 # Link rule for the .so file, .lds has to be first
5956 $(obj)/vdso.so.dbg: $(obj)/vdso.lds $(obj-vdso) FORCE
6057 $(call if_changed,vdsold_and_vdso_check)
arch/arm64/kernel/vdso32/Makefile+0−3
@@ -131,9 +131,6 @@ obj-vdso := $(c-obj-vdso) $(c-obj-vdso-gettimeofday) $(asm-obj-vdso) · 130 unmodified lines
131131 targets += vdso.lds
132132 CPPFLAGS_vdso.lds += -P -C -U$(ARCH)
133133
134−# Force dependency (vdso.s includes vdso.so through incbin)
135−$(obj)/vdso.o: $(obj)/vdso.so
136−
137134 include/generated/vdso32-offsets.h: $(obj)/vdso.so.dbg FORCE
138135 $(call if_changed,vdsosym)
139136
arch/arm64/kvm/hyp/nvhe/host.S+9−9
@@ -198,15 +198,15 @@ SYM_CODE_START(__kvm_hyp_host_vector) · 197 unmodified lines
198198 invalid_host_el2_vect // FIQ EL2h
199199 invalid_host_el2_vect // Error EL2h
200200
201− host_el1_sync_vect // Synchronous 64-bit EL1
202− invalid_host_el1_vect // IRQ 64-bit EL1
203− invalid_host_el1_vect // FIQ 64-bit EL1
204− invalid_host_el1_vect // Error 64-bit EL1
205−
206− invalid_host_el1_vect // Synchronous 32-bit EL1
207− invalid_host_el1_vect // IRQ 32-bit EL1
208− invalid_host_el1_vect // FIQ 32-bit EL1
209− invalid_host_el1_vect // Error 32-bit EL1
201+ host_el1_sync_vect // Synchronous 64-bit EL1/EL0
202+ invalid_host_el1_vect // IRQ 64-bit EL1/EL0
203+ invalid_host_el1_vect // FIQ 64-bit EL1/EL0
204+ invalid_host_el1_vect // Error 64-bit EL1/EL0
205+
206+ host_el1_sync_vect // Synchronous 32-bit EL1/EL0
207+ invalid_host_el1_vect // IRQ 32-bit EL1/EL0
208+ invalid_host_el1_vect // FIQ 32-bit EL1/EL0
209+ invalid_host_el1_vect // Error 32-bit EL1/EL0
210210 SYM_CODE_END(__kvm_hyp_host_vector)
211211
212212 /*
arch/arm64/kvm/inject_fault.c+28−0
@@ -145,6 +145,34 @@ void kvm_inject_pabt(struct kvm_vcpu *vcpu, unsigned long addr) · 144 unmodified lines
145145 inject_abt64(vcpu, true, addr);
146146 }
147147
148+void kvm_inject_size_fault(struct kvm_vcpu *vcpu)
149+{
150+ unsigned long addr, esr;
151+
152+ addr = kvm_vcpu_get_fault_ipa(vcpu);
153+ addr |= kvm_vcpu_get_hfar(vcpu) & GENMASK(11, 0);
154+
155+ if (kvm_vcpu_trap_is_iabt(vcpu))
156+ kvm_inject_pabt(vcpu, addr);
157+ else
158+ kvm_inject_dabt(vcpu, addr);
159+
160+ /*
161+ * If AArch64 or LPAE, set FSC to 0 to indicate an Address
162+ * Size Fault at level 0, as if exceeding PARange.
163+ *
164+ * Non-LPAE guests will only get the external abort, as there
165+ * is no way to to describe the ASF.
166+ */
167+ if (vcpu_el1_is_32bit(vcpu) &&
168+ !(vcpu_read_sys_reg(vcpu, TCR_EL1) & TTBCR_EAE))
169+ return;
170+
171+ esr = vcpu_read_sys_reg(vcpu, ESR_EL1);
172+ esr &= ~GENMASK_ULL(5, 0);
173+ vcpu_write_sys_reg(vcpu, esr, ESR_EL1);
174+}
175+
148176 /**
149177 * kvm_inject_undefined - inject an undefined instruction into the guest
150178 * @vcpu: The vCPU in which to inject the exception
arch/arm64/kvm/mmu.c+19−0
@@ -1337,6 +1337,25 @@ int kvm_handle_guest_abort(struct kvm_vcpu *vcpu) · 1336 unmodified lines
13371337 fault_ipa = kvm_vcpu_get_fault_ipa(vcpu);
13381338 is_iabt = kvm_vcpu_trap_is_iabt(vcpu);
13391339
1340+ if (fault_status == FSC_FAULT) {
1341+ /* Beyond sanitised PARange (which is the IPA limit) */
1342+ if (fault_ipa >= BIT_ULL(get_kvm_ipa_limit())) {
1343+ kvm_inject_size_fault(vcpu);
1344+ return 1;
1345+ }
1346+
1347+ /* Falls between the IPA range and the PARange? */
1348+ if (fault_ipa >= BIT_ULL(vcpu->arch.hw_mmu->pgt->ia_bits)) {
1349+ fault_ipa |= kvm_vcpu_get_hfar(vcpu) & GENMASK(11, 0);
1350+
1351+ if (is_iabt)
1352+ kvm_inject_pabt(vcpu, fault_ipa);
1353+ else
1354+ kvm_inject_dabt(vcpu, fault_ipa);
1355+ return 1;
1356+ }
1357+ }
1358+
13401359 /* Synchronous External Abort? */
13411360 if (kvm_vcpu_abt_issea(vcpu)) {
13421361 /*
arch/arm64/kvm/pmu-emul.c+22−1
@@ -177,6 +177,9 @@ u64 kvm_pmu_get_counter_value(struct kvm_vcpu *vcpu, u64 select_idx) · 176 unmodified lines
177177 struct kvm_pmu *pmu = &vcpu->arch.pmu;
178178 struct kvm_pmc *pmc = &pmu->pmc[select_idx];
179179
180+ if (!kvm_vcpu_has_pmu(vcpu))
181+ return 0;
182+
180183 counter = kvm_pmu_get_pair_counter_value(vcpu, pmc);
181184
182185 if (kvm_pmu_pmc_is_chained(pmc) &&
@@ -198,6 +201,9 @@ void kvm_pmu_set_counter_value(struct kvm_vcpu *vcpu, u64 select_idx, u64 val) · 15 unmodified lines
198201 {
199202 u64 reg;
200203
204+ if (!kvm_vcpu_has_pmu(vcpu))
205+ return;
206+
201207 reg = (select_idx == ARMV8_PMU_CYCLE_IDX)
202208 ? PMCCNTR_EL0 : PMEVCNTR0_EL0 + select_idx;
203209 __vcpu_sys_reg(vcpu, reg) += (s64)val - kvm_pmu_get_counter_value(vcpu, select_idx);
@@ -322,6 +328,9 @@ void kvm_pmu_enable_counter_mask(struct kvm_vcpu *vcpu, u64 val) · 118 unmodified lines
322328 struct kvm_pmu *pmu = &vcpu->arch.pmu;
323329 struct kvm_pmc *pmc;
324330
331+ if (!kvm_vcpu_has_pmu(vcpu))
332+ return;
333+
325334 if (!(__vcpu_sys_reg(vcpu, PMCR_EL0) & ARMV8_PMU_PMCR_E) || !val)
326335 return;
327336
@@ -357,7 +366,7 @@ void kvm_pmu_disable_counter_mask(struct kvm_vcpu *vcpu, u64 val) · 29 unmodified lines
357366 struct kvm_pmu *pmu = &vcpu->arch.pmu;
358367 struct kvm_pmc *pmc;
359368
360− if (!val)
369+ if (!kvm_vcpu_has_pmu(vcpu) || !val)
361370 return;
362371
363372 for (i = 0; i < ARMV8_PMU_MAX_COUNTERS; i++) {
@@ -527,6 +536,9 @@ void kvm_pmu_software_increment(struct kvm_vcpu *vcpu, u64 val) · 163 unmodified lines
527536 struct kvm_pmu *pmu = &vcpu->arch.pmu;
528537 int i;
529538
539+ if (!kvm_vcpu_has_pmu(vcpu))
540+ return;
541+
530542 if (!(__vcpu_sys_reg(vcpu, PMCR_EL0) & ARMV8_PMU_PMCR_E))
531543 return;
532544
@@ -576,6 +588,9 @@ void kvm_pmu_handle_pmcr(struct kvm_vcpu *vcpu, u64 val) · 43 unmodified lines
576588 {
577589 int i;
578590
591+ if (!kvm_vcpu_has_pmu(vcpu))
592+ return;
593+
579594 if (val & ARMV8_PMU_PMCR_E) {
580595 kvm_pmu_enable_counter_mask(vcpu,
581596 __vcpu_sys_reg(vcpu, PMCNTENSET_EL0));
@@ -739,6 +754,9 @@ void kvm_pmu_set_counter_event_type(struct kvm_vcpu *vcpu, u64 data, · 157 unmodified lines
739754 {
740755 u64 reg, mask;
741756
757+ if (!kvm_vcpu_has_pmu(vcpu))
758+ return;
759+
742760 mask = ARMV8_PMU_EVTYPE_MASK;
743761 mask &= ~ARMV8_PMU_EVTYPE_EVENT;
744762 mask |= kvm_pmu_event_mask(vcpu->kvm);
@@ -827,6 +845,9 @@ u64 kvm_pmu_get_pmceid(struct kvm_vcpu *vcpu, bool pmceid1) · 82 unmodified lines
827845 u64 val, mask = 0;
828846 int base, i, nr_events;
829847
848+ if (!kvm_vcpu_has_pmu(vcpu))
849+ return 0;
850+
830851 if (!pmceid1) {
831852 val = read_sysreg(pmceid0_el0);
832853 base = 0;
arch/arm64/kvm/psci.c+2−1
@@ -181,7 +181,8 @@ static void kvm_prepare_system_event(struct kvm_vcpu *vcpu, u32 type, u64 flags) · 180 unmodified lines
181181
182182 memset(&vcpu->run->system_event, 0, sizeof(vcpu->run->system_event));
183183 vcpu->run->system_event.type = type;
184− vcpu->run->system_event.flags = flags;
184+ vcpu->run->system_event.ndata = 1;
185+ vcpu->run->system_event.data[0] = flags;
185186 vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
186187 }
187188
arch/arm64/mm/ioremap.c+8−0
@@ -99,3 +99,11 @@ void __init early_ioremap_init(void) · 98 unmodified lines
9999 {
100100 early_ioremap_setup();
101101 }
102+
103+bool arch_memremap_can_ram_remap(resource_size_t offset, size_t size,
104+ unsigned long flags)
105+{
106+ unsigned long pfn = PHYS_PFN(offset);
107+
108+ return pfn_is_map_memory(pfn);
109+}
arch/mips/include/asm/timex.h+4−4
@@ -40,9 +40,9 @@ · 39 unmodified lines
4040 typedef unsigned int cycles_t;
4141
4242 /*
43− * On R4000/R4400 before version 5.0 an erratum exists such that if the
44− * cycle counter is read in the exact moment that it is matching the
45− * compare register, no interrupt will be generated.
43+ * On R4000/R4400 an erratum exists such that if the cycle counter is
44+ * read in the exact moment that it is matching the compare register,
45+ * no interrupt will be generated.
4646 *
4747 * There is a suggested workaround and also the erratum can't strike if
4848 * the compare interrupt isn't being used as the clock source device.
@@ -63,7 +63,7 @@ static inline int can_use_mips_counter(unsigned int prid) · 14 unmodified lines
6363 if (!__builtin_constant_p(cpu_has_counter))
6464 asm volatile("" : "=m" (cpu_data[0].options));
6565 if (likely(cpu_has_counter &&
66− prid >= (PRID_IMP_R4000 | PRID_REV_ENCODE_44(5, 0))))
66+ prid > (PRID_IMP_R4000 | PRID_REV_ENCODE_44(15, 15))))
6767 return 1;
6868 else
6969 return 0;
arch/mips/kernel/time.c+3−8
@@ -141,15 +141,10 @@ static __init int cpu_has_mfc0_count_bug(void) · 140 unmodified lines
141141 case CPU_R4400MC:
142142 /*
143143 * The published errata for the R4400 up to 3.0 say the CPU
144− * has the mfc0 from count bug.
144+ * has the mfc0 from count bug. This seems the last version
145+ * produced.
145146 */
146− if ((current_cpu_data.processor_id & 0xff) <= 0x30)
147− return 1;
148−
149− /*
150− * we assume newer revisions are ok
151− */
152− return 0;
147+ return 1;
153148 }
154149
155150 return 0;
arch/parisc/Kconfig+1−0
@@ -38,6 +38,7 @@ config PARISC · 37 unmodified lines
3838 select ARCH_HAVE_NMI_SAFE_CMPXCHG
3939 select GENERIC_SMP_IDLE_THREAD
4040 select GENERIC_ARCH_TOPOLOGY if SMP
41+ select GENERIC_CPU_DEVICES if !SMP
4142 select GENERIC_LIB_DEVMEM_IS_ALLOWED
4243 select SYSCTL_ARCH_UNALIGN_ALLOW
4344 select SYSCTL_EXCEPTION_TRACE
arch/parisc/configs/generic-32bit_defconfig+3−1
@@ -6,6 +6,9 @@ CONFIG_BSD_PROCESS_ACCT=y · 5 unmodified lines
66 CONFIG_IKCONFIG=y
77 CONFIG_IKCONFIG_PROC=y
88 CONFIG_LOG_BUF_SHIFT=16
9+CONFIG_CGROUPS=y
10+CONFIG_NAMESPACES=y
11+CONFIG_USER_NS=y
912 CONFIG_BLK_DEV_INITRD=y
1013 CONFIG_EXPERT=y
1114 CONFIG_PERF_EVENTS=y
@@ -47,7 +50,6 @@ CONFIG_PARPORT=y · 35 unmodified lines
4750 CONFIG_PARPORT_PC=m
4851 CONFIG_PARPORT_1284=y
4952 CONFIG_BLK_DEV_LOOP=y
50−CONFIG_BLK_DEV_CRYPTOLOOP=y
5153 CONFIG_BLK_DEV_RAM=y
5254 CONFIG_BLK_DEV_RAM_SIZE=6144
5355 CONFIG_BLK_DEV_SD=y
arch/parisc/configs/generic-64bit_defconfig+2−1
@@ -16,6 +16,7 @@ CONFIG_CGROUPS=y · 15 unmodified lines
1616 CONFIG_MEMCG=y
1717 CONFIG_CGROUP_PIDS=y
1818 CONFIG_CPUSETS=y
19+CONFIG_USER_NS=y
1920 CONFIG_RELAY=y
2021 CONFIG_BLK_DEV_INITRD=y
2122 CONFIG_CC_OPTIMIZE_FOR_SIZE=y
@@ -267,9 +268,9 @@ CONFIG_CRYPTO_DEFLATE=m · 245 unmodified lines
267268 CONFIG_CRC_CCITT=m
268269 CONFIG_LIBCRC32C=y
269270 CONFIG_PRINTK_TIME=y
271+CONFIG_DEBUG_KERNEL=y
270272 CONFIG_STRIP_ASM_SYMS=y
271273 CONFIG_MAGIC_SYSRQ=y
272274 CONFIG_DEBUG_FS=y
273−CONFIG_DEBUG_KERNEL=y
274275 CONFIG_DEBUG_STACKOVERFLOW=y
275276 # CONFIG_SCHED_DEBUG is not set
arch/parisc/include/asm/pgtable.h+1−1
@@ -160,7 +160,7 @@ extern void __update_cache(pte_t pte); · 159 unmodified lines
160160 #define SPACEID_SHIFT (MAX_ADDRBITS - 32)
161161 #else
162162 #define MAX_ADDRBITS (BITS_PER_LONG)
163−#define MAX_ADDRESS (1UL << MAX_ADDRBITS)
163+#define MAX_ADDRESS (1ULL << MAX_ADDRBITS)
164164 #define SPACEID_SHIFT 0
165165 #endif
166166
arch/parisc/kernel/cache.c+3−15
@@ -403,7 +403,7 @@ void __init parisc_setup_cache_timing(void) · 402 unmodified lines
403403 {
404404 unsigned long rangetime, alltime;
405405 unsigned long size;
406− unsigned long threshold, threshold2;
406+ unsigned long threshold;
407407
408408 alltime = mfctl(16);
409409 flush_data_cache();
@@ -418,20 +418,8 @@ void __init parisc_setup_cache_timing(void) · 8 unmodified lines
418418 alltime, size, rangetime);
419419
420420 threshold = L1_CACHE_ALIGN(size * alltime / rangetime);
421−
422− /*
423− * The threshold computed above isn't very reliable since the
424− * flush times depend greatly on the percentage of dirty lines
425− * in the flush range. Further, the whole cache time doesn't
426− * include the time to refill lines that aren't in the mm/vma
427− * being flushed. By timing glibc build and checks on mako cpus,
428− * the following formula seems to work reasonably well. The
429− * value from the timing calculation is too small, and increases
430− * build and check times by almost a factor two.
431− */
432− threshold2 = cache_info.dc_size * num_online_cpus();
433− if (threshold2 > threshold)
434− threshold = threshold2;
421+ if (threshold > cache_info.dc_size)
422+ threshold = cache_info.dc_size;
435423 if (threshold)
436424 parisc_cache_flush_threshold = threshold;
437425 printk(KERN_INFO "Cache flush threshold set to %lu KiB\n",
arch/parisc/kernel/kprobes.c+1−1
@@ -152,7 +152,7 @@ int __kprobes parisc_kprobe_ss_handler(struct pt_regs *regs) · 151 unmodified lines
152152 /* for absolute branch instructions we can copy iaoq_b. for relative
153153 * branch instructions we need to calculate the new address based on the
154154 * difference between iaoq_f and iaoq_b. We cannot use iaoq_b without
155− * modificationt because it's based on our ainsn.insn address.
155+ * modifications because it's based on our ainsn.insn address.
156156 */
157157
158158 if (p->post_handler)
arch/parisc/kernel/patch.c+14−11
@@ -40,7 +40,10 @@ static void __kprobes *patch_map(void *addr, int fixmap, unsigned long *flags, · 39 unmodified lines
4040
4141 *need_unmap = 1;
4242 set_fixmap(fixmap, page_to_phys(page));
43− raw_spin_lock_irqsave(&patch_lock, *flags);
43+ if (flags)
44+ raw_spin_lock_irqsave(&patch_lock, *flags);
45+ else
46+ __acquire(&patch_lock);
4447
4548 return (void *) (__fix_to_virt(fixmap) + (uintaddr & ~PAGE_MASK));
4649 }
@@ -49,7 +52,10 @@ static void __kprobes patch_unmap(int fixmap, unsigned long *flags) · 2 unmodified lines
4952 {
5053 clear_fixmap(fixmap);
5154
52− raw_spin_unlock_irqrestore(&patch_lock, *flags);
55+ if (flags)
56+ raw_spin_unlock_irqrestore(&patch_lock, *flags);
57+ else
58+ __release(&patch_lock);
5359 }
5460
5561 void __kprobes __patch_text_multiple(void *addr, u32 *insn, unsigned int len)
@@ -61,9 +67,8 @@ void __kprobes __patch_text_multiple(void *addr, u32 *insn, unsigned int len) · 5 unmodified lines
6167 int mapped;
6268
6369 /* Make sure we don't have any aliases in cache */
64− flush_kernel_dcache_range_asm(start, end);
65− flush_kernel_icache_range_asm(start, end);
66− flush_tlb_kernel_range(start, end);
70+ flush_kernel_vmap_range(addr, len);
71+ flush_icache_range(start, end);
6772
6873 p = fixmap = patch_map(addr, FIX_TEXT_POKE0, &flags, &mapped);
6974
@@ -76,10 +81,8 @@ void __kprobes __patch_text_multiple(void *addr, u32 *insn, unsigned int len) · 6 unmodified lines
7681 * We're crossing a page boundary, so
7782 * need to remap
7883 */
79− flush_kernel_dcache_range_asm((unsigned long)fixmap,
80− (unsigned long)p);
81− flush_tlb_kernel_range((unsigned long)fixmap,
82− (unsigned long)p);
84+ flush_kernel_vmap_range((void *)fixmap,
85+ (p-fixmap) * sizeof(*p));
8386 if (mapped)
8487 patch_unmap(FIX_TEXT_POKE0, &flags);
8588 p = fixmap = patch_map(addr, FIX_TEXT_POKE0, &flags,
@@ -87,10 +90,10 @@ void __kprobes __patch_text_multiple(void *addr, u32 *insn, unsigned int len) · 1 unmodified line
8790 }
8891 }
8992
90− flush_kernel_dcache_range_asm((unsigned long)fixmap, (unsigned long)p);
91− flush_tlb_kernel_range((unsigned long)fixmap, (unsigned long)p);
93+ flush_kernel_vmap_range((void *)fixmap, (p-fixmap) * sizeof(*p));
9294 if (mapped)
9395 patch_unmap(FIX_TEXT_POKE0, &flags);
96+ flush_icache_range(start, end);
9497 }
9598
9699 void __kprobes __patch_text(void *addr, u32 insn)
arch/parisc/kernel/processor.c+9−2
@@ -171,6 +171,7 @@ static int __init processor_probe(struct parisc_device *dev) · 170 unmodified lines
171171 p->cpu_num = cpu_info.cpu_num;
172172 p->cpu_loc = cpu_info.cpu_loc;
173173
174+ set_cpu_possible(cpuid, true);
174175 store_cpu_topology(cpuid);
175176
176177 #ifdef CONFIG_SMP
@@ -419,8 +420,7 @@ show_cpuinfo (struct seq_file *m, void *v) · 242 unmodified lines
419420 }
420421 seq_printf(m, " (0x%02lx)\n", boot_cpu_data.pdc.capabilities);
421422
422− seq_printf(m, "model\t\t: %s\n"
423− "model name\t: %s\n",
423+ seq_printf(m, "model\t\t: %s - %s\n",
424424 boot_cpu_data.pdc.sys_model_name,
425425 cpuinfo->dev ?
426426 cpuinfo->dev->name : "Unknown");
@@ -461,6 +461,13 @@ static struct parisc_driver cpu_driver __refdata = { · 34 unmodified lines
461461 */
462462 void __init processor_init(void)
463463 {
464+ unsigned int cpu;
465+
464466 reset_cpu_topology();
467+
468+ /* reset possible mask. We will mark those which are possible. */
469+ for_each_possible_cpu(cpu)
470+ set_cpu_possible(cpu, false);
471+
465472 register_parisc_driver(&cpu_driver);
466473 }
arch/parisc/kernel/setup.c+2−0
@@ -161,6 +161,8 @@ void __init setup_arch(char **cmdline_p) · 160 unmodified lines
161161 #ifdef CONFIG_PA11
162162 dma_ops_init();
163163 #endif
164+
165+ clear_sched_clock_stable();
164166 }
165167
166168 /*
arch/parisc/kernel/time.c+1−5
@@ -251,13 +251,9 @@ void __init time_init(void) · 250 unmodified lines
251251 static int __init init_cr16_clocksource(void)
252252 {
253253 /*
254− * The cr16 interval timers are not syncronized across CPUs, even if
255− * they share the same socket.
254+ * The cr16 interval timers are not synchronized across CPUs.
256255 */
257256 if (num_online_cpus() > 1 && !running_on_qemu) {
258− /* mark sched_clock unstable */
259− clear_sched_clock_stable();
260−
261257 clocksource_cr16.name = "cr16_unstable";
262258 clocksource_cr16.flags = CLOCK_SOURCE_UNSTABLE;
263259 clocksource_cr16.rating = 0;
arch/parisc/kernel/traps.c+1−1
@@ -469,7 +469,7 @@ void parisc_terminate(char *msg, struct pt_regs *regs, int code, unsigned long o · 468 unmodified lines
469469 * panic notifiers, and we should call panic
470470 * directly from the location that we wish.
471471 * e.g. We should not call panic from
472− * parisc_terminate, but rather the oter way around.
472+ * parisc_terminate, but rather the other way around.
473473 * This hack works, prints the panic message twice,
474474 * and it enables reboot timers!
475475 */
arch/parisc/math-emu/dfadd.c+1−1
@@ -253,7 +253,7 @@ dbl_fadd( · 252 unmodified lines
253253 return(NOEXCEPTION);
254254 }
255255 right_exponent = 1; /* Set exponent to reflect different bias
256− * with denomalized numbers. */
256+ * with denormalized numbers. */
257257 }
258258 else
259259 {
arch/parisc/math-emu/dfsub.c+1−1
@@ -256,7 +256,7 @@ dbl_fsub( · 255 unmodified lines
256256 return(NOEXCEPTION);
257257 }
258258 right_exponent = 1; /* Set exponent to reflect different bias
259− * with denomalized numbers. */
259+ * with denormalized numbers. */
260260 }
261261 else
262262 {
arch/parisc/math-emu/sfadd.c+1−1
@@ -249,7 +249,7 @@ sgl_fadd( · 248 unmodified lines
249249 return(NOEXCEPTION);
250250 }
251251 right_exponent = 1; /* Set exponent to reflect different bias
252− * with denomalized numbers. */
252+ * with denormalized numbers. */
253253 }
254254 else
255255 {
arch/parisc/math-emu/sfsub.c+1−1
@@ -252,7 +252,7 @@ sgl_fsub( · 251 unmodified lines
252252 return(NOEXCEPTION);
253253 }
254254 right_exponent = 1; /* Set exponent to reflect different bias
255− * with denomalized numbers. */
255+ * with denormalized numbers. */
256256 }
257257 else
258258 {
arch/powerpc/kernel/vdso/gettimeofday.S+7−2
@@ -22,12 +22,15 @@ · 21 unmodified lines
2222 .macro cvdso_call funct call_time=0
2323 .cfi_startproc
2424 PPC_STLU r1, -PPC_MIN_STKFRM(r1)
25+ .cfi_adjust_cfa_offset PPC_MIN_STKFRM
2526 mflr r0
26− .cfi_register lr, r0
2727 PPC_STLU r1, -PPC_MIN_STKFRM(r1)
28+ .cfi_adjust_cfa_offset PPC_MIN_STKFRM
2829 PPC_STL r0, PPC_MIN_STKFRM + PPC_LR_STKOFF(r1)
30+ .cfi_rel_offset lr, PPC_MIN_STKFRM + PPC_LR_STKOFF
2931 #ifdef __powerpc64__
3032 PPC_STL r2, PPC_MIN_STKFRM + STK_GOT(r1)
33+ .cfi_rel_offset r2, PPC_MIN_STKFRM + STK_GOT
3134 #endif
3235 get_datapage r5
3336 .ifeq \call_time
@@ -39,13 +42,15 @@ · 5 unmodified lines
3942 PPC_LL r0, PPC_MIN_STKFRM + PPC_LR_STKOFF(r1)
4043 #ifdef __powerpc64__
4144 PPC_LL r2, PPC_MIN_STKFRM + STK_GOT(r1)
45+ .cfi_restore r2
4246 #endif
4347 .ifeq \call_time
4448 cmpwi r3, 0
4549 .endif
4650 mtlr r0
47− .cfi_restore lr
4851 addi r1, r1, 2 * PPC_MIN_STKFRM
52+ .cfi_restore lr
53+ .cfi_def_cfa_offset 0
4954 crclr so
5055 .ifeq \call_time
5156 beqlr+
arch/powerpc/kvm/book3s_32_sr.S+21−5
@@ -122,11 +122,27 @@ · 121 unmodified lines
122122
123123 /* 0x0 - 0xb */
124124
125− /* 'current->mm' needs to be in r4 */
126− tophys(r4, r2)
127− lwz r4, MM(r4)
128− tophys(r4, r4)
129− /* This only clobbers r0, r3, r4 and r5 */
125+ /* switch_mmu_context() needs paging, let's enable it */
126+ mfmsr r9
127+ ori r11, r9, MSR_DR
128+ mtmsr r11
129+ sync
130+
131+ /* switch_mmu_context() clobbers r12, rescue it */
132+ SAVE_GPR(12, r1)
133+
134+ /* Calling switch_mmu_context(<inv>, current->mm, <inv>); */
135+ lwz r4, MM(r2)
130136 bl switch_mmu_context
131137
138+ /* restore r12 */
139+ REST_GPR(12, r1)
140+
141+ /* Disable paging again */
142+ mfmsr r9
143+ li r6, MSR_DR
144+ andc r9, r9, r6
145+ mtmsr r9
146+ sync
147+
132148 .endm
arch/powerpc/platforms/pseries/papr_scm.c+2−5
@@ -462,7 +462,6 @@ static int papr_scm_pmu_check_events(struct papr_scm_priv *p, struct nvdimm_pmu · 461 unmodified lines
462462 {
463463 struct papr_scm_perf_stat *stat;
464464 struct papr_scm_perf_stats *stats;
465− char *statid;
466465 int index, rc, count;
467466 u32 available_events;
468467
@@ -493,14 +492,12 @@ static int papr_scm_pmu_check_events(struct papr_scm_priv *p, struct nvdimm_pmu · 24 unmodified lines
493492
494493 for (index = 0, stat = stats->scm_statistic, count = 0;
495494 index < available_events; index++, ++stat) {
496− statid = kzalloc(strlen(stat->stat_id) + 1, GFP_KERNEL);
497− if (!statid) {
495+ p->nvdimm_events_map[count] = kmemdup_nul(stat->stat_id, 8, GFP_KERNEL);
496+ if (!p->nvdimm_events_map[count]) {
498497 rc = -ENOMEM;
499498 goto out_nvdimm_events_map;
500499 }
501500
502− strcpy(statid, stat->stat_id);
503− p->nvdimm_events_map[count] = statid;
504501 count++;
505502 }
506503 p->nvdimm_events_map[count] = NULL;
arch/powerpc/platforms/pseries/vas-sysfs.c+14−5
@@ -27,22 +27,31 @@ struct vas_caps_entry { · 26 unmodified lines
2727
2828 /*
2929 * This function is used to get the notification from the drmgr when
30− * QoS credits are changed. Though receiving the target total QoS
31− * credits here, get the official QoS capabilities from the hypervisor.
30+ * QoS credits are changed.
3231 */
33−static ssize_t update_total_credits_trigger(struct vas_cop_feat_caps *caps,
32+static ssize_t update_total_credits_store(struct vas_cop_feat_caps *caps,
3433 const char *buf, size_t count)
3534 {
3635 int err;
3736 u16 creds;
3837
3938 err = kstrtou16(buf, 0, &creds);
39+ /*
40+ * The user space interface from the management console
41+ * notifies OS with the new QoS credits and then the
42+ * hypervisor. So OS has to use this new credits value
43+ * and reconfigure VAS windows (close or reopen depends
44+ * on the credits available) instead of depending on VAS
45+ * QoS capabilities from the hypervisor.
46+ */
4047 if (!err)
41− err = vas_reconfig_capabilties(caps->win_type);
48+ err = vas_reconfig_capabilties(caps->win_type, creds);
4249
4350 if (err)
4451 return -EINVAL;
4552
53+ pr_info("Set QoS total credits %u\n", creds);
54+
4655 return count;
4756 }
4857
@@ -92,7 +101,7 @@ VAS_ATTR_RO(nr_total_credits); · 43 unmodified lines
92101 VAS_ATTR_RO(nr_used_credits);
93102
94103 static struct vas_sysfs_entry update_total_credits_attribute =
95− __ATTR(update_total_credits, 0200, NULL, update_total_credits_trigger);
104+ __ATTR(update_total_credits, 0200, NULL, update_total_credits_store);
96105
97106 static struct attribute *vas_def_capab_attrs[] = {
98107 &nr_total_credits_attribute.attr,
arch/powerpc/platforms/pseries/vas.c+12−11
@@ -779,10 +779,10 @@ static int reconfig_close_windows(struct vas_caps *vcap, int excess_creds, · 778 unmodified lines
779779 * changes. Reconfig window configurations based on the credits
780780 * availability from this new capabilities.
781781 */
782−int vas_reconfig_capabilties(u8 type)
782+int vas_reconfig_capabilties(u8 type, int new_nr_creds)
783783 {
784784 struct vas_cop_feat_caps *caps;
785− int old_nr_creds, new_nr_creds;
785+ int old_nr_creds;
786786 struct vas_caps *vcaps;
787787 int rc = 0, nr_active_wins;
788788
@@ -795,12 +795,6 @@ int vas_reconfig_capabilties(u8 type) · 6 unmodified lines
795795 caps = &vcaps->caps;
796796
797797 mutex_lock(&vas_pseries_mutex);
798− rc = h_query_vas_capabilities(H_QUERY_VAS_CAPABILITIES, vcaps->feat,
799− (u64)virt_to_phys(&hv_cop_caps));
800− if (rc)
801− goto out;
802−
803− new_nr_creds = be16_to_cpu(hv_cop_caps.target_lpar_creds);
804798
805799 old_nr_creds = atomic_read(&caps->nr_total_credits);
806800
@@ -832,7 +826,6 @@ int vas_reconfig_capabilties(u8 type) · 25 unmodified lines
832826 false);
833827 }
834828
835−out:
836829 mutex_unlock(&vas_pseries_mutex);
837830 return rc;
838831 }
@@ -850,7 +843,7 @@ static int pseries_vas_notifier(struct notifier_block *nb, · 11 unmodified lines
850843 struct of_reconfig_data *rd = data;
851844 struct device_node *dn = rd->dn;
852845 const __be32 *intserv = NULL;
853− int len, rc = 0;
846+ int new_nr_creds, len, rc = 0;
854847
855848 if ((action == OF_RECONFIG_ATTACH_NODE) ||
856849 (action == OF_RECONFIG_DETACH_NODE))
@@ -862,7 +855,15 @@ static int pseries_vas_notifier(struct notifier_block *nb, · 5 unmodified lines
862855 if (!intserv)
863856 return NOTIFY_OK;
864857
865− rc = vas_reconfig_capabilties(VAS_GZIP_DEF_FEAT_TYPE);
858+ rc = h_query_vas_capabilities(H_QUERY_VAS_CAPABILITIES,
859+ vascaps[VAS_GZIP_DEF_FEAT_TYPE].feat,
860+ (u64)virt_to_phys(&hv_cop_caps));
861+ if (!rc) {
862+ new_nr_creds = be16_to_cpu(hv_cop_caps.target_lpar_creds);
863+ rc = vas_reconfig_capabilties(VAS_GZIP_DEF_FEAT_TYPE,
864+ new_nr_creds);
865+ }
866+
866867 if (rc)
867868 pr_err("Failed reconfig VAS capabilities with DLPAR\n");
868869
arch/powerpc/platforms/pseries/vas.h+1−1
@@ -135,7 +135,7 @@ struct pseries_vas_window { · 134 unmodified lines
135135 };
136136
137137 int sysfs_add_vas_caps(struct vas_cop_feat_caps *caps);
138−int vas_reconfig_capabilties(u8 type);
138+int vas_reconfig_capabilties(u8 type, int new_nr_creds);
139139 int __init sysfs_pseries_vas_init(struct vas_all_caps *vas_caps);
140140
141141 #ifdef CONFIG_PPC_VAS
arch/riscv/boot/dts/microchip/microchip-mpfs-fabric.dtsi+14−2
@@ -7,7 +7,7 @@ · 6 unmodified lines
77 reg = <0x0 0x41000000 0x0 0xF0>;
88 microchip,sync-update-mask = /bits/ 32 <0>;
99 #pwm-cells = <2>;
10− clocks = <&clkcfg CLK_FIC3>;
10+ clocks = <&fabric_clk3>;
1111 status = "disabled";
1212 };
1313
@@ -16,10 +16,22 @@ · 2 unmodified lines
1616 reg = <0x0 0x44000000 0x0 0x1000>;
1717 #address-cells = <1>;
1818 #size-cells = <0>;
19− clocks = <&clkcfg CLK_FIC3>;
19+ clocks = <&fabric_clk3>;
2020 interrupt-parent = <&plic>;
2121 interrupts = <122>;
2222 clock-frequency = <100000>;
2323 status = "disabled";
2424 };
25+
26+ fabric_clk3: fabric-clk3 {
27+ compatible = "fixed-clock";
28+ #clock-cells = <0>;
29+ clock-frequency = <62500000>;
30+ };
31+
32+ fabric_clk1: fabric-clk1 {
33+ compatible = "fixed-clock";
34+ #clock-cells = <0>;
35+ clock-frequency = <125000000>;
36+ };
2537 };
arch/riscv/boot/dts/microchip/microchip-mpfs-icicle-kit.dts+1−1
@@ -45,7 +45,7 @@ · 44 unmodified lines
4545 };
4646
4747 &refclk {
48− clock-frequency = <600000000>;
48+ clock-frequency = <125000000>;
4949 };
5050
5151 &mmuart1 {
arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi+5−5
@@ -141,7 +141,7 @@ · 140 unmodified lines
141141 };
142142 };
143143
144− refclk: msspllclk {
144+ refclk: mssrefclk {
145145 compatible = "fixed-clock";
146146 #clock-cells = <0>;
147147 };
@@ -190,7 +190,7 @@ · 42 unmodified lines
190190
191191 clkcfg: clkcfg@20002000 {
192192 compatible = "microchip,mpfs-clkcfg";
193− reg = <0x0 0x20002000 0x0 0x1000>;
193+ reg = <0x0 0x20002000 0x0 0x1000>, <0x0 0x3E001000 0x0 0x1000>;
194194 clocks = <&refclk>;
195195 #clock-cells = <1>;
196196 };
@@ -393,8 +393,8 @@ · 196 unmodified lines
393393 reg = <0x0 0x20124000 0x0 0x1000>;
394394 interrupt-parent = <&plic>;
395395 interrupts = <80>, <81>;
396− clocks = <&clkcfg CLK_RTC>;
397− clock-names = "rtc";
396+ clocks = <&clkcfg CLK_RTC>, <&clkcfg CLK_RTCREF>;
397+ clock-names = "rtc", "rtcref";
398398 status = "disabled";
399399 };
400400
@@ -424,7 +424,7 @@ · 23 unmodified lines
424424 <0 0 0 3 &pcie_intc 2>,
425425 <0 0 0 4 &pcie_intc 3>;
426426 interrupt-map-mask = <0 0 0 7>;
427− clocks = <&clkcfg CLK_FIC0>, <&clkcfg CLK_FIC1>, <&clkcfg CLK_FIC3>;
427+ clocks = <&fabric_clk1>, <&fabric_clk1>, <&fabric_clk3>;
428428 clock-names = "fic0", "fic1", "fic3";
429429 ranges = <0x3000000 0x0 0x8000000 0x20 0x8000000 0x0 0x80000000>;
430430 msi-parent = <&pcie>;
arch/riscv/configs/defconfig+1−0
@@ -101,6 +101,7 @@ CONFIG_VIRTIO_BALLOON=y · 100 unmodified lines
101101 CONFIG_VIRTIO_INPUT=y
102102 CONFIG_VIRTIO_MMIO=y
103103 CONFIG_RPMSG_CHAR=y
104+CONFIG_RPMSG_CTRL=y
104105 CONFIG_RPMSG_VIRTIO=y
105106 CONFIG_EXT4_FS=y
106107 CONFIG_EXT4_FS_POSIX_ACL=y
arch/riscv/configs/rv32_defconfig+1−0
@@ -93,6 +93,7 @@ CONFIG_VIRTIO_BALLOON=y · 92 unmodified lines
9393 CONFIG_VIRTIO_INPUT=y
9494 CONFIG_VIRTIO_MMIO=y
9595 CONFIG_RPMSG_CHAR=y
96+CONFIG_RPMSG_CTRL=y
9697 CONFIG_RPMSG_VIRTIO=y
9798 CONFIG_EXT4_FS=y
9899 CONFIG_EXT4_FS_POSIX_ACL=y
arch/riscv/kernel/patch.c+1−1
@@ -104,7 +104,7 @@ static int patch_text_cb(void *data) · 103 unmodified lines
104104 struct patch_insn *patch = data;
105105 int ret = 0;
106106
107− if (atomic_inc_return(&patch->cpu_count) == 1) {
107+ if (atomic_inc_return(&patch->cpu_count) == num_online_cpus()) {
108108 ret =
109109 patch_text_nosync(patch->addr, &patch->insn,
110110 GET_INSN_LENGTH(patch->insn));
arch/riscv/kvm/vcpu_sbi.c+3−2
@@ -83,7 +83,7 @@ void kvm_riscv_vcpu_sbi_forward(struct kvm_vcpu *vcpu, struct kvm_run *run) · 82 unmodified lines
8383
8484 void kvm_riscv_vcpu_sbi_system_reset(struct kvm_vcpu *vcpu,
8585 struct kvm_run *run,
86− u32 type, u64 flags)
86+ u32 type, u64 reason)
8787 {
8888 unsigned long i;
8989 struct kvm_vcpu *tmp;
@@ -94,7 +94,8 @@ void kvm_riscv_vcpu_sbi_system_reset(struct kvm_vcpu *vcpu, · 4 unmodified lines
9494
9595 memset(&run->system_event, 0, sizeof(run->system_event));
9696 run->system_event.type = type;
97− run->system_event.flags = flags;
97+ run->system_event.ndata = 1;
98+ run->system_event.data[0] = reason;
9899 run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
99100 }
100101
arch/riscv/mm/init.c+19−2
@@ -208,8 +208,25 @@ static void __init setup_bootmem(void) · 207 unmodified lines
208208 * early_init_fdt_reserve_self() since __pa() does
209209 * not work for DTB pointers that are fixmap addresses
210210 */
211− if (!IS_ENABLED(CONFIG_BUILTIN_DTB))
212− memblock_reserve(dtb_early_pa, fdt_totalsize(dtb_early_va));
211+ if (!IS_ENABLED(CONFIG_BUILTIN_DTB)) {
212+ /*
213+ * In case the DTB is not located in a memory region we won't
214+ * be able to locate it later on via the linear mapping and
215+ * get a segfault when accessing it via __va(dtb_early_pa).
216+ * To avoid this situation copy DTB to a memory region.
217+ * Note that memblock_phys_alloc will also reserve DTB region.
218+ */
219+ if (!memblock_is_memory(dtb_early_pa)) {
220+ size_t fdt_size = fdt_totalsize(dtb_early_va);
221+ phys_addr_t new_dtb_early_pa = memblock_phys_alloc(fdt_size, PAGE_SIZE);
222+ void *new_dtb_early_va = early_memremap(new_dtb_early_pa, fdt_size);
223+
224+ memcpy(new_dtb_early_va, dtb_early_va, fdt_size);
225+ early_memunmap(new_dtb_early_va, fdt_size);
226+ _dtb_early_pa = new_dtb_early_pa;
227+ } else
228+ memblock_reserve(dtb_early_pa, fdt_totalsize(dtb_early_va));
229+ }
213230
214231 early_init_fdt_scan_reserved_mem();
215232 dma_contiguous_reserve(dma32_phys_limit);
arch/s390/Makefile+10−0
@@ -30,6 +30,16 @@ KBUILD_CFLAGS_DECOMPRESSOR += -fno-stack-protector · 29 unmodified lines
3030 KBUILD_CFLAGS_DECOMPRESSOR += $(call cc-disable-warning, address-of-packed-member)
3131 KBUILD_CFLAGS_DECOMPRESSOR += $(if $(CONFIG_DEBUG_INFO),-g)
3232 KBUILD_CFLAGS_DECOMPRESSOR += $(if $(CONFIG_DEBUG_INFO_DWARF4), $(call cc-option, -gdwarf-4,))
33+
34+ifdef CONFIG_CC_IS_GCC
35+ ifeq ($(call cc-ifversion, -ge, 1200, y), y)
36+ ifeq ($(call cc-ifversion, -lt, 1300, y), y)
37+ KBUILD_CFLAGS += $(call cc-disable-warning, array-bounds)
38+ KBUILD_CFLAGS_DECOMPRESSOR += $(call cc-disable-warning, array-bounds)
39+ endif
40+ endif
41+endif
42+
3343 UTS_MACHINE := s390x
3444 STACK_SIZE := $(if $(CONFIG_KASAN),65536,16384)
3545 CHECKFLAGS += -D__s390__ -D__s390x__
arch/s390/kvm/kvm-s390.c+10−1
@@ -2384,7 +2384,16 @@ static int kvm_s390_vm_mem_op(struct kvm *kvm, struct kvm_s390_mem_op *mop) · 2383 unmodified lines
23842384 return -EINVAL;
23852385 if (mop->size > MEM_OP_MAX_SIZE)
23862386 return -E2BIG;
2387− if (kvm_s390_pv_is_protected(kvm))
2387+ /*
2388+ * This is technically a heuristic only, if the kvm->lock is not
2389+ * taken, it is not guaranteed that the vm is/remains non-protected.
2390+ * This is ok from a kernel perspective, wrongdoing is detected
2391+ * on the access, -EFAULT is returned and the vm may crash the
2392+ * next time it accesses the memory in question.
2393+ * There is no sane usecase to do switching and a memop on two
2394+ * different CPUs at the same time.
2395+ */
2396+ if (kvm_s390_pv_get_handle(kvm))
23882397 return -EINVAL;
23892398 if (mop->flags & KVM_S390_MEMOP_F_SKEY_PROTECTION) {
23902399 if (access_key_invalid(mop->key))
arch/s390/mm/gmap.c+7−0
@@ -1183,6 +1183,7 @@ EXPORT_SYMBOL_GPL(gmap_read_table); · 1182 unmodified lines
11831183 static inline void gmap_insert_rmap(struct gmap *sg, unsigned long vmaddr,
11841184 struct gmap_rmap *rmap)
11851185 {
1186+ struct gmap_rmap *temp;
11861187 void __rcu **slot;
11871188
11881189 BUG_ON(!gmap_is_shadow(sg));
@@ -1190,6 +1191,12 @@ static inline void gmap_insert_rmap(struct gmap *sg, unsigned long vmaddr, · 1 unmodified line
11901191 if (slot) {
11911192 rmap->next = radix_tree_deref_slot_protected(slot,
11921193 &sg->guest_table_lock);
1194+ for (temp = rmap->next; temp; temp = temp->next) {
1195+ if (temp->raddr == rmap->raddr) {
1196+ kfree(rmap);
1197+ return;
1198+ }
1199+ }
11931200 radix_tree_replace_slot(&sg->host_to_rmap, slot, rmap);
11941201 } else {
11951202 rmap->next = NULL;
arch/x86/Kconfig+1−1
@@ -1866,7 +1866,7 @@ config X86_KERNEL_IBT · 1865 unmodified lines
18661866 code with them to make this happen.
18671867
18681868 In addition to building the kernel with IBT, seal all functions that
1869− are not indirect call targets, avoiding them ever becomming one.
1869+ are not indirect call targets, avoiding them ever becoming one.
18701870
18711871 This requires LTO like objtool runs and will slow down the build. It
18721872 does significantly reduce the number of ENDBR instructions in the
arch/x86/entry/entry_64.S+3−0
@@ -337,6 +337,9 @@ SYM_CODE_END(ret_from_fork) · 336 unmodified lines
337337
338338 call \cfunc
339339
340+ /* For some configurations \cfunc ends up being a noreturn. */
341+ REACHABLE
342+
340343 jmp error_return
341344 .endm
342345
arch/x86/include/asm/intel-family.h+3−0
@@ -26,6 +26,7 @@ · 25 unmodified lines
2626 * _G - parts with extra graphics on
2727 * _X - regular server parts
2828 * _D - micro server parts
29+ * _N,_P - other mobile parts
2930 *
3031 * Historical OPTDIFFs:
3132 *
@@ -107,8 +108,10 @@ · 75 unmodified lines
107108
108109 #define INTEL_FAM6_ALDERLAKE 0x97 /* Golden Cove / Gracemont */
109110 #define INTEL_FAM6_ALDERLAKE_L 0x9A /* Golden Cove / Gracemont */
111+#define INTEL_FAM6_ALDERLAKE_N 0xBE
110112
111113 #define INTEL_FAM6_RAPTORLAKE 0xB7
114+#define INTEL_FAM6_RAPTORLAKE_P 0xBA
112115
113116 /* "Small Core" Processors (Atom) */
114117
arch/x86/include/asm/microcode.h+2−0
@@ -131,10 +131,12 @@ extern void __init load_ucode_bsp(void); · 130 unmodified lines
131131 extern void load_ucode_ap(void);
132132 void reload_early_microcode(void);
133133 extern bool initrd_gone;
134+void microcode_bsp_resume(void);
134135 #else
135136 static inline void __init load_ucode_bsp(void) { }
136137 static inline void load_ucode_ap(void) { }
137138 static inline void reload_early_microcode(void) { }
139+static inline void microcode_bsp_resume(void) { }
138140 #endif
139141
140142 #endif /* _ASM_X86_MICROCODE_H */
arch/x86/include/asm/pgtable_types.h+0−4
@@ -559,10 +559,6 @@ static inline void update_page_count(int level, unsigned long pages) { } · 558 unmodified lines
559559 extern pte_t *lookup_address(unsigned long address, unsigned int *level);
560560 extern pte_t *lookup_address_in_pgd(pgd_t *pgd, unsigned long address,
561561 unsigned int *level);
562−
563−struct mm_struct;
564−extern pte_t *lookup_address_in_mm(struct mm_struct *mm, unsigned long address,
565− unsigned int *level);
566562 extern pmd_t *lookup_pmd_address(unsigned long address);
567563 extern phys_addr_t slow_virt_to_phys(void *__address);
568564 extern int __init kernel_map_pages_in_pgd(pgd_t *pgd, u64 pfn,
arch/x86/include/asm/static_call.h+1−0
@@ -26,6 +26,7 @@ · 25 unmodified lines
2626 ".align 4 \n" \
2727 ".globl " STATIC_CALL_TRAMP_STR(name) " \n" \
2828 STATIC_CALL_TRAMP_STR(name) ": \n" \
29+ ANNOTATE_NOENDBR \
2930 insns " \n" \
3031 ".byte 0x53, 0x43, 0x54 \n" \
3132 ".type " STATIC_CALL_TRAMP_STR(name) ", @function \n" \
arch/x86/kernel/cpu/microcode/core.c+3−3
@@ -758,9 +758,9 @@ static struct subsys_interface mc_cpu_interface = { · 757 unmodified lines
758758 };
759759
760760 /**
761− * mc_bp_resume - Update boot CPU microcode during resume.
761+ * microcode_bsp_resume - Update boot CPU microcode during resume.
762762 */
763−static void mc_bp_resume(void)
763+void microcode_bsp_resume(void)
764764 {
765765 int cpu = smp_processor_id();
766766 struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
@@ -772,7 +772,7 @@ static void mc_bp_resume(void) · 5 unmodified lines
772772 }
773773
774774 static struct syscore_ops mc_syscore_ops = {
775− .resume = mc_bp_resume,
775+ .resume = microcode_bsp_resume,
776776 };
777777
778778 static int mc_cpu_starting(unsigned int cpu)
arch/x86/kernel/fpu/core.c+26−41
@@ -41,17 +41,7 @@ struct fpu_state_config fpu_user_cfg __ro_after_init; · 40 unmodified lines
4141 */
4242 struct fpstate init_fpstate __ro_after_init;
4343
44−/*
45− * Track whether the kernel is using the FPU state
46− * currently.
47− *
48− * This flag is used:
49− *
50− * - by IRQ context code to potentially use the FPU
51− * if it's unused.
52− *
53− * - to debug kernel_fpu_begin()/end() correctness
54− */
44+/* Track in-kernel FPU usage */
5545 static DEFINE_PER_CPU(bool, in_kernel_fpu);
5646
5747 /*
@@ -59,42 +49,37 @@ static DEFINE_PER_CPU(bool, in_kernel_fpu); · 1 unmodified line
5949 */
6050 DEFINE_PER_CPU(struct fpu *, fpu_fpregs_owner_ctx);
6151
62−static bool kernel_fpu_disabled(void)
63−{
64− return this_cpu_read(in_kernel_fpu);
65−}
66−
67−static bool interrupted_kernel_fpu_idle(void)
68−{
69− return !kernel_fpu_disabled();
70−}
71−
72−/*
73− * Were we in user mode (or vm86 mode) when we were
74− * interrupted?
75− *
76− * Doing kernel_fpu_begin/end() is ok if we are running
77− * in an interrupt context from user mode - we'll just
78− * save the FPU state as required.
79− */
80−static bool interrupted_user_mode(void)
81−{
82− struct pt_regs *regs = get_irq_regs();
83− return regs && user_mode(regs);
84−}
85−
8652 /*
8753 * Can we use the FPU in kernel mode with the
8854 * whole "kernel_fpu_begin/end()" sequence?
89− *
90− * It's always ok in process context (ie "not interrupt")
91− * but it is sometimes ok even from an irq.
9255 */
9356 bool irq_fpu_usable(void)
9457 {
95− return !in_interrupt() ||
96− interrupted_user_mode() ||
97− interrupted_kernel_fpu_idle();
58+ if (WARN_ON_ONCE(in_nmi()))
59+ return false;
60+
61+ /* In kernel FPU usage already active? */
62+ if (this_cpu_read(in_kernel_fpu))
63+ return false;
64+
65+ /*
66+ * When not in NMI or hard interrupt context, FPU can be used in:
67+ *
68+ * - Task context except from within fpregs_lock()'ed critical
69+ * regions.
70+ *
71+ * - Soft interrupt processing context which cannot happen
72+ * while in a fpregs_lock()'ed critical region.
73+ */
74+ if (!in_hardirq())
75+ return true;
76+
77+ /*
78+ * In hard interrupt context it's safe when soft interrupts
79+ * are enabled, which means the interrupt did not hit in
80+ * a fpregs_lock()'ed critical region.
81+ */
82+ return !softirq_count();
9883 }
9984 EXPORT_SYMBOL(irq_fpu_usable);
10085
arch/x86/kernel/unwind_orc.c+4−4
@@ -339,11 +339,11 @@ static bool stack_access_ok(struct unwind_state *state, unsigned long _addr, · 338 unmodified lines
339339 struct stack_info *info = &state->stack_info;
340340 void *addr = (void *)_addr;
341341
342− if (!on_stack(info, addr, len) &&
343− (get_stack_info(addr, state->task, info, &state->stack_mask)))
344− return false;
342+ if (on_stack(info, addr, len))
343+ return true;
345344
346− return true;
345+ return !get_stack_info(addr, state->task, info, &state->stack_mask) &&
346+ on_stack(info, addr, len);
347347 }
348348
349349 static bool deref_stack_reg(struct unwind_state *state, unsigned long addr,
arch/x86/kvm/cpuid.c+19−5
@@ -887,6 +887,11 @@ static inline int __do_cpuid_func(struct kvm_cpuid_array *array, u32 function) · 886 unmodified lines
887887 union cpuid10_eax eax;
888888 union cpuid10_edx edx;
889889
890+ if (!static_cpu_has(X86_FEATURE_ARCH_PERFMON)) {
891+ entry->eax = entry->ebx = entry->ecx = entry->edx = 0;
892+ break;
893+ }
894+
890895 perf_get_x86_pmu_capability(&cap);
891896
892897 /*
@@ -1085,12 +1090,21 @@ static inline int __do_cpuid_func(struct kvm_cpuid_array *array, u32 function) · 192 unmodified lines
10851090 case 0x80000000:
10861091 entry->eax = min(entry->eax, 0x80000021);
10871092 /*
1088− * Serializing LFENCE is reported in a multitude of ways,
1089− * and NullSegClearsBase is not reported in CPUID on Zen2;
1090− * help userspace by providing the CPUID leaf ourselves.
1093+ * Serializing LFENCE is reported in a multitude of ways, and
1094+ * NullSegClearsBase is not reported in CPUID on Zen2; help
1095+ * userspace by providing the CPUID leaf ourselves.
1096+ *
1097+ * However, only do it if the host has CPUID leaf 0x8000001d.
1098+ * QEMU thinks that it can query the host blindly for that
1099+ * CPUID leaf if KVM reports that it supports 0x8000001d or
1100+ * above. The processor merrily returns values from the
1101+ * highest Intel leaf which QEMU tries to use as the guest's
1102+ * 0x8000001d. Even worse, this can result in an infinite
1103+ * loop if said highest leaf has no subleaves indexed by ECX.
10911104 */
1092− if (static_cpu_has(X86_FEATURE_LFENCE_RDTSC)
1093− || !static_cpu_has_bug(X86_BUG_NULL_SEG))
1105+ if (entry->eax >= 0x8000001d &&
1106+ (static_cpu_has(X86_FEATURE_LFENCE_RDTSC)
1107+ || !static_cpu_has_bug(X86_BUG_NULL_SEG)))
10941108 entry->eax = max(entry->eax, 0x80000021);
10951109 break;
10961110 case 0x80000001:
arch/x86/kvm/mmu.h+24−0
@@ -65,6 +65,30 @@ static __always_inline u64 rsvd_bits(int s, int e) · 64 unmodified lines
6565 return ((2ULL << (e - s)) - 1) << s;
6666 }
6767
68+/*
69+ * The number of non-reserved physical address bits irrespective of features
70+ * that repurpose legal bits, e.g. MKTME.
71+ */
72+extern u8 __read_mostly shadow_phys_bits;
73+
74+static inline gfn_t kvm_mmu_max_gfn(void)
75+{
76+ /*
77+ * Note that this uses the host MAXPHYADDR, not the guest's.
78+ * EPT/NPT cannot support GPAs that would exceed host.MAXPHYADDR;
79+ * assuming KVM is running on bare metal, guest accesses beyond
80+ * host.MAXPHYADDR will hit a #PF(RSVD) and never cause a vmexit
81+ * (either EPT Violation/Misconfig or #NPF), and so KVM will never
82+ * install a SPTE for such addresses. If KVM is running as a VM
83+ * itself, on the other hand, it might see a MAXPHYADDR that is less
84+ * than hardware's real MAXPHYADDR. Using the host MAXPHYADDR
85+ * disallows such SPTEs entirely and simplifies the TDP MMU.
86+ */
87+ int max_gpa_bits = likely(tdp_enabled) ? shadow_phys_bits : 52;
88+
89+ return (1ULL << (max_gpa_bits - PAGE_SHIFT)) - 1;
90+}
91+
6892 void kvm_mmu_set_mmio_spte_mask(u64 mmio_value, u64 mmio_mask, u64 access_mask);
6993 void kvm_mmu_set_ept_masks(bool has_ad_bits, bool has_exec_only);
7094
arch/x86/kvm/mmu/mmu.c+55−36
@@ -473,30 +473,6 @@ retry: · 472 unmodified lines
473473 }
474474 #endif
475475
476−static bool spte_has_volatile_bits(u64 spte)
477−{
478− if (!is_shadow_present_pte(spte))
479− return false;
480−
481− /*
482− * Always atomically update spte if it can be updated
483− * out of mmu-lock, it can ensure dirty bit is not lost,
484− * also, it can help us to get a stable is_writable_pte()
485− * to ensure tlb flush is not missed.
486− */
487− if (spte_can_locklessly_be_made_writable(spte) ||
488− is_access_track_spte(spte))
489− return true;
490−
491− if (spte_ad_enabled(spte)) {
492− if ((spte & shadow_accessed_mask) == 0 ||
493− (is_writable_pte(spte) && (spte & shadow_dirty_mask) == 0))
494− return true;
495− }
496−
497− return false;
498−}
499−
500476 /* Rules for using mmu_spte_set:
501477 * Set the sptep from nonpresent to present.
502478 * Note: the sptep being assigned *must* be either not present
@@ -557,7 +533,7 @@ static bool mmu_spte_update(u64 *sptep, u64 new_spte) · 54 unmodified lines
557533 * we always atomically update it, see the comments in
558534 * spte_has_volatile_bits().
559535 */
560− if (spte_can_locklessly_be_made_writable(old_spte) &&
536+ if (is_mmu_writable_spte(old_spte) &&
561537 !is_writable_pte(new_spte))
562538 flush = true;
563539
@@ -591,7 +567,8 @@ static int mmu_spte_clear_track_bits(struct kvm *kvm, u64 *sptep) · 27 unmodified lines
591567 u64 old_spte = *sptep;
592568 int level = sptep_to_sp(sptep)->role.level;
593569
594− if (!spte_has_volatile_bits(old_spte))
570+ if (!is_shadow_present_pte(old_spte) ||
571+ !spte_has_volatile_bits(old_spte))
595572 __update_clear_spte_fast(sptep, 0ull);
596573 else
597574 old_spte = __update_clear_spte_slow(sptep, 0ull);
@@ -1187,7 +1164,7 @@ static bool spte_write_protect(u64 *sptep, bool pt_protect) · 589 unmodified lines
11871164 u64 spte = *sptep;
11881165
11891166 if (!is_writable_pte(spte) &&
1190− !(pt_protect && spte_can_locklessly_be_made_writable(spte)))
1167+ !(pt_protect && is_mmu_writable_spte(spte)))
11911168 return false;
11921169
11931170 rmap_printk("spte %p %llx\n", sptep, *sptep);
@@ -2804,8 +2781,12 @@ static int host_pfn_mapping_level(struct kvm *kvm, gfn_t gfn, kvm_pfn_t pfn, · 1610 unmodified lines
28042781 const struct kvm_memory_slot *slot)
28052782 {
28062783 unsigned long hva;
2807− pte_t *pte;
2808− int level;
2784+ unsigned long flags;
2785+ int level = PG_LEVEL_4K;
2786+ pgd_t pgd;
2787+ p4d_t p4d;
2788+ pud_t pud;
2789+ pmd_t pmd;
28092790
28102791 if (!PageCompound(pfn_to_page(pfn)) && !kvm_is_zone_device_pfn(pfn))
28112792 return PG_LEVEL_4K;
@@ -2820,10 +2801,43 @@ static int host_pfn_mapping_level(struct kvm *kvm, gfn_t gfn, kvm_pfn_t pfn, · 8 unmodified lines
28202801 */
28212802 hva = __gfn_to_hva_memslot(slot, gfn);
28222803
2823− pte = lookup_address_in_mm(kvm->mm, hva, &level);
2824− if (unlikely(!pte))
2825− return PG_LEVEL_4K;
2804+ /*
2805+ * Lookup the mapping level in the current mm. The information
2806+ * may become stale soon, but it is safe to use as long as
2807+ * 1) mmu_notifier_retry was checked after taking mmu_lock, and
2808+ * 2) mmu_lock is taken now.
2809+ *
2810+ * We still need to disable IRQs to prevent concurrent tear down
2811+ * of page tables.
2812+ */
2813+ local_irq_save(flags);
2814+
2815+ pgd = READ_ONCE(*pgd_offset(kvm->mm, hva));
2816+ if (pgd_none(pgd))
2817+ goto out;
2818+
2819+ p4d = READ_ONCE(*p4d_offset(&pgd, hva));
2820+ if (p4d_none(p4d) || !p4d_present(p4d))
2821+ goto out;
2822+
2823+ pud = READ_ONCE(*pud_offset(&p4d, hva));
2824+ if (pud_none(pud) || !pud_present(pud))
2825+ goto out;
2826+
2827+ if (pud_large(pud)) {
2828+ level = PG_LEVEL_1G;
2829+ goto out;
2830+ }
28262831
2832+ pmd = READ_ONCE(*pmd_offset(&pud, hva));
2833+ if (pmd_none(pmd) || !pmd_present(pmd))
2834+ goto out;
2835+
2836+ if (pmd_large(pmd))
2837+ level = PG_LEVEL_2M;
2838+
2839+out:
2840+ local_irq_restore(flags);
28272841 return level;
28282842 }
28292843
@@ -2992,9 +3006,15 @@ static bool handle_abnormal_pfn(struct kvm_vcpu *vcpu, struct kvm_page_fault *fa · 162 unmodified lines
29923006 /*
29933007 * If MMIO caching is disabled, emulate immediately without
29943008 * touching the shadow page tables as attempting to install an
2995− * MMIO SPTE will just be an expensive nop.
3009+ * MMIO SPTE will just be an expensive nop. Do not cache MMIO
3010+ * whose gfn is greater than host.MAXPHYADDR, any guest that
3011+ * generates such gfns is running nested and is being tricked
3012+ * by L0 userspace (you can observe gfn > L1.MAXPHYADDR if
3013+ * and only if L1's MAXPHYADDR is inaccurate with respect to
3014+ * the hardware's).
29963015 */
2997− if (unlikely(!shadow_mmio_value)) {
3016+ if (unlikely(!shadow_mmio_value) ||
3017+ unlikely(fault->gfn > kvm_mmu_max_gfn())) {
29983018 *ret_val = RET_PF_EMULATE;
29993019 return true;
30003020 }
@@ -3153,8 +3173,7 @@ static int fast_page_fault(struct kvm_vcpu *vcpu, struct kvm_page_fault *fault) · 152 unmodified lines
31533173 * be removed in the fast path only if the SPTE was
31543174 * write-protected for dirty-logging or access tracking.
31553175 */
3156− if (fault->write &&
3157− spte_can_locklessly_be_made_writable(spte)) {
3176+ if (fault->write && is_mmu_writable_spte(spte)) {
31583177 new_spte |= PT_WRITABLE_MASK;
31593178
31603179 /*
arch/x86/kvm/mmu/spte.c+28−0
@@ -90,6 +90,34 @@ static bool kvm_is_mmio_pfn(kvm_pfn_t pfn) · 89 unmodified lines
9090 E820_TYPE_RAM);
9191 }
9292
93+/*
94+ * Returns true if the SPTE has bits that may be set without holding mmu_lock.
95+ * The caller is responsible for checking if the SPTE is shadow-present, and
96+ * for determining whether or not the caller cares about non-leaf SPTEs.
97+ */
98+bool spte_has_volatile_bits(u64 spte)
99+{
100+ /*
101+ * Always atomically update spte if it can be updated
102+ * out of mmu-lock, it can ensure dirty bit is not lost,
103+ * also, it can help us to get a stable is_writable_pte()
104+ * to ensure tlb flush is not missed.
105+ */
106+ if (!is_writable_pte(spte) && is_mmu_writable_spte(spte))
107+ return true;
108+
109+ if (is_access_track_spte(spte))
110+ return true;
111+
112+ if (spte_ad_enabled(spte)) {
113+ if (!(spte & shadow_accessed_mask) ||
114+ (is_writable_pte(spte) && !(spte & shadow_dirty_mask)))
115+ return true;
116+ }
117+
118+ return false;
119+}
120+
93121 bool make_spte(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp,
94122 const struct kvm_memory_slot *slot,
95123 unsigned int pte_access, gfn_t gfn, kvm_pfn_t pfn,
arch/x86/kvm/mmu/spte.h+3−7
@@ -201,12 +201,6 @@ static inline bool is_removed_spte(u64 spte) · 200 unmodified lines
201201 */
202202 extern u64 __read_mostly shadow_nonpresent_or_rsvd_lower_gfn_mask;
203203
204−/*
205− * The number of non-reserved physical address bits irrespective of features
206− * that repurpose legal bits, e.g. MKTME.
207− */
208−extern u8 __read_mostly shadow_phys_bits;
209−
210204 static inline bool is_mmio_spte(u64 spte)
211205 {
212206 return (spte & shadow_mmio_mask) == shadow_mmio_value &&
@@ -396,7 +390,7 @@ static inline void check_spte_writable_invariants(u64 spte) · 183 unmodified lines
396390 "kvm: Writable SPTE is not MMU-writable: %llx", spte);
397391 }
398392
399−static inline bool spte_can_locklessly_be_made_writable(u64 spte)
393+static inline bool is_mmu_writable_spte(u64 spte)
400394 {
401395 return spte & shadow_mmu_writable_mask;
402396 }
@@ -410,6 +404,8 @@ static inline u64 get_mmio_spte_generation(u64 spte) · 7 unmodified lines
410404 return gen;
411405 }
412406
407+bool spte_has_volatile_bits(u64 spte);
408+
413409 bool make_spte(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp,
414410 const struct kvm_memory_slot *slot,
415411 unsigned int pte_access, gfn_t gfn, kvm_pfn_t pfn,
arch/x86/kvm/mmu/tdp_iter.h+32−2
@@ -6,6 +6,7 @@ · 5 unmodified lines
66 #include <linux/kvm_host.h>
77
88 #include "mmu.h"
9+#include "spte.h"
910
1011 /*
1112 * TDP MMU SPTEs are RCU protected to allow paging structures (non-leaf SPTEs)
@@ -17,9 +18,38 @@ static inline u64 kvm_tdp_mmu_read_spte(tdp_ptep_t sptep) · 5 unmodified lines
1718 {
1819 return READ_ONCE(*rcu_dereference(sptep));
1920 }
20−static inline void kvm_tdp_mmu_write_spte(tdp_ptep_t sptep, u64 val)
21+
22+static inline u64 kvm_tdp_mmu_write_spte_atomic(tdp_ptep_t sptep, u64 new_spte)
23+{
24+ return xchg(rcu_dereference(sptep), new_spte);
25+}
26+
27+static inline void __kvm_tdp_mmu_write_spte(tdp_ptep_t sptep, u64 new_spte)
28+{
29+ WRITE_ONCE(*rcu_dereference(sptep), new_spte);
30+}
31+
32+static inline u64 kvm_tdp_mmu_write_spte(tdp_ptep_t sptep, u64 old_spte,
33+ u64 new_spte, int level)
2134 {
22− WRITE_ONCE(*rcu_dereference(sptep), val);
35+ /*
36+ * Atomically write the SPTE if it is a shadow-present, leaf SPTE with
37+ * volatile bits, i.e. has bits that can be set outside of mmu_lock.
38+ * The Writable bit can be set by KVM's fast page fault handler, and
39+ * Accessed and Dirty bits can be set by the CPU.
40+ *
41+ * Note, non-leaf SPTEs do have Accessed bits and those bits are
42+ * technically volatile, but KVM doesn't consume the Accessed bit of
43+ * non-leaf SPTEs, i.e. KVM doesn't care if it clobbers the bit. This
44+ * logic needs to be reassessed if KVM were to use non-leaf Accessed
45+ * bits, e.g. to skip stepping down into child SPTEs when aging SPTEs.
46+ */
47+ if (is_shadow_present_pte(old_spte) && is_last_spte(old_spte, level) &&
48+ spte_has_volatile_bits(old_spte))
49+ return kvm_tdp_mmu_write_spte_atomic(sptep, new_spte);
50+
51+ __kvm_tdp_mmu_write_spte(sptep, new_spte);
52+ return old_spte;
2353 }
2454
2555 /*
arch/x86/kvm/mmu/tdp_mmu.c+61−36
@@ -426,9 +426,9 @@ static void handle_removed_pt(struct kvm *kvm, tdp_ptep_t pt, bool shared) · 425 unmodified lines
426426 tdp_mmu_unlink_sp(kvm, sp, shared);
427427
428428 for (i = 0; i < PT64_ENT_PER_PAGE; i++) {
429− u64 *sptep = rcu_dereference(pt) + i;
429+ tdp_ptep_t sptep = pt + i;
430430 gfn_t gfn = base_gfn + i * KVM_PAGES_PER_HPAGE(level);
431− u64 old_child_spte;
431+ u64 old_spte;
432432
433433 if (shared) {
434434 /*
@@ -440,8 +440,8 @@ static void handle_removed_pt(struct kvm *kvm, tdp_ptep_t pt, bool shared) · 5 unmodified lines
440440 * value to the removed SPTE value.
441441 */
442442 for (;;) {
443− old_child_spte = xchg(sptep, REMOVED_SPTE);
444− if (!is_removed_spte(old_child_spte))
443+ old_spte = kvm_tdp_mmu_write_spte_atomic(sptep, REMOVED_SPTE);
444+ if (!is_removed_spte(old_spte))
445445 break;
446446 cpu_relax();
447447 }
@@ -455,23 +455,43 @@ static void handle_removed_pt(struct kvm *kvm, tdp_ptep_t pt, bool shared) · 7 unmodified lines
455455 * are guarded by the memslots generation, not by being
456456 * unreachable.
457457 */
458− old_child_spte = READ_ONCE(*sptep);
459− if (!is_shadow_present_pte(old_child_spte))
458+ old_spte = kvm_tdp_mmu_read_spte(sptep);
459+ if (!is_shadow_present_pte(old_spte))
460460 continue;
461461
462462 /*
463− * Marking the SPTE as a removed SPTE is not
464− * strictly necessary here as the MMU lock will
465− * stop other threads from concurrently modifying
466− * this SPTE. Using the removed SPTE value keeps
467− * the two branches consistent and simplifies
468− * the function.
463+ * Use the common helper instead of a raw WRITE_ONCE as
464+ * the SPTE needs to be updated atomically if it can be
465+ * modified by a different vCPU outside of mmu_lock.
466+ * Even though the parent SPTE is !PRESENT, the TLB
467+ * hasn't yet been flushed, and both Intel and AMD
468+ * document that A/D assists can use upper-level PxE
469+ * entries that are cached in the TLB, i.e. the CPU can
470+ * still access the page and mark it dirty.
471+ *
472+ * No retry is needed in the atomic update path as the
473+ * sole concern is dropping a Dirty bit, i.e. no other
474+ * task can zap/remove the SPTE as mmu_lock is held for
475+ * write. Marking the SPTE as a removed SPTE is not
476+ * strictly necessary for the same reason, but using
477+ * the remove SPTE value keeps the shared/exclusive
478+ * paths consistent and allows the handle_changed_spte()
479+ * call below to hardcode the new value to REMOVED_SPTE.
480+ *
481+ * Note, even though dropping a Dirty bit is the only
482+ * scenario where a non-atomic update could result in a
483+ * functional bug, simply checking the Dirty bit isn't
484+ * sufficient as a fast page fault could read the upper
485+ * level SPTE before it is zapped, and then make this
486+ * target SPTE writable, resume the guest, and set the
487+ * Dirty bit between reading the SPTE above and writing
488+ * it here.
469489 */
470− WRITE_ONCE(*sptep, REMOVED_SPTE);
490+ old_spte = kvm_tdp_mmu_write_spte(sptep, old_spte,
491+ REMOVED_SPTE, level);
471492 }
472493 handle_changed_spte(kvm, kvm_mmu_page_as_id(sp), gfn,
473− old_child_spte, REMOVED_SPTE, level,
474− shared);
494+ old_spte, REMOVED_SPTE, level, shared);
475495 }
476496
477497 call_rcu(&sp->rcu_head, tdp_mmu_free_sp_rcu_callback);
@@ -667,14 +687,13 @@ static inline int tdp_mmu_zap_spte_atomic(struct kvm *kvm, · 189 unmodified lines
667687 KVM_PAGES_PER_HPAGE(iter->level));
668688
669689 /*
670− * No other thread can overwrite the removed SPTE as they
671− * must either wait on the MMU lock or use
672− * tdp_mmu_set_spte_atomic which will not overwrite the
673− * special removed SPTE value. No bookkeeping is needed
674− * here since the SPTE is going from non-present
675− * to non-present.
690+ * No other thread can overwrite the removed SPTE as they must either
691+ * wait on the MMU lock or use tdp_mmu_set_spte_atomic() which will not
692+ * overwrite the special removed SPTE value. No bookkeeping is needed
693+ * here since the SPTE is going from non-present to non-present. Use
694+ * the raw write helper to avoid an unnecessary check on volatile bits.
676695 */
677− kvm_tdp_mmu_write_spte(iter->sptep, 0);
696+ __kvm_tdp_mmu_write_spte(iter->sptep, 0);
678697
679698 return 0;
680699 }
@@ -699,10 +718,13 @@ static inline int tdp_mmu_zap_spte_atomic(struct kvm *kvm, · 18 unmodified lines
699718 * unless performing certain dirty logging operations.
700719 * Leaving record_dirty_log unset in that case prevents page
701720 * writes from being double counted.
721+ *
722+ * Returns the old SPTE value, which _may_ be different than @old_spte if the
723+ * SPTE had voldatile bits.
702724 */
703−static void __tdp_mmu_set_spte(struct kvm *kvm, int as_id, tdp_ptep_t sptep,
704− u64 old_spte, u64 new_spte, gfn_t gfn, int level,
705− bool record_acc_track, bool record_dirty_log)
725+static u64 __tdp_mmu_set_spte(struct kvm *kvm, int as_id, tdp_ptep_t sptep,
726+ u64 old_spte, u64 new_spte, gfn_t gfn, int level,
727+ bool record_acc_track, bool record_dirty_log)
706728 {
707729 lockdep_assert_held_write(&kvm->mmu_lock);
708730
@@ -715,7 +737,7 @@ static void __tdp_mmu_set_spte(struct kvm *kvm, int as_id, tdp_ptep_t sptep, · 6 unmodified lines
715737 */
716738 WARN_ON(is_removed_spte(old_spte) || is_removed_spte(new_spte));
717739
718− kvm_tdp_mmu_write_spte(sptep, new_spte);
740+ old_spte = kvm_tdp_mmu_write_spte(sptep, old_spte, new_spte, level);
719741
720742 __handle_changed_spte(kvm, as_id, gfn, old_spte, new_spte, level, false);
721743
@@ -724,6 +746,7 @@ static void __tdp_mmu_set_spte(struct kvm *kvm, int as_id, tdp_ptep_t sptep, · 2 unmodified lines
724746 if (record_dirty_log)
725747 handle_changed_spte_dirty_log(kvm, as_id, gfn, old_spte,
726748 new_spte, level);
749+ return old_spte;
727750 }
728751
729752 static inline void _tdp_mmu_set_spte(struct kvm *kvm, struct tdp_iter *iter,
@@ -732,9 +755,10 @@ static inline void _tdp_mmu_set_spte(struct kvm *kvm, struct tdp_iter *iter, · 2 unmodified lines
732755 {
733756 WARN_ON_ONCE(iter->yielded);
734757
735− __tdp_mmu_set_spte(kvm, iter->as_id, iter->sptep, iter->old_spte,
736− new_spte, iter->gfn, iter->level,
737− record_acc_track, record_dirty_log);
758+ iter->old_spte = __tdp_mmu_set_spte(kvm, iter->as_id, iter->sptep,
759+ iter->old_spte, new_spte,
760+ iter->gfn, iter->level,
761+ record_acc_track, record_dirty_log);
738762 }
739763
740764 static inline void tdp_mmu_set_spte(struct kvm *kvm, struct tdp_iter *iter,
@@ -815,14 +839,15 @@ static inline bool __must_check tdp_mmu_iter_cond_resched(struct kvm *kvm, · 74 unmodified lines
815839 return iter->yielded;
816840 }
817841
818−static inline gfn_t tdp_mmu_max_gfn_host(void)
842+static inline gfn_t tdp_mmu_max_gfn_exclusive(void)
819843 {
820844 /*
821− * Bound TDP MMU walks at host.MAXPHYADDR, guest accesses beyond that
822− * will hit a #PF(RSVD) and never hit an EPT Violation/Misconfig / #NPF,
823− * and so KVM will never install a SPTE for such addresses.
845+ * Bound TDP MMU walks at host.MAXPHYADDR. KVM disallows memslots with
846+ * a gpa range that would exceed the max gfn, and KVM does not create
847+ * MMIO SPTEs for "impossible" gfns, instead sending such accesses down
848+ * the slow emulation path every time.
824849 */
825− return 1ULL << (shadow_phys_bits - PAGE_SHIFT);
850+ return kvm_mmu_max_gfn() + 1;
826851 }
827852
828853 static void __tdp_mmu_zap_root(struct kvm *kvm, struct kvm_mmu_page *root,
@@ -830,7 +855,7 @@ static void __tdp_mmu_zap_root(struct kvm *kvm, struct kvm_mmu_page *root, · 1 unmodified line
830855 {
831856 struct tdp_iter iter;
832857
833− gfn_t end = tdp_mmu_max_gfn_host();
858+ gfn_t end = tdp_mmu_max_gfn_exclusive();
834859 gfn_t start = 0;
835860
836861 for_each_tdp_pte_min_level(iter, root, zap_level, start, end) {
@@ -923,7 +948,7 @@ static bool tdp_mmu_zap_leafs(struct kvm *kvm, struct kvm_mmu_page *root, · 86 unmodified lines
923948 {
924949 struct tdp_iter iter;
925950
926− end = min(end, tdp_mmu_max_gfn_host());
951+ end = min(end, tdp_mmu_max_gfn_exclusive());
927952
928953 lockdep_assert_held_write(&kvm->mmu_lock);
929954
arch/x86/kvm/svm/pmu.c+25−3
@@ -45,6 +45,22 @@ static struct kvm_event_hw_type_mapping amd_event_mapping[] = { · 44 unmodified lines
4545 [7] = { 0xd1, 0x00, PERF_COUNT_HW_STALLED_CYCLES_BACKEND },
4646 };
4747
48+/* duplicated from amd_f17h_perfmon_event_map. */
49+static struct kvm_event_hw_type_mapping amd_f17h_event_mapping[] = {
50+ [0] = { 0x76, 0x00, PERF_COUNT_HW_CPU_CYCLES },
51+ [1] = { 0xc0, 0x00, PERF_COUNT_HW_INSTRUCTIONS },
52+ [2] = { 0x60, 0xff, PERF_COUNT_HW_CACHE_REFERENCES },
53+ [3] = { 0x64, 0x09, PERF_COUNT_HW_CACHE_MISSES },
54+ [4] = { 0xc2, 0x00, PERF_COUNT_HW_BRANCH_INSTRUCTIONS },
55+ [5] = { 0xc3, 0x00, PERF_COUNT_HW_BRANCH_MISSES },
56+ [6] = { 0x87, 0x02, PERF_COUNT_HW_STALLED_CYCLES_FRONTEND },
57+ [7] = { 0x87, 0x01, PERF_COUNT_HW_STALLED_CYCLES_BACKEND },
58+};
59+
60+/* amd_pmc_perf_hw_id depends on these being the same size */
61+static_assert(ARRAY_SIZE(amd_event_mapping) ==
62+ ARRAY_SIZE(amd_f17h_event_mapping));
63+
4864 static unsigned int get_msr_base(struct kvm_pmu *pmu, enum pmu_type type)
4965 {
5066 struct kvm_vcpu *vcpu = pmu_to_vcpu(pmu);
@@ -140,6 +156,7 @@ static inline struct kvm_pmc *get_gp_pmc_amd(struct kvm_pmu *pmu, u32 msr, · 89 unmodified lines
140156
141157 static unsigned int amd_pmc_perf_hw_id(struct kvm_pmc *pmc)
142158 {
159+ struct kvm_event_hw_type_mapping *event_mapping;
143160 u8 event_select = pmc->eventsel & ARCH_PERFMON_EVENTSEL_EVENT;
144161 u8 unit_mask = (pmc->eventsel & ARCH_PERFMON_EVENTSEL_UMASK) >> 8;
145162 int i;
@@ -148,15 +165,20 @@ static unsigned int amd_pmc_perf_hw_id(struct kvm_pmc *pmc) · 2 unmodified lines
148165 if (WARN_ON(pmc_is_fixed(pmc)))
149166 return PERF_COUNT_HW_MAX;
150167
168+ if (guest_cpuid_family(pmc->vcpu) >= 0x17)
169+ event_mapping = amd_f17h_event_mapping;
170+ else
171+ event_mapping = amd_event_mapping;
172+
151173 for (i = 0; i < ARRAY_SIZE(amd_event_mapping); i++)
152− if (amd_event_mapping[i].eventsel == event_select
153− && amd_event_mapping[i].unit_mask == unit_mask)
174+ if (event_mapping[i].eventsel == event_select
175+ && event_mapping[i].unit_mask == unit_mask)
154176 break;
155177
156178 if (i == ARRAY_SIZE(amd_event_mapping))
157179 return PERF_COUNT_HW_MAX;
158180
159− return amd_event_mapping[i].event_type;
181+ return event_mapping[i].event_type;
160182 }
161183
162184 /* check if a PMC is enabled by comparing it against global_ctrl bits. Because
arch/x86/kvm/svm/sev.c+38−4
@@ -1594,24 +1594,51 @@ static void sev_unlock_two_vms(struct kvm *dst_kvm, struct kvm *src_kvm) · 1593 unmodified lines
15941594 atomic_set_release(&src_sev->migration_in_progress, 0);
15951595 }
15961596
1597+/* vCPU mutex subclasses. */
1598+enum sev_migration_role {
1599+ SEV_MIGRATION_SOURCE = 0,
1600+ SEV_MIGRATION_TARGET,
1601+ SEV_NR_MIGRATION_ROLES,
1602+};
15971603
1598−static int sev_lock_vcpus_for_migration(struct kvm *kvm)
1604+static int sev_lock_vcpus_for_migration(struct kvm *kvm,
1605+ enum sev_migration_role role)
15991606 {
16001607 struct kvm_vcpu *vcpu;
16011608 unsigned long i, j;
1609+ bool first = true;
16021610
16031611 kvm_for_each_vcpu(i, vcpu, kvm) {
1604− if (mutex_lock_killable(&vcpu->mutex))
1612+ if (mutex_lock_killable_nested(&vcpu->mutex, role))
16051613 goto out_unlock;
1614+
1615+ if (first) {
1616+ /*
1617+ * Reset the role to one that avoids colliding with
1618+ * the role used for the first vcpu mutex.
1619+ */
1620+ role = SEV_NR_MIGRATION_ROLES;
1621+ first = false;
1622+ } else {
1623+ mutex_release(&vcpu->mutex.dep_map, _THIS_IP_);
1624+ }
16061625 }
16071626
16081627 return 0;
16091628
16101629 out_unlock:
1630+
1631+ first = true;
16111632 kvm_for_each_vcpu(j, vcpu, kvm) {
16121633 if (i == j)
16131634 break;
16141635
1636+ if (first)
1637+ first = false;
1638+ else
1639+ mutex_acquire(&vcpu->mutex.dep_map, role, 0, _THIS_IP_);
1640+
1641+
16151642 mutex_unlock(&vcpu->mutex);
16161643 }
16171644 return -EINTR;
@@ -1621,8 +1648,15 @@ static void sev_unlock_vcpus_for_migration(struct kvm *kvm) · 3 unmodified lines
16211648 {
16221649 struct kvm_vcpu *vcpu;
16231650 unsigned long i;
1651+ bool first = true;
16241652
16251653 kvm_for_each_vcpu(i, vcpu, kvm) {
1654+ if (first)
1655+ first = false;
1656+ else
1657+ mutex_acquire(&vcpu->mutex.dep_map,
1658+ SEV_NR_MIGRATION_ROLES, 0, _THIS_IP_);
1659+
16261660 mutex_unlock(&vcpu->mutex);
16271661 }
16281662 }
@@ -1748,10 +1782,10 @@ int sev_vm_move_enc_context_from(struct kvm *kvm, unsigned int source_fd) · 119 unmodified lines
17481782 charged = true;
17491783 }
17501784
1751− ret = sev_lock_vcpus_for_migration(kvm);
1785+ ret = sev_lock_vcpus_for_migration(kvm, SEV_MIGRATION_SOURCE);
17521786 if (ret)
17531787 goto out_dst_cgroup;
1754− ret = sev_lock_vcpus_for_migration(source_kvm);
1788+ ret = sev_lock_vcpus_for_migration(source_kvm, SEV_MIGRATION_TARGET);
17551789 if (ret)
17561790 goto out_dst_vcpu;
17571791
arch/x86/kvm/vmx/vmx.c+1−1
@@ -5472,7 +5472,7 @@ static bool vmx_emulation_required_with_pending_exception(struct kvm_vcpu *vcpu) · 5471 unmodified lines
54725472 struct vcpu_vmx *vmx = to_vmx(vcpu);
54735473
54745474 return vmx->emulation_required && !vmx->rmode.vm86_active &&
5475− vcpu->arch.exception.pending;
5475+ (vcpu->arch.exception.pending || vcpu->arch.exception.injected);
54765476 }
54775477
54785478 static int handle_invalid_guest_state(struct kvm_vcpu *vcpu)
arch/x86/kvm/x86.c+7−1
@@ -10020,12 +10020,14 @@ static int vcpu_enter_guest(struct kvm_vcpu *vcpu) · 10019 unmodified lines
1002010020 if (kvm_check_request(KVM_REQ_HV_CRASH, vcpu)) {
1002110021 vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
1002210022 vcpu->run->system_event.type = KVM_SYSTEM_EVENT_CRASH;
10023+ vcpu->run->system_event.ndata = 0;
1002310024 r = 0;
1002410025 goto out;
1002510026 }
1002610027 if (kvm_check_request(KVM_REQ_HV_RESET, vcpu)) {
1002710028 vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
1002810029 vcpu->run->system_event.type = KVM_SYSTEM_EVENT_RESET;
10030+ vcpu->run->system_event.ndata = 0;
1002910031 r = 0;
1003010032 goto out;
1003110033 }
@@ -12009,8 +12011,12 @@ int kvm_arch_prepare_memory_region(struct kvm *kvm, · 1977 unmodified lines
1200912011 struct kvm_memory_slot *new,
1201012012 enum kvm_mr_change change)
1201112013 {
12012− if (change == KVM_MR_CREATE || change == KVM_MR_MOVE)
12014+ if (change == KVM_MR_CREATE || change == KVM_MR_MOVE) {
12015+ if ((new->base_gfn + new->npages - 1) > kvm_mmu_max_gfn())
12016+ return -EINVAL;
12017+
1201312018 return kvm_alloc_memslot_metadata(kvm, new);
12019+ }
1201412020
1201512021 if (change == KVM_MR_FLAGS_ONLY)
1201612022 memcpy(&new->arch, &old->arch, sizeof(old->arch));
arch/x86/lib/copy_user_64.S+52−35
@@ -53,12 +53,12 @@ · 52 unmodified lines
5353 SYM_FUNC_START(copy_user_generic_unrolled)
5454 ASM_STAC
5555 cmpl $8,%edx
56− jb 20f /* less then 8 bytes, go to byte copy loop */
56+ jb .Lcopy_user_short_string_bytes
5757 ALIGN_DESTINATION
5858 movl %edx,%ecx
5959 andl $63,%edx
6060 shrl $6,%ecx
61− jz .L_copy_short_string
61+ jz copy_user_short_string
6262 1: movq (%rsi),%r8
6363 2: movq 1*8(%rsi),%r9
6464 3: movq 2*8(%rsi),%r10
@@ -79,37 +79,11 @@ SYM_FUNC_START(copy_user_generic_unrolled) · 14 unmodified lines
7979 leaq 64(%rdi),%rdi
8080 decl %ecx
8181 jnz 1b
82−.L_copy_short_string:
83− movl %edx,%ecx
84− andl $7,%edx
85− shrl $3,%ecx
86− jz 20f
87−18: movq (%rsi),%r8
88−19: movq %r8,(%rdi)
89− leaq 8(%rsi),%rsi
90− leaq 8(%rdi),%rdi
91− decl %ecx
92− jnz 18b
93−20: andl %edx,%edx
94− jz 23f
95− movl %edx,%ecx
96−21: movb (%rsi),%al
97−22: movb %al,(%rdi)
98− incq %rsi
99− incq %rdi
100− decl %ecx
101− jnz 21b
102−23: xor %eax,%eax
103− ASM_CLAC
104− RET
82+ jmp copy_user_short_string
10583
10684 30: shll $6,%ecx
10785 addl %ecx,%edx
108− jmp 60f
109−40: leal (%rdx,%rcx,8),%edx
110− jmp 60f
111−50: movl %ecx,%edx
112−60: jmp .Lcopy_user_handle_tail /* ecx is zerorest also */
86+ jmp .Lcopy_user_handle_tail
11387
11488 _ASM_EXTABLE_CPY(1b, 30b)
11589 _ASM_EXTABLE_CPY(2b, 30b)
@@ -127,10 +101,6 @@ SYM_FUNC_START(copy_user_generic_unrolled) · 11 unmodified lines
127101 _ASM_EXTABLE_CPY(14b, 30b)
128102 _ASM_EXTABLE_CPY(15b, 30b)
129103 _ASM_EXTABLE_CPY(16b, 30b)
130− _ASM_EXTABLE_CPY(18b, 40b)
131− _ASM_EXTABLE_CPY(19b, 40b)
132− _ASM_EXTABLE_CPY(21b, 50b)
133− _ASM_EXTABLE_CPY(22b, 50b)
134104 SYM_FUNC_END(copy_user_generic_unrolled)
135105 EXPORT_SYMBOL(copy_user_generic_unrolled)
136106
@@ -191,7 +161,7 @@ EXPORT_SYMBOL(copy_user_generic_string) · 54 unmodified lines
191161 SYM_FUNC_START(copy_user_enhanced_fast_string)
192162 ASM_STAC
193163 /* CPUs without FSRM should avoid rep movsb for short copies */
194− ALTERNATIVE "cmpl $64, %edx; jb .L_copy_short_string", "", X86_FEATURE_FSRM
164+ ALTERNATIVE "cmpl $64, %edx; jb copy_user_short_string", "", X86_FEATURE_FSRM
195165 movl %edx,%ecx
196166 1: rep movsb
197167 xorl %eax,%eax
@@ -243,6 +213,53 @@ SYM_CODE_START_LOCAL(.Lcopy_user_handle_tail) · 45 unmodified lines
243213
244214 SYM_CODE_END(.Lcopy_user_handle_tail)
245215
216+/*
217+ * Finish memcpy of less than 64 bytes. #AC should already be set.
218+ *
219+ * Input:
220+ * rdi destination
221+ * rsi source
222+ * rdx count (< 64)
223+ *
224+ * Output:
225+ * eax uncopied bytes or 0 if successful.
226+ */
227+SYM_CODE_START_LOCAL(copy_user_short_string)
228+ movl %edx,%ecx
229+ andl $7,%edx
230+ shrl $3,%ecx
231+ jz .Lcopy_user_short_string_bytes
232+18: movq (%rsi),%r8
233+19: movq %r8,(%rdi)
234+ leaq 8(%rsi),%rsi
235+ leaq 8(%rdi),%rdi
236+ decl %ecx
237+ jnz 18b
238+.Lcopy_user_short_string_bytes:
239+ andl %edx,%edx
240+ jz 23f
241+ movl %edx,%ecx
242+21: movb (%rsi),%al
243+22: movb %al,(%rdi)
244+ incq %rsi
245+ incq %rdi
246+ decl %ecx
247+ jnz 21b
248+23: xor %eax,%eax
249+ ASM_CLAC
250+ RET
251+
252+40: leal (%rdx,%rcx,8),%edx
253+ jmp 60f
254+50: movl %ecx,%edx /* ecx is zerorest also */
255+60: jmp .Lcopy_user_handle_tail
256+
257+ _ASM_EXTABLE_CPY(18b, 40b)
258+ _ASM_EXTABLE_CPY(19b, 40b)
259+ _ASM_EXTABLE_CPY(21b, 50b)
260+ _ASM_EXTABLE_CPY(22b, 50b)
261+SYM_CODE_END(copy_user_short_string)
262+
246263 /*
247264 * copy_user_nocache - Uncached memory copy with exception handling
248265 * This will force destination out of cache for more performance.
arch/x86/lib/putuser.S+4−0
@@ -48,6 +48,7 @@ SYM_FUNC_START(__put_user_1) · 47 unmodified lines
4848 cmp %_ASM_BX,%_ASM_CX
4949 jae .Lbad_put_user
5050 SYM_INNER_LABEL(__put_user_nocheck_1, SYM_L_GLOBAL)
51+ ENDBR
5152 ASM_STAC
5253 1: movb %al,(%_ASM_CX)
5354 xor %ecx,%ecx
@@ -62,6 +63,7 @@ SYM_FUNC_START(__put_user_2) · 8 unmodified lines
6263 cmp %_ASM_BX,%_ASM_CX
6364 jae .Lbad_put_user
6465 SYM_INNER_LABEL(__put_user_nocheck_2, SYM_L_GLOBAL)
66+ ENDBR
6567 ASM_STAC
6668 2: movw %ax,(%_ASM_CX)
6769 xor %ecx,%ecx
@@ -76,6 +78,7 @@ SYM_FUNC_START(__put_user_4) · 8 unmodified lines
7678 cmp %_ASM_BX,%_ASM_CX
7779 jae .Lbad_put_user
7880 SYM_INNER_LABEL(__put_user_nocheck_4, SYM_L_GLOBAL)
81+ ENDBR
7982 ASM_STAC
8083 3: movl %eax,(%_ASM_CX)
8184 xor %ecx,%ecx
@@ -90,6 +93,7 @@ SYM_FUNC_START(__put_user_8) · 8 unmodified lines
9093 cmp %_ASM_BX,%_ASM_CX
9194 jae .Lbad_put_user
9295 SYM_INNER_LABEL(__put_user_nocheck_8, SYM_L_GLOBAL)
96+ ENDBR
9397 ASM_STAC
9498 4: mov %_ASM_AX,(%_ASM_CX)
9599 #ifdef CONFIG_X86_32
arch/x86/lib/retpoline.S+1−1
@@ -31,6 +31,7 @@ · 30 unmodified lines
3131 .align RETPOLINE_THUNK_SIZE
3232 SYM_INNER_LABEL(__x86_indirect_thunk_\reg, SYM_L_GLOBAL)
3333 UNWIND_HINT_EMPTY
34+ ANNOTATE_NOENDBR
3435
3536 ALTERNATIVE_2 __stringify(ANNOTATE_RETPOLINE_SAFE; jmp *%\reg), \
3637 __stringify(RETPOLINE \reg), X86_FEATURE_RETPOLINE, \
@@ -55,7 +56,6 @@ SYM_INNER_LABEL(__x86_indirect_thunk_\reg, SYM_L_GLOBAL) · 18 unmodified lines
5556
5657 .align RETPOLINE_THUNK_SIZE
5758 SYM_CODE_START(__x86_indirect_thunk_array)
58− ANNOTATE_NOENDBR // apply_retpolines
5959
6060 #define GEN(reg) THUNK reg
6161 #include <asm/GEN-for-each-reg.h>
arch/x86/mm/init_64.c+3−2
@@ -902,6 +902,8 @@ static void __meminit vmemmap_use_sub_pmd(unsigned long start, unsigned long end · 901 unmodified lines
902902
903903 static void __meminit vmemmap_use_new_sub_pmd(unsigned long start, unsigned long end)
904904 {
905+ const unsigned long page = ALIGN_DOWN(start, PMD_SIZE);
906+
905907 vmemmap_flush_unused_pmd();
906908
907909 /*
@@ -914,8 +916,7 @@ static void __meminit vmemmap_use_new_sub_pmd(unsigned long start, unsigned long · 6 unmodified lines
914916 * Mark with PAGE_UNUSED the unused parts of the new memmap range
915917 */
916918 if (!IS_ALIGNED(start, PMD_SIZE))
917− memset((void *)start, PAGE_UNUSED,
918− start - ALIGN_DOWN(start, PMD_SIZE));
919+ memset((void *)page, PAGE_UNUSED, start - page);
919920
920921 /*
921922 * We want to avoid memset(PAGE_UNUSED) when populating the vmemmap of
arch/x86/mm/pat/set_memory.c+0−11
@@ -638,17 +638,6 @@ pte_t *lookup_address(unsigned long address, unsigned int *level) · 637 unmodified lines
638638 }
639639 EXPORT_SYMBOL_GPL(lookup_address);
640640
641−/*
642− * Lookup the page table entry for a virtual address in a given mm. Return a
643− * pointer to the entry and the level of the mapping.
644− */
645−pte_t *lookup_address_in_mm(struct mm_struct *mm, unsigned long address,
646− unsigned int *level)
647−{
648− return lookup_address_in_pgd(pgd_offset(mm, address), address, level);
649−}
650−EXPORT_SYMBOL_GPL(lookup_address_in_mm);
651−
652641 static pte_t *_lookup_address_cpa(struct cpa_data *cpa, unsigned long address,
653642 unsigned int *level)
654643 {
arch/x86/pci/xen.c+5−1
@@ -467,7 +467,6 @@ static __init void xen_setup_pci_msi(void) · 466 unmodified lines
467467 else
468468 xen_msi_ops.setup_msi_irqs = xen_setup_msi_irqs;
469469 xen_msi_ops.teardown_msi_irqs = xen_pv_teardown_msi_irqs;
470− pci_msi_ignore_mask = 1;
471470 } else if (xen_hvm_domain()) {
472471 xen_msi_ops.setup_msi_irqs = xen_hvm_setup_msi_irqs;
473472 xen_msi_ops.teardown_msi_irqs = xen_teardown_msi_irqs;
@@ -481,6 +480,11 @@ static __init void xen_setup_pci_msi(void) · 7 unmodified lines
481480 * in allocating the native domain and never use it.
482481 */
483482 x86_init.irqs.create_pci_msi_domain = xen_create_pci_msi_domain;
483+ /*
484+ * With XEN PIRQ/Eventchannels in use PCI/MSI[-X] masking is solely
485+ * controlled by the hypervisor.
486+ */
487+ pci_msi_ignore_mask = 1;
484488 }
485489
486490 #else /* CONFIG_PCI_MSI */
arch/x86/platform/pvh/head.S+1−0
@@ -50,6 +50,7 @@ · 49 unmodified lines
5050 #define PVH_DS_SEL (PVH_GDT_ENTRY_DS * 8)
5151
5252 SYM_CODE_START_LOCAL(pvh_start_xen)
53+ UNWIND_HINT_EMPTY
5354 cld
5455
5556 lgdt (_pa(gdt))
arch/x86/power/cpu.c+9−1
@@ -25,6 +25,7 @@ · 24 unmodified lines
2525 #include <asm/cpu.h>
2626 #include <asm/mmu_context.h>
2727 #include <asm/cpu_device_id.h>
28+#include <asm/microcode.h>
2829
2930 #ifdef CONFIG_X86_32
3031 __visible unsigned long saved_context_ebx;
@@ -262,11 +263,18 @@ static void notrace __restore_processor_state(struct saved_context *ctxt) · 231 unmodified lines
262263 x86_platform.restore_sched_clock_state();
263264 mtrr_bp_restore();
264265 perf_restore_debug_store();
265− msr_restore_context(ctxt);
266266
267267 c = &cpu_data(smp_processor_id());
268268 if (cpu_has(c, X86_FEATURE_MSR_IA32_FEAT_CTL))
269269 init_ia32_feat_ctl(c);
270+
271+ microcode_bsp_resume();
272+
273+ /*
274+ * This needs to happen after the microcode has been updated upon resume
275+ * because some of the MSRs are "emulated" in microcode.
276+ */
277+ msr_restore_context(ctxt);
270278 }
271279
272280 /* Needed by apm.c */
arch/x86/xen/xen-head.S+1−0
@@ -45,6 +45,7 @@ SYM_CODE_END(hypercall_page) · 44 unmodified lines
4545 __INIT
4646 SYM_CODE_START(startup_xen)
4747 UNWIND_HINT_EMPTY
48+ ANNOTATE_NOENDBR
4849 cld
4950
5051 /* Clear .bss */
block/bfq-iosched.c+9−3
@@ -569,7 +569,7 @@ static bool bfqq_request_over_limit(struct bfq_queue *bfqq, int limit) · 568 unmodified lines
569569 struct bfq_entity *entity = &bfqq->entity;
570570 struct bfq_entity *inline_entities[BFQ_LIMIT_INLINE_DEPTH];
571571 struct bfq_entity **entities = inline_entities;
572− int depth, level;
572+ int depth, level, alloc_depth = BFQ_LIMIT_INLINE_DEPTH;
573573 int class_idx = bfqq->ioprio_class - 1;
574574 struct bfq_sched_data *sched_data;
575575 unsigned long wsum;
@@ -578,15 +578,21 @@ static bool bfqq_request_over_limit(struct bfq_queue *bfqq, int limit) · 2 unmodified lines
578578 if (!entity->on_st_or_in_serv)
579579 return false;
580580
581+retry:
582+ spin_lock_irq(&bfqd->lock);
581583 /* +1 for bfqq entity, root cgroup not included */
582584 depth = bfqg_to_blkg(bfqq_group(bfqq))->blkcg->css.cgroup->level + 1;
583− if (depth > BFQ_LIMIT_INLINE_DEPTH) {
585+ if (depth > alloc_depth) {
586+ spin_unlock_irq(&bfqd->lock);
587+ if (entities != inline_entities)
588+ kfree(entities);
584589 entities = kmalloc_array(depth, sizeof(*entities), GFP_NOIO);
585590 if (!entities)
586591 return false;
592+ alloc_depth = depth;
593+ goto retry;
587594 }
588595
589− spin_lock_irq(&bfqd->lock);
590596 sched_data = entity->sched_data;
591597 /* Gather our ancestors as we need to traverse them in reverse order */
592598 level = 0;
block/blk-core.c+0−4
@@ -50,7 +50,6 @@ · 49 unmodified lines
5050 #include "blk-pm.h"
5151 #include "blk-cgroup.h"
5252 #include "blk-throttle.h"
53−#include "blk-rq-qos.h"
5453
5554 struct dentry *blk_debugfs_root;
5655
@@ -315,9 +314,6 @@ void blk_cleanup_queue(struct request_queue *q) · 258 unmodified lines
315314 */
316315 blk_freeze_queue(q);
317316
318− /* cleanup rq qos structures for queue without disk */
319− rq_qos_exit(q);
320−
321317 blk_queue_flag_set(QUEUE_FLAG_DEAD, q);
322318
323319 blk_sync_queue(q);
block/blk-iocost.c+11−1
@@ -2322,7 +2322,17 @@ static void ioc_timer_fn(struct timer_list *timer) · 2321 unmodified lines
23222322 iocg->hweight_donating = hwa;
23232323 iocg->hweight_after_donation = new_hwi;
23242324 list_add(&iocg->surplus_list, &surpluses);
2325− } else {
2325+ } else if (!iocg->abs_vdebt) {
2326+ /*
2327+ * @iocg doesn't have enough to donate. Reset
2328+ * its inuse to active.
2329+ *
2330+ * Don't reset debtors as their inuse's are
2331+ * owned by debt handling. This shouldn't affect
2332+ * donation calculuation in any meaningful way
2333+ * as @iocg doesn't have a meaningful amount of
2334+ * share anyway.
2335+ */
23262336 TRACE_IOCG_PATH(inuse_shortage, iocg, &now,
23272337 iocg->inuse, iocg->active,
23282338 iocg->hweight_inuse, new_hwi);
block/blk-mq.c+1−8
@@ -1131,14 +1131,7 @@ void blk_mq_start_request(struct request *rq) · 1130 unmodified lines
11311131 trace_block_rq_issue(rq);
11321132
11331133 if (test_bit(QUEUE_FLAG_STATS, &q->queue_flags)) {
1134− u64 start_time;
1135−#ifdef CONFIG_BLK_CGROUP
1136− if (rq->bio)
1137− start_time = bio_issue_time(&rq->bio->bi_issue);
1138− else
1139−#endif
1140− start_time = ktime_get_ns();
1141− rq->io_start_time_ns = start_time;
1134+ rq->io_start_time_ns = ktime_get_ns();
11421135 rq->stats_sectors = blk_rq_sectors(rq);
11431136 rq->rq_flags |= RQF_STATS;
11441137 rq_qos_issue(q, rq);
drivers/acpi/processor_idle.c+2−6
@@ -96,11 +96,6 @@ static const struct dmi_system_id processor_power_dmi_table[] = { · 95 unmodified lines
9696 DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK Computer Inc."),
9797 DMI_MATCH(DMI_PRODUCT_NAME,"L8400B series Notebook PC")},
9898 (void *)1},
99− /* T40 can not handle C3 idle state */
100− { set_max_cstate, "IBM ThinkPad T40", {
101− DMI_MATCH(DMI_SYS_VENDOR, "IBM"),
102− DMI_MATCH(DMI_PRODUCT_NAME, "23737CU")},
103− (void *)2},
10499 {},
105100 };
106101
@@ -795,7 +790,8 @@ static int acpi_processor_setup_cstates(struct acpi_processor *pr) · 688 unmodified lines
795790 if (cx->type == ACPI_STATE_C1 || cx->type == ACPI_STATE_C2 ||
796791 cx->type == ACPI_STATE_C3) {
797792 state->enter_dead = acpi_idle_play_dead;
798− drv->safe_state_index = count;
793+ if (cx->type != ACPI_STATE_C3)
794+ drv->safe_state_index = count;
799795 }
800796 /*
801797 * Halt-induced C1 is not good for ->enter_s2idle, because it
drivers/amba/bus.c+36−1
@@ -20,6 +20,10 @@ · 19 unmodified lines
2020 #include <linux/platform_device.h>
2121 #include <linux/reset.h>
2222 #include <linux/of_irq.h>
23+#include <linux/of_device.h>
24+#include <linux/acpi.h>
25+#include <linux/iommu.h>
26+#include <linux/dma-map-ops.h>
2327
2428 #define to_amba_driver(d) container_of(d, struct amba_driver, drv)
2529
@@ -273,6 +277,36 @@ static void amba_shutdown(struct device *dev) · 247 unmodified lines
273277 drv->shutdown(to_amba_device(dev));
274278 }
275279
280+static int amba_dma_configure(struct device *dev)
281+{
282+ struct amba_driver *drv = to_amba_driver(dev->driver);
283+ enum dev_dma_attr attr;
284+ int ret = 0;
285+
286+ if (dev->of_node) {
287+ ret = of_dma_configure(dev, dev->of_node, true);
288+ } else if (has_acpi_companion(dev)) {
289+ attr = acpi_get_dma_attr(to_acpi_device_node(dev->fwnode));
290+ ret = acpi_dma_configure(dev, attr);
291+ }
292+
293+ if (!ret && !drv->driver_managed_dma) {
294+ ret = iommu_device_use_default_domain(dev);
295+ if (ret)
296+ arch_teardown_dma_ops(dev);
297+ }
298+
299+ return ret;
300+}
301+
302+static void amba_dma_cleanup(struct device *dev)
303+{
304+ struct amba_driver *drv = to_amba_driver(dev->driver);
305+
306+ if (!drv->driver_managed_dma)
307+ iommu_device_unuse_default_domain(dev);
308+}
309+
276310 #ifdef CONFIG_PM
277311 /*
278312 * Hooks to provide runtime PM of the pclk (bus clock). It is safe to
@@ -341,7 +375,8 @@ struct bus_type amba_bustype = { · 62 unmodified lines
341375 .probe = amba_probe,
342376 .remove = amba_remove,
343377 .shutdown = amba_shutdown,
344− .dma_configure = platform_dma_configure,
378+ .dma_configure = amba_dma_configure,
379+ .dma_cleanup = amba_dma_cleanup,
345380 .pm = &amba_pm,
346381 };
347382 EXPORT_SYMBOL_GPL(amba_bustype);
drivers/android/binder.c+9−1
@@ -2295,6 +2295,7 @@ static int binder_do_deferred_txn_copies(struct binder_alloc *alloc, · 2294 unmodified lines
22952295 {
22962296 int ret = 0;
22972297 struct binder_sg_copy *sgc, *tmpsgc;
2298+ struct binder_ptr_fixup *tmppf;
22982299 struct binder_ptr_fixup *pf =
22992300 list_first_entry_or_null(pf_head, struct binder_ptr_fixup,
23002301 node);
@@ -2349,7 +2350,11 @@ static int binder_do_deferred_txn_copies(struct binder_alloc *alloc, · 48 unmodified lines
23492350 list_del(&sgc->node);
23502351 kfree(sgc);
23512352 }
2352− BUG_ON(!list_empty(pf_head));
2353+ list_for_each_entry_safe(pf, tmppf, pf_head, node) {
2354+ BUG_ON(pf->skip_size == 0);
2355+ list_del(&pf->node);
2356+ kfree(pf);
2357+ }
23532358 BUG_ON(!list_empty(sgc_head));
23542359
23552360 return ret > 0 ? -EINVAL : ret;
@@ -2486,6 +2491,9 @@ static int binder_translate_fd_array(struct list_head *pf_head, · 130 unmodified lines
24862491 struct binder_proc *proc = thread->proc;
24872492 int ret;
24882493
2494+ if (fda->num_fds == 0)
2495+ return 0;
2496+
24892497 fd_buf_size = sizeof(u32) * fda->num_fds;
24902498 if (fda->num_fds >= SIZE_MAX / sizeof(u32)) {
24912499 binder_user_error("%d:%d got transaction with invalid number of fds (%lld)\n",
drivers/base/arch_topology.c+10−1
@@ -667,6 +667,15 @@ const struct cpumask *cpu_coregroup_mask(int cpu) · 666 unmodified lines
667667 core_mask = &cpu_topology[cpu].llc_sibling;
668668 }
669669
670+ /*
671+ * For systems with no shared cpu-side LLC but with clusters defined,
672+ * extend core_mask to cluster_siblings. The sched domain builder will
673+ * then remove MC as redundant with CLS if SCHED_CLUSTER is enabled.
674+ */
675+ if (IS_ENABLED(CONFIG_SCHED_CLUSTER) &&
676+ cpumask_subset(core_mask, &cpu_topology[cpu].cluster_sibling))
677+ core_mask = &cpu_topology[cpu].cluster_sibling;
678+
670679 return core_mask;
671680 }
672681
@@ -684,7 +693,7 @@ void update_siblings_masks(unsigned int cpuid) · 11 unmodified lines
684693 for_each_online_cpu(cpu) {
685694 cpu_topo = &cpu_topology[cpu];
686695
687− if (cpuid_topo->llc_id == cpu_topo->llc_id) {
696+ if (cpu_topo->llc_id != -1 && cpuid_topo->llc_id == cpu_topo->llc_id) {
688697 cpumask_set_cpu(cpu, &cpuid_topo->llc_sibling);
689698 cpumask_set_cpu(cpuid, &cpu_topo->llc_sibling);
690699 }
drivers/base/dd.c+5−0
@@ -671,6 +671,8 @@ sysfs_failed: · 670 unmodified lines
671671 if (dev->bus)
672672 blocking_notifier_call_chain(&dev->bus->p->bus_notifier,
673673 BUS_NOTIFY_DRIVER_NOT_BOUND, dev);
674+ if (dev->bus && dev->bus->dma_cleanup)
675+ dev->bus->dma_cleanup(dev);
674676 pinctrl_bind_failed:
675677 device_links_no_driver(dev);
676678 device_unbind_cleanup(dev);
@@ -1199,6 +1201,9 @@ static void __device_release_driver(struct device *dev, struct device *parent) · 522 unmodified lines
11991201
12001202 device_remove(dev);
12011203
1204+ if (dev->bus && dev->bus->dma_cleanup)
1205+ dev->bus->dma_cleanup(dev);
1206+
12021207 device_links_driver_cleanup(dev);
12031208 device_unbind_cleanup(dev);
12041209
drivers/base/firmware_loader/main.c+17−0
@@ -735,6 +735,8 @@ _request_firmware(const struct firmware **firmware_p, const char *name, · 734 unmodified lines
735735 size_t offset, u32 opt_flags)
736736 {
737737 struct firmware *fw = NULL;
738+ struct cred *kern_cred = NULL;
739+ const struct cred *old_cred;
738740 bool nondirect = false;
739741 int ret;
740742
@@ -751,6 +753,18 @@ _request_firmware(const struct firmware **firmware_p, const char *name, · 10 unmodified lines
751753 if (ret <= 0) /* error or already assigned */
752754 goto out;
753755
756+ /*
757+ * We are about to try to access the firmware file. Because we may have been
758+ * called by a driver when serving an unrelated request from userland, we use
759+ * the kernel credentials to read the file.
760+ */
761+ kern_cred = prepare_kernel_cred(NULL);
762+ if (!kern_cred) {
763+ ret = -ENOMEM;
764+ goto out;
765+ }
766+ old_cred = override_creds(kern_cred);
767+
754768 ret = fw_get_filesystem_firmware(device, fw->priv, "", NULL);
755769
756770 /* Only full reads can support decompression, platform, and sysfs. */
@@ -776,6 +790,9 @@ _request_firmware(const struct firmware **firmware_p, const char *name, · 19 unmodified lines
776790 } else
777791 ret = assign_fw(fw, device);
778792
793+ revert_creds(old_cred);
794+ put_cred(kern_cred);
795+
779796 out:
780797 if (ret < 0) {
781798 fw_abort_batch_reqs(fw);
drivers/base/platform.c+19−2
@@ -30,6 +30,8 @@ · 29 unmodified lines
3030 #include <linux/property.h>
3131 #include <linux/kmemleak.h>
3232 #include <linux/types.h>
33+#include <linux/iommu.h>
34+#include <linux/dma-map-ops.h>
3335
3436 #include "base.h"
3537 #include "power/power.h"
@@ -1454,9 +1456,9 @@ static void platform_shutdown(struct device *_dev) · 1418 unmodified lines
14541456 drv->shutdown(dev);
14551457 }
14561458
1457−
1458−int platform_dma_configure(struct device *dev)
1459+static int platform_dma_configure(struct device *dev)
14591460 {
1461+ struct platform_driver *drv = to_platform_driver(dev->driver);
14601462 enum dev_dma_attr attr;
14611463 int ret = 0;
14621464
@@ -1467,9 +1469,23 @@ int platform_dma_configure(struct device *dev) · 4 unmodified lines
14671469 ret = acpi_dma_configure(dev, attr);
14681470 }
14691471
1472+ if (!ret && !drv->driver_managed_dma) {
1473+ ret = iommu_device_use_default_domain(dev);
1474+ if (ret)
1475+ arch_teardown_dma_ops(dev);
1476+ }
1477+
14701478 return ret;
14711479 }
14721480
1481+static void platform_dma_cleanup(struct device *dev)
1482+{
1483+ struct platform_driver *drv = to_platform_driver(dev->driver);
1484+
1485+ if (!drv->driver_managed_dma)
1486+ iommu_device_unuse_default_domain(dev);
1487+}
1488+
14731489 static const struct dev_pm_ops platform_dev_pm_ops = {
14741490 SET_RUNTIME_PM_OPS(pm_generic_runtime_suspend, pm_generic_runtime_resume, NULL)
14751491 USE_PLATFORM_PM_SLEEP_OPS
@@ -1484,6 +1500,7 @@ struct bus_type platform_bus_type = { · 8 unmodified lines
14841500 .remove = platform_remove,
14851501 .shutdown = platform_shutdown,
14861502 .dma_configure = platform_dma_configure,
1503+ .dma_cleanup = platform_dma_cleanup,
14871504 .pm = &platform_dev_pm_ops,
14881505 };
14891506 EXPORT_SYMBOL_GPL(platform_bus_type);
drivers/base/topology.c+10−0
@@ -152,9 +152,19 @@ static struct attribute *default_attrs[] = { · 151 unmodified lines
152152 NULL
153153 };
154154
155+static umode_t topology_is_visible(struct kobject *kobj,
156+ struct attribute *attr, int unused)
157+{
158+ if (attr == &dev_attr_ppin.attr && !topology_ppin(kobj_to_dev(kobj)->id))
159+ return 0;
160+
161+ return attr->mode;
162+}
163+
155164 static const struct attribute_group topology_attr_group = {
156165 .attrs = default_attrs,
157166 .bin_attrs = bin_attrs,
167+ .is_visible = topology_is_visible,
158168 .name = "topology"
159169 };
160170
drivers/block/Kconfig+16−0
@@ -33,6 +33,22 @@ config BLK_DEV_FD · 32 unmodified lines
3333 To compile this driver as a module, choose M here: the
3434 module will be called floppy.
3535
36+config BLK_DEV_FD_RAWCMD
37+ bool "Support for raw floppy disk commands (DEPRECATED)"
38+ depends on BLK_DEV_FD
39+ help
40+ If you want to use actual physical floppies and expect to do
41+ special low-level hardware accesses to them (access and use
42+ non-standard formats, for example), then enable this.
43+
44+ Note that the code enabled by this option is rarely used and
45+ might be unstable or insecure, and distros should not enable it.
46+
47+ Note: FDRAWCMD is deprecated and will be removed from the kernel
48+ in the near future.
49+
50+ If unsure, say N.
51+
3652 config AMIGA_FLOPPY
3753 tristate "Amiga floppy support"
3854 depends on AMIGA
drivers/block/ataflop.c+6−4
@@ -303,6 +303,7 @@ static struct atari_floppy_struct { · 302 unmodified lines
303303 int ref;
304304 int type;
305305 struct blk_mq_tag_set tag_set;
306+ int error_count;
306307 } unit[FD_MAX_UNITS];
307308
308309 #define UD unit[drive]
@@ -705,14 +706,14 @@ static void fd_error( void ) · 396 unmodified lines
705706 if (!fd_request)
706707 return;
707708
708− fd_request->error_count++;
709− if (fd_request->error_count >= MAX_ERRORS) {
709+ unit[SelectedDrive].error_count++;
710+ if (unit[SelectedDrive].error_count >= MAX_ERRORS) {
710711 printk(KERN_ERR "fd%d: too many errors.\n", SelectedDrive );
711712 fd_end_request_cur(BLK_STS_IOERR);
712713 finish_fdc();
713714 return;
714715 }
715− else if (fd_request->error_count == RECALIBRATE_ERRORS) {
716+ else if (unit[SelectedDrive].error_count == RECALIBRATE_ERRORS) {
716717 printk(KERN_WARNING "fd%d: recalibrating\n", SelectedDrive );
717718 if (SelectedDrive != -1)
718719 SUD.track = -1;
@@ -1491,7 +1492,7 @@ static void setup_req_params( int drive ) · 772 unmodified lines
14911492 ReqData = ReqBuffer + 512 * ReqCnt;
14921493
14931494 if (UseTrackbuffer)
1494− read_track = (ReqCmd == READ && fd_request->error_count == 0);
1495+ read_track = (ReqCmd == READ && unit[drive].error_count == 0);
14951496 else
14961497 read_track = 0;
14971498
@@ -1520,6 +1521,7 @@ static blk_status_t ataflop_queue_rq(struct blk_mq_hw_ctx *hctx, · 22 unmodified lines
15201521 return BLK_STS_RESOURCE;
15211522 }
15221523 fd_request = bd->rq;
1524+ unit[drive].error_count = 0;
15231525 blk_mq_start_request(fd_request);
15241526
15251527 atari_disable_irq( IRQ_MFP_FDC );
drivers/block/floppy.c+40−21
@@ -509,8 +509,8 @@ static unsigned long fdc_busy; · 508 unmodified lines
509509 static DECLARE_WAIT_QUEUE_HEAD(fdc_wait);
510510 static DECLARE_WAIT_QUEUE_HEAD(command_done);
511511
512−/* Errors during formatting are counted here. */
513−static int format_errors;
512+/* errors encountered on the current (or last) request */
513+static int floppy_errors;
514514
515515 /* Format request descriptor. */
516516 static struct format_descr format_req;
@@ -530,7 +530,6 @@ static struct format_descr format_req; · 13 unmodified lines
530530 static char *floppy_track_buffer;
531531 static int max_buffer_sectors;
532532
533−static int *errors;
534533 typedef void (*done_f)(int);
535534 static const struct cont_t {
536535 void (*interrupt)(void);
@@ -1455,7 +1454,7 @@ static int interpret_errors(void) · 918 unmodified lines
14551454 if (drive_params[current_drive].flags & FTD_MSG)
14561455 DPRINT("Over/Underrun - retrying\n");
14571456 bad = 0;
1458− } else if (*errors >= drive_params[current_drive].max_errors.reporting) {
1457+ } else if (floppy_errors >= drive_params[current_drive].max_errors.reporting) {
14591458 print_errors();
14601459 }
14611460 if (reply_buffer[ST2] & ST2_WC || reply_buffer[ST2] & ST2_BC)
@@ -2095,7 +2094,7 @@ static void bad_flp_intr(void) · 633 unmodified lines
20952094 if (!next_valid_format(current_drive))
20962095 return;
20972096 }
2098− err_count = ++(*errors);
2097+ err_count = ++floppy_errors;
20992098 INFBOUND(write_errors[current_drive].badness, err_count);
21002099 if (err_count > drive_params[current_drive].max_errors.abort)
21012100 cont->done(0);
@@ -2241,9 +2240,8 @@ static int do_format(int drive, struct format_descr *tmp_format_req) · 139 unmodified lines
22412240 return -EINVAL;
22422241 }
22432242 format_req = *tmp_format_req;
2244− format_errors = 0;
22452243 cont = &format_cont;
2246− errors = &format_errors;
2244+ floppy_errors = 0;
22472245 ret = wait_til_done(redo_format, true);
22482246 if (ret == -EINTR)
22492247 return -EINTR;
@@ -2759,10 +2757,11 @@ static int set_next_request(void) · 509 unmodified lines
27592757 current_req = list_first_entry_or_null(&floppy_reqs, struct request,
27602758 queuelist);
27612759 if (current_req) {
2762− current_req->error_count = 0;
2760+ floppy_errors = 0;
27632761 list_del_init(&current_req->queuelist);
2762+ return 1;
27642763 }
2765− return current_req != NULL;
2764+ return 0;
27662765 }
27672766
27682767 /* Starts or continues processing request. Will automatically unlock the
@@ -2821,7 +2820,6 @@ do_request: · 52 unmodified lines
28212820 _floppy = floppy_type + drive_params[current_drive].autodetect[drive_state[current_drive].probed_format];
28222821 } else
28232822 probing = 0;
2824− errors = &(current_req->error_count);
28252823 tmp = make_raw_rw_request();
28262824 if (tmp < 2) {
28272825 request_done(tmp);
@@ -2982,6 +2980,8 @@ static const char *drive_name(int type, int drive) · 154 unmodified lines
29822980 return "(null)";
29832981 }
29842982
2983+#ifdef CONFIG_BLK_DEV_FD_RAWCMD
2984+
29852985 /* raw commands */
29862986 static void raw_cmd_done(int flag)
29872987 {
@@ -3181,6 +3181,35 @@ static int raw_cmd_ioctl(int cmd, void __user *param) · 193 unmodified lines
31813181 return ret;
31823182 }
31833183
3184+static int floppy_raw_cmd_ioctl(int type, int drive, int cmd,
3185+ void __user *param)
3186+{
3187+ int ret;
3188+
3189+ pr_warn_once("Note: FDRAWCMD is deprecated and will be removed from the kernel in the near future.\n");
3190+
3191+ if (type)
3192+ return -EINVAL;
3193+ if (lock_fdc(drive))
3194+ return -EINTR;
3195+ set_floppy(drive);
3196+ ret = raw_cmd_ioctl(cmd, param);
3197+ if (ret == -EINTR)
3198+ return -EINTR;
3199+ process_fd_request();
3200+ return ret;
3201+}
3202+
3203+#else /* CONFIG_BLK_DEV_FD_RAWCMD */
3204+
3205+static int floppy_raw_cmd_ioctl(int type, int drive, int cmd,
3206+ void __user *param)
3207+{
3208+ return -EOPNOTSUPP;
3209+}
3210+
3211+#endif
3212+
31843213 static int invalidate_drive(struct block_device *bdev)
31853214 {
31863215 /* invalidate the buffer track to force a reread */
@@ -3369,7 +3398,6 @@ static int fd_locked_ioctl(struct block_device *bdev, fmode_t mode, unsigned int · 182 unmodified lines
33693398 {
33703399 int drive = (long)bdev->bd_disk->private_data;
33713400 int type = ITYPE(drive_state[drive].fd_device);
3372− int i;
33733401 int ret;
33743402 int size;
33753403 union inparam {
@@ -3520,16 +3548,7 @@ static int fd_locked_ioctl(struct block_device *bdev, fmode_t mode, unsigned int · 144 unmodified lines
35203548 outparam = &write_errors[drive];
35213549 break;
35223550 case FDRAWCMD:
3523− if (type)
3524− return -EINVAL;
3525− if (lock_fdc(drive))
3526− return -EINTR;
3527− set_floppy(drive);
3528− i = raw_cmd_ioctl(cmd, (void __user *)param);
3529− if (i == -EINTR)
3530− return -EINTR;
3531− process_fd_request();
3532− return i;
3551+ return floppy_raw_cmd_ioctl(type, drive, cmd, (void __user *)param);
35333552 case FDTWADDLE:
35343553 if (lock_fdc(drive))
35353554 return -EINTR;
drivers/bus/fsl-mc/fsl-mc-bus.c+22−2
@@ -21,6 +21,7 @@ · 20 unmodified lines
2121 #include <linux/dma-mapping.h>
2222 #include <linux/acpi.h>
2323 #include <linux/iommu.h>
24+#include <linux/dma-map-ops.h>
2425
2526 #include "fsl-mc-private.h"
2627
@@ -140,15 +141,33 @@ static int fsl_mc_dma_configure(struct device *dev) · 113 unmodified lines
140141 {
141142 struct device *dma_dev = dev;
142143 struct fsl_mc_device *mc_dev = to_fsl_mc_device(dev);
144+ struct fsl_mc_driver *mc_drv = to_fsl_mc_driver(dev->driver);
143145 u32 input_id = mc_dev->icid;
146+ int ret;
144147
145148 while (dev_is_fsl_mc(dma_dev))
146149 dma_dev = dma_dev->parent;
147150
148151 if (dev_of_node(dma_dev))
149− return of_dma_configure_id(dev, dma_dev->of_node, 0, &input_id);
152+ ret = of_dma_configure_id(dev, dma_dev->of_node, 0, &input_id);
153+ else
154+ ret = acpi_dma_configure_id(dev, DEV_DMA_COHERENT, &input_id);
155+
156+ if (!ret && !mc_drv->driver_managed_dma) {
157+ ret = iommu_device_use_default_domain(dev);
158+ if (ret)
159+ arch_teardown_dma_ops(dev);
160+ }
161+
162+ return ret;
163+}
164+
165+static void fsl_mc_dma_cleanup(struct device *dev)
166+{
167+ struct fsl_mc_driver *mc_drv = to_fsl_mc_driver(dev->driver);
150168
151− return acpi_dma_configure_id(dev, DEV_DMA_COHERENT, &input_id);
169+ if (!mc_drv->driver_managed_dma)
170+ iommu_device_unuse_default_domain(dev);
152171 }
153172
154173 static ssize_t modalias_show(struct device *dev, struct device_attribute *attr,
@@ -312,6 +331,7 @@ struct bus_type fsl_mc_bus_type = { · 157 unmodified lines
312331 .match = fsl_mc_bus_match,
313332 .uevent = fsl_mc_bus_uevent,
314333 .dma_configure = fsl_mc_dma_configure,
334+ .dma_cleanup = fsl_mc_dma_cleanup,
315335 .dev_groups = fsl_mc_dev_groups,
316336 .bus_groups = fsl_mc_bus_groups,
317337 };
drivers/bus/fsl-mc/fsl-mc-msi.c+5−1
@@ -224,8 +224,12 @@ int fsl_mc_msi_domain_alloc_irqs(struct device *dev, unsigned int irq_count) · 223 unmodified lines
224224 if (error)
225225 return error;
226226
227+ msi_lock_descs(dev);
227228 if (msi_first_desc(dev, MSI_DESC_ALL))
228− return -EINVAL;
229+ error = -EINVAL;
230+ msi_unlock_descs(dev);
231+ if (error)
232+ return error;
229233
230234 /*
231235 * NOTE: Calling this function will trigger the invocation of the
drivers/bus/imx-weim.c+2−3
@@ -352,8 +352,7 @@ static int of_weim_notify(struct notifier_block *nb, unsigned long action, · 351 unmodified lines
352352
353353 pdev = of_find_device_by_node(rd->dn);
354354 if (!pdev) {
355− dev_err(&pdev->dev,
356− "Could not find platform device for '%pOF'\n",
355+ pr_err("Could not find platform device for '%pOF'\n",
357356 rd->dn);
358357
359358 ret = notifier_from_errno(-EINVAL);
@@ -370,7 +369,7 @@ static int of_weim_notify(struct notifier_block *nb, unsigned long action, · 10 unmodified lines
370369 return ret;
371370 }
372371
373−struct notifier_block weim_of_notifier = {
372+static struct notifier_block weim_of_notifier = {
374373 .notifier_call = of_weim_notify,
375374 };
376375 #endif /* IS_ENABLED(CONFIG_OF_DYNAMIC) */
drivers/bus/mhi/host/pci_generic.c+2−0
@@ -1060,6 +1060,7 @@ static int __maybe_unused mhi_pci_freeze(struct device *dev) · 1059 unmodified lines
10601060 * the intermediate restore kernel reinitializes MHI device with new
10611061 * context.
10621062 */
1063+ flush_work(&mhi_pdev->recovery_work);
10631064 if (test_and_clear_bit(MHI_PCI_DEV_STARTED, &mhi_pdev->status)) {
10641065 mhi_power_down(mhi_cntrl, true);
10651066 mhi_unprepare_after_power_down(mhi_cntrl);
@@ -1085,6 +1086,7 @@ static const struct dev_pm_ops mhi_pci_pm_ops = { · 19 unmodified lines
10851086 .resume = mhi_pci_resume,
10861087 .freeze = mhi_pci_freeze,
10871088 .thaw = mhi_pci_restore,
1089+ .poweroff = mhi_pci_freeze,
10881090 .restore = mhi_pci_restore,
10891091 #endif
10901092 };
drivers/bus/sunxi-rsb.c+2−0
@@ -227,6 +227,8 @@ static struct sunxi_rsb_device *sunxi_rsb_device_create(struct sunxi_rsb *rsb, · 226 unmodified lines
227227
228228 dev_dbg(&rdev->dev, "device %s registered\n", dev_name(&rdev->dev));
229229
230+ return rdev;
231+
230232 err_device_add:
231233 put_device(&rdev->dev);
232234
drivers/bus/ti-sysc.c+15−1
@@ -3232,13 +3232,27 @@ static int sysc_check_disabled_devices(struct sysc *ddata) · 3231 unmodified lines
32323232 */
32333233 static int sysc_check_active_timer(struct sysc *ddata)
32343234 {
3235+ int error;
3236+
32353237 if (ddata->cap->type != TI_SYSC_OMAP2_TIMER &&
32363238 ddata->cap->type != TI_SYSC_OMAP4_TIMER)
32373239 return 0;
32383240
3241+ /*
3242+ * Quirk for omap3 beagleboard revision A to B4 to use gpt12.
3243+ * Revision C and later are fixed with commit 23885389dbbb ("ARM:
3244+ * dts: Fix timer regression for beagleboard revision c"). This all
3245+ * can be dropped if we stop supporting old beagleboard revisions
3246+ * A to B4 at some point.
3247+ */
3248+ if (sysc_soc->soc == SOC_3430)
3249+ error = -ENXIO;
3250+ else
3251+ error = -EBUSY;
3252+
32393253 if ((ddata->cfg.quirks & SYSC_QUIRK_NO_RESET_ON_INIT) &&
32403254 (ddata->cfg.quirks & SYSC_QUIRK_NO_IDLE))
3241− return -ENXIO;
3255+ return error;
32423256
32433257 return 0;
32443258 }
drivers/char/ipmi/ipmi_msghandler.c+6−1
@@ -3677,8 +3677,11 @@ static void cleanup_smi_msgs(struct ipmi_smi *intf) · 3676 unmodified lines
36773677 void ipmi_unregister_smi(struct ipmi_smi *intf)
36783678 {
36793679 struct ipmi_smi_watcher *w;
3680− int intf_num = intf->intf_num, index;
3680+ int intf_num, index;
36813681
3682+ if (!intf)
3683+ return;
3684+ intf_num = intf->intf_num;
36823685 mutex_lock(&ipmi_interfaces_mutex);
36833686 intf->intf_num = -1;
36843687 intf->in_shutdown = true;
@@ -4518,6 +4521,8 @@ return_unspecified: · 833 unmodified lines
45184521 } else
45194522 /* The message was sent, start the timer. */
45204523 intf_start_seq_timer(intf, msg->msgid);
4524+ requeue = 0;
4525+ goto out;
45214526 } else if (((msg->rsp[0] >> 2) != ((msg->data[0] >> 2) | 1))
45224527 || (msg->rsp[1] != msg->data[1])) {
45234528 /*
drivers/char/ipmi/ipmi_si_intf.c+1−4
@@ -2220,10 +2220,7 @@ static void cleanup_one_si(struct smi_info *smi_info) · 2219 unmodified lines
22202220 return;
22212221
22222222 list_del(&smi_info->link);
2223−
2224− if (smi_info->intf)
2225− ipmi_unregister_smi(smi_info->intf);
2226−
2223+ ipmi_unregister_smi(smi_info->intf);
22272224 kfree(smi_info);
22282225 }
22292226
drivers/char/random.c+8−1
@@ -318,6 +318,13 @@ static void crng_reseed(bool force) · 317 unmodified lines
318318 * the resultant ChaCha state to the user, along with the second
319319 * half of the block containing 32 bytes of random data that may
320320 * be used; random_data_len may not be greater than 32.
321+ *
322+ * The returned ChaCha state contains within it a copy of the old
323+ * key value, at index 4, so the state should always be zeroed out
324+ * immediately after using in order to maintain forward secrecy.
325+ * If the state cannot be erased in a timely manner, then it is
326+ * safer to set the random_data parameter to &chacha_state[4] so
327+ * that this function overwrites it before returning.
321328 */
322329 static void crng_fast_key_erasure(u8 key[CHACHA_KEY_SIZE],
323330 u32 chacha_state[CHACHA_STATE_WORDS],
@@ -333,7 +340,7 @@ static void crng_fast_key_erasure(u8 key[CHACHA_KEY_SIZE], · 9 unmodified lines
333340 chacha20_block(chacha_state, first_block);
334341
335342 memcpy(key, first_block, CHACHA_KEY_SIZE);
336− memmove(random_data, first_block + CHACHA_KEY_SIZE, random_data_len);
343+ memcpy(random_data, first_block + CHACHA_KEY_SIZE, random_data_len);
337344 memzero_explicit(first_block, sizeof(first_block));
338345 }
339346
drivers/clk/microchip/clk-mpfs.c+164−31
@@ -11,20 +11,48 @@ · 10 unmodified lines
1111 #include <dt-bindings/clock/microchip,mpfs-clock.h>
1212
1313 /* address offset of control registers */
14+#define REG_MSSPLL_REF_CR 0x08u
15+#define REG_MSSPLL_POSTDIV_CR 0x10u
16+#define REG_MSSPLL_SSCG_2_CR 0x2Cu
1417 #define REG_CLOCK_CONFIG_CR 0x08u
18+#define REG_RTC_CLOCK_CR 0x0Cu
1519 #define REG_SUBBLK_CLOCK_CR 0x84u
1620 #define REG_SUBBLK_RESET_CR 0x88u
1721
22+#define MSSPLL_FBDIV_SHIFT 0x00u
23+#define MSSPLL_FBDIV_WIDTH 0x0Cu
24+#define MSSPLL_REFDIV_SHIFT 0x08u
25+#define MSSPLL_REFDIV_WIDTH 0x06u
26+#define MSSPLL_POSTDIV_SHIFT 0x08u
27+#define MSSPLL_POSTDIV_WIDTH 0x07u
28+#define MSSPLL_FIXED_DIV 4u
29+
1830 struct mpfs_clock_data {
1931 void __iomem *base;
32+ void __iomem *msspll_base;
2033 struct clk_hw_onecell_data hw_data;
2134 };
2235
36+struct mpfs_msspll_hw_clock {
37+ void __iomem *base;
38+ unsigned int id;
39+ u32 reg_offset;
40+ u32 shift;
41+ u32 width;
42+ u32 flags;
43+ struct clk_hw hw;
44+ struct clk_init_data init;
45+};
46+
47+#define to_mpfs_msspll_clk(_hw) container_of(_hw, struct mpfs_msspll_hw_clock, hw)
48+
2349 struct mpfs_cfg_clock {
2450 const struct clk_div_table *table;
2551 unsigned int id;
52+ u32 reg_offset;
2653 u8 shift;
2754 u8 width;
55+ u8 flags;
2856 };
2957
3058 struct mpfs_cfg_hw_clock {
@@ -55,7 +83,7 @@ struct mpfs_periph_hw_clock { · 24 unmodified lines
5583 */
5684 static DEFINE_SPINLOCK(mpfs_clk_lock);
5785
58−static const struct clk_parent_data mpfs_cfg_parent[] = {
86+static const struct clk_parent_data mpfs_ext_ref[] = {
5987 { .index = 0 },
6088 };
6189
@@ -69,6 +97,86 @@ static const struct clk_div_table mpfs_div_ahb_table[] = { · 7 unmodified lines
6997 { 0, 0 }
7098 };
7199
100+/*
101+ * The only two supported reference clock frequencies for the PolarFire SoC are
102+ * 100 and 125 MHz, as the rtc reference is required to be 1 MHz.
103+ * It therefore only needs to have divider table entries corresponding to
104+ * divide by 100 and 125.
105+ */
106+static const struct clk_div_table mpfs_div_rtcref_table[] = {
107+ { 100, 100 }, { 125, 125 },
108+ { 0, 0 }
109+};
110+
111+static unsigned long mpfs_clk_msspll_recalc_rate(struct clk_hw *hw, unsigned long prate)
112+{
113+ struct mpfs_msspll_hw_clock *msspll_hw = to_mpfs_msspll_clk(hw);
114+ void __iomem *mult_addr = msspll_hw->base + msspll_hw->reg_offset;
115+ void __iomem *ref_div_addr = msspll_hw->base + REG_MSSPLL_REF_CR;
116+ void __iomem *postdiv_addr = msspll_hw->base + REG_MSSPLL_POSTDIV_CR;
117+ u32 mult, ref_div, postdiv;
118+
119+ mult = readl_relaxed(mult_addr) >> MSSPLL_FBDIV_SHIFT;
120+ mult &= clk_div_mask(MSSPLL_FBDIV_WIDTH);
121+ ref_div = readl_relaxed(ref_div_addr) >> MSSPLL_REFDIV_SHIFT;
122+ ref_div &= clk_div_mask(MSSPLL_REFDIV_WIDTH);
123+ postdiv = readl_relaxed(postdiv_addr) >> MSSPLL_POSTDIV_SHIFT;
124+ postdiv &= clk_div_mask(MSSPLL_POSTDIV_WIDTH);
125+
126+ return prate * mult / (ref_div * MSSPLL_FIXED_DIV * postdiv);
127+}
128+
129+static const struct clk_ops mpfs_clk_msspll_ops = {
130+ .recalc_rate = mpfs_clk_msspll_recalc_rate,
131+};
132+
133+#define CLK_PLL(_id, _name, _parent, _shift, _width, _flags, _offset) { \
134+ .id = _id, \
135+ .shift = _shift, \
136+ .width = _width, \
137+ .reg_offset = _offset, \
138+ .flags = _flags, \
139+ .hw.init = CLK_HW_INIT_PARENTS_DATA(_name, _parent, &mpfs_clk_msspll_ops, 0), \
140+}
141+
142+static struct mpfs_msspll_hw_clock mpfs_msspll_clks[] = {
143+ CLK_PLL(CLK_MSSPLL, "clk_msspll", mpfs_ext_ref, MSSPLL_FBDIV_SHIFT,
144+ MSSPLL_FBDIV_WIDTH, 0, REG_MSSPLL_SSCG_2_CR),
145+};
146+
147+static int mpfs_clk_register_msspll(struct device *dev, struct mpfs_msspll_hw_clock *msspll_hw,
148+ void __iomem *base)
149+{
150+ msspll_hw->base = base;
151+
152+ return devm_clk_hw_register(dev, &msspll_hw->hw);
153+}
154+
155+static int mpfs_clk_register_mssplls(struct device *dev, struct mpfs_msspll_hw_clock *msspll_hws,
156+ unsigned int num_clks, struct mpfs_clock_data *data)
157+{
158+ void __iomem *base = data->msspll_base;
159+ unsigned int i;
160+ int ret;
161+
162+ for (i = 0; i < num_clks; i++) {
163+ struct mpfs_msspll_hw_clock *msspll_hw = &msspll_hws[i];
164+
165+ ret = mpfs_clk_register_msspll(dev, msspll_hw, base);
166+ if (ret)
167+ return dev_err_probe(dev, ret, "failed to register msspll id: %d\n",
168+ CLK_MSSPLL);
169+
170+ data->hw_data.hws[msspll_hw->id] = &msspll_hw->hw;
171+ }
172+
173+ return 0;
174+}
175+
176+/*
177+ * "CFG" clocks
178+ */
179+
72180 static unsigned long mpfs_cfg_clk_recalc_rate(struct clk_hw *hw, unsigned long prate)
73181 {
74182 struct mpfs_cfg_hw_clock *cfg_hw = to_mpfs_cfg_clk(hw);
@@ -76,10 +184,10 @@ static unsigned long mpfs_cfg_clk_recalc_rate(struct clk_hw *hw, unsigned long p · 1 unmodified line
76184 void __iomem *base_addr = cfg_hw->sys_base;
77185 u32 val;
78186
79− val = readl_relaxed(base_addr + REG_CLOCK_CONFIG_CR) >> cfg->shift;
187+ val = readl_relaxed(base_addr + cfg->reg_offset) >> cfg->shift;
80188 val &= clk_div_mask(cfg->width);
81189
82− return prate / (1u << val);
190+ return divider_recalc_rate(hw, prate, val, cfg->table, cfg->flags, cfg->width);
83191 }
84192
85193 static long mpfs_cfg_clk_round_rate(struct clk_hw *hw, unsigned long rate, unsigned long *prate)
@@ -105,11 +213,10 @@ static int mpfs_cfg_clk_set_rate(struct clk_hw *hw, unsigned long rate, unsigned · 19 unmodified lines
105213 return divider_setting;
106214
107215 spin_lock_irqsave(&mpfs_clk_lock, flags);
108−
109− val = readl_relaxed(base_addr + REG_CLOCK_CONFIG_CR);
216+ val = readl_relaxed(base_addr + cfg->reg_offset);
110217 val &= ~(clk_div_mask(cfg->width) << cfg_hw->cfg.shift);
111218 val |= divider_setting << cfg->shift;
112− writel_relaxed(val, base_addr + REG_CLOCK_CONFIG_CR);
219+ writel_relaxed(val, base_addr + cfg->reg_offset);
113220
114221 spin_unlock_irqrestore(&mpfs_clk_lock, flags);
115222
@@ -122,19 +229,33 @@ static const struct clk_ops mpfs_clk_cfg_ops = { · 6 unmodified lines
122229 .set_rate = mpfs_cfg_clk_set_rate,
123230 };
124231
125−#define CLK_CFG(_id, _name, _parent, _shift, _width, _table, _flags) { \
126− .cfg.id = _id, \
127− .cfg.shift = _shift, \
128− .cfg.width = _width, \
129− .cfg.table = _table, \
130− .hw.init = CLK_HW_INIT_PARENTS_DATA(_name, _parent, &mpfs_clk_cfg_ops, \
131− _flags), \
232+#define CLK_CFG(_id, _name, _parent, _shift, _width, _table, _flags, _offset) { \
233+ .cfg.id = _id, \
234+ .cfg.shift = _shift, \
235+ .cfg.width = _width, \
236+ .cfg.table = _table, \
237+ .cfg.reg_offset = _offset, \
238+ .cfg.flags = _flags, \
239+ .hw.init = CLK_HW_INIT(_name, _parent, &mpfs_clk_cfg_ops, 0), \
132240 }
133241
134242 static struct mpfs_cfg_hw_clock mpfs_cfg_clks[] = {
135− CLK_CFG(CLK_CPU, "clk_cpu", mpfs_cfg_parent, 0, 2, mpfs_div_cpu_axi_table, 0),
136− CLK_CFG(CLK_AXI, "clk_axi", mpfs_cfg_parent, 2, 2, mpfs_div_cpu_axi_table, 0),
137− CLK_CFG(CLK_AHB, "clk_ahb", mpfs_cfg_parent, 4, 2, mpfs_div_ahb_table, 0),
243+ CLK_CFG(CLK_CPU, "clk_cpu", "clk_msspll", 0, 2, mpfs_div_cpu_axi_table, 0,
244+ REG_CLOCK_CONFIG_CR),
245+ CLK_CFG(CLK_AXI, "clk_axi", "clk_msspll", 2, 2, mpfs_div_cpu_axi_table, 0,
246+ REG_CLOCK_CONFIG_CR),
247+ CLK_CFG(CLK_AHB, "clk_ahb", "clk_msspll", 4, 2, mpfs_div_ahb_table, 0,
248+ REG_CLOCK_CONFIG_CR),
249+ {
250+ .cfg.id = CLK_RTCREF,
251+ .cfg.shift = 0,
252+ .cfg.width = 12,
253+ .cfg.table = mpfs_div_rtcref_table,
254+ .cfg.reg_offset = REG_RTC_CLOCK_CR,
255+ .cfg.flags = CLK_DIVIDER_ONE_BASED,
256+ .hw.init =
257+ CLK_HW_INIT_PARENTS_DATA("clk_rtcref", mpfs_ext_ref, &mpfs_clk_cfg_ops, 0),
258+ }
138259 };
139260
140261 static int mpfs_clk_register_cfg(struct device *dev, struct mpfs_cfg_hw_clock *cfg_hw,
@@ -160,13 +281,17 @@ static int mpfs_clk_register_cfgs(struct device *dev, struct mpfs_cfg_hw_clock * · 19 unmodified lines
160281 return dev_err_probe(dev, ret, "failed to register clock id: %d\n",
161282 cfg_hw->cfg.id);
162283
163− id = cfg_hws[i].cfg.id;
284+ id = cfg_hw->cfg.id;
164285 data->hw_data.hws[id] = &cfg_hw->hw;
165286 }
166287
167288 return 0;
168289 }
169290
291+/*
292+ * peripheral clocks - devices connected to axi or ahb buses.
293+ */
294+
170295 static int mpfs_periph_clk_enable(struct clk_hw *hw)
171296 {
172297 struct mpfs_periph_hw_clock *periph_hw = to_mpfs_periph_clk(hw);
@@ -200,10 +325,6 @@ static void mpfs_periph_clk_disable(struct clk_hw *hw) · 27 unmodified lines
200325
201326 spin_lock_irqsave(&mpfs_clk_lock, flags);
202327
203− reg = readl_relaxed(base_addr + REG_SUBBLK_RESET_CR);
204− val = reg | (1u << periph->shift);
205− writel_relaxed(val, base_addr + REG_SUBBLK_RESET_CR);
206−
207328 reg = readl_relaxed(base_addr + REG_SUBBLK_CLOCK_CR);
208329 val = reg & ~(1u << periph->shift);
209330 writel_relaxed(val, base_addr + REG_SUBBLK_CLOCK_CR);
@@ -249,8 +370,10 @@ static const struct clk_ops mpfs_periph_clk_ops = { · 39 unmodified lines
249370 * trap handler
250371 * - CLK_MMUART0: reserved by the hss
251372 * - CLK_DDRC: provides clock to the ddr subsystem
252− * - CLK_FICx: these provide clocks for sections of the fpga fabric, disabling them would
253− * cause the fabric to go into reset
373+ * - CLK_FICx: these provide the processor side clocks to the "FIC" (Fabric InterConnect)
374+ * clock domain crossers which provide the interface to the FPGA fabric. Disabling them
375+ * causes the FPGA fabric to go into reset.
376+ * - CLK_ATHENA: The athena clock is FIC4, which is reserved for the Athena TeraFire.
254377 */
255378
256379 static struct mpfs_periph_hw_clock mpfs_periph_clks[] = {
@@ -258,7 +381,7 @@ static struct mpfs_periph_hw_clock mpfs_periph_clks[] = { · 1 unmodified line
258381 CLK_PERIPH(CLK_MAC0, "clk_periph_mac0", PARENT_CLK(AHB), 1, 0),
259382 CLK_PERIPH(CLK_MAC1, "clk_periph_mac1", PARENT_CLK(AHB), 2, 0),
260383 CLK_PERIPH(CLK_MMC, "clk_periph_mmc", PARENT_CLK(AHB), 3, 0),
261− CLK_PERIPH(CLK_TIMER, "clk_periph_timer", PARENT_CLK(AHB), 4, 0),
384+ CLK_PERIPH(CLK_TIMER, "clk_periph_timer", PARENT_CLK(RTCREF), 4, 0),
262385 CLK_PERIPH(CLK_MMUART0, "clk_periph_mmuart0", PARENT_CLK(AHB), 5, CLK_IS_CRITICAL),
263386 CLK_PERIPH(CLK_MMUART1, "clk_periph_mmuart1", PARENT_CLK(AHB), 6, 0),
264387 CLK_PERIPH(CLK_MMUART2, "clk_periph_mmuart2", PARENT_CLK(AHB), 7, 0),
@@ -277,11 +400,11 @@ static struct mpfs_periph_hw_clock mpfs_periph_clks[] = { · 12 unmodified lines
277400 CLK_PERIPH(CLK_GPIO1, "clk_periph_gpio1", PARENT_CLK(AHB), 21, 0),
278401 CLK_PERIPH(CLK_GPIO2, "clk_periph_gpio2", PARENT_CLK(AHB), 22, 0),
279402 CLK_PERIPH(CLK_DDRC, "clk_periph_ddrc", PARENT_CLK(AHB), 23, CLK_IS_CRITICAL),
280− CLK_PERIPH(CLK_FIC0, "clk_periph_fic0", PARENT_CLK(AHB), 24, CLK_IS_CRITICAL),
281− CLK_PERIPH(CLK_FIC1, "clk_periph_fic1", PARENT_CLK(AHB), 25, CLK_IS_CRITICAL),
282− CLK_PERIPH(CLK_FIC2, "clk_periph_fic2", PARENT_CLK(AHB), 26, CLK_IS_CRITICAL),
283− CLK_PERIPH(CLK_FIC3, "clk_periph_fic3", PARENT_CLK(AHB), 27, CLK_IS_CRITICAL),
284− CLK_PERIPH(CLK_ATHENA, "clk_periph_athena", PARENT_CLK(AHB), 28, 0),
403+ CLK_PERIPH(CLK_FIC0, "clk_periph_fic0", PARENT_CLK(AXI), 24, CLK_IS_CRITICAL),
404+ CLK_PERIPH(CLK_FIC1, "clk_periph_fic1", PARENT_CLK(AXI), 25, CLK_IS_CRITICAL),
405+ CLK_PERIPH(CLK_FIC2, "clk_periph_fic2", PARENT_CLK(AXI), 26, CLK_IS_CRITICAL),
406+ CLK_PERIPH(CLK_FIC3, "clk_periph_fic3", PARENT_CLK(AXI), 27, CLK_IS_CRITICAL),
407+ CLK_PERIPH(CLK_ATHENA, "clk_periph_athena", PARENT_CLK(AXI), 28, CLK_IS_CRITICAL),
285408 CLK_PERIPH(CLK_CFM, "clk_periph_cfm", PARENT_CLK(AHB), 29, 0),
286409 };
287410
@@ -322,8 +445,9 @@ static int mpfs_clk_probe(struct platform_device *pdev) · 34 unmodified lines
322445 unsigned int num_clks;
323446 int ret;
324447
325− /* CLK_RESERVED is not part of cfg_clks nor periph_clks, so add 1 */
326− num_clks = ARRAY_SIZE(mpfs_cfg_clks) + ARRAY_SIZE(mpfs_periph_clks) + 1;
448+ /* CLK_RESERVED is not part of clock arrays, so add 1 */
449+ num_clks = ARRAY_SIZE(mpfs_msspll_clks) + ARRAY_SIZE(mpfs_cfg_clks)
450+ + ARRAY_SIZE(mpfs_periph_clks) + 1;
327451
328452 clk_data = devm_kzalloc(dev, struct_size(clk_data, hw_data.hws, num_clks), GFP_KERNEL);
329453 if (!clk_data)
@@ -333,8 +457,17 @@ static int mpfs_clk_probe(struct platform_device *pdev) · 3 unmodified lines
333457 if (IS_ERR(clk_data->base))
334458 return PTR_ERR(clk_data->base);
335459
460+ clk_data->msspll_base = devm_platform_ioremap_resource(pdev, 1);
461+ if (IS_ERR(clk_data->msspll_base))
462+ return PTR_ERR(clk_data->msspll_base);
463+
336464 clk_data->hw_data.num = num_clks;
337465
466+ ret = mpfs_clk_register_mssplls(dev, mpfs_msspll_clks, ARRAY_SIZE(mpfs_msspll_clks),
467+ clk_data);
468+ if (ret)
469+ return ret;
470+
338471 ret = mpfs_clk_register_cfgs(dev, mpfs_cfg_clks, ARRAY_SIZE(mpfs_cfg_clks), clk_data);
339472 if (ret)
340473 return ret;
drivers/clk/qcom/clk-rcg2.c+1−1
@@ -818,7 +818,7 @@ EXPORT_SYMBOL_GPL(clk_pixel_ops); · 817 unmodified lines
818818 static int clk_gfx3d_determine_rate(struct clk_hw *hw,
819819 struct clk_rate_request *req)
820820 {
821− struct clk_rate_request parent_req = { };
821+ struct clk_rate_request parent_req = { .min_rate = 0, .max_rate = ULONG_MAX };
822822 struct clk_rcg2_gfx3d *cgfx = to_clk_rcg2_gfx3d(hw);
823823 struct clk_hw *xo, *p0, *p1, *p2;
824824 unsigned long p0_rate;
drivers/clk/sunxi-ng/ccu-sun6i-rtc.c+2−0
@@ -241,6 +241,7 @@ static struct clk_init_data rtc_32k_init_data = { · 240 unmodified lines
241241 .ops = &ccu_mux_ops,
242242 .parent_hws = rtc_32k_parents,
243243 .num_parents = ARRAY_SIZE(rtc_32k_parents), /* updated during probe */
244+ .flags = CLK_IS_CRITICAL,
244245 };
245246
246247 static struct ccu_mux rtc_32k_clk = {
@@ -346,6 +347,7 @@ static const struct of_device_id sun6i_rtc_ccu_match[] = { · 99 unmodified lines
346347 .compatible = "allwinner,sun50i-r329-rtc",
347348 .data = &sun50i_r329_rtc_ccu_data,
348349 },
350+ {},
349351 };
350352
351353 int sun6i_rtc_ccu_probe(struct device *dev, void __iomem *reg)
drivers/clk/sunxi/clk-sun9i-mmc.c+2−0
@@ -109,6 +109,8 @@ static int sun9i_a80_mmc_config_clk_probe(struct platform_device *pdev) · 108 unmodified lines
109109 spin_lock_init(&data->lock);
110110
111111 r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
112+ if (!r)
113+ return -EINVAL;
112114 /* one clock/reset pair per word */
113115 count = DIV_ROUND_UP((resource_size(r)), SUN9I_MMC_WIDTH);
114116 data->membase = devm_ioremap_resource(&pdev->dev, r);
drivers/cpufreq/qcom-cpufreq-hw.c+57−13
@@ -24,13 +24,17 @@ · 23 unmodified lines
2424 #define CLK_HW_DIV 2
2525 #define LUT_TURBO_IND 1
2626
27+#define GT_IRQ_STATUS BIT(2)
28+
2729 #define HZ_PER_KHZ 1000
2830
2931 struct qcom_cpufreq_soc_data {
3032 u32 reg_enable;
33+ u32 reg_domain_state;
3134 u32 reg_dcvs_ctrl;
3235 u32 reg_freq_lut;
3336 u32 reg_volt_lut;
37+ u32 reg_intr_clr;
3438 u32 reg_current_vote;
3539 u32 reg_perf_state;
3640 u8 lut_row_size;
@@ -280,37 +284,46 @@ static void qcom_get_related_cpus(int index, struct cpumask *m) · 243 unmodified lines
280284 }
281285 }
282286
283−static unsigned int qcom_lmh_get_throttle_freq(struct qcom_cpufreq_data *data)
287+static unsigned long qcom_lmh_get_throttle_freq(struct qcom_cpufreq_data *data)
284288 {
285− unsigned int val = readl_relaxed(data->base + data->soc_data->reg_current_vote);
289+ unsigned int lval;
290+
291+ if (data->soc_data->reg_current_vote)
292+ lval = readl_relaxed(data->base + data->soc_data->reg_current_vote) & 0x3ff;
293+ else
294+ lval = readl_relaxed(data->base + data->soc_data->reg_domain_state) & 0xff;
286295
287− return (val & 0x3FF) * 19200;
296+ return lval * xo_rate;
288297 }
289298
290299 static void qcom_lmh_dcvs_notify(struct qcom_cpufreq_data *data)
291300 {
292301 struct cpufreq_policy *policy = data->policy;
293− int cpu = cpumask_first(policy->cpus);
302+ int cpu = cpumask_first(policy->related_cpus);
294303 struct device *dev = get_cpu_device(cpu);
295304 unsigned long freq_hz, throttled_freq;
296305 struct dev_pm_opp *opp;
297− unsigned int freq;
298306
299307 /*
300308 * Get the h/w throttled frequency, normalize it using the
301309 * registered opp table and use it to calculate thermal pressure.
302310 */
303− freq = qcom_lmh_get_throttle_freq(data);
304− freq_hz = freq * HZ_PER_KHZ;
311+ freq_hz = qcom_lmh_get_throttle_freq(data);
305312
306313 opp = dev_pm_opp_find_freq_floor(dev, &freq_hz);
307314 if (IS_ERR(opp) && PTR_ERR(opp) == -ERANGE)
308− dev_pm_opp_find_freq_ceil(dev, &freq_hz);
315+ opp = dev_pm_opp_find_freq_ceil(dev, &freq_hz);
316+
317+ if (IS_ERR(opp)) {
318+ dev_warn(dev, "Can't find the OPP for throttling: %pe!\n", opp);
319+ } else {
320+ throttled_freq = freq_hz / HZ_PER_KHZ;
309321
310− throttled_freq = freq_hz / HZ_PER_KHZ;
322+ /* Update thermal pressure (the boost frequencies are accepted) */
323+ arch_update_thermal_pressure(policy->related_cpus, throttled_freq);
311324
312− /* Update thermal pressure (the boost frequencies are accepted) */
313− arch_update_thermal_pressure(policy->related_cpus, throttled_freq);
325+ dev_pm_opp_put(opp);
326+ }
314327
315328 /*
316329 * In the unlikely case policy is unregistered do not enable
@@ -350,6 +363,10 @@ static irqreturn_t qcom_lmh_dcvs_handle_irq(int irq, void *data) · 33 unmodified lines
350363 disable_irq_nosync(c_data->throttle_irq);
351364 schedule_delayed_work(&c_data->throttle_work, 0);
352365
366+ if (c_data->soc_data->reg_intr_clr)
367+ writel_relaxed(GT_IRQ_STATUS,
368+ c_data->base + c_data->soc_data->reg_intr_clr);
369+
353370 return IRQ_HANDLED;
354371 }
355372
@@ -365,9 +382,11 @@ static const struct qcom_cpufreq_soc_data qcom_soc_data = { · 9 unmodified lines
365382
366383 static const struct qcom_cpufreq_soc_data epss_soc_data = {
367384 .reg_enable = 0x0,
385+ .reg_domain_state = 0x20,
368386 .reg_dcvs_ctrl = 0xb0,
369387 .reg_freq_lut = 0x100,
370388 .reg_volt_lut = 0x200,
389+ .reg_intr_clr = 0x308,
371390 .reg_perf_state = 0x320,
372391 .lut_row_size = 4,
373392 };
@@ -417,16 +436,39 @@ static int qcom_cpufreq_hw_lmh_init(struct cpufreq_policy *policy, int index) · 43 unmodified lines
417436 return 0;
418437 }
419438
420−static void qcom_cpufreq_hw_lmh_exit(struct qcom_cpufreq_data *data)
439+static int qcom_cpufreq_hw_cpu_online(struct cpufreq_policy *policy)
440+{
441+ struct qcom_cpufreq_data *data = policy->driver_data;
442+ struct platform_device *pdev = cpufreq_get_driver_data();
443+ int ret;
444+
445+ ret = irq_set_affinity_hint(data->throttle_irq, policy->cpus);
446+ if (ret)
447+ dev_err(&pdev->dev, "Failed to set CPU affinity of %s[%d]\n",
448+ data->irq_name, data->throttle_irq);
449+
450+ return ret;
451+}
452+
453+static int qcom_cpufreq_hw_cpu_offline(struct cpufreq_policy *policy)
421454 {
455+ struct qcom_cpufreq_data *data = policy->driver_data;
456+
422457 if (data->throttle_irq <= 0)
423− return;
458+ return 0;
424459
425460 mutex_lock(&data->throttle_lock);
426461 data->cancel_throttle = true;
427462 mutex_unlock(&data->throttle_lock);
428463
429464 cancel_delayed_work_sync(&data->throttle_work);
465+ irq_set_affinity_hint(data->throttle_irq, NULL);
466+
467+ return 0;
468+}
469+
470+static void qcom_cpufreq_hw_lmh_exit(struct qcom_cpufreq_data *data)
471+{
430472 free_irq(data->throttle_irq, data);
431473 }
432474
@@ -583,6 +625,8 @@ static struct cpufreq_driver cpufreq_qcom_hw_driver = { · 150 unmodified lines
583625 .get = qcom_cpufreq_hw_get,
584626 .init = qcom_cpufreq_hw_cpu_init,
585627 .exit = qcom_cpufreq_hw_cpu_exit,
628+ .online = qcom_cpufreq_hw_cpu_online,
629+ .offline = qcom_cpufreq_hw_cpu_offline,
586630 .register_em = cpufreq_register_em_with_opp,
587631 .fast_switch = qcom_cpufreq_hw_fast_switch,
588632 .name = "qcom-cpufreq-hw",
drivers/cpufreq/sun50i-cpufreq-nvmem.c+3−1
@@ -98,8 +98,10 @@ static int sun50i_cpufreq_nvmem_probe(struct platform_device *pdev) · 97 unmodified lines
9898 return -ENOMEM;
9999
100100 ret = sun50i_cpufreq_get_efuse(&speed);
101− if (ret)
101+ if (ret) {
102+ kfree(opp_tables);
102103 return ret;
104+ }
103105
104106 snprintf(name, MAX_NAME_LEN, "speed%d", speed);
105107
drivers/dma-buf/dma-buf.c+4−4
@@ -543,10 +543,6 @@ struct dma_buf *dma_buf_export(const struct dma_buf_export_info *exp_info) · 542 unmodified lines
543543 file->f_mode |= FMODE_LSEEK;
544544 dmabuf->file = file;
545545
546− ret = dma_buf_stats_setup(dmabuf);
547− if (ret)
548− goto err_sysfs;
549−
550546 mutex_init(&dmabuf->lock);
551547 INIT_LIST_HEAD(&dmabuf->attachments);
552548
@@ -554,6 +550,10 @@ struct dma_buf *dma_buf_export(const struct dma_buf_export_info *exp_info) · 1 unmodified line
554550 list_add(&dmabuf->list_node, &db_list.head);
555551 mutex_unlock(&db_list.lock);
556552
553+ ret = dma_buf_stats_setup(dmabuf);
554+ if (ret)
555+ goto err_sysfs;
556+
557557 return dmabuf;
558558
559559 err_sysfs:
drivers/firewire/core-card.c+3−0
@@ -668,6 +668,7 @@ EXPORT_SYMBOL_GPL(fw_card_release); · 667 unmodified lines
668668 void fw_core_remove_card(struct fw_card *card)
669669 {
670670 struct fw_card_driver dummy_driver = dummy_driver_template;
671+ unsigned long flags;
671672
672673 card->driver->update_phy_reg(card, 4,
673674 PHY_LINK_ACTIVE | PHY_CONTENDER, 0);
@@ -682,7 +683,9 @@ void fw_core_remove_card(struct fw_card *card) · 8 unmodified lines
682683 dummy_driver.stop_iso = card->driver->stop_iso;
683684 card->driver = &dummy_driver;
684685
686+ spin_lock_irqsave(&card->lock, flags);
685687 fw_destroy_nodes(card);
688+ spin_unlock_irqrestore(&card->lock, flags);
686689
687690 /* Wait for all users, especially device workqueue jobs, to finish. */
688691 fw_card_put(card);
drivers/firewire/core-cdev.c+3−1
@@ -1500,6 +1500,7 @@ static void outbound_phy_packet_callback(struct fw_packet *packet, · 1499 unmodified lines
15001500 {
15011501 struct outbound_phy_packet_event *e =
15021502 container_of(packet, struct outbound_phy_packet_event, p);
1503+ struct client *e_client;
15031504
15041505 switch (status) {
15051506 /* expected: */
@@ -1516,9 +1517,10 @@ static void outbound_phy_packet_callback(struct fw_packet *packet, · 10 unmodified lines
15161517 }
15171518 e->phy_packet.data[0] = packet->timestamp;
15181519
1520+ e_client = e->client;
15191521 queue_event(e->client, &e->event, &e->phy_packet,
15201522 sizeof(e->phy_packet) + e->phy_packet.length, NULL, 0);
1521− client_put(e->client);
1523+ client_put(e_client);
15221524 }
15231525
15241526 static int ioctl_send_phy_packet(struct client *client, union ioctl_arg *arg)
drivers/firewire/core-topology.c+3−6
@@ -375,16 +375,13 @@ static void report_found_node(struct fw_card *card, · 374 unmodified lines
375375 card->bm_retries = 0;
376376 }
377377
378+/* Must be called with card->lock held */
378379 void fw_destroy_nodes(struct fw_card *card)
379380 {
380− unsigned long flags;
381−
382− spin_lock_irqsave(&card->lock, flags);
383381 card->color++;
384382 if (card->local_node != NULL)
385383 for_each_fw_node(card, card->local_node, report_lost_node);
386384 card->local_node = NULL;
387− spin_unlock_irqrestore(&card->lock, flags);
388385 }
389386
390387 static void move_tree(struct fw_node *node0, struct fw_node *node1, int port)
@@ -510,6 +507,8 @@ void fw_core_handle_bus_reset(struct fw_card *card, int node_id, int generation, · 119 unmodified lines
510507 struct fw_node *local_node;
511508 unsigned long flags;
512509
510+ spin_lock_irqsave(&card->lock, flags);
511+
513512 /*
514513 * If the selfID buffer is not the immediate successor of the
515514 * previously processed one, we cannot reliably compare the
@@ -521,8 +520,6 @@ void fw_core_handle_bus_reset(struct fw_card *card, int node_id, int generation, · 5 unmodified lines
521520 card->bm_retries = 0;
522521 }
523522
524− spin_lock_irqsave(&card->lock, flags);
525−
526523 card->broadcast_channel_allocated = card->broadcast_channel_auto_allocated;
527524 card->node_id = node_id;
528525 /*
drivers/firewire/core-transaction.c+16−14
@@ -73,24 +73,25 @@ static int try_cancel_split_timeout(struct fw_transaction *t) · 72 unmodified lines
7373 static int close_transaction(struct fw_transaction *transaction,
7474 struct fw_card *card, int rcode)
7575 {
76− struct fw_transaction *t;
76+ struct fw_transaction *t = NULL, *iter;
7777 unsigned long flags;
7878
7979 spin_lock_irqsave(&card->lock, flags);
80− list_for_each_entry(t, &card->transaction_list, link) {
81− if (t == transaction) {
82− if (!try_cancel_split_timeout(t)) {
80+ list_for_each_entry(iter, &card->transaction_list, link) {
81+ if (iter == transaction) {
82+ if (!try_cancel_split_timeout(iter)) {
8383 spin_unlock_irqrestore(&card->lock, flags);
8484 goto timed_out;
8585 }
86− list_del_init(&t->link);
87− card->tlabel_mask &= ~(1ULL << t->tlabel);
86+ list_del_init(&iter->link);
87+ card->tlabel_mask &= ~(1ULL << iter->tlabel);
88+ t = iter;
8889 break;
8990 }
9091 }
9192 spin_unlock_irqrestore(&card->lock, flags);
9293
93− if (&t->link != &card->transaction_list) {
94+ if (t) {
9495 t->callback(card, rcode, NULL, 0, t->callback_data);
9596 return 0;
9697 }
@@ -935,7 +936,7 @@ EXPORT_SYMBOL(fw_core_handle_request); · 838 unmodified lines
935936
936937 void fw_core_handle_response(struct fw_card *card, struct fw_packet *p)
937938 {
938− struct fw_transaction *t;
939+ struct fw_transaction *t = NULL, *iter;
939940 unsigned long flags;
940941 u32 *data;
941942 size_t data_length;
@@ -947,20 +948,21 @@ void fw_core_handle_response(struct fw_card *card, struct fw_packet *p) · 5 unmodified lines
947948 rcode = HEADER_GET_RCODE(p->header[1]);
948949
949950 spin_lock_irqsave(&card->lock, flags);
950− list_for_each_entry(t, &card->transaction_list, link) {
951− if (t->node_id == source && t->tlabel == tlabel) {
952− if (!try_cancel_split_timeout(t)) {
951+ list_for_each_entry(iter, &card->transaction_list, link) {
952+ if (iter->node_id == source && iter->tlabel == tlabel) {
953+ if (!try_cancel_split_timeout(iter)) {
953954 spin_unlock_irqrestore(&card->lock, flags);
954955 goto timed_out;
955956 }
956− list_del_init(&t->link);
957− card->tlabel_mask &= ~(1ULL << t->tlabel);
957+ list_del_init(&iter->link);
958+ card->tlabel_mask &= ~(1ULL << iter->tlabel);
959+ t = iter;
958960 break;
959961 }
960962 }
961963 spin_unlock_irqrestore(&card->lock, flags);
962964
963− if (&t->link == &card->transaction_list) {
965+ if (!t) {
964966 timed_out:
965967 fw_notice(card, "unsolicited response (source %x, tlabel %x)\n",
966968 source, tlabel);
drivers/firewire/sbp2.c+7−6
@@ -408,7 +408,7 @@ static void sbp2_status_write(struct fw_card *card, struct fw_request *request, · 407 unmodified lines
408408 void *payload, size_t length, void *callback_data)
409409 {
410410 struct sbp2_logical_unit *lu = callback_data;
411− struct sbp2_orb *orb;
411+ struct sbp2_orb *orb = NULL, *iter;
412412 struct sbp2_status status;
413413 unsigned long flags;
414414
@@ -433,17 +433,18 @@ static void sbp2_status_write(struct fw_card *card, struct fw_request *request, · 18 unmodified lines
433433
434434 /* Lookup the orb corresponding to this status write. */
435435 spin_lock_irqsave(&lu->tgt->lock, flags);
436− list_for_each_entry(orb, &lu->orb_list, link) {
436+ list_for_each_entry(iter, &lu->orb_list, link) {
437437 if (STATUS_GET_ORB_HIGH(status) == 0 &&
438− STATUS_GET_ORB_LOW(status) == orb->request_bus) {
439− orb->rcode = RCODE_COMPLETE;
440− list_del(&orb->link);
438+ STATUS_GET_ORB_LOW(status) == iter->request_bus) {
439+ iter->rcode = RCODE_COMPLETE;
440+ list_del(&iter->link);
441+ orb = iter;
441442 break;
442443 }
443444 }
444445 spin_unlock_irqrestore(&lu->tgt->lock, flags);
445446
446− if (&orb->link != &lu->orb_list) {
447+ if (orb) {
447448 orb->callback(orb, &status);
448449 kref_put(&orb->kref, free_orb); /* orb callback reference */
449450 } else {
drivers/gpio/gpio-mvebu.c+0−7
@@ -871,13 +871,6 @@ static int mvebu_pwm_probe(struct platform_device *pdev, · 870 unmodified lines
871871 mvpwm->chip.dev = dev;
872872 mvpwm->chip.ops = &mvebu_pwm_ops;
873873 mvpwm->chip.npwm = mvchip->chip.ngpio;
874− /*
875− * There may already be some PWM allocated, so we can't force
876− * mvpwm->chip.base to a fixed point like mvchip->chip.base.
877− * So, we let pwmchip_add() do the numbering and take the next free
878− * region.
879− */
880− mvpwm->chip.base = -1;
881874
882875 spin_lock_init(&mvpwm->lock);
883876
drivers/gpio/gpio-pca953x.c+2−2
@@ -762,11 +762,11 @@ static bool pca953x_irq_pending(struct pca953x_chip *chip, unsigned long *pendin · 761 unmodified lines
762762 bitmap_xor(cur_stat, new_stat, old_stat, gc->ngpio);
763763 bitmap_and(trigger, cur_stat, chip->irq_mask, gc->ngpio);
764764
765+ bitmap_copy(chip->irq_stat, new_stat, gc->ngpio);
766+
765767 if (bitmap_empty(trigger, gc->ngpio))
766768 return false;
767769
768− bitmap_copy(chip->irq_stat, new_stat, gc->ngpio);
769−
770770 bitmap_and(cur_stat, chip->irq_trig_fall, old_stat, gc->ngpio);
771771 bitmap_and(old_stat, chip->irq_trig_raise, new_stat, gc->ngpio);
772772 bitmap_or(new_stat, old_stat, cur_stat, gc->ngpio);
drivers/gpio/gpio-visconti.c+2−5
@@ -130,7 +130,6 @@ static int visconti_gpio_probe(struct platform_device *pdev) · 129 unmodified lines
130130 struct gpio_irq_chip *girq;
131131 struct irq_domain *parent;
132132 struct device_node *irq_parent;
133− struct fwnode_handle *fwnode;
134133 int ret;
135134
136135 priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
@@ -150,14 +149,12 @@ static int visconti_gpio_probe(struct platform_device *pdev) · 13 unmodified lines
150149 }
151150
152151 parent = irq_find_host(irq_parent);
152+ of_node_put(irq_parent);
153153 if (!parent) {
154154 dev_err(dev, "No IRQ parent domain\n");
155155 return -ENODEV;
156156 }
157157
158− fwnode = of_node_to_fwnode(irq_parent);
159− of_node_put(irq_parent);
160−
161158 ret = bgpio_init(&priv->gpio_chip, dev, 4,
162159 priv->base + GPIO_IDATA,
163160 priv->base + GPIO_OSET,
@@ -180,7 +177,7 @@ static int visconti_gpio_probe(struct platform_device *pdev) · 16 unmodified lines
180177
181178 girq = &priv->gpio_chip.irq;
182179 girq->chip = irq_chip;
183− girq->fwnode = fwnode;
180+ girq->fwnode = of_node_to_fwnode(dev->of_node);
184181 girq->parent_domain = parent;
185182 girq->child_to_parent_hwirq = visconti_gpio_child_to_parent_hwirq;
186183 girq->populate_parent_alloc_arg = visconti_gpio_populate_parent_fwspec;
drivers/gpio/gpiolib-of.c+1−1
@@ -910,7 +910,7 @@ static void of_gpiochip_init_valid_mask(struct gpio_chip *chip) · 909 unmodified lines
910910 i, &start);
911911 of_property_read_u32_index(np, "gpio-reserved-ranges",
912912 i + 1, &count);
913− if (start >= chip->ngpio || start + count >= chip->ngpio)
913+ if (start >= chip->ngpio || start + count > chip->ngpio)
914914 continue;
915915
916916 bitmap_clear(chip->valid_mask, start, count);
drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c+5−0
@@ -296,6 +296,7 @@ static int amdgpu_ctx_set_stable_pstate(struct amdgpu_ctx *ctx, · 295 unmodified lines
296296 {
297297 struct amdgpu_device *adev = ctx->adev;
298298 enum amd_dpm_forced_level level;
299+ u32 current_stable_pstate;
299300 int r;
300301
301302 mutex_lock(&adev->pm.stable_pstate_ctx_lock);
@@ -304,6 +305,10 @@ static int amdgpu_ctx_set_stable_pstate(struct amdgpu_ctx *ctx, · 2 unmodified lines
304305 goto done;
305306 }
306307
308+ r = amdgpu_ctx_get_stable_pstate(ctx, &current_stable_pstate);
309+ if (r || (stable_pstate == current_stable_pstate))
310+ goto done;
311+
307312 switch (stable_pstate) {
308313 case AMDGPU_CTX_STABLE_PSTATE_NONE:
309314 level = AMD_DPM_FORCED_LEVEL_AUTO;
drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c+70−35
@@ -2395,6 +2395,71 @@ static int amdgpu_pmops_restore(struct device *dev) · 2394 unmodified lines
23952395 return amdgpu_device_resume(drm_dev, true);
23962396 }
23972397
2398+static int amdgpu_runtime_idle_check_display(struct device *dev)
2399+{
2400+ struct pci_dev *pdev = to_pci_dev(dev);
2401+ struct drm_device *drm_dev = pci_get_drvdata(pdev);
2402+ struct amdgpu_device *adev = drm_to_adev(drm_dev);
2403+
2404+ if (adev->mode_info.num_crtc) {
2405+ struct drm_connector *list_connector;
2406+ struct drm_connector_list_iter iter;
2407+ int ret = 0;
2408+
2409+ /* XXX: Return busy if any displays are connected to avoid
2410+ * possible display wakeups after runtime resume due to
2411+ * hotplug events in case any displays were connected while
2412+ * the GPU was in suspend. Remove this once that is fixed.
2413+ */
2414+ mutex_lock(&drm_dev->mode_config.mutex);
2415+ drm_connector_list_iter_begin(drm_dev, &iter);
2416+ drm_for_each_connector_iter(list_connector, &iter) {
2417+ if (list_connector->status == connector_status_connected) {
2418+ ret = -EBUSY;
2419+ break;
2420+ }
2421+ }
2422+ drm_connector_list_iter_end(&iter);
2423+ mutex_unlock(&drm_dev->mode_config.mutex);
2424+
2425+ if (ret)
2426+ return ret;
2427+
2428+ if (amdgpu_device_has_dc_support(adev)) {
2429+ struct drm_crtc *crtc;
2430+
2431+ drm_for_each_crtc(crtc, drm_dev) {
2432+ drm_modeset_lock(&crtc->mutex, NULL);
2433+ if (crtc->state->active)
2434+ ret = -EBUSY;
2435+ drm_modeset_unlock(&crtc->mutex);
2436+ if (ret < 0)
2437+ break;
2438+ }
2439+ } else {
2440+ mutex_lock(&drm_dev->mode_config.mutex);
2441+ drm_modeset_lock(&drm_dev->mode_config.connection_mutex, NULL);
2442+
2443+ drm_connector_list_iter_begin(drm_dev, &iter);
2444+ drm_for_each_connector_iter(list_connector, &iter) {
2445+ if (list_connector->dpms == DRM_MODE_DPMS_ON) {
2446+ ret = -EBUSY;
2447+ break;
2448+ }
2449+ }
2450+
2451+ drm_connector_list_iter_end(&iter);
2452+
2453+ drm_modeset_unlock(&drm_dev->mode_config.connection_mutex);
2454+ mutex_unlock(&drm_dev->mode_config.mutex);
2455+ }
2456+ if (ret)
2457+ return ret;
2458+ }
2459+
2460+ return 0;
2461+}
2462+
23982463 static int amdgpu_pmops_runtime_suspend(struct device *dev)
23992464 {
24002465 struct pci_dev *pdev = to_pci_dev(dev);
@@ -2407,6 +2472,10 @@ static int amdgpu_pmops_runtime_suspend(struct device *dev) · 6 unmodified lines
24072472 return -EBUSY;
24082473 }
24092474
2475+ ret = amdgpu_runtime_idle_check_display(dev);
2476+ if (ret)
2477+ return ret;
2478+
24102479 /* wait for all rings to drain before suspending */
24112480 for (i = 0; i < AMDGPU_MAX_RINGS; i++) {
24122481 struct amdgpu_ring *ring = adev->rings[i];
@@ -2516,41 +2585,7 @@ static int amdgpu_pmops_runtime_idle(struct device *dev) · 103 unmodified lines
25162585 return -EBUSY;
25172586 }
25182587
2519− if (amdgpu_device_has_dc_support(adev)) {
2520− struct drm_crtc *crtc;
2521−
2522− drm_for_each_crtc(crtc, drm_dev) {
2523− drm_modeset_lock(&crtc->mutex, NULL);
2524− if (crtc->state->active)
2525− ret = -EBUSY;
2526− drm_modeset_unlock(&crtc->mutex);
2527− if (ret < 0)
2528− break;
2529− }
2530−
2531− } else {
2532− struct drm_connector *list_connector;
2533− struct drm_connector_list_iter iter;
2534−
2535− mutex_lock(&drm_dev->mode_config.mutex);
2536− drm_modeset_lock(&drm_dev->mode_config.connection_mutex, NULL);
2537−
2538− drm_connector_list_iter_begin(drm_dev, &iter);
2539− drm_for_each_connector_iter(list_connector, &iter) {
2540− if (list_connector->dpms == DRM_MODE_DPMS_ON) {
2541− ret = -EBUSY;
2542− break;
2543− }
2544− }
2545−
2546− drm_connector_list_iter_end(&iter);
2547−
2548− drm_modeset_unlock(&drm_dev->mode_config.connection_mutex);
2549− mutex_unlock(&drm_dev->mode_config.mutex);
2550− }
2551−
2552− if (ret == -EBUSY)
2553− DRM_DEBUG_DRIVER("failing to power off - crtc active\n");
2588+ ret = amdgpu_runtime_idle_check_display(dev);
25542589
25552590 pm_runtime_mark_last_busy(dev);
25562591 pm_runtime_autosuspend(dev);
drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c+3−1
@@ -24,6 +24,7 @@ · 23 unmodified lines
2424 #include <linux/module.h>
2525
2626 #include <drm/drm_drv.h>
27+#include <xen/xen.h>
2728
2829 #include "amdgpu.h"
2930 #include "amdgpu_ras.h"
@@ -710,7 +711,8 @@ void amdgpu_detect_virtualization(struct amdgpu_device *adev) · 680 unmodified lines
710711 adev->virt.caps |= AMDGPU_SRIOV_CAPS_ENABLE_IOV;
711712
712713 if (!reg) {
713− if (is_virtual_machine()) /* passthrough mode exclus sriov mod */
714+ /* passthrough mode exclus sriov mod */
715+ if (is_virtual_machine() && !xen_initial_domain())
714716 adev->virt.caps |= AMDGPU_PASSTHROUGH_MODE;
715717 }
716718
drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c+10−0
@@ -1151,6 +1151,16 @@ static int gmc_v10_0_set_clockgating_state(void *handle, · 1150 unmodified lines
11511151 int r;
11521152 struct amdgpu_device *adev = (struct amdgpu_device *)handle;
11531153
1154+ /*
1155+ * The issue mmhub can't disconnect from DF with MMHUB clock gating being disabled
1156+ * is a new problem observed at DF 3.0.3, however with the same suspend sequence not
1157+ * seen any issue on the DF 3.0.2 series platform.
1158+ */
1159+ if (adev->in_s0ix && adev->ip_versions[DF_HWIP][0] > IP_VERSION(3, 0, 2)) {
1160+ dev_dbg(adev->dev, "keep mmhub clock gating being enabled for s0ix\n");
1161+ return 0;
1162+ }
1163+
11541164 r = adev->mmhub.funcs->set_clockgating(adev, state);
11551165 if (r)
11561166 return r;
drivers/gpu/drm/amd/amdgpu/vi.c+16−1
@@ -81,6 +81,10 @@ · 80 unmodified lines
8181 #include "mxgpu_vi.h"
8282 #include "amdgpu_dm.h"
8383
84+#if IS_ENABLED(CONFIG_X86)
85+#include <asm/intel-family.h>
86+#endif
87+
8488 #define ixPCIE_LC_L1_PM_SUBSTATE 0x100100C6
8589 #define PCIE_LC_L1_PM_SUBSTATE__LC_L1_SUBSTATES_OVERRIDE_EN_MASK 0x00000001L
8690 #define PCIE_LC_L1_PM_SUBSTATE__LC_PCI_PM_L1_2_OVERRIDE_MASK 0x00000002L
@@ -1134,13 +1138,24 @@ static void vi_enable_aspm(struct amdgpu_device *adev) · 1047 unmodified lines
11341138 WREG32_PCIE(ixPCIE_LC_CNTL, data);
11351139 }
11361140
1141+static bool aspm_support_quirk_check(void)
1142+{
1143+#if IS_ENABLED(CONFIG_X86)
1144+ struct cpuinfo_x86 *c = &cpu_data(0);
1145+
1146+ return !(c->x86 == 6 && c->x86_model == INTEL_FAM6_ALDERLAKE);
1147+#else
1148+ return true;
1149+#endif
1150+}
1151+
11371152 static void vi_program_aspm(struct amdgpu_device *adev)
11381153 {
11391154 u32 data, data1, orig;
11401155 bool bL1SS = false;
11411156 bool bClkReqSupport = true;
11421157
1143− if (!amdgpu_device_should_use_aspm(adev))
1158+ if (!amdgpu_device_should_use_aspm(adev) || !aspm_support_quirk_check())
11441159 return;
11451160
11461161 if (adev->flags & AMD_IS_APU ||
drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c+37−46
@@ -130,19 +130,33 @@ void program_sh_mem_settings(struct device_queue_manager *dqm, · 129 unmodified lines
130130 }
131131
132132 static void increment_queue_count(struct device_queue_manager *dqm,
133− enum kfd_queue_type type)
133+ struct qcm_process_device *qpd,
134+ struct queue *q)
134135 {
135136 dqm->active_queue_count++;
136− if (type == KFD_QUEUE_TYPE_COMPUTE || type == KFD_QUEUE_TYPE_DIQ)
137+ if (q->properties.type == KFD_QUEUE_TYPE_COMPUTE ||
138+ q->properties.type == KFD_QUEUE_TYPE_DIQ)
137139 dqm->active_cp_queue_count++;
140+
141+ if (q->properties.is_gws) {
142+ dqm->gws_queue_count++;
143+ qpd->mapped_gws_queue = true;
144+ }
138145 }
139146
140147 static void decrement_queue_count(struct device_queue_manager *dqm,
141− enum kfd_queue_type type)
148+ struct qcm_process_device *qpd,
149+ struct queue *q)
142150 {
143151 dqm->active_queue_count--;
144− if (type == KFD_QUEUE_TYPE_COMPUTE || type == KFD_QUEUE_TYPE_DIQ)
152+ if (q->properties.type == KFD_QUEUE_TYPE_COMPUTE ||
153+ q->properties.type == KFD_QUEUE_TYPE_DIQ)
145154 dqm->active_cp_queue_count--;
155+
156+ if (q->properties.is_gws) {
157+ dqm->gws_queue_count--;
158+ qpd->mapped_gws_queue = false;
159+ }
146160 }
147161
148162 /*
@@ -412,7 +426,7 @@ add_queue_to_list: · 263 unmodified lines
412426 list_add(&q->list, &qpd->queues_list);
413427 qpd->queue_count++;
414428 if (q->properties.is_active)
415− increment_queue_count(dqm, q->properties.type);
429+ increment_queue_count(dqm, qpd, q);
416430
417431 /*
418432 * Unconditionally increment this counter, regardless of the queue's
@@ -601,13 +615,8 @@ static int destroy_queue_nocpsch_locked(struct device_queue_manager *dqm, · 182 unmodified lines
601615 deallocate_vmid(dqm, qpd, q);
602616 }
603617 qpd->queue_count--;
604− if (q->properties.is_active) {
605− decrement_queue_count(dqm, q->properties.type);
606− if (q->properties.is_gws) {
607− dqm->gws_queue_count--;
608− qpd->mapped_gws_queue = false;
609− }
610− }
618+ if (q->properties.is_active)
619+ decrement_queue_count(dqm, qpd, q);
611620
612621 return retval;
613622 }
@@ -700,12 +709,11 @@ static int update_queue(struct device_queue_manager *dqm, struct queue *q, · 86 unmodified lines
700709 * dqm->active_queue_count to determine whether a new runlist must be
701710 * uploaded.
702711 */
703− if (q->properties.is_active && !prev_active)
704− increment_queue_count(dqm, q->properties.type);
705− else if (!q->properties.is_active && prev_active)
706− decrement_queue_count(dqm, q->properties.type);
707−
708− if (q->gws && !q->properties.is_gws) {
712+ if (q->properties.is_active && !prev_active) {
713+ increment_queue_count(dqm, &pdd->qpd, q);
714+ } else if (!q->properties.is_active && prev_active) {
715+ decrement_queue_count(dqm, &pdd->qpd, q);
716+ } else if (q->gws && !q->properties.is_gws) {
709717 if (q->properties.is_active) {
710718 dqm->gws_queue_count++;
711719 pdd->qpd.mapped_gws_queue = true;
@@ -767,11 +775,7 @@ static int evict_process_queues_nocpsch(struct device_queue_manager *dqm, · 55 unmodified lines
767775 mqd_mgr = dqm->mqd_mgrs[get_mqd_type_from_queue_type(
768776 q->properties.type)];
769777 q->properties.is_active = false;
770− decrement_queue_count(dqm, q->properties.type);
771− if (q->properties.is_gws) {
772− dqm->gws_queue_count--;
773− qpd->mapped_gws_queue = false;
774− }
778+ decrement_queue_count(dqm, qpd, q);
775779
776780 if (WARN_ONCE(!dqm->sched_running, "Evict when stopped\n"))
777781 continue;
@@ -817,7 +821,7 @@ static int evict_process_queues_cpsch(struct device_queue_manager *dqm, · 39 unmodified lines
817821 continue;
818822
819823 q->properties.is_active = false;
820− decrement_queue_count(dqm, q->properties.type);
824+ decrement_queue_count(dqm, qpd, q);
821825 }
822826 pdd->last_evict_timestamp = get_jiffies_64();
823827 retval = execute_queues_cpsch(dqm,
@@ -888,11 +892,7 @@ static int restore_process_queues_nocpsch(struct device_queue_manager *dqm, · 64 unmodified lines
888892 mqd_mgr = dqm->mqd_mgrs[get_mqd_type_from_queue_type(
889893 q->properties.type)];
890894 q->properties.is_active = true;
891− increment_queue_count(dqm, q->properties.type);
892− if (q->properties.is_gws) {
893− dqm->gws_queue_count++;
894− qpd->mapped_gws_queue = true;
895− }
895+ increment_queue_count(dqm, qpd, q);
896896
897897 if (WARN_ONCE(!dqm->sched_running, "Restore when stopped\n"))
898898 continue;
@@ -950,7 +950,7 @@ static int restore_process_queues_cpsch(struct device_queue_manager *dqm, · 51 unmodified lines
950950 continue;
951951
952952 q->properties.is_active = true;
953− increment_queue_count(dqm, q->properties.type);
953+ increment_queue_count(dqm, &pdd->qpd, q);
954954 }
955955 retval = execute_queues_cpsch(dqm,
956956 KFD_UNMAP_QUEUES_FILTER_DYNAMIC_QUEUES, 0);
@@ -1378,7 +1378,7 @@ static int create_kernel_queue_cpsch(struct device_queue_manager *dqm, · 421 unmodified lines
13781378 dqm->total_queue_count);
13791379
13801380 list_add(&kq->list, &qpd->priv_queue_list);
1381− increment_queue_count(dqm, kq->queue->properties.type);
1381+ increment_queue_count(dqm, qpd, kq->queue);
13821382 qpd->is_debug = true;
13831383 execute_queues_cpsch(dqm, KFD_UNMAP_QUEUES_FILTER_DYNAMIC_QUEUES, 0);
13841384 dqm_unlock(dqm);
@@ -1392,7 +1392,7 @@ static void destroy_kernel_queue_cpsch(struct device_queue_manager *dqm, · 7 unmodified lines
13921392 {
13931393 dqm_lock(dqm);
13941394 list_del(&kq->list);
1395− decrement_queue_count(dqm, kq->queue->properties.type);
1395+ decrement_queue_count(dqm, qpd, kq->queue);
13961396 qpd->is_debug = false;
13971397 execute_queues_cpsch(dqm, KFD_UNMAP_QUEUES_FILTER_ALL_QUEUES, 0);
13981398 /*
@@ -1467,7 +1467,7 @@ static int create_queue_cpsch(struct device_queue_manager *dqm, struct queue *q, · 68 unmodified lines
14671467 qpd->queue_count++;
14681468
14691469 if (q->properties.is_active) {
1470− increment_queue_count(dqm, q->properties.type);
1470+ increment_queue_count(dqm, qpd, q);
14711471
14721472 execute_queues_cpsch(dqm,
14731473 KFD_UNMAP_QUEUES_FILTER_DYNAMIC_QUEUES, 0);
@@ -1683,15 +1683,11 @@ static int destroy_queue_cpsch(struct device_queue_manager *dqm, · 209 unmodified lines
16831683 list_del(&q->list);
16841684 qpd->queue_count--;
16851685 if (q->properties.is_active) {
1686− decrement_queue_count(dqm, q->properties.type);
1686+ decrement_queue_count(dqm, qpd, q);
16871687 retval = execute_queues_cpsch(dqm,
16881688 KFD_UNMAP_QUEUES_FILTER_DYNAMIC_QUEUES, 0);
16891689 if (retval == -ETIME)
16901690 qpd->reset_wavefronts = true;
1691− if (q->properties.is_gws) {
1692− dqm->gws_queue_count--;
1693− qpd->mapped_gws_queue = false;
1694− }
16951691 }
16961692
16971693 /*
@@ -1932,7 +1928,7 @@ static int process_termination_cpsch(struct device_queue_manager *dqm, · 234 unmodified lines
19321928 /* Clean all kernel queues */
19331929 list_for_each_entry_safe(kq, kq_next, &qpd->priv_queue_list, list) {
19341930 list_del(&kq->list);
1935− decrement_queue_count(dqm, kq->queue->properties.type);
1931+ decrement_queue_count(dqm, qpd, kq->queue);
19361932 qpd->is_debug = false;
19371933 dqm->total_queue_count--;
19381934 filter = KFD_UNMAP_QUEUES_FILTER_ALL_QUEUES;
@@ -1945,13 +1941,8 @@ static int process_termination_cpsch(struct device_queue_manager *dqm, · 6 unmodified lines
19451941 else if (q->properties.type == KFD_QUEUE_TYPE_SDMA_XGMI)
19461942 deallocate_sdma_queue(dqm, q);
19471943
1948− if (q->properties.is_active) {
1949− decrement_queue_count(dqm, q->properties.type);
1950− if (q->properties.is_gws) {
1951− dqm->gws_queue_count--;
1952− qpd->mapped_gws_queue = false;
1953− }
1954− }
1944+ if (q->properties.is_active)
1945+ decrement_queue_count(dqm, qpd, q);
19551946
19561947 dqm->total_queue_count--;
19571948 }
drivers/gpu/drm/amd/amdkfd/kfd_priv.h+1−1
@@ -1103,7 +1103,7 @@ struct kfd_criu_queue_priv_data { · 1102 unmodified lines
11031103 uint32_t priority;
11041104 uint32_t q_percent;
11051105 uint32_t doorbell_id;
1106− uint32_t is_gws;
1106+ uint32_t gws;
11071107 uint32_t sdma_id;
11081108 uint32_t eop_ring_buffer_size;
11091109 uint32_t ctx_save_restore_area_size;
drivers/gpu/drm/amd/amdkfd/kfd_process_queue_manager.c+7−3
@@ -636,6 +636,8 @@ static int criu_checkpoint_queue(struct kfd_process_device *pdd, · 635 unmodified lines
636636 q_data->ctx_save_restore_area_size =
637637 q->properties.ctx_save_restore_area_size;
638638
639+ q_data->gws = !!q->gws;
640+
639641 ret = pqm_checkpoint_mqd(&pdd->process->pqm, q->properties.queue_id, mqd, ctl_stack);
640642 if (ret) {
641643 pr_err("Failed checkpoint queue_mqd (%d)\n", ret);
@@ -743,7 +745,6 @@ static void set_queue_properties_from_criu(struct queue_properties *qp, · 101 unmodified lines
743745 struct kfd_criu_queue_priv_data *q_data)
744746 {
745747 qp->is_interop = false;
746− qp->is_gws = q_data->is_gws;
747748 qp->queue_percent = q_data->q_percent;
748749 qp->priority = q_data->priority;
749750 qp->queue_address = q_data->q_address;
@@ -826,12 +827,15 @@ int kfd_criu_restore_queue(struct kfd_process *p, · 76 unmodified lines
826827 NULL);
827828 if (ret) {
828829 pr_err("Failed to create new queue err:%d\n", ret);
829− ret = -EINVAL;
830+ goto exit;
830831 }
831832
833+ if (q_data->gws)
834+ ret = pqm_set_gws(&p->pqm, q_data->q_id, pdd->dev->gws);
835+
832836 exit:
833837 if (ret)
834− pr_err("Failed to create queue (%d)\n", ret);
838+ pr_err("Failed to restore queue (%d)\n", ret);
835839 else
836840 pr_debug("Queue id %d was restored successfully\n", queue_id);
837841
drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c+1−1
@@ -4440,7 +4440,7 @@ static void dp_test_get_audio_test_data(struct dc_link *link, bool disable_video · 4439 unmodified lines
44404440 &dpcd_pattern_type.value,
44414441 sizeof(dpcd_pattern_type));
44424442
4443− channel_count = dpcd_test_mode.bits.channel_count + 1;
4443+ channel_count = min(dpcd_test_mode.bits.channel_count + 1, AUDIO_CHANNELS_COUNT);
44444444
44454445 // read pattern periods for requested channels when sawTooth pattern is requested
44464446 if (dpcd_pattern_type.value == AUDIO_TEST_PATTERN_SAWTOOTH ||
drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c+1−0
@@ -997,6 +997,7 @@ static struct clock_source *dcn21_clock_source_create( · 996 unmodified lines
997997 return &clk_src->base;
998998 }
999999
1000+ kfree(clk_src);
10001001 BREAK_TO_DEBUGGER();
10011002 return NULL;
10021003 }
drivers/gpu/drm/amd/display/dc/dcn31/dcn31_init.c+0−5
@@ -153,9 +153,4 @@ void dcn31_hw_sequencer_construct(struct dc *dc) · 152 unmodified lines
153153 dc->hwss.init_hw = dcn20_fpga_init_hw;
154154 dc->hwseq->funcs.init_pipes = NULL;
155155 }
156− if (dc->debug.disable_z10) {
157− /*hw not support z10 or sw disable it*/
158− dc->hwss.z10_restore = NULL;
159− dc->hwss.z10_save_init = NULL;
160− }
161156 }
drivers/gpu/drm/amd/pm/amdgpu_dpm.c+39−0
@@ -427,6 +427,7 @@ int amdgpu_dpm_read_sensor(struct amdgpu_device *adev, enum amd_pp_sensors senso · 426 unmodified lines
427427 void amdgpu_dpm_compute_clocks(struct amdgpu_device *adev)
428428 {
429429 const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs;
430+ int i;
430431
431432 if (!adev->pm.dpm_enabled)
432433 return;
@@ -434,6 +435,15 @@ void amdgpu_dpm_compute_clocks(struct amdgpu_device *adev) · 1 unmodified line
434435 if (!pp_funcs->pm_compute_clocks)
435436 return;
436437
438+ if (adev->mode_info.num_crtc)
439+ amdgpu_display_bandwidth_update(adev);
440+
441+ for (i = 0; i < AMDGPU_MAX_RINGS; i++) {
442+ struct amdgpu_ring *ring = adev->rings[i];
443+ if (ring && ring->sched.ready)
444+ amdgpu_fence_wait_empty(ring);
445+ }
446+
437447 mutex_lock(&adev->pm.mutex);
438448 pp_funcs->pm_compute_clocks(adev->powerplay.pp_handle);
439449 mutex_unlock(&adev->pm.mutex);
@@ -443,6 +453,20 @@ void amdgpu_dpm_enable_uvd(struct amdgpu_device *adev, bool enable) · 3 unmodified lines
443453 {
444454 int ret = 0;
445455
456+ if (adev->family == AMDGPU_FAMILY_SI) {
457+ mutex_lock(&adev->pm.mutex);
458+ if (enable) {
459+ adev->pm.dpm.uvd_active = true;
460+ adev->pm.dpm.state = POWER_STATE_TYPE_INTERNAL_UVD;
461+ } else {
462+ adev->pm.dpm.uvd_active = false;
463+ }
464+ mutex_unlock(&adev->pm.mutex);
465+
466+ amdgpu_dpm_compute_clocks(adev);
467+ return;
468+ }
469+
446470 ret = amdgpu_dpm_set_powergating_by_smu(adev, AMD_IP_BLOCK_TYPE_UVD, !enable);
447471 if (ret)
448472 DRM_ERROR("Dpm %s uvd failed, ret = %d. \n",
@@ -453,6 +477,21 @@ void amdgpu_dpm_enable_vce(struct amdgpu_device *adev, bool enable) · 4 unmodified lines
453477 {
454478 int ret = 0;
455479
480+ if (adev->family == AMDGPU_FAMILY_SI) {
481+ mutex_lock(&adev->pm.mutex);
482+ if (enable) {
483+ adev->pm.dpm.vce_active = true;
484+ /* XXX select vce level based on ring/task */
485+ adev->pm.dpm.vce_level = AMD_VCE_LEVEL_AC_ALL;
486+ } else {
487+ adev->pm.dpm.vce_active = false;
488+ }
489+ mutex_unlock(&adev->pm.mutex);
490+
491+ amdgpu_dpm_compute_clocks(adev);
492+ return;
493+ }
494+
456495 ret = amdgpu_dpm_set_powergating_by_smu(adev, AMD_IP_BLOCK_TYPE_VCE, !enable);
457496 if (ret)
458497 DRM_ERROR("Dpm %s vce failed, ret = %d. \n",
drivers/gpu/drm/amd/pm/legacy-dpm/legacy_dpm.c+0−10
@@ -1028,16 +1028,6 @@ static int amdgpu_dpm_change_power_state_locked(struct amdgpu_device *adev) · 1027 unmodified lines
10281028 void amdgpu_legacy_dpm_compute_clocks(void *handle)
10291029 {
10301030 struct amdgpu_device *adev = (struct amdgpu_device *)handle;
1031− int i = 0;
1032−
1033− if (adev->mode_info.num_crtc)
1034− amdgpu_display_bandwidth_update(adev);
1035−
1036− for (i = 0; i < AMDGPU_MAX_RINGS; i++) {
1037− struct amdgpu_ring *ring = adev->rings[i];
1038− if (ring && ring->sched.ready)
1039− amdgpu_fence_wait_empty(ring);
1040− }
10411031
10421032 amdgpu_dpm_get_active_displays(adev);
10431033
drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c+0−35
@@ -3892,40 +3892,6 @@ static int si_set_boot_state(struct amdgpu_device *adev) · 3891 unmodified lines
38923892 }
38933893 #endif
38943894
3895−static int si_set_powergating_by_smu(void *handle,
3896− uint32_t block_type,
3897− bool gate)
3898−{
3899− struct amdgpu_device *adev = (struct amdgpu_device *)handle;
3900−
3901− switch (block_type) {
3902− case AMD_IP_BLOCK_TYPE_UVD:
3903− if (!gate) {
3904− adev->pm.dpm.uvd_active = true;
3905− adev->pm.dpm.state = POWER_STATE_TYPE_INTERNAL_UVD;
3906− } else {
3907− adev->pm.dpm.uvd_active = false;
3908− }
3909−
3910− amdgpu_legacy_dpm_compute_clocks(handle);
3911− break;
3912− case AMD_IP_BLOCK_TYPE_VCE:
3913− if (!gate) {
3914− adev->pm.dpm.vce_active = true;
3915− /* XXX select vce level based on ring/task */
3916− adev->pm.dpm.vce_level = AMD_VCE_LEVEL_AC_ALL;
3917− } else {
3918− adev->pm.dpm.vce_active = false;
3919− }
3920−
3921− amdgpu_legacy_dpm_compute_clocks(handle);
3922− break;
3923− default:
3924− break;
3925− }
3926− return 0;
3927−}
3928−
39293895 static int si_set_sw_state(struct amdgpu_device *adev)
39303896 {
39313897 return (amdgpu_si_send_msg_to_smc(adev, PPSMC_MSG_SwitchToSwState) == PPSMC_Result_OK) ?
@@ -8125,7 +8091,6 @@ static const struct amd_pm_funcs si_dpm_funcs = { · 4193 unmodified lines
81258091 .print_power_state = &si_dpm_print_power_state,
81268092 .debugfs_print_current_performance_level = &si_dpm_debugfs_print_current_performance_level,
81278093 .force_performance_level = &si_dpm_force_performance_level,
8128− .set_powergating_by_smu = &si_set_powergating_by_smu,
81298094 .vblank_too_short = &si_dpm_vblank_too_short,
81308095 .set_fan_control_mode = &si_dpm_set_fan_control_mode,
81318096 .get_fan_control_mode = &si_dpm_get_fan_control_mode,
drivers/gpu/drm/amd/pm/powerplay/amd_powerplay.c+0−10
@@ -1487,16 +1487,6 @@ static void pp_pm_compute_clocks(void *handle) · 1486 unmodified lines
14871487 {
14881488 struct pp_hwmgr *hwmgr = handle;
14891489 struct amdgpu_device *adev = hwmgr->adev;
1490− int i = 0;
1491−
1492− if (adev->mode_info.num_crtc)
1493− amdgpu_display_bandwidth_update(adev);
1494−
1495− for (i = 0; i < AMDGPU_MAX_RINGS; i++) {
1496− struct amdgpu_ring *ring = adev->rings[i];
1497− if (ring && ring->sched.ready)
1498− amdgpu_fence_wait_empty(ring);
1499− }
15001490
15011491 if (!amdgpu_device_has_dc_support(adev)) {
15021492 amdgpu_dpm_get_active_displays(adev);
drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c+1−7
@@ -1351,14 +1351,8 @@ static int smu_disable_dpms(struct smu_context *smu) · 1350 unmodified lines
13511351 {
13521352 struct amdgpu_device *adev = smu->adev;
13531353 int ret = 0;
1354− /*
1355− * TODO: (adev->in_suspend && !adev->in_s0ix) is added to pair
1356− * the workaround which always reset the asic in suspend.
1357− * It's likely that workaround will be dropped in the future.
1358− * Then the change here should be dropped together.
1359− */
13601354 bool use_baco = !smu->is_apu &&
1361− (((amdgpu_in_reset(adev) || (adev->in_suspend && !adev->in_s0ix)) &&
1355+ ((amdgpu_in_reset(adev) &&
13621356 (amdgpu_asic_reset_method(adev) == AMD_RESET_METHOD_BACO)) ||
13631357 ((adev->in_runpm || adev->in_s4) && amdgpu_asic_supports_baco(adev)));
13641358
drivers/gpu/drm/bridge/Kconfig+1−0
@@ -78,6 +78,7 @@ config DRM_ITE_IT6505 · 77 unmodified lines
7878 tristate "ITE IT6505 DisplayPort bridge"
7979 depends on OF
8080 select DRM_KMS_HELPER
81+ select DRM_DP_HELPER
8182 select EXTCON
8283 help
8384 ITE IT6505 DisplayPort bridge chip driver.
drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c+26−8
@@ -97,6 +97,14 @@ · 96 unmodified lines
9797
9898 #define INTEL_EDP_BRIGHTNESS_OPTIMIZATION_1 0x359
9999
100+enum intel_dp_aux_backlight_modparam {
101+ INTEL_DP_AUX_BACKLIGHT_AUTO = -1,
102+ INTEL_DP_AUX_BACKLIGHT_OFF = 0,
103+ INTEL_DP_AUX_BACKLIGHT_ON = 1,
104+ INTEL_DP_AUX_BACKLIGHT_FORCE_VESA = 2,
105+ INTEL_DP_AUX_BACKLIGHT_FORCE_INTEL = 3,
106+};
107+
100108 /* Intel EDP backlight callbacks */
101109 static bool
102110 intel_dp_aux_supports_hdr_backlight(struct intel_connector *connector)
@@ -126,6 +134,24 @@ intel_dp_aux_supports_hdr_backlight(struct intel_connector *connector) · 23 unmodified lines
126134 return false;
127135 }
128136
137+ /*
138+ * If we don't have HDR static metadata there is no way to
139+ * runtime detect used range for nits based control. For now
140+ * do not use Intel proprietary eDP backlight control if we
141+ * don't have this data in panel EDID. In case we find panel
142+ * which supports only nits based control, but doesn't provide
143+ * HDR static metadata we need to start maintaining table of
144+ * ranges for such panels.
145+ */
146+ if (i915->params.enable_dpcd_backlight != INTEL_DP_AUX_BACKLIGHT_FORCE_INTEL &&
147+ !(connector->base.hdr_sink_metadata.hdmi_type1.metadata_type &
148+ BIT(HDMI_STATIC_METADATA_TYPE1))) {
149+ drm_info(&i915->drm,
150+ "Panel is missing HDR static metadata. Possible support for Intel HDR backlight interface is not used. If your backlight controls don't work try booting with i915.enable_dpcd_backlight=%d. needs this, please file a _new_ bug report on drm/i915, see " FDO_BUG_URL " for details.\n",
151+ INTEL_DP_AUX_BACKLIGHT_FORCE_INTEL);
152+ return false;
153+ }
154+
129155 panel->backlight.edp.intel.sdr_uses_aux =
130156 tcon_cap[2] & INTEL_EDP_SDR_TCON_BRIGHTNESS_AUX_CAP;
131157
@@ -413,14 +439,6 @@ static const struct intel_panel_bl_funcs intel_dp_vesa_bl_funcs = { · 281 unmodified lines
413439 .get = intel_dp_aux_vesa_get_backlight,
414440 };
415441
416−enum intel_dp_aux_backlight_modparam {
417− INTEL_DP_AUX_BACKLIGHT_AUTO = -1,
418− INTEL_DP_AUX_BACKLIGHT_OFF = 0,
419− INTEL_DP_AUX_BACKLIGHT_ON = 1,
420− INTEL_DP_AUX_BACKLIGHT_FORCE_VESA = 2,
421− INTEL_DP_AUX_BACKLIGHT_FORCE_INTEL = 3,
422−};
423−
424442 int intel_dp_aux_init_backlight_funcs(struct intel_connector *connector)
425443 {
426444 struct drm_device *dev = connector->base.dev;
drivers/gpu/drm/i915/display/intel_fbc.c+1−1
@@ -1037,7 +1037,7 @@ static int intel_fbc_check_plane(struct intel_atomic_state *state, · 1036 unmodified lines
10371037 struct intel_plane_state *plane_state =
10381038 intel_atomic_get_new_plane_state(state, plane);
10391039 const struct drm_framebuffer *fb = plane_state->hw.fb;
1040− struct intel_crtc *crtc = to_intel_crtc(plane_state->uapi.crtc);
1040+ struct intel_crtc *crtc = to_intel_crtc(plane_state->hw.crtc);
10411041 const struct intel_crtc_state *crtc_state;
10421042 struct intel_fbc *fbc = plane->fbc;
10431043
drivers/gpu/drm/i915/i915_reg.h+3−3
@@ -4345,12 +4345,12 @@ · 4344 unmodified lines
43454345 #define _DSPAADDR 0x70184
43464346 #define _DSPASTRIDE 0x70188
43474347 #define _DSPAPOS 0x7018C /* reserved */
4348−#define DISP_POS_Y_MASK REG_GENMASK(31, 0)
4348+#define DISP_POS_Y_MASK REG_GENMASK(31, 16)
43494349 #define DISP_POS_Y(y) REG_FIELD_PREP(DISP_POS_Y_MASK, (y))
43504350 #define DISP_POS_X_MASK REG_GENMASK(15, 0)
43514351 #define DISP_POS_X(x) REG_FIELD_PREP(DISP_POS_X_MASK, (x))
43524352 #define _DSPASIZE 0x70190
4353−#define DISP_HEIGHT_MASK REG_GENMASK(31, 0)
4353+#define DISP_HEIGHT_MASK REG_GENMASK(31, 16)
43544354 #define DISP_HEIGHT(h) REG_FIELD_PREP(DISP_HEIGHT_MASK, (h))
43554355 #define DISP_WIDTH_MASK REG_GENMASK(15, 0)
43564356 #define DISP_WIDTH(w) REG_FIELD_PREP(DISP_WIDTH_MASK, (w))
@@ -5152,7 +5152,7 @@ · 795 unmodified lines
51525152 #define _SEL_FETCH_PLANE_BASE_6_A 0x70940
51535153 #define _SEL_FETCH_PLANE_BASE_7_A 0x70960
51545154 #define _SEL_FETCH_PLANE_BASE_CUR_A 0x70880
5155−#define _SEL_FETCH_PLANE_BASE_1_B 0x70990
5155+#define _SEL_FETCH_PLANE_BASE_1_B 0x71890
51565156
51575157 #define _SEL_FETCH_PLANE_BASE_A(plane) _PICK(plane, \
51585158 _SEL_FETCH_PLANE_BASE_1_A, \
drivers/gpu/drm/i915/i915_vma.c+7−4
@@ -1605,17 +1605,17 @@ void i915_vma_close(struct i915_vma *vma) · 1604 unmodified lines
16051605
16061606 static void __i915_vma_remove_closed(struct i915_vma *vma)
16071607 {
1608− struct intel_gt *gt = vma->vm->gt;
1609−
1610− spin_lock_irq(&gt->closed_lock);
16111608 list_del_init(&vma->closed_link);
1612− spin_unlock_irq(&gt->closed_lock);
16131609 }
16141610
16151611 void i915_vma_reopen(struct i915_vma *vma)
16161612 {
1613+ struct intel_gt *gt = vma->vm->gt;
1614+
1615+ spin_lock_irq(&gt->closed_lock);
16171616 if (i915_vma_is_closed(vma))
16181617 __i915_vma_remove_closed(vma);
1618+ spin_unlock_irq(&gt->closed_lock);
16191619 }
16201620
16211621 void i915_vma_release(struct kref *ref)
@@ -1641,6 +1641,7 @@ static void force_unbind(struct i915_vma *vma) · 19 unmodified lines
16411641 static void release_references(struct i915_vma *vma)
16421642 {
16431643 struct drm_i915_gem_object *obj = vma->obj;
1644+ struct intel_gt *gt = vma->vm->gt;
16441645
16451646 GEM_BUG_ON(i915_vma_is_active(vma));
16461647
@@ -1650,7 +1651,9 @@ static void release_references(struct i915_vma *vma) · 3 unmodified lines
16501651 rb_erase(&vma->obj_node, &obj->vma.tree);
16511652 spin_unlock(&obj->vma.lock);
16521653
1654+ spin_lock_irq(&gt->closed_lock);
16531655 __i915_vma_remove_closed(vma);
1656+ spin_unlock_irq(&gt->closed_lock);
16541657
16551658 __i915_vma_put(vma);
16561659 }
drivers/gpu/drm/msm/dp/dp_display.c+0−6
@@ -580,12 +580,6 @@ static int dp_hpd_plug_handle(struct dp_display_private *dp, u32 data) · 579 unmodified lines
580580 dp->dp_display.connector_type, state);
581581 mutex_unlock(&dp->event_mutex);
582582
583− /*
584− * add fail safe mode outside event_mutex scope
585− * to avoid potiential circular lock with drm thread
586− */
587− dp_panel_add_fail_safe_mode(dp->dp_display.connector);
588−
589583 /* uevent will complete connection part */
590584 return 0;
591585 };
drivers/gpu/drm/msm/dp/dp_panel.c+0−11
@@ -151,15 +151,6 @@ static int dp_panel_update_modes(struct drm_connector *connector, · 150 unmodified lines
151151 return rc;
152152 }
153153
154−void dp_panel_add_fail_safe_mode(struct drm_connector *connector)
155−{
156− /* fail safe edid */
157− mutex_lock(&connector->dev->mode_config.mutex);
158− if (drm_add_modes_noedid(connector, 640, 480))
159− drm_set_preferred_mode(connector, 640, 480);
160− mutex_unlock(&connector->dev->mode_config.mutex);
161−}
162−
163154 int dp_panel_read_sink_caps(struct dp_panel *dp_panel,
164155 struct drm_connector *connector)
165156 {
@@ -215,8 +206,6 @@ int dp_panel_read_sink_caps(struct dp_panel *dp_panel, · 49 unmodified lines
215206 rc = -ETIMEDOUT;
216207 goto end;
217208 }
218−
219− dp_panel_add_fail_safe_mode(connector);
220209 }
221210
222211 if (panel->aux_cfg_update_done) {
drivers/gpu/drm/msm/dp/dp_panel.h+0−1
@@ -59,7 +59,6 @@ int dp_panel_init_panel_info(struct dp_panel *dp_panel); · 58 unmodified lines
5959 int dp_panel_deinit(struct dp_panel *dp_panel);
6060 int dp_panel_timing_cfg(struct dp_panel *dp_panel);
6161 void dp_panel_dump_regs(struct dp_panel *dp_panel);
62−void dp_panel_add_fail_safe_mode(struct drm_connector *connector);
6362 int dp_panel_read_sink_caps(struct dp_panel *dp_panel,
6463 struct drm_connector *connector);
6564 u32 dp_panel_get_mode_bpp(struct dp_panel *dp_panel, u32 mode_max_bpp,
drivers/gpu/drm/nouveau/nouveau_backlight.c+5−4
@@ -46,8 +46,9 @@ static bool · 45 unmodified lines
4646 nouveau_get_backlight_name(char backlight_name[BL_NAME_SIZE],
4747 struct nouveau_backlight *bl)
4848 {
49− const int nb = ida_simple_get(&bl_ida, 0, 0, GFP_KERNEL);
50− if (nb < 0 || nb >= 100)
49+ const int nb = ida_alloc_max(&bl_ida, 99, GFP_KERNEL);
50+
51+ if (nb < 0)
5152 return false;
5253 if (nb > 0)
5354 snprintf(backlight_name, BL_NAME_SIZE, "nv_backlight%d", nb);
@@ -414,7 +415,7 @@ nouveau_backlight_init(struct drm_connector *connector) · 360 unmodified lines
414415 nv_encoder, ops, &props);
415416 if (IS_ERR(bl->dev)) {
416417 if (bl->id >= 0)
417− ida_simple_remove(&bl_ida, bl->id);
418+ ida_free(&bl_ida, bl->id);
418419 ret = PTR_ERR(bl->dev);
419420 goto fail_alloc;
420421 }
@@ -442,7 +443,7 @@ nouveau_backlight_fini(struct drm_connector *connector) · 21 unmodified lines
442443 return;
443444
444445 if (bl->id >= 0)
445− ida_simple_remove(&bl_ida, bl->id);
446+ ida_free(&bl_ida, bl->id);
446447
447448 backlight_device_unregister(bl->dev);
448449 nv_conn->backlight = NULL;
drivers/gpu/drm/nouveau/nvkm/engine/device/tegra.c+1−1
@@ -123,7 +123,7 @@ nvkm_device_tegra_probe_iommu(struct nvkm_device_tegra *tdev) · 122 unmodified lines
123123
124124 mutex_init(&tdev->iommu.mutex);
125125
126− if (iommu_present(&platform_bus_type)) {
126+ if (device_iommu_mapped(dev)) {
127127 tdev->iommu.domain = iommu_domain_alloc(&platform_bus_type);
128128 if (!tdev->iommu.domain)
129129 goto error;
drivers/gpu/drm/sun4i/sun4i_frontend.c+0−3
@@ -222,13 +222,11 @@ void sun4i_frontend_update_buffer(struct sun4i_frontend *frontend, · 221 unmodified lines
222222
223223 /* Set the physical address of the buffer in memory */
224224 paddr = drm_fb_cma_get_gem_addr(fb, state, 0);
225− paddr -= PHYS_OFFSET;
226225 DRM_DEBUG_DRIVER("Setting buffer #0 address to %pad\n", &paddr);
227226 regmap_write(frontend->regs, SUN4I_FRONTEND_BUF_ADDR0_REG, paddr);
228227
229228 if (fb->format->num_planes > 1) {
230229 paddr = drm_fb_cma_get_gem_addr(fb, state, swap ? 2 : 1);
231− paddr -= PHYS_OFFSET;
232230 DRM_DEBUG_DRIVER("Setting buffer #1 address to %pad\n", &paddr);
233231 regmap_write(frontend->regs, SUN4I_FRONTEND_BUF_ADDR1_REG,
234232 paddr);
@@ -236,7 +234,6 @@ void sun4i_frontend_update_buffer(struct sun4i_frontend *frontend, · 1 unmodified line
236234
237235 if (fb->format->num_planes > 2) {
238236 paddr = drm_fb_cma_get_gem_addr(fb, state, swap ? 1 : 2);
239− paddr -= PHYS_OFFSET;
240237 DRM_DEBUG_DRIVER("Setting buffer #2 address to %pad\n", &paddr);
241238 regmap_write(frontend->regs, SUN4I_FRONTEND_BUF_ADDR2_REG,
242239 paddr);
drivers/gpu/drm/vc4/vc4_hdmi.c+1−0
@@ -38,6 +38,7 @@ · 37 unmodified lines
3838 #include <drm/drm_scdc_helper.h>
3939 #include <linux/clk.h>
4040 #include <linux/component.h>
41+#include <linux/gpio/consumer.h>
4142 #include <linux/i2c.h>
4243 #include <linux/of_address.h>
4344 #include <linux/of_gpio.h>
drivers/gpu/drm/vmwgfx/vmwgfx_cmd.c+8−5
@@ -528,7 +528,7 @@ int vmw_cmd_send_fence(struct vmw_private *dev_priv, uint32_t *seqno) · 527 unmodified lines
528528 *seqno = atomic_add_return(1, &dev_priv->marker_seq);
529529 } while (*seqno == 0);
530530
531− if (!(vmw_fifo_caps(dev_priv) & SVGA_FIFO_CAP_FENCE)) {
531+ if (!vmw_has_fences(dev_priv)) {
532532
533533 /*
534534 * Don't request hardware to send a fence. The
@@ -675,11 +675,14 @@ int vmw_cmd_emit_dummy_query(struct vmw_private *dev_priv, · 140 unmodified lines
675675 */
676676 bool vmw_cmd_supported(struct vmw_private *vmw)
677677 {
678− if ((vmw->capabilities & (SVGA_CAP_COMMAND_BUFFERS |
679− SVGA_CAP_CMD_BUFFERS_2)) != 0)
680− return true;
678+ bool has_cmdbufs =
679+ (vmw->capabilities & (SVGA_CAP_COMMAND_BUFFERS |
680+ SVGA_CAP_CMD_BUFFERS_2)) != 0;
681+ if (vmw_is_svga_v3(vmw))
682+ return (has_cmdbufs &&
683+ (vmw->capabilities & SVGA_CAP_GBOBJECTS) != 0);
681684 /*
682685 * We have FIFO cmd's
683686 */
684− return vmw->fifo_mem != NULL;
687+ return has_cmdbufs || vmw->fifo_mem != NULL;
685688 }
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h+8−0
@@ -1679,4 +1679,12 @@ static inline void vmw_irq_status_write(struct vmw_private *vmw, · 1678 unmodified lines
16791679 outl(status, vmw->io_start + SVGA_IRQSTATUS_PORT);
16801680 }
16811681
1682+static inline bool vmw_has_fences(struct vmw_private *vmw)
1683+{
1684+ if ((vmw->capabilities & (SVGA_CAP_COMMAND_BUFFERS |
1685+ SVGA_CAP_CMD_BUFFERS_2)) != 0)
1686+ return true;
1687+ return (vmw_fifo_caps(vmw) & SVGA_FIFO_CAP_FENCE) != 0;
1688+}
1689+
16821690 #endif
drivers/gpu/drm/vmwgfx/vmwgfx_fb.c+1−1
@@ -483,7 +483,7 @@ static int vmw_fb_kms_detach(struct vmw_fb_par *par, · 482 unmodified lines
483483
484484 static int vmw_fb_kms_framebuffer(struct fb_info *info)
485485 {
486− struct drm_mode_fb_cmd2 mode_cmd;
486+ struct drm_mode_fb_cmd2 mode_cmd = {0};
487487 struct vmw_fb_par *par = info->par;
488488 struct fb_var_screeninfo *var = &info->var;
489489 struct drm_framebuffer *cur_fb;
drivers/gpu/drm/vmwgfx/vmwgfx_fence.c+21−7
@@ -82,6 +82,22 @@ fman_from_fence(struct vmw_fence_obj *fence) · 81 unmodified lines
8282 return container_of(fence->base.lock, struct vmw_fence_manager, lock);
8383 }
8484
85+static u32 vmw_fence_goal_read(struct vmw_private *vmw)
86+{
87+ if ((vmw->capabilities2 & SVGA_CAP2_EXTRA_REGS) != 0)
88+ return vmw_read(vmw, SVGA_REG_FENCE_GOAL);
89+ else
90+ return vmw_fifo_mem_read(vmw, SVGA_FIFO_FENCE_GOAL);
91+}
92+
93+static void vmw_fence_goal_write(struct vmw_private *vmw, u32 value)
94+{
95+ if ((vmw->capabilities2 & SVGA_CAP2_EXTRA_REGS) != 0)
96+ vmw_write(vmw, SVGA_REG_FENCE_GOAL, value);
97+ else
98+ vmw_fifo_mem_write(vmw, SVGA_FIFO_FENCE_GOAL, value);
99+}
100+
85101 /*
86102 * Note on fencing subsystem usage of irqs:
87103 * Typically the vmw_fences_update function is called
@@ -392,7 +408,7 @@ static bool vmw_fence_goal_new_locked(struct vmw_fence_manager *fman, · 304 unmodified lines
392408 if (likely(!fman->seqno_valid))
393409 return false;
394410
395− goal_seqno = vmw_fifo_mem_read(fman->dev_priv, SVGA_FIFO_FENCE_GOAL);
411+ goal_seqno = vmw_fence_goal_read(fman->dev_priv);
396412 if (likely(passed_seqno - goal_seqno >= VMW_FENCE_WRAP))
397413 return false;
398414
@@ -400,9 +416,8 @@ static bool vmw_fence_goal_new_locked(struct vmw_fence_manager *fman, · 1 unmodified line
400416 list_for_each_entry(fence, &fman->fence_list, head) {
401417 if (!list_empty(&fence->seq_passed_actions)) {
402418 fman->seqno_valid = true;
403− vmw_fifo_mem_write(fman->dev_priv,
404− SVGA_FIFO_FENCE_GOAL,
405− fence->base.seqno);
419+ vmw_fence_goal_write(fman->dev_priv,
420+ fence->base.seqno);
406421 break;
407422 }
408423 }
@@ -434,13 +449,12 @@ static bool vmw_fence_goal_check_locked(struct vmw_fence_obj *fence) · 25 unmodified lines
434449 if (dma_fence_is_signaled_locked(&fence->base))
435450 return false;
436451
437− goal_seqno = vmw_fifo_mem_read(fman->dev_priv, SVGA_FIFO_FENCE_GOAL);
452+ goal_seqno = vmw_fence_goal_read(fman->dev_priv);
438453 if (likely(fman->seqno_valid &&
439454 goal_seqno - fence->base.seqno < VMW_FENCE_WRAP))
440455 return false;
441456
442− vmw_fifo_mem_write(fman->dev_priv, SVGA_FIFO_FENCE_GOAL,
443− fence->base.seqno);
457+ vmw_fence_goal_write(fman->dev_priv, fence->base.seqno);
444458 fman->seqno_valid = true;
445459
446460 return true;
drivers/gpu/drm/vmwgfx/vmwgfx_irq.c+18−8
@@ -32,6 +32,14 @@ · 31 unmodified lines
3232
3333 #define VMW_FENCE_WRAP (1 << 24)
3434
35+static u32 vmw_irqflag_fence_goal(struct vmw_private *vmw)
36+{
37+ if ((vmw->capabilities2 & SVGA_CAP2_EXTRA_REGS) != 0)
38+ return SVGA_IRQFLAG_REG_FENCE_GOAL;
39+ else
40+ return SVGA_IRQFLAG_FENCE_GOAL;
41+}
42+
3543 /**
3644 * vmw_thread_fn - Deferred (process context) irq handler
3745 *
@@ -96,7 +104,7 @@ static irqreturn_t vmw_irq_handler(int irq, void *arg) · 58 unmodified lines
96104 wake_up_all(&dev_priv->fifo_queue);
97105
98106 if ((masked_status & (SVGA_IRQFLAG_ANY_FENCE |
99− SVGA_IRQFLAG_FENCE_GOAL)) &&
107+ vmw_irqflag_fence_goal(dev_priv))) &&
100108 !test_and_set_bit(VMW_IRQTHREAD_FENCE, dev_priv->irqthread_pending))
101109 ret = IRQ_WAKE_THREAD;
102110
@@ -137,8 +145,7 @@ bool vmw_seqno_passed(struct vmw_private *dev_priv, · 34 unmodified lines
137145 if (likely(dev_priv->last_read_seqno - seqno < VMW_FENCE_WRAP))
138146 return true;
139147
140− if (!(vmw_fifo_caps(dev_priv) & SVGA_FIFO_CAP_FENCE) &&
141− vmw_fifo_idle(dev_priv, seqno))
148+ if (!vmw_has_fences(dev_priv) && vmw_fifo_idle(dev_priv, seqno))
142149 return true;
143150
144151 /**
@@ -160,6 +167,7 @@ int vmw_fallback_wait(struct vmw_private *dev_priv, · 15 unmodified lines
160167 unsigned long timeout)
161168 {
162169 struct vmw_fifo_state *fifo_state = dev_priv->fifo;
170+ bool fifo_down = false;
163171
164172 uint32_t count = 0;
165173 uint32_t signal_seq;
@@ -176,12 +184,14 @@ int vmw_fallback_wait(struct vmw_private *dev_priv, · 10 unmodified lines
176184 */
177185
178186 if (fifo_idle) {
179− down_read(&fifo_state->rwsem);
180187 if (dev_priv->cman) {
181188 ret = vmw_cmdbuf_idle(dev_priv->cman, interruptible,
182189 10*HZ);
183190 if (ret)
184191 goto out_err;
192+ } else if (fifo_state) {
193+ down_read(&fifo_state->rwsem);
194+ fifo_down = true;
185195 }
186196 }
187197
@@ -218,12 +228,12 @@ int vmw_fallback_wait(struct vmw_private *dev_priv, · 30 unmodified lines
218228 }
219229 }
220230 finish_wait(&dev_priv->fence_queue, &__wait);
221− if (ret == 0 && fifo_idle)
231+ if (ret == 0 && fifo_idle && fifo_state)
222232 vmw_fence_write(dev_priv, signal_seq);
223233
224234 wake_up_all(&dev_priv->fence_queue);
225235 out_err:
226− if (fifo_idle)
236+ if (fifo_down)
227237 up_read(&fifo_state->rwsem);
228238
229239 return ret;
@@ -266,13 +276,13 @@ void vmw_seqno_waiter_remove(struct vmw_private *dev_priv) · 36 unmodified lines
266276
267277 void vmw_goal_waiter_add(struct vmw_private *dev_priv)
268278 {
269− vmw_generic_waiter_add(dev_priv, SVGA_IRQFLAG_FENCE_GOAL,
279+ vmw_generic_waiter_add(dev_priv, vmw_irqflag_fence_goal(dev_priv),
270280 &dev_priv->goal_queue_waiters);
271281 }
272282
273283 void vmw_goal_waiter_remove(struct vmw_private *dev_priv)
274284 {
275− vmw_generic_waiter_remove(dev_priv, SVGA_IRQFLAG_FENCE_GOAL,
285+ vmw_generic_waiter_remove(dev_priv, vmw_irqflag_fence_goal(dev_priv),
276286 &dev_priv->goal_queue_waiters);
277287 }
278288
drivers/gpu/drm/vmwgfx/vmwgfx_kms.c+5−3
@@ -1344,7 +1344,6 @@ vmw_kms_new_framebuffer(struct vmw_private *dev_priv, · 1343 unmodified lines
13441344 ret = vmw_kms_new_framebuffer_surface(dev_priv, surface, &vfb,
13451345 mode_cmd,
13461346 is_bo_proxy);
1347−
13481347 /*
13491348 * vmw_create_bo_proxy() adds a reference that is no longer
13501349 * needed
@@ -1385,13 +1384,16 @@ static struct drm_framebuffer *vmw_kms_fb_create(struct drm_device *dev, · 34 unmodified lines
13851384 ret = vmw_user_lookup_handle(dev_priv, file_priv,
13861385 mode_cmd->handles[0],
13871386 &surface, &bo);
1388− if (ret)
1387+ if (ret) {
1388+ DRM_ERROR("Invalid buffer object handle %u (0x%x).\n",
1389+ mode_cmd->handles[0], mode_cmd->handles[0]);
13891390 goto err_out;
1391+ }
13901392
13911393
13921394 if (!bo &&
13931395 !vmw_kms_srf_ok(dev_priv, mode_cmd->width, mode_cmd->height)) {
1394− DRM_ERROR("Surface size cannot exceed %dx%d",
1396+ DRM_ERROR("Surface size cannot exceed %dx%d\n",
13951397 dev_priv->texture_max_width,
13961398 dev_priv->texture_max_height);
13971399 goto err_out;
drivers/hwmon/Kconfig+1−1
@@ -960,7 +960,7 @@ config SENSORS_LTC4261 · 959 unmodified lines
960960
961961 config SENSORS_LTQ_CPUTEMP
962962 bool "Lantiq cpu temperature sensor driver"
963− depends on LANTIQ
963+ depends on SOC_XWAY
964964 help
965965 If you say yes here you get support for the temperature
966966 sensor inside your CPU.
drivers/hwmon/adt7470.c+2−2
@@ -19,6 +19,7 @@ · 18 unmodified lines
1919 #include <linux/log2.h>
2020 #include <linux/kthread.h>
2121 #include <linux/regmap.h>
22+#include <linux/sched.h>
2223 #include <linux/slab.h>
2324 #include <linux/util_macros.h>
2425
@@ -294,11 +295,10 @@ static int adt7470_update_thread(void *p) · 269 unmodified lines
294295 adt7470_read_temperatures(data);
295296 mutex_unlock(&data->lock);
296297
297− set_current_state(TASK_INTERRUPTIBLE);
298298 if (kthread_should_stop())
299299 break;
300300
301− schedule_timeout(msecs_to_jiffies(data->auto_update_interval));
301+ schedule_timeout_interruptible(msecs_to_jiffies(data->auto_update_interval));
302302 }
303303
304304 return 0;
drivers/hwmon/asus_wmi_sensors.c+1−1
@@ -71,7 +71,7 @@ static const struct dmi_system_id asus_wmi_dmi_table[] = { · 70 unmodified lines
7171 DMI_EXACT_MATCH_ASUS_BOARD_NAME("PRIME X399-A"),
7272 DMI_EXACT_MATCH_ASUS_BOARD_NAME("PRIME X470-PRO"),
7373 DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG CROSSHAIR VI EXTREME"),
74− DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG CROSSHAIR VI HERO"),
74+ DMI_EXACT_MATCH_ASUS_BOARD_NAME("CROSSHAIR VI HERO"),
7575 DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG CROSSHAIR VI HERO (WI-FI AC)"),
7676 DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG CROSSHAIR VII HERO"),
7777 DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG CROSSHAIR VII HERO (WI-FI)"),
drivers/hwmon/f71882fg.c+3−2
@@ -1578,8 +1578,9 @@ static ssize_t show_temp(struct device *dev, struct device_attribute *devattr, · 1577 unmodified lines
15781578 temp *= 125;
15791579 if (sign)
15801580 temp -= 128000;
1581− } else
1582− temp = data->temp[nr] * 1000;
1581+ } else {
1582+ temp = ((s8)data->temp[nr]) * 1000;
1583+ }
15831584
15841585 return sprintf(buf, "%d\n", temp);
15851586 }
drivers/hwmon/pmbus/delta-ahe50dc-fan.c+16−0
@@ -14,6 +14,21 @@ · 13 unmodified lines
1414
1515 #define AHE50DC_PMBUS_READ_TEMP4 0xd0
1616
17+static int ahe50dc_fan_write_byte(struct i2c_client *client, int page, u8 value)
18+{
19+ /*
20+ * The CLEAR_FAULTS operation seems to sometimes (unpredictably, perhaps
21+ * 5% of the time or so) trigger a problematic phenomenon in which the
22+ * fan speeds surge momentarily and at least some (perhaps all?) of the
23+ * system's power outputs experience a glitch.
24+ *
25+ * However, according to Delta it should be OK to simply not send any
26+ * CLEAR_FAULTS commands (the device doesn't seem to be capable of
27+ * reporting any faults anyway), so just blackhole them unconditionally.
28+ */
29+ return value == PMBUS_CLEAR_FAULTS ? -EOPNOTSUPP : -ENODATA;
30+}
31+
1732 static int ahe50dc_fan_read_word_data(struct i2c_client *client, int page, int phase, int reg)
1833 {
1934 /* temp1 in (virtual) page 1 is remapped to mfr-specific temp4 */
@@ -68,6 +83,7 @@ static struct pmbus_driver_info ahe50dc_fan_info = { · 48 unmodified lines
6883 PMBUS_HAVE_VIN | PMBUS_HAVE_FAN12 | PMBUS_HAVE_FAN34 |
6984 PMBUS_HAVE_STATUS_FAN12 | PMBUS_HAVE_STATUS_FAN34 | PMBUS_PAGE_VIRTUAL,
7085 .func[1] = PMBUS_HAVE_TEMP | PMBUS_PAGE_VIRTUAL,
86+ .write_byte = ahe50dc_fan_write_byte,
7187 .read_word_data = ahe50dc_fan_read_word_data,
7288 };
7389
drivers/hwmon/pmbus/pmbus_core.c+3−0
@@ -2326,6 +2326,9 @@ static int pmbus_init_common(struct i2c_client *client, struct pmbus_data *data, · 2325 unmodified lines
23262326 data->has_status_word = true;
23272327 }
23282328
2329+ /* Make sure PEC is disabled, will be enabled later if needed */
2330+ client->flags &= ~I2C_CLIENT_PEC;
2331+
23292332 /* Enable PEC if the controller and bus supports it */
23302333 if (!(data->flags & PMBUS_NO_CAPABILITY)) {
23312334 ret = i2c_smbus_read_byte_data(client, PMBUS_CAPABILITY);
drivers/hwmon/pmbus/xdpe12284.c+1−1
@@ -124,7 +124,7 @@ static int xdpe122_identify(struct i2c_client *client, · 123 unmodified lines
124124 return 0;
125125 }
126126
127−static const struct regulator_desc xdpe122_reg_desc[] = {
127+static const struct regulator_desc __maybe_unused xdpe122_reg_desc[] = {
128128 PMBUS_REGULATOR("vout", 0),
129129 PMBUS_REGULATOR("vout", 1),
130130 };
drivers/hwmon/tmp401.c+11−0
@@ -708,10 +708,21 @@ static int tmp401_probe(struct i2c_client *client) · 707 unmodified lines
708708 return 0;
709709 }
710710
711+static const struct of_device_id __maybe_unused tmp4xx_of_match[] = {
712+ { .compatible = "ti,tmp401", },
713+ { .compatible = "ti,tmp411", },
714+ { .compatible = "ti,tmp431", },
715+ { .compatible = "ti,tmp432", },
716+ { .compatible = "ti,tmp435", },
717+ { },
718+};
719+MODULE_DEVICE_TABLE(of, tmp4xx_of_match);
720+
711721 static struct i2c_driver tmp401_driver = {
712722 .class = I2C_CLASS_HWMON,
713723 .driver = {
714724 .name = "tmp401",
725+ .of_match_table = of_match_ptr(tmp4xx_of_match),
715726 },
716727 .probe_new = tmp401_probe,
717728 .id_table = tmp401_id,
drivers/idle/intel_idle.c+15−12
@@ -69,7 +69,12 @@ static unsigned int preferred_states_mask; · 68 unmodified lines
6969 static struct cpuidle_device __percpu *intel_idle_cpuidle_devices;
7070
7171 static unsigned long auto_demotion_disable_flags;
72−static bool disable_promotion_to_c1e;
72+
73+static enum {
74+ C1E_PROMOTION_PRESERVE,
75+ C1E_PROMOTION_ENABLE,
76+ C1E_PROMOTION_DISABLE
77+} c1e_promotion = C1E_PROMOTION_PRESERVE;
7378
7479 struct idle_cpu {
7580 struct cpuidle_state *state_table;
@@ -1398,8 +1403,6 @@ static inline void intel_idle_init_cstates_acpi(struct cpuidle_driver *drv) { } · 1322 unmodified lines
13981403 static inline bool intel_idle_off_by_default(u32 mwait_hint) { return false; }
13991404 #endif /* !CONFIG_ACPI_PROCESSOR_CSTATE */
14001405
1401−static void c1e_promotion_enable(void);
1402−
14031406 /**
14041407 * ivt_idle_state_table_update - Tune the idle states table for Ivy Town.
14051408 *
@@ -1578,17 +1581,14 @@ static void __init spr_idle_state_table_update(void) · 172 unmodified lines
15781581 unsigned long long msr;
15791582
15801583 /* Check if user prefers C1E over C1. */
1581− if (preferred_states_mask & BIT(2)) {
1582− if (preferred_states_mask & BIT(1))
1583− /* Both can't be enabled, stick to the defaults. */
1584− return;
1585−
1584+ if ((preferred_states_mask & BIT(2)) &&
1585+ !(preferred_states_mask & BIT(1))) {
1586+ /* Disable C1 and enable C1E. */
15861587 spr_cstates[0].flags |= CPUIDLE_FLAG_UNUSABLE;
15871588 spr_cstates[1].flags &= ~CPUIDLE_FLAG_UNUSABLE;
15881589
15891590 /* Enable C1E using the "C1E promotion" bit. */
1590− c1e_promotion_enable();
1591− disable_promotion_to_c1e = false;
1591+ c1e_promotion = C1E_PROMOTION_ENABLE;
15921592 }
15931593
15941594 /*
@@ -1754,7 +1754,9 @@ static int intel_idle_cpu_init(unsigned int cpu) · 159 unmodified lines
17541754 if (auto_demotion_disable_flags)
17551755 auto_demotion_disable();
17561756
1757− if (disable_promotion_to_c1e)
1757+ if (c1e_promotion == C1E_PROMOTION_ENABLE)
1758+ c1e_promotion_enable();
1759+ else if (c1e_promotion == C1E_PROMOTION_DISABLE)
17581760 c1e_promotion_disable();
17591761
17601762 return 0;
@@ -1833,7 +1835,8 @@ static int __init intel_idle_init(void) · 72 unmodified lines
18331835 if (icpu) {
18341836 cpuidle_state_table = icpu->state_table;
18351837 auto_demotion_disable_flags = icpu->auto_demotion_disable_flags;
1836− disable_promotion_to_c1e = icpu->disable_promotion_to_c1e;
1838+ if (icpu->disable_promotion_to_c1e)
1839+ c1e_promotion = C1E_PROMOTION_DISABLE;
18371840 if (icpu->use_acpi || force_use_acpi)
18381841 intel_idle_acpi_cst_extract();
18391842 } else if (!intel_idle_acpi_cst_extract()) {
drivers/iio/adc/ad7280a.c+6−6
@@ -745,7 +745,7 @@ static int ad7280a_write_thresh(struct iio_dev *indio_dev, · 744 unmodified lines
745745 case IIO_EV_DIR_RISING:
746746 addr = AD7280A_CELL_OVERVOLTAGE_REG;
747747 ret = ad7280_write(st, AD7280A_DEVADDR_MASTER, addr,
748− 1, val);
748+ 1, value);
749749 if (ret)
750750 break;
751751 st->cell_threshhigh = value;
@@ -753,7 +753,7 @@ static int ad7280a_write_thresh(struct iio_dev *indio_dev, · 1 unmodified line
753753 case IIO_EV_DIR_FALLING:
754754 addr = AD7280A_CELL_UNDERVOLTAGE_REG;
755755 ret = ad7280_write(st, AD7280A_DEVADDR_MASTER, addr,
756− 1, val);
756+ 1, value);
757757 if (ret)
758758 break;
759759 st->cell_threshlow = value;
@@ -770,18 +770,18 @@ static int ad7280a_write_thresh(struct iio_dev *indio_dev, · 10 unmodified lines
770770 case IIO_EV_DIR_RISING:
771771 addr = AD7280A_AUX_ADC_OVERVOLTAGE_REG;
772772 ret = ad7280_write(st, AD7280A_DEVADDR_MASTER, addr,
773− 1, val);
773+ 1, value);
774774 if (ret)
775775 break;
776− st->aux_threshhigh = val;
776+ st->aux_threshhigh = value;
777777 break;
778778 case IIO_EV_DIR_FALLING:
779779 addr = AD7280A_AUX_ADC_UNDERVOLTAGE_REG;
780780 ret = ad7280_write(st, AD7280A_DEVADDR_MASTER, addr,
781− 1, val);
781+ 1, value);
782782 if (ret)
783783 break;
784− st->aux_threshlow = val;
784+ st->aux_threshlow = value;
785785 break;
786786 default:
787787 ret = -EINVAL;
drivers/iio/chemical/scd4x.c+4−1
@@ -471,12 +471,15 @@ static ssize_t calibration_forced_value_store(struct device *dev, · 470 unmodified lines
471471 ret = scd4x_write_and_fetch(state, CMD_FRC, arg, &val, sizeof(val));
472472 mutex_unlock(&state->lock);
473473
474+ if (ret)
475+ return ret;
476+
474477 if (val == 0xff) {
475478 dev_err(dev, "forced calibration has failed");
476479 return -EINVAL;
477480 }
478481
479− return ret ?: len;
482+ return len;
480483 }
481484
482485 static IIO_DEVICE_ATTR_RW(calibration_auto_enable, 0);
drivers/iio/dac/ad3552r.c+3−3
@@ -656,7 +656,7 @@ static int ad3552r_reset(struct ad3552r_desc *dac) · 655 unmodified lines
656656 {
657657 struct reg_addr_pool addr;
658658 int ret;
659− u16 val;
659+ int val;
660660
661661 dac->gpio_reset = devm_gpiod_get_optional(&dac->spi->dev, "reset",
662662 GPIOD_OUT_LOW);
@@ -809,10 +809,10 @@ static int ad3552r_configure_custom_gain(struct ad3552r_desc *dac, · 146 unmodified lines
809809
810810 gain_child = fwnode_get_named_child_node(child,
811811 "custom-output-range-config");
812− if (IS_ERR(gain_child)) {
812+ if (!gain_child) {
813813 dev_err(dev,
814814 "mandatory custom-output-range-config property missing\n");
815− return PTR_ERR(gain_child);
815+ return -EINVAL;
816816 }
817817
818818 dac->ch_data[ch].range_override = 1;
drivers/iio/dac/ad5446.c+1−1
@@ -178,7 +178,7 @@ static int ad5446_read_raw(struct iio_dev *indio_dev, · 177 unmodified lines
178178
179179 switch (m) {
180180 case IIO_CHAN_INFO_RAW:
181− *val = st->cached_val;
181+ *val = st->cached_val >> chan->scan_type.shift;
182182 return IIO_VAL_INT;
183183 case IIO_CHAN_INFO_SCALE:
184184 *val = st->vref_mv;
drivers/iio/dac/ad5592r-base.c+1−1
@@ -522,7 +522,7 @@ static int ad5592r_alloc_channels(struct iio_dev *iio_dev) · 521 unmodified lines
522522 if (!ret)
523523 st->channel_modes[reg] = tmp;
524524
525− fwnode_property_read_u32(child, "adi,off-state", &tmp);
525+ ret = fwnode_property_read_u32(child, "adi,off-state", &tmp);
526526 if (!ret)
527527 st->channel_offstate[reg] = tmp;
528528 }
drivers/iio/dac/ltc2688.c+1−1
@@ -298,7 +298,7 @@ static int ltc2688_read_raw(struct iio_dev *indio_dev, · 297 unmodified lines
298298 if (ret)
299299 return ret;
300300
301− *val = 16;
301+ *val2 = 16;
302302 return IIO_VAL_FRACTIONAL_LOG2;
303303 case IIO_CHAN_INFO_CALIBBIAS:
304304 ret = regmap_read(st->regmap,
drivers/iio/dac/ti-dac5571.c+18−10
@@ -19,6 +19,7 @@ · 18 unmodified lines
1919 #include <linux/i2c.h>
2020 #include <linux/module.h>
2121 #include <linux/mod_devicetable.h>
22+#include <linux/property.h>
2223 #include <linux/regulator/consumer.h>
2324
2425 enum chip_id {
@@ -311,6 +312,7 @@ static int dac5571_probe(struct i2c_client *client, · 286 unmodified lines
311312 const struct dac5571_spec *spec;
312313 struct dac5571_data *data;
313314 struct iio_dev *indio_dev;
315+ enum chip_id chip_id;
314316 int ret, i;
315317
316318 indio_dev = devm_iio_device_alloc(dev, sizeof(*data));
@@ -326,7 +328,13 @@ static int dac5571_probe(struct i2c_client *client, · 9 unmodified lines
326328 indio_dev->modes = INDIO_DIRECT_MODE;
327329 indio_dev->channels = dac5571_channels;
328330
329− spec = &dac5571_spec[id->driver_data];
331+ if (dev_fwnode(dev))
332+ chip_id = (uintptr_t)device_get_match_data(dev);
333+ else
334+ chip_id = id->driver_data;
335+
336+ spec = &dac5571_spec[chip_id];
337+
330338 indio_dev->num_channels = spec->num_channels;
331339 data->spec = spec;
332340
@@ -385,15 +393,15 @@ static int dac5571_remove(struct i2c_client *i2c) · 52 unmodified lines
385393 }
386394
387395 static const struct of_device_id dac5571_of_id[] = {
388− {.compatible = "ti,dac5571"},
389− {.compatible = "ti,dac6571"},
390− {.compatible = "ti,dac7571"},
391− {.compatible = "ti,dac5574"},
392− {.compatible = "ti,dac6574"},
393− {.compatible = "ti,dac7574"},
394− {.compatible = "ti,dac5573"},
395− {.compatible = "ti,dac6573"},
396− {.compatible = "ti,dac7573"},
396+ {.compatible = "ti,dac5571", .data = (void *)single_8bit},
397+ {.compatible = "ti,dac6571", .data = (void *)single_10bit},
398+ {.compatible = "ti,dac7571", .data = (void *)single_12bit},
399+ {.compatible = "ti,dac5574", .data = (void *)quad_8bit},
400+ {.compatible = "ti,dac6574", .data = (void *)quad_10bit},
401+ {.compatible = "ti,dac7574", .data = (void *)quad_12bit},
402+ {.compatible = "ti,dac5573", .data = (void *)quad_8bit},
403+ {.compatible = "ti,dac6573", .data = (void *)quad_10bit},
404+ {.compatible = "ti,dac7573", .data = (void *)quad_12bit},
397405 {}
398406 };
399407 MODULE_DEVICE_TABLE(of, dac5571_of_id);
drivers/iio/filter/Kconfig+1−0
@@ -8,6 +8,7 @@ menu "Filters" · 7 unmodified lines
88 config ADMV8818
99 tristate "Analog Devices ADMV8818 High-Pass and Low-Pass Filter"
1010 depends on SPI && COMMON_CLK && 64BIT
11+ select REGMAP_SPI
1112 help
1213 Say yes here to build support for Analog Devices ADMV8818
1314 2 GHz to 18 GHz, Digitally Tunable, High-Pass and Low-Pass Filter.
drivers/iio/imu/bmi160/bmi160_core.c+14−6
@@ -730,7 +730,7 @@ static int bmi160_chip_init(struct bmi160_data *data, bool use_spi) · 729 unmodified lines
730730
731731 ret = regmap_write(data->regmap, BMI160_REG_CMD, BMI160_CMD_SOFTRESET);
732732 if (ret)
733− return ret;
733+ goto disable_regulator;
734734
735735 usleep_range(BMI160_SOFTRESET_USLEEP, BMI160_SOFTRESET_USLEEP + 1);
736736
@@ -741,29 +741,37 @@ static int bmi160_chip_init(struct bmi160_data *data, bool use_spi) · 4 unmodified lines
741741 if (use_spi) {
742742 ret = regmap_read(data->regmap, BMI160_REG_DUMMY, &val);
743743 if (ret)
744− return ret;
744+ goto disable_regulator;
745745 }
746746
747747 ret = regmap_read(data->regmap, BMI160_REG_CHIP_ID, &val);
748748 if (ret) {
749749 dev_err(dev, "Error reading chip id\n");
750− return ret;
750+ goto disable_regulator;
751751 }
752752 if (val != BMI160_CHIP_ID_VAL) {
753753 dev_err(dev, "Wrong chip id, got %x expected %x\n",
754754 val, BMI160_CHIP_ID_VAL);
755− return -ENODEV;
755+ ret = -ENODEV;
756+ goto disable_regulator;
756757 }
757758
758759 ret = bmi160_set_mode(data, BMI160_ACCEL, true);
759760 if (ret)
760− return ret;
761+ goto disable_regulator;
761762
762763 ret = bmi160_set_mode(data, BMI160_GYRO, true);
763764 if (ret)
764− return ret;
765+ goto disable_accel;
765766
766767 return 0;
768+
769+disable_accel:
770+ bmi160_set_mode(data, BMI160_ACCEL, false);
771+
772+disable_regulator:
773+ regulator_bulk_disable(ARRAY_SIZE(data->supplies), data->supplies);
774+ return ret;
767775 }
768776
769777 static int bmi160_data_rdy_trigger_set_state(struct iio_trigger *trig,
drivers/iio/imu/inv_icm42600/inv_icm42600_i2c.c+9−6
@@ -18,12 +18,15 @@ static int inv_icm42600_i2c_bus_setup(struct inv_icm42600_state *st) · 17 unmodified lines
1818 unsigned int mask, val;
1919 int ret;
2020
21− /* setup interface registers */
22− ret = regmap_update_bits(st->map, INV_ICM42600_REG_INTF_CONFIG6,
23− INV_ICM42600_INTF_CONFIG6_MASK,
24− INV_ICM42600_INTF_CONFIG6_I3C_EN);
25− if (ret)
26− return ret;
21+ /*
22+ * setup interface registers
23+ * This register write to REG_INTF_CONFIG6 enables a spike filter that
24+ * is impacting the line and can prevent the I2C ACK to be seen by the
25+ * controller. So we don't test the return value.
26+ */
27+ regmap_update_bits(st->map, INV_ICM42600_REG_INTF_CONFIG6,
28+ INV_ICM42600_INTF_CONFIG6_MASK,
29+ INV_ICM42600_INTF_CONFIG6_I3C_EN);
2730
2831 ret = regmap_update_bits(st->map, INV_ICM42600_REG_INTF_CONFIG4,
2932 INV_ICM42600_INTF_CONFIG4_I3C_BUS_ONLY, 0);
drivers/iio/magnetometer/ak8975.c+1−0
@@ -416,6 +416,7 @@ static int ak8975_power_on(const struct ak8975_data *data) · 415 unmodified lines
416416 if (ret) {
417417 dev_warn(&data->client->dev,
418418 "Failed to enable specified Vid supply\n");
419+ regulator_disable(data->vdd);
419420 return ret;
420421 }
421422
drivers/iio/proximity/sx9324.c+25−7
@@ -70,13 +70,17 @@ · 69 unmodified lines
7070 #define SX9324_REG_AFE_PH2 0x2a
7171 #define SX9324_REG_AFE_PH3 0x2b
7272 #define SX9324_REG_AFE_CTRL8 0x2c
73−#define SX9324_REG_AFE_CTRL8_RESFILTN_4KOHM 0x02
73+#define SX9324_REG_AFE_CTRL8_RESERVED 0x10
74+#define SX9324_REG_AFE_CTRL8_RESFILTIN_4KOHM 0x02
7475 #define SX9324_REG_AFE_CTRL9 0x2d
7576 #define SX9324_REG_AFE_CTRL9_AGAIN_1 0x08
7677
7778 #define SX9324_REG_PROX_CTRL0 0x30
7879 #define SX9324_REG_PROX_CTRL0_GAIN_MASK GENMASK(5, 3)
79−#define SX9324_REG_PROX_CTRL0_GAIN_1 0x80
80+#define SX9324_REG_PROX_CTRL0_GAIN_SHIFT 3
81+#define SX9324_REG_PROX_CTRL0_GAIN_RSVD 0x0
82+#define SX9324_REG_PROX_CTRL0_GAIN_1 0x1
83+#define SX9324_REG_PROX_CTRL0_GAIN_8 0x4
8084 #define SX9324_REG_PROX_CTRL0_RAWFILT_MASK GENMASK(2, 0)
8185 #define SX9324_REG_PROX_CTRL0_RAWFILT_1P50 0x01
8286 #define SX9324_REG_PROX_CTRL1 0x31
@@ -379,7 +383,14 @@ static int sx9324_read_gain(struct sx_common_data *data, · 296 unmodified lines
379383 if (ret)
380384 return ret;
381385
382− *val = 1 << FIELD_GET(SX9324_REG_PROX_CTRL0_GAIN_MASK, regval);
386+ regval = FIELD_GET(SX9324_REG_PROX_CTRL0_GAIN_MASK, regval);
387+ if (regval)
388+ regval--;
389+ else if (regval == SX9324_REG_PROX_CTRL0_GAIN_RSVD ||
390+ regval > SX9324_REG_PROX_CTRL0_GAIN_8)
391+ return -EINVAL;
392+
393+ *val = 1 << regval;
383394
384395 return IIO_VAL_INT;
385396 }
@@ -725,8 +736,12 @@ static int sx9324_write_gain(struct sx_common_data *data, · 339 unmodified lines
725736 unsigned int gain, reg;
726737 int ret;
727738
728− gain = ilog2(val);
729739 reg = SX9324_REG_PROX_CTRL0 + chan->channel / 2;
740+
741+ gain = ilog2(val) + 1;
742+ if (val <= 0 || gain > SX9324_REG_PROX_CTRL0_GAIN_8)
743+ return -EINVAL;
744+
730745 gain = FIELD_PREP(SX9324_REG_PROX_CTRL0_GAIN_MASK, gain);
731746
732747 mutex_lock(&data->mutex);
@@ -781,12 +796,15 @@ static const struct sx_common_reg_default sx9324_default_regs[] = { · 48 unmodified lines
781796 { SX9324_REG_AFE_PH2, 0x1a },
782797 { SX9324_REG_AFE_PH3, 0x16 },
783798
784− { SX9324_REG_AFE_CTRL8, SX9324_REG_AFE_CTRL8_RESFILTN_4KOHM },
799+ { SX9324_REG_AFE_CTRL8, SX9324_REG_AFE_CTRL8_RESERVED |
800+ SX9324_REG_AFE_CTRL8_RESFILTIN_4KOHM },
785801 { SX9324_REG_AFE_CTRL9, SX9324_REG_AFE_CTRL9_AGAIN_1 },
786802
787− { SX9324_REG_PROX_CTRL0, SX9324_REG_PROX_CTRL0_GAIN_1 |
803+ { SX9324_REG_PROX_CTRL0,
804+ SX9324_REG_PROX_CTRL0_GAIN_1 << SX9324_REG_PROX_CTRL0_GAIN_SHIFT |
788805 SX9324_REG_PROX_CTRL0_RAWFILT_1P50 },
789− { SX9324_REG_PROX_CTRL1, SX9324_REG_PROX_CTRL0_GAIN_1 |
806+ { SX9324_REG_PROX_CTRL1,
807+ SX9324_REG_PROX_CTRL0_GAIN_1 << SX9324_REG_PROX_CTRL0_GAIN_SHIFT |
790808 SX9324_REG_PROX_CTRL0_RAWFILT_1P50 },
791809 { SX9324_REG_PROX_CTRL2, SX9324_REG_PROX_CTRL2_AVGNEG_THRESH_16K },
792810 { SX9324_REG_PROX_CTRL3, SX9324_REG_PROX_CTRL3_AVGDEB_2SAMPLES |
drivers/iio/proximity/sx_common.c+1−0
@@ -521,6 +521,7 @@ int sx_common_probe(struct i2c_client *client, · 520 unmodified lines
521521 return dev_err_probe(dev, ret, "error reading WHOAMI\n");
522522
523523 ACPI_COMPANION_SET(&indio_dev->dev, ACPI_COMPANION(dev));
524+ indio_dev->dev.of_node = client->dev.of_node;
524525 indio_dev->modes = INDIO_DIRECT_MODE;
525526
526527 indio_dev->channels = data->chip_info->iio_channels;
drivers/infiniband/hw/irdma/cm.c+10−23
@@ -2308,10 +2308,8 @@ err: · 2307 unmodified lines
23082308 return NULL;
23092309 }
23102310
2311−static void irdma_cm_node_free_cb(struct rcu_head *rcu_head)
2311+static void irdma_destroy_connection(struct irdma_cm_node *cm_node)
23122312 {
2313− struct irdma_cm_node *cm_node =
2314− container_of(rcu_head, struct irdma_cm_node, rcu_head);
23152313 struct irdma_cm_core *cm_core = cm_node->cm_core;
23162314 struct irdma_qp *iwqp;
23172315 struct irdma_cm_info nfo;
@@ -2359,7 +2357,6 @@ static void irdma_cm_node_free_cb(struct rcu_head *rcu_head) · 41 unmodified lines
23592357 }
23602358
23612359 cm_core->cm_free_ah(cm_node);
2362− kfree(cm_node);
23632360 }
23642361
23652362 /**
@@ -2387,8 +2384,9 @@ void irdma_rem_ref_cm_node(struct irdma_cm_node *cm_node) · 21 unmodified lines
23872384
23882385 spin_unlock_irqrestore(&cm_core->ht_lock, flags);
23892386
2390− /* wait for all list walkers to exit their grace period */
2391− call_rcu(&cm_node->rcu_head, irdma_cm_node_free_cb);
2387+ irdma_destroy_connection(cm_node);
2388+
2389+ kfree_rcu(cm_node, rcu_head);
23922390 }
23932391
23942392 /**
@@ -3246,15 +3244,10 @@ int irdma_setup_cm_core(struct irdma_device *iwdev, u8 rdma_ver) · 851 unmodified lines
32463244 */
32473245 void irdma_cleanup_cm_core(struct irdma_cm_core *cm_core)
32483246 {
3249− unsigned long flags;
3250−
32513247 if (!cm_core)
32523248 return;
32533249
3254− spin_lock_irqsave(&cm_core->ht_lock, flags);
3255− if (timer_pending(&cm_core->tcp_timer))
3256− del_timer_sync(&cm_core->tcp_timer);
3257− spin_unlock_irqrestore(&cm_core->ht_lock, flags);
3250+ del_timer_sync(&cm_core->tcp_timer);
32583251
32593252 destroy_workqueue(cm_core->event_wq);
32603253 cm_core->dev->ws_reset(&cm_core->iwdev->vsi);
@@ -3467,12 +3460,6 @@ static void irdma_cm_disconn_true(struct irdma_qp *iwqp) · 206 unmodified lines
34673460 }
34683461
34693462 cm_id = iwqp->cm_id;
3470− /* make sure we havent already closed this connection */
3471− if (!cm_id) {
3472− spin_unlock_irqrestore(&iwqp->lock, flags);
3473− return;
3474− }
3475−
34763463 original_hw_tcp_state = iwqp->hw_tcp_state;
34773464 original_ibqp_state = iwqp->ibqp_state;
34783465 last_ae = iwqp->last_aeq;
@@ -3494,11 +3481,11 @@ static void irdma_cm_disconn_true(struct irdma_qp *iwqp) · 15 unmodified lines
34943481 disconn_status = -ECONNRESET;
34953482 }
34963483
3497− if ((original_hw_tcp_state == IRDMA_TCP_STATE_CLOSED ||
3498− original_hw_tcp_state == IRDMA_TCP_STATE_TIME_WAIT ||
3499− last_ae == IRDMA_AE_RDMAP_ROE_BAD_LLP_CLOSE ||
3500− last_ae == IRDMA_AE_BAD_CLOSE ||
3501− last_ae == IRDMA_AE_LLP_CONNECTION_RESET || iwdev->rf->reset)) {
3484+ if (original_hw_tcp_state == IRDMA_TCP_STATE_CLOSED ||
3485+ original_hw_tcp_state == IRDMA_TCP_STATE_TIME_WAIT ||
3486+ last_ae == IRDMA_AE_RDMAP_ROE_BAD_LLP_CLOSE ||
3487+ last_ae == IRDMA_AE_BAD_CLOSE ||
3488+ last_ae == IRDMA_AE_LLP_CONNECTION_RESET || iwdev->rf->reset || !cm_id) {
35023489 issue_close = 1;
35033490 iwqp->cm_id = NULL;
35043491 qp->term_flags = 0;
drivers/infiniband/hw/irdma/utils.c+9−12
@@ -258,18 +258,16 @@ int irdma_net_event(struct notifier_block *notifier, unsigned long event, · 257 unmodified lines
258258 u32 local_ipaddr[4] = {};
259259 bool ipv4 = true;
260260
261− real_dev = rdma_vlan_dev_real_dev(netdev);
262− if (!real_dev)
263− real_dev = netdev;
264−
265− ibdev = ib_device_get_by_netdev(real_dev, RDMA_DRIVER_IRDMA);
266− if (!ibdev)
267− return NOTIFY_DONE;
268−
269− iwdev = to_iwdev(ibdev);
270−
271261 switch (event) {
272262 case NETEVENT_NEIGH_UPDATE:
263+ real_dev = rdma_vlan_dev_real_dev(netdev);
264+ if (!real_dev)
265+ real_dev = netdev;
266+ ibdev = ib_device_get_by_netdev(real_dev, RDMA_DRIVER_IRDMA);
267+ if (!ibdev)
268+ return NOTIFY_DONE;
269+
270+ iwdev = to_iwdev(ibdev);
273271 p = (__be32 *)neigh->primary_key;
274272 if (neigh->tbl->family == AF_INET6) {
275273 ipv4 = false;
@@ -290,13 +288,12 @@ int irdma_net_event(struct notifier_block *notifier, unsigned long event, · 14 unmodified lines
290288 irdma_manage_arp_cache(iwdev->rf, neigh->ha,
291289 local_ipaddr, ipv4,
292290 IRDMA_ARP_DELETE);
291+ ib_device_put(ibdev);
293292 break;
294293 default:
295294 break;
296295 }
297296
298− ib_device_put(ibdev);
299−
300297 return NOTIFY_DONE;
301298 }
302299
drivers/infiniband/hw/irdma/verbs.c+2−2
@@ -1618,13 +1618,13 @@ int irdma_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr, int attr_mask, · 1617 unmodified lines
16181618
16191619 if (issue_modify_qp && iwqp->ibqp_state > IB_QPS_RTS) {
16201620 if (dont_wait) {
1621− if (iwqp->cm_id && iwqp->hw_tcp_state) {
1621+ if (iwqp->hw_tcp_state) {
16221622 spin_lock_irqsave(&iwqp->lock, flags);
16231623 iwqp->hw_tcp_state = IRDMA_TCP_STATE_CLOSED;
16241624 iwqp->last_aeq = IRDMA_AE_RESET_SENT;
16251625 spin_unlock_irqrestore(&iwqp->lock, flags);
1626− irdma_cm_disconn(iwqp);
16271626 }
1627+ irdma_cm_disconn(iwqp);
16281628 } else {
16291629 int close_timer_started;
16301630
drivers/infiniband/sw/rxe/rxe_mcast.c+35−46
@@ -38,13 +38,13 @@ static int rxe_mcast_add(struct rxe_dev *rxe, union ib_gid *mgid) · 37 unmodified lines
3838 }
3939
4040 /**
41− * rxe_mcast_delete - delete multicast address from rxe device
41+ * rxe_mcast_del - delete multicast address from rxe device
4242 * @rxe: rxe device object
4343 * @mgid: multicast address as a gid
4444 *
4545 * Returns 0 on success else an error
4646 */
47−static int rxe_mcast_delete(struct rxe_dev *rxe, union ib_gid *mgid)
47+static int rxe_mcast_del(struct rxe_dev *rxe, union ib_gid *mgid)
4848 {
4949 unsigned char ll_addr[ETH_ALEN];
5050
@@ -143,11 +143,10 @@ static struct rxe_mcg *__rxe_lookup_mcg(struct rxe_dev *rxe, · 92 unmodified lines
143143 struct rxe_mcg *rxe_lookup_mcg(struct rxe_dev *rxe, union ib_gid *mgid)
144144 {
145145 struct rxe_mcg *mcg;
146− unsigned long flags;
147146
148− spin_lock_irqsave(&rxe->mcg_lock, flags);
147+ spin_lock_bh(&rxe->mcg_lock);
149148 mcg = __rxe_lookup_mcg(rxe, mgid);
150− spin_unlock_irqrestore(&rxe->mcg_lock, flags);
149+ spin_unlock_bh(&rxe->mcg_lock);
151150
152151 return mcg;
153152 }
@@ -159,17 +158,10 @@ struct rxe_mcg *rxe_lookup_mcg(struct rxe_dev *rxe, union ib_gid *mgid) · 5 unmodified lines
159158 * @mcg: new mcg object
160159 *
161160 * Context: caller should hold rxe->mcg lock
162− * Returns: 0 on success else an error
163161 */
164−static int __rxe_init_mcg(struct rxe_dev *rxe, union ib_gid *mgid,
165− struct rxe_mcg *mcg)
162+static void __rxe_init_mcg(struct rxe_dev *rxe, union ib_gid *mgid,
163+ struct rxe_mcg *mcg)
166164 {
167− int err;
168−
169− err = rxe_mcast_add(rxe, mgid);
170− if (unlikely(err))
171− return err;
172−
173165 kref_init(&mcg->ref_cnt);
174166 memcpy(&mcg->mgid, mgid, sizeof(mcg->mgid));
175167 INIT_LIST_HEAD(&mcg->qp_list);
@@ -184,8 +176,6 @@ static int __rxe_init_mcg(struct rxe_dev *rxe, union ib_gid *mgid, · 8 unmodified lines
184176 */
185177 kref_get(&mcg->ref_cnt);
186178 __rxe_insert_mcg(mcg);
187−
188− return 0;
189179 }
190180
191181 /**
@@ -198,7 +188,6 @@ static int __rxe_init_mcg(struct rxe_dev *rxe, union ib_gid *mgid, · 6 unmodified lines
198188 static struct rxe_mcg *rxe_get_mcg(struct rxe_dev *rxe, union ib_gid *mgid)
199189 {
200190 struct rxe_mcg *mcg, *tmp;
201− unsigned long flags;
202191 int err;
203192
204193 if (rxe->attr.max_mcast_grp == 0)
@@ -209,36 +198,38 @@ static struct rxe_mcg *rxe_get_mcg(struct rxe_dev *rxe, union ib_gid *mgid) · 4 unmodified lines
209198 if (mcg)
210199 return mcg;
211200
201+ /* check to see if we have reached limit */
202+ if (atomic_inc_return(&rxe->mcg_num) > rxe->attr.max_mcast_grp) {
203+ err = -ENOMEM;
204+ goto err_dec;
205+ }
206+
212207 /* speculative alloc of new mcg */
213208 mcg = kzalloc(sizeof(*mcg), GFP_KERNEL);
214209 if (!mcg)
215210 return ERR_PTR(-ENOMEM);
216211
217− spin_lock_irqsave(&rxe->mcg_lock, flags);
212+ spin_lock_bh(&rxe->mcg_lock);
218213 /* re-check to see if someone else just added it */
219214 tmp = __rxe_lookup_mcg(rxe, mgid);
220215 if (tmp) {
216+ spin_unlock_bh(&rxe->mcg_lock);
217+ atomic_dec(&rxe->mcg_num);
221218 kfree(mcg);
222− mcg = tmp;
223− goto out;
219+ return tmp;
224220 }
225221
226− if (atomic_inc_return(&rxe->mcg_num) > rxe->attr.max_mcast_grp) {
227− err = -ENOMEM;
228− goto err_dec;
229− }
222+ __rxe_init_mcg(rxe, mgid, mcg);
223+ spin_unlock_bh(&rxe->mcg_lock);
230224
231− err = __rxe_init_mcg(rxe, mgid, mcg);
232− if (err)
233− goto err_dec;
234−out:
235− spin_unlock_irqrestore(&rxe->mcg_lock, flags);
236− return mcg;
225+ /* add mcast address outside of lock */
226+ err = rxe_mcast_add(rxe, mgid);
227+ if (!err)
228+ return mcg;
237229
230+ kfree(mcg);
238231 err_dec:
239232 atomic_dec(&rxe->mcg_num);
240− spin_unlock_irqrestore(&rxe->mcg_lock, flags);
241− kfree(mcg);
242233 return ERR_PTR(err);
243234 }
244235
@@ -268,7 +259,6 @@ static void __rxe_destroy_mcg(struct rxe_mcg *mcg) · 23 unmodified lines
268259 __rxe_remove_mcg(mcg);
269260 kref_put(&mcg->ref_cnt, rxe_cleanup_mcg);
270261
271− rxe_mcast_delete(mcg->rxe, &mcg->mgid);
272262 atomic_dec(&rxe->mcg_num);
273263 }
274264
@@ -280,11 +270,12 @@ static void __rxe_destroy_mcg(struct rxe_mcg *mcg) · 5 unmodified lines
280270 */
281271 static void rxe_destroy_mcg(struct rxe_mcg *mcg)
282272 {
283− unsigned long flags;
273+ /* delete mcast address outside of lock */
274+ rxe_mcast_del(mcg->rxe, &mcg->mgid);
284275
285− spin_lock_irqsave(&mcg->rxe->mcg_lock, flags);
276+ spin_lock_bh(&mcg->rxe->mcg_lock);
286277 __rxe_destroy_mcg(mcg);
287− spin_unlock_irqrestore(&mcg->rxe->mcg_lock, flags);
278+ spin_unlock_bh(&mcg->rxe->mcg_lock);
288279 }
289280
290281 /**
@@ -339,25 +330,24 @@ static int rxe_attach_mcg(struct rxe_mcg *mcg, struct rxe_qp *qp) · 48 unmodified lines
339330 {
340331 struct rxe_dev *rxe = mcg->rxe;
341332 struct rxe_mca *mca, *tmp;
342− unsigned long flags;
343333 int err;
344334
345335 /* check to see if the qp is already a member of the group */
346− spin_lock_irqsave(&rxe->mcg_lock, flags);
336+ spin_lock_bh(&rxe->mcg_lock);
347337 list_for_each_entry(mca, &mcg->qp_list, qp_list) {
348338 if (mca->qp == qp) {
349− spin_unlock_irqrestore(&rxe->mcg_lock, flags);
339+ spin_unlock_bh(&rxe->mcg_lock);
350340 return 0;
351341 }
352342 }
353− spin_unlock_irqrestore(&rxe->mcg_lock, flags);
343+ spin_unlock_bh(&rxe->mcg_lock);
354344
355345 /* speculative alloc new mca without using GFP_ATOMIC */
356346 mca = kzalloc(sizeof(*mca), GFP_KERNEL);
357347 if (!mca)
358348 return -ENOMEM;
359349
360− spin_lock_irqsave(&rxe->mcg_lock, flags);
350+ spin_lock_bh(&rxe->mcg_lock);
361351 /* re-check to see if someone else just attached qp */
362352 list_for_each_entry(tmp, &mcg->qp_list, qp_list) {
363353 if (tmp->qp == qp) {
@@ -371,7 +361,7 @@ static int rxe_attach_mcg(struct rxe_mcg *mcg, struct rxe_qp *qp) · 7 unmodified lines
371361 if (err)
372362 kfree(mca);
373363 out:
374− spin_unlock_irqrestore(&rxe->mcg_lock, flags);
364+ spin_unlock_bh(&rxe->mcg_lock);
375365 return err;
376366 }
377367
@@ -405,9 +395,8 @@ static int rxe_detach_mcg(struct rxe_mcg *mcg, struct rxe_qp *qp) · 27 unmodified lines
405395 {
406396 struct rxe_dev *rxe = mcg->rxe;
407397 struct rxe_mca *mca, *tmp;
408− unsigned long flags;
409398
410− spin_lock_irqsave(&rxe->mcg_lock, flags);
399+ spin_lock_bh(&rxe->mcg_lock);
411400 list_for_each_entry_safe(mca, tmp, &mcg->qp_list, qp_list) {
412401 if (mca->qp == qp) {
413402 __rxe_cleanup_mca(mca, mcg);
@@ -421,13 +410,13 @@ static int rxe_detach_mcg(struct rxe_mcg *mcg, struct rxe_qp *qp) · 7 unmodified lines
421410 if (atomic_read(&mcg->qp_num) <= 0)
422411 __rxe_destroy_mcg(mcg);
423412
424− spin_unlock_irqrestore(&rxe->mcg_lock, flags);
413+ spin_unlock_bh(&rxe->mcg_lock);
425414 return 0;
426415 }
427416 }
428417
429418 /* we didn't find the qp on the list */
430− spin_unlock_irqrestore(&rxe->mcg_lock, flags);
419+ spin_unlock_bh(&rxe->mcg_lock);
431420 return -EINVAL;
432421 }
433422
drivers/infiniband/sw/rxe/rxe_resp.c+25−10
@@ -680,6 +680,11 @@ static struct resp_res *rxe_prepare_read_res(struct rxe_qp *qp, · 679 unmodified lines
680680 * It is assumed that the access permissions if originally good
681681 * are OK and the mappings to be unchanged.
682682 *
683+ * TODO: If someone reregisters an MR to change its size or
684+ * access permissions during the processing of an RDMA read
685+ * we should kill the responder resource and complete the
686+ * operation with an error.
687+ *
683688 * Return: mr on success else NULL
684689 */
685690 static struct rxe_mr *rxe_recheck_mr(struct rxe_qp *qp, u32 rkey)
@@ -690,23 +695,27 @@ static struct rxe_mr *rxe_recheck_mr(struct rxe_qp *qp, u32 rkey) · 4 unmodified lines
690695
691696 if (rkey_is_mw(rkey)) {
692697 mw = rxe_pool_get_index(&rxe->mw_pool, rkey >> 8);
693− if (!mw || mw->rkey != rkey)
698+ if (!mw)
694699 return NULL;
695700
696− if (mw->state != RXE_MW_STATE_VALID) {
701+ mr = mw->mr;
702+ if (mw->rkey != rkey || mw->state != RXE_MW_STATE_VALID ||
703+ !mr || mr->state != RXE_MR_STATE_VALID) {
697704 rxe_put(mw);
698705 return NULL;
699706 }
700707
701− mr = mw->mr;
708+ rxe_get(mr);
702709 rxe_put(mw);
703− } else {
704− mr = rxe_pool_get_index(&rxe->mr_pool, rkey >> 8);
705− if (!mr || mr->rkey != rkey)
706− return NULL;
710+
711+ return mr;
707712 }
708713
709− if (mr->state != RXE_MR_STATE_VALID) {
714+ mr = rxe_pool_get_index(&rxe->mr_pool, rkey >> 8);
715+ if (!mr)
716+ return NULL;
717+
718+ if (mr->rkey != rkey || mr->state != RXE_MR_STATE_VALID) {
710719 rxe_put(mr);
711720 return NULL;
712721 }
@@ -736,8 +745,14 @@ static enum resp_states read_reply(struct rxe_qp *qp, · 23 unmodified lines
736745 }
737746
738747 if (res->state == rdatm_res_state_new) {
739− mr = qp->resp.mr;
740− qp->resp.mr = NULL;
748+ if (!res->replay) {
749+ mr = qp->resp.mr;
750+ qp->resp.mr = NULL;
751+ } else {
752+ mr = rxe_recheck_mr(qp, res->read.rkey);
753+ if (!mr)
754+ return RESPST_ERR_RKEY_VIOLATION;
755+ }
741756
742757 if (res->read.resid <= mtu)
743758 opcode = IB_OPCODE_RC_RDMA_READ_RESPONSE_ONLY;
drivers/infiniband/sw/siw/siw_cm.c+4−3
@@ -968,14 +968,15 @@ static void siw_accept_newconn(struct siw_cep *cep) · 967 unmodified lines
968968
969969 siw_cep_set_inuse(new_cep);
970970 rv = siw_proc_mpareq(new_cep);
971− siw_cep_set_free(new_cep);
972−
973971 if (rv != -EAGAIN) {
974972 siw_cep_put(cep);
975973 new_cep->listen_cep = NULL;
976− if (rv)
974+ if (rv) {
975+ siw_cep_set_free(new_cep);
977976 goto error;
977+ }
978978 }
979+ siw_cep_set_free(new_cep);
979980 }
980981 return;
981982
drivers/interconnect/core.c+7−1
@@ -1087,9 +1087,15 @@ static int of_count_icc_providers(struct device_node *np) · 1086 unmodified lines
10871087 {
10881088 struct device_node *child;
10891089 int count = 0;
1090+ const struct of_device_id __maybe_unused ignore_list[] = {
1091+ { .compatible = "qcom,sc7180-ipa-virt" },
1092+ { .compatible = "qcom,sdx55-ipa-virt" },
1093+ {}
1094+ };
10901095
10911096 for_each_available_child_of_node(np, child) {
1092− if (of_property_read_bool(child, "#interconnect-cells"))
1097+ if (of_property_read_bool(child, "#interconnect-cells") &&
1098+ likely(!of_match_node(ignore_list, child)))
10931099 count++;
10941100 count += of_count_icc_providers(child);
10951101 }
drivers/interconnect/qcom/sc7180.c+0−21
@@ -47,7 +47,6 @@ DEFINE_QNODE(qnm_mnoc_sf, SC7180_MASTER_MNOC_SF_MEM_NOC, 1, 32, SC7180_SLAVE_GEM · 46 unmodified lines
4747 DEFINE_QNODE(qnm_snoc_gc, SC7180_MASTER_SNOC_GC_MEM_NOC, 1, 8, SC7180_SLAVE_LLCC);
4848 DEFINE_QNODE(qnm_snoc_sf, SC7180_MASTER_SNOC_SF_MEM_NOC, 1, 16, SC7180_SLAVE_LLCC);
4949 DEFINE_QNODE(qxm_gpu, SC7180_MASTER_GFX3D, 2, 32, SC7180_SLAVE_GEM_NOC_SNOC, SC7180_SLAVE_LLCC);
50−DEFINE_QNODE(ipa_core_master, SC7180_MASTER_IPA_CORE, 1, 8, SC7180_SLAVE_IPA_CORE);
5150 DEFINE_QNODE(llcc_mc, SC7180_MASTER_LLCC, 2, 4, SC7180_SLAVE_EBI1);
5251 DEFINE_QNODE(qhm_mnoc_cfg, SC7180_MASTER_CNOC_MNOC_CFG, 1, 4, SC7180_SLAVE_SERVICE_MNOC);
5352 DEFINE_QNODE(qxm_camnoc_hf0, SC7180_MASTER_CAMNOC_HF0, 2, 32, SC7180_SLAVE_MNOC_HF_MEM_NOC);
@@ -129,7 +128,6 @@ DEFINE_QNODE(qhs_mdsp_ms_mpu_cfg, SC7180_SLAVE_MSS_PROC_MS_MPU_CFG, 1, 4); · 75 unmodified lines
129128 DEFINE_QNODE(qns_gem_noc_snoc, SC7180_SLAVE_GEM_NOC_SNOC, 1, 8, SC7180_MASTER_GEM_NOC_SNOC);
130129 DEFINE_QNODE(qns_llcc, SC7180_SLAVE_LLCC, 1, 16, SC7180_MASTER_LLCC);
131130 DEFINE_QNODE(srvc_gemnoc, SC7180_SLAVE_SERVICE_GEM_NOC, 1, 4);
132−DEFINE_QNODE(ipa_core_slave, SC7180_SLAVE_IPA_CORE, 1, 8);
133131 DEFINE_QNODE(ebi, SC7180_SLAVE_EBI1, 2, 4);
134132 DEFINE_QNODE(qns_mem_noc_hf, SC7180_SLAVE_MNOC_HF_MEM_NOC, 1, 32, SC7180_MASTER_MNOC_HF_MEM_NOC);
135133 DEFINE_QNODE(qns_mem_noc_sf, SC7180_SLAVE_MNOC_SF_MEM_NOC, 1, 32, SC7180_MASTER_MNOC_SF_MEM_NOC);
@@ -160,7 +158,6 @@ DEFINE_QBCM(bcm_mc0, "MC0", true, &ebi); · 24 unmodified lines
160158 DEFINE_QBCM(bcm_sh0, "SH0", true, &qns_llcc);
161159 DEFINE_QBCM(bcm_mm0, "MM0", false, &qns_mem_noc_hf);
162160 DEFINE_QBCM(bcm_ce0, "CE0", false, &qxm_crypto);
163−DEFINE_QBCM(bcm_ip0, "IP0", false, &ipa_core_slave);
164161 DEFINE_QBCM(bcm_cn0, "CN0", true, &qnm_snoc, &xm_qdss_dap, &qhs_a1_noc_cfg, &qhs_a2_noc_cfg, &qhs_ahb2phy0, &qhs_aop, &qhs_aoss, &qhs_boot_rom, &qhs_camera_cfg, &qhs_camera_nrt_throttle_cfg, &qhs_camera_rt_throttle_cfg, &qhs_clk_ctl, &qhs_cpr_cx, &qhs_cpr_mx, &qhs_crypto0_cfg, &qhs_dcc_cfg, &qhs_ddrss_cfg, &qhs_display_cfg, &qhs_display_rt_throttle_cfg, &qhs_display_throttle_cfg, &qhs_glm, &qhs_gpuss_cfg, &qhs_imem_cfg, &qhs_ipa, &qhs_mnoc_cfg, &qhs_mss_cfg, &qhs_npu_cfg, &qhs_npu_dma_throttle_cfg, &qhs_npu_dsp_throttle_cfg, &qhs_pimem_cfg, &qhs_prng, &qhs_qdss_cfg, &qhs_qm_cfg, &qhs_qm_mpu_cfg, &qhs_qup0, &qhs_qup1, &qhs_security, &qhs_snoc_cfg, &qhs_tcsr, &qhs_tlmm_1, &qhs_tlmm_2, &qhs_tlmm_3, &qhs_ufs_mem_cfg, &qhs_usb3, &qhs_venus_cfg, &qhs_venus_throttle_cfg, &qhs_vsense_ctrl_cfg, &srvc_cnoc);
165162 DEFINE_QBCM(bcm_mm1, "MM1", false, &qxm_camnoc_hf0_uncomp, &qxm_camnoc_hf1_uncomp, &qxm_camnoc_sf_uncomp, &qhm_mnoc_cfg, &qxm_mdp0, &qxm_rot, &qxm_venus0, &qxm_venus_arm9);
166163 DEFINE_QBCM(bcm_sh2, "SH2", false, &acm_sys_tcu);
@@ -372,22 +369,6 @@ static struct qcom_icc_desc sc7180_gem_noc = { · 205 unmodified lines
372369 .num_bcms = ARRAY_SIZE(gem_noc_bcms),
373370 };
374371
375−static struct qcom_icc_bcm *ipa_virt_bcms[] = {
376− &bcm_ip0,
377−};
378−
379−static struct qcom_icc_node *ipa_virt_nodes[] = {
380− [MASTER_IPA_CORE] = &ipa_core_master,
381− [SLAVE_IPA_CORE] = &ipa_core_slave,
382−};
383−
384−static struct qcom_icc_desc sc7180_ipa_virt = {
385− .nodes = ipa_virt_nodes,
386− .num_nodes = ARRAY_SIZE(ipa_virt_nodes),
387− .bcms = ipa_virt_bcms,
388− .num_bcms = ARRAY_SIZE(ipa_virt_bcms),
389−};
390−
391372 static struct qcom_icc_bcm *mc_virt_bcms[] = {
392373 &bcm_acv,
393374 &bcm_mc0,
@@ -519,8 +500,6 @@ static const struct of_device_id qnoc_of_match[] = { · 125 unmodified lines
519500 .data = &sc7180_dc_noc},
520501 { .compatible = "qcom,sc7180-gem-noc",
521502 .data = &sc7180_gem_noc},
522− { .compatible = "qcom,sc7180-ipa-virt",
523− .data = &sc7180_ipa_virt},
524503 { .compatible = "qcom,sc7180-mc-virt",
525504 .data = &sc7180_mc_virt},
526505 { .compatible = "qcom,sc7180-mmss-noc",
drivers/interconnect/qcom/sdx55.c+0−21
@@ -18,7 +18,6 @@ · 17 unmodified lines
1818 #include "icc-rpmh.h"
1919 #include "sdx55.h"
2020
21−DEFINE_QNODE(ipa_core_master, SDX55_MASTER_IPA_CORE, 1, 8, SDX55_SLAVE_IPA_CORE);
2221 DEFINE_QNODE(llcc_mc, SDX55_MASTER_LLCC, 4, 4, SDX55_SLAVE_EBI_CH0);
2322 DEFINE_QNODE(acm_tcu, SDX55_MASTER_TCU_0, 1, 8, SDX55_SLAVE_LLCC, SDX55_SLAVE_MEM_NOC_SNOC, SDX55_SLAVE_MEM_NOC_PCIE_SNOC);
2423 DEFINE_QNODE(qnm_snoc_gc, SDX55_MASTER_SNOC_GC_MEM_NOC, 1, 8, SDX55_SLAVE_LLCC);
@@ -40,7 +39,6 @@ DEFINE_QNODE(xm_pcie, SDX55_MASTER_PCIE, 1, 8, SDX55_SLAVE_ANOC_SNOC); · 15 unmodified lines
4039 DEFINE_QNODE(xm_qdss_etr, SDX55_MASTER_QDSS_ETR, 1, 8, SDX55_SLAVE_SNOC_CFG, SDX55_SLAVE_EMAC_CFG, SDX55_SLAVE_USB3, SDX55_SLAVE_AOSS, SDX55_SLAVE_SPMI_FETCHER, SDX55_SLAVE_QDSS_CFG, SDX55_SLAVE_PDM, SDX55_SLAVE_SNOC_MEM_NOC_GC, SDX55_SLAVE_TCSR, SDX55_SLAVE_CNOC_DDRSS, SDX55_SLAVE_SPMI_VGI_COEX, SDX55_SLAVE_QPIC, SDX55_SLAVE_OCIMEM, SDX55_SLAVE_IPA_CFG, SDX55_SLAVE_USB3_PHY_CFG, SDX55_SLAVE_AOP, SDX55_SLAVE_BLSP_1, SDX55_SLAVE_SDCC_1, SDX55_SLAVE_CNOC_MSS, SDX55_SLAVE_PCIE_PARF, SDX55_SLAVE_ECC_CFG, SDX55_SLAVE_AUDIO, SDX55_SLAVE_AOSS, SDX55_SLAVE_PRNG, SDX55_SLAVE_CRYPTO_0_CFG, SDX55_SLAVE_TCU, SDX55_SLAVE_CLK_CTL, SDX55_SLAVE_IMEM_CFG);
4140 DEFINE_QNODE(xm_sdc1, SDX55_MASTER_SDCC_1, 1, 8, SDX55_SLAVE_AOSS, SDX55_SLAVE_IPA_CFG, SDX55_SLAVE_ANOC_SNOC, SDX55_SLAVE_AOP, SDX55_SLAVE_AUDIO);
4241 DEFINE_QNODE(xm_usb3, SDX55_MASTER_USB3, 1, 8, SDX55_SLAVE_ANOC_SNOC);
43−DEFINE_QNODE(ipa_core_slave, SDX55_SLAVE_IPA_CORE, 1, 8);
4442 DEFINE_QNODE(ebi, SDX55_SLAVE_EBI_CH0, 1, 4);
4543 DEFINE_QNODE(qns_llcc, SDX55_SLAVE_LLCC, 1, 16, SDX55_SLAVE_EBI_CH0);
4644 DEFINE_QNODE(qns_memnoc_snoc, SDX55_SLAVE_MEM_NOC_SNOC, 1, 8, SDX55_MASTER_MEM_NOC_SNOC);
@@ -82,7 +80,6 @@ DEFINE_QNODE(xs_sys_tcu_cfg, SDX55_SLAVE_TCU, 1, 8); · 35 unmodified lines
8280 DEFINE_QBCM(bcm_mc0, "MC0", true, &ebi);
8381 DEFINE_QBCM(bcm_sh0, "SH0", true, &qns_llcc);
8482 DEFINE_QBCM(bcm_ce0, "CE0", false, &qxm_crypto);
85−DEFINE_QBCM(bcm_ip0, "IP0", false, &ipa_core_slave);
8683 DEFINE_QBCM(bcm_pn0, "PN0", false, &qhm_snoc_cfg);
8784 DEFINE_QBCM(bcm_sh3, "SH3", false, &xm_apps_rdwr);
8885 DEFINE_QBCM(bcm_sh4, "SH4", false, &qns_memnoc_snoc, &qns_sys_pcie);
@@ -219,22 +216,6 @@ static const struct qcom_icc_desc sdx55_system_noc = { · 130 unmodified lines
219216 .num_bcms = ARRAY_SIZE(system_noc_bcms),
220217 };
221218
222−static struct qcom_icc_bcm *ipa_virt_bcms[] = {
223− &bcm_ip0,
224−};
225−
226−static struct qcom_icc_node *ipa_virt_nodes[] = {
227− [MASTER_IPA_CORE] = &ipa_core_master,
228− [SLAVE_IPA_CORE] = &ipa_core_slave,
229−};
230−
231−static const struct qcom_icc_desc sdx55_ipa_virt = {
232− .nodes = ipa_virt_nodes,
233− .num_nodes = ARRAY_SIZE(ipa_virt_nodes),
234− .bcms = ipa_virt_bcms,
235− .num_bcms = ARRAY_SIZE(ipa_virt_bcms),
236−};
237−
238219 static const struct of_device_id qnoc_of_match[] = {
239220 { .compatible = "qcom,sdx55-mc-virt",
240221 .data = &sdx55_mc_virt},
@@ -242,8 +223,6 @@ static const struct of_device_id qnoc_of_match[] = { · 1 unmodified line
242223 .data = &sdx55_mem_noc},
243224 { .compatible = "qcom,sdx55-system-noc",
244225 .data = &sdx55_system_noc},
245− { .compatible = "qcom,sdx55-ipa-virt",
246− .data = &sdx55_ipa_virt},
247226 { }
248227 };
249228 MODULE_DEVICE_TABLE(of, qnoc_of_match);
drivers/iommu/amd/amd_iommu_types.h+4−0
@@ -407,6 +407,7 @@ · 406 unmodified lines
407407 /* IOMMU IVINFO */
408408 #define IOMMU_IVINFO_OFFSET 36
409409 #define IOMMU_IVINFO_EFRSUP BIT(0)
410+#define IOMMU_IVINFO_DMA_REMAP BIT(1)
410411
411412 /* IOMMU Feature Reporting Field (for IVHD type 10h */
412413 #define IOMMU_FEAT_GASUP_SHIFT 6
@@ -449,6 +450,9 @@ extern struct irq_remap_table **irq_lookup_table; · 36 unmodified lines
449450 /* Interrupt remapping feature used? */
450451 extern bool amd_iommu_irq_remap;
451452
453+/* IVRS indicates that pre-boot remapping was enabled */
454+extern bool amdr_ivrs_remap_support;
455+
452456 /* kmem_cache to get tables with 128 byte alignement */
453457 extern struct kmem_cache *amd_iommu_irq_cache;
454458
drivers/iommu/amd/init.c+5−3
@@ -84,7 +84,7 @@ · 83 unmodified lines
8484 #define ACPI_DEVFLAG_LINT1 0x80
8585 #define ACPI_DEVFLAG_ATSDIS 0x10000000
8686
87−#define LOOP_TIMEOUT 100000
87+#define LOOP_TIMEOUT 2000000
8888 /*
8989 * ACPI table definitions
9090 *
@@ -182,6 +182,7 @@ u32 amd_iommu_max_pasid __read_mostly = ~0; · 91 unmodified lines
182182
183183 bool amd_iommu_v2_present __read_mostly;
184184 static bool amd_iommu_pc_present __read_mostly;
185+bool amdr_ivrs_remap_support __read_mostly;
185186
186187 bool amd_iommu_force_isolation __read_mostly;
187188
@@ -326,6 +327,8 @@ static void __init early_iommu_features_init(struct amd_iommu *iommu, · 138 unmodified lines
326327 {
327328 if (amd_iommu_ivinfo & IOMMU_IVINFO_EFRSUP)
328329 iommu->features = h->efr_reg;
330+ if (amd_iommu_ivinfo & IOMMU_IVINFO_DMA_REMAP)
331+ amdr_ivrs_remap_support = true;
329332 }
330333
331334 /* Access to l1 and l2 indexed register spaces */
@@ -1986,8 +1989,7 @@ static int __init amd_iommu_init_pci(void) · 1654 unmodified lines
19861989 for_each_iommu(iommu)
19871990 iommu_flush_all_caches(iommu);
19881991
1989− if (!ret)
1990− print_iommu_info();
1992+ print_iommu_info();
19911993
19921994 out:
19931995 return ret;
drivers/iommu/amd/iommu.c+9−7
@@ -1838,17 +1838,10 @@ void amd_iommu_domain_update(struct protection_domain *domain) · 1837 unmodified lines
18381838 amd_iommu_domain_flush_complete(domain);
18391839 }
18401840
1841−static void __init amd_iommu_init_dma_ops(void)
1842−{
1843− swiotlb = (iommu_default_passthrough() || sme_me_mask) ? 1 : 0;
1844−}
1845−
18461841 int __init amd_iommu_init_api(void)
18471842 {
18481843 int err;
18491844
1850− amd_iommu_init_dma_ops();
1851−
18521845 err = bus_set_iommu(&pci_bus_type, &amd_iommu_ops);
18531846 if (err)
18541847 return err;
@@ -2162,6 +2155,8 @@ static bool amd_iommu_capable(enum iommu_cap cap) · 307 unmodified lines
21622155 return (irq_remapping_enabled == 1);
21632156 case IOMMU_CAP_NOEXEC:
21642157 return false;
2158+ case IOMMU_CAP_PRE_BOOT_PROTECTION:
2159+ return amdr_ivrs_remap_support;
21652160 default:
21662161 break;
21672162 }
@@ -2271,6 +2266,12 @@ static int amd_iommu_def_domain_type(struct device *dev) · 103 unmodified lines
22712266 return 0;
22722267 }
22732268
2269+static bool amd_iommu_enforce_cache_coherency(struct iommu_domain *domain)
2270+{
2271+ /* IOMMU_PTE_FC is always set */
2272+ return true;
2273+}
2274+
22742275 const struct iommu_ops amd_iommu_ops = {
22752276 .capable = amd_iommu_capable,
22762277 .domain_alloc = amd_iommu_domain_alloc,
@@ -2293,6 +2294,7 @@ const struct iommu_ops amd_iommu_ops = { · 16 unmodified lines
22932294 .flush_iotlb_all = amd_iommu_flush_iotlb_all,
22942295 .iotlb_sync = amd_iommu_iotlb_sync,
22952296 .free = amd_iommu_domain_free,
2297+ .enforce_cache_coherency = amd_iommu_enforce_cache_coherency,
22962298 }
22972299 };
22982300
drivers/iommu/amd/iommu_v2.c+11−1
@@ -956,6 +956,7 @@ static void __exit amd_iommu_v2_exit(void) · 955 unmodified lines
956956 {
957957 struct device_state *dev_state, *next;
958958 unsigned long flags;
959+ LIST_HEAD(freelist);
959960
960961 if (!amd_iommu_v2_supported())
961962 return;
@@ -975,11 +976,20 @@ static void __exit amd_iommu_v2_exit(void) · 13 unmodified lines
975976
976977 put_device_state(dev_state);
977978 list_del(&dev_state->list);
978− free_device_state(dev_state);
979+ list_add_tail(&dev_state->list, &freelist);
979980 }
980981
981982 spin_unlock_irqrestore(&state_lock, flags);
982983
984+ /*
985+ * Since free_device_state waits on the count to be zero,
986+ * we need to free dev_state outside the spinlock.
987+ */
988+ list_for_each_entry_safe(dev_state, next, &freelist, list) {
989+ list_del(&dev_state->list);
990+ free_device_state(dev_state);
991+ }
992+
983993 destroy_workqueue(iommu_wq);
984994 }
985995
drivers/iommu/apple-dart.c+5−5
@@ -773,6 +773,7 @@ static const struct iommu_ops apple_dart_iommu_ops = { · 772 unmodified lines
773773 .get_resv_regions = apple_dart_get_resv_regions,
774774 .put_resv_regions = generic_iommu_put_resv_regions,
775775 .pgsize_bitmap = -1UL, /* Restricted during dart probe */
776+ .owner = THIS_MODULE,
776777 .default_domain_ops = &(const struct iommu_domain_ops) {
777778 .attach_dev = apple_dart_attach_dev,
778779 .detach_dev = apple_dart_detach_dev,
@@ -859,16 +860,15 @@ static int apple_dart_probe(struct platform_device *pdev) · 80 unmodified lines
859860 dart->dev = dev;
860861 spin_lock_init(&dart->lock);
861862
862− res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
863+ dart->regs = devm_platform_get_and_ioremap_resource(pdev, 0, &res);
864+ if (IS_ERR(dart->regs))
865+ return PTR_ERR(dart->regs);
866+
863867 if (resource_size(res) < 0x4000) {
864868 dev_err(dev, "MMIO region too small (%pr)\n", res);
865869 return -EINVAL;
866870 }
867871
868− dart->regs = devm_ioremap_resource(dev, res);
869− if (IS_ERR(dart->regs))
870− return PTR_ERR(dart->regs);
871−
872872 dart->irq = platform_get_irq(pdev, 0);
873873 if (dart->irq < 0)
874874 return -ENODEV;
drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-sva.c+19−3
@@ -6,6 +6,7 @@ · 5 unmodified lines
66 #include <linux/mm.h>
77 #include <linux/mmu_context.h>
88 #include <linux/mmu_notifier.h>
9+#include <linux/sched/mm.h>
910 #include <linux/slab.h>
1011
1112 #include "arm-smmu-v3.h"
@@ -96,9 +97,14 @@ static struct arm_smmu_ctx_desc *arm_smmu_alloc_shared_cd(struct mm_struct *mm) · 84 unmodified lines
9697 struct arm_smmu_ctx_desc *cd;
9798 struct arm_smmu_ctx_desc *ret = NULL;
9899
100+ /* Don't free the mm until we release the ASID */
101+ mmgrab(mm);
102+
99103 asid = arm64_mm_context_get(mm);
100− if (!asid)
101− return ERR_PTR(-ESRCH);
104+ if (!asid) {
105+ err = -ESRCH;
106+ goto out_drop_mm;
107+ }
102108
103109 cd = kzalloc(sizeof(*cd), GFP_KERNEL);
104110 if (!cd) {
@@ -165,6 +171,8 @@ out_free_cd: · 60 unmodified lines
165171 kfree(cd);
166172 out_put_context:
167173 arm64_mm_context_put(mm);
174+out_drop_mm:
175+ mmdrop(mm);
168176 return err < 0 ? ERR_PTR(err) : ret;
169177 }
170178
@@ -173,6 +181,7 @@ static void arm_smmu_free_shared_cd(struct arm_smmu_ctx_desc *cd) · 2 unmodified lines
173181 if (arm_smmu_free_asid(cd)) {
174182 /* Unpin ASID */
175183 arm64_mm_context_put(cd->mm);
184+ mmdrop(cd->mm);
176185 kfree(cd);
177186 }
178187 }
@@ -183,7 +192,14 @@ static void arm_smmu_mm_invalidate_range(struct mmu_notifier *mn, · 4 unmodified lines
183192 {
184193 struct arm_smmu_mmu_notifier *smmu_mn = mn_to_smmu(mn);
185194 struct arm_smmu_domain *smmu_domain = smmu_mn->domain;
186− size_t size = end - start + 1;
195+ size_t size;
196+
197+ /*
198+ * The mm_types defines vm_end as the first byte after the end address,
199+ * different from IOMMU subsystem using the last address of an address
200+ * range. So do a simple translation here by calculating size correctly.
201+ */
202+ size = end - start;
187203
188204 if (!(smmu_domain->smmu->features & ARM_SMMU_FEAT_BTM))
189205 arm_smmu_tlb_inv_range_asid(start, size, smmu_mn->cd->asid,
drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c+2−0
@@ -3770,6 +3770,8 @@ static int arm_smmu_device_probe(struct platform_device *pdev) · 3769 unmodified lines
37703770
37713771 /* Base address */
37723772 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
3773+ if (!res)
3774+ return -EINVAL;
37733775 if (resource_size(res) < arm_smmu_resource_size(smmu)) {
37743776 dev_err(dev, "MMIO region too small (%pr)\n", res);
37753777 return -EINVAL;
drivers/iommu/arm/arm-smmu/arm-smmu-impl.c+2−1
@@ -211,7 +211,8 @@ struct arm_smmu_device *arm_smmu_impl_init(struct arm_smmu_device *smmu) · 210 unmodified lines
211211 if (of_property_read_bool(np, "calxeda,smmu-secure-config-access"))
212212 smmu->impl = &calxeda_impl;
213213
214− if (of_device_is_compatible(np, "nvidia,tegra194-smmu") ||
214+ if (of_device_is_compatible(np, "nvidia,tegra234-smmu") ||
215+ of_device_is_compatible(np, "nvidia,tegra194-smmu") ||
215216 of_device_is_compatible(np, "nvidia,tegra186-smmu"))
216217 return nvidia_smmu_impl_init(smmu);
217218
drivers/iommu/arm/arm-smmu/arm-smmu-nvidia.c+30−0
@@ -258,6 +258,34 @@ static void nvidia_smmu_probe_finalize(struct arm_smmu_device *smmu, struct devi · 257 unmodified lines
258258 dev_name(dev), err);
259259 }
260260
261+static int nvidia_smmu_init_context(struct arm_smmu_domain *smmu_domain,
262+ struct io_pgtable_cfg *pgtbl_cfg,
263+ struct device *dev)
264+{
265+ struct arm_smmu_device *smmu = smmu_domain->smmu;
266+ const struct device_node *np = smmu->dev->of_node;
267+
268+ /*
269+ * Tegra194 and Tegra234 SoCs have the erratum that causes walk cache
270+ * entries to not be invalidated correctly. The problem is that the walk
271+ * cache index generated for IOVA is not same across translation and
272+ * invalidation requests. This is leading to page faults when PMD entry
273+ * is released during unmap and populated with new PTE table during
274+ * subsequent map request. Disabling large page mappings avoids the
275+ * release of PMD entry and avoid translations seeing stale PMD entry in
276+ * walk cache.
277+ * Fix this by limiting the page mappings to PAGE_SIZE on Tegra194 and
278+ * Tegra234.
279+ */
280+ if (of_device_is_compatible(np, "nvidia,tegra234-smmu") ||
281+ of_device_is_compatible(np, "nvidia,tegra194-smmu")) {
282+ smmu->pgsize_bitmap = PAGE_SIZE;
283+ pgtbl_cfg->pgsize_bitmap = smmu->pgsize_bitmap;
284+ }
285+
286+ return 0;
287+}
288+
261289 static const struct arm_smmu_impl nvidia_smmu_impl = {
262290 .read_reg = nvidia_smmu_read_reg,
263291 .write_reg = nvidia_smmu_write_reg,
@@ -268,10 +296,12 @@ static const struct arm_smmu_impl nvidia_smmu_impl = { · 4 unmodified lines
268296 .global_fault = nvidia_smmu_global_fault,
269297 .context_fault = nvidia_smmu_context_fault,
270298 .probe_finalize = nvidia_smmu_probe_finalize,
299+ .init_context = nvidia_smmu_init_context,
271300 };
272301
273302 static const struct arm_smmu_impl nvidia_smmu_single_impl = {
274303 .probe_finalize = nvidia_smmu_probe_finalize,
304+ .init_context = nvidia_smmu_init_context,
275305 };
276306
277307 struct arm_smmu_device *nvidia_smmu_impl_init(struct arm_smmu_device *smmu)
drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c+1−0
@@ -408,6 +408,7 @@ static const struct of_device_id __maybe_unused qcom_smmu_impl_of_match[] = { · 407 unmodified lines
408408 { .compatible = "qcom,sc7180-smmu-500" },
409409 { .compatible = "qcom,sc7280-smmu-500" },
410410 { .compatible = "qcom,sc8180x-smmu-500" },
411+ { .compatible = "qcom,sc8280xp-smmu-500" },
411412 { .compatible = "qcom,sdm630-smmu-v2" },
412413 { .compatible = "qcom,sdm845-smmu-500" },
413414 { .compatible = "qcom,sm6125-smmu-500" },
drivers/iommu/arm/arm-smmu/arm-smmu.c+5−3
@@ -1574,6 +1574,9 @@ static int arm_smmu_def_domain_type(struct device *dev) · 1573 unmodified lines
15741574 struct arm_smmu_master_cfg *cfg = dev_iommu_priv_get(dev);
15751575 const struct arm_smmu_impl *impl = cfg->smmu->impl;
15761576
1577+ if (using_legacy_binding)
1578+ return IOMMU_DOMAIN_IDENTITY;
1579+
15771580 if (impl && impl->def_domain_type)
15781581 return impl->def_domain_type(dev);
15791582
@@ -2092,11 +2095,10 @@ static int arm_smmu_device_probe(struct platform_device *pdev) · 512 unmodified lines
20922095 if (err)
20932096 return err;
20942097
2095− res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
2096− ioaddr = res->start;
2097− smmu->base = devm_ioremap_resource(dev, res);
2098+ smmu->base = devm_platform_get_and_ioremap_resource(pdev, 0, &res);
20982099 if (IS_ERR(smmu->base))
20992100 return PTR_ERR(smmu->base);
2101+ ioaddr = res->start;
21002102 /*
21012103 * The resource size should effectively match the value of SMMU_TOP;
21022104 * stash that temporarily until we know PAGESIZE to validate it with.
drivers/iommu/dma-iommu.c+21−4
@@ -20,6 +20,7 @@ · 19 unmodified lines
2020 #include <linux/iommu.h>
2121 #include <linux/iova.h>
2222 #include <linux/irq.h>
23+#include <linux/list_sort.h>
2324 #include <linux/mm.h>
2425 #include <linux/mutex.h>
2526 #include <linux/pci.h>
@@ -414,6 +415,15 @@ static int cookie_init_hw_msi_region(struct iommu_dma_cookie *cookie, · 388 unmodified lines
414415 return 0;
415416 }
416417
418+static int iommu_dma_ranges_sort(void *priv, const struct list_head *a,
419+ const struct list_head *b)
420+{
421+ struct resource_entry *res_a = list_entry(a, typeof(*res_a), node);
422+ struct resource_entry *res_b = list_entry(b, typeof(*res_b), node);
423+
424+ return res_a->res->start > res_b->res->start;
425+}
426+
417427 static int iova_reserve_pci_windows(struct pci_dev *dev,
418428 struct iova_domain *iovad)
419429 {
@@ -432,6 +442,7 @@ static int iova_reserve_pci_windows(struct pci_dev *dev, · 12 unmodified lines
432442 }
433443
434444 /* Get reserved DMA windows from host bridge */
445+ list_sort(NULL, &bridge->dma_ranges, iommu_dma_ranges_sort);
435446 resource_list_for_each_entry(window, &bridge->dma_ranges) {
436447 end = window->res->start - window->offset;
437448 resv_iova:
@@ -440,7 +451,7 @@ resv_iova: · 2 unmodified lines
440451 hi = iova_pfn(iovad, end);
441452 reserve_iova(iovad, lo, hi);
442453 } else if (end < start) {
443− /* dma_ranges list should be sorted */
454+ /* DMA ranges should be non-overlapping */
444455 dev_err(&dev->dev,
445456 "Failed to reserve IOVA [%pa-%pa]\n",
446457 &start, &end);
@@ -776,6 +787,7 @@ static struct page **__iommu_dma_alloc_noncontiguous(struct device *dev, · 329 unmodified lines
776787 unsigned int count, min_size, alloc_sizes = domain->pgsize_bitmap;
777788 struct page **pages;
778789 dma_addr_t iova;
790+ ssize_t ret;
779791
780792 if (static_branch_unlikely(&iommu_deferred_attach_enabled) &&
781793 iommu_deferred_attach(dev, domain))
@@ -813,8 +825,8 @@ static struct page **__iommu_dma_alloc_noncontiguous(struct device *dev, · 31 unmodified lines
813825 arch_dma_prep_coherent(sg_page(sg), sg->length);
814826 }
815827
816− if (iommu_map_sg_atomic(domain, iova, sgt->sgl, sgt->orig_nents, ioprot)
817− < size)
828+ ret = iommu_map_sg_atomic(domain, iova, sgt->sgl, sgt->orig_nents, ioprot);
829+ if (ret < 0 || ret < size)
818830 goto out_free_sg;
819831
820832 sgt->sgl->dma_address = iova;
@@ -971,6 +983,11 @@ static dma_addr_t iommu_dma_map_page(struct device *dev, struct page *page, · 150 unmodified lines
971983 void *padding_start;
972984 size_t padding_size, aligned_size;
973985
986+ if (!is_swiotlb_active(dev)) {
987+ dev_warn_once(dev, "DMA bounce buffers are inactive, unable to map unaligned transaction.\n");
988+ return DMA_MAPPING_ERROR;
989+ }
990+
974991 aligned_size = iova_align(iovad, size);
975992 phys = swiotlb_tbl_map_single(dev, phys, size, aligned_size,
976993 iova_mask(iovad), dir, attrs);
@@ -1209,7 +1226,7 @@ static int iommu_dma_map_sg(struct device *dev, struct scatterlist *sg, · 232 unmodified lines
12091226 * implementation - it knows better than we do.
12101227 */
12111228 ret = iommu_map_sg_atomic(domain, iova, sg, nents, prot);
1212− if (ret < iova_len)
1229+ if (ret < 0 || ret < iova_len)
12131230 goto out_free_iova;
12141231
12151232 return __finalise_sg(dev, sg, nents, iova);
drivers/iommu/fsl_pamu.c+3−0
@@ -11,6 +11,9 @@ · 10 unmodified lines
1111 #include <linux/fsl/guts.h>
1212 #include <linux/interrupt.h>
1313 #include <linux/genalloc.h>
14+#include <linux/of_address.h>
15+#include <linux/of_irq.h>
16+#include <linux/platform_device.h>
1417
1518 #include <asm/mpc85xx.h>
1619
drivers/iommu/fsl_pamu_domain.c+1−0
@@ -9,6 +9,7 @@ · 8 unmodified lines
99
1010 #include "fsl_pamu_domain.h"
1111
12+#include <linux/platform_device.h>
1213 #include <sysdev/fsl_pci.h>
1314
1415 /*
drivers/iommu/intel/iommu.c+140−103
@@ -533,33 +533,6 @@ static void domain_update_iommu_coherency(struct dmar_domain *domain) · 532 unmodified lines
533533 rcu_read_unlock();
534534 }
535535
536−static bool domain_update_iommu_snooping(struct intel_iommu *skip)
537−{
538− struct dmar_drhd_unit *drhd;
539− struct intel_iommu *iommu;
540− bool ret = true;
541−
542− rcu_read_lock();
543− for_each_active_iommu(iommu, drhd) {
544− if (iommu != skip) {
545− /*
546− * If the hardware is operating in the scalable mode,
547− * the snooping control is always supported since we
548− * always set PASID-table-entry.PGSNP bit if the domain
549− * is managed outside (UNMANAGED).
550− */
551− if (!sm_supported(iommu) &&
552− !ecap_sc_support(iommu->ecap)) {
553− ret = false;
554− break;
555− }
556− }
557− }
558− rcu_read_unlock();
559−
560− return ret;
561−}
562−
563536 static int domain_update_iommu_superpage(struct dmar_domain *domain,
564537 struct intel_iommu *skip)
565538 {
@@ -641,7 +614,6 @@ static unsigned long domain_super_pgsize_bitmap(struct dmar_domain *domain) · 75 unmodified lines
641614 static void domain_update_iommu_cap(struct dmar_domain *domain)
642615 {
643616 domain_update_iommu_coherency(domain);
644− domain->iommu_snooping = domain_update_iommu_snooping(NULL);
645617 domain->iommu_superpage = domain_update_iommu_superpage(domain, NULL);
646618
647619 /*
@@ -1588,7 +1560,8 @@ static void iommu_flush_iotlb_psi(struct intel_iommu *iommu, · 940 unmodified lines
15881560 unsigned long pfn, unsigned int pages,
15891561 int ih, int map)
15901562 {
1591− unsigned int mask = ilog2(__roundup_pow_of_two(pages));
1563+ unsigned int aligned_pages = __roundup_pow_of_two(pages);
1564+ unsigned int mask = ilog2(aligned_pages);
15921565 uint64_t addr = (uint64_t)pfn << VTD_PAGE_SHIFT;
15931566 u16 did = domain->iommu_did[iommu->seq_id];
15941567
@@ -1600,10 +1573,30 @@ static void iommu_flush_iotlb_psi(struct intel_iommu *iommu, · 5 unmodified lines
16001573 if (domain_use_first_level(domain)) {
16011574 qi_flush_piotlb(iommu, did, PASID_RID2PASID, addr, pages, ih);
16021575 } else {
1576+ unsigned long bitmask = aligned_pages - 1;
1577+
1578+ /*
1579+ * PSI masks the low order bits of the base address. If the
1580+ * address isn't aligned to the mask, then compute a mask value
1581+ * needed to ensure the target range is flushed.
1582+ */
1583+ if (unlikely(bitmask & pfn)) {
1584+ unsigned long end_pfn = pfn + pages - 1, shared_bits;
1585+
1586+ /*
1587+ * Since end_pfn <= pfn + bitmask, the only way bits
1588+ * higher than bitmask can differ in pfn and end_pfn is
1589+ * by carrying. This means after masking out bitmask,
1590+ * high bits starting with the first set bit in
1591+ * shared_bits are all equal in both pfn and end_pfn.
1592+ */
1593+ shared_bits = ~(pfn ^ end_pfn) & ~bitmask;
1594+ mask = shared_bits ? __ffs(shared_bits) : BITS_PER_LONG;
1595+ }
1596+
16031597 /*
16041598 * Fallback to domain selective flush if no PSI support or
1605− * the size is too big. PSI requires page size to be 2 ^ x,
1606− * and the base address is naturally aligned to the size.
1599+ * the size is too big.
16071600 */
16081601 if (!cap_pgsel_inv(iommu->cap) ||
16091602 mask > cap_max_amask_val(iommu->cap))
@@ -2439,7 +2432,7 @@ static int domain_setup_first_level(struct intel_iommu *iommu, · 829 unmodified lines
24392432 if (level == 5)
24402433 flags |= PASID_FLAG_FL5LP;
24412434
2442− if (domain->domain.type == IOMMU_DOMAIN_UNMANAGED)
2435+ if (domain->force_snooping)
24432436 flags |= PASID_FLAG_PAGE_SNOOP;
24442437
24452438 return intel_pasid_setup_first_level(iommu, dev, (pgd_t *)pgd, pasid,
@@ -2453,64 +2446,6 @@ static bool dev_is_real_dma_subdevice(struct device *dev) · 7 unmodified lines
24532446 pci_real_dma_dev(to_pci_dev(dev)) != to_pci_dev(dev);
24542447 }
24552448
2456−static struct dmar_domain *dmar_insert_one_dev_info(struct intel_iommu *iommu,
2457− int bus, int devfn,
2458− struct device *dev,
2459− struct dmar_domain *domain)
2460−{
2461− struct device_domain_info *info = dev_iommu_priv_get(dev);
2462− unsigned long flags;
2463− int ret;
2464−
2465− spin_lock_irqsave(&device_domain_lock, flags);
2466− info->domain = domain;
2467− spin_lock(&iommu->lock);
2468− ret = domain_attach_iommu(domain, iommu);
2469− spin_unlock(&iommu->lock);
2470− if (ret) {
2471− spin_unlock_irqrestore(&device_domain_lock, flags);
2472− return NULL;
2473− }
2474− list_add(&info->link, &domain->devices);
2475− spin_unlock_irqrestore(&device_domain_lock, flags);
2476−
2477− /* PASID table is mandatory for a PCI device in scalable mode. */
2478− if (sm_supported(iommu) && !dev_is_real_dma_subdevice(dev)) {
2479− ret = intel_pasid_alloc_table(dev);
2480− if (ret) {
2481− dev_err(dev, "PASID table allocation failed\n");
2482− dmar_remove_one_dev_info(dev);
2483− return NULL;
2484− }
2485−
2486− /* Setup the PASID entry for requests without PASID: */
2487− spin_lock_irqsave(&iommu->lock, flags);
2488− if (hw_pass_through && domain_type_is_si(domain))
2489− ret = intel_pasid_setup_pass_through(iommu, domain,
2490− dev, PASID_RID2PASID);
2491− else if (domain_use_first_level(domain))
2492− ret = domain_setup_first_level(iommu, domain, dev,
2493− PASID_RID2PASID);
2494− else
2495− ret = intel_pasid_setup_second_level(iommu, domain,
2496− dev, PASID_RID2PASID);
2497− spin_unlock_irqrestore(&iommu->lock, flags);
2498− if (ret) {
2499− dev_err(dev, "Setup RID2PASID failed\n");
2500− dmar_remove_one_dev_info(dev);
2501− return NULL;
2502− }
2503− }
2504−
2505− if (dev && domain_context_mapping(domain, dev)) {
2506− dev_err(dev, "Domain context map failed\n");
2507− dmar_remove_one_dev_info(dev);
2508− return NULL;
2509− }
2510−
2511− return domain;
2512−}
2513−
25142449 static int iommu_domain_identity_map(struct dmar_domain *domain,
25152450 unsigned long first_vpfn,
25162451 unsigned long last_vpfn)
@@ -2586,17 +2521,62 @@ static int __init si_domain_init(int hw) · 69 unmodified lines
25862521
25872522 static int domain_add_dev_info(struct dmar_domain *domain, struct device *dev)
25882523 {
2589− struct dmar_domain *ndomain;
2524+ struct device_domain_info *info = dev_iommu_priv_get(dev);
25902525 struct intel_iommu *iommu;
2526+ unsigned long flags;
25912527 u8 bus, devfn;
2528+ int ret;
25922529
25932530 iommu = device_to_iommu(dev, &bus, &devfn);
25942531 if (!iommu)
25952532 return -ENODEV;
25962533
2597− ndomain = dmar_insert_one_dev_info(iommu, bus, devfn, dev, domain);
2598− if (ndomain != domain)
2599− return -EBUSY;
2534+ spin_lock_irqsave(&device_domain_lock, flags);
2535+ info->domain = domain;
2536+ spin_lock(&iommu->lock);
2537+ ret = domain_attach_iommu(domain, iommu);
2538+ spin_unlock(&iommu->lock);
2539+ if (ret) {
2540+ spin_unlock_irqrestore(&device_domain_lock, flags);
2541+ return ret;
2542+ }
2543+ list_add(&info->link, &domain->devices);
2544+ spin_unlock_irqrestore(&device_domain_lock, flags);
2545+
2546+ /* PASID table is mandatory for a PCI device in scalable mode. */
2547+ if (sm_supported(iommu) && !dev_is_real_dma_subdevice(dev)) {
2548+ ret = intel_pasid_alloc_table(dev);
2549+ if (ret) {
2550+ dev_err(dev, "PASID table allocation failed\n");
2551+ dmar_remove_one_dev_info(dev);
2552+ return ret;
2553+ }
2554+
2555+ /* Setup the PASID entry for requests without PASID: */
2556+ spin_lock_irqsave(&iommu->lock, flags);
2557+ if (hw_pass_through && domain_type_is_si(domain))
2558+ ret = intel_pasid_setup_pass_through(iommu, domain,
2559+ dev, PASID_RID2PASID);
2560+ else if (domain_use_first_level(domain))
2561+ ret = domain_setup_first_level(iommu, domain, dev,
2562+ PASID_RID2PASID);
2563+ else
2564+ ret = intel_pasid_setup_second_level(iommu, domain,
2565+ dev, PASID_RID2PASID);
2566+ spin_unlock_irqrestore(&iommu->lock, flags);
2567+ if (ret) {
2568+ dev_err(dev, "Setup RID2PASID failed\n");
2569+ dmar_remove_one_dev_info(dev);
2570+ return ret;
2571+ }
2572+ }
2573+
2574+ ret = domain_context_mapping(domain, dev);
2575+ if (ret) {
2576+ dev_err(dev, "Domain context map failed\n");
2577+ dmar_remove_one_dev_info(dev);
2578+ return ret;
2579+ }
26002580
26012581 return 0;
26022582 }
@@ -3586,12 +3566,7 @@ static int intel_iommu_add(struct dmar_drhd_unit *dmaru) · 983 unmodified lines
35863566 iommu->name);
35873567 return -ENXIO;
35883568 }
3589− if (!ecap_sc_support(iommu->ecap) &&
3590− domain_update_iommu_snooping(iommu)) {
3591− pr_warn("%s: Doesn't support snooping.\n",
3592− iommu->name);
3593− return -ENXIO;
3594− }
3569+
35953570 sp = domain_update_iommu_superpage(NULL, iommu) - 1;
35963571 if (sp >= 0 && !(cap_super_page_val(iommu->cap) & (1 << sp))) {
35973572 pr_warn("%s: Doesn't support large page.\n",
@@ -4283,7 +4258,6 @@ static int md_domain_init(struct dmar_domain *domain, int guest_width) · 685 unmodified lines
42834258 domain->agaw = width_to_agaw(adjust_width);
42844259
42854260 domain->iommu_coherency = false;
4286− domain->iommu_snooping = false;
42874261 domain->iommu_superpage = 0;
42884262 domain->max_addr = 0;
42894263
@@ -4348,6 +4322,9 @@ static int prepare_domain_attach_device(struct iommu_domain *domain, · 58 unmodified lines
43484322 if (!iommu)
43494323 return -ENODEV;
43504324
4325+ if (dmar_domain->force_snooping && !ecap_sc_support(iommu->ecap))
4326+ return -EOPNOTSUPP;
4327+
43514328 /* check if this iommu agaw is sufficient for max mapped address */
43524329 addr_width = agaw_to_width(iommu->agaw);
43534330 if (addr_width > cap_mgaw(iommu->cap))
@@ -4422,7 +4399,7 @@ static int intel_iommu_map(struct iommu_domain *domain, · 68 unmodified lines
44224399 prot |= DMA_PTE_READ;
44234400 if (iommu_prot & IOMMU_WRITE)
44244401 prot |= DMA_PTE_WRITE;
4425− if ((iommu_prot & IOMMU_CACHE) && dmar_domain->iommu_snooping)
4402+ if (dmar_domain->set_pte_snp)
44264403 prot |= DMA_PTE_SNP;
44274404
44284405 max_addr = iova + size;
@@ -4545,12 +4522,71 @@ static phys_addr_t intel_iommu_iova_to_phys(struct iommu_domain *domain, · 116 unmodified lines
45454522 return phys;
45464523 }
45474524
4525+static bool domain_support_force_snooping(struct dmar_domain *domain)
4526+{
4527+ struct device_domain_info *info;
4528+ bool support = true;
4529+
4530+ assert_spin_locked(&device_domain_lock);
4531+ list_for_each_entry(info, &domain->devices, link) {
4532+ if (!ecap_sc_support(info->iommu->ecap)) {
4533+ support = false;
4534+ break;
4535+ }
4536+ }
4537+
4538+ return support;
4539+}
4540+
4541+static void domain_set_force_snooping(struct dmar_domain *domain)
4542+{
4543+ struct device_domain_info *info;
4544+
4545+ assert_spin_locked(&device_domain_lock);
4546+
4547+ /*
4548+ * Second level page table supports per-PTE snoop control. The
4549+ * iommu_map() interface will handle this by setting SNP bit.
4550+ */
4551+ if (!domain_use_first_level(domain)) {
4552+ domain->set_pte_snp = true;
4553+ return;
4554+ }
4555+
4556+ list_for_each_entry(info, &domain->devices, link)
4557+ intel_pasid_setup_page_snoop_control(info->iommu, info->dev,
4558+ PASID_RID2PASID);
4559+}
4560+
4561+static bool intel_iommu_enforce_cache_coherency(struct iommu_domain *domain)
4562+{
4563+ struct dmar_domain *dmar_domain = to_dmar_domain(domain);
4564+ unsigned long flags;
4565+
4566+ if (dmar_domain->force_snooping)
4567+ return true;
4568+
4569+ spin_lock_irqsave(&device_domain_lock, flags);
4570+ if (!domain_support_force_snooping(dmar_domain)) {
4571+ spin_unlock_irqrestore(&device_domain_lock, flags);
4572+ return false;
4573+ }
4574+
4575+ domain_set_force_snooping(dmar_domain);
4576+ dmar_domain->force_snooping = true;
4577+ spin_unlock_irqrestore(&device_domain_lock, flags);
4578+
4579+ return true;
4580+}
4581+
45484582 static bool intel_iommu_capable(enum iommu_cap cap)
45494583 {
45504584 if (cap == IOMMU_CAP_CACHE_COHERENCY)
4551− return domain_update_iommu_snooping(NULL);
4585+ return true;
45524586 if (cap == IOMMU_CAP_INTR_REMAP)
45534587 return irq_remapping_enabled == 1;
4588+ if (cap == IOMMU_CAP_PRE_BOOT_PROTECTION)
4589+ return dmar_platform_optin();
45544590
45554591 return false;
45564592 }
@@ -4898,6 +4934,7 @@ const struct iommu_ops intel_iommu_ops = { · 341 unmodified lines
48984934 .iotlb_sync = intel_iommu_tlb_sync,
48994935 .iova_to_phys = intel_iommu_iova_to_phys,
49004936 .free = intel_iommu_domain_free,
4937+ .enforce_cache_coherency = intel_iommu_enforce_cache_coherency,
49014938 }
49024939 };
49034940
drivers/iommu/intel/pasid.c+42−3
@@ -710,9 +710,6 @@ int intel_pasid_setup_second_level(struct intel_iommu *iommu, · 709 unmodified lines
710710 pasid_set_fault_enable(pte);
711711 pasid_set_page_snoop(pte, !!ecap_smpwc(iommu->ecap));
712712
713− if (domain->domain.type == IOMMU_DOMAIN_UNMANAGED)
714− pasid_set_pgsnp(pte);
715−
716713 /*
717714 * Since it is a second level only translation setup, we should
718715 * set SRE bit as well (addresses are expected to be GPAs).
@@ -762,3 +759,45 @@ int intel_pasid_setup_pass_through(struct intel_iommu *iommu, · 43 unmodified lines
762759
763760 return 0;
764761 }
762+
763+/*
764+ * Set the page snoop control for a pasid entry which has been set up.
765+ */
766+void intel_pasid_setup_page_snoop_control(struct intel_iommu *iommu,
767+ struct device *dev, u32 pasid)
768+{
769+ struct pasid_entry *pte;
770+ u16 did;
771+
772+ spin_lock(&iommu->lock);
773+ pte = intel_pasid_get_entry(dev, pasid);
774+ if (WARN_ON(!pte || !pasid_pte_is_present(pte))) {
775+ spin_unlock(&iommu->lock);
776+ return;
777+ }
778+
779+ pasid_set_pgsnp(pte);
780+ did = pasid_get_domain_id(pte);
781+ spin_unlock(&iommu->lock);
782+
783+ if (!ecap_coherent(iommu->ecap))
784+ clflush_cache_range(pte, sizeof(*pte));
785+
786+ /*
787+ * VT-d spec 3.4 table23 states guides for cache invalidation:
788+ *
789+ * - PASID-selective-within-Domain PASID-cache invalidation
790+ * - PASID-selective PASID-based IOTLB invalidation
791+ * - If (pasid is RID_PASID)
792+ * - Global Device-TLB invalidation to affected functions
793+ * Else
794+ * - PASID-based Device-TLB invalidation (with S=1 and
795+ * Addr[63:12]=0x7FFFFFFF_FFFFF) to affected functions
796+ */
797+ pasid_cache_invalidation_with_pasid(iommu, did, pasid);
798+ qi_flush_piotlb(iommu, did, pasid, 0, -1, 0);
799+
800+ /* Device IOTLB doesn't need to be flushed in caching mode. */
801+ if (!cap_caching_mode(iommu->cap))
802+ devtlb_invalidation_with_pasid(iommu, dev, pasid);
803+}
drivers/iommu/intel/pasid.h+2−0
@@ -123,4 +123,6 @@ void intel_pasid_tear_down_entry(struct intel_iommu *iommu, · 122 unmodified lines
123123 bool fault_ignore);
124124 int vcmd_alloc_pasid(struct intel_iommu *iommu, u32 *pasid);
125125 void vcmd_free_pasid(struct intel_iommu *iommu, u32 pasid);
126+void intel_pasid_setup_page_snoop_control(struct intel_iommu *iommu,
127+ struct device *dev, u32 pasid);
126128 #endif /* __INTEL_PASID_H */
drivers/iommu/intel/svm.c+4−0
@@ -757,6 +757,10 @@ bad_req: · 756 unmodified lines
757757 goto bad_req;
758758 }
759759
760+ /* Drop Stop Marker message. No need for a response. */
761+ if (unlikely(req->lpig && !req->rd_req && !req->wr_req))
762+ goto prq_advance;
763+
760764 if (!svm || svm->pasid != req->pasid) {
761765 /*
762766 * It can't go away, because the driver is not permitted
drivers/iommu/iommu.c+260−103
@@ -18,7 +18,6 @@ · 17 unmodified lines
1818 #include <linux/errno.h>
1919 #include <linux/iommu.h>
2020 #include <linux/idr.h>
21−#include <linux/notifier.h>
2221 #include <linux/err.h>
2322 #include <linux/pci.h>
2423 #include <linux/bitops.h>
@@ -40,14 +39,16 @@ struct iommu_group { · 15 unmodified lines
4039 struct kobject *devices_kobj;
4140 struct list_head devices;
4241 struct mutex mutex;
43− struct blocking_notifier_head notifier;
4442 void *iommu_data;
4543 void (*iommu_data_release)(void *iommu_data);
4644 char *name;
4745 int id;
4846 struct iommu_domain *default_domain;
47+ struct iommu_domain *blocking_domain;
4948 struct iommu_domain *domain;
5049 struct list_head entry;
50+ unsigned int owner_cnt;
51+ void *owner;
5152 };
5253
5354 struct group_device {
@@ -82,8 +83,8 @@ static int __iommu_attach_device(struct iommu_domain *domain, · 28 unmodified lines
8283 struct device *dev);
8384 static int __iommu_attach_group(struct iommu_domain *domain,
8485 struct iommu_group *group);
85−static void __iommu_detach_group(struct iommu_domain *domain,
86− struct iommu_group *group);
86+static int __iommu_group_set_domain(struct iommu_group *group,
87+ struct iommu_domain *new_domain);
8788 static int iommu_create_device_direct_mappings(struct iommu_group *group,
8889 struct device *dev);
8990 static struct iommu_group *iommu_group_get_for_dev(struct device *dev);
@@ -294,7 +295,11 @@ int iommu_probe_device(struct device *dev) · 204 unmodified lines
294295 mutex_lock(&group->mutex);
295296 iommu_alloc_default_domain(group, dev);
296297
297− if (group->default_domain) {
298+ /*
299+ * If device joined an existing group which has been claimed, don't
300+ * attach the default domain.
301+ */
302+ if (group->default_domain && !group->owner) {
298303 ret = __iommu_attach_device(group->default_domain, dev);
299304 if (ret) {
300305 mutex_unlock(&group->mutex);
@@ -506,6 +511,13 @@ int iommu_get_group_resv_regions(struct iommu_group *group, · 205 unmodified lines
506511 list_for_each_entry(device, &group->devices, list) {
507512 struct list_head dev_resv_regions;
508513
514+ /*
515+ * Non-API groups still expose reserved_regions in sysfs,
516+ * so filter out calls that get here that way.
517+ */
518+ if (!device->dev->iommu)
519+ break;
520+
509521 INIT_LIST_HEAD(&dev_resv_regions);
510522 iommu_get_resv_regions(device->dev, &dev_resv_regions);
511523 ret = iommu_insert_device_resv_regions(&dev_resv_regions, head);
@@ -592,6 +604,8 @@ static void iommu_group_release(struct kobject *kobj) · 80 unmodified lines
592604
593605 if (group->default_domain)
594606 iommu_domain_free(group->default_domain);
607+ if (group->blocking_domain)
608+ iommu_domain_free(group->blocking_domain);
595609
596610 kfree(group->name);
597611 kfree(group);
@@ -626,7 +640,6 @@ struct iommu_group *iommu_group_alloc(void) · 28 unmodified lines
626640 mutex_init(&group->mutex);
627641 INIT_LIST_HEAD(&group->devices);
628642 INIT_LIST_HEAD(&group->entry);
629− BLOCKING_INIT_NOTIFIER_HEAD(&group->notifier);
630643
631644 ret = ida_simple_get(&iommu_group_ida, 0, 0, GFP_KERNEL);
632645 if (ret < 0) {
@@ -899,10 +912,6 @@ rename: · 266 unmodified lines
899912 if (ret)
900913 goto err_put_group;
901914
902− /* Notify any listeners about change to group. */
903− blocking_notifier_call_chain(&group->notifier,
904− IOMMU_GROUP_NOTIFY_ADD_DEVICE, dev);
905−
906915 trace_add_device_to_group(group->id, dev);
907916
908917 dev_info(dev, "Adding to iommu group %d\n", group->id);
@@ -944,10 +953,6 @@ void iommu_group_remove_device(struct device *dev) · 35 unmodified lines
944953
945954 dev_info(dev, "Removing from iommu group %d\n", group->id);
946955
947− /* Pre-notify listeners that a device is being removed. */
948− blocking_notifier_call_chain(&group->notifier,
949− IOMMU_GROUP_NOTIFY_DEL_DEVICE, dev);
950−
951956 mutex_lock(&group->mutex);
952957 list_for_each_entry(tmp_device, &group->devices, list) {
953958 if (tmp_device->dev == dev) {
@@ -1069,36 +1074,6 @@ void iommu_group_put(struct iommu_group *group) · 115 unmodified lines
10691074 }
10701075 EXPORT_SYMBOL_GPL(iommu_group_put);
10711076
1072−/**
1073− * iommu_group_register_notifier - Register a notifier for group changes
1074− * @group: the group to watch
1075− * @nb: notifier block to signal
1076− *
1077− * This function allows iommu group users to track changes in a group.
1078− * See include/linux/iommu.h for actions sent via this notifier. Caller
1079− * should hold a reference to the group throughout notifier registration.
1080− */
1081−int iommu_group_register_notifier(struct iommu_group *group,
1082− struct notifier_block *nb)
1083−{
1084− return blocking_notifier_chain_register(&group->notifier, nb);
1085−}
1086−EXPORT_SYMBOL_GPL(iommu_group_register_notifier);
1087−
1088−/**
1089− * iommu_group_unregister_notifier - Unregister a notifier
1090− * @group: the group to watch
1091− * @nb: notifier block to signal
1092− *
1093− * Unregister a previously registered group notifier block.
1094− */
1095−int iommu_group_unregister_notifier(struct iommu_group *group,
1096− struct notifier_block *nb)
1097−{
1098− return blocking_notifier_chain_unregister(&group->notifier, nb);
1099−}
1100−EXPORT_SYMBOL_GPL(iommu_group_unregister_notifier);
1101−
11021077 /**
11031078 * iommu_register_device_fault_handler() - Register a device fault handler
11041079 * @dev: the device
@@ -1644,14 +1619,8 @@ static int remove_iommu_group(struct device *dev, void *data) · 539 unmodified lines
16441619 static int iommu_bus_notifier(struct notifier_block *nb,
16451620 unsigned long action, void *data)
16461621 {
1647− unsigned long group_action = 0;
16481622 struct device *dev = data;
1649− struct iommu_group *group;
16501623
1651− /*
1652− * ADD/DEL call into iommu driver ops if provided, which may
1653− * result in ADD/DEL notifiers to group->notifier
1654− */
16551624 if (action == BUS_NOTIFY_ADD_DEVICE) {
16561625 int ret;
16571626
@@ -1662,34 +1631,6 @@ static int iommu_bus_notifier(struct notifier_block *nb, · 4 unmodified lines
16621631 return NOTIFY_OK;
16631632 }
16641633
1665− /*
1666− * Remaining BUS_NOTIFYs get filtered and republished to the
1667− * group, if anyone is listening
1668− */
1669− group = iommu_group_get(dev);
1670− if (!group)
1671− return 0;
1672−
1673− switch (action) {
1674− case BUS_NOTIFY_BIND_DRIVER:
1675− group_action = IOMMU_GROUP_NOTIFY_BIND_DRIVER;
1676− break;
1677− case BUS_NOTIFY_BOUND_DRIVER:
1678− group_action = IOMMU_GROUP_NOTIFY_BOUND_DRIVER;
1679− break;
1680− case BUS_NOTIFY_UNBIND_DRIVER:
1681− group_action = IOMMU_GROUP_NOTIFY_UNBIND_DRIVER;
1682− break;
1683− case BUS_NOTIFY_UNBOUND_DRIVER:
1684− group_action = IOMMU_GROUP_NOTIFY_UNBOUND_DRIVER;
1685− break;
1686− }
1687−
1688− if (group_action)
1689− blocking_notifier_call_chain(&group->notifier,
1690− group_action, dev);
1691−
1692− iommu_group_put(group);
16931634 return 0;
16941635 }
16951636
@@ -1906,6 +1847,29 @@ bool iommu_present(struct bus_type *bus) · 210 unmodified lines
19061847 }
19071848 EXPORT_SYMBOL_GPL(iommu_present);
19081849
1850+/**
1851+ * device_iommu_capable() - check for a general IOMMU capability
1852+ * @dev: device to which the capability would be relevant, if available
1853+ * @cap: IOMMU capability
1854+ *
1855+ * Return: true if an IOMMU is present and supports the given capability
1856+ * for the given device, otherwise false.
1857+ */
1858+bool device_iommu_capable(struct device *dev, enum iommu_cap cap)
1859+{
1860+ const struct iommu_ops *ops;
1861+
1862+ if (!dev->iommu || !dev->iommu->iommu_dev)
1863+ return false;
1864+
1865+ ops = dev_iommu_ops(dev);
1866+ if (!ops->capable)
1867+ return false;
1868+
1869+ return ops->capable(cap);
1870+}
1871+EXPORT_SYMBOL_GPL(device_iommu_capable);
1872+
19091873 bool iommu_capable(struct bus_type *bus, enum iommu_cap cap)
19101874 {
19111875 if (!bus->iommu_ops || !bus->iommu_ops->capable)
@@ -1976,6 +1940,24 @@ void iommu_domain_free(struct iommu_domain *domain) · 64 unmodified lines
19761940 }
19771941 EXPORT_SYMBOL_GPL(iommu_domain_free);
19781942
1943+/*
1944+ * Put the group's domain back to the appropriate core-owned domain - either the
1945+ * standard kernel-mode DMA configuration or an all-DMA-blocked domain.
1946+ */
1947+static void __iommu_group_set_core_domain(struct iommu_group *group)
1948+{
1949+ struct iommu_domain *new_domain;
1950+ int ret;
1951+
1952+ if (group->owner)
1953+ new_domain = group->blocking_domain;
1954+ else
1955+ new_domain = group->default_domain;
1956+
1957+ ret = __iommu_group_set_domain(group, new_domain);
1958+ WARN(ret, "iommu driver failed to attach the default/blocking domain");
1959+}
1960+
19791961 static int __iommu_attach_device(struct iommu_domain *domain,
19801962 struct device *dev)
19811963 {
@@ -2032,9 +2014,6 @@ static void __iommu_detach_device(struct iommu_domain *domain, · 50 unmodified lines
20322014 if (iommu_is_attach_deferred(dev))
20332015 return;
20342016
2035− if (unlikely(domain->ops->detach_dev == NULL))
2036− return;
2037−
20382017 domain->ops->detach_dev(domain, dev);
20392018 trace_detach_device_from_domain(dev);
20402019 }
@@ -2048,12 +2027,10 @@ void iommu_detach_device(struct iommu_domain *domain, struct device *dev) · 7 unmodified lines
20482027 return;
20492028
20502029 mutex_lock(&group->mutex);
2051− if (iommu_group_device_count(group) != 1) {
2052− WARN_ON(1);
2030+ if (WARN_ON(domain != group->domain) ||
2031+ WARN_ON(iommu_group_device_count(group) != 1))
20532032 goto out_unlock;
2054− }
2055−
2056− __iommu_detach_group(domain, group);
2033+ __iommu_group_set_core_domain(group);
20572034
20582035 out_unlock:
20592036 mutex_unlock(&group->mutex);
@@ -2109,7 +2086,8 @@ static int __iommu_attach_group(struct iommu_domain *domain, · 49 unmodified lines
21092086 {
21102087 int ret;
21112088
2112− if (group->default_domain && group->domain != group->default_domain)
2089+ if (group->domain && group->domain != group->default_domain &&
2090+ group->domain != group->blocking_domain)
21132091 return -EBUSY;
21142092
21152093 ret = __iommu_group_for_each_dev(group, domain,
@@ -2141,34 +2119,49 @@ static int iommu_group_do_detach_device(struct device *dev, void *data) · 25 unmodified lines
21412119 return 0;
21422120 }
21432121
2144−static void __iommu_detach_group(struct iommu_domain *domain,
2145− struct iommu_group *group)
2122+static int __iommu_group_set_domain(struct iommu_group *group,
2123+ struct iommu_domain *new_domain)
21462124 {
21472125 int ret;
21482126
2149− if (!group->default_domain) {
2150− __iommu_group_for_each_dev(group, domain,
2127+ if (group->domain == new_domain)
2128+ return 0;
2129+
2130+ /*
2131+ * New drivers should support default domains and so the detach_dev() op
2132+ * will never be called. Otherwise the NULL domain represents some
2133+ * platform specific behavior.
2134+ */
2135+ if (!new_domain) {
2136+ if (WARN_ON(!group->domain->ops->detach_dev))
2137+ return -EINVAL;
2138+ __iommu_group_for_each_dev(group, group->domain,
21512139 iommu_group_do_detach_device);
21522140 group->domain = NULL;
2153− return;
2141+ return 0;
21542142 }
21552143
2156− if (group->domain == group->default_domain)
2157− return;
2158−
2159− /* Detach by re-attaching to the default domain */
2160− ret = __iommu_group_for_each_dev(group, group->default_domain,
2144+ /*
2145+ * Changing the domain is done by calling attach_dev() on the new
2146+ * domain. This switch does not have to be atomic and DMA can be
2147+ * discarded during the transition. DMA must only be able to access
2148+ * either new_domain or group->domain, never something else.
2149+ *
2150+ * Note that this is called in error unwind paths, attaching to a
2151+ * domain that has already been attached cannot fail.
2152+ */
2153+ ret = __iommu_group_for_each_dev(group, new_domain,
21612154 iommu_group_do_attach_device);
2162− if (ret != 0)
2163− WARN_ON(1);
2164− else
2165− group->domain = group->default_domain;
2155+ if (ret)
2156+ return ret;
2157+ group->domain = new_domain;
2158+ return 0;
21662159 }
21672160
21682161 void iommu_detach_group(struct iommu_domain *domain, struct iommu_group *group)
21692162 {
21702163 mutex_lock(&group->mutex);
2171− __iommu_detach_group(domain, group);
2164+ __iommu_group_set_core_domain(group);
21722165 mutex_unlock(&group->mutex);
21732166 }
21742167 EXPORT_SYMBOL_GPL(iommu_detach_group);
@@ -3019,7 +3012,7 @@ static ssize_t iommu_group_store_type(struct iommu_group *group, · 844 unmodified lines
30193012 if (!capable(CAP_SYS_ADMIN) || !capable(CAP_SYS_RAWIO))
30203013 return -EACCES;
30213014
3022− if (WARN_ON(!group))
3015+ if (WARN_ON(!group) || !group->default_domain)
30233016 return -EINVAL;
30243017
30253018 if (sysfs_streq(buf, "identity"))
@@ -3095,3 +3088,167 @@ out: · 69 unmodified lines
30953088
30963089 return ret;
30973090 }
3091+
3092+/**
3093+ * iommu_device_use_default_domain() - Device driver wants to handle device
3094+ * DMA through the kernel DMA API.
3095+ * @dev: The device.
3096+ *
3097+ * The device driver about to bind @dev wants to do DMA through the kernel
3098+ * DMA API. Return 0 if it is allowed, otherwise an error.
3099+ */
3100+int iommu_device_use_default_domain(struct device *dev)
3101+{
3102+ struct iommu_group *group = iommu_group_get(dev);
3103+ int ret = 0;
3104+
3105+ if (!group)
3106+ return 0;
3107+
3108+ mutex_lock(&group->mutex);
3109+ if (group->owner_cnt) {
3110+ if (group->domain != group->default_domain ||
3111+ group->owner) {
3112+ ret = -EBUSY;
3113+ goto unlock_out;
3114+ }
3115+ }
3116+
3117+ group->owner_cnt++;
3118+
3119+unlock_out:
3120+ mutex_unlock(&group->mutex);
3121+ iommu_group_put(group);
3122+
3123+ return ret;
3124+}
3125+
3126+/**
3127+ * iommu_device_unuse_default_domain() - Device driver stops handling device
3128+ * DMA through the kernel DMA API.
3129+ * @dev: The device.
3130+ *
3131+ * The device driver doesn't want to do DMA through kernel DMA API anymore.
3132+ * It must be called after iommu_device_use_default_domain().
3133+ */
3134+void iommu_device_unuse_default_domain(struct device *dev)
3135+{
3136+ struct iommu_group *group = iommu_group_get(dev);
3137+
3138+ if (!group)
3139+ return;
3140+
3141+ mutex_lock(&group->mutex);
3142+ if (!WARN_ON(!group->owner_cnt))
3143+ group->owner_cnt--;
3144+
3145+ mutex_unlock(&group->mutex);
3146+ iommu_group_put(group);
3147+}
3148+
3149+static int __iommu_group_alloc_blocking_domain(struct iommu_group *group)
3150+{
3151+ struct group_device *dev =
3152+ list_first_entry(&group->devices, struct group_device, list);
3153+
3154+ if (group->blocking_domain)
3155+ return 0;
3156+
3157+ group->blocking_domain =
3158+ __iommu_domain_alloc(dev->dev->bus, IOMMU_DOMAIN_BLOCKED);
3159+ if (!group->blocking_domain) {
3160+ /*
3161+ * For drivers that do not yet understand IOMMU_DOMAIN_BLOCKED
3162+ * create an empty domain instead.
3163+ */
3164+ group->blocking_domain = __iommu_domain_alloc(
3165+ dev->dev->bus, IOMMU_DOMAIN_UNMANAGED);
3166+ if (!group->blocking_domain)
3167+ return -EINVAL;
3168+ }
3169+ return 0;
3170+}
3171+
3172+/**
3173+ * iommu_group_claim_dma_owner() - Set DMA ownership of a group
3174+ * @group: The group.
3175+ * @owner: Caller specified pointer. Used for exclusive ownership.
3176+ *
3177+ * This is to support backward compatibility for vfio which manages
3178+ * the dma ownership in iommu_group level. New invocations on this
3179+ * interface should be prohibited.
3180+ */
3181+int iommu_group_claim_dma_owner(struct iommu_group *group, void *owner)
3182+{
3183+ int ret = 0;
3184+
3185+ mutex_lock(&group->mutex);
3186+ if (group->owner_cnt) {
3187+ ret = -EPERM;
3188+ goto unlock_out;
3189+ } else {
3190+ if (group->domain && group->domain != group->default_domain) {
3191+ ret = -EBUSY;
3192+ goto unlock_out;
3193+ }
3194+
3195+ ret = __iommu_group_alloc_blocking_domain(group);
3196+ if (ret)
3197+ goto unlock_out;
3198+
3199+ ret = __iommu_group_set_domain(group, group->blocking_domain);
3200+ if (ret)
3201+ goto unlock_out;
3202+ group->owner = owner;
3203+ }
3204+
3205+ group->owner_cnt++;
3206+unlock_out:
3207+ mutex_unlock(&group->mutex);
3208+
3209+ return ret;
3210+}
3211+EXPORT_SYMBOL_GPL(iommu_group_claim_dma_owner);
3212+
3213+/**
3214+ * iommu_group_release_dma_owner() - Release DMA ownership of a group
3215+ * @group: The group.
3216+ *
3217+ * Release the DMA ownership claimed by iommu_group_claim_dma_owner().
3218+ */
3219+void iommu_group_release_dma_owner(struct iommu_group *group)
3220+{
3221+ int ret;
3222+
3223+ mutex_lock(&group->mutex);
3224+ if (WARN_ON(!group->owner_cnt || !group->owner))
3225+ goto unlock_out;
3226+
3227+ group->owner_cnt = 0;
3228+ group->owner = NULL;
3229+ ret = __iommu_group_set_domain(group, group->default_domain);
3230+ WARN(ret, "iommu driver failed to attach the default domain");
3231+
3232+unlock_out:
3233+ mutex_unlock(&group->mutex);
3234+}
3235+EXPORT_SYMBOL_GPL(iommu_group_release_dma_owner);
3236+
3237+/**
3238+ * iommu_group_dma_owner_claimed() - Query group dma ownership status
3239+ * @group: The group.
3240+ *
3241+ * This provides status query on a given group. It is racy and only for
3242+ * non-binding status reporting.
3243+ */
3244+bool iommu_group_dma_owner_claimed(struct iommu_group *group)
3245+{
3246+ unsigned int user;
3247+
3248+ mutex_lock(&group->mutex);
3249+ user = group->owner_cnt;
3250+ mutex_unlock(&group->mutex);
3251+
3252+ return user;
3253+}
3254+EXPORT_SYMBOL_GPL(iommu_group_dma_owner_claimed);
drivers/iommu/msm_iommu.c+15−7
@@ -583,7 +583,7 @@ static void print_ctx_regs(void __iomem *base, int ctx) · 582 unmodified lines
583583 GET_SCTLR(base, ctx), GET_ACTLR(base, ctx));
584584 }
585585
586−static void insert_iommu_master(struct device *dev,
586+static int insert_iommu_master(struct device *dev,
587587 struct msm_iommu_dev **iommu,
588588 struct of_phandle_args *spec)
589589 {
@@ -592,6 +592,10 @@ static void insert_iommu_master(struct device *dev, · 2 unmodified lines
592592
593593 if (list_empty(&(*iommu)->ctx_list)) {
594594 master = kzalloc(sizeof(*master), GFP_ATOMIC);
595+ if (!master) {
596+ dev_err(dev, "Failed to allocate iommu_master\n");
597+ return -ENOMEM;
598+ }
595599 master->of_node = dev->of_node;
596600 list_add(&master->list, &(*iommu)->ctx_list);
597601 dev_iommu_priv_set(dev, master);
@@ -601,30 +605,34 @@ static void insert_iommu_master(struct device *dev, · 3 unmodified lines
601605 if (master->mids[sid] == spec->args[0]) {
602606 dev_warn(dev, "Stream ID 0x%hx repeated; ignoring\n",
603607 sid);
604− return;
608+ return 0;
605609 }
606610
607611 master->mids[master->num_mids++] = spec->args[0];
612+ return 0;
608613 }
609614
610615 static int qcom_iommu_of_xlate(struct device *dev,
611616 struct of_phandle_args *spec)
612617 {
613− struct msm_iommu_dev *iommu;
618+ struct msm_iommu_dev *iommu = NULL, *iter;
614619 unsigned long flags;
615620 int ret = 0;
616621
617622 spin_lock_irqsave(&msm_iommu_lock, flags);
618− list_for_each_entry(iommu, &qcom_iommu_devices, dev_node)
619− if (iommu->dev->of_node == spec->np)
623+ list_for_each_entry(iter, &qcom_iommu_devices, dev_node) {
624+ if (iter->dev->of_node == spec->np) {
625+ iommu = iter;
620626 break;
627+ }
628+ }
621629
622− if (!iommu || iommu->dev->of_node != spec->np) {
630+ if (!iommu) {
623631 ret = -ENODEV;
624632 goto fail;
625633 }
626634
627− insert_iommu_master(dev, &iommu, spec);
635+ ret = insert_iommu_master(dev, &iommu, spec);
628636 fail:
629637 spin_unlock_irqrestore(&msm_iommu_lock, flags);
630638
drivers/iommu/mtk_iommu.c+709−271
@@ -14,12 +14,14 @@ · 13 unmodified lines
1414 #include <linux/io.h>
1515 #include <linux/iommu.h>
1616 #include <linux/iopoll.h>
17+#include <linux/io-pgtable.h>
1718 #include <linux/list.h>
1819 #include <linux/mfd/syscon.h>
1920 #include <linux/module.h>
2021 #include <linux/of_address.h>
2122 #include <linux/of_irq.h>
2223 #include <linux/of_platform.h>
24+#include <linux/pci.h>
2325 #include <linux/platform_device.h>
2426 #include <linux/pm_runtime.h>
2527 #include <linux/regmap.h>
@@ -29,7 +31,7 @@ · 3 unmodified lines
2931 #include <asm/barrier.h>
3032 #include <soc/mediatek/smi.h>
3133
32−#include "mtk_iommu.h"
34+#include <dt-bindings/memory/mtk-memory-port.h>
3335
3436 #define REG_MMU_PT_BASE_ADDR 0x000
3537 #define MMU_PT_ADDR_MASK GENMASK(31, 7)
@@ -51,6 +53,8 @@ · 15 unmodified lines
5153 #define F_MMU_STANDARD_AXI_MODE_MASK (BIT(3) | BIT(19))
5254
5355 #define REG_MMU_DCM_DIS 0x050
56+#define F_MMU_DCM BIT(8)
57+
5458 #define REG_MMU_WR_LEN_CTRL 0x054
5559 #define F_MMU_WR_THROT_DIS_MASK (BIT(5) | BIT(21))
5660
@@ -103,10 +107,15 @@ · 46 unmodified lines
103107 #define REG_MMU1_INT_ID 0x154
104108 #define F_MMU_INT_ID_COMM_ID(a) (((a) >> 9) & 0x7)
105109 #define F_MMU_INT_ID_SUB_COMM_ID(a) (((a) >> 7) & 0x3)
110+#define F_MMU_INT_ID_COMM_ID_EXT(a) (((a) >> 10) & 0x7)
111+#define F_MMU_INT_ID_SUB_COMM_ID_EXT(a) (((a) >> 7) & 0x7)
106112 #define F_MMU_INT_ID_LARB_ID(a) (((a) >> 7) & 0x7)
107113 #define F_MMU_INT_ID_PORT_ID(a) (((a) >> 2) & 0x1f)
108114
109115 #define MTK_PROTECT_PA_ALIGN 256
116+#define MTK_IOMMU_BANK_SZ 0x1000
117+
118+#define PERICFG_IOMMU_1 0x714
110119
111120 #define HAS_4GB_MODE BIT(0)
112121 /* HW will use the EMI clock if there isn't the "bclk". */
@@ -114,25 +123,147 @@ · 1 unmodified line
114123 #define HAS_VLD_PA_RNG BIT(2)
115124 #define RESET_AXI BIT(3)
116125 #define OUT_ORDER_WR_EN BIT(4)
117−#define HAS_SUB_COMM BIT(5)
118−#define WR_THROT_EN BIT(6)
119−#define HAS_LEGACY_IVRP_PADDR BIT(7)
120−#define IOVA_34_EN BIT(8)
126+#define HAS_SUB_COMM_2BITS BIT(5)
127+#define HAS_SUB_COMM_3BITS BIT(6)
128+#define WR_THROT_EN BIT(7)
129+#define HAS_LEGACY_IVRP_PADDR BIT(8)
130+#define IOVA_34_EN BIT(9)
131+#define SHARE_PGTABLE BIT(10) /* 2 HW share pgtable */
132+#define DCM_DISABLE BIT(11)
133+#define STD_AXI_MODE BIT(12) /* For non MM iommu */
134+/* 2 bits: iommu type */
135+#define MTK_IOMMU_TYPE_MM (0x0 << 13)
136+#define MTK_IOMMU_TYPE_INFRA (0x1 << 13)
137+#define MTK_IOMMU_TYPE_MASK (0x3 << 13)
138+/* PM and clock always on. e.g. infra iommu */
139+#define PM_CLK_AO BIT(15)
140+#define IFA_IOMMU_PCIE_SUPPORT BIT(16)
141+
142+#define MTK_IOMMU_HAS_FLAG_MASK(pdata, _x, mask) \
143+ ((((pdata)->flags) & (mask)) == (_x))
144+
145+#define MTK_IOMMU_HAS_FLAG(pdata, _x) MTK_IOMMU_HAS_FLAG_MASK(pdata, _x, _x)
146+#define MTK_IOMMU_IS_TYPE(pdata, _x) MTK_IOMMU_HAS_FLAG_MASK(pdata, _x,\
147+ MTK_IOMMU_TYPE_MASK)
148+
149+#define MTK_INVALID_LARBID MTK_LARB_NR_MAX
150+
151+#define MTK_LARB_COM_MAX 8
152+#define MTK_LARB_SUBCOM_MAX 8
153+
154+#define MTK_IOMMU_GROUP_MAX 8
155+#define MTK_IOMMU_BANK_MAX 5
156+
157+enum mtk_iommu_plat {
158+ M4U_MT2712,
159+ M4U_MT6779,
160+ M4U_MT8167,
161+ M4U_MT8173,
162+ M4U_MT8183,
163+ M4U_MT8186,
164+ M4U_MT8192,
165+ M4U_MT8195,
166+};
167+
168+struct mtk_iommu_iova_region {
169+ dma_addr_t iova_base;
170+ unsigned long long size;
171+};
172+
173+struct mtk_iommu_suspend_reg {
174+ u32 misc_ctrl;
175+ u32 dcm_dis;
176+ u32 ctrl_reg;
177+ u32 vld_pa_rng;
178+ u32 wr_len_ctrl;
179+
180+ u32 int_control[MTK_IOMMU_BANK_MAX];
181+ u32 int_main_control[MTK_IOMMU_BANK_MAX];
182+ u32 ivrp_paddr[MTK_IOMMU_BANK_MAX];
183+};
184+
185+struct mtk_iommu_plat_data {
186+ enum mtk_iommu_plat m4u_plat;
187+ u32 flags;
188+ u32 inv_sel_reg;
189+
190+ char *pericfg_comp_str;
191+ struct list_head *hw_list;
192+ unsigned int iova_region_nr;
193+ const struct mtk_iommu_iova_region *iova_region;
194+
195+ u8 banks_num;
196+ bool banks_enable[MTK_IOMMU_BANK_MAX];
197+ unsigned int banks_portmsk[MTK_IOMMU_BANK_MAX];
198+ unsigned char larbid_remap[MTK_LARB_COM_MAX][MTK_LARB_SUBCOM_MAX];
199+};
200+
201+struct mtk_iommu_bank_data {
202+ void __iomem *base;
203+ int irq;
204+ u8 id;
205+ struct device *parent_dev;
206+ struct mtk_iommu_data *parent_data;
207+ spinlock_t tlb_lock; /* lock for tlb range flush */
208+ struct mtk_iommu_domain *m4u_dom; /* Each bank has a domain */
209+};
210+
211+struct mtk_iommu_data {
212+ struct device *dev;
213+ struct clk *bclk;
214+ phys_addr_t protect_base; /* protect memory base */
215+ struct mtk_iommu_suspend_reg reg;
216+ struct iommu_group *m4u_group[MTK_IOMMU_GROUP_MAX];
217+ bool enable_4GB;
121218
122−#define MTK_IOMMU_HAS_FLAG(pdata, _x) \
123− ((((pdata)->flags) & (_x)) == (_x))
219+ struct iommu_device iommu;
220+ const struct mtk_iommu_plat_data *plat_data;
221+ struct device *smicomm_dev;
222+
223+ struct mtk_iommu_bank_data *bank;
224+
225+ struct dma_iommu_mapping *mapping; /* For mtk_iommu_v1.c */
226+ struct regmap *pericfg;
227+
228+ struct mutex mutex; /* Protect m4u_group/m4u_dom above */
229+
230+ /*
231+ * In the sharing pgtable case, list data->list to the global list like m4ulist.
232+ * In the non-sharing pgtable case, list data->list to the itself hw_list_head.
233+ */
234+ struct list_head *hw_list;
235+ struct list_head hw_list_head;
236+ struct list_head list;
237+ struct mtk_smi_larb_iommu larb_imu[MTK_LARB_NR_MAX];
238+};
124239
125240 struct mtk_iommu_domain {
126241 struct io_pgtable_cfg cfg;
127242 struct io_pgtable_ops *iop;
128243
129− struct mtk_iommu_data *data;
244+ struct mtk_iommu_bank_data *bank;
130245 struct iommu_domain domain;
246+
247+ struct mutex mutex; /* Protect "data" in this structure */
131248 };
132249
250+static int mtk_iommu_bind(struct device *dev)
251+{
252+ struct mtk_iommu_data *data = dev_get_drvdata(dev);
253+
254+ return component_bind_all(dev, &data->larb_imu);
255+}
256+
257+static void mtk_iommu_unbind(struct device *dev)
258+{
259+ struct mtk_iommu_data *data = dev_get_drvdata(dev);
260+
261+ component_unbind_all(dev, &data->larb_imu);
262+}
263+
133264 static const struct iommu_ops mtk_iommu_ops;
134265
135−static int mtk_iommu_hw_init(const struct mtk_iommu_data *data);
266+static int mtk_iommu_hw_init(const struct mtk_iommu_data *data, unsigned int bankid);
136267
137268 #define MTK_IOMMU_TLB_ADDR(iova) ({ \
138269 dma_addr_t _addr = iova; \
@@ -165,42 +296,28 @@ static int mtk_iommu_hw_init(const struct mtk_iommu_data *data); · 26 unmodified lines
165296
166297 static LIST_HEAD(m4ulist); /* List all the M4U HWs */
167298
168−#define for_each_m4u(data) list_for_each_entry(data, &m4ulist, list)
169−
170−struct mtk_iommu_iova_region {
171− dma_addr_t iova_base;
172− unsigned long long size;
173−};
299+#define for_each_m4u(data, head) list_for_each_entry(data, head, list)
174300
175301 static const struct mtk_iommu_iova_region single_domain[] = {
176302 {.iova_base = 0, .size = SZ_4G},
177303 };
178304
179305 static const struct mtk_iommu_iova_region mt8192_multi_dom[] = {
180− { .iova_base = 0x0, .size = SZ_4G}, /* disp: 0 ~ 4G */
306+ { .iova_base = 0x0, .size = SZ_4G}, /* 0 ~ 4G */
181307 #if IS_ENABLED(CONFIG_ARCH_DMA_ADDR_T_64BIT)
182− { .iova_base = SZ_4G, .size = SZ_4G}, /* vdec: 4G ~ 8G */
183− { .iova_base = SZ_4G * 2, .size = SZ_4G}, /* CAM/MDP: 8G ~ 12G */
308+ { .iova_base = SZ_4G, .size = SZ_4G}, /* 4G ~ 8G */
309+ { .iova_base = SZ_4G * 2, .size = SZ_4G}, /* 8G ~ 12G */
310+ { .iova_base = SZ_4G * 3, .size = SZ_4G}, /* 12G ~ 16G */
311+
184312 { .iova_base = 0x240000000ULL, .size = 0x4000000}, /* CCU0 */
185313 { .iova_base = 0x244000000ULL, .size = 0x4000000}, /* CCU1 */
186314 #endif
187315 };
188316
189−/*
190− * There may be 1 or 2 M4U HWs, But we always expect they are in the same domain
191− * for the performance.
192− *
193− * Here always return the mtk_iommu_data of the first probed M4U where the
194− * iommu domain information is recorded.
195− */
196−static struct mtk_iommu_data *mtk_iommu_get_m4u_data(void)
317+/* If 2 M4U share a domain(use the same hwlist), Put the corresponding info in first data.*/
318+static struct mtk_iommu_data *mtk_iommu_get_frst_data(struct list_head *hwlist)
197319 {
198− struct mtk_iommu_data *data;
199−
200− for_each_m4u(data)
201− return data;
202−
203− return NULL;
320+ return list_first_entry(hwlist, struct mtk_iommu_data, list);
204321 }
205322
206323 static struct mtk_iommu_domain *to_mtk_domain(struct iommu_domain *dom)
@@ -210,46 +327,72 @@ static struct mtk_iommu_domain *to_mtk_domain(struct iommu_domain *dom) · 3 unmodified lines
210327
211328 static void mtk_iommu_tlb_flush_all(struct mtk_iommu_data *data)
212329 {
330+ /* Tlb flush all always is in bank0. */
331+ struct mtk_iommu_bank_data *bank = &data->bank[0];
332+ void __iomem *base = bank->base;
213333 unsigned long flags;
214334
215− spin_lock_irqsave(&data->tlb_lock, flags);
216− writel_relaxed(F_INVLD_EN1 | F_INVLD_EN0,
217− data->base + data->plat_data->inv_sel_reg);
218− writel_relaxed(F_ALL_INVLD, data->base + REG_MMU_INVALIDATE);
335+ spin_lock_irqsave(&bank->tlb_lock, flags);
336+ writel_relaxed(F_INVLD_EN1 | F_INVLD_EN0, base + data->plat_data->inv_sel_reg);
337+ writel_relaxed(F_ALL_INVLD, base + REG_MMU_INVALIDATE);
219338 wmb(); /* Make sure the tlb flush all done */
220− spin_unlock_irqrestore(&data->tlb_lock, flags);
339+ spin_unlock_irqrestore(&bank->tlb_lock, flags);
221340 }
222341
223342 static void mtk_iommu_tlb_flush_range_sync(unsigned long iova, size_t size,
224− size_t granule,
225− struct mtk_iommu_data *data)
343+ struct mtk_iommu_bank_data *bank)
226344 {
345+ struct list_head *head = bank->parent_data->hw_list;
346+ struct mtk_iommu_bank_data *curbank;
347+ struct mtk_iommu_data *data;
348+ bool check_pm_status;
227349 unsigned long flags;
350+ void __iomem *base;
228351 int ret;
229352 u32 tmp;
230353
231− for_each_m4u(data) {
232− if (pm_runtime_get_if_in_use(data->dev) <= 0)
233− continue;
354+ for_each_m4u(data, head) {
355+ /*
356+ * To avoid resume the iommu device frequently when the iommu device
357+ * is not active, it doesn't always call pm_runtime_get here, then tlb
358+ * flush depends on the tlb flush all in the runtime resume.
359+ *
360+ * There are 2 special cases:
361+ *
362+ * Case1: The iommu dev doesn't have power domain but has bclk. This case
363+ * should also avoid the tlb flush while the dev is not active to mute
364+ * the tlb timeout log. like mt8173.
365+ *
366+ * Case2: The power/clock of infra iommu is always on, and it doesn't
367+ * have the device link with the master devices. This case should avoid
368+ * the PM status check.
369+ */
370+ check_pm_status = !MTK_IOMMU_HAS_FLAG(data->plat_data, PM_CLK_AO);
234371
235− spin_lock_irqsave(&data->tlb_lock, flags);
372+ if (check_pm_status) {
373+ if (pm_runtime_get_if_in_use(data->dev) <= 0)
374+ continue;
375+ }
376+
377+ curbank = &data->bank[bank->id];
378+ base = curbank->base;
379+
380+ spin_lock_irqsave(&curbank->tlb_lock, flags);
236381 writel_relaxed(F_INVLD_EN1 | F_INVLD_EN0,
237− data->base + data->plat_data->inv_sel_reg);
382+ base + data->plat_data->inv_sel_reg);
238383
239− writel_relaxed(MTK_IOMMU_TLB_ADDR(iova),
240− data->base + REG_MMU_INVLD_START_A);
384+ writel_relaxed(MTK_IOMMU_TLB_ADDR(iova), base + REG_MMU_INVLD_START_A);
241385 writel_relaxed(MTK_IOMMU_TLB_ADDR(iova + size - 1),
242− data->base + REG_MMU_INVLD_END_A);
243− writel_relaxed(F_MMU_INV_RANGE,
244− data->base + REG_MMU_INVALIDATE);
386+ base + REG_MMU_INVLD_END_A);
387+ writel_relaxed(F_MMU_INV_RANGE, base + REG_MMU_INVALIDATE);
245388
246389 /* tlb sync */
247− ret = readl_poll_timeout_atomic(data->base + REG_MMU_CPE_DONE,
390+ ret = readl_poll_timeout_atomic(base + REG_MMU_CPE_DONE,
248391 tmp, tmp != 0, 10, 1000);
249392
250393 /* Clear the CPE status */
251− writel_relaxed(0, data->base + REG_MMU_CPE_DONE);
252− spin_unlock_irqrestore(&data->tlb_lock, flags);
394+ writel_relaxed(0, base + REG_MMU_CPE_DONE);
395+ spin_unlock_irqrestore(&curbank->tlb_lock, flags);
253396
254397 if (ret) {
255398 dev_warn(data->dev,
@@ -257,70 +400,103 @@ static void mtk_iommu_tlb_flush_range_sync(unsigned long iova, size_t size, · 1 unmodified line
257400 mtk_iommu_tlb_flush_all(data);
258401 }
259402
260− pm_runtime_put(data->dev);
403+ if (check_pm_status)
404+ pm_runtime_put(data->dev);
261405 }
262406 }
263407
264408 static irqreturn_t mtk_iommu_isr(int irq, void *dev_id)
265409 {
266− struct mtk_iommu_data *data = dev_id;
267− struct mtk_iommu_domain *dom = data->m4u_dom;
268− unsigned int fault_larb, fault_port, sub_comm = 0;
410+ struct mtk_iommu_bank_data *bank = dev_id;
411+ struct mtk_iommu_data *data = bank->parent_data;
412+ struct mtk_iommu_domain *dom = bank->m4u_dom;
413+ unsigned int fault_larb = MTK_INVALID_LARBID, fault_port = 0, sub_comm = 0;
269414 u32 int_state, regval, va34_32, pa34_32;
415+ const struct mtk_iommu_plat_data *plat_data = data->plat_data;
416+ void __iomem *base = bank->base;
270417 u64 fault_iova, fault_pa;
271418 bool layer, write;
272419
273420 /* Read error info from registers */
274− int_state = readl_relaxed(data->base + REG_MMU_FAULT_ST1);
421+ int_state = readl_relaxed(base + REG_MMU_FAULT_ST1);
275422 if (int_state & F_REG_MMU0_FAULT_MASK) {
276− regval = readl_relaxed(data->base + REG_MMU0_INT_ID);
277− fault_iova = readl_relaxed(data->base + REG_MMU0_FAULT_VA);
278− fault_pa = readl_relaxed(data->base + REG_MMU0_INVLD_PA);
423+ regval = readl_relaxed(base + REG_MMU0_INT_ID);
424+ fault_iova = readl_relaxed(base + REG_MMU0_FAULT_VA);
425+ fault_pa = readl_relaxed(base + REG_MMU0_INVLD_PA);
279426 } else {
280− regval = readl_relaxed(data->base + REG_MMU1_INT_ID);
281− fault_iova = readl_relaxed(data->base + REG_MMU1_FAULT_VA);
282− fault_pa = readl_relaxed(data->base + REG_MMU1_INVLD_PA);
427+ regval = readl_relaxed(base + REG_MMU1_INT_ID);
428+ fault_iova = readl_relaxed(base + REG_MMU1_FAULT_VA);
429+ fault_pa = readl_relaxed(base + REG_MMU1_INVLD_PA);
283430 }
284431 layer = fault_iova & F_MMU_FAULT_VA_LAYER_BIT;
285432 write = fault_iova & F_MMU_FAULT_VA_WRITE_BIT;
286− if (MTK_IOMMU_HAS_FLAG(data->plat_data, IOVA_34_EN)) {
433+ if (MTK_IOMMU_HAS_FLAG(plat_data, IOVA_34_EN)) {
287434 va34_32 = FIELD_GET(F_MMU_INVAL_VA_34_32_MASK, fault_iova);
288− pa34_32 = FIELD_GET(F_MMU_INVAL_PA_34_32_MASK, fault_iova);
289435 fault_iova = fault_iova & F_MMU_INVAL_VA_31_12_MASK;
290436 fault_iova |= (u64)va34_32 << 32;
291− fault_pa |= (u64)pa34_32 << 32;
292437 }
293−
294− fault_port = F_MMU_INT_ID_PORT_ID(regval);
295− if (MTK_IOMMU_HAS_FLAG(data->plat_data, HAS_SUB_COMM)) {
296− fault_larb = F_MMU_INT_ID_COMM_ID(regval);
297− sub_comm = F_MMU_INT_ID_SUB_COMM_ID(regval);
298− } else {
299− fault_larb = F_MMU_INT_ID_LARB_ID(regval);
438+ pa34_32 = FIELD_GET(F_MMU_INVAL_PA_34_32_MASK, fault_iova);
439+ fault_pa |= (u64)pa34_32 << 32;
440+
441+ if (MTK_IOMMU_IS_TYPE(plat_data, MTK_IOMMU_TYPE_MM)) {
442+ fault_port = F_MMU_INT_ID_PORT_ID(regval);
443+ if (MTK_IOMMU_HAS_FLAG(plat_data, HAS_SUB_COMM_2BITS)) {
444+ fault_larb = F_MMU_INT_ID_COMM_ID(regval);
445+ sub_comm = F_MMU_INT_ID_SUB_COMM_ID(regval);
446+ } else if (MTK_IOMMU_HAS_FLAG(plat_data, HAS_SUB_COMM_3BITS)) {
447+ fault_larb = F_MMU_INT_ID_COMM_ID_EXT(regval);
448+ sub_comm = F_MMU_INT_ID_SUB_COMM_ID_EXT(regval);
449+ } else {
450+ fault_larb = F_MMU_INT_ID_LARB_ID(regval);
451+ }
452+ fault_larb = data->plat_data->larbid_remap[fault_larb][sub_comm];
300453 }
301− fault_larb = data->plat_data->larbid_remap[fault_larb][sub_comm];
302454
303− if (report_iommu_fault(&dom->domain, data->dev, fault_iova,
455+ if (report_iommu_fault(&dom->domain, bank->parent_dev, fault_iova,
304456 write ? IOMMU_FAULT_WRITE : IOMMU_FAULT_READ)) {
305457 dev_err_ratelimited(
306− data->dev,
307− "fault type=0x%x iova=0x%llx pa=0x%llx larb=%d port=%d layer=%d %s\n",
308− int_state, fault_iova, fault_pa, fault_larb, fault_port,
458+ bank->parent_dev,
459+ "fault type=0x%x iova=0x%llx pa=0x%llx master=0x%x(larb=%d port=%d) layer=%d %s\n",
460+ int_state, fault_iova, fault_pa, regval, fault_larb, fault_port,
309461 layer, write ? "write" : "read");
310462 }
311463
312464 /* Interrupt clear */
313− regval = readl_relaxed(data->base + REG_MMU_INT_CONTROL0);
465+ regval = readl_relaxed(base + REG_MMU_INT_CONTROL0);
314466 regval |= F_INT_CLR_BIT;
315− writel_relaxed(regval, data->base + REG_MMU_INT_CONTROL0);
467+ writel_relaxed(regval, base + REG_MMU_INT_CONTROL0);
316468
317469 mtk_iommu_tlb_flush_all(data);
318470
319471 return IRQ_HANDLED;
320472 }
321473
322−static int mtk_iommu_get_domain_id(struct device *dev,
323− const struct mtk_iommu_plat_data *plat_data)
474+static unsigned int mtk_iommu_get_bank_id(struct device *dev,
475+ const struct mtk_iommu_plat_data *plat_data)
476+{
477+ struct iommu_fwspec *fwspec = dev_iommu_fwspec_get(dev);
478+ unsigned int i, portmsk = 0, bankid = 0;
479+
480+ if (plat_data->banks_num == 1)
481+ return bankid;
482+
483+ for (i = 0; i < fwspec->num_ids; i++)
484+ portmsk |= BIT(MTK_M4U_TO_PORT(fwspec->ids[i]));
485+
486+ for (i = 0; i < plat_data->banks_num && i < MTK_IOMMU_BANK_MAX; i++) {
487+ if (!plat_data->banks_enable[i])
488+ continue;
489+
490+ if (portmsk & plat_data->banks_portmsk[i]) {
491+ bankid = i;
492+ break;
493+ }
494+ }
495+ return bankid; /* default is 0 */
496+}
497+
498+static int mtk_iommu_get_iova_region_id(struct device *dev,
499+ const struct mtk_iommu_plat_data *plat_data)
324500 {
325501 const struct mtk_iommu_iova_region *rgn = plat_data->iova_region;
326502 const struct bus_dma_region *dma_rgn = dev->dma_range_map;
@@ -349,46 +525,65 @@ static int mtk_iommu_get_domain_id(struct device *dev, · 22 unmodified lines
349525 return -EINVAL;
350526 }
351527
352−static void mtk_iommu_config(struct mtk_iommu_data *data, struct device *dev,
353− bool enable, unsigned int domid)
528+static int mtk_iommu_config(struct mtk_iommu_data *data, struct device *dev,
529+ bool enable, unsigned int regionid)
354530 {
355531 struct mtk_smi_larb_iommu *larb_mmu;
356532 unsigned int larbid, portid;
357533 struct iommu_fwspec *fwspec = dev_iommu_fwspec_get(dev);
358534 const struct mtk_iommu_iova_region *region;
359− int i;
535+ u32 peri_mmuen, peri_mmuen_msk;
536+ int i, ret = 0;
360537
361538 for (i = 0; i < fwspec->num_ids; ++i) {
362539 larbid = MTK_M4U_TO_LARB(fwspec->ids[i]);
363540 portid = MTK_M4U_TO_PORT(fwspec->ids[i]);
364541
365− larb_mmu = &data->larb_imu[larbid];
366−
367− region = data->plat_data->iova_region + domid;
368− larb_mmu->bank[portid] = upper_32_bits(region->iova_base);
369−
370− dev_dbg(dev, "%s iommu for larb(%s) port %d dom %d bank %d.\n",
371− enable ? "enable" : "disable", dev_name(larb_mmu->dev),
372− portid, domid, larb_mmu->bank[portid]);
373−
374− if (enable)
375− larb_mmu->mmu |= MTK_SMI_MMU_EN(portid);
376− else
377− larb_mmu->mmu &= ~MTK_SMI_MMU_EN(portid);
542+ if (MTK_IOMMU_IS_TYPE(data->plat_data, MTK_IOMMU_TYPE_MM)) {
543+ larb_mmu = &data->larb_imu[larbid];
544+
545+ region = data->plat_data->iova_region + regionid;
546+ larb_mmu->bank[portid] = upper_32_bits(region->iova_base);
547+
548+ dev_dbg(dev, "%s iommu for larb(%s) port %d region %d rgn-bank %d.\n",
549+ enable ? "enable" : "disable", dev_name(larb_mmu->dev),
550+ portid, regionid, larb_mmu->bank[portid]);
551+
552+ if (enable)
553+ larb_mmu->mmu |= MTK_SMI_MMU_EN(portid);
554+ else
555+ larb_mmu->mmu &= ~MTK_SMI_MMU_EN(portid);
556+ } else if (MTK_IOMMU_IS_TYPE(data->plat_data, MTK_IOMMU_TYPE_INFRA)) {
557+ peri_mmuen_msk = BIT(portid);
558+ /* PCI dev has only one output id, enable the next writing bit for PCIe */
559+ if (dev_is_pci(dev))
560+ peri_mmuen_msk |= BIT(portid + 1);
561+
562+ peri_mmuen = enable ? peri_mmuen_msk : 0;
563+ ret = regmap_update_bits(data->pericfg, PERICFG_IOMMU_1,
564+ peri_mmuen_msk, peri_mmuen);
565+ if (ret)
566+ dev_err(dev, "%s iommu(%s) inframaster 0x%x fail(%d).\n",
567+ enable ? "enable" : "disable",
568+ dev_name(data->dev), peri_mmuen_msk, ret);
569+ }
378570 }
571+ return ret;
379572 }
380573
381574 static int mtk_iommu_domain_finalise(struct mtk_iommu_domain *dom,
382575 struct mtk_iommu_data *data,
383− unsigned int domid)
576+ unsigned int region_id)
384577 {
385578 const struct mtk_iommu_iova_region *region;
386−
387− /* Use the exist domain as there is only one pgtable here. */
388− if (data->m4u_dom) {
389− dom->iop = data->m4u_dom->iop;
390− dom->cfg = data->m4u_dom->cfg;
391− dom->domain.pgsize_bitmap = data->m4u_dom->cfg.pgsize_bitmap;
579+ struct mtk_iommu_domain *m4u_dom;
580+
581+ /* Always use bank0 in sharing pgtable case */
582+ m4u_dom = data->bank[0].m4u_dom;
583+ if (m4u_dom) {
584+ dom->iop = m4u_dom->iop;
585+ dom->cfg = m4u_dom->cfg;
586+ dom->domain.pgsize_bitmap = m4u_dom->cfg.pgsize_bitmap;
392587 goto update_iova_region;
393588 }
394589
@@ -417,7 +612,7 @@ static int mtk_iommu_domain_finalise(struct mtk_iommu_domain *dom, · 22 unmodified lines
417612
418613 update_iova_region:
419614 /* Update the iova region for this domain */
420− region = data->plat_data->iova_region + domid;
615+ region = data->plat_data->iova_region + region_id;
421616 dom->domain.geometry.aperture_start = region->iova_base;
422617 dom->domain.geometry.aperture_end = region->iova_base + region->size - 1;
423618 dom->domain.geometry.force_aperture = true;
@@ -428,12 +623,13 @@ static struct iommu_domain *mtk_iommu_domain_alloc(unsigned type) · 4 unmodified lines
428623 {
429624 struct mtk_iommu_domain *dom;
430625
431− if (type != IOMMU_DOMAIN_DMA)
626+ if (type != IOMMU_DOMAIN_DMA && type != IOMMU_DOMAIN_UNMANAGED)
432627 return NULL;
433628
434629 dom = kzalloc(sizeof(*dom), GFP_KERNEL);
435630 if (!dom)
436631 return NULL;
632+ mutex_init(&dom->mutex);
437633
438634 return &dom->domain;
439635 }
@@ -446,40 +642,60 @@ static void mtk_iommu_domain_free(struct iommu_domain *domain) · 6 unmodified lines
446642 static int mtk_iommu_attach_device(struct iommu_domain *domain,
447643 struct device *dev)
448644 {
449− struct mtk_iommu_data *data = dev_iommu_priv_get(dev);
645+ struct mtk_iommu_data *data = dev_iommu_priv_get(dev), *frstdata;
450646 struct mtk_iommu_domain *dom = to_mtk_domain(domain);
647+ struct list_head *hw_list = data->hw_list;
451648 struct device *m4udev = data->dev;
452− int ret, domid;
649+ struct mtk_iommu_bank_data *bank;
650+ unsigned int bankid;
651+ int ret, region_id;
453652
454− domid = mtk_iommu_get_domain_id(dev, data->plat_data);
455− if (domid < 0)
456− return domid;
653+ region_id = mtk_iommu_get_iova_region_id(dev, data->plat_data);
654+ if (region_id < 0)
655+ return region_id;
457656
458− if (!dom->data) {
459− if (mtk_iommu_domain_finalise(dom, data, domid))
657+ bankid = mtk_iommu_get_bank_id(dev, data->plat_data);
658+ mutex_lock(&dom->mutex);
659+ if (!dom->bank) {
660+ /* Data is in the frstdata in sharing pgtable case. */
661+ frstdata = mtk_iommu_get_frst_data(hw_list);
662+
663+ ret = mtk_iommu_domain_finalise(dom, frstdata, region_id);
664+ if (ret) {
665+ mutex_unlock(&dom->mutex);
460666 return -ENODEV;
461− dom->data = data;
667+ }
668+ dom->bank = &data->bank[bankid];
462669 }
670+ mutex_unlock(&dom->mutex);
463671
464− if (!data->m4u_dom) { /* Initialize the M4U HW */
672+ mutex_lock(&data->mutex);
673+ bank = &data->bank[bankid];
674+ if (!bank->m4u_dom) { /* Initialize the M4U HW for each a BANK */
465675 ret = pm_runtime_resume_and_get(m4udev);
466− if (ret < 0)
467− return ret;
676+ if (ret < 0) {
677+ dev_err(m4udev, "pm get fail(%d) in attach.\n", ret);
678+ goto err_unlock;
679+ }
468680
469− ret = mtk_iommu_hw_init(data);
681+ ret = mtk_iommu_hw_init(data, bankid);
470682 if (ret) {
471683 pm_runtime_put(m4udev);
472− return ret;
684+ goto err_unlock;
473685 }
474− data->m4u_dom = dom;
686+ bank->m4u_dom = dom;
475687 writel(dom->cfg.arm_v7s_cfg.ttbr & MMU_PT_ADDR_MASK,
476− data->base + REG_MMU_PT_BASE_ADDR);
688+ bank->base + REG_MMU_PT_BASE_ADDR);
477689
478690 pm_runtime_put(m4udev);
479691 }
692+ mutex_unlock(&data->mutex);
480693
481− mtk_iommu_config(data, dev, true, domid);
482− return 0;
694+ return mtk_iommu_config(data, dev, true, region_id);
695+
696+err_unlock:
697+ mutex_unlock(&data->mutex);
698+ return ret;
483699 }
484700
485701 static void mtk_iommu_detach_device(struct iommu_domain *domain,
@@ -496,7 +712,7 @@ static int mtk_iommu_map(struct iommu_domain *domain, unsigned long iova, · 10 unmodified lines
496712 struct mtk_iommu_domain *dom = to_mtk_domain(domain);
497713
498714 /* The "4GB mode" M4U physically can not use the lower remap of Dram. */
499− if (dom->data->enable_4GB)
715+ if (dom->bank->parent_data->enable_4GB)
500716 paddr |= BIT_ULL(32);
501717
502718 /* Synchronize with the tlb_lock */
@@ -517,7 +733,7 @@ static void mtk_iommu_flush_iotlb_all(struct iommu_domain *domain) · 14 unmodified lines
517733 {
518734 struct mtk_iommu_domain *dom = to_mtk_domain(domain);
519735
520− mtk_iommu_tlb_flush_all(dom->data);
736+ mtk_iommu_tlb_flush_all(dom->bank->parent_data);
521737 }
522738
523739 static void mtk_iommu_iotlb_sync(struct iommu_domain *domain,
@@ -526,8 +742,7 @@ static void mtk_iommu_iotlb_sync(struct iommu_domain *domain, · 2 unmodified lines
526742 struct mtk_iommu_domain *dom = to_mtk_domain(domain);
527743 size_t length = gather->end - gather->start + 1;
528744
529− mtk_iommu_tlb_flush_range_sync(gather->start, length, gather->pgsize,
530− dom->data);
745+ mtk_iommu_tlb_flush_range_sync(gather->start, length, dom->bank);
531746 }
532747
533748 static void mtk_iommu_sync_map(struct iommu_domain *domain, unsigned long iova,
@@ -535,7 +750,7 @@ static void mtk_iommu_sync_map(struct iommu_domain *domain, unsigned long iova, · 1 unmodified line
535750 {
536751 struct mtk_iommu_domain *dom = to_mtk_domain(domain);
537752
538− mtk_iommu_tlb_flush_range_sync(iova, size, size, dom->data);
753+ mtk_iommu_tlb_flush_range_sync(iova, size, dom->bank);
539754 }
540755
541756 static phys_addr_t mtk_iommu_iova_to_phys(struct iommu_domain *domain,
@@ -546,7 +761,7 @@ static phys_addr_t mtk_iommu_iova_to_phys(struct iommu_domain *domain, · 4 unmodified lines
546761
547762 pa = dom->iop->iova_to_phys(dom->iop, iova);
548763 if (IS_ENABLED(CONFIG_PHYS_ADDR_T_64BIT) &&
549− dom->data->enable_4GB &&
764+ dom->bank->parent_data->enable_4GB &&
550765 pa >= MTK_IOMMU_4GB_MODE_REMAP_BASE)
551766 pa &= ~BIT_ULL(32);
552767
@@ -566,12 +781,18 @@ static struct iommu_device *mtk_iommu_probe_device(struct device *dev) · 13 unmodified lines
566781
567782 data = dev_iommu_priv_get(dev);
568783
784+ if (!MTK_IOMMU_IS_TYPE(data->plat_data, MTK_IOMMU_TYPE_MM))
785+ return &data->iommu;
786+
569787 /*
570788 * Link the consumer device with the smi-larb device(supplier).
571789 * The device that connects with each a larb is a independent HW.
572790 * All the ports in each a device should be in the same larbs.
573791 */
574792 larbid = MTK_M4U_TO_LARB(fwspec->ids[0]);
793+ if (larbid >= MTK_LARB_NR_MAX)
794+ return ERR_PTR(-EINVAL);
795+
575796 for (i = 1; i < fwspec->num_ids; i++) {
576797 larbidx = MTK_M4U_TO_LARB(fwspec->ids[i]);
577798 if (larbid != larbidx) {
@@ -581,6 +802,9 @@ static struct iommu_device *mtk_iommu_probe_device(struct device *dev) · 3 unmodified lines
581802 }
582803 }
583804 larbdev = data->larb_imu[larbid].dev;
805+ if (!larbdev)
806+ return ERR_PTR(-EINVAL);
807+
584808 link = device_link_add(dev, larbdev,
585809 DL_FLAG_PM_RUNTIME | DL_FLAG_STATELESS);
586810 if (!link)
@@ -599,34 +823,55 @@ static void mtk_iommu_release_device(struct device *dev) · 12 unmodified lines
599823 return;
600824
601825 data = dev_iommu_priv_get(dev);
602− larbid = MTK_M4U_TO_LARB(fwspec->ids[0]);
603− larbdev = data->larb_imu[larbid].dev;
604− device_link_remove(dev, larbdev);
826+ if (MTK_IOMMU_IS_TYPE(data->plat_data, MTK_IOMMU_TYPE_MM)) {
827+ larbid = MTK_M4U_TO_LARB(fwspec->ids[0]);
828+ larbdev = data->larb_imu[larbid].dev;
829+ device_link_remove(dev, larbdev);
830+ }
605831
606832 iommu_fwspec_free(dev);
607833 }
608834
835+static int mtk_iommu_get_group_id(struct device *dev, const struct mtk_iommu_plat_data *plat_data)
836+{
837+ unsigned int bankid;
838+
839+ /*
840+ * If the bank function is enabled, each bank is a iommu group/domain.
841+ * Otherwise, each iova region is a iommu group/domain.
842+ */
843+ bankid = mtk_iommu_get_bank_id(dev, plat_data);
844+ if (bankid)
845+ return bankid;
846+
847+ return mtk_iommu_get_iova_region_id(dev, plat_data);
848+}
849+
609850 static struct iommu_group *mtk_iommu_device_group(struct device *dev)
610851 {
611− struct mtk_iommu_data *data = mtk_iommu_get_m4u_data();
852+ struct mtk_iommu_data *c_data = dev_iommu_priv_get(dev), *data;
853+ struct list_head *hw_list = c_data->hw_list;
612854 struct iommu_group *group;
613− int domid;
855+ int groupid;
614856
857+ data = mtk_iommu_get_frst_data(hw_list);
615858 if (!data)
616859 return ERR_PTR(-ENODEV);
617860
618− domid = mtk_iommu_get_domain_id(dev, data->plat_data);
619− if (domid < 0)
620− return ERR_PTR(domid);
861+ groupid = mtk_iommu_get_group_id(dev, data->plat_data);
862+ if (groupid < 0)
863+ return ERR_PTR(groupid);
621864
622− group = data->m4u_group[domid];
865+ mutex_lock(&data->mutex);
866+ group = data->m4u_group[groupid];
623867 if (!group) {
624868 group = iommu_group_alloc();
625869 if (!IS_ERR(group))
626− data->m4u_group[domid] = group;
870+ data->m4u_group[groupid] = group;
627871 } else {
628872 iommu_group_ref_get(group);
629873 }
874+ mutex_unlock(&data->mutex);
630875 return group;
631876 }
632877
@@ -656,14 +901,14 @@ static void mtk_iommu_get_resv_regions(struct device *dev, · 23 unmodified lines
656901 struct list_head *head)
657902 {
658903 struct mtk_iommu_data *data = dev_iommu_priv_get(dev);
659− unsigned int domid = mtk_iommu_get_domain_id(dev, data->plat_data), i;
904+ unsigned int regionid = mtk_iommu_get_iova_region_id(dev, data->plat_data), i;
660905 const struct mtk_iommu_iova_region *resv, *curdom;
661906 struct iommu_resv_region *region;
662907 int prot = IOMMU_WRITE | IOMMU_READ;
663908
664− if ((int)domid < 0)
909+ if ((int)regionid < 0)
665910 return;
666− curdom = data->plat_data->iova_region + domid;
911+ curdom = data->plat_data->iova_region + regionid;
667912 for (i = 0; i < data->plat_data->iova_region_nr; i++) {
668913 resv = data->plat_data->iova_region + i;
669914
@@ -704,42 +949,24 @@ static const struct iommu_ops mtk_iommu_ops = { · 34 unmodified lines
704949 }
705950 };
706951
707−static int mtk_iommu_hw_init(const struct mtk_iommu_data *data)
952+static int mtk_iommu_hw_init(const struct mtk_iommu_data *data, unsigned int bankid)
708953 {
954+ const struct mtk_iommu_bank_data *bankx = &data->bank[bankid];
955+ const struct mtk_iommu_bank_data *bank0 = &data->bank[0];
709956 u32 regval;
710957
958+ /*
959+ * Global control settings are in bank0. May re-init these global registers
960+ * since no sure if there is bank0 consumers.
961+ */
711962 if (data->plat_data->m4u_plat == M4U_MT8173) {
712963 regval = F_MMU_PREFETCH_RT_REPLACE_MOD |
713964 F_MMU_TF_PROT_TO_PROGRAM_ADDR_MT8173;
714965 } else {
715− regval = readl_relaxed(data->base + REG_MMU_CTRL_REG);
966+ regval = readl_relaxed(bank0->base + REG_MMU_CTRL_REG);
716967 regval |= F_MMU_TF_PROT_TO_PROGRAM_ADDR;
717968 }
718− writel_relaxed(regval, data->base + REG_MMU_CTRL_REG);
719−
720− regval = F_L2_MULIT_HIT_EN |
721− F_TABLE_WALK_FAULT_INT_EN |
722− F_PREETCH_FIFO_OVERFLOW_INT_EN |
723− F_MISS_FIFO_OVERFLOW_INT_EN |
724− F_PREFETCH_FIFO_ERR_INT_EN |
725− F_MISS_FIFO_ERR_INT_EN;
726− writel_relaxed(regval, data->base + REG_MMU_INT_CONTROL0);
727−
728− regval = F_INT_TRANSLATION_FAULT |
729− F_INT_MAIN_MULTI_HIT_FAULT |
730− F_INT_INVALID_PA_FAULT |
731− F_INT_ENTRY_REPLACEMENT_FAULT |
732− F_INT_TLB_MISS_FAULT |
733− F_INT_MISS_TRANSACTION_FIFO_FAULT |
734− F_INT_PRETETCH_TRANSATION_FIFO_FAULT;
735− writel_relaxed(regval, data->base + REG_MMU_INT_MAIN_CONTROL);
736−
737− if (MTK_IOMMU_HAS_FLAG(data->plat_data, HAS_LEGACY_IVRP_PADDR))
738− regval = (data->protect_base >> 1) | (data->enable_4GB << 31);
739− else
740− regval = lower_32_bits(data->protect_base) |
741− upper_32_bits(data->protect_base);
742− writel_relaxed(regval, data->base + REG_MMU_IVRP_PADDR);
969+ writel_relaxed(regval, bank0->base + REG_MMU_CTRL_REG);
743970
744971 if (data->enable_4GB &&
745972 MTK_IOMMU_HAS_FLAG(data->plat_data, HAS_VLD_PA_RNG)) {
@@ -748,31 +975,61 @@ static int mtk_iommu_hw_init(const struct mtk_iommu_data *data) · 2 unmodified lines
748975 * 0x1_0000_0000 to 0x1_ffff_ffff. here record bit[32:30].
749976 */
750977 regval = F_MMU_VLD_PA_RNG(7, 4);
751− writel_relaxed(regval, data->base + REG_MMU_VLD_PA_RNG);
978+ writel_relaxed(regval, bank0->base + REG_MMU_VLD_PA_RNG);
752979 }
753− writel_relaxed(0, data->base + REG_MMU_DCM_DIS);
980+ if (MTK_IOMMU_HAS_FLAG(data->plat_data, DCM_DISABLE))
981+ writel_relaxed(F_MMU_DCM, bank0->base + REG_MMU_DCM_DIS);
982+ else
983+ writel_relaxed(0, bank0->base + REG_MMU_DCM_DIS);
984+
754985 if (MTK_IOMMU_HAS_FLAG(data->plat_data, WR_THROT_EN)) {
755986 /* write command throttling mode */
756− regval = readl_relaxed(data->base + REG_MMU_WR_LEN_CTRL);
987+ regval = readl_relaxed(bank0->base + REG_MMU_WR_LEN_CTRL);
757988 regval &= ~F_MMU_WR_THROT_DIS_MASK;
758− writel_relaxed(regval, data->base + REG_MMU_WR_LEN_CTRL);
989+ writel_relaxed(regval, bank0->base + REG_MMU_WR_LEN_CTRL);
759990 }
760991
761992 if (MTK_IOMMU_HAS_FLAG(data->plat_data, RESET_AXI)) {
762993 /* The register is called STANDARD_AXI_MODE in this case */
763994 regval = 0;
764995 } else {
765− regval = readl_relaxed(data->base + REG_MMU_MISC_CTRL);
766− regval &= ~F_MMU_STANDARD_AXI_MODE_MASK;
996+ regval = readl_relaxed(bank0->base + REG_MMU_MISC_CTRL);
997+ if (!MTK_IOMMU_HAS_FLAG(data->plat_data, STD_AXI_MODE))
998+ regval &= ~F_MMU_STANDARD_AXI_MODE_MASK;
767999 if (MTK_IOMMU_HAS_FLAG(data->plat_data, OUT_ORDER_WR_EN))
7681000 regval &= ~F_MMU_IN_ORDER_WR_EN_MASK;
7691001 }
770− writel_relaxed(regval, data->base + REG_MMU_MISC_CTRL);
1002+ writel_relaxed(regval, bank0->base + REG_MMU_MISC_CTRL);
7711003
772− if (devm_request_irq(data->dev, data->irq, mtk_iommu_isr, 0,
773− dev_name(data->dev), (void *)data)) {
774− writel_relaxed(0, data->base + REG_MMU_PT_BASE_ADDR);
775− dev_err(data->dev, "Failed @ IRQ-%d Request\n", data->irq);
1004+ /* Independent settings for each bank */
1005+ regval = F_L2_MULIT_HIT_EN |
1006+ F_TABLE_WALK_FAULT_INT_EN |
1007+ F_PREETCH_FIFO_OVERFLOW_INT_EN |
1008+ F_MISS_FIFO_OVERFLOW_INT_EN |
1009+ F_PREFETCH_FIFO_ERR_INT_EN |
1010+ F_MISS_FIFO_ERR_INT_EN;
1011+ writel_relaxed(regval, bankx->base + REG_MMU_INT_CONTROL0);
1012+
1013+ regval = F_INT_TRANSLATION_FAULT |
1014+ F_INT_MAIN_MULTI_HIT_FAULT |
1015+ F_INT_INVALID_PA_FAULT |
1016+ F_INT_ENTRY_REPLACEMENT_FAULT |
1017+ F_INT_TLB_MISS_FAULT |
1018+ F_INT_MISS_TRANSACTION_FIFO_FAULT |
1019+ F_INT_PRETETCH_TRANSATION_FIFO_FAULT;
1020+ writel_relaxed(regval, bankx->base + REG_MMU_INT_MAIN_CONTROL);
1021+
1022+ if (MTK_IOMMU_HAS_FLAG(data->plat_data, HAS_LEGACY_IVRP_PADDR))
1023+ regval = (data->protect_base >> 1) | (data->enable_4GB << 31);
1024+ else
1025+ regval = lower_32_bits(data->protect_base) |
1026+ upper_32_bits(data->protect_base);
1027+ writel_relaxed(regval, bankx->base + REG_MMU_IVRP_PADDR);
1028+
1029+ if (devm_request_irq(bankx->parent_dev, bankx->irq, mtk_iommu_isr, 0,
1030+ dev_name(bankx->parent_dev), (void *)bankx)) {
1031+ writel_relaxed(0, bankx->base + REG_MMU_PT_BASE_ADDR);
1032+ dev_err(bankx->parent_dev, "Failed @ IRQ-%d Request\n", bankx->irq);
7761033 return -ENODEV;
7771034 }
7781035
@@ -784,21 +1041,91 @@ static const struct component_master_ops mtk_iommu_com_ops = { · 5 unmodified lines
7841041 .unbind = mtk_iommu_unbind,
7851042 };
7861043
1044+static int mtk_iommu_mm_dts_parse(struct device *dev, struct component_match **match,
1045+ struct mtk_iommu_data *data)
1046+{
1047+ struct device_node *larbnode, *smicomm_node, *smi_subcomm_node;
1048+ struct platform_device *plarbdev;
1049+ struct device_link *link;
1050+ int i, larb_nr, ret;
1051+
1052+ larb_nr = of_count_phandle_with_args(dev->of_node, "mediatek,larbs", NULL);
1053+ if (larb_nr < 0)
1054+ return larb_nr;
1055+
1056+ for (i = 0; i < larb_nr; i++) {
1057+ u32 id;
1058+
1059+ larbnode = of_parse_phandle(dev->of_node, "mediatek,larbs", i);
1060+ if (!larbnode)
1061+ return -EINVAL;
1062+
1063+ if (!of_device_is_available(larbnode)) {
1064+ of_node_put(larbnode);
1065+ continue;
1066+ }
1067+
1068+ ret = of_property_read_u32(larbnode, "mediatek,larb-id", &id);
1069+ if (ret)/* The id is consecutive if there is no this property */
1070+ id = i;
1071+
1072+ plarbdev = of_find_device_by_node(larbnode);
1073+ if (!plarbdev) {
1074+ of_node_put(larbnode);
1075+ return -ENODEV;
1076+ }
1077+ if (!plarbdev->dev.driver) {
1078+ of_node_put(larbnode);
1079+ return -EPROBE_DEFER;
1080+ }
1081+ data->larb_imu[id].dev = &plarbdev->dev;
1082+
1083+ component_match_add_release(dev, match, component_release_of,
1084+ component_compare_of, larbnode);
1085+ }
1086+
1087+ /* Get smi-(sub)-common dev from the last larb. */
1088+ smi_subcomm_node = of_parse_phandle(larbnode, "mediatek,smi", 0);
1089+ if (!smi_subcomm_node)
1090+ return -EINVAL;
1091+
1092+ /*
1093+ * It may have two level smi-common. the node is smi-sub-common if it
1094+ * has a new mediatek,smi property. otherwise it is smi-commmon.
1095+ */
1096+ smicomm_node = of_parse_phandle(smi_subcomm_node, "mediatek,smi", 0);
1097+ if (smicomm_node)
1098+ of_node_put(smi_subcomm_node);
1099+ else
1100+ smicomm_node = smi_subcomm_node;
1101+
1102+ plarbdev = of_find_device_by_node(smicomm_node);
1103+ of_node_put(smicomm_node);
1104+ data->smicomm_dev = &plarbdev->dev;
1105+
1106+ link = device_link_add(data->smicomm_dev, dev,
1107+ DL_FLAG_STATELESS | DL_FLAG_PM_RUNTIME);
1108+ if (!link) {
1109+ dev_err(dev, "Unable to link %s.\n", dev_name(data->smicomm_dev));
1110+ return -EINVAL;
1111+ }
1112+ return 0;
1113+}
1114+
7871115 static int mtk_iommu_probe(struct platform_device *pdev)
7881116 {
7891117 struct mtk_iommu_data *data;
7901118 struct device *dev = &pdev->dev;
791− struct device_node *larbnode, *smicomm_node;
792− struct platform_device *plarbdev;
793− struct device_link *link;
7941119 struct resource *res;
7951120 resource_size_t ioaddr;
7961121 struct component_match *match = NULL;
7971122 struct regmap *infracfg;
7981123 void *protect;
799− int i, larb_nr, ret;
1124+ int ret, banks_num, i = 0;
8001125 u32 val;
8011126 char *p;
1127+ struct mtk_iommu_bank_data *bank;
1128+ void __iomem *base;
8021129
8031130 data = devm_kzalloc(dev, sizeof(*data), GFP_KERNEL);
8041131 if (!data)
@@ -835,15 +1162,36 @@ static int mtk_iommu_probe(struct platform_device *pdev) · 30 unmodified lines
8351162 data->enable_4GB = !!(val & F_DDR_4GB_SUPPORT_EN);
8361163 }
8371164
1165+ banks_num = data->plat_data->banks_num;
8381166 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
839− data->base = devm_ioremap_resource(dev, res);
840− if (IS_ERR(data->base))
841− return PTR_ERR(data->base);
1167+ if (resource_size(res) < banks_num * MTK_IOMMU_BANK_SZ) {
1168+ dev_err(dev, "banknr %d. res %pR is not enough.\n", banks_num, res);
1169+ return -EINVAL;
1170+ }
1171+ base = devm_ioremap_resource(dev, res);
1172+ if (IS_ERR(base))
1173+ return PTR_ERR(base);
8421174 ioaddr = res->start;
8431175
844− data->irq = platform_get_irq(pdev, 0);
845− if (data->irq < 0)
846− return data->irq;
1176+ data->bank = devm_kmalloc(dev, banks_num * sizeof(*data->bank), GFP_KERNEL);
1177+ if (!data->bank)
1178+ return -ENOMEM;
1179+
1180+ do {
1181+ if (!data->plat_data->banks_enable[i])
1182+ continue;
1183+ bank = &data->bank[i];
1184+ bank->id = i;
1185+ bank->base = base + i * MTK_IOMMU_BANK_SZ;
1186+ bank->m4u_dom = NULL;
1187+
1188+ bank->irq = platform_get_irq(pdev, i);
1189+ if (bank->irq < 0)
1190+ return bank->irq;
1191+ bank->parent_dev = dev;
1192+ bank->parent_data = data;
1193+ spin_lock_init(&bank->tlb_lock);
1194+ } while (++i < banks_num);
8471195
8481196 if (MTK_IOMMU_HAS_FLAG(data->plat_data, HAS_BCLK)) {
8491197 data->bclk = devm_clk_get(dev, "bclk");
@@ -851,62 +1199,27 @@ static int mtk_iommu_probe(struct platform_device *pdev) · 1 unmodified line
8511199 return PTR_ERR(data->bclk);
8521200 }
8531201
854− larb_nr = of_count_phandle_with_args(dev->of_node,
855− "mediatek,larbs", NULL);
856− if (larb_nr < 0)
857− return larb_nr;
858−
859− for (i = 0; i < larb_nr; i++) {
860− u32 id;
861−
862− larbnode = of_parse_phandle(dev->of_node, "mediatek,larbs", i);
863− if (!larbnode)
864− return -EINVAL;
865−
866− if (!of_device_is_available(larbnode)) {
867− of_node_put(larbnode);
868− continue;
869− }
870−
871− ret = of_property_read_u32(larbnode, "mediatek,larb-id", &id);
872− if (ret)/* The id is consecutive if there is no this property */
873− id = i;
1202+ pm_runtime_enable(dev);
8741203
875− plarbdev = of_find_device_by_node(larbnode);
876− if (!plarbdev) {
877− of_node_put(larbnode);
878− return -ENODEV;
1204+ if (MTK_IOMMU_IS_TYPE(data->plat_data, MTK_IOMMU_TYPE_MM)) {
1205+ ret = mtk_iommu_mm_dts_parse(dev, &match, data);
1206+ if (ret) {
1207+ dev_err(dev, "mm dts parse fail(%d).", ret);
1208+ goto out_runtime_disable;
8791209 }
880− if (!plarbdev->dev.driver) {
881− of_node_put(larbnode);
882− return -EPROBE_DEFER;
1210+ } else if (MTK_IOMMU_IS_TYPE(data->plat_data, MTK_IOMMU_TYPE_INFRA) &&
1211+ data->plat_data->pericfg_comp_str) {
1212+ infracfg = syscon_regmap_lookup_by_compatible(data->plat_data->pericfg_comp_str);
1213+ if (IS_ERR(infracfg)) {
1214+ ret = PTR_ERR(infracfg);
1215+ goto out_runtime_disable;
8831216 }
884− data->larb_imu[id].dev = &plarbdev->dev;
885−
886− component_match_add_release(dev, &match, component_release_of,
887− component_compare_of, larbnode);
888− }
889−
890− /* Get smi-common dev from the last larb. */
891− smicomm_node = of_parse_phandle(larbnode, "mediatek,smi", 0);
892− if (!smicomm_node)
893− return -EINVAL;
894−
895− plarbdev = of_find_device_by_node(smicomm_node);
896− of_node_put(smicomm_node);
897− data->smicomm_dev = &plarbdev->dev;
898−
899− pm_runtime_enable(dev);
9001217
901− link = device_link_add(data->smicomm_dev, dev,
902− DL_FLAG_STATELESS | DL_FLAG_PM_RUNTIME);
903− if (!link) {
904− dev_err(dev, "Unable to link %s.\n", dev_name(data->smicomm_dev));
905− ret = -EINVAL;
906− goto out_runtime_disable;
1218+ data->pericfg = infracfg;
9071219 }
9081220
9091221 platform_set_drvdata(pdev, data);
1222+ mutex_init(&data->mutex);
9101223
9111224 ret = iommu_device_sysfs_add(&data->iommu, dev, NULL,
9121225 "mtk-iommu.%pa", &ioaddr);
@@ -917,8 +1230,14 @@ static int mtk_iommu_probe(struct platform_device *pdev) · 4 unmodified lines
9171230 if (ret)
9181231 goto out_sysfs_remove;
9191232
920− spin_lock_init(&data->tlb_lock);
921− list_add_tail(&data->list, &m4ulist);
1233+ if (MTK_IOMMU_HAS_FLAG(data->plat_data, SHARE_PGTABLE)) {
1234+ list_add_tail(&data->list, data->plat_data->hw_list);
1235+ data->hw_list = data->plat_data->hw_list;
1236+ } else {
1237+ INIT_LIST_HEAD(&data->hw_list_head);
1238+ list_add_tail(&data->list, &data->hw_list_head);
1239+ data->hw_list = &data->hw_list_head;
1240+ }
9221241
9231242 if (!iommu_present(&platform_bus_type)) {
9241243 ret = bus_set_iommu(&platform_bus_type, &mtk_iommu_ops);
@@ -926,9 +1245,20 @@ static int mtk_iommu_probe(struct platform_device *pdev) · 1 unmodified line
9261245 goto out_list_del;
9271246 }
9281247
929− ret = component_master_add_with_match(dev, &mtk_iommu_com_ops, match);
930− if (ret)
931− goto out_bus_set_null;
1248+ if (MTK_IOMMU_IS_TYPE(data->plat_data, MTK_IOMMU_TYPE_MM)) {
1249+ ret = component_master_add_with_match(dev, &mtk_iommu_com_ops, match);
1250+ if (ret)
1251+ goto out_bus_set_null;
1252+ } else if (MTK_IOMMU_IS_TYPE(data->plat_data, MTK_IOMMU_TYPE_INFRA) &&
1253+ MTK_IOMMU_HAS_FLAG(data->plat_data, IFA_IOMMU_PCIE_SUPPORT)) {
1254+#ifdef CONFIG_PCI
1255+ if (!iommu_present(&pci_bus_type)) {
1256+ ret = bus_set_iommu(&pci_bus_type, &mtk_iommu_ops);
1257+ if (ret) /* PCIe fail don't affect platform_bus. */
1258+ goto out_list_del;
1259+ }
1260+#endif
1261+ }
9321262 return ret;
9331263
9341264 out_bus_set_null:
@@ -939,7 +1269,8 @@ out_list_del: · 4 unmodified lines
9391269 out_sysfs_remove:
9401270 iommu_device_sysfs_remove(&data->iommu);
9411271 out_link_remove:
942− device_link_remove(data->smicomm_dev, dev);
1272+ if (MTK_IOMMU_IS_TYPE(data->plat_data, MTK_IOMMU_TYPE_MM))
1273+ device_link_remove(data->smicomm_dev, dev);
9431274 out_runtime_disable:
9441275 pm_runtime_disable(dev);
9451276 return ret;
@@ -948,18 +1279,30 @@ out_runtime_disable: · 2 unmodified lines
9481279 static int mtk_iommu_remove(struct platform_device *pdev)
9491280 {
9501281 struct mtk_iommu_data *data = platform_get_drvdata(pdev);
1282+ struct mtk_iommu_bank_data *bank;
1283+ int i;
9511284
9521285 iommu_device_sysfs_remove(&data->iommu);
9531286 iommu_device_unregister(&data->iommu);
9541287
955− if (iommu_present(&platform_bus_type))
956− bus_set_iommu(&platform_bus_type, NULL);
1288+ list_del(&data->list);
9571289
958− clk_disable_unprepare(data->bclk);
959− device_link_remove(data->smicomm_dev, &pdev->dev);
1290+ if (MTK_IOMMU_IS_TYPE(data->plat_data, MTK_IOMMU_TYPE_MM)) {
1291+ device_link_remove(data->smicomm_dev, &pdev->dev);
1292+ component_master_del(&pdev->dev, &mtk_iommu_com_ops);
1293+ } else if (MTK_IOMMU_IS_TYPE(data->plat_data, MTK_IOMMU_TYPE_INFRA) &&
1294+ MTK_IOMMU_HAS_FLAG(data->plat_data, IFA_IOMMU_PCIE_SUPPORT)) {
1295+#ifdef CONFIG_PCI
1296+ bus_set_iommu(&pci_bus_type, NULL);
1297+#endif
1298+ }
9601299 pm_runtime_disable(&pdev->dev);
961− devm_free_irq(&pdev->dev, data->irq, data);
962− component_master_del(&pdev->dev, &mtk_iommu_com_ops);
1300+ for (i = 0; i < data->plat_data->banks_num; i++) {
1301+ bank = &data->bank[i];
1302+ if (!bank->m4u_dom)
1303+ continue;
1304+ devm_free_irq(&pdev->dev, bank->irq, bank);
1305+ }
9631306 return 0;
9641307 }
9651308
@@ -967,16 +1310,23 @@ static int __maybe_unused mtk_iommu_runtime_suspend(struct device *dev) · 1 unmodified line
9671310 {
9681311 struct mtk_iommu_data *data = dev_get_drvdata(dev);
9691312 struct mtk_iommu_suspend_reg *reg = &data->reg;
970− void __iomem *base = data->base;
1313+ void __iomem *base;
1314+ int i = 0;
9711315
1316+ base = data->bank[i].base;
9721317 reg->wr_len_ctrl = readl_relaxed(base + REG_MMU_WR_LEN_CTRL);
9731318 reg->misc_ctrl = readl_relaxed(base + REG_MMU_MISC_CTRL);
9741319 reg->dcm_dis = readl_relaxed(base + REG_MMU_DCM_DIS);
9751320 reg->ctrl_reg = readl_relaxed(base + REG_MMU_CTRL_REG);
976− reg->int_control0 = readl_relaxed(base + REG_MMU_INT_CONTROL0);
977− reg->int_main_control = readl_relaxed(base + REG_MMU_INT_MAIN_CONTROL);
978− reg->ivrp_paddr = readl_relaxed(base + REG_MMU_IVRP_PADDR);
9791321 reg->vld_pa_rng = readl_relaxed(base + REG_MMU_VLD_PA_RNG);
1322+ do {
1323+ if (!data->plat_data->banks_enable[i])
1324+ continue;
1325+ base = data->bank[i].base;
1326+ reg->int_control[i] = readl_relaxed(base + REG_MMU_INT_CONTROL0);
1327+ reg->int_main_control[i] = readl_relaxed(base + REG_MMU_INT_MAIN_CONTROL);
1328+ reg->ivrp_paddr[i] = readl_relaxed(base + REG_MMU_IVRP_PADDR);
1329+ } while (++i < data->plat_data->banks_num);
9801330 clk_disable_unprepare(data->bclk);
9811331 return 0;
9821332 }
@@ -985,9 +1335,9 @@ static int __maybe_unused mtk_iommu_runtime_resume(struct device *dev) · 2 unmodified lines
9851335 {
9861336 struct mtk_iommu_data *data = dev_get_drvdata(dev);
9871337 struct mtk_iommu_suspend_reg *reg = &data->reg;
988− struct mtk_iommu_domain *m4u_dom = data->m4u_dom;
989− void __iomem *base = data->base;
990− int ret;
1338+ struct mtk_iommu_domain *m4u_dom;
1339+ void __iomem *base;
1340+ int ret, i = 0;
9911341
9921342 ret = clk_prepare_enable(data->bclk);
9931343 if (ret) {
@@ -999,18 +1349,26 @@ static int __maybe_unused mtk_iommu_runtime_resume(struct device *dev) · 5 unmodified lines
9991349 * Uppon first resume, only enable the clk and return, since the values of the
10001350 * registers are not yet set.
10011351 */
1002− if (!m4u_dom)
1352+ if (!reg->wr_len_ctrl)
10031353 return 0;
10041354
1355+ base = data->bank[i].base;
10051356 writel_relaxed(reg->wr_len_ctrl, base + REG_MMU_WR_LEN_CTRL);
10061357 writel_relaxed(reg->misc_ctrl, base + REG_MMU_MISC_CTRL);
10071358 writel_relaxed(reg->dcm_dis, base + REG_MMU_DCM_DIS);
10081359 writel_relaxed(reg->ctrl_reg, base + REG_MMU_CTRL_REG);
1009− writel_relaxed(reg->int_control0, base + REG_MMU_INT_CONTROL0);
1010− writel_relaxed(reg->int_main_control, base + REG_MMU_INT_MAIN_CONTROL);
1011− writel_relaxed(reg->ivrp_paddr, base + REG_MMU_IVRP_PADDR);
10121360 writel_relaxed(reg->vld_pa_rng, base + REG_MMU_VLD_PA_RNG);
1013− writel(m4u_dom->cfg.arm_v7s_cfg.ttbr & MMU_PT_ADDR_MASK, base + REG_MMU_PT_BASE_ADDR);
1361+ do {
1362+ m4u_dom = data->bank[i].m4u_dom;
1363+ if (!data->plat_data->banks_enable[i] || !m4u_dom)
1364+ continue;
1365+ base = data->bank[i].base;
1366+ writel_relaxed(reg->int_control[i], base + REG_MMU_INT_CONTROL0);
1367+ writel_relaxed(reg->int_main_control[i], base + REG_MMU_INT_MAIN_CONTROL);
1368+ writel_relaxed(reg->ivrp_paddr[i], base + REG_MMU_IVRP_PADDR);
1369+ writel(m4u_dom->cfg.arm_v7s_cfg.ttbr & MMU_PT_ADDR_MASK,
1370+ base + REG_MMU_PT_BASE_ADDR);
1371+ } while (++i < data->plat_data->banks_num);
10141372
10151373 /*
10161374 * Users may allocate dma buffer before they call pm_runtime_get,
@@ -1029,17 +1387,24 @@ static const struct dev_pm_ops mtk_iommu_pm_ops = { · 12 unmodified lines
10291387
10301388 static const struct mtk_iommu_plat_data mt2712_data = {
10311389 .m4u_plat = M4U_MT2712,
1032− .flags = HAS_4GB_MODE | HAS_BCLK | HAS_VLD_PA_RNG,
1390+ .flags = HAS_4GB_MODE | HAS_BCLK | HAS_VLD_PA_RNG | SHARE_PGTABLE |
1391+ MTK_IOMMU_TYPE_MM,
1392+ .hw_list = &m4ulist,
10331393 .inv_sel_reg = REG_MMU_INV_SEL_GEN1,
10341394 .iova_region = single_domain,
1395+ .banks_num = 1,
1396+ .banks_enable = {true},
10351397 .iova_region_nr = ARRAY_SIZE(single_domain),
10361398 .larbid_remap = {{0}, {1}, {2}, {3}, {4}, {5}, {6}, {7}},
10371399 };
10381400
10391401 static const struct mtk_iommu_plat_data mt6779_data = {
10401402 .m4u_plat = M4U_MT6779,
1041− .flags = HAS_SUB_COMM | OUT_ORDER_WR_EN | WR_THROT_EN,
1403+ .flags = HAS_SUB_COMM_2BITS | OUT_ORDER_WR_EN | WR_THROT_EN |
1404+ MTK_IOMMU_TYPE_MM,
10421405 .inv_sel_reg = REG_MMU_INV_SEL_GEN2,
1406+ .banks_num = 1,
1407+ .banks_enable = {true},
10431408 .iova_region = single_domain,
10441409 .iova_region_nr = ARRAY_SIZE(single_domain),
10451410 .larbid_remap = {{0}, {1}, {2}, {3}, {5}, {7, 8}, {10}, {9}},
@@ -1047,8 +1412,10 @@ static const struct mtk_iommu_plat_data mt6779_data = { · 1 unmodified line
10471412
10481413 static const struct mtk_iommu_plat_data mt8167_data = {
10491414 .m4u_plat = M4U_MT8167,
1050− .flags = RESET_AXI | HAS_LEGACY_IVRP_PADDR,
1415+ .flags = RESET_AXI | HAS_LEGACY_IVRP_PADDR | MTK_IOMMU_TYPE_MM,
10511416 .inv_sel_reg = REG_MMU_INV_SEL_GEN1,
1417+ .banks_num = 1,
1418+ .banks_enable = {true},
10521419 .iova_region = single_domain,
10531420 .iova_region_nr = ARRAY_SIZE(single_domain),
10541421 .larbid_remap = {{0}, {1}, {2}}, /* Linear mapping. */
@@ -1057,8 +1424,10 @@ static const struct mtk_iommu_plat_data mt8167_data = { · 2 unmodified lines
10571424 static const struct mtk_iommu_plat_data mt8173_data = {
10581425 .m4u_plat = M4U_MT8173,
10591426 .flags = HAS_4GB_MODE | HAS_BCLK | RESET_AXI |
1060− HAS_LEGACY_IVRP_PADDR,
1427+ HAS_LEGACY_IVRP_PADDR | MTK_IOMMU_TYPE_MM,
10611428 .inv_sel_reg = REG_MMU_INV_SEL_GEN1,
1429+ .banks_num = 1,
1430+ .banks_enable = {true},
10621431 .iova_region = single_domain,
10631432 .iova_region_nr = ARRAY_SIZE(single_domain),
10641433 .larbid_remap = {{0}, {1}, {2}, {3}, {4}, {5}}, /* Linear mapping. */
@@ -1066,31 +1435,100 @@ static const struct mtk_iommu_plat_data mt8173_data = { · 1 unmodified line
10661435
10671436 static const struct mtk_iommu_plat_data mt8183_data = {
10681437 .m4u_plat = M4U_MT8183,
1069− .flags = RESET_AXI,
1438+ .flags = RESET_AXI | MTK_IOMMU_TYPE_MM,
10701439 .inv_sel_reg = REG_MMU_INV_SEL_GEN1,
1440+ .banks_num = 1,
1441+ .banks_enable = {true},
10711442 .iova_region = single_domain,
10721443 .iova_region_nr = ARRAY_SIZE(single_domain),
10731444 .larbid_remap = {{0}, {4}, {5}, {6}, {7}, {2}, {3}, {1}},
10741445 };
10751446
1447+static const struct mtk_iommu_plat_data mt8186_data_mm = {
1448+ .m4u_plat = M4U_MT8186,
1449+ .flags = HAS_BCLK | HAS_SUB_COMM_2BITS | OUT_ORDER_WR_EN |
1450+ WR_THROT_EN | IOVA_34_EN | MTK_IOMMU_TYPE_MM,
1451+ .larbid_remap = {{0}, {1, MTK_INVALID_LARBID, 8}, {4}, {7}, {2}, {9, 11, 19, 20},
1452+ {MTK_INVALID_LARBID, 14, 16},
1453+ {MTK_INVALID_LARBID, 13, MTK_INVALID_LARBID, 17}},
1454+ .inv_sel_reg = REG_MMU_INV_SEL_GEN2,
1455+ .banks_num = 1,
1456+ .banks_enable = {true},
1457+ .iova_region = mt8192_multi_dom,
1458+ .iova_region_nr = ARRAY_SIZE(mt8192_multi_dom),
1459+};
1460+
10761461 static const struct mtk_iommu_plat_data mt8192_data = {
10771462 .m4u_plat = M4U_MT8192,
1078− .flags = HAS_BCLK | HAS_SUB_COMM | OUT_ORDER_WR_EN |
1079− WR_THROT_EN | IOVA_34_EN,
1463+ .flags = HAS_BCLK | HAS_SUB_COMM_2BITS | OUT_ORDER_WR_EN |
1464+ WR_THROT_EN | IOVA_34_EN | MTK_IOMMU_TYPE_MM,
10801465 .inv_sel_reg = REG_MMU_INV_SEL_GEN2,
1466+ .banks_num = 1,
1467+ .banks_enable = {true},
10811468 .iova_region = mt8192_multi_dom,
10821469 .iova_region_nr = ARRAY_SIZE(mt8192_multi_dom),
10831470 .larbid_remap = {{0}, {1}, {4, 5}, {7}, {2}, {9, 11, 19, 20},
10841471 {0, 14, 16}, {0, 13, 18, 17}},
10851472 };
10861473
1474+static const struct mtk_iommu_plat_data mt8195_data_infra = {
1475+ .m4u_plat = M4U_MT8195,
1476+ .flags = WR_THROT_EN | DCM_DISABLE | STD_AXI_MODE | PM_CLK_AO |
1477+ MTK_IOMMU_TYPE_INFRA | IFA_IOMMU_PCIE_SUPPORT,
1478+ .pericfg_comp_str = "mediatek,mt8195-pericfg_ao",
1479+ .inv_sel_reg = REG_MMU_INV_SEL_GEN2,
1480+ .banks_num = 5,
1481+ .banks_enable = {true, false, false, false, true},
1482+ .banks_portmsk = {[0] = GENMASK(19, 16), /* PCIe */
1483+ [4] = GENMASK(31, 20), /* USB */
1484+ },
1485+ .iova_region = single_domain,
1486+ .iova_region_nr = ARRAY_SIZE(single_domain),
1487+};
1488+
1489+static const struct mtk_iommu_plat_data mt8195_data_vdo = {
1490+ .m4u_plat = M4U_MT8195,
1491+ .flags = HAS_BCLK | HAS_SUB_COMM_2BITS | OUT_ORDER_WR_EN |
1492+ WR_THROT_EN | IOVA_34_EN | SHARE_PGTABLE | MTK_IOMMU_TYPE_MM,
1493+ .hw_list = &m4ulist,
1494+ .inv_sel_reg = REG_MMU_INV_SEL_GEN2,
1495+ .banks_num = 1,
1496+ .banks_enable = {true},
1497+ .iova_region = mt8192_multi_dom,
1498+ .iova_region_nr = ARRAY_SIZE(mt8192_multi_dom),
1499+ .larbid_remap = {{2, 0}, {21}, {24}, {7}, {19}, {9, 10, 11},
1500+ {13, 17, 15/* 17b */, 25}, {5}},
1501+};
1502+
1503+static const struct mtk_iommu_plat_data mt8195_data_vpp = {
1504+ .m4u_plat = M4U_MT8195,
1505+ .flags = HAS_BCLK | HAS_SUB_COMM_3BITS | OUT_ORDER_WR_EN |
1506+ WR_THROT_EN | IOVA_34_EN | SHARE_PGTABLE | MTK_IOMMU_TYPE_MM,
1507+ .hw_list = &m4ulist,
1508+ .inv_sel_reg = REG_MMU_INV_SEL_GEN2,
1509+ .banks_num = 1,
1510+ .banks_enable = {true},
1511+ .iova_region = mt8192_multi_dom,
1512+ .iova_region_nr = ARRAY_SIZE(mt8192_multi_dom),
1513+ .larbid_remap = {{1}, {3},
1514+ {22, MTK_INVALID_LARBID, MTK_INVALID_LARBID, MTK_INVALID_LARBID, 23},
1515+ {8}, {20}, {12},
1516+ /* 16: 16a; 29: 16b; 30: CCUtop0; 31: CCUtop1 */
1517+ {14, 16, 29, 26, 30, 31, 18},
1518+ {4, MTK_INVALID_LARBID, MTK_INVALID_LARBID, MTK_INVALID_LARBID, 6}},
1519+};
1520+
10871521 static const struct of_device_id mtk_iommu_of_ids[] = {
10881522 { .compatible = "mediatek,mt2712-m4u", .data = &mt2712_data},
10891523 { .compatible = "mediatek,mt6779-m4u", .data = &mt6779_data},
10901524 { .compatible = "mediatek,mt8167-m4u", .data = &mt8167_data},
10911525 { .compatible = "mediatek,mt8173-m4u", .data = &mt8173_data},
10921526 { .compatible = "mediatek,mt8183-m4u", .data = &mt8183_data},
1527+ { .compatible = "mediatek,mt8186-iommu-mm", .data = &mt8186_data_mm}, /* mm: m4u */
10931528 { .compatible = "mediatek,mt8192-m4u", .data = &mt8192_data},
1529+ { .compatible = "mediatek,mt8195-iommu-infra", .data = &mt8195_data_infra},
1530+ { .compatible = "mediatek,mt8195-iommu-vdo", .data = &mt8195_data_vdo},
1531+ { .compatible = "mediatek,mt8195-iommu-vpp", .data = &mt8195_data_vpp},
10941532 {}
10951533 };
10961534
drivers/iommu/mtk_iommu.h+0−101
@@ -1,101 +0,0 @@
1−/* SPDX-License-Identifier: GPL-2.0-only */
2−/*
3− * Copyright (c) 2015-2016 MediaTek Inc.
4− * Author: Honghui Zhang <honghui.zhang@mediatek.com>
5− */
6−
7−#ifndef _MTK_IOMMU_H_
8−#define _MTK_IOMMU_H_
9−
10−#include <linux/clk.h>
11−#include <linux/component.h>
12−#include <linux/device.h>
13−#include <linux/io.h>
14−#include <linux/io-pgtable.h>
15−#include <linux/iommu.h>
16−#include <linux/list.h>
17−#include <linux/spinlock.h>
18−#include <linux/dma-mapping.h>
19−#include <soc/mediatek/smi.h>
20−#include <dt-bindings/memory/mtk-memory-port.h>
21−
22−#define MTK_LARB_COM_MAX 8
23−#define MTK_LARB_SUBCOM_MAX 4
24−
25−#define MTK_IOMMU_GROUP_MAX 8
26−
27−struct mtk_iommu_suspend_reg {
28− union {
29− u32 standard_axi_mode;/* v1 */
30− u32 misc_ctrl;/* v2 */
31− };
32− u32 dcm_dis;
33− u32 ctrl_reg;
34− u32 int_control0;
35− u32 int_main_control;
36− u32 ivrp_paddr;
37− u32 vld_pa_rng;
38− u32 wr_len_ctrl;
39−};
40−
41−enum mtk_iommu_plat {
42− M4U_MT2701,
43− M4U_MT2712,
44− M4U_MT6779,
45− M4U_MT8167,
46− M4U_MT8173,
47− M4U_MT8183,
48− M4U_MT8192,
49−};
50−
51−struct mtk_iommu_iova_region;
52−
53−struct mtk_iommu_plat_data {
54− enum mtk_iommu_plat m4u_plat;
55− u32 flags;
56− u32 inv_sel_reg;
57−
58− unsigned int iova_region_nr;
59− const struct mtk_iommu_iova_region *iova_region;
60− unsigned char larbid_remap[MTK_LARB_COM_MAX][MTK_LARB_SUBCOM_MAX];
61−};
62−
63−struct mtk_iommu_domain;
64−
65−struct mtk_iommu_data {
66− void __iomem *base;
67− int irq;
68− struct device *dev;
69− struct clk *bclk;
70− phys_addr_t protect_base; /* protect memory base */
71− struct mtk_iommu_suspend_reg reg;
72− struct mtk_iommu_domain *m4u_dom;
73− struct iommu_group *m4u_group[MTK_IOMMU_GROUP_MAX];
74− bool enable_4GB;
75− spinlock_t tlb_lock; /* lock for tlb range flush */
76−
77− struct iommu_device iommu;
78− const struct mtk_iommu_plat_data *plat_data;
79− struct device *smicomm_dev;
80−
81− struct dma_iommu_mapping *mapping; /* For mtk_iommu_v1.c */
82−
83− struct list_head list;
84− struct mtk_smi_larb_iommu larb_imu[MTK_LARB_NR_MAX];
85−};
86−
87−static inline int mtk_iommu_bind(struct device *dev)
88−{
89− struct mtk_iommu_data *data = dev_get_drvdata(dev);
90−
91− return component_bind_all(dev, &data->larb_imu);
92−}
93−
94−static inline void mtk_iommu_unbind(struct device *dev)
95−{
96− struct mtk_iommu_data *data = dev_get_drvdata(dev);
97−
98− component_unbind_all(dev, &data->larb_imu);
99−}
100−
101−#endif
drivers/iommu/mtk_iommu_v1.c+139−103
@@ -7,7 +7,6 @@ · 6 unmodified lines
77 *
88 * Based on driver/iommu/mtk_iommu.c
99 */
10−#include <linux/memblock.h>
1110 #include <linux/bug.h>
1211 #include <linux/clk.h>
1312 #include <linux/component.h>
@@ -28,10 +27,9 @@ · 14 unmodified lines
2827 #include <linux/spinlock.h>
2928 #include <asm/barrier.h>
3029 #include <asm/dma-iommu.h>
31−#include <linux/init.h>
30+#include <dt-bindings/memory/mtk-memory-port.h>
3231 #include <dt-bindings/memory/mt2701-larb-port.h>
3332 #include <soc/mediatek/smi.h>
34−#include "mtk_iommu.h"
3533
3634 #define REG_MMU_PT_BASE_ADDR 0x000
3735
@@ -80,6 +78,7 @@ · 42 unmodified lines
8078 /* MTK generation one iommu HW only support 4K size mapping */
8179 #define MT2701_IOMMU_PAGE_SHIFT 12
8280 #define MT2701_IOMMU_PAGE_SIZE (1UL << MT2701_IOMMU_PAGE_SHIFT)
81+#define MT2701_LARB_NR_MAX 3
8382
8483 /*
8584 * MTK m4u support 4GB iova address space, and only support 4K page
@@ -87,17 +86,53 @@ · 1 unmodified line
8786 */
8887 #define M2701_IOMMU_PGT_SIZE SZ_4M
8988
90−struct mtk_iommu_domain {
89+struct mtk_iommu_v1_suspend_reg {
90+ u32 standard_axi_mode;
91+ u32 dcm_dis;
92+ u32 ctrl_reg;
93+ u32 int_control0;
94+};
95+
96+struct mtk_iommu_v1_data {
97+ void __iomem *base;
98+ int irq;
99+ struct device *dev;
100+ struct clk *bclk;
101+ phys_addr_t protect_base; /* protect memory base */
102+ struct mtk_iommu_v1_domain *m4u_dom;
103+
104+ struct iommu_device iommu;
105+ struct dma_iommu_mapping *mapping;
106+ struct mtk_smi_larb_iommu larb_imu[MTK_LARB_NR_MAX];
107+
108+ struct mtk_iommu_v1_suspend_reg reg;
109+};
110+
111+struct mtk_iommu_v1_domain {
91112 spinlock_t pgtlock; /* lock for page table */
92113 struct iommu_domain domain;
93114 u32 *pgt_va;
94115 dma_addr_t pgt_pa;
95− struct mtk_iommu_data *data;
116+ struct mtk_iommu_v1_data *data;
96117 };
97118
98−static struct mtk_iommu_domain *to_mtk_domain(struct iommu_domain *dom)
119+static int mtk_iommu_v1_bind(struct device *dev)
120+{
121+ struct mtk_iommu_v1_data *data = dev_get_drvdata(dev);
122+
123+ return component_bind_all(dev, &data->larb_imu);
124+}
125+
126+static void mtk_iommu_v1_unbind(struct device *dev)
127+{
128+ struct mtk_iommu_v1_data *data = dev_get_drvdata(dev);
129+
130+ component_unbind_all(dev, &data->larb_imu);
131+}
132+
133+static struct mtk_iommu_v1_domain *to_mtk_domain(struct iommu_domain *dom)
99134 {
100− return container_of(dom, struct mtk_iommu_domain, domain);
135+ return container_of(dom, struct mtk_iommu_v1_domain, domain);
101136 }
102137
103138 static const int mt2701_m4u_in_larb[] = {
@@ -123,7 +158,7 @@ static inline int mt2701_m4u_to_port(int id) · 19 unmodified lines
123158 return id - mt2701_m4u_in_larb[larb];
124159 }
125160
126−static void mtk_iommu_tlb_flush_all(struct mtk_iommu_data *data)
161+static void mtk_iommu_v1_tlb_flush_all(struct mtk_iommu_v1_data *data)
127162 {
128163 writel_relaxed(F_INVLD_EN1 | F_INVLD_EN0,
129164 data->base + REG_MMU_INV_SEL);
@@ -131,8 +166,8 @@ static void mtk_iommu_tlb_flush_all(struct mtk_iommu_data *data) · 1 unmodified line
131166 wmb(); /* Make sure the tlb flush all done */
132167 }
133168
134−static void mtk_iommu_tlb_flush_range(struct mtk_iommu_data *data,
135− unsigned long iova, size_t size)
169+static void mtk_iommu_v1_tlb_flush_range(struct mtk_iommu_v1_data *data,
170+ unsigned long iova, size_t size)
136171 {
137172 int ret;
138173 u32 tmp;
@@ -150,16 +185,16 @@ static void mtk_iommu_tlb_flush_range(struct mtk_iommu_data *data, · 11 unmodified lines
150185 if (ret) {
151186 dev_warn(data->dev,
152187 "Partial TLB flush timed out, falling back to full flush\n");
153− mtk_iommu_tlb_flush_all(data);
188+ mtk_iommu_v1_tlb_flush_all(data);
154189 }
155190 /* Clear the CPE status */
156191 writel_relaxed(0, data->base + REG_MMU_CPE_DONE);
157192 }
158193
159−static irqreturn_t mtk_iommu_isr(int irq, void *dev_id)
194+static irqreturn_t mtk_iommu_v1_isr(int irq, void *dev_id)
160195 {
161− struct mtk_iommu_data *data = dev_id;
162− struct mtk_iommu_domain *dom = data->m4u_dom;
196+ struct mtk_iommu_v1_data *data = dev_id;
197+ struct mtk_iommu_v1_domain *dom = data->m4u_dom;
163198 u32 int_state, regval, fault_iova, fault_pa;
164199 unsigned int fault_larb, fault_port;
165200
@@ -189,13 +224,13 @@ static irqreturn_t mtk_iommu_isr(int irq, void *dev_id) · 23 unmodified lines
189224 regval |= F_INT_CLR_BIT;
190225 writel_relaxed(regval, data->base + REG_MMU_INT_CONTROL);
191226
192− mtk_iommu_tlb_flush_all(data);
227+ mtk_iommu_v1_tlb_flush_all(data);
193228
194229 return IRQ_HANDLED;
195230 }
196231
197−static void mtk_iommu_config(struct mtk_iommu_data *data,
198− struct device *dev, bool enable)
232+static void mtk_iommu_v1_config(struct mtk_iommu_v1_data *data,
233+ struct device *dev, bool enable)
199234 {
200235 struct mtk_smi_larb_iommu *larb_mmu;
201236 unsigned int larbid, portid;
@@ -217,9 +252,9 @@ static void mtk_iommu_config(struct mtk_iommu_data *data, · 15 unmodified lines
217252 }
218253 }
219254
220−static int mtk_iommu_domain_finalise(struct mtk_iommu_data *data)
255+static int mtk_iommu_v1_domain_finalise(struct mtk_iommu_v1_data *data)
221256 {
222− struct mtk_iommu_domain *dom = data->m4u_dom;
257+ struct mtk_iommu_v1_domain *dom = data->m4u_dom;
223258
224259 spin_lock_init(&dom->pgtlock);
225260
@@ -235,9 +270,9 @@ static int mtk_iommu_domain_finalise(struct mtk_iommu_data *data) · 9 unmodified lines
235270 return 0;
236271 }
237272
238−static struct iommu_domain *mtk_iommu_domain_alloc(unsigned type)
273+static struct iommu_domain *mtk_iommu_v1_domain_alloc(unsigned type)
239274 {
240− struct mtk_iommu_domain *dom;
275+ struct mtk_iommu_v1_domain *dom;
241276
242277 if (type != IOMMU_DOMAIN_UNMANAGED)
243278 return NULL;
@@ -249,21 +284,20 @@ static struct iommu_domain *mtk_iommu_domain_alloc(unsigned type) · 5 unmodified lines
249284 return &dom->domain;
250285 }
251286
252−static void mtk_iommu_domain_free(struct iommu_domain *domain)
287+static void mtk_iommu_v1_domain_free(struct iommu_domain *domain)
253288 {
254− struct mtk_iommu_domain *dom = to_mtk_domain(domain);
255− struct mtk_iommu_data *data = dom->data;
289+ struct mtk_iommu_v1_domain *dom = to_mtk_domain(domain);
290+ struct mtk_iommu_v1_data *data = dom->data;
256291
257292 dma_free_coherent(data->dev, M2701_IOMMU_PGT_SIZE,
258293 dom->pgt_va, dom->pgt_pa);
259294 kfree(to_mtk_domain(domain));
260295 }
261296
262−static int mtk_iommu_attach_device(struct iommu_domain *domain,
263− struct device *dev)
297+static int mtk_iommu_v1_attach_device(struct iommu_domain *domain, struct device *dev)
264298 {
265− struct mtk_iommu_data *data = dev_iommu_priv_get(dev);
266− struct mtk_iommu_domain *dom = to_mtk_domain(domain);
299+ struct mtk_iommu_v1_data *data = dev_iommu_priv_get(dev);
300+ struct mtk_iommu_v1_domain *dom = to_mtk_domain(domain);
267301 struct dma_iommu_mapping *mtk_mapping;
268302 int ret;
269303
@@ -274,29 +308,28 @@ static int mtk_iommu_attach_device(struct iommu_domain *domain, · 4 unmodified lines
274308
275309 if (!data->m4u_dom) {
276310 data->m4u_dom = dom;
277− ret = mtk_iommu_domain_finalise(data);
311+ ret = mtk_iommu_v1_domain_finalise(data);
278312 if (ret) {
279313 data->m4u_dom = NULL;
280314 return ret;
281315 }
282316 }
283317
284− mtk_iommu_config(data, dev, true);
318+ mtk_iommu_v1_config(data, dev, true);
285319 return 0;
286320 }
287321
288−static void mtk_iommu_detach_device(struct iommu_domain *domain,
289− struct device *dev)
322+static void mtk_iommu_v1_detach_device(struct iommu_domain *domain, struct device *dev)
290323 {
291− struct mtk_iommu_data *data = dev_iommu_priv_get(dev);
324+ struct mtk_iommu_v1_data *data = dev_iommu_priv_get(dev);
292325
293− mtk_iommu_config(data, dev, false);
326+ mtk_iommu_v1_config(data, dev, false);
294327 }
295328
296−static int mtk_iommu_map(struct iommu_domain *domain, unsigned long iova,
297− phys_addr_t paddr, size_t size, int prot, gfp_t gfp)
329+static int mtk_iommu_v1_map(struct iommu_domain *domain, unsigned long iova,
330+ phys_addr_t paddr, size_t size, int prot, gfp_t gfp)
298331 {
299− struct mtk_iommu_domain *dom = to_mtk_domain(domain);
332+ struct mtk_iommu_v1_domain *dom = to_mtk_domain(domain);
300333 unsigned int page_num = size >> MT2701_IOMMU_PAGE_SHIFT;
301334 unsigned long flags;
302335 unsigned int i;
@@ -317,16 +350,15 @@ static int mtk_iommu_map(struct iommu_domain *domain, unsigned long iova, · 14 unmodified lines
317350
318351 spin_unlock_irqrestore(&dom->pgtlock, flags);
319352
320− mtk_iommu_tlb_flush_range(dom->data, iova, size);
353+ mtk_iommu_v1_tlb_flush_range(dom->data, iova, size);
321354
322355 return map_size == size ? 0 : -EEXIST;
323356 }
324357
325−static size_t mtk_iommu_unmap(struct iommu_domain *domain,
326− unsigned long iova, size_t size,
327− struct iommu_iotlb_gather *gather)
358+static size_t mtk_iommu_v1_unmap(struct iommu_domain *domain, unsigned long iova,
359+ size_t size, struct iommu_iotlb_gather *gather)
328360 {
329− struct mtk_iommu_domain *dom = to_mtk_domain(domain);
361+ struct mtk_iommu_v1_domain *dom = to_mtk_domain(domain);
330362 unsigned long flags;
331363 u32 *pgt_base_iova = dom->pgt_va + (iova >> MT2701_IOMMU_PAGE_SHIFT);
332364 unsigned int page_num = size >> MT2701_IOMMU_PAGE_SHIFT;
@@ -335,15 +367,14 @@ static size_t mtk_iommu_unmap(struct iommu_domain *domain, · 2 unmodified lines
335367 memset(pgt_base_iova, 0, page_num * sizeof(u32));
336368 spin_unlock_irqrestore(&dom->pgtlock, flags);
337369
338− mtk_iommu_tlb_flush_range(dom->data, iova, size);
370+ mtk_iommu_v1_tlb_flush_range(dom->data, iova, size);
339371
340372 return size;
341373 }
342374
343−static phys_addr_t mtk_iommu_iova_to_phys(struct iommu_domain *domain,
344− dma_addr_t iova)
375+static phys_addr_t mtk_iommu_v1_iova_to_phys(struct iommu_domain *domain, dma_addr_t iova)
345376 {
346− struct mtk_iommu_domain *dom = to_mtk_domain(domain);
377+ struct mtk_iommu_v1_domain *dom = to_mtk_domain(domain);
347378 unsigned long flags;
348379 phys_addr_t pa;
349380
@@ -355,17 +386,16 @@ static phys_addr_t mtk_iommu_iova_to_phys(struct iommu_domain *domain, · 5 unmodified lines
355386 return pa;
356387 }
357388
358−static const struct iommu_ops mtk_iommu_ops;
389+static const struct iommu_ops mtk_iommu_v1_ops;
359390
360391 /*
361392 * MTK generation one iommu HW only support one iommu domain, and all the client
362393 * sharing the same iova address space.
363394 */
364−static int mtk_iommu_create_mapping(struct device *dev,
365− struct of_phandle_args *args)
395+static int mtk_iommu_v1_create_mapping(struct device *dev, struct of_phandle_args *args)
366396 {
367397 struct iommu_fwspec *fwspec = dev_iommu_fwspec_get(dev);
368− struct mtk_iommu_data *data;
398+ struct mtk_iommu_v1_data *data;
369399 struct platform_device *m4updev;
370400 struct dma_iommu_mapping *mtk_mapping;
371401 int ret;
@@ -377,11 +407,11 @@ static int mtk_iommu_create_mapping(struct device *dev, · 5 unmodified lines
377407 }
378408
379409 if (!fwspec) {
380− ret = iommu_fwspec_init(dev, &args->np->fwnode, &mtk_iommu_ops);
410+ ret = iommu_fwspec_init(dev, &args->np->fwnode, &mtk_iommu_v1_ops);
381411 if (ret)
382412 return ret;
383413 fwspec = dev_iommu_fwspec_get(dev);
384− } else if (dev_iommu_fwspec_get(dev)->ops != &mtk_iommu_ops) {
414+ } else if (dev_iommu_fwspec_get(dev)->ops != &mtk_iommu_v1_ops) {
385415 return -EINVAL;
386416 }
387417
@@ -413,16 +443,16 @@ static int mtk_iommu_create_mapping(struct device *dev, · 25 unmodified lines
413443 return 0;
414444 }
415445
416−static int mtk_iommu_def_domain_type(struct device *dev)
446+static int mtk_iommu_v1_def_domain_type(struct device *dev)
417447 {
418448 return IOMMU_DOMAIN_UNMANAGED;
419449 }
420450
421−static struct iommu_device *mtk_iommu_probe_device(struct device *dev)
451+static struct iommu_device *mtk_iommu_v1_probe_device(struct device *dev)
422452 {
423453 struct iommu_fwspec *fwspec = dev_iommu_fwspec_get(dev);
424454 struct of_phandle_args iommu_spec;
425− struct mtk_iommu_data *data;
455+ struct mtk_iommu_v1_data *data;
426456 int err, idx = 0, larbid, larbidx;
427457 struct device_link *link;
428458 struct device *larbdev;
@@ -440,7 +470,7 @@ static struct iommu_device *mtk_iommu_probe_device(struct device *dev) · 11 unmodified lines
440470 "#iommu-cells",
441471 idx, &iommu_spec)) {
442472
443− err = mtk_iommu_create_mapping(dev, &iommu_spec);
473+ err = mtk_iommu_v1_create_mapping(dev, &iommu_spec);
444474 of_node_put(iommu_spec.np);
445475 if (err)
446476 return ERR_PTR(err);
@@ -450,13 +480,16 @@ static struct iommu_device *mtk_iommu_probe_device(struct device *dev) · 3 unmodified lines
450480 idx++;
451481 }
452482
453− if (!fwspec || fwspec->ops != &mtk_iommu_ops)
483+ if (!fwspec || fwspec->ops != &mtk_iommu_v1_ops)
454484 return ERR_PTR(-ENODEV); /* Not a iommu client device */
455485
456486 data = dev_iommu_priv_get(dev);
457487
458488 /* Link the consumer device with the smi-larb device(supplier) */
459489 larbid = mt2701_m4u_to_larb(fwspec->ids[0]);
490+ if (larbid >= MT2701_LARB_NR_MAX)
491+ return ERR_PTR(-EINVAL);
492+
460493 for (idx = 1; idx < fwspec->num_ids; idx++) {
461494 larbidx = mt2701_m4u_to_larb(fwspec->ids[idx]);
462495 if (larbid != larbidx) {
@@ -467,6 +500,9 @@ static struct iommu_device *mtk_iommu_probe_device(struct device *dev) · 4 unmodified lines
467500 }
468501
469502 larbdev = data->larb_imu[larbid].dev;
503+ if (!larbdev)
504+ return ERR_PTR(-EINVAL);
505+
470506 link = device_link_add(dev, larbdev,
471507 DL_FLAG_PM_RUNTIME | DL_FLAG_STATELESS);
472508 if (!link)
@@ -475,10 +511,10 @@ static struct iommu_device *mtk_iommu_probe_device(struct device *dev) · 2 unmodified lines
475511 return &data->iommu;
476512 }
477513
478−static void mtk_iommu_probe_finalize(struct device *dev)
514+static void mtk_iommu_v1_probe_finalize(struct device *dev)
479515 {
480516 struct dma_iommu_mapping *mtk_mapping;
481− struct mtk_iommu_data *data;
517+ struct mtk_iommu_v1_data *data;
482518 int err;
483519
484520 data = dev_iommu_priv_get(dev);
@@ -489,14 +525,14 @@ static void mtk_iommu_probe_finalize(struct device *dev) · 4 unmodified lines
489525 dev_err(dev, "Can't create IOMMU mapping - DMA-OPS will not work\n");
490526 }
491527
492−static void mtk_iommu_release_device(struct device *dev)
528+static void mtk_iommu_v1_release_device(struct device *dev)
493529 {
494530 struct iommu_fwspec *fwspec = dev_iommu_fwspec_get(dev);
495− struct mtk_iommu_data *data;
531+ struct mtk_iommu_v1_data *data;
496532 struct device *larbdev;
497533 unsigned int larbid;
498534
499− if (!fwspec || fwspec->ops != &mtk_iommu_ops)
535+ if (!fwspec || fwspec->ops != &mtk_iommu_v1_ops)
500536 return;
501537
502538 data = dev_iommu_priv_get(dev);
@@ -507,7 +543,7 @@ static void mtk_iommu_release_device(struct device *dev) · 4 unmodified lines
507543 iommu_fwspec_free(dev);
508544 }
509545
510−static int mtk_iommu_hw_init(const struct mtk_iommu_data *data)
546+static int mtk_iommu_v1_hw_init(const struct mtk_iommu_v1_data *data)
511547 {
512548 u32 regval;
513549 int ret;
@@ -537,7 +573,7 @@ static int mtk_iommu_hw_init(const struct mtk_iommu_data *data) · 23 unmodified lines
537573
538574 writel_relaxed(F_MMU_DCM_ON, data->base + REG_MMU_DCM);
539575
540− if (devm_request_irq(data->dev, data->irq, mtk_iommu_isr, 0,
576+ if (devm_request_irq(data->dev, data->irq, mtk_iommu_v1_isr, 0,
541577 dev_name(data->dev), (void *)data)) {
542578 writel_relaxed(0, data->base + REG_MMU_PT_BASE_ADDR);
543579 clk_disable_unprepare(data->bclk);
@@ -548,39 +584,39 @@ static int mtk_iommu_hw_init(const struct mtk_iommu_data *data) · 4 unmodified lines
548584 return 0;
549585 }
550586
551−static const struct iommu_ops mtk_iommu_ops = {
552− .domain_alloc = mtk_iommu_domain_alloc,
553− .probe_device = mtk_iommu_probe_device,
554− .probe_finalize = mtk_iommu_probe_finalize,
555− .release_device = mtk_iommu_release_device,
556− .def_domain_type = mtk_iommu_def_domain_type,
587+static const struct iommu_ops mtk_iommu_v1_ops = {
588+ .domain_alloc = mtk_iommu_v1_domain_alloc,
589+ .probe_device = mtk_iommu_v1_probe_device,
590+ .probe_finalize = mtk_iommu_v1_probe_finalize,
591+ .release_device = mtk_iommu_v1_release_device,
592+ .def_domain_type = mtk_iommu_v1_def_domain_type,
557593 .device_group = generic_device_group,
558594 .pgsize_bitmap = ~0UL << MT2701_IOMMU_PAGE_SHIFT,
559595 .owner = THIS_MODULE,
560596 .default_domain_ops = &(const struct iommu_domain_ops) {
561− .attach_dev = mtk_iommu_attach_device,
562− .detach_dev = mtk_iommu_detach_device,
563− .map = mtk_iommu_map,
564− .unmap = mtk_iommu_unmap,
565− .iova_to_phys = mtk_iommu_iova_to_phys,
566− .free = mtk_iommu_domain_free,
597+ .attach_dev = mtk_iommu_v1_attach_device,
598+ .detach_dev = mtk_iommu_v1_detach_device,
599+ .map = mtk_iommu_v1_map,
600+ .unmap = mtk_iommu_v1_unmap,
601+ .iova_to_phys = mtk_iommu_v1_iova_to_phys,
602+ .free = mtk_iommu_v1_domain_free,
567603 }
568604 };
569605
570−static const struct of_device_id mtk_iommu_of_ids[] = {
606+static const struct of_device_id mtk_iommu_v1_of_ids[] = {
571607 { .compatible = "mediatek,mt2701-m4u", },
572608 {}
573609 };
574610
575−static const struct component_master_ops mtk_iommu_com_ops = {
576− .bind = mtk_iommu_bind,
577− .unbind = mtk_iommu_unbind,
611+static const struct component_master_ops mtk_iommu_v1_com_ops = {
612+ .bind = mtk_iommu_v1_bind,
613+ .unbind = mtk_iommu_v1_unbind,
578614 };
579615
580−static int mtk_iommu_probe(struct platform_device *pdev)
616+static int mtk_iommu_v1_probe(struct platform_device *pdev)
581617 {
582− struct mtk_iommu_data *data;
583618 struct device *dev = &pdev->dev;
619+ struct mtk_iommu_v1_data *data;
584620 struct resource *res;
585621 struct component_match *match = NULL;
586622 void *protect;
@@ -647,7 +683,7 @@ static int mtk_iommu_probe(struct platform_device *pdev) · 60 unmodified lines
647683
648684 platform_set_drvdata(pdev, data);
649685
650− ret = mtk_iommu_hw_init(data);
686+ ret = mtk_iommu_v1_hw_init(data);
651687 if (ret)
652688 return ret;
653689
@@ -656,17 +692,17 @@ static int mtk_iommu_probe(struct platform_device *pdev) · 2 unmodified lines
656692 if (ret)
657693 return ret;
658694
659− ret = iommu_device_register(&data->iommu, &mtk_iommu_ops, dev);
695+ ret = iommu_device_register(&data->iommu, &mtk_iommu_v1_ops, dev);
660696 if (ret)
661697 goto out_sysfs_remove;
662698
663699 if (!iommu_present(&platform_bus_type)) {
664− ret = bus_set_iommu(&platform_bus_type, &mtk_iommu_ops);
700+ ret = bus_set_iommu(&platform_bus_type, &mtk_iommu_v1_ops);
665701 if (ret)
666702 goto out_dev_unreg;
667703 }
668704
669− ret = component_master_add_with_match(dev, &mtk_iommu_com_ops, match);
705+ ret = component_master_add_with_match(dev, &mtk_iommu_v1_com_ops, match);
670706 if (ret)
671707 goto out_bus_set_null;
672708 return ret;
@@ -680,9 +716,9 @@ out_sysfs_remove: · 7 unmodified lines
680716 return ret;
681717 }
682718
683−static int mtk_iommu_remove(struct platform_device *pdev)
719+static int mtk_iommu_v1_remove(struct platform_device *pdev)
684720 {
685− struct mtk_iommu_data *data = platform_get_drvdata(pdev);
721+ struct mtk_iommu_v1_data *data = platform_get_drvdata(pdev);
686722
687723 iommu_device_sysfs_remove(&data->iommu);
688724 iommu_device_unregister(&data->iommu);
@@ -692,14 +728,14 @@ static int mtk_iommu_remove(struct platform_device *pdev) · 3 unmodified lines
692728
693729 clk_disable_unprepare(data->bclk);
694730 devm_free_irq(&pdev->dev, data->irq, data);
695− component_master_del(&pdev->dev, &mtk_iommu_com_ops);
731+ component_master_del(&pdev->dev, &mtk_iommu_v1_com_ops);
696732 return 0;
697733 }
698734
699−static int __maybe_unused mtk_iommu_suspend(struct device *dev)
735+static int __maybe_unused mtk_iommu_v1_suspend(struct device *dev)
700736 {
701− struct mtk_iommu_data *data = dev_get_drvdata(dev);
702− struct mtk_iommu_suspend_reg *reg = &data->reg;
737+ struct mtk_iommu_v1_data *data = dev_get_drvdata(dev);
738+ struct mtk_iommu_v1_suspend_reg *reg = &data->reg;
703739 void __iomem *base = data->base;
704740
705741 reg->standard_axi_mode = readl_relaxed(base +
@@ -710,10 +746,10 @@ static int __maybe_unused mtk_iommu_suspend(struct device *dev) · 4 unmodified lines
710746 return 0;
711747 }
712748
713−static int __maybe_unused mtk_iommu_resume(struct device *dev)
749+static int __maybe_unused mtk_iommu_v1_resume(struct device *dev)
714750 {
715− struct mtk_iommu_data *data = dev_get_drvdata(dev);
716− struct mtk_iommu_suspend_reg *reg = &data->reg;
751+ struct mtk_iommu_v1_data *data = dev_get_drvdata(dev);
752+ struct mtk_iommu_v1_suspend_reg *reg = &data->reg;
717753 void __iomem *base = data->base;
718754
719755 writel_relaxed(data->m4u_dom->pgt_pa, base + REG_MMU_PT_BASE_ADDR);
@@ -726,20 +762,20 @@ static int __maybe_unused mtk_iommu_resume(struct device *dev) · 6 unmodified lines
726762 return 0;
727763 }
728764
729−static const struct dev_pm_ops mtk_iommu_pm_ops = {
730− SET_SYSTEM_SLEEP_PM_OPS(mtk_iommu_suspend, mtk_iommu_resume)
765+static const struct dev_pm_ops mtk_iommu_v1_pm_ops = {
766+ SET_SYSTEM_SLEEP_PM_OPS(mtk_iommu_v1_suspend, mtk_iommu_v1_resume)
731767 };
732768
733−static struct platform_driver mtk_iommu_driver = {
734− .probe = mtk_iommu_probe,
735− .remove = mtk_iommu_remove,
769+static struct platform_driver mtk_iommu_v1_driver = {
770+ .probe = mtk_iommu_v1_probe,
771+ .remove = mtk_iommu_v1_remove,
736772 .driver = {
737773 .name = "mtk-iommu-v1",
738− .of_match_table = mtk_iommu_of_ids,
739− .pm = &mtk_iommu_pm_ops,
774+ .of_match_table = mtk_iommu_v1_of_ids,
775+ .pm = &mtk_iommu_v1_pm_ops,
740776 }
741777 };
742−module_platform_driver(mtk_iommu_driver);
778+module_platform_driver(mtk_iommu_v1_driver);
743779
744780 MODULE_DESCRIPTION("IOMMU API for MediaTek M4U v1 implementations");
745781 MODULE_LICENSE("GPL v2");
drivers/iommu/s390-iommu.c+12−3
@@ -99,7 +99,7 @@ static int s390_iommu_attach_device(struct iommu_domain *domain, · 98 unmodified lines
9999 if (!domain_device)
100100 return -ENOMEM;
101101
102− if (zdev->dma_table) {
102+ if (zdev->dma_table && !zdev->s390_domain) {
103103 cc = zpci_dma_exit_device(zdev);
104104 if (cc) {
105105 rc = -EIO;
@@ -107,6 +107,9 @@ static int s390_iommu_attach_device(struct iommu_domain *domain, · 1 unmodified line
107107 }
108108 }
109109
110+ if (zdev->s390_domain)
111+ zpci_unregister_ioat(zdev, 0);
112+
110113 zdev->dma_table = s390_domain->dma_table;
111114 cc = zpci_register_ioat(zdev, 0, zdev->start_dma, zdev->end_dma,
112115 virt_to_phys(zdev->dma_table));
@@ -136,7 +139,13 @@ static int s390_iommu_attach_device(struct iommu_domain *domain, · 23 unmodified lines
136139 return 0;
137140
138141 out_restore:
139− zpci_dma_init_device(zdev);
142+ if (!zdev->s390_domain) {
143+ zpci_dma_init_device(zdev);
144+ } else {
145+ zdev->dma_table = zdev->s390_domain->dma_table;
146+ zpci_register_ioat(zdev, 0, zdev->start_dma, zdev->end_dma,
147+ virt_to_phys(zdev->dma_table));
148+ }
140149 out_free:
141150 kfree(domain_device);
142151
@@ -167,7 +176,7 @@ static void s390_iommu_detach_device(struct iommu_domain *domain, · 24 unmodified lines
167176 }
168177 spin_unlock_irqrestore(&s390_domain->list_lock, flags);
169178
170− if (found) {
179+ if (found && (zdev->s390_domain == s390_domain)) {
171180 zdev->s390_domain = NULL;
172181 zpci_unregister_ioat(zdev, 0);
173182 zpci_dma_init_device(zdev);
drivers/memory/renesas-rpc-if.c+46−14
@@ -164,25 +164,39 @@ static const struct regmap_access_table rpcif_volatile_table = { · 163 unmodified lines
164164
165165
166166 /*
167− * Custom accessor functions to ensure SMRDR0 and SMWDR0 are always accessed
168− * with proper width. Requires SMENR_SPIDE to be correctly set before!
167+ * Custom accessor functions to ensure SM[RW]DR[01] are always accessed with
168+ * proper width. Requires rpcif.xfer_size to be correctly set before!
169169 */
170170 static int rpcif_reg_read(void *context, unsigned int reg, unsigned int *val)
171171 {
172172 struct rpcif *rpc = context;
173173
174− if (reg == RPCIF_SMRDR0 || reg == RPCIF_SMWDR0) {
175− u32 spide = readl(rpc->base + RPCIF_SMENR) & RPCIF_SMENR_SPIDE(0xF);
176−
177− if (spide == 0x8) {
174+ switch (reg) {
175+ case RPCIF_SMRDR0:
176+ case RPCIF_SMWDR0:
177+ switch (rpc->xfer_size) {
178+ case 1:
178179 *val = readb(rpc->base + reg);
179180 return 0;
180− } else if (spide == 0xC) {
181+
182+ case 2:
181183 *val = readw(rpc->base + reg);
182184 return 0;
183− } else if (spide != 0xF) {
185+
186+ case 4:
187+ case 8:
188+ *val = readl(rpc->base + reg);
189+ return 0;
190+
191+ default:
184192 return -EILSEQ;
185193 }
194+
195+ case RPCIF_SMRDR1:
196+ case RPCIF_SMWDR1:
197+ if (rpc->xfer_size != 8)
198+ return -EILSEQ;
199+ break;
186200 }
187201
188202 *val = readl(rpc->base + reg);
@@ -193,18 +207,34 @@ static int rpcif_reg_write(void *context, unsigned int reg, unsigned int val) · 4 unmodified lines
193207 {
194208 struct rpcif *rpc = context;
195209
196− if (reg == RPCIF_SMRDR0 || reg == RPCIF_SMWDR0) {
197− u32 spide = readl(rpc->base + RPCIF_SMENR) & RPCIF_SMENR_SPIDE(0xF);
198−
199− if (spide == 0x8) {
210+ switch (reg) {
211+ case RPCIF_SMWDR0:
212+ switch (rpc->xfer_size) {
213+ case 1:
200214 writeb(val, rpc->base + reg);
201215 return 0;
202− } else if (spide == 0xC) {
216+
217+ case 2:
203218 writew(val, rpc->base + reg);
204219 return 0;
205− } else if (spide != 0xF) {
220+
221+ case 4:
222+ case 8:
223+ writel(val, rpc->base + reg);
224+ return 0;
225+
226+ default:
206227 return -EILSEQ;
207228 }
229+
230+ case RPCIF_SMWDR1:
231+ if (rpc->xfer_size != 8)
232+ return -EILSEQ;
233+ break;
234+
235+ case RPCIF_SMRDR0:
236+ case RPCIF_SMRDR1:
237+ return -EPERM;
208238 }
209239
210240 writel(val, rpc->base + reg);
@@ -469,6 +499,7 @@ int rpcif_manual_xfer(struct rpcif *rpc) · 258 unmodified lines
469499
470500 smenr |= RPCIF_SMENR_SPIDE(rpcif_bits_set(rpc, nbytes));
471501 regmap_write(rpc->regmap, RPCIF_SMENR, smenr);
502+ rpc->xfer_size = nbytes;
472503
473504 memcpy(data, rpc->buffer + pos, nbytes);
474505 if (nbytes == 8) {
@@ -533,6 +564,7 @@ int rpcif_manual_xfer(struct rpcif *rpc) · 58 unmodified lines
533564 regmap_write(rpc->regmap, RPCIF_SMENR, smenr);
534565 regmap_write(rpc->regmap, RPCIF_SMCR,
535566 rpc->smcr | RPCIF_SMCR_SPIE);
567+ rpc->xfer_size = nbytes;
536568 ret = wait_msg_xfer_end(rpc);
537569 if (ret)
538570 goto err_out;
drivers/misc/eeprom/at25.c+11−8
@@ -31,6 +31,8 @@ · 30 unmodified lines
3131 */
3232
3333 #define FM25_SN_LEN 8 /* serial number length */
34+#define EE_MAXADDRLEN 3 /* 24 bit addresses, up to 2 MBytes */
35+
3436 struct at25_data {
3537 struct spi_eeprom chip;
3638 struct spi_device *spi;
@@ -39,6 +41,7 @@ struct at25_data { · 2 unmodified lines
3941 struct nvmem_config nvmem_config;
4042 struct nvmem_device *nvmem;
4143 u8 sernum[FM25_SN_LEN];
44+ u8 command[EE_MAXADDRLEN + 1];
4245 };
4346
4447 #define AT25_WREN 0x06 /* latch the write enable */
@@ -61,8 +64,6 @@ struct at25_data { · 16 unmodified lines
6164
6265 #define FM25_ID_LEN 9 /* ID length */
6366
64−#define EE_MAXADDRLEN 3 /* 24 bit addresses, up to 2 MBytes */
65−
6667 /*
6768 * Specs often allow 5ms for a page write, sometimes 20ms;
6869 * it's important to recover from write timeouts.
@@ -78,7 +79,6 @@ static int at25_ee_read(void *priv, unsigned int offset, · 9 unmodified lines
7879 {
7980 struct at25_data *at25 = priv;
8081 char *buf = val;
81− u8 command[EE_MAXADDRLEN + 1];
8282 u8 *cp;
8383 ssize_t status;
8484 struct spi_transfer t[2];
@@ -92,12 +92,15 @@ static int at25_ee_read(void *priv, unsigned int offset, · 7 unmodified lines
9292 if (unlikely(!count))
9393 return -EINVAL;
9494
95− cp = command;
95+ cp = at25->command;
9696
9797 instr = AT25_READ;
9898 if (at25->chip.flags & EE_INSTR_BIT3_IS_ADDR)
9999 if (offset >= BIT(at25->addrlen * 8))
100100 instr |= AT25_INSTR_BIT3;
101+
102+ mutex_lock(&at25->lock);
103+
101104 *cp++ = instr;
102105
103106 /* 8/16/24-bit address is written MSB first */
@@ -116,7 +119,7 @@ static int at25_ee_read(void *priv, unsigned int offset, · 12 unmodified lines
116119 spi_message_init(&m);
117120 memset(t, 0, sizeof(t));
118121
119− t[0].tx_buf = command;
122+ t[0].tx_buf = at25->command;
120123 t[0].len = at25->addrlen + 1;
121124 spi_message_add_tail(&t[0], &m);
122125
@@ -124,8 +127,6 @@ static int at25_ee_read(void *priv, unsigned int offset, · 1 unmodified line
124127 t[1].len = count;
125128 spi_message_add_tail(&t[1], &m);
126129
127− mutex_lock(&at25->lock);
128−
129130 /*
130131 * Read it all at once.
131132 *
@@ -152,7 +153,7 @@ static int fm25_aux_read(struct at25_data *at25, u8 *buf, uint8_t command, · 20 unmodified lines
152153 spi_message_init(&m);
153154 memset(t, 0, sizeof(t));
154155
155− t[0].tx_buf = &command;
156+ t[0].tx_buf = at25->command;
156157 t[0].len = 1;
157158 spi_message_add_tail(&t[0], &m);
158159
@@ -162,6 +163,8 @@ static int fm25_aux_read(struct at25_data *at25, u8 *buf, uint8_t command, · 3 unmodified lines
162163
163164 mutex_lock(&at25->lock);
164165
166+ at25->command[0] = command;
167+
165168 status = spi_sync(at25->spi, &m);
166169 dev_dbg(&at25->spi->dev, "read %d aux bytes --> %d\n", len, status);
167170
drivers/mmc/core/mmc.c+19−4
@@ -1384,13 +1384,17 @@ static int mmc_select_hs400es(struct mmc_card *card) · 1383 unmodified lines
13841384 goto out_err;
13851385 }
13861386
1387+ /*
1388+ * Bump to HS timing and frequency. Some cards don't handle
1389+ * SEND_STATUS reliably at the initial frequency.
1390+ */
13871391 mmc_set_timing(host, MMC_TIMING_MMC_HS);
1392+ mmc_set_bus_speed(card);
1393+
13881394 err = mmc_switch_status(card, true);
13891395 if (err)
13901396 goto out_err;
13911397
1392− mmc_set_clock(host, card->ext_csd.hs_max_dtr);
1393−
13941398 /* Switch card to DDR with strobe bit */
13951399 val = EXT_CSD_DDR_BUS_WIDTH_8 | EXT_CSD_BUS_WIDTH_STROBE;
13961400 err = mmc_switch(card, EXT_CSD_CMD_SET_NORMAL,
@@ -1448,7 +1452,7 @@ out_err: · 51 unmodified lines
14481452 static int mmc_select_hs200(struct mmc_card *card)
14491453 {
14501454 struct mmc_host *host = card->host;
1451− unsigned int old_timing, old_signal_voltage;
1455+ unsigned int old_timing, old_signal_voltage, old_clock;
14521456 int err = -EINVAL;
14531457 u8 val;
14541458
@@ -1479,8 +1483,17 @@ static int mmc_select_hs200(struct mmc_card *card) · 24 unmodified lines
14791483 false, true, MMC_CMD_RETRIES);
14801484 if (err)
14811485 goto err;
1486+
1487+ /*
1488+ * Bump to HS timing and frequency. Some cards don't handle
1489+ * SEND_STATUS reliably at the initial frequency.
1490+ * NB: We can't move to full (HS200) speeds until after we've
1491+ * successfully switched over.
1492+ */
14821493 old_timing = host->ios.timing;
1494+ old_clock = host->ios.clock;
14831495 mmc_set_timing(host, MMC_TIMING_MMC_HS200);
1496+ mmc_set_clock(card->host, card->ext_csd.hs_max_dtr);
14841497
14851498 /*
14861499 * For HS200, CRC errors are not a reliable way to know the
@@ -1493,8 +1506,10 @@ static int mmc_select_hs200(struct mmc_card *card) · 6 unmodified lines
14931506 * mmc_select_timing() assumes timing has not changed if
14941507 * it is a switch error.
14951508 */
1496− if (err == -EBADMSG)
1509+ if (err == -EBADMSG) {
1510+ mmc_set_clock(host, old_clock);
14971511 mmc_set_timing(host, old_timing);
1512+ }
14981513 }
14991514 err:
15001515 if (err) {
drivers/mmc/host/sdhci-msm.c+42−0
@@ -17,6 +17,7 @@ · 16 unmodified lines
1717 #include <linux/regulator/consumer.h>
1818 #include <linux/interconnect.h>
1919 #include <linux/pinctrl/consumer.h>
20+#include <linux/reset.h>
2021
2122 #include "sdhci-pltfm.h"
2223 #include "cqhci.h"
@@ -2482,6 +2483,43 @@ static inline void sdhci_msm_get_of_property(struct platform_device *pdev, · 2459 unmodified lines
24822483 of_property_read_u32(node, "qcom,dll-config", &msm_host->dll_config);
24832484 }
24842485
2486+static int sdhci_msm_gcc_reset(struct device *dev, struct sdhci_host *host)
2487+{
2488+ struct reset_control *reset;
2489+ int ret = 0;
2490+
2491+ reset = reset_control_get_optional_exclusive(dev, NULL);
2492+ if (IS_ERR(reset))
2493+ return dev_err_probe(dev, PTR_ERR(reset),
2494+ "unable to acquire core_reset\n");
2495+
2496+ if (!reset)
2497+ return ret;
2498+
2499+ ret = reset_control_assert(reset);
2500+ if (ret) {
2501+ reset_control_put(reset);
2502+ return dev_err_probe(dev, ret, "core_reset assert failed\n");
2503+ }
2504+
2505+ /*
2506+ * The hardware requirement for delay between assert/deassert
2507+ * is at least 3-4 sleep clock (32.7KHz) cycles, which comes to
2508+ * ~125us (4/32768). To be on the safe side add 200us delay.
2509+ */
2510+ usleep_range(200, 210);
2511+
2512+ ret = reset_control_deassert(reset);
2513+ if (ret) {
2514+ reset_control_put(reset);
2515+ return dev_err_probe(dev, ret, "core_reset deassert failed\n");
2516+ }
2517+
2518+ usleep_range(200, 210);
2519+ reset_control_put(reset);
2520+
2521+ return ret;
2522+}
24852523
24862524 static int sdhci_msm_probe(struct platform_device *pdev)
24872525 {
@@ -2529,6 +2567,10 @@ static int sdhci_msm_probe(struct platform_device *pdev) · 41 unmodified lines
25292567
25302568 msm_host->saved_tuning_phase = INVALID_TUNING_PHASE;
25312569
2570+ ret = sdhci_msm_gcc_reset(&pdev->dev, host);
2571+ if (ret)
2572+ goto pltfm_free;
2573+
25322574 /* Setup SDCC bus voter clock. */
25332575 msm_host->bus_clk = devm_clk_get(&pdev->dev, "bus");
25342576 if (!IS_ERR(msm_host->bus_clk)) {
drivers/mmc/host/sunxi-mmc.c+3−2
@@ -377,8 +377,9 @@ static void sunxi_mmc_init_idma_des(struct sunxi_mmc_host *host, · 376 unmodified lines
377377 pdes[i].buf_addr_ptr1 =
378378 cpu_to_le32(sg_dma_address(&data->sg[i]) >>
379379 host->cfg->idma_des_shift);
380− pdes[i].buf_addr_ptr2 = cpu_to_le32((u32)next_desc >>
381− host->cfg->idma_des_shift);
380+ pdes[i].buf_addr_ptr2 =
381+ cpu_to_le32(next_desc >>
382+ host->cfg->idma_des_shift);
382383 }
383384
384385 pdes[0].config |= cpu_to_le32(SDXC_IDMAC_DES0_FD);
drivers/mtd/nand/raw/mtk_ecc.c+8−4
@@ -43,6 +43,7 @@ · 42 unmodified lines
4343
4444 struct mtk_ecc_caps {
4545 u32 err_mask;
46+ u32 err_shift;
4647 const u8 *ecc_strength;
4748 const u32 *ecc_regs;
4849 u8 num_ecc_strength;
@@ -76,7 +77,7 @@ static const u8 ecc_strength_mt2712[] = { · 27 unmodified lines
7677 };
7778
7879 static const u8 ecc_strength_mt7622[] = {
79− 4, 6, 8, 10, 12, 14, 16
80+ 4, 6, 8, 10, 12
8081 };
8182
8283 enum mtk_ecc_regs {
@@ -221,7 +222,7 @@ void mtk_ecc_get_stats(struct mtk_ecc *ecc, struct mtk_ecc_stats *stats, · 138 unmodified lines
221222 for (i = 0; i < sectors; i++) {
222223 offset = (i >> 2) << 2;
223224 err = readl(ecc->regs + ECC_DECENUM0 + offset);
224− err = err >> ((i % 4) * 8);
225+ err = err >> ((i % 4) * ecc->caps->err_shift);
225226 err &= ecc->caps->err_mask;
226227 if (err == ecc->caps->err_mask) {
227228 /* uncorrectable errors */
@@ -449,6 +450,7 @@ EXPORT_SYMBOL(mtk_ecc_get_parity_bits); · 221 unmodified lines
449450
450451 static const struct mtk_ecc_caps mtk_ecc_caps_mt2701 = {
451452 .err_mask = 0x3f,
453+ .err_shift = 8,
452454 .ecc_strength = ecc_strength_mt2701,
453455 .ecc_regs = mt2701_ecc_regs,
454456 .num_ecc_strength = 20,
@@ -459,6 +461,7 @@ static const struct mtk_ecc_caps mtk_ecc_caps_mt2701 = { · 4 unmodified lines
459461
460462 static const struct mtk_ecc_caps mtk_ecc_caps_mt2712 = {
461463 .err_mask = 0x7f,
464+ .err_shift = 8,
462465 .ecc_strength = ecc_strength_mt2712,
463466 .ecc_regs = mt2712_ecc_regs,
464467 .num_ecc_strength = 23,
@@ -468,10 +471,11 @@ static const struct mtk_ecc_caps mtk_ecc_caps_mt2712 = { · 3 unmodified lines
468471 };
469472
470473 static const struct mtk_ecc_caps mtk_ecc_caps_mt7622 = {
471− .err_mask = 0x3f,
474+ .err_mask = 0x1f,
475+ .err_shift = 5,
472476 .ecc_strength = ecc_strength_mt7622,
473477 .ecc_regs = mt7622_ecc_regs,
474− .num_ecc_strength = 7,
478+ .num_ecc_strength = 5,
475479 .ecc_mode_shift = 4,
476480 .parity_bits = 13,
477481 .pg_irq_sel = 0,
drivers/mtd/nand/raw/qcom_nandc.c+13−11
@@ -2651,10 +2651,23 @@ static int qcom_nand_attach_chip(struct nand_chip *chip) · 2650 unmodified lines
26512651 ecc->engine_type = NAND_ECC_ENGINE_TYPE_ON_HOST;
26522652
26532653 mtd_set_ooblayout(mtd, &qcom_nand_ooblayout_ops);
2654+ /* Free the initially allocated BAM transaction for reading the ONFI params */
2655+ if (nandc->props->is_bam)
2656+ free_bam_transaction(nandc);
26542657
26552658 nandc->max_cwperpage = max_t(unsigned int, nandc->max_cwperpage,
26562659 cwperpage);
26572660
2661+ /* Now allocate the BAM transaction based on updated max_cwperpage */
2662+ if (nandc->props->is_bam) {
2663+ nandc->bam_txn = alloc_bam_transaction(nandc);
2664+ if (!nandc->bam_txn) {
2665+ dev_err(nandc->dev,
2666+ "failed to allocate bam transaction\n");
2667+ return -ENOMEM;
2668+ }
2669+ }
2670+
26582671 /*
26592672 * DATA_UD_BYTES varies based on whether the read/write command protects
26602673 * spare data with ECC too. We protect spare data by default, so we set
@@ -2955,17 +2968,6 @@ static int qcom_nand_host_init_and_register(struct qcom_nand_controller *nandc, · 294 unmodified lines
29552968 if (ret)
29562969 return ret;
29572970
2958− if (nandc->props->is_bam) {
2959− free_bam_transaction(nandc);
2960− nandc->bam_txn = alloc_bam_transaction(nandc);
2961− if (!nandc->bam_txn) {
2962− dev_err(nandc->dev,
2963− "failed to allocate bam transaction\n");
2964− nand_cleanup(chip);
2965− return -ENOMEM;
2966− }
2967− }
2968−
29692971 ret = mtd_device_parse_register(mtd, probes, NULL, NULL, 0);
29702972 if (ret)
29712973 nand_cleanup(chip);
drivers/mtd/nand/raw/sh_flctl.c+8−6
@@ -384,7 +384,8 @@ static int flctl_dma_fifo0_transfer(struct sh_flctl *flctl, unsigned long *buf, · 383 unmodified lines
384384 dma_addr_t dma_addr;
385385 dma_cookie_t cookie;
386386 uint32_t reg;
387− int ret;
387+ int ret = 0;
388+ unsigned long time_left;
388389
389390 if (dir == DMA_FROM_DEVICE) {
390391 chan = flctl->chan_fifo0_rx;
@@ -425,13 +426,14 @@ static int flctl_dma_fifo0_transfer(struct sh_flctl *flctl, unsigned long *buf, · 34 unmodified lines
425426 goto out;
426427 }
427428
428− ret =
429+ time_left =
429430 wait_for_completion_timeout(&flctl->dma_complete,
430431 msecs_to_jiffies(3000));
431432
432− if (ret <= 0) {
433+ if (time_left == 0) {
433434 dmaengine_terminate_all(chan);
434435 dev_err(&flctl->pdev->dev, "wait_for_completion_timeout\n");
436+ ret = -ETIMEDOUT;
435437 }
436438
437439 out:
@@ -441,7 +443,7 @@ out: · 3 unmodified lines
441443
442444 dma_unmap_single(chan->device->dev, dma_addr, len, dir);
443445
444− /* ret > 0 is success */
446+ /* ret == 0 is success */
445447 return ret;
446448 }
447449
@@ -465,7 +467,7 @@ static void read_fiforeg(struct sh_flctl *flctl, int rlen, int offset) · 17 unmodified lines
465467
466468 /* initiate DMA transfer */
467469 if (flctl->chan_fifo0_rx && rlen >= 32 &&
468− flctl_dma_fifo0_transfer(flctl, buf, rlen, DMA_FROM_DEVICE) > 0)
470+ !flctl_dma_fifo0_transfer(flctl, buf, rlen, DMA_FROM_DEVICE))
469471 goto convert; /* DMA success */
470472
471473 /* do polling transfer */
@@ -524,7 +526,7 @@ static void write_ec_fiforeg(struct sh_flctl *flctl, int rlen, · 52 unmodified lines
524526
525527 /* initiate DMA transfer */
526528 if (flctl->chan_fifo0_tx && rlen >= 32 &&
527− flctl_dma_fifo0_transfer(flctl, buf, rlen, DMA_TO_DEVICE) > 0)
529+ !flctl_dma_fifo0_transfer(flctl, buf, rlen, DMA_TO_DEVICE))
528530 return; /* DMA success */
529531
530532 /* do polling transfer */
drivers/net/can/grcan.c+24−22
@@ -241,13 +241,14 @@ struct grcan_device_config { · 240 unmodified lines
241241 .rxsize = GRCAN_DEFAULT_BUFFER_SIZE, \
242242 }
243243
244−#define GRCAN_TXBUG_SAFE_GRLIB_VERSION 0x4100
244+#define GRCAN_TXBUG_SAFE_GRLIB_VERSION 4100
245245 #define GRLIB_VERSION_MASK 0xffff
246246
247247 /* GRCAN private data structure */
248248 struct grcan_priv {
249249 struct can_priv can; /* must be the first member */
250250 struct net_device *dev;
251+ struct device *ofdev_dev;
251252 struct napi_struct napi;
252253
253254 struct grcan_registers __iomem *regs; /* ioremap'ed registers */
@@ -921,7 +922,7 @@ static void grcan_free_dma_buffers(struct net_device *dev) · 667 unmodified lines
921922 struct grcan_priv *priv = netdev_priv(dev);
922923 struct grcan_dma *dma = &priv->dma;
923924
924− dma_free_coherent(&dev->dev, dma->base_size, dma->base_buf,
925+ dma_free_coherent(priv->ofdev_dev, dma->base_size, dma->base_buf,
925926 dma->base_handle);
926927 memset(dma, 0, sizeof(*dma));
927928 }
@@ -946,7 +947,7 @@ static int grcan_allocate_dma_buffers(struct net_device *dev, · 18 unmodified lines
946947
947948 /* Extra GRCAN_BUFFER_ALIGNMENT to allow for alignment */
948949 dma->base_size = lsize + ssize + GRCAN_BUFFER_ALIGNMENT;
949− dma->base_buf = dma_alloc_coherent(&dev->dev,
950+ dma->base_buf = dma_alloc_coherent(priv->ofdev_dev,
950951 dma->base_size,
951952 &dma->base_handle,
952953 GFP_KERNEL);
@@ -1102,8 +1103,10 @@ static int grcan_close(struct net_device *dev) · 149 unmodified lines
11021103
11031104 priv->closing = true;
11041105 if (priv->need_txbug_workaround) {
1106+ spin_unlock_irqrestore(&priv->lock, flags);
11051107 del_timer_sync(&priv->hang_timer);
11061108 del_timer_sync(&priv->rr_timer);
1109+ spin_lock_irqsave(&priv->lock, flags);
11071110 }
11081111 netif_stop_queue(dev);
11091112 grcan_stop_hardware(dev);
@@ -1122,7 +1125,7 @@ static int grcan_close(struct net_device *dev) · 12 unmodified lines
11221125 return 0;
11231126 }
11241127
1125−static int grcan_transmit_catch_up(struct net_device *dev, int budget)
1128+static void grcan_transmit_catch_up(struct net_device *dev)
11261129 {
11271130 struct grcan_priv *priv = netdev_priv(dev);
11281131 unsigned long flags;
@@ -1130,7 +1133,7 @@ static int grcan_transmit_catch_up(struct net_device *dev, int budget) · 1 unmodified line
11301133
11311134 spin_lock_irqsave(&priv->lock, flags);
11321135
1133− work_done = catch_up_echo_skb(dev, budget, true);
1136+ work_done = catch_up_echo_skb(dev, -1, true);
11341137 if (work_done) {
11351138 if (!priv->resetting && !priv->closing &&
11361139 !(priv->can.ctrlmode & CAN_CTRLMODE_LISTENONLY))
@@ -1144,8 +1147,6 @@ static int grcan_transmit_catch_up(struct net_device *dev, int budget) · 7 unmodified lines
11441147 }
11451148
11461149 spin_unlock_irqrestore(&priv->lock, flags);
1147−
1148− return work_done;
11491150 }
11501151
11511152 static int grcan_receive(struct net_device *dev, int budget)
@@ -1227,19 +1228,13 @@ static int grcan_poll(struct napi_struct *napi, int budget) · 75 unmodified lines
12271228 struct net_device *dev = priv->dev;
12281229 struct grcan_registers __iomem *regs = priv->regs;
12291230 unsigned long flags;
1230− int tx_work_done, rx_work_done;
1231− int rx_budget = budget / 2;
1232− int tx_budget = budget - rx_budget;
1231+ int work_done;
12331232
1234− /* Half of the budget for receiving messages */
1235− rx_work_done = grcan_receive(dev, rx_budget);
1233+ work_done = grcan_receive(dev, budget);
12361234
1237− /* Half of the budget for transmitting messages as that can trigger echo
1238− * frames being received
1239− */
1240− tx_work_done = grcan_transmit_catch_up(dev, tx_budget);
1235+ grcan_transmit_catch_up(dev);
12411236
1242− if (rx_work_done < rx_budget && tx_work_done < tx_budget) {
1237+ if (work_done < budget) {
12431238 napi_complete(napi);
12441239
12451240 /* Guarantee no interference with a running reset that otherwise
@@ -1256,7 +1251,7 @@ static int grcan_poll(struct napi_struct *napi, int budget) · 10 unmodified lines
12561251 spin_unlock_irqrestore(&priv->lock, flags);
12571252 }
12581253
1259− return rx_work_done + tx_work_done;
1254+ return work_done;
12601255 }
12611256
12621257 /* Work tx bug by waiting while for the risky situation to clear. If that fails,
@@ -1587,6 +1582,7 @@ static int grcan_setup_netdev(struct platform_device *ofdev, · 324 unmodified lines
15871582 memcpy(&priv->config, &grcan_module_config,
15881583 sizeof(struct grcan_device_config));
15891584 priv->dev = dev;
1585+ priv->ofdev_dev = &ofdev->dev;
15901586 priv->regs = base;
15911587 priv->can.bittiming_const = &grcan_bittiming_const;
15921588 priv->can.do_set_bittiming = grcan_set_bittiming;
@@ -1639,6 +1635,7 @@ exit_free_candev: · 46 unmodified lines
16391635 static int grcan_probe(struct platform_device *ofdev)
16401636 {
16411637 struct device_node *np = ofdev->dev.of_node;
1638+ struct device_node *sysid_parent;
16421639 u32 sysid, ambafreq;
16431640 int irq, err;
16441641 void __iomem *base;
@@ -1647,10 +1644,15 @@ static int grcan_probe(struct platform_device *ofdev) · 2 unmodified lines
16471644 /* Compare GRLIB version number with the first that does not
16481645 * have the tx bug (see start_xmit)
16491646 */
1650− err = of_property_read_u32(np, "systemid", &sysid);
1651− if (!err && ((sysid & GRLIB_VERSION_MASK)
1652− >= GRCAN_TXBUG_SAFE_GRLIB_VERSION))
1653− txbug = false;
1647+ sysid_parent = of_find_node_by_path("/ambapp0");
1648+ if (sysid_parent) {
1649+ of_node_get(sysid_parent);
1650+ err = of_property_read_u32(sysid_parent, "systemid", &sysid);
1651+ if (!err && ((sysid & GRLIB_VERSION_MASK) >=
1652+ GRCAN_TXBUG_SAFE_GRLIB_VERSION))
1653+ txbug = false;
1654+ of_node_put(sysid_parent);
1655+ }
16541656
16551657 err = of_property_read_u32(np, "freq", &ambafreq);
16561658 if (err) {
drivers/net/dsa/b53/b53_common.c+7−29
@@ -1354,46 +1354,25 @@ static void b53_phylink_get_caps(struct dsa_switch *ds, int port, · 1353 unmodified lines
13541354 config->legacy_pre_march2020 = false;
13551355 }
13561356
1357−int b53_phylink_mac_link_state(struct dsa_switch *ds, int port,
1358− struct phylink_link_state *state)
1357+static struct phylink_pcs *b53_phylink_mac_select_pcs(struct dsa_switch *ds,
1358+ int port,
1359+ phy_interface_t interface)
13591360 {
13601361 struct b53_device *dev = ds->priv;
1361− int ret = -EOPNOTSUPP;
13621362
1363− if ((phy_interface_mode_is_8023z(state->interface) ||
1364− state->interface == PHY_INTERFACE_MODE_SGMII) &&
1365− dev->ops->serdes_link_state)
1366− ret = dev->ops->serdes_link_state(dev, port, state);
1363+ if (!dev->ops->phylink_mac_select_pcs)
1364+ return NULL;
13671365
1368− return ret;
1366+ return dev->ops->phylink_mac_select_pcs(dev, port, interface);
13691367 }
1370−EXPORT_SYMBOL(b53_phylink_mac_link_state);
13711368
13721369 void b53_phylink_mac_config(struct dsa_switch *ds, int port,
13731370 unsigned int mode,
13741371 const struct phylink_link_state *state)
13751372 {
1376− struct b53_device *dev = ds->priv;
1377−
1378− if (mode == MLO_AN_PHY || mode == MLO_AN_FIXED)
1379− return;
1380−
1381− if ((phy_interface_mode_is_8023z(state->interface) ||
1382− state->interface == PHY_INTERFACE_MODE_SGMII) &&
1383− dev->ops->serdes_config)
1384− dev->ops->serdes_config(dev, port, mode, state);
13851373 }
13861374 EXPORT_SYMBOL(b53_phylink_mac_config);
13871375
1388−void b53_phylink_mac_an_restart(struct dsa_switch *ds, int port)
1389−{
1390− struct b53_device *dev = ds->priv;
1391−
1392− if (dev->ops->serdes_an_restart)
1393− dev->ops->serdes_an_restart(dev, port);
1394−}
1395−EXPORT_SYMBOL(b53_phylink_mac_an_restart);
1396−
13971376 void b53_phylink_mac_link_down(struct dsa_switch *ds, int port,
13981377 unsigned int mode,
13991378 phy_interface_t interface)
@@ -2269,9 +2248,8 @@ static const struct dsa_switch_ops b53_switch_ops = { · 869 unmodified lines
22692248 .phy_write = b53_phy_write16,
22702249 .adjust_link = b53_adjust_link,
22712250 .phylink_get_caps = b53_phylink_get_caps,
2272− .phylink_mac_link_state = b53_phylink_mac_link_state,
2251+ .phylink_mac_select_pcs = b53_phylink_mac_select_pcs,
22732252 .phylink_mac_config = b53_phylink_mac_config,
2274− .phylink_mac_an_restart = b53_phylink_mac_an_restart,
22752253 .phylink_mac_link_down = b53_phylink_mac_link_down,
22762254 .phylink_mac_link_up = b53_phylink_mac_link_up,
22772255 .port_enable = b53_enable_port,
drivers/net/dsa/b53/b53_priv.h+13−11
@@ -21,7 +21,7 @@ · 20 unmodified lines
2121
2222 #include <linux/kernel.h>
2323 #include <linux/mutex.h>
24−#include <linux/phy.h>
24+#include <linux/phylink.h>
2525 #include <linux/etherdevice.h>
2626 #include <net/dsa.h>
2727
@@ -29,7 +29,6 @@ · 1 unmodified line
2929
3030 struct b53_device;
3131 struct net_device;
32−struct phylink_link_state;
3332
3433 struct b53_io_ops {
3534 int (*read8)(struct b53_device *dev, u8 page, u8 reg, u8 *value);
@@ -48,13 +47,10 @@ struct b53_io_ops { · 12 unmodified lines
4847 void (*irq_disable)(struct b53_device *dev, int port);
4948 void (*phylink_get_caps)(struct b53_device *dev, int port,
5049 struct phylink_config *config);
50+ struct phylink_pcs *(*phylink_mac_select_pcs)(struct b53_device *dev,
51+ int port,
52+ phy_interface_t interface);
5153 u8 (*serdes_map_lane)(struct b53_device *dev, int port);
52− int (*serdes_link_state)(struct b53_device *dev, int port,
53− struct phylink_link_state *state);
54− void (*serdes_config)(struct b53_device *dev, int port,
55− unsigned int mode,
56− const struct phylink_link_state *state);
57− void (*serdes_an_restart)(struct b53_device *dev, int port);
5854 void (*serdes_link_set)(struct b53_device *dev, int port,
5955 unsigned int mode, phy_interface_t interface,
6056 bool link_up);
@@ -85,8 +81,15 @@ enum { · 24 unmodified lines
8581 BCM7278_DEVICE_ID = 0x7278,
8682 };
8783
84+struct b53_pcs {
85+ struct phylink_pcs pcs;
86+ struct b53_device *dev;
87+ u8 lane;
88+};
89+
8890 #define B53_N_PORTS 9
8991 #define B53_N_PORTS_25 6
92+#define B53_N_PCS 2
9093
9194 struct b53_port {
9295 u16 vlan_ctl_mask;
@@ -143,6 +146,8 @@ struct b53_device { · 50 unmodified lines
143146 bool vlan_enabled;
144147 unsigned int num_ports;
145148 struct b53_port *ports;
149+
150+ struct b53_pcs pcs[B53_N_PCS];
146151 };
147152
148153 #define b53_for_each_port(dev, i) \
@@ -336,12 +341,9 @@ int b53_br_flags(struct dsa_switch *ds, int port, · 187 unmodified lines
336341 struct netlink_ext_ack *extack);
337342 int b53_setup_devlink_resources(struct dsa_switch *ds);
338343 void b53_port_event(struct dsa_switch *ds, int port);
339−int b53_phylink_mac_link_state(struct dsa_switch *ds, int port,
340− struct phylink_link_state *state);
341344 void b53_phylink_mac_config(struct dsa_switch *ds, int port,
342345 unsigned int mode,
343346 const struct phylink_link_state *state);
344−void b53_phylink_mac_an_restart(struct dsa_switch *ds, int port);
345347 void b53_phylink_mac_link_down(struct dsa_switch *ds, int port,
346348 unsigned int mode,
347349 phy_interface_t interface);
drivers/net/dsa/b53/b53_serdes.c+51−23
@@ -17,6 +17,11 @@ · 16 unmodified lines
1717 #include "b53_serdes.h"
1818 #include "b53_regs.h"
1919
20+static inline struct b53_pcs *pcs_to_b53_pcs(struct phylink_pcs *pcs)
21+{
22+ return container_of(pcs, struct b53_pcs, pcs);
23+}
24+
2025 static void b53_serdes_write_blk(struct b53_device *dev, u8 offset, u16 block,
2126 u16 value)
2227 {
@@ -60,51 +65,47 @@ static u16 b53_serdes_read(struct b53_device *dev, u8 lane, · 37 unmodified lines
6065 return b53_serdes_read_blk(dev, offset, block);
6166 }
6267
63−void b53_serdes_config(struct b53_device *dev, int port, unsigned int mode,
64− const struct phylink_link_state *state)
68+static int b53_serdes_config(struct phylink_pcs *pcs, unsigned int mode,
69+ phy_interface_t interface,
70+ const unsigned long *advertising,
71+ bool permit_pause_to_mac)
6572 {
66− u8 lane = b53_serdes_map_lane(dev, port);
73+ struct b53_device *dev = pcs_to_b53_pcs(pcs)->dev;
74+ u8 lane = pcs_to_b53_pcs(pcs)->lane;
6775 u16 reg;
6876
69− if (lane == B53_INVALID_LANE)
70− return;
71−
7277 reg = b53_serdes_read(dev, lane, B53_SERDES_DIGITAL_CONTROL(1),
7378 SERDES_DIGITAL_BLK);
74− if (state->interface == PHY_INTERFACE_MODE_1000BASEX)
79+ if (interface == PHY_INTERFACE_MODE_1000BASEX)
7580 reg |= FIBER_MODE_1000X;
7681 else
7782 reg &= ~FIBER_MODE_1000X;
7883 b53_serdes_write(dev, lane, B53_SERDES_DIGITAL_CONTROL(1),
7984 SERDES_DIGITAL_BLK, reg);
85+
86+ return 0;
8087 }
81−EXPORT_SYMBOL(b53_serdes_config);
8288
83−void b53_serdes_an_restart(struct b53_device *dev, int port)
89+static void b53_serdes_an_restart(struct phylink_pcs *pcs)
8490 {
85− u8 lane = b53_serdes_map_lane(dev, port);
91+ struct b53_device *dev = pcs_to_b53_pcs(pcs)->dev;
92+ u8 lane = pcs_to_b53_pcs(pcs)->lane;
8693 u16 reg;
8794
88− if (lane == B53_INVALID_LANE)
89− return;
90−
9195 reg = b53_serdes_read(dev, lane, B53_SERDES_MII_REG(MII_BMCR),
9296 SERDES_MII_BLK);
9397 reg |= BMCR_ANRESTART;
9498 b53_serdes_write(dev, lane, B53_SERDES_MII_REG(MII_BMCR),
9599 SERDES_MII_BLK, reg);
96100 }
97−EXPORT_SYMBOL(b53_serdes_an_restart);
98101
99−int b53_serdes_link_state(struct b53_device *dev, int port,
100− struct phylink_link_state *state)
102+static void b53_serdes_get_state(struct phylink_pcs *pcs,
103+ struct phylink_link_state *state)
101104 {
102− u8 lane = b53_serdes_map_lane(dev, port);
105+ struct b53_device *dev = pcs_to_b53_pcs(pcs)->dev;
106+ u8 lane = pcs_to_b53_pcs(pcs)->lane;
103107 u16 dig, bmsr;
104108
105− if (lane == B53_INVALID_LANE)
106− return 1;
107−
108109 dig = b53_serdes_read(dev, lane, B53_SERDES_DIGITAL_STATUS,
109110 SERDES_DIGITAL_BLK);
110111 bmsr = b53_serdes_read(dev, lane, B53_SERDES_MII_REG(MII_BMSR),
@@ -133,10 +134,7 @@ int b53_serdes_link_state(struct b53_device *dev, int port, · 22 unmodified lines
133134 state->pause |= MLO_PAUSE_RX;
134135 if (dig & PAUSE_RESOLUTION_TX_SIDE)
135136 state->pause |= MLO_PAUSE_TX;
136−
137− return 0;
138137 }
139−EXPORT_SYMBOL(b53_serdes_link_state);
140138
141139 void b53_serdes_link_set(struct b53_device *dev, int port, unsigned int mode,
142140 phy_interface_t interface, bool link_up)
@@ -158,6 +156,12 @@ void b53_serdes_link_set(struct b53_device *dev, int port, unsigned int mode, · 15 unmodified lines
158156 }
159157 EXPORT_SYMBOL(b53_serdes_link_set);
160158
159+static const struct phylink_pcs_ops b53_pcs_ops = {
160+ .pcs_get_state = b53_serdes_get_state,
161+ .pcs_config = b53_serdes_config,
162+ .pcs_an_restart = b53_serdes_an_restart,
163+};
164+
161165 void b53_serdes_phylink_get_caps(struct b53_device *dev, int port,
162166 struct phylink_config *config)
163167 {
@@ -187,9 +191,28 @@ void b53_serdes_phylink_get_caps(struct b53_device *dev, int port, · 23 unmodified lines
187191 }
188192 EXPORT_SYMBOL(b53_serdes_phylink_get_caps);
189193
194+struct phylink_pcs *b53_serdes_phylink_mac_select_pcs(struct b53_device *dev,
195+ int port,
196+ phy_interface_t interface)
197+{
198+ u8 lane = b53_serdes_map_lane(dev, port);
199+
200+ if (lane == B53_INVALID_LANE || lane >= B53_N_PCS ||
201+ !dev->pcs[lane].dev)
202+ return NULL;
203+
204+ if (!phy_interface_mode_is_8023z(interface) &&
205+ interface != PHY_INTERFACE_MODE_SGMII)
206+ return NULL;
207+
208+ return &dev->pcs[lane].pcs;
209+}
210+EXPORT_SYMBOL(b53_serdes_phylink_mac_select_pcs);
211+
190212 int b53_serdes_init(struct b53_device *dev, int port)
191213 {
192214 u8 lane = b53_serdes_map_lane(dev, port);
215+ struct b53_pcs *pcs;
193216 u16 id0, msb, lsb;
194217
195218 if (lane == B53_INVALID_LANE)
@@ -212,6 +235,11 @@ int b53_serdes_init(struct b53_device *dev, int port) · 16 unmodified lines
212235 (id0 >> SERDES_ID0_REV_NUM_SHIFT) & SERDES_ID0_REV_NUM_MASK,
213236 (u32)msb << 16 | lsb);
214237
238+ pcs = &dev->pcs[lane];
239+ pcs->dev = dev;
240+ pcs->lane = lane;
241+ pcs->pcs.ops = &b53_pcs_ops;
242+
215243 return 0;
216244 }
217245 EXPORT_SYMBOL(b53_serdes_init);
drivers/net/dsa/b53/b53_serdes.h+3−6
@@ -107,14 +107,11 @@ static inline u8 b53_serdes_map_lane(struct b53_device *dev, int port) · 106 unmodified lines
107107 return dev->ops->serdes_map_lane(dev, port);
108108 }
109109
110−int b53_serdes_get_link(struct b53_device *dev, int port);
111−int b53_serdes_link_state(struct b53_device *dev, int port,
112− struct phylink_link_state *state);
113−void b53_serdes_config(struct b53_device *dev, int port, unsigned int mode,
114− const struct phylink_link_state *state);
115−void b53_serdes_an_restart(struct b53_device *dev, int port);
116110 void b53_serdes_link_set(struct b53_device *dev, int port, unsigned int mode,
117111 phy_interface_t interface, bool link_up);
112+struct phylink_pcs *b53_serdes_phylink_mac_select_pcs(struct b53_device *dev,
113+ int port,
114+ phy_interface_t interface);
118115 void b53_serdes_phylink_get_caps(struct b53_device *dev, int port,
119116 struct phylink_config *config);
120117 #if IS_ENABLED(CONFIG_B53_SERDES)
drivers/net/dsa/b53/b53_srab.c+1−3
@@ -491,10 +491,8 @@ static const struct b53_io_ops b53_srab_ops = { · 490 unmodified lines
491491 .irq_disable = b53_srab_irq_disable,
492492 .phylink_get_caps = b53_srab_phylink_get_caps,
493493 #if IS_ENABLED(CONFIG_B53_SERDES)
494+ .phylink_mac_select_pcs = b53_serdes_phylink_mac_select_pcs,
494495 .serdes_map_lane = b53_srab_serdes_map_lane,
495− .serdes_link_state = b53_serdes_link_state,
496− .serdes_config = b53_serdes_config,
497− .serdes_an_restart = b53_serdes_an_restart,
498496 .serdes_link_set = b53_serdes_link_set,
499497 #endif
500498 };
drivers/net/dsa/bcm_sf2.c+3−0
@@ -809,6 +809,9 @@ static void bcm_sf2_sw_mac_link_down(struct dsa_switch *ds, int port, · 808 unmodified lines
809809 struct bcm_sf2_priv *priv = bcm_sf2_to_priv(ds);
810810 u32 reg, offset;
811811
812+ if (priv->wol_ports_mask & BIT(port))
813+ return;
814+
812815 if (port != core_readl(priv, CORE_IMP0_PRT_ID)) {
813816 if (priv->type == BCM4908_DEVICE_ID ||
814817 priv->type == BCM7445_DEVICE_ID)
drivers/net/dsa/lantiq_gswip.c+0−3
@@ -1681,9 +1681,6 @@ static void gswip_phylink_mac_config(struct dsa_switch *ds, int port, · 1680 unmodified lines
16811681 break;
16821682 case PHY_INTERFACE_MODE_RMII:
16831683 miicfg |= GSWIP_MII_CFG_MODE_RMIIM;
1684−
1685− /* Configure the RMII clock as output: */
1686− miicfg |= GSWIP_MII_CFG_RMII_CLK;
16871684 break;
16881685 case PHY_INTERFACE_MODE_RGMII:
16891686 case PHY_INTERFACE_MODE_RGMII_ID:
drivers/net/dsa/microchip/ksz9477.c+34−4
@@ -1021,14 +1021,32 @@ static int ksz9477_port_mirror_add(struct dsa_switch *ds, int port, · 1020 unmodified lines
10211021 bool ingress, struct netlink_ext_ack *extack)
10221022 {
10231023 struct ksz_device *dev = ds->priv;
1024+ u8 data;
1025+ int p;
1026+
1027+ /* Limit to one sniffer port
1028+ * Check if any of the port is already set for sniffing
1029+ * If yes, instruct the user to remove the previous entry & exit
1030+ */
1031+ for (p = 0; p < dev->port_cnt; p++) {
1032+ /* Skip the current sniffing port */
1033+ if (p == mirror->to_local_port)
1034+ continue;
1035+
1036+ ksz_pread8(dev, p, P_MIRROR_CTRL, &data);
1037+
1038+ if (data & PORT_MIRROR_SNIFFER) {
1039+ NL_SET_ERR_MSG_MOD(extack,
1040+ "Sniffer port is already configured, delete existing rules & retry");
1041+ return -EBUSY;
1042+ }
1043+ }
10241044
10251045 if (ingress)
10261046 ksz_port_cfg(dev, port, P_MIRROR_CTRL, PORT_MIRROR_RX, true);
10271047 else
10281048 ksz_port_cfg(dev, port, P_MIRROR_CTRL, PORT_MIRROR_TX, true);
10291049
1030− ksz_port_cfg(dev, port, P_MIRROR_CTRL, PORT_MIRROR_SNIFFER, false);
1031−
10321050 /* configure mirror port */
10331051 ksz_port_cfg(dev, mirror->to_local_port, P_MIRROR_CTRL,
10341052 PORT_MIRROR_SNIFFER, true);
@@ -1042,16 +1060,28 @@ static void ksz9477_port_mirror_del(struct dsa_switch *ds, int port, · 7 unmodified lines
10421060 struct dsa_mall_mirror_tc_entry *mirror)
10431061 {
10441062 struct ksz_device *dev = ds->priv;
1063+ bool in_use = false;
10451064 u8 data;
1065+ int p;
10461066
10471067 if (mirror->ingress)
10481068 ksz_port_cfg(dev, port, P_MIRROR_CTRL, PORT_MIRROR_RX, false);
10491069 else
10501070 ksz_port_cfg(dev, port, P_MIRROR_CTRL, PORT_MIRROR_TX, false);
10511071
1052− ksz_pread8(dev, port, P_MIRROR_CTRL, &data);
10531072
1054− if (!(data & (PORT_MIRROR_RX | PORT_MIRROR_TX)))
1073+ /* Check if any of the port is still referring to sniffer port */
1074+ for (p = 0; p < dev->port_cnt; p++) {
1075+ ksz_pread8(dev, p, P_MIRROR_CTRL, &data);
1076+
1077+ if ((data & (PORT_MIRROR_RX | PORT_MIRROR_TX))) {
1078+ in_use = true;
1079+ break;
1080+ }
1081+ }
1082+
1083+ /* delete sniffing if there are no other mirroring rules */
1084+ if (!in_use)
10551085 ksz_port_cfg(dev, mirror->to_local_port, P_MIRROR_CTRL,
10561086 PORT_MIRROR_SNIFFER, false);
10571087 }
drivers/net/dsa/mt7530.c+1−0
@@ -2229,6 +2229,7 @@ mt7530_setup(struct dsa_switch *ds) · 2228 unmodified lines
22292229 ret = of_get_phy_mode(mac_np, &interface);
22302230 if (ret && ret != -ENODEV) {
22312231 of_node_put(mac_np);
2232+ of_node_put(phy_node);
22322233 return ret;
22332234 }
22342235 id = of_mdio_parse_addr(ds->dev, phy_node);
drivers/net/dsa/mv88e6xxx/port_hidden.c+3−2
@@ -40,8 +40,9 @@ int mv88e6xxx_port_hidden_wait(struct mv88e6xxx_chip *chip) · 39 unmodified lines
4040 {
4141 int bit = __bf_shf(MV88E6XXX_PORT_RESERVED_1A_BUSY);
4242
43− return mv88e6xxx_wait_bit(chip, MV88E6XXX_PORT_RESERVED_1A_CTRL_PORT,
44− MV88E6XXX_PORT_RESERVED_1A, bit, 0);
43+ return mv88e6xxx_port_wait_bit(chip,
44+ MV88E6XXX_PORT_RESERVED_1A_CTRL_PORT,
45+ MV88E6XXX_PORT_RESERVED_1A, bit, 0);
4546 }
4647
4748 int mv88e6xxx_port_hidden_read(struct mv88e6xxx_chip *chip, int block, int port,
drivers/net/dsa/ocelot/felix.c+6−1
@@ -403,6 +403,7 @@ static int felix_update_trapping_destinations(struct dsa_switch *ds, · 402 unmodified lines
403403 {
404404 struct ocelot *ocelot = ds->priv;
405405 struct felix *felix = ocelot_to_felix(ocelot);
406+ struct ocelot_vcap_block *block_vcap_is2;
406407 struct ocelot_vcap_filter *trap;
407408 enum ocelot_mask_mode mask_mode;
408409 unsigned long port_mask;
@@ -422,9 +423,13 @@ static int felix_update_trapping_destinations(struct dsa_switch *ds, · 13 unmodified lines
422423 /* We are sure that "cpu" was found, otherwise
423424 * dsa_tree_setup_default_cpu() would have failed earlier.
424425 */
426+ block_vcap_is2 = &ocelot->block[VCAP_IS2];
425427
426428 /* Make sure all traps are set up for that destination */
427− list_for_each_entry(trap, &ocelot->traps, trap_list) {
429+ list_for_each_entry(trap, &block_vcap_is2->rules, list) {
430+ if (!trap->is_trap)
431+ continue;
432+
428433 /* Figure out the current trapping destination */
429434 if (using_tag_8021q) {
430435 /* Redirect to the tag_8021q CPU port. If timestamps
drivers/net/dsa/realtek/realtek-mdio.c+0−1
@@ -267,7 +267,6 @@ static const struct of_device_id realtek_mdio_of_match[] = { · 266 unmodified lines
267267 #endif
268268 #if IS_ENABLED(CONFIG_NET_DSA_REALTEK_RTL8365MB)
269269 { .compatible = "realtek,rtl8365mb", .data = &rtl8365mb_variant, },
270− { .compatible = "realtek,rtl8367s", .data = &rtl8365mb_variant, },
271270 #endif
272271 { /* sentinel */ },
273272 };
drivers/net/dsa/realtek/realtek-smi.c+0−4
@@ -551,10 +551,6 @@ static const struct of_device_id realtek_smi_of_match[] = { · 550 unmodified lines
551551 .compatible = "realtek,rtl8365mb",
552552 .data = &rtl8365mb_variant,
553553 },
554− {
555− .compatible = "realtek,rtl8367s",
556− .data = &rtl8365mb_variant,
557− },
558554 #endif
559555 { /* sentinel */ },
560556 };
drivers/net/ethernet/aquantia/atlantic/aq_pci_func.c+2−2
@@ -449,7 +449,7 @@ static int aq_pm_freeze(struct device *dev) · 448 unmodified lines
449449
450450 static int aq_pm_suspend_poweroff(struct device *dev)
451451 {
452− return aq_suspend_common(dev, false);
452+ return aq_suspend_common(dev, true);
453453 }
454454
455455 static int aq_pm_thaw(struct device *dev)
@@ -459,7 +459,7 @@ static int aq_pm_thaw(struct device *dev) · 3 unmodified lines
459459
460460 static int aq_pm_resume_restore(struct device *dev)
461461 {
462− return atl_resume_common(dev, false);
462+ return atl_resume_common(dev, true);
463463 }
464464
465465 static const struct dev_pm_ops aq_pm_ops = {
drivers/net/ethernet/aquantia/atlantic/aq_ring.c+11−9
@@ -346,7 +346,6 @@ int aq_ring_rx_clean(struct aq_ring_s *self, · 345 unmodified lines
346346 int budget)
347347 {
348348 struct net_device *ndev = aq_nic_get_ndev(self->aq_nic);
349− bool is_rsc_completed = true;
350349 int err = 0;
351350
352351 for (; (self->sw_head != self->hw_head) && budget;
@@ -364,12 +363,17 @@ int aq_ring_rx_clean(struct aq_ring_s *self, · 11 unmodified lines
364363 continue;
365364
366365 if (!buff->is_eop) {
366+ unsigned int frag_cnt = 0U;
367367 buff_ = buff;
368368 do {
369+ bool is_rsc_completed = true;
370+
369371 if (buff_->next >= self->size) {
370372 err = -EIO;
371373 goto err_exit;
372374 }
375+
376+ frag_cnt++;
373377 next_ = buff_->next,
374378 buff_ = &self->buff_ring[next_];
375379 is_rsc_completed =
@@ -377,18 +381,17 @@ int aq_ring_rx_clean(struct aq_ring_s *self, · 1 unmodified line
377381 next_,
378382 self->hw_head);
379383
380− if (unlikely(!is_rsc_completed))
381− break;
384+ if (unlikely(!is_rsc_completed) ||
385+ frag_cnt > MAX_SKB_FRAGS) {
386+ err = 0;
387+ goto err_exit;
388+ }
382389
383390 buff->is_error |= buff_->is_error;
384391 buff->is_cso_err |= buff_->is_cso_err;
385392
386393 } while (!buff_->is_eop);
387394
388− if (!is_rsc_completed) {
389− err = 0;
390− goto err_exit;
391− }
392395 if (buff->is_error ||
393396 (buff->is_lro && buff->is_cso_err)) {
394397 buff_ = buff;
@@ -446,7 +449,7 @@ int aq_ring_rx_clean(struct aq_ring_s *self, · 51 unmodified lines
446449 ALIGN(hdr_len, sizeof(long)));
447450
448451 if (buff->len - hdr_len > 0) {
449− skb_add_rx_frag(skb, 0, buff->rxdata.page,
452+ skb_add_rx_frag(skb, i++, buff->rxdata.page,
450453 buff->rxdata.pg_off + hdr_len,
451454 buff->len - hdr_len,
452455 AQ_CFG_RX_FRAME_MAX);
@@ -455,7 +458,6 @@ int aq_ring_rx_clean(struct aq_ring_s *self, · 2 unmodified lines
455458
456459 if (!buff->is_eop) {
457460 buff_ = buff;
458− i = 1U;
459461 do {
460462 next_ = buff_->next;
461463 buff_ = &self->buff_ring[next_];
drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_b0.c+7−0
@@ -889,6 +889,13 @@ int hw_atl_b0_hw_ring_tx_head_update(struct aq_hw_s *self, · 888 unmodified lines
889889 err = -ENXIO;
890890 goto err_exit;
891891 }
892+
893+ /* Validate that the new hw_head_ is reasonable. */
894+ if (hw_head_ >= ring->size) {
895+ err = -ENXIO;
896+ goto err_exit;
897+ }
898+
892899 ring->hw_head = hw_head_;
893900 err = aq_hw_err_from_flags(self);
894901
drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c+5−4
@@ -14153,10 +14153,6 @@ static int bnx2x_eeh_nic_unload(struct bnx2x *bp) · 14152 unmodified lines
1415314153
1415414154 /* Stop Tx */
1415514155 bnx2x_tx_disable(bp);
14156− /* Delete all NAPI objects */
14157− bnx2x_del_all_napi(bp);
14158− if (CNIC_LOADED(bp))
14159− bnx2x_del_all_napi_cnic(bp);
1416014156 netdev_reset_tc(bp->dev);
1416114157
1416214158 del_timer_sync(&bp->timer);
@@ -14261,6 +14257,11 @@ static pci_ers_result_t bnx2x_io_slot_reset(struct pci_dev *pdev) · 98 unmodified lines
1426114257 bnx2x_drain_tx_queues(bp);
1426214258 bnx2x_send_unload_req(bp, UNLOAD_RECOVERY);
1426314259 bnx2x_netif_stop(bp, 1);
14260+ bnx2x_del_all_napi(bp);
14261+
14262+ if (CNIC_LOADED(bp))
14263+ bnx2x_del_all_napi_cnic(bp);
14264+
1426414265 bnx2x_free_irq(bp);
1426514266
1426614267 /* Report UNLOAD_DONE to MCP */
drivers/net/ethernet/broadcom/bnxt/bnxt.c+8−5
@@ -2707,6 +2707,10 @@ static int bnxt_poll_p5(struct napi_struct *napi, int budget) · 2706 unmodified lines
27072707 u32 idx = le32_to_cpu(nqcmp->cq_handle_low);
27082708 struct bnxt_cp_ring_info *cpr2;
27092709
2710+ /* No more budget for RX work */
2711+ if (budget && work_done >= budget && idx == BNXT_RX_HDL)
2712+ break;
2713+
27102714 cpr2 = cpr->cp_ring_arr[idx];
27112715 work_done += __bnxt_poll_work(bp, cpr2,
27122716 budget - work_done);
@@ -10983,7 +10987,7 @@ static bool bnxt_rfs_capable(struct bnxt *bp) · 8270 unmodified lines
1098310987
1098410988 if (bp->flags & BNXT_FLAG_CHIP_P5)
1098510989 return bnxt_rfs_supported(bp);
10986− if (!(bp->flags & BNXT_FLAG_MSIX_CAP) || !bnxt_can_reserve_rings(bp))
10990+ if (!(bp->flags & BNXT_FLAG_MSIX_CAP) || !bnxt_can_reserve_rings(bp) || !bp->rx_nr_rings)
1098710991 return false;
1098810992
1098910993 vnics = 1 + bp->rx_nr_rings;
@@ -13234,10 +13238,9 @@ static int bnxt_init_dflt_ring_mode(struct bnxt *bp) · 2244 unmodified lines
1323413238 goto init_dflt_ring_err;
1323513239
1323613240 bp->tx_nr_rings_per_tc = bp->tx_nr_rings;
13237− if (bnxt_rfs_supported(bp) && bnxt_rfs_capable(bp)) {
13238− bp->flags |= BNXT_FLAG_RFS;
13239− bp->dev->features |= NETIF_F_NTUPLE;
13240− }
13241+
13242+ bnxt_set_dflt_rfs(bp);
13243+
1324113244 init_dflt_ring_err:
1324213245 bnxt_ulp_irq_restart(bp, rc);
1324313246 return rc;
drivers/net/ethernet/broadcom/bnxt/bnxt_ptp.c+7−8
@@ -846,13 +846,6 @@ int bnxt_ptp_init(struct bnxt *bp, bool phc_cfg) · 845 unmodified lines
846846 if (rc)
847847 return rc;
848848
849− if (bp->fw_cap & BNXT_FW_CAP_PTP_RTC) {
850− bnxt_ptp_timecounter_init(bp, false);
851− rc = bnxt_ptp_init_rtc(bp, phc_cfg);
852− if (rc)
853− goto out;
854− }
855−
856849 if (ptp->ptp_clock && bnxt_pps_config_ok(bp))
857850 return 0;
858851
@@ -861,8 +854,14 @@ int bnxt_ptp_init(struct bnxt *bp, bool phc_cfg) · 2 unmodified lines
861854 atomic_set(&ptp->tx_avail, BNXT_MAX_TX_TS);
862855 spin_lock_init(&ptp->ptp_lock);
863856
864− if (!(bp->fw_cap & BNXT_FW_CAP_PTP_RTC))
857+ if (bp->fw_cap & BNXT_FW_CAP_PTP_RTC) {
858+ bnxt_ptp_timecounter_init(bp, false);
859+ rc = bnxt_ptp_init_rtc(bp, phc_cfg);
860+ if (rc)
861+ goto out;
862+ } else {
865863 bnxt_ptp_timecounter_init(bp, true);
864+ }
866865
867866 ptp->ptp_info = bnxt_ptp_caps;
868867 if ((bp->fw_cap & BNXT_FW_CAP_PTP_PPS)) {
drivers/net/ethernet/broadcom/genet/bcmgenet.c+11−0
@@ -2035,6 +2035,11 @@ static struct sk_buff *bcmgenet_add_tsb(struct net_device *dev, · 2034 unmodified lines
20352035 return skb;
20362036 }
20372037
2038+static void bcmgenet_hide_tsb(struct sk_buff *skb)
2039+{
2040+ __skb_pull(skb, sizeof(struct status_64));
2041+}
2042+
20382043 static netdev_tx_t bcmgenet_xmit(struct sk_buff *skb, struct net_device *dev)
20392044 {
20402045 struct bcmgenet_priv *priv = netdev_priv(dev);
@@ -2141,6 +2146,8 @@ static netdev_tx_t bcmgenet_xmit(struct sk_buff *skb, struct net_device *dev) · 100 unmodified lines
21412146 }
21422147
21432148 GENET_CB(skb)->last_cb = tx_cb_ptr;
2149+
2150+ bcmgenet_hide_tsb(skb);
21442151 skb_tx_timestamp(skb);
21452152
21462153 /* Decrement total BD count and advance our write pointer */
@@ -3992,6 +3999,10 @@ static int bcmgenet_probe(struct platform_device *pdev) · 1845 unmodified lines
39923999 goto err;
39934000 }
39944001 priv->wol_irq = platform_get_irq_optional(pdev, 2);
4002+ if (priv->wol_irq == -EPROBE_DEFER) {
4003+ err = priv->wol_irq;
4004+ goto err;
4005+ }
39954006
39964007 priv->base = devm_platform_ioremap_resource(pdev, 0);
39974008 if (IS_ERR(priv->base)) {
drivers/net/ethernet/cavium/thunder/nic_main.c+8−8
@@ -59,7 +59,7 @@ struct nicpf { · 58 unmodified lines
5959
6060 /* MSI-X */
6161 u8 num_vec;
62− bool irq_allocated[NIC_PF_MSIX_VECTORS];
62+ unsigned int irq_allocated[NIC_PF_MSIX_VECTORS];
6363 char irq_name[NIC_PF_MSIX_VECTORS][20];
6464 };
6565
@@ -1150,7 +1150,7 @@ static irqreturn_t nic_mbx_intr_handler(int irq, void *nic_irq) · 1084 unmodified lines
11501150 u64 intr;
11511151 u8 vf;
11521152
1153− if (irq == pci_irq_vector(nic->pdev, NIC_PF_INTR_ID_MBOX0))
1153+ if (irq == nic->irq_allocated[NIC_PF_INTR_ID_MBOX0])
11541154 mbx = 0;
11551155 else
11561156 mbx = 1;
@@ -1176,14 +1176,14 @@ static void nic_free_all_interrupts(struct nicpf *nic) · 19 unmodified lines
11761176
11771177 for (irq = 0; irq < nic->num_vec; irq++) {
11781178 if (nic->irq_allocated[irq])
1179− free_irq(pci_irq_vector(nic->pdev, irq), nic);
1180− nic->irq_allocated[irq] = false;
1179+ free_irq(nic->irq_allocated[irq], nic);
1180+ nic->irq_allocated[irq] = 0;
11811181 }
11821182 }
11831183
11841184 static int nic_register_interrupts(struct nicpf *nic)
11851185 {
1186− int i, ret;
1186+ int i, ret, irq;
11871187 nic->num_vec = pci_msix_vec_count(nic->pdev);
11881188
11891189 /* Enable MSI-X */
@@ -1201,13 +1201,13 @@ static int nic_register_interrupts(struct nicpf *nic) · 11 unmodified lines
12011201 sprintf(nic->irq_name[i],
12021202 "NICPF Mbox%d", (i - NIC_PF_INTR_ID_MBOX0));
12031203
1204− ret = request_irq(pci_irq_vector(nic->pdev, i),
1205− nic_mbx_intr_handler, 0,
1204+ irq = pci_irq_vector(nic->pdev, i);
1205+ ret = request_irq(irq, nic_mbx_intr_handler, 0,
12061206 nic->irq_name[i], nic);
12071207 if (ret)
12081208 goto fail;
12091209
1210− nic->irq_allocated[i] = true;
1210+ nic->irq_allocated[i] = irq;
12111211 }
12121212
12131213 /* Enable mailbox interrupt */
drivers/net/ethernet/chelsio/cxgb4/t4_hw.c+5−5
@@ -2793,14 +2793,14 @@ int t4_get_raw_vpd_params(struct adapter *adapter, struct vpd_params *p) · 2792 unmodified lines
27932793 goto out;
27942794 na = ret;
27952795
2796− memcpy(p->id, vpd + id, min_t(int, id_len, ID_LEN));
2796+ memcpy(p->id, vpd + id, min_t(unsigned int, id_len, ID_LEN));
27972797 strim(p->id);
2798− memcpy(p->sn, vpd + sn, min_t(int, sn_len, SERNUM_LEN));
2798+ memcpy(p->sn, vpd + sn, min_t(unsigned int, sn_len, SERNUM_LEN));
27992799 strim(p->sn);
2800− memcpy(p->pn, vpd + pn, min_t(int, pn_len, PN_LEN));
2800+ memcpy(p->pn, vpd + pn, min_t(unsigned int, pn_len, PN_LEN));
28012801 strim(p->pn);
2802− memcpy(p->na, vpd + na, min_t(int, na_len, MACADDR_LEN));
2803− strim((char *)p->na);
2802+ memcpy(p->na, vpd + na, min_t(unsigned int, na_len, MACADDR_LEN));
2803+ strim(p->na);
28042804
28052805 out:
28062806 vfree(vpd);
drivers/net/ethernet/dec/tulip/tulip_core.c+4−1
@@ -1399,8 +1399,10 @@ static int tulip_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) · 1398 unmodified lines
13991399
14001400 /* alloc_etherdev ensures aligned and zeroed private structures */
14011401 dev = alloc_etherdev (sizeof (*tp));
1402− if (!dev)
1402+ if (!dev) {
1403+ pci_disable_device(pdev);
14031404 return -ENOMEM;
1405+ }
14041406
14051407 SET_NETDEV_DEV(dev, &pdev->dev);
14061408 if (pci_resource_len (pdev, 0) < tulip_tbl[chip_idx].io_size) {
@@ -1785,6 +1787,7 @@ err_out_free_res: · 378 unmodified lines
17851787
17861788 err_out_free_netdev:
17871789 free_netdev (dev);
1790+ pci_disable_device(pdev);
17881791 return -ENODEV;
17891792 }
17901793
drivers/net/ethernet/freescale/enetc/enetc_qos.c+0−4
@@ -297,10 +297,6 @@ int enetc_setup_tc_txtime(struct net_device *ndev, void *type_data) · 296 unmodified lines
297297 if (tc < 0 || tc >= priv->num_tx_rings)
298298 return -EINVAL;
299299
300− /* Do not support TXSTART and TX CSUM offload simutaniously */
301− if (ndev->features & NETIF_F_CSUM_MASK)
302− return -EBUSY;
303−
304300 /* TSD and Qbv are mutually exclusive in hardware */
305301 if (enetc_rd(&priv->si->hw, ENETC_QBV_PTGCR_OFFSET) & ENETC_QBV_TGE)
306302 return -EBUSY;
drivers/net/ethernet/freescale/fec_main.c+1−1
@@ -3731,7 +3731,7 @@ static int fec_enet_init_stop_mode(struct fec_enet_private *fep, · 3730 unmodified lines
37313731 ARRAY_SIZE(out_val));
37323732 if (ret) {
37333733 dev_dbg(&fep->pdev->dev, "no stop mode property\n");
3734− return ret;
3734+ goto out;
37353735 }
37363736
37373737 fep->stop_gpr.gpr = syscon_node_to_regmap(gpr_np);
drivers/net/ethernet/hisilicon/hns/hns_dsaf_mac.c+5−1
@@ -1065,19 +1065,23 @@ int hns_mac_init(struct dsaf_device *dsaf_dev) · 1064 unmodified lines
10651065 device_for_each_child_node(dsaf_dev->dev, child) {
10661066 ret = fwnode_property_read_u32(child, "reg", &port_id);
10671067 if (ret) {
1068+ fwnode_handle_put(child);
10681069 dev_err(dsaf_dev->dev,
10691070 "get reg fail, ret=%d!\n", ret);
10701071 return ret;
10711072 }
10721073 if (port_id >= max_port_num) {
1074+ fwnode_handle_put(child);
10731075 dev_err(dsaf_dev->dev,
10741076 "reg(%u) out of range!\n", port_id);
10751077 return -EINVAL;
10761078 }
10771079 mac_cb = devm_kzalloc(dsaf_dev->dev, sizeof(*mac_cb),
10781080 GFP_KERNEL);
1079− if (!mac_cb)
1081+ if (!mac_cb) {
1082+ fwnode_handle_put(child);
10801083 return -ENOMEM;
1084+ }
10811085 mac_cb->fw_port = child;
10821086 mac_cb->mac_id = (u8)port_id;
10831087 dsaf_dev->mac_cb[port_id] = mac_cb;
drivers/net/ethernet/hisilicon/hns3/hns3_common/hclge_comm_tqp_stats.c+2−2
@@ -75,7 +75,7 @@ int hclge_comm_tqps_update_stats(struct hnae3_handle *handle, · 74 unmodified lines
7575 ret = hclge_comm_cmd_send(hw, &desc, 1);
7676 if (ret) {
7777 dev_err(&hw->cmq.csq.pdev->dev,
78− "failed to get tqp stat, ret = %d, tx = %u.\n",
78+ "failed to get tqp stat, ret = %d, rx = %u.\n",
7979 ret, i);
8080 return ret;
8181 }
@@ -89,7 +89,7 @@ int hclge_comm_tqps_update_stats(struct hnae3_handle *handle, · 7 unmodified lines
8989 ret = hclge_comm_cmd_send(hw, &desc, 1);
9090 if (ret) {
9191 dev_err(&hw->cmq.csq.pdev->dev,
92− "failed to get tqp stat, ret = %d, rx = %u.\n",
92+ "failed to get tqp stat, ret = %d, tx = %u.\n",
9393 ret, i);
9494 return ret;
9595 }
drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c+42−42
@@ -562,12 +562,12 @@ static void hns3_dbg_tx_spare_info(struct hns3_enet_ring *ring, char *buf, · 561 unmodified lines
562562
563563 for (i = 0; i < ring_num; i++) {
564564 j = 0;
565− sprintf(result[j++], "%8u", i);
566− sprintf(result[j++], "%9u", ring->tx_copybreak);
567− sprintf(result[j++], "%3u", tx_spare->len);
568− sprintf(result[j++], "%3u", tx_spare->next_to_use);
569− sprintf(result[j++], "%3u", tx_spare->next_to_clean);
570− sprintf(result[j++], "%3u", tx_spare->last_to_clean);
565+ sprintf(result[j++], "%u", i);
566+ sprintf(result[j++], "%u", ring->tx_copybreak);
567+ sprintf(result[j++], "%u", tx_spare->len);
568+ sprintf(result[j++], "%u", tx_spare->next_to_use);
569+ sprintf(result[j++], "%u", tx_spare->next_to_clean);
570+ sprintf(result[j++], "%u", tx_spare->last_to_clean);
571571 sprintf(result[j++], "%pad", &tx_spare->dma);
572572 hns3_dbg_fill_content(content, sizeof(content),
573573 tx_spare_info_items,
@@ -598,35 +598,35 @@ static void hns3_dump_rx_queue_info(struct hns3_enet_ring *ring, · 24 unmodified lines
598598 u32 base_add_l, base_add_h;
599599 u32 j = 0;
600600
601− sprintf(result[j++], "%8u", index);
601+ sprintf(result[j++], "%u", index);
602602
603− sprintf(result[j++], "%6u", readl_relaxed(ring->tqp->io_base +
603+ sprintf(result[j++], "%u", readl_relaxed(ring->tqp->io_base +
604604 HNS3_RING_RX_RING_BD_NUM_REG));
605605
606− sprintf(result[j++], "%6u", readl_relaxed(ring->tqp->io_base +
606+ sprintf(result[j++], "%u", readl_relaxed(ring->tqp->io_base +
607607 HNS3_RING_RX_RING_BD_LEN_REG));
608608
609− sprintf(result[j++], "%4u", readl_relaxed(ring->tqp->io_base +
609+ sprintf(result[j++], "%u", readl_relaxed(ring->tqp->io_base +
610610 HNS3_RING_RX_RING_TAIL_REG));
611611
612− sprintf(result[j++], "%4u", readl_relaxed(ring->tqp->io_base +
612+ sprintf(result[j++], "%u", readl_relaxed(ring->tqp->io_base +
613613 HNS3_RING_RX_RING_HEAD_REG));
614614
615− sprintf(result[j++], "%6u", readl_relaxed(ring->tqp->io_base +
615+ sprintf(result[j++], "%u", readl_relaxed(ring->tqp->io_base +
616616 HNS3_RING_RX_RING_FBDNUM_REG));
617617
618− sprintf(result[j++], "%6u", readl_relaxed(ring->tqp->io_base +
618+ sprintf(result[j++], "%u", readl_relaxed(ring->tqp->io_base +
619619 HNS3_RING_RX_RING_PKTNUM_RECORD_REG));
620− sprintf(result[j++], "%9u", ring->rx_copybreak);
620+ sprintf(result[j++], "%u", ring->rx_copybreak);
621621
622− sprintf(result[j++], "%7s", readl_relaxed(ring->tqp->io_base +
622+ sprintf(result[j++], "%s", readl_relaxed(ring->tqp->io_base +
623623 HNS3_RING_EN_REG) ? "on" : "off");
624624
625625 if (hnae3_ae_dev_tqp_txrx_indep_supported(ae_dev))
626− sprintf(result[j++], "%10s", readl_relaxed(ring->tqp->io_base +
626+ sprintf(result[j++], "%s", readl_relaxed(ring->tqp->io_base +
627627 HNS3_RING_RX_EN_REG) ? "on" : "off");
628628 else
629− sprintf(result[j++], "%10s", "NA");
629+ sprintf(result[j++], "%s", "NA");
630630
631631 base_add_h = readl_relaxed(ring->tqp->io_base +
632632 HNS3_RING_RX_RING_BASEADDR_H_REG);
@@ -700,36 +700,36 @@ static void hns3_dump_tx_queue_info(struct hns3_enet_ring *ring, · 67 unmodified lines
700700 u32 base_add_l, base_add_h;
701701 u32 j = 0;
702702
703− sprintf(result[j++], "%8u", index);
704− sprintf(result[j++], "%6u", readl_relaxed(ring->tqp->io_base +
703+ sprintf(result[j++], "%u", index);
704+ sprintf(result[j++], "%u", readl_relaxed(ring->tqp->io_base +
705705 HNS3_RING_TX_RING_BD_NUM_REG));
706706
707− sprintf(result[j++], "%2u", readl_relaxed(ring->tqp->io_base +
707+ sprintf(result[j++], "%u", readl_relaxed(ring->tqp->io_base +
708708 HNS3_RING_TX_RING_TC_REG));
709709
710− sprintf(result[j++], "%4u", readl_relaxed(ring->tqp->io_base +
710+ sprintf(result[j++], "%u", readl_relaxed(ring->tqp->io_base +
711711 HNS3_RING_TX_RING_TAIL_REG));
712712
713− sprintf(result[j++], "%4u", readl_relaxed(ring->tqp->io_base +
713+ sprintf(result[j++], "%u", readl_relaxed(ring->tqp->io_base +
714714 HNS3_RING_TX_RING_HEAD_REG));
715715
716− sprintf(result[j++], "%6u", readl_relaxed(ring->tqp->io_base +
716+ sprintf(result[j++], "%u", readl_relaxed(ring->tqp->io_base +
717717 HNS3_RING_TX_RING_FBDNUM_REG));
718718
719− sprintf(result[j++], "%6u", readl_relaxed(ring->tqp->io_base +
719+ sprintf(result[j++], "%u", readl_relaxed(ring->tqp->io_base +
720720 HNS3_RING_TX_RING_OFFSET_REG));
721721
722− sprintf(result[j++], "%6u", readl_relaxed(ring->tqp->io_base +
722+ sprintf(result[j++], "%u", readl_relaxed(ring->tqp->io_base +
723723 HNS3_RING_TX_RING_PKTNUM_RECORD_REG));
724724
725− sprintf(result[j++], "%7s", readl_relaxed(ring->tqp->io_base +
725+ sprintf(result[j++], "%s", readl_relaxed(ring->tqp->io_base +
726726 HNS3_RING_EN_REG) ? "on" : "off");
727727
728728 if (hnae3_ae_dev_tqp_txrx_indep_supported(ae_dev))
729− sprintf(result[j++], "%10s", readl_relaxed(ring->tqp->io_base +
729+ sprintf(result[j++], "%s", readl_relaxed(ring->tqp->io_base +
730730 HNS3_RING_TX_EN_REG) ? "on" : "off");
731731 else
732− sprintf(result[j++], "%10s", "NA");
732+ sprintf(result[j++], "%s", "NA");
733733
734734 base_add_h = readl_relaxed(ring->tqp->io_base +
735735 HNS3_RING_TX_RING_BASEADDR_H_REG);
@@ -848,15 +848,15 @@ static void hns3_dump_rx_bd_info(struct hns3_nic_priv *priv, · 112 unmodified lines
848848 {
849849 unsigned int j = 0;
850850
851− sprintf(result[j++], "%5d", idx);
851+ sprintf(result[j++], "%d", idx);
852852 sprintf(result[j++], "%#x", le32_to_cpu(desc->rx.l234_info));
853− sprintf(result[j++], "%7u", le16_to_cpu(desc->rx.pkt_len));
854− sprintf(result[j++], "%4u", le16_to_cpu(desc->rx.size));
853+ sprintf(result[j++], "%u", le16_to_cpu(desc->rx.pkt_len));
854+ sprintf(result[j++], "%u", le16_to_cpu(desc->rx.size));
855855 sprintf(result[j++], "%#x", le32_to_cpu(desc->rx.rss_hash));
856− sprintf(result[j++], "%5u", le16_to_cpu(desc->rx.fd_id));
857− sprintf(result[j++], "%8u", le16_to_cpu(desc->rx.vlan_tag));
858− sprintf(result[j++], "%15u", le16_to_cpu(desc->rx.o_dm_vlan_id_fb));
859− sprintf(result[j++], "%11u", le16_to_cpu(desc->rx.ot_vlan_tag));
856+ sprintf(result[j++], "%u", le16_to_cpu(desc->rx.fd_id));
857+ sprintf(result[j++], "%u", le16_to_cpu(desc->rx.vlan_tag));
858+ sprintf(result[j++], "%u", le16_to_cpu(desc->rx.o_dm_vlan_id_fb));
859+ sprintf(result[j++], "%u", le16_to_cpu(desc->rx.ot_vlan_tag));
860860 sprintf(result[j++], "%#x", le32_to_cpu(desc->rx.bd_base_info));
861861 if (test_bit(HNS3_NIC_STATE_RXD_ADV_LAYOUT_ENABLE, &priv->state)) {
862862 u32 ol_info = le32_to_cpu(desc->rx.ol_info);
@@ -930,19 +930,19 @@ static void hns3_dump_tx_bd_info(struct hns3_nic_priv *priv, · 67 unmodified lines
930930 {
931931 unsigned int j = 0;
932932
933− sprintf(result[j++], "%6d", idx);
933+ sprintf(result[j++], "%d", idx);
934934 sprintf(result[j++], "%#llx", le64_to_cpu(desc->addr));
935− sprintf(result[j++], "%5u", le16_to_cpu(desc->tx.vlan_tag));
936− sprintf(result[j++], "%5u", le16_to_cpu(desc->tx.send_size));
935+ sprintf(result[j++], "%u", le16_to_cpu(desc->tx.vlan_tag));
936+ sprintf(result[j++], "%u", le16_to_cpu(desc->tx.send_size));
937937 sprintf(result[j++], "%#x",
938938 le32_to_cpu(desc->tx.type_cs_vlan_tso_len));
939− sprintf(result[j++], "%5u", le16_to_cpu(desc->tx.outer_vlan_tag));
940− sprintf(result[j++], "%5u", le16_to_cpu(desc->tx.tv));
941− sprintf(result[j++], "%10u",
939+ sprintf(result[j++], "%u", le16_to_cpu(desc->tx.outer_vlan_tag));
940+ sprintf(result[j++], "%u", le16_to_cpu(desc->tx.tv));
941+ sprintf(result[j++], "%u",
942942 le32_to_cpu(desc->tx.ol_type_vlan_len_msec));
943943 sprintf(result[j++], "%#x", le32_to_cpu(desc->tx.paylen_ol4cs));
944944 sprintf(result[j++], "%#x", le16_to_cpu(desc->tx.bdtp_fe_sc_vld_ra_ri));
945− sprintf(result[j++], "%5u", le16_to_cpu(desc->tx.mss_hw_csum));
945+ sprintf(result[j++], "%u", le16_to_cpu(desc->tx.mss_hw_csum));
946946 }
947947
948948 static int hns3_dbg_tx_bd_info(struct hns3_dbg_data *d, char *buf, int len)
drivers/net/ethernet/hisilicon/hns3/hns3_enet.c+9−0
@@ -5203,6 +5203,13 @@ static void hns3_state_init(struct hnae3_handle *handle) · 5202 unmodified lines
52035203 set_bit(HNS3_NIC_STATE_RXD_ADV_LAYOUT_ENABLE, &priv->state);
52045204 }
52055205
5206+static void hns3_state_uninit(struct hnae3_handle *handle)
5207+{
5208+ struct hns3_nic_priv *priv = handle->priv;
5209+
5210+ clear_bit(HNS3_NIC_STATE_INITED, &priv->state);
5211+}
5212+
52065213 static int hns3_client_init(struct hnae3_handle *handle)
52075214 {
52085215 struct pci_dev *pdev = handle->pdev;
@@ -5320,7 +5327,9 @@ static int hns3_client_init(struct hnae3_handle *handle) · 111 unmodified lines
53205327 return ret;
53215328
53225329 out_reg_netdev_fail:
5330+ hns3_state_uninit(handle);
53235331 hns3_dbg_uninit(handle);
5332+ hns3_client_stop(handle);
53245333 out_client_start:
53255334 hns3_free_rx_cpu_rmap(netdev);
53265335 hns3_nic_uninit_irq(priv);
drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_mbx.c+20−11
@@ -94,6 +94,13 @@ static int hclge_send_mbx_msg(struct hclge_vport *vport, u8 *msg, u16 msg_len, · 93 unmodified lines
9494 enum hclge_comm_cmd_status status;
9595 struct hclge_desc desc;
9696
97+ if (msg_len > HCLGE_MBX_MAX_MSG_SIZE) {
98+ dev_err(&hdev->pdev->dev,
99+ "msg data length(=%u) exceeds maximum(=%u)\n",
100+ msg_len, HCLGE_MBX_MAX_MSG_SIZE);
101+ return -EMSGSIZE;
102+ }
103+
97104 resp_pf_to_vf = (struct hclge_mbx_pf_to_vf_cmd *)desc.data;
98105
99106 hclge_cmd_setup_basic_desc(&desc, HCLGEVF_OPC_MBX_PF_TO_VF, false);
@@ -176,7 +183,7 @@ static int hclge_get_ring_chain_from_mbx( · 76 unmodified lines
176183 ring_num = req->msg.ring_num;
177184
178185 if (ring_num > HCLGE_MBX_MAX_RING_CHAIN_PARAM_NUM)
179− return -ENOMEM;
186+ return -EINVAL;
180187
181188 for (i = 0; i < ring_num; i++) {
182189 if (req->msg.param[i].tqp_index >= vport->nic.kinfo.rss_size) {
@@ -587,9 +594,9 @@ static int hclge_set_vf_mtu(struct hclge_vport *vport, · 404 unmodified lines
587594 return hclge_set_vport_mtu(vport, mtu);
588595 }
589596
590−static void hclge_get_queue_id_in_pf(struct hclge_vport *vport,
591− struct hclge_mbx_vf_to_pf_cmd *mbx_req,
592− struct hclge_respond_to_vf_msg *resp_msg)
597+static int hclge_get_queue_id_in_pf(struct hclge_vport *vport,
598+ struct hclge_mbx_vf_to_pf_cmd *mbx_req,
599+ struct hclge_respond_to_vf_msg *resp_msg)
593600 {
594601 struct hnae3_handle *handle = &vport->nic;
595602 struct hclge_dev *hdev = vport->back;
@@ -599,17 +606,18 @@ static void hclge_get_queue_id_in_pf(struct hclge_vport *vport, · 3 unmodified lines
599606 if (queue_id >= handle->kinfo.num_tqps) {
600607 dev_err(&hdev->pdev->dev, "Invalid queue id(%u) from VF %u\n",
601608 queue_id, mbx_req->mbx_src_vfid);
602− return;
609+ return -EINVAL;
603610 }
604611
605612 qid_in_pf = hclge_covert_handle_qid_global(&vport->nic, queue_id);
606613 memcpy(resp_msg->data, &qid_in_pf, sizeof(qid_in_pf));
607614 resp_msg->len = sizeof(qid_in_pf);
615+ return 0;
608616 }
609617
610−static void hclge_get_rss_key(struct hclge_vport *vport,
611− struct hclge_mbx_vf_to_pf_cmd *mbx_req,
612− struct hclge_respond_to_vf_msg *resp_msg)
618+static int hclge_get_rss_key(struct hclge_vport *vport,
619+ struct hclge_mbx_vf_to_pf_cmd *mbx_req,
620+ struct hclge_respond_to_vf_msg *resp_msg)
613621 {
614622 #define HCLGE_RSS_MBX_RESP_LEN 8
615623 struct hclge_dev *hdev = vport->back;
@@ -627,13 +635,14 @@ static void hclge_get_rss_key(struct hclge_vport *vport, · 11 unmodified lines
627635 dev_warn(&hdev->pdev->dev,
628636 "failed to get the rss hash key, the index(%u) invalid !\n",
629637 index);
630− return;
638+ return -EINVAL;
631639 }
632640
633641 memcpy(resp_msg->data,
634642 &rss_cfg->rss_hash_key[index * HCLGE_RSS_MBX_RESP_LEN],
635643 HCLGE_RSS_MBX_RESP_LEN);
636644 resp_msg->len = HCLGE_RSS_MBX_RESP_LEN;
645+ return 0;
637646 }
638647
639648 static void hclge_link_fail_parse(struct hclge_dev *hdev, u8 link_fail_code)
@@ -809,10 +818,10 @@ void hclge_mbx_handler(struct hclge_dev *hdev) · 169 unmodified lines
809818 "VF fail(%d) to set mtu\n", ret);
810819 break;
811820 case HCLGE_MBX_GET_QID_IN_PF:
812− hclge_get_queue_id_in_pf(vport, req, &resp_msg);
821+ ret = hclge_get_queue_id_in_pf(vport, req, &resp_msg);
813822 break;
814823 case HCLGE_MBX_GET_RSS_KEY:
815− hclge_get_rss_key(vport, req, &resp_msg);
824+ ret = hclge_get_rss_key(vport, req, &resp_msg);
816825 break;
817826 case HCLGE_MBX_GET_LINK_MODE:
818827 hclge_get_link_mode(vport, req);
drivers/net/ethernet/huawei/hinic/hinic_hw_wq.c+5−2
@@ -771,7 +771,7 @@ struct hinic_hw_wqe *hinic_get_wqe(struct hinic_wq *wq, unsigned int wqe_size, · 770 unmodified lines
771771 /* If we only have one page, still need to get shadown wqe when
772772 * wqe rolling-over page
773773 */
774− if (curr_pg != end_pg || MASKED_WQE_IDX(wq, end_prod_idx) < *prod_idx) {
774+ if (curr_pg != end_pg || end_prod_idx < *prod_idx) {
775775 void *shadow_addr = &wq->shadow_wqe[curr_pg * wq->max_wqe_size];
776776
777777 copy_wqe_to_shadow(wq, shadow_addr, num_wqebbs, *prod_idx);
@@ -841,7 +841,10 @@ struct hinic_hw_wqe *hinic_read_wqe(struct hinic_wq *wq, unsigned int wqe_size, · 63 unmodified lines
841841
842842 *cons_idx = curr_cons_idx;
843843
844− if (curr_pg != end_pg) {
844+ /* If we only have one page, still need to get shadown wqe when
845+ * wqe rolling-over page
846+ */
847+ if (curr_pg != end_pg || end_cons_idx < curr_cons_idx) {
845848 void *shadow_addr = &wq->shadow_wqe[curr_pg * wq->max_wqe_size];
846849
847850 copy_wqe_to_shadow(wq, shadow_addr, num_wqebbs, *cons_idx);
drivers/net/ethernet/ibm/ibmvnic.c+35−94
@@ -3210,13 +3210,8 @@ static void ibmvnic_get_ringparam(struct net_device *netdev, · 3209 unmodified lines
32103210 {
32113211 struct ibmvnic_adapter *adapter = netdev_priv(netdev);
32123212
3213− if (adapter->priv_flags & IBMVNIC_USE_SERVER_MAXES) {
3214− ring->rx_max_pending = adapter->max_rx_add_entries_per_subcrq;
3215− ring->tx_max_pending = adapter->max_tx_entries_per_subcrq;
3216− } else {
3217− ring->rx_max_pending = IBMVNIC_MAX_QUEUE_SZ;
3218− ring->tx_max_pending = IBMVNIC_MAX_QUEUE_SZ;
3219− }
3213+ ring->rx_max_pending = adapter->max_rx_add_entries_per_subcrq;
3214+ ring->tx_max_pending = adapter->max_tx_entries_per_subcrq;
32203215 ring->rx_mini_max_pending = 0;
32213216 ring->rx_jumbo_max_pending = 0;
32223217 ring->rx_pending = adapter->req_rx_add_entries_per_subcrq;
@@ -3231,23 +3226,21 @@ static int ibmvnic_set_ringparam(struct net_device *netdev, · 8 unmodified lines
32313226 struct netlink_ext_ack *extack)
32323227 {
32333228 struct ibmvnic_adapter *adapter = netdev_priv(netdev);
3234− int ret;
32353229
3236− ret = 0;
3230+ if (ring->rx_pending > adapter->max_rx_add_entries_per_subcrq ||
3231+ ring->tx_pending > adapter->max_tx_entries_per_subcrq) {
3232+ netdev_err(netdev, "Invalid request.\n");
3233+ netdev_err(netdev, "Max tx buffers = %llu\n",
3234+ adapter->max_rx_add_entries_per_subcrq);
3235+ netdev_err(netdev, "Max rx buffers = %llu\n",
3236+ adapter->max_tx_entries_per_subcrq);
3237+ return -EINVAL;
3238+ }
3239+
32373240 adapter->desired.rx_entries = ring->rx_pending;
32383241 adapter->desired.tx_entries = ring->tx_pending;
32393242
3240− ret = wait_for_reset(adapter);
3241−
3242− if (!ret &&
3243− (adapter->req_rx_add_entries_per_subcrq != ring->rx_pending ||
3244− adapter->req_tx_entries_per_subcrq != ring->tx_pending))
3245− netdev_info(netdev,
3246− "Could not match full ringsize request. Requested: RX %d, TX %d; Allowed: RX %llu, TX %llu\n",
3247− ring->rx_pending, ring->tx_pending,
3248− adapter->req_rx_add_entries_per_subcrq,
3249− adapter->req_tx_entries_per_subcrq);
3250− return ret;
3243+ return wait_for_reset(adapter);
32513244 }
32523245
32533246 static void ibmvnic_get_channels(struct net_device *netdev,
@@ -3255,14 +3248,8 @@ static void ibmvnic_get_channels(struct net_device *netdev, · 1 unmodified line
32553248 {
32563249 struct ibmvnic_adapter *adapter = netdev_priv(netdev);
32573250
3258− if (adapter->priv_flags & IBMVNIC_USE_SERVER_MAXES) {
3259− channels->max_rx = adapter->max_rx_queues;
3260− channels->max_tx = adapter->max_tx_queues;
3261− } else {
3262− channels->max_rx = IBMVNIC_MAX_QUEUES;
3263− channels->max_tx = IBMVNIC_MAX_QUEUES;
3264− }
3265−
3251+ channels->max_rx = adapter->max_rx_queues;
3252+ channels->max_tx = adapter->max_tx_queues;
32663253 channels->max_other = 0;
32673254 channels->max_combined = 0;
32683255 channels->rx_count = adapter->req_rx_queues;
@@ -3275,22 +3262,11 @@ static int ibmvnic_set_channels(struct net_device *netdev, · 6 unmodified lines
32753262 struct ethtool_channels *channels)
32763263 {
32773264 struct ibmvnic_adapter *adapter = netdev_priv(netdev);
3278− int ret;
32793265
3280− ret = 0;
32813266 adapter->desired.rx_queues = channels->rx_count;
32823267 adapter->desired.tx_queues = channels->tx_count;
32833268
3284− ret = wait_for_reset(adapter);
3285−
3286− if (!ret &&
3287− (adapter->req_rx_queues != channels->rx_count ||
3288− adapter->req_tx_queues != channels->tx_count))
3289− netdev_info(netdev,
3290− "Could not match full channels request. Requested: RX %d, TX %d; Allowed: RX %llu, TX %llu\n",
3291− channels->rx_count, channels->tx_count,
3292− adapter->req_rx_queues, adapter->req_tx_queues);
3293− return ret;
3269+ return wait_for_reset(adapter);
32943270 }
32953271
32963272 static void ibmvnic_get_strings(struct net_device *dev, u32 stringset, u8 *data)
@@ -3298,43 +3274,32 @@ static void ibmvnic_get_strings(struct net_device *dev, u32 stringset, u8 *data) · 1 unmodified line
32983274 struct ibmvnic_adapter *adapter = netdev_priv(dev);
32993275 int i;
33003276
3301− switch (stringset) {
3302− case ETH_SS_STATS:
3303− for (i = 0; i < ARRAY_SIZE(ibmvnic_stats);
3304− i++, data += ETH_GSTRING_LEN)
3305− memcpy(data, ibmvnic_stats[i].name, ETH_GSTRING_LEN);
3277+ if (stringset != ETH_SS_STATS)
3278+ return;
33063279
3307− for (i = 0; i < adapter->req_tx_queues; i++) {
3308− snprintf(data, ETH_GSTRING_LEN, "tx%d_packets", i);
3309− data += ETH_GSTRING_LEN;
3280+ for (i = 0; i < ARRAY_SIZE(ibmvnic_stats); i++, data += ETH_GSTRING_LEN)
3281+ memcpy(data, ibmvnic_stats[i].name, ETH_GSTRING_LEN);
33103282
3311− snprintf(data, ETH_GSTRING_LEN, "tx%d_bytes", i);
3312− data += ETH_GSTRING_LEN;
3283+ for (i = 0; i < adapter->req_tx_queues; i++) {
3284+ snprintf(data, ETH_GSTRING_LEN, "tx%d_packets", i);
3285+ data += ETH_GSTRING_LEN;
33133286
3314− snprintf(data, ETH_GSTRING_LEN,
3315− "tx%d_dropped_packets", i);
3316− data += ETH_GSTRING_LEN;
3317− }
3287+ snprintf(data, ETH_GSTRING_LEN, "tx%d_bytes", i);
3288+ data += ETH_GSTRING_LEN;
33183289
3319− for (i = 0; i < adapter->req_rx_queues; i++) {
3320− snprintf(data, ETH_GSTRING_LEN, "rx%d_packets", i);
3321− data += ETH_GSTRING_LEN;
3290+ snprintf(data, ETH_GSTRING_LEN, "tx%d_dropped_packets", i);
3291+ data += ETH_GSTRING_LEN;
3292+ }
33223293
3323− snprintf(data, ETH_GSTRING_LEN, "rx%d_bytes", i);
3324− data += ETH_GSTRING_LEN;
3294+ for (i = 0; i < adapter->req_rx_queues; i++) {
3295+ snprintf(data, ETH_GSTRING_LEN, "rx%d_packets", i);
3296+ data += ETH_GSTRING_LEN;
33253297
3326− snprintf(data, ETH_GSTRING_LEN, "rx%d_interrupts", i);
3327− data += ETH_GSTRING_LEN;
3328− }
3329− break;
3298+ snprintf(data, ETH_GSTRING_LEN, "rx%d_bytes", i);
3299+ data += ETH_GSTRING_LEN;
33303300
3331− case ETH_SS_PRIV_FLAGS:
3332− for (i = 0; i < ARRAY_SIZE(ibmvnic_priv_flags); i++)
3333− strcpy(data + i * ETH_GSTRING_LEN,
3334− ibmvnic_priv_flags[i]);
3335− break;
3336− default:
3337− return;
3301+ snprintf(data, ETH_GSTRING_LEN, "rx%d_interrupts", i);
3302+ data += ETH_GSTRING_LEN;
33383303 }
33393304 }
33403305
@@ -3347,8 +3312,6 @@ static int ibmvnic_get_sset_count(struct net_device *dev, int sset) · 6 unmodified lines
33473312 return ARRAY_SIZE(ibmvnic_stats) +
33483313 adapter->req_tx_queues * NUM_TX_STATS +
33493314 adapter->req_rx_queues * NUM_RX_STATS;
3350− case ETH_SS_PRIV_FLAGS:
3351− return ARRAY_SIZE(ibmvnic_priv_flags);
33523315 default:
33533316 return -EOPNOTSUPP;
33543317 }
@@ -3401,26 +3364,6 @@ static void ibmvnic_get_ethtool_stats(struct net_device *dev, · 46 unmodified lines
34013364 }
34023365 }
34033366
3404−static u32 ibmvnic_get_priv_flags(struct net_device *netdev)
3405−{
3406− struct ibmvnic_adapter *adapter = netdev_priv(netdev);
3407−
3408− return adapter->priv_flags;
3409−}
3410−
3411−static int ibmvnic_set_priv_flags(struct net_device *netdev, u32 flags)
3412−{
3413− struct ibmvnic_adapter *adapter = netdev_priv(netdev);
3414− bool which_maxes = !!(flags & IBMVNIC_USE_SERVER_MAXES);
3415−
3416− if (which_maxes)
3417− adapter->priv_flags |= IBMVNIC_USE_SERVER_MAXES;
3418− else
3419− adapter->priv_flags &= ~IBMVNIC_USE_SERVER_MAXES;
3420−
3421− return 0;
3422−}
3423−
34243367 static const struct ethtool_ops ibmvnic_ethtool_ops = {
34253368 .get_drvinfo = ibmvnic_get_drvinfo,
34263369 .get_msglevel = ibmvnic_get_msglevel,
@@ -3434,8 +3377,6 @@ static const struct ethtool_ops ibmvnic_ethtool_ops = { · 7 unmodified lines
34343377 .get_sset_count = ibmvnic_get_sset_count,
34353378 .get_ethtool_stats = ibmvnic_get_ethtool_stats,
34363379 .get_link_ksettings = ibmvnic_get_link_ksettings,
3437− .get_priv_flags = ibmvnic_get_priv_flags,
3438− .set_priv_flags = ibmvnic_set_priv_flags,
34393380 };
34403381
34413382 /* Routines for managing CRQs/sCRQs */
drivers/net/ethernet/ibm/ibmvnic.h+0−6
@@ -41,11 +41,6 @@ · 40 unmodified lines
4141
4242 #define IBMVNIC_RESET_DELAY 100
4343
44−static const char ibmvnic_priv_flags[][ETH_GSTRING_LEN] = {
45−#define IBMVNIC_USE_SERVER_MAXES 0x1
46− "use-server-maxes"
47−};
48−
4944 struct ibmvnic_login_buffer {
5045 __be32 len;
5146 __be32 version;
@@ -883,7 +878,6 @@ struct ibmvnic_adapter { · 831 unmodified lines
883878 struct ibmvnic_control_ip_offload_buffer ip_offload_ctrl;
884879 dma_addr_t ip_offload_ctrl_tok;
885880 u32 msg_enable;
886− u32 priv_flags;
887881
888882 /* Vital Product Data (VPD) */
889883 struct ibmvnic_vpd *vpd;
drivers/net/ethernet/intel/i40e/i40e_main.c+14−13
@@ -7549,42 +7549,43 @@ static void i40e_free_macvlan_channels(struct i40e_vsi *vsi) · 7548 unmodified lines
75497549 static int i40e_fwd_ring_up(struct i40e_vsi *vsi, struct net_device *vdev,
75507550 struct i40e_fwd_adapter *fwd)
75517551 {
7552+ struct i40e_channel *ch = NULL, *ch_tmp, *iter;
75527553 int ret = 0, num_tc = 1, i, aq_err;
7553− struct i40e_channel *ch, *ch_tmp;
75547554 struct i40e_pf *pf = vsi->back;
75557555 struct i40e_hw *hw = &pf->hw;
75567556
7557− if (list_empty(&vsi->macvlan_list))
7558− return -EINVAL;
7559−
75607557 /* Go through the list and find an available channel */
7561− list_for_each_entry_safe(ch, ch_tmp, &vsi->macvlan_list, list) {
7562− if (!i40e_is_channel_macvlan(ch)) {
7563− ch->fwd = fwd;
7558+ list_for_each_entry_safe(iter, ch_tmp, &vsi->macvlan_list, list) {
7559+ if (!i40e_is_channel_macvlan(iter)) {
7560+ iter->fwd = fwd;
75647561 /* record configuration for macvlan interface in vdev */
75657562 for (i = 0; i < num_tc; i++)
75667563 netdev_bind_sb_channel_queue(vsi->netdev, vdev,
75677564 i,
7568− ch->num_queue_pairs,
7569− ch->base_queue);
7570− for (i = 0; i < ch->num_queue_pairs; i++) {
7565+ iter->num_queue_pairs,
7566+ iter->base_queue);
7567+ for (i = 0; i < iter->num_queue_pairs; i++) {
75717568 struct i40e_ring *tx_ring, *rx_ring;
75727569 u16 pf_q;
75737570
7574− pf_q = ch->base_queue + i;
7571+ pf_q = iter->base_queue + i;
75757572
75767573 /* Get to TX ring ptr */
75777574 tx_ring = vsi->tx_rings[pf_q];
7578− tx_ring->ch = ch;
7575+ tx_ring->ch = iter;
75797576
75807577 /* Get the RX ring ptr */
75817578 rx_ring = vsi->rx_rings[pf_q];
7582− rx_ring->ch = ch;
7579+ rx_ring->ch = iter;
75837580 }
7581+ ch = iter;
75847582 break;
75857583 }
75867584 }
75877585
7586+ if (!ch)
7587+ return -EINVAL;
7588+
75887589 /* Guarantee all rings are updated before we update the
75897590 * MAC address filter.
75907591 */
drivers/net/ethernet/intel/ice/ice.h+1−0
@@ -540,6 +540,7 @@ struct ice_pf { · 539 unmodified lines
540540 struct mutex avail_q_mutex; /* protects access to avail_[rx|tx]qs */
541541 struct mutex sw_mutex; /* lock for protecting VSI alloc flow */
542542 struct mutex tc_mutex; /* lock to protect TC changes */
543+ struct mutex adev_mutex; /* lock to protect aux device access */
543544 u32 msg_enable;
544545 struct ice_ptp ptp;
545546 struct tty_driver *ice_gnss_tty_driver;
drivers/net/ethernet/intel/ice/ice_idc.c+17−8
@@ -37,14 +37,17 @@ void ice_send_event_to_aux(struct ice_pf *pf, struct iidc_event *event) · 36 unmodified lines
3737 if (WARN_ON_ONCE(!in_task()))
3838 return;
3939
40+ mutex_lock(&pf->adev_mutex);
4041 if (!pf->adev)
41− return;
42+ goto finish;
4243
4344 device_lock(&pf->adev->dev);
4445 iadrv = ice_get_auxiliary_drv(pf);
4546 if (iadrv && iadrv->event_handler)
4647 iadrv->event_handler(pf, event);
4748 device_unlock(&pf->adev->dev);
49+finish:
50+ mutex_unlock(&pf->adev_mutex);
4851 }
4952
5053 /**
@@ -290,7 +293,6 @@ int ice_plug_aux_dev(struct ice_pf *pf) · 239 unmodified lines
290293 return -ENOMEM;
291294
292295 adev = &iadev->adev;
293− pf->adev = adev;
294296 iadev->pf = pf;
295297
296298 adev->id = pf->aux_idx;
@@ -300,18 +302,20 @@ int ice_plug_aux_dev(struct ice_pf *pf) · 3 unmodified lines
300302
301303 ret = auxiliary_device_init(adev);
302304 if (ret) {
303− pf->adev = NULL;
304305 kfree(iadev);
305306 return ret;
306307 }
307308
308309 ret = auxiliary_device_add(adev);
309310 if (ret) {
310− pf->adev = NULL;
311311 auxiliary_device_uninit(adev);
312312 return ret;
313313 }
314314
315+ mutex_lock(&pf->adev_mutex);
316+ pf->adev = adev;
317+ mutex_unlock(&pf->adev_mutex);
318+
315319 return 0;
316320 }
317321
@@ -320,12 +324,17 @@ int ice_plug_aux_dev(struct ice_pf *pf) · 2 unmodified lines
320324 */
321325 void ice_unplug_aux_dev(struct ice_pf *pf)
322326 {
323− if (!pf->adev)
324− return;
327+ struct auxiliary_device *adev;
325328
326− auxiliary_device_delete(pf->adev);
327− auxiliary_device_uninit(pf->adev);
329+ mutex_lock(&pf->adev_mutex);
330+ adev = pf->adev;
328331 pf->adev = NULL;
332+ mutex_unlock(&pf->adev_mutex);
333+
334+ if (adev) {
335+ auxiliary_device_delete(adev);
336+ auxiliary_device_uninit(adev);
337+ }
329338 }
330339
331340 /**
drivers/net/ethernet/intel/ice/ice_main.c+5−0
@@ -3769,6 +3769,7 @@ u16 ice_get_avail_rxq_count(struct ice_pf *pf) · 3768 unmodified lines
37693769 static void ice_deinit_pf(struct ice_pf *pf)
37703770 {
37713771 ice_service_task_stop(pf);
3772+ mutex_destroy(&pf->adev_mutex);
37723773 mutex_destroy(&pf->sw_mutex);
37733774 mutex_destroy(&pf->tc_mutex);
37743775 mutex_destroy(&pf->avail_q_mutex);
@@ -3847,6 +3848,7 @@ static int ice_init_pf(struct ice_pf *pf) · 72 unmodified lines
38473848
38483849 mutex_init(&pf->sw_mutex);
38493850 mutex_init(&pf->tc_mutex);
3851+ mutex_init(&pf->adev_mutex);
38503852
38513853 INIT_HLIST_HEAD(&pf->aq_wait_list);
38523854 spin_lock_init(&pf->aq_wait_lock);
@@ -6929,12 +6931,15 @@ static void ice_rebuild(struct ice_pf *pf, enum ice_reset_req reset_type) · 3076 unmodified lines
69296931
69306932 dev_dbg(dev, "rebuilding PF after reset_type=%d\n", reset_type);
69316933
6934+#define ICE_EMP_RESET_SLEEP_MS 5000
69326935 if (reset_type == ICE_RESET_EMPR) {
69336936 /* If an EMP reset has occurred, any previously pending flash
69346937 * update will have completed. We no longer know whether or
69356938 * not the NVM update EMP reset is restricted.
69366939 */
69376940 pf->fw_emp_reset_disabled = false;
6941+
6942+ msleep(ICE_EMP_RESET_SLEEP_MS);
69386943 }
69396944
69406945 err = ice_init_all_ctrlq(hw);
drivers/net/ethernet/intel/ice/ice_ptp.c+8−2
@@ -2287,6 +2287,7 @@ ice_ptp_init_tx_e810(struct ice_pf *pf, struct ice_ptp_tx *tx) · 2286 unmodified lines
22872287
22882288 /**
22892289 * ice_ptp_tx_tstamp_cleanup - Cleanup old timestamp requests that got dropped
2290+ * @hw: pointer to the hw struct
22902291 * @tx: PTP Tx tracker to clean up
22912292 *
22922293 * Loop through the Tx timestamp requests and see if any of them have been
@@ -2295,7 +2296,7 @@ ice_ptp_init_tx_e810(struct ice_pf *pf, struct ice_ptp_tx *tx) · 2 unmodified lines
22952296 * timestamp will never be captured. This might happen if the packet gets
22962297 * discarded before it reaches the PHY timestamping block.
22972298 */
2298−static void ice_ptp_tx_tstamp_cleanup(struct ice_ptp_tx *tx)
2299+static void ice_ptp_tx_tstamp_cleanup(struct ice_hw *hw, struct ice_ptp_tx *tx)
22992300 {
23002301 u8 idx;
23012302
@@ -2304,11 +2305,16 @@ static void ice_ptp_tx_tstamp_cleanup(struct ice_ptp_tx *tx) · 2 unmodified lines
23042305
23052306 for_each_set_bit(idx, tx->in_use, tx->len) {
23062307 struct sk_buff *skb;
2308+ u64 raw_tstamp;
23072309
23082310 /* Check if this SKB has been waiting for too long */
23092311 if (time_is_after_jiffies(tx->tstamps[idx].start + 2 * HZ))
23102312 continue;
23112313
2314+ /* Read tstamp to be able to use this register again */
2315+ ice_read_phy_tstamp(hw, tx->quad, idx + tx->quad_offset,
2316+ &raw_tstamp);
2317+
23122318 spin_lock(&tx->lock);
23132319 skb = tx->tstamps[idx].skb;
23142320 tx->tstamps[idx].skb = NULL;
@@ -2330,7 +2336,7 @@ static void ice_ptp_periodic_work(struct kthread_work *work) · 15 unmodified lines
23302336
23312337 ice_ptp_update_cached_phctime(pf);
23322338
2333− ice_ptp_tx_tstamp_cleanup(&pf->ptp.port.tx);
2339+ ice_ptp_tx_tstamp_cleanup(&pf->hw, &pf->ptp.port.tx);
23342340
23352341 /* Run twice a second */
23362342 kthread_queue_delayed_work(ptp->kworker, &ptp->work,
drivers/net/ethernet/intel/ice/ice_sriov.c+1−1
@@ -1046,8 +1046,8 @@ int ice_sriov_configure(struct pci_dev *pdev, int num_vfs) · 1045 unmodified lines
10461046
10471047 if (!num_vfs) {
10481048 if (!pci_vfs_assigned(pdev)) {
1049− ice_mbx_deinit_snapshot(&pf->hw);
10501049 ice_free_vfs(pf);
1050+ ice_mbx_deinit_snapshot(&pf->hw);
10511051 if (pf->lag)
10521052 ice_enable_lag(pf->lag);
10531053 return 0;
drivers/net/ethernet/intel/ice/ice_virtchnl.c+59−36
@@ -1307,13 +1307,52 @@ error_param: · 1306 unmodified lines
13071307 NULL, 0);
13081308 }
13091309
1310+/**
1311+ * ice_vf_vsi_dis_single_txq - disable a single Tx queue
1312+ * @vf: VF to disable queue for
1313+ * @vsi: VSI for the VF
1314+ * @q_id: VF relative (0-based) queue ID
1315+ *
1316+ * Attempt to disable the Tx queue passed in. If the Tx queue was successfully
1317+ * disabled then clear q_id bit in the enabled queues bitmap and return
1318+ * success. Otherwise return error.
1319+ */
1320+static int
1321+ice_vf_vsi_dis_single_txq(struct ice_vf *vf, struct ice_vsi *vsi, u16 q_id)
1322+{
1323+ struct ice_txq_meta txq_meta = { 0 };
1324+ struct ice_tx_ring *ring;
1325+ int err;
1326+
1327+ if (!test_bit(q_id, vf->txq_ena))
1328+ dev_dbg(ice_pf_to_dev(vsi->back), "Queue %u on VSI %u is not enabled, but stopping it anyway\n",
1329+ q_id, vsi->vsi_num);
1330+
1331+ ring = vsi->tx_rings[q_id];
1332+ if (!ring)
1333+ return -EINVAL;
1334+
1335+ ice_fill_txq_meta(vsi, ring, &txq_meta);
1336+
1337+ err = ice_vsi_stop_tx_ring(vsi, ICE_NO_RESET, vf->vf_id, ring, &txq_meta);
1338+ if (err) {
1339+ dev_err(ice_pf_to_dev(vsi->back), "Failed to stop Tx ring %d on VSI %d\n",
1340+ q_id, vsi->vsi_num);
1341+ return err;
1342+ }
1343+
1344+ /* Clear enabled queues flag */
1345+ clear_bit(q_id, vf->txq_ena);
1346+
1347+ return 0;
1348+}
1349+
13101350 /**
13111351 * ice_vc_dis_qs_msg
13121352 * @vf: pointer to the VF info
13131353 * @msg: pointer to the msg buffer
13141354 *
1315− * called from the VF to disable all or specific
1316− * queue(s)
1355+ * called from the VF to disable all or specific queue(s)
13171356 */
13181357 static int ice_vc_dis_qs_msg(struct ice_vf *vf, u8 *msg)
13191358 {
@@ -1350,30 +1389,15 @@ static int ice_vc_dis_qs_msg(struct ice_vf *vf, u8 *msg) · 30 unmodified lines
13501389 q_map = vqs->tx_queues;
13511390
13521391 for_each_set_bit(vf_q_id, &q_map, ICE_MAX_RSS_QS_PER_VF) {
1353− struct ice_tx_ring *ring = vsi->tx_rings[vf_q_id];
1354− struct ice_txq_meta txq_meta = { 0 };
1355−
13561392 if (!ice_vc_isvalid_q_id(vf, vqs->vsi_id, vf_q_id)) {
13571393 v_ret = VIRTCHNL_STATUS_ERR_PARAM;
13581394 goto error_param;
13591395 }
13601396
1361− if (!test_bit(vf_q_id, vf->txq_ena))
1362− dev_dbg(ice_pf_to_dev(vsi->back), "Queue %u on VSI %u is not enabled, but stopping it anyway\n",
1363− vf_q_id, vsi->vsi_num);
1364−
1365− ice_fill_txq_meta(vsi, ring, &txq_meta);
1366−
1367− if (ice_vsi_stop_tx_ring(vsi, ICE_NO_RESET, vf->vf_id,
1368− ring, &txq_meta)) {
1369− dev_err(ice_pf_to_dev(vsi->back), "Failed to stop Tx ring %d on VSI %d\n",
1370− vf_q_id, vsi->vsi_num);
1397+ if (ice_vf_vsi_dis_single_txq(vf, vsi, vf_q_id)) {
13711398 v_ret = VIRTCHNL_STATUS_ERR_PARAM;
13721399 goto error_param;
13731400 }
1374−
1375− /* Clear enabled queues flag */
1376− clear_bit(vf_q_id, vf->txq_ena);
13771401 }
13781402 }
13791403
@@ -1622,6 +1646,14 @@ static int ice_vc_cfg_qs_msg(struct ice_vf *vf, u8 *msg) · 242 unmodified lines
16221646 if (qpi->txq.ring_len > 0) {
16231647 vsi->tx_rings[i]->dma = qpi->txq.dma_ring_addr;
16241648 vsi->tx_rings[i]->count = qpi->txq.ring_len;
1649+
1650+ /* Disable any existing queue first */
1651+ if (ice_vf_vsi_dis_single_txq(vf, vsi, q_idx)) {
1652+ v_ret = VIRTCHNL_STATUS_ERR_PARAM;
1653+ goto error_param;
1654+ }
1655+
1656+ /* Configure a queue with the requested settings */
16251657 if (ice_vsi_cfg_single_txq(vsi, vsi->tx_rings, q_idx)) {
16261658 v_ret = VIRTCHNL_STATUS_ERR_PARAM;
16271659 goto error_param;
@@ -3625,6 +3657,8 @@ void ice_vc_process_vf_msg(struct ice_pf *pf, struct ice_rq_event_info *event) · 1997 unmodified lines
36253657 return;
36263658 }
36273659
3660+ mutex_lock(&vf->cfg_lock);
3661+
36283662 /* Check if VF is disabled. */
36293663 if (test_bit(ICE_VF_STATE_DIS, vf->vf_states)) {
36303664 err = -EPERM;
@@ -3642,32 +3676,20 @@ void ice_vc_process_vf_msg(struct ice_pf *pf, struct ice_rq_event_info *event) · 11 unmodified lines
36423676 err = -EINVAL;
36433677 }
36443678
3645− if (!ice_vc_is_opcode_allowed(vf, v_opcode)) {
3646− ice_vc_send_msg_to_vf(vf, v_opcode,
3647− VIRTCHNL_STATUS_ERR_NOT_SUPPORTED, NULL,
3648− 0);
3649− ice_put_vf(vf);
3650− return;
3651− }
3652−
36533679 error_handler:
36543680 if (err) {
36553681 ice_vc_send_msg_to_vf(vf, v_opcode, VIRTCHNL_STATUS_ERR_PARAM,
36563682 NULL, 0);
36573683 dev_err(dev, "Invalid message from VF %d, opcode %d, len %d, error %d\n",
36583684 vf_id, v_opcode, msglen, err);
3659− ice_put_vf(vf);
3660− return;
3685+ goto finish;
36613686 }
36623687
3663− /* VF is being configured in another context that triggers a VFR, so no
3664− * need to process this message
3665− */
3666− if (!mutex_trylock(&vf->cfg_lock)) {
3667− dev_info(dev, "VF %u is being configured in another context that will trigger a VFR, so there is no need to handle this message\n",
3668− vf->vf_id);
3669− ice_put_vf(vf);
3670− return;
3688+ if (!ice_vc_is_opcode_allowed(vf, v_opcode)) {
3689+ ice_vc_send_msg_to_vf(vf, v_opcode,
3690+ VIRTCHNL_STATUS_ERR_NOT_SUPPORTED, NULL,
3691+ 0);
3692+ goto finish;
36713693 }
36723694
36733695 switch (v_opcode) {
@@ -3780,6 +3802,7 @@ error_handler: · 106 unmodified lines
37803802 vf_id, v_opcode, err);
37813803 }
37823804
3805+finish:
37833806 mutex_unlock(&vf->cfg_lock);
37843807 ice_put_vf(vf);
37853808 }
drivers/net/ethernet/intel/ixgbe/ixgbe_ipsec.c+2−1
@@ -903,7 +903,8 @@ int ixgbe_ipsec_vf_add_sa(struct ixgbe_adapter *adapter, u32 *msgbuf, u32 vf) · 902 unmodified lines
903903 /* Tx IPsec offload doesn't seem to work on this
904904 * device, so block these requests for now.
905905 */
906− if (!(sam->flags & XFRM_OFFLOAD_INBOUND)) {
906+ sam->flags = sam->flags & ~XFRM_OFFLOAD_IPV6;
907+ if (sam->flags != XFRM_OFFLOAD_INBOUND) {
907908 err = -EOPNOTSUPP;
908909 goto err_out;
909910 }
drivers/net/ethernet/mediatek/mtk_ppe.c+1−1
@@ -395,7 +395,7 @@ static void mtk_ppe_init_foe_table(struct mtk_ppe *ppe) · 394 unmodified lines
395395 static const u8 skip[] = { 12, 25, 38, 51, 76, 89, 102 };
396396 int i, k;
397397
398− memset(ppe->foe_table, 0, MTK_PPE_ENTRIES * sizeof(ppe->foe_table));
398+ memset(ppe->foe_table, 0, MTK_PPE_ENTRIES * sizeof(*ppe->foe_table));
399399
400400 if (!IS_ENABLED(CONFIG_SOC_MT7621))
401401 return;
drivers/net/ethernet/mediatek/mtk_sgmii.c+1−0
@@ -26,6 +26,7 @@ int mtk_sgmii_init(struct mtk_sgmii *ss, struct device_node *r, u32 ana_rgc3) · 25 unmodified lines
2626 break;
2727
2828 ss->regmap[i] = syscon_node_to_regmap(np);
29+ of_node_put(np);
2930 if (IS_ERR(ss->regmap[i]))
3031 return PTR_ERR(ss->regmap[i]);
3132 }
drivers/net/ethernet/mellanox/mlx5/core/diag/rsc_dump.c+25−6
@@ -31,6 +31,7 @@ static const char *const mlx5_rsc_sgmt_name[] = { · 30 unmodified lines
3131 struct mlx5_rsc_dump {
3232 u32 pdn;
3333 u32 mkey;
34+ u32 number_of_menu_items;
3435 u16 fw_segment_type[MLX5_SGMT_TYPE_NUM];
3536 };
3637
@@ -50,21 +51,37 @@ static int mlx5_rsc_dump_sgmt_get_by_name(char *name) · 13 unmodified lines
5051 return -EINVAL;
5152 }
5253
53−static void mlx5_rsc_dump_read_menu_sgmt(struct mlx5_rsc_dump *rsc_dump, struct page *page)
54+#define MLX5_RSC_DUMP_MENU_HEADER_SIZE (MLX5_ST_SZ_BYTES(resource_dump_info_segment) + \
55+ MLX5_ST_SZ_BYTES(resource_dump_command_segment) + \
56+ MLX5_ST_SZ_BYTES(resource_dump_menu_segment))
57+
58+static int mlx5_rsc_dump_read_menu_sgmt(struct mlx5_rsc_dump *rsc_dump, struct page *page,
59+ int read_size, int start_idx)
5460 {
5561 void *data = page_address(page);
5662 enum mlx5_sgmt_type sgmt_idx;
5763 int num_of_items;
5864 char *sgmt_name;
5965 void *member;
66+ int size = 0;
6067 void *menu;
6168 int i;
6269
63− menu = MLX5_ADDR_OF(menu_resource_dump_response, data, menu);
64− num_of_items = MLX5_GET(resource_dump_menu_segment, menu, num_of_records);
70+ if (!start_idx) {
71+ menu = MLX5_ADDR_OF(menu_resource_dump_response, data, menu);
72+ rsc_dump->number_of_menu_items = MLX5_GET(resource_dump_menu_segment, menu,
73+ num_of_records);
74+ size = MLX5_RSC_DUMP_MENU_HEADER_SIZE;
75+ data += size;
76+ }
77+ num_of_items = rsc_dump->number_of_menu_items;
78+
79+ for (i = 0; start_idx + i < num_of_items; i++) {
80+ size += MLX5_ST_SZ_BYTES(resource_dump_menu_record);
81+ if (size >= read_size)
82+ return start_idx + i;
6583
66− for (i = 0; i < num_of_items; i++) {
67− member = MLX5_ADDR_OF(resource_dump_menu_segment, menu, record[i]);
84+ member = data + MLX5_ST_SZ_BYTES(resource_dump_menu_record) * i;
6885 sgmt_name = MLX5_ADDR_OF(resource_dump_menu_record, member, segment_name);
6986 sgmt_idx = mlx5_rsc_dump_sgmt_get_by_name(sgmt_name);
7087 if (sgmt_idx == -EINVAL)
@@ -72,6 +89,7 @@ static void mlx5_rsc_dump_read_menu_sgmt(struct mlx5_rsc_dump *rsc_dump, struct · 1 unmodified line
7289 rsc_dump->fw_segment_type[sgmt_idx] = MLX5_GET(resource_dump_menu_record,
7390 member, segment_type);
7491 }
92+ return 0;
7593 }
7694
7795 static int mlx5_rsc_dump_trigger(struct mlx5_core_dev *dev, struct mlx5_rsc_dump_cmd *cmd,
@@ -168,6 +186,7 @@ static int mlx5_rsc_dump_menu(struct mlx5_core_dev *dev) · 90 unmodified lines
168186 struct mlx5_rsc_dump_cmd *cmd = NULL;
169187 struct mlx5_rsc_key key = {};
170188 struct page *page;
189+ int start_idx = 0;
171190 int size;
172191 int err;
173192
@@ -189,7 +208,7 @@ static int mlx5_rsc_dump_menu(struct mlx5_core_dev *dev) · 15 unmodified lines
189208 if (err < 0)
190209 goto destroy_cmd;
191210
192− mlx5_rsc_dump_read_menu_sgmt(dev->rsc_dump, page);
211+ start_idx = mlx5_rsc_dump_read_menu_sgmt(dev->rsc_dump, page, size, start_idx);
193212
194213 } while (err > 0);
195214
drivers/net/ethernet/mellanox/mlx5/core/en/port_buffer.c+2−2
@@ -309,8 +309,8 @@ int mlx5e_port_manual_buffer_config(struct mlx5e_priv *priv, · 308 unmodified lines
309309 if (err)
310310 return err;
311311
312− err = update_buffer_lossy(max_mtu, curr_pfc_en, prio2buffer, port_buff_cell_sz,
313− xoff, &port_buffer, &update_buffer);
312+ err = update_buffer_lossy(max_mtu, curr_pfc_en, prio2buffer, xoff,
313+ port_buff_cell_sz, &port_buffer, &update_buffer);
314314 if (err)
315315 return err;
316316 }
drivers/net/ethernet/mellanox/mlx5/core/en/tc/act/act.c+1−2
@@ -145,8 +145,7 @@ mlx5e_tc_act_post_parse(struct mlx5e_tc_act_parse_state *parse_state, · 144 unmodified lines
145145
146146 flow_action_for_each(i, act, flow_action) {
147147 tc_act = mlx5e_tc_act_get(act->id, ns_type);
148− if (!tc_act || !tc_act->post_parse ||
149− !tc_act->can_offload(parse_state, act, i, attr))
148+ if (!tc_act || !tc_act->post_parse)
150149 continue;
151150
152151 err = tc_act->post_parse(parse_state, priv, attr);
drivers/net/ethernet/mellanox/mlx5/core/en/tc/act/ct.c+32−2
@@ -45,12 +45,41 @@ tc_act_parse_ct(struct mlx5e_tc_act_parse_state *parse_state, · 44 unmodified lines
4545 if (mlx5e_is_eswitch_flow(parse_state->flow))
4646 attr->esw_attr->split_count = attr->esw_attr->out_count;
4747
48− if (!clear_action) {
48+ if (clear_action) {
49+ parse_state->ct_clear = true;
50+ } else {
4951 attr->flags |= MLX5_ATTR_FLAG_CT;
5052 flow_flag_set(parse_state->flow, CT);
5153 parse_state->ct = true;
5254 }
53− parse_state->ct_clear = clear_action;
55+
56+ return 0;
57+}
58+
59+static int
60+tc_act_post_parse_ct(struct mlx5e_tc_act_parse_state *parse_state,
61+ struct mlx5e_priv *priv,
62+ struct mlx5_flow_attr *attr)
63+{
64+ struct mlx5e_tc_mod_hdr_acts *mod_acts = &attr->parse_attr->mod_hdr_acts;
65+ int err;
66+
67+ /* If ct action exist, we can ignore previous ct_clear actions */
68+ if (parse_state->ct)
69+ return 0;
70+
71+ if (parse_state->ct_clear) {
72+ err = mlx5_tc_ct_set_ct_clear_regs(parse_state->ct_priv, mod_acts);
73+ if (err) {
74+ NL_SET_ERR_MSG_MOD(parse_state->extack,
75+ "Failed to set registers for ct clear");
76+ return err;
77+ }
78+ attr->action |= MLX5_FLOW_CONTEXT_ACTION_MOD_HDR;
79+
80+ /* Prevent handling of additional, redundant clear actions */
81+ parse_state->ct_clear = false;
82+ }
5483
5584 return 0;
5685 }
@@ -70,5 +99,6 @@ struct mlx5e_tc_act mlx5e_tc_act_ct = { · 13 unmodified lines
7099 .can_offload = tc_act_can_offload_ct,
71100 .parse_action = tc_act_parse_ct,
72101 .is_multi_table_act = tc_act_is_multi_table_act_ct,
102+ .post_parse = tc_act_post_parse_ct,
73103 };
74104
drivers/net/ethernet/mellanox/mlx5/core/en/tc_ct.c+10−14
@@ -582,6 +582,12 @@ mlx5_tc_ct_entry_set_registers(struct mlx5_tc_ct_priv *ct_priv, · 581 unmodified lines
582582 return 0;
583583 }
584584
585+int mlx5_tc_ct_set_ct_clear_regs(struct mlx5_tc_ct_priv *priv,
586+ struct mlx5e_tc_mod_hdr_acts *mod_acts)
587+{
588+ return mlx5_tc_ct_entry_set_registers(priv, mod_acts, 0, 0, 0, 0);
589+}
590+
585591 static int
586592 mlx5_tc_ct_parse_mangle_to_mod_act(struct flow_action_entry *act,
587593 char *modact)
@@ -1410,9 +1416,6 @@ mlx5_tc_ct_parse_action(struct mlx5_tc_ct_priv *priv, · 822 unmodified lines
14101416 const struct flow_action_entry *act,
14111417 struct netlink_ext_ack *extack)
14121418 {
1413− bool clear_action = act->ct.action & TCA_CT_ACT_CLEAR;
1414− int err;
1415−
14161419 if (!priv) {
14171420 NL_SET_ERR_MSG_MOD(extack,
14181421 "offload of ct action isn't available");
@@ -1423,17 +1426,6 @@ mlx5_tc_ct_parse_action(struct mlx5_tc_ct_priv *priv, · 4 unmodified lines
14231426 attr->ct_attr.ct_action = act->ct.action;
14241427 attr->ct_attr.nf_ft = act->ct.flow_table;
14251428
1426− if (!clear_action)
1427− goto out;
1428−
1429− err = mlx5_tc_ct_entry_set_registers(priv, mod_acts, 0, 0, 0, 0);
1430− if (err) {
1431− NL_SET_ERR_MSG_MOD(extack, "Failed to set registers for ct clear");
1432− return err;
1433− }
1434− attr->action |= MLX5_FLOW_CONTEXT_ACTION_MOD_HDR;
1435−
1436−out:
14371429 return 0;
14381430 }
14391431
@@ -1749,6 +1741,8 @@ mlx5_tc_ct_flush_ft_entry(void *ptr, void *arg) · 309 unmodified lines
17491741 static void
17501742 mlx5_tc_ct_del_ft_cb(struct mlx5_tc_ct_priv *ct_priv, struct mlx5_ct_ft *ft)
17511743 {
1744+ struct mlx5e_priv *priv;
1745+
17521746 if (!refcount_dec_and_test(&ft->refcount))
17531747 return;
17541748
@@ -1758,6 +1752,8 @@ mlx5_tc_ct_del_ft_cb(struct mlx5_tc_ct_priv *ct_priv, struct mlx5_ct_ft *ft) · 3 unmodified lines
17581752 rhashtable_free_and_destroy(&ft->ct_entries_ht,
17591753 mlx5_tc_ct_flush_ft_entry,
17601754 ct_priv);
1755+ priv = netdev_priv(ct_priv->netdev);
1756+ flush_workqueue(priv->wq);
17611757 mlx5_tc_ct_free_pre_ct_tables(ft);
17621758 mapping_remove(ct_priv->zone_mapping, ft->zone_restore_id);
17631759 kfree(ft);
drivers/net/ethernet/mellanox/mlx5/core/en/tc_ct.h+11−0
@@ -129,6 +129,10 @@ bool · 128 unmodified lines
129129 mlx5e_tc_ct_restore_flow(struct mlx5_tc_ct_priv *ct_priv,
130130 struct sk_buff *skb, u8 zone_restore_id);
131131
132+int
133+mlx5_tc_ct_set_ct_clear_regs(struct mlx5_tc_ct_priv *priv,
134+ struct mlx5e_tc_mod_hdr_acts *mod_acts);
135+
132136 #else /* CONFIG_MLX5_TC_CT */
133137
134138 static inline struct mlx5_tc_ct_priv *
@@ -170,6 +174,13 @@ mlx5_tc_ct_add_no_trk_match(struct mlx5_flow_spec *spec) · 35 unmodified lines
170174 return 0;
171175 }
172176
177+static inline int
178+mlx5_tc_ct_set_ct_clear_regs(struct mlx5_tc_ct_priv *priv,
179+ struct mlx5e_tc_mod_hdr_acts *mod_acts)
180+{
181+ return -EOPNOTSUPP;
182+}
183+
173184 static inline int
174185 mlx5_tc_ct_parse_action(struct mlx5_tc_ct_priv *priv,
175186 struct mlx5_flow_attr *attr,
drivers/net/ethernet/mellanox/mlx5/core/en/tc_tun.c+2−1
@@ -713,6 +713,7 @@ int mlx5e_tc_tun_route_lookup(struct mlx5e_priv *priv, · 712 unmodified lines
713713 struct net_device *filter_dev)
714714 {
715715 struct mlx5_esw_flow_attr *esw_attr = flow_attr->esw_attr;
716+ struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
716717 struct mlx5e_tc_int_port *int_port;
717718 TC_TUN_ROUTE_ATTR_INIT(attr);
718719 u16 vport_num;
@@ -747,7 +748,7 @@ int mlx5e_tc_tun_route_lookup(struct mlx5e_priv *priv, · 28 unmodified lines
747748 esw_attr->rx_tun_attr->vni = MLX5_GET(fte_match_param, spec->match_value,
748749 misc_parameters.vxlan_vni);
749750 esw_attr->rx_tun_attr->decap_vport = vport_num;
750− } else if (netif_is_ovs_master(attr.route_dev)) {
751+ } else if (netif_is_ovs_master(attr.route_dev) && mlx5e_tc_int_port_supported(esw)) {
751752 int_port = mlx5e_tc_int_port_get(mlx5e_get_int_port_priv(priv),
752753 attr.route_dev->ifindex,
753754 MLX5E_TC_INT_PORT_INGRESS);
drivers/net/ethernet/mellanox/mlx5/core/en_dcbnl.c+10−0
@@ -1200,6 +1200,16 @@ static int mlx5e_trust_initialize(struct mlx5e_priv *priv) · 1199 unmodified lines
12001200 return err;
12011201 WRITE_ONCE(priv->dcbx_dp.trust_state, trust_state);
12021202
1203+ if (priv->dcbx_dp.trust_state == MLX5_QPTS_TRUST_PCP && priv->dcbx.dscp_app_cnt) {
1204+ /*
1205+ * Align the driver state with the register state.
1206+ * Temporary state change is required to enable the app list reset.
1207+ */
1208+ priv->dcbx_dp.trust_state = MLX5_QPTS_TRUST_DSCP;
1209+ mlx5e_dcbnl_delete_app(priv);
1210+ priv->dcbx_dp.trust_state = MLX5_QPTS_TRUST_PCP;
1211+ }
1212+
12031213 mlx5e_params_calc_trust_tx_min_inline_mode(priv->mdev, &priv->channels.params,
12041214 priv->dcbx_dp.trust_state);
12051215
drivers/net/ethernet/mellanox/mlx5/core/en_tc.c+11−0
@@ -2459,6 +2459,17 @@ static int __parse_cls_flower(struct mlx5e_priv *priv, · 2458 unmodified lines
24592459 match.key->vlan_priority);
24602460
24612461 *match_level = MLX5_MATCH_L2;
2462+
2463+ if (!flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_CVLAN) &&
2464+ match.mask->vlan_eth_type &&
2465+ MLX5_CAP_FLOWTABLE_TYPE(priv->mdev,
2466+ ft_field_support.outer_second_vid,
2467+ fs_type)) {
2468+ MLX5_SET(fte_match_set_misc, misc_c,
2469+ outer_second_cvlan_tag, 1);
2470+ spec->match_criteria_enable |=
2471+ MLX5_MATCH_MISC_PARAMETERS;
2472+ }
24622473 }
24632474 } else if (*match_level != MLX5_MATCH_NONE) {
24642475 /* cvlan_tag enabled in match criteria and
drivers/net/ethernet/mellanox/mlx5/core/eswitch_offloads.c+1−1
@@ -139,7 +139,7 @@ mlx5_eswitch_set_rule_source_port(struct mlx5_eswitch *esw, · 138 unmodified lines
139139 if (mlx5_esw_indir_table_decap_vport(attr))
140140 vport = mlx5_esw_indir_table_decap_vport(attr);
141141
142− if (esw_attr->int_port)
142+ if (attr && !attr->chain && esw_attr->int_port)
143143 metadata =
144144 mlx5e_tc_int_port_get_metadata_for_match(esw_attr->int_port);
145145 else
drivers/net/ethernet/mellanox/mlx5/core/fw_reset.c+35−25
@@ -155,6 +155,28 @@ static void mlx5_fw_reset_complete_reload(struct mlx5_core_dev *dev) · 154 unmodified lines
155155 }
156156 }
157157
158+static void mlx5_stop_sync_reset_poll(struct mlx5_core_dev *dev)
159+{
160+ struct mlx5_fw_reset *fw_reset = dev->priv.fw_reset;
161+
162+ del_timer_sync(&fw_reset->timer);
163+}
164+
165+static int mlx5_sync_reset_clear_reset_requested(struct mlx5_core_dev *dev, bool poll_health)
166+{
167+ struct mlx5_fw_reset *fw_reset = dev->priv.fw_reset;
168+
169+ if (!test_and_clear_bit(MLX5_FW_RESET_FLAGS_RESET_REQUESTED, &fw_reset->reset_flags)) {
170+ mlx5_core_warn(dev, "Reset request was already cleared\n");
171+ return -EALREADY;
172+ }
173+
174+ mlx5_stop_sync_reset_poll(dev);
175+ if (poll_health)
176+ mlx5_start_health_poll(dev);
177+ return 0;
178+}
179+
158180 static void mlx5_sync_reset_reload_work(struct work_struct *work)
159181 {
160182 struct mlx5_fw_reset *fw_reset = container_of(work, struct mlx5_fw_reset,
@@ -162,6 +184,7 @@ static void mlx5_sync_reset_reload_work(struct work_struct *work) · 1 unmodified line
162184 struct mlx5_core_dev *dev = fw_reset->dev;
163185 int err;
164186
187+ mlx5_sync_reset_clear_reset_requested(dev, false);
165188 mlx5_enter_error_state(dev, true);
166189 mlx5_unload_one(dev);
167190 err = mlx5_health_wait_pci_up(dev);
@@ -171,23 +194,6 @@ static void mlx5_sync_reset_reload_work(struct work_struct *work) · 3 unmodified lines
171194 mlx5_fw_reset_complete_reload(dev);
172195 }
173196
174−static void mlx5_stop_sync_reset_poll(struct mlx5_core_dev *dev)
175−{
176− struct mlx5_fw_reset *fw_reset = dev->priv.fw_reset;
177−
178− del_timer_sync(&fw_reset->timer);
179−}
180−
181−static void mlx5_sync_reset_clear_reset_requested(struct mlx5_core_dev *dev, bool poll_health)
182−{
183− struct mlx5_fw_reset *fw_reset = dev->priv.fw_reset;
184−
185− mlx5_stop_sync_reset_poll(dev);
186− clear_bit(MLX5_FW_RESET_FLAGS_RESET_REQUESTED, &fw_reset->reset_flags);
187− if (poll_health)
188− mlx5_start_health_poll(dev);
189−}
190−
191197 #define MLX5_RESET_POLL_INTERVAL (HZ / 10)
192198 static void poll_sync_reset(struct timer_list *t)
193199 {
@@ -202,7 +208,6 @@ static void poll_sync_reset(struct timer_list *t) · 8 unmodified lines
202208
203209 if (fatal_error) {
204210 mlx5_core_warn(dev, "Got Device Reset\n");
205− mlx5_sync_reset_clear_reset_requested(dev, false);
206211 queue_work(fw_reset->wq, &fw_reset->reset_reload_work);
207212 return;
208213 }
@@ -229,13 +234,17 @@ static int mlx5_fw_reset_set_reset_sync_nack(struct mlx5_core_dev *dev) · 20 unmodified lines
229234 return mlx5_reg_mfrl_set(dev, MLX5_MFRL_REG_RESET_LEVEL3, 0, 2, false);
230235 }
231236
232−static void mlx5_sync_reset_set_reset_requested(struct mlx5_core_dev *dev)
237+static int mlx5_sync_reset_set_reset_requested(struct mlx5_core_dev *dev)
233238 {
234239 struct mlx5_fw_reset *fw_reset = dev->priv.fw_reset;
235240
241+ if (test_and_set_bit(MLX5_FW_RESET_FLAGS_RESET_REQUESTED, &fw_reset->reset_flags)) {
242+ mlx5_core_warn(dev, "Reset request was already set\n");
243+ return -EALREADY;
244+ }
236245 mlx5_stop_health_poll(dev, true);
237− set_bit(MLX5_FW_RESET_FLAGS_RESET_REQUESTED, &fw_reset->reset_flags);
238246 mlx5_start_sync_reset_poll(dev);
247+ return 0;
239248 }
240249
241250 static void mlx5_fw_live_patch_event(struct work_struct *work)
@@ -264,7 +273,9 @@ static void mlx5_sync_reset_request_event(struct work_struct *work) · 22 unmodified lines
264273 err ? "Failed" : "Sent");
265274 return;
266275 }
267− mlx5_sync_reset_set_reset_requested(dev);
276+ if (mlx5_sync_reset_set_reset_requested(dev))
277+ return;
278+
268279 err = mlx5_fw_reset_set_reset_sync_ack(dev);
269280 if (err)
270281 mlx5_core_warn(dev, "PCI Sync FW Update Reset Ack Failed. Error code: %d\n", err);
@@ -362,7 +373,8 @@ static void mlx5_sync_reset_now_event(struct work_struct *work) · 91 unmodified lines
362373 struct mlx5_core_dev *dev = fw_reset->dev;
363374 int err;
364375
365− mlx5_sync_reset_clear_reset_requested(dev, false);
376+ if (mlx5_sync_reset_clear_reset_requested(dev, false))
377+ return;
366378
367379 mlx5_core_warn(dev, "Sync Reset now. Device is going to reset.\n");
368380
@@ -391,10 +403,8 @@ static void mlx5_sync_reset_abort_event(struct work_struct *work) · 22 unmodified lines
391403 reset_abort_work);
392404 struct mlx5_core_dev *dev = fw_reset->dev;
393405
394− if (!test_bit(MLX5_FW_RESET_FLAGS_RESET_REQUESTED, &fw_reset->reset_flags))
406+ if (mlx5_sync_reset_clear_reset_requested(dev, true))
395407 return;
396−
397− mlx5_sync_reset_clear_reset_requested(dev, true);
398408 mlx5_core_warn(dev, "PCI Sync FW Update Reset Aborted.\n");
399409 }
400410
drivers/net/ethernet/mellanox/mlx5/core/lag/mp.c+24−14
@@ -100,6 +100,14 @@ static void mlx5_lag_fib_event_flush(struct notifier_block *nb) · 99 unmodified lines
100100 flush_workqueue(mp->wq);
101101 }
102102
103+static void mlx5_lag_fib_set(struct lag_mp *mp, struct fib_info *fi, u32 dst, int dst_len)
104+{
105+ mp->fib.mfi = fi;
106+ mp->fib.priority = fi->fib_priority;
107+ mp->fib.dst = dst;
108+ mp->fib.dst_len = dst_len;
109+}
110+
103111 struct mlx5_fib_event_work {
104112 struct work_struct work;
105113 struct mlx5_lag *ldev;
@@ -110,10 +118,10 @@ struct mlx5_fib_event_work { · 4 unmodified lines
110118 };
111119 };
112120
113−static void mlx5_lag_fib_route_event(struct mlx5_lag *ldev,
114− unsigned long event,
115− struct fib_info *fi)
121+static void mlx5_lag_fib_route_event(struct mlx5_lag *ldev, unsigned long event,
122+ struct fib_entry_notifier_info *fen_info)
116123 {
124+ struct fib_info *fi = fen_info->fi;
117125 struct lag_mp *mp = &ldev->lag_mp;
118126 struct fib_nh *fib_nh0, *fib_nh1;
119127 unsigned int nhs;
@@ -121,13 +129,15 @@ static void mlx5_lag_fib_route_event(struct mlx5_lag *ldev, · 1 unmodified line
121129 /* Handle delete event */
122130 if (event == FIB_EVENT_ENTRY_DEL) {
123131 /* stop track */
124− if (mp->mfi == fi)
125− mp->mfi = NULL;
132+ if (mp->fib.mfi == fi)
133+ mp->fib.mfi = NULL;
126134 return;
127135 }
128136
129137 /* Handle multipath entry with lower priority value */
130− if (mp->mfi && mp->mfi != fi && fi->fib_priority >= mp->mfi->fib_priority)
138+ if (mp->fib.mfi && mp->fib.mfi != fi &&
139+ (mp->fib.dst != fen_info->dst || mp->fib.dst_len != fen_info->dst_len) &&
140+ fi->fib_priority >= mp->fib.priority)
131141 return;
132142
133143 /* Handle add/replace event */
@@ -143,9 +153,9 @@ static void mlx5_lag_fib_route_event(struct mlx5_lag *ldev, · 9 unmodified lines
143153
144154 i++;
145155 mlx5_lag_set_port_affinity(ldev, i);
156+ mlx5_lag_fib_set(mp, fi, fen_info->dst, fen_info->dst_len);
146157 }
147158
148− mp->mfi = fi;
149159 return;
150160 }
151161
@@ -165,7 +175,7 @@ static void mlx5_lag_fib_route_event(struct mlx5_lag *ldev, · 13 unmodified lines
165175 }
166176
167177 /* First time we see multipath route */
168− if (!mp->mfi && !__mlx5_lag_is_active(ldev)) {
178+ if (!mp->fib.mfi && !__mlx5_lag_is_active(ldev)) {
169179 struct lag_tracker tracker;
170180
171181 tracker = ldev->tracker;
@@ -173,7 +183,7 @@ static void mlx5_lag_fib_route_event(struct mlx5_lag *ldev, · 1 unmodified line
173183 }
174184
175185 mlx5_lag_set_port_affinity(ldev, MLX5_LAG_NORMAL_AFFINITY);
176− mp->mfi = fi;
186+ mlx5_lag_fib_set(mp, fi, fen_info->dst, fen_info->dst_len);
177187 }
178188
179189 static void mlx5_lag_fib_nexthop_event(struct mlx5_lag *ldev,
@@ -184,7 +194,7 @@ static void mlx5_lag_fib_nexthop_event(struct mlx5_lag *ldev, · 4 unmodified lines
184194 struct lag_mp *mp = &ldev->lag_mp;
185195
186196 /* Check the nh event is related to the route */
187− if (!mp->mfi || mp->mfi != fi)
197+ if (!mp->fib.mfi || mp->fib.mfi != fi)
188198 return;
189199
190200 /* nh added/removed */
@@ -214,7 +224,7 @@ static void mlx5_lag_fib_update(struct work_struct *work) · 23 unmodified lines
214224 case FIB_EVENT_ENTRY_REPLACE:
215225 case FIB_EVENT_ENTRY_DEL:
216226 mlx5_lag_fib_route_event(ldev, fib_work->event,
217− fib_work->fen_info.fi);
227+ &fib_work->fen_info);
218228 fib_info_put(fib_work->fen_info.fi);
219229 break;
220230 case FIB_EVENT_NH_ADD:
@@ -313,7 +323,7 @@ void mlx5_lag_mp_reset(struct mlx5_lag *ldev) · 92 unmodified lines
313323 /* Clear mfi, as it might become stale when a route delete event
314324 * has been missed, see mlx5_lag_fib_route_event().
315325 */
316− ldev->lag_mp.mfi = NULL;
326+ ldev->lag_mp.fib.mfi = NULL;
317327 }
318328
319329 int mlx5_lag_mp_init(struct mlx5_lag *ldev)
@@ -324,7 +334,7 @@ int mlx5_lag_mp_init(struct mlx5_lag *ldev) · 4 unmodified lines
324334 /* always clear mfi, as it might become stale when a route delete event
325335 * has been missed
326336 */
327− mp->mfi = NULL;
337+ mp->fib.mfi = NULL;
328338
329339 if (mp->fib_nb.notifier_call)
330340 return 0;
@@ -354,5 +364,5 @@ void mlx5_lag_mp_cleanup(struct mlx5_lag *ldev) · 23 unmodified lines
354364 unregister_fib_notifier(&init_net, &mp->fib_nb);
355365 destroy_workqueue(mp->wq);
356366 mp->fib_nb.notifier_call = NULL;
357− mp->mfi = NULL;
367+ mp->fib.mfi = NULL;
358368 }
drivers/net/ethernet/mellanox/mlx5/core/lag/mp.h+6−1
@@ -15,7 +15,12 @@ enum mlx5_lag_port_affinity { · 14 unmodified lines
1515
1616 struct lag_mp {
1717 struct notifier_block fib_nb;
18− struct fib_info *mfi; /* used in tracking fib events */
18+ struct {
19+ const void *mfi; /* used in tracking fib events */
20+ u32 priority;
21+ u32 dst;
22+ int dst_len;
23+ } fib;
1924 struct workqueue_struct *wq;
2025 };
2126
drivers/net/ethernet/mellanox/mlx5/core/lag/port_sel.c+1−1
@@ -505,7 +505,7 @@ static int mlx5_lag_create_inner_ttc_table(struct mlx5_lag *ldev) · 504 unmodified lines
505505 struct ttc_params ttc_params = {};
506506
507507 mlx5_lag_set_inner_ttc_params(ldev, &ttc_params);
508− port_sel->inner.ttc = mlx5_create_ttc_table(dev, &ttc_params);
508+ port_sel->inner.ttc = mlx5_create_inner_ttc_table(dev, &ttc_params);
509509 if (IS_ERR(port_sel->inner.ttc))
510510 return PTR_ERR(port_sel->inner.ttc);
511511
drivers/net/ethernet/mellanox/mlx5/core/lib/fs_ttc.c+2−0
@@ -408,6 +408,8 @@ static int mlx5_generate_inner_ttc_table_rules(struct mlx5_core_dev *dev, · 407 unmodified lines
408408 for (tt = 0; tt < MLX5_NUM_TT; tt++) {
409409 struct mlx5_ttc_rule *rule = &rules[tt];
410410
411+ if (test_bit(tt, params->ignore_dests))
412+ continue;
411413 rule->rule = mlx5_generate_inner_ttc_rule(dev, ft,
412414 &params->dests[tt],
413415 ttc_rules[tt].etype,
drivers/net/ethernet/mellanox/mlxsw/spectrum_ipip.c+3−8
@@ -568,10 +568,8 @@ static int · 567 unmodified lines
568568 mlxsw_sp2_ipip_rem_addr_set_gre6(struct mlxsw_sp *mlxsw_sp,
569569 struct mlxsw_sp_ipip_entry *ipip_entry)
570570 {
571− struct __ip6_tnl_parm parms6;
572−
573− parms6 = mlxsw_sp_ipip_netdev_parms6(ipip_entry->ol_dev);
574− return mlxsw_sp_ipv6_addr_kvdl_index_get(mlxsw_sp, &parms6.raddr,
571+ return mlxsw_sp_ipv6_addr_kvdl_index_get(mlxsw_sp,
572+ &ipip_entry->parms.daddr.addr6,
575573 &ipip_entry->dip_kvdl_index);
576574 }
577575
@@ -579,10 +577,7 @@ static void · 1 unmodified line
579577 mlxsw_sp2_ipip_rem_addr_unset_gre6(struct mlxsw_sp *mlxsw_sp,
580578 const struct mlxsw_sp_ipip_entry *ipip_entry)
581579 {
582− struct __ip6_tnl_parm parms6;
583−
584− parms6 = mlxsw_sp_ipip_netdev_parms6(ipip_entry->ol_dev);
585− mlxsw_sp_ipv6_addr_put(mlxsw_sp, &parms6.raddr);
580+ mlxsw_sp_ipv6_addr_put(mlxsw_sp, &ipip_entry->parms.daddr.addr6);
586581 }
587582
588583 static const struct mlxsw_sp_ipip_ops mlxsw_sp2_ipip_gre6_ops = {
drivers/net/ethernet/microchip/lan966x/lan966x_mac.c+2−2
@@ -346,7 +346,7 @@ static void lan966x_mac_irq_process(struct lan966x *lan966x, u32 row, · 345 unmodified lines
346346
347347 lan966x_mac_process_raw_entry(&raw_entries[column],
348348 mac, &vid, &dest_idx);
349− if (WARN_ON(dest_idx > lan966x->num_phys_ports))
349+ if (WARN_ON(dest_idx >= lan966x->num_phys_ports))
350350 continue;
351351
352352 /* If the entry in SW is found, then there is nothing
@@ -393,7 +393,7 @@ static void lan966x_mac_irq_process(struct lan966x *lan966x, u32 row, · 40 unmodified lines
393393
394394 lan966x_mac_process_raw_entry(&raw_entries[column],
395395 mac, &vid, &dest_idx);
396− if (WARN_ON(dest_idx > lan966x->num_phys_ports))
396+ if (WARN_ON(dest_idx >= lan966x->num_phys_ports))
397397 continue;
398398
399399 mac_entry = lan966x_mac_alloc_entry(mac, vid, dest_idx);
drivers/net/ethernet/mscc/ocelot.c+15−10
@@ -551,7 +551,7 @@ int ocelot_port_vlan_filtering(struct ocelot *ocelot, int port, · 550 unmodified lines
551551 struct ocelot_vcap_block *block = &ocelot->block[VCAP_IS1];
552552 struct ocelot_port *ocelot_port = ocelot->ports[port];
553553 struct ocelot_vcap_filter *filter;
554− int err;
554+ int err = 0;
555555 u32 val;
556556
557557 list_for_each_entry(filter, &block->rules, list) {
@@ -570,7 +570,7 @@ int ocelot_port_vlan_filtering(struct ocelot *ocelot, int port, · 12 unmodified lines
570570 if (vlan_aware)
571571 err = ocelot_del_vlan_unaware_pvid(ocelot, port,
572572 ocelot_port->bridge);
573− else
573+ else if (ocelot_port->bridge)
574574 err = ocelot_add_vlan_unaware_pvid(ocelot, port,
575575 ocelot_port->bridge);
576576 if (err)
@@ -629,6 +629,13 @@ int ocelot_vlan_add(struct ocelot *ocelot, int port, u16 vid, bool pvid, · 52 unmodified lines
629629 {
630630 int err;
631631
632+ /* Ignore VID 0 added to our RX filter by the 8021q module, since
633+ * that collides with OCELOT_STANDALONE_PVID and changes it from
634+ * egress-untagged to egress-tagged.
635+ */
636+ if (!vid)
637+ return 0;
638+
632639 err = ocelot_vlan_member_add(ocelot, port, vid, untagged);
633640 if (err)
634641 return err;
@@ -651,6 +658,9 @@ int ocelot_vlan_del(struct ocelot *ocelot, int port, u16 vid) · 16 unmodified lines
651658 bool del_pvid = false;
652659 int err;
653660
661+ if (!vid)
662+ return 0;
663+
654664 if (ocelot_port->pvid_vlan && ocelot_port->pvid_vlan->vid == vid)
655665 del_pvid = true;
656666
@@ -1612,7 +1622,7 @@ int ocelot_trap_add(struct ocelot *ocelot, int port, · 955 unmodified lines
16121622 trap->action.mask_mode = OCELOT_MASK_MODE_PERMIT_DENY;
16131623 trap->action.port_mask = 0;
16141624 trap->take_ts = take_ts;
1615− list_add_tail(&trap->trap_list, &ocelot->traps);
1625+ trap->is_trap = true;
16161626 new = true;
16171627 }
16181628
@@ -1624,10 +1634,8 @@ int ocelot_trap_add(struct ocelot *ocelot, int port, · 5 unmodified lines
16241634 err = ocelot_vcap_filter_replace(ocelot, trap);
16251635 if (err) {
16261636 trap->ingress_port_mask &= ~BIT(port);
1627− if (!trap->ingress_port_mask) {
1628− list_del(&trap->trap_list);
1637+ if (!trap->ingress_port_mask)
16291638 kfree(trap);
1630− }
16311639 return err;
16321640 }
16331641
@@ -1647,11 +1655,8 @@ int ocelot_trap_del(struct ocelot *ocelot, int port, unsigned long cookie) · 13 unmodified lines
16471655 return 0;
16481656
16491657 trap->ingress_port_mask &= ~BIT(port);
1650− if (!trap->ingress_port_mask) {
1651− list_del(&trap->trap_list);
1652−
1658+ if (!trap->ingress_port_mask)
16531659 return ocelot_vcap_filter_del(ocelot, trap);
1654− }
16551660
16561661 return ocelot_vcap_filter_replace(ocelot, trap);
16571662 }
drivers/net/ethernet/mscc/ocelot_flower.c+4−5
@@ -280,9 +280,10 @@ static int ocelot_flower_parse_action(struct ocelot *ocelot, int port, · 279 unmodified lines
280280 filter->type = OCELOT_VCAP_FILTER_OFFLOAD;
281281 break;
282282 case FLOW_ACTION_TRAP:
283− if (filter->block_id != VCAP_IS2) {
283+ if (filter->block_id != VCAP_IS2 ||
284+ filter->lookup != 0) {
284285 NL_SET_ERR_MSG_MOD(extack,
285− "Trap action can only be offloaded to VCAP IS2");
286+ "Trap action can only be offloaded to VCAP IS2 lookup 0");
286287 return -EOPNOTSUPP;
287288 }
288289 if (filter->goto_target != -1) {
@@ -295,7 +296,7 @@ static int ocelot_flower_parse_action(struct ocelot *ocelot, int port, · 6 unmodified lines
295296 filter->action.cpu_copy_ena = true;
296297 filter->action.cpu_qu_num = 0;
297298 filter->type = OCELOT_VCAP_FILTER_OFFLOAD;
298− list_add_tail(&filter->trap_list, &ocelot->traps);
299+ filter->is_trap = true;
299300 break;
300301 case FLOW_ACTION_POLICE:
301302 if (filter->block_id == PSFP_BLOCK_ID) {
@@ -878,8 +879,6 @@ int ocelot_cls_flower_replace(struct ocelot *ocelot, int port, · 576 unmodified lines
878879
879880 ret = ocelot_flower_parse(ocelot, port, ingress, f, filter);
880881 if (ret) {
881− if (!list_empty(&filter->trap_list))
882− list_del(&filter->trap_list);
883882 kfree(filter);
884883 return ret;
885884 }
drivers/net/ethernet/mscc/ocelot_vcap.c+8−1
@@ -374,7 +374,6 @@ static void is2_entry_set(struct ocelot *ocelot, int ix, · 373 unmodified lines
374374 OCELOT_VCAP_BIT_0);
375375 vcap_key_set(vcap, &data, VCAP_IS2_HK_IGR_PORT_MASK, 0,
376376 ~filter->ingress_port_mask);
377− vcap_key_bit_set(vcap, &data, VCAP_IS2_HK_FIRST, OCELOT_VCAP_BIT_ANY);
378377 vcap_key_bit_set(vcap, &data, VCAP_IS2_HK_HOST_MATCH,
379378 OCELOT_VCAP_BIT_ANY);
380379 vcap_key_bit_set(vcap, &data, VCAP_IS2_HK_L2_MC, filter->dmac_mc);
@@ -1217,6 +1216,8 @@ int ocelot_vcap_filter_add(struct ocelot *ocelot, · 836 unmodified lines
12171216 struct ocelot_vcap_filter *tmp;
12181217
12191218 tmp = ocelot_vcap_block_find_filter_by_index(block, i);
1219+ /* Read back the filter's counters before moving it */
1220+ vcap_entry_get(ocelot, i - 1, tmp);
12201221 vcap_entry_set(ocelot, i, tmp);
12211222 }
12221223
@@ -1250,7 +1251,11 @@ int ocelot_vcap_filter_del(struct ocelot *ocelot, · 27 unmodified lines
12501251 struct ocelot_vcap_filter del_filter;
12511252 int i, index;
12521253
1254+ /* Need to inherit the block_id so that vcap_entry_set()
1255+ * does not get confused and knows where to install it.
1256+ */
12531257 memset(&del_filter, 0, sizeof(del_filter));
1258+ del_filter.block_id = filter->block_id;
12541259
12551260 /* Gets index of the filter */
12561261 index = ocelot_vcap_block_get_filter_index(block, filter);
@@ -1265,6 +1270,8 @@ int ocelot_vcap_filter_del(struct ocelot *ocelot, · 8 unmodified lines
12651270 struct ocelot_vcap_filter *tmp;
12661271
12671272 tmp = ocelot_vcap_block_find_filter_by_index(block, i);
1273+ /* Read back the filter's counters before moving it */
1274+ vcap_entry_get(ocelot, i + 1, tmp);
12681275 vcap_entry_set(ocelot, i, tmp);
12691276 }
12701277
drivers/net/ethernet/pensando/ionic/ionic_bus_pci.c+2−1
@@ -256,7 +256,7 @@ static int ionic_probe(struct pci_dev *pdev, const struct pci_device_id *ent) · 255 unmodified lines
256256
257257 err = ionic_map_bars(ionic);
258258 if (err)
259− goto err_out_pci_disable_device;
259+ goto err_out_pci_release_regions;
260260
261261 /* Configure the device */
262262 err = ionic_setup(ionic);
@@ -360,6 +360,7 @@ err_out_teardown: · 97 unmodified lines
360360
361361 err_out_unmap_bars:
362362 ionic_unmap_bars(ionic);
363+err_out_pci_release_regions:
363364 pci_release_regions(pdev);
364365 err_out_pci_disable_device:
365366 pci_disable_device(pdev);
drivers/net/ethernet/sfc/ef10.c+5−0
@@ -3579,6 +3579,11 @@ static int efx_ef10_mtd_probe(struct efx_nic *efx) · 3578 unmodified lines
35793579 n_parts++;
35803580 }
35813581
3582+ if (!n_parts) {
3583+ kfree(parts);
3584+ return 0;
3585+ }
3586+
35823587 rc = efx_mtd_add(efx, &parts[0].common, n_parts, sizeof(*parts));
35833588 fail:
35843589 if (rc)
drivers/net/ethernet/sfc/efx_channels.c+6−1
@@ -867,7 +867,9 @@ static void efx_set_xdp_channels(struct efx_nic *efx) · 866 unmodified lines
867867
868868 int efx_realloc_channels(struct efx_nic *efx, u32 rxq_entries, u32 txq_entries)
869869 {
870− struct efx_channel *other_channel[EFX_MAX_CHANNELS], *channel;
870+ struct efx_channel *other_channel[EFX_MAX_CHANNELS], *channel,
871+ *ptp_channel = efx_ptp_channel(efx);
872+ struct efx_ptp_data *ptp_data = efx->ptp_data;
871873 unsigned int i, next_buffer_table = 0;
872874 u32 old_rxq_entries, old_txq_entries;
873875 int rc, rc2;
@@ -938,6 +940,7 @@ int efx_realloc_channels(struct efx_nic *efx, u32 rxq_entries, u32 txq_entries) · 64 unmodified lines
938940
939941 efx_set_xdp_channels(efx);
940942 out:
943+ efx->ptp_data = NULL;
941944 /* Destroy unused channel structures */
942945 for (i = 0; i < efx->n_channels; i++) {
943946 channel = other_channel[i];
@@ -948,6 +951,7 @@ out: · 4 unmodified lines
948951 }
949952 }
950953
954+ efx->ptp_data = ptp_data;
951955 rc2 = efx_soft_enable_interrupts(efx);
952956 if (rc2) {
953957 rc = rc ? rc : rc2;
@@ -966,6 +970,7 @@ rollback: · 12 unmodified lines
966970 efx->txq_entries = old_txq_entries;
967971 for (i = 0; i < efx->n_channels; i++)
968972 swap(efx->channel[i], other_channel[i]);
973+ efx_ptp_update_channel(efx, ptp_channel);
969974 goto out;
970975 }
971976
drivers/net/ethernet/sfc/ptp.c+13−1
@@ -45,6 +45,7 @@ · 44 unmodified lines
4545 #include "farch_regs.h"
4646 #include "tx.h"
4747 #include "nic.h" /* indirectly includes ptp.h */
48+#include "efx_channels.h"
4849
4950 /* Maximum number of events expected to make up a PTP event */
5051 #define MAX_EVENT_FRAGS 3
@@ -541,6 +542,12 @@ struct efx_channel *efx_ptp_channel(struct efx_nic *efx) · 490 unmodified lines
541542 return efx->ptp_data ? efx->ptp_data->channel : NULL;
542543 }
543544
545+void efx_ptp_update_channel(struct efx_nic *efx, struct efx_channel *channel)
546+{
547+ if (efx->ptp_data)
548+ efx->ptp_data->channel = channel;
549+}
550+
544551 static u32 last_sync_timestamp_major(struct efx_nic *efx)
545552 {
546553 struct efx_channel *channel = efx_ptp_channel(efx);
@@ -1443,6 +1450,11 @@ int efx_ptp_probe(struct efx_nic *efx, struct efx_channel *channel) · 896 unmodified lines
14431450 int rc = 0;
14441451 unsigned int pos;
14451452
1453+ if (efx->ptp_data) {
1454+ efx->ptp_data->channel = channel;
1455+ return 0;
1456+ }
1457+
14461458 ptp = kzalloc(sizeof(struct efx_ptp_data), GFP_KERNEL);
14471459 efx->ptp_data = ptp;
14481460 if (!efx->ptp_data)
@@ -2176,7 +2188,7 @@ static const struct efx_channel_type efx_ptp_channel_type = { · 727 unmodified lines
21762188 .pre_probe = efx_ptp_probe_channel,
21772189 .post_remove = efx_ptp_remove_channel,
21782190 .get_name = efx_ptp_get_channel_name,
2179− /* no copy operation; there is no need to reallocate this channel */
2191+ .copy = efx_copy_channel,
21802192 .receive_skb = efx_ptp_rx,
21812193 .want_txqs = efx_ptp_want_txqs,
21822194 .keep_eventq = false,
drivers/net/ethernet/sfc/ptp.h+1−0
@@ -16,6 +16,7 @@ struct ethtool_ts_info; · 15 unmodified lines
1616 int efx_ptp_probe(struct efx_nic *efx, struct efx_channel *channel);
1717 void efx_ptp_defer_probe_with_channel(struct efx_nic *efx);
1818 struct efx_channel *efx_ptp_channel(struct efx_nic *efx);
19+void efx_ptp_update_channel(struct efx_nic *efx, struct efx_channel *channel);
1920 void efx_ptp_remove(struct efx_nic *efx);
2021 int efx_ptp_set_ts_config(struct efx_nic *efx, struct ifreq *ifr);
2122 int efx_ptp_get_ts_config(struct efx_nic *efx, struct ifreq *ifr);
drivers/net/ethernet/smsc/smsc911x.c+1−1
@@ -2431,7 +2431,7 @@ static int smsc911x_drv_probe(struct platform_device *pdev) · 2430 unmodified lines
24312431 if (irq == -EPROBE_DEFER) {
24322432 retval = -EPROBE_DEFER;
24332433 goto out_0;
2434− } else if (irq <= 0) {
2434+ } else if (irq < 0) {
24352435 pr_warn("Could not allocate irq resource\n");
24362436 retval = -ENODEV;
24372437 goto out_0;
drivers/net/ethernet/stmicro/stmmac/dwmac-intel.c+1−0
@@ -454,6 +454,7 @@ static int intel_mgbe_common_data(struct pci_dev *pdev, · 453 unmodified lines
454454 plat->has_gmac4 = 1;
455455 plat->force_sf_dma_mode = 0;
456456 plat->tso_en = 1;
457+ plat->sph_disable = 1;
457458
458459 /* Multiplying factor to the clk_eee_i clock time
459460 * period to make it closer to 100 ns. This value
drivers/net/ethernet/stmicro/stmmac/dwmac-socfpga.c+7−5
@@ -65,8 +65,9 @@ static void socfpga_dwmac_fix_mac_speed(void *priv, unsigned int speed) · 64 unmodified lines
6565 struct phy_device *phy_dev = ndev->phydev;
6666 u32 val;
6767
68− writew(SGMII_ADAPTER_DISABLE,
69− sgmii_adapter_base + SGMII_ADAPTER_CTRL_REG);
68+ if (sgmii_adapter_base)
69+ writew(SGMII_ADAPTER_DISABLE,
70+ sgmii_adapter_base + SGMII_ADAPTER_CTRL_REG);
7071
7172 if (splitter_base) {
7273 val = readl(splitter_base + EMAC_SPLITTER_CTRL_REG);
@@ -88,10 +89,11 @@ static void socfpga_dwmac_fix_mac_speed(void *priv, unsigned int speed) · 15 unmodified lines
8889 writel(val, splitter_base + EMAC_SPLITTER_CTRL_REG);
8990 }
9091
91− writew(SGMII_ADAPTER_ENABLE,
92− sgmii_adapter_base + SGMII_ADAPTER_CTRL_REG);
93− if (phy_dev)
92+ if (phy_dev && sgmii_adapter_base) {
93+ writew(SGMII_ADAPTER_ENABLE,
94+ sgmii_adapter_base + SGMII_ADAPTER_CTRL_REG);
9495 tse_pcs_fix_mac_speed(&dwmac->pcs, phy_dev, speed);
96+ }
9597 }
9698
9799 static int socfpga_dwmac_parse_data(struct socfpga_dwmac *dwmac, struct device *dev)
drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c+1−0
@@ -907,6 +907,7 @@ static int sun8i_dwmac_register_mdio_mux(struct stmmac_priv *priv) · 906 unmodified lines
907907
908908 ret = mdio_mux_init(priv->device, mdio_mux, mdio_mux_syscon_switch_fn,
909909 &gmac->mux_handle, priv, priv->mii);
910+ of_node_put(mdio_mux);
910911 return ret;
911912 }
912913
drivers/net/ethernet/stmicro/stmmac/stmmac_main.c+1−1
@@ -7021,7 +7021,7 @@ int stmmac_dvr_probe(struct device *device, · 7020 unmodified lines
70217021 dev_info(priv->device, "TSO feature enabled\n");
70227022 }
70237023
7024− if (priv->dma_cap.sphen) {
7024+ if (priv->dma_cap.sphen && !priv->plat->sph_disable) {
70257025 ndev->hw_features |= NETIF_F_GRO;
70267026 priv->sph_cap = true;
70277027 priv->sph = priv->sph_cap;
drivers/net/ethernet/stmicro/stmmac/stmmac_pci.c+1−3
@@ -181,7 +181,7 @@ static int stmmac_pci_probe(struct pci_dev *pdev, · 180 unmodified lines
181181 return -ENOMEM;
182182
183183 /* Enable pci device */
184− ret = pci_enable_device(pdev);
184+ ret = pcim_enable_device(pdev);
185185 if (ret) {
186186 dev_err(&pdev->dev, "%s: ERROR: failed to enable device\n",
187187 __func__);
@@ -241,8 +241,6 @@ static void stmmac_pci_remove(struct pci_dev *pdev) · 53 unmodified lines
241241 pcim_iounmap_regions(pdev, BIT(i));
242242 break;
243243 }
244−
245− pci_disable_device(pdev);
246244 }
247245
248246 static int __maybe_unused stmmac_pci_suspend(struct device *dev)
drivers/net/ethernet/ti/cpsw_new.c+4−1
@@ -1246,8 +1246,10 @@ static int cpsw_probe_dt(struct cpsw_common *cpsw) · 1245 unmodified lines
12461246 data->slave_data = devm_kcalloc(dev, CPSW_SLAVE_PORTS_NUM,
12471247 sizeof(struct cpsw_slave_data),
12481248 GFP_KERNEL);
1249− if (!data->slave_data)
1249+ if (!data->slave_data) {
1250+ of_node_put(tmp_node);
12501251 return -ENOMEM;
1252+ }
12511253
12521254 /* Populate all the child nodes here...
12531255 */
@@ -1341,6 +1343,7 @@ static int cpsw_probe_dt(struct cpsw_common *cpsw) · 87 unmodified lines
13411343
13421344 err_node_put:
13431345 of_node_put(port_np);
1346+ of_node_put(tmp_node);
13441347 return ret;
13451348 }
13461349
drivers/net/ethernet/xilinx/xilinx_emaclite.c+12−18
@@ -823,10 +823,10 @@ static int xemaclite_mdio_write(struct mii_bus *bus, int phy_id, int reg, · 822 unmodified lines
823823 static int xemaclite_mdio_setup(struct net_local *lp, struct device *dev)
824824 {
825825 struct mii_bus *bus;
826− int rc;
827826 struct resource res;
828827 struct device_node *np = of_get_parent(lp->phy_node);
829828 struct device_node *npp;
829+ int rc, ret;
830830
831831 /* Don't register the MDIO bus if the phy_node or its parent node
832832 * can't be found.
@@ -836,8 +836,14 @@ static int xemaclite_mdio_setup(struct net_local *lp, struct device *dev) · 3 unmodified lines
836836 return -ENODEV;
837837 }
838838 npp = of_get_parent(np);
839−
840− of_address_to_resource(npp, 0, &res);
839+ ret = of_address_to_resource(npp, 0, &res);
840+ of_node_put(npp);
841+ if (ret) {
842+ dev_err(dev, "%s resource error!\n",
843+ dev->of_node->full_name);
844+ of_node_put(np);
845+ return ret;
846+ }
841847 if (lp->ndev->mem_start != res.start) {
842848 struct phy_device *phydev;
843849 phydev = of_phy_find_device(lp->phy_node);
@@ -846,6 +852,7 @@ static int xemaclite_mdio_setup(struct net_local *lp, struct device *dev) · 2 unmodified lines
846852 "MDIO of the phy is not registered yet\n");
847853 else
848854 put_device(&phydev->mdio.dev);
855+ of_node_put(np);
849856 return 0;
850857 }
851858
@@ -858,6 +865,7 @@ static int xemaclite_mdio_setup(struct net_local *lp, struct device *dev) · 6 unmodified lines
858865 bus = mdiobus_alloc();
859866 if (!bus) {
860867 dev_err(dev, "Failed to allocate mdiobus\n");
868+ of_node_put(np);
861869 return -ENOMEM;
862870 }
863871
@@ -870,6 +878,7 @@ static int xemaclite_mdio_setup(struct net_local *lp, struct device *dev) · 6 unmodified lines
870878 bus->parent = dev;
871879
872880 rc = of_mdiobus_register(bus, np);
881+ of_node_put(np);
873882 if (rc) {
874883 dev_err(dev, "Failed to register mdio bus.\n");
875884 goto err_register;
@@ -926,8 +935,6 @@ static int xemaclite_open(struct net_device *dev) · 50 unmodified lines
926935 xemaclite_disable_interrupts(lp);
927936
928937 if (lp->phy_node) {
929− u32 bmcr;
930−
931938 lp->phy_dev = of_phy_connect(lp->ndev, lp->phy_node,
932939 xemaclite_adjust_link, 0,
933940 PHY_INTERFACE_MODE_MII);
@@ -938,19 +945,6 @@ static int xemaclite_open(struct net_device *dev) · 4 unmodified lines
938945
939946 /* EmacLite doesn't support giga-bit speeds */
940947 phy_set_max_speed(lp->phy_dev, SPEED_100);
941−
942− /* Don't advertise 1000BASE-T Full/Half duplex speeds */
943− phy_write(lp->phy_dev, MII_CTRL1000, 0);
944−
945− /* Advertise only 10 and 100mbps full/half duplex speeds */
946− phy_write(lp->phy_dev, MII_ADVERTISE, ADVERTISE_ALL |
947− ADVERTISE_CSMA);
948−
949− /* Restart auto negotiation */
950− bmcr = phy_read(lp->phy_dev, MII_BMCR);
951− bmcr |= (BMCR_ANENABLE | BMCR_ANRESTART);
952− phy_write(lp->phy_dev, MII_BMCR, bmcr);
953−
954948 phy_start(lp->phy_dev);
955949 }
956950
drivers/net/mdio/mdio-mux-bcm6368.c+1−1
@@ -115,7 +115,7 @@ static int bcm6368_mdiomux_probe(struct platform_device *pdev) · 114 unmodified lines
115115 md->mii_bus = devm_mdiobus_alloc(&pdev->dev);
116116 if (!md->mii_bus) {
117117 dev_err(&pdev->dev, "mdiomux bus alloc failed\n");
118− return ENOMEM;
118+ return -ENOMEM;
119119 }
120120
121121 bus = md->mii_bus;
drivers/net/phy/marvell10g.c+1−1
@@ -880,7 +880,7 @@ static int mv3310_read_status_copper(struct phy_device *phydev) · 879 unmodified lines
880880
881881 cssr1 = phy_read_mmd(phydev, MDIO_MMD_PCS, MV_PCS_CSSR1);
882882 if (cssr1 < 0)
883− return val;
883+ return cssr1;
884884
885885 /* If the link settings are not resolved, mark the link down */
886886 if (!(cssr1 & MV_PCS_CSSR1_RESOLVED)) {
drivers/net/phy/micrel.c+5−5
@@ -1743,7 +1743,7 @@ static int ksz886x_cable_test_get_status(struct phy_device *phydev, · 1742 unmodified lines
17431743
17441744 static int lanphy_read_page_reg(struct phy_device *phydev, int page, u32 addr)
17451745 {
1746− u32 data;
1746+ int data;
17471747
17481748 phy_lock_mdio_bus(phydev);
17491749 __phy_write(phydev, LAN_EXT_PAGE_ACCESS_CONTROL, page);
@@ -2444,8 +2444,7 @@ static int lan8804_config_init(struct phy_device *phydev) · 694 unmodified lines
24442444
24452445 static irqreturn_t lan8814_handle_interrupt(struct phy_device *phydev)
24462446 {
2447− u16 tsu_irq_status;
2448− int irq_status;
2447+ int irq_status, tsu_irq_status;
24492448
24502449 irq_status = phy_read(phydev, LAN8814_INTS);
24512450 if (irq_status > 0 && (irq_status & LAN8814_INT_LINK))
@@ -2657,6 +2656,7 @@ static struct phy_driver ksphy_driver[] = { · 205 unmodified lines
26572656 .name = "Micrel KS8737",
26582657 /* PHY_BASIC_FEATURES */
26592658 .driver_data = &ks8737_type,
2659+ .probe = kszphy_probe,
26602660 .config_init = kszphy_config_init,
26612661 .config_intr = kszphy_config_intr,
26622662 .handle_interrupt = kszphy_handle_interrupt,
@@ -2782,8 +2782,8 @@ static struct phy_driver ksphy_driver[] = { · 119 unmodified lines
27822782 .config_init = ksz8061_config_init,
27832783 .config_intr = kszphy_config_intr,
27842784 .handle_interrupt = kszphy_handle_interrupt,
2785− .suspend = kszphy_suspend,
2786− .resume = kszphy_resume,
2785+ .suspend = genphy_suspend,
2786+ .resume = genphy_resume,
27872787 }, {
27882788 .phy_id = PHY_ID_KSZ9021,
27892789 .phy_id_mask = 0x000ffffe,
drivers/net/phy/phy.c+6−1
@@ -970,8 +970,13 @@ static irqreturn_t phy_interrupt(int irq, void *phy_dat) · 969 unmodified lines
970970 {
971971 struct phy_device *phydev = phy_dat;
972972 struct phy_driver *drv = phydev->drv;
973+ irqreturn_t ret;
973974
974− return drv->handle_interrupt(phydev);
975+ mutex_lock(&phydev->lock);
976+ ret = drv->handle_interrupt(phydev);
977+ mutex_unlock(&phydev->lock);
978+
979+ return ret;
975980 }
976981
977982 /**
drivers/net/phy/sfp.c+11−1
@@ -250,6 +250,7 @@ struct sfp { · 249 unmodified lines
250250 struct sfp_eeprom_id id;
251251 unsigned int module_power_mW;
252252 unsigned int module_t_start_up;
253+ bool tx_fault_ignore;
253254
254255 #if IS_ENABLED(CONFIG_HWMON)
255256 struct sfp_diag diag;
@@ -1956,6 +1957,12 @@ static int sfp_sm_mod_probe(struct sfp *sfp, bool report) · 1700 unmodified lines
19561957 else
19571958 sfp->module_t_start_up = T_START_UP;
19581959
1960+ if (!memcmp(id.base.vendor_name, "HUAWEI ", 16) &&
1961+ !memcmp(id.base.vendor_pn, "MA5671A ", 16))
1962+ sfp->tx_fault_ignore = true;
1963+ else
1964+ sfp->tx_fault_ignore = false;
1965+
19591966 return 0;
19601967 }
19611968
@@ -2409,7 +2416,10 @@ static void sfp_check_state(struct sfp *sfp) · 447 unmodified lines
24092416 mutex_lock(&sfp->st_mutex);
24102417 state = sfp_get_state(sfp);
24112418 changed = state ^ sfp->state;
2412− changed &= SFP_F_PRESENT | SFP_F_LOS | SFP_F_TX_FAULT;
2419+ if (sfp->tx_fault_ignore)
2420+ changed &= SFP_F_PRESENT | SFP_F_LOS;
2421+ else
2422+ changed &= SFP_F_PRESENT | SFP_F_LOS | SFP_F_TX_FAULT;
24132423
24142424 for (i = 0; i < GPIO_MAX; i++)
24152425 if (changed & BIT(i))
drivers/net/virtio_net.c+19−1
@@ -1005,6 +1005,24 @@ static struct sk_buff *receive_mergeable(struct net_device *dev, · 1004 unmodified lines
10051005 * xdp.data_meta were adjusted
10061006 */
10071007 len = xdp.data_end - xdp.data + vi->hdr_len + metasize;
1008+
1009+ /* recalculate headroom if xdp.data or xdp_data_meta
1010+ * were adjusted, note that offset should always point
1011+ * to the start of the reserved bytes for virtio_net
1012+ * header which are followed by xdp.data, that means
1013+ * that offset is equal to the headroom (when buf is
1014+ * starting at the beginning of the page, otherwise
1015+ * there is a base offset inside the page) but it's used
1016+ * with a different starting point (buf start) than
1017+ * xdp.data (buf start + vnet hdr size). If xdp.data or
1018+ * data_meta were adjusted by the xdp prog then the
1019+ * headroom size has changed and so has the offset, we
1020+ * can use data_hard_start, which points at buf start +
1021+ * vnet hdr size, to calculate the new headroom and use
1022+ * it later to compute buf start in page_to_skb()
1023+ */
1024+ headroom = xdp.data - xdp.data_hard_start - metasize;
1025+
10081026 /* We can only create skb based on xdp_page. */
10091027 if (unlikely(xdp_page != page)) {
10101028 rcu_read_unlock();
@@ -1012,7 +1030,7 @@ static struct sk_buff *receive_mergeable(struct net_device *dev, · 1 unmodified line
10121030 head_skb = page_to_skb(vi, rq, xdp_page, offset,
10131031 len, PAGE_SIZE, false,
10141032 metasize,
1015− VIRTIO_XDP_HEADROOM);
1033+ headroom);
10161034 return head_skb;
10171035 }
10181036 break;
drivers/net/wan/cosa.c+1−1
@@ -349,7 +349,7 @@ static int __init cosa_init(void) · 348 unmodified lines
349349 }
350350 } else {
351351 cosa_major = register_chrdev(0, "cosa", &cosa_fops);
352− if (!cosa_major) {
352+ if (cosa_major < 0) {
353353 pr_warn("unable to register chardev\n");
354354 err = -EIO;
355355 goto out;
drivers/net/wireguard/device.c+2−1
@@ -19,6 +19,7 @@ · 18 unmodified lines
1919 #include <linux/if_arp.h>
2020 #include <linux/icmp.h>
2121 #include <linux/suspend.h>
22+#include <net/dst_metadata.h>
2223 #include <net/icmp.h>
2324 #include <net/rtnetlink.h>
2425 #include <net/ip_tunnels.h>
@@ -167,7 +168,7 @@ static netdev_tx_t wg_xmit(struct sk_buff *skb, struct net_device *dev) · 142 unmodified lines
167168 goto err_peer;
168169 }
169170
170− mtu = skb_dst(skb) ? dst_mtu(skb_dst(skb)) : dev->mtu;
171+ mtu = skb_valid_dst(skb) ? dst_mtu(skb_dst(skb)) : dev->mtu;
171172
172173 __skb_queue_head_init(&packets);
173174 if (!skb_is_gso(skb)) {
drivers/net/wireless/ath/ath11k/core.c+1−0
@@ -1288,6 +1288,7 @@ static void ath11k_core_restart(struct work_struct *work) · 1287 unmodified lines
12881288
12891289 ieee80211_stop_queues(ar->hw);
12901290 ath11k_mac_drain_tx(ar);
1291+ complete(&ar->completed_11d_scan);
12911292 complete(&ar->scan.started);
12921293 complete(&ar->scan.completed);
12931294 complete(&ar->peer_assoc_done);
drivers/net/wireless/ath/ath11k/core.h+10−3
@@ -38,6 +38,8 @@ · 37 unmodified lines
3838
3939 extern unsigned int ath11k_frame_mode;
4040
41+#define ATH11K_SCAN_TIMEOUT_HZ (20 * HZ)
42+
4143 #define ATH11K_MON_TIMER_INTERVAL 10
4244
4345 enum ath11k_supported_bw {
@@ -189,6 +191,12 @@ enum ath11k_scan_state { · 145 unmodified lines
189191 ATH11K_SCAN_ABORTING,
190192 };
191193
194+enum ath11k_11d_state {
195+ ATH11K_11D_IDLE,
196+ ATH11K_11D_PREPARING,
197+ ATH11K_11D_RUNNING,
198+};
199+
192200 enum ath11k_dev_flags {
193201 ATH11K_CAC_RUNNING,
194202 ATH11K_FLAG_CORE_REGISTERED,
@@ -607,9 +615,8 @@ struct ath11k { · 412 unmodified lines
607615 bool dfs_block_radar_events;
608616 struct ath11k_thermal thermal;
609617 u32 vdev_id_11d_scan;
610− struct completion finish_11d_scan;
611− struct completion finish_11d_ch_list;
612− bool pending_11d;
618+ struct completion completed_11d_scan;
619+ enum ath11k_11d_state state_11d;
613620 bool regdom_set_by_user;
614621 int hw_rate_code;
615622 u8 twt_enabled;
drivers/net/wireless/ath/ath11k/mac.c+29−42
@@ -3601,26 +3601,6 @@ static int ath11k_mac_op_hw_scan(struct ieee80211_hw *hw, · 3600 unmodified lines
36013601 if (ret)
36023602 goto exit;
36033603
3604− /* Currently the pending_11d=true only happened 1 time while
3605− * wlan interface up in ath11k_mac_11d_scan_start(), it is called by
3606− * ath11k_mac_op_add_interface(), after wlan interface up,
3607− * pending_11d=false always.
3608− * If remove below wait, it always happened scan fail and lead connect
3609− * fail while wlan interface up, because it has a 11d scan which is running
3610− * in firmware, and lead this scan failed.
3611− */
3612− if (ar->pending_11d) {
3613− long time_left;
3614− unsigned long timeout = 5 * HZ;
3615−
3616− if (ar->supports_6ghz)
3617− timeout += 5 * HZ;
3618−
3619− time_left = wait_for_completion_timeout(&ar->finish_11d_ch_list, timeout);
3620− ath11k_dbg(ar->ab, ATH11K_DBG_MAC,
3621− "mac wait 11d channel list time left %ld\n", time_left);
3622− }
3623−
36243604 memset(&arg, 0, sizeof(arg));
36253605 ath11k_wmi_start_scan_init(ar, &arg);
36263606 arg.vdev_id = arvif->vdev_id;
@@ -3686,6 +3666,10 @@ exit: · 59 unmodified lines
36863666 kfree(arg.extraie.ptr);
36873667
36883668 mutex_unlock(&ar->conf_mutex);
3669+
3670+ if (ar->state_11d == ATH11K_11D_PREPARING)
3671+ ath11k_mac_11d_scan_start(ar, arvif->vdev_id);
3672+
36893673 return ret;
36903674 }
36913675
@@ -5814,7 +5798,7 @@ static int ath11k_mac_op_start(struct ieee80211_hw *hw) · 2122 unmodified lines
58145798
58155799 /* TODO: Do we need to enable ANI? */
58165800
5817− ath11k_reg_update_chan_list(ar);
5801+ ath11k_reg_update_chan_list(ar, false);
58185802
58195803 ar->num_started_vdevs = 0;
58205804 ar->num_created_vdevs = 0;
@@ -5881,6 +5865,11 @@ static void ath11k_mac_op_stop(struct ieee80211_hw *hw) · 60 unmodified lines
58815865 cancel_work_sync(&ar->ab->update_11d_work);
58825866 cancel_work_sync(&ar->ab->rfkill_work);
58835867
5868+ if (ar->state_11d == ATH11K_11D_PREPARING) {
5869+ ar->state_11d = ATH11K_11D_IDLE;
5870+ complete(&ar->completed_11d_scan);
5871+ }
5872+
58845873 spin_lock_bh(&ar->data_lock);
58855874 list_for_each_entry_safe(ppdu_stats, tmp, &ar->ppdu_stats_info, list) {
58865875 list_del(&ppdu_stats->list);
@@ -6051,7 +6040,7 @@ static bool ath11k_mac_vif_ap_active_any(struct ath11k_base *ab) · 164 unmodified lines
60516040 return false;
60526041 }
60536042
6054−void ath11k_mac_11d_scan_start(struct ath11k *ar, u32 vdev_id, bool wait)
6043+void ath11k_mac_11d_scan_start(struct ath11k *ar, u32 vdev_id)
60556044 {
60566045 struct wmi_11d_scan_start_params param;
60576046 int ret;
@@ -6079,28 +6068,22 @@ void ath11k_mac_11d_scan_start(struct ath11k *ar, u32 vdev_id, bool wait) · 21 unmodified lines
60796068
60806069 ath11k_dbg(ar->ab, ATH11K_DBG_MAC, "mac start 11d scan\n");
60816070
6082− if (wait)
6083− reinit_completion(&ar->finish_11d_scan);
6084−
60856071 ret = ath11k_wmi_send_11d_scan_start_cmd(ar, &param);
60866072 if (ret) {
60876073 ath11k_warn(ar->ab, "failed to start 11d scan vdev %d ret: %d\n",
60886074 vdev_id, ret);
60896075 } else {
60906076 ar->vdev_id_11d_scan = vdev_id;
6091− if (wait) {
6092− ar->pending_11d = true;
6093− ret = wait_for_completion_timeout(&ar->finish_11d_scan,
6094− 5 * HZ);
6095− ath11k_dbg(ar->ab, ATH11K_DBG_MAC,
6096− "mac 11d scan left time %d\n", ret);
6097−
6098− if (!ret)
6099− ar->pending_11d = false;
6100− }
6077+ if (ar->state_11d == ATH11K_11D_PREPARING)
6078+ ar->state_11d = ATH11K_11D_RUNNING;
61016079 }
61026080
61036081 fin:
6082+ if (ar->state_11d == ATH11K_11D_PREPARING) {
6083+ ar->state_11d = ATH11K_11D_IDLE;
6084+ complete(&ar->completed_11d_scan);
6085+ }
6086+
61046087 mutex_unlock(&ar->ab->vdev_id_11d_lock);
61056088 }
61066089
@@ -6123,12 +6106,15 @@ void ath11k_mac_11d_scan_stop(struct ath11k *ar) · 16 unmodified lines
61236106 vdev_id = ar->vdev_id_11d_scan;
61246107
61256108 ret = ath11k_wmi_send_11d_scan_stop_cmd(ar, vdev_id);
6126− if (ret)
6109+ if (ret) {
61276110 ath11k_warn(ar->ab,
61286111 "failed to stopt 11d scan vdev %d ret: %d\n",
61296112 vdev_id, ret);
6130− else
6113+ } else {
61316114 ar->vdev_id_11d_scan = ATH11K_11D_INVALID_VDEV_ID;
6115+ ar->state_11d = ATH11K_11D_IDLE;
6116+ complete(&ar->completed_11d_scan);
6117+ }
61326118 }
61336119 mutex_unlock(&ar->ab->vdev_id_11d_lock);
61346120 }
@@ -6324,8 +6310,10 @@ static int ath11k_mac_op_add_interface(struct ieee80211_hw *hw, · 189 unmodified lines
63246310 goto err_peer_del;
63256311 }
63266312
6327− ath11k_mac_11d_scan_start(ar, arvif->vdev_id, true);
6328−
6313+ if (test_bit(WMI_TLV_SERVICE_11D_OFFLOAD, ab->wmi_ab.svc_map)) {
6314+ reinit_completion(&ar->completed_11d_scan);
6315+ ar->state_11d = ATH11K_11D_PREPARING;
6316+ }
63296317 break;
63306318 case WMI_VDEV_TYPE_MONITOR:
63316319 set_bit(ATH11K_FLAG_MONITOR_VDEV_CREATED, &ar->monitor_flags);
@@ -7190,7 +7178,7 @@ ath11k_mac_op_unassign_vif_chanctx(struct ieee80211_hw *hw, · 858 unmodified lines
71907178 }
71917179
71927180 if (arvif->vdev_type == WMI_VDEV_TYPE_STA)
7193− ath11k_mac_11d_scan_start(ar, arvif->vdev_id, false);
7181+ ath11k_mac_11d_scan_start(ar, arvif->vdev_id);
71947182
71957183 mutex_unlock(&ar->conf_mutex);
71967184 }
@@ -8671,8 +8659,7 @@ int ath11k_mac_allocate(struct ath11k_base *ab) · 1474 unmodified lines
86718659 ar->monitor_vdev_id = -1;
86728660 clear_bit(ATH11K_FLAG_MONITOR_VDEV_CREATED, &ar->monitor_flags);
86738661 ar->vdev_id_11d_scan = ATH11K_11D_INVALID_VDEV_ID;
8674− init_completion(&ar->finish_11d_scan);
8675− init_completion(&ar->finish_11d_ch_list);
8662+ init_completion(&ar->completed_11d_scan);
86768663 }
86778664
86788665 return 0;
drivers/net/wireless/ath/ath11k/mac.h+1−1
@@ -130,7 +130,7 @@ extern const struct htt_rx_ring_tlv_filter ath11k_mac_mon_status_filter_default; · 129 unmodified lines
130130 #define ATH11K_SCAN_11D_INTERVAL 600000
131131 #define ATH11K_11D_INVALID_VDEV_ID 0xFFFF
132132
133−void ath11k_mac_11d_scan_start(struct ath11k *ar, u32 vdev_id, bool wait);
133+void ath11k_mac_11d_scan_start(struct ath11k *ar, u32 vdev_id);
134134 void ath11k_mac_11d_scan_stop(struct ath11k *ar);
135135 void ath11k_mac_11d_scan_stop_all(struct ath11k_base *ab);
136136
drivers/net/wireless/ath/ath11k/reg.c+28−15
@@ -102,7 +102,7 @@ ath11k_reg_notifier(struct wiphy *wiphy, struct regulatory_request *request) · 101 unmodified lines
102102 ar->regdom_set_by_user = true;
103103 }
104104
105−int ath11k_reg_update_chan_list(struct ath11k *ar)
105+int ath11k_reg_update_chan_list(struct ath11k *ar, bool wait)
106106 {
107107 struct ieee80211_supported_band **bands;
108108 struct scan_chan_list_params *params;
@@ -111,7 +111,32 @@ int ath11k_reg_update_chan_list(struct ath11k *ar) · 2 unmodified lines
111111 struct channel_param *ch;
112112 enum nl80211_band band;
113113 int num_channels = 0;
114− int i, ret;
114+ int i, ret, left;
115+
116+ if (wait && ar->state_11d != ATH11K_11D_IDLE) {
117+ left = wait_for_completion_timeout(&ar->completed_11d_scan,
118+ ATH11K_SCAN_TIMEOUT_HZ);
119+ if (!left) {
120+ ath11k_dbg(ar->ab, ATH11K_DBG_REG,
121+ "failed to receive 11d scan complete: timed out\n");
122+ ar->state_11d = ATH11K_11D_IDLE;
123+ }
124+ ath11k_dbg(ar->ab, ATH11K_DBG_REG,
125+ "reg 11d scan wait left time %d\n", left);
126+ }
127+
128+ if (wait &&
129+ (ar->scan.state == ATH11K_SCAN_STARTING ||
130+ ar->scan.state == ATH11K_SCAN_RUNNING)) {
131+ left = wait_for_completion_timeout(&ar->scan.completed,
132+ ATH11K_SCAN_TIMEOUT_HZ);
133+ if (!left)
134+ ath11k_dbg(ar->ab, ATH11K_DBG_REG,
135+ "failed to receive hw scan complete: timed out\n");
136+
137+ ath11k_dbg(ar->ab, ATH11K_DBG_REG,
138+ "reg hw scan wait left time %d\n", left);
139+ }
115140
116141 bands = hw->wiphy->bands;
117142 for (band = 0; band < NUM_NL80211_BANDS; band++) {
@@ -193,11 +218,6 @@ int ath11k_reg_update_chan_list(struct ath11k *ar) · 75 unmodified lines
193218 ret = ath11k_wmi_send_scan_chan_list_cmd(ar, params);
194219 kfree(params);
195220
196− if (ar->pending_11d) {
197− complete(&ar->finish_11d_ch_list);
198− ar->pending_11d = false;
199− }
200−
201221 return ret;
202222 }
203223
@@ -263,15 +283,8 @@ int ath11k_regd_update(struct ath11k *ar) · 59 unmodified lines
263283 goto err;
264284 }
265285
266− if (ar->pending_11d)
267− complete(&ar->finish_11d_scan);
268−
269286 rtnl_lock();
270287 wiphy_lock(ar->hw->wiphy);
271−
272− if (ar->pending_11d)
273− reinit_completion(&ar->finish_11d_ch_list);
274−
275288 ret = regulatory_set_wiphy_regd_sync(ar->hw->wiphy, regd_copy);
276289 wiphy_unlock(ar->hw->wiphy);
277290 rtnl_unlock();
@@ -282,7 +295,7 @@ int ath11k_regd_update(struct ath11k *ar) · 4 unmodified lines
282295 goto err;
283296
284297 if (ar->state == ATH11K_STATE_ON) {
285− ret = ath11k_reg_update_chan_list(ar);
298+ ret = ath11k_reg_update_chan_list(ar, true);
286299 if (ret)
287300 goto err;
288301 }
drivers/net/wireless/ath/ath11k/reg.h+1−1
@@ -32,5 +32,5 @@ struct ieee80211_regdomain * · 31 unmodified lines
3232 ath11k_reg_build_regd(struct ath11k_base *ab,
3333 struct cur_regulatory_info *reg_info, bool intersect);
3434 int ath11k_regd_update(struct ath11k *ar);
35−int ath11k_reg_update_chan_list(struct ath11k *ar);
35+int ath11k_reg_update_chan_list(struct ath11k *ar, bool wait);
3636 #endif
drivers/net/wireless/ath/ath11k/wmi.c+14−2
@@ -2015,7 +2015,10 @@ void ath11k_wmi_start_scan_init(struct ath11k *ar, · 2014 unmodified lines
20152015 {
20162016 /* setup commonly used values */
20172017 arg->scan_req_id = 1;
2018− arg->scan_priority = WMI_SCAN_PRIORITY_LOW;
2018+ if (ar->state_11d == ATH11K_11D_PREPARING)
2019+ arg->scan_priority = WMI_SCAN_PRIORITY_MEDIUM;
2020+ else
2021+ arg->scan_priority = WMI_SCAN_PRIORITY_LOW;
20192022 arg->dwell_time_active = 50;
20202023 arg->dwell_time_active_2g = 0;
20212024 arg->dwell_time_passive = 150;
@@ -6350,8 +6353,10 @@ static void ath11k_wmi_op_ep_tx_credits(struct ath11k_base *ab) · 4328 unmodified lines
63506353 static int ath11k_reg_11d_new_cc_event(struct ath11k_base *ab, struct sk_buff *skb)
63516354 {
63526355 const struct wmi_11d_new_cc_ev *ev;
6356+ struct ath11k *ar;
6357+ struct ath11k_pdev *pdev;
63536358 const void **tb;
6354− int ret;
6359+ int ret, i;
63556360
63566361 tb = ath11k_wmi_tlv_parse_alloc(ab, skb->data, skb->len, GFP_ATOMIC);
63576362 if (IS_ERR(tb)) {
@@ -6377,6 +6382,13 @@ static int ath11k_reg_11d_new_cc_event(struct ath11k_base *ab, struct sk_buff *s · 19 unmodified lines
63776382
63786383 kfree(tb);
63796384
6385+ for (i = 0; i < ab->num_radios; i++) {
6386+ pdev = &ab->pdevs[i];
6387+ ar = pdev->ar;
6388+ ar->state_11d = ATH11K_11D_IDLE;
6389+ complete(&ar->completed_11d_scan);
6390+ }
6391+
63806392 queue_work(ab->workqueue, &ab->update_11d_work);
63816393
63826394 return 0;
drivers/net/wireless/intel/iwlwifi/iwl-dbg-tlv.c+1−1
@@ -371,7 +371,7 @@ void iwl_dbg_tlv_del_timers(struct iwl_trans *trans) · 370 unmodified lines
371371 struct iwl_dbg_tlv_timer_node *node, *tmp;
372372
373373 list_for_each_entry_safe(node, tmp, timer_list, list) {
374− del_timer(&node->timer);
374+ del_timer_sync(&node->timer);
375375 list_del(&node->list);
376376 kfree(node);
377377 }
drivers/net/wireless/mac80211_hwsim.c+8−2
@@ -2202,11 +2202,14 @@ mac80211_hwsim_sta_rc_update(struct ieee80211_hw *hw, · 2201 unmodified lines
22022202 if (!data->use_chanctx) {
22032203 confbw = data->bw;
22042204 } else {
2205− struct ieee80211_chanctx_conf *chanctx_conf =
2206− rcu_dereference(vif->chanctx_conf);
2205+ struct ieee80211_chanctx_conf *chanctx_conf;
2206+
2207+ rcu_read_lock();
2208+ chanctx_conf = rcu_dereference(vif->chanctx_conf);
22072209
22082210 if (!WARN_ON(!chanctx_conf))
22092211 confbw = chanctx_conf->def.width;
2212+ rcu_read_unlock();
22102213 }
22112214
22122215 WARN(bw > hwsim_get_chanwidth(confbw),
@@ -2475,11 +2478,13 @@ static void hw_scan_work(struct work_struct *work) · 262 unmodified lines
24752478 if (req->ie_len)
24762479 skb_put_data(probe, req->ie, req->ie_len);
24772480
2481+ rcu_read_lock();
24782482 if (!ieee80211_tx_prepare_skb(hwsim->hw,
24792483 hwsim->hw_scan_vif,
24802484 probe,
24812485 hwsim->tmp_chan->band,
24822486 NULL)) {
2487+ rcu_read_unlock();
24832488 kfree_skb(probe);
24842489 continue;
24852490 }
@@ -2487,6 +2492,7 @@ static void hw_scan_work(struct work_struct *work) · 1 unmodified line
24872492 local_bh_disable();
24882493 mac80211_hwsim_tx_frame(hwsim->hw, probe,
24892494 hwsim->tmp_chan);
2495+ rcu_read_unlock();
24902496 local_bh_enable();
24912497 }
24922498 }
drivers/nfc/nfcmrvl/main.c+1−1
@@ -183,6 +183,7 @@ void nfcmrvl_nci_unregister_dev(struct nfcmrvl_private *priv) · 182 unmodified lines
183183 {
184184 struct nci_dev *ndev = priv->ndev;
185185
186+ nci_unregister_device(ndev);
186187 if (priv->ndev->nfc_dev->fw_download_in_progress)
187188 nfcmrvl_fw_dnld_abort(priv);
188189
@@ -191,7 +192,6 @@ void nfcmrvl_nci_unregister_dev(struct nfcmrvl_private *priv) · 2 unmodified lines
191192 if (gpio_is_valid(priv->config.reset_n_io))
192193 gpio_free(priv->config.reset_n_io);
193194
194− nci_unregister_device(ndev);
195195 nci_free_device(ndev);
196196 kfree(priv);
197197 }
drivers/pci/of.c+1−7
@@ -369,7 +369,6 @@ static int devm_of_pci_get_host_bridge_resources(struct device *dev, · 368 unmodified lines
369369
370370 dev_dbg(dev, "Parsing dma-ranges property...\n");
371371 for_each_of_pci_range(&parser, &range) {
372− struct resource_entry *entry;
373372 /*
374373 * If we failed translation or got a zero-sized region
375374 * then skip this range
@@ -393,12 +392,7 @@ static int devm_of_pci_get_host_bridge_resources(struct device *dev, · 17 unmodified lines
393392 goto failed;
394393 }
395394
396− /* Keep the resource list sorted */
397− resource_list_for_each_entry(entry, ib_resources)
398− if (entry->res->start > res->start)
399− break;
400−
401− pci_add_resource_offset(&entry->node, res,
395+ pci_add_resource_offset(ib_resources, res,
402396 res->start - range.pci_addr);
403397 }
404398
drivers/pci/pci-driver.c+18−0
@@ -20,6 +20,7 @@ · 19 unmodified lines
2020 #include <linux/of_device.h>
2121 #include <linux/acpi.h>
2222 #include <linux/dma-map-ops.h>
23+#include <linux/iommu.h>
2324 #include "pci.h"
2425 #include "pcie/portdrv.h"
2526
@@ -1601,6 +1602,7 @@ static int pci_bus_num_vf(struct device *dev) · 1575 unmodified lines
16011602 */
16021603 static int pci_dma_configure(struct device *dev)
16031604 {
1605+ struct pci_driver *driver = to_pci_driver(dev->driver);
16041606 struct device *bridge;
16051607 int ret = 0;
16061608
@@ -1616,9 +1618,24 @@ static int pci_dma_configure(struct device *dev) · 9 unmodified lines
16161618 }
16171619
16181620 pci_put_host_bridge_device(bridge);
1621+
1622+ if (!ret && !driver->driver_managed_dma) {
1623+ ret = iommu_device_use_default_domain(dev);
1624+ if (ret)
1625+ arch_teardown_dma_ops(dev);
1626+ }
1627+
16191628 return ret;
16201629 }
16211630
1631+static void pci_dma_cleanup(struct device *dev)
1632+{
1633+ struct pci_driver *driver = to_pci_driver(dev->driver);
1634+
1635+ if (!driver->driver_managed_dma)
1636+ iommu_device_unuse_default_domain(dev);
1637+}
1638+
16221639 struct bus_type pci_bus_type = {
16231640 .name = "pci",
16241641 .match = pci_bus_match,
@@ -1632,6 +1649,7 @@ struct bus_type pci_bus_type = { · 7 unmodified lines
16321649 .pm = PCI_PM_OPS_PTR,
16331650 .num_vf = pci_bus_num_vf,
16341651 .dma_configure = pci_dma_configure,
1652+ .dma_cleanup = pci_dma_cleanup,
16351653 };
16361654 EXPORT_SYMBOL(pci_bus_type);
16371655
drivers/pci/pci-stub.c+1−0
@@ -36,6 +36,7 @@ static struct pci_driver stub_driver = { · 35 unmodified lines
3636 .name = "pci-stub",
3737 .id_table = NULL, /* only dynamic id's */
3838 .probe = pci_stub_probe,
39+ .driver_managed_dma = true,
3940 };
4041
4142 static int __init pci_stub_init(void)
drivers/pci/pcie/portdrv_pci.c+2−0
@@ -202,6 +202,8 @@ static struct pci_driver pcie_portdriver = { · 201 unmodified lines
202202
203203 .err_handler = &pcie_portdrv_err_handler,
204204
205+ .driver_managed_dma = true,
206+
205207 .driver.pm = PCIE_PORTDRV_PM_OPS,
206208 };
207209
drivers/phy/amlogic/phy-meson-g12a-usb3-pcie.c+12−8
@@ -414,19 +414,19 @@ static int phy_g12a_usb3_pcie_probe(struct platform_device *pdev) · 413 unmodified lines
414414
415415 ret = clk_prepare_enable(priv->clk_ref);
416416 if (ret)
417− goto err_disable_clk_ref;
417+ return ret;
418418
419419 priv->reset = devm_reset_control_array_get_exclusive(dev);
420− if (IS_ERR(priv->reset))
421− return PTR_ERR(priv->reset);
420+ if (IS_ERR(priv->reset)) {
421+ ret = PTR_ERR(priv->reset);
422+ goto err_disable_clk_ref;
423+ }
422424
423425 priv->phy = devm_phy_create(dev, np, &phy_g12a_usb3_pcie_ops);
424426 if (IS_ERR(priv->phy)) {
425427 ret = PTR_ERR(priv->phy);
426− if (ret != -EPROBE_DEFER)
427− dev_err(dev, "failed to create PHY\n");
428−
429− return ret;
428+ dev_err_probe(dev, ret, "failed to create PHY\n");
429+ goto err_disable_clk_ref;
430430 }
431431
432432 phy_set_drvdata(priv->phy, priv);
@@ -434,8 +434,12 @@ static int phy_g12a_usb3_pcie_probe(struct platform_device *pdev) · 1 unmodified line
434434
435435 phy_provider = devm_of_phy_provider_register(dev,
436436 phy_g12a_usb3_pcie_xlate);
437+ if (IS_ERR(phy_provider)) {
438+ ret = PTR_ERR(phy_provider);
439+ goto err_disable_clk_ref;
440+ }
437441
438− return PTR_ERR_OR_ZERO(phy_provider);
442+ return 0;
439443
440444 err_disable_clk_ref:
441445 clk_disable_unprepare(priv->clk_ref);
drivers/phy/motorola/phy-mapphone-mdm6600.c+2−1
@@ -629,7 +629,8 @@ idle: · 628 unmodified lines
629629 cleanup:
630630 if (error < 0)
631631 phy_mdm6600_device_power_off(ddata);
632−
632+ pm_runtime_disable(ddata->dev);
633+ pm_runtime_dont_use_autosuspend(ddata->dev);
633634 return error;
634635 }
635636
drivers/phy/samsung/phy-exynos5250-sata.c+15−6
@@ -187,6 +187,7 @@ static int exynos_sata_phy_probe(struct platform_device *pdev) · 186 unmodified lines
187187 return -EINVAL;
188188
189189 sata_phy->client = of_find_i2c_device_by_node(node);
190+ of_node_put(node);
190191 if (!sata_phy->client)
191192 return -EPROBE_DEFER;
192193
@@ -195,20 +196,21 @@ static int exynos_sata_phy_probe(struct platform_device *pdev) · 2 unmodified lines
195196 sata_phy->phyclk = devm_clk_get(dev, "sata_phyctrl");
196197 if (IS_ERR(sata_phy->phyclk)) {
197198 dev_err(dev, "failed to get clk for PHY\n");
198− return PTR_ERR(sata_phy->phyclk);
199+ ret = PTR_ERR(sata_phy->phyclk);
200+ goto put_dev;
199201 }
200202
201203 ret = clk_prepare_enable(sata_phy->phyclk);
202204 if (ret < 0) {
203205 dev_err(dev, "failed to enable source clk\n");
204− return ret;
206+ goto put_dev;
205207 }
206208
207209 sata_phy->phy = devm_phy_create(dev, NULL, &exynos_sata_phy_ops);
208210 if (IS_ERR(sata_phy->phy)) {
209− clk_disable_unprepare(sata_phy->phyclk);
210211 dev_err(dev, "failed to create PHY\n");
211− return PTR_ERR(sata_phy->phy);
212+ ret = PTR_ERR(sata_phy->phy);
213+ goto clk_disable;
212214 }
213215
214216 phy_set_drvdata(sata_phy->phy, sata_phy);
@@ -216,11 +218,18 @@ static int exynos_sata_phy_probe(struct platform_device *pdev) · 1 unmodified line
216218 phy_provider = devm_of_phy_provider_register(dev,
217219 of_phy_simple_xlate);
218220 if (IS_ERR(phy_provider)) {
219− clk_disable_unprepare(sata_phy->phyclk);
220− return PTR_ERR(phy_provider);
221+ ret = PTR_ERR(phy_provider);
222+ goto clk_disable;
221223 }
222224
223225 return 0;
226+
227+clk_disable:
228+ clk_disable_unprepare(sata_phy->phyclk);
229+put_dev:
230+ put_device(&sata_phy->client->dev);
231+
232+ return ret;
224233 }
225234
226235 static const struct of_device_id exynos_sata_phy_of_match[] = {
drivers/phy/ti/phy-am654-serdes.c+1−1
@@ -838,7 +838,7 @@ static int serdes_am654_probe(struct platform_device *pdev) · 837 unmodified lines
838838
839839 clk_err:
840840 of_clk_del_provider(node);
841−
841+ pm_runtime_disable(dev);
842842 return ret;
843843 }
844844
drivers/phy/ti/phy-omap-usb2.c+1−1
@@ -215,7 +215,7 @@ static int omap_usb2_enable_clocks(struct omap_usb *phy) · 214 unmodified lines
215215 return 0;
216216
217217 err1:
218− clk_disable(phy->wkupclk);
218+ clk_disable_unprepare(phy->wkupclk);
219219
220220 err0:
221221 return ret;
drivers/phy/ti/phy-ti-pipe3.c+1−0
@@ -696,6 +696,7 @@ static int ti_pipe3_get_sysctrl(struct ti_pipe3 *phy) · 695 unmodified lines
696696 }
697697
698698 control_pdev = of_find_device_by_node(control_node);
699+ of_node_put(control_node);
699700 if (!control_pdev) {
700701 dev_err(dev, "Failed to get control device\n");
701702 return -EINVAL;
drivers/phy/ti/phy-tusb1210.c+9−3
@@ -155,7 +155,7 @@ static int tusb1210_set_mode(struct phy *phy, enum phy_mode mode, int submode) · 154 unmodified lines
155155 }
156156
157157 #ifdef CONFIG_POWER_SUPPLY
158−const char * const tusb1210_chg_det_states[] = {
158+static const char * const tusb1210_chg_det_states[] = {
159159 "CHG_DET_CONNECTING",
160160 "CHG_DET_START_DET",
161161 "CHG_DET_READ_DET",
@@ -537,12 +537,18 @@ static int tusb1210_probe(struct ulpi *ulpi) · 375 unmodified lines
537537 tusb1210_probe_charger_detect(tusb);
538538
539539 tusb->phy = ulpi_phy_create(ulpi, &phy_ops);
540− if (IS_ERR(tusb->phy))
541− return PTR_ERR(tusb->phy);
540+ if (IS_ERR(tusb->phy)) {
541+ ret = PTR_ERR(tusb->phy);
542+ goto err_remove_charger;
543+ }
542544
543545 phy_set_drvdata(tusb->phy, tusb);
544546 ulpi_set_drvdata(ulpi, tusb);
545547 return 0;
548+
549+err_remove_charger:
550+ tusb1210_remove_charger_detect(tusb);
551+ return ret;
546552 }
547553
548554 static void tusb1210_remove(struct ulpi *ulpi)
drivers/pinctrl/intel/pinctrl-alderlake.c+40−20
@@ -14,11 +14,17 @@ · 13 unmodified lines
1414
1515 #include "pinctrl-intel.h"
1616
17−#define ADL_PAD_OWN 0x0a0
18−#define ADL_PADCFGLOCK 0x110
19−#define ADL_HOSTSW_OWN 0x150
20−#define ADL_GPI_IS 0x200
21−#define ADL_GPI_IE 0x220
17+#define ADL_N_PAD_OWN 0x020
18+#define ADL_N_PADCFGLOCK 0x080
19+#define ADL_N_HOSTSW_OWN 0x0b0
20+#define ADL_N_GPI_IS 0x100
21+#define ADL_N_GPI_IE 0x120
22+
23+#define ADL_S_PAD_OWN 0x0a0
24+#define ADL_S_PADCFGLOCK 0x110
25+#define ADL_S_HOSTSW_OWN 0x150
26+#define ADL_S_GPI_IS 0x200
27+#define ADL_S_GPI_IE 0x220
2228
2329 #define ADL_GPP(r, s, e, g) \
2430 { \
@@ -28,14 +34,28 @@ · 3 unmodified lines
2834 .gpio_base = (g), \
2935 }
3036
31−#define ADL_COMMUNITY(b, s, e, g) \
37+#define ADL_N_COMMUNITY(b, s, e, g) \
38+ { \
39+ .barno = (b), \
40+ .padown_offset = ADL_N_PAD_OWN, \
41+ .padcfglock_offset = ADL_N_PADCFGLOCK, \
42+ .hostown_offset = ADL_N_HOSTSW_OWN, \
43+ .is_offset = ADL_N_GPI_IS, \
44+ .ie_offset = ADL_N_GPI_IE, \
45+ .pin_base = (s), \
46+ .npins = ((e) - (s) + 1), \
47+ .gpps = (g), \
48+ .ngpps = ARRAY_SIZE(g), \
49+ }
50+
51+#define ADL_S_COMMUNITY(b, s, e, g) \
3252 { \
3353 .barno = (b), \
34− .padown_offset = ADL_PAD_OWN, \
35− .padcfglock_offset = ADL_PADCFGLOCK, \
36− .hostown_offset = ADL_HOSTSW_OWN, \
37− .is_offset = ADL_GPI_IS, \
38− .ie_offset = ADL_GPI_IE, \
54+ .padown_offset = ADL_S_PAD_OWN, \
55+ .padcfglock_offset = ADL_S_PADCFGLOCK, \
56+ .hostown_offset = ADL_S_HOSTSW_OWN, \
57+ .is_offset = ADL_S_GPI_IS, \
58+ .ie_offset = ADL_S_GPI_IE, \
3959 .pin_base = (s), \
4060 .npins = ((e) - (s) + 1), \
4161 .gpps = (g), \
@@ -342,10 +362,10 @@ static const struct intel_padgroup adln_community5_gpps[] = { · 300 unmodified lines
342362 };
343363
344364 static const struct intel_community adln_communities[] = {
345− ADL_COMMUNITY(0, 0, 66, adln_community0_gpps),
346− ADL_COMMUNITY(1, 67, 168, adln_community1_gpps),
347− ADL_COMMUNITY(2, 169, 248, adln_community4_gpps),
348− ADL_COMMUNITY(3, 249, 256, adln_community5_gpps),
365+ ADL_N_COMMUNITY(0, 0, 66, adln_community0_gpps),
366+ ADL_N_COMMUNITY(1, 67, 168, adln_community1_gpps),
367+ ADL_N_COMMUNITY(2, 169, 248, adln_community4_gpps),
368+ ADL_N_COMMUNITY(3, 249, 256, adln_community5_gpps),
349369 };
350370
351371 static const struct intel_pinctrl_soc_data adln_soc_data = {
@@ -713,11 +733,11 @@ static const struct intel_padgroup adls_community5_gpps[] = { · 361 unmodified lines
713733 };
714734
715735 static const struct intel_community adls_communities[] = {
716− ADL_COMMUNITY(0, 0, 94, adls_community0_gpps),
717− ADL_COMMUNITY(1, 95, 150, adls_community1_gpps),
718− ADL_COMMUNITY(2, 151, 199, adls_community3_gpps),
719− ADL_COMMUNITY(3, 200, 269, adls_community4_gpps),
720− ADL_COMMUNITY(4, 270, 303, adls_community5_gpps),
736+ ADL_S_COMMUNITY(0, 0, 94, adls_community0_gpps),
737+ ADL_S_COMMUNITY(1, 95, 150, adls_community1_gpps),
738+ ADL_S_COMMUNITY(2, 151, 199, adls_community3_gpps),
739+ ADL_S_COMMUNITY(3, 200, 269, adls_community4_gpps),
740+ ADL_S_COMMUNITY(4, 270, 303, adls_community5_gpps),
721741 };
722742
723743 static const struct intel_pinctrl_soc_data adls_soc_data = {
drivers/pinctrl/mediatek/Kconfig+1−0
@@ -30,6 +30,7 @@ config PINCTRL_MTK_MOORE · 29 unmodified lines
3030 select GENERIC_PINMUX_FUNCTIONS
3131 select GPIOLIB
3232 select OF_GPIO
33+ select EINT_MTK
3334 select PINCTRL_MTK_V2
3435
3536 config PINCTRL_MTK_PARIS
drivers/pinctrl/pinctrl-pistachio.c+3−3
@@ -1374,10 +1374,10 @@ static int pistachio_gpio_register(struct pistachio_pinctrl *pctl) · 1373 unmodified lines
13741374 }
13751375
13761376 irq = irq_of_parse_and_map(child, 0);
1377− if (irq < 0) {
1378− dev_err(pctl->dev, "No IRQ for bank %u: %d\n", i, irq);
1377+ if (!irq) {
1378+ dev_err(pctl->dev, "No IRQ for bank %u\n", i);
13791379 of_node_put(child);
1380− ret = irq;
1380+ ret = -EINVAL;
13811381 goto err;
13821382 }
13831383
drivers/pinctrl/pinctrl-rockchip.c+42−27
@@ -457,95 +457,110 @@ static struct rockchip_mux_recalced_data rk3128_mux_recalced_data[] = { · 456 unmodified lines
457457
458458 static struct rockchip_mux_recalced_data rk3308_mux_recalced_data[] = {
459459 {
460+ /* gpio1b6_sel */
460461 .num = 1,
461462 .pin = 14,
462463 .reg = 0x28,
463464 .bit = 12,
464465 .mask = 0xf
465466 }, {
467+ /* gpio1b7_sel */
466468 .num = 1,
467469 .pin = 15,
468470 .reg = 0x2c,
469471 .bit = 0,
470472 .mask = 0x3
471473 }, {
474+ /* gpio1c2_sel */
472475 .num = 1,
473476 .pin = 18,
474477 .reg = 0x30,
475478 .bit = 4,
476479 .mask = 0xf
477480 }, {
481+ /* gpio1c3_sel */
478482 .num = 1,
479483 .pin = 19,
480484 .reg = 0x30,
481485 .bit = 8,
482486 .mask = 0xf
483487 }, {
488+ /* gpio1c4_sel */
484489 .num = 1,
485490 .pin = 20,
486491 .reg = 0x30,
487492 .bit = 12,
488493 .mask = 0xf
489494 }, {
495+ /* gpio1c5_sel */
490496 .num = 1,
491497 .pin = 21,
492498 .reg = 0x34,
493499 .bit = 0,
494500 .mask = 0xf
495501 }, {
502+ /* gpio1c6_sel */
496503 .num = 1,
497504 .pin = 22,
498505 .reg = 0x34,
499506 .bit = 4,
500507 .mask = 0xf
501508 }, {
509+ /* gpio1c7_sel */
502510 .num = 1,
503511 .pin = 23,
504512 .reg = 0x34,
505513 .bit = 8,
506514 .mask = 0xf
507515 }, {
508− .num = 3,
509− .pin = 12,
510− .reg = 0x68,
511− .bit = 8,
512− .mask = 0xf
513− }, {
514− .num = 3,
515− .pin = 13,
516− .reg = 0x68,
517− .bit = 12,
518− .mask = 0xf
519− }, {
516+ /* gpio2a2_sel */
520517 .num = 2,
521518 .pin = 2,
522− .reg = 0x608,
523− .bit = 0,
524− .mask = 0x7
519+ .reg = 0x40,
520+ .bit = 4,
521+ .mask = 0x3
525522 }, {
523+ /* gpio2a3_sel */
526524 .num = 2,
527525 .pin = 3,
528− .reg = 0x608,
529− .bit = 4,
530− .mask = 0x7
526+ .reg = 0x40,
527+ .bit = 6,
528+ .mask = 0x3
531529 }, {
530+ /* gpio2c0_sel */
532531 .num = 2,
533532 .pin = 16,
534− .reg = 0x610,
535− .bit = 8,
536− .mask = 0x7
533+ .reg = 0x50,
534+ .bit = 0,
535+ .mask = 0x3
537536 }, {
537+ /* gpio3b2_sel */
538538 .num = 3,
539539 .pin = 10,
540− .reg = 0x610,
541− .bit = 0,
542− .mask = 0x7
540+ .reg = 0x68,
541+ .bit = 4,
542+ .mask = 0x3
543543 }, {
544+ /* gpio3b3_sel */
544545 .num = 3,
545546 .pin = 11,
546− .reg = 0x610,
547− .bit = 4,
548− .mask = 0x7
547+ .reg = 0x68,
548+ .bit = 6,
549+ .mask = 0x3
550+ }, {
551+ /* gpio3b4_sel */
552+ .num = 3,
553+ .pin = 12,
554+ .reg = 0x68,
555+ .bit = 8,
556+ .mask = 0xf
557+ }, {
558+ /* gpio3b5_sel */
559+ .num = 3,
560+ .pin = 13,
561+ .reg = 0x68,
562+ .bit = 12,
563+ .mask = 0xf
549564 },
550565 };
551566
drivers/pinctrl/qcom/pinctrl-sm6350.c+8−8
@@ -264,14 +264,14 @@ static const struct pinctrl_pin_desc sm6350_pins[] = { · 263 unmodified lines
264264 PINCTRL_PIN(153, "GPIO_153"),
265265 PINCTRL_PIN(154, "GPIO_154"),
266266 PINCTRL_PIN(155, "GPIO_155"),
267− PINCTRL_PIN(156, "SDC1_RCLK"),
268− PINCTRL_PIN(157, "SDC1_CLK"),
269− PINCTRL_PIN(158, "SDC1_CMD"),
270− PINCTRL_PIN(159, "SDC1_DATA"),
271− PINCTRL_PIN(160, "SDC2_CLK"),
272− PINCTRL_PIN(161, "SDC2_CMD"),
273− PINCTRL_PIN(162, "SDC2_DATA"),
274− PINCTRL_PIN(163, "UFS_RESET"),
267+ PINCTRL_PIN(156, "UFS_RESET"),
268+ PINCTRL_PIN(157, "SDC1_RCLK"),
269+ PINCTRL_PIN(158, "SDC1_CLK"),
270+ PINCTRL_PIN(159, "SDC1_CMD"),
271+ PINCTRL_PIN(160, "SDC1_DATA"),
272+ PINCTRL_PIN(161, "SDC2_CLK"),
273+ PINCTRL_PIN(162, "SDC2_CMD"),
274+ PINCTRL_PIN(163, "SDC2_DATA"),
275275 };
276276
277277 #define DECLARE_MSM_GPIO_PINS(pin) \
drivers/pinctrl/samsung/Kconfig+4−7
@@ -4,14 +4,13 @@ · 3 unmodified lines
44 #
55 config PINCTRL_SAMSUNG
66 bool
7− depends on OF_GPIO
7+ select GPIOLIB
88 select PINMUX
99 select PINCONF
1010
1111 config PINCTRL_EXYNOS
1212 bool "Pinctrl common driver part for Samsung Exynos SoCs"
13− depends on OF_GPIO
14− depends on ARCH_EXYNOS || ARCH_S5PV210 || COMPILE_TEST
13+ depends on ARCH_EXYNOS || ARCH_S5PV210 || (COMPILE_TEST && OF)
1514 select PINCTRL_SAMSUNG
1615 select PINCTRL_EXYNOS_ARM if ARM && (ARCH_EXYNOS || ARCH_S5PV210)
1716 select PINCTRL_EXYNOS_ARM64 if ARM64 && ARCH_EXYNOS
@@ -26,12 +25,10 @@ config PINCTRL_EXYNOS_ARM64 · 8 unmodified lines
2625
2726 config PINCTRL_S3C24XX
2827 bool "Samsung S3C24XX SoC pinctrl driver"
29− depends on OF_GPIO
30− depends on ARCH_S3C24XX || COMPILE_TEST
28+ depends on ARCH_S3C24XX || (COMPILE_TEST && OF)
3129 select PINCTRL_SAMSUNG
3230
3331 config PINCTRL_S3C64XX
3432 bool "Samsung S3C64XX SoC pinctrl driver"
35− depends on OF_GPIO
36− depends on ARCH_S3C64XX || COMPILE_TEST
33+ depends on ARCH_S3C64XX || (COMPILE_TEST && OF)
3734 select PINCTRL_SAMSUNG
drivers/pinctrl/samsung/pinctrl-exynos-arm64.c+1−1
@@ -770,7 +770,7 @@ static const struct samsung_pin_bank_data fsd_pin_banks2[] __initconst = { · 769 unmodified lines
770770 EXYNOS850_PIN_BANK_EINTN(3, 0x00, "gpq0"),
771771 };
772772
773−const struct samsung_pin_ctrl fsd_pin_ctrl[] __initconst = {
773+static const struct samsung_pin_ctrl fsd_pin_ctrl[] __initconst = {
774774 {
775775 /* pin-controller instance 0 FSYS0 data */
776776 .pin_banks = fsd_pin_banks0,
drivers/pinctrl/stm32/pinctrl-stm32.c+21−2
@@ -225,6 +225,13 @@ static void stm32_gpio_free(struct gpio_chip *chip, unsigned offset) · 224 unmodified lines
225225 pinctrl_gpio_free(chip->base + offset);
226226 }
227227
228+static int stm32_gpio_get_noclk(struct gpio_chip *chip, unsigned int offset)
229+{
230+ struct stm32_gpio_bank *bank = gpiochip_get_data(chip);
231+
232+ return !!(readl_relaxed(bank->base + STM32_GPIO_IDR) & BIT(offset));
233+}
234+
228235 static int stm32_gpio_get(struct gpio_chip *chip, unsigned offset)
229236 {
230237 struct stm32_gpio_bank *bank = gpiochip_get_data(chip);
@@ -232,7 +239,7 @@ static int stm32_gpio_get(struct gpio_chip *chip, unsigned offset) · 1 unmodified line
232239
233240 clk_enable(bank->clk);
234241
235− ret = !!(readl_relaxed(bank->base + STM32_GPIO_IDR) & BIT(offset));
242+ ret = stm32_gpio_get_noclk(chip, offset);
236243
237244 clk_disable(bank->clk);
238245
@@ -311,8 +318,12 @@ static void stm32_gpio_irq_trigger(struct irq_data *d) · 72 unmodified lines
311318 struct stm32_gpio_bank *bank = d->domain->host_data;
312319 int level;
313320
321+ /* Do not access the GPIO if this is not LEVEL triggered IRQ. */
322+ if (!(bank->irq_type[d->hwirq] & IRQ_TYPE_LEVEL_MASK))
323+ return;
324+
314325 /* If level interrupt type then retrig */
315− level = stm32_gpio_get(&bank->gpio_chip, d->hwirq);
326+ level = stm32_gpio_get_noclk(&bank->gpio_chip, d->hwirq);
316327 if ((level == 0 && bank->irq_type[d->hwirq] == IRQ_TYPE_LEVEL_LOW) ||
317328 (level == 1 && bank->irq_type[d->hwirq] == IRQ_TYPE_LEVEL_HIGH))
318329 irq_chip_retrigger_hierarchy(d);
@@ -354,6 +365,7 @@ static int stm32_gpio_irq_request_resources(struct irq_data *irq_data) · 35 unmodified lines
354365 {
355366 struct stm32_gpio_bank *bank = irq_data->domain->host_data;
356367 struct stm32_pinctrl *pctl = dev_get_drvdata(bank->gpio_chip.parent);
368+ unsigned long flags;
357369 int ret;
358370
359371 ret = stm32_gpio_direction_input(&bank->gpio_chip, irq_data->hwirq);
@@ -367,6 +379,10 @@ static int stm32_gpio_irq_request_resources(struct irq_data *irq_data) · 7 unmodified lines
367379 return ret;
368380 }
369381
382+ flags = irqd_get_trigger_type(irq_data);
383+ if (flags & IRQ_TYPE_LEVEL_MASK)
384+ clk_enable(bank->clk);
385+
370386 return 0;
371387 }
372388
@@ -374,6 +390,9 @@ static void stm32_gpio_irq_release_resources(struct irq_data *irq_data) · 1 unmodified line
374390 {
375391 struct stm32_gpio_bank *bank = irq_data->domain->host_data;
376392
393+ if (bank->irq_type[irq_data->hwirq] & IRQ_TYPE_LEVEL_MASK)
394+ clk_disable(bank->clk);
395+
377396 gpiochip_unlock_as_irq(&bank->gpio_chip, irq_data->hwirq);
378397 }
379398
drivers/pinctrl/sunplus/sppctl_sp7021.c+8−0
@@ -419,7 +419,15 @@ static const struct sppctl_grp sp7021grps_prbp[] = { · 418 unmodified lines
419419 EGRP("PROBE_PORT2", 2, pins_prp2),
420420 };
421421
422+/*
423+ * Due to compatible reason, the first valid item should start at the third
424+ * position of the array. Please keep the first two items of the table
425+ * no use (dummy).
426+ */
422427 const struct sppctl_func sppctl_list_funcs[] = {
428+ FNCN("", pinmux_type_fpmx, 0x00, 0, 0),
429+ FNCN("", pinmux_type_fpmx, 0x00, 0, 0),
430+
423431 FNCN("L2SW_CLK_OUT", pinmux_type_fpmx, 0x00, 0, 7),
424432 FNCN("L2SW_MAC_SMI_MDC", pinmux_type_fpmx, 0x00, 8, 7),
425433 FNCN("L2SW_LED_FLASH0", pinmux_type_fpmx, 0x01, 0, 7),
drivers/platform/surface/aggregator/core.c+1−1
@@ -817,7 +817,7 @@ err_cpkg: · 816 unmodified lines
817817 err_bus:
818818 return status;
819819 }
820−module_init(ssam_core_init);
820+subsys_initcall(ssam_core_init);
821821
822822 static void __exit ssam_core_exit(void)
823823 {
drivers/platform/surface/surface_gpe.c+8−0
@@ -99,6 +99,14 @@ static const struct dmi_system_id dmi_lid_device_table[] = { · 98 unmodified lines
9999 },
100100 .driver_data = (void *)lid_device_props_l4D,
101101 },
102+ {
103+ .ident = "Surface Pro 8",
104+ .matches = {
105+ DMI_EXACT_MATCH(DMI_SYS_VENDOR, "Microsoft Corporation"),
106+ DMI_EXACT_MATCH(DMI_PRODUCT_NAME, "Surface Pro 8"),
107+ },
108+ .driver_data = (void *)lid_device_props_l4B,
109+ },
102110 {
103111 .ident = "Surface Book 1",
104112 .matches = {
drivers/platform/x86/asus-wmi.c+10−5
@@ -371,10 +371,14 @@ static int asus_wmi_evaluate_method_buf(u32 method_id, · 370 unmodified lines
371371
372372 switch (obj->type) {
373373 case ACPI_TYPE_BUFFER:
374− if (obj->buffer.length > size)
374+ if (obj->buffer.length > size) {
375375 err = -ENOSPC;
376− if (obj->buffer.length == 0)
376+ break;
377+ }
378+ if (obj->buffer.length == 0) {
377379 err = -ENODATA;
380+ break;
381+ }
378382
379383 memcpy(ret_buffer, obj->buffer.pointer, obj->buffer.length);
380384 break;
@@ -2223,9 +2227,10 @@ static int fan_curve_check_present(struct asus_wmi *asus, bool *available, · 1842 unmodified lines
22232227
22242228 err = fan_curve_get_factory_default(asus, fan_dev);
22252229 if (err) {
2226− if (err == -ENODEV || err == -ENODATA)
2227− return 0;
2228− return err;
2230+ pr_debug("fan_curve_get_factory_default(0x%08x) failed: %d\n",
2231+ fan_dev, err);
2232+ /* Don't cause probe to fail on devices without fan-curves */
2233+ return 0;
22292234 }
22302235
22312236 *available = true;
drivers/platform/x86/dell/dell-laptop.c+13−0
@@ -80,6 +80,10 @@ static struct quirk_entry quirk_dell_inspiron_1012 = { · 79 unmodified lines
8080 .kbd_led_not_present = true,
8181 };
8282
83+static struct quirk_entry quirk_dell_latitude_7520 = {
84+ .kbd_missing_ac_tag = true,
85+};
86+
8387 static struct platform_driver platform_driver = {
8488 .driver = {
8589 .name = "dell-laptop",
@@ -336,6 +340,15 @@ static const struct dmi_system_id dell_quirks[] __initconst = { · 250 unmodified lines
336340 },
337341 .driver_data = &quirk_dell_inspiron_1012,
338342 },
343+ {
344+ .callback = dmi_matched,
345+ .ident = "Dell Latitude 7520",
346+ .matches = {
347+ DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
348+ DMI_MATCH(DMI_PRODUCT_NAME, "Latitude 7520"),
349+ },
350+ .driver_data = &quirk_dell_latitude_7520,
351+ },
339352 { }
340353 };
341354
drivers/platform/x86/gigabyte-wmi.c+1−0
@@ -148,6 +148,7 @@ static const struct dmi_system_id gigabyte_wmi_known_working_platforms[] = { · 147 unmodified lines
148148 DMI_EXACT_MATCH_GIGABYTE_BOARD_NAME("B550I AORUS PRO AX"),
149149 DMI_EXACT_MATCH_GIGABYTE_BOARD_NAME("B550M AORUS PRO-P"),
150150 DMI_EXACT_MATCH_GIGABYTE_BOARD_NAME("B550M DS3H"),
151+ DMI_EXACT_MATCH_GIGABYTE_BOARD_NAME("B660 GAMING X DDR4"),
151152 DMI_EXACT_MATCH_GIGABYTE_BOARD_NAME("Z390 I AORUS PRO WIFI-CF"),
152153 DMI_EXACT_MATCH_GIGABYTE_BOARD_NAME("X570 AORUS ELITE"),
153154 DMI_EXACT_MATCH_GIGABYTE_BOARD_NAME("X570 GAMING X"),
drivers/platform/x86/intel/pmc/core.h+1−1
@@ -236,7 +236,7 @@ enum ppfear_regs { · 235 unmodified lines
236236 #define ADL_LPM_STATUS_LATCH_EN_OFFSET 0x1704
237237 #define ADL_LPM_LIVE_STATUS_OFFSET 0x1764
238238
239−const char *pmc_lpm_modes[] = {
239+static const char *pmc_lpm_modes[] = {
240240 "S0i2.0",
241241 "S0i2.1",
242242 "S0i2.2",
drivers/platform/x86/intel/pmt/telemetry.c+1−1
@@ -103,7 +103,7 @@ static int pmt_telem_probe(struct auxiliary_device *auxdev, const struct auxilia · 102 unmodified lines
103103 auxiliary_set_drvdata(auxdev, priv);
104104
105105 for (i = 0; i < intel_vsec_dev->num_resources; i++) {
106− struct intel_pmt_entry *entry = &priv->entry[i];
106+ struct intel_pmt_entry *entry = &priv->entry[priv->num_entries];
107107
108108 ret = intel_pmt_dev_create(entry, &pmt_telem_ns, intel_vsec_dev, i);
109109 if (ret < 0)
drivers/platform/x86/intel/sdsi.c+30−14
@@ -51,6 +51,8 @@ · 50 unmodified lines
5151 #define MBOX_TIMEOUT_US 2000
5252 #define MBOX_TIMEOUT_ACQUIRE_US 1000
5353 #define MBOX_POLLING_PERIOD_US 100
54+#define MBOX_ACQUIRE_NUM_RETRIES 5
55+#define MBOX_ACQUIRE_RETRY_DELAY_MS 500
5456 #define MBOX_MAX_PACKETS 4
5557
5658 #define MBOX_OWNER_NONE 0x00
@@ -81,7 +83,7 @@ enum sdsi_command { · 24 unmodified lines
8183
8284 struct sdsi_mbox_info {
8385 u64 *payload;
84− u64 *buffer;
86+ void *buffer;
8587 int size;
8688 };
8789
@@ -163,9 +165,7 @@ static int sdsi_mbox_cmd_read(struct sdsi_priv *priv, struct sdsi_mbox_info *inf · 75 unmodified lines
163165 total = 0;
164166 loop = 0;
165167 do {
166− int offset = SDSI_SIZE_MAILBOX * loop;
167− void __iomem *addr = priv->mbox_addr + offset;
168− u64 *buf = info->buffer + offset / SDSI_SIZE_CMD;
168+ void *buf = info->buffer + (SDSI_SIZE_MAILBOX * loop);
169169 u32 packet_size;
170170
171171 /* Poll on ready bit */
@@ -196,7 +196,7 @@ static int sdsi_mbox_cmd_read(struct sdsi_priv *priv, struct sdsi_mbox_info *inf · 24 unmodified lines
196196 break;
197197 }
198198
199− sdsi_memcpy64_fromio(buf, addr, round_up(packet_size, SDSI_SIZE_CMD));
199+ sdsi_memcpy64_fromio(buf, priv->mbox_addr, round_up(packet_size, SDSI_SIZE_CMD));
200200
201201 total += packet_size;
202202
@@ -243,8 +243,8 @@ static int sdsi_mbox_cmd_write(struct sdsi_priv *priv, struct sdsi_mbox_info *in · 40 unmodified lines
243243 FIELD_PREP(CTRL_PACKET_SIZE, info->size);
244244 writeq(control, priv->control_addr);
245245
246− /* Poll on run_busy bit */
247− ret = readq_poll_timeout(priv->control_addr, control, !(control & CTRL_RUN_BUSY),
246+ /* Poll on ready bit */
247+ ret = readq_poll_timeout(priv->control_addr, control, control & CTRL_READY,
248248 MBOX_POLLING_PERIOD_US, MBOX_TIMEOUT_US);
249249
250250 if (ret)
@@ -263,7 +263,7 @@ static int sdsi_mbox_acquire(struct sdsi_priv *priv, struct sdsi_mbox_info *info · 12 unmodified lines
263263 {
264264 u64 control;
265265 u32 owner;
266− int ret;
266+ int ret, retries = 0;
267267
268268 lockdep_assert_held(&priv->mb_lock);
269269
@@ -273,13 +273,29 @@ static int sdsi_mbox_acquire(struct sdsi_priv *priv, struct sdsi_mbox_info *info · 3 unmodified lines
273273 if (owner != MBOX_OWNER_NONE)
274274 return -EBUSY;
275275
276− /* Write first qword of payload */
277− writeq(info->payload[0], priv->mbox_addr);
276+ /*
277+ * If there has been no recent transaction and no one owns the mailbox,
278+ * we should acquire it in under 1ms. However, if we've accessed it
279+ * recently it may take up to 2.1 seconds to acquire it again.
280+ */
281+ do {
282+ /* Write first qword of payload */
283+ writeq(info->payload[0], priv->mbox_addr);
284+
285+ /* Check for ownership */
286+ ret = readq_poll_timeout(priv->control_addr, control,
287+ FIELD_GET(CTRL_OWNER, control) == MBOX_OWNER_INBAND,
288+ MBOX_POLLING_PERIOD_US, MBOX_TIMEOUT_ACQUIRE_US);
289+
290+ if (FIELD_GET(CTRL_OWNER, control) == MBOX_OWNER_NONE &&
291+ retries++ < MBOX_ACQUIRE_NUM_RETRIES) {
292+ msleep(MBOX_ACQUIRE_RETRY_DELAY_MS);
293+ continue;
294+ }
278295
279− /* Check for ownership */
280− ret = readq_poll_timeout(priv->control_addr, control,
281− FIELD_GET(CTRL_OWNER, control) & MBOX_OWNER_INBAND,
282− MBOX_POLLING_PERIOD_US, MBOX_TIMEOUT_ACQUIRE_US);
296+ /* Either we got it or someone else did. */
297+ break;
298+ } while (true);
283299
284300 return ret;
285301 }
drivers/platform/x86/intel/uncore-frequency/uncore-frequency.c+3−0
@@ -212,6 +212,9 @@ static int __init intel_uncore_init(void) · 211 unmodified lines
212212 const struct x86_cpu_id *id;
213213 int ret;
214214
215+ if (cpu_feature_enabled(X86_FEATURE_HYPERVISOR))
216+ return -ENODEV;
217+
215218 id = x86_match_cpu(intel_uncore_cpu_ids);
216219 if (!id)
217220 return -ENODEV;
drivers/platform/x86/thinkpad_acpi.c+163−12
@@ -309,6 +309,20 @@ struct ibm_init_struct { · 308 unmodified lines
309309 struct ibm_struct *data;
310310 };
311311
312+/* DMI Quirks */
313+struct quirk_entry {
314+ bool btusb_bug;
315+ u32 s2idle_bug_mmio;
316+};
317+
318+static struct quirk_entry quirk_btusb_bug = {
319+ .btusb_bug = true,
320+};
321+
322+static struct quirk_entry quirk_s2idle_bug = {
323+ .s2idle_bug_mmio = 0xfed80380,
324+};
325+
312326 static struct {
313327 u32 bluetooth:1;
314328 u32 hotkey:1;
@@ -338,6 +352,7 @@ static struct { · 23 unmodified lines
338352 u32 hotkey_poll_active:1;
339353 u32 has_adaptive_kbd:1;
340354 u32 kbd_lang:1;
355+ struct quirk_entry *quirks;
341356 } tp_features;
342357
343358 static struct {
@@ -4359,9 +4374,10 @@ static void bluetooth_exit(void) · 4015 unmodified lines
43594374 bluetooth_shutdown();
43604375 }
43614376
4362−static const struct dmi_system_id bt_fwbug_list[] __initconst = {
4377+static const struct dmi_system_id fwbug_list[] __initconst = {
43634378 {
43644379 .ident = "ThinkPad E485",
4380+ .driver_data = &quirk_btusb_bug,
43654381 .matches = {
43664382 DMI_MATCH(DMI_SYS_VENDOR, "LENOVO"),
43674383 DMI_MATCH(DMI_BOARD_NAME, "20KU"),
@@ -4369,6 +4385,7 @@ static const struct dmi_system_id bt_fwbug_list[] __initconst = { · 1 unmodified line
43694385 },
43704386 {
43714387 .ident = "ThinkPad E585",
4388+ .driver_data = &quirk_btusb_bug,
43724389 .matches = {
43734390 DMI_MATCH(DMI_SYS_VENDOR, "LENOVO"),
43744391 DMI_MATCH(DMI_BOARD_NAME, "20KV"),
@@ -4376,6 +4393,7 @@ static const struct dmi_system_id bt_fwbug_list[] __initconst = { · 1 unmodified line
43764393 },
43774394 {
43784395 .ident = "ThinkPad A285 - 20MW",
4396+ .driver_data = &quirk_btusb_bug,
43794397 .matches = {
43804398 DMI_MATCH(DMI_SYS_VENDOR, "LENOVO"),
43814399 DMI_MATCH(DMI_BOARD_NAME, "20MW"),
@@ -4383,6 +4401,7 @@ static const struct dmi_system_id bt_fwbug_list[] __initconst = { · 1 unmodified line
43834401 },
43844402 {
43854403 .ident = "ThinkPad A285 - 20MX",
4404+ .driver_data = &quirk_btusb_bug,
43864405 .matches = {
43874406 DMI_MATCH(DMI_SYS_VENDOR, "LENOVO"),
43884407 DMI_MATCH(DMI_BOARD_NAME, "20MX"),
@@ -4390,6 +4409,7 @@ static const struct dmi_system_id bt_fwbug_list[] __initconst = { · 1 unmodified line
43904409 },
43914410 {
43924411 .ident = "ThinkPad A485 - 20MU",
4412+ .driver_data = &quirk_btusb_bug,
43934413 .matches = {
43944414 DMI_MATCH(DMI_SYS_VENDOR, "LENOVO"),
43954415 DMI_MATCH(DMI_BOARD_NAME, "20MU"),
@@ -4397,14 +4417,125 @@ static const struct dmi_system_id bt_fwbug_list[] __initconst = { · 1 unmodified line
43974417 },
43984418 {
43994419 .ident = "ThinkPad A485 - 20MV",
4420+ .driver_data = &quirk_btusb_bug,
44004421 .matches = {
44014422 DMI_MATCH(DMI_SYS_VENDOR, "LENOVO"),
44024423 DMI_MATCH(DMI_BOARD_NAME, "20MV"),
44034424 },
44044425 },
4426+ {
4427+ .ident = "L14 Gen2 AMD",
4428+ .driver_data = &quirk_s2idle_bug,
4429+ .matches = {
4430+ DMI_MATCH(DMI_BOARD_VENDOR, "LENOVO"),
4431+ DMI_MATCH(DMI_PRODUCT_NAME, "20X5"),
4432+ }
4433+ },
4434+ {
4435+ .ident = "T14s Gen2 AMD",
4436+ .driver_data = &quirk_s2idle_bug,
4437+ .matches = {
4438+ DMI_MATCH(DMI_BOARD_VENDOR, "LENOVO"),
4439+ DMI_MATCH(DMI_PRODUCT_NAME, "20XF"),
4440+ }
4441+ },
4442+ {
4443+ .ident = "X13 Gen2 AMD",
4444+ .driver_data = &quirk_s2idle_bug,
4445+ .matches = {
4446+ DMI_MATCH(DMI_BOARD_VENDOR, "LENOVO"),
4447+ DMI_MATCH(DMI_PRODUCT_NAME, "20XH"),
4448+ }
4449+ },
4450+ {
4451+ .ident = "T14 Gen2 AMD",
4452+ .driver_data = &quirk_s2idle_bug,
4453+ .matches = {
4454+ DMI_MATCH(DMI_BOARD_VENDOR, "LENOVO"),
4455+ DMI_MATCH(DMI_PRODUCT_NAME, "20XK"),
4456+ }
4457+ },
4458+ {
4459+ .ident = "T14 Gen1 AMD",
4460+ .driver_data = &quirk_s2idle_bug,
4461+ .matches = {
4462+ DMI_MATCH(DMI_BOARD_VENDOR, "LENOVO"),
4463+ DMI_MATCH(DMI_PRODUCT_NAME, "20UD"),
4464+ }
4465+ },
4466+ {
4467+ .ident = "T14 Gen1 AMD",
4468+ .driver_data = &quirk_s2idle_bug,
4469+ .matches = {
4470+ DMI_MATCH(DMI_BOARD_VENDOR, "LENOVO"),
4471+ DMI_MATCH(DMI_PRODUCT_NAME, "20UE"),
4472+ }
4473+ },
4474+ {
4475+ .ident = "T14s Gen1 AMD",
4476+ .driver_data = &quirk_s2idle_bug,
4477+ .matches = {
4478+ DMI_MATCH(DMI_BOARD_VENDOR, "LENOVO"),
4479+ DMI_MATCH(DMI_PRODUCT_NAME, "20UH"),
4480+ }
4481+ },
4482+ {
4483+ .ident = "P14s Gen1 AMD",
4484+ .driver_data = &quirk_s2idle_bug,
4485+ .matches = {
4486+ DMI_MATCH(DMI_BOARD_VENDOR, "LENOVO"),
4487+ DMI_MATCH(DMI_PRODUCT_NAME, "20Y1"),
4488+ }
4489+ },
4490+ {
4491+ .ident = "P14s Gen2 AMD",
4492+ .driver_data = &quirk_s2idle_bug,
4493+ .matches = {
4494+ DMI_MATCH(DMI_BOARD_VENDOR, "LENOVO"),
4495+ DMI_MATCH(DMI_PRODUCT_NAME, "21A0"),
4496+ }
4497+ },
44054498 {}
44064499 };
44074500
4501+#ifdef CONFIG_SUSPEND
4502+/*
4503+ * Lenovo laptops from a variety of generations run a SMI handler during the D3->D0
4504+ * transition that occurs specifically when exiting suspend to idle which can cause
4505+ * large delays during resume when the IOMMU translation layer is enabled (the default
4506+ * behavior) for NVME devices:
4507+ *
4508+ * To avoid this firmware problem, skip the SMI handler on these machines before the
4509+ * D0 transition occurs.
4510+ */
4511+static void thinkpad_acpi_amd_s2idle_restore(void)
4512+{
4513+ struct resource *res;
4514+ void __iomem *addr;
4515+ u8 val;
4516+
4517+ res = request_mem_region_muxed(tp_features.quirks->s2idle_bug_mmio, 1,
4518+ "thinkpad_acpi_pm80");
4519+ if (!res)
4520+ return;
4521+
4522+ addr = ioremap(tp_features.quirks->s2idle_bug_mmio, 1);
4523+ if (!addr)
4524+ goto cleanup_resource;
4525+
4526+ val = ioread8(addr);
4527+ iowrite8(val & ~BIT(0), addr);
4528+
4529+ iounmap(addr);
4530+cleanup_resource:
4531+ release_resource(res);
4532+}
4533+
4534+static struct acpi_s2idle_dev_ops thinkpad_acpi_s2idle_dev_ops = {
4535+ .restore = thinkpad_acpi_amd_s2idle_restore,
4536+};
4537+#endif
4538+
44084539 static const struct pci_device_id fwbug_cards_ids[] __initconst = {
44094540 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x24F3) },
44104541 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x24FD) },
@@ -4419,7 +4550,8 @@ static int __init have_bt_fwbug(void) · 8 unmodified lines
44194550 * Some AMD based ThinkPads have a firmware bug that calling
44204551 * "GBDC" will cause bluetooth on Intel wireless cards blocked
44214552 */
4422− if (dmi_check_system(bt_fwbug_list) && pci_dev_present(fwbug_cards_ids)) {
4553+ if (tp_features.quirks && tp_features.quirks->btusb_bug &&
4554+ pci_dev_present(fwbug_cards_ids)) {
44234555 vdbg_printk(TPACPI_DBG_INIT | TPACPI_DBG_RFKILL,
44244556 FW_BUG "disable bluetooth subdriver for Intel cards\n");
44254557 return 1;
@@ -8748,24 +8880,27 @@ static int __init fan_init(struct ibm_init_struct *iibm) · 4322 unmodified lines
87488880 fan_status_access_mode = TPACPI_FAN_RD_TPEC;
87498881 if (quirks & TPACPI_FAN_Q1)
87508882 fan_quirk1_setup();
8751− if (quirks & TPACPI_FAN_2FAN) {
8752− tp_features.second_fan = 1;
8753− pr_info("secondary fan support enabled\n");
8754− }
8755− if (quirks & TPACPI_FAN_2CTL) {
8756− tp_features.second_fan = 1;
8757− tp_features.second_fan_ctl = 1;
8758− pr_info("secondary fan control enabled\n");
8759− }
87608883 /* Try and probe the 2nd fan */
8884+ tp_features.second_fan = 1; /* needed for get_speed to work */
87618885 res = fan2_get_speed(&speed);
87628886 if (res >= 0) {
87638887 /* It responded - so let's assume it's there */
87648888 tp_features.second_fan = 1;
87658889 tp_features.second_fan_ctl = 1;
87668890 pr_info("secondary fan control detected & enabled\n");
8891+ } else {
8892+ /* Fan not auto-detected */
8893+ tp_features.second_fan = 0;
8894+ if (quirks & TPACPI_FAN_2FAN) {
8895+ tp_features.second_fan = 1;
8896+ pr_info("secondary fan support enabled\n");
8897+ }
8898+ if (quirks & TPACPI_FAN_2CTL) {
8899+ tp_features.second_fan = 1;
8900+ tp_features.second_fan_ctl = 1;
8901+ pr_info("secondary fan control enabled\n");
8902+ }
87678903 }
8768−
87698904 } else {
87708905 pr_err("ThinkPad ACPI EC access misbehaving, fan status and control unavailable\n");
87718906 return -ENODEV;
@@ -11455,6 +11590,10 @@ static void thinkpad_acpi_module_exit(void) · 2683 unmodified lines
1145511590
1145611591 tpacpi_lifecycle = TPACPI_LIFE_EXITING;
1145711592
11593+#ifdef CONFIG_SUSPEND
11594+ if (tp_features.quirks && tp_features.quirks->s2idle_bug_mmio)
11595+ acpi_unregister_lps0_dev(&thinkpad_acpi_s2idle_dev_ops);
11596+#endif
1145811597 if (tpacpi_hwmon)
1145911598 hwmon_device_unregister(tpacpi_hwmon);
1146011599 if (tp_features.sensors_pdrv_registered)
@@ -11496,6 +11635,7 @@ static void thinkpad_acpi_module_exit(void) · 35 unmodified lines
1149611635
1149711636 static int __init thinkpad_acpi_module_init(void)
1149811637 {
11638+ const struct dmi_system_id *dmi_id;
1149911639 int ret, i;
1150011640
1150111641 tpacpi_lifecycle = TPACPI_LIFE_INIT;
@@ -11535,6 +11675,10 @@ static int __init thinkpad_acpi_module_init(void) · 33 unmodified lines
1153511675 return -ENODEV;
1153611676 }
1153711677
11678+ dmi_id = dmi_first_match(fwbug_list);
11679+ if (dmi_id)
11680+ tp_features.quirks = dmi_id->driver_data;
11681+
1153811682 /* Device initialization */
1153911683 tpacpi_pdev = platform_device_register_simple(TPACPI_DRVR_NAME, -1,
1154011684 NULL, 0);
@@ -11623,6 +11767,13 @@ static int __init thinkpad_acpi_module_init(void) · 82 unmodified lines
1162311767 tp_features.input_device_registered = 1;
1162411768 }
1162511769
11770+#ifdef CONFIG_SUSPEND
11771+ if (tp_features.quirks && tp_features.quirks->s2idle_bug_mmio) {
11772+ if (!acpi_register_lps0_dev(&thinkpad_acpi_s2idle_dev_ops))
11773+ pr_info("Using s2idle quirk to avoid %s platform firmware bug\n",
11774+ (dmi_id && dmi_id->ident) ? dmi_id->ident : "");
11775+ }
11776+#endif
1162611777 return 0;
1162711778 }
1162811779
drivers/ptp/ptp_ocp.c+1−1
@@ -1557,7 +1557,7 @@ ptp_ocp_signal_set(struct ptp_ocp *bp, int gen, struct ptp_ocp_signal *s) · 1556 unmodified lines
15571557 start_ns = ktime_set(ts.tv_sec, ts.tv_nsec) + NSEC_PER_MSEC;
15581558 if (!s->start) {
15591559 /* roundup() does not work on 32-bit systems */
1560− s->start = DIV_ROUND_UP_ULL(start_ns, s->period);
1560+ s->start = DIV64_U64_ROUND_UP(start_ns, s->period);
15611561 s->start = ktime_add(s->start, s->phase);
15621562 }
15631563
drivers/s390/block/dasd.c+15−3
@@ -1422,6 +1422,13 @@ int dasd_start_IO(struct dasd_ccw_req *cqr) · 1421 unmodified lines
14221422 if (!cqr->lpm)
14231423 cqr->lpm = dasd_path_get_opm(device);
14241424 }
1425+ /*
1426+ * remember the amount of formatted tracks to prevent double format on
1427+ * ESE devices
1428+ */
1429+ if (cqr->block)
1430+ cqr->trkcount = atomic_read(&cqr->block->trkcount);
1431+
14251432 if (cqr->cpmode == 1) {
14261433 rc = ccw_device_tm_start(device->cdev, cqr->cpaddr,
14271434 (long) cqr, cqr->lpm);
@@ -1639,6 +1646,7 @@ void dasd_int_handler(struct ccw_device *cdev, unsigned long intparm, · 211 unmodified lines
16391646 unsigned long now;
16401647 int nrf_suppressed = 0;
16411648 int fp_suppressed = 0;
1649+ struct request *req;
16421650 u8 *sense = NULL;
16431651 int expires;
16441652
@@ -1739,7 +1747,12 @@ void dasd_int_handler(struct ccw_device *cdev, unsigned long intparm, · 94 unmodified lines
17391747 }
17401748
17411749 if (dasd_ese_needs_format(cqr->block, irb)) {
1742− if (rq_data_dir((struct request *)cqr->callback_data) == READ) {
1750+ req = dasd_get_callback_data(cqr);
1751+ if (!req) {
1752+ cqr->status = DASD_CQR_ERROR;
1753+ return;
1754+ }
1755+ if (rq_data_dir(req) == READ) {
17431756 device->discipline->ese_read(cqr, irb);
17441757 cqr->status = DASD_CQR_SUCCESS;
17451758 cqr->stopclk = now;
@@ -2765,8 +2778,7 @@ static void __dasd_cleanup_cqr(struct dasd_ccw_req *cqr) · 1019 unmodified lines
27652778 * complete a request partially.
27662779 */
27672780 if (proc_bytes) {
2768− blk_update_request(req, BLK_STS_OK,
2769− blk_rq_bytes(req) - proc_bytes);
2781+ blk_update_request(req, BLK_STS_OK, proc_bytes);
27702782 blk_mq_requeue_request(req, true);
27712783 } else if (likely(!blk_should_fake_timeout(req->q))) {
27722784 blk_mq_complete_request(req);
drivers/s390/block/dasd_eckd.c+22−11
@@ -1480,7 +1480,7 @@ static int dasd_eckd_pe_handler(struct dasd_device *device, · 1479 unmodified lines
14801480 {
14811481 struct pe_handler_work_data *data;
14821482
1483− data = kmalloc(sizeof(*data), GFP_ATOMIC | GFP_DMA);
1483+ data = kzalloc(sizeof(*data), GFP_ATOMIC | GFP_DMA);
14841484 if (!data) {
14851485 if (mutex_trylock(&dasd_pe_handler_mutex)) {
14861486 data = pe_handler_worker;
@@ -1488,9 +1488,6 @@ static int dasd_eckd_pe_handler(struct dasd_device *device, · 1 unmodified line
14881488 } else {
14891489 return -ENOMEM;
14901490 }
1491− } else {
1492− memset(data, 0, sizeof(*data));
1493− data->isglobal = 0;
14941491 }
14951492 INIT_WORK(&data->worker, do_pe_handler_work);
14961493 dasd_get_device(device);
@@ -3083,13 +3080,24 @@ static int dasd_eckd_format_device(struct dasd_device *base, · 1586 unmodified lines
30833080 }
30843081
30853082 static bool test_and_set_format_track(struct dasd_format_entry *to_format,
3086− struct dasd_block *block)
3083+ struct dasd_ccw_req *cqr)
30873084 {
3085+ struct dasd_block *block = cqr->block;
30883086 struct dasd_format_entry *format;
30893087 unsigned long flags;
30903088 bool rc = false;
30913089
30923090 spin_lock_irqsave(&block->format_lock, flags);
3091+ if (cqr->trkcount != atomic_read(&block->trkcount)) {
3092+ /*
3093+ * The number of formatted tracks has changed after request
3094+ * start and we can not tell if the current track was involved.
3095+ * To avoid data corruption treat it as if the current track is
3096+ * involved
3097+ */
3098+ rc = true;
3099+ goto out;
3100+ }
30933101 list_for_each_entry(format, &block->format_list, list) {
30943102 if (format->track == to_format->track) {
30953103 rc = true;
@@ -3109,6 +3117,7 @@ static void clear_format_track(struct dasd_format_entry *format, · 13 unmodified lines
31093117 unsigned long flags;
31103118
31113119 spin_lock_irqsave(&block->format_lock, flags);
3120+ atomic_inc(&block->trkcount);
31123121 list_del_init(&format->list);
31133122 spin_unlock_irqrestore(&block->format_lock, flags);
31143123 }
@@ -3145,7 +3154,7 @@ dasd_eckd_ese_format(struct dasd_device *startdev, struct dasd_ccw_req *cqr, · 30 unmodified lines
31453154 sector_t curr_trk;
31463155 int rc;
31473156
3148− req = cqr->callback_data;
3157+ req = dasd_get_callback_data(cqr);
31493158 block = cqr->block;
31503159 base = block->base;
31513160 private = base->private;
@@ -3170,8 +3179,11 @@ dasd_eckd_ese_format(struct dasd_device *startdev, struct dasd_ccw_req *cqr, · 18 unmodified lines
31703179 }
31713180 format->track = curr_trk;
31723181 /* test if track is already in formatting by another thread */
3173− if (test_and_set_format_track(format, block))
3182+ if (test_and_set_format_track(format, cqr)) {
3183+ /* this is no real error so do not count down retries */
3184+ cqr->retries++;
31743185 return ERR_PTR(-EEXIST);
3186+ }
31753187
31763188 fdata.start_unit = curr_trk;
31773189 fdata.stop_unit = curr_trk;
@@ -3270,12 +3282,11 @@ static int dasd_eckd_ese_read(struct dasd_ccw_req *cqr, struct irb *irb) · 92 unmodified lines
32703282 cqr->proc_bytes = blk_count * blksize;
32713283 return 0;
32723284 }
3273− if (dst && !skip_block) {
3274− dst += off;
3285+ if (dst && !skip_block)
32753286 memset(dst, 0, blksize);
3276− } else {
3287+ else
32773288 skip_block--;
3278− }
3289+ dst += blksize;
32793290 blk_count++;
32803291 }
32813292 }
drivers/s390/block/dasd_int.h+14−0
@@ -187,6 +187,7 @@ struct dasd_ccw_req { · 186 unmodified lines
187187 void (*callback)(struct dasd_ccw_req *, void *data);
188188 void *callback_data;
189189 unsigned int proc_bytes; /* bytes for partial completion */
190+ unsigned int trkcount; /* count formatted tracks */
190191 };
191192
192193 /*
@@ -610,6 +611,7 @@ struct dasd_block { · 417 unmodified lines
610611
611612 struct list_head format_list;
612613 spinlock_t format_lock;
614+ atomic_t trkcount;
613615 };
614616
615617 struct dasd_attention_data {
@@ -756,6 +758,18 @@ dasd_check_blocksize(int bsize) · 140 unmodified lines
756758 return 0;
757759 }
758760
761+/*
762+ * return the callback data of the original request in case there are
763+ * ERP requests build on top of it
764+ */
765+static inline void *dasd_get_callback_data(struct dasd_ccw_req *cqr)
766+{
767+ while (cqr->refers)
768+ cqr = cqr->refers;
769+
770+ return cqr->callback_data;
771+}
772+
759773 /* externals in dasd.c */
760774 #define DASD_PROFILE_OFF 0
761775 #define DASD_PROFILE_ON 1
drivers/s390/net/ctcm_mpc.c+1−5
@@ -626,8 +626,6 @@ static void mpc_rcvd_sweep_resp(struct mpcg_info *mpcginfo) · 625 unmodified lines
626626 ctcm_clear_busy_do(dev);
627627 }
628628
629− kfree(mpcginfo);
630−
631629 return;
632630
633631 }
@@ -1192,10 +1190,10 @@ static void ctcmpc_unpack_skb(struct channel *ch, struct sk_buff *pskb) · 558 unmodified lines
11921190 CTCM_FUNTAIL, dev->name);
11931191 priv->stats.rx_dropped++;
11941192 /* mpcginfo only used for non-data transfers */
1195− kfree(mpcginfo);
11961193 if (do_debug_data)
11971194 ctcmpc_dump_skb(pskb, -8);
11981195 }
1196+ kfree(mpcginfo);
11991197 }
12001198 done:
12011199
@@ -1977,7 +1975,6 @@ static void mpc_action_rcvd_xid0(fsm_instance *fsm, int event, void *arg) · 775 unmodified lines
19771975 }
19781976 break;
19791977 }
1980− kfree(mpcginfo);
19811978
19821979 CTCM_PR_DEBUG("ctcmpc:%s() %s xid2:%i xid7:%i xidt_p2:%i \n",
19831980 __func__, ch->id, grp->outstanding_xid2,
@@ -2038,7 +2035,6 @@ static void mpc_action_rcvd_xid7(fsm_instance *fsm, int event, void *arg) · 54 unmodified lines
20382035 mpc_validate_xid(mpcginfo);
20392036 break;
20402037 }
2041− kfree(mpcginfo);
20422038 return;
20432039 }
20442040
drivers/s390/net/ctcm_sysfs.c+3−2
@@ -39,11 +39,12 @@ static ssize_t ctcm_buffer_write(struct device *dev, · 38 unmodified lines
3939 struct ctcm_priv *priv = dev_get_drvdata(dev);
4040 int rc;
4141
42− ndev = priv->channel[CTCM_READ]->netdev;
43− if (!(priv && priv->channel[CTCM_READ] && ndev)) {
42+ if (!(priv && priv->channel[CTCM_READ] &&
43+ priv->channel[CTCM_READ]->netdev)) {
4444 CTCM_DBF_TEXT(SETUP, CTC_DBF_ERROR, "bfnondev");
4545 return -ENODEV;
4646 }
47+ ndev = priv->channel[CTCM_READ]->netdev;
4748
4849 rc = kstrtouint(buf, 0, &bs1);
4950 if (rc)
drivers/s390/net/lcs.c+4−3
@@ -1736,10 +1736,11 @@ lcs_get_control(struct lcs_card *card, struct lcs_cmd *cmd) · 1735 unmodified lines
17361736 lcs_schedule_recovery(card);
17371737 break;
17381738 case LCS_CMD_STOPLAN:
1739− pr_warn("Stoplan for %s initiated by LGW\n",
1740− card->dev->name);
1741− if (card->dev)
1739+ if (card->dev) {
1740+ pr_warn("Stoplan for %s initiated by LGW\n",
1741+ card->dev->name);
17421742 netif_carrier_off(card->dev);
1743+ }
17431744 break;
17441745 default:
17451746 LCS_DBF_TEXT(5, trace, "noLGWcmd");
drivers/scsi/device_handler/scsi_dh_alua.c+1−2
@@ -1172,9 +1172,8 @@ static blk_status_t alua_prep_fn(struct scsi_device *sdev, struct request *req) · 1171 unmodified lines
11721172 case SCSI_ACCESS_STATE_OPTIMAL:
11731173 case SCSI_ACCESS_STATE_ACTIVE:
11741174 case SCSI_ACCESS_STATE_LBA:
1175− return BLK_STS_OK;
11761175 case SCSI_ACCESS_STATE_TRANSITIONING:
1177− return BLK_STS_AGAIN;
1176+ return BLK_STS_OK;
11781177 default:
11791178 req->rq_flags |= RQF_QUIET;
11801179 return BLK_STS_IOERR;
drivers/scsi/lpfc/lpfc_els.c+1−1
@@ -1330,7 +1330,7 @@ lpfc_issue_els_flogi(struct lpfc_vport *vport, struct lpfc_nodelist *ndlp, · 1329 unmodified lines
13301330 if (bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) ==
13311331 LPFC_SLI_INTF_IF_TYPE_0) {
13321332 /* FLOGI needs to be 3 for WQE FCFI */
1333− ct = ((SLI4_CT_FCFI >> 1) & 1) | (SLI4_CT_FCFI & 1);
1333+ ct = SLI4_CT_FCFI;
13341334 bf_set(wqe_ct, &wqe->els_req.wqe_com, ct);
13351335
13361336 /* Set the fcfi to the fcfi we registered with */
drivers/scsi/lpfc/lpfc_sli.c+3−3
@@ -10720,10 +10720,10 @@ __lpfc_sli_prep_gen_req_s4(struct lpfc_iocbq *cmdiocbq, struct lpfc_dmabuf *bmp, · 10719 unmodified lines
1072010720
1072110721 /* Words 0 - 2 */
1072210722 bde = (struct ulp_bde64_le *)&cmdwqe->generic.bde;
10723− bde->addr_low = cpu_to_le32(putPaddrLow(bmp->phys));
10724− bde->addr_high = cpu_to_le32(putPaddrHigh(bmp->phys));
10723+ bde->addr_low = bpl->addr_low;
10724+ bde->addr_high = bpl->addr_high;
1072510725 bde->type_size = cpu_to_le32(xmit_len);
10726− bde->type_size |= cpu_to_le32(ULP_BDE64_TYPE_BLP_64);
10726+ bde->type_size |= cpu_to_le32(ULP_BDE64_TYPE_BDE_64);
1072710727
1072810728 /* Word 3 */
1072910729 cmdwqe->gen_req.request_payload_len = xmit_len;
drivers/scsi/qla2xxx/qla_target.c+3−0
@@ -3826,6 +3826,9 @@ int qlt_abort_cmd(struct qla_tgt_cmd *cmd) · 3825 unmodified lines
38263826
38273827 spin_lock_irqsave(&cmd->cmd_lock, flags);
38283828 if (cmd->aborted) {
3829+ if (cmd->sg_mapped)
3830+ qlt_unmap_sg(vha, cmd);
3831+
38293832 spin_unlock_irqrestore(&cmd->cmd_lock, flags);
38303833 /*
38313834 * It's normal to see 2 calls in this path:
drivers/slimbus/qcom-ctrl.c+2−2
@@ -510,9 +510,9 @@ static int qcom_slim_probe(struct platform_device *pdev) · 509 unmodified lines
510510 }
511511
512512 ctrl->irq = platform_get_irq(pdev, 0);
513− if (!ctrl->irq) {
513+ if (ctrl->irq < 0) {
514514 dev_err(&pdev->dev, "no slimbus IRQ\n");
515− return -ENODEV;
515+ return ctrl->irq;
516516 }
517517
518518 sctrl = &ctrl->ctrl;
drivers/soc/imx/imx8m-blk-ctrl.c+1−1
@@ -50,7 +50,7 @@ struct imx8m_blk_ctrl_domain_data { · 49 unmodified lines
5050 u32 mipi_phy_rst_mask;
5151 };
5252
53−#define DOMAIN_MAX_CLKS 3
53+#define DOMAIN_MAX_CLKS 4
5454
5555 struct imx8m_blk_ctrl_domain {
5656 struct generic_pm_domain genpd;
drivers/target/target_core_pscsi.c+5−5
@@ -588,7 +588,7 @@ static void pscsi_destroy_device(struct se_device *dev) · 587 unmodified lines
588588 }
589589
590590 static void pscsi_complete_cmd(struct se_cmd *cmd, u8 scsi_status,
591− unsigned char *req_sense)
591+ unsigned char *req_sense, int valid_data)
592592 {
593593 struct pscsi_dev_virt *pdv = PSCSI_DEV(cmd->se_dev);
594594 struct scsi_device *sd = pdv->pdv_sd;
@@ -681,7 +681,7 @@ after_mode_select: · 86 unmodified lines
681681 * back despite framework assumption that a
682682 * check condition means there is no data
683683 */
684− if (sd->type == TYPE_TAPE &&
684+ if (sd->type == TYPE_TAPE && valid_data &&
685685 cmd->data_direction == DMA_FROM_DEVICE) {
686686 /*
687687 * is sense data valid, fixed format,
@@ -1032,6 +1032,7 @@ static void pscsi_req_done(struct request *req, blk_status_t status) · 344 unmodified lines
10321032 struct se_cmd *cmd = req->end_io_data;
10331033 struct scsi_cmnd *scmd = blk_mq_rq_to_pdu(req);
10341034 enum sam_status scsi_status = scmd->result & 0xff;
1035+ int valid_data = cmd->data_length - scmd->resid_len;
10351036 u8 *cdb = cmd->priv;
10361037
10371038 if (scsi_status != SAM_STAT_GOOD) {
@@ -1039,12 +1040,11 @@ static void pscsi_req_done(struct request *req, blk_status_t status) · 1 unmodified line
10391040 " 0x%02x Result: 0x%08x\n", cmd, cdb[0], scmd->result);
10401041 }
10411042
1042− pscsi_complete_cmd(cmd, scsi_status, scmd->sense_buffer);
1043+ pscsi_complete_cmd(cmd, scsi_status, scmd->sense_buffer, valid_data);
10431044
10441045 switch (host_byte(scmd->result)) {
10451046 case DID_OK:
1046− target_complete_cmd_with_length(cmd, scsi_status,
1047− cmd->data_length - scmd->resid_len);
1047+ target_complete_cmd_with_length(cmd, scsi_status, valid_data);
10481048 break;
10491049 default:
10501050 pr_debug("PSCSI Host Byte exception at cmd: %p CDB:"
drivers/tee/optee/ffa_abi.c+1−0
@@ -865,6 +865,7 @@ err_rhashtable_free: · 864 unmodified lines
865865 rhashtable_free_and_destroy(&optee->ffa.global_ids, rh_free_fn, NULL);
866866 optee_supp_uninit(&optee->supp);
867867 mutex_destroy(&optee->call_queue.mutex);
868+ mutex_destroy(&optee->ffa.mutex);
868869 err_unreg_supp_teedev:
869870 tee_device_unregister(optee->supp_teedev);
870871 err_unreg_teedev:
drivers/thermal/Kconfig+4−2
@@ -113,8 +113,10 @@ config THERMAL_DEFAULT_GOV_USER_SPACE · 112 unmodified lines
113113 bool "user_space"
114114 select THERMAL_GOV_USER_SPACE
115115 help
116− Select this if you want to let the user space manage the
117− platform thermals.
116+ The Userspace governor allows to get trip point crossed
117+ notification from the kernel via uevents. It is recommended
118+ to use the netlink interface instead which gives richer
119+ information about the thermal framework events.
118120
119121 config THERMAL_DEFAULT_GOV_POWER_ALLOCATOR
120122 bool "power_allocator"
drivers/thermal/gov_user_space.c+1−2
@@ -17,8 +17,7 @@ · 16 unmodified lines
1717
1818 static int user_space_bind(struct thermal_zone_device *tz)
1919 {
20− pr_warn_once("Userspace governor deprecated: use thermal netlink " \
21− "notification instead\n");
20+ pr_info_once("Consider using thermal netlink events interface\n");
2221
2322 return 0;
2423 }
drivers/thermal/intel/int340x_thermal/int3400_thermal.c+2−2
@@ -68,7 +68,7 @@ static int evaluate_odvp(struct int3400_thermal_priv *priv); · 67 unmodified lines
6868 struct odvp_attr {
6969 int odvp;
7070 struct int3400_thermal_priv *priv;
71− struct kobj_attribute attr;
71+ struct device_attribute attr;
7272 };
7373
7474 static ssize_t data_vault_read(struct file *file, struct kobject *kobj,
@@ -311,7 +311,7 @@ end: · 236 unmodified lines
311311 return result;
312312 }
313313
314−static ssize_t odvp_show(struct kobject *kobj, struct kobj_attribute *attr,
314+static ssize_t odvp_show(struct device *dev, struct device_attribute *attr,
315315 char *buf)
316316 {
317317 struct odvp_attr *odvp_attr;
drivers/thermal/thermal_sysfs.c+0−3
@@ -610,9 +610,6 @@ cur_state_store(struct device *dev, struct device_attribute *attr, · 609 unmodified lines
610610 unsigned long state;
611611 int result;
612612
613− dev_warn_once(&cdev->device,
614− "Setting cooling device state is deprecated\n");
615−
616613 if (sscanf(buf, "%ld\n", &state) != 1)
617614 return -EINVAL;
618615
drivers/thunderbolt/domain.c+3−9
@@ -7,9 +7,7 @@ · 6 unmodified lines
77 */
88
99 #include <linux/device.h>
10−#include <linux/dmar.h>
1110 #include <linux/idr.h>
12−#include <linux/iommu.h>
1311 #include <linux/module.h>
1412 #include <linux/pm_runtime.h>
1513 #include <linux/slab.h>
@@ -257,13 +255,9 @@ static ssize_t iommu_dma_protection_show(struct device *dev, · 241 unmodified lines
257255 struct device_attribute *attr,
258256 char *buf)
259257 {
260− /*
261− * Kernel DMA protection is a feature where Thunderbolt security is
262− * handled natively using IOMMU. It is enabled when IOMMU is
263− * enabled and ACPI DMAR table has DMAR_PLATFORM_OPT_IN set.
264− */
265− return sprintf(buf, "%d\n",
266− iommu_present(&pci_bus_type) && dmar_platform_optin());
258+ struct tb *tb = container_of(dev, struct tb, dev);
259+
260+ return sysfs_emit(buf, "%d\n", tb->nhi->iommu_dma_protection);
267261 }
268262 static DEVICE_ATTR_RO(iommu_dma_protection);
269263
drivers/thunderbolt/nhi.c+44−0
@@ -15,9 +15,11 @@ · 14 unmodified lines
1515 #include <linux/pci.h>
1616 #include <linux/dma-mapping.h>
1717 #include <linux/interrupt.h>
18+#include <linux/iommu.h>
1819 #include <linux/module.h>
1920 #include <linux/delay.h>
2021 #include <linux/property.h>
22+#include <linux/string_helpers.h>
2123
2224 #include "nhi.h"
2325 #include "nhi_regs.h"
@@ -1103,6 +1105,47 @@ static void nhi_check_quirks(struct tb_nhi *nhi) · 1079 unmodified lines
11031105 nhi->quirks |= QUIRK_AUTO_CLEAR_INT;
11041106 }
11051107
1108+static int nhi_check_iommu_pdev(struct pci_dev *pdev, void *data)
1109+{
1110+ if (!pdev->external_facing ||
1111+ !device_iommu_capable(&pdev->dev, IOMMU_CAP_PRE_BOOT_PROTECTION))
1112+ return 0;
1113+ *(bool *)data = true;
1114+ return 1; /* Stop walking */
1115+}
1116+
1117+static void nhi_check_iommu(struct tb_nhi *nhi)
1118+{
1119+ struct pci_bus *bus = nhi->pdev->bus;
1120+ bool port_ok = false;
1121+
1122+ /*
1123+ * Ideally what we'd do here is grab every PCI device that
1124+ * represents a tunnelling adapter for this NHI and check their
1125+ * status directly, but unfortunately USB4 seems to make it
1126+ * obnoxiously difficult to reliably make any correlation.
1127+ *
1128+ * So for now we'll have to bodge it... Hoping that the system
1129+ * is at least sane enough that an adapter is in the same PCI
1130+ * segment as its NHI, if we can find *something* on that segment
1131+ * which meets the requirements for Kernel DMA Protection, we'll
1132+ * take that to imply that firmware is aware and has (hopefully)
1133+ * done the right thing in general. We need to know that the PCI
1134+ * layer has seen the ExternalFacingPort property which will then
1135+ * inform the IOMMU layer to enforce the complete "untrusted DMA"
1136+ * flow, but also that the IOMMU driver itself can be trusted not
1137+ * to have been subverted by a pre-boot DMA attack.
1138+ */
1139+ while (bus->parent)
1140+ bus = bus->parent;
1141+
1142+ pci_walk_bus(bus, nhi_check_iommu_pdev, &port_ok);
1143+
1144+ nhi->iommu_dma_protection = port_ok;
1145+ dev_dbg(&nhi->pdev->dev, "IOMMU DMA protection is %s\n",
1146+ str_enabled_disabled(port_ok));
1147+}
1148+
11061149 static int nhi_init_msi(struct tb_nhi *nhi)
11071150 {
11081151 struct pci_dev *pdev = nhi->pdev;
@@ -1220,6 +1263,7 @@ static int nhi_probe(struct pci_dev *pdev, const struct pci_device_id *id) · 111 unmodified lines
12201263 return -ENOMEM;
12211264
12221265 nhi_check_quirks(nhi);
1266+ nhi_check_iommu(nhi);
12231267
12241268 res = nhi_init_msi(nhi);
12251269 if (res) {
drivers/tty/n_gsm.c+287−208
@@ -73,6 +73,8 @@ module_param(debug, int, 0600); · 72 unmodified lines
7373 */
7474 #define MAX_MRU 1500
7575 #define MAX_MTU 1500
76+/* SOF, ADDR, CTRL, LEN1, LEN2, ..., FCS, EOF */
77+#define PROT_OVERHEAD 7
7678 #define GSM_NET_TX_TIMEOUT (HZ*10)
7779
7880 /*
@@ -135,6 +137,7 @@ struct gsm_dlci { · 56 unmodified lines
135137 int retries;
136138 /* Uplink tty if active */
137139 struct tty_port port; /* The tty bound to this DLCI if there is one */
140+#define TX_SIZE 4096 /* Must be power of 2. */
138141 struct kfifo fifo; /* Queue fifo for the DLCI */
139142 int adaption; /* Adaption layer in use */
140143 int prev_adaption;
@@ -219,7 +222,6 @@ struct gsm_mux { · 78 unmodified lines
219222 int encoding;
220223 u8 control;
221224 u8 fcs;
222− u8 received_fcs;
223225 u8 *txframe; /* TX framing buffer */
224226
225227 /* Method for the receiver side */
@@ -231,6 +233,7 @@ struct gsm_mux { · 5 unmodified lines
231233 int initiator; /* Did we initiate connection */
232234 bool dead; /* Has the mux been shut down */
233235 struct gsm_dlci *dlci[NUM_DLCI];
236+ int old_c_iflag; /* termios c_iflag value before attach */
234237 bool constipated; /* Asked by remote to shut up */
235238
236239 spinlock_t tx_lock;
@@ -271,10 +274,6 @@ static DEFINE_SPINLOCK(gsm_mux_lock); · 34 unmodified lines
271274
272275 static struct tty_driver *gsm_tty_driver;
273276
274−/* Save dlci open address */
275−static int addr_open[256] = { 0 };
276−/* Save dlci open count */
277−static int addr_cnt;
278277 /*
279278 * This section of the driver logic implements the GSM encodings
280279 * both the basic and the 'advanced'. Reliable transport is not
@@ -369,6 +368,7 @@ static const u8 gsm_fcs8[256] = { · 88 unmodified lines
369368 #define GOOD_FCS 0xCF
370369
371370 static int gsmld_output(struct gsm_mux *gsm, u8 *data, int len);
371+static int gsm_modem_update(struct gsm_dlci *dlci, u8 brk);
372372
373373 /**
374374 * gsm_fcs_add - update FCS
@@ -832,7 +832,7 @@ static int gsm_dlci_data_output(struct gsm_mux *gsm, struct gsm_dlci *dlci) · 457 unmodified lines
832832 break;
833833 case 2: /* Unstructed with modem bits.
834834 Always one byte as we never send inline break data */
835− *dp++ = gsm_encode_modem(dlci);
835+ *dp++ = (gsm_encode_modem(dlci) << 1) | EA;
836836 break;
837837 }
838838 WARN_ON(kfifo_out_locked(&dlci->fifo, dp , len, &dlci->lock) != len);
@@ -916,6 +916,66 @@ static int gsm_dlci_data_output_framed(struct gsm_mux *gsm, · 77 unmodified lines
916916 return size;
917917 }
918918
919+/**
920+ * gsm_dlci_modem_output - try and push modem status out of a DLCI
921+ * @gsm: mux
922+ * @dlci: the DLCI to pull modem status from
923+ * @brk: break signal
924+ *
925+ * Push an empty frame in to the transmit queue to update the modem status
926+ * bits and to transmit an optional break.
927+ *
928+ * Caller must hold the tx_lock of the mux.
929+ */
930+
931+static int gsm_dlci_modem_output(struct gsm_mux *gsm, struct gsm_dlci *dlci,
932+ u8 brk)
933+{
934+ u8 *dp = NULL;
935+ struct gsm_msg *msg;
936+ int size = 0;
937+
938+ /* for modem bits without break data */
939+ switch (dlci->adaption) {
940+ case 1: /* Unstructured */
941+ break;
942+ case 2: /* Unstructured with modem bits. */
943+ size++;
944+ if (brk > 0)
945+ size++;
946+ break;
947+ default:
948+ pr_err("%s: unsupported adaption %d\n", __func__,
949+ dlci->adaption);
950+ return -EINVAL;
951+ }
952+
953+ msg = gsm_data_alloc(gsm, dlci->addr, size, gsm->ftype);
954+ if (!msg) {
955+ pr_err("%s: gsm_data_alloc error", __func__);
956+ return -ENOMEM;
957+ }
958+ dp = msg->data;
959+ switch (dlci->adaption) {
960+ case 1: /* Unstructured */
961+ break;
962+ case 2: /* Unstructured with modem bits. */
963+ if (brk == 0) {
964+ *dp++ = (gsm_encode_modem(dlci) << 1) | EA;
965+ } else {
966+ *dp++ = gsm_encode_modem(dlci) << 1;
967+ *dp++ = (brk << 4) | 2 | EA; /* Length, Break, EA */
968+ }
969+ break;
970+ default:
971+ /* Handled above */
972+ break;
973+ }
974+
975+ __gsm_data_queue(dlci, msg);
976+ return size;
977+}
978+
919979 /**
920980 * gsm_dlci_data_sweep - look for data to send
921981 * @gsm: the GSM mux
@@ -1093,7 +1153,6 @@ static void gsm_control_modem(struct gsm_mux *gsm, const u8 *data, int clen) · 171 unmodified lines
10931153 {
10941154 unsigned int addr = 0;
10951155 unsigned int modem = 0;
1096− unsigned int brk = 0;
10971156 struct gsm_dlci *dlci;
10981157 int len = clen;
10991158 int slen;
@@ -1123,17 +1182,8 @@ static void gsm_control_modem(struct gsm_mux *gsm, const u8 *data, int clen) · 23 unmodified lines
11231182 return;
11241183 }
11251184 len--;
1126− if (len > 0) {
1127− while (gsm_read_ea(&brk, *dp++) == 0) {
1128− len--;
1129− if (len == 0)
1130− return;
1131− }
1132− modem <<= 7;
1133− modem |= (brk & 0x7f);
1134− }
11351185 tty = tty_port_tty_get(&dlci->port);
1136− gsm_process_modem(tty, dlci, modem, slen);
1186+ gsm_process_modem(tty, dlci, modem, slen - len);
11371187 if (tty) {
11381188 tty_wakeup(tty);
11391189 tty_kref_put(tty);
@@ -1193,7 +1243,6 @@ static void gsm_control_rls(struct gsm_mux *gsm, const u8 *data, int clen) · 53 unmodified lines
11931243 }
11941244
11951245 static void gsm_dlci_begin_close(struct gsm_dlci *dlci);
1196−static void gsm_dlci_close(struct gsm_dlci *dlci);
11971246
11981247 /**
11991248 * gsm_control_message - DLCI 0 control processing
@@ -1212,28 +1261,15 @@ static void gsm_control_message(struct gsm_mux *gsm, unsigned int command, · 12 unmodified lines
12121261 {
12131262 u8 buf[1];
12141263 unsigned long flags;
1215− struct gsm_dlci *dlci;
1216− int i;
1217− int address;
12181264
12191265 switch (command) {
12201266 case CMD_CLD: {
1221− if (addr_cnt > 0) {
1222− for (i = 0; i < addr_cnt; i++) {
1223− address = addr_open[i];
1224− dlci = gsm->dlci[address];
1225− gsm_dlci_close(dlci);
1226− addr_open[i] = 0;
1227− }
1228− }
1267+ struct gsm_dlci *dlci = gsm->dlci[0];
12291268 /* Modem wishes to close down */
1230− dlci = gsm->dlci[0];
12311269 if (dlci) {
12321270 dlci->dead = true;
12331271 gsm->dead = true;
1234− gsm_dlci_close(dlci);
1235− addr_cnt = 0;
1236− gsm_response(gsm, 0, UA|PF);
1272+ gsm_dlci_begin_close(dlci);
12371273 }
12381274 }
12391275 break;
@@ -1326,11 +1362,12 @@ static void gsm_control_response(struct gsm_mux *gsm, unsigned int command, · 86 unmodified lines
13261362
13271363 static void gsm_control_transmit(struct gsm_mux *gsm, struct gsm_control *ctrl)
13281364 {
1329− struct gsm_msg *msg = gsm_data_alloc(gsm, 0, ctrl->len + 1, gsm->ftype);
1365+ struct gsm_msg *msg = gsm_data_alloc(gsm, 0, ctrl->len + 2, gsm->ftype);
13301366 if (msg == NULL)
13311367 return;
1332− msg->data[0] = (ctrl->cmd << 1) | 2 | EA; /* command */
1333− memcpy(msg->data + 1, ctrl->data, ctrl->len);
1368+ msg->data[0] = (ctrl->cmd << 1) | CR | EA; /* command */
1369+ msg->data[1] = (ctrl->len << 1) | EA;
1370+ memcpy(msg->data + 2, ctrl->data, ctrl->len);
13341371 gsm_data_queue(gsm->dlci[0], msg);
13351372 }
13361373
@@ -1353,7 +1390,6 @@ static void gsm_control_retransmit(struct timer_list *t) · 16 unmodified lines
13531390 spin_lock_irqsave(&gsm->control_lock, flags);
13541391 ctrl = gsm->pending_cmd;
13551392 if (ctrl) {
1356− gsm->cretries--;
13571393 if (gsm->cretries == 0) {
13581394 gsm->pending_cmd = NULL;
13591395 ctrl->error = -ETIMEDOUT;
@@ -1362,6 +1398,7 @@ static void gsm_control_retransmit(struct timer_list *t) · 2 unmodified lines
13621398 wake_up(&gsm->event);
13631399 return;
13641400 }
1401+ gsm->cretries--;
13651402 gsm_control_transmit(gsm, ctrl);
13661403 mod_timer(&gsm->t2_timer, jiffies + gsm->t2 * HZ / 100);
13671404 }
@@ -1402,7 +1439,7 @@ retry: · 34 unmodified lines
14021439
14031440 /* If DLCI0 is in ADM mode skip retries, it won't respond */
14041441 if (gsm->dlci[0]->mode == DLCI_MODE_ADM)
1405− gsm->cretries = 1;
1442+ gsm->cretries = 0;
14061443 else
14071444 gsm->cretries = gsm->n2;
14081445
@@ -1450,20 +1487,22 @@ static int gsm_control_wait(struct gsm_mux *gsm, struct gsm_control *control) · 41 unmodified lines
14501487
14511488 static void gsm_dlci_close(struct gsm_dlci *dlci)
14521489 {
1490+ unsigned long flags;
1491+
14531492 del_timer(&dlci->t1);
14541493 if (debug & 8)
14551494 pr_debug("DLCI %d goes closed.\n", dlci->addr);
14561495 dlci->state = DLCI_CLOSED;
14571496 if (dlci->addr != 0) {
14581497 tty_port_tty_hangup(&dlci->port, false);
1498+ spin_lock_irqsave(&dlci->lock, flags);
14591499 kfifo_reset(&dlci->fifo);
1500+ spin_unlock_irqrestore(&dlci->lock, flags);
14601501 /* Ensure that gsmtty_open() can return. */
14611502 tty_port_set_initialized(&dlci->port, 0);
14621503 wake_up_interruptible(&dlci->port.open_wait);
14631504 } else
14641505 dlci->gsm->dead = true;
1465− /* Unregister gsmtty driver,report gsmtty dev remove uevent for user */
1466− tty_unregister_device(gsm_tty_driver, dlci->addr);
14671506 wake_up(&dlci->gsm->event);
14681507 /* A DLCI 0 close is a MUX termination so we need to kick that
14691508 back to userspace somehow */
@@ -1485,8 +1524,9 @@ static void gsm_dlci_open(struct gsm_dlci *dlci) · 15 unmodified lines
14851524 dlci->state = DLCI_OPEN;
14861525 if (debug & 8)
14871526 pr_debug("DLCI %d goes open.\n", dlci->addr);
1488− /* Register gsmtty driver,report gsmtty dev add uevent for user */
1489− tty_register_device(gsm_tty_driver, dlci->addr, NULL);
1527+ /* Send current modem state */
1528+ if (dlci->addr)
1529+ gsm_modem_update(dlci, 0);
14901530 wake_up(&dlci->gsm->event);
14911531 }
14921532
@@ -1619,10 +1659,12 @@ static void gsm_dlci_data(struct gsm_dlci *dlci, const u8 *data, int clen) · 126 unmodified lines
16191659 if (len == 0)
16201660 return;
16211661 }
1662+ len--;
16221663 slen++;
16231664 tty = tty_port_tty_get(port);
16241665 if (tty) {
16251666 gsm_process_modem(tty, dlci, modem, slen);
1667+ tty_wakeup(tty);
16261668 tty_kref_put(tty);
16271669 }
16281670 fallthrough;
@@ -1690,7 +1732,7 @@ static struct gsm_dlci *gsm_dlci_alloc(struct gsm_mux *gsm, int addr) · 61 unmodified lines
16901732 return NULL;
16911733 spin_lock_init(&dlci->lock);
16921734 mutex_init(&dlci->mutex);
1693− if (kfifo_alloc(&dlci->fifo, 4096, GFP_KERNEL) < 0) {
1735+ if (kfifo_alloc(&dlci->fifo, TX_SIZE, GFP_KERNEL) < 0) {
16941736 kfree(dlci);
16951737 return NULL;
16961738 }
@@ -1793,19 +1835,7 @@ static void gsm_queue(struct gsm_mux *gsm) · 96 unmodified lines
17931835 struct gsm_dlci *dlci;
17941836 u8 cr;
17951837 int address;
1796− int i, j, k, address_tmp;
1797− /* We have to sneak a look at the packet body to do the FCS.
1798− A somewhat layering violation in the spec */
17991838
1800− if ((gsm->control & ~PF) == UI)
1801− gsm->fcs = gsm_fcs_add_block(gsm->fcs, gsm->buf, gsm->len);
1802− if (gsm->encoding == 0) {
1803− /* WARNING: gsm->received_fcs is used for
1804− gsm->encoding = 0 only.
1805− In this case it contain the last piece of data
1806− required to generate final CRC */
1807− gsm->fcs = gsm_fcs_add(gsm->fcs, gsm->received_fcs);
1808− }
18091839 if (gsm->fcs != GOOD_FCS) {
18101840 gsm->bad_fcs++;
18111841 if (debug & 4)
@@ -1836,11 +1866,6 @@ static void gsm_queue(struct gsm_mux *gsm) · 24 unmodified lines
18361866 else {
18371867 gsm_response(gsm, address, UA|PF);
18381868 gsm_dlci_open(dlci);
1839− /* Save dlci open address */
1840− if (address) {
1841− addr_open[addr_cnt] = address;
1842− addr_cnt++;
1843− }
18441869 }
18451870 break;
18461871 case DISC|PF:
@@ -1851,35 +1876,9 @@ static void gsm_queue(struct gsm_mux *gsm) · 4 unmodified lines
18511876 return;
18521877 }
18531878 /* Real close complete */
1854− if (!address) {
1855− if (addr_cnt > 0) {
1856− for (i = 0; i < addr_cnt; i++) {
1857− address = addr_open[i];
1858− dlci = gsm->dlci[address];
1859− gsm_dlci_close(dlci);
1860− addr_open[i] = 0;
1861− }
1862− }
1863− dlci = gsm->dlci[0];
1864− gsm_dlci_close(dlci);
1865− addr_cnt = 0;
1866− gsm_response(gsm, 0, UA|PF);
1867− } else {
1868− gsm_response(gsm, address, UA|PF);
1869− gsm_dlci_close(dlci);
1870− /* clear dlci address */
1871− for (j = 0; j < addr_cnt; j++) {
1872− address_tmp = addr_open[j];
1873− if (address_tmp == address) {
1874− for (k = j; k < addr_cnt; k++)
1875− addr_open[k] = addr_open[k+1];
1876− addr_cnt--;
1877− break;
1878− }
1879− }
1880− }
1879+ gsm_response(gsm, address, UA|PF);
1880+ gsm_dlci_close(dlci);
18811881 break;
1882− case UA:
18831882 case UA|PF:
18841883 if (cr == 0 || dlci == NULL)
18851884 break;
@@ -1993,19 +1992,25 @@ static void gsm0_receive(struct gsm_mux *gsm, unsigned char c) · 107 unmodified lines
19931992 break;
19941993 case GSM_DATA: /* Data */
19951994 gsm->buf[gsm->count++] = c;
1996− if (gsm->count == gsm->len)
1995+ if (gsm->count == gsm->len) {
1996+ /* Calculate final FCS for UI frames over all data */
1997+ if ((gsm->control & ~PF) != UIH) {
1998+ gsm->fcs = gsm_fcs_add_block(gsm->fcs, gsm->buf,
1999+ gsm->count);
2000+ }
19972001 gsm->state = GSM_FCS;
2002+ }
19982003 break;
19992004 case GSM_FCS: /* FCS follows the packet */
2000− gsm->received_fcs = c;
2001− gsm_queue(gsm);
2005+ gsm->fcs = gsm_fcs_add(gsm->fcs, c);
20022006 gsm->state = GSM_SSOF;
20032007 break;
20042008 case GSM_SSOF:
2005− if (c == GSM0_SOF) {
2006− gsm->state = GSM_SEARCH;
2007− break;
2008− }
2009+ gsm->state = GSM_SEARCH;
2010+ if (c == GSM0_SOF)
2011+ gsm_queue(gsm);
2012+ else
2013+ gsm->bad_size++;
20092014 break;
20102015 default:
20112016 pr_debug("%s: unhandled state: %d\n", __func__, gsm->state);
@@ -2023,12 +2028,35 @@ static void gsm0_receive(struct gsm_mux *gsm, unsigned char c) · 11 unmodified lines
20232028
20242029 static void gsm1_receive(struct gsm_mux *gsm, unsigned char c)
20252030 {
2031+ /* handle XON/XOFF */
2032+ if ((c & ISO_IEC_646_MASK) == XON) {
2033+ gsm->constipated = true;
2034+ return;
2035+ } else if ((c & ISO_IEC_646_MASK) == XOFF) {
2036+ gsm->constipated = false;
2037+ /* Kick the link in case it is idling */
2038+ gsm_data_kick(gsm, NULL);
2039+ return;
2040+ }
20262041 if (c == GSM1_SOF) {
2027− /* EOF is only valid in frame if we have got to the data state
2028− and received at least one byte (the FCS) */
2029− if (gsm->state == GSM_DATA && gsm->count) {
2030− /* Extract the FCS */
2042+ /* EOF is only valid in frame if we have got to the data state */
2043+ if (gsm->state == GSM_DATA) {
2044+ if (gsm->count < 1) {
2045+ /* Missing FSC */
2046+ gsm->malformed++;
2047+ gsm->state = GSM_START;
2048+ return;
2049+ }
2050+ /* Remove the FCS from data */
20312051 gsm->count--;
2052+ if ((gsm->control & ~PF) != UIH) {
2053+ /* Calculate final FCS for UI frames over all
2054+ * data but FCS
2055+ */
2056+ gsm->fcs = gsm_fcs_add_block(gsm->fcs, gsm->buf,
2057+ gsm->count);
2058+ }
2059+ /* Add the FCS itself to test against GOOD_FCS */
20322060 gsm->fcs = gsm_fcs_add(gsm->fcs, gsm->buf[gsm->count]);
20332061 gsm->len = gsm->count;
20342062 gsm_queue(gsm);
@@ -2037,7 +2065,8 @@ static void gsm1_receive(struct gsm_mux *gsm, unsigned char c) · 2 unmodified lines
20372065 }
20382066 /* Any partial frame was a runt so go back to start */
20392067 if (gsm->state != GSM_START) {
2040− gsm->malformed++;
2068+ if (gsm->state != GSM_SEARCH)
2069+ gsm->malformed++;
20412070 gsm->state = GSM_START;
20422071 }
20432072 /* A SOF in GSM_START means we are still reading idling or
@@ -2106,74 +2135,43 @@ static void gsm_error(struct gsm_mux *gsm) · 62 unmodified lines
21062135 gsm->io_error++;
21072136 }
21082137
2109−static int gsm_disconnect(struct gsm_mux *gsm)
2110−{
2111− struct gsm_dlci *dlci = gsm->dlci[0];
2112− struct gsm_control *gc;
2113−
2114− if (!dlci)
2115− return 0;
2116−
2117− /* In theory disconnecting DLCI 0 is sufficient but for some
2118− modems this is apparently not the case. */
2119− gc = gsm_control_send(gsm, CMD_CLD, NULL, 0);
2120− if (gc)
2121− gsm_control_wait(gsm, gc);
2122−
2123− del_timer_sync(&gsm->t2_timer);
2124− /* Now we are sure T2 has stopped */
2125−
2126− gsm_dlci_begin_close(dlci);
2127− wait_event_interruptible(gsm->event,
2128− dlci->state == DLCI_CLOSED);
2129−
2130− if (signal_pending(current))
2131− return -EINTR;
2132−
2133− return 0;
2134−}
2135−
21362138 /**
21372139 * gsm_cleanup_mux - generic GSM protocol cleanup
21382140 * @gsm: our mux
2141+ * @disc: disconnect link?
21392142 *
21402143 * Clean up the bits of the mux which are the same for all framing
21412144 * protocols. Remove the mux from the mux table, stop all the timers
21422145 * and then shut down each device hanging up the channels as we go.
21432146 */
21442147
2145−static void gsm_cleanup_mux(struct gsm_mux *gsm)
2148+static void gsm_cleanup_mux(struct gsm_mux *gsm, bool disc)
21462149 {
21472150 int i;
21482151 struct gsm_dlci *dlci = gsm->dlci[0];
21492152 struct gsm_msg *txq, *ntxq;
21502153
21512154 gsm->dead = true;
2155+ mutex_lock(&gsm->mutex);
21522156
2153− spin_lock(&gsm_mux_lock);
2154− for (i = 0; i < MAX_MUX; i++) {
2155− if (gsm_mux[i] == gsm) {
2156− gsm_mux[i] = NULL;
2157− break;
2157+ if (dlci) {
2158+ if (disc && dlci->state != DLCI_CLOSED) {
2159+ gsm_dlci_begin_close(dlci);
2160+ wait_event(gsm->event, dlci->state == DLCI_CLOSED);
21582161 }
2162+ dlci->dead = true;
21592163 }
2160− spin_unlock(&gsm_mux_lock);
2161− /* open failed before registering => nothing to do */
2162− if (i == MAX_MUX)
2163− return;
21642164
2165+ /* Finish outstanding timers, making sure they are done */
21652166 del_timer_sync(&gsm->t2_timer);
2166− /* Now we are sure T2 has stopped */
2167− if (dlci)
2168− dlci->dead = true;
21692167
2170− /* Free up any link layer users */
2171− mutex_lock(&gsm->mutex);
2172− for (i = 0; i < NUM_DLCI; i++)
2168+ /* Free up any link layer users and finally the control channel */
2169+ for (i = NUM_DLCI - 1; i >= 0; i--)
21732170 if (gsm->dlci[i])
21742171 gsm_dlci_release(gsm->dlci[i]);
21752172 mutex_unlock(&gsm->mutex);
21762173 /* Now wipe the queues */
2174+ tty_ldisc_flush(gsm->tty);
21772175 list_for_each_entry_safe(txq, ntxq, &gsm->tx_list, list)
21782176 kfree(txq);
21792177 INIT_LIST_HEAD(&gsm->tx_list);
@@ -2191,7 +2189,6 @@ static void gsm_cleanup_mux(struct gsm_mux *gsm) · 11 unmodified lines
21912189 static int gsm_activate_mux(struct gsm_mux *gsm)
21922190 {
21932191 struct gsm_dlci *dlci;
2194− int i = 0;
21952192
21962193 timer_setup(&gsm->t2_timer, gsm_control_retransmit, 0);
21972194 init_waitqueue_head(&gsm->event);
@@ -2203,18 +2200,6 @@ static int gsm_activate_mux(struct gsm_mux *gsm) · 5 unmodified lines
22032200 else
22042201 gsm->receive = gsm1_receive;
22052202
2206− spin_lock(&gsm_mux_lock);
2207− for (i = 0; i < MAX_MUX; i++) {
2208− if (gsm_mux[i] == NULL) {
2209− gsm->num = i;
2210− gsm_mux[i] = gsm;
2211− break;
2212− }
2213− }
2214− spin_unlock(&gsm_mux_lock);
2215− if (i == MAX_MUX)
2216− return -EBUSY;
2217−
22182203 dlci = gsm_dlci_alloc(gsm, 0);
22192204 if (dlci == NULL)
22202205 return -ENOMEM;
@@ -2230,6 +2215,15 @@ static int gsm_activate_mux(struct gsm_mux *gsm) · 9 unmodified lines
22302215 */
22312216 static void gsm_free_mux(struct gsm_mux *gsm)
22322217 {
2218+ int i;
2219+
2220+ for (i = 0; i < MAX_MUX; i++) {
2221+ if (gsm == gsm_mux[i]) {
2222+ gsm_mux[i] = NULL;
2223+ break;
2224+ }
2225+ }
2226+ mutex_destroy(&gsm->mutex);
22332227 kfree(gsm->txframe);
22342228 kfree(gsm->buf);
22352229 kfree(gsm);
@@ -2249,12 +2243,20 @@ static void gsm_free_muxr(struct kref *ref) · 13 unmodified lines
22492243
22502244 static inline void mux_get(struct gsm_mux *gsm)
22512245 {
2246+ unsigned long flags;
2247+
2248+ spin_lock_irqsave(&gsm_mux_lock, flags);
22522249 kref_get(&gsm->ref);
2250+ spin_unlock_irqrestore(&gsm_mux_lock, flags);
22532251 }
22542252
22552253 static inline void mux_put(struct gsm_mux *gsm)
22562254 {
2255+ unsigned long flags;
2256+
2257+ spin_lock_irqsave(&gsm_mux_lock, flags);
22572258 kref_put(&gsm->ref, gsm_free_muxr);
2259+ spin_unlock_irqrestore(&gsm_mux_lock, flags);
22582260 }
22592261
22602262 static inline unsigned int mux_num_to_base(struct gsm_mux *gsm)
@@ -2275,6 +2277,7 @@ static inline unsigned int mux_line_to_num(unsigned int line) · 14 unmodified lines
22752277
22762278 static struct gsm_mux *gsm_alloc_mux(void)
22772279 {
2280+ int i;
22782281 struct gsm_mux *gsm = kzalloc(sizeof(struct gsm_mux), GFP_KERNEL);
22792282 if (gsm == NULL)
22802283 return NULL;
@@ -2283,7 +2286,7 @@ static struct gsm_mux *gsm_alloc_mux(void) · 2 unmodified lines
22832286 kfree(gsm);
22842287 return NULL;
22852288 }
2286− gsm->txframe = kmalloc(2 * MAX_MRU + 2, GFP_KERNEL);
2289+ gsm->txframe = kmalloc(2 * (MAX_MTU + PROT_OVERHEAD - 1), GFP_KERNEL);
22872290 if (gsm->txframe == NULL) {
22882291 kfree(gsm->buf);
22892292 kfree(gsm);
@@ -2304,6 +2307,26 @@ static struct gsm_mux *gsm_alloc_mux(void) · 14 unmodified lines
23042307 gsm->mtu = 64;
23052308 gsm->dead = true; /* Avoid early tty opens */
23062309
2310+ /* Store the instance to the mux array or abort if no space is
2311+ * available.
2312+ */
2313+ spin_lock(&gsm_mux_lock);
2314+ for (i = 0; i < MAX_MUX; i++) {
2315+ if (!gsm_mux[i]) {
2316+ gsm_mux[i] = gsm;
2317+ gsm->num = i;
2318+ break;
2319+ }
2320+ }
2321+ spin_unlock(&gsm_mux_lock);
2322+ if (i == MAX_MUX) {
2323+ mutex_destroy(&gsm->mutex);
2324+ kfree(gsm->txframe);
2325+ kfree(gsm->buf);
2326+ kfree(gsm);
2327+ return NULL;
2328+ }
2329+
23072330 return gsm;
23082331 }
23092332
@@ -2330,6 +2353,7 @@ static void gsm_copy_config_values(struct gsm_mux *gsm, · 20 unmodified lines
23302353
23312354 static int gsm_config(struct gsm_mux *gsm, struct gsm_config *c)
23322355 {
2356+ int ret = 0;
23332357 int need_close = 0;
23342358 int need_restart = 0;
23352359
@@ -2339,7 +2363,7 @@ static int gsm_config(struct gsm_mux *gsm, struct gsm_config *c) · 3 unmodified lines
23392363 /* Check the MRU/MTU range looks sane */
23402364 if (c->mru > MAX_MRU || c->mtu > MAX_MTU || c->mru < 8 || c->mtu < 8)
23412365 return -EINVAL;
2342− if (c->n2 < 3)
2366+ if (c->n2 > 255)
23432367 return -EINVAL;
23442368 if (c->encapsulation > 1) /* Basic, advanced, no I */
23452369 return -EINVAL;
@@ -2370,19 +2394,11 @@ static int gsm_config(struct gsm_mux *gsm, struct gsm_config *c) · 24 unmodified lines
23702394
23712395 /*
23722396 * Close down what is needed, restart and initiate the new
2373− * configuration
2397+ * configuration. On the first time there is no DLCI[0]
2398+ * and closing or cleaning up is not necessary.
23742399 */
2375−
2376− if (gsm->initiator && (need_close || need_restart)) {
2377− int ret;
2378−
2379− ret = gsm_disconnect(gsm);
2380−
2381− if (ret)
2382− return ret;
2383− }
2384− if (need_restart)
2385− gsm_cleanup_mux(gsm);
2400+ if (need_close || need_restart)
2401+ gsm_cleanup_mux(gsm, true);
23862402
23872403 gsm->initiator = c->initiator;
23882404 gsm->mru = c->mru;
@@ -2405,10 +2421,13 @@ static int gsm_config(struct gsm_mux *gsm, struct gsm_config *c) · 16 unmodified lines
24052421 * FIXME: We need to separate activation/deactivation from adding
24062422 * and removing from the mux array
24072423 */
2408− if (need_restart)
2409− gsm_activate_mux(gsm);
2410− if (gsm->initiator && need_close)
2411− gsm_dlci_begin_open(gsm->dlci[0]);
2424+ if (gsm->dead) {
2425+ ret = gsm_activate_mux(gsm);
2426+ if (ret)
2427+ return ret;
2428+ if (gsm->initiator)
2429+ gsm_dlci_begin_open(gsm->dlci[0]);
2430+ }
24122431 return 0;
24132432 }
24142433
@@ -2450,25 +2469,26 @@ static int gsmld_attach_gsm(struct tty_struct *tty, struct gsm_mux *gsm) · 35 unmodified lines
24502469 int ret, i;
24512470
24522471 gsm->tty = tty_kref_get(tty);
2472+ /* Turn off tty XON/XOFF handling to handle it explicitly. */
2473+ gsm->old_c_iflag = tty->termios.c_iflag;
2474+ tty->termios.c_iflag &= (IXON | IXOFF);
24532475 ret = gsm_activate_mux(gsm);
24542476 if (ret != 0)
24552477 tty_kref_put(gsm->tty);
24562478 else {
24572479 /* Don't register device 0 - this is the control channel and not
24582480 a usable tty interface */
2459− if (gsm->initiator) {
2460− base = mux_num_to_base(gsm); /* Base for this MUX */
2461− for (i = 1; i < NUM_DLCI; i++) {
2462− struct device *dev;
2481+ base = mux_num_to_base(gsm); /* Base for this MUX */
2482+ for (i = 1; i < NUM_DLCI; i++) {
2483+ struct device *dev;
24632484
2464− dev = tty_register_device(gsm_tty_driver,
2485+ dev = tty_register_device(gsm_tty_driver,
24652486 base + i, NULL);
2466− if (IS_ERR(dev)) {
2467− for (i--; i >= 1; i--)
2468− tty_unregister_device(gsm_tty_driver,
2469− base + i);
2470− return PTR_ERR(dev);
2471− }
2487+ if (IS_ERR(dev)) {
2488+ for (i--; i >= 1; i--)
2489+ tty_unregister_device(gsm_tty_driver,
2490+ base + i);
2491+ return PTR_ERR(dev);
24722492 }
24732493 }
24742494 }
@@ -2490,11 +2510,10 @@ static void gsmld_detach_gsm(struct tty_struct *tty, struct gsm_mux *gsm) · 15 unmodified lines
24902510 int i;
24912511
24922512 WARN_ON(tty != gsm->tty);
2493− if (gsm->initiator) {
2494− for (i = 1; i < NUM_DLCI; i++)
2495− tty_unregister_device(gsm_tty_driver, base + i);
2496− }
2497− gsm_cleanup_mux(gsm);
2513+ for (i = 1; i < NUM_DLCI; i++)
2514+ tty_unregister_device(gsm_tty_driver, base + i);
2515+ /* Restore tty XON/XOFF handling. */
2516+ gsm->tty->termios.c_iflag = gsm->old_c_iflag;
24982517 tty_kref_put(gsm->tty);
24992518 gsm->tty = NULL;
25002519 }
@@ -2559,6 +2578,12 @@ static void gsmld_close(struct tty_struct *tty) · 58 unmodified lines
25592578 {
25602579 struct gsm_mux *gsm = tty->disc_data;
25612580
2581+ /* The ldisc locks and closes the port before calling our close. This
2582+ * means we have no way to do a proper disconnect. We will not bother
2583+ * to do one.
2584+ */
2585+ gsm_cleanup_mux(gsm, false);
2586+
25622587 gsmld_detach_gsm(tty, gsm);
25632588
25642589 gsmld_flush_buffer(tty);
@@ -2597,7 +2622,7 @@ static int gsmld_open(struct tty_struct *tty) · 32 unmodified lines
25972622
25982623 ret = gsmld_attach_gsm(tty, gsm);
25992624 if (ret != 0) {
2600− gsm_cleanup_mux(gsm);
2625+ gsm_cleanup_mux(gsm, false);
26012626 mux_put(gsm);
26022627 }
26032628 return ret;
@@ -2952,28 +2977,78 @@ static struct tty_ldisc_ops tty_ldisc_packet = { · 348 unmodified lines
29522977 * Virtual tty side
29532978 */
29542979
2955−#define TX_SIZE 512
2980+/**
2981+ * gsm_modem_upd_via_data - send modem bits via convergence layer
2982+ * @dlci: channel
2983+ * @brk: break signal
2984+ *
2985+ * Send an empty frame to signal mobile state changes and to transmit the
2986+ * break signal for adaption 2.
2987+ */
2988+
2989+static void gsm_modem_upd_via_data(struct gsm_dlci *dlci, u8 brk)
2990+{
2991+ struct gsm_mux *gsm = dlci->gsm;
2992+ unsigned long flags;
2993+
2994+ if (dlci->state != DLCI_OPEN || dlci->adaption != 2)
2995+ return;
2996+
2997+ spin_lock_irqsave(&gsm->tx_lock, flags);
2998+ gsm_dlci_modem_output(gsm, dlci, brk);
2999+ spin_unlock_irqrestore(&gsm->tx_lock, flags);
3000+}
3001+
3002+/**
3003+ * gsm_modem_upd_via_msc - send modem bits via control frame
3004+ * @dlci: channel
3005+ * @brk: break signal
3006+ */
29563007
2957−static int gsmtty_modem_update(struct gsm_dlci *dlci, u8 brk)
3008+static int gsm_modem_upd_via_msc(struct gsm_dlci *dlci, u8 brk)
29583009 {
2959− u8 modembits[5];
3010+ u8 modembits[3];
29603011 struct gsm_control *ctrl;
29613012 int len = 2;
29623013
2963− if (brk)
2964− len++;
3014+ if (dlci->gsm->encoding != 0)
3015+ return 0;
29653016
2966− modembits[0] = len << 1 | EA; /* Data bytes */
2967− modembits[1] = dlci->addr << 2 | 3; /* DLCI, EA, 1 */
2968− modembits[2] = gsm_encode_modem(dlci) << 1 | EA;
2969− if (brk)
2970− modembits[3] = brk << 4 | 2 | EA; /* Valid, EA */
2971− ctrl = gsm_control_send(dlci->gsm, CMD_MSC, modembits, len + 1);
3017+ modembits[0] = (dlci->addr << 2) | 2 | EA; /* DLCI, Valid, EA */
3018+ if (!brk) {
3019+ modembits[1] = (gsm_encode_modem(dlci) << 1) | EA;
3020+ } else {
3021+ modembits[1] = gsm_encode_modem(dlci) << 1;
3022+ modembits[2] = (brk << 4) | 2 | EA; /* Length, Break, EA */
3023+ len++;
3024+ }
3025+ ctrl = gsm_control_send(dlci->gsm, CMD_MSC, modembits, len);
29723026 if (ctrl == NULL)
29733027 return -ENOMEM;
29743028 return gsm_control_wait(dlci->gsm, ctrl);
29753029 }
29763030
3031+/**
3032+ * gsm_modem_update - send modem status line state
3033+ * @dlci: channel
3034+ * @brk: break signal
3035+ */
3036+
3037+static int gsm_modem_update(struct gsm_dlci *dlci, u8 brk)
3038+{
3039+ if (dlci->adaption == 2) {
3040+ /* Send convergence layer type 2 empty data frame. */
3041+ gsm_modem_upd_via_data(dlci, brk);
3042+ return 0;
3043+ } else if (dlci->gsm->encoding == 0) {
3044+ /* Send as MSC control message. */
3045+ return gsm_modem_upd_via_msc(dlci, brk);
3046+ }
3047+
3048+ /* Modem status lines are not supported. */
3049+ return -EPROTONOSUPPORT;
3050+}
3051+
29773052 static int gsm_carrier_raised(struct tty_port *port)
29783053 {
29793054 struct gsm_dlci *dlci = container_of(port, struct gsm_dlci, port);
@@ -3006,7 +3081,7 @@ static void gsm_dtr_rts(struct tty_port *port, int onoff) · 26 unmodified lines
30063081 modem_tx &= ~(TIOCM_DTR | TIOCM_RTS);
30073082 if (modem_tx != dlci->modem_tx) {
30083083 dlci->modem_tx = modem_tx;
3009− gsmtty_modem_update(dlci, 0);
3084+ gsm_modem_update(dlci, 0);
30103085 }
30113086 }
30123087
@@ -3141,7 +3216,7 @@ static unsigned int gsmtty_write_room(struct tty_struct *tty) · 128 unmodified lines
31413216 struct gsm_dlci *dlci = tty->driver_data;
31423217 if (dlci->state == DLCI_CLOSED)
31433218 return 0;
3144− return TX_SIZE - kfifo_len(&dlci->fifo);
3219+ return kfifo_avail(&dlci->fifo);
31453220 }
31463221
31473222 static unsigned int gsmtty_chars_in_buffer(struct tty_struct *tty)
@@ -3155,13 +3230,17 @@ static unsigned int gsmtty_chars_in_buffer(struct tty_struct *tty) · 7 unmodified lines
31553230 static void gsmtty_flush_buffer(struct tty_struct *tty)
31563231 {
31573232 struct gsm_dlci *dlci = tty->driver_data;
3233+ unsigned long flags;
3234+
31583235 if (dlci->state == DLCI_CLOSED)
31593236 return;
31603237 /* Caution needed: If we implement reliable transport classes
31613238 then the data being transmitted can't simply be junked once
31623239 it has first hit the stack. Until then we can just blow it
31633240 away */
3241+ spin_lock_irqsave(&dlci->lock, flags);
31643242 kfifo_reset(&dlci->fifo);
3243+ spin_unlock_irqrestore(&dlci->lock, flags);
31653244 /* Need to unhook this DLCI from the transmit queue logic */
31663245 }
31673246
@@ -3193,7 +3272,7 @@ static int gsmtty_tiocmset(struct tty_struct *tty, · 25 unmodified lines
31933272
31943273 if (modem_tx != dlci->modem_tx) {
31953274 dlci->modem_tx = modem_tx;
3196− return gsmtty_modem_update(dlci, 0);
3275+ return gsm_modem_update(dlci, 0);
31973276 }
31983277 return 0;
31993278 }
@@ -3254,7 +3333,7 @@ static void gsmtty_throttle(struct tty_struct *tty) · 54 unmodified lines
32543333 dlci->modem_tx &= ~TIOCM_RTS;
32553334 dlci->throttled = true;
32563335 /* Send an MSC with RTS cleared */
3257− gsmtty_modem_update(dlci, 0);
3336+ gsm_modem_update(dlci, 0);
32583337 }
32593338
32603339 static void gsmtty_unthrottle(struct tty_struct *tty)
@@ -3266,7 +3345,7 @@ static void gsmtty_unthrottle(struct tty_struct *tty) · 5 unmodified lines
32663345 dlci->modem_tx |= TIOCM_RTS;
32673346 dlci->throttled = false;
32683347 /* Send an MSC with RTS set */
3269− gsmtty_modem_update(dlci, 0);
3348+ gsm_modem_update(dlci, 0);
32703349 }
32713350
32723351 static int gsmtty_break_ctl(struct tty_struct *tty, int state)
@@ -3284,7 +3363,7 @@ static int gsmtty_break_ctl(struct tty_struct *tty, int state) · 11 unmodified lines
32843363 if (encode > 0x0F)
32853364 encode = 0x0F; /* Best effort */
32863365 }
3287− return gsmtty_modem_update(dlci, encode);
3366+ return gsm_modem_update(dlci, encode);
32883367 }
32893368
32903369 static void gsmtty_cleanup(struct tty_struct *tty)
drivers/tty/serial/8250/8250_mtk.c+20−9
@@ -37,6 +37,7 @@ · 36 unmodified lines
3737 #define MTK_UART_IER_RTSI 0x40 /* Enable RTS Modem status interrupt */
3838 #define MTK_UART_IER_CTSI 0x80 /* Enable CTS Modem status interrupt */
3939
40+#define MTK_UART_EFR 38 /* I/O: Extended Features Register */
4041 #define MTK_UART_EFR_EN 0x10 /* Enable enhancement feature */
4142 #define MTK_UART_EFR_RTS 0x40 /* Enable hardware rx flow control */
4243 #define MTK_UART_EFR_CTS 0x80 /* Enable hardware tx flow control */
@@ -53,6 +54,12 @@ · 10 unmodified lines
5354 #define MTK_UART_TX_TRIGGER 1
5455 #define MTK_UART_RX_TRIGGER MTK_UART_RX_SIZE
5556
57+#define MTK_UART_FEATURE_SEL 39 /* Feature Selection register */
58+#define MTK_UART_FEAT_NEWRMAP BIT(0) /* Use new register map */
59+
60+#define MTK_UART_XON1 40 /* I/O: Xon character 1 */
61+#define MTK_UART_XOFF1 42 /* I/O: Xoff character 1 */
62+
5663 #ifdef CONFIG_SERIAL_8250_DMA
5764 enum dma_rx_status {
5865 DMA_RX_START = 0,
@@ -169,7 +176,7 @@ static void mtk8250_dma_enable(struct uart_8250_port *up) · 110 unmodified lines
169176 MTK_UART_DMA_EN_RX | MTK_UART_DMA_EN_TX);
170177
171178 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
172− serial_out(up, UART_EFR, UART_EFR_ECB);
179+ serial_out(up, MTK_UART_EFR, UART_EFR_ECB);
173180 serial_out(up, UART_LCR, lcr);
174181
175182 if (dmaengine_slave_config(dma->rxchan, &dma->rxconf) != 0)
@@ -232,7 +239,7 @@ static void mtk8250_set_flow_ctrl(struct uart_8250_port *up, int mode) · 56 unmodified lines
232239 int lcr = serial_in(up, UART_LCR);
233240
234241 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
235− serial_out(up, UART_EFR, UART_EFR_ECB);
242+ serial_out(up, MTK_UART_EFR, UART_EFR_ECB);
236243 serial_out(up, UART_LCR, lcr);
237244 lcr = serial_in(up, UART_LCR);
238245
@@ -241,7 +248,7 @@ static void mtk8250_set_flow_ctrl(struct uart_8250_port *up, int mode) · 2 unmodified lines
241248 serial_out(up, MTK_UART_ESCAPE_DAT, MTK_UART_ESCAPE_CHAR);
242249 serial_out(up, MTK_UART_ESCAPE_EN, 0x00);
243250 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
244− serial_out(up, UART_EFR, serial_in(up, UART_EFR) &
251+ serial_out(up, MTK_UART_EFR, serial_in(up, MTK_UART_EFR) &
245252 (~(MTK_UART_EFR_HW_FC | MTK_UART_EFR_SW_FC_MASK)));
246253 serial_out(up, UART_LCR, lcr);
247254 mtk8250_disable_intrs(up, MTK_UART_IER_XOFFI |
@@ -255,8 +262,8 @@ static void mtk8250_set_flow_ctrl(struct uart_8250_port *up, int mode) · 7 unmodified lines
255262 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
256263
257264 /*enable hw flow control*/
258− serial_out(up, UART_EFR, MTK_UART_EFR_HW_FC |
259− (serial_in(up, UART_EFR) &
265+ serial_out(up, MTK_UART_EFR, MTK_UART_EFR_HW_FC |
266+ (serial_in(up, MTK_UART_EFR) &
260267 (~(MTK_UART_EFR_HW_FC | MTK_UART_EFR_SW_FC_MASK))));
261268
262269 serial_out(up, UART_LCR, lcr);
@@ -270,12 +277,12 @@ static void mtk8250_set_flow_ctrl(struct uart_8250_port *up, int mode) · 7 unmodified lines
270277 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
271278
272279 /*enable sw flow control */
273− serial_out(up, UART_EFR, MTK_UART_EFR_XON1_XOFF1 |
274− (serial_in(up, UART_EFR) &
280+ serial_out(up, MTK_UART_EFR, MTK_UART_EFR_XON1_XOFF1 |
281+ (serial_in(up, MTK_UART_EFR) &
275282 (~(MTK_UART_EFR_HW_FC | MTK_UART_EFR_SW_FC_MASK))));
276283
277− serial_out(up, UART_XON1, START_CHAR(port->state->port.tty));
278− serial_out(up, UART_XOFF1, STOP_CHAR(port->state->port.tty));
284+ serial_out(up, MTK_UART_XON1, START_CHAR(port->state->port.tty));
285+ serial_out(up, MTK_UART_XOFF1, STOP_CHAR(port->state->port.tty));
279286 serial_out(up, UART_LCR, lcr);
280287 mtk8250_disable_intrs(up, MTK_UART_IER_CTSI|MTK_UART_IER_RTSI);
281288 mtk8250_enable_intrs(up, MTK_UART_IER_XOFFI);
@@ -568,6 +575,10 @@ static int mtk8250_probe(struct platform_device *pdev) · 286 unmodified lines
568575 uart.dma = data->dma;
569576 #endif
570577
578+ /* Set AP UART new register map */
579+ writel(MTK_UART_FEAT_NEWRMAP, uart.port.membase +
580+ (MTK_UART_FEATURE_SEL << uart.port.regshift));
581+
571582 /* Disable Rate Fix function */
572583 writel(0x0, uart.port.membase +
573584 (MTK_UART_RATE_FIX << uart.port.regshift));
drivers/tty/serial/8250/8250_pci.c+4−4
@@ -2667,7 +2667,7 @@ enum pci_board_num_t { · 2666 unmodified lines
26672667 pbn_panacom2,
26682668 pbn_panacom4,
26692669 pbn_plx_romulus,
2670− pbn_endrun_2_4000000,
2670+ pbn_endrun_2_3906250,
26712671 pbn_oxsemi,
26722672 pbn_oxsemi_1_3906250,
26732673 pbn_oxsemi_2_3906250,
@@ -3195,10 +3195,10 @@ static struct pciserial_board pci_boards[] = { · 521 unmodified lines
31953195 * signal now many ports are available
31963196 * 2 port 952 Uart support
31973197 */
3198− [pbn_endrun_2_4000000] = {
3198+ [pbn_endrun_2_3906250] = {
31993199 .flags = FL_BASE0,
32003200 .num_ports = 2,
3201− .base_baud = 4000000,
3201+ .base_baud = 3906250,
32023202 .uart_offset = 0x200,
32033203 .first_offset = 0x1000,
32043204 },
@@ -4115,7 +4115,7 @@ static const struct pci_device_id serial_pci_tbl[] = { · 910 unmodified lines
41154115 */
41164116 { PCI_VENDOR_ID_ENDRUN, PCI_DEVICE_ID_ENDRUN_1588,
41174117 PCI_ANY_ID, PCI_ANY_ID, 0, 0,
4118− pbn_endrun_2_4000000 },
4118+ pbn_endrun_2_3906250 },
41194119 /*
41204120 * Quatech cards. These actually have configurable clocks but for
41214121 * now we just use the default.
drivers/tty/serial/8250/8250_port.c+3−3
@@ -1675,11 +1675,11 @@ static void serial8250_start_tx(struct uart_port *port) · 1674 unmodified lines
16751675 struct uart_8250_port *up = up_to_u8250p(port);
16761676 struct uart_8250_em485 *em485 = up->em485;
16771677
1678− serial8250_rpm_get_tx(up);
1679−
16801678 if (!port->x_char && uart_circ_empty(&port->state->xmit))
16811679 return;
16821680
1681+ serial8250_rpm_get_tx(up);
1682+
16831683 if (em485 &&
16841684 em485->active_timer == &em485->start_tx_timer)
16851685 return;
@@ -3329,7 +3329,7 @@ static void serial8250_console_restore(struct uart_8250_port *up) · 1643 unmodified lines
33293329
33303330 serial8250_set_divisor(port, baud, quot, frac);
33313331 serial_port_out(port, UART_LCR, up->lcr);
3332− serial8250_out_MCR(up, UART_MCR_DTR | UART_MCR_RTS);
3332+ serial8250_out_MCR(up, up->mcr | UART_MCR_DTR | UART_MCR_RTS);
33333333 }
33343334
33353335 /*
drivers/tty/serial/amba-pl011.c+7−2
@@ -1255,13 +1255,18 @@ static inline bool pl011_dma_rx_running(struct uart_amba_port *uap) · 1254 unmodified lines
12551255
12561256 static void pl011_rs485_tx_stop(struct uart_amba_port *uap)
12571257 {
1258+ /*
1259+ * To be on the safe side only time out after twice as many iterations
1260+ * as fifo size.
1261+ */
1262+ const int MAX_TX_DRAIN_ITERS = uap->port.fifosize * 2;
12581263 struct uart_port *port = &uap->port;
12591264 int i = 0;
12601265 u32 cr;
12611266
12621267 /* Wait until hardware tx queue is empty */
12631268 while (!pl011_tx_empty(port)) {
1264− if (i == port->fifosize) {
1269+ if (i > MAX_TX_DRAIN_ITERS) {
12651270 dev_warn(port->dev,
12661271 "timeout while draining hardware tx queue\n");
12671272 break;
@@ -2052,7 +2057,7 @@ pl011_set_termios(struct uart_port *port, struct ktermios *termios, · 784 unmodified lines
20522057 * with the given baud rate. We use this as the poll interval when we
20532058 * wait for the tx queue to empty.
20542059 */
2055− uap->rs485_tx_drain_interval = (bits * 1000 * 1000) / baud;
2060+ uap->rs485_tx_drain_interval = DIV_ROUND_UP(bits * 1000 * 1000, baud);
20562061
20572062 pl011_setup_status_masks(port, termios);
20582063
drivers/tty/serial/digicolor-usart.c+2−3
@@ -471,11 +471,10 @@ static int digicolor_uart_probe(struct platform_device *pdev) · 470 unmodified lines
471471 if (IS_ERR(uart_clk))
472472 return PTR_ERR(uart_clk);
473473
474− res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
475− dp->port.mapbase = res->start;
476− dp->port.membase = devm_ioremap_resource(&pdev->dev, res);
474+ dp->port.membase = devm_platform_get_and_ioremap_resource(pdev, 0, &res);
477475 if (IS_ERR(dp->port.membase))
478476 return PTR_ERR(dp->port.membase);
477+ dp->port.mapbase = res->start;
479478
480479 irq = platform_get_irq(pdev, 0);
481480 if (irq < 0)
drivers/tty/serial/fsl_lpuart.c+9−9
@@ -2664,6 +2664,7 @@ static int lpuart_probe(struct platform_device *pdev) · 2663 unmodified lines
26642664 struct device_node *np = pdev->dev.of_node;
26652665 struct lpuart_port *sport;
26662666 struct resource *res;
2667+ irq_handler_t handler;
26672668 int ret;
26682669
26692670 sport = devm_kzalloc(&pdev->dev, sizeof(*sport), GFP_KERNEL);
@@ -2741,17 +2742,11 @@ static int lpuart_probe(struct platform_device *pdev) · 71 unmodified lines
27412742
27422743 if (lpuart_is_32(sport)) {
27432744 lpuart_reg.cons = LPUART32_CONSOLE;
2744− ret = devm_request_irq(&pdev->dev, sport->port.irq, lpuart32_int, 0,
2745− DRIVER_NAME, sport);
2745+ handler = lpuart32_int;
27462746 } else {
27472747 lpuart_reg.cons = LPUART_CONSOLE;
2748− ret = devm_request_irq(&pdev->dev, sport->port.irq, lpuart_int, 0,
2749− DRIVER_NAME, sport);
2748+ handler = lpuart_int;
27502749 }
2751−
2752− if (ret)
2753− goto failed_irq_request;
2754−
27552750 ret = uart_add_one_port(&lpuart_reg, &sport->port);
27562751 if (ret)
27572752 goto failed_attach_port;
@@ -2773,13 +2768,18 @@ static int lpuart_probe(struct platform_device *pdev) · 15 unmodified lines
27732768
27742769 sport->port.rs485_config(&sport->port, &sport->port.rs485);
27752770
2771+ ret = devm_request_irq(&pdev->dev, sport->port.irq, handler, 0,
2772+ DRIVER_NAME, sport);
2773+ if (ret)
2774+ goto failed_irq_request;
2775+
27762776 return 0;
27772777
2778+failed_irq_request:
27782779 failed_get_rs485:
27792780 failed_reset:
27802781 uart_remove_one_port(&lpuart_reg, &sport->port);
27812782 failed_attach_port:
2782−failed_irq_request:
27832783 lpuart_disable_clks(sport);
27842784 failed_clock_enable:
27852785 failed_out_of_range:
drivers/tty/serial/imx.c+1−1
@@ -1448,7 +1448,7 @@ static int imx_uart_startup(struct uart_port *port) · 1447 unmodified lines
14481448 imx_uart_writel(sport, ucr1, UCR1);
14491449
14501450 ucr4 = imx_uart_readl(sport, UCR4) & ~(UCR4_OREN | UCR4_INVR);
1451− if (!sport->dma_is_enabled)
1451+ if (!dma_is_inited)
14521452 ucr4 |= UCR4_OREN;
14531453 if (sport->inverted_rx)
14541454 ucr4 |= UCR4_INVR;
drivers/tty/serial/sc16is7xx.c+2−4
@@ -1238,12 +1238,10 @@ static void sc16is7xx_shutdown(struct uart_port *port) · 1237 unmodified lines
12381238
12391239 /* Disable all interrupts */
12401240 sc16is7xx_port_write(port, SC16IS7XX_IER_REG, 0);
1241− /* Disable TX/RX, clear auto RS485 and RTS invert */
1241+ /* Disable TX/RX */
12421242 sc16is7xx_port_update(port, SC16IS7XX_EFCR_REG,
12431243 SC16IS7XX_EFCR_RXDISABLE_BIT |
1244− SC16IS7XX_EFCR_TXDISABLE_BIT |
1245− SC16IS7XX_EFCR_AUTO_RS485_BIT |
1246− SC16IS7XX_EFCR_RTS_INVERT_BIT,
1244+ SC16IS7XX_EFCR_TXDISABLE_BIT,
12471245 SC16IS7XX_EFCR_RXDISABLE_BIT |
12481246 SC16IS7XX_EFCR_TXDISABLE_BIT);
12491247
drivers/usb/cdns3/cdns3-gadget.c+5−2
@@ -2684,6 +2684,7 @@ int __cdns3_gadget_ep_clear_halt(struct cdns3_endpoint *priv_ep) · 2683 unmodified lines
26842684 struct usb_request *request;
26852685 struct cdns3_request *priv_req;
26862686 struct cdns3_trb *trb = NULL;
2687+ struct cdns3_trb trb_tmp;
26872688 int ret;
26882689 int val;
26892690
@@ -2693,8 +2694,10 @@ int __cdns3_gadget_ep_clear_halt(struct cdns3_endpoint *priv_ep) · 3 unmodified lines
26932694 if (request) {
26942695 priv_req = to_cdns3_request(request);
26952696 trb = priv_req->trb;
2696− if (trb)
2697+ if (trb) {
2698+ trb_tmp = *trb;
26972699 trb->control = trb->control ^ cpu_to_le32(TRB_CYCLE);
2700+ }
26982701 }
26992702
27002703 writel(EP_CMD_CSTALL | EP_CMD_EPRST, &priv_dev->regs->ep_cmd);
@@ -2709,7 +2712,7 @@ int __cdns3_gadget_ep_clear_halt(struct cdns3_endpoint *priv_ep) · 8 unmodified lines
27092712
27102713 if (request) {
27112714 if (trb)
2712− trb->control = trb->control ^ cpu_to_le32(TRB_CYCLE);
2715+ *trb = trb_tmp;
27132716
27142717 cdns3_rearm_transfer(priv_ep, 1);
27152718 }
drivers/usb/class/cdc-wdm.c+1−0
@@ -774,6 +774,7 @@ static int wdm_release(struct inode *inode, struct file *file) · 773 unmodified lines
774774 poison_urbs(desc);
775775 spin_lock_irq(&desc->iuspin);
776776 desc->resp_count = 0;
777+ clear_bit(WDM_RESPONDING, &desc->flags);
777778 spin_unlock_irq(&desc->iuspin);
778779 desc->manage_power(desc->intf, 0);
779780 unpoison_urbs(desc);
drivers/usb/core/devio.c+9−5
@@ -1209,12 +1209,16 @@ static int do_proc_control(struct usb_dev_state *ps, · 1208 unmodified lines
12091209
12101210 usb_unlock_device(dev);
12111211 i = usbfs_start_wait_urb(urb, tmo, &actlen);
1212+
1213+ /* Linger a bit, prior to the next control message. */
1214+ if (dev->quirks & USB_QUIRK_DELAY_CTRL_MSG)
1215+ msleep(200);
12121216 usb_lock_device(dev);
12131217 snoop_urb(dev, NULL, pipe, actlen, i, COMPLETE, tbuf, actlen);
12141218 if (!i && actlen) {
12151219 if (copy_to_user(ctrl->data, tbuf, actlen)) {
12161220 ret = -EFAULT;
1217− goto recv_fault;
1221+ goto done;
12181222 }
12191223 }
12201224 } else {
@@ -1231,6 +1235,10 @@ static int do_proc_control(struct usb_dev_state *ps, · 10 unmodified lines
12311235
12321236 usb_unlock_device(dev);
12331237 i = usbfs_start_wait_urb(urb, tmo, &actlen);
1238+
1239+ /* Linger a bit, prior to the next control message. */
1240+ if (dev->quirks & USB_QUIRK_DELAY_CTRL_MSG)
1241+ msleep(200);
12341242 usb_lock_device(dev);
12351243 snoop_urb(dev, NULL, pipe, actlen, i, COMPLETE, NULL, 0);
12361244 }
@@ -1242,10 +1250,6 @@ static int do_proc_control(struct usb_dev_state *ps, · 5 unmodified lines
12421250 }
12431251 ret = (i < 0 ? i : actlen);
12441252
1245− recv_fault:
1246− /* Linger a bit, prior to the next control message. */
1247− if (dev->quirks & USB_QUIRK_DELAY_CTRL_MSG)
1248− msleep(200);
12491253 done:
12501254 kfree(dr);
12511255 usb_free_urb(urb);
drivers/usb/core/quirks.c+6−0
@@ -404,6 +404,9 @@ static const struct usb_device_id usb_quirk_list[] = { · 403 unmodified lines
404404 { USB_DEVICE(0x0b05, 0x17e0), .driver_info =
405405 USB_QUIRK_IGNORE_REMOTE_WAKEUP },
406406
407+ /* Realtek Semiconductor Corp. Mass Storage Device (Multicard Reader)*/
408+ { USB_DEVICE(0x0bda, 0x0151), .driver_info = USB_QUIRK_CONFIG_INTF_STRINGS },
409+
407410 /* Realtek hub in Dell WD19 (Type-C) */
408411 { USB_DEVICE(0x0bda, 0x0487), .driver_info = USB_QUIRK_NO_LPM },
409412
@@ -507,6 +510,9 @@ static const struct usb_device_id usb_quirk_list[] = { · 97 unmodified lines
507510 /* DJI CineSSD */
508511 { USB_DEVICE(0x2ca3, 0x0031), .driver_info = USB_QUIRK_NO_LPM },
509512
513+ /* VCOM device */
514+ { USB_DEVICE(0x4296, 0x7570), .driver_info = USB_QUIRK_CONFIG_INTF_STRINGS },
515+
510516 /* INTEL VALUE SSD */
511517 { USB_DEVICE(0x8086, 0xf1a5), .driver_info = USB_QUIRK_RESET_RESUME },
512518
drivers/usb/dwc3/core.c+29−5
@@ -274,7 +274,8 @@ int dwc3_core_soft_reset(struct dwc3 *dwc) · 273 unmodified lines
274274
275275 reg = dwc3_readl(dwc->regs, DWC3_DCTL);
276276 reg |= DWC3_DCTL_CSFTRST;
277− dwc3_writel(dwc->regs, DWC3_DCTL, reg);
277+ reg &= ~DWC3_DCTL_RUN_STOP;
278+ dwc3_gadget_dctl_write_safe(dwc, reg);
278279
279280 /*
280281 * For DWC_usb31 controller 1.90a and later, the DCTL.CSFRST bit
@@ -1377,10 +1378,10 @@ static void dwc3_get_properties(struct dwc3 *dwc) · 1096 unmodified lines
13771378 u8 lpm_nyet_threshold;
13781379 u8 tx_de_emphasis;
13791380 u8 hird_threshold;
1380− u8 rx_thr_num_pkt_prd;
1381− u8 rx_max_burst_prd;
1382− u8 tx_thr_num_pkt_prd;
1383− u8 tx_max_burst_prd;
1381+ u8 rx_thr_num_pkt_prd = 0;
1382+ u8 rx_max_burst_prd = 0;
1383+ u8 tx_thr_num_pkt_prd = 0;
1384+ u8 tx_max_burst_prd = 0;
13841385 u8 tx_fifo_resize_max_num;
13851386 const char *usb_psy_name;
13861387 int ret;
@@ -1690,21 +1691,44 @@ static int dwc3_probe(struct platform_device *pdev) · 303 unmodified lines
16901691 /*
16911692 * Clocks are optional, but new DT platforms should support all
16921693 * clocks as required by the DT-binding.
1694+ * Some devices have different clock names in legacy device trees,
1695+ * check for them to retain backwards compatibility.
16931696 */
16941697 dwc->bus_clk = devm_clk_get_optional(dev, "bus_early");
16951698 if (IS_ERR(dwc->bus_clk))
16961699 return dev_err_probe(dev, PTR_ERR(dwc->bus_clk),
16971700 "could not get bus clock\n");
16981701
1702+ if (dwc->bus_clk == NULL) {
1703+ dwc->bus_clk = devm_clk_get_optional(dev, "bus_clk");
1704+ if (IS_ERR(dwc->bus_clk))
1705+ return dev_err_probe(dev, PTR_ERR(dwc->bus_clk),
1706+ "could not get bus clock\n");
1707+ }
1708+
16991709 dwc->ref_clk = devm_clk_get_optional(dev, "ref");
17001710 if (IS_ERR(dwc->ref_clk))
17011711 return dev_err_probe(dev, PTR_ERR(dwc->ref_clk),
17021712 "could not get ref clock\n");
17031713
1714+ if (dwc->ref_clk == NULL) {
1715+ dwc->ref_clk = devm_clk_get_optional(dev, "ref_clk");
1716+ if (IS_ERR(dwc->ref_clk))
1717+ return dev_err_probe(dev, PTR_ERR(dwc->ref_clk),
1718+ "could not get ref clock\n");
1719+ }
1720+
17041721 dwc->susp_clk = devm_clk_get_optional(dev, "suspend");
17051722 if (IS_ERR(dwc->susp_clk))
17061723 return dev_err_probe(dev, PTR_ERR(dwc->susp_clk),
17071724 "could not get suspend clock\n");
1725+
1726+ if (dwc->susp_clk == NULL) {
1727+ dwc->susp_clk = devm_clk_get_optional(dev, "suspend_clk");
1728+ if (IS_ERR(dwc->susp_clk))
1729+ return dev_err_probe(dev, PTR_ERR(dwc->susp_clk),
1730+ "could not get suspend clock\n");
1731+ }
17081732 }
17091733
17101734 ret = reset_control_deassert(dwc->reset);
drivers/usb/dwc3/drd.c+5−6
@@ -584,16 +584,15 @@ int dwc3_drd_init(struct dwc3 *dwc) · 583 unmodified lines
584584 {
585585 int ret, irq;
586586
587+ if (ROLE_SWITCH &&
588+ device_property_read_bool(dwc->dev, "usb-role-switch"))
589+ return dwc3_setup_role_switch(dwc);
590+
587591 dwc->edev = dwc3_get_extcon(dwc);
588592 if (IS_ERR(dwc->edev))
589593 return PTR_ERR(dwc->edev);
590594
591− if (ROLE_SWITCH &&
592− device_property_read_bool(dwc->dev, "usb-role-switch")) {
593− ret = dwc3_setup_role_switch(dwc);
594− if (ret < 0)
595− return ret;
596− } else if (dwc->edev) {
595+ if (dwc->edev) {
597596 dwc->edev_nb.notifier_call = dwc3_drd_notifier;
598597 ret = extcon_register_notifier(dwc->edev, EXTCON_USB_HOST,
599598 &dwc->edev_nb);
drivers/usb/dwc3/dwc3-pci.c+8−0
@@ -45,6 +45,8 @@ · 44 unmodified lines
4545 #define PCI_DEVICE_ID_INTEL_ADLM 0x54ee
4646 #define PCI_DEVICE_ID_INTEL_ADLS 0x7ae1
4747 #define PCI_DEVICE_ID_INTEL_RPLS 0x7a61
48+#define PCI_DEVICE_ID_INTEL_MTLP 0x7ec1
49+#define PCI_DEVICE_ID_INTEL_MTL 0x7e7e
4850 #define PCI_DEVICE_ID_INTEL_TGL 0x9a15
4951 #define PCI_DEVICE_ID_AMD_MR 0x163a
5052
@@ -456,6 +458,12 @@ static const struct pci_device_id dwc3_pci_id_table[] = { · 405 unmodified lines
456458 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_RPLS),
457459 (kernel_ulong_t) &dwc3_pci_intel_swnode, },
458460
461+ { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_MTLP),
462+ (kernel_ulong_t) &dwc3_pci_intel_swnode, },
463+
464+ { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_MTL),
465+ (kernel_ulong_t) &dwc3_pci_intel_swnode, },
466+
459467 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_TGL),
460468 (kernel_ulong_t) &dwc3_pci_intel_swnode, },
461469
drivers/usb/dwc3/gadget.c+30−1
@@ -3274,6 +3274,7 @@ static int dwc3_gadget_ep_cleanup_completed_request(struct dwc3_ep *dep, · 3273 unmodified lines
32743274 const struct dwc3_event_depevt *event,
32753275 struct dwc3_request *req, int status)
32763276 {
3277+ int request_status;
32773278 int ret;
32783279
32793280 if (req->request.num_mapped_sgs)
@@ -3294,7 +3295,35 @@ static int dwc3_gadget_ep_cleanup_completed_request(struct dwc3_ep *dep, · 14 unmodified lines
32943295 req->needs_extra_trb = false;
32953296 }
32963297
3297− dwc3_gadget_giveback(dep, req, status);
3298+ /*
3299+ * The event status only reflects the status of the TRB with IOC set.
3300+ * For the requests that don't set interrupt on completion, the driver
3301+ * needs to check and return the status of the completed TRBs associated
3302+ * with the request. Use the status of the last TRB of the request.
3303+ */
3304+ if (req->request.no_interrupt) {
3305+ struct dwc3_trb *trb;
3306+
3307+ trb = dwc3_ep_prev_trb(dep, dep->trb_dequeue);
3308+ switch (DWC3_TRB_SIZE_TRBSTS(trb->size)) {
3309+ case DWC3_TRBSTS_MISSED_ISOC:
3310+ /* Isoc endpoint only */
3311+ request_status = -EXDEV;
3312+ break;
3313+ case DWC3_TRB_STS_XFER_IN_PROG:
3314+ /* Applicable when End Transfer with ForceRM=0 */
3315+ case DWC3_TRBSTS_SETUP_PENDING:
3316+ /* Control endpoint only */
3317+ case DWC3_TRBSTS_OK:
3318+ default:
3319+ request_status = 0;
3320+ break;
3321+ }
3322+ } else {
3323+ request_status = status;
3324+ }
3325+
3326+ dwc3_gadget_giveback(dep, req, request_status);
32983327
32993328 out:
33003329 return ret;
drivers/usb/gadget/configfs.c+2−0
@@ -1438,6 +1438,8 @@ static void configfs_composite_unbind(struct usb_gadget *gadget) · 1437 unmodified lines
14381438 usb_ep_autoconfig_reset(cdev->gadget);
14391439 spin_lock_irqsave(&gi->spinlock, flags);
14401440 cdev->gadget = NULL;
1441+ cdev->deactivations = 0;
1442+ gadget->deactivated = false;
14411443 set_gadget_data(gadget, NULL);
14421444 spin_unlock_irqrestore(&gi->spinlock, flags);
14431445 }
drivers/usb/gadget/function/f_uvc.c+25−0
@@ -890,13 +890,37 @@ static void uvc_function_unbind(struct usb_configuration *c, · 889 unmodified lines
890890 {
891891 struct usb_composite_dev *cdev = c->cdev;
892892 struct uvc_device *uvc = to_uvc(f);
893+ long wait_ret = 1;
893894
894895 uvcg_info(f, "%s()\n", __func__);
895896
897+ /* If we know we're connected via v4l2, then there should be a cleanup
898+ * of the device from userspace either via UVC_EVENT_DISCONNECT or
899+ * though the video device removal uevent. Allow some time for the
900+ * application to close out before things get deleted.
901+ */
902+ if (uvc->func_connected) {
903+ uvcg_dbg(f, "waiting for clean disconnect\n");
904+ wait_ret = wait_event_interruptible_timeout(uvc->func_connected_queue,
905+ uvc->func_connected == false, msecs_to_jiffies(500));
906+ uvcg_dbg(f, "done waiting with ret: %ld\n", wait_ret);
907+ }
908+
896909 device_remove_file(&uvc->vdev.dev, &dev_attr_function_name);
897910 video_unregister_device(&uvc->vdev);
898911 v4l2_device_unregister(&uvc->v4l2_dev);
899912
913+ if (uvc->func_connected) {
914+ /* Wait for the release to occur to ensure there are no longer any
915+ * pending operations that may cause panics when resources are cleaned
916+ * up.
917+ */
918+ uvcg_warn(f, "%s no clean disconnect, wait for release\n", __func__);
919+ wait_ret = wait_event_interruptible_timeout(uvc->func_connected_queue,
920+ uvc->func_connected == false, msecs_to_jiffies(1000));
921+ uvcg_dbg(f, "done waiting for release with ret: %ld\n", wait_ret);
922+ }
923+
900924 usb_ep_free_request(cdev->gadget->ep0, uvc->control_req);
901925 kfree(uvc->control_buf);
902926
@@ -915,6 +939,7 @@ static struct usb_function *uvc_alloc(struct usb_function_instance *fi) · 12 unmodified lines
915939
916940 mutex_init(&uvc->video.mutex);
917941 uvc->state = UVC_STATE_DISCONNECTED;
942+ init_waitqueue_head(&uvc->func_connected_queue);
918943 opts = fi_to_f_uvc_opts(fi);
919944
920945 mutex_lock(&opts->lock);
drivers/usb/gadget/function/uvc.h+2−0
@@ -14,6 +14,7 @@ · 13 unmodified lines
1414 #include <linux/spinlock.h>
1515 #include <linux/usb/composite.h>
1616 #include <linux/videodev2.h>
17+#include <linux/wait.h>
1718
1819 #include <media/v4l2-device.h>
1920 #include <media/v4l2-dev.h>
@@ -129,6 +130,7 @@ struct uvc_device { · 109 unmodified lines
129130 struct usb_function func;
130131 struct uvc_video video;
131132 bool func_connected;
133+ wait_queue_head_t func_connected_queue;
132134
133135 /* Descriptors */
134136 struct {
drivers/usb/gadget/function/uvc_queue.c+2−0
@@ -264,6 +264,8 @@ void uvcg_queue_cancel(struct uvc_video_queue *queue, int disconnect) · 263 unmodified lines
264264 buf->state = UVC_BUF_STATE_ERROR;
265265 vb2_buffer_done(&buf->buf.vb2_buf, VB2_BUF_STATE_ERROR);
266266 }
267+ queue->buf_used = 0;
268+
267269 /* This must be protected by the irqlock spinlock to avoid race
268270 * conditions between uvc_queue_buffer and the disconnection event that
269271 * could result in an interruptible wait in uvc_dequeue_buffer. Do not
drivers/usb/gadget/function/uvc_v4l2.c+2−1
@@ -253,10 +253,11 @@ uvc_v4l2_subscribe_event(struct v4l2_fh *fh, · 252 unmodified lines
253253
254254 static void uvc_v4l2_disable(struct uvc_device *uvc)
255255 {
256− uvc->func_connected = false;
257256 uvc_function_disconnect(uvc);
258257 uvcg_video_enable(&uvc->video, 0);
259258 uvcg_free_buffers(&uvc->video.queue);
259+ uvc->func_connected = false;
260+ wake_up_interruptible(&uvc->func_connected_queue);
260261 }
261262
262263 static int
drivers/usb/gadget/legacy/raw_gadget.c+2−0
@@ -145,6 +145,7 @@ enum dev_state { · 144 unmodified lines
145145 STATE_DEV_INVALID = 0,
146146 STATE_DEV_OPENED,
147147 STATE_DEV_INITIALIZED,
148+ STATE_DEV_REGISTERING,
148149 STATE_DEV_RUNNING,
149150 STATE_DEV_CLOSED,
150151 STATE_DEV_FAILED
@@ -508,6 +509,7 @@ static int raw_ioctl_run(struct raw_dev *dev, unsigned long value) · 357 unmodified lines
508509 ret = -EINVAL;
509510 goto out_unlock;
510511 }
512+ dev->state = STATE_DEV_REGISTERING;
511513 spin_unlock_irqrestore(&dev->lock, flags);
512514
513515 ret = usb_gadget_probe_driver(&dev->driver);
drivers/usb/host/ehci-hcd.c+23−0
@@ -1103,6 +1103,26 @@ static void ehci_remove_device(struct usb_hcd *hcd, struct usb_device *udev) · 1102 unmodified lines
11031103
11041104 #ifdef CONFIG_PM
11051105
1106+/* Clear wakeup signal locked in zhaoxin platform when device plug in. */
1107+static void ehci_zx_wakeup_clear(struct ehci_hcd *ehci)
1108+{
1109+ u32 __iomem *reg = &ehci->regs->port_status[4];
1110+ u32 t1 = ehci_readl(ehci, reg);
1111+
1112+ t1 &= (u32)~0xf0000;
1113+ t1 |= PORT_TEST_FORCE;
1114+ ehci_writel(ehci, t1, reg);
1115+ t1 = ehci_readl(ehci, reg);
1116+ msleep(1);
1117+ t1 &= (u32)~0xf0000;
1118+ ehci_writel(ehci, t1, reg);
1119+ ehci_readl(ehci, reg);
1120+ msleep(1);
1121+ t1 = ehci_readl(ehci, reg);
1122+ ehci_writel(ehci, t1 | PORT_CSC, reg);
1123+ ehci_readl(ehci, reg);
1124+}
1125+
11061126 /* suspend/resume, section 4.3 */
11071127
11081128 /* These routines handle the generic parts of controller suspend/resume */
@@ -1154,6 +1174,9 @@ int ehci_resume(struct usb_hcd *hcd, bool force_reset) · 45 unmodified lines
11541174 if (ehci->shutdown)
11551175 return 0; /* Controller is dead */
11561176
1177+ if (ehci->zx_wakeup_clear_needed)
1178+ ehci_zx_wakeup_clear(ehci);
1179+
11571180 /*
11581181 * If CF is still set and reset isn't forced
11591182 * then we maintained suspend power.
drivers/usb/host/ehci-pci.c+4−0
@@ -231,6 +231,10 @@ static int ehci_pci_setup(struct usb_hcd *hcd) · 230 unmodified lines
231231 ehci->is_aspeed = 1;
232232 }
233233 break;
234+ case PCI_VENDOR_ID_ZHAOXIN:
235+ if (pdev->device == 0x3104 && (pdev->revision & 0xf0) == 0x90)
236+ ehci->zx_wakeup_clear_needed = 1;
237+ break;
234238 }
235239
236240 /* optional debug port, normally in the first BAR */
drivers/usb/host/ehci.h+1−0
@@ -220,6 +220,7 @@ struct ehci_hcd { /* one per controller */ · 219 unmodified lines
220220 unsigned imx28_write_fix:1; /* For Freescale i.MX28 */
221221 unsigned spurious_oc:1;
222222 unsigned is_aspeed:1;
223+ unsigned zx_wakeup_clear_needed:1;
223224
224225 /* required for usb32 quirk */
225226 #define OHCI_CTRL_HCFS (3 << 6)
drivers/usb/host/xhci-hub.c+1−1
@@ -1434,7 +1434,7 @@ int xhci_hub_control(struct usb_hcd *hcd, u16 typeReq, u16 wValue, · 1433 unmodified lines
14341434 }
14351435 spin_unlock_irqrestore(&xhci->lock, flags);
14361436 if (!wait_for_completion_timeout(&bus_state->u3exit_done[wIndex],
1437− msecs_to_jiffies(100)))
1437+ msecs_to_jiffies(500)))
14381438 xhci_dbg(xhci, "missing U0 port change event for port %d-%d\n",
14391439 hcd->self.busnum, wIndex + 1);
14401440 spin_lock_irqsave(&xhci->lock, flags);
drivers/usb/host/xhci-mtk-sch.c+19−71
@@ -19,11 +19,6 @@ · 18 unmodified lines
1919 #define HS_BW_BOUNDARY 6144
2020 /* usb2 spec section11.18.1: at most 188 FS bytes per microframe */
2121 #define FS_PAYLOAD_MAX 188
22−/*
23− * max number of microframes for split transfer,
24− * for fs isoc in : 1 ss + 1 idle + 7 cs
25− */
26−#define TT_MICROFRAMES_MAX 9
2722
2823 #define DBG_BUF_EN 64
2924
@@ -242,28 +237,17 @@ static void drop_tt(struct usb_device *udev) · 212 unmodified lines
242237
243238 static struct mu3h_sch_ep_info *
244239 create_sch_ep(struct xhci_hcd_mtk *mtk, struct usb_device *udev,
245− struct usb_host_endpoint *ep, struct xhci_ep_ctx *ep_ctx)
240+ struct usb_host_endpoint *ep)
246241 {
247242 struct mu3h_sch_ep_info *sch_ep;
248243 struct mu3h_sch_bw_info *bw_info;
249244 struct mu3h_sch_tt *tt = NULL;
250− u32 len_bw_budget_table;
251245
252246 bw_info = get_bw_info(mtk, udev, ep);
253247 if (!bw_info)
254248 return ERR_PTR(-ENODEV);
255249
256− if (is_fs_or_ls(udev->speed))
257− len_bw_budget_table = TT_MICROFRAMES_MAX;
258− else if ((udev->speed >= USB_SPEED_SUPER)
259− && usb_endpoint_xfer_isoc(&ep->desc))
260− len_bw_budget_table = get_esit(ep_ctx);
261− else
262− len_bw_budget_table = 1;
263−
264− sch_ep = kzalloc(struct_size(sch_ep, bw_budget_table,
265− len_bw_budget_table),
266− GFP_KERNEL);
250+ sch_ep = kzalloc(sizeof(*sch_ep), GFP_KERNEL);
267251 if (!sch_ep)
268252 return ERR_PTR(-ENOMEM);
269253
@@ -295,8 +279,6 @@ static void setup_sch_info(struct xhci_ep_ctx *ep_ctx, · 25 unmodified lines
295279 u32 mult;
296280 u32 esit_pkts;
297281 u32 max_esit_payload;
298− u32 *bwb_table = sch_ep->bw_budget_table;
299− int i;
300282
301283 ep_type = CTX_TO_EP_TYPE(le32_to_cpu(ep_ctx->ep_info2));
302284 maxpkt = MAX_PACKET_DECODED(le32_to_cpu(ep_ctx->ep_info2));
@@ -332,7 +314,6 @@ static void setup_sch_info(struct xhci_ep_ctx *ep_ctx, · 29 unmodified lines
332314 */
333315 sch_ep->pkts = max_burst + 1;
334316 sch_ep->bw_cost_per_microframe = maxpkt * sch_ep->pkts;
335− bwb_table[0] = sch_ep->bw_cost_per_microframe;
336317 } else if (sch_ep->speed >= USB_SPEED_SUPER) {
337318 /* usb3_r1 spec section4.4.7 & 4.4.8 */
338319 sch_ep->cs_count = 0;
@@ -349,7 +330,6 @@ static void setup_sch_info(struct xhci_ep_ctx *ep_ctx, · 10 unmodified lines
349330 if (ep_type == INT_IN_EP || ep_type == INT_OUT_EP) {
350331 sch_ep->pkts = esit_pkts;
351332 sch_ep->num_budget_microframes = 1;
352− bwb_table[0] = maxpkt * sch_ep->pkts;
353333 }
354334
355335 if (ep_type == ISOC_IN_EP || ep_type == ISOC_OUT_EP) {
@@ -366,15 +346,8 @@ static void setup_sch_info(struct xhci_ep_ctx *ep_ctx, · 10 unmodified lines
366346 DIV_ROUND_UP(esit_pkts, sch_ep->pkts);
367347
368348 sch_ep->repeat = !!(sch_ep->num_budget_microframes > 1);
369− sch_ep->bw_cost_per_microframe = maxpkt * sch_ep->pkts;
370−
371− for (i = 0; i < sch_ep->num_budget_microframes - 1; i++)
372− bwb_table[i] = sch_ep->bw_cost_per_microframe;
373−
374− /* last one <= bw_cost_per_microframe */
375− bwb_table[i] = maxpkt * esit_pkts
376− - i * sch_ep->bw_cost_per_microframe;
377349 }
350+ sch_ep->bw_cost_per_microframe = maxpkt * sch_ep->pkts;
378351 } else if (is_fs_or_ls(sch_ep->speed)) {
379352 sch_ep->pkts = 1; /* at most one packet for each microframe */
380353
@@ -384,28 +357,7 @@ static void setup_sch_info(struct xhci_ep_ctx *ep_ctx, · 3 unmodified lines
384357 */
385358 sch_ep->cs_count = DIV_ROUND_UP(maxpkt, FS_PAYLOAD_MAX);
386359 sch_ep->num_budget_microframes = sch_ep->cs_count;
387− sch_ep->bw_cost_per_microframe =
388− (maxpkt < FS_PAYLOAD_MAX) ? maxpkt : FS_PAYLOAD_MAX;
389−
390− /* init budget table */
391− if (ep_type == ISOC_OUT_EP) {
392− for (i = 0; i < sch_ep->num_budget_microframes; i++)
393− bwb_table[i] = sch_ep->bw_cost_per_microframe;
394− } else if (ep_type == INT_OUT_EP) {
395− /* only first one consumes bandwidth, others as zero */
396− bwb_table[0] = sch_ep->bw_cost_per_microframe;
397− } else { /* INT_IN_EP or ISOC_IN_EP */
398− bwb_table[0] = 0; /* start split */
399− bwb_table[1] = 0; /* idle */
400− /*
401− * due to cs_count will be updated according to cs
402− * position, assign all remainder budget array
403− * elements as @bw_cost_per_microframe, but only first
404− * @num_budget_microframes elements will be used later
405− */
406− for (i = 2; i < TT_MICROFRAMES_MAX; i++)
407− bwb_table[i] = sch_ep->bw_cost_per_microframe;
408− }
360+ sch_ep->bw_cost_per_microframe = min_t(u32, maxpkt, FS_PAYLOAD_MAX);
409361 }
410362 }
411363
@@ -422,7 +374,7 @@ static u32 get_max_bw(struct mu3h_sch_bw_info *sch_bw, · 10 unmodified lines
422374
423375 for (j = 0; j < sch_ep->num_budget_microframes; j++) {
424376 k = XHCI_MTK_BW_INDEX(base + j);
425− bw = sch_bw->bus_bw[k] + sch_ep->bw_budget_table[j];
377+ bw = sch_bw->bus_bw[k] + sch_ep->bw_cost_per_microframe;
426378 if (bw > max_bw)
427379 max_bw = bw;
428380 }
@@ -433,18 +385,16 @@ static u32 get_max_bw(struct mu3h_sch_bw_info *sch_bw, · 4 unmodified lines
433385 static void update_bus_bw(struct mu3h_sch_bw_info *sch_bw,
434386 struct mu3h_sch_ep_info *sch_ep, bool used)
435387 {
388+ int bw_updated;
436389 u32 base;
437− int i, j, k;
390+ int i, j;
391+
392+ bw_updated = sch_ep->bw_cost_per_microframe * (used ? 1 : -1);
438393
439394 for (i = 0; i < sch_ep->num_esit; i++) {
440395 base = sch_ep->offset + i * sch_ep->esit;
441− for (j = 0; j < sch_ep->num_budget_microframes; j++) {
442− k = XHCI_MTK_BW_INDEX(base + j);
443− if (used)
444− sch_bw->bus_bw[k] += sch_ep->bw_budget_table[j];
445− else
446− sch_bw->bus_bw[k] -= sch_ep->bw_budget_table[j];
447− }
396+ for (j = 0; j < sch_ep->num_budget_microframes; j++)
397+ sch_bw->bus_bw[XHCI_MTK_BW_INDEX(base + j)] += bw_updated;
448398 }
449399 }
450400
@@ -464,7 +414,7 @@ static int check_fs_bus_bw(struct mu3h_sch_ep_info *sch_ep, int offset) · 13 unmodified lines
464414 */
465415 for (j = 0; j < sch_ep->num_budget_microframes; j++) {
466416 k = XHCI_MTK_BW_INDEX(base + j);
467− tmp = tt->fs_bus_bw[k] + sch_ep->bw_budget_table[j];
417+ tmp = tt->fs_bus_bw[k] + sch_ep->bw_cost_per_microframe;
468418 if (tmp > FS_PAYLOAD_MAX)
469419 return -ESCH_BW_OVERFLOW;
470420 }
@@ -538,19 +488,17 @@ static int check_sch_tt(struct mu3h_sch_ep_info *sch_ep, u32 offset) · 67 unmodified lines
538488 static void update_sch_tt(struct mu3h_sch_ep_info *sch_ep, bool used)
539489 {
540490 struct mu3h_sch_tt *tt = sch_ep->sch_tt;
491+ int bw_updated;
541492 u32 base;
542− int i, j, k;
493+ int i, j;
494+
495+ bw_updated = sch_ep->bw_cost_per_microframe * (used ? 1 : -1);
543496
544497 for (i = 0; i < sch_ep->num_esit; i++) {
545498 base = sch_ep->offset + i * sch_ep->esit;
546499
547− for (j = 0; j < sch_ep->num_budget_microframes; j++) {
548− k = XHCI_MTK_BW_INDEX(base + j);
549− if (used)
550− tt->fs_bus_bw[k] += sch_ep->bw_budget_table[j];
551− else
552− tt->fs_bus_bw[k] -= sch_ep->bw_budget_table[j];
553− }
500+ for (j = 0; j < sch_ep->num_budget_microframes; j++)
501+ tt->fs_bus_bw[XHCI_MTK_BW_INDEX(base + j)] += bw_updated;
554502 }
555503
556504 if (used)
@@ -710,7 +658,7 @@ static int add_ep_quirk(struct usb_hcd *hcd, struct usb_device *udev, · 153 unmodified lines
710658
711659 xhci_dbg(xhci, "%s %s\n", __func__, decode_ep(ep, udev->speed));
712660
713− sch_ep = create_sch_ep(mtk, udev, ep, ep_ctx);
661+ sch_ep = create_sch_ep(mtk, udev, ep);
714662 if (IS_ERR_OR_NULL(sch_ep))
715663 return -ENOMEM;
716664
drivers/usb/host/xhci-mtk.h+0−2
@@ -83,7 +83,6 @@ struct mu3h_sch_bw_info { · 82 unmodified lines
8383 * times; 1: distribute the (bMaxBurst+1)*(Mult+1) packets
8484 * according to @pkts and @repeat. normal mode is used by
8585 * default
86− * @bw_budget_table: table to record bandwidth budget per microframe
8786 */
8887 struct mu3h_sch_ep_info {
8988 u32 esit;
@@ -109,7 +108,6 @@ struct mu3h_sch_ep_info { · 19 unmodified lines
109108 u32 pkts;
110109 u32 cs_count;
111110 u32 burst_mode;
112− u32 bw_budget_table[];
113111 };
114112
115113 #define MU3C_U3_PORT_MAX 4
drivers/usb/host/xhci-pci.c+3−1
@@ -59,6 +59,7 @@ · 58 unmodified lines
5959 #define PCI_DEVICE_ID_INTEL_TIGER_LAKE_XHCI 0x9a13
6060 #define PCI_DEVICE_ID_INTEL_MAPLE_RIDGE_XHCI 0x1138
6161 #define PCI_DEVICE_ID_INTEL_ALDER_LAKE_XHCI 0x461e
62+#define PCI_DEVICE_ID_INTEL_ALDER_LAKE_PCH_XHCI 0x51ed
6263
6364 #define PCI_DEVICE_ID_AMD_RENOIR_XHCI 0x1639
6465 #define PCI_DEVICE_ID_AMD_PROMONTORYA_4 0x43b9
@@ -266,7 +267,8 @@ static void xhci_pci_quirks(struct device *dev, struct xhci_hcd *xhci) · 201 unmodified lines
266267 pdev->device == PCI_DEVICE_ID_INTEL_ICE_LAKE_XHCI ||
267268 pdev->device == PCI_DEVICE_ID_INTEL_TIGER_LAKE_XHCI ||
268269 pdev->device == PCI_DEVICE_ID_INTEL_MAPLE_RIDGE_XHCI ||
269− pdev->device == PCI_DEVICE_ID_INTEL_ALDER_LAKE_XHCI))
270+ pdev->device == PCI_DEVICE_ID_INTEL_ALDER_LAKE_XHCI ||
271+ pdev->device == PCI_DEVICE_ID_INTEL_ALDER_LAKE_PCH_XHCI))
270272 xhci->quirks |= XHCI_DEFAULT_PM_RUNTIME_ALLOW;
271273
272274 if (pdev->vendor == PCI_VENDOR_ID_ETRON &&
drivers/usb/host/xhci-ring.c+1−0
@@ -3141,6 +3141,7 @@ irqreturn_t xhci_irq(struct usb_hcd *hcd) · 3140 unmodified lines
31413141 if (event_loop++ < TRBS_PER_SEGMENT / 2)
31423142 continue;
31433143 xhci_update_erst_dequeue(xhci, event_ring_deq);
3144+ event_ring_deq = xhci->event_ring->dequeue;
31443145
31453146 /* ring is half-full, force isoc trbs to interrupt more often */
31463147 if (xhci->isoc_bei_interval > AVOID_BEI_INTERVAL_MIN)
drivers/usb/host/xhci-tegra.c+2−2
@@ -1034,13 +1034,13 @@ static int tegra_xusb_unpowergate_partitions(struct tegra_xusb *tegra) · 1033 unmodified lines
10341034 int rc;
10351035
10361036 if (tegra->use_genpd) {
1037− rc = pm_runtime_get_sync(tegra->genpd_dev_ss);
1037+ rc = pm_runtime_resume_and_get(tegra->genpd_dev_ss);
10381038 if (rc < 0) {
10391039 dev_err(dev, "failed to enable XUSB SS partition\n");
10401040 return rc;
10411041 }
10421042
1043− rc = pm_runtime_get_sync(tegra->genpd_dev_host);
1043+ rc = pm_runtime_resume_and_get(tegra->genpd_dev_host);
10441044 if (rc < 0) {
10451045 dev_err(dev, "failed to enable XUSB Host partition\n");
10461046 pm_runtime_put_sync(tegra->genpd_dev_ss);
drivers/usb/host/xhci.c+11−0
@@ -781,6 +781,17 @@ void xhci_shutdown(struct usb_hcd *hcd) · 780 unmodified lines
781781 if (xhci->quirks & XHCI_SPURIOUS_REBOOT)
782782 usb_disable_xhci_ports(to_pci_dev(hcd->self.sysdev));
783783
784+ /* Don't poll the roothubs after shutdown. */
785+ xhci_dbg(xhci, "%s: stopping usb%d port polling.\n",
786+ __func__, hcd->self.busnum);
787+ clear_bit(HCD_FLAG_POLL_RH, &hcd->flags);
788+ del_timer_sync(&hcd->rh_timer);
789+
790+ if (xhci->shared_hcd) {
791+ clear_bit(HCD_FLAG_POLL_RH, &xhci->shared_hcd->flags);
792+ del_timer_sync(&xhci->shared_hcd->rh_timer);
793+ }
794+
784795 spin_lock_irq(&xhci->lock);
785796 xhci_halt(xhci);
786797 /* Workaround for spurious wakeups at shutdown with HSW */
drivers/usb/misc/qcom_eud.c+5−5
@@ -186,16 +186,16 @@ static int eud_probe(struct platform_device *pdev) · 185 unmodified lines
186186
187187 chip->dev = &pdev->dev;
188188
189− ret = devm_add_action_or_reset(chip->dev, eud_role_switch_release, chip);
190− if (ret)
191− return dev_err_probe(chip->dev, ret,
192− "failed to add role switch release action\n");
193−
194189 chip->role_sw = usb_role_switch_get(&pdev->dev);
195190 if (IS_ERR(chip->role_sw))
196191 return dev_err_probe(chip->dev, PTR_ERR(chip->role_sw),
197192 "failed to get role switch\n");
198193
194+ ret = devm_add_action_or_reset(chip->dev, eud_role_switch_release, chip);
195+ if (ret)
196+ return dev_err_probe(chip->dev, ret,
197+ "failed to add role switch release action\n");
198+
199199 chip->base = devm_platform_ioremap_resource(pdev, 0);
200200 if (IS_ERR(chip->base))
201201 return PTR_ERR(chip->base);
drivers/usb/misc/uss720.c+1−2
@@ -71,6 +71,7 @@ static void destroy_priv(struct kref *kref) · 70 unmodified lines
7171
7272 dev_dbg(&priv->usbdev->dev, "destroying priv datastructure\n");
7373 usb_put_dev(priv->usbdev);
74+ priv->usbdev = NULL;
7475 kfree(priv);
7576 }
7677
@@ -736,7 +737,6 @@ static int uss720_probe(struct usb_interface *intf, · 659 unmodified lines
736737 parport_announce_port(pp);
737738
738739 usb_set_intfdata(intf, pp);
739− usb_put_dev(usbdev);
740740 return 0;
741741
742742 probe_abort:
@@ -754,7 +754,6 @@ static void uss720_disconnect(struct usb_interface *intf) · 11 unmodified lines
754754 usb_set_intfdata(intf, NULL);
755755 if (pp) {
756756 priv = pp->private_data;
757− priv->usbdev = NULL;
758757 priv->pp = NULL;
759758 dev_dbg(&intf->dev, "parport_remove_port\n");
760759 parport_remove_port(pp);
drivers/usb/mtu3/mtu3_dr.c+2−4
@@ -21,10 +21,8 @@ static inline struct ssusb_mtk *otg_sx_to_ssusb(struct otg_switch_mtk *otg_sx) · 20 unmodified lines
2121
2222 static void toggle_opstate(struct ssusb_mtk *ssusb)
2323 {
24− if (!ssusb->otg_switch.is_u3_drd) {
25− mtu3_setbits(ssusb->mac_base, U3D_DEVICE_CONTROL, DC_SESSION);
26− mtu3_setbits(ssusb->mac_base, U3D_POWER_MANAGEMENT, SOFT_CONN);
27− }
24+ mtu3_setbits(ssusb->mac_base, U3D_DEVICE_CONTROL, DC_SESSION);
25+ mtu3_setbits(ssusb->mac_base, U3D_POWER_MANAGEMENT, SOFT_CONN);
2826 }
2927
3028 /* only port0 supports dual-role mode */
drivers/usb/phy/phy-generic.c+7−0
@@ -268,6 +268,13 @@ int usb_phy_gen_create_phy(struct device *dev, struct usb_phy_generic *nop) · 267 unmodified lines
268268 return -EPROBE_DEFER;
269269 }
270270
271+ nop->vbus_draw = devm_regulator_get_exclusive(dev, "vbus");
272+ if (PTR_ERR(nop->vbus_draw) == -ENODEV)
273+ nop->vbus_draw = NULL;
274+ if (IS_ERR(nop->vbus_draw))
275+ return dev_err_probe(dev, PTR_ERR(nop->vbus_draw),
276+ "could not get vbus regulator\n");
277+
271278 nop->dev = dev;
272279 nop->phy.dev = nop->dev;
273280 nop->phy.label = "nop-xceiv";
drivers/usb/serial/cp210x.c+2−0
@@ -194,6 +194,8 @@ static const struct usb_device_id id_table[] = { · 193 unmodified lines
194194 { USB_DEVICE(0x16DC, 0x0015) }, /* W-IE-NE-R Plein & Baus GmbH CML Control, Monitoring and Data Logger */
195195 { USB_DEVICE(0x17A8, 0x0001) }, /* Kamstrup Optical Eye/3-wire */
196196 { USB_DEVICE(0x17A8, 0x0005) }, /* Kamstrup M-Bus Master MultiPort 250D */
197+ { USB_DEVICE(0x17A8, 0x0101) }, /* Kamstrup 868 MHz wM-Bus C-Mode Meter Reader (Int Ant) */
198+ { USB_DEVICE(0x17A8, 0x0102) }, /* Kamstrup 868 MHz wM-Bus C-Mode Meter Reader (Ext Ant) */
197199 { USB_DEVICE(0x17F4, 0xAAAA) }, /* Wavesense Jazz blood glucose meter */
198200 { USB_DEVICE(0x1843, 0x0200) }, /* Vaisala USB Instrument Cable */
199201 { USB_DEVICE(0x18EF, 0xE00F) }, /* ELV USB-I2C-Interface */
drivers/usb/serial/option.c+16−0
@@ -432,6 +432,8 @@ static void option_instat_callback(struct urb *urb); · 431 unmodified lines
432432 #define CINTERION_PRODUCT_CLS8 0x00b0
433433 #define CINTERION_PRODUCT_MV31_MBIM 0x00b3
434434 #define CINTERION_PRODUCT_MV31_RMNET 0x00b7
435+#define CINTERION_PRODUCT_MV32_WA 0x00f1
436+#define CINTERION_PRODUCT_MV32_WB 0x00f2
435437
436438 /* Olivetti products */
437439 #define OLIVETTI_VENDOR_ID 0x0b3c
@@ -1217,6 +1219,10 @@ static const struct usb_device_id option_ids[] = { · 779 unmodified lines
12171219 .driver_info = NCTRL(0) | RSVD(1) },
12181220 { USB_DEVICE_INTERFACE_CLASS(TELIT_VENDOR_ID, 0x1056, 0xff), /* Telit FD980 */
12191221 .driver_info = NCTRL(2) | RSVD(3) },
1222+ { USB_DEVICE_INTERFACE_CLASS(TELIT_VENDOR_ID, 0x1057, 0xff), /* Telit FN980 */
1223+ .driver_info = NCTRL(0) | RSVD(1) | RSVD(2) },
1224+ { USB_DEVICE_INTERFACE_CLASS(TELIT_VENDOR_ID, 0x1058, 0xff), /* Telit FN980 (PCIe) */
1225+ .driver_info = NCTRL(0) | RSVD(1) },
12201226 { USB_DEVICE_INTERFACE_CLASS(TELIT_VENDOR_ID, 0x1060, 0xff), /* Telit LN920 (rmnet) */
12211227 .driver_info = NCTRL(0) | RSVD(1) | RSVD(2) },
12221228 { USB_DEVICE_INTERFACE_CLASS(TELIT_VENDOR_ID, 0x1061, 0xff), /* Telit LN920 (MBIM) */
@@ -1233,6 +1239,8 @@ static const struct usb_device_id option_ids[] = { · 10 unmodified lines
12331239 .driver_info = NCTRL(2) | RSVD(3) },
12341240 { USB_DEVICE_INTERFACE_CLASS(TELIT_VENDOR_ID, 0x1073, 0xff), /* Telit FN990 (ECM) */
12351241 .driver_info = NCTRL(0) | RSVD(1) },
1242+ { USB_DEVICE_INTERFACE_CLASS(TELIT_VENDOR_ID, 0x1075, 0xff), /* Telit FN990 (PCIe) */
1243+ .driver_info = RSVD(0) },
12361244 { USB_DEVICE(TELIT_VENDOR_ID, TELIT_PRODUCT_ME910),
12371245 .driver_info = NCTRL(0) | RSVD(1) | RSVD(3) },
12381246 { USB_DEVICE(TELIT_VENDOR_ID, TELIT_PRODUCT_ME910_DUAL_MODEM),
@@ -1969,6 +1977,10 @@ static const struct usb_device_id option_ids[] = { · 730 unmodified lines
19691977 .driver_info = RSVD(3)},
19701978 { USB_DEVICE_INTERFACE_CLASS(CINTERION_VENDOR_ID, CINTERION_PRODUCT_MV31_RMNET, 0xff),
19711979 .driver_info = RSVD(0)},
1980+ { USB_DEVICE_INTERFACE_CLASS(CINTERION_VENDOR_ID, CINTERION_PRODUCT_MV32_WA, 0xff),
1981+ .driver_info = RSVD(3)},
1982+ { USB_DEVICE_INTERFACE_CLASS(CINTERION_VENDOR_ID, CINTERION_PRODUCT_MV32_WB, 0xff),
1983+ .driver_info = RSVD(3)},
19721984 { USB_DEVICE(OLIVETTI_VENDOR_ID, OLIVETTI_PRODUCT_OLICARD100),
19731985 .driver_info = RSVD(4) },
19741986 { USB_DEVICE(OLIVETTI_VENDOR_ID, OLIVETTI_PRODUCT_OLICARD120),
@@ -2111,10 +2123,14 @@ static const struct usb_device_id option_ids[] = { · 136 unmodified lines
21112123 .driver_info = RSVD(3) },
21122124 { USB_DEVICE(0x1508, 0x1001), /* Fibocom NL668 (IOT version) */
21132125 .driver_info = RSVD(4) | RSVD(5) | RSVD(6) },
2126+ { USB_DEVICE(0x1782, 0x4d10) }, /* Fibocom L610 (AT mode) */
2127+ { USB_DEVICE_INTERFACE_CLASS(0x1782, 0x4d11, 0xff) }, /* Fibocom L610 (ECM/RNDIS mode) */
21142128 { USB_DEVICE(0x2cb7, 0x0104), /* Fibocom NL678 series */
21152129 .driver_info = RSVD(4) | RSVD(5) },
21162130 { USB_DEVICE_INTERFACE_CLASS(0x2cb7, 0x0105, 0xff), /* Fibocom NL678 series */
21172131 .driver_info = RSVD(6) },
2132+ { USB_DEVICE_INTERFACE_CLASS(0x2cb7, 0x0106, 0xff) }, /* Fibocom MA510 (ECM mode w/ diag intf.) */
2133+ { USB_DEVICE_INTERFACE_CLASS(0x2cb7, 0x010a, 0xff) }, /* Fibocom MA510 (ECM mode) */
21182134 { USB_DEVICE_AND_INTERFACE_INFO(0x2cb7, 0x010b, 0xff, 0xff, 0x30) }, /* Fibocom FG150 Diag */
21192135 { USB_DEVICE_AND_INTERFACE_INFO(0x2cb7, 0x010b, 0xff, 0, 0) }, /* Fibocom FG150 AT */
21202136 { USB_DEVICE_INTERFACE_CLASS(0x2cb7, 0x01a0, 0xff) }, /* Fibocom NL668-AM/NL652-EU (laptop MBIM) */
drivers/usb/serial/pl2303.c+1−0
@@ -106,6 +106,7 @@ static const struct usb_device_id id_table[] = { · 105 unmodified lines
106106 { USB_DEVICE(HP_VENDOR_ID, HP_LCM220_PRODUCT_ID) },
107107 { USB_DEVICE(HP_VENDOR_ID, HP_LCM960_PRODUCT_ID) },
108108 { USB_DEVICE(HP_VENDOR_ID, HP_LM920_PRODUCT_ID) },
109+ { USB_DEVICE(HP_VENDOR_ID, HP_LM930_PRODUCT_ID) },
109110 { USB_DEVICE(HP_VENDOR_ID, HP_LM940_PRODUCT_ID) },
110111 { USB_DEVICE(HP_VENDOR_ID, HP_TD620_PRODUCT_ID) },
111112 { USB_DEVICE(CRESSI_VENDOR_ID, CRESSI_EDY_PRODUCT_ID) },
drivers/usb/serial/pl2303.h+1−0
@@ -135,6 +135,7 @@ · 134 unmodified lines
135135 #define HP_TD620_PRODUCT_ID 0x0956
136136 #define HP_LD960_PRODUCT_ID 0x0b39
137137 #define HP_LD381_PRODUCT_ID 0x0f7f
138+#define HP_LM930_PRODUCT_ID 0x0f9b
138139 #define HP_LCM220_PRODUCT_ID 0x3139
139140 #define HP_LCM960_PRODUCT_ID 0x3239
140141 #define HP_LD220_PRODUCT_ID 0x3524
drivers/usb/serial/qcserial.c+2−0
@@ -166,6 +166,8 @@ static const struct usb_device_id id_table[] = { · 165 unmodified lines
166166 {DEVICE_SWI(0x1199, 0x9090)}, /* Sierra Wireless EM7565 QDL */
167167 {DEVICE_SWI(0x1199, 0x9091)}, /* Sierra Wireless EM7565 */
168168 {DEVICE_SWI(0x1199, 0x90d2)}, /* Sierra Wireless EM9191 QDL */
169+ {DEVICE_SWI(0x1199, 0xc080)}, /* Sierra Wireless EM7590 QDL */
170+ {DEVICE_SWI(0x1199, 0xc081)}, /* Sierra Wireless EM7590 */
169171 {DEVICE_SWI(0x413c, 0x81a2)}, /* Dell Wireless 5806 Gobi(TM) 4G LTE Mobile Broadband Card */
170172 {DEVICE_SWI(0x413c, 0x81a3)}, /* Dell Wireless 5570 HSPA+ (42Mbps) Mobile Broadband Card */
171173 {DEVICE_SWI(0x413c, 0x81a4)}, /* Dell Wireless 5570e HSPA+ (42Mbps) Mobile Broadband Card */
drivers/usb/serial/whiteheat.c+2−3
@@ -584,9 +584,8 @@ static int firm_send_command(struct usb_serial_port *port, __u8 command, · 583 unmodified lines
584584 switch (command) {
585585 case WHITEHEAT_GET_DTR_RTS:
586586 info = usb_get_serial_port_data(port);
587− memcpy(&info->mcr, command_info->result_buffer,
588− sizeof(struct whiteheat_dr_info));
589− break;
587+ info->mcr = command_info->result_buffer[0];
588+ break;
590589 }
591590 }
592591 exit:
drivers/usb/typec/Kconfig+1−0
@@ -56,6 +56,7 @@ config TYPEC_RT1719 · 55 unmodified lines
5656 tristate "Richtek RT1719 Sink Only Type-C controller driver"
5757 depends on USB_ROLE_SWITCH || !USB_ROLE_SWITCH
5858 depends on I2C
59+ depends on POWER_SUPPLY
5960 select REGMAP_I2C
6061 help
6162 Say Y or M here if your system has Richtek RT1719 sink only
drivers/usb/typec/tcpm/tcpci.c+1−1
@@ -877,7 +877,7 @@ static int tcpci_remove(struct i2c_client *client) · 876 unmodified lines
877877 /* Disable chip interrupts before unregistering port */
878878 err = tcpci_write16(chip->tcpci, TCPC_ALERT_MASK, 0);
879879 if (err < 0)
880− return err;
880+ dev_warn(&client->dev, "Failed to disable irqs (%pe)\n", ERR_PTR(err));
881881
882882 tcpci_unregister_port(chip->tcpci);
883883
drivers/usb/typec/tcpm/tcpci_mt6360.c+26−0
@@ -15,6 +15,9 @@ · 14 unmodified lines
1515
1616 #include "tcpci.h"
1717
18+#define MT6360_REG_PHYCTRL1 0x80
19+#define MT6360_REG_PHYCTRL3 0x82
20+#define MT6360_REG_PHYCTRL7 0x86
1821 #define MT6360_REG_VCONNCTRL1 0x8C
1922 #define MT6360_REG_MODECTRL2 0x8F
2023 #define MT6360_REG_SWRESET 0xA0
@@ -22,6 +25,8 @@ · 1 unmodified line
2225 #define MT6360_REG_DRPCTRL1 0xA2
2326 #define MT6360_REG_DRPCTRL2 0xA3
2427 #define MT6360_REG_I2CTORST 0xBF
28+#define MT6360_REG_PHYCTRL11 0xCA
29+#define MT6360_REG_RXCTRL1 0xCE
2530 #define MT6360_REG_RXCTRL2 0xCF
2631 #define MT6360_REG_CTDCTRL2 0xEC
2732
@@ -106,6 +111,27 @@ static int mt6360_tcpc_init(struct tcpci *tcpci, struct tcpci_data *tdata) · 78 unmodified lines
106111 if (ret)
107112 return ret;
108113
114+ /* BMC PHY */
115+ ret = mt6360_tcpc_write16(regmap, MT6360_REG_PHYCTRL1, 0x3A70);
116+ if (ret)
117+ return ret;
118+
119+ ret = regmap_write(regmap, MT6360_REG_PHYCTRL3, 0x82);
120+ if (ret)
121+ return ret;
122+
123+ ret = regmap_write(regmap, MT6360_REG_PHYCTRL7, 0x36);
124+ if (ret)
125+ return ret;
126+
127+ ret = mt6360_tcpc_write16(regmap, MT6360_REG_PHYCTRL11, 0x3C60);
128+ if (ret)
129+ return ret;
130+
131+ ret = regmap_write(regmap, MT6360_REG_RXCTRL1, 0xE8);
132+ if (ret)
133+ return ret;
134+
109135 /* Set shipping mode off, AUTOIDLE on */
110136 return regmap_write(regmap, MT6360_REG_MODECTRL2, 0x7A);
111137 }
drivers/usb/typec/ucsi/ucsi.c+17−7
@@ -949,6 +949,8 @@ static int ucsi_dr_swap(struct typec_port *port, enum typec_data_role role) · 948 unmodified lines
949949 role == TYPEC_HOST))
950950 goto out_unlock;
951951
952+ reinit_completion(&con->complete);
953+
952954 command = UCSI_SET_UOR | UCSI_CONNECTOR_NUMBER(con->num);
953955 command |= UCSI_SET_UOR_ROLE(role);
954956 command |= UCSI_SET_UOR_ACCEPT_ROLE_SWAPS;
@@ -956,14 +958,18 @@ static int ucsi_dr_swap(struct typec_port *port, enum typec_data_role role) · 1 unmodified line
956958 if (ret < 0)
957959 goto out_unlock;
958960
961+ mutex_unlock(&con->lock);
962+
959963 if (!wait_for_completion_timeout(&con->complete,
960− msecs_to_jiffies(UCSI_SWAP_TIMEOUT_MS)))
961− ret = -ETIMEDOUT;
964+ msecs_to_jiffies(UCSI_SWAP_TIMEOUT_MS)))
965+ return -ETIMEDOUT;
966+
967+ return 0;
962968
963969 out_unlock:
964970 mutex_unlock(&con->lock);
965971
966− return ret < 0 ? ret : 0;
972+ return ret;
967973 }
968974
969975 static int ucsi_pr_swap(struct typec_port *port, enum typec_role role)
@@ -985,6 +991,8 @@ static int ucsi_pr_swap(struct typec_port *port, enum typec_role role) · 15 unmodified lines
985991 if (cur_role == role)
986992 goto out_unlock;
987993
994+ reinit_completion(&con->complete);
995+
988996 command = UCSI_SET_PDR | UCSI_CONNECTOR_NUMBER(con->num);
989997 command |= UCSI_SET_PDR_ROLE(role);
990998 command |= UCSI_SET_PDR_ACCEPT_ROLE_SWAPS;
@@ -992,11 +1000,13 @@ static int ucsi_pr_swap(struct typec_port *port, enum typec_role role) · 1 unmodified line
9921000 if (ret < 0)
9931001 goto out_unlock;
9941002
1003+ mutex_unlock(&con->lock);
1004+
9951005 if (!wait_for_completion_timeout(&con->complete,
996− msecs_to_jiffies(UCSI_SWAP_TIMEOUT_MS))) {
997− ret = -ETIMEDOUT;
998− goto out_unlock;
999− }
1006+ msecs_to_jiffies(UCSI_SWAP_TIMEOUT_MS)))
1007+ return -ETIMEDOUT;
1008+
1009+ mutex_lock(&con->lock);
10001010
10011011 /* Something has gone wrong while swapping the role */
10021012 if (UCSI_CONSTAT_PWR_OPMODE(con->status.flags) !=
drivers/vfio/fsl-mc/vfio_fsl_mc.c+1−0
@@ -588,6 +588,7 @@ static struct fsl_mc_driver vfio_fsl_mc_driver = { · 587 unmodified lines
588588 .name = "vfio-fsl-mc",
589589 .owner = THIS_MODULE,
590590 },
591+ .driver_managed_dma = true,
591592 };
592593
593594 static int __init vfio_fsl_mc_driver_init(void)
drivers/vfio/pci/vfio_pci.c+1−0
@@ -194,6 +194,7 @@ static struct pci_driver vfio_pci_driver = { · 193 unmodified lines
194194 .remove = vfio_pci_remove,
195195 .sriov_configure = vfio_pci_sriov_configure,
196196 .err_handler = &vfio_pci_core_err_handlers,
197+ .driver_managed_dma = true,
197198 };
198199
199200 static void __init vfio_pci_fill_ids(void)
drivers/vfio/platform/vfio_amba.c+1−0
@@ -95,6 +95,7 @@ static struct amba_driver vfio_amba_driver = { · 94 unmodified lines
9595 .name = "vfio-amba",
9696 .owner = THIS_MODULE,
9797 },
98+ .driver_managed_dma = true,
9899 };
99100
100101 module_amba_driver(vfio_amba_driver);
drivers/vfio/platform/vfio_platform.c+1−0
@@ -76,6 +76,7 @@ static struct platform_driver vfio_platform_driver = { · 75 unmodified lines
7676 .driver = {
7777 .name = "vfio-platform",
7878 },
79+ .driver_managed_dma = true,
7980 };
8081
8182 module_platform_driver(vfio_platform_driver);
drivers/vfio/vfio.c+22−230
@@ -62,11 +62,6 @@ struct vfio_container { · 61 unmodified lines
6262 bool noiommu;
6363 };
6464
65−struct vfio_unbound_dev {
66− struct device *dev;
67− struct list_head unbound_next;
68−};
69−
7065 struct vfio_group {
7166 struct device dev;
7267 struct cdev cdev;
@@ -76,11 +71,8 @@ struct vfio_group { · 3 unmodified lines
7671 struct vfio_container *container;
7772 struct list_head device_list;
7873 struct mutex device_lock;
79− struct notifier_block nb;
8074 struct list_head vfio_next;
8175 struct list_head container_next;
82− struct list_head unbound_list;
83− struct mutex unbound_lock;
8476 atomic_t opened;
8577 wait_queue_head_t container_q;
8678 enum vfio_group_type type;
@@ -281,8 +273,6 @@ void vfio_unregister_iommu_driver(const struct vfio_iommu_driver_ops *ops) · 194 unmodified lines
281273 }
282274 EXPORT_SYMBOL_GPL(vfio_unregister_iommu_driver);
283275
284−static int vfio_iommu_group_notifier(struct notifier_block *nb,
285− unsigned long action, void *data);
286276 static void vfio_group_get(struct vfio_group *group);
287277
288278 /*
@@ -340,16 +330,8 @@ vfio_group_get_from_iommu(struct iommu_group *iommu_group) · 51 unmodified lines
340330 static void vfio_group_release(struct device *dev)
341331 {
342332 struct vfio_group *group = container_of(dev, struct vfio_group, dev);
343− struct vfio_unbound_dev *unbound, *tmp;
344−

347 more lines aren’t shown here.

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