History

Merge tag 'gpio-updates-for-v5.9-part1' of git://git.kernel.org/pub/scm/linux/kernel/git/brgl/linux into devel

gpio updates for v5.9 - use kobj_to_dev() in sysfs interface - kerneldoc and documentation fixes - relax the interrupt flags in gpio-mpc8xxx - support new model in gpio-pca953x - remove a redundant check from gpio-max732x - support a new platform in gpio-zynq (+ some minor fixes) - don't depend on GPIOLIB when already inside the "if GPIOLIB" in Kconfig - support PM ops for suspend in gpio-omap - minor tweaks in gpiolib

Linus Walleij committed 6 years ago

Commit b239e442 parents 84651e8 ae66eca11 files · +106 −15Browse files

Unified · Split

11 files
  1. Documentation/devicetree/bindings/gpio/gpio-pca953x.txt +1 −0
  2. Documentation/devicetree/bindings/gpio/gpio-zynq.txt +3 −1
  3. drivers/gpio/Kconfig +2 −2
  4. drivers/gpio/TODO +1 −1
  5. drivers/gpio/gpio-mpc8xxx.c +1 −1
  6. drivers/gpio/gpio-omap.c +26 −0
  7. drivers/gpio/gpio-pca953x.c +2 −0
  8. drivers/gpio/gpio-zynq.c +64 −2
  9. drivers/gpio/gpiolib-sysfs.c +1 −1
  10. drivers/gpio/gpiolib.c +4 −6
  11. include/linux/gpio/driver.h +1 −1
Documentation/devicetree/bindings/gpio/gpio-pca953x.txt+1−0
@@ -19,6 +19,7 @@ Required properties: · 18 unmodified lines
1919 nxp,pca9698
2020 nxp,pcal6416
2121 nxp,pcal6524
22+ nxp,pcal9535
2223 nxp,pcal9555a
2324 maxim,max7310
2425 maxim,max7312
Documentation/devicetree/bindings/gpio/gpio-zynq.txt+3−1
@@ -6,7 +6,9 @@ Required properties: · 5 unmodified lines
66 - First cell is the GPIO line number
77 - Second cell is used to specify optional
88 parameters (unused)
9−- compatible : Should be "xlnx,zynq-gpio-1.0" or "xlnx,zynqmp-gpio-1.0"
9+- compatible : Should be "xlnx,zynq-gpio-1.0" or
10+ "xlnx,zynqmp-gpio-1.0" or "xlnx,versal-gpio-1.0
11+ or "xlnx,pmc-gpio-1.0
1012 - clocks : Clock specifier (see clock bindings for details)
1113 - gpio-controller : Marks the device node as a GPIO controller.
1214 - interrupts : Interrupt specifier (see interrupt bindings for
drivers/gpio/Kconfig+2−2
@@ -410,7 +410,7 @@ config GPIO_MXS · 409 unmodified lines
410410
411411 config GPIO_OCTEON
412412 tristate "Cavium OCTEON GPIO"
413− depends on GPIOLIB && CAVIUM_OCTEON_SOC
413+ depends on CAVIUM_OCTEON_SOC
414414 default y
415415 help
416416 Say yes here to support the on-chip GPIO lines on the OCTEON
@@ -1117,7 +1117,7 @@ config GPIO_DLN2 · 700 unmodified lines
11171117
11181118 config HTC_EGPIO
11191119 bool "HTC EGPIO support"
1120− depends on GPIOLIB && ARM
1120+ depends on ARM
11211121 help
11221122 This driver supports the CPLD egpio chip present on
11231123 several HTC phones. It provides basic support for input
drivers/gpio/TODO+1−1
@@ -5,7 +5,7 @@ subsystem. · 4 unmodified lines
55 GPIO descriptors
66
77 Starting with commit 79a9becda894 the GPIO subsystem embarked on a journey
8−to move away from the global GPIO numberspace and toward a decriptor-based
8+to move away from the global GPIO numberspace and toward a descriptor-based
99 approach. This means that GPIO consumers, drivers and machine descriptions
1010 ideally have no use or idea of the global GPIO numberspace that has/was
1111 used in the inception of the GPIO subsystem.
drivers/gpio/gpio-mpc8xxx.c+1−1
@@ -417,7 +417,7 @@ static int mpc8xxx_probe(struct platform_device *pdev) · 416 unmodified lines
417417
418418 ret = devm_request_irq(&pdev->dev, mpc8xxx_gc->irqn,
419419 mpc8xxx_gpio_irq_cascade,
420− IRQF_NO_THREAD | IRQF_SHARED, "gpio-cascade",
420+ IRQF_SHARED, "gpio-cascade",
421421 mpc8xxx_gc);
422422 if (ret) {
423423 dev_err(&pdev->dev, "%s: failed to devm_request_irq(%d), ret = %d\n",
drivers/gpio/gpio-omap.c+26−0
@@ -60,6 +60,7 @@ struct gpio_bank { · 59 unmodified lines
6060 struct clk *dbck;
6161 struct notifier_block nb;
6262 unsigned int is_suspended:1;
63+ unsigned int needs_resume:1;
6364 u32 mod_usage;
6465 u32 irq_usage;
6566 u32 dbck_enable_mask;
@@ -1504,9 +1505,34 @@ static int __maybe_unused omap_gpio_runtime_resume(struct device *dev) · 1438 unmodified lines
15041505 return 0;
15051506 }
15061507
1508+static int omap_gpio_suspend(struct device *dev)
1509+{
1510+ struct gpio_bank *bank = dev_get_drvdata(dev);
1511+
1512+ if (bank->is_suspended)
1513+ return 0;
1514+
1515+ bank->needs_resume = 1;
1516+
1517+ return omap_gpio_runtime_suspend(dev);
1518+}
1519+
1520+static int omap_gpio_resume(struct device *dev)
1521+{
1522+ struct gpio_bank *bank = dev_get_drvdata(dev);
1523+
1524+ if (!bank->needs_resume)
1525+ return 0;
1526+
1527+ bank->needs_resume = 0;
1528+
1529+ return omap_gpio_runtime_resume(dev);
1530+}
1531+
15071532 static const struct dev_pm_ops gpio_pm_ops = {
15081533 SET_RUNTIME_PM_OPS(omap_gpio_runtime_suspend, omap_gpio_runtime_resume,
15091534 NULL)
1535+ SET_LATE_SYSTEM_SLEEP_PM_OPS(omap_gpio_suspend, omap_gpio_resume)
15101536 };
15111537
15121538 static struct platform_driver omap_gpio_driver = {
drivers/gpio/gpio-pca953x.c+2−0
@@ -89,6 +89,7 @@ static const struct i2c_device_id pca953x_id[] = { · 88 unmodified lines
8989
9090 { "pcal6416", 16 | PCA953X_TYPE | PCA_LATCH_INT, },
9191 { "pcal6524", 24 | PCA953X_TYPE | PCA_LATCH_INT, },
92+ { "pcal9535", 16 | PCA953X_TYPE | PCA_LATCH_INT, },
9293 { "pcal9555a", 16 | PCA953X_TYPE | PCA_LATCH_INT, },
9394
9495 { "max7310", 8 | PCA953X_TYPE, },
@@ -1145,6 +1146,7 @@ static const struct of_device_id pca953x_dt_ids[] = { · 1050 unmodified lines
11451146
11461147 { .compatible = "nxp,pcal6416", .data = OF_953X(16, PCA_LATCH_INT), },
11471148 { .compatible = "nxp,pcal6524", .data = OF_953X(24, PCA_LATCH_INT), },
1149+ { .compatible = "nxp,pcal9535", .data = OF_953X(16, PCA_LATCH_INT), },
11481150 { .compatible = "nxp,pcal9555a", .data = OF_953X(16, PCA_LATCH_INT), },
11491151
11501152 { .compatible = "maxim,max7310", .data = OF_953X( 8, 0), },
drivers/gpio/gpio-zynq.c+64−2
@@ -10,6 +10,7 @@ · 9 unmodified lines
1010 #include <linux/gpio/driver.h>
1111 #include <linux/init.h>
1212 #include <linux/interrupt.h>
13+#include <linux/spinlock.h>
1314 #include <linux/io.h>
1415 #include <linux/module.h>
1516 #include <linux/platform_device.h>
@@ -21,6 +22,9 @@ · 5 unmodified lines
2122 /* Maximum banks */
2223 #define ZYNQ_GPIO_MAX_BANK 4
2324 #define ZYNQMP_GPIO_MAX_BANK 6
25+#define VERSAL_GPIO_MAX_BANK 4
26+#define PMC_GPIO_MAX_BANK 5
27+#define VERSAL_UNUSED_BANKS 2
2428
2529 #define ZYNQ_GPIO_BANK0_NGPIO 32
2630 #define ZYNQ_GPIO_BANK1_NGPIO 22
@@ -95,6 +99,7 @@ · 68 unmodified lines
9599 /* set to differentiate zynq from zynqmp, 0=zynqmp, 1=zynq */
96100 #define ZYNQ_GPIO_QUIRK_IS_ZYNQ BIT(0)
97101 #define GPIO_QUIRK_DATA_RO_BUG BIT(1)
102+#define GPIO_QUIRK_VERSAL BIT(2)
98103
99104 struct gpio_regs {
100105 u32 datamsw[ZYNQMP_GPIO_MAX_BANK];
@@ -116,6 +121,7 @@ struct gpio_regs { · 15 unmodified lines
116121 * @irq: interrupt for the GPIO device
117122 * @p_data: pointer to platform data
118123 * @context: context registers
124+ * @dirlock: lock used for direction in/out synchronization
119125 */
120126 struct zynq_gpio {
121127 struct gpio_chip chip;
@@ -124,6 +130,7 @@ struct zynq_gpio { · 2 unmodified lines
124130 int irq;
125131 const struct zynq_platform_data *p_data;
126132 struct gpio_regs context;
133+ spinlock_t dirlock; /* lock */
127134 };
128135
129136 /**
@@ -196,6 +203,8 @@ static inline void zynq_gpio_get_bank_pin(unsigned int pin_num, · 66 unmodified lines
196203 gpio->p_data->bank_min[bank];
197204 return;
198205 }
206+ if (gpio->p_data->quirks & GPIO_QUIRK_VERSAL)
207+ bank = bank + VERSAL_UNUSED_BANKS;
199208 }
200209
201210 /* default */
@@ -297,6 +306,7 @@ static int zynq_gpio_dir_in(struct gpio_chip *chip, unsigned int pin) · 95 unmodified lines
297306 {
298307 u32 reg;
299308 unsigned int bank_num, bank_pin_num;
309+ unsigned long flags;
300310 struct zynq_gpio *gpio = gpiochip_get_data(chip);
301311
302312 zynq_gpio_get_bank_pin(pin, &bank_num, &bank_pin_num, gpio);
@@ -310,9 +320,11 @@ static int zynq_gpio_dir_in(struct gpio_chip *chip, unsigned int pin) · 7 unmodified lines
310320 return -EINVAL;
311321
312322 /* clear the bit in direction mode reg to set the pin as input */
323+ spin_lock_irqsave(&gpio->dirlock, flags);
313324 reg = readl_relaxed(gpio->base_addr + ZYNQ_GPIO_DIRM_OFFSET(bank_num));
314325 reg &= ~BIT(bank_pin_num);
315326 writel_relaxed(reg, gpio->base_addr + ZYNQ_GPIO_DIRM_OFFSET(bank_num));
327+ spin_unlock_irqrestore(&gpio->dirlock, flags);
316328
317329 return 0;
318330 }
@@ -334,11 +346,13 @@ static int zynq_gpio_dir_out(struct gpio_chip *chip, unsigned int pin, · 15 unmodified lines
334346 {
335347 u32 reg;
336348 unsigned int bank_num, bank_pin_num;
349+ unsigned long flags;
337350 struct zynq_gpio *gpio = gpiochip_get_data(chip);
338351
339352 zynq_gpio_get_bank_pin(pin, &bank_num, &bank_pin_num, gpio);
340353
341354 /* set the GPIO pin as output */
355+ spin_lock_irqsave(&gpio->dirlock, flags);
342356 reg = readl_relaxed(gpio->base_addr + ZYNQ_GPIO_DIRM_OFFSET(bank_num));
343357 reg |= BIT(bank_pin_num);
344358 writel_relaxed(reg, gpio->base_addr + ZYNQ_GPIO_DIRM_OFFSET(bank_num));
@@ -347,6 +361,7 @@ static int zynq_gpio_dir_out(struct gpio_chip *chip, unsigned int pin, · 2 unmodified lines
347361 reg = readl_relaxed(gpio->base_addr + ZYNQ_GPIO_OUTEN_OFFSET(bank_num));
348362 reg |= BIT(bank_pin_num);
349363 writel_relaxed(reg, gpio->base_addr + ZYNQ_GPIO_OUTEN_OFFSET(bank_num));
364+ spin_unlock_irqrestore(&gpio->dirlock, flags);
350365
351366 /* set the state of the pin */
352367 zynq_gpio_set_value(chip, pin, state);
@@ -647,6 +662,8 @@ static void zynq_gpio_irqhandler(struct irq_desc *desc) · 294 unmodified lines
647662 int_enb = readl_relaxed(gpio->base_addr +
648663 ZYNQ_GPIO_INTMASK_OFFSET(bank_num));
649664 zynq_gpio_handle_bank_irq(gpio, bank_num, int_sts & ~int_enb);
665+ if (gpio->p_data->quirks & GPIO_QUIRK_VERSAL)
666+ bank_num = bank_num + VERSAL_UNUSED_BANKS;
650667 }
651668
652669 chained_irq_exit(irqchip, desc);
@@ -676,6 +693,8 @@ static void zynq_gpio_save_context(struct zynq_gpio *gpio) · 23 unmodified lines
676693 gpio->context.int_any[bank_num] =
677694 readl_relaxed(gpio->base_addr +
678695 ZYNQ_GPIO_INTANY_OFFSET(bank_num));
696+ if (gpio->p_data->quirks & GPIO_QUIRK_VERSAL)
697+ bank_num = bank_num + VERSAL_UNUSED_BANKS;
679698 }
680699 }
681700
@@ -707,6 +726,8 @@ static void zynq_gpio_restore_context(struct zynq_gpio *gpio) · 25 unmodified lines
707726 writel_relaxed(~(gpio->context.int_en[bank_num]),
708727 gpio->base_addr +
709728 ZYNQ_GPIO_INTEN_OFFSET(bank_num));
729+ if (gpio->p_data->quirks & GPIO_QUIRK_VERSAL)
730+ bank_num = bank_num + VERSAL_UNUSED_BANKS;
710731 }
711732 }
712733
@@ -715,6 +736,9 @@ static int __maybe_unused zynq_gpio_suspend(struct device *dev) · 2 unmodified lines
715736 struct zynq_gpio *gpio = dev_get_drvdata(dev);
716737 struct irq_data *data = irq_get_irq_data(gpio->irq);
717738
739+ if (!device_may_wakeup(dev))
740+ disable_irq(gpio->irq);
741+
718742 if (!irqd_is_wakeup_set(data)) {
719743 zynq_gpio_save_context(gpio);
720744 return pm_runtime_force_suspend(dev);
@@ -729,6 +753,9 @@ static int __maybe_unused zynq_gpio_resume(struct device *dev) · 8 unmodified lines
729753 struct irq_data *data = irq_get_irq_data(gpio->irq);
730754 int ret;
731755
756+ if (!device_may_wakeup(dev))
757+ enable_irq(gpio->irq);
758+
732759 if (!irqd_is_wakeup_set(data)) {
733760 ret = pm_runtime_force_resume(dev);
734761 zynq_gpio_restore_context(gpio);
@@ -778,6 +805,31 @@ static const struct dev_pm_ops zynq_gpio_dev_pm_ops = { · 43 unmodified lines
778805 zynq_gpio_runtime_resume, NULL)
779806 };
780807
808+static const struct zynq_platform_data versal_gpio_def = {
809+ .label = "versal_gpio",
810+ .quirks = GPIO_QUIRK_VERSAL,
811+ .ngpio = 58,
812+ .max_bank = VERSAL_GPIO_MAX_BANK,
813+ .bank_min[0] = 0,
814+ .bank_max[0] = 25, /* 0 to 25 are connected to MIOs (26 pins) */
815+ .bank_min[3] = 26,
816+ .bank_max[3] = 57, /* Bank 3 is connected to FMIOs (32 pins) */
817+};
818+
819+static const struct zynq_platform_data pmc_gpio_def = {
820+ .label = "pmc_gpio",
821+ .ngpio = 116,
822+ .max_bank = PMC_GPIO_MAX_BANK,
823+ .bank_min[0] = 0,
824+ .bank_max[0] = 25, /* 0 to 25 are connected to MIOs (26 pins) */
825+ .bank_min[1] = 26,
826+ .bank_max[1] = 51, /* Bank 1 are connected to MIOs (26 pins) */
827+ .bank_min[3] = 52,
828+ .bank_max[3] = 83, /* Bank 3 is connected to EMIOs (32 pins) */
829+ .bank_min[4] = 84,
830+ .bank_max[4] = 115, /* Bank 4 is connected to EMIOs (32 pins) */
831+};
832+
781833 static const struct zynq_platform_data zynqmp_gpio_def = {
782834 .label = "zynqmp_gpio",
783835 .quirks = GPIO_QUIRK_DATA_RO_BUG,
@@ -815,6 +867,8 @@ static const struct zynq_platform_data zynq_gpio_def = { · 31 unmodified lines
815867 static const struct of_device_id zynq_gpio_of_match[] = {
816868 { .compatible = "xlnx,zynq-gpio-1.0", .data = &zynq_gpio_def },
817869 { .compatible = "xlnx,zynqmp-gpio-1.0", .data = &zynqmp_gpio_def },
870+ { .compatible = "xlnx,versal-gpio-1.0", .data = &versal_gpio_def },
871+ { .compatible = "xlnx,pmc-gpio-1.0", .data = &pmc_gpio_def },
818872 { /* end of table */ }
819873 };
820874 MODULE_DEVICE_TABLE(of, zynq_gpio_of_match);
@@ -876,7 +930,8 @@ static int zynq_gpio_probe(struct platform_device *pdev) · 55 unmodified lines
876930 /* Retrieve GPIO clock */
877931 gpio->clk = devm_clk_get(&pdev->dev, NULL);
878932 if (IS_ERR(gpio->clk)) {
879− dev_err(&pdev->dev, "input clock not found.\n");
933+ if (PTR_ERR(gpio->clk) != -EPROBE_DEFER)
934+ dev_err(&pdev->dev, "input clock not found.\n");
880935 return PTR_ERR(gpio->clk);
881936 }
882937 ret = clk_prepare_enable(gpio->clk);
@@ -885,6 +940,8 @@ static int zynq_gpio_probe(struct platform_device *pdev) · 2 unmodified lines
885940 return ret;
886941 }
887942
943+ spin_lock_init(&gpio->dirlock);
944+
888945 pm_runtime_set_active(&pdev->dev);
889946 pm_runtime_enable(&pdev->dev);
890947 ret = pm_runtime_get_sync(&pdev->dev);
@@ -892,9 +949,12 @@ static int zynq_gpio_probe(struct platform_device *pdev) · 1 unmodified line
892949 goto err_pm_dis;
893950
894951 /* disable interrupts for all banks */
895− for (bank_num = 0; bank_num < gpio->p_data->max_bank; bank_num++)
952+ for (bank_num = 0; bank_num < gpio->p_data->max_bank; bank_num++) {
896953 writel_relaxed(ZYNQ_GPIO_IXR_DISABLE_ALL, gpio->base_addr +
897954 ZYNQ_GPIO_INTDIS_OFFSET(bank_num));
955+ if (gpio->p_data->quirks & GPIO_QUIRK_VERSAL)
956+ bank_num = bank_num + VERSAL_UNUSED_BANKS;
957+ }
898958
899959 /* Set up the GPIO irqchip */
900960 girq = &chip->irq;
@@ -919,6 +979,8 @@ static int zynq_gpio_probe(struct platform_device *pdev) · 18 unmodified lines
919979 goto err_pm_put;
920980 }
921981
982+ irq_set_status_flags(gpio->irq, IRQ_DISABLE_UNLAZY);
983+ device_init_wakeup(&pdev->dev, 1);
922984 pm_runtime_put(&pdev->dev);
923985
924986 return 0;
drivers/gpio/gpiolib-sysfs.c+1−1
@@ -365,7 +365,7 @@ static DEVICE_ATTR_RW(active_low); · 364 unmodified lines
365365 static umode_t gpio_is_visible(struct kobject *kobj, struct attribute *attr,
366366 int n)
367367 {
368− struct device *dev = container_of(kobj, struct device, kobj);
368+ struct device *dev = kobj_to_dev(kobj);
369369 struct gpiod_data *data = dev_get_drvdata(dev);
370370 struct gpio_desc *desc = data->desc;
371371 umode_t mode = attr->mode;
drivers/gpio/gpiolib.c+4−6
@@ -2594,10 +2594,9 @@ int gpiod_get_array_value_complex(bool raw, bool can_sleep, · 2593 unmodified lines
25942594 bitmap_xor(value_bitmap, value_bitmap,
25952595 array_info->invert_mask, array_size);
25962596
2597− if (bitmap_full(array_info->get_mask, array_size))
2598− return 0;
2599−
26002597 i = find_first_zero_bit(array_info->get_mask, array_size);
2598+ if (i == array_size)
2599+ return 0;
26012600 } else {
26022601 array_info = NULL;
26032602 }
@@ -2878,10 +2877,9 @@ int gpiod_set_array_value_complex(bool raw, bool can_sleep, · 274 unmodified lines
28782877 gpio_chip_set_multiple(array_info->chip, array_info->set_mask,
28792878 value_bitmap);
28802879
2881− if (bitmap_full(array_info->set_mask, array_size))
2882− return 0;
2883−
28842880 i = find_first_zero_bit(array_info->set_mask, array_size);
2881+ if (i == array_size)
2882+ return 0;
28852883 } else {
28862884 array_info = NULL;
28872885 }
include/linux/gpio/driver.h+1−1
@@ -497,7 +497,7 @@ extern int gpiochip_add_data_with_key(struct gpio_chip *gc, void *data, · 496 unmodified lines
497497
498498 /**
499499 * gpiochip_add_data() - register a gpio_chip
500− * @chip: the chip to register, with chip->base initialized
500+ * @gc: the chip to register, with chip->base initialized
501501 * @data: driver-private data associated with this chip
502502 *
503503 * Context: potentially before irqs will work