Pull mailbox updates from Jassi Brar: - qcom: - enable support for ipq8074, sm1850 and sm7180 - add child device node for qcs404 - misc fixes - mediatek: - enable support for mt8183 - misc rejig of cmdq driver - new client-reg dt property - armada: - use device-managed registration api * tag 'mailbox-v5.4' of git://git.linaro.org/landing-teams/working/fujitsu/integration: mailbox: qcom-apcs: fix max_register value mailbox: qcom: Add support for IPQ8074 APCS dt-bindings: mailbox: qom: Add ipq8074 APPS compatible mailbox: qcom: Add support for Qualcomm SM8150 and SC7180 SoCs dt-bindings: mailbox: Add APSS shared for SM8150 and SC7180 SoCs mbox: qcom: replace integer with valid macro mbox: qcom: add APCS child device for QCS404 mailbox: mediatek: cmdq: clear the event in cmdq initial flow mailbox: mediatek: cmdq: support mt8183 gce function mailbox: mediatek: cmdq: move the CMDQ_IRQ_MASK into cmdq driver data dt-binding: gce: add binding for gce client reg property dt-binding: gce: add gce header file for mt8183 dt-binding: gce: remove thread-num property mailbox: armada-37xx-rwtm: Use device-managed registration API
Showing the changes to include/linux (2 of 8 files). Show all
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| @@ -20,6 +20,9 @@ · 19 unmodified lines | ||
| 20 | 20 | #define CMDQ_WFE_WAIT BIT(15) |
| 21 | 21 | #define CMDQ_WFE_WAIT_VALUE 0x1 |
| 22 | 22 | |
| 23 | +/** cmdq event maximum */ | |
| 24 | +#define CMDQ_MAX_EVENT 0x3ff | |
| 25 | + | |
| 23 | 26 | /* |
| 24 | 27 | * CMDQ_CODE_MASK: |
| 25 | 28 | * set write mask |
| @@ -13,9 +13,6 @@ · 12 unmodified lines | ||
| 13 | 13 | |
| 14 | 14 | #define CMDQ_NO_TIMEOUT 0xffffffffu |
| 15 | 15 | |
| 16 | −/** cmdq event maximum */ | |
| 17 | −#define CMDQ_MAX_EVENT 0x3ff | |
| 18 | − | |
| 19 | 16 | struct cmdq_pkt; |
| 20 | 17 | |
| 21 | 18 | struct cmdq_client { |