Merge tag 'fpga-for-5.19-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/fpga/linux-fpga into char-misc-next

Moritz writes: FPGA Manager changes for 5.19-rc1 FPGA Manager - My change moves the linux-fpga repository to a shared location w/ shared responsibilities between maintainers - Nava's changes fix coding style and kernel-docs DFL - Matthew's change allows ports to be linked to FMEs. - Tianfei's changes clean up some documentation and ensure the feature type is checked before parsing IRQs All patches have been reviewed on the mailing list, and have been in the last linux-next releases (as part of our for-next branch). Signed-off-by: Moritz Fischer <mdf@kernel.org> * tag 'fpga-for-5.19-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/fpga/linux-fpga: fpga: dfl: Allow Port to be linked to FME's DFL Documentation: fpga: dfl: add link address of feature id table fpga: dfl: check feature type before parse irq info fpga: fpga-region: fix kernel-doc formatting issues fpga: Use tab instead of space indentation fpga: fpga-mgr: fix kernel-doc warnings fpga: fix for coding style issues MAINTAINERS: Update linux-fpga repository location

Greg Kroah-Hartman committed 4 years ago

Commit bab6ffa2 parents 9c518db ae23f7410 files · +68 −40Browse files

Unified · Split

10 files

Documentation/fpga/dfl.rst +5 −0
MAINTAINERS +1 −1
drivers/fpga/Makefile +3 −3
drivers/fpga/dfl-pci.c +9 −0
drivers/fpga/dfl.c +22 −16
drivers/fpga/dfl.h +1 −0
drivers/fpga/fpga-mgr.c +9 −4
drivers/fpga/fpga-region.c +3 −3
drivers/fpga/of-fpga-region.c +12 −10
include/linux/fpga/fpga-region.h +3 −3

Documentation/fpga/dfl.rst+5−0

@@ -502,6 +502,11 @@ Developer only needs to provide a sub feature driver with matched feature id. · 501 unmodified lines
502	502	FME Partial Reconfiguration Sub Feature driver (see drivers/fpga/dfl-fme-pr.c)
503	503	could be a reference.
504	504
	505	+Please refer to below link to existing feature id table and guide for new feature
	506	+ids application.
	507	+https://github.com/OPAE/dfl-feature-id
	508	+
	509	+
505	510	Location of DFLs on a PCI Device
506	511	================================
507	512	The original method for finding a DFL on a PCI device assumed the start of the

MAINTAINERS+1−1

@@ -7732,7 +7732,7 @@ R: Tom Rix <trix@redhat.com> · 7731 unmodified lines
7732	7732	L: linux-fpga@vger.kernel.org
7733	7733	S: Maintained
7734	7734	Q: http://patchwork.kernel.org/project/linux-fpga/list/
7735		−T: git git://git.kernel.org/pub/scm/linux/kernel/git/mdf/linux-fpga.git
	7735	+T: git git://git.kernel.org/pub/scm/linux/kernel/git/fpga/linux-fpga.git
7736	7736	F: Documentation/devicetree/bindings/fpga/
7737	7737	F: Documentation/driver-api/fpga/
7738	7738	F: Documentation/fpga/

drivers/fpga/Makefile+3−3

@@ -18,9 +18,9 @@ obj-$(CONFIG_FPGA_MGR_TS73XX) += ts73xx-fpga.o · 17 unmodified lines
18	18	obj-$(CONFIG_FPGA_MGR_XILINX_SPI) += xilinx-spi.o
19	19	obj-$(CONFIG_FPGA_MGR_ZYNQ_FPGA) += zynq-fpga.o
20	20	obj-$(CONFIG_FPGA_MGR_ZYNQMP_FPGA) += zynqmp-fpga.o
21		−obj-$(CONFIG_FPGA_MGR_VERSAL_FPGA) += versal-fpga.o
22		−obj-$(CONFIG_ALTERA_PR_IP_CORE) += altera-pr-ip-core.o
23		−obj-$(CONFIG_ALTERA_PR_IP_CORE_PLAT) += altera-pr-ip-core-plat.o
	21	+obj-$(CONFIG_FPGA_MGR_VERSAL_FPGA) += versal-fpga.o
	22	+obj-$(CONFIG_ALTERA_PR_IP_CORE) += altera-pr-ip-core.o
	23	+obj-$(CONFIG_ALTERA_PR_IP_CORE_PLAT) += altera-pr-ip-core-plat.o
24	24
25	25	# FPGA Bridge Drivers
26	26	obj-$(CONFIG_FPGA_BRIDGE) += fpga-bridge.o

drivers/fpga/dfl-pci.c+9−0

@@ -259,6 +259,15 @@ static int find_dfls_by_default(struct pci_dev *pcidev, · 258 unmodified lines
259	259	*/
260	260	bar = FIELD_GET(FME_PORT_OFST_BAR_ID, v);
261	261	offset = FIELD_GET(FME_PORT_OFST_DFH_OFST, v);
	262	+ if (bar == FME_PORT_OFST_BAR_SKIP) {
	263	+ continue;
	264	+ } else if (bar >= PCI_STD_NUM_BARS) {
	265	+ dev_err(&pcidev->dev, "bad BAR %d for port %d\n",
	266	+ bar, i);
	267	+ ret = -EINVAL;
	268	+ break;
	269	+ }
	270	+
262	271	start = pci_resource_start(pcidev, bar) + offset;
263	272	len = pci_resource_len(pcidev, bar) - offset;
264	273

drivers/fpga/dfl.c+22−16

@@ -940,9 +940,12 @@ static int parse_feature_irqs(struct build_feature_devs_info *binfo, · 939 unmodified lines
940	940	{
941	941	void __iomem *base = binfo->ioaddr + ofst;
942	942	unsigned int i, ibase, inr = 0;
	943	+ enum dfl_id_type type;
943	944	int virq;
944	945	u64 v;
945	946
	947	+ type = feature_dev_id_type(binfo->feature_dev);
	948	+
946	949	/*
947	950	* Ideally DFL framework should only read info from DFL header, but
948	951	* current version DFL only provides mmio resources information for
@@ -957,22 +960,25 @@ static int parse_feature_irqs(struct build_feature_devs_info *binfo, · 8 unmodified lines
957	960	* code will be added. But in order to be compatible to old version
958	961	* DFL, the driver may still fall back to these quirks.
959	962	*/
960		− switch (fid) {
961		− case PORT_FEATURE_ID_UINT:
962		− v = readq(base + PORT_UINT_CAP);
963		− ibase = FIELD_GET(PORT_UINT_CAP_FST_VECT, v);
964		− inr = FIELD_GET(PORT_UINT_CAP_INT_NUM, v);
965		− break;
966		− case PORT_FEATURE_ID_ERROR:
967		− v = readq(base + PORT_ERROR_CAP);
968		− ibase = FIELD_GET(PORT_ERROR_CAP_INT_VECT, v);
969		− inr = FIELD_GET(PORT_ERROR_CAP_SUPP_INT, v);
970		− break;
971		− case FME_FEATURE_ID_GLOBAL_ERR:
972		− v = readq(base + FME_ERROR_CAP);
973		− ibase = FIELD_GET(FME_ERROR_CAP_INT_VECT, v);
974		− inr = FIELD_GET(FME_ERROR_CAP_SUPP_INT, v);
975		− break;
	963	+ if (type == PORT_ID) {
	964	+ switch (fid) {
	965	+ case PORT_FEATURE_ID_UINT:
	966	+ v = readq(base + PORT_UINT_CAP);
	967	+ ibase = FIELD_GET(PORT_UINT_CAP_FST_VECT, v);
	968	+ inr = FIELD_GET(PORT_UINT_CAP_INT_NUM, v);
	969	+ break;
	970	+ case PORT_FEATURE_ID_ERROR:
	971	+ v = readq(base + PORT_ERROR_CAP);
	972	+ ibase = FIELD_GET(PORT_ERROR_CAP_INT_VECT, v);
	973	+ inr = FIELD_GET(PORT_ERROR_CAP_SUPP_INT, v);
	974	+ break;
	975	+ }
	976	+ } else if (type == FME_ID) {
	977	+ if (fid == FME_FEATURE_ID_GLOBAL_ERR) {
	978	+ v = readq(base + FME_ERROR_CAP);
	979	+ ibase = FIELD_GET(FME_ERROR_CAP_INT_VECT, v);
	980	+ inr = FIELD_GET(FME_ERROR_CAP_SUPP_INT, v);
	981	+ }
976	982	}
977	983
978	984	if (!inr) {

drivers/fpga/dfl.h+1−0

@@ -89,6 +89,7 @@ · 88 unmodified lines
89	89	#define FME_HDR_NEXT_AFU NEXT_AFU
90	90	#define FME_HDR_CAP 0x30
91	91	#define FME_HDR_PORT_OFST(n) (0x38 + ((n) * 0x8))
	92	+#define FME_PORT_OFST_BAR_SKIP 7
92	93	#define FME_HDR_BITSTREAM_ID 0x60
93	94	#define FME_HDR_BITSTREAM_MD 0x68
94	95

drivers/fpga/fpga-mgr.c+9−4

@@ -148,11 +148,12 @@ static int fpga_mgr_write_init_buf(struct fpga_manager *mgr, · 147 unmodified lines
148	148	int ret;
149	149
150	150	mgr->state = FPGA_MGR_STATE_WRITE_INIT;
151		− if (!mgr->mops->initial_header_size)
	151	+ if (!mgr->mops->initial_header_size) {
152	152	ret = fpga_mgr_write_init(mgr, info, NULL, 0);
153		− else
154		− ret = fpga_mgr_write_init(
155		− mgr, info, buf, min(mgr->mops->initial_header_size, count));
	153	+ } else {
	154	+ count = min(mgr->mops->initial_header_size, count);
	155	+ ret = fpga_mgr_write_init(mgr, info, buf, count);
	156	+ }
156	157
157	158	if (ret) {
158	159	dev_err(&mgr->dev, "Error preparing FPGA for writing\n");
@@ -730,6 +731,8 @@ static void devm_fpga_mgr_unregister(struct device dev, void res) · 571 unmodified lines
730	731	* @parent: fpga manager device from pdev
731	732	* @info: parameters for fpga manager
732	733	*
	734	+ * Return: fpga manager pointer on success, negative error code otherwise.
	735	+ *
733	736	* This is the devres variant of fpga_mgr_register_full() for which the unregister
734	737	* function will be called automatically when the managing device is detached.
735	738	*/
@@ -763,6 +766,8 @@ EXPORT_SYMBOL_GPL(devm_fpga_mgr_register_full); · 27 unmodified lines
763	766	* @mops: pointer to structure of fpga manager ops
764	767	* @priv: fpga manager private data
765	768	*
	769	+ * Return: fpga manager pointer on success, negative error code otherwise.
	770	+ *
766	771	* This is the devres variant of fpga_mgr_register() for which the
767	772	* unregister function will be called automatically when the managing
768	773	* device is detached.

drivers/fpga/fpga-region.c+3−3

@@ -18,9 +18,9 @@ · 17 unmodified lines
18	18	static DEFINE_IDA(fpga_region_ida);
19	19	static struct class *fpga_region_class;
20	20
21		−struct fpga_region *fpga_region_class_find(
22		− struct device start, const void data,
23		− int (match)(struct device , const void *))
	21	+struct fpga_region *
	22	+fpga_region_class_find(struct device start, const void data,
	23	+ int (match)(struct device , const void *))
24	24	{
25	25	struct device *dev;
26	26

drivers/fpga/of-fpga-region.c+12−10

@@ -28,7 +28,7 @@ MODULE_DEVICE_TABLE(of, fpga_region_of_match); · 27 unmodified lines
28	28	*
29	29	* Caller will need to put_device(&region->dev) when done.
30	30	*
31		− * Returns FPGA Region struct or NULL
	31	+ * Return: FPGA Region struct or NULL
32	32	*/
33	33	static struct fpga_region of_fpga_region_find(struct device_node np)
34	34	{
@@ -80,7 +80,7 @@ static struct fpga_manager of_fpga_region_get_mgr(struct device_node np) · 45 unmodified lines
80	80	* Caller should call fpga_bridges_put(&region->bridge_list) when
81	81	* done with the bridges.
82	82	*
83		− * Return 0 for success (even if there are no bridges specified)
	83	+ * Return: 0 for success (even if there are no bridges specified)
84	84	* or -EBUSY if any of the bridges are in use.
85	85	*/
86	86	static int of_fpga_region_get_bridges(struct fpga_region *region)
@@ -139,13 +139,13 @@ static int of_fpga_region_get_bridges(struct fpga_region *region) · 52 unmodified lines
139	139	}
140	140
141	141	/**
142		− * child_regions_with_firmware
	142	+ * child_regions_with_firmware - Used to check the child region info.
143	143	* @overlay: device node of the overlay
144	144	*
145	145	* If the overlay adds child FPGA regions, they are not allowed to have
146	146	* firmware-name property.
147	147	*
148		− * Return 0 for OK or -EINVAL if child FPGA region adds firmware-name.
	148	+ * Return: 0 for OK or -EINVAL if child FPGA region adds firmware-name.
149	149	*/
150	150	static int child_regions_with_firmware(struct device_node *overlay)
151	151	{
@@ -184,14 +184,14 @@ static int child_regions_with_firmware(struct device_node *overlay) · 32 unmodified lines
184	184	* Given an overlay applied to an FPGA region, parse the FPGA image specific
185	185	* info in the overlay and do some checking.
186	186	*
187		− * Returns:
	187	+ * Return:
188	188	* NULL if overlay doesn't direct us to program the FPGA.
189	189	* fpga_image_info struct if there is an image to program.
190	190	* error code for invalid overlay.
191	191	*/
192		−static struct fpga_image_info *of_fpga_region_parse_ov(
193		− struct fpga_region *region,
194		− struct device_node *overlay)
	192	+static struct fpga_image_info *
	193	+of_fpga_region_parse_ov(struct fpga_region *region,
	194	+ struct device_node *overlay)
195	195	{
196	196	struct device *dev = &region->dev;
197	197	struct fpga_image_info *info;
@@ -279,7 +279,7 @@ ret_no_info: · 81 unmodified lines
279	279	* If the checks fail, overlay is rejected and does not get added to the
280	280	* live tree.
281	281	*
282		− * Returns 0 for success or negative error code for failure.
	282	+ * Return: 0 for success or negative error code for failure.
283	283	*/
284	284	static int of_fpga_region_notify_pre_apply(struct fpga_region *region,
285	285	struct of_overlay_notify_data *nd)
@@ -339,7 +339,7 @@ static void of_fpga_region_notify_post_remove(struct fpga_region *region, · 53 unmodified lines
339	339	* This notifier handles programming an FPGA when a "firmware-name" property is
340	340	* added to an fpga-region.
341	341	*
342		− * Returns NOTIFY_OK or error if FPGA programming fails.
	342	+ * Return: NOTIFY_OK or error if FPGA programming fails.
343	343	*/
344	344	static int of_fpga_region_notify(struct notifier_block *nb,
345	345	unsigned long action, void *arg)
@@ -446,6 +446,8 @@ static struct platform_driver of_fpga_region_driver = { · 100 unmodified lines
446	446	/**
447	447	* of_fpga_region_init - init function for fpga_region class
448	448	* Creates the fpga_region class and registers a reconfig notifier.
	449	+ *
	450	+ * Return: 0 on success, negative error code otherwise.
449	451	*/
450	452	static int __init of_fpga_region_init(void)
451	453	{

include/linux/fpga/fpga-region.h+3−3

@@ -52,9 +52,9 @@ struct fpga_region { · 51 unmodified lines
52	52
53	53	#define to_fpga_region(d) container_of(d, struct fpga_region, dev)
54	54
55		−struct fpga_region *fpga_region_class_find(
56		− struct device start, const void data,
57		− int (match)(struct device , const void *));
	55	+struct fpga_region *
	56	+fpga_region_class_find(struct device start, const void data,
	57	+ int (match)(struct device , const void *));
58	58
59	59	int fpga_region_program_fpga(struct fpga_region *region);
60	60

Merge tag 'fpga-for-5.19-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/fpga/linux-fpga into char-misc-next

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