Merge branch 'fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

* 'fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (45 commits) ARM: ux500: update defconfig ARM: u300: update defconfig ARM: at91: enable additional boards in existing soc defconfig files ARM: at91: refresh soc defconfig files for 3.2 ARM: at91: rename defconfig files appropriately ARM: OMAP2+: Fix Compilation error when omap_l3_noc built as module ARM: OMAP2+: Remove empty io.h ARM: OMAP2: select ARM_AMBA if OMAP3_EMU is defined ARM: OMAP: smartreflex: fix IRQ handling bug ARM: OMAP: PM: only register TWL with voltage layer when device is present ARM: OMAP: hwmod: Fix the addr space, irq, dma count APIs arm: mx28: fix bit operation in clock setting ARM: imx: export imx_ioremap ARM: imx/mm-imx3: conditionally compile i.MX31 and i.MX35 code ARM: mx5: Fix checkpatch warnings in cpu-imx5.c MAINTAINERS: Add missing directory ARM: imx: drop 'ARCH_MX31' and 'ARCH_MX35' ARM: imx6q: move clock register map to machine_desc.map_io ARM: pxa168/gplugd: add the correct SSP device ARM: Update mach-types to fix mxs build breakage ...

Linus Torvalds committed 14 years ago

Commit cd5b49b2 parents 8cd7920 98014be71 files · +517 −270Browse files

Unified · Split

71 files

MAINTAINERS +8 −0
arch/arm/configs/at91cap9_defconfig +0 −7
arch/arm/configs/at91rm9200_defconfig +14 −33
arch/arm/configs/at91sam9260_defconfig +12 −4
arch/arm/configs/at91sam9g20_defconfig +12 −11
arch/arm/configs/at91sam9g45_defconfig +2 −5
arch/arm/configs/at91sam9rl_defconfig +0 −5
arch/arm/configs/ezx_defconfig +1 −1
arch/arm/configs/imote2_defconfig +1 −1
arch/arm/configs/magician_defconfig +1 −1
arch/arm/configs/omap1_defconfig +0 −1
arch/arm/configs/u300_defconfig +6 −7
arch/arm/configs/u8500_defconfig +5 −9
arch/arm/configs/zeus_defconfig +1 −1
arch/arm/mach-exynos/cpuidle.c +2 −0
arch/arm/mach-highbank/highbank.c +4 −0
arch/arm/mach-imx/Kconfig +0 −13
arch/arm/mach-imx/clock-imx6q.c +5 −2
arch/arm/mach-imx/mach-imx6q.c +1 −0
arch/arm/mach-imx/mm-imx3.c +58 −51
arch/arm/mach-imx/src.c +7 −0
arch/arm/mach-mmp/gplugd.c +1 −1
arch/arm/mach-mmp/include/mach/gpio-pxa.h +1 −1
arch/arm/mach-mx5/cpu.c +3 −2
arch/arm/mach-mx5/mm.c +4 −2
arch/arm/mach-mxs/clock-mx28.c +1 −1
arch/arm/mach-omap1/Kconfig +0 −8
arch/arm/mach-omap1/board-ams-delta.c +7 −3
arch/arm/mach-omap1/clock.h +2 −1
arch/arm/mach-omap1/clock_data.c +34 −19
arch/arm/mach-omap1/devices.c +3 −0
arch/arm/mach-omap2/Kconfig +1 −0
arch/arm/mach-omap2/Makefile +1 −4
arch/arm/mach-omap2/cpuidle34xx.c +1 −0
arch/arm/mach-omap2/display.c +159 −0
arch/arm/mach-omap2/display.h +29 −0
arch/arm/mach-omap2/io.h +0 −0
arch/arm/mach-omap2/omap_hwmod.c +3 −3
arch/arm/mach-omap2/omap_hwmod_2420_data.c +14 −3
arch/arm/mach-omap2/omap_hwmod_2430_data.c +14 −3
arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c +4 −1
arch/arm/mach-omap2/omap_hwmod_3xxx_data.c +32 −5
arch/arm/mach-omap2/omap_hwmod_44xx_data.c +12 −12
arch/arm/mach-omap2/omap_hwmod_common_data.c +4 −0
arch/arm/mach-omap2/omap_hwmod_common_data.h +4 −0
arch/arm/mach-omap2/omap_l3_noc.c +1 −1
arch/arm/mach-omap2/pm.c +2 −4
arch/arm/mach-omap2/smartreflex.c +1 −1
arch/arm/mach-omap2/twl-common.c +11 −0
arch/arm/mach-omap2/twl-common.h +3 −0
arch/arm/mach-pxa/balloon3.c +1 −1
arch/arm/mach-pxa/colibri-pxa320.c +1 −1
arch/arm/mach-pxa/gumstix.c +1 −1
arch/arm/mach-pxa/include/mach/palm27x.h +2 −2
arch/arm/mach-pxa/palm27x.c +2 −2
arch/arm/mach-pxa/palmtc.c +1 −1
arch/arm/mach-pxa/vpac270.c +1 −1
arch/arm/mach-s3c64xx/mach-crag6410-module.c +1 −1
arch/arm/plat-mxc/include/mach/common.h +1 −1
arch/arm/plat-mxc/include/mach/mxc.h +0 −14
arch/arm/plat-mxc/include/mach/system.h +1 −6
arch/arm/plat-mxc/system.c +2 −1
arch/arm/plat-omap/include/plat/clock.h +1 −1
arch/arm/plat-omap/include/plat/common.h +3 −0
arch/arm/plat-s3c24xx/cpu-freq-debugfs.c +1 −1
arch/arm/plat-s5p/sysmmu.c +1 −0
arch/arm/plat-samsung/include/plat/gpio-cfg.h +2 −0
arch/arm/plat-samsung/pd.c +1 −1
arch/arm/plat-samsung/pwm.c +1 −1
arch/arm/tools/mach-types +1 −0
include/video/omapdss.h +0 −7

MAINTAINERS+8−0

@@ -789,6 +789,7 @@ L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) · 788 unmodified lines
789	789	S: Maintained
790	790	T: git git://git.pengutronix.de/git/imx/linux-2.6.git
791	791	F: arch/arm/mach-mx*/
	792	+F: arch/arm/mach-imx/
792	793	F: arch/arm/plat-mxc/
793	794
794	795	ARM/FREESCALE IMX51
@@ -804,6 +805,13 @@ S: Maintained · 9 unmodified lines
804	805	T: git git://git.linaro.org/people/shawnguo/linux-2.6.git
805	806	F: arch/arm/mach-imx/imx6
806	807
	808	+ARM/FREESCALE MXS ARM ARCHITECTURE
	809	+M: Shawn Guo <shawn.guo@linaro.org>
	810	+L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
	811	+S: Maintained
	812	+T: git git://git.linaro.org/people/shawnguo/linux-2.6.git
	813	+F: arch/arm/mach-mxs/
	814	+
807	815	ARM/GLOMATION GESBC9312SX MACHINE SUPPORT
808	816	M: Lennert Buytenhek <kernel@wantstofly.org>
809	817	L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)

arch/arm/configs/at91cap9_defconfigrenamed from arch/arm/configs/at91cap9adk_defconfig+0−7

@@ -38,7 +38,6 @@ CONFIG_IP_PNP_RARP=y · 37 unmodified lines
38	38	# CONFIG_IPV6 is not set
39	39	CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
40	40	CONFIG_MTD=y
41		−CONFIG_MTD_PARTITIONS=y
42	41	CONFIG_MTD_CMDLINE_PARTS=y
43	42	CONFIG_MTD_CHAR=y
44	43	CONFIG_MTD_BLOCK=y
@@ -52,16 +51,12 @@ CONFIG_MTD_NAND_ATMEL=y · 7 unmodified lines
52	51	CONFIG_BLK_DEV_LOOP=y
53	52	CONFIG_BLK_DEV_RAM=y
54	53	CONFIG_BLK_DEV_RAM_SIZE=8192
55		−CONFIG_ATMEL_SSC=y
56	54	CONFIG_SCSI=y
57	55	CONFIG_BLK_DEV_SD=y
58	56	CONFIG_SCSI_MULTI_LUN=y
59	57	CONFIG_NETDEVICES=y
60		−CONFIG_NET_ETHERNET=y
61	58	CONFIG_MII=y
62	59	CONFIG_MACB=y
63		−# CONFIG_NETDEV_1000 is not set
64		−# CONFIG_NETDEV_10000 is not set
65	60	# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
66	61	CONFIG_INPUT_EVDEV=y
67	62	# CONFIG_INPUT_KEYBOARD is not set
@@ -81,7 +76,6 @@ CONFIG_WATCHDOG=y · 13 unmodified lines
81	76	CONFIG_WATCHDOG_NOWAYOUT=y
82	77	CONFIG_FB=y
83	78	CONFIG_FB_ATMEL=y
84		−# CONFIG_VGA_CONSOLE is not set
85	79	CONFIG_LOGO=y
86	80	# CONFIG_LOGO_LINUX_MONO is not set
87	81	# CONFIG_LOGO_LINUX_CLUT224 is not set
@@ -99,7 +93,6 @@ CONFIG_MMC_AT91=m · 11 unmodified lines
99	93	CONFIG_RTC_CLASS=y
100	94	CONFIG_RTC_DRV_AT91SAM9=y
101	95	CONFIG_EXT2_FS=y
102		−CONFIG_INOTIFY=y
103	96	CONFIG_VFAT_FS=y
104	97	CONFIG_TMPFS=y
105	98	CONFIG_JFFS2_FS=y

arch/arm/configs/at91rm9200_defconfig+14−33

@@ -5,7 +5,6 @@ CONFIG_SYSVIPC=y · 4 unmodified lines
5	5	CONFIG_IKCONFIG=y
6	6	CONFIG_IKCONFIG_PROC=y
7	7	CONFIG_LOG_BUF_SHIFT=14
8		−CONFIG_SYSFS_DEPRECATED_V2=y
9	8	CONFIG_BLK_DEV_INITRD=y
10	9	CONFIG_MODULES=y
11	10	CONFIG_MODULE_FORCE_LOAD=y
@@ -56,7 +55,6 @@ CONFIG_IP_PNP=y · 44 unmodified lines
56	55	CONFIG_IP_PNP_DHCP=y
57	56	CONFIG_IP_PNP_BOOTP=y
58	57	CONFIG_NET_IPIP=m
59		−CONFIG_NET_IPGRE=m
60	58	CONFIG_INET_AH=m
61	59	CONFIG_INET_ESP=m
62	60	CONFIG_INET_IPCOMP=m
@@ -75,18 +73,8 @@ CONFIG_IPV6_TUNNEL=m · 12 unmodified lines
75	73	CONFIG_BRIDGE=m
76	74	CONFIG_VLAN_8021Q=m
77	75	CONFIG_BT=m
78		−CONFIG_BT_L2CAP=m
79		−CONFIG_BT_SCO=m
80		−CONFIG_BT_RFCOMM=m
81		−CONFIG_BT_RFCOMM_TTY=y
82		−CONFIG_BT_BNEP=m
83		−CONFIG_BT_BNEP_MC_FILTER=y
84		−CONFIG_BT_BNEP_PROTO_FILTER=y
85		−CONFIG_BT_HIDP=m
86	76	CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
87	77	CONFIG_MTD=y
88		−CONFIG_MTD_CONCAT=y
89		−CONFIG_MTD_PARTITIONS=y
90	78	CONFIG_MTD_CMDLINE_PARTS=y
91	79	CONFIG_MTD_AFS_PARTS=y
92	80	CONFIG_MTD_CHAR=y
@@ -108,8 +96,6 @@ CONFIG_BLK_DEV_LOOP=y · 15 unmodified lines
108	96	CONFIG_BLK_DEV_NBD=y
109	97	CONFIG_BLK_DEV_RAM=y
110	98	CONFIG_BLK_DEV_RAM_SIZE=8192
111		−CONFIG_ATMEL_TCLIB=y
112		−CONFIG_EEPROM_LEGACY=m
113	99	CONFIG_SCSI=y
114	100	CONFIG_BLK_DEV_SD=y
115	101	CONFIG_BLK_DEV_SR=m
@@ -119,14 +105,23 @@ CONFIG_SCSI_MULTI_LUN=y · 3 unmodified lines
119	105	# CONFIG_SCSI_LOWLEVEL is not set
120	106	CONFIG_NETDEVICES=y
121	107	CONFIG_TUN=m
	108	+CONFIG_ARM_AT91_ETHER=y
122	109	CONFIG_PHYLIB=y
123	110	CONFIG_DAVICOM_PHY=y
124	111	CONFIG_SMSC_PHY=y
125	112	CONFIG_MICREL_PHY=y
126		−CONFIG_NET_ETHERNET=y
127		−CONFIG_ARM_AT91_ETHER=y
128		−# CONFIG_NETDEV_1000 is not set
129		−# CONFIG_NETDEV_10000 is not set
	113	+CONFIG_PPP=y
	114	+CONFIG_PPP_BSDCOMP=y
	115	+CONFIG_PPP_DEFLATE=y
	116	+CONFIG_PPP_FILTER=y
	117	+CONFIG_PPP_MPPE=m
	118	+CONFIG_PPP_MULTILINK=y
	119	+CONFIG_PPPOE=m
	120	+CONFIG_PPP_ASYNC=y
	121	+CONFIG_SLIP=m
	122	+CONFIG_SLIP_COMPRESSED=y
	123	+CONFIG_SLIP_SMART=y
	124	+CONFIG_SLIP_MODE_SLIP6=y
130	125	CONFIG_USB_CATC=m
131	126	CONFIG_USB_KAWETH=m
132	127	CONFIG_USB_PEGASUS=m
@@ -139,18 +134,6 @@ CONFIG_USB_NET_RNDIS_HOST=m · 6 unmodified lines
139	134	CONFIG_USB_ALI_M5632=y
140	135	CONFIG_USB_AN2720=y
141	136	CONFIG_USB_EPSON2888=y
142		−CONFIG_PPP=y
143		−CONFIG_PPP_MULTILINK=y
144		−CONFIG_PPP_FILTER=y
145		−CONFIG_PPP_ASYNC=y
146		−CONFIG_PPP_DEFLATE=y
147		−CONFIG_PPP_BSDCOMP=y
148		−CONFIG_PPP_MPPE=m
149		−CONFIG_PPPOE=m
150		−CONFIG_SLIP=m
151		−CONFIG_SLIP_COMPRESSED=y
152		−CONFIG_SLIP_SMART=y
153		−CONFIG_SLIP_MODE_SLIP6=y
154	137	# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
155	138	CONFIG_INPUT_MOUSEDEV_SCREEN_X=640
156	139	CONFIG_INPUT_MOUSEDEV_SCREEN_Y=480
@@ -158,9 +141,9 @@ CONFIG_INPUT_EVDEV=y · 1 unmodified line
158	141	CONFIG_KEYBOARD_GPIO=y
159	142	# CONFIG_INPUT_MOUSE is not set
160	143	CONFIG_INPUT_TOUCHSCREEN=y
	144	+CONFIG_LEGACY_PTY_COUNT=32
161	145	CONFIG_SERIAL_ATMEL=y
162	146	CONFIG_SERIAL_ATMEL_CONSOLE=y
163		−CONFIG_LEGACY_PTY_COUNT=32
164	147	CONFIG_HW_RANDOM=y
165	148	CONFIG_I2C=y
166	149	CONFIG_I2C_CHARDEV=y
@@ -290,7 +273,6 @@ CONFIG_NFS_V3_ACL=y · 123 unmodified lines
290	273	CONFIG_NFS_V4=y
291	274	CONFIG_ROOT_NFS=y
292	275	CONFIG_NFSD=y
293		−CONFIG_SMB_FS=m
294	276	CONFIG_CIFS=m
295	277	CONFIG_PARTITION_ADVANCED=y
296	278	CONFIG_MAC_PARTITION=y
@@ -335,7 +317,6 @@ CONFIG_NLS_UTF8=y · 38 unmodified lines
335	317	CONFIG_MAGIC_SYSRQ=y
336	318	CONFIG_DEBUG_FS=y
337	319	CONFIG_DEBUG_KERNEL=y
338		−# CONFIG_RCU_CPU_STALL_DETECTOR is not set
339	320	# CONFIG_FTRACE is not set
340	321	CONFIG_CRYPTO_PCBC=y
341	322	CONFIG_CRYPTO_SHA1=y

arch/arm/configs/at91sam9260_defconfigrenamed from arch/arm/configs/at91sam9260ek_defconfig+12−4

@@ -12,11 +12,23 @@ CONFIG_MODULE_UNLOAD=y · 11 unmodified lines
12	12	# CONFIG_IOSCHED_CFQ is not set
13	13	CONFIG_ARCH_AT91=y
14	14	CONFIG_ARCH_AT91SAM9260=y
	15	+CONFIG_ARCH_AT91SAM9260_SAM9XE=y
15	16	CONFIG_MACH_AT91SAM9260EK=y
	17	+CONFIG_MACH_CAM60=y
	18	+CONFIG_MACH_SAM9_L9260=y
	19	+CONFIG_MACH_AFEB9260=y
	20	+CONFIG_MACH_USB_A9260=y
	21	+CONFIG_MACH_QIL_A9260=y
	22	+CONFIG_MACH_CPU9260=y
	23	+CONFIG_MACH_FLEXIBITY=y
	24	+CONFIG_MACH_SNAPPER_9260=y
	25	+CONFIG_MACH_AT91SAM_DT=y
16	26	CONFIG_AT91_PROGRAMMABLE_CLOCKS=y
17	27	# CONFIG_ARM_THUMB is not set
18	28	CONFIG_ZBOOT_ROM_TEXT=0x0
19	29	CONFIG_ZBOOT_ROM_BSS=0x0
	30	+CONFIG_ARM_APPENDED_DTB=y
	31	+CONFIG_ARM_ATAG_DTB_COMPAT=y
20	32	CONFIG_CMDLINE="mem=64M console=ttyS0,115200 initrd=0x21100000,3145728 root=/dev/ram0 rw"
21	33	CONFIG_FPE_NWFPE=y
22	34	CONFIG_NET=y
@@ -33,12 +45,10 @@ CONFIG_IP_PNP_BOOTP=y · 10 unmodified lines
33	45	CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
34	46	CONFIG_BLK_DEV_RAM=y
35	47	CONFIG_BLK_DEV_RAM_SIZE=8192
36		−CONFIG_ATMEL_SSC=y
37	48	CONFIG_SCSI=y
38	49	CONFIG_BLK_DEV_SD=y
39	50	CONFIG_SCSI_MULTI_LUN=y
40	51	CONFIG_NETDEVICES=y
41		−CONFIG_NET_ETHERNET=y
42	52	CONFIG_MII=y
43	53	CONFIG_MACB=y
44	54	# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
@@ -55,7 +65,6 @@ CONFIG_I2C_GPIO=y · 10 unmodified lines
55	65	CONFIG_WATCHDOG=y
56	66	CONFIG_WATCHDOG_NOWAYOUT=y
57	67	CONFIG_AT91SAM9X_WATCHDOG=y
58		−# CONFIG_VGA_CONSOLE is not set
59	68	# CONFIG_USB_HID is not set
60	69	CONFIG_USB=y
61	70	CONFIG_USB_DEVICEFS=y
@@ -71,7 +80,6 @@ CONFIG_USB_G_SERIAL=m · 9 unmodified lines
71	80	CONFIG_RTC_CLASS=y
72	81	CONFIG_RTC_DRV_AT91SAM9=y
73	82	CONFIG_EXT2_FS=y
74		−CONFIG_INOTIFY=y
75	83	CONFIG_VFAT_FS=y
76	84	CONFIG_TMPFS=y
77	85	CONFIG_CRAMFS=y

arch/arm/configs/at91sam9g20_defconfigrenamed from arch/arm/configs/at91sam9g20ek_defconfig+12−11

@@ -14,6 +14,15 @@ CONFIG_ARCH_AT91=y · 13 unmodified lines
14	14	CONFIG_ARCH_AT91SAM9G20=y
15	15	CONFIG_MACH_AT91SAM9G20EK=y
16	16	CONFIG_MACH_AT91SAM9G20EK_2MMC=y
	17	+CONFIG_MACH_CPU9G20=y
	18	+CONFIG_MACH_ACMENETUSFOXG20=y
	19	+CONFIG_MACH_PORTUXG20=y
	20	+CONFIG_MACH_STAMP9G20=y
	21	+CONFIG_MACH_PCONTROL_G20=y
	22	+CONFIG_MACH_GSIA18S=y
	23	+CONFIG_MACH_USB_A9G20=y
	24	+CONFIG_MACH_SNAPPER_9260=y
	25	+CONFIG_MACH_AT91SAM_DT=y
17	26	CONFIG_AT91_PROGRAMMABLE_CLOCKS=y
18	27	# CONFIG_ARM_THUMB is not set
19	28	CONFIG_AEABI=y
@@ -21,9 +30,10 @@ CONFIG_LEDS=y · 1 unmodified line
21	30	CONFIG_LEDS_CPU=y
22	31	CONFIG_ZBOOT_ROM_TEXT=0x0
23	32	CONFIG_ZBOOT_ROM_BSS=0x0
	33	+CONFIG_ARM_APPENDED_DTB=y
	34	+CONFIG_ARM_ATAG_DTB_COMPAT=y
24	35	CONFIG_CMDLINE="mem=64M console=ttyS0,115200 initrd=0x21100000,3145728 root=/dev/ram0 rw"
25	36	CONFIG_FPE_NWFPE=y
26		−CONFIG_PM=y
27	37	CONFIG_NET=y
28	38	CONFIG_PACKET=y
29	39	CONFIG_UNIX=y
@@ -37,8 +47,6 @@ CONFIG_IP_PNP_BOOTP=y · 7 unmodified lines
37	47	# CONFIG_IPV6 is not set
38	48	CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
39	49	CONFIG_MTD=y
40		−CONFIG_MTD_CONCAT=y
41		−CONFIG_MTD_PARTITIONS=y
42	50	CONFIG_MTD_CMDLINE_PARTS=y
43	51	CONFIG_MTD_CHAR=y
44	52	CONFIG_MTD_BLOCK=y
@@ -48,17 +56,13 @@ CONFIG_MTD_NAND_ATMEL=y · 3 unmodified lines
48	56	CONFIG_BLK_DEV_LOOP=y
49	57	CONFIG_BLK_DEV_RAM=y
50	58	CONFIG_BLK_DEV_RAM_SIZE=8192
51		−CONFIG_ATMEL_SSC=y
52	59	CONFIG_SCSI=y
53	60	CONFIG_BLK_DEV_SD=y
54	61	CONFIG_SCSI_MULTI_LUN=y
55	62	# CONFIG_SCSI_LOWLEVEL is not set
56	63	CONFIG_NETDEVICES=y
57		−CONFIG_NET_ETHERNET=y
58	64	CONFIG_MII=y
59	65	CONFIG_MACB=y
60		−# CONFIG_NETDEV_1000 is not set
61		−# CONFIG_NETDEV_10000 is not set
62	66	# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
63	67	CONFIG_INPUT_MOUSEDEV_SCREEN_X=320
64	68	CONFIG_INPUT_MOUSEDEV_SCREEN_Y=240
@@ -66,15 +70,14 @@ CONFIG_INPUT_EVDEV=y · 1 unmodified line
66	70	# CONFIG_KEYBOARD_ATKBD is not set
67	71	CONFIG_KEYBOARD_GPIO=y
68	72	# CONFIG_INPUT_MOUSE is not set
	73	+CONFIG_LEGACY_PTY_COUNT=16
69	74	CONFIG_SERIAL_ATMEL=y
70	75	CONFIG_SERIAL_ATMEL_CONSOLE=y
71		−CONFIG_LEGACY_PTY_COUNT=16
72	76	CONFIG_HW_RANDOM=y
73	77	CONFIG_SPI=y
74	78	CONFIG_SPI_ATMEL=y
75	79	CONFIG_SPI_SPIDEV=y
76	80	# CONFIG_HWMON is not set
77		−# CONFIG_VGA_CONSOLE is not set
78	81	CONFIG_SOUND=y
79	82	CONFIG_SND=y
80	83	CONFIG_SND_SEQUENCER=y
@@ -82,7 +85,6 @@ CONFIG_SND_MIXER_OSS=y · 1 unmodified line
82	85	CONFIG_SND_PCM_OSS=y
83	86	CONFIG_SND_SEQUENCER_OSS=y
84	87	# CONFIG_SND_VERBOSE_PROCFS is not set
85		−CONFIG_SND_AT73C213=y
86	88	CONFIG_USB=y
87	89	CONFIG_USB_DEVICEFS=y
88	90	# CONFIG_USB_DEVICE_CLASS is not set
@@ -105,7 +107,6 @@ CONFIG_LEDS_TRIGGER_HEARTBEAT=y · 16 unmodified lines
105	107	CONFIG_RTC_CLASS=y
106	108	CONFIG_RTC_DRV_AT91SAM9=y
107	109	CONFIG_EXT2_FS=y
108		−CONFIG_INOTIFY=y
109	110	CONFIG_MSDOS_FS=y
110	111	CONFIG_VFAT_FS=y
111	112	CONFIG_TMPFS=y

arch/arm/configs/at91sam9g45_defconfig+2−5

@@ -18,6 +18,7 @@ CONFIG_MODULE_UNLOAD=y · 17 unmodified lines
18	18	CONFIG_ARCH_AT91=y
19	19	CONFIG_ARCH_AT91SAM9G45=y
20	20	CONFIG_MACH_AT91SAM9M10G45EK=y
	21	+CONFIG_MACH_AT91SAM_DT=y
21	22	CONFIG_AT91_PROGRAMMABLE_CLOCKS=y
22	23	CONFIG_AT91_SLOW_CLOCK=y
23	24	CONFIG_AEABI=y
@@ -73,11 +74,8 @@ CONFIG_SCSI_MULTI_LUN=y · 49 unmodified lines
73	74	# CONFIG_SCSI_LOWLEVEL is not set
74	75	CONFIG_NETDEVICES=y
75	76	CONFIG_MII=y
76		−CONFIG_DAVICOM_PHY=y
77		−CONFIG_NET_ETHERNET=y
78	77	CONFIG_MACB=y
79		−# CONFIG_NETDEV_1000 is not set
80		−# CONFIG_NETDEV_10000 is not set
	78	+CONFIG_DAVICOM_PHY=y
81	79	CONFIG_LIBERTAS_THINFIRM=m
82	80	CONFIG_LIBERTAS_THINFIRM_USB=m
83	81	CONFIG_AT76C50X_USB=m
@@ -131,7 +129,6 @@ CONFIG_I2C_GPIO=y · 47 unmodified lines
131	129	CONFIG_SPI=y
132	130	CONFIG_SPI_ATMEL=y
133	131	# CONFIG_HWMON is not set
134		−# CONFIG_MFD_SUPPORT is not set
135	132	CONFIG_FB=y
136	133	CONFIG_FB_ATMEL=y
137	134	CONFIG_FB_UDL=m

arch/arm/configs/at91sam9rl_defconfigrenamed from arch/arm/configs/at91sam9rlek_defconfig+0−5

@@ -23,8 +23,6 @@ CONFIG_NET=y · 22 unmodified lines
23	23	CONFIG_UNIX=y
24	24	CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
25	25	CONFIG_MTD=y
26		−CONFIG_MTD_CONCAT=y
27		−CONFIG_MTD_PARTITIONS=y
28	26	CONFIG_MTD_CMDLINE_PARTS=y
29	27	CONFIG_MTD_CHAR=y
30	28	CONFIG_MTD_BLOCK=y
@@ -35,7 +33,6 @@ CONFIG_BLK_DEV_LOOP=y · 4 unmodified lines
35	33	CONFIG_BLK_DEV_RAM=y
36	34	CONFIG_BLK_DEV_RAM_COUNT=4
37	35	CONFIG_BLK_DEV_RAM_SIZE=24576
38		−CONFIG_ATMEL_SSC=y
39	36	CONFIG_SCSI=y
40	37	CONFIG_BLK_DEV_SD=y
41	38	CONFIG_SCSI_MULTI_LUN=y
@@ -62,13 +59,11 @@ CONFIG_WATCHDOG_NOWAYOUT=y · 20 unmodified lines
62	59	CONFIG_AT91SAM9X_WATCHDOG=y
63	60	CONFIG_FB=y
64	61	CONFIG_FB_ATMEL=y
65		−# CONFIG_VGA_CONSOLE is not set
66	62	CONFIG_MMC=y
67	63	CONFIG_MMC_AT91=m
68	64	CONFIG_RTC_CLASS=y
69	65	CONFIG_RTC_DRV_AT91SAM9=y
70	66	CONFIG_EXT2_FS=y
71		−CONFIG_INOTIFY=y
72	67	CONFIG_MSDOS_FS=y
73	68	CONFIG_VFAT_FS=y
74	69	CONFIG_TMPFS=y

arch/arm/configs/ezx_defconfig+1−1

@@ -287,7 +287,7 @@ CONFIG_USB=y · 286 unmodified lines
287	287	# CONFIG_USB_DEVICE_CLASS is not set
288	288	CONFIG_USB_OHCI_HCD=y
289	289	CONFIG_USB_GADGET=y
290		−CONFIG_USB_GADGET_PXA27X=y
	290	+CONFIG_USB_PXA27X=y
291	291	CONFIG_USB_ETH=m
292	292	# CONFIG_USB_ETH_RNDIS is not set
293	293	CONFIG_MMC=y

arch/arm/configs/imote2_defconfig+1−1

@@ -263,7 +263,7 @@ CONFIG_USB=y · 262 unmodified lines
263	263	# CONFIG_USB_DEVICE_CLASS is not set
264	264	CONFIG_USB_OHCI_HCD=y
265	265	CONFIG_USB_GADGET=y
266		−CONFIG_USB_GADGET_PXA27X=y
	266	+CONFIG_USB_PXA27X=y
267	267	CONFIG_USB_ETH=m
268	268	# CONFIG_USB_ETH_RNDIS is not set
269	269	CONFIG_MMC=y

arch/arm/configs/magician_defconfig+1−1

@@ -132,7 +132,7 @@ CONFIG_USB_MON=m · 131 unmodified lines
132	132	CONFIG_USB_OHCI_HCD=y
133	133	CONFIG_USB_GADGET=y
134	134	CONFIG_USB_GADGET_VBUS_DRAW=500
135		−CONFIG_USB_GADGET_PXA27X=y
	135	+CONFIG_USB_PXA27X=y
136	136	CONFIG_USB_ETH=m
137	137	# CONFIG_USB_ETH_RNDIS is not set
138	138	CONFIG_USB_GADGETFS=m

arch/arm/configs/omap1_defconfig+0−1

@@ -48,7 +48,6 @@ CONFIG_MACH_SX1=y · 47 unmodified lines
48	48	CONFIG_MACH_NOKIA770=y
49	49	CONFIG_MACH_AMS_DELTA=y
50	50	CONFIG_MACH_OMAP_GENERIC=y
51		−CONFIG_OMAP_CLOCKS_SET_BY_BOOTLOADER=y
52	51	CONFIG_OMAP_ARM_216MHZ=y
53	52	CONFIG_OMAP_ARM_195MHZ=y
54	53	CONFIG_OMAP_ARM_192MHZ=y

arch/arm/configs/u300_defconfig+6−7

@@ -14,8 +14,6 @@ CONFIG_MODULE_UNLOAD=y · 13 unmodified lines
14	14	CONFIG_ARCH_U300=y
15	15	CONFIG_MACH_U300=y
16	16	CONFIG_MACH_U300_BS335=y
17		−CONFIG_MACH_U300_DUAL_RAM=y
18		−CONFIG_U300_DEBUG=y
19	17	CONFIG_MACH_U300_SPIDUMMY=y
20	18	CONFIG_NO_HZ=y
21	19	CONFIG_HIGH_RES_TIMERS=y
@@ -26,19 +24,21 @@ CONFIG_ZBOOT_ROM_BSS=0x0 · 4 unmodified lines
26	24	CONFIG_CMDLINE="root=/dev/ram0 rw rootfstype=rootfs console=ttyAMA0,115200n8 lpj=515072"
27	25	CONFIG_CPU_IDLE=y
28	26	CONFIG_FPE_NWFPE=y
29		−CONFIG_PM=y
30	27	# CONFIG_SUSPEND is not set
31	28	CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
32	29	# CONFIG_PREVENT_FIRMWARE_BUILD is not set
33		−# CONFIG_MISC_DEVICES is not set
	30	+CONFIG_MTD=y
	31	+CONFIG_MTD_CMDLINE_PARTS=y
	32	+CONFIG_MTD_NAND=y
	33	+CONFIG_MTD_NAND_FSMC=y
34	34	# CONFIG_INPUT_MOUSEDEV is not set
35	35	CONFIG_INPUT_EVDEV=y
36	36	# CONFIG_KEYBOARD_ATKBD is not set
37	37	# CONFIG_INPUT_MOUSE is not set
38	38	# CONFIG_SERIO is not set
	39	+CONFIG_LEGACY_PTY_COUNT=16
39	40	CONFIG_SERIAL_AMBA_PL011=y
40	41	CONFIG_SERIAL_AMBA_PL011_CONSOLE=y
41		−CONFIG_LEGACY_PTY_COUNT=16
42	42	# CONFIG_HW_RANDOM is not set
43	43	CONFIG_I2C=y
44	44	# CONFIG_HWMON is not set
@@ -51,6 +51,7 @@ CONFIG_BACKLIGHT_CLASS_DEVICE=y · 6 unmodified lines
51	51	# CONFIG_HID_SUPPORT is not set
52	52	# CONFIG_USB_SUPPORT is not set
53	53	CONFIG_MMC=y
	54	+CONFIG_MMC_CLKGATE=y
54	55	CONFIG_MMC_ARMMMCI=y
55	56	CONFIG_RTC_CLASS=y
56	57	# CONFIG_RTC_HCTOSYS is not set
@@ -65,10 +66,8 @@ CONFIG_NLS_CODEPAGE_437=y · 8 unmodified lines
65	66	CONFIG_NLS_ISO8859_1=y
66	67	CONFIG_PRINTK_TIME=y
67	68	CONFIG_DEBUG_FS=y
68		−CONFIG_DEBUG_KERNEL=y
69	69	# CONFIG_SCHED_DEBUG is not set
70	70	CONFIG_TIMER_STATS=y
71	71	# CONFIG_DEBUG_PREEMPT is not set
72	72	CONFIG_DEBUG_INFO=y
73		−# CONFIG_RCU_CPU_STALL_DETECTOR is not set
74	73	# CONFIG_CRC32 is not set

arch/arm/configs/u8500_defconfig+5−9

@@ -10,7 +10,7 @@ CONFIG_MODULE_UNLOAD=y · 9 unmodified lines
10	10	CONFIG_ARCH_U8500=y
11	11	CONFIG_UX500_SOC_DB5500=y
12	12	CONFIG_UX500_SOC_DB8500=y
13		−CONFIG_MACH_U8500=y
	13	+CONFIG_MACH_HREFV60=y
14	14	CONFIG_MACH_SNOWBALL=y
15	15	CONFIG_MACH_U5500=y
16	16	CONFIG_NO_HZ=y
@@ -24,6 +24,7 @@ CONFIG_CPU_FREQ=y · 7 unmodified lines
24	24	CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y
25	25	CONFIG_VFP=y
26	26	CONFIG_NEON=y
	27	+CONFIG_PM_RUNTIME=y
27	28	CONFIG_NET=y
28	29	CONFIG_PACKET=y
29	30	CONFIG_UNIX=y
@@ -41,11 +42,8 @@ CONFIG_MISC_DEVICES=y · 11 unmodified lines
41	42	CONFIG_AB8500_PWM=y
42	43	CONFIG_SENSORS_BH1780=y
43	44	CONFIG_NETDEVICES=y
44		−CONFIG_SMSC_PHY=y
45		−CONFIG_NET_ETHERNET=y
46	45	CONFIG_SMSC911X=y
47		−# CONFIG_NETDEV_1000 is not set
48		−# CONFIG_NETDEV_10000 is not set
	46	+CONFIG_SMSC_PHY=y
49	47	# CONFIG_WLAN is not set
50	48	# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
51	49	CONFIG_INPUT_EVDEV=y
@@ -72,15 +70,12 @@ CONFIG_SPI=y · 20 unmodified lines
72	70	CONFIG_SPI_PL022=y
73	71	CONFIG_GPIO_STMPE=y
74	72	CONFIG_GPIO_TC3589X=y
75		−# CONFIG_HWMON is not set
76	73	CONFIG_MFD_STMPE=y
77	74	CONFIG_MFD_TC3589X=y
	75	+CONFIG_AB5500_CORE=y
78	76	CONFIG_AB8500_CORE=y
79	77	CONFIG_REGULATOR_AB8500=y
80	78	# CONFIG_HID_SUPPORT is not set
81		−CONFIG_USB_MUSB_HDRC=y
82		−CONFIG_USB_GADGET_MUSB_HDRC=y
83		−CONFIG_MUSB_PIO_ONLY=y
84	79	CONFIG_USB_GADGET=y
85	80	CONFIG_AB8500_USB=y
86	81	CONFIG_MMC=y
@@ -97,6 +92,7 @@ CONFIG_DMADEVICES=y · 10 unmodified lines
97	92	CONFIG_STE_DMA40=y
98	93	CONFIG_STAGING=y
99	94	CONFIG_TOUCHSCREEN_SYNAPTICS_I2C_RMI4=y
	95	+CONFIG_HSEM_U8500=y
100	96	CONFIG_EXT2_FS=y
101	97	CONFIG_EXT2_FS_XATTR=y
102	98	CONFIG_EXT2_FS_POSIX_ACL=y

arch/arm/configs/zeus_defconfig+1−1

@@ -140,7 +140,7 @@ CONFIG_USB_SERIAL=m · 139 unmodified lines
140	140	CONFIG_USB_SERIAL_GENERIC=y
141	141	CONFIG_USB_SERIAL_MCT_U232=m
142	142	CONFIG_USB_GADGET=m
143		−CONFIG_USB_GADGET_PXA27X=y
	143	+CONFIG_USB_PXA27X=y
144	144	CONFIG_USB_ETH=m
145	145	CONFIG_USB_GADGETFS=m
146	146	CONFIG_USB_FILE_STORAGE=m

arch/arm/mach-exynos/cpuidle.c+2−0

@@ -12,6 +12,8 @@ · 11 unmodified lines
12	12	#include <linux/init.h>
13	13	#include <linux/cpuidle.h>
14	14	#include <linux/io.h>
	15	+#include <linux/export.h>
	16	+#include <linux/time.h>
15	17
16	18	#include <asm/proc-fns.h>
17	19

arch/arm/mach-highbank/highbank.c+4−0

@@ -22,6 +22,7 @@ · 21 unmodified lines
22	22	#include <linux/of_irq.h>
23	23	#include <linux/of_platform.h>
24	24	#include <linux/of_address.h>
	25	+#include <linux/smp.h>
25	26
26	27	#include <asm/cacheflush.h>
27	28	#include <asm/unified.h>
@@ -72,6 +73,9 @@ static void __init highbank_map_io(void) · 44 unmodified lines
72	73
73	74	void highbank_set_cpu_jump(int cpu, void *jump_addr)
74	75	{
	76	+#ifdef CONFIG_SMP
	77	+ cpu = cpu_logical_map(cpu);
	78	+#endif
75	79	writel(BSYM(virt_to_phys(jump_addr)), HB_JUMP_TABLE_VIRT(cpu));
76	80	__cpuc_flush_dcache_area(HB_JUMP_TABLE_VIRT(cpu), 16);
77	81	outer_clean_range(HB_JUMP_TABLE_PHYS(cpu),

arch/arm/mach-imx/Kconfig+0−13

@@ -10,11 +10,6 @@ config HAVE_IMX_MMDC · 9 unmodified lines
10	10	config HAVE_IMX_SRC
11	11	bool
12	12
13		−#
14		−# ARCH_MX31 and ARCH_MX35 are left for compatibility
15		−# Some usages assume that having one of them implies not having (e.g.) ARCH_MX2.
16		−# To easily distinguish good and reviewed from unreviewed usages new (and IMHO
17		−# more sensible) names are used: SOC_IMX31 and SOC_IMX35
18	13	config ARCH_MX1
19	14	bool
20	15
@@ -27,12 +22,6 @@ config ARCH_MX25 · 6 unmodified lines
27	22	config MACH_MX27
28	23	bool
29	24
30		−config ARCH_MX31
31		− bool
32		−
33		−config ARCH_MX35
34		− bool
35		−
36	25	config SOC_IMX1
37	26	bool
38	27	select ARCH_MX1
@@ -72,7 +61,6 @@ config SOC_IMX31 · 33 unmodified lines
72	61	select CPU_V6
73	62	select IMX_HAVE_PLATFORM_MXC_RNGA
74	63	select ARCH_MXC_AUDMUX_V2
75		− select ARCH_MX31
76	64	select MXC_AVIC
77	65	select SMP_ON_UP if SMP
78	66
@@ -82,7 +70,6 @@ config SOC_IMX35 · 3 unmodified lines
82	70	select ARCH_MXC_IOMUX_V3
83	71	select ARCH_MXC_AUDMUX_V2
84	72	select HAVE_EPIT
85		− select ARCH_MX35
86	73	select MXC_AVIC
87	74	select SMP_ON_UP if SMP
88	75

arch/arm/mach-imx/clock-imx6q.c+5−2

@@ -1953,14 +1953,17 @@ static struct map_desc imx6q_clock_desc[] = { · 1952 unmodified lines
1953	1953	imx_map_entry(MX6Q, ANATOP, MT_DEVICE),
1954	1954	};
1955	1955
	1956	+void __init imx6q_clock_map_io(void)
	1957	+{
	1958	+ iotable_init(imx6q_clock_desc, ARRAY_SIZE(imx6q_clock_desc));
	1959	+}
	1960	+
1956	1961	int __init mx6q_clocks_init(void)
1957	1962	{
1958	1963	struct device_node *np;
1959	1964	void __iomem *base;
1960	1965	int i, irq;
1961	1966
1962		− iotable_init(imx6q_clock_desc, ARRAY_SIZE(imx6q_clock_desc));
1963		−
1964	1967	/* retrieve the freqency of fixed clocks from device tree */
1965	1968	for_each_compatible_node(np, NULL, "fixed-clock") {
1966	1969	u32 rate;

arch/arm/mach-imx/mach-imx6q.c+1−0

@@ -34,6 +34,7 @@ static void __init imx6q_map_io(void) · 33 unmodified lines
34	34	{
35	35	imx_lluart_map_io();
36	36	imx_scu_map_io();
	37	+ imx6q_clock_map_io();
37	38	}
38	39
39	40	static void __init imx6q_gpio_add_irq_domain(struct device_node *np,

arch/arm/mach-imx/mm-imx3.c+58−51

@@ -33,29 +33,32 @@ · 32 unmodified lines
33	33	static void imx3_idle(void)
34	34	{
35	35	unsigned long reg = 0;
36		− __asm__ __volatile__(
37		− /* disable I and D cache */
38		− "mrc p15, 0, %0, c1, c0, 0\n"
39		− "bic %0, %0, #0x00001000\n"
40		− "bic %0, %0, #0x00000004\n"
41		− "mcr p15, 0, %0, c1, c0, 0\n"
42		− /* invalidate I cache */
43		− "mov %0, #0\n"
44		− "mcr p15, 0, %0, c7, c5, 0\n"
45		− /* clear and invalidate D cache */
46		− "mov %0, #0\n"
47		− "mcr p15, 0, %0, c7, c14, 0\n"
48		− /* WFI */
49		− "mov %0, #0\n"
50		− "mcr p15, 0, %0, c7, c0, 4\n"
51		− "nop\n" "nop\n" "nop\n" "nop\n"
52		− "nop\n" "nop\n" "nop\n"
53		− /* enable I and D cache */
54		− "mrc p15, 0, %0, c1, c0, 0\n"
55		− "orr %0, %0, #0x00001000\n"
56		− "orr %0, %0, #0x00000004\n"
57		− "mcr p15, 0, %0, c1, c0, 0\n"
58		− : "=r" (reg));
	36	+
	37	+ if (!need_resched())
	38	+ __asm__ __volatile__(
	39	+ /* disable I and D cache */
	40	+ "mrc p15, 0, %0, c1, c0, 0\n"
	41	+ "bic %0, %0, #0x00001000\n"
	42	+ "bic %0, %0, #0x00000004\n"
	43	+ "mcr p15, 0, %0, c1, c0, 0\n"
	44	+ /* invalidate I cache */
	45	+ "mov %0, #0\n"
	46	+ "mcr p15, 0, %0, c7, c5, 0\n"
	47	+ /* clear and invalidate D cache */
	48	+ "mov %0, #0\n"
	49	+ "mcr p15, 0, %0, c7, c14, 0\n"
	50	+ /* WFI */
	51	+ "mov %0, #0\n"
	52	+ "mcr p15, 0, %0, c7, c0, 4\n"
	53	+ "nop\n" "nop\n" "nop\n" "nop\n"
	54	+ "nop\n" "nop\n" "nop\n"
	55	+ /* enable I and D cache */
	56	+ "mrc p15, 0, %0, c1, c0, 0\n"
	57	+ "orr %0, %0, #0x00001000\n"
	58	+ "orr %0, %0, #0x00000004\n"
	59	+ "mcr p15, 0, %0, c1, c0, 0\n"
	60	+ : "=r" (reg));
	61	+ local_irq_enable();
59	62	}
60	63
61	64	static void __iomem *imx3_ioremap(unsigned long phys_addr, size_t size,
@@ -108,6 +111,7 @@ void imx3_init_l2x0(void) · 46 unmodified lines
108	111	l2x0_init(l2x0_base, 0x00030024, 0x00000000);
109	112	}
110	113
	114	+#ifdef CONFIG_SOC_IMX31
111	115	static struct map_desc mx31_io_desc[] __initdata = {
112	116	imx_map_entry(MX31, X_MEMC, MT_DEVICE),
113	117	imx_map_entry(MX31, AVIC, MT_DEVICE_NONSHARED),
@@ -126,33 +130,11 @@ void __init mx31_map_io(void) · 12 unmodified lines
126	130	iotable_init(mx31_io_desc, ARRAY_SIZE(mx31_io_desc));
127	131	}
128	132
129		−static struct map_desc mx35_io_desc[] __initdata = {
130		− imx_map_entry(MX35, X_MEMC, MT_DEVICE),
131		− imx_map_entry(MX35, AVIC, MT_DEVICE_NONSHARED),
132		− imx_map_entry(MX35, AIPS1, MT_DEVICE_NONSHARED),
133		− imx_map_entry(MX35, AIPS2, MT_DEVICE_NONSHARED),
134		− imx_map_entry(MX35, SPBA0, MT_DEVICE_NONSHARED),
135		−};
136		−
137		−void __init mx35_map_io(void)
138		−{
139		− iotable_init(mx35_io_desc, ARRAY_SIZE(mx35_io_desc));
140		−}
141		−
142	133	void __init imx31_init_early(void)
143	134	{
144	135	mxc_set_cpu_type(MXC_CPU_MX31);
145	136	mxc_arch_reset_init(MX31_IO_ADDRESS(MX31_WDOG_BASE_ADDR));
146		− imx_idle = imx3_idle;
147		− imx_ioremap = imx3_ioremap;
148		−}
149		−
150		−void __init imx35_init_early(void)
151		−{
152		− mxc_set_cpu_type(MXC_CPU_MX35);
153		− mxc_iomux_v3_init(MX35_IO_ADDRESS(MX35_IOMUXC_BASE_ADDR));
154		− mxc_arch_reset_init(MX35_IO_ADDRESS(MX35_WDOG_BASE_ADDR));
155		− imx_idle = imx3_idle;
	137	+ pm_idle = imx3_idle;
156	138	imx_ioremap = imx3_ioremap;
157	139	}
158	140
@@ -161,11 +143,6 @@ void __init mx31_init_irq(void) · 2 unmodified lines
161	143	mxc_init_irq(MX31_IO_ADDRESS(MX31_AVIC_BASE_ADDR));
162	144	}
163	145
164		−void __init mx35_init_irq(void)
165		−{
166		− mxc_init_irq(MX35_IO_ADDRESS(MX35_AVIC_BASE_ADDR));
167		−}
168		−
169	146	static struct sdma_script_start_addrs imx31_to1_sdma_script __initdata = {
170	147	.per_2_per_addr = 1677,
171	148	};
@@ -199,6 +176,35 @@ void __init imx31_soc_init(void) · 27 unmodified lines
199	176
200	177	imx_add_imx_sdma("imx31-sdma", MX31_SDMA_BASE_ADDR, MX31_INT_SDMA, &imx31_sdma_pdata);
201	178	}
	179	+#endif /* ifdef CONFIG_SOC_IMX31 */
	180	+
	181	+#ifdef CONFIG_SOC_IMX35
	182	+static struct map_desc mx35_io_desc[] __initdata = {
	183	+ imx_map_entry(MX35, X_MEMC, MT_DEVICE),
	184	+ imx_map_entry(MX35, AVIC, MT_DEVICE_NONSHARED),
	185	+ imx_map_entry(MX35, AIPS1, MT_DEVICE_NONSHARED),
	186	+ imx_map_entry(MX35, AIPS2, MT_DEVICE_NONSHARED),
	187	+ imx_map_entry(MX35, SPBA0, MT_DEVICE_NONSHARED),
	188	+};
	189	+
	190	+void __init mx35_map_io(void)
	191	+{
	192	+ iotable_init(mx35_io_desc, ARRAY_SIZE(mx35_io_desc));
	193	+}
	194	+
	195	+void __init imx35_init_early(void)
	196	+{
	197	+ mxc_set_cpu_type(MXC_CPU_MX35);
	198	+ mxc_iomux_v3_init(MX35_IO_ADDRESS(MX35_IOMUXC_BASE_ADDR));
	199	+ mxc_arch_reset_init(MX35_IO_ADDRESS(MX35_WDOG_BASE_ADDR));
	200	+ pm_idle = imx3_idle;
	201	+ imx_ioremap = imx3_ioremap;
	202	+}
	203	+
	204	+void __init mx35_init_irq(void)
	205	+{
	206	+ mxc_init_irq(MX35_IO_ADDRESS(MX35_AVIC_BASE_ADDR));
	207	+}
202	208
203	209	static struct sdma_script_start_addrs imx35_to1_sdma_script __initdata = {
204	210	.ap_2_ap_addr = 642,
@@ -254,3 +260,4 @@ void __init imx35_soc_init(void) · 49 unmodified lines
254	260
255	261	imx_add_imx_sdma("imx35-sdma", MX35_SDMA_BASE_ADDR, MX35_INT_SDMA, &imx35_sdma_pdata);
256	262	}
	263	+#endif /* ifdef CONFIG_SOC_IMX35 */

arch/arm/mach-imx/src.c+7−0

@@ -14,6 +14,7 @@ · 13 unmodified lines
14	14	#include <linux/io.h>
15	15	#include <linux/of.h>
16	16	#include <linux/of_address.h>
	17	+#include <linux/smp.h>
17	18	#include <asm/unified.h>
18	19
19	20	#define SRC_SCR 0x000
@@ -23,10 +24,15 @@ · 3 unmodified lines
23	24
24	25	static void __iomem *src_base;
25	26
	27	+#ifndef CONFIG_SMP
	28	+#define cpu_logical_map(cpu) 0
	29	+#endif
	30	+
26	31	void imx_enable_cpu(int cpu, bool enable)
27	32	{
28	33	u32 mask, val;
29	34
	35	+ cpu = cpu_logical_map(cpu);
30	36	mask = 1 << (BP_SRC_SCR_CORE1_ENABLE + cpu - 1);
31	37	val = readl_relaxed(src_base + SRC_SCR);
32	38	val = enable ? val \| mask : val & ~mask;
@@ -35,6 +41,7 @@ void imx_enable_cpu(int cpu, bool enable) · 2 unmodified lines
35	41
36	42	void imx_set_cpu_jump(int cpu, void *jump_addr)
37	43	{
	44	+ cpu = cpu_logical_map(cpu);
38	45	writel_relaxed(BSYM(virt_to_phys(jump_addr)),
39	46	src_base + SRC_GPR1 + cpu * 8);
40	47	}

arch/arm/mach-mmp/gplugd.c+1−1

@@ -182,7 +182,7 @@ static void __init gplugd_init(void) · 181 unmodified lines
182	182
183	183	/* on-chip devices */
184	184	pxa168_add_uart(3);
185		− pxa168_add_ssp(0);
	185	+ pxa168_add_ssp(1);
186	186	pxa168_add_twsi(0, NULL, ARRAY_AND_SIZE(gplugd_i2c_board_info));
187	187
188	188	pxa168_add_eth(&gplugd_eth_platform_data);

arch/arm/mach-mmp/include/mach/gpio-pxa.h+1−1

@@ -7,7 +7,7 @@ · 6 unmodified lines
7	7	#define GPIO_REGS_VIRT (APB_VIRT_BASE + 0x19000)
8	8
9	9	#define BANK_OFF(n) (((n) < 3) ? (n) << 2 : 0x100 + (((n) - 3) << 2))
10		−#define GPIO_REG(x) (GPIO_REGS_VIRT + (x))
	10	+#define GPIO_REG(x) ((volatile u32 )(GPIO_REGS_VIRT + (x)))
11	11
12	12	#define NR_BUILTIN_GPIO IRQ_GPIO_NUM
13	13

arch/arm/mach-mx5/cpu.c+3−2

@@ -16,7 +16,7 @@ · 15 unmodified lines
16	16	#include <linux/init.h>
17	17	#include <linux/module.h>
18	18	#include <mach/hardware.h>
19		−#include <asm/io.h>
	19	+#include <linux/io.h>
20	20
21	21	static int mx5_cpu_rev = -1;
22	22
@@ -67,7 +67,8 @@ static int __init mx51_neon_fixup(void) · 44 unmodified lines
67	67	if (!cpu_is_mx51())
68	68	return 0;
69	69
70		− if (mx51_revision() < IMX_CHIP_REVISION_3_0 && (elf_hwcap & HWCAP_NEON)) {
	70	+ if (mx51_revision() < IMX_CHIP_REVISION_3_0 &&
	71	+ (elf_hwcap & HWCAP_NEON)) {
71	72	elf_hwcap &= ~HWCAP_NEON;
72	73	pr_info("Turning off NEON support, detected broken NEON implementation\n");
73	74	}

arch/arm/mach-mx5/mm.c+4−2

@@ -23,7 +23,9 @@ · 22 unmodified lines
23	23
24	24	static void imx5_idle(void)
25	25	{
26		− mx5_cpu_lp_set(WAIT_UNCLOCKED_POWER_OFF);
	26	+ if (!need_resched())
	27	+ mx5_cpu_lp_set(WAIT_UNCLOCKED_POWER_OFF);
	28	+ local_irq_enable();
27	29	}
28	30
29	31	/*
@@ -89,7 +91,7 @@ void __init imx51_init_early(void) · 59 unmodified lines
89	91	mxc_set_cpu_type(MXC_CPU_MX51);
90	92	mxc_iomux_v3_init(MX51_IO_ADDRESS(MX51_IOMUXC_BASE_ADDR));
91	93	mxc_arch_reset_init(MX51_IO_ADDRESS(MX51_WDOG1_BASE_ADDR));
92		− imx_idle = imx5_idle;
	94	+ pm_idle = imx5_idle;
93	95	}
94	96
95	97	void __init imx53_init_early(void)

arch/arm/mach-mxs/clock-mx28.c+1−1

@@ -404,7 +404,7 @@ static int name##_set_rate(struct clk *clk, unsigned long rate) \ · 403 unmodified lines
404	404	reg = __raw_readl(CLKCTRL_BASE_ADDR + HW_CLKCTRL_##dr); \
405	405	reg &= ~BM_CLKCTRL_##dr##_DIV; \
406	406	reg \|= div << BP_CLKCTRL_##dr##_DIV; \
407		− if (reg \| (1 << clk->enable_shift)) { \
	407	+ if (reg & (1 << clk->enable_shift)) { \
408	408	pr_err("%s: clock is gated\n", __func__); \
409	409	return -EINVAL; \
410	410	} \

arch/arm/mach-omap1/Kconfig+0−8

@@ -171,14 +171,6 @@ config MACH_OMAP_GENERIC · 170 unmodified lines
171	171	comment "OMAP CPU Speed"
172	172	depends on ARCH_OMAP1
173	173
174		−config OMAP_CLOCKS_SET_BY_BOOTLOADER
175		− bool "OMAP clocks set by bootloader"
176		− depends on ARCH_OMAP1
177		− help
178		− Enable this option to prevent the kernel from overriding the clock
179		− frequencies programmed by bootloader for MPU, DSP, MMUs, TC,
180		− internal LCD controller and MPU peripherals.
181		−
182	174	config OMAP_ARM_216MHZ
183	175	bool "OMAP ARM 216 MHz CPU (1710 only)"
184	176	depends on ARCH_OMAP1 && ARCH_OMAP16XX

arch/arm/mach-omap1/board-ams-delta.c+7−3

@@ -302,8 +302,6 @@ static void __init ams_delta_init(void) · 301 unmodified lines
302	302	omap_cfg_reg(J19_1610_CAM_D6);
303	303	omap_cfg_reg(J18_1610_CAM_D7);
304	304
305		− iotable_init(ams_delta_io_desc, ARRAY_SIZE(ams_delta_io_desc));
306		−
307	305	omap_board_config = ams_delta_config;
308	306	omap_board_config_size = ARRAY_SIZE(ams_delta_config);
309	307	omap_serial_init();
@@ -373,10 +371,16 @@ static int __init ams_delta_modem_init(void) · 63 unmodified lines
373	371	}
374	372	arch_initcall(ams_delta_modem_init);
375	373
	374	+static void __init ams_delta_map_io(void)
	375	+{
	376	+ omap15xx_map_io();
	377	+ iotable_init(ams_delta_io_desc, ARRAY_SIZE(ams_delta_io_desc));
	378	+}
	379	+
376	380	MACHINE_START(AMS_DELTA, "Amstrad E3 (Delta)")
377	381	/* Maintainer: Jonathan McDowell <noodles@earth.li> */
378	382	.atag_offset = 0x100,
379		− .map_io = omap15xx_map_io,
	383	+ .map_io = ams_delta_map_io,
380	384	.init_early = omap1_init_early,
381	385	.reserve = omap_reserve,
382	386	.init_irq = omap1_init_irq,

arch/arm/mach-omap1/clock.h+2−1

@@ -17,7 +17,8 @@ · 16 unmodified lines
17	17
18	18	#include <plat/clock.h>
19	19
20		−extern int __init omap1_clk_init(void);
	20	+int omap1_clk_init(void);
	21	+void omap1_clk_late_init(void);
21	22	extern int omap1_clk_enable(struct clk *clk);
22	23	extern void omap1_clk_disable(struct clk *clk);
23	24	extern long omap1_clk_round_rate(struct clk *clk, unsigned long rate);

arch/arm/mach-omap1/clock_data.c+34−19

@@ -767,6 +767,15 @@ static struct clk_functions omap1_clk_functions = { · 766 unmodified lines
767	767	.clk_disable_unused = omap1_clk_disable_unused,
768	768	};
769	769
	770	+static void __init omap1_show_rates(void)
	771	+{
	772	+ pr_notice("Clocking rate (xtal/DPLL1/MPU): "
	773	+ "%ld.%01ld/%ld.%01ld/%ld.%01ld MHz\n",
	774	+ ck_ref.rate / 1000000, (ck_ref.rate / 100000) % 10,
	775	+ ck_dpll1.rate / 1000000, (ck_dpll1.rate / 100000) % 10,
	776	+ arm_ck.rate / 1000000, (arm_ck.rate / 100000) % 10);
	777	+}
	778	+
770	779	int __init omap1_clk_init(void)
771	780	{
772	781	struct omap_clk *c;
@@ -835,9 +844,12 @@ int __init omap1_clk_init(void) · 62 unmodified lines
835	844	/* We want to be in syncronous scalable mode */
836	845	omap_writew(0x1000, ARM_SYSST);
837	846
838		−#ifdef CONFIG_OMAP_CLOCKS_SET_BY_BOOTLOADER
839		− /* Use values set by bootloader. Determine PLL rate and recalculate
840		− * dependent clocks as if kernel had changed PLL or divisors.
	847	+
	848	+ /*
	849	+ * Initially use the values set by bootloader. Determine PLL rate and
	850	+ * recalculate dependent clocks as if kernel had changed PLL or
	851	+ * divisors. See also omap1_clk_late_init() that can reprogram dpll1
	852	+ * after the SRAM is initialized.
841	853	*/
842	854	{
843	855	unsigned pll_ctl_val = omap_readw(DPLL_CTL);
@@ -862,25 +874,10 @@ int __init omap1_clk_init(void) · 18 unmodified lines
862	874	}
863	875	}
864	876	}
865		−#else
866		− /* Find the highest supported frequency and enable it */
867		− if (omap1_select_table_rate(&virtual_ck_mpu, ~0)) {
868		− printk(KERN_ERR "System frequencies not set. Check your config.\n");
869		− /* Guess sane values (60MHz) */
870		− omap_writew(0x2290, DPLL_CTL);
871		− omap_writew(cpu_is_omap7xx() ? 0x3005 : 0x1005, ARM_CKCTL);
872		− ck_dpll1.rate = 60000000;
873		− }
874		−#endif
875	877	propagate_rate(&ck_dpll1);
876	878	/* Cache rates for clocks connected to ck_ref (not dpll1) */
877	879	propagate_rate(&ck_ref);
878		− printk(KERN_INFO "Clocking rate (xtal/DPLL1/MPU): "
879		− "%ld.%01ld/%ld.%01ld/%ld.%01ld MHz\n",
880		− ck_ref.rate / 1000000, (ck_ref.rate / 100000) % 10,
881		− ck_dpll1.rate / 1000000, (ck_dpll1.rate / 100000) % 10,
882		− arm_ck.rate / 1000000, (arm_ck.rate / 100000) % 10);
883		−
	880	+ omap1_show_rates();
884	881	if (machine_is_omap_perseus2() \|\| machine_is_omap_fsample()) {
885	882	/* Select slicer output as OMAP input clock */
886	883	omap_writew(omap_readw(OMAP7XX_PCC_UPLD_CTRL) & ~0x1,
@@ -925,3 +922,21 @@ int __init omap1_clk_init(void) · 38 unmodified lines
925	922
926	923	return 0;
927	924	}
	925	+
	926	+#define OMAP1_DPLL1_SANE_VALUE 60000000
	927	+
	928	+void __init omap1_clk_late_init(void)
	929	+{
	930	+ if (ck_dpll1.rate >= OMAP1_DPLL1_SANE_VALUE)
	931	+ return;
	932	+
	933	+ /* Find the highest supported frequency and enable it */
	934	+ if (omap1_select_table_rate(&virtual_ck_mpu, ~0)) {
	935	+ pr_err("System frequencies not set, using default. Check your config.\n");
	936	+ omap_writew(0x2290, DPLL_CTL);
	937	+ omap_writew(cpu_is_omap7xx() ? 0x3005 : 0x1005, ARM_CKCTL);
	938	+ ck_dpll1.rate = OMAP1_DPLL1_SANE_VALUE;
	939	+ }
	940	+ propagate_rate(&ck_dpll1);
	941	+ omap1_show_rates();
	942	+}

arch/arm/mach-omap1/devices.c+3−0

@@ -30,6 +30,8 @@ · 29 unmodified lines
30	30	#include <plat/omap7xx.h>
31	31	#include <plat/mcbsp.h>
32	32
	33	+#include "clock.h"
	34	+
33	35	/-------------------------------------------------------------------------/
34	36
35	37	#if defined(CONFIG_RTC_DRV_OMAP) \|\| defined(CONFIG_RTC_DRV_OMAP_MODULE)
@@ -293,6 +295,7 @@ static int __init omap1_init_devices(void) · 257 unmodified lines
293	295	return -ENODEV;
294	296
295	297	omap_sram_init();
	298	+ omap1_clk_late_init();
296	299
297	300	/* please keep these calls, and their implementations above,
298	301	* in alphabetical order so they're easier to sort through.

arch/arm/mach-omap2/Kconfig+1−0

@@ -334,6 +334,7 @@ config MACH_OMAP4_PANDA · 333 unmodified lines
334	334	config OMAP3_EMU
335	335	bool "OMAP3 debugging peripherals"
336	336	depends on ARCH_OMAP3
	337	+ select ARM_AMBA
337	338	select OC_ETM
338	339	help
339	340	Say Y here to enable debugging hardware of omap3

arch/arm/mach-omap2/Makefile+1−4

@@ -4,7 +4,7 @@ · 3 unmodified lines
4	4
5	5	# Common support
6	6	obj-y := id.o io.o control.o mux.o devices.o serial.o gpmc.o timer.o pm.o \
7		− common.o gpio.o dma.o wd_timer.o
	7	+ common.o gpio.o dma.o wd_timer.o display.o
8	8
9	9	omap-2-3-common = irq.o sdrc.o
10	10	hwmod-common = omap_hwmod.o \
@@ -264,7 +264,4 @@ smsc911x-$(CONFIG_SMSC911X) := gpmc-smsc911x.o · 253 unmodified lines
264	264	obj-y += $(smsc911x-m) $(smsc911x-y)
265	265	obj-$(CONFIG_ARCH_OMAP4) += hwspinlock.o
266	266
267		−disp-$(CONFIG_OMAP2_DSS) := display.o
268		−obj-y += $(disp-m) $(disp-y)
269		−
270	267	obj-y += common-board-devices.o twl-common.o

arch/arm/mach-omap2/cpuidle34xx.c+1−0

@@ -24,6 +24,7 @@ · 23 unmodified lines
24	24
25	25	#include <linux/sched.h>
26	26	#include <linux/cpuidle.h>
	27	+#include <linux/export.h>
27	28
28	29	#include <plat/prcm.h>
29	30	#include <plat/irqs.h>

arch/arm/mach-omap2/display.c+159−0

@@ -27,8 +27,35 @@ · 26 unmodified lines
27	27	#include <plat/omap_hwmod.h>
28	28	#include <plat/omap_device.h>
29	29	#include <plat/omap-pm.h>
	30	+#include <plat/common.h>
30	31
31	32	#include "control.h"
	33	+#include "display.h"
	34	+
	35	+#define DISPC_CONTROL 0x0040
	36	+#define DISPC_CONTROL2 0x0238
	37	+#define DISPC_IRQSTATUS 0x0018
	38	+
	39	+#define DSS_SYSCONFIG 0x10
	40	+#define DSS_SYSSTATUS 0x14
	41	+#define DSS_CONTROL 0x40
	42	+#define DSS_SDI_CONTROL 0x44
	43	+#define DSS_PLL_CONTROL 0x48
	44	+
	45	+#define LCD_EN_MASK (0x1 << 0)
	46	+#define DIGIT_EN_MASK (0x1 << 1)
	47	+
	48	+#define FRAMEDONE_IRQ_SHIFT 0
	49	+#define EVSYNC_EVEN_IRQ_SHIFT 2
	50	+#define EVSYNC_ODD_IRQ_SHIFT 3
	51	+#define FRAMEDONE2_IRQ_SHIFT 22
	52	+#define FRAMEDONETV_IRQ_SHIFT 24
	53	+
	54	+/*
	55	+ * FRAMEDONE_IRQ_TIMEOUT: how long (in milliseconds) to wait during DISPC
	56	+ * reset before deciding that something has gone wrong
	57	+ */
	58	+#define FRAMEDONE_IRQ_TIMEOUT 100
32	59
33	60	static struct platform_device omap_display_device = {
34	61	.name = "omapdss",
@@ -172,3 +199,135 @@ int __init omap_display_init(struct omap_dss_board_info *board_data) · 137 unmodified lines
172	199
173	200	return r;
174	201	}
	202	+
	203	+static void dispc_disable_outputs(void)
	204	+{
	205	+ u32 v, irq_mask = 0;
	206	+ bool lcd_en, digit_en, lcd2_en = false;
	207	+ int i;
	208	+ struct omap_dss_dispc_dev_attr *da;
	209	+ struct omap_hwmod *oh;
	210	+
	211	+ oh = omap_hwmod_lookup("dss_dispc");
	212	+ if (!oh) {
	213	+ WARN(1, "display: could not disable outputs during reset - could not find dss_dispc hwmod\n");
	214	+ return;
	215	+ }
	216	+
	217	+ if (!oh->dev_attr) {
	218	+ pr_err("display: could not disable outputs during reset due to missing dev_attr\n");
	219	+ return;
	220	+ }
	221	+
	222	+ da = (struct omap_dss_dispc_dev_attr *)oh->dev_attr;
	223	+
	224	+ /* store value of LCDENABLE and DIGITENABLE bits */
	225	+ v = omap_hwmod_read(oh, DISPC_CONTROL);
	226	+ lcd_en = v & LCD_EN_MASK;
	227	+ digit_en = v & DIGIT_EN_MASK;
	228	+
	229	+ /* store value of LCDENABLE for LCD2 */
	230	+ if (da->manager_count > 2) {
	231	+ v = omap_hwmod_read(oh, DISPC_CONTROL2);
	232	+ lcd2_en = v & LCD_EN_MASK;
	233	+ }
	234	+
	235	+ if (!(lcd_en \| digit_en \| lcd2_en))
	236	+ return; /* no managers currently enabled */
	237	+
	238	+ /*
	239	+ * If any manager was enabled, we need to disable it before
	240	+ * DSS clocks are disabled or DISPC module is reset
	241	+ */
	242	+ if (lcd_en)
	243	+ irq_mask \|= 1 << FRAMEDONE_IRQ_SHIFT;
	244	+
	245	+ if (digit_en) {
	246	+ if (da->has_framedonetv_irq) {
	247	+ irq_mask \|= 1 << FRAMEDONETV_IRQ_SHIFT;
	248	+ } else {
	249	+ irq_mask \|= 1 << EVSYNC_EVEN_IRQ_SHIFT \|
	250	+ 1 << EVSYNC_ODD_IRQ_SHIFT;
	251	+ }
	252	+ }
	253	+
	254	+ if (lcd2_en)
	255	+ irq_mask \|= 1 << FRAMEDONE2_IRQ_SHIFT;
	256	+
	257	+ /*
	258	+ * clear any previous FRAMEDONE, FRAMEDONETV,
	259	+ * EVSYNC_EVEN/ODD or FRAMEDONE2 interrupts
	260	+ */
	261	+ omap_hwmod_write(irq_mask, oh, DISPC_IRQSTATUS);
	262	+
	263	+ /* disable LCD and TV managers */
	264	+ v = omap_hwmod_read(oh, DISPC_CONTROL);
	265	+ v &= ~(LCD_EN_MASK \| DIGIT_EN_MASK);
	266	+ omap_hwmod_write(v, oh, DISPC_CONTROL);
	267	+
	268	+ /* disable LCD2 manager */
	269	+ if (da->manager_count > 2) {
	270	+ v = omap_hwmod_read(oh, DISPC_CONTROL2);
	271	+ v &= ~LCD_EN_MASK;
	272	+ omap_hwmod_write(v, oh, DISPC_CONTROL2);
	273	+ }
	274	+
	275	+ i = 0;
	276	+ while ((omap_hwmod_read(oh, DISPC_IRQSTATUS) & irq_mask) !=
	277	+ irq_mask) {
	278	+ i++;
	279	+ if (i > FRAMEDONE_IRQ_TIMEOUT) {
	280	+ pr_err("didn't get FRAMEDONE1/2 or TV interrupt\n");
	281	+ break;
	282	+ }
	283	+ mdelay(1);
	284	+ }
	285	+}
	286	+
	287	+#define MAX_MODULE_SOFTRESET_WAIT 10000
	288	+int omap_dss_reset(struct omap_hwmod *oh)
	289	+{
	290	+ struct omap_hwmod_opt_clk *oc;
	291	+ int c = 0;
	292	+ int i, r;
	293	+
	294	+ if (!(oh->class->sysc->sysc_flags & SYSS_HAS_RESET_STATUS)) {
	295	+ pr_err("dss_core: hwmod data doesn't contain reset data\n");
	296	+ return -EINVAL;
	297	+ }
	298	+
	299	+ for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
	300	+ if (oc->_clk)
	301	+ clk_enable(oc->_clk);
	302	+
	303	+ dispc_disable_outputs();
	304	+
	305	+ /* clear SDI registers */
	306	+ if (cpu_is_omap3430()) {
	307	+ omap_hwmod_write(0x0, oh, DSS_SDI_CONTROL);
	308	+ omap_hwmod_write(0x0, oh, DSS_PLL_CONTROL);
	309	+ }
	310	+
	311	+ /*
	312	+ * clear DSS_CONTROL register to switch DSS clock sources to
	313	+ * PRCM clock, if any
	314	+ */
	315	+ omap_hwmod_write(0x0, oh, DSS_CONTROL);
	316	+
	317	+ omap_test_timeout((omap_hwmod_read(oh, oh->class->sysc->syss_offs)
	318	+ & SYSS_RESETDONE_MASK),
	319	+ MAX_MODULE_SOFTRESET_WAIT, c);
	320	+
	321	+ if (c == MAX_MODULE_SOFTRESET_WAIT)
	322	+ pr_warning("dss_core: waiting for reset to finish failed\n");
	323	+ else
	324	+ pr_debug("dss_core: softreset done\n");
	325	+
	326	+ for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
	327	+ if (oc->_clk)
	328	+ clk_disable(oc->_clk);
	329	+
	330	+ r = (c == MAX_MODULE_SOFTRESET_WAIT) ? -ETIMEDOUT : 0;
	331	+
	332	+ return r;
	333	+}

arch/arm/mach-omap2/display.h+29−0

@@ -0,0 +1,29 @@
	1	+/*
	2	+ * display.h - OMAP2+ integration-specific DSS header
	3	+ *
	4	+ * Copyright (C) 2011 Texas Instruments, Inc.
	5	+ *
	6	+ * This program is free software; you can redistribute it and/or modify it
	7	+ * under the terms of the GNU General Public License version 2 as published by
	8	+ * the Free Software Foundation.
	9	+ *
	10	+ * This program is distributed in the hope that it will be useful, but WITHOUT
	11	+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
	12	+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
	13	+ * more details.
	14	+ *
	15	+ * You should have received a copy of the GNU General Public License along with
	16	+ * this program. If not, see <http://www.gnu.org/licenses/>.
	17	+ */
	18	+
	19	+#ifndef __ARCH_ARM_MACH_OMAP2_DISPLAY_H
	20	+#define __ARCH_ARM_MACH_OMAP2_DISPLAY_H
	21	+
	22	+#include <linux/kernel.h>
	23	+
	24	+struct omap_dss_dispc_dev_attr {
	25	+ u8 manager_count;
	26	+ bool has_framedonetv_irq;
	27	+};
	28	+
	29	+#endif

arch/arm/mach-omap2/io.h+0−0

Empty file deleted.

arch/arm/mach-omap2/omap_hwmod.c+3−3

@@ -749,7 +749,7 @@ static int _count_mpu_irqs(struct omap_hwmod *oh) · 748 unmodified lines
749	749	ohii = &oh->mpu_irqs[i++];
750	750	} while (ohii->irq != -1);
751	751
752		− return i;
	752	+ return i-1;
753	753	}
754	754
755	755	/**
@@ -772,7 +772,7 @@ static int _count_sdma_reqs(struct omap_hwmod *oh) · 16 unmodified lines
772	772	ohdi = &oh->sdma_reqs[i++];
773	773	} while (ohdi->dma_req != -1);
774	774
775		− return i;
	775	+ return i-1;
776	776	}
777	777
778	778	/**
@@ -795,7 +795,7 @@ static int _count_ocp_if_addr_spaces(struct omap_hwmod_ocp_if *os) · 16 unmodified lines
795	795	mem = &os->addr[i++];
796	796	} while (mem->pa_start != mem->pa_end);
797	797
798		− return i;
	798	+ return i-1;
799	799	}
800	800
801	801	/**

arch/arm/mach-omap2/omap_hwmod_2420_data.c+14−3

@@ -875,6 +875,10 @@ static struct omap_hwmod_ocp_if *omap2420_dss_slaves[] = { · 874 unmodified lines
875	875	};
876	876
877	877	static struct omap_hwmod_opt_clk dss_opt_clks[] = {
	878	+ /*
	879	+ * The DSS HW needs all DSS clocks enabled during reset. The dss_core
	880	+ * driver does not use these clocks.
	881	+ */
878	882	{ .role = "tv_clk", .clk = "dss_54m_fck" },
879	883	{ .role = "sys_clk", .clk = "dss2_fck" },
880	884	};
@@ -899,7 +903,7 @@ static struct omap_hwmod omap2420_dss_core_hwmod = { · 18 unmodified lines
899	903	.slaves_cnt = ARRAY_SIZE(omap2420_dss_slaves),
900	904	.masters = omap2420_dss_masters,
901	905	.masters_cnt = ARRAY_SIZE(omap2420_dss_masters),
902		− .flags = HWMOD_NO_IDLEST,
	906	+ .flags = HWMOD_NO_IDLEST \| HWMOD_CONTROL_OPT_CLKS_IN_RESET,
903	907	};
904	908
905	909	/* l4_core -> dss_dispc */
@@ -939,6 +943,7 @@ static struct omap_hwmod omap2420_dss_dispc_hwmod = { · 33 unmodified lines
939	943	.slaves = omap2420_dss_dispc_slaves,
940	944	.slaves_cnt = ARRAY_SIZE(omap2420_dss_dispc_slaves),
941	945	.flags = HWMOD_NO_IDLEST,
	946	+ .dev_attr = &omap2_3_dss_dispc_dev_attr
942	947	};
943	948
944	949	/* l4_core -> dss_rfbi */
@@ -961,6 +966,10 @@ static struct omap_hwmod_ocp_if *omap2420_dss_rfbi_slaves[] = { · 16 unmodified lines
961	966	&omap2420_l4_core__dss_rfbi,
962	967	};
963	968
	969	+static struct omap_hwmod_opt_clk dss_rfbi_opt_clks[] = {
	970	+ { .role = "ick", .clk = "dss_ick" },
	971	+};
	972	+
964	973	static struct omap_hwmod omap2420_dss_rfbi_hwmod = {
965	974	.name = "dss_rfbi",
966	975	.class = &omap2_rfbi_hwmod_class,
@@ -972,6 +981,8 @@ static struct omap_hwmod omap2420_dss_rfbi_hwmod = { · 5 unmodified lines
972	981	.module_offs = CORE_MOD,
973	982	},
974	983	},
	984	+ .opt_clks = dss_rfbi_opt_clks,
	985	+ .opt_clks_cnt = ARRAY_SIZE(dss_rfbi_opt_clks),
975	986	.slaves = omap2420_dss_rfbi_slaves,
976	987	.slaves_cnt = ARRAY_SIZE(omap2420_dss_rfbi_slaves),
977	988	.flags = HWMOD_NO_IDLEST,
@@ -981,7 +992,7 @@ static struct omap_hwmod omap2420_dss_rfbi_hwmod = { · 3 unmodified lines
981	992	static struct omap_hwmod_ocp_if omap2420_l4_core__dss_venc = {
982	993	.master = &omap2420_l4_core_hwmod,
983	994	.slave = &omap2420_dss_venc_hwmod,
984		− .clk = "dss_54m_fck",
	995	+ .clk = "dss_ick",
985	996	.addr = omap2_dss_venc_addrs,
986	997	.fw = {
987	998	.omap2 = {
@@ -1001,7 +1012,7 @@ static struct omap_hwmod_ocp_if *omap2420_dss_venc_slaves[] = { · 13 unmodified lines
1001	1012	static struct omap_hwmod omap2420_dss_venc_hwmod = {
1002	1013	.name = "dss_venc",
1003	1014	.class = &omap2_venc_hwmod_class,
1004		− .main_clk = "dss1_fck",
	1015	+ .main_clk = "dss_54m_fck",
1005	1016	.prcm = {
1006	1017	.omap2 = {
1007	1018	.prcm_reg_id = 1,

arch/arm/mach-omap2/omap_hwmod_2430_data.c+14−3

@@ -942,6 +942,10 @@ static struct omap_hwmod_ocp_if *omap2430_dss_slaves[] = { · 941 unmodified lines
942	942	};
943	943
944	944	static struct omap_hwmod_opt_clk dss_opt_clks[] = {
	945	+ /*
	946	+ * The DSS HW needs all DSS clocks enabled during reset. The dss_core
	947	+ * driver does not use these clocks.
	948	+ */
945	949	{ .role = "tv_clk", .clk = "dss_54m_fck" },
946	950	{ .role = "sys_clk", .clk = "dss2_fck" },
947	951	};
@@ -966,7 +970,7 @@ static struct omap_hwmod omap2430_dss_core_hwmod = { · 18 unmodified lines
966	970	.slaves_cnt = ARRAY_SIZE(omap2430_dss_slaves),
967	971	.masters = omap2430_dss_masters,
968	972	.masters_cnt = ARRAY_SIZE(omap2430_dss_masters),
969		− .flags = HWMOD_NO_IDLEST,
	973	+ .flags = HWMOD_NO_IDLEST \| HWMOD_CONTROL_OPT_CLKS_IN_RESET,
970	974	};
971	975
972	976	/* l4_core -> dss_dispc */
@@ -1000,6 +1004,7 @@ static struct omap_hwmod omap2430_dss_dispc_hwmod = { · 27 unmodified lines
1000	1004	.slaves = omap2430_dss_dispc_slaves,
1001	1005	.slaves_cnt = ARRAY_SIZE(omap2430_dss_dispc_slaves),
1002	1006	.flags = HWMOD_NO_IDLEST,
	1007	+ .dev_attr = &omap2_3_dss_dispc_dev_attr
1003	1008	};
1004	1009
1005	1010	/* l4_core -> dss_rfbi */
@@ -1016,6 +1021,10 @@ static struct omap_hwmod_ocp_if *omap2430_dss_rfbi_slaves[] = { · 10 unmodified lines
1016	1021	&omap2430_l4_core__dss_rfbi,
1017	1022	};
1018	1023
	1024	+static struct omap_hwmod_opt_clk dss_rfbi_opt_clks[] = {
	1025	+ { .role = "ick", .clk = "dss_ick" },
	1026	+};
	1027	+
1019	1028	static struct omap_hwmod omap2430_dss_rfbi_hwmod = {
1020	1029	.name = "dss_rfbi",
1021	1030	.class = &omap2_rfbi_hwmod_class,
@@ -1027,6 +1036,8 @@ static struct omap_hwmod omap2430_dss_rfbi_hwmod = { · 5 unmodified lines
1027	1036	.module_offs = CORE_MOD,
1028	1037	},
1029	1038	},
	1039	+ .opt_clks = dss_rfbi_opt_clks,
	1040	+ .opt_clks_cnt = ARRAY_SIZE(dss_rfbi_opt_clks),
1030	1041	.slaves = omap2430_dss_rfbi_slaves,
1031	1042	.slaves_cnt = ARRAY_SIZE(omap2430_dss_rfbi_slaves),
1032	1043	.flags = HWMOD_NO_IDLEST,
@@ -1036,7 +1047,7 @@ static struct omap_hwmod omap2430_dss_rfbi_hwmod = { · 3 unmodified lines
1036	1047	static struct omap_hwmod_ocp_if omap2430_l4_core__dss_venc = {
1037	1048	.master = &omap2430_l4_core_hwmod,
1038	1049	.slave = &omap2430_dss_venc_hwmod,
1039		− .clk = "dss_54m_fck",
	1050	+ .clk = "dss_ick",
1040	1051	.addr = omap2_dss_venc_addrs,
1041	1052	.flags = OCPIF_SWSUP_IDLE,
1042	1053	.user = OCP_USER_MPU \| OCP_USER_SDMA,
@@ -1050,7 +1061,7 @@ static struct omap_hwmod_ocp_if *omap2430_dss_venc_slaves[] = { · 7 unmodified lines
1050	1061	static struct omap_hwmod omap2430_dss_venc_hwmod = {
1051	1062	.name = "dss_venc",
1052	1063	.class = &omap2_venc_hwmod_class,
1053		− .main_clk = "dss1_fck",
	1064	+ .main_clk = "dss_54m_fck",
1054	1065	.prcm = {
1055	1066	.omap2 = {
1056	1067	.prcm_reg_id = 1,

arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c+4−1

@@ -11,6 +11,7 @@ · 10 unmodified lines
11	11	#include <plat/omap_hwmod.h>
12	12	#include <plat/serial.h>
13	13	#include <plat/dma.h>
	14	+#include <plat/common.h>
14	15
15	16	#include <mach/irqs.h>
16	17
@@ -43,13 +44,15 @@ static struct omap_hwmod_class_sysconfig omap2_dss_sysc = { · 26 unmodified lines
43	44	.rev_offs = 0x0000,
44	45	.sysc_offs = 0x0010,
45	46	.syss_offs = 0x0014,
46		− .sysc_flags = (SYSC_HAS_SOFTRESET \| SYSC_HAS_AUTOIDLE),
	47	+ .sysc_flags = (SYSC_HAS_SOFTRESET \| SYSC_HAS_AUTOIDLE \|
	48	+ SYSS_HAS_RESET_STATUS),
47	49	.sysc_fields = &omap_hwmod_sysc_type1,
48	50	};
49	51
50	52	struct omap_hwmod_class omap2_dss_hwmod_class = {
51	53	.name = "dss",
52	54	.sysc = &omap2_dss_sysc,
	55	+ .reset = omap_dss_reset,
53	56	};
54	57
55	58	/*

arch/arm/mach-omap2/omap_hwmod_3xxx_data.c+32−5

@@ -1369,9 +1369,14 @@ static struct omap_hwmod_ocp_if *omap3xxx_dss_slaves[] = { · 1368 unmodified lines
1369	1369	};
1370	1370
1371	1371	static struct omap_hwmod_opt_clk dss_opt_clks[] = {
1372		− { .role = "tv_clk", .clk = "dss_tv_fck" },
1373		− { .role = "video_clk", .clk = "dss_96m_fck" },
	1372	+ /*
	1373	+ * The DSS HW needs all DSS clocks enabled during reset. The dss_core
	1374	+ * driver does not use these clocks.
	1375	+ */
1374	1376	{ .role = "sys_clk", .clk = "dss2_alwon_fck" },
	1377	+ { .role = "tv_clk", .clk = "dss_tv_fck" },
	1378	+ /* required only on OMAP3430 */
	1379	+ { .role = "tv_dac_clk", .clk = "dss_96m_fck" },
1375	1380	};
1376	1381
1377	1382	static struct omap_hwmod omap3430es1_dss_core_hwmod = {
@@ -1394,11 +1399,12 @@ static struct omap_hwmod omap3430es1_dss_core_hwmod = { · 16 unmodified lines
1394	1399	.slaves_cnt = ARRAY_SIZE(omap3430es1_dss_slaves),
1395	1400	.masters = omap3xxx_dss_masters,
1396	1401	.masters_cnt = ARRAY_SIZE(omap3xxx_dss_masters),
1397		− .flags = HWMOD_NO_IDLEST,
	1402	+ .flags = HWMOD_NO_IDLEST \| HWMOD_CONTROL_OPT_CLKS_IN_RESET,
1398	1403	};
1399	1404
1400	1405	static struct omap_hwmod omap3xxx_dss_core_hwmod = {
1401	1406	.name = "dss_core",
	1407	+ .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET,
1402	1408	.class = &omap2_dss_hwmod_class,
1403	1409	.main_clk = "dss1_alwon_fck", /* instead of dss_fck */
1404	1410	.sdma_reqs = omap3xxx_dss_sdma_chs,
@@ -1456,6 +1462,7 @@ static struct omap_hwmod omap3xxx_dss_dispc_hwmod = { · 51 unmodified lines
1456	1462	.slaves = omap3xxx_dss_dispc_slaves,
1457	1463	.slaves_cnt = ARRAY_SIZE(omap3xxx_dss_dispc_slaves),
1458	1464	.flags = HWMOD_NO_IDLEST,
	1465	+ .dev_attr = &omap2_3_dss_dispc_dev_attr
1459	1466	};
1460	1467
1461	1468	/*
@@ -1486,6 +1493,7 @@ static struct omap_hwmod_addr_space omap3xxx_dss_dsi1_addrs[] = { · 24 unmodified lines
1486	1493	static struct omap_hwmod_ocp_if omap3xxx_l4_core__dss_dsi1 = {
1487	1494	.master = &omap3xxx_l4_core_hwmod,
1488	1495	.slave = &omap3xxx_dss_dsi1_hwmod,
	1496	+ .clk = "dss_ick",
1489	1497	.addr = omap3xxx_dss_dsi1_addrs,
1490	1498	.fw = {
1491	1499	.omap2 = {
@@ -1502,6 +1510,10 @@ static struct omap_hwmod_ocp_if *omap3xxx_dss_dsi1_slaves[] = { · 10 unmodified lines
1502	1510	&omap3xxx_l4_core__dss_dsi1,
1503	1511	};
1504	1512
	1513	+static struct omap_hwmod_opt_clk dss_dsi1_opt_clks[] = {
	1514	+ { .role = "sys_clk", .clk = "dss2_alwon_fck" },
	1515	+};
	1516	+
1505	1517	static struct omap_hwmod omap3xxx_dss_dsi1_hwmod = {
1506	1518	.name = "dss_dsi1",
1507	1519	.class = &omap3xxx_dsi_hwmod_class,
@@ -1514,6 +1526,8 @@ static struct omap_hwmod omap3xxx_dss_dsi1_hwmod = { · 6 unmodified lines
1514	1526	.module_offs = OMAP3430_DSS_MOD,
1515	1527	},
1516	1528	},
	1529	+ .opt_clks = dss_dsi1_opt_clks,
	1530	+ .opt_clks_cnt = ARRAY_SIZE(dss_dsi1_opt_clks),
1517	1531	.slaves = omap3xxx_dss_dsi1_slaves,
1518	1532	.slaves_cnt = ARRAY_SIZE(omap3xxx_dss_dsi1_slaves),
1519	1533	.flags = HWMOD_NO_IDLEST,
@@ -1540,6 +1554,10 @@ static struct omap_hwmod_ocp_if *omap3xxx_dss_rfbi_slaves[] = { · 20 unmodified lines
1540	1554	&omap3xxx_l4_core__dss_rfbi,
1541	1555	};
1542	1556
	1557	+static struct omap_hwmod_opt_clk dss_rfbi_opt_clks[] = {
	1558	+ { .role = "ick", .clk = "dss_ick" },
	1559	+};
	1560	+
1543	1561	static struct omap_hwmod omap3xxx_dss_rfbi_hwmod = {
1544	1562	.name = "dss_rfbi",
1545	1563	.class = &omap2_rfbi_hwmod_class,
@@ -1551,6 +1569,8 @@ static struct omap_hwmod omap3xxx_dss_rfbi_hwmod = { · 5 unmodified lines
1551	1569	.module_offs = OMAP3430_DSS_MOD,
1552	1570	},
1553	1571	},
	1572	+ .opt_clks = dss_rfbi_opt_clks,
	1573	+ .opt_clks_cnt = ARRAY_SIZE(dss_rfbi_opt_clks),
1554	1574	.slaves = omap3xxx_dss_rfbi_slaves,
1555	1575	.slaves_cnt = ARRAY_SIZE(omap3xxx_dss_rfbi_slaves),
1556	1576	.flags = HWMOD_NO_IDLEST,
@@ -1560,7 +1580,7 @@ static struct omap_hwmod omap3xxx_dss_rfbi_hwmod = { · 3 unmodified lines
1560	1580	static struct omap_hwmod_ocp_if omap3xxx_l4_core__dss_venc = {
1561	1581	.master = &omap3xxx_l4_core_hwmod,
1562	1582	.slave = &omap3xxx_dss_venc_hwmod,
1563		− .clk = "dss_tv_fck",
	1583	+ .clk = "dss_ick",
1564	1584	.addr = omap2_dss_venc_addrs,
1565	1585	.fw = {
1566	1586	.omap2 = {
@@ -1578,10 +1598,15 @@ static struct omap_hwmod_ocp_if *omap3xxx_dss_venc_slaves[] = { · 11 unmodified lines
1578	1598	&omap3xxx_l4_core__dss_venc,
1579	1599	};
1580	1600
	1601	+static struct omap_hwmod_opt_clk dss_venc_opt_clks[] = {
	1602	+ /* required only on OMAP3430 */
	1603	+ { .role = "tv_dac_clk", .clk = "dss_96m_fck" },
	1604	+};
	1605	+
1581	1606	static struct omap_hwmod omap3xxx_dss_venc_hwmod = {
1582	1607	.name = "dss_venc",
1583	1608	.class = &omap2_venc_hwmod_class,
1584		− .main_clk = "dss1_alwon_fck",
	1609	+ .main_clk = "dss_tv_fck",
1585	1610	.prcm = {
1586	1611	.omap2 = {
1587	1612	.prcm_reg_id = 1,
@@ -1589,6 +1614,8 @@ static struct omap_hwmod omap3xxx_dss_venc_hwmod = { · 1 unmodified line
1589	1614	.module_offs = OMAP3430_DSS_MOD,
1590	1615	},
1591	1616	},
	1617	+ .opt_clks = dss_venc_opt_clks,
	1618	+ .opt_clks_cnt = ARRAY_SIZE(dss_venc_opt_clks),
1592	1619	.slaves = omap3xxx_dss_venc_slaves,
1593	1620	.slaves_cnt = ARRAY_SIZE(omap3xxx_dss_venc_slaves),
1594	1621	.flags = HWMOD_NO_IDLEST,

arch/arm/mach-omap2/omap_hwmod_44xx_data.c+12−12

@@ -30,6 +30,7 @@ · 29 unmodified lines
30	30	#include <plat/mmc.h>
31	31	#include <plat/i2c.h>
32	32	#include <plat/dmtimer.h>
	33	+#include <plat/common.h>
33	34
34	35	#include "omap_hwmod_common_data.h"
35	36
@@ -1187,6 +1188,7 @@ static struct omap_hwmod_class_sysconfig omap44xx_dss_sysc = { · 1151 unmodified lines
1187	1188	static struct omap_hwmod_class omap44xx_dss_hwmod_class = {
1188	1189	.name = "dss",
1189	1190	.sysc = &omap44xx_dss_sysc,
	1191	+ .reset = omap_dss_reset,
1190	1192	};
1191	1193
1192	1194	/* dss */
@@ -1240,12 +1242,12 @@ static struct omap_hwmod_ocp_if *omap44xx_dss_slaves[] = { · 47 unmodified lines
1240	1242	static struct omap_hwmod_opt_clk dss_opt_clks[] = {
1241	1243	{ .role = "sys_clk", .clk = "dss_sys_clk" },
1242	1244	{ .role = "tv_clk", .clk = "dss_tv_clk" },
1243		− { .role = "dss_clk", .clk = "dss_dss_clk" },
1244		− { .role = "video_clk", .clk = "dss_48mhz_clk" },
	1245	+ { .role = "hdmi_clk", .clk = "dss_48mhz_clk" },
1245	1246	};
1246	1247
1247	1248	static struct omap_hwmod omap44xx_dss_hwmod = {
1248	1249	.name = "dss_core",
	1250	+ .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET,
1249	1251	.class = &omap44xx_dss_hwmod_class,
1250	1252	.clkdm_name = "l3_dss_clkdm",
1251	1253	.main_clk = "dss_dss_clk",
@@ -1325,6 +1327,11 @@ static struct omap_hwmod_addr_space omap44xx_dss_dispc_addrs[] = { · 73 unmodified lines
1325	1327	{ }
1326	1328	};
1327	1329
	1330	+static struct omap_dss_dispc_dev_attr omap44xx_dss_dispc_dev_attr = {
	1331	+ .manager_count = 3,
	1332	+ .has_framedonetv_irq = 1
	1333	+};
	1334	+
1328	1335	/* l4_per -> dss_dispc */
1329	1336	static struct omap_hwmod_ocp_if omap44xx_l4_per__dss_dispc = {
1330	1337	.master = &omap44xx_l4_per_hwmod,
@@ -1340,12 +1347,6 @@ static struct omap_hwmod_ocp_if *omap44xx_dss_dispc_slaves[] = { · 9 unmodified lines
1340	1347	&omap44xx_l4_per__dss_dispc,
1341	1348	};
1342	1349
1343		−static struct omap_hwmod_opt_clk dss_dispc_opt_clks[] = {
1344		− { .role = "sys_clk", .clk = "dss_sys_clk" },
1345		− { .role = "tv_clk", .clk = "dss_tv_clk" },
1346		− { .role = "hdmi_clk", .clk = "dss_48mhz_clk" },
1347		−};
1348		−
1349	1350	static struct omap_hwmod omap44xx_dss_dispc_hwmod = {
1350	1351	.name = "dss_dispc",
1351	1352	.class = &omap44xx_dispc_hwmod_class,
@@ -1359,10 +1360,9 @@ static struct omap_hwmod omap44xx_dss_dispc_hwmod = { · 7 unmodified lines
1359	1360	.context_offs = OMAP4_RM_DSS_DSS_CONTEXT_OFFSET,
1360	1361	},
1361	1362	},
1362		− .opt_clks = dss_dispc_opt_clks,
1363		− .opt_clks_cnt = ARRAY_SIZE(dss_dispc_opt_clks),
1364	1363	.slaves = omap44xx_dss_dispc_slaves,
1365	1364	.slaves_cnt = ARRAY_SIZE(omap44xx_dss_dispc_slaves),
	1365	+ .dev_attr = &omap44xx_dss_dispc_dev_attr
1366	1366	};
1367	1367
1368	1368	/*
@@ -1624,7 +1624,7 @@ static struct omap_hwmod omap44xx_dss_hdmi_hwmod = { · 255 unmodified lines
1624	1624	.clkdm_name = "l3_dss_clkdm",
1625	1625	.mpu_irqs = omap44xx_dss_hdmi_irqs,
1626	1626	.sdma_reqs = omap44xx_dss_hdmi_sdma_reqs,
1627		− .main_clk = "dss_dss_clk",
	1627	+ .main_clk = "dss_48mhz_clk",
1628	1628	.prcm = {
1629	1629	.omap4 = {
1630	1630	.clkctrl_offs = OMAP4_CM_DSS_DSS_CLKCTRL_OFFSET,
@@ -1785,7 +1785,7 @@ static struct omap_hwmod omap44xx_dss_venc_hwmod = { · 154 unmodified lines
1785	1785	.name = "dss_venc",
1786	1786	.class = &omap44xx_venc_hwmod_class,
1787	1787	.clkdm_name = "l3_dss_clkdm",
1788		− .main_clk = "dss_dss_clk",
	1788	+ .main_clk = "dss_tv_clk",
1789	1789	.prcm = {
1790	1790	.omap4 = {
1791	1791	.clkctrl_offs = OMAP4_CM_DSS_DSS_CLKCTRL_OFFSET,

arch/arm/mach-omap2/omap_hwmod_common_data.c+4−0

@@ -49,3 +49,7 @@ struct omap_hwmod_sysc_fields omap_hwmod_sysc_type2 = { · 48 unmodified lines
49	49	.srst_shift = SYSC_TYPE2_SOFTRESET_SHIFT,
50	50	};
51	51
	52	+struct omap_dss_dispc_dev_attr omap2_3_dss_dispc_dev_attr = {
	53	+ .manager_count = 2,
	54	+ .has_framedonetv_irq = 0
	55	+};

arch/arm/mach-omap2/omap_hwmod_common_data.h+4−0

@@ -16,6 +16,8 @@ · 15 unmodified lines
16	16
17	17	#include <plat/omap_hwmod.h>
18	18
	19	+#include "display.h"
	20	+
19	21	/* Common address space across OMAP2xxx */
20	22	extern struct omap_hwmod_addr_space omap2xxx_uart1_addr_space[];
21	23	extern struct omap_hwmod_addr_space omap2xxx_uart2_addr_space[];
@@ -111,4 +113,6 @@ extern struct omap_hwmod_class omap2xxx_dma_hwmod_class; · 89 unmodified lines
111	113	extern struct omap_hwmod_class omap2xxx_mailbox_hwmod_class;
112	114	extern struct omap_hwmod_class omap2xxx_mcspi_class;
113	115
	116	+extern struct omap_dss_dispc_dev_attr omap2_3_dss_dispc_dev_attr;
	117	+
114	118	#endif

arch/arm/mach-omap2/omap_l3_noc.c+1−1

@@ -237,7 +237,7 @@ static int __devexit omap4_l3_remove(struct platform_device *pdev) · 236 unmodified lines
237	237	static const struct of_device_id l3_noc_match[] = {
238	238	{.compatible = "ti,omap4-l3-noc", },
239	239	{},
240		−}
	240	+};
241	241	MODULE_DEVICE_TABLE(of, l3_noc_match);
242	242	#else
243	243	#define l3_noc_match NULL

arch/arm/mach-omap2/pm.c+2−4

@@ -24,6 +24,7 @@ · 23 unmodified lines
24	24	#include "powerdomain.h"
25	25	#include "clockdomain.h"
26	26	#include "pm.h"
	27	+#include "twl-common.h"
27	28
28	29	static struct omap_device_pm_latency *pm_lats;
29	30
@@ -226,11 +227,8 @@ postcore_initcall(omap2_common_pm_init); · 196 unmodified lines
226	227
227	228	static int __init omap2_common_pm_late_init(void)
228	229	{
229		− /* Init the OMAP TWL parameters */
230		− omap3_twl_init();
231		− omap4_twl_init();
232		−
233	230	/* Init the voltage layer */
	231	+ omap_pmic_late_init();
234	232	omap_voltage_late_init();
235	233
236	234	/* Initialize the voltages */

arch/arm/mach-omap2/smartreflex.c+1−1

@@ -139,7 +139,7 @@ static irqreturn_t sr_interrupt(int irq, void *data) · 138 unmodified lines
139	139	sr_write_reg(sr_info, ERRCONFIG_V1, status);
140	140	} else if (sr_info->ip_type == SR_TYPE_V2) {
141	141	/* Read the status bits */
142		− sr_read_reg(sr_info, IRQSTATUS);
	142	+ status = sr_read_reg(sr_info, IRQSTATUS);
143	143
144	144	/* Clear them by writing back */
145	145	sr_write_reg(sr_info, IRQSTATUS, status);

arch/arm/mach-omap2/twl-common.c+11−0

@@ -30,6 +30,7 @@ · 29 unmodified lines
30	30	#include <plat/usb.h>
31	31
32	32	#include "twl-common.h"
	33	+#include "pm.h"
33	34
34	35	static struct i2c_board_info __initdata pmic_i2c_board_info = {
35	36	.addr = 0x48,
@@ -48,6 +49,16 @@ void __init omap_pmic_init(int bus, u32 clkrate, · 12 unmodified lines
48	49	omap_register_i2c_bus(bus, clkrate, &pmic_i2c_board_info, 1);
49	50	}
50	51
	52	+void __init omap_pmic_late_init(void)
	53	+{
	54	+ /* Init the OMAP TWL parameters (if PMIC has been registerd) */
	55	+ if (!pmic_i2c_board_info.irq)
	56	+ return;
	57	+
	58	+ omap3_twl_init();
	59	+ omap4_twl_init();
	60	+}
	61	+
51	62	#if defined(CONFIG_ARCH_OMAP3)
52	63	static struct twl4030_usb_data omap3_usb_pdata = {
53	64	.usb_mode = T2_USB_MODE_ULPI,

arch/arm/mach-omap2/twl-common.h+3−0

@@ -1,6 +1,8 @@
1	1	#ifndef __OMAP_PMIC_COMMON__
2	2	#define __OMAP_PMIC_COMMON__
3	3
	4	+#include <plat/irqs.h>
	5	+
4	6	#define TWL_COMMON_PDATA_USB (1 << 0)
5	7	#define TWL_COMMON_PDATA_BCI (1 << 1)
6	8	#define TWL_COMMON_PDATA_MADC (1 << 2)
@@ -30,6 +32,7 @@ struct twl4030_platform_data; · 23 unmodified lines
30	32
31	33	void omap_pmic_init(int bus, u32 clkrate, const char *pmic_type, int pmic_irq,
32	34	struct twl4030_platform_data *pmic_data);
	35	+void omap_pmic_late_init(void);
33	36
34	37	static inline void omap2_pmic_init(const char *pmic_type,
35	38	struct twl4030_platform_data *pmic_data)

arch/arm/mach-pxa/balloon3.c+1−1

@@ -307,7 +307,7 @@ static inline void balloon3_mmc_init(void) {} · 306 unmodified lines
307	307	/******************************************************************************
308	308	* USB Gadget
309	309	******************************************************************************/
310		−#if defined(CONFIG_USB_GADGET_PXA27X)\|\|defined(CONFIG_USB_GADGET_PXA27X_MODULE)
	310	+#if defined(CONFIG_USB_PXA27X)\|\|defined(CONFIG_USB_PXA27X_MODULE)
311	311	static void balloon3_udc_command(int cmd)
312	312	{
313	313	if (cmd == PXA2XX_UDC_CMD_CONNECT)

arch/arm/mach-pxa/colibri-pxa320.c+1−1

@@ -146,7 +146,7 @@ static void __init colibri_pxa320_init_eth(void) · 145 unmodified lines
146	146	static inline void __init colibri_pxa320_init_eth(void) {}
147	147	#endif /* CONFIG_AX88796 */
148	148
149		−#if defined(CONFIG_USB_GADGET_PXA27X)\|\|defined(CONFIG_USB_GADGET_PXA27X_MODULE)
	149	+#if defined(CONFIG_USB_PXA27X)\|\|defined(CONFIG_USB_PXA27X_MODULE)
150	150	static struct gpio_vbus_mach_info colibri_pxa320_gpio_vbus_info = {
151	151	.gpio_vbus = mfp_to_gpio(MFP_PIN_GPIO96),
152	152	.gpio_pullup = -1,

arch/arm/mach-pxa/gumstix.c+1−1

@@ -106,7 +106,7 @@ static void __init gumstix_mmc_init(void) · 105 unmodified lines
106	106	}
107	107	#endif
108	108
109		−#ifdef CONFIG_USB_GADGET_PXA25X
	109	+#ifdef CONFIG_USB_PXA25X
110	110	static struct gpio_vbus_mach_info gumstix_udc_info = {
111	111	.gpio_vbus = GPIO_GUMSTIX_USB_GPIOn,
112	112	.gpio_pullup = GPIO_GUMSTIX_USB_GPIOx,

arch/arm/mach-pxa/include/mach/palm27x.h+2−2

@@ -37,8 +37,8 @@ extern void __init palm27x_lcd_init(int power, · 36 unmodified lines
37	37	#define palm27x_lcd_init(power, mode) do {} while (0)
38	38	#endif
39	39
40		−#if defined(CONFIG_USB_GADGET_PXA27X) \|\| \
41		− defined(CONFIG_USB_GADGET_PXA27X_MODULE)
	40	+#if defined(CONFIG_USB_PXA27X) \|\| \
	41	+ defined(CONFIG_USB_PXA27X_MODULE)
42	42	extern void __init palm27x_udc_init(int vbus, int pullup,
43	43	int vbus_inverted);
44	44	#else

arch/arm/mach-pxa/palm27x.c+2−2

@@ -164,8 +164,8 @@ void __init palm27x_lcd_init(int power, struct pxafb_mode_info *mode) · 163 unmodified lines
164	164	/******************************************************************************
165	165	* USB Gadget
166	166	******************************************************************************/
167		−#if defined(CONFIG_USB_GADGET_PXA27X) \|\| \
168		− defined(CONFIG_USB_GADGET_PXA27X_MODULE)
	167	+#if defined(CONFIG_USB_PXA27X) \|\| \
	168	+ defined(CONFIG_USB_PXA27X_MODULE)
169	169	static struct gpio_vbus_mach_info palm27x_udc_info = {
170	170	.gpio_vbus_inverted = 1,
171	171	};

arch/arm/mach-pxa/palmtc.c+1−1

@@ -338,7 +338,7 @@ static inline void palmtc_mkp_init(void) {} · 337 unmodified lines
338	338	/******************************************************************************
339	339	* UDC
340	340	******************************************************************************/
341		−#if defined(CONFIG_USB_GADGET_PXA25X)\|\|defined(CONFIG_USB_GADGET_PXA25X_MODULE)
	341	+#if defined(CONFIG_USB_PXA25X)\|\|defined(CONFIG_USB_PXA25X_MODULE)
342	342	static struct gpio_vbus_mach_info palmtc_udc_info = {
343	343	.gpio_vbus = GPIO_NR_PALMTC_USB_DETECT_N,
344	344	.gpio_vbus_inverted = 1,

arch/arm/mach-pxa/vpac270.c+1−1

@@ -343,7 +343,7 @@ static inline void vpac270_uhc_init(void) {} · 342 unmodified lines
343	343	/******************************************************************************
344	344	* USB Gadget
345	345	******************************************************************************/
346		−#if defined(CONFIG_USB_GADGET_PXA27X)\|\|defined(CONFIG_USB_GADGET_PXA27X_MODULE)
	346	+#if defined(CONFIG_USB_PXA27X)\|\|defined(CONFIG_USB_PXA27X_MODULE)
347	347	static struct gpio_vbus_mach_info vpac270_gpio_vbus_info = {
348	348	.gpio_vbus = GPIO41_VPAC270_UDC_DETECT,
349	349	.gpio_pullup = -1,

arch/arm/mach-s3c64xx/mach-crag6410-module.c+1−1

@@ -8,7 +8,7 @@ · 7 unmodified lines
8	8	* published by the Free Software Foundation.
9	9	*/
10	10
11		−#include <linux/module.h>
	11	+#include <linux/export.h>
12	12	#include <linux/interrupt.h>
13	13	#include <linux/i2c.h>
14	14

arch/arm/plat-mxc/include/mach/common.h+1−1

@@ -85,7 +85,6 @@ enum mxc_cpu_pwr_mode { · 84 unmodified lines
85	85	};
86	86
87	87	extern void mx5_cpu_lp_set(enum mxc_cpu_pwr_mode mode);
88		−extern void (*imx_idle)(void);
89	88	extern void imx_print_silicon_rev(const char *cpu, int srev);
90	89
91	90	void avic_handle_irq(struct pt_regs *);
@@ -133,4 +132,5 @@ extern void imx53_qsb_common_init(void); · 41 unmodified lines
133	132	extern void imx53_smd_common_init(void);
134	133	extern int imx6q_set_lpm(enum mxc_cpu_pwr_mode mode);
135	134	extern void imx6q_pm_init(void);
	135	+extern void imx6q_clock_map_io(void);
136	136	#endif

arch/arm/plat-mxc/include/mach/mxc.h+0−14

@@ -50,20 +50,6 @@ · 49 unmodified lines
50	50	#define IMX_CHIP_REVISION_3_3 0x33
51	51	#define IMX_CHIP_REVISION_UNKNOWN 0xff
52	52
53		−#define IMX_CHIP_REVISION_1_0_STRING "1.0"
54		−#define IMX_CHIP_REVISION_1_1_STRING "1.1"
55		−#define IMX_CHIP_REVISION_1_2_STRING "1.2"
56		−#define IMX_CHIP_REVISION_1_3_STRING "1.3"
57		−#define IMX_CHIP_REVISION_2_0_STRING "2.0"
58		−#define IMX_CHIP_REVISION_2_1_STRING "2.1"
59		−#define IMX_CHIP_REVISION_2_2_STRING "2.2"
60		−#define IMX_CHIP_REVISION_2_3_STRING "2.3"
61		−#define IMX_CHIP_REVISION_3_0_STRING "3.0"
62		−#define IMX_CHIP_REVISION_3_1_STRING "3.1"
63		−#define IMX_CHIP_REVISION_3_2_STRING "3.2"
64		−#define IMX_CHIP_REVISION_3_3_STRING "3.3"
65		−#define IMX_CHIP_REVISION_UNKNOWN_STRING "unknown"
66		−
67	53	#ifndef __ASSEMBLY__
68	54	extern unsigned int __mxc_cpu_type;
69	55	#endif

arch/arm/plat-mxc/include/mach/system.h+1−6

@@ -17,14 +17,9 @@ · 16 unmodified lines
17	17	#ifndef __ASM_ARCH_MXC_SYSTEM_H__
18	18	#define __ASM_ARCH_MXC_SYSTEM_H__
19	19
20		−extern void (*imx_idle)(void);
21		−
22	20	static inline void arch_idle(void)
23	21	{
24		− if (imx_idle != NULL)
25		− (imx_idle)();
26		− else
27		− cpu_do_idle();
	22	+ cpu_do_idle();
28	23	}
29	24
30	25	void arch_reset(char mode, const char *cmd);

arch/arm/plat-mxc/system.c+2−1

@@ -21,6 +21,7 @@ · 20 unmodified lines
21	21	#include <linux/io.h>
22	22	#include <linux/err.h>
23	23	#include <linux/delay.h>
	24	+#include <linux/module.h>
24	25
25	26	#include <mach/hardware.h>
26	27	#include <mach/common.h>
@@ -28,8 +29,8 @@ · 1 unmodified line
28	29	#include <asm/system.h>
29	30	#include <asm/mach-types.h>
30	31
31		−void (*imx_idle)(void) = NULL;
32	32	void __iomem (imx_ioremap)(unsigned long, size_t, unsigned int) = NULL;
	33	+EXPORT_SYMBOL_GPL(imx_ioremap);
33	34
34	35	static void __iomem *wdog_base;
35	36

arch/arm/plat-omap/include/plat/clock.h+1−1

@@ -165,8 +165,8 @@ struct dpll_data { · 164 unmodified lines
165	165	u8 auto_recal_bit;
166	166	u8 recal_en_bit;
167	167	u8 recal_st_bit;
168		− u8 flags;
169	168	# endif
	169	+ u8 flags;
170	170	};
171	171
172	172	#endif

arch/arm/plat-omap/include/plat/common.h+3−0

@@ -30,6 +30,7 @@ · 29 unmodified lines
30	30	#include <linux/delay.h>
31	31
32	32	#include <plat/i2c.h>
	33	+#include <plat/omap_hwmod.h>
33	34
34	35	struct sys_timer;
35	36
@@ -55,6 +56,8 @@ void am35xx_init_early(void); · 19 unmodified lines
55	56	void ti816x_init_early(void);
56	57	void omap4430_init_early(void);
57	58
	59	+extern int omap_dss_reset(struct omap_hwmod *);
	60	+
58	61	void omap_sram_init(void);
59	62
60	63	/*

arch/arm/plat-s3c24xx/cpu-freq-debugfs.c+1−1

@@ -12,7 +12,7 @@ · 11 unmodified lines
12	12	*/
13	13
14	14	#include <linux/init.h>
15		−#include <linux/module.h>
	15	+#include <linux/export.h>
16	16	#include <linux/interrupt.h>
17	17	#include <linux/ioport.h>
18	18	#include <linux/cpufreq.h>

arch/arm/plat-s5p/sysmmu.c+1−0

@@ -11,6 +11,7 @@ · 10 unmodified lines
11	11	#include <linux/io.h>
12	12	#include <linux/interrupt.h>
13	13	#include <linux/platform_device.h>
	14	+#include <linux/export.h>
14	15
15	16	#include <asm/pgtable.h>
16	17

arch/arm/plat-samsung/include/plat/gpio-cfg.h+2−0

@@ -24,6 +24,8 @@ · 23 unmodified lines
24	24	#ifndef __PLAT_GPIO_CFG_H
25	25	#define __PLAT_GPIO_CFG_H __FILE__
26	26
	27	+#include<linux/types.h>
	28	+
27	29	typedef unsigned int __bitwise__ samsung_gpio_pull_t;
28	30	typedef unsigned int __bitwise__ s5p_gpio_drvstr_t;
29	31

arch/arm/plat-samsung/pd.c+1−1

@@ -11,7 +11,7 @@ · 10 unmodified lines
11	11	*/
12	12
13	13	#include <linux/init.h>
14		−#include <linux/module.h>
	14	+#include <linux/export.h>
15	15	#include <linux/platform_device.h>
16	16	#include <linux/err.h>
17	17	#include <linux/pm_runtime.h>

arch/arm/plat-samsung/pwm.c+1−1

@@ -11,7 +11,7 @@ · 10 unmodified lines
11	11	* the Free Software Foundation; either version 2 of the License.
12	12	*/
13	13
14		−#include <linux/module.h>
	14	+#include <linux/export.h>
15	15	#include <linux/kernel.h>
16	16	#include <linux/platform_device.h>
17	17	#include <linux/slab.h>

arch/arm/tools/mach-types+1−0

@@ -1123,5 +1123,6 @@ blissc MACH_BLISSC BLISSC 3491 · 1122 unmodified lines
1123	1123	thales_adc MACH_THALES_ADC THALES_ADC 3492
1124	1124	ubisys_p9d_evp MACH_UBISYS_P9D_EVP UBISYS_P9D_EVP 3493
1125	1125	atdgp318 MACH_ATDGP318 ATDGP318 3494
	1126	+m28evk MACH_M28EVK M28EVK 3613
1126	1127	smdk4212 MACH_SMDK4212 SMDK4212 3638
1127	1128	smdk4412 MACH_SMDK4412 SMDK4412 3765

include/video/omapdss.h+0−7

@@ -307,15 +307,8 @@ struct omap_dss_board_info { · 306 unmodified lines
307	307	void (*dsi_disable_pads)(int dsi_id, unsigned lane_mask);
308	308	};
309	309
310		−#if defined(CONFIG_OMAP2_DSS_MODULE) \|\| defined(CONFIG_OMAP2_DSS)
311	310	/* Init with the board info */
312	311	extern int omap_display_init(struct omap_dss_board_info *board_data);
313		−#else
314		−static inline int omap_display_init(struct omap_dss_board_info *board_data)
315		−{
316		− return 0;
317		−}
318		−#endif
319	312
320	313	struct omap_display_platform_data {
321	314	struct omap_dss_board_info *board_data;