Merge tag 'v5.9-rc4' into drm-next

Backmerge 5.9-rc4 as there is a nasty qxl conflict that needs to be resolved.

Dave Airlie committed 6 years ago

Commit ce5c2072 parents 3393649 f4d51df1709 files · +9099 −6031Browse files

Unified · Split

1709 files

.clang-format +12 −0
Documentation/RCU/lockdep.rst +1 −1
Documentation/admin-guide/devices.txt +1 −1
Documentation/admin-guide/laptops/thinkpad-acpi.rst +1 −1
Documentation/admin-guide/pm/intel_pstate.rst +5 −3
Documentation/devicetree/bindings/interrupt-controller/ti,sci-inta.txt +0 −66
Documentation/devicetree/bindings/interrupt-controller/ti,sci-inta.yaml +98 −0
Documentation/devicetree/bindings/interrupt-controller/ti,sci-intr.txt +0 −82
Documentation/devicetree/bindings/interrupt-controller/ti,sci-intr.yaml +102 −0
Documentation/devicetree/bindings/mmc/arasan,sdhci.yaml +7 −3
Documentation/devicetree/bindings/mmc/mtk-sd.txt +2 −0
Documentation/devicetree/bindings/mmc/nvidia,tegra20-sdhci.txt +29 −3
Documentation/devicetree/bindings/net/dsa/dsa.txt +1 −1
Documentation/driver-api/fpga/fpga-bridge.rst +3 −3
Documentation/driver-api/fpga/fpga-mgr.rst +3 −3
Documentation/driver-api/fpga/fpga-programming.rst +8 −8
Documentation/driver-api/fpga/fpga-region.rst +9 −9
Documentation/driver-api/iio/core.rst +8 −8
Documentation/fault-injection/nvme-fault-injection.rst +1 −1
Documentation/filesystems/affs.rst +10 −6
Documentation/hwmon/abituguru-datasheet.rst +3 −3
Documentation/hwmon/abituguru.rst +2 −2
Documentation/hwmon/abituguru3.rst +2 −2
Documentation/kbuild/llvm.rst +13 −13
Documentation/kbuild/makefiles.rst +9 −9
Documentation/locking/locktypes.rst +12 −12
Documentation/maintainer/maintainer-entry-profile.rst +1 −0
Documentation/networking/dsa/configuration.rst +1 −1
Documentation/powerpc/syscall64-abi.rst +3 −1
Documentation/process/deprecated.rst +1 −1
Documentation/sound/cards/audigy-mixer.rst +1 −1
Documentation/sound/cards/sb-live-mixer.rst +1 −1
Documentation/sound/designs/timestamping.rst +1 −1
Documentation/translations/it_IT/process/deprecated.rst +1 −1
MAINTAINERS +53 −21
Makefile +1 −1
arch/alpha/kernel/module.c +1 −1
arch/alpha/kernel/signal.c +1 −1
arch/alpha/kernel/traps.c +2 −2
arch/arc/boot/dts/hsdk.dts +4 −2
arch/arc/include/asm/pgalloc.h +2 −2
arch/arc/kernel/disasm.c +1 −1
arch/arc/kernel/perf_event.c +4 −10
arch/arc/kernel/signal.c +1 −1
arch/arc/kernel/troubleshoot.c +30 −47
arch/arc/kernel/unwind.c +3 −3
arch/arc/mm/init.c +16 −11
arch/arc/plat-eznps/include/plat/ctop.h +0 −1
arch/arm/kernel/hw_breakpoint.c +5 −5
arch/arm/kernel/signal.c +1 −1
arch/arm/mach-ep93xx/crunch.c +1 −1
arch/arm/mach-mmp/pm-mmp2.c +4 −4
arch/arm/mach-mmp/pm-pxa910.c +5 −5
arch/arm/mach-omap2/id.c +0 −8
arch/arm/mach-omap2/omap_device.c +1 −1
arch/arm/mach-omap2/pm34xx.c +0 −4
arch/arm/mach-orion5x/dns323-setup.c +1 −1
arch/arm/mach-rpc/riscpc.c +1 −1
arch/arm/mach-tegra/reset.c +1 −1
arch/arm/mm/alignment.c +2 −2
arch/arm/mm/proc-v7-bugs.c +1 −1
arch/arm/plat-omap/dma.c +3 −3
arch/arm/probes/decode.c +1 −1
arch/arm/probes/kprobes/core.c +1 −1
arch/arm64/Makefile +10 −4
arch/arm64/boot/dts/mediatek/mt7622.dtsi +2 −0
arch/arm64/boot/dts/nvidia/tegra186.dtsi +12 −8
arch/arm64/boot/dts/nvidia/tegra194.dtsi +9 −6
arch/arm64/boot/dts/nvidia/tegra210.dtsi +12 −8
arch/arm64/boot/dts/ti/k3-am65-main.dtsi +17 −19
arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi +6 −6
arch/arm64/boot/dts/ti/k3-am65-wakeup.dtsi +4 −4
arch/arm64/boot/dts/ti/k3-am654-base-board.dts +2 −2
arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts +5 −5
arch/arm64/boot/dts/ti/k3-j721e-main.dtsi +22 −21
arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi +5 −7
arch/arm64/include/asm/compiler.h +6 −0
arch/arm64/include/asm/irqflags.h +5 −0
arch/arm64/include/asm/kvm_arm.h +2 −1
arch/arm64/include/asm/kvm_asm.h +43 −0
arch/arm64/include/asm/tlbflush.h +4 −2
arch/arm64/kernel/acpi.c +1 −1
arch/arm64/kernel/cpufeature.c +1 −1
arch/arm64/kernel/cpuinfo.c +0 −1
arch/arm64/kernel/hw_breakpoint.c +3 −3
arch/arm64/kernel/image-vars.h +4 −0
arch/arm64/kernel/module-plts.c +1 −2
arch/arm64/kernel/module.c +4 −4
arch/arm64/kernel/process.c +0 −2
arch/arm64/kernel/setup.c +0 −1
arch/arm64/kernel/smp.c +1 −1
arch/arm64/kernel/vmlinux.lds.S +8 −0
arch/arm64/kvm/handle_exit.c +1 −1
arch/arm64/kvm/hyp/entry.S +9 −6
arch/arm64/kvm/hyp/hyp-entry.S +41 −24
arch/arm64/kvm/hyp/include/hyp/debug-sr.h +30 −30
arch/arm64/kvm/hyp/include/hyp/switch.h +35 −4
arch/arm64/kvm/hyp/nvhe/switch.c +5 −0
arch/arm64/kvm/hyp/vgic-v3-sr.c +8 −8
arch/arm64/kvm/hyp/vhe/switch.c +5 −0
arch/arm64/mm/context.c +1 −1
arch/c6x/kernel/signal.c +2 −2
arch/csky/kernel/signal.c +1 −1
arch/h8300/kernel/signal.c +1 −1
arch/hexagon/kernel/module.c +1 −1
arch/hexagon/kernel/signal.c +1 −1
arch/ia64/kernel/crash.c +1 −1
arch/ia64/kernel/ia64_ksyms.c +1 −1
arch/ia64/kernel/module.c +1 −1
arch/ia64/kernel/perfmon.c +1 −1
arch/ia64/kernel/signal.c +1 −1
arch/ia64/kernel/unaligned.c +3 −3
arch/ia64/kernel/unwind.c +1 −1
arch/m68k/atari/atakeyb.c +1 −1
arch/m68k/kernel/signal.c +1 −1
arch/m68k/mac/config.c +1 −1
arch/m68k/mac/via.c +1 −1
arch/m68k/mm/fault.c +1 −1
arch/microblaze/kernel/signal.c +1 −1
arch/microblaze/mm/init.c +3 −0
arch/mips/include/asm/irqflags.h +5 −0
arch/mips/include/asm/mach-loongson64/cpu-feature-overrides.h +0 −2
arch/mips/include/asm/mach-loongson64/irq.h +0 −2
arch/mips/include/asm/mach-loongson64/mmzone.h +0 −1
arch/mips/include/asm/unroll.h +32 −32
arch/mips/kernel/perf_event_mipsxx.c +2 −2
arch/mips/kernel/smp-bmips.c +2 −0
arch/mips/kernel/traps.c +12 −0
arch/mips/mm/c-r4k.c +4 −0
arch/mips/oprofile/op_model_mipsxx.c +3 −1
arch/mips/sni/a20r.c +2 −2
arch/nds32/include/asm/irqflags.h +5 −0
arch/nds32/kernel/fpu.c +6 −6
arch/nds32/kernel/signal.c +2 −2
arch/openrisc/kernel/signal.c +1 −1
arch/parisc/kernel/signal.c +1 −1
arch/parisc/kernel/traps.c +5 −6
arch/parisc/mm/fault.c +2 −2
arch/powerpc/Kconfig +12 −0
arch/powerpc/include/asm/book3s/64/pgtable.h +3 −5
arch/powerpc/include/asm/cputable.h +5 −5
arch/powerpc/include/asm/hw_irq.h +4 −7
arch/powerpc/include/asm/mman.h +27 −4
arch/powerpc/include/asm/nohash/64/pgtable.h +2 −0
arch/powerpc/include/uapi/asm/mman.h +1 −1
arch/powerpc/kernel/dt_cpu_ftrs.c +1 −1
arch/powerpc/kernel/entry_64.S +4 −0
arch/powerpc/kernel/process.c +9 −3
arch/powerpc/mm/book3s64/hash_utils.c +2 −0
arch/powerpc/net/bpf_jit_comp.c +1 −1
arch/powerpc/perf/core-book3s.c +14 −5
arch/powerpc/perf/imc-pmu.c +2 −2
arch/powerpc/platforms/Kconfig.cputype +1 −1
arch/powerpc/platforms/powernv/idle.c +1 −1
arch/riscv/kernel/signal.c +1 −1
arch/riscv/net/bpf_jit_comp32.c +2 −2
arch/s390/Kconfig +1 −1
arch/s390/configs/debug_defconfig +4 −0
arch/s390/configs/defconfig +3 −0
arch/s390/configs/zfcpdump_defconfig +1 −0
arch/s390/include/asm/percpu.h +14 −14
arch/s390/kernel/idle.c +1 −2
arch/s390/mm/vmem.c +1 −0
arch/sh/drivers/platform_early.c +1 −1
arch/sh/kernel/disassemble.c +2 −2
arch/sh/kernel/kgdb.c +1 −1
arch/sh/kernel/signal_32.c +1 −1
arch/sparc/kernel/auxio_64.c +0 −1
arch/sparc/kernel/central.c +1 −1
arch/sparc/kernel/kgdb_32.c +1 −1
arch/sparc/kernel/kgdb_64.c +1 −1
arch/sparc/kernel/pcr.c +1 −1
arch/sparc/kernel/prom_32.c +1 −1
arch/sparc/kernel/signal32.c +2 −2
arch/sparc/kernel/signal_32.c +2 −2
arch/sparc/kernel/signal_64.c +2 −2
arch/sparc/math-emu/math_32.c +4 −4
arch/sparc/net/bpf_jit_comp_32.c +1 −1
arch/um/kernel/signal.c +1 −1
arch/x86/boot/cmdline.c +2 −2
arch/x86/boot/compressed/kaslr.c +1 −1
arch/x86/entry/common.c +20 −9
arch/x86/entry/thunk_32.S +0 −5
arch/x86/events/intel/core.c +3 −3
arch/x86/events/intel/lbr.c +1 −1
arch/x86/include/asm/entry-common.h +10 −2
arch/x86/include/asm/mmu.h +1 −0
arch/x86/include/asm/ptrace.h +1 −1
arch/x86/kernel/alternative.c +1 −1
arch/x86/kernel/apic/io_apic.c +2 −2
arch/x86/kernel/apic/probe_32.c +1 −1
arch/x86/kernel/apic/vector.c +9 −7
arch/x86/kernel/cpu/cacheinfo.c +1 −1
arch/x86/kernel/cpu/mce/inject.c +1 −1
arch/x86/kernel/cpu/mce/intel.c +1 −1
arch/x86/kernel/cpu/mtrr/cyrix.c +1 −1
arch/x86/kernel/hw_breakpoint.c +1 −1
arch/x86/kernel/kgdb.c +2 −2
arch/x86/kernel/mpparse.c +2 −2
arch/x86/kernel/process.c +0 −4
arch/x86/kernel/ptrace.c +1 −1
arch/x86/kernel/reboot.c +1 −1
arch/x86/kernel/signal.c +1 −1
arch/x86/kernel/smpboot.c +20 −6
arch/x86/kernel/traps.c +31 −34
arch/x86/kernel/uprobes.c +2 −2
arch/x86/kvm/emulate.c +1 −1
arch/x86/kvm/hyperv.c +1 −1
arch/x86/kvm/irq_comm.c +1 −1
arch/x86/kvm/lapic.c +3 −3
arch/x86/kvm/mmu/mmu.c +1 −1
arch/x86/kvm/svm/svm.c +1 −1
arch/x86/kvm/vmx/vmx.c +6 −6
arch/x86/kvm/x86.c +4 −7
arch/x86/lib/Makefile +1 −1
arch/x86/lib/cmdline.c +4 −4
arch/x86/lib/insn-eval.c +2 −4
arch/x86/math-emu/errors.c +1 −1
arch/x86/math-emu/fpu_trig.c +1 −1
arch/x86/mm/fault.c +78 −0
arch/x86/mm/ioremap.c +1 −1
arch/x86/mm/numa_emulation.c +1 −1
arch/x86/mm/tlb.c +2 −11
arch/xtensa/kernel/signal.c +1 −1
block/badblocks.c +1 −1
block/bfq-cgroup.c +1 −1
block/bfq-iosched.c +2 −2
block/bfq-iosched.h +0 −1
block/bfq-wf2q.c +2 −10
block/bio.c +5 −5
block/blk-cgroup.c +5 −3
block/blk-core.c +1 −0
block/blk-iocost.c +3 −2
block/blk-merge.c +10 −3
block/blk-mq-sched.c +9 −0
block/blk-mq.c +12 −1
block/blk-stat.c +11 −6
block/blk-wbt.c +1 −1
block/bsg-lib.c +1 −1
block/ioprio.c +1 −1
block/partitions/core.c +22 −15
crypto/af_alg.c +10 −3
crypto/drbg.c +1 −1
crypto/tcrypt.c +57 −57
drivers/accessibility/braille/braille_console.c +1 −1
drivers/accessibility/speakup/Kconfig +9 −4
drivers/accessibility/speakup/Makefile +1 −1
drivers/accessibility/speakup/serialio.c +5 −3
drivers/accessibility/speakup/spk_priv.h +0 −1
drivers/accessibility/speakup/spk_ttyio.c +7 −0
drivers/accessibility/speakup/spk_types.h +1 −0
drivers/accessibility/speakup/synth.c +1 −1
drivers/acpi/acpi_apd.c +2 −2
drivers/acpi/osl.c +19 −4
drivers/ata/ahci.c +1 −2
drivers/ata/ahci_brcm.c +1 −1
drivers/ata/libahci_platform.c +1 −1
drivers/ata/libata-core.c +10 −11
drivers/ata/libata-eh.c +3 −3
drivers/ata/libata-scsi.c +9 −3
drivers/ata/pata_atp867x.c +2 −2
drivers/ata/pata_serverworks.c +1 −1
drivers/ata/sata_mv.c +6 −6
drivers/ata/sata_promise.c +4 −4
drivers/ata/sata_sx4.c +1 −1
drivers/atm/firestream.c +2 −1
drivers/atm/fore200e.c +8 −8
drivers/atm/he.c +2 −2
drivers/atm/idt77105.c +1 −1
drivers/atm/lanai.c +1 −1
drivers/atm/zatm.c +1 −1
drivers/auxdisplay/arm-charlcd.c +1 −1
drivers/auxdisplay/panel.c +3 −3
drivers/base/core.c +8 −4
drivers/base/firmware_loader/fallback.c +2 −2
drivers/base/power/main.c +10 −6
drivers/block/aoe/aoecmd.c +1 −1
drivers/block/ataflop.c +1 −1
drivers/block/drbd/drbd_int.h +1 −1
drivers/block/drbd/drbd_main.c +1 −1
drivers/block/drbd/drbd_nl.c +1 −1
drivers/block/drbd/drbd_receiver.c +6 −6
drivers/block/drbd/drbd_req.c +2 −2
drivers/block/floppy.c +2 −2
drivers/block/loop.c +22 −19
drivers/block/nbd.c +2 −0
drivers/block/null_blk_main.c +1 −1
drivers/block/paride/pd.c +2 −2
drivers/block/pktcdvd.c +1 −1
drivers/block/rbd.c +4 −4
drivers/block/rnbd/rnbd-srv.c +2 −1
drivers/block/rsxx/core.c +1 −1
drivers/block/skd_main.c +1 −1
drivers/block/virtio_blk.c +23 −8
drivers/block/xen-blkback/blkback.c +1 −1
drivers/block/xen-blkback/xenbus.c +1 −1
drivers/block/xen-blkfront.c +2 −3
drivers/bus/ti-sysc.c +1 −1
drivers/char/agp/ali-agp.c +1 −1
drivers/char/hw_random/ingenic-rng.c +2 −7
drivers/char/ipmi/kcs_bmc.c +1 −1
drivers/char/lp.c +2 −2
drivers/char/mem.c +1 −1
drivers/char/nvram.c +1 −1
drivers/clocksource/timer-cadence-ttc.c +2 −2
drivers/cpufreq/cpufreq.c +1 −2
drivers/cpufreq/intel_pstate.c +148 −88
drivers/cpufreq/p4-clockmod.c +1 −1
drivers/cpufreq/speedstep-lib.c +1 −1
drivers/cpufreq/tegra194-cpufreq.c +7 −3
drivers/cpufreq/ti-cpufreq.c +2 −2
drivers/cpuidle/cpuidle.c +14 −5
drivers/crypto/Kconfig +3 −0
drivers/crypto/axis/artpec6_crypto.c +1 −1
drivers/crypto/cavium/cpt/cptvf_reqmanager.c +2 −2
drivers/crypto/chelsio/chcr_ktls.c +2 −2
drivers/crypto/marvell/octeontx/otx_cptvf_reqmgr.c +2 −2
drivers/crypto/qat/qat_common/adf_admin.c +4 −3
drivers/crypto/qat/qat_common/adf_pf2vf_msg.c +1 −1
drivers/crypto/qat/qat_common/qat_uclo.c +3 −3
drivers/crypto/ux500/cryp/cryp.c +6 −6
drivers/dax/device.c +1 −1
drivers/dax/super.c +6 −0
drivers/dma/acpi-dma.c +3 −1
drivers/dma/amba-pl08x.c +5 −5
drivers/dma/at_hdmac.c +9 −2
drivers/dma/dma-jz4780.c +19 −19
drivers/dma/dw-edma/dw-edma-core.c +6 −5
drivers/dma/fsldma.c +1 −1
drivers/dma/fsldma.h +6 −6
drivers/dma/idxd/device.c +26 −0
drivers/dma/idxd/irq.c +0 −12
drivers/dma/imx-dma.c +1 −1
drivers/dma/iop-adma.h +6 −6
drivers/dma/nbpfaxi.c +1 −1
drivers/dma/of-dma.c +4 −4
drivers/dma/pl330.c +4 −8
drivers/dma/sh/shdma-base.c +1 −1
drivers/dma/ti/k3-udma.c +5 −5
drivers/edac/amd64_edac.c +1 −1
drivers/edac/ghes_edac.c +6 −4
drivers/edac/pnd2_edac.c +1 −1
drivers/firewire/core-device.c +1 −1
drivers/firewire/core-iso.c +1 −1
drivers/firewire/core-topology.c +1 −1
drivers/firewire/core-transaction.c +2 −2
drivers/firewire/ohci.c +2 −2
drivers/firmware/ti_sci.c +68 −87
drivers/gpio/gpio-aspeed-sgpio.c +3 −3
drivers/gpio/gpio-aspeed.c +3 −3
drivers/gpio/gpio-ath79.c +1 −1
drivers/gpio/gpio-eic-sprd.c +1 −3
drivers/gpio/gpio-stmpe.c +2 −2
drivers/gpio/gpiolib-acpi.c +1 −1
drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10_3.c +1 −1
drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c +5 −0
drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c +1 −2
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c +2 −4
drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c +1 −1
drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c +1 −1
drivers/gpu/drm/amd/amdgpu/nv.c +1 −0
drivers/gpu/drm/amd/amdgpu/si_dpm.c +1 −1
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c +50 −43
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c +1 −1
drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c +10 −0
drivers/gpu/drm/amd/display/dc/core/dc_link.c +2 −1
drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c +4 −4
drivers/gpu/drm/amd/display/dc/dc_stream.h +1 −1
drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c +31 −22
drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c +8 −0
drivers/gpu/drm/amd/display/dc/inc/hw/clk_mgr.h +2 −0
drivers/gpu/drm/amd/powerplay/arcturus_ppt.c +7 −3
drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c +3 −6
drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c +2 −1
drivers/gpu/drm/amd/powerplay/hwmgr/vega10_thermal.c +22 −10
drivers/gpu/drm/amd/powerplay/hwmgr/vega12_thermal.c +11 −10
drivers/gpu/drm/amd/powerplay/hwmgr/vega20_thermal.c +11 −10
drivers/gpu/drm/amd/powerplay/navi10_ppt.c +7 −3
drivers/gpu/drm/amd/powerplay/sienna_cichlid_ppt.c +19 −6
drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c +2 −0
drivers/gpu/drm/arm/malidp_hw.c +3 −3
drivers/gpu/drm/ast/ast_main.c +1 −1
drivers/gpu/drm/bridge/nwl-dsi.c +0 −2
drivers/gpu/drm/bridge/synopsys/dw-hdmi-i2s-audio.c +2 −2
drivers/gpu/drm/bridge/ti-sn65dsi86.c +3 −3
drivers/gpu/drm/drm_atomic_helper.c +4 −3
drivers/gpu/drm/drm_bufs.c +1 −1
drivers/gpu/drm/drm_color_mgmt.c +1 −1
drivers/gpu/drm/drm_crtc.c +1 −3
drivers/gpu/drm/drm_dp_helper.c +1 −1
drivers/gpu/drm/drm_dp_mst_topology.c +2 −2
drivers/gpu/drm/drm_mode_object.c +2 −2
drivers/gpu/drm/drm_modes.c +1 −1
drivers/gpu/drm/drm_plane.c +1 −1
drivers/gpu/drm/etnaviv/etnaviv_gpu.c +9 −2
drivers/gpu/drm/etnaviv/etnaviv_sched.c +6 −5
drivers/gpu/drm/exynos/exynos_drm_dsi.c +5 −5
drivers/gpu/drm/exynos/exynos_drm_fbdev.c +1 −1
drivers/gpu/drm/exynos/exynos_drm_gem.h +1 −1
drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_plane.c +3 −3
drivers/gpu/drm/i915/display/icl_dsi.c +3 −3
drivers/gpu/drm/i915/display/intel_bios.c +3 −3
drivers/gpu/drm/i915/display/intel_cdclk.c +5 −5
drivers/gpu/drm/i915/display/intel_combo_phy.c +5 −5
drivers/gpu/drm/i915/display/intel_ddi.c +2 −2
drivers/gpu/drm/i915/display/intel_display.c +10 −10
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sound/hda/intel-dsp-config.c +5 −5
sound/pci/asihpi/asihpi.c +4 −5
sound/pci/ca0106/ca0106_main.c +2 −1
sound/pci/hda/hda_intel.c +3 −4
sound/pci/hda/hda_tegra.c +7 −0
sound/pci/hda/patch_hdmi.c +7 −0
sound/pci/hda/patch_realtek.c +44 −2
sound/pci/riptide/riptide.c +3 −3
sound/pci/rme9652/hdsp.c +3 −3
sound/pci/rme9652/hdspm.c +3 −4
sound/ppc/snd_ps3.c +2 −2
sound/soc/atmel/mchp-i2s-mcc.c +1 −1
sound/soc/codecs/jz4770.c +1 −1
sound/soc/codecs/pcm186x.c +1 −1
sound/soc/fsl/fsl_esai.c +3 −4
sound/soc/fsl/fsl_ssi.c +1 −1
sound/soc/hisilicon/hi6210-i2s.c +2 −2
sound/soc/intel/baytrail/sst-baytrail-pcm.c +1 −1
sound/soc/intel/boards/bytcht_es8316.c +1 −1
sound/soc/intel/boards/bytcr_rt5651.c +2 −2
sound/soc/intel/skylake/skl-pcm.c +1 −1
sound/soc/meson/axg-tdm-interface.c +5 −5
sound/soc/pxa/pxa-ssp.c +1 −1
sound/soc/rockchip/rockchip_pdm.c +3 −3
sound/soc/samsung/i2s.c +1 −1
sound/soc/sh/siu_pcm.c +4 −6
sound/soc/soc-core.c +1 −1
sound/soc/soc-topology.c +2 −2
sound/soc/sof/intel/hda-dai.c +2 −2
sound/soc/sof/pcm.c +2 −2
sound/soc/ti/davinci-i2s.c +1 −1
sound/soc/ti/n810.c +1 −1
sound/soc/ti/omap-dmic.c +2 −2
sound/soc/ti/omap-mcpdm.c +4 −4
sound/soc/ti/rx51.c +1 −1
sound/soc/txx9/txx9aclc.c +3 −4
sound/soc/zte/zx-i2s.c +2 −2
sound/soc/zte/zx-spdif.c +1 −1
sound/usb/midi.c +3 −4
sound/usb/misc/ua101.c +3 −4
sound/usb/pcm.c +2 −0
sound/usb/quirks-table.h +67 −11
sound/usb/quirks.c +11 −0
sound/usb/usbaudio.h +1 −0
sound/x86/Kconfig +1 −1
tools/include/uapi/linux/perf_event.h +1 −1
tools/lib/traceevent/event-parse.c +1 −1
tools/perf/Documentation/perf-record.txt +4 −0
tools/perf/Documentation/perf-stat.txt +7 −0
tools/perf/bench/synthesize.c +2 −2
tools/perf/builtin-record.c +1 −1
tools/perf/builtin-report.c +3 −0
tools/perf/builtin-sched.c +5 −1
tools/perf/builtin-stat.c +5 −3
tools/perf/builtin-top.c +2 −0
tools/perf/pmu-events/jevents.c +1 −1
tools/perf/tests/bpf.c +1 −1
tools/perf/tests/parse-events.c +2 −2
tools/perf/tests/parse-metric.c +3 −0
tools/perf/ui/browsers/hists.c +2 −1
tools/perf/util/arm-spe-decoder/arm-spe-decoder.c +3 −3
tools/perf/util/cs-etm.c +8 −1
tools/perf/util/intel-pt.c +8 −1
tools/perf/util/machine.c +0 −6
tools/perf/util/map.c +16 −0
tools/perf/util/map.h +8 −1
tools/perf/util/parse-events.c +19 −12
tools/perf/util/parse-events.y +4 −4
tools/perf/util/session.c +1 −1
tools/perf/util/stat-display.c +1 −1
tools/perf/util/stat.h +1 −0
tools/perf/util/symbol.c +1 −0
tools/perf/util/zstd.c +1 −1
tools/testing/selftests/bpf/test_maps.c +2 −0
tools/testing/selftests/bpf/test_progs.c +3 −1
tools/testing/selftests/netfilter/nft_flowtable.sh +37 −30
tools/testing/selftests/powerpc/mm/.gitignore +1 −0
tools/testing/selftests/powerpc/mm/Makefile +3 −1
tools/testing/selftests/powerpc/mm/prot_sao.c +43 −0
tools/testing/selftests/x86/test_vsyscall.c +20 −2
tools/usb/Build +2 −0
tools/usb/Makefile +45 −8

@@ -111,6 +111,7 @@ ForEachMacros: · 110 unmodified lines
111	111	- 'css_for_each_descendant_pre'
112	112	- 'device_for_each_child_node'
113	113	- 'dma_fence_chain_for_each'
	114	+ - 'do_for_each_ftrace_op'
114	115	- 'drm_atomic_crtc_for_each_plane'
115	116	- 'drm_atomic_crtc_state_for_each_plane'
116	117	- 'drm_atomic_crtc_state_for_each_plane_state'
@@ -136,6 +137,7 @@ ForEachMacros: · 19 unmodified lines
136	137	- 'for_each_active_dev_scope'
137	138	- 'for_each_active_drhd_unit'
138	139	- 'for_each_active_iommu'
	140	+ - 'for_each_aggr_pgid'
139	141	- 'for_each_available_child_of_node'
140	142	- 'for_each_bio'
141	143	- 'for_each_board_func_rsrc'
@@ -234,6 +236,7 @@ ForEachMacros: · 92 unmodified lines
234	236	- 'for_each_node_state'
235	237	- 'for_each_node_with_cpus'
236	238	- 'for_each_node_with_property'
	239	+ - 'for_each_nonreserved_multicast_dest_pgid'
237	240	- 'for_each_of_allnodes'
238	241	- 'for_each_of_allnodes_from'
239	242	- 'for_each_of_cpu_node'
@@ -256,6 +259,7 @@ ForEachMacros: · 16 unmodified lines
256	259	- 'for_each_pci_dev'
257	260	- 'for_each_pci_msi_entry'
258	261	- 'for_each_pcm_streams'
	262	+ - 'for_each_physmem_range'
259	263	- 'for_each_populated_zone'
260	264	- 'for_each_possible_cpu'
261	265	- 'for_each_present_cpu'
@@ -265,6 +269,8 @@ ForEachMacros: · 3 unmodified lines
265	269	- 'for_each_process_thread'
266	270	- 'for_each_property_of_node'
267	271	- 'for_each_registered_fb'
	272	+ - 'for_each_requested_gpio'
	273	+ - 'for_each_requested_gpio_in_range'
268	274	- 'for_each_reserved_mem_region'
269	275	- 'for_each_rtd_codec_dais'
270	276	- 'for_each_rtd_codec_dais_rollback'
@@ -278,12 +284,17 @@ ForEachMacros: · 7 unmodified lines
278	284	- 'for_each_sg'
279	285	- 'for_each_sg_dma_page'
280	286	- 'for_each_sg_page'
	287	+ - 'for_each_sgtable_dma_page'
	288	+ - 'for_each_sgtable_dma_sg'
	289	+ - 'for_each_sgtable_page'
	290	+ - 'for_each_sgtable_sg'
281	291	- 'for_each_sibling_event'
282	292	- 'for_each_subelement'
283	293	- 'for_each_subelement_extid'
284	294	- 'for_each_subelement_id'
285	295	- '__for_each_thread'
286	296	- 'for_each_thread'
	297	+ - 'for_each_unicast_dest_pgid'
287	298	- 'for_each_wakeup_source'
288	299	- 'for_each_zone'
289	300	- 'for_each_zone_zonelist'
@@ -464,6 +475,7 @@ ForEachMacros: · 174 unmodified lines
464	475	- 'v4l2_m2m_for_each_src_buf'
465	476	- 'v4l2_m2m_for_each_src_buf_safe'
466	477	- 'virtio_device_for_each_vq'
	478	+ - 'while_for_each_ftrace_op'
467	479	- 'xa_for_each'
468	480	- 'xa_for_each_marked'
469	481	- 'xa_for_each_range'

Documentation/RCU/lockdep.rst+1−1

@@ -49,7 +49,7 @@ checking of rcu_dereference() primitives: · 48 unmodified lines
49	49	is invoked by both RCU-sched readers and updaters.
50	50	srcu_dereference_check(p, c):
51	51	Use explicit check expression "c" along with
52		− srcu_read_lock_held()(). This is useful in code that
	52	+ srcu_read_lock_held(). This is useful in code that
53	53	is invoked by both SRCU readers and updaters.
54	54	rcu_dereference_raw(p):
55	55	Don't check. (Use sparingly, if at all.)

Documentation/admin-guide/devices.txt+1−1

@@ -1662,7 +1662,7 @@ · 1661 unmodified lines
1662	1662
1663	1663	98 block User-mode virtual block device
1664	1664	0 = /dev/ubda First user-mode block device
1665		− 16 = /dev/udbb Second user-mode block device
	1665	+ 16 = /dev/ubdb Second user-mode block device
1666	1666	...
1667	1667
1668	1668	Partitions are handled in the same way as for IDE

Documentation/admin-guide/laptops/thinkpad-acpi.rst+1−1

@@ -1434,7 +1434,7 @@ on the feature, restricting the viewing angles. · 1433 unmodified lines
1434	1434
1435	1435
1436	1436	DYTC Lapmode sensor
1437		−------------------
	1437	+-------------------
1438	1438
1439	1439	sysfs: dytc_lapmode
1440	1440

Documentation/admin-guide/pm/intel_pstate.rst+5−3

@@ -123,7 +123,9 @@ Energy-Performance Bias (EPB) knob (otherwise), which means that the processor's · 122 unmodified lines
123	123	internal P-state selection logic is expected to focus entirely on performance.
124	124
125	125	This will override the EPP/EPB setting coming from the ``sysfs`` interface
126		−(see `Energy vs Performance Hints`_ below).
	126	+(see `Energy vs Performance Hints`_ below). Moreover, any attempts to change
	127	+the EPP/EPB to a value different from 0 ("performance") via ``sysfs`` in this
	128	+configuration will be rejected.
127	129
128	130	Also, in this configuration the range of P-states available to the processor's
129	131	internal P-state selection logic is always restricted to the upper boundary
@@ -564,8 +566,8 @@ Energy-Performance Preference (EPP) knob (if supported) or its · 434 unmodified lines
564	566	Energy-Performance Bias (EPB) knob. It is also possible to write a positive
565	567	integer value between 0 to 255, if the EPP feature is present. If the EPP
566	568	feature is not present, writing integer value to this attribute is not
567		−supported. In this case, user can use
568		− "/sys/devices/system/cpu/cpu*/power/energy_perf_bias" interface.
	569	+supported. In this case, user can use the
	570	+"/sys/devices/system/cpu/cpu*/power/energy_perf_bias" interface.
569	571
570	572	[Note that tasks may by migrated from one CPU to another by the scheduler's
571	573	load-balancing algorithm and if different energy vs performance hints are

Documentation/devicetree/bindings/interrupt-controller/ti,sci-inta.txt+0−66

@@ -1,66 +0,0 @@
1		−Texas Instruments K3 Interrupt Aggregator
2		−=========================================
3		−
4		−The Interrupt Aggregator (INTA) provides a centralized machine
5		−which handles the termination of system events to that they can
6		−be coherently processed by the host(s) in the system. A maximum
7		−of 64 events can be mapped to a single interrupt.
8		−
9		−
10		− Interrupt Aggregator
11		− +-----------------------------------------+
12		− \| Intmap VINT \|
13		− \| +--------------+ +------------+ \|
14		− m ------>\| \| vint \| bit \| \| 0 \|.....\|63\| vint0 \|
15		− . \| +--------------+ +------------+ \| +------+
16		− . \| . . \| \| HOST \|
17		−Globalevents ------>\| . . \|------>\| IRQ \|
18		− . \| . . \| \| CTRL \|
19		− . \| . . \| +------+
20		− n ------>\| +--------------+ +------------+ \|
21		− \| \| vint \| bit \| \| 0 \|.....\|63\| vintx \|
22		− \| +--------------+ +------------+ \|
23		− \| \|
24		− +-----------------------------------------+
25		−
26		−Configuration of these Intmap registers that maps global events to vint is done
27		−by a system controller (like the Device Memory and Security Controller on K3
28		−AM654 SoC). Driver should request the system controller to get the range
29		−of global events and vints assigned to the requesting host. Management
30		−of these requested resources should be handled by driver and requests
31		−system controller to map specific global event to vint, bit pair.
32		−
33		−Communication between the host processor running an OS and the system
34		−controller happens through a protocol called TI System Control Interface
35		−(TISCI protocol). For more details refer:
36		−Documentation/devicetree/bindings/arm/keystone/ti,sci.txt
37		−
38		−TISCI Interrupt Aggregator Node:
39		−-------------------------------
40		−- compatible: Must be "ti,sci-inta".
41		−- reg: Should contain registers location and length.
42		−- interrupt-controller: Identifies the node as an interrupt controller
43		−- msi-controller: Identifies the node as an MSI controller.
44		−- interrupt-parent: phandle of irq parent.
45		−- ti,sci: Phandle to TI-SCI compatible System controller node.
46		−- ti,sci-dev-id: TISCI device ID of the Interrupt Aggregator.
47		−- ti,sci-rm-range-vint: Array of TISCI subtype ids representing vints(inta
48		− outputs) range within this INTA, assigned to the
49		− requesting host context.
50		−- ti,sci-rm-range-global-event: Array of TISCI subtype ids representing the
51		− global events range reaching this IA and are assigned
52		− to the requesting host context.
53		−
54		−Example:
55		−--------
56		−main_udmass_inta: interrupt-controller@33d00000 {
57		− compatible = "ti,sci-inta";
58		− reg = <0x0 0x33d00000 0x0 0x100000>;
59		− interrupt-controller;
60		− msi-controller;
61		− interrupt-parent = <&main_navss_intr>;
62		− ti,sci = <&dmsc>;
63		− ti,sci-dev-id = <179>;
64		− ti,sci-rm-range-vint = <0x0>;
65		− ti,sci-rm-range-global-event = <0x1>;
66		−};

Documentation/devicetree/bindings/interrupt-controller/ti,sci-inta.yaml+98−0

@@ -0,0 +1,98 @@
	1	+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
	2	+%YAML 1.2
	3	+---
	4	+$id: http://devicetree.org/schemas/interrupt-controller/ti,sci-inta.yaml#
	5	+$schema: http://devicetree.org/meta-schemas/core.yaml#
	6	+
	7	+title: Texas Instruments K3 Interrupt Aggregator
	8	+
	9	+maintainers:
	10	+ - Lokesh Vutla <lokeshvutla@ti.com>
	11	+
	12	+allOf:
	13	+ - $ref: /schemas/arm/keystone/ti,k3-sci-common.yaml#
	14	+
	15	+description: \|
	16	+ The Interrupt Aggregator (INTA) provides a centralized machine
	17	+ which handles the termination of system events to that they can
	18	+ be coherently processed by the host(s) in the system. A maximum
	19	+ of 64 events can be mapped to a single interrupt.
	20	+
	21	+ Interrupt Aggregator
	22	+ +-----------------------------------------+
	23	+ \| Intmap VINT \|
	24	+ \| +--------------+ +------------+ \|
	25	+ m ------>\| \| vint \| bit \| \| 0 \|.....\|63\| vint0 \|
	26	+ . \| +--------------+ +------------+ \| +------+
	27	+ . \| . . \| \| HOST \|
	28	+ Globalevents ------>\| . . \|----->\| IRQ \|
	29	+ . \| . . \| \| CTRL \|
	30	+ . \| . . \| +------+
	31	+ n ------>\| +--------------+ +------------+ \|
	32	+ \| \| vint \| bit \| \| 0 \|.....\|63\| vintx \|
	33	+ \| +--------------+ +------------+ \|
	34	+ \| \|
	35	+ +-----------------------------------------+
	36	+
	37	+ Configuration of these Intmap registers that maps global events to vint is
	38	+ done by a system controller (like the Device Memory and Security Controller
	39	+ on AM654 SoC). Driver should request the system controller to get the range
	40	+ of global events and vints assigned to the requesting host. Management
	41	+ of these requested resources should be handled by driver and requests
	42	+ system controller to map specific global event to vint, bit pair.
	43	+
	44	+ Communication between the host processor running an OS and the system
	45	+ controller happens through a protocol called TI System Control Interface
	46	+ (TISCI protocol).
	47	+
	48	+properties:
	49	+ compatible:
	50	+ const: ti,sci-inta
	51	+
	52	+ reg:
	53	+ maxItems: 1
	54	+
	55	+ interrupt-controller: true
	56	+
	57	+ msi-controller: true
	58	+
	59	+ ti,interrupt-ranges:
	60	+ $ref: /schemas/types.yaml#/definitions/uint32-matrix
	61	+ description: \|
	62	+ Interrupt ranges that converts the INTA output hw irq numbers
	63	+ to parents's input interrupt numbers.
	64	+ items:
	65	+ items:
	66	+ - description: \|
	67	+ "output_irq" specifies the base for inta output irq
	68	+ - description: \|
	69	+ "parent's input irq" specifies the base for parent irq
	70	+ - description: \|
	71	+ "limit" specifies the limit for translation
	72	+
	73	+required:
	74	+ - compatible
	75	+ - reg
	76	+ - interrupt-controller
	77	+ - msi-controller
	78	+ - ti,sci
	79	+ - ti,sci-dev-id
	80	+ - ti,interrupt-ranges
	81	+
	82	+examples:
	83	+ - \|
	84	+ bus {
	85	+ #address-cells = <2>;
	86	+ #size-cells = <2>;
	87	+
	88	+ main_udmass_inta: msi-controller@33d00000 {
	89	+ compatible = "ti,sci-inta";
	90	+ reg = <0x0 0x33d00000 0x0 0x100000>;
	91	+ interrupt-controller;
	92	+ msi-controller;
	93	+ interrupt-parent = <&main_navss_intr>;
	94	+ ti,sci = <&dmsc>;
	95	+ ti,sci-dev-id = <179>;
	96	+ ti,interrupt-ranges = <0 0 256>;
	97	+ };
	98	+ };

Documentation/devicetree/bindings/interrupt-controller/ti,sci-intr.txt+0−82

@@ -1,82 +0,0 @@
1		−Texas Instruments K3 Interrupt Router
2		−=====================================
3		−
4		−The Interrupt Router (INTR) module provides a mechanism to mux M
5		−interrupt inputs to N interrupt outputs, where all M inputs are selectable
6		−to be driven per N output. An Interrupt Router can either handle edge triggered
7		−or level triggered interrupts and that is fixed in hardware.
8		−
9		− Interrupt Router
10		− +----------------------+
11		− \| Inputs Outputs \|
12		− +-------+ \| +------+ +-----+ \|
13		− \| GPIO \|----------->\| \| irq0 \| \| 0 \| \| Host IRQ
14		− +-------+ \| +------+ +-----+ \| controller
15		− \| . . \| +-------+
16		− +-------+ \| . . \|----->\| IRQ \|
17		− \| INTA \|----------->\| . . \| +-------+
18		− +-------+ \| . +-----+ \|
19		− \| +------+ \| N \| \|
20		− \| \| irqM \| +-----+ \|
21		− \| +------+ \|
22		− \| \|
23		− +----------------------+
24		−
25		−There is one register per output (MUXCNTL_N) that controls the selection.
26		−Configuration of these MUXCNTL_N registers is done by a system controller
27		−(like the Device Memory and Security Controller on K3 AM654 SoC). System
28		−controller will keep track of the used and unused registers within the Router.
29		−Driver should request the system controller to get the range of GIC IRQs
30		−assigned to the requesting hosts. It is the drivers responsibility to keep
31		−track of Host IRQs.
32		−
33		−Communication between the host processor running an OS and the system
34		−controller happens through a protocol called TI System Control Interface
35		−(TISCI protocol). For more details refer:
36		−Documentation/devicetree/bindings/arm/keystone/ti,sci.txt
37		−
38		−TISCI Interrupt Router Node:
39		−----------------------------
40		−Required Properties:
41		−- compatible: Must be "ti,sci-intr".
42		−- ti,intr-trigger-type: Should be one of the following:
43		− 1: If intr supports edge triggered interrupts.
44		− 4: If intr supports level triggered interrupts.
45		−- interrupt-controller: Identifies the node as an interrupt controller
46		−- #interrupt-cells: Specifies the number of cells needed to encode an
47		− interrupt source. The value should be 2.
48		− First cell should contain the TISCI device ID of source
49		− Second cell should contain the interrupt source offset
50		− within the device.
51		−- ti,sci: Phandle to TI-SCI compatible System controller node.
52		−- ti,sci-dst-id: TISCI device ID of the destination IRQ controller.
53		−- ti,sci-rm-range-girq: Array of TISCI subtype ids representing the host irqs
54		− assigned to this interrupt router. Each subtype id
55		− corresponds to a range of host irqs.
56		−
57		−For more details on TISCI IRQ resource management refer:
58		−https://downloads.ti.com/tisci/esd/latest/2_tisci_msgs/rm/rm_irq.html
59		−
60		−Example:
61		−--------
62		−The following example demonstrates both interrupt router node and the consumer
63		−node(main gpio) on the AM654 SoC:
64		−
65		−main_intr: interrupt-controller0 {
66		− compatible = "ti,sci-intr";
67		− ti,intr-trigger-type = <1>;
68		− interrupt-controller;
69		− interrupt-parent = <&gic500>;
70		− #interrupt-cells = <2>;
71		− ti,sci = <&dmsc>;
72		− ti,sci-dst-id = <56>;
73		− ti,sci-rm-range-girq = <0x1>;
74		−};
75		−
76		−main_gpio0: gpio@600000 {
77		− ...
78		− interrupt-parent = <&main_intr>;
79		− interrupts = <57 256>, <57 257>, <57 258>,
80		− <57 259>, <57 260>, <57 261>;
81		− ...
82		−};

Documentation/devicetree/bindings/interrupt-controller/ti,sci-intr.yaml+102−0

@@ -0,0 +1,102 @@
	1	+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
	2	+%YAML 1.2
	3	+---
	4	+$id: http://devicetree.org/schemas/interrupt-controller/ti,sci-intr.yaml#
	5	+$schema: http://devicetree.org/meta-schemas/core.yaml#
	6	+
	7	+title: Texas Instruments K3 Interrupt Router
	8	+
	9	+maintainers:
	10	+ - Lokesh Vutla <lokeshvutla@ti.com>
	11	+
	12	+allOf:
	13	+ - $ref: /schemas/arm/keystone/ti,k3-sci-common.yaml#
	14	+
	15	+description: \|
	16	+ The Interrupt Router (INTR) module provides a mechanism to mux M
	17	+ interrupt inputs to N interrupt outputs, where all M inputs are selectable
	18	+ to be driven per N output. An Interrupt Router can either handle edge
	19	+ triggered or level triggered interrupts and that is fixed in hardware.
	20	+
	21	+ Interrupt Router
	22	+ +----------------------+
	23	+ \| Inputs Outputs \|
	24	+ +-------+ \| +------+ +-----+ \|
	25	+ \| GPIO \|----------->\| \| irq0 \| \| 0 \| \| Host IRQ
	26	+ +-------+ \| +------+ +-----+ \| controller
	27	+ \| . . \| +-------+
	28	+ +-------+ \| . . \|----->\| IRQ \|
	29	+ \| INTA \|----------->\| . . \| +-------+
	30	+ +-------+ \| . +-----+ \|
	31	+ \| +------+ \| N \| \|
	32	+ \| \| irqM \| +-----+ \|
	33	+ \| +------+ \|
	34	+ \| \|
	35	+ +----------------------+
	36	+
	37	+ There is one register per output (MUXCNTL_N) that controls the selection.
	38	+ Configuration of these MUXCNTL_N registers is done by a system controller
	39	+ (like the Device Memory and Security Controller on K3 AM654 SoC). System
	40	+ controller will keep track of the used and unused registers within the Router.
	41	+ Driver should request the system controller to get the range of GIC IRQs
	42	+ assigned to the requesting hosts. It is the drivers responsibility to keep
	43	+ track of Host IRQs.
	44	+
	45	+ Communication between the host processor running an OS and the system
	46	+ controller happens through a protocol called TI System Control Interface
	47	+ (TISCI protocol).
	48	+
	49	+properties:
	50	+ compatible:
	51	+ const: ti,sci-intr
	52	+
	53	+ ti,intr-trigger-type:
	54	+ $ref: /schemas/types.yaml#/definitions/uint32
	55	+ enum: [1, 4]
	56	+ description: \|
	57	+ Should be one of the following.
	58	+ 1 = If intr supports edge triggered interrupts.
	59	+ 4 = If intr supports level triggered interrupts.
	60	+
	61	+ interrupt-controller: true
	62	+
	63	+ '#interrupt-cells':
	64	+ const: 1
	65	+ description: \|
	66	+ The 1st cell should contain interrupt router input hw number.
	67	+
	68	+ ti,interrupt-ranges:
	69	+ $ref: /schemas/types.yaml#/definitions/uint32-matrix
	70	+ description: \|
	71	+ Interrupt ranges that converts the INTR output hw irq numbers
	72	+ to parents's input interrupt numbers.
	73	+ items:
	74	+ items:
	75	+ - description: \|
	76	+ "output_irq" specifies the base for intr output irq
	77	+ - description: \|
	78	+ "parent's input irq" specifies the base for parent irq
	79	+ - description: \|
	80	+ "limit" specifies the limit for translation
	81	+
	82	+required:
	83	+ - compatible
	84	+ - ti,intr-trigger-type
	85	+ - interrupt-controller
	86	+ - '#interrupt-cells'
	87	+ - ti,sci
	88	+ - ti,sci-dev-id
	89	+ - ti,interrupt-ranges
	90	+
	91	+examples:
	92	+ - \|
	93	+ main_gpio_intr: interrupt-controller0 {
	94	+ compatible = "ti,sci-intr";
	95	+ ti,intr-trigger-type = <1>;
	96	+ interrupt-controller;
	97	+ interrupt-parent = <&gic500>;
	98	+ #interrupt-cells = <1>;
	99	+ ti,sci = <&dmsc>;
	100	+ ti,sci-dev-id = <131>;
	101	+ ti,interrupt-ranges = <0 360 32>;
	102	+ };

Documentation/devicetree/bindings/mmc/arasan,sdhci.yaml+7−3

@@ -30,9 +30,13 @@ allOf: · 29 unmodified lines
30	30	then:
31	31	properties:
32	32	clock-output-names:
33		− items:
34		− - const: clk_out_sd0
35		− - const: clk_in_sd0
	33	+ oneOf:
	34	+ - items:
	35	+ - const: clk_out_sd0
	36	+ - const: clk_in_sd0
	37	+ - items:
	38	+ - const: clk_out_sd1
	39	+ - const: clk_in_sd1
36	40
37	41	properties:
38	42	compatible:

Documentation/devicetree/bindings/mmc/mtk-sd.txt+2−0

@@ -50,6 +50,8 @@ Optional properties: · 49 unmodified lines
50	50	error caused by stop clock(fifo full)
51	51	Valid range = [0:0x7]. if not present, default value is 0.
52	52	applied to compatible "mediatek,mt2701-mmc".
	53	+- resets: Phandle and reset specifier pair to softreset line of MSDC IP.
	54	+- reset-names: Should be "hrst".
53	55
54	56	Examples:
55	57	mmc0: mmc@11230000 {

Documentation/devicetree/bindings/mmc/nvidia,tegra20-sdhci.txt+29−3

@@ -15,8 +15,15 @@ Required properties: · 14 unmodified lines
15	15	- "nvidia,tegra210-sdhci": for Tegra210
16	16	- "nvidia,tegra186-sdhci": for Tegra186
17	17	- "nvidia,tegra194-sdhci": for Tegra194
18		−- clocks : Must contain one entry, for the module clock.
19		− See ../clocks/clock-bindings.txt for details.
	18	+- clocks: For Tegra210, Tegra186 and Tegra194 must contain two entries.
	19	+ One for the module clock and one for the timeout clock.
	20	+ For all other Tegra devices, must contain a single entry for
	21	+ the module clock. See ../clocks/clock-bindings.txt for details.
	22	+- clock-names: For Tegra210, Tegra186 and Tegra194 must contain the
	23	+ strings 'sdhci' and 'tmclk' to represent the module and
	24	+ the timeout clocks, respectively.
	25	+ For all other Tegra devices must contain the string 'sdhci'
	26	+ to represent the module clock.
20	27	- resets : Must contain an entry for each entry in reset-names.
21	28	See ../reset/reset.txt for details.
22	29	- reset-names : Must include the following entries:
@@ -99,7 +106,7 @@ Optional properties for Tegra210, Tegra186 and Tegra194: · 76 unmodified lines
99	106
100	107	Example:
101	108	sdhci@700b0000 {
102		− compatible = "nvidia,tegra210-sdhci", "nvidia,tegra124-sdhci";
	109	+ compatible = "nvidia,tegra124-sdhci";
103	110	reg = <0x0 0x700b0000 0x0 0x200>;
104	111	interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
105	112	clocks = <&tegra_car TEGRA210_CLK_SDMMC1>;
@@ -115,3 +122,22 @@ sdhci@700b0000 { · 9 unmodified lines
115	122	nvidia,pad-autocal-pull-down-offset-1v8 = <0x7b>;
116	123	status = "disabled";
117	124	};
	125	+
	126	+sdhci@700b0000 {
	127	+ compatible = "nvidia,tegra210-sdhci";
	128	+ reg = <0x0 0x700b0000 0x0 0x200>;
	129	+ interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
	130	+ clocks = <&tegra_car TEGRA210_CLK_SDMMC1>,
	131	+ <&tegra_car TEGRA210_CLK_SDMMC_LEGACY>;
	132	+ clock-names = "sdhci", "tmclk";
	133	+ resets = <&tegra_car 14>;
	134	+ reset-names = "sdhci";
	135	+ pinctrl-names = "sdmmc-3v3", "sdmmc-1v8";
	136	+ pinctrl-0 = <&sdmmc1_3v3>;
	137	+ pinctrl-1 = <&sdmmc1_1v8>;
	138	+ nvidia,pad-autocal-pull-up-offset-3v3 = <0x00>;
	139	+ nvidia,pad-autocal-pull-down-offset-3v3 = <0x7d>;
	140	+ nvidia,pad-autocal-pull-up-offset-1v8 = <0x7b>;
	141	+ nvidia,pad-autocal-pull-down-offset-1v8 = <0x7b>;
	142	+ status = "disabled";
	143	+};

Documentation/devicetree/bindings/net/dsa/dsa.txt+1−1

@@ -1,4 +1,4 @@
1	1	Distributed Switch Architecture Device Tree Bindings
2	2	----------------------------------------------------
3	3
4		−See Documentation/devicetree/bindings/net/dsa/dsa.yaml for the documenation.
	4	+See Documentation/devicetree/bindings/net/dsa/dsa.yaml for the documentation.

Documentation/driver-api/fpga/fpga-bridge.rst+3−3

@@ -6,9 +6,9 @@ API to implement a new FPGA bridge · 5 unmodified lines
6	6
7	7	* struct :c:type:`fpga_bridge` — The FPGA Bridge structure
8	8	* struct :c:type:`fpga_bridge_ops` — Low level Bridge driver ops
9		−* :c:func:`devm_fpga_bridge_create()` — Allocate and init a bridge struct
10		−* :c:func:`fpga_bridge_register()` — Register a bridge
11		−* :c:func:`fpga_bridge_unregister()` — Unregister a bridge
	9	+* devm_fpga_bridge_create() — Allocate and init a bridge struct
	10	+* fpga_bridge_register() — Register a bridge
	11	+* fpga_bridge_unregister() — Unregister a bridge
12	12
13	13	.. kernel-doc:: include/linux/fpga/fpga-bridge.h
14	14	:functions: fpga_bridge

Documentation/driver-api/fpga/fpga-mgr.rst+3−3

@@ -104,9 +104,9 @@ API for implementing a new FPGA Manager driver · 103 unmodified lines
104	104	* ``fpga_mgr_states`` — Values for :c:member:`fpga_manager->state`.
105	105	* struct :c:type:`fpga_manager` — the FPGA manager struct
106	106	* struct :c:type:`fpga_manager_ops` — Low level FPGA manager driver ops
107		−* :c:func:`devm_fpga_mgr_create` — Allocate and init a manager struct
108		−* :c:func:`fpga_mgr_register` — Register an FPGA manager
109		−* :c:func:`fpga_mgr_unregister` — Unregister an FPGA manager
	107	+* devm_fpga_mgr_create() — Allocate and init a manager struct
	108	+* fpga_mgr_register() — Register an FPGA manager
	109	+* fpga_mgr_unregister() — Unregister an FPGA manager
110	110
111	111	.. kernel-doc:: include/linux/fpga/fpga-mgr.h
112	112	:functions: fpga_mgr_states

Documentation/driver-api/fpga/fpga-programming.rst+8−8

@@ -6,9 +6,9 @@ Overview · 5 unmodified lines
6	6
7	7	The in-kernel API for FPGA programming is a combination of APIs from
8	8	FPGA manager, bridge, and regions. The actual function used to
9		−trigger FPGA programming is :c:func:`fpga_region_program_fpga()`.
	9	+trigger FPGA programming is fpga_region_program_fpga().
10	10
11		−:c:func:`fpga_region_program_fpga()` uses functionality supplied by
	11	+fpga_region_program_fpga() uses functionality supplied by
12	12	the FPGA manager and bridges. It will:
13	13
14	14	* lock the region's mutex
@@ -20,8 +20,8 @@ the FPGA manager and bridges. It will: · 5 unmodified lines
20	20	* release the locks
21	21
22	22	The struct fpga_image_info specifies what FPGA image to program. It is
23		−allocated/freed by :c:func:`fpga_image_info_alloc()` and freed with
24		−:c:func:`fpga_image_info_free()`
	23	+allocated/freed by fpga_image_info_alloc() and freed with
	24	+fpga_image_info_free()
25	25
26	26	How to program an FPGA using a region
27	27	-------------------------------------
@@ -84,10 +84,10 @@ will generate that list. Here's some sample code of what to do next:: · 56 unmodified lines
84	84	API for programming an FPGA
85	85	---------------------------
86	86
87		−* :c:func:`fpga_region_program_fpga` — Program an FPGA
88		−* :c:type:`fpga_image_info` — Specifies what FPGA image to program
89		−* :c:func:`fpga_image_info_alloc()` — Allocate an FPGA image info struct
90		−* :c:func:`fpga_image_info_free()` — Free an FPGA image info struct
	87	+* fpga_region_program_fpga() — Program an FPGA
	88	+* fpga_image_info() — Specifies what FPGA image to program
	89	+* fpga_image_info_alloc() — Allocate an FPGA image info struct
	90	+* fpga_image_info_free() — Free an FPGA image info struct
91	91
92	92	.. kernel-doc:: drivers/fpga/fpga-region.c
93	93	:functions: fpga_region_program_fpga

Documentation/driver-api/fpga/fpga-region.rst+9−9

@@ -46,18 +46,18 @@ API to add a new FPGA region · 45 unmodified lines
46	46	----------------------------
47	47
48	48	* struct :c:type:`fpga_region` — The FPGA region struct
49		−* :c:func:`devm_fpga_region_create` — Allocate and init a region struct
50		−* :c:func:`fpga_region_register` — Register an FPGA region
51		−* :c:func:`fpga_region_unregister` — Unregister an FPGA region
	49	+* devm_fpga_region_create() — Allocate and init a region struct
	50	+* fpga_region_register() — Register an FPGA region
	51	+* fpga_region_unregister() — Unregister an FPGA region
52	52
53	53	The FPGA region's probe function will need to get a reference to the FPGA
54	54	Manager it will be using to do the programming. This usually would happen
55	55	during the region's probe function.
56	56
57		−* :c:func:`fpga_mgr_get` — Get a reference to an FPGA manager, raise ref count
58		−* :c:func:`of_fpga_mgr_get` — Get a reference to an FPGA manager, raise ref count,
	57	+* fpga_mgr_get() — Get a reference to an FPGA manager, raise ref count
	58	+* of_fpga_mgr_get() — Get a reference to an FPGA manager, raise ref count,
59	59	given a device node.
60		−* :c:func:`fpga_mgr_put` — Put an FPGA manager
	60	+* fpga_mgr_put() — Put an FPGA manager
61	61
62	62	The FPGA region will need to specify which bridges to control while programming
63	63	the FPGA. The region driver can build a list of bridges during probe time
@@ -66,11 +66,11 @@ the list of bridges to program just before programming · 2 unmodified lines
66	66	(:c:member:`fpga_region->get_bridges`). The FPGA bridge framework supplies the
67	67	following APIs to handle building or tearing down that list.
68	68
69		−* :c:func:`fpga_bridge_get_to_list` — Get a ref of an FPGA bridge, add it to a
	69	+* fpga_bridge_get_to_list() — Get a ref of an FPGA bridge, add it to a
70	70	list
71		−* :c:func:`of_fpga_bridge_get_to_list` — Get a ref of an FPGA bridge, add it to a
	71	+* of_fpga_bridge_get_to_list() — Get a ref of an FPGA bridge, add it to a
72	72	list, given a device node
73		−* :c:func:`fpga_bridges_put` — Given a list of bridges, put them
	73	+* fpga_bridges_put() — Given a list of bridges, put them
74	74
75	75	.. kernel-doc:: include/linux/fpga/fpga-region.h
76	76	:functions: fpga_region

Documentation/driver-api/iio/core.rst+8−8

@@ -11,10 +11,10 @@ Industrial I/O Devices · 10 unmodified lines
11	11	----------------------
12	12
13	13	* struct :c:type:`iio_dev` - industrial I/O device
14		−* :c:func:`iio_device_alloc()` - allocate an :c:type:`iio_dev` from a driver
15		−* :c:func:`iio_device_free()` - free an :c:type:`iio_dev` from a driver
16		−* :c:func:`iio_device_register()` - register a device with the IIO subsystem
17		−* :c:func:`iio_device_unregister()` - unregister a device from the IIO
	14	+* iio_device_alloc() - allocate an :c:type:`iio_dev` from a driver
	15	+* iio_device_free() - free an :c:type:`iio_dev` from a driver
	16	+* iio_device_register() - register a device with the IIO subsystem
	17	+* iio_device_unregister() - unregister a device from the IIO
18	18	subsystem
19	19
20	20	An IIO device usually corresponds to a single hardware sensor and it
@@ -34,17 +34,17 @@ A typical IIO driver will register itself as an :doc:`I2C <../i2c>` or · 13 unmodified lines
34	34
35	35	At probe:
36	36
37		−1. Call :c:func:`iio_device_alloc()`, which allocates memory for an IIO device.
	37	+1. Call iio_device_alloc(), which allocates memory for an IIO device.
38	38	2. Initialize IIO device fields with driver specific information (e.g.
39	39	device name, device channels).
40		−3. Call :c:func:`iio_device_register()`, this registers the device with the
	40	+3. Call iio_device_register(), this registers the device with the
41	41	IIO core. After this call the device is ready to accept requests from user
42	42	space applications.
43	43
44	44	At remove, we free the resources allocated in probe in reverse order:
45	45
46		−1. :c:func:`iio_device_unregister()`, unregister the device from the IIO core.
47		−2. :c:func:`iio_device_free()`, free the memory allocated for the IIO device.
	46	+1. iio_device_unregister(), unregister the device from the IIO core.
	47	+2. iio_device_free(), free the memory allocated for the IIO device.
48	48
49	49	IIO device sysfs interface
50	50	==========================

Documentation/fault-injection/nvme-fault-injection.rst+1−1

@@ -3,7 +3,7 @@ NVMe Fault Injection · 2 unmodified lines
3	3	Linux's fault injection framework provides a systematic way to support
4	4	error injection via debugfs in the /sys/kernel/debug directory. When
5	5	enabled, the default NVME_SC_INVALID_OPCODE with no retry will be
6		−injected into the nvme_end_request. Users can change the default status
	6	+injected into the nvme_try_complete_req. Users can change the default status
7	7	code and no retry flag via the debugfs. The list of Generic Command
8	8	Status can be found in include/linux/nvme.h
9	9

Documentation/filesystems/affs.rst+10−6

@@ -110,13 +110,15 @@ The Amiga protection flags RWEDRWEDHSPARWED are handled as follows: · 109 unmodified lines
110	110
111	111	- R maps to r for user, group and others. On directories, R implies x.
112	112
113		− - If both W and D are allowed, w will be set.
	113	+ - W maps to w.
114	114
115	115	- E maps to x.
116	116
117		− - H and P are always retained and ignored under Linux.
	117	+ - D is ignored.
118	118
119		− - A is always reset when a file is written to.
	119	+ - H, S and P are always retained and ignored under Linux.
	120	+
	121	+ - A is cleared when a file is written to.
120	122
121	123	User id and group id will be used unless set[gu]id are given as mount
122	124	options. Since most of the Amiga file systems are single user systems
@@ -128,11 +130,13 @@ Linux -> Amiga: · 5 unmodified lines
128	130
129	131	The Linux rwxrwxrwx file mode is handled as follows:
130	132
131		− - r permission will set R for user, group and others.
	133	+ - r permission will allow R for user, group and others.
	134	+
	135	+ - w permission will allow W for user, group and others.
132	136
133		− - w permission will set W and D for user, group and others.
	137	+ - x permission of the user will allow E for plain files.
134	138
135		− - x permission of the user will set E for plain files.
	139	+ - D will be allowed for user, group and others.
136	140
137	141	- All other flags (suid, sgid, ...) are ignored and will
138	142	not be retained.

Documentation/hwmon/abituguru-datasheet.rst+3−3

@@ -68,7 +68,7 @@ See below for all known bank addresses, numbers of sensors in that bank, · 67 unmodified lines
68	68	number of bytes data per sensor and contents/meaning of those bytes.
69	69
70	70	Although both this document and the kernel driver have kept the sensor
71		−terminoligy for the addressing within a bank this is not 100% correct, in
	71	+terminology for the addressing within a bank this is not 100% correct, in
72	72	bank 0x24 for example the addressing within the bank selects a PWM output not
73	73	a sensor.
74	74
@@ -155,7 +155,7 @@ After wider testing of the Linux kernel driver some variants of the uGuru have · 80 unmodified lines
155	155	turned up which do not hold 0x08 at DATA within 250 reads after writing the
156	156	bank address. With these versions this happens quite frequent, using larger
157	157	timeouts doesn't help, they just go offline for a second or 2, doing some
158		−internal callibration or whatever. Your code should be prepared to handle
	158	+internal calibration or whatever. Your code should be prepared to handle
159	159	this and in case of no response in this specific case just goto sleep for a
160	160	while and then retry.
161	161
@@ -331,6 +331,6 @@ the voltage / clock programming out, I tried reading and only reading banks · 169 unmodified lines
331	331	0-0x30 with the reading code used for the sensor banks (0x20-0x28) and this
332	332	resulted in a _permanent_ reprogramming of the voltages, luckily I had the
333	333	sensors part configured so that it would shutdown my system on any out of spec
334		−voltages which proprably safed my computer (after a reboot I managed to
	334	+voltages which probably safed my computer (after a reboot I managed to
335	335	immediately enter the bios and reload the defaults). This probably means that
336	336	the read/write cycle for the non sensor part is different from the sensor part.

Documentation/hwmon/abituguru.rst+2−2

@@ -17,7 +17,7 @@ Supported chips: · 16 unmodified lines
17	17	Note:
18	18	The uGuru is a microcontroller with onboard firmware which programs
19	19	it to behave as a hwmon IC. There are many different revisions of the
20		− firmware and thus effectivly many different revisions of the uGuru.
	20	+ firmware and thus effectively many different revisions of the uGuru.
21	21	Below is an incomplete list with which revisions are used for which
22	22	Motherboards:
23	23
@@ -33,7 +33,7 @@ Supported chips: · 9 unmodified lines
33	33	sensortype (Volt or Temp) for bank1 sensors, for revision 1 uGuru's
34	34	this does not always work. For these uGuru's the autodetection can
35	35	be overridden with the bank1_types module param. For all 3 known
36		− revison 1 motherboards the correct use of this param is:
	36	+ revision 1 motherboards the correct use of this param is:
37	37	bank1_types=1,1,0,0,0,0,0,2,0,0,0,0,2,0,0,1
38	38	You may also need to specify the fan_sensors option for these boards
39	39	fan_sensors=5

Documentation/hwmon/abituguru3.rst+2−2

@@ -13,7 +13,7 @@ Supported chips: · 12 unmodified lines
13	13	Note:
14	14	The uGuru is a microcontroller with onboard firmware which programs
15	15	it to behave as a hwmon IC. There are many different revisions of the
16		− firmware and thus effectivly many different revisions of the uGuru.
	16	+ firmware and thus effectively many different revisions of the uGuru.
17	17	Below is an incomplete list with which revisions are used for which
18	18	Motherboards:
19	19
@@ -24,7 +24,7 @@ Supported chips: · 4 unmodified lines
24	24	- uGuru 3.0.0.0 ~ 3.0.x.x (AW8, AL8, AT8, NI8 SLI, AT8 32X, AN8 32X,
25	25	AW9D-MAX)
26	26
27		− The abituguru3 driver is only for revison 3.0.x.x motherboards,
	27	+ The abituguru3 driver is only for revision 3.0.x.x motherboards,
28	28	this driver will not work on older motherboards. For older
29	29	motherboards use the abituguru (without the 3 !) driver.
30	30

Documentation/kbuild/llvm.rst+13−13

@@ -23,8 +23,8 @@ supports C and the GNU C extensions required by the kernel, and is pronounced · 22 unmodified lines
23	23	Clang
24	24	-----
25	25
26		−The compiler used can be swapped out via `CC=` command line argument to `make`.
27		−`CC=` should be set when selecting a config and during a build.
	26	+The compiler used can be swapped out via ``CC=`` command line argument to ``make``.
	27	+``CC=`` should be set when selecting a config and during a build. ::
28	28
29	29	make CC=clang defconfig
30	30
@@ -34,33 +34,33 @@ Cross Compiling · 3 unmodified lines
34	34	---------------
35	35
36	36	A single Clang compiler binary will typically contain all supported backends,
37		−which can help simplify cross compiling.
	37	+which can help simplify cross compiling. ::
38	38
39	39	ARCH=arm64 CROSS_COMPILE=aarch64-linux-gnu- make CC=clang
40	40
41		−`CROSS_COMPILE` is not used to prefix the Clang compiler binary, instead
42		−`CROSS_COMPILE` is used to set a command line flag: `--target <triple>`. For
43		−example:
	41	+``CROSS_COMPILE`` is not used to prefix the Clang compiler binary, instead
	42	+``CROSS_COMPILE`` is used to set a command line flag: ``--target <triple>``. For
	43	+example: ::
44	44
45	45	clang --target aarch64-linux-gnu foo.c
46	46
47	47	LLVM Utilities
48	48	--------------
49	49
50		−LLVM has substitutes for GNU binutils utilities. Kbuild supports `LLVM=1`
51		−to enable them.
	50	+LLVM has substitutes for GNU binutils utilities. Kbuild supports ``LLVM=1``
	51	+to enable them. ::
52	52
53	53	make LLVM=1
54	54
55		−They can be enabled individually. The full list of the parameters:
	55	+They can be enabled individually. The full list of the parameters: ::
56	56
57		− make CC=clang LD=ld.lld AR=llvm-ar NM=llvm-nm STRIP=llvm-strip \\
58		− OBJCOPY=llvm-objcopy OBJDUMP=llvm-objdump OBJSIZE=llvm-size \\
59		− READELF=llvm-readelf HOSTCC=clang HOSTCXX=clang++ HOSTAR=llvm-ar \\
	57	+ make CC=clang LD=ld.lld AR=llvm-ar NM=llvm-nm STRIP=llvm-strip \
	58	+ OBJCOPY=llvm-objcopy OBJDUMP=llvm-objdump OBJSIZE=llvm-size \
	59	+ READELF=llvm-readelf HOSTCC=clang HOSTCXX=clang++ HOSTAR=llvm-ar \
60	60	HOSTLD=ld.lld
61	61
62	62	Currently, the integrated assembler is disabled by default. You can pass
63		−`LLVM_IAS=1` to enable it.
	63	+``LLVM_IAS=1`` to enable it.
64	64
65	65	Getting Help
66	66	------------

Documentation/kbuild/makefiles.rst+9−9

@@ -16,7 +16,7 @@ This document describes the Linux kernel Makefiles. · 15 unmodified lines
16	16	--- 3.5 Library file goals - lib-y
17	17	--- 3.6 Descending down in directories
18	18	--- 3.7 Compilation flags
19		− --- 3.8 Command line dependency
	19	+ --- 3.8 <deleted>
20	20	--- 3.9 Dependency tracking
21	21	--- 3.10 Special Rules
22	22	--- 3.11 $(CC) support functions
@@ -39,8 +39,8 @@ This document describes the Linux kernel Makefiles. · 16 unmodified lines
39	39
40	40	=== 7 Architecture Makefiles
41	41	--- 7.1 Set variables to tweak the build to the architecture
42		− --- 7.2 Add prerequisites to archheaders:
43		− --- 7.3 Add prerequisites to archprepare:
	42	+ --- 7.2 Add prerequisites to archheaders
	43	+ --- 7.3 Add prerequisites to archprepare
44	44	--- 7.4 List directories to visit when descending
45	45	--- 7.5 Architecture-specific boot images
46	46	--- 7.6 Building non-kbuild targets
@@ -129,7 +129,7 @@ The preferred name for the kbuild files are 'Makefile' but 'Kbuild' can · 82 unmodified lines
129	129	be used and if both a 'Makefile' and a 'Kbuild' file exists, then the 'Kbuild'
130	130	file will be used.
131	131
132		−Section 3.1 "Goal definitions" is a quick intro, further chapters provide
	132	+Section 3.1 "Goal definitions" is a quick intro; further chapters provide
133	133	more details, with real examples.
134	134
135	135	3.1 Goal definitions
@@ -965,7 +965,7 @@ When kbuild executes, the following steps are followed (roughly): · 829 unmodified lines
965	965	KBUILD_LDFLAGS := -m elf_s390
966	966
967	967	Note: ldflags-y can be used to further customise
968		− the flags used. See chapter 3.7.
	968	+ the flags used. See section 3.7.
969	969
970	970	LDFLAGS_vmlinux
971	971	Options for $(LD) when linking vmlinux
@@ -1121,7 +1121,7 @@ When kbuild executes, the following steps are followed (roughly): · 149 unmodified lines
1121	1121
1122	1122	In this example, the file target maketools will be processed
1123	1123	before descending down in the subdirectories.
1124		− See also chapter XXX-TODO that describe how kbuild supports
	1124	+ See also chapter XXX-TODO that describes how kbuild supports
1125	1125	generating offset header files.
1126	1126
1127	1127
@@ -1261,7 +1261,7 @@ When kbuild executes, the following steps are followed (roughly): · 133 unmodified lines
1261	1261	always be built.
1262	1262	Assignments to $(targets) are without $(obj)/ prefix.
1263	1263	if_changed may be used in conjunction with custom commands as
1264		− defined in 6.8 "Custom kbuild commands".
	1264	+ defined in 7.8 "Custom kbuild commands".
1265	1265
1266	1266	Note: It is a typical mistake to forget the FORCE prerequisite.
1267	1267	Another common pitfall is that whitespace is sometimes
@@ -1411,7 +1411,7 @@ When kbuild executes, the following steps are followed (roughly): · 143 unmodified lines
1411	1411	that may be shared between individual architectures.
1412	1412	The recommended approach how to use a generic header file is
1413	1413	to list the file in the Kbuild file.
1414		− See "7.2 generic-y" for further info on syntax etc.
	1414	+ See "8.2 generic-y" for further info on syntax etc.
1415	1415
1416	1416	7.11 Post-link pass
1417	1417	-------------------
@@ -1601,4 +1601,4 @@ is the right choice. · 183 unmodified lines
1601	1601
1602	1602	- Describe how kbuild supports shipped files with _shipped.
1603	1603	- Generating offset header files.
1604		−- Add more variables to section 7?
	1604	+- Add more variables to chapters 7 or 9?

Documentation/locking/locktypes.rst+12−12

@@ -164,14 +164,14 @@ by disabling preemption or interrupts. · 163 unmodified lines
164	164	On non-PREEMPT_RT kernels local_lock operations map to the preemption and
165	165	interrupt disabling and enabling primitives:
166	166
167		− =========================== ======================
168		− local_lock(&llock) preempt_disable()
169		− local_unlock(&llock) preempt_enable()
170		− local_lock_irq(&llock) local_irq_disable()
171		− local_unlock_irq(&llock) local_irq_enable()
172		− local_lock_save(&llock) local_irq_save()
173		− local_lock_restore(&llock) local_irq_save()
174		− =========================== ======================
	167	+ =============================== ======================
	168	+ local_lock(&llock) preempt_disable()
	169	+ local_unlock(&llock) preempt_enable()
	170	+ local_lock_irq(&llock) local_irq_disable()
	171	+ local_unlock_irq(&llock) local_irq_enable()
	172	+ local_lock_irqsave(&llock) local_irq_save()
	173	+ local_unlock_irqrestore(&llock) local_irq_restore()
	174	+ =============================== ======================
175	175
176	176	The named scope of local_lock has two advantages over the regular
177	177	primitives:
@@ -353,14 +353,14 @@ protection scope. So the following substitution is wrong:: · 175 unmodified lines
353	353	{
354	354	local_irq_save(flags); -> local_lock_irqsave(&local_lock_1, flags);
355	355	func3();
356		− local_irq_restore(flags); -> local_lock_irqrestore(&local_lock_1, flags);
	356	+ local_irq_restore(flags); -> local_unlock_irqrestore(&local_lock_1, flags);
357	357	}
358	358
359	359	func2()
360	360	{
361	361	local_irq_save(flags); -> local_lock_irqsave(&local_lock_2, flags);
362	362	func3();
363		− local_irq_restore(flags); -> local_lock_irqrestore(&local_lock_2, flags);
	363	+ local_irq_restore(flags); -> local_unlock_irqrestore(&local_lock_2, flags);
364	364	}
365	365
366	366	func3()
@@ -379,14 +379,14 @@ PREEMPT_RT-specific semantics of spinlock_t. The correct substitution is:: · 12 unmodified lines
379	379	{
380	380	local_irq_save(flags); -> local_lock_irqsave(&local_lock, flags);
381	381	func3();
382		− local_irq_restore(flags); -> local_lock_irqrestore(&local_lock, flags);
	382	+ local_irq_restore(flags); -> local_unlock_irqrestore(&local_lock, flags);
383	383	}
384	384
385	385	func2()
386	386	{
387	387	local_irq_save(flags); -> local_lock_irqsave(&local_lock, flags);
388	388	func3();
389		− local_irq_restore(flags); -> local_lock_irqrestore(&local_lock, flags);
	389	+ local_irq_restore(flags); -> local_unlock_irqrestore(&local_lock, flags);
390	390	}
391	391
392	392	func3()

Documentation/maintainer/maintainer-entry-profile.rst+1−0

@@ -101,3 +101,4 @@ to do something different in the near future. · 100 unmodified lines
101	101
102	102	../doc-guide/maintainer-profile
103	103	../nvdimm/maintainer-entry-profile
	104	+ ../riscv/patch-acceptance

Documentation/networking/dsa/configuration.rst+1−1

@@ -180,7 +180,7 @@ The configuration can only be set up via VLAN tagging and bridge setup. · 179 unmodified lines
180	180
181	181	# bring up the slave interfaces
182	182	ip link set lan1 up
183		− ip link set lan1 up
	183	+ ip link set lan2 up
184	184	ip link set lan3 up
185	185
186	186	# create bridge

Documentation/powerpc/syscall64-abi.rst+3−1

@@ -49,16 +49,18 @@ Register preservation rules · 48 unmodified lines
49	49	Register preservation rules match the ELF ABI calling sequence with the
50	50	following differences:
51	51
52		−=========== ============= ========================================
53	52	--- For the sc instruction, differences with the ELF ABI ---
	53	+=========== ============= ========================================
54	54	r0 Volatile (System call number.)
55	55	r3 Volatile (Parameter 1, and return value.)
56	56	r4-r8 Volatile (Parameters 2-6.)
57	57	cr0 Volatile (cr0.SO is the return error condition.)
58	58	cr1, cr5-7 Nonvolatile
59	59	lr Nonvolatile
	60	+=========== ============= ========================================
60	61
61	62	--- For the scv 0 instruction, differences with the ELF ABI ---
	63	+=========== ============= ========================================
62	64	r0 Volatile (System call number.)
63	65	r3 Volatile (Parameter 1, and return value.)
64	66	r4-r8 Volatile (Parameters 2-6.)

Documentation/process/deprecated.rst+1−1

@@ -142,7 +142,7 @@ only NUL-terminated strings. The safe replacement is strscpy(). · 141 unmodified lines
142	142	(Users of strscpy() still needing NUL-padding should instead
143	143	use strscpy_pad().)
144	144
145		−If a caller is using non-NUL-terminated strings, strncpy()() can
	145	+If a caller is using non-NUL-terminated strings, strncpy() can
146	146	still be used, but destinations should be marked with the `__nonstring
147	147	<https://gcc.gnu.org/onlinedocs/gcc/Common-Variable-Attributes.html>`_
148	148	attribute to avoid future compiler warnings.

Documentation/sound/cards/audigy-mixer.rst+1−1

@@ -332,7 +332,7 @@ WO 9901953 (A1) · 331 unmodified lines
332	332
333	333
334	334	US Patents (https://www.uspto.gov/)
335		−----------------------------------
	335	+-----------------------------------
336	336
337	337	US 5925841
338	338	Digital Sampling Instrument employing cache memory (Jul. 20, 1999)

Documentation/sound/cards/sb-live-mixer.rst+1−1

@@ -337,7 +337,7 @@ WO 9901953 (A1) · 336 unmodified lines
337	337
338	338
339	339	US Patents (https://www.uspto.gov/)
340		−----------------------------------
	340	+-----------------------------------
341	341
342	342	US 5925841
343	343	Digital Sampling Instrument employing cache memory (Jul. 20, 1999)

Documentation/sound/designs/timestamping.rst+1−1

@@ -143,7 +143,7 @@ timestamp shows when the information is put together by the driver · 142 unmodified lines
143	143	before returning from the ``STATUS`` and ``STATUS_EXT`` ioctl. in most cases
144	144	this driver_timestamp will be identical to the regular system tstamp.
145	145
146		−Examples of typestamping with HDaudio:
	146	+Examples of timestamping with HDAudio:
147	147
148	148	1. DMA timestamp, no compensation for DMA+analog delay
149	149	::

Documentation/translations/it_IT/process/deprecated.rst+1−1

@@ -130,7 +130,7 @@ chi usa solo stringe terminate. La versione sicura da usare è · 129 unmodified lines
130	130	strscpy(). (chi usa strscpy() e necessita di estendere la
131	131	terminazione con NUL deve aggiungere una chiamata a memset())
132	132
133		−Se il chiamate no usa stringhe terminate con NUL, allore strncpy()()
	133	+Se il chiamate no usa stringhe terminate con NUL, allore strncpy()
134	134	può continuare ad essere usata, ma i buffer di destinazione devono essere
135	135	marchiati con l'attributo `__nonstring <https://gcc.gnu.org/onlinedocs/gcc/Common-Variable-Attributes.html>`_
136	136	per evitare avvisi durante la compilazione.

MAINTAINERS+53−21

@@ -1694,7 +1694,6 @@ F: arch/arm/mach-cns3xxx/ · 1693 unmodified lines
1694	1694
1695	1695	ARM/CAVIUM THUNDER NETWORK DRIVER
1696	1696	M: Sunil Goutham <sgoutham@marvell.com>
1697		−M: Robert Richter <rrichter@marvell.com>
1698	1697	L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
1699	1698	S: Supported
1700	1699	F: drivers/net/ethernet/cavium/thunder/
@@ -3205,6 +3204,7 @@ S: Maintained · 1504 unmodified lines
3205	3204	T: git git://git.kernel.org/pub/scm/linux/kernel/git/axboe/linux-block.git
3206	3205	F: block/
3207	3206	F: drivers/block/
	3207	+F: include/linux/blk*
3208	3208	F: kernel/trace/blktrace.c
3209	3209	F: lib/sbitmap.c
3210	3210
@@ -3388,6 +3388,7 @@ M: Florian Fainelli <f.fainelli@gmail.com> · 177 unmodified lines
3388	3388	L: netdev@vger.kernel.org
3389	3389	L: openwrt-devel@lists.openwrt.org (subscribers-only)
3390	3390	S: Supported
	3391	+F: Documentation/devicetree/bindings/net/dsa/b53.txt
3391	3392	F: drivers/net/dsa/b53/*
3392	3393	F: include/linux/platform_data/b53.h
3393	3394
@@ -3573,13 +3574,28 @@ L: bcm-kernel-feedback-list@broadcom.com · 179 unmodified lines
3573	3574	S: Maintained
3574	3575	F: drivers/phy/broadcom/phy-brcm-usb*
3575	3576
	3577	+BROADCOM ETHERNET PHY DRIVERS
	3578	+M: Florian Fainelli <f.fainelli@gmail.com>
	3579	+L: bcm-kernel-feedback-list@broadcom.com
	3580	+L: netdev@vger.kernel.org
	3581	+S: Supported
	3582	+F: Documentation/devicetree/bindings/net/broadcom-bcm87xx.txt
	3583	+F: drivers/net/phy/bcm*.[ch]
	3584	+F: drivers/net/phy/broadcom.c
	3585	+F: include/linux/brcmphy.h
	3586	+
3576	3587	BROADCOM GENET ETHERNET DRIVER
3577	3588	M: Doug Berger <opendmb@gmail.com>
3578	3589	M: Florian Fainelli <f.fainelli@gmail.com>
3579	3590	L: bcm-kernel-feedback-list@broadcom.com
3580	3591	L: netdev@vger.kernel.org
3581	3592	S: Supported
	3593	+F: Documentation/devicetree/bindings/net/brcm,bcmgenet.txt
	3594	+F: Documentation/devicetree/bindings/net/brcm,unimac-mdio.txt
3582	3595	F: drivers/net/ethernet/broadcom/genet/
	3596	+F: drivers/net/mdio/mdio-bcm-unimac.c
	3597	+F: include/linux/platform_data/bcmgenet.h
	3598	+F: include/linux/platform_data/mdio-bcm-unimac.h
3583	3599
3584	3600	BROADCOM IPROC ARM ARCHITECTURE
3585	3601	M: Ray Jui <rjui@broadcom.com>
@@ -3931,8 +3947,8 @@ W: https://wireless.wiki.kernel.org/en/users/Drivers/carl9170 · 345 unmodified lines
3931	3947	F: drivers/net/wireless/ath/carl9170/
3932	3948
3933	3949	CAVIUM I2C DRIVER
3934		−M: Robert Richter <rrichter@marvell.com>
3935		−S: Supported
	3950	+M: Robert Richter <rric@kernel.org>
	3951	+S: Odd Fixes
3936	3952	W: http://www.marvell.com
3937	3953	F: drivers/i2c/busses/i2c-octeon*
3938	3954	F: drivers/i2c/busses/i2c-thunderx*
@@ -3947,8 +3963,8 @@ W: http://www.marvell.com · 8 unmodified lines
3947	3963	F: drivers/net/ethernet/cavium/liquidio/
3948	3964
3949	3965	CAVIUM MMC DRIVER
3950		−M: Robert Richter <rrichter@marvell.com>
3951		−S: Supported
	3966	+M: Robert Richter <rric@kernel.org>
	3967	+S: Odd Fixes
3952	3968	W: http://www.marvell.com
3953	3969	F: drivers/mmc/host/cavium*
3954	3970
@@ -3960,9 +3976,9 @@ W: http://www.marvell.com · 5 unmodified lines
3960	3976	F: drivers/crypto/cavium/cpt/
3961	3977
3962	3978	CAVIUM THUNDERX2 ARM64 SOC
3963		−M: Robert Richter <rrichter@marvell.com>
	3979	+M: Robert Richter <rric@kernel.org>
3964	3980	L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
3965		−S: Maintained
	3981	+S: Odd Fixes
3966	3982	F: Documentation/devicetree/bindings/arm/cavium-thunder2.txt
3967	3983	F: arch/arm64/boot/dts/cavium/thunder2-99xx*
3968	3984
@@ -4241,6 +4257,8 @@ S: Maintained · 272 unmodified lines
4241	4257	F: .clang-format
4242	4258
4243	4259	CLANG/LLVM BUILD SUPPORT
	4260	+M: Nathan Chancellor <natechancellor@gmail.com>
	4261	+M: Nick Desaulniers <ndesaulniers@google.com>
4244	4262	L: clang-built-linux@googlegroups.com
4245	4263	S: Supported
4246	4264	W: https://clangbuiltlinux.github.io/
@@ -5239,6 +5257,7 @@ DOCUMENTATION · 992 unmodified lines
5239	5257	M: Jonathan Corbet <corbet@lwn.net>
5240	5258	L: linux-doc@vger.kernel.org
5241	5259	S: Maintained
	5260	+P: Documentation/doc-guide/maintainer-profile.rst
5242	5261	T: git git://git.lwn.net/linux.git docs-next
5243	5262	F: Documentation/
5244	5263	F: scripts/documentation-file-ref-check
@@ -6180,16 +6199,15 @@ F: drivers/edac/highbank* · 935 unmodified lines
6180	6199
6181	6200	EDAC-CAVIUM OCTEON
6182	6201	M: Ralf Baechle <ralf@linux-mips.org>
6183		−M: Robert Richter <rrichter@marvell.com>
6184	6202	L: linux-edac@vger.kernel.org
6185	6203	L: linux-mips@vger.kernel.org
6186	6204	S: Supported
6187	6205	F: drivers/edac/octeon_edac*
6188	6206
6189	6207	EDAC-CAVIUM THUNDERX
6190		−M: Robert Richter <rrichter@marvell.com>
	6208	+M: Robert Richter <rric@kernel.org>
6191	6209	L: linux-edac@vger.kernel.org
6192		−S: Supported
	6210	+S: Odd Fixes
6193	6211	F: drivers/edac/thunderx_edac*
6194	6212
6195	6213	EDAC-CORE
@@ -6197,7 +6215,7 @@ M: Borislav Petkov <bp@alien8.de> · 1 unmodified line
6197	6215	M: Mauro Carvalho Chehab <mchehab@kernel.org>
6198	6216	M: Tony Luck <tony.luck@intel.com>
6199	6217	R: James Morse <james.morse@arm.com>
6200		−R: Robert Richter <rrichter@marvell.com>
	6218	+R: Robert Richter <rric@kernel.org>
6201	6219	L: linux-edac@vger.kernel.org
6202	6220	S: Supported
6203	6221	T: git git://git.kernel.org/pub/scm/linux/kernel/git/ras/ras.git edac-for-next
@@ -6501,7 +6519,6 @@ F: net/bridge/ · 297 unmodified lines
6501	6519
6502	6520	ETHERNET PHY LIBRARY
6503	6521	M: Andrew Lunn <andrew@lunn.ch>
6504		−M: Florian Fainelli <f.fainelli@gmail.com>
6505	6522	M: Heiner Kallweit <hkallweit1@gmail.com>
6506	6523	R: Russell King <linux@armlinux.org.uk>
6507	6524	L: netdev@vger.kernel.org
@@ -8262,7 +8279,7 @@ IA64 (Itanium) PLATFORM · 1754 unmodified lines
8262	8279	M: Tony Luck <tony.luck@intel.com>
8263	8280	M: Fenghua Yu <fenghua.yu@intel.com>
8264	8281	L: linux-ia64@vger.kernel.org
8265		−S: Maintained
	8282	+S: Odd Fixes
8266	8283	T: git git://git.kernel.org/pub/scm/linux/kernel/git/aegl/linux.git
8267	8284	F: Documentation/ia64/
8268	8285	F: arch/ia64/
@@ -13436,10 +13453,10 @@ F: Documentation/devicetree/bindings/pci/axis,artpec* · 5167 unmodified lines
13436	13453	F: drivers/pci/controller/dwc/artpec
13437	13454
13438	13455	PCIE DRIVER FOR CAVIUM THUNDERX
13439		−M: Robert Richter <rrichter@marvell.com>
	13456	+M: Robert Richter <rric@kernel.org>
13440	13457	L: linux-pci@vger.kernel.org
13441	13458	L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
13442		−S: Supported
	13459	+S: Odd Fixes
13443	13460	F: drivers/pci/controller/pci-thunder-*
13444	13461
13445	13462	PCIE DRIVER FOR HISILICON
@@ -13576,12 +13593,18 @@ F: kernel/events/* · 130 unmodified lines
13576	13593	F: tools/lib/perf/
13577	13594	F: tools/perf/
13578	13595
13579		−PERFORMANCE EVENTS SUBSYSTEM ARM64 PMU EVENTS
	13596	+PERFORMANCE EVENTS TOOLING ARM64
13580	13597	R: John Garry <john.garry@huawei.com>
13581	13598	R: Will Deacon <will@kernel.org>
	13599	+R: Mathieu Poirier <mathieu.poirier@linaro.org>
	13600	+R: Leo Yan <leo.yan@linaro.org>
13582	13601	L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
13583	13602	S: Supported
	13603	+F: tools/build/feature/test-libopencsd.c
	13604	+F: tools/perf/arch/arm*/
13584	13605	F: tools/perf/pmu-events/arch/arm64/
	13606	+F: tools/perf/util/arm-spe*
	13607	+F: tools/perf/util/cs-etm*
13585	13608
13586	13609	PERSONALITY HANDLING
13587	13610	M: Christoph Hellwig <hch@infradead.org>
@@ -14372,7 +14395,7 @@ M: Rob Clark <robdclark@gmail.com> · 784 unmodified lines
14372	14395	L: iommu@lists.linux-foundation.org
14373	14396	L: linux-arm-msm@vger.kernel.org
14374	14397	S: Maintained
14375		−F: drivers/iommu/qcom_iommu.c
	14398	+F: drivers/iommu/arm/arm-smmu/qcom_iommu.c
14376	14399
14377	14400	QUALCOMM IPCC MAILBOX DRIVER
14378	14401	M: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
@@ -17123,8 +17146,8 @@ S: Maintained · 2744 unmodified lines
17123	17146	F: Documentation/devicetree/bindings/arm/keystone/ti,k3-sci-common.yaml
17124	17147	F: Documentation/devicetree/bindings/arm/keystone/ti,sci.txt
17125	17148	F: Documentation/devicetree/bindings/clock/ti,sci-clk.txt
17126		−F: Documentation/devicetree/bindings/interrupt-controller/ti,sci-inta.txt
17127		−F: Documentation/devicetree/bindings/interrupt-controller/ti,sci-intr.txt
	17149	+F: Documentation/devicetree/bindings/interrupt-controller/ti,sci-inta.yaml
	17150	+F: Documentation/devicetree/bindings/interrupt-controller/ti,sci-intr.yaml
17128	17151	F: Documentation/devicetree/bindings/reset/ti,sci-reset.txt
17129	17152	F: Documentation/devicetree/bindings/soc/ti/sci-pm-domain.txt
17130	17153	F: drivers/clk/keystone/sci-clk.c
@@ -17221,8 +17244,8 @@ S: Maintained · 90 unmodified lines
17221	17244	F: drivers/net/thunderbolt.c
17222	17245
17223	17246	THUNDERX GPIO DRIVER
17224		−M: Robert Richter <rrichter@marvell.com>
17225		−S: Maintained
	17247	+M: Robert Richter <rric@kernel.org>
	17248	+S: Odd Fixes
17226	17249	F: drivers/gpio/gpio-thunderx.c
17227	17250
17228	17251	TI AM437X VPFE DRIVER
@@ -18881,6 +18904,15 @@ S: Maintained · 1652 unmodified lines
18881	18904	T: git git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git x86/core
18882	18905	F: arch/x86/platform
18883	18906
	18907	+X86 PLATFORM UV HPE SUPERDOME FLEX
	18908	+M: Steve Wahl <steve.wahl@hpe.com>
	18909	+R: Dimitri Sivanich <dimitri.sivanich@hpe.com>
	18910	+R: Russ Anderson <russ.anderson@hpe.com>
	18911	+S: Supported
	18912	+F: arch/x86/include/asm/uv/
	18913	+F: arch/x86/kernel/apic/x2apic_uv_x.c
	18914	+F: arch/x86/platform/uv/
	18915	+
18884	18916	X86 VDSO
18885	18917	M: Andy Lutomirski <luto@kernel.org>
18886	18918	L: linux-kernel@vger.kernel.org

Makefile+1−1

@@ -2,7 +2,7 @@ · 1 unmodified line
2	2	VERSION = 5
3	3	PATCHLEVEL = 9
4	4	SUBLEVEL = 0
5		−EXTRAVERSION = -rc2
	5	+EXTRAVERSION = -rc4
6	6	NAME = Kleptomaniac Octopus
7	7
8	8	# DOCUMENTATION

arch/alpha/kernel/module.c+1−1

@@ -212,7 +212,7 @@ apply_relocate_add(Elf64_Shdr sechdrs, const char strtab, · 211 unmodified lines
212	212	STO_ALPHA_STD_GPLOAD)
213	213	/* Omit the prologue. */
214	214	value += 8;
215		− /* FALLTHRU */
	215	+ fallthrough;
216	216	case R_ALPHA_BRADDR:
217	217	value -= (u64)location + 4;
218	218	if (value & 3)

arch/alpha/kernel/signal.c+1−1

@@ -453,7 +453,7 @@ syscall_restart(unsigned long r0, unsigned long r19, · 452 unmodified lines
453	453	regs->r0 = EINTR;
454	454	break;
455	455	}
456		− /* fallthrough */
	456	+ fallthrough;
457	457	case ERESTARTNOINTR:
458	458	regs->r0 = r0; /* reset v0 and a3 and replay syscall */
459	459	regs->r19 = r19;

arch/alpha/kernel/traps.c+2−2

@@ -883,7 +883,7 @@ do_entUnaUser(void __user * va, unsigned long opcode, · 882 unmodified lines
883	883
884	884	case 0x26: /* sts */
885	885	fake_reg = s_reg_to_mem(alpha_read_fp_reg(reg));
886		− /* FALLTHRU */
	886	+ fallthrough;
887	887
888	888	case 0x2c: /* stl */
889	889	__asm__ __volatile__(
@@ -911,7 +911,7 @@ do_entUnaUser(void __user * va, unsigned long opcode, · 21 unmodified lines
911	911
912	912	case 0x27: /* stt */
913	913	fake_reg = alpha_read_fp_reg(reg);
914		− /* FALLTHRU */
	914	+ fallthrough;
915	915
916	916	case 0x2d: /* stq */
917	917	__asm__ __volatile__(

arch/arc/boot/dts/hsdk.dts+4−2

@@ -88,6 +88,8 @@ · 87 unmodified lines
88	88
89	89	arcpct: pct {
90	90	compatible = "snps,archs-pct";
	91	+ interrupt-parent = <&cpu_intc>;
	92	+ interrupts = <20>;
91	93	};
92	94
93	95	/* TIMER0 with interrupt for clockevent */
@@ -208,7 +210,7 @@ · 114 unmodified lines
208	210	reg = <0x8000 0x2000>;
209	211	interrupts = <10>;
210	212	interrupt-names = "macirq";
211		− phy-mode = "rgmii";
	213	+ phy-mode = "rgmii-id";
212	214	snps,pbl = <32>;
213	215	snps,multicast-filter-bins = <256>;
214	216	clocks = <&gmacclk>;
@@ -226,7 +228,7 @@ · 11 unmodified lines
226	228	#address-cells = <1>;
227	229	#size-cells = <0>;
228	230	compatible = "snps,dwmac-mdio";
229		− phy0: ethernet-phy@0 {
	231	+ phy0: ethernet-phy@0 { /* Micrel KSZ9031 */
230	232	reg = <0>;
231	233	};
232	234	};

arch/arc/include/asm/pgalloc.h+2−2

@@ -18,10 +18,10 @@ · 17 unmodified lines
18	18	* vineetg: April 2010
19	19	* -Switched pgtable_t from being struct page * to unsigned long
20	20	* =Needed so that Page Table allocator (pte_alloc_one) is not forced to
21		− * to deal with struct page. Thay way in future we can make it allocate
	21	+ * deal with struct page. That way in future we can make it allocate
22	22	* multiple PG Tbls in one Page Frame
23	23	* =sweet side effect is avoiding calls to ugly page_address( ) from the
24		− * pg-tlb allocator sub-sys (pte_alloc_one, ptr_free, pmd_populate
	24	+ * pg-tlb allocator sub-sys (pte_alloc_one, ptr_free, pmd_populate)
25	25	*
26	26	* Amit Bhor, Sameer Dhavale: Codito Technologies 2004
27	27	*/

arch/arc/kernel/disasm.c+1−1

@@ -339,7 +339,7 @@ void __kprobes disasm_instr(unsigned long addr, struct disasm_state *state, · 338 unmodified lines
339	339
340	340	case op_LDWX_S: /* LDWX_S c, [b, u6] */
341	341	state->x = 1;
342		− /* intentional fall-through */
	342	+ fallthrough;
343	343
344	344	case op_LDW_S: /* LDW_S c, [b, u6] */
345	345	state->zz = 2;

arch/arc/kernel/perf_event.c+4−10

@@ -562,7 +562,7 @@ static int arc_pmu_device_probe(struct platform_device *pdev) · 561 unmodified lines
562	562	{
563	563	struct arc_reg_pct_build pct_bcr;
564	564	struct arc_reg_cc_build cc_bcr;
565		− int i, has_interrupts;
	565	+ int i, has_interrupts, irq;
566	566	int counter_size; /* in bits */
567	567
568	568	union cc_name {
@@ -637,13 +637,7 @@ static int arc_pmu_device_probe(struct platform_device *pdev) · 68 unmodified lines
637	637	.attr_groups = arc_pmu->attr_groups,
638	638	};
639	639
640		− if (has_interrupts) {
641		− int irq = platform_get_irq(pdev, 0);
642		−
643		− if (irq < 0) {
644		− pr_err("Cannot get IRQ number for the platform\n");
645		− return -ENODEV;
646		− }
	640	+ if (has_interrupts && (irq = platform_get_irq(pdev, 0) >= 0)) {
647	641
648	642	arc_pmu->irq = irq;
649	643
@@ -652,9 +646,9 @@ static int arc_pmu_device_probe(struct platform_device *pdev) · 2 unmodified lines
652	646	this_cpu_ptr(&arc_pmu_cpu));
653	647
654	648	on_each_cpu(arc_cpu_pmu_irq_init, &irq, 1);
655		−
656		− } else
	649	+ } else {
657	650	arc_pmu->pmu.capabilities \|= PERF_PMU_CAP_NO_INTERRUPT;
	651	+ }
658	652
659	653	/*
660	654	* perf parser doesn't really like '-' symbol in events name, so let's

arch/arc/kernel/signal.c+1−1

@@ -321,7 +321,7 @@ static void arc_restart_syscall(struct k_sigaction ka, struct pt_regs regs) · 320 unmodified lines
321	321	regs->r0 = -EINTR;
322	322	break;
323	323	}
324		− /* fallthrough */
	324	+ fallthrough;
325	325
326	326	case -ERESTARTNOINTR:
327	327	/*

arch/arc/kernel/troubleshoot.c+30−47

@@ -18,44 +18,37 @@ · 17 unmodified lines
18	18
19	19	#define ARC_PATH_MAX 256
20	20
21		−/*
22		− * Common routine to print scratch regs (r0-r12) or callee regs (r13-r25)
23		− * -Prints 3 regs per line and a CR.
24		− * -To continue, callee regs right after scratch, special handling of CR
25		− */
26		−static noinline void print_reg_file(long *reg_rev, int start_num)
	21	+static noinline void print_regs_scratch(struct pt_regs *regs)
27	22	{
28		− unsigned int i;
29		− char buf[512];
30		− int n = 0, len = sizeof(buf);
31		−
32		− for (i = start_num; i < start_num + 13; i++) {
33		− n += scnprintf(buf + n, len - n, "r%02u: 0x%08lx\t",
34		− i, (unsigned long)*reg_rev);
35		−
36		− if (((i + 1) % 3) == 0)
37		− n += scnprintf(buf + n, len - n, "\n");
38		−
39		− /* because pt_regs has regs reversed: r12..r0, r25..r13 */
40		− if (is_isa_arcv2() && start_num == 0)
41		− reg_rev++;
42		− else
43		− reg_rev--;
44		− }
45		−
46		− if (start_num != 0)
47		− n += scnprintf(buf + n, len - n, "\n\n");
	23	+ pr_cont("BTA: 0x%08lx\n SP: 0x%08lx FP: 0x%08lx BLK: %pS\n",
	24	+ regs->bta, regs->sp, regs->fp, (void *)regs->blink);
	25	+ pr_cont("LPS: 0x%08lx\tLPE: 0x%08lx\tLPC: 0x%08lx\n",
	26	+ regs->lp_start, regs->lp_end, regs->lp_count);
48	27
49		− /* To continue printing callee regs on same line as scratch regs */
50		− if (start_num == 0)
51		− pr_info("%s", buf);
52		− else
53		− pr_cont("%s\n", buf);
	28	+ pr_info("r00: 0x%08lx\tr01: 0x%08lx\tr02: 0x%08lx\n" \
	29	+ "r03: 0x%08lx\tr04: 0x%08lx\tr05: 0x%08lx\n" \
	30	+ "r06: 0x%08lx\tr07: 0x%08lx\tr08: 0x%08lx\n" \
	31	+ "r09: 0x%08lx\tr10: 0x%08lx\tr11: 0x%08lx\n" \
	32	+ "r12: 0x%08lx\t",
	33	+ regs->r0, regs->r1, regs->r2,
	34	+ regs->r3, regs->r4, regs->r5,
	35	+ regs->r6, regs->r7, regs->r8,
	36	+ regs->r9, regs->r10, regs->r11,
	37	+ regs->r12);
54	38	}
55	39
56		−static void show_callee_regs(struct callee_regs *cregs)
	40	+static void print_regs_callee(struct callee_regs *regs)
57	41	{
58		− print_reg_file(&(cregs->r13), 13);
	42	+ pr_cont("r13: 0x%08lx\tr14: 0x%08lx\n" \
	43	+ "r15: 0x%08lx\tr16: 0x%08lx\tr17: 0x%08lx\n" \
	44	+ "r18: 0x%08lx\tr19: 0x%08lx\tr20: 0x%08lx\n" \
	45	+ "r21: 0x%08lx\tr22: 0x%08lx\tr23: 0x%08lx\n" \
	46	+ "r24: 0x%08lx\tr25: 0x%08lx\n",
	47	+ regs->r13, regs->r14,
	48	+ regs->r15, regs->r16, regs->r17,
	49	+ regs->r18, regs->r19, regs->r20,
	50	+ regs->r21, regs->r22, regs->r23,
	51	+ regs->r24, regs->r25);
59	52	}
60	53
61	54	static void print_task_path_n_nm(struct task_struct *tsk)
@@ -175,7 +168,7 @@ static void show_ecr_verbose(struct pt_regs *regs) · 113 unmodified lines
175	168	void show_regs(struct pt_regs *regs)
176	169	{
177	170	struct task_struct *tsk = current;
178		− struct callee_regs *cregs;
	171	+ struct callee_regs cregs = (struct callee_regs )tsk->thread.callee_reg;
179	172
180	173	/*
181	174	* generic code calls us with preemption disabled, but some calls
@@ -204,25 +197,15 @@ void show_regs(struct pt_regs *regs) · 22 unmodified lines
204	197	STS_BIT(regs, A2), STS_BIT(regs, A1),
205	198	STS_BIT(regs, E2), STS_BIT(regs, E1));
206	199	#else
207		− pr_cont(" [%2s%2s%2s%2s]",
	200	+ pr_cont(" [%2s%2s%2s%2s] ",
208	201	STS_BIT(regs, IE),
209	202	(regs->status32 & STATUS_U_MASK) ? "U " : "K ",
210	203	STS_BIT(regs, DE), STS_BIT(regs, AE));
211	204	#endif
212		− pr_cont(" BTA: 0x%08lx\n SP: 0x%08lx FP: 0x%08lx BLK: %pS\n",
213		− regs->bta, regs->sp, regs->fp, (void *)regs->blink);
214		− pr_info("LPS: 0x%08lx\tLPE: 0x%08lx\tLPC: 0x%08lx\n",
215		− regs->lp_start, regs->lp_end, regs->lp_count);
216		−
217		− /* print regs->r0 thru regs->r12
218		− * Sequential printing was generating horrible code
219		− */
220		− print_reg_file(&(regs->r0), 0);
221	205
222		− /* If Callee regs were saved, display them too */
223		− cregs = (struct callee_regs *)current->thread.callee_reg;
	206	+ print_regs_scratch(regs);
224	207	if (cregs)
225		− show_callee_regs(cregs);
	208	+ print_regs_callee(cregs);
226	209
227	210	preempt_disable();
228	211	}

arch/arc/kernel/unwind.c+3−3

@@ -572,7 +572,7 @@ static unsigned long read_pointer(const u8 *pLoc, const void end, · 571 unmodified lines
572	572	#else
573	573	BUILD_BUG_ON(sizeof(u32) != sizeof(value));
574	574	#endif
575		− /* Fall through */
	575	+ fallthrough;
576	576	case DW_EH_PE_native:
577	577	if (end < (const void *)(ptr.pul + 1))
578	578	return 0;
@@ -827,7 +827,7 @@ static int processCFI(const u8 start, const u8 end, unsigned long targetLoc, · 248 unmodified lines
827	827	case DW_CFA_def_cfa:
828	828	state->cfa.reg = get_uleb128(&ptr.p8, end);
829	829	unw_debug("cfa_def_cfa: r%lu ", state->cfa.reg);
830		− /* fall through */
	830	+ fallthrough;
831	831	case DW_CFA_def_cfa_offset:
832	832	state->cfa.offs = get_uleb128(&ptr.p8, end);
833	833	unw_debug("cfa_def_cfa_offset: 0x%lx ",
@@ -835,7 +835,7 @@ static int processCFI(const u8 start, const u8 end, unsigned long targetLoc, · 1 unmodified line
835	835	break;
836	836	case DW_CFA_def_cfa_sf:
837	837	state->cfa.reg = get_uleb128(&ptr.p8, end);
838		− /* fall through */
	838	+ fallthrough;
839	839	case DW_CFA_def_cfa_offset_sf:
840	840	state->cfa.offs = get_sleb128(&ptr.p8, end)
841	841	* state->dataAlign;

arch/arc/mm/init.c+16−11

@@ -26,8 +26,8 @@ static unsigned long low_mem_sz; · 25 unmodified lines
26	26
27	27	#ifdef CONFIG_HIGHMEM
28	28	static unsigned long min_high_pfn, max_high_pfn;
29		−static u64 high_mem_start;
30		−static u64 high_mem_sz;
	29	+static phys_addr_t high_mem_start;
	30	+static phys_addr_t high_mem_sz;
31	31	#endif
32	32
33	33	#ifdef CONFIG_DISCONTIGMEM
@@ -69,6 +69,7 @@ void __init early_init_dt_add_memory_arch(u64 base, u64 size) · 35 unmodified lines
69	69	high_mem_sz = size;
70	70	in_use = 1;
71	71	memblock_add_node(base, size, 1);
	72	+ memblock_reserve(base, size);
72	73	#endif
73	74	}
74	75
@@ -157,7 +158,7 @@ void __init setup_arch_memory(void) · 82 unmodified lines
157	158	min_high_pfn = PFN_DOWN(high_mem_start);
158	159	max_high_pfn = PFN_DOWN(high_mem_start + high_mem_sz);
159	160
160		− max_zone_pfn[ZONE_HIGHMEM] = max_high_pfn;
	161	+ max_zone_pfn[ZONE_HIGHMEM] = min_low_pfn;
161	162
162	163	high_memory = (void *)(min_high_pfn << PAGE_SHIFT);
163	164	kmap_init();
@@ -166,22 +167,26 @@ void __init setup_arch_memory(void) · 2 unmodified lines
166	167	free_area_init(max_zone_pfn);
167	168	}
168	169
169		−/*
170		− * mem_init - initializes memory
171		− *
172		− * Frees up bootmem
173		− * Calculates and displays memory available/used
174		− */
175		−void __init mem_init(void)
	170	+static void __init highmem_init(void)
176	171	{
177	172	#ifdef CONFIG_HIGHMEM
178	173	unsigned long tmp;
179	174
180		− reset_all_zones_managed_pages();
	175	+ memblock_free(high_mem_start, high_mem_sz);
181	176	for (tmp = min_high_pfn; tmp < max_high_pfn; tmp++)
182	177	free_highmem_page(pfn_to_page(tmp));
183	178	#endif
	179	+}
184	180
	181	+/*
	182	+ * mem_init - initializes memory
	183	+ *
	184	+ * Frees up bootmem
	185	+ * Calculates and displays memory available/used
	186	+ */
	187	+void __init mem_init(void)
	188	+{
185	189	memblock_free_all();
	190	+ highmem_init();
186	191	mem_init_print_info(NULL);
187	192	}

arch/arc/plat-eznps/include/plat/ctop.h+0−1

@@ -33,7 +33,6 @@ · 32 unmodified lines
33	33	#define CTOP_AUX_DPC (CTOP_AUX_BASE + 0x02C)
34	34	#define CTOP_AUX_LPC (CTOP_AUX_BASE + 0x030)
35	35	#define CTOP_AUX_EFLAGS (CTOP_AUX_BASE + 0x080)
36		−#define CTOP_AUX_IACK (CTOP_AUX_BASE + 0x088)
37	36	#define CTOP_AUX_GPA1 (CTOP_AUX_BASE + 0x08C)
38	37	#define CTOP_AUX_UDMC (CTOP_AUX_BASE + 0x300)
39	38

arch/arm/kernel/hw_breakpoint.c+5−5

@@ -547,7 +547,7 @@ static int arch_build_bp_info(struct perf_event *bp, · 546 unmodified lines
547	547	if ((hw->ctrl.type != ARM_BREAKPOINT_EXECUTE)
548	548	&& max_watchpoint_len >= 8)
549	549	break;
550		− /* Else, fall through */
	550	+ fallthrough;
551	551	default:
552	552	return -EINVAL;
553	553	}
@@ -612,12 +612,12 @@ int hw_breakpoint_arch_parse(struct perf_event *bp, · 58 unmodified lines
612	612	/* Allow halfword watchpoints and breakpoints. */
613	613	if (hw->ctrl.len == ARM_BREAKPOINT_LEN_2)
614	614	break;
615		− /* Else, fall through */
	615	+ fallthrough;
616	616	case 3:
617	617	/* Allow single byte watchpoint. */
618	618	if (hw->ctrl.len == ARM_BREAKPOINT_LEN_1)
619	619	break;
620		− /* Else, fall through */
	620	+ fallthrough;
621	621	default:
622	622	ret = -EINVAL;
623	623	goto out;
@@ -884,7 +884,7 @@ static int hw_breakpoint_pending(unsigned long addr, unsigned int fsr, · 260 unmodified lines
884	884	break;
885	885	case ARM_ENTRY_ASYNC_WATCHPOINT:
886	886	WARN(1, "Asynchronous watchpoint exception taken. Debugging results may be unreliable\n");
887		− /* Fall through */
	887	+ fallthrough;
888	888	case ARM_ENTRY_SYNC_WATCHPOINT:
889	889	watchpoint_handler(addr, fsr, regs);
890	890	break;
@@ -933,7 +933,7 @@ static bool core_has_os_save_restore(void) · 42 unmodified lines
933	933	ARM_DBG_READ(c1, c1, 4, oslsr);
934	934	if (oslsr & ARM_OSLSR_OSLM0)
935	935	return true;
936		− /* Else, fall through */
	936	+ fallthrough;
937	937	default:
938	938	return false;
939	939	}

arch/arm/kernel/signal.c+1−1

@@ -596,7 +596,7 @@ static int do_signal(struct pt_regs *regs, int syscall) · 595 unmodified lines
596	596	switch (retval) {
597	597	case -ERESTART_RESTARTBLOCK:
598	598	restart -= 2;
599		− /* Fall through */
	599	+ fallthrough;
600	600	case -ERESTARTNOHAND:
601	601	case -ERESTARTSYS:
602	602	case -ERESTARTNOINTR:

arch/arm/mach-ep93xx/crunch.c+1−1

@@ -49,7 +49,7 @@ static int crunch_do(struct notifier_block self, unsigned long cmd, void t) · 48 unmodified lines
49	49	* FALLTHROUGH: Ensure we don't try to overwrite our newly
50	50	* initialised state information on the first fault.
51	51	*/
52		− /* Fall through */
	52	+ fallthrough;
53	53
54	54	case THREAD_NOTIFY_EXIT:
55	55	crunch_task_release(thread);

arch/arm/mach-mmp/pm-mmp2.c+4−4

@@ -123,19 +123,19 @@ void mmp2_pm_enter_lowpower_mode(int state) · 122 unmodified lines
123	123	case POWER_MODE_SYS_SLEEP:
124	124	apcr \|= MPMU_PCR_PJ_SLPEN; /* set the SLPEN bit */
125	125	apcr \|= MPMU_PCR_PJ_VCTCXOSD; /* set VCTCXOSD */
126		− /* fall through */
	126	+ fallthrough;
127	127	case POWER_MODE_CHIP_SLEEP:
128	128	apcr \|= MPMU_PCR_PJ_SLPEN;
129		− /* fall through */
	129	+ fallthrough;
130	130	case POWER_MODE_APPS_SLEEP:
131	131	apcr \|= MPMU_PCR_PJ_APBSD; /* set APBSD */
132		− /* fall through */
	132	+ fallthrough;
133	133	case POWER_MODE_APPS_IDLE:
134	134	apcr \|= MPMU_PCR_PJ_AXISD; /* set AXISDD bit */
135	135	apcr \|= MPMU_PCR_PJ_DDRCORSD; /* set DDRCORSD bit */
136	136	idle_cfg \|= APMU_PJ_IDLE_CFG_PJ_PWRDWN; /* PJ power down */
137	137	apcr \|= MPMU_PCR_PJ_SPSD;
138		− /* fall through */
	138	+ fallthrough;
139	139	case POWER_MODE_CORE_EXTIDLE:
140	140	idle_cfg \|= APMU_PJ_IDLE_CFG_PJ_IDLE; /* set the IDLE bit */
141	141	idle_cfg &= ~APMU_PJ_IDLE_CFG_ISO_MODE_CNTRL_MASK;

arch/arm/mach-mmp/pm-pxa910.c+5−5

@@ -145,23 +145,23 @@ void pxa910_pm_enter_lowpower_mode(int state) · 144 unmodified lines
145	145	case POWER_MODE_UDR:
146	146	/* only shutdown APB in UDR */
147	147	apcr \|= MPMU_APCR_STBYEN \| MPMU_APCR_APBSD;
148		− /* fall through */
	148	+ fallthrough;
149	149	case POWER_MODE_SYS_SLEEP:
150	150	apcr \|= MPMU_APCR_SLPEN; /* set the SLPEN bit */
151	151	apcr \|= MPMU_APCR_VCTCXOSD; /* set VCTCXOSD */
152		− /* fall through */
	152	+ fallthrough;
153	153	case POWER_MODE_APPS_SLEEP:
154	154	apcr \|= MPMU_APCR_DDRCORSD; /* set DDRCORSD */
155		− /* fall through */
	155	+ fallthrough;
156	156	case POWER_MODE_APPS_IDLE:
157	157	apcr \|= MPMU_APCR_AXISD; /* set AXISDD bit */
158		− /* fall through */
	158	+ fallthrough;
159	159	case POWER_MODE_CORE_EXTIDLE:
160	160	idle_cfg \|= APMU_MOH_IDLE_CFG_MOH_IDLE;
161	161	idle_cfg \|= APMU_MOH_IDLE_CFG_MOH_PWRDWN;
162	162	idle_cfg \|= APMU_MOH_IDLE_CFG_MOH_PWR_SW(3)
163	163	\| APMU_MOH_IDLE_CFG_MOH_L2_PWR_SW(3);
164		− /* fall through */
	164	+ fallthrough;
165	165	case POWER_MODE_CORE_INTIDLE:
166	166	break;
167	167	}

arch/arm/mach-omap2/id.c+0−8

@@ -396,7 +396,6 @@ void __init omap3xxx_check_revision(void) · 395 unmodified lines
396	396	cpu_rev = "3.1";
397	397	break;
398	398	case 7:
399		− /* FALLTHROUGH */
400	399	default:
401	400	/* Use the latest known revision as default */
402	401	omap_revision = OMAP3430_REV_ES3_1_2;
@@ -416,7 +415,6 @@ void __init omap3xxx_check_revision(void) · 13 unmodified lines
416	415	cpu_rev = "1.0";
417	416	break;
418	417	case 1:
419		− /* FALLTHROUGH */
420	418	default:
421	419	omap_revision = AM35XX_REV_ES1_1;
422	420	cpu_rev = "1.1";
@@ -435,7 +433,6 @@ void __init omap3xxx_check_revision(void) · 12 unmodified lines
435	433	cpu_rev = "1.1";
436	434	break;
437	435	case 2:
438		− /* FALLTHROUGH */
439	436	default:
440	437	omap_revision = OMAP3630_REV_ES1_2;
441	438	cpu_rev = "1.2";
@@ -456,7 +453,6 @@ void __init omap3xxx_check_revision(void) · 14 unmodified lines
456	453	cpu_rev = "2.0";
457	454	break;
458	455	case 3:
459		− /* FALLTHROUGH */
460	456	default:
461	457	omap_revision = TI8168_REV_ES2_1;
462	458	cpu_rev = "2.1";
@@ -473,7 +469,6 @@ void __init omap3xxx_check_revision(void) · 10 unmodified lines
473	469	cpu_rev = "2.0";
474	470	break;
475	471	case 2:
476		− /* FALLTHROUGH */
477	472	default:
478	473	omap_revision = AM335X_REV_ES2_1;
479	474	cpu_rev = "2.1";
@@ -491,7 +486,6 @@ void __init omap3xxx_check_revision(void) · 11 unmodified lines
491	486	cpu_rev = "1.1";
492	487	break;
493	488	case 2:
494		− /* FALLTHROUGH */
495	489	default:
496	490	omap_revision = AM437X_REV_ES1_2;
497	491	cpu_rev = "1.2";
@@ -502,7 +496,6 @@ void __init omap3xxx_check_revision(void) · 4 unmodified lines
502	496	case 0xb968:
503	497	switch (rev) {
504	498	case 0:
505		− /* FALLTHROUGH */
506	499	case 1:
507	500	omap_revision = TI8148_REV_ES1_0;
508	501	cpu_rev = "1.0";
@@ -512,7 +505,6 @@ void __init omap3xxx_check_revision(void) · 3 unmodified lines
512	505	cpu_rev = "2.0";
513	506	break;
514	507	case 3:
515		− /* FALLTHROUGH */
516	508	default:
517	509	omap_revision = TI8148_REV_ES2_1;
518	510	cpu_rev = "2.1";

arch/arm/mach-omap2/omap_device.c+1−1

@@ -240,7 +240,7 @@ static int _omap_device_notifier_call(struct notifier_block *nb, · 239 unmodified lines
240	240	if (pdev->dev.of_node)
241	241	omap_device_build_from_dt(pdev);
242	242	omap_auxdata_legacy_init(dev);
243		− /* fall through */
	243	+ fallthrough;
244	244	default:
245	245	od = to_omap_device(pdev);
246	246	if (od)

arch/arm/mach-omap2/pm34xx.c+0−4

@@ -298,11 +298,7 @@ static void omap3_pm_idle(void) · 297 unmodified lines
298	298	if (omap_irq_pending())
299	299	return;
300	300
301		− trace_cpu_idle_rcuidle(1, smp_processor_id());
302		−
303	301	omap_sram_idle();
304		−
305		− trace_cpu_idle_rcuidle(PWR_EVENT_EXIT, smp_processor_id());
306	302	}
307	303
308	304	#ifdef CONFIG_SUSPEND

arch/arm/mach-orion5x/dns323-setup.c+1−1

@@ -624,7 +624,7 @@ static void __init dns323_init(void) · 623 unmodified lines
624	624	dns323ab_leds[0].active_low = 1;
625	625	gpio_request(DNS323_GPIO_LED_POWER1, "Power Led Enable");
626	626	gpio_direction_output(DNS323_GPIO_LED_POWER1, 0);
627		− /* Fall through */
	627	+ fallthrough;
628	628	case DNS323_REV_B1:
629	629	i2c_register_board_info(0, dns323ab_i2c_devices,
630	630	ARRAY_SIZE(dns323ab_i2c_devices));

arch/arm/mach-rpc/riscpc.c+1−1

@@ -46,7 +46,7 @@ static int __init parse_tag_acorn(const struct tag *tag) · 45 unmodified lines
46	46	switch (tag->u.acorn.vram_pages) {
47	47	case 512:
48	48	vram_size += PAGE_SIZE * 256;
49		− /* Fall through - ??? */
	49	+ fallthrough; /* ??? */
50	50	case 256:
51	51	vram_size += PAGE_SIZE * 256;
52	52	default:

arch/arm/mach-tegra/reset.c+1−1

@@ -70,7 +70,7 @@ static void __init tegra_cpu_reset_handler_enable(void) · 69 unmodified lines
70	70	switch (err) {
71	71	case -ENOSYS:
72	72	tegra_cpu_reset_handler_set(reset_address);
73		− /* fall through */
	73	+ fallthrough;
74	74	case 0:
75	75	is_enabled = true;
76	76	break;

arch/arm/mm/alignment.c+2−2

@@ -694,7 +694,7 @@ thumb2arm(u16 tinstr) · 693 unmodified lines
694	694	return subset[(L<<1) \| ((tinstr & (1<<8)) >> 8)] \|
695	695	(tinstr & 255); /* register_list */
696	696	}
697		− /* Else, fall through - for illegal instruction case */
	697	+ fallthrough; /* for illegal instruction case */
698	698
699	699	default:
700	700	return BAD_INSTR;
@@ -750,7 +750,7 @@ do_alignment_t32_to_handler(u32 pinstr, struct pt_regs regs, · 49 unmodified lines
750	750	case 0xe8e0:
751	751	case 0xe9e0:
752	752	poffset->un = (tinst2 & 0xff) << 2;
753		− /* Fall through */
	753	+ fallthrough;
754	754
755	755	case 0xe940:
756	756	case 0xe9c0:

arch/arm/mm/proc-v7-bugs.c+1−1

@@ -71,7 +71,7 @@ static void cpu_v7_spectre_init(void) · 70 unmodified lines
71	71	/* Other ARM CPUs require no workaround */
72	72	if (read_cpuid_implementor() == ARM_CPU_IMP_ARM)
73	73	break;
74		− /* fallthrough */
	74	+ fallthrough;
75	75	/* Cortex A57/A72 require firmware workaround */
76	76	case ARM_CPU_PART_CORTEX_A57:
77	77	case ARM_CPU_PART_CORTEX_A72: {

arch/arm/plat-omap/dma.c+3−3

@@ -309,14 +309,14 @@ void omap_set_dma_src_burst_mode(int lch, enum omap_dma_burst_mode burst_mode) · 308 unmodified lines
309	309	* not supported by current hardware on OMAP1
310	310	* w \|= (0x03 << 7);
311	311	*/
312		− /* fall through */
	312	+ fallthrough;
313	313	case OMAP_DMA_DATA_BURST_16:
314	314	if (dma_omap2plus()) {
315	315	burst = 0x3;
316	316	break;
317	317	}
318	318	/* OMAP1 don't support burst 16 */
319		− /* fall through */
	319	+ fallthrough;
320	320	default:
321	321	BUG();
322	322	}
@@ -393,7 +393,7 @@ void omap_set_dma_dest_burst_mode(int lch, enum omap_dma_burst_mode burst_mode) · 70 unmodified lines
393	393	break;
394	394	}
395	395	/* OMAP1 don't support burst 16 */
396		− /* fall through */
	396	+ fallthrough;
397	397	default:
398	398	printk(KERN_ERR "Invalid DMA burst mode\n");
399	399	BUG();

arch/arm/probes/decode.c+1−1

@@ -307,7 +307,7 @@ static bool __kprobes decode_regs(probes_opcode_t *pinsn, u32 regs, bool modify) · 306 unmodified lines
307	307	case REG_TYPE_NOPCWB:
308	308	if (!is_writeback(insn))
309	309	break; /* No writeback, so any register is OK */
310		− /* fall through... */
	310	+ fallthrough;
311	311	case REG_TYPE_NOPC:
312	312	case REG_TYPE_NOPCX:
313	313	/* Reject PC (R15) */

arch/arm/probes/kprobes/core.c+1−1

@@ -280,7 +280,7 @@ void __kprobes kprobe_handler(struct pt_regs *regs) · 279 unmodified lines
280	280	/* A nested probe was hit in FIQ, it is a BUG */
281	281	pr_warn("Unrecoverable kprobe detected.\n");
282	282	dump_kprobe(p);
283		− /* fall through */
	283	+ fallthrough;
284	284	default:
285	285	/* impossible cases */
286	286	BUG();

arch/arm64/Makefile+10−4

@@ -82,8 +82,8 @@ endif · 81 unmodified lines
82	82	# compiler to generate them and consequently to break the single image contract
83	83	# we pass it only to the assembler. This option is utilized only in case of non
84	84	# integrated assemblers.
85		−ifneq ($(CONFIG_AS_HAS_ARMV8_4), y)
86		−branch-prot-flags-$(CONFIG_AS_HAS_PAC) += -Wa,-march=armv8.3-a
	85	+ifeq ($(CONFIG_AS_HAS_PAC), y)
	86	+asm-arch := armv8.3-a
87	87	endif
88	88	endif
89	89
@@ -91,7 +91,12 @@ KBUILD_CFLAGS += $(branch-prot-flags-y) · 1 unmodified line
91	91
92	92	ifeq ($(CONFIG_AS_HAS_ARMV8_4), y)
93	93	# make sure to pass the newest target architecture to -march.
94		−KBUILD_CFLAGS += -Wa,-march=armv8.4-a
	94	+asm-arch := armv8.4-a
	95	+endif
	96	+
	97	+ifdef asm-arch
	98	+KBUILD_CFLAGS += -Wa,-march=$(asm-arch) \
	99	+ -DARM64_ASM_ARCH='"$(asm-arch)"'
95	100	endif
96	101
97	102	ifeq ($(CONFIG_SHADOW_CALL_STACK), y)
@@ -165,7 +170,8 @@ zinstall install: · 67 unmodified lines
165	170	PHONY += vdso_install
166	171	vdso_install:
167	172	$(Q)$(MAKE) $(build)=arch/arm64/kernel/vdso $@
168		− $(Q)$(MAKE) $(build)=arch/arm64/kernel/vdso32 $@
	173	+ $(if $(CONFIG_COMPAT_VDSO), \
	174	+ $(Q)$(MAKE) $(build)=arch/arm64/kernel/vdso32 $@)
169	175
170	176	# We use MRPROPER_FILES and CLEAN_FILES now
171	177	archclean:

arch/arm64/boot/dts/mediatek/mt7622.dtsi+2−0

@@ -686,6 +686,8 @@ · 685 unmodified lines
686	686	clocks = <&pericfg CLK_PERI_MSDC30_0_PD>,
687	687	<&topckgen CLK_TOP_MSDC50_0_SEL>;
688	688	clock-names = "source", "hclk";
	689	+ resets = <&pericfg MT7622_PERI_MSDC0_SW_RST>;
	690	+ reset-names = "hrst";
689	691	status = "disabled";
690	692	};
691	693

arch/arm64/boot/dts/nvidia/tegra186.dtsi+12−8

@@ -337,8 +337,9 @@ · 336 unmodified lines
337	337	compatible = "nvidia,tegra186-sdhci";
338	338	reg = <0x0 0x03400000 0x0 0x10000>;
339	339	interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
340		− clocks = <&bpmp TEGRA186_CLK_SDMMC1>;
341		− clock-names = "sdhci";
	340	+ clocks = <&bpmp TEGRA186_CLK_SDMMC1>,
	341	+ <&bpmp TEGRA186_CLK_SDMMC_LEGACY_TM>;
	342	+ clock-names = "sdhci", "tmclk";
342	343	resets = <&bpmp TEGRA186_RESET_SDMMC1>;
343	344	reset-names = "sdhci";
344	345	interconnects = <&mc TEGRA186_MEMORY_CLIENT_SDMMCRA &emc>,
@@ -366,8 +367,9 @@ · 21 unmodified lines
366	367	compatible = "nvidia,tegra186-sdhci";
367	368	reg = <0x0 0x03420000 0x0 0x10000>;
368	369	interrupts = <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
369		− clocks = <&bpmp TEGRA186_CLK_SDMMC2>;
370		− clock-names = "sdhci";
	370	+ clocks = <&bpmp TEGRA186_CLK_SDMMC2>,
	371	+ <&bpmp TEGRA186_CLK_SDMMC_LEGACY_TM>;
	372	+ clock-names = "sdhci", "tmclk";
371	373	resets = <&bpmp TEGRA186_RESET_SDMMC2>;
372	374	reset-names = "sdhci";
373	375	interconnects = <&mc TEGRA186_MEMORY_CLIENT_SDMMCRAA &emc>,
@@ -390,8 +392,9 @@ · 16 unmodified lines
390	392	compatible = "nvidia,tegra186-sdhci";
391	393	reg = <0x0 0x03440000 0x0 0x10000>;
392	394	interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;
393		− clocks = <&bpmp TEGRA186_CLK_SDMMC3>;
394		− clock-names = "sdhci";
	395	+ clocks = <&bpmp TEGRA186_CLK_SDMMC3>,
	396	+ <&bpmp TEGRA186_CLK_SDMMC_LEGACY_TM>;
	397	+ clock-names = "sdhci", "tmclk";
395	398	resets = <&bpmp TEGRA186_RESET_SDMMC3>;
396	399	reset-names = "sdhci";
397	400	interconnects = <&mc TEGRA186_MEMORY_CLIENT_SDMMCR &emc>,
@@ -416,8 +419,9 @@ · 18 unmodified lines
416	419	compatible = "nvidia,tegra186-sdhci";
417	420	reg = <0x0 0x03460000 0x0 0x10000>;
418	421	interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
419		− clocks = <&bpmp TEGRA186_CLK_SDMMC4>;
420		− clock-names = "sdhci";
	422	+ clocks = <&bpmp TEGRA186_CLK_SDMMC4>,
	423	+ <&bpmp TEGRA186_CLK_SDMMC_LEGACY_TM>;
	424	+ clock-names = "sdhci", "tmclk";
421	425	assigned-clocks = <&bpmp TEGRA186_CLK_SDMMC4>,
422	426	<&bpmp TEGRA186_CLK_PLLC4_VCO>;
423	427	assigned-clock-parents = <&bpmp TEGRA186_CLK_PLLC4_VCO>;

arch/arm64/boot/dts/nvidia/tegra194.dtsi+9−6

@@ -460,8 +460,9 @@ · 459 unmodified lines
460	460	compatible = "nvidia,tegra194-sdhci";
461	461	reg = <0x03400000 0x10000>;
462	462	interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
463		− clocks = <&bpmp TEGRA194_CLK_SDMMC1>;
464		− clock-names = "sdhci";
	463	+ clocks = <&bpmp TEGRA194_CLK_SDMMC1>,
	464	+ <&bpmp TEGRA194_CLK_SDMMC_LEGACY_TM>;
	465	+ clock-names = "sdhci", "tmclk";
465	466	resets = <&bpmp TEGRA194_RESET_SDMMC1>;
466	467	reset-names = "sdhci";
467	468	interconnects = <&mc TEGRA194_MEMORY_CLIENT_SDMMCRA &emc>,
@@ -485,8 +486,9 @@ · 17 unmodified lines
485	486	compatible = "nvidia,tegra194-sdhci";
486	487	reg = <0x03440000 0x10000>;
487	488	interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;
488		− clocks = <&bpmp TEGRA194_CLK_SDMMC3>;
489		− clock-names = "sdhci";
	489	+ clocks = <&bpmp TEGRA194_CLK_SDMMC3>,
	490	+ <&bpmp TEGRA194_CLK_SDMMC_LEGACY_TM>;
	491	+ clock-names = "sdhci", "tmclk";
490	492	resets = <&bpmp TEGRA194_RESET_SDMMC3>;
491	493	reset-names = "sdhci";
492	494	interconnects = <&mc TEGRA194_MEMORY_CLIENT_SDMMCR &emc>,
@@ -511,8 +513,9 @@ · 18 unmodified lines
511	513	compatible = "nvidia,tegra194-sdhci";
512	514	reg = <0x03460000 0x10000>;
513	515	interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
514		− clocks = <&bpmp TEGRA194_CLK_SDMMC4>;
515		− clock-names = "sdhci";
	516	+ clocks = <&bpmp TEGRA194_CLK_SDMMC4>,
	517	+ <&bpmp TEGRA194_CLK_SDMMC_LEGACY_TM>;
	518	+ clock-names = "sdhci", "tmclk";
516	519	assigned-clocks = <&bpmp TEGRA194_CLK_SDMMC4>,
517	520	<&bpmp TEGRA194_CLK_PLLC4>;
518	521	assigned-clock-parents =

arch/arm64/boot/dts/nvidia/tegra210.dtsi+12−8

@@ -1194,8 +1194,9 @@ · 1193 unmodified lines
1194	1194	compatible = "nvidia,tegra210-sdhci";
1195	1195	reg = <0x0 0x700b0000 0x0 0x200>;
1196	1196	interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
1197		− clocks = <&tegra_car TEGRA210_CLK_SDMMC1>;
1198		− clock-names = "sdhci";
	1197	+ clocks = <&tegra_car TEGRA210_CLK_SDMMC1>,
	1198	+ <&tegra_car TEGRA210_CLK_SDMMC_LEGACY>;
	1199	+ clock-names = "sdhci", "tmclk";
1199	1200	resets = <&tegra_car 14>;
1200	1201	reset-names = "sdhci";
1201	1202	pinctrl-names = "sdmmc-3v3", "sdmmc-1v8",
@@ -1222,8 +1223,9 @@ · 20 unmodified lines
1222	1223	compatible = "nvidia,tegra210-sdhci";
1223	1224	reg = <0x0 0x700b0200 0x0 0x200>;
1224	1225	interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
1225		− clocks = <&tegra_car TEGRA210_CLK_SDMMC2>;
1226		− clock-names = "sdhci";
	1226	+ clocks = <&tegra_car TEGRA210_CLK_SDMMC2>,
	1227	+ <&tegra_car TEGRA210_CLK_SDMMC_LEGACY>;
	1228	+ clock-names = "sdhci", "tmclk";
1227	1229	resets = <&tegra_car 9>;
1228	1230	reset-names = "sdhci";
1229	1231	pinctrl-names = "sdmmc-1v8-drv";
@@ -1239,8 +1241,9 @@ · 9 unmodified lines
1239	1241	compatible = "nvidia,tegra210-sdhci";
1240	1242	reg = <0x0 0x700b0400 0x0 0x200>;
1241	1243	interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
1242		− clocks = <&tegra_car TEGRA210_CLK_SDMMC3>;
1243		− clock-names = "sdhci";
	1244	+ clocks = <&tegra_car TEGRA210_CLK_SDMMC3>,
	1245	+ <&tegra_car TEGRA210_CLK_SDMMC_LEGACY>;
	1246	+ clock-names = "sdhci", "tmclk";
1244	1247	resets = <&tegra_car 69>;
1245	1248	reset-names = "sdhci";
1246	1249	pinctrl-names = "sdmmc-3v3", "sdmmc-1v8",
@@ -1262,8 +1265,9 @@ · 15 unmodified lines
1262	1265	compatible = "nvidia,tegra210-sdhci";
1263	1266	reg = <0x0 0x700b0600 0x0 0x200>;
1264	1267	interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
1265		− clocks = <&tegra_car TEGRA210_CLK_SDMMC4>;
1266		− clock-names = "sdhci";
	1268	+ clocks = <&tegra_car TEGRA210_CLK_SDMMC4>,
	1269	+ <&tegra_car TEGRA210_CLK_SDMMC_LEGACY>;
	1270	+ clock-names = "sdhci", "tmclk";
1267	1271	resets = <&tegra_car 15>;
1268	1272	reset-names = "sdhci";
1269	1273	pinctrl-names = "sdmmc-3v3-drv", "sdmmc-1v8-drv";

arch/arm64/boot/dts/ti/k3-am65-main.dtsi+17−19

@@ -417,10 +417,10 @@ · 416 unmodified lines
417	417	ti,intr-trigger-type = <1>;
418	418	interrupt-controller;
419	419	interrupt-parent = <&gic500>;
420		− #interrupt-cells = <2>;
	420	+ #interrupt-cells = <1>;
421	421	ti,sci = <&dmsc>;
422		− ti,sci-dst-id = <56>;
423		− ti,sci-rm-range-girq = <0x1>;
	422	+ ti,sci-dev-id = <100>;
	423	+ ti,interrupt-ranges = <0 392 32>;
424	424	};
425	425
426	426	main_navss {
@@ -438,10 +438,11 @@ · 11 unmodified lines
438	438	ti,intr-trigger-type = <4>;
439	439	interrupt-controller;
440	440	interrupt-parent = <&gic500>;
441		− #interrupt-cells = <2>;
	441	+ #interrupt-cells = <1>;
442	442	ti,sci = <&dmsc>;
443		− ti,sci-dst-id = <56>;
444		− ti,sci-rm-range-girq = <0x0>, <0x2>;
	443	+ ti,sci-dev-id = <182>;
	444	+ ti,interrupt-ranges = <0 64 64>,
	445	+ <64 448 64>;
445	446	};
446	447
447	448	inta_main_udmass: interrupt-controller@33d00000 {
@@ -452,8 +453,7 @@ · 4 unmodified lines
452	453	msi-controller;
453	454	ti,sci = <&dmsc>;
454	455	ti,sci-dev-id = <179>;
455		− ti,sci-rm-range-vint = <0x0>;
456		− ti,sci-rm-range-global-event = <0x1>;
	456	+ ti,interrupt-ranges = <0 0 256>;
457	457	};
458	458
459	459	secure_proxy_main: mailbox@32c00000 {
@@ -589,7 +589,7 @@ · 129 unmodified lines
589	589	<0x0 0x33000000 0x0 0x40000>;
590	590	reg-names = "rt", "fifos", "proxy_gcfg", "proxy_target";
591	591	ti,num-rings = <818>;
592		− ti,sci-rm-range-gp-rings = <0x2>; /* GP ring range */
	592	+ ti,sci-rm-range-gp-rings = <0x1>; /* GP ring range */
593	593	ti,dma-ring-reset-quirk;
594	594	ti,sci = <&dmsc>;
595	595	ti,sci-dev-id = <187>;
@@ -609,11 +609,11 @@ · 13 unmodified lines
609	609	ti,sci-dev-id = <188>;
610	610	ti,ringacc = <&ringacc>;
611	611
612		− ti,sci-rm-range-tchan = <0x1>, /* TX_HCHAN */
613		− <0x2>; /* TX_CHAN */
614		− ti,sci-rm-range-rchan = <0x4>, /* RX_HCHAN */
615		− <0x5>; /* RX_CHAN */
616		− ti,sci-rm-range-rflow = <0x6>; /* GP RFLOW */
	612	+ ti,sci-rm-range-tchan = <0xf>, /* TX_HCHAN */
	613	+ <0xd>; /* TX_CHAN */
	614	+ ti,sci-rm-range-rchan = <0xb>, /* RX_HCHAN */
	615	+ <0xa>; /* RX_CHAN */
	616	+ ti,sci-rm-range-rflow = <0x0>; /* GP RFLOW */
617	617	};
618	618
619	619	cpts@310d0000 {
@@ -622,7 +622,7 @@ · 2 unmodified lines
622	622	reg-names = "cpts";
623	623	clocks = <&main_cpts_mux>;
624	624	clock-names = "cpts";
625		− interrupts-extended = <&intr_main_navss 163 0>;
	625	+ interrupts-extended = <&intr_main_navss 391>;
626	626	interrupt-names = "cpts";
627	627	ti,cpts-periodic-outputs = <6>;
628	628	ti,cpts-ext-ts-inputs = <8>;
@@ -645,8 +645,7 @@ · 16 unmodified lines
645	645	gpio-controller;
646	646	#gpio-cells = <2>;
647	647	interrupt-parent = <&intr_main_gpio>;
648		− interrupts = <57 256>, <57 257>, <57 258>, <57 259>, <57 260>,
649		− <57 261>;
	648	+ interrupts = <192>, <193>, <194>, <195>, <196>, <197>;
650	649	interrupt-controller;
651	650	#interrupt-cells = <2>;
652	651	ti,ngpio = <96>;
@@ -661,8 +660,7 @@ · 8 unmodified lines
661	660	gpio-controller;
662	661	#gpio-cells = <2>;
663	662	interrupt-parent = <&intr_main_gpio>;
664		− interrupts = <58 256>, <58 257>, <58 258>, <58 259>, <58 260>,
665		− <58 261>;
	663	+ interrupts = <200>, <201>, <202>, <203>, <204>, <205>;
666	664	interrupt-controller;
667	665	#interrupt-cells = <2>;
668	666	ti,ngpio = <90>;

arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi+6−6

@@ -134,7 +134,7 @@ · 133 unmodified lines
134	134	<0x0 0x2a500000 0x0 0x40000>;
135	135	reg-names = "rt", "fifos", "proxy_gcfg", "proxy_target";
136	136	ti,num-rings = <286>;
137		− ti,sci-rm-range-gp-rings = <0x2>; /* GP ring range */
	137	+ ti,sci-rm-range-gp-rings = <0x1>; /* GP ring range */
138	138	ti,dma-ring-reset-quirk;
139	139	ti,sci = <&dmsc>;
140	140	ti,sci-dev-id = <195>;
@@ -154,11 +154,11 @@ · 13 unmodified lines
154	154	ti,sci-dev-id = <194>;
155	155	ti,ringacc = <&mcu_ringacc>;
156	156
157		− ti,sci-rm-range-tchan = <0x1>, /* TX_HCHAN */
158		− <0x2>; /* TX_CHAN */
159		− ti,sci-rm-range-rchan = <0x3>, /* RX_HCHAN */
160		− <0x4>; /* RX_CHAN */
161		− ti,sci-rm-range-rflow = <0x5>; /* GP RFLOW */
	157	+ ti,sci-rm-range-tchan = <0xf>, /* TX_HCHAN */
	158	+ <0xd>; /* TX_CHAN */
	159	+ ti,sci-rm-range-rchan = <0xb>, /* RX_HCHAN */
	160	+ <0xa>; /* RX_CHAN */
	161	+ ti,sci-rm-range-rflow = <0x0>; /* GP RFLOW */
162	162	};
163	163	};
164	164

arch/arm64/boot/dts/ti/k3-am65-wakeup.dtsi+4−4

@@ -74,10 +74,10 @@ · 73 unmodified lines
74	74	ti,intr-trigger-type = <1>;
75	75	interrupt-controller;
76	76	interrupt-parent = <&gic500>;
77		− #interrupt-cells = <2>;
	77	+ #interrupt-cells = <1>;
78	78	ti,sci = <&dmsc>;
79		− ti,sci-dst-id = <56>;
80		− ti,sci-rm-range-girq = <0x4>;
	79	+ ti,sci-dev-id = <156>;
	80	+ ti,interrupt-ranges = <0 712 16>;
81	81	};
82	82
83	83	wkup_gpio0: wkup_gpio0@42110000 {
@@ -86,7 +86,7 @@ · 2 unmodified lines
86	86	gpio-controller;
87	87	#gpio-cells = <2>;
88	88	interrupt-parent = <&intr_wkup_gpio>;
89		− interrupts = <59 128>, <59 129>, <59 130>, <59 131>;
	89	+ interrupts = <60>, <61>, <62>, <63>;
90	90	interrupt-controller;
91	91	#interrupt-cells = <2>;
92	92	ti,ngpio = <56>;

arch/arm64/boot/dts/ti/k3-am654-base-board.dts+2−2

@@ -384,7 +384,7 @@ · 383 unmodified lines
384	384	};
385	385
386	386	&mailbox0_cluster0 {
387		− interrupts = <164 0>;
	387	+ interrupts = <436>;
388	388
389	389	mbox_mcu_r5fss0_core0: mbox-mcu-r5fss0-core0 {
390	390	ti,mbox-tx = <1 0 0>;
@@ -393,7 +393,7 @@ · 2 unmodified lines
393	393	};
394	394
395	395	&mailbox0_cluster1 {
396		− interrupts = <165 0>;
	396	+ interrupts = <432>;
397	397
398	398	mbox_mcu_r5fss0_core1: mbox-mcu-r5fss0-core1 {
399	399	ti,mbox-tx = <1 0 0>;

arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts+5−5

@@ -287,7 +287,7 @@ · 286 unmodified lines
287	287	};
288	288
289	289	&mailbox0_cluster0 {
290		− interrupts = <214 0>;
	290	+ interrupts = <436>;
291	291
292	292	mbox_mcu_r5fss0_core0: mbox-mcu-r5fss0-core0 {
293	293	ti,mbox-rx = <0 0 0>;
@@ -301,7 +301,7 @@ · 7 unmodified lines
301	301	};
302	302
303	303	&mailbox0_cluster1 {
304		− interrupts = <215 0>;
	304	+ interrupts = <432>;
305	305
306	306	mbox_main_r5fss0_core0: mbox-main-r5fss0-core0 {
307	307	ti,mbox-rx = <0 0 0>;
@@ -315,7 +315,7 @@ · 7 unmodified lines
315	315	};
316	316
317	317	&mailbox0_cluster2 {
318		− interrupts = <216 0>;
	318	+ interrupts = <428>;
319	319
320	320	mbox_main_r5fss1_core0: mbox-main-r5fss1-core0 {
321	321	ti,mbox-rx = <0 0 0>;
@@ -329,7 +329,7 @@ · 7 unmodified lines
329	329	};
330	330
331	331	&mailbox0_cluster3 {
332		− interrupts = <217 0>;
	332	+ interrupts = <424>;
333	333
334	334	mbox_c66_0: mbox-c66-0 {
335	335	ti,mbox-rx = <0 0 0>;
@@ -343,7 +343,7 @@ · 7 unmodified lines
343	343	};
344	344
345	345	&mailbox0_cluster4 {
346		− interrupts = <218 0>;
	346	+ interrupts = <420>;
347	347
348	348	mbox_c71_0: mbox-c71-0 {
349	349	ti,mbox-rx = <0 0 0>;

arch/arm64/boot/dts/ti/k3-j721e-main.dtsi+22−21

@@ -80,10 +80,10 @@ · 79 unmodified lines
80	80	ti,intr-trigger-type = <1>;
81	81	interrupt-controller;
82	82	interrupt-parent = <&gic500>;
83		− #interrupt-cells = <2>;
	83	+ #interrupt-cells = <1>;
84	84	ti,sci = <&dmsc>;
85		− ti,sci-dst-id = <14>;
86		− ti,sci-rm-range-girq = <0x1>;
	85	+ ti,sci-dev-id = <131>;
	86	+ ti,interrupt-ranges = <8 392 56>;
87	87	};
88	88
89	89	main_navss {
@@ -101,10 +101,12 @@ · 11 unmodified lines
101	101	ti,intr-trigger-type = <4>;
102	102	interrupt-controller;
103	103	interrupt-parent = <&gic500>;
104		− #interrupt-cells = <2>;
	104	+ #interrupt-cells = <1>;
105	105	ti,sci = <&dmsc>;
106		− ti,sci-dst-id = <14>;
107		− ti,sci-rm-range-girq = <0>, <2>;
	106	+ ti,sci-dev-id = <213>;
	107	+ ti,interrupt-ranges = <0 64 64>,
	108	+ <64 448 64>,
	109	+ <128 672 64>;
108	110	};
109	111
110	112	main_udmass_inta: interrupt-controller@33d00000 {
@@ -115,8 +117,7 @@ · 4 unmodified lines
115	117	msi-controller;
116	118	ti,sci = <&dmsc>;
117	119	ti,sci-dev-id = <209>;
118		− ti,sci-rm-range-vint = <0xa>;
119		− ti,sci-rm-range-global-event = <0xd>;
	120	+ ti,interrupt-ranges = <0 0 256>;
120	121	};
121	122
122	123	secure_proxy_main: mailbox@32c00000 {
@@ -296,7 +297,7 @@ · 173 unmodified lines
296	297	reg-names = "cpts";
297	298	clocks = <&k3_clks 201 1>;
298	299	clock-names = "cpts";
299		− interrupts-extended = <&main_navss_intr 201 0>;
	300	+ interrupts-extended = <&main_navss_intr 391>;
300	301	interrupt-names = "cpts";
301	302	ti,cpts-periodic-outputs = <6>;
302	303	ti,cpts-ext-ts-inputs = <8>;
@@ -688,8 +689,8 @@ · 385 unmodified lines
688	689	gpio-controller;
689	690	#gpio-cells = <2>;
690	691	interrupt-parent = <&main_gpio_intr>;
691		− interrupts = <105 0>, <105 1>, <105 2>, <105 3>,
692		− <105 4>, <105 5>, <105 6>, <105 7>;
	692	+ interrupts = <256>, <257>, <258>, <259>,
	693	+ <260>, <261>, <262>, <263>;
693	694	interrupt-controller;
694	695	#interrupt-cells = <2>;
695	696	ti,ngpio = <128>;
@@ -705,7 +706,7 @@ · 9 unmodified lines
705	706	gpio-controller;
706	707	#gpio-cells = <2>;
707	708	interrupt-parent = <&main_gpio_intr>;
708		− interrupts = <106 0>, <106 1>, <106 2>;
	709	+ interrupts = <288>, <289>, <290>;
709	710	interrupt-controller;
710	711	#interrupt-cells = <2>;
711	712	ti,ngpio = <36>;
@@ -721,8 +722,8 @@ · 9 unmodified lines
721	722	gpio-controller;
722	723	#gpio-cells = <2>;
723	724	interrupt-parent = <&main_gpio_intr>;
724		− interrupts = <107 0>, <107 1>, <107 2>, <107 3>,
725		− <107 4>, <107 5>, <107 6>, <107 7>;
	725	+ interrupts = <264>, <265>, <266>, <267>,
	726	+ <268>, <269>, <270>, <271>;
726	727	interrupt-controller;
727	728	#interrupt-cells = <2>;
728	729	ti,ngpio = <128>;
@@ -738,7 +739,7 @@ · 9 unmodified lines
738	739	gpio-controller;
739	740	#gpio-cells = <2>;
740	741	interrupt-parent = <&main_gpio_intr>;
741		− interrupts = <108 0>, <108 1>, <108 2>;
	742	+ interrupts = <292>, <293>, <294>;
742	743	interrupt-controller;
743	744	#interrupt-cells = <2>;
744	745	ti,ngpio = <36>;
@@ -754,8 +755,8 @@ · 9 unmodified lines
754	755	gpio-controller;
755	756	#gpio-cells = <2>;
756	757	interrupt-parent = <&main_gpio_intr>;
757		− interrupts = <109 0>, <109 1>, <109 2>, <109 3>,
758		− <109 4>, <109 5>, <109 6>, <109 7>;
	758	+ interrupts = <272>, <273>, <274>, <275>,
	759	+ <276>, <277>, <278>, <279>;
759	760	interrupt-controller;
760	761	#interrupt-cells = <2>;
761	762	ti,ngpio = <128>;
@@ -771,7 +772,7 @@ · 9 unmodified lines
771	772	gpio-controller;
772	773	#gpio-cells = <2>;
773	774	interrupt-parent = <&main_gpio_intr>;
774		− interrupts = <110 0>, <110 1>, <110 2>;
	775	+ interrupts = <296>, <297>, <298>;
775	776	interrupt-controller;
776	777	#interrupt-cells = <2>;
777	778	ti,ngpio = <36>;
@@ -787,8 +788,8 @@ · 9 unmodified lines
787	788	gpio-controller;
788	789	#gpio-cells = <2>;
789	790	interrupt-parent = <&main_gpio_intr>;
790		− interrupts = <111 0>, <111 1>, <111 2>, <111 3>,
791		− <111 4>, <111 5>, <111 6>, <111 7>;
	791	+ interrupts = <280>, <281>, <282>, <283>,
	792	+ <284>, <285>, <286>, <287>;
792	793	interrupt-controller;
793	794	#interrupt-cells = <2>;
794	795	ti,ngpio = <128>;
@@ -804,7 +805,7 @@ · 9 unmodified lines
804	805	gpio-controller;
805	806	#gpio-cells = <2>;
806	807	interrupt-parent = <&main_gpio_intr>;
807		− interrupts = <112 0>, <112 1>, <112 2>;
	808	+ interrupts = <300>, <301>, <302>;
808	809	interrupt-controller;
809	810	#interrupt-cells = <2>;
810	811	ti,ngpio = <36>;

arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi+5−7

@@ -101,10 +101,10 @@ · 100 unmodified lines
101	101	ti,intr-trigger-type = <1>;
102	102	interrupt-controller;
103	103	interrupt-parent = <&gic500>;
104		− #interrupt-cells = <2>;
	104	+ #interrupt-cells = <1>;
105	105	ti,sci = <&dmsc>;
106		− ti,sci-dst-id = <14>;
107		− ti,sci-rm-range-girq = <0x5>;
	106	+ ti,sci-dev-id = <137>;
	107	+ ti,interrupt-ranges = <16 960 16>;
108	108	};
109	109
110	110	wkup_gpio0: gpio@42110000 {
@@ -113,8 +113,7 @@ · 2 unmodified lines
113	113	gpio-controller;
114	114	#gpio-cells = <2>;
115	115	interrupt-parent = <&wkup_gpio_intr>;
116		− interrupts = <113 0>, <113 1>, <113 2>,
117		− <113 3>, <113 4>, <113 5>;
	116	+ interrupts = <103>, <104>, <105>, <106>, <107>, <108>;
118	117	interrupt-controller;
119	118	#interrupt-cells = <2>;
120	119	ti,ngpio = <84>;
@@ -130,8 +129,7 @@ · 9 unmodified lines
130	129	gpio-controller;
131	130	#gpio-cells = <2>;
132	131	interrupt-parent = <&wkup_gpio_intr>;
133		− interrupts = <114 0>, <114 1>, <114 2>,
134		− <114 3>, <114 4>, <114 5>;
	132	+ interrupts = <112>, <113>, <114>, <115>, <116>, <117>;
135	133	interrupt-controller;
136	134	#interrupt-cells = <2>;
137	135	ti,ngpio = <84>;

arch/arm64/include/asm/compiler.h+6−0

@@ -2,6 +2,12 @@ · 1 unmodified line
2	2	#ifndef __ASM_COMPILER_H
3	3	#define __ASM_COMPILER_H
4	4
	5	+#ifdef ARM64_ASM_ARCH
	6	+#define ARM64_ASM_PREAMBLE ".arch " ARM64_ASM_ARCH "\n"
	7	+#else
	8	+#define ARM64_ASM_PREAMBLE
	9	+#endif
	10	+
5	11	/*
6	12	* The EL0/EL1 pointer bits used by a pointer authentication code.
7	13	* This is dependent on TBI0/TBI1 being enabled, or bits 63:56 would also apply.

arch/arm64/include/asm/irqflags.h+5−0

@@ -95,6 +95,11 @@ static inline int arch_irqs_disabled_flags(unsigned long flags) · 94 unmodified lines
95	95	return res;
96	96	}
97	97
	98	+static inline int arch_irqs_disabled(void)
	99	+{
	100	+ return arch_irqs_disabled_flags(arch_local_save_flags());
	101	+}
	102	+
98	103	static inline unsigned long arch_local_irq_save(void)
99	104	{
100	105	unsigned long flags;

arch/arm64/include/asm/kvm_arm.h+2−1

@@ -71,11 +71,12 @@ · 70 unmodified lines
71	71	* IMO: Override CPSR.I and enable signaling with VI
72	72	* FMO: Override CPSR.F and enable signaling with VF
73	73	* SWIO: Turn set/way invalidates into set/way clean+invalidate
	74	+ * PTW: Take a stage2 fault if a stage1 walk steps in device memory
74	75	*/
75	76	#define HCR_GUEST_FLAGS (HCR_TSC \| HCR_TSW \| HCR_TWE \| HCR_TWI \| HCR_VM \| \
76	77	HCR_BSU_IS \| HCR_FB \| HCR_TAC \| \
77	78	HCR_AMO \| HCR_SWIO \| HCR_TIDCP \| HCR_RW \| HCR_TLOR \| \
78		− HCR_FMO \| HCR_IMO)
	79	+ HCR_FMO \| HCR_IMO \| HCR_PTW )
79	80	#define HCR_VIRT_EXCP_MASK (HCR_VSE \| HCR_VI \| HCR_VF)
80	81	#define HCR_HOST_NVHE_FLAGS (HCR_RW \| HCR_API \| HCR_APK)
81	82	#define HCR_HOST_VHE_FLAGS (HCR_RW \| HCR_TGE \| HCR_E2H)

arch/arm64/include/asm/kvm_asm.h+43−0

@@ -169,6 +169,34 @@ extern char __smccc_workaround_1_smc[__SMCCC_WORKAROUND_1_SMC_SZ]; · 168 unmodified lines
169	169	*__hyp_this_cpu_ptr(sym); \
170	170	})
171	171
	172	+#define __KVM_EXTABLE(from, to) \
	173	+ " .pushsection __kvm_ex_table, \"a\"\n" \
	174	+ " .align 3\n" \
	175	+ " .long (" #from " - .), (" #to " - .)\n" \
	176	+ " .popsection\n"
	177	+
	178	+
	179	+#define __kvm_at(at_op, addr) \
	180	+( { \
	181	+ int __kvm_at_err = 0; \
	182	+ u64 spsr, elr; \
	183	+ asm volatile( \
	184	+ " mrs %1, spsr_el2\n" \
	185	+ " mrs %2, elr_el2\n" \
	186	+ "1: at "at_op", %3\n" \
	187	+ " isb\n" \
	188	+ " b 9f\n" \
	189	+ "2: msr spsr_el2, %1\n" \
	190	+ " msr elr_el2, %2\n" \
	191	+ " mov %w0, %4\n" \
	192	+ "9:\n" \
	193	+ __KVM_EXTABLE(1b, 2b) \
	194	+ : "+r" (__kvm_at_err), "=&r" (spsr), "=&r" (elr) \
	195	+ : "r" (addr), "i" (-EFAULT)); \
	196	+ __kvm_at_err; \
	197	+} )
	198	+
	199	+
172	200	#else /* __ASSEMBLY__ */
173	201
174	202	.macro hyp_adr_this_cpu reg, sym, tmp
@@ -193,6 +221,21 @@ extern char __smccc_workaround_1_smc[__SMCCC_WORKAROUND_1_SMC_SZ]; · 18 unmodified lines
193	221	ldr \vcpu, [\ctxt, #HOST_CONTEXT_VCPU]
194	222	.endm
195	223
	224	+/*
	225	+ * KVM extable for unexpected exceptions.
	226	+ * In the same format _asm_extable, but output to a different section so that
	227	+ * it can be mapped to EL2. The KVM version is not sorted. The caller must
	228	+ * ensure:
	229	+ * x18 has the hypervisor value to allow any Shadow-Call-Stack instrumented
	230	+ * code to write to it, and that SPSR_EL2 and ELR_EL2 are restored by the fixup.
	231	+ */
	232	+.macro _kvm_extable, from, to
	233	+ .pushsection __kvm_ex_table, "a"
	234	+ .align 3
	235	+ .long (\from - .), (\to - .)
	236	+ .popsection
	237	+.endm
	238	+
196	239	#endif
197	240
198	241	#endif /* __ARM_KVM_ASM_H__ */

arch/arm64/include/asm/tlbflush.h+4−2

@@ -28,14 +28,16 @@ · 27 unmodified lines
28	28	* not. The macros handles invoking the asm with or without the
29	29	* register argument as appropriate.
30	30	*/
31		−#define __TLBI_0(op, arg) asm ("tlbi " #op "\n" \
	31	+#define __TLBI_0(op, arg) asm (ARM64_ASM_PREAMBLE \
	32	+ "tlbi " #op "\n" \
32	33	ALTERNATIVE("nop\n nop", \
33	34	"dsb ish\n tlbi " #op, \
34	35	ARM64_WORKAROUND_REPEAT_TLBI, \
35	36	CONFIG_ARM64_WORKAROUND_REPEAT_TLBI) \
36	37	: : )
37	38
38		−#define __TLBI_1(op, arg) asm ("tlbi " #op ", %0\n" \
	39	+#define __TLBI_1(op, arg) asm (ARM64_ASM_PREAMBLE \
	40	+ "tlbi " #op ", %0\n" \
39	41	ALTERNATIVE("nop\n nop", \
40	42	"dsb ish\n tlbi " #op ", %0", \
41	43	ARM64_WORKAROUND_REPEAT_TLBI, \

arch/arm64/kernel/acpi.c+1−1

@@ -322,7 +322,7 @@ void __iomem *acpi_os_ioremap(acpi_physical_address phys, acpi_size size) · 321 unmodified lines
322	322	*/
323	323	if (memblock_is_map_memory(phys))
324	324	return (void __iomem *)__phys_to_virt(phys);
325		− /* fall through */
	325	+ fallthrough;
326	326
327	327	default:
328	328	if (region->attribute & EFI_MEMORY_WB)

arch/arm64/kernel/cpufeature.c+1−1

@@ -686,7 +686,7 @@ static s64 arm64_ftr_safe_value(const struct arm64_ftr_bits *ftrp, s64 new, · 685 unmodified lines
686	686	case FTR_HIGHER_OR_ZERO_SAFE:
687	687	if (!cur \|\| !new)
688	688	break;
689		− /* Fallthrough */
	689	+ fallthrough;
690	690	case FTR_HIGHER_SAFE:
691	691	ret = new > cur ? new : cur;
692	692	break;

arch/arm64/kernel/cpuinfo.c+0−1

@@ -327,7 +327,6 @@ static void cpuinfo_detect_icache_policy(struct cpuinfo_arm64 *info) · 326 unmodified lines
327	327	set_bit(ICACHEF_VPIPT, &__icache_flags);
328	328	break;
329	329	default:
330		− /* Fallthrough */
331	330	case ICACHE_POLICY_VIPT:
332	331	/* Assume aliasing */
333	332	set_bit(ICACHEF_ALIASING, &__icache_flags);

arch/arm64/kernel/hw_breakpoint.c+3−3

@@ -257,7 +257,7 @@ static int hw_breakpoint_control(struct perf_event *bp, · 256 unmodified lines
257	257	* level.
258	258	*/
259	259	enable_debug_monitors(dbg_el);
260		− /* Fall through */
	260	+ fallthrough;
261	261	case HW_BREAKPOINT_RESTORE:
262	262	/* Setup the address register. */
263	263	write_wb_reg(val_reg, i, info->address);
@@ -541,13 +541,13 @@ int hw_breakpoint_arch_parse(struct perf_event *bp, · 277 unmodified lines
541	541	if (hw->ctrl.len == ARM_BREAKPOINT_LEN_2)
542	542	break;
543	543
544		− /* Fallthrough */
	544	+ fallthrough;
545	545	case 3:
546	546	/* Allow single byte watchpoint. */
547	547	if (hw->ctrl.len == ARM_BREAKPOINT_LEN_1)
548	548	break;
549	549
550		− /* Fallthrough */
	550	+ fallthrough;
551	551	default:
552	552	return -EINVAL;
553	553	}

arch/arm64/kernel/image-vars.h+4−0

@@ -103,6 +103,10 @@ KVM_NVHE_ALIAS(vgic_v3_cpuif_trap); · 102 unmodified lines
103	103	KVM_NVHE_ALIAS(gic_pmr_sync);
104	104	#endif
105	105
	106	+/* EL2 exception handling */
	107	+KVM_NVHE_ALIAS(__start___kvm_ex_table);
	108	+KVM_NVHE_ALIAS(__stop___kvm_ex_table);
	109	+
106	110	#endif /* CONFIG_KVM */
107	111
108	112	#endif /* __ARM64_KERNEL_IMAGE_VARS_H */

arch/arm64/kernel/module-plts.c+1−2

@@ -305,8 +305,7 @@ int module_frob_arch_sections(Elf_Ehdr ehdr, Elf_Shdr sechdrs, · 304 unmodified lines
305	305	mod->arch.core.plt_shndx = i;
306	306	else if (!strcmp(secstrings + sechdrs[i].sh_name, ".init.plt"))
307	307	mod->arch.init.plt_shndx = i;
308		− else if (IS_ENABLED(CONFIG_DYNAMIC_FTRACE) &&
309		− !strcmp(secstrings + sechdrs[i].sh_name,
	308	+ else if (!strcmp(secstrings + sechdrs[i].sh_name,
310	309	".text.ftrace_trampoline"))
311	310	tramp = sechdrs + i;
312	311	else if (sechdrs[i].sh_type == SHT_SYMTAB)

arch/arm64/kernel/module.c+4−4

@@ -315,21 +315,21 @@ int apply_relocate_add(Elf64_Shdr *sechdrs, · 314 unmodified lines
315	315	/* MOVW instruction relocations. */
316	316	case R_AARCH64_MOVW_UABS_G0_NC:
317	317	overflow_check = false;
318		− /* Fall through */
	318	+ fallthrough;
319	319	case R_AARCH64_MOVW_UABS_G0:
320	320	ovf = reloc_insn_movw(RELOC_OP_ABS, loc, val, 0,
321	321	AARCH64_INSN_IMM_MOVKZ);
322	322	break;
323	323	case R_AARCH64_MOVW_UABS_G1_NC:
324	324	overflow_check = false;
325		− /* Fall through */
	325	+ fallthrough;
326	326	case R_AARCH64_MOVW_UABS_G1:
327	327	ovf = reloc_insn_movw(RELOC_OP_ABS, loc, val, 16,
328	328	AARCH64_INSN_IMM_MOVKZ);
329	329	break;
330	330	case R_AARCH64_MOVW_UABS_G2_NC:
331	331	overflow_check = false;
332		− /* Fall through */
	332	+ fallthrough;
333	333	case R_AARCH64_MOVW_UABS_G2:
334	334	ovf = reloc_insn_movw(RELOC_OP_ABS, loc, val, 32,
335	335	AARCH64_INSN_IMM_MOVKZ);
@@ -397,7 +397,7 @@ int apply_relocate_add(Elf64_Shdr *sechdrs, · 61 unmodified lines
397	397	break;
398	398	case R_AARCH64_ADR_PREL_PG_HI21_NC:
399	399	overflow_check = false;
400		− /* Fall through */
	400	+ fallthrough;
401	401	case R_AARCH64_ADR_PREL_PG_HI21:
402	402	ovf = reloc_insn_adrp(me, sechdrs, loc, val);
403	403	if (ovf && ovf != -ERANGE)

arch/arm64/kernel/process.c+0−2

@@ -123,10 +123,8 @@ void arch_cpu_idle(void) · 122 unmodified lines
123	123	* This should do all the clock switching and wait for interrupt
124	124	* tricks
125	125	*/
126		− trace_cpu_idle_rcuidle(1, smp_processor_id());
127	126	cpu_do_idle();
128	127	local_irq_enable();
129		− trace_cpu_idle_rcuidle(PWR_EVENT_EXIT, smp_processor_id());
130	128	}
131	129
132	130	#ifdef CONFIG_HOTPLUG_CPU

arch/arm64/kernel/setup.c+0−1

@@ -280,7 +280,6 @@ u64 cpu_logical_map(int cpu) · 279 unmodified lines
280	280	{
281	281	return __cpu_logical_map[cpu];
282	282	}
283		−EXPORT_SYMBOL_GPL(cpu_logical_map);
284	283
285	284	void __init __no_sanitize_address setup_arch(char **cmdline_p)
286	285	{

arch/arm64/kernel/smp.c+1−1

@@ -151,7 +151,7 @@ int __cpu_up(unsigned int cpu, struct task_struct *idle) · 150 unmodified lines
151	151	break;
152	152	}
153	153	pr_crit("CPU%u: may not have shut down cleanly\n", cpu);
154		− /* Fall through */
	154	+ fallthrough;
155	155	case CPU_STUCK_IN_KERNEL:
156	156	pr_crit("CPU%u: is stuck in kernel\n", cpu);
157	157	if (status & CPU_STUCK_REASON_52_BIT_VA)

arch/arm64/kernel/vmlinux.lds.S+8−0

@@ -20,6 +20,13 @@ ENTRY(_text) · 19 unmodified lines
20	20
21	21	jiffies = jiffies_64;
22	22
	23	+
	24	+#define HYPERVISOR_EXTABLE \
	25	+ . = ALIGN(SZ_8); \
	26	+ __start___kvm_ex_table = .; \
	27	+ *(__kvm_ex_table) \
	28	+ __stop___kvm_ex_table = .;
	29	+
23	30	#define HYPERVISOR_TEXT \
24	31	/* \
25	32	* Align to 4 KB so that \
@@ -35,6 +42,7 @@ jiffies = jiffies_64; · 9 unmodified lines
35	42	__hyp_idmap_text_end = .; \
36	43	__hyp_text_start = .; \
37	44	*(.hyp.text) \
	45	+ HYPERVISOR_EXTABLE \
38	46	__hyp_text_end = .;
39	47
40	48	#define IDMAP_TEXT \

arch/arm64/kvm/handle_exit.c+1−1

@@ -128,7 +128,7 @@ static int kvm_handle_guest_debug(struct kvm_vcpu *vcpu) · 127 unmodified lines
128	128	switch (ESR_ELx_EC(esr)) {
129	129	case ESR_ELx_EC_WATCHPT_LOW:
130	130	run->debug.arch.far = vcpu->arch.fault.far_el2;
131		− /* fall through */
	131	+ fallthrough;
132	132	case ESR_ELx_EC_SOFTSTP_LOW:
133	133	case ESR_ELx_EC_BREAKPT_LOW:
134	134	case ESR_ELx_EC_BKPT32:

arch/arm64/kvm/hyp/entry.S+9−6

@@ -196,20 +196,23 @@ alternative_endif · 195 unmodified lines
196	196	// This is our single instruction exception window. A pending
197	197	// SError is guaranteed to occur at the earliest when we unmask
198	198	// it, and at the latest just after the ISB.
199		− .global abort_guest_exit_start
200	199	abort_guest_exit_start:
201	200
202	201	isb
203	202
204		− .global abort_guest_exit_end
205	203	abort_guest_exit_end:
206	204
207	205	msr daifset, #4 // Mask aborts
	206	+ ret
	207	+
	208	+ _kvm_extable abort_guest_exit_start, 9997f
	209	+ _kvm_extable abort_guest_exit_end, 9997f
	210	+9997:
	211	+ msr daifset, #4 // Mask aborts
	212	+ mov x0, #(1 << ARM_EXIT_WITH_SERROR_BIT)
208	213
209		− // If the exception took place, restore the EL1 exception
210		− // context so that we can report some information.
211		− // Merge the exception code with the SError pending bit.
212		− tbz x0, #ARM_EXIT_WITH_SERROR_BIT, 1f
	214	+ // restore the EL1 exception context so that we can report some
	215	+ // information. Merge the exception code with the SError pending bit.
213	216	msr elr_el2, x2
214	217	msr esr_el2, x3
215	218	msr spsr_el2, x4

arch/arm64/kvm/hyp/hyp-entry.S+41−24

@@ -15,6 +15,30 @@ · 14 unmodified lines
15	15	#include <asm/kvm_mmu.h>
16	16	#include <asm/mmu.h>
17	17
	18	+.macro save_caller_saved_regs_vect
	19	+ /* x0 and x1 were saved in the vector entry */
	20	+ stp x2, x3, [sp, #-16]!
	21	+ stp x4, x5, [sp, #-16]!
	22	+ stp x6, x7, [sp, #-16]!
	23	+ stp x8, x9, [sp, #-16]!
	24	+ stp x10, x11, [sp, #-16]!
	25	+ stp x12, x13, [sp, #-16]!
	26	+ stp x14, x15, [sp, #-16]!
	27	+ stp x16, x17, [sp, #-16]!
	28	+.endm
	29	+
	30	+.macro restore_caller_saved_regs_vect
	31	+ ldp x16, x17, [sp], #16
	32	+ ldp x14, x15, [sp], #16
	33	+ ldp x12, x13, [sp], #16
	34	+ ldp x10, x11, [sp], #16
	35	+ ldp x8, x9, [sp], #16
	36	+ ldp x6, x7, [sp], #16
	37	+ ldp x4, x5, [sp], #16
	38	+ ldp x2, x3, [sp], #16
	39	+ ldp x0, x1, [sp], #16
	40	+.endm
	41	+
18	42	.text
19	43
20	44	.macro do_el2_call
@@ -143,13 +167,19 @@ el1_error: · 122 unmodified lines
143	167	b __guest_exit
144	168
145	169	el2_sync:
146		− /* Check for illegal exception return, otherwise panic */
	170	+ /* Check for illegal exception return */
147	171	mrs x0, spsr_el2
	172	+ tbnz x0, #20, 1f
148	173
149		− /* if this was something else, then panic! */
150		− tst x0, #PSR_IL_BIT
151		− b.eq __hyp_panic
	174	+ save_caller_saved_regs_vect
	175	+ stp x29, x30, [sp, #-16]!
	176	+ bl kvm_unexpected_el2_exception
	177	+ ldp x29, x30, [sp], #16
	178	+ restore_caller_saved_regs_vect
152	179
	180	+ eret
	181	+
	182	+1:
153	183	/* Let's attempt a recovery from the illegal exception return */
154	184	get_vcpu_ptr x1, x0
155	185	mov x0, #ARM_EXCEPTION_IL
@@ -157,27 +187,14 @@ el2_sync: · 1 unmodified line
157	187
158	188
159	189	el2_error:
160		− ldp x0, x1, [sp], #16
	190	+ save_caller_saved_regs_vect
	191	+ stp x29, x30, [sp, #-16]!
	192	+
	193	+ bl kvm_unexpected_el2_exception
	194	+
	195	+ ldp x29, x30, [sp], #16
	196	+ restore_caller_saved_regs_vect
161	197
162		− /*
163		− * Only two possibilities:
164		− * 1) Either we come from the exit path, having just unmasked
165		− * PSTATE.A: change the return code to an EL2 fault, and
166		− * carry on, as we're already in a sane state to handle it.
167		− * 2) Or we come from anywhere else, and that's a bug: we panic.
168		− *
169		− * For (1), x0 contains the original return code and x1 doesn't
170		− * contain anything meaningful at that stage. We can reuse them
171		− * as temp registers.
172		− * For (2), who cares?
173		− */
174		− mrs x0, elr_el2
175		− adr x1, abort_guest_exit_start
176		− cmp x0, x1
177		− adr x1, abort_guest_exit_end
178		− ccmp x0, x1, #4, ne
179		− b.ne __hyp_panic
180		− mov x0, #(1 << ARM_EXIT_WITH_SERROR_BIT)
181	198	eret
182	199	sb
183	200

arch/arm64/kvm/hyp/include/hyp/debug-sr.h+30−30

@@ -21,70 +21,70 @@ · 20 unmodified lines
21	21	#define save_debug(ptr,reg,nr) \
22	22	switch (nr) { \
23	23	case 15: ptr[15] = read_debug(reg, 15); \
24		− /* Fall through */ \
	24	+ fallthrough; \
25	25	case 14: ptr[14] = read_debug(reg, 14); \
26		− /* Fall through */ \
	26	+ fallthrough; \
27	27	case 13: ptr[13] = read_debug(reg, 13); \
28		− /* Fall through */ \
	28	+ fallthrough; \
29	29	case 12: ptr[12] = read_debug(reg, 12); \
30		− /* Fall through */ \
	30	+ fallthrough; \
31	31	case 11: ptr[11] = read_debug(reg, 11); \
32		− /* Fall through */ \
	32	+ fallthrough; \
33	33	case 10: ptr[10] = read_debug(reg, 10); \
34		− /* Fall through */ \
	34	+ fallthrough; \
35	35	case 9: ptr[9] = read_debug(reg, 9); \
36		− /* Fall through */ \
	36	+ fallthrough; \
37	37	case 8: ptr[8] = read_debug(reg, 8); \
38		− /* Fall through */ \
	38	+ fallthrough; \
39	39	case 7: ptr[7] = read_debug(reg, 7); \
40		− /* Fall through */ \
	40	+ fallthrough; \
41	41	case 6: ptr[6] = read_debug(reg, 6); \
42		− /* Fall through */ \
	42	+ fallthrough; \
43	43	case 5: ptr[5] = read_debug(reg, 5); \
44		− /* Fall through */ \
	44	+ fallthrough; \
45	45	case 4: ptr[4] = read_debug(reg, 4); \
46		− /* Fall through */ \
	46	+ fallthrough; \
47	47	case 3: ptr[3] = read_debug(reg, 3); \
48		− /* Fall through */ \
	48	+ fallthrough; \
49	49	case 2: ptr[2] = read_debug(reg, 2); \
50		− /* Fall through */ \
	50	+ fallthrough; \
51	51	case 1: ptr[1] = read_debug(reg, 1); \
52		− /* Fall through */ \
	52	+ fallthrough; \
53	53	default: ptr[0] = read_debug(reg, 0); \
54	54	}
55	55
56	56	#define restore_debug(ptr,reg,nr) \
57	57	switch (nr) { \
58	58	case 15: write_debug(ptr[15], reg, 15); \
59		− /* Fall through */ \
	59	+ fallthrough; \
60	60	case 14: write_debug(ptr[14], reg, 14); \
61		− /* Fall through */ \
	61	+ fallthrough; \
62	62	case 13: write_debug(ptr[13], reg, 13); \
63		− /* Fall through */ \
	63	+ fallthrough; \
64	64	case 12: write_debug(ptr[12], reg, 12); \
65		− /* Fall through */ \
	65	+ fallthrough; \
66	66	case 11: write_debug(ptr[11], reg, 11); \
67		− /* Fall through */ \
	67	+ fallthrough; \
68	68	case 10: write_debug(ptr[10], reg, 10); \
69		− /* Fall through */ \
	69	+ fallthrough; \
70	70	case 9: write_debug(ptr[9], reg, 9); \
71		− /* Fall through */ \
	71	+ fallthrough; \
72	72	case 8: write_debug(ptr[8], reg, 8); \
73		− /* Fall through */ \
	73	+ fallthrough; \
74	74	case 7: write_debug(ptr[7], reg, 7); \
75		− /* Fall through */ \
	75	+ fallthrough; \
76	76	case 6: write_debug(ptr[6], reg, 6); \
77		− /* Fall through */ \
	77	+ fallthrough; \
78	78	case 5: write_debug(ptr[5], reg, 5); \
79		− /* Fall through */ \
	79	+ fallthrough; \
80	80	case 4: write_debug(ptr[4], reg, 4); \
81		− /* Fall through */ \
	81	+ fallthrough; \
82	82	case 3: write_debug(ptr[3], reg, 3); \
83		− /* Fall through */ \
	83	+ fallthrough; \
84	84	case 2: write_debug(ptr[2], reg, 2); \
85		− /* Fall through */ \
	85	+ fallthrough; \
86	86	case 1: write_debug(ptr[1], reg, 1); \
87		− /* Fall through */ \
	87	+ fallthrough; \
88	88	default: write_debug(ptr[0], reg, 0); \
89	89	}
90	90

arch/arm64/kvm/hyp/include/hyp/switch.h+35−4

@@ -17,6 +17,7 @@ · 16 unmodified lines
17	17
18	18	#include <asm/barrier.h>
19	19	#include <asm/cpufeature.h>
	20	+#include <asm/extable.h>
20	21	#include <asm/kprobes.h>
21	22	#include <asm/kvm_asm.h>
22	23	#include <asm/kvm_emulate.h>
@@ -29,6 +30,9 @@ · 6 unmodified lines
29	30
30	31	extern const char __hyp_panic_string[];
31	32
	33	+extern struct exception_table_entry __start___kvm_ex_table;
	34	+extern struct exception_table_entry __stop___kvm_ex_table;
	35	+
32	36	/* Check whether the FP regs were dirtied while in the host-side run loop: */
33	37	static inline bool update_fp_enabled(struct kvm_vcpu *vcpu)
34	38	{
@@ -142,10 +146,10 @@ static inline bool __translate_far_to_hpfar(u64 far, u64 *hpfar) · 107 unmodified lines
142	146	* saved the guest context yet, and we may return early...
143	147	*/
144	148	par = read_sysreg(par_el1);
145		− asm volatile("at s1e1r, %0" : : "r" (far));
146		− isb();
147		−
148		− tmp = read_sysreg(par_el1);
	149	+ if (!__kvm_at("s1e1r", far))
	150	+ tmp = read_sysreg(par_el1);
	151	+ else
	152	+ tmp = SYS_PAR_EL1_F; /* back to the guest */
149	153	write_sysreg(par, par_el1);
150	154
151	155	if (unlikely(tmp & SYS_PAR_EL1_F))
@@ -508,4 +512,31 @@ static inline void __set_host_arch_workaround_state(struct kvm_vcpu *vcpu) · 356 unmodified lines
508	512	#endif
509	513	}
510	514
	515	+static inline void __kvm_unexpected_el2_exception(void)
	516	+{
	517	+ unsigned long addr, fixup;
	518	+ struct kvm_cpu_context *host_ctxt;
	519	+ struct exception_table_entry entry, end;
	520	+ unsigned long elr_el2 = read_sysreg(elr_el2);
	521	+
	522	+ entry = hyp_symbol_addr(__start___kvm_ex_table);
	523	+ end = hyp_symbol_addr(__stop___kvm_ex_table);
	524	+ host_ctxt = &__hyp_this_cpu_ptr(kvm_host_data)->host_ctxt;
	525	+
	526	+ while (entry < end) {
	527	+ addr = (unsigned long)&entry->insn + entry->insn;
	528	+ fixup = (unsigned long)&entry->fixup + entry->fixup;
	529	+
	530	+ if (addr != elr_el2) {
	531	+ entry++;
	532	+ continue;
	533	+ }
	534	+
	535	+ write_sysreg(fixup, elr_el2);
	536	+ return;
	537	+ }
	538	+
	539	+ hyp_panic(host_ctxt);
	540	+}
	541	+
511	542	#endif /* __ARM64_KVM_HYP_SWITCH_H__ */

arch/arm64/kvm/hyp/nvhe/switch.c+5−0

@@ -270,3 +270,8 @@ void __noreturn hyp_panic(struct kvm_cpu_context *host_ctxt) · 269 unmodified lines
270	270	read_sysreg(hpfar_el2), par, vcpu);
271	271	unreachable();
272	272	}
	273	+
	274	+asmlinkage void kvm_unexpected_el2_exception(void)
	275	+{
	276	+ return __kvm_unexpected_el2_exception();
	277	+}

arch/arm64/kvm/hyp/vgic-v3-sr.c+8−8

@@ -340,10 +340,10 @@ void __vgic_v3_save_aprs(struct vgic_v3_cpu_if *cpu_if) · 339 unmodified lines
340	340	case 7:
341	341	cpu_if->vgic_ap0r[3] = __vgic_v3_read_ap0rn(3);
342	342	cpu_if->vgic_ap0r[2] = __vgic_v3_read_ap0rn(2);
343		− /* Fall through */
	343	+ fallthrough;
344	344	case 6:
345	345	cpu_if->vgic_ap0r[1] = __vgic_v3_read_ap0rn(1);
346		− /* Fall through */
	346	+ fallthrough;
347	347	default:
348	348	cpu_if->vgic_ap0r[0] = __vgic_v3_read_ap0rn(0);
349	349	}
@@ -352,10 +352,10 @@ void __vgic_v3_save_aprs(struct vgic_v3_cpu_if *cpu_if) · 2 unmodified lines
352	352	case 7:
353	353	cpu_if->vgic_ap1r[3] = __vgic_v3_read_ap1rn(3);
354	354	cpu_if->vgic_ap1r[2] = __vgic_v3_read_ap1rn(2);
355		− /* Fall through */
	355	+ fallthrough;
356	356	case 6:
357	357	cpu_if->vgic_ap1r[1] = __vgic_v3_read_ap1rn(1);
358		− /* Fall through */
	358	+ fallthrough;
359	359	default:
360	360	cpu_if->vgic_ap1r[0] = __vgic_v3_read_ap1rn(0);
361	361	}
@@ -373,10 +373,10 @@ void __vgic_v3_restore_aprs(struct vgic_v3_cpu_if *cpu_if) · 11 unmodified lines
373	373	case 7:
374	374	__vgic_v3_write_ap0rn(cpu_if->vgic_ap0r[3], 3);
375	375	__vgic_v3_write_ap0rn(cpu_if->vgic_ap0r[2], 2);
376		− /* Fall through */
	376	+ fallthrough;
377	377	case 6:
378	378	__vgic_v3_write_ap0rn(cpu_if->vgic_ap0r[1], 1);
379		− /* Fall through */
	379	+ fallthrough;
380	380	default:
381	381	__vgic_v3_write_ap0rn(cpu_if->vgic_ap0r[0], 0);
382	382	}
@@ -385,10 +385,10 @@ void __vgic_v3_restore_aprs(struct vgic_v3_cpu_if *cpu_if) · 2 unmodified lines
385	385	case 7:
386	386	__vgic_v3_write_ap1rn(cpu_if->vgic_ap1r[3], 3);
387	387	__vgic_v3_write_ap1rn(cpu_if->vgic_ap1r[2], 2);
388		− /* Fall through */
	388	+ fallthrough;
389	389	case 6:
390	390	__vgic_v3_write_ap1rn(cpu_if->vgic_ap1r[1], 1);
391		− /* Fall through */
	391	+ fallthrough;
392	392	default:
393	393	__vgic_v3_write_ap1rn(cpu_if->vgic_ap1r[0], 0);
394	394	}

arch/arm64/kvm/hyp/vhe/switch.c+5−0

@@ -217,3 +217,8 @@ void __noreturn hyp_panic(struct kvm_cpu_context *host_ctxt) · 216 unmodified lines
217	217	__hyp_call_panic(spsr, elr, par, host_ctxt);
218	218	unreachable();
219	219	}
	220	+
	221	+asmlinkage void kvm_unexpected_el2_exception(void)
	222	+{
	223	+ return __kvm_unexpected_el2_exception();
	224	+}

arch/arm64/mm/context.c+1−1

@@ -45,7 +45,7 @@ static u32 get_cpu_asid_bits(void) · 44 unmodified lines
45	45	default:
46	46	pr_warn("CPU%d: Unknown ASID size (%d); assuming 8-bit\n",
47	47	smp_processor_id(), fld);
48		− /* Fallthrough */
	48	+ fallthrough;
49	49	case 0:
50	50	asid = 8;
51	51	break;

arch/c6x/kernel/signal.c+2−2

@@ -220,7 +220,7 @@ handle_restart(struct pt_regs regs, struct k_sigaction ka, int has_handler) · 219 unmodified lines
220	220	regs->a4 = -EINTR;
221	221	break;
222	222	}
223		− /* fallthrough */
	223	+ fallthrough;
224	224	case -ERESTARTNOINTR:
225	225	do_restart:
226	226	regs->a4 = regs->orig_a4;
@@ -252,7 +252,7 @@ static void handle_signal(struct ksignal ksig, struct pt_regs regs, · 25 unmodified lines
252	252	break;
253	253	}
254	254
255		− /* fallthrough */
	255	+ fallthrough;
256	256	case -ERESTARTNOINTR:
257	257	regs->a4 = regs->orig_a4;
258	258	regs->pc -= 4;

arch/csky/kernel/signal.c+1−1

@@ -194,7 +194,7 @@ static void handle_signal(struct ksignal ksig, struct pt_regs regs) · 193 unmodified lines
194	194	regs->a0 = -EINTR;
195	195	break;
196	196	}
197		− /* fallthrough */
	197	+ fallthrough;
198	198	case -ERESTARTNOINTR:
199	199	regs->a0 = regs->orig_a0;
200	200	regs->pc -= TRAP0_SIZE;

arch/h8300/kernel/signal.c+1−1

@@ -227,7 +227,7 @@ handle_restart(struct pt_regs regs, struct k_sigaction ka) · 226 unmodified lines
227	227	regs->er0 = -EINTR;
228	228	break;
229	229	}
230		− /* fallthrough */
	230	+ fallthrough;
231	231	case -ERESTARTNOINTR:
232	232	do_restart:
233	233	regs->er0 = regs->orig_er0;

arch/hexagon/kernel/module.c+1−1

@@ -120,7 +120,7 @@ int apply_relocate_add(Elf_Shdr sechdrs, const char strtab, · 119 unmodified lines
120	120	}
121	121	case R_HEXAGON_HI16:
122	122	value = (value>>16) & 0xffff;
123		− /* fallthrough */
	123	+ fallthrough;
124	124	case R_HEXAGON_LO16:
125	125	*location &= ~0x00c03fff;
126	126	*location \|= value & 0x3fff;

arch/hexagon/kernel/signal.c+1−1

@@ -155,7 +155,7 @@ static void handle_signal(struct ksignal ksig, struct pt_regs regs) · 154 unmodified lines
155	155	regs->r00 = -EINTR;
156	156	break;
157	157	}
158		− /* Fall through */
	158	+ fallthrough;
159	159	case -ERESTARTNOINTR:
160	160	regs->r06 = regs->syscall_nr;
161	161	pt_set_elr(regs, pt_elr(regs) - 4);

arch/ia64/kernel/crash.c+1−1

@@ -163,7 +163,7 @@ kdump_init_notifier(struct notifier_block self, unsigned long val, void data) · 162 unmodified lines
163	163	case DIE_INIT_MONARCH_LEAVE:
164	164	if (!kdump_freeze_monarch)
165	165	break;
166		− /* fall through */
	166	+ fallthrough;
167	167	case DIE_INIT_SLAVE_LEAVE:
168	168	case DIE_INIT_MONARCH_ENTER:
169	169	case DIE_MCA_RENDZVOUS_LEAVE:

arch/ia64/kernel/ia64_ksyms.c+1−1

@@ -3,7 +3,7 @@ · 2 unmodified lines
3	3	* Architecture-specific kernel symbols
4	4	*/
5	5
6		−#ifdef CONFIG_VIRTUAL_MEM_MAP
	6	+#if defined(CONFIG_VIRTUAL_MEM_MAP) \|\| defined(CONFIG_DISCONTIGMEM)
7	7	#include <linux/compiler.h>
8	8	#include <linux/export.h>
9	9	#include <linux/memblock.h>

arch/ia64/kernel/module.c+1−1

@@ -654,7 +654,7 @@ do_reloc (struct module mod, uint8_t r_type, Elf64_Sym sym, uint64_t addend, · 653 unmodified lines
654	654	}
655	655	} else if (!is_internal(mod, val))
656	656	val = get_plt(mod, location, val, &ok);
657		− /* FALL THROUGH */
	657	+ fallthrough;
658	658	default:
659	659	val -= bundle(location);
660	660	break;

arch/ia64/kernel/perfmon.c+1−1

@@ -3472,7 +3472,7 @@ pfm_restart(pfm_context_t ctx, void arg, int count, struct pt_regs *regs) · 3471 unmodified lines
3472	3472	break;
3473	3473	case PFM_CTX_LOADED:
3474	3474	if (CTX_HAS_SMPL(ctx) && fmt->fmt_restart_active) break;
3475		− /* fall through */
	3475	+ fallthrough;
3476	3476	case PFM_CTX_UNLOADED:
3477	3477	case PFM_CTX_ZOMBIE:
3478	3478	DPRINT(("invalid state=%d\n", state));

arch/ia64/kernel/signal.c+1−1

@@ -374,7 +374,7 @@ ia64_do_signal (struct sigscratch *scr, long in_syscall) · 373 unmodified lines
374	374	/* note: scr->pt.r10 is already -1 */
375	375	break;
376	376	}
377		− /FALLTHRU/
	377	+ fallthrough;
378	378	case ERESTARTNOINTR:
379	379	ia64_decrement_ip(&scr->pt);
380	380	restart = 0; /* don't restart twice if handle_signal() fails... */

arch/ia64/kernel/unaligned.c+3−3

@@ -1431,7 +1431,7 @@ ia64_handle_unaligned (unsigned long ifa, struct pt_regs *regs) · 1430 unmodified lines
1431	1431	if (u.insn.x)
1432	1432	/* oops, really a semaphore op (cmpxchg, etc) */
1433	1433	goto failure;
1434		− /FALLTHRU/
	1434	+ fallthrough;
1435	1435	case LDS_IMM_OP:
1436	1436	case LDSA_IMM_OP:
1437	1437	case LDFS_OP:
@@ -1459,7 +1459,7 @@ ia64_handle_unaligned (unsigned long ifa, struct pt_regs *regs) · 21 unmodified lines
1459	1459	if (u.insn.x)
1460	1460	/* oops, really a semaphore op (cmpxchg, etc) */
1461	1461	goto failure;
1462		− /FALLTHRU/
	1462	+ fallthrough;
1463	1463	case LD_IMM_OP:
1464	1464	case LDA_IMM_OP:
1465	1465	case LDBIAS_IMM_OP:
@@ -1475,7 +1475,7 @@ ia64_handle_unaligned (unsigned long ifa, struct pt_regs *regs) · 9 unmodified lines
1475	1475	if (u.insn.x)
1476	1476	/* oops, really a semaphore op (cmpxchg, etc) */
1477	1477	goto failure;
1478		− /FALLTHRU/
	1478	+ fallthrough;
1479	1479	case ST_IMM_OP:
1480	1480	case STREL_IMM_OP:
1481	1481	ret = emulate_store_int(ifa, u.insn, regs);

arch/ia64/kernel/unwind.c+1−1

@@ -324,7 +324,7 @@ unw_access_gr (struct unw_frame_info info, int regnum, unsigned long val, char · 323 unmodified lines
324	324	return 0;
325	325	}
326	326	}
327		− /* fall through */
	327	+ fallthrough;
328	328	case UNW_NAT_NONE:
329	329	dummy_nat = 0;
330	330	nat_addr = &dummy_nat;

arch/m68k/atari/atakeyb.c+1−1

@@ -207,7 +207,7 @@ repeat: · 206 unmodified lines
207	207	self_test_last_rcv = jiffies;
208	208	break;
209	209	}
210		− /* FALL THROUGH */
	210	+ fallthrough;
211	211
212	212	default:
213	213	break_flag = scancode & BREAK_MASK;

arch/m68k/kernel/signal.c+1−1

@@ -1067,7 +1067,7 @@ handle_restart(struct pt_regs regs, struct k_sigaction ka, int has_handler) · 1066 unmodified lines
1067	1067	regs->d0 = -EINTR;
1068	1068	break;
1069	1069	}
1070		− /* fallthrough */
	1070	+ fallthrough;
1071	1071	case -ERESTARTNOINTR:
1072	1072	do_restart:
1073	1073	regs->d0 = regs->orig_d0;

arch/m68k/mac/config.c+1−1

@@ -1018,7 +1018,7 @@ int __init mac_platform_init(void) · 1017 unmodified lines
1018	1018	*/
1019	1019	platform_device_register_simple("mac_scsi", 1,
1020	1020	mac_scsi_duo_rsrc, ARRAY_SIZE(mac_scsi_duo_rsrc));
1021		− /* fall through */
	1021	+ fallthrough;
1022	1022	case MAC_SCSI_OLD:
1023	1023	/* Addresses from Developer Notes for Duo System,
1024	1024	* PowerBook 180 & 160, 140 & 170, Macintosh IIsi

arch/m68k/mac/via.c+1−1

@@ -370,7 +370,7 @@ void via_nubus_irq_startup(int irq) · 369 unmodified lines
370	370	/* Allow NuBus slots 9 through F. */
371	371	via2[vDirA] &= 0x80 \| ~(1 << irq_idx);
372	372	}
373		− /* fall through */
	373	+ fallthrough;
374	374	case MAC_VIA_IICI:
375	375	via_irq_enable(irq);
376	376	break;

arch/m68k/mm/fault.c+1−1

@@ -118,7 +118,7 @@ good_area: · 117 unmodified lines
118	118	pr_debug("do_page_fault: good_area\n");
119	119	switch (error_code & 3) {
120	120	default: /* 3: write, present */
121		− /* fall through */
	121	+ fallthrough;
122	122	case 2: /* write, not present */
123	123	if (!(vma->vm_flags & VM_WRITE))
124	124	goto acc_err;

arch/microblaze/kernel/signal.c+1−1

@@ -249,7 +249,7 @@ handle_restart(struct pt_regs regs, struct k_sigaction ka, int has_handler) · 248 unmodified lines
249	249	regs->r3 = -EINTR;
250	250	break;
251	251	}
252		− /* fallthrough */
	252	+ fallthrough;
253	253	case -ERESTARTNOINTR:
254	254	do_restart:
255	255	/* offset of 4 bytes to re-execute trap (brki) instruction */

arch/microblaze/mm/init.c+3−0

@@ -46,6 +46,9 @@ unsigned long memory_size; · 45 unmodified lines
46	46	EXPORT_SYMBOL(memory_size);
47	47	unsigned long lowmem_size;
48	48
	49	+EXPORT_SYMBOL(min_low_pfn);
	50	+EXPORT_SYMBOL(max_low_pfn);
	51	+
49	52	#ifdef CONFIG_HIGHMEM
50	53	pte_t *kmap_pte;
51	54	EXPORT_SYMBOL(kmap_pte);

arch/mips/include/asm/irqflags.h+5−0

@@ -137,6 +137,11 @@ static inline int arch_irqs_disabled_flags(unsigned long flags) · 136 unmodified lines
137	137	return !(flags & 1);
138	138	}
139	139
	140	+static inline int arch_irqs_disabled(void)
	141	+{
	142	+ return arch_irqs_disabled_flags(arch_local_save_flags());
	143	+}
	144	+
140	145	#endif /* #ifndef __ASSEMBLY__ */
141	146
142	147	/*

arch/mips/include/asm/mach-loongson64/cpu-feature-overrides.h+0−2

@@ -26,7 +26,6 @@ · 25 unmodified lines
26	26	#define cpu_has_counter 1
27	27	#define cpu_has_dc_aliases (PAGE_SIZE < 0x4000)
28	28	#define cpu_has_divec 0
29		−#define cpu_has_ejtag 0
30	29	#define cpu_has_inclusive_pcaches 1
31	30	#define cpu_has_llsc 1
32	31	#define cpu_has_mcheck 0
@@ -42,7 +41,6 @@ · 9 unmodified lines
42	41	#define cpu_has_veic 0
43	42	#define cpu_has_vint 0
44	43	#define cpu_has_vtag_icache 0
45		−#define cpu_has_watch 1
46	44	#define cpu_has_wsbh 1
47	45	#define cpu_has_ic_fills_f_dc 1
48	46	#define cpu_hwrena_impl_bits 0xc0000000

arch/mips/include/asm/mach-loongson64/irq.h+0−2

@@ -2,8 +2,6 @@ · 1 unmodified line
2	2	#ifndef __ASM_MACH_LOONGSON64_IRQ_H_
3	3	#define __ASM_MACH_LOONGSON64_IRQ_H_
4	4
5		−#include <boot_param.h>
6		−
7	5	/* cpu core interrupt numbers */
8	6	#define NR_IRQS_LEGACY 16
9	7	#define NR_MIPS_CPU_IRQS 8

arch/mips/include/asm/mach-loongson64/mmzone.h+0−1

@@ -9,7 +9,6 @@ · 8 unmodified lines
9	9	#ifndef _ASM_MACH_LOONGSON64_MMZONE_H
10	10	#define _ASM_MACH_LOONGSON64_MMZONE_H
11	11
12		−#include <boot_param.h>
13	12	#define NODE_ADDRSPACE_SHIFT 44
14	13	#define NODE0_ADDRSPACE_OFFSET 0x000000000000UL
15	14	#define NODE1_ADDRSPACE_OFFSET 0x100000000000UL

arch/mips/include/asm/unroll.h+32−32

@@ -28,38 +28,38 @@ · 27 unmodified lines
28	28	BUILD_BUG_ON(!__builtin_constant_p(times)); \
29	29	\
30	30	switch (times) { \
31		− case 32: fn(__VA_ARGS__); /* fall through */ \
32		− case 31: fn(__VA_ARGS__); /* fall through */ \
33		− case 30: fn(__VA_ARGS__); /* fall through */ \
34		− case 29: fn(__VA_ARGS__); /* fall through */ \
35		− case 28: fn(__VA_ARGS__); /* fall through */ \
36		− case 27: fn(__VA_ARGS__); /* fall through */ \
37		− case 26: fn(__VA_ARGS__); /* fall through */ \
38		− case 25: fn(__VA_ARGS__); /* fall through */ \
39		− case 24: fn(__VA_ARGS__); /* fall through */ \
40		− case 23: fn(__VA_ARGS__); /* fall through */ \
41		− case 22: fn(__VA_ARGS__); /* fall through */ \
42		− case 21: fn(__VA_ARGS__); /* fall through */ \
43		− case 20: fn(__VA_ARGS__); /* fall through */ \
44		− case 19: fn(__VA_ARGS__); /* fall through */ \
45		− case 18: fn(__VA_ARGS__); /* fall through */ \
46		− case 17: fn(__VA_ARGS__); /* fall through */ \
47		− case 16: fn(__VA_ARGS__); /* fall through */ \
48		− case 15: fn(__VA_ARGS__); /* fall through */ \
49		− case 14: fn(__VA_ARGS__); /* fall through */ \
50		− case 13: fn(__VA_ARGS__); /* fall through */ \
51		− case 12: fn(__VA_ARGS__); /* fall through */ \
52		− case 11: fn(__VA_ARGS__); /* fall through */ \
53		− case 10: fn(__VA_ARGS__); /* fall through */ \
54		− case 9: fn(__VA_ARGS__); /* fall through */ \
55		− case 8: fn(__VA_ARGS__); /* fall through */ \
56		− case 7: fn(__VA_ARGS__); /* fall through */ \
57		− case 6: fn(__VA_ARGS__); /* fall through */ \
58		− case 5: fn(__VA_ARGS__); /* fall through */ \
59		− case 4: fn(__VA_ARGS__); /* fall through */ \
60		− case 3: fn(__VA_ARGS__); /* fall through */ \
61		− case 2: fn(__VA_ARGS__); /* fall through */ \
62		− case 1: fn(__VA_ARGS__); /* fall through */ \
	31	+ case 32: fn(__VA_ARGS__); fallthrough; \
	32	+ case 31: fn(__VA_ARGS__); fallthrough; \
	33	+ case 30: fn(__VA_ARGS__); fallthrough; \
	34	+ case 29: fn(__VA_ARGS__); fallthrough; \
	35	+ case 28: fn(__VA_ARGS__); fallthrough; \
	36	+ case 27: fn(__VA_ARGS__); fallthrough; \
	37	+ case 26: fn(__VA_ARGS__); fallthrough; \
	38	+ case 25: fn(__VA_ARGS__); fallthrough; \
	39	+ case 24: fn(__VA_ARGS__); fallthrough; \
	40	+ case 23: fn(__VA_ARGS__); fallthrough; \
	41	+ case 22: fn(__VA_ARGS__); fallthrough; \
	42	+ case 21: fn(__VA_ARGS__); fallthrough; \
	43	+ case 20: fn(__VA_ARGS__); fallthrough; \
	44	+ case 19: fn(__VA_ARGS__); fallthrough; \
	45	+ case 18: fn(__VA_ARGS__); fallthrough; \
	46	+ case 17: fn(__VA_ARGS__); fallthrough; \
	47	+ case 16: fn(__VA_ARGS__); fallthrough; \
	48	+ case 15: fn(__VA_ARGS__); fallthrough; \
	49	+ case 14: fn(__VA_ARGS__); fallthrough; \
	50	+ case 13: fn(__VA_ARGS__); fallthrough; \
	51	+ case 12: fn(__VA_ARGS__); fallthrough; \
	52	+ case 11: fn(__VA_ARGS__); fallthrough; \
	53	+ case 10: fn(__VA_ARGS__); fallthrough; \
	54	+ case 9: fn(__VA_ARGS__); fallthrough; \
	55	+ case 8: fn(__VA_ARGS__); fallthrough; \
	56	+ case 7: fn(__VA_ARGS__); fallthrough; \
	57	+ case 6: fn(__VA_ARGS__); fallthrough; \
	58	+ case 5: fn(__VA_ARGS__); fallthrough; \
	59	+ case 4: fn(__VA_ARGS__); fallthrough; \
	60	+ case 3: fn(__VA_ARGS__); fallthrough; \
	61	+ case 2: fn(__VA_ARGS__); fallthrough; \
	62	+ case 1: fn(__VA_ARGS__); fallthrough; \
63	63	case 0: break; \
64	64	\
65	65	default: \

arch/mips/kernel/perf_event_mipsxx.c+2−2

@@ -1898,8 +1898,8 @@ static const struct mips_perf_event *mipsxx_pmu_map_raw_event(u64 config) · 1897 unmodified lines
1898	1898	(base_id >= 64 && base_id < 90) \|\|
1899	1899	(base_id >= 128 && base_id < 164) \|\|
1900	1900	(base_id >= 192 && base_id < 200) \|\|
1901		− (base_id >= 256 && base_id < 274) \|\|
1902		− (base_id >= 320 && base_id < 358) \|\|
	1901	+ (base_id >= 256 && base_id < 275) \|\|
	1902	+ (base_id >= 320 && base_id < 361) \|\|
1903	1903	(base_id >= 384 && base_id < 574))
1904	1904	break;
1905	1905

arch/mips/kernel/smp-bmips.c+2−0

@@ -239,6 +239,8 @@ static int bmips_boot_secondary(int cpu, struct task_struct *idle) · 238 unmodified lines
239	239	*/
240	240	static void bmips_init_secondary(void)
241	241	{
	242	+ bmips_cpu_setup();
	243	+
242	244	switch (current_cpu_type()) {
243	245	case CPU_BMIPS4350:
244	246	case CPU_BMIPS4380:

arch/mips/kernel/traps.c+12−0

@@ -1287,6 +1287,18 @@ static int enable_restore_fp_context(int msa) · 1286 unmodified lines
1287	1287	err = own_fpu_inatomic(1);
1288	1288	if (msa && !err) {
1289	1289	enable_msa();
	1290	+ /*
	1291	+ * with MSA enabled, userspace can see MSACSR
	1292	+ * and MSA regs, but the values in them are from
	1293	+ * other task before current task, restore them
	1294	+ * from saved fp/msa context
	1295	+ */
	1296	+ write_msa_csr(current->thread.fpu.msacsr);
	1297	+ /*
	1298	+ * own_fpu_inatomic(1) just restore low 64bit,
	1299	+ * fix the high 64bit
	1300	+ */
	1301	+ init_msa_upper();
1290	1302	set_thread_flag(TIF_USEDMSA);
1291	1303	set_thread_flag(TIF_MSA_CTX_LIVE);
1292	1304	}

arch/mips/mm/c-r4k.c+4−0

@@ -1712,7 +1712,11 @@ static void setup_scache(void) · 1711 unmodified lines
1712	1712	printk("MIPS secondary cache %ldkB, %s, linesize %d bytes.\n",
1713	1713	scache_size >> 10,
1714	1714	way_string[c->scache.ways], c->scache.linesz);
	1715	+
	1716	+ if (current_cpu_type() == CPU_BMIPS5000)
	1717	+ c->options \|= MIPS_CPU_INCLUSIVE_CACHES;
1715	1718	}
	1719	+
1716	1720	#else
1717	1721	if (!(c->scache.flags & MIPS_CACHE_NOT_PRESENT))
1718	1722	panic("Dunno how to handle MIPS32 / MIPS64 second level cache");

arch/mips/oprofile/op_model_mipsxx.c+3−1

@@ -245,7 +245,6 @@ static int mipsxx_perfcount_handler(void) · 244 unmodified lines
245	245
246	246	switch (counters) {
247	247	#define HANDLE_COUNTER(n) \
248		− fallthrough; \
249	248	case n + 1: \
250	249	control = r_c0_perfctrl ## n(); \
251	250	counter = r_c0_perfcntr ## n(); \
@@ -256,8 +255,11 @@ static int mipsxx_perfcount_handler(void) · 4 unmodified lines
256	255	handled = IRQ_HANDLED; \
257	256	}
258	257	HANDLE_COUNTER(3)
	258	+ fallthrough;
259	259	HANDLE_COUNTER(2)
	260	+ fallthrough;
260	261	HANDLE_COUNTER(1)
	262	+ fallthrough;
261	263	HANDLE_COUNTER(0)
262	264	}
263	265

arch/mips/sni/a20r.c+2−2

@@ -222,8 +222,8 @@ void __init sni_a20r_irq_init(void) · 221 unmodified lines
222	222	irq_set_chip_and_handler(i, &a20r_irq_type, handle_level_irq);
223	223	sni_hwint = a20r_hwint;
224	224	change_c0_status(ST0_IM, IE_IRQ0);
225		− if (request_irq(SNI_A20R_IRQ_BASE + 3, sni_isa_irq_handler, 0, "ISA",
226		− NULL))
	225	+ if (request_irq(SNI_A20R_IRQ_BASE + 3, sni_isa_irq_handler,
	226	+ IRQF_SHARED, "ISA", sni_isa_irq_handler))
227	227	pr_err("Failed to register ISA interrupt\n");
228	228	}
229	229

arch/nds32/include/asm/irqflags.h+5−0

@@ -34,3 +34,8 @@ static inline int arch_irqs_disabled_flags(unsigned long flags) · 33 unmodified lines
34	34	{
35	35	return !flags;
36	36	}
	37	+
	38	+static inline int arch_irqs_disabled(void)
	39	+{
	40	+ return arch_irqs_disabled_flags(arch_local_save_flags());
	41	+}

arch/nds32/kernel/fpu.c+6−6

@@ -45,7 +45,7 @@ void save_fpu(struct task_struct *tsk) · 44 unmodified lines
45	45	: /* no output */
46	46	: "r" (&tsk->thread.fpu)
47	47	: "memory");
48		− /* fall through */
	48	+ fallthrough;
49	49	case SP32_DP16_reg:
50	50	asm volatile ("fsdi $fd15, [%0+0x78]\n\t"
51	51	"fsdi $fd14, [%0+0x70]\n\t"
@@ -58,7 +58,7 @@ void save_fpu(struct task_struct *tsk) · 6 unmodified lines
58	58	: /* no output */
59	59	: "r" (&tsk->thread.fpu)
60	60	: "memory");
61		− /* fall through */
	61	+ fallthrough;
62	62	case SP16_DP8_reg:
63	63	asm volatile ("fsdi $fd7, [%0+0x38]\n\t"
64	64	"fsdi $fd6, [%0+0x30]\n\t"
@@ -67,7 +67,7 @@ void save_fpu(struct task_struct *tsk) · 2 unmodified lines
67	67	: /* no output */
68	68	: "r" (&tsk->thread.fpu)
69	69	: "memory");
70		− /* fall through */
	70	+ fallthrough;
71	71	case SP8_DP4_reg:
72	72	asm volatile ("fsdi $fd3, [%1+0x18]\n\t"
73	73	"fsdi $fd2, [%1+0x10]\n\t"
@@ -108,7 +108,7 @@ void load_fpu(const struct fpu_struct *fpregs) · 34 unmodified lines
108	108	"fldi $fd16, [%0+0x80]\n\t"
109	109	: /* no output */
110	110	: "r" (fpregs));
111		− /* fall through */
	111	+ fallthrough;
112	112	case SP32_DP16_reg:
113	113	asm volatile ("fldi $fd15, [%0+0x78]\n\t"
114	114	"fldi $fd14, [%0+0x70]\n\t"
@@ -120,7 +120,7 @@ void load_fpu(const struct fpu_struct *fpregs) · 5 unmodified lines
120	120	"fldi $fd8, [%0+0x40]\n\t"
121	121	: /* no output */
122	122	: "r" (fpregs));
123		− /* fall through */
	123	+ fallthrough;
124	124	case SP16_DP8_reg:
125	125	asm volatile ("fldi $fd7, [%0+0x38]\n\t"
126	126	"fldi $fd6, [%0+0x30]\n\t"
@@ -128,7 +128,7 @@ void load_fpu(const struct fpu_struct *fpregs) · 1 unmodified line
128	128	"fldi $fd4, [%0+0x20]\n\t"
129	129	: /* no output */
130	130	: "r" (fpregs));
131		− /* fall through */
	131	+ fallthrough;
132	132	case SP8_DP4_reg:
133	133	asm volatile ("fldi $fd3, [%1+0x18]\n\t"
134	134	"fldi $fd2, [%1+0x10]\n\t"

arch/nds32/kernel/signal.c+2−2

@@ -316,7 +316,7 @@ static void handle_signal(struct ksignal ksig, struct pt_regs regs) · 315 unmodified lines
316	316	regs->uregs[0] = -EINTR;
317	317	break;
318	318	}
319		− /* Else, fall through */
	319	+ fallthrough;
320	320	case -ERESTARTNOINTR:
321	321	regs->uregs[0] = regs->orig_r0;
322	322	regs->ipc -= 4;
@@ -361,7 +361,7 @@ static void do_signal(struct pt_regs *regs) · 38 unmodified lines
361	361	switch (regs->uregs[0]) {
362	362	case -ERESTART_RESTARTBLOCK:
363	363	regs->uregs[15] = __NR_restart_syscall;
364		− /* Fall through */
	364	+ fallthrough;
365	365	case -ERESTARTNOHAND:
366	366	case -ERESTARTSYS:
367	367	case -ERESTARTNOINTR:

arch/openrisc/kernel/signal.c+1−1

@@ -244,7 +244,7 @@ int do_signal(struct pt_regs *regs, int syscall) · 243 unmodified lines
244	244	switch (retval) {
245	245	case -ERESTART_RESTARTBLOCK:
246	246	restart = -2;
247		− /* Fall through */
	247	+ fallthrough;
248	248	case -ERESTARTNOHAND:
249	249	case -ERESTARTSYS:
250	250	case -ERESTARTNOINTR:

arch/parisc/kernel/signal.c+1−1

@@ -502,7 +502,7 @@ syscall_restart(struct pt_regs regs, struct k_sigaction ka) · 501 unmodified lines
502	502	regs->gr[28] = -EINTR;
503	503	break;
504	504	}
505		− /* fallthrough */
	505	+ fallthrough;
506	506	case -ERESTARTNOINTR:
507	507	check_syscallno_in_delay_branch(regs);
508	508	break;

arch/parisc/kernel/traps.c+5−6

@@ -437,7 +437,6 @@ void parisc_terminate(char msg, struct pt_regs regs, int code, unsigned long o · 436 unmodified lines
437	437	break;
438	438
439	439	default:
440		− /* Fall through */
441	440	break;
442	441
443	442	}
@@ -644,12 +643,12 @@ void notrace handle_interruption(int code, struct pt_regs *regs) · 200 unmodified lines
644	643
645	644	case 15:
646	645	/* Data TLB miss fault/Data page fault */
647		− /* Fall through */
	646	+ fallthrough;
648	647	case 16:
649	648	/* Non-access instruction TLB miss fault */
650	649	/* The instruction TLB entry needed for the target address of the FIC
651	650	is absent, and hardware can't find it, so we get to cleanup */
652		− /* Fall through */
	651	+ fallthrough;
653	652	case 17:
654	653	/* Non-access data TLB miss fault/Non-access data page fault */
655	654	/* FIXME:
@@ -673,7 +672,7 @@ void notrace handle_interruption(int code, struct pt_regs *regs) · 17 unmodified lines
673	672	handle_unaligned(regs);
674	673	return;
675	674	}
676		− /* Fall Through */
	675	+ fallthrough;
677	676	case 26:
678	677	/* PCXL: Data memory access rights trap */
679	678	fault_address = regs->ior;
@@ -683,7 +682,7 @@ void notrace handle_interruption(int code, struct pt_regs *regs) · 3 unmodified lines
683	682	case 19:
684	683	/* Data memory break trap */
685	684	regs->gr[0] \|= PSW_X; /* So we can single-step over the trap */
686		− /* fall thru */
	685	+ fallthrough;
687	686	case 21:
688	687	/* Page reference trap */
689	688	handle_gdb_break(regs, TRAP_HWBKPT);
@@ -730,7 +729,7 @@ void notrace handle_interruption(int code, struct pt_regs *regs) · 40 unmodified lines
730	729	}
731	730	mmap_read_unlock(current->mm);
732	731	}
733		− /* Fall Through */
	732	+ fallthrough;
734	733	case 27:
735	734	/* Data memory protection ID trap */
736	735	if (code == 27 && !user_mode(regs) &&

arch/parisc/mm/fault.c+2−2

@@ -67,7 +67,7 @@ parisc_acctyp(unsigned long code, unsigned int inst) · 66 unmodified lines
67	67	case 0x30000000: /* coproc2 */
68	68	if (bit22set(inst))
69	69	return VM_WRITE;
70		− /* fall through */
	70	+ fallthrough;
71	71
72	72	case 0x0: /* indexed/memory management */
73	73	if (bit22set(inst)) {
@@ -370,7 +370,7 @@ bad_area: · 296 unmodified lines
370	370	}
371	371
372	372	/* probably address is outside of mapped file */
373		− /* fall through */
	373	+ fallthrough;
374	374	case 17: /* NA data TLB miss / page fault */
375	375	case 18: /* Unaligned access - PCXS only */
376	376	signo = SIGBUS;

arch/powerpc/Kconfig+12−0

@@ -860,6 +860,18 @@ config PPC_SUBPAGE_PROT · 859 unmodified lines
860	860
861	861	If unsure, say N here.
862	862
	863	+config PPC_PROT_SAO_LPAR
	864	+ bool "Support PROT_SAO mappings in LPARs"
	865	+ depends on PPC_BOOK3S_64
	866	+ help
	867	+ This option adds support for PROT_SAO mappings from userspace
	868	+ inside LPARs on supported CPUs.
	869	+
	870	+ This may cause issues when performing guest migration from
	871	+ a CPU that supports SAO to one that does not.
	872	+
	873	+ If unsure, say N here.
	874	+
863	875	config PPC_COPRO_BASE
864	876	bool
865	877

arch/powerpc/include/asm/book3s/64/pgtable.h+3−5

@@ -20,13 +20,9 @@ · 19 unmodified lines
20	20	#define _PAGE_RW (_PAGE_READ \| _PAGE_WRITE)
21	21	#define _PAGE_RWX (_PAGE_READ \| _PAGE_WRITE \| _PAGE_EXEC)
22	22	#define _PAGE_PRIVILEGED 0x00008 /* kernel access only */
23		−
24		−#define _PAGE_CACHE_CTL 0x00030 /* Bits for the folowing cache modes */
25		− /* No bits set is normal cacheable memory */
26		− /* 0x00010 unused, is SAO bit on radix POWER9 */
	23	+#define _PAGE_SAO 0x00010 /* Strong access order */
27	24	#define _PAGE_NON_IDEMPOTENT 0x00020 /* non idempotent memory */
28	25	#define _PAGE_TOLERANT 0x00030 /* tolerant memory, cache inhibited */
29		−
30	26	#define _PAGE_DIRTY 0x00080 /* C: page changed */
31	27	#define _PAGE_ACCESSED 0x00100 /* R: page referenced */
32	28	/*
@@ -828,6 +824,8 @@ static inline void __set_pte_at(struct mm_struct *mm, unsigned long addr, · 795 unmodified lines
828	824	return hash__set_pte_at(mm, addr, ptep, pte, percpu);
829	825	}
830	826
	827	+#define _PAGE_CACHE_CTL (_PAGE_SAO \| _PAGE_NON_IDEMPOTENT \| _PAGE_TOLERANT)
	828	+
831	829	#define pgprot_noncached pgprot_noncached
832	830	static inline pgprot_t pgprot_noncached(pgprot_t prot)
833	831	{

arch/powerpc/include/asm/cputable.h+5−5

@@ -196,7 +196,7 @@ static inline void cpu_feature_keys_init(void) { } · 195 unmodified lines
196	196	#define CPU_FTR_SPURR LONG_ASM_CONST(0x0000000001000000)
197	197	#define CPU_FTR_DSCR LONG_ASM_CONST(0x0000000002000000)
198	198	#define CPU_FTR_VSX LONG_ASM_CONST(0x0000000004000000)
199		−// Free LONG_ASM_CONST(0x0000000008000000)
	199	+#define CPU_FTR_SAO LONG_ASM_CONST(0x0000000008000000)
200	200	#define CPU_FTR_CP_USE_DCBTZ LONG_ASM_CONST(0x0000000010000000)
201	201	#define CPU_FTR_UNALIGNED_LD_STD LONG_ASM_CONST(0x0000000020000000)
202	202	#define CPU_FTR_ASYM_SMT LONG_ASM_CONST(0x0000000040000000)
@@ -441,7 +441,7 @@ static inline void cpu_feature_keys_init(void) { } · 238 unmodified lines
441	441	CPU_FTR_MMCRA \| CPU_FTR_SMT \| \
442	442	CPU_FTR_COHERENT_ICACHE \| \
443	443	CPU_FTR_PURR \| CPU_FTR_SPURR \| CPU_FTR_REAL_LE \| \
444		− CPU_FTR_DSCR \| CPU_FTR_ASYM_SMT \| \
	444	+ CPU_FTR_DSCR \| CPU_FTR_SAO \| CPU_FTR_ASYM_SMT \| \
445	445	CPU_FTR_STCX_CHECKS_ADDRESS \| CPU_FTR_POPCNTB \| CPU_FTR_POPCNTD \| \
446	446	CPU_FTR_CFAR \| CPU_FTR_HVMODE \| \
447	447	CPU_FTR_VMX_COPY \| CPU_FTR_HAS_PPR \| CPU_FTR_DABRX )
@@ -450,7 +450,7 @@ static inline void cpu_feature_keys_init(void) { } · 2 unmodified lines
450	450	CPU_FTR_MMCRA \| CPU_FTR_SMT \| \
451	451	CPU_FTR_COHERENT_ICACHE \| \
452	452	CPU_FTR_PURR \| CPU_FTR_SPURR \| CPU_FTR_REAL_LE \| \
453		− CPU_FTR_DSCR \| \
	453	+ CPU_FTR_DSCR \| CPU_FTR_SAO \| \
454	454	CPU_FTR_STCX_CHECKS_ADDRESS \| CPU_FTR_POPCNTB \| CPU_FTR_POPCNTD \| \
455	455	CPU_FTR_CFAR \| CPU_FTR_HVMODE \| CPU_FTR_VMX_COPY \| \
456	456	CPU_FTR_DBELL \| CPU_FTR_HAS_PPR \| CPU_FTR_DAWR \| \
@@ -461,7 +461,7 @@ static inline void cpu_feature_keys_init(void) { } · 4 unmodified lines
461	461	CPU_FTR_MMCRA \| CPU_FTR_SMT \| \
462	462	CPU_FTR_COHERENT_ICACHE \| \
463	463	CPU_FTR_PURR \| CPU_FTR_SPURR \| CPU_FTR_REAL_LE \| \
464		− CPU_FTR_DSCR \| \
	464	+ CPU_FTR_DSCR \| CPU_FTR_SAO \| \
465	465	CPU_FTR_STCX_CHECKS_ADDRESS \| CPU_FTR_POPCNTB \| CPU_FTR_POPCNTD \| \
466	466	CPU_FTR_CFAR \| CPU_FTR_HVMODE \| CPU_FTR_VMX_COPY \| \
467	467	CPU_FTR_DBELL \| CPU_FTR_HAS_PPR \| CPU_FTR_ARCH_207S \| \
@@ -479,7 +479,7 @@ static inline void cpu_feature_keys_init(void) { } · 11 unmodified lines
479	479	CPU_FTR_MMCRA \| CPU_FTR_SMT \| \
480	480	CPU_FTR_COHERENT_ICACHE \| \
481	481	CPU_FTR_PURR \| CPU_FTR_SPURR \| CPU_FTR_REAL_LE \| \
482		− CPU_FTR_DSCR \| \
	482	+ CPU_FTR_DSCR \| CPU_FTR_SAO \| \
483	483	CPU_FTR_STCX_CHECKS_ADDRESS \| CPU_FTR_POPCNTB \| CPU_FTR_POPCNTD \| \
484	484	CPU_FTR_CFAR \| CPU_FTR_HVMODE \| CPU_FTR_VMX_COPY \| \
485	485	CPU_FTR_DBELL \| CPU_FTR_HAS_PPR \| CPU_FTR_ARCH_207S \| \

arch/powerpc/include/asm/hw_irq.h+4−7

@@ -200,17 +200,14 @@ static inline bool arch_irqs_disabled(void) · 199 unmodified lines
200	200	#define powerpc_local_irq_pmu_save(flags) \
201	201	do { \
202	202	raw_local_irq_pmu_save(flags); \
203		− trace_hardirqs_off(); \
	203	+ if (!raw_irqs_disabled_flags(flags)) \
	204	+ trace_hardirqs_off(); \
204	205	} while(0)
205	206	#define powerpc_local_irq_pmu_restore(flags) \
206	207	do { \
207		− if (raw_irqs_disabled_flags(flags)) { \
208		− raw_local_irq_pmu_restore(flags); \
209		− trace_hardirqs_off(); \
210		− } else { \
	208	+ if (!raw_irqs_disabled_flags(flags)) \
211	209	trace_hardirqs_on(); \
212		− raw_local_irq_pmu_restore(flags); \
213		− } \
	210	+ raw_local_irq_pmu_restore(flags); \
214	211	} while(0)
215	212	#else
216	213	#define powerpc_local_irq_pmu_save(flags) \

arch/powerpc/include/asm/mman.h+27−4

@@ -13,20 +13,43 @@ · 12 unmodified lines
13	13	#include <linux/pkeys.h>
14	14	#include <asm/cpu_has_feature.h>
15	15
16		−#ifdef CONFIG_PPC_MEM_KEYS
17	16	static inline unsigned long arch_calc_vm_prot_bits(unsigned long prot,
18	17	unsigned long pkey)
19	18	{
20		− return pkey_to_vmflag_bits(pkey);
	19	+#ifdef CONFIG_PPC_MEM_KEYS
	20	+ return (((prot & PROT_SAO) ? VM_SAO : 0) \| pkey_to_vmflag_bits(pkey));
	21	+#else
	22	+ return ((prot & PROT_SAO) ? VM_SAO : 0);
	23	+#endif
21	24	}
22	25	#define arch_calc_vm_prot_bits(prot, pkey) arch_calc_vm_prot_bits(prot, pkey)
23	26
24	27	static inline pgprot_t arch_vm_get_page_prot(unsigned long vm_flags)
25	28	{
26		− return __pgprot(vmflag_to_pte_pkey_bits(vm_flags));
	29	+#ifdef CONFIG_PPC_MEM_KEYS
	30	+ return (vm_flags & VM_SAO) ?
	31	+ __pgprot(_PAGE_SAO \| vmflag_to_pte_pkey_bits(vm_flags)) :
	32	+ __pgprot(0 \| vmflag_to_pte_pkey_bits(vm_flags));
	33	+#else
	34	+ return (vm_flags & VM_SAO) ? __pgprot(_PAGE_SAO) : __pgprot(0);
	35	+#endif
27	36	}
28	37	#define arch_vm_get_page_prot(vm_flags) arch_vm_get_page_prot(vm_flags)
29		−#endif
	38	+
	39	+static inline bool arch_validate_prot(unsigned long prot, unsigned long addr)
	40	+{
	41	+ if (prot & ~(PROT_READ \| PROT_WRITE \| PROT_EXEC \| PROT_SEM \| PROT_SAO))
	42	+ return false;
	43	+ if (prot & PROT_SAO) {
	44	+ if (!cpu_has_feature(CPU_FTR_SAO))
	45	+ return false;
	46	+ if (firmware_has_feature(FW_FEATURE_LPAR) &&
	47	+ !IS_ENABLED(CONFIG_PPC_PROT_SAO_LPAR))
	48	+ return false;
	49	+ }
	50	+ return true;
	51	+}
	52	+#define arch_validate_prot arch_validate_prot
30	53
31	54	#endif /* CONFIG_PPC64 */
32	55	#endif /* _ASM_POWERPC_MMAN_H */

arch/powerpc/include/asm/nohash/64/pgtable.h+2−0

@@ -82,6 +82,8 @@ · 81 unmodified lines
82	82	*/
83	83	#include <asm/nohash/pte-book3e.h>
84	84
	85	+#define _PAGE_SAO 0
	86	+
85	87	#define PTE_RPN_MASK (~((1UL << PTE_RPN_SHIFT) - 1))
86	88
87	89	/*

arch/powerpc/include/uapi/asm/mman.h+1−1

@@ -11,7 +11,7 @@ · 10 unmodified lines
11	11	#include <asm-generic/mman-common.h>
12	12
13	13
14		−#define PROT_SAO 0x10 /* Unsupported since v5.9 */
	14	+#define PROT_SAO 0x10 /* Strong Access Ordering */
15	15
16	16	#define MAP_RENAME MAP_ANONYMOUS /* In SunOS terminology */
17	17	#define MAP_NORESERVE 0x40 /* don't reserve swap pages */

arch/powerpc/kernel/dt_cpu_ftrs.c+1−1

@@ -653,7 +653,7 @@ static struct dt_cpu_feature_match __initdata · 652 unmodified lines
653	653	{"processor-control-facility-v3", feat_enable_dbell, CPU_FTR_DBELL},
654	654	{"processor-utilization-of-resources-register", feat_enable_purr, 0},
655	655	{"no-execute", feat_enable, 0},
656		− /* strong-access-ordering is unused */
	656	+ {"strong-access-ordering", feat_enable, CPU_FTR_SAO},
657	657	{"cache-inhibited-large-page", feat_enable_large_ci, 0},
658	658	{"coprocessor-icswx", feat_enable, 0},
659	659	{"hypervisor-virtualization-interrupt", feat_enable_hvi, 0},

arch/powerpc/kernel/entry_64.S+4−0

@@ -113,6 +113,10 @@ END_FTR_SECTION_IFSET(CPU_FTR_TM) · 112 unmodified lines
113	113	ld r11,exception_marker@toc(r2)
114	114	std r11,-16(r10) /* "regshere" marker */
115	115
	116	+BEGIN_FTR_SECTION
	117	+ HMT_MEDIUM
	118	+END_FTR_SECTION_IFSET(CPU_FTR_HAS_PPR)
	119	+
116	120	/*
117	121	* RECONCILE_IRQ_STATE without calling trace_hardirqs_off(), which
118	122	* would clobber syscall parameters. Also we always enter with IRQs

arch/powerpc/kernel/process.c+9−3

@@ -548,7 +548,7 @@ void notrace restore_math(struct pt_regs *regs) · 547 unmodified lines
548	548	* are live for the user thread).
549	549	*/
550	550	if ((!(msr & MSR_FP)) && should_restore_fp())
551		− new_msr \|= MSR_FP \| current->thread.fpexc_mode;
	551	+ new_msr \|= MSR_FP;
552	552
553	553	if ((!(msr & MSR_VEC)) && should_restore_altivec())
554	554	new_msr \|= MSR_VEC;
@@ -559,11 +559,17 @@ void notrace restore_math(struct pt_regs *regs) · 4 unmodified lines
559	559	}
560	560
561	561	if (new_msr) {
	562	+ unsigned long fpexc_mode = 0;
	563	+
562	564	msr_check_and_set(new_msr);
563	565
564		− if (new_msr & MSR_FP)
	566	+ if (new_msr & MSR_FP) {
565	567	do_restore_fp();
566	568
	569	+ // This also covers VSX, because VSX implies FP
	570	+ fpexc_mode = current->thread.fpexc_mode;
	571	+ }
	572	+
567	573	if (new_msr & MSR_VEC)
568	574	do_restore_altivec();
569	575
@@ -572,7 +578,7 @@ void notrace restore_math(struct pt_regs *regs) · 2 unmodified lines
572	578
573	579	msr_check_and_clear(new_msr);
574	580
575		− regs->msr \|= new_msr;
	581	+ regs->msr \|= new_msr \| fpexc_mode;
576	582	}
577	583	}
578	584	#endif

arch/powerpc/mm/book3s64/hash_utils.c+2−0

@@ -232,6 +232,8 @@ unsigned long htab_convert_pte_flags(unsigned long pteflags) · 231 unmodified lines
232	232	rflags \|= HPTE_R_I;
233	233	else if ((pteflags & _PAGE_CACHE_CTL) == _PAGE_NON_IDEMPOTENT)
234	234	rflags \|= (HPTE_R_I \| HPTE_R_G);
	235	+ else if ((pteflags & _PAGE_CACHE_CTL) == _PAGE_SAO)
	236	+ rflags \|= (HPTE_R_W \| HPTE_R_I \| HPTE_R_M);
235	237	else
236	238	/*
237	239	* Add memory coherence if cache inhibited is not set

arch/powerpc/net/bpf_jit_comp.c+1−1

@@ -475,7 +475,7 @@ static int bpf_jit_build_body(struct bpf_prog fp, u32 image, · 474 unmodified lines
475	475	case BPF_JMP \| BPF_JSET \| BPF_K:
476	476	case BPF_JMP \| BPF_JSET \| BPF_X:
477	477	true_cond = COND_NE;
478		− /* Fall through */
	478	+ fallthrough;
479	479	cond_branch:
480	480	/* same targets, can avoid doing the test :) */
481	481	if (filter[i].jt == filter[i].jf) {

arch/powerpc/perf/core-book3s.c+14−5

@@ -1557,9 +1557,16 @@ nocheck: · 1556 unmodified lines
1557	1557	ret = 0;
1558	1558	out:
1559	1559	if (has_branch_stack(event)) {
1560		− power_pmu_bhrb_enable(event);
1561		− cpuhw->bhrb_filter = ppmu->bhrb_filter_map(
1562		− event->attr.branch_sample_type);
	1560	+ u64 bhrb_filter = -1;
	1561	+
	1562	+ if (ppmu->bhrb_filter_map)
	1563	+ bhrb_filter = ppmu->bhrb_filter_map(
	1564	+ event->attr.branch_sample_type);
	1565	+
	1566	+ if (bhrb_filter != -1) {
	1567	+ cpuhw->bhrb_filter = bhrb_filter;
	1568	+ power_pmu_bhrb_enable(event);
	1569	+ }
1563	1570	}
1564	1571
1565	1572	perf_pmu_enable(event->pmu);
@@ -1881,7 +1888,6 @@ static int power_pmu_event_init(struct perf_event *event) · 315 unmodified lines
1881	1888	int n;
1882	1889	int err;
1883	1890	struct cpu_hw_events *cpuhw;
1884		− u64 bhrb_filter;
1885	1891
1886	1892	if (!ppmu)
1887	1893	return -ENOENT;
@@ -1987,7 +1993,10 @@ static int power_pmu_event_init(struct perf_event *event) · 99 unmodified lines
1987	1993	err = power_check_constraints(cpuhw, events, cflags, n + 1);
1988	1994
1989	1995	if (has_branch_stack(event)) {
1990		− bhrb_filter = ppmu->bhrb_filter_map(
	1996	+ u64 bhrb_filter = -1;
	1997	+
	1998	+ if (ppmu->bhrb_filter_map)
	1999	+ bhrb_filter = ppmu->bhrb_filter_map(
1991	2000	event->attr.branch_sample_type);
1992	2001
1993	2002	if (bhrb_filter == -1) {

arch/powerpc/perf/imc-pmu.c+2−2

@@ -1289,7 +1289,7 @@ static int trace_imc_prepare_sample(struct trace_imc_data *mem, · 1288 unmodified lines
1289	1289	header->misc = 0;
1290	1290
1291	1291	if (cpu_has_feature(CPU_FTR_ARCH_31)) {
1292		− switch (IMC_TRACE_RECORD_VAL_HVPR(mem->val)) {
	1292	+ switch (IMC_TRACE_RECORD_VAL_HVPR(be64_to_cpu(READ_ONCE(mem->val)))) {
1293	1293	case 0:/* when MSR HV and PR not set in the trace-record */
1294	1294	header->misc \|= PERF_RECORD_MISC_GUEST_KERNEL;
1295	1295	break;
@@ -1297,7 +1297,7 @@ static int trace_imc_prepare_sample(struct trace_imc_data *mem, · 1 unmodified line
1297	1297	header->misc \|= PERF_RECORD_MISC_GUEST_USER;
1298	1298	break;
1299	1299	case 2: /* MSR HV is 1 and PR is 0 */
1300		− header->misc \|= PERF_RECORD_MISC_HYPERVISOR;
	1300	+ header->misc \|= PERF_RECORD_MISC_KERNEL;
1301	1301	break;
1302	1302	case 3: /* MSR HV is 1 and PR is 1 */
1303	1303	header->misc \|= PERF_RECORD_MISC_USER;

arch/powerpc/platforms/Kconfig.cputype+1−1

@@ -36,7 +36,7 @@ config PPC_BOOK3S_6xx · 35 unmodified lines
36	36	select PPC_HAVE_PMU_SUPPORT
37	37	select PPC_HAVE_KUEP
38	38	select PPC_HAVE_KUAP
39		− select HAVE_ARCH_VMAP_STACK
	39	+ select HAVE_ARCH_VMAP_STACK if !ADB_PMU
40	40
41	41	config PPC_BOOK3S_601
42	42	bool "PowerPC 601"

arch/powerpc/platforms/powernv/idle.c+1−1

@@ -1223,7 +1223,7 @@ static void __init pnv_probe_idle_states(void) · 1222 unmodified lines
1223	1223	return;
1224	1224	}
1225	1225
1226		− if (pvr_version_is(PVR_POWER9))
	1226	+ if (cpu_has_feature(CPU_FTR_ARCH_300))
1227	1227	pnv_power9_idle_init();
1228	1228
1229	1229	for (i = 0; i < nr_pnv_idle_states; i++)

arch/riscv/kernel/signal.c+1−1

@@ -250,7 +250,7 @@ static void handle_signal(struct ksignal ksig, struct pt_regs regs) · 249 unmodified lines
250	250	regs->a0 = -EINTR;
251	251	break;
252	252	}
253		− /* fallthrough */
	253	+ fallthrough;
254	254	case -ERESTARTNOINTR:
255	255	regs->a0 = regs->orig_a0;
256	256	regs->epc -= 0x4;

arch/riscv/net/bpf_jit_comp32.c+2−2

@@ -1020,7 +1020,7 @@ int bpf_jit_emit_insn(const struct bpf_insn insn, struct rv_jit_context ctx, · 1019 unmodified lines
1020	1020	emit_zext64(dst, ctx);
1021	1021	break;
1022	1022	}
1023		− /* Fallthrough. */
	1023	+ fallthrough;
1024	1024
1025	1025	case BPF_ALU \| BPF_ADD \| BPF_X:
1026	1026	case BPF_ALU \| BPF_SUB \| BPF_X:
@@ -1079,7 +1079,7 @@ int bpf_jit_emit_insn(const struct bpf_insn insn, struct rv_jit_context ctx, · 52 unmodified lines
1079	1079	case 16:
1080	1080	emit(rv_slli(lo(rd), lo(rd), 16), ctx);
1081	1081	emit(rv_srli(lo(rd), lo(rd), 16), ctx);
1082		− /* Fallthrough. */
	1082	+ fallthrough;
1083	1083	case 32:
1084	1084	if (!ctx->prog->aux->verifier_zext)
1085	1085	emit(rv_addi(hi(rd), RV_REG_ZERO, 0), ctx);

arch/s390/Kconfig+1−1

@@ -30,7 +30,7 @@ config GENERIC_BUG_RELATIVE_POINTERS · 29 unmodified lines
30	30	def_bool y
31	31
32	32	config GENERIC_LOCKBREAK
33		− def_bool y if PREEMPTTION
	33	+ def_bool y if PREEMPTION
34	34
35	35	config PGSTE
36	36	def_bool y if KVM

arch/s390/configs/debug_defconfig+4−0

@@ -626,6 +626,7 @@ CONFIG_NTFS_RW=y · 625 unmodified lines
626	626	CONFIG_PROC_KCORE=y
627	627	CONFIG_TMPFS=y
628	628	CONFIG_TMPFS_POSIX_ACL=y
	629	+CONFIG_TMPFS_INODE64=y
629	630	CONFIG_HUGETLBFS=y
630	631	CONFIG_CONFIGFS_FS=m
631	632	CONFIG_ECRYPT_FS=m
@@ -807,6 +808,7 @@ CONFIG_DEBUG_NOTIFIERS=y · 175 unmodified lines
807	808	CONFIG_BUG_ON_DATA_CORRUPTION=y
808	809	CONFIG_DEBUG_CREDENTIALS=y
809	810	CONFIG_RCU_TORTURE_TEST=m
	811	+CONFIG_RCU_REF_SCALE_TEST=m
810	812	CONFIG_RCU_CPU_STALL_TIMEOUT=300
811	813	# CONFIG_RCU_TRACE is not set
812	814	CONFIG_LATENCYTOP=y
@@ -818,6 +820,7 @@ CONFIG_PREEMPT_TRACER=y · 5 unmodified lines
818	820	CONFIG_SCHED_TRACER=y
819	821	CONFIG_FTRACE_SYSCALLS=y
820	822	CONFIG_BLK_DEV_IO_TRACE=y
	823	+CONFIG_BPF_KPROBE_OVERRIDE=y
821	824	CONFIG_HIST_TRIGGERS=y
822	825	CONFIG_S390_PTDUMP=y
823	826	CONFIG_NOTIFIER_ERROR_INJECTION=m
@@ -829,6 +832,7 @@ CONFIG_FAIL_MAKE_REQUEST=y · 5 unmodified lines
829	832	CONFIG_FAIL_IO_TIMEOUT=y
830	833	CONFIG_FAIL_FUTEX=y
831	834	CONFIG_FAULT_INJECTION_DEBUG_FS=y
	835	+CONFIG_FAIL_FUNCTION=y
832	836	CONFIG_FAULT_INJECTION_STACKTRACE_FILTER=y
833	837	CONFIG_LKDTM=m
834	838	CONFIG_TEST_LIST_SORT=y

arch/s390/configs/defconfig+3−0

@@ -617,6 +617,7 @@ CONFIG_NTFS_RW=y · 616 unmodified lines
617	617	CONFIG_PROC_KCORE=y
618	618	CONFIG_TMPFS=y
619	619	CONFIG_TMPFS_POSIX_ACL=y
	620	+CONFIG_TMPFS_INODE64=y
620	621	CONFIG_HUGETLBFS=y
621	622	CONFIG_CONFIGFS_FS=m
622	623	CONFIG_ECRYPT_FS=m
@@ -763,6 +764,7 @@ CONFIG_PANIC_ON_OOPS=y · 140 unmodified lines
763	764	CONFIG_TEST_LOCKUP=m
764	765	CONFIG_BUG_ON_DATA_CORRUPTION=y
765	766	CONFIG_RCU_TORTURE_TEST=m
	767	+CONFIG_RCU_REF_SCALE_TEST=m
766	768	CONFIG_RCU_CPU_STALL_TIMEOUT=60
767	769	CONFIG_LATENCYTOP=y
768	770	CONFIG_BOOTTIME_TRACING=y
@@ -771,6 +773,7 @@ CONFIG_STACK_TRACER=y · 2 unmodified lines
771	773	CONFIG_SCHED_TRACER=y
772	774	CONFIG_FTRACE_SYSCALLS=y
773	775	CONFIG_BLK_DEV_IO_TRACE=y
	776	+CONFIG_BPF_KPROBE_OVERRIDE=y
774	777	CONFIG_HIST_TRIGGERS=y
775	778	CONFIG_S390_PTDUMP=y
776	779	CONFIG_LKDTM=m

arch/s390/configs/zfcpdump_defconfig+1−0

@@ -74,5 +74,6 @@ CONFIG_DEBUG_KERNEL=y · 73 unmodified lines
74	74	CONFIG_PANIC_ON_OOPS=y
75	75	# CONFIG_SCHED_DEBUG is not set
76	76	CONFIG_RCU_CPU_STALL_TIMEOUT=60
	77	+# CONFIG_RCU_TRACE is not set
77	78	# CONFIG_FTRACE is not set
78	79	# CONFIG_RUNTIME_TESTING_MENU is not set

arch/s390/include/asm/percpu.h+14−14

@@ -29,7 +29,7 @@ · 28 unmodified lines
29	29	typedef typeof(pcp) pcp_op_T__; \
30	30	pcp_op_T__ old__, new__, prev__; \
31	31	pcp_op_T__ *ptr__; \
32		− preempt_disable(); \
	32	+ preempt_disable_notrace(); \
33	33	ptr__ = raw_cpu_ptr(&(pcp)); \
34	34	prev__ = *ptr__; \
35	35	do { \
@@ -37,7 +37,7 @@ · 1 unmodified line
37	37	new__ = old__ op (val); \
38	38	prev__ = cmpxchg(ptr__, old__, new__); \
39	39	} while (prev__ != old__); \
40		− preempt_enable(); \
	40	+ preempt_enable_notrace(); \
41	41	new__; \
42	42	})
43	43
@@ -68,7 +68,7 @@ · 24 unmodified lines
68	68	typedef typeof(pcp) pcp_op_T__; \
69	69	pcp_op_T__ val__ = (val); \
70	70	pcp_op_T__ old__, *ptr__; \
71		− preempt_disable(); \
	71	+ preempt_disable_notrace(); \
72	72	ptr__ = raw_cpu_ptr(&(pcp)); \
73	73	if (__builtin_constant_p(val__) && \
74	74	((szcast)val__ > -129) && ((szcast)val__ < 128)) { \
@@ -84,7 +84,7 @@ · 9 unmodified lines
84	84	: [val__] "d" (val__) \
85	85	: "cc"); \
86	86	} \
87		− preempt_enable(); \
	87	+ preempt_enable_notrace(); \
88	88	}
89	89
90	90	#define this_cpu_add_4(pcp, val) arch_this_cpu_add(pcp, val, "laa", "asi", int)
@@ -95,14 +95,14 @@ · 4 unmodified lines
95	95	typedef typeof(pcp) pcp_op_T__; \
96	96	pcp_op_T__ val__ = (val); \
97	97	pcp_op_T__ old__, *ptr__; \
98		− preempt_disable(); \
	98	+ preempt_disable_notrace(); \
99	99	ptr__ = raw_cpu_ptr(&(pcp)); \
100	100	asm volatile( \
101	101	op " %[old__],%[val__],%[ptr__]\n" \
102	102	: [old__] "=d" (old__), [ptr__] "+Q" (*ptr__) \
103	103	: [val__] "d" (val__) \
104	104	: "cc"); \
105		− preempt_enable(); \
	105	+ preempt_enable_notrace(); \
106	106	old__ + val__; \
107	107	})
108	108
@@ -114,14 +114,14 @@ · 5 unmodified lines
114	114	typedef typeof(pcp) pcp_op_T__; \
115	115	pcp_op_T__ val__ = (val); \
116	116	pcp_op_T__ old__, *ptr__; \
117		− preempt_disable(); \
	117	+ preempt_disable_notrace(); \
118	118	ptr__ = raw_cpu_ptr(&(pcp)); \
119	119	asm volatile( \
120	120	op " %[old__],%[val__],%[ptr__]\n" \
121	121	: [old__] "=d" (old__), [ptr__] "+Q" (*ptr__) \
122	122	: [val__] "d" (val__) \
123	123	: "cc"); \
124		− preempt_enable(); \
	124	+ preempt_enable_notrace(); \
125	125	}
126	126
127	127	#define this_cpu_and_4(pcp, val) arch_this_cpu_to_op(pcp, val, "lan")
@@ -136,10 +136,10 @@ · 8 unmodified lines
136	136	typedef typeof(pcp) pcp_op_T__; \
137	137	pcp_op_T__ ret__; \
138	138	pcp_op_T__ *ptr__; \
139		− preempt_disable(); \
	139	+ preempt_disable_notrace(); \
140	140	ptr__ = raw_cpu_ptr(&(pcp)); \
141	141	ret__ = cmpxchg(ptr__, oval, nval); \
142		− preempt_enable(); \
	142	+ preempt_enable_notrace(); \
143	143	ret__; \
144	144	})
145	145
@@ -152,10 +152,10 @@ · 6 unmodified lines
152	152	({ \
153	153	typeof(pcp) *ptr__; \
154	154	typeof(pcp) ret__; \
155		− preempt_disable(); \
	155	+ preempt_disable_notrace(); \
156	156	ptr__ = raw_cpu_ptr(&(pcp)); \
157	157	ret__ = xchg(ptr__, nval); \
158		− preempt_enable(); \
	158	+ preempt_enable_notrace(); \
159	159	ret__; \
160	160	})
161	161
@@ -171,11 +171,11 @@ · 9 unmodified lines
171	171	typeof(pcp1) *p1__; \
172	172	typeof(pcp2) *p2__; \
173	173	int ret__; \
174		− preempt_disable(); \
	174	+ preempt_disable_notrace(); \
175	175	p1__ = raw_cpu_ptr(&(pcp1)); \
176	176	p2__ = raw_cpu_ptr(&(pcp2)); \
177	177	ret__ = __cmpxchg_double(p1__, p2__, o1__, o2__, n1__, n2__); \
178		− preempt_enable(); \
	178	+ preempt_enable_notrace(); \
179	179	ret__; \
180	180	})
181	181

arch/s390/kernel/idle.c+1−2

@@ -33,14 +33,13 @@ void enabled_wait(void) · 32 unmodified lines
33	33	PSW_MASK_IO \| PSW_MASK_EXT \| PSW_MASK_MCHECK;
34	34	clear_cpu_flag(CIF_NOHZ_DELAY);
35	35
36		− trace_cpu_idle_rcuidle(1, smp_processor_id());
37	36	local_irq_save(flags);
38	37	/* Call the assembler magic in entry.S */
39	38	psw_idle(idle, psw_mask);
40	39	local_irq_restore(flags);
41		− trace_cpu_idle_rcuidle(PWR_EVENT_EXIT, smp_processor_id());
42	40
43	41	/* Account time spent with enabled wait psw loaded as idle time. */
	42	+ /* XXX seqcount has tracepoints that require RCU */
44	43	write_seqcount_begin(&idle->seqcount);
45	44	idle_time = idle->clock_idle_exit - idle->clock_idle_enter;
46	45	idle->clock_idle_enter = idle->clock_idle_exit = 0ULL;

arch/s390/mm/vmem.c+1−0

@@ -402,6 +402,7 @@ static int modify_p4d_table(pgd_t *pgd, unsigned long addr, unsigned long end, · 401 unmodified lines
402	402	pud = vmem_crst_alloc(_REGION3_ENTRY_EMPTY);
403	403	if (!pud)
404	404	goto out;
	405	+ p4d_populate(&init_mm, p4d, pud);
405	406	}
406	407	ret = modify_pud_table(p4d, addr, next, add, direct);
407	408	if (ret)

arch/sh/drivers/platform_early.c+1−1

@@ -246,7 +246,7 @@ static int __init sh_early_platform_driver_probe_id(char *class_str, · 245 unmodified lines
246	246	case EARLY_PLATFORM_ID_ERROR:
247	247	pr_warn("%s: unable to parse %s parameter\n",
248	248	class_str, epdrv->pdrv->driver.name);
249		− /* fall-through */
	249	+ fallthrough;
250	250	case EARLY_PLATFORM_ID_UNSET:
251	251	match = NULL;
252	252	break;

arch/sh/kernel/disassemble.c+2−2

@@ -486,7 +486,7 @@ static void print_sh_insn(u32 memaddr, u16 insn) · 485 unmodified lines
486	486	pr_cont("xd%d", rn & ~1);
487	487	break;
488	488	}
489		− /* else, fall through */
	489	+ fallthrough;
490	490	case D_REG_N:
491	491	pr_cont("dr%d", rn);
492	492	break;
@@ -495,7 +495,7 @@ static void print_sh_insn(u32 memaddr, u16 insn) · 2 unmodified lines
495	495	pr_cont("xd%d", rm & ~1);
496	496	break;
497	497	}
498		− /* else, fall through */
	498	+ fallthrough;
499	499	case D_REG_M:
500	500	pr_cont("dr%d", rm);
501	501	break;

arch/sh/kernel/kgdb.c+1−1

@@ -266,7 +266,7 @@ int kgdb_arch_handle_exception(int e_vector, int signo, int err_code, · 265 unmodified lines
266	266	ptr = &remcomInBuffer[1];
267	267	if (kgdb_hex2long(&ptr, &addr))
268	268	linux_regs->pc = addr;
269		− /* fallthrough */
	269	+ fallthrough;
270	270	case 'D':
271	271	case 'k':
272	272	atomic_set(&kgdb_cpu_doing_single_step, -1);

arch/sh/kernel/signal_32.c+1−1

@@ -418,7 +418,7 @@ handle_syscall_restart(unsigned long save_r0, struct pt_regs *regs, · 417 unmodified lines
418	418	case -ERESTARTSYS:
419	419	if (!(sa->sa_flags & SA_RESTART))
420	420	goto no_system_call_restart;
421		− /* fallthrough */
	421	+ fallthrough;
422	422	case -ERESTARTNOINTR:
423	423	regs->regs[0] = save_r0;
424	424	regs->pc -= instruction_size(__raw_readw(regs->pc - 4));

arch/sparc/kernel/auxio_64.c+0−1

@@ -87,7 +87,6 @@ void auxio_set_lte(int on) · 86 unmodified lines
87	87	__auxio_sbus_set_lte(on);
88	88	break;
89	89	case AUXIO_TYPE_EBUS:
90		− /* FALL-THROUGH */
91	90	default:
92	91	break;
93	92	}

arch/sparc/kernel/central.c+1−1

@@ -55,7 +55,7 @@ static int clock_board_calc_nslots(struct clock_board *p) · 54 unmodified lines
55	55	else
56	56	return 5;
57	57	}
58		− /* Fallthrough */
	58	+ fallthrough;
59	59	default:
60	60	return 4;
61	61	}

arch/sparc/kernel/kgdb_32.c+1−1

@@ -122,7 +122,7 @@ int kgdb_arch_handle_exception(int e_vector, int signo, int err_code, · 121 unmodified lines
122	122	linux_regs->pc = addr;
123	123	linux_regs->npc = addr + 4;
124	124	}
125		− /* fall through */
	125	+ fallthrough;
126	126
127	127	case 'D':
128	128	case 'k':

arch/sparc/kernel/kgdb_64.c+1−1

@@ -148,7 +148,7 @@ int kgdb_arch_handle_exception(int e_vector, int signo, int err_code, · 147 unmodified lines
148	148	linux_regs->tpc = addr;
149	149	linux_regs->tnpc = addr + 4;
150	150	}
151		− /* fall through */
	151	+ fallthrough;
152	152
153	153	case 'D':
154	154	case 'k':

arch/sparc/kernel/pcr.c+1−1

@@ -359,7 +359,7 @@ int __init pcr_arch_init(void) · 358 unmodified lines
359	359	* counter overflow interrupt so we can't make use of
360	360	* their hardware currently.
361	361	*/
362		− /* fallthrough */
	362	+ fallthrough;
363	363	default:
364	364	err = -ENODEV;
365	365	goto out_unregister;

arch/sparc/kernel/prom_32.c+1−1

@@ -224,7 +224,7 @@ void __init of_console_init(void) · 223 unmodified lines
224	224
225	225	case PROMDEV_TTYB:
226	226	skip = 1;
227		− /* FALLTHRU */
	227	+ fallthrough;
228	228
229	229	case PROMDEV_TTYA:
230	230	type = "serial";

arch/sparc/kernel/signal32.c+2−2

@@ -646,7 +646,7 @@ static inline void syscall_restart32(unsigned long orig_i0, struct pt_regs *regs · 645 unmodified lines
646	646	case ERESTARTSYS:
647	647	if (!(sa->sa_flags & SA_RESTART))
648	648	goto no_system_call_restart;
649		− /* fallthrough */
	649	+ fallthrough;
650	650	case ERESTARTNOINTR:
651	651	regs->u_regs[UREG_I0] = orig_i0;
652	652	regs->tpc -= 4;
@@ -686,7 +686,7 @@ void do_signal32(struct pt_regs * regs) · 33 unmodified lines
686	686	regs->tpc -= 4;
687	687	regs->tnpc -= 4;
688	688	pt_regs_clear_syscall(regs);
689		− /* fall through */
	689	+ fallthrough;
690	690	case ERESTART_RESTARTBLOCK:
691	691	regs->u_regs[UREG_G1] = __NR_restart_syscall;
692	692	regs->tpc -= 4;

arch/sparc/kernel/signal_32.c+2−2

@@ -440,7 +440,7 @@ static inline void syscall_restart(unsigned long orig_i0, struct pt_regs *regs, · 439 unmodified lines
440	440	case ERESTARTSYS:
441	441	if (!(sa->sa_flags & SA_RESTART))
442	442	goto no_system_call_restart;
443		− /* fallthrough */
	443	+ fallthrough;
444	444	case ERESTARTNOINTR:
445	445	regs->u_regs[UREG_I0] = orig_i0;
446	446	regs->pc -= 4;
@@ -506,7 +506,7 @@ static void do_signal(struct pt_regs *regs, unsigned long orig_i0) · 59 unmodified lines
506	506	regs->pc -= 4;
507	507	regs->npc -= 4;
508	508	pt_regs_clear_syscall(regs);
509		− /* fall through */
	509	+ fallthrough;
510	510	case ERESTART_RESTARTBLOCK:
511	511	regs->u_regs[UREG_G1] = __NR_restart_syscall;
512	512	regs->pc -= 4;

arch/sparc/kernel/signal_64.c+2−2

@@ -461,7 +461,7 @@ static inline void syscall_restart(unsigned long orig_i0, struct pt_regs *regs, · 460 unmodified lines
461	461	case ERESTARTSYS:
462	462	if (!(sa->sa_flags & SA_RESTART))
463	463	goto no_system_call_restart;
464		− /* fallthrough */
	464	+ fallthrough;
465	465	case ERESTARTNOINTR:
466	466	regs->u_regs[UREG_I0] = orig_i0;
467	467	regs->tpc -= 4;
@@ -532,7 +532,7 @@ static void do_signal(struct pt_regs *regs, unsigned long orig_i0) · 64 unmodified lines
532	532	regs->tpc -= 4;
533	533	regs->tnpc -= 4;
534	534	pt_regs_clear_syscall(regs);
535		− /* fall through */
	535	+ fallthrough;
536	536	case ERESTART_RESTARTBLOCK:
537	537	regs->u_regs[UREG_G1] = __NR_restart_syscall;
538	538	regs->tpc -= 4;

arch/sparc/math-emu/math_32.c+4−4

@@ -359,7 +359,7 @@ static int do_one_mathemu(u32 insn, unsigned long pfsr, unsigned long fregs) · 358 unmodified lines
359	359	*pfsr \|= (6 << 14);
360	360	return 0; /* simulate invalid_fp_register exception */
361	361	}
362		− /* fall through */
	362	+ fallthrough;
363	363	case 2:
364	364	if (freg & 1) { /* doublewords must have bit 5 zeroed */
365	365	*pfsr \|= (6 << 14);
@@ -380,7 +380,7 @@ static int do_one_mathemu(u32 insn, unsigned long pfsr, unsigned long fregs) · 14 unmodified lines
380	380	*pfsr \|= (6 << 14);
381	381	return 0; /* simulate invalid_fp_register exception */
382	382	}
383		− /* fall through */
	383	+ fallthrough;
384	384	case 2:
385	385	if (freg & 1) { /* doublewords must have bit 5 zeroed */
386	386	*pfsr \|= (6 << 14);
@@ -408,13 +408,13 @@ static int do_one_mathemu(u32 insn, unsigned long pfsr, unsigned long fregs) · 21 unmodified lines
408	408	*pfsr \|= (6 << 14);
409	409	return 0; /* simulate invalid_fp_register exception */
410	410	}
411		− /* fall through */
	411	+ fallthrough;
412	412	case 2:
413	413	if (freg & 1) { /* doublewords must have bit 5 zeroed */
414	414	*pfsr \|= (6 << 14);
415	415	return 0;
416	416	}
417		− /* fall through */
	417	+ fallthrough;
418	418	case 1:
419	419	rd = (void *)&fregs[freg];
420	420	break;

arch/sparc/net/bpf_jit_comp_32.c+1−1

@@ -491,7 +491,7 @@ void bpf_jit_compile(struct bpf_prog *fp) · 490 unmodified lines
491	491	} else {
492	492	emit_loadimm(K, r_A);
493	493	}
494		− /* Fallthrough */
	494	+ fallthrough;
495	495	case BPF_RET \| BPF_A:
496	496	if (seen_or_pass0) {
497	497	if (i != flen - 1) {

arch/um/kernel/signal.c+1−1

@@ -70,7 +70,7 @@ static void handle_signal(struct ksignal ksig, struct pt_regs regs) · 69 unmodified lines
70	70	PT_REGS_SYSCALL_RET(regs) = -EINTR;
71	71	break;
72	72	}
73		− /* fallthrough */
	73	+ fallthrough;
74	74	case -ERESTARTNOINTR:
75	75	PT_REGS_RESTART_SYSCALL(regs);
76	76	PT_REGS_ORIG_SYSCALL(regs) = PT_REGS_SYSCALL_NR(regs);

arch/x86/boot/cmdline.c+2−2

@@ -54,7 +54,7 @@ int __cmdline_find_option(unsigned long cmdline_ptr, const char option, char b · 53 unmodified lines
54	54	/* else */
55	55	state = st_wordcmp;
56	56	opptr = option;
57		− /* fall through */
	57	+ fallthrough;
58	58
59	59	case st_wordcmp:
60	60	if (c == '=' && !*opptr) {
@@ -129,7 +129,7 @@ int __cmdline_find_option_bool(unsigned long cmdline_ptr, const char *option) · 68 unmodified lines
129	129	state = st_wordcmp;
130	130	opptr = option;
131	131	wstart = pos;
132		− /* fall through */
	132	+ fallthrough;
133	133
134	134	case st_wordcmp:
135	135	if (!*opptr)

arch/x86/boot/compressed/kaslr.c+1−1

@@ -178,7 +178,7 @@ parse_memmap(char p, unsigned long long start, unsigned long long *size, · 177 unmodified lines
178	178	}
179	179	*size = 0;
180	180	}
181		− /* Fall through */
	181	+ fallthrough;
182	182	default:
183	183	/*
184	184	* If w/o offset, only size specified, memmap=nn[KMG] has the

arch/x86/entry/common.c+20−9

@@ -60,16 +60,10 @@ __visible noinstr void do_syscall_64(unsigned long nr, struct pt_regs *regs) · 59 unmodified lines
60	60	#if defined(CONFIG_X86_32) \|\| defined(CONFIG_IA32_EMULATION)
61	61	static __always_inline unsigned int syscall_32_enter(struct pt_regs *regs)
62	62	{
63		− unsigned int nr = (unsigned int)regs->orig_ax;
64		−
65	63	if (IS_ENABLED(CONFIG_IA32_EMULATION))
66	64	current_thread_info()->status \|= TS_COMPAT;
67		− /*
68		− * Subtlety here: if ptrace pokes something larger than 2^32-1 into
69		− * orig_ax, the unsigned int return value truncates it. This may
70		− * or may not be necessary, but it matches the old asm behavior.
71		− */
72		− return (unsigned int)syscall_enter_from_user_mode(regs, nr);
	65	+
	66	+ return (unsigned int)regs->orig_ax;
73	67	}
74	68
75	69	/*
@@ -91,15 +85,29 @@ __visible noinstr void do_int80_syscall_32(struct pt_regs *regs) · 15 unmodified lines
91	85	{
92	86	unsigned int nr = syscall_32_enter(regs);
93	87
	88	+ /*
	89	+ * Subtlety here: if ptrace pokes something larger than 2^32-1 into
	90	+ * orig_ax, the unsigned int return value truncates it. This may
	91	+ * or may not be necessary, but it matches the old asm behavior.
	92	+ */
	93	+ nr = (unsigned int)syscall_enter_from_user_mode(regs, nr);
	94	+
94	95	do_syscall_32_irqs_on(regs, nr);
95	96	syscall_exit_to_user_mode(regs);
96	97	}
97	98
98	99	static noinstr bool __do_fast_syscall_32(struct pt_regs *regs)
99	100	{
100		− unsigned int nr = syscall_32_enter(regs);
	101	+ unsigned int nr = syscall_32_enter(regs);
101	102	int res;
102	103
	104	+ /*
	105	+ * This cannot use syscall_enter_from_user_mode() as it has to
	106	+ * fetch EBP before invoking any of the syscall entry work
	107	+ * functions.
	108	+ */
	109	+ syscall_enter_from_user_mode_prepare(regs);
	110	+
103	111	instrumentation_begin();
104	112	/* Fetch EBP from where the vDSO stashed it. */
105	113	if (IS_ENABLED(CONFIG_X86_64)) {
@@ -122,6 +130,9 @@ static noinstr bool __do_fast_syscall_32(struct pt_regs *regs) · 16 unmodified lines
122	130	return false;
123	131	}
124	132
	133	+ /* The case truncates any ptrace induced syscall nr > 2^32 -1 */
	134	+ nr = (unsigned int)syscall_enter_from_user_mode_work(regs, nr);
	135	+
125	136	/* Now this is just like a normal syscall. */
126	137	do_syscall_32_irqs_on(regs, nr);
127	138	syscall_exit_to_user_mode(regs);

arch/x86/entry/thunk_32.S+0−5

@@ -29,11 +29,6 @@ SYM_CODE_START_NOALIGN(\name) · 28 unmodified lines
29	29	SYM_CODE_END(\name)
30	30	.endm
31	31
32		−#ifdef CONFIG_TRACE_IRQFLAGS
33		− THUNK trace_hardirqs_on_thunk,trace_hardirqs_on_caller,1
34		− THUNK trace_hardirqs_off_thunk,trace_hardirqs_off_caller,1
35		−#endif
36		−
37	32	#ifdef CONFIG_PREEMPTION
38	33	THUNK preempt_schedule_thunk, preempt_schedule
39	34	THUNK preempt_schedule_notrace_thunk, preempt_schedule_notrace

arch/x86/events/intel/core.c+3−3

@@ -4682,7 +4682,7 @@ __init int intel_pmu_init(void) · 4681 unmodified lines
4682	4682
4683	4683	case INTEL_FAM6_CORE2_MEROM:
4684	4684	x86_add_quirk(intel_clovertown_quirk);
4685		− /* fall through */
	4685	+ fallthrough;
4686	4686
4687	4687	case INTEL_FAM6_CORE2_MEROM_L:
4688	4688	case INTEL_FAM6_CORE2_PENRYN:
@@ -5062,7 +5062,7 @@ __init int intel_pmu_init(void) · 373 unmodified lines
5062	5062
5063	5063	case INTEL_FAM6_SKYLAKE_X:
5064	5064	pmem = true;
5065		− /* fall through */
	5065	+ fallthrough;
5066	5066	case INTEL_FAM6_SKYLAKE_L:
5067	5067	case INTEL_FAM6_SKYLAKE:
5068	5068	case INTEL_FAM6_KABYLAKE_L:
@@ -5114,7 +5114,7 @@ __init int intel_pmu_init(void) · 45 unmodified lines
5114	5114	case INTEL_FAM6_ICELAKE_X:
5115	5115	case INTEL_FAM6_ICELAKE_D:
5116	5116	pmem = true;
5117		− /* fall through */
	5117	+ fallthrough;
5118	5118	case INTEL_FAM6_ICELAKE_L:
5119	5119	case INTEL_FAM6_ICELAKE:
5120	5120	case INTEL_FAM6_TIGERLAKE_L:

arch/x86/events/intel/lbr.c+1−1

@@ -1268,7 +1268,7 @@ static int branch_type(unsigned long from, unsigned long to, int abort) · 1267 unmodified lines
1268	1268	ret = X86_BR_ZERO_CALL;
1269	1269	break;
1270	1270	}
1271		− /* fall through */
	1271	+ fallthrough;
1272	1272	case 0x9a: /* call far absolute */
1273	1273	ret = X86_BR_CALL;
1274	1274	break;

arch/x86/include/asm/entry-common.h+10−2

@@ -18,8 +18,16 @@ static __always_inline void arch_check_user_regs(struct pt_regs *regs) · 17 unmodified lines
18	18	* state, not the interrupt state as imagined by Xen.
19	19	*/
20	20	unsigned long flags = native_save_fl();
21		− WARN_ON_ONCE(flags & (X86_EFLAGS_AC \| X86_EFLAGS_DF \|
22		− X86_EFLAGS_NT));
	21	+ unsigned long mask = X86_EFLAGS_DF \| X86_EFLAGS_NT;
	22	+
	23	+ /*
	24	+ * For !SMAP hardware we patch out CLAC on entry.
	25	+ */
	26	+ if (boot_cpu_has(X86_FEATURE_SMAP) \|\|
	27	+ (IS_ENABLED(CONFIG_64_BIT) && boot_cpu_has(X86_FEATURE_XENPV)))
	28	+ mask \|= X86_EFLAGS_AC;
	29	+
	30	+ WARN_ON_ONCE(flags & mask);
23	31
24	32	/* We think we came from user mode. Make sure pt_regs agrees. */
25	33	WARN_ON_ONCE(!user_mode(regs));

arch/x86/include/asm/mmu.h+1−0

@@ -59,5 +59,6 @@ typedef struct { · 58 unmodified lines
59	59	}
60	60
61	61	void leave_mm(int cpu);
	62	+#define leave_mm leave_mm
62	63
63	64	#endif /* _ASM_X86_MMU_H */

arch/x86/include/asm/ptrace.h+1−1

@@ -327,8 +327,8 @@ static inline unsigned long regs_get_kernel_argument(struct pt_regs *regs, · 326 unmodified lines
327	327	static const unsigned int argument_offs[] = {
328	328	#ifdef __i386__
329	329	offsetof(struct pt_regs, ax),
330		− offsetof(struct pt_regs, cx),
331	330	offsetof(struct pt_regs, dx),
	331	+ offsetof(struct pt_regs, cx),
332	332	#define NR_REG_ARGUMENTS 3
333	333	#else
334	334	offsetof(struct pt_regs, di),

arch/x86/kernel/alternative.c+1−1

@@ -239,7 +239,7 @@ void __init arch_init_ideal_nops(void) · 238 unmodified lines
239	239	return;
240	240	}
241	241
242		− /* fall through */
	242	+ fallthrough;
243	243
244	244	default:
245	245	#ifdef CONFIG_X86_64

arch/x86/kernel/apic/io_apic.c+2−2

@@ -800,7 +800,7 @@ static int irq_polarity(int idx) · 799 unmodified lines
800	800	return IOAPIC_POL_HIGH;
801	801	case MP_IRQPOL_RESERVED:
802	802	pr_warn("IOAPIC: Invalid polarity: 2, defaulting to low\n");
803		− /* fall through */
	803	+ fallthrough;
804	804	case MP_IRQPOL_ACTIVE_LOW:
805	805	default: /* Pointless default required due to do gcc stupidity */
806	806	return IOAPIC_POL_LOW;
@@ -848,7 +848,7 @@ static int irq_trigger(int idx) · 41 unmodified lines
848	848	return IOAPIC_EDGE;
849	849	case MP_IRQTRIG_RESERVED:
850	850	pr_warn("IOAPIC: Invalid trigger mode 2 defaulting to level\n");
851		− /* fall through */
	851	+ fallthrough;
852	852	case MP_IRQTRIG_LEVEL:
853	853	default: /* Pointless default required due to do gcc stupidity */
854	854	return IOAPIC_LEVEL;

arch/x86/kernel/apic/probe_32.c+1−1

@@ -149,7 +149,7 @@ void __init default_setup_apic_routing(void) · 148 unmodified lines
149	149	break;
150	150	}
151	151	/* P4 and above */
152		− /* fall through */
	152	+ fallthrough;
153	153	case X86_VENDOR_HYGON:
154	154	case X86_VENDOR_AMD:
155	155	def_to_bigsmp = 1;

arch/x86/kernel/apic/vector.c+9−7

@@ -161,6 +161,7 @@ static void apic_update_vector(struct irq_data *irqd, unsigned int newvec, · 160 unmodified lines
161	161	apicd->move_in_progress = true;
162	162	apicd->prev_vector = apicd->vector;
163	163	apicd->prev_cpu = apicd->cpu;
	164	+ WARN_ON_ONCE(apicd->cpu == newcpu);
164	165	} else {
165	166	irq_matrix_free(vector_matrix, apicd->cpu, apicd->vector,
166	167	managed);
@@ -910,7 +911,7 @@ void send_cleanup_vector(struct irq_cfg *cfg) · 743 unmodified lines
910	911	__send_cleanup_vector(apicd);
911	912	}
912	913
913		−static void __irq_complete_move(struct irq_cfg *cfg, unsigned vector)
	914	+void irq_complete_move(struct irq_cfg *cfg)
914	915	{
915	916	struct apic_chip_data *apicd;
916	917
@@ -918,15 +919,16 @@ static void __irq_complete_move(struct irq_cfg *cfg, unsigned vector) · 1 unmodified line
918	919	if (likely(!apicd->move_in_progress))
919	920	return;
920	921
921		− if (vector == apicd->vector && apicd->cpu == smp_processor_id())
	922	+ /*
	923	+ * If the interrupt arrived on the new target CPU, cleanup the
	924	+ * vector on the old target CPU. A vector check is not required
	925	+ * because an interrupt can never move from one vector to another
	926	+ * on the same CPU.
	927	+ */
	928	+ if (apicd->cpu == smp_processor_id())
922	929	__send_cleanup_vector(apicd);
923	930	}
924	931
925		−void irq_complete_move(struct irq_cfg *cfg)
926		−{
927		− __irq_complete_move(cfg, ~get_irq_regs()->orig_ax);
928		−}
929		−
930	932	/*
931	933	* Called from fixup_irqs() with @desc->lock held and interrupts disabled.
932	934	*/

arch/x86/kernel/cpu/cacheinfo.c+1−1

@@ -248,7 +248,7 @@ amd_cpuid4(int leaf, union _cpuid4_leaf_eax *eax, · 247 unmodified lines
248	248	switch (leaf) {
249	249	case 1:
250	250	l1 = &l1i;
251		− /* fall through */
	251	+ fallthrough;
252	252	case 0:
253	253	if (!l1->val)
254	254	return;

arch/x86/kernel/cpu/mce/inject.c+1−1

@@ -199,7 +199,7 @@ static int raise_local(void) · 198 unmodified lines
199	199	* calling irq_enter, but the necessary
200	200	* machinery isn't exported currently.
201	201	*/
202		− /FALL THROUGH/
	202	+ fallthrough;
203	203	case MCJ_CTX_PROCESS:
204	204	raise_exception(m, NULL);
205	205	break;

arch/x86/kernel/cpu/mce/intel.c+1−1

@@ -193,7 +193,7 @@ unsigned long cmci_intel_adjust_timer(unsigned long interval) · 192 unmodified lines
193	193	if (!atomic_sub_return(1, &cmci_storm_on_cpus))
194	194	pr_notice("CMCI storm subsided: switching to interrupt mode\n");
195	195
196		− /* FALLTHROUGH */
	196	+ fallthrough;
197	197
198	198	case CMCI_STORM_SUBSIDED:
199	199	/*

arch/x86/kernel/cpu/mtrr/cyrix.c+1−1

@@ -98,7 +98,7 @@ cyrix_get_free_region(unsigned long base, unsigned long size, int replace_reg) · 97 unmodified lines
98	98	case 7:
99	99	if (size < 0x40)
100	100	break;
101		− /* Else, fall through */
	101	+ fallthrough;
102	102	case 6:
103	103	case 5:
104	104	case 4:

arch/x86/kernel/hw_breakpoint.c+1−1

@@ -349,7 +349,7 @@ static int arch_build_bp_info(struct perf_event *bp, · 348 unmodified lines
349	349	hw->len = X86_BREAKPOINT_LEN_X;
350	350	return 0;
351	351	}
352		− /* fall through */
	352	+ fallthrough;
353	353	default:
354	354	return -EINVAL;
355	355	}

arch/x86/kernel/kgdb.c+2−2

@@ -450,7 +450,7 @@ int kgdb_arch_handle_exception(int e_vector, int signo, int err_code, · 449 unmodified lines
450	450	ptr = &remcomInBuffer[1];
451	451	if (kgdb_hex2long(&ptr, &addr))
452	452	linux_regs->ip = addr;
453		− /* fall through */
	453	+ fallthrough;
454	454	case 'D':
455	455	case 'k':
456	456	/* clear the trace bit */
@@ -539,7 +539,7 @@ static int __kgdb_notify(struct die_args *args, unsigned long cmd) · 82 unmodified lines
539	539	* a system call which should be ignored
540	540	*/
541	541	return NOTIFY_DONE;
542		− /* fall through */
	542	+ fallthrough;
543	543	default:
544	544	if (user_mode(regs))
545	545	return NOTIFY_DONE;

arch/x86/kernel/mpparse.c+2−2

@@ -312,7 +312,7 @@ static void __init construct_default_ioirq_mptable(int mpc_default_type) · 311 unmodified lines
312	312	case 2:
313	313	if (i == 0 \|\| i == 13)
314	314	continue; /* IRQ0 & IRQ13 not connected */
315		− /* fall through */
	315	+ fallthrough;
316	316	default:
317	317	if (i == 2)
318	318	continue; /* IRQ2 is never connected */
@@ -356,7 +356,7 @@ static void __init construct_ioapic_table(int mpc_default_type) · 37 unmodified lines
356	356	default:
357	357	pr_err("???\nUnknown standard configuration %d\n",
358	358	mpc_default_type);
359		− /* fall through */
	359	+ fallthrough;
360	360	case 1:
361	361	case 5:
362	362	memcpy(bus.bustype, "ISA ", 6);

arch/x86/kernel/process.c+0−4

@@ -684,9 +684,7 @@ void arch_cpu_idle(void) · 683 unmodified lines
684	684	*/
685	685	void __cpuidle default_idle(void)
686	686	{
687		− trace_cpu_idle_rcuidle(1, smp_processor_id());
688	687	safe_halt();
689		− trace_cpu_idle_rcuidle(PWR_EVENT_EXIT, smp_processor_id());
690	688	}
691	689	#if defined(CONFIG_APM_MODULE) \|\| defined(CONFIG_HALTPOLL_CPUIDLE_MODULE)
692	690	EXPORT_SYMBOL(default_idle);
@@ -792,7 +790,6 @@ static int prefer_mwait_c1_over_halt(const struct cpuinfo_x86 *c) · 99 unmodified lines
792	790	static __cpuidle void mwait_idle(void)
793	791	{
794	792	if (!current_set_polling_and_test()) {
795		− trace_cpu_idle_rcuidle(1, smp_processor_id());
796	793	if (this_cpu_has(X86_BUG_CLFLUSH_MONITOR)) {
797	794	mb(); /* quirk */
798	795	clflush((void *)&current_thread_info()->flags);
@@ -804,7 +801,6 @@ static __cpuidle void mwait_idle(void) · 5 unmodified lines
804	801	__sti_mwait(0, 0);
805	802	else
806	803	local_irq_enable();
807		− trace_cpu_idle_rcuidle(PWR_EVENT_EXIT, smp_processor_id());
808	804	} else {
809	805	local_irq_enable();
810	806	}

arch/x86/kernel/ptrace.c+1−1

@@ -204,7 +204,7 @@ static int set_segment_reg(struct task_struct *task, · 203 unmodified lines
204	204	case offsetof(struct user_regs_struct, ss):
205	205	if (unlikely(value == 0))
206	206	return -EIO;
207		− /* Else, fall through */
	207	+ fallthrough;
208	208
209	209	default:
210	210	*pt_regs_access(task_pt_regs(task), offset) = value;

arch/x86/kernel/reboot.c+1−1

@@ -654,7 +654,7 @@ static void native_machine_emergency_restart(void) · 653 unmodified lines
654	654
655	655	case BOOT_CF9_FORCE:
656	656	port_cf9_safe = true;
657		− /* Fall through */
	657	+ fallthrough;
658	658
659	659	case BOOT_CF9_SAFE:
660	660	if (port_cf9_safe) {

arch/x86/kernel/signal.c+1−1

@@ -726,7 +726,7 @@ handle_signal(struct ksignal ksig, struct pt_regs regs) · 725 unmodified lines
726	726	regs->ax = -EINTR;
727	727	break;
728	728	}
729		− /* fallthrough */
	729	+ fallthrough;
730	730	case -ERESTARTNOINTR:
731	731	regs->ax = regs->orig_ax;
732	732	regs->ip -= 2;

arch/x86/kernel/smpboot.c+20−6

@@ -1594,14 +1594,28 @@ int native_cpu_disable(void) · 1593 unmodified lines
1594	1594	if (ret)
1595	1595	return ret;
1596	1596
1597		− /*
1598		− * Disable the local APIC. Otherwise IPI broadcasts will reach
1599		− * it. It still responds normally to INIT, NMI, SMI, and SIPI
1600		− * messages.
1601		− */
1602		− apic_soft_disable();
1603	1597	cpu_disable_common();
1604	1598
	1599	+ /*
	1600	+ * Disable the local APIC. Otherwise IPI broadcasts will reach
	1601	+ * it. It still responds normally to INIT, NMI, SMI, and SIPI
	1602	+ * messages.
	1603	+ *
	1604	+ * Disabling the APIC must happen after cpu_disable_common()
	1605	+ * which invokes fixup_irqs().
	1606	+ *
	1607	+ * Disabling the APIC preserves already set bits in IRR, but
	1608	+ * an interrupt arriving after disabling the local APIC does not
	1609	+ * set the corresponding IRR bit.
	1610	+ *
	1611	+ * fixup_irqs() scans IRR for set bits so it can raise a not
	1612	+ * yet handled interrupt on the new destination CPU via an IPI
	1613	+ * but obviously it can't do so for IRR bits which are not set.
	1614	+ * IOW, interrupts arriving after disabling the local APIC will
	1615	+ * be lost.
	1616	+ */
	1617	+ apic_soft_disable();
	1618	+
1605	1619	return 0;
1606	1620	}
1607	1621

arch/x86/kernel/traps.c+31−34

@@ -729,20 +729,9 @@ static bool is_sysenter_singlestep(struct pt_regs *regs) · 728 unmodified lines
729	729	#endif
730	730	}
731	731
732		−static __always_inline void debug_enter(unsigned long dr6, unsigned long dr7)
	732	+static __always_inline unsigned long debug_read_clear_dr6(void)
733	733	{
734		− /*
735		− * Disable breakpoints during exception handling; recursive exceptions
736		− * are exceedingly 'fun'.
737		− *
738		− * Since this function is NOKPROBE, and that also applies to
739		− * HW_BREAKPOINT_X, we can't hit a breakpoint before this (XXX except a
740		− * HW_BREAKPOINT_W on our stack)
741		− *
742		− * Entry text is excluded for HW_BP_X and cpu_entry_area, which
743		− * includes the entry stack is excluded for everything.
744		− */
745		− *dr7 = local_db_save();
	734	+ unsigned long dr6;
746	735
747	736	/*
748	737	* The Intel SDM says:
@@ -755,15 +744,12 @@ static __always_inline void debug_enter(unsigned long dr6, unsigned long dr7) · 6 unmodified lines
755	744	*
756	745	* Keep it simple: clear DR6 immediately.
757	746	*/
758		− get_debugreg(*dr6, 6);
	747	+ get_debugreg(dr6, 6);
759	748	set_debugreg(0, 6);
760	749	/* Filter out all the reserved bits which are preset to 1 */
761		− *dr6 &= ~DR6_RESERVED;
762		−}
	750	+ dr6 &= ~DR6_RESERVED;
763	751
764		−static __always_inline void debug_exit(unsigned long dr7)
765		−{
766		− local_db_restore(dr7);
	752	+ return dr6;
767	753	}
768	754
769	755	/*
@@ -863,6 +849,18 @@ out: · 93 unmodified lines
863	849	static __always_inline void exc_debug_kernel(struct pt_regs *regs,
864	850	unsigned long dr6)
865	851	{
	852	+ /*
	853	+ * Disable breakpoints during exception handling; recursive exceptions
	854	+ * are exceedingly 'fun'.
	855	+ *
	856	+ * Since this function is NOKPROBE, and that also applies to
	857	+ * HW_BREAKPOINT_X, we can't hit a breakpoint before this (XXX except a
	858	+ * HW_BREAKPOINT_W on our stack)
	859	+ *
	860	+ * Entry text is excluded for HW_BP_X and cpu_entry_area, which
	861	+ * includes the entry stack is excluded for everything.
	862	+ */
	863	+ unsigned long dr7 = local_db_save();
866	864	bool irq_state = idtentry_enter_nmi(regs);
867	865	instrumentation_begin();
868	866
@@ -883,6 +881,8 @@ static __always_inline void exc_debug_kernel(struct pt_regs *regs, · 14 unmodified lines
883	881
884	882	instrumentation_end();
885	883	idtentry_exit_nmi(regs, irq_state);
	884	+
	885	+ local_db_restore(dr7);
886	886	}
887	887
888	888	static __always_inline void exc_debug_user(struct pt_regs *regs,
@@ -894,6 +894,15 @@ static __always_inline void exc_debug_user(struct pt_regs *regs, · 5 unmodified lines
894	894	*/
895	895	WARN_ON_ONCE(!user_mode(regs));
896	896
	897	+ /*
	898	+ * NB: We can't easily clear DR7 here because
	899	+ * idtentry_exit_to_usermode() can invoke ptrace, schedule, access
	900	+ * user memory, etc. This means that a recursive #DB is possible. If
	901	+ * this happens, that #DB will hit exc_debug_kernel() and clear DR7.
	902	+ * Since we're not on the IST stack right now, everything will be
	903	+ * fine.
	904	+ */
	905	+
897	906	irqentry_enter_from_user_mode(regs);
898	907	instrumentation_begin();
899	908
@@ -907,36 +916,24 @@ static __always_inline void exc_debug_user(struct pt_regs *regs, · 7 unmodified lines
907	916	/* IST stack entry */
908	917	DEFINE_IDTENTRY_DEBUG(exc_debug)
909	918	{
910		− unsigned long dr6, dr7;
911		−
912		− debug_enter(&dr6, &dr7);
913		− exc_debug_kernel(regs, dr6);
914		− debug_exit(dr7);
	919	+ exc_debug_kernel(regs, debug_read_clear_dr6());
915	920	}
916	921
917	922	/* User entry, runs on regular task stack */
918	923	DEFINE_IDTENTRY_DEBUG_USER(exc_debug)
919	924	{
920		− unsigned long dr6, dr7;
921		−
922		− debug_enter(&dr6, &dr7);
923		− exc_debug_user(regs, dr6);
924		− debug_exit(dr7);
	925	+ exc_debug_user(regs, debug_read_clear_dr6());
925	926	}
926	927	#else
927	928	/* 32 bit does not have separate entry points. */
928	929	DEFINE_IDTENTRY_RAW(exc_debug)
929	930	{
930		− unsigned long dr6, dr7;
931		−
932		− debug_enter(&dr6, &dr7);
	931	+ unsigned long dr6 = debug_read_clear_dr6();
933	932
934	933	if (user_mode(regs))
935	934	exc_debug_user(regs, dr6);
936	935	else
937	936	exc_debug_kernel(regs, dr6);
938		−
939		− debug_exit(dr7);
940	937	}
941	938	#endif
942	939

arch/x86/kernel/uprobes.c+2−2

@@ -735,7 +735,7 @@ static int branch_setup_xol_ops(struct arch_uprobe auprobe, struct insn insn) · 734 unmodified lines
735	735	* OPCODE1() of the "short" jmp which checks the same condition.
736	736	*/
737	737	opc1 = OPCODE2(insn) - 0x10;
738		− /* fall through */
	738	+ fallthrough;
739	739	default:
740	740	if (!is_cond_jmp_opcode(opc1))
741	741	return -ENOSYS;
@@ -892,7 +892,7 @@ int arch_uprobe_analyze_insn(struct arch_uprobe auprobe, struct mm_struct mm, · 150 unmodified lines
892	892	fix_ip_or_call = 0;
893	893	break;
894	894	}
895		− /* fall through */
	895	+ fallthrough;
896	896	default:
897	897	riprel_analyze(auprobe, &insn);
898	898	}

arch/x86/kvm/emulate.c+1−1

@@ -3016,7 +3016,7 @@ static void string_registers_quirk(struct x86_emulate_ctxt *ctxt) · 3015 unmodified lines
3016	3016	case 0xa4: /* movsb */
3017	3017	case 0xa5: /* movsd/w */
3018	3018	*reg_rmw(ctxt, VCPU_REGS_RSI) &= (u32)-1;
3019		− /* fall through */
	3019	+ fallthrough;
3020	3020	case 0xaa: /* stosb */
3021	3021	case 0xab: /* stosd/w */
3022	3022	*reg_rmw(ctxt, VCPU_REGS_RDI) &= (u32)-1;

arch/x86/kvm/hyperv.c+1−1

@@ -1779,7 +1779,7 @@ int kvm_hv_hypercall(struct kvm_vcpu *vcpu) · 1778 unmodified lines
1779	1779	ret = kvm_hvcall_signal_event(vcpu, fast, ingpa);
1780	1780	if (ret != HV_STATUS_INVALID_PORT_ID)
1781	1781	break;
1782		− /* fall through - maybe userspace knows this conn_id. */
	1782	+ fallthrough; /* maybe userspace knows this conn_id */
1783	1783	case HVCALL_POST_MESSAGE:
1784	1784	/* don't bother userspace if it has no way to handle it */
1785	1785	if (unlikely(rep \|\| !vcpu_to_synic(vcpu)->active)) {

arch/x86/kvm/irq_comm.c+1−1

@@ -285,7 +285,7 @@ int kvm_set_routing_entry(struct kvm *kvm, · 284 unmodified lines
285	285	switch (ue->u.irqchip.irqchip) {
286	286	case KVM_IRQCHIP_PIC_SLAVE:
287	287	e->irqchip.pin += PIC_NUM_PINS / 2;
288		− /* fall through */
	288	+ fallthrough;
289	289	case KVM_IRQCHIP_PIC_MASTER:
290	290	if (ue->u.irqchip.pin >= PIC_NUM_PINS / 2)
291	291	return -EINVAL;

arch/x86/kvm/lapic.c+3−3

@@ -1053,7 +1053,7 @@ static int __apic_accept_irq(struct kvm_lapic *apic, int delivery_mode, · 1052 unmodified lines
1053	1053	switch (delivery_mode) {
1054	1054	case APIC_DM_LOWEST:
1055	1055	vcpu->arch.apic_arb_prio++;
1056		− /* fall through */
	1056	+ fallthrough;
1057	1057	case APIC_DM_FIXED:
1058	1058	if (unlikely(trig_mode && !level))
1059	1059	break;
@@ -1341,7 +1341,7 @@ static u32 __apic_read(struct kvm_lapic *apic, unsigned int offset) · 281 unmodified lines
1341	1341	break;
1342	1342	case APIC_TASKPRI:
1343	1343	report_tpr_access(apic, false);
1344		− /* fall thru */
	1344	+ fallthrough;
1345	1345	default:
1346	1346	val = kvm_lapic_get_reg(apic, offset);
1347	1347	break;
@@ -2027,7 +2027,7 @@ int kvm_lapic_reg_write(struct kvm_lapic *apic, u32 reg, u32 val) · 679 unmodified lines
2027	2027
2028	2028	case APIC_LVT0:
2029	2029	apic_manage_nmi_watchdog(apic, val);
2030		− /* fall through */
	2030	+ fallthrough;
2031	2031	case APIC_LVTTHMR:
2032	2032	case APIC_LVTPC:
2033	2033	case APIC_LVT1:

arch/x86/kvm/mmu/mmu.c+1−1

@@ -4422,7 +4422,7 @@ __reset_rsvds_bits_mask(struct kvm_vcpu *vcpu, · 4421 unmodified lines
4422	4422	rsvd_bits(maxphyaddr, 51);
4423	4423	rsvd_check->rsvd_bits_mask[1][4] =
4424	4424	rsvd_check->rsvd_bits_mask[0][4];
4425		− /* fall through */
	4425	+ fallthrough;
4426	4426	case PT64_ROOT_4LEVEL:
4427	4427	rsvd_check->rsvd_bits_mask[0][3] = exb_bit_rsvd \|
4428	4428	nonleaf_bit8_rsvd \| rsvd_bits(7, 7) \|

arch/x86/kvm/svm/svm.c+1−1

@@ -2668,7 +2668,7 @@ static int svm_set_msr(struct kvm_vcpu vcpu, struct msr_data msr) · 2667 unmodified lines
2668	2668	case MSR_IA32_APICBASE:
2669	2669	if (kvm_vcpu_apicv_active(vcpu))
2670	2670	avic_update_vapic_bar(to_svm(vcpu), data);
2671		− /* Fall through */
	2671	+ fallthrough;
2672	2672	default:
2673	2673	return kvm_set_msr_common(vcpu, msr);
2674	2674	}

arch/x86/kvm/vmx/vmx.c+6−6

@@ -4654,7 +4654,7 @@ static bool rmode_exception(struct kvm_vcpu *vcpu, int vec) · 4653 unmodified lines
4654	4654	vmcs_read32(VM_EXIT_INSTRUCTION_LEN);
4655	4655	if (vcpu->guest_debug & KVM_GUESTDBG_USE_SW_BP)
4656	4656	return false;
4657		− /* fall through */
	4657	+ fallthrough;
4658	4658	case DB_VECTOR:
4659	4659	return !(vcpu->guest_debug &
4660	4660	(KVM_GUESTDBG_SINGLESTEP \| KVM_GUESTDBG_USE_HW_BP));
@@ -4827,7 +4827,7 @@ static int handle_exception_nmi(struct kvm_vcpu *vcpu) · 166 unmodified lines
4827	4827	}
4828	4828	kvm_run->debug.arch.dr6 = dr6 \| DR6_FIXED_1 \| DR6_RTM;
4829	4829	kvm_run->debug.arch.dr7 = vmcs_readl(GUEST_DR7);
4830		− /* fall through */
	4830	+ fallthrough;
4831	4831	case BP_VECTOR:
4832	4832	/*
4833	4833	* Update instruction length as we may reinject #BP from
@@ -5257,7 +5257,7 @@ static int handle_task_switch(struct kvm_vcpu *vcpu) · 423 unmodified lines
5257	5257	error_code =
5258	5258	vmcs_read32(IDT_VECTORING_ERROR_CODE);
5259	5259	}
5260		− /* fall through */
	5260	+ fallthrough;
5261	5261	case INTR_TYPE_SOFT_EXCEPTION:
5262	5262	kvm_clear_exception_queue(vcpu);
5263	5263	break;
@@ -5610,7 +5610,7 @@ static int handle_invpcid(struct kvm_vcpu *vcpu) · 346 unmodified lines
5610	5610	* keeping track of global entries in shadow page tables.
5611	5611	*/
5612	5612
5613		− /* fall-through */
	5613	+ fallthrough;
5614	5614	case INVPCID_TYPE_ALL_INCL_GLOBAL:
5615	5615	kvm_mmu_unload(vcpu);
5616	5616	return kvm_skip_emulated_instruction(vcpu);
@@ -6578,7 +6578,7 @@ static void __vmx_complete_interrupts(struct kvm_vcpu *vcpu, · 961 unmodified lines
6578	6578	break;
6579	6579	case INTR_TYPE_SOFT_EXCEPTION:
6580	6580	vcpu->arch.event_exit_inst_len = vmcs_read32(instr_len_field);
6581		− /* fall through */
	6581	+ fallthrough;
6582	6582	case INTR_TYPE_HARD_EXCEPTION:
6583	6583	if (idt_vectoring_info & VECTORING_INFO_DELIVER_CODE_MASK) {
6584	6584	u32 err = vmcs_read32(error_code_field);
@@ -6588,7 +6588,7 @@ static void __vmx_complete_interrupts(struct kvm_vcpu *vcpu, · 3 unmodified lines
6588	6588	break;
6589	6589	case INTR_TYPE_SOFT_INTR:
6590	6590	vcpu->arch.event_exit_inst_len = vmcs_read32(instr_len_field);
6591		− /* fall through */
	6591	+ fallthrough;
6592	6592	case INTR_TYPE_EXT_INTR:
6593	6593	kvm_queue_interrupt(vcpu, vector, type == INTR_TYPE_SOFT_INTR);
6594	6594	break;

arch/x86/kvm/x86.c+4−7

@@ -1116,14 +1116,12 @@ static int __kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val) · 1115 unmodified lines
1116	1116	vcpu->arch.eff_db[dr] = val;
1117	1117	break;
1118	1118	case 4:
1119		− /* fall through */
1120	1119	case 6:
1121	1120	if (!kvm_dr6_valid(val))
1122	1121	return -1; /* #GP */
1123	1122	vcpu->arch.dr6 = (val & DR6_VOLATILE) \| kvm_dr6_fixed(vcpu);
1124	1123	break;
1125	1124	case 5:
1126		− /* fall through */
1127	1125	default: /* 7 */
1128	1126	if (!kvm_dr7_valid(val))
1129	1127	return -1; /* #GP */
@@ -1154,12 +1152,10 @@ int kvm_get_dr(struct kvm_vcpu vcpu, int dr, unsigned long val) · 24 unmodified lines
1154	1152	*val = vcpu->arch.db[array_index_nospec(dr, size)];
1155	1153	break;
1156	1154	case 4:
1157		− /* fall through */
1158	1155	case 6:
1159	1156	*val = vcpu->arch.dr6;
1160	1157	break;
1161	1158	case 5:
1162		− /* fall through */
1163	1159	default: /* 7 */
1164	1160	*val = vcpu->arch.dr7;
1165	1161	break;
@@ -3051,7 +3047,8 @@ int kvm_set_msr_common(struct kvm_vcpu vcpu, struct msr_data msr_info) · 1885 unmodified lines
3051	3047
3052	3048	case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
3053	3049	case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
3054		− pr = true; /* fall through */
	3050	+ pr = true;
	3051	+ fallthrough;
3055	3052	case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
3056	3053	case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
3057	3054	if (kvm_pmu_is_valid_msr(vcpu, msr))
@@ -4359,7 +4356,7 @@ static int kvm_vcpu_ioctl_enable_cap(struct kvm_vcpu *vcpu, · 1301 unmodified lines
4359	4356	case KVM_CAP_HYPERV_SYNIC2:
4360	4357	if (cap->args[0])
4361	4358	return -EINVAL;
4362		− /* fall through */
	4359	+ fallthrough;
4363	4360
4364	4361	case KVM_CAP_HYPERV_SYNIC:
4365	4362	if (!irqchip_in_kernel(vcpu->kvm))
@@ -8672,7 +8669,7 @@ static inline int vcpu_block(struct kvm kvm, struct kvm_vcpu vcpu) · 4306 unmodified lines
8672	8669	vcpu->arch.pv.pv_unhalted = false;
8673	8670	vcpu->arch.mp_state =
8674	8671	KVM_MP_STATE_RUNNABLE;
8675		− /* fall through */
	8672	+ fallthrough;
8676	8673	case KVM_MP_STATE_RUNNABLE:
8677	8674	vcpu->arch.apf.halted = false;
8678	8675	break;

arch/x86/lib/Makefile+1−1

@@ -24,7 +24,7 @@ ifdef CONFIG_FUNCTION_TRACER · 23 unmodified lines
24	24	CFLAGS_REMOVE_cmdline.o = -pg
25	25	endif
26	26
27		−CFLAGS_cmdline.o := -fno-stack-protector
	27	+CFLAGS_cmdline.o := -fno-stack-protector -fno-jump-tables
28	28	endif
29	29
30	30	inat_tables_script = $(srctree)/arch/x86/tools/gen-insn-attr-x86.awk

arch/x86/lib/cmdline.c+4−4

@@ -58,7 +58,7 @@ __cmdline_find_option_bool(const char *cmdline, int max_cmdline_size, · 57 unmodified lines
58	58	state = st_wordcmp;
59	59	opptr = option;
60	60	wstart = pos;
61		− /* fall through */
	61	+ fallthrough;
62	62
63	63	case st_wordcmp:
64	64	if (!*opptr) {
@@ -89,7 +89,7 @@ __cmdline_find_option_bool(const char *cmdline, int max_cmdline_size, · 24 unmodified lines
89	89	break;
90	90	}
91	91	state = st_wordskip;
92		− /* fall through */
	92	+ fallthrough;
93	93
94	94	case st_wordskip:
95	95	if (!c)
@@ -151,7 +151,7 @@ __cmdline_find_option(const char *cmdline, int max_cmdline_size, · 55 unmodified lines
151	151
152	152	state = st_wordcmp;
153	153	opptr = option;
154		− /* fall through */
	154	+ fallthrough;
155	155
156	156	case st_wordcmp:
157	157	if ((c == '=') && !*opptr) {
@@ -172,7 +172,7 @@ __cmdline_find_option(const char *cmdline, int max_cmdline_size, · 14 unmodified lines
172	172	break;
173	173	}
174	174	state = st_wordskip;
175		− /* fall through */
	175	+ fallthrough;
176	176
177	177	case st_wordskip:
178	178	if (myisspace(c))

arch/x86/lib/insn-eval.c+2−4

@@ -179,7 +179,7 @@ static int resolve_default_seg(struct insn insn, struct pt_regs regs, int off) · 178 unmodified lines
179	179	if (insn->addr_bytes == 2)
180	180	return -EINVAL;
181	181
182		− /* fall through */
	182	+ fallthrough;
183	183
184	184	case -EDOM:
185	185	case offsetof(struct pt_regs, bx):
@@ -362,7 +362,6 @@ static short get_segment_selector(struct pt_regs *regs, int seg_reg_idx) · 176 unmodified lines
362	362	case INAT_SEG_REG_GS:
363	363	return vm86regs->gs;
364	364	case INAT_SEG_REG_IGNORE:
365		− /* fall through */
366	365	default:
367	366	return -EINVAL;
368	367	}
@@ -386,7 +385,6 @@ static short get_segment_selector(struct pt_regs *regs, int seg_reg_idx) · 17 unmodified lines
386	385	*/
387	386	return get_user_gs(regs);
388	387	case INAT_SEG_REG_IGNORE:
389		− /* fall through */
390	388	default:
391	389	return -EINVAL;
392	390	}
@@ -786,7 +784,7 @@ int insn_get_code_seg_params(struct pt_regs *regs) · 393 unmodified lines
786	784	*/
787	785	return INSN_CODE_SEG_PARAMS(4, 8);
788	786	case 3: /* Invalid setting. CS.L=1, CS.D=1 */
789		− /* fall through */
	787	+ fallthrough;
790	788	default:
791	789	return -EINVAL;
792	790	}

arch/x86/math-emu/errors.c+1−1

@@ -186,7 +186,7 @@ void FPU_printall(void) · 185 unmodified lines
186	186	case TAG_Special:
187	187	/* Update tagi for the printk below */
188	188	tagi = FPU_Special(r);
189		− /* fall through */
	189	+ fallthrough;
190	190	case TAG_Valid:
191	191	printk("st(%d) %c .%04lx %04lx %04lx %04lx e%+-6d ", i,
192	192	getsign(r) ? '-' : '+',

arch/x86/math-emu/fpu_trig.c+1−1

@@ -1352,7 +1352,7 @@ static void fyl2xp1(FPU_REG *st0_ptr, u_char st0_tag) · 1351 unmodified lines
1352	1352	case TW_Denormal:
1353	1353	if (denormal_operand() < 0)
1354	1354	return;
1355		− /* fall through */
	1355	+ fallthrough;
1356	1356	case TAG_Zero:
1357	1357	case TAG_Valid:
1358	1358	setsign(st0_ptr, getsign(st0_ptr) ^ getsign(st1_ptr));

arch/x86/mm/fault.c+78−0

@@ -190,6 +190,53 @@ static inline pmd_t vmalloc_sync_one(pgd_t pgd, unsigned long address) · 189 unmodified lines
190	190	return pmd_k;
191	191	}
192	192
	193	+/*
	194	+ * Handle a fault on the vmalloc or module mapping area
	195	+ *
	196	+ * This is needed because there is a race condition between the time
	197	+ * when the vmalloc mapping code updates the PMD to the point in time
	198	+ * where it synchronizes this update with the other page-tables in the
	199	+ * system.
	200	+ *
	201	+ * In this race window another thread/CPU can map an area on the same
	202	+ * PMD, finds it already present and does not synchronize it with the
	203	+ * rest of the system yet. As a result v[mz]alloc might return areas
	204	+ * which are not mapped in every page-table in the system, causing an
	205	+ * unhandled page-fault when they are accessed.
	206	+ */
	207	+static noinline int vmalloc_fault(unsigned long address)
	208	+{
	209	+ unsigned long pgd_paddr;
	210	+ pmd_t *pmd_k;
	211	+ pte_t *pte_k;
	212	+
	213	+ /* Make sure we are in vmalloc area: */
	214	+ if (!(address >= VMALLOC_START && address < VMALLOC_END))
	215	+ return -1;
	216	+
	217	+ /*
	218	+ * Synchronize this task's top level page-table
	219	+ * with the 'reference' page table.
	220	+ *
	221	+ * Do _not_ use "current" here. We might be inside
	222	+ * an interrupt in the middle of a task switch..
	223	+ */
	224	+ pgd_paddr = read_cr3_pa();
	225	+ pmd_k = vmalloc_sync_one(__va(pgd_paddr), address);
	226	+ if (!pmd_k)
	227	+ return -1;
	228	+
	229	+ if (pmd_large(*pmd_k))
	230	+ return 0;
	231	+
	232	+ pte_k = pte_offset_kernel(pmd_k, address);
	233	+ if (!pte_present(*pte_k))
	234	+ return -1;
	235	+
	236	+ return 0;
	237	+}
	238	+NOKPROBE_SYMBOL(vmalloc_fault);
	239	+
193	240	void arch_sync_kernel_mappings(unsigned long start, unsigned long end)
194	241	{
195	242	unsigned long addr;
@@ -1110,6 +1157,37 @@ do_kern_addr_fault(struct pt_regs *regs, unsigned long hw_error_code, · 914 unmodified lines
1110	1157	*/
1111	1158	WARN_ON_ONCE(hw_error_code & X86_PF_PK);
1112	1159
	1160	+#ifdef CONFIG_X86_32
	1161	+ /*
	1162	+ * We can fault-in kernel-space virtual memory on-demand. The
	1163	+ * 'reference' page table is init_mm.pgd.
	1164	+ *
	1165	+ * NOTE! We MUST NOT take any locks for this case. We may
	1166	+ * be in an interrupt or a critical region, and should
	1167	+ * only copy the information from the master page table,
	1168	+ * nothing more.
	1169	+ *
	1170	+ * Before doing this on-demand faulting, ensure that the
	1171	+ * fault is not any of the following:
	1172	+ * 1. A fault on a PTE with a reserved bit set.
	1173	+ * 2. A fault caused by a user-mode access. (Do not demand-
	1174	+ * fault kernel memory due to user-mode accesses).
	1175	+ * 3. A fault caused by a page-level protection violation.
	1176	+ * (A demand fault would be on a non-present page which
	1177	+ * would have X86_PF_PROT==0).
	1178	+ *
	1179	+ * This is only needed to close a race condition on x86-32 in
	1180	+ * the vmalloc mapping/unmapping code. See the comment above
	1181	+ * vmalloc_fault() for details. On x86-64 the race does not
	1182	+ * exist as the vmalloc mappings don't need to be synchronized
	1183	+ * there.
	1184	+ */
	1185	+ if (!(hw_error_code & (X86_PF_RSVD \| X86_PF_USER \| X86_PF_PROT))) {
	1186	+ if (vmalloc_fault(address) >= 0)
	1187	+ return;
	1188	+ }
	1189	+#endif
	1190	+
1113	1191	/* Was the fault spurious, caused by lazy TLB invalidation? */
1114	1192	if (spurious_kernel_fault(hw_error_code, address))
1115	1193	return;

arch/x86/mm/ioremap.c+1−1

@@ -574,7 +574,7 @@ static bool memremap_should_map_decrypted(resource_size_t phys_addr, · 573 unmodified lines
574	574	/* For SEV, these areas are encrypted */
575	575	if (sev_active())
576	576	break;
577		− /* Fallthrough */
	577	+ fallthrough;
578	578
579	579	case E820_TYPE_PRAM:
580	580	return true;

arch/x86/mm/numa_emulation.c+1−1

@@ -321,7 +321,7 @@ static int __init split_nodes_size_interleave(struct numa_meminfo *ei, · 320 unmodified lines
321	321	u64 addr, u64 max_addr, u64 size)
322	322	{
323	323	return split_nodes_size_interleave_uniform(ei, pi, addr, max_addr, size,
324		− 0, NULL, NUMA_NO_NODE);
	324	+ 0, NULL, 0);
325	325	}
326	326
327	327	static int __init setup_emu2phys_nid(int *dfl_phys_nid)

arch/x86/mm/tlb.c+2−11

@@ -555,21 +555,12 @@ void switch_mm_irqs_off(struct mm_struct prev, struct mm_struct next, · 554 unmodified lines
555	555	this_cpu_write(cpu_tlbstate.ctxs[new_asid].tlb_gen, next_tlb_gen);
556	556	load_new_mm_cr3(next->pgd, new_asid, true);
557	557
558		− /*
559		− * NB: This gets called via leave_mm() in the idle path
560		− * where RCU functions differently. Tracing normally
561		− * uses RCU, so we need to use the _rcuidle variant.
562		− *
563		− * (There is no good reason for this. The idle code should
564		− * be rearranged to call this before rcu_idle_enter().)
565		− */
566		− trace_tlb_flush_rcuidle(TLB_FLUSH_ON_TASK_SWITCH, TLB_FLUSH_ALL);
	558	+ trace_tlb_flush(TLB_FLUSH_ON_TASK_SWITCH, TLB_FLUSH_ALL);
567	559	} else {
568	560	/* The new ASID is already up to date. */
569	561	load_new_mm_cr3(next->pgd, new_asid, false);
570	562
571		− /* See above wrt _rcuidle. */
572		− trace_tlb_flush_rcuidle(TLB_FLUSH_ON_TASK_SWITCH, 0);
	563	+ trace_tlb_flush(TLB_FLUSH_ON_TASK_SWITCH, 0);
573	564	}
574	565
575	566	/* Make sure we write CR3 before loaded_mm. */

arch/xtensa/kernel/signal.c+1−1

@@ -448,7 +448,7 @@ static void do_signal(struct pt_regs *regs) · 447 unmodified lines
448	448	regs->areg[2] = -EINTR;
449	449	break;
450	450	}
451		− /* fallthrough */
	451	+ fallthrough;
452	452	case -ERESTARTNOINTR:
453	453	regs->areg[2] = regs->syscall;
454	454	regs->pc -= 3;

block/badblocks.c+1−1

@@ -525,7 +525,7 @@ ssize_t badblocks_store(struct badblocks bb, const char page, size_t len, · 524 unmodified lines
525	525	case 3:
526	526	if (newline != '\n')
527	527	return -EINVAL;
528		− /* fall through */
	528	+ fallthrough;
529	529	case 2:
530	530	if (length <= 0)
531	531	return -EINVAL;

block/bfq-cgroup.c+1−1

@@ -332,7 +332,7 @@ static void bfqg_put(struct bfq_group *bfqg) · 331 unmodified lines
332	332	kfree(bfqg);
333	333	}
334	334
335		−void bfqg_and_blkg_get(struct bfq_group *bfqg)
	335	+static void bfqg_and_blkg_get(struct bfq_group *bfqg)
336	336	{
337	337	/* see comments in bfq_bic_update_cgroup for why refcounting bfqg */
338	338	bfqg_get(bfqg);

block/bfq-iosched.c+2−2

@@ -4980,7 +4980,7 @@ bfq_set_next_ioprio_data(struct bfq_queue bfqq, struct bfq_io_cq bic) · 4979 unmodified lines
4980	4980	pr_err("bdi %s: bfq: bad prio class %d\n",
4981	4981	bdi_dev_name(bfqq->bfqd->queue->backing_dev_info),
4982	4982	ioprio_class);
4983		− /* fall through */
	4983	+ fallthrough;
4984	4984	case IOPRIO_CLASS_NONE:
4985	4985	/*
4986	4986	* No prio set, inherit CPU scheduling settings.
@@ -5112,7 +5112,7 @@ static struct bfq_queue *bfq_async_queue_prio(struct bfq_data bfqd, · 125 unmodified lines
5112	5112	return &bfqg->async_bfqq[0][ioprio];
5113	5113	case IOPRIO_CLASS_NONE:
5114	5114	ioprio = IOPRIO_NORM;
5115		− /* fall through */
	5115	+ fallthrough;
5116	5116	case IOPRIO_CLASS_BE:
5117	5117	return &bfqg->async_bfqq[1][ioprio];
5118	5118	case IOPRIO_CLASS_IDLE:

block/bfq-iosched.h+0−1

@@ -986,7 +986,6 @@ struct bfq_group bfq_find_set_group(struct bfq_data bfqd, · 985 unmodified lines
986	986	struct blkcg_gq bfqg_to_blkg(struct bfq_group bfqg);
987	987	struct bfq_group bfqq_group(struct bfq_queue bfqq);
988	988	struct bfq_group bfq_create_group_hierarchy(struct bfq_data bfqd, int node);
989		−void bfqg_and_blkg_get(struct bfq_group *bfqg);
990	989	void bfqg_and_blkg_put(struct bfq_group *bfqg);
991	990
992	991	#ifdef CONFIG_BFQ_GROUP_IOSCHED

block/bfq-wf2q.c+2−10

@@ -533,9 +533,7 @@ static void bfq_get_entity(struct bfq_entity *entity) · 532 unmodified lines
533	533	bfqq->ref++;
534	534	bfq_log_bfqq(bfqq->bfqd, bfqq, "get_entity: %p %d",
535	535	bfqq, bfqq->ref);
536		− } else
537		− bfqg_and_blkg_get(container_of(entity, struct bfq_group,
538		− entity));
	536	+ }
539	537	}
540	538
541	539	/**
@@ -649,14 +647,8 @@ static void bfq_forget_entity(struct bfq_service_tree *st, · 107 unmodified lines
649	647
650	648	entity->on_st_or_in_serv = false;
651	649	st->wsum -= entity->weight;
652		− if (is_in_service)
653		− return;
654		−
655		− if (bfqq)
	650	+ if (bfqq && !is_in_service)
656	651	bfq_put_queue(bfqq);
657		− else
658		− bfqg_and_blkg_put(container_of(entity, struct bfq_group,
659		− entity));
660	652	}
661	653
662	654	/**

block/bio.c+5−5

@@ -740,8 +740,8 @@ static inline bool page_is_mergeable(const struct bio_vec *bv, · 739 unmodified lines
740	740	struct page *page, unsigned int len, unsigned int off,
741	741	bool *same_page)
742	742	{
743		− phys_addr_t vec_end_addr = page_to_phys(bv->bv_page) +
744		− bv->bv_offset + bv->bv_len - 1;
	743	+ size_t bv_end = bv->bv_offset + bv->bv_len;
	744	+ phys_addr_t vec_end_addr = page_to_phys(bv->bv_page) + bv_end - 1;
745	745	phys_addr_t page_addr = page_to_phys(page);
746	746
747	747	if (vec_end_addr + 1 != page_addr + off)
@@ -750,9 +750,9 @@ static inline bool page_is_mergeable(const struct bio_vec *bv, · 2 unmodified lines
750	750	return false;
751	751
752	752	*same_page = ((vec_end_addr & PAGE_MASK) == page_addr);
753		− if (!*same_page && pfn_to_page(PFN_DOWN(vec_end_addr)) + 1 != page)
754		− return false;
755		− return true;
	753	+ if (*same_page)
	754	+ return true;
	755	+ return (bv->bv_page + bv_end / PAGE_SIZE) == (page + off / PAGE_SIZE);
756	756	}
757	757
758	758	/*

block/blk-cgroup.c+5−3

@@ -1152,13 +1152,15 @@ int blkcg_init_queue(struct request_queue *q) · 1151 unmodified lines
1152	1152	if (preloaded)
1153	1153	radix_tree_preload_end();
1154	1154
1155		− ret = blk_iolatency_init(q);
	1155	+ ret = blk_throtl_init(q);
1156	1156	if (ret)
1157	1157	goto err_destroy_all;
1158	1158
1159		− ret = blk_throtl_init(q);
1160		− if (ret)
	1159	+ ret = blk_iolatency_init(q);
	1160	+ if (ret) {
	1161	+ blk_throtl_exit(q);
1161	1162	goto err_destroy_all;
	1163	+ }
1162	1164	return 0;
1163	1165
1164	1166	err_destroy_all:

block/blk-core.c+1−0

@@ -539,6 +539,7 @@ struct request_queue *blk_alloc_queue(int node_id) · 538 unmodified lines
539	539	goto fail_stats;
540	540
541	541	q->backing_dev_info->ra_pages = VM_READAHEAD_PAGES;
	542	+ q->backing_dev_info->io_pages = VM_READAHEAD_PAGES;
542	543	q->backing_dev_info->capabilities = BDI_CAP_CGROUP_WRITEBACK;
543	544	q->node = node_id;
544	545

block/blk-iocost.c+3−2

@@ -2092,14 +2092,15 @@ static void ioc_pd_free(struct blkg_policy_data *pd) · 2091 unmodified lines
2092	2092	{
2093	2093	struct ioc_gq *iocg = pd_to_iocg(pd);
2094	2094	struct ioc *ioc = iocg->ioc;
	2095	+ unsigned long flags;
2095	2096
2096	2097	if (ioc) {
2097		− spin_lock(&ioc->lock);
	2098	+ spin_lock_irqsave(&ioc->lock, flags);
2098	2099	if (!list_empty(&iocg->active_list)) {
2099	2100	propagate_active_weight(iocg, 0, 0);
2100	2101	list_del_init(&iocg->active_list);
2101	2102	}
2102		− spin_unlock(&ioc->lock);
	2103	+ spin_unlock_irqrestore(&ioc->lock, flags);
2103	2104
2104	2105	hrtimer_cancel(&iocg->waitq_timer);
2105	2106	hrtimer_cancel(&iocg->delay_timer);

block/blk-merge.c+10−3

@@ -154,7 +154,7 @@ static inline unsigned get_max_io_size(struct request_queue *q, · 153 unmodified lines
154	154	if (max_sectors > start_offset)
155	155	return max_sectors - start_offset;
156	156
157		− return sectors & (lbs - 1);
	157	+ return sectors & ~(lbs - 1);
158	158	}
159	159
160	160	static inline unsigned get_max_segment_size(const struct request_queue *q,
@@ -533,10 +533,17 @@ int __blk_rq_map_sg(struct request_queue q, struct request rq, · 372 unmodified lines
533	533	}
534	534	EXPORT_SYMBOL(__blk_rq_map_sg);
535	535
	536	+static inline unsigned int blk_rq_get_max_segments(struct request *rq)
	537	+{
	538	+ if (req_op(rq) == REQ_OP_DISCARD)
	539	+ return queue_max_discard_segments(rq->q);
	540	+ return queue_max_segments(rq->q);
	541	+}
	542	+
536	543	static inline int ll_new_hw_segment(struct request req, struct bio bio,
537	544	unsigned int nr_phys_segs)
538	545	{
539		− if (req->nr_phys_segments + nr_phys_segs > queue_max_segments(req->q))
	546	+ if (req->nr_phys_segments + nr_phys_segs > blk_rq_get_max_segments(req))
540	547	goto no_merge;
541	548
542	549	if (blk_integrity_merge_bio(req->q, req, bio) == false)
@@ -624,7 +631,7 @@ static int ll_merge_requests_fn(struct request_queue q, struct request req, · 81 unmodified lines
624	631	return 0;
625	632
626	633	total_phys_segments = req->nr_phys_segments + next->nr_phys_segments;
627		− if (total_phys_segments > queue_max_segments(q))
	634	+ if (total_phys_segments > blk_rq_get_max_segments(req))
628	635	return 0;
629	636
630	637	if (blk_integrity_merge_rq(q, req, next) == false)

block/blk-mq-sched.c+9−0

@@ -78,6 +78,15 @@ void blk_mq_sched_restart(struct blk_mq_hw_ctx *hctx) · 77 unmodified lines
78	78	return;
79	79	clear_bit(BLK_MQ_S_SCHED_RESTART, &hctx->state);
80	80
	81	+ /*
	82	+ * Order clearing SCHED_RESTART and list_empty_careful(&hctx->dispatch)
	83	+ * in blk_mq_run_hw_queue(). Its pair is the barrier in
	84	+ * blk_mq_dispatch_rq_list(). So dispatch code won't see SCHED_RESTART,
	85	+ * meantime new request added to hctx->dispatch is missed to check in
	86	+ * blk_mq_run_hw_queue().
	87	+ */
	88	+ smp_mb();
	89	+
81	90	blk_mq_run_hw_queue(hctx, true);
82	91	}
83	92

block/blk-mq.c+12−1

@@ -1437,6 +1437,15 @@ out: · 1436 unmodified lines
1437	1437	list_splice_tail_init(list, &hctx->dispatch);
1438	1438	spin_unlock(&hctx->lock);
1439	1439
	1440	+ /*
	1441	+ * Order adding requests to hctx->dispatch and checking
	1442	+ * SCHED_RESTART flag. The pair of this smp_mb() is the one
	1443	+ * in blk_mq_sched_restart(). Avoid restart code path to
	1444	+ * miss the new added requests to hctx->dispatch, meantime
	1445	+ * SCHED_RESTART is observed here.
	1446	+ */
	1447	+ smp_mb();
	1448	+
1440	1449	/*
1441	1450	* If SCHED_RESTART was set by the caller of this function and
1442	1451	* it is no longer set that means that it was cleared by another
@@ -1834,6 +1843,7 @@ void __blk_mq_insert_request(struct blk_mq_hw_ctx hctx, struct request rq, · 391 unmodified lines
1834	1843	/**
1835	1844	* blk_mq_request_bypass_insert - Insert a request at dispatch list.
1836	1845	* @rq: Pointer to request to be inserted.
	1846	+ * @at_head: true if the request should be inserted at the head of the list.
1837	1847	* @run_queue: If we should run the hardware queue after inserting the request.
1838	1848	*
1839	1849	* Should only be used carefully, when the caller knows we want to
@@ -2016,7 +2026,8 @@ insert: · 176 unmodified lines
2016	2026	if (bypass_insert)
2017	2027	return BLK_STS_RESOURCE;
2018	2028
2019		− blk_mq_request_bypass_insert(rq, false, run_queue);
	2029	+ blk_mq_sched_insert_request(rq, false, run_queue, false);
	2030	+
2020	2031	return BLK_STS_OK;
2021	2032	}
2022	2033

block/blk-stat.c+11−6

@@ -137,6 +137,7 @@ void blk_stat_add_callback(struct request_queue *q, · 136 unmodified lines
137	137	struct blk_stat_callback *cb)
138	138	{
139	139	unsigned int bucket;
	140	+ unsigned long flags;
140	141	int cpu;
141	142
142	143	for_each_possible_cpu(cpu) {
@@ -147,20 +148,22 @@ void blk_stat_add_callback(struct request_queue *q, · 4 unmodified lines
147	148	blk_rq_stat_init(&cpu_stat[bucket]);
148	149	}
149	150
150		− spin_lock(&q->stats->lock);
	151	+ spin_lock_irqsave(&q->stats->lock, flags);
151	152	list_add_tail_rcu(&cb->list, &q->stats->callbacks);
152	153	blk_queue_flag_set(QUEUE_FLAG_STATS, q);
153		− spin_unlock(&q->stats->lock);
	154	+ spin_unlock_irqrestore(&q->stats->lock, flags);
154	155	}
155	156
156	157	void blk_stat_remove_callback(struct request_queue *q,
157	158	struct blk_stat_callback *cb)
158	159	{
159		− spin_lock(&q->stats->lock);
	160	+ unsigned long flags;
	161	+
	162	+ spin_lock_irqsave(&q->stats->lock, flags);
160	163	list_del_rcu(&cb->list);
161	164	if (list_empty(&q->stats->callbacks) && !q->stats->enable_accounting)
162	165	blk_queue_flag_clear(QUEUE_FLAG_STATS, q);
163		− spin_unlock(&q->stats->lock);
	166	+ spin_unlock_irqrestore(&q->stats->lock, flags);
164	167
165	168	del_timer_sync(&cb->timer);
166	169	}
@@ -183,10 +186,12 @@ void blk_stat_free_callback(struct blk_stat_callback *cb) · 16 unmodified lines
183	186
184	187	void blk_stat_enable_accounting(struct request_queue *q)
185	188	{
186		− spin_lock(&q->stats->lock);
	189	+ unsigned long flags;
	190	+
	191	+ spin_lock_irqsave(&q->stats->lock, flags);
187	192	q->stats->enable_accounting = true;
188	193	blk_queue_flag_set(QUEUE_FLAG_STATS, q);
189		− spin_unlock(&q->stats->lock);
	194	+ spin_unlock_irqrestore(&q->stats->lock, flags);
190	195	}
191	196	EXPORT_SYMBOL_GPL(blk_stat_enable_accounting);
192	197

block/blk-wbt.c+1−1

@@ -528,7 +528,7 @@ static inline bool wbt_should_throttle(struct rq_wb rwb, struct bio bio) · 527 unmodified lines
528	528	if ((bio->bi_opf & (REQ_SYNC \| REQ_IDLE)) ==
529	529	(REQ_SYNC \| REQ_IDLE))
530	530	return false;
531		− /* fallthrough */
	531	+ fallthrough;
532	532	case REQ_OP_DISCARD:
533	533	return true;
534	534	default:

block/bsg-lib.c+1−1

@@ -378,7 +378,7 @@ struct request_queue bsg_setup_queue(struct device dev, const char *name, · 377 unmodified lines
378	378	bset->timeout_fn = timeout;
379	379
380	380	set = &bset->tag_set;
381		− set->ops = &bsg_mq_ops,
	381	+ set->ops = &bsg_mq_ops;
382	382	set->nr_hw_queues = 1;
383	383	set->queue_depth = 128;
384	384	set->numa_node = NUMA_NO_NODE;

block/ioprio.c+1−1

@@ -71,7 +71,7 @@ int ioprio_check_cap(int ioprio) · 70 unmodified lines
71	71	case IOPRIO_CLASS_RT:
72	72	if (!capable(CAP_SYS_ADMIN))
73	73	return -EPERM;
74		− /* fall through */
	74	+ fallthrough;
75	75	/* rt has prio field too */
76	76	case IOPRIO_CLASS_BE:
77	77	if (data >= IOPRIO_BE_NR \|\| data < 0)

block/partitions/core.c+22−15

@@ -278,6 +278,15 @@ static void hd_struct_free_work(struct work_struct *work) · 277 unmodified lines
278	278	{
279	279	struct hd_struct *part =
280	280	container_of(to_rcu_work(work), struct hd_struct, rcu_work);
	281	+ struct gendisk *disk = part_to_disk(part);
	282	+
	283	+ /*
	284	+ * Release the disk reference acquired in delete_partition here.
	285	+ * We can't release it in hd_struct_free because the final put_device
	286	+ * needs process context and thus can't be run directly from a
	287	+ * percpu_ref ->release handler.
	288	+ */
	289	+ put_device(disk_to_dev(disk));
281	290
282	291	part->start_sect = 0;
283	292	part->nr_sects = 0;
@@ -293,7 +302,6 @@ static void hd_struct_free(struct percpu_ref *ref) · 9 unmodified lines
293	302	rcu_dereference_protected(disk->part_tbl, 1);
294	303
295	304	rcu_assign_pointer(ptbl->last_lookup, NULL);
296		− put_device(disk_to_dev(disk));
297	305
298	306	INIT_RCU_WORK(&part->rcu_work, hd_struct_free_work);
299	307	queue_rcu_work(system_wq, &part->rcu_work);
@@ -524,19 +532,20 @@ int bdev_add_partition(struct block_device *bdev, int partno, · 224 unmodified lines
524	532	int bdev_del_partition(struct block_device *bdev, int partno)
525	533	{
526	534	struct block_device *bdevp;
527		− struct hd_struct *part;
528		− int ret = 0;
	535	+ struct hd_struct *part = NULL;
	536	+ int ret;
529	537
530		− part = disk_get_part(bdev->bd_disk, partno);
531		− if (!part)
532		− return -ENXIO;
533		−
534		− ret = -ENOMEM;
535		− bdevp = bdget(part_devt(part));
	538	+ bdevp = bdget_disk(bdev->bd_disk, partno);
536	539	if (!bdevp)
537		− goto out_put_part;
	540	+ return -ENOMEM;
538	541
539	542	mutex_lock(&bdevp->bd_mutex);
	543	+ mutex_lock_nested(&bdev->bd_mutex, 1);
	544	+
	545	+ ret = -ENXIO;
	546	+ part = disk_get_part(bdev->bd_disk, partno);
	547	+ if (!part)
	548	+ goto out_unlock;
540	549
541	550	ret = -EBUSY;
542	551	if (bdevp->bd_openers)
@@ -545,16 +554,14 @@ int bdev_del_partition(struct block_device *bdev, int partno) · 2 unmodified lines
545	554	sync_blockdev(bdevp);
546	555	invalidate_bdev(bdevp);
547	556
548		− mutex_lock_nested(&bdev->bd_mutex, 1);
549	557	delete_partition(bdev->bd_disk, part);
550		− mutex_unlock(&bdev->bd_mutex);
551		−
552	558	ret = 0;
553	559	out_unlock:
	560	+ mutex_unlock(&bdev->bd_mutex);
554	561	mutex_unlock(&bdevp->bd_mutex);
555	562	bdput(bdevp);
556		−out_put_part:
557		− disk_put_part(part);
	563	+ if (part)
	564	+ disk_put_part(part);
558	565	return ret;
559	566	}
560	567

crypto/af_alg.c+10−3

@@ -16,6 +16,7 @@ · 15 unmodified lines
16	16	#include <linux/module.h>
17	17	#include <linux/net.h>
18	18	#include <linux/rwsem.h>
	19	+#include <linux/sched.h>
19	20	#include <linux/sched/signal.h>
20	21	#include <linux/security.h>
21	22
@@ -845,9 +846,15 @@ int af_alg_sendmsg(struct socket sock, struct msghdr msg, size_t size, · 823 unmodified lines
845	846	}
846	847
847	848	lock_sock(sk);
848		− if (ctx->init && (init \|\| !ctx->more)) {
849		− err = -EINVAL;
850		− goto unlock;
	849	+ if (ctx->init && !ctx->more) {
	850	+ if (ctx->used) {
	851	+ err = -EINVAL;
	852	+ goto unlock;
	853	+ }
	854	+
	855	+ pr_info_once(
	856	+ "%s sent an empty control message without MSG_MORE.\n",
	857	+ current->comm);
851	858	}
852	859	ctx->init = true;
853	860

crypto/drbg.c+1−1

@@ -1521,7 +1521,7 @@ static int drbg_prepare_hrng(struct drbg_state *drbg) · 1520 unmodified lines
1521	1521
1522	1522	case -EALREADY:
1523	1523	err = 0;
1524		− /* fall through */
	1524	+ fallthrough;
1525	1525
1526	1526	default:
1527	1527	drbg->random_ready.func = NULL;

crypto/tcrypt.c+57−57

@@ -2348,121 +2348,121 @@ static int do_test(const char *alg, u32 type, u32 mask, int m, u32 num_mb) · 2347 unmodified lines
2348	2348	test_hash_speed(alg, sec, generic_hash_speed_template);
2349	2349	break;
2350	2350	}
2351		− /* fall through */
	2351	+ fallthrough;
2352	2352	case 301:
2353	2353	test_hash_speed("md4", sec, generic_hash_speed_template);
2354	2354	if (mode > 300 && mode < 400) break;
2355		− /* fall through */
	2355	+ fallthrough;
2356	2356	case 302:
2357	2357	test_hash_speed("md5", sec, generic_hash_speed_template);
2358	2358	if (mode > 300 && mode < 400) break;
2359		− /* fall through */
	2359	+ fallthrough;
2360	2360	case 303:
2361	2361	test_hash_speed("sha1", sec, generic_hash_speed_template);
2362	2362	if (mode > 300 && mode < 400) break;
2363		− /* fall through */
	2363	+ fallthrough;
2364	2364	case 304:
2365	2365	test_hash_speed("sha256", sec, generic_hash_speed_template);
2366	2366	if (mode > 300 && mode < 400) break;
2367		− /* fall through */
	2367	+ fallthrough;
2368	2368	case 305:
2369	2369	test_hash_speed("sha384", sec, generic_hash_speed_template);
2370	2370	if (mode > 300 && mode < 400) break;
2371		− /* fall through */
	2371	+ fallthrough;
2372	2372	case 306:
2373	2373	test_hash_speed("sha512", sec, generic_hash_speed_template);
2374	2374	if (mode > 300 && mode < 400) break;
2375		− /* fall through */
	2375	+ fallthrough;
2376	2376	case 307:
2377	2377	test_hash_speed("wp256", sec, generic_hash_speed_template);
2378	2378	if (mode > 300 && mode < 400) break;
2379		− /* fall through */
	2379	+ fallthrough;
2380	2380	case 308:
2381	2381	test_hash_speed("wp384", sec, generic_hash_speed_template);
2382	2382	if (mode > 300 && mode < 400) break;
2383		− /* fall through */
	2383	+ fallthrough;
2384	2384	case 309:
2385	2385	test_hash_speed("wp512", sec, generic_hash_speed_template);
2386	2386	if (mode > 300 && mode < 400) break;
2387		− /* fall through */
	2387	+ fallthrough;
2388	2388	case 310:
2389	2389	test_hash_speed("tgr128", sec, generic_hash_speed_template);
2390	2390	if (mode > 300 && mode < 400) break;
2391		− /* fall through */
	2391	+ fallthrough;
2392	2392	case 311:
2393	2393	test_hash_speed("tgr160", sec, generic_hash_speed_template);
2394	2394	if (mode > 300 && mode < 400) break;
2395		− /* fall through */
	2395	+ fallthrough;
2396	2396	case 312:
2397	2397	test_hash_speed("tgr192", sec, generic_hash_speed_template);
2398	2398	if (mode > 300 && mode < 400) break;
2399		− /* fall through */
	2399	+ fallthrough;
2400	2400	case 313:
2401	2401	test_hash_speed("sha224", sec, generic_hash_speed_template);
2402	2402	if (mode > 300 && mode < 400) break;
2403		− /* fall through */
	2403	+ fallthrough;
2404	2404	case 314:
2405	2405	test_hash_speed("rmd128", sec, generic_hash_speed_template);
2406	2406	if (mode > 300 && mode < 400) break;
2407		− /* fall through */
	2407	+ fallthrough;
2408	2408	case 315:
2409	2409	test_hash_speed("rmd160", sec, generic_hash_speed_template);
2410	2410	if (mode > 300 && mode < 400) break;
2411		− /* fall through */
	2411	+ fallthrough;
2412	2412	case 316:
2413	2413	test_hash_speed("rmd256", sec, generic_hash_speed_template);
2414	2414	if (mode > 300 && mode < 400) break;
2415		− /* fall through */
	2415	+ fallthrough;
2416	2416	case 317:
2417	2417	test_hash_speed("rmd320", sec, generic_hash_speed_template);
2418	2418	if (mode > 300 && mode < 400) break;
2419		− /* fall through */
	2419	+ fallthrough;
2420	2420	case 318:
2421	2421	test_hash_speed("ghash-generic", sec, hash_speed_template_16);
2422	2422	if (mode > 300 && mode < 400) break;
2423		− /* fall through */
	2423	+ fallthrough;
2424	2424	case 319:
2425	2425	test_hash_speed("crc32c", sec, generic_hash_speed_template);
2426	2426	if (mode > 300 && mode < 400) break;
2427		− /* fall through */
	2427	+ fallthrough;
2428	2428	case 320:
2429	2429	test_hash_speed("crct10dif", sec, generic_hash_speed_template);
2430	2430	if (mode > 300 && mode < 400) break;
2431		− /* fall through */
	2431	+ fallthrough;
2432	2432	case 321:
2433	2433	test_hash_speed("poly1305", sec, poly1305_speed_template);
2434	2434	if (mode > 300 && mode < 400) break;
2435		− /* fall through */
	2435	+ fallthrough;
2436	2436	case 322:
2437	2437	test_hash_speed("sha3-224", sec, generic_hash_speed_template);
2438	2438	if (mode > 300 && mode < 400) break;
2439		− /* fall through */
	2439	+ fallthrough;
2440	2440	case 323:
2441	2441	test_hash_speed("sha3-256", sec, generic_hash_speed_template);
2442	2442	if (mode > 300 && mode < 400) break;
2443		− /* fall through */
	2443	+ fallthrough;
2444	2444	case 324:
2445	2445	test_hash_speed("sha3-384", sec, generic_hash_speed_template);
2446	2446	if (mode > 300 && mode < 400) break;
2447		− /* fall through */
	2447	+ fallthrough;
2448	2448	case 325:
2449	2449	test_hash_speed("sha3-512", sec, generic_hash_speed_template);
2450	2450	if (mode > 300 && mode < 400) break;
2451		− /* fall through */
	2451	+ fallthrough;
2452	2452	case 326:
2453	2453	test_hash_speed("sm3", sec, generic_hash_speed_template);
2454	2454	if (mode > 300 && mode < 400) break;
2455		− /* fall through */
	2455	+ fallthrough;
2456	2456	case 327:
2457	2457	test_hash_speed("streebog256", sec,
2458	2458	generic_hash_speed_template);
2459	2459	if (mode > 300 && mode < 400) break;
2460		− /* fall through */
	2460	+ fallthrough;
2461	2461	case 328:
2462	2462	test_hash_speed("streebog512", sec,
2463	2463	generic_hash_speed_template);
2464	2464	if (mode > 300 && mode < 400) break;
2465		− /* fall through */
	2465	+ fallthrough;
2466	2466	case 399:
2467	2467	break;
2468	2468
@@ -2471,121 +2471,121 @@ static int do_test(const char *alg, u32 type, u32 mask, int m, u32 num_mb) · 2 unmodified lines
2471	2471	test_ahash_speed(alg, sec, generic_hash_speed_template);
2472	2472	break;
2473	2473	}
2474		− /* fall through */
	2474	+ fallthrough;
2475	2475	case 401:
2476	2476	test_ahash_speed("md4", sec, generic_hash_speed_template);
2477	2477	if (mode > 400 && mode < 500) break;
2478		− /* fall through */
	2478	+ fallthrough;
2479	2479	case 402:
2480	2480	test_ahash_speed("md5", sec, generic_hash_speed_template);
2481	2481	if (mode > 400 && mode < 500) break;
2482		− /* fall through */
	2482	+ fallthrough;
2483	2483	case 403:
2484	2484	test_ahash_speed("sha1", sec, generic_hash_speed_template);
2485	2485	if (mode > 400 && mode < 500) break;
2486		− /* fall through */
	2486	+ fallthrough;
2487	2487	case 404:
2488	2488	test_ahash_speed("sha256", sec, generic_hash_speed_template);
2489	2489	if (mode > 400 && mode < 500) break;
2490		− /* fall through */
	2490	+ fallthrough;
2491	2491	case 405:
2492	2492	test_ahash_speed("sha384", sec, generic_hash_speed_template);
2493	2493	if (mode > 400 && mode < 500) break;
2494		− /* fall through */
	2494	+ fallthrough;
2495	2495	case 406:
2496	2496	test_ahash_speed("sha512", sec, generic_hash_speed_template);
2497	2497	if (mode > 400 && mode < 500) break;
2498		− /* fall through */
	2498	+ fallthrough;
2499	2499	case 407:
2500	2500	test_ahash_speed("wp256", sec, generic_hash_speed_template);
2501	2501	if (mode > 400 && mode < 500) break;
2502		− /* fall through */
	2502	+ fallthrough;
2503	2503	case 408:
2504	2504	test_ahash_speed("wp384", sec, generic_hash_speed_template);
2505	2505	if (mode > 400 && mode < 500) break;
2506		− /* fall through */
	2506	+ fallthrough;
2507	2507	case 409:
2508	2508	test_ahash_speed("wp512", sec, generic_hash_speed_template);
2509	2509	if (mode > 400 && mode < 500) break;
2510		− /* fall through */
	2510	+ fallthrough;
2511	2511	case 410:
2512	2512	test_ahash_speed("tgr128", sec, generic_hash_speed_template);
2513	2513	if (mode > 400 && mode < 500) break;
2514		− /* fall through */
	2514	+ fallthrough;
2515	2515	case 411:
2516	2516	test_ahash_speed("tgr160", sec, generic_hash_speed_template);
2517	2517	if (mode > 400 && mode < 500) break;
2518		− /* fall through */
	2518	+ fallthrough;
2519	2519	case 412:
2520	2520	test_ahash_speed("tgr192", sec, generic_hash_speed_template);
2521	2521	if (mode > 400 && mode < 500) break;
2522		− /* fall through */
	2522	+ fallthrough;
2523	2523	case 413:
2524	2524	test_ahash_speed("sha224", sec, generic_hash_speed_template);
2525	2525	if (mode > 400 && mode < 500) break;
2526		− /* fall through */
	2526	+ fallthrough;
2527	2527	case 414:
2528	2528	test_ahash_speed("rmd128", sec, generic_hash_speed_template);
2529	2529	if (mode > 400 && mode < 500) break;
2530		− /* fall through */
	2530	+ fallthrough;
2531	2531	case 415:
2532	2532	test_ahash_speed("rmd160", sec, generic_hash_speed_template);
2533	2533	if (mode > 400 && mode < 500) break;
2534		− /* fall through */
	2534	+ fallthrough;
2535	2535	case 416:
2536	2536	test_ahash_speed("rmd256", sec, generic_hash_speed_template);
2537	2537	if (mode > 400 && mode < 500) break;
2538		− /* fall through */
	2538	+ fallthrough;
2539	2539	case 417:
2540	2540	test_ahash_speed("rmd320", sec, generic_hash_speed_template);
2541	2541	if (mode > 400 && mode < 500) break;
2542		− /* fall through */
	2542	+ fallthrough;
2543	2543	case 418:
2544	2544	test_ahash_speed("sha3-224", sec, generic_hash_speed_template);
2545	2545	if (mode > 400 && mode < 500) break;
2546		− /* fall through */
	2546	+ fallthrough;
2547	2547	case 419:
2548	2548	test_ahash_speed("sha3-256", sec, generic_hash_speed_template);
2549	2549	if (mode > 400 && mode < 500) break;
2550		− /* fall through */
	2550	+ fallthrough;
2551	2551	case 420:
2552	2552	test_ahash_speed("sha3-384", sec, generic_hash_speed_template);
2553	2553	if (mode > 400 && mode < 500) break;
2554		− /* fall through */
	2554	+ fallthrough;
2555	2555	case 421:
2556	2556	test_ahash_speed("sha3-512", sec, generic_hash_speed_template);
2557	2557	if (mode > 400 && mode < 500) break;
2558		− /* fall through */
	2558	+ fallthrough;
2559	2559	case 422:
2560	2560	test_mb_ahash_speed("sha1", sec, generic_hash_speed_template,
2561	2561	num_mb);
2562	2562	if (mode > 400 && mode < 500) break;
2563		− /* fall through */
	2563	+ fallthrough;
2564	2564	case 423:
2565	2565	test_mb_ahash_speed("sha256", sec, generic_hash_speed_template,
2566	2566	num_mb);
2567	2567	if (mode > 400 && mode < 500) break;
2568		− /* fall through */
	2568	+ fallthrough;
2569	2569	case 424:
2570	2570	test_mb_ahash_speed("sha512", sec, generic_hash_speed_template,
2571	2571	num_mb);
2572	2572	if (mode > 400 && mode < 500) break;
2573		− /* fall through */
	2573	+ fallthrough;
2574	2574	case 425:
2575	2575	test_mb_ahash_speed("sm3", sec, generic_hash_speed_template,
2576	2576	num_mb);
2577	2577	if (mode > 400 && mode < 500) break;
2578		− /* fall through */
	2578	+ fallthrough;
2579	2579	case 426:
2580	2580	test_mb_ahash_speed("streebog256", sec,
2581	2581	generic_hash_speed_template, num_mb);
2582	2582	if (mode > 400 && mode < 500) break;
2583		− /* fall through */
	2583	+ fallthrough;
2584	2584	case 427:
2585	2585	test_mb_ahash_speed("streebog512", sec,
2586	2586	generic_hash_speed_template, num_mb);
2587	2587	if (mode > 400 && mode < 500) break;
2588		− /* fall through */
	2588	+ fallthrough;
2589	2589	case 499:
2590	2590	break;
2591	2591

drivers/accessibility/braille/braille_console.c+1−1

@@ -290,7 +290,7 @@ static int vt_notifier_call(struct notifier_block *blk, · 289 unmodified lines
290	290	break;
291	291	case '\t':
292	292	c = ' ';
293		− /* Fallthrough */
	293	+ fallthrough;
294	294	default:
295	295	if (c < 32)
296	296	/* Ignore other control sequences */

drivers/accessibility/speakup/Kconfig+9−4

@@ -42,6 +42,11 @@ config SPEAKUP · 41 unmodified lines
42	42	one of the listed synthesizers, you should say n.
43	43
44	44	if SPEAKUP
	45	+
	46	+config SPEAKUP_SERIALIO
	47	+ def_bool y
	48	+ depends on ISA \|\| COMPILE_TEST
	49	+
45	50	config SPEAKUP_SYNTH_ACNTSA
46	51	tristate "Accent SA synthesizer support"
47	52	help
@@ -52,7 +57,7 @@ config SPEAKUP_SYNTH_ACNTSA · 4 unmodified lines
52	57
53	58	config SPEAKUP_SYNTH_ACNTPC
54	59	tristate "Accent PC synthesizer support"
55		− depends on ISA \|\| COMPILE_TEST
	60	+ depends on SPEAKUP_SERIALIO
56	61	help
57	62	This is the Speakup driver for the accent pc
58	63	synthesizer. You can say y to build it into the kernel,
@@ -104,7 +109,7 @@ config SPEAKUP_SYNTH_DECEXT · 45 unmodified lines
104	109
105	110	config SPEAKUP_SYNTH_DECPC
106	111	depends on m
107		− depends on ISA \|\| COMPILE_TEST
	112	+ depends on SPEAKUP_SERIALIO
108	113	tristate "DECtalk PC (big ISA card) synthesizer support"
109	114	help
110	115
@@ -127,7 +132,7 @@ config SPEAKUP_SYNTH_DECPC · 16 unmodified lines
127	132
128	133	config SPEAKUP_SYNTH_DTLK
129	134	tristate "DoubleTalk PC synthesizer support"
130		− depends on ISA \|\| COMPILE_TEST
	135	+ depends on SPEAKUP_SERIALIO
131	136	help
132	137
133	138	This is the Speakup driver for the internal DoubleTalk
@@ -138,7 +143,7 @@ config SPEAKUP_SYNTH_DTLK · 4 unmodified lines
138	143
139	144	config SPEAKUP_SYNTH_KEYPC
140	145	tristate "Keynote Gold PC synthesizer support"
141		− depends on ISA \|\| COMPILE_TEST
	146	+ depends on SPEAKUP_SERIALIO
142	147	help
143	148
144	149	This is the Speakup driver for the Keynote Gold

drivers/accessibility/speakup/Makefile+1−1

@@ -25,8 +25,8 @@ speakup-y := \ · 24 unmodified lines
25	25	keyhelp.o \
26	26	kobjects.o \
27	27	selection.o \
28		− serialio.o \
29	28	spk_ttyio.o \
30	29	synth.o \
31	30	thread.o \
32	31	varhandlers.o
	32	+speakup-$(CONFIG_SPEAKUP_SERIALIO) += serialio.o

drivers/accessibility/speakup/serialio.c+5−3

@@ -32,6 +32,7 @@ static void spk_serial_tiocmset(unsigned int set, unsigned int clear); · 31 unmodified lines
32	32	static unsigned char spk_serial_in(void);
33	33	static unsigned char spk_serial_in_nowait(void);
34	34	static void spk_serial_flush_buffer(void);
	35	+static int spk_serial_wait_for_xmitr(struct spk_synth *in_synth);
35	36
36	37	struct spk_io_ops spk_serial_io_ops = {
37	38	.synth_out = spk_serial_out,
@@ -40,6 +41,7 @@ struct spk_io_ops spk_serial_io_ops = { · 2 unmodified lines
40	41	.synth_in = spk_serial_in,
41	42	.synth_in_nowait = spk_serial_in_nowait,
42	43	.flush_buffer = spk_serial_flush_buffer,
	44	+ .wait_for_xmitr = spk_serial_wait_for_xmitr,
43	45	};
44	46	EXPORT_SYMBOL_GPL(spk_serial_io_ops);
45	47
@@ -211,7 +213,7 @@ void spk_stop_serial_interrupt(void) · 165 unmodified lines
211	213	}
212	214	EXPORT_SYMBOL_GPL(spk_stop_serial_interrupt);
213	215
214		−int spk_wait_for_xmitr(struct spk_synth *in_synth)
	216	+static int spk_serial_wait_for_xmitr(struct spk_synth *in_synth)
215	217	{
216	218	int tmout = SPK_XMITR_TIMEOUT;
217	219
@@ -280,7 +282,7 @@ static void spk_serial_flush_buffer(void) · 62 unmodified lines
280	282
281	283	static int spk_serial_out(struct spk_synth *in_synth, const char ch)
282	284	{
283		− if (in_synth->alive && spk_wait_for_xmitr(in_synth)) {
	285	+ if (in_synth->alive && spk_serial_wait_for_xmitr(in_synth)) {
284	286	outb_p(ch, speakup_info.port_tts);
285	287	return 1;
286	288	}
@@ -295,7 +297,7 @@ const char spk_serial_synth_immediate(struct spk_synth synth, · 8 unmodified lines
295	297	while ((ch = *buff)) {
296	298	if (ch == '\n')
297	299	ch = synth->procspeech;
298		− if (spk_wait_for_xmitr(synth))
	300	+ if (spk_serial_wait_for_xmitr(synth))
299	301	outb(ch, speakup_info.port_tts);
300	302	else
301	303	return buff;

drivers/accessibility/speakup/spk_priv.h+0−1

@@ -34,7 +34,6 @@ · 33 unmodified lines
34	34
35	35	const struct old_serial_port *spk_serial_init(int index);
36	36	void spk_stop_serial_interrupt(void);
37		−int spk_wait_for_xmitr(struct spk_synth *in_synth);
38	37	void spk_serial_release(void);
39	38	void spk_ttyio_release(void);
40	39	void spk_ttyio_register_ldisc(void);

drivers/accessibility/speakup/spk_ttyio.c+7−0

@@ -116,6 +116,7 @@ static void spk_ttyio_tiocmset(unsigned int set, unsigned int clear); · 115 unmodified lines
116	116	static unsigned char spk_ttyio_in(void);
117	117	static unsigned char spk_ttyio_in_nowait(void);
118	118	static void spk_ttyio_flush_buffer(void);
	119	+static int spk_ttyio_wait_for_xmitr(struct spk_synth *in_synth);
119	120
120	121	struct spk_io_ops spk_ttyio_ops = {
121	122	.synth_out = spk_ttyio_out,
@@ -125,6 +126,7 @@ struct spk_io_ops spk_ttyio_ops = { · 3 unmodified lines
125	126	.synth_in = spk_ttyio_in,
126	127	.synth_in_nowait = spk_ttyio_in_nowait,
127	128	.flush_buffer = spk_ttyio_flush_buffer,
	129	+ .wait_for_xmitr = spk_ttyio_wait_for_xmitr,
128	130	};
129	131	EXPORT_SYMBOL_GPL(spk_ttyio_ops);
130	132
@@ -286,6 +288,11 @@ static void spk_ttyio_tiocmset(unsigned int set, unsigned int clear) · 155 unmodified lines
286	288	mutex_unlock(&speakup_tty_mutex);
287	289	}
288	290
	291	+static int spk_ttyio_wait_for_xmitr(struct spk_synth *in_synth)
	292	+{
	293	+ return 1;
	294	+}
	295	+
289	296	static unsigned char ttyio_in(int timeout)
290	297	{
291	298	struct spk_ldisc_data *ldisc_data = speakup_tty->disc_data;

drivers/accessibility/speakup/spk_types.h+1−0

@@ -158,6 +158,7 @@ struct spk_io_ops { · 157 unmodified lines
158	158	unsigned char (*synth_in)(void);
159	159	unsigned char (*synth_in_nowait)(void);
160	160	void (*flush_buffer)(void);
	161	+ int (wait_for_xmitr)(struct spk_synth synth);
161	162	};
162	163
163	164	struct spk_synth {

drivers/accessibility/speakup/synth.c+1−1

@@ -159,7 +159,7 @@ int spk_synth_is_alive_restart(struct spk_synth *synth) · 158 unmodified lines
159	159	{
160	160	if (synth->alive)
161	161	return 1;
162		− if (spk_wait_for_xmitr(synth) > 0) {
	162	+ if (synth->io_ops->wait_for_xmitr(synth) > 0) {
163	163	/* restart */
164	164	synth->alive = 1;
165	165	synth_printf("%s", synth->init);

drivers/acpi/acpi_apd.c+2−2

@@ -99,8 +99,8 @@ static int fch_misc_setup(struct apd_private_data *pdata) · 98 unmodified lines
99	99	if (ret < 0)
100	100	return -ENOENT;
101	101
102		− acpi_dev_get_property(adev, "is-rv", ACPI_TYPE_INTEGER, &obj);
103		− clk_data->is_rv = obj->integer.value;
	102	+ if (!acpi_dev_get_property(adev, "is-rv", ACPI_TYPE_INTEGER, &obj))
	103	+ clk_data->is_rv = obj->integer.value;
104	104
105	105	list_for_each_entry(rentry, &resource_list, node) {
106	106	clk_data->base = devm_ioremap(&adev->dev, rentry->res->start,

drivers/acpi/osl.c+19−4

@@ -350,7 +350,7 @@ void __iomem __ref · 349 unmodified lines
350	350
351	351	pg_off = round_down(phys, PAGE_SIZE);
352	352	pg_sz = round_up(phys + size, PAGE_SIZE) - pg_off;
353		− virt = acpi_map(pg_off, pg_sz);
	353	+ virt = acpi_map(phys, size);
354	354	if (!virt) {
355	355	mutex_unlock(&acpi_ioremap_lock);
356	356	kfree(map);
@@ -358,7 +358,7 @@ void __iomem __ref · 1 unmodified line
358	358	}
359	359
360	360	INIT_LIST_HEAD(&map->list);
361		− map->virt = virt;
	361	+ map->virt = (void __iomem __force *)((unsigned long)virt & PAGE_MASK);
362	362	map->phys = pg_off;
363	363	map->size = pg_sz;
364	364	map->track.refcount = 1;
@@ -1575,11 +1575,26 @@ static acpi_status acpi_deactivate_mem_region(acpi_handle handle, u32 level, · 1210 unmodified lines
1575	1575	acpi_status acpi_release_memory(acpi_handle handle, struct resource *res,
1576	1576	u32 level)
1577	1577	{
	1578	+ acpi_status status;
	1579	+
1578	1580	if (!(res->flags & IORESOURCE_MEM))
1579	1581	return AE_TYPE;
1580	1582
1581		− return acpi_walk_namespace(ACPI_TYPE_REGION, handle, level,
1582		− acpi_deactivate_mem_region, NULL, res, NULL);
	1583	+ status = acpi_walk_namespace(ACPI_TYPE_REGION, handle, level,
	1584	+ acpi_deactivate_mem_region, NULL,
	1585	+ res, NULL);
	1586	+ if (ACPI_FAILURE(status))
	1587	+ return status;
	1588	+
	1589	+ /*
	1590	+ * Wait for all of the mappings queued up for removal by
	1591	+ * acpi_deactivate_mem_region() to actually go away.
	1592	+ */
	1593	+ synchronize_rcu();
	1594	+ rcu_barrier();
	1595	+ flush_scheduled_work();
	1596	+
	1597	+ return AE_OK;
1583	1598	}
1584	1599	EXPORT_SYMBOL_GPL(acpi_release_memory);
1585	1600

drivers/ata/ahci.c+1−2

@@ -807,8 +807,7 @@ static int ahci_avn_hardreset(struct ata_link link, unsigned int class, · 806 unmodified lines
807	807	(sstatus & 0xf) != 1)
808	808	break;
809	809
810		− ata_link_printk(link, KERN_INFO, "avn bounce port%d\n",
811		− port);
	810	+ ata_link_info(link, "avn bounce port%d\n", port);
812	811
813	812	pci_read_config_word(pdev, 0x92, &val);
814	813	val &= ~(1 << port);

drivers/ata/ahci_brcm.c+1−1

@@ -470,7 +470,7 @@ static int brcm_ahci_probe(struct platform_device *pdev) · 469 unmodified lines
470	470	switch (priv->version) {
471	471	case BRCM_SATA_BCM7425:
472	472	hpriv->flags \|= AHCI_HFLAG_DELAY_ENGINE;
473		− /* fall through */
	473	+ fallthrough;
474	474	case BRCM_SATA_NSP:
475	475	hpriv->flags \|= AHCI_HFLAG_NO_NCQ;
476	476	priv->quirks \|= BRCM_AHCI_QUIRK_SKIP_PHY_ENABLE;

drivers/ata/libahci_platform.c+1−1

@@ -326,7 +326,7 @@ static int ahci_platform_get_phy(struct ahci_host_priv *hpriv, u32 port, · 325 unmodified lines
326	326	node);
327	327	break;
328	328	}
329		− /* fall through */
	329	+ fallthrough;
330	330	case -ENODEV:
331	331	/* continue normally */
332	332	hpriv->phys[port] = NULL;

drivers/ata/libata-core.c+10−11

@@ -190,7 +190,7 @@ struct ata_link ata_link_next(struct ata_link link, struct ata_port *ap, · 189 unmodified lines
190	190	case ATA_LITER_PMP_FIRST:
191	191	if (sata_pmp_attached(ap))
192	192	return ap->pmp_link;
193		− /* fall through */
	193	+ fallthrough;
194	194	case ATA_LITER_HOST_FIRST:
195	195	return &ap->link;
196	196	}
@@ -201,11 +201,11 @@ struct ata_link ata_link_next(struct ata_link link, struct ata_port *ap, · 4 unmodified lines
201	201	case ATA_LITER_HOST_FIRST:
202	202	if (sata_pmp_attached(ap))
203	203	return ap->pmp_link;
204		− /* fall through */
	204	+ fallthrough;
205	205	case ATA_LITER_PMP_FIRST:
206	206	if (unlikely(ap->slave_link))
207	207	return ap->slave_link;
208		− /* fall through */
	208	+ fallthrough;
209	209	case ATA_LITER_EDGE:
210	210	return NULL;
211	211	}
@@ -523,7 +523,7 @@ int atapi_cmd_type(u8 opcode) · 311 unmodified lines
523	523	case ATA_12:
524	524	if (atapi_passthru16)
525	525	return ATAPI_PASS_THRU;
526		− /* fall thru */
	526	+ fallthrough;
527	527	default:
528	528	return ATAPI_MISC;
529	529	}
@@ -1800,7 +1800,7 @@ retry: · 1270 unmodified lines
1800	1800	switch (class) {
1801	1801	case ATA_DEV_SEMB:
1802	1802	class = ATA_DEV_ATA; /* some hard drives report SEMB sig */
1803		− /* fall through */
	1803	+ fallthrough;
1804	1804	case ATA_DEV_ATA:
1805	1805	case ATA_DEV_ZAC:
1806	1806	tf.command = ATA_CMD_ID_ATA;
@@ -2907,7 +2907,7 @@ int ata_bus_probe(struct ata_port *ap) · 1100 unmodified lines
2907	2907	case -ENODEV:
2908	2908	/* give it just one more chance */
2909	2909	tries[dev->devno] = min(tries[dev->devno], 1);
2910		− /* fall through */
	2910	+ fallthrough;
2911	2911	case -EIO:
2912	2912	if (tries[dev->devno] == 1) {
2913	2913	/* This is the last chance, better to slow
@@ -3158,7 +3158,7 @@ int ata_down_xfermask_limit(struct ata_device *dev, unsigned int sel) · 244 unmodified lines
3158	3158
3159	3159	case ATA_DNXFER_FORCE_PIO0:
3160	3160	pio_mask &= 1;
3161		− /* fall through */
	3161	+ fallthrough;
3162	3162	case ATA_DNXFER_FORCE_PIO:
3163	3163	mwdma_mask = 0;
3164	3164	udma_mask = 0;
@@ -3868,9 +3868,8 @@ static const struct ata_blacklist_entry ata_device_blacklist [] = { · 703 unmodified lines
3868	3868	/* https://bugzilla.kernel.org/show_bug.cgi?id=15573 */
3869	3869	{ "C300-CTFDDAC128MAG", "0001", ATA_HORKAGE_NONCQ, },
3870	3870
3871		− /* Some Sandisk SSDs lock up hard with NCQ enabled. Reported on
3872		− SD7SN6S256G and SD8SN8U256G */
3873		− { "SanDisk SD[78]SN*G", NULL, ATA_HORKAGE_NONCQ, },
	3871	+ /* Sandisk SD7/8/9s lock up hard on large trims */
	3872	+ { "SanDisk SD[789]*", NULL, ATA_HORKAGE_MAX_TRIM_128M, },
3874	3873
3875	3874	/* devices which puke on READ_NATIVE_MAX */
3876	3875	{ "HDS724040KLSA80", "KFAOA20N", ATA_HORKAGE_BROKEN_HPA, },
@@ -4694,7 +4693,7 @@ void ata_qc_complete(struct ata_queued_cmd *qc) · 817 unmodified lines
4694	4693	qc->tf.feature != SETFEATURES_RA_ON &&
4695	4694	qc->tf.feature != SETFEATURES_RA_OFF)
4696	4695	break;
4697		− /* fall through */
	4696	+ fallthrough;
4698	4697	case ATA_CMD_INIT_DEV_PARAMS: /* CHS translation changed */
4699	4698	case ATA_CMD_SET_MULTI: /* multi_count changed */
4700	4699	/* revalidate device */

drivers/ata/libata-eh.c+3−3

@@ -1576,7 +1576,7 @@ static unsigned int ata_eh_analyze_tf(struct ata_queued_cmd *qc, · 1575 unmodified lines
1576	1576	case ATA_DEV_ZAC:
1577	1577	if (stat & ATA_SENSE)
1578	1578	ata_eh_request_sense(qc, qc->scsicmd);
1579		− /* fall through */
	1579	+ fallthrough;
1580	1580	case ATA_DEV_ATA:
1581	1581	if (err & ATA_ICRC)
1582	1582	qc->err_mask \|= AC_ERR_ATA_BUS;
@@ -3473,11 +3473,11 @@ static int ata_eh_handle_dev_fail(struct ata_device *dev, int err) · 1890 unmodified lines
3473	3473	case -ENODEV:
3474	3474	/* device missing or wrong IDENTIFY data, schedule probing */
3475	3475	ehc->i.probe_mask \|= (1 << dev->devno);
3476		− /* fall through */
	3476	+ fallthrough;
3477	3477	case -EINVAL:
3478	3478	/* give it just one more chance */
3479	3479	ehc->tries[dev->devno] = min(ehc->tries[dev->devno], 1);
3480		− /* fall through */
	3480	+ fallthrough;
3481	3481	case -EIO:
3482	3482	if (ehc->tries[dev->devno] == 1) {
3483	3483	/* This is the last chance, better to slow

drivers/ata/libata-scsi.c+9−3

@@ -2080,6 +2080,7 @@ static unsigned int ata_scsiop_inq_89(struct ata_scsi_args args, u8 rbuf) · 2079 unmodified lines
2080	2080
2081	2081	static unsigned int ata_scsiop_inq_b0(struct ata_scsi_args args, u8 rbuf)
2082	2082	{
	2083	+ struct ata_device *dev = args->dev;
2083	2084	u16 min_io_sectors;
2084	2085
2085	2086	rbuf[1] = 0xb0;
@@ -2105,7 +2106,12 @@ static unsigned int ata_scsiop_inq_b0(struct ata_scsi_args args, u8 rbuf) · 19 unmodified lines
2105	2106	* with the unmap bit set.
2106	2107	*/
2107	2108	if (ata_id_has_trim(args->id)) {
2108		− put_unaligned_be64(65535 * ATA_MAX_TRIM_RNUM, &rbuf[36]);
	2109	+ u64 max_blocks = 65535 * ATA_MAX_TRIM_RNUM;
	2110	+
	2111	+ if (dev->horkage & ATA_HORKAGE_MAX_TRIM_128M)
	2112	+ max_blocks = 128 << (20 - SECTOR_SHIFT);
	2113	+
	2114	+ put_unaligned_be64(max_blocks, &rbuf[36]);
2109	2115	put_unaligned_be32(1, &rbuf[28]);
2110	2116	}
2111	2117
@@ -4162,7 +4168,7 @@ void ata_scsi_simulate(struct ata_device dev, struct scsi_cmnd cmd) · 2050 unmodified lines
4162	4168	ata_scsi_rbuf_fill(&args, ata_scsiop_inq_b6);
4163	4169	break;
4164	4170	}
4165		− /* Fallthrough */
	4171	+ fallthrough;
4166	4172	default:
4167	4173	ata_scsi_set_invalid_field(dev, cmd, 2, 0xff);
4168	4174	break;
@@ -4198,7 +4204,7 @@ void ata_scsi_simulate(struct ata_device dev, struct scsi_cmnd cmd) · 29 unmodified lines
4198	4204	* turning this into a no-op.
4199	4205	*/
4200	4206	case SYNCHRONIZE_CACHE:
4201		− /* fall through */
	4207	+ fallthrough;
4202	4208
4203	4209	/* no-op's, complete with success */
4204	4210	case REZERO_UNIT:

drivers/ata/pata_atp867x.c+2−2

@@ -157,7 +157,7 @@ static int atp867x_get_active_clocks_shifted(struct ata_port *ap, · 156 unmodified lines
157	157	default:
158	158	printk(KERN_WARNING "ATP867X: active %dclk is invalid. "
159	159	"Using 12clk.\n", clk);
160		− /* fall through */
	160	+ fallthrough;
161	161	case 9 ... 12:
162	162	clocks = 7; /* 12 clk */
163	163	break;
@@ -190,7 +190,7 @@ static int atp867x_get_recover_clocks_shifted(unsigned int clk) · 26 unmodified lines
190	190	default:
191	191	printk(KERN_WARNING "ATP867X: recover %dclk is invalid. "
192	192	"Using default 12clk.\n", clk);
193		− /* fall through */
	193	+ fallthrough;
194	194	case 12: /* default 12 clk */
195	195	clocks = 0;
196	196	break;

drivers/ata/pata_serverworks.c+1−1

@@ -369,7 +369,7 @@ static int serverworks_fixup(struct pci_dev *pdev) · 368 unmodified lines
369	369	break;
370	370	case PCI_DEVICE_ID_SERVERWORKS_CSB5IDE:
371	371	ata_pci_bmdma_clear_simplex(pdev);
372		− /* fall through */
	372	+ fallthrough;
373	373	case PCI_DEVICE_ID_SERVERWORKS_CSB6IDE:
374	374	case PCI_DEVICE_ID_SERVERWORKS_CSB6IDE2:
375	375	rc = serverworks_fixup_csb(pdev);

drivers/ata/sata_mv.c+6−6

@@ -2010,7 +2010,7 @@ static void mv_rw_multi_errata_sata24(struct ata_queued_cmd *qc) · 2009 unmodified lines
2010	2010	break;
2011	2011	case ATA_CMD_WRITE_MULTI_FUA_EXT:
2012	2012	tf->flags &= ~ATA_TFLAG_FUA; /* ugh */
2013		− /* fall through */
	2013	+ fallthrough;
2014	2014	case ATA_CMD_WRITE_MULTI_EXT:
2015	2015	tf->command = ATA_CMD_PIO_WRITE_EXT;
2016	2016	break;
@@ -2044,7 +2044,7 @@ static enum ata_completion_errors mv_qc_prep(struct ata_queued_cmd *qc) · 27 unmodified lines
2044	2044	case ATA_PROT_DMA:
2045	2045	if (tf->command == ATA_CMD_DSM)
2046	2046	return AC_ERR_OK;
2047		− /* fall-thru */
	2047	+ fallthrough;
2048	2048	case ATA_PROT_NCQ:
2049	2049	break; /* continue below */
2050	2050	case ATA_PROT_PIO:
@@ -2296,7 +2296,7 @@ static unsigned int mv_qc_issue_fis(struct ata_queued_cmd *qc) · 245 unmodified lines
2296	2296	switch (qc->tf.protocol) {
2297	2297	case ATAPI_PROT_PIO:
2298	2298	pp->pp_flags \|= MV_PP_FLAG_FAKE_ATA_BUSY;
2299		− /* fall through */
	2299	+ fallthrough;
2300	2300	case ATAPI_PROT_NODATA:
2301	2301	ap->hsm_task_state = HSM_ST_FIRST;
2302	2302	break;
@@ -2347,7 +2347,7 @@ static unsigned int mv_qc_issue(struct ata_queued_cmd *qc) · 44 unmodified lines
2347	2347	return AC_ERR_OTHER;
2348	2348	break; /* use bmdma for this */
2349	2349	}
2350		− /* fall thru */
	2350	+ fallthrough;
2351	2351	case ATA_PROT_NCQ:
2352	2352	mv_start_edma(ap, port_mmio, pp, qc->tf.protocol);
2353	2353	pp->req_idx = (pp->req_idx + 1) & MV_MAX_Q_DEPTH_MASK;
@@ -2376,7 +2376,7 @@ static unsigned int mv_qc_issue(struct ata_queued_cmd *qc) · 22 unmodified lines
2376	2376	": attempting PIO w/multiple DRQ: "
2377	2377	"this may fail due to h/w errata\n");
2378	2378	}
2379		− /* fall through */
	2379	+ fallthrough;
2380	2380	case ATA_PROT_NODATA:
2381	2381	case ATAPI_PROT_PIO:
2382	2382	case ATAPI_PROT_NODATA:
@@ -3864,7 +3864,7 @@ static int mv_chip_id(struct ata_host *host, unsigned int board_idx) · 1481 unmodified lines
3864	3864	" and avoid the final two gigabytes on"
3865	3865	" all RocketRAID BIOS initialized drives.\n");
3866	3866	}
3867		− /* fall through */
	3867	+ fallthrough;
3868	3868	case chip_6042:
3869	3869	hpriv->ops = &mv6xxx_ops;
3870	3870	hp_flags \|= MV_HP_GEN_IIE;

drivers/ata/sata_promise.c+4−4

@@ -637,7 +637,7 @@ static enum ata_completion_errors pdc_qc_prep(struct ata_queued_cmd *qc) · 636 unmodified lines
637	637	switch (qc->tf.protocol) {
638	638	case ATA_PROT_DMA:
639	639	pdc_fill_sg(qc);
640		− /FALLTHROUGH/
	640	+ fallthrough;
641	641	case ATA_PROT_NODATA:
642	642	i = pdc_pkt_header(&qc->tf, qc->ap->bmdma_prd_dma,
643	643	qc->dev->devno, pp->pkt);
@@ -652,7 +652,7 @@ static enum ata_completion_errors pdc_qc_prep(struct ata_queued_cmd *qc) · 8 unmodified lines
652	652	break;
653	653	case ATAPI_PROT_DMA:
654	654	pdc_fill_sg(qc);
655		− /FALLTHROUGH/
	655	+ fallthrough;
656	656	case ATAPI_PROT_NODATA:
657	657	pdc_atapi_pkt(qc);
658	658	break;
@@ -1022,11 +1022,11 @@ static unsigned int pdc_qc_issue(struct ata_queued_cmd *qc) · 363 unmodified lines
1022	1022	case ATAPI_PROT_NODATA:
1023	1023	if (qc->dev->flags & ATA_DFLAG_CDB_INTR)
1024	1024	break;
1025		− /FALLTHROUGH/
	1025	+ fallthrough;
1026	1026	case ATA_PROT_NODATA:
1027	1027	if (qc->tf.flags & ATA_TFLAG_POLLING)
1028	1028	break;
1029		− /FALLTHROUGH/
	1029	+ fallthrough;
1030	1030	case ATAPI_PROT_DMA:
1031	1031	case ATA_PROT_DMA:
1032	1032	pdc_packet_start(qc);

drivers/ata/sata_sx4.c+1−1

@@ -669,7 +669,7 @@ static unsigned int pdc20621_qc_issue(struct ata_queued_cmd *qc) · 668 unmodified lines
669	669	case ATA_PROT_NODATA:
670	670	if (qc->tf.flags & ATA_TFLAG_POLLING)
671	671	break;
672		− /FALLTHROUGH/
	672	+ fallthrough;
673	673	case ATA_PROT_DMA:
674	674	pdc20621_packet_start(qc);
675	675	return 0;

drivers/atm/firestream.c+2−1

@@ -711,7 +711,7 @@ static void process_txdone_queue (struct fs_dev dev, struct queue q) · 710 unmodified lines
711	711
712	712	switch (STATUS_CODE (qe)) {
713	713	case 0x01: /* This is for AAL0 where we put the chip in streaming mode */
714		− /* Fall through */
	714	+ fallthrough;
715	715	case 0x02:
716	716	/* Process a real txdone entry. */
717	717	tmp = qe->p0;
@@ -998,6 +998,7 @@ static int fs_open(struct atm_vcc *atm_vcc) · 280 unmodified lines
998	998	error = make_rate (pcr, r, &tmc0, NULL);
999	999	if (error) {
1000	1000	kfree(tc);
	1001	+ kfree(vcc);
1001	1002	return error;
1002	1003	}
1003	1004	}

drivers/atm/fore200e.c+8−8

@@ -376,33 +376,33 @@ fore200e_shutdown(struct fore200e* fore200e) · 375 unmodified lines
376	376	case FORE200E_STATE_COMPLETE:
377	377	kfree(fore200e->stats);
378	378
379		− /* fall through */
	379	+ fallthrough;
380	380	case FORE200E_STATE_IRQ:
381	381	free_irq(fore200e->irq, fore200e->atm_dev);
382	382
383		− /* fall through */
	383	+ fallthrough;
384	384	case FORE200E_STATE_ALLOC_BUF:
385	385	fore200e_free_rx_buf(fore200e);
386	386
387		− /* fall through */
	387	+ fallthrough;
388	388	case FORE200E_STATE_INIT_BSQ:
389	389	fore200e_uninit_bs_queue(fore200e);
390	390
391		− /* fall through */
	391	+ fallthrough;
392	392	case FORE200E_STATE_INIT_RXQ:
393	393	fore200e_dma_chunk_free(fore200e, &fore200e->host_rxq.status);
394	394	fore200e_dma_chunk_free(fore200e, &fore200e->host_rxq.rpd);
395	395
396		− /* fall through */
	396	+ fallthrough;
397	397	case FORE200E_STATE_INIT_TXQ:
398	398	fore200e_dma_chunk_free(fore200e, &fore200e->host_txq.status);
399	399	fore200e_dma_chunk_free(fore200e, &fore200e->host_txq.tpd);
400	400
401		− /* fall through */
	401	+ fallthrough;
402	402	case FORE200E_STATE_INIT_CMDQ:
403	403	fore200e_dma_chunk_free(fore200e, &fore200e->host_cmdq.status);
404	404
405		− /* fall through */
	405	+ fallthrough;
406	406	case FORE200E_STATE_INITIALIZE:
407	407	/* nothing to do for that state */
408	408
@@ -415,7 +415,7 @@ fore200e_shutdown(struct fore200e* fore200e) · 6 unmodified lines
415	415	case FORE200E_STATE_MAP:
416	416	fore200e->bus->unmap(fore200e);
417	417
418		− /* fall through */
	418	+ fallthrough;
419	419	case FORE200E_STATE_CONFIGURE:
420	420	/* nothing to do for that state */
421	421

drivers/atm/he.c+2−2

@@ -1944,14 +1944,14 @@ he_tasklet(unsigned long data) · 1943 unmodified lines
1944	1944	switch (type) {
1945	1945	case ITYPE_RBRQ_THRESH:
1946	1946	HPRINTK("rbrq%d threshold\n", group);
1947		− /* fall through */
	1947	+ fallthrough;
1948	1948	case ITYPE_RBRQ_TIMER:
1949	1949	if (he_service_rbrq(he_dev, group))
1950	1950	he_service_rbpl(he_dev, group);
1951	1951	break;
1952	1952	case ITYPE_TBRQ_THRESH:
1953	1953	HPRINTK("tbrq%d threshold\n", group);
1954		− /* fall through */
	1954	+ fallthrough;
1955	1955	case ITYPE_TPD_COMPLETE:
1956	1956	he_service_tbrq(he_dev, group);
1957	1957	break;

drivers/atm/idt77105.c+1−1

@@ -192,7 +192,7 @@ static int idt77105_ioctl(struct atm_dev dev,unsigned int cmd,void __user arg) · 191 unmodified lines
192	192	switch (cmd) {
193	193	case IDT77105_GETSTATZ:
194	194	if (!capable(CAP_NET_ADMIN)) return -EPERM;
195		− /* fall through */
	195	+ fallthrough;
196	196	case IDT77105_GETSTAT:
197	197	return fetch_stats(dev, arg, cmd == IDT77105_GETSTATZ);
198	198	case ATM_SETLOOP:

drivers/atm/lanai.c+1−1

@@ -2019,7 +2019,7 @@ static int lanai_normalize_ci(struct lanai_dev *lanai, · 2018 unmodified lines
2019	2019	switch (*vpip) {
2020	2020	case ATM_VPI_ANY:
2021	2021	*vpip = 0;
2022		− /* FALLTHROUGH */
	2022	+ fallthrough;
2023	2023	case 0:
2024	2024	break;
2025	2025	default:

drivers/atm/zatm.c+1−1

@@ -1447,7 +1447,7 @@ static int zatm_ioctl(struct atm_dev dev,unsigned int cmd,void __user arg) · 1446 unmodified lines
1447	1447	switch (cmd) {
1448	1448	case ZATM_GETPOOLZ:
1449	1449	if (!capable(CAP_NET_ADMIN)) return -EPERM;
1450		− /* fall through */
	1450	+ fallthrough;
1451	1451	case ZATM_GETPOOL:
1452	1452	{
1453	1453	struct zatm_pool_info info;

drivers/auxdisplay/arm-charlcd.c+1−1

@@ -2,7 +2,7 @@ · 1 unmodified line
2	2	/*
3	3	* Driver for the on-board character LCD found on some ARM reference boards
4	4	* This is basically an Hitachi HD44780 LCD with a custom IP block to drive it
5		− * http://en.wikipedia.org/wiki/HD44780_Character_LCD
	5	+ * https://en.wikipedia.org/wiki/HD44780_Character_LCD
6	6	* Currently it will just display the text "ARM Linux" and the linux version
7	7	*
8	8	* Author: Linus Walleij <triad@df.lth.se>

drivers/auxdisplay/panel.c+3−3

@@ -1365,7 +1365,7 @@ static void panel_process_inputs(void) · 1364 unmodified lines
1365	1365	break;
1366	1366	input->rise_timer = 0;
1367	1367	input->state = INPUT_ST_RISING;
1368		− /* fall through */
	1368	+ fallthrough;
1369	1369	case INPUT_ST_RISING:
1370	1370	if ((phys_curr & input->mask) != input->value) {
1371	1371	input->state = INPUT_ST_LOW;
@@ -1378,11 +1378,11 @@ static void panel_process_inputs(void) · 6 unmodified lines
1378	1378	}
1379	1379	input->high_timer = 0;
1380	1380	input->state = INPUT_ST_HIGH;
1381		− /* fall through */
	1381	+ fallthrough;
1382	1382	case INPUT_ST_HIGH:
1383	1383	if (input_state_high(input))
1384	1384	break;
1385		− /* fall through */
	1385	+ fallthrough;
1386	1386	case INPUT_ST_FALLING:
1387	1387	input_state_falling(input);
1388	1388	}

drivers/base/core.c+8−4

@@ -4264,9 +4264,9 @@ static inline bool fwnode_is_primary(struct fwnode_handle *fwnode) · 4263 unmodified lines
4264	4264	*/
4265	4265	void set_primary_fwnode(struct device dev, struct fwnode_handle fwnode)
4266	4266	{
4267		− if (fwnode) {
4268		− struct fwnode_handle *fn = dev->fwnode;
	4267	+ struct fwnode_handle *fn = dev->fwnode;
4269	4268
	4269	+ if (fwnode) {
4270	4270	if (fwnode_is_primary(fn))
4271	4271	fn = fn->secondary;
4272	4272
@@ -4276,8 +4276,12 @@ void set_primary_fwnode(struct device dev, struct fwnode_handle fwnode) · 3 unmodified lines
4276	4276	}
4277	4277	dev->fwnode = fwnode;
4278	4278	} else {
4279		− dev->fwnode = fwnode_is_primary(dev->fwnode) ?
4280		− dev->fwnode->secondary : NULL;
	4279	+ if (fwnode_is_primary(fn)) {
	4280	+ dev->fwnode = fn->secondary;
	4281	+ fn->secondary = NULL;
	4282	+ } else {
	4283	+ dev->fwnode = NULL;
	4284	+ }
4281	4285	}
4282	4286	}
4283	4287	EXPORT_SYMBOL_GPL(set_primary_fwnode);

drivers/base/firmware_loader/fallback.c+2−2

@@ -289,10 +289,10 @@ static ssize_t firmware_loading_store(struct device *dev, · 288 unmodified lines
289	289	}
290	290	break;
291	291	}
292		− /* fallthrough */
	292	+ fallthrough;
293	293	default:
294	294	dev_err(dev, "%s: unexpected value (%d)\n", __func__, loading);
295		− /* fallthrough */
	295	+ fallthrough;
296	296	case -1:
297	297	fw_load_abort(fw_sysfs);
298	298	break;

drivers/base/power/main.c+10−6

@@ -1606,13 +1606,17 @@ static int __device_suspend(struct device *dev, pm_message_t state, bool async) · 1605 unmodified lines
1606	1606	}
1607	1607
1608	1608	/*
1609		− * If a device configured to wake up the system from sleep states
1610		− * has been suspended at run time and there's a resume request pending
1611		− * for it, this is equivalent to the device signaling wakeup, so the
1612		− * system suspend operation should be aborted.
	1609	+ * Wait for possible runtime PM transitions of the device in progress
	1610	+ * to complete and if there's a runtime resume request pending for it,
	1611	+ * resume it before proceeding with invoking the system-wide suspend
	1612	+ * callbacks for it.
	1613	+ *
	1614	+ * If the system-wide suspend callbacks below change the configuration
	1615	+ * of the device, they must disable runtime PM for it or otherwise
	1616	+ * ensure that its runtime-resume callbacks will not be confused by that
	1617	+ * change in case they are invoked going forward.
1613	1618	*/
1614		− if (pm_runtime_barrier(dev) && device_may_wakeup(dev))
1615		− pm_wakeup_event(dev, 0);
	1619	+ pm_runtime_barrier(dev);
1616	1620
1617	1621	if (pm_wakeup_pending()) {
1618	1622	dev->power.direct_complete = false;

drivers/block/aoe/aoecmd.c+1−1

@@ -1135,7 +1135,7 @@ noskb: if (buf) · 1134 unmodified lines
1135	1135	break;
1136	1136	}
1137	1137	bvcpy(skb, f->buf->bio, f->iter, n);
1138		− /* fall through */
	1138	+ fallthrough;
1139	1139	case ATA_CMD_PIO_WRITE:
1140	1140	case ATA_CMD_PIO_WRITE_EXT:
1141	1141	spin_lock_irq(&d->lock);

drivers/block/ataflop.c+1−1

@@ -1726,7 +1726,7 @@ static int fd_locked_ioctl(struct block_device *bdev, fmode_t mode, · 1725 unmodified lines
1726	1726	/* MSch: invalidate default_params */
1727	1727	default_params[drive].blocks = 0;
1728	1728	set_capacity(floppy->disk, MAX_DISK_SIZE * 2);
1729		− /* Fall through */
	1729	+ fallthrough;
1730	1730	case FDFMTEND:
1731	1731	case FDFLUSH:
1732	1732	/* invalidate the buffer track to force a reread */

drivers/block/drbd/drbd_int.h+1−1

@@ -1733,7 +1733,7 @@ static inline void __drbd_chk_io_error_(struct drbd_device *device, · 1732 unmodified lines
1733	1733	_drbd_set_state(_NS(device, disk, D_INCONSISTENT), CS_HARD, NULL);
1734	1734	break;
1735	1735	}
1736		− /* fall through - for DRBD_META_IO_ERROR or DRBD_FORCE_DETACH */
	1736	+ fallthrough; /* for DRBD_META_IO_ERROR or DRBD_FORCE_DETACH */
1737	1737	case EP_DETACH:
1738	1738	case EP_CALL_HELPER:
1739	1739	/* Remember whether we saw a READ or WRITE error.

drivers/block/drbd/drbd_main.c+1−1

@@ -430,7 +430,7 @@ int drbd_thread_start(struct drbd_thread *thi) · 429 unmodified lines
430	430	thi->t_state = RESTARTING;
431	431	drbd_info(resource, "Restarting %s thread (from %s [%d])\n",
432	432	thi->name, current->comm, current->pid);
433		− /* fall through */
	433	+ fallthrough;
434	434	case RUNNING:
435	435	case RESTARTING:
436	436	default:

drivers/block/drbd/drbd_nl.c+1−1

@@ -3883,7 +3883,7 @@ static int nla_put_status_info(struct sk_buff skb, struct drbd_device device, · 3882 unmodified lines
3883	3883	if (nla_put_u32(skb, T_helper_exit_code,
3884	3884	sib->helper_exit_code))
3885	3885	goto nla_put_failure;
3886		− /* fall through */
	3886	+ fallthrough;
3887	3887	case SIB_HELPER_PRE:
3888	3888	if (nla_put_string(skb, T_helper, sib->helper_name))
3889	3889	goto nla_put_failure;

drivers/block/drbd/drbd_receiver.c+6−6

@@ -1797,7 +1797,7 @@ static int receive_Barrier(struct drbd_connection *connection, struct packet_inf · 1796 unmodified lines
1797	1797	break;
1798	1798	else
1799	1799	drbd_warn(connection, "Allocation of an epoch failed, slowing down\n");
1800		− /* Fall through */
	1800	+ fallthrough;
1801	1801
1802	1802	case WO_BDEV_FLUSH:
1803	1803	case WO_DRAIN_IO:
@@ -2917,7 +2917,7 @@ static int receive_DataRequest(struct drbd_connection *connection, struct packet · 1113 unmodified lines
2917	2917	then we would do something smarter here than reading
2918	2918	the block... */
2919	2919	peer_req->flags \|= EE_RS_THIN_REQ;
2920		− /* fall through */
	2920	+ fallthrough;
2921	2921	case P_RS_DATA_REQUEST:
2922	2922	peer_req->w.cb = w_e_end_rsdata_req;
2923	2923	fault_type = DRBD_FAULT_RS_RD;
@@ -3083,7 +3083,7 @@ static int drbd_asb_recover_0p(struct drbd_peer_device *peer_device) __must_hold · 159 unmodified lines
3083	3083	rv = 1;
3084	3084	break;
3085	3085	}
3086		− /* Else fall through - to one of the other strategies... */
	3086	+ fallthrough; /* to one of the other strategies */
3087	3087	case ASB_DISCARD_OLDER_PRI:
3088	3088	if (self == 0 && peer == 1) {
3089	3089	rv = 1;
@@ -3096,7 +3096,7 @@ static int drbd_asb_recover_0p(struct drbd_peer_device *peer_device) __must_hold · 6 unmodified lines
3096	3096	/* Else fall through to one of the other strategies... */
3097	3097	drbd_warn(device, "Discard younger/older primary did not find a decision\n"
3098	3098	"Using discard-least-changes instead\n");
3099		− /* fall through */
	3099	+ fallthrough;
3100	3100	case ASB_DISCARD_ZERO_CHG:
3101	3101	if (ch_peer == 0 && ch_self == 0) {
3102	3102	rv = test_bit(RESOLVE_CONFLICTS, &peer_device->connection->flags)
@@ -3108,7 +3108,7 @@ static int drbd_asb_recover_0p(struct drbd_peer_device *peer_device) __must_hold · 5 unmodified lines
3108	3108	}
3109	3109	if (after_sb_0p == ASB_DISCARD_ZERO_CHG)
3110	3110	break;
3111		− /* else, fall through */
	3111	+ fallthrough;
3112	3112	case ASB_DISCARD_LEAST_CHG:
3113	3113	if (ch_self < ch_peer)
3114	3114	rv = -1;
@@ -3608,7 +3608,7 @@ static enum drbd_conns drbd_sync_handshake(struct drbd_peer_device *peer_device, · 493 unmodified lines
3608	3608	switch (rr_conflict) {
3609	3609	case ASB_CALL_HELPER:
3610	3610	drbd_khelper(device, "pri-lost");
3611		− /* fall through */
	3611	+ fallthrough;
3612	3612	case ASB_DISCONNECT:
3613	3613	drbd_err(device, "I shall become SyncTarget, but I am primary!\n");
3614	3614	return C_MASK;

drivers/block/drbd/drbd_req.c+2−2

@@ -611,7 +611,7 @@ int __req_mod(struct drbd_request *req, enum drbd_req_event what, · 610 unmodified lines
611	611	drbd_set_out_of_sync(device, req->i.sector, req->i.size);
612	612	drbd_report_io_error(device, req);
613	613	__drbd_chk_io_error(device, DRBD_READ_ERROR);
614		− /* fall through. */
	614	+ fallthrough;
615	615	case READ_AHEAD_COMPLETED_WITH_ERROR:
616	616	/* it is legal to fail read-ahead, no __drbd_chk_io_error in that case. */
617	617	mod_rq_state(req, m, RQ_LOCAL_PENDING, RQ_LOCAL_COMPLETED);
@@ -836,7 +836,7 @@ int __req_mod(struct drbd_request *req, enum drbd_req_event what, · 218 unmodified lines
836	836	} /* else: FIXME can this happen? */
837	837	break;
838	838	}
839		− /* else, fall through - to BARRIER_ACKED */
	839	+ fallthrough; /* to BARRIER_ACKED */
840	840
841	841	case BARRIER_ACKED:
842	842	/* barrier ack for READ requests does not make sense */

drivers/block/floppy.c+2−2

@@ -1680,7 +1680,7 @@ static void recal_interrupt(void) · 1679 unmodified lines
1680	1680	clear_bit(FD_DISK_NEWCHANGE_BIT,
1681	1681	&drive_state[current_drive].flags);
1682	1682	drive_state[current_drive].select_date = jiffies;
1683		− /* fall through */
	1683	+ fallthrough;
1684	1684	default:
1685	1685	debugt(__func__, "default");
1686	1686	/* Recalibrate moves the head by at
@@ -3592,7 +3592,7 @@ static int fd_locked_ioctl(struct block_device *bdev, fmode_t mode, unsigned int · 1905 unmodified lines
3592	3592	if (poll_drive(true, FD_RAW_NEED_DISK) == -EINTR)
3593	3593	return -EINTR;
3594	3594	process_fd_request();
3595		− /* fall through */
	3595	+ fallthrough;
3596	3596	case FDGETDRVSTAT:
3597	3597	outparam = &drive_state[drive];
3598	3598	break;

drivers/block/loop.c+22−19

@@ -878,6 +878,7 @@ static void loop_config_discard(struct loop_device *lo) · 877 unmodified lines
878	878	struct file *file = lo->lo_backing_file;
879	879	struct inode *inode = file->f_mapping->host;
880	880	struct request_queue *q = lo->lo_queue;
	881	+ u32 granularity, max_discard_sectors;
881	882
882	883	/*
883	884	* If the backing device is a block device, mirror its zeroing
@@ -890,11 +891,10 @@ static void loop_config_discard(struct loop_device *lo) · 6 unmodified lines
890	891	struct request_queue *backingq;
891	892
892	893	backingq = bdev_get_queue(inode->i_bdev);
893		− blk_queue_max_discard_sectors(q,
894		− backingq->limits.max_write_zeroes_sectors);
895	894
896		− blk_queue_max_write_zeroes_sectors(q,
897		− backingq->limits.max_write_zeroes_sectors);
	895	+ max_discard_sectors = backingq->limits.max_write_zeroes_sectors;
	896	+ granularity = backingq->limits.discard_granularity ?:
	897	+ queue_physical_block_size(backingq);
898	898
899	899	/*
900	900	* We use punch hole to reclaim the free space used by the
@@ -903,23 +903,26 @@ static void loop_config_discard(struct loop_device *lo) · 2 unmodified lines
903	903	* useful information.
904	904	*/
905	905	} else if (!file->f_op->fallocate \|\| lo->lo_encrypt_key_size) {
906		− q->limits.discard_granularity = 0;
907		− q->limits.discard_alignment = 0;
908		− blk_queue_max_discard_sectors(q, 0);
909		− blk_queue_max_write_zeroes_sectors(q, 0);
	906	+ max_discard_sectors = 0;
	907	+ granularity = 0;
910	908
911	909	} else {
912		− q->limits.discard_granularity = inode->i_sb->s_blocksize;
913		− q->limits.discard_alignment = 0;
914		−
915		− blk_queue_max_discard_sectors(q, UINT_MAX >> 9);
916		− blk_queue_max_write_zeroes_sectors(q, UINT_MAX >> 9);
	910	+ max_discard_sectors = UINT_MAX >> 9;
	911	+ granularity = inode->i_sb->s_blocksize;
917	912	}
918	913
919		− if (q->limits.max_write_zeroes_sectors)
	914	+ if (max_discard_sectors) {
	915	+ q->limits.discard_granularity = granularity;
	916	+ blk_queue_max_discard_sectors(q, max_discard_sectors);
	917	+ blk_queue_max_write_zeroes_sectors(q, max_discard_sectors);
920	918	blk_queue_flag_set(QUEUE_FLAG_DISCARD, q);
921		− else
	919	+ } else {
	920	+ q->limits.discard_granularity = 0;
	921	+ blk_queue_max_discard_sectors(q, 0);
	922	+ blk_queue_max_write_zeroes_sectors(q, 0);
922	923	blk_queue_flag_clear(QUEUE_FLAG_DISCARD, q);
	924	+ }
	925	+ q->limits.discard_alignment = 0;
923	926	}
924	927
925	928	static void loop_unprepare_queue(struct loop_device *lo)
@@ -1111,8 +1114,6 @@ static int loop_configure(struct loop_device *lo, fmode_t mode, · 185 unmodified lines
1111	1114	mapping = file->f_mapping;
1112	1115	inode = mapping->host;
1113	1116
1114		− size = get_loop_size(lo, file);
1115		−
1116	1117	if ((config->info.lo_flags & ~LOOP_CONFIGURE_SETTABLE_FLAGS) != 0) {
1117	1118	error = -EINVAL;
1118	1119	goto out_unlock;
@@ -1162,6 +1163,8 @@ static int loop_configure(struct loop_device *lo, fmode_t mode, · 43 unmodified lines
1162	1163	loop_update_rotational(lo);
1163	1164	loop_update_dio(lo);
1164	1165	loop_sysfs_init(lo);
	1166	+
	1167	+ size = get_loop_size(lo, file);
1165	1168	loop_set_size(lo, size);
1166	1169
1167	1170	set_blocksize(bdev, S_ISBLK(inode->i_mode) ?
@@ -1719,7 +1722,7 @@ static int lo_ioctl(struct block_device *bdev, fmode_t mode, · 551 unmodified lines
1719	1722	case LOOP_SET_BLOCK_SIZE:
1720	1723	if (!(mode & FMODE_WRITE) && !capable(CAP_SYS_ADMIN))
1721	1724	return -EPERM;
1722		− /* Fall through */
	1725	+ fallthrough;
1723	1726	default:
1724	1727	err = lo_simple_ioctl(lo, cmd, arg);
1725	1728	break;
@@ -1867,7 +1870,7 @@ static int lo_compat_ioctl(struct block_device *bdev, fmode_t mode, · 141 unmodified lines
1867	1870	case LOOP_SET_STATUS64:
1868	1871	case LOOP_CONFIGURE:
1869	1872	arg = (unsigned long) compat_ptr(arg);
1870		− /* fall through */
	1873	+ fallthrough;
1871	1874	case LOOP_SET_FD:
1872	1875	case LOOP_CHANGE_FD:
1873	1876	case LOOP_SET_BLOCK_SIZE:

drivers/block/nbd.c+2−0

@@ -1363,6 +1363,8 @@ static void nbd_set_cmd_timeout(struct nbd_device *nbd, u64 timeout) · 1362 unmodified lines
1363	1363	nbd->tag_set.timeout = timeout * HZ;
1364	1364	if (timeout)
1365	1365	blk_queue_rq_timeout(nbd->disk->queue, timeout * HZ);
	1366	+ else
	1367	+ blk_queue_rq_timeout(nbd->disk->queue, 30 * HZ);
1366	1368	}
1367	1369
1368	1370	/* Must be called with config_lock held */

drivers/block/null_blk_main.c+1−1

@@ -1147,7 +1147,7 @@ static int null_handle_rq(struct nullb_cmd *cmd) · 1146 unmodified lines
1147	1147	len = bvec.bv_len;
1148	1148	err = null_transfer(nullb, bvec.bv_page, len, bvec.bv_offset,
1149	1149	op_is_write(req_op(rq)), sector,
1150		− req_op(rq) & REQ_FUA);
	1150	+ rq->cmd_flags & REQ_FUA);
1151	1151	if (err) {
1152	1152	spin_unlock_irq(&nullb->lock);
1153	1153	return err;

drivers/block/paride/pd.c+2−2

@@ -440,7 +440,7 @@ static void run_fsm(void) · 439 unmodified lines
440	440	pd_claimed = 1;
441	441	if (!pi_schedule_claimed(pi_current, run_fsm))
442	442	return;
443		− /* fall through */
	443	+ fallthrough;
444	444	case 1:
445	445	pd_claimed = 2;
446	446	pi_current->proto->connect(pi_current);
@@ -465,7 +465,7 @@ static void run_fsm(void) · 18 unmodified lines
465	465	if (stop)
466	466	return;
467	467	}
468		− /* fall through */
	468	+ fallthrough;
469	469	case Hold:
470	470	schedule_fsm();
471	471	return;

drivers/block/pktcdvd.c+1−1

@@ -2641,7 +2641,7 @@ static int pkt_ioctl(struct block_device *bdev, fmode_t mode, unsigned int cmd, · 2640 unmodified lines
2641	2641	*/
2642	2642	if (pd->refcnt == 1)
2643	2643	pkt_lock_door(pd, 0);
2644		− /* fall through */
	2644	+ fallthrough;
2645	2645	/*
2646	2646	* forward selected CDROM ioctls to CD-ROM, for UDF
2647	2647	*/

drivers/block/rbd.c+4−4

@@ -3293,7 +3293,7 @@ again: · 3292 unmodified lines
3293	3293	case __RBD_OBJ_COPYUP_OBJECT_MAPS:
3294	3294	if (!pending_result_dec(&obj_req->pending, result))
3295	3295	return false;
3296		− /* fall through */
	3296	+ fallthrough;
3297	3297	case RBD_OBJ_COPYUP_OBJECT_MAPS:
3298	3298	if (*result) {
3299	3299	rbd_warn(rbd_dev, "snap object map update failed: %d",
@@ -3312,7 +3312,7 @@ again: · 12 unmodified lines
3312	3312	case __RBD_OBJ_COPYUP_WRITE_OBJECT:
3313	3313	if (!pending_result_dec(&obj_req->pending, result))
3314	3314	return false;
3315		− /* fall through */
	3315	+ fallthrough;
3316	3316	case RBD_OBJ_COPYUP_WRITE_OBJECT:
3317	3317	return true;
3318	3318	default:
@@ -3399,7 +3399,7 @@ again: · 80 unmodified lines
3399	3399	case __RBD_OBJ_WRITE_COPYUP:
3400	3400	if (!rbd_obj_advance_copyup(obj_req, result))
3401	3401	return false;
3402		− /* fall through */
	3402	+ fallthrough;
3403	3403	case RBD_OBJ_WRITE_COPYUP:
3404	3404	if (*result) {
3405	3405	rbd_warn(rbd_dev, "copyup failed: %d", *result);
@@ -3592,7 +3592,7 @@ again: · 186 unmodified lines
3592	3592	case __RBD_IMG_OBJECT_REQUESTS:
3593	3593	if (!pending_result_dec(&img_req->pending, result))
3594	3594	return false;
3595		− /* fall through */
	3595	+ fallthrough;
3596	3596	case RBD_IMG_OBJECT_REQUESTS:
3597	3597	return true;
3598	3598	default:

drivers/block/rnbd/rnbd-srv.c+2−1

@@ -148,7 +148,8 @@ static int process_rdma(struct rtrs_srv *sess, · 147 unmodified lines
148	148	/* Generate bio with pages pointing to the rdma buffer */
149	149	bio = rnbd_bio_map_kern(data, sess_dev->rnbd_dev->ibd_bio_set, datalen, GFP_KERNEL);
150	150	if (IS_ERR(bio)) {
151		− rnbd_srv_err(sess_dev, "Failed to generate bio, err: %ld\n", PTR_ERR(bio));
	151	+ err = PTR_ERR(bio);
	152	+ rnbd_srv_err(sess_dev, "Failed to generate bio, err: %d\n", err);
152	153	goto sess_dev_put;
153	154	}
154	155

drivers/block/rsxx/core.c+1−1

@@ -425,7 +425,7 @@ static void card_state_change(struct rsxx_cardinfo *card, · 424 unmodified lines
425	425	* Fall through so the DMA devices can be attached and
426	426	* the user can attempt to pull off their data.
427	427	*/
428		− /* fall through */
	428	+ fallthrough;
429	429	case CARD_STATE_GOOD:
430	430	st = rsxx_get_card_size8(card, &card->size8);
431	431	if (st)

drivers/block/skd_main.c+1−1

@@ -1436,7 +1436,7 @@ static void skd_resolve_req_exception(struct skd_device *skdev, · 1435 unmodified lines
1436	1436	blk_mq_requeue_request(req, true);
1437	1437	break;
1438	1438	}
1439		− /* fall through */
	1439	+ fallthrough;
1440	1440
1441	1441	case SKD_CHECK_STATUS_REPORT_ERROR:
1442	1442	default:

drivers/block/virtio_blk.c+23−8

@@ -126,16 +126,31 @@ static int virtblk_setup_discard_write_zeroes(struct request *req, bool unmap) · 125 unmodified lines
126	126	if (!range)
127	127	return -ENOMEM;
128	128
129		− __rq_for_each_bio(bio, req) {
130		− u64 sector = bio->bi_iter.bi_sector;
131		− u32 num_sectors = bio->bi_iter.bi_size >> SECTOR_SHIFT;
132		−
133		− range[n].flags = cpu_to_le32(flags);
134		− range[n].num_sectors = cpu_to_le32(num_sectors);
135		− range[n].sector = cpu_to_le64(sector);
136		− n++;
	129	+ /*
	130	+ * Single max discard segment means multi-range discard isn't
	131	+ * supported, and block layer only runs contiguity merge like
	132	+ * normal RW request. So we can't reply on bio for retrieving
	133	+ * each range info.
	134	+ */
	135	+ if (queue_max_discard_segments(req->q) == 1) {
	136	+ range[0].flags = cpu_to_le32(flags);
	137	+ range[0].num_sectors = cpu_to_le32(blk_rq_sectors(req));
	138	+ range[0].sector = cpu_to_le64(blk_rq_pos(req));
	139	+ n = 1;
	140	+ } else {
	141	+ __rq_for_each_bio(bio, req) {
	142	+ u64 sector = bio->bi_iter.bi_sector;
	143	+ u32 num_sectors = bio->bi_iter.bi_size >> SECTOR_SHIFT;
	144	+
	145	+ range[n].flags = cpu_to_le32(flags);
	146	+ range[n].num_sectors = cpu_to_le32(num_sectors);
	147	+ range[n].sector = cpu_to_le64(sector);
	148	+ n++;
	149	+ }
137	150	}
138	151
	152	+ WARN_ON_ONCE(n != segments);
	153	+
139	154	req->special_vec.bv_page = virt_to_page(range);
140	155	req->special_vec.bv_offset = offset_in_page(range);
141	156	req->special_vec.bv_len = sizeof(range) segments;

drivers/block/xen-blkback/blkback.c+1−1

@@ -1260,7 +1260,7 @@ static int dispatch_rw_block_io(struct xen_blkif_ring *ring, · 1259 unmodified lines
1260	1260	break;
1261	1261	case BLKIF_OP_WRITE_BARRIER:
1262	1262	drain = true;
1263		− /* fall through */
	1263	+ fallthrough;
1264	1264	case BLKIF_OP_FLUSH_DISKCACHE:
1265	1265	ring->st_f_req++;
1266	1266	operation = REQ_OP_WRITE;

drivers/block/xen-blkback/xenbus.c+1−1

@@ -843,7 +843,7 @@ static void frontend_changed(struct xenbus_device *dev, · 842 unmodified lines
843	843	xenbus_switch_state(dev, XenbusStateClosed);
844	844	if (xenbus_dev_is_online(dev))
845	845	break;
846		− /* fall through */
	846	+ fallthrough;
847	847	/* if not online */
848	848	case XenbusStateUnknown:
849	849	/* implies xen_blkif_disconnect() via xen_blkbk_remove() */

drivers/block/xen-blkfront.c+2−3

@@ -1403,7 +1403,6 @@ static enum blk_req_status blkif_rsp_to_req_status(int rsp) · 1402 unmodified lines
1403	1403	case BLKIF_RSP_EOPNOTSUPP:
1404	1404	return REQ_EOPNOTSUPP;
1405	1405	case BLKIF_RSP_ERROR:
1406		− /* Fallthrough. */
1407	1406	default:
1408	1407	return REQ_ERROR;
1409	1408	}
@@ -1643,7 +1642,7 @@ static irqreturn_t blkif_interrupt(int irq, void *dev_id) · 233 unmodified lines
1643	1642	info->feature_flush = 0;
1644	1643	xlvbd_flush(info);
1645	1644	}
1646		− /* fall through */
	1645	+ fallthrough;
1647	1646	case BLKIF_OP_READ:
1648	1647	case BLKIF_OP_WRITE:
1649	1648	if (unlikely(bret->status != BLKIF_RSP_OKAY))
@@ -2484,7 +2483,7 @@ static void blkback_changed(struct xenbus_device *dev, · 834 unmodified lines
2484	2483	case XenbusStateClosed:
2485	2484	if (dev->state == XenbusStateClosed)
2486	2485	break;
2487		− /* fall through */
	2486	+ fallthrough;
2488	2487	case XenbusStateClosing:
2489	2488	if (info)
2490	2489	blkfront_closing(info);

drivers/bus/ti-sysc.c+1−1

@@ -1849,7 +1849,7 @@ static int sysc_clockdomain_init(struct sysc *ddata) · 1848 unmodified lines
1849	1849	switch (ddata->nr_clocks) {
1850	1850	case 2:
1851	1851	ick = ddata->clocks[SYSC_ICK];
1852		− /* fallthrough */
	1852	+ fallthrough;
1853	1853	case 1:
1854	1854	fck = ddata->clocks[SYSC_FCK];
1855	1855	break;

drivers/char/agp/ali-agp.c+1−1

@@ -357,7 +357,7 @@ found: · 356 unmodified lines
357	357	default:
358	358	break;
359	359	}
360		− /FALLTHROUGH/
	360	+ fallthrough;
361	361	default:
362	362	bridge->driver = &ali_generic_bridge;
363	363	}

drivers/char/hw_random/ingenic-rng.c+2−7

@@ -92,8 +92,7 @@ static int ingenic_rng_probe(struct platform_device *pdev) · 91 unmodified lines
92	92	priv->base = devm_platform_ioremap_resource(pdev, 0);
93	93	if (IS_ERR(priv->base)) {
94	94	pr_err("%s: Failed to map RNG registers\n", __func__);
95		− ret = PTR_ERR(priv->base);
96		− goto err_free_rng;
	95	+ return PTR_ERR(priv->base);
97	96	}
98	97
99	98	priv->version = (enum ingenic_rng_version)of_device_get_match_data(&pdev->dev);
@@ -106,17 +105,13 @@ static int ingenic_rng_probe(struct platform_device *pdev) · 6 unmodified lines
106	105	ret = hwrng_register(&priv->rng);
107	106	if (ret) {
108	107	dev_err(&pdev->dev, "Failed to register hwrng\n");
109		− goto err_free_rng;
	108	+ return ret;
110	109	}
111	110
112	111	platform_set_drvdata(pdev, priv);
113	112
114	113	dev_info(&pdev->dev, "Ingenic RNG driver registered\n");
115	114	return 0;
116		−
117		−err_free_rng:
118		− kfree(priv);
119		− return ret;
120	115	}
121	116
122	117	static int ingenic_rng_remove(struct platform_device *pdev)

drivers/char/ipmi/kcs_bmc.c+1−1

@@ -99,7 +99,7 @@ static void kcs_bmc_handle_data(struct kcs_bmc *kcs_bmc) · 98 unmodified lines
99	99	switch (kcs_bmc->phase) {
100	100	case KCS_PHASE_WRITE_START:
101	101	kcs_bmc->phase = KCS_PHASE_WRITE_DATA;
102		− /* fall through */
	102	+ fallthrough;
103	103
104	104	case KCS_PHASE_WRITE_DATA:
105	105	if (kcs_bmc->data_in_idx < KCS_MSG_BUFSIZ) {

drivers/char/lp.c+2−2

@@ -734,7 +734,7 @@ static long lp_ioctl(struct file *file, unsigned int cmd, · 733 unmodified lines
734	734	ret = lp_set_timeout32(minor, (void __user *)arg);
735	735	break;
736	736	}
737		− /* fall through - for 64-bit */
	737	+ fallthrough; /* for 64-bit */
738	738	case LPSETTIMEOUT_NEW:
739	739	ret = lp_set_timeout64(minor, (void __user *)arg);
740	740	break;
@@ -762,7 +762,7 @@ static long lp_compat_ioctl(struct file *file, unsigned int cmd, · 21 unmodified lines
762	762	ret = lp_set_timeout32(minor, (void __user *)arg);
763	763	break;
764	764	}
765		− /* fall through - for x32 mode */
	765	+ fallthrough; /* for x32 mode */
766	766	case LPSETTIMEOUT_NEW:
767	767	ret = lp_set_timeout64(minor, (void __user *)arg);
768	768	break;

drivers/char/mem.c+1−1

@@ -791,7 +791,7 @@ static loff_t memory_lseek(struct file *file, loff_t offset, int orig) · 790 unmodified lines
791	791	switch (orig) {
792	792	case SEEK_CUR:
793	793	offset += file->f_pos;
794		− /* fall through */
	794	+ fallthrough;
795	795	case SEEK_SET:
796	796	/* to avoid userland mistaking f_pos=-9 as -EBADF=-9 */
797	797	if ((unsigned long long)offset >= -MAX_ERRNO) {

drivers/char/nvram.c+1−1

@@ -286,7 +286,7 @@ static long nvram_misc_ioctl(struct file *file, unsigned int cmd, · 285 unmodified lines
286	286	#ifdef CONFIG_PPC
287	287	case OBSOLETE_PMAC_NVRAM_GET_OFFSET:
288	288	pr_warn("nvram: Using obsolete PMAC_NVRAM_GET_OFFSET ioctl\n");
289		− /* fall through */
	289	+ fallthrough;
290	290	case IOC_NVRAM_GET_OFFSET:
291	291	ret = -EINVAL;
292	292	#ifdef CONFIG_PPC_PMAC

drivers/clocksource/timer-cadence-ttc.c+2−2

@@ -309,7 +309,7 @@ static int ttc_rate_change_clocksource_cb(struct notifier_block *nb, · 308 unmodified lines
309	309	/* restore original register value */
310	310	writel_relaxed(ttccs->scale_clk_ctrl_reg_old,
311	311	ttccs->ttc.base_addr + TTC_CLK_CNTRL_OFFSET);
312		− /* fall through */
	312	+ fallthrough;
313	313	default:
314	314	return NOTIFY_DONE;
315	315	}
@@ -392,7 +392,7 @@ static int ttc_rate_change_clockevent_cb(struct notifier_block *nb, · 76 unmodified lines
392	392
393	393	clockevents_update_freq(&ttcce->ce, ndata->new_rate / PRESCALE);
394	394
395		− /* fall through */
	395	+ fallthrough;
396	396	case PRE_RATE_CHANGE:
397	397	case ABORT_RATE_CHANGE:
398	398	default:

drivers/cpufreq/cpufreq.c+1−2

@@ -703,8 +703,7 @@ static ssize_t show_scaling_cur_freq(struct cpufreq_policy policy, char buf) · 702 unmodified lines
703	703	freq = arch_freq_get_on_cpu(policy->cpu);
704	704	if (freq)
705	705	ret = sprintf(buf, "%u\n", freq);
706		− else if (cpufreq_driver && cpufreq_driver->setpolicy &&
707		− cpufreq_driver->get)
	706	+ else if (cpufreq_driver->setpolicy && cpufreq_driver->get)
708	707	ret = sprintf(buf, "%u\n", cpufreq_driver->get(policy->cpu));
709	708	else
710	709	ret = sprintf(buf, "%u\n", policy->cur);

drivers/cpufreq/intel_pstate.c+148−88

@@ -219,14 +219,13 @@ struct global_params { · 218 unmodified lines
219	219	* @epp_policy: Last saved policy used to set EPP/EPB
220	220	* @epp_default: Power on default HWP energy performance
221	221	* preference/bias
222		− * @epp_saved: Saved EPP/EPB during system suspend or CPU offline
223		− * operation
224	222	* @epp_cached Cached HWP energy-performance preference value
225	223	* @hwp_req_cached: Cached value of the last HWP Request MSR
226	224	* @hwp_cap_cached: Cached value of the last HWP Capabilities MSR
227	225	* @last_io_update: Last time when IO wake flag was set
228	226	* @sched_flags: Store scheduler flags for possible cross CPU update
229	227	* @hwp_boost_min: Last HWP boosted min performance
	228	+ * @suspended: Whether or not the driver has been suspended.
230	229	*
231	230	* This structure stores per CPU instance data for all CPUs.
232	231	*/
@@ -258,13 +257,13 @@ struct cpudata { · 25 unmodified lines
258	257	s16 epp_powersave;
259	258	s16 epp_policy;
260	259	s16 epp_default;
261		− s16 epp_saved;
262	260	s16 epp_cached;
263	261	u64 hwp_req_cached;
264	262	u64 hwp_cap_cached;
265	263	u64 last_io_update;
266	264	unsigned int sched_flags;
267	265	u32 hwp_boost_min;
	266	+ bool suspended;
268	267	};
269	268
270	269	static struct cpudata **all_cpu_data;
@@ -644,6 +643,8 @@ static int intel_pstate_get_energy_pref_index(struct cpudata cpu_data, int raw · 373 unmodified lines
644	643
645	644	static int intel_pstate_set_epp(struct cpudata *cpu, u32 epp)
646	645	{
	646	+ int ret;
	647	+
647	648	/*
648	649	* Use the cached HWP Request MSR value, because in the active mode the
649	650	* register itself may be updated by intel_pstate_hwp_boost_up() or
@@ -659,7 +660,11 @@ static int intel_pstate_set_epp(struct cpudata *cpu, u32 epp) · 9 unmodified lines
659	660	* function, so it cannot run in parallel with the update below.
660	661	*/
661	662	WRITE_ONCE(cpu->hwp_req_cached, value);
662		− return wrmsrl_on_cpu(cpu->cpu, MSR_HWP_REQUEST, value);
	663	+ ret = wrmsrl_on_cpu(cpu->cpu, MSR_HWP_REQUEST, value);
	664	+ if (!ret)
	665	+ cpu->epp_cached = epp;
	666	+
	667	+ return ret;
663	668	}
664	669
665	670	static int intel_pstate_set_energy_pref_index(struct cpudata *cpu_data,
@@ -678,6 +683,14 @@ static int intel_pstate_set_energy_pref_index(struct cpudata *cpu_data, · 12 unmodified lines
678	683	else if (epp == -EINVAL)
679	684	epp = epp_values[pref_index - 1];
680	685
	686	+ /*
	687	+ * To avoid confusion, refuse to set EPP to any values different
	688	+ * from 0 (performance) if the current policy is "performance",
	689	+ * because those values would be overridden.
	690	+ */
	691	+ if (epp > 0 && cpu_data->policy == CPUFREQ_POLICY_PERFORMANCE)
	692	+ return -EBUSY;
	693	+
681	694	ret = intel_pstate_set_epp(cpu_data, epp);
682	695	} else {
683	696	if (epp == -EINVAL)
@@ -762,10 +775,8 @@ static ssize_t store_energy_performance_preference( · 78 unmodified lines
762	775	cpufreq_stop_governor(policy);
763	776	ret = intel_pstate_set_epp(cpu, epp);
764	777	err = cpufreq_start_governor(policy);
765		− if (!ret) {
766		− cpu->epp_cached = epp;
	778	+ if (!ret)
767	779	ret = err;
768		− }
769	780	}
770	781	}
771	782
@@ -825,7 +836,7 @@ static void intel_pstate_get_hwp_max(unsigned int cpu, int *phy_max, · 53 unmodified lines
825	836
826	837	rdmsrl_on_cpu(cpu, MSR_HWP_CAPABILITIES, &cap);
827	838	WRITE_ONCE(all_cpu_data[cpu]->hwp_cap_cached, cap);
828		− if (global.no_turbo)
	839	+ if (global.no_turbo \|\| global.turbo_disabled)
829	840	*current_max = HWP_GUARANTEED_PERF(cap);
830	841	else
831	842	*current_max = HWP_HIGHEST_PERF(cap);
@@ -859,12 +870,6 @@ static void intel_pstate_hwp_set(unsigned int cpu) · 27 unmodified lines
859	870
860	871	cpu_data->epp_policy = cpu_data->policy;
861	872
862		− if (cpu_data->epp_saved >= 0) {
863		− epp = cpu_data->epp_saved;
864		− cpu_data->epp_saved = -EINVAL;
865		− goto update_epp;
866		− }
867		−
868	873	if (cpu_data->policy == CPUFREQ_POLICY_PERFORMANCE) {
869	874	epp = intel_pstate_get_epp(cpu_data, value);
870	875	cpu_data->epp_powersave = epp;
@@ -891,7 +896,6 @@ static void intel_pstate_hwp_set(unsigned int cpu) · 20 unmodified lines
891	896
892	897	epp = cpu_data->epp_powersave;
893	898	}
894		−update_epp:
895	899	if (boot_cpu_has(X86_FEATURE_HWP_EPP)) {
896	900	value &= ~GENMASK_ULL(31, 24);
897	901	value \|= (u64)epp << 24;
@@ -903,14 +907,24 @@ skip_epp: · 5 unmodified lines
903	907	wrmsrl_on_cpu(cpu, MSR_HWP_REQUEST, value);
904	908	}
905	909
906		−static void intel_pstate_hwp_force_min_perf(int cpu)
	910	+static void intel_pstate_hwp_offline(struct cpudata *cpu)
907	911	{
908		− u64 value;
	912	+ u64 value = READ_ONCE(cpu->hwp_req_cached);
909	913	int min_perf;
910	914
911		− value = all_cpu_data[cpu]->hwp_req_cached;
	915	+ if (boot_cpu_has(X86_FEATURE_HWP_EPP)) {
	916	+ /*
	917	+ * In case the EPP has been set to "performance" by the
	918	+ * active mode "performance" scaling algorithm, replace that
	919	+ * temporary value with the cached EPP one.
	920	+ */
	921	+ value &= ~GENMASK_ULL(31, 24);
	922	+ value \|= HWP_ENERGY_PERF_PREFERENCE(cpu->epp_cached);
	923	+ WRITE_ONCE(cpu->hwp_req_cached, value);
	924	+ }
	925	+
912	926	value &= ~GENMASK_ULL(31, 0);
913		− min_perf = HWP_LOWEST_PERF(all_cpu_data[cpu]->hwp_cap_cached);
	927	+ min_perf = HWP_LOWEST_PERF(cpu->hwp_cap_cached);
914	928
915	929	/* Set hwp_max = hwp_min */
916	930	value \|= HWP_MAX_PERF(min_perf);
@@ -920,19 +934,7 @@ static void intel_pstate_hwp_force_min_perf(int cpu) · 3 unmodified lines
920	934	if (boot_cpu_has(X86_FEATURE_HWP_EPP))
921	935	value \|= HWP_ENERGY_PERF_PREFERENCE(HWP_EPP_POWERSAVE);
922	936
923		− wrmsrl_on_cpu(cpu, MSR_HWP_REQUEST, value);
924		−}
925		−
926		−static int intel_pstate_hwp_save_state(struct cpufreq_policy *policy)
927		−{
928		− struct cpudata *cpu_data = all_cpu_data[policy->cpu];
929		−
930		− if (!hwp_active)
931		− return 0;
932		−
933		− cpu_data->epp_saved = intel_pstate_get_epp(cpu_data, 0);
934		−
935		− return 0;
	937	+ wrmsrl_on_cpu(cpu->cpu, MSR_HWP_REQUEST, value);
936	938	}
937	939
938	940	#define POWER_CTL_EE_ENABLE 1
@@ -959,8 +961,28 @@ static void set_power_ctl_ee_state(bool input) · 20 unmodified lines
959	961
960	962	static void intel_pstate_hwp_enable(struct cpudata *cpudata);
961	963
	964	+static void intel_pstate_hwp_reenable(struct cpudata *cpu)
	965	+{
	966	+ intel_pstate_hwp_enable(cpu);
	967	+ wrmsrl_on_cpu(cpu->cpu, MSR_HWP_REQUEST, READ_ONCE(cpu->hwp_req_cached));
	968	+}
	969	+
	970	+static int intel_pstate_suspend(struct cpufreq_policy *policy)
	971	+{
	972	+ struct cpudata *cpu = all_cpu_data[policy->cpu];
	973	+
	974	+ pr_debug("CPU %d suspending\n", cpu->cpu);
	975	+
	976	+ cpu->suspended = true;
	977	+
	978	+ return 0;
	979	+}
	980	+
962	981	static int intel_pstate_resume(struct cpufreq_policy *policy)
963	982	{
	983	+ struct cpudata *cpu = all_cpu_data[policy->cpu];
	984	+
	985	+ pr_debug("CPU %d resuming\n", cpu->cpu);
964	986
965	987	/* Only restore if the system default is changed */
966	988	if (power_ctl_ee_state == POWER_CTL_EE_ENABLE)
@@ -968,18 +990,16 @@ static int intel_pstate_resume(struct cpufreq_policy *policy) · 1 unmodified line
968	990	else if (power_ctl_ee_state == POWER_CTL_EE_DISABLE)
969	991	set_power_ctl_ee_state(false);
970	992
971		− if (!hwp_active)
972		− return 0;
	993	+ if (cpu->suspended && hwp_active) {
	994	+ mutex_lock(&intel_pstate_limits_lock);
973	995
974		− mutex_lock(&intel_pstate_limits_lock);
	996	+ /* Re-enable HWP, because "online" has not done that. */
	997	+ intel_pstate_hwp_reenable(cpu);
975	998
976		− if (policy->cpu == 0)
977		− intel_pstate_hwp_enable(all_cpu_data[policy->cpu]);
	999	+ mutex_unlock(&intel_pstate_limits_lock);
	1000	+ }
978	1001
979		− all_cpu_data[policy->cpu]->epp_policy = 0;
980		− intel_pstate_hwp_set(policy->cpu);
981		−
982		− mutex_unlock(&intel_pstate_limits_lock);
	1002	+ cpu->suspended = false;
983	1003
984	1004	return 0;
985	1005	}
@@ -1428,7 +1448,6 @@ static void intel_pstate_hwp_enable(struct cpudata *cpudata) · 442 unmodified lines
1428	1448	wrmsrl_on_cpu(cpudata->cpu, MSR_HWP_INTERRUPT, 0x00);
1429	1449
1430	1450	wrmsrl_on_cpu(cpudata->cpu, MSR_PM_ENABLE, 0x1);
1431		− cpudata->epp_policy = 0;
1432	1451	if (cpudata->epp_default == -EINVAL)
1433	1452	cpudata->epp_default = intel_pstate_get_epp(cpudata, 0);
1434	1453	}
@@ -2097,25 +2116,31 @@ static int intel_pstate_init_cpu(unsigned int cpunum) · 662 unmodified lines
2097	2116
2098	2117	all_cpu_data[cpunum] = cpu;
2099	2118
2100		− cpu->epp_default = -EINVAL;
2101		− cpu->epp_powersave = -EINVAL;
2102		− cpu->epp_saved = -EINVAL;
2103		− }
2104		−
2105		− cpu = all_cpu_data[cpunum];
	2119	+ cpu->cpu = cpunum;
2106	2120
2107		− cpu->cpu = cpunum;
	2121	+ cpu->epp_default = -EINVAL;
2108	2122
2109		− if (hwp_active) {
2110		− const struct x86_cpu_id *id;
	2123	+ if (hwp_active) {
	2124	+ const struct x86_cpu_id *id;
2111	2125
2112		− intel_pstate_hwp_enable(cpu);
	2126	+ intel_pstate_hwp_enable(cpu);
2113	2127
2114		− id = x86_match_cpu(intel_pstate_hwp_boost_ids);
2115		− if (id && intel_pstate_acpi_pm_profile_server())
2116		− hwp_boost = true;
	2128	+ id = x86_match_cpu(intel_pstate_hwp_boost_ids);
	2129	+ if (id && intel_pstate_acpi_pm_profile_server())
	2130	+ hwp_boost = true;
	2131	+ }
	2132	+ } else if (hwp_active) {
	2133	+ /*
	2134	+ * Re-enable HWP in case this happens after a resume from ACPI
	2135	+ * S3 if the CPU was offline during the whole system/resume
	2136	+ * cycle.
	2137	+ */
	2138	+ intel_pstate_hwp_reenable(cpu);
2117	2139	}
2118	2140
	2141	+ cpu->epp_powersave = -EINVAL;
	2142	+ cpu->epp_policy = 0;
	2143	+
2119	2144	intel_pstate_get_cpu_pstates(cpu);
2120	2145
2121	2146	pr_debug("controlling: cpu %d\n", cpunum);
@@ -2296,28 +2321,61 @@ static int intel_pstate_verify_policy(struct cpufreq_policy_data *policy) · 174 unmodified lines
2296	2321	return 0;
2297	2322	}
2298	2323
2299		−static void intel_cpufreq_stop_cpu(struct cpufreq_policy *policy)
	2324	+static int intel_pstate_cpu_offline(struct cpufreq_policy *policy)
2300	2325	{
	2326	+ struct cpudata *cpu = all_cpu_data[policy->cpu];
	2327	+
	2328	+ pr_debug("CPU %d going offline\n", cpu->cpu);
	2329	+
	2330	+ if (cpu->suspended)
	2331	+ return 0;
	2332	+
	2333	+ /*
	2334	+ * If the CPU is an SMT thread and it goes offline with the performance
	2335	+ * settings different from the minimum, it will prevent its sibling
	2336	+ * from getting to lower performance levels, so force the minimum
	2337	+ * performance on CPU offline to prevent that from happening.
	2338	+ */
2301	2339	if (hwp_active)
2302		− intel_pstate_hwp_force_min_perf(policy->cpu);
	2340	+ intel_pstate_hwp_offline(cpu);
2303	2341	else
2304		− intel_pstate_set_min_pstate(all_cpu_data[policy->cpu]);
	2342	+ intel_pstate_set_min_pstate(cpu);
	2343	+
	2344	+ intel_pstate_exit_perf_limits(policy);
	2345	+
	2346	+ return 0;
	2347	+}
	2348	+
	2349	+static int intel_pstate_cpu_online(struct cpufreq_policy *policy)
	2350	+{
	2351	+ struct cpudata *cpu = all_cpu_data[policy->cpu];
	2352	+
	2353	+ pr_debug("CPU %d going online\n", cpu->cpu);
	2354	+
	2355	+ intel_pstate_init_acpi_perf_limits(policy);
	2356	+
	2357	+ if (hwp_active) {
	2358	+ /*
	2359	+ * Re-enable HWP and clear the "suspended" flag to let "resume"
	2360	+ * know that it need not do that.
	2361	+ */
	2362	+ intel_pstate_hwp_reenable(cpu);
	2363	+ cpu->suspended = false;
	2364	+ }
	2365	+
	2366	+ return 0;
2305	2367	}
2306	2368
2307	2369	static void intel_pstate_stop_cpu(struct cpufreq_policy *policy)
2308	2370	{
2309		− pr_debug("CPU %d exiting\n", policy->cpu);
	2371	+ pr_debug("CPU %d stopping\n", policy->cpu);
2310	2372
2311	2373	intel_pstate_clear_update_util_hook(policy->cpu);
2312		− if (hwp_active)
2313		− intel_pstate_hwp_save_state(policy);
2314		−
2315		− intel_cpufreq_stop_cpu(policy);
2316	2374	}
2317	2375
2318	2376	static int intel_pstate_cpu_exit(struct cpufreq_policy *policy)
2319	2377	{
2320		− intel_pstate_exit_perf_limits(policy);
	2378	+ pr_debug("CPU %d exiting\n", policy->cpu);
2321	2379
2322	2380	policy->fast_switch_possible = false;
2323	2381
@@ -2378,6 +2436,12 @@ static int intel_pstate_cpu_init(struct cpufreq_policy *policy) · 54 unmodified lines
2378	2436	*/
2379	2437	policy->policy = CPUFREQ_POLICY_POWERSAVE;
2380	2438
	2439	+ if (hwp_active) {
	2440	+ struct cpudata *cpu = all_cpu_data[policy->cpu];
	2441	+
	2442	+ cpu->epp_cached = intel_pstate_get_epp(cpu, 0);
	2443	+ }
	2444	+
2381	2445	return 0;
2382	2446	}
2383	2447
@@ -2385,11 +2449,13 @@ static struct cpufreq_driver intel_pstate = { · 1 unmodified line
2385	2449	.flags = CPUFREQ_CONST_LOOPS,
2386	2450	.verify = intel_pstate_verify_policy,
2387	2451	.setpolicy = intel_pstate_set_policy,
2388		− .suspend = intel_pstate_hwp_save_state,
	2452	+ .suspend = intel_pstate_suspend,
2389	2453	.resume = intel_pstate_resume,
2390	2454	.init = intel_pstate_cpu_init,
2391	2455	.exit = intel_pstate_cpu_exit,
2392	2456	.stop_cpu = intel_pstate_stop_cpu,
	2457	+ .offline = intel_pstate_cpu_offline,
	2458	+ .online = intel_pstate_cpu_online,
2393	2459	.update_limits = intel_pstate_update_limits,
2394	2460	.name = "intel_pstate",
2395	2461	};
@@ -2585,7 +2651,7 @@ static int intel_cpufreq_cpu_init(struct cpufreq_policy *policy) · 189 unmodified lines
2585	2651	policy->transition_delay_us = INTEL_CPUFREQ_TRANSITION_DELAY_HWP;
2586	2652	rdmsrl_on_cpu(cpu->cpu, MSR_HWP_REQUEST, &value);
2587	2653	WRITE_ONCE(cpu->hwp_req_cached, value);
2588		− cpu->epp_cached = (value & GENMASK_ULL(31, 24)) >> 24;
	2654	+ cpu->epp_cached = intel_pstate_get_epp(cpu, value);
2589	2655	} else {
2590	2656	turbo_max = cpu->pstate.turbo_pstate;
2591	2657	policy->transition_delay_us = INTEL_CPUFREQ_TRANSITION_DELAY;
@@ -2644,7 +2710,10 @@ static struct cpufreq_driver intel_cpufreq = { · 52 unmodified lines
2644	2710	.fast_switch = intel_cpufreq_fast_switch,
2645	2711	.init = intel_cpufreq_cpu_init,
2646	2712	.exit = intel_cpufreq_cpu_exit,
2647		− .stop_cpu = intel_cpufreq_stop_cpu,
	2713	+ .offline = intel_pstate_cpu_offline,
	2714	+ .online = intel_pstate_cpu_online,
	2715	+ .suspend = intel_pstate_suspend,
	2716	+ .resume = intel_pstate_resume,
2648	2717	.update_limits = intel_pstate_update_limits,
2649	2718	.name = "intel_cpufreq",
2650	2719	};
@@ -2667,9 +2736,6 @@ static void intel_pstate_driver_cleanup(void) · 16 unmodified lines
2667	2736	}
2668	2737	put_online_cpus();
2669	2738
2670		− if (intel_pstate_driver == &intel_pstate)
2671		− intel_pstate_sysfs_hide_hwp_dynamic_boost();
2672		−
2673	2739	intel_pstate_driver = NULL;
2674	2740	}
2675	2741
@@ -2695,14 +2761,6 @@ static int intel_pstate_register_driver(struct cpufreq_driver *driver) · 19 unmodified lines
2695	2761	return 0;
2696	2762	}
2697	2763
2698		−static int intel_pstate_unregister_driver(void)
2699		−{
2700		− cpufreq_unregister_driver(intel_pstate_driver);
2701		− intel_pstate_driver_cleanup();
2702		−
2703		− return 0;
2704		−}
2705		−
2706	2764	static ssize_t intel_pstate_show_status(char *buf)
2707	2765	{
2708	2766	if (!intel_pstate_driver)
@@ -2714,20 +2772,23 @@ static ssize_t intel_pstate_show_status(char *buf) · 5 unmodified lines
2714	2772
2715	2773	static int intel_pstate_update_status(const char *buf, size_t size)
2716	2774	{
2717		− int ret;
	2775	+ if (size == 3 && !strncmp(buf, "off", size)) {
	2776	+ if (!intel_pstate_driver)
	2777	+ return -EINVAL;
	2778	+
	2779	+ if (hwp_active)
	2780	+ return -EBUSY;
2718	2781
2719		− if (size == 3 && !strncmp(buf, "off", size))
2720		− return intel_pstate_driver ?
2721		− intel_pstate_unregister_driver() : -EINVAL;
	2782	+ cpufreq_unregister_driver(intel_pstate_driver);
	2783	+ intel_pstate_driver_cleanup();
	2784	+ }
2722	2785
2723	2786	if (size == 6 && !strncmp(buf, "active", size)) {
2724	2787	if (intel_pstate_driver) {
2725	2788	if (intel_pstate_driver == &intel_pstate)
2726	2789	return 0;
2727	2790
2728		− ret = intel_pstate_unregister_driver();
2729		− if (ret)
2730		− return ret;
	2791	+ cpufreq_unregister_driver(intel_pstate_driver);
2731	2792	}
2732	2793
2733	2794	return intel_pstate_register_driver(&intel_pstate);
@@ -2738,9 +2799,8 @@ static int intel_pstate_update_status(const char *buf, size_t size) · 4 unmodified lines
2738	2799	if (intel_pstate_driver == &intel_cpufreq)
2739	2800	return 0;
2740	2801
2741		− ret = intel_pstate_unregister_driver();
2742		− if (ret)
2743		− return ret;
	2802	+ cpufreq_unregister_driver(intel_pstate_driver);
	2803	+ intel_pstate_sysfs_hide_hwp_dynamic_boost();
2744	2804	}
2745	2805
2746	2806	return intel_pstate_register_driver(&intel_cpufreq);

drivers/cpufreq/p4-clockmod.c+1−1

@@ -129,7 +129,7 @@ static unsigned int cpufreq_p4_get_frequency(struct cpuinfo_x86 *c) · 128 unmodified lines
129	129	return speedstep_get_frequency(SPEEDSTEP_CPU_PCORE);
130	130	case 0x0D: /* Pentium M (Dothan) */
131	131	p4clockmod_driver.flags \|= CPUFREQ_CONST_LOOPS;
132		− /* fall through */
	132	+ fallthrough;
133	133	case 0x09: /* Pentium M (Banias) */
134	134	return speedstep_get_frequency(SPEEDSTEP_CPU_PM);
135	135	}

drivers/cpufreq/speedstep-lib.c+1−1

@@ -366,7 +366,7 @@ enum speedstep_processor speedstep_detect_processor(void) · 365 unmodified lines
366	366	} else
367	367	return SPEEDSTEP_CPU_PIII_C;
368	368	}
369		− /* fall through */
	369	+ fallthrough;
370	370	default:
371	371	return 0;
372	372	}

drivers/cpufreq/tegra194-cpufreq.c+7−3

@@ -56,9 +56,11 @@ struct read_counters_work { · 55 unmodified lines
56	56
57	57	static struct workqueue_struct *read_counters_wq;
58	58
59		−static enum cluster get_cpu_cluster(u8 cpu)
	59	+static void get_cpu_cluster(void *cluster)
60	60	{
61		− return MPIDR_AFFINITY_LEVEL(cpu_logical_map(cpu), 1);
	61	+ u64 mpidr = read_cpuid_mpidr() & MPIDR_HWID_BITMASK;
	62	+
	63	+ ((uint32_t )cluster) = MPIDR_AFFINITY_LEVEL(mpidr, 1);
62	64	}
63	65
64	66	/*
@@ -186,8 +188,10 @@ static unsigned int tegra194_get_speed(u32 cpu) · 121 unmodified lines
186	188	static int tegra194_cpufreq_init(struct cpufreq_policy *policy)
187	189	{
188	190	struct tegra194_cpufreq_data *data = cpufreq_get_driver_data();
189		− int cl = get_cpu_cluster(policy->cpu);
190	191	u32 cpu;
	192	+ u32 cl;
	193	+
	194	+ smp_call_function_single(policy->cpu, get_cpu_cluster, &cl, true);
191	195
192	196	if (cl >= data->num_clusters)
193	197	return -EINVAL;

drivers/cpufreq/ti-cpufreq.c+2−2

@@ -86,11 +86,11 @@ static unsigned long dra7_efuse_xlate(struct ti_cpufreq_data *opp_data, · 85 unmodified lines
86	86	case DRA76_EFUSE_HAS_PLUS_MPU_OPP:
87	87	case DRA76_EFUSE_HAS_ALL_MPU_OPP:
88	88	calculated_efuse \|= DRA76_EFUSE_PLUS_MPU_OPP;
89		− /* Fall through */
	89	+ fallthrough;
90	90	case DRA7_EFUSE_HAS_ALL_MPU_OPP:
91	91	case DRA7_EFUSE_HAS_HIGH_MPU_OPP:
92	92	calculated_efuse \|= DRA7_EFUSE_HIGH_MPU_OPP;
93		− /* Fall through */
	93	+ fallthrough;
94	94	case DRA7_EFUSE_HAS_OD_MPU_OPP:
95	95	calculated_efuse \|= DRA7_EFUSE_OD_MPU_OPP;
96	96	}

drivers/cpuidle/cpuidle.c+14−5

@@ -22,6 +22,7 @@ · 21 unmodified lines
22	22	#include <linux/module.h>
23	23	#include <linux/suspend.h>
24	24	#include <linux/tick.h>
	25	+#include <linux/mmu_context.h>
25	26	#include <trace/events/power.h>
26	27
27	28	#include "cpuidle.h"
@@ -145,21 +146,24 @@ static void enter_s2idle_proper(struct cpuidle_driver *drv, · 117 unmodified lines
145	146	* executing it contains RCU usage regarded as invalid in the idle
146	147	* context, so tell RCU about that.
147	148	*/
148		− RCU_NONIDLE(tick_freeze());
	149	+ tick_freeze();
149	150	/*
150	151	* The state used here cannot be a "coupled" one, because the "coupled"
151	152	* cpuidle mechanism enables interrupts and doing that with timekeeping
152	153	* suspended is generally unsafe.
153	154	*/
154	155	stop_critical_timings();
	156	+ rcu_idle_enter();
155	157	drv->states[index].enter_s2idle(dev, drv, index);
156		− WARN_ON(!irqs_disabled());
	158	+ if (WARN_ON_ONCE(!irqs_disabled()))
	159	+ local_irq_disable();
157	160	/*
158	161	* timekeeping_resume() that will be called by tick_unfreeze() for the
159	162	* first CPU executing it calls functions containing RCU read-side
160	163	* critical sections, so tell RCU about that.
161	164	*/
162		− RCU_NONIDLE(tick_unfreeze());
	165	+ rcu_idle_exit();
	166	+ tick_unfreeze();
163	167	start_critical_timings();
164	168
165	169	time_end = ns_to_ktime(local_clock());
@@ -225,19 +229,24 @@ int cpuidle_enter_state(struct cpuidle_device dev, struct cpuidle_driver drv, · 59 unmodified lines
225	229	broadcast = false;
226	230	}
227	231
	232	+ if (target_state->flags & CPUIDLE_FLAG_TLB_FLUSHED)
	233	+ leave_mm(dev->cpu);
	234	+
228	235	/* Take note of the planned idle state. */
229	236	sched_idle_set_state(target_state);
230	237
231		− trace_cpu_idle_rcuidle(index, dev->cpu);
	238	+ trace_cpu_idle(index, dev->cpu);
232	239	time_start = ns_to_ktime(local_clock());
233	240
234	241	stop_critical_timings();
	242	+ rcu_idle_enter();
235	243	entered_state = target_state->enter(dev, drv, index);
	244	+ rcu_idle_exit();
236	245	start_critical_timings();
237	246
238	247	sched_clock_idle_wakeup_event();
239	248	time_end = ns_to_ktime(local_clock());
240		− trace_cpu_idle_rcuidle(PWR_EVENT_EXIT, dev->cpu);
	249	+ trace_cpu_idle(PWR_EVENT_EXIT, dev->cpu);
241	250
242	251	/* The cpu is no longer idle or about to enter idle. */
243	252	sched_idle_set_state(NULL);

drivers/crypto/Kconfig+3−0

@@ -873,6 +873,9 @@ config CRYPTO_DEV_SA2UL · 872 unmodified lines
873	873	select CRYPTO_AES
874	874	select CRYPTO_AES_ARM64
875	875	select CRYPTO_ALGAPI
	876	+ select CRYPTO_SHA1
	877	+ select CRYPTO_SHA256
	878	+ select CRYPTO_SHA512
876	879	select HW_RANDOM
877	880	select SG_SPLIT
878	881	help

drivers/crypto/axis/artpec6_crypto.c+1−1

@@ -2310,7 +2310,7 @@ static int artpec6_crypto_prepare_submit_hash(struct ahash_request *req) · 2309 unmodified lines
2310	2310
2311	2311	case ARTPEC6_CRYPTO_PREPARE_HASH_NO_START:
2312	2312	ret = 0;
2313		− /* Fallthrough */
	2313	+ fallthrough;
2314	2314
2315	2315	default:
2316	2316	artpec6_crypto_common_destroy(&req_ctx->common);

drivers/crypto/cavium/cpt/cptvf_reqmanager.c+2−2

@@ -90,11 +90,11 @@ static int setup_sgio_components(struct cpt_vf cptvf, struct buf_ptr list, · 89 unmodified lines
90	90	case 3:
91	91	sg_ptr->u.s.len2 = cpu_to_be16(list[i * 4 + 2].size);
92	92	sg_ptr->ptr2 = cpu_to_be64(list[i * 4 + 2].dma_addr);
93		− /* Fall through */
	93	+ fallthrough;
94	94	case 2:
95	95	sg_ptr->u.s.len1 = cpu_to_be16(list[i * 4 + 1].size);
96	96	sg_ptr->ptr1 = cpu_to_be64(list[i * 4 + 1].dma_addr);
97		− /* Fall through */
	97	+ fallthrough;
98	98	case 1:
99	99	sg_ptr->u.s.len0 = cpu_to_be16(list[i * 4 + 0].size);
100	100	sg_ptr->ptr0 = cpu_to_be64(list[i * 4 + 0].dma_addr);

drivers/crypto/chelsio/chcr_ktls.c+2−2

@@ -135,7 +135,7 @@ static int chcr_ktls_update_connection_state(struct chcr_ktls_info *tx_info, · 134 unmodified lines
135	135	break;
136	136	/* update to the next state and also initialize TCB */
137	137	tx_info->connection_state = new_state;
138		− /* FALLTHRU */
	138	+ fallthrough;
139	139	case KTLS_CONN_ACT_OPEN_RPL:
140	140	/* if we are stuck in this state, means tcb init might not
141	141	* received by HW, try sending it again.
@@ -150,7 +150,7 @@ static int chcr_ktls_update_connection_state(struct chcr_ktls_info *tx_info, · 8 unmodified lines
150	150	break;
151	151	/* update to the next state and check if l2t_state is valid */
152	152	tx_info->connection_state = new_state;
153		− /* FALLTHRU */
	153	+ fallthrough;
154	154	case KTLS_CONN_SET_TCB_RPL:
155	155	/* Check if l2t state is valid, then move to ready state. */
156	156	if (cxgb4_check_l2t_valid(tx_info->l2te)) {

drivers/crypto/marvell/octeontx/otx_cptvf_reqmgr.c+2−2

@@ -140,11 +140,11 @@ static inline int setup_sgio_components(struct pci_dev *pdev, · 139 unmodified lines
140	140	case 3:
141	141	sg_ptr->u.s.len2 = cpu_to_be16(list[i * 4 + 2].size);
142	142	sg_ptr->ptr2 = cpu_to_be64(list[i * 4 + 2].dma_addr);
143		− /* Fall through */
	143	+ fallthrough;
144	144	case 2:
145	145	sg_ptr->u.s.len1 = cpu_to_be16(list[i * 4 + 1].size);
146	146	sg_ptr->ptr1 = cpu_to_be64(list[i * 4 + 1].dma_addr);
147		− /* Fall through */
	147	+ fallthrough;
148	148	case 1:
149	149	sg_ptr->u.s.len0 = cpu_to_be16(list[i * 4 + 0].size);
150	150	sg_ptr->ptr0 = cpu_to_be64(list[i * 4 + 0].dma_addr);

drivers/crypto/qat/qat_common/adf_admin.c+4−3

@@ -131,9 +131,10 @@ static int adf_put_admin_msg_sync(struct adf_accel_dev *accel_dev, u32 ae, · 130 unmodified lines
131	131	memcpy(admin->virt_addr + offset, in, ADF_ADMINMSG_LEN);
132	132	ADF_CSR_WR(mailbox, mb_offset, 1);
133	133
134		− ret = readl_poll_timeout(mailbox + mb_offset, status,
135		− status == 0, ADF_ADMIN_POLL_DELAY_US,
136		− ADF_ADMIN_POLL_TIMEOUT_US);
	134	+ ret = read_poll_timeout(ADF_CSR_RD, status, status == 0,
	135	+ ADF_ADMIN_POLL_DELAY_US,
	136	+ ADF_ADMIN_POLL_TIMEOUT_US, true,
	137	+ mailbox, mb_offset);
137	138	if (ret < 0) {
138	139	/* Response timeout */
139	140	dev_err(&GET_DEV(accel_dev),

drivers/crypto/qat/qat_common/adf_pf2vf_msg.c+1−1

@@ -340,7 +340,7 @@ static int adf_vf2pf_request_version(struct adf_accel_dev *accel_dev) · 339 unmodified lines
340	340	/* VF is newer than PF and decides whether it is compatible */
341	341	if (accel_dev->vf.pf_version >= hw_data->min_iov_compat_ver)
342	342	break;
343		− /* fall through */
	343	+ fallthrough;
344	344	case ADF_PF2VF_VF_INCOMPATIBLE:
345	345	dev_err(&GET_DEV(accel_dev),
346	346	"PF (vers %d) and VF (vers %d) are not compatible\n",

drivers/crypto/qat/qat_common/qat_uclo.c+3−3

@@ -752,7 +752,7 @@ static int qat_uclo_init_reg(struct icp_qat_fw_loader_handle *handle, · 751 unmodified lines
752	752	case ICP_GPA_ABS:
753	753	case ICP_GPB_ABS:
754	754	ctx_mask = 0;
755		− /* fall through */
	755	+ fallthrough;
756	756	case ICP_GPA_REL:
757	757	case ICP_GPB_REL:
758	758	return qat_hal_init_gpr(handle, ae, ctx_mask, reg_type,
@@ -762,7 +762,7 @@ static int qat_uclo_init_reg(struct icp_qat_fw_loader_handle *handle, · 3 unmodified lines
762	762	case ICP_SR_RD_ABS:
763	763	case ICP_DR_RD_ABS:
764	764	ctx_mask = 0;
765		− /* fall through */
	765	+ fallthrough;
766	766	case ICP_SR_REL:
767	767	case ICP_DR_REL:
768	768	case ICP_SR_RD_REL:
@@ -772,7 +772,7 @@ static int qat_uclo_init_reg(struct icp_qat_fw_loader_handle *handle, · 3 unmodified lines
772	772	case ICP_SR_WR_ABS:
773	773	case ICP_DR_WR_ABS:
774	774	ctx_mask = 0;
775		− /* fall through */
	775	+ fallthrough;
776	776	case ICP_SR_WR_REL:
777	777	case ICP_DR_WR_REL:
778	778	return qat_hal_init_wr_xfer(handle, ae, ctx_mask, reg_type,

drivers/crypto/ux500/cryp/cryp.c+6−6

@@ -314,17 +314,17 @@ void cryp_save_device_context(struct cryp_device_data *device_data, · 313 unmodified lines
314	314	case CRYP_KEY_SIZE_256:
315	315	ctx->key_4_l = readl_relaxed(&src_reg->key_4_l);
316	316	ctx->key_4_r = readl_relaxed(&src_reg->key_4_r);
317		− /* Fall through */
	317	+ fallthrough;
318	318
319	319	case CRYP_KEY_SIZE_192:
320	320	ctx->key_3_l = readl_relaxed(&src_reg->key_3_l);
321	321	ctx->key_3_r = readl_relaxed(&src_reg->key_3_r);
322		− /* Fall through */
	322	+ fallthrough;
323	323
324	324	case CRYP_KEY_SIZE_128:
325	325	ctx->key_2_l = readl_relaxed(&src_reg->key_2_l);
326	326	ctx->key_2_r = readl_relaxed(&src_reg->key_2_r);
327		− /* Fall through */
	327	+ fallthrough;
328	328
329	329	default:
330	330	ctx->key_1_l = readl_relaxed(&src_reg->key_1_l);
@@ -364,17 +364,17 @@ void cryp_restore_device_context(struct cryp_device_data *device_data, · 33 unmodified lines
364	364	case CRYP_KEY_SIZE_256:
365	365	writel_relaxed(ctx->key_4_l, &reg->key_4_l);
366	366	writel_relaxed(ctx->key_4_r, &reg->key_4_r);
367		− /* Fall through */
	367	+ fallthrough;
368	368
369	369	case CRYP_KEY_SIZE_192:
370	370	writel_relaxed(ctx->key_3_l, &reg->key_3_l);
371	371	writel_relaxed(ctx->key_3_r, &reg->key_3_r);
372		− /* Fall through */
	372	+ fallthrough;
373	373
374	374	case CRYP_KEY_SIZE_128:
375	375	writel_relaxed(ctx->key_2_l, &reg->key_2_l);
376	376	writel_relaxed(ctx->key_2_r, &reg->key_2_r);
377		− /* Fall through */
	377	+ fallthrough;
378	378
379	379	default:
380	380	writel_relaxed(ctx->key_1_l, &reg->key_1_l);

drivers/dax/device.c+1−1

@@ -429,7 +429,7 @@ int dev_dax_probe(struct device *dev) · 428 unmodified lines
429	429	return -EBUSY;
430	430	}
431	431
432		− dev_dax->pgmap.type = MEMORY_DEVICE_DEVDAX;
	432	+ dev_dax->pgmap.type = MEMORY_DEVICE_GENERIC;
433	433	addr = devm_memremap_pages(dev, &dev_dax->pgmap);
434	434	if (IS_ERR(addr))
435	435	return PTR_ERR(addr);

drivers/dax/super.c+6−0

@@ -100,6 +100,12 @@ bool __generic_fsdax_supported(struct dax_device *dax_dev, · 99 unmodified lines
100	100	return false;
101	101	}
102	102
	103	+ if (!dax_dev && !bdev_dax_supported(bdev, blocksize)) {
	104	+ pr_debug("%s: error: dax unsupported by block device\n",
	105	+ bdevname(bdev, buf));
	106	+ return false;
	107	+ }
	108	+
103	109	id = dax_read_lock();
104	110	len = dax_direct_access(dax_dev, pgoff, 1, &kaddr, &pfn);
105	111	len2 = dax_direct_access(dax_dev, pgoff_end, 1, &end_kaddr, &end_pfn);

drivers/dma/acpi-dma.c+3−1

@@ -135,11 +135,13 @@ static void acpi_dma_parse_csrt(struct acpi_device adev, struct acpi_dma adma) · 134 unmodified lines
135	135	if (ret < 0) {
136	136	dev_warn(&adev->dev,
137	137	"error in parsing resource group\n");
138		− return;
	138	+ break;
139	139	}
140	140
141	141	grp = (struct acpi_csrt_group )((void )grp + grp->length);
142	142	}
	143	+
	144	+ acpi_put_table((struct acpi_table_header *)csrt);
143	145	}
144	146
145	147	/**

drivers/dma/amba-pl08x.c+5−5

@@ -1767,7 +1767,7 @@ static u32 pl08x_memcpy_cctl(struct pl08x_driver_data *pl08x) · 1766 unmodified lines
1767	1767	default:
1768	1768	dev_err(&pl08x->adev->dev,
1769	1769	"illegal burst size for memcpy, set to 1\n");
1770		− /* Fall through */
	1770	+ fallthrough;
1771	1771	case PL08X_BURST_SZ_1:
1772	1772	cctl \|= PL080_BSIZE_1 << PL080_CONTROL_SB_SIZE_SHIFT \|
1773	1773	PL080_BSIZE_1 << PL080_CONTROL_DB_SIZE_SHIFT;
@@ -1806,7 +1806,7 @@ static u32 pl08x_memcpy_cctl(struct pl08x_driver_data *pl08x) · 32 unmodified lines
1806	1806	default:
1807	1807	dev_err(&pl08x->adev->dev,
1808	1808	"illegal bus width for memcpy, set to 8 bits\n");
1809		− /* Fall through */
	1809	+ fallthrough;
1810	1810	case PL08X_BUS_WIDTH_8_BITS:
1811	1811	cctl \|= PL080_WIDTH_8BIT << PL080_CONTROL_SWIDTH_SHIFT \|
1812	1812	PL080_WIDTH_8BIT << PL080_CONTROL_DWIDTH_SHIFT;
@@ -1850,7 +1850,7 @@ static u32 pl08x_ftdmac020_memcpy_cctl(struct pl08x_driver_data *pl08x) · 37 unmodified lines
1850	1850	default:
1851	1851	dev_err(&pl08x->adev->dev,
1852	1852	"illegal bus width for memcpy, set to 8 bits\n");
1853		− /* Fall through */
	1853	+ fallthrough;
1854	1854	case PL08X_BUS_WIDTH_8_BITS:
1855	1855	cctl \|= PL080_WIDTH_8BIT << FTDMAC020_LLI_SRC_WIDTH_SHIFT \|
1856	1856	PL080_WIDTH_8BIT << FTDMAC020_LLI_DST_WIDTH_SHIFT;
@@ -2612,7 +2612,7 @@ static int pl08x_of_probe(struct amba_device *adev, · 755 unmodified lines
2612	2612	switch (val) {
2613	2613	default:
2614	2614	dev_err(&adev->dev, "illegal burst size for memcpy, set to 1\n");
2615		− /* Fall through */
	2615	+ fallthrough;
2616	2616	case 1:
2617	2617	pd->memcpy_burst_size = PL08X_BURST_SZ_1;
2618	2618	break;
@@ -2647,7 +2647,7 @@ static int pl08x_of_probe(struct amba_device *adev, · 28 unmodified lines
2647	2647	switch (val) {
2648	2648	default:
2649	2649	dev_err(&adev->dev, "illegal bus width for memcpy, set to 8 bits\n");
2650		− /* Fall through */
	2650	+ fallthrough;
2651	2651	case 8:
2652	2652	pd->memcpy_bus_width = PL08X_BUS_WIDTH_8_BITS;
2653	2653	break;

drivers/dma/at_hdmac.c+9−2

@@ -1650,13 +1650,17 @@ static struct dma_chan at_dma_xlate(struct of_phandle_args dma_spec, · 1649 unmodified lines
1650	1650	return NULL;
1651	1651
1652	1652	dmac_pdev = of_find_device_by_node(dma_spec->np);
	1653	+ if (!dmac_pdev)
	1654	+ return NULL;
1653	1655
1654	1656	dma_cap_zero(mask);
1655	1657	dma_cap_set(DMA_SLAVE, mask);
1656	1658
1657	1659	atslave = kmalloc(sizeof(*atslave), GFP_KERNEL);
1658		− if (!atslave)
	1660	+ if (!atslave) {
	1661	+ put_device(&dmac_pdev->dev);
1659	1662	return NULL;
	1663	+ }
1660	1664
1661	1665	atslave->cfg = ATC_DST_H2SEL_HW \| ATC_SRC_H2SEL_HW;
1662	1666	/*
@@ -1685,8 +1689,11 @@ static struct dma_chan at_dma_xlate(struct of_phandle_args dma_spec, · 22 unmodified lines
1685	1689	atslave->dma_dev = &dmac_pdev->dev;
1686	1690
1687	1691	chan = dma_request_channel(mask, at_dma_filter, atslave);
1688		− if (!chan)
	1692	+ if (!chan) {
	1693	+ put_device(&dmac_pdev->dev);
	1694	+ kfree(atslave);
1689	1695	return NULL;
	1696	+ }
1690	1697
1691	1698	atchan = to_at_dma_chan(chan);
1692	1699	atchan->per_if = dma_spec->args[0] & 0xff;

drivers/dma/dma-jz4780.c+19−19

@@ -879,24 +879,11 @@ static int jz4780_dma_probe(struct platform_device *pdev) · 878 unmodified lines
879	879	return -EINVAL;
880	880	}
881	881
882		− ret = platform_get_irq(pdev, 0);
883		− if (ret < 0)
884		− return ret;
885		−
886		− jzdma->irq = ret;
887		−
888		− ret = request_irq(jzdma->irq, jz4780_dma_irq_handler, 0, dev_name(dev),
889		− jzdma);
890		− if (ret) {
891		− dev_err(dev, "failed to request IRQ %u!\n", jzdma->irq);
892		− return ret;
893		− }
894		−
895	882	jzdma->clk = devm_clk_get(dev, NULL);
896	883	if (IS_ERR(jzdma->clk)) {
897	884	dev_err(dev, "failed to get clock\n");
898	885	ret = PTR_ERR(jzdma->clk);
899		− goto err_free_irq;
	886	+ return ret;
900	887	}
901	888
902	889	clk_prepare_enable(jzdma->clk);
@@ -949,10 +936,23 @@ static int jz4780_dma_probe(struct platform_device *pdev) · 46 unmodified lines
949	936	jzchan->vchan.desc_free = jz4780_dma_desc_free;
950	937	}
951	938
	939	+ ret = platform_get_irq(pdev, 0);
	940	+ if (ret < 0)
	941	+ goto err_disable_clk;
	942	+
	943	+ jzdma->irq = ret;
	944	+
	945	+ ret = request_irq(jzdma->irq, jz4780_dma_irq_handler, 0, dev_name(dev),
	946	+ jzdma);
	947	+ if (ret) {
	948	+ dev_err(dev, "failed to request IRQ %u!\n", jzdma->irq);
	949	+ goto err_disable_clk;
	950	+ }
	951	+
952	952	ret = dmaenginem_async_device_register(dd);
953	953	if (ret) {
954	954	dev_err(dev, "failed to register device\n");
955		− goto err_disable_clk;
	955	+ goto err_free_irq;
956	956	}
957	957
958	958	/* Register with OF DMA helpers. */
@@ -960,17 +960,17 @@ static int jz4780_dma_probe(struct platform_device *pdev) · 1 unmodified line
960	960	jzdma);
961	961	if (ret) {
962	962	dev_err(dev, "failed to register OF DMA controller\n");
963		− goto err_disable_clk;
	963	+ goto err_free_irq;
964	964	}
965	965
966	966	dev_info(dev, "JZ4780 DMA controller initialised\n");
967	967	return 0;
968	968
969		−err_disable_clk:
970		− clk_disable_unprepare(jzdma->clk);
971		−
972	969	err_free_irq:
973	970	free_irq(jzdma->irq, jzdma);
	971	+
	972	+err_disable_clk:
	973	+ clk_disable_unprepare(jzdma->clk);
974	974	return ret;
975	975	}
976	976

drivers/dma/dw-edma/dw-edma-core.c+6−5

@@ -405,7 +405,7 @@ dw_edma_device_transfer(struct dw_edma_transfer *xfer) · 404 unmodified lines
405	405	if (xfer->cyclic) {
406	406	burst->dar = xfer->xfer.cyclic.paddr;
407	407	} else {
408		− burst->dar = sg_dma_address(sg);
	408	+ burst->dar = dst_addr;
409	409	/* Unlike the typical assumption by other
410	410	* drivers/IPs the peripheral memory isn't
411	411	* a FIFO memory, in this case, it's a
@@ -413,14 +413,13 @@ dw_edma_device_transfer(struct dw_edma_transfer *xfer) · 1 unmodified line
413	413	* and destination addresses are increased
414	414	* by the same portion (data length)
415	415	*/
416		− src_addr += sg_dma_len(sg);
417	416	}
418	417	} else {
419	418	burst->dar = dst_addr;
420	419	if (xfer->cyclic) {
421	420	burst->sar = xfer->xfer.cyclic.paddr;
422	421	} else {
423		− burst->sar = sg_dma_address(sg);
	422	+ burst->sar = src_addr;
424	423	/* Unlike the typical assumption by other
425	424	* drivers/IPs the peripheral memory isn't
426	425	* a FIFO memory, in this case, it's a
@@ -428,12 +427,14 @@ dw_edma_device_transfer(struct dw_edma_transfer *xfer) · 1 unmodified line
428	427	* and destination addresses are increased
429	428	* by the same portion (data length)
430	429	*/
431		− dst_addr += sg_dma_len(sg);
432	430	}
433	431	}
434	432
435		− if (!xfer->cyclic)
	433	+ if (!xfer->cyclic) {
	434	+ src_addr += sg_dma_len(sg);
	435	+ dst_addr += sg_dma_len(sg);
436	436	sg = sg_next(sg);
	437	+ }
437	438	}
438	439
439	440	return vchan_tx_prep(&chan->vc, &desc->vd, xfer->flags);

drivers/dma/fsldma.c+1−1

@@ -1163,7 +1163,7 @@ static int fsl_dma_chan_probe(struct fsldma_device *fdev, · 1162 unmodified lines
1163	1163	switch (chan->feature & FSL_DMA_IP_MASK) {
1164	1164	case FSL_DMA_IP_85XX:
1165	1165	chan->toggle_ext_pause = fsl_chan_toggle_ext_pause;
1166		− /* Fall through */
	1166	+ fallthrough;
1167	1167	case FSL_DMA_IP_83XX:
1168	1168	chan->toggle_ext_start = fsl_chan_toggle_ext_start;
1169	1169	chan->set_src_loop_size = fsl_chan_set_src_loop_size;

drivers/dma/fsldma.h+6−6

@@ -205,10 +205,10 @@ struct fsldma_chan { · 204 unmodified lines
205	205	#else
206	206	static u64 fsl_ioread64(const u64 __iomem *addr)
207	207	{
208		− u32 fsl_addr = lower_32_bits(addr);
209		− u64 fsl_addr_hi = (u64)in_le32((u32 *)(fsl_addr + 1)) << 32;
	208	+ u32 val_lo = in_le32((u32 __iomem *)addr);
	209	+ u32 val_hi = in_le32((u32 __iomem *)addr + 1);
210	210
211		− return fsl_addr_hi \| in_le32((u32 *)fsl_addr);
	211	+ return ((u64)val_hi << 32) + val_lo;
212	212	}
213	213
214	214	static void fsl_iowrite64(u64 val, u64 __iomem *addr)
@@ -219,10 +219,10 @@ static void fsl_iowrite64(u64 val, u64 __iomem *addr) · 4 unmodified lines
219	219
220	220	static u64 fsl_ioread64be(const u64 __iomem *addr)
221	221	{
222		− u32 fsl_addr = lower_32_bits(addr);
223		− u64 fsl_addr_hi = (u64)in_be32((u32 *)fsl_addr) << 32;
	222	+ u32 val_hi = in_be32((u32 __iomem *)addr);
	223	+ u32 val_lo = in_be32((u32 __iomem *)addr + 1);
224	224
225		− return fsl_addr_hi \| in_be32((u32 *)(fsl_addr + 1));
	225	+ return ((u64)val_hi << 32) + val_lo;
226	226	}
227	227
228	228	static void fsl_iowrite64be(u64 val, u64 __iomem *addr)

drivers/dma/idxd/device.c+26−0

@@ -410,10 +410,27 @@ int idxd_device_enable(struct idxd_device *idxd) · 409 unmodified lines
410	410	return 0;
411	411	}
412	412
	413	+void idxd_device_wqs_clear_state(struct idxd_device *idxd)
	414	+{
	415	+ int i;
	416	+
	417	+ lockdep_assert_held(&idxd->dev_lock);
	418	+
	419	+ for (i = 0; i < idxd->max_wqs; i++) {
	420	+ struct idxd_wq *wq = &idxd->wqs[i];
	421	+
	422	+ if (wq->state == IDXD_WQ_ENABLED) {
	423	+ idxd_wq_disable_cleanup(wq);
	424	+ wq->state = IDXD_WQ_DISABLED;
	425	+ }
	426	+ }
	427	+}
	428	+
413	429	int idxd_device_disable(struct idxd_device *idxd)
414	430	{
415	431	struct device *dev = &idxd->pdev->dev;
416	432	u32 status;
	433	+ unsigned long flags;
417	434
418	435	if (!idxd_is_enabled(idxd)) {
419	436	dev_dbg(dev, "Device is not enabled\n");
@@ -429,13 +446,22 @@ int idxd_device_disable(struct idxd_device *idxd) · 9 unmodified lines
429	446	return -ENXIO;
430	447	}
431	448
	449	+ spin_lock_irqsave(&idxd->dev_lock, flags);
	450	+ idxd_device_wqs_clear_state(idxd);
432	451	idxd->state = IDXD_DEV_CONF_READY;
	452	+ spin_unlock_irqrestore(&idxd->dev_lock, flags);
433	453	return 0;
434	454	}
435	455
436	456	void idxd_device_reset(struct idxd_device *idxd)
437	457	{
	458	+ unsigned long flags;
	459	+
438	460	idxd_cmd_exec(idxd, IDXD_CMD_RESET_DEVICE, 0, NULL);
	461	+ spin_lock_irqsave(&idxd->dev_lock, flags);
	462	+ idxd_device_wqs_clear_state(idxd);
	463	+ idxd->state = IDXD_DEV_CONF_READY;
	464	+ spin_unlock_irqrestore(&idxd->dev_lock, flags);
439	465	}
440	466
441	467	/* Device configuration bits */

drivers/dma/idxd/irq.c+0−12

@@ -11,18 +11,6 @@ · 10 unmodified lines
11	11	#include "idxd.h"
12	12	#include "registers.h"
13	13
14		−void idxd_device_wqs_clear_state(struct idxd_device *idxd)
15		−{
16		− int i;
17		−
18		− lockdep_assert_held(&idxd->dev_lock);
19		− for (i = 0; i < idxd->max_wqs; i++) {
20		− struct idxd_wq *wq = &idxd->wqs[i];
21		−
22		− wq->state = IDXD_WQ_DISABLED;
23		− }
24		−}
25		−
26	14	static void idxd_device_reinit(struct work_struct *work)
27	15	{
28	16	struct idxd_device *idxd = container_of(work, struct idxd_device, work);

drivers/dma/imx-dma.c+1−1

@@ -556,7 +556,7 @@ static int imxdma_xfer_desc(struct imxdma_desc *d) · 555 unmodified lines
556	556	* We fall-through here intentionally, since a 2D transfer is
557	557	* similar to MEMCPY just adding the 2D slot configuration.
558	558	*/
559		− /* Fall through */
	559	+ fallthrough;
560	560	case IMXDMA_DESC_MEMCPY:
561	561	imx_dmav1_writel(imxdma, d->src, DMA_SAR(imxdmac->channel));
562	562	imx_dmav1_writel(imxdma, d->dest, DMA_DAR(imxdmac->channel));

drivers/dma/iop-adma.h+6−6

@@ -496,7 +496,7 @@ iop3xx_desc_init_xor(struct iop3xx_desc_aau *hw_desc, int src_cnt, · 495 unmodified lines
496	496	}
497	497	hw_desc->src_edc[AAU_EDCR2_IDX].e_desc_ctrl = edcr;
498	498	src_cnt = 24;
499		− /* fall through */
	499	+ fallthrough;
500	500	case 17 ... 24:
501	501	if (!u_desc_ctrl.field.blk_ctrl) {
502	502	hw_desc->src_edc[AAU_EDCR2_IDX].e_desc_ctrl = 0;
@@ -510,7 +510,7 @@ iop3xx_desc_init_xor(struct iop3xx_desc_aau *hw_desc, int src_cnt, · 7 unmodified lines
510	510	}
511	511	hw_desc->src_edc[AAU_EDCR1_IDX].e_desc_ctrl = edcr;
512	512	src_cnt = 16;
513		− /* fall through */
	513	+ fallthrough;
514	514	case 9 ... 16:
515	515	if (!u_desc_ctrl.field.blk_ctrl)
516	516	u_desc_ctrl.field.blk_ctrl = 0x2; /* use EDCR0 */
@@ -522,7 +522,7 @@ iop3xx_desc_init_xor(struct iop3xx_desc_aau *hw_desc, int src_cnt, · 5 unmodified lines
522	522	}
523	523	hw_desc->src_edc[AAU_EDCR0_IDX].e_desc_ctrl = edcr;
524	524	src_cnt = 8;
525		− /* fall through */
	525	+ fallthrough;
526	526	case 2 ... 8:
527	527	shift = 1;
528	528	for (i = 0; i < src_cnt; i++) {
@@ -602,19 +602,19 @@ iop_desc_init_null_xor(struct iop_adma_desc_slot *desc, int src_cnt, · 73 unmodified lines
602	602	case 25 ... 32:
603	603	u_desc_ctrl.field.blk_ctrl = 0x3; /* use EDCR[2:0] */
604	604	hw_desc->src_edc[AAU_EDCR2_IDX].e_desc_ctrl = 0;
605		− /* fall through */
	605	+ fallthrough;
606	606	case 17 ... 24:
607	607	if (!u_desc_ctrl.field.blk_ctrl) {
608	608	hw_desc->src_edc[AAU_EDCR2_IDX].e_desc_ctrl = 0;
609	609	u_desc_ctrl.field.blk_ctrl = 0x3; /* use EDCR[2:0] */
610	610	}
611	611	hw_desc->src_edc[AAU_EDCR1_IDX].e_desc_ctrl = 0;
612		− /* fall through */
	612	+ fallthrough;
613	613	case 9 ... 16:
614	614	if (!u_desc_ctrl.field.blk_ctrl)
615	615	u_desc_ctrl.field.blk_ctrl = 0x2; /* use EDCR0 */
616	616	hw_desc->src_edc[AAU_EDCR0_IDX].e_desc_ctrl = 0;
617		− /* fall through */
	617	+ fallthrough;
618	618	case 1 ... 8:
619	619	if (!u_desc_ctrl.field.blk_ctrl && src_cnt > 4)
620	620	u_desc_ctrl.field.blk_ctrl = 0x1; /* use mini-desc */

drivers/dma/nbpfaxi.c+1−1

@@ -483,7 +483,7 @@ static size_t nbpf_xfer_size(struct nbpf_device *nbpf, · 482 unmodified lines
483	483
484	484	default:
485	485	pr_warn("%s(): invalid bus width %u\n", __func__, width);
486		− /* fall through */
	486	+ fallthrough;
487	487	case DMA_SLAVE_BUSWIDTH_1_BYTE:
488	488	size = burst;
489	489	}

drivers/dma/of-dma.c+4−4

@@ -71,12 +71,12 @@ static struct dma_chan of_dma_router_xlate(struct of_phandle_args dma_spec, · 70 unmodified lines
71	71	return NULL;
72	72
73	73	chan = ofdma_target->of_dma_xlate(&dma_spec_target, ofdma_target);
74		− if (chan) {
75		− chan->router = ofdma->dma_router;
76		− chan->route_data = route_data;
77		− } else {
	74	+ if (IS_ERR_OR_NULL(chan)) {
78	75	ofdma->dma_router->route_free(ofdma->dma_router->dev,
79	76	route_data);
	77	+ } else {
	78	+ chan->router = ofdma->dma_router;
	79	+ chan->route_data = route_data;
80	80	}
81	81
82	82	/*

drivers/dma/pl330.c+4−8

@@ -1061,16 +1061,16 @@ static bool _start(struct pl330_thread *thrd) · 1060 unmodified lines
1061	1061
1062	1062	if (_state(thrd) == PL330_STATE_KILLING)
1063	1063	UNTIL(thrd, PL330_STATE_STOPPED)
1064		− /* fall through */
	1064	+ fallthrough;
1065	1065
1066	1066	case PL330_STATE_FAULTING:
1067	1067	_stop(thrd);
1068		− /* fall through */
	1068	+ fallthrough;
1069	1069
1070	1070	case PL330_STATE_KILLING:
1071	1071	case PL330_STATE_COMPLETING:
1072	1072	UNTIL(thrd, PL330_STATE_STOPPED)
1073		− /* fall through */
	1073	+ fallthrough;
1074	1074
1075	1075	case PL330_STATE_STOPPED:
1076	1076	return _trigger(thrd);
@@ -1121,7 +1121,6 @@ static u32 _emit_load(unsigned int dry_run, u8 buf[], · 44 unmodified lines
1121	1121
1122	1122	switch (direction) {
1123	1123	case DMA_MEM_TO_MEM:
1124		− /* fall through */
1125	1124	case DMA_MEM_TO_DEV:
1126	1125	off += _emit_LD(dry_run, &buf[off], cond);
1127	1126	break;
@@ -1155,7 +1154,6 @@ static inline u32 _emit_store(unsigned int dry_run, u8 buf[], · 27 unmodified lines
1155	1154
1156	1155	switch (direction) {
1157	1156	case DMA_MEM_TO_MEM:
1158		− /* fall through */
1159	1157	case DMA_DEV_TO_MEM:
1160	1158	off += _emit_ST(dry_run, &buf[off], cond);
1161	1159	break;
@@ -1216,7 +1214,6 @@ static int _bursts(struct pl330_dmac *pl330, unsigned dry_run, u8 buf[], · 54 unmodified lines
1216	1214
1217	1215	switch (pxs->desc->rqtype) {
1218	1216	case DMA_MEM_TO_DEV:
1219		− /* fall through */
1220	1217	case DMA_DEV_TO_MEM:
1221	1218	off += _ldst_peripheral(pl330, dry_run, &buf[off], pxs, cyc,
1222	1219	cond);
@@ -1266,7 +1263,6 @@ static int _dregs(struct pl330_dmac *pl330, unsigned int dry_run, u8 buf[], · 43 unmodified lines
1266	1263
1267	1264	switch (pxs->desc->rqtype) {
1268	1265	case DMA_MEM_TO_DEV:
1269		− /* fall through */
1270	1266	case DMA_DEV_TO_MEM:
1271	1267	off += _emit_MOV(dry_run, &buf[off], CCR, dregs_ccr);
1272	1268	off += _ldst_peripheral(pl330, dry_run, &buf[off], pxs, 1,
@@ -2801,6 +2797,7 @@ pl330_prep_dma_memcpy(struct dma_chan *chan, dma_addr_t dst, · 1528 unmodified lines
2801	2797	while (burst != (1 << desc->rqcfg.brst_size))
2802	2798	desc->rqcfg.brst_size++;
2803	2799
	2800	+ desc->rqcfg.brst_len = get_burst_len(desc, len);
2804	2801	/*
2805	2802	* If burst size is smaller than bus width then make sure we only
2806	2803	* transfer one at a time to avoid a burst stradling an MFIFO entry.
@@ -2808,7 +2805,6 @@ pl330_prep_dma_memcpy(struct dma_chan *chan, dma_addr_t dst, · 1 unmodified line
2808	2805	if (desc->rqcfg.brst_size * 8 < pl330->pcfg.data_bus_width)
2809	2806	desc->rqcfg.brst_len = 1;
2810	2807
2811		− desc->rqcfg.brst_len = get_burst_len(desc, len);
2812	2808	desc->bytes_requested = len;
2813	2809
2814	2810	desc->txd.flags = flags;

drivers/dma/sh/shdma-base.c+1−1

@@ -383,7 +383,7 @@ static dma_async_tx_callback __ld_cleanup(struct shdma_chan *schan, bool all) · 382 unmodified lines
383	383	switch (desc->mark) {
384	384	case DESC_COMPLETED:
385	385	desc->mark = DESC_WAITING;
386		− /* Fall through */
	386	+ fallthrough;
387	387	case DESC_WAITING:
388	388	if (head_acked)
389	389	async_tx_ack(&desc->async_tx);

drivers/dma/ti/k3-udma.c+5−5

@@ -2059,9 +2059,9 @@ udma_prep_slave_sg_tr(struct udma_chan uc, struct scatterlist sgl, · 2058 unmodified lines
2059	2059	return NULL;
2060	2060	}
2061	2061
2062		− cppi5_tr_init(&tr_req[i].flags, CPPI5_TR_TYPE1, false, false,
2063		− CPPI5_TR_EVENT_SIZE_COMPLETION, 0);
2064		− cppi5_tr_csf_set(&tr_req[i].flags, CPPI5_TR_CSF_SUPR_EVT);
	2062	+ cppi5_tr_init(&tr_req[tr_idx].flags, CPPI5_TR_TYPE1, false,
	2063	+ false, CPPI5_TR_EVENT_SIZE_COMPLETION, 0);
	2064	+ cppi5_tr_csf_set(&tr_req[tr_idx].flags, CPPI5_TR_CSF_SUPR_EVT);
2065	2065
2066	2066	tr_req[tr_idx].addr = sg_addr;
2067	2067	tr_req[tr_idx].icnt0 = tr0_cnt0;
@@ -3101,14 +3101,14 @@ static struct udma_match_data am654_main_data = { · 1033 unmodified lines
3101	3101	.psil_base = 0x1000,
3102	3102	.enable_memcpy_support = true,
3103	3103	.statictr_z_mask = GENMASK(11, 0),
3104		− .rchan_oes_offset = 0x2000,
	3104	+ .rchan_oes_offset = 0x200,
3105	3105	};
3106	3106
3107	3107	static struct udma_match_data am654_mcu_data = {
3108	3108	.psil_base = 0x6000,
3109	3109	.enable_memcpy_support = false,
3110	3110	.statictr_z_mask = GENMASK(11, 0),
3111		− .rchan_oes_offset = 0x2000,
	3111	+ .rchan_oes_offset = 0x200,
3112	3112	};
3113	3113
3114	3114	static struct udma_match_data j721e_main_data = {

drivers/edac/amd64_edac.c+1−1

@@ -3375,7 +3375,7 @@ static struct amd64_family_type per_family_init(struct amd64_pvt pvt) · 3374 unmodified lines
3375	3375	pvt->ops = &family_types[F17_M70H_CPUS].ops;
3376	3376	break;
3377	3377	}
3378		− /* fall through */
	3378	+ fallthrough;
3379	3379	case 0x18:
3380	3380	fam_type = &family_types[F17_CPUS];
3381	3381	pvt->ops = &family_types[F17_CPUS].ops;

drivers/edac/ghes_edac.c+6−4

@@ -55,6 +55,8 @@ static DEFINE_SPINLOCK(ghes_lock); · 54 unmodified lines
55	55	static bool __read_mostly force_load;
56	56	module_param(force_load, bool, 0);
57	57
	58	+static bool system_scanned;
	59	+
58	60	/* Memory Device - Type 17 of SMBIOS spec */
59	61	struct memdev_dmi_entry {
60	62	u8 type;
@@ -225,14 +227,12 @@ static void enumerate_dimms(const struct dmi_header dh, void arg) · 164 unmodified lines
225	227
226	228	static void ghes_scan_system(void)
227	229	{
228		− static bool scanned;
229		−
230		− if (scanned)
	230	+ if (system_scanned)
231	231	return;
232	232
233	233	dmi_walk(enumerate_dimms, &ghes_hw);
234	234
235		− scanned = true;
	235	+ system_scanned = true;
236	236	}
237	237
238	238	void ghes_edac_report_mem_error(int sev, struct cper_sec_mem_err *mem_err)
@@ -631,6 +631,8 @@ void ghes_edac_unregister(struct ghes *ghes) · 392 unmodified lines
631	631
632	632	mutex_lock(&ghes_reg_mutex);
633	633
	634	+ system_scanned = false;
	635	+
634	636	if (!refcount_dec_and_test(&ghes_refcount))
635	637	goto unlock;
636	638

drivers/edac/pnd2_edac.c+1−1

@@ -198,7 +198,7 @@ static int apl_rd_reg(int port, int off, int op, void data, size_t sz, char na · 197 unmodified lines
198	198	switch (sz) {
199	199	case 8:
200	200	ret = _apl_rd_reg(port, off + 4, op, (u32 *)(data + 4));
201		− /* fall through */
	201	+ fallthrough;
202	202	case 4:
203	203	ret \|= _apl_rd_reg(port, off, op, (u32 *)data);
204	204	pnd2_printk(KERN_DEBUG, "%s=%x%08x ret=%d\n", name,

drivers/firewire/core-device.c+1−1

@@ -957,7 +957,7 @@ static void set_broadcast_channel(struct fw_device *device, int generation) · 956 unmodified lines
957	957	device->bc_implemented = BC_IMPLEMENTED;
958	958	break;
959	959	}
960		− /* else, fall through - to case address error */
	960	+ fallthrough; /* to case address error */
961	961	case RCODE_ADDRESS_ERROR:
962	962	device->bc_implemented = BC_UNIMPLEMENTED;
963	963	}

drivers/firewire/core-iso.c+1−1

@@ -277,7 +277,7 @@ static int manage_channel(struct fw_card *card, int irm_id, int generation, · 276 unmodified lines
277	277	if ((data[0] & bit) == (data[1] & bit))
278	278	continue;
279	279
280		− /* fall through - It's a 1394-1995 IRM, retry. */
	280	+ fallthrough; /* It's a 1394-1995 IRM, retry */
281	281	default:
282	282	if (retry) {
283	283	retry--;

drivers/firewire/core-topology.c+1−1

@@ -54,7 +54,7 @@ static u32 count_ports(u32 sid, int total_port_count, int child_port_count) · 53 unmodified lines
54	54	switch (port_type) {
55	55	case SELFID_PORT_CHILD:
56	56	(*child_port_count)++;
57		− /* fall through */
	57	+ fallthrough;
58	58	case SELFID_PORT_PARENT:
59	59	case SELFID_PORT_NCONN:
60	60	(*total_port_count)++;

drivers/firewire/core-transaction.c+2−2

@@ -1097,14 +1097,14 @@ static void handle_registers(struct fw_card card, struct fw_request request, · 1096 unmodified lines
1097	1097	rcode = RCODE_ADDRESS_ERROR;
1098	1098	break;
1099	1099	}
1100		− /* else fall through */
	1100	+ fallthrough;
1101	1101
1102	1102	case CSR_NODE_IDS:
1103	1103	/*
1104	1104	* per IEEE 1394-2008 8.3.22.3, not IEEE 1394.1-2004 3.2.8
1105	1105	* and 9.6, but interoperable with IEEE 1394.1-2004 bridges
1106	1106	*/
1107		− /* fall through */
	1107	+ fallthrough;
1108	1108
1109	1109	case CSR_STATE_CLEAR:
1110	1110	case CSR_STATE_SET:

drivers/firewire/ohci.c+2−2

@@ -1495,7 +1495,7 @@ static int handle_at_packet(struct context *context, · 1494 unmodified lines
1495	1495	packet->ack = RCODE_GENERATION;
1496	1496	break;
1497	1497	}
1498		− /* fall through */
	1498	+ fallthrough;
1499	1499
1500	1500	default:
1501	1501	packet->ack = RCODE_SEND_ERROR;
@@ -3054,7 +3054,7 @@ static int ohci_start_iso(struct fw_iso_context *base, · 1552 unmodified lines
3054	3054
3055	3055	case FW_ISO_CONTEXT_RECEIVE_MULTICHANNEL:
3056	3056	control \|= IR_CONTEXT_BUFFER_FILL\|IR_CONTEXT_MULTI_CHANNEL_MODE;
3057		− /* fall through */
	3057	+ fallthrough;
3058	3058	case FW_ISO_CONTEXT_RECEIVE:
3059	3059	index = ctx - ohci->ir_context_list;
3060	3060	match = (tags << 28) \| (sync << 8) \| ctx->base.channel;

drivers/firmware/ti_sci.c+68−87

@@ -64,22 +64,6 @@ struct ti_sci_xfers_info { · 63 unmodified lines
64	64	spinlock_t xfer_lock;
65	65	};
66	66
67		−/**
68		− * struct ti_sci_rm_type_map - Structure representing TISCI Resource
69		− * management representation of dev_ids.
70		− * @dev_id: TISCI device ID
71		− * @type: Corresponding id as identified by TISCI RM.
72		− *
73		− * Note: This is used only as a work around for using RM range apis
74		− * for AM654 SoC. For future SoCs dev_id will be used as type
75		− * for RM range APIs. In order to maintain ABI backward compatibility
76		− * type is not being changed for AM654 SoC.
77		− */
78		−struct ti_sci_rm_type_map {
79		− u32 dev_id;
80		− u16 type;
81		−};
82		−
83	67	/**
84	68	* struct ti_sci_desc - Description of SoC integration
85	69	* @default_host_id: Host identifier representing the compute entity
@@ -87,14 +71,12 @@ struct ti_sci_rm_type_map { · 1 unmodified line
87	71	* @max_msgs: Maximum number of messages that can be pending
88	72	* simultaneously in the system
89	73	* @max_msg_size: Maximum size of data per message that can be handled.
90		− * @rm_type_map: RM resource type mapping structure.
91	74	*/
92	75	struct ti_sci_desc {
93	76	u8 default_host_id;
94	77	int max_rx_timeout_ms;
95	78	int max_msgs;
96	79	int max_msg_size;
97		− struct ti_sci_rm_type_map *rm_type_map;
98	80	};
99	81
100	82	/**
@@ -1710,33 +1692,6 @@ fail: · 1609 unmodified lines
1710	1692	return ret;
1711	1693	}
1712	1694
1713		−static int ti_sci_get_resource_type(struct ti_sci_info *info, u16 dev_id,
1714		− u16 *type)
1715		−{
1716		− struct ti_sci_rm_type_map *rm_type_map = info->desc->rm_type_map;
1717		− bool found = false;
1718		− int i;
1719		−
1720		− /* If map is not provided then assume dev_id is used as type */
1721		− if (!rm_type_map) {
1722		− *type = dev_id;
1723		− return 0;
1724		− }
1725		−
1726		− for (i = 0; rm_type_map[i].dev_id; i++) {
1727		− if (rm_type_map[i].dev_id == dev_id) {
1728		− *type = rm_type_map[i].type;
1729		− found = true;
1730		− break;
1731		− }
1732		− }
1733		−
1734		− if (!found)
1735		− return -EINVAL;
1736		−
1737		− return 0;
1738		−}
1739		−
1740	1695	/**
1741	1696	* ti_sci_get_resource_range - Helper to get a range of resources assigned
1742	1697	* to a host. Resource is uniquely identified by
@@ -1760,7 +1715,6 @@ static int ti_sci_get_resource_range(const struct ti_sci_handle *handle, · 17 unmodified lines
1760	1715	struct ti_sci_xfer *xfer;
1761	1716	struct ti_sci_info *info;
1762	1717	struct device *dev;
1763		− u16 type;
1764	1718	int ret = 0;
1765	1719
1766	1720	if (IS_ERR(handle))
@@ -1780,15 +1734,9 @@ static int ti_sci_get_resource_range(const struct ti_sci_handle *handle, · 13 unmodified lines
1780	1734	return ret;
1781	1735	}
1782	1736
1783		− ret = ti_sci_get_resource_type(info, dev_id, &type);
1784		− if (ret) {
1785		− dev_err(dev, "rm type lookup failed for %u\n", dev_id);
1786		− goto fail;
1787		− }
1788		−
1789	1737	req = (struct ti_sci_msg_req_get_resource_range *)xfer->xfer_buf;
1790	1738	req->secondary_host = s_host;
1791		− req->type = type & MSG_RM_RESOURCE_TYPE_MASK;
	1739	+ req->type = dev_id & MSG_RM_RESOURCE_TYPE_MASK;
1792	1740	req->subtype = subtype & MSG_RM_RESOURCE_SUBTYPE_MASK;
1793	1741
1794	1742	ret = ti_sci_do_xfer(info, xfer);
@@ -3260,61 +3208,50 @@ u32 ti_sci_get_num_resources(struct ti_sci_resource *res) · 1465 unmodified lines
3260	3208	EXPORT_SYMBOL_GPL(ti_sci_get_num_resources);
3261	3209
3262	3210	/**
3263		− * devm_ti_sci_get_of_resource() - Get a TISCI resource assigned to a device
	3211	+ * devm_ti_sci_get_resource_sets() - Get a TISCI resources assigned to a device
3264	3212	* @handle: TISCI handle
3265	3213	* @dev: Device pointer to which the resource is assigned
3266	3214	* @dev_id: TISCI device id to which the resource is assigned
3267		− * @of_prop: property name by which the resource are represented
	3215	+ * @sub_types: Array of sub_types assigned corresponding to device
	3216	+ * @sets: Number of sub_types
3268	3217	*
3269	3218	* Return: Pointer to ti_sci_resource if all went well else appropriate
3270	3219	* error pointer.
3271	3220	*/
3272		−struct ti_sci_resource *
3273		−devm_ti_sci_get_of_resource(const struct ti_sci_handle *handle,
3274		− struct device dev, u32 dev_id, char of_prop)
	3221	+static struct ti_sci_resource *
	3222	+devm_ti_sci_get_resource_sets(const struct ti_sci_handle *handle,
	3223	+ struct device dev, u32 dev_id, u32 sub_types,
	3224	+ u32 sets)
3275	3225	{
3276	3226	struct ti_sci_resource *res;
3277	3227	bool valid_set = false;
3278		− u32 resource_subtype;
3279	3228	int i, ret;
3280	3229
3281	3230	res = devm_kzalloc(dev, sizeof(*res), GFP_KERNEL);
3282	3231	if (!res)
3283	3232	return ERR_PTR(-ENOMEM);
3284	3233
3285		− ret = of_property_count_elems_of_size(dev_of_node(dev), of_prop,
3286		− sizeof(u32));
3287		− if (ret < 0) {
3288		− dev_err(dev, "%s resource type ids not available\n", of_prop);
3289		− return ERR_PTR(ret);
3290		− }
3291		− res->sets = ret;
3292		−
	3234	+ res->sets = sets;
3293	3235	res->desc = devm_kcalloc(dev, res->sets, sizeof(*res->desc),
3294	3236	GFP_KERNEL);
3295	3237	if (!res->desc)
3296	3238	return ERR_PTR(-ENOMEM);
3297	3239
3298	3240	for (i = 0; i < res->sets; i++) {
3299		− ret = of_property_read_u32_index(dev_of_node(dev), of_prop, i,
3300		− &resource_subtype);
3301		− if (ret)
3302		− return ERR_PTR(-EINVAL);
3303		−
3304	3241	ret = handle->ops.rm_core_ops.get_range(handle, dev_id,
3305		− resource_subtype,
	3242	+ sub_types[i],
3306	3243	&res->desc[i].start,
3307	3244	&res->desc[i].num);
3308	3245	if (ret) {
3309	3246	dev_dbg(dev, "dev = %d subtype %d not allocated for this host\n",
3310		− dev_id, resource_subtype);
	3247	+ dev_id, sub_types[i]);
3311	3248	res->desc[i].start = 0;
3312	3249	res->desc[i].num = 0;
3313	3250	continue;
3314	3251	}
3315	3252
3316	3253	dev_dbg(dev, "dev = %d, subtype = %d, start = %d, num = %d\n",
3317		− dev_id, resource_subtype, res->desc[i].start,
	3254	+ dev_id, sub_types[i], res->desc[i].start,
3318	3255	res->desc[i].num);
3319	3256
3320	3257	valid_set = true;
@@ -3332,6 +3269,62 @@ devm_ti_sci_get_of_resource(const struct ti_sci_handle *handle, · 11 unmodified lines
3332	3269	return ERR_PTR(-EINVAL);
3333	3270	}
3334	3271
	3272	+/**
	3273	+ * devm_ti_sci_get_of_resource() - Get a TISCI resource assigned to a device
	3274	+ * @handle: TISCI handle
	3275	+ * @dev: Device pointer to which the resource is assigned
	3276	+ * @dev_id: TISCI device id to which the resource is assigned
	3277	+ * @of_prop: property name by which the resource are represented
	3278	+ *
	3279	+ * Return: Pointer to ti_sci_resource if all went well else appropriate
	3280	+ * error pointer.
	3281	+ */
	3282	+struct ti_sci_resource *
	3283	+devm_ti_sci_get_of_resource(const struct ti_sci_handle *handle,
	3284	+ struct device dev, u32 dev_id, char of_prop)
	3285	+{
	3286	+ struct ti_sci_resource *res;
	3287	+ u32 *sub_types;
	3288	+ int sets;
	3289	+
	3290	+ sets = of_property_count_elems_of_size(dev_of_node(dev), of_prop,
	3291	+ sizeof(u32));
	3292	+ if (sets < 0) {
	3293	+ dev_err(dev, "%s resource type ids not available\n", of_prop);
	3294	+ return ERR_PTR(sets);
	3295	+ }
	3296	+
	3297	+ sub_types = kcalloc(sets, sizeof(*sub_types), GFP_KERNEL);
	3298	+ if (!sub_types)
	3299	+ return ERR_PTR(-ENOMEM);
	3300	+
	3301	+ of_property_read_u32_array(dev_of_node(dev), of_prop, sub_types, sets);
	3302	+ res = devm_ti_sci_get_resource_sets(handle, dev, dev_id, sub_types,
	3303	+ sets);
	3304	+
	3305	+ kfree(sub_types);
	3306	+ return res;
	3307	+}
	3308	+EXPORT_SYMBOL_GPL(devm_ti_sci_get_of_resource);
	3309	+
	3310	+/**
	3311	+ * devm_ti_sci_get_resource() - Get a resource range assigned to the device
	3312	+ * @handle: TISCI handle
	3313	+ * @dev: Device pointer to which the resource is assigned
	3314	+ * @dev_id: TISCI device id to which the resource is assigned
	3315	+ * @suub_type: TISCI resource subytpe representing the resource.
	3316	+ *
	3317	+ * Return: Pointer to ti_sci_resource if all went well else appropriate
	3318	+ * error pointer.
	3319	+ */
	3320	+struct ti_sci_resource *
	3321	+devm_ti_sci_get_resource(const struct ti_sci_handle handle, struct device dev,
	3322	+ u32 dev_id, u32 sub_type)
	3323	+{
	3324	+ return devm_ti_sci_get_resource_sets(handle, dev, dev_id, &sub_type, 1);
	3325	+}
	3326	+EXPORT_SYMBOL_GPL(devm_ti_sci_get_resource);
	3327	+
3335	3328	static int tisci_reboot_handler(struct notifier_block *nb, unsigned long mode,
3336	3329	void *cmd)
3337	3330	{
@@ -3352,17 +3345,6 @@ static const struct ti_sci_desc ti_sci_pmmc_k2g_desc = { · 14 unmodified lines
3352	3345	/* Limited by MBOX_TX_QUEUE_LEN. K2G can handle upto 128 messages! */
3353	3346	.max_msgs = 20,
3354	3347	.max_msg_size = 64,
3355		− .rm_type_map = NULL,
3356		−};
3357		−
3358		−static struct ti_sci_rm_type_map ti_sci_am654_rm_type_map[] = {
3359		− {.dev_id = 56, .type = 0x00b}, /* GIC_IRQ */
3360		− {.dev_id = 179, .type = 0x000}, /* MAIN_NAV_UDMASS_IA0 */
3361		− {.dev_id = 187, .type = 0x009}, /* MAIN_NAV_RA */
3362		− {.dev_id = 188, .type = 0x006}, /* MAIN_NAV_UDMAP */
3363		− {.dev_id = 194, .type = 0x007}, /* MCU_NAV_UDMAP */
3364		− {.dev_id = 195, .type = 0x00a}, /* MCU_NAV_RA */
3365		− {.dev_id = 0, .type = 0x000}, /* end of table */
3366	3348	};
3367	3349
3368	3350	/* Description for AM654 */
@@ -3373,7 +3355,6 @@ static const struct ti_sci_desc ti_sci_pmmc_am654_desc = { · 4 unmodified lines
3373	3355	/* Limited by MBOX_TX_QUEUE_LEN. K2G can handle upto 128 messages! */
3374	3356	.max_msgs = 20,
3375	3357	.max_msg_size = 60,
3376		− .rm_type_map = ti_sci_am654_rm_type_map,
3377	3358	};
3378	3359
3379	3360	static const struct of_device_id ti_sci_of_match[] = {

drivers/gpio/gpio-aspeed-sgpio.c+3−3

@@ -303,16 +303,16 @@ static int aspeed_sgpio_set_type(struct irq_data *d, unsigned int type) · 302 unmodified lines
303	303	switch (type & IRQ_TYPE_SENSE_MASK) {
304	304	case IRQ_TYPE_EDGE_BOTH:
305	305	type2 \|= bit;
306		− /* fall through */
	306	+ fallthrough;
307	307	case IRQ_TYPE_EDGE_RISING:
308	308	type0 \|= bit;
309		− /* fall through */
	309	+ fallthrough;
310	310	case IRQ_TYPE_EDGE_FALLING:
311	311	handler = handle_edge_irq;
312	312	break;
313	313	case IRQ_TYPE_LEVEL_HIGH:
314	314	type0 \|= bit;
315		− /* fall through */
	315	+ fallthrough;
316	316	case IRQ_TYPE_LEVEL_LOW:
317	317	type1 \|= bit;
318	318	handler = handle_level_irq;

drivers/gpio/gpio-aspeed.c+3−3

@@ -611,16 +611,16 @@ static int aspeed_gpio_set_type(struct irq_data *d, unsigned int type) · 610 unmodified lines
611	611	switch (type & IRQ_TYPE_SENSE_MASK) {
612	612	case IRQ_TYPE_EDGE_BOTH:
613	613	type2 \|= bit;
614		− /* fall through */
	614	+ fallthrough;
615	615	case IRQ_TYPE_EDGE_RISING:
616	616	type0 \|= bit;
617		− /* fall through */
	617	+ fallthrough;
618	618	case IRQ_TYPE_EDGE_FALLING:
619	619	handler = handle_edge_irq;
620	620	break;
621	621	case IRQ_TYPE_LEVEL_HIGH:
622	622	type0 \|= bit;
623		− /* fall through */
	623	+ fallthrough;
624	624	case IRQ_TYPE_LEVEL_LOW:
625	625	type1 \|= bit;
626	626	handler = handle_level_irq;

drivers/gpio/gpio-ath79.c+1−1

@@ -129,7 +129,7 @@ static int ath79_gpio_irq_set_type(struct irq_data *data, · 128 unmodified lines
129	129
130	130	case IRQ_TYPE_LEVEL_HIGH:
131	131	polarity \|= mask;
132		− /* fall through */
	132	+ fallthrough;
133	133	case IRQ_TYPE_LEVEL_LOW:
134	134	type \|= mask;
135	135	break;

drivers/gpio/gpio-eic-sprd.c+1−3

@@ -617,14 +617,12 @@ static int sprd_eic_probe(struct platform_device *pdev) · 616 unmodified lines
617	617	sprd_eic->chip.free = sprd_eic_free;
618	618	sprd_eic->chip.set_config = sprd_eic_set_config;
619	619	sprd_eic->chip.set = sprd_eic_set;
620		− /* fall-through */
	620	+ fallthrough;
621	621	case SPRD_EIC_ASYNC:
622		− /* fall-through */
623	622	case SPRD_EIC_SYNC:
624	623	sprd_eic->chip.get = sprd_eic_get;
625	624	break;
626	625	case SPRD_EIC_LATCH:
627		− /* fall-through */
628	626	default:
629	627	break;
630	628	}

drivers/gpio/gpio-stmpe.c+2−2

@@ -308,7 +308,7 @@ static void stmpe_dbg_show_one(struct seq_file *s, · 307 unmodified lines
308	308	if (ret < 0)
309	309	return;
310	310	edge_det = !!(ret & mask);
311		− /* fall through */
	311	+ fallthrough;
312	312	case STMPE1801:
313	313	rise_reg = stmpe->regs[STMPE_IDX_GPRER_LSB + bank];
314	314	fall_reg = stmpe->regs[STMPE_IDX_GPFER_LSB + bank];
@@ -321,7 +321,7 @@ static void stmpe_dbg_show_one(struct seq_file *s, · 6 unmodified lines
321	321	if (ret < 0)
322	322	return;
323	323	fall = !!(ret & mask);
324		− /* fall through */
	324	+ fallthrough;
325	325	case STMPE801:
326	326	case STMPE1600:
327	327	irqen_reg = stmpe->regs[STMPE_IDX_IEGPIOR_LSB + bank];

drivers/gpio/gpiolib-acpi.c+1−1

@@ -1264,7 +1264,7 @@ static int acpi_gpio_package_count(const union acpi_object *obj) · 1263 unmodified lines
1264	1264	switch (element->type) {
1265	1265	case ACPI_TYPE_LOCAL_REFERENCE:
1266	1266	element += 3;
1267		− /* Fallthrough */
	1267	+ fallthrough;
1268	1268	case ACPI_TYPE_INTEGER:
1269	1269	element++;
1270	1270	count++;

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10_3.c+1−1

@@ -152,7 +152,7 @@ static uint32_t get_sdma_rlc_reg_offset(struct amdgpu_device *adev, · 151 unmodified lines
152	152	dev_warn(adev->dev,
153	153	"Invalid sdma engine id (%d), using engine id 0\n",
154	154	engine_id);
155		− /* fall through */
	155	+ fallthrough;
156	156	case 0:
157	157	sdma_engine_reg_base = SOC15_REG_OFFSET(SDMA0, 0,
158	158	mmSDMA0_RLC0_RB_CNTL) - mmSDMA0_RLC0_RB_CNTL;

drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c+5−0

@@ -179,6 +179,7 @@ int amdgpu_driver_load_kms(struct drm_device *dev, unsigned long flags) · 178 unmodified lines
179	179	case CHIP_VEGA20:
180	180	case CHIP_ARCTURUS:
181	181	case CHIP_SIENNA_CICHLID:
	182	+ case CHIP_NAVY_FLOUNDER:
182	183	/* enable runpm if runpm=1 */
183	184	if (amdgpu_runtime_pm > 0)
184	185	adev->runpm = true;
@@ -681,8 +682,12 @@ static int amdgpu_info_ioctl(struct drm_device dev, void data, struct drm_file · 496 unmodified lines
681	682	* in the bitfields */
682	683	if (se_num == AMDGPU_INFO_MMR_SE_INDEX_MASK)
683	684	se_num = 0xffffffff;
	685	+ else if (se_num >= AMDGPU_GFX_MAX_SE)
	686	+ return -EINVAL;
684	687	if (sh_num == AMDGPU_INFO_MMR_SH_INDEX_MASK)
685	688	sh_num = 0xffffffff;
	689	+ else if (sh_num >= AMDGPU_GFX_MAX_SH_PER_SE)
	690	+ return -EINVAL;
686	691
687	692	if (info->read_mmr_reg.count > 128)
688	693	return -EINVAL;

drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c+1−2

@@ -522,8 +522,7 @@ static int psp_asd_load(struct psp_context *psp) · 521 unmodified lines
522	522	* add workaround to bypass it for sriov now.
523	523	* TODO: add version check to make it common
524	524	*/
525		− if (amdgpu_sriov_vf(psp->adev) \|\|
526		− (psp->adev->asic_type == CHIP_NAVY_FLOUNDER))
	525	+ if (amdgpu_sriov_vf(psp->adev) \|\| !psp->asd_fw)
527	526	return 0;
528	527
529	528	cmd = kzalloc(sizeof(struct psp_gfx_cmd_resp), GFP_KERNEL);

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c+2−4

@@ -7263,10 +7263,8 @@ static void gfx_v10_0_update_medium_grain_clock_gating(struct amdgpu_device *ade · 7262 unmodified lines
7263	7263	def = data = RREG32_SOC15(GC, 0, mmRLC_CGTT_MGCG_OVERRIDE);
7264	7264	data &= ~(RLC_CGTT_MGCG_OVERRIDE__GRBM_CGTT_SCLK_OVERRIDE_MASK \|
7265	7265	RLC_CGTT_MGCG_OVERRIDE__GFXIP_MGCG_OVERRIDE_MASK \|
7266		− RLC_CGTT_MGCG_OVERRIDE__GFXIP_MGLS_OVERRIDE_MASK);
7267		−
7268		− /* only for Vega10 & Raven1 */
7269		− data \|= RLC_CGTT_MGCG_OVERRIDE__RLC_CGTT_SCLK_OVERRIDE_MASK;
	7266	+ RLC_CGTT_MGCG_OVERRIDE__GFXIP_MGLS_OVERRIDE_MASK \|
	7267	+ RLC_CGTT_MGCG_OVERRIDE__ENABLE_CGTS_LEGACY_MASK);
7270	7268
7271	7269	if (def != data)
7272	7270	WREG32_SOC15(GC, 0, mmRLC_CGTT_MGCG_OVERRIDE, data);

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c+1−1

@@ -3250,7 +3250,7 @@ static void gfx_v8_0_tiling_mode_table_init(struct amdgpu_device *adev) · 3249 unmodified lines
3250	3250	dev_warn(adev->dev,
3251	3251	"Unknown chip type (%d) in function gfx_v8_0_tiling_mode_table_init() falling through to CHIP_CARRIZO\n",
3252	3252	adev->asic_type);
3253		− /* fall through */
	3253	+ fallthrough;
3254	3254
3255	3255	case CHIP_CARRIZO:
3256	3256	modearray[0] = (ARRAY_MODE(ARRAY_2D_TILED_THIN1) \|

drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c+1−1

@@ -1297,7 +1297,7 @@ static void gmc_v9_0_init_golden_registers(struct amdgpu_device *adev) · 1296 unmodified lines
1297	1297	case CHIP_VEGA10:
1298	1298	if (amdgpu_sriov_vf(adev))
1299	1299	break;
1300		− /* fall through */
	1300	+ fallthrough;
1301	1301	case CHIP_VEGA20:
1302	1302	soc15_program_register_sequence(adev,
1303	1303	golden_settings_mmhub_1_0_0,

drivers/gpu/drm/amd/amdgpu/nv.c+1−0

@@ -364,6 +364,7 @@ nv_asic_reset_method(struct amdgpu_device *adev) · 363 unmodified lines
364	364
365	365	switch (adev->asic_type) {
366	366	case CHIP_SIENNA_CICHLID:
	367	+ case CHIP_NAVY_FLOUNDER:
367	368	return AMD_RESET_METHOD_MODE1;
368	369	default:
369	370	if (smu_baco_is_support(smu))

drivers/gpu/drm/amd/amdgpu/si_dpm.c+1−1

@@ -6196,7 +6196,7 @@ static void si_request_link_speed_change_before_state_change(struct amdgpu_devic · 6195 unmodified lines
6196	6196	si_pi->force_pcie_gen = AMDGPU_PCIE_GEN2;
6197	6197	if (current_link_speed == AMDGPU_PCIE_GEN2)
6198	6198	break;
6199		− /* fall through */
	6199	+ fallthrough;
6200	6200	case AMDGPU_PCIE_GEN2:
6201	6201	if (amdgpu_acpi_pcie_performance_request(adev, PCIE_PERF_REQ_PECI_GEN2, false) == 0)
6202	6202	break;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c+50−43

@@ -2871,12 +2871,18 @@ static int amdgpu_dm_mode_config_init(struct amdgpu_device *adev) · 2870 unmodified lines
2871	2871	&dm_atomic_state_funcs);
2872	2872
2873	2873	r = amdgpu_display_modeset_create_props(adev);
2874		− if (r)
	2874	+ if (r) {
	2875	+ dc_release_state(state->context);
	2876	+ kfree(state);
2875	2877	return r;
	2878	+ }
2876	2879
2877	2880	r = amdgpu_dm_audio_init(adev);
2878		− if (r)
	2881	+ if (r) {
	2882	+ dc_release_state(state->context);
	2883	+ kfree(state);
2879	2884	return r;
	2885	+ }
2880	2886
2881	2887	return 0;
2882	2888	}
@@ -2893,6 +2899,8 @@ static void amdgpu_dm_update_backlight_caps(struct amdgpu_display_manager *dm) · 10 unmodified lines
2893	2899	#if defined(CONFIG_ACPI)
2894	2900	struct amdgpu_dm_backlight_caps caps;
2895	2901
	2902	+ memset(&caps, 0, sizeof(caps));
	2903	+
2896	2904	if (dm->backlight_caps.caps_valid)
2897	2905	return;
2898	2906
@@ -2931,51 +2939,50 @@ static int set_backlight_via_aux(struct dc_link *link, uint32_t brightness) · 32 unmodified lines
2931	2939	return rc ? 0 : 1;
2932	2940	}
2933	2941
2934		−static u32 convert_brightness(const struct amdgpu_dm_backlight_caps *caps,
2935		− const uint32_t user_brightness)
	2942	+static int get_brightness_range(const struct amdgpu_dm_backlight_caps *caps,
	2943	+ unsigned min, unsigned max)
2936	2944	{
2937		− u32 min, max, conversion_pace;
2938		− u32 brightness = user_brightness;
2939		−
2940	2945	if (!caps)
2941		− goto out;
	2946	+ return 0;
2942	2947
2943		− if (!caps->aux_support) {
2944		− max = caps->max_input_signal;
2945		− min = caps->min_input_signal;
2946		− /*
2947		− * The brightness input is in the range 0-255
2948		− * It needs to be rescaled to be between the
2949		− * requested min and max input signal
2950		− * It also needs to be scaled up by 0x101 to
2951		− * match the DC interface which has a range of
2952		− * 0 to 0xffff
2953		− */
2954		− conversion_pace = 0x101;
2955		− brightness =
2956		− user_brightness
2957		− * conversion_pace
2958		− * (max - min)
2959		− / AMDGPU_MAX_BL_LEVEL
2960		− + min * conversion_pace;
	2948	+ if (caps->aux_support) {
	2949	+ // Firmware limits are in nits, DC API wants millinits.
	2950	+ max = 1000 caps->aux_max_input_signal;
	2951	+ min = 1000 caps->aux_min_input_signal;
2961	2952	} else {
2962		− /* TODO
2963		− * We are doing a linear interpolation here, which is OK but
2964		− * does not provide the optimal result. We probably want
2965		− * something close to the Perceptual Quantizer (PQ) curve.
2966		− */
2967		− max = caps->aux_max_input_signal;
2968		− min = caps->aux_min_input_signal;
2969		−
2970		− brightness = (AMDGPU_MAX_BL_LEVEL - user_brightness) * min
2971		− + user_brightness * max;
2972		− // Multiple the value by 1000 since we use millinits
2973		− brightness *= 1000;
2974		− brightness = DIV_ROUND_CLOSEST(brightness, AMDGPU_MAX_BL_LEVEL);
	2953	+ // Firmware limits are 8-bit, PWM control is 16-bit.
	2954	+ max = 0x101 caps->max_input_signal;
	2955	+ min = 0x101 caps->min_input_signal;
2975	2956	}
	2957	+ return 1;
	2958	+}
2976	2959
2977		−out:
2978		− return brightness;
	2960	+static u32 convert_brightness_from_user(const struct amdgpu_dm_backlight_caps *caps,
	2961	+ uint32_t brightness)
	2962	+{
	2963	+ unsigned min, max;
	2964	+
	2965	+ if (!get_brightness_range(caps, &min, &max))
	2966	+ return brightness;
	2967	+
	2968	+ // Rescale 0..255 to min..max
	2969	+ return min + DIV_ROUND_CLOSEST((max - min) * brightness,
	2970	+ AMDGPU_MAX_BL_LEVEL);
	2971	+}
	2972	+
	2973	+static u32 convert_brightness_to_user(const struct amdgpu_dm_backlight_caps *caps,
	2974	+ uint32_t brightness)
	2975	+{
	2976	+ unsigned min, max;
	2977	+
	2978	+ if (!get_brightness_range(caps, &min, &max))
	2979	+ return brightness;
	2980	+
	2981	+ if (brightness < min)
	2982	+ return 0;
	2983	+ // Rescale min..max to 0..255
	2984	+ return DIV_ROUND_CLOSEST(AMDGPU_MAX_BL_LEVEL * (brightness - min),
	2985	+ max - min);
2979	2986	}
2980	2987
2981	2988	static int amdgpu_dm_backlight_update_status(struct backlight_device *bd)
@@ -2991,7 +2998,7 @@ static int amdgpu_dm_backlight_update_status(struct backlight_device *bd) · 9 unmodified lines
2991	2998
2992	2999	link = (struct dc_link *)dm->backlight_link;
2993	3000
2994		− brightness = convert_brightness(&caps, bd->props.brightness);
	3001	+ brightness = convert_brightness_from_user(&caps, bd->props.brightness);
2995	3002	// Change brightness based on AUX property
2996	3003	if (caps.aux_support)
2997	3004	return set_backlight_via_aux(link, brightness);
@@ -3008,7 +3015,7 @@ static int amdgpu_dm_backlight_get_brightness(struct backlight_device *bd) · 10 unmodified lines
3008	3015
3009	3016	if (ret == DC_ERROR_UNEXPECTED)
3010	3017	return bd->props.brightness;
3011		− return ret;
	3018	+ return convert_brightness_to_user(&dm->backlight_caps, ret);
3012	3019	}
3013	3020
3014	3021	static const struct backlight_ops amdgpu_dm_backlight_ops = {

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c+1−1

@@ -68,7 +68,7 @@ static ssize_t dm_dp_aux_transfer(struct drm_dp_aux *aux, · 67 unmodified lines
68	68	result = dc_link_aux_transfer_raw(TO_DM_AUX(aux)->ddc_service, &payload,
69	69	&operation_result);
70	70
71		− if (payload.write)
	71	+ if (payload.write && result >= 0)
72	72	result = msg->size;
73	73
74	74	if (result < 0)

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c+10−0

@@ -94,6 +94,15 @@ int rn_get_active_display_cnt_wa( · 93 unmodified lines
94	94	return display_count;
95	95	}
96	96
	97	+void rn_set_low_power_state(struct clk_mgr *clk_mgr_base)
	98	+{
	99	+ struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base);
	100	+
	101	+ rn_vbios_smu_set_dcn_low_power_state(clk_mgr, DCN_PWR_STATE_LOW_POWER);
	102	+ /* update power state */
	103	+ clk_mgr_base->clks.pwr_state = DCN_PWR_STATE_LOW_POWER;
	104	+}
	105	+
97	106	void rn_update_clocks(struct clk_mgr *clk_mgr_base,
98	107	struct dc_state *context,
99	108	bool safe_to_lower)
@@ -516,6 +525,7 @@ static struct clk_mgr_funcs dcn21_funcs = { · 416 unmodified lines
516	525	.init_clocks = rn_init_clocks,
517	526	.enable_pme_wa = rn_enable_pme_wa,
518	527	.are_clock_states_equal = rn_are_clock_states_equal,
	528	+ .set_low_power_state = rn_set_low_power_state,
519	529	.notify_wm_ranges = rn_notify_wm_ranges,
520	530	.notify_link_rate_change = rn_notify_link_rate_change,
521	531	};

drivers/gpu/drm/amd/display/dc/core/dc_link.c+2−1

@@ -763,6 +763,7 @@ static bool detect_dp(struct dc_link *link, · 762 unmodified lines
763	763	sink_caps->signal = dp_passive_dongle_detection(link->ddc,
764	764	sink_caps,
765	765	audio_support);
	766	+ link->dpcd_caps.dongle_type = sink_caps->dongle_type;
766	767	}
767	768
768	769	return true;
@@ -3286,10 +3287,10 @@ void core_link_disable_stream(struct pipe_ctx *pipe_ctx) · 2517 unmodified lines
3286	3287	core_link_set_avmute(pipe_ctx, true);
3287	3288	}
3288	3289
3289		− dc->hwss.blank_stream(pipe_ctx);
3290	3290	#if defined(CONFIG_DRM_AMD_DC_HDCP)
3291	3291	update_psp_stream_config(pipe_ctx, true);
3292	3292	#endif
	3293	+ dc->hwss.blank_stream(pipe_ctx);
3293	3294
3294	3295	if (pipe_ctx->stream->signal == SIGNAL_TYPE_DISPLAY_PORT_MST)
3295	3296	deallocate_mst_payload(pipe_ctx);

drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c+4−4

@@ -4409,9 +4409,9 @@ bool dc_link_get_backlight_level_nits(struct dc_link *link, · 4408 unmodified lines
4409	4409	link->connector_signal != SIGNAL_TYPE_DISPLAY_PORT))
4410	4410	return false;
4411	4411
4412		− if (!core_link_read_dpcd(link, DP_SOURCE_BACKLIGHT_CURRENT_PEAK,
	4412	+ if (core_link_read_dpcd(link, DP_SOURCE_BACKLIGHT_CURRENT_PEAK,
4413	4413	dpcd_backlight_get.raw,
4414		− sizeof(union dpcd_source_backlight_get)))
	4414	+ sizeof(union dpcd_source_backlight_get)) != DC_OK)
4415	4415	return false;
4416	4416
4417	4417	*backlight_millinits_avg =
@@ -4450,9 +4450,9 @@ bool dc_link_read_default_bl_aux(struct dc_link link, uint32_t backlight_milli · 32 unmodified lines
4450	4450	link->connector_signal != SIGNAL_TYPE_DISPLAY_PORT))
4451	4451	return false;
4452	4452
4453		− if (!core_link_read_dpcd(link, DP_SOURCE_BACKLIGHT_LEVEL,
	4453	+ if (core_link_read_dpcd(link, DP_SOURCE_BACKLIGHT_LEVEL,
4454	4454	(uint8_t *) backlight_millinits,
4455		− sizeof(uint32_t)))
	4455	+ sizeof(uint32_t)) != DC_OK)
4456	4456	return false;
4457	4457
4458	4458	return true;

drivers/gpu/drm/amd/display/dc/dc_stream.h+1−1

@@ -233,7 +233,7 @@ struct dc_stream_state { · 232 unmodified lines
233	233	union stream_update_flags update_flags;
234	234	};
235	235
236		−#define ABM_LEVEL_IMMEDIATE_DISABLE 0xFFFFFFFF
	236	+#define ABM_LEVEL_IMMEDIATE_DISABLE 255
237	237
238	238	struct dc_stream_update {
239	239	struct dc_stream_state *stream;

drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c+31−22

@@ -1450,33 +1450,42 @@ void dcn10_init_hw(struct dc *dc) · 1449 unmodified lines
1450	1450	void dcn10_power_down_on_boot(struct dc *dc)
1451	1451	{
1452	1452	int i = 0;
	1453	+ struct dc_link *edp_link;
1453	1454
1454		− if (dc->config.power_down_display_on_boot) {
1455		− struct dc_link *edp_link = get_edp_link(dc);
1456		−
1457		− if (edp_link &&
1458		− edp_link->link_enc->funcs->is_dig_enabled &&
1459		− edp_link->link_enc->funcs->is_dig_enabled(edp_link->link_enc) &&
1460		− dc->hwseq->funcs.edp_backlight_control &&
1461		− dc->hwss.power_down &&
1462		− dc->hwss.edp_power_control) {
1463		− dc->hwseq->funcs.edp_backlight_control(edp_link, false);
1464		− dc->hwss.power_down(dc);
1465		− dc->hwss.edp_power_control(edp_link, false);
1466		− } else {
1467		− for (i = 0; i < dc->link_count; i++) {
1468		− struct dc_link *link = dc->links[i];
1469		−
1470		− if (link->link_enc->funcs->is_dig_enabled &&
1471		− link->link_enc->funcs->is_dig_enabled(link->link_enc) &&
1472		− dc->hwss.power_down) {
1473		− dc->hwss.power_down(dc);
1474		− break;
1475		− }
	1455	+ if (!dc->config.power_down_display_on_boot)
	1456	+ return;
	1457	+
	1458	+ edp_link = get_edp_link(dc);
	1459	+ if (edp_link &&
	1460	+ edp_link->link_enc->funcs->is_dig_enabled &&
	1461	+ edp_link->link_enc->funcs->is_dig_enabled(edp_link->link_enc) &&
	1462	+ dc->hwseq->funcs.edp_backlight_control &&
	1463	+ dc->hwss.power_down &&
	1464	+ dc->hwss.edp_power_control) {
	1465	+ dc->hwseq->funcs.edp_backlight_control(edp_link, false);
	1466	+ dc->hwss.power_down(dc);
	1467	+ dc->hwss.edp_power_control(edp_link, false);
	1468	+ } else {
	1469	+ for (i = 0; i < dc->link_count; i++) {
	1470	+ struct dc_link *link = dc->links[i];
1476	1471
	1472	+ if (link->link_enc->funcs->is_dig_enabled &&
	1473	+ link->link_enc->funcs->is_dig_enabled(link->link_enc) &&
	1474	+ dc->hwss.power_down) {
	1475	+ dc->hwss.power_down(dc);
	1476	+ break;
1477	1477	}
	1478	+
1478	1479	}
1479	1480	}
	1481	+
	1482	+ /*
	1483	+ * Call update_clocks with empty context
	1484	+ * to send DISPLAY_OFF
	1485	+ * Otherwise DISPLAY_OFF may not be asserted
	1486	+ */
	1487	+ if (dc->clk_mgr->funcs->set_low_power_state)
	1488	+ dc->clk_mgr->funcs->set_low_power_state(dc->clk_mgr);
1480	1489	}
1481	1490
1482	1491	void dcn10_reset_hw_ctx_wrap(

drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c+8−0

@@ -1213,6 +1213,7 @@ static enum dc_status dcn10_validate_global(struct dc dc, struct dc_state cont · 1212 unmodified lines
1213	1213	bool video_large = false;
1214	1214	bool desktop_large = false;
1215	1215	bool dcc_disabled = false;
	1216	+ bool mpo_enabled = false;
1216	1217
1217	1218	for (i = 0; i < context->stream_count; i++) {
1218	1219	if (context->stream_status[i].plane_count == 0)
@@ -1221,6 +1222,9 @@ static enum dc_status dcn10_validate_global(struct dc dc, struct dc_state cont · 2 unmodified lines
1221	1222	if (context->stream_status[i].plane_count > 2)
1222	1223	return DC_FAIL_UNSUPPORTED_1;
1223	1224
	1225	+ if (context->stream_status[i].plane_count > 1)
	1226	+ mpo_enabled = true;
	1227	+
1224	1228	for (j = 0; j < context->stream_status[i].plane_count; j++) {
1225	1229	struct dc_plane_state *plane =
1226	1230	context->stream_status[i].plane_states[j];
@@ -1244,6 +1248,10 @@ static enum dc_status dcn10_validate_global(struct dc dc, struct dc_state cont · 17 unmodified lines
1244	1248	}
1245	1249	}
1246	1250
	1251	+ /* Disable MPO in multi-display configurations. */
	1252	+ if (context->stream_count > 1 && mpo_enabled)
	1253	+ return DC_FAIL_UNSUPPORTED_1;
	1254	+
1247	1255	/*
1248	1256	* Workaround: On DCN10 there is UMC issue that causes underflow when
1249	1257	* playing 4k video on 4k desktop with video downscaled and single channel

drivers/gpu/drm/amd/display/dc/inc/hw/clk_mgr.h+2−0

@@ -230,6 +230,8 @@ struct clk_mgr_funcs { · 229 unmodified lines
230	230
231	231	int (get_dp_ref_clk_frequency)(struct clk_mgr clk_mgr);
232	232
	233	+ void (set_low_power_state)(struct clk_mgr clk_mgr);
	234	+
233	235	void (init_clocks)(struct clk_mgr clk_mgr);
234	236
235	237	void (enable_pme_wa) (struct clk_mgr clk_mgr);

drivers/gpu/drm/amd/powerplay/arcturus_ppt.c+7−3

@@ -1840,10 +1840,14 @@ static bool arcturus_is_dpm_running(struct smu_context *smu) · 1839 unmodified lines
1840	1840	{
1841	1841	int ret = 0;
1842	1842	uint32_t feature_mask[2];
1843		− unsigned long feature_enabled;
	1843	+ uint64_t feature_enabled;
	1844	+
1844	1845	ret = smu_cmn_get_enabled_mask(smu, feature_mask, 2);
1845		− feature_enabled = (unsigned long)((uint64_t)feature_mask[0] \|
1846		− ((uint64_t)feature_mask[1] << 32));
	1846	+ if (ret)
	1847	+ return false;
	1848	+
	1849	+ feature_enabled = (uint64_t)feature_mask[1] << 32 \| feature_mask[0];
	1850	+
1847	1851	return !!(feature_enabled & SMC_DPM_FEATURE);
1848	1852	}
1849	1853

drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c+3−6

@@ -204,8 +204,7 @@ static int smu10_set_min_deep_sleep_dcefclk(struct pp_hwmgr *hwmgr, uint32_t clo · 203 unmodified lines
204	204	{
205	205	struct smu10_hwmgr smu10_data = (struct smu10_hwmgr )(hwmgr->backend);
206	206
207		− if (smu10_data->need_min_deep_sleep_dcefclk &&
208		− smu10_data->deep_sleep_dcefclk != clock) {
	207	+ if (clock && smu10_data->deep_sleep_dcefclk != clock) {
209	208	smu10_data->deep_sleep_dcefclk = clock;
210	209	smum_send_msg_to_smc_with_parameter(hwmgr,
211	210	PPSMC_MSG_SetMinDeepSleepDcefclk,
@@ -219,8 +218,7 @@ static int smu10_set_hard_min_dcefclk_by_freq(struct pp_hwmgr *hwmgr, uint32_t c · 7 unmodified lines
219	218	{
220	219	struct smu10_hwmgr smu10_data = (struct smu10_hwmgr )(hwmgr->backend);
221	220
222		− if (smu10_data->dcf_actual_hard_min_freq &&
223		− smu10_data->dcf_actual_hard_min_freq != clock) {
	221	+ if (clock && smu10_data->dcf_actual_hard_min_freq != clock) {
224	222	smu10_data->dcf_actual_hard_min_freq = clock;
225	223	smum_send_msg_to_smc_with_parameter(hwmgr,
226	224	PPSMC_MSG_SetHardMinDcefclkByFreq,
@@ -234,8 +232,7 @@ static int smu10_set_hard_min_fclk_by_freq(struct pp_hwmgr *hwmgr, uint32_t cloc · 7 unmodified lines
234	232	{
235	233	struct smu10_hwmgr smu10_data = (struct smu10_hwmgr )(hwmgr->backend);
236	234
237		− if (smu10_data->f_actual_hard_min_freq &&
238		− smu10_data->f_actual_hard_min_freq != clock) {
	235	+ if (clock && smu10_data->f_actual_hard_min_freq != clock) {
239	236	smu10_data->f_actual_hard_min_freq = clock;
240	237	smum_send_msg_to_smc_with_parameter(hwmgr,
241	238	PPSMC_MSG_SetHardMinFclkByFreq,

drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c+2−1

@@ -3581,7 +3581,8 @@ static int smu7_read_sensor(struct pp_hwmgr *hwmgr, int idx, · 3580 unmodified lines
3581	3581	case AMDGPU_PP_SENSOR_GPU_POWER:
3582	3582	return smu7_get_gpu_power(hwmgr, (uint32_t *)value);
3583	3583	case AMDGPU_PP_SENSOR_VDDGFX:
3584		− if ((data->vr_config & 0xff) == 0x2)
	3584	+ if ((data->vr_config & VRCONF_VDDGFX_MASK) ==
	3585	+ (VR_SVI2_PLANE_2 << VRCONF_VDDGFX_SHIFT))
3585	3586	val_vid = PHM_READ_INDIRECT_FIELD(hwmgr->device,
3586	3587	CGS_IND_REG__SMC, PWR_SVI2_STATUS, PLANE2_VID);
3587	3588	else

drivers/gpu/drm/amd/powerplay/hwmgr/vega10_thermal.c+22−10

@@ -363,17 +363,29 @@ int vega10_thermal_get_temperature(struct pp_hwmgr *hwmgr) · 362 unmodified lines
363	363	static int vega10_thermal_set_temperature_range(struct pp_hwmgr *hwmgr,
364	364	struct PP_TemperatureRange *range)
365	365	{
	366	+ struct phm_ppt_v2_information *pp_table_info =
	367	+ (struct phm_ppt_v2_information *)(hwmgr->pptable);
	368	+ struct phm_tdp_table *tdp_table = pp_table_info->tdp_table;
366	369	struct amdgpu_device *adev = hwmgr->adev;
367		− int low = VEGA10_THERMAL_MINIMUM_ALERT_TEMP *
368		− PP_TEMPERATURE_UNITS_PER_CENTIGRADES;
369		− int high = VEGA10_THERMAL_MAXIMUM_ALERT_TEMP *
370		− PP_TEMPERATURE_UNITS_PER_CENTIGRADES;
	370	+ int low = VEGA10_THERMAL_MINIMUM_ALERT_TEMP;
	371	+ int high = VEGA10_THERMAL_MAXIMUM_ALERT_TEMP;
371	372	uint32_t val;
372	373
373		− if (low < range->min)
374		− low = range->min;
375		− if (high > range->max)
376		− high = range->max;
	374	+ /* compare them in unit celsius degree */
	375	+ if (low < range->min / PP_TEMPERATURE_UNITS_PER_CENTIGRADES)
	376	+ low = range->min / PP_TEMPERATURE_UNITS_PER_CENTIGRADES;
	377	+
	378	+ /*
	379	+ * As a common sense, usSoftwareShutdownTemp should be bigger
	380	+ * than ThotspotLimit. For any invalid usSoftwareShutdownTemp,
	381	+ * we will just use the max possible setting VEGA10_THERMAL_MAXIMUM_ALERT_TEMP
	382	+ * to avoid false alarms.
	383	+ */
	384	+ if ((tdp_table->usSoftwareShutdownTemp >
	385	+ range->hotspot_crit_max / PP_TEMPERATURE_UNITS_PER_CENTIGRADES)) {
	386	+ if (high > tdp_table->usSoftwareShutdownTemp)
	387	+ high = tdp_table->usSoftwareShutdownTemp;
	388	+ }
377	389
378	390	if (low > high)
379	391	return -EINVAL;
@@ -382,8 +394,8 @@ static int vega10_thermal_set_temperature_range(struct pp_hwmgr *hwmgr, · 2 unmodified lines
382	394
383	395	val = REG_SET_FIELD(val, THM_THERMAL_INT_CTRL, MAX_IH_CREDIT, 5);
384	396	val = REG_SET_FIELD(val, THM_THERMAL_INT_CTRL, THERM_IH_HW_ENA, 1);
385		− val = REG_SET_FIELD(val, THM_THERMAL_INT_CTRL, DIG_THERM_INTH, (high / PP_TEMPERATURE_UNITS_PER_CENTIGRADES));
386		− val = REG_SET_FIELD(val, THM_THERMAL_INT_CTRL, DIG_THERM_INTL, (low / PP_TEMPERATURE_UNITS_PER_CENTIGRADES));
	397	+ val = REG_SET_FIELD(val, THM_THERMAL_INT_CTRL, DIG_THERM_INTH, high);
	398	+ val = REG_SET_FIELD(val, THM_THERMAL_INT_CTRL, DIG_THERM_INTL, low);
387	399	val &= (~THM_THERMAL_INT_CTRL__THERM_TRIGGER_MASK_MASK) &
388	400	(~THM_THERMAL_INT_CTRL__THERM_INTH_MASK_MASK) &
389	401	(~THM_THERMAL_INT_CTRL__THERM_INTL_MASK_MASK);

drivers/gpu/drm/amd/powerplay/hwmgr/vega12_thermal.c+11−10

@@ -170,17 +170,18 @@ int vega12_thermal_get_temperature(struct pp_hwmgr *hwmgr) · 169 unmodified lines
170	170	static int vega12_thermal_set_temperature_range(struct pp_hwmgr *hwmgr,
171	171	struct PP_TemperatureRange *range)
172	172	{
	173	+ struct phm_ppt_v3_information *pptable_information =
	174	+ (struct phm_ppt_v3_information *)hwmgr->pptable;
173	175	struct amdgpu_device *adev = hwmgr->adev;
174		− int low = VEGA12_THERMAL_MINIMUM_ALERT_TEMP *
175		− PP_TEMPERATURE_UNITS_PER_CENTIGRADES;
176		− int high = VEGA12_THERMAL_MAXIMUM_ALERT_TEMP *
177		− PP_TEMPERATURE_UNITS_PER_CENTIGRADES;
	176	+ int low = VEGA12_THERMAL_MINIMUM_ALERT_TEMP;
	177	+ int high = VEGA12_THERMAL_MAXIMUM_ALERT_TEMP;
178	178	uint32_t val;
179	179
180		− if (low < range->min)
181		− low = range->min;
182		− if (high > range->max)
183		− high = range->max;
	180	+ /* compare them in unit celsius degree */
	181	+ if (low < range->min / PP_TEMPERATURE_UNITS_PER_CENTIGRADES)
	182	+ low = range->min / PP_TEMPERATURE_UNITS_PER_CENTIGRADES;
	183	+ if (high > pptable_information->us_software_shutdown_temp)
	184	+ high = pptable_information->us_software_shutdown_temp;
184	185
185	186	if (low > high)
186	187	return -EINVAL;
@@ -189,8 +190,8 @@ static int vega12_thermal_set_temperature_range(struct pp_hwmgr *hwmgr, · 2 unmodified lines
189	190
190	191	val = REG_SET_FIELD(val, THM_THERMAL_INT_CTRL, MAX_IH_CREDIT, 5);
191	192	val = REG_SET_FIELD(val, THM_THERMAL_INT_CTRL, THERM_IH_HW_ENA, 1);
192		− val = REG_SET_FIELD(val, THM_THERMAL_INT_CTRL, DIG_THERM_INTH, (high / PP_TEMPERATURE_UNITS_PER_CENTIGRADES));
193		− val = REG_SET_FIELD(val, THM_THERMAL_INT_CTRL, DIG_THERM_INTL, (low / PP_TEMPERATURE_UNITS_PER_CENTIGRADES));
	193	+ val = REG_SET_FIELD(val, THM_THERMAL_INT_CTRL, DIG_THERM_INTH, high);
	194	+ val = REG_SET_FIELD(val, THM_THERMAL_INT_CTRL, DIG_THERM_INTL, low);
194	195	val = val & (~THM_THERMAL_INT_CTRL__THERM_TRIGGER_MASK_MASK);
195	196
196	197	WREG32_SOC15(THM, 0, mmTHM_THERMAL_INT_CTRL, val);

drivers/gpu/drm/amd/powerplay/hwmgr/vega20_thermal.c+11−10

@@ -240,17 +240,18 @@ int vega20_thermal_get_temperature(struct pp_hwmgr *hwmgr) · 239 unmodified lines
240	240	static int vega20_thermal_set_temperature_range(struct pp_hwmgr *hwmgr,
241	241	struct PP_TemperatureRange *range)
242	242	{
	243	+ struct phm_ppt_v3_information *pptable_information =
	244	+ (struct phm_ppt_v3_information *)hwmgr->pptable;
243	245	struct amdgpu_device *adev = hwmgr->adev;
244		− int low = VEGA20_THERMAL_MINIMUM_ALERT_TEMP *
245		− PP_TEMPERATURE_UNITS_PER_CENTIGRADES;
246		− int high = VEGA20_THERMAL_MAXIMUM_ALERT_TEMP *
247		− PP_TEMPERATURE_UNITS_PER_CENTIGRADES;
	246	+ int low = VEGA20_THERMAL_MINIMUM_ALERT_TEMP;
	247	+ int high = VEGA20_THERMAL_MAXIMUM_ALERT_TEMP;
248	248	uint32_t val;
249	249
250		− if (low < range->min)
251		− low = range->min;
252		− if (high > range->max)
253		− high = range->max;
	250	+ /* compare them in unit celsius degree */
	251	+ if (low < range->min / PP_TEMPERATURE_UNITS_PER_CENTIGRADES)
	252	+ low = range->min / PP_TEMPERATURE_UNITS_PER_CENTIGRADES;
	253	+ if (high > pptable_information->us_software_shutdown_temp)
	254	+ high = pptable_information->us_software_shutdown_temp;
254	255
255	256	if (low > high)
256	257	return -EINVAL;
@@ -259,8 +260,8 @@ static int vega20_thermal_set_temperature_range(struct pp_hwmgr *hwmgr, · 2 unmodified lines
259	260
260	261	val = CGS_REG_SET_FIELD(val, THM_THERMAL_INT_CTRL, MAX_IH_CREDIT, 5);
261	262	val = CGS_REG_SET_FIELD(val, THM_THERMAL_INT_CTRL, THERM_IH_HW_ENA, 1);
262		− val = CGS_REG_SET_FIELD(val, THM_THERMAL_INT_CTRL, DIG_THERM_INTH, (high / PP_TEMPERATURE_UNITS_PER_CENTIGRADES));
263		− val = CGS_REG_SET_FIELD(val, THM_THERMAL_INT_CTRL, DIG_THERM_INTL, (low / PP_TEMPERATURE_UNITS_PER_CENTIGRADES));
	263	+ val = CGS_REG_SET_FIELD(val, THM_THERMAL_INT_CTRL, DIG_THERM_INTH, high);
	264	+ val = CGS_REG_SET_FIELD(val, THM_THERMAL_INT_CTRL, DIG_THERM_INTL, low);
264	265	val = val & (~THM_THERMAL_INT_CTRL__THERM_TRIGGER_MASK_MASK);
265	266
266	267	WREG32_SOC15(THM, 0, mmTHM_THERMAL_INT_CTRL, val);

drivers/gpu/drm/amd/powerplay/navi10_ppt.c+7−3

@@ -1331,10 +1331,14 @@ static bool navi10_is_dpm_running(struct smu_context *smu) · 1330 unmodified lines
1331	1331	{
1332	1332	int ret = 0;
1333	1333	uint32_t feature_mask[2];
1334		− unsigned long feature_enabled;
	1334	+ uint64_t feature_enabled;
	1335	+
1335	1336	ret = smu_cmn_get_enabled_mask(smu, feature_mask, 2);
1336		− feature_enabled = (unsigned long)((uint64_t)feature_mask[0] \|
1337		− ((uint64_t)feature_mask[1] << 32));
	1337	+ if (ret)
	1338	+ return false;
	1339	+
	1340	+ feature_enabled = (uint64_t)feature_mask[1] << 32 \| feature_mask[0];
	1341	+
1338	1342	return !!(feature_enabled & SMC_DPM_FEATURE);
1339	1343	}
1340	1344

drivers/gpu/drm/amd/powerplay/sienna_cichlid_ppt.c+19−6

@@ -68,7 +68,8 @@ · 67 unmodified lines
68	68	FEATURE_MASK(FEATURE_DPM_LINK_BIT) \| \
69	69	FEATURE_MASK(FEATURE_DPM_SOCCLK_BIT) \| \
70	70	FEATURE_MASK(FEATURE_DPM_FCLK_BIT) \| \
71		− FEATURE_MASK(FEATURE_DPM_DCEFCLK_BIT))
	71	+ FEATURE_MASK(FEATURE_DPM_DCEFCLK_BIT) \| \
	72	+ FEATURE_MASK(FEATURE_DPM_MP0CLK_BIT))
72	73
73	74	#define SMU_11_0_7_GFX_BUSY_THRESHOLD 15
74	75
@@ -95,6 +96,7 @@ static struct cmn2asic_msg_mapping sienna_cichlid_message_map[SMU_MSG_MAX_COUNT] · 20 unmodified lines
95	96	MSG_MAP(TransferTableSmu2Dram, PPSMC_MSG_TransferTableSmu2Dram, 0),
96	97	MSG_MAP(TransferTableDram2Smu, PPSMC_MSG_TransferTableDram2Smu, 0),
97	98	MSG_MAP(UseDefaultPPTable, PPSMC_MSG_UseDefaultPPTable, 0),
	99	+ MSG_MAP(RunDcBtc, PPSMC_MSG_RunDcBtc, 0),
98	100	MSG_MAP(EnterBaco, PPSMC_MSG_EnterBaco, 0),
99	101	MSG_MAP(SetSoftMinByFreq, PPSMC_MSG_SetSoftMinByFreq, 0),
100	102	MSG_MAP(SetSoftMaxByFreq, PPSMC_MSG_SetSoftMaxByFreq, 0),
@@ -228,6 +230,7 @@ sienna_cichlid_get_allowed_feature_mask(struct smu_context *smu, · 127 unmodified lines
228	230
229	231	(uint64_t )feature_mask \|= FEATURE_MASK(FEATURE_DPM_PREFETCHER_BIT)
230	232	\| FEATURE_MASK(FEATURE_DPM_FCLK_BIT)
	233	+ \| FEATURE_MASK(FEATURE_DPM_MP0CLK_BIT)
231	234	\| FEATURE_MASK(FEATURE_DS_SOCCLK_BIT)
232	235	\| FEATURE_MASK(FEATURE_DS_DCEFCLK_BIT)
233	236	\| FEATURE_MASK(FEATURE_DS_FCLK_BIT)
@@ -775,7 +778,7 @@ static int sienna_cichlid_dpm_set_vcn_enable(struct smu_context *smu, bool enabl · 541 unmodified lines
775	778	ret = smu_cmn_send_smc_msg_with_param(smu, SMU_MSG_PowerUpVcn, 0, NULL);
776	779	if (ret)
777	780	return ret;
778		− if (adev->asic_type == CHIP_SIENNA_CICHLID) {
	781	+ if (adev->vcn.num_vcn_inst > 1) {
779	782	ret = smu_cmn_send_smc_msg_with_param(smu, SMU_MSG_PowerUpVcn,
780	783	0x10000, NULL);
781	784	if (ret)
@@ -787,7 +790,7 @@ static int sienna_cichlid_dpm_set_vcn_enable(struct smu_context *smu, bool enabl · 5 unmodified lines
787	790	ret = smu_cmn_send_smc_msg_with_param(smu, SMU_MSG_PowerDownVcn, 0, NULL);
788	791	if (ret)
789	792	return ret;
790		− if (adev->asic_type == CHIP_SIENNA_CICHLID) {
	793	+ if (adev->vcn.num_vcn_inst > 1) {
791	794	ret = smu_cmn_send_smc_msg_with_param(smu, SMU_MSG_PowerDownVcn,
792	795	0x10000, NULL);
793	796	if (ret)
@@ -1146,10 +1149,14 @@ static bool sienna_cichlid_is_dpm_running(struct smu_context *smu) · 352 unmodified lines
1146	1149	{
1147	1150	int ret = 0;
1148	1151	uint32_t feature_mask[2];
1149		− unsigned long feature_enabled;
	1152	+ uint64_t feature_enabled;
	1153	+
1150	1154	ret = smu_cmn_get_enabled_mask(smu, feature_mask, 2);
1151		− feature_enabled = (unsigned long)((uint64_t)feature_mask[0] \|
1152		− ((uint64_t)feature_mask[1] << 32));
	1155	+ if (ret)
	1156	+ return false;
	1157	+
	1158	+ feature_enabled = (uint64_t)feature_mask[1] << 32 \| feature_mask[0];
	1159	+
1153	1160	return !!(feature_enabled & SMC_DPM_FEATURE);
1154	1161	}
1155	1162
@@ -1732,6 +1739,11 @@ static int sienna_cichlid_get_dpm_ultimate_freq(struct smu_context *smu, · 576 unmodified lines
1732	1739	return ret;
1733	1740	}
1734	1741
	1742	+static int sienna_cichlid_run_btc(struct smu_context *smu)
	1743	+{
	1744	+ return smu_cmn_send_smc_msg(smu, SMU_MSG_RunDcBtc, NULL);
	1745	+}
	1746	+
1735	1747	static bool sienna_cichlid_is_baco_supported(struct smu_context *smu)
1736	1748	{
1737	1749	struct amdgpu_device *adev = smu->adev;
@@ -2719,6 +2731,7 @@ static const struct pptable_funcs sienna_cichlid_ppt_funcs = { · 981 unmodified lines
2719	2731	.mode1_reset = smu_v11_0_mode1_reset,
2720	2732	.get_dpm_ultimate_freq = sienna_cichlid_get_dpm_ultimate_freq,
2721	2733	.set_soft_freq_limited_range = smu_v11_0_set_soft_freq_limited_range,
	2734	+ .run_btc = sienna_cichlid_run_btc,
2722	2735	.get_pp_feature_mask = smu_cmn_get_pp_feature_mask,
2723	2736	.set_pp_feature_mask = smu_cmn_set_pp_feature_mask,
2724	2737	};

drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c+2−0

@@ -37,6 +37,7 @@ · 36 unmodified lines
37	37	#include "cgs_common.h"
38	38	#include "atombios.h"
39	39	#include "pppcielanes.h"
	40	+#include "smu7_smumgr.h"
40	41
41	42	#include "smu/smu_7_0_1_d.h"
42	43	#include "smu/smu_7_0_1_sh_mask.h"
@@ -2948,6 +2949,7 @@ const struct pp_smumgr_func ci_smu_funcs = { · 2905 unmodified lines
2948	2949	.request_smu_load_specific_fw = NULL,
2949	2950	.send_msg_to_smc = ci_send_msg_to_smc,
2950	2951	.send_msg_to_smc_with_parameter = ci_send_msg_to_smc_with_parameter,
	2952	+ .get_argument = smu7_get_argument,
2951	2953	.download_pptable_settings = NULL,
2952	2954	.upload_pptable_settings = NULL,
2953	2955	.get_offsetof = ci_get_offsetof,

drivers/gpu/drm/arm/malidp_hw.c+3−3

@@ -532,7 +532,7 @@ static int malidp500_enable_memwrite(struct malidp_hw_device *hwdev, · 531 unmodified lines
532	532	malidp_hw_write(hwdev, lower_32_bits(addrs[1]), base + MALIDP_MW_P2_PTR_LOW);
533	533	malidp_hw_write(hwdev, upper_32_bits(addrs[1]), base + MALIDP_MW_P2_PTR_HIGH);
534	534	malidp_hw_write(hwdev, pitches[1], base + MALIDP_MW_P2_STRIDE);
535		− /* fall through */
	535	+ fallthrough;
536	536	case 1:
537	537	malidp_hw_write(hwdev, lower_32_bits(addrs[0]), base + MALIDP_MW_P1_PTR_LOW);
538	538	malidp_hw_write(hwdev, upper_32_bits(addrs[0]), base + MALIDP_MW_P1_PTR_HIGH);
@@ -869,7 +869,7 @@ static int malidp550_enable_memwrite(struct malidp_hw_device *hwdev, · 330 unmodified lines
869	869	malidp_hw_write(hwdev, lower_32_bits(addrs[1]), base + MALIDP_MW_P2_PTR_LOW);
870	870	malidp_hw_write(hwdev, upper_32_bits(addrs[1]), base + MALIDP_MW_P2_PTR_HIGH);
871	871	malidp_hw_write(hwdev, pitches[1], base + MALIDP_MW_P2_STRIDE);
872		− /* fall through */
	872	+ fallthrough;
873	873	case 1:
874	874	malidp_hw_write(hwdev, lower_32_bits(addrs[0]), base + MALIDP_MW_P1_PTR_LOW);
875	875	malidp_hw_write(hwdev, upper_32_bits(addrs[0]), base + MALIDP_MW_P1_PTR_HIGH);
@@ -1324,7 +1324,7 @@ static irqreturn_t malidp_se_irq(int irq, void *arg) · 448 unmodified lines
1324	1324	break;
1325	1325	case MW_RESTART:
1326	1326	drm_writeback_signal_completion(&malidp->mw_connector, 0);
1327		− /* fall through - to a new start */
	1327	+ fallthrough; /* to a new start */
1328	1328	case MW_START:
1329	1329	/* writeback started, need to emulate one-shot mode */
1330	1330	hw->disable_memwrite(hwdev);

drivers/gpu/drm/ast/ast_main.c+1−1

@@ -240,7 +240,7 @@ static int ast_detect_chip(struct drm_device dev, bool need_post) · 239 unmodified lines
240	240	ast->dp501_fw_addr = NULL;
241	241	}
242	242	}
243		− /* fallthrough */
	243	+ fallthrough;
244	244	case 0x0c:
245	245	ast->tx_chip_type = AST_TX_DP501;
246	246	}

drivers/gpu/drm/bridge/nwl-dsi.c+0−2

@@ -409,7 +409,6 @@ static bool nwl_dsi_read_packet(struct nwl_dsi *dsi, u32 status) · 408 unmodified lines
409	409
410	410	switch (data_type) {
411	411	case MIPI_DSI_RX_GENERIC_SHORT_READ_RESPONSE_2BYTE:
412		− fallthrough;
413	412	case MIPI_DSI_RX_DCS_SHORT_READ_RESPONSE_2BYTE:
414	413	if (xfer->msg->rx_len > 1) {
415	414	/* read second byte */
@@ -418,7 +417,6 @@ static bool nwl_dsi_read_packet(struct nwl_dsi *dsi, u32 status) · 2 unmodified lines
418	417	}
419	418	fallthrough;
420	419	case MIPI_DSI_RX_GENERIC_SHORT_READ_RESPONSE_1BYTE:
421		− fallthrough;
422	420	case MIPI_DSI_RX_DCS_SHORT_READ_RESPONSE_1BYTE:
423	421	if (xfer->msg->rx_len > 0) {
424	422	/* read first byte */

drivers/gpu/drm/bridge/synopsys/dw-hdmi-i2s-audio.c+2−2

@@ -61,10 +61,10 @@ static int dw_hdmi_i2s_hw_params(struct device dev, void data, · 60 unmodified lines
61	61	switch (hparms->channels) {
62	62	case 7 ... 8:
63	63	conf0 \|= HDMI_AUD_CONF0_I2S_EN3;
64		− /* Fall-thru */
	64	+ fallthrough;
65	65	case 5 ... 6:
66	66	conf0 \|= HDMI_AUD_CONF0_I2S_EN2;
67		− /* Fall-thru */
	67	+ fallthrough;
68	68	case 3 ... 4:
69	69	conf0 \|= HDMI_AUD_CONF0_I2S_EN1;
70	70	/* Fall-thru */

drivers/gpu/drm/bridge/ti-sn65dsi86.c+3−3

@@ -601,13 +601,13 @@ static void ti_sn_bridge_read_valid_rates(struct ti_sn_bridge *pdata, · 600 unmodified lines
601	601	DRM_DEV_ERROR(pdata->dev,
602	602	"Unexpected max rate (%#x); assuming 5.4 GHz\n",
603	603	(int)dpcd_val);
604		− /* fall through */
	604	+ fallthrough;
605	605	case DP_LINK_BW_5_4:
606	606	rate_valid[7] = 1;
607		− /* fall through */
	607	+ fallthrough;
608	608	case DP_LINK_BW_2_7:
609	609	rate_valid[4] = 1;
610		− /* fall through */
	610	+ fallthrough;
611	611	case DP_LINK_BW_1_62:
612	612	rate_valid[1] = 1;
613	613	break;

drivers/gpu/drm/drm_atomic_helper.c+4−3

@@ -34,6 +34,7 @@ · 33 unmodified lines
34	34	#include <drm/drm_bridge.h>
35	35	#include <drm/drm_damage_helper.h>
36	36	#include <drm/drm_device.h>
	37	+#include <drm/drm_drv.h>
37	38	#include <drm/drm_plane_helper.h>
38	39	#include <drm/drm_print.h>
39	40	#include <drm/drm_self_refresh_helper.h>
@@ -3106,7 +3107,7 @@ void drm_atomic_helper_shutdown(struct drm_device *dev) · 3066 unmodified lines
3106	3107	if (ret)
3107	3108	DRM_ERROR("Disabling all crtc's during unload failed with %i\n", ret);
3108	3109
3109		− DRM_MODESET_LOCK_ALL_END(ctx, ret);
	3110	+ DRM_MODESET_LOCK_ALL_END(dev, ctx, ret);
3110	3111	}
3111	3112	EXPORT_SYMBOL(drm_atomic_helper_shutdown);
3112	3113
@@ -3246,7 +3247,7 @@ struct drm_atomic_state drm_atomic_helper_suspend(struct drm_device dev) · 133 unmodified lines
3246	3247	}
3247	3248
3248	3249	unlock:
3249		− DRM_MODESET_LOCK_ALL_END(ctx, err);
	3250	+ DRM_MODESET_LOCK_ALL_END(dev, ctx, err);
3250	3251	if (err)
3251	3252	return ERR_PTR(err);
3252	3253
@@ -3327,7 +3328,7 @@ int drm_atomic_helper_resume(struct drm_device *dev, · 74 unmodified lines
3327	3328
3328	3329	err = drm_atomic_helper_commit_duplicated_state(state, &ctx);
3329	3330
3330		− DRM_MODESET_LOCK_ALL_END(ctx, err);
	3331	+ DRM_MODESET_LOCK_ALL_END(dev, ctx, err);
3331	3332	drm_atomic_state_put(state);
3332	3333
3333	3334	return err;

drivers/gpu/drm/drm_bufs.c+1−1

@@ -537,7 +537,7 @@ int drm_legacy_rmmap_locked(struct drm_device dev, struct drm_local_map map) · 536 unmodified lines
537	537	switch (map->type) {
538	538	case _DRM_REGISTERS:
539	539	iounmap(map->handle);
540		− /* FALLTHROUGH */
	540	+ fallthrough;
541	541	case _DRM_FRAME_BUFFER:
542	542	arch_phys_wc_del(map->mtrr);
543	543	break;

drivers/gpu/drm/drm_color_mgmt.c+1−1

@@ -294,7 +294,7 @@ int drm_mode_gamma_set_ioctl(struct drm_device *dev, · 293 unmodified lines
294	294	crtc->gamma_size, &ctx);
295	295
296	296	out:
297		− DRM_MODESET_LOCK_ALL_END(ctx, ret);
	297	+ DRM_MODESET_LOCK_ALL_END(dev, ctx, ret);
298	298	return ret;
299	299
300	300	}

drivers/gpu/drm/drm_crtc.c+1−3

@@ -588,7 +588,6 @@ int drm_mode_setcrtc(struct drm_device dev, void data, · 587 unmodified lines
588	588	if (crtc_req->mode_valid && !drm_lease_held(file_priv, plane->base.id))
589	589	return -EACCES;
590	590
591		− mutex_lock(&crtc->dev->mode_config.mutex);
592	591	DRM_MODESET_LOCK_ALL_BEGIN(dev, ctx,
593	592	DRM_MODESET_ACQUIRE_INTERRUPTIBLE, ret);
594	593
@@ -756,8 +755,7 @@ out: · 161 unmodified lines
756	755	fb = NULL;
757	756	mode = NULL;
758	757
759		− DRM_MODESET_LOCK_ALL_END(ctx, ret);
760		− mutex_unlock(&crtc->dev->mode_config.mutex);
	758	+ DRM_MODESET_LOCK_ALL_END(dev, ctx, ret);
761	759
762	760	return ret;
763	761	}

drivers/gpu/drm/drm_dp_helper.c+1−1

@@ -492,7 +492,7 @@ int drm_dp_downstream_max_bpc(const u8 dpcd[DP_RECEIVER_CAP_SIZE], · 491 unmodified lines
492	492	case DP_DS_16BPC:
493	493	return 16;
494	494	}
495		− /* fall through */
	495	+ fallthrough;
496	496	default:
497	497	return 0;
498	498	}

drivers/gpu/drm/drm_dp_mst_topology.c+2−2

@@ -5040,8 +5040,8 @@ int drm_dp_mst_add_affected_dsc_crtcs(struct drm_atomic_state *state, struct drm · 5039 unmodified lines
5040	5040
5041	5041	crtc = conn_state->crtc;
5042	5042
5043		− if (WARN_ON(!crtc))
5044		− return -EINVAL;
	5043	+ if (!crtc)
	5044	+ continue;
5045	5045
5046	5046	if (!drm_dp_mst_dsc_aux_for_port(pos->port))
5047	5047	continue;

drivers/gpu/drm/drm_mode_object.c+2−2

@@ -428,7 +428,7 @@ int drm_mode_obj_get_properties_ioctl(struct drm_device dev, void data, · 427 unmodified lines
428	428	out_unref:
429	429	drm_mode_object_put(obj);
430	430	out:
431		− DRM_MODESET_LOCK_ALL_END(ctx, ret);
	431	+ DRM_MODESET_LOCK_ALL_END(dev, ctx, ret);
432	432	return ret;
433	433	}
434	434
@@ -470,7 +470,7 @@ static int set_property_legacy(struct drm_mode_object *obj, · 35 unmodified lines
470	470	break;
471	471	}
472	472	drm_property_change_valid_put(prop, ref);
473		− DRM_MODESET_LOCK_ALL_END(ctx, ret);
	473	+ DRM_MODESET_LOCK_ALL_END(dev, ctx, ret);
474	474
475	475	return ret;
476	476	}

drivers/gpu/drm/drm_modes.c+1−1

@@ -1930,7 +1930,7 @@ void drm_mode_convert_to_umode(struct drm_mode_modeinfo *out, · 1929 unmodified lines
1930	1930	default:
1931	1931	WARN(1, "Invalid aspect ratio (0%x) on mode\n",
1932	1932	in->picture_aspect_ratio);
1933		− /* fall through */
	1933	+ fallthrough;
1934	1934	case HDMI_PICTURE_ASPECT_NONE:
1935	1935	out->flags \|= DRM_MODE_FLAG_PIC_AR_NONE;
1936	1936	break;

drivers/gpu/drm/drm_plane.c+1−1

@@ -792,7 +792,7 @@ static int setplane_internal(struct drm_plane *plane, · 791 unmodified lines
792	792	crtc_x, crtc_y, crtc_w, crtc_h,
793	793	src_x, src_y, src_w, src_h, &ctx);
794	794
795		− DRM_MODESET_LOCK_ALL_END(ctx, ret);
	795	+ DRM_MODESET_LOCK_ALL_END(plane->dev, ctx, ret);
796	796
797	797	return ret;
798	798	}

drivers/gpu/drm/etnaviv/etnaviv_gpu.c+9−2

@@ -337,9 +337,16 @@ static void etnaviv_hw_identify(struct etnaviv_gpu *gpu) · 336 unmodified lines
337	337
338	338	gpu->identity.model = gpu_read(gpu, VIVS_HI_CHIP_MODEL);
339	339	gpu->identity.revision = gpu_read(gpu, VIVS_HI_CHIP_REV);
340		− gpu->identity.product_id = gpu_read(gpu, VIVS_HI_CHIP_PRODUCT_ID);
341	340	gpu->identity.customer_id = gpu_read(gpu, VIVS_HI_CHIP_CUSTOMER_ID);
342		− gpu->identity.eco_id = gpu_read(gpu, VIVS_HI_CHIP_ECO_ID);
	341	+
	342	+ /*
	343	+ * Reading these two registers on GC600 rev 0x19 result in a
	344	+ * unhandled fault: external abort on non-linefetch
	345	+ */
	346	+ if (!etnaviv_is_model_rev(gpu, GC600, 0x19)) {
	347	+ gpu->identity.product_id = gpu_read(gpu, VIVS_HI_CHIP_PRODUCT_ID);
	348	+ gpu->identity.eco_id = gpu_read(gpu, VIVS_HI_CHIP_ECO_ID);
	349	+ }
343	350
344	351	/*
345	352	* !!!! HACK ALERT !!!!

drivers/gpu/drm/etnaviv/etnaviv_sched.c+6−5

@@ -89,12 +89,15 @@ static void etnaviv_sched_timedout_job(struct drm_sched_job *sched_job) · 88 unmodified lines
89	89	u32 dma_addr;
90	90	int change;
91	91
	92	+ /* block scheduler */
	93	+ drm_sched_stop(&gpu->sched, sched_job);
	94	+
92	95	/*
93	96	* If the GPU managed to complete this jobs fence, the timout is
94	97	* spurious. Bail out.
95	98	*/
96	99	if (dma_fence_is_signaled(submit->out_fence))
97		− return;
	100	+ goto out_no_timeout;
98	101
99	102	/*
100	103	* If the GPU is still making forward progress on the front-end (which
@@ -105,12 +108,9 @@ static void etnaviv_sched_timedout_job(struct drm_sched_job *sched_job) · 4 unmodified lines
105	108	change = dma_addr - gpu->hangcheck_dma_addr;
106	109	if (change < 0 \|\| change > 16) {
107	110	gpu->hangcheck_dma_addr = dma_addr;
108		− return;
	111	+ goto out_no_timeout;
109	112	}
110	113
111		− /* block scheduler */
112		− drm_sched_stop(&gpu->sched, sched_job);
113		−
114	114	if(sched_job)
115	115	drm_sched_increase_karma(sched_job);
116	116
@@ -120,6 +120,7 @@ static void etnaviv_sched_timedout_job(struct drm_sched_job *sched_job) · 3 unmodified lines
120	120
121	121	drm_sched_resubmit_jobs(&gpu->sched);
122	122
	123	+out_no_timeout:
123	124	/* restart scheduler after GPU is usable again */
124	125	drm_sched_start(&gpu->sched, true);
125	126	}

drivers/gpu/drm/exynos/exynos_drm_dsi.c+5−5

@@ -987,10 +987,10 @@ static void exynos_dsi_send_to_fifo(struct exynos_dsi *dsi, · 986 unmodified lines
987	987	switch (length) {
988	988	case 3:
989	989	reg \|= payload[2] << 16;
990		− /* Fall through */
	990	+ fallthrough;
991	991	case 2:
992	992	reg \|= payload[1] << 8;
993		− /* Fall through */
	993	+ fallthrough;
994	994	case 1:
995	995	reg \|= payload[0];
996	996	exynos_dsi_write(dsi, DSIM_PAYLOAD_REG, reg);
@@ -1038,7 +1038,7 @@ static void exynos_dsi_read_from_fifo(struct exynos_dsi *dsi, · 41 unmodified lines
1038	1038	payload[1] = reg >> 16;
1039	1039	++xfer->rx_done;
1040	1040	}
1041		− /* Fall through */
	1041	+ fallthrough;
1042	1042	case MIPI_DSI_RX_GENERIC_SHORT_READ_RESPONSE_1BYTE:
1043	1043	case MIPI_DSI_RX_DCS_SHORT_READ_RESPONSE_1BYTE:
1044	1044	payload[0] = reg >> 8;
@@ -1082,10 +1082,10 @@ static void exynos_dsi_read_from_fifo(struct exynos_dsi *dsi, · 37 unmodified lines
1082	1082	switch (length) {
1083	1083	case 3:
1084	1084	payload[2] = (reg >> 16) & 0xff;
1085		− /* Fall through */
	1085	+ fallthrough;
1086	1086	case 2:
1087	1087	payload[1] = (reg >> 8) & 0xff;
1088		− /* Fall through */
	1088	+ fallthrough;
1089	1089	case 1:
1090	1090	payload[0] = reg & 0xff;
1091	1091	}

drivers/gpu/drm/exynos/exynos_drm_fbdev.c+1−1

@@ -92,7 +92,7 @@ static int exynos_drm_fbdev_update(struct drm_fb_helper *helper, · 91 unmodified lines
92	92	offset = fbi->var.xoffset * fb->format->cpp[0];
93	93	offset += fbi->var.yoffset * fb->pitches[0];
94	94
95		− fbi->screen_base = exynos_gem->kvaddr + offset;
	95	+ fbi->screen_buffer = exynos_gem->kvaddr + offset;
96	96	fbi->screen_size = size;
97	97	fbi->fix.smem_len = size;
98	98

drivers/gpu/drm/exynos/exynos_drm_gem.h+1−1

@@ -40,7 +40,7 @@ struct exynos_drm_gem { · 39 unmodified lines
40	40	unsigned int flags;
41	41	unsigned long size;
42	42	void *cookie;
43		− void __iomem *kvaddr;
	43	+ void *kvaddr;
44	44	dma_addr_t dma_addr;
45	45	unsigned long dma_attrs;
46	46	struct sg_table *sgt;

drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_plane.c+3−3

@@ -101,19 +101,19 @@ static void fsl_dcu_drm_plane_atomic_update(struct drm_plane *plane, · 100 unmodified lines
101	101	break;
102	102	case DRM_FORMAT_ARGB8888:
103	103	alpha = DCU_LAYER_AB_WHOLE_FRAME;
104		− /* fall-through */
	104	+ fallthrough;
105	105	case DRM_FORMAT_XRGB8888:
106	106	bpp = FSL_DCU_ARGB8888;
107	107	break;
108	108	case DRM_FORMAT_ARGB4444:
109	109	alpha = DCU_LAYER_AB_WHOLE_FRAME;
110		− /* fall-through */
	110	+ fallthrough;
111	111	case DRM_FORMAT_XRGB4444:
112	112	bpp = FSL_DCU_ARGB4444;
113	113	break;
114	114	case DRM_FORMAT_ARGB1555:
115	115	alpha = DCU_LAYER_AB_WHOLE_FRAME;
116		− /* fall-through */
	116	+ fallthrough;
117	117	case DRM_FORMAT_XRGB1555:
118	118	bpp = FSL_DCU_ARGB1555;
119	119	break;

drivers/gpu/drm/i915/display/icl_dsi.c+3−3

@@ -712,7 +712,7 @@ gen11_dsi_configure_transcoder(struct intel_encoder *encoder, · 711 unmodified lines
712	712	switch (intel_dsi->pixel_format) {
713	713	default:
714	714	MISSING_CASE(intel_dsi->pixel_format);
715		− /* fallthrough */
	715	+ fallthrough;
716	716	case MIPI_DSI_FMT_RGB565:
717	717	tmp \|= PIX_FMT_RGB565;
718	718	break;
@@ -739,7 +739,7 @@ gen11_dsi_configure_transcoder(struct intel_encoder *encoder, · 20 unmodified lines
739	739	switch (intel_dsi->video_mode_format) {
740	740	default:
741	741	MISSING_CASE(intel_dsi->video_mode_format);
742		− /* fallthrough */
	742	+ fallthrough;
743	743	case VIDEO_MODE_NON_BURST_WITH_SYNC_EVENTS:
744	744	tmp \|= VIDEO_MODE_SYNC_EVENT;
745	745	break;
@@ -792,7 +792,7 @@ gen11_dsi_configure_transcoder(struct intel_encoder *encoder, · 46 unmodified lines
792	792	switch (pipe) {
793	793	default:
794	794	MISSING_CASE(pipe);
795		− /* fallthrough */
	795	+ fallthrough;
796	796	case PIPE_A:
797	797	tmp \|= TRANS_DDI_EDP_INPUT_A_ON;
798	798	break;

drivers/gpu/drm/i915/display/intel_bios.c+3−3

@@ -905,7 +905,7 @@ parse_psr(struct drm_i915_private dev_priv, const struct bdb_header bdb) · 904 unmodified lines
905	905	drm_dbg_kms(&dev_priv->drm,
906	906	"VBT tp1 wakeup time value %d is outside range[0-3], defaulting to max value 2500us\n",
907	907	psr_table->tp1_wakeup_time);
908		− /* fallthrough */
	908	+ fallthrough;
909	909	case 2:
910	910	dev_priv->vbt.psr.tp1_wakeup_time_us = 2500;
911	911	break;
@@ -925,7 +925,7 @@ parse_psr(struct drm_i915_private dev_priv, const struct bdb_header bdb) · 13 unmodified lines
925	925	drm_dbg_kms(&dev_priv->drm,
926	926	"VBT tp2_tp3 wakeup time value %d is outside range[0-3], defaulting to max value 2500us\n",
927	927	psr_table->tp2_tp3_wakeup_time);
928		− /* fallthrough */
	928	+ fallthrough;
929	929	case 2:
930	930	dev_priv->vbt.psr.tp2_tp3_wakeup_time_us = 2500;
931	931	break;
@@ -1775,7 +1775,7 @@ static void parse_ddi_port(struct drm_i915_private *dev_priv, · 843 unmodified lines
1775	1775	switch (child->hdmi_max_data_rate) {
1776	1776	default:
1777	1777	MISSING_CASE(child->hdmi_max_data_rate);
1778		− /* fall through */
	1778	+ fallthrough;
1779	1779	case HDMI_MAX_DATA_RATE_PLATFORM:
1780	1780	max_tmds_clock = 0;
1781	1781	break;

drivers/gpu/drm/i915/display/intel_cdclk.c+5−5

@@ -326,7 +326,7 @@ static void pnv_get_cdclk(struct drm_i915_private *dev_priv, · 325 unmodified lines
326	326	default:
327	327	drm_err(&dev_priv->drm,
328	328	"Unknown pnv display core clock 0x%04x\n", gcfgc);
329		− /* fall through */
	329	+ fallthrough;
330	330	case GC_DISPLAY_CLOCK_133_MHZ_PNV:
331	331	cdclk_config->cdclk = 133333;
332	332	break;
@@ -766,7 +766,7 @@ static void bdw_set_cdclk(struct drm_i915_private *dev_priv, · 433 unmodified lines
766	766	switch (cdclk) {
767	767	default:
768	768	MISSING_CASE(cdclk);
769		− /* fall through */
	769	+ fallthrough;
770	770	case 337500:
771	771	val \|= LCPLL_CLK_FREQ_337_5_BDW;
772	772	break;
@@ -1042,7 +1042,7 @@ static void skl_set_cdclk(struct drm_i915_private *dev_priv, · 269 unmodified lines
1042	1042	drm_WARN_ON(&dev_priv->drm,
1043	1043	cdclk != dev_priv->cdclk.hw.bypass);
1044	1044	drm_WARN_ON(&dev_priv->drm, vco != 0);
1045		− /* fall through */
	1045	+ fallthrough;
1046	1046	case 308571:
1047	1047	case 337500:
1048	1048	freq_select = CDCLK_FREQ_337_308;
@@ -1333,7 +1333,7 @@ static void icl_readout_refclk(struct drm_i915_private *dev_priv, · 284 unmodified lines
1333	1333	switch (dssm) {
1334	1334	default:
1335	1335	MISSING_CASE(dssm);
1336		− /* fall through */
	1336	+ fallthrough;
1337	1337	case ICL_DSSM_CDCLK_PLL_REFCLK_24MHz:
1338	1338	cdclk_config->ref = 24000;
1339	1339	break;
@@ -1561,7 +1561,7 @@ static void bxt_set_cdclk(struct drm_i915_private *dev_priv, · 221 unmodified lines
1561	1561	drm_WARN_ON(&dev_priv->drm,
1562	1562	cdclk != dev_priv->cdclk.hw.bypass);
1563	1563	drm_WARN_ON(&dev_priv->drm, vco != 0);
1564		− /* fall through */
	1564	+ fallthrough;
1565	1565	case 2:
1566	1566	divider = BXT_CDCLK_CD2X_DIV_SEL_1;
1567	1567	break;

drivers/gpu/drm/i915/display/intel_combo_phy.c+5−5

@@ -52,7 +52,7 @@ cnl_get_procmon_ref_values(struct drm_i915_private *dev_priv, enum phy phy) · 51 unmodified lines
52	52	switch (val & (PROCESS_INFO_MASK \| VOLTAGE_INFO_MASK)) {
53	53	default:
54	54	MISSING_CASE(val);
55		− /* fall through */
	55	+ fallthrough;
56	56	case VOLTAGE_INFO_0_85V \| PROCESS_INFO_DOT_0:
57	57	procmon = &cnl_procmon_values[PROCMON_0_85V_DOT_0];
58	58	break;
@@ -258,7 +258,7 @@ static bool phy_is_master(struct drm_i915_private *dev_priv, enum phy phy) · 199 unmodified lines
258	258	static bool icl_combo_phy_verify_state(struct drm_i915_private *dev_priv,
259	259	enum phy phy)
260	260	{
261		− bool ret;
	261	+ bool ret = true;
262	262	u32 expected_val = 0;
263	263
264	264	if (!icl_combo_phy_enabled(dev_priv, phy))
@@ -276,7 +276,7 @@ static bool icl_combo_phy_verify_state(struct drm_i915_private *dev_priv, · 11 unmodified lines
276	276	DCC_MODE_SELECT_CONTINUOSLY);
277	277	}
278	278
279		− ret = cnl_verify_procmon_ref_values(dev_priv, phy);
	279	+ ret &= cnl_verify_procmon_ref_values(dev_priv, phy);
280	280
281	281	if (phy_is_master(dev_priv, phy)) {
282	282	ret &= check_phy_reg(dev_priv, phy, ICL_PORT_COMP_DW8(phy),
@@ -320,7 +320,7 @@ void intel_combo_phy_power_up_lanes(struct drm_i915_private *dev_priv, · 37 unmodified lines
320	320	break;
321	321	default:
322	322	MISSING_CASE(lane_count);
323		− /* fall-through */
	323	+ fallthrough;
324	324	case 4:
325	325	lane_mask = PWR_UP_ALL_LANES;
326	326	break;
@@ -337,7 +337,7 @@ void intel_combo_phy_power_up_lanes(struct drm_i915_private *dev_priv, · 10 unmodified lines
337	337	break;
338	338	default:
339	339	MISSING_CASE(lane_count);
340		− /* fall-through */
	340	+ fallthrough;
341	341	case 4:
342	342	lane_mask = PWR_UP_ALL_LANES;
343	343	break;

drivers/gpu/drm/i915/display/intel_ddi.c+2−2

@@ -1941,7 +1941,7 @@ static void intel_ddi_get_encoder_pipes(struct intel_encoder *encoder, · 1940 unmodified lines
1941	1941	switch (tmp & TRANS_DDI_EDP_INPUT_MASK) {
1942	1942	default:
1943	1943	MISSING_CASE(tmp & TRANS_DDI_EDP_INPUT_MASK);
1944		− /* fallthrough */
	1944	+ fallthrough;
1945	1945	case TRANS_DDI_EDP_INPUT_A_ON:
1946	1946	case TRANS_DDI_EDP_INPUT_A_ONOFF:
1947	1947	*pipe_mask = BIT(PIPE_A);
@@ -4332,7 +4332,7 @@ void intel_ddi_get_config(struct intel_encoder *encoder, · 2384 unmodified lines
4332	4332	pipe_config->hdmi_scrambling = true;
4333	4333	if (temp & TRANS_DDI_HIGH_TMDS_CHAR_RATE)
4334	4334	pipe_config->hdmi_high_tmds_clock_ratio = true;
4335		− /* fall through */
	4335	+ fallthrough;
4336	4336	case TRANS_DDI_MODE_SELECT_DVI:
4337	4337	pipe_config->output_types \|= BIT(INTEL_OUTPUT_HDMI);
4338	4338	pipe_config->lane_count = 4;

drivers/gpu/drm/i915/display/intel_display.c+10−10

@@ -2030,12 +2030,12 @@ intel_tile_width_bytes(const struct drm_framebuffer *fb, int color_plane) · 2029 unmodified lines
2030	2030	case I915_FORMAT_MOD_Y_TILED_CCS:
2031	2031	if (is_ccs_plane(fb, color_plane))
2032	2032	return 128;
2033		− /* fall through */
	2033	+ fallthrough;
2034	2034	case I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS:
2035	2035	case I915_FORMAT_MOD_Y_TILED_GEN12_MC_CCS:
2036	2036	if (is_ccs_plane(fb, color_plane))
2037	2037	return 64;
2038		− /* fall through */
	2038	+ fallthrough;
2039	2039	case I915_FORMAT_MOD_Y_TILED:
2040	2040	if (IS_GEN(dev_priv, 2) \|\| HAS_128_BYTE_Y_TILING(dev_priv))
2041	2041	return 128;
@@ -2044,7 +2044,7 @@ intel_tile_width_bytes(const struct drm_framebuffer *fb, int color_plane) · 2 unmodified lines
2044	2044	case I915_FORMAT_MOD_Yf_TILED_CCS:
2045	2045	if (is_ccs_plane(fb, color_plane))
2046	2046	return 128;
2047		− /* fall through */
	2047	+ fallthrough;
2048	2048	case I915_FORMAT_MOD_Yf_TILED:
2049	2049	switch (cpp) {
2050	2050	case 1:
@@ -2186,7 +2186,7 @@ static unsigned int intel_surf_alignment(const struct drm_framebuffer *fb, · 135 unmodified lines
2186	2186	case I915_FORMAT_MOD_Y_TILED_GEN12_MC_CCS:
2187	2187	if (is_semiplanar_uv_plane(fb, color_plane))
2188	2188	return intel_tile_row_size(fb, color_plane);
2189		− /* Fall-through */
	2189	+ fallthrough;
2190	2190	case I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS:
2191	2191	return 16 * 1024;
2192	2192	case I915_FORMAT_MOD_Y_TILED_CCS:
@@ -2195,7 +2195,7 @@ static unsigned int intel_surf_alignment(const struct drm_framebuffer *fb, · 2 unmodified lines
2195	2195	if (INTEL_GEN(dev_priv) >= 12 &&
2196	2196	is_semiplanar_uv_plane(fb, color_plane))
2197	2197	return intel_tile_row_size(fb, color_plane);
2198		− /* Fall-through */
	2198	+ fallthrough;
2199	2199	case I915_FORMAT_MOD_Yf_TILED:
2200	2200	return 1 * 1024 * 1024;
2201	2201	default:
@@ -6252,7 +6252,7 @@ static int skl_update_scaler_plane(struct intel_crtc_state *crtc_state, · 4050 unmodified lines
6252	6252	case DRM_FORMAT_ARGB16161616F:
6253	6253	if (INTEL_GEN(dev_priv) >= 11)
6254	6254	break;
6255		− /* fall through */
	6255	+ fallthrough;
6256	6256	default:
6257	6257	drm_dbg_kms(&dev_priv->drm,
6258	6258	"[PLANE:%d:%s] FB:%d unsupported scaling format 0x%x\n",
@@ -10946,7 +10946,7 @@ static void hsw_get_ddi_pll(struct drm_i915_private *dev_priv, enum port port, · 4687 unmodified lines
10946	10946	break;
10947	10947	default:
10948	10948	MISSING_CASE(ddi_pll_sel);
10949		− /* fall through */
	10949	+ fallthrough;
10950	10950	case PORT_CLK_SEL_NONE:
10951	10951	return;
10952	10952	}
@@ -11006,10 +11006,10 @@ static bool hsw_get_transcoder_state(struct intel_crtc *crtc, · 53 unmodified lines
11006	11006	drm_WARN(dev, 1,
11007	11007	"unknown pipe linked to transcoder %s\n",
11008	11008	transcoder_name(panel_transcoder));
11009		− /* fall through */
	11009	+ fallthrough;
11010	11010	case TRANS_DDI_EDP_INPUT_A_ONOFF:
11011	11011	force_thru = true;
11012		− /* fall through */
	11012	+ fallthrough;
11013	11013	case TRANS_DDI_EDP_INPUT_A_ON:
11014	11014	trans_pipe = PIPE_A;
11015	11015	break;
@@ -13236,7 +13236,7 @@ static bool check_digital_port_conflicts(struct intel_atomic_state *state) · 2220 unmodified lines
13236	13236	case INTEL_OUTPUT_DDI:
13237	13237	if (drm_WARN_ON(dev, !HAS_DDI(to_i915(dev))))
13238	13238	break;
13239		− /* else, fall through */
	13239	+ fallthrough;
13240	13240	case INTEL_OUTPUT_DP:
13241	13241	case INTEL_OUTPUT_HDMI:
13242	13242	case INTEL_OUTPUT_EDP:

drivers/gpu/drm/i915/display/intel_dpll_mgr.c+4−4

@@ -892,7 +892,7 @@ static int hsw_ddi_wrpll_get_freq(struct drm_i915_private *dev_priv, · 891 unmodified lines
892	892	refclk = dev_priv->dpll.ref_clks.nssc;
893	893	break;
894	894	}
895		− /* fall through */
	895	+ fallthrough;
896	896	case WRPLL_REF_PCH_SSC:
897	897	/*
898	898	* We could calculate spread here, but our checking
@@ -2977,7 +2977,7 @@ static bool icl_calc_tbt_pll(struct intel_crtc_state *crtc_state, · 2078 unmodified lines
2977	2977	switch (dev_priv->dpll.ref_clks.nssc) {
2978	2978	default:
2979	2979	MISSING_CASE(dev_priv->dpll.ref_clks.nssc);
2980		− /* fall-through */
	2980	+ fallthrough;
2981	2981	case 19200:
2982	2982	*pll_params = tgl_tbt_pll_19_2MHz_values;
2983	2983	break;
@@ -2992,7 +2992,7 @@ static bool icl_calc_tbt_pll(struct intel_crtc_state *crtc_state, · 8 unmodified lines
2992	2992	switch (dev_priv->dpll.ref_clks.nssc) {
2993	2993	default:
2994	2994	MISSING_CASE(dev_priv->dpll.ref_clks.nssc);
2995		− /* fall-through */
	2995	+ fallthrough;
2996	2996	case 19200:
2997	2997	case 38400:
2998	2998	*pll_params = icl_tbt_pll_19_2MHz_values;
@@ -3120,7 +3120,7 @@ static bool icl_mg_pll_find_divisors(int clock_khz, bool is_dp, bool use_ssc, · 121 unmodified lines
3120	3120	switch (div1) {
3121	3121	default:
3122	3122	MISSING_CASE(div1);
3123		− /* fall through */
	3123	+ fallthrough;
3124	3124	case 2:
3125	3125	hsdiv = MG_CLKTOP2_HSCLKCTL_HSDIV_RATIO_2;
3126	3126	break;

drivers/gpu/drm/i915/display/intel_hdcp.c+26−6

@@ -336,8 +336,10 @@ int intel_hdcp_validate_v_prime(struct intel_connector *connector, · 335 unmodified lines
336	336
337	337	/* Fill up the empty slots in sha_text and write it out */
338	338	sha_empty = sizeof(sha_text) - sha_leftovers;
339		− for (j = 0; j < sha_empty; j++)
340		− sha_text \|= ksv[j] << ((sizeof(sha_text) - j - 1) * 8);
	339	+ for (j = 0; j < sha_empty; j++) {
	340	+ u8 off = ((sizeof(sha_text) - j - 1 - sha_leftovers) * 8);
	341	+ sha_text \|= ksv[j] << off;
	342	+ }
341	343
342	344	ret = intel_write_sha_text(dev_priv, sha_text);
343	345	if (ret < 0)
@@ -435,7 +437,7 @@ int intel_hdcp_validate_v_prime(struct intel_connector *connector, · 91 unmodified lines
435	437	/* Write 32 bits of text */
436	438	intel_de_write(dev_priv, HDCP_REP_CTL,
437	439	rep_ctl \| HDCP_SHA1_TEXT_32);
438		− sha_text \|= bstatus[0] << 24 \| bstatus[1] << 16;
	440	+ sha_text \|= bstatus[0] << 8 \| bstatus[1];
439	441	ret = intel_write_sha_text(dev_priv, sha_text);
440	442	if (ret < 0)
441	443	return ret;
@@ -450,17 +452,29 @@ int intel_hdcp_validate_v_prime(struct intel_connector *connector, · 8 unmodified lines
450	452	return ret;
451	453	sha_idx += sizeof(sha_text);
452	454	}
	455	+
	456	+ /*
	457	+ * Terminate the SHA-1 stream by hand. For the other leftover
	458	+ * cases this is appended by the hardware.
	459	+ */
	460	+ intel_de_write(dev_priv, HDCP_REP_CTL,
	461	+ rep_ctl \| HDCP_SHA1_TEXT_32);
	462	+ sha_text = DRM_HDCP_SHA1_TERMINATOR << 24;
	463	+ ret = intel_write_sha_text(dev_priv, sha_text);
	464	+ if (ret < 0)
	465	+ return ret;
	466	+ sha_idx += sizeof(sha_text);
453	467	} else if (sha_leftovers == 3) {
454		− /* Write 32 bits of text */
	468	+ /* Write 32 bits of text (filled from LSB) */
455	469	intel_de_write(dev_priv, HDCP_REP_CTL,
456	470	rep_ctl \| HDCP_SHA1_TEXT_32);
457		− sha_text \|= bstatus[0] << 24;
	471	+ sha_text \|= bstatus[0];
458	472	ret = intel_write_sha_text(dev_priv, sha_text);
459	473	if (ret < 0)
460	474	return ret;
461	475	sha_idx += sizeof(sha_text);
462	476
463		− /* Write 8 bits of text, 24 bits of M0 */
	477	+ /* Write 8 bits of text (filled from LSB), 24 bits of M0 */
464	478	intel_de_write(dev_priv, HDCP_REP_CTL,
465	479	rep_ctl \| HDCP_SHA1_TEXT_8);
466	480	ret = intel_write_sha_text(dev_priv, bstatus[1]);
@@ -781,6 +795,7 @@ static int _intel_hdcp_disable(struct intel_connector *connector) · 314 unmodified lines
781	795	struct intel_hdcp *hdcp = &connector->hdcp;
782	796	enum port port = dig_port->base.port;
783	797	enum transcoder cpu_transcoder = hdcp->cpu_transcoder;
	798	+ u32 repeater_ctl;
784	799	int ret;
785	800
786	801	drm_dbg_kms(&dev_priv->drm, "[%s:%d] HDCP is being disabled...\n",
@@ -796,6 +811,11 @@ static int _intel_hdcp_disable(struct intel_connector *connector) · 9 unmodified lines
796	811	return -ETIMEDOUT;
797	812	}
798	813
	814	+ repeater_ctl = intel_hdcp_get_repeater_ctl(dev_priv, cpu_transcoder,
	815	+ port);
	816	+ intel_de_write(dev_priv, HDCP_REP_CTL,
	817	+ intel_de_read(dev_priv, HDCP_REP_CTL) & ~repeater_ctl);
	818	+
799	819	ret = hdcp->shim->toggle_signalling(dig_port, false);
800	820	if (ret) {
801	821	drm_err(&dev_priv->drm, "Failed to disable HDCP signalling\n");

drivers/gpu/drm/i915/display/intel_panel.c+1−1

@@ -229,7 +229,7 @@ int intel_pch_panel_fitting(struct intel_crtc_state *crtc_state, · 228 unmodified lines
229	229	case DRM_MODE_SCALE_NONE:
230	230	WARN_ON(adjusted_mode->crtc_hdisplay != crtc_state->pipe_src_w);
231	231	WARN_ON(adjusted_mode->crtc_vdisplay != crtc_state->pipe_src_h);
232		− /* fall through */
	232	+ fallthrough;
233	233	case DRM_MODE_SCALE_FULLSCREEN:
234	234	x = y = 0;
235	235	width = adjusted_mode->crtc_hdisplay;

drivers/gpu/drm/i915/display/intel_sdvo.c+6−6

@@ -1531,7 +1531,7 @@ static void intel_sdvo_pre_enable(struct intel_atomic_state *state, · 1530 unmodified lines
1531	1531	default:
1532	1532	drm_WARN(&dev_priv->drm, 1,
1533	1533	"unknown pixel multiplier specified\n");
1534		− /* fall through */
	1534	+ fallthrough;
1535	1535	case 1: rate = SDVO_CLOCK_RATE_MULT_1X; break;
1536	1536	case 2: rate = SDVO_CLOCK_RATE_MULT_2X; break;
1537	1537	case 4: rate = SDVO_CLOCK_RATE_MULT_4X; break;
@@ -2549,19 +2549,19 @@ intel_sdvo_guess_ddc_bus(struct intel_sdvo *sdvo) · 1011 unmodified lines
2549	2549	switch (sdvo->controlled_output) {
2550	2550	case SDVO_OUTPUT_LVDS1:
2551	2551	mask \|= SDVO_OUTPUT_LVDS1;
2552		− /* fall through */
	2552	+ fallthrough;
2553	2553	case SDVO_OUTPUT_LVDS0:
2554	2554	mask \|= SDVO_OUTPUT_LVDS0;
2555		− /* fall through */
	2555	+ fallthrough;
2556	2556	case SDVO_OUTPUT_TMDS1:
2557	2557	mask \|= SDVO_OUTPUT_TMDS1;
2558		− /* fall through */
	2558	+ fallthrough;
2559	2559	case SDVO_OUTPUT_TMDS0:
2560	2560	mask \|= SDVO_OUTPUT_TMDS0;
2561		− /* fall through */
	2561	+ fallthrough;
2562	2562	case SDVO_OUTPUT_RGB1:
2563	2563	mask \|= SDVO_OUTPUT_RGB1;
2564		− /* fall through */
	2564	+ fallthrough;
2565	2565	case SDVO_OUTPUT_RGB0:
2566	2566	mask \|= SDVO_OUTPUT_RGB0;
2567	2567	break;

drivers/gpu/drm/i915/display/intel_sprite.c+11−11

@@ -2147,7 +2147,7 @@ static int skl_plane_check_fb(const struct intel_crtc_state *crtc_state, · 2146 unmodified lines
2147	2147	case DRM_FORMAT_RGB565:
2148	2148	if (INTEL_GEN(dev_priv) >= 11)
2149	2149	break;
2150		− /* fall through */
	2150	+ fallthrough;
2151	2151	case DRM_FORMAT_C8:
2152	2152	case DRM_FORMAT_XRGB16161616F:
2153	2153	case DRM_FORMAT_XBGR16161616F:
@@ -2702,7 +2702,7 @@ static bool g4x_sprite_format_mod_supported(struct drm_plane *_plane, · 548 unmodified lines
2702	2702	if (modifier == DRM_FORMAT_MOD_LINEAR \|\|
2703	2703	modifier == I915_FORMAT_MOD_X_TILED)
2704	2704	return true;
2705		− /* fall through */
	2705	+ fallthrough;
2706	2706	default:
2707	2707	return false;
2708	2708	}
@@ -2733,7 +2733,7 @@ static bool snb_sprite_format_mod_supported(struct drm_plane *_plane, · 24 unmodified lines
2733	2733	if (modifier == DRM_FORMAT_MOD_LINEAR \|\|
2734	2734	modifier == I915_FORMAT_MOD_X_TILED)
2735	2735	return true;
2736		− /* fall through */
	2736	+ fallthrough;
2737	2737	default:
2738	2738	return false;
2739	2739	}
@@ -2768,7 +2768,7 @@ static bool vlv_sprite_format_mod_supported(struct drm_plane *_plane, · 28 unmodified lines
2768	2768	if (modifier == DRM_FORMAT_MOD_LINEAR \|\|
2769	2769	modifier == I915_FORMAT_MOD_X_TILED)
2770	2770	return true;
2771		− /* fall through */
	2771	+ fallthrough;
2772	2772	default:
2773	2773	return false;
2774	2774	}
@@ -2801,7 +2801,7 @@ static bool skl_plane_format_mod_supported(struct drm_plane *_plane, · 26 unmodified lines
2801	2801	case DRM_FORMAT_ABGR8888:
2802	2802	if (is_ccs_modifier(modifier))
2803	2803	return true;
2804		− /* fall through */
	2804	+ fallthrough;
2805	2805	case DRM_FORMAT_RGB565:
2806	2806	case DRM_FORMAT_XRGB2101010:
2807	2807	case DRM_FORMAT_XBGR2101010:
@@ -2819,7 +2819,7 @@ static bool skl_plane_format_mod_supported(struct drm_plane *_plane, · 11 unmodified lines
2819	2819	case DRM_FORMAT_XVYU2101010:
2820	2820	if (modifier == I915_FORMAT_MOD_Yf_TILED)
2821	2821	return true;
2822		− /* fall through */
	2822	+ fallthrough;
2823	2823	case DRM_FORMAT_C8:
2824	2824	case DRM_FORMAT_XBGR16161616F:
2825	2825	case DRM_FORMAT_ABGR16161616F:
@@ -2834,7 +2834,7 @@ static bool skl_plane_format_mod_supported(struct drm_plane *_plane, · 8 unmodified lines
2834	2834	modifier == I915_FORMAT_MOD_X_TILED \|\|
2835	2835	modifier == I915_FORMAT_MOD_Y_TILED)
2836	2836	return true;
2837		− /* fall through */
	2837	+ fallthrough;
2838	2838	default:
2839	2839	return false;
2840	2840	}
@@ -2861,7 +2861,7 @@ static bool gen12_plane_format_mod_supported(struct drm_plane *_plane, · 20 unmodified lines
2861	2861	case I915_FORMAT_MOD_Y_TILED_GEN12_MC_CCS:
2862	2862	if (!gen12_plane_supports_mc_ccs(dev_priv, plane->id))
2863	2863	return false;
2864		− /* fall through */
	2864	+ fallthrough;
2865	2865	case DRM_FORMAT_MOD_LINEAR:
2866	2866	case I915_FORMAT_MOD_X_TILED:
2867	2867	case I915_FORMAT_MOD_Y_TILED:
@@ -2878,7 +2878,7 @@ static bool gen12_plane_format_mod_supported(struct drm_plane *_plane, · 10 unmodified lines
2878	2878	case DRM_FORMAT_ABGR8888:
2879	2879	if (is_ccs_modifier(modifier))
2880	2880	return true;
2881		− /* fall through */
	2881	+ fallthrough;
2882	2882	case DRM_FORMAT_YUYV:
2883	2883	case DRM_FORMAT_YVYU:
2884	2884	case DRM_FORMAT_UYVY:
@@ -2890,7 +2890,7 @@ static bool gen12_plane_format_mod_supported(struct drm_plane *_plane, · 5 unmodified lines
2890	2890	case DRM_FORMAT_P016:
2891	2891	if (modifier == I915_FORMAT_MOD_Y_TILED_GEN12_MC_CCS)
2892	2892	return true;
2893		− /* fall through */
	2893	+ fallthrough;
2894	2894	case DRM_FORMAT_RGB565:
2895	2895	case DRM_FORMAT_XRGB2101010:
2896	2896	case DRM_FORMAT_XBGR2101010:
@@ -2911,7 +2911,7 @@ static bool gen12_plane_format_mod_supported(struct drm_plane *_plane, · 14 unmodified lines
2911	2911	modifier == I915_FORMAT_MOD_X_TILED \|\|
2912	2912	modifier == I915_FORMAT_MOD_Y_TILED)
2913	2913	return true;
2914		− /* fall through */
	2914	+ fallthrough;
2915	2915	default:
2916	2916	return false;
2917	2917	}

drivers/gpu/drm/i915/display/intel_tc.c+1−1

@@ -159,7 +159,7 @@ int intel_tc_port_fia_max_lane_count(struct intel_digital_port *dig_port) · 158 unmodified lines
159	159	switch (lane_mask) {
160	160	default:
161	161	MISSING_CASE(lane_mask);
162		− /* fall-through */
	162	+ fallthrough;
163	163	case 0x1:
164	164	case 0x2:
165	165	case 0x4:

drivers/gpu/drm/i915/gem/i915_gem_mman.c+1−1

@@ -209,7 +209,7 @@ static vm_fault_t i915_error_to_vmf_fault(int err) · 208 unmodified lines
209	209	switch (err) {
210	210	default:
211	211	WARN_ONCE(err, "unhandled error in %s: %i\n", __func__, err);
212		− /* fallthrough */
	212	+ fallthrough;
213	213	case -EIO: /* shmemfs failure from swap device */
214	214	case -EFAULT: /* purged object */
215	215	case -ENODEV: /* bad object, how did you get here! */

drivers/gpu/drm/i915/gem/i915_gem_pages.c+1−1

@@ -276,7 +276,7 @@ static void i915_gem_object_map(struct drm_i915_gem_object obj, · 275 unmodified lines
276	276	switch (type) {
277	277	default:
278	278	MISSING_CASE(type);
279		− /* fallthrough - to use PAGE_KERNEL anyway */
	279	+ fallthrough; /* to use PAGE_KERNEL anyway */
280	280	case I915_MAP_WB:
281	281	pgprot = PAGE_KERNEL;
282	282	break;

drivers/gpu/drm/i915/gem/i915_gem_stolen.c+3−3

@@ -249,7 +249,7 @@ static void vlv_get_stolen_reserved(struct drm_i915_private *i915, · 248 unmodified lines
249	249	switch (reg_val & GEN7_STOLEN_RESERVED_SIZE_MASK) {
250	250	default:
251	251	MISSING_CASE(reg_val & GEN7_STOLEN_RESERVED_SIZE_MASK);
252		− /* fall through */
	252	+ fallthrough;
253	253	case GEN7_STOLEN_RESERVED_1M:
254	254	size = 1024 1024;
255	255	break;
@@ -416,7 +416,7 @@ static int i915_gem_init_stolen(struct drm_i915_private *i915) · 160 unmodified lines
416	416	case 4:
417	417	if (!IS_G4X(i915))
418	418	break;
419		− /* fall through */
	419	+ fallthrough;
420	420	case 5:
421	421	g4x_get_stolen_reserved(i915, uncore,
422	422	&reserved_base, &reserved_size);
@@ -445,7 +445,7 @@ static int i915_gem_init_stolen(struct drm_i915_private *i915) · 22 unmodified lines
445	445	break;
446	446	default:
447	447	MISSING_CASE(INTEL_GEN(i915));
448		− /* fall-through */
	448	+ fallthrough;
449	449	case 11:
450	450	case 12:
451	451	icl_get_stolen_reserved(i915, uncore,

drivers/gpu/drm/i915/gem/i915_gem_userptr.c+0−8

@@ -596,14 +596,6 @@ static int i915_gem_userptr_get_pages(struct drm_i915_gem_object *obj) · 595 unmodified lines
596	596	GFP_KERNEL \|
597	597	__GFP_NORETRY \|
598	598	__GFP_NOWARN);
599		− /*
600		− * Using __get_user_pages_fast() with a read-only
601		− * access is questionable. A read-only page may be
602		− * COW-broken, and then this might end up giving
603		− * the wrong side of the COW..
604		− *
605		− * We may or may not care.
606		− */
607	599	if (pvec) {
608	600	/* defer to worker if malloc fails */
609	601	if (!i915_gem_object_is_readonly(obj))

drivers/gpu/drm/i915/gt/intel_engine_cs.c+1−1

@@ -213,7 +213,7 @@ u32 intel_engine_context_size(struct intel_gt *gt, u8 class) · 212 unmodified lines
213	213	break;
214	214	default:
215	215	MISSING_CASE(class);
216		− /* fall through */
	216	+ fallthrough;
217	217	case VIDEO_DECODE_CLASS:
218	218	case VIDEO_ENHANCEMENT_CLASS:
219	219	case COPY_ENGINE_CLASS:

drivers/gpu/drm/i915/gt/intel_ggtt.c+1−1

@@ -1437,7 +1437,7 @@ i915_get_ggtt_vma_pages(struct i915_vma *vma) · 1436 unmodified lines
1437	1437	switch (vma->ggtt_view.type) {
1438	1438	default:
1439	1439	GEM_BUG_ON(vma->ggtt_view.type);
1440		− /* fall through */
	1440	+ fallthrough;
1441	1441	case I915_GGTT_VIEW_NORMAL:
1442	1442	vma->pages = vma->obj->mm.pages;
1443	1443	return 0;

drivers/gpu/drm/i915/gt/intel_ring_submission.c+1−1

@@ -100,7 +100,7 @@ static void set_hwsp(struct intel_engine_cs *engine, u32 offset) · 99 unmodified lines
100	100	*/
101	101	default:
102	102	GEM_BUG_ON(engine->id);
103		− /* fallthrough */
	103	+ fallthrough;
104	104	case RCS0:
105	105	hwsp = RENDER_HWS_PGA_GEN7;
106	106	break;

drivers/gpu/drm/i915/gvt/handlers.c+1−1

@@ -1226,7 +1226,7 @@ static int handle_g2v_notification(struct intel_vgpu *vgpu, int notification) · 1225 unmodified lines
1226	1226	switch (notification) {
1227	1227	case VGT_G2V_PPGTT_L3_PAGE_TABLE_CREATE:
1228	1228	root_entry_type = GTT_TYPE_PPGTT_ROOT_L3_ENTRY;
1229		− /* fall through */
	1229	+ fallthrough;
1230	1230	case VGT_G2V_PPGTT_L4_PAGE_TABLE_CREATE:
1231	1231	mm = intel_vgpu_get_ppgtt_mm(vgpu, root_entry_type, pdps);
1232	1232	return PTR_ERR_OR_ZERO(mm);

drivers/gpu/drm/i915/i915_gpu_error.c+1−1

@@ -1159,7 +1159,7 @@ static void engine_record_registers(struct intel_engine_coredump *ee) · 1158 unmodified lines
1159	1159	switch (engine->id) {
1160	1160	default:
1161	1161	MISSING_CASE(engine->id);
1162		− /* fall through */
	1162	+ fallthrough;
1163	1163	case RCS0:
1164	1164	mmio = RENDER_HWS_PGA_GEN7;
1165	1165	break;

drivers/gpu/drm/i915/i915_pmu.c+1−1

@@ -474,7 +474,7 @@ config_status(struct drm_i915_private *i915, u64 config) · 473 unmodified lines
474	474	if (IS_VALLEYVIEW(i915) \|\| IS_CHERRYVIEW(i915))
475	475	/* Requires a mutex for sampling! */
476	476	return -ENODEV;
477		− /* Fall-through. */
	477	+ fallthrough;
478	478	case I915_PMU_REQUESTED_FREQUENCY:
479	479	if (INTEL_GEN(i915) < 6)
480	480	return -ENODEV;

drivers/gpu/drm/imx/ipuv3-plane.c+1−1

@@ -447,7 +447,7 @@ static int ipu_plane_atomic_check(struct drm_plane *plane, · 446 unmodified lines
447	447	if (fb->pitches[1] != fb->pitches[2])
448	448	return -EINVAL;
449	449
450		− /* fall-through */
	450	+ fallthrough;
451	451	case DRM_FORMAT_NV12:
452	452	case DRM_FORMAT_NV16:
453	453	ubo = drm_plane_state_to_ubo(state);

drivers/gpu/drm/meson/meson_osd_afbcd.c+1−1

@@ -205,7 +205,7 @@ static int meson_g12a_afbcd_pixel_fmt(u64 modifier, uint32_t format) · 204 unmodified lines
205	205	/* YTR is forbidden for non XBGR formats */
206	206	if (modifier & AFBC_FORMAT_MOD_YTR)
207	207	return -EINVAL;
208		− /* fall through */
	208	+ fallthrough;
209	209	case DRM_FORMAT_XBGR8888:
210	210	case DRM_FORMAT_ABGR8888:
211	211	return MAFBC_FMT_RGBA8888;

drivers/gpu/drm/meson/meson_overlay.c+2−2

@@ -654,7 +654,7 @@ static void meson_overlay_atomic_update(struct drm_plane *plane, · 653 unmodified lines
654	654	priv->viu.vd1_addr2,
655	655	priv->viu.vd1_stride2,
656	656	priv->viu.vd1_height2);
657		− /* fallthrough */
	657	+ fallthrough;
658	658	case 2:
659	659	gem = drm_fb_cma_get_gem_obj(fb, 1);
660	660	priv->viu.vd1_addr1 = gem->paddr + fb->offsets[1];
@@ -666,7 +666,7 @@ static void meson_overlay_atomic_update(struct drm_plane *plane, · 5 unmodified lines
666	666	priv->viu.vd1_addr1,
667	667	priv->viu.vd1_stride1,
668	668	priv->viu.vd1_height1);
669		− /* fallthrough */
	669	+ fallthrough;
670	670	case 1:
671	671	gem = drm_fb_cma_get_gem_obj(fb, 0);
672	672	priv->viu.vd1_addr0 = gem->paddr + fb->offsets[0];

drivers/gpu/drm/msm/adreno/a5xx_gpu.c+2−2

@@ -59,7 +59,7 @@ static void a5xx_submit_in_rb(struct msm_gpu gpu, struct msm_gem_submit submit · 58 unmodified lines
59	59	case MSM_SUBMIT_CMD_CTX_RESTORE_BUF:
60	60	if (priv->lastctx == ctx)
61	61	break;
62		− /* fall-thru */
	62	+ fallthrough;
63	63	case MSM_SUBMIT_CMD_BUF:
64	64	/* copy commands into RB: */
65	65	obj = submit->bos[submit->cmd[i].idx].obj;
@@ -150,7 +150,7 @@ static void a5xx_submit(struct msm_gpu gpu, struct msm_gem_submit submit, · 84 unmodified lines
150	150	case MSM_SUBMIT_CMD_CTX_RESTORE_BUF:
151	151	if (priv->lastctx == ctx)
152	152	break;
153		− /* fall-thru */
	153	+ fallthrough;
154	154	case MSM_SUBMIT_CMD_BUF:
155	155	OUT_PKT7(ring, CP_INDIRECT_BUFFER_PFE, 3);
156	156	OUT_RING(ring, lower_32_bits(submit->cmd[i].iova));

drivers/gpu/drm/msm/adreno/a6xx_gmu.c+30−10

@@ -133,7 +133,7 @@ void a6xx_gmu_set_freq(struct msm_gpu gpu, struct dev_pm_opp opp) · 132 unmodified lines
133	133
134	134	if (!gmu->legacy) {
135	135	a6xx_hfi_set_freq(gmu, perf_index);
136		− icc_set_bw(gpu->icc_path, 0, MBps_to_icc(7216));
	136	+ dev_pm_opp_set_bw(&gpu->pdev->dev, opp);
137	137	pm_runtime_put(gmu->dev);
138	138	return;
139	139	}
@@ -157,11 +157,7 @@ void a6xx_gmu_set_freq(struct msm_gpu gpu, struct dev_pm_opp opp) · 17 unmodified lines
157	157	if (ret)
158	158	dev_err(gmu->dev, "GMU set GPU frequency error: %d\n", ret);
159	159
160		− /*
161		− * Eventually we will want to scale the path vote with the frequency but
162		− * for now leave it at max so that the performance is nominal.
163		− */
164		− icc_set_bw(gpu->icc_path, 0, MBps_to_icc(7216));
	160	+ dev_pm_opp_set_bw(&gpu->pdev->dev, opp);
165	161	pm_runtime_put(gmu->dev);
166	162	}
167	163
@@ -204,6 +200,16 @@ static int a6xx_gmu_start(struct a6xx_gmu *gmu) · 36 unmodified lines
204	200	{
205	201	int ret;
206	202	u32 val;
	203	+ u32 mask, reset_val;
	204	+
	205	+ val = gmu_read(gmu, REG_A6XX_GMU_CM3_DTCM_START + 0xff8);
	206	+ if (val <= 0x20010004) {
	207	+ mask = 0xffffffff;
	208	+ reset_val = 0xbabeface;
	209	+ } else {
	210	+ mask = 0x1ff;
	211	+ reset_val = 0x100;
	212	+ }
207	213
208	214	gmu_write(gmu, REG_A6XX_GMU_CM3_SYSRESET, 1);
209	215
@@ -215,7 +221,7 @@ static int a6xx_gmu_start(struct a6xx_gmu *gmu) · 5 unmodified lines
215	221	gmu_write(gmu, REG_A6XX_GMU_CM3_SYSRESET, 0);
216	222
217	223	ret = gmu_poll_timeout(gmu, REG_A6XX_GMU_CM3_FW_INIT_RESULT, val,
218		− val == 0xbabeface, 100, 10000);
	224	+ (val & mask) == reset_val, 100, 10000);
219	225
220	226	if (ret)
221	227	DRM_DEV_ERROR(gmu->dev, "GMU firmware initialization timed out\n");
@@ -602,7 +608,7 @@ static void a6xx_gmu_power_config(struct a6xx_gmu *gmu) · 380 unmodified lines
602	608	gmu_rmw(gmu, REG_A6XX_GMU_PWR_COL_INTER_FRAME_CTRL, 0,
603	609	A6XX_GMU_PWR_COL_INTER_FRAME_CTRL_IFPC_ENABLE \|
604	610	A6XX_GMU_PWR_COL_INTER_FRAME_CTRL_HM_POWER_COLLAPSE_ENABLE);
605		− /* Fall through */
	611	+ fallthrough;
606	612	case GMU_IDLE_STATE_SPTP:
607	613	gmu_write(gmu, REG_A6XX_GMU_PWR_COL_SPTPRAC_HYST,
608	614	GMU_PWR_COL_HYST);
@@ -845,10 +851,24 @@ static void a6xx_gmu_set_initial_freq(struct msm_gpu gpu, struct a6xx_gmu gmu) · 236 unmodified lines
845	851	if (IS_ERR_OR_NULL(gpu_opp))
846	852	return;
847	853
	854	+ gmu->freq = 0; /* so a6xx_gmu_set_freq() doesn't exit early */
848	855	a6xx_gmu_set_freq(gpu, gpu_opp);
849	856	dev_pm_opp_put(gpu_opp);
850	857	}
851	858
	859	+static void a6xx_gmu_set_initial_bw(struct msm_gpu gpu, struct a6xx_gmu gmu)
	860	+{
	861	+ struct dev_pm_opp *gpu_opp;
	862	+ unsigned long gpu_freq = gmu->gpu_freqs[gmu->current_perf_index];
	863	+
	864	+ gpu_opp = dev_pm_opp_find_freq_exact(&gpu->pdev->dev, gpu_freq, true);
	865	+ if (IS_ERR_OR_NULL(gpu_opp))
	866	+ return;
	867	+
	868	+ dev_pm_opp_set_bw(&gpu->pdev->dev, gpu_opp);
	869	+ dev_pm_opp_put(gpu_opp);
	870	+}
	871	+
852	872	int a6xx_gmu_resume(struct a6xx_gpu *a6xx_gpu)
853	873	{
854	874	struct adreno_gpu *adreno_gpu = &a6xx_gpu->base;
@@ -882,7 +902,7 @@ int a6xx_gmu_resume(struct a6xx_gpu *a6xx_gpu) · 27 unmodified lines
882	902	}
883	903
884	904	/* Set the bus quota to a reasonable value for boot */
885		− icc_set_bw(gpu->icc_path, 0, MBps_to_icc(3072));
	905	+ a6xx_gmu_set_initial_bw(gpu, gmu);
886	906
887	907	/* Enable the GMU interrupt */
888	908	gmu_write(gmu, REG_A6XX_GMU_AO_HOST_INTERRUPT_CLR, ~0);
@@ -1051,7 +1071,7 @@ int a6xx_gmu_stop(struct a6xx_gpu *a6xx_gpu) · 162 unmodified lines
1051	1071	a6xx_gmu_shutdown(gmu);
1052	1072
1053	1073	/* Remove the bus vote */
1054		− icc_set_bw(gpu->icc_path, 0, 0);
	1074	+ dev_pm_opp_set_bw(&gpu->pdev->dev, NULL);
1055	1075
1056	1076	/*
1057	1077	* Make sure the GX domain is off before turning off the GMU (CX)

drivers/gpu/drm/msm/adreno/a6xx_gpu.c+1−1

@@ -117,7 +117,7 @@ static void a6xx_submit(struct msm_gpu gpu, struct msm_gem_submit submit, · 116 unmodified lines
117	117	case MSM_SUBMIT_CMD_CTX_RESTORE_BUF:
118	118	if (priv->lastctx == ctx)
119	119	break;
120		− /* fall-thru */
	120	+ fallthrough;
121	121	case MSM_SUBMIT_CMD_BUF:
122	122	OUT_PKT7(ring, CP_INDIRECT_BUFFER_PFE, 3);
123	123	OUT_RING(ring, lower_32_bits(submit->cmd[i].iova));

drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c+2−1

@@ -938,7 +938,8 @@ struct msm_gpu_state a6xx_gpu_state_get(struct msm_gpu gpu) · 937 unmodified lines
938	938	msm_gem_kernel_put(dumper.bo, gpu->aspace, true);
939	939	}
940	940
941		− a6xx_get_debugbus(gpu, a6xx_state);
	941	+ if (snapshot_debugbus)
	942	+ a6xx_get_debugbus(gpu, a6xx_state);
942	943
943	944	return &a6xx_state->base;
944	945	}

drivers/gpu/drm/msm/adreno/a6xx_gpu_state.h+1−1

@@ -372,7 +372,7 @@ static const struct a6xx_indexed_registers { · 371 unmodified lines
372	372	u32 data;
373	373	u32 count;
374	374	} a6xx_indexed_reglist[] = {
375		− { "CP_SEQ_STAT", REG_A6XX_CP_SQE_STAT_ADDR,
	375	+ { "CP_SQE_STAT", REG_A6XX_CP_SQE_STAT_ADDR,
376	376	REG_A6XX_CP_SQE_STAT_DATA, 0x33 },
377	377	{ "CP_DRAW_STATE", REG_A6XX_CP_DRAW_STATE_ADDR,
378	378	REG_A6XX_CP_DRAW_STATE_DATA, 0x100 },

drivers/gpu/drm/msm/adreno/adreno_device.c+4−0

@@ -14,6 +14,10 @@ bool hang_debug = false; · 13 unmodified lines
14	14	MODULE_PARM_DESC(hang_debug, "Dump registers when hang is detected (can be slow!)");
15	15	module_param_named(hang_debug, hang_debug, bool, 0600);
16	16
	17	+bool snapshot_debugbus = false;
	18	+MODULE_PARM_DESC(snapshot_debugbus, "Include debugbus sections in GPU devcoredump (if not fused off)");
	19	+module_param_named(snapshot_debugbus, snapshot_debugbus, bool, 0600);
	20	+
17	21	static const struct adreno_info gpulist[] = {
18	22	{
19	23	.rev = ADRENO_REV(2, 0, 0, 0),

drivers/gpu/drm/msm/adreno/adreno_gpu.c+2−2

@@ -396,7 +396,7 @@ int adreno_hw_init(struct msm_gpu *gpu) · 395 unmodified lines
396	396	ring->next = ring->start;
397	397
398	398	/* reset completed fence seqno: */
399		− ring->memptrs->fence = ring->seqno;
	399	+ ring->memptrs->fence = ring->fctx->completed_fence;
400	400	ring->memptrs->rptr = 0;
401	401	}
402	402
@@ -474,7 +474,7 @@ void adreno_submit(struct msm_gpu gpu, struct msm_gem_submit submit, · 71 unmodified lines
474	474	/* ignore if there has not been a ctx switch: */
475	475	if (priv->lastctx == ctx)
476	476	break;
477		− /* fall-thru */
	477	+ fallthrough;
478	478	case MSM_SUBMIT_CMD_BUF:
479	479	OUT_PKT3(ring, adreno_is_a4xx(adreno_gpu) ?
480	480	CP_INDIRECT_BUFFER_PFE : CP_INDIRECT_BUFFER_PFD, 2);

drivers/gpu/drm/msm/adreno/adreno_gpu.h+2−0

@@ -21,6 +21,8 @@ · 20 unmodified lines
21	21	#define REG_SKIP ~0
22	22	#define REG_ADRENO_SKIP(_offset) [_offset] = REG_SKIP
23	23
	24	+extern bool snapshot_debugbus;
	25	+
24	26	/**
25	27	* adreno_regs: List of registers that are used in across all
26	28	* 3D devices. Each device type has different offset value for the same

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c+1−1

@@ -827,7 +827,7 @@ static void dpu_crtc_enable(struct drm_crtc *crtc, · 826 unmodified lines
827	827	{
828	828	struct dpu_crtc *dpu_crtc;
829	829	struct drm_encoder *encoder;
830		− bool request_bandwidth;
	830	+ bool request_bandwidth = false;
831	831
832	832	if (!crtc) {
833	833	DPU_ERROR("invalid crtc\n");

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c+11−9

@@ -599,7 +599,10 @@ static int dpu_encoder_virt_atomic_check( · 598 unmodified lines
599	599	dpu_kms = to_dpu_kms(priv->kms);
600	600	mode = &crtc_state->mode;
601	601	adj_mode = &crtc_state->adjusted_mode;
602		− global_state = dpu_kms_get_existing_global_state(dpu_kms);
	602	+ global_state = dpu_kms_get_global_state(crtc_state->state);
	603	+ if (IS_ERR(global_state))
	604	+ return PTR_ERR(global_state);
	605	+
603	606	trace_dpu_enc_atomic_check(DRMID(drm_enc));
604	607
605	608	/* perform atomic check on the first physical encoder (master) */
@@ -625,12 +628,15 @@ static int dpu_encoder_virt_atomic_check( · 19 unmodified lines
625	628	/* Reserve dynamic resources now. */
626	629	if (!ret) {
627	630	/*
628		− * Avoid reserving resources when mode set is pending. Topology
629		− * info may not be available to complete reservation.
	631	+ * Release and Allocate resources on every modeset
	632	+ * Dont allocate when active is false.
630	633	*/
631	634	if (drm_atomic_crtc_needs_modeset(crtc_state)) {
632		− ret = dpu_rm_reserve(&dpu_kms->rm, global_state,
633		− drm_enc, crtc_state, topology);
	635	+ dpu_rm_release(global_state, drm_enc);
	636	+
	637	+ if (!crtc_state->active_changed \|\| crtc_state->active)
	638	+ ret = dpu_rm_reserve(&dpu_kms->rm, global_state,
	639	+ drm_enc, crtc_state, topology);
634	640	}
635	641	}
636	642
@@ -1181,7 +1187,6 @@ static void dpu_encoder_virt_disable(struct drm_encoder *drm_enc) · 544 unmodified lines
1181	1187	struct dpu_encoder_virt *dpu_enc = NULL;
1182	1188	struct msm_drm_private *priv;
1183	1189	struct dpu_kms *dpu_kms;
1184		− struct dpu_global_state *global_state;
1185	1190	int i = 0;
1186	1191
1187	1192	if (!drm_enc) {
@@ -1200,7 +1205,6 @@ static void dpu_encoder_virt_disable(struct drm_encoder *drm_enc) · 12 unmodified lines
1200	1205
1201	1206	priv = drm_enc->dev->dev_private;
1202	1207	dpu_kms = to_dpu_kms(priv->kms);
1203		− global_state = dpu_kms_get_existing_global_state(dpu_kms);
1204	1208
1205	1209	trace_dpu_enc_disable(DRMID(drm_enc));
1206	1210
@@ -1230,8 +1234,6 @@ static void dpu_encoder_virt_disable(struct drm_encoder *drm_enc) · 23 unmodified lines
1230	1234
1231	1235	DPU_DEBUG_ENC(dpu_enc, "encoder disabled\n");
1232	1236
1233		− dpu_rm_release(global_state, drm_enc);
1234		−
1235	1237	mutex_unlock(&dpu_enc->enc_lock);
1236	1238	}
1237	1239

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c+2−2

@@ -866,9 +866,9 @@ static int dpu_plane_atomic_check(struct drm_plane *plane, · 865 unmodified lines
866	866	crtc_state = drm_atomic_get_new_crtc_state(state->state,
867	867	state->crtc);
868	868
869		− min_scale = FRAC_16_16(1, pdpu->pipe_sblk->maxdwnscale);
	869	+ min_scale = FRAC_16_16(1, pdpu->pipe_sblk->maxupscale);
870	870	ret = drm_atomic_helper_check_plane_state(state, crtc_state, min_scale,
871		− pdpu->pipe_sblk->maxupscale << 16,
	871	+ pdpu->pipe_sblk->maxdwnscale << 16,
872	872	true, true);
873	873	if (ret) {
874	874	DPU_DEBUG_PLANE(pdpu, "Check plane state failed (%d)\n", ret);

drivers/gpu/drm/msm/msm_atomic.c+36−0

@@ -27,6 +27,34 @@ int msm_atomic_prepare_fb(struct drm_plane *plane, · 26 unmodified lines
27	27	return msm_framebuffer_prepare(new_state->fb, kms->aspace);
28	28	}
29	29
	30	+/*
	31	+ * Helpers to control vblanks while we flush.. basically just to ensure
	32	+ * that vblank accounting is switched on, so we get valid seqn/timestamp
	33	+ * on pageflip events (if requested)
	34	+ */
	35	+
	36	+static void vblank_get(struct msm_kms *kms, unsigned crtc_mask)
	37	+{
	38	+ struct drm_crtc *crtc;
	39	+
	40	+ for_each_crtc_mask(kms->dev, crtc, crtc_mask) {
	41	+ if (!crtc->state->active)
	42	+ continue;
	43	+ drm_crtc_vblank_get(crtc);
	44	+ }
	45	+}
	46	+
	47	+static void vblank_put(struct msm_kms *kms, unsigned crtc_mask)
	48	+{
	49	+ struct drm_crtc *crtc;
	50	+
	51	+ for_each_crtc_mask(kms->dev, crtc, crtc_mask) {
	52	+ if (!crtc->state->active)
	53	+ continue;
	54	+ drm_crtc_vblank_put(crtc);
	55	+ }
	56	+}
	57	+
30	58	static void msm_atomic_async_commit(struct msm_kms *kms, int crtc_idx)
31	59	{
32	60	unsigned crtc_mask = BIT(crtc_idx);
@@ -44,6 +72,8 @@ static void msm_atomic_async_commit(struct msm_kms *kms, int crtc_idx) · 11 unmodified lines
44	72
45	73	kms->funcs->enable_commit(kms);
46	74
	75	+ vblank_get(kms, crtc_mask);
	76	+
47	77	/*
48	78	* Flush hardware updates:
49	79	*/
@@ -58,6 +88,8 @@ static void msm_atomic_async_commit(struct msm_kms *kms, int crtc_idx) · 8 unmodified lines
58	88	kms->funcs->wait_flush(kms, crtc_mask);
59	89	trace_msm_atomic_wait_flush_finish(crtc_mask);
60	90
	91	+ vblank_put(kms, crtc_mask);
	92	+
61	93	mutex_lock(&kms->commit_lock);
62	94	kms->funcs->complete_commit(kms, crtc_mask);
63	95	mutex_unlock(&kms->commit_lock);
@@ -221,6 +253,8 @@ void msm_atomic_commit_tail(struct drm_atomic_state *state) · 157 unmodified lines
221	253	*/
222	254	kms->pending_crtc_mask &= ~crtc_mask;
223	255
	256	+ vblank_get(kms, crtc_mask);
	257	+
224	258	/*
225	259	* Flush hardware updates:
226	260	*/
@@ -235,6 +269,8 @@ void msm_atomic_commit_tail(struct drm_atomic_state *state) · 8 unmodified lines
235	269	kms->funcs->wait_flush(kms, crtc_mask);
236	270	trace_msm_atomic_wait_flush_finish(crtc_mask);
237	271
	272	+ vblank_put(kms, crtc_mask);
	273	+
238	274	mutex_lock(&kms->commit_lock);
239	275	kms->funcs->complete_commit(kms, crtc_mask);
240	276	mutex_unlock(&kms->commit_lock);

drivers/gpu/drm/msm/msm_drv.c+8−0

@@ -1320,6 +1320,13 @@ static int msm_pdev_remove(struct platform_device *pdev) · 1319 unmodified lines
1320	1320	return 0;
1321	1321	}
1322	1322
	1323	+static void msm_pdev_shutdown(struct platform_device *pdev)
	1324	+{
	1325	+ struct drm_device *drm = platform_get_drvdata(pdev);
	1326	+
	1327	+ drm_atomic_helper_shutdown(drm);
	1328	+}
	1329	+
1323	1330	static const struct of_device_id dt_match[] = {
1324	1331	{ .compatible = "qcom,mdp4", .data = (void *)KMS_MDP4 },
1325	1332	{ .compatible = "qcom,mdss", .data = (void *)KMS_MDP5 },
@@ -1332,6 +1339,7 @@ MODULE_DEVICE_TABLE(of, dt_match); · 6 unmodified lines
1332	1339	static struct platform_driver msm_platform_driver = {
1333	1340	.probe = msm_pdev_probe,
1334	1341	.remove = msm_pdev_remove,
	1342	+ .shutdown = msm_pdev_shutdown,
1335	1343	.driver = {
1336	1344	.name = "msm",
1337	1345	.of_match_table = dt_match,

drivers/gpu/drm/msm/msm_ringbuffer.c+2−1

@@ -27,7 +27,8 @@ struct msm_ringbuffer msm_ringbuffer_new(struct msm_gpu gpu, int id, · 26 unmodified lines
27	27	ring->id = id;
28	28
29	29	ring->start = msm_gem_kernel_new(gpu->dev, MSM_GPU_RINGBUFFER_SZ,
30		− MSM_BO_WC, gpu->aspace, &ring->bo, &ring->iova);
	30	+ MSM_BO_WC \| MSM_BO_GPU_READONLY, gpu->aspace, &ring->bo,
	31	+ &ring->iova);
31	32
32	33	if (IS_ERR(ring->start)) {
33	34	ret = PTR_ERR(ring->start);

drivers/gpu/drm/nouveau/dispnv50/core507d.c+4−1

@@ -50,7 +50,10 @@ core507d_update(struct nv50_core core, u32 interlock, bool ntfy) · 49 unmodified lines
50	50	interlock[NV50_DISP_INTERLOCK_OVLY] \|
51	51	NVDEF(NV507D, UPDATE, NOT_DRIVER_FRIENDLY, FALSE) \|
52	52	NVDEF(NV507D, UPDATE, NOT_DRIVER_UNFRIENDLY, FALSE) \|
53		− NVDEF(NV507D, UPDATE, INHIBIT_INTERRUPTS, FALSE));
	53	+ NVDEF(NV507D, UPDATE, INHIBIT_INTERRUPTS, FALSE),
	54	+
	55	+ SET_NOTIFIER_CONTROL,
	56	+ NVDEF(NV507D, SET_NOTIFIER_CONTROL, NOTIFY, DISABLE));
54	57
55	58	return PUSH_KICK(push);
56	59	}

drivers/gpu/drm/nouveau/dispnv50/crcc37d.c+1−1

@@ -6,7 +6,7 @@ · 5 unmodified lines
6	6	#include "disp.h"
7	7	#include "head.h"
8	8
9		−#include <nvif/push507c.h>
	9	+#include <nvif/pushc37b.h>
10	10
11	11	#include <nvhw/class/clc37d.h>
12	12

drivers/gpu/drm/nouveau/dispnv50/disp.c+6−0

@@ -257,6 +257,12 @@ nv50_dmac_create(struct nvif_device device, struct nvif_object disp, · 256 unmodified lines
257	257	dmac->push->end = dmac->push->bgn;
258	258	dmac->max = 0x1000/4 - 1;
259	259
	260	+ /* EVO channels are affected by a HW bug where the last 12 DWORDs
	261	+ * of the push buffer aren't able to be used safely.
	262	+ */
	263	+ if (disp->oclass < GV100_DISP)
	264	+ dmac->max -= 12;
	265	+
260	266	args->pushbuf = nvif_handle(&dmac->_push.mem.object);
261	267
262	268	ret = nv50_chan_create(device, disp, oclass, head, data, size,

drivers/gpu/drm/nouveau/include/nvif/push507c.h+1−1

@@ -20,6 +20,6 @@ · 19 unmodified lines
20	20	PUSH_ASSERT(!((o) & ~DRF_SMASK(NV507C_DMA_JUMP_OFFSET)), "offset"); \
21	21	PUSH_DATA__((p), NVDEF(NV507C, DMA, OPCODE, JUMP) \| \
22	22	NVVAL(NV507C, DMA, JUMP_OFFSET, (o) >> 2), \
23		− "jump 0x%08x - %s", (u32)(o), __func__); \
	23	+ " jump 0x%08x - %s", (u32)(o), __func__); \
24	24	} while(0)
25	25	#endif

drivers/gpu/drm/omapdrm/dss/venc.c+1−1

@@ -597,7 +597,7 @@ static void venc_bridge_mode_set(struct drm_bridge *bridge, · 596 unmodified lines
597	597	switch (venc_mode) {
598	598	default:
599	599	WARN_ON_ONCE(1);
600		− /* Fall-through */
	600	+ fallthrough;
601	601	case VENC_MODE_PAL:
602	602	venc->config = &venc_config_pal_trm;
603	603	break;

drivers/gpu/drm/omapdrm/omap_crtc.c+2−1

@@ -451,11 +451,12 @@ static void omap_crtc_atomic_enable(struct drm_crtc *crtc, · 450 unmodified lines
451	451	if (omap_state->manually_updated)
452	452	return;
453	453
454		− spin_lock_irq(&crtc->dev->event_lock);
455	454	drm_crtc_vblank_on(crtc);
	455	+
456	456	ret = drm_crtc_vblank_get(crtc);
457	457	WARN_ON(ret != 0);
458	458
	459	+ spin_lock_irq(&crtc->dev->event_lock);
459	460	omap_crtc_arm_event(crtc);
460	461	spin_unlock_irq(&crtc->dev->event_lock);
461	462	}

drivers/gpu/drm/qxl/qxl_display.c+3−2

@@ -26,6 +26,7 @@ · 25 unmodified lines
26	26	#include <linux/crc32.h>
27	27	#include <linux/delay.h>
28	28
	29	+#include <drm/drm_drv.h>
29	30	#include <drm/drm_atomic.h>
30	31	#include <drm/drm_atomic_helper.h>
31	32	#include <drm/drm_gem_framebuffer_helper.h>
@@ -186,7 +187,7 @@ void qxl_display_read_client_monitors_config(struct qxl_device *qdev) · 154 unmodified lines
186	187
187	188	DRM_MODESET_LOCK_ALL_BEGIN(dev, ctx, DRM_MODESET_ACQUIRE_INTERRUPTIBLE, ret);
188	189	qxl_update_offset_props(qdev);
189		− DRM_MODESET_LOCK_ALL_END(ctx, ret);
	190	+ DRM_MODESET_LOCK_ALL_END(dev, ctx, ret);
190	191	if (!drm_helper_hpd_irq_event(dev)) {
191	192	/* notify that the monitor configuration changed, to
192	193	adjust at the arbitrary resolution */
@@ -431,7 +432,7 @@ static int qxl_framebuffer_surface_dirty(struct drm_framebuffer *fb, · 238 unmodified lines
431	432	clips, num_clips, inc, 0);
432	433
433	434	out_lock_end:
434		− DRM_MODESET_LOCK_ALL_END(ctx, ret);
	435	+ DRM_MODESET_LOCK_ALL_END(fb->dev, ctx, ret);
435	436
436	437	return 0;
437	438	}

drivers/gpu/drm/radeon/ci_dpm.c+1−1

@@ -4856,7 +4856,7 @@ static void ci_request_link_speed_change_before_state_change(struct radeon_devic · 4855 unmodified lines
4856	4856	pi->force_pcie_gen = RADEON_PCIE_GEN2;
4857	4857	if (current_link_speed == RADEON_PCIE_GEN2)
4858	4858	break;
4859		− /* fall through */
	4859	+ fallthrough;
4860	4860	case RADEON_PCIE_GEN2:
4861	4861	if (radeon_acpi_pcie_performance_request(rdev, PCIE_PERF_REQ_PECI_GEN2, false) == 0)
4862	4862	break;

drivers/gpu/drm/radeon/r300.c+2−2

@@ -820,7 +820,7 @@ static int r300_packet0_check(struct radeon_cs_parser *p, · 819 unmodified lines
820	820	((idx_value >> 21) & 0xF));
821	821	return -EINVAL;
822	822	}
823		− /* Fall through. */
	823	+ fallthrough;
824	824	case 6:
825	825	track->cb[i].cpp = 4;
826	826	break;
@@ -971,7 +971,7 @@ static int r300_packet0_check(struct radeon_cs_parser *p, · 144 unmodified lines
971	971	return -EINVAL;
972	972	}
973	973	/* The same rules apply as for DXT3/5. */
974		− /* Fall through. */
	974	+ fallthrough;
975	975	case R300_TX_FORMAT_DXT3:
976	976	case R300_TX_FORMAT_DXT5:
977	977	track->textures[i].cpp = 1;

drivers/gpu/drm/radeon/r420.c+1−1

@@ -115,7 +115,7 @@ void r420_pipes_init(struct radeon_device *rdev) · 114 unmodified lines
115	115	default:
116	116	/* force to 1 pipe */
117	117	num_pipes = 1;
118		− /* fall through */
	118	+ fallthrough;
119	119	case 1:
120	120	tmp = (0 << 1);
121	121	break;

drivers/gpu/drm/radeon/r600_cs.c+2−2

@@ -487,7 +487,7 @@ static int r600_cs_track_validate_cb(struct radeon_cs_parser *p, int i) · 486 unmodified lines
487	487	return -EINVAL;
488	488	}
489	489	}
490		− /* fall through */
	490	+ fallthrough;
491	491	case V_0280A0_CLEAR_ENABLE:
492	492	{
493	493	uint32_t block_max = G_028100_CMASK_BLOCK_MAX(track->cb_color_mask[i]);
@@ -1535,7 +1535,7 @@ static int r600_check_texture_resource(struct radeon_cs_parser *p, u32 idx, · 1041 unmodified lines
1535	1535	break;
1536	1536	case V_038000_SQ_TEX_DIM_2D_ARRAY_MSAA:
1537	1537	is_array = true;
1538		− /* fall through */
	1538	+ fallthrough;
1539	1539	case V_038000_SQ_TEX_DIM_2D_MSAA:
1540	1540	array_check.nsamples = 1 << llevel;
1541	1541	llevel = 0;

drivers/gpu/drm/radeon/radeon_display.c+1−1

@@ -933,7 +933,7 @@ static void avivo_get_fb_ref_div(unsigned nom, unsigned den, unsigned post_div, · 932 unmodified lines
933	933
934	934	/* get matching reference and feedback divider */
935	935	*ref_div = min(max(den/post_div, 1u), ref_div_max);
936		− fb_div = DIV_ROUND_CLOSEST(nom ref_div post_div, den);
	936	+ fb_div = max(nom ref_div post_div / den, 1u);
937	937
938	938	/* limit fb divider to its maximum */
939	939	if (*fb_div > fb_div_max) {

drivers/gpu/drm/radeon/radeon_uvd.c+1−1

@@ -454,7 +454,7 @@ static int radeon_uvd_validate_codec(struct radeon_cs_parser *p, · 453 unmodified lines
454	454	if (p->rdev->family >= CHIP_PALM)
455	455	return 0;
456	456
457		− /* fall through */
	457	+ fallthrough;
458	458	default:
459	459	DRM_ERROR("UVD codec not supported by hardware %d!\n",
460	460	stream_type);

drivers/gpu/drm/radeon/si_dpm.c+1−1

@@ -5744,7 +5744,7 @@ static void si_request_link_speed_change_before_state_change(struct radeon_devic · 5743 unmodified lines
5744	5744	si_pi->force_pcie_gen = RADEON_PCIE_GEN2;
5745	5745	if (current_link_speed == RADEON_PCIE_GEN2)
5746	5746	break;
5747		− /* fall through */
	5747	+ fallthrough;
5748	5748	case RADEON_PCIE_GEN2:
5749	5749	if (radeon_acpi_pcie_performance_request(rdev, PCIE_PERF_REQ_PECI_GEN2, false) == 0)
5750	5750	break;

drivers/gpu/drm/radeon/uvd_v1_0.c+1−1

@@ -219,7 +219,7 @@ done: · 218 unmodified lines
219	219	WREG32(RS_DQ_RD_RET_CONF, 0x3f);
220	220	WREG32(MC_CONFIG, 0x1f);
221	221
222		− /* fall through */
	222	+ fallthrough;
223	223	case CHIP_RV670:
224	224	case CHIP_RV635:
225	225

drivers/gpu/drm/savage/savage_state.c+5−5

@@ -306,7 +306,7 @@ static int savage_dispatch_dma_prim(drm_savage_private_t * dev_priv, · 305 unmodified lines
306	306	case SAVAGE_PRIM_TRILIST_201:
307	307	reorder = 1;
308	308	prim = SAVAGE_PRIM_TRILIST;
309		− /* fall through */
	309	+ fallthrough;
310	310	case SAVAGE_PRIM_TRILIST:
311	311	if (n % 3 != 0) {
312	312	DRM_ERROR("wrong number of vertices %u in TRILIST\n",
@@ -444,7 +444,7 @@ static int savage_dispatch_vb_prim(drm_savage_private_t * dev_priv, · 131 unmodified lines
444	444	case SAVAGE_PRIM_TRILIST_201:
445	445	reorder = 1;
446	446	prim = SAVAGE_PRIM_TRILIST;
447		− /* fall through */
	447	+ fallthrough;
448	448	case SAVAGE_PRIM_TRILIST:
449	449	if (n % 3 != 0) {
450	450	DRM_ERROR("wrong number of vertices %u in TRILIST\n",
@@ -566,7 +566,7 @@ static int savage_dispatch_dma_idx(drm_savage_private_t * dev_priv, · 115 unmodified lines
566	566	case SAVAGE_PRIM_TRILIST_201:
567	567	reorder = 1;
568	568	prim = SAVAGE_PRIM_TRILIST;
569		− /* fall through */
	569	+ fallthrough;
570	570	case SAVAGE_PRIM_TRILIST:
571	571	if (n % 3 != 0) {
572	572	DRM_ERROR("wrong number of indices %u in TRILIST\n", n);
@@ -705,7 +705,7 @@ static int savage_dispatch_vb_idx(drm_savage_private_t * dev_priv, · 132 unmodified lines
705	705	case SAVAGE_PRIM_TRILIST_201:
706	706	reorder = 1;
707	707	prim = SAVAGE_PRIM_TRILIST;
708		− /* fall through */
	708	+ fallthrough;
709	709	case SAVAGE_PRIM_TRILIST:
710	710	if (n % 3 != 0) {
711	711	DRM_ERROR("wrong number of indices %u in TRILIST\n", n);
@@ -1066,7 +1066,7 @@ int savage_bci_cmdbuf(struct drm_device dev, void data, struct drm_file *file_ · 354 unmodified lines
1066	1066	ret = -EINVAL;
1067	1067	goto done;
1068	1068	}
1069		− /* fall through */
	1069	+ fallthrough;
1070	1070	case SAVAGE_CMD_DMA_PRIM:
1071	1071	case SAVAGE_CMD_VB_PRIM:
1072	1072	if (!first_draw_cmd)

drivers/gpu/drm/sti/sti_hdmi.c+3−3

@@ -850,13 +850,13 @@ static int hdmi_audio_configure(struct sti_hdmi *hdmi) · 849 unmodified lines
850	850	switch (info->channels) {
851	851	case 8:
852	852	audio_cfg \|= HDMI_AUD_CFG_CH78_VALID;
853		− /* fall through */
	853	+ fallthrough;
854	854	case 6:
855	855	audio_cfg \|= HDMI_AUD_CFG_CH56_VALID;
856		− /* fall through */
	856	+ fallthrough;
857	857	case 4:
858	858	audio_cfg \|= HDMI_AUD_CFG_CH34_VALID \| HDMI_AUD_CFG_8CH;
859		− /* fall through */
	859	+ fallthrough;
860	860	case 2:
861	861	audio_cfg \|= HDMI_AUD_CFG_CH12_VALID;
862	862	break;

drivers/gpu/drm/sun4i/sun4i_tcon.c+2−2

@@ -195,7 +195,7 @@ void sun4i_tcon_set_status(struct sun4i_tcon *tcon, · 194 unmodified lines
195	195	switch (encoder->encoder_type) {
196	196	case DRM_MODE_ENCODER_LVDS:
197	197	is_lvds = true;
198		− /* Fallthrough */
	198	+ fallthrough;
199	199	case DRM_MODE_ENCODER_DSI:
200	200	case DRM_MODE_ENCODER_NONE:
201	201	channel = 0;
@@ -342,7 +342,7 @@ static void sun4i_tcon0_mode_set_dithering(struct sun4i_tcon *tcon, · 140 unmodified lines
342	342	/* R and B components are only 5 bits deep */
343	343	val \|= SUN4I_TCON0_FRM_CTL_MODE_R;
344	344	val \|= SUN4I_TCON0_FRM_CTL_MODE_B;
345		− /* Fall through */
	345	+ fallthrough;
346	346	case MEDIA_BUS_FMT_RGB666_1X18:
347	347	case MEDIA_BUS_FMT_RGB666_1X7X3_SPWG:
348	348	/* Fall through: enable dithering */

drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c+1−1

@@ -1024,7 +1024,7 @@ static ssize_t sun6i_dsi_transfer(struct mipi_dsi_host *host, · 1023 unmodified lines
1024	1024	ret = sun6i_dsi_dcs_read(dsi, msg);
1025	1025	break;
1026	1026	}
1027		− /* Else, fall through */
	1027	+ fallthrough;
1028	1028
1029	1029	default:
1030	1030	ret = -EINVAL;

drivers/gpu/drm/tegra/dc.c+1−1

@@ -135,7 +135,7 @@ static inline u32 compute_dda_inc(unsigned int in, unsigned int out, bool v, · 134 unmodified lines
135	135
136	136	default:
137	137	WARN_ON_ONCE(1);
138		− /* fallthrough */
	138	+ fallthrough;
139	139	case 4:
140	140	max = 4;
141	141	break;

drivers/gpu/drm/tilcdc/tilcdc_crtc.c+1−1

@@ -386,7 +386,7 @@ static void tilcdc_crtc_set_mode(struct drm_crtc *crtc) · 385 unmodified lines
386	386	case DRM_FORMAT_XBGR8888:
387	387	case DRM_FORMAT_XRGB8888:
388	388	reg \|= LCDC_V2_TFT_24BPP_UNPACK;
389		− /* fallthrough */
	389	+ fallthrough;
390	390	case DRM_FORMAT_BGR888:
391	391	case DRM_FORMAT_RGB888:
392	392	reg \|= LCDC_V2_TFT_24BPP_MODE;

drivers/gpu/drm/ttm/ttm_bo_vm.c+1−1

@@ -523,7 +523,7 @@ int ttm_bo_vm_access(struct vm_area_struct *vma, unsigned long addr, · 522 unmodified lines
523	523	if (unlikely(ret != 0))
524	524	return ret;
525	525	}
526		− /* fall through */
	526	+ fallthrough;
527	527	case TTM_PL_TT:
528	528	ret = ttm_bo_vm_access_kmap(bo, offset, buf, len, write);
529	529	break;

drivers/gpu/drm/via/via_dmablit.c+4−4

@@ -179,21 +179,21 @@ via_free_sg_info(struct pci_dev pdev, drm_via_sg_info_t vsg) · 178 unmodified lines
179	179	switch (vsg->state) {
180	180	case dr_via_device_mapped:
181	181	via_unmap_blit_from_device(pdev, vsg);
182		− /* fall through */
	182	+ fallthrough;
183	183	case dr_via_desc_pages_alloc:
184	184	for (i = 0; i < vsg->num_desc_pages; ++i) {
185	185	if (vsg->desc_pages[i] != NULL)
186	186	free_page((unsigned long)vsg->desc_pages[i]);
187	187	}
188	188	kfree(vsg->desc_pages);
189		− /* fall through */
	189	+ fallthrough;
190	190	case dr_via_pages_locked:
191	191	unpin_user_pages_dirty_lock(vsg->pages, vsg->num_pages,
192	192	(vsg->direction == DMA_FROM_DEVICE));
193		− /* fall through */
	193	+ fallthrough;
194	194	case dr_via_pages_alloc:
195	195	vfree(vsg->pages);
196		− /* fall through */
	196	+ fallthrough;
197	197	default:
198	198	vsg->state = dr_via_sg_init;
199	199	}

drivers/gpu/drm/xen/xen_drm_front.c+0−3

@@ -649,9 +649,7 @@ static void displback_changed(struct xenbus_device *xb_dev, · 648 unmodified lines
649	649
650	650	switch (backend_state) {
651	651	case XenbusStateReconfiguring:
652		− /* fall through */
653	652	case XenbusStateReconfigured:
654		− /* fall through */
655	653	case XenbusStateInitialised:
656	654	break;
657	655
@@ -701,7 +699,6 @@ static void displback_changed(struct xenbus_device *xb_dev, · 43 unmodified lines
701	699	break;
702	700
703	701	case XenbusStateUnknown:
704		− /* fall through */
705	702	case XenbusStateClosed:
706	703	if (xb_dev->state == XenbusStateClosed)
707	704	break;

drivers/gpu/drm/xen/xen_drm_front_gem.c+5−4

@@ -18,6 +18,7 @@ · 17 unmodified lines
18	18	#include <drm/drm_probe_helper.h>
19	19
20	20	#include <xen/balloon.h>
	21	+#include <xen/xen.h>
21	22
22	23	#include "xen_drm_front.h"
23	24	#include "xen_drm_front_gem.h"
@@ -99,8 +100,8 @@ static struct xen_gem_object gem_create(struct drm_device dev, size_t size) · 75 unmodified lines
99	100	* allocate ballooned pages which will be used to map
100	101	* grant references provided by the backend
101	102	*/
102		− ret = alloc_xenballooned_pages(xen_obj->num_pages,
103		− xen_obj->pages);
	103	+ ret = xen_alloc_unpopulated_pages(xen_obj->num_pages,
	104	+ xen_obj->pages);
104	105	if (ret < 0) {
105	106	DRM_ERROR("Cannot allocate %zu ballooned pages: %d\n",
106	107	xen_obj->num_pages, ret);
@@ -152,8 +153,8 @@ void xen_drm_front_gem_free_object_unlocked(struct drm_gem_object *gem_obj) · 45 unmodified lines
152	153	} else {
153	154	if (xen_obj->pages) {
154	155	if (xen_obj->be_alloc) {
155		− free_xenballooned_pages(xen_obj->num_pages,
156		− xen_obj->pages);
	156	+ xen_free_unpopulated_pages(xen_obj->num_pages,
	157	+ xen_obj->pages);
157	158	gem_free_pages_array(xen_obj);
158	159	} else {
159	160	drm_gem_put_pages(&xen_obj->base,

drivers/gpu/ipu-v3/ipu-dc.c+1−1

@@ -141,7 +141,7 @@ static int ipu_bus_format_to_map(u32 fmt) · 140 unmodified lines
141	141	switch (fmt) {
142	142	default:
143	143	WARN_ON(1);
144		− /* fall-through */
	144	+ fallthrough;
145	145	case MEDIA_BUS_FMT_RGB888_1X24:
146	146	return IPU_DC_MAP_RGB24;
147	147	case MEDIA_BUS_FMT_RGB565_1X16:

drivers/hid/hid-core.c+13−2

@@ -1597,6 +1597,17 @@ static void hid_output_field(const struct hid_device *hid, · 1596 unmodified lines
1597	1597	}
1598	1598	}
1599	1599
	1600	+/*
	1601	+ * Compute the size of a report.
	1602	+ */
	1603	+static size_t hid_compute_report_size(struct hid_report *report)
	1604	+{
	1605	+ if (report->size)
	1606	+ return ((report->size - 1) >> 3) + 1;
	1607	+
	1608	+ return 0;
	1609	+}
	1610	+
1600	1611	/*
1601	1612	* Create a report. 'data' has to be allocated using
1602	1613	* hid_alloc_report_buf() so that it has proper size.
@@ -1609,7 +1620,7 @@ void hid_output_report(struct hid_report report, __u8 data) · 6 unmodified lines
1609	1620	if (report->id > 0)
1610	1621	*data++ = report->id;
1611	1622
1612		− memset(data, 0, ((report->size - 1) >> 3) + 1);
	1623	+ memset(data, 0, hid_compute_report_size(report));
1613	1624	for (n = 0; n < report->maxfield; n++)
1614	1625	hid_output_field(report->device, report->field[n], data);
1615	1626	}
@@ -1739,7 +1750,7 @@ int hid_report_raw_event(struct hid_device hid, int type, u8 data, u32 size, · 123 unmodified lines
1739	1750	csize--;
1740	1751	}
1741	1752
1742		− rsize = ((report->size - 1) >> 3) + 1;
	1753	+ rsize = hid_compute_report_size(report);
1743	1754
1744	1755	if (report_enum->numbered && rsize >= HID_MAX_BUFFER_SIZE)
1745	1756	rsize = HID_MAX_BUFFER_SIZE - 1;

drivers/hid/hid-cougar.c+1−1

@@ -321,7 +321,7 @@ static const struct kernel_param_ops cougar_g6_is_space_ops = { · 320 unmodified lines
321	321	};
322	322	module_param_cb(g6_is_space, &cougar_g6_is_space_ops, &g6_is_space, 0644);
323	323
324		−static struct hid_device_id cougar_id_table[] = {
	324	+static const struct hid_device_id cougar_id_table[] = {
325	325	{ HID_USB_DEVICE(USB_VENDOR_ID_SOLID_YEAR,
326	326	USB_DEVICE_ID_COUGAR_500K_GAMING_KEYBOARD) },
327	327	{ HID_USB_DEVICE(USB_VENDOR_ID_SOLID_YEAR,

drivers/hid/hid-elan.c+2−0

@@ -188,6 +188,7 @@ static int elan_input_configured(struct hid_device hdev, struct hid_input hi) · 187 unmodified lines
188	188	ret = input_mt_init_slots(input, ELAN_MAX_FINGERS, INPUT_MT_POINTER);
189	189	if (ret) {
190	190	hid_err(hdev, "Failed to init elan MT slots: %d\n", ret);
	191	+ input_free_device(input);
191	192	return ret;
192	193	}
193	194
@@ -198,6 +199,7 @@ static int elan_input_configured(struct hid_device hdev, struct hid_input hi) · 4 unmodified lines
198	199	if (ret) {
199	200	hid_err(hdev, "Failed to register elan input device: %d\n",
200	201	ret);
	202	+ input_mt_destroy_slots(input);
201	203	input_free_device(input);
202	204	return ret;
203	205	}

drivers/hid/hid-ids.h+6−0

@@ -728,6 +728,9 @@ · 727 unmodified lines
728	728	#define USB_DEVICE_ID_LENOVO_TPPRODOCK 0x6067
729	729	#define USB_DEVICE_ID_LENOVO_X1_COVER 0x6085
730	730	#define USB_DEVICE_ID_LENOVO_PIXART_USB_MOUSE_608D 0x608d
	731	+#define USB_DEVICE_ID_LENOVO_PIXART_USB_MOUSE_6019 0x6019
	732	+#define USB_DEVICE_ID_LENOVO_PIXART_USB_MOUSE_602E 0x602e
	733	+#define USB_DEVICE_ID_LENOVO_PIXART_USB_MOUSE_6093 0x6093
731	734
732	735	#define USB_VENDOR_ID_LG 0x1fd2
733	736	#define USB_DEVICE_ID_LG_MULTITOUCH 0x0064
@@ -847,6 +850,7 @@ · 113 unmodified lines
847	850	#define USB_DEVICE_ID_MS_POWER_COVER 0x07da
848	851	#define USB_DEVICE_ID_MS_XBOX_ONE_S_CONTROLLER 0x02fd
849	852	#define USB_DEVICE_ID_MS_PIXART_MOUSE 0x00cb
	853	+#define USB_DEVICE_ID_8BITDO_SN30_PRO_PLUS 0x02e0
850	854
851	855	#define USB_VENDOR_ID_MOJO 0x8282
852	856	#define USB_DEVICE_ID_RETRO_ADAPTER 0x3201
@@ -1012,6 +1016,8 @@ · 159 unmodified lines
1012	1016	#define USB_DEVICE_ID_SAITEK_RAT9 0x0cfa
1013	1017	#define USB_DEVICE_ID_SAITEK_MMO7 0x0cd0
1014	1018	#define USB_DEVICE_ID_SAITEK_X52 0x075c
	1019	+#define USB_DEVICE_ID_SAITEK_X52_2 0x0255
	1020	+#define USB_DEVICE_ID_SAITEK_X52_PRO 0x0762
1015	1021
1016	1022	#define USB_VENDOR_ID_SAMSUNG 0x0419
1017	1023	#define USB_DEVICE_ID_SAMSUNG_IR_REMOTE 0x0001

drivers/hid/hid-input.c+4−0

@@ -1132,6 +1132,10 @@ static void hidinput_configure_usage(struct hid_input *hidinput, struct hid_fiel · 1131 unmodified lines
1132	1132	}
1133	1133
1134	1134	mapped:
	1135	+ /* Mapping failed, bail out */
	1136	+ if (!bit)
	1137	+ return;
	1138	+
1135	1139	if (device->driver->input_mapped &&
1136	1140	device->driver->input_mapped(device, hidinput, field, usage,
1137	1141	&bit, &max) < 0) {

drivers/hid/hid-lg-g15.c+1−1

@@ -680,7 +680,7 @@ static int lg_g15_register_led(struct lg_g15_data *g15, int i) · 679 unmodified lines
680	680	* but it does have a separate power-on (reset) value.
681	681	*/
682	682	g15->leds[i].cdev.name = "g15::power_on_backlight_val";
683		− /* fall through */
	683	+ fallthrough;
684	684	case LG_G15_KBD_BRIGHTNESS:
685	685	g15->leds[i].cdev.brightness_set_blocking =
686	686	lg_g510_kbd_led_set;

drivers/hid/hid-logitech-dj.c+1−1

@@ -844,7 +844,7 @@ static void logi_dj_recv_queue_notification(struct dj_receiver_dev *djrcv_dev, · 843 unmodified lines
844	844	workitem.type = WORKITEM_TYPE_EMPTY;
845	845	break;
846	846	}
847		− /* fall-through */
	847	+ fallthrough;
848	848	case REPORT_TYPE_NOTIF_DEVICE_UNPAIRED:
849	849	workitem.quad_id_msb =
850	850	dj_report->report_params[DEVICE_PAIRED_PARAM_EQUAD_ID_MSB];

drivers/hid/hid-macally.c+1−1

@@ -29,7 +29,7 @@ static __u8 macally_report_fixup(struct hid_device hdev, __u8 *rdesc, · 28 unmodified lines
29	29	return rdesc;
30	30	}
31	31
32		−static struct hid_device_id macally_id_table[] = {
	32	+static const struct hid_device_id macally_id_table[] = {
33	33	{ HID_USB_DEVICE(USB_VENDOR_ID_SOLID_YEAR,
34	34	USB_DEVICE_ID_MACALLY_IKEY_KEYBOARD) },
35	35	{ }

drivers/hid/hid-microsoft.c+2−3

@@ -163,16 +163,13 @@ static int ms_surface_dial_quirk(struct hid_input hi, struct hid_field field, · 162 unmodified lines
163	163	{
164	164	switch (usage->hid & HID_USAGE_PAGE) {
165	165	case 0xff070000:
166		− /* fall-through */
167	166	case HID_UP_DIGITIZER:
168	167	/* ignore those axis */
169	168	return -1;
170	169	case HID_UP_GENDESK:
171	170	switch (usage->hid) {
172	171	case HID_GD_X:
173		− /* fall-through */
174	172	case HID_GD_Y:
175		− /* fall-through */
176	173	case HID_GD_RFKILL_BTN:
177	174	/* ignore those axis */
178	175	return -1;
@@ -451,6 +448,8 @@ static const struct hid_device_id ms_devices[] = { · 272 unmodified lines
451	448	.driver_data = MS_SURFACE_DIAL },
452	449	{ HID_BLUETOOTH_DEVICE(USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_XBOX_ONE_S_CONTROLLER),
453	450	.driver_data = MS_QUIRK_FF },
	451	+ { HID_BLUETOOTH_DEVICE(USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_8BITDO_SN30_PRO_PLUS),
	452	+ .driver_data = MS_QUIRK_FF },
454	453	{ }
455	454	};
456	455	MODULE_DEVICE_TABLE(hid, ms_devices);

drivers/hid/hid-multitouch.c+2−0

@@ -856,6 +856,8 @@ static int mt_touch_input_mapping(struct hid_device hdev, struct hid_input hi, · 855 unmodified lines
856	856	code = BTN_0 + ((usage->hid - 1) & HID_USAGE);
857	857
858	858	hid_map_usage(hi, usage, bit, max, EV_KEY, code);
	859	+ if (!*bit)
	860	+ return -1;
859	861	input_set_capability(hi->input, EV_KEY, code);
860	862	return 1;
861	863

drivers/hid/hid-quirks.c+5−0

@@ -105,6 +105,9 @@ static const struct hid_device_id hid_quirks[] = { · 104 unmodified lines
105	105	{ HID_USB_DEVICE(USB_VENDOR_ID_KYE, USB_DEVICE_ID_KYE_EASYPEN_M406XE), HID_QUIRK_MULTI_INPUT },
106	106	{ HID_USB_DEVICE(USB_VENDOR_ID_KYE, USB_DEVICE_ID_PIXART_USB_OPTICAL_MOUSE_ID2), HID_QUIRK_ALWAYS_POLL },
107	107	{ HID_USB_DEVICE(USB_VENDOR_ID_LENOVO, USB_DEVICE_ID_LENOVO_PIXART_USB_MOUSE_608D), HID_QUIRK_ALWAYS_POLL },
	108	+ { HID_USB_DEVICE(USB_VENDOR_ID_LENOVO, USB_DEVICE_ID_LENOVO_PIXART_USB_MOUSE_6019), HID_QUIRK_ALWAYS_POLL },
	109	+ { HID_USB_DEVICE(USB_VENDOR_ID_LENOVO, USB_DEVICE_ID_LENOVO_PIXART_USB_MOUSE_602E), HID_QUIRK_ALWAYS_POLL },
	110	+ { HID_USB_DEVICE(USB_VENDOR_ID_LENOVO, USB_DEVICE_ID_LENOVO_PIXART_USB_MOUSE_6093), HID_QUIRK_ALWAYS_POLL },
108	111	{ HID_USB_DEVICE(USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_C007), HID_QUIRK_ALWAYS_POLL },
109	112	{ HID_USB_DEVICE(USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_C077), HID_QUIRK_ALWAYS_POLL },
110	113	{ HID_USB_DEVICE(USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_KEYBOARD_G710_PLUS), HID_QUIRK_NOGET },
@@ -147,6 +150,8 @@ static const struct hid_device_id hid_quirks[] = { · 36 unmodified lines
147	150	{ HID_USB_DEVICE(USB_VENDOR_ID_RETROUSB, USB_DEVICE_ID_RETROUSB_SNES_RETROPORT), HID_QUIRK_INCREMENT_USAGE_ON_DUPLICATE },
148	151	{ HID_USB_DEVICE(USB_VENDOR_ID_SAITEK, USB_DEVICE_ID_SAITEK_RUMBLEPAD), HID_QUIRK_BADPAD },
149	152	{ HID_USB_DEVICE(USB_VENDOR_ID_SAITEK, USB_DEVICE_ID_SAITEK_X52), HID_QUIRK_INCREMENT_USAGE_ON_DUPLICATE },
	153	+ { HID_USB_DEVICE(USB_VENDOR_ID_SAITEK, USB_DEVICE_ID_SAITEK_X52_2), HID_QUIRK_INCREMENT_USAGE_ON_DUPLICATE },
	154	+ { HID_USB_DEVICE(USB_VENDOR_ID_SAITEK, USB_DEVICE_ID_SAITEK_X52_PRO), HID_QUIRK_INCREMENT_USAGE_ON_DUPLICATE },
150	155	{ HID_USB_DEVICE(USB_VENDOR_ID_SEMICO, USB_DEVICE_ID_SEMICO_USB_KEYKOARD2), HID_QUIRK_NO_INIT_REPORTS },
151	156	{ HID_USB_DEVICE(USB_VENDOR_ID_SEMICO, USB_DEVICE_ID_SEMICO_USB_KEYKOARD), HID_QUIRK_NO_INIT_REPORTS },
152	157	{ HID_USB_DEVICE(USB_VENDOR_ID_SENNHEISER, USB_DEVICE_ID_SENNHEISER_BTD500USB), HID_QUIRK_NOGET },

drivers/hid/hid-rmi.c+0−1

@@ -428,7 +428,6 @@ static void rmi_report(struct hid_device hid, struct hid_report report) · 427 unmodified lines
428	428
429	429	switch (report->id) {
430	430	case RMI_READ_DATA_REPORT_ID:
431		− /* fall-through */
432	431	case RMI_ATTN_REPORT_ID:
433	432	return;
434	433	}

drivers/hid/hid-roccat-kone.c+1−1

@@ -780,7 +780,7 @@ static void kone_keep_values_up_to_date(struct kone_device *kone, · 779 unmodified lines
780	780	case kone_mouse_event_switch_profile:
781	781	kone->actual_dpi = kone->profiles[event->value - 1].
782	782	startup_dpi;
783		− /* fall through */
	783	+ fallthrough;
784	784	case kone_mouse_event_osd_profile:
785	785	kone->actual_profile = event->value;
786	786	break;

drivers/hid/hid-uclogic-params.c+1−1

@@ -974,7 +974,7 @@ int uclogic_params_init(struct uclogic_params *params, · 973 unmodified lines
974	974	}
975	975	break;
976	976	}
977		− /* FALL THROUGH */
	977	+ fallthrough;
978	978	case VID_PID(USB_VENDOR_ID_HUION,
979	979	USB_DEVICE_ID_HUION_TABLET):
980	980	case VID_PID(USB_VENDOR_ID_HUION,

drivers/hid/hid-wiimote-core.c+0−2

@@ -1672,7 +1672,6 @@ static ssize_t wiimote_ext_show(struct device *dev, · 1671 unmodified lines
1672	1672	case WIIMOTE_EXT_GUITAR:
1673	1673	return sprintf(buf, "guitar\n");
1674	1674	case WIIMOTE_EXT_UNKNOWN:
1675		− /* fallthrough */
1676	1675	default:
1677	1676	return sprintf(buf, "unknown\n");
1678	1677	}
@@ -1722,7 +1721,6 @@ static ssize_t wiimote_dev_show(struct device *dev, · 43 unmodified lines
1722	1721	case WIIMOTE_DEV_PENDING:
1723	1722	return sprintf(buf, "pending\n");
1724	1723	case WIIMOTE_DEV_UNKNOWN:
1725		− /* fallthrough */
1726	1724	default:
1727	1725	return sprintf(buf, "unknown\n");
1728	1726	}

drivers/hid/i2c-hid/i2c-hid-core.c+13−9

@@ -420,6 +420,19 @@ static int i2c_hid_set_power(struct i2c_client *client, int power_state) · 419 unmodified lines
420	420	dev_err(&client->dev, "failed to change power setting.\n");
421	421
422	422	set_pwr_exit:
	423	+
	424	+ /*
	425	+ * The HID over I2C specification states that if a DEVICE needs time
	426	+ * after the PWR_ON request, it should utilise CLOCK stretching.
	427	+ * However, it has been observered that the Windows driver provides a
	428	+ * 1ms sleep between the PWR_ON and RESET requests.
	429	+ * According to Goodix Windows even waits 60 ms after (other?)
	430	+ * PWR_ON requests. Testing has confirmed that several devices
	431	+ * will not work properly without a delay after a PWR_ON request.
	432	+ */
	433	+ if (!ret && power_state == I2C_HID_PWR_ON)
	434	+ msleep(60);
	435	+
423	436	return ret;
424	437	}
425	438
@@ -441,15 +454,6 @@ static int i2c_hid_hwreset(struct i2c_client *client) · 15 unmodified lines
441	454	if (ret)
442	455	goto out_unlock;
443	456
444		− /*
445		− * The HID over I2C specification states that if a DEVICE needs time
446		− * after the PWR_ON request, it should utilise CLOCK stretching.
447		− * However, it has been observered that the Windows driver provides a
448		− * 1ms sleep between the PWR_ON and RESET requests and that some devices
449		− * rely on this.
450		− */
451		− usleep_range(1000, 5000);
452		−
453	457	i2c_hid_dbg(ihid, "resetting...\n");
454	458
455	459	ret = i2c_hid_command(client, &hid_reset_cmd, NULL, 0);

drivers/hid/usbhid/hid-core.c+24−29

@@ -26,7 +26,6 @@ · 25 unmodified lines
26	26	#include <linux/wait.h>
27	27	#include <linux/workqueue.h>
28	28	#include <linux/string.h>
29		−#include <linux/timekeeping.h>
30	29
31	30	#include <linux/usb.h>
32	31
@@ -96,18 +95,6 @@ static int hid_start_in(struct hid_device *hid) · 63 unmodified lines
96	95	set_bit(HID_NO_BANDWIDTH, &usbhid->iofl);
97	96	} else {
98	97	clear_bit(HID_NO_BANDWIDTH, &usbhid->iofl);
99		−
100		− if (test_bit(HID_RESUME_RUNNING, &usbhid->iofl)) {
101		− /*
102		− * In case events are generated while nobody was
103		− * listening, some are released when the device
104		− * is re-opened. Wait 50 msec for the queue to
105		− * empty before allowing events to go through
106		− * hid.
107		− */
108		− usbhid->input_start_time =
109		− ktime_add_ms(ktime_get_coarse(), 50);
110		− }
111	98	}
112	99	}
113	100	spin_unlock_irqrestore(&usbhid->lock, flags);
@@ -293,23 +280,20 @@ static void hid_irq_in(struct urb *urb) · 179 unmodified lines
293	280	if (!test_bit(HID_OPENED, &usbhid->iofl))
294	281	break;
295	282	usbhid_mark_busy(usbhid);
296		− if (test_bit(HID_RESUME_RUNNING, &usbhid->iofl)) {
297		− if (ktime_before(ktime_get_coarse(),
298		− usbhid->input_start_time))
299		− break;
300		− clear_bit(HID_RESUME_RUNNING, &usbhid->iofl);
	283	+ if (!test_bit(HID_RESUME_RUNNING, &usbhid->iofl)) {
	284	+ hid_input_report(urb->context, HID_INPUT_REPORT,
	285	+ urb->transfer_buffer,
	286	+ urb->actual_length, 1);
	287	+ /*
	288	+ * autosuspend refused while keys are pressed
	289	+ * because most keyboards don't wake up when
	290	+ * a key is released
	291	+ */
	292	+ if (hid_check_keys_pressed(hid))
	293	+ set_bit(HID_KEYS_PRESSED, &usbhid->iofl);
	294	+ else
	295	+ clear_bit(HID_KEYS_PRESSED, &usbhid->iofl);
301	296	}
302		− hid_input_report(urb->context, HID_INPUT_REPORT,
303		− urb->transfer_buffer, urb->actual_length, 1);
304		− /*
305		− * autosuspend refused while keys are pressed
306		− * because most keyboards don't wake up when
307		− * a key is released
308		− */
309		− if (hid_check_keys_pressed(hid))
310		− set_bit(HID_KEYS_PRESSED, &usbhid->iofl);
311		− else
312		− clear_bit(HID_KEYS_PRESSED, &usbhid->iofl);
313	297	break;
314	298	case -EPIPE: /* stall */
315	299	usbhid_mark_busy(usbhid);
@@ -736,6 +720,17 @@ static int usbhid_open(struct hid_device *hid) · 420 unmodified lines
736	720
737	721	usb_autopm_put_interface(usbhid->intf);
738	722
	723	+ /*
	724	+ * In case events are generated while nobody was listening,
	725	+ * some are released when the device is re-opened.
	726	+ * Wait 50 msec for the queue to empty before allowing events
	727	+ * to go through hid.
	728	+ */
	729	+ if (res == 0)
	730	+ msleep(50);
	731	+
	732	+ clear_bit(HID_RESUME_RUNNING, &usbhid->iofl);
	733	+
739	734	Done:
740	735	mutex_unlock(&usbhid->mutex);
741	736	return res;

drivers/hid/usbhid/hiddev.c+4−1

@@ -519,12 +519,16 @@ static noinline int hiddev_ioctl_usage(struct hiddev *hiddev, unsigned int cmd, · 518 unmodified lines
519	519
520	520	switch (cmd) {
521	521	case HIDIOCGUSAGE:
	522	+ if (uref->usage_index >= field->report_count)
	523	+ goto inval;
522	524	uref->value = field->value[uref->usage_index];
523	525	if (copy_to_user(user_arg, uref, sizeof(*uref)))
524	526	goto fault;
525	527	goto goodreturn;
526	528
527	529	case HIDIOCSUSAGE:
	530	+ if (uref->usage_index >= field->report_count)
	531	+ goto inval;
528	532	field->value[uref->usage_index] = uref->value;
529	533	goto goodreturn;
530	534
@@ -781,7 +785,6 @@ static long hiddev_ioctl(struct file *file, unsigned int cmd, unsigned long arg) · 250 unmodified lines
781	785	break;
782	786
783	787	case HIDIOCGUCODE:
784		− /* fall through */
785	788	case HIDIOCGUSAGE:
786	789	case HIDIOCSUSAGE:
787	790	case HIDIOCGUSAGES:

drivers/hid/usbhid/usbhid.h+0−2

@@ -13,7 +13,6 @@ · 12 unmodified lines
13	13
14	14	#include <linux/types.h>
15	15	#include <linux/slab.h>
16		−#include <linux/ktime.h>
17	16	#include <linux/list.h>
18	17	#include <linux/mutex.h>
19	18	#include <linux/timer.h>
@@ -84,7 +83,6 @@ struct usbhid_device { · 64 unmodified lines
84	83	struct mutex mutex; /* start/stop/open/close */
85	84	spinlock_t lock; /* fifo spinlock */
86	85	unsigned long iofl; /* I/O flags (CTRL_RUNNING, OUT_RUNNING) */
87		− ktime_t input_start_time; /* When to start handling input */
88	86	struct timer_list io_retry; /* Retry timer */
89	87	unsigned long stop_retry; /* Time to give up, in jiffies */
90	88	unsigned int retry_delay; /* Delay length in ms */

drivers/hid/wacom_wac.c+16−16

@@ -341,7 +341,7 @@ static int wacom_graphire_irq(struct wacom_wac *wacom) · 340 unmodified lines
341	341
342	342	case 2: /* Mouse with wheel */
343	343	input_report_key(input, BTN_MIDDLE, data[1] & 0x04);
344		− /* fall through */
	344	+ fallthrough;
345	345
346	346	case 3: /* Mouse without wheel */
347	347	wacom->tool[0] = BTN_TOOL_MOUSE;
@@ -1201,7 +1201,7 @@ static int wacom_intuos_bt_irq(struct wacom_wac *wacom, size_t len) · 853 unmodified lines
1201	1201	case 0x04:
1202	1202	wacom_intuos_bt_process_data(wacom, data + i);
1203	1203	i += 10;
1204		− /* fall through */
	1204	+ fallthrough;
1205	1205	case 0x03:
1206	1206	wacom_intuos_bt_process_data(wacom, data + i);
1207	1207	i += 10;
@@ -2148,7 +2148,7 @@ static void wacom_wac_pad_event(struct hid_device hdev, struct hid_field field · 940 unmodified lines
2148	2148	for (i = 0; i < wacom->led.count; i++)
2149	2149	wacom_update_led(wacom, features->numbered_buttons,
2150	2150	value, i);
2151		− /* fall through*/
	2151	+ fallthrough;
2152	2152	default:
2153	2153	do_report = true;
2154	2154	break;
@@ -3602,14 +3602,14 @@ int wacom_setup_pen_input_capabilities(struct input_dev *input_dev, · 1447 unmodified lines
3602	3602	switch (features->type) {
3603	3603	case GRAPHIRE_BT:
3604	3604	__clear_bit(ABS_MISC, input_dev->absbit);
3605		− /* fall through */
	3605	+ fallthrough;
3606	3606
3607	3607	case WACOM_MO:
3608	3608	case WACOM_G4:
3609	3609	input_set_abs_params(input_dev, ABS_DISTANCE, 0,
3610	3610	features->distance_max,
3611	3611	features->distance_fuzz, 0);
3612		− /* fall through */
	3612	+ fallthrough;
3613	3613
3614	3614	case GRAPHIRE:
3615	3615	input_set_capability(input_dev, EV_REL, REL_WHEEL);
@@ -3649,7 +3649,7 @@ int wacom_setup_pen_input_capabilities(struct input_dev *input_dev, · 33 unmodified lines
3649	3649	case INTUOS4S:
3650	3650	input_set_abs_params(input_dev, ABS_Z, -900, 899, 0, 0);
3651	3651	input_abs_set_res(input_dev, ABS_Z, 287);
3652		− /* fall through */
	3652	+ fallthrough;
3653	3653
3654	3654	case INTUOS:
3655	3655	wacom_setup_intuos(wacom_wac);
@@ -3682,7 +3682,7 @@ int wacom_setup_pen_input_capabilities(struct input_dev *input_dev, · 26 unmodified lines
3682	3682	case TABLETPC:
3683	3683	case TABLETPCE:
3684	3684	__clear_bit(ABS_MISC, input_dev->absbit);
3685		− /* fall through */
	3685	+ fallthrough;
3686	3686
3687	3687	case DTUS:
3688	3688	case DTUSX:
@@ -3696,7 +3696,7 @@ int wacom_setup_pen_input_capabilities(struct input_dev *input_dev, · 7 unmodified lines
3696	3696
3697	3697	case PTU:
3698	3698	__set_bit(BTN_STYLUS2, input_dev->keybit);
3699		− /* fall through */
	3699	+ fallthrough;
3700	3700
3701	3701	case PENPARTNER:
3702	3702	__set_bit(BTN_TOOL_PEN, input_dev->keybit);
@@ -3799,7 +3799,7 @@ int wacom_setup_touch_input_capabilities(struct input_dev *input_dev, · 96 unmodified lines
3799	3799	input_abs_set_res(input_dev, ABS_MT_POSITION_X, 40);
3800	3800	input_abs_set_res(input_dev, ABS_MT_POSITION_Y, 40);
3801	3801
3802		− /* fall through */
	3802	+ fallthrough;
3803	3803
3804	3804	case INTUOS5:
3805	3805	case INTUOS5L:
@@ -3817,7 +3817,7 @@ int wacom_setup_touch_input_capabilities(struct input_dev *input_dev, · 11 unmodified lines
3817	3817	input_set_abs_params(input_dev, ABS_MT_WIDTH_MAJOR, 0, features->x_max, 0, 0);
3818	3818	input_set_abs_params(input_dev, ABS_MT_WIDTH_MINOR, 0, features->y_max, 0, 0);
3819	3819	input_set_abs_params(input_dev, ABS_MT_ORIENTATION, 0, 1, 0, 0);
3820		− /* fall through */
	3820	+ fallthrough;
3821	3821
3822	3822	case WACOM_27QHDT:
3823	3823	if (wacom_wac->shared->touch->product == 0x32C \|\|
@@ -3826,14 +3826,14 @@ int wacom_setup_touch_input_capabilities(struct input_dev *input_dev, · 2 unmodified lines
3826	3826	__set_bit(SW_MUTE_DEVICE, input_dev->swbit);
3827	3827	wacom_wac->shared->has_mute_touch_switch = true;
3828	3828	}
3829		− /* fall through */
	3829	+ fallthrough;
3830	3830
3831	3831	case MTSCREEN:
3832	3832	case MTTPC:
3833	3833	case MTTPC_B:
3834	3834	case TABLETPC2FG:
3835	3835	input_mt_init_slots(input_dev, features->touch_max, INPUT_MT_DIRECT);
3836		− /fall through /
	3836	+ fallthrough;
3837	3837
3838	3838	case TABLETPC:
3839	3839	case TABLETPCE:
@@ -3843,7 +3843,7 @@ int wacom_setup_touch_input_capabilities(struct input_dev *input_dev, · 3 unmodified lines
3843	3843	case INTUOSHT2:
3844	3844	input_dev->evbit[0] \|= BIT_MASK(EV_SW);
3845	3845	__set_bit(SW_MUTE_DEVICE, input_dev->swbit);
3846		− /* fall through */
	3846	+ fallthrough;
3847	3847
3848	3848	case BAMBOO_PT:
3849	3849	case BAMBOO_TOUCH:
@@ -4099,7 +4099,7 @@ int wacom_setup_pad_input_capabilities(struct input_dev *input_dev, · 249 unmodified lines
4099	4099
4100	4100	__set_bit(KEY_BUTTONCONFIG, input_dev->keybit);
4101	4101	__set_bit(KEY_INFO, input_dev->keybit);
4102		− /* fall through */
	4102	+ fallthrough;
4103	4103
4104	4104	case WACOM_21UX2:
4105	4105	case WACOM_BEE:
@@ -4115,7 +4115,7 @@ int wacom_setup_pad_input_capabilities(struct input_dev *input_dev, · 9 unmodified lines
4115	4115	case INTUOS3:
4116	4116	case INTUOS3L:
4117	4117	input_set_abs_params(input_dev, ABS_RY, 0, 4096, 0, 0);
4118		− /* fall through */
	4118	+ fallthrough;
4119	4119
4120	4120	case INTUOS3S:
4121	4121	input_set_abs_params(input_dev, ABS_RX, 0, 4096, 0, 0);
@@ -4139,7 +4139,7 @@ int wacom_setup_pad_input_capabilities(struct input_dev *input_dev, · 17 unmodified lines
4139	4139	* ID_INPUT_TABLET to be set.
4140	4140	*/
4141	4141	__set_bit(BTN_STYLUS, input_dev->keybit);
4142		− /* fall through */
	4142	+ fallthrough;
4143	4143
4144	4144	case INTUOS4:
4145	4145	case INTUOS4L:

drivers/hsi/clients/ssi_protocol.c+3−3

@@ -291,7 +291,7 @@ static void ssip_set_rxstate(struct ssi_protocol *ssi, unsigned int state) · 290 unmodified lines
291	291	/* CMT speech workaround */
292	292	if (atomic_read(&ssi->tx_usecnt))
293	293	break;
294		− /* Else, fall through */
	294	+ fallthrough;
295	295	case RECEIVING:
296	296	mod_timer(&ssi->keep_alive, jiffies +
297	297	msecs_to_jiffies(SSIP_KATOUT));
@@ -466,7 +466,7 @@ static void ssip_keep_alive(struct timer_list *t) · 168 unmodified lines
466	466	case SEND_READY:
467	467	if (atomic_read(&ssi->tx_usecnt) == 0)
468	468	break;
469		− /* Fall through */
	469	+ fallthrough;
470	470	/*
471	471	* Workaround for cmt-speech in that case
472	472	* we relay on audio timers.
@@ -668,7 +668,7 @@ static void ssip_rx_bootinforeq(struct hsi_client *cl, u32 cmd) · 195 unmodified lines
668	668	case ACTIVE:
669	669	dev_err(&cl->device, "Boot info req on active state\n");
670	670	ssip_error(cl);
671		− /* Fall through */
	671	+ fallthrough;
672	672	case INIT:
673	673	case HANDSHAKE:
674	674	spin_lock_bh(&ssi->lock);

drivers/hsi/controllers/omap_ssi_core.c+1−1

@@ -296,7 +296,7 @@ static int ssi_clk_event(struct notifier_block *nb, unsigned long event, · 295 unmodified lines
296	296	break;
297	297	case ABORT_RATE_CHANGE:
298	298	dev_dbg(&ssi->device, "abort rate change\n");
299		− /* Fall through */
	299	+ fallthrough;
300	300	case POST_RATE_CHANGE:
301	301	dev_dbg(&ssi->device, "post rate change (%lu -> %lu)\n",
302	302	clk_data->old_rate, clk_data->new_rate);

drivers/hv/hv_kvp.c+1−1

@@ -354,7 +354,7 @@ static void process_ib_ipinfo(void in_msg, void out_msg, int op) · 353 unmodified lines
354	354
355	355	out->body.kvp_ip_val.dhcp_enabled = in->kvp_ip_val.dhcp_enabled;
356	356
357		− /* fallthrough */
	357	+ fallthrough;
358	358
359	359	case KVP_OP_GET_IP_INFO:
360	360	utf16s_to_utf8s((wchar_t *)in->kvp_ip_val.adapter_id,

drivers/hv/hv_util.c+51−14

@@ -282,26 +282,52 @@ static struct { · 281 unmodified lines
282	282	spinlock_t lock;
283	283	} host_ts;
284	284
285		−static struct timespec64 hv_get_adj_host_time(void)
	285	+static inline u64 reftime_to_ns(u64 reftime)
286	286	{
287		− struct timespec64 ts;
288		− u64 newtime, reftime;
	287	+ return (reftime - WLTIMEDELTA) * 100;
	288	+}
	289	+
	290	+/*
	291	+ * Hard coded threshold for host timesync delay: 600 seconds
	292	+ */
	293	+static const u64 HOST_TIMESYNC_DELAY_THRESH = 600 * (u64)NSEC_PER_SEC;
	294	+
	295	+static int hv_get_adj_host_time(struct timespec64 *ts)
	296	+{
	297	+ u64 newtime, reftime, timediff_adj;
289	298	unsigned long flags;
	299	+ int ret = 0;
290	300
291	301	spin_lock_irqsave(&host_ts.lock, flags);
292	302	reftime = hv_read_reference_counter();
293		− newtime = host_ts.host_time + (reftime - host_ts.ref_time);
294		− ts = ns_to_timespec64((newtime - WLTIMEDELTA) * 100);
	303	+
	304	+ /*
	305	+ * We need to let the caller know that last update from host
	306	+ * is older than the max allowable threshold. clock_gettime()
	307	+ * and PTP ioctl do not have a documented error that we could
	308	+ * return for this specific case. Use ESTALE to report this.
	309	+ */
	310	+ timediff_adj = reftime - host_ts.ref_time;
	311	+ if (timediff_adj * 100 > HOST_TIMESYNC_DELAY_THRESH) {
	312	+ pr_warn_once("TIMESYNC IC: Stale time stamp, %llu nsecs old\n",
	313	+ (timediff_adj * 100));
	314	+ ret = -ESTALE;
	315	+ }
	316	+
	317	+ newtime = host_ts.host_time + timediff_adj;
	318	+ *ts = ns_to_timespec64(reftime_to_ns(newtime));
295	319	spin_unlock_irqrestore(&host_ts.lock, flags);
296	320
297		− return ts;
	321	+ return ret;
298	322	}
299	323
300	324	static void hv_set_host_time(struct work_struct *work)
301	325	{
302		− struct timespec64 ts = hv_get_adj_host_time();
303	326
304		− do_settimeofday64(&ts);
	327	+ struct timespec64 ts;
	328	+
	329	+ if (!hv_get_adj_host_time(&ts))
	330	+ do_settimeofday64(&ts);
305	331	}
306	332
307	333	/*
@@ -361,10 +387,23 @@ static void timesync_onchannelcallback(void *context) · 53 unmodified lines
361	387	struct ictimesync_ref_data *refdata;
362	388	u8 *time_txf_buf = util_timesynch.recv_buffer;
363	389
364		− vmbus_recvpacket(channel, time_txf_buf,
365		− HV_HYP_PAGE_SIZE, &recvlen, &requestid);
	390	+ /*
	391	+ * Drain the ring buffer and use the last packet to update
	392	+ * host_ts
	393	+ */
	394	+ while (1) {
	395	+ int ret = vmbus_recvpacket(channel, time_txf_buf,
	396	+ HV_HYP_PAGE_SIZE, &recvlen,
	397	+ &requestid);
	398	+ if (ret) {
	399	+ pr_warn_once("TimeSync IC pkt recv failed (Err: %d)\n",
	400	+ ret);
	401	+ break;
	402	+ }
	403	+
	404	+ if (!recvlen)
	405	+ break;
366	406
367		− if (recvlen > 0) {
368	407	icmsghdrp = (struct icmsg_hdr *)&time_txf_buf[
369	408	sizeof(struct vmbuspipe_hdr)];
370	409
@@ -622,9 +661,7 @@ static int hv_ptp_adjtime(struct ptp_clock_info *ptp, s64 delta) · 251 unmodified lines
622	661
623	662	static int hv_ptp_gettime(struct ptp_clock_info info, struct timespec64 ts)
624	663	{
625		− *ts = hv_get_adj_host_time();
626		−
627		− return 0;
	664	+ return hv_get_adj_host_time(ts);
628	665	}
629	666
630	667	static struct ptp_clock_info ptp_hyperv_info = {

drivers/hwmon/adt7462.c+4−4

@@ -435,7 +435,7 @@ static const char voltage_label(struct adt7462_data data, int which) · 434 unmodified lines
435	435	case 3:
436	436	return "+1.5V";
437	437	}
438		− /* fall through */
	438	+ fallthrough;
439	439	case 2:
440	440	if (!(data->pin_cfg[1] & ADT7462_PIN22_INPUT))
441	441	return "+12V3";
@@ -493,7 +493,7 @@ static const char voltage_label(struct adt7462_data data, int which) · 51 unmodified lines
493	493	case 3:
494	494	return "+1.5";
495	495	}
496		− /* fall through */
	496	+ fallthrough;
497	497	case 11:
498	498	if (data->pin_cfg[3] >> ADT7462_PIN28_SHIFT ==
499	499	ADT7462_PIN28_VOLT &&
@@ -531,7 +531,7 @@ static int voltage_multiplier(struct adt7462_data *data, int which) · 31 unmodified lines
531	531	case 3:
532	532	return 7800;
533	533	}
534		− /* fall through */
	534	+ fallthrough;
535	535	case 2:
536	536	if (!(data->pin_cfg[1] & ADT7462_PIN22_INPUT))
537	537	return 62500;
@@ -589,7 +589,7 @@ static int voltage_multiplier(struct adt7462_data *data, int which) · 51 unmodified lines
589	589	case 3:
590	590	return 7800;
591	591	}
592		− /* fall through */
	592	+ fallthrough;
593	593	case 11:
594	594	case 12:
595	595	if (data->pin_cfg[3] >> ADT7462_PIN28_SHIFT ==

drivers/hwmon/applesmc.c+16−15

@@ -753,15 +753,18 @@ static ssize_t applesmc_light_show(struct device *dev, · 752 unmodified lines
753	753	}
754	754
755	755	ret = applesmc_read_key(LIGHT_SENSOR_LEFT_KEY, buffer, data_length);
	756	+ if (ret)
	757	+ goto out;
756	758	/* newer macbooks report a single 10-bit bigendian value */
757	759	if (data_length == 10) {
758	760	left = be16_to_cpu((__be16 )(buffer + 6)) >> 2;
759	761	goto out;
760	762	}
761	763	left = buffer[2];
	764	+
	765	+ ret = applesmc_read_key(LIGHT_SENSOR_RIGHT_KEY, buffer, data_length);
762	766	if (ret)
763	767	goto out;
764		− ret = applesmc_read_key(LIGHT_SENSOR_RIGHT_KEY, buffer, data_length);
765	768	right = buffer[2];
766	769
767	770	out:
@@ -810,12 +813,11 @@ static ssize_t applesmc_show_fan_speed(struct device *dev, · 42 unmodified lines
810	813	to_index(attr));
811	814
812	815	ret = applesmc_read_key(newkey, buffer, 2);
813		− speed = ((buffer[0] << 8 \| buffer[1]) >> 2);
814		−
815	816	if (ret)
816	817	return ret;
817		− else
818		− return snprintf(sysfsbuf, PAGE_SIZE, "%u\n", speed);
	818	+
	819	+ speed = ((buffer[0] << 8 \| buffer[1]) >> 2);
	820	+ return snprintf(sysfsbuf, PAGE_SIZE, "%u\n", speed);
819	821	}
820	822
821	823	static ssize_t applesmc_store_fan_speed(struct device *dev,
@@ -851,12 +853,11 @@ static ssize_t applesmc_show_fan_manual(struct device *dev, · 29 unmodified lines
851	853	u8 buffer[2];
852	854
853	855	ret = applesmc_read_key(FANS_MANUAL, buffer, 2);
854		− manual = ((buffer[0] << 8 \| buffer[1]) >> to_index(attr)) & 0x01;
855		−
856	856	if (ret)
857	857	return ret;
858		− else
859		− return snprintf(sysfsbuf, PAGE_SIZE, "%d\n", manual);
	858	+
	859	+ manual = ((buffer[0] << 8 \| buffer[1]) >> to_index(attr)) & 0x01;
	860	+ return snprintf(sysfsbuf, PAGE_SIZE, "%d\n", manual);
860	861	}
861	862
862	863	static ssize_t applesmc_store_fan_manual(struct device *dev,
@@ -872,10 +873,11 @@ static ssize_t applesmc_store_fan_manual(struct device *dev, · 9 unmodified lines
872	873	return -EINVAL;
873	874
874	875	ret = applesmc_read_key(FANS_MANUAL, buffer, 2);
875		− val = (buffer[0] << 8 \| buffer[1]);
876	876	if (ret)
877	877	goto out;
878	878
	879	+ val = (buffer[0] << 8 \| buffer[1]);
	880	+
879	881	if (input)
880	882	val = val \| (0x01 << to_index(attr));
881	883	else
@@ -951,13 +953,12 @@ static ssize_t applesmc_key_count_show(struct device *dev, · 69 unmodified lines
951	953	u32 count;
952	954
953	955	ret = applesmc_read_key(KEY_COUNT_KEY, buffer, 4);
954		− count = ((u32)buffer[0]<<24) + ((u32)buffer[1]<<16) +
955		− ((u32)buffer[2]<<8) + buffer[3];
956		−
957	956	if (ret)
958	957	return ret;
959		− else
960		− return snprintf(sysfsbuf, PAGE_SIZE, "%d\n", count);
	958	+
	959	+ count = ((u32)buffer[0]<<24) + ((u32)buffer[1]<<16) +
	960	+ ((u32)buffer[2]<<8) + buffer[3];
	961	+ return snprintf(sysfsbuf, PAGE_SIZE, "%d\n", count);
961	962	}
962	963
963	964	static ssize_t applesmc_key_at_index_read_show(struct device *dev,

drivers/hwmon/emc1403.c+2−2

@@ -406,10 +406,10 @@ static int emc1403_probe(struct i2c_client *client, · 405 unmodified lines
406	406	switch (id->driver_data) {
407	407	case emc1404:
408	408	data->groups[2] = &emc1404_group;
409		− /* fall through */
	409	+ fallthrough;
410	410	case emc1403:
411	411	data->groups[1] = &emc1403_group;
412		− /* fall through */
	412	+ fallthrough;
413	413	case emc1402:
414	414	data->groups[0] = &emc1402_group;
415	415	}

drivers/hwmon/f71882fg.c+2−2

@@ -1285,7 +1285,7 @@ static struct f71882fg_data f71882fg_update_device(struct device dev) · 1284 unmodified lines
1285	1285	data->pwm_auto_point_pwm[nr][0] =
1286	1286	f71882fg_read8(data,
1287	1287	F71882FG_REG_POINT_PWM(nr, 0));
1288		− /* Fall through */
	1288	+ fallthrough;
1289	1289	case f71862fg:
1290	1290	data->pwm_auto_point_pwm[nr][1] =
1291	1291	f71882fg_read8(data,
@@ -2442,7 +2442,7 @@ static int f71882fg_probe(struct platform_device *pdev) · 1150 unmodified lines
2442	2442	case f71869a:
2443	2443	/* These always have signed auto point temps */
2444	2444	data->auto_point_temp_signed = 1;
2445		− /* Fall through - to select correct fan/pwm reg bank! */
	2445	+ fallthrough; /* to select correct fan/pwm reg bank! */
2446	2446	case f71889fg:
2447	2447	case f71889ed:
2448	2448	case f71889a:

drivers/hwmon/gsc-hwmon.c+1−0

@@ -172,6 +172,7 @@ gsc_hwmon_read(struct device *dev, enum hwmon_sensor_types type, u32 attr, · 171 unmodified lines
172	172	case mode_temperature:
173	173	if (tmp > 0x8000)
174	174	tmp -= 0xffff;
	175	+ tmp = 100; / convert to millidegrees celsius */
175	176	break;
176	177	case mode_voltage_raw:
177	178	tmp = clamp_val(tmp, 0, BIT(GSC_HWMON_RESOLUTION));

drivers/hwmon/hwmon-vid.c+2−2

@@ -96,7 +96,7 @@ int vid_from_reg(int val, u8 vrm) · 95 unmodified lines
96	96	val &= 0x1f;
97	97	if (val == 0x1f)
98	98	return 0;
99		− /* fall through */
	99	+ fallthrough;
100	100	case 25: /* AMD NPT 0Fh */
101	101	val &= 0x3f;
102	102	return (val < 32) ? 1550 - 25 * val
@@ -122,7 +122,7 @@ int vid_from_reg(int val, u8 vrm) · 19 unmodified lines
122	122
123	123	case 84: /* VRM 8.4 */
124	124	val &= 0x0f;
125		− /* fall through */
	125	+ fallthrough;
126	126	case 82: /* VRM 8.2 */
127	127	val &= 0x1f;
128	128	return val == 0x1f ? 0 :

drivers/hwmon/ina3221.c+1−1

@@ -352,7 +352,7 @@ static int ina3221_read_curr(struct device *dev, u32 attr, · 351 unmodified lines
352	352	if (ret)
353	353	return ret;
354	354
355		− /* fall through */
	355	+ fallthrough;
356	356	case hwmon_curr_crit:
357	357	case hwmon_curr_max:
358	358	if (!resistance_uo)

drivers/hwmon/nct6775.c+1−1

@@ -2669,7 +2669,7 @@ static void pwm_update_registers(struct nct6775_data *data, int nr) · 2668 unmodified lines
2669	2669	case thermal_cruise:
2670	2670	nct6775_write_value(data, data->REG_TARGET[nr],
2671	2671	data->target_temp[nr]);
2672		− /* fall through */
	2672	+ fallthrough;
2673	2673	default:
2674	2674	reg = nct6775_read_value(data, data->REG_FAN_MODE[nr]);
2675	2675	reg = (reg & ~data->tolerance_mask) \|

drivers/hwmon/nct7904.c+2−2

@@ -231,7 +231,7 @@ static int nct7904_read_fan(struct device *dev, u32 attr, int channel, · 230 unmodified lines
231	231	if (ret < 0)
232	232	return ret;
233	233	cnt = ((ret & 0xff00) >> 3) \| (ret & 0x1f);
234		− if (cnt == 0x1fff)
	234	+ if (cnt == 0 \|\| cnt == 0x1fff)
235	235	rpm = 0;
236	236	else
237	237	rpm = 1350000 / cnt;
@@ -243,7 +243,7 @@ static int nct7904_read_fan(struct device *dev, u32 attr, int channel, · 5 unmodified lines
243	243	if (ret < 0)
244	244	return ret;
245	245	cnt = ((ret & 0xff00) >> 3) \| (ret & 0x1f);
246		− if (cnt == 0x1fff)
	246	+ if (cnt == 0 \|\| cnt == 0x1fff)
247	247	rpm = 0;
248	248	else
249	249	rpm = 1350000 / cnt;

drivers/hwmon/occ/common.c+3−3

@@ -752,7 +752,7 @@ static int occ_setup_sensor_attrs(struct occ *occ) · 751 unmodified lines
752	752	switch (sensors->freq.version) {
753	753	case 2:
754	754	show_freq = occ_show_freq_2;
755		− /* fall through */
	755	+ fallthrough;
756	756	case 1:
757	757	num_attrs += (sensors->freq.num_sensors * 2);
758	758	break;
@@ -763,7 +763,7 @@ static int occ_setup_sensor_attrs(struct occ *occ) · 4 unmodified lines
763	763	switch (sensors->power.version) {
764	764	case 2:
765	765	show_power = occ_show_power_2;
766		− /* fall through */
	766	+ fallthrough;
767	767	case 1:
768	768	num_attrs += (sensors->power.num_sensors * 4);
769	769	break;
@@ -781,7 +781,7 @@ static int occ_setup_sensor_attrs(struct occ *occ) · 11 unmodified lines
781	781	break;
782	782	case 3:
783	783	show_caps = occ_show_caps_3;
784		− /* fall through */
	784	+ fallthrough;
785	785	case 2:
786	786	num_attrs += (sensors->caps.num_sensors * 8);
787	787	break;

drivers/hwmon/pmbus/isl68137.c+6−1

@@ -67,6 +67,7 @@ enum variants { · 66 unmodified lines
67	67	raa_dmpvr1_2rail,
68	68	raa_dmpvr2_1rail,
69	69	raa_dmpvr2_2rail,
	70	+ raa_dmpvr2_2rail_nontc,
70	71	raa_dmpvr2_3rail,
71	72	raa_dmpvr2_hv,
72	73	};
@@ -241,6 +242,10 @@ static int isl68137_probe(struct i2c_client *client, · 168 unmodified lines
241	242	info->pages = 1;
242	243	info->read_word_data = raa_dmpvr2_read_word_data;
243	244	break;
	245	+ case raa_dmpvr2_2rail_nontc:
	246	+ info->func[0] &= ~PMBUS_HAVE_TEMP;
	247	+ info->func[1] &= ~PMBUS_HAVE_TEMP;
	248	+ fallthrough;
244	249	case raa_dmpvr2_2rail:
245	250	info->pages = 2;
246	251	info->read_word_data = raa_dmpvr2_read_word_data;
@@ -304,7 +309,7 @@ static const struct i2c_device_id raa_dmpvr_id[] = { · 57 unmodified lines
304	309	{"raa228000", raa_dmpvr2_hv},
305	310	{"raa228004", raa_dmpvr2_hv},
306	311	{"raa228006", raa_dmpvr2_hv},
307		− {"raa228228", raa_dmpvr2_2rail},
	312	+ {"raa228228", raa_dmpvr2_2rail_nontc},
308	313	{"raa229001", raa_dmpvr2_2rail},
309	314	{"raa229004", raa_dmpvr2_2rail},
310	315	{}

drivers/hwmon/w83627hf.c+1−1

@@ -1213,7 +1213,7 @@ temp_type_store(struct device dev, struct device_attribute devattr, · 1212 unmodified lines
1213	1213	case W83781D_DEFAULT_BETA:
1214	1214	dev_warn(dev, "Sensor type %d is deprecated, please use 4 "
1215	1215	"instead\n", W83781D_DEFAULT_BETA);
1216		− /* fall through */
	1216	+ fallthrough;
1217	1217	case 4: /* thermistor */
1218	1218	tmp = w83627hf_read_value(data, W83781D_REG_SCFG1);
1219	1219	w83627hf_write_value(data, W83781D_REG_SCFG1,

drivers/hwmon/w83781d.c+1−1

@@ -814,7 +814,7 @@ store_sensor(struct device dev, struct device_attribute da, · 813 unmodified lines
814	814	dev_warn(dev,
815	815	"Sensor type %d is deprecated, please use 4 instead\n",
816	816	W83781D_DEFAULT_BETA);
817		− /* fall through */
	817	+ fallthrough;
818	818	case 4: /* thermistor */
819	819	tmp = w83781d_read_value(data, W83781D_REG_SCFG1);
820	820	w83781d_write_value(data, W83781D_REG_SCFG1,

drivers/hwmon/w83795.c+1−1

@@ -2127,7 +2127,7 @@ static void w83795_apply_temp_config(struct w83795_data *data, u8 config, · 2126 unmodified lines
2127	2127	if (temp_chan >= 4)
2128	2128	break;
2129	2129	data->temp_mode \|= 1 << temp_chan;
2130		− /* fall through */
	2130	+ fallthrough;
2131	2131	case 0x3: /* Thermistor */
2132	2132	data->has_temp \|= 1 << temp_chan;
2133	2133	break;

drivers/hwtracing/coresight/coresight-cpu-debug.c+2−2

@@ -346,10 +346,10 @@ static void debug_init_arch_data(void *info) · 345 unmodified lines
346	346	switch (mode) {
347	347	case EDDEVID_IMPL_FULL:
348	348	drvdata->edvidsr_present = true;
349		− /* Fall through */
	349	+ fallthrough;
350	350	case EDDEVID_IMPL_EDPCSR_EDCIDSR:
351	351	drvdata->edcidsr_present = true;
352		− /* Fall through */
	352	+ fallthrough;
353	353	case EDDEVID_IMPL_EDPCSR:
354	354	/*
355	355	* In ARM DDI 0487A.k, the EDDEVID1.PCSROffset is used to

drivers/hwtracing/coresight/coresight-etm4x.c+0−1

@@ -1382,7 +1382,6 @@ static int etm4_cpu_pm_notify(struct notifier_block *nb, unsigned long cmd, · 1381 unmodified lines
1382	1382	return NOTIFY_BAD;
1383	1383	break;
1384	1384	case CPU_PM_EXIT:
1385		− /* fallthrough */
1386	1385	case CPU_PM_ENTER_FAILED:
1387	1386	if (drvdata->state_needs_restore)
1388	1387	etm4_cpu_restore(drvdata);

drivers/hwtracing/coresight/coresight-tmc.c+0−2

@@ -84,9 +84,7 @@ u32 tmc_get_memwidth_mask(struct tmc_drvdata *drvdata) · 83 unmodified lines
84	84	*/
85	85	switch (drvdata->memwidth) {
86	86	case TMC_MEM_INTF_WIDTH_32BITS:
87		− /* fallthrough */
88	87	case TMC_MEM_INTF_WIDTH_64BITS:
89		− /* fallthrough */
90	88	case TMC_MEM_INTF_WIDTH_128BITS:
91	89	mask = GENMASK(31, 4);
92	90	break;

drivers/hwtracing/intel_th/sth.c+2−2

@@ -84,11 +84,11 @@ static ssize_t notrace sth_stm_packet(struct stm_data *stm_data, · 83 unmodified lines
84	84	/* Global packets (GERR, XSYNC, TRIG) are sent with register writes */
85	85	case STP_PACKET_GERR:
86	86	reg += 4;
87		− /* fall through */
	87	+ fallthrough;
88	88
89	89	case STP_PACKET_XSYNC:
90	90	reg += 8;
91		− /* fall through */
	91	+ fallthrough;
92	92
93	93	case STP_PACKET_TRIG:
94	94	if (flags & STP_PACKET_TIMESTAMPED)

drivers/i2c/busses/i2c-bcm-iproc.c+2−2

@@ -720,7 +720,7 @@ static int bcm_iproc_i2c_xfer_internal(struct bcm_iproc_i2c_dev *iproc_i2c, · 719 unmodified lines
720	720
721	721	/* mark the last byte */
722	722	if (!process_call && (i == msg->len - 1))
723		− val \|= 1 << M_TX_WR_STATUS_SHIFT;
	723	+ val \|= BIT(M_TX_WR_STATUS_SHIFT);
724	724
725	725	iproc_i2c_wr_reg(iproc_i2c, M_TX_OFFSET, val);
726	726	}
@@ -738,7 +738,7 @@ static int bcm_iproc_i2c_xfer_internal(struct bcm_iproc_i2c_dev *iproc_i2c, · 11 unmodified lines
738	738	*/
739	739	addr = i2c_8bit_addr_from_msg(msg);
740	740	/* mark it the last byte out */
741		− val = addr \| (1 << M_TX_WR_STATUS_SHIFT);
	741	+ val = addr \| BIT(M_TX_WR_STATUS_SHIFT);
742	742	iproc_i2c_wr_reg(iproc_i2c, M_TX_OFFSET, val);
743	743	}
744	744

drivers/i2c/busses/i2c-omap.c+0−1

@@ -1425,7 +1425,6 @@ omap_i2c_probe(struct platform_device *pdev) · 1424 unmodified lines
1425	1425	major = OMAP_I2C_REV_SCHEME_0_MAJOR(omap->rev);
1426	1426	break;
1427	1427	case OMAP_I2C_SCHEME_1:
1428		− /* FALLTHROUGH */
1429	1428	default:
1430	1429	omap->regs = (u8 *)reg_map_ip_v2;
1431	1430	rev = (rev << 16) \|

drivers/i2c/busses/i2c-opal.c+1−1

@@ -125,7 +125,7 @@ static int i2c_opal_smbus_xfer(struct i2c_adapter *adap, u16 addr, · 124 unmodified lines
125	125	case I2C_SMBUS_BYTE:
126	126	req.buffer_ra = cpu_to_be64(__pa(&data->byte));
127	127	req.size = cpu_to_be32(1);
128		− /* Fall through */
	128	+ fallthrough;
129	129	case I2C_SMBUS_QUICK:
130	130	req.type = (read_write == I2C_SMBUS_READ) ?
131	131	OPAL_I2C_RAW_READ : OPAL_I2C_RAW_WRITE;

drivers/i2c/busses/i2c-rcar.c+1−0

@@ -590,6 +590,7 @@ static bool rcar_i2c_slave_irq(struct rcar_i2c_priv *priv) · 589 unmodified lines
590	590	/* master sent stop */
591	591	if (ssr_filtered & SSR) {
592	592	i2c_slave_event(priv->slave, I2C_SLAVE_STOP, &value);
	593	+ rcar_i2c_write(priv, ICSCR, SIE \| SDBS); /* clear our NACK */
593	594	rcar_i2c_write(priv, ICSIER, SAR);
594	595	rcar_i2c_write(priv, ICSSR, ~SSR & 0xff);
595	596	}

drivers/i2c/i2c-core-acpi.c+0−10

@@ -276,16 +276,6 @@ void i2c_acpi_register_devices(struct i2c_adapter *adap) · 275 unmodified lines
276	276	dev_warn(&adap->dev, "failed to enumerate I2C slaves\n");
277	277	}
278	278
279		−const struct acpi_device_id *
280		−i2c_acpi_match_device(const struct acpi_device_id *matches,
281		− struct i2c_client *client)
282		−{
283		− if (!(client && matches))
284		− return NULL;
285		−
286		− return acpi_match_device(matches, &client->dev);
287		−}
288		−
289	279	static const struct acpi_device_id i2c_acpi_force_400khz_device_ids[] = {
290	280	/*
291	281	* These Silead touchscreen controllers only work at 400KHz, for

drivers/i2c/i2c-core-base.c+1−1

@@ -480,7 +480,7 @@ static int i2c_device_probe(struct device *dev) · 479 unmodified lines
480	480	* or ACPI ID table is supplied for the probing device.
481	481	*/
482	482	if (!driver->id_table &&
483		− !i2c_acpi_match_device(dev->driver->acpi_match_table, client) &&
	483	+ !acpi_driver_match_device(dev, dev->driver) &&
484	484	!i2c_of_match_device(dev->driver->of_match_table, client)) {
485	485	status = -ENODEV;
486	486	goto put_sync_adapter;

drivers/i2c/i2c-core.h+0−9

@@ -59,20 +59,11 @@ static inline int __i2c_check_suspended(struct i2c_adapter *adap) · 58 unmodified lines
59	59	}
60	60
61	61	#ifdef CONFIG_ACPI
62		−const struct acpi_device_id *
63		−i2c_acpi_match_device(const struct acpi_device_id *matches,
64		− struct i2c_client *client);
65	62	void i2c_acpi_register_devices(struct i2c_adapter *adap);
66	63
67	64	int i2c_acpi_get_irq(struct i2c_client *client);
68	65	#else /* CONFIG_ACPI */
69	66	static inline void i2c_acpi_register_devices(struct i2c_adapter *adap) { }
70		−static inline const struct acpi_device_id *
71		−i2c_acpi_match_device(const struct acpi_device_id *matches,
72		− struct i2c_client *client)
73		−{
74		− return NULL;
75		−}
76	67
77	68	static inline int i2c_acpi_get_irq(struct i2c_client *client)
78	69	{

drivers/i3c/master/dw-i3c-master.c+1−1

@@ -603,7 +603,7 @@ static int dw_i3c_master_bus_init(struct i3c_master_controller *m) · 602 unmodified lines
603	603	ret = dw_i2c_clk_cfg(master);
604	604	if (ret)
605	605	return ret;
606		− /* fall through */
	606	+ fallthrough;
607	607	case I3C_BUS_MODE_PURE:
608	608	ret = dw_i3c_clk_cfg(master);
609	609	if (ret)

drivers/ide/hpt366.c+3−3

@@ -575,14 +575,14 @@ static u8 hpt3xx_udma_filter(ide_drive_t *drive) · 574 unmodified lines
575	575	if (!HPT370_ALLOW_ATA100_5 \|\|
576	576	check_in_drive_list(drive, bad_ata100_5))
577	577	return ATA_UDMA4;
578		− /* fall through */
	578	+ fallthrough;
579	579	case HPT372 :
580	580	case HPT372A:
581	581	case HPT372N:
582	582	case HPT374 :
583	583	if (ata_id_is_sata(drive->id))
584	584	mask &= ~0x0e;
585		− /* fall through */
	585	+ fallthrough;
586	586	default:
587	587	return mask;
588	588	}
@@ -602,7 +602,7 @@ static u8 hpt3xx_mdma_filter(ide_drive_t *drive) · 13 unmodified lines
602	602	case HPT374 :
603	603	if (ata_id_is_sata(drive->id))
604	604	return 0x00;
605		− /* fall through */
	605	+ fallthrough;
606	606	default:
607	607	return 0x07;
608	608	}

drivers/ide/ide-cd.c+2−2

@@ -350,7 +350,7 @@ static int cdrom_decode_status(ide_drive_t *drive, u8 stat) · 349 unmodified lines
350	350	*/
351	351	if (scsi_req(rq)->cmd[0] == GPCMD_START_STOP_UNIT)
352	352	break;
353		− /* fall-through */
	353	+ fallthrough;
354	354	case DATA_PROTECT:
355	355	/*
356	356	* No point in retrying after an illegal request or data
@@ -750,7 +750,7 @@ static ide_startstop_t cdrom_newpc_intr(ide_drive_t *drive) · 393 unmodified lines
750	750	case REQ_OP_DRV_IN:
751	751	case REQ_OP_DRV_OUT:
752	752	expiry = ide_cd_expiry;
753		− /FALLTHRU/
	753	+ fallthrough;
754	754	default:
755	755	timeout = ATAPI_WAIT_PC;
756	756	break;

drivers/ide/ide-floppy.c+1−1

@@ -428,7 +428,7 @@ static int ide_floppy_get_capacity(ide_drive_t *drive) · 427 unmodified lines
428	428	* (maintains previous driver behaviour)
429	429	*/
430	430	break;
431		− /* fall through */
	431	+ fallthrough;
432	432	case CAPACITY_CURRENT:
433	433	/* Normal Zip/LS-120 disks */
434	434	if (memcmp(cap_desc, &floppy->cap_desc, 8))

drivers/ide/ide-probe.c+1−1

@@ -143,7 +143,7 @@ static void ide_classify_atapi_dev(ide_drive_t *drive) · 142 unmodified lines
143	143	}
144	144	/* Early cdrom models used zero */
145	145	type = ide_cdrom;
146		− /* fall through */
	146	+ fallthrough;
147	147	case ide_cdrom:
148	148	drive->dev_flags \|= IDE_DFLAG_REMOVABLE;
149	149	#ifdef CONFIG_PPC

drivers/ide/ide-taskfile.c+6−6

@@ -129,7 +129,7 @@ ide_startstop_t do_rw_taskfile(ide_drive_t drive, struct ide_cmd orig_cmd) · 128 unmodified lines
129	129	return pre_task_out_intr(drive, cmd);
130	130	}
131	131	handler = task_pio_intr;
132		− /* fall through */
	132	+ fallthrough;
133	133	case ATA_PROT_NODATA:
134	134	if (handler == NULL)
135	135	handler = task_no_data_intr;
@@ -141,7 +141,7 @@ ide_startstop_t do_rw_taskfile(ide_drive_t drive, struct ide_cmd orig_cmd) · 5 unmodified lines
141	141	hwif->expiry = dma_ops->dma_timer_expiry;
142	142	ide_execute_command(drive, cmd, ide_dma_intr, 2 * WAIT_CMD);
143	143	dma_ops->dma_start(drive);
144		− /* fall through */
	144	+ fallthrough;
145	145	default:
146	146	return ide_started;
147	147	}
@@ -579,10 +579,10 @@ int ide_taskfile_ioctl(ide_drive_t *drive, unsigned long arg) · 431 unmodified lines
579	579	goto abort;
580	580	}
581	581	cmd.tf_flags \|= IDE_TFLAG_MULTI_PIO;
582		− /* fall through */
	582	+ fallthrough;
583	583	case TASKFILE_OUT:
584	584	cmd.protocol = ATA_PROT_PIO;
585		− /* fall through */
	585	+ fallthrough;
586	586	case TASKFILE_OUT_DMAQ:
587	587	case TASKFILE_OUT_DMA:
588	588	cmd.tf_flags \|= IDE_TFLAG_WRITE;
@@ -598,10 +598,10 @@ int ide_taskfile_ioctl(ide_drive_t *drive, unsigned long arg) · 9 unmodified lines
598	598	goto abort;
599	599	}
600	600	cmd.tf_flags \|= IDE_TFLAG_MULTI_PIO;
601		− /* fall through */
	601	+ fallthrough;
602	602	case TASKFILE_IN:
603	603	cmd.protocol = ATA_PROT_PIO;
604		− /* fall through */
	604	+ fallthrough;
605	605	case TASKFILE_IN_DMAQ:
606	606	case TASKFILE_IN_DMA:
607	607	nsect = taskin / SECTOR_SIZE;

drivers/ide/sis5513.c+1−1

@@ -494,7 +494,7 @@ static int init_chipset_sis5513(struct pci_dev *dev) · 493 unmodified lines
494	494	pci_read_config_byte(dev, 0x09, &reg);
495	495	if ((reg & 0x0f) != 0x00)
496	496	pci_write_config_byte(dev, 0x09, reg&0xf0);
497		− /* fall through */
	497	+ fallthrough;
498	498	case ATA_16:
499	499	/* force per drive recovery and active timings
500	500	needed on ATA_33 and below chips */

drivers/idle/intel_idle.c+0−16

@@ -89,14 +89,6 @@ static unsigned int mwait_substates __initdata; · 88 unmodified lines
89	89	*/
90	90	#define CPUIDLE_FLAG_ALWAYS_ENABLE BIT(15)
91	91
92		−/*
93		− * Set this flag for states where the HW flushes the TLB for us
94		− * and so we don't need cross-calls to keep it consistent.
95		− * If this flag is set, SW flushes the TLB, so even if the
96		− * HW doesn't do the flushing, this flag is safe to use.
97		− */
98		−#define CPUIDLE_FLAG_TLB_FLUSHED BIT(16)
99		−
100	92	/*
101	93	* MWAIT takes an 8-bit "hint" in EAX "suggesting"
102	94	* the C-state (top nibble) and sub-state (bottom nibble)
@@ -131,14 +123,6 @@ static __cpuidle int intel_idle(struct cpuidle_device *dev, · 28 unmodified lines
131	123	unsigned long eax = flg2MWAIT(state->flags);
132	124	unsigned long ecx = 1; /* break on interrupt flag */
133	125	bool tick;
134		− int cpu = smp_processor_id();
135		−
136		− /*
137		− * leave_mm() to avoid costly and often unnecessary wakeups
138		− * for flushing the user TLB's associated with the active mm.
139		− */
140		− if (state->flags & CPUIDLE_FLAG_TLB_FLUSHED)
141		− leave_mm(cpu);
142	126
143	127	if (!static_cpu_has(X86_FEATURE_ARAT)) {
144	128	/*

drivers/iio/accel/mma8452.c+1−1

@@ -1580,7 +1580,7 @@ static int mma8452_probe(struct i2c_client *client, · 1579 unmodified lines
1580	1580	case FXLS8471_DEVICE_ID:
1581	1581	if (ret == data->chip_info->chip_id)
1582	1582	break;
1583		− /* fall through */
	1583	+ fallthrough;
1584	1584	default:
1585	1585	ret = -ENODEV;
1586	1586	goto disable_regulators;

drivers/iio/adc/ab8500-gpadc.c+1−1

@@ -484,7 +484,7 @@ static int ab8500_gpadc_read(struct ab8500_gpadc *gpadc, · 483 unmodified lines
484	484	delay_max = 10000; /* large range optimises sleepmode */
485	485	break;
486	486	}
487		− /* Fall through */
	487	+ fallthrough;
488	488	default:
489	489	ctrl1 \|= AB8500_GPADC_CTRL1_BUF_ENA;
490	490	break;

drivers/iio/adc/cpcap-adc.c+1−1

@@ -690,7 +690,7 @@ static void cpcap_adc_phase(struct cpcap_adc_request *req) · 689 unmodified lines
690	690	break;
691	691	case CPCAP_ADC_BATTI_PI17:
692	692	index = req->bank_index;
693		− /* fallthrough */
	693	+ fallthrough;
694	694	default:
695	695	req->result += conv_tbl[index].cal_offset;
696	696	req->result += conv_tbl[index].align_offset;

drivers/iio/chemical/sps30.c+1−1

@@ -118,7 +118,7 @@ static int sps30_do_cmd(struct sps30_state state, u16 cmd, u8 data, int size) · 117 unmodified lines
118	118	case SPS30_READ_AUTO_CLEANING_PERIOD:
119	119	buf[0] = SPS30_AUTO_CLEANING_PERIOD >> 8;
120	120	buf[1] = (u8)(SPS30_AUTO_CLEANING_PERIOD & 0xff);
121		− /* fall through */
	121	+ fallthrough;
122	122	case SPS30_READ_DATA_READY_FLAG:
123	123	case SPS30_READ_DATA:
124	124	case SPS30_READ_SERIAL:

drivers/iio/dac/ad5592r-base.c+0−2

@@ -220,7 +220,6 @@ static int ad5592r_set_channel_modes(struct ad5592r_state *st) · 219 unmodified lines
220	220	break;
221	221
222	222	case CH_MODE_UNUSED:
223		− /* fall-through */
224	223	default:
225	224	switch (st->channel_offstate[i]) {
226	225	case CH_OFFSTATE_OUT_TRISTATE:
@@ -237,7 +236,6 @@ static int ad5592r_set_channel_modes(struct ad5592r_state *st) · 10 unmodified lines
237	236	break;
238	237
239	238	case CH_OFFSTATE_PULLDOWN:
240		− /* fall-through */
241	239	default:
242	240	pulldown \|= BIT(i);
243	241	break;

drivers/iio/dac/dpot-dac.c+3−2

@@ -74,11 +74,12 @@ static int dpot_dac_read_raw(struct iio_dev *indio_dev, · 73 unmodified lines
74	74	case IIO_VAL_INT:
75	75	/*
76	76	* Convert integer scale to fractional scale by
77		− * setting the denominator (val2) to one, and...
	77	+ * setting the denominator (val2) to one...
78	78	*/
79	79	*val2 = 1;
80	80	ret = IIO_VAL_FRACTIONAL;
81		− /* fall through */
	81	+ /* ...and fall through. Say it again for GCC. */
	82	+ fallthrough;
82	83	case IIO_VAL_FRACTIONAL:
83	84	val = regulator_get_voltage(dac->vref) / 1000;
84	85	val2 = dac->max_ohms;

drivers/iio/health/max30102.c+2−2

@@ -273,10 +273,10 @@ static int max30102_read_measurement(struct max30102_data *data, · 272 unmodified lines
273	273	switch (measurements) {
274	274	case 3:
275	275	MAX30102_COPY_DATA(2);
276		− /* fall through */
	276	+ fallthrough;
277	277	case 2:
278	278	MAX30102_COPY_DATA(1);
279		− /* fall through */
	279	+ fallthrough;
280	280	case 1:
281	281	MAX30102_COPY_DATA(0);
282	282	break;

drivers/iio/imu/adis.c+3−3

@@ -97,11 +97,11 @@ int __adis_write_reg(struct adis *adis, unsigned int reg, · 96 unmodified lines
97	97	adis->tx[9] = (value >> 24) & 0xff;
98	98	adis->tx[6] = ADIS_WRITE_REG(reg + 2);
99	99	adis->tx[7] = (value >> 16) & 0xff;
100		− /* fall through */
	100	+ fallthrough;
101	101	case 2:
102	102	adis->tx[4] = ADIS_WRITE_REG(reg + 1);
103	103	adis->tx[5] = (value >> 8) & 0xff;
104		− /* fall through */
	104	+ fallthrough;
105	105	case 1:
106	106	adis->tx[2] = ADIS_WRITE_REG(reg);
107	107	adis->tx[3] = value & 0xff;
@@ -191,7 +191,7 @@ int __adis_read_reg(struct adis *adis, unsigned int reg, · 83 unmodified lines
191	191	adis->tx[2] = ADIS_READ_REG(reg + 2);
192	192	adis->tx[3] = 0;
193	193	spi_message_add_tail(&xfers[1], &msg);
194		− /* fall through */
	194	+ fallthrough;
195	195	case 2:
196	196	adis->tx[4] = ADIS_READ_REG(reg);
197	197	adis->tx[5] = 0;

drivers/iio/industrialio-core.c+2−2

@@ -599,7 +599,7 @@ static ssize_t __iio_format_value(char *buf, size_t len, unsigned int type, · 598 unmodified lines
599	599	return scnprintf(buf, len, "%d", vals[0]);
600	600	case IIO_VAL_INT_PLUS_MICRO_DB:
601	601	scale_db = true;
602		− /* fall through */
	602	+ fallthrough;
603	603	case IIO_VAL_INT_PLUS_MICRO:
604	604	if (vals[1] < 0)
605	605	return scnprintf(buf, len, "-%d.%06u%s", abs(vals[0]),
@@ -918,7 +918,7 @@ static ssize_t iio_write_channel_info(struct device *dev, · 312 unmodified lines
918	918	break;
919	919	case IIO_VAL_INT_PLUS_MICRO_DB:
920	920	scale_db = true;
921		− /* fall through */
	921	+ fallthrough;
922	922	case IIO_VAL_INT_PLUS_MICRO:
923	923	fract_mult = 100000;
924	924	break;

drivers/iio/light/si1145.c+1−1

@@ -1042,7 +1042,7 @@ static int si1145_initialize(struct si1145_data *data) · 1041 unmodified lines
1042	1042	SI1145_LED_CURRENT_45mA);
1043	1043	if (ret < 0)
1044	1044	return ret;
1045		− /* fallthrough */
	1045	+ fallthrough;
1046	1046	case 2:
1047	1047	ret = i2c_smbus_write_byte_data(client,
1048	1048	SI1145_REG_PS_LED21,

drivers/iio/magnetometer/ak8974.c+1−1

@@ -499,7 +499,7 @@ static int ak8974_detect(struct ak8974 *ak8974) · 498 unmodified lines
499	499	switch (whoami) {
500	500	case AK8974_WHOAMI_VALUE_AMI306:
501	501	name = "ami306";
502		− /* fall-through */
	502	+ fallthrough;
503	503	case AK8974_WHOAMI_VALUE_AMI305:
504	504	ret = regmap_read(ak8974->map, AMI305_VER, &fw);
505	505	if (ret)

drivers/infiniband/core/cm.c+6−6

@@ -3034,7 +3034,7 @@ static int cm_rej_handler(struct cm_work *work) · 3033 unmodified lines
3034	3034	case IB_CM_REP_SENT:
3035	3035	case IB_CM_MRA_REP_RCVD:
3036	3036	ib_cancel_mad(cm_id_priv->av.port->mad_agent, cm_id_priv->msg);
3037		− /* fall through */
	3037	+ fallthrough;
3038	3038	case IB_CM_REQ_RCVD:
3039	3039	case IB_CM_MRA_REQ_SENT:
3040	3040	if (IBA_GET(CM_REJ_REASON, rej_msg) == IB_CM_REJ_STALE_CONN)
@@ -3044,7 +3044,7 @@ static int cm_rej_handler(struct cm_work *work) · 3 unmodified lines
3044	3044	break;
3045	3045	case IB_CM_DREQ_SENT:
3046	3046	ib_cancel_mad(cm_id_priv->av.port->mad_agent, cm_id_priv->msg);
3047		− /* fall through */
	3047	+ fallthrough;
3048	3048	case IB_CM_REP_RCVD:
3049	3049	case IB_CM_MRA_REP_SENT:
3050	3050	cm_enter_timewait(cm_id_priv);
@@ -3058,7 +3058,7 @@ static int cm_rej_handler(struct cm_work *work) · 7 unmodified lines
3058	3058	cm_enter_timewait(cm_id_priv);
3059	3059	break;
3060	3060	}
3061		− /* fall through */
	3061	+ fallthrough;
3062	3062	default:
3063	3063	pr_debug("%s: local_id %d, cm_id_priv->id.state: %d\n",
3064	3064	__func__, be32_to_cpu(cm_id_priv->id.local_id),
@@ -3116,7 +3116,7 @@ int ib_send_cm_mra(struct ib_cm_id *cm_id, · 51 unmodified lines
3116	3116	msg_response = CM_MSG_RESPONSE_OTHER;
3117	3117	break;
3118	3118	}
3119		− /* fall through */
	3119	+ fallthrough;
3120	3120	default:
3121	3121	pr_debug("%s: local_id %d, cm_id_priv->id.state: %d\n",
3122	3122	__func__, be32_to_cpu(cm_id_priv->id.local_id),
@@ -3227,7 +3227,7 @@ static int cm_mra_handler(struct cm_work *work) · 104 unmodified lines
3227	3227	case IB_CM_MRA_REP_RCVD:
3228	3228	atomic_long_inc(&work->port->counter_group[CM_RECV_DUPLICATES].
3229	3229	counter[CM_MRA_COUNTER]);
3230		− /* fall through */
	3230	+ fallthrough;
3231	3231	default:
3232	3232	pr_debug("%s local_id %d, cm_id_priv->id.state: %d\n",
3233	3233	__func__, be32_to_cpu(cm_id_priv->id.local_id),
@@ -4214,7 +4214,7 @@ static int cm_init_qp_rts_attr(struct cm_id_private *cm_id_priv, · 980 unmodified lines
4214	4214	qp_attr->retry_cnt = cm_id_priv->retry_count;
4215	4215	qp_attr->rnr_retry = cm_id_priv->rnr_retry_count;
4216	4216	qp_attr->max_rd_atomic = cm_id_priv->initiator_depth;
4217		− /* fall through */
	4217	+ fallthrough;
4218	4218	case IB_QPT_XRC_TGT:
4219	4219	*qp_attr_mask \|= IB_QP_TIMEOUT;
4220	4220	qp_attr->timeout = cm_id_priv->av.timeout;

drivers/infiniband/core/cma.c+2−1

@@ -1985,7 +1985,8 @@ static int cma_ib_handler(struct ib_cm_id *cm_id, · 1984 unmodified lines
1985	1985	event.event = RDMA_CM_EVENT_ESTABLISHED;
1986	1986	break;
1987	1987	case IB_CM_DREQ_ERROR:
1988		− event.status = -ETIMEDOUT; /* fall through */
	1988	+ event.status = -ETIMEDOUT;
	1989	+ fallthrough;
1989	1990	case IB_CM_DREQ_RECEIVED:
1990	1991	case IB_CM_DREP_RECEIVED:
1991	1992	if (!cma_comp_exch(id_priv, RDMA_CM_CONNECT,

drivers/infiniband/core/rw.c+0−1

@@ -510,7 +510,6 @@ struct ib_send_wr rdma_rw_ctx_wrs(struct rdma_rw_ctx ctx, struct ib_qp *qp, · 509 unmodified lines
510	510	switch (ctx->type) {
511	511	case RDMA_RW_SIG_MR:
512	512	case RDMA_RW_MR:
513		− /* fallthrough */
514	513	for (i = 0; i < ctx->nr_ops; i++) {
515	514	rdma_rw_update_lkey(&ctx->reg[i],
516	515	ctx->reg[i].wr.wr.opcode !=

drivers/infiniband/core/ucma.c+2−2

@@ -794,7 +794,7 @@ static void ucma_copy_ib_route(struct rdma_ucm_query_route_resp *resp, · 793 unmodified lines
794	794	case 2:
795	795	ib_copy_path_rec_to_user(&resp->ib_route[1],
796	796	&route->path_rec[1]);
797		− /* fall through */
	797	+ fallthrough;
798	798	case 1:
799	799	ib_copy_path_rec_to_user(&resp->ib_route[0],
800	800	&route->path_rec[0]);
@@ -820,7 +820,7 @@ static void ucma_copy_iboe_route(struct rdma_ucm_query_route_resp *resp, · 19 unmodified lines
820	820	case 2:
821	821	ib_copy_path_rec_to_user(&resp->ib_route[1],
822	822	&route->path_rec[1]);
823		− /* fall through */
	823	+ fallthrough;
824	824	case 1:
825	825	ib_copy_path_rec_to_user(&resp->ib_route[0],
826	826	&route->path_rec[0]);

drivers/infiniband/core/uverbs_ioctl.c+2−2

@@ -259,7 +259,7 @@ static int uverbs_process_attr(struct bundle_priv *pbundle, · 258 unmodified lines
259	259	return -EOPNOTSUPP;
260	260
261	261	e->ptr_attr.enum_id = uattr->attr_data.enum_data.elem_id;
262		− /* fall through */
	262	+ fallthrough;
263	263	case UVERBS_ATTR_TYPE_PTR_IN:
264	264	/* Ensure that any data provided by userspace beyond the known
265	265	* struct is zero. Userspace that knows how to use some future
@@ -271,7 +271,7 @@ static int uverbs_process_attr(struct bundle_priv *pbundle, · 5 unmodified lines
271	271	!uverbs_is_attr_cleared(uattr, val_spec->u.ptr.len))
272	272	return -EOPNOTSUPP;
273	273
274		− /* fall through */
	274	+ fallthrough;
275	275	case UVERBS_ATTR_TYPE_PTR_OUT:
276	276	if (uattr->len < val_spec->u.ptr.min_len \|\|
277	277	(!val_spec->zero_trailing &&

drivers/infiniband/hw/bnxt_re/ib_verbs.c+1−1

@@ -2657,7 +2657,7 @@ int bnxt_re_post_send(struct ib_qp ib_qp, const struct ib_send_wr wr, · 2656 unmodified lines
2657	2657	default:
2658	2658	break;
2659	2659	}
2660		− /* fall through */
	2660	+ fallthrough;
2661	2661	case IB_WR_SEND_WITH_INV:
2662	2662	rc = bnxt_re_build_send_wqe(qp, wr, &wqe);
2663	2663	break;

drivers/infiniband/hw/bnxt_re/qplib_fp.c+1−1

@@ -1779,7 +1779,7 @@ int bnxt_qplib_post_send(struct bnxt_qplib_qp *qp, · 1778 unmodified lines
1779	1779
1780	1780	break;
1781	1781	}
1782		− /* fall thru */
	1782	+ fallthrough;
1783	1783	case BNXT_QPLIB_SWQE_TYPE_SEND_WITH_IMM:
1784	1784	case BNXT_QPLIB_SWQE_TYPE_SEND_WITH_INV:
1785	1785	{

drivers/infiniband/hw/cxgb4/cm.c+2−2

@@ -2885,7 +2885,7 @@ static int peer_abort(struct c4iw_dev dev, struct sk_buff skb) · 2884 unmodified lines
2885	2885	case MORIBUND:
2886	2886	case CLOSING:
2887	2887	stop_ep_timer(ep);
2888		− /FALLTHROUGH/
	2888	+ fallthrough;
2889	2889	case FPDU_MODE:
2890	2890	if (ep->com.qp && ep->com.qp->srq) {
2891	2891	srqidx = ABORT_RSS_SRQIDX_G(
@@ -3759,7 +3759,7 @@ static void active_ofld_conn_reply(struct c4iw_dev dev, struct sk_buff skb, · 867 unmodified lines
3759	3759	send_fw_act_open_req(ep, atid);
3760	3760	return;
3761	3761	}
3762		− /* fall through */
	3762	+ fallthrough;
3763	3763	case FW_EADDRINUSE:
3764	3764	set_bit(ACT_RETRY_INUSE, &ep->com.history);
3765	3765	if (ep->retry_count++ < ACT_OPEN_RETRY_COUNT) {

drivers/infiniband/hw/cxgb4/qp.c+1−1

@@ -1165,7 +1165,7 @@ int c4iw_post_send(struct ib_qp ibqp, const struct ib_send_wr wr, · 1164 unmodified lines
1165	1165	break;
1166	1166	}
1167	1167	fw_flags \|= FW_RI_RDMA_WRITE_WITH_IMMEDIATE;
1168		− /FALLTHROUGH/
	1168	+ fallthrough;
1169	1169	case IB_WR_RDMA_WRITE:
1170	1170	fw_opcode = FW_RI_RDMA_WRITE_WR;
1171	1171	swsqe->opcode = FW_RI_RDMA_WRITE;

drivers/infiniband/hw/hfi1/pio_copy.c+0−1

@@ -209,7 +209,6 @@ static inline void jcopy(u8 dest, const u8 src, u32 n) · 208 unmodified lines
209	209	fallthrough;
210	210	case 1:
211	211	dest++ = src++;
212		− /* fall through */
213	212	}
214	213	}
215	214

drivers/infiniband/hw/i40iw/i40iw_cm.c+1−1

@@ -2443,7 +2443,7 @@ static void i40iw_handle_rst_pkt(struct i40iw_cm_node *cm_node, · 2442 unmodified lines
2443	2443	case I40IW_CM_STATE_FIN_WAIT1:
2444	2444	case I40IW_CM_STATE_LAST_ACK:
2445	2445	cm_node->cm_id->rem_ref(cm_node->cm_id);
2446		− /* fall through */
	2446	+ fallthrough;
2447	2447	case I40IW_CM_STATE_TIME_WAIT:
2448	2448	cm_node->state = I40IW_CM_STATE_CLOSED;
2449	2449	i40iw_rem_ref_cm_node(cm_node);

drivers/infiniband/hw/i40iw/i40iw_ctrl.c+2−3

@@ -1964,7 +1964,6 @@ static enum i40iw_status_code i40iw_sc_get_next_aeqe(struct i40iw_sc_aeq *aeq, · 1963 unmodified lines
1964	1964	info->out_rdrsp = true;
1965	1965	break;
1966	1966	case I40IW_AE_SOURCE_RSVD:
1967		− /* fallthrough */
1968	1967	default:
1969	1968	break;
1970	1969	}
@@ -3762,14 +3761,14 @@ static enum i40iw_status_code cqp_sds_wqe_fill(struct i40iw_sc_cqp *cqp, · 1791 unmodified lines
3762	3761	LS_64(1, I40IW_CQPSQ_UPESD_ENTRY_VALID)));
3763	3762
3764	3763	set_64bit_val(wqe, 56, info->entry[2].data);
3765		− /* fallthrough */
	3764	+ fallthrough;
3766	3765	case 2:
3767	3766	set_64bit_val(wqe, 32,
3768	3767	(LS_64(info->entry[1].cmd, I40IW_CQPSQ_UPESD_SDCMD) \|
3769	3768	LS_64(1, I40IW_CQPSQ_UPESD_ENTRY_VALID)));
3770	3769
3771	3770	set_64bit_val(wqe, 40, info->entry[1].data);
3772		− /* fallthrough */
	3771	+ fallthrough;
3773	3772	case 1:
3774	3773	set_64bit_val(wqe, 0,
3775	3774	LS_64(info->entry[0].cmd, I40IW_CQPSQ_UPESD_SDCMD));

drivers/infiniband/hw/i40iw/i40iw_hw.c+1−2

@@ -353,7 +353,6 @@ void i40iw_process_aeq(struct i40iw_device *iwdev) · 352 unmodified lines
353	353	i40iw_cm_disconn(iwqp);
354	354	break;
355	355	case I40IW_AE_BAD_CLOSE:
356		− /* fall through */
357	356	case I40IW_AE_RESET_SENT:
358	357	i40iw_next_iw_state(iwqp, I40IW_QP_STATE_ERROR, 1, 0, 0);
359	358	i40iw_cm_disconn(iwqp);
@@ -413,7 +412,7 @@ void i40iw_process_aeq(struct i40iw_device *iwdev) · 53 unmodified lines
413	412	case I40IW_AE_UDA_XMIT_DGRAM_TOO_LONG:
414	413	case I40IW_AE_UDA_XMIT_DGRAM_TOO_SHORT:
415	414	ctx_info->err_rq_idx_valid = false;
416		− /* fall through */
	415	+ fallthrough;
417	416	default:
418	417	if (!info->sq && ctx_info->err_rq_idx_valid) {
419	418	ctx_info->err_rq_idx = info->wqe_idx;

drivers/infiniband/hw/i40iw/i40iw_main.c+10−12

@@ -1489,36 +1489,35 @@ static void i40iw_deinit_device(struct i40iw_device *iwdev) · 1488 unmodified lines
1489	1489	iwdev->iw_status = 0;
1490	1490	i40iw_port_ibevent(iwdev);
1491	1491	i40iw_destroy_rdma_device(iwdev->iwibdev);
1492		− /* fallthrough */
	1492	+ fallthrough;
1493	1493	case IP_ADDR_REGISTERED:
1494	1494	if (!iwdev->reset)
1495	1495	i40iw_del_macip_entry(iwdev, (u8)iwdev->mac_ip_table_idx);
1496		− /* fallthrough */
1497		− /* fallthrough */
	1496	+ fallthrough;
1498	1497	case PBLE_CHUNK_MEM:
1499	1498	i40iw_destroy_pble_pool(dev, iwdev->pble_rsrc);
1500		− /* fallthrough */
	1499	+ fallthrough;
1501	1500	case CEQ_CREATED:
1502	1501	i40iw_dele_ceqs(iwdev);
1503		− /* fallthrough */
	1502	+ fallthrough;
1504	1503	case AEQ_CREATED:
1505	1504	i40iw_destroy_aeq(iwdev);
1506		− /* fallthrough */
	1505	+ fallthrough;
1507	1506	case IEQ_CREATED:
1508	1507	i40iw_puda_dele_resources(&iwdev->vsi, I40IW_PUDA_RSRC_TYPE_IEQ, iwdev->reset);
1509		− /* fallthrough */
	1508	+ fallthrough;
1510	1509	case ILQ_CREATED:
1511	1510	i40iw_puda_dele_resources(&iwdev->vsi, I40IW_PUDA_RSRC_TYPE_ILQ, iwdev->reset);
1512		− /* fallthrough */
	1511	+ fallthrough;
1513	1512	case CCQ_CREATED:
1514	1513	i40iw_destroy_ccq(iwdev);
1515		− /* fallthrough */
	1514	+ fallthrough;
1516	1515	case HMC_OBJS_CREATED:
1517	1516	i40iw_del_hmc_objects(dev, dev->hmc_info, true, iwdev->reset);
1518		− /* fallthrough */
	1517	+ fallthrough;
1519	1518	case CQP_CREATED:
1520	1519	i40iw_destroy_cqp(iwdev, true);
1521		− /* fallthrough */
	1520	+ fallthrough;
1522	1521	case INITIAL_STATE:
1523	1522	i40iw_cleanup_cm_core(&iwdev->cm_core);
1524	1523	if (iwdev->vsi.pestat) {
@@ -1528,7 +1527,6 @@ static void i40iw_deinit_device(struct i40iw_device *iwdev) · 3 unmodified lines
1528	1527	i40iw_del_init_mem(iwdev);
1529	1528	break;
1530	1529	case INVALID_STATE:
1531		− /* fallthrough */
1532	1530	default:
1533	1531	i40iw_pr_err("bad init_state = %d\n", iwdev->init_state);
1534	1532	break;

drivers/infiniband/hw/i40iw/i40iw_puda.c+2−2

@@ -814,13 +814,13 @@ void i40iw_puda_dele_resources(struct i40iw_sc_vsi *vsi, · 813 unmodified lines
814	814	switch (rsrc->completion) {
815	815	case PUDA_HASH_CRC_COMPLETE:
816	816	i40iw_free_hash_desc(rsrc->hash_desc);
817		− /* fall through */
	817	+ fallthrough;
818	818	case PUDA_QP_CREATED:
819	819	if (!reset)
820	820	i40iw_puda_free_qp(rsrc);
821	821
822	822	i40iw_free_dma_mem(dev->hw, &rsrc->qpmem);
823		− /* fallthrough */
	823	+ fallthrough;
824	824	case PUDA_CQ_CREATED:
825	825	if (!reset)
826	826	i40iw_puda_free_cq(rsrc);

drivers/infiniband/hw/i40iw/i40iw_utils.c+3−5

@@ -190,9 +190,8 @@ int i40iw_inetaddr_event(struct notifier_block *notifier, · 189 unmodified lines
190	190	switch (event) {
191	191	case NETDEV_DOWN:
192	192	action = I40IW_ARP_DELETE;
193		− /* Fall through */
	193	+ fallthrough;
194	194	case NETDEV_UP:
195		− /* Fall through */
196	195	case NETDEV_CHANGEADDR:
197	196
198	197	/* Just skip if no need to handle ARP cache */
@@ -247,9 +246,8 @@ int i40iw_inet6addr_event(struct notifier_block *notifier, · 48 unmodified lines
247	246	switch (event) {
248	247	case NETDEV_DOWN:
249	248	action = I40IW_ARP_DELETE;
250		− /* Fall through */
	249	+ fallthrough;
251	250	case NETDEV_UP:
252		− /* Fall through */
253	251	case NETDEV_CHANGEADDR:
254	252	i40iw_manage_arp_cache(iwdev,
255	253	netdev->dev_addr,
@@ -344,7 +342,7 @@ int i40iw_netdevice_event(struct notifier_block *notifier, · 88 unmodified lines
344	342	switch (event) {
345	343	case NETDEV_DOWN:
346	344	iwdev->iw_status = 0;
347		− /* Fall through */
	345	+ fallthrough;
348	346	case NETDEV_UP:
349	347	i40iw_port_ibevent(iwdev);
350	348	break;

drivers/infiniband/hw/i40iw/i40iw_verbs.c+2−3

@@ -810,7 +810,7 @@ void i40iw_hw_modify_qp(struct i40iw_device iwdev, struct i40iw_qp iwqp, · 809 unmodified lines
810	810	case I40IW_QP_STATE_RTS:
811	811	if (iwqp->iwarp_state == I40IW_QP_STATE_IDLE)
812	812	i40iw_send_reset(iwqp->cm_node);
813		− /* fall through */
	813	+ fallthrough;
814	814	case I40IW_QP_STATE_IDLE:
815	815	case I40IW_QP_STATE_TERMINATE:
816	816	case I40IW_QP_STATE_CLOSING:
@@ -2144,7 +2144,6 @@ static int i40iw_post_send(struct ib_qp *ibqp, · 1327 unmodified lines
2144	2144
2145	2145	switch (ib_wr->opcode) {
2146	2146	case IB_WR_SEND:
2147		− /* fall-through */
2148	2147	case IB_WR_SEND_WITH_INV:
2149	2148	if (ib_wr->opcode == IB_WR_SEND) {
2150	2149	if (ib_wr->send_flags & IB_SEND_SOLICITED)
@@ -2201,7 +2200,7 @@ static int i40iw_post_send(struct ib_qp *ibqp, · 50 unmodified lines
2201	2200	break;
2202	2201	case IB_WR_RDMA_READ_WITH_INV:
2203	2202	inv_stag = true;
2204		− /* fall-through*/
	2203	+ fallthrough;
2205	2204	case IB_WR_RDMA_READ:
2206	2205	if (ib_wr->num_sge > I40IW_MAX_SGE_RD) {
2207	2206	err = -EINVAL;

drivers/infiniband/hw/mlx4/cq.c+2−2

@@ -765,13 +765,13 @@ repoll: · 764 unmodified lines
765	765	switch (cqe->owner_sr_opcode & MLX4_CQE_OPCODE_MASK) {
766	766	case MLX4_OPCODE_RDMA_WRITE_IMM:
767	767	wc->wc_flags \|= IB_WC_WITH_IMM;
768		− /* fall through */
	768	+ fallthrough;
769	769	case MLX4_OPCODE_RDMA_WRITE:
770	770	wc->opcode = IB_WC_RDMA_WRITE;
771	771	break;
772	772	case MLX4_OPCODE_SEND_IMM:
773	773	wc->wc_flags \|= IB_WC_WITH_IMM;
774		− /* fall through */
	774	+ fallthrough;
775	775	case MLX4_OPCODE_SEND:
776	776	case MLX4_OPCODE_SEND_INVAL:
777	777	wc->opcode = IB_WC_SEND;

drivers/infiniband/hw/mlx4/mcg.c+1−1

@@ -944,7 +944,7 @@ int mlx4_ib_mcg_multiplex_handler(struct ib_device *ibdev, int port, · 943 unmodified lines
944	944	switch (sa_mad->mad_hdr.method) {
945	945	case IB_MGMT_METHOD_SET:
946	946	may_create = 1;
947		− /* fall through */
	947	+ fallthrough;
948	948	case IB_SA_METHOD_DELETE:
949	949	req = kzalloc(sizeof *req, GFP_KERNEL);
950	950	if (!req)

drivers/infiniband/hw/mlx4/qp.c+3−3

@@ -1578,12 +1578,12 @@ static struct ib_qp _mlx4_ib_create_qp(struct ib_pd pd, · 1577 unmodified lines
1578	1578	pd = to_mxrcd(init_attr->xrcd)->pd;
1579	1579	xrcdn = to_mxrcd(init_attr->xrcd)->xrcdn;
1580	1580	init_attr->send_cq = to_mxrcd(init_attr->xrcd)->cq;
1581		− /* fall through */
	1581	+ fallthrough;
1582	1582	case IB_QPT_XRC_INI:
1583	1583	if (!(to_mdev(pd->device)->dev->caps.flags & MLX4_DEV_CAP_FLAG_XRC))
1584	1584	return ERR_PTR(-ENOSYS);
1585	1585	init_attr->recv_cq = init_attr->send_cq;
1586		− /* fall through */
	1586	+ fallthrough;
1587	1587	case IB_QPT_RC:
1588	1588	case IB_QPT_UC:
1589	1589	case IB_QPT_RAW_PACKET:
@@ -1592,7 +1592,7 @@ static struct ib_qp _mlx4_ib_create_qp(struct ib_pd pd, · 2 unmodified lines
1592	1592	return ERR_PTR(-ENOMEM);
1593	1593	qp->pri.vid = 0xFFFF;
1594	1594	qp->alt.vid = 0xFFFF;
1595		− /* fall through */
	1595	+ fallthrough;
1596	1596	case IB_QPT_UD:
1597	1597	{
1598	1598	err = create_qp_common(pd, init_attr, udata, 0, &qp);

drivers/infiniband/hw/mlx5/cq.c+2−2

@@ -121,13 +121,13 @@ static void handle_good_req(struct ib_wc wc, struct mlx5_cqe64 cqe, · 120 unmodified lines
121	121	switch (be32_to_cpu(cqe->sop_drop_qpn) >> 24) {
122	122	case MLX5_OPCODE_RDMA_WRITE_IMM:
123	123	wc->wc_flags \|= IB_WC_WITH_IMM;
124		− /* fall through */
	124	+ fallthrough;
125	125	case MLX5_OPCODE_RDMA_WRITE:
126	126	wc->opcode = IB_WC_RDMA_WRITE;
127	127	break;
128	128	case MLX5_OPCODE_SEND_IMM:
129	129	wc->wc_flags \|= IB_WC_WITH_IMM;
130		− /* fall through */
	130	+ fallthrough;
131	131	case MLX5_OPCODE_SEND:
132	132	case MLX5_OPCODE_SEND_INVAL:
133	133	wc->opcode = IB_WC_SEND;

drivers/infiniband/hw/mlx5/mad.c+1−2

@@ -250,9 +250,8 @@ int mlx5_ib_process_mad(struct ib_device *ibdev, int mad_flags, u8 port_num, · 249 unmodified lines
250	250	if (MLX5_CAP_GEN(dev->mdev, vport_counters) &&
251	251	method == IB_MGMT_METHOD_GET)
252	252	return process_pma_cmd(dev, port_num, in, out);
253		− /* fallthrough */
	253	+ fallthrough;
254	254	case MLX5_IB_VENDOR_CLASS1:
255		− /* fallthrough */
256	255	case MLX5_IB_VENDOR_CLASS2:
257	256	case IB_MGMT_CLASS_CONG_MGMT: {
258	257	if (method != IB_MGMT_METHOD_GET &&

drivers/infiniband/hw/mlx5/main.c+1−1

@@ -2872,7 +2872,7 @@ static void mlx5_ib_handle_event(struct work_struct *_work) · 2871 unmodified lines
2872	2872	break;
2873	2873	case MLX5_EVENT_TYPE_GENERAL_EVENT:
2874	2874	handle_general_event(ibdev, work->param, &ibev);
2875		− /* fall through */
	2875	+ fallthrough;
2876	2876	default:
2877	2877	goto out;
2878	2878	}

drivers/infiniband/hw/mlx5/qp.c+2−2

@@ -416,7 +416,7 @@ static int sq_overhead(struct ib_qp_init_attr *attr) · 415 unmodified lines
416	416	switch (attr->qp_type) {
417	417	case IB_QPT_XRC_INI:
418	418	size += sizeof(struct mlx5_wqe_xrc_seg);
419		− /* fall through */
	419	+ fallthrough;
420	420	case IB_QPT_RC:
421	421	size += sizeof(struct mlx5_wqe_ctrl_seg) +
422	422	max(sizeof(struct mlx5_wqe_atomic_seg) +
@@ -441,7 +441,7 @@ static int sq_overhead(struct ib_qp_init_attr *attr) · 18 unmodified lines
441	441	if (attr->create_flags & IB_QP_CREATE_IPOIB_UD_LSO)
442	442	size += sizeof(struct mlx5_wqe_eth_pad) +
443	443	sizeof(struct mlx5_wqe_eth_seg);
444		− /* fall through */
	444	+ fallthrough;
445	445	case IB_QPT_SMI:
446	446	case MLX5_IB_QPT_HW_GSI:
447	447	size += sizeof(struct mlx5_wqe_ctrl_seg) +

drivers/infiniband/hw/mthca/mthca_av.c+1−1

@@ -115,7 +115,7 @@ static u8 ib_rate_to_memfree(u8 req_rate, u8 cur_rate) · 114 unmodified lines
115	115	switch ((cur_rate - 1) / req_rate) {
116	116	case 0: return MTHCA_RATE_MEMFREE_FULL;
117	117	case 1: return MTHCA_RATE_MEMFREE_HALF;
118		− case 2: /* fall through */
	118	+ case 2:
119	119	case 3: return MTHCA_RATE_MEMFREE_QUARTER;
120	120	default: return MTHCA_RATE_MEMFREE_EIGHTH;
121	121	}

drivers/infiniband/hw/ocrdma/ocrdma_verbs.c+2−2

@@ -2134,7 +2134,7 @@ int ocrdma_post_send(struct ib_qp ibqp, const struct ib_send_wr wr, · 2133 unmodified lines
2134	2134	case IB_WR_SEND_WITH_IMM:
2135	2135	hdr->cw \|= (OCRDMA_FLAG_IMM << OCRDMA_WQE_FLAGS_SHIFT);
2136	2136	hdr->immdt = ntohl(wr->ex.imm_data);
2137		− /* fall through */
	2137	+ fallthrough;
2138	2138	case IB_WR_SEND:
2139	2139	hdr->cw \|= (OCRDMA_SEND << OCRDMA_WQE_OPCODE_SHIFT);
2140	2140	ocrdma_build_send(qp, hdr, wr);
@@ -2148,7 +2148,7 @@ int ocrdma_post_send(struct ib_qp ibqp, const struct ib_send_wr wr, · 7 unmodified lines
2148	2148	case IB_WR_RDMA_WRITE_WITH_IMM:
2149	2149	hdr->cw \|= (OCRDMA_FLAG_IMM << OCRDMA_WQE_FLAGS_SHIFT);
2150	2150	hdr->immdt = ntohl(wr->ex.imm_data);
2151		− /* fall through */
	2151	+ fallthrough;
2152	2152	case IB_WR_RDMA_WRITE:
2153	2153	hdr->cw \|= (OCRDMA_WRITE << OCRDMA_WQE_OPCODE_SHIFT);
2154	2154	status = ocrdma_build_write(qp, hdr, wr);

drivers/infiniband/hw/qedr/verbs.c+1−1

@@ -3528,7 +3528,7 @@ static int __qedr_post_send(struct ib_qp ibqp, const struct ib_send_wr wr, · 3527 unmodified lines
3528	3528	break;
3529	3529	case IB_WR_RDMA_READ_WITH_INV:
3530	3530	SET_FIELD2(wqe->flags, RDMA_SQ_RDMA_WQE_1ST_READ_INV_FLG, 1);
3531		− /* fallthrough -- same is identical to RDMA READ */
	3531	+ fallthrough; /* same is identical to RDMA READ */
3532	3532
3533	3533	case IB_WR_RDMA_READ:
3534	3534	wqe->req_type = RDMA_SQ_REQ_TYPE_RDMA_RD;

drivers/infiniband/hw/qib/qib_iba6120.c+2−2

@@ -2973,11 +2973,11 @@ static u32 qib_6120_iblink_state(u64 ibcs) · 2972 unmodified lines
2973	2973	state = IB_PORT_ARMED;
2974	2974	break;
2975	2975	case IB_6120_L_STATE_ACTIVE:
2976		− /* fall through */
2977	2976	case IB_6120_L_STATE_ACT_DEFER:
2978	2977	state = IB_PORT_ACTIVE;
2979	2978	break;
2980		− default: /* fall through */
	2979	+ default:
	2980	+ fallthrough;
2981	2981	case IB_6120_L_STATE_DOWN:
2982	2982	state = IB_PORT_DOWN;
2983	2983	break;

drivers/infiniband/hw/qib/qib_iba7220.c+2−2

@@ -3586,11 +3586,11 @@ static u32 qib_7220_iblink_state(u64 ibcs) · 3585 unmodified lines
3586	3586	state = IB_PORT_ARMED;
3587	3587	break;
3588	3588	case IB_7220_L_STATE_ACTIVE:
3589		− /* fall through */
3590	3589	case IB_7220_L_STATE_ACT_DEFER:
3591	3590	state = IB_PORT_ACTIVE;
3592	3591	break;
3593		− default: /* fall through */
	3592	+ default:
	3593	+ fallthrough;
3594	3594	case IB_7220_L_STATE_DOWN:
3595	3595	state = IB_PORT_DOWN;
3596	3596	break;

drivers/infiniband/hw/qib/qib_iba7322.c+3−3

@@ -5508,11 +5508,11 @@ static u32 qib_7322_iblink_state(u64 ibcs) · 5507 unmodified lines
5508	5508	state = IB_PORT_ARMED;
5509	5509	break;
5510	5510	case IB_7322_L_STATE_ACTIVE:
5511		− /* fall through */
5512	5511	case IB_7322_L_STATE_ACT_DEFER:
5513	5512	state = IB_PORT_ACTIVE;
5514	5513	break;
5515		− default: /* fall through */
	5514	+ default:
	5515	+ fallthrough;
5516	5516	case IB_7322_L_STATE_DOWN:
5517	5517	state = IB_PORT_DOWN;
5518	5518	break;
@@ -6533,7 +6533,7 @@ static int qib_init_7322_variables(struct qib_devdata *dd) · 1014 unmodified lines
6533	6533	"Invalid num_vls %u, using 4 VLs\n",
6534	6534	qib_num_cfg_vls);
6535	6535	qib_num_cfg_vls = 4;
6536		− /* fall through */
	6536	+ fallthrough;
6537	6537	case 4:
6538	6538	ppd->vls_supported = IB_VL_VL0_3;
6539	6539	break;

drivers/infiniband/hw/qib/qib_mad.c+6−6

@@ -433,7 +433,7 @@ static int check_mkey(struct qib_ibport ibp, struct ib_smp smp, int mad_flags) · 432 unmodified lines
433	433	/* Bad mkey not a violation below level 2 */
434	434	if (ibp->rvp.mkeyprot < 2)
435	435	break;
436		− /* fall through */
	436	+ fallthrough;
437	437	case IB_MGMT_METHOD_SET:
438	438	case IB_MGMT_METHOD_TRAP_REPRESS:
439	439	if (ibp->rvp.mkey_violations != 0xFFFF)
@@ -828,7 +828,7 @@ static int subn_set_portinfo(struct ib_smp smp, struct ib_device ibdev, · 388 unmodified lines
828	828	case IB_PORT_NOP:
829	829	if (lstate == 0)
830	830	break;
831		− /* FALLTHROUGH */
	831	+ fallthrough;
832	832	case IB_PORT_DOWN:
833	833	if (lstate == 0)
834	834	lstate = QIB_IB_LINKDOWN_ONLY;
@@ -1928,7 +1928,7 @@ static int process_subn(struct ib_device *ibdev, int mad_flags, · 1093 unmodified lines
1928	1928	ret = IB_MAD_RESULT_SUCCESS;
1929	1929	goto bail;
1930	1930	}
1931		− /* FALLTHROUGH */
	1931	+ fallthrough;
1932	1932	default:
1933	1933	smp->status \|= IB_SMP_UNSUP_METH_ATTR;
1934	1934	ret = reply(smp);
@@ -1962,7 +1962,7 @@ static int process_subn(struct ib_device *ibdev, int mad_flags, · 27 unmodified lines
1962	1962	ret = IB_MAD_RESULT_SUCCESS;
1963	1963	goto bail;
1964	1964	}
1965		− /* FALLTHROUGH */
	1965	+ fallthrough;
1966	1966	default:
1967	1967	smp->status \|= IB_SMP_UNSUP_METH_ATTR;
1968	1968	ret = reply(smp);
@@ -2322,7 +2322,7 @@ static int process_cc(struct ib_device *ibdev, int mad_flags, · 353 unmodified lines
2322	2322	ret = cc_get_congestion_control_table(ccp, ibdev, port);
2323	2323	goto bail;
2324	2324
2325		− /* FALLTHROUGH */
	2325	+ fallthrough;
2326	2326	default:
2327	2327	ccp->status \|= IB_SMP_UNSUP_METH_ATTR;
2328	2328	ret = reply((struct ib_smp *) ccp);
@@ -2339,7 +2339,7 @@ static int process_cc(struct ib_device *ibdev, int mad_flags, · 10 unmodified lines
2339	2339	ret = cc_set_congestion_control_table(ccp, ibdev, port);
2340	2340	goto bail;
2341	2341
2342		− /* FALLTHROUGH */
	2342	+ fallthrough;
2343	2343	default:
2344	2344	ccp->status \|= IB_SMP_UNSUP_METH_ATTR;
2345	2345	ret = reply((struct ib_smp *) ccp);

drivers/infiniband/hw/qib/qib_rc.c+9−9

@@ -83,7 +83,7 @@ static int qib_make_rc_ack(struct qib_ibdev dev, struct rvt_qp qp, · 82 unmodified lines
83	83	rvt_put_mr(e->rdma_sge.mr);
84	84	e->rdma_sge.mr = NULL;
85	85	}
86		− /* FALLTHROUGH */
	86	+ fallthrough;
87	87	case OP(ATOMIC_ACKNOWLEDGE):
88	88	/*
89	89	* We can increment the tail pointer now that the last
@@ -92,7 +92,7 @@ static int qib_make_rc_ack(struct qib_ibdev dev, struct rvt_qp qp, · 2 unmodified lines
92	92	*/
93	93	if (++qp->s_tail_ack_queue > QIB_MAX_RDMA_ATOMIC)
94	94	qp->s_tail_ack_queue = 0;
95		− /* FALLTHROUGH */
	95	+ fallthrough;
96	96	case OP(SEND_ONLY):
97	97	case OP(ACKNOWLEDGE):
98	98	/* Check for no next entry in the queue. */
@@ -149,7 +149,7 @@ static int qib_make_rc_ack(struct qib_ibdev dev, struct rvt_qp qp, · 50 unmodified lines
149	149
150	150	case OP(RDMA_READ_RESPONSE_FIRST):
151	151	qp->s_ack_state = OP(RDMA_READ_RESPONSE_MIDDLE);
152		− /* FALLTHROUGH */
	152	+ fallthrough;
153	153	case OP(RDMA_READ_RESPONSE_MIDDLE):
154	154	qp->s_cur_sge = &qp->s_ack_rdma_sge;
155	155	qp->s_rdma_mr = qp->s_ack_rdma_sge.sge.mr;
@@ -471,10 +471,10 @@ no_flow_control: · 315 unmodified lines
471	471	* See qib_restart_rc().
472	472	*/
473	473	qp->s_len = restart_sge(&qp->s_sge, wqe, qp->s_psn, pmtu);
474		− /* FALLTHROUGH */
	474	+ fallthrough;
475	475	case OP(SEND_FIRST):
476	476	qp->s_state = OP(SEND_MIDDLE);
477		− /* FALLTHROUGH */
	477	+ fallthrough;
478	478	case OP(SEND_MIDDLE):
479	479	bth2 = qp->s_psn++ & QIB_PSN_MASK;
480	480	ss = &qp->s_sge;
@@ -510,10 +510,10 @@ no_flow_control: · 29 unmodified lines
510	510	* See qib_restart_rc().
511	511	*/
512	512	qp->s_len = restart_sge(&qp->s_sge, wqe, qp->s_psn, pmtu);
513		− /* FALLTHROUGH */
	513	+ fallthrough;
514	514	case OP(RDMA_WRITE_FIRST):
515	515	qp->s_state = OP(RDMA_WRITE_MIDDLE);
516		− /* FALLTHROUGH */
	516	+ fallthrough;
517	517	case OP(RDMA_WRITE_MIDDLE):
518	518	bth2 = qp->s_psn++ & QIB_PSN_MASK;
519	519	ss = &qp->s_sge;
@@ -1807,7 +1807,7 @@ void qib_rc_rcv(struct qib_ctxtdata rcd, struct ib_header hdr, · 1287 unmodified lines
1807	1807	if (!ret)
1808	1808	goto rnr_nak;
1809	1809	qp->r_rcv_len = 0;
1810		− /* FALLTHROUGH */
	1810	+ fallthrough;
1811	1811	case OP(SEND_MIDDLE):
1812	1812	case OP(RDMA_WRITE_MIDDLE):
1813	1813	send_middle:
@@ -1839,7 +1839,7 @@ send_middle: · 25 unmodified lines
1839	1839	qp->r_rcv_len = 0;
1840	1840	if (opcode == OP(SEND_ONLY))
1841	1841	goto no_immediate_data;
1842		− /* fall through -- for SEND_ONLY_WITH_IMMEDIATE */
	1842	+ fallthrough; /* for SEND_ONLY_WITH_IMMEDIATE */
1843	1843	case OP(SEND_LAST_WITH_IMMEDIATE):
1844	1844	send_last_imm:
1845	1845	wc.ex.imm_data = ohdr->u.imm_data;

drivers/infiniband/hw/qib/qib_sdma.c+1−1

@@ -763,7 +763,7 @@ void __qib_sdma_process_event(struct qib_pportdata *ppd, · 762 unmodified lines
763	763	* bringing the link up with traffic active on
764	764	* 7220, e.g. */
765	765	ss->go_s99_running = 1;
766		− /* fall through -- and start dma engine */
	766	+ fallthrough; /* and start dma engine */
767	767	case qib_sdma_event_e10_go_hw_start:
768	768	/* This reference means the state machine is started */
769	769	sdma_get(&ppd->sdma_state);

drivers/infiniband/hw/qib/qib_uc.c+4−4

@@ -161,7 +161,7 @@ int qib_make_uc_req(struct rvt_qp qp, unsigned long flags) · 160 unmodified lines
161	161
162	162	case OP(SEND_FIRST):
163	163	qp->s_state = OP(SEND_MIDDLE);
164		− /* FALLTHROUGH */
	164	+ fallthrough;
165	165	case OP(SEND_MIDDLE):
166	166	len = qp->s_len;
167	167	if (len > pmtu) {
@@ -185,7 +185,7 @@ int qib_make_uc_req(struct rvt_qp qp, unsigned long flags) · 17 unmodified lines
185	185
186	186	case OP(RDMA_WRITE_FIRST):
187	187	qp->s_state = OP(RDMA_WRITE_MIDDLE);
188		− /* FALLTHROUGH */
	188	+ fallthrough;
189	189	case OP(RDMA_WRITE_MIDDLE):
190	190	len = qp->s_len;
191	191	if (len > pmtu) {
@@ -351,7 +351,7 @@ send_first: · 159 unmodified lines
351	351	goto no_immediate_data;
352	352	else if (opcode == OP(SEND_ONLY_WITH_IMMEDIATE))
353	353	goto send_last_imm;
354		− /* FALLTHROUGH */
	354	+ fallthrough;
355	355	case OP(SEND_MIDDLE):
356	356	/* Check for invalid length PMTU or posted rwqe len. */
357	357	if (unlikely(tlen != (hdrsize + pmtu + 4)))
@@ -440,7 +440,7 @@ rdma_first: · 82 unmodified lines
440	440	wc.ex.imm_data = ohdr->u.rc.imm_data;
441	441	goto rdma_last_imm;
442	442	}
443		− /* FALLTHROUGH */
	443	+ fallthrough;
444	444	case OP(RDMA_WRITE_MIDDLE):
445	445	/* Check for invalid length PMTU or posted rwqe len. */
446	446	if (unlikely(tlen != (hdrsize + pmtu + 4)))

drivers/infiniband/hw/qib/qib_verbs.c+1−1

@@ -237,7 +237,7 @@ static void qib_qp_rcv(struct qib_ctxtdata rcd, struct ib_header hdr, · 236 unmodified lines
237	237	case IB_QPT_GSI:
238	238	if (ib_qib_disable_sma)
239	239	break;
240		− /* FALLTHROUGH */
	240	+ fallthrough;
241	241	case IB_QPT_UD:
242	242	qib_ud_rcv(ibp, hdr, has_grh, data, tlen, qp);
243	243	break;

drivers/infiniband/hw/vmw_pvrdma/pvrdma_qp.c+1−1

@@ -238,7 +238,7 @@ struct ib_qp pvrdma_create_qp(struct ib_pd pd, · 237 unmodified lines
238	238	ret = -EINVAL;
239	239	goto err_qp;
240	240	}
241		− /* fall through */
	241	+ fallthrough;
242	242	case IB_QPT_RC:
243	243	case IB_QPT_UD:
244	244	qp = kzalloc(sizeof(*qp), GFP_KERNEL);

drivers/infiniband/sw/rdmavt/qp.c+1−1

@@ -1111,7 +1111,7 @@ struct ib_qp rvt_create_qp(struct ib_pd ibpd, · 1110 unmodified lines
1111	1111	if (init_attr->port_num == 0 \|\|
1112	1112	init_attr->port_num > ibpd->device->phys_port_cnt)
1113	1113	return ERR_PTR(-EINVAL);
1114		− /* fall through */
	1114	+ fallthrough;
1115	1115	case IB_QPT_UC:
1116	1116	case IB_QPT_RC:
1117	1117	case IB_QPT_UD:

drivers/infiniband/sw/rxe/rxe_comp.c+1−1

@@ -282,7 +282,7 @@ static inline enum comp_state check_ack(struct rxe_qp *qp, · 281 unmodified lines
282	282	if ((syn & AETH_TYPE_MASK) != AETH_ACK)
283	283	return COMPST_ERROR;
284	284
285		− /* fall through */
	285	+ fallthrough;
286	286	/* (IB_OPCODE_RC_RDMA_READ_RESPONSE_MIDDLE doesn't have an AETH)
287	287	*/
288	288	case IB_OPCODE_RC_RDMA_READ_RESPONSE_MIDDLE:

drivers/infiniband/sw/rxe/rxe_task.c+1−1

@@ -71,7 +71,7 @@ void rxe_do_task(unsigned long data) · 70 unmodified lines
71	71
72	72	case TASK_STATE_BUSY:
73	73	task->state = TASK_STATE_ARMED;
74		− /* fall through */
	74	+ fallthrough;
75	75	case TASK_STATE_ARMED:
76	76	spin_unlock_irqrestore(&task->state_lock, flags);
77	77	return;

drivers/infiniband/sw/rxe/rxe_verbs.c+1−1

@@ -540,7 +540,7 @@ static void init_send_wr(struct rxe_qp qp, struct rxe_send_wr wr, · 539 unmodified lines
540	540	switch (wr->opcode) {
541	541	case IB_WR_RDMA_WRITE_WITH_IMM:
542	542	wr->ex.imm_data = ibwr->ex.imm_data;
543		− /* fall through */
	543	+ fallthrough;
544	544	case IB_WR_RDMA_READ:
545	545	case IB_WR_RDMA_WRITE:
546	546	wr->wr.rdma.remote_addr = rdma_wr(ibwr)->remote_addr;

drivers/infiniband/sw/siw/siw_cm.c+0−2

@@ -1224,12 +1224,10 @@ static void siw_cm_llp_data_ready(struct sock *sk) · 1223 unmodified lines
1224	1224
1225	1225	switch (cep->state) {
1226	1226	case SIW_EPSTATE_RDMA_MODE:
1227		− /* fall through */
1228	1227	case SIW_EPSTATE_LISTENING:
1229	1228	break;
1230	1229
1231	1230	case SIW_EPSTATE_AWAIT_MPAREQ:
1232		− /* fall through */
1233	1231	case SIW_EPSTATE_AWAIT_MPAREP:
1234	1232	siw_cm_queue_work(cep, SIW_CM_WORK_READ_MPAHDR);
1235	1233	break;

drivers/infiniband/sw/siw/siw_qp_rx.c+2−2

@@ -1215,7 +1215,7 @@ static int siw_rdmap_complete(struct siw_qp *qp, int error) · 1214 unmodified lines
1215	1215	case RDMAP_SEND_SE:
1216	1216	case RDMAP_SEND_SE_INVAL:
1217	1217	wqe->rqe.flags \|= SIW_WQE_SOLICITED;
1218		− /* Fall through */
	1218	+ fallthrough;
1219	1219
1220	1220	case RDMAP_SEND:
1221	1221	case RDMAP_SEND_INVAL:
@@ -1386,7 +1386,7 @@ int siw_tcp_rx_data(read_descriptor_t rd_desc, struct sk_buff skb, · 164 unmodified lines
1386	1386	* DDP segment.
1387	1387	*/
1388	1388	qp->rx_fpdu->first_ddp_seg = 0;
1389		− /* Fall through */
	1389	+ fallthrough;
1390	1390
1391	1391	case SIW_GET_DATA_START:
1392	1392	/*

drivers/infiniband/sw/siw/siw_qp_tx.c+2−2

@@ -1042,7 +1042,7 @@ next_wqe: · 1041 unmodified lines
1042	1042	case SIW_OP_SEND_REMOTE_INV:
1043	1043	case SIW_OP_WRITE:
1044	1044	siw_wqe_put_mem(wqe, tx_type);
1045		− /* Fall through */
	1045	+ fallthrough;
1046	1046
1047	1047	case SIW_OP_INVAL_STAG:
1048	1048	case SIW_OP_REG_MR:
@@ -1128,7 +1128,7 @@ next_wqe: · 79 unmodified lines
1128	1128	case SIW_OP_READ:
1129	1129	case SIW_OP_READ_LOCAL_INV:
1130	1130	siw_wqe_put_mem(wqe, tx_type);
1131		− /* Fall through */
	1131	+ fallthrough;
1132	1132
1133	1133	case SIW_OP_INVAL_STAG:
1134	1134	case SIW_OP_REG_MR:

drivers/infiniband/ulp/ipoib/ipoib_cm.c+2−2

@@ -512,13 +512,13 @@ static int ipoib_cm_rx_handler(struct ib_cm_id *cm_id, · 511 unmodified lines
512	512	return ipoib_cm_req_handler(cm_id, event);
513	513	case IB_CM_DREQ_RECEIVED:
514	514	ib_send_cm_drep(cm_id, NULL, 0);
515		− /* Fall through */
	515	+ fallthrough;
516	516	case IB_CM_REJ_RECEIVED:
517	517	p = cm_id->context;
518	518	priv = ipoib_priv(p->dev);
519	519	if (ib_modify_qp(p->qp, &ipoib_cm_err_attr, IB_QP_STATE))
520	520	ipoib_warn(priv, "unable to move qp to error state\n");
521		− /* Fall through */
	521	+ fallthrough;
522	522	default:
523	523	return 0;
524	524	}

drivers/infiniband/ulp/ipoib/ipoib_main.c+1−1

@@ -502,7 +502,7 @@ static struct net_device *ipoib_get_net_dev_by_params( · 501 unmodified lines
502	502	default:
503	503	dev_warn_ratelimited(&dev->dev,
504	504	"duplicate IP address detected\n");
505		− /* Fall through */
	505	+ fallthrough;
506	506	case 1:
507	507	return net_dev;
508	508	}

drivers/infiniband/ulp/iser/iser_verbs.c+1−1

@@ -711,7 +711,7 @@ static int iser_cma_handler(struct rdma_cm_id cma_id, struct rdma_cm_event eve · 710 unmodified lines
711	711	case RDMA_CM_EVENT_REJECTED:
712	712	iser_info("Connection rejected: %s\n",
713	713	rdma_reject_msg(cma_id, event->status));
714		− /* FALLTHROUGH */
	714	+ fallthrough;
715	715	case RDMA_CM_EVENT_ADDR_ERROR:
716	716	case RDMA_CM_EVENT_ROUTE_ERROR:
717	717	case RDMA_CM_EVENT_CONNECT_ERROR:

drivers/infiniband/ulp/isert/ib_isert.c+5−5

@@ -664,8 +664,8 @@ isert_cma_handler(struct rdma_cm_id cma_id, struct rdma_cm_event event) · 663 unmodified lines
664	664	case RDMA_CM_EVENT_ESTABLISHED:
665	665	isert_connected_handler(cma_id);
666	666	break;
667		− case RDMA_CM_EVENT_ADDR_CHANGE: /* FALLTHRU */
668		− case RDMA_CM_EVENT_DISCONNECTED: /* FALLTHRU */
	667	+ case RDMA_CM_EVENT_ADDR_CHANGE:
	668	+ case RDMA_CM_EVENT_DISCONNECTED:
669	669	case RDMA_CM_EVENT_TIMEWAIT_EXIT: /* FALLTHRU */
670	670	ret = isert_disconnected_handler(cma_id, event->event);
671	671	break;
@@ -684,7 +684,7 @@ isert_cma_handler(struct rdma_cm_id cma_id, struct rdma_cm_event event) · 12 unmodified lines
684	684	case RDMA_CM_EVENT_REJECTED:
685	685	isert_info("Connection rejected: %s\n",
686	686	rdma_reject_msg(cma_id, event->status));
687		− /* fall through */
	687	+ fallthrough;
688	688	case RDMA_CM_EVENT_UNREACHABLE:
689	689	case RDMA_CM_EVENT_CONNECT_ERROR:
690	690	ret = isert_connect_error(cma_id);
@@ -1470,7 +1470,7 @@ isert_put_cmd(struct isert_cmd *isert_cmd, bool comp_err) · 779 unmodified lines
1470	1470	transport_generic_free_cmd(&cmd->se_cmd, 0);
1471	1471	break;
1472	1472	}
1473		− /* fall through */
	1473	+ fallthrough;
1474	1474	default:
1475	1475	iscsit_release_cmd(cmd);
1476	1476	break;
@@ -1648,7 +1648,7 @@ isert_do_control_comp(struct work_struct *work) · 171 unmodified lines
1648	1648	switch (cmd->i_state) {
1649	1649	case ISTATE_SEND_TASKMGTRSP:
1650	1650	iscsit_tmr_post_handler(cmd, cmd->conn);
1651		− /* fall through */
	1651	+ fallthrough;
1652	1652	case ISTATE_SEND_REJECT:
1653	1653	case ISTATE_SEND_TEXTRSP:
1654	1654	cmd->i_state = ISTATE_SENT_STATUS;

drivers/infiniband/ulp/opa_vnic/opa_vnic_vema.c+0−1

@@ -547,7 +547,6 @@ static void vema_get(struct opa_vnic_vema_port *port, · 546 unmodified lines
547	547	vema_get_mac_entries(port, recvd_mad, rsp_mad);
548	548	break;
549	549	case OPA_EM_ATTR_IFACE_UCAST_MACS:
550		− /* fall through */
551	550	case OPA_EM_ATTR_IFACE_MCAST_MACS:
552	551	vema_get_mac_list(port, recvd_mad, rsp_mad, attr_id);
553	552	break;

drivers/input/joystick/fsia6b.c+2−2

@@ -102,12 +102,12 @@ static irqreturn_t fsia6b_serio_irq(struct serio *serio, · 101 unmodified lines
102	102	input_report_key(fsia6b->dev,
103	103	sw_id++,
104	104	sw_state == 0);
105		− /* fall-through */
	105	+ fallthrough;
106	106	case '2':
107	107	input_report_key(fsia6b->dev,
108	108	sw_id++,
109	109	sw_state == 1);
110		− /* fall-through */
	110	+ fallthrough;
111	111	case '1':
112	112	input_report_key(fsia6b->dev,
113	113	sw_id++,

drivers/input/joystick/gamecon.c+0−1

@@ -885,7 +885,6 @@ static int gc_setup_pad(struct gc *gc, int idx, int pad_type) · 884 unmodified lines
885	885
886	886	case GC_MULTI:
887	887	input_set_capability(input_dev, EV_KEY, BTN_TRIGGER);
888		− /* fall through */
889	888	break;
890	889
891	890	case GC_PSX:

drivers/input/tablet/wacom_serial4.c+1−1

@@ -213,7 +213,7 @@ static void wacom_handle_model_response(struct wacom *wacom) · 212 unmodified lines
213	213	case 0x3731: /* PL-710 */
214	214	wacom->res_x = 2540;
215	215	wacom->res_y = 2540;
216		− /* fall through */
	216	+ fallthrough;
217	217	case 0x3535: /* PL-550 */
218	218	case 0x3830: /* PL-800 */
219	219	wacom->extra_z_bits = 2;

drivers/input/touchscreen/atmel_mxt_ts.c+1−1

@@ -477,7 +477,7 @@ static int mxt_lookup_bootloader_address(struct mxt_data *data, bool retry) · 476 unmodified lines
477	477	bootloader = appmode - 0x24;
478	478	break;
479	479	}
480		− /* Fall through - for normal case */
	480	+ fallthrough; /* for normal case */
481	481	case 0x4c:
482	482	case 0x4d:
483	483	case 0x5a:

drivers/input/touchscreen/wm831x-ts.c+1−1

@@ -290,7 +290,7 @@ static int wm831x_ts_probe(struct platform_device *pdev) · 289 unmodified lines
290	290	default:
291	291	dev_err(&pdev->dev, "Unsupported ISEL setting: %d\n",
292	292	pdata->isel);
293		− /* Fall through */
	293	+ fallthrough;
294	294	case 200:
295	295	case 0:
296	296	wm831x_set_bits(wm831x, WM831X_TOUCH_CONTROL_2,

drivers/iommu/amd/Kconfig+1−1

@@ -10,7 +10,7 @@ config AMD_IOMMU · 9 unmodified lines
10	10	select IOMMU_API
11	11	select IOMMU_IOVA
12	12	select IOMMU_DMA
13		− depends on X86_64 && PCI && ACPI
	13	+ depends on X86_64 && PCI && ACPI && HAVE_CMPXCHG_DOUBLE
14	14	help
15	15	With this option you can enable support for AMD IOMMU hardware in
16	16	your system. An IOMMU is a hardware component which provides

drivers/iommu/amd/init.c+20−3

@@ -1511,7 +1511,14 @@ static int __init init_iommu_one(struct amd_iommu iommu, struct ivhd_header h) · 1510 unmodified lines
1511	1511	iommu->mmio_phys_end = MMIO_REG_END_OFFSET;
1512	1512	else
1513	1513	iommu->mmio_phys_end = MMIO_CNTR_CONF_OFFSET;
1514		− if (((h->efr_attr & (0x1 << IOMMU_FEAT_GASUP_SHIFT)) == 0))
	1514	+
	1515	+ /*
	1516	+ * Note: GA (128-bit IRTE) mode requires cmpxchg16b supports.
	1517	+ * GAM also requires GA mode. Therefore, we need to
	1518	+ * check cmpxchg16b support before enabling it.
	1519	+ */
	1520	+ if (!boot_cpu_has(X86_FEATURE_CX16) \|\|
	1521	+ ((h->efr_attr & (0x1 << IOMMU_FEAT_GASUP_SHIFT)) == 0))
1515	1522	amd_iommu_guest_ir = AMD_IOMMU_GUEST_IR_LEGACY;
1516	1523	break;
1517	1524	case 0x11:
@@ -1520,8 +1527,18 @@ static int __init init_iommu_one(struct amd_iommu iommu, struct ivhd_header h) · 2 unmodified lines
1520	1527	iommu->mmio_phys_end = MMIO_REG_END_OFFSET;
1521	1528	else
1522	1529	iommu->mmio_phys_end = MMIO_CNTR_CONF_OFFSET;
1523		− if (((h->efr_reg & (0x1 << IOMMU_EFR_GASUP_SHIFT)) == 0))
	1530	+
	1531	+ /*
	1532	+ * Note: GA (128-bit IRTE) mode requires cmpxchg16b supports.
	1533	+ * XT, GAM also requires GA mode. Therefore, we need to
	1534	+ * check cmpxchg16b support before enabling them.
	1535	+ */
	1536	+ if (!boot_cpu_has(X86_FEATURE_CX16) \|\|
	1537	+ ((h->efr_reg & (0x1 << IOMMU_EFR_GASUP_SHIFT)) == 0)) {
1524	1538	amd_iommu_guest_ir = AMD_IOMMU_GUEST_IR_LEGACY;
	1539	+ break;
	1540	+ }
	1541	+
1525	1542	/*
1526	1543	* Note: Since iommu_update_intcapxt() leverages
1527	1544	* the IOMMU MMIO access to MSI capability block registers
@@ -2258,7 +2275,7 @@ static void iommu_enable_ga(struct amd_iommu *iommu) · 730 unmodified lines
2258	2275	switch (amd_iommu_guest_ir) {
2259	2276	case AMD_IOMMU_GUEST_IR_VAPIC:
2260	2277	iommu_feature_enable(iommu, CONTROL_GAM_EN);
2261		− /* Fall through */
	2278	+ fallthrough;
2262	2279	case AMD_IOMMU_GUEST_IR_LEGACY_GA:
2263	2280	iommu_feature_enable(iommu, CONTROL_GA_EN);
2264	2281	iommu->irte_ops = &irte_128_ops;

drivers/iommu/amd/iommu.c+21−5

@@ -2659,7 +2659,12 @@ static int amd_iommu_def_domain_type(struct device *dev) · 2658 unmodified lines
2659	2659	if (!dev_data)
2660	2660	return 0;
2661	2661
2662		− if (dev_data->iommu_v2)
	2662	+ /*
	2663	+ * Do not identity map IOMMUv2 capable devices when memory encryption is
	2664	+ * active, because some of those devices (AMD GPUs) don't have the
	2665	+ * encryption bit in their DMA-mask and require remapping.
	2666	+ */
	2667	+ if (!mem_encrypt_active() && dev_data->iommu_v2)
2663	2668	return IOMMU_DOMAIN_IDENTITY;
2664	2669
2665	2670	return 0;
@@ -3292,6 +3297,7 @@ out: · 626 unmodified lines
3292	3297	static int modify_irte_ga(u16 devid, int index, struct irte_ga *irte,
3293	3298	struct amd_ir_data *data)
3294	3299	{
	3300	+ bool ret;
3295	3301	struct irq_remap_table *table;
3296	3302	struct amd_iommu *iommu;
3297	3303	unsigned long flags;
@@ -3309,10 +3315,18 @@ static int modify_irte_ga(u16 devid, int index, struct irte_ga *irte, · 11 unmodified lines
3309	3315
3310	3316	entry = (struct irte_ga *)table->table;
3311	3317	entry = &entry[index];
3312		− entry->lo.fields_remap.valid = 0;
3313		− entry->hi.val = irte->hi.val;
3314		− entry->lo.val = irte->lo.val;
3315		− entry->lo.fields_remap.valid = 1;
	3318	+
	3319	+ ret = cmpxchg_double(&entry->lo.val, &entry->hi.val,
	3320	+ entry->lo.val, entry->hi.val,
	3321	+ irte->lo.val, irte->hi.val);
	3322	+ /*
	3323	+ * We use cmpxchg16 to atomically update the 128-bit IRTE,
	3324	+ * and it cannot be updated by the hardware or other processors
	3325	+ * behind us, so the return value of cmpxchg16 should be the
	3326	+ * same as the old value.
	3327	+ */
	3328	+ WARN_ON(!ret);
	3329	+
3316	3330	if (data)
3317	3331	data->ref = entry;
3318	3332
@@ -3850,6 +3864,7 @@ int amd_iommu_deactivate_guest_mode(void *data) · 531 unmodified lines
3850	3864	struct amd_ir_data ir_data = (struct amd_ir_data )data;
3851	3865	struct irte_ga entry = (struct irte_ga ) ir_data->entry;
3852	3866	struct irq_cfg *cfg = ir_data->cfg;
	3867	+ u64 valid = entry->lo.fields_remap.valid;
3853	3868
3854	3869	if (!AMD_IOMMU_GUEST_IR_VAPIC(amd_iommu_guest_ir) \|\|
3855	3870	!entry \|\| !entry->lo.fields_vapic.guest_mode)
@@ -3858,6 +3873,7 @@ int amd_iommu_deactivate_guest_mode(void *data) · 2 unmodified lines
3858	3873	entry->lo.val = 0;
3859	3874	entry->hi.val = 0;
3860	3875
	3876	+ entry->lo.fields_remap.valid = valid;
3861	3877	entry->lo.fields_remap.dm = apic->irq_dest_mode;
3862	3878	entry->lo.fields_remap.int_type = apic->irq_delivery_mode;
3863	3879	entry->hi.fields.vector = cfg->vector;

drivers/iommu/amd/iommu_v2.c+7−0

@@ -737,6 +737,13 @@ int amd_iommu_init_device(struct pci_dev *pdev, int pasids) · 736 unmodified lines
737	737
738	738	might_sleep();
739	739
	740	+ /*
	741	+ * When memory encryption is active the device is likely not in a
	742	+ * direct-mapped domain. Forbid using IOMMUv2 functionality for now.
	743	+ */
	744	+ if (mem_encrypt_active())
	745	+ return -ENODEV;
	746	+
740	747	if (!amd_iommu_v2_supported())
741	748	return -ENODEV;
742	749

drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c+5−6

@@ -903,7 +903,7 @@ static int arm_smmu_cmdq_build_cmd(u64 cmd, struct arm_smmu_cmdq_ent ent) · 902 unmodified lines
903	903	break;
904	904	case CMDQ_OP_CFGI_CD:
905	905	cmd[0] \|= FIELD_PREP(CMDQ_CFGI_0_SSID, ent->cfgi.ssid);
906		− /* Fallthrough */
	906	+ fallthrough;
907	907	case CMDQ_OP_CFGI_STE:
908	908	cmd[0] \|= FIELD_PREP(CMDQ_CFGI_0_SID, ent->cfgi.sid);
909	909	cmd[1] \|= FIELD_PREP(CMDQ_CFGI_1_LEAF, ent->cfgi.leaf);
@@ -936,7 +936,7 @@ static int arm_smmu_cmdq_build_cmd(u64 cmd, struct arm_smmu_cmdq_ent ent) · 26 unmodified lines
936	936	break;
937	937	case CMDQ_OP_TLBI_NH_ASID:
938	938	cmd[0] \|= FIELD_PREP(CMDQ_TLBI_0_ASID, ent->tlbi.asid);
939		− /* Fallthrough */
	939	+ fallthrough;
940	940	case CMDQ_OP_TLBI_S12_VMALL:
941	941	cmd[0] \|= FIELD_PREP(CMDQ_TLBI_0_VMID, ent->tlbi.vmid);
942	942	break;
@@ -1036,7 +1036,6 @@ static void arm_smmu_cmdq_skip_err(struct arm_smmu_device *smmu) · 93 unmodified lines
1036	1036	*/
1037	1037	return;
1038	1038	case CMDQ_ERR_CERROR_ILL_IDX:
1039		− /* Fallthrough */
1040	1039	default:
1041	1040	break;
1042	1041	}
@@ -3758,7 +3757,7 @@ static int arm_smmu_device_hw_probe(struct arm_smmu_device *smmu) · 2715 unmodified lines
3758	3757	switch (FIELD_GET(IDR0_STALL_MODEL, reg)) {
3759	3758	case IDR0_STALL_MODEL_FORCE:
3760	3759	smmu->features \|= ARM_SMMU_FEAT_STALL_FORCE;
3761		− /* Fallthrough */
	3760	+ fallthrough;
3762	3761	case IDR0_STALL_MODEL_STALL:
3763	3762	smmu->features \|= ARM_SMMU_FEAT_STALLS;
3764	3763	}
@@ -3778,7 +3777,7 @@ static int arm_smmu_device_hw_probe(struct arm_smmu_device *smmu) · 13 unmodified lines
3778	3777	switch (FIELD_GET(IDR0_TTF, reg)) {
3779	3778	case IDR0_TTF_AARCH32_64:
3780	3779	smmu->ias = 40;
3781		− /* Fallthrough */
	3780	+ fallthrough;
3782	3781	case IDR0_TTF_AARCH64:
3783	3782	break;
3784	3783	default:
@@ -3875,7 +3874,7 @@ static int arm_smmu_device_hw_probe(struct arm_smmu_device *smmu) · 90 unmodified lines
3875	3874	default:
3876	3875	dev_info(smmu->dev,
3877	3876	"unknown output address size. Truncating to 48-bit\n");
3878		− /* Fallthrough */
	3877	+ fallthrough;
3879	3878	case IDR5_OAS_48_BIT:
3880	3879	smmu->oas = 48;
3881	3880	}

drivers/iommu/intel/iommu.c+62−53

@@ -123,29 +123,29 @@ static inline unsigned int level_to_offset_bits(int level) · 122 unmodified lines
123	123	return (level - 1) * LEVEL_STRIDE;
124	124	}
125	125
126		−static inline int pfn_level_offset(unsigned long pfn, int level)
	126	+static inline int pfn_level_offset(u64 pfn, int level)
127	127	{
128	128	return (pfn >> level_to_offset_bits(level)) & LEVEL_MASK;
129	129	}
130	130
131		−static inline unsigned long level_mask(int level)
	131	+static inline u64 level_mask(int level)
132	132	{
133		− return -1UL << level_to_offset_bits(level);
	133	+ return -1ULL << level_to_offset_bits(level);
134	134	}
135	135
136		−static inline unsigned long level_size(int level)
	136	+static inline u64 level_size(int level)
137	137	{
138		− return 1UL << level_to_offset_bits(level);
	138	+ return 1ULL << level_to_offset_bits(level);
139	139	}
140	140
141		−static inline unsigned long align_to_level(unsigned long pfn, int level)
	141	+static inline u64 align_to_level(u64 pfn, int level)
142	142	{
143	143	return (pfn + level_size(level) - 1) & level_mask(level);
144	144	}
145	145
146	146	static inline unsigned long lvl_to_nr_pages(unsigned int lvl)
147	147	{
148		− return 1 << min_t(int, (lvl - 1) * LEVEL_STRIDE, MAX_AGAW_PFN_WIDTH);
	148	+ return 1UL << min_t(int, (lvl - 1) * LEVEL_STRIDE, MAX_AGAW_PFN_WIDTH);
149	149	}
150	150
151	151	/* VT-d pages must always be _smaller_ than MM pages. Otherwise things
@@ -364,7 +364,6 @@ static int iommu_skip_te_disable; · 212 unmodified lines
364	364	int intel_iommu_gfx_mapped;
365	365	EXPORT_SYMBOL_GPL(intel_iommu_gfx_mapped);
366	366
367		−#define DUMMY_DEVICE_DOMAIN_INFO ((struct device_domain_info *)(-1))
368	367	#define DEFER_DEVICE_DOMAIN_INFO ((struct device_domain_info *)(-2))
369	368	struct device_domain_info get_domain_info(struct device dev)
370	369	{
@@ -374,8 +373,7 @@ struct device_domain_info get_domain_info(struct device dev) · 3 unmodified lines
374	373	return NULL;
375	374
376	375	info = dev_iommu_priv_get(dev);
377		− if (unlikely(info == DUMMY_DEVICE_DOMAIN_INFO \|\|
378		− info == DEFER_DEVICE_DOMAIN_INFO))
	376	+ if (unlikely(info == DEFER_DEVICE_DOMAIN_INFO))
379	377	return NULL;
380	378
381	379	return info;
@@ -742,11 +740,6 @@ struct context_entry iommu_context_addr(struct intel_iommu iommu, u8 bus, · 360 unmodified lines
742	740	return &context[devfn];
743	741	}
744	742
745		−static int iommu_dummy(struct device *dev)
746		−{
747		− return dev_iommu_priv_get(dev) == DUMMY_DEVICE_DOMAIN_INFO;
748		−}
749		−
750	743	static bool attach_deferred(struct device *dev)
751	744	{
752	745	return dev_iommu_priv_get(dev) == DEFER_DEVICE_DOMAIN_INFO;
@@ -779,6 +772,53 @@ is_downstream_to_pci_bridge(struct device dev, struct device bridge) · 26 unmodified lines
779	772	return false;
780	773	}
781	774
	775	+static bool quirk_ioat_snb_local_iommu(struct pci_dev *pdev)
	776	+{
	777	+ struct dmar_drhd_unit *drhd;
	778	+ u32 vtbar;
	779	+ int rc;
	780	+
	781	+ /* We know that this device on this chipset has its own IOMMU.
	782	+ * If we find it under a different IOMMU, then the BIOS is lying
	783	+ * to us. Hope that the IOMMU for this device is actually
	784	+ * disabled, and it needs no translation...
	785	+ */
	786	+ rc = pci_bus_read_config_dword(pdev->bus, PCI_DEVFN(0, 0), 0xb0, &vtbar);
	787	+ if (rc) {
	788	+ /* "can't" happen */
	789	+ dev_info(&pdev->dev, "failed to run vt-d quirk\n");
	790	+ return false;
	791	+ }
	792	+ vtbar &= 0xffff0000;
	793	+
	794	+ /* we know that the this iommu should be at offset 0xa000 from vtbar */
	795	+ drhd = dmar_find_matched_drhd_unit(pdev);
	796	+ if (!drhd \|\| drhd->reg_base_addr - vtbar != 0xa000) {
	797	+ pr_warn_once(FW_BUG "BIOS assigned incorrect VT-d unit for Intel(R) QuickData Technology device\n");
	798	+ add_taint(TAINT_FIRMWARE_WORKAROUND, LOCKDEP_STILL_OK);
	799	+ return true;
	800	+ }
	801	+
	802	+ return false;
	803	+}
	804	+
	805	+static bool iommu_is_dummy(struct intel_iommu iommu, struct device dev)
	806	+{
	807	+ if (!iommu \|\| iommu->drhd->ignored)
	808	+ return true;
	809	+
	810	+ if (dev_is_pci(dev)) {
	811	+ struct pci_dev *pdev = to_pci_dev(dev);
	812	+
	813	+ if (pdev->vendor == PCI_VENDOR_ID_INTEL &&
	814	+ pdev->device == PCI_DEVICE_ID_INTEL_IOAT_SNB &&
	815	+ quirk_ioat_snb_local_iommu(pdev))
	816	+ return true;
	817	+ }
	818	+
	819	+ return false;
	820	+}
	821	+
782	822	struct intel_iommu device_to_iommu(struct device dev, u8 bus, u8 devfn)
783	823	{
784	824	struct dmar_drhd_unit *drhd = NULL;
@@ -788,7 +828,7 @@ struct intel_iommu device_to_iommu(struct device dev, u8 bus, u8 devfn) · 3 unmodified lines
788	828	u16 segment = 0;
789	829	int i;
790	830
791		− if (!dev \|\| iommu_dummy(dev))
	831	+ if (!dev)
792	832	return NULL;
793	833
794	834	if (dev_is_pci(dev)) {
@@ -805,7 +845,7 @@ struct intel_iommu device_to_iommu(struct device dev, u8 bus, u8 devfn) · 10 unmodified lines
805	845	dev = &ACPI_COMPANION(dev)->dev;
806	846
807	847	rcu_read_lock();
808		− for_each_active_iommu(iommu, drhd) {
	848	+ for_each_iommu(iommu, drhd) {
809	849	if (pdev && segment != drhd->segment)
810	850	continue;
811	851
@@ -841,6 +881,9 @@ struct intel_iommu device_to_iommu(struct device dev, u8 bus, u8 devfn) · 29 unmodified lines
841	881	}
842	882	iommu = NULL;
843	883	out:
	884	+ if (iommu_is_dummy(iommu, dev))
	885	+ iommu = NULL;
	886	+
844	887	rcu_read_unlock();
845	888
846	889	return iommu;
@@ -2447,7 +2490,7 @@ struct dmar_domain find_domain(struct device dev) · 1600 unmodified lines
2447	2490	{
2448	2491	struct device_domain_info *info;
2449	2492
2450		− if (unlikely(attach_deferred(dev) \|\| iommu_dummy(dev)))
	2493	+ if (unlikely(attach_deferred(dev)))
2451	2494	return NULL;
2452	2495
2453	2496	/* No lock here, assumes no domain exit in normal case */
@@ -3989,35 +4032,6 @@ static void __init iommu_exit_mempool(void) · 1535 unmodified lines
3989	4032	iova_cache_put();
3990	4033	}
3991	4034
3992		−static void quirk_ioat_snb_local_iommu(struct pci_dev *pdev)
3993		−{
3994		− struct dmar_drhd_unit *drhd;
3995		− u32 vtbar;
3996		− int rc;
3997		−
3998		− /* We know that this device on this chipset has its own IOMMU.
3999		− * If we find it under a different IOMMU, then the BIOS is lying
4000		− * to us. Hope that the IOMMU for this device is actually
4001		− * disabled, and it needs no translation...
4002		− */
4003		− rc = pci_bus_read_config_dword(pdev->bus, PCI_DEVFN(0, 0), 0xb0, &vtbar);
4004		− if (rc) {
4005		− /* "can't" happen */
4006		− dev_info(&pdev->dev, "failed to run vt-d quirk\n");
4007		− return;
4008		− }
4009		− vtbar &= 0xffff0000;
4010		−
4011		− /* we know that the this iommu should be at offset 0xa000 from vtbar */
4012		− drhd = dmar_find_matched_drhd_unit(pdev);
4013		− if (!drhd \|\| drhd->reg_base_addr - vtbar != 0xa000) {
4014		− pr_warn_once(FW_BUG "BIOS assigned incorrect VT-d unit for Intel(R) QuickData Technology device\n");
4015		− add_taint(TAINT_FIRMWARE_WORKAROUND, LOCKDEP_STILL_OK);
4016		− dev_iommu_priv_set(&pdev->dev, DUMMY_DEVICE_DOMAIN_INFO);
4017		− }
4018		−}
4019		−DECLARE_PCI_FIXUP_ENABLE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_IOAT_SNB, quirk_ioat_snb_local_iommu);
4020		−
4021	4035	static void __init init_no_remapping_devices(void)
4022	4036	{
4023	4037	struct dmar_drhd_unit *drhd;
@@ -4049,12 +4063,8 @@ static void __init init_no_remapping_devices(void) · 25 unmodified lines
4049	4063	/* This IOMMU has only gfx devices. Either bypass it or
4050	4064	set the gfx_mapped flag, as appropriate */
4051	4065	drhd->gfx_dedicated = 1;
4052		− if (!dmar_map_gfx) {
	4066	+ if (!dmar_map_gfx)
4053	4067	drhd->ignored = 1;
4054		− for_each_active_dev_scope(drhd->devices,
4055		− drhd->devices_cnt, i, dev)
4056		− dev_iommu_priv_set(dev, DUMMY_DEVICE_DOMAIN_INFO);
4057		− }
4058	4068	}
4059	4069	}
4060	4070
@@ -5070,7 +5080,6 @@ static struct iommu_domain *intel_iommu_domain_alloc(unsigned type) · 1009 unmodified lines
5070	5080
5071	5081	switch (type) {
5072	5082	case IOMMU_DOMAIN_DMA:
5073		− /* fallthrough */
5074	5083	case IOMMU_DOMAIN_UNMANAGED:
5075	5084	dmar_domain = alloc_domain(0);
5076	5085	if (!dmar_domain) {

drivers/iommu/intel/irq_remapping.c+8−2

@@ -508,12 +508,18 @@ static void iommu_enable_irq_remapping(struct intel_iommu *iommu) · 507 unmodified lines
508	508
509	509	/* Enable interrupt-remapping */
510	510	iommu->gcmd \|= DMA_GCMD_IRE;
511		− iommu->gcmd &= ~DMA_GCMD_CFI; /* Block compatibility-format MSIs */
512	511	writel(iommu->gcmd, iommu->reg + DMAR_GCMD_REG);
513		−
514	512	IOMMU_WAIT_OP(iommu, DMAR_GSTS_REG,
515	513	readl, (sts & DMA_GSTS_IRES), sts);
516	514
	515	+ /* Block compatibility-format MSIs */
	516	+ if (sts & DMA_GSTS_CFIS) {
	517	+ iommu->gcmd &= ~DMA_GCMD_CFI;
	518	+ writel(iommu->gcmd, iommu->reg + DMAR_GCMD_REG);
	519	+ IOMMU_WAIT_OP(iommu, DMAR_GSTS_REG,
	520	+ readl, !(sts & DMA_GSTS_CFIS), sts);
	521	+ }
	522	+
517	523	/*
518	524	* With CFI clear in the Global Command register, we should be
519	525	* protected from dangerous (i.e. compatibility) interrupts

drivers/iommu/virtio-iommu.c+1−1

@@ -440,7 +440,7 @@ static int viommu_add_resv_mem(struct viommu_endpoint *vdev, · 439 unmodified lines
440	440	default:
441	441	dev_warn(vdev->dev, "unknown resv mem subtype 0x%x\n",
442	442	mem->subtype);
443		− /* Fall-through */
	443	+ fallthrough;
444	444	case VIRTIO_IOMMU_RESV_MEM_T_RESERVED:
445	445	region = iommu_alloc_resv_region(start, size, 0,
446	446	IOMMU_RESV_RESERVED);

drivers/irqchip/Kconfig+1−1

@@ -425,7 +425,7 @@ config GOLDFISH_PIC · 424 unmodified lines
425	425	for Goldfish based virtual platforms.
426	426
427	427	config QCOM_PDC
428		− tristate "QCOM PDC"
	428	+ bool "QCOM PDC"
429	429	depends on ARCH_QCOM
430	430	select IRQ_DOMAIN_HIERARCHY
431	431	help

drivers/irqchip/irq-gic-v3-its.c+2−2

@@ -2737,7 +2737,7 @@ static bool allocate_vpe_l2_table(int cpu, u32 id) · 2736 unmodified lines
2737	2737	switch (gpsz) {
2738	2738	default:
2739	2739	WARN_ON(1);
2740		− /* fall through */
	2740	+ fallthrough;
2741	2741	case GIC_PAGE_SIZE_4K:
2742	2742	psz = SZ_4K;
2743	2743	break;
@@ -2832,7 +2832,7 @@ static int allocate_vpe_l1_table(void) · 88 unmodified lines
2832	2832	switch (gpsz) {
2833	2833	default:
2834	2834	gpsz = GIC_PAGE_SIZE_4K;
2835		− /* fall through */
	2835	+ fallthrough;
2836	2836	case GIC_PAGE_SIZE_4K:
2837	2837	psz = SZ_4K;
2838	2838	break;

drivers/irqchip/irq-gic-v3.c+4−4

@@ -965,10 +965,10 @@ static void gic_cpu_sys_reg_init(void) · 964 unmodified lines
965	965	case 7:
966	966	write_gicreg(0, ICC_AP0R3_EL1);
967	967	write_gicreg(0, ICC_AP0R2_EL1);
968		− /* Fall through */
	968	+ fallthrough;
969	969	case 6:
970	970	write_gicreg(0, ICC_AP0R1_EL1);
971		− /* Fall through */
	971	+ fallthrough;
972	972	case 5:
973	973	case 4:
974	974	write_gicreg(0, ICC_AP0R0_EL1);
@@ -982,10 +982,10 @@ static void gic_cpu_sys_reg_init(void) · 7 unmodified lines
982	982	case 7:
983	983	write_gicreg(0, ICC_AP1R3_EL1);
984	984	write_gicreg(0, ICC_AP1R2_EL1);
985		− /* Fall through */
	985	+ fallthrough;
986	986	case 6:
987	987	write_gicreg(0, ICC_AP1R1_EL1);
988		− /* Fall through */
	988	+ fallthrough;
989	989	case 5:
990	990	case 4:
991	991	write_gicreg(0, ICC_AP1R0_EL1);

drivers/irqchip/irq-imx-gpcv2.c+1−1

@@ -259,7 +259,7 @@ static int __init imx_gpcv2_irqchip_init(struct device_node *node, · 258 unmodified lines
259	259	case 4:
260	260	writel_relaxed(~0, reg + GPC_IMR1_CORE2);
261	261	writel_relaxed(~0, reg + GPC_IMR1_CORE3);
262		− /* fall through */
	262	+ fallthrough;
263	263	case 2:
264	264	writel_relaxed(~0, reg + GPC_IMR1_CORE0);
265	265	writel_relaxed(~0, reg + GPC_IMR1_CORE1);

drivers/irqchip/irq-ingenic.c+1−1

@@ -125,7 +125,7 @@ static int __init ingenic_intc_of_init(struct device_node *node, · 124 unmodified lines
125	125	irq_reg_writel(gc, IRQ_MSK(32), JZ_REG_INTC_SET_MASK);
126	126	}
127	127
128		− if (request_irq(parent_irq, intc_cascade, 0,
	128	+ if (request_irq(parent_irq, intc_cascade, IRQF_NO_SUSPEND,
129	129	"SoC intc cascade interrupt", NULL))
130	130	pr_err("Failed to register SoC intc cascade interrupt\n");
131	131	return 0;

drivers/irqchip/irq-mips-gic.c+1−1

@@ -480,7 +480,7 @@ static int gic_irq_domain_map(struct irq_domain *d, unsigned int virq, · 479 unmodified lines
480	480	case GIC_LOCAL_INT_TIMER:
481	481	/* CONFIG_MIPS_CMP workaround (see __gic_init) */
482	482	map = GIC_MAP_PIN_MAP_TO_PIN \| timer_cpu_pin;
483		− /* fall-through */
	483	+ fallthrough;
484	484	case GIC_LOCAL_INT_PERFCTR:
485	485	case GIC_LOCAL_INT_FDC:
486	486	/*

drivers/irqchip/irq-mtk-cirq.c+1−3

@@ -295,6 +295,4 @@ out_free: · 294 unmodified lines
295	295	return ret;
296	296	}
297	297
298		−IRQCHIP_PLATFORM_DRIVER_BEGIN(mtk_cirq)
299		−IRQCHIP_MATCH("mediatek,mtk-cirq", mtk_cirq_of_init)
300		−IRQCHIP_PLATFORM_DRIVER_END(mtk_cirq)
	298	+IRQCHIP_DECLARE(mtk_cirq, "mediatek,mtk-cirq", mtk_cirq_of_init);

drivers/irqchip/irq-mtk-sysirq.c+1−3

@@ -231,6 +231,4 @@ out_free_chip: · 230 unmodified lines
231	231	kfree(chip_data);
232	232	return ret;
233	233	}
234		−IRQCHIP_PLATFORM_DRIVER_BEGIN(mtk_sysirq)
235		−IRQCHIP_MATCH("mediatek,mt6577-sysirq", mtk_sysirq_of_init)
236		−IRQCHIP_PLATFORM_DRIVER_END(mtk_sysirq)
	234	+IRQCHIP_DECLARE(mtk_sysirq, "mediatek,mt6577-sysirq", mtk_sysirq_of_init);

drivers/irqchip/irq-stm32-exti.c+12−2

@@ -416,6 +416,16 @@ static void stm32_irq_ack(struct irq_data *d) · 415 unmodified lines
416	416	irq_gc_unlock(gc);
417	417	}
418	418
	419	+/* directly set the target bit without reading first. */
	420	+static inline void stm32_exti_write_bit(struct irq_data *d, u32 reg)
	421	+{
	422	+ struct stm32_exti_chip_data *chip_data = irq_data_get_irq_chip_data(d);
	423	+ void __iomem *base = chip_data->host_data->base;
	424	+ u32 val = BIT(d->hwirq % IRQS_PER_BANK);
	425	+
	426	+ writel_relaxed(val, base + reg);
	427	+}
	428	+
419	429	static inline u32 stm32_exti_set_bit(struct irq_data *d, u32 reg)
420	430	{
421	431	struct stm32_exti_chip_data *chip_data = irq_data_get_irq_chip_data(d);
@@ -449,9 +459,9 @@ static void stm32_exti_h_eoi(struct irq_data *d) · 27 unmodified lines
449	459
450	460	raw_spin_lock(&chip_data->rlock);
451	461
452		− stm32_exti_set_bit(d, stm32_bank->rpr_ofst);
	462	+ stm32_exti_write_bit(d, stm32_bank->rpr_ofst);
453	463	if (stm32_bank->fpr_ofst != UNDEF_REG)
454		− stm32_exti_set_bit(d, stm32_bank->fpr_ofst);
	464	+ stm32_exti_write_bit(d, stm32_bank->fpr_ofst);
455	465
456	466	raw_spin_unlock(&chip_data->rlock);
457	467

drivers/irqchip/irq-ti-sci-inta.c+79−16

@@ -8,6 +8,7 @@ · 7 unmodified lines
8	8
9	9	#include <linux/err.h>
10	10	#include <linux/io.h>
	11	+#include <linux/irq.h>
11	12	#include <linux/irqchip.h>
12	13	#include <linux/irqdomain.h>
13	14	#include <linux/interrupt.h>
@@ -83,6 +84,7 @@ struct ti_sci_inta_vint_desc { · 69 unmodified lines
83	84	* @vint_mutex: Mutex to protect vint_list
84	85	* @base: Base address of the memory mapped IO registers
85	86	* @pdev: Pointer to platform device.
	87	+ * @ti_sci_id: TI-SCI device identifier
86	88	*/
87	89	struct ti_sci_inta_irq_domain {
88	90	const struct ti_sci_handle *sci;
@@ -93,6 +95,7 @@ struct ti_sci_inta_irq_domain { · 4 unmodified lines
93	95	struct mutex vint_mutex;
94	96	void __iomem *base;
95	97	struct platform_device *pdev;
	98	+ u32 ti_sci_id;
96	99	};
97	100
98	101	#define to_vint_desc(e, i) container_of(e, struct ti_sci_inta_vint_desc, \
@@ -128,6 +131,37 @@ static void ti_sci_inta_irq_handler(struct irq_desc *desc) · 29 unmodified lines
128	131	chained_irq_exit(irq_desc_get_chip(desc), desc);
129	132	}
130	133
	134	+/**
	135	+ * ti_sci_inta_xlate_irq() - Translate hwirq to parent's hwirq.
	136	+ * @inta: IRQ domain corresponding to Interrupt Aggregator
	137	+ * @irq: Hardware irq corresponding to the above irq domain
	138	+ *
	139	+ * Return parent irq number if translation is available else -ENOENT.
	140	+ */
	141	+static int ti_sci_inta_xlate_irq(struct ti_sci_inta_irq_domain *inta,
	142	+ u16 vint_id)
	143	+{
	144	+ struct device_node *np = dev_of_node(&inta->pdev->dev);
	145	+ u32 base, parent_base, size;
	146	+ const __be32 *range;
	147	+ int len;
	148	+
	149	+ range = of_get_property(np, "ti,interrupt-ranges", &len);
	150	+ if (!range)
	151	+ return vint_id;
	152	+
	153	+ for (len /= sizeof(*range); len >= 3; len -= 3) {
	154	+ base = be32_to_cpu(*range++);
	155	+ parent_base = be32_to_cpu(*range++);
	156	+ size = be32_to_cpu(*range++);
	157	+
	158	+ if (base <= vint_id && vint_id < base + size)
	159	+ return vint_id - base + parent_base;
	160	+ }
	161	+
	162	+ return -ENOENT;
	163	+}
	164	+
131	165	/**
132	166	* ti_sci_inta_alloc_parent_irq() - Allocate parent irq to Interrupt aggregator
133	167	* @domain: IRQ domain corresponding to Interrupt Aggregator
@@ -139,30 +173,52 @@ static struct ti_sci_inta_vint_desc *ti_sci_inta_alloc_parent_irq(struct irq_dom · 5 unmodified lines
139	173	struct ti_sci_inta_irq_domain *inta = domain->host_data;
140	174	struct ti_sci_inta_vint_desc *vint_desc;
141	175	struct irq_fwspec parent_fwspec;
	176	+ struct device_node *parent_node;
142	177	unsigned int parent_virq;
143		− u16 vint_id;
	178	+ u16 vint_id, p_hwirq;
	179	+ int ret;
144	180
145	181	vint_id = ti_sci_get_free_resource(inta->vint);
146	182	if (vint_id == TI_SCI_RESOURCE_NULL)
147	183	return ERR_PTR(-EINVAL);
148	184
	185	+ p_hwirq = ti_sci_inta_xlate_irq(inta, vint_id);
	186	+ if (p_hwirq < 0) {
	187	+ ret = p_hwirq;
	188	+ goto free_vint;
	189	+ }
	190	+
149	191	vint_desc = kzalloc(sizeof(*vint_desc), GFP_KERNEL);
150		− if (!vint_desc)
151		− return ERR_PTR(-ENOMEM);
	192	+ if (!vint_desc) {
	193	+ ret = -ENOMEM;
	194	+ goto free_vint;
	195	+ }
152	196
153	197	vint_desc->domain = domain;
154	198	vint_desc->vint_id = vint_id;
155	199	INIT_LIST_HEAD(&vint_desc->list);
156	200
157		− parent_fwspec.fwnode = of_node_to_fwnode(of_irq_find_parent(dev_of_node(&inta->pdev->dev)));
158		− parent_fwspec.param_count = 2;
159		− parent_fwspec.param[0] = inta->pdev->id;
160		− parent_fwspec.param[1] = vint_desc->vint_id;
	201	+ parent_node = of_irq_find_parent(dev_of_node(&inta->pdev->dev));
	202	+ parent_fwspec.fwnode = of_node_to_fwnode(parent_node);
	203	+
	204	+ if (of_device_is_compatible(parent_node, "arm,gic-v3")) {
	205	+ /* Parent is GIC */
	206	+ parent_fwspec.param_count = 3;
	207	+ parent_fwspec.param[0] = 0;
	208	+ parent_fwspec.param[1] = p_hwirq - 32;
	209	+ parent_fwspec.param[2] = IRQ_TYPE_LEVEL_HIGH;
	210	+ } else {
	211	+ /* Parent is Interrupt Router */
	212	+ parent_fwspec.param_count = 1;
	213	+ parent_fwspec.param[0] = p_hwirq;
	214	+ }
161	215
162	216	parent_virq = irq_create_fwspec_mapping(&parent_fwspec);
163	217	if (parent_virq == 0) {
164		− kfree(vint_desc);
165		− return ERR_PTR(-EINVAL);
	218	+ dev_err(&inta->pdev->dev, "Parent IRQ allocation failed\n");
	219	+ ret = -EINVAL;
	220	+ goto free_vint_desc;
	221	+
166	222	}
167	223	vint_desc->parent_virq = parent_virq;
168	224
@@ -171,6 +227,11 @@ static struct ti_sci_inta_vint_desc *ti_sci_inta_alloc_parent_irq(struct irq_dom · 2 unmodified lines
171	227	ti_sci_inta_irq_handler, vint_desc);
172	228
173	229	return vint_desc;
	230	+free_vint_desc:
	231	+ kfree(vint_desc);
	232	+free_vint:
	233	+ ti_sci_release_resource(inta->vint, vint_id);
	234	+ return ERR_PTR(ret);
174	235	}
175	236
176	237	/**
@@ -202,7 +263,7 @@ static struct ti_sci_inta_event_desc *ti_sci_inta_alloc_event(struct ti_sci_inta · 25 unmodified lines
202	263
203	264	err = inta->sci->ops.rm_irq_ops.set_event_map(inta->sci,
204	265	dev_id, dev_index,
205		− inta->pdev->id,
	266	+ inta->ti_sci_id,
206	267	vint_desc->vint_id,
207	268	event_desc->global_event,
208	269	free_bit);
@@ -299,7 +360,7 @@ static void ti_sci_inta_free_irq(struct ti_sci_inta_event_desc *event_desc, · 90 unmodified lines
299	360	inta->sci->ops.rm_irq_ops.free_event_map(inta->sci,
300	361	HWIRQ_TO_DEVID(hwirq),
301	362	HWIRQ_TO_IRQID(hwirq),
302		− inta->pdev->id,
	363	+ inta->ti_sci_id,
303	364	vint_desc->vint_id,
304	365	event_desc->global_event,
305	366	event_desc->vint_bit);
@@ -547,21 +608,21 @@ static int ti_sci_inta_irq_domain_probe(struct platform_device *pdev) · 241 unmodified lines
547	608	return ret;
548	609	}
549	610
550		− ret = of_property_read_u32(dev->of_node, "ti,sci-dev-id", &pdev->id);
	611	+ ret = of_property_read_u32(dev->of_node, "ti,sci-dev-id", &inta->ti_sci_id);
551	612	if (ret) {
552	613	dev_err(dev, "missing 'ti,sci-dev-id' property\n");
553	614	return -EINVAL;
554	615	}
555	616
556		− inta->vint = devm_ti_sci_get_of_resource(inta->sci, dev, pdev->id,
557		− "ti,sci-rm-range-vint");
	617	+ inta->vint = devm_ti_sci_get_resource(inta->sci, dev, inta->ti_sci_id,
	618	+ TI_SCI_RESASG_SUBTYPE_IA_VINT);
558	619	if (IS_ERR(inta->vint)) {
559	620	dev_err(dev, "VINT resource allocation failed\n");
560	621	return PTR_ERR(inta->vint);
561	622	}
562	623
563		− inta->global_event = devm_ti_sci_get_of_resource(inta->sci, dev, pdev->id,
564		− "ti,sci-rm-range-global-event");
	624	+ inta->global_event = devm_ti_sci_get_resource(inta->sci, dev, inta->ti_sci_id,
	625	+ TI_SCI_RESASG_SUBTYPE_GLOBAL_EVENT_SEVT);
565	626	if (IS_ERR(inta->global_event)) {
566	627	dev_err(dev, "Global event resource allocation failed\n");
567	628	return PTR_ERR(inta->global_event);
@@ -592,6 +653,8 @@ static int ti_sci_inta_irq_domain_probe(struct platform_device *pdev) · 24 unmodified lines
592	653	INIT_LIST_HEAD(&inta->vint_list);
593	654	mutex_init(&inta->vint_mutex);
594	655
	656	+ dev_info(dev, "Interrupt Aggregator domain %d created\n", pdev->id);
	657	+
595	658	return 0;
596	659	}
597	660

drivers/irqchip/irq-ti-sci-intr.c+93−59

@@ -17,29 +17,20 @@ · 16 unmodified lines
17	17	#include <linux/of_irq.h>
18	18	#include <linux/soc/ti/ti_sci_protocol.h>
19	19
20		−#define TI_SCI_DEV_ID_MASK 0xffff
21		−#define TI_SCI_DEV_ID_SHIFT 16
22		−#define TI_SCI_IRQ_ID_MASK 0xffff
23		−#define TI_SCI_IRQ_ID_SHIFT 0
24		−#define HWIRQ_TO_DEVID(hwirq) (((hwirq) >> (TI_SCI_DEV_ID_SHIFT)) & \
25		− (TI_SCI_DEV_ID_MASK))
26		−#define HWIRQ_TO_IRQID(hwirq) ((hwirq) & (TI_SCI_IRQ_ID_MASK))
27		−#define TO_HWIRQ(dev, index) ((((dev) & TI_SCI_DEV_ID_MASK) << \
28		− TI_SCI_DEV_ID_SHIFT) \| \
29		− ((index) & TI_SCI_IRQ_ID_MASK))
30		−
31	20	/**
32	21	* struct ti_sci_intr_irq_domain - Structure representing a TISCI based
33	22	* Interrupt Router IRQ domain.
34	23	* @sci: Pointer to TISCI handle
35		− * @dst_irq: TISCI resource pointer representing GIC irq controller.
36		− * @dst_id: TISCI device ID of the GIC irq controller.
	24	+ * @out_irqs: TISCI resource pointer representing INTR irqs.
	25	+ * @dev: Struct device pointer.
	26	+ * @ti_sci_id: TI-SCI device identifier
37	27	* @type: Specifies the trigger type supported by this Interrupt Router
38	28	*/
39	29	struct ti_sci_intr_irq_domain {
40	30	const struct ti_sci_handle *sci;
41		− struct ti_sci_resource *dst_irq;
42		− u32 dst_id;
	31	+ struct ti_sci_resource *out_irqs;
	32	+ struct device *dev;
	33	+ u32 ti_sci_id;
43	34	u32 type;
44	35	};
45	36
@@ -70,15 +61,44 @@ static int ti_sci_intr_irq_domain_translate(struct irq_domain *domain, · 24 unmodified lines
70	61	{
71	62	struct ti_sci_intr_irq_domain *intr = domain->host_data;
72	63
73		− if (fwspec->param_count != 2)
	64	+ if (fwspec->param_count != 1)
74	65	return -EINVAL;
75	66
76		− *hwirq = TO_HWIRQ(fwspec->param[0], fwspec->param[1]);
	67	+ *hwirq = fwspec->param[0];
77	68	*type = intr->type;
78	69
79	70	return 0;
80	71	}
81	72
	73	+/**
	74	+ * ti_sci_intr_xlate_irq() - Translate hwirq to parent's hwirq.
	75	+ * @intr: IRQ domain corresponding to Interrupt Router
	76	+ * @irq: Hardware irq corresponding to the above irq domain
	77	+ *
	78	+ * Return parent irq number if translation is available else -ENOENT.
	79	+ */
	80	+static int ti_sci_intr_xlate_irq(struct ti_sci_intr_irq_domain *intr, u32 irq)
	81	+{
	82	+ struct device_node *np = dev_of_node(intr->dev);
	83	+ u32 base, pbase, size, len;
	84	+ const __be32 *range;
	85	+
	86	+ range = of_get_property(np, "ti,interrupt-ranges", &len);
	87	+ if (!range)
	88	+ return irq;
	89	+
	90	+ for (len /= sizeof(*range); len >= 3; len -= 3) {
	91	+ base = be32_to_cpu(*range++);
	92	+ pbase = be32_to_cpu(*range++);
	93	+ size = be32_to_cpu(*range++);
	94	+
	95	+ if (base <= irq && irq < base + size)
	96	+ return irq - base + pbase;
	97	+ }
	98	+
	99	+ return -ENOENT;
	100	+}
	101	+
82	102	/**
83	103	* ti_sci_intr_irq_domain_free() - Free the specified IRQs from the domain.
84	104	* @domain: Domain to which the irqs belong
@@ -89,66 +109,76 @@ static void ti_sci_intr_irq_domain_free(struct irq_domain *domain, · 4 unmodified lines
89	109	unsigned int virq, unsigned int nr_irqs)
90	110	{
91	111	struct ti_sci_intr_irq_domain *intr = domain->host_data;
92		− struct irq_data data, parent_data;
93		− u16 dev_id, irq_index;
	112	+ struct irq_data *data;
	113	+ int out_irq;
94	114
95		− parent_data = irq_domain_get_irq_data(domain->parent, virq);
96	115	data = irq_domain_get_irq_data(domain, virq);
97		− irq_index = HWIRQ_TO_IRQID(data->hwirq);
98		− dev_id = HWIRQ_TO_DEVID(data->hwirq);
	116	+ out_irq = (uintptr_t)data->chip_data;
99	117
100		− intr->sci->ops.rm_irq_ops.free_irq(intr->sci, dev_id, irq_index,
101		− intr->dst_id, parent_data->hwirq);
102		− ti_sci_release_resource(intr->dst_irq, parent_data->hwirq);
	118	+ intr->sci->ops.rm_irq_ops.free_irq(intr->sci,
	119	+ intr->ti_sci_id, data->hwirq,
	120	+ intr->ti_sci_id, out_irq);
	121	+ ti_sci_release_resource(intr->out_irqs, out_irq);
103	122	irq_domain_free_irqs_parent(domain, virq, 1);
104	123	irq_domain_reset_irq_data(data);
105	124	}
106	125
107	126	/**
108		− * ti_sci_intr_alloc_gic_irq() - Allocate GIC specific IRQ
	127	+ * ti_sci_intr_alloc_parent_irq() - Allocate parent IRQ
109	128	* @domain: Pointer to the interrupt router IRQ domain
110	129	* @virq: Corresponding Linux virtual IRQ number
111	130	* @hwirq: Corresponding hwirq for the IRQ within this IRQ domain
112	131	*
113		− * Returns 0 if all went well else appropriate error pointer.
	132	+ * Returns parent irq if all went well else appropriate error pointer.
114	133	*/
115		−static int ti_sci_intr_alloc_gic_irq(struct irq_domain *domain,
116		− unsigned int virq, u32 hwirq)
	134	+static int ti_sci_intr_alloc_parent_irq(struct irq_domain *domain,
	135	+ unsigned int virq, u32 hwirq)
117	136	{
118	137	struct ti_sci_intr_irq_domain *intr = domain->host_data;
	138	+ struct device_node *parent_node;
119	139	struct irq_fwspec fwspec;
120		− u16 dev_id, irq_index;
121		− u16 dst_irq;
122		− int err;
123		−
124		− dev_id = HWIRQ_TO_DEVID(hwirq);
125		− irq_index = HWIRQ_TO_IRQID(hwirq);
	140	+ u16 out_irq, p_hwirq;
	141	+ int err = 0;
126	142
127		− dst_irq = ti_sci_get_free_resource(intr->dst_irq);
128		− if (dst_irq == TI_SCI_RESOURCE_NULL)
	143	+ out_irq = ti_sci_get_free_resource(intr->out_irqs);
	144	+ if (out_irq == TI_SCI_RESOURCE_NULL)
129	145	return -EINVAL;
130	146
131		− fwspec.fwnode = domain->parent->fwnode;
132		− fwspec.param_count = 3;
133		− fwspec.param[0] = 0; /* SPI */
134		− fwspec.param[1] = dst_irq - 32; /* SPI offset */
135		− fwspec.param[2] = intr->type;
	147	+ p_hwirq = ti_sci_intr_xlate_irq(intr, out_irq);
	148	+ if (p_hwirq < 0)
	149	+ goto err_irqs;
	150	+
	151	+ parent_node = of_irq_find_parent(dev_of_node(intr->dev));
	152	+ fwspec.fwnode = of_node_to_fwnode(parent_node);
	153	+
	154	+ if (of_device_is_compatible(parent_node, "arm,gic-v3")) {
	155	+ /* Parent is GIC */
	156	+ fwspec.param_count = 3;
	157	+ fwspec.param[0] = 0; /* SPI */
	158	+ fwspec.param[1] = p_hwirq - 32; /* SPI offset */
	159	+ fwspec.param[2] = intr->type;
	160	+ } else {
	161	+ /* Parent is Interrupt Router */
	162	+ fwspec.param_count = 1;
	163	+ fwspec.param[0] = p_hwirq;
	164	+ }
136	165
137	166	err = irq_domain_alloc_irqs_parent(domain, virq, 1, &fwspec);
138	167	if (err)
139	168	goto err_irqs;
140	169
141		− err = intr->sci->ops.rm_irq_ops.set_irq(intr->sci, dev_id, irq_index,
142		− intr->dst_id, dst_irq);
	170	+ err = intr->sci->ops.rm_irq_ops.set_irq(intr->sci,
	171	+ intr->ti_sci_id, hwirq,
	172	+ intr->ti_sci_id, out_irq);
143	173	if (err)
144	174	goto err_msg;
145	175
146		− return 0;
	176	+ return p_hwirq;
147	177
148	178	err_msg:
149	179	irq_domain_free_irqs_parent(domain, virq, 1);
150	180	err_irqs:
151		− ti_sci_release_resource(intr->dst_irq, dst_irq);
	181	+ ti_sci_release_resource(intr->out_irqs, out_irq);
152	182	return err;
153	183	}
154	184
@@ -168,18 +198,19 @@ static int ti_sci_intr_irq_domain_alloc(struct irq_domain *domain, · 13 unmodified lines
168	198	struct irq_fwspec *fwspec = data;
169	199	unsigned long hwirq;
170	200	unsigned int flags;
171		− int err;
	201	+ int err, p_hwirq;
172	202
173	203	err = ti_sci_intr_irq_domain_translate(domain, fwspec, &hwirq, &flags);
174	204	if (err)
175	205	return err;
176	206
177		− err = ti_sci_intr_alloc_gic_irq(domain, virq, hwirq);
178		− if (err)
179		− return err;
	207	+ p_hwirq = ti_sci_intr_alloc_parent_irq(domain, virq, hwirq);
	208	+ if (p_hwirq < 0)
	209	+ return p_hwirq;
180	210
181	211	irq_domain_set_hwirq_and_chip(domain, virq, hwirq,
182		− &ti_sci_intr_irq_chip, NULL);
	212	+ &ti_sci_intr_irq_chip,
	213	+ (void *)(uintptr_t)p_hwirq);
183	214
184	215	return 0;
185	216	}
@@ -214,6 +245,7 @@ static int ti_sci_intr_irq_domain_probe(struct platform_device *pdev) · 28 unmodified lines
214	245	if (!intr)
215	246	return -ENOMEM;
216	247
	248	+ intr->dev = dev;
217	249	ret = of_property_read_u32(dev_of_node(dev), "ti,intr-trigger-type",
218	250	&intr->type);
219	251	if (ret) {
@@ -230,19 +262,19 @@ static int ti_sci_intr_irq_domain_probe(struct platform_device *pdev) · 10 unmodified lines
230	262	return ret;
231	263	}
232	264
233		− ret = of_property_read_u32(dev_of_node(dev), "ti,sci-dst-id",
234		− &intr->dst_id);
	265	+ ret = of_property_read_u32(dev_of_node(dev), "ti,sci-dev-id",
	266	+ &intr->ti_sci_id);
235	267	if (ret) {
236		− dev_err(dev, "missing 'ti,sci-dst-id' property\n");
	268	+ dev_err(dev, "missing 'ti,sci-dev-id' property\n");
237	269	return -EINVAL;
238	270	}
239	271
240		− intr->dst_irq = devm_ti_sci_get_of_resource(intr->sci, dev,
241		− intr->dst_id,
242		− "ti,sci-rm-range-girq");
243		− if (IS_ERR(intr->dst_irq)) {
	272	+ intr->out_irqs = devm_ti_sci_get_resource(intr->sci, dev,
	273	+ intr->ti_sci_id,
	274	+ TI_SCI_RESASG_SUBTYPE_IR_OUTPUT);
	275	+ if (IS_ERR(intr->out_irqs)) {
244	276	dev_err(dev, "Destination irq resource allocation failed\n");
245		− return PTR_ERR(intr->dst_irq);
	277	+ return PTR_ERR(intr->out_irqs);
246	278	}
247	279
248	280	domain = irq_domain_add_hierarchy(parent_domain, 0, 0, dev_of_node(dev),
@@ -252,6 +284,8 @@ static int ti_sci_intr_irq_domain_probe(struct platform_device *pdev) · 3 unmodified lines
252	284	return -ENOMEM;
253	285	}
254	286
	287	+ dev_info(dev, "Interrupt Router %d domain created\n", intr->ti_sci_id);
	288	+
255	289	return 0;
256	290	}
257	291

drivers/irqchip/irq-vic.c+1−1

@@ -455,7 +455,7 @@ static void __init __vic_init(void __iomem *base, int parent_irq, int irq_start, · 454 unmodified lines
455	455	return;
456	456	default:
457	457	printk(KERN_WARNING "VIC: unknown vendor, continuing anyways\n");
458		− /* fall through */
	458	+ fallthrough;
459	459	case AMBA_VENDOR_ARM:
460	460	break;
461	461	}

drivers/irqchip/irqchip.c+1−1

@@ -52,7 +52,7 @@ int platform_irqchip_probe(struct platform_device *pdev) · 51 unmodified lines
52	52	* interrupt controller. The actual initialization callback of this
53	53	* interrupt controller can check for specific domains as necessary.
54	54	*/
55		− if (par_np && !irq_find_matching_host(np, DOMAIN_BUS_ANY))
	55	+ if (par_np && !irq_find_matching_host(par_np, DOMAIN_BUS_ANY))
56	56	return -EPROBE_DEFER;
57	57
58	58	return irq_init_cb(np, par_np);

drivers/irqchip/qcom-pdc.c+1−7

@@ -11,11 +11,9 @@ · 10 unmodified lines
11	11	#include <linux/irqdomain.h>
12	12	#include <linux/io.h>
13	13	#include <linux/kernel.h>
14		−#include <linux/module.h>
15	14	#include <linux/of.h>
16	15	#include <linux/of_address.h>
17	16	#include <linux/of_device.h>
18		−#include <linux/of_irq.h>
19	17	#include <linux/soc/qcom/irq.h>
20	18	#include <linux/spinlock.h>
21	19	#include <linux/slab.h>
@@ -432,8 +430,4 @@ fail: · 410 unmodified lines
432	430	return ret;
433	431	}
434	432
435		−IRQCHIP_PLATFORM_DRIVER_BEGIN(qcom_pdc)
436		−IRQCHIP_MATCH("qcom,pdc", qcom_pdc_init)
437		−IRQCHIP_PLATFORM_DRIVER_END(qcom_pdc)
438		−MODULE_DESCRIPTION("Qualcomm Technologies, Inc. Power Domain Controller");
439		−MODULE_LICENSE("GPL v2");
	433	+IRQCHIP_DECLARE(qcom_pdc, "qcom,pdc", qcom_pdc_init);

drivers/isdn/hardware/mISDN/avmfritz.c+1−1

@@ -348,7 +348,7 @@ modehdlc(struct bchannel *bch, int protocol) · 347 unmodified lines
348	348	switch (protocol) {
349	349	case -1: /* used for init */
350	350	bch->state = -1;
351		− /* fall through */
	351	+ fallthrough;
352	352	case ISDN_P_NONE:
353	353	if (bch->state == ISDN_P_NONE)
354	354	break;

drivers/isdn/hardware/mISDN/hfc_multi_8xx.h+0−1

@@ -121,7 +121,6 @@ setup_embedded(struct hfc_multi hc, struct hm_map m) · 120 unmodified lines
121	121	case HFC_IO_MODE_EMBSD:
122	122	test_and_set_bit(HFC_CHIP_EMBSD, &hc->chip);
123	123	hc->slots = 128; /* required */
124		− /* fall through */
125	124	hc->HFC_outb = HFC_outb_embsd;
126	125	hc->HFC_inb = HFC_inb_embsd;
127	126	hc->HFC_inw = HFC_inw_embsd;

drivers/isdn/hardware/mISDN/hfcpci.c+1−1

@@ -1280,7 +1280,7 @@ mode_hfcpci(struct bchannel *bch, int bc, int protocol) · 1279 unmodified lines
1280	1280	case (-1): /* used for init */
1281	1281	bch->state = -1;
1282	1282	bch->nr = bc;
1283		− /* fall through */
	1283	+ fallthrough;
1284	1284	case (ISDN_P_NONE):
1285	1285	if (bch->state == ISDN_P_NONE)
1286	1286	return 0;

drivers/isdn/hardware/mISDN/hfcsusb.c+1−1

@@ -695,7 +695,7 @@ hfcsusb_setup_bch(struct bchannel *bch, int protocol) · 694 unmodified lines
695	695	switch (protocol) {
696	696	case (-1): /* used for init */
697	697	bch->state = -1;
698		− /* fall through */
	698	+ fallthrough;
699	699	case (ISDN_P_NONE):
700	700	if (bch->state == ISDN_P_NONE)
701	701	return 0; /* already in idle state */

drivers/isdn/hardware/mISDN/isdnhdlc.c+1−1

@@ -397,7 +397,7 @@ int isdnhdlc_encode(struct isdnhdlc_vars hdlc, const u8 src, u16 slen, · 396 unmodified lines
397	397	dsize--;
398	398	break;
399	399	}
400		− /* fall through */
	400	+ fallthrough;
401	401	case HDLC_SENDFLAG_ONE:
402	402	if (hdlc->bit_shift == 8) {
403	403	hdlc->cbin = hdlc->ffvalue >>

drivers/isdn/hardware/mISDN/mISDNinfineon.c+1−1

@@ -875,7 +875,7 @@ release_card(struct inf_hw *card) { · 874 unmodified lines
875	875	release_card(card->sc[i]);
876	876	card->sc[i] = NULL;
877	877	}
878		− /* fall through */
	878	+ fallthrough;
879	879	default:
880	880	pci_disable_device(card->pdev);
881	881	pci_set_drvdata(card->pdev, NULL);

drivers/isdn/hardware/mISDN/mISDNisar.c+4−4

@@ -957,7 +957,7 @@ isar_pump_statev_fax(struct isar_ch *ch, u8 devt) { · 956 unmodified lines
957	957	break;
958	958	case PCTRL_CMD_FTM:
959	959	p1 = 2;
960		− /* fall through */
	960	+ fallthrough;
961	961	case PCTRL_CMD_FTH:
962	962	send_mbox(ch->is, dps \| ISAR_HIS_PUMPCTRL,
963	963	PCTRL_CMD_SILON, 1, &p1);
@@ -1163,7 +1163,7 @@ setup_pump(struct isar_ch *ch) { · 199 unmodified lines
1163	1163	send_mbox(ch->is, dps \| ISAR_HIS_PUMPCFG,
1164	1164	PMOD_DTMF, 1, param);
1165	1165	}
1166		− /* fall through */
	1166	+ fallthrough;
1167	1167	case ISDN_P_B_MODEM_ASYNC:
1168	1168	ctrl = PMOD_DATAMODEM;
1169	1169	if (test_bit(FLG_ORIGIN, &ch->bch.Flags)) {
@@ -1255,7 +1255,7 @@ setup_iom2(struct isar_ch *ch) { · 85 unmodified lines
1255	1255	case ISDN_P_B_MODEM_ASYNC:
1256	1256	case ISDN_P_B_T30_FAX:
1257	1257	cmsb \|= IOM_CTRL_RCV;
1258		− /* fall through */
	1258	+ fallthrough;
1259	1259	case ISDN_P_B_L2DTMF:
1260	1260	if (test_bit(FLG_DTMFSEND, &ch->bch.Flags))
1261	1261	cmsb \|= IOM_CTRL_RCV;
@@ -1548,7 +1548,7 @@ isar_l2l1(struct mISDNchannel ch, struct sk_buff skb) · 286 unmodified lines
1548	1548	ich->is->name, hh->id);
1549	1549	ret = -EINVAL;
1550	1550	}
1551		− /* fall through */
	1551	+ fallthrough;
1552	1552	default:
1553	1553	pr_info("%s: %s unknown prim(%x,%x)\n",
1554	1554	ich->is->name, __func__, hh->prim, hh->id);

drivers/isdn/mISDN/stack.c+1−1

@@ -528,7 +528,7 @@ create_l2entity(struct mISDNdevice dev, struct mISDNchannel ch, · 527 unmodified lines
528	528	rq.protocol = ISDN_P_NT_S0;
529	529	if (dev->Dprotocols & (1 << ISDN_P_NT_E1))
530	530	rq.protocol = ISDN_P_NT_E1;
531		− /* fall through */
	531	+ fallthrough;
532	532	case ISDN_P_LAPD_TE:
533	533	ch->recv = mISDN_queue_message;
534	534	ch->peer = &dev->D.st->own;

drivers/lightnvm/pblk-core.c+1−1

@@ -301,7 +301,7 @@ void pblk_free_rqd(struct pblk pblk, struct nvm_rq rqd, int type) · 300 unmodified lines
301	301	switch (type) {
302	302	case PBLK_WRITE:
303	303	kfree(((struct pblk_c_ctx *)nvm_rq_to_pdu(rqd))->lun_bitmap);
304		− /* fall through */
	304	+ fallthrough;
305	305	case PBLK_WRITE_INT:
306	306	pool = &pblk->w_rq_pool;
307	307	break;

drivers/macintosh/adbhid.c+1−1

@@ -881,7 +881,7 @@ adbhid_input_register(int id, int default_id, int original_handler_id, · 880 unmodified lines
881	881	}
882	882	if (hid->name[0])
883	883	break;
884		− /* else fall through */
	884	+ fallthrough;
885	885
886	886	default:
887	887	pr_info("Trying to register unknown ADB device to input layer.\n");

drivers/macintosh/smu.c+1−1

@@ -852,7 +852,7 @@ int smu_queue_i2c(struct smu_i2c_cmd *cmd) · 851 unmodified lines
852	852	break;
853	853	case SMU_I2C_TRANSFER_COMBINED:
854	854	cmd->info.devaddr &= 0xfe;
855		− /* fall through */
	855	+ fallthrough;
856	856	case SMU_I2C_TRANSFER_STDSUB:
857	857	if (cmd->info.sublen > 3)
858	858	return -EINVAL;

drivers/md/bcache/journal.c+1−1

@@ -608,7 +608,7 @@ static void do_journal_discard(struct cache *ca) · 607 unmodified lines
608	608	ca->sb.njournal_buckets;
609	609
610	610	atomic_set(&ja->discard_in_flight, DISCARD_READY);
611		− /* fallthrough */
	611	+ fallthrough;
612	612
613	613	case DISCARD_READY:
614	614	if (ja->discard_idx == ja->last_idx)

drivers/md/bcache/util.c+7−7

@@ -33,27 +33,27 @@ int bch_ ## name ## _h(const char cp, type res) \ · 32 unmodified lines
33	33	case 'y': \
34	34	case 'z': \
35	35	u++; \
36		− /* fall through */ \
	36	+ fallthrough; \
37	37	case 'e': \
38	38	u++; \
39		− /* fall through */ \
	39	+ fallthrough; \
40	40	case 'p': \
41	41	u++; \
42		− /* fall through */ \
	42	+ fallthrough; \
43	43	case 't': \
44	44	u++; \
45		− /* fall through */ \
	45	+ fallthrough; \
46	46	case 'g': \
47	47	u++; \
48		− /* fall through */ \
	48	+ fallthrough; \
49	49	case 'm': \
50	50	u++; \
51		− /* fall through */ \
	51	+ fallthrough; \
52	52	case 'k': \
53	53	u++; \
54	54	if (e++ == cp) \
55	55	return -EINVAL; \
56		− /* fall through */ \
	56	+ fallthrough; \
57	57	case '\n': \
58	58	case '\0': \
59	59	if (*e == '\n') \

drivers/md/dm-cache-metadata.c+6−2

@@ -537,12 +537,16 @@ static int __create_persistent_data_objects(struct dm_cache_metadata *cmd, · 536 unmodified lines
537	537	CACHE_MAX_CONCURRENT_LOCKS);
538	538	if (IS_ERR(cmd->bm)) {
539	539	DMERR("could not create block manager");
540		− return PTR_ERR(cmd->bm);
	540	+ r = PTR_ERR(cmd->bm);
	541	+ cmd->bm = NULL;
	542	+ return r;
541	543	}
542	544
543	545	r = __open_or_format_metadata(cmd, may_format_device);
544		− if (r)
	546	+ if (r) {
545	547	dm_block_manager_destroy(cmd->bm);
	548	+ cmd->bm = NULL;
	549	+ }
546	550
547	551	return r;
548	552	}

drivers/md/dm-crypt.c+3−3

@@ -739,7 +739,7 @@ static int crypt_iv_eboiv_gen(struct crypt_config cc, u8 iv, · 738 unmodified lines
739	739	u8 buf[MAX_CIPHER_BLOCKSIZE] __aligned(__alignof__(__le64));
740	740	struct skcipher_request *req;
741	741	struct scatterlist src, dst;
742		− struct crypto_wait wait;
	742	+ DECLARE_CRYPTO_WAIT(wait);
743	743	int err;
744	744
745	745	req = skcipher_request_alloc(any_tfm(cc), GFP_NOIO);
@@ -936,7 +936,7 @@ static int crypt_iv_elephant(struct crypt_config cc, struct dm_crypt_request d · 190 unmodified lines
936	936	u8 es, ks, data, data2, *data_offset;
937	937	struct skcipher_request *req;
938	938	struct scatterlist sg, sg2, src, dst;
939		− struct crypto_wait wait;
	939	+ DECLARE_CRYPTO_WAIT(wait);
940	940	int i, r;
941	941
942	942	req = skcipher_request_alloc(elephant->tfm, GFP_NOIO);
@@ -1552,7 +1552,7 @@ static blk_status_t crypt_convert(struct crypt_config *cc, · 609 unmodified lines
1552	1552	case -EBUSY:
1553	1553	wait_for_completion(&ctx->restart);
1554	1554	reinit_completion(&ctx->restart);
1555		− /* fall through */
	1555	+ fallthrough;
1556	1556	/*
1557	1557	* The request is queued and processed asynchronously,
1558	1558	* completion function kcryptd_async_done() will be called.

drivers/md/dm-integrity.c+12−0

@@ -2487,6 +2487,7 @@ next_chunk: · 2486 unmodified lines
2487	2487	range.logical_sector = le64_to_cpu(ic->sb->recalc_sector);
2488	2488	if (unlikely(range.logical_sector >= ic->provided_data_sectors)) {
2489	2489	if (ic->mode == 'B') {
	2490	+ block_bitmap_op(ic, ic->recalc_bitmap, 0, ic->provided_data_sectors, BITMAP_OP_CLEAR);
2490	2491	DEBUG_print("queue_delayed_work: bitmap_flush_work\n");
2491	2492	queue_delayed_work(ic->commit_wq, &ic->bitmap_flush_work, 0);
2492	2493	}
@@ -2564,6 +2565,17 @@ next_chunk: · 71 unmodified lines
2564	2565	goto err;
2565	2566	}
2566	2567
	2568	+ if (ic->mode == 'B') {
	2569	+ sector_t start, end;
	2570	+ start = (range.logical_sector >>
	2571	+ (ic->sb->log2_sectors_per_block + ic->log2_blocks_per_bitmap_bit)) <<
	2572	+ (ic->sb->log2_sectors_per_block + ic->log2_blocks_per_bitmap_bit);
	2573	+ end = ((range.logical_sector + range.n_sectors) >>
	2574	+ (ic->sb->log2_sectors_per_block + ic->log2_blocks_per_bitmap_bit)) <<
	2575	+ (ic->sb->log2_sectors_per_block + ic->log2_blocks_per_bitmap_bit);
	2576	+ block_bitmap_op(ic, ic->recalc_bitmap, start, end - start, BITMAP_OP_CLEAR);
	2577	+ }
	2578	+
2567	2579	advance_and_next:
2568	2580	cond_resched();
2569	2581

drivers/md/dm-mpath.c+16−8

@@ -1287,17 +1287,25 @@ static void multipath_wait_for_pg_init_completion(struct multipath *m) · 1286 unmodified lines
1287	1287	static void flush_multipath_work(struct multipath *m)
1288	1288	{
1289	1289	if (m->hw_handler_name) {
1290		− set_bit(MPATHF_PG_INIT_DISABLED, &m->flags);
1291		− smp_mb__after_atomic();
	1290	+ unsigned long flags;
	1291	+
	1292	+ if (!atomic_read(&m->pg_init_in_progress))
	1293	+ goto skip;
	1294	+
	1295	+ spin_lock_irqsave(&m->lock, flags);
	1296	+ if (atomic_read(&m->pg_init_in_progress) &&
	1297	+ !test_and_set_bit(MPATHF_PG_INIT_DISABLED, &m->flags)) {
	1298	+ spin_unlock_irqrestore(&m->lock, flags);
1292	1299
1293		− if (atomic_read(&m->pg_init_in_progress))
1294	1300	flush_workqueue(kmpath_handlerd);
1295		− multipath_wait_for_pg_init_completion(m);
	1301	+ multipath_wait_for_pg_init_completion(m);
1296	1302
1297		− clear_bit(MPATHF_PG_INIT_DISABLED, &m->flags);
1298		− smp_mb__after_atomic();
	1303	+ spin_lock_irqsave(&m->lock, flags);
	1304	+ clear_bit(MPATHF_PG_INIT_DISABLED, &m->flags);
	1305	+ }
	1306	+ spin_unlock_irqrestore(&m->lock, flags);
1299	1307	}
1300		−
	1308	+skip:
1301	1309	if (m->queue_mode == DM_TYPE_BIO_BASED)
1302	1310	flush_work(&m->process_queued_bios);
1303	1311	flush_work(&m->trigger_event);
@@ -1554,7 +1562,7 @@ static void pg_init_done(void *data, int errors) · 250 unmodified lines
1554	1562	case SCSI_DH_RETRY:
1555	1563	/* Wait before retrying. */
1556	1564	delay_retry = true;
1557		− /* fall through */
	1565	+ fallthrough;
1558	1566	case SCSI_DH_IMM_RETRY:
1559	1567	case SCSI_DH_RES_TEMP_UNAVAIL:
1560	1568	if (pg_init_limit_reached(m, pgpath))

drivers/md/dm-thin-metadata.c+7−3

@@ -739,12 +739,16 @@ static int __create_persistent_data_objects(struct dm_pool_metadata *pmd, bool f · 738 unmodified lines
739	739	THIN_MAX_CONCURRENT_LOCKS);
740	740	if (IS_ERR(pmd->bm)) {
741	741	DMERR("could not create block manager");
742		− return PTR_ERR(pmd->bm);
	742	+ r = PTR_ERR(pmd->bm);
	743	+ pmd->bm = NULL;
	744	+ return r;
743	745	}
744	746
745	747	r = __open_or_format_metadata(pmd, format_device);
746		− if (r)
	748	+ if (r) {
747	749	dm_block_manager_destroy(pmd->bm);
	750	+ pmd->bm = NULL;
	751	+ }
748	752
749	753	return r;
750	754	}
@@ -954,7 +958,7 @@ int dm_pool_metadata_close(struct dm_pool_metadata *pmd) · 203 unmodified lines
954	958	}
955	959
956	960	pmd_write_lock_in_core(pmd);
957		− if (!dm_bm_is_read_only(pmd->bm) && !pmd->fail_io) {
	961	+ if (!pmd->fail_io && !dm_bm_is_read_only(pmd->bm)) {
958	962	r = __commit_transaction(pmd);
959	963	if (r < 0)
960	964	DMWARN("%s: __commit_transaction() failed, error = %d",

drivers/md/dm-writecache.c+10−2

@@ -231,6 +231,7 @@ static int persistent_memory_claim(struct dm_writecache *wc) · 230 unmodified lines
231	231	pfn_t pfn;
232	232	int id;
233	233	struct page **pages;
	234	+ sector_t offset;
234	235
235	236	wc->memory_vmapped = false;
236	237
@@ -245,9 +246,16 @@ static int persistent_memory_claim(struct dm_writecache *wc) · 8 unmodified lines
245	246	goto err1;
246	247	}
247	248
	249	+ offset = get_start_sect(wc->ssd_dev->bdev);
	250	+ if (offset & (PAGE_SIZE / 512 - 1)) {
	251	+ r = -EINVAL;
	252	+ goto err1;
	253	+ }
	254	+ offset >>= PAGE_SHIFT - 9;
	255	+
248	256	id = dax_read_lock();
249	257
250		− da = dax_direct_access(wc->ssd_dev->dax_dev, 0, p, &wc->memory_map, &pfn);
	258	+ da = dax_direct_access(wc->ssd_dev->dax_dev, offset, p, &wc->memory_map, &pfn);
251	259	if (da < 0) {
252	260	wc->memory_map = NULL;
253	261	r = da;
@@ -269,7 +277,7 @@ static int persistent_memory_claim(struct dm_writecache *wc) · 15 unmodified lines
269	277	i = 0;
270	278	do {
271	279	long daa;
272		− daa = dax_direct_access(wc->ssd_dev->dax_dev, i, p - i,
	280	+ daa = dax_direct_access(wc->ssd_dev->dax_dev, offset + i, p - i,
273	281	NULL, &pfn);
274	282	if (daa <= 0) {
275	283	r = daa ? daa : -EINVAL;

drivers/md/dm.c+1−1

@@ -1021,7 +1021,7 @@ static void clone_endio(struct bio *bio) · 1020 unmodified lines
1021	1021	switch (r) {
1022	1022	case DM_ENDIO_REQUEUE:
1023	1023	error = BLK_STS_DM_REQUEUE;
1024		− /FALLTHRU/
	1024	+ fallthrough;
1025	1025	case DM_ENDIO_DONE:
1026	1026	break;
1027	1027	case DM_ENDIO_INCOMPLETE:

drivers/md/md-autodetect.c+2−2

@@ -102,10 +102,10 @@ static int __init md_setup(char *str) · 101 unmodified lines
102	102	pername = "raid0";
103	103	break;
104	104	}
105		− /* FALL THROUGH */
	105	+ fallthrough;
106	106	case 1: /* the first device is numeric */
107	107	str = str1;
108		− /* FALL THROUGH */
	108	+ fallthrough;
109	109	case 0:
110	110	md_setup_args[ent].level = LEVEL_NONE;
111	111	pername="super-block";

drivers/md/md-bitmap.c+1−1

@@ -1433,7 +1433,7 @@ int md_bitmap_startwrite(struct bitmap *bitmap, sector_t offset, unsigned long s · 1432 unmodified lines
1433	1433	case 0:
1434	1434	md_bitmap_file_set_bit(bitmap, offset);
1435	1435	md_bitmap_count_page(&bitmap->counts, offset, 1);
1436		− /* fall through */
	1436	+ fallthrough;
1437	1437	case 1:
1438	1438	*bmc = 2;
1439	1439	}

drivers/md/persistent-data/dm-block-manager.c+8−6

@@ -493,7 +493,7 @@ int dm_bm_write_lock(struct dm_block_manager *bm, · 492 unmodified lines
493	493	void *p;
494	494	int r;
495	495
496		− if (bm->read_only)
	496	+ if (dm_bm_is_read_only(bm))
497	497	return -EPERM;
498	498
499	499	p = dm_bufio_read(bm->bufio, b, (struct dm_buffer **) result);
@@ -562,7 +562,7 @@ int dm_bm_write_lock_zero(struct dm_block_manager *bm, · 62 unmodified lines
562	562	struct buffer_aux *aux;
563	563	void *p;
564	564
565		− if (bm->read_only)
	565	+ if (dm_bm_is_read_only(bm))
566	566	return -EPERM;
567	567
568	568	p = dm_bufio_new(bm->bufio, b, (struct dm_buffer **) result);
@@ -602,7 +602,7 @@ EXPORT_SYMBOL_GPL(dm_bm_unlock); · 33 unmodified lines
602	602
603	603	int dm_bm_flush(struct dm_block_manager *bm)
604	604	{
605		− if (bm->read_only)
	605	+ if (dm_bm_is_read_only(bm))
606	606	return -EPERM;
607	607
608	608	return dm_bufio_write_dirty_buffers(bm->bufio);
@@ -616,19 +616,21 @@ void dm_bm_prefetch(struct dm_block_manager *bm, dm_block_t b) · 7 unmodified lines
616	616
617	617	bool dm_bm_is_read_only(struct dm_block_manager *bm)
618	618	{
619		− return bm->read_only;
	619	+ return (bm ? bm->read_only : true);
620	620	}
621	621	EXPORT_SYMBOL_GPL(dm_bm_is_read_only);
622	622
623	623	void dm_bm_set_read_only(struct dm_block_manager *bm)
624	624	{
625		− bm->read_only = true;
	625	+ if (bm)
	626	+ bm->read_only = true;
626	627	}
627	628	EXPORT_SYMBOL_GPL(dm_bm_set_read_only);
628	629
629	630	void dm_bm_set_read_write(struct dm_block_manager *bm)
630	631	{
631		− bm->read_only = false;
	632	+ if (bm)
	633	+ bm->read_only = false;
632	634	}
633	635	EXPORT_SYMBOL_GPL(dm_bm_set_read_write);
634	636

drivers/md/raid5.c+7−4

@@ -4083,7 +4083,7 @@ static void handle_parity_checks5(struct r5conf conf, struct stripe_head sh, · 4082 unmodified lines
4083	4083	break;
4084	4084	}
4085	4085	dev = &sh->dev[s->failed_num[0]];
4086		− /* fall through */
	4086	+ fallthrough;
4087	4087	case check_state_compute_result:
4088	4088	sh->check_state = check_state_idle;
4089	4089	if (!dev)
@@ -4214,7 +4214,7 @@ static void handle_parity_checks6(struct r5conf conf, struct stripe_head sh, · 124 unmodified lines
4214	4214
4215	4215	/* we have 2-disk failure */
4216	4216	BUG_ON(s->failed != 2);
4217		− /* fall through */
	4217	+ fallthrough;
4218	4218	case check_state_compute_result:
4219	4219	sh->check_state = check_state_idle;
4220	4220
@@ -6514,9 +6514,12 @@ raid5_store_stripe_size(struct mddev mddev, const char page, size_t len) · 2293 unmodified lines
6514	6514
6515	6515	/*
6516	6516	* The value should not be bigger than PAGE_SIZE. It requires to
6517		− * be multiple of DEFAULT_STRIPE_SIZE.
	6517	+ * be multiple of DEFAULT_STRIPE_SIZE and the value should be power
	6518	+ * of two.
6518	6519	*/
6519		− if (new % DEFAULT_STRIPE_SIZE != 0 \|\| new > PAGE_SIZE \|\| new == 0)
	6520	+ if (new % DEFAULT_STRIPE_SIZE != 0 \|\|
	6521	+ new > PAGE_SIZE \|\| new == 0 \|\|
	6522	+ new != roundup_pow_of_two(new))
6520	6523	return -EINVAL;
6521	6524
6522	6525	err = mddev_lock(mddev);

drivers/media/common/v4l2-tpg/v4l2-tpg-core.c+18−18

@@ -210,7 +210,7 @@ bool tpg_s_fourcc(struct tpg_data *tpg, u32 fourcc) · 209 unmodified lines
210	210	tpg->vdownsampling[1] = 1;
211	211	tpg->hdownsampling[1] = 1;
212	212	tpg->planes = 2;
213		− /* fall through */
	213	+ fallthrough;
214	214	case V4L2_PIX_FMT_RGB332:
215	215	case V4L2_PIX_FMT_RGB565:
216	216	case V4L2_PIX_FMT_RGB565X:
@@ -271,7 +271,7 @@ bool tpg_s_fourcc(struct tpg_data *tpg, u32 fourcc) · 54 unmodified lines
271	271	case V4L2_PIX_FMT_YUV420M:
272	272	case V4L2_PIX_FMT_YVU420M:
273	273	tpg->buffers = 3;
274		− /* fall through */
	274	+ fallthrough;
275	275	case V4L2_PIX_FMT_YUV420:
276	276	case V4L2_PIX_FMT_YVU420:
277	277	tpg->vdownsampling[1] = 2;
@@ -284,7 +284,7 @@ bool tpg_s_fourcc(struct tpg_data *tpg, u32 fourcc) · 6 unmodified lines
284	284	case V4L2_PIX_FMT_YUV422M:
285	285	case V4L2_PIX_FMT_YVU422M:
286	286	tpg->buffers = 3;
287		− /* fall through */
	287	+ fallthrough;
288	288	case V4L2_PIX_FMT_YUV422P:
289	289	tpg->vdownsampling[1] = 1;
290	290	tpg->vdownsampling[2] = 1;
@@ -296,7 +296,7 @@ bool tpg_s_fourcc(struct tpg_data *tpg, u32 fourcc) · 5 unmodified lines
296	296	case V4L2_PIX_FMT_NV16M:
297	297	case V4L2_PIX_FMT_NV61M:
298	298	tpg->buffers = 2;
299		− /* fall through */
	299	+ fallthrough;
300	300	case V4L2_PIX_FMT_NV16:
301	301	case V4L2_PIX_FMT_NV61:
302	302	tpg->vdownsampling[1] = 1;
@@ -308,7 +308,7 @@ bool tpg_s_fourcc(struct tpg_data *tpg, u32 fourcc) · 5 unmodified lines
308	308	case V4L2_PIX_FMT_NV12M:
309	309	case V4L2_PIX_FMT_NV21M:
310	310	tpg->buffers = 2;
311		− /* fall through */
	311	+ fallthrough;
312	312	case V4L2_PIX_FMT_NV12:
313	313	case V4L2_PIX_FMT_NV21:
314	314	tpg->vdownsampling[1] = 2;
@@ -1275,7 +1275,7 @@ static void gen_twopix(struct tpg_data *tpg, · 960 unmodified lines
1275	1275	case V4L2_PIX_FMT_RGB444:
1276	1276	case V4L2_PIX_FMT_XRGB444:
1277	1277	alpha = 0;
1278		− /* fall through */
	1278	+ fallthrough;
1279	1279	case V4L2_PIX_FMT_YUV444:
1280	1280	case V4L2_PIX_FMT_ARGB444:
1281	1281	buf[0][offset] = (g_u_s << 4) \| b_v;
@@ -1283,21 +1283,21 @@ static void gen_twopix(struct tpg_data *tpg, · 1 unmodified line
1283	1283	break;
1284	1284	case V4L2_PIX_FMT_RGBX444:
1285	1285	alpha = 0;
1286		− /* fall through */
	1286	+ fallthrough;
1287	1287	case V4L2_PIX_FMT_RGBA444:
1288	1288	buf[0][offset] = (b_v << 4) \| (alpha >> 4);
1289	1289	buf[0][offset + 1] = (r_y_h << 4) \| g_u_s;
1290	1290	break;
1291	1291	case V4L2_PIX_FMT_XBGR444:
1292	1292	alpha = 0;
1293		− /* fall through */
	1293	+ fallthrough;
1294	1294	case V4L2_PIX_FMT_ABGR444:
1295	1295	buf[0][offset] = (g_u_s << 4) \| r_y_h;
1296	1296	buf[0][offset + 1] = (alpha & 0xf0) \| b_v;
1297	1297	break;
1298	1298	case V4L2_PIX_FMT_BGRX444:
1299	1299	alpha = 0;
1300		− /* fall through */
	1300	+ fallthrough;
1301	1301	case V4L2_PIX_FMT_BGRA444:
1302	1302	buf[0][offset] = (r_y_h << 4) \| (alpha >> 4);
1303	1303	buf[0][offset + 1] = (b_v << 4) \| g_u_s;
@@ -1305,7 +1305,7 @@ static void gen_twopix(struct tpg_data *tpg, · 1 unmodified line
1305	1305	case V4L2_PIX_FMT_RGB555:
1306	1306	case V4L2_PIX_FMT_XRGB555:
1307	1307	alpha = 0;
1308		− /* fall through */
	1308	+ fallthrough;
1309	1309	case V4L2_PIX_FMT_YUV555:
1310	1310	case V4L2_PIX_FMT_ARGB555:
1311	1311	buf[0][offset] = (g_u_s << 5) \| b_v;
@@ -1314,7 +1314,7 @@ static void gen_twopix(struct tpg_data *tpg, · 2 unmodified lines
1314	1314	break;
1315	1315	case V4L2_PIX_FMT_RGBX555:
1316	1316	alpha = 0;
1317		− /* fall through */
	1317	+ fallthrough;
1318	1318	case V4L2_PIX_FMT_RGBA555:
1319	1319	buf[0][offset] = (g_u_s << 6) \| (b_v << 1) \|
1320	1320	((alpha & 0x80) >> 7);
@@ -1322,7 +1322,7 @@ static void gen_twopix(struct tpg_data *tpg, · 1 unmodified line
1322	1322	break;
1323	1323	case V4L2_PIX_FMT_XBGR555:
1324	1324	alpha = 0;
1325		− /* fall through */
	1325	+ fallthrough;
1326	1326	case V4L2_PIX_FMT_ABGR555:
1327	1327	buf[0][offset] = (g_u_s << 5) \| r_y_h;
1328	1328	buf[0][offset + 1] = (alpha & 0x80) \| (b_v << 2)
@@ -1330,7 +1330,7 @@ static void gen_twopix(struct tpg_data *tpg, · 1 unmodified line
1330	1330	break;
1331	1331	case V4L2_PIX_FMT_BGRX555:
1332	1332	alpha = 0;
1333		− /* fall through */
	1333	+ fallthrough;
1334	1334	case V4L2_PIX_FMT_BGRA555:
1335	1335	buf[0][offset] = (g_u_s << 6) \| (r_y_h << 1) \|
1336	1336	((alpha & 0x80) >> 7);
@@ -1339,7 +1339,7 @@ static void gen_twopix(struct tpg_data *tpg, · 2 unmodified lines
1339	1339	case V4L2_PIX_FMT_RGB555X:
1340	1340	case V4L2_PIX_FMT_XRGB555X:
1341	1341	alpha = 0;
1342		− /* fall through */
	1342	+ fallthrough;
1343	1343	case V4L2_PIX_FMT_ARGB555X:
1344	1344	buf[0][offset] = (alpha & 0x80) \| (r_y_h << 2) \| (g_u_s >> 3);
1345	1345	buf[0][offset + 1] = (g_u_s << 5) \| b_v;
@@ -1366,7 +1366,7 @@ static void gen_twopix(struct tpg_data *tpg, · 20 unmodified lines
1366	1366	case V4L2_PIX_FMT_HSV32:
1367	1367	case V4L2_PIX_FMT_XYUV32:
1368	1368	alpha = 0;
1369		− /* fall through */
	1369	+ fallthrough;
1370	1370	case V4L2_PIX_FMT_YUV32:
1371	1371	case V4L2_PIX_FMT_ARGB32:
1372	1372	case V4L2_PIX_FMT_AYUV32:
@@ -1377,7 +1377,7 @@ static void gen_twopix(struct tpg_data *tpg, · 4 unmodified lines
1377	1377	break;
1378	1378	case V4L2_PIX_FMT_RGBX32:
1379	1379	alpha = 0;
1380		− /* fall through */
	1380	+ fallthrough;
1381	1381	case V4L2_PIX_FMT_RGBA32:
1382	1382	buf[0][offset] = r_y_h;
1383	1383	buf[0][offset + 1] = g_u_s;
@@ -1388,7 +1388,7 @@ static void gen_twopix(struct tpg_data *tpg, · 4 unmodified lines
1388	1388	case V4L2_PIX_FMT_XBGR32:
1389	1389	case V4L2_PIX_FMT_VUYX32:
1390	1390	alpha = 0;
1391		− /* fall through */
	1391	+ fallthrough;
1392	1392	case V4L2_PIX_FMT_ABGR32:
1393	1393	case V4L2_PIX_FMT_VUYA32:
1394	1394	buf[0][offset] = b_v;
@@ -1398,7 +1398,7 @@ static void gen_twopix(struct tpg_data *tpg, · 3 unmodified lines
1398	1398	break;
1399	1399	case V4L2_PIX_FMT_BGRX32:
1400	1400	alpha = 0;
1401		− /* fall through */
	1401	+ fallthrough;
1402	1402	case V4L2_PIX_FMT_BGRA32:
1403	1403	buf[0][offset] = alpha;
1404	1404	buf[0][offset + 1] = b_v;

drivers/media/dvb-core/dvb_net.c+1−1

@@ -546,7 +546,7 @@ static int dvb_net_ule_new_payload(struct dvb_net_ule_handle *h) · 545 unmodified lines
546	546	h->priv->ule_sndu_type_1 = 1;
547	547	h->ts_remain -= 1;
548	548	h->from_where += 1;
549		− /* fallthrough */
	549	+ fallthrough;
550	550	case 0:
551	551	h->new_ts = 1;
552	552	h->ts += TS_SZ;

drivers/media/dvb-frontends/bcm3510.c+1−1

@@ -773,7 +773,7 @@ static int bcm3510_init(struct dvb_frontend* fe) · 772 unmodified lines
773	773	deb_info("attempting to download firmware\n");
774	774	if ((ret = bcm3510_init_cold(st)) < 0)
775	775	return ret;
776		− /* fall-through */
	776	+ fallthrough;
777	777	case JDEC_EEPROM_LOAD_WAIT:
778	778	deb_info("firmware is loaded\n");
779	779	bcm3510_check_firmware_version(st);

drivers/media/dvb-frontends/dib0090.c+1−1

@@ -1693,7 +1693,7 @@ static int dib0090_dc_offset_calibration(struct dib0090_state *state, enum front · 1692 unmodified lines
1693	1693	if (state->identity.p1g)
1694	1694	state->dc = dc_p1g_table;
1695	1695
1696		− /* fall through */
	1696	+ fallthrough;
1697	1697	case CT_TUNER_STEP_0:
1698	1698	dprintk("Start/continue DC calibration for %s path\n",
1699	1699	(state->dc->i == 1) ? "I" : "Q");

drivers/media/dvb-frontends/dib3000mb.c+1−1

@@ -224,7 +224,7 @@ static int dib3000mb_set_frontend(struct dvb_frontend *fe, int tuner) · 223 unmodified lines
224	224	switch (c->hierarchy) {
225	225	case HIERARCHY_NONE:
226	226	deb_setf("hierarchy: none\n");
227		− /* fall through */
	227	+ fallthrough;
228	228	case HIERARCHY_1:
229	229	deb_setf("hierarchy: alpha=1\n");
230	230	wr(DIB3000MB_REG_VIT_ALPHA, DIB3000_ALPHA_1);

drivers/media/dvb-frontends/dib7000p.c+1−1

@@ -276,7 +276,7 @@ static int dib7000p_set_power_mode(struct dib7000p_state *state, enum dib7000p_p · 275 unmodified lines
276	276	if (state->version != SOC7090)
277	277	reg_1280 &= ~((1 << 11));
278	278	reg_1280 &= ~(1 << 6);
279		− /* fall-through */
	279	+ fallthrough;
280	280	case DIB7000P_POWER_INTERFACE_ONLY:
281	281	/* just leave power on the control-interfaces: GPIO and (I2C or SDIO) */
282	282	/* TODO power up either SDIO or I2C */

drivers/media/dvb-frontends/drx39xyj/drxj.c+56−47

@@ -2306,7 +2306,7 @@ hi_command(struct i2c_device_addr dev_addr, const struct drxj_hi_cmd cmd, u16 · 2305 unmodified lines
2306	2306	pr_err("error %d\n", rc);
2307	2307	goto rw_error;
2308	2308	}
2309		− /* fallthrough */
	2309	+ fallthrough;
2310	2310	case SIO_HI_RA_RAM_CMD_BRDCTRL:
2311	2311	rc = drxj_dap_write_reg16(dev_addr, SIO_HI_RA_RAM_PAR_2__A, cmd->param2, 0);
2312	2312	if (rc != 0) {
@@ -2318,7 +2318,7 @@ hi_command(struct i2c_device_addr dev_addr, const struct drxj_hi_cmd cmd, u16 · 5 unmodified lines
2318	2318	pr_err("error %d\n", rc);
2319	2319	goto rw_error;
2320	2320	}
2321		− /* fallthrough */
	2321	+ fallthrough;
2322	2322	case SIO_HI_RA_RAM_CMD_NULL:
2323	2323	/* No parameters */
2324	2324	break;
@@ -2841,7 +2841,7 @@ ctrl_set_cfg_mpeg_output(struct drx_demod_instance *demod, struct drx_cfg_mpeg_o · 516 unmodified lines
2841	2841	/* coef = 188/204 */
2842	2842	max_bit_rate =
2843	2843	(ext_attr->curr_symbol_rate / 8) * nr_bits * 188;
2844		− /* fall-through - as b/c Annex A/C need following settings */
	2844	+ fallthrough; /* as b/c Annex A/C need following settings */
2845	2845	case DRX_STANDARD_ITU_B:
2846	2846	rc = drxj_dap_write_reg16(dev_addr, FEC_OC_FCT_USAGE__A, FEC_OC_FCT_USAGE__PRE, 0);
2847	2847	if (rc != 0) {
@@ -3555,8 +3555,8 @@ static int ctrl_set_uio_cfg(struct drx_demod_instance *demod, struct drxuio_cfg · 707 unmodified lines
3555	3555	if (!ext_attr->has_smatx)
3556	3556	return -EIO;
3557	3557	switch (uio_cfg->mode) {
3558		− case DRX_UIO_MODE_FIRMWARE_SMA: /* fall through */
3559		− case DRX_UIO_MODE_FIRMWARE_SAW: /* fall through */
	3558	+ case DRX_UIO_MODE_FIRMWARE_SMA:
	3559	+ case DRX_UIO_MODE_FIRMWARE_SAW:
3560	3560	case DRX_UIO_MODE_READWRITE:
3561	3561	ext_attr->uio_sma_tx_mode = uio_cfg->mode;
3562	3562	break;
@@ -3579,7 +3579,7 @@ static int ctrl_set_uio_cfg(struct drx_demod_instance *demod, struct drxuio_cfg · 16 unmodified lines
3579	3579	if (!ext_attr->has_smarx)
3580	3580	return -EIO;
3581	3581	switch (uio_cfg->mode) {
3582		− case DRX_UIO_MODE_FIRMWARE0: /* fall through */
	3582	+ case DRX_UIO_MODE_FIRMWARE0:
3583	3583	case DRX_UIO_MODE_READWRITE:
3584	3584	ext_attr->uio_sma_rx_mode = uio_cfg->mode;
3585	3585	break;
@@ -3603,7 +3603,7 @@ static int ctrl_set_uio_cfg(struct drx_demod_instance *demod, struct drxuio_cfg · 17 unmodified lines
3603	3603	if (!ext_attr->has_gpio)
3604	3604	return -EIO;
3605	3605	switch (uio_cfg->mode) {
3606		− case DRX_UIO_MODE_FIRMWARE0: /* fall through */
	3606	+ case DRX_UIO_MODE_FIRMWARE0:
3607	3607	case DRX_UIO_MODE_READWRITE:
3608	3608	ext_attr->uio_gpio_mode = uio_cfg->mode;
3609	3609	break;
@@ -3639,7 +3639,7 @@ static int ctrl_set_uio_cfg(struct drx_demod_instance *demod, struct drxuio_cfg · 29 unmodified lines
3639	3639	}
3640	3640	ext_attr->uio_irqn_mode = uio_cfg->mode;
3641	3641	break;
3642		− case DRX_UIO_MODE_FIRMWARE0: /* fall through */
	3642	+ case DRX_UIO_MODE_FIRMWARE0:
3643	3643	default:
3644	3644	return -EINVAL;
3645	3645	break;
@@ -4004,31 +4004,36 @@ static int scu_command(struct i2c_device_addr dev_addr, struct drxjscu_cmd cmd · 358 unmodified lines
4004	4004	if (rc != 0) {
4005	4005	pr_err("error %d\n", rc);
4006	4006	goto rw_error;
4007		− } /* fallthrough */
	4007	+ }
	4008	+ fallthrough;
4008	4009	case 4:
4009	4010	rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_PARAM_3__A, *(cmd->parameter + 3), 0);
4010	4011	if (rc != 0) {
4011	4012	pr_err("error %d\n", rc);
4012	4013	goto rw_error;
4013		− } /* fallthrough */
	4014	+ }
	4015	+ fallthrough;
4014	4016	case 3:
4015	4017	rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_PARAM_2__A, *(cmd->parameter + 2), 0);
4016	4018	if (rc != 0) {
4017	4019	pr_err("error %d\n", rc);
4018	4020	goto rw_error;
4019		− } /* fallthrough */
	4021	+ }
	4022	+ fallthrough;
4020	4023	case 2:
4021	4024	rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_PARAM_1__A, *(cmd->parameter + 1), 0);
4022	4025	if (rc != 0) {
4023	4026	pr_err("error %d\n", rc);
4024	4027	goto rw_error;
4025		− } /* fallthrough */
	4028	+ }
	4029	+ fallthrough;
4026	4030	case 1:
4027	4031	rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_PARAM_0__A, *(cmd->parameter + 0), 0);
4028	4032	if (rc != 0) {
4029	4033	pr_err("error %d\n", rc);
4030	4034	goto rw_error;
4031		− } /* fallthrough */
	4035	+ }
	4036	+ fallthrough;
4032	4037	case 0:
4033	4038	/* do nothing */
4034	4039	break;
@@ -4068,25 +4073,29 @@ static int scu_command(struct i2c_device_addr dev_addr, struct drxjscu_cmd cmd · 33 unmodified lines
4068	4073	if (rc != 0) {
4069	4074	pr_err("error %d\n", rc);
4070	4075	goto rw_error;
4071		− } /* fallthrough */
	4076	+ }
	4077	+ fallthrough;
4072	4078	case 3:
4073	4079	rc = drxj_dap_read_reg16(dev_addr, SCU_RAM_PARAM_2__A, cmd->result + 2, 0);
4074	4080	if (rc != 0) {
4075	4081	pr_err("error %d\n", rc);
4076	4082	goto rw_error;
4077		− } /* fallthrough */
	4083	+ }
	4084	+ fallthrough;
4078	4085	case 2:
4079	4086	rc = drxj_dap_read_reg16(dev_addr, SCU_RAM_PARAM_1__A, cmd->result + 1, 0);
4080	4087	if (rc != 0) {
4081	4088	pr_err("error %d\n", rc);
4082	4089	goto rw_error;
4083		− } /* fallthrough */
	4090	+ }
	4091	+ fallthrough;
4084	4092	case 1:
4085	4093	rc = drxj_dap_read_reg16(dev_addr, SCU_RAM_PARAM_0__A, cmd->result + 0, 0);
4086	4094	if (rc != 0) {
4087	4095	pr_err("error %d\n", rc);
4088	4096	goto rw_error;
4089		− } /* fallthrough */
	4097	+ }
	4098	+ fallthrough;
4090	4099	case 0:
4091	4100	/* do nothing */
4092	4101	break;
@@ -4791,7 +4800,7 @@ set_frequency(struct drx_demod_instance *demod, · 698 unmodified lines
4791	4800	Sound carrier is already 3Mhz above centre frequency due
4792	4801	to tuner setting so now add an extra shift of 1MHz... */
4793	4802	fm_frequency_shift = 1000;
4794		− /fall through /
	4803	+ fallthrough;
4795	4804	case DRX_STANDARD_ITU_B:
4796	4805	case DRX_STANDARD_NTSC:
4797	4806	case DRX_STANDARD_PAL_SECAM_BG:
@@ -10475,11 +10484,11 @@ ctrl_set_channel(struct drx_demod_instance demod, struct drx_channel channel) · 5677 unmodified lines
10475	10484	(standard == DRX_STANDARD_NTSC)) {
10476	10485	switch (channel->bandwidth) {
10477	10486	case DRX_BANDWIDTH_6MHZ:
10478		− case DRX_BANDWIDTH_UNKNOWN: /* fall through */
	10487	+ case DRX_BANDWIDTH_UNKNOWN:
10479	10488	channel->bandwidth = DRX_BANDWIDTH_6MHZ;
10480	10489	break;
10481		− case DRX_BANDWIDTH_8MHZ: /* fall through */
10482		− case DRX_BANDWIDTH_7MHZ: /* fall through */
	10490	+ case DRX_BANDWIDTH_8MHZ:
	10491	+ case DRX_BANDWIDTH_7MHZ:
10483	10492	default:
10484	10493	return -EINVAL;
10485	10494	}
@@ -10511,10 +10520,10 @@ ctrl_set_channel(struct drx_demod_instance demod, struct drx_channel channel) · 25 unmodified lines
10511	10520	}
10512	10521
10513	10522	switch (channel->constellation) {
10514		− case DRX_CONSTELLATION_QAM16: /* fall through */
10515		− case DRX_CONSTELLATION_QAM32: /* fall through */
10516		− case DRX_CONSTELLATION_QAM64: /* fall through */
10517		− case DRX_CONSTELLATION_QAM128: /* fall through */
	10523	+ case DRX_CONSTELLATION_QAM16:
	10524	+ case DRX_CONSTELLATION_QAM32:
	10525	+ case DRX_CONSTELLATION_QAM64:
	10526	+ case DRX_CONSTELLATION_QAM128:
10518	10527	case DRX_CONSTELLATION_QAM256:
10519	10528	bandwidth_temp = channel->symbolrate * bw_rolloff_factor;
10520	10529	bandwidth = bandwidth_temp / 100;
@@ -10628,8 +10637,8 @@ ctrl_set_channel(struct drx_demod_instance demod, struct drx_channel channel) · 107 unmodified lines
10628	10637	}
10629	10638	break;
10630	10639	#ifndef DRXJ_VSB_ONLY
10631		− case DRX_STANDARD_ITU_A: /* fallthrough */
10632		− case DRX_STANDARD_ITU_B: /* fallthrough */
	10640	+ case DRX_STANDARD_ITU_A:
	10641	+ case DRX_STANDARD_ITU_B:
10633	10642	case DRX_STANDARD_ITU_C:
10634	10643	rc = set_qam_channel(demod, channel, tuner_freq_offset);
10635	10644	if (rc != 0) {
@@ -10820,7 +10829,7 @@ ctrl_lock_status(struct drx_demod_instance demod, enum drx_lock_status lock_st · 184 unmodified lines
10820	10829	SCU_RAM_COMMAND_CMD_DEMOD_GET_LOCK;
10821	10830	break;
10822	10831	#endif
10823		− case DRX_STANDARD_UNKNOWN: /* fallthrough */
	10832	+ case DRX_STANDARD_UNKNOWN:
10824	10833	default:
10825	10834	return -EIO;
10826	10835	}
@@ -10888,8 +10897,8 @@ ctrl_set_standard(struct drx_demod_instance demod, enum drx_standard standard) · 61 unmodified lines
10888	10897	*/
10889	10898	switch (prev_standard) {
10890	10899	#ifndef DRXJ_VSB_ONLY
10891		− case DRX_STANDARD_ITU_A: /* fallthrough */
10892		− case DRX_STANDARD_ITU_B: /* fallthrough */
	10900	+ case DRX_STANDARD_ITU_A:
	10901	+ case DRX_STANDARD_ITU_B:
10893	10902	case DRX_STANDARD_ITU_C:
10894	10903	rc = power_down_qam(demod, false);
10895	10904	if (rc != 0) {
@@ -10908,7 +10917,7 @@ ctrl_set_standard(struct drx_demod_instance demod, enum drx_standard standard) · 12 unmodified lines
10908	10917	case DRX_STANDARD_UNKNOWN:
10909	10918	/* Do nothing */
10910	10919	break;
10911		− case DRX_STANDARD_AUTO: /* fallthrough */
	10920	+ case DRX_STANDARD_AUTO:
10912	10921	default:
10913	10922	return -EINVAL;
10914	10923	}
@@ -10921,8 +10930,8 @@ ctrl_set_standard(struct drx_demod_instance demod, enum drx_standard standard) · 6 unmodified lines
10921	10930
10922	10931	switch (*standard) {
10923	10932	#ifndef DRXJ_VSB_ONLY
10924		− case DRX_STANDARD_ITU_A: /* fallthrough */
10925		− case DRX_STANDARD_ITU_B: /* fallthrough */
	10933	+ case DRX_STANDARD_ITU_A:
	10934	+ case DRX_STANDARD_ITU_B:
10926	10935	case DRX_STANDARD_ITU_C:
10927	10936	do {
10928	10937	u16 dummy;
@@ -11111,12 +11120,12 @@ ctrl_power_mode(struct drx_demod_instance demod, enum drx_power_mode mode) · 182 unmodified lines
11111	11120	goto rw_error;
11112	11121	}
11113	11122	break;
11114		− case DRX_STANDARD_PAL_SECAM_BG: /* fallthrough */
11115		− case DRX_STANDARD_PAL_SECAM_DK: /* fallthrough */
11116		− case DRX_STANDARD_PAL_SECAM_I: /* fallthrough */
11117		− case DRX_STANDARD_PAL_SECAM_L: /* fallthrough */
11118		− case DRX_STANDARD_PAL_SECAM_LP: /* fallthrough */
11119		− case DRX_STANDARD_NTSC: /* fallthrough */
	11123	+ case DRX_STANDARD_PAL_SECAM_BG:
	11124	+ case DRX_STANDARD_PAL_SECAM_DK:
	11125	+ case DRX_STANDARD_PAL_SECAM_I:
	11126	+ case DRX_STANDARD_PAL_SECAM_L:
	11127	+ case DRX_STANDARD_PAL_SECAM_LP:
	11128	+ case DRX_STANDARD_NTSC:
11120	11129	case DRX_STANDARD_FM:
11121	11130	rc = power_down_atv(demod, ext_attr->standard, true);
11122	11131	if (rc != 0) {
@@ -11127,7 +11136,7 @@ ctrl_power_mode(struct drx_demod_instance demod, enum drx_power_mode mode) · 4 unmodified lines
11127	11136	case DRX_STANDARD_UNKNOWN:
11128	11137	/* Do nothing */
11129	11138	break;
11130		− case DRX_STANDARD_AUTO: /* fallthrough */
	11139	+ case DRX_STANDARD_AUTO:
11131	11140	default:
11132	11141	return -EIO;
11133	11142	}
@@ -11220,8 +11229,8 @@ ctrl_set_cfg_pre_saw(struct drx_demod_instance demod, struct drxj_cfg_pre_saw · 86 unmodified lines
11220	11229	ext_attr->vsb_pre_saw_cfg = *pre_saw;
11221	11230	break;
11222	11231	#ifndef DRXJ_VSB_ONLY
11223		− case DRX_STANDARD_ITU_A: /* fallthrough */
11224		− case DRX_STANDARD_ITU_B: /* fallthrough */
	11232	+ case DRX_STANDARD_ITU_A:
	11233	+ case DRX_STANDARD_ITU_B:
11225	11234	case DRX_STANDARD_ITU_C:
11226	11235	ext_attr->qam_pre_saw_cfg = *pre_saw;
11227	11236	break;
@@ -11264,10 +11273,10 @@ ctrl_set_cfg_afe_gain(struct drx_demod_instance *demod, struct drxj_cfg_afe_gain · 36 unmodified lines
11264	11273	ext_attr = (struct drxj_data *) demod->my_ext_attr;
11265	11274
11266	11275	switch (afe_gain->standard) {
11267		− case DRX_STANDARD_8VSB: /* fallthrough */
	11276	+ case DRX_STANDARD_8VSB: fallthrough;
11268	11277	#ifndef DRXJ_VSB_ONLY
11269		− case DRX_STANDARD_ITU_A: /* fallthrough */
11270		− case DRX_STANDARD_ITU_B: /* fallthrough */
	11278	+ case DRX_STANDARD_ITU_A:
	11279	+ case DRX_STANDARD_ITU_B:
11271	11280	case DRX_STANDARD_ITU_C:
11272	11281	#endif
11273	11282	/* Do nothing */
@@ -11301,8 +11310,8 @@ ctrl_set_cfg_afe_gain(struct drx_demod_instance *demod, struct drxj_cfg_afe_gain · 27 unmodified lines
11301	11310	ext_attr->vsb_pga_cfg = gain * 13 + 140;
11302	11311	break;
11303	11312	#ifndef DRXJ_VSB_ONLY
11304		− case DRX_STANDARD_ITU_A: /* fallthrough */
11305		− case DRX_STANDARD_ITU_B: /* fallthrough */
	11313	+ case DRX_STANDARD_ITU_A:
	11314	+ case DRX_STANDARD_ITU_B:
11306	11315	case DRX_STANDARD_ITU_C:
11307	11316	ext_attr->qam_pga_cfg = gain * 13 + 140;
11308	11317	break;

drivers/media/dvb-frontends/drxd_hard.c+6−6

@@ -1512,14 +1512,14 @@ static int SetDeviceTypeId(struct drxd_state *state) · 1511 unmodified lines
1512	1512	switch (deviceId) {
1513	1513	case 4:
1514	1514	state->diversity = 1;
1515		− /* fall through */
	1515	+ fallthrough;
1516	1516	case 3:
1517	1517	case 7:
1518	1518	state->PGA = 1;
1519	1519	break;
1520	1520	case 6:
1521	1521	state->diversity = 1;
1522		− /* fall through */
	1522	+ fallthrough;
1523	1523	case 5:
1524	1524	case 8:
1525	1525	break;
@@ -1966,7 +1966,7 @@ static int DRX_Start(struct drxd_state *state, s32 off) · 440 unmodified lines
1966	1966	switch (p->transmission_mode) {
1967	1967	default: /* Not set, detect it automatically */
1968	1968	operationMode \|= SC_RA_RAM_OP_AUTO_MODE__M;
1969		− /* fall through - try first guess DRX_FFTMODE_8K */
	1969	+ fallthrough; /* try first guess DRX_FFTMODE_8K */
1970	1970	case TRANSMISSION_MODE_8K:
1971	1971	transmissionParams \|= SC_RA_RAM_OP_PARAM_MODE_8K;
1972	1972	if (state->type_A) {
@@ -2139,7 +2139,7 @@ static int DRX_Start(struct drxd_state *state, s32 off) · 166 unmodified lines
2139	2139	switch (p->modulation) {
2140	2140	default:
2141	2141	operationMode \|= SC_RA_RAM_OP_AUTO_CONST__M;
2142		− /* fall through - try first guess DRX_CONSTELLATION_QAM64 */
	2142	+ fallthrough; /* try first guess DRX_CONSTELLATION_QAM64 */
2143	2143	case QAM_64:
2144	2144	transmissionParams \|= SC_RA_RAM_OP_PARAM_CONST_QAM64;
2145	2145	if (state->type_A) {
@@ -2266,7 +2266,7 @@ static int DRX_Start(struct drxd_state *state, s32 off) · 120 unmodified lines
2266	2266	break;
2267	2267	default:
2268	2268	operationMode \|= SC_RA_RAM_OP_AUTO_RATE__M;
2269		− /* fall through */
	2269	+ fallthrough;
2270	2270	case FEC_2_3:
2271	2271	transmissionParams \|= SC_RA_RAM_OP_PARAM_RATE_2_3;
2272	2272	if (state->type_A)
@@ -2301,7 +2301,7 @@ static int DRX_Start(struct drxd_state *state, s32 off) · 28 unmodified lines
2301	2301	switch (p->bandwidth_hz) {
2302	2302	case 0:
2303	2303	p->bandwidth_hz = 8000000;
2304		− /* fall through */
	2304	+ fallthrough;
2305	2305	case 8000000:
2306	2306	/* (64/7)(8/8)1000000 */
2307	2307	bandwidth = DRXD_BANDWIDTH_8MHZ_IN_HZ;

drivers/media/dvb-frontends/drxk_hard.c+12−12

@@ -1756,7 +1756,7 @@ static int setoperation_mode(struct drxk_state *state, · 1755 unmodified lines
1756	1756	goto error;
1757	1757	state->m_operation_mode = OM_NONE;
1758	1758	break;
1759		− case OM_QAM_ITU_A: /* fallthrough */
	1759	+ case OM_QAM_ITU_A:
1760	1760	case OM_QAM_ITU_C:
1761	1761	status = mpegts_stop(state);
1762	1762	if (status < 0)
@@ -1783,7 +1783,7 @@ static int setoperation_mode(struct drxk_state *state, · 20 unmodified lines
1783	1783	if (status < 0)
1784	1784	goto error;
1785	1785	break;
1786		− case OM_QAM_ITU_A: /* fallthrough */
	1786	+ case OM_QAM_ITU_A:
1787	1787	case OM_QAM_ITU_C:
1788	1788	dprintk(1, ": DVB-C Annex %c\n",
1789	1789	(state->m_operation_mode == OM_QAM_ITU_A) ? 'A' : 'C');
@@ -2012,7 +2012,7 @@ static int mpegts_dto_setup(struct drxk_state *state, · 222 unmodified lines
2012	2012	fec_oc_rcn_ctl_rate = 0xC00000;
2013	2013	static_clk = state->m_dvbt_static_clk;
2014	2014	break;
2015		− case OM_QAM_ITU_A: /* fallthrough */
	2015	+ case OM_QAM_ITU_A:
2016	2016	case OM_QAM_ITU_C:
2017	2017	fec_oc_tmd_mode = 0x0004;
2018	2018	fec_oc_rcn_ctl_rate = 0xD2B4EE; /* good for >63 Mb/s */
@@ -3249,11 +3249,11 @@ static int dvbt_sc_command(struct drxk_state *state, · 1230 unmodified lines
3249	3249	case OFDM_SC_RA_RAM_CMD_SET_PREF_PARAM:
3250	3250	case OFDM_SC_RA_RAM_CMD_PROGRAM_PARAM:
3251	3251	status \|= write16(state, OFDM_SC_RA_RAM_PARAM1__A, param1);
3252		− /* fall through - All commands using 1 parameters */
	3252	+ fallthrough; /* All commands using 1 parameters */
3253	3253	case OFDM_SC_RA_RAM_CMD_SET_ECHO_TIMING:
3254	3254	case OFDM_SC_RA_RAM_CMD_USER_IO:
3255	3255	status \|= write16(state, OFDM_SC_RA_RAM_PARAM0__A, param0);
3256		− /* fall through - All commands using 0 parameters */
	3256	+ fallthrough; /* All commands using 0 parameters */
3257	3257	case OFDM_SC_RA_RAM_CMD_GET_OP_PARAM:
3258	3258	case OFDM_SC_RA_RAM_CMD_NULL:
3259	3259	/* Write command */
@@ -3761,7 +3761,7 @@ static int set_dvbt(struct drxk_state *state, u16 intermediate_freqk_hz, · 501 unmodified lines
3761	3761	case TRANSMISSION_MODE_AUTO:
3762	3762	default:
3763	3763	operation_mode \|= OFDM_SC_RA_RAM_OP_AUTO_MODE__M;
3764		− /* fall through - try first guess DRX_FFTMODE_8K */
	3764	+ fallthrough; /* try first guess DRX_FFTMODE_8K */
3765	3765	case TRANSMISSION_MODE_8K:
3766	3766	transmission_params \|= OFDM_SC_RA_RAM_OP_PARAM_MODE_8K;
3767	3767	break;
@@ -3775,7 +3775,7 @@ static int set_dvbt(struct drxk_state *state, u16 intermediate_freqk_hz, · 7 unmodified lines
3775	3775	default:
3776	3776	case GUARD_INTERVAL_AUTO:
3777	3777	operation_mode \|= OFDM_SC_RA_RAM_OP_AUTO_GUARD__M;
3778		− /* fall through - try first guess DRX_GUARD_1DIV4 */
	3778	+ fallthrough; /* try first guess DRX_GUARD_1DIV4 */
3779	3779	case GUARD_INTERVAL_1_4:
3780	3780	transmission_params \|= OFDM_SC_RA_RAM_OP_PARAM_GUARD_4;
3781	3781	break;
@@ -3798,7 +3798,7 @@ static int set_dvbt(struct drxk_state *state, u16 intermediate_freqk_hz, · 16 unmodified lines
3798	3798	operation_mode \|= OFDM_SC_RA_RAM_OP_AUTO_HIER__M;
3799	3799	/* try first guess SC_RA_RAM_OP_PARAM_HIER_NO */
3800	3800	/* transmission_params \|= OFDM_SC_RA_RAM_OP_PARAM_HIER_NO; */
3801		− /* fall through */
	3801	+ fallthrough;
3802	3802	case HIERARCHY_1:
3803	3803	transmission_params \|= OFDM_SC_RA_RAM_OP_PARAM_HIER_A1;
3804	3804	break;
@@ -3816,7 +3816,7 @@ static int set_dvbt(struct drxk_state *state, u16 intermediate_freqk_hz, · 11 unmodified lines
3816	3816	case QAM_AUTO:
3817	3817	default:
3818	3818	operation_mode \|= OFDM_SC_RA_RAM_OP_AUTO_CONST__M;
3819		− /* fall through - try first guess DRX_CONSTELLATION_QAM64 */
	3819	+ fallthrough; /* try first guess DRX_CONSTELLATION_QAM64 */
3820	3820	case QAM_64:
3821	3821	transmission_params \|= OFDM_SC_RA_RAM_OP_PARAM_CONST_QAM64;
3822	3822	break;
@@ -3841,7 +3841,7 @@ static int set_dvbt(struct drxk_state *state, u16 intermediate_freqk_hz, · 18 unmodified lines
3841	3841	WR16(dev_addr, OFDM_EC_SB_PRIOR__A,
3842	3842	OFDM_EC_SB_PRIOR_HI));
3843	3843	break;
3844		− case DRX_PRIORITY_UNKNOWN: /* fall through */
	3844	+ case DRX_PRIORITY_UNKNOWN:
3845	3845	default:
3846	3846	status = -EINVAL;
3847	3847	goto error;
@@ -3859,7 +3859,7 @@ static int set_dvbt(struct drxk_state *state, u16 intermediate_freqk_hz, · 11 unmodified lines
3859	3859	case FEC_AUTO:
3860	3860	default:
3861	3861	operation_mode \|= OFDM_SC_RA_RAM_OP_AUTO_RATE__M;
3862		− /* fall through - try first guess DRX_CODERATE_2DIV3 */
	3862	+ fallthrough; /* try first guess DRX_CODERATE_2DIV3 */
3863	3863	case FEC_2_3:
3864	3864	transmission_params \|= OFDM_SC_RA_RAM_OP_PARAM_RATE_2_3;
3865	3865	break;
@@ -3893,7 +3893,7 @@ static int set_dvbt(struct drxk_state *state, u16 intermediate_freqk_hz, · 27 unmodified lines
3893	3893	switch (state->props.bandwidth_hz) {
3894	3894	case 0:
3895	3895	state->props.bandwidth_hz = 8000000;
3896		− /* fall through */
	3896	+ fallthrough;
3897	3897	case 8000000:
3898	3898	bandwidth = DRXK_BANDWIDTH_8MHZ_IN_HZ;
3899	3899	status = write16(state, OFDM_SC_RA_RAM_SRMM_FIX_FACT_8K__A,

drivers/media/dvb-frontends/lgdt3306a.c+1−1

@@ -768,7 +768,7 @@ static int lgdt3306a_set_if(struct lgdt3306a_state *state, · 767 unmodified lines
768	768	default:
769	769	pr_warn("IF=%d KHz is not supported, 3250 assumed\n",
770	770	if_freq_khz);
771		− /* fallthrough */
	771	+ fallthrough;
772	772	case 3250: /* 3.25Mhz */
773	773	nco1 = 0x34;
774	774	nco2 = 0x00;

drivers/media/dvb-frontends/mt352.c+1−1

@@ -201,7 +201,7 @@ static int mt352_set_parameters(struct dvb_frontend *fe) · 200 unmodified lines
201	201	if (op->hierarchy == HIERARCHY_AUTO \|\|
202	202	op->hierarchy == HIERARCHY_NONE)
203	203	break;
204		− /* fall through */
	204	+ fallthrough;
205	205	default:
206	206	return -EINVAL;
207	207	}

drivers/media/dvb-frontends/mxl5xx.c+1−1

@@ -739,7 +739,7 @@ static int get_frontend(struct dvb_frontend *fe, · 738 unmodified lines
739	739	default:
740	740	break;
741	741	}
742		− /* Fall through */
	742	+ fallthrough;
743	743	case SYS_DVBS:
744	744	switch ((enum MXL_HYDRA_MODULATION_E)
745	745	reg_data[DMD_MODULATION_SCHEME_ADDR]) {

drivers/media/dvb-frontends/or51132.c+1−1

@@ -482,7 +482,7 @@ start: · 481 unmodified lines
482	482	switch (reg&0xff) {
483	483	case 0x06:
484	484	if (reg & 0x1000) usK = 3 << 24;
485		− /* fall through */
	485	+ fallthrough;
486	486	case 0x43: /* QAM64 */
487	487	c = 150204167;
488	488	break;

drivers/media/dvb-frontends/s5h1411.c+1−1

@@ -398,7 +398,7 @@ static int s5h1411_set_if_freq(struct dvb_frontend *fe, int KHz) · 397 unmodified lines
398	398	default:
399	399	dprintk("%s(%d KHz) Invalid, defaulting to 5380\n",
400	400	__func__, KHz);
401		− /* fall through */
	401	+ fallthrough;
402	402	case 5380:
403	403	case 44000:
404	404	s5h1411_writereg(state, S5H1411_I2C_TOP_ADDR, 0x38, 0x1be4);

drivers/media/dvb-frontends/zl10353.c+2−2

@@ -201,7 +201,7 @@ static int zl10353_set_parameters(struct dvb_frontend *fe) · 200 unmodified lines
201	201	break;
202	202	default:
203	203	c->bandwidth_hz = 8000000;
204		− /* fall through */
	204	+ fallthrough;
205	205	case 8000000:
206	206	zl10353_single_write(fe, MCLK_RATIO, 0x75);
207	207	zl10353_single_write(fe, 0x64, 0x36);
@@ -258,7 +258,7 @@ static int zl10353_set_parameters(struct dvb_frontend *fe) · 50 unmodified lines
258	258	if (c->hierarchy == HIERARCHY_AUTO \|\|
259	259	c->hierarchy == HIERARCHY_NONE)
260	260	break;
261		− /* fall through */
	261	+ fallthrough;
262	262	default:
263	263	return -EINVAL;
264	264	}

drivers/media/i2c/Kconfig+2−2

@@ -467,7 +467,7 @@ config VIDEO_VPX3220 · 466 unmodified lines
467	467	config VIDEO_MAX9286
468	468	tristate "Maxim MAX9286 GMSL deserializer support"
469	469	depends on I2C && I2C_MUX
470		− depends on OF
	470	+ depends on OF_GPIO
471	471	select V4L2_FWNODE
472	472	select VIDEO_V4L2_SUBDEV_API
473	473	select MEDIA_CONTROLLER
@@ -741,7 +741,7 @@ config VIDEO_HI556 · 267 unmodified lines
741	741	config VIDEO_IMX214
742	742	tristate "Sony IMX214 sensor support"
743	743	depends on GPIOLIB && I2C && VIDEO_V4L2
744		− depends on V4L2_FWNODE
	744	+ select V4L2_FWNODE
745	745	select MEDIA_CONTROLLER
746	746	select VIDEO_V4L2_SUBDEV_API
747	747	select REGMAP_I2C

drivers/media/pci/cx23885/cx23885-cards.c+2−2

@@ -2209,7 +2209,7 @@ void cx23885_card_setup(struct cx23885_dev *dev) · 2208 unmodified lines
2209	2209	ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
2210	2210	ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2211	2211	ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2212		− /* fall-through */
	2212	+ fallthrough;
2213	2213	case CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP:
2214	2214	ts1->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
2215	2215	ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
@@ -2370,7 +2370,7 @@ void cx23885_card_setup(struct cx23885_dev *dev) · 154 unmodified lines
2370	2370	/* Currently only enabled for the integrated IR controller */
2371	2371	if (!enable_885_ir)
2372	2372	break;
2373		− /* fall-through */
	2373	+ fallthrough;
2374	2374	case CX23885_BOARD_HAUPPAUGE_HVR1250:
2375	2375	case CX23885_BOARD_HAUPPAUGE_HVR1800:
2376	2376	case CX23885_BOARD_HAUPPAUGE_IMPACTVCBE:

drivers/media/pci/ddbridge/ddbridge-core.c+12−11

@@ -1310,7 +1310,7 @@ static void dvb_input_detach(struct ddb_input *input) · 1309 unmodified lines
1310	1310	dvb_unregister_frontend(dvb->fe2);
1311	1311	if (dvb->fe)
1312	1312	dvb_unregister_frontend(dvb->fe);
1313		− /* fallthrough */
	1313	+ fallthrough;
1314	1314	case 0x30:
1315	1315	dvb_module_release(dvb->i2c_client[0]);
1316	1316	dvb->i2c_client[0] = NULL;
@@ -1321,22 +1321,22 @@ static void dvb_input_detach(struct ddb_input *input) · 4 unmodified lines
1321	1321	dvb_frontend_detach(dvb->fe);
1322	1322	dvb->fe = NULL;
1323	1323	dvb->fe2 = NULL;
1324		− /* fallthrough */
	1324	+ fallthrough;
1325	1325	case 0x20:
1326	1326	dvb_net_release(&dvb->dvbnet);
1327		− /* fallthrough */
	1327	+ fallthrough;
1328	1328	case 0x12:
1329	1329	dvbdemux->dmx.remove_frontend(&dvbdemux->dmx,
1330	1330	&dvb->hw_frontend);
1331	1331	dvbdemux->dmx.remove_frontend(&dvbdemux->dmx,
1332	1332	&dvb->mem_frontend);
1333		− /* fallthrough */
	1333	+ fallthrough;
1334	1334	case 0x11:
1335	1335	dvb_dmxdev_release(&dvb->dmxdev);
1336		− /* fallthrough */
	1336	+ fallthrough;
1337	1337	case 0x10:
1338	1338	dvb_dmx_release(&dvb->demux);
1339		− /* fallthrough */
	1339	+ fallthrough;
1340	1340	case 0x01:
1341	1341	break;
1342	1342	}
@@ -1559,7 +1559,7 @@ static int dvb_input_attach(struct ddb_input *input) · 216 unmodified lines
1559	1559	osc24 = 0;
1560	1560	else
1561	1561	osc24 = 1;
1562		− /* fall-through */
	1562	+ fallthrough;
1563	1563	case DDB_TUNER_DVBCT2_SONY_P:
1564	1564	case DDB_TUNER_DVBC2T2_SONY_P:
1565	1565	case DDB_TUNER_ISDBT_SONY_P:
@@ -1575,7 +1575,7 @@ static int dvb_input_attach(struct ddb_input *input) · 9 unmodified lines
1575	1575	break;
1576	1576	case DDB_TUNER_DVBC2T2I_SONY:
1577	1577	osc24 = 1;
1578		− /* fall-through */
	1578	+ fallthrough;
1579	1579	case DDB_TUNER_DVBCT2_SONY:
1580	1580	case DDB_TUNER_DVBC2T2_SONY:
1581	1581	case DDB_TUNER_ISDBT_SONY:
@@ -2036,7 +2036,7 @@ static int ddb_port_attach(struct ddb_port *port) · 454 unmodified lines
2036	2036	ret = ddb_ci_attach(port, ci_bitrate);
2037	2037	if (ret < 0)
2038	2038	break;
2039		− /* fall-through */
	2039	+ fallthrough;
2040	2040	case DDB_PORT_LOOP:
2041	2041	ret = dvb_register_device(port->dvb[0].adap,
2042	2042	&port->dvb[0].dev,
@@ -2432,7 +2432,8 @@ void ddb_ports_init(struct ddb *dev) · 389 unmodified lines
2432	2432	ddb_input_init(port, 4 + i, 1, 4 + i);
2433	2433	ddb_output_init(port, i);
2434	2434	break;
2435		− } /* fallthrough */
	2435	+ }
	2436	+ fallthrough;
2436	2437	case DDB_OCTOPUS:
2437	2438	ddb_input_init(port, 2 * i, 0, 2 * i);
2438	2439	ddb_input_init(port, 2 * i + 1, 1, 2 * i + 1);
@@ -3417,7 +3418,7 @@ int ddb_exit_ddbridge(int stage, int error) · 978 unmodified lines
3417	3418	default:
3418	3419	case 2:
3419	3420	destroy_workqueue(ddb_wq);
3420		− /* fall-through */
	3421	+ fallthrough;
3421	3422	case 1:
3422	3423	ddb_class_destroy();
3423	3424	break;

drivers/media/pci/meye/meye.c+1−1

@@ -952,7 +952,7 @@ static int meyeioc_sync(struct file file, void fh, int *i) · 951 unmodified lines
952	952	mutex_unlock(&meye.lock);
953	953	return -EINTR;
954	954	}
955		− /* fall through */
	955	+ fallthrough;
956	956	case MEYE_BUF_DONE:
957	957	meye.grab_buffer[*i].state = MEYE_BUF_UNUSED;
958	958	if (kfifo_out_locked(&meye.doneq, (unsigned char *)&unused,

drivers/media/pci/ttpci/av7110.c+2−2

@@ -637,7 +637,7 @@ static void gpioirq(unsigned long cookie) · 636 unmodified lines
637	637	iwdebi(av7110, DEBINOSWAP, RX_BUFF, 0, 2);
638	638	break;
639	639	}
640		− /* fall through */
	640	+ fallthrough;
641	641
642	642	case DATA_TS_RECORD:
643	643	case DATA_PES_RECORD:
@@ -2176,7 +2176,7 @@ static int frontend_init(struct av7110 *av7110) · 1532 unmodified lines
2176	2176	break;
2177	2177	}
2178	2178	}
2179		− /* fall-thru */
	2179	+ fallthrough;
2180	2180
2181	2181	case 0x0008: // Hauppauge/TT DVB-T
2182	2182	// Grundig 29504-401

drivers/media/pci/ttpci/av7110_hw.c+1−1

@@ -1107,7 +1107,7 @@ int av7110_osd_cmd(struct av7110 av7110, osd_cmd_t dc) · 1106 unmodified lines
1107	1107	break;
1108	1108	case OSD_SetRow:
1109	1109	dc->y1 = dc->y0;
1110		− /* fall through */
	1110	+ fallthrough;
1111	1111	case OSD_SetBlock:
1112	1112	ret = OSDSetBlock(av7110, dc->x0, dc->y0, dc->x1, dc->y1, dc->color, dc->data);
1113	1113	break;

drivers/media/pci/ttpci/av7110_ipack.c+1−1

@@ -182,7 +182,7 @@ int av7110_ipack_instant_repack (const u8 buf, int count, struct ipack p) · 181 unmodified lines
182	182	case DSM_CC_STREAM :
183	183	case ISO13522_STREAM:
184	184	p->done = 1;
185		− /* fall through */
	185	+ fallthrough;
186	186	case PRIVATE_STREAM1:
187	187	case VIDEO_STREAM_S ... VIDEO_STREAM_E:
188	188	case AUDIO_STREAM_S ... AUDIO_STREAM_E:

drivers/media/pci/ttpci/budget-av.c+1−1

@@ -1226,7 +1226,7 @@ static void frontend_init(struct budget_av *budget_av) · 1225 unmodified lines
1226	1226	* but so far it has been only confirmed for this type
1227	1227	*/
1228	1228	budget_av->reinitialise_demod = 1;
1229		− /* fall through */
	1229	+ fallthrough;
1230	1230	case SUBID_DVBS_KNC1_PLUS:
1231	1231	case SUBID_DVBS_EASYWATCH_1:
1232	1232	if (saa->pci->subsystem_vendor == 0x1894) {

drivers/media/pci/ttpci/budget.c+2−2

@@ -613,7 +613,7 @@ static void frontend_init(struct budget *budget) · 612 unmodified lines
613	613	break;
614	614	}
615	615	}
616		− /* fall through */
	616	+ fallthrough;
617	617	case 0x1018: // TT Budget-S-1401 (philips tda10086/philips tda8262)
618	618	{
619	619	struct dvb_frontend *fe;
@@ -638,7 +638,7 @@ static void frontend_init(struct budget *budget) · 18 unmodified lines
638	638	break;
639	639	}
640	640	}
641		− /* fall through */
	641	+ fallthrough;
642	642
643	643	case 0x101c: { /* TT S2-1600 */
644	644	const struct stv6110x_devctl *ctl;

drivers/media/platform/sh_vou.c+2−2

@@ -220,7 +220,7 @@ static void sh_vou_stream_config(struct sh_vou_device *vou_dev) · 219 unmodified lines
220	220	break;
221	221	case V4L2_PIX_FMT_RGB565:
222	222	dataswap ^= 1;
223		− /* fall through */
	223	+ fallthrough;
224	224	case V4L2_PIX_FMT_RGB565X:
225	225	row_coeff = 2;
226	226	break;
@@ -802,7 +802,7 @@ static u32 sh_vou_ntsc_mode(enum sh_vou_bus_fmt bus_fmt) · 575 unmodified lines
802	802	default:
803	803	pr_warn("%s(): Invalid bus-format code %d, using default 8-bit\n",
804	804	__func__, bus_fmt);
805		− /* fall through */
	805	+ fallthrough;
806	806	case SH_VOU_BUS_8BIT:
807	807	return 1;
808	808	case SH_VOU_BUS_16BIT:

drivers/media/platform/ti-vpe/cal.h+1−1

@@ -226,7 +226,7 @@ static inline void cal_write_field(struct cal_dev *cal, u32 offset, u32 value, · 225 unmodified lines
226	226	u32 val = cal_read(cal, offset);
227	227
228	228	val &= ~mask;
229		− val \|= FIELD_PREP(mask, value);
	229	+ val \|= (value << __ffs(mask)) & mask;
230	230	cal_write(cal, offset, val);
231	231	}
232	232

drivers/media/radio/radio-si476x.c+2−1

@@ -105,7 +105,8 @@ static inline enum phase_diversity_modes_idx · 104 unmodified lines
105	105	si476x_phase_diversity_mode_to_idx(enum si476x_phase_diversity_mode mode)
106	106	{
107	107	switch (mode) {
108		− default: /* FALLTHROUGH */
	108	+ default:
	109	+ fallthrough;
109	110	case SI476X_PHDIV_DISABLED:
110	111	return SI476X_IDX_PHDIV_DISABLED;
111	112	case SI476X_PHDIV_PRIMARY_COMBINING:

drivers/media/radio/tea575x.c+1−1

@@ -249,7 +249,7 @@ int snd_tea575x_enum_freq_bands(struct snd_tea575x *tea, · 248 unmodified lines
249	249	index = BAND_AM;
250	250	break;
251	251	}
252		− /* Fall through */
	252	+ fallthrough;
253	253	default:
254	254	return -EINVAL;
255	255	}

drivers/media/rc/bpf-lirc.c+1−1

@@ -112,7 +112,7 @@ lirc_mode2_func_proto(enum bpf_func_id func_id, const struct bpf_prog *prog) · 111 unmodified lines
112	112	case BPF_FUNC_trace_printk:
113	113	if (perfmon_capable())
114	114	return bpf_get_trace_printk_proto();
115		− /* fall through */
	115	+ fallthrough;
116	116	default:
117	117	return NULL;
118	118	}

drivers/media/rc/gpio-ir-tx.c+5−11

@@ -19,8 +19,6 @@ struct gpio_ir { · 18 unmodified lines
19	19	struct gpio_desc *gpio;
20	20	unsigned int carrier;
21	21	unsigned int duty_cycle;
22		− /* we need a spinlock to hold the cpu while transmitting */
23		− spinlock_t lock;
24	22	};
25	23
26	24	static const struct of_device_id gpio_ir_tx_of_match[] = {
@@ -53,12 +51,11 @@ static int gpio_ir_tx_set_carrier(struct rc_dev *dev, u32 carrier) · 26 unmodified lines
53	51	static void gpio_ir_tx_unmodulated(struct gpio_ir gpio_ir, uint txbuf,
54	52	uint count)
55	53	{
56		− unsigned long flags;
57	54	ktime_t edge;
58	55	s32 delta;
59	56	int i;
60	57
61		− spin_lock_irqsave(&gpio_ir->lock, flags);
	58	+ local_irq_disable();
62	59
63	60	edge = ktime_get();
64	61
@@ -72,14 +69,11 @@ static void gpio_ir_tx_unmodulated(struct gpio_ir gpio_ir, uint txbuf, · 7 unmodified lines
72	69	}
73	70
74	71	gpiod_set_value(gpio_ir->gpio, 0);
75		−
76		− spin_unlock_irqrestore(&gpio_ir->lock, flags);
77	72	}
78	73
79	74	static void gpio_ir_tx_modulated(struct gpio_ir gpio_ir, uint txbuf,
80	75	uint count)
81	76	{
82		− unsigned long flags;
83	77	ktime_t edge;
84	78	/*
85	79	* delta should never exceed 0.5 seconds (IR_MAX_DURATION) and on
@@ -95,7 +89,7 @@ static void gpio_ir_tx_modulated(struct gpio_ir gpio_ir, uint txbuf, · 9 unmodified lines
95	89	space = DIV_ROUND_CLOSEST((100 - gpio_ir->duty_cycle) *
96	90	(NSEC_PER_SEC / 100), gpio_ir->carrier);
97	91
98		− spin_lock_irqsave(&gpio_ir->lock, flags);
	92	+ local_irq_disable();
99	93
100	94	edge = ktime_get();
101	95
@@ -128,19 +122,20 @@ static void gpio_ir_tx_modulated(struct gpio_ir gpio_ir, uint txbuf, · 26 unmodified lines
128	122	edge = last;
129	123	}
130	124	}
131		−
132		− spin_unlock_irqrestore(&gpio_ir->lock, flags);
133	125	}
134	126
135	127	static int gpio_ir_tx(struct rc_dev dev, unsigned int txbuf,
136	128	unsigned int count)
137	129	{
138	130	struct gpio_ir *gpio_ir = dev->priv;
	131	+ unsigned long flags;
139	132
	133	+ local_irq_save(flags);
140	134	if (gpio_ir->carrier)
141	135	gpio_ir_tx_modulated(gpio_ir, txbuf, count);
142	136	else
143	137	gpio_ir_tx_unmodulated(gpio_ir, txbuf, count);
	138	+ local_irq_restore(flags);
144	139
145	140	return count;
146	141	}
@@ -176,7 +171,6 @@ static int gpio_ir_tx_probe(struct platform_device *pdev) · 29 unmodified lines
176	171
177	172	gpio_ir->carrier = 38000;
178	173	gpio_ir->duty_cycle = 50;
179		− spin_lock_init(&gpio_ir->lock);
180	174
181	175	rc = devm_rc_register_device(&pdev->dev, rcdev);
182	176	if (rc < 0)

drivers/media/rc/ir-rc6-decoder.c+1−1

@@ -64,7 +64,7 @@ static enum rc6_mode rc6_mode(struct rc6_dec *data) · 63 unmodified lines
64	64	case 6:
65	65	if (!data->toggle)
66	66	return RC6_MODE_6A;
67		− /* fall through */
	67	+ fallthrough;
68	68	default:
69	69	return RC6_MODE_UNKNOWN;
70	70	}

drivers/media/rc/ir-sony-decoder.c+1−1

@@ -102,7 +102,7 @@ static int ir_sony_decode(struct rc_dev *dev, struct ir_raw_event ev) · 101 unmodified lines
102	102	}
103	103
104	104	data->state = STATE_FINISHED;
105		− /* Fall through */
	105	+ fallthrough;
106	106
107	107	case STATE_FINISHED:
108	108	if (ev.pulse)

drivers/media/rc/mceusb.c+1−1

@@ -1726,7 +1726,7 @@ static int mceusb_dev_probe(struct usb_interface *intf, · 1725 unmodified lines
1726	1726	goto mem_alloc_fail;
1727	1727
1728	1728	ir->pipe_in = pipe;
1729		− ir->buf_in = usb_alloc_coherent(dev, maxp, GFP_ATOMIC, &ir->dma_in);
	1729	+ ir->buf_in = usb_alloc_coherent(dev, maxp, GFP_KERNEL, &ir->dma_in);
1730	1730	if (!ir->buf_in)
1731	1731	goto buf_in_alloc_fail;
1732	1732

drivers/media/rc/rc-main.c+28−16

@@ -1292,6 +1292,10 @@ static ssize_t store_protocols(struct device *device, · 1291 unmodified lines
1292	1292	}
1293	1293
1294	1294	mutex_lock(&dev->lock);
	1295	+ if (!dev->registered) {
	1296	+ mutex_unlock(&dev->lock);
	1297	+ return -ENODEV;
	1298	+ }
1295	1299
1296	1300	old_protocols = *current_protocols;
1297	1301	new_protocols = old_protocols;
@@ -1430,6 +1434,10 @@ static ssize_t store_filter(struct device *device, · 132 unmodified lines
1430	1434	return -EINVAL;
1431	1435
1432	1436	mutex_lock(&dev->lock);
	1437	+ if (!dev->registered) {
	1438	+ mutex_unlock(&dev->lock);
	1439	+ return -ENODEV;
	1440	+ }
1433	1441
1434	1442	new_filter = *filter;
1435	1443	if (fattr->mask)
@@ -1544,6 +1552,10 @@ static ssize_t store_wakeup_protocols(struct device *device, · 108 unmodified lines
1544	1552	int i;
1545	1553
1546	1554	mutex_lock(&dev->lock);
	1555	+ if (!dev->registered) {
	1556	+ mutex_unlock(&dev->lock);
	1557	+ return -ENODEV;
	1558	+ }
1547	1559
1548	1560	allowed = dev->allowed_wakeup_protocols;
1549	1561
@@ -1601,25 +1613,25 @@ static void rc_dev_release(struct device *device) · 51 unmodified lines
1601	1613	kfree(dev);
1602	1614	}
1603	1615
1604		−#define ADD_HOTPLUG_VAR(fmt, val...) \
1605		− do { \
1606		− int err = add_uevent_var(env, fmt, val); \
1607		− if (err) \
1608		− return err; \
1609		− } while (0)
1610		−
1611	1616	static int rc_dev_uevent(struct device device, struct kobj_uevent_env env)
1612	1617	{
1613	1618	struct rc_dev *dev = to_rc_dev(device);
	1619	+ int ret = 0;
1614	1620
1615		− if (dev->rc_map.name)
1616		− ADD_HOTPLUG_VAR("NAME=%s", dev->rc_map.name);
1617		− if (dev->driver_name)
1618		− ADD_HOTPLUG_VAR("DRV_NAME=%s", dev->driver_name);
1619		− if (dev->device_name)
1620		− ADD_HOTPLUG_VAR("DEV_NAME=%s", dev->device_name);
	1621	+ mutex_lock(&dev->lock);
1621	1622
1622		− return 0;
	1623	+ if (!dev->registered)
	1624	+ ret = -ENODEV;
	1625	+ if (ret == 0 && dev->rc_map.name)
	1626	+ ret = add_uevent_var(env, "NAME=%s", dev->rc_map.name);
	1627	+ if (ret == 0 && dev->driver_name)
	1628	+ ret = add_uevent_var(env, "DRV_NAME=%s", dev->driver_name);
	1629	+ if (ret == 0 && dev->device_name)
	1630	+ ret = add_uevent_var(env, "DEV_NAME=%s", dev->device_name);
	1631	+
	1632	+ mutex_unlock(&dev->lock);
	1633	+
	1634	+ return ret;
1623	1635	}
1624	1636
1625	1637	/*
@@ -2011,14 +2023,14 @@ void rc_unregister_device(struct rc_dev *dev) · 385 unmodified lines
2011	2023	del_timer_sync(&dev->timer_keyup);
2012	2024	del_timer_sync(&dev->timer_repeat);
2013	2025
2014		− rc_free_rx_device(dev);
2015		−
2016	2026	mutex_lock(&dev->lock);
2017	2027	if (dev->users && dev->close)
2018	2028	dev->close(dev);
2019	2029	dev->registered = false;
2020	2030	mutex_unlock(&dev->lock);
2021	2031
	2032	+ rc_free_rx_device(dev);
	2033	+
2022	2034	/*
2023	2035	* lirc device should be freed with dev->registered = false, so
2024	2036	* that userspace polling will get notified.

drivers/media/test-drivers/vicodec/vicodec-core.c+1−0

@@ -1994,6 +1994,7 @@ static int vicodec_request_validate(struct media_request *req) · 1993 unmodified lines
1994	1994	}
1995	1995	ctrl = v4l2_ctrl_request_hdl_ctrl_find(hdl,
1996	1996	vicodec_ctrl_stateless_state.id);
	1997	+ v4l2_ctrl_request_hdl_put(hdl);
1997	1998	if (!ctrl) {
1998	1999	v4l2_info(&ctx->dev->v4l2_dev,
1999	2000	"Missing required codec control\n");

drivers/media/tuners/xc5000.c+1−1

@@ -756,7 +756,7 @@ static int xc5000_set_digital_params(struct dvb_frontend *fe) · 755 unmodified lines
756	756	if (!bw)
757	757	bw = 6000000;
758	758	/* fall to OFDM handling */
759		− /* fall through */
	759	+ fallthrough;
760	760	case SYS_DMBTH:
761	761	case SYS_DVBT:
762	762	case SYS_DVBT2:

drivers/media/usb/b2c2/flexcop-usb.c+1−1

@@ -525,7 +525,7 @@ static int flexcop_usb_init(struct flexcop_usb *fc_usb) · 524 unmodified lines
525	525	case USB_SPEED_HIGH:
526	526	info("running at HIGH speed.");
527	527	break;
528		− case USB_SPEED_UNKNOWN: /* fall through */
	528	+ case USB_SPEED_UNKNOWN:
529	529	default:
530	530	err("cannot handle USB speed because it is unknown.");
531	531	return -ENODEV;

drivers/media/usb/cpia2/cpia2_core.c+18−18

@@ -165,7 +165,7 @@ int cpia2_do_command(struct camera_data *cam, · 164 unmodified lines
165	165	break;
166	166	case CPIA2_CMD_SET_VP_BRIGHTNESS:
167	167	cmd.buffer.block_data[0] = param;
168		− /* fall through */
	168	+ fallthrough;
169	169	case CPIA2_CMD_GET_VP_BRIGHTNESS:
170	170	cmd.req_mode = CAMERAACCESS_TYPE_BLOCK \| CAMERAACCESS_VP;
171	171	cmd.reg_count = 1;
@@ -176,7 +176,7 @@ int cpia2_do_command(struct camera_data *cam, · 4 unmodified lines
176	176	break;
177	177	case CPIA2_CMD_SET_CONTRAST:
178	178	cmd.buffer.block_data[0] = param;
179		− /* fall through */
	179	+ fallthrough;
180	180	case CPIA2_CMD_GET_CONTRAST:
181	181	cmd.req_mode = CAMERAACCESS_TYPE_BLOCK \| CAMERAACCESS_VP;
182	182	cmd.reg_count = 1;
@@ -184,7 +184,7 @@ int cpia2_do_command(struct camera_data *cam, · 1 unmodified line
184	184	break;
185	185	case CPIA2_CMD_SET_VP_SATURATION:
186	186	cmd.buffer.block_data[0] = param;
187		− /* fall through */
	187	+ fallthrough;
188	188	case CPIA2_CMD_GET_VP_SATURATION:
189	189	cmd.req_mode = CAMERAACCESS_TYPE_BLOCK \| CAMERAACCESS_VP;
190	190	cmd.reg_count = 1;
@@ -195,7 +195,7 @@ int cpia2_do_command(struct camera_data *cam, · 4 unmodified lines
195	195	break;
196	196	case CPIA2_CMD_SET_VP_GPIO_DATA:
197	197	cmd.buffer.block_data[0] = param;
198		− /* fall through */
	198	+ fallthrough;
199	199	case CPIA2_CMD_GET_VP_GPIO_DATA:
200	200	cmd.req_mode = CAMERAACCESS_TYPE_BLOCK \| CAMERAACCESS_VP;
201	201	cmd.reg_count = 1;
@@ -203,7 +203,7 @@ int cpia2_do_command(struct camera_data *cam, · 1 unmodified line
203	203	break;
204	204	case CPIA2_CMD_SET_VP_GPIO_DIRECTION:
205	205	cmd.buffer.block_data[0] = param;
206		− /* fall through */
	206	+ fallthrough;
207	207	case CPIA2_CMD_GET_VP_GPIO_DIRECTION:
208	208	cmd.req_mode = CAMERAACCESS_TYPE_BLOCK \| CAMERAACCESS_VP;
209	209	cmd.reg_count = 1;
@@ -211,7 +211,7 @@ int cpia2_do_command(struct camera_data *cam, · 1 unmodified line
211	211	break;
212	212	case CPIA2_CMD_SET_VC_MP_GPIO_DATA:
213	213	cmd.buffer.block_data[0] = param;
214		− /* fall through */
	214	+ fallthrough;
215	215	case CPIA2_CMD_GET_VC_MP_GPIO_DATA:
216	216	cmd.req_mode = CAMERAACCESS_TYPE_BLOCK \| CAMERAACCESS_VC;
217	217	cmd.reg_count = 1;
@@ -219,7 +219,7 @@ int cpia2_do_command(struct camera_data *cam, · 1 unmodified line
219	219	break;
220	220	case CPIA2_CMD_SET_VC_MP_GPIO_DIRECTION:
221	221	cmd.buffer.block_data[0] = param;
222		− /fall through /
	222	+ fallthrough;
223	223	case CPIA2_CMD_GET_VC_MP_GPIO_DIRECTION:
224	224	cmd.req_mode = CAMERAACCESS_TYPE_BLOCK \| CAMERAACCESS_VC;
225	225	cmd.reg_count = 1;
@@ -234,7 +234,7 @@ int cpia2_do_command(struct camera_data *cam, · 8 unmodified lines
234	234	break;
235	235	case CPIA2_CMD_SET_FLICKER_MODES:
236	236	cmd.buffer.block_data[0] = param;
237		− /* fall through */
	237	+ fallthrough;
238	238	case CPIA2_CMD_GET_FLICKER_MODES:
239	239	cmd.req_mode = CAMERAACCESS_TYPE_BLOCK \| CAMERAACCESS_VP;
240	240	cmd.reg_count = 1;
@@ -281,7 +281,7 @@ int cpia2_do_command(struct camera_data *cam, · 40 unmodified lines
281	281	break;
282	282	case CPIA2_CMD_SET_USER_MODE:
283	283	cmd.buffer.block_data[0] = param;
284		− /* fall through */
	284	+ fallthrough;
285	285	case CPIA2_CMD_GET_USER_MODE:
286	286	cmd.req_mode = CAMERAACCESS_TYPE_BLOCK \| CAMERAACCESS_VP;
287	287	cmd.reg_count = 1;
@@ -301,7 +301,7 @@ int cpia2_do_command(struct camera_data *cam, · 13 unmodified lines
301	301	break;
302	302	case CPIA2_CMD_SET_WAKEUP:
303	303	cmd.buffer.block_data[0] = param;
304		− /* fall through */
	304	+ fallthrough;
305	305	case CPIA2_CMD_GET_WAKEUP:
306	306	cmd.req_mode = CAMERAACCESS_TYPE_BLOCK \| CAMERAACCESS_VC;
307	307	cmd.reg_count = 1;
@@ -309,7 +309,7 @@ int cpia2_do_command(struct camera_data *cam, · 1 unmodified line
309	309	break;
310	310	case CPIA2_CMD_SET_PW_CONTROL:
311	311	cmd.buffer.block_data[0] = param;
312		− /* fall through */
	312	+ fallthrough;
313	313	case CPIA2_CMD_GET_PW_CONTROL:
314	314	cmd.req_mode = CAMERAACCESS_TYPE_BLOCK \| CAMERAACCESS_VC;
315	315	cmd.reg_count = 1;
@@ -322,7 +322,7 @@ int cpia2_do_command(struct camera_data *cam, · 6 unmodified lines
322	322	break;
323	323	case CPIA2_CMD_SET_SYSTEM_CTRL:
324	324	cmd.buffer.block_data[0] = param;
325		− /* fall through */
	325	+ fallthrough;
326	326	case CPIA2_CMD_GET_SYSTEM_CTRL:
327	327	cmd.req_mode =
328	328	CAMERAACCESS_TYPE_BLOCK \| CAMERAACCESS_SYSTEM;
@@ -331,7 +331,7 @@ int cpia2_do_command(struct camera_data *cam, · 2 unmodified lines
331	331	break;
332	332	case CPIA2_CMD_SET_VP_SYSTEM_CTRL:
333	333	cmd.buffer.block_data[0] = param;
334		− /* fall through */
	334	+ fallthrough;
335	335	case CPIA2_CMD_GET_VP_SYSTEM_CTRL:
336	336	cmd.req_mode = CAMERAACCESS_TYPE_BLOCK \| CAMERAACCESS_VP;
337	337	cmd.reg_count = 1;
@@ -339,7 +339,7 @@ int cpia2_do_command(struct camera_data *cam, · 1 unmodified line
339	339	break;
340	340	case CPIA2_CMD_SET_VP_EXP_MODES:
341	341	cmd.buffer.block_data[0] = param;
342		− /* fall through */
	342	+ fallthrough;
343	343	case CPIA2_CMD_GET_VP_EXP_MODES:
344	344	cmd.req_mode = CAMERAACCESS_TYPE_BLOCK \| CAMERAACCESS_VP;
345	345	cmd.reg_count = 1;
@@ -347,7 +347,7 @@ int cpia2_do_command(struct camera_data *cam, · 1 unmodified line
347	347	break;
348	348	case CPIA2_CMD_SET_DEVICE_CONFIG:
349	349	cmd.buffer.block_data[0] = param;
350		− /* fall through */
	350	+ fallthrough;
351	351	case CPIA2_CMD_GET_DEVICE_CONFIG:
352	352	cmd.req_mode = CAMERAACCESS_TYPE_BLOCK \| CAMERAACCESS_VP;
353	353	cmd.reg_count = 1;
@@ -368,7 +368,7 @@ int cpia2_do_command(struct camera_data *cam, · 14 unmodified lines
368	368	break;
369	369	case CPIA2_CMD_SET_VC_CONTROL:
370	370	cmd.buffer.block_data[0] = param;
371		− /* fall through */
	371	+ fallthrough;
372	372	case CPIA2_CMD_GET_VC_CONTROL:
373	373	cmd.req_mode = CAMERAACCESS_TYPE_BLOCK \| CAMERAACCESS_VC;
374	374	cmd.reg_count = 1;
@@ -403,7 +403,7 @@ int cpia2_do_command(struct camera_data *cam, · 28 unmodified lines
403	403	this register can also affect
404	404	flicker modes */
405	405	cmd.buffer.block_data[0] = param;
406		− /* fall through */
	406	+ fallthrough;
407	407	case CPIA2_CMD_GET_USER_EFFECTS:
408	408	cmd.req_mode = CAMERAACCESS_TYPE_BLOCK \| CAMERAACCESS_VP;
409	409	cmd.reg_count = 1;
@@ -1751,7 +1751,7 @@ int cpia2_set_fps(struct camera_data *cam, int framerate) · 1341 unmodified lines
1751	1751	CPIA2_VP_SENSOR_FLAGS_500) {
1752	1752	return -EINVAL;
1753	1753	}
1754		− /* Fall through */
	1754	+ fallthrough;
1755	1755	case CPIA2_VP_FRAMERATE_15:
1756	1756	case CPIA2_VP_FRAMERATE_12_5:
1757	1757	case CPIA2_VP_FRAMERATE_7_5:

drivers/media/usb/cx231xx/cx231xx-video.c+1−1

@@ -996,7 +996,7 @@ void cx231xx_v4l2_create_entities(struct cx231xx *dev) · 995 unmodified lines
996	996	/* The DVB core will handle it */
997	997	if (dev->tuner_type == TUNER_ABSENT)
998	998	continue;
999		− /* fall through */
	999	+ fallthrough;
1000	1000	default: /* just to shut up a gcc warning */
1001	1001	ent->function = MEDIA_ENT_F_CONN_RF;
1002	1002	break;

drivers/media/usb/dvb-usb/dib0700_devices.c+6−6

@@ -1659,14 +1659,14 @@ static int dib8096_set_param_override(struct dvb_frontend *fe) · 1658 unmodified lines
1659	1659
1660	1660	switch (band) {
1661	1661	default:
1662		− deb_info("Warning : Rf frequency (%iHz) is not in the supported range, using VHF switch ", fe->dtv_property_cache.frequency);
1663		− /* fall through */
	1662	+ deb_info("Warning : Rf frequency (%iHz) is not in the supported range, using VHF switch ", fe->dtv_property_cache.frequency);
	1663	+ fallthrough;
1664	1664	case BAND_VHF:
1665		− state->dib8000_ops.set_gpio(fe, 3, 0, 1);
1666		− break;
	1665	+ state->dib8000_ops.set_gpio(fe, 3, 0, 1);
	1666	+ break;
1667	1667	case BAND_UHF:
1668		− state->dib8000_ops.set_gpio(fe, 3, 0, 0);
1669		− break;
	1668	+ state->dib8000_ops.set_gpio(fe, 3, 0, 0);
	1669	+ break;
1670	1670	}
1671	1671
1672	1672	ret = state->set_param_save(fe);

drivers/media/usb/dvb-usb/dw2102.c+3−3

@@ -1886,12 +1886,12 @@ static int dw2102_load_firmware(struct usb_device *dev, · 1885 unmodified lines
1886	1886	switch (le16_to_cpu(dev->descriptor.idProduct)) {
1887	1887	case USB_PID_TEVII_S650:
1888	1888	dw2104_properties.rc.core.rc_codes = RC_MAP_TEVII_NEC;
1889		− /* fall through */
	1889	+ fallthrough;
1890	1890	case USB_PID_DW2104:
1891	1891	reset = 1;
1892	1892	dw210x_op_rw(dev, 0xc4, 0x0000, 0, &reset, 1,
1893	1893	DW210X_WRITE_MSG);
1894		− /* fall through */
	1894	+ fallthrough;
1895	1895	case USB_PID_DW3101:
1896	1896	reset = 0;
1897	1897	dw210x_op_rw(dev, 0xbf, 0x0040, 0, &reset, 0,
@@ -1924,7 +1924,7 @@ static int dw2102_load_firmware(struct usb_device *dev, · 26 unmodified lines
1924	1924	break;
1925	1925	}
1926	1926	}
1927		− /* fall through */
	1927	+ fallthrough;
1928	1928	case 0x2101:
1929	1929	dw210x_op_rw(dev, 0xbc, 0x0030, 0, &reset16[0], 2,
1930	1930	DW210X_READ_MSG);

drivers/media/v4l2-core/v4l2-ctrls.c+1−1

@@ -2200,7 +2200,7 @@ static int check_range(enum v4l2_ctrl_type type, · 2199 unmodified lines
2200	2200	case V4L2_CTRL_TYPE_BOOLEAN:
2201	2201	if (step != 1 \|\| max > 1 \|\| min < 0)
2202	2202	return -ERANGE;
2203		− /* fall through */
	2203	+ fallthrough;
2204	2204	case V4L2_CTRL_TYPE_U8:
2205	2205	case V4L2_CTRL_TYPE_U16:
2206	2206	case V4L2_CTRL_TYPE_U32:

drivers/media/v4l2-core/v4l2-ioctl.c+27−25

@@ -782,7 +782,6 @@ static void v4l_print_frmsizeenum(const void *arg, bool write_only) · 781 unmodified lines
782	782	p->stepwise.step_height);
783	783	break;
784	784	case V4L2_FRMSIZE_TYPE_CONTINUOUS:
785		− /* fall through */
786	785	default:
787	786	pr_cont("\n");
788	787	break;
@@ -816,7 +815,6 @@ static void v4l_print_frmivalenum(const void *arg, bool write_only) · 27 unmodified lines
816	815	p->stepwise.step.denominator);
817	816	break;
818	817	case V4L2_FRMIVAL_TYPE_CONTINUOUS:
819		− /* fall through */
820	818	default:
821	819	pr_cont("\n");
822	820	break;
@@ -3189,14 +3187,16 @@ static int video_put_user(void __user arg, void parg, unsigned int cmd) · 2366 unmodified lines
3189	3187	#ifdef CONFIG_COMPAT_32BIT_TIME
3190	3188	case VIDIOC_DQEVENT_TIME32: {
3191	3189	struct v4l2_event *ev = parg;
3192		− struct v4l2_event_time32 ev32 = {
3193		− .type = ev->type,
3194		− .pending = ev->pending,
3195		− .sequence = ev->sequence,
3196		− .timestamp.tv_sec = ev->timestamp.tv_sec,
3197		− .timestamp.tv_nsec = ev->timestamp.tv_nsec,
3198		− .id = ev->id,
3199		− };
	3190	+ struct v4l2_event_time32 ev32;
	3191	+
	3192	+ memset(&ev32, 0, sizeof(ev32));
	3193	+
	3194	+ ev32.type = ev->type;
	3195	+ ev32.pending = ev->pending;
	3196	+ ev32.sequence = ev->sequence;
	3197	+ ev32.timestamp.tv_sec = ev->timestamp.tv_sec;
	3198	+ ev32.timestamp.tv_nsec = ev->timestamp.tv_nsec;
	3199	+ ev32.id = ev->id;
3200	3200
3201	3201	memcpy(&ev32.u, &ev->u, sizeof(ev->u));
3202	3202	memcpy(&ev32.reserved, &ev->reserved, sizeof(ev->reserved));
@@ -3210,21 +3210,23 @@ static int video_put_user(void __user arg, void parg, unsigned int cmd) · 7 unmodified lines
3210	3210	case VIDIOC_DQBUF_TIME32:
3211	3211	case VIDIOC_PREPARE_BUF_TIME32: {
3212	3212	struct v4l2_buffer *vb = parg;
3213		− struct v4l2_buffer_time32 vb32 = {
3214		− .index = vb->index,
3215		− .type = vb->type,
3216		− .bytesused = vb->bytesused,
3217		− .flags = vb->flags,
3218		− .field = vb->field,
3219		− .timestamp.tv_sec = vb->timestamp.tv_sec,
3220		− .timestamp.tv_usec = vb->timestamp.tv_usec,
3221		− .timecode = vb->timecode,
3222		− .sequence = vb->sequence,
3223		− .memory = vb->memory,
3224		− .m.userptr = vb->m.userptr,
3225		− .length = vb->length,
3226		− .request_fd = vb->request_fd,
3227		− };
	3213	+ struct v4l2_buffer_time32 vb32;
	3214	+
	3215	+ memset(&vb32, 0, sizeof(vb32));
	3216	+
	3217	+ vb32.index = vb->index;
	3218	+ vb32.type = vb->type;
	3219	+ vb32.bytesused = vb->bytesused;
	3220	+ vb32.flags = vb->flags;
	3221	+ vb32.field = vb->field;
	3222	+ vb32.timestamp.tv_sec = vb->timestamp.tv_sec;
	3223	+ vb32.timestamp.tv_usec = vb->timestamp.tv_usec;
	3224	+ vb32.timecode = vb->timecode;
	3225	+ vb32.sequence = vb->sequence;
	3226	+ vb32.memory = vb->memory;
	3227	+ vb32.m.userptr = vb->m.userptr;
	3228	+ vb32.length = vb->length;
	3229	+ vb32.request_fd = vb->request_fd;
3228	3230
3229	3231	if (copy_to_user(arg, &vb32, sizeof(vb32)))
3230	3232	return -EFAULT;

drivers/media/v4l2-core/videobuf-core.c+1−1

@@ -354,7 +354,7 @@ static void videobuf_status(struct videobuf_queue q, struct v4l2_buffer b, · 353 unmodified lines
354	354	break;
355	355	case VIDEOBUF_ERROR:
356	356	b->flags \|= V4L2_BUF_FLAG_ERROR;
357		− /* fall through */
	357	+ fallthrough;
358	358	case VIDEOBUF_DONE:
359	359	b->flags \|= V4L2_BUF_FLAG_DONE;
360	360	break;

drivers/memory/omap-gpmc.c+0−1

@@ -313,7 +313,6 @@ static unsigned long gpmc_get_clk_period(int cs, enum gpmc_clk_domain cd) · 312 unmodified lines
313	313	tick_ps *= div;
314	314	break;
315	315	case GPMC_CD_FCLK:
316		− /* FALL-THROUGH */
317	316	default:
318	317	break;
319	318	}

drivers/memstick/core/ms_block.c+6−6

@@ -371,7 +371,7 @@ again: · 370 unmodified lines
371	371	serial mode), then just fall through */
372	372	if (msb_read_int_reg(msb, -1))
373	373	return 0;
374		− /* fallthrough */
	374	+ fallthrough;
375	375
376	376	case MSB_RP_RECEIVE_INT_REQ_RESULT:
377	377	intreg = mrq->data[0];
@@ -403,7 +403,7 @@ again: · 25 unmodified lines
403	403	case MSB_RP_RECEIVE_STATUS_REG:
404	404	msb->regs.status = (struct ms_status_register )mrq->data;
405	405	msb->state = MSB_RP_SEND_OOB_READ;
406		− /* fallthrough */
	406	+ fallthrough;
407	407
408	408	case MSB_RP_SEND_OOB_READ:
409	409	if (!msb_read_regs(msb,
@@ -418,7 +418,7 @@ again: · 8 unmodified lines
418	418	msb->regs.extra_data =
419	419	(struct ms_extra_data_register ) mrq->data;
420	420	msb->state = MSB_RP_SEND_READ_DATA;
421		− /* fallthrough */
	421	+ fallthrough;
422	422
423	423	case MSB_RP_SEND_READ_DATA:
424	424	/* Skip that state if we only read the oob */
@@ -518,7 +518,7 @@ again: · 93 unmodified lines
518	518	msb->state = MSB_WB_RECEIVE_INT_REQ;
519	519	if (msb_read_int_reg(msb, -1))
520	520	return 0;
521		− /* fallthrough */
	521	+ fallthrough;
522	522
523	523	case MSB_WB_RECEIVE_INT_REQ:
524	524	intreg = mrq->data[0];
@@ -549,7 +549,7 @@ again: · 24 unmodified lines
549	549
550	550	msb->int_polling = false;
551	551	msb->state = MSB_WB_SEND_WRITE_DATA;
552		− /* fallthrough */
	552	+ fallthrough;
553	553
554	554	case MSB_WB_SEND_WRITE_DATA:
555	555	sg_init_table(sg, ARRAY_SIZE(sg));
@@ -628,7 +628,7 @@ again: · 72 unmodified lines
628	628	msb->state = MSB_SC_RECEIVE_INT_REQ;
629	629	if (msb_read_int_reg(msb, -1))
630	630	return 0;
631		− /* fallthrough */
	631	+ fallthrough;
632	632
633	633	case MSB_SC_RECEIVE_INT_REQ:
634	634	intreg = mrq->data[0];

drivers/memstick/host/jmb38x_ms.c+2−2

@@ -255,11 +255,11 @@ static unsigned int jmb38x_ms_write_data(struct jmb38x_ms_host *host, · 254 unmodified lines
255	255	case 3:
256	256	host->io_word[0] \|= buf[off + 2] << 16;
257	257	host->io_pos++;
258		− /* fall through */
	258	+ fallthrough;
259	259	case 2:
260	260	host->io_word[0] \|= buf[off + 1] << 8;
261	261	host->io_pos++;
262		− /* fall through */
	262	+ fallthrough;
263	263	case 1:
264	264	host->io_word[0] \|= buf[off];
265	265	host->io_pos++;

drivers/memstick/host/tifm_ms.c+2−2

@@ -162,11 +162,11 @@ static unsigned int tifm_ms_write_data(struct tifm_ms *host, · 161 unmodified lines
162	162	case 3:
163	163	host->io_word \|= buf[off + 2] << 16;
164	164	host->io_pos++;
165		− /* fall through */
	165	+ fallthrough;
166	166	case 2:
167	167	host->io_word \|= buf[off + 1] << 8;
168	168	host->io_pos++;
169		− /* fall through */
	169	+ fallthrough;
170	170	case 1:
171	171	host->io_word \|= buf[off];
172	172	host->io_pos++;

drivers/message/fusion/mptbase.c+3−3

@@ -642,7 +642,7 @@ mptbase_reply(MPT_ADAPTER ioc, MPT_FRAME_HDR req, MPT_FRAME_HDR *reply) · 641 unmodified lines
642	642	freereq = 0;
643	643	if (event != MPI_EVENT_EVENT_CHANGE)
644	644	break;
645		− /* fall through */
	645	+ fallthrough;
646	646	case MPI_FUNCTION_CONFIG:
647	647	case MPI_FUNCTION_SAS_IO_UNIT_CONTROL:
648	648	ioc->mptbase_cmds.status \|= MPT_MGMT_STATUS_COMMAND_GOOD;
@@ -1887,7 +1887,7 @@ mpt_attach(struct pci_dev pdev, const struct pci_device_id id) · 1238 unmodified lines
1887	1887	case MPI_MANUFACTPAGE_DEVICEID_FC939X:
1888	1888	case MPI_MANUFACTPAGE_DEVICEID_FC949X:
1889	1889	ioc->errata_flag_1064 = 1;
1890		− /* fall through */
	1890	+ fallthrough;
1891	1891	case MPI_MANUFACTPAGE_DEVICEID_FC909:
1892	1892	case MPI_MANUFACTPAGE_DEVICEID_FC929:
1893	1893	case MPI_MANUFACTPAGE_DEVICEID_FC919:
@@ -1932,7 +1932,7 @@ mpt_attach(struct pci_dev pdev, const struct pci_device_id id) · 38 unmodified lines
1932	1932	pcixcmd &= 0x8F;
1933	1933	pci_write_config_byte(pdev, 0x6a, pcixcmd);
1934	1934	}
1935		− /* fall through */
	1935	+ fallthrough;
1936	1936
1937	1937	case MPI_MANUFACTPAGE_DEVID_1030_53C1035:
1938	1938	ioc->bus_type = SPI;

drivers/message/fusion/mptsas.c+1−1

@@ -4326,7 +4326,7 @@ mptsas_hotplug_work(MPT_ADAPTER ioc, struct fw_event_work fw_event, · 4325 unmodified lines
4326	4326	}
4327	4327	}
4328	4328	mpt_findImVolumes(ioc);
4329		− /* fall through */
	4329	+ fallthrough;
4330	4330
4331	4331	case MPTSAS_ADD_DEVICE:
4332	4332	memset(&sas_device, 0, sizeof(struct mptsas_devinfo));

drivers/message/fusion/mptscsih.c+2−2

@@ -784,7 +784,7 @@ mptscsih_io_done(MPT_ADAPTER ioc, MPT_FRAME_HDR mf, MPT_FRAME_HDR *mr) · 783 unmodified lines
784	784	/*
785	785	* Allow non-SAS & non-NEXUS_LOSS to drop into below code
786	786	*/
787		− /* Fall through */
	787	+ fallthrough;
788	788
789	789	case MPI_IOCSTATUS_SCSI_TASK_TERMINATED: /* 0x0048 */
790	790	/* Linux handles an unsolicited DID_RESET better
@@ -881,7 +881,7 @@ mptscsih_io_done(MPT_ADAPTER ioc, MPT_FRAME_HDR mf, MPT_FRAME_HDR *mr) · 90 unmodified lines
881	881
882	882	case MPI_IOCSTATUS_SCSI_DATA_OVERRUN: /* 0x0044 */
883	883	scsi_set_resid(sc, 0);
884		− /* Fall through */
	884	+ fallthrough;
885	885	case MPI_IOCSTATUS_SCSI_RECOVERED_ERROR: /* 0x0040 */
886	886	case MPI_IOCSTATUS_SUCCESS: /* 0x0000 */
887	887	sc->result = (DID_OK << 16) \| scsi_status;

drivers/mfd/db8500-prcmu.c+2−2

@@ -1515,10 +1515,10 @@ static unsigned long dsiclk_rate(u8 n) · 1514 unmodified lines
1515	1515	switch (divsel) {
1516	1516	case PRCM_DSI_PLLOUT_SEL_PHI_4:
1517	1517	div *= 2;
1518		− /* Fall through */
	1518	+ fallthrough;
1519	1519	case PRCM_DSI_PLLOUT_SEL_PHI_2:
1520	1520	div *= 2;
1521		− /* Fall through */
	1521	+ fallthrough;
1522	1522	case PRCM_DSI_PLLOUT_SEL_PHI:
1523	1523	return pll_rate(PRCM_PLLDSI_FREQ, clock_rate(PRCMU_HDMICLK),
1524	1524	PLL_RAW) / div;

drivers/mfd/iqs62x.c+3−3

@@ -136,7 +136,7 @@ static int iqs62x_dev_init(struct iqs62x_core *iqs62x) · 135 unmodified lines
136	136	if (val & IQS620_PROX_SETTINGS_4_SAR_EN)
137	137	iqs62x->ui_sel = IQS62X_UI_SAR1;
138	138
139		− /* fall through */
	139	+ fallthrough;
140	140
141	141	case IQS621_PROD_NUM:
142	142	ret = regmap_write(iqs62x->regmap, IQS620_GLBL_EVENT_MASK,
@@ -470,7 +470,7 @@ static irqreturn_t iqs62x_irq(int irq, void *context) · 327 unmodified lines
470	470	case IQS62X_EVENT_UI_LO:
471	471	event_data.ui_data = get_unaligned_le16(&event_map[i]);
472	472
473		− /* fall through */
	473	+ fallthrough;
474	474
475	475	case IQS62X_EVENT_UI_HI:
476	476	case IQS62X_EVENT_NONE:
@@ -491,7 +491,7 @@ static irqreturn_t iqs62x_irq(int irq, void *context) · 14 unmodified lines
491	491	case IQS62X_EVENT_HYST:
492	492	event_map[i] <<= iqs62x->dev_desc->hyst_shift;
493	493
494		− /* fall through */
	494	+ fallthrough;
495	495
496	496	case IQS62X_EVENT_WHEEL:
497	497	case IQS62X_EVENT_HALL:

drivers/mfd/mfd-core.c+6−6

@@ -126,10 +126,6 @@ static int mfd_match_of_node_to_dev(struct platform_device *pdev, · 125 unmodified lines
126	126	const __be32 *reg;
127	127	u64 of_node_addr;
128	128
129		− /* Skip devices 'disabled' by Device Tree */
130		− if (!of_device_is_available(np))
131		− return -ENODEV;
132		−
133	129	/* Skip if OF node has previously been allocated to a device */
134	130	list_for_each_entry(of_entry, &mfd_of_node_list, list)
135	131	if (of_entry->np == np)
@@ -212,6 +208,12 @@ static int mfd_add_device(struct device *parent, int id, · 76 unmodified lines
212	208	if (IS_ENABLED(CONFIG_OF) && parent->of_node && cell->of_compatible) {
213	209	for_each_child_of_node(parent->of_node, np) {
214	210	if (of_device_is_compatible(np, cell->of_compatible)) {
	211	+ /* Ignore 'disabled' devices error free */
	212	+ if (!of_device_is_available(np)) {
	213	+ ret = 0;
	214	+ goto fail_alias;
	215	+ }
	216	+
215	217	ret = mfd_match_of_node_to_dev(pdev, np, cell);
216	218	if (ret == -EAGAIN)
217	219	continue;
@@ -370,8 +372,6 @@ static int mfd_remove_devices_fn(struct device dev, void data) · 152 unmodified lines
370	372	regulator_bulk_unregister_supply_alias(dev, cell->parent_supplies,
371	373	cell->num_parent_supplies);
372	374
373		− kfree(cell);
374		−
375	375	platform_device_unregister(pdev);
376	376	return 0;
377	377	}

drivers/mfd/mxs-lradc.c+1−1

@@ -172,7 +172,7 @@ static int mxs_lradc_probe(struct platform_device *pdev) · 171 unmodified lines
172	172	MXS_LRADC_TOUCHSCREEN_5WIRE;
173	173	break;
174	174	}
175		− /* fall through - to an error message for i.MX23 */
	175	+ fallthrough; /* to an error message for i.MX23 */
176	176	default:
177	177	dev_err(&pdev->dev,
178	178	"Unsupported number of touchscreen wires (%d)\n"

drivers/mfd/omap-usb-host.c+2−2

@@ -308,7 +308,7 @@ static int usbhs_runtime_resume(struct device *dev) · 307 unmodified lines
308	308	i, r);
309	309	}
310	310	}
311		− /* Fall through - as HSIC mode needs utmi_clk */
	311	+ fallthrough; /* as HSIC mode needs utmi_clk */
312	312
313	313	case OMAP_EHCI_PORT_MODE_TLL:
314	314	if (!IS_ERR(omap->utmi_clk[i])) {
@@ -344,7 +344,7 @@ static int usbhs_runtime_suspend(struct device *dev) · 29 unmodified lines
344	344
345	345	if (!IS_ERR(omap->hsic480m_clk[i]))
346	346	clk_disable_unprepare(omap->hsic480m_clk[i]);
347		− /* Fall through - as utmi_clks were used in HSIC mode */
	347	+ fallthrough; /* as utmi_clks were used in HSIC mode */
348	348
349	349	case OMAP_EHCI_PORT_MODE_TLL:
350	350	if (!IS_ERR(omap->utmi_clk[i]))

drivers/mfd/rave-sp.c+2−2

@@ -270,7 +270,7 @@ static void stuff(unsigned char dest, const unsigned char *src, size_t n) · 269 unmodified lines
270	270	case RAVE_SP_ETX:
271	271	case RAVE_SP_DLE:
272	272	*dest++ = RAVE_SP_DLE;
273		− /* FALLTHROUGH */
	273	+ fallthrough;
274	274	default:
275	275	*dest++ = byte;
276	276	}
@@ -541,7 +541,7 @@ static int rave_sp_receive_buf(struct serdev_device *serdev, · 264 unmodified lines
541	541	* deframer buffer
542	542	*/
543	543
544		− /* FALLTHROUGH */
	544	+ fallthrough;
545	545
546	546	case RAVE_SP_EXPECT_ESCAPED_DATA:
547	547	if (deframer->length == sizeof(deframer->data)) {

drivers/mfd/syscon.c+1−1

@@ -95,7 +95,7 @@ static struct syscon of_syscon_register(struct device_node np, bool check_clk) · 94 unmodified lines
95	95	break;
96	96	default:
97	97	pr_err("Failed to retrieve valid hwlock: %d\n", ret);
98		− /* fall-through */
	98	+ fallthrough;
99	99	case -EPROBE_DEFER:
100	100	goto err_regmap;
101	101	}

drivers/misc/eeprom/at25.c+5−5

@@ -90,10 +90,10 @@ static int at25_ee_read(void *priv, unsigned int offset, · 89 unmodified lines
90	90	switch (at25->addrlen) {
91	91	default: /* case 3 */
92	92	*cp++ = offset >> 16;
93		− /* fall through */
	93	+ fallthrough;
94	94	case 2:
95	95	*cp++ = offset >> 8;
96		− /* fall through */
	96	+ fallthrough;
97	97	case 1:
98	98	case 0: /* can't happen: for better codegen */
99	99	*cp++ = offset >> 0;
@@ -178,10 +178,10 @@ static int at25_ee_write(void priv, unsigned int off, void val, size_t count) · 78 unmodified lines
178	178	switch (at25->addrlen) {
179	179	default: /* case 3 */
180	180	*cp++ = offset >> 16;
181		− /* fall through */
	181	+ fallthrough;
182	182	case 2:
183	183	*cp++ = offset >> 8;
184		− /* fall through */
	184	+ fallthrough;
185	185	case 1:
186	186	case 0: /* can't happen: for better codegen */
187	187	*cp++ = offset >> 0;
@@ -278,7 +278,7 @@ static int at25_fw_to_chip(struct device dev, struct spi_eeprom chip) · 90 unmodified lines
278	278	switch (val) {
279	279	case 9:
280	280	chip->flags \|= EE_INSTR_BIT3_IS_ADDR;
281		− /* fall through */
	281	+ fallthrough;
282	282	case 8:
283	283	chip->flags \|= EE_ADDR1;
284	284	break;

drivers/misc/habanalabs/common/command_buffer.c+14−2

@@ -10,6 +10,7 @@ · 9 unmodified lines
10	10
11	11	#include <linux/mm.h>
12	12	#include <linux/slab.h>
	13	+#include <linux/uaccess.h>
13	14	#include <linux/genalloc.h>
14	15
15	16	static void cb_fini(struct hl_device hdev, struct hl_cb cb)
@@ -300,7 +301,7 @@ int hl_cb_mmap(struct hl_fpriv hpriv, struct vm_area_struct vma) · 284 unmodified lines
300	301	struct hl_device *hdev = hpriv->hdev;
301	302	struct hl_cb *cb;
302	303	phys_addr_t address;
303		− u32 handle;
	304	+ u32 handle, user_cb_size;
304	305	int rc;
305	306
306	307	handle = vma->vm_pgoff;
@@ -314,7 +315,8 @@ int hl_cb_mmap(struct hl_fpriv hpriv, struct vm_area_struct vma) · 7 unmodified lines
314	315	}
315	316
316	317	/* Validation check */
317		− if ((vma->vm_end - vma->vm_start) != ALIGN(cb->size, PAGE_SIZE)) {
	318	+ user_cb_size = vma->vm_end - vma->vm_start;
	319	+ if (user_cb_size != ALIGN(cb->size, PAGE_SIZE)) {
318	320	dev_err(hdev->dev,
319	321	"CB mmap failed, mmap size 0x%lx != 0x%x cb size\n",
320	322	vma->vm_end - vma->vm_start, cb->size);
@@ -322,6 +324,16 @@ int hl_cb_mmap(struct hl_fpriv hpriv, struct vm_area_struct vma) · 1 unmodified line
322	324	goto put_cb;
323	325	}
324	326
	327	+ if (!access_ok((void __user *) (uintptr_t) vma->vm_start,
	328	+ user_cb_size)) {
	329	+ dev_err(hdev->dev,
	330	+ "user pointer is invalid - 0x%lx\n",
	331	+ vma->vm_start);
	332	+
	333	+ rc = -EINVAL;
	334	+ goto put_cb;
	335	+ }
	336	+
325	337	spin_lock(&cb->lock);
326	338
327	339	if (cb->mmap) {

drivers/misc/habanalabs/common/command_submission.c+8−0

@@ -808,6 +808,14 @@ static int cs_ioctl_signal_wait(struct hl_fpriv *hpriv, enum hl_cs_type cs_type, · 807 unmodified lines
808	808
809	809	/* currently it is guaranteed to have only one chunk */
810	810	chunk = &cs_chunk_array[0];
	811	+
	812	+ if (chunk->queue_index >= hdev->asic_prop.max_queues) {
	813	+ dev_err(hdev->dev, "Queue index %d is invalid\n",
	814	+ chunk->queue_index);
	815	+ rc = -EINVAL;
	816	+ goto free_cs_chunk_array;
	817	+ }
	818	+
811	819	q_idx = chunk->queue_index;
812	820	hw_queue_prop = &hdev->asic_prop.hw_queues_props[q_idx];
813	821	q_type = hw_queue_prop->type;

drivers/misc/habanalabs/common/debugfs.c+4−4

@@ -19,7 +19,7 @@ · 18 unmodified lines
19	19	static struct dentry *hl_debug_root;
20	20
21	21	static int hl_debugfs_i2c_read(struct hl_device *hdev, u8 i2c_bus, u8 i2c_addr,
22		− u8 i2c_reg, u32 *val)
	22	+ u8 i2c_reg, long *val)
23	23	{
24	24	struct armcp_packet pkt;
25	25	int rc;
@@ -36,7 +36,7 @@ static int hl_debugfs_i2c_read(struct hl_device *hdev, u8 i2c_bus, u8 i2c_addr, · 10 unmodified lines
36	36	pkt.i2c_reg = i2c_reg;
37	37
38	38	rc = hdev->asic_funcs->send_cpu_message(hdev, (u32 *) &pkt, sizeof(pkt),
39		− 0, (long *) val);
	39	+ 0, val);
40	40
41	41	if (rc)
42	42	dev_err(hdev->dev, "Failed to read from I2C, error %d\n", rc);
@@ -827,7 +827,7 @@ static ssize_t hl_i2c_data_read(struct file f, char __user buf, · 784 unmodified lines
827	827	struct hl_dbg_device_entry *entry = file_inode(f)->i_private;
828	828	struct hl_device *hdev = entry->hdev;
829	829	char tmp_buf[32];
830		− u32 val;
	830	+ long val;
831	831	ssize_t rc;
832	832
833	833	if (*ppos)
@@ -842,7 +842,7 @@ static ssize_t hl_i2c_data_read(struct file f, char __user buf, · 8 unmodified lines
842	842	return rc;
843	843	}
844	844
845		− sprintf(tmp_buf, "0x%02x\n", val);
	845	+ sprintf(tmp_buf, "0x%02lx\n", val);
846	846	rc = simple_read_from_buffer(buf, count, ppos, tmp_buf,
847	847	strlen(tmp_buf));
848	848

drivers/misc/habanalabs/common/device.c+7−2

@@ -288,7 +288,7 @@ static int device_early_init(struct hl_device *hdev) · 287 unmodified lines
288	288	for (i = 0 ; i < hdev->asic_prop.completion_queues_count ; i++) {
289	289	snprintf(workq_name, 32, "hl-free-jobs-%u", i);
290	290	hdev->cq_wq[i] = create_singlethread_workqueue(workq_name);
291		− if (hdev->cq_wq == NULL) {
	291	+ if (hdev->cq_wq[i] == NULL) {
292	292	dev_err(hdev->dev, "Failed to allocate CQ workqueue\n");
293	293	rc = -ENOMEM;
294	294	goto free_cq_wq;
@@ -1069,7 +1069,7 @@ again: · 774 unmodified lines
1069	1069	goto out_err;
1070	1070	}
1071	1071
1072		− hl_set_max_power(hdev, hdev->max_power);
	1072	+ hl_set_max_power(hdev);
1073	1073	} else {
1074	1074	rc = hdev->asic_funcs->soft_reset_late_init(hdev);
1075	1075	if (rc) {
@@ -1318,6 +1318,11 @@ int hl_device_init(struct hl_device hdev, struct class hclass) · 242 unmodified lines
1318	1318	goto out_disabled;
1319	1319	}
1320	1320
	1321	+ /* Need to call this again because the max power might change,
	1322	+ * depending on card type for certain ASICs
	1323	+ */
	1324	+ hl_set_max_power(hdev);
	1325	+
1321	1326	/*
1322	1327	* hl_hwmon_init() must be called after device_late_init(), because only
1323	1328	* there we get the information from the device about which

drivers/misc/habanalabs/common/firmware_if.c+9−0

@@ -13,6 +13,7 @@ · 12 unmodified lines
13	13	#include <linux/io-64-nonatomic-lo-hi.h>
14	14	#include <linux/slab.h>
15	15
	16	+#define FW_FILE_MAX_SIZE 0x1400000 /* maximum size of 20MB */
16	17	/**
17	18	* hl_fw_load_fw_to_device() - Load F/W code to device's memory.
18	19	*
@@ -48,6 +49,14 @@ int hl_fw_load_fw_to_device(struct hl_device hdev, const char fw_name, · 29 unmodified lines
48	49
49	50	dev_dbg(hdev->dev, "%s firmware size == %zu\n", fw_name, fw_size);
50	51
	52	+ if (fw_size > FW_FILE_MAX_SIZE) {
	53	+ dev_err(hdev->dev,
	54	+ "FW file size %zu exceeds maximum of %u bytes\n",
	55	+ fw_size, FW_FILE_MAX_SIZE);
	56	+ rc = -EINVAL;
	57	+ goto out;
	58	+ }
	59	+
51	60	fw_data = (const u64 *) fw->data;
52	61
53	62	memcpy_toio(dst, fw_data, fw_size);

drivers/misc/habanalabs/common/habanalabs.h+5−2

@@ -1462,6 +1462,8 @@ struct hl_device_idle_busy_ts { · 1461 unmodified lines
1462	1462	* details.
1463	1463	* @in_reset: is device in reset flow.
1464	1464	* @curr_pll_profile: current PLL profile.
	1465	+ * @card_type: Various ASICs have several card types. This indicates the card
	1466	+ * type of the current device.
1465	1467	* @cs_active_cnt: number of active command submissions on this device (active
1466	1468	* means already in H/W queues)
1467	1469	* @major: habanalabs kernel driver major.
@@ -1566,6 +1568,7 @@ struct hl_device { · 98 unmodified lines
1566	1568	u64 clock_gating_mask;
1567	1569	atomic_t in_reset;
1568	1570	enum hl_pll_frequency curr_pll_profile;
	1571	+ enum armcp_card_types card_type;
1569	1572	int cs_active_cnt;
1570	1573	u32 major;
1571	1574	u32 high_pll;
@@ -1651,7 +1654,7 @@ struct hl_ioctl_desc { · 79 unmodified lines
1651	1654	*
1652	1655	* Return: true if the area is inside the valid range, false otherwise.
1653	1656	*/
1654		−static inline bool hl_mem_area_inside_range(u64 address, u32 size,
	1657	+static inline bool hl_mem_area_inside_range(u64 address, u64 size,
1655	1658	u64 range_start_address, u64 range_end_address)
1656	1659	{
1657	1660	u64 end_address = address + size;
@@ -1858,7 +1861,7 @@ int hl_get_pwm_info(struct hl_device *hdev, · 200 unmodified lines
1858	1861	void hl_set_pwm_info(struct hl_device *hdev, int sensor_index, u32 attr,
1859	1862	long value);
1860	1863	u64 hl_get_max_power(struct hl_device *hdev);
1861		−void hl_set_max_power(struct hl_device *hdev, u64 value);
	1864	+void hl_set_max_power(struct hl_device *hdev);
1862	1865	int hl_set_voltage(struct hl_device *hdev,
1863	1866	int sensor_index, u32 attr, long value);
1864	1867	int hl_set_current(struct hl_device *hdev,

drivers/misc/habanalabs/common/memory.c+7−2

@@ -66,6 +66,11 @@ static int alloc_device_memory(struct hl_ctx ctx, struct hl_mem_in args, · 65 unmodified lines
66	66	num_pgs = (args->alloc.mem_size + (page_size - 1)) >> page_shift;
67	67	total_size = num_pgs << page_shift;
68	68
	69	+ if (!total_size) {
	70	+ dev_err(hdev->dev, "Cannot allocate 0 bytes\n");
	71	+ return -EINVAL;
	72	+ }
	73	+
69	74	contiguous = args->flags & HL_MEM_CONTIGUOUS;
70	75
71	76	if (contiguous) {
@@ -93,7 +98,7 @@ static int alloc_device_memory(struct hl_ctx ctx, struct hl_mem_in args, · 21 unmodified lines
93	98	phys_pg_pack->contiguous = contiguous;
94	99
95	100	phys_pg_pack->pages = kvmalloc_array(num_pgs, sizeof(u64), GFP_KERNEL);
96		− if (!phys_pg_pack->pages) {
	101	+ if (ZERO_OR_NULL_PTR(phys_pg_pack->pages)) {
97	102	rc = -ENOMEM;
98	103	goto pages_arr_err;
99	104	}
@@ -683,7 +688,7 @@ static int init_phys_pg_pack_from_userptr(struct hl_ctx *ctx, · 583 unmodified lines
683	688
684	689	phys_pg_pack->pages = kvmalloc_array(total_npages, sizeof(u64),
685	690	GFP_KERNEL);
686		− if (!phys_pg_pack->pages) {
	691	+ if (ZERO_OR_NULL_PTR(phys_pg_pack->pages)) {
687	692	rc = -ENOMEM;
688	693	goto page_pack_arr_mem_err;
689	694	}

drivers/misc/habanalabs/common/mmu.c+1−1

@@ -450,7 +450,7 @@ int hl_mmu_init(struct hl_device *hdev) · 449 unmodified lines
450	450	hdev->mmu_shadow_hop0 = kvmalloc_array(prop->max_asid,
451	451	prop->mmu_hop_table_size,
452	452	GFP_KERNEL \| __GFP_ZERO);
453		− if (!hdev->mmu_shadow_hop0) {
	453	+ if (ZERO_OR_NULL_PTR(hdev->mmu_shadow_hop0)) {
454	454	rc = -ENOMEM;
455	455	goto err_pool_add;
456	456	}

drivers/misc/habanalabs/common/pci.c+5−3

@@ -227,7 +227,7 @@ int hl_pci_set_inbound_region(struct hl_device *hdev, u8 region, · 226 unmodified lines
227	227	}
228	228
229	229	/* Point to the specified address */
230		− rc = hl_pci_iatu_write(hdev, offset + 0x14,
	230	+ rc \|= hl_pci_iatu_write(hdev, offset + 0x14,
231	231	lower_32_bits(pci_region->addr));
232	232	rc \|= hl_pci_iatu_write(hdev, offset + 0x18,
233	233	upper_32_bits(pci_region->addr));
@@ -369,15 +369,17 @@ int hl_pci_init(struct hl_device *hdev) · 135 unmodified lines
369	369	rc = hdev->asic_funcs->init_iatu(hdev);
370	370	if (rc) {
371	371	dev_err(hdev->dev, "Failed to initialize iATU\n");
372		− goto disable_device;
	372	+ goto unmap_pci_bars;
373	373	}
374	374
375	375	rc = hl_pci_set_dma_mask(hdev);
376	376	if (rc)
377		− goto disable_device;
	377	+ goto unmap_pci_bars;
378	378
379	379	return 0;
380	380
	381	+unmap_pci_bars:
	382	+ hl_pci_bars_unmap(hdev);
381	383	disable_device:
382	384	pci_clear_master(pdev);
383	385	pci_disable_device(pdev);

drivers/misc/habanalabs/common/sysfs.c+4−3

@@ -81,7 +81,7 @@ u64 hl_get_max_power(struct hl_device *hdev) · 80 unmodified lines
81	81	return result;
82	82	}
83	83
84		−void hl_set_max_power(struct hl_device *hdev, u64 value)
	84	+void hl_set_max_power(struct hl_device *hdev)
85	85	{
86	86	struct armcp_packet pkt;
87	87	int rc;
@@ -90,7 +90,7 @@ void hl_set_max_power(struct hl_device *hdev, u64 value) · 2 unmodified lines
90	90
91	91	pkt.ctl = cpu_to_le32(ARMCP_PACKET_MAX_POWER_SET <<
92	92	ARMCP_PKT_CTL_OPCODE_SHIFT);
93		− pkt.value = cpu_to_le64(value);
	93	+ pkt.value = cpu_to_le64(hdev->max_power);
94	94
95	95	rc = hdev->asic_funcs->send_cpu_message(hdev, (u32 *) &pkt, sizeof(pkt),
96	96	0, NULL);
@@ -316,7 +316,7 @@ static ssize_t max_power_store(struct device *dev, · 219 unmodified lines
316	316	}
317	317
318	318	hdev->max_power = value;
319		− hl_set_max_power(hdev, value);
	319	+ hl_set_max_power(hdev);
320	320
321	321	out:
322	322	return count;
@@ -422,6 +422,7 @@ int hl_sysfs_init(struct hl_device *hdev) · 99 unmodified lines
422	422	hdev->pm_mng_profile = PM_AUTO;
423	423	else
424	424	hdev->pm_mng_profile = PM_MANUAL;
	425	+
425	426	hdev->max_power = hdev->asic_prop.max_power_default;
426	427
427	428	hdev->asic_funcs->add_device_attr(hdev, &hl_dev_clks_attr_group);

drivers/misc/habanalabs/gaudi/gaudi.c+67−25

@@ -154,6 +154,29 @@ static const u16 gaudi_packet_sizes[MAX_PACKET_ID] = { · 153 unmodified lines
154	154	[PACKET_LOAD_AND_EXE] = sizeof(struct packet_load_and_exe)
155	155	};
156	156
	157	+static inline bool validate_packet_id(enum packet_id id)
	158	+{
	159	+ switch (id) {
	160	+ case PACKET_WREG_32:
	161	+ case PACKET_WREG_BULK:
	162	+ case PACKET_MSG_LONG:
	163	+ case PACKET_MSG_SHORT:
	164	+ case PACKET_CP_DMA:
	165	+ case PACKET_REPEAT:
	166	+ case PACKET_MSG_PROT:
	167	+ case PACKET_FENCE:
	168	+ case PACKET_LIN_DMA:
	169	+ case PACKET_NOP:
	170	+ case PACKET_STOP:
	171	+ case PACKET_ARB_POINT:
	172	+ case PACKET_WAIT:
	173	+ case PACKET_LOAD_AND_EXE:
	174	+ return true;
	175	+ default:
	176	+ return false;
	177	+ }
	178	+}
	179	+
157	180	static const char * const
158	181	gaudi_tpc_interrupts_cause[GAUDI_NUM_OF_TPC_INTR_CAUSE] = {
159	182	"tpc_address_exceed_slm",
@@ -433,7 +456,7 @@ static int gaudi_get_fixed_properties(struct hl_device *hdev) · 273 unmodified lines
433	456	prop->num_of_events = GAUDI_EVENT_SIZE;
434	457	prop->tpc_enabled_mask = TPC_ENABLED_MASK;
435	458
436		− prop->max_power_default = MAX_POWER_DEFAULT;
	459	+ prop->max_power_default = MAX_POWER_DEFAULT_PCI;
437	460
438	461	prop->cb_pool_cb_cnt = GAUDI_CB_POOL_CB_CNT;
439	462	prop->cb_pool_cb_size = GAUDI_CB_POOL_CB_SIZE;
@@ -2485,6 +2508,7 @@ static void gaudi_set_clock_gating(struct hl_device *hdev) · 2045 unmodified lines
2485	2508	{
2486	2509	struct gaudi_device *gaudi = hdev->asic_specific;
2487	2510	u32 qman_offset;
	2511	+ bool enable;
2488	2512	int i;
2489	2513
2490	2514	/* In case we are during debug session, don't enable the clock gate
@@ -2494,46 +2518,43 @@ static void gaudi_set_clock_gating(struct hl_device *hdev) · 3 unmodified lines
2494	2518	return;
2495	2519
2496	2520	for (i = GAUDI_PCI_DMA_1, qman_offset = 0 ; i < GAUDI_HBM_DMA_1 ; i++) {
2497		− if (!(hdev->clock_gating_mask &
2498		− (BIT_ULL(gaudi_dma_assignment[i]))))
2499		− continue;
	2521	+ enable = !!(hdev->clock_gating_mask &
	2522	+ (BIT_ULL(gaudi_dma_assignment[i])));
2500	2523
2501	2524	qman_offset = gaudi_dma_assignment[i] * DMA_QMAN_OFFSET;
2502		− WREG32(mmDMA0_QM_CGM_CFG1 + qman_offset, QMAN_CGM1_PWR_GATE_EN);
	2525	+ WREG32(mmDMA0_QM_CGM_CFG1 + qman_offset,
	2526	+ enable ? QMAN_CGM1_PWR_GATE_EN : 0);
2503	2527	WREG32(mmDMA0_QM_CGM_CFG + qman_offset,
2504		− QMAN_UPPER_CP_CGM_PWR_GATE_EN);
	2528	+ enable ? QMAN_UPPER_CP_CGM_PWR_GATE_EN : 0);
2505	2529	}
2506	2530
2507	2531	for (i = GAUDI_HBM_DMA_1 ; i < GAUDI_DMA_MAX ; i++) {
2508		− if (!(hdev->clock_gating_mask &
2509		− (BIT_ULL(gaudi_dma_assignment[i]))))
2510		− continue;
	2532	+ enable = !!(hdev->clock_gating_mask &
	2533	+ (BIT_ULL(gaudi_dma_assignment[i])));
2511	2534
2512	2535	qman_offset = gaudi_dma_assignment[i] * DMA_QMAN_OFFSET;
2513		− WREG32(mmDMA0_QM_CGM_CFG1 + qman_offset, QMAN_CGM1_PWR_GATE_EN);
	2536	+ WREG32(mmDMA0_QM_CGM_CFG1 + qman_offset,
	2537	+ enable ? QMAN_CGM1_PWR_GATE_EN : 0);
2514	2538	WREG32(mmDMA0_QM_CGM_CFG + qman_offset,
2515		− QMAN_COMMON_CP_CGM_PWR_GATE_EN);
	2539	+ enable ? QMAN_COMMON_CP_CGM_PWR_GATE_EN : 0);
2516	2540	}
2517	2541
2518		− if (hdev->clock_gating_mask & (BIT_ULL(GAUDI_ENGINE_ID_MME_0))) {
2519		− WREG32(mmMME0_QM_CGM_CFG1, QMAN_CGM1_PWR_GATE_EN);
2520		− WREG32(mmMME0_QM_CGM_CFG, QMAN_COMMON_CP_CGM_PWR_GATE_EN);
2521		− }
	2542	+ enable = !!(hdev->clock_gating_mask & (BIT_ULL(GAUDI_ENGINE_ID_MME_0)));
	2543	+ WREG32(mmMME0_QM_CGM_CFG1, enable ? QMAN_CGM1_PWR_GATE_EN : 0);
	2544	+ WREG32(mmMME0_QM_CGM_CFG, enable ? QMAN_COMMON_CP_CGM_PWR_GATE_EN : 0);
2522	2545
2523		− if (hdev->clock_gating_mask & (BIT_ULL(GAUDI_ENGINE_ID_MME_2))) {
2524		− WREG32(mmMME2_QM_CGM_CFG1, QMAN_CGM1_PWR_GATE_EN);
2525		− WREG32(mmMME2_QM_CGM_CFG, QMAN_COMMON_CP_CGM_PWR_GATE_EN);
2526		− }
	2546	+ enable = !!(hdev->clock_gating_mask & (BIT_ULL(GAUDI_ENGINE_ID_MME_2)));
	2547	+ WREG32(mmMME2_QM_CGM_CFG1, enable ? QMAN_CGM1_PWR_GATE_EN : 0);
	2548	+ WREG32(mmMME2_QM_CGM_CFG, enable ? QMAN_COMMON_CP_CGM_PWR_GATE_EN : 0);
2527	2549
2528	2550	for (i = 0, qman_offset = 0 ; i < TPC_NUMBER_OF_ENGINES ; i++) {
2529		− if (!(hdev->clock_gating_mask &
2530		− (BIT_ULL(GAUDI_ENGINE_ID_TPC_0 + i))))
2531		− continue;
	2551	+ enable = !!(hdev->clock_gating_mask &
	2552	+ (BIT_ULL(GAUDI_ENGINE_ID_TPC_0 + i)));
2532	2553
2533	2554	WREG32(mmTPC0_QM_CGM_CFG1 + qman_offset,
2534		− QMAN_CGM1_PWR_GATE_EN);
	2555	+ enable ? QMAN_CGM1_PWR_GATE_EN : 0);
2535	2556	WREG32(mmTPC0_QM_CGM_CFG + qman_offset,
2536		− QMAN_COMMON_CP_CGM_PWR_GATE_EN);
	2557	+ enable ? QMAN_COMMON_CP_CGM_PWR_GATE_EN : 0);
2537	2558
2538	2559	qman_offset += TPC_QMAN_OFFSET;
2539	2560	}
@@ -3772,6 +3793,12 @@ static int gaudi_validate_cb(struct hl_device *hdev, · 1232 unmodified lines
3772	3793	PACKET_HEADER_PACKET_ID_MASK) >>
3773	3794	PACKET_HEADER_PACKET_ID_SHIFT);
3774	3795
	3796	+ if (!validate_packet_id(pkt_id)) {
	3797	+ dev_err(hdev->dev, "Invalid packet id %u\n", pkt_id);
	3798	+ rc = -EINVAL;
	3799	+ break;
	3800	+ }
	3801	+
3775	3802	pkt_size = gaudi_packet_sizes[pkt_id];
3776	3803	cb_parsed_length += pkt_size;
3777	3804	if (cb_parsed_length > parser->user_cb_size) {
@@ -3995,6 +4022,12 @@ static int gaudi_patch_cb(struct hl_device *hdev, · 217 unmodified lines
3995	4022	PACKET_HEADER_PACKET_ID_MASK) >>
3996	4023	PACKET_HEADER_PACKET_ID_SHIFT);
3997	4024
	4025	+ if (!validate_packet_id(pkt_id)) {
	4026	+ dev_err(hdev->dev, "Invalid packet id %u\n", pkt_id);
	4027	+ rc = -EINVAL;
	4028	+ break;
	4029	+ }
	4030	+
3998	4031	pkt_size = gaudi_packet_sizes[pkt_id];
3999	4032	cb_parsed_length += pkt_size;
4000	4033	if (cb_parsed_length > parser->user_cb_size) {
@@ -5215,7 +5248,7 @@ static int gaudi_extract_ecc_info(struct hl_device *hdev, · 1214 unmodified lines
5215	5248	*memory_wrapper_idx = 0xFF;
5216	5249
5217	5250	/* Iterate through memory wrappers, a single bit must be set */
5218		− for (i = 0 ; i > num_mem_regs ; i++) {
	5251	+ for (i = 0 ; i < num_mem_regs ; i++) {
5219	5252	err_addr += i * 4;
5220	5253	err_word = RREG32(err_addr);
5221	5254	if (err_word) {
@@ -6022,6 +6055,15 @@ static int gaudi_armcp_info_get(struct hl_device *hdev) · 800 unmodified lines
6022	6055	strncpy(prop->armcp_info.card_name, GAUDI_DEFAULT_CARD_NAME,
6023	6056	CARD_NAME_MAX_LEN);
6024	6057
	6058	+ hdev->card_type = le32_to_cpu(hdev->asic_prop.armcp_info.card_type);
	6059	+
	6060	+ if (hdev->card_type == armcp_card_type_pci)
	6061	+ prop->max_power_default = MAX_POWER_DEFAULT_PCI;
	6062	+ else if (hdev->card_type == armcp_card_type_pmc)
	6063	+ prop->max_power_default = MAX_POWER_DEFAULT_PMC;
	6064	+
	6065	+ hdev->max_power = prop->max_power_default;
	6066	+
6025	6067	return 0;
6026	6068	}
6027	6069

drivers/misc/habanalabs/gaudi/gaudiP.h+2−1

@@ -41,7 +41,8 @@ · 40 unmodified lines
41	41
42	42	#define GAUDI_MAX_CLK_FREQ 2200000000ull /* 2200 MHz */
43	43
44		−#define MAX_POWER_DEFAULT 200000 /* 200W */
	44	+#define MAX_POWER_DEFAULT_PCI 200000 /* 200W */
	45	+#define MAX_POWER_DEFAULT_PMC 350000 /* 350W */
45	46
46	47	#define GAUDI_CPU_TIMEOUT_USEC 15000000 /* 15s */
47	48

drivers/misc/habanalabs/gaudi/gaudi_coresight.c+7−1

@@ -527,7 +527,7 @@ static int gaudi_config_etf(struct hl_device *hdev, · 526 unmodified lines
527	527	}
528	528
529	529	static bool gaudi_etr_validate_address(struct hl_device *hdev, u64 addr,
530		− u32 size, bool *is_host)
	530	+ u64 size, bool *is_host)
531	531	{
532	532	struct asic_fixed_properties *prop = &hdev->asic_prop;
533	533	struct gaudi_device *gaudi = hdev->asic_specific;
@@ -539,6 +539,12 @@ static bool gaudi_etr_validate_address(struct hl_device *hdev, u64 addr, · 5 unmodified lines
539	539	return false;
540	540	}
541	541
	542	+ if (addr > (addr + size)) {
	543	+ dev_err(hdev->dev,
	544	+ "ETR buffer size %llu overflow\n", size);
	545	+ return false;
	546	+ }
	547	+
542	548	/* PMMU and HPMMU addresses are equal, check only one of them */
543	549	if ((gaudi->hw_cap_initialized & HW_CAP_MMU) &&
544	550	hl_mem_area_inside_range(addr, size,

drivers/misc/habanalabs/goya/goya.c+31−0

@@ -139,6 +139,25 @@ static u16 goya_packet_sizes[MAX_PACKET_ID] = { · 138 unmodified lines
139	139	[PACKET_STOP] = sizeof(struct packet_stop)
140	140	};
141	141
	142	+static inline bool validate_packet_id(enum packet_id id)
	143	+{
	144	+ switch (id) {
	145	+ case PACKET_WREG_32:
	146	+ case PACKET_WREG_BULK:
	147	+ case PACKET_MSG_LONG:
	148	+ case PACKET_MSG_SHORT:
	149	+ case PACKET_CP_DMA:
	150	+ case PACKET_MSG_PROT:
	151	+ case PACKET_FENCE:
	152	+ case PACKET_LIN_DMA:
	153	+ case PACKET_NOP:
	154	+ case PACKET_STOP:
	155	+ return true;
	156	+ default:
	157	+ return false;
	158	+ }
	159	+}
	160	+
142	161	static u64 goya_mmu_regs[GOYA_MMU_REGS_NUM] = {
143	162	mmDMA_QM_0_GLBL_NON_SECURE_PROPS,
144	163	mmDMA_QM_1_GLBL_NON_SECURE_PROPS,
@@ -3455,6 +3474,12 @@ static int goya_validate_cb(struct hl_device *hdev, · 3310 unmodified lines
3455	3474	PACKET_HEADER_PACKET_ID_MASK) >>
3456	3475	PACKET_HEADER_PACKET_ID_SHIFT);
3457	3476
	3477	+ if (!validate_packet_id(pkt_id)) {
	3478	+ dev_err(hdev->dev, "Invalid packet id %u\n", pkt_id);
	3479	+ rc = -EINVAL;
	3480	+ break;
	3481	+ }
	3482	+
3458	3483	pkt_size = goya_packet_sizes[pkt_id];
3459	3484	cb_parsed_length += pkt_size;
3460	3485	if (cb_parsed_length > parser->user_cb_size) {
@@ -3690,6 +3715,12 @@ static int goya_patch_cb(struct hl_device *hdev, · 229 unmodified lines
3690	3715	PACKET_HEADER_PACKET_ID_MASK) >>
3691	3716	PACKET_HEADER_PACKET_ID_SHIFT);
3692	3717
	3718	+ if (!validate_packet_id(pkt_id)) {
	3719	+ dev_err(hdev->dev, "Invalid packet id %u\n", pkt_id);
	3720	+ rc = -EINVAL;
	3721	+ break;
	3722	+ }
	3723	+
3693	3724	pkt_size = goya_packet_sizes[pkt_id];
3694	3725	cb_parsed_length += pkt_size;
3695	3726	if (cb_parsed_length > parser->user_cb_size) {

drivers/misc/habanalabs/goya/goya_coresight.c+7−1

@@ -362,11 +362,17 @@ static int goya_config_etf(struct hl_device *hdev, · 361 unmodified lines
362	362	}
363	363
364	364	static int goya_etr_validate_address(struct hl_device *hdev, u64 addr,
365		− u32 size)
	365	+ u64 size)
366	366	{
367	367	struct asic_fixed_properties *prop = &hdev->asic_prop;
368	368	u64 range_start, range_end;
369	369
	370	+ if (addr > (addr + size)) {
	371	+ dev_err(hdev->dev,
	372	+ "ETR buffer size %llu overflow\n", size);
	373	+ return false;
	374	+ }
	375	+
370	376	if (hdev->mmu_enable) {
371	377	range_start = prop->dmmu.start_addr;
372	378	range_end = prop->dmmu.end_addr;

drivers/misc/mei/hdcp/mei_hdcp.c+24−16

@@ -546,38 +546,46 @@ static int mei_hdcp_verify_mprime(struct device *dev, · 545 unmodified lines
546	546	struct hdcp_port_data *data,
547	547	struct hdcp2_rep_stream_ready *stream_ready)
548	548	{
549		− struct wired_cmd_repeater_auth_stream_req_in
550		− verify_mprime_in = { { 0 } };
	549	+ struct wired_cmd_repeater_auth_stream_req_in *verify_mprime_in;
551	550	struct wired_cmd_repeater_auth_stream_req_out
552	551	verify_mprime_out = { { 0 } };
553	552	struct mei_cl_device *cldev;
554	553	ssize_t byte;
	554	+ size_t cmd_size;
555	555
556	556	if (!dev \|\| !stream_ready \|\| !data)
557	557	return -EINVAL;
558	558
559	559	cldev = to_mei_cl_device(dev);
560	560
561		− verify_mprime_in.header.api_version = HDCP_API_VERSION;
562		− verify_mprime_in.header.command_id = WIRED_REPEATER_AUTH_STREAM_REQ;
563		− verify_mprime_in.header.status = ME_HDCP_STATUS_SUCCESS;
564		− verify_mprime_in.header.buffer_len =
	561	+ cmd_size = struct_size(verify_mprime_in, streams, data->k);
	562	+ if (cmd_size == SIZE_MAX)
	563	+ return -EINVAL;
	564	+
	565	+ verify_mprime_in = kzalloc(cmd_size, GFP_KERNEL);
	566	+ if (!verify_mprime_in)
	567	+ return -ENOMEM;
	568	+
	569	+ verify_mprime_in->header.api_version = HDCP_API_VERSION;
	570	+ verify_mprime_in->header.command_id = WIRED_REPEATER_AUTH_STREAM_REQ;
	571	+ verify_mprime_in->header.status = ME_HDCP_STATUS_SUCCESS;
	572	+ verify_mprime_in->header.buffer_len =
565	573	WIRED_CMD_BUF_LEN_REPEATER_AUTH_STREAM_REQ_MIN_IN;
566	574
567		− verify_mprime_in.port.integrated_port_type = data->port_type;
568		− verify_mprime_in.port.physical_port = (u8)data->fw_ddi;
569		− verify_mprime_in.port.attached_transcoder = (u8)data->fw_tc;
	575	+ verify_mprime_in->port.integrated_port_type = data->port_type;
	576	+ verify_mprime_in->port.physical_port = (u8)data->fw_ddi;
	577	+ verify_mprime_in->port.attached_transcoder = (u8)data->fw_tc;
	578	+
	579	+ memcpy(verify_mprime_in->m_prime, stream_ready->m_prime, HDCP_2_2_MPRIME_LEN);
	580	+ drm_hdcp_cpu_to_be24(verify_mprime_in->seq_num_m, data->seq_num_m);
570	581
571		− memcpy(verify_mprime_in.m_prime, stream_ready->m_prime,
572		− HDCP_2_2_MPRIME_LEN);
573		− drm_hdcp_cpu_to_be24(verify_mprime_in.seq_num_m, data->seq_num_m);
574		− memcpy(verify_mprime_in.streams, data->streams,
	582	+ memcpy(verify_mprime_in->streams, data->streams,
575	583	array_size(data->k, sizeof(*data->streams)));
576	584
577		− verify_mprime_in.k = cpu_to_be16(data->k);
	585	+ verify_mprime_in->k = cpu_to_be16(data->k);
578	586
579		− byte = mei_cldev_send(cldev, (u8 *)&verify_mprime_in,
580		− sizeof(verify_mprime_in));
	587	+ byte = mei_cldev_send(cldev, (u8 *)verify_mprime_in, cmd_size);
	588	+ kfree(verify_mprime_in);
581	589	if (byte < 0) {
582	590	dev_dbg(dev, "mei_cldev_send failed. %zd\n", byte);
583	591	return byte;

drivers/misc/mic/scif/scif_api.c+2−2

@@ -178,7 +178,7 @@ int scif_close(scif_epd_t epd) · 177 unmodified lines
178	178	case SCIFEP_ZOMBIE:
179	179	dev_err(scif_info.mdev.this_device,
180	180	"SCIFAPI close: zombie state unexpected\n");
181		− /* fall through */
	181	+ fallthrough;
182	182	case SCIFEP_DISCONNECTED:
183	183	spin_unlock(&ep->lock);
184	184	scif_unregister_all_windows(epd);
@@ -645,7 +645,7 @@ int __scif_connect(scif_epd_t epd, struct scif_port_id *dst, bool non_block) · 460 unmodified lines
645	645	ep->port.port = err;
646	646	ep->port.node = scif_info.nodeid;
647	647	ep->conn_async_state = ASYNC_CONN_IDLE;
648		− /* Fall through */
	648	+ fallthrough;
649	649	case SCIFEP_BOUND:
650	650	/*
651	651	* If a non-blocking connect has been already initiated

drivers/misc/mic/scif/scif_rma.c+1−1

@@ -657,7 +657,7 @@ int scif_unregister_window(struct scif_window *window) · 656 unmodified lines
657	657	window->unreg_state = OP_IN_PROGRESS;
658	658	send_msg = true;
659	659	}
660		− /* fall through */
	660	+ fallthrough;
661	661	case OP_IN_PROGRESS:
662	662	{
663	663	scif_get_window(window, 1);

drivers/misc/sgi-gru/grukservices.c+2−2

@@ -622,7 +622,7 @@ static int send_noop_message(void cb, struct gru_message_queue_desc mqd, · 621 unmodified lines
622	622	break;
623	623	case CBSS_PAGE_OVERFLOW:
624	624	STAT(mesq_noop_page_overflow);
625		− /* fall through */
	625	+ fallthrough;
626	626	default:
627	627	BUG();
628	628	}
@@ -780,7 +780,7 @@ static int send_message_failure(void cb, struct gru_message_queue_desc mqd, · 151 unmodified lines
780	780	break;
781	781	case CBSS_PAGE_OVERFLOW:
782	782	STAT(mesq_page_overflow);
783		− /* fall through */
	783	+ fallthrough;
784	784	default:
785	785	BUG();
786	786	}

drivers/misc/sgi-xp/xpc_main.c+2−2

@@ -1173,7 +1173,7 @@ xpc_system_die(struct notifier_block nb, unsigned long event, void _die_args) · 1172 unmodified lines
1173	1173	if (!xpc_kdebug_ignore)
1174	1174	break;
1175	1175
1176		− /* fall through */
	1176	+ fallthrough;
1177	1177	case DIE_MCA_MONARCH_ENTER:
1178	1178	case DIE_INIT_MONARCH_ENTER:
1179	1179	xpc_arch_ops.offline_heartbeat();
@@ -1184,7 +1184,7 @@ xpc_system_die(struct notifier_block nb, unsigned long event, void _die_args) · 4 unmodified lines
1184	1184	if (!xpc_kdebug_ignore)
1185	1185	break;
1186	1186
1187		− /* fall through */
	1187	+ fallthrough;
1188	1188	case DIE_MCA_MONARCH_LEAVE:
1189	1189	case DIE_INIT_MONARCH_LEAVE:
1190	1190	xpc_arch_ops.online_heartbeat();

drivers/misc/sgi-xp/xpc_partition.c+2−2

@@ -441,10 +441,10 @@ xpc_discovery(void) · 440 unmodified lines
441	441	switch (region_size) {
442	442	case 128:
443	443	max_regions *= 2;
444		− /* fall through */
	444	+ fallthrough;
445	445	case 64:
446	446	max_regions *= 2;
447		− /* fall through */
	447	+ fallthrough;
448	448	case 32:
449	449	max_regions *= 2;
450	450	region_size = 16;

drivers/misc/sgi-xp/xpc_uv.c+1−1

@@ -574,7 +574,7 @@ xpc_handle_activate_mq_msg_uv(struct xpc_partition *part, · 573 unmodified lines
574	574
575	575	xpc_wakeup_channel_mgr(part);
576	576	}
577		− /* fall through */
	577	+ fallthrough;
578	578	case XPC_ACTIVATE_MQ_MSG_MARK_ENGAGED_UV:
579	579	spin_lock_irqsave(&part_uv->flags_lock, irq_flags);
580	580	part_uv->flags \|= XPC_P_ENGAGED_UV;

drivers/mmc/core/host.c+1−1

@@ -191,7 +191,7 @@ int mmc_of_parse(struct mmc_host *host) · 190 unmodified lines
191	191	switch (bus_width) {
192	192	case 8:
193	193	host->caps \|= MMC_CAP_8_BIT_DATA;
194		− /* fall through - Hosts capable of 8-bit can also do 4 bits */
	194	+ fallthrough; /* Hosts capable of 8-bit can also do 4 bits */
195	195	case 4:
196	196	host->caps \|= MMC_CAP_4_BIT_DATA;
197	197	break;

drivers/mmc/host/atmel-mci.c+4−4

@@ -2418,7 +2418,7 @@ static void atmci_get_cap(struct atmel_mci *host) · 2417 unmodified lines
2418	2418	case 0x600:
2419	2419	case 0x500:
2420	2420	host->caps.has_odd_clk_div = 1;
2421		− /* Fall through */
	2421	+ fallthrough;
2422	2422	case 0x400:
2423	2423	case 0x300:
2424	2424	host->caps.has_dma_conf_reg = 1;
@@ -2426,16 +2426,16 @@ static void atmci_get_cap(struct atmel_mci *host) · 1 unmodified line
2426	2426	host->caps.has_cfg_reg = 1;
2427	2427	host->caps.has_cstor_reg = 1;
2428	2428	host->caps.has_highspeed = 1;
2429		− /* Fall through */
	2429	+ fallthrough;
2430	2430	case 0x200:
2431	2431	host->caps.has_rwproof = 1;
2432	2432	host->caps.need_blksz_mul_4 = 0;
2433	2433	host->caps.need_notbusy_for_read_ops = 1;
2434		− /* Fall through */
	2434	+ fallthrough;
2435	2435	case 0x100:
2436	2436	host->caps.has_bad_data_ordering = 0;
2437	2437	host->caps.need_reset_after_xfer = 0;
2438		− /* Fall through */
	2438	+ fallthrough;
2439	2439	case 0x0:
2440	2440	break;
2441	2441	default:

drivers/mmc/host/davinci_mmc.c+1−1

@@ -300,7 +300,7 @@ static void mmc_davinci_start_command(struct mmc_davinci_host *host, · 299 unmodified lines
300	300	* then it's harmless for us to allow it.
301	301	*/
302	302	cmd_reg \|= MMCCMD_BSYEXP;
303		− /* FALLTHROUGH */
	303	+ fallthrough;
304	304	case MMC_RSP_R1: /* 48 bits, CRC */
305	305	cmd_reg \|= MMCCMD_RSPFMT_R1456;
306	306	break;

drivers/mmc/host/dw_mmc-k3.c+1−1

@@ -238,7 +238,7 @@ static void dw_mci_hs_set_timing(struct dw_mci *host, int timing, · 237 unmodified lines
238	238	if (smpl_phase >= USE_DLY_MIN_SMPL &&
239	239	smpl_phase <= USE_DLY_MAX_SMPL)
240	240	use_smpl_dly = 1;
241		− /* fallthrough */
	241	+ fallthrough;
242	242	case MMC_TIMING_UHS_SDR50:
243	243	if (smpl_phase >= ENABLE_SHIFT_MIN_SMPL &&
244	244	smpl_phase <= ENABLE_SHIFT_MAX_SMPL)

drivers/mmc/host/dw_mmc.c+3−3

@@ -2030,7 +2030,7 @@ static void dw_mci_tasklet_func(unsigned long priv) · 2029 unmodified lines
2030	2030	}
2031	2031
2032	2032	prev_state = state = STATE_SENDING_DATA;
2033		− /* fall through */
	2033	+ fallthrough;
2034	2034
2035	2035	case STATE_SENDING_DATA:
2036	2036	/*
@@ -2088,7 +2088,7 @@ static void dw_mci_tasklet_func(unsigned long priv) · 51 unmodified lines
2088	2088	}
2089	2089	prev_state = state = STATE_DATA_BUSY;
2090	2090
2091		− /* fall through */
	2091	+ fallthrough;
2092	2092
2093	2093	case STATE_DATA_BUSY:
2094	2094	if (!dw_mci_clear_pending_data_complete(host)) {
@@ -2141,7 +2141,7 @@ static void dw_mci_tasklet_func(unsigned long priv) · 46 unmodified lines
2141	2141	*/
2142	2142	prev_state = state = STATE_SENDING_STOP;
2143	2143
2144		− /* fall through */
	2144	+ fallthrough;
2145	2145
2146	2146	case STATE_SENDING_STOP:
2147	2147	if (!dw_mci_clear_pending_cmd_complete(host))

drivers/mmc/host/jz4740_mmc.c+2−2

@@ -739,7 +739,7 @@ static irqreturn_t jz_mmc_irq_worker(int irq, void *devid) · 738 unmodified lines
739	739	break;
740	740
741	741	jz_mmc_prepare_data_transfer(host);
742		− /* fall through */
	742	+ fallthrough;
743	743
744	744	case JZ4740_MMC_STATE_TRANSFER_DATA:
745	745	if (host->use_dma) {
@@ -774,7 +774,7 @@ static irqreturn_t jz_mmc_irq_worker(int irq, void *devid) · 28 unmodified lines
774	774	break;
775	775	}
776	776	jz4740_mmc_write_irq_reg(host, JZ_MMC_IRQ_DATA_TRAN_DONE);
777		− /* fall through */
	777	+ fallthrough;
778	778
779	779	case JZ4740_MMC_STATE_SEND_STOP:
780	780	if (!req->stop)

drivers/mmc/host/meson-mx-sdio.c+1−1

@@ -294,7 +294,7 @@ static void meson_mx_mmc_set_ios(struct mmc_host mmc, struct mmc_ios ios) · 293 unmodified lines
294	294	switch (ios->power_mode) {
295	295	case MMC_POWER_OFF:
296	296	vdd = 0;
297		− /* fall through */
	297	+ fallthrough;
298	298	case MMC_POWER_UP:
299	299	if (!IS_ERR(mmc->supply.vmmc)) {
300	300	host->error = mmc_regulator_set_ocr(mmc,

drivers/mmc/host/mtk-sd.c+13−0

@@ -22,6 +22,7 @@ · 21 unmodified lines
22	22	#include <linux/slab.h>
23	23	#include <linux/spinlock.h>
24	24	#include <linux/interrupt.h>
	25	+#include <linux/reset.h>
25	26
26	27	#include <linux/mmc/card.h>
27	28	#include <linux/mmc/core.h>
@@ -419,6 +420,7 @@ struct msdc_host { · 391 unmodified lines
419	420	struct pinctrl_state *pins_uhs;
420	421	struct delayed_work req_timeout;
421	422	int irq; /* host interrupt */
	423	+ struct reset_control *reset;
422	424
423	425	struct clk src_clk; / msdc source clock */
424	426	struct clk h_clk; / msdc h_clk */
@@ -1592,6 +1594,12 @@ static void msdc_init_hw(struct msdc_host *host) · 1167 unmodified lines
1592	1594	u32 val;
1593	1595	u32 tune_reg = host->dev_comp->pad_tune_reg;
1594	1596
	1597	+ if (host->reset) {
	1598	+ reset_control_assert(host->reset);
	1599	+ usleep_range(10, 50);
	1600	+ reset_control_deassert(host->reset);
	1601	+ }
	1602	+
1595	1603	/* Configure to MMC/SD mode, clock free running */
1596	1604	sdr_set_bits(host->base + MSDC_CFG, MSDC_CFG_MODE \| MSDC_CFG_CKPDN);
1597	1605
@@ -2390,6 +2398,11 @@ static int msdc_drv_probe(struct platform_device *pdev) · 792 unmodified lines
2390	2398	if (IS_ERR(host->src_clk_cg))
2391	2399	host->src_clk_cg = NULL;
2392	2400
	2401	+ host->reset = devm_reset_control_get_optional_exclusive(&pdev->dev,
	2402	+ "hrst");
	2403	+ if (IS_ERR(host->reset))
	2404	+ return PTR_ERR(host->reset);
	2405	+
2393	2406	host->irq = platform_get_irq(pdev, 0);
2394	2407	if (host->irq < 0) {
2395	2408	ret = -EINVAL;

drivers/mmc/host/renesas_sdhi_core.c+1−1

@@ -685,7 +685,7 @@ static int renesas_sdhi_write16_hook(struct tmio_mmc_host *host, int addr) · 684 unmodified lines
685	685	case HOST_MODE:
686	686	if (host->pdata->flags & TMIO_MMC_HAVE_CBSY)
687	687	bit = TMIO_STAT_CMD_BUSY;
688		− /* fallthrough */
	688	+ fallthrough;
689	689	case CTL_SD_CARD_CLK_CTL:
690	690	return renesas_sdhi_wait_idle(host, bit);
691	691	}

drivers/mmc/host/sdhci-acpi.c+57−10

@@ -535,6 +535,11 @@ static const struct sdhci_acpi_slot sdhci_acpi_slot_qcom_sd = { · 534 unmodified lines
535	535	.caps = MMC_CAP_NONREMOVABLE,
536	536	};
537	537
	538	+struct amd_sdhci_host {
	539	+ bool tuned_clock;
	540	+ bool dll_enabled;
	541	+};
	542	+
538	543	/* AMD sdhci reset dll register. */
539	544	#define SDHCI_AMD_RESET_DLL_REGISTER 0x908
540	545
@@ -555,26 +560,66 @@ static void sdhci_acpi_amd_hs400_dll(struct sdhci_host *host) · 14 unmodified lines
555	560	}
556	561
557	562	/*
558		− * For AMD Platform it is required to disable the tuning
559		− * bit first controller to bring to HS Mode from HS200
560		− * mode, later enable to tune to HS400 mode.
	563	+ * The initialization sequence for HS400 is:
	564	+ * HS->HS200->Perform Tuning->HS->HS400
	565	+ *
	566	+ * The re-tuning sequence is:
	567	+ * HS400->DDR52->HS->HS200->Perform Tuning->HS->HS400
	568	+ *
	569	+ * The AMD eMMC Controller can only use the tuned clock while in HS200 and HS400
	570	+ * mode. If we switch to a different mode, we need to disable the tuned clock.
	571	+ * If we have previously performed tuning and switch back to HS200 or
	572	+ * HS400, we can re-enable the tuned clock.
	573	+ *
561	574	*/
562	575	static void amd_set_ios(struct mmc_host mmc, struct mmc_ios ios)
563	576	{
564	577	struct sdhci_host *host = mmc_priv(mmc);
	578	+ struct sdhci_acpi_host *acpi_host = sdhci_priv(host);
	579	+ struct amd_sdhci_host *amd_host = sdhci_acpi_priv(acpi_host);
565	580	unsigned int old_timing = host->timing;
	581	+ u16 val;
566	582
567	583	sdhci_set_ios(mmc, ios);
568		− if (old_timing == MMC_TIMING_MMC_HS200 &&
569		− ios->timing == MMC_TIMING_MMC_HS)
570		− sdhci_writew(host, 0x9, SDHCI_HOST_CONTROL2);
571		− if (old_timing != MMC_TIMING_MMC_HS400 &&
572		− ios->timing == MMC_TIMING_MMC_HS400) {
573		− sdhci_writew(host, 0x80, SDHCI_HOST_CONTROL2);
574		− sdhci_acpi_amd_hs400_dll(host);
	584	+
	585	+ if (old_timing != host->timing && amd_host->tuned_clock) {
	586	+ if (host->timing == MMC_TIMING_MMC_HS400 \|\|
	587	+ host->timing == MMC_TIMING_MMC_HS200) {
	588	+ val = sdhci_readw(host, SDHCI_HOST_CONTROL2);
	589	+ val \|= SDHCI_CTRL_TUNED_CLK;
	590	+ sdhci_writew(host, val, SDHCI_HOST_CONTROL2);
	591	+ } else {
	592	+ val = sdhci_readw(host, SDHCI_HOST_CONTROL2);
	593	+ val &= ~SDHCI_CTRL_TUNED_CLK;
	594	+ sdhci_writew(host, val, SDHCI_HOST_CONTROL2);
	595	+ }
	596	+
	597	+ /* DLL is only required for HS400 */
	598	+ if (host->timing == MMC_TIMING_MMC_HS400 &&
	599	+ !amd_host->dll_enabled) {
	600	+ sdhci_acpi_amd_hs400_dll(host);
	601	+ amd_host->dll_enabled = true;
	602	+ }
575	603	}
576	604	}
577	605
	606	+static int amd_sdhci_execute_tuning(struct mmc_host *mmc, u32 opcode)
	607	+{
	608	+ int err;
	609	+ struct sdhci_host *host = mmc_priv(mmc);
	610	+ struct sdhci_acpi_host *acpi_host = sdhci_priv(host);
	611	+ struct amd_sdhci_host *amd_host = sdhci_acpi_priv(acpi_host);
	612	+
	613	+ amd_host->tuned_clock = false;
	614	+
	615	+ err = sdhci_execute_tuning(mmc, opcode);
	616	+
	617	+ if (!err && !host->tuning_err)
	618	+ amd_host->tuned_clock = true;
	619	+
	620	+ return err;
	621	+}
	622	+
578	623	static const struct sdhci_ops sdhci_acpi_ops_amd = {
579	624	.set_clock = sdhci_set_clock,
580	625	.set_bus_width = sdhci_set_bus_width,
@@ -602,6 +647,7 @@ static int sdhci_acpi_emmc_amd_probe_slot(struct platform_device *pdev, · 21 unmodified lines
602	647
603	648	host->mmc_host_ops.select_drive_strength = amd_select_drive_strength;
604	649	host->mmc_host_ops.set_ios = amd_set_ios;
	650	+ host->mmc_host_ops.execute_tuning = amd_sdhci_execute_tuning;
605	651	return 0;
606	652	}
607	653
@@ -613,6 +659,7 @@ static const struct sdhci_acpi_slot sdhci_acpi_slot_amd_emmc = { · 5 unmodified lines
613	659	SDHCI_QUIRK_32BIT_ADMA_SIZE,
614	660	.quirks2 = SDHCI_QUIRK2_BROKEN_64_BIT_DMA,
615	661	.probe_slot = sdhci_acpi_emmc_amd_probe_slot,
	662	+ .priv_size = sizeof(struct amd_sdhci_host),
616	663	};
617	664
618	665	struct sdhci_acpi_uid_slot {

drivers/mmc/host/sdhci-esdhc-imx.c+1−1

@@ -1556,7 +1556,7 @@ static int sdhci_esdhc_imx_probe_nondt(struct platform_device *pdev, · 1555 unmodified lines
1556	1556	"failed to request card-detect gpio!\n");
1557	1557	return err;
1558	1558	}
1559		− /* fall through */
	1559	+ fallthrough;
1560	1560
1561	1561	case ESDHC_CD_CONTROLLER:
1562	1562	/* we have a working card_detect back */

drivers/mmc/host/sdhci-pci-core.c+9−1

@@ -232,6 +232,14 @@ static void sdhci_pci_dumpregs(struct mmc_host *mmc) · 231 unmodified lines
232	232	sdhci_dumpregs(mmc_priv(mmc));
233	233	}
234	234
	235	+static void sdhci_cqhci_reset(struct sdhci_host *host, u8 mask)
	236	+{
	237	+ if ((host->mmc->caps2 & MMC_CAP2_CQE) && (mask & SDHCI_RESET_ALL) &&
	238	+ host->mmc->cqe_private)
	239	+ cqhci_deactivate(host->mmc);
	240	+ sdhci_reset(host, mask);
	241	+}
	242	+
235	243	/*****************************************************************************\
236	244	* *
237	245	* Hardware specific quirk handling *
@@ -718,7 +726,7 @@ static const struct sdhci_ops sdhci_intel_glk_ops = { · 480 unmodified lines
718	726	.set_power = sdhci_intel_set_power,
719	727	.enable_dma = sdhci_pci_enable_dma,
720	728	.set_bus_width = sdhci_set_bus_width,
721		− .reset = sdhci_reset,
	729	+ .reset = sdhci_cqhci_reset,
722	730	.set_uhs_signaling = sdhci_set_uhs_signaling,
723	731	.hw_reset = sdhci_pci_hw_reset,
724	732	.irq = sdhci_cqhci_irq,

drivers/mmc/host/sdhci-s3c.c+1−1

@@ -609,7 +609,7 @@ static int sdhci_s3c_probe(struct platform_device *pdev) · 608 unmodified lines
609	609	switch (pdata->max_width) {
610	610	case 8:
611	611	host->mmc->caps \|= MMC_CAP_8_BIT_DATA;
612		− /* Fall through */
	612	+ fallthrough;
613	613	case 4:
614	614	host->mmc->caps \|= MMC_CAP_4_BIT_DATA;
615	615	break;

drivers/mmc/host/sdhci-sprd.c+1−1

@@ -470,7 +470,7 @@ static int sdhci_sprd_voltage_switch(struct mmc_host mmc, struct mmc_ios ios) · 469 unmodified lines
470	470	break;
471	471
472	472	default:
473		− /* fall-through */
	473	+ fallthrough;
474	474	case MMC_SIGNAL_VOLTAGE_330:
475	475	ret = pinctrl_select_state(sprd_host->pinctrl,
476	476	sprd_host->pins_default);

drivers/mmc/host/sdhci-tegra.c+51−4

@@ -110,6 +110,12 @@ · 109 unmodified lines
110	110	#define NVQUIRK_DIS_CARD_CLK_CONFIG_TAP BIT(8)
111	111	#define NVQUIRK_CQHCI_DCMD_R1B_CMD_TIMING BIT(9)
112	112
	113	+/*
	114	+ * NVQUIRK_HAS_TMCLK is for SoC's having separate timeout clock for Tegra
	115	+ * SDMMC hardware data timeout.
	116	+ */
	117	+#define NVQUIRK_HAS_TMCLK BIT(10)
	118	+
113	119	/* SDMMC CQE Base Address for Tegra Host Ver 4.1 and Higher */
114	120	#define SDHCI_TEGRA_CQE_BASE_ADDR 0xF000
115	121
@@ -140,6 +146,7 @@ struct sdhci_tegra_autocal_offsets { · 24 unmodified lines
140	146	struct sdhci_tegra {
141	147	const struct sdhci_tegra_soc_data *soc_data;
142	148	struct gpio_desc *power_gpio;
	149	+ struct clk *tmclk;
143	150	bool ddr_signaling;
144	151	bool pad_calib_required;
145	152	bool pad_control_available;
@@ -1418,7 +1425,6 @@ static const struct sdhci_ops tegra210_sdhci_ops = { · 1272 unmodified lines
1418	1425
1419	1426	static const struct sdhci_pltfm_data sdhci_tegra210_pdata = {
1420	1427	.quirks = SDHCI_QUIRK_BROKEN_TIMEOUT_VAL \|
1421		− SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK \|
1422	1428	SDHCI_QUIRK_SINGLE_POWER_WRITE \|
1423	1429	SDHCI_QUIRK_NO_HISPD_BIT \|
1424	1430	SDHCI_QUIRK_BROKEN_ADMA_ZEROLEN_DESC \|
@@ -1434,7 +1440,8 @@ static const struct sdhci_tegra_soc_data soc_data_tegra210 = { · 9 unmodified lines
1434	1440	NVQUIRK_HAS_PADCALIB \|
1435	1441	NVQUIRK_DIS_CARD_CLK_CONFIG_TAP \|
1436	1442	NVQUIRK_ENABLE_SDR50 \|
1437		− NVQUIRK_ENABLE_SDR104,
	1443	+ NVQUIRK_ENABLE_SDR104 \|
	1444	+ NVQUIRK_HAS_TMCLK,
1438	1445	.min_tap_delay = 106,
1439	1446	.max_tap_delay = 185,
1440	1447	};
@@ -1456,7 +1463,6 @@ static const struct sdhci_ops tegra186_sdhci_ops = { · 15 unmodified lines
1456	1463
1457	1464	static const struct sdhci_pltfm_data sdhci_tegra186_pdata = {
1458	1465	.quirks = SDHCI_QUIRK_BROKEN_TIMEOUT_VAL \|
1459		− SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK \|
1460	1466	SDHCI_QUIRK_SINGLE_POWER_WRITE \|
1461	1467	SDHCI_QUIRK_NO_HISPD_BIT \|
1462	1468	SDHCI_QUIRK_BROKEN_ADMA_ZEROLEN_DESC \|
@@ -1473,6 +1479,7 @@ static const struct sdhci_tegra_soc_data soc_data_tegra186 = { · 10 unmodified lines
1473	1479	NVQUIRK_DIS_CARD_CLK_CONFIG_TAP \|
1474	1480	NVQUIRK_ENABLE_SDR50 \|
1475	1481	NVQUIRK_ENABLE_SDR104 \|
	1482	+ NVQUIRK_HAS_TMCLK \|
1476	1483	NVQUIRK_CQHCI_DCMD_R1B_CMD_TIMING,
1477	1484	.min_tap_delay = 84,
1478	1485	.max_tap_delay = 136,
@@ -1485,7 +1492,8 @@ static const struct sdhci_tegra_soc_data soc_data_tegra194 = { · 6 unmodified lines
1485	1492	NVQUIRK_HAS_PADCALIB \|
1486	1493	NVQUIRK_DIS_CARD_CLK_CONFIG_TAP \|
1487	1494	NVQUIRK_ENABLE_SDR50 \|
1488		− NVQUIRK_ENABLE_SDR104,
	1495	+ NVQUIRK_ENABLE_SDR104 \|
	1496	+ NVQUIRK_HAS_TMCLK,
1489	1497	.min_tap_delay = 96,
1490	1498	.max_tap_delay = 139,
1491	1499	};
@@ -1613,6 +1621,43 @@ static int sdhci_tegra_probe(struct platform_device *pdev) · 121 unmodified lines
1613	1621	goto err_power_req;
1614	1622	}
1615	1623
	1624	+ /*
	1625	+ * Tegra210 has a separate SDMMC_LEGACY_TM clock used for host
	1626	+ * timeout clock and SW can choose TMCLK or SDCLK for hardware
	1627	+ * data timeout through the bit USE_TMCLK_FOR_DATA_TIMEOUT of
	1628	+ * the register SDHCI_TEGRA_VENDOR_SYS_SW_CTRL.
	1629	+ *
	1630	+ * USE_TMCLK_FOR_DATA_TIMEOUT bit default is set to 1 and SDMMC uses
	1631	+ * 12Mhz TMCLK which is advertised in host capability register.
	1632	+ * With TMCLK of 12Mhz provides maximum data timeout period that can
	1633	+ * be achieved is 11s better than using SDCLK for data timeout.
	1634	+ *
	1635	+ * So, TMCLK is set to 12Mhz and kept enabled all the time on SoC's
	1636	+ * supporting separate TMCLK.
	1637	+ */
	1638	+
	1639	+ if (soc_data->nvquirks & NVQUIRK_HAS_TMCLK) {
	1640	+ clk = devm_clk_get(&pdev->dev, "tmclk");
	1641	+ if (IS_ERR(clk)) {
	1642	+ rc = PTR_ERR(clk);
	1643	+ if (rc == -EPROBE_DEFER)
	1644	+ goto err_power_req;
	1645	+
	1646	+ dev_warn(&pdev->dev, "failed to get tmclk: %d\n", rc);
	1647	+ clk = NULL;
	1648	+ }
	1649	+
	1650	+ clk_set_rate(clk, 12000000);
	1651	+ rc = clk_prepare_enable(clk);
	1652	+ if (rc) {
	1653	+ dev_err(&pdev->dev,
	1654	+ "failed to enable tmclk: %d\n", rc);
	1655	+ goto err_power_req;
	1656	+ }
	1657	+
	1658	+ tegra_host->tmclk = clk;
	1659	+ }
	1660	+
1616	1661	clk = devm_clk_get(mmc_dev(host->mmc), NULL);
1617	1662	if (IS_ERR(clk)) {
1618	1663	rc = PTR_ERR(clk);
@@ -1656,6 +1701,7 @@ err_add_host: · 37 unmodified lines
1656	1701	err_rst_get:
1657	1702	clk_disable_unprepare(pltfm_host->clk);
1658	1703	err_clk_get:
	1704	+ clk_disable_unprepare(tegra_host->tmclk);
1659	1705	err_power_req:
1660	1706	err_parse_dt:
1661	1707	sdhci_pltfm_free(pdev);
@@ -1673,6 +1719,7 @@ static int sdhci_tegra_remove(struct platform_device *pdev) · 11 unmodified lines
1673	1719	reset_control_assert(tegra_host->rst);
1674	1720	usleep_range(2000, 4000);
1675	1721	clk_disable_unprepare(pltfm_host->clk);
	1722	+ clk_disable_unprepare(tegra_host->tmclk);
1676	1723
1677	1724	sdhci_pltfm_free(pdev);
1678	1725

drivers/mmc/host/sdhci-xenon-phy.c+1−1

@@ -527,7 +527,7 @@ static bool xenon_emmc_phy_slow_mode(struct sdhci_host *host, · 526 unmodified lines
527	527	ret = true;
528	528	break;
529	529	}
530		− /* fall through */
	530	+ fallthrough;
531	531	default:
532	532	reg &= ~XENON_TIMING_ADJUST_SLOW_MODE;
533	533	ret = false;

drivers/mmc/host/sdhci.c+1−1

@@ -2825,7 +2825,7 @@ int sdhci_execute_tuning(struct mmc_host *mmc, u32 opcode) · 2824 unmodified lines
2825	2825	case MMC_TIMING_UHS_SDR50:
2826	2826	if (host->flags & SDHCI_SDR50_NEEDS_TUNING)
2827	2827	break;
2828		− /* FALLTHROUGH */
	2828	+ fallthrough;
2829	2829
2830	2830	default:
2831	2831	goto out;

drivers/mmc/host/tifm_sd.c+1−1

@@ -335,7 +335,7 @@ static unsigned int tifm_sd_op_flags(struct mmc_command *cmd) · 334 unmodified lines
335	335	break;
336	336	case MMC_RSP_R1B:
337	337	rc \|= TIFM_MMCSD_RSP_BUSY;
338		− /* fall-through */
	338	+ fallthrough;
339	339	case MMC_RSP_R1:
340	340	rc \|= TIFM_MMCSD_RSP_R1;
341	341	break;

drivers/mmc/host/usdhi6rol0.c+3−3

@@ -1343,7 +1343,7 @@ static int usdhi6_stop_cmd(struct usdhi6_host *host) · 1342 unmodified lines
1343	1343	host->wait = USDHI6_WAIT_FOR_STOP;
1344	1344	return 0;
1345	1345	}
1346		− /* fall through - Unsupported STOP command. */
	1346	+ fallthrough; /* Unsupported STOP command */
1347	1347	default:
1348	1348	dev_err(mmc_dev(host->mmc),
1349	1349	"unsupported stop CMD%d for CMD%d\n",
@@ -1691,7 +1691,7 @@ static void usdhi6_timeout_work(struct work_struct *work) · 341 unmodified lines
1691	1691	switch (host->wait) {
1692	1692	default:
1693	1693	dev_err(mmc_dev(host->mmc), "Invalid state %u\n", host->wait);
1694		− /* fall through - mrq can be NULL, but is impossible. */
	1694	+ fallthrough; /* mrq can be NULL, but is impossible */
1695	1695	case USDHI6_WAIT_FOR_CMD:
1696	1696	usdhi6_error_code(host);
1697	1697	if (mrq)
@@ -1713,7 +1713,7 @@ static void usdhi6_timeout_work(struct work_struct *work) · 15 unmodified lines
1713	1713	host->offset, data->blocks, data->blksz, data->sg_len,
1714	1714	sg_dma_len(sg), sg->offset);
1715	1715	usdhi6_sg_unmap(host, true);
1716		− /* fall through - page unmapped in USDHI6_WAIT_FOR_DATA_END. */
	1716	+ fallthrough; /* page unmapped in USDHI6_WAIT_FOR_DATA_END */
1717	1717	case USDHI6_WAIT_FOR_DATA_END:
1718	1718	usdhi6_error_code(host);
1719	1719	data->error = -ETIMEDOUT;

drivers/mux/adgs1408.c+1−1

@@ -93,7 +93,7 @@ static int adgs1408_probe(struct spi_device *spi) · 92 unmodified lines
93	93	mux->idle_state = idle_state;
94	94	break;
95	95	}
96		− /* fall through */
	96	+ fallthrough;
97	97	default:
98	98	dev_err(dev, "invalid idle-state %d\n", idle_state);
99	99	return -EINVAL;

drivers/net/appletalk/cops.c+1−1

@@ -301,7 +301,7 @@ static int __init cops_probe1(struct net_device *dev, int ioaddr) · 300 unmodified lines
301	301	dev->irq = cops_irq(ioaddr, board);
302	302	if (dev->irq)
303	303	break;
304		− /* fall through - Once no IRQ found on this port. */
	304	+ fallthrough; /* Once no IRQ found on this port */
305	305	case 1:
306	306	retval = -EINVAL;
307	307	goto err_out;

drivers/net/arcnet/arc-rimi.c+3−3

@@ -363,13 +363,13 @@ static int __init arcrimi_setup(char *s) · 362 unmodified lines
363	363	switch (ints[0]) {
364	364	default: /* ERROR */
365	365	pr_err("Too many arguments\n");
366		− /* Fall through */
	366	+ fallthrough;
367	367	case 3: /* Node ID */
368	368	node = ints[3];
369		− /* Fall through */
	369	+ fallthrough;
370	370	case 2: /* IRQ */
371	371	irq = ints[2];
372		− /* Fall through */
	372	+ fallthrough;
373	373	case 1: /* IO address */
374	374	io = ints[1];
375	375	}

drivers/net/arcnet/com20020-isa.c+6−6

@@ -197,22 +197,22 @@ static int __init com20020isa_setup(char *s) · 196 unmodified lines
197	197	switch (ints[0]) {
198	198	default: /* ERROR */
199	199	pr_info("Too many arguments\n");
200		− /* Fall through */
	200	+ fallthrough;
201	201	case 6: /* Timeout */
202	202	timeout = ints[6];
203		− /* Fall through */
	203	+ fallthrough;
204	204	case 5: /* CKP value */
205	205	clockp = ints[5];
206		− /* Fall through */
	206	+ fallthrough;
207	207	case 4: /* Backplane flag */
208	208	backplane = ints[4];
209		− /* Fall through */
	209	+ fallthrough;
210	210	case 3: /* Node ID */
211	211	node = ints[3];
212		− /* Fall through */
	212	+ fallthrough;
213	213	case 2: /* IRQ */
214	214	irq = ints[2];
215		− /* Fall through */
	215	+ fallthrough;
216	216	case 1: /* IO address */
217	217	io = ints[1];
218	218	}

drivers/net/arcnet/com90io.c+2−2

@@ -363,10 +363,10 @@ static int __init com90io_setup(char *s) · 362 unmodified lines
363	363	switch (ints[0]) {
364	364	default: /* ERROR */
365	365	pr_err("Too many arguments\n");
366		− /* Fall through */
	366	+ fallthrough;
367	367	case 2: /* IRQ */
368	368	irq = ints[2];
369		− /* Fall through */
	369	+ fallthrough;
370	370	case 1: /* IO address */
371	371	io = ints[1];
372	372	}

drivers/net/arcnet/com90xx.c+3−3

@@ -693,13 +693,13 @@ static int __init com90xx_setup(char *s) · 692 unmodified lines
693	693	switch (ints[0]) {
694	694	default: /* ERROR */
695	695	pr_err("Too many arguments\n");
696		− /* Fall through */
	696	+ fallthrough;
697	697	case 3: /* Mem address */
698	698	shmem = ints[3];
699		− /* Fall through */
	699	+ fallthrough;
700	700	case 2: /* IRQ */
701	701	irq = ints[2];
702		− /* Fall through */
	702	+ fallthrough;
703	703	case 1: /* IO address */
704	704	io = ints[1];
705	705	}

drivers/net/bonding/bond_3ad.c+2−2

@@ -1149,7 +1149,7 @@ static void ad_rx_machine(struct lacpdu lacpdu, struct port port) · 1148 unmodified lines
1149	1149	port->actor_oper_port_state &= ~LACP_STATE_EXPIRED;
1150	1150	port->sm_rx_state = AD_RX_PORT_DISABLED;
1151	1151
1152		− /* Fall Through */
	1152	+ fallthrough;
1153	1153	case AD_RX_PORT_DISABLED:
1154	1154	port->sm_vars &= ~AD_PORT_MATCHED;
1155	1155	break;
@@ -1588,7 +1588,7 @@ static struct aggregator ad_agg_selection_test(struct aggregator best, · 432 unmodified lines
1588	1588	if (__agg_active_ports(curr) < __agg_active_ports(best))
1589	1589	return best;
1590	1590
1591		− /FALLTHROUGH/
	1591	+ fallthrough;
1592	1592	case BOND_AD_STABLE:
1593	1593	case BOND_AD_BANDWIDTH:
1594	1594	if (__get_agg_bandwidth(curr) > __get_agg_bandwidth(best))

drivers/net/bonding/bond_main.c+4−4

@@ -2274,7 +2274,7 @@ static int bond_miimon_inspect(struct bonding *bond) · 2273 unmodified lines
2274	2274	"active " : "backup ") : "",
2275	2275	bond->params.downdelay * bond->params.miimon);
2276	2276	}
2277		− /FALLTHRU/
	2277	+ fallthrough;
2278	2278	case BOND_LINK_FAIL:
2279	2279	if (link_state) {
2280	2280	/* recovered before downdelay expired */
@@ -2310,7 +2310,7 @@ static int bond_miimon_inspect(struct bonding *bond) · 29 unmodified lines
2310	2310	bond->params.updelay *
2311	2311	bond->params.miimon);
2312	2312	}
2313		− /FALLTHRU/
	2313	+ fallthrough;
2314	2314	case BOND_LINK_BACK:
2315	2315	if (!link_state) {
2316	2316	bond_propose_link_state(slave, BOND_LINK_DOWN);
@@ -3322,7 +3322,7 @@ static int bond_slave_netdev_event(unsigned long event, · 1005 unmodified lines
3322	3322
3323	3323	if (BOND_MODE(bond) == BOND_MODE_8023AD)
3324	3324	bond_3ad_adapter_speed_duplex_changed(slave);
3325		− /* Fallthrough */
	3325	+ fallthrough;
3326	3326	case NETDEV_DOWN:
3327	3327	/* Refresh slave-array if applicable!
3328	3328	* If the setup does not use miimon or arpmon (mode-specific!),
@@ -3760,7 +3760,7 @@ static int bond_do_ioctl(struct net_device bond_dev, struct ifreq ifr, int cmd · 431 unmodified lines
3760	3760	return -EINVAL;
3761	3761
3762	3762	mii->phy_id = 0;
3763		− /* Fall Through */
	3763	+ fallthrough;
3764	3764	case SIOCGMIIREG:
3765	3765	/* We do this again just in case we were called by SIOCGMIIREG
3766	3766	* instead of SIOCGMIIPHY.

drivers/net/can/at91_can.c+2−2

@@ -898,7 +898,7 @@ static void at91_irq_err_state(struct net_device *dev, · 897 unmodified lines
898	898	CAN_ERR_CRTL_TX_WARNING :
899	899	CAN_ERR_CRTL_RX_WARNING;
900	900	}
901		− /* fall through */
	901	+ fallthrough;
902	902	case CAN_STATE_ERROR_WARNING:
903	903	/*
904	904	* from: ERROR_ACTIVE, ERROR_WARNING
@@ -948,7 +948,7 @@ static void at91_irq_err_state(struct net_device *dev, · 43 unmodified lines
948	948	netdev_dbg(dev, "Error Active\n");
949	949	cf->can_id \|= CAN_ERR_PROT;
950	950	cf->data[2] = CAN_ERR_PROT_ACTIVE;
951		− /* fall through */
	951	+ fallthrough;
952	952	case CAN_STATE_ERROR_WARNING:
953	953	reg_idr = AT91_IRQ_ERRA \| AT91_IRQ_WARN \| AT91_IRQ_BOFF;
954	954	reg_ier = AT91_IRQ_ERRP;

drivers/net/can/peak_canfd/peak_pciefd_main.c+1−1

@@ -659,7 +659,7 @@ static int pciefd_can_probe(struct pciefd_board *pciefd) · 658 unmodified lines
659	659	pciefd_can_writereg(priv, CANFD_CLK_SEL_80MHZ,
660	660	PCIEFD_REG_CAN_CLK_SEL);
661	661
662		− /* fall through */
	662	+ fallthrough;
663	663	case CANFD_CLK_SEL_80MHZ:
664	664	priv->ucan.can.clock.freq = 80 * 1000 * 1000;
665	665	break;

drivers/net/can/sja1000/sja1000_platform.c+1−1

@@ -150,7 +150,7 @@ static void sp_populate_of(struct sja1000_priv priv, struct device_node of) · 149 unmodified lines
150	150	priv->read_reg = sp_read_reg16;
151	151	priv->write_reg = sp_write_reg16;
152	152	break;
153		− case 1: /* fallthrough */
	153	+ case 1:
154	154	default:
155	155	priv->read_reg = sp_read_reg8;
156	156	priv->write_reg = sp_write_reg8;

drivers/net/can/slcan.c+2−2

@@ -153,7 +153,7 @@ static void slc_bump(struct slcan *sl) · 152 unmodified lines
153	153	switch (*cmd) {
154	154	case 'r':
155	155	cf.can_id = CAN_RTR_FLAG;
156		− /* fallthrough */
	156	+ fallthrough;
157	157	case 't':
158	158	/* store dlc ASCII value and terminate SFF CAN ID string */
159	159	cf.can_dlc = sl->rbuff[SLC_CMD_LEN + SLC_SFF_ID_LEN];
@@ -163,7 +163,7 @@ static void slc_bump(struct slcan *sl) · 3 unmodified lines
163	163	break;
164	164	case 'R':
165	165	cf.can_id = CAN_RTR_FLAG;
166		− /* fallthrough */
	166	+ fallthrough;
167	167	case 'T':
168	168	cf.can_id \|= CAN_EFF_FLAG;
169	169	/* store dlc ASCII value and terminate EFF CAN ID string */

drivers/net/can/spi/mcp251x.c+1−1

@@ -864,7 +864,7 @@ static irqreturn_t mcp251x_can_ist(int irq, void *dev_id) · 863 unmodified lines
864	864	if (new_state >= CAN_STATE_ERROR_WARNING &&
865	865	new_state <= CAN_STATE_BUS_OFF)
866	866	priv->can.can_stats.error_warning++;
867		− /* fall through */
	867	+ fallthrough;
868	868	case CAN_STATE_ERROR_WARNING:
869	869	if (new_state >= CAN_STATE_ERROR_PASSIVE &&
870	870	new_state <= CAN_STATE_BUS_OFF)

drivers/net/can/usb/peak_usb/pcan_usb.c+1−1

@@ -415,7 +415,7 @@ static int pcan_usb_decode_error(struct pcan_usb_msg_context *mc, u8 n, · 414 unmodified lines
415	415	new_state = CAN_STATE_ERROR_WARNING;
416	416	break;
417	417	}
418		− /* fall through */
	418	+ fallthrough;
419	419
420	420	case CAN_STATE_ERROR_WARNING:
421	421	if (n & PCAN_USB_ERROR_BUS_HEAVY) {

drivers/net/can/usb/peak_usb/pcan_usb_core.c+1−1

@@ -345,7 +345,7 @@ static netdev_tx_t peak_usb_ndo_start_xmit(struct sk_buff *skb, · 344 unmodified lines
345	345	default:
346	346	netdev_warn(netdev, "tx urb submitting failed err=%d\n",
347	347	err);
348		− /* fall through */
	348	+ fallthrough;
349	349	case -ENOENT:
350	350	/* cable unplugged */
351	351	stats->tx_dropped++;

drivers/net/can/usb/peak_usb/pcan_usb_pro.c+2−2

@@ -133,10 +133,10 @@ static int pcan_msg_add_rec(struct pcan_usb_pro_msg *pm, int id, ...) · 132 unmodified lines
133	133	switch (id) {
134	134	case PCAN_USBPRO_TXMSG8:
135	135	i += 4;
136		− /* fall through */
	136	+ fallthrough;
137	137	case PCAN_USBPRO_TXMSG4:
138	138	i += 4;
139		− /* fall through */
	139	+ fallthrough;
140	140	case PCAN_USBPRO_TXMSG0:
141	141	*pc++ = va_arg(ap, int);
142	142	*pc++ = va_arg(ap, int);

drivers/net/dsa/b53/b53_common.c+1−1

@@ -1061,7 +1061,7 @@ static void b53_force_port_config(struct b53_device *dev, int port, · 1060 unmodified lines
1061	1061	switch (speed) {
1062	1062	case 2000:
1063	1063	reg \|= PORT_OVERRIDE_SPEED_2000M;
1064		− /* fallthrough */
	1064	+ fallthrough;
1065	1065	case SPEED_1000:
1066	1066	reg \|= PORT_OVERRIDE_SPEED_1000M;
1067	1067	break;

drivers/net/dsa/b53/b53_serdes.c+1−1

@@ -170,7 +170,7 @@ void b53_serdes_phylink_validate(struct b53_device *dev, int port, · 169 unmodified lines
170	170	switch (lane) {
171	171	case 0:
172	172	phylink_set(supported, 2500baseX_Full);
173		− /* fallthrough */
	173	+ fallthrough;
174	174	case 1:
175	175	phylink_set(supported, 1000baseX_Full);
176	176	break;

drivers/net/dsa/bcm_sf2.c+1−1

@@ -566,7 +566,7 @@ static void bcm_sf2_sw_mac_config(struct dsa_switch *ds, int port, · 565 unmodified lines
566	566	switch (state->interface) {
567	567	case PHY_INTERFACE_MODE_RGMII:
568	568	id_mode_dis = 1;
569		− /* fallthrough */
	569	+ fallthrough;
570	570	case PHY_INTERFACE_MODE_RGMII_TXID:
571	571	port_mode = EXT_GPHY;
572	572	break;

drivers/net/dsa/microchip/ksz9477.c+1−1

@@ -1083,7 +1083,7 @@ static phy_interface_t ksz9477_get_interface(struct ksz_device *dev, int port) · 1082 unmodified lines
1083	1083	interface = PHY_INTERFACE_MODE_GMII;
1084	1084	if (gbit)
1085	1085	break;
1086		− /* fall through */
	1086	+ fallthrough;
1087	1087	case 0:
1088	1088	interface = PHY_INTERFACE_MODE_MII;
1089	1089	break;

drivers/net/dsa/mt7530.c+6−3

@@ -566,7 +566,7 @@ static void mt7530_setup_port5(struct dsa_switch *ds, phy_interface_t interface) · 565 unmodified lines
566	566	case P5_INTF_SEL_PHY_P0:
567	567	/* MT7530_P5_MODE_GPHY_P0: 2nd GMAC -> P5 -> P0 */
568	568	val \|= MHWTRAP_PHY0_SEL;
569		− /* fall through */
	569	+ fallthrough;
570	570	case P5_INTF_SEL_PHY_P4:
571	571	/* MT7530_P5_MODE_GPHY_P4: 2nd GMAC -> P5 -> P4 */
572	572	val &= ~MHWTRAP_P5_MAC_SEL & ~MHWTRAP_P5_DIS;
@@ -1326,14 +1326,17 @@ mt7530_setup(struct dsa_switch *ds) · 753 unmodified lines
1326	1326
1327	1327	if (phy_node->parent == priv->dev->of_node->parent) {
1328	1328	ret = of_get_phy_mode(mac_np, &interface);
1329		− if (ret && ret != -ENODEV)
	1329	+ if (ret && ret != -ENODEV) {
	1330	+ of_node_put(mac_np);
1330	1331	return ret;
	1332	+ }
1331	1333	id = of_mdio_parse_addr(ds->dev, phy_node);
1332	1334	if (id == 0)
1333	1335	priv->p5_intf_sel = P5_INTF_SEL_PHY_P0;
1334	1336	if (id == 4)
1335	1337	priv->p5_intf_sel = P5_INTF_SEL_PHY_P4;
1336	1338	}
	1339	+ of_node_put(mac_np);
1337	1340	of_node_put(phy_node);
1338	1341	break;
1339	1342	}
@@ -1501,7 +1504,7 @@ unsupported: · 161 unmodified lines
1501	1504	phylink_set(mask, 100baseT_Full);
1502	1505
1503	1506	if (state->interface != PHY_INTERFACE_MODE_MII) {
1504		− phylink_set(mask, 1000baseT_Half);
	1507	+ /* This switch only supports 1G full-duplex. */
1505	1508	phylink_set(mask, 1000baseT_Full);
1506	1509	if (port == 5)
1507	1510	phylink_set(mask, 1000baseX_Full);

drivers/net/dsa/mv88e6xxx/chip.c+1−1

@@ -875,7 +875,7 @@ static uint64_t _mv88e6xxx_get_ethtool_stat(struct mv88e6xxx_chip *chip, · 874 unmodified lines
875	875	break;
876	876	case STATS_TYPE_BANK1:
877	877	reg = bank1_select;
878		− /* fall through */
	878	+ fallthrough;
879	879	case STATS_TYPE_BANK0:
880	880	reg \|= s->reg \| histogram;
881	881	mv88e6xxx_g1_stats_read(chip, reg, &low);

drivers/net/dsa/ocelot/felix.c+1−0

@@ -400,6 +400,7 @@ static int felix_parse_ports_node(struct felix *felix, · 399 unmodified lines
400	400	if (err < 0) {
401	401	dev_err(dev, "Unsupported PHY mode %s on port %d\n",
402	402	phy_modes(phy_mode), port);
	403	+ of_node_put(child);
403	404	return err;
404	405	}
405	406

drivers/net/dsa/sja1105/sja1105_main.c+1−1

@@ -3415,7 +3415,7 @@ static int sja1105_check_device_id(struct sja1105_private *priv) · 3414 unmodified lines
3415	3415
3416	3416	sja1105_unpack(prod_id, &part_no, 19, 4, SJA1105_SIZE_DEVICE_ID);
3417	3417
3418		− for (match = sja1105_dt_ids; match->compatible; match++) {
	3418	+ for (match = sja1105_dt_ids; match->compatible[0]; match++) {
3419	3419	const struct sja1105_info *info = match->data;
3420	3420
3421	3421	/* Is what's been probed in our match table at all? */

drivers/net/ethernet/3com/3c509.c+2−2

@@ -1259,14 +1259,14 @@ el3_up(struct net_device *dev) · 1258 unmodified lines
1259	1259	pr_cont("Forcing 3c5x9b full-duplex mode");
1260	1260	break;
1261	1261	}
1262		− /* fall through */
	1262	+ fallthrough;
1263	1263	case 8:
1264	1264	/* set full-duplex mode based on eeprom config setting */
1265	1265	if ((sw_info & 0x000f) && (sw_info & 0x8000)) {
1266	1266	pr_cont("Setting 3c5x9b full-duplex mode (from EEPROM configuration bit)");
1267	1267	break;
1268	1268	}
1269		− /* fall through */
	1269	+ fallthrough;
1270	1270	default:
1271	1271	/* xcvr=(0 \|\| 4) OR user has an old 3c5x9 non "B" model */
1272	1272	pr_cont("Setting 3c5x9/3c5x9B half-duplex mode");

drivers/net/ethernet/3com/3c574_cs.c+1−1

@@ -1046,7 +1046,7 @@ static int el3_ioctl(struct net_device dev, struct ifreq rq, int cmd) · 1045 unmodified lines
1046	1046	switch(cmd) {
1047	1047	case SIOCGMIIPHY: /* Get the address of the PHY in use. */
1048	1048	data->phy_id = phy;
1049		− /* fall through */
	1049	+ fallthrough;
1050	1050	case SIOCGMIIREG: /* Read the specified MII register. */
1051	1051	{
1052	1052	int saved_window;

drivers/net/ethernet/8390/axnet_cs.c+1−1

@@ -610,7 +610,7 @@ static int axnet_ioctl(struct net_device dev, struct ifreq rq, int cmd) · 609 unmodified lines
610	610	switch (cmd) {
611	611	case SIOCGMIIPHY:
612	612	data->phy_id = info->phy_id;
613		− /* Fall through */
	613	+ fallthrough;
614	614	case SIOCGMIIREG: /* Read MII PHY register. */
615	615	data->val_out = mdio_read(mii_addr, data->phy_id, data->reg_num & 0x1f);
616	616	return 0;

drivers/net/ethernet/8390/pcnet_cs.c+1−1

@@ -1108,7 +1108,7 @@ static int ei_ioctl(struct net_device dev, struct ifreq rq, int cmd) · 1107 unmodified lines
1108	1108	switch (cmd) {
1109	1109	case SIOCGMIIPHY:
1110	1110	data->phy_id = info->phy_id;
1111		− /* fall through */
	1111	+ fallthrough;
1112	1112	case SIOCGMIIREG: /* Read MII PHY register. */
1113	1113	data->val_out = mdio_read(mii_addr, data->phy_id, data->reg_num & 0x1f);
1114	1114	return 0;

drivers/net/ethernet/alacritech/slicoss.c+6−6

@@ -1712,13 +1712,13 @@ static bool slic_is_fiber(unsigned short subdev) · 1711 unmodified lines
1712	1712	{
1713	1713	switch (subdev) {
1714	1714	/* Mojave */
1715		− case PCI_SUBDEVICE_ID_ALACRITECH_1000X1F: /* fallthrough */
1716		− case PCI_SUBDEVICE_ID_ALACRITECH_SES1001F: /* fallthrough */
	1715	+ case PCI_SUBDEVICE_ID_ALACRITECH_1000X1F:
	1716	+ case PCI_SUBDEVICE_ID_ALACRITECH_SES1001F: fallthrough;
1717	1717	/* Oasis */
1718		− case PCI_SUBDEVICE_ID_ALACRITECH_SEN2002XF: /* fallthrough */
1719		− case PCI_SUBDEVICE_ID_ALACRITECH_SEN2001XF: /* fallthrough */
1720		− case PCI_SUBDEVICE_ID_ALACRITECH_SEN2104EF: /* fallthrough */
1721		− case PCI_SUBDEVICE_ID_ALACRITECH_SEN2102EF: /* fallthrough */
	1718	+ case PCI_SUBDEVICE_ID_ALACRITECH_SEN2002XF:
	1719	+ case PCI_SUBDEVICE_ID_ALACRITECH_SEN2001XF:
	1720	+ case PCI_SUBDEVICE_ID_ALACRITECH_SEN2104EF:
	1721	+ case PCI_SUBDEVICE_ID_ALACRITECH_SEN2102EF:
1722	1722	return true;
1723	1723	}
1724	1724	return false;

drivers/net/ethernet/alteon/acenic.c+1−1

@@ -547,7 +547,7 @@ static int acenic_probe_one(struct pci_dev *pdev, · 546 unmodified lines
547	547	ap->name);
548	548	break;
549	549	}
550		− /* Fall through */
	550	+ fallthrough;
551	551	case PCI_VENDOR_ID_SGI:
552	552	printk(KERN_INFO "%s: SGI AceNIC ", ap->name);
553	553	break;

drivers/net/ethernet/amd/amd8111e.c+1−1

@@ -1475,7 +1475,7 @@ static int amd8111e_ioctl(struct net_device dev , struct ifreq ifr, int cmd) · 1474 unmodified lines
1475	1475	case SIOCGMIIPHY:
1476	1476	data->phy_id = lp->ext_phy_addr;
1477	1477
1478		− /* fallthru */
	1478	+ fallthrough;
1479	1479	case SIOCGMIIREG:
1480	1480
1481	1481	spin_lock_irq(&lp->lock);

drivers/net/ethernet/amd/xgbe/xgbe-drv.c+3−3

@@ -1538,7 +1538,7 @@ static int xgbe_set_hwtstamp_settings(struct xgbe_prv_data *pdata, · 1537 unmodified lines
1538	1538	/* PTP v2, UDP, any kind of event packet */
1539	1539	case HWTSTAMP_FILTER_PTP_V2_L4_EVENT:
1540	1540	XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSVER2ENA, 1);
1541		− /* Fall through - to PTP v1, UDP, any kind of event packet */
	1541	+ fallthrough; /* to PTP v1, UDP, any kind of event packet */
1542	1542	case HWTSTAMP_FILTER_PTP_V1_L4_EVENT:
1543	1543	XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSIPV4ENA, 1);
1544	1544	XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSIPV6ENA, 1);
@@ -1549,7 +1549,7 @@ static int xgbe_set_hwtstamp_settings(struct xgbe_prv_data *pdata, · 4 unmodified lines
1549	1549	/* PTP v2, UDP, Sync packet */
1550	1550	case HWTSTAMP_FILTER_PTP_V2_L4_SYNC:
1551	1551	XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSVER2ENA, 1);
1552		− /* Fall through - to PTP v1, UDP, Sync packet */
	1552	+ fallthrough; /* to PTP v1, UDP, Sync packet */
1553	1553	case HWTSTAMP_FILTER_PTP_V1_L4_SYNC:
1554	1554	XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSIPV4ENA, 1);
1555	1555	XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSIPV6ENA, 1);
@@ -1560,7 +1560,7 @@ static int xgbe_set_hwtstamp_settings(struct xgbe_prv_data *pdata, · 4 unmodified lines
1560	1560	/* PTP v2, UDP, Delay_req packet */
1561	1561	case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ:
1562	1562	XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSVER2ENA, 1);
1563		− /* Fall through - to PTP v1, UDP, Delay_req packet */
	1563	+ fallthrough; /* to PTP v1, UDP, Delay_req packet */
1564	1564	case HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ:
1565	1565	XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSIPV4ENA, 1);
1566	1566	XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSIPV6ENA, 1);

drivers/net/ethernet/amd/xgbe/xgbe-phy-v2.c+13−0

@@ -166,6 +166,7 @@ enum xgbe_port_mode { · 165 unmodified lines
166	166	XGBE_PORT_MODE_10GBASE_T,
167	167	XGBE_PORT_MODE_10GBASE_R,
168	168	XGBE_PORT_MODE_SFP,
	169	+ XGBE_PORT_MODE_BACKPLANE_NO_AUTONEG,
169	170	XGBE_PORT_MODE_MAX,
170	171	};
171	172
@@ -1634,6 +1635,7 @@ static enum xgbe_mode xgbe_phy_an73_redrv_outcome(struct xgbe_prv_data *pdata) · 1462 unmodified lines
1634	1635	if (ad_reg & 0x80) {
1635	1636	switch (phy_data->port_mode) {
1636	1637	case XGBE_PORT_MODE_BACKPLANE:
	1638	+ case XGBE_PORT_MODE_BACKPLANE_NO_AUTONEG:
1637	1639	mode = XGBE_MODE_KR;
1638	1640	break;
1639	1641	default:
@@ -1643,6 +1645,7 @@ static enum xgbe_mode xgbe_phy_an73_redrv_outcome(struct xgbe_prv_data *pdata) · 3 unmodified lines
1643	1645	} else if (ad_reg & 0x20) {
1644	1646	switch (phy_data->port_mode) {
1645	1647	case XGBE_PORT_MODE_BACKPLANE:
	1648	+ case XGBE_PORT_MODE_BACKPLANE_NO_AUTONEG:
1646	1649	mode = XGBE_MODE_KX_1000;
1647	1650	break;
1648	1651	case XGBE_PORT_MODE_1000BASE_X:
@@ -1782,6 +1785,7 @@ static void xgbe_phy_an_advertising(struct xgbe_prv_data *pdata, · 133 unmodified lines
1782	1785
1783	1786	switch (phy_data->port_mode) {
1784	1787	case XGBE_PORT_MODE_BACKPLANE:
	1788	+ case XGBE_PORT_MODE_BACKPLANE_NO_AUTONEG:
1785	1789	XGBE_SET_ADV(dlks, 10000baseKR_Full);
1786	1790	break;
1787	1791	case XGBE_PORT_MODE_BACKPLANE_2500:
@@ -1874,6 +1878,7 @@ static enum xgbe_an_mode xgbe_phy_an_mode(struct xgbe_prv_data *pdata) · 86 unmodified lines
1874	1878	switch (phy_data->port_mode) {
1875	1879	case XGBE_PORT_MODE_BACKPLANE:
1876	1880	return XGBE_AN_MODE_CL73;
	1881	+ case XGBE_PORT_MODE_BACKPLANE_NO_AUTONEG:
1877	1882	case XGBE_PORT_MODE_BACKPLANE_2500:
1878	1883	return XGBE_AN_MODE_NONE;
1879	1884	case XGBE_PORT_MODE_1000BASE_T:
@@ -2156,6 +2161,7 @@ static enum xgbe_mode xgbe_phy_switch_mode(struct xgbe_prv_data *pdata) · 276 unmodified lines
2156	2161
2157	2162	switch (phy_data->port_mode) {
2158	2163	case XGBE_PORT_MODE_BACKPLANE:
	2164	+ case XGBE_PORT_MODE_BACKPLANE_NO_AUTONEG:
2159	2165	return xgbe_phy_switch_bp_mode(pdata);
2160	2166	case XGBE_PORT_MODE_BACKPLANE_2500:
2161	2167	return xgbe_phy_switch_bp_2500_mode(pdata);
@@ -2251,6 +2257,7 @@ static enum xgbe_mode xgbe_phy_get_mode(struct xgbe_prv_data *pdata, · 89 unmodified lines
2251	2257
2252	2258	switch (phy_data->port_mode) {
2253	2259	case XGBE_PORT_MODE_BACKPLANE:
	2260	+ case XGBE_PORT_MODE_BACKPLANE_NO_AUTONEG:
2254	2261	return xgbe_phy_get_bp_mode(speed);
2255	2262	case XGBE_PORT_MODE_BACKPLANE_2500:
2256	2263	return xgbe_phy_get_bp_2500_mode(speed);
@@ -2426,6 +2433,7 @@ static bool xgbe_phy_use_mode(struct xgbe_prv_data *pdata, enum xgbe_mode mode) · 169 unmodified lines
2426	2433
2427	2434	switch (phy_data->port_mode) {
2428	2435	case XGBE_PORT_MODE_BACKPLANE:
	2436	+ case XGBE_PORT_MODE_BACKPLANE_NO_AUTONEG:
2429	2437	return xgbe_phy_use_bp_mode(pdata, mode);
2430	2438	case XGBE_PORT_MODE_BACKPLANE_2500:
2431	2439	return xgbe_phy_use_bp_2500_mode(pdata, mode);
@@ -2515,6 +2523,7 @@ static bool xgbe_phy_valid_speed(struct xgbe_prv_data *pdata, int speed) · 83 unmodified lines
2515	2523
2516	2524	switch (phy_data->port_mode) {
2517	2525	case XGBE_PORT_MODE_BACKPLANE:
	2526	+ case XGBE_PORT_MODE_BACKPLANE_NO_AUTONEG:
2518	2527	return xgbe_phy_valid_speed_bp_mode(speed);
2519	2528	case XGBE_PORT_MODE_BACKPLANE_2500:
2520	2529	return xgbe_phy_valid_speed_bp_2500_mode(speed);
@@ -2792,6 +2801,7 @@ static bool xgbe_phy_port_mode_mismatch(struct xgbe_prv_data *pdata) · 271 unmodified lines
2792	2801
2793	2802	switch (phy_data->port_mode) {
2794	2803	case XGBE_PORT_MODE_BACKPLANE:
	2804	+ case XGBE_PORT_MODE_BACKPLANE_NO_AUTONEG:
2795	2805	if ((phy_data->port_speeds & XGBE_PHY_PORT_SPEED_1000) \|\|
2796	2806	(phy_data->port_speeds & XGBE_PHY_PORT_SPEED_10000))
2797	2807	return false;
@@ -2844,6 +2854,7 @@ static bool xgbe_phy_conn_type_mismatch(struct xgbe_prv_data *pdata) · 46 unmodified lines
2844	2854
2845	2855	switch (phy_data->port_mode) {
2846	2856	case XGBE_PORT_MODE_BACKPLANE:
	2857	+ case XGBE_PORT_MODE_BACKPLANE_NO_AUTONEG:
2847	2858	case XGBE_PORT_MODE_BACKPLANE_2500:
2848	2859	if (phy_data->conn_type == XGBE_CONN_TYPE_BACKPLANE)
2849	2860	return false;
@@ -3160,6 +3171,8 @@ static int xgbe_phy_init(struct xgbe_prv_data *pdata) · 310 unmodified lines
3160	3171	/* Backplane support */
3161	3172	case XGBE_PORT_MODE_BACKPLANE:
3162	3173	XGBE_SET_SUP(lks, Autoneg);
	3174	+ fallthrough;
	3175	+ case XGBE_PORT_MODE_BACKPLANE_NO_AUTONEG:
3163	3176	XGBE_SET_SUP(lks, Pause);
3164	3177	XGBE_SET_SUP(lks, Asym_Pause);
3165	3178	XGBE_SET_SUP(lks, Backplane);

drivers/net/ethernet/arc/emac_mdio.c+1−0

@@ -153,6 +153,7 @@ int arc_mdio_probe(struct arc_emac_priv *priv) · 152 unmodified lines
153	153	if (IS_ERR(data->reset_gpio)) {
154	154	error = PTR_ERR(data->reset_gpio);
155	155	dev_err(priv->dev, "Failed to request gpio: %d\n", error);
	156	+ mdiobus_free(bus);
156	157	return error;
157	158	}
158	159

drivers/net/ethernet/broadcom/bcmsysport.c+4−2

@@ -2491,8 +2491,10 @@ static int bcm_sysport_probe(struct platform_device *pdev) · 2490 unmodified lines
2491	2491	priv->tx_rings = devm_kcalloc(&pdev->dev, txq,
2492	2492	sizeof(struct bcm_sysport_tx_ring),
2493	2493	GFP_KERNEL);
2494		− if (!priv->tx_rings)
2495		− return -ENOMEM;
	2494	+ if (!priv->tx_rings) {
	2495	+ ret = -ENOMEM;
	2496	+ goto err_free_netdev;
	2497	+ }
2496	2498
2497	2499	priv->is_lite = params->is_lite;
2498	2500	priv->num_rx_desc_words = params->num_rx_desc_words;

drivers/net/ethernet/broadcom/bgmac-bcma.c+1−1

@@ -217,7 +217,7 @@ static int bgmac_probe(struct bcma_device *core) · 216 unmodified lines
217	217	/* BCM 471X/535X family */
218	218	case BCMA_CHIP_ID_BCM4716:
219	219	bgmac->feature_flags \|= BGMAC_FEAT_CLKCTLST;
220		− /* fallthrough */
	220	+ fallthrough;
221	221	case BCMA_CHIP_ID_BCM47162:
222	222	bgmac->feature_flags \|= BGMAC_FEAT_FLW_CTRL2;
223	223	bgmac->feature_flags \|= BGMAC_FEAT_SET_RXQ_CLK;

drivers/net/ethernet/broadcom/bgmac-platform.c+1−1

@@ -131,7 +131,7 @@ static void bgmac_nicpm_speed_set(struct net_device *net_dev) · 130 unmodified lines
131	131	switch (bgmac->net_dev->phydev->speed) {
132	132	default:
133	133	netdev_err(net_dev, "Unsupported speed. Defaulting to 1000Mb\n");
134		− /* fall through */
	134	+ fallthrough;
135	135	case SPEED_1000:
136	136	val \|= NICPM_IOMUX_CTRL_SPD_1000M << NICPM_IOMUX_CTRL_SPD_SHIFT;
137	137	break;

drivers/net/ethernet/broadcom/bnx2.c+7−7

@@ -1337,13 +1337,13 @@ bnx2_set_mac_link(struct bnx2 *bp) · 1336 unmodified lines
1337	1337	val \|= BNX2_EMAC_MODE_PORT_MII_10M;
1338	1338	break;
1339	1339	}
1340		− /* fall through */
	1340	+ fallthrough;
1341	1341	case SPEED_100:
1342	1342	val \|= BNX2_EMAC_MODE_PORT_MII;
1343	1343	break;
1344	1344	case SPEED_2500:
1345	1345	val \|= BNX2_EMAC_MODE_25G_MODE;
1346		− /* fall through */
	1346	+ fallthrough;
1347	1347	case SPEED_1000:
1348	1348	val \|= BNX2_EMAC_MODE_PORT_GMII;
1349	1349	break;
@@ -1995,26 +1995,26 @@ bnx2_remote_phy_event(struct bnx2 *bp) · 645 unmodified lines
1995	1995	switch (speed) {
1996	1996	case BNX2_LINK_STATUS_10HALF:
1997	1997	bp->duplex = DUPLEX_HALF;
1998		− /* fall through */
	1998	+ fallthrough;
1999	1999	case BNX2_LINK_STATUS_10FULL:
2000	2000	bp->line_speed = SPEED_10;
2001	2001	break;
2002	2002	case BNX2_LINK_STATUS_100HALF:
2003	2003	bp->duplex = DUPLEX_HALF;
2004		− /* fall through */
	2004	+ fallthrough;
2005	2005	case BNX2_LINK_STATUS_100BASE_T4:
2006	2006	case BNX2_LINK_STATUS_100FULL:
2007	2007	bp->line_speed = SPEED_100;
2008	2008	break;
2009	2009	case BNX2_LINK_STATUS_1000HALF:
2010	2010	bp->duplex = DUPLEX_HALF;
2011		− /* fall through */
	2011	+ fallthrough;
2012	2012	case BNX2_LINK_STATUS_1000FULL:
2013	2013	bp->line_speed = SPEED_1000;
2014	2014	break;
2015	2015	case BNX2_LINK_STATUS_2500HALF:
2016	2016	bp->duplex = DUPLEX_HALF;
2017		− /* fall through */
	2017	+ fallthrough;
2018	2018	case BNX2_LINK_STATUS_2500FULL:
2019	2019	bp->line_speed = SPEED_2500;
2020	2020	break;
@@ -7856,7 +7856,7 @@ bnx2_ioctl(struct net_device dev, struct ifreq ifr, int cmd) · 5835 unmodified lines
7856	7856	case SIOCGMIIPHY:
7857	7857	data->phy_id = bp->phy_addr;
7858	7858
7859		− /* fallthru */
	7859	+ fallthrough;
7860	7860	case SIOCGMIIREG: {
7861	7861	u32 mii_regval;
7862	7862

drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.c+7−7

@@ -4712,14 +4712,14 @@ static void bnx2x_sync_link(struct link_params *params, · 4711 unmodified lines
4712	4712	LINK_STATUS_SPEED_AND_DUPLEX_MASK) {
4713	4713	case LINK_10THD:
4714	4714	vars->duplex = DUPLEX_HALF;
4715		− /* Fall thru */
	4715	+ fallthrough;
4716	4716	case LINK_10TFD:
4717	4717	vars->line_speed = SPEED_10;
4718	4718	break;
4719	4719
4720	4720	case LINK_100TXHD:
4721	4721	vars->duplex = DUPLEX_HALF;
4722		− /* Fall thru */
	4722	+ fallthrough;
4723	4723	case LINK_100T4:
4724	4724	case LINK_100TXFD:
4725	4725	vars->line_speed = SPEED_100;
@@ -4727,14 +4727,14 @@ static void bnx2x_sync_link(struct link_params *params, · 1 unmodified line
4727	4727
4728	4728	case LINK_1000THD:
4729	4729	vars->duplex = DUPLEX_HALF;
4730		− /* Fall thru */
	4730	+ fallthrough;
4731	4731	case LINK_1000TFD:
4732	4732	vars->line_speed = SPEED_1000;
4733	4733	break;
4734	4734
4735	4735	case LINK_2500THD:
4736	4736	vars->duplex = DUPLEX_HALF;
4737		− /* Fall thru */
	4737	+ fallthrough;
4738	4738	case LINK_2500TFD:
4739	4739	vars->line_speed = SPEED_2500;
4740	4740	break;
@@ -6339,7 +6339,7 @@ int bnx2x_set_led(struct link_params *params, · 1598 unmodified lines
6339	6339	*/
6340	6340	if (!vars->link_up)
6341	6341	break;
6342		− /* fall through */
	6342	+ fallthrough;
6343	6343	case LED_MODE_ON:
6344	6344	if (((params->phy[EXT_PHY1].type ==
6345	6345	PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM8727) \|\|
@@ -12508,13 +12508,13 @@ static void bnx2x_phy_def_cfg(struct link_params *params, · 6162 unmodified lines
12508	12508	switch (link_config & PORT_FEATURE_LINK_SPEED_MASK) {
12509	12509	case PORT_FEATURE_LINK_SPEED_10M_HALF:
12510	12510	phy->req_duplex = DUPLEX_HALF;
12511		− /* fall through */
	12511	+ fallthrough;
12512	12512	case PORT_FEATURE_LINK_SPEED_10M_FULL:
12513	12513	phy->req_line_speed = SPEED_10;
12514	12514	break;
12515	12515	case PORT_FEATURE_LINK_SPEED_100M_HALF:
12516	12516	phy->req_duplex = DUPLEX_HALF;
12517		− /* fall through */
	12517	+ fallthrough;
12518	12518	case PORT_FEATURE_LINK_SPEED_100M_FULL:
12519	12519	phy->req_line_speed = SPEED_100;
12520	12520	break;

drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c+2−2

@@ -8600,11 +8600,11 @@ int bnx2x_set_int_mode(struct bnx2x *bp) · 8599 unmodified lines
8600	8600	bp->num_queues,
8601	8601	1 + bp->num_cnic_queues);
8602	8602
8603		− /* fall through */
	8603	+ fallthrough;
8604	8604	case BNX2X_INT_MODE_MSI:
8605	8605	bnx2x_enable_msi(bp);
8606	8606
8607		− /* fall through */
	8607	+ fallthrough;
8608	8608	case BNX2X_INT_MODE_INTX:
8609	8609	bp->num_ethernet_queues = 1;
8610	8610	bp->num_queues = bp->num_ethernet_queues + bp->num_cnic_queues;

drivers/net/ethernet/broadcom/bnx2x/bnx2x_sp.c+2−2

@@ -3258,7 +3258,7 @@ static int bnx2x_mcast_validate_e2(struct bnx2x *bp, · 3257 unmodified lines
3258	3258	/* DEL command deletes all currently configured MACs */
3259	3259	case BNX2X_MCAST_CMD_DEL:
3260	3260	o->set_registry_size(o, 0);
3261		− /* fall through */
	3261	+ fallthrough;
3262	3262
3263	3263	/* RESTORE command will restore the entire multicast configuration */
3264	3264	case BNX2X_MCAST_CMD_RESTORE:
@@ -3592,7 +3592,7 @@ static int bnx2x_mcast_validate_e1(struct bnx2x *bp, · 327 unmodified lines
3592	3592	/* DEL command deletes all currently configured MACs */
3593	3593	case BNX2X_MCAST_CMD_DEL:
3594	3594	o->set_registry_size(o, 0);
3595		− /* fall through */
	3595	+ fallthrough;
3596	3596
3597	3597	/* RESTORE command will restore the entire multicast configuration */
3598	3598	case BNX2X_MCAST_CMD_RESTORE:

drivers/net/ethernet/broadcom/bnx2x/bnx2x_sriov.c+2−2

@@ -1809,7 +1809,7 @@ get_vf: · 1808 unmodified lines
1809	1809	DP(BNX2X_MSG_IOV, "got VF [%d:%d] RSS update ramrod\n",
1810	1810	vf->abs_vfid, qidx);
1811	1811	bnx2x_vf_handle_rss_update_eqe(bp, vf);
1812		− /* fall through */
	1812	+ fallthrough;
1813	1813	case EVENT_RING_OPCODE_VF_FLR:
1814	1814	/* Do nothing for now */
1815	1815	return 0;
@@ -2207,7 +2207,7 @@ int bnx2x_vf_free(struct bnx2x bp, struct bnx2x_virtf vf) · 391 unmodified lines
2207	2207	rc = bnx2x_vf_close(bp, vf);
2208	2208	if (rc)
2209	2209	goto op_err;
2210		− /* Fall through - to release resources */
	2210	+ fallthrough; /* to release resources */
2211	2211	case VF_ACQUIRED:
2212	2212	DP(BNX2X_MSG_IOV, "about to free resources\n");
2213	2213	bnx2x_vf_free_resc(bp, vf);

drivers/net/ethernet/broadcom/bnxt/bnxt.c+67−39

@@ -1141,6 +1141,9 @@ static int bnxt_discard_rx(struct bnxt bp, struct bnxt_cp_ring_info cpr, · 1140 unmodified lines
1141	1141
1142	1142	static void bnxt_queue_fw_reset_work(struct bnxt *bp, unsigned long delay)
1143	1143	{
	1144	+ if (!(test_bit(BNXT_STATE_IN_FW_RESET, &bp->state)))
	1145	+ return;
	1146	+
1144	1147	if (BNXT_PF(bp))
1145	1148	queue_delayed_work(bnxt_pf_wq, &bp->fw_reset_task, delay);
1146	1149	else
@@ -1157,10 +1160,12 @@ static void bnxt_queue_sp_work(struct bnxt *bp) · 10 unmodified lines
1157	1160
1158	1161	static void bnxt_cancel_sp_work(struct bnxt *bp)
1159	1162	{
1160		− if (BNXT_PF(bp))
	1163	+ if (BNXT_PF(bp)) {
1161	1164	flush_workqueue(bnxt_pf_wq);
1162		− else
	1165	+ } else {
1163	1166	cancel_work_sync(&bp->sp_task);
	1167	+ cancel_delayed_work_sync(&bp->fw_reset_task);
	1168	+ }
1164	1169	}
1165	1170
1166	1171	static void bnxt_sched_reset(struct bnxt bp, struct bnxt_rx_ring_info rxr)
@@ -1923,7 +1928,7 @@ u32 bnxt_fw_health_readl(struct bnxt *bp, int reg_idx) · 756 unmodified lines
1923	1928	break;
1924	1929	case BNXT_FW_HEALTH_REG_TYPE_GRC:
1925	1930	reg_off = fw_health->mapped_regs[reg_idx];
1926		− /* fall through */
	1931	+ fallthrough;
1927	1932	case BNXT_FW_HEALTH_REG_TYPE_BAR0:
1928	1933	val = readl(bp->bar0 + reg_off);
1929	1934	break;
@@ -1966,11 +1971,11 @@ static int bnxt_async_event_process(struct bnxt *bp, · 36 unmodified lines
1966	1971	}
1967	1972	set_bit(BNXT_LINK_SPEED_CHNG_SP_EVENT, &bp->sp_event);
1968	1973	}
1969		− /* fall through */
	1974	+ fallthrough;
1970	1975	case ASYNC_EVENT_CMPL_EVENT_ID_LINK_SPEED_CHANGE:
1971	1976	case ASYNC_EVENT_CMPL_EVENT_ID_PORT_PHY_CFG_CHANGE:
1972	1977	set_bit(BNXT_LINK_CFG_CHANGE_SP_EVENT, &bp->sp_event);
1973		− /* fall through */
	1978	+ fallthrough;
1974	1979	case ASYNC_EVENT_CMPL_EVENT_ID_LINK_STATUS_CHANGE:
1975	1980	set_bit(BNXT_LINK_CHNG_SP_EVENT, &bp->sp_event);
1976	1981	break;
@@ -6102,6 +6107,21 @@ static int bnxt_get_func_stat_ctxs(struct bnxt *bp) · 4125 unmodified lines
6102	6107	return cp + ulp_stat;
6103	6108	}
6104	6109
	6110	+/* Check if a default RSS map needs to be setup. This function is only
	6111	+ * used on older firmware that does not require reserving RX rings.
	6112	+ */
	6113	+static void bnxt_check_rss_tbl_no_rmgr(struct bnxt *bp)
	6114	+{
	6115	+ struct bnxt_hw_resc *hw_resc = &bp->hw_resc;
	6116	+
	6117	+ /* The RSS map is valid for RX rings set to resv_rx_rings */
	6118	+ if (hw_resc->resv_rx_rings != bp->rx_nr_rings) {
	6119	+ hw_resc->resv_rx_rings = bp->rx_nr_rings;
	6120	+ if (!netif_is_rxfh_configured(bp->dev))
	6121	+ bnxt_set_dflt_rss_indir_tbl(bp);
	6122	+ }
	6123	+}
	6124	+
6105	6125	static bool bnxt_need_reserve_rings(struct bnxt *bp)
6106	6126	{
6107	6127	struct bnxt_hw_resc *hw_resc = &bp->hw_resc;
@@ -6110,22 +6130,28 @@ static bool bnxt_need_reserve_rings(struct bnxt *bp) · 2 unmodified lines
6110	6130	int rx = bp->rx_nr_rings, stat;
6111	6131	int vnic = 1, grp = rx;
6112	6132
6113		− if (bp->hwrm_spec_code < 0x10601)
6114		− return false;
6115		−
6116		− if (hw_resc->resv_tx_rings != bp->tx_nr_rings)
	6133	+ if (hw_resc->resv_tx_rings != bp->tx_nr_rings &&
	6134	+ bp->hwrm_spec_code >= 0x10601)
6117	6135	return true;
6118	6136
	6137	+ /* Old firmware does not need RX ring reservations but we still
	6138	+ * need to setup a default RSS map when needed. With new firmware
	6139	+ * we go through RX ring reservations first and then set up the
	6140	+ * RSS map for the successfully reserved RX rings when needed.
	6141	+ */
	6142	+ if (!BNXT_NEW_RM(bp)) {
	6143	+ bnxt_check_rss_tbl_no_rmgr(bp);
	6144	+ return false;
	6145	+ }
6119	6146	if ((bp->flags & BNXT_FLAG_RFS) && !(bp->flags & BNXT_FLAG_CHIP_P5))
6120	6147	vnic = rx + 1;
6121	6148	if (bp->flags & BNXT_FLAG_AGG_RINGS)
6122	6149	rx <<= 1;
6123	6150	stat = bnxt_get_func_stat_ctxs(bp);
6124		− if (BNXT_NEW_RM(bp) &&
6125		− (hw_resc->resv_rx_rings != rx \|\| hw_resc->resv_cp_rings != cp \|\|
6126		− hw_resc->resv_vnics != vnic \|\| hw_resc->resv_stat_ctxs != stat \|\|
6127		− (hw_resc->resv_hw_ring_grps != grp &&
6128		− !(bp->flags & BNXT_FLAG_CHIP_P5))))
	6151	+ if (hw_resc->resv_rx_rings != rx \|\| hw_resc->resv_cp_rings != cp \|\|
	6152	+ hw_resc->resv_vnics != vnic \|\| hw_resc->resv_stat_ctxs != stat \|\|
	6153	+ (hw_resc->resv_hw_ring_grps != grp &&
	6154	+ !(bp->flags & BNXT_FLAG_CHIP_P5)))
6129	6155	return true;
6130	6156	if ((bp->flags & BNXT_FLAG_CHIP_P5) && BNXT_PF(bp) &&
6131	6157	hw_resc->resv_irqs != nq)
@@ -6214,6 +6240,9 @@ static int __bnxt_reserve_rings(struct bnxt *bp) · 82 unmodified lines
6214	6240	if (!tx \|\| !rx \|\| !cp \|\| !grp \|\| !vnic \|\| !stat)
6215	6241	return -ENOMEM;
6216	6242
	6243	+ if (!netif_is_rxfh_configured(bp->dev))
	6244	+ bnxt_set_dflt_rss_indir_tbl(bp);
	6245	+
6217	6246	return rc;
6218	6247	}
6219	6248
@@ -8495,9 +8524,6 @@ int bnxt_reserve_rings(struct bnxt *bp, bool irq_re_init) · 2275 unmodified lines
8495	8524	rc = bnxt_init_int_mode(bp);
8496	8525	bnxt_ulp_irq_restart(bp, rc);
8497	8526	}
8498		− if (!netif_is_rxfh_configured(bp->dev))
8499		− bnxt_set_dflt_rss_indir_tbl(bp);
8500		−
8501	8527	if (rc) {
8502	8528	netdev_err(bp->dev, "ring reservation/IRQ init failure rc: %d\n", rc);
8503	8529	return rc;
@@ -9284,16 +9310,19 @@ static ssize_t bnxt_show_temp(struct device *dev, · 780 unmodified lines
9284	9310	struct hwrm_temp_monitor_query_input req = {0};
9285	9311	struct hwrm_temp_monitor_query_output *resp;
9286	9312	struct bnxt *bp = dev_get_drvdata(dev);
9287		− u32 temp = 0;
	9313	+ u32 len = 0;
9288	9314
9289	9315	resp = bp->hwrm_cmd_resp_addr;
9290	9316	bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_TEMP_MONITOR_QUERY, -1, -1);
9291	9317	mutex_lock(&bp->hwrm_cmd_lock);
9292		− if (!_hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT))
9293		− temp = resp->temp * 1000; /* display millidegree */
	9318	+ if (!_hwrm_send_message_silent(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT))
	9319	+ len = sprintf(buf, "%u\n", resp->temp * 1000); /* display millidegree */
9294	9320	mutex_unlock(&bp->hwrm_cmd_lock);
9295	9321
9296		− return sprintf(buf, "%u\n", temp);
	9322	+ if (len)
	9323	+ return len;
	9324	+
	9325	+ return sprintf(buf, "unknown\n");
9297	9326	}
9298	9327	static SENSOR_DEVICE_ATTR(temp1_input, 0444, bnxt_show_temp, NULL, 0);
9299	9328
@@ -9475,15 +9504,15 @@ static int __bnxt_open_nic(struct bnxt *bp, bool irq_re_init, bool link_re_init) · 175 unmodified lines
9475	9504	}
9476	9505	}
9477	9506
9478		− bnxt_enable_napi(bp);
9479		− bnxt_debug_dev_init(bp);
9480		−
9481	9507	rc = bnxt_init_nic(bp, irq_re_init);
9482	9508	if (rc) {
9483	9509	netdev_err(bp->dev, "bnxt_init_nic err: %x\n", rc);
9484		− goto open_err;
	9510	+ goto open_err_irq;
9485	9511	}
9486	9512
	9513	+ bnxt_enable_napi(bp);
	9514	+ bnxt_debug_dev_init(bp);
	9515	+
9487	9516	if (link_re_init) {
9488	9517	mutex_lock(&bp->link_lock);
9489	9518	rc = bnxt_update_phy_setting(bp);
@@ -9514,10 +9543,6 @@ static int __bnxt_open_nic(struct bnxt *bp, bool irq_re_init, bool link_re_init) · 24 unmodified lines
9514	9543	bnxt_vf_reps_open(bp);
9515	9544	return 0;
9516	9545
9517		−open_err:
9518		− bnxt_debug_dev_exit(bp);
9519		− bnxt_disable_napi(bp);
9520		−
9521	9546	open_err_irq:
9522	9547	bnxt_del_napi(bp);
9523	9548
@@ -9765,7 +9790,7 @@ static int bnxt_ioctl(struct net_device dev, struct ifreq ifr, int cmd) · 241 unmodified lines
9765	9790	case SIOCGMIIPHY:
9766	9791	mdio->phy_id = bp->link_info.phy_addr;
9767	9792
9768		− /* fallthru */
	9793	+ fallthrough;
9769	9794	case SIOCGMIIREG: {
9770	9795	u16 mii_regval = 0;
9771	9796
@@ -11022,7 +11047,7 @@ static void bnxt_fw_reset_writel(struct bnxt *bp, int reg_idx) · 1250 unmodified lines
11022	11047	writel(reg_off & BNXT_GRC_BASE_MASK,
11023	11048	bp->bar0 + BNXT_GRCPF_REG_WINDOW_BASE_OUT + 4);
11024	11049	reg_off = (reg_off & BNXT_GRC_OFFSET_MASK) + 0x2000;
11025		− /* fall through */
	11050	+ fallthrough;
11026	11051	case BNXT_FW_HEALTH_REG_TYPE_BAR0:
11027	11052	writel(val, bp->bar0 + reg_off);
11028	11053	break;
@@ -11135,7 +11160,7 @@ static void bnxt_fw_reset_task(struct work_struct *work) · 106 unmodified lines
11135	11160	}
11136	11161	bp->fw_reset_state = BNXT_FW_RESET_STATE_RESET_FW;
11137	11162	}
11138		− /* fall through */
	11163	+ fallthrough;
11139	11164	case BNXT_FW_RESET_STATE_RESET_FW:
11140	11165	bnxt_reset_all(bp);
11141	11166	bp->fw_reset_state = BNXT_FW_RESET_STATE_ENABLE_DEV;
@@ -11158,7 +11183,7 @@ static void bnxt_fw_reset_task(struct work_struct *work) · 16 unmodified lines
11158	11183	}
11159	11184	pci_set_master(bp->pdev);
11160	11185	bp->fw_reset_state = BNXT_FW_RESET_STATE_POLL_FW;
11161		− /* fall through */
	11186	+ fallthrough;
11162	11187	case BNXT_FW_RESET_STATE_POLL_FW:
11163	11188	bp->hwrm_cmd_timeout = SHORT_HWRM_CMD_TIMEOUT;
11164	11189	rc = __bnxt_hwrm_ver_get(bp, true);
@@ -11173,7 +11198,7 @@ static void bnxt_fw_reset_task(struct work_struct *work) · 8 unmodified lines
11173	11198	}
11174	11199	bp->hwrm_cmd_timeout = DFLT_HWRM_CMD_TIMEOUT;
11175	11200	bp->fw_reset_state = BNXT_FW_RESET_STATE_OPENING;
11176		− /* fall through */
	11201	+ fallthrough;
11177	11202	case BNXT_FW_RESET_STATE_OPENING:
11178	11203	while (!rtnl_trylock()) {
11179	11204	bnxt_queue_fw_reset_work(bp, HZ / 10);
@@ -11761,6 +11786,7 @@ static void bnxt_remove_one(struct pci_dev *pdev) · 581 unmodified lines
11761	11786	unregister_netdev(dev);
11762	11787	bnxt_dl_unregister(bp);
11763	11788	bnxt_shutdown_tc(bp);
	11789	+ clear_bit(BNXT_STATE_IN_FW_RESET, &bp->state);
11764	11790	bnxt_cancel_sp_work(bp);
11765	11791	bp->sp_event = 0;
11766	11792
@@ -12200,6 +12226,10 @@ static int bnxt_init_one(struct pci_dev pdev, const struct pci_device_id ent) · 433 unmodified lines
12200	12226	if (BNXT_CHIP_P5(bp))
12201	12227	bp->flags \|= BNXT_FLAG_CHIP_P5;
12202	12228
	12229	+ rc = bnxt_alloc_rss_indir_tbl(bp);
	12230	+ if (rc)
	12231	+ goto init_err_pci_clean;
	12232	+
12203	12233	rc = bnxt_fw_init_one_p2(bp);
12204	12234	if (rc)
12205	12235	goto init_err_pci_clean;
@@ -12304,11 +12334,6 @@ static int bnxt_init_one(struct pci_dev pdev, const struct pci_device_id ent) · 98 unmodified lines
12304	12334	*/
12305	12335	bp->tx_nr_rings_per_tc = bp->tx_nr_rings;
12306	12336
12307		− rc = bnxt_alloc_rss_indir_tbl(bp);
12308		− if (rc)
12309		− goto init_err_pci_clean;
12310		− bnxt_set_dflt_rss_indir_tbl(bp);
12311		−
12312	12337	if (BNXT_PF(bp)) {
12313	12338	if (!bnxt_pf_wq) {
12314	12339	bnxt_pf_wq =
@@ -12339,6 +12364,7 @@ static int bnxt_init_one(struct pci_dev pdev, const struct pci_device_id ent) · 24 unmodified lines
12339	12364	(long)pci_resource_start(pdev, 0), dev->dev_addr);
12340	12365	pcie_print_link_status(pdev);
12341	12366
	12367	+ pci_save_state(pdev);
12342	12368	return 0;
12343	12369
12344	12370	init_err_cleanup:
@@ -12536,6 +12562,8 @@ static pci_ers_result_t bnxt_io_slot_reset(struct pci_dev *pdev) · 191 unmodified lines
12536	12562	"Cannot re-enable PCI device after reset.\n");
12537	12563	} else {
12538	12564	pci_set_master(pdev);
	12565	+ pci_restore_state(pdev);
	12566	+ pci_save_state(pdev);
12539	12567
12540	12568	err = bnxt_hwrm_func_reset(bp);
12541	12569	if (!err) {

drivers/net/ethernet/broadcom/bnxt/bnxt_ethtool.c+8−12

@@ -472,20 +472,13 @@ static int bnxt_get_num_tpa_ring_stats(struct bnxt *bp) · 471 unmodified lines
472	472	static int bnxt_get_num_ring_stats(struct bnxt *bp)
473	473	{
474	474	int rx, tx, cmn;
475		− bool sh = false;
476		−
477		− if (bp->flags & BNXT_FLAG_SHARED_RINGS)
478		− sh = true;
479	475
480	476	rx = NUM_RING_RX_HW_STATS + NUM_RING_RX_SW_STATS +
481	477	bnxt_get_num_tpa_ring_stats(bp);
482	478	tx = NUM_RING_TX_HW_STATS;
483	479	cmn = NUM_RING_CMN_SW_STATS;
484		− if (sh)
485		− return (rx + tx + cmn) * bp->cp_nr_rings;
486		− else
487		− return rx * bp->rx_nr_rings + tx * bp->tx_nr_rings +
488		− cmn * bp->cp_nr_rings;
	480	+ return rx * bp->rx_nr_rings + tx * bp->tx_nr_rings +
	481	+ cmn * bp->cp_nr_rings;
489	482	}
490	483
491	484	static int bnxt_get_num_stats(struct bnxt *bp)
@@ -806,7 +799,7 @@ static void bnxt_get_channels(struct net_device *dev, · 314 unmodified lines
806	799	int max_tx_sch_inputs;
807	800
808	801	/* Get the most up-to-date max_tx_sch_inputs. */
809		− if (BNXT_NEW_RM(bp))
	802	+ if (netif_running(dev) && BNXT_NEW_RM(bp))
810	803	bnxt_hwrm_func_resc_qcaps(bp, false);
811	804	max_tx_sch_inputs = hw_resc->max_tx_sch_inputs;
812	805
@@ -1073,7 +1066,7 @@ static int bnxt_grxfh(struct bnxt bp, struct ethtool_rxnfc cmd) · 260 unmodified lines
1073	1066	if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV4)
1074	1067	cmd->data \|= RXH_IP_SRC \| RXH_IP_DST \|
1075	1068	RXH_L4_B_0_1 \| RXH_L4_B_2_3;
1076		− /* fall through */
	1069	+ fallthrough;
1077	1070	case SCTP_V4_FLOW:
1078	1071	case AH_ESP_V4_FLOW:
1079	1072	case AH_V4_FLOW:
@@ -1092,7 +1085,7 @@ static int bnxt_grxfh(struct bnxt bp, struct ethtool_rxnfc cmd) · 12 unmodified lines
1092	1085	if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV6)
1093	1086	cmd->data \|= RXH_IP_SRC \| RXH_IP_DST \|
1094	1087	RXH_L4_B_0_1 \| RXH_L4_B_2_3;
1095		− /* fall through */
	1088	+ fallthrough;
1096	1089	case SCTP_V6_FLOW:
1097	1090	case AH_ESP_V6_FLOW:
1098	1091	case AH_V6_FLOW:
@@ -2323,6 +2316,9 @@ static int bnxt_get_nvram_directory(struct net_device dev, u32 len, u8 data) · 1224 unmodified lines
2323	2316	if (rc != 0)
2324	2317	return rc;
2325	2318
	2319	+ if (!dir_entries \|\| !entry_length)
	2320	+ return -EIO;
	2321	+
2326	2322	/* Insert 2 bytes of directory info (count and size of entries) */
2327	2323	if (len < 2)
2328	2324	return -EINVAL;

drivers/net/ethernet/broadcom/bnxt/bnxt_xdp.c+2−2

@@ -201,10 +201,10 @@ bool bnxt_rx_xdp(struct bnxt bp, struct bnxt_rx_ring_info rxr, u16 cons, · 200 unmodified lines
201	201	break;
202	202	default:
203	203	bpf_warn_invalid_xdp_action(act);
204		− /* Fall thru */
	204	+ fallthrough;
205	205	case XDP_ABORTED:
206	206	trace_xdp_exception(bp->dev, xdp_prog, act);
207		− /* Fall thru */
	207	+ fallthrough;
208	208	case XDP_DROP:
209	209	bnxt_reuse_rx_data(rxr, cons, page);
210	210	break;

drivers/net/ethernet/broadcom/cnic.c+2−2

@@ -3311,7 +3311,7 @@ static int cnic_ctl(void data, struct cnic_ctl_info info) · 3310 unmodified lines
3311	3311	}
3312	3312	case CNIC_CTL_FCOE_STATS_GET_CMD:
3313	3313	ulp_type = CNIC_ULP_FCOE;
3314		− /* fall through */
	3314	+ fallthrough;
3315	3315	case CNIC_CTL_ISCSI_STATS_GET_CMD:
3316	3316	cnic_hold(dev);
3317	3317	cnic_copy_ulp_stats(dev, ulp_type);
@@ -4044,7 +4044,7 @@ static void cnic_cm_process_kcqe(struct cnic_dev dev, struct kcqe kcqe) · 726 unmodified lines
4044	4044	l4kcqe->status, l5kcqe->completion_status);
4045	4045	opcode = L4_KCQE_OPCODE_VALUE_CLOSE_COMP;
4046	4046	}
4047		− /* Fall through */
	4047	+ fallthrough;
4048	4048	case L4_KCQE_OPCODE_VALUE_RESET_RECEIVED:
4049	4049	case L4_KCQE_OPCODE_VALUE_CLOSE_COMP:
4050	4050	case L4_KCQE_OPCODE_VALUE_RESET_COMP:

drivers/net/ethernet/broadcom/genet/bcmgenet.c+3−3

@@ -1185,10 +1185,10 @@ static void bcmgenet_update_mib_counters(struct bcmgenet_priv *priv) · 1184 unmodified lines
1185	1185	continue;
1186	1186	case BCMGENET_STAT_RUNT:
1187	1187	offset += BCMGENET_STAT_OFFSET;
1188		− /* fall through */
	1188	+ fallthrough;
1189	1189	case BCMGENET_STAT_MIB_TX:
1190	1190	offset += BCMGENET_STAT_OFFSET;
1191		− /* fall through */
	1191	+ fallthrough;
1192	1192	case BCMGENET_STAT_MIB_RX:
1193	1193	val = bcmgenet_umac_readl(priv,
1194	1194	UMAC_MIB_START + j + offset);
@@ -1364,7 +1364,7 @@ static int bcmgenet_validate_flow(struct net_device *dev, · 169 unmodified lines
1364	1364	case ETHER_FLOW:
1365	1365	eth_mask = &cmd->fs.m_u.ether_spec;
1366	1366	/* don't allow mask which isn't valid */
1367		− if (VALIDATE_MASK(eth_mask->h_source) \|\|
	1367	+ if (VALIDATE_MASK(eth_mask->h_dest) \|\|
1368	1368	VALIDATE_MASK(eth_mask->h_source) \|\|
1369	1369	VALIDATE_MASK(eth_mask->h_proto)) {
1370	1370	netdev_err(dev, "rxnfc: Unsupported mask\n");

drivers/net/ethernet/broadcom/genet/bcmmii.c+1−1

@@ -192,7 +192,7 @@ int bcmgenet_mii_config(struct net_device *dev, bool init) · 191 unmodified lines
192	192	switch (priv->phy_interface) {
193	193	case PHY_INTERFACE_MODE_INTERNAL:
194	194	phy_name = "internal PHY";
195		− /* fall through */
	195	+ fallthrough;
196	196	case PHY_INTERFACE_MODE_MOCA:
197	197	/* Irrespective of the actually configured PHY speed (100 or
198	198	* 1000) GENETv4 only has an internal GPHY so we will just end

drivers/net/ethernet/broadcom/tg3.c+40−31

@@ -715,7 +715,7 @@ static int tg3_ape_lock(struct tg3 *tp, int locknum) · 714 unmodified lines
715	715	case TG3_APE_LOCK_GPIO:
716	716	if (tg3_asic_rev(tp) == ASIC_REV_5761)
717	717	return 0;
718		− /* fall through */
	718	+ fallthrough;
719	719	case TG3_APE_LOCK_GRC:
720	720	case TG3_APE_LOCK_MEM:
721	721	if (!tp->pci_fn)
@@ -776,7 +776,7 @@ static void tg3_ape_unlock(struct tg3 *tp, int locknum) · 54 unmodified lines
776	776	case TG3_APE_LOCK_GPIO:
777	777	if (tg3_asic_rev(tp) == ASIC_REV_5761)
778	778	return;
779		− /* fall through */
	779	+ fallthrough;
780	780	case TG3_APE_LOCK_GRC:
781	781	case TG3_APE_LOCK_MEM:
782	782	if (!tp->pci_fn)
@@ -1586,7 +1586,7 @@ static int tg3_mdio_init(struct tg3 *tp) · 803 unmodified lines
1586	1586	phydev->dev_flags \|= PHY_BRCM_EXT_IBND_RX_ENABLE;
1587	1587	if (tg3_flag(tp, RGMII_EXT_IBND_TX_EN))
1588	1588	phydev->dev_flags \|= PHY_BRCM_EXT_IBND_TX_ENABLE;
1589		− /* fall through */
	1589	+ fallthrough;
1590	1590	case PHY_ID_RTL8211C:
1591	1591	phydev->interface = PHY_INTERFACE_MODE_RGMII;
1592	1592	break;
@@ -2114,7 +2114,7 @@ static int tg3_phy_init(struct tg3 *tp) · 521 unmodified lines
2114	2114	phy_support_asym_pause(phydev);
2115	2115	break;
2116	2116	}
2117		− /* fall through */
	2117	+ fallthrough;
2118	2118	case PHY_INTERFACE_MODE_MII:
2119	2119	phy_set_max_speed(phydev, SPEED_100);
2120	2120	phy_support_asym_pause(phydev);
@@ -4390,7 +4390,7 @@ static int tg3_phy_autoneg_cfg(struct tg3 *tp, u32 advertise, u32 flowctrl) · 2269 unmodified lines
4390	4390	MII_TG3_DSP_TAP26_RMRXSTO \|
4391	4391	MII_TG3_DSP_TAP26_OPCSINPT;
4392	4392	tg3_phydsp_write(tp, MII_TG3_DSP_TAP26, val);
4393		− /* Fall through */
	4393	+ fallthrough;
4394	4394	case ASIC_REV_5720:
4395	4395	case ASIC_REV_5762:
4396	4396	if (!tg3_phydsp_read(tp, MII_TG3_DSP_CH34TP2, &val))
@@ -4538,7 +4538,7 @@ static int tg3_phy_pull_config(struct tg3 *tp) · 141 unmodified lines
4538	4538	tp->link_config.speed = SPEED_1000;
4539	4539	break;
4540	4540	}
4541		− /* Fall through */
	4541	+ fallthrough;
4542	4542	default:
4543	4543	goto done;
4544	4544	}
@@ -5209,7 +5209,7 @@ static int tg3_fiber_aneg_smachine(struct tg3 *tp, · 664 unmodified lines
5209	5209	if (ap->flags & (MR_AN_ENABLE \| MR_RESTART_AN))
5210	5210	ap->state = ANEG_STATE_AN_ENABLE;
5211	5211
5212		− /* fall through */
	5212	+ fallthrough;
5213	5213	case ANEG_STATE_AN_ENABLE:
5214	5214	ap->flags &= ~(MR_AN_COMPLETE \| MR_PAGE_RX);
5215	5215	if (ap->flags & MR_AN_ENABLE) {
@@ -5239,7 +5239,7 @@ static int tg3_fiber_aneg_smachine(struct tg3 *tp, · 23 unmodified lines
5239	5239	ret = ANEG_TIMER_ENAB;
5240	5240	ap->state = ANEG_STATE_RESTART;
5241	5241
5242		− /* fall through */
	5242	+ fallthrough;
5243	5243	case ANEG_STATE_RESTART:
5244	5244	delta = ap->cur_time - ap->link_time;
5245	5245	if (delta > ANEG_STATE_SETTLE_TIME)
@@ -5282,7 +5282,7 @@ static int tg3_fiber_aneg_smachine(struct tg3 *tp, · 36 unmodified lines
5282	5282
5283	5283	ap->state = ANEG_STATE_ACK_DETECT;
5284	5284
5285		− /* fall through */
	5285	+ fallthrough;
5286	5286	case ANEG_STATE_ACK_DETECT:
5287	5287	if (ap->ack_match != 0) {
5288	5288	if ((ap->rxconfig & ~ANEG_CFG_ACK) ==
@@ -7221,8 +7221,8 @@ static inline void tg3_reset_task_schedule(struct tg3 *tp) · 1932 unmodified lines
7221	7221
7222	7222	static inline void tg3_reset_task_cancel(struct tg3 *tp)
7223	7223	{
7224		− cancel_work_sync(&tp->reset_task);
7225		− tg3_flag_clear(tp, RESET_TASK_PENDING);
	7224	+ if (test_and_clear_bit(TG3_FLAG_RESET_TASK_PENDING, tp->tg3_flags))
	7225	+ cancel_work_sync(&tp->reset_task);
7226	7226	tg3_flag_clear(tp, TX_RECOVERY_PENDING);
7227	7227	}
7228	7228
@@ -10720,40 +10720,40 @@ static int tg3_reset_hw(struct tg3 *tp, bool reset_phy) · 3491 unmodified lines
10720	10720	switch (limit) {
10721	10721	case 16:
10722	10722	tw32(MAC_RCV_RULE_15, 0); tw32(MAC_RCV_VALUE_15, 0);
10723		− /* fall through */
	10723	+ fallthrough;
10724	10724	case 15:
10725	10725	tw32(MAC_RCV_RULE_14, 0); tw32(MAC_RCV_VALUE_14, 0);
10726		− /* fall through */
	10726	+ fallthrough;
10727	10727	case 14:
10728	10728	tw32(MAC_RCV_RULE_13, 0); tw32(MAC_RCV_VALUE_13, 0);
10729		− /* fall through */
	10729	+ fallthrough;
10730	10730	case 13:
10731	10731	tw32(MAC_RCV_RULE_12, 0); tw32(MAC_RCV_VALUE_12, 0);
10732		− /* fall through */
	10732	+ fallthrough;
10733	10733	case 12:
10734	10734	tw32(MAC_RCV_RULE_11, 0); tw32(MAC_RCV_VALUE_11, 0);
10735		− /* fall through */
	10735	+ fallthrough;
10736	10736	case 11:
10737	10737	tw32(MAC_RCV_RULE_10, 0); tw32(MAC_RCV_VALUE_10, 0);
10738		− /* fall through */
	10738	+ fallthrough;
10739	10739	case 10:
10740	10740	tw32(MAC_RCV_RULE_9, 0); tw32(MAC_RCV_VALUE_9, 0);
10741		− /* fall through */
	10741	+ fallthrough;
10742	10742	case 9:
10743	10743	tw32(MAC_RCV_RULE_8, 0); tw32(MAC_RCV_VALUE_8, 0);
10744		− /* fall through */
	10744	+ fallthrough;
10745	10745	case 8:
10746	10746	tw32(MAC_RCV_RULE_7, 0); tw32(MAC_RCV_VALUE_7, 0);
10747		− /* fall through */
	10747	+ fallthrough;
10748	10748	case 7:
10749	10749	tw32(MAC_RCV_RULE_6, 0); tw32(MAC_RCV_VALUE_6, 0);
10750		− /* fall through */
	10750	+ fallthrough;
10751	10751	case 6:
10752	10752	tw32(MAC_RCV_RULE_5, 0); tw32(MAC_RCV_VALUE_5, 0);
10753		− /* fall through */
	10753	+ fallthrough;
10754	10754	case 5:
10755	10755	tw32(MAC_RCV_RULE_4, 0); tw32(MAC_RCV_VALUE_4, 0);
10756		− /* fall through */
	10756	+ fallthrough;
10757	10757	case 4:
10758	10758	/* tw32(MAC_RCV_RULE_3, 0); tw32(MAC_RCV_VALUE_3, 0); */
10759	10759	case 3:
@@ -11209,18 +11209,27 @@ static void tg3_reset_task(struct work_struct *work) · 449 unmodified lines
11209	11209
11210	11210	tg3_halt(tp, RESET_KIND_SHUTDOWN, 0);
11211	11211	err = tg3_init_hw(tp, true);
11212		− if (err)
	11212	+ if (err) {
	11213	+ tg3_full_unlock(tp);
	11214	+ tp->irq_sync = 0;
	11215	+ tg3_napi_enable(tp);
	11216	+ /* Clear this flag so that tg3_reset_task_cancel() will not
	11217	+ * call cancel_work_sync() and wait forever.
	11218	+ */
	11219	+ tg3_flag_clear(tp, RESET_TASK_PENDING);
	11220	+ dev_close(tp->dev);
11213	11221	goto out;
	11222	+ }
11214	11223
11215	11224	tg3_netif_start(tp);
11216	11225
11217		−out:
11218	11226	tg3_full_unlock(tp);
11219	11227
11220	11228	if (!err)
11221	11229	tg3_phy_start(tp);
11222	11230
11223	11231	tg3_flag_clear(tp, RESET_TASK_PENDING);
	11232	+out:
11224	11233	rtnl_unlock();
11225	11234	}
11226	11235
@@ -13998,7 +14007,7 @@ static int tg3_ioctl(struct net_device dev, struct ifreq ifr, int cmd) · 2771 unmodified lines
13998	14007	case SIOCGMIIPHY:
13999	14008	data->phy_id = tp->phy_addr;
14000	14009
14001		− /* fall through */
	14010	+ fallthrough;
14002	14011	case SIOCGMIIREG: {
14003	14012	u32 mii_regval;
14004	14013
@@ -17136,7 +17145,7 @@ static u32 tg3_calc_dma_bndry(struct tg3 *tp, u32 val) · 3131 unmodified lines
17136	17145	val \|= DMA_RWCTRL_WRITE_BNDRY_64_PCIE;
17137	17146	break;
17138	17147	}
17139		− /* fallthrough */
	17148	+ fallthrough;
17140	17149	case 128:
17141	17150	default:
17142	17151	val &= ~DMA_RWCTRL_WRITE_BNDRY_DISAB_PCIE;
@@ -17151,28 +17160,28 @@ static u32 tg3_calc_dma_bndry(struct tg3 *tp, u32 val) · 8 unmodified lines
17151	17160	DMA_RWCTRL_WRITE_BNDRY_16);
17152	17161	break;
17153	17162	}
17154		− /* fallthrough */
	17163	+ fallthrough;
17155	17164	case 32:
17156	17165	if (goal == BOUNDARY_SINGLE_CACHELINE) {
17157	17166	val \|= (DMA_RWCTRL_READ_BNDRY_32 \|
17158	17167	DMA_RWCTRL_WRITE_BNDRY_32);
17159	17168	break;
17160	17169	}
17161		− /* fallthrough */
	17170	+ fallthrough;
17162	17171	case 64:
17163	17172	if (goal == BOUNDARY_SINGLE_CACHELINE) {
17164	17173	val \|= (DMA_RWCTRL_READ_BNDRY_64 \|
17165	17174	DMA_RWCTRL_WRITE_BNDRY_64);
17166	17175	break;
17167	17176	}
17168		− /* fallthrough */
	17177	+ fallthrough;
17169	17178	case 128:
17170	17179	if (goal == BOUNDARY_SINGLE_CACHELINE) {
17171	17180	val \|= (DMA_RWCTRL_READ_BNDRY_128 \|
17172	17181	DMA_RWCTRL_WRITE_BNDRY_128);
17173	17182	break;
17174	17183	}
17175		− /* fallthrough */
	17184	+ fallthrough;
17176	17185	case 256:
17177	17186	val \|= (DMA_RWCTRL_READ_BNDRY_256 \|
17178	17187	DMA_RWCTRL_WRITE_BNDRY_256);

drivers/net/ethernet/brocade/bna/bfa_ioc.c+3−3

@@ -321,7 +321,7 @@ bfa_ioc_sm_getattr(struct bfa_ioc *ioc, enum ioc_event event) · 320 unmodified lines
321	321	case IOC_E_PFFAILED:
322	322	case IOC_E_HWERROR:
323	323	del_timer(&ioc->ioc_timer);
324		− /* fall through */
	324	+ fallthrough;
325	325	case IOC_E_TIMEOUT:
326	326	ioc->cbfn->enable_cbfn(ioc->bfa, BFA_STATUS_IOC_FAILURE);
327	327	bfa_fsm_set_state(ioc, bfa_ioc_sm_fail);
@@ -780,7 +780,7 @@ bfa_iocpf_sm_enabling(struct bfa_iocpf *iocpf, enum iocpf_event event) · 452 unmodified lines
780	780
781	781	case IOCPF_E_INITFAIL:
782	782	del_timer(&ioc->iocpf_timer);
783		− /* fall through */
	783	+ fallthrough;
784	784
785	785	case IOCPF_E_TIMEOUT:
786	786	bfa_nw_ioc_hw_sem_release(ioc);
@@ -849,7 +849,7 @@ bfa_iocpf_sm_disabling(struct bfa_iocpf *iocpf, enum iocpf_event event) · 62 unmodified lines
849	849
850	850	case IOCPF_E_FAIL:
851	851	del_timer(&ioc->iocpf_timer);
852		− /* fall through*/
	852	+ fallthrough;
853	853
854	854	case IOCPF_E_TIMEOUT:
855	855	bfa_ioc_set_cur_ioc_fwstate(ioc, BFI_IOC_FAIL);

drivers/net/ethernet/brocade/bna/bna_enet.c+1−1

@@ -1084,7 +1084,7 @@ bna_enet_sm_cfg_wait(struct bna_enet *enet, · 1083 unmodified lines
1084	1084
1085	1085	case ENET_E_CHLD_STOPPED:
1086	1086	bna_enet_rx_start(enet);
1087		− /* Fall through */
	1087	+ fallthrough;
1088	1088	case ENET_E_FWRESP_PAUSE:
1089	1089	if (enet->flags & BNA_ENET_F_PAUSE_CHANGED) {
1090	1090	enet->flags &= ~BNA_ENET_F_PAUSE_CHANGED;

drivers/net/ethernet/brocade/bna/bna_tx_rx.c+1−1

@@ -1636,7 +1636,7 @@ bna_bfi_rx_enet_start(struct bna_rx *rx) · 1635 unmodified lines
1636	1636	&q1->qpt);
1637	1637	cfg_req->q_cfg[i].qs.rx_buffer_size =
1638	1638	htons((u16)q1->buffer_size);
1639		− /* Fall through */
	1639	+ fallthrough;
1640	1640
1641	1641	case BNA_RXP_SINGLE:
1642	1642	/* Large/Single RxQ */

drivers/net/ethernet/cadence/macb_ptp.c+1−1

@@ -460,7 +460,7 @@ int gem_set_hwtst(struct net_device dev, struct ifreq ifr, int cmd) · 459 unmodified lines
460	460	case HWTSTAMP_TX_ONESTEP_SYNC:
461	461	if (gem_ptp_set_one_step_sync(bp, 1) != 0)
462	462	return -ERANGE;
463		− /* fall through */
	463	+ fallthrough;
464	464	case HWTSTAMP_TX_ON:
465	465	tx_bd_control = TSTAMP_ALL_FRAMES;
466	466	break;

drivers/net/ethernet/cavium/liquidio/lio_main.c+14−15

@@ -977,15 +977,14 @@ static void octeon_destroy_resources(struct octeon_device *oct) · 976 unmodified lines
977	977
978	978	schedule_timeout_uninterruptible(HZ / 10);
979	979
980		− /* fallthrough */
	980	+ fallthrough;
981	981	case OCT_DEV_HOST_OK:
982	982
983		− /* fallthrough */
984	983	case OCT_DEV_CONSOLE_INIT_DONE:
985	984	/* Remove any consoles */
986	985	octeon_remove_consoles(oct);
987	986
988		− /* fallthrough */
	987	+ fallthrough;
989	988	case OCT_DEV_IO_QUEUES_DONE:
990	989	if (lio_wait_for_instr_fetch(oct))
991	990	dev_err(&oct->pci_dev->dev, "IQ had pending instructions\n");
@@ -1027,7 +1026,7 @@ static void octeon_destroy_resources(struct octeon_device *oct) · 35 unmodified lines
1027	1026	octeon_free_sc_done_list(oct);
1028	1027	octeon_free_sc_zombie_list(oct);
1029	1028
1030		− /* fallthrough */
	1029	+ fallthrough;
1031	1030	case OCT_DEV_INTR_SET_DONE:
1032	1031	/* Disable interrupts */
1033	1032	oct->fn_list.disable_interrupt(oct, OCTEON_ALL_INTR);
@@ -1062,17 +1061,17 @@ static void octeon_destroy_resources(struct octeon_device *oct) · 28 unmodified lines
1062	1061	kfree(oct->irq_name_storage);
1063	1062	oct->irq_name_storage = NULL;
1064	1063
1065		− /* fallthrough */
	1064	+ fallthrough;
1066	1065	case OCT_DEV_MSIX_ALLOC_VECTOR_DONE:
1067	1066	if (OCTEON_CN23XX_PF(oct))
1068	1067	octeon_free_ioq_vector(oct);
1069	1068
1070		− /* fallthrough */
	1069	+ fallthrough;
1071	1070	case OCT_DEV_MBOX_SETUP_DONE:
1072	1071	if (OCTEON_CN23XX_PF(oct))
1073	1072	oct->fn_list.free_mbox(oct);
1074	1073
1075		− /* fallthrough */
	1074	+ fallthrough;
1076	1075	case OCT_DEV_IN_RESET:
1077	1076	case OCT_DEV_DROQ_INIT_DONE:
1078	1077	/* Wait for any pending operations */
@@ -1095,11 +1094,11 @@ static void octeon_destroy_resources(struct octeon_device *oct) · 16 unmodified lines
1095	1094	}
1096	1095	}
1097	1096
1098		− /* fallthrough */
	1097	+ fallthrough;
1099	1098	case OCT_DEV_RESP_LIST_INIT_DONE:
1100	1099	octeon_delete_response_list(oct);
1101	1100
1102		− /* fallthrough */
	1101	+ fallthrough;
1103	1102	case OCT_DEV_INSTR_QUEUE_INIT_DONE:
1104	1103	for (i = 0; i < MAX_OCTEON_INSTR_QUEUES(oct); i++) {
1105	1104	if (!(oct->io_qmask.iq & BIT_ULL(i)))
@@ -1110,16 +1109,16 @@ static void octeon_destroy_resources(struct octeon_device *oct) · 4 unmodified lines
1110	1109	if (oct->sriov_info.sriov_enabled)
1111	1110	pci_disable_sriov(oct->pci_dev);
1112	1111	#endif
1113		− /* fallthrough */
	1112	+ fallthrough;
1114	1113	case OCT_DEV_SC_BUFF_POOL_INIT_DONE:
1115	1114	octeon_free_sc_buffer_pool(oct);
1116	1115
1117		− /* fallthrough */
	1116	+ fallthrough;
1118	1117	case OCT_DEV_DISPATCH_INIT_DONE:
1119	1118	octeon_delete_dispatch_list(oct);
1120	1119	cancel_delayed_work_sync(&oct->nic_poll_work.work);
1121	1120
1122		− /* fallthrough */
	1121	+ fallthrough;
1123	1122	case OCT_DEV_PCI_MAP_DONE:
1124	1123	refcount = octeon_deregister_device(oct);
1125	1124
@@ -1137,13 +1136,13 @@ static void octeon_destroy_resources(struct octeon_device *oct) · 11 unmodified lines
1137	1136	octeon_unmap_pci_barx(oct, 0);
1138	1137	octeon_unmap_pci_barx(oct, 1);
1139	1138
1140		− /* fallthrough */
	1139	+ fallthrough;
1141	1140	case OCT_DEV_PCI_ENABLE_DONE:
1142	1141	pci_clear_master(oct->pci_dev);
1143	1142	/* Disable the device, releasing the PCI INT */
1144	1143	pci_disable_device(oct->pci_dev);
1145	1144
1146		− /* fallthrough */
	1145	+ fallthrough;
1147	1146	case OCT_DEV_BEGIN_STATE:
1148	1147	/* Nothing to be done here either */
1149	1148	break;
@@ -2168,7 +2167,7 @@ static int liquidio_ioctl(struct net_device netdev, struct ifreq ifr, int cmd) · 1018 unmodified lines
2168	2167	case SIOCSHWTSTAMP:
2169	2168	if (lio->oct_dev->ptp_enable)
2170	2169	return hwtstamp_ioctl(netdev, ifr);
2171		− /* fall through */
	2170	+ fallthrough;
2172	2171	default:
2173	2172	return -EOPNOTSUPP;
2174	2173	}

drivers/net/ethernet/cavium/liquidio/lio_vf_main.c+12−13

@@ -460,9 +460,8 @@ static void octeon_destroy_resources(struct octeon_device *oct) · 459 unmodified lines
460	460
461	461	schedule_timeout_uninterruptible(HZ / 10);
462	462
463		− /* fallthrough */
	463	+ fallthrough;
464	464	case OCT_DEV_HOST_OK:
465		− /* fallthrough */
466	465	case OCT_DEV_IO_QUEUES_DONE:
467	466	if (lio_wait_for_instr_fetch(oct))
468	467	dev_err(&oct->pci_dev->dev, "IQ had pending instructions\n");
@@ -504,7 +503,7 @@ static void octeon_destroy_resources(struct octeon_device *oct) · 35 unmodified lines
504	503	octeon_free_sc_done_list(oct);
505	504	octeon_free_sc_zombie_list(oct);
506	505
507		− /* fall through */
	506	+ fallthrough;
508	507	case OCT_DEV_INTR_SET_DONE:
509	508	/* Disable interrupts */
510	509	oct->fn_list.disable_interrupt(oct, OCTEON_ALL_INTR);
@@ -533,15 +532,15 @@ static void octeon_destroy_resources(struct octeon_device *oct) · 22 unmodified lines
533	532	else
534	533	cn23xx_vf_ask_pf_to_do_flr(oct);
535	534
536		− /* fallthrough */
	535	+ fallthrough;
537	536	case OCT_DEV_MSIX_ALLOC_VECTOR_DONE:
538	537	octeon_free_ioq_vector(oct);
539	538
540		− /* fallthrough */
	539	+ fallthrough;
541	540	case OCT_DEV_MBOX_SETUP_DONE:
542	541	oct->fn_list.free_mbox(oct);
543	542
544		− /* fallthrough */

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drivers/net/ethernet/cavium/thunder/nicvf_ethtool.c+1−1

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drivers/net/ethernet/cavium/thunder/nicvf_main.c+2−2

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drivers/net/ethernet/chelsio/cxgb3/cxgb3_main.c+1−1

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drivers/net/ethernet/chelsio/cxgb3/l2t.c+1−1

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drivers/net/ethernet/chelsio/cxgb4/cxgb4_thermal.c+6−2

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drivers/net/ethernet/chelsio/cxgb4/l2t.c+1−1

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drivers/net/ethernet/chelsio/cxgb4/t4_hw.c+3−3

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drivers/net/ethernet/chelsio/cxgb4vf/cxgb4vf_main.c+1−1

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drivers/net/ethernet/cisco/enic/enic_main.c+1−1

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drivers/net/ethernet/cortina/gemini.c+17−17

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drivers/net/ethernet/davicom/dm9000.c+1−1

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drivers/net/ethernet/dec/tulip/de4x5.c+3−3

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drivers/net/ethernet/dec/tulip/tulip_core.c+1−1

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drivers/net/ethernet/dec/tulip/winbond-840.c+1−1

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drivers/net/ethernet/emulex/benet/be_ethtool.c+1−1

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drivers/net/ethernet/freescale/dpaa/dpaa_eth.c+1−1

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drivers/net/ethernet/freescale/dpaa/dpaa_ethtool.c+1−1

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drivers/net/ethernet/freescale/dpaa2/dpaa2-eth.c+2−2

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drivers/net/ethernet/freescale/fman/fman_memac.c+1−1

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drivers/net/ethernet/freescale/fman/fman_port.c+2−2

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drivers/net/ethernet/freescale/ucc_geth.c+1−1

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drivers/net/ethernet/hisilicon/hns/hns_enet.c+6−3

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drivers/net/ethernet/hisilicon/hns/hns_ethtool.c+1−1

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drivers/net/ethernet/hisilicon/hns3/hns3_enet.c+5−3

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drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c+1−3

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drivers/net/ethernet/ibm/ehea/ehea_main.c+1−1

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drivers/net/ethernet/ibm/emac/core.c+1−1

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drivers/net/ethernet/ibm/ibmvnic.c+14−1

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drivers/net/ethernet/intel/e1000e/netdev.c+0−1

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drivers/net/ethernet/intel/igb/igb_main.c+0−1

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drivers/net/ethernet/marvell/mvneta.c+2−2

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drivers/net/ethernet/marvell/mvpp2/mvpp2_cls.c+1−1

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drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c+2−2

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drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c+1−1

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drivers/net/ethernet/marvell/skge.c+1−1

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drivers/net/ethernet/marvell/sky2.c+2−2

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drivers/net/ethernet/mediatek/mtk_eth_soc.c+3−3

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drivers/net/ethernet/mellanox/mlx4/mr.c+1−1

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drivers/net/ethernet/mellanox/mlxfw/mlxfw_fsm.c+2−2

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drivers/net/ethernet/mellanox/mlxsw/core.c+9−9

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drivers/net/ethernet/mellanox/mlxsw/core_env.c+3−3

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drivers/net/ethernet/mellanox/mlxsw/core_hwmon.c+2−2

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drivers/net/ethernet/mellanox/mlxsw/spectrum.c+2−2

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drivers/net/ethernet/mellanox/mlxsw/spectrum.h+5−5

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drivers/net/ethernet/mellanox/mlxsw/spectrum_router.c+16−16

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drivers/net/ethernet/mellanox/mlxsw/spectrum_span.c+3−3

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drivers/net/ethernet/mellanox/mlxsw/spectrum_switchdev.c+6−6

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drivers/net/ethernet/microchip/lan743x_ethtool.c+1−1

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drivers/net/ethernet/mscc/ocelot.c+1−1

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drivers/net/ethernet/natsemi/natsemi.c+1−1

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drivers/net/ethernet/neterion/vxge/vxge-config.c+3−3

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drivers/net/ethernet/netronome/nfp/crypto/tls.c+1−1

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drivers/net/ethernet/netronome/nfp/flower/action.c+1−1

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drivers/net/ethernet/netronome/nfp/flower/cmsg.c+1−1

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drivers/net/ethernet/netronome/nfp/flower/offload.c+1−1

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drivers/net/ethernet/netronome/nfp/flower/tunnel_conf.c+2−0

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drivers/net/ethernet/netronome/nfp/nfp_asm.c+1−1

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drivers/net/ethernet/netronome/nfp/nfp_net_common.c+2−2

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drivers/net/ethernet/netronome/nfp/nfpcore/nfp6000_pcie.c+2−2

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drivers/net/ethernet/netronome/nfp/nfpcore/nfp_rtsym.c+1−1

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drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_param.c+1−1

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drivers/net/ethernet/packetengines/yellowfin.c+1−1

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drivers/net/ethernet/pensando/ionic/ionic_txrx.c+3−10

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drivers/net/ethernet/qlogic/netxen/netxen_nic_ethtool.c+2−2

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drivers/net/ethernet/qlogic/qed/qed_cxt.c+1−1

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drivers/net/ethernet/qlogic/qed/qed_dev.c+2−2

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drivers/net/ethernet/qlogic/qed/qed_main.c+2−2

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drivers/net/ethernet/qlogic/qed/qed_mcp.c+5−5

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drivers/net/ethernet/qlogic/qla3xxx.c+1−1

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drivers/net/ethernet/qlogic/qlcnic/qlcnic_ethtool.c+2−2

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drivers/net/ethernet/realtek/r8169_main.c+2−2

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drivers/net/ethernet/renesas/ravb_main.c+55−55

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drivers/net/ethernet/rocker/rocker_main.c+4−4

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drivers/net/ethernet/samsung/sxgbe/sxgbe_ethtool.c+2−2

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drivers/net/ethernet/sfc/ef100_rx.c+4−4

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drivers/net/ethernet/sfc/falcon/ethtool.c+1−1

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drivers/net/ethernet/sfc/falcon/farch.c+7−7

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drivers/net/ethernet/sfc/farch.c+7−7

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drivers/net/ethernet/sfc/mcdi_filters.c+1−1

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drivers/net/ethernet/sfc/mcdi_port_common.c+1−1

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drivers/net/ethernet/sfc/rx.c+1−1

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drivers/net/ethernet/sis/sis900.c+1−1

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drivers/net/ethernet/smsc/smc911x.c+1−1

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drivers/net/ethernet/socionext/netsec.c+2−2

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drivers/net/ethernet/stmicro/stmmac/dwmac-anarion.c+4−3

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drivers/net/ethernet/stmicro/stmmac/stmmac_selftests.c+2−2

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drivers/net/ethernet/stmicro/stmmac/stmmac_tc.c+1−1

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drivers/net/ethernet/sun/cassini.c+1−1

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drivers/net/ethernet/sun/niu.c+2−2

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drivers/net/ethernet/sun/sungem.c+1−1

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drivers/net/ethernet/ti/am65-cpsw-nuss.c+2−0

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drivers/net/ethernet/ti/cpsw-phy-sel.c+2−2

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drivers/net/ethernet/ti/cpsw.c+1−1

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drivers/net/ethernet/ti/cpsw_new.c+22−7

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drivers/net/ethernet/ti/cpsw_priv.c+2−2

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drivers/net/ethernet/ti/tlan.c+1−1

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drivers/net/ethernet/toshiba/ps3_gelic_wireless.c+1−1

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drivers/net/ethernet/toshiba/spider_net.c+14−14

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drivers/net/ethernet/xircom/xirc2ps_cs.c+1−1

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drivers/net/fddi/skfp/pcmplc.c+2−2

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drivers/net/fjes/fjes_main.c+1−1

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drivers/net/gtp.c+1−0

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drivers/net/hamradio/baycom_epp.c+1−1

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drivers/net/hamradio/mkiss.c+2−3

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drivers/net/macvlan.c+1−1

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drivers/net/mii.c+1−1

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drivers/net/netdevsim/bus.c+1−1

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drivers/net/netdevsim/fib.c+3−3

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drivers/net/phy/adin.c+2−2

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drivers/net/phy/dp83640.c+4−4

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drivers/net/phy/dp83867.c+2−2

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drivers/net/phy/dp83869.c+6−6

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drivers/net/phy/fixed_phy.c+2−2

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drivers/net/phy/phy.c+2−2

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drivers/net/phy/phy_device.c+1−1

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drivers/net/phy/phylink.c+2−2

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drivers/net/phy/sfp-bus.c+2−2

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drivers/net/phy/sfp.c+6−6

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drivers/net/plip/plip.c+13−13

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drivers/net/tun.c+3−3

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drivers/net/usb/Kconfig+1−0

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drivers/net/usb/aqc111.c+3−3

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drivers/net/usb/asix_common.c+1−1

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drivers/net/usb/catc.c+1−1

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drivers/net/usb/cdc-phonet.c+1−1

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drivers/net/usb/dm9601.c+4−0

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drivers/net/usb/lan78xx.c+2−2

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drivers/net/usb/pegasus.c+2−2

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drivers/net/usb/r8152.c+3−3

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drivers/net/usb/rtl8150.c+1−1

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drivers/net/usb/usbnet.c+3−3

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drivers/net/veth.c+4−4

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drivers/net/virtio_net.c+3−3

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drivers/net/vmxnet3/vmxnet3_ethtool.c+1−1

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drivers/net/wan/hdlc.c+1−1

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drivers/net/wan/hdlc_cisco.c+1−0

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drivers/net/wan/lapbether.c+4−1

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drivers/net/wan/sdla.c+1−1

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drivers/net/wan/x25_asy.c+1−1

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drivers/net/wimax/i2400m/control.c+1−1

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drivers/net/wimax/i2400m/usb-fw.c+1−1

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drivers/net/wimax/i2400m/usb-tx.c+1−1

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drivers/net/wimax/i2400m/usb.c+1−1

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drivers/net/xen-netback/hash.c+1−1

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drivers/net/xen-netback/xenbus.c+1−1

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drivers/net/xen-netfront.c+1−1

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drivers/nfc/pn533/pn533.c+2−2

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drivers/nfc/st21nfca/dep.c+1−1

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drivers/nfc/st95hf/core.c+1−1

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drivers/nfc/trf7970a.c+2−2

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drivers/ntb/ntb_transport.c+2−2

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drivers/nvdimm/dimm_devs.c+1−0

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drivers/nvme/host/core.c+104−48

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drivers/nvme/host/fabrics.c+0−1

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drivers/nvme/host/fc.c+3−3

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drivers/nvme/host/multipath.c+26−43

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drivers/nvme/host/nvme.h+28−5

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drivers/nvme/host/pci.c+12−11

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drivers/nvme/host/rdma.c+53−19

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drivers/nvme/host/tcp.c+59−26

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drivers/nvme/target/configfs.c+1−0

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drivers/nvme/target/core.c+7−1

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drivers/nvme/target/fc.c+2−2

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drivers/nvme/target/fcloop.c+1−1

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drivers/nvme/target/io-cmd-bdev.c+0−1

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drivers/nvme/target/loop.c+1−1

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drivers/nvme/target/passthru.c+17−8

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drivers/nvme/target/rdma.c+2−2

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drivers/nvme/target/tcp.c+9−1

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drivers/opp/core.c+16−6

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drivers/opp/opp.h+1−1

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drivers/parport/ieee1284.c+3−3

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drivers/parport/parport_pc.c+1−1

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drivers/pci/controller/dwc/pci-imx6.c+3−3

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drivers/pci/controller/pci-rcar-gen2.c+1−1

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drivers/pci/hotplug/ibmphp_res.c+1−1

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drivers/pci/hotplug/pciehp_ctrl.c+2−2

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drivers/pci/hotplug/shpchp_ctrl.c+2−2

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drivers/pci/pci.c+2−2

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drivers/pci/proc.c+1−1

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drivers/pci/quirks.c+2−2

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drivers/pci/setup-bus.c+1−1

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drivers/pci/xen-pcifront.c+1−1

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drivers/pcmcia/db1xxx_ss.c+4−4

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drivers/perf/arm-ccn.c+1−1

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drivers/perf/arm_spe_pmu.c+2−2

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drivers/phy/qualcomm/phy-qcom-usb-hs.c+1−1

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drivers/phy/rockchip/phy-rockchip-inno-usb2.c+4−4

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drivers/platform/olpc/olpc-xo175-ec.c+1−1

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drivers/platform/x86/acer-wmi.c+4−4

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drivers/platform/x86/dell-laptop.c+2−2

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drivers/platform/x86/surfacepro3_button.c+4−4

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drivers/platform/x86/thinkpad_acpi.c+3−3

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drivers/platform/x86/toshiba_acpi.c+1−1

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drivers/power/supply/ab8500_charger.c+2−2

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drivers/power/supply/ab8500_fg.c+2−2

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drivers/power/supply/abx500_chargalg.c+13−13

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drivers/power/supply/axp20x_usb_power.c+1−1

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drivers/power/supply/cros_usbpd-charger.c+1−1

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drivers/power/supply/max8925_power.c+1−1

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drivers/power/supply/wm831x_power.c+1−1

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drivers/power/supply/wm8350_power.c+1−1

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drivers/ps3/ps3av.c+1−1

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drivers/ps3/ps3av_cmd.c+2−2

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drivers/rapidio/devices/rio_mport_cdev.c+1−1

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drivers/regulator/axp20x-regulator.c+4−4

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drivers/regulator/core.c+1−1

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drivers/regulator/slg51000-regulator.c+1−1

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drivers/regulator/twl6030-regulator.c+1−1

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drivers/remoteproc/omap_remoteproc.c+0−1

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drivers/reset/reset-imx7.c+7−7

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drivers/rpmsg/qcom_glink_native.c+2−2

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drivers/rtc/rtc-m41t80.c+1−1

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drivers/rtc/rtc-pcf85063.c+1−1

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drivers/rtc/rtc-pcf8523.c+1−1

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drivers/rtc/rtc-stmp3xxx.c+1−1

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drivers/s390/net/ctcm_fsms.c+1−1

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drivers/s390/net/ctcm_mpc.c+3−3

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drivers/s390/net/qeth_core_main.c+2−2

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drivers/s390/net/qeth_ethtool.c+3−3

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drivers/s390/net/qeth_l2_main.c+1−1

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drivers/s390/net/qeth_l3_main.c+1−1

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drivers/scsi/53c700.c+1−1

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drivers/scsi/BusLogic.c+1−1

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drivers/scsi/FlashPoint.c+6−3

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drivers/scsi/NCR5380.c+1−1

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drivers/scsi/aacraid/aachba.c+4−4

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drivers/scsi/aacraid/commsup.c+1−1

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drivers/scsi/aacraid/linit.c+1−1

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drivers/scsi/aic7xxx/aic79xx_core.c+20−20

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drivers/scsi/aic7xxx/aic79xx_osm.c+1−1

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drivers/scsi/aic7xxx/aic7xxx_core.c+14−14

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drivers/scsi/aic94xx/aic94xx_scb.c+5−5

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drivers/scsi/aic94xx/aic94xx_tmf.c+1−1

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drivers/scsi/arcmsr/arcmsr_hba.c+1−1

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drivers/scsi/arm/fas216.c+6−6

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drivers/scsi/be2iscsi/be_iscsi.c+1−1

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drivers/scsi/be2iscsi/be_main.c+1−1

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drivers/scsi/bfa/bfa_fcpim.c+3−3

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drivers/scsi/bfa/bfa_fcs_lport.c+2−2

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drivers/scsi/bfa/bfa_fcs_rport.c+7−7

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drivers/scsi/bfa/bfa_ioc.c+3−3

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drivers/scsi/bfa/bfa_svc.c+1−1

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drivers/scsi/bnx2fc/bnx2fc_hwi.c+0−1

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drivers/scsi/csiostor/csio_hw.c+1−1

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drivers/scsi/csiostor/csio_lnode.c+0−1

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drivers/scsi/csiostor/csio_wr.c+1−1

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drivers/scsi/cxgbi/cxgb3i/cxgb3i.c+1−1

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drivers/scsi/cxgbi/cxgb4i/cxgb4i.c+1−1

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drivers/scsi/cxgbi/libcxgbi.c+1−1

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drivers/scsi/cxlflash/main.c+14−14

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drivers/scsi/cxlflash/superpipe.c+4−6

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drivers/scsi/device_handler/scsi_dh_hp_sw.c+2−2

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drivers/scsi/esas2r/esas2r_flash.c+1−1

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drivers/scsi/esas2r/esas2r_init.c+2−2

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drivers/scsi/esp_scsi.c+2−2

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drivers/scsi/fcoe/fcoe_ctlr.c+4−4

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drivers/scsi/g_NCR5380.c+1−1

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drivers/scsi/hisi_sas/hisi_sas_main.c+1−1

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drivers/scsi/hpsa.c+5−5

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drivers/scsi/ibmvscsi/ibmvfc.c+3−3

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drivers/scsi/ibmvscsi_tgt/ibmvscsi_tgt.c+3−3

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drivers/scsi/imm.c+7−7

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drivers/scsi/isci/phy.c+1−1

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drivers/scsi/isci/remote_device.c+2−2

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drivers/scsi/isci/remote_node_context.c+3−3

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drivers/scsi/isci/request.c+1−1

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drivers/scsi/libfc/fc_exch.c+2−2

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drivers/scsi/libfc/fc_fcp.c+4−4

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drivers/scsi/libfc/fc_lport.c+1−1

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drivers/scsi/libfc/fc_rport.c+1−1

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drivers/scsi/libiscsi.c+3−3

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drivers/scsi/libiscsi_tcp.c+1−1

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drivers/scsi/libsas/sas_ata.c+1−1

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drivers/scsi/libsas/sas_discover.c+1−1

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drivers/scsi/libsas/sas_expander.c+1−1

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drivers/scsi/libsas/sas_scsi_host.c+1−1

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drivers/scsi/lpfc/lpfc_ct.c+2−2

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drivers/scsi/lpfc/lpfc_els.c+1−1

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drivers/scsi/lpfc/lpfc_hbadisc.c+3−4

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drivers/scsi/lpfc/lpfc_nportdisc.c+1−1

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drivers/scsi/lpfc/lpfc_nvme.c+1−1

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drivers/scsi/lpfc/lpfc_scsi.c+4−4

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drivers/scsi/lpfc/lpfc_sli.c+14−14

This diff is large: its 126 lines aren’t shown here.

drivers/scsi/megaraid.c+6−6

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drivers/scsi/megaraid/megaraid_mbox.c+1−1

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drivers/scsi/megaraid/megaraid_sas_base.c+1−1

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drivers/scsi/megaraid/megaraid_sas_fusion.c+1−1

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drivers/scsi/mesh.c+1−1

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drivers/scsi/mpt3sas/mpt3sas_base.c+1−1

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drivers/scsi/mpt3sas/mpt3sas_ctl.c+1−1

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drivers/scsi/mpt3sas/mpt3sas_scsih.c+4−4

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drivers/scsi/myrb.c+4−4

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drivers/scsi/ncr53c8xx.c+7−7

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drivers/scsi/pcmcia/nsp_cs.c+1−1

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drivers/scsi/ppa.c+5−5

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drivers/scsi/qedf/qedf_main.c+1−1

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drivers/scsi/qla2xxx/qla_gs.c+1−1

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drivers/scsi/qla2xxx/qla_init.c+1−1

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drivers/scsi/qla2xxx/qla_iocb.c+1−1

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drivers/scsi/qla2xxx/qla_isr.c+5−5

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drivers/scsi/qla2xxx/qla_sup.c+3−3

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drivers/scsi/qla2xxx/qla_target.c+3−3

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drivers/scsi/qla4xxx/ql4_os.c+1−1

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drivers/scsi/qlogicpti.c+10−10

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drivers/scsi/scsi_debug.c+0−2

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drivers/scsi/scsi_error.c+14−14

This diff is large: its 117 lines aren’t shown here.

drivers/scsi/scsi_ioctl.c+2−2

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drivers/scsi/scsi_lib.c+1−1

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drivers/scsi/smartpqi/smartpqi_init.c+8−9

This diff is large: its 75 lines aren’t shown here.

drivers/scsi/sr.c+2−2

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drivers/scsi/st.c+4−4

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drivers/scsi/sun3_scsi.c+2−2

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drivers/scsi/sym53c8xx_2/sym_fw.c+1−1

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drivers/scsi/sym53c8xx_2/sym_hipd.c+2−2

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drivers/scsi/sym53c8xx_2/sym_nvram.c+1−1

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drivers/scsi/ufs/ufs_bsg.c+1−1

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drivers/scsi/ufs/ufshcd.c+4−4

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drivers/scsi/virtio_scsi.c+1−1

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drivers/scsi/vmw_pvscsi.c+1−1

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drivers/scsi/wd33c93.c+1−1

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drivers/scsi/xen-scsifront.c+1−1

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drivers/soc/qcom/socinfo.c+11−11

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drivers/soc/tegra/pmc.c+1−1

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drivers/spi/spi-bcm2835aux.c+2−2

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drivers/spi/spi-fsl-cpm.c+2−2

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drivers/spi/spi-sprd-adi.c+1−1

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drivers/ssb/driver_chipcommon.c+1−1

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drivers/ssb/driver_mipscore.c+1−1

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drivers/ssb/scan.c+1−1

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drivers/staging/media/atomisp/pci/atomisp_cmd.c+1−1

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drivers/staging/media/atomisp/pci/atomisp_compat_css20.c+4−4

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drivers/staging/media/atomisp/pci/atomisp_ioctl.c+0−1

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drivers/staging/media/atomisp/pci/atomisp_v4l2.c+1−1

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drivers/staging/media/atomisp/pci/hmm/hmm_bo.c+1−1

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drivers/staging/media/atomisp/pci/sh_css.c+1−1

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drivers/staging/media/hantro/hantro_g1_mpeg2_dec.c+1−1

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drivers/staging/media/hantro/rk3399_vpu_hw_mpeg2_dec.c+1−1

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drivers/staging/media/imx/imx-media-csi.c+1−1

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drivers/staging/media/sunxi/cedrus/cedrus.c+6−1

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drivers/staging/media/usbvision/usbvision-i2c.c+3−3

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drivers/target/iscsi/cxgbit/cxgbit_main.c+1−1

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drivers/target/target_core_pr.c+2−2

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drivers/target/target_core_sbc.c+1−1

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drivers/target/target_core_transport.c+2−2

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drivers/target/tcm_fc/tfc_cmd.c+1−1

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drivers/thermal/qcom/qcom-spmi-temp-alarm.c+2−2

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drivers/thermal/qcom/tsens-v0_1.c+4−4

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drivers/thermal/thermal_core.c+3−2

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drivers/thermal/ti-soc-thermal/omap4-thermal-data.c+12−11

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drivers/thermal/ti-soc-thermal/omap4xxx-bandgap.h+7−3

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drivers/thunderbolt/ctl.c+1−1

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drivers/tty/hvc/hvc_xen.c+1−1

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drivers/tty/mips_ejtag_fdc.c+1−1

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drivers/tty/n_r3964.c+0−1

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drivers/tty/serial/8250/8250_em.c+1−1

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drivers/tty/serial/8250/8250_exar.c+21−3

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drivers/tty/serial/8250/8250_fintek.c+1−1

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drivers/tty/serial/8250/8250_pci.c+1−1

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drivers/tty/serial/8250/8250_port.c+7−4

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drivers/tty/serial/8250/8250_uniphier.c+3−3

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drivers/tty/serial/Kconfig+1−0

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drivers/tty/serial/amba-pl011.c+9−7

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drivers/tty/serial/atmel_serial.c+1−1

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drivers/tty/serial/omap-serial.c+0−2

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drivers/tty/serial/qcom_geni_serial.c+8−3

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drivers/tty/serial/rda-uart.c+1−1

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drivers/tty/serial/samsung_tty.c+5−3

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drivers/tty/serial/serial-tegra.c+1−1

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drivers/tty/serial/serial_core.c+1−1

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drivers/tty/serial/stm32-usart.c+1−1

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drivers/tty/serial/sunsu.c+1−1

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drivers/tty/serial/sunzilog.c+1−1

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drivers/tty/serial/xilinx_uartps.c+1−1

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drivers/tty/tty_ioctl.c+1−1

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drivers/tty/vt/vt_ioctl.c+11−1

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drivers/usb/c67x00/c67x00-sched.c+2−1

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drivers/usb/class/cdc-acm.c+10−12

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drivers/usb/core/driver.c+38−2

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drivers/usb/core/generic.c+3−2

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drivers/usb/core/hcd-pci.c+4−1

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drivers/usb/core/hub.c+1−1

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drivers/usb/core/quirks.c+7−0

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drivers/usb/dwc3/core.c+2−3

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drivers/usb/dwc3/gadget.c+89−18

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drivers/usb/gadget/function/f_mass_storage.c+0−1

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drivers/usb/gadget/function/f_ncm.c+69−12

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drivers/usb/gadget/function/f_tcm.c+4−3

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drivers/usb/gadget/u_f.h+27−11

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drivers/usb/gadget/udc/atmel_usba_udc.c+1−1

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drivers/usb/gadget/udc/fsl_udc_core.c+1−1

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drivers/usb/gadget/udc/pxa25x_udc.c+2−2

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drivers/usb/host/isp116x-hcd.c+3−3

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drivers/usb/host/ohci-exynos.c+2−3

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drivers/usb/host/pci-quirks.c+2−1

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drivers/usb/host/xhci-dbgcap.c+1−1

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drivers/usb/host/xhci-debugfs.c+4−4

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drivers/usb/host/xhci-hub.c+11−10

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drivers/usb/host/xhci-mem.c+2−2

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drivers/usb/host/xhci-pci-renesas.c+1−18

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drivers/usb/host/xhci-ring.c+1−1

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drivers/usb/host/xhci-tegra.c+3−1

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drivers/usb/host/xhci.c+3−2

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drivers/usb/misc/lvstest.c+1−1

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drivers/usb/misc/yurex.c+1−1

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drivers/usb/musb/cppi_dma.c+1−1

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drivers/usb/musb/musb_core.c+6−7

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drivers/usb/musb/musb_dsps.c+3−3

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drivers/usb/musb/musb_gadget_ep0.c+2−2

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drivers/usb/musb/musb_host.c+3−3

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drivers/usb/musb/musb_virthub.c+1−1

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drivers/usb/musb/omap2430.c+1−1

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drivers/usb/musb/tusb6010.c+1−1

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drivers/usb/phy/phy-jz4770.c+1−0

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drivers/usb/storage/sddr55.c+1−1

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drivers/usb/storage/uas.c+1−1

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drivers/usb/storage/unusual_devs.h+1−1

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drivers/usb/storage/unusual_uas.h+14−0

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drivers/usb/typec/tcpm/tcpci.c+1−1

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drivers/usb/typec/tcpm/tcpm.c+25−3

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drivers/usb/typec/ucsi/displayport.c+1−8

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drivers/usb/typec/ucsi/ucsi.c+53−50

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drivers/usb/usbip/stub_dev.c+6−0

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drivers/vdpa/ifcvf/ifcvf_base.h+1−1

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drivers/vdpa/ifcvf/ifcvf_main.c+7−2

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drivers/vdpa/mlx5/net/mlx5_vnet.c+25−25

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drivers/vfio/pci/vfio_pci.c+1−1

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drivers/vfio/vfio_iommu_type1.c+1−1

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drivers/vhost/iotlb.c+2−2

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drivers/video/backlight/adp8860_bl.c+1−1

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drivers/video/fbdev/controlfb.c+2−0

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drivers/video/fbdev/core/fbcon.c+23−2

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drivers/video/fbdev/hyperv_fb.c+2−2

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drivers/video/fbdev/mmp/fb/mmpfb.c+0−2

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drivers/video/fbdev/nvidia/nv_hw.c+1−1

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drivers/video/fbdev/pxa168fb.c+0−4

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drivers/video/fbdev/riva/fbdev.c+1−1

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drivers/video/fbdev/sis/sis_main.c+4−4

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drivers/video/fbdev/stifb.c+2−2

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drivers/video/fbdev/via/lcd.c+1−1

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drivers/watchdog/sc1200wdt.c+1−1

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drivers/watchdog/wdrtas.c+1−1

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drivers/xen/Kconfig+10−0

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drivers/xen/Makefile+1−0

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drivers/xen/balloon.c+2−2

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drivers/xen/events/events_base.c+8−8

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drivers/xen/grant-table.c+2−2

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drivers/xen/privcmd.c+2−2

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drivers/xen/pvcalls-front.c+1−1

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drivers/xen/unpopulated-alloc.c+183−0

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drivers/xen/xen-acpi-memhotplug.c+1−1

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drivers/xen/xen-pciback/xenbus.c+1−1

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drivers/xen/xen-scsiback.c+1−1

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drivers/xen/xenbus/xenbus_client.c+11−5

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drivers/xen/xenbus/xenbus_probe_frontend.c+2−2

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drivers/xen/xlate_mmu.c+2−2

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fs/afs/internal.h+8−6

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fs/afs/misc.c+9−9

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fs/afs/yfsclient.c+25−25

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fs/aio.c+1−1

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fs/binfmt_flat.c+12−8

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fs/btrfs/ctree.c+6−2

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fs/btrfs/extent-tree.c+12−7

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fs/btrfs/free-space-cache.c+1−1

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fs/btrfs/free-space-tree.c+4−0

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fs/btrfs/ioctl.c+20−7

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fs/btrfs/scrub.c+70−52

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fs/btrfs/super.c+1−0

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fs/btrfs/tree-checker.c+1−1

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fs/btrfs/tree-log.c+6−4

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fs/btrfs/volumes.c+2−1

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fs/buffer.c+1−1

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fs/ceph/dir.c+14−19

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fs/ceph/file.c+4−3

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fs/ceph/mds_client.h+1−1

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fs/ceph/super.h+38−35

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fs/cifs/cifsglob.h+15−0

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fs/cifs/cifssmb.c+1−1

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fs/cifs/connect.c+6−6

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fs/cifs/smb2pdu.c+1−1

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fs/configfs/dir.c+2−2

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fs/dax.c+1−1

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fs/eventpoll.c+3−3

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fs/ext2/file.c+4−2

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fs/ext2/super.c+1−1

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fs/f2fs/node.c+2−2

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fs/fs-writeback.c+53−50

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fs/fs_context.c+1−1

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fs/fsopen.c+1−1

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fs/hfsplus/wrapper.c+1−1

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fs/io-wq.c+19−2

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fs/io_uring.c+122−47

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fs/jffs2/readinode.c+1−1

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fs/libfs.c+2−2

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fs/locks.c+3−3

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fs/nfs/blocklayout/blocklayout.c+1−1

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fs/nfs/filelayout/filelayout.c+1−1

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fs/nfs/flexfilelayout/flexfilelayout.c+2−2

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fs/nfs/fs_context.c+12−10

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fs/nfs/nfs3acl.c+2−2

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fs/nfs/nfs4file.c+1−1

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fs/nfs/nfs4idmap.c+2−2

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fs/nfs/nfs4state.c+7−7

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fs/nfs/pagelist.c+1−1

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fs/nfs_common/nfsacl.c+1−1

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fs/nfsd/blocklayout.c+2−2

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fs/nfsd/nfs4callback.c+1−1

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fs/nfsd/nfs4layouts.c+1−1

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fs/nilfs2/bmap.c+1−1

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fs/nilfs2/recovery.c+1−1

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fs/nilfs2/segment.c+12−7

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fs/notify/fanotify/fanotify_user.c+1−1

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fs/ocfs2/cluster/quorum.c+1−1

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fs/pstore/zone.c+0−1

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fs/seq_file.c+1−1

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fs/signalfd.c+1−1

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fs/ubifs/lprops.c+2−2

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