History

drm/xe/uapi: Add missing DRM_ prefix in uAPI constants

Most constants defined in xe_drm.h use DRM_XE_ as prefix which is helpful to identify the name space. Make this systematic and add this prefix where it was missing. v2: - fix vertical alignment of define values - remove double DRM_ in some variables (José Roberto de Souza) v3: Rebase

Francois Dugast committed 3 years ago

Commit d5dc73d1 parent b646ce98 files · +140 −140Browse files

Unified · Split

8 files
  1. drivers/gpu/drm/xe/xe_bo.c +7 −7
  2. drivers/gpu/drm/xe/xe_exec_queue.c +11 −11
  3. drivers/gpu/drm/xe/xe_gt.c +1 −1
  4. drivers/gpu/drm/xe/xe_pmu.c +12 −12
  5. drivers/gpu/drm/xe/xe_query.c +14 −14
  6. drivers/gpu/drm/xe/xe_vm.c +27 −27
  7. drivers/gpu/drm/xe/xe_vm_doc.h +6 −6
  8. include/uapi/drm/xe_drm.h +62 −62
drivers/gpu/drm/xe/xe_bo.c+7−7
@@ -209,7 +209,7 @@ static int __xe_bo_placement_for_flags(struct xe_device *xe, struct xe_bo *bo, · 208 unmodified lines
209209
210210 /* The order of placements should indicate preferred location */
211211
212− if (bo->props.preferred_mem_class == XE_MEM_REGION_CLASS_SYSMEM) {
212+ if (bo->props.preferred_mem_class == DRM_XE_MEM_REGION_CLASS_SYSMEM) {
213213 try_add_system(bo, places, bo_flags, &c);
214214 try_add_vram(xe, bo, places, bo_flags, &c);
215215 } else {
@@ -1814,9 +1814,9 @@ int xe_gem_create_ioctl(struct drm_device *dev, void *data, · 1598 unmodified lines
18141814 return -EINVAL;
18151815
18161816 if (XE_IOCTL_DBG(xe, args->flags &
1817− ~(XE_GEM_CREATE_FLAG_DEFER_BACKING |
1818− XE_GEM_CREATE_FLAG_SCANOUT |
1819− XE_GEM_CREATE_FLAG_NEEDS_VISIBLE_VRAM |
1817+ ~(DRM_XE_GEM_CREATE_FLAG_DEFER_BACKING |
1818+ DRM_XE_GEM_CREATE_FLAG_SCANOUT |
1819+ DRM_XE_GEM_CREATE_FLAG_NEEDS_VISIBLE_VRAM |
18201820 xe->info.mem_region_mask)))
18211821 return -EINVAL;
18221822
@@ -1836,15 +1836,15 @@ int xe_gem_create_ioctl(struct drm_device *dev, void *data, · 13 unmodified lines
18361836 if (XE_IOCTL_DBG(xe, args->size & ~PAGE_MASK))
18371837 return -EINVAL;
18381838
1839− if (args->flags & XE_GEM_CREATE_FLAG_DEFER_BACKING)
1839+ if (args->flags & DRM_XE_GEM_CREATE_FLAG_DEFER_BACKING)
18401840 bo_flags |= XE_BO_DEFER_BACKING;
18411841
1842− if (args->flags & XE_GEM_CREATE_FLAG_SCANOUT)
1842+ if (args->flags & DRM_XE_GEM_CREATE_FLAG_SCANOUT)
18431843 bo_flags |= XE_BO_SCANOUT_BIT;
18441844
18451845 bo_flags |= args->flags << (ffs(XE_BO_CREATE_SYSTEM_BIT) - 1);
18461846
1847− if (args->flags & XE_GEM_CREATE_FLAG_NEEDS_VISIBLE_VRAM) {
1847+ if (args->flags & DRM_XE_GEM_CREATE_FLAG_NEEDS_VISIBLE_VRAM) {
18481848 if (XE_IOCTL_DBG(xe, !(bo_flags & XE_BO_CREATE_VRAM_MASK)))
18491849 return -EINVAL;
18501850
drivers/gpu/drm/xe/xe_exec_queue.c+11−11
@@ -393,7 +393,7 @@ static int exec_queue_set_acc_granularity(struct xe_device *xe, struct xe_exec_q · 392 unmodified lines
393393 if (XE_IOCTL_DBG(xe, !xe->info.supports_usm))
394394 return -EINVAL;
395395
396− if (value > XE_ACC_GRANULARITY_64M)
396+ if (value > DRM_XE_ACC_GRANULARITY_64M)
397397 return -EINVAL;
398398
399399 q->usm.acc_granularity = value;
@@ -406,14 +406,14 @@ typedef int (*xe_exec_queue_set_property_fn)(struct xe_device *xe, · 6 unmodified lines
406406 u64 value, bool create);
407407
408408 static const xe_exec_queue_set_property_fn exec_queue_set_property_funcs[] = {
409− [XE_EXEC_QUEUE_SET_PROPERTY_PRIORITY] = exec_queue_set_priority,
410− [XE_EXEC_QUEUE_SET_PROPERTY_TIMESLICE] = exec_queue_set_timeslice,
411− [XE_EXEC_QUEUE_SET_PROPERTY_PREEMPTION_TIMEOUT] = exec_queue_set_preemption_timeout,
412− [XE_EXEC_QUEUE_SET_PROPERTY_PERSISTENCE] = exec_queue_set_persistence,
413− [XE_EXEC_QUEUE_SET_PROPERTY_JOB_TIMEOUT] = exec_queue_set_job_timeout,
414− [XE_EXEC_QUEUE_SET_PROPERTY_ACC_TRIGGER] = exec_queue_set_acc_trigger,
415− [XE_EXEC_QUEUE_SET_PROPERTY_ACC_NOTIFY] = exec_queue_set_acc_notify,
416− [XE_EXEC_QUEUE_SET_PROPERTY_ACC_GRANULARITY] = exec_queue_set_acc_granularity,
409+ [DRM_XE_EXEC_QUEUE_SET_PROPERTY_PRIORITY] = exec_queue_set_priority,
410+ [DRM_XE_EXEC_QUEUE_SET_PROPERTY_TIMESLICE] = exec_queue_set_timeslice,
411+ [DRM_XE_EXEC_QUEUE_SET_PROPERTY_PREEMPTION_TIMEOUT] = exec_queue_set_preemption_timeout,
412+ [DRM_XE_EXEC_QUEUE_SET_PROPERTY_PERSISTENCE] = exec_queue_set_persistence,
413+ [DRM_XE_EXEC_QUEUE_SET_PROPERTY_JOB_TIMEOUT] = exec_queue_set_job_timeout,
414+ [DRM_XE_EXEC_QUEUE_SET_PROPERTY_ACC_TRIGGER] = exec_queue_set_acc_trigger,
415+ [DRM_XE_EXEC_QUEUE_SET_PROPERTY_ACC_NOTIFY] = exec_queue_set_acc_notify,
416+ [DRM_XE_EXEC_QUEUE_SET_PROPERTY_ACC_GRANULARITY] = exec_queue_set_acc_granularity,
417417 };
418418
419419 static int exec_queue_user_ext_set_property(struct xe_device *xe,
@@ -445,7 +445,7 @@ typedef int (*xe_exec_queue_user_extension_fn)(struct xe_device *xe, · 25 unmodified lines
445445 bool create);
446446
447447 static const xe_exec_queue_set_property_fn exec_queue_user_extension_funcs[] = {
448− [XE_EXEC_QUEUE_EXTENSION_SET_PROPERTY] = exec_queue_user_ext_set_property,
448+ [DRM_XE_EXEC_QUEUE_EXTENSION_SET_PROPERTY] = exec_queue_user_ext_set_property,
449449 };
450450
451451 #define MAX_USER_EXTENSIONS 16
@@ -764,7 +764,7 @@ int xe_exec_queue_get_property_ioctl(struct drm_device *dev, void *data, · 312 unmodified lines
764764 return -ENOENT;
765765
766766 switch (args->property) {
767− case XE_EXEC_QUEUE_GET_PROPERTY_BAN:
767+ case DRM_XE_EXEC_QUEUE_GET_PROPERTY_BAN:
768768 args->value = !!(q->flags & EXEC_QUEUE_FLAG_BANNED);
769769 ret = 0;
770770 break;
drivers/gpu/drm/xe/xe_gt.c+1−1
@@ -560,7 +560,7 @@ static void xe_uevent_gt_reset_failure(struct pci_dev *pdev, u8 tile_id, u8 gt_i · 559 unmodified lines
560560 {
561561 char *reset_event[4];
562562
563− reset_event[0] = XE_RESET_FAILED_UEVENT "=NEEDS_RESET";
563+ reset_event[0] = DRM_XE_RESET_FAILED_UEVENT "=NEEDS_RESET";
564564 reset_event[1] = kasprintf(GFP_KERNEL, "TILE_ID=%d", tile_id);
565565 reset_event[2] = kasprintf(GFP_KERNEL, "GT_ID=%d", gt_id);
566566 reset_event[3] = NULL;
drivers/gpu/drm/xe/xe_pmu.c+12−12
@@ -17,12 +17,12 @@ static unsigned int xe_pmu_target_cpu = -1; · 16 unmodified lines
1717
1818 static unsigned int config_gt_id(const u64 config)
1919 {
20− return config >> __XE_PMU_GT_SHIFT;
20+ return config >> __DRM_XE_PMU_GT_SHIFT;
2121 }
2222
2323 static u64 config_counter(const u64 config)
2424 {
25− return config & ~(~0ULL << __XE_PMU_GT_SHIFT);
25+ return config & ~(~0ULL << __DRM_XE_PMU_GT_SHIFT);
2626 }
2727
2828 static void xe_pmu_event_destroy(struct perf_event *event)
@@ -114,13 +114,13 @@ config_status(struct xe_device *xe, u64 config) · 85 unmodified lines
114114 return -ENOENT;
115115
116116 switch (config_counter(config)) {
117− case XE_PMU_RENDER_GROUP_BUSY(0):
118− case XE_PMU_COPY_GROUP_BUSY(0):
119− case XE_PMU_ANY_ENGINE_GROUP_BUSY(0):
117+ case DRM_XE_PMU_RENDER_GROUP_BUSY(0):
118+ case DRM_XE_PMU_COPY_GROUP_BUSY(0):
119+ case DRM_XE_PMU_ANY_ENGINE_GROUP_BUSY(0):
120120 if (gt->info.type == XE_GT_TYPE_MEDIA)
121121 return -ENOENT;
122122 break;
123− case XE_PMU_MEDIA_GROUP_BUSY(0):
123+ case DRM_XE_PMU_MEDIA_GROUP_BUSY(0):
124124 if (!(gt->info.engine_mask & (BIT(XE_HW_ENGINE_VCS0) | BIT(XE_HW_ENGINE_VECS0))))
125125 return -ENOENT;
126126 break;
@@ -180,10 +180,10 @@ static u64 __xe_pmu_event_read(struct perf_event *event) · 53 unmodified lines
180180 u64 val;
181181
182182 switch (config_counter(config)) {
183− case XE_PMU_RENDER_GROUP_BUSY(0):
184− case XE_PMU_COPY_GROUP_BUSY(0):
185− case XE_PMU_ANY_ENGINE_GROUP_BUSY(0):
186− case XE_PMU_MEDIA_GROUP_BUSY(0):
183+ case DRM_XE_PMU_RENDER_GROUP_BUSY(0):
184+ case DRM_XE_PMU_COPY_GROUP_BUSY(0):
185+ case DRM_XE_PMU_ANY_ENGINE_GROUP_BUSY(0):
186+ case DRM_XE_PMU_MEDIA_GROUP_BUSY(0):
187187 val = engine_group_busyness_read(gt, config);
188188 break;
189189 default:
@@ -369,7 +369,7 @@ create_event_attributes(struct xe_pmu *pmu) · 179 unmodified lines
369369 /* Count how many counters we will be exposing. */
370370 for_each_gt(gt, xe, j) {
371371 for (i = 0; i < ARRAY_SIZE(events); i++) {
372− u64 config = ___XE_PMU_OTHER(j, events[i].counter);
372+ u64 config = ___DRM_XE_PMU_OTHER(j, events[i].counter);
373373
374374 if (!config_status(xe, config))
375375 count++;
@@ -396,7 +396,7 @@ create_event_attributes(struct xe_pmu *pmu) · 20 unmodified lines
396396
397397 for_each_gt(gt, xe, j) {
398398 for (i = 0; i < ARRAY_SIZE(events); i++) {
399− u64 config = ___XE_PMU_OTHER(j, events[i].counter);
399+ u64 config = ___DRM_XE_PMU_OTHER(j, events[i].counter);
400400 char *str;
401401
402402 if (config_status(xe, config))
drivers/gpu/drm/xe/xe_query.c+14−14
@@ -261,7 +261,7 @@ static int query_memory_usage(struct xe_device *xe, · 260 unmodified lines
261261 return -ENOMEM;
262262
263263 man = ttm_manager_type(&xe->ttm, XE_PL_TT);
264− usage->regions[0].mem_class = XE_MEM_REGION_CLASS_SYSMEM;
264+ usage->regions[0].mem_class = DRM_XE_MEM_REGION_CLASS_SYSMEM;
265265 usage->regions[0].instance = 0;
266266 usage->regions[0].min_page_size = PAGE_SIZE;
267267 usage->regions[0].total_size = man->size << PAGE_SHIFT;
@@ -273,7 +273,7 @@ static int query_memory_usage(struct xe_device *xe, · 5 unmodified lines
273273 man = ttm_manager_type(&xe->ttm, i);
274274 if (man) {
275275 usage->regions[usage->num_regions].mem_class =
276− XE_MEM_REGION_CLASS_VRAM;
276+ DRM_XE_MEM_REGION_CLASS_VRAM;
277277 usage->regions[usage->num_regions].instance =
278278 usage->num_regions;
279279 usage->regions[usage->num_regions].min_page_size =
@@ -305,7 +305,7 @@ static int query_memory_usage(struct xe_device *xe, · 25 unmodified lines
305305
306306 static int query_config(struct xe_device *xe, struct drm_xe_device_query *query)
307307 {
308− const u32 num_params = XE_QUERY_CONFIG_MAX_EXEC_QUEUE_PRIORITY + 1;
308+ const u32 num_params = DRM_XE_QUERY_CONFIG_MAX_EXEC_QUEUE_PRIORITY + 1;
309309 size_t size =
310310 sizeof(struct drm_xe_query_config) + num_params * sizeof(u64);
311311 struct drm_xe_query_config __user *query_ptr =
@@ -324,15 +324,15 @@ static int query_config(struct xe_device *xe, struct drm_xe_device_query *query) · 12 unmodified lines
324324 return -ENOMEM;
325325
326326 config->num_params = num_params;
327− config->info[XE_QUERY_CONFIG_REV_AND_DEVICE_ID] =
327+ config->info[DRM_XE_QUERY_CONFIG_REV_AND_DEVICE_ID] =
328328 xe->info.devid | (xe->info.revid << 16);
329329 if (xe_device_get_root_tile(xe)->mem.vram.usable_size)
330− config->info[XE_QUERY_CONFIG_FLAGS] =
331− XE_QUERY_CONFIG_FLAGS_HAS_VRAM;
332− config->info[XE_QUERY_CONFIG_MIN_ALIGNMENT] =
330+ config->info[DRM_XE_QUERY_CONFIG_FLAGS] =
331+ DRM_XE_QUERY_CONFIG_FLAGS_HAS_VRAM;
332+ config->info[DRM_XE_QUERY_CONFIG_MIN_ALIGNMENT] =
333333 xe->info.vram_flags & XE_VRAM_FLAGS_NEED64K ? SZ_64K : SZ_4K;
334− config->info[XE_QUERY_CONFIG_VA_BITS] = xe->info.va_bits;
335− config->info[XE_QUERY_CONFIG_MAX_EXEC_QUEUE_PRIORITY] =
334+ config->info[DRM_XE_QUERY_CONFIG_VA_BITS] = xe->info.va_bits;
335+ config->info[DRM_XE_QUERY_CONFIG_MAX_EXEC_QUEUE_PRIORITY] =
336336 xe_exec_queue_device_get_max_priority(xe);
337337
338338 if (copy_to_user(query_ptr, config, size)) {
@@ -368,9 +368,9 @@ static int query_gt_list(struct xe_device *xe, struct drm_xe_device_query *query · 29 unmodified lines
368368 gt_list->num_gt = xe->info.gt_count;
369369 for_each_gt(gt, xe, id) {
370370 if (xe_gt_is_media_type(gt))
371− gt_list->gt_list[id].type = XE_QUERY_GT_TYPE_MEDIA;
371+ gt_list->gt_list[id].type = DRM_XE_QUERY_GT_TYPE_MEDIA;
372372 else
373− gt_list->gt_list[id].type = XE_QUERY_GT_TYPE_MAIN;
373+ gt_list->gt_list[id].type = DRM_XE_QUERY_GT_TYPE_MAIN;
374374 gt_list->gt_list[id].gt_id = gt->info.id;
375375 gt_list->gt_list[id].clock_freq = gt->info.clock_freq;
376376 if (!IS_DGFX(xe))
@@ -468,21 +468,21 @@ static int query_gt_topology(struct xe_device *xe, · 91 unmodified lines
468468 for_each_gt(gt, xe, id) {
469469 topo.gt_id = id;
470470
471− topo.type = XE_TOPO_DSS_GEOMETRY;
471+ topo.type = DRM_XE_TOPO_DSS_GEOMETRY;
472472 query_ptr = copy_mask(query_ptr, &topo,
473473 gt->fuse_topo.g_dss_mask,
474474 sizeof(gt->fuse_topo.g_dss_mask));
475475 if (IS_ERR(query_ptr))
476476 return PTR_ERR(query_ptr);
477477
478− topo.type = XE_TOPO_DSS_COMPUTE;
478+ topo.type = DRM_XE_TOPO_DSS_COMPUTE;
479479 query_ptr = copy_mask(query_ptr, &topo,
480480 gt->fuse_topo.c_dss_mask,
481481 sizeof(gt->fuse_topo.c_dss_mask));
482482 if (IS_ERR(query_ptr))
483483 return PTR_ERR(query_ptr);
484484
485− topo.type = XE_TOPO_EU_PER_DSS;
485+ topo.type = DRM_XE_TOPO_EU_PER_DSS;
486486 query_ptr = copy_mask(query_ptr, &topo,
487487 gt->fuse_topo.eu_mask_per_dss,
488488 sizeof(gt->fuse_topo.eu_mask_per_dss));
drivers/gpu/drm/xe/xe_vm.c+27−27
@@ -2177,8 +2177,8 @@ vm_bind_ioctl_ops_create(struct xe_vm *vm, struct xe_bo *bo, · 2176 unmodified lines
21772177 (ULL)bo_offset_or_userptr);
21782178
21792179 switch (operation) {
2180− case XE_VM_BIND_OP_MAP:
2181− case XE_VM_BIND_OP_MAP_USERPTR:
2180+ case DRM_XE_VM_BIND_OP_MAP:
2181+ case DRM_XE_VM_BIND_OP_MAP_USERPTR:
21822182 ops = drm_gpuvm_sm_map_ops_create(&vm->gpuvm, addr, range,
21832183 obj, bo_offset_or_userptr);
21842184 if (IS_ERR(ops))
@@ -2189,13 +2189,13 @@ vm_bind_ioctl_ops_create(struct xe_vm *vm, struct xe_bo *bo, · 4 unmodified lines
21892189
21902190 op->tile_mask = tile_mask;
21912191 op->map.immediate =
2192− flags & XE_VM_BIND_FLAG_IMMEDIATE;
2192+ flags & DRM_XE_VM_BIND_FLAG_IMMEDIATE;
21932193 op->map.read_only =
2194− flags & XE_VM_BIND_FLAG_READONLY;
2195− op->map.is_null = flags & XE_VM_BIND_FLAG_NULL;
2194+ flags & DRM_XE_VM_BIND_FLAG_READONLY;
2195+ op->map.is_null = flags & DRM_XE_VM_BIND_FLAG_NULL;
21962196 }
21972197 break;
2198− case XE_VM_BIND_OP_UNMAP:
2198+ case DRM_XE_VM_BIND_OP_UNMAP:
21992199 ops = drm_gpuvm_sm_unmap_ops_create(&vm->gpuvm, addr, range);
22002200 if (IS_ERR(ops))
22012201 return ops;
@@ -2206,7 +2206,7 @@ vm_bind_ioctl_ops_create(struct xe_vm *vm, struct xe_bo *bo, · 4 unmodified lines
22062206 op->tile_mask = tile_mask;
22072207 }
22082208 break;
2209− case XE_VM_BIND_OP_PREFETCH:
2209+ case DRM_XE_VM_BIND_OP_PREFETCH:
22102210 ops = drm_gpuvm_prefetch_ops_create(&vm->gpuvm, addr, range);
22112211 if (IS_ERR(ops))
22122212 return ops;
@@ -2218,7 +2218,7 @@ vm_bind_ioctl_ops_create(struct xe_vm *vm, struct xe_bo *bo, · 5 unmodified lines
22182218 op->prefetch.region = region;
22192219 }
22202220 break;
2221− case XE_VM_BIND_OP_UNMAP_ALL:
2221+ case DRM_XE_VM_BIND_OP_UNMAP_ALL:
22222222 xe_assert(vm->xe, bo);
22232223
22242224 err = xe_bo_lock(bo, true);
@@ -2828,13 +2828,13 @@ static int vm_bind_ioctl_ops_execute(struct xe_vm *vm, · 603 unmodified lines
28282828
28292829 #ifdef TEST_VM_ASYNC_OPS_ERROR
28302830 #define SUPPORTED_FLAGS \
2831− (FORCE_ASYNC_OP_ERROR | XE_VM_BIND_FLAG_ASYNC | \
2832− XE_VM_BIND_FLAG_READONLY | XE_VM_BIND_FLAG_IMMEDIATE | \
2833− XE_VM_BIND_FLAG_NULL | 0xffff)
2831+ (FORCE_ASYNC_OP_ERROR | DRM_XE_VM_BIND_FLAG_ASYNC | \
2832+ DRM_XE_VM_BIND_FLAG_READONLY | DRM_XE_VM_BIND_FLAG_IMMEDIATE | \
2833+ DRM_XE_VM_BIND_FLAG_NULL | 0xffff)
28342834 #else
28352835 #define SUPPORTED_FLAGS \
2836− (XE_VM_BIND_FLAG_ASYNC | XE_VM_BIND_FLAG_READONLY | \
2837− XE_VM_BIND_FLAG_IMMEDIATE | XE_VM_BIND_FLAG_NULL | \
2836+ (DRM_XE_VM_BIND_FLAG_ASYNC | DRM_XE_VM_BIND_FLAG_READONLY | \
2837+ DRM_XE_VM_BIND_FLAG_IMMEDIATE | DRM_XE_VM_BIND_FLAG_NULL | \
28382838 0xffff)
28392839 #endif
28402840 #define XE_64K_PAGE_MASK 0xffffull
@@ -2882,45 +2882,45 @@ static int vm_bind_ioctl_check_args(struct xe_device *xe, · 41 unmodified lines
28822882 u32 obj = (*bind_ops)[i].obj;
28832883 u64 obj_offset = (*bind_ops)[i].obj_offset;
28842884 u32 region = (*bind_ops)[i].region;
2885− bool is_null = flags & XE_VM_BIND_FLAG_NULL;
2885+ bool is_null = flags & DRM_XE_VM_BIND_FLAG_NULL;
28862886
28872887 if (i == 0) {
2888− *async = !!(flags & XE_VM_BIND_FLAG_ASYNC);
2888+ *async = !!(flags & DRM_XE_VM_BIND_FLAG_ASYNC);
28892889 if (XE_IOCTL_DBG(xe, !*async && args->num_syncs)) {
28902890 err = -EINVAL;
28912891 goto free_bind_ops;
28922892 }
28932893 } else if (XE_IOCTL_DBG(xe, *async !=
2894− !!(flags & XE_VM_BIND_FLAG_ASYNC))) {
2894+ !!(flags & DRM_XE_VM_BIND_FLAG_ASYNC))) {
28952895 err = -EINVAL;
28962896 goto free_bind_ops;
28972897 }
28982898
2899− if (XE_IOCTL_DBG(xe, op > XE_VM_BIND_OP_PREFETCH) ||
2899+ if (XE_IOCTL_DBG(xe, op > DRM_XE_VM_BIND_OP_PREFETCH) ||
29002900 XE_IOCTL_DBG(xe, flags & ~SUPPORTED_FLAGS) ||
29012901 XE_IOCTL_DBG(xe, obj && is_null) ||
29022902 XE_IOCTL_DBG(xe, obj_offset && is_null) ||
2903− XE_IOCTL_DBG(xe, op != XE_VM_BIND_OP_MAP &&
2903+ XE_IOCTL_DBG(xe, op != DRM_XE_VM_BIND_OP_MAP &&
29042904 is_null) ||
29052905 XE_IOCTL_DBG(xe, !obj &&
2906− op == XE_VM_BIND_OP_MAP &&
2906+ op == DRM_XE_VM_BIND_OP_MAP &&
29072907 !is_null) ||
29082908 XE_IOCTL_DBG(xe, !obj &&
2909− op == XE_VM_BIND_OP_UNMAP_ALL) ||
2909+ op == DRM_XE_VM_BIND_OP_UNMAP_ALL) ||
29102910 XE_IOCTL_DBG(xe, addr &&
2911− op == XE_VM_BIND_OP_UNMAP_ALL) ||
2911+ op == DRM_XE_VM_BIND_OP_UNMAP_ALL) ||
29122912 XE_IOCTL_DBG(xe, range &&
2913− op == XE_VM_BIND_OP_UNMAP_ALL) ||
2913+ op == DRM_XE_VM_BIND_OP_UNMAP_ALL) ||
29142914 XE_IOCTL_DBG(xe, obj &&
2915− op == XE_VM_BIND_OP_MAP_USERPTR) ||
2915+ op == DRM_XE_VM_BIND_OP_MAP_USERPTR) ||
29162916 XE_IOCTL_DBG(xe, obj &&
2917− op == XE_VM_BIND_OP_PREFETCH) ||
2917+ op == DRM_XE_VM_BIND_OP_PREFETCH) ||
29182918 XE_IOCTL_DBG(xe, region &&
2919− op != XE_VM_BIND_OP_PREFETCH) ||
2919+ op != DRM_XE_VM_BIND_OP_PREFETCH) ||
29202920 XE_IOCTL_DBG(xe, !(BIT(region) &
29212921 xe->info.mem_region_mask)) ||
29222922 XE_IOCTL_DBG(xe, obj &&
2923− op == XE_VM_BIND_OP_UNMAP)) {
2923+ op == DRM_XE_VM_BIND_OP_UNMAP)) {
29242924 err = -EINVAL;
29252925 goto free_bind_ops;
29262926 }
@@ -2929,7 +2929,7 @@ static int vm_bind_ioctl_check_args(struct xe_device *xe, · 2 unmodified lines
29292929 XE_IOCTL_DBG(xe, addr & ~PAGE_MASK) ||
29302930 XE_IOCTL_DBG(xe, range & ~PAGE_MASK) ||
29312931 XE_IOCTL_DBG(xe, !range &&
2932− op != XE_VM_BIND_OP_UNMAP_ALL)) {
2932+ op != DRM_XE_VM_BIND_OP_UNMAP_ALL)) {
29332933 err = -EINVAL;
29342934 goto free_bind_ops;
29352935 }
drivers/gpu/drm/xe/xe_vm_doc.h+6−6
@@ -32,9 +32,9 @@ · 31 unmodified lines
3232 * Operations
3333 * ----------
3434 *
35− * XE_VM_BIND_OP_MAP - Create mapping for a BO
36− * XE_VM_BIND_OP_UNMAP - Destroy mapping for a BO / userptr
37− * XE_VM_BIND_OP_MAP_USERPTR - Create mapping for userptr
35+ * DRM_XE_VM_BIND_OP_MAP - Create mapping for a BO
36+ * DRM_XE_VM_BIND_OP_UNMAP - Destroy mapping for a BO / userptr
37+ * DRM_XE_VM_BIND_OP_MAP_USERPTR - Create mapping for userptr
3838 *
3939 * Implementation details
4040 * ~~~~~~~~~~~~~~~~~~~~~~
@@ -113,7 +113,7 @@ · 72 unmodified lines
113113 * VM uses to report errors to. The ufence wait interface can be used to wait on
114114 * a VM going into an error state. Once an error is reported the VM's async
115115 * worker is paused. While the VM's async worker is paused sync,
116− * XE_VM_BIND_OP_UNMAP operations are allowed (this can free memory). Once the
116+ * DRM_XE_VM_BIND_OP_UNMAP operations are allowed (this can free memory). Once the
117117 * uses believe the error state is fixed, the async worker can be resumed via
118118 * XE_VM_BIND_OP_RESTART operation. When VM async bind work is restarted, the
119119 * first operation processed is the operation that caused the original error.
@@ -193,7 +193,7 @@ · 73 unmodified lines
193193 * In a VM is in fault mode (TODO: link to fault mode), new bind operations that
194194 * create mappings are by default are deferred to the page fault handler (first
195195 * use). This behavior can be overriden by setting the flag
196− * XE_VM_BIND_FLAG_IMMEDIATE which indicates to creating the mapping
196+ * DRM_XE_VM_BIND_FLAG_IMMEDIATE which indicates to creating the mapping
197197 * immediately.
198198 *
199199 * User pointer
@@ -322,7 +322,7 @@ · 122 unmodified lines
322322 *
323323 * By default, on a faulting VM binds just allocate the VMA and the actual
324324 * updating of the page tables is defered to the page fault handler. This
325− * behavior can be overridden by setting the flag XE_VM_BIND_FLAG_IMMEDIATE in
325+ * behavior can be overridden by setting the flag DRM_XE_VM_BIND_FLAG_IMMEDIATE in
326326 * the VM bind which will then do the bind immediately.
327327 *
328328 * Page fault handler
include/uapi/drm/xe_drm.h+62−62
@@ -19,12 +19,12 @@ extern "C" { · 18 unmodified lines
1919 /**
2020 * DOC: uevent generated by xe on it's pci node.
2121 *
22− * XE_RESET_FAILED_UEVENT - Event is generated when attempt to reset gt
22+ * DRM_XE_RESET_FAILED_UEVENT - Event is generated when attempt to reset gt
2323 * fails. The value supplied with the event is always "NEEDS_RESET".
2424 * Additional information supplied is tile id and gt id of the gt unit for
2525 * which reset has failed.
2626 */
27−#define XE_RESET_FAILED_UEVENT "DEVICE_STATUS"
27+#define DRM_XE_RESET_FAILED_UEVENT "DEVICE_STATUS"
2828
2929 /**
3030 * struct xe_user_extension - Base class for defining a chain of extensions
@@ -148,14 +148,14 @@ struct drm_xe_engine_class_instance { · 117 unmodified lines
148148 * enum drm_xe_memory_class - Supported memory classes.
149149 */
150150 enum drm_xe_memory_class {
151− /** @XE_MEM_REGION_CLASS_SYSMEM: Represents system memory. */
152− XE_MEM_REGION_CLASS_SYSMEM = 0,
151+ /** @DRM_XE_MEM_REGION_CLASS_SYSMEM: Represents system memory. */
152+ DRM_XE_MEM_REGION_CLASS_SYSMEM = 0,
153153 /**
154− * @XE_MEM_REGION_CLASS_VRAM: On discrete platforms, this
154+ * @DRM_XE_MEM_REGION_CLASS_VRAM: On discrete platforms, this
155155 * represents the memory that is local to the device, which we
156156 * call VRAM. Not valid on integrated platforms.
157157 */
158− XE_MEM_REGION_CLASS_VRAM
158+ DRM_XE_MEM_REGION_CLASS_VRAM
159159 };
160160
161161 /**
@@ -215,7 +215,7 @@ struct drm_xe_query_mem_region { · 53 unmodified lines
215215 * always equal the @total_size, since all of it will be CPU
216216 * accessible.
217217 *
218− * Note this is only tracked for XE_MEM_REGION_CLASS_VRAM
218+ * Note this is only tracked for DRM_XE_MEM_REGION_CLASS_VRAM
219219 * regions (for other types the value here will always equal
220220 * zero).
221221 */
@@ -227,7 +227,7 @@ struct drm_xe_query_mem_region { · 5 unmodified lines
227227 * Requires CAP_PERFMON or CAP_SYS_ADMIN to get reliable
228228 * accounting. Without this the value here will always equal
229229 * zero. Note this is only currently tracked for
230− * XE_MEM_REGION_CLASS_VRAM regions (for other types the value
230+ * DRM_XE_MEM_REGION_CLASS_VRAM regions (for other types the value
231231 * here will always be zero).
232232 */
233233 __u64 cpu_visible_used;
@@ -320,12 +320,12 @@ struct drm_xe_query_config { · 86 unmodified lines
320320 /** @pad: MBZ */
321321 __u32 pad;
322322
323−#define XE_QUERY_CONFIG_REV_AND_DEVICE_ID 0
324−#define XE_QUERY_CONFIG_FLAGS 1
325− #define XE_QUERY_CONFIG_FLAGS_HAS_VRAM (0x1 << 0)
326−#define XE_QUERY_CONFIG_MIN_ALIGNMENT 2
327−#define XE_QUERY_CONFIG_VA_BITS 3
328−#define XE_QUERY_CONFIG_MAX_EXEC_QUEUE_PRIORITY 4
323+#define DRM_XE_QUERY_CONFIG_REV_AND_DEVICE_ID 0
324+#define DRM_XE_QUERY_CONFIG_FLAGS 1
325+ #define DRM_XE_QUERY_CONFIG_FLAGS_HAS_VRAM (0x1 << 0)
326+#define DRM_XE_QUERY_CONFIG_MIN_ALIGNMENT 2
327+#define DRM_XE_QUERY_CONFIG_VA_BITS 3
328+#define DRM_XE_QUERY_CONFIG_MAX_EXEC_QUEUE_PRIORITY 4
329329 /** @info: array of elements containing the config info */
330330 __u64 info[];
331331 };
@@ -339,8 +339,8 @@ struct drm_xe_query_config { · 7 unmodified lines
339339 * implementing graphics and/or media operations.
340340 */
341341 struct drm_xe_query_gt {
342−#define XE_QUERY_GT_TYPE_MAIN 0
343−#define XE_QUERY_GT_TYPE_MEDIA 1
342+#define DRM_XE_QUERY_GT_TYPE_MAIN 0
343+#define DRM_XE_QUERY_GT_TYPE_MEDIA 1
344344 /** @type: GT type: Main or Media */
345345 __u16 type;
346346 /** @gt_id: Unique ID of this GT within the PCI Device */
@@ -400,7 +400,7 @@ struct drm_xe_query_topology_mask { · 53 unmodified lines
400400 * DSS_GEOMETRY ff ff ff ff 00 00 00 00
401401 * means 32 DSS are available for geometry.
402402 */
403−#define XE_TOPO_DSS_GEOMETRY (1 << 0)
403+#define DRM_XE_TOPO_DSS_GEOMETRY (1 << 0)
404404 /*
405405 * To query the mask of Dual Sub Slices (DSS) available for compute
406406 * operations. For example a query response containing the following
@@ -408,7 +408,7 @@ struct drm_xe_query_topology_mask { · 1 unmodified line
408408 * DSS_COMPUTE ff ff ff ff 00 00 00 00
409409 * means 32 DSS are available for compute.
410410 */
411−#define XE_TOPO_DSS_COMPUTE (1 << 1)
411+#define DRM_XE_TOPO_DSS_COMPUTE (1 << 1)
412412 /*
413413 * To query the mask of Execution Units (EU) available per Dual Sub
414414 * Slices (DSS). For example a query response containing the following
@@ -416,7 +416,7 @@ struct drm_xe_query_topology_mask { · 1 unmodified line
416416 * EU_PER_DSS ff ff 00 00 00 00 00 00
417417 * means each DSS has 16 EU.
418418 */
419−#define XE_TOPO_EU_PER_DSS (1 << 2)
419+#define DRM_XE_TOPO_EU_PER_DSS (1 << 2)
420420 /** @type: type of mask */
421421 __u16 type;
422422
@@ -497,8 +497,8 @@ struct drm_xe_gem_create { · 74 unmodified lines
497497 */
498498 __u64 size;
499499
500−#define XE_GEM_CREATE_FLAG_DEFER_BACKING (0x1 << 24)
501−#define XE_GEM_CREATE_FLAG_SCANOUT (0x1 << 25)
500+#define DRM_XE_GEM_CREATE_FLAG_DEFER_BACKING (0x1 << 24)
501+#define DRM_XE_GEM_CREATE_FLAG_SCANOUT (0x1 << 25)
502502 /*
503503 * When using VRAM as a possible placement, ensure that the corresponding VRAM
504504 * allocation will always use the CPU accessible part of VRAM. This is important
@@ -514,7 +514,7 @@ struct drm_xe_gem_create { · 9 unmodified lines
514514 * display surfaces, therefore the kernel requires setting this flag for such
515515 * objects, otherwise an error is thrown on small-bar systems.
516516 */
517−#define XE_GEM_CREATE_FLAG_NEEDS_VISIBLE_VRAM (0x1 << 26)
517+#define DRM_XE_GEM_CREATE_FLAG_NEEDS_VISIBLE_VRAM (0x1 << 26)
518518 /**
519519 * @flags: Flags, currently a mask of memory instances of where BO can
520520 * be placed
@@ -581,14 +581,14 @@ struct drm_xe_ext_set_property { · 60 unmodified lines
581581 };
582582
583583 struct drm_xe_vm_create {
584−#define XE_VM_EXTENSION_SET_PROPERTY 0
584+#define DRM_XE_VM_EXTENSION_SET_PROPERTY 0
585585 /** @extensions: Pointer to the first extension struct, if any */
586586 __u64 extensions;
587587
588−#define DRM_XE_VM_CREATE_SCRATCH_PAGE (0x1 << 0)
589−#define DRM_XE_VM_CREATE_COMPUTE_MODE (0x1 << 1)
590−#define DRM_XE_VM_CREATE_ASYNC_DEFAULT (0x1 << 2)
591−#define DRM_XE_VM_CREATE_FAULT_MODE (0x1 << 3)
588+#define DRM_XE_VM_CREATE_SCRATCH_PAGE (0x1 << 0)
589+#define DRM_XE_VM_CREATE_COMPUTE_MODE (0x1 << 1)
590+#define DRM_XE_VM_CREATE_ASYNC_DEFAULT (0x1 << 2)
591+#define DRM_XE_VM_CREATE_FAULT_MODE (0x1 << 3)
592592 /** @flags: Flags */
593593 __u32 flags;
594594
@@ -644,29 +644,29 @@ struct drm_xe_vm_bind_op { · 49 unmodified lines
644644 */
645645 __u64 tile_mask;
646646
647−#define XE_VM_BIND_OP_MAP 0x0
648−#define XE_VM_BIND_OP_UNMAP 0x1
649−#define XE_VM_BIND_OP_MAP_USERPTR 0x2
650−#define XE_VM_BIND_OP_UNMAP_ALL 0x3
651−#define XE_VM_BIND_OP_PREFETCH 0x4
647+#define DRM_XE_VM_BIND_OP_MAP 0x0
648+#define DRM_XE_VM_BIND_OP_UNMAP 0x1
649+#define DRM_XE_VM_BIND_OP_MAP_USERPTR 0x2
650+#define DRM_XE_VM_BIND_OP_UNMAP_ALL 0x3
651+#define DRM_XE_VM_BIND_OP_PREFETCH 0x4
652652 /** @op: Bind operation to perform */
653653 __u32 op;
654654
655−#define XE_VM_BIND_FLAG_READONLY (0x1 << 0)
656−#define XE_VM_BIND_FLAG_ASYNC (0x1 << 1)
655+#define DRM_XE_VM_BIND_FLAG_READONLY (0x1 << 0)
656+#define DRM_XE_VM_BIND_FLAG_ASYNC (0x1 << 1)
657657 /*
658658 * Valid on a faulting VM only, do the MAP operation immediately rather
659659 * than deferring the MAP to the page fault handler.
660660 */
661−#define XE_VM_BIND_FLAG_IMMEDIATE (0x1 << 2)
661+#define DRM_XE_VM_BIND_FLAG_IMMEDIATE (0x1 << 2)
662662 /*
663663 * When the NULL flag is set, the page tables are setup with a special
664664 * bit which indicates writes are dropped and all reads return zero. In
665− * the future, the NULL flags will only be valid for XE_VM_BIND_OP_MAP
665+ * the future, the NULL flags will only be valid for DRM_XE_VM_BIND_OP_MAP
666666 * operations, the BO handle MBZ, and the BO offset MBZ. This flag is
667667 * intended to implement VK sparse bindings.
668668 */
669−#define XE_VM_BIND_FLAG_NULL (0x1 << 3)
669+#define DRM_XE_VM_BIND_FLAG_NULL (0x1 << 3)
670670 /** @flags: Bind flags */
671671 __u32 flags;
672672
@@ -721,19 +721,19 @@ struct drm_xe_vm_bind { · 48 unmodified lines
721721 __u64 reserved[2];
722722 };
723723
724−/* For use with XE_EXEC_QUEUE_SET_PROPERTY_ACC_GRANULARITY */
724+/* For use with DRM_XE_EXEC_QUEUE_SET_PROPERTY_ACC_GRANULARITY */
725725
726726 /* Monitor 128KB contiguous region with 4K sub-granularity */
727−#define XE_ACC_GRANULARITY_128K 0
727+#define DRM_XE_ACC_GRANULARITY_128K 0
728728
729729 /* Monitor 2MB contiguous region with 64KB sub-granularity */
730−#define XE_ACC_GRANULARITY_2M 1
730+#define DRM_XE_ACC_GRANULARITY_2M 1
731731
732732 /* Monitor 16MB contiguous region with 512KB sub-granularity */
733−#define XE_ACC_GRANULARITY_16M 2
733+#define DRM_XE_ACC_GRANULARITY_16M 2
734734
735735 /* Monitor 64MB contiguous region with 2M sub-granularity */
736−#define XE_ACC_GRANULARITY_64M 3
736+#define DRM_XE_ACC_GRANULARITY_64M 3
737737
738738 /**
739739 * struct drm_xe_exec_queue_set_property - exec queue set property
@@ -747,14 +747,14 @@ struct drm_xe_exec_queue_set_property { · 7 unmodified lines
747747 /** @exec_queue_id: Exec queue ID */
748748 __u32 exec_queue_id;
749749
750−#define XE_EXEC_QUEUE_SET_PROPERTY_PRIORITY 0
751−#define XE_EXEC_QUEUE_SET_PROPERTY_TIMESLICE 1
752−#define XE_EXEC_QUEUE_SET_PROPERTY_PREEMPTION_TIMEOUT 2
753−#define XE_EXEC_QUEUE_SET_PROPERTY_PERSISTENCE 3
754−#define XE_EXEC_QUEUE_SET_PROPERTY_JOB_TIMEOUT 4
755−#define XE_EXEC_QUEUE_SET_PROPERTY_ACC_TRIGGER 5
756−#define XE_EXEC_QUEUE_SET_PROPERTY_ACC_NOTIFY 6
757−#define XE_EXEC_QUEUE_SET_PROPERTY_ACC_GRANULARITY 7
750+#define DRM_XE_EXEC_QUEUE_SET_PROPERTY_PRIORITY 0
751+#define DRM_XE_EXEC_QUEUE_SET_PROPERTY_TIMESLICE 1
752+#define DRM_XE_EXEC_QUEUE_SET_PROPERTY_PREEMPTION_TIMEOUT 2
753+#define DRM_XE_EXEC_QUEUE_SET_PROPERTY_PERSISTENCE 3
754+#define DRM_XE_EXEC_QUEUE_SET_PROPERTY_JOB_TIMEOUT 4
755+#define DRM_XE_EXEC_QUEUE_SET_PROPERTY_ACC_TRIGGER 5
756+#define DRM_XE_EXEC_QUEUE_SET_PROPERTY_ACC_NOTIFY 6
757+#define DRM_XE_EXEC_QUEUE_SET_PROPERTY_ACC_GRANULARITY 7
758758 /** @property: property to set */
759759 __u32 property;
760760
@@ -766,7 +766,7 @@ struct drm_xe_exec_queue_set_property { · 5 unmodified lines
766766 };
767767
768768 struct drm_xe_exec_queue_create {
769−#define XE_EXEC_QUEUE_EXTENSION_SET_PROPERTY 0
769+#define DRM_XE_EXEC_QUEUE_EXTENSION_SET_PROPERTY 0
770770 /** @extensions: Pointer to the first extension struct, if any */
771771 __u64 extensions;
772772
@@ -805,7 +805,7 @@ struct drm_xe_exec_queue_get_property { · 32 unmodified lines
805805 /** @exec_queue_id: Exec queue ID */
806806 __u32 exec_queue_id;
807807
808−#define XE_EXEC_QUEUE_GET_PROPERTY_BAN 0
808+#define DRM_XE_EXEC_QUEUE_GET_PROPERTY_BAN 0
809809 /** @property: property to get */
810810 __u32 property;
811811
@@ -973,11 +973,11 @@ struct drm_xe_wait_user_fence { · 161 unmodified lines
973973 /**
974974 * DOC: XE PMU event config IDs
975975 *
976− * Check 'man perf_event_open' to use the ID's XE_PMU_XXXX listed in xe_drm.h
976+ * Check 'man perf_event_open' to use the ID's DRM_XE_PMU_XXXX listed in xe_drm.h
977977 * in 'struct perf_event_attr' as part of perf_event_open syscall to read a
978978 * particular event.
979979 *
980− * For example to open the XE_PMU_RENDER_GROUP_BUSY(0):
980+ * For example to open the DRMXE_PMU_RENDER_GROUP_BUSY(0):
981981 *
982982 * .. code-block:: C
983983 *
@@ -991,7 +991,7 @@ struct drm_xe_wait_user_fence { · 7 unmodified lines
991991 * attr.read_format = PERF_FORMAT_TOTAL_TIME_ENABLED;
992992 * attr.use_clockid = 1;
993993 * attr.clockid = CLOCK_MONOTONIC;
994− * attr.config = XE_PMU_RENDER_GROUP_BUSY(0);
994+ * attr.config = DRM_XE_PMU_RENDER_GROUP_BUSY(0);
995995 *
996996 * fd = syscall(__NR_perf_event_open, &attr, -1, cpu, -1, 0);
997997 */
@@ -999,15 +999,15 @@ struct drm_xe_wait_user_fence { · 1 unmodified line
999999 /*
10001000 * Top bits of every counter are GT id.
10011001 */
1002−#define __XE_PMU_GT_SHIFT (56)
1002+#define __DRM_XE_PMU_GT_SHIFT (56)
10031003
1004−#define ___XE_PMU_OTHER(gt, x) \
1005− (((__u64)(x)) | ((__u64)(gt) << __XE_PMU_GT_SHIFT))
1004+#define ___DRM_XE_PMU_OTHER(gt, x) \
1005+ (((__u64)(x)) | ((__u64)(gt) << __DRM_XE_PMU_GT_SHIFT))
10061006
1007−#define XE_PMU_RENDER_GROUP_BUSY(gt) ___XE_PMU_OTHER(gt, 0)
1008−#define XE_PMU_COPY_GROUP_BUSY(gt) ___XE_PMU_OTHER(gt, 1)
1009−#define XE_PMU_MEDIA_GROUP_BUSY(gt) ___XE_PMU_OTHER(gt, 2)
1010−#define XE_PMU_ANY_ENGINE_GROUP_BUSY(gt) ___XE_PMU_OTHER(gt, 3)
1007+#define DRM_XE_PMU_RENDER_GROUP_BUSY(gt) ___DRM_XE_PMU_OTHER(gt, 0)
1008+#define DRM_XE_PMU_COPY_GROUP_BUSY(gt) ___DRM_XE_PMU_OTHER(gt, 1)
1009+#define DRM_XE_PMU_MEDIA_GROUP_BUSY(gt) ___DRM_XE_PMU_OTHER(gt, 2)
1010+#define DRM_XE_PMU_ANY_ENGINE_GROUP_BUSY(gt) ___DRM_XE_PMU_OTHER(gt, 3)
10111011
10121012 #if defined(__cplusplus)
10131013 }