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drm/xe/uapi: Add missing DRM_ prefix in uAPI constants

Most constants defined in xe_drm.h use DRM_XE_ as prefix which is helpful to identify the name space. Make this systematic and add this prefix where it was missing. v2: - fix vertical alignment of define values - remove double DRM_ in some variables (José Roberto de Souza) v3: Rebase

Francois Dugast committed 3 years ago

Commit d5dc73d1 parent b646ce98 files · +140 −140Browse files

Showing the changes to include/uapi/drm (1 of 8 files). Show all

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include/uapi/drm/xe_drm.h+62−62
@@ -19,12 +19,12 @@ extern "C" { · 18 unmodified lines
19/**19/**
20 * DOC: uevent generated by xe on it's pci node.20 * DOC: uevent generated by xe on it's pci node.
21 *21 *
22 * XE_RESET_FAILED_UEVENT - Event is generated when attempt to reset gt22 * DRM_XE_RESET_FAILED_UEVENT - Event is generated when attempt to reset gt
23 * fails. The value supplied with the event is always "NEEDS_RESET".23 * fails. The value supplied with the event is always "NEEDS_RESET".
24 * Additional information supplied is tile id and gt id of the gt unit for24 * Additional information supplied is tile id and gt id of the gt unit for
25 * which reset has failed.25 * which reset has failed.
26 */26 */
27#define XE_RESET_FAILED_UEVENT "DEVICE_STATUS"27#define DRM_XE_RESET_FAILED_UEVENT "DEVICE_STATUS"
28 28
29/**29/**
30 * struct xe_user_extension - Base class for defining a chain of extensions30 * struct xe_user_extension - Base class for defining a chain of extensions
@@ -148,14 +148,14 @@ struct drm_xe_engine_class_instance { · 117 unmodified lines
148 * enum drm_xe_memory_class - Supported memory classes.148 * enum drm_xe_memory_class - Supported memory classes.
149 */149 */
150enum drm_xe_memory_class {150enum drm_xe_memory_class {
151 /** @XE_MEM_REGION_CLASS_SYSMEM: Represents system memory. */151 /** @DRM_XE_MEM_REGION_CLASS_SYSMEM: Represents system memory. */
152 XE_MEM_REGION_CLASS_SYSMEM = 0,152 DRM_XE_MEM_REGION_CLASS_SYSMEM = 0,
153 /**153 /**
154 * @XE_MEM_REGION_CLASS_VRAM: On discrete platforms, this154 * @DRM_XE_MEM_REGION_CLASS_VRAM: On discrete platforms, this
155 * represents the memory that is local to the device, which we155 * represents the memory that is local to the device, which we
156 * call VRAM. Not valid on integrated platforms.156 * call VRAM. Not valid on integrated platforms.
157 */157 */
158 XE_MEM_REGION_CLASS_VRAM158 DRM_XE_MEM_REGION_CLASS_VRAM
159};159};
160 160
161/**161/**
@@ -215,7 +215,7 @@ struct drm_xe_query_mem_region { · 53 unmodified lines
215 * always equal the @total_size, since all of it will be CPU215 * always equal the @total_size, since all of it will be CPU
216 * accessible.216 * accessible.
217 *217 *
218 * Note this is only tracked for XE_MEM_REGION_CLASS_VRAM218 * Note this is only tracked for DRM_XE_MEM_REGION_CLASS_VRAM
219 * regions (for other types the value here will always equal219 * regions (for other types the value here will always equal
220 * zero).220 * zero).
221 */221 */
@@ -227,7 +227,7 @@ struct drm_xe_query_mem_region { · 5 unmodified lines
227 * Requires CAP_PERFMON or CAP_SYS_ADMIN to get reliable227 * Requires CAP_PERFMON or CAP_SYS_ADMIN to get reliable
228 * accounting. Without this the value here will always equal228 * accounting. Without this the value here will always equal
229 * zero. Note this is only currently tracked for229 * zero. Note this is only currently tracked for
230 * XE_MEM_REGION_CLASS_VRAM regions (for other types the value230 * DRM_XE_MEM_REGION_CLASS_VRAM regions (for other types the value
231 * here will always be zero).231 * here will always be zero).
232 */232 */
233 __u64 cpu_visible_used;233 __u64 cpu_visible_used;
@@ -320,12 +320,12 @@ struct drm_xe_query_config { · 86 unmodified lines
320 /** @pad: MBZ */320 /** @pad: MBZ */
321 __u32 pad;321 __u32 pad;
322 322
323#define XE_QUERY_CONFIG_REV_AND_DEVICE_ID 0323#define DRM_XE_QUERY_CONFIG_REV_AND_DEVICE_ID 0
324#define XE_QUERY_CONFIG_FLAGS 1324#define DRM_XE_QUERY_CONFIG_FLAGS 1
325 #define XE_QUERY_CONFIG_FLAGS_HAS_VRAM (0x1 << 0)325 #define DRM_XE_QUERY_CONFIG_FLAGS_HAS_VRAM (0x1 << 0)
326#define XE_QUERY_CONFIG_MIN_ALIGNMENT 2326#define DRM_XE_QUERY_CONFIG_MIN_ALIGNMENT 2
327#define XE_QUERY_CONFIG_VA_BITS 3327#define DRM_XE_QUERY_CONFIG_VA_BITS 3
328#define XE_QUERY_CONFIG_MAX_EXEC_QUEUE_PRIORITY 4328#define DRM_XE_QUERY_CONFIG_MAX_EXEC_QUEUE_PRIORITY 4
329 /** @info: array of elements containing the config info */329 /** @info: array of elements containing the config info */
330 __u64 info[];330 __u64 info[];
331};331};
@@ -339,8 +339,8 @@ struct drm_xe_query_config { · 7 unmodified lines
339 * implementing graphics and/or media operations.339 * implementing graphics and/or media operations.
340 */340 */
341struct drm_xe_query_gt {341struct drm_xe_query_gt {
342#define XE_QUERY_GT_TYPE_MAIN 0342#define DRM_XE_QUERY_GT_TYPE_MAIN 0
343#define XE_QUERY_GT_TYPE_MEDIA 1343#define DRM_XE_QUERY_GT_TYPE_MEDIA 1
344 /** @type: GT type: Main or Media */344 /** @type: GT type: Main or Media */
345 __u16 type;345 __u16 type;
346 /** @gt_id: Unique ID of this GT within the PCI Device */346 /** @gt_id: Unique ID of this GT within the PCI Device */
@@ -400,7 +400,7 @@ struct drm_xe_query_topology_mask { · 53 unmodified lines
400 * DSS_GEOMETRY ff ff ff ff 00 00 00 00400 * DSS_GEOMETRY ff ff ff ff 00 00 00 00
401 * means 32 DSS are available for geometry.401 * means 32 DSS are available for geometry.
402 */402 */
403#define XE_TOPO_DSS_GEOMETRY (1 << 0)403#define DRM_XE_TOPO_DSS_GEOMETRY (1 << 0)
404 /*404 /*
405 * To query the mask of Dual Sub Slices (DSS) available for compute405 * To query the mask of Dual Sub Slices (DSS) available for compute
406 * operations. For example a query response containing the following406 * operations. For example a query response containing the following
@@ -408,7 +408,7 @@ struct drm_xe_query_topology_mask { · 1 unmodified line
408 * DSS_COMPUTE ff ff ff ff 00 00 00 00408 * DSS_COMPUTE ff ff ff ff 00 00 00 00
409 * means 32 DSS are available for compute.409 * means 32 DSS are available for compute.
410 */410 */
411#define XE_TOPO_DSS_COMPUTE (1 << 1)411#define DRM_XE_TOPO_DSS_COMPUTE (1 << 1)
412 /*412 /*
413 * To query the mask of Execution Units (EU) available per Dual Sub413 * To query the mask of Execution Units (EU) available per Dual Sub
414 * Slices (DSS). For example a query response containing the following414 * Slices (DSS). For example a query response containing the following
@@ -416,7 +416,7 @@ struct drm_xe_query_topology_mask { · 1 unmodified line
416 * EU_PER_DSS ff ff 00 00 00 00 00 00416 * EU_PER_DSS ff ff 00 00 00 00 00 00
417 * means each DSS has 16 EU.417 * means each DSS has 16 EU.
418 */418 */
419#define XE_TOPO_EU_PER_DSS (1 << 2)419#define DRM_XE_TOPO_EU_PER_DSS (1 << 2)
420 /** @type: type of mask */420 /** @type: type of mask */
421 __u16 type;421 __u16 type;
422 422
@@ -497,8 +497,8 @@ struct drm_xe_gem_create { · 74 unmodified lines
497 */497 */
498 __u64 size;498 __u64 size;
499 499
500#define XE_GEM_CREATE_FLAG_DEFER_BACKING (0x1 << 24)500#define DRM_XE_GEM_CREATE_FLAG_DEFER_BACKING (0x1 << 24)
501#define XE_GEM_CREATE_FLAG_SCANOUT (0x1 << 25)501#define DRM_XE_GEM_CREATE_FLAG_SCANOUT (0x1 << 25)
502/*502/*
503 * When using VRAM as a possible placement, ensure that the corresponding VRAM503 * When using VRAM as a possible placement, ensure that the corresponding VRAM
504 * allocation will always use the CPU accessible part of VRAM. This is important504 * allocation will always use the CPU accessible part of VRAM. This is important
@@ -514,7 +514,7 @@ struct drm_xe_gem_create { · 9 unmodified lines
514 * display surfaces, therefore the kernel requires setting this flag for such514 * display surfaces, therefore the kernel requires setting this flag for such
515 * objects, otherwise an error is thrown on small-bar systems.515 * objects, otherwise an error is thrown on small-bar systems.
516 */516 */
517#define XE_GEM_CREATE_FLAG_NEEDS_VISIBLE_VRAM (0x1 << 26)517#define DRM_XE_GEM_CREATE_FLAG_NEEDS_VISIBLE_VRAM (0x1 << 26)
518 /**518 /**
519 * @flags: Flags, currently a mask of memory instances of where BO can519 * @flags: Flags, currently a mask of memory instances of where BO can
520 * be placed520 * be placed
@@ -581,14 +581,14 @@ struct drm_xe_ext_set_property { · 60 unmodified lines
581};581};
582 582
583struct drm_xe_vm_create {583struct drm_xe_vm_create {
584#define XE_VM_EXTENSION_SET_PROPERTY 0584#define DRM_XE_VM_EXTENSION_SET_PROPERTY 0
585 /** @extensions: Pointer to the first extension struct, if any */585 /** @extensions: Pointer to the first extension struct, if any */
586 __u64 extensions;586 __u64 extensions;
587 587
588#define DRM_XE_VM_CREATE_SCRATCH_PAGE (0x1 << 0)588#define DRM_XE_VM_CREATE_SCRATCH_PAGE (0x1 << 0)
589#define DRM_XE_VM_CREATE_COMPUTE_MODE (0x1 << 1)589#define DRM_XE_VM_CREATE_COMPUTE_MODE (0x1 << 1)
590#define DRM_XE_VM_CREATE_ASYNC_DEFAULT (0x1 << 2)590#define DRM_XE_VM_CREATE_ASYNC_DEFAULT (0x1 << 2)
591#define DRM_XE_VM_CREATE_FAULT_MODE (0x1 << 3)591#define DRM_XE_VM_CREATE_FAULT_MODE (0x1 << 3)
592 /** @flags: Flags */592 /** @flags: Flags */
593 __u32 flags;593 __u32 flags;
594 594
@@ -644,29 +644,29 @@ struct drm_xe_vm_bind_op { · 49 unmodified lines
644 */644 */
645 __u64 tile_mask;645 __u64 tile_mask;
646 646
647#define XE_VM_BIND_OP_MAP 0x0647#define DRM_XE_VM_BIND_OP_MAP 0x0
648#define XE_VM_BIND_OP_UNMAP 0x1648#define DRM_XE_VM_BIND_OP_UNMAP 0x1
649#define XE_VM_BIND_OP_MAP_USERPTR 0x2649#define DRM_XE_VM_BIND_OP_MAP_USERPTR 0x2
650#define XE_VM_BIND_OP_UNMAP_ALL 0x3650#define DRM_XE_VM_BIND_OP_UNMAP_ALL 0x3
651#define XE_VM_BIND_OP_PREFETCH 0x4651#define DRM_XE_VM_BIND_OP_PREFETCH 0x4
652 /** @op: Bind operation to perform */652 /** @op: Bind operation to perform */
653 __u32 op;653 __u32 op;
654 654
655#define XE_VM_BIND_FLAG_READONLY (0x1 << 0)655#define DRM_XE_VM_BIND_FLAG_READONLY (0x1 << 0)
656#define XE_VM_BIND_FLAG_ASYNC (0x1 << 1)656#define DRM_XE_VM_BIND_FLAG_ASYNC (0x1 << 1)
657 /*657 /*
658 * Valid on a faulting VM only, do the MAP operation immediately rather658 * Valid on a faulting VM only, do the MAP operation immediately rather
659 * than deferring the MAP to the page fault handler.659 * than deferring the MAP to the page fault handler.
660 */660 */
661#define XE_VM_BIND_FLAG_IMMEDIATE (0x1 << 2)661#define DRM_XE_VM_BIND_FLAG_IMMEDIATE (0x1 << 2)
662 /*662 /*
663 * When the NULL flag is set, the page tables are setup with a special663 * When the NULL flag is set, the page tables are setup with a special
664 * bit which indicates writes are dropped and all reads return zero. In664 * bit which indicates writes are dropped and all reads return zero. In
665 * the future, the NULL flags will only be valid for XE_VM_BIND_OP_MAP665 * the future, the NULL flags will only be valid for DRM_XE_VM_BIND_OP_MAP
666 * operations, the BO handle MBZ, and the BO offset MBZ. This flag is666 * operations, the BO handle MBZ, and the BO offset MBZ. This flag is
667 * intended to implement VK sparse bindings.667 * intended to implement VK sparse bindings.
668 */668 */
669#define XE_VM_BIND_FLAG_NULL (0x1 << 3)669#define DRM_XE_VM_BIND_FLAG_NULL (0x1 << 3)
670 /** @flags: Bind flags */670 /** @flags: Bind flags */
671 __u32 flags;671 __u32 flags;
672 672
@@ -721,19 +721,19 @@ struct drm_xe_vm_bind { · 48 unmodified lines
721 __u64 reserved[2];721 __u64 reserved[2];
722};722};
723 723
724/* For use with XE_EXEC_QUEUE_SET_PROPERTY_ACC_GRANULARITY */724/* For use with DRM_XE_EXEC_QUEUE_SET_PROPERTY_ACC_GRANULARITY */
725 725
726/* Monitor 128KB contiguous region with 4K sub-granularity */726/* Monitor 128KB contiguous region with 4K sub-granularity */
727#define XE_ACC_GRANULARITY_128K 0727#define DRM_XE_ACC_GRANULARITY_128K 0
728 728
729/* Monitor 2MB contiguous region with 64KB sub-granularity */729/* Monitor 2MB contiguous region with 64KB sub-granularity */
730#define XE_ACC_GRANULARITY_2M 1730#define DRM_XE_ACC_GRANULARITY_2M 1
731 731
732/* Monitor 16MB contiguous region with 512KB sub-granularity */732/* Monitor 16MB contiguous region with 512KB sub-granularity */
733#define XE_ACC_GRANULARITY_16M 2733#define DRM_XE_ACC_GRANULARITY_16M 2
734 734
735/* Monitor 64MB contiguous region with 2M sub-granularity */735/* Monitor 64MB contiguous region with 2M sub-granularity */
736#define XE_ACC_GRANULARITY_64M 3736#define DRM_XE_ACC_GRANULARITY_64M 3
737 737
738/**738/**
739 * struct drm_xe_exec_queue_set_property - exec queue set property739 * struct drm_xe_exec_queue_set_property - exec queue set property
@@ -747,14 +747,14 @@ struct drm_xe_exec_queue_set_property { · 7 unmodified lines
747 /** @exec_queue_id: Exec queue ID */747 /** @exec_queue_id: Exec queue ID */
748 __u32 exec_queue_id;748 __u32 exec_queue_id;
749 749
750#define XE_EXEC_QUEUE_SET_PROPERTY_PRIORITY 0750#define DRM_XE_EXEC_QUEUE_SET_PROPERTY_PRIORITY 0
751#define XE_EXEC_QUEUE_SET_PROPERTY_TIMESLICE 1751#define DRM_XE_EXEC_QUEUE_SET_PROPERTY_TIMESLICE 1
752#define XE_EXEC_QUEUE_SET_PROPERTY_PREEMPTION_TIMEOUT 2752#define DRM_XE_EXEC_QUEUE_SET_PROPERTY_PREEMPTION_TIMEOUT 2
753#define XE_EXEC_QUEUE_SET_PROPERTY_PERSISTENCE 3753#define DRM_XE_EXEC_QUEUE_SET_PROPERTY_PERSISTENCE 3
754#define XE_EXEC_QUEUE_SET_PROPERTY_JOB_TIMEOUT 4754#define DRM_XE_EXEC_QUEUE_SET_PROPERTY_JOB_TIMEOUT 4
755#define XE_EXEC_QUEUE_SET_PROPERTY_ACC_TRIGGER 5755#define DRM_XE_EXEC_QUEUE_SET_PROPERTY_ACC_TRIGGER 5
756#define XE_EXEC_QUEUE_SET_PROPERTY_ACC_NOTIFY 6756#define DRM_XE_EXEC_QUEUE_SET_PROPERTY_ACC_NOTIFY 6
757#define XE_EXEC_QUEUE_SET_PROPERTY_ACC_GRANULARITY 7757#define DRM_XE_EXEC_QUEUE_SET_PROPERTY_ACC_GRANULARITY 7
758 /** @property: property to set */758 /** @property: property to set */
759 __u32 property;759 __u32 property;
760 760
@@ -766,7 +766,7 @@ struct drm_xe_exec_queue_set_property { · 5 unmodified lines
766};766};
767 767
768struct drm_xe_exec_queue_create {768struct drm_xe_exec_queue_create {
769#define XE_EXEC_QUEUE_EXTENSION_SET_PROPERTY 0769#define DRM_XE_EXEC_QUEUE_EXTENSION_SET_PROPERTY 0
770 /** @extensions: Pointer to the first extension struct, if any */770 /** @extensions: Pointer to the first extension struct, if any */
771 __u64 extensions;771 __u64 extensions;
772 772
@@ -805,7 +805,7 @@ struct drm_xe_exec_queue_get_property { · 32 unmodified lines
805 /** @exec_queue_id: Exec queue ID */805 /** @exec_queue_id: Exec queue ID */
806 __u32 exec_queue_id;806 __u32 exec_queue_id;
807 807
808#define XE_EXEC_QUEUE_GET_PROPERTY_BAN 0808#define DRM_XE_EXEC_QUEUE_GET_PROPERTY_BAN 0
809 /** @property: property to get */809 /** @property: property to get */
810 __u32 property;810 __u32 property;
811 811
@@ -973,11 +973,11 @@ struct drm_xe_wait_user_fence { · 161 unmodified lines
973/**973/**
974 * DOC: XE PMU event config IDs974 * DOC: XE PMU event config IDs
975 *975 *
976 * Check 'man perf_event_open' to use the ID's XE_PMU_XXXX listed in xe_drm.h976 * Check 'man perf_event_open' to use the ID's DRM_XE_PMU_XXXX listed in xe_drm.h
977 * in 'struct perf_event_attr' as part of perf_event_open syscall to read a977 * in 'struct perf_event_attr' as part of perf_event_open syscall to read a
978 * particular event.978 * particular event.
979 *979 *
980 * For example to open the XE_PMU_RENDER_GROUP_BUSY(0):980 * For example to open the DRMXE_PMU_RENDER_GROUP_BUSY(0):
981 *981 *
982 * .. code-block:: C982 * .. code-block:: C
983 *983 *
@@ -991,7 +991,7 @@ struct drm_xe_wait_user_fence { · 7 unmodified lines
991 * attr.read_format = PERF_FORMAT_TOTAL_TIME_ENABLED;991 * attr.read_format = PERF_FORMAT_TOTAL_TIME_ENABLED;
992 * attr.use_clockid = 1;992 * attr.use_clockid = 1;
993 * attr.clockid = CLOCK_MONOTONIC;993 * attr.clockid = CLOCK_MONOTONIC;
994 * attr.config = XE_PMU_RENDER_GROUP_BUSY(0);994 * attr.config = DRM_XE_PMU_RENDER_GROUP_BUSY(0);
995 *995 *
996 * fd = syscall(__NR_perf_event_open, &attr, -1, cpu, -1, 0);996 * fd = syscall(__NR_perf_event_open, &attr, -1, cpu, -1, 0);
997 */997 */
@@ -999,15 +999,15 @@ struct drm_xe_wait_user_fence { · 1 unmodified line
999/*999/*
1000 * Top bits of every counter are GT id.1000 * Top bits of every counter are GT id.
1001 */1001 */
1002#define __XE_PMU_GT_SHIFT (56)1002#define __DRM_XE_PMU_GT_SHIFT (56)
1003 1003
1004#define ___XE_PMU_OTHER(gt, x) \1004#define ___DRM_XE_PMU_OTHER(gt, x) \
1005 (((__u64)(x)) | ((__u64)(gt) << __XE_PMU_GT_SHIFT))1005 (((__u64)(x)) | ((__u64)(gt) << __DRM_XE_PMU_GT_SHIFT))
1006 1006
1007#define XE_PMU_RENDER_GROUP_BUSY(gt) ___XE_PMU_OTHER(gt, 0)1007#define DRM_XE_PMU_RENDER_GROUP_BUSY(gt) ___DRM_XE_PMU_OTHER(gt, 0)
1008#define XE_PMU_COPY_GROUP_BUSY(gt) ___XE_PMU_OTHER(gt, 1)1008#define DRM_XE_PMU_COPY_GROUP_BUSY(gt) ___DRM_XE_PMU_OTHER(gt, 1)
1009#define XE_PMU_MEDIA_GROUP_BUSY(gt) ___XE_PMU_OTHER(gt, 2)1009#define DRM_XE_PMU_MEDIA_GROUP_BUSY(gt) ___DRM_XE_PMU_OTHER(gt, 2)
1010#define XE_PMU_ANY_ENGINE_GROUP_BUSY(gt) ___XE_PMU_OTHER(gt, 3)1010#define DRM_XE_PMU_ANY_ENGINE_GROUP_BUSY(gt) ___DRM_XE_PMU_OTHER(gt, 3)
1011 1011
1012#if defined(__cplusplus)1012#if defined(__cplusplus)
1013}1013}