History

Merge tag 'arm-fixes-5.8-1' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM SoC fixes from Arnd Bergmann: "Here are a couple of bug fixes, mostly for devicetree files NXP i.MX: - Use correct voltage on some i.MX8M board device trees to avoid hardware damage - Code fixes for a compiler warning and incorrect reference counting, both harmless. - Fix the i.MX8M SoC driver to correctly identify imx8mp - Fix watchdog configuration in imx6ul-kontron device tree. Broadcom: - A small regression fix for the Raspberry-Pi firmware driver - A Kconfig change to use the correct timer driver on Northstar - A DT fix for the Luxul XWC-2000 machine - Two more DT fixes for NSP SoCs STmicroelectronics STI - Revert one broken patch for L2 cache configuration ARM Versatile Express: - Fix a regression by reverting a broken DT cleanup TEE drivers: - MAINTAINERS: change tee mailing list" * tag 'arm-fixes-5.8-1' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: Revert "ARM: sti: Implement dummy L2 cache's write_sec" soc: imx8m: fix build warning ARM: imx6: add missing put_device() call in imx6q_suspend_init() ARM: imx5: add missing put_device() call in imx_suspend_alloc_ocram() soc: imx8m: Correct i.MX8MP UID fuse offset ARM: dts: imx6ul-kontron: Change WDOG_ANY signal from push-pull to open-drain ARM: dts: imx6ul-kontron: Move watchdog from Kontron i.MX6UL/ULL board to SoM arm64: dts: imx8mm-beacon: Fix voltages on LDO1 and LDO2 arm64: dts: imx8mn-ddr4-evk: correct ldo1/ldo2 voltage range arm64: dts: imx8mm-evk: correct ldo1/ldo2 voltage range ARM: dts: NSP: Correct FA2 mailbox node ARM: bcm2835: Fix integer overflow in rpi_firmware_print_firmware_revision() MAINTAINERS: change tee mailing list ARM: dts: NSP: Disable PL330 by default, add dma-coherent property ARM: bcm: Select ARM_TIMER_SP804 for ARCH_BCM_NSP ARM: dts: BCM5301X: Add missing memory "device_type" for Luxul XWC-2000 arm: dts: vexpress: Move mcc node back into motherboard node

Linus Torvalds committed 6 years ago

Commit e44b59c2 parents 668f532 42d3f7e22 files · +152 −118Browse files

Unified · Split

22 files
  1. MAINTAINERS +3 −3
  2. arch/arm/boot/dts/bcm-nsp.dtsi +6 −4
  3. arch/arm/boot/dts/bcm47094-luxul-xwc-2000.dts +1 −0
  4. arch/arm/boot/dts/bcm958522er.dts +4 −0
  5. arch/arm/boot/dts/bcm958525er.dts +4 −0
  6. arch/arm/boot/dts/bcm958525xmc.dts +4 −0
  7. arch/arm/boot/dts/bcm958622hr.dts +4 −0
  8. arch/arm/boot/dts/bcm958623hr.dts +4 −0
  9. arch/arm/boot/dts/bcm958625hr.dts +4 −0
  10. arch/arm/boot/dts/bcm958625k.dts +4 −0
  11. arch/arm/boot/dts/imx6ul-kontron-n6x1x-s.dtsi +0 −13
  12. arch/arm/boot/dts/imx6ul-kontron-n6x1x-som-common.dtsi +13 −0
  13. arch/arm/boot/dts/vexpress-v2m-rs1.dtsi +73 −73
  14. arch/arm/mach-bcm/Kconfig +1 −0
  15. arch/arm/mach-imx/pm-imx5.c +4 −2
  16. arch/arm/mach-imx/pm-imx6.c +6 −4
  17. arch/arm/mach-sti/board-dt.c +0 −9
  18. arch/arm64/boot/dts/freescale/imx8mm-beacon-som.dtsi +2 −2
  19. arch/arm64/boot/dts/freescale/imx8mm-evk.dts +2 −2
  20. arch/arm64/boot/dts/freescale/imx8mn-ddr4-evk.dts +2 −2
  21. drivers/firmware/raspberrypi.c +4 −1
  22. drivers/soc/imx/soc-imx8m.c +7 −3
MAINTAINERS+3−3
@@ -12695,13 +12695,13 @@ F: arch/mips/boot/dts/ralink/omega2p.dts · 12694 unmodified lines
1269512695
1269612696 OP-TEE DRIVER
1269712697 M: Jens Wiklander <jens.wiklander@linaro.org>
12698−L: tee-dev@lists.linaro.org
12698+L: op-tee@lists.trustedfirmware.org
1269912699 S: Maintained
1270012700 F: drivers/tee/optee/
1270112701
1270212702 OP-TEE RANDOM NUMBER GENERATOR (RNG) DRIVER
1270312703 M: Sumit Garg <sumit.garg@linaro.org>
12704−L: tee-dev@lists.linaro.org
12704+L: op-tee@lists.trustedfirmware.org
1270512705 S: Maintained
1270612706 F: drivers/char/hw_random/optee-rng.c
1270712707
@@ -16774,7 +16774,7 @@ F: include/media/i2c/tw9910.h · 4066 unmodified lines
1677416774
1677516775 TEE SUBSYSTEM
1677616776 M: Jens Wiklander <jens.wiklander@linaro.org>
16777−L: tee-dev@lists.linaro.org
16777+L: op-tee@lists.trustedfirmware.org
1677816778 S: Maintained
1677916779 F: Documentation/tee.txt
1678016780 F: drivers/tee/
arch/arm/boot/dts/bcm-nsp.dtsi+6−4
@@ -200,7 +200,7 @@ · 199 unmodified lines
200200 status = "disabled";
201201 };
202202
203− dma@20000 {
203+ dma: dma@20000 {
204204 compatible = "arm,pl330", "arm,primecell";
205205 reg = <0x20000 0x1000>;
206206 interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
@@ -215,6 +215,8 @@ · 8 unmodified lines
215215 clocks = <&iprocslow>;
216216 clock-names = "apb_pclk";
217217 #dma-cells = <1>;
218+ dma-coherent;
219+ status = "disabled";
218220 };
219221
220222 sdio: sdhci@21000 {
@@ -257,10 +259,10 @@ · 36 unmodified lines
257259 status = "disabled";
258260 };
259261
260− mailbox: mailbox@25000 {
262+ mailbox: mailbox@25c00 {
261263 compatible = "brcm,iproc-fa2-mbox";
262− reg = <0x25000 0x445>;
263− interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
264+ reg = <0x25c00 0x400>;
265+ interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>;
264266 #mbox-cells = <1>;
265267 brcm,rx-status-len = <32>;
266268 brcm,use-bcm-hdr;
arch/arm/boot/dts/bcm47094-luxul-xwc-2000.dts+1−0
@@ -17,6 +17,7 @@ · 16 unmodified lines
1717 };
1818
1919 memory {
20+ device_type = "memory";
2021 reg = <0x00000000 0x08000000
2122 0x88000000 0x18000000>;
2223 };
arch/arm/boot/dts/bcm958522er.dts+4−0
@@ -58,6 +58,10 @@ · 57 unmodified lines
5858
5959 /* USB 3 support needed to be complete */
6060
61+&dma {
62+ status = "okay";
63+};
64+
6165 &amac0 {
6266 status = "okay";
6367 };
arch/arm/boot/dts/bcm958525er.dts+4−0
@@ -58,6 +58,10 @@ · 57 unmodified lines
5858
5959 /* USB 3 support needed to be complete */
6060
61+&dma {
62+ status = "okay";
63+};
64+
6165 &amac0 {
6266 status = "okay";
6367 };
arch/arm/boot/dts/bcm958525xmc.dts+4−0
@@ -58,6 +58,10 @@ · 57 unmodified lines
5858
5959 /* XHCI support needed to be complete */
6060
61+&dma {
62+ status = "okay";
63+};
64+
6165 &amac0 {
6266 status = "okay";
6367 };
arch/arm/boot/dts/bcm958622hr.dts+4−0
@@ -58,6 +58,10 @@ · 57 unmodified lines
5858
5959 /* USB 3 and SLIC support needed to be complete */
6060
61+&dma {
62+ status = "okay";
63+};
64+
6165 &amac0 {
6266 status = "okay";
6367 };
arch/arm/boot/dts/bcm958623hr.dts+4−0
@@ -58,6 +58,10 @@ · 57 unmodified lines
5858
5959 /* USB 3 and SLIC support needed to be complete */
6060
61+&dma {
62+ status = "okay";
63+};
64+
6165 &amac0 {
6266 status = "okay";
6367 };
arch/arm/boot/dts/bcm958625hr.dts+4−0
@@ -69,6 +69,10 @@ · 68 unmodified lines
6969 status = "okay";
7070 };
7171
72+&dma {
73+ status = "okay";
74+};
75+
7276 &amac0 {
7377 status = "okay";
7478 };
arch/arm/boot/dts/bcm958625k.dts+4−0
@@ -48,6 +48,10 @@ · 47 unmodified lines
4848 };
4949 };
5050
51+&dma {
52+ status = "okay";
53+};
54+
5155 &amac0 {
5256 status = "okay";
5357 };
arch/arm/boot/dts/imx6ul-kontron-n6x1x-s.dtsi+0−13
@@ -232,13 +232,6 @@ · 231 unmodified lines
232232 status = "okay";
233233 };
234234
235−&wdog1 {
236− pinctrl-names = "default";
237− pinctrl-0 = <&pinctrl_wdog>;
238− fsl,ext-reset-output;
239− status = "okay";
240−};
241−
242235 &iomuxc {
243236 pinctrl-0 = <&pinctrl_reset_out &pinctrl_gpio>;
244237
@@ -409,10 +402,4 @@ · 164 unmodified lines
409402 MX6UL_PAD_NAND_DATA03__USDHC2_DATA3 0x170f9
410403 >;
411404 };
412−
413− pinctrl_wdog: wdoggrp {
414− fsl,pins = <
415− MX6UL_PAD_GPIO1_IO09__WDOG1_WDOG_ANY 0x30b0
416− >;
417− };
418405 };
arch/arm/boot/dts/imx6ul-kontron-n6x1x-som-common.dtsi+13−0
@@ -57,6 +57,13 @@ · 56 unmodified lines
5757 status = "okay";
5858 };
5959
60+&wdog1 {
61+ pinctrl-names = "default";
62+ pinctrl-0 = <&pinctrl_wdog>;
63+ fsl,ext-reset-output;
64+ status = "okay";
65+};
66+
6067 &iomuxc {
6168 pinctrl-names = "default";
6269 pinctrl-0 = <&pinctrl_reset_out>;
@@ -106,4 +113,10 @@ · 43 unmodified lines
106113 MX6UL_PAD_SNVS_TAMPER9__GPIO5_IO09 0x1b0b0
107114 >;
108115 };
116+
117+ pinctrl_wdog: wdoggrp {
118+ fsl,pins = <
119+ MX6UL_PAD_GPIO1_IO09__WDOG1_WDOG_ANY 0x18b0
120+ >;
121+ };
109122 };
arch/arm/boot/dts/vexpress-v2m-rs1.dtsi+73−73
@@ -100,79 +100,6 @@ · 99 unmodified lines
100100 };
101101 };
102102
103− mcc {
104− compatible = "arm,vexpress,config-bus";
105− arm,vexpress,config-bridge = <&v2m_sysreg>;
106−
107− oscclk0 {
108− /* MCC static memory clock */
109− compatible = "arm,vexpress-osc";
110− arm,vexpress-sysreg,func = <1 0>;
111− freq-range = <25000000 60000000>;
112− #clock-cells = <0>;
113− clock-output-names = "v2m:oscclk0";
114− };
115−
116− v2m_oscclk1: oscclk1 {
117− /* CLCD clock */
118− compatible = "arm,vexpress-osc";
119− arm,vexpress-sysreg,func = <1 1>;
120− freq-range = <23750000 65000000>;
121− #clock-cells = <0>;
122− clock-output-names = "v2m:oscclk1";
123− };
124−
125− v2m_oscclk2: oscclk2 {
126− /* IO FPGA peripheral clock */
127− compatible = "arm,vexpress-osc";
128− arm,vexpress-sysreg,func = <1 2>;
129− freq-range = <24000000 24000000>;
130− #clock-cells = <0>;
131− clock-output-names = "v2m:oscclk2";
132− };
133−
134− volt-vio {
135− /* Logic level voltage */
136− compatible = "arm,vexpress-volt";
137− arm,vexpress-sysreg,func = <2 0>;
138− regulator-name = "VIO";
139− regulator-always-on;
140− label = "VIO";
141− };
142−
143− temp-mcc {
144− /* MCC internal operating temperature */
145− compatible = "arm,vexpress-temp";
146− arm,vexpress-sysreg,func = <4 0>;
147− label = "MCC";
148− };
149−
150− reset {
151− compatible = "arm,vexpress-reset";
152− arm,vexpress-sysreg,func = <5 0>;
153− };
154−
155− muxfpga {
156− compatible = "arm,vexpress-muxfpga";
157− arm,vexpress-sysreg,func = <7 0>;
158− };
159−
160− shutdown {
161− compatible = "arm,vexpress-shutdown";
162− arm,vexpress-sysreg,func = <8 0>;
163− };
164−
165− reboot {
166− compatible = "arm,vexpress-reboot";
167− arm,vexpress-sysreg,func = <9 0>;
168− };
169−
170− dvimode {
171− compatible = "arm,vexpress-dvimode";
172− arm,vexpress-sysreg,func = <11 0>;
173− };
174− };
175−
176103 bus@8000000 {
177104 motherboard-bus {
178105 model = "V2M-P1";
@@ -435,6 +362,79 @@ · 256 unmodified lines
435362 };
436363 };
437364 };
365+
366+ mcc {
367+ compatible = "arm,vexpress,config-bus";
368+ arm,vexpress,config-bridge = <&v2m_sysreg>;
369+
370+ oscclk0 {
371+ /* MCC static memory clock */
372+ compatible = "arm,vexpress-osc";
373+ arm,vexpress-sysreg,func = <1 0>;
374+ freq-range = <25000000 60000000>;
375+ #clock-cells = <0>;
376+ clock-output-names = "v2m:oscclk0";
377+ };
378+
379+ v2m_oscclk1: oscclk1 {
380+ /* CLCD clock */
381+ compatible = "arm,vexpress-osc";
382+ arm,vexpress-sysreg,func = <1 1>;
383+ freq-range = <23750000 65000000>;
384+ #clock-cells = <0>;
385+ clock-output-names = "v2m:oscclk1";
386+ };
387+
388+ v2m_oscclk2: oscclk2 {
389+ /* IO FPGA peripheral clock */
390+ compatible = "arm,vexpress-osc";
391+ arm,vexpress-sysreg,func = <1 2>;
392+ freq-range = <24000000 24000000>;
393+ #clock-cells = <0>;
394+ clock-output-names = "v2m:oscclk2";
395+ };
396+
397+ volt-vio {
398+ /* Logic level voltage */
399+ compatible = "arm,vexpress-volt";
400+ arm,vexpress-sysreg,func = <2 0>;
401+ regulator-name = "VIO";
402+ regulator-always-on;
403+ label = "VIO";
404+ };
405+
406+ temp-mcc {
407+ /* MCC internal operating temperature */
408+ compatible = "arm,vexpress-temp";
409+ arm,vexpress-sysreg,func = <4 0>;
410+ label = "MCC";
411+ };
412+
413+ reset {
414+ compatible = "arm,vexpress-reset";
415+ arm,vexpress-sysreg,func = <5 0>;
416+ };
417+
418+ muxfpga {
419+ compatible = "arm,vexpress-muxfpga";
420+ arm,vexpress-sysreg,func = <7 0>;
421+ };
422+
423+ shutdown {
424+ compatible = "arm,vexpress-shutdown";
425+ arm,vexpress-sysreg,func = <8 0>;
426+ };
427+
428+ reboot {
429+ compatible = "arm,vexpress-reboot";
430+ arm,vexpress-sysreg,func = <9 0>;
431+ };
432+
433+ dvimode {
434+ compatible = "arm,vexpress-dvimode";
435+ arm,vexpress-sysreg,func = <11 0>;
436+ };
437+ };
438438 };
439439 };
440440 };
arch/arm/mach-bcm/Kconfig+1−0
@@ -53,6 +53,7 @@ config ARCH_BCM_NSP · 52 unmodified lines
5353 select ARM_ERRATA_754322
5454 select ARM_ERRATA_775420
5555 select ARM_ERRATA_764369 if SMP
56+ select ARM_TIMER_SP804
5657 select THERMAL
5758 select THERMAL_OF
5859 help
arch/arm/mach-imx/pm-imx5.c+4−2
@@ -295,14 +295,14 @@ static int __init imx_suspend_alloc_ocram( · 294 unmodified lines
295295 if (!ocram_pool) {
296296 pr_warn("%s: ocram pool unavailable!\n", __func__);
297297 ret = -ENODEV;
298− goto put_node;
298+ goto put_device;
299299 }
300300
301301 ocram_base = gen_pool_alloc(ocram_pool, size);
302302 if (!ocram_base) {
303303 pr_warn("%s: unable to alloc ocram!\n", __func__);
304304 ret = -ENOMEM;
305− goto put_node;
305+ goto put_device;
306306 }
307307
308308 phys = gen_pool_virt_to_phys(ocram_pool, ocram_base);
@@ -312,6 +312,8 @@ static int __init imx_suspend_alloc_ocram( · 3 unmodified lines
312312 if (virt_out)
313313 *virt_out = virt;
314314
315+put_device:
316+ put_device(&pdev->dev);
315317 put_node:
316318 of_node_put(node);
317319
arch/arm/mach-imx/pm-imx6.c+6−4
@@ -493,14 +493,14 @@ static int __init imx6q_suspend_init(const struct imx6_pm_socdata *socdata) · 492 unmodified lines
493493 if (!ocram_pool) {
494494 pr_warn("%s: ocram pool unavailable!\n", __func__);
495495 ret = -ENODEV;
496− goto put_node;
496+ goto put_device;
497497 }
498498
499499 ocram_base = gen_pool_alloc(ocram_pool, MX6Q_SUSPEND_OCRAM_SIZE);
500500 if (!ocram_base) {
501501 pr_warn("%s: unable to alloc ocram!\n", __func__);
502502 ret = -ENOMEM;
503− goto put_node;
503+ goto put_device;
504504 }
505505
506506 ocram_pbase = gen_pool_virt_to_phys(ocram_pool, ocram_base);
@@ -523,7 +523,7 @@ static int __init imx6q_suspend_init(const struct imx6_pm_socdata *socdata) · 16 unmodified lines
523523 ret = imx6_pm_get_base(&pm_info->mmdc_base, socdata->mmdc_compat);
524524 if (ret) {
525525 pr_warn("%s: failed to get mmdc base %d!\n", __func__, ret);
526− goto put_node;
526+ goto put_device;
527527 }
528528
529529 ret = imx6_pm_get_base(&pm_info->src_base, socdata->src_compat);
@@ -570,7 +570,7 @@ static int __init imx6q_suspend_init(const struct imx6_pm_socdata *socdata) · 40 unmodified lines
570570 &imx6_suspend,
571571 MX6Q_SUSPEND_OCRAM_SIZE - sizeof(*pm_info));
572572
573− goto put_node;
573+ goto put_device;
574574
575575 pl310_cache_map_failed:
576576 iounmap(pm_info->gpc_base.vbase);
@@ -580,6 +580,8 @@ iomuxc_map_failed: · 3 unmodified lines
580580 iounmap(pm_info->src_base.vbase);
581581 src_map_failed:
582582 iounmap(pm_info->mmdc_base.vbase);
583+put_device:
584+ put_device(&pdev->dev);
583585 put_node:
584586 of_node_put(node);
585587
arch/arm/mach-sti/board-dt.c+0−9
@@ -20,14 +20,6 @@ static const char *const stih41x_dt_match[] __initconst = { · 19 unmodified lines
2020 NULL
2121 };
2222
23−static void sti_l2_write_sec(unsigned long val, unsigned reg)
24−{
25− /*
26− * We can't write to secure registers as we are in non-secure
27− * mode, until we have some SMI service available.
28− */
29−}
30−
3123 DT_MACHINE_START(STM, "STi SoC with Flattened Device Tree")
3224 .dt_compat = stih41x_dt_match,
3325 .l2c_aux_val = L2C_AUX_CTRL_SHARED_OVERRIDE |
@@ -36,5 +28,4 @@ DT_MACHINE_START(STM, "STi SoC with Flattened Device Tree") · 2 unmodified lines
3628 L2C_AUX_CTRL_WAY_SIZE(4),
3729 .l2c_aux_mask = 0xc0000fff,
3830 .smp = smp_ops(sti_smp_ops),
39− .l2c_write_sec = sti_l2_write_sec,
4031 MACHINE_END
arch/arm64/boot/dts/freescale/imx8mm-beacon-som.dtsi+2−2
@@ -136,7 +136,7 @@ · 135 unmodified lines
136136
137137 ldo1_reg: LDO1 {
138138 regulator-name = "LDO1";
139− regulator-min-microvolt = <3000000>;
139+ regulator-min-microvolt = <1600000>;
140140 regulator-max-microvolt = <3300000>;
141141 regulator-boot-on;
142142 regulator-always-on;
@@ -144,7 +144,7 @@ · 1 unmodified line
144144
145145 ldo2_reg: LDO2 {
146146 regulator-name = "LDO2";
147− regulator-min-microvolt = <900000>;
147+ regulator-min-microvolt = <800000>;
148148 regulator-max-microvolt = <900000>;
149149 regulator-boot-on;
150150 regulator-always-on;
arch/arm64/boot/dts/freescale/imx8mm-evk.dts+2−2
@@ -208,7 +208,7 @@ · 207 unmodified lines
208208
209209 ldo1_reg: LDO1 {
210210 regulator-name = "LDO1";
211− regulator-min-microvolt = <3000000>;
211+ regulator-min-microvolt = <1600000>;
212212 regulator-max-microvolt = <3300000>;
213213 regulator-boot-on;
214214 regulator-always-on;
@@ -216,7 +216,7 @@ · 1 unmodified line
216216
217217 ldo2_reg: LDO2 {
218218 regulator-name = "LDO2";
219− regulator-min-microvolt = <900000>;
219+ regulator-min-microvolt = <800000>;
220220 regulator-max-microvolt = <900000>;
221221 regulator-boot-on;
222222 regulator-always-on;
arch/arm64/boot/dts/freescale/imx8mn-ddr4-evk.dts+2−2
@@ -113,7 +113,7 @@ · 112 unmodified lines
113113
114114 ldo1_reg: LDO1 {
115115 regulator-name = "LDO1";
116− regulator-min-microvolt = <3000000>;
116+ regulator-min-microvolt = <1600000>;
117117 regulator-max-microvolt = <3300000>;
118118 regulator-boot-on;
119119 regulator-always-on;
@@ -121,7 +121,7 @@ · 1 unmodified line
121121
122122 ldo2_reg: LDO2 {
123123 regulator-name = "LDO2";
124− regulator-min-microvolt = <900000>;
124+ regulator-min-microvolt = <800000>;
125125 regulator-max-microvolt = <900000>;
126126 regulator-boot-on;
127127 regulator-always-on;
drivers/firmware/raspberrypi.c+4−1
@@ -181,6 +181,7 @@ EXPORT_SYMBOL_GPL(rpi_firmware_property); · 180 unmodified lines
181181 static void
182182 rpi_firmware_print_firmware_revision(struct rpi_firmware *fw)
183183 {
184+ time64_t date_and_time;
184185 u32 packet;
185186 int ret = rpi_firmware_property(fw,
186187 RPI_FIRMWARE_GET_FIRMWARE_REVISION,
@@ -189,7 +190,9 @@ rpi_firmware_print_firmware_revision(struct rpi_firmware *fw) · 2 unmodified lines
189190 if (ret)
190191 return;
191192
192− dev_info(fw->cl.dev, "Attached to firmware from %ptT\n", &packet);
193+ /* This is not compatible with y2038 */
194+ date_and_time = packet;
195+ dev_info(fw->cl.dev, "Attached to firmware from %ptT\n", &date_and_time);
193196 }
194197
195198 static void
drivers/soc/imx/soc-imx8m.c+7−3
@@ -22,6 +22,8 @@ · 21 unmodified lines
2222 #define OCOTP_UID_LOW 0x410
2323 #define OCOTP_UID_HIGH 0x420
2424
25+#define IMX8MP_OCOTP_UID_OFFSET 0x10
26+
2527 /* Same as ANADIG_DIGPROG_IMX7D */
2628 #define ANADIG_DIGPROG_IMX8MM 0x800
2729
@@ -87,6 +89,8 @@ static void __init imx8mm_soc_uid(void) · 59 unmodified lines
8789 {
8890 void __iomem *ocotp_base;
8991 struct device_node *np;
92+ u32 offset = of_machine_is_compatible("fsl,imx8mp") ?
93+ IMX8MP_OCOTP_UID_OFFSET : 0;
9094
9195 np = of_find_compatible_node(NULL, NULL, "fsl,imx8mm-ocotp");
9296 if (!np)
@@ -95,9 +99,9 @@ static void __init imx8mm_soc_uid(void) · 2 unmodified lines
9599 ocotp_base = of_iomap(np, 0);
96100 WARN_ON(!ocotp_base);
97101
98− soc_uid = readl_relaxed(ocotp_base + OCOTP_UID_HIGH);
102+ soc_uid = readl_relaxed(ocotp_base + OCOTP_UID_HIGH + offset);
99103 soc_uid <<= 32;
100− soc_uid |= readl_relaxed(ocotp_base + OCOTP_UID_LOW);
104+ soc_uid |= readl_relaxed(ocotp_base + OCOTP_UID_LOW + offset);
101105
102106 iounmap(ocotp_base);
103107 of_node_put(np);
@@ -146,7 +150,7 @@ static const struct imx8_soc_data imx8mp_soc_data = { · 42 unmodified lines
146150 .soc_revision = imx8mm_soc_revision,
147151 };
148152
149−static const struct of_device_id imx8_soc_match[] = {
153+static __maybe_unused const struct of_device_id imx8_soc_match[] = {
150154 { .compatible = "fsl,imx8mq", .data = &imx8mq_soc_data, },
151155 { .compatible = "fsl,imx8mm", .data = &imx8mm_soc_data, },
152156 { .compatible = "fsl,imx8mn", .data = &imx8mn_soc_data, },

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