Pull i2c updates from Wolfram Sang: "Usual driver bugfixes for the I2C subsystem" * 'i2c/for-current' of git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux: i2c: algo: pca: Reapply i2c bus settings after reset i2c: npcm7xx: Fix timeout calculation misc: eeprom: at24: register nvmem only after eeprom is ready to use
Unified · Split
| @@ -41,8 +41,22 @@ static void pca_reset(struct i2c_algo_pca_data *adap) · 40 unmodified lines | ||
| 41 | 41 | pca_outw(adap, I2C_PCA_INDPTR, I2C_PCA_IPRESET); |
| 42 | 42 | pca_outw(adap, I2C_PCA_IND, 0xA5); |
| 43 | 43 | pca_outw(adap, I2C_PCA_IND, 0x5A); |
| 44 | + | |
| 45 | + /* | |
| 46 | + * After a reset we need to re-apply any configuration | |
| 47 | + * (calculated in pca_init) to get the bus in a working state. | |
| 48 | + */ | |
| 49 | + pca_outw(adap, I2C_PCA_INDPTR, I2C_PCA_IMODE); | |
| 50 | + pca_outw(adap, I2C_PCA_IND, adap->bus_settings.mode); | |
| 51 | + pca_outw(adap, I2C_PCA_INDPTR, I2C_PCA_ISCLL); | |
| 52 | + pca_outw(adap, I2C_PCA_IND, adap->bus_settings.tlow); | |
| 53 | + pca_outw(adap, I2C_PCA_INDPTR, I2C_PCA_ISCLH); | |
| 54 | + pca_outw(adap, I2C_PCA_IND, adap->bus_settings.thi); | |
| 55 | + | |
| 56 | + pca_set_con(adap, I2C_PCA_CON_ENSIO); | |
| 44 | 57 | } else { |
| 45 | 58 | adap->reset_chip(adap->data); |
| 59 | + pca_set_con(adap, I2C_PCA_CON_ENSIO | adap->bus_settings.clock_freq); | |
| 46 | 60 | } |
| 47 | 61 | } |
| 48 | 62 | |
| @@ -423,13 +437,14 @@ static int pca_init(struct i2c_adapter *adap) · 374 unmodified lines | ||
| 423 | 437 | " Use the nominal frequency.\n", adap->name); |
| 424 | 438 | } |
| 425 | 439 | |
| 426 | − pca_reset(pca_data); | |
| 427 | − | |
| 428 | 440 | clock = pca_clock(pca_data); |
| 429 | 441 | printk(KERN_INFO "%s: Clock frequency is %dkHz\n", |
| 430 | 442 | adap->name, freqs[clock]); |
| 431 | 443 | |
| 432 | − pca_set_con(pca_data, I2C_PCA_CON_ENSIO | clock); | |
| 444 | + /* Store settings as these will be needed when the PCA chip is reset */ | |
| 445 | + pca_data->bus_settings.clock_freq = clock; | |
| 446 | + | |
| 447 | + pca_reset(pca_data); | |
| 433 | 448 | } else { |
| 434 | 449 | int clock; |
| 435 | 450 | int mode; |
| @@ -496,19 +511,15 @@ static int pca_init(struct i2c_adapter *adap) · 60 unmodified lines | ||
| 496 | 511 | thi = tlow * min_thi / min_tlow; |
| 497 | 512 | } |
| 498 | 513 | |
| 514 | + /* Store settings as these will be needed when the PCA chip is reset */ | |
| 515 | + pca_data->bus_settings.mode = mode; | |
| 516 | + pca_data->bus_settings.tlow = tlow; | |
| 517 | + pca_data->bus_settings.thi = thi; | |
| 518 | + | |
| 499 | 519 | pca_reset(pca_data); |
| 500 | 520 | |
| 501 | 521 | printk(KERN_INFO |
| 502 | 522 | "%s: Clock frequency is %dHz\n", adap->name, clock * 100); |
| 503 | − | |
| 504 | − pca_outw(pca_data, I2C_PCA_INDPTR, I2C_PCA_IMODE); | |
| 505 | − pca_outw(pca_data, I2C_PCA_IND, mode); | |
| 506 | − pca_outw(pca_data, I2C_PCA_INDPTR, I2C_PCA_ISCLL); | |
| 507 | − pca_outw(pca_data, I2C_PCA_IND, tlow); | |
| 508 | − pca_outw(pca_data, I2C_PCA_INDPTR, I2C_PCA_ISCLH); | |
| 509 | − pca_outw(pca_data, I2C_PCA_IND, thi); | |
| 510 | − | |
| 511 | − pca_set_con(pca_data, I2C_PCA_CON_ENSIO); | |
| 512 | 523 | } |
| 513 | 524 | udelay(500); /* 500 us for oscillator to stabilise */ |
| 514 | 525 | |
| @@ -2093,8 +2093,12 @@ static int npcm_i2c_master_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs, · 2092 unmodified lines | ||
| 2093 | 2093 | } |
| 2094 | 2094 | } |
| 2095 | 2095 | |
| 2096 | − /* Adaptive TimeOut: astimated time in usec + 100% margin */ | |
| 2097 | − timeout_usec = (2 * 10000 / bus->bus_freq) * (2 + nread + nwrite); | |
| 2096 | + /* | |
| 2097 | + * Adaptive TimeOut: estimated time in usec + 100% margin: | |
| 2098 | + * 2: double the timeout for clock stretching case | |
| 2099 | + * 9: bits per transaction (including the ack/nack) | |
| 2100 | + */ | |
| 2101 | + timeout_usec = (2 * 9 * USEC_PER_SEC / bus->bus_freq) * (2 + nread + nwrite); | |
| 2098 | 2102 | timeout = max(msecs_to_jiffies(35), usecs_to_jiffies(timeout_usec)); |
| 2099 | 2103 | if (nwrite >= 32 * 1024 || nread >= 32 * 1024) { |
| 2100 | 2104 | dev_err(bus->dev, "i2c%d buffer too big\n", bus->num); |
| @@ -692,10 +692,6 @@ static int at24_probe(struct i2c_client *client) · 691 unmodified lines | ||
| 692 | 692 | nvmem_config.word_size = 1; |
| 693 | 693 | nvmem_config.size = byte_len; |
| 694 | 694 | |
| 695 | − at24->nvmem = devm_nvmem_register(dev, &nvmem_config); | |
| 696 | − if (IS_ERR(at24->nvmem)) | |
| 697 | − return PTR_ERR(at24->nvmem); | |
| 698 | − | |
| 699 | 695 | i2c_set_clientdata(client, at24); |
| 700 | 696 | |
| 701 | 697 | err = regulator_enable(at24->vcc_reg); |
| @@ -708,6 +704,13 @@ static int at24_probe(struct i2c_client *client) · 6 unmodified lines | ||
| 708 | 704 | pm_runtime_set_active(dev); |
| 709 | 705 | pm_runtime_enable(dev); |
| 710 | 706 | |
| 707 | + at24->nvmem = devm_nvmem_register(dev, &nvmem_config); | |
| 708 | + if (IS_ERR(at24->nvmem)) { | |
| 709 | + pm_runtime_disable(dev); | |
| 710 | + regulator_disable(at24->vcc_reg); | |
| 711 | + return PTR_ERR(at24->nvmem); | |
| 712 | + } | |
| 713 | + | |
| 711 | 714 | /* |
| 712 | 715 | * Perform a one-byte test read to verify that the |
| 713 | 716 | * chip is functional. |
| @@ -53,6 +53,20 @@ · 52 unmodified lines | ||
| 53 | 53 | #define I2C_PCA_CON_SI 0x08 /* Serial Interrupt */ |
| 54 | 54 | #define I2C_PCA_CON_CR 0x07 /* Clock Rate (MASK) */ |
| 55 | 55 | |
| 56 | +/** | |
| 57 | + * struct pca_i2c_bus_settings - The configured PCA i2c bus settings | |
| 58 | + * @mode: Configured i2c bus mode | |
| 59 | + * @tlow: Configured SCL LOW period | |
| 60 | + * @thi: Configured SCL HIGH period | |
| 61 | + * @clock_freq: The configured clock frequency | |
| 62 | + */ | |
| 63 | +struct pca_i2c_bus_settings { | |
| 64 | + int mode; | |
| 65 | + int tlow; | |
| 66 | + int thi; | |
| 67 | + int clock_freq; | |
| 68 | +}; | |
| 69 | + | |
| 56 | 70 | struct i2c_algo_pca_data { |
| 57 | 71 | void *data; /* private low level data */ |
| 58 | 72 | void (*write_byte) (void *data, int reg, int val); |
| @@ -64,6 +78,7 @@ struct i2c_algo_pca_data { · 5 unmodified lines | ||
| 64 | 78 | * For PCA9665, use the frequency you want here. */ |
| 65 | 79 | unsigned int i2c_clock; |
| 66 | 80 | unsigned int chip; |
| 81 | + struct pca_i2c_bus_settings bus_settings; | |
| 67 | 82 | }; |
| 68 | 83 | |
| 69 | 84 | int i2c_pca_add_bus(struct i2c_adapter *); |