History

Merge branch 'mellanox/mlx5-next' into rdma.git for-next

From git://git.kernel.org/pub/scm/linux/kernel/git/mellanox/linux.git This is required to resolve dependencies of the next series of RDMA patches. * branch 'mellanox/mlx5-next': net/mlx5: Add support for flow table destination number net/mlx5: Add forward compatible support for the FTE match data net/mlx5: Fix tristate and description for MLX5 module net/mlx5: Better return types for CQE API net/mlx5: Use ERR_CAST() instead of coding it net/mlx5: Add missing SET_DRIVER_VERSION command translation net/mlx5: Add XRQ commands definitions net/mlx5: Add core support for double vlan push/pop steering action net/mlx5: Expose MPEGC (Management PCIe General Configuration) structures net/mlx5: FW tracer, add hardware structures net/mlx5: fix uaccess beyond "count" in debugfs read/write handlers

Jason Gunthorpe committed 8 years ago

Commit eda98772 parents 4fca037 664000b14 files · +166 −149Browse files

Unified · Split

14 files
  1. drivers/infiniband/hw/mlx5/Kconfig +1 −1
  2. drivers/net/ethernet/mellanox/mlx5/core/Kconfig +3 −3
  3. drivers/net/ethernet/mellanox/mlx5/core/cmd.c +16 −21
  4. drivers/net/ethernet/mellanox/mlx5/core/debugfs.c +2 −20
  5. drivers/net/ethernet/mellanox/mlx5/core/diag/fs_tracepoint.c +3 −0
  6. drivers/net/ethernet/mellanox/mlx5/core/diag/fs_tracepoint.h +2 −0
  7. drivers/net/ethernet/mellanox/mlx5/core/eswitch_offloads.c +3 −3
  8. drivers/net/ethernet/mellanox/mlx5/core/fs_cmd.c +24 −12
  9. drivers/net/ethernet/mellanox/mlx5/core/fs_core.c +8 −79
  10. drivers/net/ethernet/mellanox/mlx5/core/main.c +1 −1
  11. include/linux/mlx5/device.h +4 −4
  12. include/linux/mlx5/driver.h +5 −0
  13. include/linux/mlx5/fs.h +4 −1
  14. include/linux/mlx5/mlx5_ifc.h +90 −4
drivers/infiniband/hw/mlx5/Kconfig+1−1
@@ -1,5 +1,5 @@
11 config MLX5_INFINIBAND
2− tristate "Mellanox Connect-IB HCA support"
2+ tristate "Mellanox 5th generation network adapters (ConnectX series) support"
33 depends on NETDEVICES && ETHERNET && PCI && MLX5_CORE
44 depends on INFINIBAND_USER_ACCESS || INFINIBAND_USER_ACCESS=n
55 ---help---
drivers/net/ethernet/mellanox/mlx5/core/Kconfig+3−3
@@ -3,7 +3,7 @@ · 2 unmodified lines
33 #
44
55 config MLX5_CORE
6− tristate "Mellanox Technologies ConnectX-4 and Connect-IB core driver"
6+ tristate "Mellanox 5th generation network adapters (ConnectX series) core driver"
77 depends on MAY_USE_DEVLINK
88 depends on PCI
99 imply PTP_1588_CLOCK
@@ -27,7 +27,7 @@ config MLX5_FPGA · 17 unmodified lines
2727 sandbox-specific client drivers.
2828
2929 config MLX5_CORE_EN
30− bool "Mellanox Technologies ConnectX-4 Ethernet support"
30+ bool "Mellanox 5th generation network adapters (ConnectX series) Ethernet support"
3131 depends on NETDEVICES && ETHERNET && INET && PCI && MLX5_CORE
3232 depends on IPV6=y || IPV6=n || MLX5_CORE=m
3333 select PAGE_POOL
@@ -69,7 +69,7 @@ config MLX5_CORE_EN_DCB · 35 unmodified lines
6969 If unsure, set to Y
7070
7171 config MLX5_CORE_IPOIB
72− bool "Mellanox Technologies ConnectX-4 IPoIB offloads support"
72+ bool "Mellanox 5th generation network adapters (connectX series) IPoIB offloads support"
7373 depends on MLX5_CORE_EN
7474 default n
7575 ---help---
drivers/net/ethernet/mellanox/mlx5/core/cmd.c+16−21
@@ -278,6 +278,7 @@ static int mlx5_internal_err_ret_value(struct mlx5_core_dev *dev, u16 op, · 277 unmodified lines
278278 case MLX5_CMD_OP_DESTROY_PSV:
279279 case MLX5_CMD_OP_DESTROY_SRQ:
280280 case MLX5_CMD_OP_DESTROY_XRC_SRQ:
281+ case MLX5_CMD_OP_DESTROY_XRQ:
281282 case MLX5_CMD_OP_DESTROY_DCT:
282283 case MLX5_CMD_OP_DEALLOC_Q_COUNTER:
283284 case MLX5_CMD_OP_DESTROY_SCHEDULING_ELEMENT:
@@ -347,6 +348,9 @@ static int mlx5_internal_err_ret_value(struct mlx5_core_dev *dev, u16 op, · 63 unmodified lines
347348 case MLX5_CMD_OP_CREATE_XRC_SRQ:
348349 case MLX5_CMD_OP_QUERY_XRC_SRQ:
349350 case MLX5_CMD_OP_ARM_XRC_SRQ:
351+ case MLX5_CMD_OP_CREATE_XRQ:
352+ case MLX5_CMD_OP_QUERY_XRQ:
353+ case MLX5_CMD_OP_ARM_XRQ:
350354 case MLX5_CMD_OP_CREATE_DCT:
351355 case MLX5_CMD_OP_DRAIN_DCT:
352356 case MLX5_CMD_OP_QUERY_DCT:
@@ -456,6 +460,7 @@ const char *mlx5_command_str(int command) · 103 unmodified lines
456460 MLX5_COMMAND_STR_CASE(SET_HCA_CAP);
457461 MLX5_COMMAND_STR_CASE(QUERY_ISSI);
458462 MLX5_COMMAND_STR_CASE(SET_ISSI);
463+ MLX5_COMMAND_STR_CASE(SET_DRIVER_VERSION);
459464 MLX5_COMMAND_STR_CASE(CREATE_MKEY);
460465 MLX5_COMMAND_STR_CASE(QUERY_MKEY);
461466 MLX5_COMMAND_STR_CASE(DESTROY_MKEY);
@@ -603,6 +608,10 @@ const char *mlx5_command_str(int command) · 141 unmodified lines
603608 MLX5_COMMAND_STR_CASE(FPGA_QUERY_QP);
604609 MLX5_COMMAND_STR_CASE(FPGA_QUERY_QP_COUNTERS);
605610 MLX5_COMMAND_STR_CASE(FPGA_DESTROY_QP);
611+ MLX5_COMMAND_STR_CASE(CREATE_XRQ);
612+ MLX5_COMMAND_STR_CASE(DESTROY_XRQ);
613+ MLX5_COMMAND_STR_CASE(QUERY_XRQ);
614+ MLX5_COMMAND_STR_CASE(ARM_XRQ);
606615 MLX5_COMMAND_STR_CASE(CREATE_GENERAL_OBJECT);
607616 MLX5_COMMAND_STR_CASE(DESTROY_GENERAL_OBJECT);
608617 MLX5_COMMAND_STR_CASE(MODIFY_GENERAL_OBJECT);
@@ -1037,7 +1046,10 @@ static ssize_t dbg_write(struct file *filp, const char __user *buf, · 428 unmodified lines
10371046 if (!dbg->in_msg || !dbg->out_msg)
10381047 return -ENOMEM;
10391048
1040− if (copy_from_user(lbuf, buf, sizeof(lbuf)))
1049+ if (count < sizeof(lbuf) - 1)
1050+ return -EINVAL;
1051+
1052+ if (copy_from_user(lbuf, buf, sizeof(lbuf) - 1))
10411053 return -EFAULT;
10421054
10431055 lbuf[sizeof(lbuf) - 1] = 0;
@@ -1241,21 +1253,12 @@ static ssize_t data_read(struct file *filp, char __user *buf, size_t count, · 197 unmodified lines
12411253 {
12421254 struct mlx5_core_dev *dev = filp->private_data;
12431255 struct mlx5_cmd_debug *dbg = &dev->cmd.dbg;
1244− int copy;
1245−
1246− if (*pos)
1247− return 0;
12481256
12491257 if (!dbg->out_msg)
12501258 return -ENOMEM;
12511259
1252− copy = min_t(int, count, dbg->outlen);
1253− if (copy_to_user(buf, dbg->out_msg, copy))
1254− return -EFAULT;
1255−
1256− *pos += copy;
1257−
1258− return copy;
1260+ return simple_read_from_buffer(buf, count, pos, dbg->out_msg,
1261+ dbg->outlen);
12591262 }
12601263
12611264 static const struct file_operations dfops = {
@@ -1273,19 +1276,11 @@ static ssize_t outlen_read(struct file *filp, char __user *buf, size_t count, · 11 unmodified lines
12731276 char outlen[8];
12741277 int err;
12751278
1276− if (*pos)
1277− return 0;
1278−
12791279 err = snprintf(outlen, sizeof(outlen), "%d", dbg->outlen);
12801280 if (err < 0)
12811281 return err;
12821282
1283− if (copy_to_user(buf, &outlen, err))
1284− return -EFAULT;
1285−
1286− *pos += err;
1287−
1288− return err;
1283+ return simple_read_from_buffer(buf, count, pos, outlen, err);
12891284 }
12901285
12911286 static ssize_t outlen_write(struct file *filp, const char __user *buf,
drivers/net/ethernet/mellanox/mlx5/core/debugfs.c+2−20
@@ -150,22 +150,13 @@ static ssize_t average_read(struct file *filp, char __user *buf, size_t count, · 149 unmodified lines
150150 int ret;
151151 char tbuf[22];
152152
153− if (*pos)
154− return 0;
155−
156153 stats = filp->private_data;
157154 spin_lock_irq(&stats->lock);
158155 if (stats->n)
159156 field = div64_u64(stats->sum, stats->n);
160157 spin_unlock_irq(&stats->lock);
161158 ret = snprintf(tbuf, sizeof(tbuf), "%llu\n", field);
162− if (ret > 0) {
163− if (copy_to_user(buf, tbuf, ret))
164− return -EFAULT;
165− }
166−
167− *pos += ret;
168− return ret;
159+ return simple_read_from_buffer(buf, count, pos, tbuf, ret);
169160 }
170161
171162 static ssize_t average_write(struct file *filp, const char __user *buf,
@@ -442,9 +433,6 @@ static ssize_t dbg_read(struct file *filp, char __user *buf, size_t count, · 270 unmodified lines
442433 u64 field;
443434 int ret;
444435
445− if (*pos)
446− return 0;
447−
448436 desc = filp->private_data;
449437 d = (void *)(desc - desc->i) - sizeof(*d);
450438 switch (d->type) {
@@ -470,13 +458,7 @@ static ssize_t dbg_read(struct file *filp, char __user *buf, size_t count, · 19 unmodified lines
470458 else
471459 ret = snprintf(tbuf, sizeof(tbuf), "0x%llx\n", field);
472460
473− if (ret > 0) {
474− if (copy_to_user(buf, tbuf, ret))
475− return -EFAULT;
476− }
477−
478− *pos += ret;
479− return ret;
461+ return simple_read_from_buffer(buf, count, pos, tbuf, ret);
480462 }
481463
482464 static const struct file_operations fops = {
drivers/net/ethernet/mellanox/mlx5/core/diag/fs_tracepoint.c+3−0
@@ -240,6 +240,9 @@ const char *parse_fs_dst(struct trace_seq *p, · 239 unmodified lines
240240 case MLX5_FLOW_DESTINATION_TYPE_FLOW_TABLE:
241241 trace_seq_printf(p, "ft=%p\n", dst->ft);
242242 break;
243+ case MLX5_FLOW_DESTINATION_TYPE_FLOW_TABLE_NUM:
244+ trace_seq_printf(p, "ft_num=%u\n", dst->ft_num);
245+ break;
243246 case MLX5_FLOW_DESTINATION_TYPE_TIR:
244247 trace_seq_printf(p, "tir=%u\n", dst->tir_num);
245248 break;
drivers/net/ethernet/mellanox/mlx5/core/diag/fs_tracepoint.h+2−0
@@ -138,6 +138,8 @@ TRACE_EVENT(mlx5_fs_del_fg, · 137 unmodified lines
138138 {MLX5_FLOW_CONTEXT_ACTION_MOD_HDR, "MOD_HDR"},\
139139 {MLX5_FLOW_CONTEXT_ACTION_VLAN_PUSH, "VLAN_PUSH"},\
140140 {MLX5_FLOW_CONTEXT_ACTION_VLAN_POP, "VLAN_POP"},\
141+ {MLX5_FLOW_CONTEXT_ACTION_VLAN_PUSH_2, "VLAN_PUSH_2"},\
142+ {MLX5_FLOW_CONTEXT_ACTION_VLAN_POP_2, "VLAN_POP_2"},\
141143 {MLX5_FLOW_CONTEXT_ACTION_FWD_NEXT_PRIO, "NEXT_PRIO"}
142144
143145 TRACE_EVENT(mlx5_fs_set_fte,
drivers/net/ethernet/mellanox/mlx5/core/eswitch_offloads.c+3−3
@@ -70,9 +70,9 @@ mlx5_eswitch_add_offloaded_rule(struct mlx5_eswitch *esw, · 69 unmodified lines
7070 flow_act.action &= ~(MLX5_FLOW_CONTEXT_ACTION_VLAN_PUSH |
7171 MLX5_FLOW_CONTEXT_ACTION_VLAN_POP);
7272 else if (flow_act.action & MLX5_FLOW_CONTEXT_ACTION_VLAN_PUSH) {
73− flow_act.vlan.ethtype = ntohs(attr->vlan_proto);
74− flow_act.vlan.vid = attr->vlan_vid;
75− flow_act.vlan.prio = attr->vlan_prio;
73+ flow_act.vlan[0].ethtype = ntohs(attr->vlan_proto);
74+ flow_act.vlan[0].vid = attr->vlan_vid;
75+ flow_act.vlan[0].prio = attr->vlan_prio;
7676 }
7777
7878 if (flow_act.action & MLX5_FLOW_CONTEXT_ACTION_FWD_DEST) {
drivers/net/ethernet/mellanox/mlx5/core/fs_cmd.c+24−12
@@ -349,9 +349,15 @@ static int mlx5_cmd_set_fte(struct mlx5_core_dev *dev, · 348 unmodified lines
349349
350350 vlan = MLX5_ADDR_OF(flow_context, in_flow_context, push_vlan);
351351
352− MLX5_SET(vlan, vlan, ethtype, fte->action.vlan.ethtype);
353− MLX5_SET(vlan, vlan, vid, fte->action.vlan.vid);
354− MLX5_SET(vlan, vlan, prio, fte->action.vlan.prio);
352+ MLX5_SET(vlan, vlan, ethtype, fte->action.vlan[0].ethtype);
353+ MLX5_SET(vlan, vlan, vid, fte->action.vlan[0].vid);
354+ MLX5_SET(vlan, vlan, prio, fte->action.vlan[0].prio);
355+
356+ vlan = MLX5_ADDR_OF(flow_context, in_flow_context, push_vlan_2);
357+
358+ MLX5_SET(vlan, vlan, ethtype, fte->action.vlan[1].ethtype);
359+ MLX5_SET(vlan, vlan, vid, fte->action.vlan[1].vid);
360+ MLX5_SET(vlan, vlan, prio, fte->action.vlan[1].prio);
355361
356362 in_match_value = MLX5_ADDR_OF(flow_context, in_flow_context,
357363 match_value);
@@ -362,18 +368,20 @@ static int mlx5_cmd_set_fte(struct mlx5_core_dev *dev, · 4 unmodified lines
362368 int list_size = 0;
363369
364370 list_for_each_entry(dst, &fte->node.children, node.list) {
365− unsigned int id;
371+ unsigned int id, type = dst->dest_attr.type;
366372
367− if (dst->dest_attr.type == MLX5_FLOW_DESTINATION_TYPE_COUNTER)
373+ if (type == MLX5_FLOW_DESTINATION_TYPE_COUNTER)
368374 continue;
369375
370− MLX5_SET(dest_format_struct, in_dests, destination_type,
371− dst->dest_attr.type);
372− if (dst->dest_attr.type ==
373− MLX5_FLOW_DESTINATION_TYPE_FLOW_TABLE) {
376+ switch (type) {
377+ case MLX5_FLOW_DESTINATION_TYPE_FLOW_TABLE_NUM:
378+ id = dst->dest_attr.ft_num;
379+ type = MLX5_FLOW_DESTINATION_TYPE_FLOW_TABLE;
380+ break;
381+ case MLX5_FLOW_DESTINATION_TYPE_FLOW_TABLE:
374382 id = dst->dest_attr.ft->id;
375− } else if (dst->dest_attr.type ==
376− MLX5_FLOW_DESTINATION_TYPE_VPORT) {
383+ break;
384+ case MLX5_FLOW_DESTINATION_TYPE_VPORT:
377385 id = dst->dest_attr.vport.num;
378386 MLX5_SET(dest_format_struct, in_dests,
379387 destination_eswitch_owner_vhca_id_valid,
@@ -381,9 +389,13 @@ static int mlx5_cmd_set_fte(struct mlx5_core_dev *dev, · 1 unmodified line
381389 MLX5_SET(dest_format_struct, in_dests,
382390 destination_eswitch_owner_vhca_id,
383391 dst->dest_attr.vport.vhca_id);
384− } else {
392+ break;
393+ default:
385394 id = dst->dest_attr.tir_num;
386395 }
396+
397+ MLX5_SET(dest_format_struct, in_dests, destination_type,
398+ type);
387399 MLX5_SET(dest_format_struct, in_dests, destination_id, id);
388400 in_dests += MLX5_ST_SZ_BYTES(dest_format_struct);
389401 list_size++;
drivers/net/ethernet/mellanox/mlx5/core/fs_core.c+8−79
@@ -309,89 +309,17 @@ static struct fs_prio *find_prio(struct mlx5_flow_namespace *ns, · 308 unmodified lines
309309 return NULL;
310310 }
311311
312−static bool check_last_reserved(const u32 *match_criteria)
313−{
314− char *match_criteria_reserved =
315− MLX5_ADDR_OF(fte_match_param, match_criteria, MLX5_FTE_MATCH_PARAM_RESERVED);
316−
317− return !match_criteria_reserved[0] &&
318− !memcmp(match_criteria_reserved, match_criteria_reserved + 1,
319− MLX5_FLD_SZ_BYTES(fte_match_param,
320− MLX5_FTE_MATCH_PARAM_RESERVED) - 1);
321−}
322−
323−static bool check_valid_mask(u8 match_criteria_enable, const u32 *match_criteria)
324−{
325− if (match_criteria_enable & ~(
326− (1 << MLX5_CREATE_FLOW_GROUP_IN_MATCH_CRITERIA_ENABLE_OUTER_HEADERS) |
327− (1 << MLX5_CREATE_FLOW_GROUP_IN_MATCH_CRITERIA_ENABLE_MISC_PARAMETERS) |
328− (1 << MLX5_CREATE_FLOW_GROUP_IN_MATCH_CRITERIA_ENABLE_INNER_HEADERS) |
329− (1 << MLX5_CREATE_FLOW_GROUP_IN_MATCH_CRITERIA_ENABLE_MISC_PARAMETERS_2)))
330− return false;
331−
332− if (!(match_criteria_enable &
333− 1 << MLX5_CREATE_FLOW_GROUP_IN_MATCH_CRITERIA_ENABLE_OUTER_HEADERS)) {
334− char *fg_type_mask = MLX5_ADDR_OF(fte_match_param,
335− match_criteria, outer_headers);
336−
337− if (fg_type_mask[0] ||
338− memcmp(fg_type_mask, fg_type_mask + 1,
339− MLX5_ST_SZ_BYTES(fte_match_set_lyr_2_4) - 1))
340− return false;
341− }
342−
343− if (!(match_criteria_enable &
344− 1 << MLX5_CREATE_FLOW_GROUP_IN_MATCH_CRITERIA_ENABLE_MISC_PARAMETERS)) {
345− char *fg_type_mask = MLX5_ADDR_OF(fte_match_param,
346− match_criteria, misc_parameters);
347−
348− if (fg_type_mask[0] ||
349− memcmp(fg_type_mask, fg_type_mask + 1,
350− MLX5_ST_SZ_BYTES(fte_match_set_misc) - 1))
351− return false;
352− }
353−
354− if (!(match_criteria_enable &
355− 1 << MLX5_CREATE_FLOW_GROUP_IN_MATCH_CRITERIA_ENABLE_INNER_HEADERS)) {
356− char *fg_type_mask = MLX5_ADDR_OF(fte_match_param,
357− match_criteria, inner_headers);
358−
359− if (fg_type_mask[0] ||
360− memcmp(fg_type_mask, fg_type_mask + 1,
361− MLX5_ST_SZ_BYTES(fte_match_set_lyr_2_4) - 1))
362− return false;
363− }
364−
365− if (!(match_criteria_enable &
366− 1 << MLX5_CREATE_FLOW_GROUP_IN_MATCH_CRITERIA_ENABLE_MISC_PARAMETERS_2)) {
367− char *fg_type_mask = MLX5_ADDR_OF(fte_match_param,
368− match_criteria, misc_parameters_2);
369−
370− if (fg_type_mask[0] ||
371− memcmp(fg_type_mask, fg_type_mask + 1,
372− MLX5_ST_SZ_BYTES(fte_match_set_misc2) - 1))
373− return false;
374− }
375−
376− return check_last_reserved(match_criteria);
377−}
378−
379312 static bool check_valid_spec(const struct mlx5_flow_spec *spec)
380313 {
381314 int i;
382315
383− if (!check_valid_mask(spec->match_criteria_enable, spec->match_criteria)) {
384− pr_warn("mlx5_core: Match criteria given mismatches match_criteria_enable\n");
385− return false;
386− }
387−
388316 for (i = 0; i < MLX5_ST_SZ_DW_MATCH_PARAM; i++)
389317 if (spec->match_value[i] & ~spec->match_criteria[i]) {
390318 pr_warn("mlx5_core: match_value differs from match_criteria\n");
391319 return false;
392320 }
393321
394− return check_last_reserved(spec->match_value);
322+ return true;
395323 }
396324
397325 static struct mlx5_flow_root_namespace *find_root(struct fs_node *node)
@@ -1158,9 +1086,6 @@ struct mlx5_flow_group *mlx5_create_flow_group(struct mlx5_flow_table *ft, · 760 unmodified lines
11581086 struct mlx5_flow_group *fg;
11591087 int err;
11601088
1161− if (!check_valid_mask(match_criteria_enable, match_criteria))
1162− return ERR_PTR(-EINVAL);
1163−
11641089 if (ft->autogroup.active)
11651090 return ERR_PTR(-EPERM);
11661091
@@ -1431,7 +1356,9 @@ static bool mlx5_flow_dests_cmp(struct mlx5_flow_destination *d1, · 264 unmodified lines
14311356 (d1->type == MLX5_FLOW_DESTINATION_TYPE_FLOW_TABLE &&
14321357 d1->ft == d2->ft) ||
14331358 (d1->type == MLX5_FLOW_DESTINATION_TYPE_TIR &&
1434− d1->tir_num == d2->tir_num))
1359+ d1->tir_num == d2->tir_num) ||
1360+ (d1->type == MLX5_FLOW_DESTINATION_TYPE_FLOW_TABLE_NUM &&
1361+ d1->ft_num == d2->ft_num))
14351362 return true;
14361363 }
14371364
@@ -1464,7 +1391,9 @@ static bool check_conflicting_actions(u32 action1, u32 action2) · 26 unmodified lines
14641391 MLX5_FLOW_CONTEXT_ACTION_DECAP |
14651392 MLX5_FLOW_CONTEXT_ACTION_MOD_HDR |
14661393 MLX5_FLOW_CONTEXT_ACTION_VLAN_POP |
1467− MLX5_FLOW_CONTEXT_ACTION_VLAN_PUSH))
1394+ MLX5_FLOW_CONTEXT_ACTION_VLAN_PUSH |
1395+ MLX5_FLOW_CONTEXT_ACTION_VLAN_POP_2 |
1396+ MLX5_FLOW_CONTEXT_ACTION_VLAN_PUSH_2))
14681397 return true;
14691398
14701399 return false;
@@ -1823,7 +1752,7 @@ search_again_locked: · 352 unmodified lines
18231752
18241753 g = alloc_auto_flow_group(ft, spec);
18251754 if (IS_ERR(g)) {
1826− rule = (void *)g;
1755+ rule = ERR_CAST(g);
18271756 up_write_ref_node(&ft->node);
18281757 return rule;
18291758 }
drivers/net/ethernet/mellanox/mlx5/core/main.c+1−1
@@ -64,7 +64,7 @@ · 63 unmodified lines
6464 #include "lib/clock.h"
6565
6666 MODULE_AUTHOR("Eli Cohen <eli@mellanox.com>");
67−MODULE_DESCRIPTION("Mellanox Connect-IB, ConnectX-4 core driver");
67+MODULE_DESCRIPTION("Mellanox 5th generation network adapters (ConnectX series) core driver");
6868 MODULE_LICENSE("Dual BSD/GPL");
6969 MODULE_VERSION(DRIVER_VERSION);
7070
include/linux/mlx5/device.h+4−4
@@ -750,7 +750,7 @@ enum { · 749 unmodified lines
750750
751751 #define MLX5_MINI_CQE_ARRAY_SIZE 8
752752
753−static inline int mlx5_get_cqe_format(struct mlx5_cqe64 *cqe)
753+static inline u8 mlx5_get_cqe_format(struct mlx5_cqe64 *cqe)
754754 {
755755 return (cqe->op_own >> 2) & 0x3;
756756 }
@@ -770,14 +770,14 @@ static inline u8 get_cqe_l3_hdr_type(struct mlx5_cqe64 *cqe) · 13 unmodified lines
770770 return (cqe->l4_l3_hdr_type >> 2) & 0x3;
771771 }
772772
773−static inline u8 cqe_is_tunneled(struct mlx5_cqe64 *cqe)
773+static inline bool cqe_is_tunneled(struct mlx5_cqe64 *cqe)
774774 {
775775 return cqe->outer_l3_tunneled & 0x1;
776776 }
777777
778−static inline int cqe_has_vlan(struct mlx5_cqe64 *cqe)
778+static inline bool cqe_has_vlan(struct mlx5_cqe64 *cqe)
779779 {
780− return !!(cqe->l4_l3_hdr_type & 0x1);
780+ return cqe->l4_l3_hdr_type & 0x1;
781781 }
782782
783783 static inline u64 get_cqe_ts(struct mlx5_cqe64 *cqe)
include/linux/mlx5/driver.h+5−0
@@ -138,9 +138,14 @@ enum { · 137 unmodified lines
138138 MLX5_REG_HOST_ENDIANNESS = 0x7004,
139139 MLX5_REG_MCIA = 0x9014,
140140 MLX5_REG_MLCR = 0x902b,
141+ MLX5_REG_MTRC_CAP = 0x9040,
142+ MLX5_REG_MTRC_CONF = 0x9041,
143+ MLX5_REG_MTRC_STDB = 0x9042,
144+ MLX5_REG_MTRC_CTRL = 0x9043,
141145 MLX5_REG_MPCNT = 0x9051,
142146 MLX5_REG_MTPPS = 0x9053,
143147 MLX5_REG_MTPPSE = 0x9054,
148+ MLX5_REG_MPEGC = 0x9056,
144149 MLX5_REG_MCQI = 0x9061,
145150 MLX5_REG_MCC = 0x9062,
146151 MLX5_REG_MCDA = 0x9063,
include/linux/mlx5/fs.h+4−1
@@ -89,6 +89,7 @@ struct mlx5_flow_destination { · 88 unmodified lines
8989 enum mlx5_flow_destination_type type;
9090 union {
9191 u32 tir_num;
92+ u32 ft_num;
9293 struct mlx5_flow_table *ft;
9394 struct mlx5_fc *counter;
9495 struct {
@@ -152,6 +153,8 @@ struct mlx5_fs_vlan { · 57 unmodified lines
152153 u8 prio;
153154 };
154155
156+#define MLX5_FS_VLAN_DEPTH 2
157+
155158 struct mlx5_flow_act {
156159 u32 action;
157160 bool has_flow_tag;
@@ -159,7 +162,7 @@ struct mlx5_flow_act { · 1 unmodified line
159162 u32 encap_id;
160163 u32 modify_id;
161164 uintptr_t esp_id;
162− struct mlx5_fs_vlan vlan;
165+ struct mlx5_fs_vlan vlan[MLX5_FS_VLAN_DEPTH];
163166 struct ib_counters *counters;
164167 };
165168
include/linux/mlx5/mlx5_ifc.h+90−4
@@ -341,7 +341,10 @@ struct mlx5_ifc_flow_table_prop_layout_bits { · 340 unmodified lines
341341 u8 reserved_at_9[0x1];
342342 u8 pop_vlan[0x1];
343343 u8 push_vlan[0x1];
344− u8 reserved_at_c[0x14];
344+ u8 reserved_at_c[0x1];
345+ u8 pop_vlan_2[0x1];
346+ u8 push_vlan_2[0x1];
347+ u8 reserved_at_f[0x11];
345348
346349 u8 reserved_at_20[0x2];
347350 u8 log_max_ft_size[0x6];
@@ -1181,6 +1184,7 @@ enum mlx5_flow_destination_type { · 833 unmodified lines
11811184
11821185 MLX5_FLOW_DESTINATION_TYPE_PORT = 0x99,
11831186 MLX5_FLOW_DESTINATION_TYPE_COUNTER = 0x100,
1187+ MLX5_FLOW_DESTINATION_TYPE_FLOW_TABLE_NUM = 0x101,
11841188 };
11851189
11861190 struct mlx5_ifc_dest_format_struct_bits {
@@ -2390,6 +2394,8 @@ enum { · 1203 unmodified lines
23902394 MLX5_FLOW_CONTEXT_ACTION_MOD_HDR = 0x40,
23912395 MLX5_FLOW_CONTEXT_ACTION_VLAN_POP = 0x80,
23922396 MLX5_FLOW_CONTEXT_ACTION_VLAN_PUSH = 0x100,
2397+ MLX5_FLOW_CONTEXT_ACTION_VLAN_POP_2 = 0x400,
2398+ MLX5_FLOW_CONTEXT_ACTION_VLAN_PUSH_2 = 0x800,
23932399 };
23942400
23952401 struct mlx5_ifc_vlan_bits {
@@ -2420,7 +2426,9 @@ struct mlx5_ifc_flow_context_bits { · 24 unmodified lines
24202426
24212427 u8 modify_header_id[0x20];
24222428
2423− u8 reserved_at_100[0x100];
2429+ struct mlx5_ifc_vlan_bits push_vlan_2;
2430+
2431+ u8 reserved_at_120[0xe0];
24242432
24252433 struct mlx5_ifc_fte_match_param_bits match_value;
24262434
@@ -8053,6 +8061,19 @@ struct mlx5_ifc_peir_reg_bits { · 5626 unmodified lines
80538061 u8 error_type[0x8];
80548062 };
80558063
8064+struct mlx5_ifc_mpegc_reg_bits {
8065+ u8 reserved_at_0[0x30];
8066+ u8 field_select[0x10];
8067+
8068+ u8 tx_overflow_sense[0x1];
8069+ u8 mark_cqe[0x1];
8070+ u8 mark_cnp[0x1];
8071+ u8 reserved_at_43[0x1b];
8072+ u8 tx_lossy_overflow_oper[0x2];
8073+
8074+ u8 reserved_at_60[0x100];
8075+};
8076+
80568077 struct mlx5_ifc_pcam_enhanced_features_bits {
80578078 u8 reserved_at_0[0x6d];
80588079 u8 rx_icrc_encapsulated_counter[0x1];
@@ -8101,7 +8122,11 @@ struct mlx5_ifc_pcam_reg_bits { · 42 unmodified lines
81018122 };
81028123
81038124 struct mlx5_ifc_mcam_enhanced_features_bits {
8104− u8 reserved_at_0[0x7b];
8125+ u8 reserved_at_0[0x74];
8126+ u8 mark_tx_action_cnp[0x1];
8127+ u8 mark_tx_action_cqe[0x1];
8128+ u8 dynamic_tx_overflow[0x1];
8129+ u8 reserved_at_77[0x4];
81058130 u8 pcie_outbound_stalled[0x1];
81068131 u8 tx_overflow_buffer_pkt[0x1];
81078132 u8 mtpps_enh_out_per_adj[0x1];
@@ -8116,7 +8141,11 @@ struct mlx5_ifc_mcam_access_reg_bits { · 8 unmodified lines
81168141 u8 mcqi[0x1];
81178142 u8 reserved_at_1f[0x1];
81188143
8119− u8 regs_95_to_64[0x20];
8144+ u8 regs_95_to_87[0x9];
8145+ u8 mpegc[0x1];
8146+ u8 regs_85_to_68[0x12];
8147+ u8 tracer_registers[0x4];
8148+
81208149 u8 regs_63_to_32[0x20];
81218150 u8 regs_31_to_0[0x20];
81228151 };
@@ -9191,4 +9220,61 @@ struct mlx5_ifc_create_uctx_in_bits { · 1068 unmodified lines
91919220 struct mlx5_ifc_uctx_bits uctx;
91929221 };
91939222
9223+struct mlx5_ifc_mtrc_string_db_param_bits {
9224+ u8 string_db_base_address[0x20];
9225+
9226+ u8 reserved_at_20[0x8];
9227+ u8 string_db_size[0x18];
9228+};
9229+
9230+struct mlx5_ifc_mtrc_cap_bits {
9231+ u8 trace_owner[0x1];
9232+ u8 trace_to_memory[0x1];
9233+ u8 reserved_at_2[0x4];
9234+ u8 trc_ver[0x2];
9235+ u8 reserved_at_8[0x14];
9236+ u8 num_string_db[0x4];
9237+
9238+ u8 first_string_trace[0x8];
9239+ u8 num_string_trace[0x8];
9240+ u8 reserved_at_30[0x28];
9241+
9242+ u8 log_max_trace_buffer_size[0x8];
9243+
9244+ u8 reserved_at_60[0x20];
9245+
9246+ struct mlx5_ifc_mtrc_string_db_param_bits string_db_param[8];
9247+
9248+ u8 reserved_at_280[0x180];
9249+};
9250+
9251+struct mlx5_ifc_mtrc_conf_bits {
9252+ u8 reserved_at_0[0x1c];
9253+ u8 trace_mode[0x4];
9254+ u8 reserved_at_20[0x18];
9255+ u8 log_trace_buffer_size[0x8];
9256+ u8 trace_mkey[0x20];
9257+ u8 reserved_at_60[0x3a0];
9258+};
9259+
9260+struct mlx5_ifc_mtrc_stdb_bits {
9261+ u8 string_db_index[0x4];
9262+ u8 reserved_at_4[0x4];
9263+ u8 read_size[0x18];
9264+ u8 start_offset[0x20];
9265+ u8 string_db_data[0];
9266+};
9267+
9268+struct mlx5_ifc_mtrc_ctrl_bits {
9269+ u8 trace_status[0x2];
9270+ u8 reserved_at_2[0x2];
9271+ u8 arm_event[0x1];
9272+ u8 reserved_at_5[0xb];
9273+ u8 modify_field_select[0x10];
9274+ u8 reserved_at_20[0x2b];
9275+ u8 current_timestamp52_32[0x15];
9276+ u8 current_timestamp31_0[0x20];
9277+ u8 reserved_at_80[0x180];
9278+};
9279+
91949280 #endif /* MLX5_IFC_H */

Keyboard shortcuts

General

Show keyboard shortcuts
?
Focus the current search
/

Issues and pull requests

Open filters
f

Issues, pull requests and Inbox

Select next item
j↓
Select previous item
k↑
Open selected item
Enter
Dismiss filters or clear selection
Esc

Repository code

Go to file
t