History

Merge tag 'kvm-arm-for-4.3-rc2-2' of git://git.kernel.org/pub/scm/linux/kernel/git/kvmarm/kvmarm into kvm-master

Second set of KVM/ARM changes for 4.3-rc2 - Workaround for a Cortex-A57 erratum - Bug fix for the debugging infrastructure - Fix for 32bit guests with more than 4GB of address space on a 32bit host - A number of fixes for the (unusual) case when we don't use the in-kernel GIC emulation - Removal of ThumbEE handling on arm64, since these have been dropped from the architecture before anyone actually ever built a CPU - Remove the KVM_ARM_MAX_VCPUS limitation which has become fairly pointless

Paolo Bonzini committed 11 years ago

Commit efe4d362 parents 9bf9fde ef7489113 files · +30 −81Browse files

Unified · Split

13 files
  1. arch/arm/include/asm/kvm_host.h +2 −6
  2. arch/arm/kvm/Kconfig +0 −11
  3. arch/arm/kvm/arm.c +1 −1
  4. arch/arm/kvm/interrupts_head.S +4 −2
  5. arch/arm/kvm/mmu.c +4 −2
  6. arch/arm64/include/asm/kvm_arm.h +0 −1
  7. arch/arm64/include/asm/kvm_asm.h +1 −3
  8. arch/arm64/include/asm/kvm_host.h +2 −6
  9. arch/arm64/kvm/Kconfig +0 −11
  10. arch/arm64/kvm/hyp.S +10 −21
  11. arch/arm64/kvm/sys_regs.c +4 −11
  12. include/kvm/arm_vgic.h +1 −5
  13. virt/kvm/arm/vgic-v3.c +1 −1
arch/arm/include/asm/kvm_host.h+2−6
@@ -29,12 +29,6 @@ · 28 unmodified lines
2929
3030 #define __KVM_HAVE_ARCH_INTC_INITIALIZED
3131
32−#if defined(CONFIG_KVM_ARM_MAX_VCPUS)
33−#define KVM_MAX_VCPUS CONFIG_KVM_ARM_MAX_VCPUS
34−#else
35−#define KVM_MAX_VCPUS 0
36−#endif
37−
3832 #define KVM_USER_MEM_SLOTS 32
3933 #define KVM_PRIVATE_MEM_SLOTS 4
4034 #define KVM_COALESCED_MMIO_PAGE_OFFSET 1
@@ -44,6 +38,8 @@ · 3 unmodified lines
4438
4539 #include <kvm/arm_vgic.h>
4640
41+#define KVM_MAX_VCPUS VGIC_V2_MAX_CPUS
42+
4743 u32 *kvm_vcpu_reg(struct kvm_vcpu *vcpu, u8 reg_num, u32 mode);
4844 int __attribute_const__ kvm_target_cpu(void);
4945 int kvm_reset_vcpu(struct kvm_vcpu *vcpu);
arch/arm/kvm/Kconfig+0−11
@@ -45,15 +45,4 @@ config KVM_ARM_HOST · 44 unmodified lines
4545 ---help---
4646 Provides host support for ARM processors.
4747
48−config KVM_ARM_MAX_VCPUS
49− int "Number maximum supported virtual CPUs per VM"
50− depends on KVM_ARM_HOST
51− default 4
52− help
53− Static number of max supported virtual CPUs per VM.
54−
55− If you choose a high number, the vcpu structures will be quite
56− large, so only choose a reasonable number that you expect to
57− actually use.
58−
5948 endif # VIRTUALIZATION
arch/arm/kvm/arm.c+1−1
@@ -446,7 +446,7 @@ static int kvm_vcpu_first_run_init(struct kvm_vcpu *vcpu) · 445 unmodified lines
446446 * Map the VGIC hardware resources before running a vcpu the first
447447 * time on this VM.
448448 */
449− if (unlikely(!vgic_ready(kvm))) {
449+ if (unlikely(irqchip_in_kernel(kvm) && !vgic_ready(kvm))) {
450450 ret = kvm_vgic_map_resources(kvm);
451451 if (ret)
452452 return ret;
arch/arm/kvm/interrupts_head.S+4−2
@@ -515,8 +515,7 @@ ARM_BE8(rev r6, r6 ) · 514 unmodified lines
515515
516516 mrc p15, 0, r2, c14, c3, 1 @ CNTV_CTL
517517 str r2, [vcpu, #VCPU_TIMER_CNTV_CTL]
518− bic r2, #1 @ Clear ENABLE
519− mcr p15, 0, r2, c14, c3, 1 @ CNTV_CTL
518+
520519 isb
521520
522521 mrrc p15, 3, rr_lo_hi(r2, r3), c14 @ CNTV_CVAL
@@ -529,6 +528,9 @@ ARM_BE8(rev r6, r6 ) · 6 unmodified lines
529528 mcrr p15, 4, r2, r2, c14 @ CNTVOFF
530529
531530 1:
531+ mov r2, #0 @ Clear ENABLE
532+ mcr p15, 0, r2, c14, c3, 1 @ CNTV_CTL
533+
532534 @ Allow physical timer/counter access for the host
533535 mrc p15, 4, r2, c14, c1, 0 @ CNTHCTL
534536 orr r2, r2, #(CNTHCTL_PL1PCEN | CNTHCTL_PL1PCTEN)
arch/arm/kvm/mmu.c+4−2
@@ -1792,8 +1792,10 @@ int kvm_arch_prepare_memory_region(struct kvm *kvm, · 1791 unmodified lines
17921792 if (vma->vm_flags & VM_PFNMAP) {
17931793 gpa_t gpa = mem->guest_phys_addr +
17941794 (vm_start - mem->userspace_addr);
1795− phys_addr_t pa = (vma->vm_pgoff << PAGE_SHIFT) +
1796− vm_start - vma->vm_start;
1795+ phys_addr_t pa;
1796+
1797+ pa = (phys_addr_t)vma->vm_pgoff << PAGE_SHIFT;
1798+ pa += vm_start - vma->vm_start;
17971799
17981800 /* IO region dirty page logging not allowed */
17991801 if (memslot->flags & KVM_MEM_LOG_DIRTY_PAGES)
arch/arm64/include/asm/kvm_arm.h+0−1
@@ -172,7 +172,6 @@ · 171 unmodified lines
172172 #define VTTBR_VMID_MASK (UL(0xFF) << VTTBR_VMID_SHIFT)
173173
174174 /* Hyp System Trap Register */
175−#define HSTR_EL2_TTEE (1 << 16)
176175 #define HSTR_EL2_T(x) (1 << x)
177176
178177 /* Hyp Coproccessor Trap Register Shifts */
arch/arm64/include/asm/kvm_asm.h+1−3
@@ -53,9 +53,7 @@ · 52 unmodified lines
5353 #define IFSR32_EL2 25 /* Instruction Fault Status Register */
5454 #define FPEXC32_EL2 26 /* Floating-Point Exception Control Register */
5555 #define DBGVCR32_EL2 27 /* Debug Vector Catch Register */
56−#define TEECR32_EL1 28 /* ThumbEE Configuration Register */
57−#define TEEHBR32_EL1 29 /* ThumbEE Handler Base Register */
58−#define NR_SYS_REGS 30
56+#define NR_SYS_REGS 28
5957
6058 /* 32bit mapping */
6159 #define c0_MPIDR (MPIDR_EL1 * 2) /* MultiProcessor ID Register */
arch/arm64/include/asm/kvm_host.h+2−6
@@ -30,12 +30,6 @@ · 29 unmodified lines
3030
3131 #define __KVM_HAVE_ARCH_INTC_INITIALIZED
3232
33−#if defined(CONFIG_KVM_ARM_MAX_VCPUS)
34−#define KVM_MAX_VCPUS CONFIG_KVM_ARM_MAX_VCPUS
35−#else
36−#define KVM_MAX_VCPUS 0
37−#endif
38−
3933 #define KVM_USER_MEM_SLOTS 32
4034 #define KVM_PRIVATE_MEM_SLOTS 4
4135 #define KVM_COALESCED_MMIO_PAGE_OFFSET 1
@@ -43,6 +37,8 @@ · 1 unmodified line
4337 #include <kvm/arm_vgic.h>
4438 #include <kvm/arm_arch_timer.h>
4539
40+#define KVM_MAX_VCPUS VGIC_V3_MAX_CPUS
41+
4642 #define KVM_VCPU_MAX_FEATURES 3
4743
4844 int __attribute_const__ kvm_target_cpu(void);
arch/arm64/kvm/Kconfig+0−11
@@ -41,15 +41,4 @@ config KVM_ARM_HOST · 40 unmodified lines
4141 ---help---
4242 Provides host support for ARM processors.
4343
44−config KVM_ARM_MAX_VCPUS
45− int "Number maximum supported virtual CPUs per VM"
46− depends on KVM_ARM_HOST
47− default 4
48− help
49− Static number of max supported virtual CPUs per VM.
50−
51− If you choose a high number, the vcpu structures will be quite
52− large, so only choose a reasonable number that you expect to
53− actually use.
54−
5544 endif # VIRTUALIZATION
arch/arm64/kvm/hyp.S+10−21
@@ -433,20 +433,13 @@ · 432 unmodified lines
433433 mrs x5, ifsr32_el2
434434 stp x4, x5, [x3]
435435
436− skip_fpsimd_state x8, 3f
436+ skip_fpsimd_state x8, 2f
437437 mrs x6, fpexc32_el2
438438 str x6, [x3, #16]
439−3:
440− skip_debug_state x8, 2f
439+2:
440+ skip_debug_state x8, 1f
441441 mrs x7, dbgvcr32_el2
442442 str x7, [x3, #24]
443−2:
444− skip_tee_state x8, 1f
445−
446− add x3, x2, #CPU_SYSREG_OFFSET(TEECR32_EL1)
447− mrs x4, teecr32_el1
448− mrs x5, teehbr32_el1
449− stp x4, x5, [x3]
450443 1:
451444 .endm
452445
@@ -466,16 +459,9 @@ · 13 unmodified lines
466459 msr dacr32_el2, x4
467460 msr ifsr32_el2, x5
468461
469− skip_debug_state x8, 2f
462+ skip_debug_state x8, 1f
470463 ldr x7, [x3, #24]
471464 msr dbgvcr32_el2, x7
472−2:
473− skip_tee_state x8, 1f
474−
475− add x3, x2, #CPU_SYSREG_OFFSET(TEECR32_EL1)
476− ldp x4, x5, [x3]
477− msr teecr32_el1, x4
478− msr teehbr32_el1, x5
479465 1:
480466 .endm
481467
@@ -570,8 +556,6 @@ alternative_endif · 88 unmodified lines
570556 mrs x3, cntv_ctl_el0
571557 and x3, x3, #3
572558 str w3, [x0, #VCPU_TIMER_CNTV_CTL]
573− bic x3, x3, #1 // Clear Enable
574− msr cntv_ctl_el0, x3
575559
576560 isb
577561
@@ -579,6 +563,9 @@ alternative_endif · 1 unmodified line
579563 str x3, [x0, #VCPU_TIMER_CNTV_CVAL]
580564
581565 1:
566+ // Disable the virtual timer
567+ msr cntv_ctl_el0, xzr
568+
582569 // Allow physical timer/counter access for the host
583570 mrs x2, cnthctl_el2
584571 orr x2, x2, #3
@@ -753,6 +740,9 @@ ENTRY(__kvm_vcpu_run) · 168 unmodified lines
753740 // Guest context
754741 add x2, x0, #VCPU_CONTEXT
755742
743+ // We must restore the 32-bit state before the sysregs, thanks
744+ // to Cortex-A57 erratum #852523.
745+ restore_guest_32bit_state
756746 bl __restore_sysregs
757747
758748 skip_debug_state x3, 1f
@@ -760,7 +750,6 @@ ENTRY(__kvm_vcpu_run) · 1 unmodified line
760750 kern_hyp_va x3
761751 bl __restore_debug
762752 1:
763− restore_guest_32bit_state
764753 restore_guest_regs
765754
766755 // That's it, no more messing around.
arch/arm64/kvm/sys_regs.c+4−11
@@ -272,7 +272,7 @@ static int set_bvr(struct kvm_vcpu *vcpu, const struct sys_reg_desc *rd, · 271 unmodified lines
272272 {
273273 __u64 *r = &vcpu->arch.vcpu_debug_state.dbg_bvr[rd->reg];
274274
275− if (copy_from_user(uaddr, r, KVM_REG_SIZE(reg->id)) != 0)
275+ if (copy_from_user(r, uaddr, KVM_REG_SIZE(reg->id)) != 0)
276276 return -EFAULT;
277277 return 0;
278278 }
@@ -314,7 +314,7 @@ static int set_bcr(struct kvm_vcpu *vcpu, const struct sys_reg_desc *rd, · 35 unmodified lines
314314 {
315315 __u64 *r = &vcpu->arch.vcpu_debug_state.dbg_bcr[rd->reg];
316316
317− if (copy_from_user(uaddr, r, KVM_REG_SIZE(reg->id)) != 0)
317+ if (copy_from_user(r, uaddr, KVM_REG_SIZE(reg->id)) != 0)
318318 return -EFAULT;
319319
320320 return 0;
@@ -358,7 +358,7 @@ static int set_wvr(struct kvm_vcpu *vcpu, const struct sys_reg_desc *rd, · 37 unmodified lines
358358 {
359359 __u64 *r = &vcpu->arch.vcpu_debug_state.dbg_wvr[rd->reg];
360360
361− if (copy_from_user(uaddr, r, KVM_REG_SIZE(reg->id)) != 0)
361+ if (copy_from_user(r, uaddr, KVM_REG_SIZE(reg->id)) != 0)
362362 return -EFAULT;
363363 return 0;
364364 }
@@ -400,7 +400,7 @@ static int set_wcr(struct kvm_vcpu *vcpu, const struct sys_reg_desc *rd, · 35 unmodified lines
400400 {
401401 __u64 *r = &vcpu->arch.vcpu_debug_state.dbg_wcr[rd->reg];
402402
403− if (copy_from_user(uaddr, r, KVM_REG_SIZE(reg->id)) != 0)
403+ if (copy_from_user(r, uaddr, KVM_REG_SIZE(reg->id)) != 0)
404404 return -EFAULT;
405405 return 0;
406406 }
@@ -539,13 +539,6 @@ static const struct sys_reg_desc sys_reg_descs[] = { · 132 unmodified lines
539539 { Op0(0b10), Op1(0b000), CRn(0b0111), CRm(0b1110), Op2(0b110),
540540 trap_dbgauthstatus_el1 },
541541
542− /* TEECR32_EL1 */
543− { Op0(0b10), Op1(0b010), CRn(0b0000), CRm(0b0000), Op2(0b000),
544− NULL, reset_val, TEECR32_EL1, 0 },
545− /* TEEHBR32_EL1 */
546− { Op0(0b10), Op1(0b010), CRn(0b0001), CRm(0b0000), Op2(0b000),
547− NULL, reset_val, TEEHBR32_EL1, 0 },
548−
549542 /* MDCCSR_EL1 */
550543 { Op0(0b10), Op1(0b011), CRn(0b0000), CRm(0b0001), Op2(0b000),
551544 trap_raz_wi },
include/kvm/arm_vgic.h+1−5
@@ -35,11 +35,7 @@ · 34 unmodified lines
3535 #define VGIC_V3_MAX_LRS 16
3636 #define VGIC_MAX_IRQS 1024
3737 #define VGIC_V2_MAX_CPUS 8
38−
39−/* Sanity checks... */
40−#if (KVM_MAX_VCPUS > 255)
41−#error Too many KVM VCPUs, the VGIC only supports up to 255 VCPUs for now
42−#endif
38+#define VGIC_V3_MAX_CPUS 255
4339
4440 #if (VGIC_NR_IRQS_LEGACY & 31)
4541 #error "VGIC_NR_IRQS must be a multiple of 32"
virt/kvm/arm/vgic-v3.c+1−1
@@ -288,7 +288,7 @@ int vgic_v3_probe(struct device_node *vgic_node, · 287 unmodified lines
288288
289289 vgic->vctrl_base = NULL;
290290 vgic->type = VGIC_V3;
291− vgic->max_gic_vcpus = KVM_MAX_VCPUS;
291+ vgic->max_gic_vcpus = VGIC_V3_MAX_CPUS;
292292
293293 kvm_info("%s@%llx IRQ%d\n", vgic_node->name,
294294 vcpu_res.start, vgic->maint_irq);

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