History

Merge branch 's5p-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung

* 's5p-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung: ARM: S3C2440: fix section mismatch on mini2440 ARM: S3C24XX: drop return codes in void function of dma.c ARM: S3C24XX: don't use uninitialized variable in dma.c ARM: EXYNOS4: Set appropriate I2C device variant ARM: S5PC100: Fix for compilation error spi/s3c64xx: Bug fix for SPI with different FIFO level ARM: SAMSUNG: Add tx_st_done variable ARM: EXYNOS4: Address a section mismatch w/ suspend issue. ARM: S5P: Fix bug on init of PWMTimers for HRTimer ARM: SAMSUNG: header file revised to prevent declaring duplicated ARM: EXYNOS4: fix improper gpio configuration ARM: EXYNOS4: Fix card detection for sdhci 0 and 2

Linus Torvalds committed 15 years ago

Commit f1a04db2 parents b56045d d34c1fc14 files · +37 −23Browse files

Unified · Split

14 files
  1. arch/arm/mach-exynos4/cpu.c +6 −0
  2. arch/arm/mach-exynos4/dev-audio.c +1 −1
  3. arch/arm/mach-exynos4/headsmp.S +1 −1
  4. arch/arm/mach-exynos4/mach-smdkv310.c +2 −6
  5. arch/arm/mach-s3c2440/mach-mini2440.c +1 −1
  6. arch/arm/mach-s3c64xx/dev-spi.c +2 −0
  7. arch/arm/mach-s5p64x0/dev-spi.c +4 −0
  8. arch/arm/mach-s5pc100/dev-spi.c +4 −0
  9. arch/arm/mach-s5pv210/dev-spi.c +2 −0
  10. arch/arm/plat-s3c24xx/dma.c +3 −9
  11. arch/arm/plat-s5p/s5p-time.c +2 −2
  12. arch/arm/plat-samsung/include/plat/devs.h +6 −0
  13. arch/arm/plat-samsung/include/plat/s3c64xx-spi.h +2 −0
  14. drivers/spi/spi_s3c64xx.c +1 −3
arch/arm/mach-exynos4/cpu.c+6−0
@@ -23,6 +23,7 @@ · 22 unmodified lines
2323 #include <plat/sdhci.h>
2424 #include <plat/devs.h>
2525 #include <plat/fimc-core.h>
26+#include <plat/iic-core.h>
2627
2728 #include <mach/regs-irq.h>
2829
@@ -132,6 +133,11 @@ void __init exynos4_map_io(void) · 103 unmodified lines
132133 s3c_fimc_setname(1, "exynos4-fimc");
133134 s3c_fimc_setname(2, "exynos4-fimc");
134135 s3c_fimc_setname(3, "exynos4-fimc");
136+
137+ /* The I2C bus controllers are directly compatible with s3c2440 */
138+ s3c_i2c0_setname("s3c2440-i2c");
139+ s3c_i2c1_setname("s3c2440-i2c");
140+ s3c_i2c2_setname("s3c2440-i2c");
135141 }
136142
137143 void __init exynos4_init_clocks(int xtal)
arch/arm/mach-exynos4/dev-audio.c+1−1
@@ -330,7 +330,7 @@ struct platform_device exynos4_device_ac97 = { · 329 unmodified lines
330330
331331 static int exynos4_spdif_cfg_gpio(struct platform_device *pdev)
332332 {
333− s3c_gpio_cfgpin_range(EXYNOS4_GPC1(0), 2, S3C_GPIO_SFN(3));
333+ s3c_gpio_cfgpin_range(EXYNOS4_GPC1(0), 2, S3C_GPIO_SFN(4));
334334
335335 return 0;
336336 }
arch/arm/mach-exynos4/headsmp.S+1−1
@@ -13,7 +13,7 @@ · 12 unmodified lines
1313 #include <linux/linkage.h>
1414 #include <linux/init.h>
1515
16− __INIT
16+ __CPUINIT
1717
1818 /*
1919 * exynos4 specific entry point for secondary CPUs. This provides
arch/arm/mach-exynos4/mach-smdkv310.c+2−6
@@ -78,9 +78,7 @@ static struct s3c2410_uartcfg smdkv310_uartcfgs[] __initdata = { · 77 unmodified lines
7878 };
7979
8080 static struct s3c_sdhci_platdata smdkv310_hsmmc0_pdata __initdata = {
81− .cd_type = S3C_SDHCI_CD_GPIO,
82− .ext_cd_gpio = EXYNOS4_GPK0(2),
83− .ext_cd_gpio_invert = 1,
81+ .cd_type = S3C_SDHCI_CD_INTERNAL,
8482 .clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL,
8583 #ifdef CONFIG_EXYNOS4_SDHCI_CH0_8BIT
8684 .max_width = 8,
@@ -96,9 +94,7 @@ static struct s3c_sdhci_platdata smdkv310_hsmmc1_pdata __initdata = { · 9 unmodified lines
9694 };
9795
9896 static struct s3c_sdhci_platdata smdkv310_hsmmc2_pdata __initdata = {
99− .cd_type = S3C_SDHCI_CD_GPIO,
100− .ext_cd_gpio = EXYNOS4_GPK2(2),
101− .ext_cd_gpio_invert = 1,
97+ .cd_type = S3C_SDHCI_CD_INTERNAL,
10298 .clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL,
10399 #ifdef CONFIG_EXYNOS4_SDHCI_CH2_8BIT
104100 .max_width = 8,
arch/arm/mach-s3c2440/mach-mini2440.c+1−1
@@ -552,7 +552,7 @@ struct mini2440_features_t { · 551 unmodified lines
552552 struct platform_device *optional[8];
553553 };
554554
555−static void mini2440_parse_features(
555+static void __init mini2440_parse_features(
556556 struct mini2440_features_t * features,
557557 const char * features_str )
558558 {
arch/arm/mach-s3c64xx/dev-spi.c+2−0
@@ -88,6 +88,7 @@ static struct s3c64xx_spi_info s3c64xx_spi0_pdata = { · 87 unmodified lines
8888 .cfg_gpio = s3c64xx_spi_cfg_gpio,
8989 .fifo_lvl_mask = 0x7f,
9090 .rx_lvl_offset = 13,
91+ .tx_st_done = 21,
9192 };
9293
9394 static u64 spi_dmamask = DMA_BIT_MASK(32);
@@ -132,6 +133,7 @@ static struct s3c64xx_spi_info s3c64xx_spi1_pdata = { · 38 unmodified lines
132133 .cfg_gpio = s3c64xx_spi_cfg_gpio,
133134 .fifo_lvl_mask = 0x7f,
134135 .rx_lvl_offset = 13,
136+ .tx_st_done = 21,
135137 };
136138
137139 struct platform_device s3c64xx_device_spi1 = {
arch/arm/mach-s5p64x0/dev-spi.c+4−0
@@ -112,12 +112,14 @@ static struct s3c64xx_spi_info s5p6440_spi0_pdata = { · 111 unmodified lines
112112 .cfg_gpio = s5p6440_spi_cfg_gpio,
113113 .fifo_lvl_mask = 0x1ff,
114114 .rx_lvl_offset = 15,
115+ .tx_st_done = 25,
115116 };
116117
117118 static struct s3c64xx_spi_info s5p6450_spi0_pdata = {
118119 .cfg_gpio = s5p6450_spi_cfg_gpio,
119120 .fifo_lvl_mask = 0x1ff,
120121 .rx_lvl_offset = 15,
122+ .tx_st_done = 25,
121123 };
122124
123125 static u64 spi_dmamask = DMA_BIT_MASK(32);
@@ -160,12 +162,14 @@ static struct s3c64xx_spi_info s5p6440_spi1_pdata = { · 36 unmodified lines
160162 .cfg_gpio = s5p6440_spi_cfg_gpio,
161163 .fifo_lvl_mask = 0x7f,
162164 .rx_lvl_offset = 15,
165+ .tx_st_done = 25,
163166 };
164167
165168 static struct s3c64xx_spi_info s5p6450_spi1_pdata = {
166169 .cfg_gpio = s5p6450_spi_cfg_gpio,
167170 .fifo_lvl_mask = 0x7f,
168171 .rx_lvl_offset = 15,
172+ .tx_st_done = 25,
169173 };
170174
171175 struct platform_device s5p64x0_device_spi1 = {
arch/arm/mach-s5pc100/dev-spi.c+4−0
@@ -15,6 +15,7 @@ · 14 unmodified lines
1515 #include <mach/dma.h>
1616 #include <mach/map.h>
1717 #include <mach/spi-clocks.h>
18+#include <mach/irqs.h>
1819
1920 #include <plat/s3c64xx-spi.h>
2021 #include <plat/gpio-cfg.h>
@@ -90,6 +91,7 @@ static struct s3c64xx_spi_info s5pc100_spi0_pdata = { · 69 unmodified lines
9091 .fifo_lvl_mask = 0x7f,
9192 .rx_lvl_offset = 13,
9293 .high_speed = 1,
94+ .tx_st_done = 21,
9395 };
9496
9597 static u64 spi_dmamask = DMA_BIT_MASK(32);
@@ -134,6 +136,7 @@ static struct s3c64xx_spi_info s5pc100_spi1_pdata = { · 38 unmodified lines
134136 .fifo_lvl_mask = 0x7f,
135137 .rx_lvl_offset = 13,
136138 .high_speed = 1,
139+ .tx_st_done = 21,
137140 };
138141
139142 struct platform_device s5pc100_device_spi1 = {
@@ -176,6 +179,7 @@ static struct s3c64xx_spi_info s5pc100_spi2_pdata = { · 36 unmodified lines
176179 .fifo_lvl_mask = 0x7f,
177180 .rx_lvl_offset = 13,
178181 .high_speed = 1,
182+ .tx_st_done = 21,
179183 };
180184
181185 struct platform_device s5pc100_device_spi2 = {
arch/arm/mach-s5pv210/dev-spi.c+2−0
@@ -85,6 +85,7 @@ static struct s3c64xx_spi_info s5pv210_spi0_pdata = { · 84 unmodified lines
8585 .fifo_lvl_mask = 0x1ff,
8686 .rx_lvl_offset = 15,
8787 .high_speed = 1,
88+ .tx_st_done = 25,
8889 };
8990
9091 static u64 spi_dmamask = DMA_BIT_MASK(32);
@@ -129,6 +130,7 @@ static struct s3c64xx_spi_info s5pv210_spi1_pdata = { · 38 unmodified lines
129130 .fifo_lvl_mask = 0x7f,
130131 .rx_lvl_offset = 15,
131132 .high_speed = 1,
133+ .tx_st_done = 25,
132134 };
133135
134136 struct platform_device s5pv210_device_spi1 = {
arch/arm/plat-s3c24xx/dma.c+3−9
@@ -1027,17 +1027,13 @@ int s3c2410_dma_config(unsigned int channel, · 1026 unmodified lines
10271027 struct s3c2410_dma_chan *chan = s3c_dma_lookup_channel(channel);
10281028 unsigned int dcon;
10291029
1030− pr_debug("%s: chan=%d, xfer_unit=%d, dcon=%08x\n",
1031− __func__, channel, xferunit, dcon);
1030+ pr_debug("%s: chan=%d, xfer_unit=%d\n", __func__, channel, xferunit);
10321031
10331032 if (chan == NULL)
10341033 return -EINVAL;
10351034
1036− pr_debug("%s: Initial dcon is %08x\n", __func__, dcon);
1037−
10381035 dcon = chan->dcon & dma_sel.dcon_mask;
1039−
1040− pr_debug("%s: New dcon is %08x\n", __func__, dcon);
1036+ pr_debug("%s: dcon is %08x\n", __func__, dcon);
10411037
10421038 switch (chan->req_ch) {
10431039 case DMACH_I2S_IN:
@@ -1235,7 +1231,7 @@ static void s3c2410_dma_resume_chan(struct s3c2410_dma_chan *cp) · 191 unmodified lines
12351231 /* restore channel's hardware configuration */
12361232
12371233 if (!cp->in_use)
1238− return 0;
1234+ return;
12391235
12401236 printk(KERN_INFO "dma%d: restoring configuration\n", cp->number);
12411237
@@ -1246,8 +1242,6 @@ static void s3c2410_dma_resume_chan(struct s3c2410_dma_chan *cp) · 4 unmodified lines
12461242
12471243 if (cp->map != NULL)
12481244 dma_sel.select(cp, cp->map);
1249−
1250− return 0;
12511245 }
12521246
12531247 static void s3c2410_dma_resume(void)
arch/arm/plat-s5p/s5p-time.c+2−2
@@ -370,11 +370,11 @@ static void __init s5p_clocksource_init(void) · 369 unmodified lines
370370
371371 clock_rate = clk_get_rate(tin_source);
372372
373− init_sched_clock(&cd, s5p_update_sched_clock, 32, clock_rate);
374−
375373 s5p_time_setup(timer_source.source_id, TCNT_MAX);
376374 s5p_time_start(timer_source.source_id, PERIODIC);
377375
376+ init_sched_clock(&cd, s5p_update_sched_clock, 32, clock_rate);
377+
378378 if (clocksource_register_hz(&time_clocksource, clock_rate))
379379 panic("%s: can't register clocksource\n", time_clocksource.name);
380380 }
arch/arm/plat-samsung/include/plat/devs.h+6−0
@@ -12,6 +12,10 @@ · 11 unmodified lines
1212 * it under the terms of the GNU General Public License version 2 as
1313 * published by the Free Software Foundation.
1414 */
15+
16+#ifndef __PLAT_DEVS_H
17+#define __PLAT_DEVS_H __FILE__
18+
1519 #include <linux/platform_device.h>
1620
1721 struct s3c24xx_uart_resources {
@@ -159,3 +163,5 @@ extern struct platform_device s3c_device_ac97; · 141 unmodified lines
159163 */
160164 extern void *s3c_set_platdata(void *pd, size_t pdsize,
161165 struct platform_device *pdev);
166+
167+#endif /* __PLAT_DEVS_H */
arch/arm/plat-samsung/include/plat/s3c64xx-spi.h+2−0
@@ -39,6 +39,7 @@ struct s3c64xx_spi_csinfo { · 38 unmodified lines
3939 * @fifo_lvl_mask: All tx fifo_lvl fields start at offset-6
4040 * @rx_lvl_offset: Depends on tx fifo_lvl field and bus number
4141 * @high_speed: If the controller supports HIGH_SPEED_EN bit
42+ * @tx_st_done: Depends on tx fifo_lvl field
4243 */
4344 struct s3c64xx_spi_info {
4445 int src_clk_nr;
@@ -53,6 +54,7 @@ struct s3c64xx_spi_info { · 8 unmodified lines
5354 int fifo_lvl_mask;
5455 int rx_lvl_offset;
5556 int high_speed;
57+ int tx_st_done;
5658 };
5759
5860 /**
drivers/spi/spi_s3c64xx.c+1−3
@@ -116,9 +116,7 @@ · 115 unmodified lines
116116 (((i)->fifo_lvl_mask + 1))) \
117117 ? 1 : 0)
118118
119−#define S3C64XX_SPI_ST_TX_DONE(v, i) ((((v) >> (i)->rx_lvl_offset) & \
120− (((i)->fifo_lvl_mask + 1) << 1)) \
121− ? 1 : 0)
119+#define S3C64XX_SPI_ST_TX_DONE(v, i) (((v) & (1 << (i)->tx_st_done)) ? 1 : 0)
122120 #define TX_FIFO_LVL(v, i) (((v) >> 6) & (i)->fifo_lvl_mask)
123121 #define RX_FIFO_LVL(v, i) (((v) >> (i)->rx_lvl_offset) & (i)->fifo_lvl_mask)
124122

Keyboard shortcuts

General

Show keyboard shortcuts
?
Focus the current search
/

Issues and pull requests

Open filters
f

Issues, pull requests and Inbox

Select next item
j↓
Select previous item
k↑
Open selected item
Enter
Dismiss filters or clear selection
Esc

Repository code

Go to file
t