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drm/msm: Add per-instance submit queues

Currently the behavior of a command stream is provided by the user application during submission and the application is expected to internally maintain the settings for each 'context' or 'rendering queue' and specify the correct ones. This works okay for simple cases but as applications become more complex we will want to set context specific flags and do various permission checks to allow certain contexts to enable additional privileges. Add kernel-side submit queues to be analogous to 'contexts' or 'rendering queues' on the application side. Each file descriptor instance will maintain its own list of queues. Queues cannot be shared between file descriptors. For backwards compatibility context id '0' is defined as a default context specifying no priority and no special flags. This is intended to be the usual configuration for 99% of applications so that a garden variety application can function correctly without creating a queue. Only those applications requiring the specific benefit of different queues need create one.

Jordan Crouse committed 9 years ago

Commit f7de1541 parent 0033e1b8 files · +250 −16Browse files

Showing the changes to include/uapi (1 of 8 files). Show all

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include/uapi/drm/msm_drm.h+22−0
@@ -218,6 +218,7 @@ struct drm_msm_gem_submit { · 217 unmodified lines
218 __u64 bos; /* in, ptr to array of submit_bo's */218 __u64 bos; /* in, ptr to array of submit_bo's */
219 __u64 cmds; /* in, ptr to array of submit_cmd's */219 __u64 cmds; /* in, ptr to array of submit_cmd's */
220 __s32 fence_fd; /* in/out fence fd (see MSM_SUBMIT_FENCE_FD_IN/OUT) */220 __s32 fence_fd; /* in/out fence fd (see MSM_SUBMIT_FENCE_FD_IN/OUT) */
221 __u32 queueid; /* in, submitqueue id */
221};222};
222 223
223/* The normal way to synchronize with the GPU is just to CPU_PREP on224/* The normal way to synchronize with the GPU is just to CPU_PREP on
@@ -254,6 +255,20 @@ struct drm_msm_gem_madvise { · 30 unmodified lines
254 __u32 retained; /* out, whether backing store still exists */255 __u32 retained; /* out, whether backing store still exists */
255};256};
256 257
258/*
259 * Draw queues allow the user to set specific submission parameter. Command
260 * submissions specify a specific submitqueue to use. ID 0 is reserved for
261 * backwards compatibility as a "default" submitqueue
262 */
263
264#define MSM_SUBMITQUEUE_FLAGS (0)
265
266struct drm_msm_submitqueue {
267 __u32 flags; /* in, MSM_SUBMITQUEUE_x */
268 __u32 prio; /* in, Priority level */
269 __u32 id; /* out, identifier */
270};
271
257#define DRM_MSM_GET_PARAM 0x00272#define DRM_MSM_GET_PARAM 0x00
258/* placeholder:273/* placeholder:
259#define DRM_MSM_SET_PARAM 0x01274#define DRM_MSM_SET_PARAM 0x01
@@ -265,6 +280,11 @@ struct drm_msm_gem_madvise { · 5 unmodified lines
265#define DRM_MSM_GEM_SUBMIT 0x06280#define DRM_MSM_GEM_SUBMIT 0x06
266#define DRM_MSM_WAIT_FENCE 0x07281#define DRM_MSM_WAIT_FENCE 0x07
267#define DRM_MSM_GEM_MADVISE 0x08282#define DRM_MSM_GEM_MADVISE 0x08
283/* placeholder:
284#define DRM_MSM_GEM_SVM_NEW 0x09
285 */
286#define DRM_MSM_SUBMITQUEUE_NEW 0x0A
287#define DRM_MSM_SUBMITQUEUE_CLOSE 0x0B
268 288
269#define DRM_IOCTL_MSM_GET_PARAM DRM_IOWR(DRM_COMMAND_BASE + DRM_MSM_GET_PARAM, struct drm_msm_param)289#define DRM_IOCTL_MSM_GET_PARAM DRM_IOWR(DRM_COMMAND_BASE + DRM_MSM_GET_PARAM, struct drm_msm_param)
270#define DRM_IOCTL_MSM_GEM_NEW DRM_IOWR(DRM_COMMAND_BASE + DRM_MSM_GEM_NEW, struct drm_msm_gem_new)290#define DRM_IOCTL_MSM_GEM_NEW DRM_IOWR(DRM_COMMAND_BASE + DRM_MSM_GEM_NEW, struct drm_msm_gem_new)
@@ -274,6 +294,8 @@ struct drm_msm_gem_madvise { · 3 unmodified lines
274#define DRM_IOCTL_MSM_GEM_SUBMIT DRM_IOWR(DRM_COMMAND_BASE + DRM_MSM_GEM_SUBMIT, struct drm_msm_gem_submit)294#define DRM_IOCTL_MSM_GEM_SUBMIT DRM_IOWR(DRM_COMMAND_BASE + DRM_MSM_GEM_SUBMIT, struct drm_msm_gem_submit)
275#define DRM_IOCTL_MSM_WAIT_FENCE DRM_IOW (DRM_COMMAND_BASE + DRM_MSM_WAIT_FENCE, struct drm_msm_wait_fence)295#define DRM_IOCTL_MSM_WAIT_FENCE DRM_IOW (DRM_COMMAND_BASE + DRM_MSM_WAIT_FENCE, struct drm_msm_wait_fence)
276#define DRM_IOCTL_MSM_GEM_MADVISE DRM_IOWR(DRM_COMMAND_BASE + DRM_MSM_GEM_MADVISE, struct drm_msm_gem_madvise)296#define DRM_IOCTL_MSM_GEM_MADVISE DRM_IOWR(DRM_COMMAND_BASE + DRM_MSM_GEM_MADVISE, struct drm_msm_gem_madvise)
297#define DRM_IOCTL_MSM_SUBMITQUEUE_NEW DRM_IOWR(DRM_COMMAND_BASE + DRM_MSM_SUBMITQUEUE_NEW, struct drm_msm_submitqueue)
298#define DRM_IOCTL_MSM_SUBMITQUEUE_CLOSE DRM_IOW (DRM_COMMAND_BASE + DRM_MSM_SUBMITQUEUE_CLOSE, __u32)
277 299
278#if defined(__cplusplus)300#if defined(__cplusplus)
279}301}

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