Pull rdma updates from Jason Gunthorpe: "Many small changes across the subystem, some highlights: - Usual driver cleanups in qedr, siw, erdma, hfi1, mlx4/5, irdma, mthca, hns, and bnxt_re - siw now works over tunnel and other netdevs with a MAC address by removing assumptions about a MAC/GID from the connection manager - "Doorbell Pacing" for bnxt_re - this is a best effort scheme to allow userspace to slow down the doorbell rings if the HW gets full - irdma egress VLAN priority, better QP/WQ sizing - rxe bug fixes in queue draining and srq resizing - Support more ethernet speed options in the core layer - DMABUF support for bnxt_re - Multi-stage MTT support for erdma to allow much bigger MR registrations - A irdma fix with a CVE that came in too late to go to -rc, missing bounds checking for 0 length MRs" * tag 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/rdma/rdma: (87 commits) IB/hfi1: Reduce printing of errors during driver shut down RDMA/hfi1: Move user SDMA system memory pinning code to its own file RDMA/hfi1: Use list_for_each_entry() helper RDMA/mlx5: Fix trailing */ formatting in block comment RDMA/rxe: Fix redundant break statement in switch-case. RDMA/efa: Fix wrong resources deallocation order RDMA/siw: Call llist_reverse_order in siw_run_sq RDMA/siw: Correct wrong debug message RDMA/siw: Balance the reference of cep->kref in the error path Revert "IB/isert: Fix incorrect release of isert connection" RDMA/bnxt_re: Fix kernel doc errors RDMA/irdma: Prevent zero-length STAG registration RDMA/erdma: Implement hierarchical MTT RDMA/erdma: Refactor the storage structure of MTT entries RDMA/erdma: Renaming variable names and field names of struct erdma_mem RDMA/hns: Support hns HW stats RDMA/hns: Dump whole QP/CQ/MR resource in raw RDMA/irdma: Add missing kernel-doc in irdma_setup_umode_qp() RDMA/mlx4: Copy union directly RDMA/irdma: Drop unused kernel push code ...
Showing the changes to include/uapi (2 of 94 files). Show all
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| @@ -53,6 +53,7 @@ enum { · 52 unmodified lines | |||
| 53 | BNXT_RE_UCNTX_CMASK_HAVE_CCTX = 0x1ULL, | 53 | BNXT_RE_UCNTX_CMASK_HAVE_CCTX = 0x1ULL, |
| 54 | BNXT_RE_UCNTX_CMASK_HAVE_MODE = 0x02ULL, | 54 | BNXT_RE_UCNTX_CMASK_HAVE_MODE = 0x02ULL, |
| 55 | BNXT_RE_UCNTX_CMASK_WC_DPI_ENABLED = 0x04ULL, | 55 | BNXT_RE_UCNTX_CMASK_WC_DPI_ENABLED = 0x04ULL, |
| 56 | BNXT_RE_UCNTX_CMASK_DBR_PACING_ENABLED = 0x08ULL, | ||
| 56 | }; | 57 | }; |
| 57 | 58 | ||
| 58 | enum bnxt_re_wqe_mode { | 59 | enum bnxt_re_wqe_mode { |
| @@ -131,10 +132,13 @@ enum bnxt_re_shpg_offt { · 72 unmodified lines | |||
| 131 | 132 | ||
| 132 | enum bnxt_re_objects { | 133 | enum bnxt_re_objects { |
| 133 | BNXT_RE_OBJECT_ALLOC_PAGE = (1U << UVERBS_ID_NS_SHIFT), | 134 | BNXT_RE_OBJECT_ALLOC_PAGE = (1U << UVERBS_ID_NS_SHIFT), |
| 135 | BNXT_RE_OBJECT_NOTIFY_DRV, | ||
| 134 | }; | 136 | }; |
| 135 | 137 | ||
| 136 | enum bnxt_re_alloc_page_type { | 138 | enum bnxt_re_alloc_page_type { |
| 137 | BNXT_RE_ALLOC_WC_PAGE = 0, | 139 | BNXT_RE_ALLOC_WC_PAGE = 0, |
| 140 | BNXT_RE_ALLOC_DBR_BAR_PAGE, | ||
| 141 | BNXT_RE_ALLOC_DBR_PAGE, | ||
| 138 | }; | 142 | }; |
| 139 | 143 | ||
| 140 | enum bnxt_re_var_alloc_page_attrs { | 144 | enum bnxt_re_var_alloc_page_attrs { |
| @@ -154,4 +158,7 @@ enum bnxt_re_alloc_page_methods { · 13 unmodified lines | |||
| 154 | BNXT_RE_METHOD_DESTROY_PAGE, | 158 | BNXT_RE_METHOD_DESTROY_PAGE, |
| 155 | }; | 159 | }; |
| 156 | 160 | ||
| 161 | enum bnxt_re_notify_drv_methods { | ||
| 162 | BNXT_RE_METHOD_NOTIFY_DRV = (1U << UVERBS_ID_NS_SHIFT), | ||
| 163 | }; | ||
| 157 | #endif /* __BNXT_RE_UVERBS_ABI_H__*/ | 164 | #endif /* __BNXT_RE_UVERBS_ABI_H__*/ |
| @@ -22,10 +22,16 @@ enum irdma_memreg_type { · 21 unmodified lines | |||
| 22 | IRDMA_MEMREG_TYPE_CQ = 2, | 22 | IRDMA_MEMREG_TYPE_CQ = 2, |
| 23 | }; | 23 | }; |
| 24 | 24 | ||
| 25 | enum { | ||
| 26 | IRDMA_ALLOC_UCTX_USE_RAW_ATTR = 1 << 0, | ||
| 27 | IRDMA_ALLOC_UCTX_MIN_HW_WQ_SIZE = 1 << 1, | ||
| 28 | }; | ||
| 29 | |||
| 25 | struct irdma_alloc_ucontext_req { | 30 | struct irdma_alloc_ucontext_req { |
| 26 | __u32 rsvd32; | 31 | __u32 rsvd32; |
| 27 | __u8 userspace_ver; | 32 | __u8 userspace_ver; |
| 28 | __u8 rsvd8[3]; | 33 | __u8 rsvd8[3]; |
| 34 | __aligned_u64 comp_mask; | ||
| 29 | }; | 35 | }; |
| 30 | 36 | ||
| 31 | struct irdma_alloc_ucontext_resp { | 37 | struct irdma_alloc_ucontext_resp { |
| @@ -46,6 +52,9 @@ struct irdma_alloc_ucontext_resp { · 14 unmodified lines | |||
| 46 | __u16 max_hw_sq_chunk; | 52 | __u16 max_hw_sq_chunk; |
| 47 | __u8 hw_rev; | 53 | __u8 hw_rev; |
| 48 | __u8 rsvd2; | 54 | __u8 rsvd2; |
| 55 | __aligned_u64 comp_mask; | ||
| 56 | __u16 min_hw_wq_size; | ||
| 57 | __u8 rsvd3[6]; | ||
| 49 | }; | 58 | }; |
| 50 | 59 | ||
| 51 | struct irdma_alloc_pd_resp { | 60 | struct irdma_alloc_pd_resp { |