Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/net

All conflicts were simple overlapping changes except perhaps for the Thunder driver. That driver has a change_mtu method explicitly for sending a message to the hardware. If that fails it returns an error. Normally a driver doesn't need an ndo_change_mtu method becuase those are usually just range changes, which are now handled generically. But since this extra operation is needed in the Thunder driver, it has to stay. However, if the message send fails we have to restore the original MTU before the change because the entire call chain expects that if an error is thrown by ndo_change_mtu then the MTU did not change. Therefore code is added to nicvf_change_mtu to remember the original MTU, and to restore it upon nicvf_update_hw_max_frs() failue.

David S. Miller committed 9 years ago

Commit f9aa9dc2 parents 06b37b6 3b404a5242 files · +3388 −1793Browse files

Unified · Split

242 files

Documentation/devicetree/bindings/ipmi/aspeed,ast2400-ibt-bmc.txt +2 −2
Documentation/devicetree/bindings/sound/omap-abe-twl6040.txt +1 −1
Documentation/i2c/i2c-topology +2 −2
Documentation/virtual/kvm/api.txt +11 −0
MAINTAINERS +1 −0
Makefile +4 −3
arch/arm/boot/dts/imx53-qsb.dts +7 −7
arch/arm/boot/dts/logicpd-som-lv.dtsi +5 −0
arch/arm/boot/dts/logicpd-torpedo-som.dtsi +2 −2
arch/arm/boot/dts/omap5-board-common.dtsi +4 −3
arch/arm/boot/dts/stih410-b2260.dts +1 −1
arch/arm/boot/dts/sun8i-a23-a33.dtsi +4 −0
arch/arm/kernel/traps.c +20 −0
arch/arm/kernel/vmlinux-xip.lds.S +5 −0
arch/arm/lib/backtrace.S +3 −34
arch/arm/mach-omap2/Kconfig +1 −0
arch/arm/mach-omap2/id.c +11 −5
arch/arm/mach-omap2/prm3xxx.c +3 −0
arch/arm/mach-omap2/voltage.c +6 −0
arch/arm/mm/dma-mapping.c +1 −1
arch/arm/mm/proc-v7m.S +1 −1
arch/arm64/boot/dts/marvell/armada-37xx.dtsi +2 −2
arch/arm64/boot/dts/marvell/armada-cp110-slave.dtsi +3 −3
arch/arm64/include/asm/perf_event.h +9 −1
arch/arm64/kernel/perf_event.c +1 −9
arch/arm64/kvm/sys_regs.c +8 −2
arch/powerpc/include/asm/exception-64s.h +12 −3
arch/powerpc/include/asm/ppc-opcode.h +1 −0
arch/powerpc/kernel/exceptions-64s.S +8 −3
arch/powerpc/kernel/process.c +21 −21
arch/powerpc/kernel/setup_64.c +14 −6
arch/powerpc/mm/hash_utils_64.c +4 −0
arch/powerpc/mm/pgtable-radix.c +4 −0
arch/powerpc/mm/tlb-radix.c +4 −0
arch/sparc/Kconfig +23 −0
arch/sparc/include/asm/hypervisor.h +343 −0
arch/sparc/include/asm/iommu_64.h +28 −0
arch/sparc/kernel/hvapi.c +1 −0
arch/sparc/kernel/iommu.c +6 −2
arch/sparc/kernel/iommu_common.h +0 −1
arch/sparc/kernel/pci_sun4v.c +360 −58
arch/sparc/kernel/pci_sun4v.h +21 −0
arch/sparc/kernel/pci_sun4v_asm.S +68 −0
arch/sparc/kernel/signal_32.c +2 −2
arch/sparc/mm/init_64.c +64 −7
arch/x86/kvm/irq_comm.c +27 −31
arch/x86/kvm/x86.c +34 −13
arch/x86/purgatory/Makefile +1 −0
arch/xtensa/include/uapi/asm/unistd.h +8 −1
arch/xtensa/kernel/time.c +7 −7
arch/xtensa/kernel/traps.c +22 −52
crypto/algif_hash.c +10 −7
drivers/acpi/acpica/tbfadt.c +4 −6
drivers/char/ipmi/bt-bmc.c +2 −2
drivers/crypto/caam/caamalg.c +10 −1
drivers/dma/Kconfig +1 −0
drivers/dma/cppi41.c +26 −5
drivers/dma/edma.c +1 −0
drivers/dma/sun6i-dma.c +1 −1
drivers/gpio/Kconfig +0 −4
drivers/gpio/Makefile +1 −1
drivers/gpio/gpio-pca953x.c +2 −2
drivers/gpio/gpio-tc3589x.c +1 −1
drivers/gpio/gpiolib.c +5 −2
drivers/gpu/drm/amd/amdgpu/amdgpu.h +1 −0
drivers/gpu/drm/amd/amdgpu/amdgpu_bo_list.c +1 −1
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c +7 −20
drivers/gpu/drm/amd/amdgpu/amdgpu_prime.c +19 −1
drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c +0 −2
drivers/gpu/drm/arc/arcpgu_hdmi.c +17 −142
drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_crtc.c +11 −2
drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.c +0 −4
drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_plane.c +0 −5
drivers/gpu/drm/i915/i915_gem_execbuffer.c +8 −0
drivers/gpu/drm/i915/intel_bios.c +22 −8
drivers/gpu/drm/i915/intel_dp.c +0 −10
drivers/gpu/drm/i915/intel_sprite.c +1 −1
drivers/gpu/drm/i915/intel_vbt_defs.h +2 −1
drivers/gpu/drm/mediatek/mtk_disp_ovl.c +1 −0
drivers/gpu/drm/mediatek/mtk_dpi.c +7 −2
drivers/gpu/drm/mediatek/mtk_hdmi.c +11 −6
drivers/gpu/drm/mediatek/mtk_mt8173_hdmi_phy.c +30 −12
drivers/gpu/drm/sun4i/sun4i_drv.c +2 −2
drivers/gpu/drm/sun4i/sun4i_rgb.c +8 −12
drivers/i2c/Kconfig +0 −1
drivers/i2c/busses/i2c-digicolor.c +1 −1
drivers/i2c/muxes/Kconfig +1 −0
drivers/i2c/muxes/i2c-demux-pinctrl.c +20 −2
drivers/i2c/muxes/i2c-mux-pca954x.c +2 −2
drivers/infiniband/core/addr.c +9 −2
drivers/infiniband/core/cm.c +110 −16
drivers/infiniband/core/cma.c +20 −1
drivers/infiniband/core/umem.c +1 −1
drivers/infiniband/core/uverbs_main.c +2 −5
drivers/infiniband/hw/cxgb4/cq.c +3 −14
drivers/infiniband/hw/cxgb4/iw_cxgb4.h +1 −1
drivers/infiniband/hw/cxgb4/mem.c +12 −0
drivers/infiniband/hw/cxgb4/qp.c +12 −8
drivers/infiniband/hw/hfi1/affinity.c +0 −72
drivers/infiniband/hw/hfi1/affinity.h +0 −4
drivers/infiniband/hw/hfi1/chip.c +9 −18
drivers/infiniband/hw/hfi1/chip.h +3 −0
drivers/infiniband/hw/hfi1/driver.c +26 −11
drivers/infiniband/hw/hfi1/file_ops.c +16 −3
drivers/infiniband/hw/hfi1/hfi.h +34 −55
drivers/infiniband/hw/hfi1/init.c +64 −40
drivers/infiniband/hw/hfi1/pcie.c +1 −2
drivers/infiniband/hw/hfi1/pio.c +3 −10
drivers/infiniband/hw/hfi1/rc.c +1 −1
drivers/infiniband/hw/hfi1/sdma.c +2 −17
drivers/infiniband/hw/hfi1/sysfs.c +0 −25
drivers/infiniband/hw/hfi1/trace_rx.h +0 −60
drivers/infiniband/hw/hfi1/user_sdma.c +1 −1
drivers/infiniband/hw/mlx4/ah.c +4 −1
drivers/infiniband/hw/mlx4/cq.c +4 −1
drivers/infiniband/hw/mlx5/cq.c +1 −2
drivers/infiniband/hw/mlx5/main.c +7 −4
drivers/infiniband/hw/mlx5/mlx5_ib.h +2 −0
drivers/infiniband/hw/mlx5/mr.c +5 −1
drivers/infiniband/hw/mlx5/qp.c +10 −2
drivers/infiniband/sw/rdmavt/dma.c +0 −3
drivers/infiniband/sw/rxe/rxe_net.c +2 −6
drivers/infiniband/sw/rxe/rxe_qp.c +2 −0
drivers/infiniband/sw/rxe/rxe_queue.c +9 −0
drivers/infiniband/sw/rxe/rxe_queue.h +2 −0
drivers/infiniband/sw/rxe/rxe_req.c +13 −8
drivers/mailbox/pcc.c +7 −6
drivers/mfd/intel-lpss-pci.c +9 −22
drivers/mfd/intel-lpss.c +0 −3
drivers/mfd/intel_soc_pmic_bxtwc.c +4 −2
drivers/mfd/mfd-core.c +2 −0
drivers/mfd/stmpe.c +2 −0
drivers/net/dsa/b53/b53_common.c +4 −12
drivers/net/ethernet/arc/emac_main.c +4 −3
drivers/net/ethernet/broadcom/bnxt/bnxt.c +4 −0
drivers/net/ethernet/cadence/macb.c +6 −0
drivers/net/ethernet/cavium/thunder/nic.h +36 −28
drivers/net/ethernet/cavium/thunder/nic_main.c +26 −11
drivers/net/ethernet/cavium/thunder/nic_reg.h +1 −0
drivers/net/ethernet/cavium/thunder/nicvf_ethtool.c +59 −46
drivers/net/ethernet/cavium/thunder/nicvf_main.c +83 −75
drivers/net/ethernet/cavium/thunder/nicvf_queues.c +67 −51
drivers/net/ethernet/cavium/thunder/nicvf_queues.h +2 −22
drivers/net/ethernet/cavium/thunder/thunder_bgx.c +2 −2
drivers/net/ethernet/cavium/thunder/thunder_bgx.h +2 −0
drivers/net/ethernet/chelsio/cxgb4/sge.c +0 −1
drivers/net/ethernet/emulex/benet/be_main.c +0 −1
drivers/net/ethernet/marvell/sky2.c +13 −0
drivers/net/ethernet/stmicro/stmmac/Kconfig +1 −1
drivers/net/ethernet/stmicro/stmmac/altr_tse_pcs.c +2 −2
drivers/net/ethernet/stmicro/stmmac/common.h +14 −10
drivers/net/ethernet/stmicro/stmmac/descs.h +12 −8
drivers/net/ethernet/stmicro/stmmac/dwmac4_descs.c +74 −21
drivers/net/ethernet/stmicro/stmmac/dwmac4_descs.h +4 −0
drivers/net/ethernet/stmicro/stmmac/enh_desc.c +18 −10
drivers/net/ethernet/stmicro/stmmac/stmmac.h +1 −0
drivers/net/ethernet/stmicro/stmmac/stmmac_ethtool.c +11 −8
drivers/net/ethernet/stmicro/stmmac/stmmac_hwtstamp.c +34 −9
drivers/net/ethernet/stmicro/stmmac/stmmac_main.c +48 −45
drivers/net/ethernet/stmicro/stmmac/stmmac_ptp.c +5 −4
drivers/net/ethernet/stmicro/stmmac/stmmac_ptp.h +37 −35
drivers/net/ethernet/sun/sunbmac.c +3 −2
drivers/net/ethernet/sun/sunbmac.h +1 −1
drivers/net/ethernet/sun/sunqe.c +6 −5
drivers/net/ethernet/sun/sunqe.h +2 −2
drivers/net/ethernet/ti/cpsw.c +74 −21
drivers/net/phy/fixed_phy.c +1 −1
drivers/net/phy/vitesse.c +33 −1
drivers/net/virtio_net.c +5 −0
drivers/net/wireless/mac80211_hwsim.c +1 −1
drivers/nvme/host/pci.c +4 −14
drivers/nvme/host/rdma.c +39 −3
drivers/nvme/target/core.c +7 −3
drivers/nvme/target/rdma.c +15 −3
drivers/of/of_mdio.c +5 −1
drivers/video/fbdev/amba-clcd-versatile.c +2 −2
fs/crypto/fname.c +21 −32
fs/crypto/keyinfo.c +13 −3
fs/ext4/ext4.h +1 −0
fs/ext4/super.c +16 −1
fs/fuse/dir.c +5 −0
fs/fuse/file.c +6 −0
fs/fuse/fuse_i.h +1 −0
fs/fuse/inode.c +2 −1
fs/orangefs/orangefs-debugfs.c +2 −0
fs/xattr.c +14 −8
include/acpi/actbl.h +70 −94
include/acpi/platform/aclinux.h +3 −0
include/linux/bpf_verifier.h +3 −2
include/linux/huge_mm.h +1 −1
include/linux/sunrpc/svc_xprt.h +1 −0
include/net/gro_cells.h +3 −0
include/net/ip_fib.h +1 −0
include/net/net_namespace.h +1 −1
include/uapi/linux/kvm.h +7 −0
kernel/bpf/verifier.c +47 −23
kernel/locking/lockdep_internals.h +17 −3
kernel/trace/ftrace.c +23 −1
lib/Kconfig.debug +3 −0
lib/iov_iter.c +3 −1
mm/huge_memory.c +8 −1
mm/mremap.c +21 −9
net/batman-adv/hard-interface.c +1 −0
net/batman-adv/tp_meter.c +1 −0
net/core/net_namespace.c +2 −0
net/core/rtnetlink.c +14 −8
net/ipv4/fib_frontend.c +15 −5
net/ipv4/fib_trie.c +68 −1
net/ipv4/igmp.c +36 −14
net/ipv4/tcp_cong.c +3 −1
net/ipv4/udp.c +3 −3
net/ipv6/ip6_tunnel.c +11 −2
net/ipv6/udp.c +3 −3
net/l2tp/l2tp_eth.c +1 −1
net/l2tp/l2tp_ip.c +3 −2
net/l2tp/l2tp_ip6.c +3 −2
net/mac80211/sta_info.c +1 −1
net/mac80211/tx.c +10 −4
net/mac80211/vht.c +16 −0
net/sched/cls_api.c +3 −2
net/socket.c +15 −0
net/sunrpc/svc_xprt.c +1 −10
net/sunrpc/svcsock.c +21 −0
net/sunrpc/xprtrdma/svc_rdma_transport.c +6 −0
net/tipc/socket.c +1 −47
net/unix/af_unix.c +11 −6
net/wireless/core.h +1 −0
net/wireless/scan.c +69 −0
net/wireless/util.c +2 −1
scripts/Makefile.build +75 −6
scripts/gcc-x86_64-has-stack-protector.sh +1 −1
security/apparmor/domain.c +4 −2
sound/pci/hda/patch_realtek.c +0 −2
sound/pci/hda/thinkpad_helper.c +2 −1
sound/usb/card.c +2 −1
tools/power/acpi/Makefile.config +12 −11
tools/power/acpi/Makefile.rules +27 −13
tools/power/acpi/tools/acpidbg/Makefile +1 −3
tools/power/acpi/tools/acpidbg/acpidbg.c +7 −1
tools/power/acpi/tools/acpidump/Makefile +6 −6
virt/kvm/arm/pmu.c +5 −3
virt/kvm/async_pf.c +12 −1

Documentation/devicetree/bindings/ipmi/aspeed,ast2400-ibt-bmc.txtrenamed from Documentation/devicetree/bindings/ipmi/aspeed,ast2400-bt-bmc.txt+2−2

@@ -6,7 +6,7 @@ perform in-band IPMI communication with their host. · 5 unmodified lines
6	6
7	7	Required properties:
8	8
9		−- compatible : should be "aspeed,ast2400-bt-bmc"
	9	+- compatible : should be "aspeed,ast2400-ibt-bmc"
10	10	- reg: physical address and size of the registers
11	11
12	12	Optional properties:
@@ -17,7 +17,7 @@ Optional properties: · 4 unmodified lines
17	17	Example:
18	18
19	19	ibt@1e789140 {
20		− compatible = "aspeed,ast2400-bt-bmc";
	20	+ compatible = "aspeed,ast2400-ibt-bmc";
21	21	reg = <0x1e789140 0x18>;
22	22	interrupts = <8>;
23	23	};

Documentation/devicetree/bindings/sound/omap-abe-twl6040.txt+1−1

@@ -12,7 +12,7 @@ Required properties: · 11 unmodified lines
12	12
13	13	Optional properties:
14	14	- ti,dmic: phandle for the OMAP dmic node if the machine have it connected
15		−- ti,jack_detection: Need to be present if the board capable to detect jack
	15	+- ti,jack-detection: Need to be present if the board capable to detect jack
16	16	insertion, removal.
17	17
18	18	Available audio endpoints for the audio-routing table:

Documentation/i2c/i2c-topology+2−2

@@ -326,7 +326,7 @@ Two parent-locked sibling muxes · 325 unmodified lines
326	326
327	327	This is a good topology.
328	328
329		− .--------.
	329	+ .--------.
330	330	.----------. .--\| dev D1 \|
331	331	\| parent- \|--' '--------'
332	332	.--\| locked \| .--------.
@@ -350,7 +350,7 @@ Mux-locked and parent-locked sibling muxes · 17 unmodified lines
350	350
351	351	This is a good topology.
352	352
353		− .--------.
	353	+ .--------.
354	354	.----------. .--\| dev D1 \|
355	355	\| mux- \|--' '--------'
356	356	.--\| locked \| .--------.

Documentation/virtual/kvm/api.txt+11−0

@@ -777,6 +777,17 @@ Gets the current timestamp of kvmclock as seen by the current guest. In · 776 unmodified lines
777	777	conjunction with KVM_SET_CLOCK, it is used to ensure monotonicity on scenarios
778	778	such as migration.
779	779
	780	+When KVM_CAP_ADJUST_CLOCK is passed to KVM_CHECK_EXTENSION, it returns the
	781	+set of bits that KVM can return in struct kvm_clock_data's flag member.
	782	+
	783	+The only flag defined now is KVM_CLOCK_TSC_STABLE. If set, the returned
	784	+value is the exact kvmclock value seen by all VCPUs at the instant
	785	+when KVM_GET_CLOCK was called. If clear, the returned value is simply
	786	+CLOCK_MONOTONIC plus a constant offset; the offset can be modified
	787	+with KVM_SET_CLOCK. KVM will try to make all VCPUs follow this clock,
	788	+but the exact value read by each VCPU could differ, because the host
	789	+TSC is not stable.
	790	+
780	791	struct kvm_clock_data {
781	792	__u64 clock; /* kvmclock current value */
782	793	__u32 flags;

MAINTAINERS+1−0

@@ -7086,6 +7086,7 @@ F: drivers/scsi/53c700* · 7085 unmodified lines
7086	7086	LED SUBSYSTEM
7087	7087	M: Richard Purdie <rpurdie@rpsys.net>
7088	7088	M: Jacek Anaszewski <j.anaszewski@samsung.com>
	7089	+M: Pavel Machek <pavel@ucw.cz>
7089	7090	L: linux-leds@vger.kernel.org
7090	7091	T: git git://git.kernel.org/pub/scm/linux/kernel/git/j.anaszewski/linux-leds.git
7091	7092	S: Maintained

Makefile+4−3

@@ -1,7 +1,7 @@
1	1	VERSION = 4
2	2	PATCHLEVEL = 9
3	3	SUBLEVEL = 0
4		−EXTRAVERSION = -rc5
	4	+EXTRAVERSION = -rc6
5	5	NAME = Psychotic Stoned Sheep
6	6
7	7	# DOCUMENTATION
@@ -399,11 +399,12 @@ KBUILD_CFLAGS := -Wall -Wundef -Wstrict-prototypes -Wno-trigraphs \ · 391 unmodified lines
399	399	-fno-strict-aliasing -fno-common \
400	400	-Werror-implicit-function-declaration \
401	401	-Wno-format-security \
402		− -std=gnu89
	402	+ -std=gnu89 $(call cc-option,-fno-PIE)
	403	+
403	404
404	405	KBUILD_AFLAGS_KERNEL :=
405	406	KBUILD_CFLAGS_KERNEL :=
406		−KBUILD_AFLAGS := -D__ASSEMBLY__
	407	+KBUILD_AFLAGS := -D__ASSEMBLY__ $(call cc-option,-fno-PIE)
407	408	KBUILD_AFLAGS_MODULE := -DMODULE
408	409	KBUILD_CFLAGS_MODULE := -DMODULE
409	410	KBUILD_LDFLAGS_MODULE := -T $(srctree)/scripts/module-common.lds

arch/arm/boot/dts/imx53-qsb.dts+7−7

@@ -64,8 +64,8 @@ · 63 unmodified lines
64	64	};
65	65
66	66	ldo3_reg: ldo3 {
67		− regulator-min-microvolt = <600000>;
68		− regulator-max-microvolt = <1800000>;
	67	+ regulator-min-microvolt = <1725000>;
	68	+ regulator-max-microvolt = <3300000>;
69	69	regulator-always-on;
70	70	};
71	71
@@ -76,8 +76,8 @@ · 4 unmodified lines
76	76	};
77	77
78	78	ldo5_reg: ldo5 {
79		− regulator-min-microvolt = <1725000>;
80		− regulator-max-microvolt = <3300000>;
	79	+ regulator-min-microvolt = <1200000>;
	80	+ regulator-max-microvolt = <3600000>;
81	81	regulator-always-on;
82	82	};
83	83
@@ -100,14 +100,14 @@ · 16 unmodified lines
100	100	};
101	101
102	102	ldo9_reg: ldo9 {
103		− regulator-min-microvolt = <1200000>;
	103	+ regulator-min-microvolt = <1250000>;
104	104	regulator-max-microvolt = <3600000>;
105	105	regulator-always-on;
106	106	};
107	107
108	108	ldo10_reg: ldo10 {
109		− regulator-min-microvolt = <1250000>;
110		− regulator-max-microvolt = <3650000>;
	109	+ regulator-min-microvolt = <1200000>;
	110	+ regulator-max-microvolt = <3600000>;
111	111	regulator-always-on;
112	112	};
113	113	};

arch/arm/boot/dts/logicpd-som-lv.dtsi+5−0

@@ -13,6 +13,11 @@ · 12 unmodified lines
13	13	};
14	14	};
15	15
	16	+ memory@80000000 {
	17	+ device_type = "memory";
	18	+ reg = <0x80000000 0>;
	19	+ };
	20	+
16	21	wl12xx_vmmc: wl12xx_vmmc {
17	22	compatible = "regulator-fixed";
18	23	regulator-name = "vwl1271";

arch/arm/boot/dts/logicpd-torpedo-som.dtsi+2−2

@@ -13,9 +13,9 @@ · 12 unmodified lines
13	13	};
14	14	};
15	15
16		− memory@0 {
	16	+ memory@80000000 {
17	17	device_type = "memory";
18		− reg = <0 0>;
	18	+ reg = <0x80000000 0>;
19	19	};
20	20
21	21	leds {

arch/arm/boot/dts/omap5-board-common.dtsi+4−3

@@ -124,6 +124,7 @@ · 123 unmodified lines
124	124	compatible = "ti,abe-twl6040";
125	125	ti,model = "omap5-uevm";
126	126
	127	+ ti,jack-detection;
127	128	ti,mclk-freq = <19200000>;
128	129
129	130	ti,mcpdm = <&mcpdm>;
@@ -415,7 +416,7 @@ · 285 unmodified lines
415	416	ti,backup-battery-charge-high-current;
416	417	};
417	418
418		− gpadc {
	419	+ gpadc: gpadc {
419	420	compatible = "ti,palmas-gpadc";
420	421	interrupts = <18 0
421	422	16 0
@@ -475,8 +476,8 @@ · 53 unmodified lines
475	476	smps6_reg: smps6 {
476	477	/* VDD_DDR3 - over VDD_SMPS6 */
477	478	regulator-name = "smps6";
478		− regulator-min-microvolt = <1200000>;
479		− regulator-max-microvolt = <1200000>;
	479	+ regulator-min-microvolt = <1350000>;
	480	+ regulator-max-microvolt = <1350000>;
480	481	regulator-always-on;
481	482	regulator-boot-on;
482	483	};

arch/arm/boot/dts/stih410-b2260.dts+1−1

@@ -74,7 +74,7 @@ · 73 unmodified lines
74	74	/* Low speed expansion connector */
75	75	spi0: spi@9844000 {
76	76	label = "LS-SPI0";
77		− cs-gpio = <&pio30 3 0>;
	77	+ cs-gpios = <&pio30 3 0>;
78	78	status = "okay";
79	79	};
80	80

arch/arm/boot/dts/sun8i-a23-a33.dtsi+4−0

@@ -282,11 +282,15 @@ · 281 unmodified lines
282	282	uart1_pins_a: uart1@0 {
283	283	allwinner,pins = "PG6", "PG7";
284	284	allwinner,function = "uart1";
	285	+ allwinner,drive = <SUN4I_PINCTRL_10_MA>;
	286	+ allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
285	287	};
286	288
287	289	uart1_pins_cts_rts_a: uart1-cts-rts@0 {
288	290	allwinner,pins = "PG8", "PG9";
289	291	allwinner,function = "uart1";
	292	+ allwinner,drive = <SUN4I_PINCTRL_10_MA>;
	293	+ allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
290	294	};
291	295
292	296	mmc0_pins_a: mmc0@0 {

arch/arm/kernel/traps.c+20−0

@@ -74,6 +74,26 @@ void dump_backtrace_entry(unsigned long where, unsigned long from, unsigned long · 73 unmodified lines
74	74	dump_mem("", "Exception stack", frame + 4, frame + 4 + sizeof(struct pt_regs));
75	75	}
76	76
	77	+void dump_backtrace_stm(u32 *stack, u32 instruction)
	78	+{
	79	+ char str[80], *p;
	80	+ unsigned int x;
	81	+ int reg;
	82	+
	83	+ for (reg = 10, x = 0, p = str; reg >= 0; reg--) {
	84	+ if (instruction & BIT(reg)) {
	85	+ p += sprintf(p, " r%d:%08x", reg, *stack--);
	86	+ if (++x == 6) {
	87	+ x = 0;
	88	+ p = str;
	89	+ printk("%s\n", str);
	90	+ }
	91	+ }
	92	+ }
	93	+ if (p != str)
	94	+ printk("%s\n", str);
	95	+}
	96	+
77	97	#ifndef CONFIG_ARM_UNWIND
78	98	/*
79	99	* Stack pointers should always be within the kernels view of

arch/arm/kernel/vmlinux-xip.lds.S+5−0

@@ -3,6 +3,9 @@ · 2 unmodified lines
3	3	* Written by Martin Mares <mj@atrey.karlin.mff.cuni.cz>
4	4	*/
5	5
	6	+/* No __ro_after_init data in the .rodata section - which will always be ro */
	7	+#define RO_AFTER_INIT_DATA
	8	+
6	9	#include <asm-generic/vmlinux.lds.h>
7	10	#include <asm/cache.h>
8	11	#include <asm/thread_info.h>
@@ -223,6 +226,8 @@ SECTIONS · 214 unmodified lines
223	226	. = ALIGN(PAGE_SIZE);
224	227	__init_end = .;
225	228
	229	+ *(.data..ro_after_init)
	230	+
226	231	NOSAVE_DATA
227	232	CACHELINE_ALIGNED_DATA(L1_CACHE_BYTES)
228	233	READ_MOSTLY_DATA(L1_CACHE_BYTES)

arch/arm/lib/backtrace.S+3−34

@@ -10,6 +10,7 @@ · 9 unmodified lines
10	10	* 27/03/03 Ian Molton Clean up CONFIG_CPU
11	11	*
12	12	*/
	13	+#include <linux/kern_levels.h>
13	14	#include <linux/linkage.h>
14	15	#include <asm/assembler.h>
15	16	.text
@@ -83,13 +84,13 @@ for_each_frame: tst frame, mask @ Check for address exceptions · 67 unmodified lines
83	84	teq r3, r1, lsr #11
84	85	ldreq r0, [frame, #-8] @ get sp
85	86	subeq r0, r0, #4 @ point at the last arg
86		− bleq .Ldumpstm @ dump saved registers
	87	+ bleq dump_backtrace_stm @ dump saved registers
87	88
88	89	1004: ldr r1, [sv_pc, #0] @ if stmfd sp!, {..., fp, ip, lr, pc}
89	90	ldr r3, .Ldsi @ instruction exists,
90	91	teq r3, r1, lsr #11
91	92	subeq r0, frame, #16
92		− bleq .Ldumpstm @ dump saved registers
	93	+ bleq dump_backtrace_stm @ dump saved registers
93	94
94	95	teq sv_fp, #0 @ zero saved fp means
95	96	beq no_frame @ no further frames
@@ -112,38 +113,6 @@ ENDPROC(c_backtrace) · 16 unmodified lines
112	113	.long 1004b, 1006b
113	114	.popsection
114	115
115		−#define instr r4
116		−#define reg r5
117		−#define stack r6
118		−
119		−.Ldumpstm: stmfd sp!, {instr, reg, stack, r7, lr}
120		− mov stack, r0
121		− mov instr, r1
122		− mov reg, #10
123		− mov r7, #0
124		−1: mov r3, #1
125		− ARM( tst instr, r3, lsl reg )
126		− THUMB( lsl r3, reg )
127		− THUMB( tst instr, r3 )
128		− beq 2f
129		− add r7, r7, #1
130		− teq r7, #6
131		− moveq r7, #0
132		− adr r3, .Lcr
133		− addne r3, r3, #1 @ skip newline
134		− ldr r2, [stack], #-4
135		− mov r1, reg
136		− adr r0, .Lfp
137		− bl printk
138		−2: subs reg, reg, #1
139		− bpl 1b
140		− teq r7, #0
141		− adrne r0, .Lcr
142		− blne printk
143		− ldmfd sp!, {instr, reg, stack, r7, pc}
144		−
145		−.Lfp: .asciz " r%d:%08x%s"
146		−.Lcr: .asciz "\n"
147	116	.Lbad: .asciz "Backtrace aborted due to bad frame pointer <%p>\n"
148	117	.align
149	118	.Ldsi: .word 0xe92dd800 >> 11 @ stmfd sp!, {... fp, ip, lr, pc}

arch/arm/mach-omap2/Kconfig+1−0

@@ -71,6 +71,7 @@ config SOC_AM43XX · 70 unmodified lines
71	71	select HAVE_ARM_TWD
72	72	select ARM_ERRATA_754322
73	73	select ARM_ERRATA_775420
	74	+ select OMAP_INTERCONNECT
74	75
75	76	config SOC_DRA7XX
76	77	bool "TI DRA7XX"

arch/arm/mach-omap2/id.c+11−5

@@ -205,11 +205,15 @@ void __init omap2xxx_check_revision(void) · 204 unmodified lines
205	205
206	206	#define OMAP3_SHOW_FEATURE(feat) \
207	207	if (omap3_has_ ##feat()) \
208		− printk(#feat" ");
	208	+ n += scnprintf(buf + n, sizeof(buf) - n, #feat " ");
209	209
210	210	static void __init omap3_cpuinfo(void)
211	211	{
212	212	const char *cpu_name;
	213	+ char buf[64];
	214	+ int n = 0;
	215	+
	216	+ memset(buf, 0, sizeof(buf));
213	217
214	218	/*
215	219	* OMAP3430 and OMAP3530 are assumed to be same.
@@ -241,10 +245,10 @@ static void __init omap3_cpuinfo(void) · 25 unmodified lines
241	245	cpu_name = "OMAP3503";
242	246	}
243	247
244		− sprintf(soc_name, "%s", cpu_name);
	248	+ scnprintf(soc_name, sizeof(soc_name), "%s", cpu_name);
245	249
246	250	/* Print verbose information */
247		− pr_info("%s %s (", soc_name, soc_rev);
	251	+ n += scnprintf(buf, sizeof(buf) - n, "%s %s (", soc_name, soc_rev);
248	252
249	253	OMAP3_SHOW_FEATURE(l2cache);
250	254	OMAP3_SHOW_FEATURE(iva);
@@ -252,8 +256,10 @@ static void __init omap3_cpuinfo(void) · 1 unmodified line
252	256	OMAP3_SHOW_FEATURE(neon);
253	257	OMAP3_SHOW_FEATURE(isp);
254	258	OMAP3_SHOW_FEATURE(192mhz_clk);
255		−
256		− printk(")\n");
	259	+ if (*(buf + n - 1) == ' ')
	260	+ n--;
	261	+ n += scnprintf(buf + n, sizeof(buf) - n, ")\n");
	262	+ pr_info("%s", buf);
257	263	}
258	264
259	265	#define OMAP3_CHECK_FEATURE(status,feat) \

arch/arm/mach-omap2/prm3xxx.c+3−0

@@ -319,6 +319,9 @@ void __init omap3_prm_init_pm(bool has_uart4, bool has_iva) · 318 unmodified lines
319	319	if (has_uart4) {
320	320	en_uart4_mask = OMAP3630_EN_UART4_MASK;
321	321	grpsel_uart4_mask = OMAP3630_GRPSEL_UART4_MASK;
	322	+ } else {
	323	+ en_uart4_mask = 0;
	324	+ grpsel_uart4_mask = 0;
322	325	}
323	326
324	327	/* Enable wakeups in PER */

arch/arm/mach-omap2/voltage.c+6−0

@@ -87,6 +87,12 @@ int voltdm_scale(struct voltagedomain *voltdm, · 86 unmodified lines
87	87	return -ENODATA;
88	88	}
89	89
	90	+ if (!voltdm->volt_data) {
	91	+ pr_err("%s: No voltage data defined for vdd_%s\n",
	92	+ __func__, voltdm->name);
	93	+ return -ENODATA;
	94	+ }
	95	+
90	96	/* Adjust voltage to the exact voltage from the OPP table */
91	97	for (i = 0; voltdm->volt_data[i].volt_nominal != 0; i++) {
92	98	if (voltdm->volt_data[i].volt_nominal >= target_volt) {

arch/arm/mm/dma-mapping.c+1−1

@@ -1167,7 +1167,7 @@ static int __init dma_debug_do_init(void) · 1166 unmodified lines
1167	1167	dma_debug_init(PREALLOC_DMA_DEBUG_ENTRIES);
1168	1168	return 0;
1169	1169	}
1170		−fs_initcall(dma_debug_do_init);
	1170	+core_initcall(dma_debug_do_init);
1171	1171
1172	1172	#ifdef CONFIG_ARM_DMA_USE_IOMMU
1173	1173

arch/arm/mm/proc-v7m.S+1−1

@@ -96,7 +96,7 @@ ENTRY(cpu_cm7_proc_fin) · 95 unmodified lines
96	96	ret lr
97	97	ENDPROC(cpu_cm7_proc_fin)
98	98
99		− .section ".text.init", #alloc, #execinstr
	99	+ .section ".init.text", #alloc, #execinstr
100	100
101	101	__v7m_cm7_setup:
102	102	mov r8, #(V7M_SCB_CCR_DC \| V7M_SCB_CCR_IC\| V7M_SCB_CCR_BP)

arch/arm64/boot/dts/marvell/armada-37xx.dtsi+2−2

@@ -105,7 +105,7 @@ · 104 unmodified lines
105	105	status = "disabled";
106	106	};
107	107
108		− nb_perih_clk: nb-periph-clk@13000{
	108	+ nb_periph_clk: nb-periph-clk@13000 {
109	109	compatible = "marvell,armada-3700-periph-clock-nb";
110	110	reg = <0x13000 0x100>;
111	111	clocks = <&tbg 0>, <&tbg 1>, <&tbg 2>,
@@ -113,7 +113,7 @@ · 1 unmodified line
113	113	#clock-cells = <1>;
114	114	};
115	115
116		− sb_perih_clk: sb-periph-clk@18000{
	116	+ sb_periph_clk: sb-periph-clk@18000 {
117	117	compatible = "marvell,armada-3700-periph-clock-sb";
118	118	reg = <0x18000 0x100>;
119	119	clocks = <&tbg 0>, <&tbg 1>, <&tbg 2>,

arch/arm64/boot/dts/marvell/armada-cp110-slave.dtsi+3−3

@@ -130,8 +130,8 @@ · 129 unmodified lines
130	130	reg = <0x700600 0x50>;
131	131	#address-cells = <0x1>;
132	132	#size-cells = <0x0>;
133		− cell-index = <1>;
134		− clocks = <&cps_syscon0 0 3>;
	133	+ cell-index = <3>;
	134	+ clocks = <&cps_syscon0 1 21>;
135	135	status = "disabled";
136	136	};
137	137
@@ -140,7 +140,7 @@ · 2 unmodified lines
140	140	reg = <0x700680 0x50>;
141	141	#address-cells = <1>;
142	142	#size-cells = <0>;
143		− cell-index = <2>;
	143	+ cell-index = <4>;
144	144	clocks = <&cps_syscon0 1 21>;
145	145	status = "disabled";
146	146	};

arch/arm64/include/asm/perf_event.h+9−1

@@ -46,7 +46,15 @@ · 45 unmodified lines
46	46	#define ARMV8_PMU_EVTYPE_MASK 0xc800ffff /* Mask for writable bits */
47	47	#define ARMV8_PMU_EVTYPE_EVENT 0xffff /* Mask for EVENT bits */
48	48
49		−#define ARMV8_PMU_EVTYPE_EVENT_SW_INCR 0 /* Software increment event */
	49	+/*
	50	+ * PMUv3 event types: required events
	51	+ */
	52	+#define ARMV8_PMUV3_PERFCTR_SW_INCR 0x00
	53	+#define ARMV8_PMUV3_PERFCTR_L1D_CACHE_REFILL 0x03
	54	+#define ARMV8_PMUV3_PERFCTR_L1D_CACHE 0x04
	55	+#define ARMV8_PMUV3_PERFCTR_BR_MIS_PRED 0x10
	56	+#define ARMV8_PMUV3_PERFCTR_CPU_CYCLES 0x11
	57	+#define ARMV8_PMUV3_PERFCTR_BR_PRED 0x12
50	58
51	59	/*
52	60	* Event filters for PMUv3

arch/arm64/kernel/perf_event.c+1−9

@@ -31,17 +31,9 @@ · 30 unmodified lines
31	31
32	32	/*
33	33	* ARMv8 PMUv3 Performance Events handling code.
34		− * Common event types.
	34	+ * Common event types (some are defined in asm/perf_event.h).
35	35	*/
36	36
37		−/* Required events. */
38		−#define ARMV8_PMUV3_PERFCTR_SW_INCR 0x00
39		−#define ARMV8_PMUV3_PERFCTR_L1D_CACHE_REFILL 0x03
40		−#define ARMV8_PMUV3_PERFCTR_L1D_CACHE 0x04
41		−#define ARMV8_PMUV3_PERFCTR_BR_MIS_PRED 0x10
42		−#define ARMV8_PMUV3_PERFCTR_CPU_CYCLES 0x11
43		−#define ARMV8_PMUV3_PERFCTR_BR_PRED 0x12
44		−
45	37	/* At least one of the following is required. */
46	38	#define ARMV8_PMUV3_PERFCTR_INST_RETIRED 0x08
47	39	#define ARMV8_PMUV3_PERFCTR_INST_SPEC 0x1B

arch/arm64/kvm/sys_regs.c+8−2

@@ -597,8 +597,14 @@ static bool access_pmu_evcntr(struct kvm_vcpu *vcpu, · 596 unmodified lines
597	597
598	598	idx = ARMV8_PMU_CYCLE_IDX;
599	599	} else {
600		− BUG();
	600	+ return false;
601	601	}
	602	+ } else if (r->CRn == 0 && r->CRm == 9) {
	603	+ /* PMCCNTR */
	604	+ if (pmu_access_event_counter_el0_disabled(vcpu))
	605	+ return false;
	606	+
	607	+ idx = ARMV8_PMU_CYCLE_IDX;
602	608	} else if (r->CRn == 14 && (r->CRm & 12) == 8) {
603	609	/* PMEVCNTRn_EL0 */
604	610	if (pmu_access_event_counter_el0_disabled(vcpu))
@@ -606,7 +612,7 @@ static bool access_pmu_evcntr(struct kvm_vcpu *vcpu, · 1 unmodified line
606	612
607	613	idx = ((r->CRm & 3) << 3) \| (r->Op2 & 7);
608	614	} else {
609		− BUG();
	615	+ return false;
610	616	}
611	617
612	618	if (!pmu_counter_idx_valid(vcpu, idx))

arch/powerpc/include/asm/exception-64s.h+12−3

@@ -91,7 +91,7 @@ · 90 unmodified lines
91	91	*/
92	92	#define LOAD_HANDLER(reg, label) \
93	93	ld reg,PACAKBASE(r13); /* get high part of &label */ \
94		− ori reg,reg,(FIXED_SYMBOL_ABS_ADDR(label))@l;
	94	+ ori reg,reg,FIXED_SYMBOL_ABS_ADDR(label);
95	95
96	96	#define __LOAD_HANDLER(reg, label) \
97	97	ld reg,PACAKBASE(r13); \
@@ -158,14 +158,17 @@ BEGIN_FTR_SECTION_NESTED(943) \ · 60 unmodified lines
158	158	std ra,offset(r13); \
159	159	END_FTR_SECTION_NESTED(ftr,ftr,943)
160	160
161		−#define EXCEPTION_PROLOG_0(area) \
162		− GET_PACA(r13); \
	161	+#define EXCEPTION_PROLOG_0_PACA(area) \
163	162	std r9,area+EX_R9(r13); /* save r9 */ \
164	163	OPT_GET_SPR(r9, SPRN_PPR, CPU_FTR_HAS_PPR); \
165	164	HMT_MEDIUM; \
166	165	std r10,area+EX_R10(r13); /* save r10 - r12 */ \
167	166	OPT_GET_SPR(r10, SPRN_CFAR, CPU_FTR_CFAR)
168	167
	168	+#define EXCEPTION_PROLOG_0(area) \
	169	+ GET_PACA(r13); \
	170	+ EXCEPTION_PROLOG_0_PACA(area)
	171	+
169	172	#define __EXCEPTION_PROLOG_1(area, extra, vec) \
170	173	OPT_SAVE_REG_TO_PACA(area+EX_PPR, r9, CPU_FTR_HAS_PPR); \
171	174	OPT_SAVE_REG_TO_PACA(area+EX_CFAR, r10, CPU_FTR_CFAR); \
@@ -196,6 +199,12 @@ END_FTR_SECTION_NESTED(ftr,ftr,943) · 24 unmodified lines
196	199	EXCEPTION_PROLOG_1(area, extra, vec); \
197	200	EXCEPTION_PROLOG_PSERIES_1(label, h);
198	201
	202	+/* Have the PACA in r13 already */
	203	+#define EXCEPTION_PROLOG_PSERIES_PACA(area, label, h, extra, vec) \
	204	+ EXCEPTION_PROLOG_0_PACA(area); \
	205	+ EXCEPTION_PROLOG_1(area, extra, vec); \
	206	+ EXCEPTION_PROLOG_PSERIES_1(label, h);
	207	+
199	208	#define __KVMTEST(h, n) \
200	209	lbz r10,HSTATE_IN_GUEST(r13); \
201	210	cmpwi r10,0; \

arch/powerpc/include/asm/ppc-opcode.h+1−0

@@ -460,5 +460,6 @@ · 459 unmodified lines
460	460
461	461	#define PPC_SLBIA(IH) stringify_in_c(.long PPC_INST_SLBIA \| \
462	462	((IH & 0x7) << 21))
	463	+#define PPC_INVALIDATE_ERAT PPC_SLBIA(7)
463	464
464	465	#endif /* _ASM_POWERPC_PPC_OPCODE_H */

arch/powerpc/kernel/exceptions-64s.S+8−3

@@ -116,7 +116,9 @@ EXC_VIRT_NONE(0x4000, 0x4100) · 115 unmodified lines
116	116
117	117	EXC_REAL_BEGIN(system_reset, 0x100, 0x200)
118	118	SET_SCRATCH0(r13)
119		− EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, system_reset_common, EXC_STD,
	119	+ GET_PACA(r13)
	120	+ clrrdi r13,r13,1 /* Last bit of HSPRG0 is set if waking from winkle */
	121	+ EXCEPTION_PROLOG_PSERIES_PACA(PACA_EXGEN, system_reset_common, EXC_STD,
120	122	IDLETEST, 0x100)
121	123
122	124	EXC_REAL_END(system_reset, 0x100, 0x200)
@@ -124,6 +126,9 @@ EXC_VIRT_NONE(0x4100, 0x4200) · 1 unmodified line
124	126
125	127	#ifdef CONFIG_PPC_P7_NAP
126	128	EXC_COMMON_BEGIN(system_reset_idle_common)
	129	+BEGIN_FTR_SECTION
	130	+ GET_PACA(r13) /* Restore HSPRG0 to get the winkle bit in r13 */
	131	+END_FTR_SECTION_IFCLR(CPU_FTR_ARCH_300)
127	132	bl pnv_restore_hyp_resource
128	133
129	134	li r0,PNV_THREAD_RUNNING
@@ -169,7 +174,7 @@ EXC_REAL_BEGIN(machine_check, 0x200, 0x300) · 39 unmodified lines
169	174	SET_SCRATCH0(r13) /* save r13 */
170	175	/*
171	176	* Running native on arch 2.06 or later, we may wakeup from winkle
172		− * inside machine check. If yes, then last bit of HSPGR0 would be set
	177	+ * inside machine check. If yes, then last bit of HSPRG0 would be set
173	178	* to 1. Hence clear it unconditionally.
174	179	*/
175	180	GET_PACA(r13)
@@ -388,7 +393,7 @@ EXC_COMMON_BEGIN(machine_check_handle_early) · 212 unmodified lines
388	393	/*
389	394	* Go back to winkle. Please note that this thread was woken up in
390	395	* machine check from winkle and have not restored the per-subcore
391		− * state. Hence before going back to winkle, set last bit of HSPGR0
	396	+ * state. Hence before going back to winkle, set last bit of HSPRG0
392	397	* to 1. This will make sure that if this thread gets woken up
393	398	* again at reset vector 0x100 then it will get chance to restore
394	399	* the subcore state.

arch/powerpc/kernel/process.c+21−21

@@ -1215,7 +1215,7 @@ static void show_instructions(struct pt_regs *regs) · 1214 unmodified lines
1215	1215	int instr;
1216	1216
1217	1217	if (!(i % 8))
1218		− printk("\n");
	1218	+ pr_cont("\n");
1219	1219
1220	1220	#if !defined(CONFIG_BOOKE)
1221	1221	/* If executing with the IMMU off, adjust pc rather
@@ -1227,18 +1227,18 @@ static void show_instructions(struct pt_regs *regs) · 5 unmodified lines
1227	1227
1228	1228	if (!__kernel_text_address(pc) \|\|
1229	1229	probe_kernel_address((unsigned int __user *)pc, instr)) {
1230		− printk(KERN_CONT "XXXXXXXX ");
	1230	+ pr_cont("XXXXXXXX ");
1231	1231	} else {
1232	1232	if (regs->nip == pc)
1233		− printk(KERN_CONT "<%08x> ", instr);
	1233	+ pr_cont("<%08x> ", instr);
1234	1234	else
1235		− printk(KERN_CONT "%08x ", instr);
	1235	+ pr_cont("%08x ", instr);
1236	1236	}
1237	1237
1238	1238	pc += sizeof(int);
1239	1239	}
1240	1240
1241		− printk("\n");
	1241	+ pr_cont("\n");
1242	1242	}
1243	1243
1244	1244	struct regbit {
@@ -1282,7 +1282,7 @@ static void print_bits(unsigned long val, struct regbit bits, const char sep) · 37 unmodified lines
1282	1282
1283	1283	for (; bits->bit; ++bits)
1284	1284	if (val & bits->bit) {
1285		− printk("%s%s", s, bits->name);
	1285	+ pr_cont("%s%s", s, bits->name);
1286	1286	s = sep;
1287	1287	}
1288	1288	}
@@ -1305,9 +1305,9 @@ static void print_tm_bits(unsigned long val) · 16 unmodified lines
1305	1305	* T: Transactional (bit 34)
1306	1306	*/
1307	1307	if (val & (MSR_TM \| MSR_TS_S \| MSR_TS_T)) {
1308		− printk(",TM[");
	1308	+ pr_cont(",TM[");
1309	1309	print_bits(val, msr_tm_bits, "");
1310		− printk("]");
	1310	+ pr_cont("]");
1311	1311	}
1312	1312	}
1313	1313	#else
@@ -1316,10 +1316,10 @@ static void print_tm_bits(unsigned long val) {} · 2 unmodified lines
1316	1316
1317	1317	static void print_msr_bits(unsigned long val)
1318	1318	{
1319		− printk("<");
	1319	+ pr_cont("<");
1320	1320	print_bits(val, msr_bits, ",");
1321	1321	print_tm_bits(val);
1322		− printk(">");
	1322	+ pr_cont(">");
1323	1323	}
1324	1324
1325	1325	#ifdef CONFIG_PPC64
@@ -1347,29 +1347,29 @@ void show_regs(struct pt_regs * regs) · 21 unmodified lines
1347	1347	printk(" CR: %08lx XER: %08lx\n", regs->ccr, regs->xer);
1348	1348	trap = TRAP(regs);
1349	1349	if ((regs->trap != 0xc00) && cpu_has_feature(CPU_FTR_CFAR))
1350		− printk("CFAR: "REG" ", regs->orig_gpr3);
	1350	+ pr_cont("CFAR: "REG" ", regs->orig_gpr3);
1351	1351	if (trap == 0x200 \|\| trap == 0x300 \|\| trap == 0x600)
1352	1352	#if defined(CONFIG_4xx) \|\| defined(CONFIG_BOOKE)
1353		− printk("DEAR: "REG" ESR: "REG" ", regs->dar, regs->dsisr);
	1353	+ pr_cont("DEAR: "REG" ESR: "REG" ", regs->dar, regs->dsisr);
1354	1354	#else
1355		− printk("DAR: "REG" DSISR: %08lx ", regs->dar, regs->dsisr);
	1355	+ pr_cont("DAR: "REG" DSISR: %08lx ", regs->dar, regs->dsisr);
1356	1356	#endif
1357	1357	#ifdef CONFIG_PPC64
1358		− printk("SOFTE: %ld ", regs->softe);
	1358	+ pr_cont("SOFTE: %ld ", regs->softe);
1359	1359	#endif
1360	1360	#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
1361	1361	if (MSR_TM_ACTIVE(regs->msr))
1362		− printk("\nPACATMSCRATCH: %016llx ", get_paca()->tm_scratch);
	1362	+ pr_cont("\nPACATMSCRATCH: %016llx ", get_paca()->tm_scratch);
1363	1363	#endif
1364	1364
1365	1365	for (i = 0; i < 32; i++) {
1366	1366	if ((i % REGS_PER_LINE) == 0)
1367		− printk("\nGPR%02d: ", i);
1368		− printk(REG " ", regs->gpr[i]);
	1367	+ pr_cont("\nGPR%02d: ", i);
	1368	+ pr_cont(REG " ", regs->gpr[i]);
1369	1369	if (i == LAST_VOLATILE && !FULL_REGS(regs))
1370	1370	break;
1371	1371	}
1372		− printk("\n");
	1372	+ pr_cont("\n");
1373	1373	#ifdef CONFIG_KALLSYMS
1374	1374	/*
1375	1375	* Lookup NIP late so we have the best change of getting the
@@ -1900,14 +1900,14 @@ void show_stack(struct task_struct tsk, unsigned long stack) · 524 unmodified lines
1900	1900	printk("["REG"] ["REG"] %pS", sp, ip, (void *)ip);
1901	1901	#ifdef CONFIG_FUNCTION_GRAPH_TRACER
1902	1902	if ((ip == rth) && curr_frame >= 0) {
1903		− printk(" (%pS)",
	1903	+ pr_cont(" (%pS)",
1904	1904	(void *)current->ret_stack[curr_frame].ret);
1905	1905	curr_frame--;
1906	1906	}
1907	1907	#endif
1908	1908	if (firstframe)
1909		− printk(" (unreliable)");
1910		− printk("\n");
	1909	+ pr_cont(" (unreliable)");
	1910	+ pr_cont("\n");
1911	1911	}
1912	1912	firstframe = 0;
1913	1913

arch/powerpc/kernel/setup_64.c+14−6

@@ -226,17 +226,25 @@ static void __init configure_exceptions(void) · 225 unmodified lines
226	226	if (firmware_has_feature(FW_FEATURE_OPAL))
227	227	opal_configure_cores();
228	228
229		− /* Enable AIL if supported, and we are in hypervisor mode */
230		− if (early_cpu_has_feature(CPU_FTR_HVMODE) &&
231		− early_cpu_has_feature(CPU_FTR_ARCH_207S)) {
232		− unsigned long lpcr = mfspr(SPRN_LPCR);
233		− mtspr(SPRN_LPCR, lpcr \| LPCR_AIL_3);
234		− }
	229	+ /* AIL on native is done in cpu_ready_for_interrupts() */
235	230	}
236	231	}
237	232
238	233	static void cpu_ready_for_interrupts(void)
239	234	{
	235	+ /*
	236	+ * Enable AIL if supported, and we are in hypervisor mode. This
	237	+ * is called once for every processor.
	238	+ *
	239	+ * If we are not in hypervisor mode the job is done once for
	240	+ * the whole partition in configure_exceptions().
	241	+ */
	242	+ if (early_cpu_has_feature(CPU_FTR_HVMODE) &&
	243	+ early_cpu_has_feature(CPU_FTR_ARCH_207S)) {
	244	+ unsigned long lpcr = mfspr(SPRN_LPCR);
	245	+ mtspr(SPRN_LPCR, lpcr \| LPCR_AIL_3);
	246	+ }
	247	+
240	248	/* Set IR and DR in PACA MSR */
241	249	get_paca()->kernel_msr = MSR_KERNEL;
242	250	}

arch/powerpc/mm/hash_utils_64.c+4−0

@@ -1029,6 +1029,10 @@ void hash__early_init_mmu_secondary(void) · 1028 unmodified lines
1029	1029	{
1030	1030	/* Initialize hash table for that CPU */
1031	1031	if (!firmware_has_feature(FW_FEATURE_LPAR)) {
	1032	+
	1033	+ if (cpu_has_feature(CPU_FTR_POWER9_DD1))
	1034	+ update_hid_for_hash();
	1035	+
1032	1036	if (!cpu_has_feature(CPU_FTR_ARCH_300))
1033	1037	mtspr(SPRN_SDR1, _SDR1);
1034	1038	else

arch/powerpc/mm/pgtable-radix.c+4−0

@@ -388,6 +388,10 @@ void radix__early_init_mmu_secondary(void) · 387 unmodified lines
388	388	* update partition table control register and UPRT
389	389	*/
390	390	if (!firmware_has_feature(FW_FEATURE_LPAR)) {
	391	+
	392	+ if (cpu_has_feature(CPU_FTR_POWER9_DD1))
	393	+ update_hid_for_radix();
	394	+
391	395	lpcr = mfspr(SPRN_LPCR);
392	396	mtspr(SPRN_LPCR, lpcr \| LPCR_UPRT \| LPCR_HR);
393	397

arch/powerpc/mm/tlb-radix.c+4−0

@@ -50,6 +50,8 @@ static inline void _tlbiel_pid(unsigned long pid, unsigned long ric) · 49 unmodified lines
50	50	for (set = 0; set < POWER9_TLB_SETS_RADIX ; set++) {
51	51	__tlbiel_pid(pid, set, ric);
52	52	}
	53	+ if (cpu_has_feature(CPU_FTR_POWER9_DD1))
	54	+ asm volatile(PPC_INVALIDATE_ERAT : : :"memory");
53	55	return;
54	56	}
55	57
@@ -83,6 +85,8 @@ static inline void _tlbiel_va(unsigned long va, unsigned long pid, · 27 unmodified lines
83	85	asm volatile(PPC_TLBIEL(%0, %4, %3, %2, %1)
84	86	: : "r"(rb), "i"(r), "i"(prs), "i"(ric), "r"(rs) : "memory");
85	87	asm volatile("ptesync": : :"memory");
	88	+ if (cpu_has_feature(CPU_FTR_POWER9_DD1))
	89	+ asm volatile(PPC_INVALIDATE_ERAT : : :"memory");
86	90	}
87	91
88	92	static inline void _tlbie_va(unsigned long va, unsigned long pid,

arch/sparc/Kconfig+23−0

@@ -43,6 +43,7 @@ config SPARC · 42 unmodified lines
43	43	select ARCH_HAS_SG_CHAIN
44	44	select CPU_NO_EFFICIENT_FFS
45	45	select HAVE_ARCH_HARDENED_USERCOPY
	46	+ select PROVE_LOCKING_SMALL if PROVE_LOCKING
46	47
47	48	config SPARC32
48	49	def_bool !64BIT
@@ -89,6 +90,14 @@ config ARCH_DEFCONFIG · 40 unmodified lines
89	90	config ARCH_PROC_KCORE_TEXT
90	91	def_bool y
91	92
	93	+config ARCH_ATU
	94	+ bool
	95	+ default y if SPARC64
	96	+
	97	+config ARCH_DMA_ADDR_T_64BIT
	98	+ bool
	99	+ default y if ARCH_ATU
	100	+
92	101	config IOMMU_HELPER
93	102	bool
94	103	default y if SPARC64
@@ -304,6 +313,20 @@ config ARCH_SPARSEMEM_ENABLE · 209 unmodified lines
304	313	config ARCH_SPARSEMEM_DEFAULT
305	314	def_bool y if SPARC64
306	315
	316	+config FORCE_MAX_ZONEORDER
	317	+ int "Maximum zone order"
	318	+ default "13"
	319	+ help
	320	+ The kernel memory allocator divides physically contiguous memory
	321	+ blocks into "zones", where each zone is a power of two number of
	322	+ pages. This option selects the largest power of two that the kernel
	323	+ keeps in the memory allocator. If you need to allocate very large
	324	+ blocks of physically contiguous memory, then you may need to
	325	+ increase this value.
	326	+
	327	+ This config option is actually maximum order plus one. For example,
	328	+ a value of 13 means that the largest free memory block is 2^12 pages.
	329	+
307	330	source "mm/Kconfig"
308	331
309	332	if SPARC64

arch/sparc/include/asm/hypervisor.h+343−0

@@ -2335,6 +2335,348 @@ unsigned long sun4v_vintr_set_target(unsigned long dev_handle, · 2334 unmodified lines
2335	2335	*/
2336	2336	#define HV_FAST_PCI_MSG_SETVALID 0xd3
2337	2337
	2338	+/* PCI IOMMU v2 definitions and services
	2339	+ *
	2340	+ * While the PCI IO definitions above is valid IOMMU v2 adds new PCI IO
	2341	+ * definitions and services.
	2342	+ *
	2343	+ * CTE Clump Table Entry. First level table entry in the ATU.
	2344	+ *
	2345	+ * pci_device_list
	2346	+ * A 32-bit aligned list of pci_devices.
	2347	+ *
	2348	+ * pci_device_listp
	2349	+ * real address of a pci_device_list. 32-bit aligned.
	2350	+ *
	2351	+ * iotte IOMMU translation table entry.
	2352	+ *
	2353	+ * iotte_attributes
	2354	+ * IO Attributes for IOMMU v2 mappings. In addition to
	2355	+ * read, write IOMMU v2 supports relax ordering
	2356	+ *
	2357	+ * io_page_list A 64-bit aligned list of real addresses. Each real
	2358	+ * address in an io_page_list must be properly aligned
	2359	+ * to the pagesize of the given IOTSB.
	2360	+ *
	2361	+ * io_page_list_p Real address of an io_page_list, 64-bit aligned.
	2362	+ *
	2363	+ * IOTSB IO Translation Storage Buffer. An aligned table of
	2364	+ * IOTTEs. Each IOTSB has a pagesize, table size, and
	2365	+ * virtual address associated with it that must match
	2366	+ * a pagesize and table size supported by the un-derlying
	2367	+ * hardware implementation. The alignment requirements
	2368	+ * for an IOTSB depend on the pagesize used for that IOTSB.
	2369	+ * Each IOTTE in an IOTSB maps one pagesize-sized page.
	2370	+ * The size of the IOTSB dictates how large of a virtual
	2371	+ * address space the IOTSB is capable of mapping.
	2372	+ *
	2373	+ * iotsb_handle An opaque identifier for an IOTSB. A devhandle plus
	2374	+ * iotsb_handle represents a binding of an IOTSB to a
	2375	+ * PCI root complex.
	2376	+ *
	2377	+ * iotsb_index Zero-based IOTTE number within an IOTSB.
	2378	+ */
	2379	+
	2380	+/* The index_count argument consists of two fields:
	2381	+ * bits 63:48 #iottes and bits 47:0 iotsb_index
	2382	+ */
	2383	+#define HV_PCI_IOTSB_INDEX_COUNT(__iottes, __iotsb_index) \
	2384	+ (((u64)(__iottes) << 48UL) \| ((u64)(__iotsb_index)))
	2385	+
	2386	+/* pci_iotsb_conf()
	2387	+ * TRAP: HV_FAST_TRAP
	2388	+ * FUNCTION: HV_FAST_PCI_IOTSB_CONF
	2389	+ * ARG0: devhandle
	2390	+ * ARG1: r_addr
	2391	+ * ARG2: size
	2392	+ * ARG3: pagesize
	2393	+ * ARG4: iova
	2394	+ * RET0: status
	2395	+ * RET1: iotsb_handle
	2396	+ * ERRORS: EINVAL Invalid devhandle, size, iova, or pagesize
	2397	+ * EBADALIGN r_addr is not properly aligned
	2398	+ * ENORADDR r_addr is not a valid real address
	2399	+ * ETOOMANY No further IOTSBs may be configured
	2400	+ * EBUSY Duplicate devhandle, raddir, iova combination
	2401	+ *
	2402	+ * Create an IOTSB suitable for the PCI root complex identified by devhandle,
	2403	+ * for the DMA virtual address defined by the argument iova.
	2404	+ *
	2405	+ * r_addr is the properly aligned base address of the IOTSB and size is the
	2406	+ * IOTSB (table) size in bytes.The IOTSB is required to be zeroed prior to
	2407	+ * being configured. If it contains any values other than zeros then the
	2408	+ * behavior is undefined.
	2409	+ *
	2410	+ * pagesize is the size of each page in the IOTSB. Note that the combination of
	2411	+ * size (table size) and pagesize must be valid.
	2412	+ *
	2413	+ * virt is the DMA virtual address this IOTSB will map.
	2414	+ *
	2415	+ * If successful, the opaque 64-bit handle iotsb_handle is returned in ret1.
	2416	+ * Once configured, privileged access to the IOTSB memory is prohibited and
	2417	+ * creates undefined behavior. The only permitted access is indirect via these
	2418	+ * services.
	2419	+ */
	2420	+#define HV_FAST_PCI_IOTSB_CONF 0x190
	2421	+
	2422	+/* pci_iotsb_info()
	2423	+ * TRAP: HV_FAST_TRAP
	2424	+ * FUNCTION: HV_FAST_PCI_IOTSB_INFO
	2425	+ * ARG0: devhandle
	2426	+ * ARG1: iotsb_handle
	2427	+ * RET0: status
	2428	+ * RET1: r_addr
	2429	+ * RET2: size
	2430	+ * RET3: pagesize
	2431	+ * RET4: iova
	2432	+ * RET5: #bound
	2433	+ * ERRORS: EINVAL Invalid devhandle or iotsb_handle
	2434	+ *
	2435	+ * This service returns configuration information about an IOTSB previously
	2436	+ * created with pci_iotsb_conf.
	2437	+ *
	2438	+ * iotsb_handle value 0 may be used with this service to inquire about the
	2439	+ * legacy IOTSB that may or may not exist. If the service succeeds, the return
	2440	+ * values describe the legacy IOTSB and I/O virtual addresses mapped by that
	2441	+ * table. However, the table base address r_addr may contain the value -1 which
	2442	+ * indicates a memory range that cannot be accessed or be reclaimed.
	2443	+ *
	2444	+ * The return value #bound contains the number of PCI devices that iotsb_handle
	2445	+ * is currently bound to.
	2446	+ */
	2447	+#define HV_FAST_PCI_IOTSB_INFO 0x191
	2448	+
	2449	+/* pci_iotsb_unconf()
	2450	+ * TRAP: HV_FAST_TRAP
	2451	+ * FUNCTION: HV_FAST_PCI_IOTSB_UNCONF
	2452	+ * ARG0: devhandle
	2453	+ * ARG1: iotsb_handle
	2454	+ * RET0: status
	2455	+ * ERRORS: EINVAL Invalid devhandle or iotsb_handle
	2456	+ * EBUSY The IOTSB is bound and may not be unconfigured
	2457	+ *
	2458	+ * This service unconfigures the IOTSB identified by the devhandle and
	2459	+ * iotsb_handle arguments, previously created with pci_iotsb_conf.
	2460	+ * The IOTSB must not be currently bound to any device or the service will fail
	2461	+ *
	2462	+ * If the call succeeds, iotsb_handle is no longer valid.
	2463	+ */
	2464	+#define HV_FAST_PCI_IOTSB_UNCONF 0x192
	2465	+
	2466	+/* pci_iotsb_bind()
	2467	+ * TRAP: HV_FAST_TRAP
	2468	+ * FUNCTION: HV_FAST_PCI_IOTSB_BIND
	2469	+ * ARG0: devhandle
	2470	+ * ARG1: iotsb_handle
	2471	+ * ARG2: pci_device
	2472	+ * RET0: status
	2473	+ * ERRORS: EINVAL Invalid devhandle, iotsb_handle, or pci_device
	2474	+ * EBUSY A PCI function is already bound to an IOTSB at the same
	2475	+ * address range as specified by devhandle, iotsb_handle.
	2476	+ *
	2477	+ * This service binds the PCI function specified by the argument pci_device to
	2478	+ * the IOTSB specified by the arguments devhandle and iotsb_handle.
	2479	+ *
	2480	+ * The PCI device function is bound to the specified IOTSB with the IOVA range
	2481	+ * specified when the IOTSB was configured via pci_iotsb_conf. If the function
	2482	+ * is already bound then it is unbound first.
	2483	+ */
	2484	+#define HV_FAST_PCI_IOTSB_BIND 0x193
	2485	+
	2486	+/* pci_iotsb_unbind()
	2487	+ * TRAP: HV_FAST_TRAP
	2488	+ * FUNCTION: HV_FAST_PCI_IOTSB_UNBIND
	2489	+ * ARG0: devhandle
	2490	+ * ARG1: iotsb_handle
	2491	+ * ARG2: pci_device
	2492	+ * RET0: status
	2493	+ * ERRORS: EINVAL Invalid devhandle, iotsb_handle, or pci_device
	2494	+ * ENOMAP The PCI function was not bound to the specified IOTSB
	2495	+ *
	2496	+ * This service unbinds the PCI device specified by the argument pci_device
	2497	+ * from the IOTSB identified * by the arguments devhandle and iotsb_handle.
	2498	+ *
	2499	+ * If the PCI device is not bound to the specified IOTSB then this service will
	2500	+ * fail with status ENOMAP
	2501	+ */
	2502	+#define HV_FAST_PCI_IOTSB_UNBIND 0x194
	2503	+
	2504	+/* pci_iotsb_get_binding()
	2505	+ * TRAP: HV_FAST_TRAP
	2506	+ * FUNCTION: HV_FAST_PCI_IOTSB_GET_BINDING
	2507	+ * ARG0: devhandle
	2508	+ * ARG1: iotsb_handle
	2509	+ * ARG2: iova
	2510	+ * RET0: status
	2511	+ * RET1: iotsb_handle
	2512	+ * ERRORS: EINVAL Invalid devhandle, pci_device, or iova
	2513	+ * ENOMAP The PCI function is not bound to an IOTSB at iova
	2514	+ *
	2515	+ * This service returns the IOTSB binding, iotsb_handle, for a given pci_device
	2516	+ * and DMA virtual address, iova.
	2517	+ *
	2518	+ * iova must be the base address of a DMA virtual address range as defined by
	2519	+ * the iommu-address-ranges property in the root complex device node defined
	2520	+ * by the argument devhandle.
	2521	+ */
	2522	+#define HV_FAST_PCI_IOTSB_GET_BINDING 0x195
	2523	+
	2524	+/* pci_iotsb_map()
	2525	+ * TRAP: HV_FAST_TRAP
	2526	+ * FUNCTION: HV_FAST_PCI_IOTSB_MAP
	2527	+ * ARG0: devhandle
	2528	+ * ARG1: iotsb_handle
	2529	+ * ARG2: index_count
	2530	+ * ARG3: iotte_attributes
	2531	+ * ARG4: io_page_list_p
	2532	+ * RET0: status
	2533	+ * RET1: #mapped
	2534	+ * ERRORS: EINVAL Invalid devhandle, iotsb_handle, #iottes,
	2535	+ * iotsb_index or iotte_attributes
	2536	+ * EBADALIGN Improperly aligned io_page_list_p or I/O page
	2537	+ * address in the I/O page list.
	2538	+ * ENORADDR Invalid io_page_list_p or I/O page address in
	2539	+ * the I/O page list.
	2540	+ *
	2541	+ * This service creates and flushes mappings in the IOTSB defined by the
	2542	+ * arguments devhandle, iotsb.
	2543	+ *
	2544	+ * The index_count argument consists of two fields. Bits 63:48 contain #iotte
	2545	+ * and bits 47:0 contain iotsb_index
	2546	+ *
	2547	+ * The first mapping is created in the IOTSB index specified by iotsb_index.
	2548	+ * Subsequent mappings are created at iotsb_index+1 and so on.
	2549	+ *
	2550	+ * The attributes of each mapping are defined by the argument iotte_attributes.
	2551	+ *
	2552	+ * The io_page_list_p specifies the real address of the 64-bit-aligned list of
	2553	+ * #iottes I/O page addresses. Each page address must be a properly aligned
	2554	+ * real address of a page to be mapped in the IOTSB. The first entry in the I/O
	2555	+ * page list contains the real address of the first page, the 2nd entry for the
	2556	+ * 2nd page, and so on.
	2557	+ *
	2558	+ * #iottes must be greater than zero.
	2559	+ *
	2560	+ * The return value #mapped is the actual number of mappings created, which may
	2561	+ * be less than or equal to the argument #iottes. If the function returns
	2562	+ * successfully with a #mapped value less than the requested #iottes then the
	2563	+ * caller should continue to invoke the service with updated iotsb_index,
	2564	+ * #iottes, and io_page_list_p arguments until all pages are mapped.
	2565	+ *
	2566	+ * This service must not be used to demap a mapping. In other words, all
	2567	+ * mappings must be valid and have one or both of the RW attribute bits set.
	2568	+ *
	2569	+ * Note:
	2570	+ * It is implementation-defined whether I/O page real address validity checking
	2571	+ * is done at time mappings are established or deferred until they are
	2572	+ * accessed.
	2573	+ */
	2574	+#define HV_FAST_PCI_IOTSB_MAP 0x196
	2575	+
	2576	+/* pci_iotsb_map_one()
	2577	+ * TRAP: HV_FAST_TRAP
	2578	+ * FUNCTION: HV_FAST_PCI_IOTSB_MAP_ONE
	2579	+ * ARG0: devhandle
	2580	+ * ARG1: iotsb_handle
	2581	+ * ARG2: iotsb_index
	2582	+ * ARG3: iotte_attributes
	2583	+ * ARG4: r_addr
	2584	+ * RET0: status
	2585	+ * ERRORS: EINVAL Invalid devhandle,iotsb_handle, iotsb_index
	2586	+ * or iotte_attributes
	2587	+ * EBADALIGN Improperly aligned r_addr
	2588	+ * ENORADDR Invalid r_addr
	2589	+ *
	2590	+ * This service creates and flushes a single mapping in the IOTSB defined by the
	2591	+ * arguments devhandle, iotsb.
	2592	+ *
	2593	+ * The mapping for the page at r_addr is created at the IOTSB index specified by
	2594	+ * iotsb_index with the attributes iotte_attributes.
	2595	+ *
	2596	+ * This service must not be used to demap a mapping. In other words, the mapping
	2597	+ * must be valid and have one or both of the RW attribute bits set.
	2598	+ *
	2599	+ * Note:
	2600	+ * It is implementation-defined whether I/O page real address validity checking
	2601	+ * is done at time mappings are established or deferred until they are
	2602	+ * accessed.
	2603	+ */
	2604	+#define HV_FAST_PCI_IOTSB_MAP_ONE 0x197
	2605	+
	2606	+/* pci_iotsb_demap()
	2607	+ * TRAP: HV_FAST_TRAP
	2608	+ * FUNCTION: HV_FAST_PCI_IOTSB_DEMAP
	2609	+ * ARG0: devhandle
	2610	+ * ARG1: iotsb_handle
	2611	+ * ARG2: iotsb_index
	2612	+ * ARG3: #iottes
	2613	+ * RET0: status
	2614	+ * RET1: #unmapped
	2615	+ * ERRORS: EINVAL Invalid devhandle, iotsb_handle, iotsb_index or #iottes
	2616	+ *
	2617	+ * This service unmaps and flushes up to #iottes mappings starting at index
	2618	+ * iotsb_index from the IOTSB defined by the arguments devhandle, iotsb.
	2619	+ *
	2620	+ * #iottes must be greater than zero.
	2621	+ *
	2622	+ * The actual number of IOTTEs unmapped is returned in #unmapped and may be less
	2623	+ * than or equal to the requested number of IOTTEs, #iottes.
	2624	+ *
	2625	+ * If #unmapped is less than #iottes, the caller should continue to invoke this
	2626	+ * service with updated iotsb_index and #iottes arguments until all pages are
	2627	+ * demapped.
	2628	+ */
	2629	+#define HV_FAST_PCI_IOTSB_DEMAP 0x198
	2630	+
	2631	+/* pci_iotsb_getmap()
	2632	+ * TRAP: HV_FAST_TRAP
	2633	+ * FUNCTION: HV_FAST_PCI_IOTSB_GETMAP
	2634	+ * ARG0: devhandle
	2635	+ * ARG1: iotsb_handle
	2636	+ * ARG2: iotsb_index
	2637	+ * RET0: status
	2638	+ * RET1: r_addr
	2639	+ * RET2: iotte_attributes
	2640	+ * ERRORS: EINVAL Invalid devhandle, iotsb_handle, or iotsb_index
	2641	+ * ENOMAP No mapping was found
	2642	+ *
	2643	+ * This service returns the mapping specified by index iotsb_index from the
	2644	+ * IOTSB defined by the arguments devhandle, iotsb.
	2645	+ *
	2646	+ * Upon success, the real address of the mapping shall be returned in
	2647	+ * r_addr and thethe IOTTE mapping attributes shall be returned in
	2648	+ * iotte_attributes.
	2649	+ *
	2650	+ * The return value iotte_attributes may not include optional features used in
	2651	+ * the call to create the mapping.
	2652	+ */
	2653	+#define HV_FAST_PCI_IOTSB_GETMAP 0x199
	2654	+
	2655	+/* pci_iotsb_sync_mappings()
	2656	+ * TRAP: HV_FAST_TRAP
	2657	+ * FUNCTION: HV_FAST_PCI_IOTSB_SYNC_MAPPINGS
	2658	+ * ARG0: devhandle
	2659	+ * ARG1: iotsb_handle
	2660	+ * ARG2: iotsb_index
	2661	+ * ARG3: #iottes
	2662	+ * RET0: status
	2663	+ * RET1: #synced
	2664	+ * ERROS: EINVAL Invalid devhandle, iotsb_handle, iotsb_index, or #iottes
	2665	+ *
	2666	+ * This service synchronizes #iottes mappings starting at index iotsb_index in
	2667	+ * the IOTSB defined by the arguments devhandle, iotsb.
	2668	+ *
	2669	+ * #iottes must be greater than zero.
	2670	+ *
	2671	+ * The actual number of IOTTEs synchronized is returned in #synced, which may
	2672	+ * be less than or equal to the requested number, #iottes.
	2673	+ *
	2674	+ * Upon a successful return, #synced is less than #iottes, the caller should
	2675	+ * continue to invoke this service with updated iotsb_index and #iottes
	2676	+ * arguments until all pages are synchronized.
	2677	+ */
	2678	+#define HV_FAST_PCI_IOTSB_SYNC_MAPPINGS 0x19a
	2679	+
2338	2680	/* Logical Domain Channel services. */
2339	2681
2340	2682	#define LDC_CHANNEL_DOWN 0
@@ -2993,6 +3335,7 @@ unsigned long sun4v_m7_set_perfreg(unsigned long reg_num, · 652 unmodified lines
2993	3335	#define HV_GRP_SDIO 0x0108
2994	3336	#define HV_GRP_SDIO_ERR 0x0109
2995	3337	#define HV_GRP_REBOOT_DATA 0x0110
	3338	+#define HV_GRP_ATU 0x0111
2996	3339	#define HV_GRP_M7_PERF 0x0114
2997	3340	#define HV_GRP_NIAG_PERF 0x0200
2998	3341	#define HV_GRP_FIRE_PERF 0x0201

arch/sparc/include/asm/iommu_64.h+28−0

@@ -24,8 +24,36 @@ struct iommu_arena { · 23 unmodified lines
24	24	unsigned int limit;
25	25	};
26	26
	27	+#define ATU_64_SPACE_SIZE 0x800000000 /* 32G */
	28	+
	29	+/* Data structures for SPARC ATU architecture */
	30	+struct atu_iotsb {
	31	+ void table; / IOTSB table base virtual addr*/
	32	+ u64 ra; /* IOTSB table real addr */
	33	+ u64 dvma_size; /* ranges[3].size or OS slected 32G size */
	34	+ u64 dvma_base; /* ranges[3].base */
	35	+ u64 table_size; /* IOTSB table size */
	36	+ u64 page_size; /* IO PAGE size for IOTSB */
	37	+ u32 iotsb_num; /* tsbnum is same as iotsb_handle */
	38	+};
	39	+
	40	+struct atu_ranges {
	41	+ u64 base;
	42	+ u64 size;
	43	+};
	44	+
	45	+struct atu {
	46	+ struct atu_ranges *ranges;
	47	+ struct atu_iotsb *iotsb;
	48	+ struct iommu_map_table tbl;
	49	+ u64 base;
	50	+ u64 size;
	51	+ u64 dma_addr_mask;
	52	+};
	53	+
27	54	struct iommu {
28	55	struct iommu_map_table tbl;
	56	+ struct atu *atu;
29	57	spinlock_t lock;
30	58	u32 dma_addr_mask;
31	59	iopte_t *page_table;

arch/sparc/kernel/hvapi.c+1−0

@@ -39,6 +39,7 @@ static struct api_info api_table[] = { · 38 unmodified lines
39	39	{ .group = HV_GRP_SDIO, },
40	40	{ .group = HV_GRP_SDIO_ERR, },
41	41	{ .group = HV_GRP_REBOOT_DATA, },
	42	+ { .group = HV_GRP_ATU, .flags = FLAG_PRE_API },
42	43	{ .group = HV_GRP_NIAG_PERF, .flags = FLAG_PRE_API },
43	44	{ .group = HV_GRP_FIRE_PERF, },
44	45	{ .group = HV_GRP_N2_CPU, },

arch/sparc/kernel/iommu.c+6−2

@@ -760,8 +760,12 @@ int dma_supported(struct device *dev, u64 device_mask) · 759 unmodified lines
760	760	struct iommu *iommu = dev->archdata.iommu;
761	761	u64 dma_addr_mask = iommu->dma_addr_mask;
762	762
763		− if (device_mask >= (1UL << 32UL))
764		− return 0;
	763	+ if (device_mask > DMA_BIT_MASK(32)) {
	764	+ if (iommu->atu)
	765	+ dma_addr_mask = iommu->atu->dma_addr_mask;
	766	+ else
	767	+ return 0;
	768	+ }
765	769
766	770	if ((device_mask & dma_addr_mask) == dma_addr_mask)
767	771	return 1;

arch/sparc/kernel/iommu_common.h+0−1

@@ -13,7 +13,6 @@ · 12 unmodified lines
13	13	#include <linux/scatterlist.h>
14	14	#include <linux/device.h>
15	15	#include <linux/iommu-helper.h>
16		−#include <linux/scatterlist.h>
17	16
18	17	#include <asm/iommu.h>
19	18

arch/sparc/kernel/pci_sun4v.c+360−58

@@ -44,6 +44,9 @@ static struct vpci_version vpci_versions[] = { · 43 unmodified lines
44	44	{ .major = 1, .minor = 1 },
45	45	};
46	46
	47	+static unsigned long vatu_major = 1;
	48	+static unsigned long vatu_minor = 1;
	49	+
47	50	#define PGLIST_NENTS (PAGE_SIZE / sizeof(u64))
48	51
49	52	struct iommu_batch {
@@ -69,34 +72,57 @@ static inline void iommu_batch_start(struct device *dev, unsigned long prot, uns · 19 unmodified lines
69	72	}
70	73
71	74	/* Interrupts must be disabled. */
72		−static long iommu_batch_flush(struct iommu_batch *p)
	75	+static long iommu_batch_flush(struct iommu_batch *p, u64 mask)
73	76	{
74	77	struct pci_pbm_info *pbm = p->dev->archdata.host_controller;
	78	+ u64 *pglist = p->pglist;
	79	+ u64 index_count;
75	80	unsigned long devhandle = pbm->devhandle;
76	81	unsigned long prot = p->prot;
77	82	unsigned long entry = p->entry;
78		− u64 *pglist = p->pglist;
79	83	unsigned long npages = p->npages;
	84	+ unsigned long iotsb_num;
	85	+ unsigned long ret;
	86	+ long num;
80	87
81	88	/* VPCI maj=1, min=[0,1] only supports read and write */
82	89	if (vpci_major < 2)
83	90	prot &= (HV_PCI_MAP_ATTR_READ \| HV_PCI_MAP_ATTR_WRITE);
84	91
85	92	while (npages != 0) {
86		− long num;
87		−
88		− num = pci_sun4v_iommu_map(devhandle, HV_PCI_TSBID(0, entry),
89		− npages, prot, __pa(pglist));
90		− if (unlikely(num < 0)) {
91		− if (printk_ratelimit())
92		− printk("iommu_batch_flush: IOMMU map of "
93		− "[%08lx:%08llx:%lx:%lx:%lx] failed with "
94		− "status %ld\n",
95		− devhandle, HV_PCI_TSBID(0, entry),
96		− npages, prot, __pa(pglist), num);
97		− return -1;
	93	+ if (mask <= DMA_BIT_MASK(32)) {
	94	+ num = pci_sun4v_iommu_map(devhandle,
	95	+ HV_PCI_TSBID(0, entry),
	96	+ npages,
	97	+ prot,
	98	+ __pa(pglist));
	99	+ if (unlikely(num < 0)) {
	100	+ pr_err_ratelimited("%s: IOMMU map of [%08lx:%08llx:%lx:%lx:%lx] failed with status %ld\n",
	101	+ __func__,
	102	+ devhandle,
	103	+ HV_PCI_TSBID(0, entry),
	104	+ npages, prot, __pa(pglist),
	105	+ num);
	106	+ return -1;
	107	+ }
	108	+ } else {
	109	+ index_count = HV_PCI_IOTSB_INDEX_COUNT(npages, entry),
	110	+ iotsb_num = pbm->iommu->atu->iotsb->iotsb_num;
	111	+ ret = pci_sun4v_iotsb_map(devhandle,
	112	+ iotsb_num,
	113	+ index_count,
	114	+ prot,
	115	+ __pa(pglist),
	116	+ &num);
	117	+ if (unlikely(ret != HV_EOK)) {
	118	+ pr_err_ratelimited("%s: ATU map of [%08lx:%lx:%llx:%lx:%lx] failed with status %ld\n",
	119	+ __func__,
	120	+ devhandle, iotsb_num,
	121	+ index_count, prot,
	122	+ __pa(pglist), ret);
	123	+ return -1;
	124	+ }
98	125	}
99		−
100	126	entry += num;
101	127	npages -= num;
102	128	pglist += num;
@@ -108,19 +134,19 @@ static long iommu_batch_flush(struct iommu_batch *p) · 5 unmodified lines
108	134	return 0;
109	135	}
110	136
111		−static inline void iommu_batch_new_entry(unsigned long entry)
	137	+static inline void iommu_batch_new_entry(unsigned long entry, u64 mask)
112	138	{
113	139	struct iommu_batch *p = this_cpu_ptr(&iommu_batch);
114	140
115	141	if (p->entry + p->npages == entry)
116	142	return;
117	143	if (p->entry != ~0UL)
118		− iommu_batch_flush(p);
	144	+ iommu_batch_flush(p, mask);
119	145	p->entry = entry;
120	146	}
121	147
122	148	/* Interrupts must be disabled. */
123		−static inline long iommu_batch_add(u64 phys_page)
	149	+static inline long iommu_batch_add(u64 phys_page, u64 mask)
124	150	{
125	151	struct iommu_batch *p = this_cpu_ptr(&iommu_batch);
126	152
@@ -128,28 +154,31 @@ static inline long iommu_batch_add(u64 phys_page) · 1 unmodified line
128	154
129	155	p->pglist[p->npages++] = phys_page;
130	156	if (p->npages == PGLIST_NENTS)
131		− return iommu_batch_flush(p);
	157	+ return iommu_batch_flush(p, mask);
132	158
133	159	return 0;
134	160	}
135	161
136	162	/* Interrupts must be disabled. */
137		−static inline long iommu_batch_end(void)
	163	+static inline long iommu_batch_end(u64 mask)
138	164	{
139	165	struct iommu_batch *p = this_cpu_ptr(&iommu_batch);
140	166
141	167	BUG_ON(p->npages >= PGLIST_NENTS);
142	168
143		− return iommu_batch_flush(p);
	169	+ return iommu_batch_flush(p, mask);
144	170	}
145	171
146	172	static void dma_4v_alloc_coherent(struct device dev, size_t size,
147	173	dma_addr_t *dma_addrp, gfp_t gfp,
148	174	unsigned long attrs)
149	175	{
	176	+ u64 mask;
150	177	unsigned long flags, order, first_page, npages, n;
151	178	unsigned long prot = 0;
152	179	struct iommu *iommu;
	180	+ struct atu *atu;
	181	+ struct iommu_map_table *tbl;
153	182	struct page *page;
154	183	void *ret;
155	184	long entry;
@@ -174,14 +203,21 @@ static void dma_4v_alloc_coherent(struct device dev, size_t size, · 18 unmodified lines
174	203	memset((char *)first_page, 0, PAGE_SIZE << order);
175	204
176	205	iommu = dev->archdata.iommu;
	206	+ atu = iommu->atu;
	207	+
	208	+ mask = dev->coherent_dma_mask;
	209	+ if (mask <= DMA_BIT_MASK(32))
	210	+ tbl = &iommu->tbl;
	211	+ else
	212	+ tbl = &atu->tbl;
177	213
178		− entry = iommu_tbl_range_alloc(dev, &iommu->tbl, npages, NULL,
	214	+ entry = iommu_tbl_range_alloc(dev, tbl, npages, NULL,
179	215	(unsigned long)(-1), 0);
180	216
181	217	if (unlikely(entry == IOMMU_ERROR_CODE))
182	218	goto range_alloc_fail;
183	219
184		− *dma_addrp = (iommu->tbl.table_map_base + (entry << IO_PAGE_SHIFT));
	220	+ *dma_addrp = (tbl->table_map_base + (entry << IO_PAGE_SHIFT));
185	221	ret = (void *) first_page;
186	222	first_page = __pa(first_page);
187	223
@@ -193,12 +229,12 @@ static void dma_4v_alloc_coherent(struct device dev, size_t size, · 5 unmodified lines
193	229	entry);
194	230
195	231	for (n = 0; n < npages; n++) {
196		− long err = iommu_batch_add(first_page + (n * PAGE_SIZE));
	232	+ long err = iommu_batch_add(first_page + (n * PAGE_SIZE), mask);
197	233	if (unlikely(err < 0L))
198	234	goto iommu_map_fail;
199	235	}
200	236
201		− if (unlikely(iommu_batch_end() < 0L))
	237	+ if (unlikely(iommu_batch_end(mask) < 0L))
202	238	goto iommu_map_fail;
203	239
204	240	local_irq_restore(flags);
@@ -206,25 +242,71 @@ static void dma_4v_alloc_coherent(struct device dev, size_t size, · 1 unmodified line
206	242	return ret;
207	243
208	244	iommu_map_fail:
209		− iommu_tbl_range_free(&iommu->tbl, *dma_addrp, npages, IOMMU_ERROR_CODE);
	245	+ iommu_tbl_range_free(tbl, *dma_addrp, npages, IOMMU_ERROR_CODE);
210	246
211	247	range_alloc_fail:
212	248	free_pages(first_page, order);
213	249	return NULL;
214	250	}
215	251
216		−static void dma_4v_iommu_demap(void *demap_arg, unsigned long entry,
217		− unsigned long npages)
	252	+unsigned long dma_4v_iotsb_bind(unsigned long devhandle,
	253	+ unsigned long iotsb_num,
	254	+ struct pci_bus *bus_dev)
	255	+{
	256	+ struct pci_dev *pdev;
	257	+ unsigned long err;
	258	+ unsigned int bus;
	259	+ unsigned int device;
	260	+ unsigned int fun;
	261	+
	262	+ list_for_each_entry(pdev, &bus_dev->devices, bus_list) {
	263	+ if (pdev->subordinate) {
	264	+ /* No need to bind pci bridge */
	265	+ dma_4v_iotsb_bind(devhandle, iotsb_num,
	266	+ pdev->subordinate);
	267	+ } else {
	268	+ bus = bus_dev->number;
	269	+ device = PCI_SLOT(pdev->devfn);
	270	+ fun = PCI_FUNC(pdev->devfn);
	271	+ err = pci_sun4v_iotsb_bind(devhandle, iotsb_num,
	272	+ HV_PCI_DEVICE_BUILD(bus,
	273	+ device,
	274	+ fun));
	275	+
	276	+ /* If bind fails for one device it is going to fail
	277	+ * for rest of the devices because we are sharing
	278	+ * IOTSB. So in case of failure simply return with
	279	+ * error.
	280	+ */
	281	+ if (err)
	282	+ return err;
	283	+ }
	284	+ }
	285	+
	286	+ return 0;
	287	+}
	288	+
	289	+static void dma_4v_iommu_demap(struct device *dev, unsigned long devhandle,
	290	+ dma_addr_t dvma, unsigned long iotsb_num,
	291	+ unsigned long entry, unsigned long npages)
218	292	{
219		− u32 devhandle = (u32 )demap_arg;
220	293	unsigned long num, flags;
	294	+ unsigned long ret;
221	295
222	296	local_irq_save(flags);
223	297	do {
224		− num = pci_sun4v_iommu_demap(devhandle,
225		− HV_PCI_TSBID(0, entry),
226		− npages);
227		−
	298	+ if (dvma <= DMA_BIT_MASK(32)) {
	299	+ num = pci_sun4v_iommu_demap(devhandle,
	300	+ HV_PCI_TSBID(0, entry),
	301	+ npages);
	302	+ } else {
	303	+ ret = pci_sun4v_iotsb_demap(devhandle, iotsb_num,
	304	+ entry, npages, &num);
	305	+ if (unlikely(ret != HV_EOK)) {
	306	+ pr_err_ratelimited("pci_iotsb_demap() failed with error: %ld\n",
	307	+ ret);
	308	+ }
	309	+ }
228	310	entry += num;
229	311	npages -= num;
230	312	} while (npages != 0);
@@ -236,16 +318,28 @@ static void dma_4v_free_coherent(struct device dev, size_t size, void cpu, · 5 unmodified lines
236	318	{
237	319	struct pci_pbm_info *pbm;
238	320	struct iommu *iommu;
	321	+ struct atu *atu;
	322	+ struct iommu_map_table *tbl;
239	323	unsigned long order, npages, entry;
	324	+ unsigned long iotsb_num;
240	325	u32 devhandle;
241	326
242	327	npages = IO_PAGE_ALIGN(size) >> IO_PAGE_SHIFT;
243	328	iommu = dev->archdata.iommu;
244	329	pbm = dev->archdata.host_controller;
	330	+ atu = iommu->atu;
245	331	devhandle = pbm->devhandle;
246		− entry = ((dvma - iommu->tbl.table_map_base) >> IO_PAGE_SHIFT);
247		− dma_4v_iommu_demap(&devhandle, entry, npages);
248		− iommu_tbl_range_free(&iommu->tbl, dvma, npages, IOMMU_ERROR_CODE);
	332	+
	333	+ if (dvma <= DMA_BIT_MASK(32)) {
	334	+ tbl = &iommu->tbl;
	335	+ iotsb_num = 0; /* we don't care for legacy iommu */
	336	+ } else {
	337	+ tbl = &atu->tbl;
	338	+ iotsb_num = atu->iotsb->iotsb_num;
	339	+ }
	340	+ entry = ((dvma - tbl->table_map_base) >> IO_PAGE_SHIFT);
	341	+ dma_4v_iommu_demap(dev, devhandle, dvma, iotsb_num, entry, npages);
	342	+ iommu_tbl_range_free(tbl, dvma, npages, IOMMU_ERROR_CODE);
249	343	order = get_order(size);
250	344	if (order < 10)
251	345	free_pages((unsigned long)cpu, order);
@@ -257,13 +351,17 @@ static dma_addr_t dma_4v_map_page(struct device dev, struct page page, · 5 unmodified lines
257	351	unsigned long attrs)
258	352	{
259	353	struct iommu *iommu;
	354	+ struct atu *atu;
	355	+ struct iommu_map_table *tbl;
	356	+ u64 mask;
260	357	unsigned long flags, npages, oaddr;
261	358	unsigned long i, base_paddr;
262		− u32 bus_addr, ret;
263	359	unsigned long prot;
	360	+ dma_addr_t bus_addr, ret;
264	361	long entry;
265	362
266	363	iommu = dev->archdata.iommu;
	364	+ atu = iommu->atu;
267	365
268	366	if (unlikely(direction == DMA_NONE))
269	367	goto bad;
@@ -272,13 +370,19 @@ static dma_addr_t dma_4v_map_page(struct device dev, struct page page, · 2 unmodified lines
272	370	npages = IO_PAGE_ALIGN(oaddr + sz) - (oaddr & IO_PAGE_MASK);
273	371	npages >>= IO_PAGE_SHIFT;
274	372
275		− entry = iommu_tbl_range_alloc(dev, &iommu->tbl, npages, NULL,
	373	+ mask = *dev->dma_mask;
	374	+ if (mask <= DMA_BIT_MASK(32))
	375	+ tbl = &iommu->tbl;
	376	+ else
	377	+ tbl = &atu->tbl;
	378	+
	379	+ entry = iommu_tbl_range_alloc(dev, tbl, npages, NULL,
276	380	(unsigned long)(-1), 0);
277	381
278	382	if (unlikely(entry == IOMMU_ERROR_CODE))
279	383	goto bad;
280	384
281		− bus_addr = (iommu->tbl.table_map_base + (entry << IO_PAGE_SHIFT));
	385	+ bus_addr = (tbl->table_map_base + (entry << IO_PAGE_SHIFT));
282	386	ret = bus_addr \| (oaddr & ~IO_PAGE_MASK);
283	387	base_paddr = __pa(oaddr & IO_PAGE_MASK);
284	388	prot = HV_PCI_MAP_ATTR_READ;
@@ -293,11 +397,11 @@ static dma_addr_t dma_4v_map_page(struct device dev, struct page page, · 8 unmodified lines
293	397	iommu_batch_start(dev, prot, entry);
294	398
295	399	for (i = 0; i < npages; i++, base_paddr += IO_PAGE_SIZE) {
296		− long err = iommu_batch_add(base_paddr);
	400	+ long err = iommu_batch_add(base_paddr, mask);
297	401	if (unlikely(err < 0L))
298	402	goto iommu_map_fail;
299	403	}
300		− if (unlikely(iommu_batch_end() < 0L))
	404	+ if (unlikely(iommu_batch_end(mask) < 0L))
301	405	goto iommu_map_fail;
302	406
303	407	local_irq_restore(flags);
@@ -310,7 +414,7 @@ bad: · 6 unmodified lines
310	414	return DMA_ERROR_CODE;
311	415
312	416	iommu_map_fail:
313		− iommu_tbl_range_free(&iommu->tbl, bus_addr, npages, IOMMU_ERROR_CODE);
	417	+ iommu_tbl_range_free(tbl, bus_addr, npages, IOMMU_ERROR_CODE);
314	418	return DMA_ERROR_CODE;
315	419	}
316	420
@@ -320,7 +424,10 @@ static void dma_4v_unmap_page(struct device *dev, dma_addr_t bus_addr, · 3 unmodified lines
320	424	{
321	425	struct pci_pbm_info *pbm;
322	426	struct iommu *iommu;
	427	+ struct atu *atu;
	428	+ struct iommu_map_table *tbl;
323	429	unsigned long npages;
	430	+ unsigned long iotsb_num;
324	431	long entry;
325	432	u32 devhandle;
326	433
@@ -332,14 +439,23 @@ static void dma_4v_unmap_page(struct device *dev, dma_addr_t bus_addr, · 5 unmodified lines
332	439
333	440	iommu = dev->archdata.iommu;
334	441	pbm = dev->archdata.host_controller;
	442	+ atu = iommu->atu;
335	443	devhandle = pbm->devhandle;
336	444
337	445	npages = IO_PAGE_ALIGN(bus_addr + sz) - (bus_addr & IO_PAGE_MASK);
338	446	npages >>= IO_PAGE_SHIFT;
339	447	bus_addr &= IO_PAGE_MASK;
340		− entry = (bus_addr - iommu->tbl.table_map_base) >> IO_PAGE_SHIFT;
341		− dma_4v_iommu_demap(&devhandle, entry, npages);
342		− iommu_tbl_range_free(&iommu->tbl, bus_addr, npages, IOMMU_ERROR_CODE);
	448	+
	449	+ if (bus_addr <= DMA_BIT_MASK(32)) {
	450	+ iotsb_num = 0; /* we don't care for legacy iommu */
	451	+ tbl = &iommu->tbl;
	452	+ } else {
	453	+ iotsb_num = atu->iotsb->iotsb_num;
	454	+ tbl = &atu->tbl;
	455	+ }
	456	+ entry = (bus_addr - tbl->table_map_base) >> IO_PAGE_SHIFT;
	457	+ dma_4v_iommu_demap(dev, devhandle, bus_addr, iotsb_num, entry, npages);
	458	+ iommu_tbl_range_free(tbl, bus_addr, npages, IOMMU_ERROR_CODE);
343	459	}
344	460
345	461	static int dma_4v_map_sg(struct device dev, struct scatterlist sglist,
@@ -353,12 +469,17 @@ static int dma_4v_map_sg(struct device dev, struct scatterlist sglist, · 7 unmodified lines
353	469	unsigned long seg_boundary_size;
354	470	int outcount, incount, i;
355	471	struct iommu *iommu;
	472	+ struct atu *atu;
	473	+ struct iommu_map_table *tbl;
	474	+ u64 mask;
356	475	unsigned long base_shift;
357	476	long err;
358	477
359	478	BUG_ON(direction == DMA_NONE);
360	479
361	480	iommu = dev->archdata.iommu;
	481	+ atu = iommu->atu;
	482	+
362	483	if (nelems == 0 \|\| !iommu)
363	484	return 0;
364	485
@@ -384,7 +505,15 @@ static int dma_4v_map_sg(struct device dev, struct scatterlist sglist, · 19 unmodified lines
384	505	max_seg_size = dma_get_max_seg_size(dev);
385	506	seg_boundary_size = ALIGN(dma_get_seg_boundary(dev) + 1,
386	507	IO_PAGE_SIZE) >> IO_PAGE_SHIFT;
387		− base_shift = iommu->tbl.table_map_base >> IO_PAGE_SHIFT;
	508	+
	509	+ mask = *dev->dma_mask;
	510	+ if (mask <= DMA_BIT_MASK(32))
	511	+ tbl = &iommu->tbl;
	512	+ else
	513	+ tbl = &atu->tbl;
	514	+
	515	+ base_shift = tbl->table_map_base >> IO_PAGE_SHIFT;
	516	+
388	517	for_each_sg(sglist, s, nelems, i) {
389	518	unsigned long paddr, npages, entry, out_entry = 0, slen;
390	519
@@ -397,27 +526,26 @@ static int dma_4v_map_sg(struct device dev, struct scatterlist sglist, · 6 unmodified lines
397	526	/* Allocate iommu entries for that segment */
398	527	paddr = (unsigned long) SG_ENT_PHYS_ADDRESS(s);
399	528	npages = iommu_num_pages(paddr, slen, IO_PAGE_SIZE);
400		− entry = iommu_tbl_range_alloc(dev, &iommu->tbl, npages,
	529	+ entry = iommu_tbl_range_alloc(dev, tbl, npages,
401	530	&handle, (unsigned long)(-1), 0);
402	531
403	532	/* Handle failure */
404	533	if (unlikely(entry == IOMMU_ERROR_CODE)) {
405		− if (printk_ratelimit())
406		− printk(KERN_INFO "iommu_alloc failed, iommu %p paddr %lx"
407		− " npages %lx\n", iommu, paddr, npages);
	534	+ pr_err_ratelimited("iommu_alloc failed, iommu %p paddr %lx npages %lx\n",
	535	+ tbl, paddr, npages);
408	536	goto iommu_map_failed;
409	537	}
410	538
411		− iommu_batch_new_entry(entry);
	539	+ iommu_batch_new_entry(entry, mask);
412	540
413	541	/* Convert entry to a dma_addr_t */
414		− dma_addr = iommu->tbl.table_map_base + (entry << IO_PAGE_SHIFT);
	542	+ dma_addr = tbl->table_map_base + (entry << IO_PAGE_SHIFT);
415	543	dma_addr \|= (s->offset & ~IO_PAGE_MASK);
416	544
417	545	/* Insert into HW table */
418	546	paddr &= IO_PAGE_MASK;
419	547	while (npages--) {
420		− err = iommu_batch_add(paddr);
	548	+ err = iommu_batch_add(paddr, mask);
421	549	if (unlikely(err < 0L))
422	550	goto iommu_map_failed;
423	551	paddr += IO_PAGE_SIZE;
@@ -452,7 +580,7 @@ static int dma_4v_map_sg(struct device dev, struct scatterlist sglist, · 28 unmodified lines
452	580	dma_next = dma_addr + slen;
453	581	}
454	582
455		− err = iommu_batch_end();
	583	+ err = iommu_batch_end(mask);
456	584
457	585	if (unlikely(err < 0L))
458	586	goto iommu_map_failed;
@@ -475,7 +603,7 @@ iommu_map_failed: · 16 unmodified lines
475	603	vaddr = s->dma_address & IO_PAGE_MASK;
476	604	npages = iommu_num_pages(s->dma_address, s->dma_length,
477	605	IO_PAGE_SIZE);
478		− iommu_tbl_range_free(&iommu->tbl, vaddr, npages,
	606	+ iommu_tbl_range_free(tbl, vaddr, npages,
479	607	IOMMU_ERROR_CODE);
480	608	/* XXX demap? XXX */
481	609	s->dma_address = DMA_ERROR_CODE;
@@ -496,13 +624,16 @@ static void dma_4v_unmap_sg(struct device dev, struct scatterlist sglist, · 14 unmodified lines
496	624	struct pci_pbm_info *pbm;
497	625	struct scatterlist *sg;
498	626	struct iommu *iommu;
	627	+ struct atu *atu;
499	628	unsigned long flags, entry;
	629	+ unsigned long iotsb_num;
500	630	u32 devhandle;
501	631
502	632	BUG_ON(direction == DMA_NONE);
503	633
504	634	iommu = dev->archdata.iommu;
505	635	pbm = dev->archdata.host_controller;
	636	+ atu = iommu->atu;
506	637	devhandle = pbm->devhandle;
507	638
508	639	local_irq_save(flags);
@@ -512,15 +643,24 @@ static void dma_4v_unmap_sg(struct device dev, struct scatterlist sglist, · 3 unmodified lines
512	643	dma_addr_t dma_handle = sg->dma_address;
513	644	unsigned int len = sg->dma_length;
514	645	unsigned long npages;
515		− struct iommu_map_table *tbl = &iommu->tbl;
	646	+ struct iommu_map_table *tbl;
516	647	unsigned long shift = IO_PAGE_SHIFT;
517	648
518	649	if (!len)
519	650	break;
520	651	npages = iommu_num_pages(dma_handle, len, IO_PAGE_SIZE);
	652	+
	653	+ if (dma_handle <= DMA_BIT_MASK(32)) {
	654	+ iotsb_num = 0; /* we don't care for legacy iommu */
	655	+ tbl = &iommu->tbl;
	656	+ } else {
	657	+ iotsb_num = atu->iotsb->iotsb_num;
	658	+ tbl = &atu->tbl;
	659	+ }
521	660	entry = ((dma_handle - tbl->table_map_base) >> shift);
522		− dma_4v_iommu_demap(&devhandle, entry, npages);
523		− iommu_tbl_range_free(&iommu->tbl, dma_handle, npages,
	661	+ dma_4v_iommu_demap(dev, devhandle, dma_handle, iotsb_num,
	662	+ entry, npages);
	663	+ iommu_tbl_range_free(tbl, dma_handle, npages,
524	664	IOMMU_ERROR_CODE);
525	665	sg = sg_next(sg);
526	666	}
@@ -581,6 +721,132 @@ static unsigned long probe_existing_entries(struct pci_pbm_info *pbm, · 54 unmodified lines
581	721	return cnt;
582	722	}
583	723
	724	+static int pci_sun4v_atu_alloc_iotsb(struct pci_pbm_info *pbm)
	725	+{
	726	+ struct atu *atu = pbm->iommu->atu;
	727	+ struct atu_iotsb *iotsb;
	728	+ void *table;
	729	+ u64 table_size;
	730	+ u64 iotsb_num;
	731	+ unsigned long order;
	732	+ unsigned long err;
	733	+
	734	+ iotsb = kzalloc(sizeof(*iotsb), GFP_KERNEL);
	735	+ if (!iotsb) {
	736	+ err = -ENOMEM;
	737	+ goto out_err;
	738	+ }
	739	+ atu->iotsb = iotsb;
	740	+
	741	+ /* calculate size of IOTSB */
	742	+ table_size = (atu->size / IO_PAGE_SIZE) * 8;
	743	+ order = get_order(table_size);
	744	+ table = (void *)__get_free_pages(GFP_KERNEL \| __GFP_ZERO, order);
	745	+ if (!table) {
	746	+ err = -ENOMEM;
	747	+ goto table_failed;
	748	+ }
	749	+ iotsb->table = table;
	750	+ iotsb->ra = __pa(table);
	751	+ iotsb->dvma_size = atu->size;
	752	+ iotsb->dvma_base = atu->base;
	753	+ iotsb->table_size = table_size;
	754	+ iotsb->page_size = IO_PAGE_SIZE;
	755	+
	756	+ /* configure and register IOTSB with HV */
	757	+ err = pci_sun4v_iotsb_conf(pbm->devhandle,
	758	+ iotsb->ra,
	759	+ iotsb->table_size,
	760	+ iotsb->page_size,
	761	+ iotsb->dvma_base,
	762	+ &iotsb_num);
	763	+ if (err) {
	764	+ pr_err(PFX "pci_iotsb_conf failed error: %ld\n", err);
	765	+ goto iotsb_conf_failed;
	766	+ }
	767	+ iotsb->iotsb_num = iotsb_num;
	768	+
	769	+ err = dma_4v_iotsb_bind(pbm->devhandle, iotsb_num, pbm->pci_bus);
	770	+ if (err) {
	771	+ pr_err(PFX "pci_iotsb_bind failed error: %ld\n", err);
	772	+ goto iotsb_conf_failed;
	773	+ }
	774	+
	775	+ return 0;
	776	+
	777	+iotsb_conf_failed:
	778	+ free_pages((unsigned long)table, order);
	779	+table_failed:
	780	+ kfree(iotsb);
	781	+out_err:
	782	+ return err;
	783	+}
	784	+
	785	+static int pci_sun4v_atu_init(struct pci_pbm_info *pbm)
	786	+{
	787	+ struct atu *atu = pbm->iommu->atu;
	788	+ unsigned long err;
	789	+ const u64 *ranges;
	790	+ u64 map_size, num_iotte;
	791	+ u64 dma_mask;
	792	+ const u32 *page_size;
	793	+ int len;
	794	+
	795	+ ranges = of_get_property(pbm->op->dev.of_node, "iommu-address-ranges",
	796	+ &len);
	797	+ if (!ranges) {
	798	+ pr_err(PFX "No iommu-address-ranges\n");
	799	+ return -EINVAL;
	800	+ }
	801	+
	802	+ page_size = of_get_property(pbm->op->dev.of_node, "iommu-pagesizes",
	803	+ NULL);
	804	+ if (!page_size) {
	805	+ pr_err(PFX "No iommu-pagesizes\n");
	806	+ return -EINVAL;
	807	+ }
	808	+
	809	+ /* There are 4 iommu-address-ranges supported. Each range is pair of
	810	+ * {base, size}. The ranges[0] and ranges[1] are 32bit address space
	811	+ * while ranges[2] and ranges[3] are 64bit space. We want to use 64bit
	812	+ * address ranges to support 64bit addressing. Because 'size' for
	813	+ * address ranges[2] and ranges[3] are same we can select either of
	814	+ * ranges[2] or ranges[3] for mapping. However due to 'size' is too
	815	+ * large for OS to allocate IOTSB we are using fix size 32G
	816	+ * (ATU_64_SPACE_SIZE) which is more than enough for all PCIe devices
	817	+ * to share.
	818	+ */
	819	+ atu->ranges = (struct atu_ranges *)ranges;
	820	+ atu->base = atu->ranges[3].base;
	821	+ atu->size = ATU_64_SPACE_SIZE;
	822	+
	823	+ /* Create IOTSB */
	824	+ err = pci_sun4v_atu_alloc_iotsb(pbm);
	825	+ if (err) {
	826	+ pr_err(PFX "Error creating ATU IOTSB\n");
	827	+ return err;
	828	+ }
	829	+
	830	+ /* Create ATU iommu map.
	831	+ * One bit represents one iotte in IOTSB table.
	832	+ */
	833	+ dma_mask = (roundup_pow_of_two(atu->size) - 1UL);
	834	+ num_iotte = atu->size / IO_PAGE_SIZE;
	835	+ map_size = num_iotte / 8;
	836	+ atu->tbl.table_map_base = atu->base;
	837	+ atu->dma_addr_mask = dma_mask;
	838	+ atu->tbl.map = kzalloc(map_size, GFP_KERNEL);
	839	+ if (!atu->tbl.map)
	840	+ return -ENOMEM;
	841	+
	842	+ iommu_tbl_pool_init(&atu->tbl, num_iotte, IO_PAGE_SHIFT,
	843	+ NULL, false /* no large_pool */,
	844	+ 0 /* default npools */,
	845	+ false /* want span boundary checking */);
	846	+
	847	+ return 0;
	848	+}
	849	+
584	850	static int pci_sun4v_iommu_init(struct pci_pbm_info *pbm)
585	851	{
586	852	static const u32 vdma_default[] = { 0x80000000, 0x80000000 };
@@ -918,6 +1184,18 @@ static int pci_sun4v_pbm_init(struct pci_pbm_info *pbm, · 331 unmodified lines
918	1184
919	1185	pci_sun4v_scan_bus(pbm, &op->dev);
920	1186
	1187	+ /* if atu_init fails its not complete failure.
	1188	+ * we can still continue using legacy iommu.
	1189	+ */
	1190	+ if (pbm->iommu->atu) {
	1191	+ err = pci_sun4v_atu_init(pbm);
	1192	+ if (err) {
	1193	+ kfree(pbm->iommu->atu);
	1194	+ pbm->iommu->atu = NULL;
	1195	+ pr_err(PFX "ATU init failed, err=%d\n", err);
	1196	+ }
	1197	+ }
	1198	+
921	1199	pbm->next = pci_pbm_root;
922	1200	pci_pbm_root = pbm;
923	1201
@@ -931,8 +1209,10 @@ static int pci_sun4v_probe(struct platform_device *op) · 7 unmodified lines
931	1209	struct pci_pbm_info *pbm;
932	1210	struct device_node *dp;
933	1211	struct iommu *iommu;
	1212	+ struct atu *atu;
934	1213	u32 devhandle;
935	1214	int i, err = -ENODEV;
	1215	+ static bool hv_atu = true;
936	1216
937	1217	dp = op->dev.of_node;
938	1218
@@ -954,6 +1234,19 @@ static int pci_sun4v_probe(struct platform_device *op) · 15 unmodified lines
954	1234	pr_info(PFX "Registered hvapi major[%lu] minor[%lu]\n",
955	1235	vpci_major, vpci_minor);
956	1236
	1237	+ err = sun4v_hvapi_register(HV_GRP_ATU, vatu_major, &vatu_minor);
	1238	+ if (err) {
	1239	+ /* don't return an error if we fail to register the
	1240	+ * ATU group, but ATU hcalls won't be available.
	1241	+ */
	1242	+ hv_atu = false;
	1243	+ pr_err(PFX "Could not register hvapi ATU err=%d\n",
	1244	+ err);
	1245	+ } else {
	1246	+ pr_info(PFX "Registered hvapi ATU major[%lu] minor[%lu]\n",
	1247	+ vatu_major, vatu_minor);
	1248	+ }
	1249	+
957	1250	dma_ops = &sun4v_dma_ops;
958	1251	}
959	1252
@@ -991,6 +1284,14 @@ static int pci_sun4v_probe(struct platform_device *op) · 31 unmodified lines
991	1284	}
992	1285
993	1286	pbm->iommu = iommu;
	1287	+ iommu->atu = NULL;
	1288	+ if (hv_atu) {
	1289	+ atu = kzalloc(sizeof(*atu), GFP_KERNEL);
	1290	+ if (!atu)
	1291	+ pr_err(PFX "Could not allocate atu\n");
	1292	+ else
	1293	+ iommu->atu = atu;
	1294	+ }
994	1295
995	1296	err = pci_sun4v_pbm_init(pbm, op, devhandle);
996	1297	if (err)
@@ -1001,6 +1302,7 @@ static int pci_sun4v_probe(struct platform_device *op) · 4 unmodified lines
1001	1302	return 0;
1002	1303
1003	1304	out_free_iommu:
	1305	+ kfree(iommu->atu);
1004	1306	kfree(pbm->iommu);
1005	1307
1006	1308	out_free_controller:

arch/sparc/kernel/pci_sun4v.h+21−0

@@ -89,4 +89,25 @@ unsigned long pci_sun4v_msg_setvalid(unsigned long devhandle, · 88 unmodified lines
89	89	unsigned long msinum,
90	90	unsigned long valid);
91	91
	92	+/* Sun4v HV IOMMU v2 APIs */
	93	+unsigned long pci_sun4v_iotsb_conf(unsigned long devhandle,
	94	+ unsigned long ra,
	95	+ unsigned long table_size,
	96	+ unsigned long page_size,
	97	+ unsigned long dvma_base,
	98	+ u64 *iotsb_num);
	99	+unsigned long pci_sun4v_iotsb_bind(unsigned long devhandle,
	100	+ unsigned long iotsb_num,
	101	+ unsigned int pci_device);
	102	+unsigned long pci_sun4v_iotsb_map(unsigned long devhandle,
	103	+ unsigned long iotsb_num,
	104	+ unsigned long iotsb_index_iottes,
	105	+ unsigned long io_attributes,
	106	+ unsigned long io_page_list_pa,
	107	+ long *mapped);
	108	+unsigned long pci_sun4v_iotsb_demap(unsigned long devhandle,
	109	+ unsigned long iotsb_num,
	110	+ unsigned long iotsb_index,
	111	+ unsigned long iottes,
	112	+ unsigned long *demapped);
92	113	#endif /* !(_PCI_SUN4V_H) */

arch/sparc/kernel/pci_sun4v_asm.S+68−0

@@ -360,3 +360,71 @@ ENTRY(pci_sun4v_msg_setvalid) · 359 unmodified lines
360	360	mov %o0, %o0
361	361	ENDPROC(pci_sun4v_msg_setvalid)
362	362
	363	+ /*
	364	+ * %o0: devhandle
	365	+ * %o1: r_addr
	366	+ * %o2: size
	367	+ * %o3: pagesize
	368	+ * %o4: virt
	369	+ * %o5: &iotsb_num/&iotsb_handle
	370	+ *
	371	+ * returns %o0: status
	372	+ * %o1: iotsb_num/iotsb_handle
	373	+ */
	374	+ENTRY(pci_sun4v_iotsb_conf)
	375	+ mov %o5, %g1
	376	+ mov HV_FAST_PCI_IOTSB_CONF, %o5
	377	+ ta HV_FAST_TRAP
	378	+ retl
	379	+ stx %o1, [%g1]
	380	+ENDPROC(pci_sun4v_iotsb_conf)
	381	+
	382	+ /*
	383	+ * %o0: devhandle
	384	+ * %o1: iotsb_num/iotsb_handle
	385	+ * %o2: pci_device
	386	+ *
	387	+ * returns %o0: status
	388	+ */
	389	+ENTRY(pci_sun4v_iotsb_bind)
	390	+ mov HV_FAST_PCI_IOTSB_BIND, %o5
	391	+ ta HV_FAST_TRAP
	392	+ retl
	393	+ nop
	394	+ENDPROC(pci_sun4v_iotsb_bind)
	395	+
	396	+ /*
	397	+ * %o0: devhandle
	398	+ * %o1: iotsb_num/iotsb_handle
	399	+ * %o2: index_count
	400	+ * %o3: iotte_attributes
	401	+ * %o4: io_page_list_p
	402	+ * %o5: &mapped
	403	+ *
	404	+ * returns %o0: status
	405	+ * %o1: #mapped
	406	+ */
	407	+ENTRY(pci_sun4v_iotsb_map)
	408	+ mov %o5, %g1
	409	+ mov HV_FAST_PCI_IOTSB_MAP, %o5
	410	+ ta HV_FAST_TRAP
	411	+ retl
	412	+ stx %o1, [%g1]
	413	+ENDPROC(pci_sun4v_iotsb_map)
	414	+
	415	+ /*
	416	+ * %o0: devhandle
	417	+ * %o1: iotsb_num/iotsb_handle
	418	+ * %o2: iotsb_index
	419	+ * %o3: #iottes
	420	+ * %o4: &demapped
	421	+ *
	422	+ * returns %o0: status
	423	+ * %o1: #demapped
	424	+ */
	425	+ENTRY(pci_sun4v_iotsb_demap)
	426	+ mov HV_FAST_PCI_IOTSB_DEMAP, %o5
	427	+ ta HV_FAST_TRAP
	428	+ retl
	429	+ stx %o1, [%o4]
	430	+ENDPROC(pci_sun4v_iotsb_demap)

arch/sparc/kernel/signal_32.c+2−2

@@ -89,7 +89,7 @@ asmlinkage void do_sigreturn(struct pt_regs *regs) · 88 unmodified lines
89	89	sf = (struct signal_frame __user *) regs->u_regs[UREG_FP];
90	90
91	91	/* 1. Make sure we are not getting garbage from the user */
92		− if (!invalid_frame_pointer(sf, sizeof(*sf)))
	92	+ if (invalid_frame_pointer(sf, sizeof(*sf)))
93	93	goto segv_and_exit;
94	94
95	95	if (get_user(ufp, &sf->info.si_regs.u_regs[UREG_FP]))
@@ -150,7 +150,7 @@ asmlinkage void do_rt_sigreturn(struct pt_regs *regs) · 54 unmodified lines
150	150
151	151	synchronize_user_stack();
152	152	sf = (struct rt_signal_frame __user *) regs->u_regs[UREG_FP];
153		− if (!invalid_frame_pointer(sf, sizeof(*sf)))
	153	+ if (invalid_frame_pointer(sf, sizeof(*sf)))
154	154	goto segv;
155	155
156	156	if (get_user(ufp, &sf->regs.u_regs[UREG_FP]))

arch/sparc/mm/init_64.c+64−7

@@ -802,8 +802,10 @@ struct mdesc_mblock { · 801 unmodified lines
802	802	};
803	803	static struct mdesc_mblock *mblocks;
804	804	static int num_mblocks;
	805	+static int find_numa_node_for_addr(unsigned long pa,
	806	+ struct node_mem_mask *pnode_mask);
805	807
806		−static unsigned long ra_to_pa(unsigned long addr)
	808	+static unsigned long __init ra_to_pa(unsigned long addr)
807	809	{
808	810	int i;
809	811
@@ -819,8 +821,11 @@ static unsigned long ra_to_pa(unsigned long addr) · 9 unmodified lines
819	821	return addr;
820	822	}
821	823
822		−static int find_node(unsigned long addr)
	824	+static int __init find_node(unsigned long addr)
823	825	{
	826	+ static bool search_mdesc = true;
	827	+ static struct node_mem_mask last_mem_mask = { ~0UL, ~0UL };
	828	+ static int last_index;
824	829	int i;
825	830
826	831	addr = ra_to_pa(addr);
@@ -830,13 +835,30 @@ static int find_node(unsigned long addr) · 3 unmodified lines
830	835	if ((addr & p->mask) == p->val)
831	836	return i;
832	837	}
833		− /* The following condition has been observed on LDOM guests.*/
834		− WARN_ONCE(1, "find_node: A physical address doesn't match a NUMA node"
835		− " rule. Some physical memory will be owned by node 0.");
836		− return 0;
	838	+ /* The following condition has been observed on LDOM guests because
	839	+ * node_masks only contains the best latency mask and value.
	840	+ * LDOM guest's mdesc can contain a single latency group to
	841	+ * cover multiple address range. Print warning message only if the
	842	+ * address cannot be found in node_masks nor mdesc.
	843	+ */
	844	+ if ((search_mdesc) &&
	845	+ ((addr & last_mem_mask.mask) != last_mem_mask.val)) {
	846	+ /* find the available node in the mdesc */
	847	+ last_index = find_numa_node_for_addr(addr, &last_mem_mask);
	848	+ numadbg("find_node: latency group for address 0x%lx is %d\n",
	849	+ addr, last_index);
	850	+ if ((last_index < 0) \|\| (last_index >= num_node_masks)) {
	851	+ /* WARN_ONCE() and use default group 0 */
	852	+ WARN_ONCE(1, "find_node: A physical address doesn't match a NUMA node rule. Some physical memory will be owned by node 0.");
	853	+ search_mdesc = false;
	854	+ last_index = 0;
	855	+ }
	856	+ }
	857	+
	858	+ return last_index;
837	859	}
838	860
839		−static u64 memblock_nid_range(u64 start, u64 end, int *nid)
	861	+static u64 __init memblock_nid_range(u64 start, u64 end, int *nid)
840	862	{
841	863	*nid = find_node(start);
842	864	start += PAGE_SIZE;
@@ -1160,6 +1182,41 @@ int __node_distance(int from, int to) · 317 unmodified lines
1160	1182	return numa_latency[from][to];
1161	1183	}
1162	1184
	1185	+static int find_numa_node_for_addr(unsigned long pa,
	1186	+ struct node_mem_mask *pnode_mask)
	1187	+{
	1188	+ struct mdesc_handle *md = mdesc_grab();
	1189	+ u64 node, arc;
	1190	+ int i = 0;
	1191	+
	1192	+ node = mdesc_node_by_name(md, MDESC_NODE_NULL, "latency-groups");
	1193	+ if (node == MDESC_NODE_NULL)
	1194	+ goto out;
	1195	+
	1196	+ mdesc_for_each_node_by_name(md, node, "group") {
	1197	+ mdesc_for_each_arc(arc, md, node, MDESC_ARC_TYPE_FWD) {
	1198	+ u64 target = mdesc_arc_target(md, arc);
	1199	+ struct mdesc_mlgroup *m = find_mlgroup(target);
	1200	+
	1201	+ if (!m)
	1202	+ continue;
	1203	+ if ((pa & m->mask) == m->match) {
	1204	+ if (pnode_mask) {
	1205	+ pnode_mask->mask = m->mask;
	1206	+ pnode_mask->val = m->match;
	1207	+ }
	1208	+ mdesc_release(md);
	1209	+ return i;
	1210	+ }
	1211	+ }
	1212	+ i++;
	1213	+ }
	1214	+
	1215	+out:
	1216	+ mdesc_release(md);
	1217	+ return -1;
	1218	+}
	1219	+
1163	1220	static int __init find_best_numa_node_for_mlgroup(struct mdesc_mlgroup *grp)
1164	1221	{
1165	1222	int i;

arch/x86/kvm/irq_comm.c+27−31

@@ -156,6 +156,16 @@ int kvm_set_msi(struct kvm_kernel_irq_routing_entry *e, · 155 unmodified lines
156	156	}
157	157
158	158
	159	+static int kvm_hv_set_sint(struct kvm_kernel_irq_routing_entry *e,
	160	+ struct kvm *kvm, int irq_source_id, int level,
	161	+ bool line_status)
	162	+{
	163	+ if (!level)
	164	+ return -1;
	165	+
	166	+ return kvm_hv_synic_set_irq(kvm, e->hv_sint.vcpu, e->hv_sint.sint);
	167	+}
	168	+
159	169	int kvm_arch_set_irq_inatomic(struct kvm_kernel_irq_routing_entry *e,
160	170	struct kvm *kvm, int irq_source_id, int level,
161	171	bool line_status)
@@ -163,18 +173,26 @@ int kvm_arch_set_irq_inatomic(struct kvm_kernel_irq_routing_entry *e, · 1 unmodified line
163	173	struct kvm_lapic_irq irq;
164	174	int r;
165	175
166		− if (unlikely(e->type != KVM_IRQ_ROUTING_MSI))
167		− return -EWOULDBLOCK;
	176	+ switch (e->type) {
	177	+ case KVM_IRQ_ROUTING_HV_SINT:
	178	+ return kvm_hv_set_sint(e, kvm, irq_source_id, level,
	179	+ line_status);
168	180
169		− if (kvm_msi_route_invalid(kvm, e))
170		− return -EINVAL;
	181	+ case KVM_IRQ_ROUTING_MSI:
	182	+ if (kvm_msi_route_invalid(kvm, e))
	183	+ return -EINVAL;
171	184
172		− kvm_set_msi_irq(kvm, e, &irq);
	185	+ kvm_set_msi_irq(kvm, e, &irq);
173	186
174		− if (kvm_irq_delivery_to_apic_fast(kvm, NULL, &irq, &r, NULL))
175		− return r;
176		− else
177		− return -EWOULDBLOCK;
	187	+ if (kvm_irq_delivery_to_apic_fast(kvm, NULL, &irq, &r, NULL))
	188	+ return r;
	189	+ break;
	190	+
	191	+ default:
	192	+ break;
	193	+ }
	194	+
	195	+ return -EWOULDBLOCK;
178	196	}
179	197
180	198	int kvm_request_irq_source_id(struct kvm *kvm)
@@ -254,16 +272,6 @@ void kvm_fire_mask_notifiers(struct kvm *kvm, unsigned irqchip, unsigned pin, · 73 unmodified lines
254	272	srcu_read_unlock(&kvm->irq_srcu, idx);
255	273	}
256	274
257		−static int kvm_hv_set_sint(struct kvm_kernel_irq_routing_entry *e,
258		− struct kvm *kvm, int irq_source_id, int level,
259		− bool line_status)
260		−{
261		− if (!level)
262		− return -1;
263		−
264		− return kvm_hv_synic_set_irq(kvm, e->hv_sint.vcpu, e->hv_sint.sint);
265		−}
266		−
267	275	int kvm_set_routing_entry(struct kvm *kvm,
268	276	struct kvm_kernel_irq_routing_entry *e,
269	277	const struct kvm_irq_routing_entry *ue)
@@ -423,18 +431,6 @@ void kvm_scan_ioapic_routes(struct kvm_vcpu *vcpu, · 153 unmodified lines
423	431	srcu_read_unlock(&kvm->irq_srcu, idx);
424	432	}
425	433
426		−int kvm_arch_set_irq(struct kvm_kernel_irq_routing_entry irq, struct kvm kvm,
427		− int irq_source_id, int level, bool line_status)
428		−{
429		− switch (irq->type) {
430		− case KVM_IRQ_ROUTING_HV_SINT:
431		− return kvm_hv_set_sint(irq, kvm, irq_source_id, level,
432		− line_status);
433		− default:
434		− return -EWOULDBLOCK;
435		− }
436		−}
437		−
438	434	void kvm_arch_irq_routing_update(struct kvm *kvm)
439	435	{
440	436	kvm_hv_irq_routing_update(kvm);

arch/x86/kvm/x86.c+34−13

@@ -210,7 +210,18 @@ static void kvm_on_user_return(struct user_return_notifier *urn) · 209 unmodified lines
210	210	struct kvm_shared_msrs *locals
211	211	= container_of(urn, struct kvm_shared_msrs, urn);
212	212	struct kvm_shared_msr_values *values;
	213	+ unsigned long flags;
213	214
	215	+ /*
	216	+ * Disabling irqs at this point since the following code could be
	217	+ * interrupted and executed through kvm_arch_hardware_disable()
	218	+ */
	219	+ local_irq_save(flags);
	220	+ if (locals->registered) {
	221	+ locals->registered = false;
	222	+ user_return_notifier_unregister(urn);
	223	+ }
	224	+ local_irq_restore(flags);
214	225	for (slot = 0; slot < shared_msrs_global.nr; ++slot) {
215	226	values = &locals->values[slot];
216	227	if (values->host != values->curr) {
@@ -218,8 +229,6 @@ static void kvm_on_user_return(struct user_return_notifier *urn) · 1 unmodified line
218	229	values->curr = values->host;
219	230	}
220	231	}
221		− locals->registered = false;
222		− user_return_notifier_unregister(urn);
223	232	}
224	233
225	234	static void shared_msr_update(unsigned slot, u32 msr)
@@ -1724,18 +1733,23 @@ static void kvm_gen_update_masterclock(struct kvm *kvm) · 1498 unmodified lines
1724	1733
1725	1734	static u64 __get_kvmclock_ns(struct kvm *kvm)
1726	1735	{
1727		− struct kvm_vcpu *vcpu = kvm_get_vcpu(kvm, 0);
1728	1736	struct kvm_arch *ka = &kvm->arch;
1729		− s64 ns;
	1737	+ struct pvclock_vcpu_time_info hv_clock;
1730	1738
1731		− if (vcpu->arch.hv_clock.flags & PVCLOCK_TSC_STABLE_BIT) {
1732		− u64 tsc = kvm_read_l1_tsc(vcpu, rdtsc());
1733		− ns = __pvclock_read_cycles(&vcpu->arch.hv_clock, tsc);
1734		− } else {
1735		− ns = ktime_get_boot_ns() + ka->kvmclock_offset;
	1739	+ spin_lock(&ka->pvclock_gtod_sync_lock);
	1740	+ if (!ka->use_master_clock) {
	1741	+ spin_unlock(&ka->pvclock_gtod_sync_lock);
	1742	+ return ktime_get_boot_ns() + ka->kvmclock_offset;
1736	1743	}
1737	1744
1738		− return ns;
	1745	+ hv_clock.tsc_timestamp = ka->master_cycle_now;
	1746	+ hv_clock.system_time = ka->master_kernel_ns + ka->kvmclock_offset;
	1747	+ spin_unlock(&ka->pvclock_gtod_sync_lock);
	1748	+
	1749	+ kvm_get_time_scale(NSEC_PER_SEC, __this_cpu_read(cpu_tsc_khz) * 1000LL,
	1750	+ &hv_clock.tsc_shift,
	1751	+ &hv_clock.tsc_to_system_mul);
	1752	+ return __pvclock_read_cycles(&hv_clock, rdtsc());
1739	1753	}
1740	1754
1741	1755	u64 get_kvmclock_ns(struct kvm *kvm)
@@ -2596,7 +2610,6 @@ int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext) · 854 unmodified lines
2596	2610	case KVM_CAP_PIT_STATE2:
2597	2611	case KVM_CAP_SET_IDENTITY_MAP_ADDR:
2598	2612	case KVM_CAP_XEN_HVM:
2599		− case KVM_CAP_ADJUST_CLOCK:
2600	2613	case KVM_CAP_VCPU_EVENTS:
2601	2614	case KVM_CAP_HYPERV:
2602	2615	case KVM_CAP_HYPERV_VAPIC:
@@ -2623,6 +2636,9 @@ int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext) · 20 unmodified lines
2623	2636	#endif
2624	2637	r = 1;
2625	2638	break;
	2639	+ case KVM_CAP_ADJUST_CLOCK:
	2640	+ r = KVM_CLOCK_TSC_STABLE;
	2641	+ break;
2626	2642	case KVM_CAP_X86_SMM:
2627	2643	/* SMBASE is usually relocated above 1M on modern chipsets,
2628	2644	* and SMM handlers might indeed rely on 4G segment limits,
@@ -3415,6 +3431,7 @@ long kvm_arch_vcpu_ioctl(struct file *filp, · 786 unmodified lines
3415	3431	};
3416	3432	case KVM_SET_VAPIC_ADDR: {
3417	3433	struct kvm_vapic_addr va;
	3434	+ int idx;
3418	3435
3419	3436	r = -EINVAL;
3420	3437	if (!lapic_in_kernel(vcpu))
@@ -3422,7 +3439,9 @@ long kvm_arch_vcpu_ioctl(struct file *filp, · 1 unmodified line
3422	3439	r = -EFAULT;
3423	3440	if (copy_from_user(&va, argp, sizeof va))
3424	3441	goto out;
	3442	+ idx = srcu_read_lock(&vcpu->kvm->srcu);
3425	3443	r = kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
	3444	+ srcu_read_unlock(&vcpu->kvm->srcu, idx);
3426	3445	break;
3427	3446	}
3428	3447	case KVM_X86_SETUP_MCE: {
@@ -4103,9 +4122,11 @@ long kvm_arch_vm_ioctl(struct file *filp, · 674 unmodified lines
4103	4122	struct kvm_clock_data user_ns;
4104	4123	u64 now_ns;
4105	4124
4106		− now_ns = get_kvmclock_ns(kvm);
	4125	+ local_irq_disable();
	4126	+ now_ns = __get_kvmclock_ns(kvm);
4107	4127	user_ns.clock = now_ns;
4108		− user_ns.flags = 0;
	4128	+ user_ns.flags = kvm->arch.use_master_clock ? KVM_CLOCK_TSC_STABLE : 0;
	4129	+ local_irq_enable();
4109	4130	memset(&user_ns.pad, 0, sizeof(user_ns.pad));
4110	4131
4111	4132	r = -EFAULT;

arch/x86/purgatory/Makefile+1−0

@@ -16,6 +16,7 @@ KCOV_INSTRUMENT := n · 15 unmodified lines
16	16
17	17	KBUILD_CFLAGS := -fno-strict-aliasing -Wall -Wstrict-prototypes -fno-zero-initialized-in-bss -fno-builtin -ffreestanding -c -MD -Os -mcmodel=large
18	18	KBUILD_CFLAGS += -m$(BITS)
	19	+KBUILD_CFLAGS += $(call cc-option,-fno-PIE)
19	20
20	21	$(obj)/purgatory.ro: $(PURGATORY_OBJS) FORCE
21	22	$(call if_changed,ld)

arch/xtensa/include/uapi/asm/unistd.h+8−1

@@ -767,7 +767,14 @@ __SYSCALL(346, sys_preadv2, 6) · 766 unmodified lines
767	767	#define __NR_pwritev2 347
768	768	__SYSCALL(347, sys_pwritev2, 6)
769	769
770		−#define __NR_syscall_count 348
	770	+#define __NR_pkey_mprotect 348
	771	+__SYSCALL(348, sys_pkey_mprotect, 4)
	772	+#define __NR_pkey_alloc 349
	773	+__SYSCALL(349, sys_pkey_alloc, 2)
	774	+#define __NR_pkey_free 350
	775	+__SYSCALL(350, sys_pkey_free, 1)
	776	+
	777	+#define __NR_syscall_count 351
771	778
772	779	/*
773	780	* sysxtensa syscall handler

arch/xtensa/kernel/time.c+7−7

@@ -172,10 +172,11 @@ void __init time_init(void) · 171 unmodified lines
172	172	{
173	173	of_clk_init(NULL);
174	174	#ifdef CONFIG_XTENSA_CALIBRATE_CCOUNT
175		− printk("Calibrating CPU frequency ");
	175	+ pr_info("Calibrating CPU frequency ");
176	176	calibrate_ccount();
177		− printk("%d.%02d MHz\n", (int)ccount_freq/1000000,
178		− (int)(ccount_freq/10000)%100);
	177	+ pr_cont("%d.%02d MHz\n",
	178	+ (int)ccount_freq / 1000000,
	179	+ (int)(ccount_freq / 10000) % 100);
179	180	#else
180	181	ccount_freq = CONFIG_XTENSA_CPU_CLOCK*1000000UL;
181	182	#endif
@@ -210,9 +211,8 @@ irqreturn_t timer_interrupt(int irq, void *dev_id) · 28 unmodified lines
210	211	void calibrate_delay(void)
211	212	{
212	213	loops_per_jiffy = ccount_freq / HZ;
213		− printk("Calibrating delay loop (skipped)... "
214		− "%lu.%02lu BogoMIPS preset\n",
215		− loops_per_jiffy/(1000000/HZ),
216		− (loops_per_jiffy/(10000/HZ)) % 100);
	214	+ pr_info("Calibrating delay loop (skipped)... %lu.%02lu BogoMIPS preset\n",
	215	+ loops_per_jiffy / (1000000 / HZ),
	216	+ (loops_per_jiffy / (10000 / HZ)) % 100);
217	217	}
218	218	#endif

arch/xtensa/kernel/traps.c+22−52

@@ -465,26 +465,25 @@ void show_regs(struct pt_regs * regs) · 464 unmodified lines
465	465
466	466	for (i = 0; i < 16; i++) {
467	467	if ((i % 8) == 0)
468		− printk(KERN_INFO "a%02d:", i);
469		− printk(KERN_CONT " %08lx", regs->areg[i]);
	468	+ pr_info("a%02d:", i);
	469	+ pr_cont(" %08lx", regs->areg[i]);
470	470	}
471		− printk(KERN_CONT "\n");
472		−
473		− printk("pc: %08lx, ps: %08lx, depc: %08lx, excvaddr: %08lx\n",
474		− regs->pc, regs->ps, regs->depc, regs->excvaddr);
475		− printk("lbeg: %08lx, lend: %08lx lcount: %08lx, sar: %08lx\n",
476		− regs->lbeg, regs->lend, regs->lcount, regs->sar);
	471	+ pr_cont("\n");
	472	+ pr_info("pc: %08lx, ps: %08lx, depc: %08lx, excvaddr: %08lx\n",
	473	+ regs->pc, regs->ps, regs->depc, regs->excvaddr);
	474	+ pr_info("lbeg: %08lx, lend: %08lx lcount: %08lx, sar: %08lx\n",
	475	+ regs->lbeg, regs->lend, regs->lcount, regs->sar);
477	476	if (user_mode(regs))
478		− printk("wb: %08lx, ws: %08lx, wmask: %08lx, syscall: %ld\n",
479		− regs->windowbase, regs->windowstart, regs->wmask,
480		− regs->syscall);
	477	+ pr_cont("wb: %08lx, ws: %08lx, wmask: %08lx, syscall: %ld\n",
	478	+ regs->windowbase, regs->windowstart, regs->wmask,
	479	+ regs->syscall);
481	480	}
482	481
483	482	static int show_trace_cb(struct stackframe frame, void data)
484	483	{
485	484	if (kernel_text_address(frame->pc)) {
486		− printk(" [<%08lx>] ", frame->pc);
487		− print_symbol("%s\n", frame->pc);
	485	+ pr_cont(" [<%08lx>]", frame->pc);
	486	+ print_symbol(" %s\n", frame->pc);
488	487	}
489	488	return 0;
490	489	}
@@ -494,19 +493,13 @@ void show_trace(struct task_struct task, unsigned long sp) · 3 unmodified lines
494	493	if (!sp)
495	494	sp = stack_pointer(task);
496	495
497		− printk("Call Trace:");
498		−#ifdef CONFIG_KALLSYMS
499		− printk("\n");
500		−#endif
	496	+ pr_info("Call Trace:\n");
501	497	walk_stackframe(sp, show_trace_cb, NULL);
502		− printk("\n");
	498	+#ifndef CONFIG_KALLSYMS
	499	+ pr_cont("\n");
	500	+#endif
503	501	}
504	502
505		−/*
506		− * This routine abuses get_user()/put_user() to reference pointers
507		− * with at least a bit of error checking ...
508		− */
509		−
510	503	static int kstack_depth_to_print = 24;
511	504
512	505	void show_stack(struct task_struct task, unsigned long sp)
@@ -518,52 +511,29 @@ void show_stack(struct task_struct task, unsigned long sp) · 5 unmodified lines
518	511	sp = stack_pointer(task);
519	512	stack = sp;
520	513
521		− printk("\nStack: ");
	514	+ pr_info("Stack:\n");
522	515
523	516	for (i = 0; i < kstack_depth_to_print; i++) {
524	517	if (kstack_end(sp))
525	518	break;
526		− if (i && ((i % 8) == 0))
527		− printk("\n ");
528		− printk("%08lx ", *sp++);
	519	+ pr_cont(" %08lx", *sp++);
	520	+ if (i % 8 == 7)
	521	+ pr_cont("\n");
529	522	}
530		− printk("\n");
531	523	show_trace(task, stack);
532	524	}
533	525
534		−void show_code(unsigned int *pc)
535		−{
536		− long i;
537		−
538		− printk("\nCode:");
539		−
540		− for(i = -3 ; i < 6 ; i++) {
541		− unsigned long insn;
542		− if (__get_user(insn, pc + i)) {
543		− printk(" (Bad address in pc)\n");
544		− break;
545		− }
546		− printk("%c%08lx%c",(i?' ':'<'),insn,(i?' ':'>'));
547		− }
548		−}
549		−
550	526	DEFINE_SPINLOCK(die_lock);
551	527
552	528	void die(const char * str, struct pt_regs * regs, long err)
553	529	{
554	530	static int die_counter;
555		− int nl = 0;
556	531
557	532	console_verbose();
558	533	spin_lock_irq(&die_lock);
559	534
560		− printk("%s: sig: %ld [#%d]\n", str, err, ++die_counter);
561		−#ifdef CONFIG_PREEMPT
562		− printk("PREEMPT ");
563		− nl = 1;
564		−#endif
565		− if (nl)
566		− printk("\n");
	535	+ pr_info("%s: sig: %ld [#%d]%s\n", str, err, ++die_counter,
	536	+ IS_ENABLED(CONFIG_PREEMPT) ? " PREEMPT" : "");
567	537	show_regs(regs);
568	538	if (!user_mode(regs))
569	539	show_stack(NULL, (unsigned long*)regs->areg[1]);

crypto/algif_hash.c+10−7

@@ -214,23 +214,26 @@ static int hash_recvmsg(struct socket sock, struct msghdr msg, size_t len, · 213 unmodified lines
214	214
215	215	ahash_request_set_crypt(&ctx->req, NULL, ctx->result, 0);
216	216
217		− if (ctx->more) {
	217	+ if (!result) {
	218	+ err = af_alg_wait_for_completion(
	219	+ crypto_ahash_init(&ctx->req),
	220	+ &ctx->completion);
	221	+ if (err)
	222	+ goto unlock;
	223	+ }
	224	+
	225	+ if (!result \|\| ctx->more) {
218	226	ctx->more = 0;
219	227	err = af_alg_wait_for_completion(crypto_ahash_final(&ctx->req),
220	228	&ctx->completion);
221	229	if (err)
222	230	goto unlock;
223		− } else if (!result) {
224		− err = af_alg_wait_for_completion(
225		− crypto_ahash_digest(&ctx->req),
226		− &ctx->completion);
227	231	}
228	232
229	233	err = memcpy_to_msg(msg, ctx->result, len);
230	234
231		− hash_free_result(sk, ctx);
232		−
233	235	unlock:
	236	+ hash_free_result(sk, ctx);
234	237	release_sock(sk);
235	238
236	239	return err ?: len;

drivers/acpi/acpica/tbfadt.c+4−6

@@ -480,19 +480,17 @@ static void acpi_tb_convert_fadt(void) · 479 unmodified lines
480	480	u32 i;
481	481
482	482	/*
483		− * For ACPI 1.0 FADTs (revision 1), ensure that reserved fields which
	483	+ * For ACPI 1.0 FADTs (revision 1 or 2), ensure that reserved fields which
484	484	* should be zero are indeed zero. This will workaround BIOSs that
485	485	* inadvertently place values in these fields.
486	486	*
487	487	* The ACPI 1.0 reserved fields that will be zeroed are the bytes located
488	488	* at offset 45, 55, 95, and the word located at offset 109, 110.
489	489	*
490		− * Note: The FADT revision value is unreliable because of BIOS errors.
491		− * The table length is instead used as the final word on the version.
492		− *
493		− * Note: FADT revision 3 is the ACPI 2.0 version of the FADT.
	490	+ * Note: The FADT revision value is unreliable. Only the length can be
	491	+ * trusted.
494	492	*/
495		− if (acpi_gbl_FADT.header.length <= ACPI_FADT_V3_SIZE) {
	493	+ if (acpi_gbl_FADT.header.length <= ACPI_FADT_V2_SIZE) {
496	494	acpi_gbl_FADT.preferred_profile = 0;
497	495	acpi_gbl_FADT.pstate_control = 0;
498	496	acpi_gbl_FADT.cst_control = 0;

drivers/char/ipmi/bt-bmc.c+2−2

@@ -484,7 +484,7 @@ static int bt_bmc_remove(struct platform_device *pdev) · 483 unmodified lines
484	484	}
485	485
486	486	static const struct of_device_id bt_bmc_match[] = {
487		− { .compatible = "aspeed,ast2400-bt-bmc" },
	487	+ { .compatible = "aspeed,ast2400-ibt-bmc" },
488	488	{ },
489	489	};
490	490
@@ -502,4 +502,4 @@ module_platform_driver(bt_bmc_driver); · 11 unmodified lines
502	502	MODULE_DEVICE_TABLE(of, bt_bmc_match);
503	503	MODULE_LICENSE("GPL");
504	504	MODULE_AUTHOR("Alistair Popple <alistair@popple.id.au>");
505		−MODULE_DESCRIPTION("Linux device interface to the BT interface");
	505	+MODULE_DESCRIPTION("Linux device interface to the IPMI BT interface");

drivers/crypto/caam/caamalg.c+10−1

@@ -137,7 +137,7 @@ static void dbg_dump_sg(const char level, const char prefix_str, · 136 unmodified lines
137	137	}
138	138
139	139	buf = it_page + it->offset;
140		− len = min(tlen, it->length);
	140	+ len = min_t(size_t, tlen, it->length);
141	141	print_hex_dump(level, prefix_str, prefix_type, rowsize,
142	142	groupsize, buf, len, ascii);
143	143	tlen -= len;
@@ -4583,6 +4583,15 @@ static int __init caam_algapi_init(void) · 4439 unmodified lines
4583	4583	if (!aes_inst && (alg_sel == OP_ALG_ALGSEL_AES))
4584	4584	continue;
4585	4585
	4586	+ /*
	4587	+ * Check support for AES modes not available
	4588	+ * on LP devices.
	4589	+ */
	4590	+ if ((cha_vid & CHA_ID_LS_AES_MASK) == CHA_ID_LS_AES_LP)
	4591	+ if ((alg->class1_alg_type & OP_ALG_AAI_MASK) ==
	4592	+ OP_ALG_AAI_XTS)
	4593	+ continue;
	4594	+
4586	4595	t_alg = caam_alg_alloc(alg);
4587	4596	if (IS_ERR(t_alg)) {
4588	4597	err = PTR_ERR(t_alg);

drivers/dma/Kconfig+1−0

@@ -306,6 +306,7 @@ config MMP_TDMA · 305 unmodified lines
306	306	depends on ARCH_MMP \|\| COMPILE_TEST
307	307	select DMA_ENGINE
308	308	select MMP_SRAM if ARCH_MMP
	309	+ select GENERIC_ALLOCATOR
309	310	help
310	311	Support the MMP Two-Channel DMA engine.
311	312	This engine used for MMP Audio DMA and pxa910 SQU.

drivers/dma/cppi41.c+26−5

@@ -317,6 +317,12 @@ static irqreturn_t cppi41_irq(int irq, void *data) · 316 unmodified lines
317	317
318	318	while (val) {
319	319	u32 desc, len;
	320	+ int error;
	321	+
	322	+ error = pm_runtime_get(cdd->ddev.dev);
	323	+ if (error < 0)
	324	+ dev_err(cdd->ddev.dev, "%s pm runtime get: %i\n",
	325	+ __func__, error);
320	326
321	327	q_num = __fls(val);
322	328	val &= ~(1 << q_num);
@@ -338,7 +344,6 @@ static irqreturn_t cppi41_irq(int irq, void *data) · 15 unmodified lines
338	344	dma_cookie_complete(&c->txd);
339	345	dmaengine_desc_get_callback_invoke(&c->txd, NULL);
340	346
341		− /* Paired with cppi41_dma_issue_pending */
342	347	pm_runtime_mark_last_busy(cdd->ddev.dev);
343	348	pm_runtime_put_autosuspend(cdd->ddev.dev);
344	349	}
@@ -362,8 +367,13 @@ static int cppi41_dma_alloc_chan_resources(struct dma_chan *chan) · 17 unmodified lines
362	367	int error;
363	368
364	369	error = pm_runtime_get_sync(cdd->ddev.dev);
365		− if (error < 0)
	370	+ if (error < 0) {
	371	+ dev_err(cdd->ddev.dev, "%s pm runtime get: %i\n",
	372	+ __func__, error);
	373	+ pm_runtime_put_noidle(cdd->ddev.dev);
	374	+
366	375	return error;
	376	+ }
367	377
368	378	dma_cookie_init(chan);
369	379	dma_async_tx_descriptor_init(&c->txd, chan);
@@ -385,8 +395,11 @@ static void cppi41_dma_free_chan_resources(struct dma_chan *chan) · 15 unmodified lines
385	395	int error;
386	396
387	397	error = pm_runtime_get_sync(cdd->ddev.dev);
388		− if (error < 0)
	398	+ if (error < 0) {
	399	+ pm_runtime_put_noidle(cdd->ddev.dev);
	400	+
389	401	return;
	402	+ }
390	403
391	404	WARN_ON(!list_empty(&cdd->pending));
392	405
@@ -460,9 +473,9 @@ static void cppi41_dma_issue_pending(struct dma_chan *chan) · 67 unmodified lines
460	473	struct cppi41_dd *cdd = c->cdd;
461	474	int error;
462	475
463		− /* PM runtime paired with dmaengine_desc_get_callback_invoke */
464	476	error = pm_runtime_get(cdd->ddev.dev);
465	477	if ((error != -EINPROGRESS) && error < 0) {
	478	+ pm_runtime_put_noidle(cdd->ddev.dev);
466	479	dev_err(cdd->ddev.dev, "Failed to pm_runtime_get: %i\n",
467	480	error);
468	481
@@ -473,6 +486,9 @@ static void cppi41_dma_issue_pending(struct dma_chan *chan) · 4 unmodified lines
473	486	push_desc_queue(c);
474	487	else
475	488	pending_desc(c);
	489	+
	490	+ pm_runtime_mark_last_busy(cdd->ddev.dev);
	491	+ pm_runtime_put_autosuspend(cdd->ddev.dev);
476	492	}
477	493
478	494	static u32 get_host_pd0(u32 length)
@@ -1059,8 +1075,8 @@ err_chans: · 580 unmodified lines
1059	1075	deinit_cppi41(dev, cdd);
1060	1076	err_init_cppi:
1061	1077	pm_runtime_dont_use_autosuspend(dev);
1062		− pm_runtime_put_sync(dev);
1063	1078	err_get_sync:
	1079	+ pm_runtime_put_sync(dev);
1064	1080	pm_runtime_disable(dev);
1065	1081	iounmap(cdd->usbss_mem);
1066	1082	iounmap(cdd->ctrl_mem);
@@ -1072,7 +1088,12 @@ err_get_sync: · 5 unmodified lines
1072	1088	static int cppi41_dma_remove(struct platform_device *pdev)
1073	1089	{
1074	1090	struct cppi41_dd *cdd = platform_get_drvdata(pdev);
	1091	+ int error;
1075	1092
	1093	+ error = pm_runtime_get_sync(&pdev->dev);
	1094	+ if (error < 0)
	1095	+ dev_err(&pdev->dev, "%s could not pm_runtime_get: %i\n",
	1096	+ __func__, error);
1076	1097	of_dma_controller_free(pdev->dev.of_node);
1077	1098	dma_async_device_unregister(&cdd->ddev);
1078	1099

drivers/dma/edma.c+1−0

@@ -1628,6 +1628,7 @@ static int edma_alloc_chan_resources(struct dma_chan *chan) · 1627 unmodified lines
1628	1628	if (echan->slot[0] < 0) {
1629	1629	dev_err(dev, "Entry slot allocation failed for channel %u\n",
1630	1630	EDMA_CHAN_SLOT(echan->ch_num));
	1631	+ ret = echan->slot[0];
1631	1632	goto err_slot;
1632	1633	}
1633	1634

drivers/dma/sun6i-dma.c+1−1

@@ -578,7 +578,7 @@ static struct dma_async_tx_descriptor *sun6i_dma_prep_dma_memcpy( · 577 unmodified lines
578	578
579	579	burst = convert_burst(8);
580	580	width = convert_buswidth(DMA_SLAVE_BUSWIDTH_4_BYTES);
581		− v_lli->cfg \|= DMA_CHAN_CFG_SRC_DRQ(DRQ_SDRAM) \|
	581	+ v_lli->cfg = DMA_CHAN_CFG_SRC_DRQ(DRQ_SDRAM) \|
582	582	DMA_CHAN_CFG_DST_DRQ(DRQ_SDRAM) \|
583	583	DMA_CHAN_CFG_DST_LINEAR_MODE \|
584	584	DMA_CHAN_CFG_SRC_LINEAR_MODE \|

drivers/gpio/Kconfig+0−4

@@ -22,10 +22,6 @@ menuconfig GPIOLIB · 21 unmodified lines
22	22
23	23	if GPIOLIB
24	24
25		−config GPIO_DEVRES
26		− def_bool y
27		− depends on HAS_IOMEM
28		−
29	25	config OF_GPIO
30	26	def_bool y
31	27	depends on OF

drivers/gpio/Makefile+1−1

@@ -2,7 +2,7 @@ · 1 unmodified line
2	2
3	3	ccflags-$(CONFIG_DEBUG_GPIO) += -DDEBUG
4	4
5		−obj-$(CONFIG_GPIO_DEVRES) += devres.o
	5	+obj-$(CONFIG_GPIOLIB) += devres.o
6	6	obj-$(CONFIG_GPIOLIB) += gpiolib.o
7	7	obj-$(CONFIG_GPIOLIB) += gpiolib-legacy.o
8	8	obj-$(CONFIG_OF_GPIO) += gpiolib-of.o

drivers/gpio/gpio-pca953x.c+2−2

@@ -372,14 +372,15 @@ static void pca953x_gpio_set_multiple(struct gpio_chip *gc, · 371 unmodified lines
372	372
373	373	bank_shift = fls((chip->gpio_chip.ngpio - 1) / BANK_SZ);
374	374
375		− memcpy(reg_val, chip->reg_output, NBANK(chip));
376	375	mutex_lock(&chip->i2c_lock);
	376	+ memcpy(reg_val, chip->reg_output, NBANK(chip));
377	377	for (bank = 0; bank < NBANK(chip); bank++) {
378	378	bank_mask = mask[bank / sizeof(*mask)] >>
379	379	((bank % sizeof(mask)) 8);
380	380	if (bank_mask) {
381	381	bank_val = bits[bank / sizeof(*bits)] >>
382	382	((bank % sizeof(bits)) 8);
	383	+ bank_val &= bank_mask;
383	384	reg_val[bank] = (reg_val[bank] & ~bank_mask) \| bank_val;
384	385	}
385	386	}
@@ -607,7 +608,6 @@ static int pca953x_irq_setup(struct pca953x_chip *chip, · 221 unmodified lines
607	608
608	609	if (client->irq && irq_base != -1
609	610	&& (chip->driver_data & PCA_INT)) {
610		−
611	611	ret = pca953x_read_regs(chip,
612	612	chip->regs->input, chip->irq_stat);
613	613	if (ret)

drivers/gpio/gpio-tc3589x.c+1−1

@@ -97,7 +97,7 @@ static int tc3589x_gpio_get_direction(struct gpio_chip *chip, · 96 unmodified lines
97	97	if (ret < 0)
98	98	return ret;
99	99
100		− return !!(ret & BIT(pos));
	100	+ return !(ret & BIT(pos));
101	101	}
102	102
103	103	static int tc3589x_gpio_set_single_ended(struct gpio_chip *chip,

drivers/gpio/gpiolib.c+5−2

@@ -2737,8 +2737,11 @@ int gpiochip_lock_as_irq(struct gpio_chip *chip, unsigned int offset) · 2736 unmodified lines
2737	2737	if (IS_ERR(desc))
2738	2738	return PTR_ERR(desc);
2739	2739
2740		− /* Flush direction if something changed behind our back */
2741		− if (chip->get_direction) {
	2740	+ /*
	2741	+ * If it's fast: flush the direction setting if something changed
	2742	+ * behind our back
	2743	+ */
	2744	+ if (!chip->can_sleep && chip->get_direction) {
2742	2745	int dir = chip->get_direction(chip, offset);
2743	2746
2744	2747	if (dir)

drivers/gpu/drm/amd/amdgpu/amdgpu.h+1−0

@@ -459,6 +459,7 @@ struct amdgpu_bo { · 458 unmodified lines
459	459	u64 metadata_flags;
460	460	void *metadata;
461	461	u32 metadata_size;
	462	+ unsigned prime_shared_count;
462	463	/* list of all virtual address to which this bo
463	464	* is associated to
464	465	*/

drivers/gpu/drm/amd/amdgpu/amdgpu_bo_list.c+1−1

@@ -132,7 +132,7 @@ static int amdgpu_bo_list_set(struct amdgpu_device *adev, · 131 unmodified lines
132	132	entry->priority = min(info[i].bo_priority,
133	133	AMDGPU_BO_LIST_MAX_PRIORITY);
134	134	entry->tv.bo = &entry->robj->tbo;
135		− entry->tv.shared = true;
	135	+ entry->tv.shared = !entry->robj->prime_shared_count;
136	136
137	137	if (entry->robj->prefered_domains == AMDGPU_GEM_DOMAIN_GDS)
138	138	gds_obj = entry->robj;

drivers/gpu/drm/amd/amdgpu/amdgpu_device.c+7−20

@@ -658,12 +658,10 @@ static bool amdgpu_vpost_needed(struct amdgpu_device *adev) · 657 unmodified lines
658	658	return false;
659	659
660	660	if (amdgpu_passthrough(adev)) {
661		− /* for FIJI: In whole GPU pass-through virtualization case
662		− * old smc fw won't clear some registers (e.g. MEM_SIZE, BIOS_SCRATCH)
663		− * so amdgpu_card_posted return false and driver will incorrectly skip vPost.
664		− * but if we force vPost do in pass-through case, the driver reload will hang.
665		− * whether doing vPost depends on amdgpu_card_posted if smc version is above
666		− * 00160e00 for FIJI.
	661	+ /* for FIJI: In whole GPU pass-through virtualization case, after VM reboot
	662	+ * some old smc fw still need driver do vPost otherwise gpu hang, while
	663	+ * those smc fw version above 22.15 doesn't have this flaw, so we force
	664	+ * vpost executed for smc version below 22.15
667	665	*/
668	666	if (adev->asic_type == CHIP_FIJI) {
669	667	int err;
@@ -674,22 +672,11 @@ static bool amdgpu_vpost_needed(struct amdgpu_device *adev) · 4 unmodified lines
674	672	return true;
675	673
676	674	fw_ver = ((uint32_t )adev->pm.fw->data + 69);
677		− if (fw_ver >= 0x00160e00)
678		− return !amdgpu_card_posted(adev);
	675	+ if (fw_ver < 0x00160e00)
	676	+ return true;
679	677	}
680		− } else {
681		− /* in bare-metal case, amdgpu_card_posted return false
682		− * after system reboot/boot, and return true if driver
683		− * reloaded.
684		− * we shouldn't do vPost after driver reload otherwise GPU
685		− * could hang.
686		− */
687		− if (amdgpu_card_posted(adev))
688		− return false;
689	678	}
690		−
691		− /* we assume vPost is neede for all other cases */
692		− return true;
	679	+ return !amdgpu_card_posted(adev);
693	680	}
694	681
695	682	/**

drivers/gpu/drm/amd/amdgpu/amdgpu_prime.c+19−1

@@ -74,20 +74,36 @@ amdgpu_gem_prime_import_sg_table(struct drm_device *dev, · 73 unmodified lines
74	74	if (ret)
75	75	return ERR_PTR(ret);
76	76
	77	+ bo->prime_shared_count = 1;
77	78	return &bo->gem_base;
78	79	}
79	80
80	81	int amdgpu_gem_prime_pin(struct drm_gem_object *obj)
81	82	{
82	83	struct amdgpu_bo *bo = gem_to_amdgpu_bo(obj);
83		− int ret = 0;
	84	+ long ret = 0;
84	85
85	86	ret = amdgpu_bo_reserve(bo, false);
86	87	if (unlikely(ret != 0))
87	88	return ret;
88	89
	90	+ /*
	91	+ * Wait for all shared fences to complete before we switch to future
	92	+ * use of exclusive fence on this prime shared bo.
	93	+ */
	94	+ ret = reservation_object_wait_timeout_rcu(bo->tbo.resv, true, false,
	95	+ MAX_SCHEDULE_TIMEOUT);
	96	+ if (unlikely(ret < 0)) {
	97	+ DRM_DEBUG_PRIME("Fence wait failed: %li\n", ret);
	98	+ amdgpu_bo_unreserve(bo);
	99	+ return ret;
	100	+ }
	101	+
89	102	/* pin buffer into GTT */
90	103	ret = amdgpu_bo_pin(bo, AMDGPU_GEM_DOMAIN_GTT, NULL);
	104	+ if (likely(ret == 0))
	105	+ bo->prime_shared_count++;
	106	+
91	107	amdgpu_bo_unreserve(bo);
92	108	return ret;
93	109	}
@@ -102,6 +118,8 @@ void amdgpu_gem_prime_unpin(struct drm_gem_object *obj) · 8 unmodified lines
102	118	return;
103	119
104	120	amdgpu_bo_unpin(bo);
	121	+ if (bo->prime_shared_count)
	122	+ bo->prime_shared_count--;
105	123	amdgpu_bo_unreserve(bo);
106	124	}
107	125

drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c+0−2

@@ -1469,8 +1469,6 @@ static int smu7_get_evv_voltages(struct pp_hwmgr *hwmgr) · 1468 unmodified lines
1469	1469	table_info->vddgfx_lookup_table, vv_id, &sclk)) {
1470	1470	if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps,
1471	1471	PHM_PlatformCaps_ClockStretcher)) {
1472		− if (table_info == NULL)
1473		− return -EINVAL;
1474	1472	sclk_table = table_info->vdd_dep_on_sclk;
1475	1473
1476	1474	for (j = 1; j < sclk_table->count; j++) {

drivers/gpu/drm/arc/arcpgu_hdmi.c+17−142

@@ -14,170 +14,45 @@ · 13 unmodified lines
14	14	*
15	15	*/
16	16
17		−#include <drm/drm_crtc_helper.h>
	17	+#include <drm/drm_crtc.h>
18	18	#include <drm/drm_encoder_slave.h>
19		−#include <drm/drm_atomic_helper.h>
20	19
21	20	#include "arcpgu.h"
22	21
23		−struct arcpgu_drm_connector {
24		− struct drm_connector connector;
25		− struct drm_encoder_slave *encoder_slave;
26		−};
27		−
28		−static int arcpgu_drm_connector_get_modes(struct drm_connector *connector)
29		−{
30		− const struct drm_encoder_slave_funcs *sfuncs;
31		− struct drm_encoder_slave *slave;
32		− struct arcpgu_drm_connector *con =
33		− container_of(connector, struct arcpgu_drm_connector, connector);
34		−
35		− slave = con->encoder_slave;
36		− if (slave == NULL) {
37		− dev_err(connector->dev->dev,
38		− "connector_get_modes: cannot find slave encoder for connector\n");
39		− return 0;
40		− }
41		−
42		− sfuncs = slave->slave_funcs;
43		− if (sfuncs->get_modes == NULL)
44		− return 0;
45		−
46		− return sfuncs->get_modes(&slave->base, connector);
47		−}
48		−
49		−static enum drm_connector_status
50		−arcpgu_drm_connector_detect(struct drm_connector *connector, bool force)
51		−{
52		− enum drm_connector_status status = connector_status_unknown;
53		− const struct drm_encoder_slave_funcs *sfuncs;
54		− struct drm_encoder_slave *slave;
55		−
56		− struct arcpgu_drm_connector *con =
57		− container_of(connector, struct arcpgu_drm_connector, connector);
58		−
59		− slave = con->encoder_slave;
60		− if (slave == NULL) {
61		− dev_err(connector->dev->dev,
62		− "connector_detect: cannot find slave encoder for connector\n");
63		− return status;
64		− }
65		−
66		− sfuncs = slave->slave_funcs;
67		− if (sfuncs && sfuncs->detect)
68		− return sfuncs->detect(&slave->base, connector);
69		−
70		− dev_err(connector->dev->dev, "connector_detect: could not detect slave funcs\n");
71		− return status;
72		−}
73		−
74		−static void arcpgu_drm_connector_destroy(struct drm_connector *connector)
75		−{
76		− drm_connector_unregister(connector);
77		− drm_connector_cleanup(connector);
78		−}
79		−
80		−static const struct drm_connector_helper_funcs
81		−arcpgu_drm_connector_helper_funcs = {
82		− .get_modes = arcpgu_drm_connector_get_modes,
83		−};
84		−
85		−static const struct drm_connector_funcs arcpgu_drm_connector_funcs = {
86		− .dpms = drm_helper_connector_dpms,
87		− .reset = drm_atomic_helper_connector_reset,
88		− .detect = arcpgu_drm_connector_detect,
89		− .fill_modes = drm_helper_probe_single_connector_modes,
90		− .destroy = arcpgu_drm_connector_destroy,
91		− .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
92		− .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
93		−};
94		−
95		−static struct drm_encoder_helper_funcs arcpgu_drm_encoder_helper_funcs = {
96		− .dpms = drm_i2c_encoder_dpms,
97		− .mode_fixup = drm_i2c_encoder_mode_fixup,
98		− .mode_set = drm_i2c_encoder_mode_set,
99		− .prepare = drm_i2c_encoder_prepare,
100		− .commit = drm_i2c_encoder_commit,
101		− .detect = drm_i2c_encoder_detect,
102		−};
103		−
104	22	static struct drm_encoder_funcs arcpgu_drm_encoder_funcs = {
105	23	.destroy = drm_encoder_cleanup,
106	24	};
107	25
108	26	int arcpgu_drm_hdmi_init(struct drm_device drm, struct device_node np)
109	27	{
110		− struct arcpgu_drm_connector *arcpgu_connector;
111		− struct drm_i2c_encoder_driver *driver;
112		− struct drm_encoder_slave *encoder;
113		− struct drm_connector *connector;
114		− struct i2c_client *i2c_slave;
115		− int ret;
	28	+ struct drm_encoder *encoder;
	29	+ struct drm_bridge *bridge;
	30	+
	31	+ int ret = 0;
116	32
117	33	encoder = devm_kzalloc(drm->dev, sizeof(*encoder), GFP_KERNEL);
118	34	if (encoder == NULL)
119	35	return -ENOMEM;
120	36
121		− i2c_slave = of_find_i2c_device_by_node(np);
122		− if (!i2c_slave \|\| !i2c_get_clientdata(i2c_slave)) {
123		− dev_err(drm->dev, "failed to find i2c slave encoder\n");
124		− return -EPROBE_DEFER;
125		− }
126		−
127		− if (i2c_slave->dev.driver == NULL) {
128		− dev_err(drm->dev, "failed to find i2c slave driver\n");
	37	+ /* Locate drm bridge from the hdmi encoder DT node */
	38	+ bridge = of_drm_find_bridge(np);
	39	+ if (!bridge)
129	40	return -EPROBE_DEFER;
130		− }
131	41
132		− driver =
133		− to_drm_i2c_encoder_driver(to_i2c_driver(i2c_slave->dev.driver));
134		− ret = driver->encoder_init(i2c_slave, drm, encoder);
135		− if (ret) {
136		− dev_err(drm->dev, "failed to initialize i2c encoder slave\n");
137		− return ret;
138		− }
139		−
140		− encoder->base.possible_crtcs = 1;
141		− encoder->base.possible_clones = 0;
142		− ret = drm_encoder_init(drm, &encoder->base, &arcpgu_drm_encoder_funcs,
	42	+ encoder->possible_crtcs = 1;
	43	+ encoder->possible_clones = 0;
	44	+ ret = drm_encoder_init(drm, encoder, &arcpgu_drm_encoder_funcs,
143	45	DRM_MODE_ENCODER_TMDS, NULL);
144	46	if (ret)
145	47	return ret;
146	48
147		− drm_encoder_helper_add(&encoder->base,
148		− &arcpgu_drm_encoder_helper_funcs);
149		−
150		− arcpgu_connector = devm_kzalloc(drm->dev, sizeof(*arcpgu_connector),
151		− GFP_KERNEL);
152		− if (!arcpgu_connector) {
153		− ret = -ENOMEM;
154		− goto error_encoder_cleanup;
155		− }
156		−
157		− connector = &arcpgu_connector->connector;
158		− drm_connector_helper_add(connector, &arcpgu_drm_connector_helper_funcs);
159		− ret = drm_connector_init(drm, connector, &arcpgu_drm_connector_funcs,
160		− DRM_MODE_CONNECTOR_HDMIA);
161		− if (ret < 0) {
162		− dev_err(drm->dev, "failed to initialize drm connector\n");
163		− goto error_encoder_cleanup;
164		− }
	49	+ /* Link drm_bridge to encoder */
	50	+ bridge->encoder = encoder;
	51	+ encoder->bridge = bridge;
165	52
166		− ret = drm_mode_connector_attach_encoder(connector, &encoder->base);
167		− if (ret < 0) {
168		− dev_err(drm->dev, "could not attach connector to encoder\n");
169		− drm_connector_unregister(connector);
170		− goto error_connector_cleanup;
171		− }
172		−
173		− arcpgu_connector->encoder_slave = encoder;
174		−
175		− return 0;
176		−
177		−error_connector_cleanup:
178		− drm_connector_cleanup(connector);
	53	+ ret = drm_bridge_attach(drm, bridge);
	54	+ if (ret)
	55	+ drm_encoder_cleanup(encoder);
179	56
180		−error_encoder_cleanup:
181		− drm_encoder_cleanup(&encoder->base);
182	57	return ret;
183	58	}

drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_crtc.c+11−2

@@ -25,8 +25,13 @@ · 24 unmodified lines
25	25	static void fsl_dcu_drm_crtc_atomic_flush(struct drm_crtc *crtc,
26	26	struct drm_crtc_state *old_crtc_state)
27	27	{
	28	+ struct drm_device *dev = crtc->dev;
	29	+ struct fsl_dcu_drm_device *fsl_dev = dev->dev_private;
28	30	struct drm_pending_vblank_event *event = crtc->state->event;
29	31
	32	+ regmap_write(fsl_dev->regmap,
	33	+ DCU_UPDATE_MODE, DCU_UPDATE_MODE_READREG);
	34	+
30	35	if (event) {
31	36	crtc->state->event = NULL;
32	37
@@ -39,11 +44,15 @@ static void fsl_dcu_drm_crtc_atomic_flush(struct drm_crtc *crtc, · 6 unmodified lines
39	44	}
40	45	}
41	46
42		−static void fsl_dcu_drm_disable_crtc(struct drm_crtc *crtc)
	47	+static void fsl_dcu_drm_crtc_atomic_disable(struct drm_crtc *crtc,
	48	+ struct drm_crtc_state *old_crtc_state)
43	49	{
44	50	struct drm_device *dev = crtc->dev;
45	51	struct fsl_dcu_drm_device *fsl_dev = dev->dev_private;
46	52
	53	+ /* always disable planes on the CRTC */
	54	+ drm_atomic_helper_disable_planes_on_crtc(old_crtc_state, true);
	55	+
47	56	drm_crtc_vblank_off(crtc);
48	57
49	58	regmap_update_bits(fsl_dev->regmap, DCU_DCU_MODE,
@@ -122,8 +131,8 @@ static void fsl_dcu_drm_crtc_mode_set_nofb(struct drm_crtc *crtc) · 72 unmodified lines
122	131	}
123	132
124	133	static const struct drm_crtc_helper_funcs fsl_dcu_drm_crtc_helper_funcs = {
	134	+ .atomic_disable = fsl_dcu_drm_crtc_atomic_disable,
125	135	.atomic_flush = fsl_dcu_drm_crtc_atomic_flush,
126		− .disable = fsl_dcu_drm_disable_crtc,
127	136	.enable = fsl_dcu_drm_crtc_enable,
128	137	.mode_set_nofb = fsl_dcu_drm_crtc_mode_set_nofb,
129	138	};

drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.c+0−4

@@ -59,8 +59,6 @@ static int fsl_dcu_drm_irq_init(struct drm_device *dev) · 58 unmodified lines
59	59
60	60	regmap_write(fsl_dev->regmap, DCU_INT_STATUS, 0);
61	61	regmap_write(fsl_dev->regmap, DCU_INT_MASK, ~0);
62		− regmap_write(fsl_dev->regmap, DCU_UPDATE_MODE,
63		− DCU_UPDATE_MODE_READREG);
64	62
65	63	return ret;
66	64	}
@@ -139,8 +137,6 @@ static irqreturn_t fsl_dcu_drm_irq(int irq, void *arg) · 72 unmodified lines
139	137	drm_handle_vblank(dev, 0);
140	138
141	139	regmap_write(fsl_dev->regmap, DCU_INT_STATUS, int_status);
142		− regmap_write(fsl_dev->regmap, DCU_UPDATE_MODE,
143		− DCU_UPDATE_MODE_READREG);
144	140
145	141	return IRQ_HANDLED;
146	142	}

drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_plane.c+0−5

@@ -160,11 +160,6 @@ static void fsl_dcu_drm_plane_atomic_update(struct drm_plane *plane, · 159 unmodified lines
160	160	DCU_LAYER_POST_SKIP(0) \|
161	161	DCU_LAYER_PRE_SKIP(0));
162	162	}
163		− regmap_update_bits(fsl_dev->regmap, DCU_DCU_MODE,
164		− DCU_MODE_DCU_MODE_MASK,
165		− DCU_MODE_DCU_MODE(DCU_MODE_NORMAL));
166		− regmap_write(fsl_dev->regmap,
167		− DCU_UPDATE_MODE, DCU_UPDATE_MODE_READREG);
168	163
169	164	return;
170	165	}

drivers/gpu/drm/i915/i915_gem_execbuffer.c+8−0

@@ -1281,6 +1281,12 @@ i915_gem_validate_context(struct drm_device dev, struct drm_file file, · 1280 unmodified lines
1281	1281	return ctx;
1282	1282	}
1283	1283
	1284	+static bool gpu_write_needs_clflush(struct drm_i915_gem_object *obj)
	1285	+{
	1286	+ return !(obj->cache_level == I915_CACHE_NONE \|\|
	1287	+ obj->cache_level == I915_CACHE_WT);
	1288	+}
	1289	+
1284	1290	void i915_vma_move_to_active(struct i915_vma *vma,
1285	1291	struct drm_i915_gem_request *req,
1286	1292	unsigned int flags)
@@ -1311,6 +1317,8 @@ void i915_vma_move_to_active(struct i915_vma *vma, · 24 unmodified lines
1311	1317
1312	1318	/* update for the implicit flush after a batch */
1313	1319	obj->base.write_domain &= ~I915_GEM_GPU_DOMAINS;
	1320	+ if (!obj->cache_dirty && gpu_write_needs_clflush(obj))
	1321	+ obj->cache_dirty = true;
1314	1322	}
1315	1323
1316	1324	if (flags & EXEC_OBJECT_NEEDS_FENCE)

drivers/gpu/drm/i915/intel_bios.c+22−8

@@ -1143,7 +1143,7 @@ static void parse_ddi_port(struct drm_i915_private *dev_priv, enum port port, · 1142 unmodified lines
1143	1143	if (!child)
1144	1144	return;
1145	1145
1146		− aux_channel = child->raw[25];
	1146	+ aux_channel = child->common.aux_channel;
1147	1147	ddc_pin = child->common.ddc_pin;
1148	1148
1149	1149	is_dvi = child->common.device_type & DEVICE_TYPE_TMDS_DVI_SIGNALING;
@@ -1673,7 +1673,8 @@ bool intel_bios_is_port_edp(struct drm_i915_private *dev_priv, enum port port) · 523 unmodified lines
1673	1673	return false;
1674	1674	}
1675	1675
1676		−bool intel_bios_is_port_dp_dual_mode(struct drm_i915_private *dev_priv, enum port port)
	1676	+static bool child_dev_is_dp_dual_mode(const union child_device_config *p_child,
	1677	+ enum port port)
1677	1678	{
1678	1679	static const struct {
1679	1680	u16 dp, hdmi;
@@ -1687,22 +1688,35 @@ bool intel_bios_is_port_dp_dual_mode(struct drm_i915_private *dev_priv, enum por · 7 unmodified lines
1687	1688	[PORT_D] = { DVO_PORT_DPD, DVO_PORT_HDMID, },
1688	1689	[PORT_E] = { DVO_PORT_DPE, DVO_PORT_HDMIE, },
1689	1690	};
1690		− int i;
1691	1691
1692	1692	if (port == PORT_A \|\| port >= ARRAY_SIZE(port_mapping))
1693	1693	return false;
1694	1694
1695		− if (!dev_priv->vbt.child_dev_num)
	1695	+ if ((p_child->common.device_type & DEVICE_TYPE_DP_DUAL_MODE_BITS) !=
	1696	+ (DEVICE_TYPE_DP_DUAL_MODE & DEVICE_TYPE_DP_DUAL_MODE_BITS))
1696	1697	return false;
1697	1698
	1699	+ if (p_child->common.dvo_port == port_mapping[port].dp)
	1700	+ return true;
	1701	+
	1702	+ /* Only accept a HDMI dvo_port as DP++ if it has an AUX channel */
	1703	+ if (p_child->common.dvo_port == port_mapping[port].hdmi &&
	1704	+ p_child->common.aux_channel != 0)
	1705	+ return true;
	1706	+
	1707	+ return false;
	1708	+}
	1709	+
	1710	+bool intel_bios_is_port_dp_dual_mode(struct drm_i915_private *dev_priv,
	1711	+ enum port port)
	1712	+{
	1713	+ int i;
	1714	+
1698	1715	for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {
1699	1716	const union child_device_config *p_child =
1700	1717	&dev_priv->vbt.child_dev[i];
1701	1718
1702		− if ((p_child->common.dvo_port == port_mapping[port].dp \|\|
1703		− p_child->common.dvo_port == port_mapping[port].hdmi) &&
1704		− (p_child->common.device_type & DEVICE_TYPE_DP_DUAL_MODE_BITS) ==
1705		− (DEVICE_TYPE_DP_DUAL_MODE & DEVICE_TYPE_DP_DUAL_MODE_BITS))
	1719	+ if (child_dev_is_dp_dual_mode(p_child, port))
1706	1720	return true;
1707	1721	}
1708	1722

drivers/gpu/drm/i915/intel_dp.c+0−10

@@ -4463,21 +4463,11 @@ static enum drm_connector_status · 4462 unmodified lines
4463	4463	intel_dp_detect(struct drm_connector *connector, bool force)
4464	4464	{
4465	4465	struct intel_dp *intel_dp = intel_attached_dp(connector);
4466		− struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp);
4467		− struct intel_encoder *intel_encoder = &intel_dig_port->base;
4468	4466	enum drm_connector_status status = connector->status;
4469	4467
4470	4468	DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
4471	4469	connector->base.id, connector->name);
4472	4470
4473		− if (intel_dp->is_mst) {
4474		− /* MST devices are disconnected from a monitor POV */
4475		− intel_dp_unset_edid(intel_dp);
4476		− if (intel_encoder->type != INTEL_OUTPUT_EDP)
4477		− intel_encoder->type = INTEL_OUTPUT_DP;
4478		− return connector_status_disconnected;
4479		− }
4480		−
4481	4471	/* If full detect is not performed yet, do a full detect */
4482	4472	if (!intel_dp->detect_done)
4483	4473	status = intel_dp_long_pulse(intel_dp->attached_connector);

drivers/gpu/drm/i915/intel_sprite.c+1−1

@@ -358,7 +358,7 @@ vlv_update_plane(struct drm_plane *dplane, · 357 unmodified lines
358	358	int plane = intel_plane->plane;
359	359	u32 sprctl;
360	360	u32 sprsurf_offset, linear_offset;
361		− unsigned int rotation = dplane->state->rotation;
	361	+ unsigned int rotation = plane_state->base.rotation;
362	362	const struct drm_intel_sprite_colorkey *key = &plane_state->ckey;
363	363	int crtc_x = plane_state->base.dst.x1;
364	364	int crtc_y = plane_state->base.dst.y1;

drivers/gpu/drm/i915/intel_vbt_defs.h+2−1

@@ -280,7 +280,8 @@ struct common_child_dev_config { · 279 unmodified lines
280	280	u8 dp_support:1;
281	281	u8 tmds_support:1;
282	282	u8 support_reserved:5;
283		− u8 not_common3[12];
	283	+ u8 aux_channel;
	284	+ u8 not_common3[11];
284	285	u8 iboost_level;
285	286	} __packed;
286	287

drivers/gpu/drm/mediatek/mtk_disp_ovl.c+1−0

@@ -80,6 +80,7 @@ static void mtk_ovl_enable_vblank(struct mtk_ddp_comp *comp, · 79 unmodified lines
80	80	ddp_comp);
81	81
82	82	priv->crtc = crtc;
	83	+ writel(0x0, comp->regs + DISP_REG_OVL_INTSTA);
83	84	writel_relaxed(OVL_FME_CPL_INT, comp->regs + DISP_REG_OVL_INTEN);
84	85	}
85	86

drivers/gpu/drm/mediatek/mtk_dpi.c+7−2

@@ -432,11 +432,16 @@ static int mtk_dpi_set_display_mode(struct mtk_dpi *dpi, · 431 unmodified lines
432	432	unsigned long pll_rate;
433	433	unsigned int factor;
434	434
	435	+ /* let pll_rate can fix the valid range of tvdpll (1G~2GHz) */
435	436	pix_rate = 1000UL * mode->clock;
436		− if (mode->clock <= 74000)
	437	+ if (mode->clock <= 27000)
	438	+ factor = 16 * 3;
	439	+ else if (mode->clock <= 84000)
437	440	factor = 8 * 3;
438		− else
	441	+ else if (mode->clock <= 167000)
439	442	factor = 4 * 3;
	443	+ else
	444	+ factor = 2 * 3;
440	445	pll_rate = pix_rate * factor;
441	446
442	447	dev_dbg(dpi->dev, "Want PLL %lu Hz, pixel clock %lu Hz\n",

drivers/gpu/drm/mediatek/mtk_hdmi.c+11−6

@@ -1133,12 +1133,6 @@ static int mtk_hdmi_output_set_display_mode(struct mtk_hdmi *hdmi, · 1132 unmodified lines
1133	1133	phy_power_on(hdmi->phy);
1134	1134	mtk_hdmi_aud_output_config(hdmi, mode);
1135	1135
1136		− mtk_hdmi_setup_audio_infoframe(hdmi);
1137		− mtk_hdmi_setup_avi_infoframe(hdmi, mode);
1138		− mtk_hdmi_setup_spd_infoframe(hdmi, "mediatek", "On-chip HDMI");
1139		− if (mode->flags & DRM_MODE_FLAG_3D_MASK)
1140		− mtk_hdmi_setup_vendor_specific_infoframe(hdmi, mode);
1141		−
1142	1136	mtk_hdmi_hw_vid_black(hdmi, false);
1143	1137	mtk_hdmi_hw_aud_unmute(hdmi);
1144	1138	mtk_hdmi_hw_send_av_unmute(hdmi);
@@ -1401,6 +1395,16 @@ static void mtk_hdmi_bridge_pre_enable(struct drm_bridge *bridge) · 256 unmodified lines
1401	1395	hdmi->powered = true;
1402	1396	}
1403	1397
	1398	+static void mtk_hdmi_send_infoframe(struct mtk_hdmi *hdmi,
	1399	+ struct drm_display_mode *mode)
	1400	+{
	1401	+ mtk_hdmi_setup_audio_infoframe(hdmi);
	1402	+ mtk_hdmi_setup_avi_infoframe(hdmi, mode);
	1403	+ mtk_hdmi_setup_spd_infoframe(hdmi, "mediatek", "On-chip HDMI");
	1404	+ if (mode->flags & DRM_MODE_FLAG_3D_MASK)
	1405	+ mtk_hdmi_setup_vendor_specific_infoframe(hdmi, mode);
	1406	+}
	1407	+
1404	1408	static void mtk_hdmi_bridge_enable(struct drm_bridge *bridge)
1405	1409	{
1406	1410	struct mtk_hdmi *hdmi = hdmi_ctx_from_bridge(bridge);
@@ -1409,6 +1413,7 @@ static void mtk_hdmi_bridge_enable(struct drm_bridge *bridge) · 2 unmodified lines
1409	1413	clk_prepare_enable(hdmi->clk[MTK_HDMI_CLK_HDMI_PLL]);
1410	1414	clk_prepare_enable(hdmi->clk[MTK_HDMI_CLK_HDMI_PIXEL]);
1411	1415	phy_power_on(hdmi->phy);
	1416	+ mtk_hdmi_send_infoframe(hdmi, &hdmi->mode);
1412	1417
1413	1418	hdmi->enabled = true;
1414	1419	}

drivers/gpu/drm/mediatek/mtk_mt8173_hdmi_phy.c+30−12

@@ -265,6 +265,9 @@ static int mtk_hdmi_pll_set_rate(struct clk_hw *hw, unsigned long rate, · 264 unmodified lines
265	265	struct mtk_hdmi_phy *hdmi_phy = to_mtk_hdmi_phy(hw);
266	266	unsigned int pre_div;
267	267	unsigned int div;
	268	+ unsigned int pre_ibias;
	269	+ unsigned int hdmi_ibias;
	270	+ unsigned int imp_en;
268	271
269	272	dev_dbg(hdmi_phy->dev, "%s: %lu Hz, parent: %lu Hz\n", __func__,
270	273	rate, parent_rate);
@@ -298,18 +301,31 @@ static int mtk_hdmi_pll_set_rate(struct clk_hw *hw, unsigned long rate, · 27 unmodified lines
298	301	(0x1 << PLL_BR_SHIFT),
299	302	RG_HDMITX_PLL_BP \| RG_HDMITX_PLL_BC \|
300	303	RG_HDMITX_PLL_BR);
301		− mtk_hdmi_phy_clear_bits(hdmi_phy, HDMI_CON3, RG_HDMITX_PRD_IMP_EN);
	304	+ if (rate < 165000000) {
	305	+ mtk_hdmi_phy_clear_bits(hdmi_phy, HDMI_CON3,
	306	+ RG_HDMITX_PRD_IMP_EN);
	307	+ pre_ibias = 0x3;
	308	+ imp_en = 0x0;
	309	+ hdmi_ibias = hdmi_phy->ibias;
	310	+ } else {
	311	+ mtk_hdmi_phy_set_bits(hdmi_phy, HDMI_CON3,
	312	+ RG_HDMITX_PRD_IMP_EN);
	313	+ pre_ibias = 0x6;
	314	+ imp_en = 0xf;
	315	+ hdmi_ibias = hdmi_phy->ibias_up;
	316	+ }
302	317	mtk_hdmi_phy_mask(hdmi_phy, HDMI_CON4,
303		− (0x3 << PRD_IBIAS_CLK_SHIFT) \|
304		− (0x3 << PRD_IBIAS_D2_SHIFT) \|
305		− (0x3 << PRD_IBIAS_D1_SHIFT) \|
306		− (0x3 << PRD_IBIAS_D0_SHIFT),
	318	+ (pre_ibias << PRD_IBIAS_CLK_SHIFT) \|
	319	+ (pre_ibias << PRD_IBIAS_D2_SHIFT) \|
	320	+ (pre_ibias << PRD_IBIAS_D1_SHIFT) \|
	321	+ (pre_ibias << PRD_IBIAS_D0_SHIFT),
307	322	RG_HDMITX_PRD_IBIAS_CLK \|
308	323	RG_HDMITX_PRD_IBIAS_D2 \|
309	324	RG_HDMITX_PRD_IBIAS_D1 \|
310	325	RG_HDMITX_PRD_IBIAS_D0);
311	326	mtk_hdmi_phy_mask(hdmi_phy, HDMI_CON3,
312		− (0x0 << DRV_IMP_EN_SHIFT), RG_HDMITX_DRV_IMP_EN);
	327	+ (imp_en << DRV_IMP_EN_SHIFT),
	328	+ RG_HDMITX_DRV_IMP_EN);
313	329	mtk_hdmi_phy_mask(hdmi_phy, HDMI_CON6,
314	330	(hdmi_phy->drv_imp_clk << DRV_IMP_CLK_SHIFT) \|
315	331	(hdmi_phy->drv_imp_d2 << DRV_IMP_D2_SHIFT) \|
@@ -318,12 +334,14 @@ static int mtk_hdmi_pll_set_rate(struct clk_hw *hw, unsigned long rate, · 2 unmodified lines
318	334	RG_HDMITX_DRV_IMP_CLK \| RG_HDMITX_DRV_IMP_D2 \|
319	335	RG_HDMITX_DRV_IMP_D1 \| RG_HDMITX_DRV_IMP_D0);
320	336	mtk_hdmi_phy_mask(hdmi_phy, HDMI_CON5,
321		− (hdmi_phy->ibias << DRV_IBIAS_CLK_SHIFT) \|
322		− (hdmi_phy->ibias << DRV_IBIAS_D2_SHIFT) \|
323		− (hdmi_phy->ibias << DRV_IBIAS_D1_SHIFT) \|
324		− (hdmi_phy->ibias << DRV_IBIAS_D0_SHIFT),
325		− RG_HDMITX_DRV_IBIAS_CLK \| RG_HDMITX_DRV_IBIAS_D2 \|
326		− RG_HDMITX_DRV_IBIAS_D1 \| RG_HDMITX_DRV_IBIAS_D0);
	337	+ (hdmi_ibias << DRV_IBIAS_CLK_SHIFT) \|
	338	+ (hdmi_ibias << DRV_IBIAS_D2_SHIFT) \|
	339	+ (hdmi_ibias << DRV_IBIAS_D1_SHIFT) \|
	340	+ (hdmi_ibias << DRV_IBIAS_D0_SHIFT),
	341	+ RG_HDMITX_DRV_IBIAS_CLK \|
	342	+ RG_HDMITX_DRV_IBIAS_D2 \|
	343	+ RG_HDMITX_DRV_IBIAS_D1 \|
	344	+ RG_HDMITX_DRV_IBIAS_D0);
327	345	return 0;
328	346	}
329	347

drivers/gpu/drm/sun4i/sun4i_drv.c+2−2

@@ -142,9 +142,9 @@ static int sun4i_drv_bind(struct device *dev) · 141 unmodified lines
142	142
143	143	/* Create our layers */
144	144	drv->layers = sun4i_layers_init(drm);
145		− if (!drv->layers) {
	145	+ if (IS_ERR(drv->layers)) {
146	146	dev_err(drm->dev, "Couldn't create the planes\n");
147		− ret = -EINVAL;
	147	+ ret = PTR_ERR(drv->layers);
148	148	goto free_drm;
149	149	}
150	150

drivers/gpu/drm/sun4i/sun4i_rgb.c+8−12

@@ -152,15 +152,13 @@ static void sun4i_rgb_encoder_enable(struct drm_encoder *encoder) · 151 unmodified lines
152	152
153	153	DRM_DEBUG_DRIVER("Enabling RGB output\n");
154	154
155		− if (!IS_ERR(tcon->panel)) {
	155	+ if (!IS_ERR(tcon->panel))
156	156	drm_panel_prepare(tcon->panel);
157		− drm_panel_enable(tcon->panel);
158		− }
159		−
160		− /* encoder->bridge can be NULL; drm_bridge_enable checks for it */
161		− drm_bridge_enable(encoder->bridge);
162	157
163	158	sun4i_tcon_channel_enable(tcon, 0);
	159	+
	160	+ if (!IS_ERR(tcon->panel))
	161	+ drm_panel_enable(tcon->panel);
164	162	}
165	163
166	164	static void sun4i_rgb_encoder_disable(struct drm_encoder *encoder)
@@ -171,15 +169,13 @@ static void sun4i_rgb_encoder_disable(struct drm_encoder *encoder) · 4 unmodified lines
171	169
172	170	DRM_DEBUG_DRIVER("Disabling RGB output\n");
173	171
174		− sun4i_tcon_channel_disable(tcon, 0);
	172	+ if (!IS_ERR(tcon->panel))
	173	+ drm_panel_disable(tcon->panel);
175	174
176		− /* encoder->bridge can be NULL; drm_bridge_disable checks for it */
177		− drm_bridge_disable(encoder->bridge);
	175	+ sun4i_tcon_channel_disable(tcon, 0);
178	176
179		− if (!IS_ERR(tcon->panel)) {
180		− drm_panel_disable(tcon->panel);
	177	+ if (!IS_ERR(tcon->panel))
181	178	drm_panel_unprepare(tcon->panel);
182		− }
183	179	}
184	180
185	181	static void sun4i_rgb_encoder_mode_set(struct drm_encoder *encoder,

drivers/i2c/Kconfig+0−1

@@ -59,7 +59,6 @@ config I2C_CHARDEV · 58 unmodified lines
59	59
60	60	config I2C_MUX
61	61	tristate "I2C bus multiplexing support"
62		− depends on HAS_IOMEM
63	62	help
64	63	Say Y here if you want the I2C core to support the ability to
65	64	handle multiplexed I2C bus topologies, by presenting each

drivers/i2c/busses/i2c-digicolor.c+1−1

@@ -347,7 +347,7 @@ static int dc_i2c_probe(struct platform_device *pdev) · 346 unmodified lines
347	347
348	348	ret = i2c_add_adapter(&i2c->adap);
349	349	if (ret < 0) {
350		− clk_unprepare(i2c->clk);
	350	+ clk_disable_unprepare(i2c->clk);
351	351	return ret;
352	352	}
353	353

drivers/i2c/muxes/Kconfig+1−0

@@ -63,6 +63,7 @@ config I2C_MUX_PINCTRL · 62 unmodified lines
63	63
64	64	config I2C_MUX_REG
65	65	tristate "Register-based I2C multiplexer"
	66	+ depends on HAS_IOMEM
66	67	help
67	68	If you say yes to this option, support will be included for a
68	69	register based I2C multiplexer. This driver provides access to

drivers/i2c/muxes/i2c-demux-pinctrl.c+20−2

@@ -69,10 +69,28 @@ static int i2c_demux_activate_master(struct i2c_demux_pinctrl_priv *priv, u32 ne · 68 unmodified lines
69	69	goto err_with_revert;
70	70	}
71	71
72		− p = devm_pinctrl_get_select(adap->dev.parent, priv->bus_name);
	72	+ /*
	73	+ * Check if there are pinctrl states at all. Note: we cant' use
	74	+ * devm_pinctrl_get_select() because we need to distinguish between
	75	+ * the -ENODEV from devm_pinctrl_get() and pinctrl_lookup_state().
	76	+ */
	77	+ p = devm_pinctrl_get(adap->dev.parent);
73	78	if (IS_ERR(p)) {
74	79	ret = PTR_ERR(p);
75		− goto err_with_put;
	80	+ /* continue if just no pinctrl states (e.g. i2c-gpio), otherwise exit */
	81	+ if (ret != -ENODEV)
	82	+ goto err_with_put;
	83	+ } else {
	84	+ /* there are states. check and use them */
	85	+ struct pinctrl_state *s = pinctrl_lookup_state(p, priv->bus_name);
	86	+
	87	+ if (IS_ERR(s)) {
	88	+ ret = PTR_ERR(s);
	89	+ goto err_with_put;
	90	+ }
	91	+ ret = pinctrl_select_state(p, s);
	92	+ if (ret < 0)
	93	+ goto err_with_put;
76	94	}
77	95
78	96	priv->chan[new_chan].parent_adap = adap;

drivers/i2c/muxes/i2c-mux-pca954x.c+2−2

@@ -268,9 +268,9 @@ static int pca954x_probe(struct i2c_client *client, · 267 unmodified lines
268	268	/* discard unconfigured channels */
269	269	break;
270	270	idle_disconnect_pd = pdata->modes[num].deselect_on_exit;
271		− data->deselect \|= (idle_disconnect_pd
272		− \|\| idle_disconnect_dt) << num;
273	271	}
	272	+ data->deselect \|= (idle_disconnect_pd \|\|
	273	+ idle_disconnect_dt) << num;
274	274
275	275	ret = i2c_mux_add_adapter(muxc, force, num, class);
276	276

drivers/infiniband/core/addr.c+9−2

@@ -699,13 +699,16 @@ EXPORT_SYMBOL(rdma_addr_cancel); · 698 unmodified lines
699	699	struct resolve_cb_context {
700	700	struct rdma_dev_addr *addr;
701	701	struct completion comp;
	702	+ int status;
702	703	};
703	704
704	705	static void resolve_cb(int status, struct sockaddr *src_addr,
705	706	struct rdma_dev_addr addr, void context)
706	707	{
707		− memcpy(((struct resolve_cb_context *)context)->addr, addr, sizeof(struct
708		− rdma_dev_addr));
	708	+ if (!status)
	709	+ memcpy(((struct resolve_cb_context *)context)->addr,
	710	+ addr, sizeof(struct rdma_dev_addr));
	711	+ ((struct resolve_cb_context *)context)->status = status;
709	712	complete(&((struct resolve_cb_context *)context)->comp);
710	713	}
711	714
@@ -743,6 +746,10 @@ int rdma_addr_find_l2_eth_by_grh(const union ib_gid *sgid, · 31 unmodified lines
743	746
744	747	wait_for_completion(&ctx.comp);
745	748
	749	+ ret = ctx.status;
	750	+ if (ret)
	751	+ return ret;
	752	+
746	753	memcpy(dmac, dev_addr.dst_dev_addr, ETH_ALEN);
747	754	dev = dev_get_by_index(&init_net, dev_addr.bound_dev_if);
748	755	if (!dev)

drivers/infiniband/core/cm.c+110−16

@@ -80,6 +80,8 @@ static struct ib_cm { · 79 unmodified lines
80	80	__be32 random_id_operand;
81	81	struct list_head timewait_list;
82	82	struct workqueue_struct *wq;
	83	+ /* Sync on cm change port state */
	84	+ spinlock_t state_lock;
83	85	} cm;
84	86
85	87	/* Counter indexes ordered by attribute ID */
@@ -161,6 +163,8 @@ struct cm_port { · 75 unmodified lines
161	163	struct ib_mad_agent *mad_agent;
162	164	struct kobject port_obj;
163	165	u8 port_num;
	166	+ struct list_head cm_priv_prim_list;
	167	+ struct list_head cm_priv_altr_list;
164	168	struct cm_counter_group counter_group[CM_COUNTER_GROUPS];
165	169	};
166	170
@@ -241,6 +245,12 @@ struct cm_id_private { · 74 unmodified lines
241	245	u8 service_timeout;
242	246	u8 target_ack_delay;
243	247
	248	+ struct list_head prim_list;
	249	+ struct list_head altr_list;
	250	+ /* Indicates that the send port mad is registered and av is set */
	251	+ int prim_send_port_not_ready;
	252	+ int altr_send_port_not_ready;
	253	+
244	254	struct list_head work_list;
245	255	atomic_t work_count;
246	256	};
@@ -259,20 +269,47 @@ static int cm_alloc_msg(struct cm_id_private *cm_id_priv, · 12 unmodified lines
259	269	struct ib_mad_agent *mad_agent;
260	270	struct ib_mad_send_buf *m;
261	271	struct ib_ah *ah;
	272	+ struct cm_av *av;
	273	+ unsigned long flags, flags2;
	274	+ int ret = 0;
262	275
	276	+ /* don't let the port to be released till the agent is down */
	277	+ spin_lock_irqsave(&cm.state_lock, flags2);
	278	+ spin_lock_irqsave(&cm.lock, flags);
	279	+ if (!cm_id_priv->prim_send_port_not_ready)
	280	+ av = &cm_id_priv->av;
	281	+ else if (!cm_id_priv->altr_send_port_not_ready &&
	282	+ (cm_id_priv->alt_av.port))
	283	+ av = &cm_id_priv->alt_av;
	284	+ else {
	285	+ pr_info("%s: not valid CM id\n", __func__);
	286	+ ret = -ENODEV;
	287	+ spin_unlock_irqrestore(&cm.lock, flags);
	288	+ goto out;
	289	+ }
	290	+ spin_unlock_irqrestore(&cm.lock, flags);
	291	+ /* Make sure the port haven't released the mad yet */
263	292	mad_agent = cm_id_priv->av.port->mad_agent;
264		− ah = ib_create_ah(mad_agent->qp->pd, &cm_id_priv->av.ah_attr);
265		− if (IS_ERR(ah))
266		− return PTR_ERR(ah);
	293	+ if (!mad_agent) {
	294	+ pr_info("%s: not a valid MAD agent\n", __func__);
	295	+ ret = -ENODEV;
	296	+ goto out;
	297	+ }
	298	+ ah = ib_create_ah(mad_agent->qp->pd, &av->ah_attr);
	299	+ if (IS_ERR(ah)) {
	300	+ ret = PTR_ERR(ah);
	301	+ goto out;
	302	+ }
267	303
268	304	m = ib_create_send_mad(mad_agent, cm_id_priv->id.remote_cm_qpn,
269		− cm_id_priv->av.pkey_index,
	305	+ av->pkey_index,
270	306	0, IB_MGMT_MAD_HDR, IB_MGMT_MAD_DATA,
271	307	GFP_ATOMIC,
272	308	IB_MGMT_BASE_VERSION);
273	309	if (IS_ERR(m)) {
274	310	ib_destroy_ah(ah);
275		− return PTR_ERR(m);
	311	+ ret = PTR_ERR(m);
	312	+ goto out;
276	313	}
277	314
278	315	/* Timeout set by caller if response is expected. */
@@ -282,7 +319,10 @@ static int cm_alloc_msg(struct cm_id_private *cm_id_priv, · 3 unmodified lines
282	319	atomic_inc(&cm_id_priv->refcount);
283	320	m->context[0] = cm_id_priv;
284	321	*msg = m;
285		− return 0;
	322	+
	323	+out:
	324	+ spin_unlock_irqrestore(&cm.state_lock, flags2);
	325	+ return ret;
286	326	}
287	327
288	328	static int cm_alloc_response_msg(struct cm_port *port,
@@ -352,7 +392,8 @@ static void cm_init_av_for_response(struct cm_port port, struct ib_wc wc, · 63 unmodified lines
352	392	grh, &av->ah_attr);
353	393	}
354	394
355		−static int cm_init_av_by_path(struct ib_sa_path_rec path, struct cm_av av)
	395	+static int cm_init_av_by_path(struct ib_sa_path_rec path, struct cm_av av,
	396	+ struct cm_id_private *cm_id_priv)
356	397	{
357	398	struct cm_device *cm_dev;
358	399	struct cm_port *port = NULL;
@@ -387,7 +428,17 @@ static int cm_init_av_by_path(struct ib_sa_path_rec path, struct cm_av av) · 28 unmodified lines
387	428	&av->ah_attr);
388	429	av->timeout = path->packet_life_time + 1;
389	430
390		− return 0;
	431	+ spin_lock_irqsave(&cm.lock, flags);
	432	+ if (&cm_id_priv->av == av)
	433	+ list_add_tail(&cm_id_priv->prim_list, &port->cm_priv_prim_list);
	434	+ else if (&cm_id_priv->alt_av == av)
	435	+ list_add_tail(&cm_id_priv->altr_list, &port->cm_priv_altr_list);
	436	+ else
	437	+ ret = -EINVAL;
	438	+
	439	+ spin_unlock_irqrestore(&cm.lock, flags);
	440	+
	441	+ return ret;
391	442	}
392	443
393	444	static int cm_alloc_id(struct cm_id_private *cm_id_priv)
@@ -677,6 +728,8 @@ struct ib_cm_id ib_create_cm_id(struct ib_device device, · 283 unmodified lines
677	728	spin_lock_init(&cm_id_priv->lock);
678	729	init_completion(&cm_id_priv->comp);
679	730	INIT_LIST_HEAD(&cm_id_priv->work_list);
	731	+ INIT_LIST_HEAD(&cm_id_priv->prim_list);
	732	+ INIT_LIST_HEAD(&cm_id_priv->altr_list);
680	733	atomic_set(&cm_id_priv->work_count, -1);
681	734	atomic_set(&cm_id_priv->refcount, 1);
682	735	return &cm_id_priv->id;
@@ -892,6 +945,15 @@ retest: · 209 unmodified lines
892	945	break;
893	946	}
894	947
	948	+ spin_lock_irq(&cm.lock);
	949	+ if (!list_empty(&cm_id_priv->altr_list) &&
	950	+ (!cm_id_priv->altr_send_port_not_ready))
	951	+ list_del(&cm_id_priv->altr_list);
	952	+ if (!list_empty(&cm_id_priv->prim_list) &&
	953	+ (!cm_id_priv->prim_send_port_not_ready))
	954	+ list_del(&cm_id_priv->prim_list);
	955	+ spin_unlock_irq(&cm.lock);
	956	+
895	957	cm_free_id(cm_id->local_id);
896	958	cm_deref_id(cm_id_priv);
897	959	wait_for_completion(&cm_id_priv->comp);
@@ -1192,12 +1254,13 @@ int ib_send_cm_req(struct ib_cm_id *cm_id, · 294 unmodified lines
1192	1254	goto out;
1193	1255	}
1194	1256
1195		− ret = cm_init_av_by_path(param->primary_path, &cm_id_priv->av);
	1257	+ ret = cm_init_av_by_path(param->primary_path, &cm_id_priv->av,
	1258	+ cm_id_priv);
1196	1259	if (ret)
1197	1260	goto error1;
1198	1261	if (param->alternate_path) {
1199	1262	ret = cm_init_av_by_path(param->alternate_path,
1200		− &cm_id_priv->alt_av);
	1263	+ &cm_id_priv->alt_av, cm_id_priv);
1201	1264	if (ret)
1202	1265	goto error1;
1203	1266	}
@@ -1653,7 +1716,8 @@ static int cm_req_handler(struct cm_work *work) · 449 unmodified lines
1653	1716	dev_put(gid_attr.ndev);
1654	1717	}
1655	1718	work->path[0].gid_type = gid_attr.gid_type;
1656		− ret = cm_init_av_by_path(&work->path[0], &cm_id_priv->av);
	1719	+ ret = cm_init_av_by_path(&work->path[0], &cm_id_priv->av,
	1720	+ cm_id_priv);
1657	1721	}
1658	1722	if (ret) {
1659	1723	int err = ib_get_cached_gid(work->port->cm_dev->ib_device,
@@ -1672,7 +1736,8 @@ static int cm_req_handler(struct cm_work *work) · 12 unmodified lines
1672	1736	goto rejected;
1673	1737	}
1674	1738	if (req_msg->alt_local_lid) {
1675		− ret = cm_init_av_by_path(&work->path[1], &cm_id_priv->alt_av);
	1739	+ ret = cm_init_av_by_path(&work->path[1], &cm_id_priv->alt_av,
	1740	+ cm_id_priv);
1676	1741	if (ret) {
1677	1742	ib_send_cm_rej(cm_id, IB_CM_REJ_INVALID_ALT_GID,
1678	1743	&work->path[0].sgid,
@@ -2727,7 +2792,8 @@ int ib_send_cm_lap(struct ib_cm_id *cm_id, · 1048 unmodified lines
2727	2792	goto out;
2728	2793	}
2729	2794
2730		− ret = cm_init_av_by_path(alternate_path, &cm_id_priv->alt_av);
	2795	+ ret = cm_init_av_by_path(alternate_path, &cm_id_priv->alt_av,
	2796	+ cm_id_priv);
2731	2797	if (ret)
2732	2798	goto out;
2733	2799	cm_id_priv->alt_av.timeout =
@@ -2839,7 +2905,8 @@ static int cm_lap_handler(struct cm_work *work) · 105 unmodified lines
2839	2905	cm_init_av_for_response(work->port, work->mad_recv_wc->wc,
2840	2906	work->mad_recv_wc->recv_buf.grh,
2841	2907	&cm_id_priv->av);
2842		− cm_init_av_by_path(param->alternate_path, &cm_id_priv->alt_av);
	2908	+ cm_init_av_by_path(param->alternate_path, &cm_id_priv->alt_av,
	2909	+ cm_id_priv);
2843	2910	ret = atomic_inc_and_test(&cm_id_priv->work_count);
2844	2911	if (!ret)
2845	2912	list_add_tail(&work->list, &cm_id_priv->work_list);
@@ -3031,7 +3098,7 @@ int ib_send_cm_sidr_req(struct ib_cm_id *cm_id, · 185 unmodified lines
3031	3098	return -EINVAL;
3032	3099
3033	3100	cm_id_priv = container_of(cm_id, struct cm_id_private, id);
3034		− ret = cm_init_av_by_path(param->path, &cm_id_priv->av);
	3101	+ ret = cm_init_av_by_path(param->path, &cm_id_priv->av, cm_id_priv);
3035	3102	if (ret)
3036	3103	goto out;
3037	3104
@@ -3468,7 +3535,9 @@ out: · 430 unmodified lines
3468	3535	static int cm_migrate(struct ib_cm_id *cm_id)
3469	3536	{
3470	3537	struct cm_id_private *cm_id_priv;
	3538	+ struct cm_av tmp_av;
3471	3539	unsigned long flags;
	3540	+ int tmp_send_port_not_ready;
3472	3541	int ret = 0;
3473	3542
3474	3543	cm_id_priv = container_of(cm_id, struct cm_id_private, id);
@@ -3477,7 +3546,14 @@ static int cm_migrate(struct ib_cm_id *cm_id) · 2 unmodified lines
3477	3546	(cm_id->lap_state == IB_CM_LAP_UNINIT \|\|
3478	3547	cm_id->lap_state == IB_CM_LAP_IDLE)) {
3479	3548	cm_id->lap_state = IB_CM_LAP_IDLE;
	3549	+ /* Swap address vector */
	3550	+ tmp_av = cm_id_priv->av;
3480	3551	cm_id_priv->av = cm_id_priv->alt_av;
	3552	+ cm_id_priv->alt_av = tmp_av;
	3553	+ /* Swap port send ready state */
	3554	+ tmp_send_port_not_ready = cm_id_priv->prim_send_port_not_ready;
	3555	+ cm_id_priv->prim_send_port_not_ready = cm_id_priv->altr_send_port_not_ready;
	3556	+ cm_id_priv->altr_send_port_not_ready = tmp_send_port_not_ready;
3481	3557	} else
3482	3558	ret = -EINVAL;
3483	3559	spin_unlock_irqrestore(&cm_id_priv->lock, flags);
@@ -3888,6 +3964,9 @@ static void cm_add_one(struct ib_device *ib_device) · 404 unmodified lines
3888	3964	port->cm_dev = cm_dev;
3889	3965	port->port_num = i;
3890	3966
	3967	+ INIT_LIST_HEAD(&port->cm_priv_prim_list);
	3968	+ INIT_LIST_HEAD(&port->cm_priv_altr_list);
	3969	+
3891	3970	ret = cm_create_port_fs(port);
3892	3971	if (ret)
3893	3972	goto error1;
@@ -3945,6 +4024,8 @@ static void cm_remove_one(struct ib_device ib_device, void client_data) · 51 unmodified lines
3945	4024	{
3946	4025	struct cm_device *cm_dev = client_data;
3947	4026	struct cm_port *port;
	4027	+ struct cm_id_private *cm_id_priv;
	4028	+ struct ib_mad_agent *cur_mad_agent;
3948	4029	struct ib_port_modify port_modify = {
3949	4030	.clr_port_cap_mask = IB_PORT_CM_SUP
3950	4031	};
@@ -3968,15 +4049,27 @@ static void cm_remove_one(struct ib_device ib_device, void client_data) · 17 unmodified lines
3968	4049
3969	4050	port = cm_dev->port[i-1];
3970	4051	ib_modify_port(ib_device, port->port_num, 0, &port_modify);
	4052	+ /* Mark all the cm_id's as not valid */
	4053	+ spin_lock_irq(&cm.lock);
	4054	+ list_for_each_entry(cm_id_priv, &port->cm_priv_altr_list, altr_list)
	4055	+ cm_id_priv->altr_send_port_not_ready = 1;
	4056	+ list_for_each_entry(cm_id_priv, &port->cm_priv_prim_list, prim_list)
	4057	+ cm_id_priv->prim_send_port_not_ready = 1;
	4058	+ spin_unlock_irq(&cm.lock);
3971	4059	/*
3972	4060	* We flush the queue here after the going_down set, this
3973	4061	* verify that no new works will be queued in the recv handler,
3974	4062	* after that we can call the unregister_mad_agent
3975	4063	*/
3976	4064	flush_workqueue(cm.wq);
3977		− ib_unregister_mad_agent(port->mad_agent);
	4065	+ spin_lock_irq(&cm.state_lock);
	4066	+ cur_mad_agent = port->mad_agent;
	4067	+ port->mad_agent = NULL;
	4068	+ spin_unlock_irq(&cm.state_lock);
	4069	+ ib_unregister_mad_agent(cur_mad_agent);
3978	4070	cm_remove_port_fs(port);
3979	4071	}
	4072	+
3980	4073	device_unregister(cm_dev->device);
3981	4074	kfree(cm_dev);
3982	4075	}
@@ -3989,6 +4082,7 @@ static int __init ib_cm_init(void) · 6 unmodified lines
3989	4082	INIT_LIST_HEAD(&cm.device_list);
3990	4083	rwlock_init(&cm.device_lock);
3991	4084	spin_lock_init(&cm.lock);
	4085	+ spin_lock_init(&cm.state_lock);
3992	4086	cm.listen_service_table = RB_ROOT;
3993	4087	cm.listen_service_id = be64_to_cpu(IB_CM_ASSIGN_SERVICE_ID);
3994	4088	cm.remote_id_table = RB_ROOT;

drivers/infiniband/core/cma.c+20−1

@@ -2438,6 +2438,18 @@ static int iboe_tos_to_sl(struct net_device *ndev, int tos) · 2437 unmodified lines
2438	2438	return 0;
2439	2439	}
2440	2440
	2441	+static enum ib_gid_type cma_route_gid_type(enum rdma_network_type network_type,
	2442	+ unsigned long supported_gids,
	2443	+ enum ib_gid_type default_gid)
	2444	+{
	2445	+ if ((network_type == RDMA_NETWORK_IPV4 \|\|
	2446	+ network_type == RDMA_NETWORK_IPV6) &&
	2447	+ test_bit(IB_GID_TYPE_ROCE_UDP_ENCAP, &supported_gids))
	2448	+ return IB_GID_TYPE_ROCE_UDP_ENCAP;
	2449	+
	2450	+ return default_gid;
	2451	+}
	2452	+
2441	2453	static int cma_resolve_iboe_route(struct rdma_id_private *id_priv)
2442	2454	{
2443	2455	struct rdma_route *route = &id_priv->id.route;
@@ -2463,6 +2475,8 @@ static int cma_resolve_iboe_route(struct rdma_id_private *id_priv) · 19 unmodified lines
2463	2475	route->num_paths = 1;
2464	2476
2465	2477	if (addr->dev_addr.bound_dev_if) {
	2478	+ unsigned long supported_gids;
	2479	+
2466	2480	ndev = dev_get_by_index(&init_net, addr->dev_addr.bound_dev_if);
2467	2481	if (!ndev) {
2468	2482	ret = -ENODEV;
@@ -2486,7 +2500,12 @@ static int cma_resolve_iboe_route(struct rdma_id_private *id_priv) · 17 unmodified lines
2486	2500
2487	2501	route->path_rec->net = &init_net;
2488	2502	route->path_rec->ifindex = ndev->ifindex;
2489		− route->path_rec->gid_type = id_priv->gid_type;
	2503	+ supported_gids = roce_gid_type_mask_support(id_priv->id.device,
	2504	+ id_priv->id.port_num);
	2505	+ route->path_rec->gid_type =
	2506	+ cma_route_gid_type(addr->dev_addr.network,
	2507	+ supported_gids,
	2508	+ id_priv->gid_type);
2490	2509	}
2491	2510	if (!ndev) {
2492	2511	ret = -ENODEV;

drivers/infiniband/core/umem.c+1−1

@@ -175,7 +175,7 @@ struct ib_umem ib_umem_get(struct ib_ucontext context, unsigned long addr, · 174 unmodified lines
175	175
176	176	cur_base = addr & PAGE_MASK;
177	177
178		− if (npages == 0) {
	178	+ if (npages == 0 \|\| npages > UINT_MAX) {
179	179	ret = -EINVAL;
180	180	goto out;
181	181	}

drivers/infiniband/core/uverbs_main.c+2−5

@@ -262,12 +262,9 @@ static int ib_uverbs_cleanup_ucontext(struct ib_uverbs_file *file, · 261 unmodified lines
262	262	container_of(uobj, struct ib_uqp_object, uevent.uobject);
263	263
264	264	idr_remove_uobj(&ib_uverbs_qp_idr, uobj);
265		− if (qp != qp->real_qp) {
266		− ib_close_qp(qp);
267		− } else {
	265	+ if (qp == qp->real_qp)
268	266	ib_uverbs_detach_umcast(qp, uqp);
269		− ib_destroy_qp(qp);
270		− }
	267	+ ib_destroy_qp(qp);
271	268	ib_uverbs_release_uevent(file, &uqp->uevent);
272	269	kfree(uqp);
273	270	}

drivers/infiniband/hw/cxgb4/cq.c+3−14

@@ -666,18 +666,6 @@ skip_cqe: · 665 unmodified lines
666	666	return ret;
667	667	}
668	668
669		−static void invalidate_mr(struct c4iw_dev *rhp, u32 rkey)
670		−{
671		− struct c4iw_mr *mhp;
672		− unsigned long flags;
673		−
674		− spin_lock_irqsave(&rhp->lock, flags);
675		− mhp = get_mhp(rhp, rkey >> 8);
676		− if (mhp)
677		− mhp->attr.state = 0;
678		− spin_unlock_irqrestore(&rhp->lock, flags);
679		−}
680		−
681	669	/*
682	670	* Get one cq entry from c4iw and map it to openib.
683	671	*
@@ -733,7 +721,7 @@ static int c4iw_poll_cq_one(struct c4iw_cq chp, struct ib_wc wc) · 49 unmodified lines
733	721	CQE_OPCODE(&cqe) == FW_RI_SEND_WITH_SE_INV) {
734	722	wc->ex.invalidate_rkey = CQE_WRID_STAG(&cqe);
735	723	wc->wc_flags \|= IB_WC_WITH_INVALIDATE;
736		− invalidate_mr(qhp->rhp, wc->ex.invalidate_rkey);
	724	+ c4iw_invalidate_mr(qhp->rhp, wc->ex.invalidate_rkey);
737	725	}
738	726	} else {
739	727	switch (CQE_OPCODE(&cqe)) {
@@ -762,7 +750,8 @@ static int c4iw_poll_cq_one(struct c4iw_cq chp, struct ib_wc wc) · 22 unmodified lines
762	750
763	751	/* Invalidate the MR if the fastreg failed */
764	752	if (CQE_STATUS(&cqe) != T4_ERR_SUCCESS)
765		− invalidate_mr(qhp->rhp, CQE_WRID_FR_STAG(&cqe));
	753	+ c4iw_invalidate_mr(qhp->rhp,
	754	+ CQE_WRID_FR_STAG(&cqe));
766	755	break;
767	756	default:
768	757	printk(KERN_ERR MOD "Unexpected opcode %d "

drivers/infiniband/hw/cxgb4/iw_cxgb4.h+1−1

@@ -999,6 +999,6 @@ extern int db_coalescing_threshold; · 998 unmodified lines
999	999	extern int use_dsgl;
1000	1000	void c4iw_drain_rq(struct ib_qp *qp);
1001	1001	void c4iw_drain_sq(struct ib_qp *qp);
1002		−
	1002	+void c4iw_invalidate_mr(struct c4iw_dev *rhp, u32 rkey);
1003	1003
1004	1004	#endif

drivers/infiniband/hw/cxgb4/mem.c+12−0

@@ -770,3 +770,15 @@ int c4iw_dereg_mr(struct ib_mr *ib_mr) · 769 unmodified lines
770	770	kfree(mhp);
771	771	return 0;
772	772	}
	773	+
	774	+void c4iw_invalidate_mr(struct c4iw_dev *rhp, u32 rkey)
	775	+{
	776	+ struct c4iw_mr *mhp;
	777	+ unsigned long flags;
	778	+
	779	+ spin_lock_irqsave(&rhp->lock, flags);
	780	+ mhp = get_mhp(rhp, rkey >> 8);
	781	+ if (mhp)
	782	+ mhp->attr.state = 0;
	783	+ spin_unlock_irqrestore(&rhp->lock, flags);
	784	+}

drivers/infiniband/hw/cxgb4/qp.c+12−8

@@ -706,12 +706,8 @@ static int build_memreg(struct t4_sq sq, union t4_wr wqe, · 705 unmodified lines
706	706	return 0;
707	707	}
708	708
709		−static int build_inv_stag(struct c4iw_dev dev, union t4_wr wqe,
710		− struct ib_send_wr wr, u8 len16)
	709	+static int build_inv_stag(union t4_wr wqe, struct ib_send_wr wr, u8 *len16)
711	710	{
712		− struct c4iw_mr *mhp = get_mhp(dev, wr->ex.invalidate_rkey >> 8);
713		−
714		− mhp->attr.state = 0;
715	711	wqe->inv.stag_inv = cpu_to_be32(wr->ex.invalidate_rkey);
716	712	wqe->inv.r2 = 0;
717	713	*len16 = DIV_ROUND_UP(sizeof wqe->inv, 16);
@@ -797,11 +793,13 @@ int c4iw_post_send(struct ib_qp ibqp, struct ib_send_wr wr, · 79 unmodified lines
797	793	spin_lock_irqsave(&qhp->lock, flag);
798	794	if (t4_wq_in_error(&qhp->wq)) {
799	795	spin_unlock_irqrestore(&qhp->lock, flag);
	796	+ *bad_wr = wr;
800	797	return -EINVAL;
801	798	}
802	799	num_wrs = t4_sq_avail(&qhp->wq);
803	800	if (num_wrs == 0) {
804	801	spin_unlock_irqrestore(&qhp->lock, flag);
	802	+ *bad_wr = wr;
805	803	return -ENOMEM;
806	804	}
807	805	while (wr) {
@@ -840,10 +838,13 @@ int c4iw_post_send(struct ib_qp ibqp, struct ib_send_wr wr, · 32 unmodified lines
840	838	case IB_WR_RDMA_READ_WITH_INV:
841	839	fw_opcode = FW_RI_RDMA_READ_WR;
842	840	swsqe->opcode = FW_RI_READ_REQ;
843		− if (wr->opcode == IB_WR_RDMA_READ_WITH_INV)
	841	+ if (wr->opcode == IB_WR_RDMA_READ_WITH_INV) {
	842	+ c4iw_invalidate_mr(qhp->rhp,
	843	+ wr->sg_list[0].lkey);
844	844	fw_flags = FW_RI_RDMA_READ_INVALIDATE;
845		− else
	845	+ } else {
846	846	fw_flags = 0;
	847	+ }
847	848	err = build_rdma_read(wqe, wr, &len16);
848	849	if (err)
849	850	break;
@@ -876,7 +877,8 @@ int c4iw_post_send(struct ib_qp ibqp, struct ib_send_wr wr, · 26 unmodified lines
876	877	fw_flags \|= FW_RI_LOCAL_FENCE_FLAG;
877	878	fw_opcode = FW_RI_INV_LSTAG_WR;
878	879	swsqe->opcode = FW_RI_LOCAL_INV;
879		− err = build_inv_stag(qhp->rhp, wqe, wr, &len16);
	880	+ err = build_inv_stag(wqe, wr, &len16);
	881	+ c4iw_invalidate_mr(qhp->rhp, wr->ex.invalidate_rkey);
880	882	break;
881	883	default:
882	884	PDBG("%s post of type=%d TBD!\n", __func__,
@@ -934,11 +936,13 @@ int c4iw_post_receive(struct ib_qp ibqp, struct ib_recv_wr wr, · 51 unmodified lines
934	936	spin_lock_irqsave(&qhp->lock, flag);
935	937	if (t4_wq_in_error(&qhp->wq)) {
936	938	spin_unlock_irqrestore(&qhp->lock, flag);
	939	+ *bad_wr = wr;
937	940	return -EINVAL;
938	941	}
939	942	num_wrs = t4_rq_avail(&qhp->wq);
940	943	if (num_wrs == 0) {
941	944	spin_unlock_irqrestore(&qhp->lock, flag);
	945	+ *bad_wr = wr;
942	946	return -ENOMEM;
943	947	}
944	948	while (wr) {

drivers/infiniband/hw/hfi1/affinity.c+0−72

@@ -775,75 +775,3 @@ void hfi1_put_proc_affinity(int cpu) · 774 unmodified lines
775	775	}
776	776	mutex_unlock(&affinity->lock);
777	777	}
778		−
779		−int hfi1_set_sdma_affinity(struct hfi1_devdata dd, const char buf,
780		− size_t count)
781		−{
782		− struct hfi1_affinity_node *entry;
783		− cpumask_var_t mask;
784		− int ret, i;
785		−
786		− mutex_lock(&node_affinity.lock);
787		− entry = node_affinity_lookup(dd->node);
788		−
789		− if (!entry) {
790		− ret = -EINVAL;
791		− goto unlock;
792		− }
793		−
794		− ret = zalloc_cpumask_var(&mask, GFP_KERNEL);
795		− if (!ret) {
796		− ret = -ENOMEM;
797		− goto unlock;
798		− }
799		−
800		− ret = cpulist_parse(buf, mask);
801		− if (ret)
802		− goto out;
803		−
804		− if (!cpumask_subset(mask, cpu_online_mask) \|\| cpumask_empty(mask)) {
805		− dd_dev_warn(dd, "Invalid CPU mask\n");
806		− ret = -EINVAL;
807		− goto out;
808		− }
809		−
810		− /* reset the SDMA interrupt affinity details */
811		− init_cpu_mask_set(&entry->def_intr);
812		− cpumask_copy(&entry->def_intr.mask, mask);
813		−
814		− /* Reassign the affinity for each SDMA interrupt. */
815		− for (i = 0; i < dd->num_msix_entries; i++) {
816		− struct hfi1_msix_entry *msix;
817		−
818		− msix = &dd->msix_entries[i];
819		− if (msix->type != IRQ_SDMA)
820		− continue;
821		−
822		− ret = get_irq_affinity(dd, msix);
823		−
824		− if (ret)
825		− break;
826		− }
827		−out:
828		− free_cpumask_var(mask);
829		−unlock:
830		− mutex_unlock(&node_affinity.lock);
831		− return ret ? ret : strnlen(buf, PAGE_SIZE);
832		−}
833		−
834		−int hfi1_get_sdma_affinity(struct hfi1_devdata dd, char buf)
835		−{
836		− struct hfi1_affinity_node *entry;
837		−
838		− mutex_lock(&node_affinity.lock);
839		− entry = node_affinity_lookup(dd->node);
840		−
841		− if (!entry) {
842		− mutex_unlock(&node_affinity.lock);
843		− return -EINVAL;
844		− }
845		−
846		− cpumap_print_to_pagebuf(true, buf, &entry->def_intr.mask);
847		− mutex_unlock(&node_affinity.lock);
848		− return strnlen(buf, PAGE_SIZE);
849		−}

drivers/infiniband/hw/hfi1/affinity.h+0−4

@@ -102,10 +102,6 @@ int hfi1_get_proc_affinity(int); · 101 unmodified lines
102	102	/* Release a CPU used by a user process. */
103	103	void hfi1_put_proc_affinity(int);
104	104
105		−int hfi1_get_sdma_affinity(struct hfi1_devdata dd, char buf);
106		−int hfi1_set_sdma_affinity(struct hfi1_devdata dd, const char buf,
107		− size_t count);
108		−
109	105	struct hfi1_affinity_node {
110	106	int node;
111	107	struct cpu_mask_set def_intr;

drivers/infiniband/hw/hfi1/chip.c+9−18

@@ -6301,19 +6301,8 @@ void set_up_vl15(struct hfi1_devdata *dd, u8 vau, u16 vl15buf) · 6300 unmodified lines
6301	6301	/* leave shared count at zero for both global and VL15 */
6302	6302	write_global_credit(dd, vau, vl15buf, 0);
6303	6303
6304		− /* We may need some credits for another VL when sending packets
6305		− * with the snoop interface. Dividing it down the middle for VL15
6306		− * and VL0 should suffice.
6307		− */
6308		− if (unlikely(dd->hfi1_snoop.mode_flag == HFI1_PORT_SNOOP_MODE)) {
6309		− write_csr(dd, SEND_CM_CREDIT_VL15, (u64)(vl15buf >> 1)
6310		− << SEND_CM_CREDIT_VL15_DEDICATED_LIMIT_VL_SHIFT);
6311		− write_csr(dd, SEND_CM_CREDIT_VL, (u64)(vl15buf >> 1)
6312		− << SEND_CM_CREDIT_VL_DEDICATED_LIMIT_VL_SHIFT);
6313		− } else {
6314		− write_csr(dd, SEND_CM_CREDIT_VL15, (u64)vl15buf
6315		− << SEND_CM_CREDIT_VL15_DEDICATED_LIMIT_VL_SHIFT);
6316		− }
	6304	+ write_csr(dd, SEND_CM_CREDIT_VL15, (u64)vl15buf
	6305	+ << SEND_CM_CREDIT_VL15_DEDICATED_LIMIT_VL_SHIFT);
6317	6306	}
6318	6307
6319	6308	/*
@@ -9915,9 +9904,6 @@ static void set_lidlmc(struct hfi1_pportdata *ppd) · 3595 unmodified lines
9915	9904	u32 mask = ~((1U << ppd->lmc) - 1);
9916	9905	u64 c1 = read_csr(ppd->dd, DCC_CFG_PORT_CONFIG1);
9917	9906
9918		− if (dd->hfi1_snoop.mode_flag)
9919		− dd_dev_info(dd, "Set lid/lmc while snooping");
9920		−
9921	9907	c1 &= ~(DCC_CFG_PORT_CONFIG1_TARGET_DLID_SMASK
9922	9908	\| DCC_CFG_PORT_CONFIG1_DLID_MASK_SMASK);
9923	9909	c1 \|= ((ppd->lid & DCC_CFG_PORT_CONFIG1_TARGET_DLID_MASK)
@@ -12112,7 +12098,7 @@ static void update_synth_timer(unsigned long opaque) · 2188 unmodified lines
12112	12098	mod_timer(&dd->synth_stats_timer, jiffies + HZ * SYNTH_CNT_TIME);
12113	12099	}
12114	12100
12115		−#define C_MAX_NAME 13 /* 12 chars + one for /0 */
	12101	+#define C_MAX_NAME 16 /* 15 chars + one for /0 */
12116	12102	static int init_cntrs(struct hfi1_devdata *dd)
12117	12103	{
12118	12104	int i, rcv_ctxts, j;
@@ -14463,7 +14449,7 @@ struct hfi1_devdata hfi1_init_dd(struct pci_dev pdev, · 2344 unmodified lines
14463	14449	* Any error printing is already done by the init code.
14464	14450	* On return, we have the chip mapped.
14465	14451	*/
14466		− ret = hfi1_pcie_ddinit(dd, pdev, ent);
	14452	+ ret = hfi1_pcie_ddinit(dd, pdev);
14467	14453	if (ret < 0)
14468	14454	goto bail_free;
14469	14455
@@ -14691,6 +14677,11 @@ struct hfi1_devdata hfi1_init_dd(struct pci_dev pdev, · 221 unmodified lines
14691	14677	if (ret)
14692	14678	goto bail_free_cntrs;
14693	14679
	14680	+ init_completion(&dd->user_comp);
	14681	+
	14682	+ /* The user refcount starts with one to inidicate an active device */
	14683	+ atomic_set(&dd->user_refcount, 1);
	14684	+
14694	14685	goto bail;
14695	14686
14696	14687	bail_free_rcverr:

drivers/infiniband/hw/hfi1/chip.h+3−0

@@ -320,6 +320,9 @@ · 319 unmodified lines
320	320	/* DC_DC8051_CFG_MODE.GENERAL bits */
321	321	#define DISABLE_SELF_GUID_CHECK 0x2
322	322
	323	+/* Bad L2 frame error code */
	324	+#define BAD_L2_ERR 0x6
	325	+
323	326	/*
324	327	* Eager buffer minimum and maximum sizes supported by the hardware.
325	328	* All power-of-two sizes in between are supported as well.

drivers/infiniband/hw/hfi1/driver.c+26−11

@@ -599,7 +599,6 @@ static void __prescan_rxq(struct hfi1_packet *packet) · 598 unmodified lines
599	599	dd->rhf_offset;
600	600	struct rvt_qp *qp;
601	601	struct ib_header *hdr;
602		− struct ib_other_headers *ohdr;
603	602	struct rvt_dev_info *rdi = &dd->verbs_dev.rdi;
604	603	u64 rhf = rhf_to_cpu(rhf_addr);
605	604	u32 etype = rhf_rcv_type(rhf), qpn, bth1;
@@ -615,18 +614,21 @@ static void __prescan_rxq(struct hfi1_packet *packet) · 9 unmodified lines
615	614	if (etype != RHF_RCV_TYPE_IB)
616	615	goto next;
617	616
618		− hdr = hfi1_get_msgheader(dd, rhf_addr);
	617	+ packet->hdr = hfi1_get_msgheader(dd, rhf_addr);
	618	+ hdr = packet->hdr;
619	619
620	620	lnh = be16_to_cpu(hdr->lrh[0]) & 3;
621	621
622		− if (lnh == HFI1_LRH_BTH)
623		− ohdr = &hdr->u.oth;
624		− else if (lnh == HFI1_LRH_GRH)
625		− ohdr = &hdr->u.l.oth;
626		− else
	622	+ if (lnh == HFI1_LRH_BTH) {
	623	+ packet->ohdr = &hdr->u.oth;
	624	+ } else if (lnh == HFI1_LRH_GRH) {
	625	+ packet->ohdr = &hdr->u.l.oth;
	626	+ packet->rcv_flags \|= HFI1_HAS_GRH;
	627	+ } else {
627	628	goto next; /* just in case */
	629	+ }
628	630
629		− bth1 = be32_to_cpu(ohdr->bth[1]);
	631	+ bth1 = be32_to_cpu(packet->ohdr->bth[1]);
630	632	is_ecn = !!(bth1 & (HFI1_FECN_SMASK \| HFI1_BECN_SMASK));
631	633
632	634	if (!is_ecn)
@@ -646,7 +648,7 @@ static void __prescan_rxq(struct hfi1_packet *packet) · 13 unmodified lines
646	648
647	649	/* turn off BECN, FECN */
648	650	bth1 &= ~(HFI1_FECN_SMASK \| HFI1_BECN_SMASK);
649		− ohdr->bth[1] = cpu_to_be32(bth1);
	651	+ packet->ohdr->bth[1] = cpu_to_be32(bth1);
650	652	next:
651	653	update_ps_mdata(&mdata, rcd);
652	654	}
@@ -1360,12 +1362,25 @@ int process_receive_ib(struct hfi1_packet *packet) · 707 unmodified lines
1360	1362
1361	1363	int process_receive_bypass(struct hfi1_packet *packet)
1362	1364	{
	1365	+ struct hfi1_devdata *dd = packet->rcd->dd;
	1366	+
1363	1367	if (unlikely(rhf_err_flags(packet->rhf)))
1364	1368	handle_eflags(packet);
1365	1369
1366		− dd_dev_err(packet->rcd->dd,
	1370	+ dd_dev_err(dd,
1367	1371	"Bypass packets are not supported in normal operation. Dropping\n");
1368		− incr_cntr64(&packet->rcd->dd->sw_rcv_bypass_packet_errors);
	1372	+ incr_cntr64(&dd->sw_rcv_bypass_packet_errors);
	1373	+ if (!(dd->err_info_rcvport.status_and_code & OPA_EI_STATUS_SMASK)) {
	1374	+ u64 *flits = packet->ebuf;
	1375	+
	1376	+ if (flits && !(packet->rhf & RHF_LEN_ERR)) {
	1377	+ dd->err_info_rcvport.packet_flit1 = flits[0];
	1378	+ dd->err_info_rcvport.packet_flit2 =
	1379	+ packet->tlen > sizeof(flits[0]) ? flits[1] : 0;
	1380	+ }
	1381	+ dd->err_info_rcvport.status_and_code \|=
	1382	+ (OPA_EI_STATUS_SMASK \| BAD_L2_ERR);
	1383	+ }
1369	1384	return RHF_RCV_CONTINUE;
1370	1385	}
1371	1386

drivers/infiniband/hw/hfi1/file_ops.c+16−3

@@ -172,6 +172,9 @@ static int hfi1_file_open(struct inode inode, struct file fp) · 171 unmodified lines
172	172	struct hfi1_devdata,
173	173	user_cdev);
174	174
	175	+ if (!atomic_inc_not_zero(&dd->user_refcount))
	176	+ return -ENXIO;
	177	+
175	178	/* Just take a ref now. Not all opens result in a context assign */
176	179	kobject_get(&dd->kobj);
177	180
@@ -183,11 +186,17 @@ static int hfi1_file_open(struct inode inode, struct file fp) · 5 unmodified lines
183	186	fd->rec_cpu_num = -1; /* no cpu affinity by default */
184	187	fd->mm = current->mm;
185	188	atomic_inc(&fd->mm->mm_count);
186		− }
	189	+ fp->private_data = fd;
	190	+ } else {
	191	+ fp->private_data = NULL;
	192	+
	193	+ if (atomic_dec_and_test(&dd->user_refcount))
	194	+ complete(&dd->user_comp);
187	195
188		− fp->private_data = fd;
	196	+ return -ENOMEM;
	197	+ }
189	198
190		− return fd ? 0 : -ENOMEM;
	199	+ return 0;
191	200	}
192	201
193	202	static long hfi1_file_ioctl(struct file *fp, unsigned int cmd,
@@ -798,6 +807,10 @@ static int hfi1_file_close(struct inode inode, struct file fp) · 604 unmodified lines
798	807	done:
799	808	mmdrop(fdata->mm);
800	809	kobject_put(&dd->kobj);
	810	+
	811	+ if (atomic_dec_and_test(&dd->user_refcount))
	812	+ complete(&dd->user_comp);
	813	+
801	814	kfree(fdata);
802	815	return 0;
803	816	}

drivers/infiniband/hw/hfi1/hfi.h+34−55

@@ -367,26 +367,6 @@ struct hfi1_packet { · 366 unmodified lines
367	367	u8 etype;
368	368	};
369	369
370		−/*
371		− * Private data for snoop/capture support.
372		− */
373		−struct hfi1_snoop_data {
374		− int mode_flag;
375		− struct cdev cdev;
376		− struct device *class_dev;
377		− /* protect snoop data */
378		− spinlock_t snoop_lock;
379		− struct list_head queue;
380		− wait_queue_head_t waitq;
381		− void *filter_value;
382		− int (filter_callback)(void hdr, void data, void value);
383		− u64 dcc_cfg; /* saved value of DCC Cfg register */
384		−};
385		−
386		−/* snoop mode_flag values */
387		−#define HFI1_PORT_SNOOP_MODE 1U
388		−#define HFI1_PORT_CAPTURE_MODE 2U
389		−
390	370	struct rvt_sge_state;
391	371
392	372	/*
@@ -613,8 +593,6 @@ struct hfi1_pportdata { · 220 unmodified lines
613	593	struct mutex hls_lock;
614	594	u32 host_link_state;
615	595
616		− spinlock_t sdma_alllock ____cacheline_aligned_in_smp;
617		−
618	596	u32 lstate; /* logical link state */
619	597
620	598	/* these are the "32 bit" regs */
@@ -1104,8 +1082,6 @@ struct hfi1_devdata { · 483 unmodified lines
1104	1082	char *portcntrnames;
1105	1083	size_t portcntrnameslen;
1106	1084
1107		− struct hfi1_snoop_data hfi1_snoop;
1108		−
1109	1085	struct err_info_rcvport err_info_rcvport;
1110	1086	struct err_info_constraint err_info_rcv_constraint;
1111	1087	struct err_info_constraint err_info_xmit_constraint;
@@ -1141,8 +1117,8 @@ struct hfi1_devdata { · 29 unmodified lines
1141	1117	rhf_rcv_function_ptr normal_rhf_rcv_functions[8];
1142	1118
1143	1119	/*
1144		− * Handlers for outgoing data so that snoop/capture does not
1145		− * have to have its hooks in the send path
	1120	+ * Capability to have different send engines simply by changing a
	1121	+ * pointer value.
1146	1122	*/
1147	1123	send_routine process_pio_send;
1148	1124	send_routine process_dma_send;
@@ -1174,6 +1150,10 @@ struct hfi1_devdata { · 25 unmodified lines
1174	1150	spinlock_t aspm_lock;
1175	1151	/* Number of verbs contexts which have disabled ASPM */
1176	1152	atomic_t aspm_disabled_cnt;
	1153	+ /* Keeps track of user space clients */
	1154	+ atomic_t user_refcount;
	1155	+ /* Used to wait for outstanding user space clients before dev removal */
	1156	+ struct completion user_comp;
1177	1157
1178	1158	struct hfi1_affinity *affinity;
1179	1159	struct rhashtable sdma_rht;
@@ -1221,8 +1201,6 @@ struct hfi1_devdata *hfi1_lookup(int unit); · 41 unmodified lines
1221	1201	extern u32 hfi1_cpulist_count;
1222	1202	extern unsigned long *hfi1_cpulist;
1223	1203
1224		−extern unsigned int snoop_drop_send;
1225		−extern unsigned int snoop_force_capture;
1226	1204	int hfi1_init(struct hfi1_devdata *, int);
1227	1205	int hfi1_count_units(int npresentp, int nupp);
1228	1206	int hfi1_count_active_units(void);
@@ -1557,13 +1535,6 @@ void set_up_vl15(struct hfi1_devdata *dd, u8 vau, u16 vl15buf); · 328 unmodified lines
1557	1535	void reset_link_credits(struct hfi1_devdata *dd);
1558	1536	void assign_remote_cm_au_table(struct hfi1_devdata *dd, u8 vcu);
1559	1537
1560		−int snoop_recv_handler(struct hfi1_packet *packet);
1561		−int snoop_send_dma_handler(struct rvt_qp qp, struct hfi1_pkt_state ps,
1562		− u64 pbc);
1563		−int snoop_send_pio_handler(struct rvt_qp qp, struct hfi1_pkt_state ps,
1564		− u64 pbc);
1565		−void snoop_inline_pio_send(struct hfi1_devdata dd, struct pio_buf pbuf,
1566		− u64 pbc, const void *from, size_t count);
1567	1538	int set_buffer_control(struct hfi1_pportdata ppd, struct buffer_control bc);
1568	1539
1569	1540	static inline struct hfi1_devdata dd_from_ppd(struct hfi1_pportdata ppd)
@@ -1763,8 +1734,7 @@ int qsfp_dump(struct hfi1_pportdata ppd, char buf, int len); · 193 unmodified lines
1763	1734
1764	1735	int hfi1_pcie_init(struct pci_dev , const struct pci_device_id );
1765	1736	void hfi1_pcie_cleanup(struct pci_dev *);
1766		−int hfi1_pcie_ddinit(struct hfi1_devdata , struct pci_dev ,
1767		− const struct pci_device_id *);
	1737	+int hfi1_pcie_ddinit(struct hfi1_devdata , struct pci_dev );
1768	1738	void hfi1_pcie_ddcleanup(struct hfi1_devdata *);
1769	1739	void hfi1_pcie_flr(struct hfi1_devdata *);
1770	1740	int pcie_speeds(struct hfi1_devdata *);
@@ -1799,8 +1769,6 @@ int kdeth_process_expected(struct hfi1_packet *packet); · 28 unmodified lines
1799	1769	int kdeth_process_eager(struct hfi1_packet *packet);
1800	1770	int process_receive_invalid(struct hfi1_packet *packet);
1801	1771
1802		−extern rhf_rcv_function_ptr snoop_rhf_rcv_functions[8];
1803		−
1804	1772	void update_sge(struct rvt_sge_state *ss, u32 length);
1805	1773
1806	1774	/* global module parameter variables */
@@ -1827,9 +1795,6 @@ extern struct mutex hfi1_mutex; · 20 unmodified lines
1827	1795	#define DRIVER_NAME "hfi1"
1828	1796	#define HFI1_USER_MINOR_BASE 0
1829	1797	#define HFI1_TRACE_MINOR 127
1830		−#define HFI1_DIAGPKT_MINOR 128
1831		−#define HFI1_DIAG_MINOR_BASE 129
1832		−#define HFI1_SNOOP_CAPTURE_BASE 200
1833	1798	#define HFI1_NMINORS 255
1834	1799
1835	1800	#define PCI_VENDOR_ID_INTEL 0x8086
@@ -1848,7 +1813,13 @@ extern struct mutex hfi1_mutex; · 12 unmodified lines
1848	1813	static inline u64 hfi1_pkt_default_send_ctxt_mask(struct hfi1_devdata *dd,
1849	1814	u16 ctxt_type)
1850	1815	{
1851		− u64 base_sc_integrity =
	1816	+ u64 base_sc_integrity;
	1817	+
	1818	+ /* No integrity checks if HFI1_CAP_NO_INTEGRITY is set */
	1819	+ if (HFI1_CAP_IS_KSET(NO_INTEGRITY))
	1820	+ return 0;
	1821	+
	1822	+ base_sc_integrity =
1852	1823	SEND_CTXT_CHECK_ENABLE_DISALLOW_BYPASS_BAD_PKT_LEN_SMASK
1853	1824	\| SEND_CTXT_CHECK_ENABLE_DISALLOW_PBC_STATIC_RATE_CONTROL_SMASK
1854	1825	\| SEND_CTXT_CHECK_ENABLE_DISALLOW_TOO_LONG_BYPASS_PACKETS_SMASK
@@ -1863,7 +1834,6 @@ static inline u64 hfi1_pkt_default_send_ctxt_mask(struct hfi1_devdata *dd, · 8 unmodified lines
1863	1834	\| SEND_CTXT_CHECK_ENABLE_CHECK_VL_MAPPING_SMASK
1864	1835	\| SEND_CTXT_CHECK_ENABLE_CHECK_OPCODE_SMASK
1865	1836	\| SEND_CTXT_CHECK_ENABLE_CHECK_SLID_SMASK
1866		− \| SEND_CTXT_CHECK_ENABLE_CHECK_JOB_KEY_SMASK
1867	1837	\| SEND_CTXT_CHECK_ENABLE_CHECK_VL_SMASK
1868	1838	\| SEND_CTXT_CHECK_ENABLE_CHECK_ENABLE_SMASK;
1869	1839
@@ -1872,18 +1842,23 @@ static inline u64 hfi1_pkt_default_send_ctxt_mask(struct hfi1_devdata *dd, · 2 unmodified lines
1872	1842	else
1873	1843	base_sc_integrity \|= HFI1_PKT_KERNEL_SC_INTEGRITY;
1874	1844
1875		− if (is_ax(dd))
1876		− /* turn off send-side job key checks - A0 */
1877		− return base_sc_integrity &
1878		− ~SEND_CTXT_CHECK_ENABLE_CHECK_JOB_KEY_SMASK;
	1845	+ /* turn on send-side job key checks if !A0 */
	1846	+ if (!is_ax(dd))
	1847	+ base_sc_integrity \|= SEND_CTXT_CHECK_ENABLE_CHECK_JOB_KEY_SMASK;
	1848	+
1879	1849	return base_sc_integrity;
1880	1850	}
1881	1851
1882	1852	static inline u64 hfi1_pkt_base_sdma_integrity(struct hfi1_devdata *dd)
1883	1853	{
1884		− u64 base_sdma_integrity =
	1854	+ u64 base_sdma_integrity;
	1855	+
	1856	+ /* No integrity checks if HFI1_CAP_NO_INTEGRITY is set */
	1857	+ if (HFI1_CAP_IS_KSET(NO_INTEGRITY))
	1858	+ return 0;
	1859	+
	1860	+ base_sdma_integrity =
1885	1861	SEND_DMA_CHECK_ENABLE_DISALLOW_BYPASS_BAD_PKT_LEN_SMASK
1886		− \| SEND_DMA_CHECK_ENABLE_DISALLOW_PBC_STATIC_RATE_CONTROL_SMASK
1887	1862	\| SEND_DMA_CHECK_ENABLE_DISALLOW_TOO_LONG_BYPASS_PACKETS_SMASK
1888	1863	\| SEND_DMA_CHECK_ENABLE_DISALLOW_TOO_LONG_IB_PACKETS_SMASK
1889	1864	\| SEND_DMA_CHECK_ENABLE_DISALLOW_BAD_PKT_LEN_SMASK
@@ -1895,14 +1870,18 @@ static inline u64 hfi1_pkt_base_sdma_integrity(struct hfi1_devdata *dd) · 5 unmodified lines
1895	1870	\| SEND_DMA_CHECK_ENABLE_CHECK_VL_MAPPING_SMASK
1896	1871	\| SEND_DMA_CHECK_ENABLE_CHECK_OPCODE_SMASK
1897	1872	\| SEND_DMA_CHECK_ENABLE_CHECK_SLID_SMASK
1898		− \| SEND_DMA_CHECK_ENABLE_CHECK_JOB_KEY_SMASK
1899	1873	\| SEND_DMA_CHECK_ENABLE_CHECK_VL_SMASK
1900	1874	\| SEND_DMA_CHECK_ENABLE_CHECK_ENABLE_SMASK;
1901	1875
1902		− if (is_ax(dd))
1903		− /* turn off send-side job key checks - A0 */
1904		− return base_sdma_integrity &
1905		− ~SEND_DMA_CHECK_ENABLE_CHECK_JOB_KEY_SMASK;
	1876	+ if (!HFI1_CAP_IS_KSET(STATIC_RATE_CTRL))
	1877	+ base_sdma_integrity \|=
	1878	+ SEND_DMA_CHECK_ENABLE_DISALLOW_PBC_STATIC_RATE_CONTROL_SMASK;
	1879	+
	1880	+ /* turn on send-side job key checks if !A0 */
	1881	+ if (!is_ax(dd))
	1882	+ base_sdma_integrity \|=
	1883	+ SEND_DMA_CHECK_ENABLE_CHECK_JOB_KEY_SMASK;
	1884	+
1906	1885	return base_sdma_integrity;
1907	1886	}
1908	1887

drivers/infiniband/hw/hfi1/init.c+64−40

@@ -144,6 +144,8 @@ int hfi1_create_ctxts(struct hfi1_devdata *dd) · 143 unmodified lines
144	144	struct hfi1_ctxtdata *rcd;
145	145
146	146	ppd = dd->pport + (i % dd->num_pports);
	147	+
	148	+ /* dd->rcd[i] gets assigned inside the callee */
147	149	rcd = hfi1_create_ctxtdata(ppd, i, dd->node);
148	150	if (!rcd) {
149	151	dd_dev_err(dd,
@@ -169,8 +171,6 @@ int hfi1_create_ctxts(struct hfi1_devdata *dd) · 19 unmodified lines
169	171	if (!rcd->sc) {
170	172	dd_dev_err(dd,
171	173	"Unable to allocate kernel send context, failing\n");
172		− dd->rcd[rcd->ctxt] = NULL;
173		− hfi1_free_ctxtdata(dd, rcd);
174	174	goto nomem;
175	175	}
176	176
@@ -178,9 +178,6 @@ int hfi1_create_ctxts(struct hfi1_devdata *dd) · 1 unmodified line
178	178	if (ret < 0) {
179	179	dd_dev_err(dd,
180	180	"Failed to setup kernel receive context, failing\n");
181		− sc_free(rcd->sc);
182		− dd->rcd[rcd->ctxt] = NULL;
183		− hfi1_free_ctxtdata(dd, rcd);
184	181	ret = -EFAULT;
185	182	goto bail;
186	183	}
@@ -196,6 +193,10 @@ int hfi1_create_ctxts(struct hfi1_devdata *dd) · 9 unmodified lines
196	193	nomem:
197	194	ret = -ENOMEM;
198	195	bail:
	196	+ if (dd->rcd) {
	197	+ for (i = 0; i < dd->num_rcv_contexts; ++i)
	198	+ hfi1_free_ctxtdata(dd, dd->rcd[i]);
	199	+ }
199	200	kfree(dd->rcd);
200	201	dd->rcd = NULL;
201	202	return ret;
@@ -216,7 +217,7 @@ struct hfi1_ctxtdata hfi1_create_ctxtdata(struct hfi1_pportdata ppd, u32 ctxt, · 14 unmodified lines
216	217	dd->num_rcv_contexts - dd->first_user_ctxt)
217	218	kctxt_ngroups = (dd->rcv_entries.nctxt_extra -
218	219	(dd->num_rcv_contexts - dd->first_user_ctxt));
219		− rcd = kzalloc(sizeof(*rcd), GFP_KERNEL);
	220	+ rcd = kzalloc_node(sizeof(*rcd), GFP_KERNEL, numa);
220	221	if (rcd) {
221	222	u32 rcvtids, max_entries;
222	223
@@ -261,13 +262,6 @@ struct hfi1_ctxtdata hfi1_create_ctxtdata(struct hfi1_pportdata ppd, u32 ctxt, · 38 unmodified lines
261	262	}
262	263	rcd->eager_base = base * dd->rcv_entries.group_size;
263	264
264		− /* Validate and initialize Rcv Hdr Q variables */
265		− if (rcvhdrcnt % HDRQ_INCREMENT) {
266		− dd_dev_err(dd,
267		− "ctxt%u: header queue count %d must be divisible by %lu\n",
268		− rcd->ctxt, rcvhdrcnt, HDRQ_INCREMENT);
269		− goto bail;
270		− }
271	265	rcd->rcvhdrq_cnt = rcvhdrcnt;
272	266	rcd->rcvhdrqentsize = hfi1_hdrq_entsize;
273	267	/*
@@ -506,7 +500,6 @@ void hfi1_init_pportdata(struct pci_dev pdev, struct hfi1_pportdata ppd, · 232 unmodified lines
506	500	INIT_WORK(&ppd->qsfp_info.qsfp_work, qsfp_event);
507	501
508	502	mutex_init(&ppd->hls_lock);
509		− spin_lock_init(&ppd->sdma_alllock);
510	503	spin_lock_init(&ppd->qsfp_info.qsfp_lock);
511	504
512	505	ppd->qsfp_info.ppd = ppd;
@@ -1399,28 +1392,43 @@ static void postinit_cleanup(struct hfi1_devdata *dd) · 886 unmodified lines
1399	1392	hfi1_free_devdata(dd);
1400	1393	}
1401	1394
	1395	+static int init_validate_rcvhdrcnt(struct device *dev, uint thecnt)
	1396	+{
	1397	+ if (thecnt <= HFI1_MIN_HDRQ_EGRBUF_CNT) {
	1398	+ hfi1_early_err(dev, "Receive header queue count too small\n");
	1399	+ return -EINVAL;
	1400	+ }
	1401	+
	1402	+ if (thecnt > HFI1_MAX_HDRQ_EGRBUF_CNT) {
	1403	+ hfi1_early_err(dev,
	1404	+ "Receive header queue count cannot be greater than %u\n",
	1405	+ HFI1_MAX_HDRQ_EGRBUF_CNT);
	1406	+ return -EINVAL;
	1407	+ }
	1408	+
	1409	+ if (thecnt % HDRQ_INCREMENT) {
	1410	+ hfi1_early_err(dev, "Receive header queue count %d must be divisible by %lu\n",
	1411	+ thecnt, HDRQ_INCREMENT);
	1412	+ return -EINVAL;
	1413	+ }
	1414	+
	1415	+ return 0;
	1416	+}
	1417	+
1402	1418	static int init_one(struct pci_dev pdev, const struct pci_device_id ent)
1403	1419	{
1404	1420	int ret = 0, j, pidx, initfail;
1405		− struct hfi1_devdata *dd = ERR_PTR(-EINVAL);
	1421	+ struct hfi1_devdata *dd;
1406	1422	struct hfi1_pportdata *ppd;
1407	1423
1408	1424	/* First, lock the non-writable module parameters */
1409	1425	HFI1_CAP_LOCK();
1410	1426
1411	1427	/* Validate some global module parameters */
1412		− if (rcvhdrcnt <= HFI1_MIN_HDRQ_EGRBUF_CNT) {
1413		− hfi1_early_err(&pdev->dev, "Header queue count too small\n");
1414		− ret = -EINVAL;
1415		− goto bail;
1416		− }
1417		− if (rcvhdrcnt > HFI1_MAX_HDRQ_EGRBUF_CNT) {
1418		− hfi1_early_err(&pdev->dev,
1419		− "Receive header queue count cannot be greater than %u\n",
1420		− HFI1_MAX_HDRQ_EGRBUF_CNT);
1421		− ret = -EINVAL;
	1428	+ ret = init_validate_rcvhdrcnt(&pdev->dev, rcvhdrcnt);
	1429	+ if (ret)
1422	1430	goto bail;
1423		− }
	1431	+
1424	1432	/* use the encoding function as a sanitization check */
1425	1433	if (!encode_rcv_header_entry_size(hfi1_hdrq_entsize)) {
1426	1434	hfi1_early_err(&pdev->dev, "Invalid HdrQ Entry size %u\n",
@@ -1461,26 +1469,25 @@ static int init_one(struct pci_dev pdev, const struct pci_device_id ent) · 34 unmodified lines
1461	1469	if (ret)
1462	1470	goto bail;
1463	1471
1464		− /*
1465		− * Do device-specific initialization, function table setup, dd
1466		− * allocation, etc.
1467		− */
1468		− switch (ent->device) {
1469		− case PCI_DEVICE_ID_INTEL0:
1470		− case PCI_DEVICE_ID_INTEL1:
1471		− dd = hfi1_init_dd(pdev, ent);
1472		− break;
1473		− default:
	1472	+ if (!(ent->device == PCI_DEVICE_ID_INTEL0 \|\|
	1473	+ ent->device == PCI_DEVICE_ID_INTEL1)) {
1474	1474	hfi1_early_err(&pdev->dev,
1475	1475	"Failing on unknown Intel deviceid 0x%x\n",
1476	1476	ent->device);
1477	1477	ret = -ENODEV;
	1478	+ goto clean_bail;
1478	1479	}
1479	1480
1480		− if (IS_ERR(dd))
	1481	+ /*
	1482	+ * Do device-specific initialization, function table setup, dd
	1483	+ * allocation, etc.
	1484	+ */
	1485	+ dd = hfi1_init_dd(pdev, ent);
	1486	+
	1487	+ if (IS_ERR(dd)) {
1481	1488	ret = PTR_ERR(dd);
1482		− if (ret)
1483	1489	goto clean_bail; /* error already printed */
	1490	+ }
1484	1491
1485	1492	ret = create_workqueues(dd);
1486	1493	if (ret)
@@ -1538,12 +1545,31 @@ bail: · 51 unmodified lines
1538	1545	return ret;
1539	1546	}
1540	1547
	1548	+static void wait_for_clients(struct hfi1_devdata *dd)
	1549	+{
	1550	+ /*
	1551	+ * Remove the device init value and complete the device if there is
	1552	+ * no clients or wait for active clients to finish.
	1553	+ */
	1554	+ if (atomic_dec_and_test(&dd->user_refcount))
	1555	+ complete(&dd->user_comp);
	1556	+
	1557	+ wait_for_completion(&dd->user_comp);
	1558	+}
	1559	+
1541	1560	static void remove_one(struct pci_dev *pdev)
1542	1561	{
1543	1562	struct hfi1_devdata *dd = pci_get_drvdata(pdev);
1544	1563
1545	1564	/* close debugfs files before ib unregister */
1546	1565	hfi1_dbg_ibdev_exit(&dd->verbs_dev);
	1566	+
	1567	+ /* remove the /dev hfi1 interface */
	1568	+ hfi1_device_remove(dd);
	1569	+
	1570	+ /* wait for existing user space clients to finish */
	1571	+ wait_for_clients(dd);
	1572	+
1547	1573	/* unregister from IB core */
1548	1574	hfi1_unregister_ib_device(dd);
1549	1575
@@ -1558,8 +1584,6 @@ static void remove_one(struct pci_dev *pdev) · 8 unmodified lines
1558	1584	/* wait until all of our (qsfp) queue_work() calls complete */
1559	1585	flush_workqueue(ib_wq);
1560	1586
1561		− hfi1_device_remove(dd);
1562		−
1563	1587	postinit_cleanup(dd);
1564	1588	}
1565	1589

drivers/infiniband/hw/hfi1/pcie.c+1−2

@@ -157,8 +157,7 @@ void hfi1_pcie_cleanup(struct pci_dev *pdev) · 156 unmodified lines
157	157	* fields required to re-initialize after a chip reset, or for
158	158	* various other purposes
159	159	*/
160		−int hfi1_pcie_ddinit(struct hfi1_devdata dd, struct pci_dev pdev,
161		− const struct pci_device_id *ent)
	160	+int hfi1_pcie_ddinit(struct hfi1_devdata dd, struct pci_dev pdev)
162	161	{
163	162	unsigned long len;
164	163	resource_size_t addr;

drivers/infiniband/hw/hfi1/pio.c+3−10

@@ -668,19 +668,12 @@ void sc_set_cr_threshold(struct send_context *sc, u32 new_threshold) · 667 unmodified lines
668	668	void set_pio_integrity(struct send_context *sc)
669	669	{
670	670	struct hfi1_devdata *dd = sc->dd;
671		− u64 reg = 0;
672	671	u32 hw_context = sc->hw_context;
673	672	int type = sc->type;
674	673
675		− /*
676		− * No integrity checks if HFI1_CAP_NO_INTEGRITY is set, or if
677		− * we're snooping.
678		− */
679		− if (likely(!HFI1_CAP_IS_KSET(NO_INTEGRITY)) &&
680		− dd->hfi1_snoop.mode_flag != HFI1_PORT_SNOOP_MODE)
681		− reg = hfi1_pkt_default_send_ctxt_mask(dd, type);
682		−
683		− write_kctxt_csr(dd, hw_context, SC(CHECK_ENABLE), reg);
	674	+ write_kctxt_csr(dd, hw_context,
	675	+ SC(CHECK_ENABLE),
	676	+ hfi1_pkt_default_send_ctxt_mask(dd, type));
684	677	}
685	678
686	679	static u32 get_buffers_allocated(struct send_context *sc)

drivers/infiniband/hw/hfi1/rc.c+1−1

@@ -89,7 +89,7 @@ void hfi1_add_rnr_timer(struct rvt_qp *qp, u32 to) · 88 unmodified lines
89	89
90	90	lockdep_assert_held(&qp->s_lock);
91	91	qp->s_flags \|= RVT_S_WAIT_RNR;
92		− qp->s_timer.expires = jiffies + usecs_to_jiffies(to);
	92	+ priv->s_rnr_timer.expires = jiffies + usecs_to_jiffies(to);
93	93	add_timer(&priv->s_rnr_timer);
94	94	}
95	95

drivers/infiniband/hw/hfi1/sdma.c+2−17

@@ -2009,11 +2009,6 @@ static void sdma_hw_start_up(struct sdma_engine *sde) · 2008 unmodified lines
2009	2009	write_sde_csr(sde, SD(ENG_ERR_CLEAR), reg);
2010	2010	}
2011	2011
2012		−#define CLEAR_STATIC_RATE_CONTROL_SMASK(r) \
2013		−(r &= ~SEND_DMA_CHECK_ENABLE_DISALLOW_PBC_STATIC_RATE_CONTROL_SMASK)
2014		−
2015		−#define SET_STATIC_RATE_CONTROL_SMASK(r) \
2016		−(r \|= SEND_DMA_CHECK_ENABLE_DISALLOW_PBC_STATIC_RATE_CONTROL_SMASK)
2017	2012	/*
2018	2013	* set_sdma_integrity
2019	2014	*
@@ -2022,19 +2017,9 @@ static void sdma_hw_start_up(struct sdma_engine *sde) · 2 unmodified lines
2022	2017	static void set_sdma_integrity(struct sdma_engine *sde)
2023	2018	{
2024	2019	struct hfi1_devdata *dd = sde->dd;
2025		− u64 reg;
2026		−
2027		− if (unlikely(HFI1_CAP_IS_KSET(NO_INTEGRITY)))
2028		− return;
2029		−
2030		− reg = hfi1_pkt_base_sdma_integrity(dd);
2031		−
2032		− if (HFI1_CAP_IS_KSET(STATIC_RATE_CTRL))
2033		− CLEAR_STATIC_RATE_CONTROL_SMASK(reg);
2034		− else
2035		− SET_STATIC_RATE_CONTROL_SMASK(reg);
2036	2020
2037		− write_sde_csr(sde, SD(CHECK_ENABLE), reg);
	2021	+ write_sde_csr(sde, SD(CHECK_ENABLE),
	2022	+ hfi1_pkt_base_sdma_integrity(dd));
2038	2023	}
2039	2024
2040	2025	static void init_sdma_regs(

drivers/infiniband/hw/hfi1/sysfs.c+0−25

@@ -49,7 +49,6 @@ · 48 unmodified lines
49	49	#include "hfi.h"
50	50	#include "mad.h"
51	51	#include "trace.h"
52		−#include "affinity.h"
53	52
54	53	/*
55	54	* Start of per-port congestion control structures and support code
@@ -623,27 +622,6 @@ static ssize_t show_tempsense(struct device *device, · 567 unmodified lines
623	622	return ret;
624	623	}
625	624
626		−static ssize_t show_sdma_affinity(struct device *device,
627		− struct device_attribute attr, char buf)
628		−{
629		− struct hfi1_ibdev *dev =
630		− container_of(device, struct hfi1_ibdev, rdi.ibdev.dev);
631		− struct hfi1_devdata *dd = dd_from_dev(dev);
632		−
633		− return hfi1_get_sdma_affinity(dd, buf);
634		−}
635		−
636		−static ssize_t store_sdma_affinity(struct device *device,
637		− struct device_attribute *attr,
638		− const char *buf, size_t count)
639		−{
640		− struct hfi1_ibdev *dev =
641		− container_of(device, struct hfi1_ibdev, rdi.ibdev.dev);
642		− struct hfi1_devdata *dd = dd_from_dev(dev);
643		−
644		− return hfi1_set_sdma_affinity(dd, buf, count);
645		−}
646		−
647	625	/*
648	626	* end of per-unit (or driver, in some cases, but replicated
649	627	* per unit) functions
@@ -658,8 +636,6 @@ static DEVICE_ATTR(serial, S_IRUGO, show_serial, NULL); · 8 unmodified lines
658	636	static DEVICE_ATTR(boardversion, S_IRUGO, show_boardversion, NULL);
659	637	static DEVICE_ATTR(tempsense, S_IRUGO, show_tempsense, NULL);
660	638	static DEVICE_ATTR(chip_reset, S_IWUSR, NULL, store_chip_reset);
661		−static DEVICE_ATTR(sdma_affinity, S_IWUSR \| S_IRUGO, show_sdma_affinity,
662		− store_sdma_affinity);
663	639
664	640	static struct device_attribute *hfi1_attributes[] = {
665	641	&dev_attr_hw_rev,
@@ -670,7 +646,6 @@ static struct device_attribute *hfi1_attributes[] = { · 4 unmodified lines
670	646	&dev_attr_boardversion,
671	647	&dev_attr_tempsense,
672	648	&dev_attr_chip_reset,
673		− &dev_attr_sdma_affinity,
674	649	};
675	650
676	651	int hfi1_create_port_files(struct ib_device *ibdev, u8 port_num,

drivers/infiniband/hw/hfi1/trace_rx.h+0−60

@@ -253,66 +253,6 @@ TRACE_EVENT(hfi1_mmu_invalidate, · 252 unmodified lines
253	253	)
254	254	);
255	255
256		−#define SNOOP_PRN \
257		− "slid %.4x dlid %.4x qpn 0x%.6x opcode 0x%.2x,%s " \
258		− "svc lvl %d pkey 0x%.4x [header = %d bytes] [data = %d bytes]"
259		−
260		−TRACE_EVENT(snoop_capture,
261		− TP_PROTO(struct hfi1_devdata *dd,
262		− int hdr_len,
263		− struct ib_header *hdr,
264		− int data_len,
265		− void *data),
266		− TP_ARGS(dd, hdr_len, hdr, data_len, data),
267		− TP_STRUCT__entry(
268		− DD_DEV_ENTRY(dd)
269		− __field(u16, slid)
270		− __field(u16, dlid)
271		− __field(u32, qpn)
272		− __field(u8, opcode)
273		− __field(u8, sl)
274		− __field(u16, pkey)
275		− __field(u32, hdr_len)
276		− __field(u32, data_len)
277		− __field(u8, lnh)
278		− __dynamic_array(u8, raw_hdr, hdr_len)
279		− __dynamic_array(u8, raw_pkt, data_len)
280		− ),
281		− TP_fast_assign(
282		− struct ib_other_headers *ohdr;
283		−
284		− __entry->lnh = (u8)(be16_to_cpu(hdr->lrh[0]) & 3);
285		− if (__entry->lnh == HFI1_LRH_BTH)
286		− ohdr = &hdr->u.oth;
287		− else
288		− ohdr = &hdr->u.l.oth;
289		− DD_DEV_ASSIGN(dd);
290		− __entry->slid = be16_to_cpu(hdr->lrh[3]);
291		− __entry->dlid = be16_to_cpu(hdr->lrh[1]);
292		− __entry->qpn = be32_to_cpu(ohdr->bth[1]) & RVT_QPN_MASK;
293		− __entry->opcode = (be32_to_cpu(ohdr->bth[0]) >> 24) & 0xff;
294		− __entry->sl = (u8)(be16_to_cpu(hdr->lrh[0]) >> 4) & 0xf;
295		− __entry->pkey = be32_to_cpu(ohdr->bth[0]) & 0xffff;
296		− __entry->hdr_len = hdr_len;
297		− __entry->data_len = data_len;
298		− memcpy(__get_dynamic_array(raw_hdr), hdr, hdr_len);
299		− memcpy(__get_dynamic_array(raw_pkt), data, data_len);
300		− ),
301		− TP_printk(
302		− "[%s] " SNOOP_PRN,
303		− __get_str(dev),
304		− __entry->slid,
305		− __entry->dlid,
306		− __entry->qpn,
307		− __entry->opcode,
308		− show_ib_opcode(__entry->opcode),
309		− __entry->sl,
310		− __entry->pkey,
311		− __entry->hdr_len,
312		− __entry->data_len
313		− )
314		−);
315		−
316	256	#endif /* __HFI1_TRACE_RX_H */
317	257
318	258	#undef TRACE_INCLUDE_PATH

drivers/infiniband/hw/hfi1/user_sdma.c+1−1

@@ -1144,7 +1144,7 @@ static int pin_vector_pages(struct user_sdma_request *req, · 1143 unmodified lines
1144	1144	rb_node = hfi1_mmu_rb_extract(pq->handler,
1145	1145	(unsigned long)iovec->iov.iov_base,
1146	1146	iovec->iov.iov_len);
1147		− if (rb_node && !IS_ERR(rb_node))
	1147	+ if (rb_node)
1148	1148	node = container_of(rb_node, struct sdma_mmu_node, rb);
1149	1149	else
1150	1150	rb_node = NULL;

drivers/infiniband/hw/mlx4/ah.c+4−1

@@ -102,7 +102,10 @@ static struct ib_ah create_iboe_ah(struct ib_pd pd, struct ib_ah_attr *ah_attr · 101 unmodified lines
102	102	if (vlan_tag < 0x1000)
103	103	vlan_tag \|= (ah_attr->sl & 7) << 13;
104	104	ah->av.eth.port_pd = cpu_to_be32(to_mpd(pd)->pdn \| (ah_attr->port_num << 24));
105		− ah->av.eth.gid_index = mlx4_ib_gid_index_to_real_index(ibdev, ah_attr->port_num, ah_attr->grh.sgid_index);
	105	+ ret = mlx4_ib_gid_index_to_real_index(ibdev, ah_attr->port_num, ah_attr->grh.sgid_index);
	106	+ if (ret < 0)
	107	+ return ERR_PTR(ret);
	108	+ ah->av.eth.gid_index = ret;
106	109	ah->av.eth.vlan = cpu_to_be16(vlan_tag);
107	110	ah->av.eth.hop_limit = ah_attr->grh.hop_limit;
108	111	if (ah_attr->static_rate) {

drivers/infiniband/hw/mlx4/cq.c+4−1

@@ -253,11 +253,14 @@ struct ib_cq mlx4_ib_create_cq(struct ib_device ibdev, · 252 unmodified lines
253	253	if (context)
254	254	if (ib_copy_to_udata(udata, &cq->mcq.cqn, sizeof (__u32))) {
255	255	err = -EFAULT;
256		− goto err_dbmap;
	256	+ goto err_cq_free;
257	257	}
258	258
259	259	return &cq->ibcq;
260	260
	261	+err_cq_free:
	262	+ mlx4_cq_free(dev->dev, &cq->mcq);
	263	+
261	264	err_dbmap:
262	265	if (context)
263	266	mlx4_ib_db_unmap_user(to_mucontext(context), &cq->db);

drivers/infiniband/hw/mlx5/cq.c+1−2

@@ -932,8 +932,7 @@ struct ib_cq mlx5_ib_create_cq(struct ib_device ibdev, · 931 unmodified lines
932	932	if (err)
933	933	goto err_create;
934	934	} else {
935		− /* for now choose 64 bytes till we have a proper interface */
936		− cqe_size = 64;
	935	+ cqe_size = cache_line_size() == 128 ? 128 : 64;
937	936	err = create_cq_kernel(dev, cq, entries, cqe_size, &cqb,
938	937	&index, &inlen);
939	938	if (err)

drivers/infiniband/hw/mlx5/main.c+7−4

@@ -2311,14 +2311,14 @@ static void mlx5_ib_event(struct mlx5_core_dev dev, void context, · 2310 unmodified lines
2311	2311	{
2312	2312	struct mlx5_ib_dev ibdev = (struct mlx5_ib_dev )context;
2313	2313	struct ib_event ibev;
2314		−
	2314	+ bool fatal = false;
2315	2315	u8 port = 0;
2316	2316
2317	2317	switch (event) {
2318	2318	case MLX5_DEV_EVENT_SYS_ERROR:
2319		− ibdev->ib_active = false;
2320	2319	ibev.event = IB_EVENT_DEVICE_FATAL;
2321	2320	mlx5_ib_handle_internal_error(ibdev);
	2321	+ fatal = true;
2322	2322	break;
2323	2323
2324	2324	case MLX5_DEV_EVENT_PORT_UP:
@@ -2372,6 +2372,9 @@ static void mlx5_ib_event(struct mlx5_core_dev dev, void context, · 47 unmodified lines
2372	2372
2373	2373	if (ibdev->ib_active)
2374	2374	ib_dispatch_event(&ibev);
	2375	+
	2376	+ if (fatal)
	2377	+ ibdev->ib_active = false;
2375	2378	}
2376	2379
2377	2380	static void get_ext_port_caps(struct mlx5_ib_dev *dev)
@@ -3117,7 +3120,7 @@ static void mlx5_ib_add(struct mlx5_core_dev mdev) · 739 unmodified lines
3117	3120	}
3118	3121	err = init_node_data(dev);
3119	3122	if (err)
3120		− goto err_dealloc;
	3123	+ goto err_free_port;
3121	3124
3122	3125	mutex_init(&dev->flow_db.lock);
3123	3126	mutex_init(&dev->cap_mask_mutex);
@@ -3127,7 +3130,7 @@ static void mlx5_ib_add(struct mlx5_core_dev mdev) · 3 unmodified lines
3127	3130	if (ll == IB_LINK_LAYER_ETHERNET) {
3128	3131	err = mlx5_enable_roce(dev);
3129	3132	if (err)
3130		− goto err_dealloc;
	3133	+ goto err_free_port;
3131	3134	}
3132	3135
3133	3136	err = create_dev_resources(&dev->devr);

drivers/infiniband/hw/mlx5/mlx5_ib.h+2−0

@@ -626,6 +626,8 @@ struct mlx5_ib_dev { · 625 unmodified lines
626	626	struct mlx5_ib_resources devr;
627	627	struct mlx5_mr_cache cache;
628	628	struct timer_list delay_timer;
	629	+ /* Prevents soft lock on massive reg MRs */
	630	+ struct mutex slow_path_mutex;
629	631	int fill_delay;
630	632	#ifdef CONFIG_INFINIBAND_ON_DEMAND_PAGING
631	633	struct ib_odp_caps odp_caps;

drivers/infiniband/hw/mlx5/mr.c+5−1

@@ -610,6 +610,7 @@ int mlx5_mr_cache_init(struct mlx5_ib_dev *dev) · 609 unmodified lines
610	610	int err;
611	611	int i;
612	612
	613	+ mutex_init(&dev->slow_path_mutex);
613	614	cache->wq = alloc_ordered_workqueue("mkey_cache", WQ_MEM_RECLAIM);
614	615	if (!cache->wq) {
615	616	mlx5_ib_warn(dev, "failed to create work queue\n");
@@ -1182,9 +1183,12 @@ struct ib_mr mlx5_ib_reg_user_mr(struct ib_pd pd, u64 start, u64 length, · 566 unmodified lines
1182	1183	goto error;
1183	1184	}
1184	1185
1185		− if (!mr)
	1186	+ if (!mr) {
	1187	+ mutex_lock(&dev->slow_path_mutex);
1186	1188	mr = reg_create(NULL, pd, virt_addr, length, umem, ncont,
1187	1189	page_shift, access_flags);
	1190	+ mutex_unlock(&dev->slow_path_mutex);
	1191	+ }
1188	1192
1189	1193	if (IS_ERR(mr)) {
1190	1194	err = PTR_ERR(mr);

drivers/infiniband/hw/mlx5/qp.c+10−2

@@ -2051,8 +2051,8 @@ struct ib_qp mlx5_ib_create_qp(struct ib_pd pd, · 2050 unmodified lines
2051	2051
2052	2052	mlx5_ib_dbg(dev, "ib qpnum 0x%x, mlx qpn 0x%x, rcqn 0x%x, scqn 0x%x\n",
2053	2053	qp->ibqp.qp_num, qp->trans_qp.base.mqp.qpn,
2054		− to_mcq(init_attr->recv_cq)->mcq.cqn,
2055		− to_mcq(init_attr->send_cq)->mcq.cqn);
	2054	+ init_attr->recv_cq ? to_mcq(init_attr->recv_cq)->mcq.cqn : -1,
	2055	+ init_attr->send_cq ? to_mcq(init_attr->send_cq)->mcq.cqn : -1);
2056	2056
2057	2057	qp->trans_qp.xrcdn = xrcdn;
2058	2058
@@ -4814,6 +4814,14 @@ struct ib_rwq_ind_table mlx5_ib_create_rwq_ind_table(struct ib_device device, · 2755 unmodified lines
4814	4814	udata->inlen))
4815	4815	return ERR_PTR(-EOPNOTSUPP);
4816	4816
	4817	+ if (init_attr->log_ind_tbl_size >
	4818	+ MLX5_CAP_GEN(dev->mdev, log_max_rqt_size)) {
	4819	+ mlx5_ib_dbg(dev, "log_ind_tbl_size = %d is bigger than supported = %d\n",
	4820	+ init_attr->log_ind_tbl_size,
	4821	+ MLX5_CAP_GEN(dev->mdev, log_max_rqt_size));
	4822	+ return ERR_PTR(-EINVAL);
	4823	+ }
	4824	+
4817	4825	min_resp_len = offsetof(typeof(resp), reserved) + sizeof(resp.reserved);
4818	4826	if (udata->outlen && udata->outlen < min_resp_len)
4819	4827	return ERR_PTR(-EINVAL);

drivers/infiniband/sw/rdmavt/dma.c+0−3

@@ -90,9 +90,6 @@ static u64 rvt_dma_map_page(struct ib_device dev, struct page page, · 89 unmodified lines
90	90	if (WARN_ON(!valid_dma_direction(direction)))
91	91	return BAD_DMA_ADDRESS;
92	92
93		− if (offset + size > PAGE_SIZE)
94		− return BAD_DMA_ADDRESS;
95		−
96	93	addr = (u64)page_address(page);
97	94	if (addr)
98	95	addr += offset;

drivers/infiniband/sw/rxe/rxe_net.c+2−6

@@ -243,10 +243,8 @@ static struct socket rxe_setup_udp_tunnel(struct net net, __be16 port, · 242 unmodified lines
243	243	{
244	244	int err;
245	245	struct socket *sock;
246		− struct udp_port_cfg udp_cfg;
247		− struct udp_tunnel_sock_cfg tnl_cfg;
248		−
249		− memset(&udp_cfg, 0, sizeof(udp_cfg));
	246	+ struct udp_port_cfg udp_cfg = {0};
	247	+ struct udp_tunnel_sock_cfg tnl_cfg = {0};
250	248
251	249	if (ipv6) {
252	250	udp_cfg.family = AF_INET6;
@@ -264,10 +262,8 @@ static struct socket rxe_setup_udp_tunnel(struct net net, __be16 port, · 11 unmodified lines
264	262	return ERR_PTR(err);
265	263	}
266	264
267		− tnl_cfg.sk_user_data = NULL;
268	265	tnl_cfg.encap_type = 1;
269	266	tnl_cfg.encap_rcv = rxe_udp_encap_recv;
270		− tnl_cfg.encap_destroy = NULL;
271	267
272	268	/* Setup UDP tunnel */
273	269	setup_udp_tunnel_sock(net, sock, &tnl_cfg);

drivers/infiniband/sw/rxe/rxe_qp.c+2−0

@@ -522,6 +522,7 @@ static void rxe_qp_reset(struct rxe_qp *qp) · 521 unmodified lines
522	522	if (qp->sq.queue) {
523	523	__rxe_do_task(&qp->comp.task);
524	524	__rxe_do_task(&qp->req.task);
	525	+ rxe_queue_reset(qp->sq.queue);
525	526	}
526	527
527	528	/* cleanup attributes */
@@ -573,6 +574,7 @@ void rxe_qp_error(struct rxe_qp *qp) · 45 unmodified lines
573	574	{
574	575	qp->req.state = QP_STATE_ERROR;
575	576	qp->resp.state = QP_STATE_ERROR;
	577	+ qp->attr.qp_state = IB_QPS_ERR;
576	578
577	579	/* drain work and packet queues */
578	580	rxe_run_task(&qp->resp.task, 1);

drivers/infiniband/sw/rxe/rxe_queue.c+9−0

@@ -84,6 +84,15 @@ err1: · 83 unmodified lines
84	84	return -EINVAL;
85	85	}
86	86
	87	+inline void rxe_queue_reset(struct rxe_queue *q)
	88	+{
	89	+ /* queue is comprised from header and the memory
	90	+ * of the actual queue. See "struct rxe_queue_buf" in rxe_queue.h
	91	+ * reset only the queue itself and not the management header
	92	+ */
	93	+ memset(q->buf->data, 0, q->buf_size - sizeof(struct rxe_queue_buf));
	94	+}
	95	+
87	96	struct rxe_queue rxe_queue_init(struct rxe_dev rxe,
88	97	int *num_elem,
89	98	unsigned int elem_size)

drivers/infiniband/sw/rxe/rxe_queue.h+2−0

@@ -84,6 +84,8 @@ int do_mmap_info(struct rxe_dev *rxe, · 83 unmodified lines
84	84	size_t buf_size,
85	85	struct rxe_mmap_info **ip_p);
86	86
	87	+void rxe_queue_reset(struct rxe_queue *q);
	88	+
87	89	struct rxe_queue rxe_queue_init(struct rxe_dev rxe,
88	90	int *num_elem,
89	91	unsigned int elem_size);

drivers/infiniband/sw/rxe/rxe_req.c+13−8

@@ -696,7 +696,8 @@ next_wqe: · 695 unmodified lines
696	696	qp->req.wqe_index);
697	697	wqe->state = wqe_state_done;
698	698	wqe->status = IB_WC_SUCCESS;
699		− goto complete;
	699	+ __rxe_do_task(&qp->comp.task);
	700	+ return 0;
700	701	}
701	702	payload = mtu;
702	703	}
@@ -745,13 +746,17 @@ err: · 42 unmodified lines
745	746	wqe->status = IB_WC_LOC_PROT_ERR;
746	747	wqe->state = wqe_state_error;
747	748
748		−complete:
749		− if (qp_type(qp) != IB_QPT_RC) {
750		− while (rxe_completer(qp) == 0)
751		− ;
752		− }
753		−
754		− return 0;
	749	+ /*
	750	+ * IBA Spec. Section 10.7.3.1 SIGNALED COMPLETIONS
	751	+ * ---------8<---------8<-------------
	752	+ * ...Note that if a completion error occurs, a Work Completion
	753	+ * will always be generated, even if the signaling
	754	+ * indicator requests an Unsignaled Completion.
	755	+ * ---------8<---------8<-------------
	756	+ */
	757	+ wqe->wr.send_flags \|= IB_SEND_SIGNALED;
	758	+ __rxe_do_task(&qp->comp.task);
	759	+ return -EAGAIN;
755	760
756	761	exit:
757	762	return -EAGAIN;

drivers/mailbox/pcc.c+7−6

@@ -65,6 +65,7 @@ · 64 unmodified lines
65	65	#include <linux/mailbox_controller.h>
66	66	#include <linux/mailbox_client.h>
67	67	#include <linux/io-64-nonatomic-lo-hi.h>
	68	+#include <acpi/pcc.h>
68	69
69	70	#include "mailbox.h"
70	71
@@ -267,6 +268,8 @@ struct mbox_chan pcc_mbox_request_channel(struct mbox_client cl, · 196 unmodified lines
267	268	if (chan->txdone_method == TXDONE_BY_POLL && cl->knows_txdone)
268	269	chan->txdone_method \|= TXDONE_BY_ACK;
269	270
	271	+ spin_unlock_irqrestore(&chan->lock, flags);
	272	+
270	273	if (pcc_doorbell_irq[subspace_id] > 0) {
271	274	int rc;
272	275
@@ -275,12 +278,11 @@ struct mbox_chan pcc_mbox_request_channel(struct mbox_client cl, · 2 unmodified lines
275	278	if (unlikely(rc)) {
276	279	dev_err(dev, "failed to register PCC interrupt %d\n",
277	280	pcc_doorbell_irq[subspace_id]);
	281	+ pcc_mbox_free_channel(chan);
278	282	chan = ERR_PTR(rc);
279	283	}
280	284	}
281	285
282		− spin_unlock_irqrestore(&chan->lock, flags);
283		−
284	286	return chan;
285	287	}
286	288	EXPORT_SYMBOL_GPL(pcc_mbox_request_channel);
@@ -304,20 +306,19 @@ void pcc_mbox_free_channel(struct mbox_chan *chan) · 17 unmodified lines
304	306	return;
305	307	}
306	308
	309	+ if (pcc_doorbell_irq[id] > 0)
	310	+ devm_free_irq(chan->mbox->dev, pcc_doorbell_irq[id], chan);
	311	+
307	312	spin_lock_irqsave(&chan->lock, flags);
308	313	chan->cl = NULL;
309	314	chan->active_req = NULL;
310	315	if (chan->txdone_method == (TXDONE_BY_POLL \| TXDONE_BY_ACK))
311	316	chan->txdone_method = TXDONE_BY_POLL;
312	317
313		− if (pcc_doorbell_irq[id] > 0)
314		− devm_free_irq(chan->mbox->dev, pcc_doorbell_irq[id], chan);
315		−
316	318	spin_unlock_irqrestore(&chan->lock, flags);
317	319	}
318	320	EXPORT_SYMBOL_GPL(pcc_mbox_free_channel);
319	321
320		−
321	322	/**
322	323	* pcc_send_data - Called from Mailbox Controller code. Used
323	324	* here only to ring the channel doorbell. The PCC client

drivers/mfd/intel-lpss-pci.c+9−22

@@ -123,19 +123,6 @@ static const struct intel_lpss_platform_info apl_i2c_info = { · 122 unmodified lines
123	123	.properties = apl_i2c_properties,
124	124	};
125	125
126		−static const struct intel_lpss_platform_info kbl_info = {
127		− .clk_rate = 120000000,
128		−};
129		−
130		−static const struct intel_lpss_platform_info kbl_uart_info = {
131		− .clk_rate = 120000000,
132		− .clk_con_id = "baudclk",
133		−};
134		−
135		−static const struct intel_lpss_platform_info kbl_i2c_info = {
136		− .clk_rate = 133000000,
137		−};
138		−
139	126	static const struct pci_device_id intel_lpss_pci_ids[] = {
140	127	/* BXT A-Step */
141	128	{ PCI_VDEVICE(INTEL, 0x0aac), (kernel_ulong_t)&bxt_i2c_info },
@@ -207,15 +194,15 @@ static const struct pci_device_id intel_lpss_pci_ids[] = { · 65 unmodified lines
207	194	{ PCI_VDEVICE(INTEL, 0xa161), (kernel_ulong_t)&spt_i2c_info },
208	195	{ PCI_VDEVICE(INTEL, 0xa166), (kernel_ulong_t)&spt_uart_info },
209	196	/* KBL-H */
210		− { PCI_VDEVICE(INTEL, 0xa2a7), (kernel_ulong_t)&kbl_uart_info },
211		− { PCI_VDEVICE(INTEL, 0xa2a8), (kernel_ulong_t)&kbl_uart_info },
212		− { PCI_VDEVICE(INTEL, 0xa2a9), (kernel_ulong_t)&kbl_info },
213		− { PCI_VDEVICE(INTEL, 0xa2aa), (kernel_ulong_t)&kbl_info },
214		− { PCI_VDEVICE(INTEL, 0xa2e0), (kernel_ulong_t)&kbl_i2c_info },
215		− { PCI_VDEVICE(INTEL, 0xa2e1), (kernel_ulong_t)&kbl_i2c_info },
216		− { PCI_VDEVICE(INTEL, 0xa2e2), (kernel_ulong_t)&kbl_i2c_info },
217		− { PCI_VDEVICE(INTEL, 0xa2e3), (kernel_ulong_t)&kbl_i2c_info },
218		− { PCI_VDEVICE(INTEL, 0xa2e6), (kernel_ulong_t)&kbl_uart_info },
	197	+ { PCI_VDEVICE(INTEL, 0xa2a7), (kernel_ulong_t)&spt_uart_info },
	198	+ { PCI_VDEVICE(INTEL, 0xa2a8), (kernel_ulong_t)&spt_uart_info },
	199	+ { PCI_VDEVICE(INTEL, 0xa2a9), (kernel_ulong_t)&spt_info },
	200	+ { PCI_VDEVICE(INTEL, 0xa2aa), (kernel_ulong_t)&spt_info },
	201	+ { PCI_VDEVICE(INTEL, 0xa2e0), (kernel_ulong_t)&spt_i2c_info },
	202	+ { PCI_VDEVICE(INTEL, 0xa2e1), (kernel_ulong_t)&spt_i2c_info },
	203	+ { PCI_VDEVICE(INTEL, 0xa2e2), (kernel_ulong_t)&spt_i2c_info },
	204	+ { PCI_VDEVICE(INTEL, 0xa2e3), (kernel_ulong_t)&spt_i2c_info },
	205	+ { PCI_VDEVICE(INTEL, 0xa2e6), (kernel_ulong_t)&spt_uart_info },
219	206	{ }
220	207	};
221	208	MODULE_DEVICE_TABLE(pci, intel_lpss_pci_ids);

drivers/mfd/intel-lpss.c+0−3

@@ -502,9 +502,6 @@ int intel_lpss_suspend(struct device *dev) · 501 unmodified lines
502	502	for (i = 0; i < LPSS_PRIV_REG_COUNT; i++)
503	503	lpss->priv_ctx[i] = readl(lpss->priv + i * 4);
504	504
505		− /* Put the device into reset state */
506		− writel(0, lpss->priv + LPSS_PRIV_RESETS);
507		−
508	505	return 0;
509	506	}
510	507	EXPORT_SYMBOL_GPL(intel_lpss_suspend);

drivers/mfd/intel_soc_pmic_bxtwc.c+4−2

@@ -86,6 +86,7 @@ enum bxtwc_irqs_level2 { · 85 unmodified lines
86	86	BXTWC_THRM2_IRQ,
87	87	BXTWC_BCU_IRQ,
88	88	BXTWC_ADC_IRQ,
	89	+ BXTWC_USBC_IRQ,
89	90	BXTWC_CHGR0_IRQ,
90	91	BXTWC_CHGR1_IRQ,
91	92	BXTWC_GPIO0_IRQ,
@@ -111,7 +112,8 @@ static const struct regmap_irq bxtwc_regmap_irqs_level2[] = { · 19 unmodified lines
111	112	REGMAP_IRQ_REG(BXTWC_THRM2_IRQ, 2, 0xff),
112	113	REGMAP_IRQ_REG(BXTWC_BCU_IRQ, 3, 0x1f),
113	114	REGMAP_IRQ_REG(BXTWC_ADC_IRQ, 4, 0xff),
114		− REGMAP_IRQ_REG(BXTWC_CHGR0_IRQ, 5, 0x3f),
	115	+ REGMAP_IRQ_REG(BXTWC_USBC_IRQ, 5, BIT(5)),
	116	+ REGMAP_IRQ_REG(BXTWC_CHGR0_IRQ, 5, 0x1f),
115	117	REGMAP_IRQ_REG(BXTWC_CHGR1_IRQ, 6, 0x1f),
116	118	REGMAP_IRQ_REG(BXTWC_GPIO0_IRQ, 7, 0xff),
117	119	REGMAP_IRQ_REG(BXTWC_GPIO1_IRQ, 8, 0x3f),
@@ -146,7 +148,7 @@ static struct resource adc_resources[] = { · 28 unmodified lines
146	148	};
147	149
148	150	static struct resource usbc_resources[] = {
149		− DEFINE_RES_IRQ_NAMED(BXTWC_CHGR0_IRQ, "USBC"),
	151	+ DEFINE_RES_IRQ(BXTWC_USBC_IRQ),
150	152	};
151	153
152	154	static struct resource charger_resources[] = {

drivers/mfd/mfd-core.c+2−0

@@ -399,6 +399,8 @@ int mfd_clone_cell(const char cell, const char *clones, size_t n_clones) · 398 unmodified lines
399	399	clones[i]);
400	400	}
401	401
	402	+ put_device(dev);
	403	+
402	404	return 0;
403	405	}
404	406	EXPORT_SYMBOL(mfd_clone_cell);

drivers/mfd/stmpe.c+2−0

@@ -851,6 +851,8 @@ static int stmpe_reset(struct stmpe *stmpe) · 850 unmodified lines
851	851	if (ret < 0)
852	852	return ret;
853	853
	854	+ msleep(10);
	855	+
854	856	timeout = jiffies + msecs_to_jiffies(100);
855	857	while (time_before(jiffies, timeout)) {
856	858	ret = __stmpe_reg_read(stmpe, stmpe->regs[STMPE_IDX_SYS_CTRL]);

drivers/net/dsa/b53/b53_common.c+4−12

@@ -962,9 +962,10 @@ static void b53_vlan_add(struct dsa_switch *ds, int port, · 961 unmodified lines
962	962
963	963	vl->members \|= BIT(port) \| BIT(cpu_port);
964	964	if (untagged)
965		− vl->untag \|= BIT(port) \| BIT(cpu_port);
	965	+ vl->untag \|= BIT(port);
966	966	else
967		− vl->untag &= ~(BIT(port) \| BIT(cpu_port));
	967	+ vl->untag &= ~BIT(port);
	968	+ vl->untag &= ~BIT(cpu_port);
968	969
969	970	b53_set_vlan_entry(dev, vid, vl);
970	971	b53_fast_age_vlan(dev, vid);
@@ -973,8 +974,6 @@ static void b53_vlan_add(struct dsa_switch *ds, int port, · 2 unmodified lines
973	974	if (pvid) {
974	975	b53_write16(dev, B53_VLAN_PAGE, B53_VLAN_PORT_DEF_TAG(port),
975	976	vlan->vid_end);
976		− b53_write16(dev, B53_VLAN_PAGE, B53_VLAN_PORT_DEF_TAG(cpu_port),
977		− vlan->vid_end);
978	977	b53_fast_age_vlan(dev, vid);
979	978	}
980	979	}
@@ -984,7 +983,6 @@ static int b53_vlan_del(struct dsa_switch *ds, int port, · 3 unmodified lines
984	983	{
985	984	struct b53_device *dev = ds->priv;
986	985	bool untagged = vlan->flags & BRIDGE_VLAN_INFO_UNTAGGED;
987		− unsigned int cpu_port = dev->cpu_port;
988	986	struct b53_vlan *vl;
989	987	u16 vid;
990	988	u16 pvid;
@@ -997,8 +995,6 @@ static int b53_vlan_del(struct dsa_switch *ds, int port, · 6 unmodified lines
997	995	b53_get_vlan_entry(dev, vid, vl);
998	996
999	997	vl->members &= ~BIT(port);
1000		− if ((vl->members & BIT(cpu_port)) == BIT(cpu_port))
1001		− vl->members = 0;
1002	998
1003	999	if (pvid == vid) {
1004	1000	if (is5325(dev) \|\| is5365(dev))
@@ -1007,18 +1003,14 @@ static int b53_vlan_del(struct dsa_switch *ds, int port, · 2 unmodified lines
1007	1003	pvid = 0;
1008	1004	}
1009	1005
1010		− if (untagged) {
	1006	+ if (untagged)
1011	1007	vl->untag &= ~(BIT(port));
1012		− if ((vl->untag & BIT(cpu_port)) == BIT(cpu_port))
1013		− vl->untag = 0;
1014		− }
1015	1008
1016	1009	b53_set_vlan_entry(dev, vid, vl);
1017	1010	b53_fast_age_vlan(dev, vid);
1018	1011	}
1019	1012
1020	1013	b53_write16(dev, B53_VLAN_PAGE, B53_VLAN_PORT_DEF_TAG(port), pvid);
1021		− b53_write16(dev, B53_VLAN_PAGE, B53_VLAN_PORT_DEF_TAG(cpu_port), pvid);
1022	1014	b53_fast_age_vlan(dev, pvid);
1023	1015
1024	1016	return 0;

drivers/net/ethernet/arc/emac_main.c+4−3

@@ -460,7 +460,7 @@ static void arc_emac_set_rx_mode(struct net_device *ndev) · 459 unmodified lines
460	460	if (ndev->flags & IFF_ALLMULTI) {
461	461	arc_reg_set(priv, R_LAFL, ~0);
462	462	arc_reg_set(priv, R_LAFH, ~0);
463		− } else {
	463	+ } else if (ndev->flags & IFF_MULTICAST) {
464	464	struct netdev_hw_addr *ha;
465	465	unsigned int filter[2] = { 0, 0 };
466	466	int bit;
@@ -472,6 +472,9 @@ static void arc_emac_set_rx_mode(struct net_device *ndev) · 5 unmodified lines
472	472
473	473	arc_reg_set(priv, R_LAFL, filter[0]);
474	474	arc_reg_set(priv, R_LAFH, filter[1]);
	475	+ } else {
	476	+ arc_reg_set(priv, R_LAFL, 0);
	477	+ arc_reg_set(priv, R_LAFH, 0);
475	478	}
476	479	}
477	480	}
@@ -764,8 +767,6 @@ int arc_emac_probe(struct net_device *ndev, int interface) · 286 unmodified lines
764	767	ndev->netdev_ops = &arc_emac_netdev_ops;
765	768	ndev->ethtool_ops = &arc_emac_ethtool_ops;
766	769	ndev->watchdog_timeo = TX_TIMEOUT;
767		− /* FIXME :: no multicast support yet */
768		− ndev->flags &= ~IFF_MULTICAST;
769	770
770	771	priv = netdev_priv(ndev);
771	772	priv->dev = dev;

drivers/net/ethernet/broadcom/bnxt/bnxt.c+4−0

@@ -4929,6 +4929,10 @@ static void bnxt_del_napi(struct bnxt *bp) · 4928 unmodified lines
4929	4929	napi_hash_del(&bnapi->napi);
4930	4930	netif_napi_del(&bnapi->napi);
4931	4931	}
	4932	+ /* We called napi_hash_del() before netif_napi_del(), we need
	4933	+ * to respect an RCU grace period before freeing napi structures.
	4934	+ */
	4935	+ synchronize_net();
4932	4936	}
4933	4937
4934	4938	static void bnxt_init_napi(struct bnxt *bp)

drivers/net/ethernet/cadence/macb.c+6−0

@@ -2846,6 +2846,12 @@ static int at91ether_start_xmit(struct sk_buff skb, struct net_device dev) · 2845 unmodified lines
2846	2846	lp->skb_length = skb->len;
2847	2847	lp->skb_physaddr = dma_map_single(NULL, skb->data, skb->len,
2848	2848	DMA_TO_DEVICE);
	2849	+ if (dma_mapping_error(NULL, lp->skb_physaddr)) {
	2850	+ dev_kfree_skb_any(skb);
	2851	+ dev->stats.tx_dropped++;
	2852	+ netdev_err(dev, "%s: DMA mapping error\n", __func__);
	2853	+ return NETDEV_TX_OK;
	2854	+ }
2849	2855
2850	2856	/* Set address of the data in the Transmit Address register */
2851	2857	macb_writel(lp, TAR, lp->skb_physaddr);

drivers/net/ethernet/cavium/thunder/nic.h+36−28

@@ -47,7 +47,7 @@ · 46 unmodified lines
47	47
48	48	/* Min/Max packet size */
49	49	#define NIC_HW_MIN_FRS 64
50		−#define NIC_HW_MAX_FRS 9200 /* 9216 max packet including FCS */
	50	+#define NIC_HW_MAX_FRS 9190 /* Excluding L2 header and FCS */
51	51
52	52	/* Max pkinds */
53	53	#define NIC_MAX_PKIND 16
@@ -178,11 +178,11 @@ enum tx_stats_reg_offset { · 124 unmodified lines
178	178
179	179	struct nicvf_hw_stats {
180	180	u64 rx_bytes;
	181	+ u64 rx_frames;
181	182	u64 rx_ucast_frames;
182	183	u64 rx_bcast_frames;
183	184	u64 rx_mcast_frames;
184		− u64 rx_fcs_errors;
185		− u64 rx_l2_errors;
	185	+ u64 rx_drops;
186	186	u64 rx_drop_red;
187	187	u64 rx_drop_red_bytes;
188	188	u64 rx_drop_overrun;
@@ -191,6 +191,19 @@ struct nicvf_hw_stats { · 2 unmodified lines
191	191	u64 rx_drop_mcast;
192	192	u64 rx_drop_l3_bcast;
193	193	u64 rx_drop_l3_mcast;
	194	+ u64 rx_fcs_errors;
	195	+ u64 rx_l2_errors;
	196	+
	197	+ u64 tx_bytes;
	198	+ u64 tx_frames;
	199	+ u64 tx_ucast_frames;
	200	+ u64 tx_bcast_frames;
	201	+ u64 tx_mcast_frames;
	202	+ u64 tx_drops;
	203	+};
	204	+
	205	+struct nicvf_drv_stats {
	206	+ /* CQE Rx errs */
194	207	u64 rx_bgx_truncated_pkts;
195	208	u64 rx_jabber_errs;
196	209	u64 rx_fcs_errs;
@@ -216,34 +229,30 @@ struct nicvf_hw_stats { · 19 unmodified lines
216	229	u64 rx_l4_pclp;
217	230	u64 rx_truncated_pkts;
218	231
219		− u64 tx_bytes_ok;
220		− u64 tx_ucast_frames_ok;
221		− u64 tx_bcast_frames_ok;
222		− u64 tx_mcast_frames_ok;
223		− u64 tx_drops;
224		−};
225		−
226		−struct nicvf_drv_stats {
227		− /* Rx */
228		− u64 rx_frames_ok;
229		− u64 rx_frames_64;
230		− u64 rx_frames_127;
231		− u64 rx_frames_255;
232		− u64 rx_frames_511;
233		− u64 rx_frames_1023;
234		− u64 rx_frames_1518;
235		− u64 rx_frames_jumbo;
236		− u64 rx_drops;
237		−
	232	+ /* CQE Tx errs */
	233	+ u64 tx_desc_fault;
	234	+ u64 tx_hdr_cons_err;
	235	+ u64 tx_subdesc_err;
	236	+ u64 tx_max_size_exceeded;
	237	+ u64 tx_imm_size_oflow;
	238	+ u64 tx_data_seq_err;
	239	+ u64 tx_mem_seq_err;
	240	+ u64 tx_lock_viol;
	241	+ u64 tx_data_fault;
	242	+ u64 tx_tstmp_conflict;
	243	+ u64 tx_tstmp_timeout;
	244	+ u64 tx_mem_fault;
	245	+ u64 tx_csum_overlap;
	246	+ u64 tx_csum_overflow;
	247	+
	248	+ /* driver debug stats */
238	249	u64 rcv_buffer_alloc_failures;
239		−
240		− /* Tx */
241		− u64 tx_frames_ok;
242		− u64 tx_drops;
243	250	u64 tx_tso;
244	251	u64 tx_timeout;
245	252	u64 txq_stop;
246	253	u64 txq_wake;
	254	+
	255	+ struct u64_stats_sync syncp;
247	256	};
248	257
249	258	struct nicvf {
@@ -282,7 +291,6 @@ struct nicvf { · 32 unmodified lines
282	291
283	292	u8 node;
284	293	u8 cpi_alg;
285		− u16 mtu;
286	294	bool link_up;
287	295	u8 duplex;
288	296	u32 speed;
@@ -298,7 +306,7 @@ struct nicvf { · 9 unmodified lines
298	306
299	307	/* Stats */
300	308	struct nicvf_hw_stats hw_stats;
301		− struct nicvf_drv_stats drv_stats;
	309	+ struct nicvf_drv_stats __percpu *drv_stats;
302	310	struct bgx_stats bgx_stats;
303	311
304	312	/* MSI-X */

drivers/net/ethernet/cavium/thunder/nic_main.c+26−11

@@ -11,6 +11,7 @@ · 10 unmodified lines
11	11	#include <linux/pci.h>
12	12	#include <linux/etherdevice.h>
13	13	#include <linux/of.h>
	14	+#include <linux/if_vlan.h>
14	15
15	16	#include "nic_reg.h"
16	17	#include "nic.h"
@@ -260,18 +261,31 @@ static void nic_get_bgx_stats(struct nicpf nic, struct bgx_stats_msg bgx) · 243 unmodified lines
260	261	/* Update hardware min/max frame size */
261	262	static int nic_update_hw_frs(struct nicpf *nic, int new_frs, int vf)
262	263	{
263		− if ((new_frs > NIC_HW_MAX_FRS) \|\| (new_frs < NIC_HW_MIN_FRS)) {
264		− dev_err(&nic->pdev->dev,
265		− "Invalid MTU setting from VF%d rejected, should be between %d and %d\n",
266		− vf, NIC_HW_MIN_FRS, NIC_HW_MAX_FRS);
	264	+ int bgx, lmac, lmac_cnt;
	265	+ u64 lmac_credits;
	266	+
	267	+ if ((new_frs > NIC_HW_MAX_FRS) \|\| (new_frs < NIC_HW_MIN_FRS))
267	268	return 1;
268		− }
269		− new_frs += ETH_HLEN;
270		− if (new_frs <= nic->pkind.maxlen)
271		− return 0;
272	269
273		− nic->pkind.maxlen = new_frs;
274		− nic_reg_write(nic, NIC_PF_PKIND_0_15_CFG, (u64 )&nic->pkind);
	270	+ bgx = NIC_GET_BGX_FROM_VF_LMAC_MAP(nic->vf_lmac_map[vf]);
	271	+ lmac = NIC_GET_LMAC_FROM_VF_LMAC_MAP(nic->vf_lmac_map[vf]);
	272	+ lmac += bgx * MAX_LMAC_PER_BGX;
	273	+
	274	+ new_frs += VLAN_ETH_HLEN + ETH_FCS_LEN + 4;
	275	+
	276	+ /* Update corresponding LMAC credits */
	277	+ lmac_cnt = bgx_get_lmac_count(nic->node, bgx);
	278	+ lmac_credits = nic_reg_read(nic, NIC_PF_LMAC_0_7_CREDIT + (lmac * 8));
	279	+ lmac_credits &= ~(0xFFFFFULL << 12);
	280	+ lmac_credits \|= (((((48 * 1024) / lmac_cnt) - new_frs) / 16) << 12);
	281	+ nic_reg_write(nic, NIC_PF_LMAC_0_7_CREDIT + (lmac * 8), lmac_credits);
	282	+
	283	+ /* Enforce MTU in HW
	284	+ * This config is supported only from 88xx pass 2.0 onwards.
	285	+ */
	286	+ if (!pass1_silicon(nic->pdev))
	287	+ nic_reg_write(nic,
	288	+ NIC_PF_LMAC_0_7_CFG2 + (lmac * 8), new_frs);
275	289	return 0;
276	290	}
277	291
@@ -464,7 +478,7 @@ static int nic_init_hw(struct nicpf *nic) · 186 unmodified lines
464	478
465	479	/* PKIND configuration */
466	480	nic->pkind.minlen = 0;
467		− nic->pkind.maxlen = NIC_HW_MAX_FRS + ETH_HLEN;
	481	+ nic->pkind.maxlen = NIC_HW_MAX_FRS + VLAN_ETH_HLEN + ETH_FCS_LEN + 4;
468	482	nic->pkind.lenerr_en = 1;
469	483	nic->pkind.rx_hdr = 0;
470	484	nic->pkind.hdr_sl = 0;
@@ -837,6 +851,7 @@ static int nic_reset_stat_counters(struct nicpf *nic, · 366 unmodified lines
837	851	nic_reg_write(nic, reg_addr, 0);
838	852	}
839	853	}
	854	+
840	855	return 0;
841	856	}
842	857

drivers/net/ethernet/cavium/thunder/nic_reg.h+1−0

@@ -106,6 +106,7 @@ · 105 unmodified lines
106	106	#define NIC_PF_MPI_0_2047_CFG (0x210000)
107	107	#define NIC_PF_RSSI_0_4097_RQ (0x220000)
108	108	#define NIC_PF_LMAC_0_7_CFG (0x240000)
	109	+#define NIC_PF_LMAC_0_7_CFG2 (0x240100)
109	110	#define NIC_PF_LMAC_0_7_SW_XOFF (0x242000)
110	111	#define NIC_PF_LMAC_0_7_CREDIT (0x244000)
111	112	#define NIC_PF_CHAN_0_255_TX_CFG (0x400000)

drivers/net/ethernet/cavium/thunder/nicvf_ethtool.c+59−46

@@ -36,11 +36,11 @@ struct nicvf_stat { · 35 unmodified lines
36	36
37	37	static const struct nicvf_stat nicvf_hw_stats[] = {
38	38	NICVF_HW_STAT(rx_bytes),
	39	+ NICVF_HW_STAT(rx_frames),
39	40	NICVF_HW_STAT(rx_ucast_frames),
40	41	NICVF_HW_STAT(rx_bcast_frames),
41	42	NICVF_HW_STAT(rx_mcast_frames),
42		− NICVF_HW_STAT(rx_fcs_errors),
43		− NICVF_HW_STAT(rx_l2_errors),
	43	+ NICVF_HW_STAT(rx_drops),
44	44	NICVF_HW_STAT(rx_drop_red),
45	45	NICVF_HW_STAT(rx_drop_red_bytes),
46	46	NICVF_HW_STAT(rx_drop_overrun),
@@ -49,50 +49,59 @@ static const struct nicvf_stat nicvf_hw_stats[] = { · 2 unmodified lines
49	49	NICVF_HW_STAT(rx_drop_mcast),
50	50	NICVF_HW_STAT(rx_drop_l3_bcast),
51	51	NICVF_HW_STAT(rx_drop_l3_mcast),
52		− NICVF_HW_STAT(rx_bgx_truncated_pkts),
53		− NICVF_HW_STAT(rx_jabber_errs),
54		− NICVF_HW_STAT(rx_fcs_errs),
55		− NICVF_HW_STAT(rx_bgx_errs),
56		− NICVF_HW_STAT(rx_prel2_errs),
57		− NICVF_HW_STAT(rx_l2_hdr_malformed),
58		− NICVF_HW_STAT(rx_oversize),
59		− NICVF_HW_STAT(rx_undersize),
60		− NICVF_HW_STAT(rx_l2_len_mismatch),
61		− NICVF_HW_STAT(rx_l2_pclp),
62		− NICVF_HW_STAT(rx_ip_ver_errs),
63		− NICVF_HW_STAT(rx_ip_csum_errs),
64		− NICVF_HW_STAT(rx_ip_hdr_malformed),
65		− NICVF_HW_STAT(rx_ip_payload_malformed),
66		− NICVF_HW_STAT(rx_ip_ttl_errs),
67		− NICVF_HW_STAT(rx_l3_pclp),
68		− NICVF_HW_STAT(rx_l4_malformed),
69		− NICVF_HW_STAT(rx_l4_csum_errs),
70		− NICVF_HW_STAT(rx_udp_len_errs),
71		− NICVF_HW_STAT(rx_l4_port_errs),
72		− NICVF_HW_STAT(rx_tcp_flag_errs),
73		− NICVF_HW_STAT(rx_tcp_offset_errs),
74		− NICVF_HW_STAT(rx_l4_pclp),
75		− NICVF_HW_STAT(rx_truncated_pkts),
76		− NICVF_HW_STAT(tx_bytes_ok),
77		− NICVF_HW_STAT(tx_ucast_frames_ok),
78		− NICVF_HW_STAT(tx_bcast_frames_ok),
79		− NICVF_HW_STAT(tx_mcast_frames_ok),
	52	+ NICVF_HW_STAT(rx_fcs_errors),
	53	+ NICVF_HW_STAT(rx_l2_errors),
	54	+ NICVF_HW_STAT(tx_bytes),
	55	+ NICVF_HW_STAT(tx_frames),
	56	+ NICVF_HW_STAT(tx_ucast_frames),
	57	+ NICVF_HW_STAT(tx_bcast_frames),
	58	+ NICVF_HW_STAT(tx_mcast_frames),
	59	+ NICVF_HW_STAT(tx_drops),
80	60	};
81	61
82	62	static const struct nicvf_stat nicvf_drv_stats[] = {
83		− NICVF_DRV_STAT(rx_frames_ok),
84		− NICVF_DRV_STAT(rx_frames_64),
85		− NICVF_DRV_STAT(rx_frames_127),
86		− NICVF_DRV_STAT(rx_frames_255),
87		− NICVF_DRV_STAT(rx_frames_511),
88		− NICVF_DRV_STAT(rx_frames_1023),
89		− NICVF_DRV_STAT(rx_frames_1518),
90		− NICVF_DRV_STAT(rx_frames_jumbo),
91		− NICVF_DRV_STAT(rx_drops),
	63	+ NICVF_DRV_STAT(rx_bgx_truncated_pkts),
	64	+ NICVF_DRV_STAT(rx_jabber_errs),
	65	+ NICVF_DRV_STAT(rx_fcs_errs),
	66	+ NICVF_DRV_STAT(rx_bgx_errs),
	67	+ NICVF_DRV_STAT(rx_prel2_errs),
	68	+ NICVF_DRV_STAT(rx_l2_hdr_malformed),
	69	+ NICVF_DRV_STAT(rx_oversize),
	70	+ NICVF_DRV_STAT(rx_undersize),
	71	+ NICVF_DRV_STAT(rx_l2_len_mismatch),
	72	+ NICVF_DRV_STAT(rx_l2_pclp),
	73	+ NICVF_DRV_STAT(rx_ip_ver_errs),
	74	+ NICVF_DRV_STAT(rx_ip_csum_errs),
	75	+ NICVF_DRV_STAT(rx_ip_hdr_malformed),
	76	+ NICVF_DRV_STAT(rx_ip_payload_malformed),
	77	+ NICVF_DRV_STAT(rx_ip_ttl_errs),
	78	+ NICVF_DRV_STAT(rx_l3_pclp),
	79	+ NICVF_DRV_STAT(rx_l4_malformed),
	80	+ NICVF_DRV_STAT(rx_l4_csum_errs),
	81	+ NICVF_DRV_STAT(rx_udp_len_errs),
	82	+ NICVF_DRV_STAT(rx_l4_port_errs),
	83	+ NICVF_DRV_STAT(rx_tcp_flag_errs),
	84	+ NICVF_DRV_STAT(rx_tcp_offset_errs),
	85	+ NICVF_DRV_STAT(rx_l4_pclp),
	86	+ NICVF_DRV_STAT(rx_truncated_pkts),
	87	+
	88	+ NICVF_DRV_STAT(tx_desc_fault),
	89	+ NICVF_DRV_STAT(tx_hdr_cons_err),
	90	+ NICVF_DRV_STAT(tx_subdesc_err),
	91	+ NICVF_DRV_STAT(tx_max_size_exceeded),
	92	+ NICVF_DRV_STAT(tx_imm_size_oflow),
	93	+ NICVF_DRV_STAT(tx_data_seq_err),
	94	+ NICVF_DRV_STAT(tx_mem_seq_err),
	95	+ NICVF_DRV_STAT(tx_lock_viol),
	96	+ NICVF_DRV_STAT(tx_data_fault),
	97	+ NICVF_DRV_STAT(tx_tstmp_conflict),
	98	+ NICVF_DRV_STAT(tx_tstmp_timeout),
	99	+ NICVF_DRV_STAT(tx_mem_fault),
	100	+ NICVF_DRV_STAT(tx_csum_overlap),
	101	+ NICVF_DRV_STAT(tx_csum_overflow),
	102	+
92	103	NICVF_DRV_STAT(rcv_buffer_alloc_failures),
93		− NICVF_DRV_STAT(tx_frames_ok),
94	104	NICVF_DRV_STAT(tx_tso),
95		− NICVF_DRV_STAT(tx_drops),
96	105	NICVF_DRV_STAT(tx_timeout),
97	106	NICVF_DRV_STAT(txq_stop),
98	107	NICVF_DRV_STAT(txq_wake),
@@ -278,8 +287,8 @@ static void nicvf_get_ethtool_stats(struct net_device *netdev, · 179 unmodified lines
278	287	struct ethtool_stats stats, u64 data)
279	288	{
280	289	struct nicvf *nic = netdev_priv(netdev);
281		− int stat;
282		− int sqs;
	290	+ int stat, tmp_stats;
	291	+ int sqs, cpu;
283	292
284	293	nicvf_update_stats(nic);
285	294
@@ -289,9 +298,13 @@ static void nicvf_get_ethtool_stats(struct net_device *netdev, · 3 unmodified lines
289	298	for (stat = 0; stat < nicvf_n_hw_stats; stat++)
290	299	(data++) = ((u64 )&nic->hw_stats)
291	300	[nicvf_hw_stats[stat].index];
292		− for (stat = 0; stat < nicvf_n_drv_stats; stat++)
293		− (data++) = ((u64 )&nic->drv_stats)
294		− [nicvf_drv_stats[stat].index];
	301	+ for (stat = 0; stat < nicvf_n_drv_stats; stat++) {
	302	+ tmp_stats = 0;
	303	+ for_each_possible_cpu(cpu)
	304	+ tmp_stats += ((u64 *)per_cpu_ptr(nic->drv_stats, cpu))
	305	+ [nicvf_drv_stats[stat].index];
	306	+ *(data++) = tmp_stats;
	307	+ }
295	308
296	309	nicvf_get_qset_stats(nic, stats, &data);
297	310

drivers/net/ethernet/cavium/thunder/nicvf_main.c+83−75

@@ -69,25 +69,6 @@ static inline u8 nicvf_netdev_qidx(struct nicvf *nic, u8 qidx) · 68 unmodified lines
69	69	return qidx;
70	70	}
71	71
72		−static inline void nicvf_set_rx_frame_cnt(struct nicvf *nic,
73		− struct sk_buff *skb)
74		−{
75		− if (skb->len <= 64)
76		− nic->drv_stats.rx_frames_64++;
77		− else if (skb->len <= 127)
78		− nic->drv_stats.rx_frames_127++;
79		− else if (skb->len <= 255)
80		− nic->drv_stats.rx_frames_255++;
81		− else if (skb->len <= 511)
82		− nic->drv_stats.rx_frames_511++;
83		− else if (skb->len <= 1023)
84		− nic->drv_stats.rx_frames_1023++;
85		− else if (skb->len <= 1518)
86		− nic->drv_stats.rx_frames_1518++;
87		− else
88		− nic->drv_stats.rx_frames_jumbo++;
89		−}
90		−
91	72	/* The Cavium ThunderX network controller can only be found in SoCs
92	73	* containing the ThunderX ARM64 CPU implementation. All accesses to the device
93	74	* registers on this platform are implicitly strongly ordered with respect
@@ -492,9 +473,6 @@ int nicvf_set_real_num_queues(struct net_device *netdev, · 398 unmodified lines
492	473	static int nicvf_init_resources(struct nicvf *nic)
493	474	{
494	475	int err;
495		− union nic_mbx mbx = {};
496		−
497		− mbx.msg.msg = NIC_MBOX_MSG_CFG_DONE;
498	476
499	477	/* Enable Qset */
500	478	nicvf_qset_config(nic, true);
@@ -507,14 +485,10 @@ static int nicvf_init_resources(struct nicvf *nic) · 6 unmodified lines
507	485	return err;
508	486	}
509	487
510		− /* Send VF config done msg to PF */
511		− nicvf_write_to_mbx(nic, &mbx);
512		−
513	488	return 0;
514	489	}
515	490
516	491	static void nicvf_snd_pkt_handler(struct net_device *netdev,
517		− struct cmp_queue *cq,
518	492	struct cqe_send_t *cqe_tx,
519	493	int cqe_type, int budget,
520	494	unsigned int tx_pkts, unsigned int tx_bytes)
@@ -536,7 +510,7 @@ static void nicvf_snd_pkt_handler(struct net_device *netdev, · 15 unmodified lines
536	510	__func__, cqe_tx->sq_qs, cqe_tx->sq_idx,
537	511	cqe_tx->sqe_ptr, hdr->subdesc_cnt);
538	512
539		− nicvf_check_cqe_tx_errs(nic, cq, cqe_tx);
	513	+ nicvf_check_cqe_tx_errs(nic, cqe_tx);
540	514	skb = (struct sk_buff *)sq->skbuff[cqe_tx->sqe_ptr];
541	515	if (skb) {
542	516	/* Check for dummy descriptor used for HW TSO offload on 88xx */
@@ -630,8 +604,6 @@ static void nicvf_rcv_pkt_handler(struct net_device *netdev, · 87 unmodified lines
630	604	return;
631	605	}
632	606
633		− nicvf_set_rx_frame_cnt(nic, skb);
634		−
635	607	nicvf_set_rxhash(netdev, cqe_rx, skb);
636	608
637	609	skb_record_rx_queue(skb, rq_idx);
@@ -703,7 +675,7 @@ loop: · 65 unmodified lines
703	675	work_done++;
704	676	break;
705	677	case CQE_TYPE_SEND:
706		− nicvf_snd_pkt_handler(netdev, cq,
	678	+ nicvf_snd_pkt_handler(netdev,
707	679	(void *)cq_desc, CQE_TYPE_SEND,
708	680	budget, &tx_pkts, &tx_bytes);
709	681	tx_done++;
@@ -740,7 +712,7 @@ done: · 30 unmodified lines
740	712	nic = nic->pnicvf;
741	713	if (netif_tx_queue_stopped(txq) && netif_carrier_ok(netdev)) {
742	714	netif_tx_start_queue(txq);
743		− nic->drv_stats.txq_wake++;
	715	+ this_cpu_inc(nic->drv_stats->txq_wake);
744	716	if (netif_msg_tx_err(nic))
745	717	netdev_warn(netdev,
746	718	"%s: Transmit queue wakeup SQ%d\n",
@@ -1084,7 +1056,7 @@ static netdev_tx_t nicvf_xmit(struct sk_buff skb, struct net_device netdev) · 337 unmodified lines
1084	1056
1085	1057	if (!netif_tx_queue_stopped(txq) && !nicvf_sq_append_skb(nic, skb)) {
1086	1058	netif_tx_stop_queue(txq);
1087		− nic->drv_stats.txq_stop++;
	1059	+ this_cpu_inc(nic->drv_stats->txq_stop);
1088	1060	if (netif_msg_tx_err(nic))
1089	1061	netdev_warn(netdev,
1090	1062	"%s: Transmit ring full, stopping SQ%d\n",
@@ -1189,14 +1161,24 @@ int nicvf_stop(struct net_device *netdev) · 98 unmodified lines
1189	1161	return 0;
1190	1162	}
1191	1163
	1164	+static int nicvf_update_hw_max_frs(struct nicvf *nic, int mtu)
	1165	+{
	1166	+ union nic_mbx mbx = {};
	1167	+
	1168	+ mbx.frs.msg = NIC_MBOX_MSG_SET_MAX_FRS;
	1169	+ mbx.frs.max_frs = mtu;
	1170	+ mbx.frs.vf_id = nic->vf_id;
	1171	+
	1172	+ return nicvf_send_msg_to_pf(nic, &mbx);
	1173	+}
	1174	+
1192	1175	int nicvf_open(struct net_device *netdev)
1193	1176	{
1194		− int err, qidx;
	1177	+ int cpu, err, qidx;
1195	1178	struct nicvf *nic = netdev_priv(netdev);
1196	1179	struct queue_set *qs = nic->qs;
1197	1180	struct nicvf_cq_poll *cq_poll = NULL;
1198		−
1199		− nic->mtu = netdev->mtu;
	1181	+ union nic_mbx mbx = {};
1200	1182
1201	1183	netif_carrier_off(netdev);
1202	1184
@@ -1248,9 +1230,17 @@ int nicvf_open(struct net_device *netdev) · 45 unmodified lines
1248	1230	if (nic->sqs_mode)
1249	1231	nicvf_get_primary_vf_struct(nic);
1250	1232
1251		− /* Configure receive side scaling */
1252		− if (!nic->sqs_mode)
	1233	+ /* Configure receive side scaling and MTU */
	1234	+ if (!nic->sqs_mode) {
1253	1235	nicvf_rss_init(nic);
	1236	+ if (nicvf_update_hw_max_frs(nic, netdev->mtu))
	1237	+ goto cleanup;
	1238	+
	1239	+ /* Clear percpu stats */
	1240	+ for_each_possible_cpu(cpu)
	1241	+ memset(per_cpu_ptr(nic->drv_stats, cpu), 0,
	1242	+ sizeof(struct nicvf_drv_stats));
	1243	+ }
1254	1244
1255	1245	err = nicvf_register_interrupts(nic);
1256	1246	if (err)
@@ -1276,8 +1266,9 @@ int nicvf_open(struct net_device *netdev) · 19 unmodified lines
1276	1266	for (qidx = 0; qidx < qs->rbdr_cnt; qidx++)
1277	1267	nicvf_enable_intr(nic, NICVF_INTR_RBDR, qidx);
1278	1268
1279		− nic->drv_stats.txq_stop = 0;
1280		− nic->drv_stats.txq_wake = 0;
	1269	+ /* Send VF config done msg to PF */
	1270	+ mbx.msg.msg = NIC_MBOX_MSG_CFG_DONE;
	1271	+ nicvf_write_to_mbx(nic, &mbx);
1281	1272
1282	1273	return 0;
1283	1274	cleanup:
@@ -1297,25 +1288,20 @@ napi_del: · 13 unmodified lines
1297	1288	return err;
1298	1289	}
1299	1290
1300		−static int nicvf_update_hw_max_frs(struct nicvf *nic, int mtu)
1301		−{
1302		− union nic_mbx mbx = {};
1303		−
1304		− mbx.frs.msg = NIC_MBOX_MSG_SET_MAX_FRS;
1305		− mbx.frs.max_frs = mtu;
1306		− mbx.frs.vf_id = nic->vf_id;
1307		−
1308		− return nicvf_send_msg_to_pf(nic, &mbx);
1309		−}
1310		−
1311	1291	static int nicvf_change_mtu(struct net_device *netdev, int new_mtu)
1312	1292	{
1313	1293	struct nicvf *nic = netdev_priv(netdev);
	1294	+ int orig_mtu = netdev->mtu;
1314	1295
1315		− if (nicvf_update_hw_max_frs(nic, new_mtu))
1316		− return -EINVAL;
1317	1296	netdev->mtu = new_mtu;
1318		− nic->mtu = new_mtu;
	1297	+
	1298	+ if (!netif_running(netdev))
	1299	+ return 0;
	1300	+
	1301	+ if (nicvf_update_hw_max_frs(nic, new_mtu)) {
	1302	+ netdev->mtu = orig_mtu;
	1303	+ return -EINVAL;
	1304	+ }
1319	1305
1320	1306	return 0;
1321	1307	}
@@ -1373,9 +1359,10 @@ void nicvf_update_lmac_stats(struct nicvf *nic) · 51 unmodified lines
1373	1359
1374	1360	void nicvf_update_stats(struct nicvf *nic)
1375	1361	{
1376		− int qidx;
	1362	+ int qidx, cpu;
	1363	+ u64 tmp_stats = 0;
1377	1364	struct nicvf_hw_stats *stats = &nic->hw_stats;
1378		− struct nicvf_drv_stats *drv_stats = &nic->drv_stats;
	1365	+ struct nicvf_drv_stats *drv_stats;
1379	1366	struct queue_set *qs = nic->qs;
1380	1367
1381	1368	#define GET_RX_STATS(reg) \
@@ -1398,21 +1385,33 @@ void nicvf_update_stats(struct nicvf *nic) · 16 unmodified lines
1398	1385	stats->rx_drop_l3_bcast = GET_RX_STATS(RX_DRP_L3BCAST);
1399	1386	stats->rx_drop_l3_mcast = GET_RX_STATS(RX_DRP_L3MCAST);
1400	1387
1401		− stats->tx_bytes_ok = GET_TX_STATS(TX_OCTS);
1402		− stats->tx_ucast_frames_ok = GET_TX_STATS(TX_UCAST);
1403		− stats->tx_bcast_frames_ok = GET_TX_STATS(TX_BCAST);
1404		− stats->tx_mcast_frames_ok = GET_TX_STATS(TX_MCAST);
	1388	+ stats->tx_bytes = GET_TX_STATS(TX_OCTS);
	1389	+ stats->tx_ucast_frames = GET_TX_STATS(TX_UCAST);
	1390	+ stats->tx_bcast_frames = GET_TX_STATS(TX_BCAST);
	1391	+ stats->tx_mcast_frames = GET_TX_STATS(TX_MCAST);
1405	1392	stats->tx_drops = GET_TX_STATS(TX_DROP);
1406	1393
1407		− drv_stats->tx_frames_ok = stats->tx_ucast_frames_ok +
1408		− stats->tx_bcast_frames_ok +
1409		− stats->tx_mcast_frames_ok;
1410		− drv_stats->rx_frames_ok = stats->rx_ucast_frames +
1411		− stats->rx_bcast_frames +
1412		− stats->rx_mcast_frames;
1413		− drv_stats->rx_drops = stats->rx_drop_red +
1414		− stats->rx_drop_overrun;
1415		− drv_stats->tx_drops = stats->tx_drops;
	1394	+ /* On T88 pass 2.0, the dummy SQE added for TSO notification
	1395	+ * via CQE has 'dont_send' set. Hence HW drops the pkt pointed
	1396	+ * pointed by dummy SQE and results in tx_drops counter being
	1397	+ * incremented. Subtracting it from tx_tso counter will give
	1398	+ * exact tx_drops counter.
	1399	+ */
	1400	+ if (nic->t88 && nic->hw_tso) {
	1401	+ for_each_possible_cpu(cpu) {
	1402	+ drv_stats = per_cpu_ptr(nic->drv_stats, cpu);
	1403	+ tmp_stats += drv_stats->tx_tso;
	1404	+ }
	1405	+ stats->tx_drops = tmp_stats - stats->tx_drops;
	1406	+ }
	1407	+ stats->tx_frames = stats->tx_ucast_frames +
	1408	+ stats->tx_bcast_frames +
	1409	+ stats->tx_mcast_frames;
	1410	+ stats->rx_frames = stats->rx_ucast_frames +
	1411	+ stats->rx_bcast_frames +
	1412	+ stats->rx_mcast_frames;
	1413	+ stats->rx_drops = stats->rx_drop_red +
	1414	+ stats->rx_drop_overrun;
1416	1415
1417	1416	/* Update RQ and SQ stats */
1418	1417	for (qidx = 0; qidx < qs->rq_cnt; qidx++)
@@ -1426,18 +1425,17 @@ static struct rtnl_link_stats64 nicvf_get_stats64(struct net_device netdev, · 7 unmodified lines
1426	1425	{
1427	1426	struct nicvf *nic = netdev_priv(netdev);
1428	1427	struct nicvf_hw_stats *hw_stats = &nic->hw_stats;
1429		− struct nicvf_drv_stats *drv_stats = &nic->drv_stats;
1430	1428
1431	1429	nicvf_update_stats(nic);
1432	1430
1433	1431	stats->rx_bytes = hw_stats->rx_bytes;
1434		− stats->rx_packets = drv_stats->rx_frames_ok;
1435		− stats->rx_dropped = drv_stats->rx_drops;
	1432	+ stats->rx_packets = hw_stats->rx_frames;
	1433	+ stats->rx_dropped = hw_stats->rx_drops;
1436	1434	stats->multicast = hw_stats->rx_mcast_frames;
1437	1435
1438		− stats->tx_bytes = hw_stats->tx_bytes_ok;
1439		− stats->tx_packets = drv_stats->tx_frames_ok;
1440		− stats->tx_dropped = drv_stats->tx_drops;
	1436	+ stats->tx_bytes = hw_stats->tx_bytes;
	1437	+ stats->tx_packets = hw_stats->tx_frames;
	1438	+ stats->tx_dropped = hw_stats->tx_drops;
1441	1439
1442	1440	return stats;
1443	1441	}
@@ -1450,7 +1448,7 @@ static void nicvf_tx_timeout(struct net_device *dev) · 6 unmodified lines
1450	1448	netdev_warn(dev, "%s: Transmit timed out, resetting\n",
1451	1449	dev->name);
1452	1450
1453		− nic->drv_stats.tx_timeout++;
	1451	+ this_cpu_inc(nic->drv_stats->tx_timeout);
1454	1452	schedule_work(&nic->reset_task);
1455	1453	}
1456	1454
@@ -1584,6 +1582,12 @@ static int nicvf_probe(struct pci_dev pdev, const struct pci_device_id ent) · 127 unmodified lines
1584	1582	goto err_free_netdev;
1585	1583	}
1586	1584
	1585	+ nic->drv_stats = netdev_alloc_pcpu_stats(struct nicvf_drv_stats);
	1586	+ if (!nic->drv_stats) {
	1587	+ err = -ENOMEM;
	1588	+ goto err_free_netdev;
	1589	+ }
	1590	+
1587	1591	err = nicvf_set_qset_resources(nic);
1588	1592	if (err)
1589	1593	goto err_free_netdev;
@@ -1646,6 +1650,8 @@ err_unregister_interrupts: · 56 unmodified lines
1646	1650	nicvf_unregister_interrupts(nic);
1647	1651	err_free_netdev:
1648	1652	pci_set_drvdata(pdev, NULL);
	1653	+ if (nic->drv_stats)
	1654	+ free_percpu(nic->drv_stats);
1649	1655	free_netdev(netdev);
1650	1656	err_release_regions:
1651	1657	pci_release_regions(pdev);
@@ -1673,6 +1679,8 @@ static void nicvf_remove(struct pci_dev *pdev) · 21 unmodified lines
1673	1679	unregister_netdev(pnetdev);
1674	1680	nicvf_unregister_interrupts(nic);
1675	1681	pci_set_drvdata(pdev, NULL);
	1682	+ if (nic->drv_stats)
	1683	+ free_percpu(nic->drv_stats);
1676	1684	free_netdev(netdev);
1677	1685	pci_release_regions(pdev);
1678	1686	pci_disable_device(pdev);

drivers/net/ethernet/cavium/thunder/nicvf_queues.c+67−51

@@ -104,7 +104,8 @@ static inline int nicvf_alloc_rcv_buffer(struct nicvf *nic, gfp_t gfp, · 103 unmodified lines
104	104	nic->rb_page = alloc_pages(gfp \| __GFP_COMP \| __GFP_NOWARN,
105	105	order);
106	106	if (!nic->rb_page) {
107		− nic->drv_stats.rcv_buffer_alloc_failures++;
	107	+ this_cpu_inc(nic->pnicvf->drv_stats->
	108	+ rcv_buffer_alloc_failures);
108	109	return -ENOMEM;
109	110	}
110	111	nic->rb_page_offset = 0;
@@ -270,7 +271,8 @@ refill: · 159 unmodified lines
270	271	rbdr_idx, new_rb);
271	272	next_rbdr:
272	273	/* Re-enable RBDR interrupts only if buffer allocation is success */
273		− if (!nic->rb_alloc_fail && rbdr->enable)
	274	+ if (!nic->rb_alloc_fail && rbdr->enable &&
	275	+ netif_running(nic->pnicvf->netdev))
274	276	nicvf_enable_intr(nic, NICVF_INTR_RBDR, rbdr_idx);
275	277
276	278	if (rbdr_idx)
@@ -361,6 +363,8 @@ static int nicvf_init_snd_queue(struct nicvf *nic, · 84 unmodified lines
361	363
362	364	static void nicvf_free_snd_queue(struct nicvf nic, struct snd_queue sq)
363	365	{
	366	+ struct sk_buff *skb;
	367	+
364	368	if (!sq)
365	369	return;
366	370	if (!sq->dmem.base)
@@ -371,6 +375,15 @@ static void nicvf_free_snd_queue(struct nicvf nic, struct snd_queue sq) · 4 unmodified lines
371	375	sq->dmem.q_len * TSO_HEADER_SIZE,
372	376	sq->tso_hdrs, sq->tso_hdrs_phys);
373	377
	378	+ /* Free pending skbs in the queue */
	379	+ smp_rmb();
	380	+ while (sq->head != sq->tail) {
	381	+ skb = (struct sk_buff *)sq->skbuff[sq->head];
	382	+ if (skb)
	383	+ dev_kfree_skb_any(skb);
	384	+ sq->head++;
	385	+ sq->head &= (sq->dmem.q_len - 1);
	386	+ }
374	387	kfree(sq->skbuff);
375	388	nicvf_free_q_desc_mem(nic, &sq->dmem);
376	389	}
@@ -483,9 +496,12 @@ static void nicvf_reset_rcv_queue_stats(struct nicvf *nic) · 106 unmodified lines
483	496	{
484	497	union nic_mbx mbx = {};
485	498
486		− /* Reset all RXQ's stats */
	499	+ /* Reset all RQ/SQ and VF stats */
487	500	mbx.reset_stat.msg = NIC_MBOX_MSG_RESET_STAT_COUNTER;
	501	+ mbx.reset_stat.rx_stat_mask = 0x3FFF;
	502	+ mbx.reset_stat.tx_stat_mask = 0x1F;
488	503	mbx.reset_stat.rq_stat_mask = 0xFFFF;
	504	+ mbx.reset_stat.sq_stat_mask = 0xFFFF;
489	505	nicvf_send_msg_to_pf(nic, &mbx);
490	506	}
491	507
@@ -538,9 +554,12 @@ static void nicvf_rcv_queue_config(struct nicvf nic, struct queue_set qs, · 46 unmodified lines
538	554	mbx.rq.cfg = (1ULL << 62) \| (RQ_CQ_DROP << 8);
539	555	nicvf_send_msg_to_pf(nic, &mbx);
540	556
541		− nicvf_queue_reg_write(nic, NIC_QSET_RQ_GEN_CFG, 0, 0x00);
542		− if (!nic->sqs_mode)
	557	+ if (!nic->sqs_mode && (qidx == 0)) {
	558	+ /* Enable checking L3/L4 length and TCP/UDP checksums */
	559	+ nicvf_queue_reg_write(nic, NIC_QSET_RQ_GEN_CFG, 0,
	560	+ (BIT(24) \| BIT(23) \| BIT(21)));
543	561	nicvf_config_vlan_stripping(nic, nic->netdev->features);
	562	+ }
544	563
545	564	/* Enable Receive queue */
546	565	memset(&rq_cfg, 0, sizeof(struct rq_cfg));
@@ -1029,7 +1048,7 @@ nicvf_sq_add_hdr_subdesc(struct nicvf nic, struct snd_queue sq, int qentry, · 482 unmodified lines
1029	1048	hdr->tso_max_paysize = skb_shinfo(skb)->gso_size;
1030	1049	/* For non-tunneled pkts, point this to L2 ethertype */
1031	1050	hdr->inner_l3_offset = skb_network_offset(skb) - 2;
1032		− nic->drv_stats.tx_tso++;
	1051	+ this_cpu_inc(nic->pnicvf->drv_stats->tx_tso);
1033	1052	}
1034	1053	}
1035	1054
@@ -1161,7 +1180,7 @@ static int nicvf_sq_append_tso(struct nicvf nic, struct snd_queue sq, · 125 unmodified lines
1161	1180
1162	1181	nicvf_sq_doorbell(nic, skb, sq_num, desc_cnt);
1163	1182
1164		− nic->drv_stats.tx_tso++;
	1183	+ this_cpu_inc(nic->pnicvf->drv_stats->tx_tso);
1165	1184	return 1;
1166	1185	}
1167	1186
@@ -1422,8 +1441,6 @@ void nicvf_update_sq_stats(struct nicvf *nic, int sq_idx) · 254 unmodified lines
1422	1441	/* Check for errors in the receive cmp.queue entry */
1423	1442	int nicvf_check_cqe_rx_errs(struct nicvf nic, struct cqe_rx_t cqe_rx)
1424	1443	{
1425		− struct nicvf_hw_stats *stats = &nic->hw_stats;
1426		−
1427	1444	if (!cqe_rx->err_level && !cqe_rx->err_opcode)
1428	1445	return 0;
1429	1446
@@ -1435,76 +1452,76 @@ int nicvf_check_cqe_rx_errs(struct nicvf nic, struct cqe_rx_t cqe_rx) · 5 unmodified lines
1435	1452
1436	1453	switch (cqe_rx->err_opcode) {
1437	1454	case CQ_RX_ERROP_RE_PARTIAL:
1438		− stats->rx_bgx_truncated_pkts++;
	1455	+ this_cpu_inc(nic->drv_stats->rx_bgx_truncated_pkts);
1439	1456	break;
1440	1457	case CQ_RX_ERROP_RE_JABBER:
1441		− stats->rx_jabber_errs++;
	1458	+ this_cpu_inc(nic->drv_stats->rx_jabber_errs);
1442	1459	break;
1443	1460	case CQ_RX_ERROP_RE_FCS:
1444		− stats->rx_fcs_errs++;
	1461	+ this_cpu_inc(nic->drv_stats->rx_fcs_errs);
1445	1462	break;
1446	1463	case CQ_RX_ERROP_RE_RX_CTL:
1447		− stats->rx_bgx_errs++;
	1464	+ this_cpu_inc(nic->drv_stats->rx_bgx_errs);
1448	1465	break;
1449	1466	case CQ_RX_ERROP_PREL2_ERR:
1450		− stats->rx_prel2_errs++;
	1467	+ this_cpu_inc(nic->drv_stats->rx_prel2_errs);
1451	1468	break;
1452	1469	case CQ_RX_ERROP_L2_MAL:
1453		− stats->rx_l2_hdr_malformed++;
	1470	+ this_cpu_inc(nic->drv_stats->rx_l2_hdr_malformed);
1454	1471	break;
1455	1472	case CQ_RX_ERROP_L2_OVERSIZE:
1456		− stats->rx_oversize++;
	1473	+ this_cpu_inc(nic->drv_stats->rx_oversize);
1457	1474	break;
1458	1475	case CQ_RX_ERROP_L2_UNDERSIZE:
1459		− stats->rx_undersize++;
	1476	+ this_cpu_inc(nic->drv_stats->rx_undersize);
1460	1477	break;
1461	1478	case CQ_RX_ERROP_L2_LENMISM:
1462		− stats->rx_l2_len_mismatch++;
	1479	+ this_cpu_inc(nic->drv_stats->rx_l2_len_mismatch);
1463	1480	break;
1464	1481	case CQ_RX_ERROP_L2_PCLP:
1465		− stats->rx_l2_pclp++;
	1482	+ this_cpu_inc(nic->drv_stats->rx_l2_pclp);
1466	1483	break;
1467	1484	case CQ_RX_ERROP_IP_NOT:
1468		− stats->rx_ip_ver_errs++;
	1485	+ this_cpu_inc(nic->drv_stats->rx_ip_ver_errs);
1469	1486	break;
1470	1487	case CQ_RX_ERROP_IP_CSUM_ERR:
1471		− stats->rx_ip_csum_errs++;
	1488	+ this_cpu_inc(nic->drv_stats->rx_ip_csum_errs);
1472	1489	break;
1473	1490	case CQ_RX_ERROP_IP_MAL:
1474		− stats->rx_ip_hdr_malformed++;
	1491	+ this_cpu_inc(nic->drv_stats->rx_ip_hdr_malformed);
1475	1492	break;
1476	1493	case CQ_RX_ERROP_IP_MALD:
1477		− stats->rx_ip_payload_malformed++;
	1494	+ this_cpu_inc(nic->drv_stats->rx_ip_payload_malformed);
1478	1495	break;
1479	1496	case CQ_RX_ERROP_IP_HOP:
1480		− stats->rx_ip_ttl_errs++;
	1497	+ this_cpu_inc(nic->drv_stats->rx_ip_ttl_errs);
1481	1498	break;
1482	1499	case CQ_RX_ERROP_L3_PCLP:
1483		− stats->rx_l3_pclp++;
	1500	+ this_cpu_inc(nic->drv_stats->rx_l3_pclp);
1484	1501	break;
1485	1502	case CQ_RX_ERROP_L4_MAL:
1486		− stats->rx_l4_malformed++;
	1503	+ this_cpu_inc(nic->drv_stats->rx_l4_malformed);
1487	1504	break;
1488	1505	case CQ_RX_ERROP_L4_CHK:
1489		− stats->rx_l4_csum_errs++;
	1506	+ this_cpu_inc(nic->drv_stats->rx_l4_csum_errs);
1490	1507	break;
1491	1508	case CQ_RX_ERROP_UDP_LEN:
1492		− stats->rx_udp_len_errs++;
	1509	+ this_cpu_inc(nic->drv_stats->rx_udp_len_errs);
1493	1510	break;
1494	1511	case CQ_RX_ERROP_L4_PORT:
1495		− stats->rx_l4_port_errs++;
	1512	+ this_cpu_inc(nic->drv_stats->rx_l4_port_errs);
1496	1513	break;
1497	1514	case CQ_RX_ERROP_TCP_FLAG:
1498		− stats->rx_tcp_flag_errs++;
	1515	+ this_cpu_inc(nic->drv_stats->rx_tcp_flag_errs);
1499	1516	break;
1500	1517	case CQ_RX_ERROP_TCP_OFFSET:
1501		− stats->rx_tcp_offset_errs++;
	1518	+ this_cpu_inc(nic->drv_stats->rx_tcp_offset_errs);
1502	1519	break;
1503	1520	case CQ_RX_ERROP_L4_PCLP:
1504		− stats->rx_l4_pclp++;
	1521	+ this_cpu_inc(nic->drv_stats->rx_l4_pclp);
1505	1522	break;
1506	1523	case CQ_RX_ERROP_RBDR_TRUNC:
1507		− stats->rx_truncated_pkts++;
	1524	+ this_cpu_inc(nic->drv_stats->rx_truncated_pkts);
1508	1525	break;
1509	1526	}
1510	1527
@@ -1512,53 +1529,52 @@ int nicvf_check_cqe_rx_errs(struct nicvf nic, struct cqe_rx_t cqe_rx) · 1 unmodified line
1512	1529	}
1513	1530
1514	1531	/* Check for errors in the send cmp.queue entry */
1515		−int nicvf_check_cqe_tx_errs(struct nicvf *nic,
1516		− struct cmp_queue cq, struct cqe_send_t cqe_tx)
	1532	+int nicvf_check_cqe_tx_errs(struct nicvf nic, struct cqe_send_t cqe_tx)
1517	1533	{
1518		− struct cmp_queue_stats *stats = &cq->stats;
1519		−
1520	1534	switch (cqe_tx->send_status) {
1521	1535	case CQ_TX_ERROP_GOOD:
1522		− stats->tx.good++;
1523	1536	return 0;
1524	1537	case CQ_TX_ERROP_DESC_FAULT:
1525		− stats->tx.desc_fault++;
	1538	+ this_cpu_inc(nic->drv_stats->tx_desc_fault);
1526	1539	break;
1527	1540	case CQ_TX_ERROP_HDR_CONS_ERR:
1528		− stats->tx.hdr_cons_err++;
	1541	+ this_cpu_inc(nic->drv_stats->tx_hdr_cons_err);
1529	1542	break;
1530	1543	case CQ_TX_ERROP_SUBDC_ERR:
1531		− stats->tx.subdesc_err++;
	1544	+ this_cpu_inc(nic->drv_stats->tx_subdesc_err);
	1545	+ break;
	1546	+ case CQ_TX_ERROP_MAX_SIZE_VIOL:
	1547	+ this_cpu_inc(nic->drv_stats->tx_max_size_exceeded);
1532	1548	break;
1533	1549	case CQ_TX_ERROP_IMM_SIZE_OFLOW:
1534		− stats->tx.imm_size_oflow++;
	1550	+ this_cpu_inc(nic->drv_stats->tx_imm_size_oflow);
1535	1551	break;
1536	1552	case CQ_TX_ERROP_DATA_SEQUENCE_ERR:
1537		− stats->tx.data_seq_err++;
	1553	+ this_cpu_inc(nic->drv_stats->tx_data_seq_err);
1538	1554	break;
1539	1555	case CQ_TX_ERROP_MEM_SEQUENCE_ERR:
1540		− stats->tx.mem_seq_err++;
	1556	+ this_cpu_inc(nic->drv_stats->tx_mem_seq_err);
1541	1557	break;
1542	1558	case CQ_TX_ERROP_LOCK_VIOL:
1543		− stats->tx.lock_viol++;
	1559	+ this_cpu_inc(nic->drv_stats->tx_lock_viol);
1544	1560	break;
1545	1561	case CQ_TX_ERROP_DATA_FAULT:
1546		− stats->tx.data_fault++;
	1562	+ this_cpu_inc(nic->drv_stats->tx_data_fault);
1547	1563	break;
1548	1564	case CQ_TX_ERROP_TSTMP_CONFLICT:
1549		− stats->tx.tstmp_conflict++;
	1565	+ this_cpu_inc(nic->drv_stats->tx_tstmp_conflict);
1550	1566	break;
1551	1567	case CQ_TX_ERROP_TSTMP_TIMEOUT:
1552		− stats->tx.tstmp_timeout++;
	1568	+ this_cpu_inc(nic->drv_stats->tx_tstmp_timeout);
1553	1569	break;
1554	1570	case CQ_TX_ERROP_MEM_FAULT:
1555		− stats->tx.mem_fault++;
	1571	+ this_cpu_inc(nic->drv_stats->tx_mem_fault);
1556	1572	break;
1557	1573	case CQ_TX_ERROP_CK_OVERLAP:
1558		− stats->tx.csum_overlap++;
	1574	+ this_cpu_inc(nic->drv_stats->tx_csum_overlap);
1559	1575	break;
1560	1576	case CQ_TX_ERROP_CK_OFLOW:
1561		− stats->tx.csum_overflow++;
	1577	+ this_cpu_inc(nic->drv_stats->tx_csum_overflow);
1562	1578	break;
1563	1579	}
1564	1580

drivers/net/ethernet/cavium/thunder/nicvf_queues.h+2−22

@@ -158,6 +158,7 @@ enum CQ_TX_ERROP_E { · 157 unmodified lines
158	158	CQ_TX_ERROP_DESC_FAULT = 0x10,
159	159	CQ_TX_ERROP_HDR_CONS_ERR = 0x11,
160	160	CQ_TX_ERROP_SUBDC_ERR = 0x12,
	161	+ CQ_TX_ERROP_MAX_SIZE_VIOL = 0x13,
161	162	CQ_TX_ERROP_IMM_SIZE_OFLOW = 0x80,
162	163	CQ_TX_ERROP_DATA_SEQUENCE_ERR = 0x81,
163	164	CQ_TX_ERROP_MEM_SEQUENCE_ERR = 0x82,
@@ -171,25 +172,6 @@ enum CQ_TX_ERROP_E { · 7 unmodified lines
171	172	CQ_TX_ERROP_ENUM_LAST = 0x8a,
172	173	};
173	174
174		−struct cmp_queue_stats {
175		− struct tx_stats {
176		− u64 good;
177		− u64 desc_fault;
178		− u64 hdr_cons_err;
179		− u64 subdesc_err;
180		− u64 imm_size_oflow;
181		− u64 data_seq_err;
182		− u64 mem_seq_err;
183		− u64 lock_viol;
184		− u64 data_fault;
185		− u64 tstmp_conflict;
186		− u64 tstmp_timeout;
187		− u64 mem_fault;
188		− u64 csum_overlap;
189		− u64 csum_overflow;
190		− } tx;
191		−} ____cacheline_aligned_in_smp;
192		−
193	175	enum RQ_SQ_STATS {
194	176	RQ_SQ_STATS_OCTS,
195	177	RQ_SQ_STATS_PKTS,
@@ -241,7 +223,6 @@ struct cmp_queue { · 45 unmodified lines
241	223	spinlock_t lock; /* lock to serialize processing CQEs */
242	224	void *desc;
243	225	struct q_desc_mem dmem;
244		− struct cmp_queue_stats stats;
245	226	int irq;
246	227	} ____cacheline_aligned_in_smp;
247	228
@@ -336,6 +317,5 @@ u64 nicvf_queue_reg_read(struct nicvf *nic, · 88 unmodified lines
336	317	void nicvf_update_rq_stats(struct nicvf *nic, int rq_idx);
337	318	void nicvf_update_sq_stats(struct nicvf *nic, int sq_idx);
338	319	int nicvf_check_cqe_rx_errs(struct nicvf nic, struct cqe_rx_t cqe_rx);
339		−int nicvf_check_cqe_tx_errs(struct nicvf *nic,
340		− struct cmp_queue cq, struct cqe_send_t cqe_tx);
	320	+int nicvf_check_cqe_tx_errs(struct nicvf nic, struct cqe_send_t cqe_tx);
341	321	#endif /* NICVF_QUEUES_H */

drivers/net/ethernet/cavium/thunder/thunder_bgx.c+2−2

@@ -1242,8 +1242,8 @@ static int bgx_probe(struct pci_dev pdev, const struct pci_device_id ent) · 1241 unmodified lines
1242	1242
1243	1243	pci_read_config_word(pdev, PCI_DEVICE_ID, &sdevid);
1244	1244	if (sdevid != PCI_DEVICE_ID_THUNDER_RGX) {
1245		− bgx->bgx_id =
1246		− (pci_resource_start(pdev, PCI_CFG_REG_BAR_NUM) >> 24) & 1;
	1245	+ bgx->bgx_id = (pci_resource_start(pdev,
	1246	+ PCI_CFG_REG_BAR_NUM) >> 24) & BGX_ID_MASK;
1247	1247	bgx->bgx_id += nic_get_node_id(pdev) * MAX_BGX_PER_NODE;
1248	1248	bgx->max_lmac = MAX_LMAC_PER_BGX;
1249	1249	bgx_vnic[bgx->bgx_id] = bgx;

drivers/net/ethernet/cavium/thunder/thunder_bgx.h+2−0

@@ -28,6 +28,8 @@ · 27 unmodified lines
28	28	#define MAX_DMAC_PER_LMAC 8
29	29	#define MAX_FRAME_SIZE 9216
30	30
	31	+#define BGX_ID_MASK 0x3
	32	+
31	33	#define MAX_DMAC_PER_LMAC_TNS_BYPASS_MODE 2
32	34
33	35	/* Registers */

drivers/net/ethernet/chelsio/cxgb4/sge.c+0−1

@@ -2997,7 +2997,6 @@ void free_rspq_fl(struct adapter adap, struct sge_rspq rq, · 2996 unmodified lines
2997	2997	rq->cntxt_id, fl_id, 0xffff);
2998	2998	dma_free_coherent(adap->pdev_dev, (rq->size + 1) * rq->iqe_len,
2999	2999	rq->desc, rq->phys_addr);
3000		− napi_hash_del(&rq->napi);
3001	3000	netif_napi_del(&rq->napi);
3002	3001	rq->netdev = NULL;
3003	3002	rq->cntxt_id = rq->abs_id = 0;

drivers/net/ethernet/emulex/benet/be_main.c+0−1

@@ -2796,7 +2796,6 @@ static void be_evt_queues_destroy(struct be_adapter *adapter) · 2795 unmodified lines
2796	2796	if (eqo->q.created) {
2797	2797	be_eq_clean(eqo);
2798	2798	be_cmd_q_destroy(adapter, &eqo->q, QTYPE_EQ);
2799		− napi_hash_del(&eqo->napi);
2800	2799	netif_napi_del(&eqo->napi);
2801	2800	free_cpumask_var(eqo->affinity_mask);
2802	2801	}

drivers/net/ethernet/marvell/sky2.c+13−0

@@ -5218,6 +5218,19 @@ static SIMPLE_DEV_PM_OPS(sky2_pm_ops, sky2_suspend, sky2_resume); · 5217 unmodified lines
5218	5218
5219	5219	static void sky2_shutdown(struct pci_dev *pdev)
5220	5220	{
	5221	+ struct sky2_hw *hw = pci_get_drvdata(pdev);
	5222	+ int port;
	5223	+
	5224	+ for (port = 0; port < hw->ports; port++) {
	5225	+ struct net_device *ndev = hw->dev[port];
	5226	+
	5227	+ rtnl_lock();
	5228	+ if (netif_running(ndev)) {
	5229	+ dev_close(ndev);
	5230	+ netif_device_detach(ndev);
	5231	+ }
	5232	+ rtnl_unlock();
	5233	+ }
5221	5234	sky2_suspend(&pdev->dev);
5222	5235	pci_wake_from_d3(pdev, device_may_wakeup(&pdev->dev));
5223	5236	pci_set_power_state(pdev, PCI_D3hot);

drivers/net/ethernet/stmicro/stmmac/Kconfig+1−1

@@ -118,7 +118,7 @@ config DWMAC_STI · 117 unmodified lines
118	118	config DWMAC_STM32
119	119	tristate "STM32 DWMAC support"
120	120	default ARCH_STM32
121		− depends on OF && HAS_IOMEM
	121	+ depends on OF && HAS_IOMEM && (ARCH_STM32 \|\| COMPILE_TEST)
122	122	select MFD_SYSCON
123	123	---help---
124	124	Support for ethernet controller on STM32 SOCs.

drivers/net/ethernet/stmicro/stmmac/altr_tse_pcs.c+2−2

@@ -63,8 +63,8 @@ · 62 unmodified lines
63	63	#define TSE_PCS_SGMII_LINK_TIMER_0 0x0D40
64	64	#define TSE_PCS_SGMII_LINK_TIMER_1 0x0003
65	65	#define TSE_PCS_SW_RESET_TIMEOUT 100
66		−#define TSE_PCS_USE_SGMII_AN_MASK BIT(2)
67		−#define TSE_PCS_USE_SGMII_ENA BIT(1)
	66	+#define TSE_PCS_USE_SGMII_AN_MASK BIT(1)
	67	+#define TSE_PCS_USE_SGMII_ENA BIT(0)
68	68
69	69	#define SGMII_ADAPTER_CTRL_REG 0x00
70	70	#define SGMII_ADAPTER_DISABLE 0x0001

drivers/net/ethernet/stmicro/stmmac/common.h+14−10

@@ -120,14 +120,17 @@ struct stmmac_extra_stats { · 119 unmodified lines
120	120	unsigned long ip_csum_bypassed;
121	121	unsigned long ipv4_pkt_rcvd;
122	122	unsigned long ipv6_pkt_rcvd;
123		− unsigned long rx_msg_type_ext_no_ptp;
124		− unsigned long rx_msg_type_sync;
125		− unsigned long rx_msg_type_follow_up;
126		− unsigned long rx_msg_type_delay_req;
127		− unsigned long rx_msg_type_delay_resp;
128		− unsigned long rx_msg_type_pdelay_req;
129		− unsigned long rx_msg_type_pdelay_resp;
130		− unsigned long rx_msg_type_pdelay_follow_up;
	123	+ unsigned long no_ptp_rx_msg_type_ext;
	124	+ unsigned long ptp_rx_msg_type_sync;
	125	+ unsigned long ptp_rx_msg_type_follow_up;
	126	+ unsigned long ptp_rx_msg_type_delay_req;
	127	+ unsigned long ptp_rx_msg_type_delay_resp;
	128	+ unsigned long ptp_rx_msg_type_pdelay_req;
	129	+ unsigned long ptp_rx_msg_type_pdelay_resp;
	130	+ unsigned long ptp_rx_msg_type_pdelay_follow_up;
	131	+ unsigned long ptp_rx_msg_type_announce;
	132	+ unsigned long ptp_rx_msg_type_management;
	133	+ unsigned long ptp_rx_msg_pkt_reserved_type;
131	134	unsigned long ptp_frame_type;
132	135	unsigned long ptp_ver;
133	136	unsigned long timestamp_dropped;
@@ -482,11 +485,12 @@ struct stmmac_ops { · 348 unmodified lines
482	485	/* PTP and HW Timer helpers */
483	486	struct stmmac_hwtimestamp {
484	487	void (config_hw_tstamping) (void __iomem ioaddr, u32 data);
485		− u32 (config_sub_second_increment) (void __iomem ioaddr, u32 clk_rate);
	488	+ u32 (config_sub_second_increment)(void __iomem ioaddr, u32 ptp_clock,
	489	+ int gmac4);
486	490	int (init_systime) (void __iomem ioaddr, u32 sec, u32 nsec);
487	491	int (config_addend) (void __iomem ioaddr, u32 addend);
488	492	int (adjust_systime) (void __iomem ioaddr, u32 sec, u32 nsec,
489		− int add_sub);
	493	+ int add_sub, int gmac4);
490	494	u64(get_systime) (void __iomem ioaddr);
491	495	};
492	496

drivers/net/ethernet/stmicro/stmmac/descs.h+12−8

@@ -155,14 +155,18 @@ · 154 unmodified lines
155	155	#define ERDES4_L3_L4_FILT_NO_MATCH_MASK GENMASK(27, 26)
156	156
157	157	/* Extended RDES4 message type definitions */
158		−#define RDES_EXT_NO_PTP 0
159		−#define RDES_EXT_SYNC 1
160		−#define RDES_EXT_FOLLOW_UP 2
161		−#define RDES_EXT_DELAY_REQ 3
162		−#define RDES_EXT_DELAY_RESP 4
163		−#define RDES_EXT_PDELAY_REQ 5
164		−#define RDES_EXT_PDELAY_RESP 6
165		−#define RDES_EXT_PDELAY_FOLLOW_UP 7
	158	+#define RDES_EXT_NO_PTP 0x0
	159	+#define RDES_EXT_SYNC 0x1
	160	+#define RDES_EXT_FOLLOW_UP 0x2
	161	+#define RDES_EXT_DELAY_REQ 0x3
	162	+#define RDES_EXT_DELAY_RESP 0x4
	163	+#define RDES_EXT_PDELAY_REQ 0x5
	164	+#define RDES_EXT_PDELAY_RESP 0x6
	165	+#define RDES_EXT_PDELAY_FOLLOW_UP 0x7
	166	+#define RDES_PTP_ANNOUNCE 0x8
	167	+#define RDES_PTP_MANAGEMENT 0x9
	168	+#define RDES_PTP_SIGNALING 0xa
	169	+#define RDES_PTP_PKT_RESERVED_TYPE 0xf
166	170
167	171	/* Basic descriptor structure for normal and alternate descriptors */
168	172	struct dma_desc {

drivers/net/ethernet/stmicro/stmmac/dwmac4_descs.c+74−21

@@ -123,22 +123,29 @@ static int dwmac4_wrback_get_rx_status(void data, struct stmmac_extra_stats x, · 122 unmodified lines
123	123	x->ipv4_pkt_rcvd++;
124	124	if (rdes1 & RDES1_IPV6_HEADER)
125	125	x->ipv6_pkt_rcvd++;
126		− if (message_type == RDES_EXT_SYNC)
127		− x->rx_msg_type_sync++;
	126	+
	127	+ if (message_type == RDES_EXT_NO_PTP)
	128	+ x->no_ptp_rx_msg_type_ext++;
	129	+ else if (message_type == RDES_EXT_SYNC)
	130	+ x->ptp_rx_msg_type_sync++;
128	131	else if (message_type == RDES_EXT_FOLLOW_UP)
129		− x->rx_msg_type_follow_up++;
	132	+ x->ptp_rx_msg_type_follow_up++;
130	133	else if (message_type == RDES_EXT_DELAY_REQ)
131		− x->rx_msg_type_delay_req++;
	134	+ x->ptp_rx_msg_type_delay_req++;
132	135	else if (message_type == RDES_EXT_DELAY_RESP)
133		− x->rx_msg_type_delay_resp++;
	136	+ x->ptp_rx_msg_type_delay_resp++;
134	137	else if (message_type == RDES_EXT_PDELAY_REQ)
135		− x->rx_msg_type_pdelay_req++;
	138	+ x->ptp_rx_msg_type_pdelay_req++;
136	139	else if (message_type == RDES_EXT_PDELAY_RESP)
137		− x->rx_msg_type_pdelay_resp++;
	140	+ x->ptp_rx_msg_type_pdelay_resp++;
138	141	else if (message_type == RDES_EXT_PDELAY_FOLLOW_UP)
139		− x->rx_msg_type_pdelay_follow_up++;
140		− else
141		− x->rx_msg_type_ext_no_ptp++;
	142	+ x->ptp_rx_msg_type_pdelay_follow_up++;
	143	+ else if (message_type == RDES_PTP_ANNOUNCE)
	144	+ x->ptp_rx_msg_type_announce++;
	145	+ else if (message_type == RDES_PTP_MANAGEMENT)
	146	+ x->ptp_rx_msg_type_management++;
	147	+ else if (message_type == RDES_PTP_PKT_RESERVED_TYPE)
	148	+ x->ptp_rx_msg_pkt_reserved_type++;
142	149
143	150	if (rdes1 & RDES1_PTP_PACKET_TYPE)
144	151	x->ptp_frame_type++;
@@ -205,14 +212,18 @@ static void dwmac4_rd_enable_tx_timestamp(struct dma_desc *p) · 60 unmodified lines
205	212
206	213	static int dwmac4_wrback_get_tx_timestamp_status(struct dma_desc *p)
207	214	{
208		− return (le32_to_cpu(p->des3) & TDES3_TIMESTAMP_STATUS)
209		− >> TDES3_TIMESTAMP_STATUS_SHIFT;
	215	+ /* Context type from W/B descriptor must be zero */
	216	+ if (le32_to_cpu(p->des3) & TDES3_CONTEXT_TYPE)
	217	+ return -EINVAL;
	218	+
	219	+ /* Tx Timestamp Status is 1 so des0 and des1'll have valid values */
	220	+ if (le32_to_cpu(p->des3) & TDES3_TIMESTAMP_STATUS)
	221	+ return 0;
	222	+
	223	+ return 1;
210	224	}
211	225
212		−/* NOTE: For RX CTX bit has to be checked before
213		− * HAVE a specific function for TX and another one for RX
214		− */
215		−static u64 dwmac4_wrback_get_timestamp(void *desc, u32 ats)
	226	+static inline u64 dwmac4_get_timestamp(void *desc, u32 ats)
216	227	{
217	228	struct dma_desc p = (struct dma_desc )desc;
218	229	u64 ns;
@@ -224,12 +235,54 @@ static u64 dwmac4_wrback_get_timestamp(void *desc, u32 ats) · 5 unmodified lines
224	235	return ns;
225	236	}
226	237
227		−static int dwmac4_context_get_rx_timestamp_status(void *desc, u32 ats)
	238	+static int dwmac4_rx_check_timestamp(void *desc)
	239	+{
	240	+ struct dma_desc p = (struct dma_desc )desc;
	241	+ u32 own, ctxt;
	242	+ int ret = 1;
	243	+
	244	+ own = p->des3 & RDES3_OWN;
	245	+ ctxt = ((p->des3 & RDES3_CONTEXT_DESCRIPTOR)
	246	+ >> RDES3_CONTEXT_DESCRIPTOR_SHIFT);
	247	+
	248	+ if (likely(!own && ctxt)) {
	249	+ if ((p->des0 == 0xffffffff) && (p->des1 == 0xffffffff))
	250	+ /* Corrupted value */
	251	+ ret = -EINVAL;
	252	+ else
	253	+ /* A valid Timestamp is ready to be read */
	254	+ ret = 0;
	255	+ }
	256	+
	257	+ /* Timestamp not ready */
	258	+ return ret;
	259	+}
	260	+
	261	+static int dwmac4_wrback_get_rx_timestamp_status(void *desc, u32 ats)
228	262	{
229	263	struct dma_desc p = (struct dma_desc )desc;
	264	+ int ret = -EINVAL;
	265	+
	266	+ /* Get the status from normal w/b descriptor */
	267	+ if (likely(p->des3 & TDES3_RS1V)) {
	268	+ if (likely(le32_to_cpu(p->des1) & RDES1_TIMESTAMP_AVAILABLE)) {
	269	+ int i = 0;
	270	+
	271	+ /* Check if timestamp is OK from context descriptor */
	272	+ do {
	273	+ ret = dwmac4_rx_check_timestamp(desc);
	274	+ if (ret < 0)
	275	+ goto exit;
	276	+ i++;
230	277
231		− return (le32_to_cpu(p->des1) & RDES1_TIMESTAMP_AVAILABLE)
232		− >> RDES1_TIMESTAMP_AVAILABLE_SHIFT;
	278	+ } while ((ret == 1) \|\| (i < 10));
	279	+
	280	+ if (i == 10)
	281	+ ret = -EBUSY;
	282	+ }
	283	+ }
	284	+exit:
	285	+ return ret;
233	286	}
234	287
235	288	static void dwmac4_rd_init_rx_desc(struct dma_desc *p, int disable_rx_ic,
@@ -375,8 +428,8 @@ const struct stmmac_desc_ops dwmac4_desc_ops = { · 139 unmodified lines
375	428	.get_rx_frame_len = dwmac4_wrback_get_rx_frame_len,
376	429	.enable_tx_timestamp = dwmac4_rd_enable_tx_timestamp,
377	430	.get_tx_timestamp_status = dwmac4_wrback_get_tx_timestamp_status,
378		− .get_timestamp = dwmac4_wrback_get_timestamp,
379		− .get_rx_timestamp_status = dwmac4_context_get_rx_timestamp_status,
	431	+ .get_rx_timestamp_status = dwmac4_wrback_get_rx_timestamp_status,
	432	+ .get_timestamp = dwmac4_get_timestamp,
380	433	.set_tx_ic = dwmac4_rd_set_tx_ic,
381	434	.prepare_tx_desc = dwmac4_rd_prepare_tx_desc,
382	435	.prepare_tso_tx_desc = dwmac4_rd_prepare_tso_tx_desc,

drivers/net/ethernet/stmicro/stmmac/dwmac4_descs.h+4−0

@@ -59,10 +59,13 @@ · 58 unmodified lines
59	59	#define TDES3_CTXT_TCMSSV BIT(26)
60	60
61	61	/* TDES3 Common */
	62	+#define TDES3_RS1V BIT(26)
	63	+#define TDES3_RS1V_SHIFT 26
62	64	#define TDES3_LAST_DESCRIPTOR BIT(28)
63	65	#define TDES3_LAST_DESCRIPTOR_SHIFT 28
64	66	#define TDES3_FIRST_DESCRIPTOR BIT(29)
65	67	#define TDES3_CONTEXT_TYPE BIT(30)
	68	+#define TDES3_CONTEXT_TYPE_SHIFT 30
66	69
67	70	/* TDS3 use for both format (read and write back) */
68	71	#define TDES3_OWN BIT(31)
@@ -117,6 +120,7 @@ · 48 unmodified lines
117	120	#define RDES3_LAST_DESCRIPTOR BIT(28)
118	121	#define RDES3_FIRST_DESCRIPTOR BIT(29)
119	122	#define RDES3_CONTEXT_DESCRIPTOR BIT(30)
	123	+#define RDES3_CONTEXT_DESCRIPTOR_SHIFT 30
120	124
121	125	/* RDES3 (read format) */
122	126	#define RDES3_BUFFER1_VALID_ADDR BIT(24)

drivers/net/ethernet/stmicro/stmmac/enh_desc.c+18−10

@@ -150,22 +150,30 @@ static void enh_desc_get_ext_status(void data, struct stmmac_extra_stats x, · 149 unmodified lines
150	150	x->ipv4_pkt_rcvd++;
151	151	if (rdes4 & ERDES4_IPV6_PKT_RCVD)
152	152	x->ipv6_pkt_rcvd++;
153		− if (message_type == RDES_EXT_SYNC)
154		− x->rx_msg_type_sync++;
	153	+
	154	+ if (message_type == RDES_EXT_NO_PTP)
	155	+ x->no_ptp_rx_msg_type_ext++;
	156	+ else if (message_type == RDES_EXT_SYNC)
	157	+ x->ptp_rx_msg_type_sync++;
155	158	else if (message_type == RDES_EXT_FOLLOW_UP)
156		− x->rx_msg_type_follow_up++;
	159	+ x->ptp_rx_msg_type_follow_up++;
157	160	else if (message_type == RDES_EXT_DELAY_REQ)
158		− x->rx_msg_type_delay_req++;
	161	+ x->ptp_rx_msg_type_delay_req++;
159	162	else if (message_type == RDES_EXT_DELAY_RESP)
160		− x->rx_msg_type_delay_resp++;
	163	+ x->ptp_rx_msg_type_delay_resp++;
161	164	else if (message_type == RDES_EXT_PDELAY_REQ)
162		− x->rx_msg_type_pdelay_req++;
	165	+ x->ptp_rx_msg_type_pdelay_req++;
163	166	else if (message_type == RDES_EXT_PDELAY_RESP)
164		− x->rx_msg_type_pdelay_resp++;
	167	+ x->ptp_rx_msg_type_pdelay_resp++;
165	168	else if (message_type == RDES_EXT_PDELAY_FOLLOW_UP)
166		− x->rx_msg_type_pdelay_follow_up++;
167		− else
168		− x->rx_msg_type_ext_no_ptp++;
	169	+ x->ptp_rx_msg_type_pdelay_follow_up++;
	170	+ else if (message_type == RDES_PTP_ANNOUNCE)
	171	+ x->ptp_rx_msg_type_announce++;
	172	+ else if (message_type == RDES_PTP_MANAGEMENT)
	173	+ x->ptp_rx_msg_type_management++;
	174	+ else if (message_type == RDES_PTP_PKT_RESERVED_TYPE)
	175	+ x->ptp_rx_msg_pkt_reserved_type++;
	176	+
169	177	if (rdes4 & ERDES4_PTP_FRAME_TYPE)
170	178	x->ptp_frame_type++;
171	179	if (rdes4 & ERDES4_PTP_VER)

drivers/net/ethernet/stmicro/stmmac/stmmac.h+1−0

@@ -128,6 +128,7 @@ struct stmmac_priv { · 127 unmodified lines
128	128	int irq_wake;
129	129	spinlock_t ptp_lock;
130	130	void __iomem *mmcaddr;
	131	+ void __iomem *ptpaddr;
131	132	u32 rx_tail_addr;
132	133	u32 tx_tail_addr;
133	134	u32 mss;

drivers/net/ethernet/stmicro/stmmac/stmmac_ethtool.c+11−8

@@ -115,14 +115,17 @@ static const struct stmmac_stats stmmac_gstrings_stats[] = { · 114 unmodified lines
115	115	STMMAC_STAT(ip_csum_bypassed),
116	116	STMMAC_STAT(ipv4_pkt_rcvd),
117	117	STMMAC_STAT(ipv6_pkt_rcvd),
118		− STMMAC_STAT(rx_msg_type_ext_no_ptp),
119		− STMMAC_STAT(rx_msg_type_sync),
120		− STMMAC_STAT(rx_msg_type_follow_up),
121		− STMMAC_STAT(rx_msg_type_delay_req),
122		− STMMAC_STAT(rx_msg_type_delay_resp),
123		− STMMAC_STAT(rx_msg_type_pdelay_req),
124		− STMMAC_STAT(rx_msg_type_pdelay_resp),
125		− STMMAC_STAT(rx_msg_type_pdelay_follow_up),
	118	+ STMMAC_STAT(no_ptp_rx_msg_type_ext),
	119	+ STMMAC_STAT(ptp_rx_msg_type_sync),
	120	+ STMMAC_STAT(ptp_rx_msg_type_follow_up),
	121	+ STMMAC_STAT(ptp_rx_msg_type_delay_req),
	122	+ STMMAC_STAT(ptp_rx_msg_type_delay_resp),
	123	+ STMMAC_STAT(ptp_rx_msg_type_pdelay_req),
	124	+ STMMAC_STAT(ptp_rx_msg_type_pdelay_resp),
	125	+ STMMAC_STAT(ptp_rx_msg_type_pdelay_follow_up),
	126	+ STMMAC_STAT(ptp_rx_msg_type_announce),
	127	+ STMMAC_STAT(ptp_rx_msg_type_management),
	128	+ STMMAC_STAT(ptp_rx_msg_pkt_reserved_type),
126	129	STMMAC_STAT(ptp_frame_type),
127	130	STMMAC_STAT(ptp_ver),
128	131	STMMAC_STAT(timestamp_dropped),

drivers/net/ethernet/stmicro/stmmac/stmmac_hwtstamp.c+34−9

@@ -34,21 +34,29 @@ static void stmmac_config_hw_tstamping(void __iomem *ioaddr, u32 data) · 33 unmodified lines
34	34	}
35	35
36	36	static u32 stmmac_config_sub_second_increment(void __iomem *ioaddr,
37		− u32 ptp_clock)
	37	+ u32 ptp_clock, int gmac4)
38	38	{
39	39	u32 value = readl(ioaddr + PTP_TCR);
40	40	unsigned long data;
41	41
42		− /* Convert the ptp_clock to nano second
43		− * formula = (2/ptp_clock) * 1000000000
44		− * where, ptp_clock = 50MHz.
	42	+ /* For GMAC3.x, 4.x versions, convert the ptp_clock to nano second
	43	+ * formula = (1/ptp_clock) * 1000000000
	44	+ * where ptp_clock is 50MHz if fine method is used to update system
45	45	*/
46		− data = (2000000000ULL / ptp_clock);
	46	+ if (value & PTP_TCR_TSCFUPDT)
	47	+ data = (1000000000ULL / 50000000);
	48	+ else
	49	+ data = (1000000000ULL / ptp_clock);
47	50
48	51	/* 0.465ns accuracy */
49	52	if (!(value & PTP_TCR_TSCTRLSSR))
50	53	data = (data * 1000) / 465;
51	54
	55	+ data &= PTP_SSIR_SSINC_MASK;
	56	+
	57	+ if (gmac4)
	58	+ data = data << GMAC4_PTP_SSIR_SSINC_SHIFT;
	59	+
52	60	writel(data, ioaddr + PTP_SSIR);
53	61
54	62	return data;
@@ -104,14 +112,30 @@ static int stmmac_config_addend(void __iomem *ioaddr, u32 addend) · 49 unmodified lines
104	112	}
105	113
106	114	static int stmmac_adjust_systime(void __iomem *ioaddr, u32 sec, u32 nsec,
107		− int add_sub)
	115	+ int add_sub, int gmac4)
108	116	{
109	117	u32 value;
110	118	int limit;
111	119
	120	+ if (add_sub) {
	121	+ /* If the new sec value needs to be subtracted with
	122	+ * the system time, then MAC_STSUR reg should be
	123	+ * programmed with (2^32 – <new_sec_value>)
	124	+ */
	125	+ if (gmac4)
	126	+ sec = (100000000ULL - sec);
	127	+
	128	+ value = readl(ioaddr + PTP_TCR);
	129	+ if (value & PTP_TCR_TSCTRLSSR)
	130	+ nsec = (PTP_DIGITAL_ROLLOVER_MODE - nsec);
	131	+ else
	132	+ nsec = (PTP_BINARY_ROLLOVER_MODE - nsec);
	133	+ }
	134	+
112	135	writel(sec, ioaddr + PTP_STSUR);
113		− writel(((add_sub << PTP_STNSUR_ADDSUB_SHIFT) \| nsec),
114		− ioaddr + PTP_STNSUR);
	136	+ value = (add_sub << PTP_STNSUR_ADDSUB_SHIFT) \| nsec;
	137	+ writel(value, ioaddr + PTP_STNSUR);
	138	+
115	139	/* issue command to initialize the system time value */
116	140	value = readl(ioaddr + PTP_TCR);
117	141	value \|= PTP_TCR_TSUPDT;
@@ -134,8 +158,9 @@ static u64 stmmac_get_systime(void __iomem *ioaddr) · 16 unmodified lines
134	158	{
135	159	u64 ns;
136	160
	161	+ /* Get the TSSS value */
137	162	ns = readl(ioaddr + PTP_STNSR);
138		− /* convert sec time value to nanosecond */
	163	+ /* Get the TSS and convert sec time value to nanosecond */
139	164	ns += readl(ioaddr + PTP_STSR) * 1000000000ULL;
140	165
141	166	return ns;

drivers/net/ethernet/stmicro/stmmac/stmmac_main.c+48−45

@@ -342,18 +342,17 @@ out: · 341 unmodified lines
342	342
343	343	/* stmmac_get_tx_hwtstamp - get HW TX timestamps
344	344	* @priv: driver private structure
345		− * @entry : descriptor index to be used.
	345	+ * @p : descriptor pointer
346	346	* @skb : the socket buffer
347	347	* Description :
348	348	* This function will read timestamp from the descriptor & pass it to stack.
349	349	* and also perform some sanity checks.
350	350	*/
351	351	static void stmmac_get_tx_hwtstamp(struct stmmac_priv *priv,
352		− unsigned int entry, struct sk_buff *skb)
	352	+ struct dma_desc p, struct sk_buff skb)
353	353	{
354	354	struct skb_shared_hwtstamps shhwtstamp;
355	355	u64 ns;
356		− void *desc = NULL;
357	356
358	357	if (!priv->hwts_tx_en)
359	358	return;
@@ -362,58 +361,55 @@ static void stmmac_get_tx_hwtstamp(struct stmmac_priv *priv, · 2 unmodified lines
362	361	if (likely(!skb \|\| !(skb_shinfo(skb)->tx_flags & SKBTX_IN_PROGRESS)))
363	362	return;
364	363
365		− if (priv->adv_ts)
366		− desc = (priv->dma_etx + entry);
367		− else
368		− desc = (priv->dma_tx + entry);
369		−
370	364	/* check tx tstamp status */
371		− if (!priv->hw->desc->get_tx_timestamp_status((struct dma_desc *)desc))
372		− return;
	365	+ if (!priv->hw->desc->get_tx_timestamp_status(p)) {
	366	+ /* get the valid tstamp */
	367	+ ns = priv->hw->desc->get_timestamp(p, priv->adv_ts);
373	368
374		− /* get the valid tstamp */
375		− ns = priv->hw->desc->get_timestamp(desc, priv->adv_ts);
	369	+ memset(&shhwtstamp, 0, sizeof(struct skb_shared_hwtstamps));
	370	+ shhwtstamp.hwtstamp = ns_to_ktime(ns);
376	371
377		− memset(&shhwtstamp, 0, sizeof(struct skb_shared_hwtstamps));
378		− shhwtstamp.hwtstamp = ns_to_ktime(ns);
379		− /* pass tstamp to stack */
380		− skb_tstamp_tx(skb, &shhwtstamp);
	372	+ netdev_info(priv->dev, "get valid TX hw timestamp %llu\n", ns);
	373	+ /* pass tstamp to stack */
	374	+ skb_tstamp_tx(skb, &shhwtstamp);
	375	+ }
381	376
382	377	return;
383	378	}
384	379
385	380	/* stmmac_get_rx_hwtstamp - get HW RX timestamps
386	381	* @priv: driver private structure
387		− * @entry : descriptor index to be used.
	382	+ * @p : descriptor pointer
	383	+ * @np : next descriptor pointer
388	384	* @skb : the socket buffer
389	385	* Description :
390	386	* This function will read received packet's timestamp from the descriptor
391	387	* and pass it to stack. It also perform some sanity checks.
392	388	*/
393		−static void stmmac_get_rx_hwtstamp(struct stmmac_priv *priv,
394		− unsigned int entry, struct sk_buff *skb)
	389	+static void stmmac_get_rx_hwtstamp(struct stmmac_priv priv, struct dma_desc p,
	390	+ struct dma_desc np, struct sk_buff skb)
395	391	{
396	392	struct skb_shared_hwtstamps *shhwtstamp = NULL;
397	393	u64 ns;
398		− void *desc = NULL;
399	394
400	395	if (!priv->hwts_rx_en)
401	396	return;
402	397
403		− if (priv->adv_ts)
404		− desc = (priv->dma_erx + entry);
405		− else
406		− desc = (priv->dma_rx + entry);
407		−
408		− /* exit if rx tstamp is not valid */
409		− if (!priv->hw->desc->get_rx_timestamp_status(desc, priv->adv_ts))
410		− return;
	398	+ /* Check if timestamp is available */
	399	+ if (!priv->hw->desc->get_rx_timestamp_status(p, priv->adv_ts)) {
	400	+ /* For GMAC4, the valid timestamp is from CTX next desc. */
	401	+ if (priv->plat->has_gmac4)
	402	+ ns = priv->hw->desc->get_timestamp(np, priv->adv_ts);
	403	+ else
	404	+ ns = priv->hw->desc->get_timestamp(p, priv->adv_ts);
411	405
412		− /* get valid tstamp */
413		− ns = priv->hw->desc->get_timestamp(desc, priv->adv_ts);
414		− shhwtstamp = skb_hwtstamps(skb);
415		− memset(shhwtstamp, 0, sizeof(struct skb_shared_hwtstamps));
416		− shhwtstamp->hwtstamp = ns_to_ktime(ns);
	406	+ netdev_info(priv->dev, "get valid RX hw timestamp %llu\n", ns);
	407	+ shhwtstamp = skb_hwtstamps(skb);
	408	+ memset(shhwtstamp, 0, sizeof(struct skb_shared_hwtstamps));
	409	+ shhwtstamp->hwtstamp = ns_to_ktime(ns);
	410	+ } else {
	411	+ netdev_err(priv->dev, "cannot get RX hw timestamp\n");
	412	+ }
417	413	}
418	414
419	415	/**
@@ -600,17 +596,18 @@ static int stmmac_hwtstamp_ioctl(struct net_device dev, struct ifreq ifr) · 180 unmodified lines
600	596	priv->hwts_tx_en = config.tx_type == HWTSTAMP_TX_ON;
601	597
602	598	if (!priv->hwts_tx_en && !priv->hwts_rx_en)
603		− priv->hw->ptp->config_hw_tstamping(priv->ioaddr, 0);
	599	+ priv->hw->ptp->config_hw_tstamping(priv->ptpaddr, 0);
604	600	else {
605	601	value = (PTP_TCR_TSENA \| PTP_TCR_TSCFUPDT \| PTP_TCR_TSCTRLSSR \|
606	602	tstamp_all \| ptp_v2 \| ptp_over_ethernet \|
607	603	ptp_over_ipv6_udp \| ptp_over_ipv4_udp \| ts_event_en \|
608	604	ts_master_en \| snap_type_sel);
609		− priv->hw->ptp->config_hw_tstamping(priv->ioaddr, value);
	605	+ priv->hw->ptp->config_hw_tstamping(priv->ptpaddr, value);
610	606
611	607	/* program Sub Second Increment reg */
612	608	sec_inc = priv->hw->ptp->config_sub_second_increment(
613		− priv->ioaddr, priv->clk_ptp_rate);
	609	+ priv->ptpaddr, priv->clk_ptp_rate,
	610	+ priv->plat->has_gmac4);
614	611	temp = div_u64(1000000000ULL, sec_inc);
615	612
616	613	/* calculate default added value:
@@ -620,14 +617,14 @@ static int stmmac_hwtstamp_ioctl(struct net_device dev, struct ifreq ifr) · 3 unmodified lines
620	617	*/
621	618	temp = (u64)(temp << 32);
622	619	priv->default_addend = div_u64(temp, priv->clk_ptp_rate);
623		− priv->hw->ptp->config_addend(priv->ioaddr,
	620	+ priv->hw->ptp->config_addend(priv->ptpaddr,
624	621	priv->default_addend);
625	622
626	623	/* initialize system time */
627	624	ktime_get_real_ts64(&now);
628	625
629	626	/* lower 32 bits of tv_sec are safe until y2106 */
630		− priv->hw->ptp->init_systime(priv->ioaddr, (u32)now.tv_sec,
	627	+ priv->hw->ptp->init_systime(priv->ptpaddr, (u32)now.tv_sec,
631	628	now.tv_nsec);
632	629	}
633	630
@@ -1341,7 +1338,7 @@ static void stmmac_tx_clean(struct stmmac_priv *priv) · 707 unmodified lines
1341	1338	priv->dev->stats.tx_packets++;
1342	1339	priv->xstats.tx_pkt_n++;
1343	1340	}
1344		− stmmac_get_tx_hwtstamp(priv, entry, skb);
	1341	+ stmmac_get_tx_hwtstamp(priv, p, skb);
1345	1342	}
1346	1343
1347	1344	if (likely(priv->tx_skbuff_dma[entry].buf)) {
@@ -1487,10 +1484,13 @@ static void stmmac_mmc_setup(struct stmmac_priv *priv) · 139 unmodified lines
1487	1484	unsigned int mode = MMC_CNTRL_RESET_ON_READ \| MMC_CNTRL_COUNTER_RESET \|
1488	1485	MMC_CNTRL_PRESET \| MMC_CNTRL_FULL_HALF_PRESET;
1489	1486
1490		− if (priv->synopsys_id >= DWMAC_CORE_4_00)
	1487	+ if (priv->synopsys_id >= DWMAC_CORE_4_00) {
	1488	+ priv->ptpaddr = priv->ioaddr + PTP_GMAC4_OFFSET;
1491	1489	priv->mmcaddr = priv->ioaddr + MMC_GMAC4_OFFSET;
1492		− else
	1490	+ } else {
	1491	+ priv->ptpaddr = priv->ioaddr + PTP_GMAC3_X_OFFSET;
1493	1492	priv->mmcaddr = priv->ioaddr + MMC_GMAC3_X_OFFSET;
	1493	+ }
1494	1494
1495	1495	dwmac_mmc_intr_all_mask(priv->mmcaddr);
1496	1496
@@ -2504,6 +2504,7 @@ static int stmmac_rx(struct stmmac_priv *priv, int limit) · 1007 unmodified lines
2504	2504	while (count < limit) {
2505	2505	int status;
2506	2506	struct dma_desc *p;
	2507	+ struct dma_desc *np;
2507	2508
2508	2509	if (priv->extend_desc)
2509	2510	p = (struct dma_desc *)(priv->dma_erx + entry);
@@ -2523,9 +2524,11 @@ static int stmmac_rx(struct stmmac_priv *priv, int limit) · 13 unmodified lines
2523	2524	next_entry = priv->cur_rx;
2524	2525
2525	2526	if (priv->extend_desc)
2526		− prefetch(priv->dma_erx + next_entry);
	2527	+ np = (struct dma_desc *)(priv->dma_erx + next_entry);
2527	2528	else
2528		− prefetch(priv->dma_rx + next_entry);
	2529	+ np = priv->dma_rx + next_entry;
	2530	+
	2531	+ prefetch(np);
2529	2532
2530	2533	if ((priv->extend_desc) && (priv->hw->desc->rx_extended_status))
2531	2534	priv->hw->desc->rx_extended_status(&priv->dev->stats,
@@ -2635,14 +2638,14 @@ static int stmmac_rx(struct stmmac_priv *priv, int limit) · 103 unmodified lines
2635	2638	DMA_FROM_DEVICE);
2636	2639	}
2637	2640
2638		− stmmac_get_rx_hwtstamp(priv, entry, skb);
2639		−
2640	2641	if (netif_msg_pktdata(priv)) {
2641	2642	netdev_dbg(priv->dev, "frame received (%dbytes)",
2642	2643	frame_len);
2643	2644	print_pkt(skb->data, frame_len);
2644	2645	}
2645	2646
	2647	+ stmmac_get_rx_hwtstamp(priv, p, np, skb);
	2648	+
2646	2649	stmmac_rx_vlan(priv->dev, skb);
2647	2650
2648	2651	skb->protocol = eth_type_trans(skb, priv->dev);

drivers/net/ethernet/stmicro/stmmac/stmmac_ptp.c+5−4

@@ -54,7 +54,7 @@ static int stmmac_adjust_freq(struct ptp_clock_info *ptp, s32 ppb) · 53 unmodified lines
54	54
55	55	spin_lock_irqsave(&priv->ptp_lock, flags);
56	56
57		− priv->hw->ptp->config_addend(priv->ioaddr, addend);
	57	+ priv->hw->ptp->config_addend(priv->ptpaddr, addend);
58	58
59	59	spin_unlock_irqrestore(&priv->ptp_lock, flags);
60	60
@@ -89,7 +89,8 @@ static int stmmac_adjust_time(struct ptp_clock_info *ptp, s64 delta) · 28 unmodified lines
89	89
90	90	spin_lock_irqsave(&priv->ptp_lock, flags);
91	91
92		− priv->hw->ptp->adjust_systime(priv->ioaddr, sec, nsec, neg_adj);
	92	+ priv->hw->ptp->adjust_systime(priv->ptpaddr, sec, nsec, neg_adj,
	93	+ priv->plat->has_gmac4);
93	94
94	95	spin_unlock_irqrestore(&priv->ptp_lock, flags);
95	96
@@ -114,7 +115,7 @@ static int stmmac_get_time(struct ptp_clock_info ptp, struct timespec64 ts) · 18 unmodified lines
114	115
115	116	spin_lock_irqsave(&priv->ptp_lock, flags);
116	117
117		− ns = priv->hw->ptp->get_systime(priv->ioaddr);
	118	+ ns = priv->hw->ptp->get_systime(priv->ptpaddr);
118	119
119	120	spin_unlock_irqrestore(&priv->ptp_lock, flags);
120	121
@@ -141,7 +142,7 @@ static int stmmac_set_time(struct ptp_clock_info *ptp, · 20 unmodified lines
141	142
142	143	spin_lock_irqsave(&priv->ptp_lock, flags);
143	144
144		− priv->hw->ptp->init_systime(priv->ioaddr, ts->tv_sec, ts->tv_nsec);
	145	+ priv->hw->ptp->init_systime(priv->ptpaddr, ts->tv_sec, ts->tv_nsec);
145	146
146	147	spin_unlock_irqrestore(&priv->ptp_lock, flags);
147	148

drivers/net/ethernet/stmicro/stmmac/stmmac_ptp.h+37−35

@@ -22,51 +22,53 @@ · 21 unmodified lines
22	22	Author: Rayagond Kokatanur <rayagond@vayavyalabs.com>
23	23	******************************************************************************/
24	24
25		−#ifndef __STMMAC_PTP_H__
26		−#define __STMMAC_PTP_H__
	25	+#ifndef __STMMAC_PTP_H__
	26	+#define __STMMAC_PTP_H__
27	27
28		−/* IEEE 1588 PTP register offsets */
29		−#define PTP_TCR 0x0700 /* Timestamp Control Reg */
30		−#define PTP_SSIR 0x0704 /* Sub-Second Increment Reg */
31		−#define PTP_STSR 0x0708 /* System Time – Seconds Regr */
32		−#define PTP_STNSR 0x070C /* System Time – Nanoseconds Reg */
33		−#define PTP_STSUR 0x0710 /* System Time – Seconds Update Reg */
34		−#define PTP_STNSUR 0x0714 /* System Time – Nanoseconds Update Reg */
35		−#define PTP_TAR 0x0718 /* Timestamp Addend Reg */
36		−#define PTP_TTSR 0x071C /* Target Time Seconds Reg */
37		−#define PTP_TTNSR 0x0720 /* Target Time Nanoseconds Reg */
38		−#define PTP_STHWSR 0x0724 /* System Time - Higher Word Seconds Reg */
39		−#define PTP_TSR 0x0728 /* Timestamp Status */
	28	+#define PTP_GMAC4_OFFSET 0xb00
	29	+#define PTP_GMAC3_X_OFFSET 0x700
40	30
41		−#define PTP_STNSUR_ADDSUB_SHIFT 31
	31	+/* IEEE 1588 PTP register offsets */
	32	+#define PTP_TCR 0x00 /* Timestamp Control Reg */
	33	+#define PTP_SSIR 0x04 /* Sub-Second Increment Reg */
	34	+#define PTP_STSR 0x08 /* System Time – Seconds Regr */
	35	+#define PTP_STNSR 0x0c /* System Time – Nanoseconds Reg */
	36	+#define PTP_STSUR 0x10 /* System Time – Seconds Update Reg */
	37	+#define PTP_STNSUR 0x14 /* System Time – Nanoseconds Update Reg */
	38	+#define PTP_TAR 0x18 /* Timestamp Addend Reg */
42	39
43		−/* PTP TCR defines */
44		−#define PTP_TCR_TSENA 0x00000001 /* Timestamp Enable */
45		−#define PTP_TCR_TSCFUPDT 0x00000002 /* Timestamp Fine/Coarse Update */
46		−#define PTP_TCR_TSINIT 0x00000004 /* Timestamp Initialize */
47		−#define PTP_TCR_TSUPDT 0x00000008 /* Timestamp Update */
48		−/* Timestamp Interrupt Trigger Enable */
49		−#define PTP_TCR_TSTRIG 0x00000010
50		−#define PTP_TCR_TSADDREG 0x00000020 /* Addend Reg Update */
51		−#define PTP_TCR_TSENALL 0x00000100 /* Enable Timestamp for All Frames */
52		−/* Timestamp Digital or Binary Rollover Control */
53		−#define PTP_TCR_TSCTRLSSR 0x00000200
	40	+#define PTP_STNSUR_ADDSUB_SHIFT 31
	41	+#define PTP_DIGITAL_ROLLOVER_MODE 0x3B9ACA00 /* 10e9-1 ns */
	42	+#define PTP_BINARY_ROLLOVER_MODE 0x80000000 /* ~0.466 ns */
54	43
	44	+/* PTP Timestamp control register defines */
	45	+#define PTP_TCR_TSENA BIT(0) /* Timestamp Enable */
	46	+#define PTP_TCR_TSCFUPDT BIT(1) /* Timestamp Fine/Coarse Update */
	47	+#define PTP_TCR_TSINIT BIT(2) /* Timestamp Initialize */
	48	+#define PTP_TCR_TSUPDT BIT(3) /* Timestamp Update */
	49	+#define PTP_TCR_TSTRIG BIT(4) /* Timestamp Interrupt Trigger Enable */
	50	+#define PTP_TCR_TSADDREG BIT(5) /* Addend Reg Update */
	51	+#define PTP_TCR_TSENALL BIT(8) /* Enable Timestamp for All Frames */
	52	+#define PTP_TCR_TSCTRLSSR BIT(9) /* Digital or Binary Rollover Control */
55	53	/* Enable PTP packet Processing for Version 2 Format */
56		−#define PTP_TCR_TSVER2ENA 0x00000400
	54	+#define PTP_TCR_TSVER2ENA BIT(10)
57	55	/* Enable Processing of PTP over Ethernet Frames */
58		−#define PTP_TCR_TSIPENA 0x00000800
	56	+#define PTP_TCR_TSIPENA BIT(11)
59	57	/* Enable Processing of PTP Frames Sent over IPv6-UDP */
60		−#define PTP_TCR_TSIPV6ENA 0x00001000
	58	+#define PTP_TCR_TSIPV6ENA BIT(12)
61	59	/* Enable Processing of PTP Frames Sent over IPv4-UDP */
62		−#define PTP_TCR_TSIPV4ENA 0x00002000
	60	+#define PTP_TCR_TSIPV4ENA BIT(13)
63	61	/* Enable Timestamp Snapshot for Event Messages */
64		−#define PTP_TCR_TSEVNTENA 0x00004000
	62	+#define PTP_TCR_TSEVNTENA BIT(14)
65	63	/* Enable Snapshot for Messages Relevant to Master */
66		−#define PTP_TCR_TSMSTRENA 0x00008000
	64	+#define PTP_TCR_TSMSTRENA BIT(15)
67	65	/* Select PTP packets for Taking Snapshots */
68		−#define PTP_TCR_SNAPTYPSEL_1 0x00010000
	66	+#define PTP_TCR_SNAPTYPSEL_1 GENMASK(17, 16)
69	67	/* Enable MAC address for PTP Frame Filtering */
70		−#define PTP_TCR_TSENMACADDR 0x00040000
	68	+#define PTP_TCR_TSENMACADDR BIT(18)
	69	+
	70	+/* SSIR defines */
	71	+#define PTP_SSIR_SSINC_MASK 0xff
	72	+#define GMAC4_PTP_SSIR_SSINC_SHIFT 16
71	73
72		−#endif /* __STMMAC_PTP_H__ */
	74	+#endif /* __STMMAC_PTP_H__ */

drivers/net/ethernet/sun/sunbmac.c+3−2

@@ -623,6 +623,7 @@ static int bigmac_init_hw(struct bigmac *bp, int from_irq) · 622 unmodified lines
623	623	void __iomem *gregs = bp->gregs;
624	624	void __iomem *cregs = bp->creg;
625	625	void __iomem *bregs = bp->bregs;
	626	+ __u32 bblk_dvma = (__u32)bp->bblock_dvma;
626	627	unsigned char *e = &bp->dev->dev_addr[0];
627	628
628	629	/* Latch current counters into statistics. */
@@ -671,9 +672,9 @@ static int bigmac_init_hw(struct bigmac *bp, int from_irq) · 42 unmodified lines
671	672	bregs + BMAC_XIFCFG);
672	673
673	674	/* Tell the QEC where the ring descriptors are. */
674		− sbus_writel(bp->bblock_dvma + bib_offset(be_rxd, 0),
	675	+ sbus_writel(bblk_dvma + bib_offset(be_rxd, 0),
675	676	cregs + CREG_RXDS);
676		− sbus_writel(bp->bblock_dvma + bib_offset(be_txd, 0),
	677	+ sbus_writel(bblk_dvma + bib_offset(be_txd, 0),
677	678	cregs + CREG_TXDS);
678	679
679	680	/* Setup the FIFO pointers into QEC local memory. */

drivers/net/ethernet/sun/sunbmac.h+1−1

@@ -291,7 +291,7 @@ struct bigmac { · 290 unmodified lines
291	291	void __iomem bregs; / BigMAC Registers */
292	292	void __iomem tregs; / BigMAC Transceiver */
293	293	struct bmac_init_block bmac_block; / RX and TX descriptors */
294		− __u32 bblock_dvma; /* RX and TX descriptors */
	294	+ dma_addr_t bblock_dvma; /* RX and TX descriptors */
295	295
296	296	spinlock_t lock;
297	297

drivers/net/ethernet/sun/sunqe.c+6−5

@@ -124,7 +124,7 @@ static void qe_init_rings(struct sunqe *qep) · 123 unmodified lines
124	124	{
125	125	struct qe_init_block *qb = qep->qe_block;
126	126	struct sunqe_buffers *qbufs = qep->buffers;
127		− __u32 qbufs_dvma = qep->buffers_dvma;
	127	+ __u32 qbufs_dvma = (__u32)qep->buffers_dvma;
128	128	int i;
129	129
130	130	qep->rx_new = qep->rx_old = qep->tx_new = qep->tx_old = 0;
@@ -144,6 +144,7 @@ static int qe_init(struct sunqe *qep, int from_irq) · 13 unmodified lines
144	144	void __iomem *mregs = qep->mregs;
145	145	void __iomem *gregs = qecp->gregs;
146	146	unsigned char *e = &qep->dev->dev_addr[0];
	147	+ __u32 qblk_dvma = (__u32)qep->qblock_dvma;
147	148	u32 tmp;
148	149	int i;
149	150
@@ -152,8 +153,8 @@ static int qe_init(struct sunqe *qep, int from_irq) · 2 unmodified lines
152	153	return -EAGAIN;
153	154
154	155	/* Setup initial rx/tx init block pointers. */
155		− sbus_writel(qep->qblock_dvma + qib_offset(qe_rxd, 0), cregs + CREG_RXDS);
156		− sbus_writel(qep->qblock_dvma + qib_offset(qe_txd, 0), cregs + CREG_TXDS);
	156	+ sbus_writel(qblk_dvma + qib_offset(qe_rxd, 0), cregs + CREG_RXDS);
	157	+ sbus_writel(qblk_dvma + qib_offset(qe_txd, 0), cregs + CREG_TXDS);
157	158
158	159	/* Enable/mask the various irq's. */
159	160	sbus_writel(0, cregs + CREG_RIMASK);
@@ -413,7 +414,7 @@ static void qe_rx(struct sunqe *qep) · 253 unmodified lines
413	414	struct net_device *dev = qep->dev;
414	415	struct qe_rxd *this;
415	416	struct sunqe_buffers *qbufs = qep->buffers;
416		− __u32 qbufs_dvma = qep->buffers_dvma;
	417	+ __u32 qbufs_dvma = (__u32)qep->buffers_dvma;
417	418	int elem = qep->rx_new;
418	419	u32 flags;
419	420
@@ -572,7 +573,7 @@ static int qe_start_xmit(struct sk_buff skb, struct net_device dev) · 152 unmodified lines
572	573	{
573	574	struct sunqe *qep = netdev_priv(dev);
574	575	struct sunqe_buffers *qbufs = qep->buffers;
575		− __u32 txbuf_dvma, qbufs_dvma = qep->buffers_dvma;
	576	+ __u32 txbuf_dvma, qbufs_dvma = (__u32)qep->buffers_dvma;
576	577	unsigned char *txbuf;
577	578	int len, entry;
578	579

drivers/net/ethernet/sun/sunqe.h+2−2

@@ -334,12 +334,12 @@ struct sunqe { · 333 unmodified lines
334	334	void __iomem qcregs; / QEC per-channel Registers */
335	335	void __iomem mregs; / Per-channel MACE Registers */
336	336	struct qe_init_block qe_block; / RX and TX descriptors */
337		− __u32 qblock_dvma; /* RX and TX descriptors */
	337	+ dma_addr_t qblock_dvma; /* RX and TX descriptors */
338	338	spinlock_t lock; /* Protects txfull state */
339	339	int rx_new, rx_old; /* RX ring extents */
340	340	int tx_new, tx_old; /* TX ring extents */
341	341	struct sunqe_buffers buffers; / CPU visible address. */
342		− __u32 buffers_dvma; /* DVMA visible address. */
	342	+ dma_addr_t buffers_dvma; /* DVMA visible address. */
343	343	struct sunqec *parent;
344	344	u8 mconfig; /* Base MACE mconfig value */
345	345	struct platform_device op; / QE's OF device struct */

drivers/net/ethernet/ti/cpsw.c+74−21

@@ -2373,8 +2373,11 @@ static int cpsw_probe_dt(struct cpsw_platform_data *data, · 2372 unmodified lines
2373	2373	* to the PHY is the Ethernet MAC DT node.
2374	2374	*/
2375	2375	ret = of_phy_register_fixed_link(slave_node);
2376		− if (ret)
	2376	+ if (ret) {
	2377	+ if (ret != -EPROBE_DEFER)
	2378	+ dev_err(&pdev->dev, "failed to register fixed-link phy: %d\n", ret);
2377	2379	return ret;
	2380	+ }
2378	2381	slave_data->phy_node = of_node_get(slave_node);
2379	2382	} else if (parp) {
2380	2383	u32 phyid;
@@ -2395,6 +2398,7 @@ static int cpsw_probe_dt(struct cpsw_platform_data *data, · 14 unmodified lines
2395	2398	}
2396	2399	snprintf(slave_data->phy_id, sizeof(slave_data->phy_id),
2397	2400	PHY_ID_FMT, mdio->name, phyid);
	2401	+ put_device(&mdio->dev);
2398	2402	} else {
2399	2403	dev_err(&pdev->dev,
2400	2404	"No slave[%d] phy_id, phy-handle, or fixed-link property\n",
@@ -2438,6 +2442,46 @@ no_phy_slave: · 37 unmodified lines
2438	2442	return 0;
2439	2443	}
2440	2444
	2445	+static void cpsw_remove_dt(struct platform_device *pdev)
	2446	+{
	2447	+ struct net_device *ndev = platform_get_drvdata(pdev);
	2448	+ struct cpsw_common *cpsw = ndev_to_cpsw(ndev);
	2449	+ struct cpsw_platform_data *data = &cpsw->data;
	2450	+ struct device_node *node = pdev->dev.of_node;
	2451	+ struct device_node *slave_node;
	2452	+ int i = 0;
	2453	+
	2454	+ for_each_available_child_of_node(node, slave_node) {
	2455	+ struct cpsw_slave_data *slave_data = &data->slave_data[i];
	2456	+
	2457	+ if (strcmp(slave_node->name, "slave"))
	2458	+ continue;
	2459	+
	2460	+ if (of_phy_is_fixed_link(slave_node)) {
	2461	+ struct phy_device *phydev;
	2462	+
	2463	+ phydev = of_phy_find_device(slave_node);
	2464	+ if (phydev) {
	2465	+ fixed_phy_unregister(phydev);
	2466	+ /* Put references taken by
	2467	+ * of_phy_find_device() and
	2468	+ * of_phy_register_fixed_link().
	2469	+ */
	2470	+ phy_device_free(phydev);
	2471	+ phy_device_free(phydev);
	2472	+ }
	2473	+ }
	2474	+
	2475	+ of_node_put(slave_data->phy_node);
	2476	+
	2477	+ i++;
	2478	+ if (i == data->slaves)
	2479	+ break;
	2480	+ }
	2481	+
	2482	+ of_platform_depopulate(&pdev->dev);
	2483	+}
	2484	+
2441	2485	static int cpsw_probe_dual_emac(struct cpsw_priv *priv)
2442	2486	{
2443	2487	struct cpsw_common *cpsw = priv->cpsw;
@@ -2545,6 +2589,9 @@ static int cpsw_probe(struct platform_device *pdev) · 101 unmodified lines
2545	2589	int irq;
2546	2590
2547	2591	cpsw = devm_kzalloc(&pdev->dev, sizeof(struct cpsw_common), GFP_KERNEL);
	2592	+ if (!cpsw)
	2593	+ return -ENOMEM;
	2594	+
2548	2595	cpsw->dev = &pdev->dev;
2549	2596
2550	2597	ndev = alloc_etherdev_mq(sizeof(struct cpsw_priv), CPSW_MAX_QUEUES);
@@ -2582,11 +2629,19 @@ static int cpsw_probe(struct platform_device *pdev) · 31 unmodified lines
2582	2629	/* Select default pin state */
2583	2630	pinctrl_pm_select_default_state(&pdev->dev);
2584	2631
2585		− if (cpsw_probe_dt(&cpsw->data, pdev)) {
2586		− dev_err(&pdev->dev, "cpsw: platform data missing\n");
2587		− ret = -ENODEV;
	2632	+ /* Need to enable clocks with runtime PM api to access module
	2633	+ * registers
	2634	+ */
	2635	+ ret = pm_runtime_get_sync(&pdev->dev);
	2636	+ if (ret < 0) {
	2637	+ pm_runtime_put_noidle(&pdev->dev);
2588	2638	goto clean_runtime_disable_ret;
2589	2639	}
	2640	+
	2641	+ ret = cpsw_probe_dt(&cpsw->data, pdev);
	2642	+ if (ret)
	2643	+ goto clean_dt_ret;
	2644	+
2590	2645	data = &cpsw->data;
2591	2646	cpsw->rx_ch_num = 1;
2592	2647	cpsw->tx_ch_num = 1;
@@ -2606,7 +2661,7 @@ static int cpsw_probe(struct platform_device *pdev) · 13 unmodified lines
2606	2661	GFP_KERNEL);
2607	2662	if (!cpsw->slaves) {
2608	2663	ret = -ENOMEM;
2609		− goto clean_runtime_disable_ret;
	2664	+ goto clean_dt_ret;
2610	2665	}
2611	2666	for (i = 0; i < data->slaves; i++)
2612	2667	cpsw->slaves[i].slave_num = i;
@@ -2618,7 +2673,7 @@ static int cpsw_probe(struct platform_device *pdev) · 5 unmodified lines
2618	2673	if (IS_ERR(clk)) {
2619	2674	dev_err(priv->dev, "fck is not found\n");
2620	2675	ret = -ENODEV;
2621		− goto clean_runtime_disable_ret;
	2676	+ goto clean_dt_ret;
2622	2677	}
2623	2678	cpsw->bus_freq_mhz = clk_get_rate(clk) / 1000000;
2624	2679
@@ -2626,26 +2681,17 @@ static int cpsw_probe(struct platform_device *pdev) · 1 unmodified line
2626	2681	ss_regs = devm_ioremap_resource(&pdev->dev, ss_res);
2627	2682	if (IS_ERR(ss_regs)) {
2628	2683	ret = PTR_ERR(ss_regs);
2629		− goto clean_runtime_disable_ret;
	2684	+ goto clean_dt_ret;
2630	2685	}
2631	2686	cpsw->regs = ss_regs;
2632	2687
2633		− /* Need to enable clocks with runtime PM api to access module
2634		− * registers
2635		− */
2636		− ret = pm_runtime_get_sync(&pdev->dev);
2637		− if (ret < 0) {
2638		− pm_runtime_put_noidle(&pdev->dev);
2639		− goto clean_runtime_disable_ret;
2640		− }
2641	2688	cpsw->version = readl(&cpsw->regs->id_ver);
2642		− pm_runtime_put_sync(&pdev->dev);
2643	2689
2644	2690	res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
2645	2691	cpsw->wr_regs = devm_ioremap_resource(&pdev->dev, res);
2646	2692	if (IS_ERR(cpsw->wr_regs)) {
2647	2693	ret = PTR_ERR(cpsw->wr_regs);
2648		− goto clean_runtime_disable_ret;
	2694	+ goto clean_dt_ret;
2649	2695	}
2650	2696
2651	2697	memset(&dma_params, 0, sizeof(dma_params));
@@ -2682,7 +2728,7 @@ static int cpsw_probe(struct platform_device *pdev) · 30 unmodified lines
2682	2728	default:
2683	2729	dev_err(priv->dev, "unknown version 0x%08x\n", cpsw->version);
2684	2730	ret = -ENODEV;
2685		− goto clean_runtime_disable_ret;
	2731	+ goto clean_dt_ret;
2686	2732	}
2687	2733	for (i = 0; i < cpsw->data.slaves; i++) {
2688	2734	struct cpsw_slave *slave = &cpsw->slaves[i];
@@ -2711,7 +2757,7 @@ static int cpsw_probe(struct platform_device *pdev) · 22 unmodified lines
2711	2757	if (!cpsw->dma) {
2712	2758	dev_err(priv->dev, "error initializing dma\n");
2713	2759	ret = -ENOMEM;
2714		− goto clean_runtime_disable_ret;
	2760	+ goto clean_dt_ret;
2715	2761	}
2716	2762
2717	2763	cpsw->txch[0] = cpdma_chan_create(cpsw->dma, 0, cpsw_tx_handler, 0);
@@ -2809,16 +2855,23 @@ static int cpsw_probe(struct platform_device *pdev) · 91 unmodified lines
2809	2855	ret = cpsw_probe_dual_emac(priv);
2810	2856	if (ret) {
2811	2857	cpsw_err(priv, probe, "error probe slave 2 emac interface\n");
2812		− goto clean_ale_ret;
	2858	+ goto clean_unregister_netdev_ret;
2813	2859	}
2814	2860	}
2815	2861
	2862	+ pm_runtime_put(&pdev->dev);
	2863	+
2816	2864	return 0;
2817	2865
	2866	+clean_unregister_netdev_ret:
	2867	+ unregister_netdev(ndev);
2818	2868	clean_ale_ret:
2819	2869	cpsw_ale_destroy(cpsw->ale);
2820	2870	clean_dma_ret:
2821	2871	cpdma_ctlr_destroy(cpsw->dma);
	2872	+clean_dt_ret:
	2873	+ cpsw_remove_dt(pdev);
	2874	+ pm_runtime_put_sync(&pdev->dev);
2822	2875	clean_runtime_disable_ret:
2823	2876	pm_runtime_disable(&pdev->dev);
2824	2877	clean_ndev_ret:
@@ -2844,7 +2897,7 @@ static int cpsw_remove(struct platform_device *pdev) · 19 unmodified lines
2844	2897
2845	2898	cpsw_ale_destroy(cpsw->ale);
2846	2899	cpdma_ctlr_destroy(cpsw->dma);
2847		− of_platform_depopulate(&pdev->dev);
	2900	+ cpsw_remove_dt(pdev);
2848	2901	pm_runtime_put_sync(&pdev->dev);
2849	2902	pm_runtime_disable(&pdev->dev);
2850	2903	if (cpsw->data.dual_emac)

drivers/net/phy/fixed_phy.c+1−1

@@ -279,7 +279,7 @@ EXPORT_SYMBOL_GPL(fixed_phy_register); · 278 unmodified lines
279	279	void fixed_phy_unregister(struct phy_device *phy)
280	280	{
281	281	phy_device_remove(phy);
282		−
	282	+ of_node_put(phy->mdio.dev.of_node);
283	283	fixed_phy_del(phy->mdio.addr);
284	284	}
285	285	EXPORT_SYMBOL_GPL(fixed_phy_unregister);

drivers/net/phy/vitesse.c+33−1

@@ -62,6 +62,10 @@ · 61 unmodified lines
62	62	/* Vitesse Extended Page Access Register */
63	63	#define MII_VSC82X4_EXT_PAGE_ACCESS 0x1f
64	64
	65	+/* Vitesse VSC8601 Extended PHY Control Register 1 */
	66	+#define MII_VSC8601_EPHY_CTL 0x17
	67	+#define MII_VSC8601_EPHY_CTL_RGMII_SKEW (1 << 8)
	68	+
65	69	#define PHY_ID_VSC8234 0x000fc620
66	70	#define PHY_ID_VSC8244 0x000fc6c0
67	71	#define PHY_ID_VSC8514 0x00070670
@@ -111,6 +115,34 @@ static int vsc824x_config_init(struct phy_device *phydev) · 43 unmodified lines
111	115	return err;
112	116	}
113	117
	118	+/* This adds a skew for both TX and RX clocks, so the skew should only be
	119	+ * applied to "rgmii-id" interfaces. It may not work as expected
	120	+ * on "rgmii-txid", "rgmii-rxid" or "rgmii" interfaces. */
	121	+static int vsc8601_add_skew(struct phy_device *phydev)
	122	+{
	123	+ int ret;
	124	+
	125	+ ret = phy_read(phydev, MII_VSC8601_EPHY_CTL);
	126	+ if (ret < 0)
	127	+ return ret;
	128	+
	129	+ ret \|= MII_VSC8601_EPHY_CTL_RGMII_SKEW;
	130	+ return phy_write(phydev, MII_VSC8601_EPHY_CTL, ret);
	131	+}
	132	+
	133	+static int vsc8601_config_init(struct phy_device *phydev)
	134	+{
	135	+ int ret = 0;
	136	+
	137	+ if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID)
	138	+ ret = vsc8601_add_skew(phydev);
	139	+
	140	+ if (ret < 0)
	141	+ return ret;
	142	+
	143	+ return genphy_config_init(phydev);
	144	+}
	145	+
114	146	static int vsc824x_ack_interrupt(struct phy_device *phydev)
115	147	{
116	148	int err = 0;
@@ -275,7 +307,7 @@ static struct phy_driver vsc82xx_driver[] = { · 158 unmodified lines
275	307	.phy_id_mask = 0x000ffff0,
276	308	.features = PHY_GBIT_FEATURES,
277	309	.flags = PHY_HAS_INTERRUPT,
278		− .config_init = &genphy_config_init,
	310	+ .config_init = &vsc8601_config_init,
279	311	.config_aneg = &genphy_config_aneg,
280	312	.read_status = &genphy_read_status,
281	313	.ack_interrupt = &vsc824x_ack_interrupt,

drivers/net/virtio_net.c+5−0

@@ -1485,6 +1485,11 @@ static void virtnet_free_queues(struct virtnet_info *vi) · 1484 unmodified lines
1485	1485	netif_napi_del(&vi->rq[i].napi);
1486	1486	}
1487	1487
	1488	+ /* We called napi_hash_del() before netif_napi_del(),
	1489	+ * we need to respect an RCU grace period before freeing vi->rq
	1490	+ */
	1491	+ synchronize_net();
	1492	+
1488	1493	kfree(vi->rq);
1489	1494	kfree(vi->sq);
1490	1495	}

drivers/net/wireless/mac80211_hwsim.c+1−1

@@ -819,7 +819,7 @@ static void mac80211_hwsim_set_tsf(struct ieee80211_hw *hw, · 818 unmodified lines
819	819	data->bcn_delta = do_div(delta, bcn_int);
820	820	} else {
821	821	data->tsf_offset -= delta;
822		− data->bcn_delta = -do_div(delta, bcn_int);
	822	+ data->bcn_delta = -(s64)do_div(delta, bcn_int);
823	823	}
824	824	}
825	825

drivers/nvme/host/pci.c+4−14

@@ -1242,20 +1242,16 @@ static int nvme_configure_admin_queue(struct nvme_dev *dev) · 1241 unmodified lines
1242	1242
1243	1243	result = nvme_enable_ctrl(&dev->ctrl, cap);
1244	1244	if (result)
1245		− goto free_nvmeq;
	1245	+ return result;
1246	1246
1247	1247	nvmeq->cq_vector = 0;
1248	1248	result = queue_request_irq(nvmeq);
1249	1249	if (result) {
1250	1250	nvmeq->cq_vector = -1;
1251		− goto free_nvmeq;
	1251	+ return result;
1252	1252	}
1253	1253
1254	1254	return result;
1255		−
1256		− free_nvmeq:
1257		− nvme_free_queues(dev, 0);
1258		− return result;
1259	1255	}
1260	1256
1261	1257	static bool nvme_should_reset(struct nvme_dev *dev, u32 csts)
@@ -1317,10 +1313,8 @@ static int nvme_create_io_queues(struct nvme_dev *dev) · 55 unmodified lines
1317	1313	max = min(dev->max_qid, dev->queue_count - 1);
1318	1314	for (i = dev->online_queues; i <= max; i++) {
1319	1315	ret = nvme_create_queue(dev->queues[i], i);
1320		− if (ret) {
1321		− nvme_free_queues(dev, i);
	1316	+ if (ret)
1322	1317	break;
1323		− }
1324	1318	}
1325	1319
1326	1320	/*
@@ -1460,13 +1454,9 @@ static int nvme_setup_io_queues(struct nvme_dev *dev) · 133 unmodified lines
1460	1454	result = queue_request_irq(adminq);
1461	1455	if (result) {
1462	1456	adminq->cq_vector = -1;
1463		− goto free_queues;
	1457	+ return result;
1464	1458	}
1465	1459	return nvme_create_io_queues(dev);
1466		−
1467		− free_queues:
1468		− nvme_free_queues(dev, 1);
1469		− return result;
1470	1460	}
1471	1461
1472	1462	static void nvme_del_queue_end(struct request *req, int error)

drivers/nvme/host/rdma.c+39−3

@@ -83,6 +83,7 @@ enum nvme_rdma_queue_flags { · 82 unmodified lines
83	83	NVME_RDMA_Q_CONNECTED = (1 << 0),
84	84	NVME_RDMA_IB_QUEUE_ALLOCATED = (1 << 1),
85	85	NVME_RDMA_Q_DELETING = (1 << 2),
	86	+ NVME_RDMA_Q_LIVE = (1 << 3),
86	87	};
87	88
88	89	struct nvme_rdma_queue {
@@ -624,10 +625,18 @@ static int nvme_rdma_connect_io_queues(struct nvme_rdma_ctrl *ctrl) · 535 unmodified lines
624	625
625	626	for (i = 1; i < ctrl->queue_count; i++) {
626	627	ret = nvmf_connect_io_queue(&ctrl->ctrl, i);
627		− if (ret)
628		− break;
	628	+ if (ret) {
	629	+ dev_info(ctrl->ctrl.device,
	630	+ "failed to connect i/o queue: %d\n", ret);
	631	+ goto out_free_queues;
	632	+ }
	633	+ set_bit(NVME_RDMA_Q_LIVE, &ctrl->queues[i].flags);
629	634	}
630	635
	636	+ return 0;
	637	+
	638	+out_free_queues:
	639	+ nvme_rdma_free_io_queues(ctrl);
631	640	return ret;
632	641	}
633	642
@@ -712,6 +721,8 @@ static void nvme_rdma_reconnect_ctrl_work(struct work_struct *work) · 78 unmodified lines
712	721	if (ret)
713	722	goto stop_admin_q;
714	723
	724	+ set_bit(NVME_RDMA_Q_LIVE, &ctrl->queues[0].flags);
	725	+
715	726	ret = nvme_enable_ctrl(&ctrl->ctrl, ctrl->cap);
716	727	if (ret)
717	728	goto stop_admin_q;
@@ -761,8 +772,10 @@ static void nvme_rdma_error_recovery_work(struct work_struct *work) · 43 unmodified lines
761	772
762	773	nvme_stop_keep_alive(&ctrl->ctrl);
763	774
764		− for (i = 0; i < ctrl->queue_count; i++)
	775	+ for (i = 0; i < ctrl->queue_count; i++) {
765	776	clear_bit(NVME_RDMA_Q_CONNECTED, &ctrl->queues[i].flags);
	777	+ clear_bit(NVME_RDMA_Q_LIVE, &ctrl->queues[i].flags);
	778	+ }
766	779
767	780	if (ctrl->queue_count > 1)
768	781	nvme_stop_queues(&ctrl->ctrl);
@@ -1378,6 +1391,24 @@ nvme_rdma_timeout(struct request *rq, bool reserved) · 609 unmodified lines
1378	1391	return BLK_EH_HANDLED;
1379	1392	}
1380	1393
	1394	+/*
	1395	+ * We cannot accept any other command until the Connect command has completed.
	1396	+ */
	1397	+static inline bool nvme_rdma_queue_is_ready(struct nvme_rdma_queue *queue,
	1398	+ struct request *rq)
	1399	+{
	1400	+ if (unlikely(!test_bit(NVME_RDMA_Q_LIVE, &queue->flags))) {
	1401	+ struct nvme_command cmd = (struct nvme_command )rq->cmd;
	1402	+
	1403	+ if (rq->cmd_type != REQ_TYPE_DRV_PRIV \|\|
	1404	+ cmd->common.opcode != nvme_fabrics_command \|\|
	1405	+ cmd->fabrics.fctype != nvme_fabrics_type_connect)
	1406	+ return false;
	1407	+ }
	1408	+
	1409	+ return true;
	1410	+}
	1411	+
1381	1412	static int nvme_rdma_queue_rq(struct blk_mq_hw_ctx *hctx,
1382	1413	const struct blk_mq_queue_data *bd)
1383	1414	{
@@ -1394,6 +1425,9 @@ static int nvme_rdma_queue_rq(struct blk_mq_hw_ctx *hctx, · 10 unmodified lines
1394	1425
1395	1426	WARN_ON_ONCE(rq->tag < 0);
1396	1427
	1428	+ if (!nvme_rdma_queue_is_ready(queue, rq))
	1429	+ return BLK_MQ_RQ_QUEUE_BUSY;
	1430	+
1397	1431	dev = queue->device->dev;
1398	1432	ib_dma_sync_single_for_cpu(dev, sqe->dma,
1399	1433	sizeof(struct nvme_command), DMA_TO_DEVICE);
@@ -1544,6 +1578,8 @@ static int nvme_rdma_configure_admin_queue(struct nvme_rdma_ctrl *ctrl) · 144 unmodified lines
1544	1578	if (error)
1545	1579	goto out_cleanup_queue;
1546	1580
	1581	+ set_bit(NVME_RDMA_Q_LIVE, &ctrl->queues[0].flags);
	1582	+
1547	1583	error = nvmf_reg_read64(&ctrl->ctrl, NVME_REG_CAP, &ctrl->cap);
1548	1584	if (error) {
1549	1585	dev_err(ctrl->ctrl.device,

drivers/nvme/target/core.c+7−3

@@ -838,9 +838,13 @@ static void nvmet_fatal_error_handler(struct work_struct *work) · 837 unmodified lines
838	838
839	839	void nvmet_ctrl_fatal_error(struct nvmet_ctrl *ctrl)
840	840	{
841		− ctrl->csts \|= NVME_CSTS_CFS;
842		− INIT_WORK(&ctrl->fatal_err_work, nvmet_fatal_error_handler);
843		− schedule_work(&ctrl->fatal_err_work);
	841	+ mutex_lock(&ctrl->lock);
	842	+ if (!(ctrl->csts & NVME_CSTS_CFS)) {
	843	+ ctrl->csts \|= NVME_CSTS_CFS;
	844	+ INIT_WORK(&ctrl->fatal_err_work, nvmet_fatal_error_handler);
	845	+ schedule_work(&ctrl->fatal_err_work);
	846	+ }
	847	+ mutex_unlock(&ctrl->lock);
844	848	}
845	849	EXPORT_SYMBOL_GPL(nvmet_ctrl_fatal_error);
846	850

drivers/nvme/target/rdma.c+15−3

@@ -951,6 +951,7 @@ err_destroy_cq: · 950 unmodified lines
951	951
952	952	static void nvmet_rdma_destroy_queue_ib(struct nvmet_rdma_queue *queue)
953	953	{
	954	+ ib_drain_qp(queue->cm_id->qp);
954	955	rdma_destroy_qp(queue->cm_id);
955	956	ib_free_cq(queue->cq);
956	957	}
@@ -1066,6 +1067,7 @@ nvmet_rdma_alloc_queue(struct nvmet_rdma_device *ndev, · 109 unmodified lines
1066	1067	spin_lock_init(&queue->rsp_wr_wait_lock);
1067	1068	INIT_LIST_HEAD(&queue->free_rsps);
1068	1069	spin_lock_init(&queue->rsps_lock);
	1070	+ INIT_LIST_HEAD(&queue->queue_list);
1069	1071
1070	1072	queue->idx = ida_simple_get(&nvmet_rdma_queue_ida, 0, 0, GFP_KERNEL);
1071	1073	if (queue->idx < 0) {
@@ -1244,7 +1246,6 @@ static void __nvmet_rdma_queue_disconnect(struct nvmet_rdma_queue *queue) · 172 unmodified lines
1244	1246
1245	1247	if (disconnect) {
1246	1248	rdma_disconnect(queue->cm_id);
1247		− ib_drain_qp(queue->cm_id->qp);
1248	1249	schedule_work(&queue->release_work);
1249	1250	}
1250	1251	}
@@ -1269,7 +1270,12 @@ static void nvmet_rdma_queue_connect_fail(struct rdma_cm_id *cm_id, · 18 unmodified lines
1269	1270	{
1270	1271	WARN_ON_ONCE(queue->state != NVMET_RDMA_Q_CONNECTING);
1271	1272
1272		− pr_err("failed to connect queue\n");
	1273	+ mutex_lock(&nvmet_rdma_queue_mutex);
	1274	+ if (!list_empty(&queue->queue_list))
	1275	+ list_del_init(&queue->queue_list);
	1276	+ mutex_unlock(&nvmet_rdma_queue_mutex);
	1277	+
	1278	+ pr_err("failed to connect queue %d\n", queue->idx);
1273	1279	schedule_work(&queue->release_work);
1274	1280	}
1275	1281
@@ -1352,7 +1358,13 @@ static int nvmet_rdma_cm_handler(struct rdma_cm_id *cm_id, · 76 unmodified lines
1352	1358	case RDMA_CM_EVENT_ADDR_CHANGE:
1353	1359	case RDMA_CM_EVENT_DISCONNECTED:
1354	1360	case RDMA_CM_EVENT_TIMEWAIT_EXIT:
1355		− nvmet_rdma_queue_disconnect(queue);
	1361	+ /*
	1362	+ * We might end up here when we already freed the qp
	1363	+ * which means queue release sequence is in progress,
	1364	+ * so don't get in the way...
	1365	+ */
	1366	+ if (queue)
	1367	+ nvmet_rdma_queue_disconnect(queue);
1356	1368	break;
1357	1369	case RDMA_CM_EVENT_DEVICE_REMOVAL:
1358	1370	ret = nvmet_rdma_device_removal(cm_id, queue);

drivers/of/of_mdio.c+5−1

@@ -292,6 +292,7 @@ struct phy_device of_phy_find_device(struct device_node phy_np) · 291 unmodified lines
292	292	mdiodev = to_mdio_device(d);
293	293	if (mdiodev->flags & MDIO_DEVICE_FLAG_PHY)
294	294	return to_phy_device(d);
	295	+ put_device(d);
295	296	}
296	297
297	298	return NULL;
@@ -456,8 +457,11 @@ int of_phy_register_fixed_link(struct device_node *np) · 158 unmodified lines
456	457	status.link = 1;
457	458	status.duplex = of_property_read_bool(fixed_link_node,
458	459	"full-duplex");
459		− if (of_property_read_u32(fixed_link_node, "speed", &status.speed))
	460	+ if (of_property_read_u32(fixed_link_node, "speed",
	461	+ &status.speed)) {
	462	+ of_node_put(fixed_link_node);
460	463	return -EINVAL;
	464	+ }
461	465	status.pause = of_property_read_bool(fixed_link_node, "pause");
462	466	status.asym_pause = of_property_read_bool(fixed_link_node,
463	467	"asym-pause");

drivers/video/fbdev/amba-clcd-versatile.c+2−2

@@ -526,8 +526,8 @@ int versatile_clcd_init_panel(struct clcd_fb *fb, · 525 unmodified lines
526	526	np = of_find_matching_node_and_match(NULL, versatile_clcd_of_match,
527	527	&clcd_id);
528	528	if (!np) {
529		− dev_err(dev, "no Versatile syscon node\n");
530		− return -ENODEV;
	529	+ /* Vexpress does not have this */
	530	+ return 0;
531	531	}
532	532	versatile_clcd_type = (enum versatile_clcd)clcd_id->data;
533	533

fs/crypto/fname.c+21−32

@@ -39,65 +39,54 @@ static void fname_crypt_complete(struct crypto_async_request *req, int res) · 38 unmodified lines
39	39	static int fname_encrypt(struct inode *inode,
40	40	const struct qstr iname, struct fscrypt_str oname)
41	41	{
42		− u32 ciphertext_len;
43	42	struct skcipher_request *req = NULL;
44	43	DECLARE_FS_COMPLETION_RESULT(ecr);
45	44	struct fscrypt_info *ci = inode->i_crypt_info;
46	45	struct crypto_skcipher *tfm = ci->ci_ctfm;
47	46	int res = 0;
48	47	char iv[FS_CRYPTO_BLOCK_SIZE];
49		− struct scatterlist src_sg, dst_sg;
	48	+ struct scatterlist sg;
50	49	int padding = 4 << (ci->ci_flags & FS_POLICY_FLAGS_PAD_MASK);
51		− char workbuf, buf[32], alloc_buf = NULL;
52		− unsigned lim;
	50	+ unsigned int lim;
	51	+ unsigned int cryptlen;
53	52
54	53	lim = inode->i_sb->s_cop->max_namelen(inode);
55	54	if (iname->len <= 0 \|\| iname->len > lim)
56	55	return -EIO;
57	56
58		− ciphertext_len = max(iname->len, (u32)FS_CRYPTO_BLOCK_SIZE);
59		− ciphertext_len = round_up(ciphertext_len, padding);
60		− ciphertext_len = min(ciphertext_len, lim);
	57	+ /*
	58	+ * Copy the filename to the output buffer for encrypting in-place and
	59	+ * pad it with the needed number of NUL bytes.
	60	+ */
	61	+ cryptlen = max_t(unsigned int, iname->len, FS_CRYPTO_BLOCK_SIZE);
	62	+ cryptlen = round_up(cryptlen, padding);
	63	+ cryptlen = min(cryptlen, lim);
	64	+ memcpy(oname->name, iname->name, iname->len);
	65	+ memset(oname->name + iname->len, 0, cryptlen - iname->len);
61	66
62		− if (ciphertext_len <= sizeof(buf)) {
63		− workbuf = buf;
64		− } else {
65		− alloc_buf = kmalloc(ciphertext_len, GFP_NOFS);
66		− if (!alloc_buf)
67		− return -ENOMEM;
68		− workbuf = alloc_buf;
69		− }
	67	+ /* Initialize the IV */
	68	+ memset(iv, 0, FS_CRYPTO_BLOCK_SIZE);
70	69
71		− /* Allocate request */
	70	+ /* Set up the encryption request */
72	71	req = skcipher_request_alloc(tfm, GFP_NOFS);
73	72	if (!req) {
74	73	printk_ratelimited(KERN_ERR
75		− "%s: crypto_request_alloc() failed\n", __func__);
76		− kfree(alloc_buf);
	74	+ "%s: skcipher_request_alloc() failed\n", __func__);
77	75	return -ENOMEM;
78	76	}
79	77	skcipher_request_set_callback(req,
80	78	CRYPTO_TFM_REQ_MAY_BACKLOG \| CRYPTO_TFM_REQ_MAY_SLEEP,
81	79	fname_crypt_complete, &ecr);
	80	+ sg_init_one(&sg, oname->name, cryptlen);
	81	+ skcipher_request_set_crypt(req, &sg, &sg, cryptlen, iv);
82	82
83		− /* Copy the input */
84		− memcpy(workbuf, iname->name, iname->len);
85		− if (iname->len < ciphertext_len)
86		− memset(workbuf + iname->len, 0, ciphertext_len - iname->len);
87		−
88		− /* Initialize IV */
89		− memset(iv, 0, FS_CRYPTO_BLOCK_SIZE);
90		−
91		− /* Create encryption request */
92		− sg_init_one(&src_sg, workbuf, ciphertext_len);
93		− sg_init_one(&dst_sg, oname->name, ciphertext_len);
94		− skcipher_request_set_crypt(req, &src_sg, &dst_sg, ciphertext_len, iv);
	83	+ /* Do the encryption */
95	84	res = crypto_skcipher_encrypt(req);
96	85	if (res == -EINPROGRESS \|\| res == -EBUSY) {
	86	+ /* Request is being completed asynchronously; wait for it */
97	87	wait_for_completion(&ecr.completion);
98	88	res = ecr.res;
99	89	}
100		− kfree(alloc_buf);
101	90	skcipher_request_free(req);
102	91	if (res < 0) {
103	92	printk_ratelimited(KERN_ERR
@@ -105,7 +94,7 @@ static int fname_encrypt(struct inode *inode, · 1 unmodified line
105	94	return res;
106	95	}
107	96
108		− oname->len = ciphertext_len;
	97	+ oname->len = cryptlen;
109	98	return 0;
110	99	}
111	100

fs/crypto/keyinfo.c+13−3

@@ -185,7 +185,7 @@ int get_crypt_info(struct inode *inode) · 184 unmodified lines
185	185	struct crypto_skcipher *ctfm;
186	186	const char *cipher_str;
187	187	int keysize;
188		− u8 raw_key[FS_MAX_KEY_SIZE];
	188	+ u8 *raw_key = NULL;
189	189	int res;
190	190
191	191	res = fscrypt_initialize();
@@ -238,6 +238,15 @@ retry: · 46 unmodified lines
238	238	if (res)
239	239	goto out;
240	240
	241	+ /*
	242	+ * This cannot be a stack buffer because it is passed to the scatterlist
	243	+ * crypto API as part of key derivation.
	244	+ */
	245	+ res = -ENOMEM;
	246	+ raw_key = kmalloc(FS_MAX_KEY_SIZE, GFP_NOFS);
	247	+ if (!raw_key)
	248	+ goto out;
	249	+
241	250	if (fscrypt_dummy_context_enabled(inode)) {
242	251	memset(raw_key, 0x42, FS_AES_256_XTS_KEY_SIZE);
243	252	goto got_key;
@@ -276,7 +285,8 @@ got_key: · 32 unmodified lines
276	285	if (res)
277	286	goto out;
278	287
279		− memzero_explicit(raw_key, sizeof(raw_key));
	288	+ kzfree(raw_key);
	289	+ raw_key = NULL;
280	290	if (cmpxchg(&inode->i_crypt_info, NULL, crypt_info) != NULL) {
281	291	put_crypt_info(crypt_info);
282	292	goto retry;
@@ -287,7 +297,7 @@ out: · 4 unmodified lines
287	297	if (res == -ENOKEY)
288	298	res = 0;
289	299	put_crypt_info(crypt_info);
290		− memzero_explicit(raw_key, sizeof(raw_key));
	300	+ kzfree(raw_key);
291	301	return res;
292	302	}
293	303

fs/ext4/ext4.h+1−0

@@ -235,6 +235,7 @@ struct ext4_io_submit { · 234 unmodified lines
235	235	#define EXT4_MAX_BLOCK_SIZE 65536
236	236	#define EXT4_MIN_BLOCK_LOG_SIZE 10
237	237	#define EXT4_MAX_BLOCK_LOG_SIZE 16
	238	+#define EXT4_MAX_CLUSTER_LOG_SIZE 30
238	239	#ifdef __KERNEL__
239	240	# define EXT4_BLOCK_SIZE(s) ((s)->s_blocksize)
240	241	#else

fs/ext4/super.c+16−1

@@ -3565,7 +3565,15 @@ static int ext4_fill_super(struct super_block sb, void data, int silent) · 3564 unmodified lines
3565	3565	if (blocksize < EXT4_MIN_BLOCK_SIZE \|\|
3566	3566	blocksize > EXT4_MAX_BLOCK_SIZE) {
3567	3567	ext4_msg(sb, KERN_ERR,
3568		− "Unsupported filesystem blocksize %d", blocksize);
	3568	+ "Unsupported filesystem blocksize %d (%d log_block_size)",
	3569	+ blocksize, le32_to_cpu(es->s_log_block_size));
	3570	+ goto failed_mount;
	3571	+ }
	3572	+ if (le32_to_cpu(es->s_log_block_size) >
	3573	+ (EXT4_MAX_BLOCK_LOG_SIZE - EXT4_MIN_BLOCK_LOG_SIZE)) {
	3574	+ ext4_msg(sb, KERN_ERR,
	3575	+ "Invalid log block size: %u",
	3576	+ le32_to_cpu(es->s_log_block_size));
3569	3577	goto failed_mount;
3570	3578	}
3571	3579
@@ -3697,6 +3705,13 @@ static int ext4_fill_super(struct super_block sb, void data, int silent) · 125 unmodified lines
3697	3705	"block size (%d)", clustersize, blocksize);
3698	3706	goto failed_mount;
3699	3707	}
	3708	+ if (le32_to_cpu(es->s_log_cluster_size) >
	3709	+ (EXT4_MAX_CLUSTER_LOG_SIZE - EXT4_MIN_BLOCK_LOG_SIZE)) {
	3710	+ ext4_msg(sb, KERN_ERR,
	3711	+ "Invalid log cluster size: %u",
	3712	+ le32_to_cpu(es->s_log_cluster_size));
	3713	+ goto failed_mount;
	3714	+ }
3700	3715	sbi->s_cluster_bits = le32_to_cpu(es->s_log_cluster_size) -
3701	3716	le32_to_cpu(es->s_log_block_size);
3702	3717	sbi->s_clusters_per_group =

fs/fuse/dir.c+5−0

@@ -286,6 +286,11 @@ const struct dentry_operations fuse_dentry_operations = { · 285 unmodified lines
286	286	.d_release = fuse_dentry_release,
287	287	};
288	288
	289	+const struct dentry_operations fuse_root_dentry_operations = {
	290	+ .d_init = fuse_dentry_init,
	291	+ .d_release = fuse_dentry_release,
	292	+};
	293	+
289	294	int fuse_valid_type(int m)
290	295	{
291	296	return S_ISREG(m) \|\| S_ISDIR(m) \|\| S_ISLNK(m) \|\| S_ISCHR(m) \|\|

fs/fuse/file.c+6−0

@@ -1985,6 +1985,10 @@ static int fuse_write_end(struct file file, struct address_space mapping, · 1984 unmodified lines
1985	1985	{
1986	1986	struct inode *inode = page->mapping->host;
1987	1987
	1988	+ /* Haven't copied anything? Skip zeroing, size extending, dirtying. */
	1989	+ if (!copied)
	1990	+ goto unlock;
	1991	+
1988	1992	if (!PageUptodate(page)) {
1989	1993	/* Zero any unwritten bytes at the end of the page */
1990	1994	size_t endoff = (pos + copied) & ~PAGE_MASK;
@@ -1995,6 +1999,8 @@ static int fuse_write_end(struct file file, struct address_space mapping, · 4 unmodified lines
1995	1999
1996	2000	fuse_write_update_size(inode, pos + copied);
1997	2001	set_page_dirty(page);
	2002	+
	2003	+unlock:
1998	2004	unlock_page(page);
1999	2005	put_page(page);
2000	2006

fs/fuse/fuse_i.h+1−0

@@ -692,6 +692,7 @@ static inline u64 get_node_id(struct inode *inode) · 691 unmodified lines
692	692	extern const struct file_operations fuse_dev_operations;
693	693
694	694	extern const struct dentry_operations fuse_dentry_operations;
	695	+extern const struct dentry_operations fuse_root_dentry_operations;
695	696
696	697	/**
697	698	* Inode to nodeid comparison.

fs/fuse/inode.c+2−1

@@ -1131,10 +1131,11 @@ static int fuse_fill_super(struct super_block sb, void data, int silent) · 1130 unmodified lines
1131	1131
1132	1132	err = -ENOMEM;
1133	1133	root = fuse_get_root_inode(sb, d.rootmode);
	1134	+ sb->s_d_op = &fuse_root_dentry_operations;
1134	1135	root_dentry = d_make_root(root);
1135	1136	if (!root_dentry)
1136	1137	goto err_dev_free;
1137		− /* only now - we want root dentry with NULL ->d_op */
	1138	+ /* Root dentry doesn't have .d_revalidate */
1138	1139	sb->s_d_op = &fuse_dentry_operations;
1139	1140
1140	1141	init_req = fuse_request_alloc(0);

fs/orangefs/orangefs-debugfs.c+2−0

@@ -114,6 +114,7 @@ static const struct seq_operations help_debug_ops = { · 113 unmodified lines
114	114	};
115	115
116	116	const struct file_operations debug_help_fops = {
	117	+ .owner = THIS_MODULE,
117	118	.open = orangefs_debug_help_open,
118	119	.read = seq_read,
119	120	.release = seq_release,
@@ -121,6 +122,7 @@ const struct file_operations debug_help_fops = { · 1 unmodified line
121	122	};
122	123
123	124	static const struct file_operations kernel_debug_fops = {
	125	+ .owner = THIS_MODULE,
124	126	.open = orangefs_debug_open,
125	127	.read = orangefs_debug_read,
126	128	.write = orangefs_debug_write,

fs/xattr.c+14−8

@@ -170,7 +170,7 @@ int __vfs_setxattr_noperm(struct dentry dentry, const char name, · 169 unmodified lines
170	170	const void *value, size_t size, int flags)
171	171	{
172	172	struct inode *inode = dentry->d_inode;
173		− int error = -EOPNOTSUPP;
	173	+ int error = -EAGAIN;
174	174	int issec = !strncmp(name, XATTR_SECURITY_PREFIX,
175	175	XATTR_SECURITY_PREFIX_LEN);
176	176
@@ -183,15 +183,21 @@ int __vfs_setxattr_noperm(struct dentry dentry, const char name, · 6 unmodified lines
183	183	security_inode_post_setxattr(dentry, name, value,
184	184	size, flags);
185	185	}
186		− } else if (issec) {
187		− const char *suffix = name + XATTR_SECURITY_PREFIX_LEN;
188		−
	186	+ } else {
189	187	if (unlikely(is_bad_inode(inode)))
190	188	return -EIO;
191		− error = security_inode_setsecurity(inode, suffix, value,
192		− size, flags);
193		− if (!error)
194		− fsnotify_xattr(dentry);
	189	+ }
	190	+ if (error == -EAGAIN) {
	191	+ error = -EOPNOTSUPP;
	192	+
	193	+ if (issec) {
	194	+ const char *suffix = name + XATTR_SECURITY_PREFIX_LEN;
	195	+
	196	+ error = security_inode_setsecurity(inode, suffix, value,
	197	+ size, flags);
	198	+ if (!error)
	199	+ fsnotify_xattr(dentry);
	200	+ }
195	201	}
196	202
197	203	return error;

include/acpi/actbl.h+70−94

@@ -230,72 +230,62 @@ struct acpi_table_facs { · 229 unmodified lines
230	230	/* Fields common to all versions of the FADT */
231	231
232	232	struct acpi_table_fadt {
233		− struct acpi_table_header header; /* [V1] Common ACPI table header */
234		− u32 facs; /* [V1] 32-bit physical address of FACS */
235		− u32 dsdt; /* [V1] 32-bit physical address of DSDT */
236		− u8 model; /* [V1] System Interrupt Model (ACPI 1.0) - not used in ACPI 2.0+ */
237		− u8 preferred_profile; /* [V1] Conveys preferred power management profile to OSPM. */
238		− u16 sci_interrupt; /* [V1] System vector of SCI interrupt */
239		− u32 smi_command; /* [V1] 32-bit Port address of SMI command port */
240		− u8 acpi_enable; /* [V1] Value to write to SMI_CMD to enable ACPI */
241		− u8 acpi_disable; /* [V1] Value to write to SMI_CMD to disable ACPI */
242		− u8 s4_bios_request; /* [V1] Value to write to SMI_CMD to enter S4BIOS state */
243		− u8 pstate_control; /* [V1] Processor performance state control */
244		− u32 pm1a_event_block; /* [V1] 32-bit port address of Power Mgt 1a Event Reg Blk */
245		− u32 pm1b_event_block; /* [V1] 32-bit port address of Power Mgt 1b Event Reg Blk */
246		− u32 pm1a_control_block; /* [V1] 32-bit port address of Power Mgt 1a Control Reg Blk */
247		− u32 pm1b_control_block; /* [V1] 32-bit port address of Power Mgt 1b Control Reg Blk */
248		− u32 pm2_control_block; /* [V1] 32-bit port address of Power Mgt 2 Control Reg Blk */
249		− u32 pm_timer_block; /* [V1] 32-bit port address of Power Mgt Timer Ctrl Reg Blk */
250		− u32 gpe0_block; /* [V1] 32-bit port address of General Purpose Event 0 Reg Blk */
251		− u32 gpe1_block; /* [V1] 32-bit port address of General Purpose Event 1 Reg Blk */
252		− u8 pm1_event_length; /* [V1] Byte Length of ports at pm1x_event_block */
253		− u8 pm1_control_length; /* [V1] Byte Length of ports at pm1x_control_block */
254		− u8 pm2_control_length; /* [V1] Byte Length of ports at pm2_control_block */
255		− u8 pm_timer_length; /* [V1] Byte Length of ports at pm_timer_block */
256		− u8 gpe0_block_length; /* [V1] Byte Length of ports at gpe0_block */
257		− u8 gpe1_block_length; /* [V1] Byte Length of ports at gpe1_block */
258		− u8 gpe1_base; /* [V1] Offset in GPE number space where GPE1 events start */
259		− u8 cst_control; /* [V1] Support for the _CST object and C-States change notification */
260		− u16 c2_latency; /* [V1] Worst case HW latency to enter/exit C2 state */
261		− u16 c3_latency; /* [V1] Worst case HW latency to enter/exit C3 state */
262		− u16 flush_size; /* [V1] Processor memory cache line width, in bytes */
263		− u16 flush_stride; /* [V1] Number of flush strides that need to be read */
264		− u8 duty_offset; /* [V1] Processor duty cycle index in processor P_CNT reg */
265		− u8 duty_width; /* [V1] Processor duty cycle value bit width in P_CNT register */
266		− u8 day_alarm; /* [V1] Index to day-of-month alarm in RTC CMOS RAM */
267		− u8 month_alarm; /* [V1] Index to month-of-year alarm in RTC CMOS RAM */
268		− u8 century; /* [V1] Index to century in RTC CMOS RAM */
269		− u16 boot_flags; /* [V3] IA-PC Boot Architecture Flags (see below for individual flags) */
270		− u8 reserved; /* [V1] Reserved, must be zero */
271		− u32 flags; /* [V1] Miscellaneous flag bits (see below for individual flags) */
272		− /* End of Version 1 FADT fields (ACPI 1.0) */
273		−
274		− struct acpi_generic_address reset_register; /* [V3] 64-bit address of the Reset register */
275		− u8 reset_value; /* [V3] Value to write to the reset_register port to reset the system */
276		− u16 arm_boot_flags; /* [V5] ARM-Specific Boot Flags (see below for individual flags) (ACPI 5.1) */
277		− u8 minor_revision; /* [V5] FADT Minor Revision (ACPI 5.1) */
278		− u64 Xfacs; /* [V3] 64-bit physical address of FACS */
279		− u64 Xdsdt; /* [V3] 64-bit physical address of DSDT */
280		− struct acpi_generic_address xpm1a_event_block; /* [V3] 64-bit Extended Power Mgt 1a Event Reg Blk address */
281		− struct acpi_generic_address xpm1b_event_block; /* [V3] 64-bit Extended Power Mgt 1b Event Reg Blk address */
282		− struct acpi_generic_address xpm1a_control_block; /* [V3] 64-bit Extended Power Mgt 1a Control Reg Blk address */
283		− struct acpi_generic_address xpm1b_control_block; /* [V3] 64-bit Extended Power Mgt 1b Control Reg Blk address */
284		− struct acpi_generic_address xpm2_control_block; /* [V3] 64-bit Extended Power Mgt 2 Control Reg Blk address */
285		− struct acpi_generic_address xpm_timer_block; /* [V3] 64-bit Extended Power Mgt Timer Ctrl Reg Blk address */
286		− struct acpi_generic_address xgpe0_block; /* [V3] 64-bit Extended General Purpose Event 0 Reg Blk address */
287		− struct acpi_generic_address xgpe1_block; /* [V3] 64-bit Extended General Purpose Event 1 Reg Blk address */
288		− /* End of Version 3 FADT fields (ACPI 2.0) */
289		−
290		− struct acpi_generic_address sleep_control; /* [V4] 64-bit Sleep Control register (ACPI 5.0) */
291		− /* End of Version 4 FADT fields (ACPI 3.0 and ACPI 4.0) (Field was originally reserved in ACPI 3.0) */
292		−
293		− struct acpi_generic_address sleep_status; /* [V5] 64-bit Sleep Status register (ACPI 5.0) */
294		− /* End of Version 5 FADT fields (ACPI 5.0) */
295		−
296		− u64 hypervisor_id; /* [V6] Hypervisor Vendor ID (ACPI 6.0) */
297		− /* End of Version 6 FADT fields (ACPI 6.0) */
298		−
	233	+ struct acpi_table_header header; /* Common ACPI table header */
	234	+ u32 facs; /* 32-bit physical address of FACS */
	235	+ u32 dsdt; /* 32-bit physical address of DSDT */
	236	+ u8 model; /* System Interrupt Model (ACPI 1.0) - not used in ACPI 2.0+ */
	237	+ u8 preferred_profile; /* Conveys preferred power management profile to OSPM. */
	238	+ u16 sci_interrupt; /* System vector of SCI interrupt */
	239	+ u32 smi_command; /* 32-bit Port address of SMI command port */
	240	+ u8 acpi_enable; /* Value to write to SMI_CMD to enable ACPI */
	241	+ u8 acpi_disable; /* Value to write to SMI_CMD to disable ACPI */
	242	+ u8 s4_bios_request; /* Value to write to SMI_CMD to enter S4BIOS state */
	243	+ u8 pstate_control; /* Processor performance state control */
	244	+ u32 pm1a_event_block; /* 32-bit port address of Power Mgt 1a Event Reg Blk */
	245	+ u32 pm1b_event_block; /* 32-bit port address of Power Mgt 1b Event Reg Blk */
	246	+ u32 pm1a_control_block; /* 32-bit port address of Power Mgt 1a Control Reg Blk */
	247	+ u32 pm1b_control_block; /* 32-bit port address of Power Mgt 1b Control Reg Blk */
	248	+ u32 pm2_control_block; /* 32-bit port address of Power Mgt 2 Control Reg Blk */
	249	+ u32 pm_timer_block; /* 32-bit port address of Power Mgt Timer Ctrl Reg Blk */
	250	+ u32 gpe0_block; /* 32-bit port address of General Purpose Event 0 Reg Blk */
	251	+ u32 gpe1_block; /* 32-bit port address of General Purpose Event 1 Reg Blk */
	252	+ u8 pm1_event_length; /* Byte Length of ports at pm1x_event_block */
	253	+ u8 pm1_control_length; /* Byte Length of ports at pm1x_control_block */
	254	+ u8 pm2_control_length; /* Byte Length of ports at pm2_control_block */
	255	+ u8 pm_timer_length; /* Byte Length of ports at pm_timer_block */
	256	+ u8 gpe0_block_length; /* Byte Length of ports at gpe0_block */
	257	+ u8 gpe1_block_length; /* Byte Length of ports at gpe1_block */
	258	+ u8 gpe1_base; /* Offset in GPE number space where GPE1 events start */
	259	+ u8 cst_control; /* Support for the _CST object and C-States change notification */
	260	+ u16 c2_latency; /* Worst case HW latency to enter/exit C2 state */
	261	+ u16 c3_latency; /* Worst case HW latency to enter/exit C3 state */
	262	+ u16 flush_size; /* Processor memory cache line width, in bytes */
	263	+ u16 flush_stride; /* Number of flush strides that need to be read */
	264	+ u8 duty_offset; /* Processor duty cycle index in processor P_CNT reg */
	265	+ u8 duty_width; /* Processor duty cycle value bit width in P_CNT register */
	266	+ u8 day_alarm; /* Index to day-of-month alarm in RTC CMOS RAM */
	267	+ u8 month_alarm; /* Index to month-of-year alarm in RTC CMOS RAM */
	268	+ u8 century; /* Index to century in RTC CMOS RAM */
	269	+ u16 boot_flags; /* IA-PC Boot Architecture Flags (see below for individual flags) */
	270	+ u8 reserved; /* Reserved, must be zero */
	271	+ u32 flags; /* Miscellaneous flag bits (see below for individual flags) */
	272	+ struct acpi_generic_address reset_register; /* 64-bit address of the Reset register */
	273	+ u8 reset_value; /* Value to write to the reset_register port to reset the system */
	274	+ u16 arm_boot_flags; /* ARM-Specific Boot Flags (see below for individual flags) (ACPI 5.1) */
	275	+ u8 minor_revision; /* FADT Minor Revision (ACPI 5.1) */
	276	+ u64 Xfacs; /* 64-bit physical address of FACS */
	277	+ u64 Xdsdt; /* 64-bit physical address of DSDT */
	278	+ struct acpi_generic_address xpm1a_event_block; /* 64-bit Extended Power Mgt 1a Event Reg Blk address */
	279	+ struct acpi_generic_address xpm1b_event_block; /* 64-bit Extended Power Mgt 1b Event Reg Blk address */
	280	+ struct acpi_generic_address xpm1a_control_block; /* 64-bit Extended Power Mgt 1a Control Reg Blk address */
	281	+ struct acpi_generic_address xpm1b_control_block; /* 64-bit Extended Power Mgt 1b Control Reg Blk address */
	282	+ struct acpi_generic_address xpm2_control_block; /* 64-bit Extended Power Mgt 2 Control Reg Blk address */
	283	+ struct acpi_generic_address xpm_timer_block; /* 64-bit Extended Power Mgt Timer Ctrl Reg Blk address */
	284	+ struct acpi_generic_address xgpe0_block; /* 64-bit Extended General Purpose Event 0 Reg Blk address */
	285	+ struct acpi_generic_address xgpe1_block; /* 64-bit Extended General Purpose Event 1 Reg Blk address */
	286	+ struct acpi_generic_address sleep_control; /* 64-bit Sleep Control register (ACPI 5.0) */
	287	+ struct acpi_generic_address sleep_status; /* 64-bit Sleep Status register (ACPI 5.0) */
	288	+ u64 hypervisor_id; /* Hypervisor Vendor ID (ACPI 6.0) */
299	289	};
300	290
301	291	/* Masks for FADT IA-PC Boot Architecture Flags (boot_flags) [Vx]=Introduced in this FADT revision */
@@ -311,8 +301,8 @@ struct acpi_table_fadt { · 9 unmodified lines
311	301
312	302	/* Masks for FADT ARM Boot Architecture Flags (arm_boot_flags) ACPI 5.1 */
313	303
314		−#define ACPI_FADT_PSCI_COMPLIANT (1) /* 00: [V5] PSCI 0.2+ is implemented */
315		−#define ACPI_FADT_PSCI_USE_HVC (1<<1) /* 01: [V5] HVC must be used instead of SMC as the PSCI conduit */
	304	+#define ACPI_FADT_PSCI_COMPLIANT (1) /* 00: [V5+] PSCI 0.2+ is implemented */
	305	+#define ACPI_FADT_PSCI_USE_HVC (1<<1) /* 01: [V5+] HVC must be used instead of SMC as the PSCI conduit */
316	306
317	307	/* Masks for FADT flags */
318	308
@@ -409,34 +399,20 @@ struct acpi_table_desc { · 90 unmodified lines
409	399	* match the expected length. In other words, the length of the
410	400	* FADT is the bottom line as to what the version really is.
411	401	*
412		− * NOTE: There is no officialy released V2 of the FADT. This
413		− * version was used only for prototyping and testing during the
414		− * 32-bit to 64-bit transition. V3 was the first official 64-bit
415		− * version of the FADT.
416		− *
417		− * Update this list of defines when a new version of the FADT is
418		− * added to the ACPI specification. Note that the FADT version is
419		− * only incremented when new fields are appended to the existing
420		− * version. Therefore, the FADT version is competely independent
421		− * from the version of the ACPI specification where it is
422		− * defined.
423		− *
424		− * For reference, the various FADT lengths are as follows:
425		− * FADT V1 size: 0x074 ACPI 1.0
426		− * FADT V3 size: 0x0F4 ACPI 2.0
427		− * FADT V4 size: 0x100 ACPI 3.0 and ACPI 4.0
428		− * FADT V5 size: 0x10C ACPI 5.0
429		− * FADT V6 size: 0x114 ACPI 6.0
	402	+ * For reference, the values below are as follows:
	403	+ * FADT V1 size: 0x074
	404	+ * FADT V2 size: 0x084
	405	+ * FADT V3 size: 0x0F4
	406	+ * FADT V4 size: 0x0F4
	407	+ * FADT V5 size: 0x10C
	408	+ * FADT V6 size: 0x114
430	409	*/
431		−#define ACPI_FADT_V1_SIZE (u32) (ACPI_FADT_OFFSET (flags) + 4) /* ACPI 1.0 */
432		−#define ACPI_FADT_V3_SIZE (u32) (ACPI_FADT_OFFSET (sleep_control)) /* ACPI 2.0 */
433		−#define ACPI_FADT_V4_SIZE (u32) (ACPI_FADT_OFFSET (sleep_status)) /* ACPI 3.0 and ACPI 4.0 */
434		−#define ACPI_FADT_V5_SIZE (u32) (ACPI_FADT_OFFSET (hypervisor_id)) /* ACPI 5.0 */
435		−#define ACPI_FADT_V6_SIZE (u32) (sizeof (struct acpi_table_fadt)) /* ACPI 6.0 */
436		−
437		−/* Update these when new FADT versions are added */
	410	+#define ACPI_FADT_V1_SIZE (u32) (ACPI_FADT_OFFSET (flags) + 4)
	411	+#define ACPI_FADT_V2_SIZE (u32) (ACPI_FADT_OFFSET (minor_revision) + 1)
	412	+#define ACPI_FADT_V3_SIZE (u32) (ACPI_FADT_OFFSET (sleep_control))
	413	+#define ACPI_FADT_V5_SIZE (u32) (ACPI_FADT_OFFSET (hypervisor_id))
	414	+#define ACPI_FADT_V6_SIZE (u32) (sizeof (struct acpi_table_fadt))
438	415
439		−#define ACPI_FADT_MAX_VERSION 6
440	416	#define ACPI_FADT_CONFORMANCE "ACPI 6.1 (FADT version 6)"
441	417
442	418	#endif /* __ACTBL_H__ */

include/acpi/platform/aclinux.h+3−0

@@ -191,6 +191,9 @@ · 190 unmodified lines
191	191	#ifndef __init
192	192	#define __init
193	193	#endif
	194	+#ifndef __iomem
	195	+#define __iomem
	196	+#endif
194	197
195	198	/* Host-dependent types and defines for user-space ACPICA */
196	199

include/linux/bpf_verifier.h+3−2

@@ -14,7 +14,7 @@ · 13 unmodified lines
14	14	* are obviously wrong for any sort of memory access.
15	15	*/
16	16	#define BPF_REGISTER_MAX_RANGE (1024 * 1024 * 1024)
17		−#define BPF_REGISTER_MIN_RANGE -(1024 * 1024 * 1024)
	17	+#define BPF_REGISTER_MIN_RANGE -1
18	18
19	19	struct bpf_reg_state {
20	20	enum bpf_reg_type type;
@@ -22,7 +22,8 @@ struct bpf_reg_state { · 1 unmodified line
22	22	* Used to determine if any memory access using this register will
23	23	* result in a bad access.
24	24	*/
25		− u64 min_value, max_value;
	25	+ s64 min_value;
	26	+ u64 max_value;
26	27	u32 id;
27	28	union {
28	29	/* valid when type == CONST_IMM \| PTR_TO_STACK \| UNKNOWN_VALUE */

include/linux/huge_mm.h+1−1

@@ -22,7 +22,7 @@ extern int mincore_huge_pmd(struct vm_area_struct vma, pmd_t pmd, · 21 unmodified lines
22	22	unsigned char *vec);
23	23	extern bool move_huge_pmd(struct vm_area_struct *vma, unsigned long old_addr,
24	24	unsigned long new_addr, unsigned long old_end,
25		− pmd_t old_pmd, pmd_t new_pmd);
	25	+ pmd_t old_pmd, pmd_t new_pmd, bool *need_flush);
26	26	extern int change_huge_pmd(struct vm_area_struct vma, pmd_t pmd,
27	27	unsigned long addr, pgprot_t newprot,
28	28	int prot_numa);

include/linux/sunrpc/svc_xprt.h+1−0

@@ -25,6 +25,7 @@ struct svc_xprt_ops { · 24 unmodified lines
25	25	void (xpo_detach)(struct svc_xprt );
26	26	void (xpo_free)(struct svc_xprt );
27	27	int (xpo_secure_port)(struct svc_rqst );
	28	+ void (xpo_kill_temp_xprt)(struct svc_xprt );
28	29	};
29	30
30	31	struct svc_xprt_class {

include/net/gro_cells.h+3−0

@@ -68,6 +68,9 @@ static inline int gro_cells_init(struct gro_cells gcells, struct net_device de · 67 unmodified lines
68	68	struct gro_cell *cell = per_cpu_ptr(gcells->cells, i);
69	69
70	70	__skb_queue_head_init(&cell->napi_skbs);
	71	+
	72	+ set_bit(NAPI_STATE_NO_BUSY_POLL, &cell->napi.state);
	73	+
71	74	netif_napi_add(dev, &cell->napi, gro_cell_poll, 64);
72	75	napi_enable(&cell->napi);
73	76	}

include/net/ip_fib.h+1−0

@@ -243,6 +243,7 @@ int fib_table_dump(struct fib_table table, struct sk_buff skb, · 242 unmodified lines
243	243	struct netlink_callback *cb);
244	244	int fib_table_flush(struct net net, struct fib_table table);
245	245	struct fib_table fib_trie_unmerge(struct fib_table main_tb);
	246	+void fib_table_flush_external(struct fib_table *table);
246	247	void fib_free_table(struct fib_table *tb);
247	248
248	249	#ifndef CONFIG_IP_MULTIPLE_TABLES

include/net/net_namespace.h+1−1

@@ -170,7 +170,7 @@ static inline struct net *copy_net_ns(unsigned long flags, · 169 unmodified lines
170	170	extern struct list_head net_namespace_list;
171	171
172	172	struct net *get_net_ns_by_pid(pid_t pid);
173		−struct net *get_net_ns_by_fd(int pid);
	173	+struct net *get_net_ns_by_fd(int fd);
174	174
175	175	#ifdef CONFIG_SYSCTL
176	176	void ipx_register_sysctl(void);

include/uapi/linux/kvm.h+7−0

@@ -972,12 +972,19 @@ struct kvm_irqfd { · 971 unmodified lines
972	972	__u8 pad[16];
973	973	};
974	974
	975	+/* For KVM_CAP_ADJUST_CLOCK */
	976	+
	977	+/* Do not use 1, KVM_CHECK_EXTENSION returned it before we had flags. */
	978	+#define KVM_CLOCK_TSC_STABLE 2
	979	+
975	980	struct kvm_clock_data {
976	981	__u64 clock;
977	982	__u32 flags;
978	983	__u32 pad[9];
979	984	};
980	985
	986	+/* For KVM_CAP_SW_TLB */
	987	+
981	988	#define KVM_MMU_FSL_BOOKE_NOHV 0
982	989	#define KVM_MMU_FSL_BOOKE_HV 1
983	990

kernel/bpf/verifier.c+47−23

@@ -234,8 +234,8 @@ static void print_verifier_state(struct bpf_verifier_state *state) · 233 unmodified lines
234	234	reg->map_ptr->value_size,
235	235	reg->id);
236	236	if (reg->min_value != BPF_REGISTER_MIN_RANGE)
237		− verbose(",min_value=%llu",
238		− (unsigned long long)reg->min_value);
	237	+ verbose(",min_value=%lld",
	238	+ (long long)reg->min_value);
239	239	if (reg->max_value != BPF_REGISTER_MAX_RANGE)
240	240	verbose(",max_value=%llu",
241	241	(unsigned long long)reg->max_value);
@@ -778,7 +778,7 @@ static int check_mem_access(struct bpf_verifier_env *env, u32 regno, int off, · 536 unmodified lines
778	778	* index'es we need to make sure that whatever we use
779	779	* will have a set floor within our range.
780	780	*/
781		− if ((s64)reg->min_value < 0) {
	781	+ if (reg->min_value < 0) {
782	782	verbose("R%d min value is negative, either use unsigned index or do a if (index >=0) check.\n",
783	783	regno);
784	784	return -EACCES;
@@ -1490,7 +1490,8 @@ static void check_reg_overflow(struct bpf_reg_state *reg) · 705 unmodified lines
1490	1490	{
1491	1491	if (reg->max_value > BPF_REGISTER_MAX_RANGE)
1492	1492	reg->max_value = BPF_REGISTER_MAX_RANGE;
1493		− if ((s64)reg->min_value < BPF_REGISTER_MIN_RANGE)
	1493	+ if (reg->min_value < BPF_REGISTER_MIN_RANGE \|\|
	1494	+ reg->min_value > BPF_REGISTER_MAX_RANGE)
1494	1495	reg->min_value = BPF_REGISTER_MIN_RANGE;
1495	1496	}
1496	1497
@@ -1498,7 +1499,8 @@ static void adjust_reg_min_max_vals(struct bpf_verifier_env *env, · 1 unmodified line
1498	1499	struct bpf_insn *insn)
1499	1500	{
1500	1501	struct bpf_reg_state regs = env->cur_state.regs, dst_reg;
1501		− u64 min_val = BPF_REGISTER_MIN_RANGE, max_val = BPF_REGISTER_MAX_RANGE;
	1502	+ s64 min_val = BPF_REGISTER_MIN_RANGE;
	1503	+ u64 max_val = BPF_REGISTER_MAX_RANGE;
1502	1504	u8 opcode = BPF_OP(insn->code);
1503	1505
1504	1506	dst_reg = &regs[insn->dst_reg];
@@ -1532,22 +1534,43 @@ static void adjust_reg_min_max_vals(struct bpf_verifier_env *env, · 27 unmodified lines
1532	1534	return;
1533	1535	}
1534	1536
	1537	+ /* If one of our values was at the end of our ranges then we can't just
	1538	+ * do our normal operations to the register, we need to set the values
	1539	+ * to the min/max since they are undefined.
	1540	+ */
	1541	+ if (min_val == BPF_REGISTER_MIN_RANGE)
	1542	+ dst_reg->min_value = BPF_REGISTER_MIN_RANGE;
	1543	+ if (max_val == BPF_REGISTER_MAX_RANGE)
	1544	+ dst_reg->max_value = BPF_REGISTER_MAX_RANGE;
	1545	+
1535	1546	switch (opcode) {
1536	1547	case BPF_ADD:
1537		− dst_reg->min_value += min_val;
1538		− dst_reg->max_value += max_val;
	1548	+ if (dst_reg->min_value != BPF_REGISTER_MIN_RANGE)
	1549	+ dst_reg->min_value += min_val;
	1550	+ if (dst_reg->max_value != BPF_REGISTER_MAX_RANGE)
	1551	+ dst_reg->max_value += max_val;
1539	1552	break;
1540	1553	case BPF_SUB:
1541		− dst_reg->min_value -= min_val;
1542		− dst_reg->max_value -= max_val;
	1554	+ if (dst_reg->min_value != BPF_REGISTER_MIN_RANGE)
	1555	+ dst_reg->min_value -= min_val;
	1556	+ if (dst_reg->max_value != BPF_REGISTER_MAX_RANGE)
	1557	+ dst_reg->max_value -= max_val;
1543	1558	break;
1544	1559	case BPF_MUL:
1545		− dst_reg->min_value *= min_val;
1546		− dst_reg->max_value *= max_val;
	1560	+ if (dst_reg->min_value != BPF_REGISTER_MIN_RANGE)
	1561	+ dst_reg->min_value *= min_val;
	1562	+ if (dst_reg->max_value != BPF_REGISTER_MAX_RANGE)
	1563	+ dst_reg->max_value *= max_val;
1547	1564	break;
1548	1565	case BPF_AND:
1549		− /* & is special since it could end up with 0 bits set. */
1550		− dst_reg->min_value &= min_val;
	1566	+ /* Disallow AND'ing of negative numbers, ain't nobody got time
	1567	+ * for that. Otherwise the minimum is 0 and the max is the max
	1568	+ * value we could AND against.
	1569	+ */
	1570	+ if (min_val < 0)
	1571	+ dst_reg->min_value = BPF_REGISTER_MIN_RANGE;
	1572	+ else
	1573	+ dst_reg->min_value = 0;
1551	1574	dst_reg->max_value = max_val;
1552	1575	break;
1553	1576	case BPF_LSH:
@@ -1557,24 +1580,25 @@ static void adjust_reg_min_max_vals(struct bpf_verifier_env *env, · 3 unmodified lines
1557	1580	*/
1558	1581	if (min_val > ilog2(BPF_REGISTER_MAX_RANGE))
1559	1582	dst_reg->min_value = BPF_REGISTER_MIN_RANGE;
1560		− else
	1583	+ else if (dst_reg->min_value != BPF_REGISTER_MIN_RANGE)
1561	1584	dst_reg->min_value <<= min_val;
1562	1585
1563	1586	if (max_val > ilog2(BPF_REGISTER_MAX_RANGE))
1564	1587	dst_reg->max_value = BPF_REGISTER_MAX_RANGE;
1565		− else
	1588	+ else if (dst_reg->max_value != BPF_REGISTER_MAX_RANGE)
1566	1589	dst_reg->max_value <<= max_val;
1567	1590	break;
1568	1591	case BPF_RSH:
1569		− dst_reg->min_value >>= min_val;
1570		− dst_reg->max_value >>= max_val;
1571		− break;
1572		− case BPF_MOD:
1573		− /* % is special since it is an unsigned modulus, so the floor
1574		− * will always be 0.
	1592	+ /* RSH by a negative number is undefined, and the BPF_RSH is an
	1593	+ * unsigned shift, so make the appropriate casts.
1575	1594	*/
1576		− dst_reg->min_value = 0;
1577		− dst_reg->max_value = max_val - 1;
	1595	+ if (min_val < 0 \|\| dst_reg->min_value < 0)
	1596	+ dst_reg->min_value = BPF_REGISTER_MIN_RANGE;
	1597	+ else
	1598	+ dst_reg->min_value =
	1599	+ (u64)(dst_reg->min_value) >> min_val;
	1600	+ if (dst_reg->max_value != BPF_REGISTER_MAX_RANGE)
	1601	+ dst_reg->max_value >>= max_val;
1578	1602	break;
1579	1603	default:
1580	1604	reset_reg_range_values(regs, insn->dst_reg);

kernel/locking/lockdep_internals.h+17−3

@@ -45,6 +45,14 @@ enum { · 44 unmodified lines
45	45	#define LOCKF_USED_IN_IRQ_READ \
46	46	(LOCKF_USED_IN_HARDIRQ_READ \| LOCKF_USED_IN_SOFTIRQ_READ)
47	47
	48	+/*
	49	+ * CONFIG_PROVE_LOCKING_SMALL is defined for sparc. Sparc requires .text,
	50	+ * .data and .bss to fit in required 32MB limit for the kernel. With
	51	+ * PROVE_LOCKING we could go over this limit and cause system boot-up problems.
	52	+ * So, reduce the static allocations for lockdeps related structures so that
	53	+ * everything fits in current required size limit.
	54	+ */
	55	+#ifdef CONFIG_PROVE_LOCKING_SMALL
48	56	/*
49	57	* MAX_LOCKDEP_ENTRIES is the maximum number of lock dependencies
50	58	* we track.
@@ -54,18 +62,24 @@ enum { · 3 unmodified lines
54	62	* table (if it's not there yet), and we check it for lock order
55	63	* conflicts and deadlocks.
56	64	*/
	65	+#define MAX_LOCKDEP_ENTRIES 16384UL
	66	+#define MAX_LOCKDEP_CHAINS_BITS 15
	67	+#define MAX_STACK_TRACE_ENTRIES 262144UL
	68	+#else
57	69	#define MAX_LOCKDEP_ENTRIES 32768UL
58	70
59	71	#define MAX_LOCKDEP_CHAINS_BITS 16
60		−#define MAX_LOCKDEP_CHAINS (1UL << MAX_LOCKDEP_CHAINS_BITS)
61		−
62		−#define MAX_LOCKDEP_CHAIN_HLOCKS (MAX_LOCKDEP_CHAINS*5)
63	72
64	73	/*
65	74	* Stack-trace: tightly packed array of stack backtrace
66	75	* addresses. Protected by the hash_lock.
67	76	*/
68	77	#define MAX_STACK_TRACE_ENTRIES 524288UL
	78	+#endif
	79	+
	80	+#define MAX_LOCKDEP_CHAINS (1UL << MAX_LOCKDEP_CHAINS_BITS)
	81	+
	82	+#define MAX_LOCKDEP_CHAIN_HLOCKS (MAX_LOCKDEP_CHAINS*5)
69	83
70	84	extern struct list_head all_lock_classes;
71	85	extern struct lock_chain lock_chains[];

kernel/trace/ftrace.c+23−1

@@ -1862,6 +1862,10 @@ static int __ftrace_hash_update_ipmodify(struct ftrace_ops *ops, · 1861 unmodified lines
1862	1862
1863	1863	/* Update rec->flags */
1864	1864	do_for_each_ftrace_rec(pg, rec) {
	1865	+
	1866	+ if (rec->flags & FTRACE_FL_DISABLED)
	1867	+ continue;
	1868	+
1865	1869	/* We need to update only differences of filter_hash */
1866	1870	in_old = !!ftrace_lookup_ip(old_hash, rec->ip);
1867	1871	in_new = !!ftrace_lookup_ip(new_hash, rec->ip);
@@ -1884,6 +1888,10 @@ rollback: · 16 unmodified lines
1884	1888
1885	1889	/* Roll back what we did above */
1886	1890	do_for_each_ftrace_rec(pg, rec) {
	1891	+
	1892	+ if (rec->flags & FTRACE_FL_DISABLED)
	1893	+ continue;
	1894	+
1887	1895	if (rec == end)
1888	1896	goto err_out;
1889	1897
@@ -2397,6 +2405,10 @@ void __weak ftrace_replace_code(int enable) · 507 unmodified lines
2397	2405	return;
2398	2406
2399	2407	do_for_each_ftrace_rec(pg, rec) {
	2408	+
	2409	+ if (rec->flags & FTRACE_FL_DISABLED)
	2410	+ continue;
	2411	+
2400	2412	failed = __ftrace_replace_code(rec, enable);
2401	2413	if (failed) {
2402	2414	ftrace_bug(failed, rec);
@@ -2763,7 +2775,7 @@ static int ftrace_shutdown(struct ftrace_ops *ops, int command) · 360 unmodified lines
2763	2775	struct dyn_ftrace *rec;
2764	2776
2765	2777	do_for_each_ftrace_rec(pg, rec) {
2766		− if (FTRACE_WARN_ON_ONCE(rec->flags))
	2778	+ if (FTRACE_WARN_ON_ONCE(rec->flags & ~FTRACE_FL_DISABLED))
2767	2779	pr_warn(" %pS flags:%lx\n",
2768	2780	(void *)rec->ip, rec->flags);
2769	2781	} while_for_each_ftrace_rec();
@@ -3598,6 +3610,10 @@ match_records(struct ftrace_hash hash, char func, int len, char *mod) · 828 unmodified lines
3598	3610	goto out_unlock;
3599	3611
3600	3612	do_for_each_ftrace_rec(pg, rec) {
	3613	+
	3614	+ if (rec->flags & FTRACE_FL_DISABLED)
	3615	+ continue;
	3616	+
3601	3617	if (ftrace_match_record(rec, &func_g, mod_match, exclude_mod)) {
3602	3618	ret = enter_record(hash, rec, clear_filter);
3603	3619	if (ret < 0) {
@@ -3793,6 +3809,9 @@ register_ftrace_function_probe(char glob, struct ftrace_probe_ops ops, · 189 unmodified lines
3793	3809
3794	3810	do_for_each_ftrace_rec(pg, rec) {
3795	3811
	3812	+ if (rec->flags & FTRACE_FL_DISABLED)
	3813	+ continue;
	3814	+
3796	3815	if (!ftrace_match_record(rec, &func_g, NULL, 0))
3797	3816	continue;
3798	3817
@@ -4685,6 +4704,9 @@ ftrace_set_func(unsigned long array, int idx, int size, char *buffer) · 886 unmodified lines
4685	4704
4686	4705	do_for_each_ftrace_rec(pg, rec) {
4687	4706
	4707	+ if (rec->flags & FTRACE_FL_DISABLED)
	4708	+ continue;
	4709	+
4688	4710	if (ftrace_match_record(rec, &func_g, NULL, 0)) {
4689	4711	/* if it is in the array */
4690	4712	exists = false;

lib/Kconfig.debug+3−0

@@ -1085,6 +1085,9 @@ config PROVE_LOCKING · 1084 unmodified lines
1085	1085
1086	1086	For more details, see Documentation/locking/lockdep-design.txt.
1087	1087
	1088	+config PROVE_LOCKING_SMALL
	1089	+ bool
	1090	+
1088	1091	config LOCKDEP
1089	1092	bool
1090	1093	depends on DEBUG_KERNEL && TRACE_IRQFLAGS_SUPPORT && STACKTRACE_SUPPORT && LOCKDEP_SUPPORT

lib/iov_iter.c+3−1

@@ -683,10 +683,11 @@ static void pipe_advance(struct iov_iter *i, size_t size) · 682 unmodified lines
683	683	struct pipe_inode_info *pipe = i->pipe;
684	684	struct pipe_buffer *buf;
685	685	int idx = i->idx;
686		− size_t off = i->iov_offset;
	686	+ size_t off = i->iov_offset, orig_sz;
687	687
688	688	if (unlikely(i->count < size))
689	689	size = i->count;
	690	+ orig_sz = size;
690	691
691	692	if (size) {
692	693	if (off) /* make it relative to the beginning of buffer */
@@ -713,6 +714,7 @@ static void pipe_advance(struct iov_iter *i, size_t size) · 20 unmodified lines
713	714	pipe->nrbufs--;
714	715	}
715	716	}
	717	+ i->count -= orig_sz;
716	718	}
717	719
718	720	void iov_iter_advance(struct iov_iter *i, size_t size)

mm/huge_memory.c+8−1

@@ -1426,11 +1426,12 @@ int zap_huge_pmd(struct mmu_gather tlb, struct vm_area_struct vma, · 1425 unmodified lines
1426	1426
1427	1427	bool move_huge_pmd(struct vm_area_struct *vma, unsigned long old_addr,
1428	1428	unsigned long new_addr, unsigned long old_end,
1429		− pmd_t old_pmd, pmd_t new_pmd)
	1429	+ pmd_t old_pmd, pmd_t new_pmd, bool *need_flush)
1430	1430	{
1431	1431	spinlock_t old_ptl, new_ptl;
1432	1432	pmd_t pmd;
1433	1433	struct mm_struct *mm = vma->vm_mm;
	1434	+ bool force_flush = false;
1434	1435
1435	1436	if ((old_addr & ~HPAGE_PMD_MASK) \|\|
1436	1437	(new_addr & ~HPAGE_PMD_MASK) \|\|
@@ -1455,6 +1456,8 @@ bool move_huge_pmd(struct vm_area_struct *vma, unsigned long old_addr, · 18 unmodified lines
1455	1456	new_ptl = pmd_lockptr(mm, new_pmd);
1456	1457	if (new_ptl != old_ptl)
1457	1458	spin_lock_nested(new_ptl, SINGLE_DEPTH_NESTING);
	1459	+ if (pmd_present(old_pmd) && pmd_dirty(old_pmd))
	1460	+ force_flush = true;
1458	1461	pmd = pmdp_huge_get_and_clear(mm, old_addr, old_pmd);
1459	1462	VM_BUG_ON(!pmd_none(*new_pmd));
1460	1463
@@ -1467,6 +1470,10 @@ bool move_huge_pmd(struct vm_area_struct *vma, unsigned long old_addr, · 6 unmodified lines
1467	1470	set_pmd_at(mm, new_addr, new_pmd, pmd_mksoft_dirty(pmd));
1468	1471	if (new_ptl != old_ptl)
1469	1472	spin_unlock(new_ptl);
	1473	+ if (force_flush)
	1474	+ flush_tlb_range(vma, old_addr, old_addr + PMD_SIZE);
	1475	+ else
	1476	+ *need_flush = true;
1470	1477	spin_unlock(old_ptl);
1471	1478	return true;
1472	1479	}

mm/mremap.c+21−9

@@ -104,11 +104,13 @@ static pte_t move_soft_dirty_pte(pte_t pte) · 103 unmodified lines
104	104	static void move_ptes(struct vm_area_struct vma, pmd_t old_pmd,
105	105	unsigned long old_addr, unsigned long old_end,
106	106	struct vm_area_struct new_vma, pmd_t new_pmd,
107		− unsigned long new_addr, bool need_rmap_locks)
	107	+ unsigned long new_addr, bool need_rmap_locks, bool *need_flush)
108	108	{
109	109	struct mm_struct *mm = vma->vm_mm;
110	110	pte_t old_pte, new_pte, pte;
111	111	spinlock_t old_ptl, new_ptl;
	112	+ bool force_flush = false;
	113	+ unsigned long len = old_end - old_addr;
112	114
113	115	/*
114	116	* When need_rmap_locks is true, we take the i_mmap_rwsem and anon_vma
@@ -146,6 +148,14 @@ static void move_ptes(struct vm_area_struct vma, pmd_t old_pmd, · 31 unmodified lines
146	148	new_pte++, new_addr += PAGE_SIZE) {
147	149	if (pte_none(*old_pte))
148	150	continue;
	151	+
	152	+ /*
	153	+ * We are remapping a dirty PTE, make sure to
	154	+ * flush TLB before we drop the PTL for the
	155	+ * old PTE or we may race with page_mkclean().
	156	+ */
	157	+ if (pte_present(old_pte) && pte_dirty(old_pte))
	158	+ force_flush = true;
149	159	pte = ptep_get_and_clear(mm, old_addr, old_pte);
150	160	pte = move_pte(pte, new_vma->vm_page_prot, old_addr, new_addr);
151	161	pte = move_soft_dirty_pte(pte);
@@ -156,6 +166,10 @@ static void move_ptes(struct vm_area_struct vma, pmd_t old_pmd, · 4 unmodified lines
156	166	if (new_ptl != old_ptl)
157	167	spin_unlock(new_ptl);
158	168	pte_unmap(new_pte - 1);
	169	+ if (force_flush)
	170	+ flush_tlb_range(vma, old_end - len, old_end);
	171	+ else
	172	+ *need_flush = true;
159	173	pte_unmap_unlock(old_pte - 1, old_ptl);
160	174	if (need_rmap_locks)
161	175	drop_rmap_locks(vma);
@@ -201,13 +215,12 @@ unsigned long move_page_tables(struct vm_area_struct *vma, · 39 unmodified lines
201	215	if (need_rmap_locks)
202	216	take_rmap_locks(vma);
203	217	moved = move_huge_pmd(vma, old_addr, new_addr,
204		− old_end, old_pmd, new_pmd);
	218	+ old_end, old_pmd, new_pmd,
	219	+ &need_flush);
205	220	if (need_rmap_locks)
206	221	drop_rmap_locks(vma);
207		− if (moved) {
208		− need_flush = true;
	222	+ if (moved)
209	223	continue;
210		− }
211	224	}
212	225	split_huge_pmd(vma, old_pmd, old_addr);
213	226	if (pmd_trans_unstable(old_pmd))
@@ -220,11 +233,10 @@ unsigned long move_page_tables(struct vm_area_struct *vma, · 6 unmodified lines
220	233	extent = next - new_addr;
221	234	if (extent > LATENCY_LIMIT)
222	235	extent = LATENCY_LIMIT;
223		− move_ptes(vma, old_pmd, old_addr, old_addr + extent,
224		− new_vma, new_pmd, new_addr, need_rmap_locks);
225		− need_flush = true;
	236	+ move_ptes(vma, old_pmd, old_addr, old_addr + extent, new_vma,
	237	+ new_pmd, new_addr, need_rmap_locks, &need_flush);
226	238	}
227		− if (likely(need_flush))
	239	+ if (need_flush)
228	240	flush_tlb_range(vma, old_end-len, old_addr);
229	241
230	242	mmu_notifier_invalidate_range_end(vma->vm_mm, mmun_start, mmun_end);

net/batman-adv/hard-interface.c+1−0

@@ -851,6 +851,7 @@ void batadv_hardif_disable_interface(struct batadv_hard_iface *hard_iface, · 850 unmodified lines
851	851	batadv_softif_destroy_sysfs(hard_iface->soft_iface);
852	852	}
853	853
	854	+ hard_iface->soft_iface = NULL;
854	855	batadv_hardif_put(hard_iface);
855	856
856	857	out:

net/batman-adv/tp_meter.c+1−0

@@ -834,6 +834,7 @@ static int batadv_tp_send(void *arg) · 833 unmodified lines
834	834	primary_if = batadv_primary_if_get_selected(bat_priv);
835	835	if (unlikely(!primary_if)) {
836	836	err = BATADV_TP_REASON_DST_UNREACHABLE;
	837	+ tp_vars->reason = err;
837	838	goto out;
838	839	}
839	840

net/core/net_namespace.c+2−0

@@ -218,6 +218,8 @@ int peernet2id_alloc(struct net net, struct net peer) · 217 unmodified lines
218	218	bool alloc;
219	219	int id;
220	220
	221	+ if (atomic_read(&net->count) == 0)
	222	+ return NETNSA_NSID_NOT_ASSIGNED;
221	223	spin_lock_irqsave(&net->nsid_lock, flags);
222	224	alloc = atomic_read(&peer->count) == 0 ? false : true;
223	225	id = __peernet2id_alloc(net, peer, &alloc);

net/core/rtnetlink.c+14−8

@@ -840,18 +840,20 @@ static inline int rtnl_vfinfo_size(const struct net_device *dev, · 839 unmodified lines
840	840	if (dev->dev.parent && dev_is_pci(dev->dev.parent) &&
841	841	(ext_filter_mask & RTEXT_FILTER_VF)) {
842	842	int num_vfs = dev_num_vf(dev->dev.parent);
843		− size_t size = nla_total_size(sizeof(struct nlattr));
844		− size += nla_total_size(num_vfs * sizeof(struct nlattr));
	843	+ size_t size = nla_total_size(0);
845	844	size += num_vfs *
846		− (nla_total_size(sizeof(struct ifla_vf_mac)) +
847		− nla_total_size(MAX_VLAN_LIST_LEN *
848		− sizeof(struct nlattr)) +
	845	+ (nla_total_size(0) +
	846	+ nla_total_size(sizeof(struct ifla_vf_mac)) +
	847	+ nla_total_size(sizeof(struct ifla_vf_vlan)) +
	848	+ nla_total_size(0) + /* nest IFLA_VF_VLAN_LIST */
849	849	nla_total_size(MAX_VLAN_LIST_LEN *
850	850	sizeof(struct ifla_vf_vlan_info)) +
851	851	nla_total_size(sizeof(struct ifla_vf_spoofchk)) +
	852	+ nla_total_size(sizeof(struct ifla_vf_tx_rate)) +
852	853	nla_total_size(sizeof(struct ifla_vf_rate)) +
853	854	nla_total_size(sizeof(struct ifla_vf_link_state)) +
854	855	nla_total_size(sizeof(struct ifla_vf_rss_query_en)) +
	856	+ nla_total_size(0) + /* nest IFLA_VF_STATS */
855	857	/* IFLA_VF_STATS_RX_PACKETS */
856	858	nla_total_size_64bit(sizeof(__u64)) +
857	859	/* IFLA_VF_STATS_TX_PACKETS */
@@ -899,7 +901,8 @@ static size_t rtnl_port_size(const struct net_device *dev, · 41 unmodified lines
899	901
900	902	static size_t rtnl_xdp_size(const struct net_device *dev)
901	903	{
902		− size_t xdp_size = nla_total_size(1); /* XDP_ATTACHED */
	904	+ size_t xdp_size = nla_total_size(0) + /* nest IFLA_XDP */
	905	+ nla_total_size(1); /* XDP_ATTACHED */
903	906
904	907	if (!dev->netdev_ops->ndo_xdp)
905	908	return 0;
@@ -1606,7 +1609,7 @@ static int rtnl_dump_ifinfo(struct sk_buff skb, struct netlink_callback cb) · 700 unmodified lines
1606	1609	head = &net->dev_index_head[h];
1607	1610	hlist_for_each_entry(dev, head, index_hlist) {
1608	1611	if (link_dump_filtered(dev, master_idx, kind_ops))
1609		− continue;
	1612	+ goto cont;
1610	1613	if (idx < s_idx)
1611	1614	goto cont;
1612	1615	err = rtnl_fill_ifinfo(skb, dev, RTM_NEWLINK,
@@ -2849,7 +2852,10 @@ nla_put_failure: · 1236 unmodified lines
2849	2852
2850	2853	static inline size_t rtnl_fdb_nlmsg_size(void)
2851	2854	{
2852		− return NLMSG_ALIGN(sizeof(struct ndmsg)) + nla_total_size(ETH_ALEN);
	2855	+ return NLMSG_ALIGN(sizeof(struct ndmsg)) +
	2856	+ nla_total_size(ETH_ALEN) + /* NDA_LLADDR */
	2857	+ nla_total_size(sizeof(u16)) + /* NDA_VLAN */
	2858	+ 0;
2853	2859	}
2854	2860
2855	2861	static void rtnl_fdb_notify(struct net_device dev, u8 addr, u16 vid, int type,

net/ipv4/fib_frontend.c+15−5

@@ -151,7 +151,7 @@ static void fib_replace_table(struct net net, struct fib_table old, · 150 unmodified lines
151	151
152	152	int fib_unmerge(struct net *net)
153	153	{
154		− struct fib_table old, new;
	154	+ struct fib_table old, new, *main_table;
155	155
156	156	/* attempt to fetch local table if it has been allocated */
157	157	old = fib_get_table(net, RT_TABLE_LOCAL);
@@ -162,11 +162,21 @@ int fib_unmerge(struct net *net) · 4 unmodified lines
162	162	if (!new)
163	163	return -ENOMEM;
164	164
	165	+ /* table is already unmerged */
	166	+ if (new == old)
	167	+ return 0;
	168	+
165	169	/* replace merged table with clean table */
166		− if (new != old) {
167		− fib_replace_table(net, old, new);
168		− fib_free_table(old);
169		− }
	170	+ fib_replace_table(net, old, new);
	171	+ fib_free_table(old);
	172	+
	173	+ /* attempt to fetch main table if it has been allocated */
	174	+ main_table = fib_get_table(net, RT_TABLE_MAIN);
	175	+ if (!main_table)
	176	+ return 0;
	177	+
	178	+ /* flush local entries from main table */
	179	+ fib_table_flush_external(main_table);
170	180
171	181	return 0;
172	182	}

net/ipv4/fib_trie.c+68−1

@@ -1743,8 +1743,10 @@ struct fib_table fib_trie_unmerge(struct fib_table oldtb) · 1742 unmodified lines
1743	1743	local_l = fib_find_node(lt, &local_tp, l->key);
1744	1744
1745	1745	if (fib_insert_alias(lt, local_tp, local_l, new_fa,
1746		− NULL, l->key))
	1746	+ NULL, l->key)) {
	1747	+ kmem_cache_free(fn_alias_kmem, new_fa);
1747	1748	goto out;
	1749	+ }
1748	1750	}
1749	1751
1750	1752	/* stop loop if key wrapped back to 0 */
@@ -1760,6 +1762,71 @@ out: · 9 unmodified lines
1760	1762	return NULL;
1761	1763	}
1762	1764
	1765	+/* Caller must hold RTNL */
	1766	+void fib_table_flush_external(struct fib_table *tb)
	1767	+{
	1768	+ struct trie t = (struct trie )tb->tb_data;
	1769	+ struct key_vector *pn = t->kv;
	1770	+ unsigned long cindex = 1;
	1771	+ struct hlist_node *tmp;
	1772	+ struct fib_alias *fa;
	1773	+
	1774	+ /* walk trie in reverse order */
	1775	+ for (;;) {
	1776	+ unsigned char slen = 0;
	1777	+ struct key_vector *n;
	1778	+
	1779	+ if (!(cindex--)) {
	1780	+ t_key pkey = pn->key;
	1781	+
	1782	+ /* cannot resize the trie vector */
	1783	+ if (IS_TRIE(pn))
	1784	+ break;
	1785	+
	1786	+ /* resize completed node */
	1787	+ pn = resize(t, pn);
	1788	+ cindex = get_index(pkey, pn);
	1789	+
	1790	+ continue;
	1791	+ }
	1792	+
	1793	+ /* grab the next available node */
	1794	+ n = get_child(pn, cindex);
	1795	+ if (!n)
	1796	+ continue;
	1797	+
	1798	+ if (IS_TNODE(n)) {
	1799	+ /* record pn and cindex for leaf walking */
	1800	+ pn = n;
	1801	+ cindex = 1ul << n->bits;
	1802	+
	1803	+ continue;
	1804	+ }
	1805	+
	1806	+ hlist_for_each_entry_safe(fa, tmp, &n->leaf, fa_list) {
	1807	+ /* if alias was cloned to local then we just
	1808	+ * need to remove the local copy from main
	1809	+ */
	1810	+ if (tb->tb_id != fa->tb_id) {
	1811	+ hlist_del_rcu(&fa->fa_list);
	1812	+ alias_free_mem_rcu(fa);
	1813	+ continue;
	1814	+ }
	1815	+
	1816	+ /* record local slen */
	1817	+ slen = fa->fa_slen;
	1818	+ }
	1819	+
	1820	+ /* update leaf slen */
	1821	+ n->slen = slen;
	1822	+
	1823	+ if (hlist_empty(&n->leaf)) {
	1824	+ put_child_root(pn, n->key, NULL);
	1825	+ node_free(n);
	1826	+ }
	1827	+ }
	1828	+}
	1829	+
1763	1830	/* Caller must hold RTNL. */
1764	1831	int fib_table_flush(struct net net, struct fib_table tb)
1765	1832	{

net/ipv4/igmp.c+36−14

@@ -162,7 +162,7 @@ static int unsolicited_report_interval(struct in_device *in_dev) · 161 unmodified lines
162	162	}
163	163
164	164	static void igmpv3_add_delrec(struct in_device in_dev, struct ip_mc_list im);
165		−static void igmpv3_del_delrec(struct in_device *in_dev, __be32 multiaddr);
	165	+static void igmpv3_del_delrec(struct in_device in_dev, struct ip_mc_list im);
166	166	static void igmpv3_clear_delrec(struct in_device *in_dev);
167	167	static int sf_setstate(struct ip_mc_list *pmc);
168	168	static void sf_markstate(struct ip_mc_list *pmc);
@@ -1130,10 +1130,15 @@ static void igmpv3_add_delrec(struct in_device in_dev, struct ip_mc_list im) · 961 unmodified lines
1130	1130	spin_unlock_bh(&in_dev->mc_tomb_lock);
1131	1131	}
1132	1132
1133		−static void igmpv3_del_delrec(struct in_device *in_dev, __be32 multiaddr)
	1133	+/*
	1134	+ * restore ip_mc_list deleted records
	1135	+ */
	1136	+static void igmpv3_del_delrec(struct in_device in_dev, struct ip_mc_list im)
1134	1137	{
1135	1138	struct ip_mc_list pmc, pmc_prev;
1136		− struct ip_sf_list psf, psf_next;
	1139	+ struct ip_sf_list *psf;
	1140	+ struct net *net = dev_net(in_dev->dev);
	1141	+ __be32 multiaddr = im->multiaddr;
1137	1142
1138	1143	spin_lock_bh(&in_dev->mc_tomb_lock);
1139	1144	pmc_prev = NULL;
@@ -1149,16 +1154,26 @@ static void igmpv3_del_delrec(struct in_device *in_dev, __be32 multiaddr) · 9 unmodified lines
1149	1154	in_dev->mc_tomb = pmc->next;
1150	1155	}
1151	1156	spin_unlock_bh(&in_dev->mc_tomb_lock);
	1157	+
	1158	+ spin_lock_bh(&im->lock);
1152	1159	if (pmc) {
1153		− for (psf = pmc->tomb; psf; psf = psf_next) {
1154		− psf_next = psf->sf_next;
1155		− kfree(psf);
	1160	+ im->interface = pmc->interface;
	1161	+ im->crcount = in_dev->mr_qrv ?: net->ipv4.sysctl_igmp_qrv;
	1162	+ im->sfmode = pmc->sfmode;
	1163	+ if (pmc->sfmode == MCAST_INCLUDE) {
	1164	+ im->tomb = pmc->tomb;
	1165	+ im->sources = pmc->sources;
	1166	+ for (psf = im->sources; psf; psf = psf->sf_next)
	1167	+ psf->sf_crcount = im->crcount;
1156	1168	}
1157	1169	in_dev_put(pmc->interface);
1158		− kfree(pmc);
1159	1170	}
	1171	+ spin_unlock_bh(&im->lock);
1160	1172	}
1161	1173
	1174	+/*
	1175	+ * flush ip_mc_list deleted records
	1176	+ */
1162	1177	static void igmpv3_clear_delrec(struct in_device *in_dev)
1163	1178	{
1164	1179	struct ip_mc_list pmc, nextpmc;
@@ -1366,7 +1381,7 @@ void ip_mc_inc_group(struct in_device *in_dev, __be32 addr) · 201 unmodified lines
1366	1381	ip_mc_hash_add(in_dev, im);
1367	1382
1368	1383	#ifdef CONFIG_IP_MULTICAST
1369		− igmpv3_del_delrec(in_dev, im->multiaddr);
	1384	+ igmpv3_del_delrec(in_dev, im);
1370	1385	#endif
1371	1386	igmp_group_added(im);
1372	1387	if (!in_dev->dead)
@@ -1626,8 +1641,12 @@ void ip_mc_remap(struct in_device *in_dev) · 253 unmodified lines
1626	1641
1627	1642	ASSERT_RTNL();
1628	1643
1629		− for_each_pmc_rtnl(in_dev, pmc)
	1644	+ for_each_pmc_rtnl(in_dev, pmc) {
	1645	+#ifdef CONFIG_IP_MULTICAST
	1646	+ igmpv3_del_delrec(in_dev, pmc);
	1647	+#endif
1630	1648	igmp_group_added(pmc);
	1649	+ }
1631	1650	}
1632	1651
1633	1652	/* Device going down */
@@ -1648,7 +1667,6 @@ void ip_mc_down(struct in_device *in_dev) · 14 unmodified lines
1648	1667	in_dev->mr_gq_running = 0;
1649	1668	if (del_timer(&in_dev->mr_gq_timer))
1650	1669	__in_dev_put(in_dev);
1651		− igmpv3_clear_delrec(in_dev);
1652	1670	#endif
1653	1671
1654	1672	ip_mc_dec_group(in_dev, IGMP_ALL_HOSTS);
@@ -1688,8 +1706,12 @@ void ip_mc_up(struct in_device *in_dev) · 33 unmodified lines
1688	1706	#endif
1689	1707	ip_mc_inc_group(in_dev, IGMP_ALL_HOSTS);
1690	1708
1691		− for_each_pmc_rtnl(in_dev, pmc)
	1709	+ for_each_pmc_rtnl(in_dev, pmc) {
	1710	+#ifdef CONFIG_IP_MULTICAST
	1711	+ igmpv3_del_delrec(in_dev, pmc);
	1712	+#endif
1692	1713	igmp_group_added(pmc);
	1714	+ }
1693	1715	}
1694	1716
1695	1717	/*
@@ -1704,13 +1726,13 @@ void ip_mc_destroy_dev(struct in_device *in_dev) · 8 unmodified lines
1704	1726
1705	1727	/* Deactivate timers */
1706	1728	ip_mc_down(in_dev);
	1729	+#ifdef CONFIG_IP_MULTICAST
	1730	+ igmpv3_clear_delrec(in_dev);
	1731	+#endif
1707	1732
1708	1733	while ((i = rtnl_dereference(in_dev->mc_list)) != NULL) {
1709	1734	in_dev->mc_list = i->next_rcu;
1710	1735	in_dev->mc_count--;
1711		−
1712		− /* We've dropped the groups in ip_mc_down already */
1713		− ip_mc_clear_src(i);
1714	1736	ip_ma_put(i);
1715	1737	}
1716	1738	}

net/ipv4/tcp_cong.c+3−1

@@ -201,8 +201,10 @@ static void tcp_reinit_congestion_control(struct sock *sk, · 200 unmodified lines
201	201	icsk->icsk_ca_ops = ca;
202	202	icsk->icsk_ca_setsockopt = 1;
203	203
204		− if (sk->sk_state != TCP_CLOSE)
	204	+ if (sk->sk_state != TCP_CLOSE) {
	205	+ memset(icsk->icsk_ca_priv, 0, sizeof(icsk->icsk_ca_priv));
205	206	tcp_init_congestion_control(sk);
	207	+ }
206	208	}
207	209
208	210	/* Manage refcounts on socket close. */

net/ipv4/udp.c+3−3

@@ -1743,10 +1743,10 @@ static int __udp4_lib_mcast_deliver(struct net net, struct sk_buff skb, · 1742 unmodified lines
1743	1743
1744	1744	if (use_hash2) {
1745	1745	hash2_any = udp4_portaddr_hash(net, htonl(INADDR_ANY), hnum) &
1746		− udp_table.mask;
1747		− hash2 = udp4_portaddr_hash(net, daddr, hnum) & udp_table.mask;
	1746	+ udptable->mask;
	1747	+ hash2 = udp4_portaddr_hash(net, daddr, hnum) & udptable->mask;
1748	1748	start_lookup:
1749		− hslot = &udp_table.hash2[hash2];
	1749	+ hslot = &udptable->hash2[hash2];
1750	1750	offset = offsetof(typeof(*sk), __sk_common.skc_portaddr_node);
1751	1751	}
1752	1752

net/ipv6/ip6_tunnel.c+11−2

@@ -1034,6 +1034,7 @@ int ip6_tnl_xmit(struct sk_buff skb, struct net_device dev, __u8 dsfield, · 1033 unmodified lines
1034	1034	int mtu;
1035	1035	unsigned int psh_hlen = sizeof(struct ipv6hdr) + t->encap_hlen;
1036	1036	unsigned int max_headroom = psh_hlen;
	1037	+ bool use_cache = false;
1037	1038	u8 hop_limit;
1038	1039	int err = -1;
1039	1040
@@ -1066,7 +1067,15 @@ int ip6_tnl_xmit(struct sk_buff skb, struct net_device dev, __u8 dsfield, · 26 unmodified lines
1066	1067
1067	1068	memcpy(&fl6->daddr, addr6, sizeof(fl6->daddr));
1068	1069	neigh_release(neigh);
1069		− } else if (!fl6->flowi6_mark)
	1070	+ } else if (!(t->parms.flags &
	1071	+ (IP6_TNL_F_USE_ORIG_TCLASS \| IP6_TNL_F_USE_ORIG_FWMARK))) {
	1072	+ /* enable the cache only only if the routing decision does
	1073	+ * not depend on the current inner header value
	1074	+ */
	1075	+ use_cache = true;
	1076	+ }
	1077	+
	1078	+ if (use_cache)
1070	1079	dst = dst_cache_get(&t->dst_cache);
1071	1080
1072	1081	if (!ip6_tnl_xmit_ctl(t, &fl6->saddr, &fl6->daddr))
@@ -1150,7 +1159,7 @@ route_lookup: · 77 unmodified lines
1150	1159	if (t->encap.type != TUNNEL_ENCAP_NONE)
1151	1160	goto tx_err_dst_release;
1152	1161	} else {
1153		− if (!fl6->flowi6_mark && ndst)
	1162	+ if (use_cache && ndst)
1154	1163	dst_cache_set_ip6(&t->dst_cache, ndst, &fl6->saddr);
1155	1164	}
1156	1165	skb_dst_set(skb, dst);

net/ipv6/udp.c+3−3

@@ -691,10 +691,10 @@ static int __udp6_lib_mcast_deliver(struct net net, struct sk_buff skb, · 690 unmodified lines
691	691
692	692	if (use_hash2) {
693	693	hash2_any = udp6_portaddr_hash(net, &in6addr_any, hnum) &
694		− udp_table.mask;
695		− hash2 = udp6_portaddr_hash(net, daddr, hnum) & udp_table.mask;
	694	+ udptable->mask;
	695	+ hash2 = udp6_portaddr_hash(net, daddr, hnum) & udptable->mask;
696	696	start_lookup:
697		− hslot = &udp_table.hash2[hash2];
	697	+ hslot = &udptable->hash2[hash2];
698	698	offset = offsetof(typeof(*sk), __sk_common.skc_portaddr_node);
699	699	}
700	700

net/l2tp/l2tp_eth.c+1−1

@@ -97,7 +97,7 @@ static int l2tp_eth_dev_xmit(struct sk_buff skb, struct net_device dev) · 96 unmodified lines
97	97	unsigned int len = skb->len;
98	98	int ret = l2tp_xmit_skb(session, skb, session->hdr_len);
99	99
100		− if (likely(ret == NET_XMIT_SUCCESS)) {
	100	+ if (likely(ret == NET_XMIT_SUCCESS \|\| ret == NET_XMIT_CN)) {
101	101	atomic_long_add(len, &priv->tx_bytes);
102	102	atomic_long_inc(&priv->tx_packets);
103	103	} else {

net/l2tp/l2tp_ip.c+3−2

@@ -251,8 +251,6 @@ static int l2tp_ip_bind(struct sock sk, struct sockaddr uaddr, int addr_len) · 250 unmodified lines
251	251	int ret;
252	252	int chk_addr_ret;
253	253
254		− if (!sock_flag(sk, SOCK_ZAPPED))
255		− return -EINVAL;
256	254	if (addr_len < sizeof(struct sockaddr_l2tpip))
257	255	return -EINVAL;
258	256	if (addr->l2tp_family != AF_INET)
@@ -267,6 +265,9 @@ static int l2tp_ip_bind(struct sock sk, struct sockaddr uaddr, int addr_len) · 8 unmodified lines
267	265	read_unlock_bh(&l2tp_ip_lock);
268	266
269	267	lock_sock(sk);
	268	+ if (!sock_flag(sk, SOCK_ZAPPED))
	269	+ goto out;
	270	+
270	271	if (sk->sk_state != TCP_CLOSE \|\| addr_len < sizeof(struct sockaddr_l2tpip))
271	272	goto out;
272	273

net/l2tp/l2tp_ip6.c+3−2

@@ -269,8 +269,6 @@ static int l2tp_ip6_bind(struct sock sk, struct sockaddr uaddr, int addr_len) · 268 unmodified lines
269	269	int addr_type;
270	270	int err;
271	271
272		− if (!sock_flag(sk, SOCK_ZAPPED))
273		− return -EINVAL;
274	272	if (addr->l2tp_family != AF_INET6)
275	273	return -EINVAL;
276	274	if (addr_len < sizeof(*addr))
@@ -296,6 +294,9 @@ static int l2tp_ip6_bind(struct sock sk, struct sockaddr uaddr, int addr_len) · 19 unmodified lines
296	294	lock_sock(sk);
297	295
298	296	err = -EINVAL;
	297	+ if (!sock_flag(sk, SOCK_ZAPPED))
	298	+ goto out_unlock;
	299	+
299	300	if (sk->sk_state != TCP_CLOSE)
300	301	goto out_unlock;
301	302

net/mac80211/sta_info.c+1−1

@@ -688,7 +688,7 @@ static void __sta_info_recalc_tim(struct sta_info *sta, bool ignore_pending) · 687 unmodified lines
688	688	}
689	689
690	690	/* No need to do anything if the driver does all */
691		− if (!local->ops->set_tim)
	691	+ if (ieee80211_hw_check(&local->hw, AP_LINK_PS))
692	692	return;
693	693
694	694	if (sta->dead)

net/mac80211/tx.c+10−4

@@ -1500,7 +1500,6 @@ static bool ieee80211_queue_skb(struct ieee80211_local *local, · 1499 unmodified lines
1500	1500	struct sta_info *sta,
1501	1501	struct sk_buff *skb)
1502	1502	{
1503		− struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
1504	1503	struct fq *fq = &local->fq;
1505	1504	struct ieee80211_vif *vif;
1506	1505	struct txq_info *txqi;
@@ -1525,8 +1524,6 @@ static bool ieee80211_queue_skb(struct ieee80211_local *local, · 18 unmodified lines
1525	1524	if (!txqi)
1526	1525	return false;
1527	1526
1528		− info->control.vif = vif;
1529		−
1530	1527	spin_lock_bh(&fq->lock);
1531	1528	ieee80211_txq_enqueue(local, txqi, skb);
1532	1529	spin_unlock_bh(&fq->lock);
@@ -3238,7 +3235,6 @@ static void ieee80211_xmit_fast_finish(struct ieee80211_sub_if_data *sdata, · 1705 unmodified lines
3238	3235
3239	3236	if (hdr->frame_control & cpu_to_le16(IEEE80211_STYPE_QOS_DATA)) {
3240	3237	tid = skb->priority & IEEE80211_QOS_CTL_TAG1D_MASK;
3241		− *ieee80211_get_qos_ctl(hdr) = tid;
3242	3238	hdr->seq_ctrl = ieee80211_tx_next_seq(sta, tid);
3243	3239	} else {
3244	3240	info->flags \|= IEEE80211_TX_CTL_ASSIGN_SEQ;
@@ -3363,6 +3359,11 @@ static bool ieee80211_xmit_fast(struct ieee80211_sub_if_data *sdata, · 118 unmodified lines
3363	3359	(tid_tx ? IEEE80211_TX_CTL_AMPDU : 0);
3364	3360	info->control.flags = IEEE80211_TX_CTRL_FAST_XMIT;
3365	3361
	3362	+ if (hdr->frame_control & cpu_to_le16(IEEE80211_STYPE_QOS_DATA)) {
	3363	+ tid = skb->priority & IEEE80211_QOS_CTL_TAG1D_MASK;
	3364	+ *ieee80211_get_qos_ctl(hdr) = tid;
	3365	+ }
	3366	+
3366	3367	__skb_queue_head_init(&tx.skbs);
3367	3368
3368	3369	tx.flags = IEEE80211_TX_UNICAST;
@@ -3451,6 +3452,11 @@ begin: · 82 unmodified lines
3451	3452	goto begin;
3452	3453	}
3453	3454
	3455	+ if (test_bit(IEEE80211_TXQ_AMPDU, &txqi->flags))
	3456	+ info->flags \|= IEEE80211_TX_CTL_AMPDU;
	3457	+ else
	3458	+ info->flags &= ~IEEE80211_TX_CTL_AMPDU;
	3459	+
3454	3460	if (info->control.flags & IEEE80211_TX_CTRL_FAST_XMIT) {
3455	3461	struct sta_info *sta = container_of(txq->sta, struct sta_info,
3456	3462	sta);

net/mac80211/vht.c+16−0

@@ -270,6 +270,22 @@ ieee80211_vht_cap_ie_to_sta_vht_cap(struct ieee80211_sub_if_data *sdata, · 269 unmodified lines
270	270	vht_cap->vht_mcs.tx_mcs_map \|= cpu_to_le16(peer_tx << i * 2);
271	271	}
272	272
	273	+ /*
	274	+ * This is a workaround for VHT-enabled STAs which break the spec
	275	+ * and have the VHT-MCS Rx map filled in with value 3 for all eight
	276	+ * spacial streams, an example is AR9462.
	277	+ *
	278	+ * As per spec, in section 22.1.1 Introduction to the VHT PHY
	279	+ * A VHT STA shall support at least single spactial stream VHT-MCSs
	280	+ * 0 to 7 (transmit and receive) in all supported channel widths.
	281	+ */
	282	+ if (vht_cap->vht_mcs.rx_mcs_map == cpu_to_le16(0xFFFF)) {
	283	+ vht_cap->vht_supported = false;
	284	+ sdata_info(sdata, "Ignoring VHT IE from %pM due to invalid rx_mcs_map\n",
	285	+ sta->addr);
	286	+ return;
	287	+ }
	288	+
273	289	/* finally set up the bandwidth */
274	290	switch (vht_cap->cap & IEEE80211_VHT_CAP_SUPP_CHAN_WIDTH_MASK) {
275	291	case IEEE80211_VHT_CAP_SUPP_CHAN_WIDTH_160MHZ:

net/sched/cls_api.c+3−2

@@ -112,7 +112,7 @@ static void tfilter_notify_chain(struct net net, struct sk_buff oskb, · 111 unmodified lines
112	112
113	113	for (it_chain = chain; (tp = rtnl_dereference(*it_chain)) != NULL;
114	114	it_chain = &tp->next)
115		− tfilter_notify(net, oskb, n, tp, 0, event, false);
	115	+ tfilter_notify(net, oskb, n, tp, n->nlmsg_flags, event, false);
116	116	}
117	117
118	118	/* Select new prio value from the range, managed by kernel. */
@@ -430,7 +430,8 @@ static int tfilter_notify(struct net net, struct sk_buff oskb, · 311 unmodified lines
430	430	if (!skb)
431	431	return -ENOBUFS;
432	432
433		− if (tcf_fill_node(net, skb, tp, fh, portid, n->nlmsg_seq, 0, event) <= 0) {
	433	+ if (tcf_fill_node(net, skb, tp, fh, portid, n->nlmsg_seq,
	434	+ n->nlmsg_flags, event) <= 0) {
434	435	kfree_skb(skb);
435	436	return -EINVAL;
436	437	}

net/socket.c+15−0

@@ -341,8 +341,23 @@ static const struct xattr_handler sockfs_xattr_handler = { · 340 unmodified lines
341	341	.get = sockfs_xattr_get,
342	342	};
343	343
	344	+static int sockfs_security_xattr_set(const struct xattr_handler *handler,
	345	+ struct dentry dentry, struct inode inode,
	346	+ const char suffix, const void value,
	347	+ size_t size, int flags)
	348	+{
	349	+ /* Handled by LSM. */
	350	+ return -EAGAIN;
	351	+}
	352	+
	353	+static const struct xattr_handler sockfs_security_xattr_handler = {
	354	+ .prefix = XATTR_SECURITY_PREFIX,
	355	+ .set = sockfs_security_xattr_set,
	356	+};
	357	+
344	358	static const struct xattr_handler *sockfs_xattr_handlers[] = {
345	359	&sockfs_xattr_handler,
	360	+ &sockfs_security_xattr_handler,
346	361	NULL
347	362	};
348	363

net/sunrpc/svc_xprt.c+1−10

@@ -1002,14 +1002,8 @@ static void svc_age_temp_xprts(unsigned long closure) · 1001 unmodified lines
1002	1002	void svc_age_temp_xprts_now(struct svc_serv serv, struct sockaddr server_addr)
1003	1003	{
1004	1004	struct svc_xprt *xprt;
1005		− struct svc_sock *svsk;
1006		− struct socket *sock;
1007	1005	struct list_head le, next;
1008	1006	LIST_HEAD(to_be_closed);
1009		− struct linger no_linger = {
1010		− .l_onoff = 1,
1011		− .l_linger = 0,
1012		− };
1013	1007
1014	1008	spin_lock_bh(&serv->sv_lock);
1015	1009	list_for_each_safe(le, next, &serv->sv_tempsocks) {
@@ -1027,10 +1021,7 @@ void svc_age_temp_xprts_now(struct svc_serv serv, struct sockaddr server_addr) · 11 unmodified lines
1027	1021	list_del_init(le);
1028	1022	xprt = list_entry(le, struct svc_xprt, xpt_list);
1029	1023	dprintk("svc_age_temp_xprts_now: closing %p\n", xprt);
1030		− svsk = container_of(xprt, struct svc_sock, sk_xprt);
1031		− sock = svsk->sk_sock;
1032		− kernel_setsockopt(sock, SOL_SOCKET, SO_LINGER,
1033		− (char *)&no_linger, sizeof(no_linger));
	1024	+ xprt->xpt_ops->xpo_kill_temp_xprt(xprt);
1034	1025	svc_close_xprt(xprt);
1035	1026	}
1036	1027	}

net/sunrpc/svcsock.c+21−0

@@ -451,6 +451,21 @@ static int svc_tcp_has_wspace(struct svc_xprt *xprt) · 450 unmodified lines
451	451	return !test_bit(SOCK_NOSPACE, &svsk->sk_sock->flags);
452	452	}
453	453
	454	+static void svc_tcp_kill_temp_xprt(struct svc_xprt *xprt)
	455	+{
	456	+ struct svc_sock *svsk;
	457	+ struct socket *sock;
	458	+ struct linger no_linger = {
	459	+ .l_onoff = 1,
	460	+ .l_linger = 0,
	461	+ };
	462	+
	463	+ svsk = container_of(xprt, struct svc_sock, sk_xprt);
	464	+ sock = svsk->sk_sock;
	465	+ kernel_setsockopt(sock, SOL_SOCKET, SO_LINGER,
	466	+ (char *)&no_linger, sizeof(no_linger));
	467	+}
	468	+
454	469	/*
455	470	* See net/ipv6/ip_sockglue.c : ip_cmsg_recv_pktinfo
456	471	*/
@@ -660,6 +675,10 @@ static struct svc_xprt svc_udp_accept(struct svc_xprt xprt) · 203 unmodified lines
660	675	return NULL;
661	676	}
662	677
	678	+static void svc_udp_kill_temp_xprt(struct svc_xprt *xprt)
	679	+{
	680	+}
	681	+
663	682	static struct svc_xprt svc_udp_create(struct svc_serv serv,
664	683	struct net *net,
665	684	struct sockaddr *sa, int salen,
@@ -679,6 +698,7 @@ static struct svc_xprt_ops svc_udp_ops = { · 13 unmodified lines
679	698	.xpo_has_wspace = svc_udp_has_wspace,
680	699	.xpo_accept = svc_udp_accept,
681	700	.xpo_secure_port = svc_sock_secure_port,
	701	+ .xpo_kill_temp_xprt = svc_udp_kill_temp_xprt,
682	702	};
683	703
684	704	static struct svc_xprt_class svc_udp_class = {
@@ -1254,6 +1274,7 @@ static struct svc_xprt_ops svc_tcp_ops = { · 569 unmodified lines
1254	1274	.xpo_has_wspace = svc_tcp_has_wspace,
1255	1275	.xpo_accept = svc_tcp_accept,
1256	1276	.xpo_secure_port = svc_sock_secure_port,
	1277	+ .xpo_kill_temp_xprt = svc_tcp_kill_temp_xprt,
1257	1278	};
1258	1279
1259	1280	static struct svc_xprt_class svc_tcp_class = {

net/sunrpc/xprtrdma/svc_rdma_transport.c+6−0

@@ -67,6 +67,7 @@ static void svc_rdma_detach(struct svc_xprt *xprt); · 66 unmodified lines
67	67	static void svc_rdma_free(struct svc_xprt *xprt);
68	68	static int svc_rdma_has_wspace(struct svc_xprt *xprt);
69	69	static int svc_rdma_secure_port(struct svc_rqst *);
	70	+static void svc_rdma_kill_temp_xprt(struct svc_xprt *);
70	71
71	72	static struct svc_xprt_ops svc_rdma_ops = {
72	73	.xpo_create = svc_rdma_create,
@@ -79,6 +80,7 @@ static struct svc_xprt_ops svc_rdma_ops = { · 6 unmodified lines
79	80	.xpo_has_wspace = svc_rdma_has_wspace,
80	81	.xpo_accept = svc_rdma_accept,
81	82	.xpo_secure_port = svc_rdma_secure_port,
	83	+ .xpo_kill_temp_xprt = svc_rdma_kill_temp_xprt,
82	84	};
83	85
84	86	struct svc_xprt_class svc_rdma_class = {
@@ -1317,6 +1319,10 @@ static int svc_rdma_secure_port(struct svc_rqst *rqstp) · 1232 unmodified lines
1317	1319	return 1;
1318	1320	}
1319	1321
	1322	+static void svc_rdma_kill_temp_xprt(struct svc_xprt *xprt)
	1323	+{
	1324	+}
	1325	+
1320	1326	int svc_rdma_send(struct svcxprt_rdma xprt, struct ib_send_wr wr)
1321	1327	{
1322	1328	struct ib_send_wr bad_wr, n_wr;

net/tipc/socket.c+1−47

@@ -1,7 +1,7 @@
1	1	/*
2	2	* net/tipc/socket.c: TIPC socket API
3	3	*
4		− * Copyright (c) 2001-2007, 2012-2015, Ericsson AB
	4	+ * Copyright (c) 2001-2007, 2012-2016, Ericsson AB
5	5	* Copyright (c) 2004-2008, 2010-2013, Wind River Systems
6	6	* All rights reserved.
7	7	*
@@ -127,54 +127,8 @@ static const struct proto_ops packet_ops; · 119 unmodified lines
127	127	static const struct proto_ops stream_ops;
128	128	static const struct proto_ops msg_ops;
129	129	static struct proto tipc_proto;
130		−
131	130	static const struct rhashtable_params tsk_rht_params;
132	131
133		−/*
134		− * Revised TIPC socket locking policy:
135		− *
136		− * Most socket operations take the standard socket lock when they start
137		− * and hold it until they finish (or until they need to sleep). Acquiring
138		− * this lock grants the owner exclusive access to the fields of the socket
139		− * data structures, with the exception of the backlog queue. A few socket
140		− * operations can be done without taking the socket lock because they only
141		− * read socket information that never changes during the life of the socket.
142		− *
143		− * Socket operations may acquire the lock for the associated TIPC port if they
144		− * need to perform an operation on the port. If any routine needs to acquire
145		− * both the socket lock and the port lock it must take the socket lock first
146		− * to avoid the risk of deadlock.
147		− *
148		− * The dispatcher handling incoming messages cannot grab the socket lock in
149		− * the standard fashion, since invoked it runs at the BH level and cannot block.
150		− * Instead, it checks to see if the socket lock is currently owned by someone,
151		− * and either handles the message itself or adds it to the socket's backlog
152		− * queue; in the latter case the queued message is processed once the process
153		− * owning the socket lock releases it.
154		− *
155		− * NOTE: Releasing the socket lock while an operation is sleeping overcomes
156		− * the problem of a blocked socket operation preventing any other operations
157		− * from occurring. However, applications must be careful if they have
158		− * multiple threads trying to send (or receive) on the same socket, as these
159		− * operations might interfere with each other. For example, doing a connect
160		− * and a receive at the same time might allow the receive to consume the
161		− * ACK message meant for the connect. While additional work could be done
162		− * to try and overcome this, it doesn't seem to be worthwhile at the present.
163		− *
164		− * NOTE: Releasing the socket lock while an operation is sleeping also ensures
165		− * that another operation that must be performed in a non-blocking manner is
166		− * not delayed for very long because the lock has already been taken.
167		− *
168		− * NOTE: This code assumes that certain fields of a port/socket pair are
169		− * constant over its lifetime; such fields can be examined without taking
170		− * the socket lock and/or port lock, and do not need to be re-read even
171		− * after resuming processing after waiting. These fields include:
172		− * - socket type
173		− * - pointer to socket sk structure (aka tipc_sock structure)
174		− * - pointer to port structure
175		− * - port reference
176		− */
177		−
178	132	static u32 tsk_own_node(struct tipc_sock *tsk)
179	133	{
180	134	return msg_prevnode(&tsk->phdr);

net/unix/af_unix.c+11−6

@@ -2199,7 +2199,8 @@ out: · 2198 unmodified lines
2199	2199	* Sleep until more data has arrived. But check for races..
2200	2200	*/
2201	2201	static long unix_stream_data_wait(struct sock *sk, long timeo,
2202		− struct sk_buff *last, unsigned int last_len)
	2202	+ struct sk_buff *last, unsigned int last_len,
	2203	+ bool freezable)
2203	2204	{
2204	2205	struct sk_buff *tail;
2205	2206	DEFINE_WAIT(wait);
@@ -2220,7 +2221,10 @@ static long unix_stream_data_wait(struct sock *sk, long timeo, · 14 unmodified lines
2220	2221
2221	2222	sk_set_bit(SOCKWQ_ASYNC_WAITDATA, sk);
2222	2223	unix_state_unlock(sk);
2223		− timeo = freezable_schedule_timeout(timeo);
	2224	+ if (freezable)
	2225	+ timeo = freezable_schedule_timeout(timeo);
	2226	+ else
	2227	+ timeo = schedule_timeout(timeo);
2224	2228	unix_state_lock(sk);
2225	2229
2226	2230	if (sock_flag(sk, SOCK_DEAD))
@@ -2250,7 +2254,8 @@ struct unix_stream_read_state { · 23 unmodified lines
2250	2254	unsigned int splice_flags;
2251	2255	};
2252	2256
2253		−static int unix_stream_read_generic(struct unix_stream_read_state *state)
	2257	+static int unix_stream_read_generic(struct unix_stream_read_state *state,
	2258	+ bool freezable)
2254	2259	{
2255	2260	struct scm_cookie scm;
2256	2261	struct socket *sock = state->socket;
@@ -2330,7 +2335,7 @@ again: · 73 unmodified lines
2330	2335	mutex_unlock(&u->iolock);
2331	2336
2332	2337	timeo = unix_stream_data_wait(sk, timeo, last,
2333		− last_len);
	2338	+ last_len, freezable);
2334	2339
2335	2340	if (signal_pending(current)) {
2336	2341	err = sock_intr_errno(timeo);
@@ -2472,7 +2477,7 @@ static int unix_stream_recvmsg(struct socket sock, struct msghdr msg, · 135 unmodified lines
2472	2477	.flags = flags
2473	2478	};
2474	2479
2475		− return unix_stream_read_generic(&state);
	2480	+ return unix_stream_read_generic(&state, true);
2476	2481	}
2477	2482
2478	2483	static int unix_stream_splice_actor(struct sk_buff *skb,
@@ -2503,7 +2508,7 @@ static ssize_t unix_stream_splice_read(struct socket sock, loff_t ppos, · 24 unmodified lines
2503	2508	flags & SPLICE_F_NONBLOCK)
2504	2509	state.flags = MSG_DONTWAIT;
2505	2510
2506		− return unix_stream_read_generic(&state);
	2511	+ return unix_stream_read_generic(&state, false);
2507	2512	}
2508	2513
2509	2514	static int unix_shutdown(struct socket *sock, int mode)

net/wireless/core.h+1−0

@@ -71,6 +71,7 @@ struct cfg80211_registered_device { · 70 unmodified lines
71	71	struct list_head bss_list;
72	72	struct rb_root bss_tree;
73	73	u32 bss_generation;
	74	+ u32 bss_entries;
74	75	struct cfg80211_scan_request scan_req; / protected by RTNL */
75	76	struct sk_buff *scan_msg;
76	77	struct cfg80211_sched_scan_request __rcu *sched_scan_req;

net/wireless/scan.c+69−0

@@ -57,6 +57,19 @@ · 56 unmodified lines
57	57	* also linked into the probe response struct.
58	58	*/
59	59
	60	+/*
	61	+ * Limit the number of BSS entries stored in mac80211. Each one is
	62	+ * a bit over 4k at most, so this limits to roughly 4-5M of memory.
	63	+ * If somebody wants to really attack this though, they'd likely
	64	+ * use small beacons, and only one type of frame, limiting each of
	65	+ * the entries to a much smaller size (in order to generate more
	66	+ * entries in total, so overhead is bigger.)
	67	+ */
	68	+static int bss_entries_limit = 1000;
	69	+module_param(bss_entries_limit, int, 0644);
	70	+MODULE_PARM_DESC(bss_entries_limit,
	71	+ "limit to number of scan BSS entries (per wiphy, default 1000)");
	72	+
60	73	#define IEEE80211_SCAN_RESULT_EXPIRE (30 * HZ)
61	74
62	75	static void bss_free(struct cfg80211_internal_bss *bss)
@@ -137,6 +150,10 @@ static bool __cfg80211_unlink_bss(struct cfg80211_registered_device *rdev, · 74 unmodified lines
137	150
138	151	list_del_init(&bss->list);
139	152	rb_erase(&bss->rbn, &rdev->bss_tree);
	153	+ rdev->bss_entries--;
	154	+ WARN_ONCE((rdev->bss_entries == 0) ^ list_empty(&rdev->bss_list),
	155	+ "rdev bss entries[%d]/list[empty:%d] corruption\n",
	156	+ rdev->bss_entries, list_empty(&rdev->bss_list));
140	157	bss_ref_put(rdev, bss);
141	158	return true;
142	159	}
@@ -163,6 +180,40 @@ static void __cfg80211_bss_expire(struct cfg80211_registered_device *rdev, · 20 unmodified lines
163	180	rdev->bss_generation++;
164	181	}
165	182
	183	+static bool cfg80211_bss_expire_oldest(struct cfg80211_registered_device *rdev)
	184	+{
	185	+ struct cfg80211_internal_bss bss, oldest = NULL;
	186	+ bool ret;
	187	+
	188	+ lockdep_assert_held(&rdev->bss_lock);
	189	+
	190	+ list_for_each_entry(bss, &rdev->bss_list, list) {
	191	+ if (atomic_read(&bss->hold))
	192	+ continue;
	193	+
	194	+ if (!list_empty(&bss->hidden_list) &&
	195	+ !bss->pub.hidden_beacon_bss)
	196	+ continue;
	197	+
	198	+ if (oldest && time_before(oldest->ts, bss->ts))
	199	+ continue;
	200	+ oldest = bss;
	201	+ }
	202	+
	203	+ if (WARN_ON(!oldest))
	204	+ return false;
	205	+
	206	+ /*
	207	+ * The callers make sure to increase rdev->bss_generation if anything
	208	+ * gets removed (and a new entry added), so there's no need to also do
	209	+ * it here.
	210	+ */
	211	+
	212	+ ret = __cfg80211_unlink_bss(rdev, oldest);
	213	+ WARN_ON(!ret);
	214	+ return ret;
	215	+}
	216	+
166	217	void ___cfg80211_scan_done(struct cfg80211_registered_device *rdev,
167	218	bool send_message)
168	219	{
@@ -689,6 +740,7 @@ static bool cfg80211_combine_bsses(struct cfg80211_registered_device *rdev, · 520 unmodified lines
689	740	const u8 *ie;
690	741	int i, ssidlen;
691	742	u8 fold = 0;
	743	+ u32 n_entries = 0;
692	744
693	745	ies = rcu_access_pointer(new->pub.beacon_ies);
694	746	if (WARN_ON(!ies))
@@ -712,6 +764,12 @@ static bool cfg80211_combine_bsses(struct cfg80211_registered_device *rdev, · 17 unmodified lines
712	764	/* This is the bad part ... */
713	765
714	766	list_for_each_entry(bss, &rdev->bss_list, list) {
	767	+ /*
	768	+ * we're iterating all the entries anyway, so take the
	769	+ * opportunity to validate the list length accounting
	770	+ */
	771	+ n_entries++;
	772	+
715	773	if (!ether_addr_equal(bss->pub.bssid, new->pub.bssid))
716	774	continue;
717	775	if (bss->pub.channel != new->pub.channel)
@@ -740,6 +798,10 @@ static bool cfg80211_combine_bsses(struct cfg80211_registered_device *rdev, · 22 unmodified lines
740	798	new->pub.beacon_ies);
741	799	}
742	800
	801	+ WARN_ONCE(n_entries != rdev->bss_entries,
	802	+ "rdev bss entries[%d]/list[len:%d] corruption\n",
	803	+ rdev->bss_entries, n_entries);
	804	+
743	805	return true;
744	806	}
745	807
@@ -894,7 +956,14 @@ cfg80211_bss_update(struct cfg80211_registered_device *rdev, · 148 unmodified lines
894	956	}
895	957	}
896	958
	959	+ if (rdev->bss_entries >= bss_entries_limit &&
	960	+ !cfg80211_bss_expire_oldest(rdev)) {
	961	+ kfree(new);
	962	+ goto drop;
	963	+ }
	964	+
897	965	list_add_tail(&new->list, &rdev->bss_list);
	966	+ rdev->bss_entries++;
898	967	rb_insert_bss(rdev, new);
899	968	found = new;
900	969	}

net/wireless/util.c+2−1

@@ -1159,7 +1159,8 @@ static u32 cfg80211_calculate_bitrate_vht(struct rate_info *rate) · 1158 unmodified lines
1159	1159	58500000,
1160	1160	65000000,
1161	1161	78000000,
1162		− 0,
	1162	+ /* not in the spec, but some devices use this: */
	1163	+ 86500000,
1163	1164	},
1164	1165	{ 13500000,
1165	1166	27000000,

scripts/Makefile.build+75−6

@@ -159,7 +159,8 @@ cmd_cpp_i_c = $(CPP) $(c_flags) -o $@ $< · 158 unmodified lines
159	159	$(obj)/%.i: $(src)/%.c FORCE
160	160	$(call if_changed_dep,cpp_i_c)
161	161
162		−cmd_gensymtypes = \
	162	+# These mirror gensymtypes_S and co below, keep them in synch.
	163	+cmd_gensymtypes_c = \
163	164	$(CPP) -D__GENKSYMS__ $(c_flags) $< \| \
164	165	$(GENKSYMS) $(if $(1), -T $(2)) \
165	166	$(patsubst y,-s _,$(CONFIG_HAVE_UNDERSCORE_SYMBOL_PREFIX)) \
@@ -169,7 +170,7 @@ cmd_gensymtypes = \ · 3 unmodified lines
169	170	quiet_cmd_cc_symtypes_c = SYM $(quiet_modtag) $@
170	171	cmd_cc_symtypes_c = \
171	172	set -e; \
172		− $(call cmd_gensymtypes,true,$@) >/dev/null; \
	173	+ $(call cmd_gensymtypes_c,true,$@) >/dev/null; \
173	174	test -s $@ \|\| rm -f $@
174	175
175	176	$(obj)/%.symtypes : $(src)/%.c FORCE
@@ -198,9 +199,10 @@ else · 22 unmodified lines
198	199	# the actual value of the checksum generated by genksyms
199	200
200	201	cmd_cc_o_c = $(CC) $(c_flags) -c -o $(@D)/.tmp_$(@F) $<
201		−cmd_modversions = \
	202	+
	203	+cmd_modversions_c = \
202	204	if $(OBJDUMP) -h $(@D)/.tmp_$(@F) \| grep -q __ksymtab; then \
203		− $(call cmd_gensymtypes,$(KBUILD_SYMTYPES),$(@:.o=.symtypes)) \
	205	+ $(call cmd_gensymtypes_c,$(KBUILD_SYMTYPES),$(@:.o=.symtypes)) \
204	206	> $(@D)/.tmp_$(@F:.o=.ver); \
205	207	\
206	208	$(LD) $(LDFLAGS) -r -o $@ $(@D)/.tmp_$(@F) \
@@ -268,13 +270,14 @@ endif # CONFIG_STACK_VALIDATION · 61 unmodified lines
268	270	define rule_cc_o_c
269	271	$(call echo-cmd,checksrc) $(cmd_checksrc) \
270	272	$(call cmd_and_fixdep,cc_o_c) \
271		− $(cmd_modversions) \
	273	+ $(cmd_modversions_c) \
272	274	$(cmd_objtool) \
273	275	$(call echo-cmd,record_mcount) $(cmd_record_mcount)
274	276	endef
275	277
276	278	define rule_as_o_S
277	279	$(call cmd_and_fixdep,as_o_S) \
	280	+ $(cmd_modversions_S) \
278	281	$(cmd_objtool)
279	282	endef
280	283
@@ -314,6 +317,39 @@ modkern_aflags := $(KBUILD_AFLAGS_KERNEL) $(AFLAGS_KERNEL) · 33 unmodified lines
314	317	$(real-objs-m) : modkern_aflags := $(KBUILD_AFLAGS_MODULE) $(AFLAGS_MODULE)
315	318	$(real-objs-m:.o=.s): modkern_aflags := $(KBUILD_AFLAGS_MODULE) $(AFLAGS_MODULE)
316	319
	320	+# .S file exports must have their C prototypes defined in asm/asm-prototypes.h
	321	+# or a file that it includes, in order to get versioned symbols. We build a
	322	+# dummy C file that includes asm-prototypes and the EXPORT_SYMBOL lines from
	323	+# the .S file (with trailing ';'), and run genksyms on that, to extract vers.
	324	+#
	325	+# This is convoluted. The .S file must first be preprocessed to run guards and
	326	+# expand names, then the resulting exports must be constructed into plain
	327	+# EXPORT_SYMBOL(symbol); to build our dummy C file, and that gets preprocessed
	328	+# to make the genksyms input.
	329	+#
	330	+# These mirror gensymtypes_c and co above, keep them in synch.
	331	+cmd_gensymtypes_S = \
	332	+ (echo "\#include <linux/kernel.h>" ; \
	333	+ echo "\#include <asm/asm-prototypes.h>" ; \
	334	+ $(CPP) $(a_flags) $< \| \
	335	+ grep "\<___EXPORT_SYMBOL\>" \| \
	336	+ sed 's/.___EXPORT_SYMBOL[[:space:]]$[a-zA-Z0-9_]$[[:space:]],.*/EXPORT_SYMBOL(\1);/' ) \| \
	337	+ $(CPP) -D__GENKSYMS__ $(c_flags) -xc - \| \
	338	+ $(GENKSYMS) $(if $(1), -T $(2)) \
	339	+ $(patsubst y,-s _,$(CONFIG_HAVE_UNDERSCORE_SYMBOL_PREFIX)) \
	340	+ $(if $(KBUILD_PRESERVE),-p) \
	341	+ -r $(firstword $(wildcard $(2:.symtypes=.symref) /dev/null))
	342	+
	343	+quiet_cmd_cc_symtypes_S = SYM $(quiet_modtag) $@
	344	+cmd_cc_symtypes_S = \
	345	+ set -e; \
	346	+ $(call cmd_gensymtypes_S,true,$@) >/dev/null; \
	347	+ test -s $@ \|\| rm -f $@
	348	+
	349	+$(obj)/%.symtypes : $(src)/%.S FORCE
	350	+ $(call cmd,cc_symtypes_S)
	351	+
	352	+
317	353	quiet_cmd_cpp_s_S = CPP $(quiet_modtag) $@
318	354	cmd_cpp_s_S = $(CPP) $(a_flags) -o $@ $<
319	355
@@ -321,7 +357,37 @@ $(obj)/%.s: $(src)/%.S FORCE · 1 unmodified line
321	357	$(call if_changed_dep,cpp_s_S)
322	358
323	359	quiet_cmd_as_o_S = AS $(quiet_modtag) $@
324		−cmd_as_o_S = $(CC) $(a_flags) -c -o $@ $<
	360	+
	361	+ifndef CONFIG_MODVERSIONS
	362	+cmd_as_o_S = $(CC) $(a_flags) -c -o $@ $<
	363	+
	364	+else
	365	+
	366	+ASM_PROTOTYPES := $(wildcard $(srctree)/arch/$(SRCARCH)/include/asm/asm-prototypes.h)
	367	+
	368	+ifeq ($(ASM_PROTOTYPES),)
	369	+cmd_as_o_S = $(CC) $(a_flags) -c -o $@ $<
	370	+
	371	+else
	372	+
	373	+# versioning matches the C process described above, with difference that
	374	+# we parse asm-prototypes.h C header to get function definitions.
	375	+
	376	+cmd_as_o_S = $(CC) $(a_flags) -c -o $(@D)/.tmp_$(@F) $<
	377	+
	378	+cmd_modversions_S = \
	379	+ if $(OBJDUMP) -h $(@D)/.tmp_$(@F) \| grep -q __ksymtab; then \
	380	+ $(call cmd_gensymtypes_S,$(KBUILD_SYMTYPES),$(@:.o=.symtypes)) \
	381	+ > $(@D)/.tmp_$(@F:.o=.ver); \
	382	+ \
	383	+ $(LD) $(LDFLAGS) -r -o $@ $(@D)/.tmp_$(@F) \
	384	+ -T $(@D)/.tmp_$(@F:.o=.ver); \
	385	+ rm -f $(@D)/.tmp_$(@F) $(@D)/.tmp_$(@F:.o=.ver); \
	386	+ else \
	387	+ mv -f $(@D)/.tmp_$(@F) $@; \
	388	+ fi;
	389	+endif
	390	+endif
325	391
326	392	$(obj)/%.o: $(src)/%.S $(objtool_obj) FORCE
327	393	$(call if_changed_rule,as_o_S)
@@ -430,6 +496,9 @@ cmd_export_list = $(OBJDUMP) -h $< \| \ · 102 unmodified lines
430	496
431	497	$(obj)/lib-ksyms.o: $(lib-target) FORCE
432	498	$(call if_changed,export_list)
	499	+
	500	+targets += $(obj)/lib-ksyms.o
	501	+
433	502	endif
434	503
435	504	#

scripts/gcc-x86_64-has-stack-protector.sh+1−1

@@ -1,6 +1,6 @@
1	1	#!/bin/sh
2	2
3		−echo "int foo(void) { char X[200]; return 3; }" \| $* -S -x c -c -O0 -mcmodel=kernel -fstack-protector - -o - 2> /dev/null \| grep -q "%gs"
	3	+echo "int foo(void) { char X[200]; return 3; }" \| $* -S -x c -c -O0 -mcmodel=kernel -fno-PIE -fstack-protector - -o - 2> /dev/null \| grep -q "%gs"
4	4	if [ "$?" -eq "0" ] ; then
5	5	echo y
6	6	else

security/apparmor/domain.c+4−2

@@ -621,8 +621,8 @@ int aa_change_hat(const char *hats[], int count, u64 token, bool permtest) · 620 unmodified lines
621	621	/* released below */
622	622	cred = get_current_cred();
623	623	cxt = cred_cxt(cred);
624		− profile = aa_cred_profile(cred);
625		− previous_profile = cxt->previous;
	624	+ profile = aa_get_newest_profile(aa_cred_profile(cred));
	625	+ previous_profile = aa_get_newest_profile(cxt->previous);
626	626
627	627	if (unconfined(profile)) {
628	628	info = "unconfined";
@@ -718,6 +718,8 @@ audit: · 89 unmodified lines
718	718	out:
719	719	aa_put_profile(hat);
720	720	kfree(name);
	721	+ aa_put_profile(profile);
	722	+ aa_put_profile(previous_profile);
721	723	put_cred(cred);
722	724
723	725	return error;

sound/pci/hda/patch_realtek.c+0−2

@@ -6907,8 +6907,6 @@ static const struct hda_fixup alc662_fixups[] = { · 6906 unmodified lines
6907	6907	.v.pins = (const struct hda_pintbl[]) {
6908	6908	{ 0x15, 0x40f000f0 }, /* disabled */
6909	6909	{ 0x16, 0x40f000f0 }, /* disabled */
6910		− { 0x18, 0x01014011 }, /* LO */
6911		− { 0x1a, 0x01014012 }, /* LO */
6912	6910	{ }
6913	6911	}
6914	6912	},

sound/pci/hda/thinkpad_helper.c+2−1

@@ -13,7 +13,8 @@ static void (old_vmaster_hook)(void , int); · 12 unmodified lines
13	13	static bool is_thinkpad(struct hda_codec *codec)
14	14	{
15	15	return (codec->core.subsystem_id >> 16 == 0x17aa) &&
16		− (acpi_dev_found("LEN0068") \|\| acpi_dev_found("IBM0068"));
	16	+ (acpi_dev_found("LEN0068") \|\| acpi_dev_found("LEN0268") \|\|
	17	+ acpi_dev_found("IBM0068"));
17	18	}
18	19
19	20	static void update_tpacpi_mute_led(void *private_data, int enabled)

sound/usb/card.c+2−1

@@ -315,7 +315,8 @@ static int snd_usb_audio_free(struct snd_usb_audio *chip) · 314 unmodified lines
315	315	snd_usb_endpoint_free(ep);
316	316
317	317	mutex_destroy(&chip->mutex);
318		− dev_set_drvdata(&chip->dev->dev, NULL);
	318	+ if (!atomic_read(&chip->shutdown))
	319	+ dev_set_drvdata(&chip->dev->dev, NULL);
319	320	kfree(chip);
320	321	return 0;
321	322	}

tools/power/acpi/Makefile.config+12−11

@@ -8,18 +8,19 @@ · 7 unmodified lines
8	8	# as published by the Free Software Foundation; version 2
9	9	# of the License.
10	10
11		−include ../../../../scripts/Makefile.include
12		−
13		−OUTPUT=./
14		−ifeq ("$(origin O)", "command line")
15		− OUTPUT := $(O)/
	11	+ifeq ($(srctree),)
	12	+srctree := $(patsubst %/,%,$(dir $(shell pwd)))
	13	+srctree := $(patsubst %/,%,$(dir $(srctree)))
	14	+#$(info Determined 'srctree' to be $(srctree))
16	15	endif
17	16
18		−ifneq ($(OUTPUT),)
19		−# check that the output directory actually exists
20		−OUTDIR := $(shell cd $(OUTPUT) && /bin/pwd)
21		−$(if $(OUTDIR),, $(error output directory "$(OUTPUT)" does not exist))
	17	+include $(srctree)/../../scripts/Makefile.include
	18	+
	19	+OUTPUT=$(srctree)/
	20	+ifeq ("$(origin O)", "command line")
	21	+ OUTPUT := $(O)/power/acpi/
22	22	endif
	23	+#$(info Determined 'OUTPUT' to be $(OUTPUT))
23	24
24	25	# --- CONFIGURATION BEGIN ---
25	26
@@ -70,8 +71,8 @@ WARNINGS := -Wall · 44 unmodified lines
70	71	WARNINGS += $(call cc-supports,-Wstrict-prototypes)
71	72	WARNINGS += $(call cc-supports,-Wdeclaration-after-statement)
72	73
73		−KERNEL_INCLUDE := ../../../include
74		−ACPICA_INCLUDE := ../../../drivers/acpi/acpica
	74	+KERNEL_INCLUDE := $(OUTPUT)include
	75	+ACPICA_INCLUDE := $(srctree)/../../../drivers/acpi/acpica
75	76	CFLAGS += -D_LINUX -I$(KERNEL_INCLUDE) -I$(ACPICA_INCLUDE)
76	77	CFLAGS += $(WARNINGS)
77	78

tools/power/acpi/Makefile.rules+27−13

@@ -8,28 +8,42 @@ · 7 unmodified lines
8	8	# as published by the Free Software Foundation; version 2
9	9	# of the License.
10	10
11		−$(OUTPUT)$(TOOL): $(TOOL_OBJS) FORCE
12		− $(ECHO) " LD " $@
13		− $(QUIET) $(LD) $(CFLAGS) $(LDFLAGS) $(TOOL_OBJS) -L$(OUTPUT) -o $@
	11	+objdir := $(OUTPUT)tools/$(TOOL)/
	12	+toolobjs := $(addprefix $(objdir),$(TOOL_OBJS))
	13	+$(OUTPUT)$(TOOL): $(toolobjs) FORCE
	14	+ $(ECHO) " LD " $(subst $(OUTPUT),,$@)
	15	+ $(QUIET) $(LD) $(CFLAGS) $(LDFLAGS) $(toolobjs) -L$(OUTPUT) -o $@
	16	+ $(ECHO) " STRIP " $(subst $(OUTPUT),,$@)
14	17	$(QUIET) $(STRIPCMD) $@
15	18
16		−$(OUTPUT)%.o: %.c
17		− $(ECHO) " CC " $@
	19	+$(KERNEL_INCLUDE):
	20	+ $(ECHO) " MKDIR " $(subst $(OUTPUT),,$@)
	21	+ $(QUIET) mkdir -p $(KERNEL_INCLUDE)
	22	+ $(ECHO) " CP " $(subst $(OUTPUT),,$@)
	23	+ $(QUIET) cp -rf $(srctree)/../../../include/acpi $(KERNEL_INCLUDE)/
	24	+
	25	+$(objdir)%.o: %.c $(KERNEL_INCLUDE)
	26	+ $(ECHO) " CC " $(subst $(OUTPUT),,$@)
18	27	$(QUIET) $(CC) -c $(CFLAGS) -o $@ $<
19	28
20	29	all: $(OUTPUT)$(TOOL)
21	30	clean:
22		− -find $(OUTPUT) $ -not -type d $ \
23		− -and $ -name '~' -o -name '.[oas]' $ \
24		− -type f -print \
25		− \| xargs rm -f
26		− -rm -f $(OUTPUT)$(TOOL)
	31	+ $(ECHO) " RMOBJ " $(subst $(OUTPUT),,$(objdir))
	32	+ $(QUIET) find $(objdir) $ -not -type d $\
	33	+ -and $ -name '~' -o -name '.[oas]' $\
	34	+ -type f -print \| xargs rm -f
	35	+ $(ECHO) " RM " $(TOOL)
	36	+ $(QUIET) rm -f $(OUTPUT)$(TOOL)
	37	+ $(ECHO) " RMINC " $(subst $(OUTPUT),,$(KERNEL_INCLUDE))
	38	+ $(QUIET) rm -rf $(KERNEL_INCLUDE)
27	39
28	40	install-tools:
29		− $(INSTALL) -d $(DESTDIR)${sbindir}
30		− $(INSTALL_PROGRAM) $(OUTPUT)$(TOOL) $(DESTDIR)${sbindir}
	41	+ $(ECHO) " INST " $(TOOL)
	42	+ $(QUIET) $(INSTALL) -d $(DESTDIR)$(sbindir)
	43	+ $(QUIET) $(INSTALL_PROGRAM) $(OUTPUT)$(TOOL) $(DESTDIR)$(sbindir)
31	44	uninstall-tools:
32		− - rm -f $(DESTDIR)${sbindir}/$(TOOL)
	45	+ $(ECHO) " UNINST " $(TOOL)
	46	+ $(QUIET) rm -f $(DESTDIR)$(sbindir)/$(TOOL)
33	47
34	48	install: all install-tools $(EXTRA_INSTALL)
35	49	uninstall: uninstall-tools $(EXTRA_UNINSTALL)

tools/power/acpi/tools/acpidbg/Makefile+1−3

@@ -17,9 +17,7 @@ vpath %.c \ · 16 unmodified lines
17	17	../../os_specific/service_layers\
18	18	.
19	19	CFLAGS += -DACPI_APPLICATION -DACPI_SINGLE_THREAD -DACPI_DEBUGGER\
20		− -I.\
21		− -I../../../../../drivers/acpi/acpica\
22		− -I../../../../../include
	20	+ -I.
23	21	LDFLAGS += -lpthread
24	22	TOOL_OBJS = \
25	23	acpidbg.o

tools/power/acpi/tools/acpidbg/acpidbg.c+7−1

@@ -12,10 +12,16 @@ · 11 unmodified lines
12	12	#include <acpi/acpi.h>
13	13
14	14	/* Headers not included by include/acpi/platform/aclinux.h */
	15	+#include <unistd.h>
	16	+#include <stdio.h>
	17	+#include <stdlib.h>
	18	+#include <string.h>
	19	+#include <error.h>
15	20	#include <stdbool.h>
16	21	#include <fcntl.h>
17	22	#include <assert.h>
18		−#include <linux/circ_buf.h>
	23	+#include <sys/select.h>
	24	+#include "../../../../../include/linux/circ_buf.h"
19	25
20	26	#define ACPI_AML_FILE "/sys/kernel/debug/acpi/acpidbg"
21	27	#define ACPI_AML_SEC_TICK 1

tools/power/acpi/tools/acpidump/Makefile+6−6

@@ -19,9 +19,7 @@ vpath %.c \ · 18 unmodified lines
19	19	./\
20	20	../../common\
21	21	../../os_specific/service_layers
22		−CFLAGS += -DACPI_DUMP_APP -I.\
23		− -I../../../../../drivers/acpi/acpica\
24		− -I../../../../../include
	22	+CFLAGS += -DACPI_DUMP_APP -I.
25	23	TOOL_OBJS = \
26	24	apdump.o\
27	25	apfiles.o\
@@ -49,7 +47,9 @@ TOOL_OBJS = \ · 21 unmodified lines
49	47
50	48	include ../../Makefile.rules
51	49
52		−install-man: ../../man/acpidump.8
53		− $(INSTALL_DATA) -D $< $(DESTDIR)${mandir}/man8/acpidump.8
	50	+install-man: $(srctree)/man/acpidump.8
	51	+ $(ECHO) " INST " acpidump.8
	52	+ $(QUIET) $(INSTALL_DATA) -D $< $(DESTDIR)$(mandir)/man8/acpidump.8
54	53	uninstall-man:
55		− - rm -f $(DESTDIR)${mandir}/man8/acpidump.8
	54	+ $(ECHO) " UNINST " acpidump.8
	55	+ $(QUIET) rm -f $(DESTDIR)$(mandir)/man8/acpidump.8

virt/kvm/arm/pmu.c+5−3

@@ -305,7 +305,7 @@ void kvm_pmu_software_increment(struct kvm_vcpu *vcpu, u64 val) · 304 unmodified lines
305	305	continue;
306	306	type = vcpu_sys_reg(vcpu, PMEVTYPER0_EL0 + i)
307	307	& ARMV8_PMU_EVTYPE_EVENT;
308		− if ((type == ARMV8_PMU_EVTYPE_EVENT_SW_INCR)
	308	+ if ((type == ARMV8_PMUV3_PERFCTR_SW_INCR)
309	309	&& (enable & BIT(i))) {
310	310	reg = vcpu_sys_reg(vcpu, PMEVCNTR0_EL0 + i) + 1;
311	311	reg = lower_32_bits(reg);
@@ -379,7 +379,8 @@ void kvm_pmu_set_counter_event_type(struct kvm_vcpu *vcpu, u64 data, · 67 unmodified lines
379	379	eventsel = data & ARMV8_PMU_EVTYPE_EVENT;
380	380
381	381	/* Software increment event does't need to be backed by a perf event */
382		− if (eventsel == ARMV8_PMU_EVTYPE_EVENT_SW_INCR)
	382	+ if (eventsel == ARMV8_PMUV3_PERFCTR_SW_INCR &&
	383	+ select_idx != ARMV8_PMU_CYCLE_IDX)
383	384	return;
384	385
385	386	memset(&attr, 0, sizeof(struct perf_event_attr));
@@ -391,7 +392,8 @@ void kvm_pmu_set_counter_event_type(struct kvm_vcpu *vcpu, u64 data, · 5 unmodified lines
391	392	attr.exclude_kernel = data & ARMV8_PMU_EXCLUDE_EL1 ? 1 : 0;
392	393	attr.exclude_hv = 1; /* Don't count EL2 events */
393	394	attr.exclude_host = 1; /* Don't count host events */
394		− attr.config = eventsel;
	395	+ attr.config = (select_idx == ARMV8_PMU_CYCLE_IDX) ?
	396	+ ARMV8_PMUV3_PERFCTR_CPU_CYCLES : eventsel;
395	397
396	398	counter = kvm_pmu_get_counter_value(vcpu, select_idx);
397	399	/* The initial sample period (overflow count) of an event. */

virt/kvm/async_pf.c+12−1

@@ -91,6 +91,7 @@ static void async_pf_execute(struct work_struct *work) · 90 unmodified lines
91	91
92	92	spin_lock(&vcpu->async_pf.lock);
93	93	list_add_tail(&apf->link, &vcpu->async_pf.done);
	94	+ apf->vcpu = NULL;
94	95	spin_unlock(&vcpu->async_pf.lock);
95	96
96	97	/*
@@ -113,6 +114,8 @@ static void async_pf_execute(struct work_struct *work) · 16 unmodified lines
113	114
114	115	void kvm_clear_async_pf_completion_queue(struct kvm_vcpu *vcpu)
115	116	{
	117	+ spin_lock(&vcpu->async_pf.lock);
	118	+
116	119	/* cancel outstanding work queue item */
117	120	while (!list_empty(&vcpu->async_pf.queue)) {
118	121	struct kvm_async_pf *work =
@@ -120,6 +123,14 @@ void kvm_clear_async_pf_completion_queue(struct kvm_vcpu *vcpu) · 1 unmodified line
120	123	typeof(*work), queue);
121	124	list_del(&work->queue);
122	125
	126	+ /*
	127	+ * We know it's present in vcpu->async_pf.done, do
	128	+ * nothing here.
	129	+ */
	130	+ if (!work->vcpu)
	131	+ continue;
	132	+
	133	+ spin_unlock(&vcpu->async_pf.lock);
123	134	#ifdef CONFIG_KVM_ASYNC_PF_SYNC
124	135	flush_work(&work->work);
125	136	#else
@@ -129,9 +140,9 @@ void kvm_clear_async_pf_completion_queue(struct kvm_vcpu *vcpu) · 3 unmodified lines
129	140	kmem_cache_free(async_pf_cache, work);
130	141	}
131	142	#endif
	143	+ spin_lock(&vcpu->async_pf.lock);
132	144	}
133	145
134		− spin_lock(&vcpu->async_pf.lock);
135	146	while (!list_empty(&vcpu->async_pf.done)) {
136	147	struct kvm_async_pf *work =
137	148	list_first_entry(&vcpu->async_pf.done,