History

Merge branches 'pm-cpufreq', 'pm-cpuidle' and 'acpi-cppc'

* pm-cpufreq: cpufreq: dt: Drop stale comment cpufreq: intel_pstate: Documenation for structures cpufreq: intel_pstate: fix inconsistency in setting policy limits intel_pstate: Avoid extra invocation of intel_pstate_sample() intel_pstate: Do not set utilization update hook too early * pm-cpuidle: intel_idle: Add KBL support intel_idle: Add SKX support intel_idle: Clean up all registered devices on exit. intel_idle: Propagate hot plug errors. intel_idle: Don't overreact to a cpuidle registration failure. intel_idle: Setup the timer broadcast only on successful driver load. intel_idle: Avoid a double free of the per-CPU data. intel_idle: Fix dangling registration on error path. intel_idle: Fix deallocation order on the driver exit path. intel_idle: Remove redundant initialization calls. intel_idle: Fix a helper function's return value. intel_idle: remove useless return from void function. * acpi-cppc: mailbox: pcc: Don't access an unmapped memory address space

Rafael J. Wysocki committed 10 years ago

Commit fa81e664 parents 9735a22 b318556 3ce093d 169b3834 files · +258 −52Browse files

Unified · Split

4 files
  1. drivers/cpufreq/cpufreq-dt.c +0 −3
  2. drivers/cpufreq/intel_pstate.c +189 −17
  3. drivers/idle/intel_idle.c +67 −30
  4. drivers/mailbox/pcc.c +2 −2
drivers/cpufreq/cpufreq-dt.c+0−3
@@ -4,9 +4,6 @@ · 3 unmodified lines
44 * Copyright (C) 2014 Linaro.
55 * Viresh Kumar <viresh.kumar@linaro.org>
66 *
7− * The OPP code in function set_target() is reused from
8− * drivers/cpufreq/omap-cpufreq.c
9− *
107 * This program is free software; you can redistribute it and/or modify
118 * it under the terms of the GNU General Public License version 2 as
129 * published by the Free Software Foundation.
drivers/cpufreq/intel_pstate.c+189−17
@@ -64,6 +64,25 @@ static inline int ceiling_fp(int32_t x) · 63 unmodified lines
6464 return ret;
6565 }
6666
67+/**
68+ * struct sample - Store performance sample
69+ * @core_pct_busy: Ratio of APERF/MPERF in percent, which is actual
70+ * performance during last sample period
71+ * @busy_scaled: Scaled busy value which is used to calculate next
72+ * P state. This can be different than core_pct_busy
73+ * to account for cpu idle period
74+ * @aperf: Difference of actual performance frequency clock count
75+ * read from APERF MSR between last and current sample
76+ * @mperf: Difference of maximum performance frequency clock count
77+ * read from MPERF MSR between last and current sample
78+ * @tsc: Difference of time stamp counter between last and
79+ * current sample
80+ * @freq: Effective frequency calculated from APERF/MPERF
81+ * @time: Current time from scheduler
82+ *
83+ * This structure is used in the cpudata structure to store performance sample
84+ * data for choosing next P State.
85+ */
6786 struct sample {
6887 int32_t core_pct_busy;
6988 int32_t busy_scaled;
@@ -74,6 +93,20 @@ struct sample { · 4 unmodified lines
7493 u64 time;
7594 };
7695
96+/**
97+ * struct pstate_data - Store P state data
98+ * @current_pstate: Current requested P state
99+ * @min_pstate: Min P state possible for this platform
100+ * @max_pstate: Max P state possible for this platform
101+ * @max_pstate_physical:This is physical Max P state for a processor
102+ * This can be higher than the max_pstate which can
103+ * be limited by platform thermal design power limits
104+ * @scaling: Scaling factor to convert frequency to cpufreq
105+ * frequency units
106+ * @turbo_pstate: Max Turbo P state possible for this platform
107+ *
108+ * Stores the per cpu model P state limits and current P state.
109+ */
77110 struct pstate_data {
78111 int current_pstate;
79112 int min_pstate;
@@ -83,6 +116,19 @@ struct pstate_data { · 3 unmodified lines
83116 int turbo_pstate;
84117 };
85118
119+/**
120+ * struct vid_data - Stores voltage information data
121+ * @min: VID data for this platform corresponding to
122+ * the lowest P state
123+ * @max: VID data corresponding to the highest P State.
124+ * @turbo: VID data for turbo P state
125+ * @ratio: Ratio of (vid max - vid min) /
126+ * (max P state - Min P State)
127+ *
128+ * Stores the voltage data for DVFS (Dynamic Voltage and Frequency Scaling)
129+ * This data is used in Atom platforms, where in addition to target P state,
130+ * the voltage data needs to be specified to select next P State.
131+ */
86132 struct vid_data {
87133 int min;
88134 int max;
@@ -90,6 +136,18 @@ struct vid_data { · 1 unmodified line
90136 int32_t ratio;
91137 };
92138
139+/**
140+ * struct _pid - Stores PID data
141+ * @setpoint: Target set point for busyness or performance
142+ * @integral: Storage for accumulated error values
143+ * @p_gain: PID proportional gain
144+ * @i_gain: PID integral gain
145+ * @d_gain: PID derivative gain
146+ * @deadband: PID deadband
147+ * @last_err: Last error storage for integral part of PID calculation
148+ *
149+ * Stores PID coefficients and last error for PID controller.
150+ */
93151 struct _pid {
94152 int setpoint;
95153 int32_t integral;
@@ -100,6 +158,23 @@ struct _pid { · 4 unmodified lines
100158 int32_t last_err;
101159 };
102160
161+/**
162+ * struct cpudata - Per CPU instance data storage
163+ * @cpu: CPU number for this instance data
164+ * @update_util: CPUFreq utility callback information
165+ * @pstate: Stores P state limits for this CPU
166+ * @vid: Stores VID limits for this CPU
167+ * @pid: Stores PID parameters for this CPU
168+ * @last_sample_time: Last Sample time
169+ * @prev_aperf: Last APERF value read from APERF MSR
170+ * @prev_mperf: Last MPERF value read from MPERF MSR
171+ * @prev_tsc: Last timestamp counter (TSC) value
172+ * @prev_cummulative_iowait: IO Wait time difference from last and
173+ * current sample
174+ * @sample: Storage for storing last Sample data
175+ *
176+ * This structure stores per CPU instance data for all CPUs.
177+ */
103178 struct cpudata {
104179 int cpu;
105180
@@ -118,6 +193,19 @@ struct cpudata { · 12 unmodified lines
118193 };
119194
120195 static struct cpudata **all_cpu_data;
196+
197+/**
198+ * struct pid_adjust_policy - Stores static PID configuration data
199+ * @sample_rate_ms: PID calculation sample rate in ms
200+ * @sample_rate_ns: Sample rate calculation in ns
201+ * @deadband: PID deadband
202+ * @setpoint: PID Setpoint
203+ * @p_gain_pct: PID proportional gain
204+ * @i_gain_pct: PID integral gain
205+ * @d_gain_pct: PID derivative gain
206+ *
207+ * Stores per CPU model static PID configuration data.
208+ */
121209 struct pstate_adjust_policy {
122210 int sample_rate_ms;
123211 s64 sample_rate_ns;
@@ -128,6 +216,20 @@ struct pstate_adjust_policy { · 4 unmodified lines
128216 int i_gain_pct;
129217 };
130218
219+/**
220+ * struct pstate_funcs - Per CPU model specific callbacks
221+ * @get_max: Callback to get maximum non turbo effective P state
222+ * @get_max_physical: Callback to get maximum non turbo physical P state
223+ * @get_min: Callback to get minimum P state
224+ * @get_turbo: Callback to get turbo P state
225+ * @get_scaling: Callback to get frequency scaling factor
226+ * @get_val: Callback to convert P state to actual MSR write value
227+ * @get_vid: Callback to get VID data for Atom platforms
228+ * @get_target_pstate: Callback to a function to calculate next P state to use
229+ *
230+ * Core and Atom CPU models have different way to get P State limits. This
231+ * structure is used to store those callbacks.
232+ */
131233 struct pstate_funcs {
132234 int (*get_max)(void);
133235 int (*get_max_physical)(void);
@@ -139,6 +241,11 @@ struct pstate_funcs { · 5 unmodified lines
139241 int32_t (*get_target_pstate)(struct cpudata *);
140242 };
141243
244+/**
245+ * struct cpu_defaults- Per CPU model default config data
246+ * @pid_policy: PID config data
247+ * @funcs: Callback function data
248+ */
142249 struct cpu_defaults {
143250 struct pstate_adjust_policy pid_policy;
144251 struct pstate_funcs funcs;
@@ -151,6 +258,34 @@ static struct pstate_adjust_policy pid_params; · 6 unmodified lines
151258 static struct pstate_funcs pstate_funcs;
152259 static int hwp_active;
153260
261+
262+/**
263+ * struct perf_limits - Store user and policy limits
264+ * @no_turbo: User requested turbo state from intel_pstate sysfs
265+ * @turbo_disabled: Platform turbo status either from msr
266+ * MSR_IA32_MISC_ENABLE or when maximum available pstate
267+ * matches the maximum turbo pstate
268+ * @max_perf_pct: Effective maximum performance limit in percentage, this
269+ * is minimum of either limits enforced by cpufreq policy
270+ * or limits from user set limits via intel_pstate sysfs
271+ * @min_perf_pct: Effective minimum performance limit in percentage, this
272+ * is maximum of either limits enforced by cpufreq policy
273+ * or limits from user set limits via intel_pstate sysfs
274+ * @max_perf: This is a scaled value between 0 to 255 for max_perf_pct
275+ * This value is used to limit max pstate
276+ * @min_perf: This is a scaled value between 0 to 255 for min_perf_pct
277+ * This value is used to limit min pstate
278+ * @max_policy_pct: The maximum performance in percentage enforced by
279+ * cpufreq setpolicy interface
280+ * @max_sysfs_pct: The maximum performance in percentage enforced by
281+ * intel pstate sysfs interface
282+ * @min_policy_pct: The minimum performance in percentage enforced by
283+ * cpufreq setpolicy interface
284+ * @min_sysfs_pct: The minimum performance in percentage enforced by
285+ * intel pstate sysfs interface
286+ *
287+ * Storage for user and policy defined limits.
288+ */
154289 struct perf_limits {
155290 int no_turbo;
156291 int turbo_disabled;
@@ -910,7 +1045,14 @@ static inline bool intel_pstate_sample(struct cpudata *cpu, u64 time) · 753 unmodified lines
9101045 cpu->prev_aperf = aperf;
9111046 cpu->prev_mperf = mperf;
9121047 cpu->prev_tsc = tsc;
913− return true;
1048+ /*
1049+ * First time this function is invoked in a given cycle, all of the
1050+ * previous sample data fields are equal to zero or stale and they must
1051+ * be populated with meaningful numbers for things to work, so assume
1052+ * that sample.time will always be reset before setting the utilization
1053+ * update hook and make the caller skip the sample then.
1054+ */
1055+ return !!cpu->last_sample_time;
9141056 }
9151057
9161058 static inline int32_t get_avg_frequency(struct cpudata *cpu)
@@ -984,8 +1126,7 @@ static inline int32_t get_target_pstate_use_performance(struct cpudata *cpu) · 67 unmodified lines
9841126 * enough period of time to adjust our busyness.
9851127 */
9861128 duration_ns = cpu->sample.time - cpu->last_sample_time;
987− if ((s64)duration_ns > pid_params.sample_rate_ns * 3
988− && cpu->last_sample_time > 0) {
1129+ if ((s64)duration_ns > pid_params.sample_rate_ns * 3) {
9891130 sample_ratio = div_fp(int_tofp(pid_params.sample_rate_ns),
9901131 int_tofp(duration_ns));
9911132 core_busy = mul_fp(core_busy, sample_ratio);
@@ -1100,10 +1241,8 @@ static int intel_pstate_init_cpu(unsigned int cpunum) · 108 unmodified lines
11001241 intel_pstate_get_cpu_pstates(cpu);
11011242
11021243 intel_pstate_busy_pid_reset(cpu);
1103− intel_pstate_sample(cpu, 0);
11041244
11051245 cpu->update_util.func = intel_pstate_update_util;
1106− cpufreq_set_update_util_data(cpunum, &cpu->update_util);
11071246
11081247 pr_debug("intel_pstate: controlling: cpu %d\n", cpunum);
11091248
@@ -1122,22 +1261,54 @@ static unsigned int intel_pstate_get(unsigned int cpu_num) · 12 unmodified lines
11221261 return get_avg_frequency(cpu);
11231262 }
11241263
1264+static void intel_pstate_set_update_util_hook(unsigned int cpu_num)
1265+{
1266+ struct cpudata *cpu = all_cpu_data[cpu_num];
1267+
1268+ /* Prevent intel_pstate_update_util() from using stale data. */
1269+ cpu->sample.time = 0;
1270+ cpufreq_set_update_util_data(cpu_num, &cpu->update_util);
1271+}
1272+
1273+static void intel_pstate_clear_update_util_hook(unsigned int cpu)
1274+{
1275+ cpufreq_set_update_util_data(cpu, NULL);
1276+ synchronize_sched();
1277+}
1278+
1279+static void intel_pstate_set_performance_limits(struct perf_limits *limits)
1280+{
1281+ limits->no_turbo = 0;
1282+ limits->turbo_disabled = 0;
1283+ limits->max_perf_pct = 100;
1284+ limits->max_perf = int_tofp(1);
1285+ limits->min_perf_pct = 100;
1286+ limits->min_perf = int_tofp(1);
1287+ limits->max_policy_pct = 100;
1288+ limits->max_sysfs_pct = 100;
1289+ limits->min_policy_pct = 0;
1290+ limits->min_sysfs_pct = 0;
1291+}
1292+
11251293 static int intel_pstate_set_policy(struct cpufreq_policy *policy)
11261294 {
11271295 if (!policy->cpuinfo.max_freq)
11281296 return -ENODEV;
11291297
1130− if (policy->policy == CPUFREQ_POLICY_PERFORMANCE &&
1131− policy->max >= policy->cpuinfo.max_freq) {
1132− pr_debug("intel_pstate: set performance\n");
1298+ intel_pstate_clear_update_util_hook(policy->cpu);
1299+
1300+ if (policy->policy == CPUFREQ_POLICY_PERFORMANCE) {
11331301 limits = &performance_limits;
1134− if (hwp_active)
1135− intel_pstate_hwp_set(policy->cpus);
1136− return 0;
1302+ if (policy->max >= policy->cpuinfo.max_freq) {
1303+ pr_debug("intel_pstate: set performance\n");
1304+ intel_pstate_set_performance_limits(limits);
1305+ goto out;
1306+ }
1307+ } else {
1308+ pr_debug("intel_pstate: set powersave\n");
1309+ limits = &powersave_limits;
11371310 }
11381311
1139− pr_debug("intel_pstate: set powersave\n");
1140− limits = &powersave_limits;
11411312 limits->min_policy_pct = (policy->min * 100) / policy->cpuinfo.max_freq;
11421313 limits->min_policy_pct = clamp_t(int, limits->min_policy_pct, 0 , 100);
11431314 limits->max_policy_pct = DIV_ROUND_UP(policy->max * 100,
@@ -1163,6 +1334,9 @@ static int intel_pstate_set_policy(struct cpufreq_policy *policy) · 19 unmodified lines
11631334 limits->max_perf = div_fp(int_tofp(limits->max_perf_pct),
11641335 int_tofp(100));
11651336
1337+ out:
1338+ intel_pstate_set_update_util_hook(policy->cpu);
1339+
11661340 if (hwp_active)
11671341 intel_pstate_hwp_set(policy->cpus);
11681342
@@ -1187,8 +1361,7 @@ static void intel_pstate_stop_cpu(struct cpufreq_policy *policy) · 18 unmodified lines
11871361
11881362 pr_debug("intel_pstate: CPU %d exiting\n", cpu_num);
11891363
1190− cpufreq_set_update_util_data(cpu_num, NULL);
1191− synchronize_sched();
1364+ intel_pstate_clear_update_util_hook(cpu_num);
11921365
11931366 if (hwp_active)
11941367 return;
@@ -1455,8 +1628,7 @@ out: · 260 unmodified lines
14551628 get_online_cpus();
14561629 for_each_online_cpu(cpu) {
14571630 if (all_cpu_data[cpu]) {
1458− cpufreq_set_update_util_data(cpu, NULL);
1459− synchronize_sched();
1631+ intel_pstate_clear_update_util_hook(cpu);
14601632 kfree(all_cpu_data[cpu]);
14611633 }
14621634 }
drivers/idle/intel_idle.c+67−30
@@ -660,6 +660,35 @@ static struct cpuidle_state skl_cstates[] = { · 659 unmodified lines
660660 .enter = NULL }
661661 };
662662
663+static struct cpuidle_state skx_cstates[] = {
664+ {
665+ .name = "C1-SKX",
666+ .desc = "MWAIT 0x00",
667+ .flags = MWAIT2flg(0x00),
668+ .exit_latency = 2,
669+ .target_residency = 2,
670+ .enter = &intel_idle,
671+ .enter_freeze = intel_idle_freeze, },
672+ {
673+ .name = "C1E-SKX",
674+ .desc = "MWAIT 0x01",
675+ .flags = MWAIT2flg(0x01),
676+ .exit_latency = 10,
677+ .target_residency = 20,
678+ .enter = &intel_idle,
679+ .enter_freeze = intel_idle_freeze, },
680+ {
681+ .name = "C6-SKX",
682+ .desc = "MWAIT 0x20",
683+ .flags = MWAIT2flg(0x20) | CPUIDLE_FLAG_TLB_FLUSHED,
684+ .exit_latency = 133,
685+ .target_residency = 600,
686+ .enter = &intel_idle,
687+ .enter_freeze = intel_idle_freeze, },
688+ {
689+ .enter = NULL }
690+};
691+
663692 static struct cpuidle_state atom_cstates[] = {
664693 {
665694 .name = "C1E-ATM",
@@ -818,8 +847,11 @@ static int cpu_hotplug_notify(struct notifier_block *n, · 152 unmodified lines
818847 * driver in this case
819848 */
820849 dev = per_cpu_ptr(intel_idle_cpuidle_devices, hotcpu);
821− if (!dev->registered)
822− intel_idle_cpu_init(hotcpu);
850+ if (dev->registered)
851+ break;
852+
853+ if (intel_idle_cpu_init(hotcpu))
854+ return NOTIFY_BAD;
823855
824856 break;
825857 }
@@ -904,6 +936,10 @@ static const struct idle_cpu idle_cpu_skl = { · 78 unmodified lines
904936 .disable_promotion_to_c1e = true,
905937 };
906938
939+static const struct idle_cpu idle_cpu_skx = {
940+ .state_table = skx_cstates,
941+ .disable_promotion_to_c1e = true,
942+};
907943
908944 static const struct idle_cpu idle_cpu_avn = {
909945 .state_table = avn_cstates,
@@ -945,6 +981,9 @@ static const struct x86_cpu_id intel_idle_ids[] __initconst = { · 35 unmodified lines
945981 ICPU(0x56, idle_cpu_bdw),
946982 ICPU(0x4e, idle_cpu_skl),
947983 ICPU(0x5e, idle_cpu_skl),
984+ ICPU(0x8e, idle_cpu_skl),
985+ ICPU(0x9e, idle_cpu_skl),
986+ ICPU(0x55, idle_cpu_skx),
948987 ICPU(0x57, idle_cpu_knl),
949988 {}
950989 };
@@ -987,22 +1026,15 @@ static int __init intel_idle_probe(void) · 36 unmodified lines
9871026 icpu = (const struct idle_cpu *)id->driver_data;
9881027 cpuidle_state_table = icpu->state_table;
9891028
990− if (boot_cpu_has(X86_FEATURE_ARAT)) /* Always Reliable APIC Timer */
991− lapic_timer_reliable_states = LAPIC_TIMER_ALWAYS_RELIABLE;
992− else
993− on_each_cpu(__setup_broadcast_timer, (void *)true, 1);
994−
9951029 pr_debug(PREFIX "v" INTEL_IDLE_VERSION
9961030 " model 0x%X\n", boot_cpu_data.x86_model);
9971031
998− pr_debug(PREFIX "lapic_timer_reliable_states 0x%x\n",
999− lapic_timer_reliable_states);
10001032 return 0;
10011033 }
10021034
10031035 /*
10041036 * intel_idle_cpuidle_devices_uninit()
1005− * unregister, free cpuidle_devices
1037+ * Unregisters the cpuidle devices.
10061038 */
10071039 static void intel_idle_cpuidle_devices_uninit(void)
10081040 {
@@ -1013,9 +1045,6 @@ static void intel_idle_cpuidle_devices_uninit(void) · 4 unmodified lines
10131045 dev = per_cpu_ptr(intel_idle_cpuidle_devices, i);
10141046 cpuidle_unregister_device(dev);
10151047 }
1016−
1017− free_percpu(intel_idle_cpuidle_devices);
1018− return;
10191048 }
10201049
10211050 /*
@@ -1111,7 +1140,7 @@ static void intel_idle_state_table_update(void) · 89 unmodified lines
11111140 * intel_idle_cpuidle_driver_init()
11121141 * allocate, initialize cpuidle_states
11131142 */
1114−static int __init intel_idle_cpuidle_driver_init(void)
1143+static void __init intel_idle_cpuidle_driver_init(void)
11151144 {
11161145 int cstate;
11171146 struct cpuidle_driver *drv = &intel_idle_driver;
@@ -1163,18 +1192,10 @@ static int __init intel_idle_cpuidle_driver_init(void) · 45 unmodified lines
11631192 drv->state_count += 1;
11641193 }
11651194
1166− if (icpu->auto_demotion_disable_flags)
1167− on_each_cpu(auto_demotion_disable, NULL, 1);
1168−
11691195 if (icpu->byt_auto_demotion_disable_flag) {
11701196 wrmsrl(MSR_CC6_DEMOTION_POLICY_CONFIG, 0);
11711197 wrmsrl(MSR_MC6_DEMOTION_POLICY_CONFIG, 0);
11721198 }
1173−
1174− if (icpu->disable_promotion_to_c1e) /* each-cpu is redundant */
1175− on_each_cpu(c1e_promotion_disable, NULL, 1);
1176−
1177− return 0;
11781199 }
11791200
11801201
@@ -1193,7 +1214,6 @@ static int intel_idle_cpu_init(int cpu) · 12 unmodified lines
11931214
11941215 if (cpuidle_register_device(dev)) {
11951216 pr_debug(PREFIX "cpuidle_register_device %d failed!\n", cpu);
1196− intel_idle_cpuidle_devices_uninit();
11971217 return -EIO;
11981218 }
11991219
@@ -1218,40 +1238,51 @@ static int __init intel_idle_init(void) · 18 unmodified lines
12181238 if (retval)
12191239 return retval;
12201240
1241+ intel_idle_cpuidle_devices = alloc_percpu(struct cpuidle_device);
1242+ if (intel_idle_cpuidle_devices == NULL)
1243+ return -ENOMEM;
1244+
12211245 intel_idle_cpuidle_driver_init();
12221246 retval = cpuidle_register_driver(&intel_idle_driver);
12231247 if (retval) {
12241248 struct cpuidle_driver *drv = cpuidle_get_driver();
12251249 printk(KERN_DEBUG PREFIX "intel_idle yielding to %s",
12261250 drv ? drv->name : "none");
1251+ free_percpu(intel_idle_cpuidle_devices);
12271252 return retval;
12281253 }
12291254
1230− intel_idle_cpuidle_devices = alloc_percpu(struct cpuidle_device);
1231− if (intel_idle_cpuidle_devices == NULL)
1232− return -ENOMEM;
1233−
12341255 cpu_notifier_register_begin();
12351256
12361257 for_each_online_cpu(i) {
12371258 retval = intel_idle_cpu_init(i);
12381259 if (retval) {
1260+ intel_idle_cpuidle_devices_uninit();
12391261 cpu_notifier_register_done();
12401262 cpuidle_unregister_driver(&intel_idle_driver);
1263+ free_percpu(intel_idle_cpuidle_devices);
12411264 return retval;
12421265 }
12431266 }
12441267 __register_cpu_notifier(&cpu_hotplug_notifier);
12451268
1269+ if (boot_cpu_has(X86_FEATURE_ARAT)) /* Always Reliable APIC Timer */
1270+ lapic_timer_reliable_states = LAPIC_TIMER_ALWAYS_RELIABLE;
1271+ else
1272+ on_each_cpu(__setup_broadcast_timer, (void *)true, 1);
1273+
12461274 cpu_notifier_register_done();
12471275
1276+ pr_debug(PREFIX "lapic_timer_reliable_states 0x%x\n",
1277+ lapic_timer_reliable_states);
1278+
12481279 return 0;
12491280 }
12501281
12511282 static void __exit intel_idle_exit(void)
12521283 {
1253− intel_idle_cpuidle_devices_uninit();
1254− cpuidle_unregister_driver(&intel_idle_driver);
1284+ struct cpuidle_device *dev;
1285+ int i;
12551286
12561287 cpu_notifier_register_begin();
12571288
@@ -1259,9 +1290,15 @@ static void __exit intel_idle_exit(void) · 1 unmodified line
12591290 on_each_cpu(__setup_broadcast_timer, (void *)false, 1);
12601291 __unregister_cpu_notifier(&cpu_hotplug_notifier);
12611292
1293+ for_each_possible_cpu(i) {
1294+ dev = per_cpu_ptr(intel_idle_cpuidle_devices, i);
1295+ cpuidle_unregister_device(dev);
1296+ }
1297+
12621298 cpu_notifier_register_done();
12631299
1264− return;
1300+ cpuidle_unregister_driver(&intel_idle_driver);
1301+ free_percpu(intel_idle_cpuidle_devices);
12651302 }
12661303
12671304 module_init(intel_idle_init);
drivers/mailbox/pcc.c+2−2
@@ -361,8 +361,6 @@ static int __init acpi_pcc_probe(void) · 360 unmodified lines
361361 struct acpi_generic_address *db_reg;
362362 struct acpi_pcct_hw_reduced *pcct_ss;
363363 pcc_mbox_channels[i].con_priv = pcct_entry;
364− pcct_entry = (struct acpi_subtable_header *)
365− ((unsigned long) pcct_entry + pcct_entry->length);
366364
367365 /* If doorbell is in system memory cache the virt address */
368366 pcct_ss = (struct acpi_pcct_hw_reduced *)pcct_entry;
@@ -370,6 +368,8 @@ static int __init acpi_pcc_probe(void) · 1 unmodified line
370368 if (db_reg->space_id == ACPI_ADR_SPACE_SYSTEM_MEMORY)
371369 pcc_doorbell_vaddr[i] = acpi_os_ioremap(db_reg->address,
372370 db_reg->bit_width/8);
371+ pcct_entry = (struct acpi_subtable_header *)
372+ ((unsigned long) pcct_entry + pcct_entry->length);
373373 }
374374
375375 pcc_mbox_ctrl.num_chans = count;