Bring changes from drm-misc-next that got merged in drm-next back to drm-xe so they can be used for additional features.
Showing the changes to include/uapi/drm (6 of 1429 files). Show all
Unified · Split
| @@ -865,6 +865,8 @@ struct drm_amdgpu_cs_chunk_cp_gfx_shadow { · 864 unmodified lines | |||
| 865 | #define AMDGPU_INFO_SENSOR_PEAK_PSTATE_GFX_SCLK 0xa | 865 | #define AMDGPU_INFO_SENSOR_PEAK_PSTATE_GFX_SCLK 0xa |
| 866 | /* Subquery id: Query GPU peak pstate memory clock */ | 866 | /* Subquery id: Query GPU peak pstate memory clock */ |
| 867 | #define AMDGPU_INFO_SENSOR_PEAK_PSTATE_GFX_MCLK 0xb | 867 | #define AMDGPU_INFO_SENSOR_PEAK_PSTATE_GFX_MCLK 0xb |
| 868 | /* Subquery id: Query input GPU power */ | ||
| 869 | #define AMDGPU_INFO_SENSOR_GPU_INPUT_POWER 0xc | ||
| 868 | /* Number of VRAM page faults on CPU access. */ | 870 | /* Number of VRAM page faults on CPU access. */ |
| 869 | #define AMDGPU_INFO_NUM_VRAM_CPU_PAGE_FAULTS 0x1E | 871 | #define AMDGPU_INFO_NUM_VRAM_CPU_PAGE_FAULTS 0x1E |
| 870 | #define AMDGPU_INFO_VRAM_LOST_COUNTER 0x1F | 872 | #define AMDGPU_INFO_VRAM_LOST_COUNTER 0x1F |
| @@ -3013,6 +3013,7 @@ struct drm_i915_query_item { · 3012 unmodified lines | |||
| 3013 | * - %DRM_I915_QUERY_MEMORY_REGIONS (see struct drm_i915_query_memory_regions) | 3013 | * - %DRM_I915_QUERY_MEMORY_REGIONS (see struct drm_i915_query_memory_regions) |
| 3014 | * - %DRM_I915_QUERY_HWCONFIG_BLOB (see `GuC HWCONFIG blob uAPI`) | 3014 | * - %DRM_I915_QUERY_HWCONFIG_BLOB (see `GuC HWCONFIG blob uAPI`) |
| 3015 | * - %DRM_I915_QUERY_GEOMETRY_SUBSLICES (see struct drm_i915_query_topology_info) | 3015 | * - %DRM_I915_QUERY_GEOMETRY_SUBSLICES (see struct drm_i915_query_topology_info) |
| 3016 | * - %DRM_I915_QUERY_GUC_SUBMISSION_VERSION (see struct drm_i915_query_guc_submission_version) | ||
| 3016 | */ | 3017 | */ |
| 3017 | __u64 query_id; | 3018 | __u64 query_id; |
| 3018 | #define DRM_I915_QUERY_TOPOLOGY_INFO 1 | 3019 | #define DRM_I915_QUERY_TOPOLOGY_INFO 1 |
| @@ -3021,6 +3022,7 @@ struct drm_i915_query_item { · 2 unmodified lines | |||
| 3021 | #define DRM_I915_QUERY_MEMORY_REGIONS 4 | 3022 | #define DRM_I915_QUERY_MEMORY_REGIONS 4 |
| 3022 | #define DRM_I915_QUERY_HWCONFIG_BLOB 5 | 3023 | #define DRM_I915_QUERY_HWCONFIG_BLOB 5 |
| 3023 | #define DRM_I915_QUERY_GEOMETRY_SUBSLICES 6 | 3024 | #define DRM_I915_QUERY_GEOMETRY_SUBSLICES 6 |
| 3025 | #define DRM_I915_QUERY_GUC_SUBMISSION_VERSION 7 | ||
| 3024 | /* Must be kept compact -- no holes and well documented */ | 3026 | /* Must be kept compact -- no holes and well documented */ |
| 3025 | 3027 | ||
| 3026 | /** | 3028 | /** |
| @@ -3566,6 +3568,16 @@ struct drm_i915_query_memory_regions { · 539 unmodified lines | |||
| 3566 | struct drm_i915_memory_region_info regions[]; | 3568 | struct drm_i915_memory_region_info regions[]; |
| 3567 | }; | 3569 | }; |
| 3568 | 3570 | ||
| 3571 | /** | ||
| 3572 | * struct drm_i915_query_guc_submission_version - query GuC submission interface version | ||
| 3573 | */ | ||
| 3574 | struct drm_i915_query_guc_submission_version { | ||
| 3575 | __u32 branch; | ||
| 3576 | __u32 major; | ||
| 3577 | __u32 minor; | ||
| 3578 | __u32 patch; | ||
| 3579 | }; | ||
| 3580 | |||
| 3569 | /** | 3581 | /** |
| 3570 | * DOC: GuC HWCONFIG blob uAPI | 3582 | * DOC: GuC HWCONFIG blob uAPI |
| 3571 | * | 3583 | * |
| @@ -53,7 +53,7 @@ extern "C" { · 52 unmodified lines | |||
| 53 | #define DRM_IVPU_PARAM_CORE_CLOCK_RATE 3 | 53 | #define DRM_IVPU_PARAM_CORE_CLOCK_RATE 3 |
| 54 | #define DRM_IVPU_PARAM_NUM_CONTEXTS 4 | 54 | #define DRM_IVPU_PARAM_NUM_CONTEXTS 4 |
| 55 | #define DRM_IVPU_PARAM_CONTEXT_BASE_ADDRESS 5 | 55 | #define DRM_IVPU_PARAM_CONTEXT_BASE_ADDRESS 5 |
| 56 | #define DRM_IVPU_PARAM_CONTEXT_PRIORITY 6 | 56 | #define DRM_IVPU_PARAM_CONTEXT_PRIORITY 6 /* Deprecated */ |
| 57 | #define DRM_IVPU_PARAM_CONTEXT_ID 7 | 57 | #define DRM_IVPU_PARAM_CONTEXT_ID 7 |
| 58 | #define DRM_IVPU_PARAM_FW_API_VERSION 8 | 58 | #define DRM_IVPU_PARAM_FW_API_VERSION 8 |
| 59 | #define DRM_IVPU_PARAM_ENGINE_HEARTBEAT 9 | 59 | #define DRM_IVPU_PARAM_ENGINE_HEARTBEAT 9 |
| @@ -64,11 +64,18 @@ extern "C" { · 4 unmodified lines | |||
| 64 | 64 | ||
| 65 | #define DRM_IVPU_PLATFORM_TYPE_SILICON 0 | 65 | #define DRM_IVPU_PLATFORM_TYPE_SILICON 0 |
| 66 | 66 | ||
| 67 | /* Deprecated, use DRM_IVPU_JOB_PRIORITY */ | ||
| 67 | #define DRM_IVPU_CONTEXT_PRIORITY_IDLE 0 | 68 | #define DRM_IVPU_CONTEXT_PRIORITY_IDLE 0 |
| 68 | #define DRM_IVPU_CONTEXT_PRIORITY_NORMAL 1 | 69 | #define DRM_IVPU_CONTEXT_PRIORITY_NORMAL 1 |
| 69 | #define DRM_IVPU_CONTEXT_PRIORITY_FOCUS 2 | 70 | #define DRM_IVPU_CONTEXT_PRIORITY_FOCUS 2 |
| 70 | #define DRM_IVPU_CONTEXT_PRIORITY_REALTIME 3 | 71 | #define DRM_IVPU_CONTEXT_PRIORITY_REALTIME 3 |
| 71 | 72 | ||
| 73 | #define DRM_IVPU_JOB_PRIORITY_DEFAULT 0 | ||
| 74 | #define DRM_IVPU_JOB_PRIORITY_IDLE 1 | ||
| 75 | #define DRM_IVPU_JOB_PRIORITY_NORMAL 2 | ||
| 76 | #define DRM_IVPU_JOB_PRIORITY_FOCUS 3 | ||
| 77 | #define DRM_IVPU_JOB_PRIORITY_REALTIME 4 | ||
| 78 | |||
| 72 | /** | 79 | /** |
| 73 | * DRM_IVPU_CAP_METRIC_STREAMER | 80 | * DRM_IVPU_CAP_METRIC_STREAMER |
| 74 | * | 81 | * |
| @@ -112,10 +119,6 @@ struct drm_ivpu_param { · 37 unmodified lines | |||
| 112 | * %DRM_IVPU_PARAM_CONTEXT_BASE_ADDRESS: | 119 | * %DRM_IVPU_PARAM_CONTEXT_BASE_ADDRESS: |
| 113 | * Lowest VPU virtual address available in the current context (read-only) | 120 | * Lowest VPU virtual address available in the current context (read-only) |
| 114 | * | 121 | * |
| 115 | * %DRM_IVPU_PARAM_CONTEXT_PRIORITY: | ||
| 116 | * Value of current context scheduling priority (read-write). | ||
| 117 | * See DRM_IVPU_CONTEXT_PRIORITY_* for possible values. | ||
| 118 | * | ||
| 119 | * %DRM_IVPU_PARAM_CONTEXT_ID: | 122 | * %DRM_IVPU_PARAM_CONTEXT_ID: |
| 120 | * Current context ID, always greater than 0 (read-only) | 123 | * Current context ID, always greater than 0 (read-only) |
| 121 | * | 124 | * |
| @@ -286,6 +289,18 @@ struct drm_ivpu_submit { · 164 unmodified lines | |||
| 286 | * to be executed. The offset has to be 8-byte aligned. | 289 | * to be executed. The offset has to be 8-byte aligned. |
| 287 | */ | 290 | */ |
| 288 | __u32 commands_offset; | 291 | __u32 commands_offset; |
| 292 | |||
| 293 | /** | ||
| 294 | * @priority: | ||
| 295 | * | ||
| 296 | * Priority to be set for related job command queue, can be one of the following: | ||
| 297 | * %DRM_IVPU_JOB_PRIORITY_DEFAULT | ||
| 298 | * %DRM_IVPU_JOB_PRIORITY_IDLE | ||
| 299 | * %DRM_IVPU_JOB_PRIORITY_NORMAL | ||
| 300 | * %DRM_IVPU_JOB_PRIORITY_FOCUS | ||
| 301 | * %DRM_IVPU_JOB_PRIORITY_REALTIME | ||
| 302 | */ | ||
| 303 | __u32 priority; | ||
| 289 | }; | 304 | }; |
| 290 | 305 | ||
| 291 | /* drm_ivpu_bo_wait job status codes */ | 306 | /* drm_ivpu_bo_wait job status codes */ |
| @@ -238,34 +238,32 @@ struct drm_nouveau_vm_init { · 237 unmodified lines | |||
| 238 | struct drm_nouveau_vm_bind_op { | 238 | struct drm_nouveau_vm_bind_op { |
| 239 | /** | 239 | /** |
| 240 | * @op: the operation type | 240 | * @op: the operation type |
| 241 | * | ||
| 242 | * Supported values: | ||
| 243 | * | ||
| 244 | * %DRM_NOUVEAU_VM_BIND_OP_MAP - Map a GEM object to the GPU's VA | ||
| 245 | * space. Optionally, the &DRM_NOUVEAU_VM_BIND_SPARSE flag can be | ||
| 246 | * passed to instruct the kernel to create sparse mappings for the | ||
| 247 | * given range. | ||
| 248 | * | ||
| 249 | * %DRM_NOUVEAU_VM_BIND_OP_UNMAP - Unmap an existing mapping in the | ||
| 250 | * GPU's VA space. If the region the mapping is located in is a | ||
| 251 | * sparse region, new sparse mappings are created where the unmapped | ||
| 252 | * (memory backed) mapping was mapped previously. To remove a sparse | ||
| 253 | * region the &DRM_NOUVEAU_VM_BIND_SPARSE must be set. | ||
| 241 | */ | 254 | */ |
| 242 | __u32 op; | 255 | __u32 op; |
| 243 | /** | ||
| 244 | * @DRM_NOUVEAU_VM_BIND_OP_MAP: | ||
| 245 | * | ||
| 246 | * Map a GEM object to the GPU's VA space. Optionally, the | ||
| 247 | * &DRM_NOUVEAU_VM_BIND_SPARSE flag can be passed to instruct the kernel to | ||
| 248 | * create sparse mappings for the given range. | ||
| 249 | */ | ||
| 250 | #define DRM_NOUVEAU_VM_BIND_OP_MAP 0x0 | 256 | #define DRM_NOUVEAU_VM_BIND_OP_MAP 0x0 |
| 251 | /** | ||
| 252 | * @DRM_NOUVEAU_VM_BIND_OP_UNMAP: | ||
| 253 | * | ||
| 254 | * Unmap an existing mapping in the GPU's VA space. If the region the mapping | ||
| 255 | * is located in is a sparse region, new sparse mappings are created where the | ||
| 256 | * unmapped (memory backed) mapping was mapped previously. To remove a sparse | ||
| 257 | * region the &DRM_NOUVEAU_VM_BIND_SPARSE must be set. | ||
| 258 | */ | ||
| 259 | #define DRM_NOUVEAU_VM_BIND_OP_UNMAP 0x1 | 257 | #define DRM_NOUVEAU_VM_BIND_OP_UNMAP 0x1 |
| 260 | /** | 258 | /** |
| 261 | * @flags: the flags for a &drm_nouveau_vm_bind_op | 259 | * @flags: the flags for a &drm_nouveau_vm_bind_op |
| 260 | * | ||
| 261 | * Supported values: | ||
| 262 | * | ||
| 263 | * %DRM_NOUVEAU_VM_BIND_SPARSE - Indicates that an allocated VA | ||
| 264 | * space region should be sparse. | ||
| 262 | */ | 265 | */ |
| 263 | __u32 flags; | 266 | __u32 flags; |
| 264 | /** | ||
| 265 | * @DRM_NOUVEAU_VM_BIND_SPARSE: | ||
| 266 | * | ||
| 267 | * Indicates that an allocated VA space region should be sparse. | ||
| 268 | */ | ||
| 269 | #define DRM_NOUVEAU_VM_BIND_SPARSE (1 << 8) | 267 | #define DRM_NOUVEAU_VM_BIND_SPARSE (1 << 8) |
| 270 | /** | 268 | /** |
| 271 | * @handle: the handle of the DRM GEM object to map | 269 | * @handle: the handle of the DRM GEM object to map |
| @@ -301,17 +299,17 @@ struct drm_nouveau_vm_bind { · 29 unmodified lines | |||
| 301 | __u32 op_count; | 299 | __u32 op_count; |
| 302 | /** | 300 | /** |
| 303 | * @flags: the flags for a &drm_nouveau_vm_bind ioctl | 301 | * @flags: the flags for a &drm_nouveau_vm_bind ioctl |
| 302 | * | ||
| 303 | * Supported values: | ||
| 304 | * | ||
| 305 | * %DRM_NOUVEAU_VM_BIND_RUN_ASYNC - Indicates that the given VM_BIND | ||
| 306 | * operation should be executed asynchronously by the kernel. | ||
| 307 | * | ||
| 308 | * If this flag is not supplied the kernel executes the associated | ||
| 309 | * operations synchronously and doesn't accept any &drm_nouveau_sync | ||
| 310 | * objects. | ||
| 304 | */ | 311 | */ |
| 305 | __u32 flags; | 312 | __u32 flags; |
| 306 | /** | ||
| 307 | * @DRM_NOUVEAU_VM_BIND_RUN_ASYNC: | ||
| 308 | * | ||
| 309 | * Indicates that the given VM_BIND operation should be executed asynchronously | ||
| 310 | * by the kernel. | ||
| 311 | * | ||
| 312 | * If this flag is not supplied the kernel executes the associated operations | ||
| 313 | * synchronously and doesn't accept any &drm_nouveau_sync objects. | ||
| 314 | */ | ||
| 315 | #define DRM_NOUVEAU_VM_BIND_RUN_ASYNC 0x1 | 313 | #define DRM_NOUVEAU_VM_BIND_RUN_ASYNC 0x1 |
| 316 | /** | 314 | /** |
| 317 | * @wait_count: the number of wait &drm_nouveau_syncs | 315 | * @wait_count: the number of wait &drm_nouveau_syncs |
| @@ -242,18 +242,7 @@ struct qaic_attach_slice_entry { · 241 unmodified lines | |||
| 242 | * @dbc_id: In. Associate the sliced BO with this DBC. | 242 | * @dbc_id: In. Associate the sliced BO with this DBC. |
| 243 | * @handle: In. GEM handle of the BO to slice. | 243 | * @handle: In. GEM handle of the BO to slice. |
| 244 | * @dir: In. Direction of data flow. 1 = DMA_TO_DEVICE, 2 = DMA_FROM_DEVICE | 244 | * @dir: In. Direction of data flow. 1 = DMA_TO_DEVICE, 2 = DMA_FROM_DEVICE |
| 245 | * @size: In. Total length of BO being used. This should not exceed base | 245 | * @size: Deprecated. This value is ignored and size of @handle is used instead. |
| 246 | * size of BO (struct drm_gem_object.base) | ||
| 247 | * For BOs being allocated using DRM_IOCTL_QAIC_CREATE_BO, size of | ||
| 248 | * BO requested is PAGE_SIZE aligned then allocated hence allocated | ||
| 249 | * BO size maybe bigger. This size should not exceed the new | ||
| 250 | * PAGE_SIZE aligned BO size. | ||
| 251 | * @dev_addr: In. Device address this slice pushes to or pulls from. | ||
| 252 | * @db_addr: In. Address of the doorbell to ring. | ||
| 253 | * @db_data: In. Data to write to the doorbell. | ||
| 254 | * @db_len: In. Size of the doorbell data in bits - 32, 16, or 8. 0 is for | ||
| 255 | * inactive doorbells. | ||
| 256 | * @offset: In. Start of this slice as an offset from the start of the BO. | ||
| 257 | */ | 246 | */ |
| 258 | struct qaic_attach_slice_hdr { | 247 | struct qaic_attach_slice_hdr { |
| 259 | __u32 count; | 248 | __u32 count; |
| @@ -1,6 +1,7 @@ | |||
| 1 | /* SPDX-License-Identifier: (GPL-2.0 WITH Linux-syscall-note) OR MIT */ | ||
| 1 | /************************************************************************** | 2 | /************************************************************************** |
| 2 | * | 3 | * |
| 3 | * Copyright © 2009-2022 VMware, Inc., Palo Alto, CA., USA | 4 | * Copyright © 2009-2023 VMware, Inc., Palo Alto, CA., USA |
| 4 | * All Rights Reserved. | 5 | * All Rights Reserved. |
| 5 | * | 6 | * |
| 6 | * Permission is hereby granted, free of charge, to any person obtaining a | 7 | * Permission is hereby granted, free of charge, to any person obtaining a |
| @@ -902,7 +903,8 @@ struct drm_vmw_shader_arg { · 895 unmodified lines | |||
| 902 | /** | 903 | /** |
| 903 | * enum drm_vmw_surface_flags | 904 | * enum drm_vmw_surface_flags |
| 904 | * | 905 | * |
| 905 | * @drm_vmw_surface_flag_shareable: Whether the surface is shareable | 906 | * @drm_vmw_surface_flag_shareable: Deprecated - all userspace surfaces are |
| 907 | * shareable. | ||
| 906 | * @drm_vmw_surface_flag_scanout: Whether the surface is a scanout | 908 | * @drm_vmw_surface_flag_scanout: Whether the surface is a scanout |
| 907 | * surface. | 909 | * surface. |
| 908 | * @drm_vmw_surface_flag_create_buffer: Create a backup buffer if none is | 910 | * @drm_vmw_surface_flag_create_buffer: Create a backup buffer if none is |