perf: Pass last sampling period to perf_sample_data_init()

We always need to pass the last sample period to perf_sample_data_init(), otherwise the event distribution will be wrong. Thus, modifiyng the function interface with the required period as argument. So basically a pattern like this: perf_sample_data_init(&data, ~0ULL); data.period = event->hw.last_period; will now be like that: perf_sample_data_init(&data, ~0ULL, event->hw.last_period); Avoids unininitialized data.period and simplifies code.

Robert Richter committed 14 years ago

Commit fd0d0001 parent c75841a15 files · +25 −43Browse files

Unified · Split

15 files

arch/alpha/kernel/perf_event.c +1 −2
arch/arm/kernel/perf_event_v6.c +1 −3
arch/arm/kernel/perf_event_v7.c +1 −3
arch/arm/kernel/perf_event_xscale.c +2 −6
arch/mips/kernel/perf_event_mipsxx.c +1 −1
arch/powerpc/perf/core-book3s.c +1 −2
arch/powerpc/perf/core-fsl-emb.c +1 −2
arch/sparc/kernel/perf_event.c +1 −3
arch/x86/kernel/cpu/perf_event.c +1 −3
arch/x86/kernel/cpu/perf_event_amd_ibs.c +1 −2
arch/x86/kernel/cpu/perf_event_intel.c +1 −3
arch/x86/kernel/cpu/perf_event_intel_ds.c +2 −4
arch/x86/kernel/cpu/perf_event_p4.c +3 −3
include/linux/perf_event.h +4 −1
kernel/events/core.c +4 −5

arch/alpha/kernel/perf_event.c+1−2

@@ -824,7 +824,6 @@ static void alpha_perf_event_irq_handler(unsigned long la_ptr, · 823 unmodified lines
824	824
825	825	idx = la_ptr;
826	826
827		− perf_sample_data_init(&data, 0);
828	827	for (j = 0; j < cpuc->n_events; j++) {
829	828	if (cpuc->current_idx[j] == idx)
830	829	break;
@@ -848,7 +847,7 @@ static void alpha_perf_event_irq_handler(unsigned long la_ptr, · 17 unmodified lines
848	847
849	848	hwc = &event->hw;
850	849	alpha_perf_event_update(event, hwc, idx, alpha_pmu->pmc_max_period[idx]+1);
851		− data.period = event->hw.last_period;
	850	+ perf_sample_data_init(&data, 0, hwc->last_period);
852	851
853	852	if (alpha_perf_event_set_period(event, hwc, idx)) {
854	853	if (perf_event_overflow(event, &data, regs)) {

arch/arm/kernel/perf_event_v6.c+1−3

@@ -489,8 +489,6 @@ armv6pmu_handle_irq(int irq_num, · 488 unmodified lines
489	489	*/
490	490	armv6_pmcr_write(pmcr);
491	491
492		− perf_sample_data_init(&data, 0);
493		−
494	492	cpuc = &__get_cpu_var(cpu_hw_events);
495	493	for (idx = 0; idx < cpu_pmu->num_events; ++idx) {
496	494	struct perf_event *event = cpuc->events[idx];
@@ -509,7 +507,7 @@ armv6pmu_handle_irq(int irq_num, · 12 unmodified lines
509	507
510	508	hwc = &event->hw;
511	509	armpmu_event_update(event, hwc, idx);
512		− data.period = event->hw.last_period;
	510	+ perf_sample_data_init(&data, 0, hwc->last_period);
513	511	if (!armpmu_event_set_period(event, hwc, idx))
514	512	continue;
515	513

arch/arm/kernel/perf_event_v7.c+1−3

@@ -1077,8 +1077,6 @@ static irqreturn_t armv7pmu_handle_irq(int irq_num, void *dev) · 1076 unmodified lines
1077	1077	*/
1078	1078	regs = get_irq_regs();
1079	1079
1080		− perf_sample_data_init(&data, 0);
1081		−
1082	1080	cpuc = &__get_cpu_var(cpu_hw_events);
1083	1081	for (idx = 0; idx < cpu_pmu->num_events; ++idx) {
1084	1082	struct perf_event *event = cpuc->events[idx];
@@ -1097,7 +1095,7 @@ static irqreturn_t armv7pmu_handle_irq(int irq_num, void *dev) · 12 unmodified lines
1097	1095
1098	1096	hwc = &event->hw;
1099	1097	armpmu_event_update(event, hwc, idx);
1100		− data.period = event->hw.last_period;
	1098	+ perf_sample_data_init(&data, 0, hwc->last_period);
1101	1099	if (!armpmu_event_set_period(event, hwc, idx))
1102	1100	continue;
1103	1101

arch/arm/kernel/perf_event_xscale.c+2−6

@@ -248,8 +248,6 @@ xscale1pmu_handle_irq(int irq_num, void *dev) · 247 unmodified lines
248	248
249	249	regs = get_irq_regs();
250	250
251		− perf_sample_data_init(&data, 0);
252		−
253	251	cpuc = &__get_cpu_var(cpu_hw_events);
254	252	for (idx = 0; idx < cpu_pmu->num_events; ++idx) {
255	253	struct perf_event *event = cpuc->events[idx];
@@ -263,7 +261,7 @@ xscale1pmu_handle_irq(int irq_num, void *dev) · 7 unmodified lines
263	261
264	262	hwc = &event->hw;
265	263	armpmu_event_update(event, hwc, idx);
266		− data.period = event->hw.last_period;
	264	+ perf_sample_data_init(&data, 0, hwc->last_period);
267	265	if (!armpmu_event_set_period(event, hwc, idx))
268	266	continue;
269	267
@@ -588,8 +586,6 @@ xscale2pmu_handle_irq(int irq_num, void *dev) · 318 unmodified lines
588	586
589	587	regs = get_irq_regs();
590	588
591		− perf_sample_data_init(&data, 0);
592		−
593	589	cpuc = &__get_cpu_var(cpu_hw_events);
594	590	for (idx = 0; idx < cpu_pmu->num_events; ++idx) {
595	591	struct perf_event *event = cpuc->events[idx];
@@ -603,7 +599,7 @@ xscale2pmu_handle_irq(int irq_num, void *dev) · 7 unmodified lines
603	599
604	600	hwc = &event->hw;
605	601	armpmu_event_update(event, hwc, idx);
606		− data.period = event->hw.last_period;
	602	+ perf_sample_data_init(&data, 0, hwc->last_period);
607	603	if (!armpmu_event_set_period(event, hwc, idx))
608	604	continue;
609	605

arch/mips/kernel/perf_event_mipsxx.c+1−1

@@ -1325,7 +1325,7 @@ static int mipsxx_pmu_handle_shared_irq(void) · 1324 unmodified lines
1325	1325
1326	1326	regs = get_irq_regs();
1327	1327
1328		− perf_sample_data_init(&data, 0);
	1328	+ perf_sample_data_init(&data, 0, 0);
1329	1329
1330	1330	switch (counters) {
1331	1331	#define HANDLE_COUNTER(n) \

arch/powerpc/perf/core-book3s.c+1−2

@@ -1299,8 +1299,7 @@ static void record_and_restart(struct perf_event *event, unsigned long val, · 1298 unmodified lines
1299	1299	if (record) {
1300	1300	struct perf_sample_data data;
1301	1301
1302		− perf_sample_data_init(&data, ~0ULL);
1303		− data.period = event->hw.last_period;
	1302	+ perf_sample_data_init(&data, ~0ULL, event->hw.last_period);
1304	1303
1305	1304	if (event->attr.sample_type & PERF_SAMPLE_ADDR)
1306	1305	perf_get_data_addr(regs, &data.addr);

arch/powerpc/perf/core-fsl-emb.c+1−2

@@ -613,8 +613,7 @@ static void record_and_restart(struct perf_event *event, unsigned long val, · 612 unmodified lines
613	613	if (record) {
614	614	struct perf_sample_data data;
615	615
616		− perf_sample_data_init(&data, 0);
617		− data.period = event->hw.last_period;
	616	+ perf_sample_data_init(&data, 0, event->hw.last_period);
618	617
619	618	if (perf_event_overflow(event, &data, regs))
620	619	fsl_emb_pmu_stop(event, 0);

arch/sparc/kernel/perf_event.c+1−3

@@ -1296,8 +1296,6 @@ static int __kprobes perf_event_nmi_handler(struct notifier_block *self, · 1295 unmodified lines
1296	1296
1297	1297	regs = args->regs;
1298	1298
1299		− perf_sample_data_init(&data, 0);
1300		−
1301	1299	cpuc = &__get_cpu_var(cpu_hw_events);
1302	1300
1303	1301	/* If the PMU has the TOE IRQ enable bits, we need to do a
@@ -1321,7 +1319,7 @@ static int __kprobes perf_event_nmi_handler(struct notifier_block *self, · 17 unmodified lines
1321	1319	if (val & (1ULL << 31))
1322	1320	continue;
1323	1321
1324		− data.period = event->hw.last_period;
	1322	+ perf_sample_data_init(&data, 0, hwc->last_period);
1325	1323	if (!sparc_perf_event_set_period(event, hwc, idx))
1326	1324	continue;
1327	1325

arch/x86/kernel/cpu/perf_event.c+1−3

@@ -1183,8 +1183,6 @@ int x86_pmu_handle_irq(struct pt_regs *regs) · 1182 unmodified lines
1183	1183	int idx, handled = 0;
1184	1184	u64 val;
1185	1185
1186		− perf_sample_data_init(&data, 0);
1187		−
1188	1186	cpuc = &__get_cpu_var(cpu_hw_events);
1189	1187
1190	1188	/*
@@ -1219,7 +1217,7 @@ int x86_pmu_handle_irq(struct pt_regs *regs) · 28 unmodified lines
1219	1217	* event overflow
1220	1218	*/
1221	1219	handled++;
1222		− data.period = event->hw.last_period;
	1220	+ perf_sample_data_init(&data, 0, event->hw.last_period);
1223	1221
1224	1222	if (!x86_perf_event_set_period(event))
1225	1223	continue;

arch/x86/kernel/cpu/perf_event_amd_ibs.c+1−2

@@ -398,8 +398,7 @@ static int perf_ibs_handle_irq(struct perf_ibs perf_ibs, struct pt_regs iregs) · 397 unmodified lines
398	398	}
399	399
400	400	perf_ibs_event_update(perf_ibs, event, config);
401		− perf_sample_data_init(&data, 0);
402		− data.period = event->hw.last_period;
	401	+ perf_sample_data_init(&data, 0, hwc->last_period);
403	402
404	403	if (event->attr.sample_type & PERF_SAMPLE_RAW) {
405	404	ibs_data.caps = ibs_caps;

arch/x86/kernel/cpu/perf_event_intel.c+1−3

@@ -1027,8 +1027,6 @@ static int intel_pmu_handle_irq(struct pt_regs *regs) · 1026 unmodified lines
1027	1027	u64 status;
1028	1028	int handled;
1029	1029
1030		− perf_sample_data_init(&data, 0);
1031		−
1032	1030	cpuc = &__get_cpu_var(cpu_hw_events);
1033	1031
1034	1032	/*
@@ -1082,7 +1080,7 @@ again: · 47 unmodified lines
1082	1080	if (!intel_pmu_save_and_restart(event))
1083	1081	continue;
1084	1082
1085		− data.period = event->hw.last_period;
	1083	+ perf_sample_data_init(&data, 0, event->hw.last_period);
1086	1084
1087	1085	if (has_branch_stack(event))
1088	1086	data.br_stack = &cpuc->lbr_stack;

arch/x86/kernel/cpu/perf_event_intel_ds.c+2−4

@@ -316,8 +316,7 @@ int intel_pmu_drain_bts_buffer(void) · 315 unmodified lines
316	316
317	317	ds->bts_index = ds->bts_buffer_base;
318	318
319		− perf_sample_data_init(&data, 0);
320		− data.period = event->hw.last_period;
	319	+ perf_sample_data_init(&data, 0, event->hw.last_period);
321	320	regs.ip = 0;
322	321
323	322	/*
@@ -564,8 +563,7 @@ static void __intel_pmu_pebs_event(struct perf_event *event, · 240 unmodified lines
564	563	if (!intel_pmu_save_and_restart(event))
565	564	return;
566	565
567		− perf_sample_data_init(&data, 0);
568		− data.period = event->hw.last_period;
	566	+ perf_sample_data_init(&data, 0, event->hw.last_period);
569	567
570	568	/*
571	569	* We use the interrupt regs as a base because the PEBS record

arch/x86/kernel/cpu/perf_event_p4.c+3−3

@@ -1005,8 +1005,6 @@ static int p4_pmu_handle_irq(struct pt_regs *regs) · 1004 unmodified lines
1005	1005	int idx, handled = 0;
1006	1006	u64 val;
1007	1007
1008		− perf_sample_data_init(&data, 0);
1009		−
1010	1008	cpuc = &__get_cpu_var(cpu_hw_events);
1011	1009
1012	1010	for (idx = 0; idx < x86_pmu.num_counters; idx++) {
@@ -1034,10 +1032,12 @@ static int p4_pmu_handle_irq(struct pt_regs *regs) · 21 unmodified lines
1034	1032	handled += overflow;
1035	1033
1036	1034	/* event overflow for sure */
1037		− data.period = event->hw.last_period;
	1035	+ perf_sample_data_init(&data, 0, hwc->last_period);
1038	1036
1039	1037	if (!x86_perf_event_set_period(event))
1040	1038	continue;
	1039	+
	1040	+
1041	1041	if (perf_event_overflow(event, &data, regs))
1042	1042	x86_pmu_stop(event, 0);
1043	1043	}

include/linux/perf_event.h+4−1

@@ -1132,11 +1132,14 @@ struct perf_sample_data { · 1131 unmodified lines
1132	1132	struct perf_branch_stack *br_stack;
1133	1133	};
1134	1134
1135		−static inline void perf_sample_data_init(struct perf_sample_data *data, u64 addr)
	1135	+static inline void perf_sample_data_init(struct perf_sample_data *data,
	1136	+ u64 addr, u64 period)
1136	1137	{
	1138	+ /* remaining struct members initialized in perf_prepare_sample() */
1137	1139	data->addr = addr;
1138	1140	data->raw = NULL;
1139	1141	data->br_stack = NULL;
	1142	+ data->period = period;
1140	1143	}
1141	1144
1142	1145	extern void perf_output_sample(struct perf_output_handle *handle,

kernel/events/core.c+4−5

@@ -4957,7 +4957,7 @@ void __perf_sw_event(u32 event_id, u64 nr, struct pt_regs *regs, u64 addr) · 4956 unmodified lines
4957	4957	if (rctx < 0)
4958	4958	return;
4959	4959
4960		− perf_sample_data_init(&data, addr);
	4960	+ perf_sample_data_init(&data, addr, 0);
4961	4961
4962	4962	do_perf_sw_event(PERF_TYPE_SOFTWARE, event_id, nr, &data, regs);
4963	4963
@@ -5215,7 +5215,7 @@ void perf_tp_event(u64 addr, u64 count, void *record, int entry_size, · 251 unmodified lines
5215	5215	.data = record,
5216	5216	};
5217	5217
5218		− perf_sample_data_init(&data, addr);
	5218	+ perf_sample_data_init(&data, addr, 0);
5219	5219	data.raw = &raw;
5220	5220
5221	5221	hlist_for_each_entry_rcu(event, node, head, hlist_entry) {
@@ -5318,7 +5318,7 @@ void perf_bp_event(struct perf_event bp, void data) · 96 unmodified lines
5318	5318	struct perf_sample_data sample;
5319	5319	struct pt_regs *regs = data;
5320	5320
5321		− perf_sample_data_init(&sample, bp->attr.bp_addr);
	5321	+ perf_sample_data_init(&sample, bp->attr.bp_addr, 0);
5322	5322
5323	5323	if (!bp->hw.state && !perf_exclude_event(bp, regs))
5324	5324	perf_swevent_event(bp, 1, &sample, regs);
@@ -5344,8 +5344,7 @@ static enum hrtimer_restart perf_swevent_hrtimer(struct hrtimer *hrtimer) · 19 unmodified lines
5344	5344
5345	5345	event->pmu->read(event);
5346	5346
5347		− perf_sample_data_init(&data, 0);
5348		− data.period = event->hw.last_period;
	5347	+ perf_sample_data_init(&data, 0, event->hw.last_period);
5349	5348	regs = get_irq_regs();
5350	5349
5351	5350	if (regs && !perf_exclude_event(event, regs)) {