History

Merge tag 'powerpc-4.3-1' of git://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux

Pull powerpc updates from Michael Ellerman: - support "hybrid" iommu/direct DMA ops for coherent_mask < dma_mask from Benjamin Herrenschmidt - EEH fixes for SRIOV from Gavin - introduce rtas_get_sensor_fast() for IRQ handlers from Thomas Huth - use hardware RNG for arch_get_random_seed_* not arch_get_random_* from Paul Mackerras - seccomp filter support from Michael Ellerman - opal_cec_reboot2() handling for HMIs & machine checks from Mahesh Salgaonkar - add powerpc timebase as a trace clock source from Naveen N. Rao - misc cleanups in the xmon, signal & SLB code from Anshuman Khandual - add an inline function to update POWER8 HID0 from Gautham R. Shenoy - fix pte_pagesize_index() crash on 4K w/64K hash from Michael Ellerman - drop support for 64K local store on 4K kernels from Michael Ellerman - move dma_get_required_mask() from pnv_phb to pci_controller_ops from Andrew Donnellan - initialize distance lookup table from drconf path from Nikunj A Dadhania - enable RTC class support from Vaibhav Jain - disable automatically blocked PCI config from Gavin Shan - add LEDs driver for PowerNV platform from Vasant Hegde - fix endianness issues in the HVSI driver from Laurent Dufour - kexec endian fixes from Samuel Mendoza-Jonas - fix corrupted pdn list from Gavin Shan - fix fenced PHB caused by eeh_slot_error_detail() from Gavin Shan - Freescale updates from Scott: Highlights include 32-bit memcpy/memset optimizations, checksum optimizations, 85xx config fragments and updates, device tree updates, e6500 fixes for non-SMP, and misc cleanup and minor fixes. - a ton of cxl updates & fixes: - add explicit precision specifiers from Rasmus Villemoes - use more common format specifier from Rasmus Villemoes - destroy cxl_adapter_idr on module_exit from Johannes Thumshirn - destroy afu->contexts_idr on release of an afu from Johannes Thumshirn - compile with -Werror from Daniel Axtens - EEH support from Daniel Axtens - plug irq_bitmap getting leaked in cxl_context from Vaibhav Jain - add alternate MMIO error handling from Ian Munsie - allow release of contexts which have been OPENED but not STARTED from Andrew Donnellan - remove use of macro DEFINE_PCI_DEVICE_TABLE from Vaishali Thakkar - release irqs if memory allocation fails from Vaibhav Jain - remove racy attempt to force EEH invocation in reset from Daniel Axtens - fix + cleanup error paths in cxl_dev_context_init from Ian Munsie - fix force unmapping mmaps of contexts allocated through the kernel api from Ian Munsie - set up and enable PSL Timebase from Philippe Bergheaud * tag 'powerpc-4.3-1' of git://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux: (140 commits) cxl: Set up and enable PSL Timebase cxl: Fix force unmapping mmaps of contexts allocated through the kernel api cxl: Fix + cleanup error paths in cxl_dev_context_init powerpc/eeh: Fix fenced PHB caused by eeh_slot_error_detail() powerpc/pseries: Cleanup on pci_dn_reconfig_notifier() powerpc/pseries: Fix corrupted pdn list powerpc/powernv: Enable LEDS support powerpc/iommu: Set default DMA offset in dma_dev_setup cxl: Remove racy attempt to force EEH invocation in reset cxl: Release irqs if memory allocation fails cxl: Remove use of macro DEFINE_PCI_DEVICE_TABLE powerpc/powernv: Fix mis-merge of OPAL support for LEDS driver powerpc/powernv: Reset HILE before kexec_sequence() powerpc/kexec: Reset secondary cpu endianness before kexec powerpc/hvsi: Fix endianness issues in the HVSI driver leds/powernv: Add driver for PowerNV platform powerpc/powernv: Create LED platform device powerpc/powernv: Add OPAL interfaces for accessing and modifying system LED states powerpc/powernv: Fix the log message when disabling VF cxl: Allow release of contexts which have been OPENED but not STARTED ...

Linus Torvalds committed 11 years ago

Commit ff474e82 parents 4c92b5b 390fd59146 files · +3560 −1998Browse files

Unified · Split

146 files
  1. Documentation/ABI/testing/sysfs-class-cxl +10 −0
  2. Documentation/devicetree/bindings/leds/leds-powernv.txt +26 −0
  3. Documentation/devicetree/bindings/memory-controllers/fsl/ifc.txt +3 −0
  4. Documentation/devicetree/bindings/powerpc/fsl/scfg.txt +18 −0
  5. Documentation/trace/ftrace.txt +5 −0
  6. arch/powerpc/Kconfig +11 −11
  7. arch/powerpc/Makefile +20 −0
  8. arch/powerpc/boot/dts/fsl/p1022si-post.dtsi +1 −1
  9. arch/powerpc/boot/dts/fsl/p1022si-pre.dtsi +2 −0
  10. arch/powerpc/boot/dts/fsl/t1040si-post.dtsi +5 −0
  11. arch/powerpc/boot/dts/t1023rdb.dts +12 −1
  12. arch/powerpc/boot/dts/t1024rdb.dts +6 −0
  13. arch/powerpc/boot/dts/t1040d4rdb.dts +46 −0
  14. arch/powerpc/boot/dts/t1042d4rdb.dts +53 −0
  15. arch/powerpc/boot/dts/t104xd4rdb.dtsi +205 −0
  16. arch/powerpc/configs/85xx-32bit.config +5 −0
  17. arch/powerpc/configs/85xx-64bit.config +4 −0
  18. arch/powerpc/configs/85xx-hw.config +142 −0
  19. arch/powerpc/configs/85xx-smp.config +2 −0
  20. arch/powerpc/configs/altivec.config +1 −0
  21. arch/powerpc/configs/corenet32_smp_defconfig +0 −185
  22. arch/powerpc/configs/corenet_basic_defconfig +1 −0
  23. arch/powerpc/configs/fsl-emb-nonhw.config +107 −157
  24. arch/powerpc/configs/mpc85xx_basic_defconfig +23 −0
  25. arch/powerpc/configs/mpc85xx_defconfig +0 −252
  26. arch/powerpc/configs/mpc85xx_smp_defconfig +0 −244
  27. arch/powerpc/configs/ppc64_defconfig +3 −0
  28. arch/powerpc/configs/pseries_defconfig +5 −1
  29. arch/powerpc/include/asm/Kbuild +0 −1
  30. arch/powerpc/include/asm/archrandom.h +14 −14
  31. arch/powerpc/include/asm/cacheflush.h +6 −1
  32. arch/powerpc/include/asm/checksum.h +28 −9
  33. arch/powerpc/include/asm/compat.h +7 −0
  34. arch/powerpc/include/asm/device.h +9 −6
  35. arch/powerpc/include/asm/dma-mapping.h +7 −7
  36. arch/powerpc/include/asm/iommu.h +25 −6
  37. arch/powerpc/include/asm/machdep.h +1 −1
  38. arch/powerpc/include/asm/opal-api.h +123 −1
  39. arch/powerpc/include/asm/opal.h +7 −1
  40. arch/powerpc/include/asm/pci-bridge.h +1 −0
  41. arch/powerpc/include/asm/pgtable-ppc64.h +4 −4
  42. arch/powerpc/include/asm/pgtable.h +11 −0
  43. arch/powerpc/include/asm/ppc-pci.h +1 −0
  44. arch/powerpc/include/asm/processor.h +0 −1
  45. arch/powerpc/include/asm/pte-common.h +2 −1
  46. arch/powerpc/include/asm/reg.h +10 −2
  47. arch/powerpc/include/asm/rtas.h +1 −0
  48. arch/powerpc/include/asm/spu_csa.h +0 −6
  49. arch/powerpc/include/asm/syscall.h +33 −21
  50. arch/powerpc/include/asm/trace_clock.h +19 −0
  51. arch/powerpc/include/uapi/asm/Kbuild +1 −0
  52. arch/powerpc/include/uapi/asm/errno.h +0 −2
  53. arch/powerpc/include/uapi/asm/sigcontext.h +2 −2
  54. arch/powerpc/kernel/Makefile +1 −0
  55. arch/powerpc/kernel/asm-offsets.c +0 −1
  56. arch/powerpc/kernel/dma-iommu.c +1 −1
  57. arch/powerpc/kernel/dma-swiotlb.c +2 −2
  58. arch/powerpc/kernel/dma.c +100 −18
  59. arch/powerpc/kernel/eeh.c +23 −8
  60. arch/powerpc/kernel/eeh_pe.c +22 −0
  61. arch/powerpc/kernel/entry_32.S +6 −1
  62. arch/powerpc/kernel/entry_64.S +20 −8
  63. arch/powerpc/kernel/exceptions-64e.S +8 −5
  64. arch/powerpc/kernel/fsl_booke_entry_mapping.S +9 −6
  65. arch/powerpc/kernel/kvm.c +0 −1
  66. arch/powerpc/kernel/misc_64.S +11 −2
  67. arch/powerpc/kernel/nvram_64.c +5 −5
  68. arch/powerpc/kernel/pci-common.c +18 −54
  69. arch/powerpc/kernel/process.c +7 −7
  70. arch/powerpc/kernel/prom.c +11 −14
  71. arch/powerpc/kernel/prom_init.c +17 −8
  72. arch/powerpc/kernel/ptrace.c +77 −12
  73. arch/powerpc/kernel/rtas.c +22 −3
  74. arch/powerpc/kernel/signal_32.c +5 −0
  75. arch/powerpc/kernel/signal_64.c +16 −5
  76. arch/powerpc/kernel/trace_clock.c +15 −0
  77. arch/powerpc/lib/checksum_32.S +0 −16
  78. arch/powerpc/lib/checksum_64.S +0 −21
  79. arch/powerpc/lib/copy_32.S +108 −1
  80. arch/powerpc/mm/fsl_booke_mmu.c +1 −1
  81. arch/powerpc/mm/hash_low_64.S +2 −2
  82. arch/powerpc/mm/hash_utils_64.c +6 −6
  83. arch/powerpc/mm/hugetlbpage.c +0 −8
  84. arch/powerpc/mm/mem.c +7 −7
  85. arch/powerpc/mm/numa.c +13 −3
  86. arch/powerpc/mm/pgtable_64.c +0 −10
  87. arch/powerpc/mm/slb.c +18 −6
  88. arch/powerpc/mm/tlb_low_64e.S +5 −5
  89. arch/powerpc/oprofile/op_model_power4.c +2 −2
  90. arch/powerpc/perf/core-book3s.c +2 −2
  91. arch/powerpc/perf/hv-24x7.c +11 −13
  92. arch/powerpc/platforms/512x/Kconfig +2 −2
  93. arch/powerpc/platforms/85xx/c293pcie.c +0 −4
  94. arch/powerpc/platforms/85xx/corenet_generic.c +2 −0
  95. arch/powerpc/platforms/cell/Kconfig +0 −15
  96. arch/powerpc/platforms/cell/spufs/file.c +0 −55
  97. arch/powerpc/platforms/cell/spufs/lscsa_alloc.c +2 −122
  98. arch/powerpc/platforms/powernv/eeh-powernv.c +10 −2
  99. arch/powerpc/platforms/powernv/opal-hmi.c +175 −2
  100. arch/powerpc/platforms/powernv/opal-power.c +130 −17
  101. arch/powerpc/platforms/powernv/opal-wrappers.S +4 −0
  102. arch/powerpc/platforms/powernv/opal.c +46 −1
  103. arch/powerpc/platforms/powernv/pci-ioda.c +59 −88
  104. arch/powerpc/platforms/powernv/pci.c +0 −11
  105. arch/powerpc/platforms/powernv/pci.h +3 −4
  106. arch/powerpc/platforms/powernv/powernv.h +0 −6
  107. arch/powerpc/platforms/powernv/rng.c +1 −1
  108. arch/powerpc/platforms/powernv/setup.c +7 −9
  109. arch/powerpc/platforms/powernv/subcore.c +2 −2
  110. arch/powerpc/platforms/pseries/hotplug-memory.c +1 −2
  111. arch/powerpc/platforms/pseries/iommu.c +1 −2
  112. arch/powerpc/platforms/pseries/ras.c +2 −1
  113. arch/powerpc/platforms/pseries/rng.c +1 −1
  114. arch/powerpc/platforms/pseries/setup.c +15 −8
  115. arch/powerpc/sysdev/cpm_common.c +1 −1
  116. arch/powerpc/sysdev/dart_iommu.c +3 −13
  117. arch/powerpc/sysdev/ppc4xx_hsta_msi.c +2 −2
  118. arch/powerpc/xmon/xmon.c +3 −5
  119. drivers/leds/Kconfig +11 −0
  120. drivers/leds/Makefile +1 −0
  121. drivers/leds/leds-powernv.c +345 −0
  122. drivers/macintosh/therm_windtunnel.c +2 −0
  123. drivers/macintosh/windfarm.h +0 −4
  124. drivers/macintosh/windfarm_core.c +2 −45
  125. drivers/memory/fsl_ifc.c +30 −13
  126. drivers/misc/cxl/Kconfig +6 −1
  127. drivers/misc/cxl/Makefile +2 −0
  128. drivers/misc/cxl/api.c +49 −10
  129. drivers/misc/cxl/context.c +21 −1
  130. drivers/misc/cxl/cxl.h +77 −17
  131. drivers/misc/cxl/debugfs.c +1 −1
  132. drivers/misc/cxl/file.c +24 −3
  133. drivers/misc/cxl/irq.c +36 −20
  134. drivers/misc/cxl/main.c +1 −0
  135. drivers/misc/cxl/native.c +97 −22
  136. drivers/misc/cxl/pci.c +486 −125
  137. drivers/misc/cxl/sysfs.c +26 −0
  138. drivers/misc/cxl/trace.h +5 −5
  139. drivers/misc/cxl/vphb.c +34 −0
  140. drivers/mtd/nand/fsl_ifc_nand.c +130 −128
  141. drivers/tty/hvc/hvsi.c +24 −22
  142. include/linux/fsl_ifc.h +50 −0
  143. include/misc/cxl.h +10 −0
  144. include/uapi/misc/cxl.h +3 −1
  145. tools/testing/selftests/powerpc/mm/Makefile +2 −1
  146. tools/testing/selftests/seccomp/seccomp_bpf.c +14 −1
Documentation/ABI/testing/sysfs-class-cxl+10−0
@@ -223,3 +223,13 @@ Description: write only · 222 unmodified lines
223223 Writing 1 will issue a PERST to card which may cause the card
224224 to reload the FPGA depending on load_image_on_perst.
225225 Users: https://github.com/ibm-capi/libcxl
226+
227+What: /sys/class/cxl/<card>/perst_reloads_same_image
228+Date: July 2015
229+Contact: linuxppc-dev@lists.ozlabs.org
230+Description: read/write
231+ Trust that when an image is reloaded via PERST, it will not
232+ have changed.
233+ 0 = don't trust, the image may be different (default)
234+ 1 = trust that the image will not change.
235+Users: https://github.com/ibm-capi/libcxl
Documentation/devicetree/bindings/leds/leds-powernv.txt+26−0
@@ -0,0 +1,26 @@
1+Device Tree binding for LEDs on IBM Power Systems
2+-------------------------------------------------
3+
4+Required properties:
5+- compatible : Should be "ibm,opal-v3-led".
6+- led-mode : Should be "lightpath" or "guidinglight".
7+
8+Each location code of FRU/Enclosure must be expressed in the
9+form of a sub-node.
10+
11+Required properties for the sub nodes:
12+- led-types : Supported LED types (attention/identify/fault) provided
13+ in the form of string array.
14+
15+Example:
16+
17+leds {
18+ compatible = "ibm,opal-v3-led";
19+ led-mode = "lightpath";
20+
21+ U78C9.001.RST0027-P1-C1 {
22+ led-types = "identify", "fault";
23+ };
24+ ...
25+ ...
26+};
Documentation/devicetree/bindings/memory-controllers/fsl/ifc.txt+3−0
@@ -18,6 +18,8 @@ Properties: · 17 unmodified lines
1818 interrupt (NAND_EVTER_STAT). If there is only one,
1919 that interrupt reports both types of event.
2020
21+- little-endian : If this property is absent, the big-endian mode will
22+ be in use as default for registers.
2123
2224 - ranges : Each range corresponds to a single chipselect, and covers
2325 the entire access window as configured.
@@ -34,6 +36,7 @@ Example: · 10 unmodified lines
3436 #size-cells = <1>;
3537 reg = <0x0 0xffe1e000 0 0x2000>;
3638 interrupts = <16 2 19 2>;
39+ little-endian;
3740
3841 /* NOR, NAND Flashes and CPLD on board */
3942 ranges = <0x0 0x0 0x0 0xee000000 0x02000000
Documentation/devicetree/bindings/powerpc/fsl/scfg.txt+18−0
@@ -0,0 +1,18 @@
1+Freescale Supplement configuration unit (SCFG)
2+
3+SCFG is the supplemental configuration unit, that provides SoC specific
4+configuration and status registers for the chip. Such as getting PEX port
5+status.
6+
7+Required properties:
8+
9+- compatible: should be "fsl,<chip>-scfg"
10+- reg: should contain base address and length of SCFG memory-mapped
11+registers
12+
13+Example:
14+
15+ scfg: global-utilities@fc000 {
16+ compatible = "fsl,t1040-scfg";
17+ reg = <0xfc000 0x1000>;
18+ };
Documentation/trace/ftrace.txt+5−0
@@ -346,6 +346,11 @@ of ftrace. Here is a list of some of the key files: · 345 unmodified lines
346346 x86-tsc: Architectures may define their own clocks. For
347347 example, x86 uses its own TSC cycle clock here.
348348
349+ ppc-tb: This uses the powerpc timebase register value.
350+ This is in sync across CPUs and can also be used
351+ to correlate events across hypervisor/guest if
352+ tb_offset is known.
353+
349354 To set a clock, simply echo the clock name into this file.
350355
351356 echo global > trace_clock
arch/powerpc/Kconfig+11−11
@@ -82,6 +82,9 @@ config GENERIC_HWEIGHT · 81 unmodified lines
8282 bool
8383 default y
8484
85+config ARCH_HAS_DMA_SET_COHERENT_MASK
86+ bool
87+
8588 config PPC
8689 bool
8790 default y
@@ -155,6 +158,8 @@ config PPC · 67 unmodified lines
155158 select HAVE_PERF_EVENTS_NMI if PPC64
156159 select EDAC_SUPPORT
157160 select EDAC_ATOMIC_SCRUB
161+ select ARCH_HAS_DMA_SET_COHERENT_MASK
162+ select HAVE_ARCH_SECCOMP_FILTER
158163
159164 config GENERIC_CSUM
160165 def_bool CPU_LITTLE_ENDIAN
@@ -514,11 +519,6 @@ config NODES_SPAN_OTHER_NODES · 353 unmodified lines
514519 def_bool y
515520 depends on NEED_MULTIPLE_NODES
516521
517−config PPC_HAS_HASH_64K
518− bool
519− depends on PPC64
520− default n
521−
522522 config STDBINUTILS
523523 bool "Using standard binutils settings"
524524 depends on 44x
@@ -560,16 +560,16 @@ config PPC_4K_PAGES · 35 unmodified lines
560560 bool "4k page size"
561561
562562 config PPC_16K_PAGES
563− bool "16k page size" if 44x || PPC_8xx
563+ bool "16k page size"
564+ depends on 44x || PPC_8xx
564565
565566 config PPC_64K_PAGES
566− bool "64k page size" if 44x || PPC_STD_MMU_64 || PPC_BOOK3E_64
567− depends on !PPC_FSL_BOOK3E
568− select PPC_HAS_HASH_64K if PPC_STD_MMU_64
567+ bool "64k page size"
568+ depends on !PPC_FSL_BOOK3E && (44x || PPC_STD_MMU_64 || PPC_BOOK3E_64)
569569
570570 config PPC_256K_PAGES
571− bool "256k page size" if 44x
572− depends on !STDBINUTILS
571+ bool "256k page size"
572+ depends on 44x && !STDBINUTILS
573573 help
574574 Make the page size 256k.
575575
arch/powerpc/Makefile+20−0
@@ -288,6 +288,26 @@ PHONY += pseries_le_defconfig · 287 unmodified lines
288288 pseries_le_defconfig:
289289 $(call merge_into_defconfig,pseries_defconfig,le)
290290
291+PHONY += mpc85xx_defconfig
292+mpc85xx_defconfig:
293+ $(call merge_into_defconfig,mpc85xx_basic_defconfig,\
294+ 85xx-32bit 85xx-hw fsl-emb-nonhw)
295+
296+PHONY += mpc85xx_smp_defconfig
297+mpc85xx_smp_defconfig:
298+ $(call merge_into_defconfig,mpc85xx_basic_defconfig,\
299+ 85xx-32bit 85xx-smp 85xx-hw fsl-emb-nonhw)
300+
301+PHONY += corenet32_smp_defconfig
302+corenet32_smp_defconfig:
303+ $(call merge_into_defconfig,corenet_basic_defconfig,\
304+ 85xx-32bit 85xx-smp 85xx-hw fsl-emb-nonhw)
305+
306+PHONY += corenet64_smp_defconfig
307+corenet64_smp_defconfig:
308+ $(call merge_into_defconfig,corenet_basic_defconfig,\
309+ 85xx-64bit 85xx-smp altivec 85xx-hw fsl-emb-nonhw)
310+
291311 define archhelp
292312 @echo '* zImage - Build default images selected by kernel config'
293313 @echo ' zImage.* - Compressed kernel image (arch/$(ARCH)/boot/zImage.*)'
arch/powerpc/boot/dts/fsl/p1022si-post.dtsi+1−1
@@ -175,7 +175,7 @@ · 174 unmodified lines
175175
176176 /include/ "pq3-gpio-0.dtsi"
177177
178− display@10000 {
178+ display: display@10000 {
179179 compatible = "fsl,diu", "fsl,p1022-diu";
180180 reg = <0x10000 1000>;
181181 interrupts = <64 2 0 0>;
arch/powerpc/boot/dts/fsl/p1022si-pre.dtsi+2−0
@@ -50,6 +50,8 @@ · 49 unmodified lines
5050 pci0 = &pci0;
5151 pci1 = &pci1;
5252 pci2 = &pci2;
53+ vga = &display;
54+ display = &display;
5355 };
5456
5557 cpus {
arch/powerpc/boot/dts/fsl/t1040si-post.dtsi+5−0
@@ -484,6 +484,11 @@ · 483 unmodified lines
484484 reg = <0xea000 0x4000>;
485485 };
486486
487+ scfg: global-utilities@fc000 {
488+ compatible = "fsl,t1040-scfg";
489+ reg = <0xfc000 0x1000>;
490+ };
491+
487492 /include/ "elo3-dma-0.dtsi"
488493 /include/ "elo3-dma-1.dtsi"
489494 /include/ "qoriq-espi-0.dtsi"
arch/powerpc/boot/dts/t1023rdb.dts+12−1
@@ -60,7 +60,7 @@ · 59 unmodified lines
6060 #address-cells = <1>;
6161 #size-cells = <1>;
6262 compatible = "fsl,ifc-nand";
63− reg = <0x2 0x0 0x10000>;
63+ reg = <0x1 0x0 0x10000>;
6464 };
6565 };
6666
@@ -99,6 +99,17 @@ · 32 unmodified lines
9999 };
100100
101101 i2c@118100 {
102+ current-sensor@40 {
103+ compatible = "ti,ina220";
104+ reg = <0x40>;
105+ shunt-resistor = <1000>;
106+ };
107+
108+ current-sensor@41 {
109+ compatible = "ti,ina220";
110+ reg = <0x41>;
111+ shunt-resistor = <1000>;
112+ };
102113 };
103114 };
104115
arch/powerpc/boot/dts/t1024rdb.dts+6−0
@@ -114,6 +114,12 @@ · 113 unmodified lines
114114 reg = <0x4c>;
115115 };
116116
117+ current-sensor@40 {
118+ compatible = "ti,ina220";
119+ reg = <0x40>;
120+ shunt-resistor = <1000>;
121+ };
122+
117123 eeprom@50 {
118124 compatible = "atmel,24c256";
119125 reg = <0x50>;
arch/powerpc/boot/dts/t1040d4rdb.dts+46−0
@@ -0,0 +1,46 @@
1+/*
2+ * T1040D4RDB Device Tree Source
3+ *
4+ * Copyright 2015 Freescale Semiconductor Inc.
5+ *
6+ * Redistribution and use in source and binary forms, with or without
7+ * modification, are permitted provided that the following conditions are met:
8+ * * Redistributions of source code must retain the above copyright
9+ * notice, this list of conditions and the following disclaimer.
10+ * * Redistributions in binary form must reproduce the above copyright
11+ * notice, this list of conditions and the following disclaimer in the
12+ * documentation and/or other materials provided with the distribution.
13+ * * Neither the name of Freescale Semiconductor nor the
14+ * names of its contributors may be used to endorse or promote products
15+ * derived from this software without specific prior written permission.
16+ *
17+ *
18+ * ALTERNATIVELY, this software may be distributed under the terms of the
19+ * GNU General Public License ("GPL") as published by the Free Software
20+ * Foundation, either version 2 of that License or (at your option) any
21+ * later version.
22+ *
23+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor "AS IS" AND ANY
24+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33+ */
34+
35+/include/ "fsl/t104xsi-pre.dtsi"
36+/include/ "t104xd4rdb.dtsi"
37+
38+/ {
39+ model = "fsl,T1040D4RDB";
40+ compatible = "fsl,T1040D4RDB";
41+ #address-cells = <2>;
42+ #size-cells = <2>;
43+ interrupt-parent = <&mpic>;
44+};
45+
46+/include/ "fsl/t1040si-post.dtsi"
arch/powerpc/boot/dts/t1042d4rdb.dts+53−0
@@ -0,0 +1,53 @@
1+/*
2+ * T1042D4RDB Device Tree Source
3+ *
4+ * Copyright 2015 Freescale Semiconductor Inc.
5+ *
6+ * Redistribution and use in source and binary forms, with or without
7+ * modification, are permitted provided that the following conditions are met:
8+ * * Redistributions of source code must retain the above copyright
9+ * notice, this list of conditions and the following disclaimer.
10+ * * Redistributions in binary form must reproduce the above copyright
11+ * notice, this list of conditions and the following disclaimer in the
12+ * documentation and/or other materials provided with the distribution.
13+ * * Neither the name of Freescale Semiconductor nor the
14+ * names of its contributors may be used to endorse or promote products
15+ * derived from this software without specific prior written permission.
16+ *
17+ *
18+ * ALTERNATIVELY, this software may be distributed under the terms of the
19+ * GNU General Public License ("GPL") as published by the Free Software
20+ * Foundation, either version 2 of that License or (at your option) any
21+ * later version.
22+ *
23+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor "AS IS" AND ANY
24+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33+ */
34+
35+/include/ "fsl/t104xsi-pre.dtsi"
36+/include/ "t104xd4rdb.dtsi"
37+
38+/ {
39+ model = "fsl,T1042D4RDB";
40+ compatible = "fsl,T1042D4RDB";
41+ #address-cells = <2>;
42+ #size-cells = <2>;
43+ interrupt-parent = <&mpic>;
44+
45+ ifc: localbus@ffe124000 {
46+ cpld@3,0 {
47+ compatible = "fsl,t1040d4rdb-cpld",
48+ "fsl,deepsleep-cpld";
49+ };
50+ };
51+};
52+
53+/include/ "fsl/t1040si-post.dtsi"
arch/powerpc/boot/dts/t104xd4rdb.dtsi+205−0
@@ -0,0 +1,205 @@
1+/*
2+ * T1040D4RDB/T1042D4RDB Device Tree Source
3+ *
4+ * Copyright 2015 Freescale Semiconductor Inc.
5+ *
6+ * Redistribution and use in source and binary forms, with or without
7+ * modification, are permitted provided that the following conditions are met:
8+ * * Redistributions of source code must retain the above copyright
9+ * notice, this list of conditions and the following disclaimer.
10+ * * Redistributions in binary form must reproduce the above copyright
11+ * notice, this list of conditions and the following disclaimer in the
12+ * documentation and/or other materials provided with the distribution.
13+ * * Neither the name of Freescale Semiconductor nor the
14+ * names of its contributors may be used to endorse or promote products
15+ * derived from this software without specific prior written permission.
16+ *
17+ *
18+ * ALTERNATIVELY, this software may be distributed under the terms of the
19+ * GNU General Public License ("GPL") as published by the Free Software
20+ * Foundation, either version 2 of that License or (at your option) any
21+ * later version.
22+ *
23+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor "AS IS" AND ANY
24+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33+ */
34+
35+/ {
36+ reserved-memory {
37+ #address-cells = <2>;
38+ #size-cells = <2>;
39+ ranges;
40+
41+ bman_fbpr: bman-fbpr {
42+ size = <0 0x1000000>;
43+ alignment = <0 0x1000000>;
44+ };
45+ qman_fqd: qman-fqd {
46+ size = <0 0x400000>;
47+ alignment = <0 0x400000>;
48+ };
49+ qman_pfdr: qman-pfdr {
50+ size = <0 0x2000000>;
51+ alignment = <0 0x2000000>;
52+ };
53+ };
54+
55+ ifc: localbus@ffe124000 {
56+ reg = <0xf 0xfe124000 0 0x2000>;
57+ ranges = <0 0 0xf 0xe8000000 0x08000000
58+ 2 0 0xf 0xff800000 0x00010000
59+ 3 0 0xf 0xffdf0000 0x00008000>;
60+
61+ nor@0,0 {
62+ #address-cells = <1>;
63+ #size-cells = <1>;
64+ compatible = "cfi-flash";
65+ reg = <0x0 0x0 0x8000000>;
66+ bank-width = <2>;
67+ device-width = <1>;
68+ };
69+
70+ nand@2,0 {
71+ #address-cells = <1>;
72+ #size-cells = <1>;
73+ compatible = "fsl,ifc-nand";
74+ reg = <0x2 0x0 0x10000>;
75+ };
76+
77+ cpld@3,0 {
78+ compatible = "fsl,t1040d4rdb-cpld";
79+ reg = <3 0 0x300>;
80+ };
81+ };
82+
83+ memory {
84+ device_type = "memory";
85+ };
86+
87+ dcsr: dcsr@f00000000 {
88+ ranges = <0x00000000 0xf 0x00000000 0x01072000>;
89+ };
90+
91+ bportals: bman-portals@ff4000000 {
92+ ranges = <0x0 0xf 0xf4000000 0x2000000>;
93+ };
94+
95+ qportals: qman-portals@ff6000000 {
96+ ranges = <0x0 0xf 0xf6000000 0x2000000>;
97+ };
98+
99+ soc: soc@ffe000000 {
100+ ranges = <0x00000000 0xf 0xfe000000 0x1000000>;
101+ reg = <0xf 0xfe000000 0 0x00001000>;
102+
103+ spi@110000 {
104+ flash@0 {
105+ #address-cells = <1>;
106+ #size-cells = <1>;
107+ compatible = "micron,n25q512ax3";
108+ reg = <0>;
109+ /* input clock */
110+ spi-max-frequency = <10000000>;
111+ };
112+ };
113+ i2c@118000 {
114+ hwmon@4c {
115+ compatible = "adi,adt7461";
116+ reg = <0x4c>;
117+ };
118+
119+ rtc@68 {
120+ compatible = "dallas,ds1337";
121+ reg = <0x68>;
122+ interrupts = <0x2 0x1 0 0>;
123+ };
124+ };
125+
126+ i2c@118100 {
127+ mux@77 {
128+ /*
129+ * Child nodes of mux depend on which i2c
130+ * devices are connected via the mini PCI
131+ * connector slot1, the mini PCI connector
132+ * slot2, the HDMI connector, and the PEX
133+ * slot. Systems with such devices attached
134+ * should provide a wrapper .dts file that
135+ * includes this one, and adds those nodes
136+ */
137+ compatible = "nxp,pca9546";
138+ reg = <0x77>;
139+ #address-cells = <1>;
140+ #size-cells = <0>;
141+ };
142+ };
143+
144+ };
145+
146+ pci0: pcie@ffe240000 {
147+ reg = <0xf 0xfe240000 0 0x10000>;
148+ ranges = <0x02000000 0 0xe0000000 0xc 0x0 0x0 0x10000000
149+ 0x01000000 0 0x0 0xf 0xf8000000 0x0 0x00010000>;
150+ pcie@0 {
151+ ranges = <0x02000000 0 0xe0000000
152+ 0x02000000 0 0xe0000000
153+ 0 0x10000000
154+
155+ 0x01000000 0 0x00000000
156+ 0x01000000 0 0x00000000
157+ 0 0x00010000>;
158+ };
159+ };
160+
161+ pci1: pcie@ffe250000 {
162+ reg = <0xf 0xfe250000 0 0x10000>;
163+ ranges = <0x02000000 0 0xe0000000 0xc 0x10000000 0 0x10000000
164+ 0x01000000 0 0 0xf 0xf8010000 0 0x00010000>;
165+ pcie@0 {
166+ ranges = <0x02000000 0 0xe0000000
167+ 0x02000000 0 0xe0000000
168+ 0 0x10000000
169+
170+ 0x01000000 0 0x00000000
171+ 0x01000000 0 0x00000000
172+ 0 0x00010000>;
173+ };
174+ };
175+
176+ pci2: pcie@ffe260000 {
177+ reg = <0xf 0xfe260000 0 0x10000>;
178+ ranges = <0x02000000 0 0xe0000000 0xc 0x20000000 0 0x10000000
179+ 0x01000000 0 0x00000000 0xf 0xf8020000 0 0x00010000>;
180+ pcie@0 {
181+ ranges = <0x02000000 0 0xe0000000
182+ 0x02000000 0 0xe0000000
183+ 0 0x10000000
184+
185+ 0x01000000 0 0x00000000
186+ 0x01000000 0 0x00000000
187+ 0 0x00010000>;
188+ };
189+ };
190+
191+ pci3: pcie@ffe270000 {
192+ reg = <0xf 0xfe270000 0 0x10000>;
193+ ranges = <0x02000000 0 0xe0000000 0xc 0x30000000 0 0x10000000
194+ 0x01000000 0 0x00000000 0xf 0xf8030000 0 0x00010000>;
195+ pcie@0 {
196+ ranges = <0x02000000 0 0xe0000000
197+ 0x02000000 0 0xe0000000
198+ 0 0x10000000
199+
200+ 0x01000000 0 0x00000000
201+ 0x01000000 0 0x00000000
202+ 0 0x00010000>;
203+ };
204+ };
205+};
arch/powerpc/configs/85xx-32bit.config+5−0
@@ -0,0 +1,5 @@
1+CONFIG_HIGHMEM=y
2+CONFIG_KEXEC=y
3+CONFIG_PPC_85xx=y
4+CONFIG_PROC_KCORE=y
5+CONFIG_PHYS_64BIT=y
arch/powerpc/configs/85xx-64bit.config+4−0
@@ -0,0 +1,4 @@
1+CONFIG_MATH_EMULATION=y
2+CONFIG_MATH_EMULATION_HW_UNIMPLEMENTED=y
3+CONFIG_PPC64=y
4+CONFIG_PPC_BOOK3E_64=y
arch/powerpc/configs/85xx-hw.config+142−0
@@ -0,0 +1,142 @@
1+CONFIG_AQUANTIA_PHY=y
2+CONFIG_AT803X_PHY=y
3+CONFIG_ATA=y
4+CONFIG_BLK_DEV_SD=y
5+CONFIG_BLK_DEV_SR_VENDOR=y
6+CONFIG_BLK_DEV_SR=y
7+CONFIG_BROADCOM_PHY=y
8+CONFIG_C293_PCIE=y
9+CONFIG_CHR_DEV_SG=y
10+CONFIG_CHR_DEV_ST=y
11+CONFIG_CICADA_PHY=y
12+CONFIG_CLK_QORIQ=y
13+CONFIG_CRYPTO_DEV_FSL_CAAM=y
14+CONFIG_CRYPTO_DEV_TALITOS=y
15+CONFIG_DAVICOM_PHY=y
16+CONFIG_DMADEVICES=y
17+CONFIG_E1000E=y
18+CONFIG_E1000=y
19+CONFIG_EDAC_MM_EDAC=y
20+CONFIG_EDAC_MPC85XX=y
21+CONFIG_EDAC=y
22+CONFIG_EEPROM_AT24=y
23+CONFIG_EEPROM_LEGACY=y
24+CONFIG_FB_FSL_DIU=y
25+CONFIG_FS_ENET=y
26+CONFIG_FSL_CORENET_CF=y
27+CONFIG_FSL_DMA=y
28+CONFIG_FSL_HV_MANAGER=y
29+CONFIG_FSL_PQ_MDIO=y
30+CONFIG_FSL_RIO=y
31+CONFIG_FSL_XGMAC_MDIO=y
32+CONFIG_GIANFAR=y
33+CONFIG_GPIO_MPC8XXX=y
34+CONFIG_HID_A4TECH=y
35+CONFIG_HID_APPLE=y
36+CONFIG_HID_BELKIN=y
37+CONFIG_HID_CHERRY=y
38+CONFIG_HID_CHICONY=y
39+CONFIG_HID_CYPRESS=y
40+CONFIG_HID_EZKEY=y
41+CONFIG_HID_GYRATION=y
42+CONFIG_HID_LOGITECH=y
43+CONFIG_HID_MICROSOFT=y
44+CONFIG_HID_MONTEREY=y
45+CONFIG_HID_PANTHERLORD=y
46+CONFIG_HID_PETALYNX=y
47+CONFIG_HID_SAMSUNG=y
48+CONFIG_HID_SUNPLUS=y
49+CONFIG_I2C_CHARDEV=y
50+CONFIG_I2C_CPM=m
51+CONFIG_I2C_MPC=y
52+CONFIG_I2C_MUX_PCA954x=y
53+CONFIG_I2C_MUX=y
54+CONFIG_I2C=y
55+CONFIG_IGB=y
56+CONFIG_INPUT_FF_MEMLESS=m
57+# CONFIG_INPUT_KEYBOARD is not set
58+# CONFIG_INPUT_MOUSEDEV is not set
59+# CONFIG_INPUT_MOUSE is not set
60+CONFIG_MARVELL_PHY=y
61+CONFIG_MDIO_BUS_MUX_GPIO=y
62+CONFIG_MDIO_BUS_MUX_MMIOREG=y
63+CONFIG_MMC_SDHCI_OF_ESDHC=y
64+CONFIG_MMC_SDHCI_PLTFM=y
65+CONFIG_MMC_SDHCI=y
66+CONFIG_MMC=y
67+CONFIG_MTD_BLOCK=y
68+CONFIG_MTD_CFI_AMDSTD=y
69+CONFIG_MTD_CFI_INTELEXT=y
70+CONFIG_MTD_CFI=y
71+CONFIG_MTD_CMDLINE_PARTS=y
72+CONFIG_MTD_M25P80=y
73+CONFIG_MTD_NAND_FSL_ELBC=y
74+CONFIG_MTD_NAND_FSL_IFC=y
75+CONFIG_MTD_NAND=y
76+CONFIG_MTD_PHYSMAP_OF=y
77+CONFIG_MTD_PHYSMAP=y
78+CONFIG_MTD_PLATRAM=y
79+CONFIG_MTD_SPI_NOR=y
80+CONFIG_NETDEVICES=y
81+CONFIG_NVRAM=y
82+CONFIG_PATA_ALI=y
83+CONFIG_PATA_SIL680=y
84+CONFIG_PATA_VIA=y
85+# CONFIG_PCIEASPM is not set
86+CONFIG_PCIEPORTBUS=y
87+CONFIG_PCI_MSI=y
88+CONFIG_PCI=y
89+CONFIG_PPC_EPAPR_HV_BYTECHAN=y
90+# CONFIG_PPC_OF_BOOT_TRAMPOLINE is not set
91+CONFIG_QE_GPIO=y
92+CONFIG_QUICC_ENGINE=y
93+CONFIG_RAPIDIO=y
94+CONFIG_RTC_CLASS=y
95+CONFIG_RTC_DRV_CMOS=y
96+CONFIG_RTC_DRV_DS1307=y
97+CONFIG_RTC_DRV_DS1374=y
98+CONFIG_RTC_DRV_DS3232=y
99+CONFIG_SATA_AHCI=y
100+CONFIG_SATA_FSL=y
101+CONFIG_SATA_SIL24=y
102+CONFIG_SATA_SIL=y
103+CONFIG_SCSI_LOGGING=y
104+CONFIG_SCSI_SYM53C8XX_2=y
105+CONFIG_SENSORS_INA2XX=y
106+CONFIG_SENSORS_LM90=y
107+CONFIG_SERIAL_8250_CONSOLE=y
108+CONFIG_SERIAL_8250_DETECT_IRQ=y
109+CONFIG_SERIAL_8250_MANY_PORTS=y
110+CONFIG_SERIAL_8250_NR_UARTS=6
111+CONFIG_SERIAL_8250_RSA=y
112+CONFIG_SERIAL_8250_RUNTIME_UARTS=6
113+CONFIG_SERIAL_8250=y
114+CONFIG_SERIAL_QE=m
115+CONFIG_SERIO_LIBPS2=y
116+# CONFIG_SND_DRIVERS is not set
117+CONFIG_SND_INTEL8X0=y
118+CONFIG_SND_POWERPC_SOC=y
119+# CONFIG_SND_PPC is not set
120+CONFIG_SND_SOC=y
121+# CONFIG_SND_SUPPORT_OLD_API is not set
122+# CONFIG_SND_USB is not set
123+CONFIG_SND=y
124+CONFIG_SOUND=y
125+CONFIG_SPI_FSL_ESPI=y
126+CONFIG_SPI_FSL_SPI=y
127+CONFIG_SPI_GPIO=y
128+CONFIG_SPI=y
129+CONFIG_TERANETICS_PHY=y
130+CONFIG_UCC_GETH=y
131+CONFIG_USB_EHCI_FSL=y
132+CONFIG_USB_EHCI_HCD=y
133+CONFIG_USB_HID=m
134+CONFIG_USB_MON=y
135+CONFIG_USB_OHCI_HCD_PPC_OF_BE=y
136+CONFIG_USB_OHCI_HCD_PPC_OF_LE=y
137+CONFIG_USB_OHCI_HCD=y
138+CONFIG_USB_STORAGE=y
139+CONFIG_USB=y
140+# CONFIG_VGA_CONSOLE is not set
141+CONFIG_VIRT_DRIVERS=y
142+CONFIG_VITESSE_PHY=y
arch/powerpc/configs/85xx-smp.config+2−0
@@ -0,0 +1,2 @@
1+CONFIG_NR_CPUS=24
2+CONFIG_SMP=y
arch/powerpc/configs/altivec.config+1−0
@@ -0,0 +1 @@
1+CONFIG_ALTIVEC=y
arch/powerpc/configs/corenet32_smp_defconfig+0−185
@@ -1,185 +0,0 @@
1−CONFIG_PPC_85xx=y
2−CONFIG_SMP=y
3−CONFIG_NR_CPUS=8
4−CONFIG_SYSVIPC=y
5−CONFIG_POSIX_MQUEUE=y
6−CONFIG_AUDIT=y
7−CONFIG_NO_HZ=y
8−CONFIG_HIGH_RES_TIMERS=y
9−CONFIG_BSD_PROCESS_ACCT=y
10−CONFIG_IKCONFIG=y
11−CONFIG_IKCONFIG_PROC=y
12−CONFIG_LOG_BUF_SHIFT=14
13−CONFIG_BLK_DEV_INITRD=y
14−CONFIG_KALLSYMS_ALL=y
15−CONFIG_EMBEDDED=y
16−CONFIG_PERF_EVENTS=y
17−CONFIG_SLAB=y
18−CONFIG_MODULES=y
19−CONFIG_MODULE_UNLOAD=y
20−CONFIG_MODULE_FORCE_UNLOAD=y
21−CONFIG_MODVERSIONS=y
22−# CONFIG_BLK_DEV_BSG is not set
23−CONFIG_PARTITION_ADVANCED=y
24−CONFIG_MAC_PARTITION=y
25−CONFIG_CORENET_GENERIC=y
26−CONFIG_HIGHMEM=y
27−# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
28−CONFIG_BINFMT_MISC=m
29−CONFIG_KEXEC=y
30−CONFIG_FORCE_MAX_ZONEORDER=13
31−CONFIG_PCI=y
32−CONFIG_PCIEPORTBUS=y
33−# CONFIG_PCIEASPM is not set
34−CONFIG_PCI_MSI=y
35−CONFIG_RAPIDIO=y
36−CONFIG_FSL_RIO=y
37−CONFIG_NET=y
38−CONFIG_PACKET=y
39−CONFIG_UNIX=y
40−CONFIG_XFRM_USER=y
41−CONFIG_XFRM_SUB_POLICY=y
42−CONFIG_XFRM_STATISTICS=y
43−CONFIG_NET_KEY=y
44−CONFIG_NET_KEY_MIGRATE=y
45−CONFIG_INET=y
46−CONFIG_IP_MULTICAST=y
47−CONFIG_IP_ADVANCED_ROUTER=y
48−CONFIG_IP_MULTIPLE_TABLES=y
49−CONFIG_IP_ROUTE_MULTIPATH=y
50−CONFIG_IP_ROUTE_VERBOSE=y
51−CONFIG_IP_PNP=y
52−CONFIG_IP_PNP_DHCP=y
53−CONFIG_IP_PNP_BOOTP=y
54−CONFIG_IP_PNP_RARP=y
55−CONFIG_NET_IPIP=y
56−CONFIG_IP_MROUTE=y
57−CONFIG_IP_PIMSM_V1=y
58−CONFIG_IP_PIMSM_V2=y
59−CONFIG_INET_AH=y
60−CONFIG_INET_ESP=y
61−CONFIG_INET_IPCOMP=y
62−# CONFIG_INET_LRO is not set
63−CONFIG_IPV6=y
64−CONFIG_IP_SCTP=m
65−CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
66−CONFIG_DEVTMPFS=y
67−CONFIG_DEVTMPFS_MOUNT=y
68−CONFIG_MTD=y
69−CONFIG_MTD_CMDLINE_PARTS=y
70−CONFIG_MTD_BLOCK=y
71−CONFIG_MTD_CFI=y
72−CONFIG_MTD_CFI_INTELEXT=y
73−CONFIG_MTD_CFI_AMDSTD=y
74−CONFIG_MTD_PHYSMAP_OF=y
75−CONFIG_MTD_NAND=y
76−CONFIG_MTD_NAND_FSL_ELBC=y
77−CONFIG_MTD_NAND_FSL_IFC=y
78−CONFIG_MTD_SPI_NOR=y
79−CONFIG_BLK_DEV_LOOP=y
80−CONFIG_BLK_DEV_RAM=y
81−CONFIG_BLK_DEV_RAM_SIZE=131072
82−CONFIG_BLK_DEV_SD=y
83−CONFIG_CHR_DEV_ST=y
84−CONFIG_BLK_DEV_SR=y
85−CONFIG_CHR_DEV_SG=y
86−CONFIG_SCSI_LOGGING=y
87−CONFIG_SCSI_SYM53C8XX_2=y
88−CONFIG_ATA=y
89−CONFIG_SATA_AHCI=y
90−CONFIG_SATA_FSL=y
91−CONFIG_SATA_SIL24=y
92−CONFIG_SATA_SIL=y
93−CONFIG_PATA_SIL680=y
94−CONFIG_NETDEVICES=y
95−CONFIG_FSL_PQ_MDIO=y
96−CONFIG_FSL_XGMAC_MDIO=y
97−CONFIG_E1000=y
98−CONFIG_E1000E=y
99−CONFIG_AT803X_PHY=y
100−CONFIG_VITESSE_PHY=y
101−CONFIG_FIXED_PHY=y
102−CONFIG_MDIO_BUS_MUX_GPIO=y
103−CONFIG_MDIO_BUS_MUX_MMIOREG=y
104−# CONFIG_INPUT_MOUSEDEV is not set
105−# CONFIG_INPUT_KEYBOARD is not set
106−# CONFIG_INPUT_MOUSE is not set
107−CONFIG_SERIO_LIBPS2=y
108−# CONFIG_LEGACY_PTYS is not set
109−CONFIG_PPC_EPAPR_HV_BYTECHAN=y
110−CONFIG_SERIAL_8250=y
111−CONFIG_SERIAL_8250_CONSOLE=y
112−CONFIG_SERIAL_8250_MANY_PORTS=y
113−CONFIG_SERIAL_8250_DETECT_IRQ=y
114−CONFIG_SERIAL_8250_RSA=y
115−CONFIG_NVRAM=y
116−CONFIG_I2C=y
117−CONFIG_I2C_CHARDEV=y
118−CONFIG_I2C_MPC=y
119−CONFIG_I2C_MUX=y
120−CONFIG_I2C_MUX_PCA954x=y
121−CONFIG_SPI=y
122−CONFIG_SPI_GPIO=y
123−CONFIG_SPI_FSL_SPI=y
124−CONFIG_SPI_FSL_ESPI=y
125−CONFIG_SENSORS_LM90=y
126−CONFIG_SENSORS_INA2XX=y
127−CONFIG_USB_HID=m
128−CONFIG_USB=y
129−CONFIG_USB_MON=y
130−CONFIG_USB_EHCI_HCD=y
131−CONFIG_USB_EHCI_FSL=y
132−CONFIG_USB_OHCI_HCD=y
133−CONFIG_USB_OHCI_HCD_PPC_OF_BE=y
134−CONFIG_USB_OHCI_HCD_PPC_OF_LE=y
135−CONFIG_USB_STORAGE=y
136−CONFIG_MMC=y
137−CONFIG_MMC_SDHCI=y
138−CONFIG_EDAC=y
139−CONFIG_EDAC_MM_EDAC=y
140−CONFIG_EDAC_MPC85XX=y
141−CONFIG_RTC_CLASS=y
142−CONFIG_RTC_DRV_DS1307=y
143−CONFIG_RTC_DRV_DS1374=y
144−CONFIG_RTC_DRV_DS3232=y
145−CONFIG_UIO=y
146−CONFIG_VIRT_DRIVERS=y
147−CONFIG_FSL_HV_MANAGER=y
148−CONFIG_STAGING=y
149−CONFIG_FSL_CORENET_CF=y
150−CONFIG_CLK_QORIQ=y
151−CONFIG_EXT2_FS=y
152−CONFIG_EXT3_FS=y
153−# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
154−CONFIG_ISO9660_FS=m
155−CONFIG_JOLIET=y
156−CONFIG_ZISOFS=y
157−CONFIG_UDF_FS=m
158−CONFIG_MSDOS_FS=m
159−CONFIG_VFAT_FS=y
160−CONFIG_NTFS_FS=y
161−CONFIG_PROC_KCORE=y
162−CONFIG_TMPFS=y
163−CONFIG_HUGETLBFS=y
164−CONFIG_JFFS2_FS=y
165−CONFIG_CRAMFS=y
166−CONFIG_NFS_FS=y
167−CONFIG_NFS_V4=y
168−CONFIG_ROOT_NFS=y
169−CONFIG_NFSD=m
170−CONFIG_NLS_CODEPAGE_437=y
171−CONFIG_NLS_CODEPAGE_850=y
172−CONFIG_NLS_ISO8859_1=y
173−CONFIG_NLS_UTF8=m
174−CONFIG_DEBUG_INFO=y
175−CONFIG_MAGIC_SYSRQ=y
176−CONFIG_DEBUG_SHIRQ=y
177−CONFIG_DETECT_HUNG_TASK=y
178−CONFIG_RCU_TRACE=y
179−CONFIG_CRYPTO_NULL=y
180−CONFIG_CRYPTO_PCBC=m
181−CONFIG_CRYPTO_MD4=y
182−CONFIG_CRYPTO_SHA256=y
183−CONFIG_CRYPTO_SHA512=y
184−# CONFIG_CRYPTO_ANSI_CPRNG is not set
185−CONFIG_CRYPTO_DEV_FSL_CAAM=y
arch/powerpc/configs/corenet_basic_defconfig+1−0
@@ -0,0 +1 @@
1+CONFIG_CORENET_GENERIC=y
arch/powerpc/configs/fsl-emb-nonhw.configrenamed from arch/powerpc/configs/corenet64_smp_defconfig+107−157
@@ -1,176 +1,126 @@
1−CONFIG_PPC64=y
2−CONFIG_PPC_BOOK3E_64=y
3−CONFIG_ALTIVEC=y
4−CONFIG_SMP=y
5−CONFIG_NR_CPUS=24
6−CONFIG_SYSVIPC=y
7−CONFIG_FHANDLE=y
8−CONFIG_IRQ_DOMAIN_DEBUG=y
9−CONFIG_NO_HZ=y
10−CONFIG_HIGH_RES_TIMERS=y
1+CONFIG_ADFS_FS=m
2+CONFIG_AFFS_FS=m
3+CONFIG_AUDIT=y
4+CONFIG_BEFS_FS=m
5+CONFIG_BFS_FS=m
6+CONFIG_BINFMT_MISC=m
7+# CONFIG_BLK_DEV_BSG is not set
8+CONFIG_BLK_DEV_INITRD=y
9+CONFIG_BLK_DEV_LOOP=y
10+CONFIG_BLK_DEV_NBD=y
11+CONFIG_BLK_DEV_RAM_SIZE=131072
12+CONFIG_BLK_DEV_RAM=y
1113 CONFIG_BSD_PROCESS_ACCT=y
12−CONFIG_IKCONFIG=y
13−CONFIG_IKCONFIG_PROC=y
14−CONFIG_LOG_BUF_SHIFT=14
15−CONFIG_CGROUPS=y
16−CONFIG_CPUSETS=y
1714 CONFIG_CGROUP_CPUACCT=y
1815 CONFIG_CGROUP_SCHED=y
19−CONFIG_BLK_DEV_INITRD=y
16+CONFIG_CGROUPS=y
17+# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
18+CONFIG_CRC_T10DIF=y
19+CONFIG_CPUSETS=y
20+CONFIG_CRAMFS=y
21+CONFIG_CRYPTO_MD4=y
22+CONFIG_CRYPTO_NULL=y
23+CONFIG_CRYPTO_PCBC=m
24+CONFIG_CRYPTO_SHA256=y
25+CONFIG_CRYPTO_SHA512=y
26+CONFIG_DEBUG_FS=y
27+CONFIG_DEBUG_INFO=y
28+CONFIG_DEBUG_SHIRQ=y
29+CONFIG_DETECT_HUNG_TASK=y
30+CONFIG_DEVTMPFS_MOUNT=y
31+CONFIG_DEVTMPFS=y
32+CONFIG_DUMMY=y
33+CONFIG_EFS_FS=m
2034 CONFIG_EXPERT=y
21−CONFIG_KALLSYMS_ALL=y
22−CONFIG_MODULES=y
23−CONFIG_MODULE_UNLOAD=y
24−CONFIG_MODULE_FORCE_UNLOAD=y
25−CONFIG_MODVERSIONS=y
26−# CONFIG_BLK_DEV_BSG is not set
27−CONFIG_PARTITION_ADVANCED=y
28−CONFIG_MAC_PARTITION=y
29−CONFIG_CORENET_GENERIC=y
30−# CONFIG_PPC_OF_BOOT_TRAMPOLINE is not set
31−CONFIG_BINFMT_MISC=m
32−CONFIG_MATH_EMULATION=y
33−CONFIG_MATH_EMULATION_HW_UNIMPLEMENTED=y
34−CONFIG_PCIEPORTBUS=y
35−CONFIG_PCI_MSI=y
36−CONFIG_RAPIDIO=y
37−CONFIG_FSL_RIO=y
38−CONFIG_NET=y
39−CONFIG_PACKET=y
40−CONFIG_UNIX=y
41−CONFIG_XFRM_USER=y
42−CONFIG_NET_KEY=y
35+CONFIG_EXT2_FS=y
36+# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
37+CONFIG_EXT3_FS=y
38+CONFIG_FB=y
39+CONFIG_FHANDLE=y
40+CONFIG_FIXED_PHY=y
41+CONFIG_FONT_8x16=y
42+CONFIG_FONT_8x8=y
43+CONFIG_FONTS=y
44+CONFIG_FORCE_MAX_ZONEORDER=13
45+CONFIG_FRAMEBUFFER_CONSOLE=y
46+CONFIG_FRAME_WARN=1024
47+CONFIG_FTL=y
48+CONFIG_HFS_FS=m
49+CONFIG_HFSPLUS_FS=m
50+CONFIG_HIGH_RES_TIMERS=y
51+CONFIG_HPFS_FS=m
52+CONFIG_HUGETLBFS=y
53+CONFIG_IKCONFIG_PROC=y
54+CONFIG_IKCONFIG=y
55+CONFIG_INET_AH=y
56+CONFIG_INET_ESP=y
57+CONFIG_INET_IPCOMP=y
58+# CONFIG_INET_LRO is not set
59+# CONFIG_INET_XFRM_MODE_BEET is not set
4360 CONFIG_INET=y
44−CONFIG_IP_MULTICAST=y
4561 CONFIG_IP_ADVANCED_ROUTER=y
46−CONFIG_IP_MULTIPLE_TABLES=y
47−CONFIG_IP_ROUTE_MULTIPATH=y
48−CONFIG_IP_ROUTE_VERBOSE=y
49−CONFIG_IP_PNP=y
50−CONFIG_IP_PNP_DHCP=y
51−CONFIG_IP_PNP_BOOTP=y
52−CONFIG_IP_PNP_RARP=y
53−CONFIG_NET_IPIP=y
5462 CONFIG_IP_MROUTE=y
63+CONFIG_IP_MULTICAST=y
64+CONFIG_IP_MULTIPLE_TABLES=y
5565 CONFIG_IP_PIMSM_V1=y
5666 CONFIG_IP_PIMSM_V2=y
57−CONFIG_INET_ESP=y
58−# CONFIG_INET_XFRM_MODE_BEET is not set
59−# CONFIG_INET_LRO is not set
60−CONFIG_IPV6=y
67+CONFIG_IP_PNP_BOOTP=y
68+CONFIG_IP_PNP_DHCP=y
69+CONFIG_IP_PNP_RARP=y
70+CONFIG_IP_PNP=y
71+CONFIG_IP_ROUTE_MULTIPATH=y
72+CONFIG_IP_ROUTE_VERBOSE=y
6173 CONFIG_IP_SCTP=m
62−CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
63−CONFIG_DEVTMPFS=y
64−CONFIG_DEVTMPFS_MOUNT=y
65−CONFIG_MTD=y
66−CONFIG_MTD_CMDLINE_PARTS=y
67−CONFIG_MTD_BLOCK=y
68−CONFIG_FTL=y
69−CONFIG_MTD_CFI=y
70−CONFIG_MTD_CFI_INTELEXT=y
71−CONFIG_MTD_CFI_AMDSTD=y
72−CONFIG_MTD_PHYSMAP_OF=y
73−CONFIG_MTD_NAND=y
74−CONFIG_MTD_NAND_FSL_ELBC=y
75−CONFIG_MTD_NAND_FSL_IFC=y
76−CONFIG_MTD_SPI_NOR=y
77−CONFIG_MTD_UBI=y
78−CONFIG_BLK_DEV_LOOP=y
79−CONFIG_BLK_DEV_RAM=y
80−CONFIG_BLK_DEV_RAM_SIZE=131072
81−CONFIG_EEPROM_LEGACY=y
82−CONFIG_BLK_DEV_SD=y
83−CONFIG_BLK_DEV_SR=y
84−CONFIG_BLK_DEV_SR_VENDOR=y
85−CONFIG_CHR_DEV_SG=y
86−CONFIG_ATA=y
87−CONFIG_SATA_FSL=y
88−CONFIG_SATA_SIL24=y
89−CONFIG_NETDEVICES=y
90−CONFIG_DUMMY=y
91−CONFIG_FSL_PQ_MDIO=y
92−CONFIG_FSL_XGMAC_MDIO=y
93−CONFIG_E1000E=y
94−CONFIG_VITESSE_PHY=y
95−CONFIG_FIXED_PHY=y
96−CONFIG_MDIO_BUS_MUX_GPIO=y
97−CONFIG_MDIO_BUS_MUX_MMIOREG=y
98−CONFIG_INPUT_FF_MEMLESS=m
99−# CONFIG_INPUT_MOUSEDEV is not set
100−# CONFIG_INPUT_KEYBOARD is not set
101−# CONFIG_INPUT_MOUSE is not set
102−CONFIG_SERIO_LIBPS2=y
103−CONFIG_PPC_EPAPR_HV_BYTECHAN=y
104−CONFIG_SERIAL_8250=y
105−CONFIG_SERIAL_8250_CONSOLE=y
106−CONFIG_SERIAL_8250_MANY_PORTS=y
107−CONFIG_SERIAL_8250_DETECT_IRQ=y
108−CONFIG_SERIAL_8250_RSA=y
109−CONFIG_I2C=y
110−CONFIG_I2C_CHARDEV=y
111−CONFIG_I2C_MPC=y
112−CONFIG_I2C_MUX=y
113−CONFIG_I2C_MUX_PCA954x=y
114−CONFIG_SPI=y
115−CONFIG_SPI_GPIO=y
116−CONFIG_SPI_FSL_SPI=y
117−CONFIG_SPI_FSL_ESPI=y
118−CONFIG_SENSORS_LM90=y
119−CONFIG_SENSORS_INA2XX=y
120−CONFIG_USB_HID=m
121−CONFIG_USB=y
122−CONFIG_USB_MON=y
123−CONFIG_USB_EHCI_HCD=y
124−CONFIG_USB_EHCI_FSL=y
125−CONFIG_USB_STORAGE=y
126−CONFIG_MMC=y
127−CONFIG_MMC_SDHCI=y
128−CONFIG_EDAC=y
129−CONFIG_EDAC_MM_EDAC=y
130−CONFIG_RTC_CLASS=y
131−CONFIG_RTC_DRV_DS1307=y
132−CONFIG_RTC_DRV_DS1374=y
133−CONFIG_RTC_DRV_DS3232=y
134−CONFIG_DMADEVICES=y
135−CONFIG_FSL_DMA=y
136−CONFIG_VIRT_DRIVERS=y
137−CONFIG_FSL_HV_MANAGER=y
138−CONFIG_CLK_QORIQ=y
139−CONFIG_FSL_CORENET_CF=y
140−CONFIG_EXT2_FS=y
141−CONFIG_EXT3_FS=y
74+CONFIG_IPV6=y
75+CONFIG_IRQ_DOMAIN_DEBUG=y
14276 CONFIG_ISO9660_FS=m
77+CONFIG_JFFS2_FS_DEBUG=1
78+CONFIG_JFFS2_FS=y
14379 CONFIG_JOLIET=y
144−CONFIG_ZISOFS=y
145−CONFIG_UDF_FS=m
80+CONFIG_KALLSYMS_ALL=y
81+# CONFIG_LEGACY_PTYS is not set
82+CONFIG_LOG_BUF_SHIFT=14
83+CONFIG_MAC_PARTITION=y
84+CONFIG_MAGIC_SYSRQ=y
85+CONFIG_MODULE_FORCE_UNLOAD=y
86+CONFIG_MODULES=y
87+CONFIG_MODULE_UNLOAD=y
88+CONFIG_MODVERSIONS=y
14689 CONFIG_MSDOS_FS=m
147−CONFIG_VFAT_FS=y
148−CONFIG_NTFS_FS=y
149−CONFIG_PROC_KCORE=y
150−CONFIG_TMPFS=y
151−CONFIG_HUGETLBFS=y
152−CONFIG_JFFS2_FS=y
153−CONFIG_JFFS2_FS_DEBUG=1
154−CONFIG_UBIFS_FS=y
90+CONFIG_MTD_UBI=y
91+CONFIG_MTD=y
92+CONFIG_NET_IPIP=y
93+CONFIG_NET_KEY_MIGRATE=y
94+CONFIG_NET_KEY=y
95+CONFIG_NET=y
96+CONFIG_NFSD=y
15597 CONFIG_NFS_FS=y
15698 CONFIG_NFS_V4=y
157−CONFIG_ROOT_NFS=y
158−CONFIG_NFSD=m
15999 CONFIG_NLS_CODEPAGE_437=y
160100 CONFIG_NLS_CODEPAGE_850=y
161101 CONFIG_NLS_ISO8859_1=y
162102 CONFIG_NLS_UTF8=m
163−CONFIG_CRC_T10DIF=y
164−CONFIG_DEBUG_INFO=y
165−CONFIG_FRAME_WARN=1024
166−CONFIG_DEBUG_FS=y
167−CONFIG_MAGIC_SYSRQ=y
168−CONFIG_DEBUG_SHIRQ=y
169−CONFIG_DETECT_HUNG_TASK=y
170−CONFIG_CRYPTO_NULL=y
171−CONFIG_CRYPTO_PCBC=m
172−CONFIG_CRYPTO_MD4=y
173−CONFIG_CRYPTO_SHA256=y
174−CONFIG_CRYPTO_SHA512=y
175−# CONFIG_CRYPTO_ANSI_CPRNG is not set
176−CONFIG_CRYPTO_DEV_FSL_CAAM=y
103+CONFIG_NO_HZ=y
104+CONFIG_NTFS_FS=y
105+CONFIG_PACKET=y
106+CONFIG_PARTITION_ADVANCED=y
107+CONFIG_PERF_EVENTS=y
108+CONFIG_POSIX_MQUEUE=y
109+CONFIG_QNX4FS_FS=m
110+CONFIG_RCU_TRACE=y
111+CONFIG_ROOT_NFS=y
112+CONFIG_SYSV_FS=m
113+CONFIG_SYSVIPC=y
114+CONFIG_TMPFS=y
115+CONFIG_UBIFS_FS=y
116+CONFIG_UDF_FS=m
117+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
118+CONFIG_UFS_FS=m
119+CONFIG_UIO=y
120+CONFIG_UNIX=y
121+CONFIG_VFAT_FS=y
122+CONFIG_VXFS_FS=m
123+CONFIG_XFRM_STATISTICS=y
124+CONFIG_XFRM_SUB_POLICY=y
125+CONFIG_XFRM_USER=y
126+CONFIG_ZISOFS=y
arch/powerpc/configs/mpc85xx_basic_defconfig+23−0
@@ -0,0 +1,23 @@
1+CONFIG_MATH_EMULATION=y
2+CONFIG_MPC8536_DS=y
3+CONFIG_MPC8540_ADS=y
4+CONFIG_MPC8560_ADS=y
5+CONFIG_MPC85xx_CDS=y
6+CONFIG_MPC85xx_DS=y
7+CONFIG_MPC85xx_MDS=y
8+CONFIG_MPC85xx_RDB=y
9+CONFIG_KSI8560=y
10+CONFIG_MVME2500=y
11+CONFIG_P1010_RDB=y
12+CONFIG_P1022_DS=y
13+CONFIG_P1022_RDK=y
14+CONFIG_P1023_RDB=y
15+CONFIG_SBC8548=y
16+CONFIG_SOCRATES=y
17+CONFIG_STX_GP3=y
18+CONFIG_TQM8540=y
19+CONFIG_TQM8541=y
20+CONFIG_TQM8548=y
21+CONFIG_TQM8555=y
22+CONFIG_TQM8560=y
23+CONFIG_XES_MPC85xx=y
arch/powerpc/configs/mpc85xx_defconfig+0−252
@@ -1,252 +0,0 @@
1−CONFIG_PPC_85xx=y
2−CONFIG_PHYS_64BIT=y
3−CONFIG_SYSVIPC=y
4−CONFIG_POSIX_MQUEUE=y
5−CONFIG_AUDIT=y
6−CONFIG_IRQ_DOMAIN_DEBUG=y
7−CONFIG_NO_HZ=y
8−CONFIG_HIGH_RES_TIMERS=y
9−CONFIG_BSD_PROCESS_ACCT=y
10−CONFIG_IKCONFIG=y
11−CONFIG_IKCONFIG_PROC=y
12−CONFIG_LOG_BUF_SHIFT=14
13−CONFIG_BLK_DEV_INITRD=y
14−CONFIG_EXPERT=y
15−CONFIG_KALLSYMS_ALL=y
16−CONFIG_MODULES=y
17−CONFIG_MODULE_UNLOAD=y
18−CONFIG_MODULE_FORCE_UNLOAD=y
19−CONFIG_MODVERSIONS=y
20−# CONFIG_BLK_DEV_BSG is not set
21−CONFIG_PARTITION_ADVANCED=y
22−CONFIG_MAC_PARTITION=y
23−CONFIG_C293_PCIE=y
24−CONFIG_MPC8540_ADS=y
25−CONFIG_MPC8560_ADS=y
26−CONFIG_MPC85xx_CDS=y
27−CONFIG_MPC85xx_MDS=y
28−CONFIG_MPC8536_DS=y
29−CONFIG_MPC85xx_DS=y
30−CONFIG_MPC85xx_RDB=y
31−CONFIG_P1010_RDB=y
32−CONFIG_P1022_DS=y
33−CONFIG_P1022_RDK=y
34−CONFIG_P1023_RDB=y
35−CONFIG_SOCRATES=y
36−CONFIG_KSI8560=y
37−CONFIG_XES_MPC85xx=y
38−CONFIG_STX_GP3=y
39−CONFIG_TQM8540=y
40−CONFIG_TQM8541=y
41−CONFIG_TQM8548=y
42−CONFIG_TQM8555=y
43−CONFIG_TQM8560=y
44−CONFIG_SBC8548=y
45−CONFIG_MVME2500=y
46−CONFIG_QUICC_ENGINE=y
47−CONFIG_QE_GPIO=y
48−CONFIG_HIGHMEM=y
49−CONFIG_BINFMT_MISC=m
50−CONFIG_MATH_EMULATION=y
51−CONFIG_FORCE_MAX_ZONEORDER=12
52−CONFIG_PCI=y
53−CONFIG_PCIEPORTBUS=y
54−# CONFIG_PCIEASPM is not set
55−CONFIG_PCI_MSI=y
56−CONFIG_RAPIDIO=y
57−CONFIG_NET=y
58−CONFIG_PACKET=y
59−CONFIG_UNIX=y
60−CONFIG_XFRM_USER=y
61−CONFIG_NET_KEY=y
62−CONFIG_INET=y
63−CONFIG_IP_MULTICAST=y
64−CONFIG_IP_ADVANCED_ROUTER=y
65−CONFIG_IP_MULTIPLE_TABLES=y
66−CONFIG_IP_ROUTE_MULTIPATH=y
67−CONFIG_IP_ROUTE_VERBOSE=y
68−CONFIG_IP_PNP=y
69−CONFIG_IP_PNP_DHCP=y
70−CONFIG_IP_PNP_BOOTP=y
71−CONFIG_IP_PNP_RARP=y
72−CONFIG_NET_IPIP=y
73−CONFIG_IP_MROUTE=y
74−CONFIG_IP_PIMSM_V1=y
75−CONFIG_IP_PIMSM_V2=y
76−CONFIG_INET_ESP=y
77−# CONFIG_INET_XFRM_MODE_BEET is not set
78−# CONFIG_INET_LRO is not set
79−CONFIG_IPV6=y
80−CONFIG_IP_SCTP=m
81−CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
82−CONFIG_DEVTMPFS=y
83−CONFIG_DEVTMPFS_MOUNT=y
84−CONFIG_MTD=y
85−CONFIG_MTD_CMDLINE_PARTS=y
86−CONFIG_MTD_BLOCK=y
87−CONFIG_FTL=y
88−CONFIG_MTD_CFI=y
89−CONFIG_MTD_CFI_INTELEXT=y
90−CONFIG_MTD_CFI_AMDSTD=y
91−CONFIG_MTD_PHYSMAP=y
92−CONFIG_MTD_PHYSMAP_OF=y
93−CONFIG_MTD_PLATRAM=y
94−CONFIG_MTD_M25P80=y
95−CONFIG_MTD_NAND=y
96−CONFIG_MTD_NAND_FSL_ELBC=y
97−CONFIG_MTD_NAND_FSL_IFC=y
98−CONFIG_MTD_SPI_NOR=y
99−CONFIG_MTD_UBI=y
100−CONFIG_BLK_DEV_LOOP=y
101−CONFIG_BLK_DEV_NBD=y
102−CONFIG_BLK_DEV_RAM=y
103−CONFIG_BLK_DEV_RAM_SIZE=131072
104−CONFIG_EEPROM_AT24=y
105−CONFIG_EEPROM_LEGACY=y
106−CONFIG_BLK_DEV_SD=y
107−CONFIG_CHR_DEV_ST=y
108−CONFIG_BLK_DEV_SR=y
109−CONFIG_CHR_DEV_SG=y
110−CONFIG_SCSI_LOGGING=y
111−CONFIG_ATA=y
112−CONFIG_SATA_AHCI=y
113−CONFIG_SATA_FSL=y
114−CONFIG_SATA_SIL24=y
115−CONFIG_PATA_ALI=y
116−CONFIG_PATA_VIA=y
117−CONFIG_NETDEVICES=y
118−CONFIG_DUMMY=y
119−CONFIG_FS_ENET=y
120−CONFIG_UCC_GETH=y
121−CONFIG_GIANFAR=y
122−CONFIG_E1000=y
123−CONFIG_E1000E=y
124−CONFIG_IGB=y
125−CONFIG_AT803X_PHY=y
126−CONFIG_MARVELL_PHY=y
127−CONFIG_DAVICOM_PHY=y
128−CONFIG_CICADA_PHY=y
129−CONFIG_VITESSE_PHY=y
130−CONFIG_BROADCOM_PHY=y
131−CONFIG_FIXED_PHY=y
132−CONFIG_INPUT_FF_MEMLESS=m
133−# CONFIG_INPUT_MOUSEDEV is not set
134−# CONFIG_INPUT_KEYBOARD is not set
135−# CONFIG_INPUT_MOUSE is not set
136−CONFIG_SERIO_LIBPS2=y
137−CONFIG_SERIAL_8250=y
138−CONFIG_SERIAL_8250_CONSOLE=y
139−CONFIG_SERIAL_8250_NR_UARTS=6
140−CONFIG_SERIAL_8250_RUNTIME_UARTS=6
141−CONFIG_SERIAL_8250_MANY_PORTS=y
142−CONFIG_SERIAL_8250_DETECT_IRQ=y
143−CONFIG_SERIAL_8250_RSA=y
144−CONFIG_SERIAL_QE=m
145−CONFIG_NVRAM=y
146−CONFIG_I2C_CHARDEV=y
147−CONFIG_I2C_CPM=m
148−CONFIG_I2C_MPC=y
149−CONFIG_SPI=y
150−CONFIG_SPI_FSL_SPI=y
151−CONFIG_SPI_FSL_ESPI=y
152−CONFIG_GPIO_MPC8XXX=y
153−CONFIG_SENSORS_LM90=y
154−CONFIG_FB=y
155−CONFIG_FB_FSL_DIU=y
156−# CONFIG_VGA_CONSOLE is not set
157−CONFIG_FRAMEBUFFER_CONSOLE=y
158−CONFIG_SOUND=y
159−CONFIG_SND=y
160−# CONFIG_SND_SUPPORT_OLD_API is not set
161−# CONFIG_SND_DRIVERS is not set
162−CONFIG_SND_INTEL8X0=y
163−# CONFIG_SND_PPC is not set
164−# CONFIG_SND_USB is not set
165−CONFIG_SND_SOC=y
166−CONFIG_SND_POWERPC_SOC=y
167−CONFIG_HID_A4TECH=y
168−CONFIG_HID_APPLE=y
169−CONFIG_HID_BELKIN=y
170−CONFIG_HID_CHERRY=y
171−CONFIG_HID_CHICONY=y
172−CONFIG_HID_CYPRESS=y
173−CONFIG_HID_EZKEY=y
174−CONFIG_HID_GYRATION=y
175−CONFIG_HID_LOGITECH=y
176−CONFIG_HID_MICROSOFT=y
177−CONFIG_HID_MONTEREY=y
178−CONFIG_HID_PANTHERLORD=y
179−CONFIG_HID_PETALYNX=y
180−CONFIG_HID_SAMSUNG=y
181−CONFIG_HID_SUNPLUS=y
182−CONFIG_USB=y
183−CONFIG_USB_MON=y
184−CONFIG_USB_EHCI_HCD=y
185−CONFIG_USB_EHCI_FSL=y
186−CONFIG_USB_OHCI_HCD=y
187−CONFIG_USB_OHCI_HCD_PPC_OF_BE=y
188−CONFIG_USB_OHCI_HCD_PPC_OF_LE=y
189−CONFIG_USB_STORAGE=y
190−CONFIG_MMC=y
191−CONFIG_MMC_SDHCI=y
192−CONFIG_MMC_SDHCI_PLTFM=y
193−CONFIG_MMC_SDHCI_OF_ESDHC=y
194−CONFIG_EDAC=y
195−CONFIG_EDAC_MM_EDAC=y
196−CONFIG_EDAC_MPC85XX=y
197−CONFIG_RTC_CLASS=y
198−CONFIG_RTC_DRV_DS1307=y
199−CONFIG_RTC_DRV_DS1374=y
200−CONFIG_RTC_DRV_DS3232=y
201−CONFIG_RTC_DRV_CMOS=y
202−CONFIG_DMADEVICES=y
203−CONFIG_FSL_DMA=y
204−CONFIG_EXT2_FS=y
205−CONFIG_EXT3_FS=y
206−# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
207−CONFIG_ISO9660_FS=m
208−CONFIG_JOLIET=y
209−CONFIG_ZISOFS=y
210−CONFIG_UDF_FS=m
211−CONFIG_MSDOS_FS=m
212−CONFIG_VFAT_FS=y
213−CONFIG_NTFS_FS=y
214−CONFIG_PROC_KCORE=y
215−CONFIG_TMPFS=y
216−CONFIG_HUGETLBFS=y
217−CONFIG_ADFS_FS=m
218−CONFIG_AFFS_FS=m
219−CONFIG_HFS_FS=m
220−CONFIG_HFSPLUS_FS=m
221−CONFIG_BEFS_FS=m
222−CONFIG_BFS_FS=m
223−CONFIG_EFS_FS=m
224−CONFIG_JFFS2_FS=y
225−CONFIG_JFFS2_FS_DEBUG=1
226−CONFIG_UBIFS_FS=y
227−CONFIG_CRAMFS=y
228−CONFIG_VXFS_FS=m
229−CONFIG_HPFS_FS=m
230−CONFIG_QNX4FS_FS=m
231−CONFIG_SYSV_FS=m
232−CONFIG_UFS_FS=m
233−CONFIG_NFS_FS=y
234−CONFIG_NFS_V4=y
235−CONFIG_ROOT_NFS=y
236−CONFIG_NFSD=y
237−CONFIG_NLS_CODEPAGE_437=y
238−CONFIG_NLS_CODEPAGE_850=y
239−CONFIG_NLS_ISO8859_1=y
240−CONFIG_CRC_T10DIF=y
241−CONFIG_FONTS=y
242−CONFIG_FONT_8x8=y
243−CONFIG_FONT_8x16=y
244−CONFIG_DEBUG_INFO=y
245−CONFIG_DEBUG_FS=y
246−CONFIG_DETECT_HUNG_TASK=y
247−CONFIG_CRYPTO_PCBC=m
248−CONFIG_CRYPTO_SHA256=y
249−CONFIG_CRYPTO_SHA512=y
250−# CONFIG_CRYPTO_ANSI_CPRNG is not set
251−CONFIG_CRYPTO_DEV_FSL_CAAM=y
252−CONFIG_CRYPTO_DEV_TALITOS=y
arch/powerpc/configs/mpc85xx_smp_defconfig+0−244
@@ -1,244 +0,0 @@
1−CONFIG_PPC_85xx=y
2−CONFIG_PHYS_64BIT=y
3−CONFIG_SMP=y
4−CONFIG_NR_CPUS=8
5−CONFIG_SYSVIPC=y
6−CONFIG_POSIX_MQUEUE=y
7−CONFIG_AUDIT=y
8−CONFIG_IRQ_DOMAIN_DEBUG=y
9−CONFIG_NO_HZ=y
10−CONFIG_HIGH_RES_TIMERS=y
11−CONFIG_BSD_PROCESS_ACCT=y
12−CONFIG_IKCONFIG=y
13−CONFIG_IKCONFIG_PROC=y
14−CONFIG_LOG_BUF_SHIFT=14
15−CONFIG_BLK_DEV_INITRD=y
16−CONFIG_EXPERT=y
17−CONFIG_KALLSYMS_ALL=y
18−CONFIG_MODULES=y
19−CONFIG_MODULE_UNLOAD=y
20−CONFIG_MODULE_FORCE_UNLOAD=y
21−CONFIG_MODVERSIONS=y
22−# CONFIG_BLK_DEV_BSG is not set
23−CONFIG_PARTITION_ADVANCED=y
24−CONFIG_MAC_PARTITION=y
25−CONFIG_C293_PCIE=y
26−CONFIG_MPC8540_ADS=y
27−CONFIG_MPC8560_ADS=y
28−CONFIG_MPC85xx_CDS=y
29−CONFIG_MPC85xx_MDS=y
30−CONFIG_MPC8536_DS=y
31−CONFIG_MPC85xx_DS=y
32−CONFIG_MPC85xx_RDB=y
33−CONFIG_P1010_RDB=y
34−CONFIG_P1022_DS=y
35−CONFIG_P1022_RDK=y
36−CONFIG_P1023_RDB=y
37−CONFIG_SOCRATES=y
38−CONFIG_KSI8560=y
39−CONFIG_XES_MPC85xx=y
40−CONFIG_STX_GP3=y
41−CONFIG_TQM8540=y
42−CONFIG_TQM8541=y
43−CONFIG_TQM8548=y
44−CONFIG_TQM8555=y
45−CONFIG_TQM8560=y
46−CONFIG_SBC8548=y
47−CONFIG_QUICC_ENGINE=y
48−CONFIG_QE_GPIO=y
49−CONFIG_HIGHMEM=y
50−CONFIG_BINFMT_MISC=m
51−CONFIG_MATH_EMULATION=y
52−CONFIG_FORCE_MAX_ZONEORDER=12
53−CONFIG_PCI=y
54−CONFIG_PCI_MSI=y
55−CONFIG_RAPIDIO=y
56−CONFIG_NET=y
57−CONFIG_PACKET=y
58−CONFIG_UNIX=y
59−CONFIG_XFRM_USER=y
60−CONFIG_NET_KEY=y
61−CONFIG_INET=y
62−CONFIG_IP_MULTICAST=y
63−CONFIG_IP_ADVANCED_ROUTER=y
64−CONFIG_IP_MULTIPLE_TABLES=y
65−CONFIG_IP_ROUTE_MULTIPATH=y
66−CONFIG_IP_ROUTE_VERBOSE=y
67−CONFIG_IP_PNP=y
68−CONFIG_IP_PNP_DHCP=y
69−CONFIG_IP_PNP_BOOTP=y
70−CONFIG_IP_PNP_RARP=y
71−CONFIG_NET_IPIP=y
72−CONFIG_IP_MROUTE=y
73−CONFIG_IP_PIMSM_V1=y
74−CONFIG_IP_PIMSM_V2=y
75−CONFIG_INET_ESP=y
76−# CONFIG_INET_XFRM_MODE_BEET is not set
77−# CONFIG_INET_LRO is not set
78−CONFIG_IPV6=y
79−CONFIG_IP_SCTP=m
80−CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
81−CONFIG_DEVTMPFS=y
82−CONFIG_DEVTMPFS_MOUNT=y
83−CONFIG_MTD=y
84−CONFIG_MTD_CMDLINE_PARTS=y
85−CONFIG_MTD_BLOCK=y
86−CONFIG_FTL=y
87−CONFIG_MTD_CFI=y
88−CONFIG_MTD_CFI_INTELEXT=y
89−CONFIG_MTD_CFI_AMDSTD=y
90−CONFIG_MTD_PHYSMAP_OF=y
91−CONFIG_MTD_NAND=y
92−CONFIG_MTD_NAND_FSL_ELBC=y
93−CONFIG_MTD_NAND_FSL_IFC=y
94−CONFIG_MTD_SPI_NOR=y
95−CONFIG_MTD_UBI=y
96−CONFIG_BLK_DEV_LOOP=y
97−CONFIG_BLK_DEV_NBD=y
98−CONFIG_BLK_DEV_RAM=y
99−CONFIG_BLK_DEV_RAM_SIZE=131072
100−CONFIG_EEPROM_AT24=y
101−CONFIG_EEPROM_LEGACY=y
102−CONFIG_BLK_DEV_SD=y
103−CONFIG_CHR_DEV_ST=y
104−CONFIG_BLK_DEV_SR=y
105−CONFIG_CHR_DEV_SG=y
106−CONFIG_SCSI_LOGGING=y
107−CONFIG_ATA=y
108−CONFIG_SATA_AHCI=y
109−CONFIG_SATA_FSL=y
110−CONFIG_SATA_SIL24=y
111−CONFIG_PATA_ALI=y
112−CONFIG_NETDEVICES=y
113−CONFIG_DUMMY=y
114−CONFIG_FS_ENET=y
115−CONFIG_UCC_GETH=y
116−CONFIG_GIANFAR=y
117−CONFIG_E1000E=y
118−CONFIG_AT803X_PHY=y
119−CONFIG_MARVELL_PHY=y
120−CONFIG_DAVICOM_PHY=y
121−CONFIG_CICADA_PHY=y
122−CONFIG_VITESSE_PHY=y
123−CONFIG_FIXED_PHY=y
124−CONFIG_INPUT_FF_MEMLESS=m
125−# CONFIG_INPUT_MOUSEDEV is not set
126−# CONFIG_INPUT_KEYBOARD is not set
127−# CONFIG_INPUT_MOUSE is not set
128−CONFIG_SERIO_LIBPS2=y
129−CONFIG_SERIAL_8250=y
130−CONFIG_SERIAL_8250_CONSOLE=y
131−CONFIG_SERIAL_8250_NR_UARTS=2
132−CONFIG_SERIAL_8250_RUNTIME_UARTS=2
133−CONFIG_SERIAL_8250_MANY_PORTS=y
134−CONFIG_SERIAL_8250_DETECT_IRQ=y
135−CONFIG_SERIAL_8250_RSA=y
136−CONFIG_SERIAL_QE=m
137−CONFIG_NVRAM=y
138−CONFIG_I2C=y
139−CONFIG_I2C_CHARDEV=y
140−CONFIG_I2C_CPM=m
141−CONFIG_I2C_MPC=y
142−CONFIG_SPI=y
143−CONFIG_SPI_FSL_SPI=y
144−CONFIG_SPI_FSL_ESPI=y
145−CONFIG_GPIO_MPC8XXX=y
146−CONFIG_SENSORS_LM90=y
147−CONFIG_FB=y
148−CONFIG_FB_FSL_DIU=y
149−# CONFIG_VGA_CONSOLE is not set
150−CONFIG_FRAMEBUFFER_CONSOLE=y
151−CONFIG_SOUND=y
152−CONFIG_SND=y
153−# CONFIG_SND_SUPPORT_OLD_API is not set
154−# CONFIG_SND_DRIVERS is not set
155−CONFIG_SND_INTEL8X0=y
156−# CONFIG_SND_PPC is not set
157−# CONFIG_SND_USB is not set
158−CONFIG_SND_SOC=y
159−CONFIG_SND_POWERPC_SOC=y
160−CONFIG_HID_A4TECH=y
161−CONFIG_HID_APPLE=y
162−CONFIG_HID_BELKIN=y
163−CONFIG_HID_CHERRY=y
164−CONFIG_HID_CHICONY=y
165−CONFIG_HID_CYPRESS=y
166−CONFIG_HID_EZKEY=y
167−CONFIG_HID_GYRATION=y
168−CONFIG_HID_LOGITECH=y
169−CONFIG_HID_MICROSOFT=y
170−CONFIG_HID_MONTEREY=y
171−CONFIG_HID_PANTHERLORD=y
172−CONFIG_HID_PETALYNX=y
173−CONFIG_HID_SAMSUNG=y
174−CONFIG_HID_SUNPLUS=y
175−CONFIG_USB=y
176−CONFIG_USB_MON=y
177−CONFIG_USB_EHCI_HCD=y
178−CONFIG_USB_EHCI_FSL=y
179−CONFIG_USB_OHCI_HCD=y
180−CONFIG_USB_OHCI_HCD_PPC_OF_BE=y
181−CONFIG_USB_OHCI_HCD_PPC_OF_LE=y
182−CONFIG_USB_STORAGE=y
183−CONFIG_MMC=y
184−CONFIG_MMC_SDHCI=y
185−CONFIG_MMC_SDHCI_PLTFM=y
186−CONFIG_MMC_SDHCI_OF_ESDHC=y
187−CONFIG_EDAC=y
188−CONFIG_EDAC_MM_EDAC=y
189−CONFIG_RTC_CLASS=y
190−CONFIG_RTC_DRV_DS1307=y
191−CONFIG_RTC_DRV_DS1374=y
192−CONFIG_RTC_DRV_DS3232=y
193−CONFIG_RTC_DRV_CMOS=y
194−CONFIG_DMADEVICES=y
195−CONFIG_FSL_DMA=y
196−CONFIG_EXT2_FS=y
197−CONFIG_EXT3_FS=y
198−# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
199−CONFIG_ISO9660_FS=m
200−CONFIG_JOLIET=y
201−CONFIG_ZISOFS=y
202−CONFIG_UDF_FS=m
203−CONFIG_MSDOS_FS=m
204−CONFIG_VFAT_FS=y
205−CONFIG_NTFS_FS=y
206−CONFIG_PROC_KCORE=y
207−CONFIG_TMPFS=y
208−CONFIG_HUGETLBFS=y
209−CONFIG_ADFS_FS=m
210−CONFIG_AFFS_FS=m
211−CONFIG_HFS_FS=m
212−CONFIG_HFSPLUS_FS=m
213−CONFIG_BEFS_FS=m
214−CONFIG_BFS_FS=m
215−CONFIG_EFS_FS=m
216−CONFIG_JFFS2_FS=y
217−CONFIG_JFFS2_FS_DEBUG=1
218−CONFIG_UBIFS_FS=y
219−CONFIG_CRAMFS=y
220−CONFIG_VXFS_FS=m
221−CONFIG_HPFS_FS=m
222−CONFIG_QNX4FS_FS=m
223−CONFIG_SYSV_FS=m
224−CONFIG_UFS_FS=m
225−CONFIG_NFS_FS=y
226−CONFIG_NFS_V4=y
227−CONFIG_ROOT_NFS=y
228−CONFIG_NFSD=y
229−CONFIG_NLS_CODEPAGE_437=y
230−CONFIG_NLS_CODEPAGE_850=y
231−CONFIG_NLS_ISO8859_1=y
232−CONFIG_CRC_T10DIF=y
233−CONFIG_FONTS=y
234−CONFIG_FONT_8x8=y
235−CONFIG_FONT_8x16=y
236−CONFIG_DEBUG_INFO=y
237−CONFIG_DEBUG_FS=y
238−CONFIG_DETECT_HUNG_TASK=y
239−CONFIG_CRYPTO_PCBC=m
240−CONFIG_CRYPTO_SHA256=y
241−CONFIG_CRYPTO_SHA512=y
242−# CONFIG_CRYPTO_ANSI_CPRNG is not set
243−CONFIG_CRYPTO_DEV_FSL_CAAM=y
244−CONFIG_CRYPTO_DEV_TALITOS=y
arch/powerpc/configs/ppc64_defconfig+3−0
@@ -355,3 +355,6 @@ CONFIG_CRYPTO_DEV_NX_ENCRYPT=m · 354 unmodified lines
355355 CONFIG_VIRTUALIZATION=y
356356 CONFIG_KVM_BOOK3S_64=m
357357 CONFIG_KVM_BOOK3S_64_HV=m
358+CONFIG_NEW_LEDS=y
359+CONFIG_LEDS_CLASS=m
360+CONFIG_LEDS_POWERNV=m
arch/powerpc/configs/pseries_defconfig+5−1
@@ -190,7 +190,8 @@ CONFIG_HVC_RTAS=y · 189 unmodified lines
190190 CONFIG_HVCS=m
191191 CONFIG_VIRTIO_CONSOLE=m
192192 CONFIG_IBM_BSR=m
193−CONFIG_GEN_RTC=y
193+CONFIG_RTC_CLASS=y
194+CONFIG_RTC_DRV_GENERIC=y
194195 CONFIG_RAW_DRIVER=y
195196 CONFIG_MAX_RAW_DEVS=1024
196197 CONFIG_FB=y
@@ -319,3 +320,6 @@ CONFIG_CRYPTO_DEV_NX_ENCRYPT=m · 122 unmodified lines
319320 CONFIG_VIRTUALIZATION=y
320321 CONFIG_KVM_BOOK3S_64=m
321322 CONFIG_KVM_BOOK3S_64_HV=m
323+CONFIG_NEW_LEDS=y
324+CONFIG_LEDS_CLASS=m
325+CONFIG_LEDS_POWERNV=m
arch/powerpc/include/asm/Kbuild+0−1
@@ -6,5 +6,4 @@ generic-y += local64.h · 5 unmodified lines
66 generic-y += mcs_spinlock.h
77 generic-y += preempt.h
88 generic-y += rwsem.h
9−generic-y += trace_clock.h
109 generic-y += vtime.h
arch/powerpc/include/asm/archrandom.h+14−14
@@ -7,13 +7,22 @@ · 6 unmodified lines
77
88 static inline int arch_get_random_long(unsigned long *v)
99 {
10− if (ppc_md.get_random_long)
11− return ppc_md.get_random_long(v);
12−
1310 return 0;
1411 }
1512
1613 static inline int arch_get_random_int(unsigned int *v)
14+{
15+ return 0;
16+}
17+
18+static inline int arch_get_random_seed_long(unsigned long *v)
19+{
20+ if (ppc_md.get_random_seed)
21+ return ppc_md.get_random_seed(v);
22+
23+ return 0;
24+}
25+static inline int arch_get_random_seed_int(unsigned int *v)
1726 {
1827 unsigned long val;
1928 int rc;
@@ -26,23 +35,14 @@ static inline int arch_get_random_int(unsigned int *v) · 6 unmodified lines
2635 }
2736
2837 static inline int arch_has_random(void)
29−{
30− return !!ppc_md.get_random_long;
31−}
32−
33−static inline int arch_get_random_seed_long(unsigned long *v)
34−{
35− return 0;
36−}
37−static inline int arch_get_random_seed_int(unsigned int *v)
3838 {
3939 return 0;
4040 }
41+
4142 static inline int arch_has_random_seed(void)
4243 {
43− return 0;
44+ return !!ppc_md.get_random_seed;
4445 }
45−
4646 #endif /* CONFIG_ARCH_RANDOM */
4747
4848 #ifdef CONFIG_PPC_POWERNV
arch/powerpc/include/asm/cacheflush.h+6−1
@@ -40,7 +40,12 @@ extern void __flush_dcache_icache(void *page_va); · 39 unmodified lines
4040 extern void flush_dcache_icache_page(struct page *page);
4141 #if defined(CONFIG_PPC32) && !defined(CONFIG_BOOKE)
4242 extern void __flush_dcache_icache_phys(unsigned long physaddr);
43−#endif /* CONFIG_PPC32 && !CONFIG_BOOKE */
43+#else
44+static inline void __flush_dcache_icache_phys(unsigned long physaddr)
45+{
46+ BUG();
47+}
48+#endif
4449
4550 extern void flush_dcache_range(unsigned long start, unsigned long stop);
4651 #ifdef CONFIG_PPC32
arch/powerpc/include/asm/checksum.h+28−9
@@ -19,15 +19,6 @@ · 18 unmodified lines
1919 #else
2020 extern __sum16 ip_fast_csum(const void *iph, unsigned int ihl);
2121
22−/*
23− * computes the checksum of the TCP/UDP pseudo-header
24− * returns a 16-bit checksum, already complemented
25− */
26−extern __sum16 csum_tcpudp_magic(__be32 saddr, __be32 daddr,
27− unsigned short len,
28− unsigned short proto,
29− __wsum sum);
30−
3122 /*
3223 * computes the checksum of a memory block at buff, length len,
3324 * and adds in "sum" (32-bit)
@@ -127,6 +118,34 @@ static inline __wsum csum_tcpudp_nofold(__be32 saddr, __be32 daddr, · 93 unmodified lines
127118 #endif
128119 }
129120
121+/*
122+ * computes the checksum of the TCP/UDP pseudo-header
123+ * returns a 16-bit checksum, already complemented
124+ */
125+static inline __sum16 csum_tcpudp_magic(__be32 saddr, __be32 daddr,
126+ unsigned short len,
127+ unsigned short proto,
128+ __wsum sum)
129+{
130+ return csum_fold(csum_tcpudp_nofold(saddr, daddr, len, proto, sum));
131+}
132+
133+#define HAVE_ARCH_CSUM_ADD
134+static inline __wsum csum_add(__wsum csum, __wsum addend)
135+{
136+#ifdef __powerpc64__
137+ u64 res = (__force u64)csum;
138+
139+ res += (__force u64)addend;
140+ return (__force __wsum)((u32)res + (res >> 32));
141+#else
142+ asm("addc %0,%0,%1;"
143+ "addze %0,%0;"
144+ : "+r" (csum) : "r" (addend));
145+ return csum;
146+#endif
147+}
148+
130149 #endif
131150 #endif /* __KERNEL__ */
132151 #endif
arch/powerpc/include/asm/compat.h+7−0
@@ -174,6 +174,13 @@ typedef struct compat_siginfo { · 173 unmodified lines
174174 int _band; /* POLL_IN, POLL_OUT, POLL_MSG */
175175 int _fd;
176176 } _sigpoll;
177+
178+ /* SIGSYS */
179+ struct {
180+ unsigned int _call_addr; /* calling insn */
181+ int _syscall; /* triggering system call number */
182+ unsigned int _arch; /* AUDIT_ARCH_* of syscall */
183+ } _sigsys;
177184 } _sifields;
178185 } compat_siginfo_t;
179186
arch/powerpc/include/asm/device.h+9−6
@@ -10,6 +10,7 @@ struct dma_map_ops; · 9 unmodified lines
1010 struct device_node;
1111 #ifdef CONFIG_PPC64
1212 struct pci_dn;
13+struct iommu_table;
1314 #endif
1415
1516 /*
@@ -23,13 +24,15 @@ struct dev_archdata { · 7 unmodified lines
2324 struct dma_map_ops *dma_ops;
2425
2526 /*
26− * When an iommu is in use, dma_data is used as a ptr to the base of the
27− * iommu_table. Otherwise, it is a simple numerical offset.
27+ * These two used to be a union. However, with the hybrid ops we need
28+ * both so here we store both a DMA offset for direct mappings and
29+ * an iommu_table for remapped DMA.
2830 */
29− union {
30− dma_addr_t dma_offset;
31− void *iommu_table_base;
32− } dma_data;
31+ dma_addr_t dma_offset;
32+
33+#ifdef CONFIG_PPC64
34+ struct iommu_table *iommu_table_base;
35+#endif
3336
3437 #ifdef CONFIG_IOMMU_API
3538 void *iommu_domain;
arch/powerpc/include/asm/dma-mapping.h+7−7
@@ -21,12 +21,12 @@ · 20 unmodified lines
2121 #define DMA_ERROR_CODE (~(dma_addr_t)0x0)
2222
2323 /* Some dma direct funcs must be visible for use in other dma_ops */
24−extern void *dma_direct_alloc_coherent(struct device *dev, size_t size,
25− dma_addr_t *dma_handle, gfp_t flag,
24+extern void *__dma_direct_alloc_coherent(struct device *dev, size_t size,
25+ dma_addr_t *dma_handle, gfp_t flag,
26+ struct dma_attrs *attrs);
27+extern void __dma_direct_free_coherent(struct device *dev, size_t size,
28+ void *vaddr, dma_addr_t dma_handle,
2629 struct dma_attrs *attrs);
27−extern void dma_direct_free_coherent(struct device *dev, size_t size,
28− void *vaddr, dma_addr_t dma_handle,
29− struct dma_attrs *attrs);
3030 extern int dma_direct_mmap_coherent(struct device *dev,
3131 struct vm_area_struct *vma,
3232 void *cpu_addr, dma_addr_t handle,
@@ -106,7 +106,7 @@ static inline void set_dma_ops(struct device *dev, struct dma_map_ops *ops) · 73 unmodified lines
106106 static inline dma_addr_t get_dma_offset(struct device *dev)
107107 {
108108 if (dev)
109− return dev->archdata.dma_data.dma_offset;
109+ return dev->archdata.dma_offset;
110110
111111 return PCI_DRAM_OFFSET;
112112 }
@@ -114,7 +114,7 @@ static inline dma_addr_t get_dma_offset(struct device *dev) · 1 unmodified line
114114 static inline void set_dma_offset(struct device *dev, dma_addr_t off)
115115 {
116116 if (dev)
117− dev->archdata.dma_data.dma_offset = off;
117+ dev->archdata.dma_offset = off;
118118 }
119119
120120 /* this will be removed soon */
arch/powerpc/include/asm/iommu.h+25−6
@@ -2,17 +2,17 @@ · 1 unmodified line
22 * Copyright (C) 2001 Mike Corrigan & Dave Engebretsen, IBM Corporation
33 * Rewrite, cleanup:
44 * Copyright (C) 2004 Olof Johansson <olof@lixom.net>, IBM Corporation
5− *
5+ *
66 * This program is free software; you can redistribute it and/or modify
77 * it under the terms of the GNU General Public License as published by
88 * the Free Software Foundation; either version 2 of the License, or
99 * (at your option) any later version.
10− *
10+ *
1111 * This program is distributed in the hope that it will be useful,
1212 * but WITHOUT ANY WARRANTY; without even the implied warranty of
1313 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
1414 * GNU General Public License for more details.
15− *
15+ *
1616 * You should have received a copy of the GNU General Public License
1717 * along with this program; if not, write to the Free Software
1818 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
@@ -131,16 +131,21 @@ int get_iommu_order(unsigned long size, struct iommu_table *tbl) · 112 unmodified lines
131131
132132 struct scatterlist;
133133
134−static inline void set_iommu_table_base(struct device *dev, void *base)
134+#ifdef CONFIG_PPC64
135+
136+static inline void set_iommu_table_base(struct device *dev,
137+ struct iommu_table *base)
135138 {
136− dev->archdata.dma_data.iommu_table_base = base;
139+ dev->archdata.iommu_table_base = base;
137140 }
138141
139142 static inline void *get_iommu_table_base(struct device *dev)
140143 {
141− return dev->archdata.dma_data.iommu_table_base;
144+ return dev->archdata.iommu_table_base;
142145 }
143146
147+extern int dma_iommu_dma_supported(struct device *dev, u64 mask);
148+
144149 /* Frees table for an individual device node */
145150 extern void iommu_free_table(struct iommu_table *tbl, const char *node_name);
146151
@@ -225,6 +230,20 @@ static inline int __init tce_iommu_bus_notifier_init(void) · 78 unmodified lines
225230 }
226231 #endif /* !CONFIG_IOMMU_API */
227232
233+#else
234+
235+static inline void *get_iommu_table_base(struct device *dev)
236+{
237+ return NULL;
238+}
239+
240+static inline int dma_iommu_dma_supported(struct device *dev, u64 mask)
241+{
242+ return 0;
243+}
244+
245+#endif /* CONFIG_PPC64 */
246+
228247 extern int ppc_iommu_map_sg(struct device *dev, struct iommu_table *tbl,
229248 struct scatterlist *sglist, int nelems,
230249 unsigned long mask,
arch/powerpc/include/asm/machdep.h+1−1
@@ -249,7 +249,7 @@ struct machdep_calls { · 248 unmodified lines
249249 #endif
250250
251251 #ifdef CONFIG_ARCH_RANDOM
252− int (*get_random_long)(unsigned long *v);
252+ int (*get_random_seed)(unsigned long *v);
253253 #endif
254254 };
255255
arch/powerpc/include/asm/opal-api.h+123−1
@@ -154,7 +154,10 @@ · 153 unmodified lines
154154 #define OPAL_FLASH_WRITE 111
155155 #define OPAL_FLASH_ERASE 112
156156 #define OPAL_PRD_MSG 113
157−#define OPAL_LAST 113
157+#define OPAL_LEDS_GET_INDICATOR 114
158+#define OPAL_LEDS_SET_INDICATOR 115
159+#define OPAL_CEC_REBOOT2 116
160+#define OPAL_LAST 116
158161
159162 /* Device tree flags */
160163
@@ -340,6 +343,18 @@ enum OpalPciResetState { · 179 unmodified lines
340343 OPAL_ASSERT_RESET = 1
341344 };
342345
346+enum OpalSlotLedType {
347+ OPAL_SLOT_LED_TYPE_ID = 0, /* IDENTIFY LED */
348+ OPAL_SLOT_LED_TYPE_FAULT = 1, /* FAULT LED */
349+ OPAL_SLOT_LED_TYPE_ATTN = 2, /* System Attention LED */
350+ OPAL_SLOT_LED_TYPE_MAX = 3
351+};
352+
353+enum OpalSlotLedState {
354+ OPAL_SLOT_LED_STATE_OFF = 0, /* LED is OFF */
355+ OPAL_SLOT_LED_STATE_ON = 1 /* LED is ON */
356+};
357+
343358 /*
344359 * Address cycle types for LPC accesses. These also correspond
345360 * to the content of the first cell of the "reg" property for
@@ -438,6 +453,7 @@ struct OpalMemoryErrorData { · 92 unmodified lines
438453 /* HMI interrupt event */
439454 enum OpalHMI_Version {
440455 OpalHMIEvt_V1 = 1,
456+ OpalHMIEvt_V2 = 2,
441457 };
442458
443459 enum OpalHMI_Severity {
@@ -468,6 +484,49 @@ enum OpalHMI_ErrType { · 24 unmodified lines
468484 OpalHMI_ERROR_CAPP_RECOVERY,
469485 };
470486
487+enum OpalHMI_XstopType {
488+ CHECKSTOP_TYPE_UNKNOWN = 0,
489+ CHECKSTOP_TYPE_CORE = 1,
490+ CHECKSTOP_TYPE_NX = 2,
491+};
492+
493+enum OpalHMI_CoreXstopReason {
494+ CORE_CHECKSTOP_IFU_REGFILE = 0x00000001,
495+ CORE_CHECKSTOP_IFU_LOGIC = 0x00000002,
496+ CORE_CHECKSTOP_PC_DURING_RECOV = 0x00000004,
497+ CORE_CHECKSTOP_ISU_REGFILE = 0x00000008,
498+ CORE_CHECKSTOP_ISU_LOGIC = 0x00000010,
499+ CORE_CHECKSTOP_FXU_LOGIC = 0x00000020,
500+ CORE_CHECKSTOP_VSU_LOGIC = 0x00000040,
501+ CORE_CHECKSTOP_PC_RECOV_IN_MAINT_MODE = 0x00000080,
502+ CORE_CHECKSTOP_LSU_REGFILE = 0x00000100,
503+ CORE_CHECKSTOP_PC_FWD_PROGRESS = 0x00000200,
504+ CORE_CHECKSTOP_LSU_LOGIC = 0x00000400,
505+ CORE_CHECKSTOP_PC_LOGIC = 0x00000800,
506+ CORE_CHECKSTOP_PC_HYP_RESOURCE = 0x00001000,
507+ CORE_CHECKSTOP_PC_HANG_RECOV_FAILED = 0x00002000,
508+ CORE_CHECKSTOP_PC_AMBI_HANG_DETECTED = 0x00004000,
509+ CORE_CHECKSTOP_PC_DEBUG_TRIG_ERR_INJ = 0x00008000,
510+ CORE_CHECKSTOP_PC_SPRD_HYP_ERR_INJ = 0x00010000,
511+};
512+
513+enum OpalHMI_NestAccelXstopReason {
514+ NX_CHECKSTOP_SHM_INVAL_STATE_ERR = 0x00000001,
515+ NX_CHECKSTOP_DMA_INVAL_STATE_ERR_1 = 0x00000002,
516+ NX_CHECKSTOP_DMA_INVAL_STATE_ERR_2 = 0x00000004,
517+ NX_CHECKSTOP_DMA_CH0_INVAL_STATE_ERR = 0x00000008,
518+ NX_CHECKSTOP_DMA_CH1_INVAL_STATE_ERR = 0x00000010,
519+ NX_CHECKSTOP_DMA_CH2_INVAL_STATE_ERR = 0x00000020,
520+ NX_CHECKSTOP_DMA_CH3_INVAL_STATE_ERR = 0x00000040,
521+ NX_CHECKSTOP_DMA_CH4_INVAL_STATE_ERR = 0x00000080,
522+ NX_CHECKSTOP_DMA_CH5_INVAL_STATE_ERR = 0x00000100,
523+ NX_CHECKSTOP_DMA_CH6_INVAL_STATE_ERR = 0x00000200,
524+ NX_CHECKSTOP_DMA_CH7_INVAL_STATE_ERR = 0x00000400,
525+ NX_CHECKSTOP_DMA_CRB_UE = 0x00000800,
526+ NX_CHECKSTOP_DMA_CRB_SUE = 0x00001000,
527+ NX_CHECKSTOP_PBI_ISN_UE = 0x00002000,
528+};
529+
471530 struct OpalHMIEvent {
472531 uint8_t version; /* 0x00 */
473532 uint8_t severity; /* 0x01 */
@@ -478,6 +537,23 @@ struct OpalHMIEvent { · 4 unmodified lines
478537 __be64 hmer;
479538 /* TFMR register. Valid only for TFAC and TFMR_PARITY error type. */
480539 __be64 tfmr;
540+
541+ /* version 2 and later */
542+ union {
543+ /*
544+ * checkstop info (Core/NX).
545+ * Valid for OpalHMI_ERROR_MALFUNC_ALERT.
546+ */
547+ struct {
548+ uint8_t xstop_type; /* enum OpalHMI_XstopType */
549+ uint8_t reserved_1[3];
550+ __be32 xstop_reason;
551+ union {
552+ __be32 pir; /* for CHECKSTOP_TYPE_CORE */
553+ __be32 chip_id; /* for CHECKSTOP_TYPE_NX */
554+ } u;
555+ } xstop_error;
556+ } u;
481557 };
482558
483559 enum {
@@ -768,6 +844,52 @@ struct opal_i2c_request { · 284 unmodified lines
768844 __be64 buffer_ra; /* Buffer real address */
769845 };
770846
847+/*
848+ * EPOW status sharing (OPAL and the host)
849+ *
850+ * The host will pass on OPAL, a buffer of length OPAL_SYSEPOW_MAX
851+ * with individual elements being 16 bits wide to fetch the system
852+ * wide EPOW status. Each element in the buffer will contain the
853+ * EPOW status in it's bit representation for a particular EPOW sub
854+ * class as defiend here. So multiple detailed EPOW status bits
855+ * specific for any sub class can be represented in a single buffer
856+ * element as it's bit representation.
857+ */
858+
859+/* System EPOW type */
860+enum OpalSysEpow {
861+ OPAL_SYSEPOW_POWER = 0, /* Power EPOW */
862+ OPAL_SYSEPOW_TEMP = 1, /* Temperature EPOW */
863+ OPAL_SYSEPOW_COOLING = 2, /* Cooling EPOW */
864+ OPAL_SYSEPOW_MAX = 3, /* Max EPOW categories */
865+};
866+
867+/* Power EPOW */
868+enum OpalSysPower {
869+ OPAL_SYSPOWER_UPS = 0x0001, /* System on UPS power */
870+ OPAL_SYSPOWER_CHNG = 0x0002, /* System power config change */
871+ OPAL_SYSPOWER_FAIL = 0x0004, /* System impending power failure */
872+ OPAL_SYSPOWER_INCL = 0x0008, /* System incomplete power */
873+};
874+
875+/* Temperature EPOW */
876+enum OpalSysTemp {
877+ OPAL_SYSTEMP_AMB = 0x0001, /* System over ambient temperature */
878+ OPAL_SYSTEMP_INT = 0x0002, /* System over internal temperature */
879+ OPAL_SYSTEMP_HMD = 0x0004, /* System over ambient humidity */
880+};
881+
882+/* Cooling EPOW */
883+enum OpalSysCooling {
884+ OPAL_SYSCOOL_INSF = 0x0001, /* System insufficient cooling */
885+};
886+
887+/* Argument to OPAL_CEC_REBOOT2() */
888+enum {
889+ OPAL_REBOOT_NORMAL = 0,
890+ OPAL_REBOOT_PLATFORM_ERROR = 1,
891+};
892+
771893 #endif /* __ASSEMBLY__ */
772894
773895 #endif /* __OPAL_API_H */
arch/powerpc/include/asm/opal.h+7−1
@@ -44,6 +44,7 @@ int64_t opal_tpo_write(uint64_t token, uint32_t year_mon_day, · 43 unmodified lines
4444 uint32_t hour_min);
4545 int64_t opal_cec_power_down(uint64_t request);
4646 int64_t opal_cec_reboot(void);
47+int64_t opal_cec_reboot2(uint32_t reboot_type, char *diag);
4748 int64_t opal_read_nvram(uint64_t buffer, uint64_t size, uint64_t offset);
4849 int64_t opal_write_nvram(uint64_t buffer, uint64_t size, uint64_t offset);
4950 int64_t opal_handle_interrupt(uint64_t isn, __be64 *outstanding_event_mask);
@@ -141,7 +142,8 @@ int64_t opal_pci_fence_phb(uint64_t phb_id); · 91 unmodified lines
141142 int64_t opal_pci_reinit(uint64_t phb_id, uint64_t reinit_scope, uint64_t data);
142143 int64_t opal_pci_mask_pe_error(uint64_t phb_id, uint16_t pe_number, uint8_t error_type, uint8_t mask_action);
143144 int64_t opal_set_slot_led_status(uint64_t phb_id, uint64_t slot_id, uint8_t led_type, uint8_t led_action);
144−int64_t opal_get_epow_status(__be64 *status);
145+int64_t opal_get_epow_status(__be16 *epow_status, __be16 *num_epow_classes);
146+int64_t opal_get_dpo_status(__be64 *dpo_timeout);
145147 int64_t opal_set_system_attention_led(uint8_t led_action);
146148 int64_t opal_pci_next_error(uint64_t phb_id, __be64 *first_frozen_pe,
147149 __be16 *pci_error_type, __be16 *severity);
@@ -195,6 +197,10 @@ int64_t opal_ipmi_recv(uint64_t interface, struct opal_ipmi_msg *msg, · 47 unmodified lines
195197 int64_t opal_i2c_request(uint64_t async_token, uint32_t bus_id,
196198 struct opal_i2c_request *oreq);
197199 int64_t opal_prd_msg(struct opal_prd_msg *msg);
200+int64_t opal_leds_get_ind(char *loc_code, __be64 *led_mask,
201+ __be64 *led_value, __be64 *max_led_type);
202+int64_t opal_leds_set_ind(uint64_t token, char *loc_code, const u64 led_mask,
203+ const u64 led_value, __be64 *max_led_type);
198204
199205 int64_t opal_flash_read(uint64_t id, uint64_t offset, uint64_t buf,
200206 uint64_t size, uint64_t token);
arch/powerpc/include/asm/pci-bridge.h+1−0
@@ -42,6 +42,7 @@ struct pci_controller_ops { · 41 unmodified lines
4242 #endif
4343
4444 int (*dma_set_mask)(struct pci_dev *dev, u64 dma_mask);
45+ u64 (*dma_get_required_mask)(struct pci_dev *dev);
4546
4647 void (*shutdown)(struct pci_controller *);
4748 };
arch/powerpc/include/asm/pgtable-ppc64.h+4−4
@@ -134,11 +134,11 @@ · 133 unmodified lines
134134
135135 #define pte_iterate_hashed_end() } while(0)
136136
137−#ifdef CONFIG_PPC_HAS_HASH_64K
138−#define pte_pagesize_index(mm, addr, pte) get_slice_psize(mm, addr)
139−#else
137+/*
138+ * We expect this to be called only for user addresses or kernel virtual
139+ * addresses other than the linear mapping.
140+ */
140141 #define pte_pagesize_index(mm, addr, pte) MMU_PAGE_4K
141−#endif
142142
143143 #endif /* __real_pte */
144144
arch/powerpc/include/asm/pgtable.h+11−0
@@ -169,6 +169,17 @@ static inline void __set_pte_at(struct mm_struct *mm, unsigned long addr, · 168 unmodified lines
169169 * cases, and 32-bit non-hash with 32-bit PTEs.
170170 */
171171 *ptep = pte;
172+
173+#ifdef CONFIG_PPC_BOOK3E_64
174+ /*
175+ * With hardware tablewalk, a sync is needed to ensure that
176+ * subsequent accesses see the PTE we just wrote. Unlike userspace
177+ * mappings, we can't tolerate spurious faults, so make sure
178+ * the new PTE will be seen the first time.
179+ */
180+ if (is_kernel_addr(addr))
181+ mb();
182+#endif
172183 #endif
173184 }
174185
arch/powerpc/include/asm/ppc-pci.h+1−0
@@ -61,6 +61,7 @@ int rtas_write_config(struct pci_dn *, int where, int size, u32 val); · 60 unmodified lines
6161 int rtas_read_config(struct pci_dn *, int where, int size, u32 *val);
6262 void eeh_pe_state_mark(struct eeh_pe *pe, int state);
6363 void eeh_pe_state_clear(struct eeh_pe *pe, int state);
64+void eeh_pe_state_mark_with_cfg(struct eeh_pe *pe, int state);
6465 void eeh_pe_dev_mode_mark(struct eeh_pe *pe, int mode);
6566
6667 void eeh_sysfs_add_device(struct pci_dev *pdev);
arch/powerpc/include/asm/processor.h+0−1
@@ -264,7 +264,6 @@ struct thread_struct { · 263 unmodified lines
264264 u64 tm_tfhar; /* Transaction fail handler addr */
265265 u64 tm_texasr; /* Transaction exception & summary */
266266 u64 tm_tfiar; /* Transaction fail instr address reg */
267− unsigned long tm_orig_msr; /* Thread's MSR on ctx switch */
268267 struct pt_regs ckpt_regs; /* Checkpointed registers */
269268
270269 unsigned long tm_tar;
arch/powerpc/include/asm/pte-common.h+2−1
@@ -109,7 +109,8 @@ extern unsigned long bad_call_to_PMD_PAGE_SIZE(void); · 108 unmodified lines
109109 * the processor might need it for DMA coherency.
110110 */
111111 #define _PAGE_BASE_NC (_PAGE_PRESENT | _PAGE_ACCESSED | _PAGE_PSIZE)
112−#if defined(CONFIG_SMP) || defined(CONFIG_PPC_STD_MMU)
112+#if defined(CONFIG_SMP) || defined(CONFIG_PPC_STD_MMU) || \
113+ defined(CONFIG_PPC_E500MC)
113114 #define _PAGE_BASE (_PAGE_BASE_NC | _PAGE_COHERENT)
114115 #else
115116 #define _PAGE_BASE (_PAGE_BASE_NC)
arch/powerpc/include/asm/reg.h+10−2
@@ -1193,8 +1193,7 @@ · 1192 unmodified lines
11931193 #ifdef CONFIG_PPC_BOOK3S_64
11941194 #define __mtmsrd(v, l) asm volatile("mtmsrd %0," __stringify(l) \
11951195 : : "r" (v) : "memory")
1196−#define mtmsrd(v) __mtmsrd((v), 0)
1197−#define mtmsr(v) mtmsrd(v)
1196+#define mtmsr(v) __mtmsrd((v), 0)
11981197 #else
11991198 #define mtmsr(v) asm volatile("mtmsr %0" : \
12001199 : "r" ((unsigned long)(v)) \
@@ -1281,6 +1280,15 @@ struct pt_regs; · 80 unmodified lines
12811280
12821281 extern void ppc_save_regs(struct pt_regs *regs);
12831282
1283+static inline void update_power8_hid0(unsigned long hid0)
1284+{
1285+ /*
1286+ * The HID0 update on Power8 should at the very least be
1287+ * preceded by a a SYNC instruction followed by an ISYNC
1288+ * instruction
1289+ */
1290+ asm volatile("sync; mtspr %0,%1; isync":: "i"(SPRN_HID0), "r"(hid0));
1291+}
12841292 #endif /* __ASSEMBLY__ */
12851293 #endif /* __KERNEL__ */
12861294 #endif /* _ASM_POWERPC_REG_H */
arch/powerpc/include/asm/rtas.h+1−0
@@ -343,6 +343,7 @@ extern void rtas_power_off(void); · 342 unmodified lines
343343 extern void rtas_halt(void);
344344 extern void rtas_os_term(char *str);
345345 extern int rtas_get_sensor(int sensor, int index, int *state);
346+extern int rtas_get_sensor_fast(int sensor, int index, int *state);
346347 extern int rtas_get_power_level(int powerdomain, int *level);
347348 extern int rtas_set_power_level(int powerdomain, int level, int *setlevel);
348349 extern bool rtas_indicator_present(int token, int *maxindex);
arch/powerpc/include/asm/spu_csa.h+0−6
@@ -241,12 +241,6 @@ struct spu_priv2_collapsed { · 240 unmodified lines
241241 */
242242 struct spu_state {
243243 struct spu_lscsa *lscsa;
244−#ifdef CONFIG_SPU_FS_64K_LS
245− int use_big_pages;
246− /* One struct page per 64k page */
247−#define SPU_LSCSA_NUM_BIG_PAGES (sizeof(struct spu_lscsa) / 0x10000)
248− struct page *lscsa_pages[SPU_LSCSA_NUM_BIG_PAGES];
249−#endif
250244 struct spu_problem_collapsed prob;
251245 struct spu_priv1_collapsed priv1;
252246 struct spu_priv2_collapsed priv2;
arch/powerpc/include/asm/syscall.h+33−21
@@ -22,10 +22,15 @@ · 21 unmodified lines
2222 extern const unsigned long sys_call_table[];
2323 #endif /* CONFIG_FTRACE_SYSCALLS */
2424
25−static inline long syscall_get_nr(struct task_struct *task,
26− struct pt_regs *regs)
25+static inline int syscall_get_nr(struct task_struct *task, struct pt_regs *regs)
2726 {
28− return TRAP(regs) == 0xc00 ? regs->gpr[0] : -1L;
27+ /*
28+ * Note that we are returning an int here. That means 0xffffffff, ie.
29+ * 32-bit negative 1, will be interpreted as -1 on a 64-bit kernel.
30+ * This is important for seccomp so that compat tasks can set r0 = -1
31+ * to reject the syscall.
32+ */
33+ return TRAP(regs) == 0xc00 ? regs->gpr[0] : -1;
2934 }
3035
3136 static inline void syscall_rollback(struct task_struct *task,
@@ -34,12 +39,6 @@ static inline void syscall_rollback(struct task_struct *task, · 2 unmodified lines
3439 regs->gpr[3] = regs->orig_gpr3;
3540 }
3641
37−static inline long syscall_get_error(struct task_struct *task,
38− struct pt_regs *regs)
39−{
40− return (regs->ccr & 0x10000000) ? -regs->gpr[3] : 0;
41−}
42−
4342 static inline long syscall_get_return_value(struct task_struct *task,
4443 struct pt_regs *regs)
4544 {
@@ -50,9 +49,15 @@ static inline void syscall_set_return_value(struct task_struct *task, · 4 unmodified lines
5049 struct pt_regs *regs,
5150 int error, long val)
5251 {
52+ /*
53+ * In the general case it's not obvious that we must deal with CCR
54+ * here, as the syscall exit path will also do that for us. However
55+ * there are some places, eg. the signal code, which check ccr to
56+ * decide if the value in r3 is actually an error.
57+ */
5358 if (error) {
5459 regs->ccr |= 0x10000000L;
55− regs->gpr[3] = -error;
60+ regs->gpr[3] = error;
5661 } else {
5762 regs->ccr &= ~0x10000000L;
5863 regs->gpr[3] = val;
@@ -64,19 +69,22 @@ static inline void syscall_get_arguments(struct task_struct *task, · 5 unmodified lines
6469 unsigned int i, unsigned int n,
6570 unsigned long *args)
6671 {
72+ unsigned long val, mask = -1UL;
73+
6774 BUG_ON(i + n > 6);
68−#ifdef CONFIG_PPC64
69− if (test_tsk_thread_flag(task, TIF_32BIT)) {
70− /*
71− * Zero-extend 32-bit argument values. The high bits are
72− * garbage ignored by the actual syscall dispatch.
73− */
74− while (n-- > 0)
75− args[n] = (u32) regs->gpr[3 + i + n];
76− return;
77− }
75+
76+#ifdef CONFIG_COMPAT
77+ if (test_tsk_thread_flag(task, TIF_32BIT))
78+ mask = 0xffffffff;
7879 #endif
79− memcpy(args, &regs->gpr[3 + i], n * sizeof(args[0]));
80+ while (n--) {
81+ if (n == 0 && i == 0)
82+ val = regs->orig_gpr3;
83+ else
84+ val = regs->gpr[3 + i + n];
85+
86+ args[n] = val & mask;
87+ }
8088 }
8189
8290 static inline void syscall_set_arguments(struct task_struct *task,
@@ -86,6 +94,10 @@ static inline void syscall_set_arguments(struct task_struct *task, · 3 unmodified lines
8694 {
8795 BUG_ON(i + n > 6);
8896 memcpy(&regs->gpr[3 + i], args, n * sizeof(args[0]));
97+
98+ /* Also copy the first argument into orig_gpr3 */
99+ if (i == 0 && n > 0)
100+ regs->orig_gpr3 = args[0];
89101 }
90102
91103 static inline int syscall_get_arch(void)
arch/powerpc/include/asm/trace_clock.h+19−0
@@ -0,0 +1,19 @@
1+/*
2+ * This program is free software; you can redistribute it and/or modify
3+ * it under the terms of the GNU General Public License, version 2, as
4+ * published by the Free Software Foundation.
5+ *
6+ * Copyright (C) 2015 Naveen N. Rao, IBM Corporation
7+ */
8+
9+#ifndef _ASM_PPC_TRACE_CLOCK_H
10+#define _ASM_PPC_TRACE_CLOCK_H
11+
12+#include <linux/compiler.h>
13+#include <linux/types.h>
14+
15+extern u64 notrace trace_clock_ppc_tb(void);
16+
17+#define ARCH_TRACE_CLOCKS { trace_clock_ppc_tb, "ppc-tb", 0 },
18+
19+#endif /* _ASM_PPC_TRACE_CLOCK_H */
arch/powerpc/include/uapi/asm/Kbuild+1−0
@@ -6,6 +6,7 @@ header-y += bitsperlong.h · 5 unmodified lines
66 header-y += bootx.h
77 header-y += byteorder.h
88 header-y += cputable.h
9+header-y += eeh.h
910 header-y += elf.h
1011 header-y += epapr_hcalls.h
1112 header-y += errno.h
arch/powerpc/include/uapi/asm/errno.h+0−2
@@ -6,6 +6,4 @@ · 5 unmodified lines
66 #undef EDEADLOCK
77 #define EDEADLOCK 58 /* File locking deadlock error */
88
9−#define _LAST_ERRNO 516
10−
119 #endif /* _ASM_POWERPC_ERRNO_H */
arch/powerpc/include/uapi/asm/sigcontext.h+2−2
@@ -28,7 +28,7 @@ struct sigcontext { · 27 unmodified lines
2828 /*
2929 * To maintain compatibility with current implementations the sigcontext is
3030 * extended by appending a pointer (v_regs) to a quadword type (elf_vrreg_t)
31− * followed by an unstructured (vmx_reserve) field of 69 doublewords. This
31+ * followed by an unstructured (vmx_reserve) field of 101 doublewords. This
3232 * allows the array of vector registers to be quadword aligned independent of
3333 * the alignment of the containing sigcontext or ucontext. It is the
3434 * responsibility of the code setting the sigcontext to set this pointer to
@@ -80,7 +80,7 @@ struct sigcontext { · 45 unmodified lines
8080 * registers and vscr/vrsave.
8181 */
8282 elf_vrreg_t __user *v_regs;
83− long vmx_reserve[ELF_NVRREG+ELF_NVRREG+32+1];
83+ long vmx_reserve[ELF_NVRREG + ELF_NVRREG + 1 + 32];
8484 #endif
8585 };
8686
arch/powerpc/kernel/Makefile+1−0
@@ -118,6 +118,7 @@ obj-$(CONFIG_PPC_IO_WORKAROUNDS) += io-workarounds.o · 117 unmodified lines
118118 obj-$(CONFIG_DYNAMIC_FTRACE) += ftrace.o
119119 obj-$(CONFIG_FUNCTION_GRAPH_TRACER) += ftrace.o
120120 obj-$(CONFIG_FTRACE_SYSCALLS) += ftrace.o
121+obj-$(CONFIG_TRACING) += trace_clock.o
121122
122123 ifneq ($(CONFIG_PPC_INDIRECT_PIO),y)
123124 obj-y += iomap.o
arch/powerpc/kernel/asm-offsets.c+0−1
@@ -213,7 +213,6 @@ int main(void) · 212 unmodified lines
213213 offsetof(struct tlb_core_data, esel_max));
214214 DEFINE(TCD_ESEL_FIRST,
215215 offsetof(struct tlb_core_data, esel_first));
216− DEFINE(TCD_LOCK, offsetof(struct tlb_core_data, lock));
217216 #endif /* CONFIG_PPC_BOOK3E */
218217
219218 #ifdef CONFIG_PPC_STD_MMU_64
arch/powerpc/kernel/dma-iommu.c+1−1
@@ -73,7 +73,7 @@ static void dma_iommu_unmap_sg(struct device *dev, struct scatterlist *sglist, · 72 unmodified lines
7373 }
7474
7575 /* We support DMA to/from any memory page via the iommu */
76−static int dma_iommu_dma_supported(struct device *dev, u64 mask)
76+int dma_iommu_dma_supported(struct device *dev, u64 mask)
7777 {
7878 struct iommu_table *tbl = get_iommu_table_base(dev);
7979
arch/powerpc/kernel/dma-swiotlb.c+2−2
@@ -47,8 +47,8 @@ static u64 swiotlb_powerpc_get_required(struct device *dev) · 46 unmodified lines
4747 * for everything else.
4848 */
4949 struct dma_map_ops swiotlb_dma_ops = {
50− .alloc = dma_direct_alloc_coherent,
51− .free = dma_direct_free_coherent,
50+ .alloc = __dma_direct_alloc_coherent,
51+ .free = __dma_direct_free_coherent,
5252 .mmap = dma_direct_mmap_coherent,
5353 .map_sg = swiotlb_map_sg_attrs,
5454 .unmap_sg = swiotlb_unmap_sg_attrs,
arch/powerpc/kernel/dma.c+100−18
@@ -16,6 +16,7 @@ · 15 unmodified lines
1616 #include <asm/bug.h>
1717 #include <asm/machdep.h>
1818 #include <asm/swiotlb.h>
19+#include <asm/iommu.h>
1920
2021 /*
2122 * Generic direct DMA implementation
@@ -39,9 +40,31 @@ static u64 __maybe_unused get_pfn_limit(struct device *dev) · 17 unmodified lines
3940 return pfn;
4041 }
4142
42−void *dma_direct_alloc_coherent(struct device *dev, size_t size,
43− dma_addr_t *dma_handle, gfp_t flag,
44− struct dma_attrs *attrs)
43+static int dma_direct_dma_supported(struct device *dev, u64 mask)
44+{
45+#ifdef CONFIG_PPC64
46+ u64 limit = get_dma_offset(dev) + (memblock_end_of_DRAM() - 1);
47+
48+ /* Limit fits in the mask, we are good */
49+ if (mask >= limit)
50+ return 1;
51+
52+#ifdef CONFIG_FSL_SOC
53+ /* Freescale gets another chance via ZONE_DMA/ZONE_DMA32, however
54+ * that will have to be refined if/when they support iommus
55+ */
56+ return 1;
57+#endif
58+ /* Sorry ... */
59+ return 0;
60+#else
61+ return 1;
62+#endif
63+}
64+
65+void *__dma_direct_alloc_coherent(struct device *dev, size_t size,
66+ dma_addr_t *dma_handle, gfp_t flag,
67+ struct dma_attrs *attrs)
4568 {
4669 void *ret;
4770 #ifdef CONFIG_NOT_COHERENT_CACHE
@@ -96,9 +119,9 @@ void *dma_direct_alloc_coherent(struct device *dev, size_t size, · 48 unmodified lines
96119 #endif
97120 }
98121
99−void dma_direct_free_coherent(struct device *dev, size_t size,
100− void *vaddr, dma_addr_t dma_handle,
101− struct dma_attrs *attrs)
122+void __dma_direct_free_coherent(struct device *dev, size_t size,
123+ void *vaddr, dma_addr_t dma_handle,
124+ struct dma_attrs *attrs)
102125 {
103126 #ifdef CONFIG_NOT_COHERENT_CACHE
104127 __dma_free_coherent(size, vaddr);
@@ -107,6 +130,51 @@ void dma_direct_free_coherent(struct device *dev, size_t size, · 2 unmodified lines
107130 #endif
108131 }
109132
133+static void *dma_direct_alloc_coherent(struct device *dev, size_t size,
134+ dma_addr_t *dma_handle, gfp_t flag,
135+ struct dma_attrs *attrs)
136+{
137+ struct iommu_table *iommu;
138+
139+ /* The coherent mask may be smaller than the real mask, check if
140+ * we can really use the direct ops
141+ */
142+ if (dma_direct_dma_supported(dev, dev->coherent_dma_mask))
143+ return __dma_direct_alloc_coherent(dev, size, dma_handle,
144+ flag, attrs);
145+
146+ /* Ok we can't ... do we have an iommu ? If not, fail */
147+ iommu = get_iommu_table_base(dev);
148+ if (!iommu)
149+ return NULL;
150+
151+ /* Try to use the iommu */
152+ return iommu_alloc_coherent(dev, iommu, size, dma_handle,
153+ dev->coherent_dma_mask, flag,
154+ dev_to_node(dev));
155+}
156+
157+static void dma_direct_free_coherent(struct device *dev, size_t size,
158+ void *vaddr, dma_addr_t dma_handle,
159+ struct dma_attrs *attrs)
160+{
161+ struct iommu_table *iommu;
162+
163+ /* See comments in dma_direct_alloc_coherent() */
164+ if (dma_direct_dma_supported(dev, dev->coherent_dma_mask))
165+ return __dma_direct_free_coherent(dev, size, vaddr, dma_handle,
166+ attrs);
167+ /* Maybe we used an iommu ... */
168+ iommu = get_iommu_table_base(dev);
169+
170+ /* If we hit that we should have never allocated in the first
171+ * place so how come we are freeing ?
172+ */
173+ if (WARN_ON(!iommu))
174+ return;
175+ iommu_free_coherent(iommu, size, vaddr, dma_handle);
176+}
177+
110178 int dma_direct_mmap_coherent(struct device *dev, struct vm_area_struct *vma,
111179 void *cpu_addr, dma_addr_t handle, size_t size,
112180 struct dma_attrs *attrs)
@@ -147,18 +215,6 @@ static void dma_direct_unmap_sg(struct device *dev, struct scatterlist *sg, · 34 unmodified lines
147215 {
148216 }
149217
150−static int dma_direct_dma_supported(struct device *dev, u64 mask)
151−{
152−#ifdef CONFIG_PPC64
153− /* Could be improved so platforms can set the limit in case
154− * they have limited DMA windows
155− */
156− return mask >= get_dma_offset(dev) + (memblock_end_of_DRAM() - 1);
157−#else
158− return 1;
159−#endif
160−}
161−
162218 static u64 dma_direct_get_required_mask(struct device *dev)
163219 {
164220 u64 end, mask;
@@ -230,6 +286,25 @@ struct dma_map_ops dma_direct_ops = { · 65 unmodified lines
230286 };
231287 EXPORT_SYMBOL(dma_direct_ops);
232288
289+int dma_set_coherent_mask(struct device *dev, u64 mask)
290+{
291+ if (!dma_supported(dev, mask)) {
292+ /*
293+ * We need to special case the direct DMA ops which can
294+ * support a fallback for coherent allocations. There
295+ * is no dma_op->set_coherent_mask() so we have to do
296+ * things the hard way:
297+ */
298+ if (get_dma_ops(dev) != &dma_direct_ops ||
299+ get_iommu_table_base(dev) == NULL ||
300+ !dma_iommu_dma_supported(dev, mask))
301+ return -EIO;
302+ }
303+ dev->coherent_dma_mask = mask;
304+ return 0;
305+}
306+EXPORT_SYMBOL_GPL(dma_set_coherent_mask);
307+
233308 #define PREALLOC_DMA_DEBUG_ENTRIES (1 << 16)
234309
235310 int __dma_set_mask(struct device *dev, u64 dma_mask)
@@ -278,6 +353,13 @@ u64 dma_get_required_mask(struct device *dev) · 42 unmodified lines
278353 if (ppc_md.dma_get_required_mask)
279354 return ppc_md.dma_get_required_mask(dev);
280355
356+ if (dev_is_pci(dev)) {
357+ struct pci_dev *pdev = to_pci_dev(dev);
358+ struct pci_controller *phb = pci_bus_to_host(pdev->bus);
359+ if (phb->controller_ops.dma_get_required_mask)
360+ return phb->controller_ops.dma_get_required_mask(pdev);
361+ }
362+
281363 return __dma_get_required_mask(dev);
282364 }
283365 EXPORT_SYMBOL_GPL(dma_get_required_mask);
arch/powerpc/kernel/eeh.c+23−8
@@ -308,11 +308,26 @@ void eeh_slot_error_detail(struct eeh_pe *pe, int severity) · 307 unmodified lines
308308 if (!(pe->type & EEH_PE_PHB)) {
309309 if (eeh_has_flag(EEH_ENABLE_IO_FOR_LOG))
310310 eeh_pci_enable(pe, EEH_OPT_THAW_MMIO);
311+
312+ /*
313+ * The config space of some PCI devices can't be accessed
314+ * when their PEs are in frozen state. Otherwise, fenced
315+ * PHB might be seen. Those PEs are identified with flag
316+ * EEH_PE_CFG_RESTRICTED, indicating EEH_PE_CFG_BLOCKED
317+ * is set automatically when the PE is put to EEH_PE_ISOLATED.
318+ *
319+ * Restoring BARs possibly triggers PCI config access in
320+ * (OPAL) firmware and then causes fenced PHB. If the
321+ * PCI config is blocked with flag EEH_PE_CFG_BLOCKED, it's
322+ * pointless to restore BARs and dump config space.
323+ */
311324 eeh_ops->configure_bridge(pe);
312− eeh_pe_restore_bars(pe);
325+ if (!(pe->state & EEH_PE_CFG_BLOCKED)) {
326+ eeh_pe_restore_bars(pe);
313327
314− pci_regs_buf[0] = 0;
315− eeh_pe_traverse(pe, eeh_dump_pe_log, &loglen);
328+ pci_regs_buf[0] = 0;
329+ eeh_pe_traverse(pe, eeh_dump_pe_log, &loglen);
330+ }
316331 }
317332
318333 eeh_ops->get_log(pe, severity, pci_regs_buf, loglen);
@@ -750,14 +765,14 @@ int pcibios_set_pcie_reset_state(struct pci_dev *dev, enum pcie_reset_state stat · 431 unmodified lines
750765 eeh_pe_state_clear(pe, EEH_PE_ISOLATED);
751766 break;
752767 case pcie_hot_reset:
753− eeh_pe_state_mark(pe, EEH_PE_ISOLATED);
768+ eeh_pe_state_mark_with_cfg(pe, EEH_PE_ISOLATED);
754769 eeh_ops->set_option(pe, EEH_OPT_FREEZE_PE);
755770 eeh_pe_dev_traverse(pe, eeh_disable_and_save_dev_state, dev);
756771 eeh_pe_state_mark(pe, EEH_PE_CFG_BLOCKED);
757772 eeh_ops->reset(pe, EEH_RESET_HOT);
758773 break;
759774 case pcie_warm_reset:
760− eeh_pe_state_mark(pe, EEH_PE_ISOLATED);
775+ eeh_pe_state_mark_with_cfg(pe, EEH_PE_ISOLATED);
761776 eeh_ops->set_option(pe, EEH_OPT_FREEZE_PE);
762777 eeh_pe_dev_traverse(pe, eeh_disable_and_save_dev_state, dev);
763778 eeh_pe_state_mark(pe, EEH_PE_CFG_BLOCKED);
@@ -1116,9 +1131,6 @@ void eeh_add_device_late(struct pci_dev *dev) · 352 unmodified lines
11161131 return;
11171132 }
11181133
1119− if (eeh_has_flag(EEH_PROBE_MODE_DEV))
1120− eeh_ops->probe(pdn, NULL);
1121−
11221134 /*
11231135 * The EEH cache might not be removed correctly because of
11241136 * unbalanced kref to the device during unplug time, which
@@ -1142,6 +1154,9 @@ void eeh_add_device_late(struct pci_dev *dev) · 17 unmodified lines
11421154 dev->dev.archdata.edev = NULL;
11431155 }
11441156
1157+ if (eeh_has_flag(EEH_PROBE_MODE_DEV))
1158+ eeh_ops->probe(pdn, NULL);
1159+
11451160 edev->pdev = dev;
11461161 dev->dev.archdata.edev = edev;
11471162
arch/powerpc/kernel/eeh_pe.c+22−0
@@ -657,6 +657,28 @@ void eeh_pe_state_clear(struct eeh_pe *pe, int state) · 656 unmodified lines
657657 eeh_pe_traverse(pe, __eeh_pe_state_clear, &state);
658658 }
659659
660+/**
661+ * eeh_pe_state_mark_with_cfg - Mark PE state with unblocked config space
662+ * @pe: PE
663+ * @state: PE state to be set
664+ *
665+ * Set specified flag to PE and its child PEs. The PCI config space
666+ * of some PEs is blocked automatically when EEH_PE_ISOLATED is set,
667+ * which isn't needed in some situations. The function allows to set
668+ * the specified flag to indicated PEs without blocking their PCI
669+ * config space.
670+ */
671+void eeh_pe_state_mark_with_cfg(struct eeh_pe *pe, int state)
672+{
673+ eeh_pe_traverse(pe, __eeh_pe_state_mark, &state);
674+ if (!(state & EEH_PE_ISOLATED))
675+ return;
676+
677+ /* Clear EEH_PE_CFG_BLOCKED, which might be set just now */
678+ state = EEH_PE_CFG_BLOCKED;
679+ eeh_pe_traverse(pe, __eeh_pe_state_clear, &state);
680+}
681+
660682 /*
661683 * Some PCI bridges (e.g. PLX bridges) have primary/secondary
662684 * buses assigned explicitly by firmware, and we probably have
arch/powerpc/kernel/entry_32.S+6−1
@@ -20,6 +20,7 @@ · 19 unmodified lines
2020 */
2121
2222 #include <linux/errno.h>
23+#include <linux/err.h>
2324 #include <linux/sys.h>
2425 #include <linux/threads.h>
2526 #include <asm/reg.h>
@@ -354,7 +355,7 @@ ret_from_syscall: · 328 unmodified lines
354355 SYNC
355356 MTMSRD(r10)
356357 lwz r9,TI_FLAGS(r12)
357− li r8,-_LAST_ERRNO
358+ li r8,-MAX_ERRNO
358359 andi. r0,r9,(_TIF_SYSCALL_DOTRACE|_TIF_SINGLESTEP|_TIF_USER_WORK_MASK|_TIF_PERSYSCALL_MASK)
359360 bne- syscall_exit_work
360361 cmplw 0,r3,r8
@@ -457,6 +458,10 @@ syscall_dotrace: · 96 unmodified lines
457458 lwz r7,GPR7(r1)
458459 lwz r8,GPR8(r1)
459460 REST_NVGPRS(r1)
461+
462+ cmplwi r0,NR_syscalls
463+ /* Return code is already in r3 thanks to do_syscall_trace_enter() */
464+ bge- ret_from_syscall
460465 b syscall_dotrace_cont
461466
462467 syscall_exit_work:
arch/powerpc/kernel/entry_64.S+20−8
@@ -19,6 +19,7 @@ · 18 unmodified lines
1919 */
2020
2121 #include <linux/errno.h>
22+#include <linux/err.h>
2223 #include <asm/unistd.h>
2324 #include <asm/processor.h>
2425 #include <asm/page.h>
@@ -150,8 +151,7 @@ END_FW_FTR_SECTION_IFSET(FW_FEATURE_SPLPAR) · 125 unmodified lines
150151 CURRENT_THREAD_INFO(r11, r1)
151152 ld r10,TI_FLAGS(r11)
152153 andi. r11,r10,_TIF_SYSCALL_DOTRACE
153− bne syscall_dotrace
154−.Lsyscall_dotrace_cont:
154+ bne syscall_dotrace /* does not return */
155155 cmpldi 0,r0,NR_syscalls
156156 bge- syscall_enosys
157157
@@ -207,7 +207,7 @@ system_call: /* label this so stack traces look sane */ · 49 unmodified lines
207207 #endif /* CONFIG_PPC_BOOK3E */
208208
209209 ld r9,TI_FLAGS(r12)
210− li r11,-_LAST_ERRNO
210+ li r11,-MAX_ERRNO
211211 andi. r0,r9,(_TIF_SYSCALL_DOTRACE|_TIF_SINGLESTEP|_TIF_USER_WORK_MASK|_TIF_PERSYSCALL_MASK)
212212 bne- syscall_exit_work
213213 cmpld r3,r11
@@ -245,22 +245,34 @@ syscall_dotrace: · 31 unmodified lines
245245 bl save_nvgprs
246246 addi r3,r1,STACK_FRAME_OVERHEAD
247247 bl do_syscall_trace_enter
248+
248249 /*
249− * Restore argument registers possibly just changed.
250− * We use the return value of do_syscall_trace_enter
251− * for the call number to look up in the table (r0).
250+ * We use the return value of do_syscall_trace_enter() as the syscall
251+ * number. If the syscall was rejected for any reason do_syscall_trace_enter()
252+ * returns an invalid syscall number and the test below against
253+ * NR_syscalls will fail.
252254 */
253255 mr r0,r3
256+
257+ /* Restore argument registers just clobbered and/or possibly changed. */
254258 ld r3,GPR3(r1)
255259 ld r4,GPR4(r1)
256260 ld r5,GPR5(r1)
257261 ld r6,GPR6(r1)
258262 ld r7,GPR7(r1)
259263 ld r8,GPR8(r1)
264+
265+ /* Repopulate r9 and r10 for the system_call path */
260266 addi r9,r1,STACK_FRAME_OVERHEAD
261267 CURRENT_THREAD_INFO(r10, r1)
262268 ld r10,TI_FLAGS(r10)
263− b .Lsyscall_dotrace_cont
269+
270+ cmpldi r0,NR_syscalls
271+ blt+ system_call
272+
273+ /* Return code is already in r3 thanks to do_syscall_trace_enter() */
274+ b .Lsyscall_exit
275+
264276
265277 syscall_enosys:
266278 li r3,-ENOSYS
@@ -277,7 +289,7 @@ syscall_exit_work: · 10 unmodified lines
277289 beq+ 0f
278290 REST_NVGPRS(r1)
279291 b 2f
280−0: cmpld r3,r11 /* r10 is -LAST_ERRNO */
292+0: cmpld r3,r11 /* r11 is -MAX_ERRNO */
281293 blt+ 1f
282294 andi. r0,r9,_TIF_NOERROR
283295 bne- 1f
arch/powerpc/kernel/exceptions-64e.S+8−5
@@ -1313,11 +1313,14 @@ skpinv: addi r6,r6,1 /* Increment */ · 1312 unmodified lines
13131313 sync
13141314 isync
13151315
1316−/* The mapping only needs to be cache-coherent on SMP */
1317−#ifdef CONFIG_SMP
1318−#define M_IF_SMP MAS2_M
1316+/*
1317+ * The mapping only needs to be cache-coherent on SMP, except on
1318+ * Freescale e500mc derivatives where it's also needed for coherent DMA.
1319+ */
1320+#if defined(CONFIG_SMP) || defined(CONFIG_PPC_E500MC)
1321+#define M_IF_NEEDED MAS2_M
13191322 #else
1320−#define M_IF_SMP 0
1323+#define M_IF_NEEDED 0
13211324 #endif
13221325
13231326 /* 6. Setup KERNELBASE mapping in TLB[0]
@@ -1332,7 +1335,7 @@ skpinv: addi r6,r6,1 /* Increment */ · 8 unmodified lines
13321335 ori r6,r6,(MAS1_TSIZE(BOOK3E_PAGESZ_1GB))@l
13331336 mtspr SPRN_MAS1,r6
13341337
1335− LOAD_REG_IMMEDIATE(r6, PAGE_OFFSET | M_IF_SMP)
1338+ LOAD_REG_IMMEDIATE(r6, PAGE_OFFSET | M_IF_NEEDED)
13361339 mtspr SPRN_MAS2,r6
13371340
13381341 rlwinm r5,r5,0,0,25
arch/powerpc/kernel/fsl_booke_entry_mapping.S+9−6
@@ -152,11 +152,14 @@ skpinv: addi r6,r6,1 /* Increment */ · 151 unmodified lines
152152 tlbivax 0,r9
153153 TLBSYNC
154154
155−/* The mapping only needs to be cache-coherent on SMP */
156−#ifdef CONFIG_SMP
157−#define M_IF_SMP MAS2_M
155+/*
156+ * The mapping only needs to be cache-coherent on SMP, except on
157+ * Freescale e500mc derivatives where it's also needed for coherent DMA.
158+ */
159+#if defined(CONFIG_SMP) || defined(CONFIG_PPC_E500MC)
160+#define M_IF_NEEDED MAS2_M
158161 #else
159−#define M_IF_SMP 0
162+#define M_IF_NEEDED 0
160163 #endif
161164
162165 #if defined(ENTRY_MAPPING_BOOT_SETUP)
@@ -167,8 +170,8 @@ skpinv: addi r6,r6,1 /* Increment */ · 4 unmodified lines
167170 lis r6,(MAS1_VALID|MAS1_IPROT)@h
168171 ori r6,r6,(MAS1_TSIZE(BOOK3E_PAGESZ_64M))@l
169172 mtspr SPRN_MAS1,r6
170− lis r6,MAS2_VAL(PAGE_OFFSET, BOOK3E_PAGESZ_64M, M_IF_SMP)@h
171− ori r6,r6,MAS2_VAL(PAGE_OFFSET, BOOK3E_PAGESZ_64M, M_IF_SMP)@l
173+ lis r6,MAS2_VAL(PAGE_OFFSET, BOOK3E_PAGESZ_64M, M_IF_NEEDED)@h
174+ ori r6,r6,MAS2_VAL(PAGE_OFFSET, BOOK3E_PAGESZ_64M, M_IF_NEEDED)@l
172175 mtspr SPRN_MAS2,r6
173176 mtspr SPRN_MAS3,r8
174177 tlbwe
arch/powerpc/kernel/kvm.c+0−1
@@ -649,7 +649,6 @@ static void kvm_check_ins(u32 *inst, u32 features) · 648 unmodified lines
649649 kvm_patch_ins_mtsrin(inst, inst_rt, inst_rb);
650650 }
651651 break;
652− break;
653652 #endif
654653 }
655654
arch/powerpc/kernel/misc_64.S+11−2
@@ -475,9 +475,18 @@ _GLOBAL(kexec_wait) · 474 unmodified lines
475475 #ifdef CONFIG_KEXEC /* use no memory without kexec */
476476 lwz r4,0(r5)
477477 cmpwi 0,r4,0
478− bnea 0x60
478+ beq 99b
479+#ifdef CONFIG_PPC_BOOK3S_64
480+ li r10,0x60
481+ mfmsr r11
482+ clrrdi r11,r11,1 /* Clear MSR_LE */
483+ mtsrr0 r10
484+ mtsrr1 r11
485+ rfid
486+#else
487+ ba 0x60
488+#endif
479489 #endif
480− b 99b
481490
482491 /* this can be in text because we won't change it until we are
483492 * running in real anyways
arch/powerpc/kernel/nvram_64.c+5−5
@@ -541,10 +541,9 @@ static ssize_t nvram_pstore_read(u64 *id, enum pstore_type_id *type, · 540 unmodified lines
541541 time->tv_sec = be64_to_cpu(oops_hdr->timestamp);
542542 time->tv_nsec = 0;
543543 }
544− *buf = kmalloc(length, GFP_KERNEL);
544+ *buf = kmemdup(buff + hdr_size, length, GFP_KERNEL);
545545 if (*buf == NULL)
546546 return -ENOMEM;
547− memcpy(*buf, buff + hdr_size, length);
548547 kfree(buff);
549548
550549 if (err_type == ERR_TYPE_KERNEL_PANIC_GZ)
@@ -582,9 +581,10 @@ static int nvram_pstore_init(void) · 31 unmodified lines
582581 spin_lock_init(&nvram_pstore_info.buf_lock);
583582
584583 rc = pstore_register(&nvram_pstore_info);
585− if (rc != 0)
586− pr_err("nvram: pstore_register() failed, defaults to "
587− "kmsg_dump; returned %d\n", rc);
584+ if (rc && (rc != -EPERM))
585+ /* Print error only when pstore.backend == nvram */
586+ pr_err("nvram: pstore_register() failed, returned %d. "
587+ "Defaults to kmsg_dump\n", rc);
588588
589589 return rc;
590590 }
arch/powerpc/kernel/pci-common.c+18−54
@@ -823,23 +823,15 @@ static void pcibios_fixup_resources(struct pci_dev *dev) · 822 unmodified lines
823823 (reg.start == 0 && !pci_has_flag(PCI_PROBE_ONLY))) {
824824 /* Only print message if not re-assigning */
825825 if (!pci_has_flag(PCI_REASSIGN_ALL_RSRC))
826− pr_debug("PCI:%s Resource %d %016llx-%016llx [%x] "
827− "is unassigned\n",
828− pci_name(dev), i,
829− (unsigned long long)res->start,
830− (unsigned long long)res->end,
831− (unsigned int)res->flags);
826+ pr_debug("PCI:%s Resource %d %pR is unassigned\n",
827+ pci_name(dev), i, res);
832828 res->end -= res->start;
833829 res->start = 0;
834830 res->flags |= IORESOURCE_UNSET;
835831 continue;
836832 }
837833
838− pr_debug("PCI:%s Resource %d %016llx-%016llx [%x]\n",
839− pci_name(dev), i,
840− (unsigned long long)res->start,\
841− (unsigned long long)res->end,
842− (unsigned int)res->flags);
834+ pr_debug("PCI:%s Resource %d %pR\n", pci_name(dev), i, res);
843835 }
844836
845837 /* Call machine specific resource fixup */
@@ -943,11 +935,7 @@ static void pcibios_fixup_bridge(struct pci_bus *bus) · 97 unmodified lines
943935 continue;
944936 }
945937
946− pr_debug("PCI:%s Bus rsrc %d %016llx-%016llx [%x]\n",
947− pci_name(dev), i,
948− (unsigned long long)res->start,\
949− (unsigned long long)res->end,
950− (unsigned int)res->flags);
938+ pr_debug("PCI:%s Bus rsrc %d %pR\n", pci_name(dev), i, res);
951939
952940 /* Try to detect uninitialized P2P bridge resources,
953941 * and clear them out so they get re-assigned later
@@ -1126,10 +1114,8 @@ static int reparent_resources(struct resource *parent, · 172 unmodified lines
11261114 *pp = NULL;
11271115 for (p = res->child; p != NULL; p = p->sibling) {
11281116 p->parent = res;
1129− pr_debug("PCI: Reparented %s [%llx..%llx] under %s\n",
1130− p->name,
1131− (unsigned long long)p->start,
1132− (unsigned long long)p->end, res->name);
1117+ pr_debug("PCI: Reparented %s %pR under %s\n",
1118+ p->name, p, res->name);
11331119 }
11341120 return 0;
11351121 }
@@ -1198,14 +1184,9 @@ static void pcibios_allocate_bus_resources(struct pci_bus *bus) · 62 unmodified lines
11981184 }
11991185 }
12001186
1201− pr_debug("PCI: %s (bus %d) bridge rsrc %d: %016llx-%016llx "
1202− "[0x%x], parent %p (%s)\n",
1203− bus->self ? pci_name(bus->self) : "PHB",
1204− bus->number, i,
1205− (unsigned long long)res->start,
1206− (unsigned long long)res->end,
1207− (unsigned int)res->flags,
1208− pr, (pr && pr->name) ? pr->name : "nil");
1187+ pr_debug("PCI: %s (bus %d) bridge rsrc %d: %pR, parent %p (%s)\n",
1188+ bus->self ? pci_name(bus->self) : "PHB", bus->number,
1189+ i, res, pr, (pr && pr->name) ? pr->name : "nil");
12091190
12101191 if (pr && !(pr->flags & IORESOURCE_UNSET)) {
12111192 struct pci_dev *dev = bus->self;
@@ -1247,11 +1228,8 @@ static inline void alloc_resource(struct pci_dev *dev, int idx) · 35 unmodified lines
12471228 {
12481229 struct resource *pr, *r = &dev->resource[idx];
12491230
1250− pr_debug("PCI: Allocating %s: Resource %d: %016llx..%016llx [%x]\n",
1251− pci_name(dev), idx,
1252− (unsigned long long)r->start,
1253− (unsigned long long)r->end,
1254− (unsigned int)r->flags);
1231+ pr_debug("PCI: Allocating %s: Resource %d: %pR\n",
1232+ pci_name(dev), idx, r);
12551233
12561234 pr = pci_find_parent_resource(dev, r);
12571235 if (!pr || (pr->flags & IORESOURCE_UNSET) ||
@@ -1259,11 +1237,7 @@ static inline void alloc_resource(struct pci_dev *dev, int idx) · 1 unmodified line
12591237 printk(KERN_WARNING "PCI: Cannot allocate resource region %d"
12601238 " of device %s, will remap\n", idx, pci_name(dev));
12611239 if (pr)
1262− pr_debug("PCI: parent is %p: %016llx-%016llx [%x]\n",
1263− pr,
1264− (unsigned long long)pr->start,
1265− (unsigned long long)pr->end,
1266− (unsigned int)pr->flags);
1240+ pr_debug("PCI: parent is %p: %pR\n", pr, pr);
12671241 /* We'll assign a new address later */
12681242 r->flags |= IORESOURCE_UNSET;
12691243 r->end -= r->start;
@@ -1425,12 +1399,8 @@ void pcibios_claim_one_bus(struct pci_bus *bus) · 155 unmodified lines
14251399 if (r->parent || !r->start || !r->flags)
14261400 continue;
14271401
1428− pr_debug("PCI: Claiming %s: "
1429− "Resource %d: %016llx..%016llx [%x]\n",
1430− pci_name(dev), i,
1431− (unsigned long long)r->start,
1432− (unsigned long long)r->end,
1433− (unsigned int)r->flags);
1402+ pr_debug("PCI: Claiming %s: Resource %d: %pR\n",
1403+ pci_name(dev), i, r);
14341404
14351405 if (pci_claim_resource(dev, i) == 0)
14361406 continue;
@@ -1514,11 +1484,8 @@ static void pcibios_setup_phb_resources(struct pci_controller *hose, · 77 unmodified lines
15141484 } else {
15151485 offset = pcibios_io_space_offset(hose);
15161486
1517− pr_debug("PCI: PHB IO resource = %08llx-%08llx [%lx] off 0x%08llx\n",
1518− (unsigned long long)res->start,
1519− (unsigned long long)res->end,
1520− (unsigned long)res->flags,
1521− (unsigned long long)offset);
1487+ pr_debug("PCI: PHB IO resource = %pR off 0x%08llx\n",
1488+ res, (unsigned long long)offset);
15221489 pci_add_resource_offset(resources, res, offset);
15231490 }
15241491
@@ -1535,11 +1502,8 @@ static void pcibios_setup_phb_resources(struct pci_controller *hose, · 10 unmodified lines
15351502 offset = hose->mem_offset[i];
15361503
15371504
1538− pr_debug("PCI: PHB MEM resource %d = %08llx-%08llx [%lx] off 0x%08llx\n", i,
1539− (unsigned long long)res->start,
1540− (unsigned long long)res->end,
1541− (unsigned long)res->flags,
1542− (unsigned long long)offset);
1505+ pr_debug("PCI: PHB MEM resource %d = %pR off 0x%08llx\n", i,
1506+ res, (unsigned long long)offset);
15431507
15441508 pci_add_resource_offset(resources, res, offset);
15451509 }
arch/powerpc/kernel/process.c+7−7
@@ -86,7 +86,7 @@ void giveup_fpu_maybe_transactional(struct task_struct *tsk) · 85 unmodified lines
8686 if (tsk == current && tsk->thread.regs &&
8787 MSR_TM_ACTIVE(tsk->thread.regs->msr) &&
8888 !test_thread_flag(TIF_RESTORE_TM)) {
89− tsk->thread.tm_orig_msr = tsk->thread.regs->msr;
89+ tsk->thread.ckpt_regs.msr = tsk->thread.regs->msr;
9090 set_thread_flag(TIF_RESTORE_TM);
9191 }
9292
@@ -104,7 +104,7 @@ void giveup_altivec_maybe_transactional(struct task_struct *tsk) · 11 unmodified lines
104104 if (tsk == current && tsk->thread.regs &&
105105 MSR_TM_ACTIVE(tsk->thread.regs->msr) &&
106106 !test_thread_flag(TIF_RESTORE_TM)) {
107− tsk->thread.tm_orig_msr = tsk->thread.regs->msr;
107+ tsk->thread.ckpt_regs.msr = tsk->thread.regs->msr;
108108 set_thread_flag(TIF_RESTORE_TM);
109109 }
110110
@@ -540,7 +540,7 @@ static void tm_reclaim_thread(struct thread_struct *thr, · 429 unmodified lines
540540 * the thread will no longer be transactional.
541541 */
542542 if (test_ti_thread_flag(ti, TIF_RESTORE_TM)) {
543− msr_diff = thr->tm_orig_msr & ~thr->regs->msr;
543+ msr_diff = thr->ckpt_regs.msr & ~thr->regs->msr;
544544 if (msr_diff & MSR_FP)
545545 memcpy(&thr->transact_fp, &thr->fp_state,
546546 sizeof(struct thread_fp_state));
@@ -591,10 +591,10 @@ static inline void tm_reclaim_task(struct task_struct *tsk) · 44 unmodified lines
591591 /* Stash the original thread MSR, as giveup_fpu et al will
592592 * modify it. We hold onto it to see whether the task used
593593 * FP & vector regs. If the TIF_RESTORE_TM flag is set,
594− * tm_orig_msr is already set.
594+ * ckpt_regs.msr is already set.
595595 */
596596 if (!test_ti_thread_flag(task_thread_info(tsk), TIF_RESTORE_TM))
597− thr->tm_orig_msr = thr->regs->msr;
597+ thr->ckpt_regs.msr = thr->regs->msr;
598598
599599 TM_DEBUG("--- tm_reclaim on pid %d (NIP=%lx, "
600600 "ccr=%lx, msr=%lx, trap=%lx)\n",
@@ -663,7 +663,7 @@ static inline void tm_recheckpoint_new_task(struct task_struct *new) · 62 unmodified lines
663663 tm_restore_sprs(&new->thread);
664664 return;
665665 }
666− msr = new->thread.tm_orig_msr;
666+ msr = new->thread.ckpt_regs.msr;
667667 /* Recheckpoint to restore original checkpointed register state. */
668668 TM_DEBUG("*** tm_recheckpoint of pid %d "
669669 "(new->msr 0x%lx, new->origmsr 0x%lx)\n",
@@ -723,7 +723,7 @@ void restore_tm_state(struct pt_regs *regs) · 53 unmodified lines
723723 if (!MSR_TM_ACTIVE(regs->msr))
724724 return;
725725
726− msr_diff = current->thread.tm_orig_msr & ~regs->msr;
726+ msr_diff = current->thread.ckpt_regs.msr & ~regs->msr;
727727 msr_diff &= MSR_FP | MSR_VEC | MSR_VSX;
728728 if (msr_diff & MSR_FP) {
729729 fp_enable();
arch/powerpc/kernel/prom.c+11−14
@@ -218,22 +218,18 @@ static void __init check_cpu_pa_features(unsigned long node) · 217 unmodified lines
218218 }
219219
220220 #ifdef CONFIG_PPC_STD_MMU_64
221−static void __init check_cpu_slb_size(unsigned long node)
221+static void __init init_mmu_slb_size(unsigned long node)
222222 {
223223 const __be32 *slb_size_ptr;
224224
225− slb_size_ptr = of_get_flat_dt_prop(node, "slb-size", NULL);
226− if (slb_size_ptr != NULL) {
227− mmu_slb_size = be32_to_cpup(slb_size_ptr);
228− return;
229− }
230− slb_size_ptr = of_get_flat_dt_prop(node, "ibm,slb-size", NULL);
231− if (slb_size_ptr != NULL) {
225+ slb_size_ptr = of_get_flat_dt_prop(node, "slb-size", NULL) ? :
226+ of_get_flat_dt_prop(node, "ibm,slb-size", NULL);
227+
228+ if (slb_size_ptr)
232229 mmu_slb_size = be32_to_cpup(slb_size_ptr);
233− }
234230 }
235231 #else
236−#define check_cpu_slb_size(node) do { } while(0)
232+#define init_mmu_slb_size(node) do { } while(0)
237233 #endif
238234
239235 static struct feature_property {
@@ -380,7 +376,7 @@ static int __init early_init_dt_scan_cpus(unsigned long node, · 140 unmodified lines
380376
381377 check_cpu_feature_properties(node);
382378 check_cpu_pa_features(node);
383− check_cpu_slb_size(node);
379+ init_mmu_slb_size(node);
384380
385381 #ifdef CONFIG_PPC64
386382 if (nthreads > 1)
@@ -476,9 +472,10 @@ static int __init early_init_dt_scan_drconf_memory(unsigned long node) · 89 unmodified lines
476472 flags = of_read_number(&dm[3], 1);
477473 /* skip DRC index, pad, assoc. list index, flags */
478474 dm += 4;
479− /* skip this block if the reserved bit is set in flags (0x80)
480− or if the block is not assigned to this partition (0x8) */
481− if ((flags & 0x80) || !(flags & 0x8))
475+ /* skip this block if the reserved bit is set in flags
476+ or if the block is not assigned to this partition */
477+ if ((flags & DRCONF_MEM_RESERVED) ||
478+ !(flags & DRCONF_MEM_ASSIGNED))
482479 continue;
483480 size = memblock_size;
484481 rngs = 1;
arch/powerpc/kernel/prom_init.c+17−8
@@ -641,6 +641,15 @@ static void __init early_cmdline_parse(void) · 640 unmodified lines
641641 #define W(x) ((x) >> 24) & 0xff, ((x) >> 16) & 0xff, \
642642 ((x) >> 8) & 0xff, (x) & 0xff
643643
644+/* Firmware expects the value to be n - 1, where n is the # of vectors */
645+#define NUM_VECTORS(n) ((n) - 1)
646+
647+/*
648+ * Firmware expects 1 + n - 2, where n is the length of the option vector in
649+ * bytes. The 1 accounts for the length byte itself, the - 2 .. ?
650+ */
651+#define VECTOR_LENGTH(n) (1 + (n) - 2)
652+
644653 unsigned char ibm_architecture_vec[] = {
645654 W(0xfffe0000), W(0x003a0000), /* POWER5/POWER5+ */
646655 W(0xffff0000), W(0x003e0000), /* POWER6 */
@@ -651,16 +660,16 @@ unsigned char ibm_architecture_vec[] = { · 4 unmodified lines
651660 W(0xffffffff), W(0x0f000003), /* all 2.06-compliant */
652661 W(0xffffffff), W(0x0f000002), /* all 2.05-compliant */
653662 W(0xfffffffe), W(0x0f000001), /* all 2.04-compliant and earlier */
654− 6 - 1, /* 6 option vectors */
663+ NUM_VECTORS(6), /* 6 option vectors */
655664
656665 /* option vector 1: processor architectures supported */
657− 3 - 2, /* length */
666+ VECTOR_LENGTH(2), /* length */
658667 0, /* don't ignore, don't halt */
659668 OV1_PPC_2_00 | OV1_PPC_2_01 | OV1_PPC_2_02 | OV1_PPC_2_03 |
660669 OV1_PPC_2_04 | OV1_PPC_2_05 | OV1_PPC_2_06 | OV1_PPC_2_07,
661670
662671 /* option vector 2: Open Firmware options supported */
663− 34 - 2, /* length */
672+ VECTOR_LENGTH(33), /* length */
664673 OV2_REAL_MODE,
665674 0, 0,
666675 W(0xffffffff), /* real_base */
@@ -674,17 +683,17 @@ unsigned char ibm_architecture_vec[] = { · 7 unmodified lines
674683 48, /* max log_2(hash table size) */
675684
676685 /* option vector 3: processor options supported */
677− 3 - 2, /* length */
686+ VECTOR_LENGTH(2), /* length */
678687 0, /* don't ignore, don't halt */
679688 OV3_FP | OV3_VMX | OV3_DFP,
680689
681690 /* option vector 4: IBM PAPR implementation */
682− 3 - 2, /* length */
691+ VECTOR_LENGTH(2), /* length */
683692 0, /* don't halt */
684693 OV4_MIN_ENT_CAP, /* minimum VP entitled capacity */
685694
686695 /* option vector 5: PAPR/OF options */
687− 19 - 2, /* length */
696+ VECTOR_LENGTH(18), /* length */
688697 0, /* don't ignore, don't halt */
689698 OV5_FEAT(OV5_LPAR) | OV5_FEAT(OV5_SPLPAR) | OV5_FEAT(OV5_LARGE_PAGES) |
690699 OV5_FEAT(OV5_DRCONF_MEMORY) | OV5_FEAT(OV5_DONATE_DEDICATE_CPU) |
@@ -717,12 +726,12 @@ unsigned char ibm_architecture_vec[] = { · 26 unmodified lines
717726 OV5_FEAT(OV5_PFO_HW_RNG) | OV5_FEAT(OV5_PFO_HW_ENCR) |
718727 OV5_FEAT(OV5_PFO_HW_842),
719728 OV5_FEAT(OV5_SUB_PROCESSORS),
729+
720730 /* option vector 6: IBM PAPR hints */
721− 4 - 2, /* length */
731+ VECTOR_LENGTH(3), /* length */
722732 0,
723733 0,
724734 OV6_LINUX,
725−
726735 };
727736
728737 /* Old method - ELF header with PT_NOTE sections only works on BE */
arch/powerpc/kernel/ptrace.c+77−12
@@ -1762,26 +1762,81 @@ long arch_ptrace(struct task_struct *child, long request, · 1761 unmodified lines
17621762 return ret;
17631763 }
17641764
1765−/*
1766− * We must return the syscall number to actually look up in the table.
1767− * This can be -1L to skip running any syscall at all.
1765+#ifdef CONFIG_SECCOMP
1766+static int do_seccomp(struct pt_regs *regs)
1767+{
1768+ if (!test_thread_flag(TIF_SECCOMP))
1769+ return 0;
1770+
1771+ /*
1772+ * The ABI we present to seccomp tracers is that r3 contains
1773+ * the syscall return value and orig_gpr3 contains the first
1774+ * syscall parameter. This is different to the ptrace ABI where
1775+ * both r3 and orig_gpr3 contain the first syscall parameter.
1776+ */
1777+ regs->gpr[3] = -ENOSYS;
1778+
1779+ /*
1780+ * We use the __ version here because we have already checked
1781+ * TIF_SECCOMP. If this fails, there is nothing left to do, we
1782+ * have already loaded -ENOSYS into r3, or seccomp has put
1783+ * something else in r3 (via SECCOMP_RET_ERRNO/TRACE).
1784+ */
1785+ if (__secure_computing())
1786+ return -1;
1787+
1788+ /*
1789+ * The syscall was allowed by seccomp, restore the register
1790+ * state to what ptrace and audit expect.
1791+ * Note that we use orig_gpr3, which means a seccomp tracer can
1792+ * modify the first syscall parameter (in orig_gpr3) and also
1793+ * allow the syscall to proceed.
1794+ */
1795+ regs->gpr[3] = regs->orig_gpr3;
1796+
1797+ return 0;
1798+}
1799+#else
1800+static inline int do_seccomp(struct pt_regs *regs) { return 0; }
1801+#endif /* CONFIG_SECCOMP */
1802+
1803+/**
1804+ * do_syscall_trace_enter() - Do syscall tracing on kernel entry.
1805+ * @regs: the pt_regs of the task to trace (current)
1806+ *
1807+ * Performs various types of tracing on syscall entry. This includes seccomp,
1808+ * ptrace, syscall tracepoints and audit.
1809+ *
1810+ * The pt_regs are potentially visible to userspace via ptrace, so their
1811+ * contents is ABI.
1812+ *
1813+ * One or more of the tracers may modify the contents of pt_regs, in particular
1814+ * to modify arguments or even the syscall number itself.
1815+ *
1816+ * It's also possible that a tracer can choose to reject the system call. In
1817+ * that case this function will return an illegal syscall number, and will put
1818+ * an appropriate return value in regs->r3.
1819+ *
1820+ * Return: the (possibly changed) syscall number.
17681821 */
17691822 long do_syscall_trace_enter(struct pt_regs *regs)
17701823 {
1771− long ret = 0;
1824+ bool abort = false;
17721825
17731826 user_exit();
17741827
1775− secure_computing_strict(regs->gpr[0]);
1828+ if (do_seccomp(regs))
1829+ return -1;
17761830
1777− if (test_thread_flag(TIF_SYSCALL_TRACE) &&
1778− tracehook_report_syscall_entry(regs))
1831+ if (test_thread_flag(TIF_SYSCALL_TRACE)) {
17791832 /*
1780− * Tracing decided this syscall should not happen.
1781− * We'll return a bogus call number to get an ENOSYS
1782− * error, but leave the original number in regs->gpr[0].
1833+ * The tracer may decide to abort the syscall, if so tracehook
1834+ * will return !0. Note that the tracer may also just change
1835+ * regs->gpr[0] to an invalid syscall number, that is handled
1836+ * below on the exit path.
17831837 */
1784− ret = -1L;
1838+ abort = tracehook_report_syscall_entry(regs) != 0;
1839+ }
17851840
17861841 if (unlikely(test_thread_flag(TIF_SYSCALL_TRACEPOINT)))
17871842 trace_sys_enter(regs, regs->gpr[0]);
@@ -1798,7 +1853,17 @@ long do_syscall_trace_enter(struct pt_regs *regs) · 10 unmodified lines
17981853 regs->gpr[5] & 0xffffffff,
17991854 regs->gpr[6] & 0xffffffff);
18001855
1801− return ret ?: regs->gpr[0];
1856+ if (abort || regs->gpr[0] >= NR_syscalls) {
1857+ /*
1858+ * If we are aborting explicitly, or if the syscall number is
1859+ * now invalid, set the return value to -ENOSYS.
1860+ */
1861+ regs->gpr[3] = -ENOSYS;
1862+ return -1;
1863+ }
1864+
1865+ /* Return the possibly modified but valid syscall number */
1866+ return regs->gpr[0];
18021867 }
18031868
18041869 void do_syscall_trace_leave(struct pt_regs *regs)
arch/powerpc/kernel/rtas.c+22−3
@@ -478,8 +478,9 @@ unsigned int rtas_busy_delay_time(int status) · 477 unmodified lines
478478
479479 if (status == RTAS_BUSY) {
480480 ms = 1;
481− } else if (status >= 9900 && status <= 9905) {
482− order = status - 9900;
481+ } else if (status >= RTAS_EXTENDED_DELAY_MIN &&
482+ status <= RTAS_EXTENDED_DELAY_MAX) {
483+ order = status - RTAS_EXTENDED_DELAY_MIN;
483484 for (ms = 1; order > 0; order--)
484485 ms *= 10;
485486 }
@@ -584,6 +585,23 @@ int rtas_get_sensor(int sensor, int index, int *state) · 98 unmodified lines
584585 }
585586 EXPORT_SYMBOL(rtas_get_sensor);
586587
588+int rtas_get_sensor_fast(int sensor, int index, int *state)
589+{
590+ int token = rtas_token("get-sensor-state");
591+ int rc;
592+
593+ if (token == RTAS_UNKNOWN_SERVICE)
594+ return -ENOENT;
595+
596+ rc = rtas_call(token, 2, 2, state, sensor, index);
597+ WARN_ON(rc == RTAS_BUSY || (rc >= RTAS_EXTENDED_DELAY_MIN &&
598+ rc <= RTAS_EXTENDED_DELAY_MAX));
599+
600+ if (rc < 0)
601+ return rtas_error_rc(rc);
602+ return rc;
603+}
604+
587605 bool rtas_indicator_present(int token, int *maxindex)
588606 {
589607 int proplen, count, i;
@@ -641,7 +659,8 @@ int rtas_set_indicator_fast(int indicator, int index, int new_value) · 51 unmodified lines
641659
642660 rc = rtas_call(token, 3, 1, NULL, indicator, index, new_value);
643661
644− WARN_ON(rc == -2 || (rc >= 9900 && rc <= 9905));
662+ WARN_ON(rc == RTAS_BUSY || (rc >= RTAS_EXTENDED_DELAY_MIN &&
663+ rc <= RTAS_EXTENDED_DELAY_MAX));
645664
646665 if (rc < 0)
647666 return rtas_error_rc(rc);
arch/powerpc/kernel/signal_32.c+5−0
@@ -949,6 +949,11 @@ int copy_siginfo_to_user32(struct compat_siginfo __user *d, const siginfo_t *s) · 948 unmodified lines
949949 err |= __put_user(s->si_overrun, &d->si_overrun);
950950 err |= __put_user(s->si_int, &d->si_int);
951951 break;
952+ case __SI_SYS >> 16:
953+ err |= __put_user(ptr_to_compat(s->si_call_addr), &d->si_call_addr);
954+ err |= __put_user(s->si_syscall, &d->si_syscall);
955+ err |= __put_user(s->si_arch, &d->si_arch);
956+ break;
952957 case __SI_RT >> 16: /* This is not generated by the kernel as of now. */
953958 case __SI_MESGQ >> 16:
954959 err |= __put_user(s->si_int, &d->si_int);
arch/powerpc/kernel/signal_64.c+16−5
@@ -73,6 +73,19 @@ static const char fmt32[] = KERN_INFO \ · 72 unmodified lines
7373 static const char fmt64[] = KERN_INFO \
7474 "%s[%d]: bad frame in %s: %016lx nip %016lx lr %016lx\n";
7575
76+/*
77+ * This computes a quad word aligned pointer inside the vmx_reserve array
78+ * element. For historical reasons sigcontext might not be quad word aligned,
79+ * but the location we write the VMX regs to must be. See the comment in
80+ * sigcontext for more detail.
81+ */
82+#ifdef CONFIG_ALTIVEC
83+static elf_vrreg_t __user *sigcontext_vmx_regs(struct sigcontext __user *sc)
84+{
85+ return (elf_vrreg_t __user *) (((unsigned long)sc->vmx_reserve + 15) & ~0xful);
86+}
87+#endif
88+
7689 /*
7790 * Set up the sigcontext for the signal frame.
7891 */
@@ -90,7 +103,7 @@ static long setup_sigcontext(struct sigcontext __user *sc, struct pt_regs *regs, · 11 unmodified lines
90103 * v_regs pointer or not
91104 */
92105 #ifdef CONFIG_ALTIVEC
93− elf_vrreg_t __user *v_regs = (elf_vrreg_t __user *)(((unsigned long)sc->vmx_reserve + 15) & ~0xful);
106+ elf_vrreg_t __user *v_regs = sigcontext_vmx_regs(sc);
94107 #endif
95108 unsigned long msr = regs->msr;
96109 long err = 0;
@@ -181,10 +194,8 @@ static long setup_tm_sigcontexts(struct sigcontext __user *sc, · 84 unmodified lines
181194 * v_regs pointer or not.
182195 */
183196 #ifdef CONFIG_ALTIVEC
184− elf_vrreg_t __user *v_regs = (elf_vrreg_t __user *)
185− (((unsigned long)sc->vmx_reserve + 15) & ~0xful);
186− elf_vrreg_t __user *tm_v_regs = (elf_vrreg_t __user *)
187− (((unsigned long)tm_sc->vmx_reserve + 15) & ~0xful);
197+ elf_vrreg_t __user *v_regs = sigcontext_vmx_regs(sc);
198+ elf_vrreg_t __user *tm_v_regs = sigcontext_vmx_regs(tm_sc);
188199 #endif
189200 unsigned long msr = regs->msr;
190201 long err = 0;
arch/powerpc/kernel/trace_clock.c+15−0
@@ -0,0 +1,15 @@
1+/*
2+ * This program is free software; you can redistribute it and/or modify
3+ * it under the terms of the GNU General Public License, version 2, as
4+ * published by the Free Software Foundation.
5+ *
6+ * Copyright (C) 2015 Naveen N. Rao, IBM Corporation
7+ */
8+
9+#include <asm/trace_clock.h>
10+#include <asm/time.h>
11+
12+u64 notrace trace_clock_ppc_tb(void)
13+{
14+ return get_tb();
15+}
arch/powerpc/lib/checksum_32.S+0−16
@@ -40,22 +40,6 @@ _GLOBAL(ip_fast_csum) · 39 unmodified lines
4040 srwi r3,r3,16
4141 blr
4242
43−/*
44− * Compute checksum of TCP or UDP pseudo-header:
45− * csum_tcpudp_magic(saddr, daddr, len, proto, sum)
46− */
47−_GLOBAL(csum_tcpudp_magic)
48− rlwimi r5,r6,16,0,15 /* put proto in upper half of len */
49− addc r0,r3,r4 /* add 4 32-bit words together */
50− adde r0,r0,r5
51− adde r0,r0,r7
52− addze r0,r0 /* add in final carry */
53− rlwinm r3,r0,16,0,31 /* fold two halves together */
54− add r3,r0,r3
55− not r3,r3
56− srwi r3,r3,16
57− blr
58−
5943 /*
6044 * computes the checksum of a memory block at buff, length len,
6145 * and adds in "sum" (32-bit)
arch/powerpc/lib/checksum_64.S+0−21
@@ -44,27 +44,6 @@ _GLOBAL(ip_fast_csum) · 43 unmodified lines
4444 srwi r3,r3,16
4545 blr
4646
47−/*
48− * Compute checksum of TCP or UDP pseudo-header:
49− * csum_tcpudp_magic(r3=saddr, r4=daddr, r5=len, r6=proto, r7=sum)
50− * No real gain trying to do this specially for 64 bit, but
51− * the 32 bit addition may spill into the upper bits of
52− * the doubleword so we still must fold it down from 64.
53− */
54−_GLOBAL(csum_tcpudp_magic)
55− rlwimi r5,r6,16,0,15 /* put proto in upper half of len */
56− addc r0,r3,r4 /* add 4 32-bit words together */
57− adde r0,r0,r5
58− adde r0,r0,r7
59− rldicl r4,r0,32,0 /* fold 64 bit value */
60− add r0,r4,r0
61− srdi r0,r0,32
62− rlwinm r3,r0,16,0,31 /* fold two halves together */
63− add r3,r0,r3
64− not r3,r3
65− srwi r3,r3,16
66− blr
67−
6847 /*
6948 * Computes the checksum of a memory block at buff, length len,
7049 * and adds in "sum" (32-bit).
arch/powerpc/lib/copy_32.S+108−1
@@ -69,9 +69,15 @@ CACHELINE_BYTES = L1_CACHE_BYTES · 68 unmodified lines
6969 LG_CACHELINE_BYTES = L1_CACHE_SHIFT
7070 CACHELINE_MASK = (L1_CACHE_BYTES-1)
7171
72+/*
73+ * Use dcbz on the complete cache lines in the destination
74+ * to set them to zero. This requires that the destination
75+ * area is cacheable. -- paulus
76+ */
7277 _GLOBAL(memset)
7378 rlwimi r4,r4,8,16,23
7479 rlwimi r4,r4,16,0,15
80+
7581 addi r6,r3,-4
7682 cmplwi 0,r5,4
7783 blt 7f
@@ -80,7 +86,29 @@ _GLOBAL(memset) · 2 unmodified lines
8086 andi. r0,r6,3
8187 add r5,r0,r5
8288 subf r6,r0,r6
83− srwi r0,r5,2
89+ cmplwi 0,r4,0
90+ bne 2f /* Use normal procedure if r4 is not zero */
91+
92+ clrlwi r7,r6,32-LG_CACHELINE_BYTES
93+ add r8,r7,r5
94+ srwi r9,r8,LG_CACHELINE_BYTES
95+ addic. r9,r9,-1 /* total number of complete cachelines */
96+ ble 2f
97+ xori r0,r7,CACHELINE_MASK & ~3
98+ srwi. r0,r0,2
99+ beq 3f
100+ mtctr r0
101+4: stwu r4,4(r6)
102+ bdnz 4b
103+3: mtctr r9
104+ li r7,4
105+10: dcbz r7,r6
106+ addi r6,r6,CACHELINE_BYTES
107+ bdnz 10b
108+ clrlwi r5,r8,32-LG_CACHELINE_BYTES
109+ addi r5,r5,4
110+
111+2: srwi r0,r5,2
84112 mtctr r0
85113 bdz 6f
86114 1: stwu r4,4(r6)
@@ -94,12 +122,91 @@ _GLOBAL(memset) · 7 unmodified lines
94122 bdnz 8b
95123 blr
96124
125+/*
126+ * This version uses dcbz on the complete cache lines in the
127+ * destination area to reduce memory traffic. This requires that
128+ * the destination area is cacheable.
129+ * We only use this version if the source and dest don't overlap.
130+ * -- paulus.
131+ */
97132 _GLOBAL(memmove)
98133 cmplw 0,r3,r4
99134 bgt backwards_memcpy
100135 /* fall through */
101136
102137 _GLOBAL(memcpy)
138+ add r7,r3,r5 /* test if the src & dst overlap */
139+ add r8,r4,r5
140+ cmplw 0,r4,r7
141+ cmplw 1,r3,r8
142+ crand 0,0,4 /* cr0.lt &= cr1.lt */
143+ blt generic_memcpy /* if regions overlap */
144+
145+ addi r4,r4,-4
146+ addi r6,r3,-4
147+ neg r0,r3
148+ andi. r0,r0,CACHELINE_MASK /* # bytes to start of cache line */
149+ beq 58f
150+
151+ cmplw 0,r5,r0 /* is this more than total to do? */
152+ blt 63f /* if not much to do */
153+ andi. r8,r0,3 /* get it word-aligned first */
154+ subf r5,r0,r5
155+ mtctr r8
156+ beq+ 61f
157+70: lbz r9,4(r4) /* do some bytes */
158+ addi r4,r4,1
159+ addi r6,r6,1
160+ stb r9,3(r6)
161+ bdnz 70b
162+61: srwi. r0,r0,2
163+ mtctr r0
164+ beq 58f
165+72: lwzu r9,4(r4) /* do some words */
166+ stwu r9,4(r6)
167+ bdnz 72b
168+
169+58: srwi. r0,r5,LG_CACHELINE_BYTES /* # complete cachelines */
170+ clrlwi r5,r5,32-LG_CACHELINE_BYTES
171+ li r11,4
172+ mtctr r0
173+ beq 63f
174+53:
175+ dcbz r11,r6
176+ COPY_16_BYTES
177+#if L1_CACHE_BYTES >= 32
178+ COPY_16_BYTES
179+#if L1_CACHE_BYTES >= 64
180+ COPY_16_BYTES
181+ COPY_16_BYTES
182+#if L1_CACHE_BYTES >= 128
183+ COPY_16_BYTES
184+ COPY_16_BYTES
185+ COPY_16_BYTES
186+ COPY_16_BYTES
187+#endif
188+#endif
189+#endif
190+ bdnz 53b
191+
192+63: srwi. r0,r5,2
193+ mtctr r0
194+ beq 64f
195+30: lwzu r0,4(r4)
196+ stwu r0,4(r6)
197+ bdnz 30b
198+
199+64: andi. r0,r5,3
200+ mtctr r0
201+ beq+ 65f
202+ addi r4,r4,3
203+ addi r6,r6,3
204+40: lbzu r0,1(r4)
205+ stbu r0,1(r6)
206+ bdnz 40b
207+65: blr
208+
209+_GLOBAL(generic_memcpy)
103210 srwi. r7,r5,3
104211 addi r6,r3,-4
105212 addi r4,r4,-4
arch/powerpc/mm/fsl_booke_mmu.c+1−1
@@ -112,7 +112,7 @@ static void settlbcam(int index, unsigned long virt, phys_addr_t phys, · 111 unmodified lines
112112
113113 tsize = __ilog2(size) - 10;
114114
115−#ifdef CONFIG_SMP
115+#if defined(CONFIG_SMP) || defined(CONFIG_PPC_E500MC)
116116 if ((flags & _PAGE_NO_CACHE) == 0)
117117 flags |= _PAGE_COHERENT;
118118 #endif
arch/powerpc/mm/hash_low_64.S+2−2
@@ -701,7 +701,7 @@ htab_pte_insert_failure: · 700 unmodified lines
701701
702702 #endif /* CONFIG_PPC_64K_PAGES */
703703
704−#ifdef CONFIG_PPC_HAS_HASH_64K
704+#ifdef CONFIG_PPC_64K_PAGES
705705
706706 /*****************************************************************************
707707 * *
@@ -993,7 +993,7 @@ ht64_pte_insert_failure: · 285 unmodified lines
993993 b ht64_bail
994994
995995
996−#endif /* CONFIG_PPC_HAS_HASH_64K */
996+#endif /* CONFIG_PPC_64K_PAGES */
997997
998998
999999 /*****************************************************************************
arch/powerpc/mm/hash_utils_64.c+6−6
@@ -640,7 +640,7 @@ extern u32 ht64_call_hpte_updatepp[]; · 639 unmodified lines
640640
641641 static void __init htab_finish_init(void)
642642 {
643−#ifdef CONFIG_PPC_HAS_HASH_64K
643+#ifdef CONFIG_PPC_64K_PAGES
644644 patch_branch(ht64_call_hpte_insert1,
645645 ppc_function_entry(ppc_md.hpte_insert),
646646 BRANCH_SET_LINK);
@@ -653,7 +653,7 @@ static void __init htab_finish_init(void) · 6 unmodified lines
653653 patch_branch(ht64_call_hpte_updatepp,
654654 ppc_function_entry(ppc_md.hpte_updatepp),
655655 BRANCH_SET_LINK);
656−#endif /* CONFIG_PPC_HAS_HASH_64K */
656+#endif /* CONFIG_PPC_64K_PAGES */
657657
658658 patch_branch(htab_call_hpte_insert1,
659659 ppc_function_entry(ppc_md.hpte_insert),
@@ -1151,12 +1151,12 @@ int hash_page_mm(struct mm_struct *mm, unsigned long ea, · 491 unmodified lines
11511151 check_paca_psize(ea, mm, psize, user_region);
11521152 #endif /* CONFIG_PPC_64K_PAGES */
11531153
1154−#ifdef CONFIG_PPC_HAS_HASH_64K
1154+#ifdef CONFIG_PPC_64K_PAGES
11551155 if (psize == MMU_PAGE_64K)
11561156 rc = __hash_page_64K(ea, access, vsid, ptep, trap,
11571157 flags, ssize);
11581158 else
1159−#endif /* CONFIG_PPC_HAS_HASH_64K */
1159+#endif /* CONFIG_PPC_64K_PAGES */
11601160 {
11611161 int spp = subpage_protection(mm, ea);
11621162 if (access & spp)
@@ -1264,12 +1264,12 @@ void hash_preload(struct mm_struct *mm, unsigned long ea, · 101 unmodified lines
12641264 update_flags |= HPTE_LOCAL_UPDATE;
12651265
12661266 /* Hash it in */
1267−#ifdef CONFIG_PPC_HAS_HASH_64K
1267+#ifdef CONFIG_PPC_64K_PAGES
12681268 if (mm->context.user_psize == MMU_PAGE_64K)
12691269 rc = __hash_page_64K(ea, access, vsid, ptep, trap,
12701270 update_flags, ssize);
12711271 else
1272−#endif /* CONFIG_PPC_HAS_HASH_64K */
1272+#endif /* CONFIG_PPC_64K_PAGES */
12731273 rc = __hash_page_4K(ea, access, vsid, ptep, trap, update_flags,
12741274 ssize, subpage_protection(mm, ea));
12751275
arch/powerpc/mm/hugetlbpage.c+0−8
@@ -808,14 +808,6 @@ static int __init add_huge_page_size(unsigned long long size) · 807 unmodified lines
808808 if ((mmu_psize = shift_to_mmu_psize(shift)) < 0)
809809 return -EINVAL;
810810
811−#ifdef CONFIG_SPU_FS_64K_LS
812− /* Disable support for 64K huge pages when 64K SPU local store
813− * support is enabled as the current implementation conflicts.
814− */
815− if (shift == PAGE_SHIFT_64K)
816− return -EINVAL;
817−#endif /* CONFIG_SPU_FS_64K_LS */
818−
819811 BUG_ON(mmu_psize_defs[mmu_psize].shift != shift);
820812
821813 /* Return if huge page size has already been setup */
arch/powerpc/mm/mem.c+7−7
@@ -414,17 +414,17 @@ void flush_dcache_icache_page(struct page *page) · 413 unmodified lines
414414 return;
415415 }
416416 #endif
417−#ifdef CONFIG_BOOKE
418− {
417+#if defined(CONFIG_8xx) || defined(CONFIG_PPC64)
418+ /* On 8xx there is no need to kmap since highmem is not supported */
419+ __flush_dcache_icache(page_address(page));
420+#else
421+ if (IS_ENABLED(CONFIG_BOOKE) || sizeof(phys_addr_t) > sizeof(void *)) {
419422 void *start = kmap_atomic(page);
420423 __flush_dcache_icache(start);
421424 kunmap_atomic(start);
425+ } else {
426+ __flush_dcache_icache_phys(page_to_pfn(page) << PAGE_SHIFT);
422427 }
423−#elif defined(CONFIG_8xx) || defined(CONFIG_PPC64)
424− /* On 8xx there is no need to kmap since highmem is not supported */
425− __flush_dcache_icache(page_address(page));
426−#else
427− __flush_dcache_icache_phys(page_to_pfn(page) << PAGE_SHIFT);
428428 #endif
429429 }
430430 EXPORT_SYMBOL(flush_dcache_icache_page);
arch/powerpc/mm/numa.c+13−3
@@ -225,7 +225,7 @@ static void initialize_distance_lookup_table(int nid, · 224 unmodified lines
225225 for (i = 0; i < distance_ref_points_depth; i++) {
226226 const __be32 *entry;
227227
228− entry = &associativity[be32_to_cpu(distance_ref_points[i])];
228+ entry = &associativity[be32_to_cpu(distance_ref_points[i]) - 1];
229229 distance_lookup_table[nid][i] = of_read_number(entry, 1);
230230 }
231231 }
@@ -248,8 +248,12 @@ static int associativity_to_nid(const __be32 *associativity) · 16 unmodified lines
248248 nid = -1;
249249
250250 if (nid > 0 &&
251− of_read_number(associativity, 1) >= distance_ref_points_depth)
252− initialize_distance_lookup_table(nid, associativity);
251+ of_read_number(associativity, 1) >= distance_ref_points_depth) {
252+ /*
253+ * Skip the length field and send start of associativity array
254+ */
255+ initialize_distance_lookup_table(nid, associativity + 1);
256+ }
253257
254258 out:
255259 return nid;
@@ -507,6 +511,12 @@ static int of_drconf_to_nid_single(struct of_drconf_cell *drmem, · 251 unmodified lines
507511
508512 if (nid == 0xffff || nid >= MAX_NUMNODES)
509513 nid = default_nid;
514+
515+ if (nid > 0) {
516+ index = drmem->aa_index * aa->array_sz;
517+ initialize_distance_lookup_table(nid,
518+ &aa->arrays[index]);
519+ }
510520 }
511521
512522 return nid;
arch/powerpc/mm/pgtable_64.c+0−10
@@ -149,17 +149,7 @@ int map_kernel_page(unsigned long ea, unsigned long pa, int flags) · 148 unmodified lines
149149 #endif /* !CONFIG_PPC_MMU_NOHASH */
150150 }
151151
152−#ifdef CONFIG_PPC_BOOK3E_64
153− /*
154− * With hardware tablewalk, a sync is needed to ensure that
155− * subsequent accesses see the PTE we just wrote. Unlike userspace
156− * mappings, we can't tolerate spurious faults, so make sure
157− * the new PTE will be seen the first time.
158− */
159− mb();
160−#else
161152 smp_wmb();
162−#endif
163153 return 0;
164154 }
165155
arch/powerpc/mm/slb.c+18−6
@@ -41,9 +41,9 @@ static void slb_allocate(unsigned long ea) · 40 unmodified lines
4141 (((ssize) == MMU_SEGSIZE_256M)? ESID_MASK: ESID_MASK_1T)
4242
4343 static inline unsigned long mk_esid_data(unsigned long ea, int ssize,
44− unsigned long slot)
44+ unsigned long entry)
4545 {
46− return (ea & slb_esid_mask(ssize)) | SLB_ESID_V | slot;
46+ return (ea & slb_esid_mask(ssize)) | SLB_ESID_V | entry;
4747 }
4848
4949 static inline unsigned long mk_vsid_data(unsigned long ea, int ssize,
@@ -249,11 +249,24 @@ void switch_slb(struct task_struct *tsk, struct mm_struct *mm) · 199 unmodified lines
249249 static inline void patch_slb_encoding(unsigned int *insn_addr,
250250 unsigned int immed)
251251 {
252− int insn = (*insn_addr & 0xffff0000) | immed;
252+
253+ /*
254+ * This function patches either an li or a cmpldi instruction with
255+ * a new immediate value. This relies on the fact that both li
256+ * (which is actually addi) and cmpldi both take a 16-bit immediate
257+ * value, and it is situated in the same location in the instruction,
258+ * ie. bits 16-31 (Big endian bit order) or the lower 16 bits.
259+ * The signedness of the immediate operand differs between the two
260+ * instructions however this code is only ever patching a small value,
261+ * much less than 1 << 15, so we can get away with it.
262+ * To patch the value we read the existing instruction, clear the
263+ * immediate value, and or in our new value, then write the instruction
264+ * back.
265+ */
266+ unsigned int insn = (*insn_addr & 0xffff0000) | immed;
253267 patch_instruction(insn_addr, insn);
254268 }
255269
256−extern u32 slb_compare_rr_to_size[];
257270 extern u32 slb_miss_kernel_load_linear[];
258271 extern u32 slb_miss_kernel_load_io[];
259272 extern u32 slb_compare_rr_to_size[];
@@ -309,12 +322,11 @@ void slb_initialize(void) · 49 unmodified lines
309322 lflags = SLB_VSID_KERNEL | linear_llp;
310323 vflags = SLB_VSID_KERNEL | vmalloc_llp;
311324
312− /* Invalidate the entire SLB (even slot 0) & all the ERATS */
325+ /* Invalidate the entire SLB (even entry 0) & all the ERATS */
313326 asm volatile("isync":::"memory");
314327 asm volatile("slbmte %0,%0"::"r" (0) : "memory");
315328 asm volatile("isync; slbia; isync":::"memory");
316329 create_shadowed_slbe(PAGE_OFFSET, mmu_kernel_ssize, lflags, 0);
317−
318330 create_shadowed_slbe(VMALLOC_START, mmu_kernel_ssize, vflags, 1);
319331
320332 /* For the boot cpu, we're running on the stack in init_thread_union,
arch/powerpc/mm/tlb_low_64e.S+5−5
@@ -308,11 +308,11 @@ BEGIN_FTR_SECTION /* CPU_FTR_SMT */ · 307 unmodified lines
308308 *
309309 * MAS6:IND should be already set based on MAS4
310310 */
311−1: lbarx r15,0,r11
312311 lhz r10,PACAPACAINDEX(r13)
313− cmpdi r15,0
314− cmpdi cr1,r15,1 /* set cr1.eq = 0 for non-recursive */
315312 addi r10,r10,1
313+ crclr cr1*4+eq /* set cr1.eq = 0 for non-recursive */
314+1: lbarx r15,0,r11
315+ cmpdi r15,0
316316 bne 2f
317317 stbcx. r10,0,r11
318318 bne 1b
@@ -320,9 +320,9 @@ BEGIN_FTR_SECTION /* CPU_FTR_SMT */ · 1 unmodified line
320320 .subsection 1
321321 2: cmpd cr1,r15,r10 /* recursive lock due to mcheck/crit/etc? */
322322 beq cr1,3b /* unlock will happen if cr1.eq = 0 */
323− lbz r15,0(r11)
323+10: lbz r15,0(r11)
324324 cmpdi r15,0
325− bne 2b
325+ bne 10b
326326 b 1b
327327 .previous
328328
arch/powerpc/oprofile/op_model_power4.c+2−2
@@ -207,7 +207,7 @@ static int power4_start(struct op_counter_config *ctr) · 206 unmodified lines
207207 unsigned int mmcr0;
208208
209209 /* set the PMM bit (see comment below) */
210− mtmsrd(mfmsr() | MSR_PMM);
210+ mtmsr(mfmsr() | MSR_PMM);
211211
212212 for (i = 0; i < cur_cpu_spec->num_pmcs; ++i) {
213213 if (ctr[i].enabled) {
@@ -377,7 +377,7 @@ static void power4_handle_interrupt(struct pt_regs *regs, · 163 unmodified lines
377377 is_kernel = get_kernel(pc, mmcra);
378378
379379 /* set the PMM bit (see comment below) */
380− mtmsrd(mfmsr() | MSR_PMM);
380+ mtmsr(mfmsr() | MSR_PMM);
381381
382382 /* Check that the SIAR valid bit in MMCRA is set to 1. */
383383 if ((mmcra & MMCRA_SIAR_VALID_MASK) == MMCRA_SIAR_VALID_MASK)
arch/powerpc/perf/core-book3s.c+2−2
@@ -53,7 +53,7 @@ struct cpu_hw_events { · 52 unmodified lines
5353
5454 /* BHRB bits */
5555 u64 bhrb_filter; /* BHRB HW branch filter */
56− int bhrb_users;
56+ unsigned int bhrb_users;
5757 void *bhrb_context;
5858 struct perf_branch_stack bhrb_stack;
5959 struct perf_branch_entry bhrb_entries[BHRB_MAX_ENTRIES];
@@ -369,8 +369,8 @@ static void power_pmu_bhrb_disable(struct perf_event *event) · 309 unmodified lines
369369 if (!ppmu->bhrb_nr)
370370 return;
371371
372+ WARN_ON_ONCE(!cpuhw->bhrb_users);
372373 cpuhw->bhrb_users--;
373− WARN_ON_ONCE(cpuhw->bhrb_users < 0);
374374 perf_sched_cb_dec(event->ctx->pmu);
375375
376376 if (!cpuhw->disabled && !cpuhw->bhrb_users) {
arch/powerpc/perf/hv-24x7.c+11−13
@@ -416,7 +416,7 @@ out_val: · 415 unmodified lines
416416 }
417417
418418 static struct attribute *event_to_desc_attr(struct hv_24x7_event_data *event,
419− int nonce)
419+ int nonce)
420420 {
421421 int nl, dl;
422422 char *name = event_name(event, &nl);
@@ -444,7 +444,7 @@ event_to_long_desc_attr(struct hv_24x7_event_data *event, int nonce) · 21 unmodified lines
444444 }
445445
446446 static ssize_t event_data_to_attrs(unsigned ix, struct attribute **attrs,
447− struct hv_24x7_event_data *event, int nonce)
447+ struct hv_24x7_event_data *event, int nonce)
448448 {
449449 unsigned i;
450450
@@ -512,7 +512,7 @@ static int memord(const void *d1, size_t s1, const void *d2, size_t s2) · 61 unmodified lines
512512 }
513513
514514 static int ev_uniq_ord(const void *v1, size_t s1, unsigned d1, const void *v2,
515− size_t s2, unsigned d2)
515+ size_t s2, unsigned d2)
516516 {
517517 int r = memord(v1, s1, v2, s2);
518518
@@ -526,7 +526,7 @@ static int ev_uniq_ord(const void *v1, size_t s1, unsigned d1, const void *v2, · 7 unmodified lines
526526 }
527527
528528 static int event_uniq_add(struct rb_root *root, const char *name, int nl,
529− unsigned domain)
529+ unsigned domain)
530530 {
531531 struct rb_node **new = &(root->rb_node), *parent = NULL;
532532 struct event_uniq *data;
@@ -650,8 +650,8 @@ static ssize_t catalog_event_len_validate(struct hv_24x7_event_data *event, · 117 unmodified lines
650650 #define MAX_4K (SIZE_MAX / 4096)
651651
652652 static int create_events_from_catalog(struct attribute ***events_,
653− struct attribute ***event_descs_,
654− struct attribute ***event_long_descs_)
653+ struct attribute ***event_descs_,
654+ struct attribute ***event_long_descs_)
655655 {
656656 unsigned long hret;
657657 size_t catalog_len, catalog_page_len, event_entry_count,
@@ -1008,8 +1008,8 @@ static const struct attribute_group *attr_groups[] = { · 350 unmodified lines
10081008 };
10091009
10101010 static void log_24x7_hcall(struct hv_24x7_request_buffer *request_buffer,
1011− struct hv_24x7_data_result_buffer *result_buffer,
1012− unsigned long ret)
1011+ struct hv_24x7_data_result_buffer *result_buffer,
1012+ unsigned long ret)
10131013 {
10141014 struct hv_24x7_request *req;
10151015
@@ -1026,7 +1026,7 @@ static void log_24x7_hcall(struct hv_24x7_request_buffer *request_buffer, · 10 unmodified lines
10261026 * Start the process for a new H_GET_24x7_DATA hcall.
10271027 */
10281028 static void init_24x7_request(struct hv_24x7_request_buffer *request_buffer,
1029− struct hv_24x7_data_result_buffer *result_buffer)
1029+ struct hv_24x7_data_result_buffer *result_buffer)
10301030 {
10311031
10321032 memset(request_buffer, 0, 4096);
@@ -1041,7 +1041,7 @@ static void init_24x7_request(struct hv_24x7_request_buffer *request_buffer, · 8 unmodified lines
10411041 * by 'init_24x7_request()' and 'add_event_to_24x7_request()'.
10421042 */
10431043 static int make_24x7_request(struct hv_24x7_request_buffer *request_buffer,
1044− struct hv_24x7_data_result_buffer *result_buffer)
1044+ struct hv_24x7_data_result_buffer *result_buffer)
10451045 {
10461046 unsigned long ret;
10471047
@@ -1104,7 +1104,6 @@ static unsigned long single_24x7_request(struct perf_event *event, u64 *count) · 56 unmodified lines
11041104 unsigned long ret;
11051105 struct hv_24x7_request_buffer *request_buffer;
11061106 struct hv_24x7_data_result_buffer *result_buffer;
1107− struct hv_24x7_result *resb;
11081107
11091108 BUILD_BUG_ON(sizeof(*request_buffer) > 4096);
11101109 BUILD_BUG_ON(sizeof(*result_buffer) > 4096);
@@ -1125,8 +1124,7 @@ static unsigned long single_24x7_request(struct perf_event *event, u64 *count) · 14 unmodified lines
11251124 }
11261125
11271126 /* process result from hcall */
1128− resb = &result_buffer->results[0];
1129− *count = be64_to_cpu(resb->elements[0].element_data[0]);
1127+ *count = be64_to_cpu(result_buffer->results[0].elements[0].element_data[0]);
11301128
11311129 out:
11321130 put_cpu_var(hv_24x7_reqb);
arch/powerpc/platforms/512x/Kconfig+2−2
@@ -7,8 +7,8 @@ config PPC_MPC512x · 6 unmodified lines
77 select PPC_PCI_CHOICE
88 select FSL_PCI if PCI
99 select ARCH_WANT_OPTIONAL_GPIOLIB
10− select USB_EHCI_BIG_ENDIAN_MMIO
11− select USB_EHCI_BIG_ENDIAN_DESC
10+ select USB_EHCI_BIG_ENDIAN_MMIO if USB_EHCI_HCD
11+ select USB_EHCI_BIG_ENDIAN_DESC if USB_EHCI_HCD
1212
1313 config MPC5121_ADS
1414 bool "Freescale MPC5121E ADS"
arch/powerpc/platforms/85xx/c293pcie.c+0−4
@@ -66,10 +66,6 @@ define_machine(c293_pcie) { · 65 unmodified lines
6666 .probe = c293_pcie_probe,
6767 .setup_arch = c293_pcie_setup_arch,
6868 .init_IRQ = c293_pcie_pic_init,
69−#ifdef CONFIG_PCI
70− .pcibios_fixup_bus = fsl_pcibios_fixup_bus,
71− .pcibios_fixup_phb = fsl_pcibios_fixup_phb,
72−#endif
7369 .get_irq = mpic_get_irq,
7470 .restart = fsl_rstcr_restart,
7571 .calibrate_decr = generic_calibrate_decr,
arch/powerpc/platforms/85xx/corenet_generic.c+2−0
@@ -153,6 +153,8 @@ static const char * const boards[] __initconst = { · 152 unmodified lines
153153 "fsl,T1023RDB",
154154 "fsl,T1024QDS",
155155 "fsl,T1024RDB",
156+ "fsl,T1040D4RDB",
157+ "fsl,T1042D4RDB",
156158 "fsl,T1040QDS",
157159 "fsl,T1042QDS",
158160 "fsl,T1040RDB",
arch/powerpc/platforms/cell/Kconfig+0−15
@@ -57,21 +57,6 @@ config SPU_FS · 56 unmodified lines
5757 Units on machines implementing the Broadband Processor
5858 Architecture.
5959
60−config SPU_FS_64K_LS
61− bool "Use 64K pages to map SPE local store"
62− # we depend on PPC_MM_SLICES for now rather than selecting
63− # it because we depend on hugetlbfs hooks being present. We
64− # will fix that when the generic code has been improved to
65− # not require hijacking hugetlbfs hooks.
66− depends on SPU_FS && PPC_MM_SLICES && !PPC_64K_PAGES
67− default y
68− select PPC_HAS_HASH_64K
69− help
70− This option causes SPE local stores to be mapped in process
71− address spaces using 64K pages while the rest of the kernel
72− uses 4K pages. This can improve performances of applications
73− using multiple SPEs by lowering the TLB pressure on them.
74−
7560 config SPU_BASE
7661 bool
7762 default n
arch/powerpc/platforms/cell/spufs/file.c+0−55
@@ -239,23 +239,6 @@ spufs_mem_mmap_fault(struct vm_area_struct *vma, struct vm_fault *vmf) · 238 unmodified lines
239239 unsigned long address = (unsigned long)vmf->virtual_address;
240240 unsigned long pfn, offset;
241241
242−#ifdef CONFIG_SPU_FS_64K_LS
243− struct spu_state *csa = &ctx->csa;
244− int psize;
245−
246− /* Check what page size we are using */
247− psize = get_slice_psize(vma->vm_mm, address);
248−
249− /* Some sanity checking */
250− BUG_ON(csa->use_big_pages != (psize == MMU_PAGE_64K));
251−
252− /* Wow, 64K, cool, we need to align the address though */
253− if (csa->use_big_pages) {
254− BUG_ON(vma->vm_start & 0xffff);
255− address &= ~0xfffful;
256− }
257−#endif /* CONFIG_SPU_FS_64K_LS */
258−
259242 offset = vmf->pgoff << PAGE_SHIFT;
260243 if (offset >= LS_SIZE)
261244 return VM_FAULT_SIGBUS;
@@ -310,22 +293,6 @@ static const struct vm_operations_struct spufs_mem_mmap_vmops = { · 48 unmodified lines
310293
311294 static int spufs_mem_mmap(struct file *file, struct vm_area_struct *vma)
312295 {
313−#ifdef CONFIG_SPU_FS_64K_LS
314− struct spu_context *ctx = file->private_data;
315− struct spu_state *csa = &ctx->csa;
316−
317− /* Sanity check VMA alignment */
318− if (csa->use_big_pages) {
319− pr_debug("spufs_mem_mmap 64K, start=0x%lx, end=0x%lx,"
320− " pgoff=0x%lx\n", vma->vm_start, vma->vm_end,
321− vma->vm_pgoff);
322− if (vma->vm_start & 0xffff)
323− return -EINVAL;
324− if (vma->vm_pgoff & 0xf)
325− return -EINVAL;
326− }
327−#endif /* CONFIG_SPU_FS_64K_LS */
328−
329296 if (!(vma->vm_flags & VM_SHARED))
330297 return -EINVAL;
331298
@@ -336,25 +303,6 @@ static int spufs_mem_mmap(struct file *file, struct vm_area_struct *vma) · 4 unmodified lines
336303 return 0;
337304 }
338305
339−#ifdef CONFIG_SPU_FS_64K_LS
340−static unsigned long spufs_get_unmapped_area(struct file *file,
341− unsigned long addr, unsigned long len, unsigned long pgoff,
342− unsigned long flags)
343−{
344− struct spu_context *ctx = file->private_data;
345− struct spu_state *csa = &ctx->csa;
346−
347− /* If not using big pages, fallback to normal MM g_u_a */
348− if (!csa->use_big_pages)
349− return current->mm->get_unmapped_area(file, addr, len,
350− pgoff, flags);
351−
352− /* Else, try to obtain a 64K pages slice */
353− return slice_get_unmapped_area(addr, len, flags,
354− MMU_PAGE_64K, 1);
355−}
356−#endif /* CONFIG_SPU_FS_64K_LS */
357−
358306 static const struct file_operations spufs_mem_fops = {
359307 .open = spufs_mem_open,
360308 .release = spufs_mem_release,
@@ -362,9 +310,6 @@ static const struct file_operations spufs_mem_fops = { · 1 unmodified line
362310 .write = spufs_mem_write,
363311 .llseek = generic_file_llseek,
364312 .mmap = spufs_mem_mmap,
365−#ifdef CONFIG_SPU_FS_64K_LS
366− .get_unmapped_area = spufs_get_unmapped_area,
367−#endif
368313 };
369314
370315 static int spufs_ps_fault(struct vm_area_struct *vma,
arch/powerpc/platforms/cell/spufs/lscsa_alloc.c+2−122
@@ -31,7 +31,7 @@ · 30 unmodified lines
3131
3232 #include "spufs.h"
3333
34−static int spu_alloc_lscsa_std(struct spu_state *csa)
34+int spu_alloc_lscsa(struct spu_state *csa)
3535 {
3636 struct spu_lscsa *lscsa;
3737 unsigned char *p;
@@ -48,7 +48,7 @@ static int spu_alloc_lscsa_std(struct spu_state *csa) · 10 unmodified lines
4848 return 0;
4949 }
5050
51−static void spu_free_lscsa_std(struct spu_state *csa)
51+void spu_free_lscsa(struct spu_state *csa)
5252 {
5353 /* Clear reserved bit before vfree. */
5454 unsigned char *p;
@@ -61,123 +61,3 @@ static void spu_free_lscsa_std(struct spu_state *csa) · 6 unmodified lines
6161
6262 vfree(csa->lscsa);
6363 }
64−
65−#ifdef CONFIG_SPU_FS_64K_LS
66−
67−#define SPU_64K_PAGE_SHIFT 16
68−#define SPU_64K_PAGE_ORDER (SPU_64K_PAGE_SHIFT - PAGE_SHIFT)
69−#define SPU_64K_PAGE_COUNT (1ul << SPU_64K_PAGE_ORDER)
70−
71−int spu_alloc_lscsa(struct spu_state *csa)
72−{
73− struct page **pgarray;
74− unsigned char *p;
75− int i, j, n_4k;
76−
77− /* Check availability of 64K pages */
78− if (!spu_64k_pages_available())
79− goto fail;
80−
81− csa->use_big_pages = 1;
82−
83− pr_debug("spu_alloc_lscsa(csa=0x%p), trying to allocate 64K pages\n",
84− csa);
85−
86− /* First try to allocate our 64K pages. We need 5 of them
87− * with the current implementation. In the future, we should try
88− * to separate the lscsa with the actual local store image, thus
89− * allowing us to require only 4 64K pages per context
90− */
91− for (i = 0; i < SPU_LSCSA_NUM_BIG_PAGES; i++) {
92− /* XXX This is likely to fail, we should use a special pool
93− * similar to what hugetlbfs does.
94− */
95− csa->lscsa_pages[i] = alloc_pages(GFP_KERNEL,
96− SPU_64K_PAGE_ORDER);
97− if (csa->lscsa_pages[i] == NULL)
98− goto fail;
99− }
100−
101− pr_debug(" success ! creating vmap...\n");
102−
103− /* Now we need to create a vmalloc mapping of these for the kernel
104− * and SPU context switch code to use. Currently, we stick to a
105− * normal kernel vmalloc mapping, which in our case will be 4K
106− */
107− n_4k = SPU_64K_PAGE_COUNT * SPU_LSCSA_NUM_BIG_PAGES;
108− pgarray = kmalloc(sizeof(struct page *) * n_4k, GFP_KERNEL);
109− if (pgarray == NULL)
110− goto fail;
111− for (i = 0; i < SPU_LSCSA_NUM_BIG_PAGES; i++)
112− for (j = 0; j < SPU_64K_PAGE_COUNT; j++)
113− /* We assume all the struct page's are contiguous
114− * which should be hopefully the case for an order 4
115− * allocation..
116− */
117− pgarray[i * SPU_64K_PAGE_COUNT + j] =
118− csa->lscsa_pages[i] + j;
119− csa->lscsa = vmap(pgarray, n_4k, VM_USERMAP, PAGE_KERNEL);
120− kfree(pgarray);
121− if (csa->lscsa == NULL)
122− goto fail;
123−
124− memset(csa->lscsa, 0, sizeof(struct spu_lscsa));
125−
126− /* Set LS pages reserved to allow for user-space mapping.
127− *
128− * XXX isn't that a bit obsolete ? I think we should just
129− * make sure the page count is high enough. Anyway, won't harm
130− * for now
131− */
132− for (p = csa->lscsa->ls; p < csa->lscsa->ls + LS_SIZE; p += PAGE_SIZE)
133− SetPageReserved(vmalloc_to_page(p));
134−
135− pr_debug(" all good !\n");
136−
137− return 0;
138−fail:
139− pr_debug("spufs: failed to allocate lscsa 64K pages, falling back\n");
140− spu_free_lscsa(csa);
141− return spu_alloc_lscsa_std(csa);
142−}
143−
144−void spu_free_lscsa(struct spu_state *csa)
145−{
146− unsigned char *p;
147− int i;
148−
149− if (!csa->use_big_pages) {
150− spu_free_lscsa_std(csa);
151− return;
152− }
153− csa->use_big_pages = 0;
154−
155− if (csa->lscsa == NULL)
156− goto free_pages;
157−
158− for (p = csa->lscsa->ls; p < csa->lscsa->ls + LS_SIZE; p += PAGE_SIZE)
159− ClearPageReserved(vmalloc_to_page(p));
160−
161− vunmap(csa->lscsa);
162− csa->lscsa = NULL;
163−
164− free_pages:
165−
166− for (i = 0; i < SPU_LSCSA_NUM_BIG_PAGES; i++)
167− if (csa->lscsa_pages[i])
168− __free_pages(csa->lscsa_pages[i], SPU_64K_PAGE_ORDER);
169−}
170−
171−#else /* CONFIG_SPU_FS_64K_LS */
172−
173−int spu_alloc_lscsa(struct spu_state *csa)
174−{
175− return spu_alloc_lscsa_std(csa);
176−}
177−
178−void spu_free_lscsa(struct spu_state *csa)
179−{
180− spu_free_lscsa_std(csa);
181−}
182−
183−#endif /* !defined(CONFIG_SPU_FS_64K_LS) */
arch/powerpc/platforms/powernv/eeh-powernv.c+10−2
@@ -1394,11 +1394,19 @@ static int pnv_eeh_next_error(struct eeh_pe **pe) · 1393 unmodified lines
13941394 */
13951395 if (pnv_eeh_get_pe(hose,
13961396 be64_to_cpu(frozen_pe_no), pe)) {
1397− /* Try best to clear it */
13981397 pr_info("EEH: Clear non-existing PHB#%x-PE#%llx\n",
1399− hose->global_number, frozen_pe_no);
1398+ hose->global_number, be64_to_cpu(frozen_pe_no));
14001399 pr_info("EEH: PHB location: %s\n",
14011400 eeh_pe_loc_get(phb_pe));
1401+
1402+ /* Dump PHB diag-data */
1403+ rc = opal_pci_get_phb_diag_data2(phb->opal_id,
1404+ phb->diag.blob, PNV_PCI_DIAG_BUF_SIZE);
1405+ if (rc == OPAL_SUCCESS)
1406+ pnv_pci_dump_phb_diag_data(hose,
1407+ phb->diag.blob);
1408+
1409+ /* Try best to clear it */
14021410 opal_pci_eeh_freeze_clear(phb->opal_id,
14031411 frozen_pe_no,
14041412 OPAL_EEH_ACTION_CLEAR_FREEZE_ALL);
arch/powerpc/platforms/powernv/opal-hmi.c+175−2
@@ -35,9 +35,134 @@ struct OpalHmiEvtNode { · 34 unmodified lines
3535 struct list_head list;
3636 struct OpalHMIEvent hmi_evt;
3737 };
38+
39+struct xstop_reason {
40+ uint32_t xstop_reason;
41+ const char *unit_failed;
42+ const char *description;
43+};
44+
3845 static LIST_HEAD(opal_hmi_evt_list);
3946 static DEFINE_SPINLOCK(opal_hmi_evt_lock);
4047
48+static void print_core_checkstop_reason(const char *level,
49+ struct OpalHMIEvent *hmi_evt)
50+{
51+ int i;
52+ static const struct xstop_reason xstop_reason[] = {
53+ { CORE_CHECKSTOP_IFU_REGFILE, "IFU",
54+ "RegFile core check stop" },
55+ { CORE_CHECKSTOP_IFU_LOGIC, "IFU", "Logic core check stop" },
56+ { CORE_CHECKSTOP_PC_DURING_RECOV, "PC",
57+ "Core checkstop during recovery" },
58+ { CORE_CHECKSTOP_ISU_REGFILE, "ISU",
59+ "RegFile core check stop (mapper error)" },
60+ { CORE_CHECKSTOP_ISU_LOGIC, "ISU", "Logic core check stop" },
61+ { CORE_CHECKSTOP_FXU_LOGIC, "FXU", "Logic core check stop" },
62+ { CORE_CHECKSTOP_VSU_LOGIC, "VSU", "Logic core check stop" },
63+ { CORE_CHECKSTOP_PC_RECOV_IN_MAINT_MODE, "PC",
64+ "Recovery in maintenance mode" },
65+ { CORE_CHECKSTOP_LSU_REGFILE, "LSU",
66+ "RegFile core check stop" },
67+ { CORE_CHECKSTOP_PC_FWD_PROGRESS, "PC",
68+ "Forward Progress Error" },
69+ { CORE_CHECKSTOP_LSU_LOGIC, "LSU", "Logic core check stop" },
70+ { CORE_CHECKSTOP_PC_LOGIC, "PC", "Logic core check stop" },
71+ { CORE_CHECKSTOP_PC_HYP_RESOURCE, "PC",
72+ "Hypervisor Resource error - core check stop" },
73+ { CORE_CHECKSTOP_PC_HANG_RECOV_FAILED, "PC",
74+ "Hang Recovery Failed (core check stop)" },
75+ { CORE_CHECKSTOP_PC_AMBI_HANG_DETECTED, "PC",
76+ "Ambiguous Hang Detected (unknown source)" },
77+ { CORE_CHECKSTOP_PC_DEBUG_TRIG_ERR_INJ, "PC",
78+ "Debug Trigger Error inject" },
79+ { CORE_CHECKSTOP_PC_SPRD_HYP_ERR_INJ, "PC",
80+ "Hypervisor check stop via SPRC/SPRD" },
81+ };
82+
83+ /* Validity check */
84+ if (!hmi_evt->u.xstop_error.xstop_reason) {
85+ printk("%s Unknown Core check stop.\n", level);
86+ return;
87+ }
88+
89+ printk("%s CPU PIR: %08x\n", level,
90+ be32_to_cpu(hmi_evt->u.xstop_error.u.pir));
91+ for (i = 0; i < ARRAY_SIZE(xstop_reason); i++)
92+ if (be32_to_cpu(hmi_evt->u.xstop_error.xstop_reason) &
93+ xstop_reason[i].xstop_reason)
94+ printk("%s [Unit: %-3s] %s\n", level,
95+ xstop_reason[i].unit_failed,
96+ xstop_reason[i].description);
97+}
98+
99+static void print_nx_checkstop_reason(const char *level,
100+ struct OpalHMIEvent *hmi_evt)
101+{
102+ int i;
103+ static const struct xstop_reason xstop_reason[] = {
104+ { NX_CHECKSTOP_SHM_INVAL_STATE_ERR, "DMA & Engine",
105+ "SHM invalid state error" },
106+ { NX_CHECKSTOP_DMA_INVAL_STATE_ERR_1, "DMA & Engine",
107+ "DMA invalid state error bit 15" },
108+ { NX_CHECKSTOP_DMA_INVAL_STATE_ERR_2, "DMA & Engine",
109+ "DMA invalid state error bit 16" },
110+ { NX_CHECKSTOP_DMA_CH0_INVAL_STATE_ERR, "DMA & Engine",
111+ "Channel 0 invalid state error" },
112+ { NX_CHECKSTOP_DMA_CH1_INVAL_STATE_ERR, "DMA & Engine",
113+ "Channel 1 invalid state error" },
114+ { NX_CHECKSTOP_DMA_CH2_INVAL_STATE_ERR, "DMA & Engine",
115+ "Channel 2 invalid state error" },
116+ { NX_CHECKSTOP_DMA_CH3_INVAL_STATE_ERR, "DMA & Engine",
117+ "Channel 3 invalid state error" },
118+ { NX_CHECKSTOP_DMA_CH4_INVAL_STATE_ERR, "DMA & Engine",
119+ "Channel 4 invalid state error" },
120+ { NX_CHECKSTOP_DMA_CH5_INVAL_STATE_ERR, "DMA & Engine",
121+ "Channel 5 invalid state error" },
122+ { NX_CHECKSTOP_DMA_CH6_INVAL_STATE_ERR, "DMA & Engine",
123+ "Channel 6 invalid state error" },
124+ { NX_CHECKSTOP_DMA_CH7_INVAL_STATE_ERR, "DMA & Engine",
125+ "Channel 7 invalid state error" },
126+ { NX_CHECKSTOP_DMA_CRB_UE, "DMA & Engine",
127+ "UE error on CRB(CSB address, CCB)" },
128+ { NX_CHECKSTOP_DMA_CRB_SUE, "DMA & Engine",
129+ "SUE error on CRB(CSB address, CCB)" },
130+ { NX_CHECKSTOP_PBI_ISN_UE, "PowerBus Interface",
131+ "CRB Kill ISN received while holding ISN with UE error" },
132+ };
133+
134+ /* Validity check */
135+ if (!hmi_evt->u.xstop_error.xstop_reason) {
136+ printk("%s Unknown NX check stop.\n", level);
137+ return;
138+ }
139+
140+ printk("%s NX checkstop on CHIP ID: %x\n", level,
141+ be32_to_cpu(hmi_evt->u.xstop_error.u.chip_id));
142+ for (i = 0; i < ARRAY_SIZE(xstop_reason); i++)
143+ if (be32_to_cpu(hmi_evt->u.xstop_error.xstop_reason) &
144+ xstop_reason[i].xstop_reason)
145+ printk("%s [Unit: %-3s] %s\n", level,
146+ xstop_reason[i].unit_failed,
147+ xstop_reason[i].description);
148+}
149+
150+static void print_checkstop_reason(const char *level,
151+ struct OpalHMIEvent *hmi_evt)
152+{
153+ switch (hmi_evt->u.xstop_error.xstop_type) {
154+ case CHECKSTOP_TYPE_CORE:
155+ print_core_checkstop_reason(level, hmi_evt);
156+ break;
157+ case CHECKSTOP_TYPE_NX:
158+ print_nx_checkstop_reason(level, hmi_evt);
159+ break;
160+ case CHECKSTOP_TYPE_UNKNOWN:
161+ printk("%s Unknown Malfunction Alert.\n", level);
162+ break;
163+ }
164+}
165+
41166 static void print_hmi_event_info(struct OpalHMIEvent *hmi_evt)
42167 {
43168 const char *level, *sevstr, *error_info;
@@ -95,6 +220,13 @@ static void print_hmi_event_info(struct OpalHMIEvent *hmi_evt) · 51 unmodified lines
95220 (hmi_evt->type == OpalHMI_ERROR_TFMR_PARITY))
96221 printk("%s TFMR: %016llx\n", level,
97222 be64_to_cpu(hmi_evt->tfmr));
223+
224+ if (hmi_evt->version < OpalHMIEvt_V2)
225+ return;
226+
227+ /* OpalHMIEvt_V2 and above provides reason for malfunction alert. */
228+ if (hmi_evt->type == OpalHMI_ERROR_MALFUNC_ALERT)
229+ print_checkstop_reason(level, hmi_evt);
98230 }
99231
100232 static void hmi_event_handler(struct work_struct *work)
@@ -103,6 +235,8 @@ static void hmi_event_handler(struct work_struct *work) · 2 unmodified lines
103235 struct OpalHMIEvent *hmi_evt;
104236 struct OpalHmiEvtNode *msg_node;
105237 uint8_t disposition;
238+ struct opal_msg msg;
239+ int unrecoverable = 0;
106240
107241 spin_lock_irqsave(&opal_hmi_evt_lock, flags);
108242 while (!list_empty(&opal_hmi_evt_list)) {
@@ -118,14 +252,53 @@ static void hmi_event_handler(struct work_struct *work) · 9 unmodified lines
118252
119253 /*
120254 * Check if HMI event has been recovered or not. If not
121− * then we can't continue, invoke panic.
255+ * then kernel can't continue, we need to panic.
256+ * But before we do that, display all the HMI event
257+ * available on the list and set unrecoverable flag to 1.
122258 */
123259 if (disposition != OpalHMI_DISPOSITION_RECOVERED)
124− panic("Unrecoverable HMI exception");
260+ unrecoverable = 1;
125261
126262 spin_lock_irqsave(&opal_hmi_evt_lock, flags);
127263 }
128264 spin_unlock_irqrestore(&opal_hmi_evt_lock, flags);
265+
266+ if (unrecoverable) {
267+ int ret;
268+
269+ /* Pull all HMI events from OPAL before we panic. */
270+ while (opal_get_msg(__pa(&msg), sizeof(msg)) == OPAL_SUCCESS) {
271+ u32 type;
272+
273+ type = be32_to_cpu(msg.msg_type);
274+
275+ /* skip if not HMI event */
276+ if (type != OPAL_MSG_HMI_EVT)
277+ continue;
278+
279+ /* HMI event info starts from param[0] */
280+ hmi_evt = (struct OpalHMIEvent *)&msg.params[0];
281+ print_hmi_event_info(hmi_evt);
282+ }
283+
284+ /*
285+ * Unrecoverable HMI exception. We need to inform BMC/OCC
286+ * about this error so that it can collect relevant data
287+ * for error analysis before rebooting.
288+ */
289+ ret = opal_cec_reboot2(OPAL_REBOOT_PLATFORM_ERROR,
290+ "Unrecoverable HMI exception");
291+ if (ret == OPAL_UNSUPPORTED) {
292+ pr_emerg("Reboot type %d not supported\n",
293+ OPAL_REBOOT_PLATFORM_ERROR);
294+ }
295+
296+ /*
297+ * Fall through and panic if opal_cec_reboot2() returns
298+ * OPAL_UNSUPPORTED.
299+ */
300+ panic("Unrecoverable HMI exception");
301+ }
129302 }
130303
131304 static DECLARE_WORK(hmi_event_work, hmi_event_handler);
arch/powerpc/platforms/powernv/opal-power.c+130−17
@@ -9,9 +9,12 @@ · 8 unmodified lines
99 * 2 of the License, or (at your option) any later version.
1010 */
1111
12+#define pr_fmt(fmt) "opal-power: " fmt
13+
1214 #include <linux/kernel.h>
1315 #include <linux/reboot.h>
1416 #include <linux/notifier.h>
17+#include <linux/of.h>
1518
1619 #include <asm/opal.h>
1720 #include <asm/machdep.h>
@@ -19,30 +22,116 @@ · 1 unmodified line
1922 #define SOFT_OFF 0x00
2023 #define SOFT_REBOOT 0x01
2124
25+/* Detect EPOW event */
26+static bool detect_epow(void)
27+{
28+ u16 epow;
29+ int i, rc;
30+ __be16 epow_classes;
31+ __be16 opal_epow_status[OPAL_SYSEPOW_MAX] = {0};
32+
33+ /*
34+ * Check for EPOW event. Kernel sends supported EPOW classes info
35+ * to OPAL. OPAL returns EPOW info along with classes present.
36+ */
37+ epow_classes = cpu_to_be16(OPAL_SYSEPOW_MAX);
38+ rc = opal_get_epow_status(opal_epow_status, &epow_classes);
39+ if (rc != OPAL_SUCCESS) {
40+ pr_err("Failed to get EPOW event information\n");
41+ return false;
42+ }
43+
44+ /* Look for EPOW events present */
45+ for (i = 0; i < be16_to_cpu(epow_classes); i++) {
46+ epow = be16_to_cpu(opal_epow_status[i]);
47+
48+ /* Filter events which do not need shutdown. */
49+ if (i == OPAL_SYSEPOW_POWER)
50+ epow &= ~(OPAL_SYSPOWER_CHNG | OPAL_SYSPOWER_FAIL |
51+ OPAL_SYSPOWER_INCL);
52+ if (epow)
53+ return true;
54+ }
55+
56+ return false;
57+}
58+
59+/* Check for existing EPOW, DPO events */
60+static bool poweroff_pending(void)
61+{
62+ int rc;
63+ __be64 opal_dpo_timeout;
64+
65+ /* Check for DPO event */
66+ rc = opal_get_dpo_status(&opal_dpo_timeout);
67+ if (rc == OPAL_SUCCESS) {
68+ pr_info("Existing DPO event detected.\n");
69+ return true;
70+ }
71+
72+ /* Check for EPOW event */
73+ if (detect_epow()) {
74+ pr_info("Existing EPOW event detected.\n");
75+ return true;
76+ }
77+
78+ return false;
79+}
80+
81+/* OPAL power-control events notifier */
2282 static int opal_power_control_event(struct notifier_block *nb,
23− unsigned long msg_type, void *msg)
83+ unsigned long msg_type, void *msg)
2484 {
25− struct opal_msg *power_msg = msg;
2685 uint64_t type;
2786
28− type = be64_to_cpu(power_msg->params[0]);
29−
30− switch (type) {
31− case SOFT_REBOOT:
32− pr_info("OPAL: reboot requested\n");
33− orderly_reboot();
87+ switch (msg_type) {
88+ case OPAL_MSG_EPOW:
89+ if (detect_epow()) {
90+ pr_info("EPOW msg received. Powering off system\n");
91+ orderly_poweroff(true);
92+ }
3493 break;
35− case SOFT_OFF:
36− pr_info("OPAL: poweroff requested\n");
94+ case OPAL_MSG_DPO:
95+ pr_info("DPO msg received. Powering off system\n");
3796 orderly_poweroff(true);
3897 break;
98+ case OPAL_MSG_SHUTDOWN:
99+ type = be64_to_cpu(((struct opal_msg *)msg)->params[0]);
100+ switch (type) {
101+ case SOFT_REBOOT:
102+ pr_info("Reboot requested\n");
103+ orderly_reboot();
104+ break;
105+ case SOFT_OFF:
106+ pr_info("Poweroff requested\n");
107+ orderly_poweroff(true);
108+ break;
109+ default:
110+ pr_err("Unknown power-control type %llu\n", type);
111+ }
112+ break;
39113 default:
40− pr_err("OPAL: power control type unexpected %016llx\n", type);
114+ pr_err("Unknown OPAL message type %lu\n", msg_type);
41115 }
42116
43117 return 0;
44118 }
45119
120+/* OPAL EPOW event notifier block */
121+static struct notifier_block opal_epow_nb = {
122+ .notifier_call = opal_power_control_event,
123+ .next = NULL,
124+ .priority = 0,
125+};
126+
127+/* OPAL DPO event notifier block */
128+static struct notifier_block opal_dpo_nb = {
129+ .notifier_call = opal_power_control_event,
130+ .next = NULL,
131+ .priority = 0,
132+};
133+
134+/* OPAL power-control event notifier block */
46135 static struct notifier_block opal_power_control_nb = {
47136 .notifier_call = opal_power_control_event,
48137 .next = NULL,
@@ -51,16 +140,40 @@ static struct notifier_block opal_power_control_nb = { · 2 unmodified lines
51140
52141 static int __init opal_power_control_init(void)
53142 {
54− int ret;
143+ int ret, supported = 0;
144+ struct device_node *np;
55145
146+ /* Register OPAL power-control events notifier */
56147 ret = opal_message_notifier_register(OPAL_MSG_SHUTDOWN,
57− &opal_power_control_nb);
58− if (ret) {
59− pr_err("%s: Can't register OPAL event notifier (%d)\n",
60− __func__, ret);
61− return ret;
148+ &opal_power_control_nb);
149+ if (ret)
150+ pr_err("Failed to register SHUTDOWN notifier, ret = %d\n", ret);
151+
152+ /* Determine OPAL EPOW, DPO support */
153+ np = of_find_node_by_path("/ibm,opal/epow");
154+ if (np) {
155+ supported = of_device_is_compatible(np, "ibm,opal-v3-epow");
156+ of_node_put(np);
62157 }
63158
159+ if (!supported)
160+ return 0;
161+ pr_info("OPAL EPOW, DPO support detected.\n");
162+
163+ /* Register EPOW event notifier */
164+ ret = opal_message_notifier_register(OPAL_MSG_EPOW, &opal_epow_nb);
165+ if (ret)
166+ pr_err("Failed to register EPOW notifier, ret = %d\n", ret);
167+
168+ /* Register DPO event notifier */
169+ ret = opal_message_notifier_register(OPAL_MSG_DPO, &opal_dpo_nb);
170+ if (ret)
171+ pr_err("Failed to register DPO notifier, ret = %d\n", ret);
172+
173+ /* Check for any pending EPOW or DPO events. */
174+ if (poweroff_pending())
175+ orderly_poweroff(true);
176+
64177 return 0;
65178 }
66179 machine_subsys_initcall(powernv, opal_power_control_init);
arch/powerpc/platforms/powernv/opal-wrappers.S+4−0
@@ -202,6 +202,7 @@ OPAL_CALL(opal_rtc_read, OPAL_RTC_READ); · 201 unmodified lines
202202 OPAL_CALL(opal_rtc_write, OPAL_RTC_WRITE);
203203 OPAL_CALL(opal_cec_power_down, OPAL_CEC_POWER_DOWN);
204204 OPAL_CALL(opal_cec_reboot, OPAL_CEC_REBOOT);
205+OPAL_CALL(opal_cec_reboot2, OPAL_CEC_REBOOT2);
205206 OPAL_CALL(opal_read_nvram, OPAL_READ_NVRAM);
206207 OPAL_CALL(opal_write_nvram, OPAL_WRITE_NVRAM);
207208 OPAL_CALL(opal_handle_interrupt, OPAL_HANDLE_INTERRUPT);
@@ -249,6 +250,7 @@ OPAL_CALL(opal_pci_reinit, OPAL_PCI_REINIT); · 41 unmodified lines
249250 OPAL_CALL(opal_pci_mask_pe_error, OPAL_PCI_MASK_PE_ERROR);
250251 OPAL_CALL(opal_set_slot_led_status, OPAL_SET_SLOT_LED_STATUS);
251252 OPAL_CALL(opal_get_epow_status, OPAL_GET_EPOW_STATUS);
253+OPAL_CALL(opal_get_dpo_status, OPAL_GET_DPO_STATUS);
252254 OPAL_CALL(opal_set_system_attention_led, OPAL_SET_SYSTEM_ATTENTION_LED);
253255 OPAL_CALL(opal_pci_next_error, OPAL_PCI_NEXT_ERROR);
254256 OPAL_CALL(opal_pci_poll, OPAL_PCI_POLL);
@@ -297,3 +299,5 @@ OPAL_CALL(opal_flash_read, OPAL_FLASH_READ); · 42 unmodified lines
297299 OPAL_CALL(opal_flash_write, OPAL_FLASH_WRITE);
298300 OPAL_CALL(opal_flash_erase, OPAL_FLASH_ERASE);
299301 OPAL_CALL(opal_prd_msg, OPAL_PRD_MSG);
302+OPAL_CALL(opal_leds_get_ind, OPAL_LEDS_GET_INDICATOR);
303+OPAL_CALL(opal_leds_set_ind, OPAL_LEDS_SET_INDICATOR);
arch/powerpc/platforms/powernv/opal.c+46−1
@@ -441,6 +441,7 @@ static int opal_recover_mce(struct pt_regs *regs, · 440 unmodified lines
441441 int opal_machine_check(struct pt_regs *regs)
442442 {
443443 struct machine_check_event evt;
444+ int ret;
444445
445446 if (!get_mce_event(&evt, MCE_EVENT_RELEASE))
446447 return 0;
@@ -455,6 +456,40 @@ int opal_machine_check(struct pt_regs *regs) · 8 unmodified lines
455456
456457 if (opal_recover_mce(regs, &evt))
457458 return 1;
459+
460+ /*
461+ * Unrecovered machine check, we are heading to panic path.
462+ *
463+ * We may have hit this MCE in very early stage of kernel
464+ * initialization even before opal-prd has started running. If
465+ * this is the case then this MCE error may go un-noticed or
466+ * un-analyzed if we go down panic path. We need to inform
467+ * BMC/OCC about this error so that they can collect relevant
468+ * data for error analysis before rebooting.
469+ * Use opal_cec_reboot2(OPAL_REBOOT_PLATFORM_ERROR) to do so.
470+ * This function may not return on BMC based system.
471+ */
472+ ret = opal_cec_reboot2(OPAL_REBOOT_PLATFORM_ERROR,
473+ "Unrecoverable Machine Check exception");
474+ if (ret == OPAL_UNSUPPORTED) {
475+ pr_emerg("Reboot type %d not supported\n",
476+ OPAL_REBOOT_PLATFORM_ERROR);
477+ }
478+
479+ /*
480+ * We reached here. There can be three possibilities:
481+ * 1. We are running on a firmware level that do not support
482+ * opal_cec_reboot2()
483+ * 2. We are running on a firmware level that do not support
484+ * OPAL_REBOOT_PLATFORM_ERROR reboot type.
485+ * 3. We are running on FSP based system that does not need opal
486+ * to trigger checkstop explicitly for error analysis. The FSP
487+ * PRD component would have already got notified about this
488+ * error through other channels.
489+ *
490+ * In any case, let us just fall through. We anyway heading
491+ * down to panic path.
492+ */
458493 return 0;
459494 }
460495
@@ -648,7 +683,7 @@ static void opal_init_heartbeat(void) · 187 unmodified lines
648683
649684 static int __init opal_init(void)
650685 {
651− struct device_node *np, *consoles;
686+ struct device_node *np, *consoles, *leds;
652687 int rc;
653688
654689 opal_node = of_find_node_by_path("/ibm,opal");
@@ -689,6 +724,13 @@ static int __init opal_init(void) · 34 unmodified lines
689724 /* Setup a heatbeat thread if requested by OPAL */
690725 opal_init_heartbeat();
691726
727+ /* Create leds platform devices */
728+ leds = of_find_node_by_path("/ibm,opal/leds");
729+ if (leds) {
730+ of_platform_device_create(leds, "opal_leds", NULL);
731+ of_node_put(leds);
732+ }
733+
692734 /* Create "opal" kobject under /sys/firmware */
693735 rc = opal_sysfs_init();
694736 if (rc == 0) {
@@ -841,3 +883,6 @@ EXPORT_SYMBOL_GPL(opal_rtc_write); · 146 unmodified lines
841883 EXPORT_SYMBOL_GPL(opal_tpo_read);
842884 EXPORT_SYMBOL_GPL(opal_tpo_write);
843885 EXPORT_SYMBOL_GPL(opal_i2c_request);
886+/* Export these symbols for PowerNV LED class driver */
887+EXPORT_SYMBOL_GPL(opal_leds_get_ind);
888+EXPORT_SYMBOL_GPL(opal_leds_set_ind);
arch/powerpc/platforms/powernv/pci-ioda.c+59−88
@@ -140,11 +140,9 @@ static void pnv_ioda_reserve_pe(struct pnv_phb *phb, int pe_no) · 139 unmodified lines
140140 return;
141141 }
142142
143− if (test_and_set_bit(pe_no, phb->ioda.pe_alloc)) {
144− pr_warn("%s: PE %d was assigned on PHB#%x\n",
145− __func__, pe_no, phb->hose->global_number);
146− return;
147− }
143+ if (test_and_set_bit(pe_no, phb->ioda.pe_alloc))
144+ pr_debug("%s: PE %d was reserved on PHB#%x\n",
145+ __func__, pe_no, phb->hose->global_number);
148146
149147 phb->ioda.pe_array[pe_no].phb = phb;
150148 phb->ioda.pe_array[pe_no].pe_number = pe_no;
@@ -231,61 +229,60 @@ fail: · 80 unmodified lines
231229 return -EIO;
232230 }
233231
234−static void pnv_ioda2_reserve_m64_pe(struct pnv_phb *phb)
232+static void pnv_ioda2_reserve_dev_m64_pe(struct pci_dev *pdev,
233+ unsigned long *pe_bitmap)
235234 {
236− resource_size_t sgsz = phb->ioda.m64_segsize;
237− struct pci_dev *pdev;
235+ struct pci_controller *hose = pci_bus_to_host(pdev->bus);
236+ struct pnv_phb *phb = hose->private_data;
238237 struct resource *r;
239− int base, step, i;
240−
241− /*
242− * Root bus always has full M64 range and root port has
243− * M64 range used in reality. So we're checking root port
244− * instead of root bus.
245− */
246− list_for_each_entry(pdev, &phb->hose->bus->devices, bus_list) {
247− for (i = 0; i < PCI_BRIDGE_RESOURCE_NUM; i++) {
248− r = &pdev->resource[PCI_BRIDGE_RESOURCES + i];
249− if (!r->parent ||
250− !pnv_pci_is_mem_pref_64(r->flags))
251− continue;
238+ resource_size_t base, sgsz, start, end;
239+ int segno, i;
240+
241+ base = phb->ioda.m64_base;
242+ sgsz = phb->ioda.m64_segsize;
243+ for (i = 0; i <= PCI_ROM_RESOURCE; i++) {
244+ r = &pdev->resource[i];
245+ if (!r->parent || !pnv_pci_is_mem_pref_64(r->flags))
246+ continue;
252247
253− base = (r->start - phb->ioda.m64_base) / sgsz;
254− for (step = 0; step < resource_size(r) / sgsz; step++)
255− pnv_ioda_reserve_pe(phb, base + step);
248+ start = _ALIGN_DOWN(r->start - base, sgsz);
249+ end = _ALIGN_UP(r->end - base, sgsz);
250+ for (segno = start / sgsz; segno < end / sgsz; segno++) {
251+ if (pe_bitmap)
252+ set_bit(segno, pe_bitmap);
253+ else
254+ pnv_ioda_reserve_pe(phb, segno);
256255 }
257256 }
258257 }
259258
260−static int pnv_ioda2_pick_m64_pe(struct pnv_phb *phb,
261− struct pci_bus *bus, int all)
259+static void pnv_ioda2_reserve_m64_pe(struct pci_bus *bus,
260+ unsigned long *pe_bitmap,
261+ bool all)
262262 {
263− resource_size_t segsz = phb->ioda.m64_segsize;
264263 struct pci_dev *pdev;
265− struct resource *r;
264+
265+ list_for_each_entry(pdev, &bus->devices, bus_list) {
266+ pnv_ioda2_reserve_dev_m64_pe(pdev, pe_bitmap);
267+
268+ if (all && pdev->subordinate)
269+ pnv_ioda2_reserve_m64_pe(pdev->subordinate,
270+ pe_bitmap, all);
271+ }
272+}
273+
274+static int pnv_ioda2_pick_m64_pe(struct pci_bus *bus, bool all)
275+{
276+ struct pci_controller *hose = pci_bus_to_host(bus);
277+ struct pnv_phb *phb = hose->private_data;
266278 struct pnv_ioda_pe *master_pe, *pe;
267279 unsigned long size, *pe_alloc;
268− bool found;
269− int start, i, j;
280+ int i;
270281
271282 /* Root bus shouldn't use M64 */
272283 if (pci_is_root_bus(bus))
273284 return IODA_INVALID_PE;
274285
275− /* We support only one M64 window on each bus */
276− found = false;
277− pci_bus_for_each_resource(bus, r, i) {
278− if (r && r->parent &&
279− pnv_pci_is_mem_pref_64(r->flags)) {
280− found = true;
281− break;
282− }
283− }
284−
285− /* No M64 window found ? */
286− if (!found)
287− return IODA_INVALID_PE;
288−
289286 /* Allocate bitmap */
290287 size = _ALIGN_UP(phb->ioda.total_pe / 8, sizeof(unsigned long));
291288 pe_alloc = kzalloc(size, GFP_KERNEL);
@@ -295,35 +292,8 @@ static int pnv_ioda2_pick_m64_pe(struct pnv_phb *phb, · 3 unmodified lines
295292 return IODA_INVALID_PE;
296293 }
297294
298− /*
299− * Figure out reserved PE numbers by the PE
300− * the its child PEs.
301− */
302− start = (r->start - phb->ioda.m64_base) / segsz;
303− for (i = 0; i < resource_size(r) / segsz; i++)
304− set_bit(start + i, pe_alloc);
305−
306− if (all)
307− goto done;
308−
309− /*
310− * If the PE doesn't cover all subordinate buses,
311− * we need subtract from reserved PEs for children.
312− */
313− list_for_each_entry(pdev, &bus->devices, bus_list) {
314− if (!pdev->subordinate)
315− continue;
316−
317− pci_bus_for_each_resource(pdev->subordinate, r, i) {
318− if (!r || !r->parent ||
319− !pnv_pci_is_mem_pref_64(r->flags))
320− continue;
321−
322− start = (r->start - phb->ioda.m64_base) / segsz;
323− for (j = 0; j < resource_size(r) / segsz ; j++)
324− clear_bit(start + j, pe_alloc);
325− }
326− }
295+ /* Figure out reserved PE numbers by the PE */
296+ pnv_ioda2_reserve_m64_pe(bus, pe_alloc, all);
327297
328298 /*
329299 * the current bus might not own M64 window and that's all
@@ -339,7 +309,6 @@ static int pnv_ioda2_pick_m64_pe(struct pnv_phb *phb, · 9 unmodified lines
339309 * Figure out the master PE and put all slave PEs to master
340310 * PE's list to form compound PE.
341311 */
342−done:
343312 master_pe = NULL;
344313 i = -1;
345314 while ((i = find_next_bit(pe_alloc, phb->ioda.total_pe, i + 1)) <
@@ -653,7 +622,7 @@ static int pnv_ioda_set_peltv(struct pnv_phb *phb, · 307 unmodified lines
653622 pdev = pe->pdev->bus->self;
654623 #ifdef CONFIG_PCI_IOV
655624 else if (pe->flags & PNV_IODA_PE_VF)
656− pdev = pe->parent_dev->bus->self;
625+ pdev = pe->parent_dev;
657626 #endif /* CONFIG_PCI_IOV */
658627 while (pdev) {
659628 struct pci_dn *pdn = pci_get_pdn(pdev);
@@ -732,7 +701,7 @@ static int pnv_ioda_deconfigure_pe(struct pnv_phb *phb, struct pnv_ioda_pe *pe) · 72 unmodified lines
732701 parent = parent->bus->self;
733702 }
734703
735− opal_pci_eeh_freeze_set(phb->opal_id, pe->pe_number,
704+ opal_pci_eeh_freeze_clear(phb->opal_id, pe->pe_number,
736705 OPAL_EEH_ACTION_CLEAR_FREEZE_ALL);
737706
738707 /* Disassociate PE in PELT */
@@ -946,8 +915,9 @@ static int pnv_pci_vf_resource_shift(struct pci_dev *dev, int offset) · 207 unmodified lines
946915 res2 = *res;
947916 res->start += size * offset;
948917
949− dev_info(&dev->dev, "VF BAR%d: %pR shifted to %pR (enabling %d VFs shifted by %d)\n",
950− i, &res2, res, num_vfs, offset);
918+ dev_info(&dev->dev, "VF BAR%d: %pR shifted to %pR (%sabling %d VFs shifted by %d)\n",
919+ i, &res2, res, (offset > 0) ? "En" : "Dis",
920+ num_vfs, offset);
951921 pci_update_resource(dev, i + PCI_IOV_RESOURCES);
952922 }
953923 return 0;
@@ -1050,7 +1020,7 @@ static void pnv_ioda_setup_same_PE(struct pci_bus *bus, struct pnv_ioda_pe *pe) · 96 unmodified lines
10501020 * subordinate PCI devices and buses. The second type of PE is normally
10511021 * orgiriated by PCIe-to-PCI bridge or PLX switch downstream ports.
10521022 */
1053−static void pnv_ioda_setup_bus_PE(struct pci_bus *bus, int all)
1023+static void pnv_ioda_setup_bus_PE(struct pci_bus *bus, bool all)
10541024 {
10551025 struct pci_controller *hose = pci_bus_to_host(bus);
10561026 struct pnv_phb *phb = hose->private_data;
@@ -1059,7 +1029,7 @@ static void pnv_ioda_setup_bus_PE(struct pci_bus *bus, int all) · 2 unmodified lines
10591029
10601030 /* Check if PE is determined by M64 */
10611031 if (phb->pick_m64_pe)
1062− pe_num = phb->pick_m64_pe(phb, bus, all);
1032+ pe_num = phb->pick_m64_pe(bus, all);
10631033
10641034 /* The PE number isn't pinned by M64 */
10651035 if (pe_num == IODA_INVALID_PE)
@@ -1117,12 +1087,12 @@ static void pnv_ioda_setup_PEs(struct pci_bus *bus) · 51 unmodified lines
11171087 {
11181088 struct pci_dev *dev;
11191089
1120− pnv_ioda_setup_bus_PE(bus, 0);
1090+ pnv_ioda_setup_bus_PE(bus, false);
11211091
11221092 list_for_each_entry(dev, &bus->devices, bus_list) {
11231093 if (dev->subordinate) {
11241094 if (pci_pcie_type(dev) == PCI_EXP_TYPE_PCI_BRIDGE)
1125− pnv_ioda_setup_bus_PE(dev->subordinate, 1);
1095+ pnv_ioda_setup_bus_PE(dev->subordinate, true);
11261096 else
11271097 pnv_ioda_setup_PEs(dev->subordinate);
11281098 }
@@ -1147,7 +1117,7 @@ static void pnv_pci_ioda_setup_PEs(void) · 18 unmodified lines
11471117
11481118 /* M64 layout might affect PE allocation */
11491119 if (phb->reserve_m64_pe)
1150− phb->reserve_m64_pe(phb);
1120+ phb->reserve_m64_pe(hose->bus, NULL, true);
11511121
11521122 pnv_ioda_setup_PEs(hose->bus);
11531123 }
@@ -1590,6 +1560,7 @@ static void pnv_pci_ioda_dma_dev_setup(struct pnv_phb *phb, struct pci_dev *pdev · 436 unmodified lines
15901560
15911561 pe = &phb->ioda.pe_array[pdn->pe_number];
15921562 WARN_ON(get_dma_ops(&pdev->dev) != &dma_iommu_ops);
1563+ set_dma_offset(&pdev->dev, pe->tce_bypass_base);
15931564 set_iommu_table_base(&pdev->dev, pe->table_group.tables[0]);
15941565 /*
15951566 * Note: iommu_add_device() will fail here as
@@ -1620,19 +1591,18 @@ static int pnv_pci_ioda_dma_set_mask(struct pci_dev *pdev, u64 dma_mask) · 24 unmodified lines
16201591 if (bypass) {
16211592 dev_info(&pdev->dev, "Using 64-bit DMA iommu bypass\n");
16221593 set_dma_ops(&pdev->dev, &dma_direct_ops);
1623− set_dma_offset(&pdev->dev, pe->tce_bypass_base);
16241594 } else {
16251595 dev_info(&pdev->dev, "Using 32-bit DMA via iommu\n");
16261596 set_dma_ops(&pdev->dev, &dma_iommu_ops);
1627− set_iommu_table_base(&pdev->dev, pe->table_group.tables[0]);
16281597 }
16291598 *pdev->dev.dma_mask = dma_mask;
16301599 return 0;
16311600 }
16321601
1633−static u64 pnv_pci_ioda_dma_get_required_mask(struct pnv_phb *phb,
1634− struct pci_dev *pdev)
1602+static u64 pnv_pci_ioda_dma_get_required_mask(struct pci_dev *pdev)
16351603 {
1604+ struct pci_controller *hose = pci_bus_to_host(pdev->bus);
1605+ struct pnv_phb *phb = hose->private_data;
16361606 struct pci_dn *pdn = pci_get_pdn(pdev);
16371607 struct pnv_ioda_pe *pe;
16381608 u64 end, mask;
@@ -1659,6 +1629,7 @@ static void pnv_ioda_setup_bus_dma(struct pnv_ioda_pe *pe, · 20 unmodified lines
16591629
16601630 list_for_each_entry(dev, &bus->devices, bus_list) {
16611631 set_iommu_table_base(&dev->dev, pe->table_group.tables[0]);
1632+ set_dma_offset(&dev->dev, pe->tce_bypass_base);
16621633 iommu_add_device(&dev->dev);
16631634
16641635 if ((pe->flags & PNV_IODA_PE_BUS_ALL) && dev->subordinate)
@@ -3057,6 +3028,7 @@ static const struct pci_controller_ops pnv_pci_ioda_controller_ops = { · 1392 unmodified lines
30573028 .window_alignment = pnv_pci_window_alignment,
30583029 .reset_secondary_bus = pnv_pci_reset_secondary_bus,
30593030 .dma_set_mask = pnv_pci_ioda_dma_set_mask,
3031+ .dma_get_required_mask = pnv_pci_ioda_dma_get_required_mask,
30603032 .shutdown = pnv_pci_ioda_shutdown,
30613033 };
30623034
@@ -3203,7 +3175,6 @@ static void __init pnv_pci_init_ioda_phb(struct device_node *np, · 140 unmodified lines
32033175
32043176 /* Setup TCEs */
32053177 phb->dma_dev_setup = pnv_pci_ioda_dma_dev_setup;
3206− phb->dma_get_required_mask = pnv_pci_ioda_dma_get_required_mask;
32073178
32083179 /* Setup MSI support */
32093180 pnv_pci_init_ioda_msis(phb);
arch/powerpc/platforms/powernv/pci.c+0−11
@@ -761,17 +761,6 @@ void pnv_pci_dma_dev_setup(struct pci_dev *pdev) · 760 unmodified lines
761761 phb->dma_dev_setup(phb, pdev);
762762 }
763763
764−u64 pnv_pci_dma_get_required_mask(struct pci_dev *pdev)
765−{
766− struct pci_controller *hose = pci_bus_to_host(pdev->bus);
767− struct pnv_phb *phb = hose->private_data;
768−
769− if (phb && phb->dma_get_required_mask)
770− return phb->dma_get_required_mask(phb, pdev);
771−
772− return __dma_get_required_mask(&pdev->dev);
773−}
774−
775764 void pnv_pci_shutdown(void)
776765 {
777766 struct pci_controller *hose;
arch/powerpc/platforms/powernv/pci.h+3−4
@@ -105,13 +105,12 @@ struct pnv_phb { · 104 unmodified lines
105105 unsigned int hwirq, unsigned int virq,
106106 unsigned int is_64, struct msi_msg *msg);
107107 void (*dma_dev_setup)(struct pnv_phb *phb, struct pci_dev *pdev);
108− u64 (*dma_get_required_mask)(struct pnv_phb *phb,
109− struct pci_dev *pdev);
110108 void (*fixup_phb)(struct pci_controller *hose);
111109 u32 (*bdfn_to_pe)(struct pnv_phb *phb, struct pci_bus *bus, u32 devfn);
112110 int (*init_m64)(struct pnv_phb *phb);
113− void (*reserve_m64_pe)(struct pnv_phb *phb);
114− int (*pick_m64_pe)(struct pnv_phb *phb, struct pci_bus *bus, int all);
111+ void (*reserve_m64_pe)(struct pci_bus *bus,
112+ unsigned long *pe_bitmap, bool all);
113+ int (*pick_m64_pe)(struct pci_bus *bus, bool all);
115114 int (*get_pe_state)(struct pnv_phb *phb, int pe_no);
116115 void (*freeze_pe)(struct pnv_phb *phb, int pe_no);
117116 int (*unfreeze_pe)(struct pnv_phb *phb, int pe_no, int opt);
arch/powerpc/platforms/powernv/powernv.h+0−6
@@ -12,15 +12,9 @@ struct pci_dev; · 11 unmodified lines
1212 #ifdef CONFIG_PCI
1313 extern void pnv_pci_init(void);
1414 extern void pnv_pci_shutdown(void);
15−extern u64 pnv_pci_dma_get_required_mask(struct pci_dev *pdev);
1615 #else
1716 static inline void pnv_pci_init(void) { }
1817 static inline void pnv_pci_shutdown(void) { }
19−
20−static inline u64 pnv_pci_dma_get_required_mask(struct pci_dev *pdev)
21−{
22− return 0;
23−}
2418 #endif
2519
2620 extern u32 pnv_get_supported_cpuidle_states(void);
arch/powerpc/platforms/powernv/rng.c+1−1
@@ -128,7 +128,7 @@ static __init int rng_create(struct device_node *dn) · 127 unmodified lines
128128
129129 pr_info_once("Registering arch random hook.\n");
130130
131− ppc_md.get_random_long = powernv_get_random_long;
131+ ppc_md.get_random_seed = powernv_get_random_long;
132132
133133 return 0;
134134 }
arch/powerpc/platforms/powernv/setup.c+7−9
@@ -165,14 +165,6 @@ static void pnv_progress(char *s, unsigned short hex) · 164 unmodified lines
165165 {
166166 }
167167
168−static u64 pnv_dma_get_required_mask(struct device *dev)
169−{
170− if (dev_is_pci(dev))
171− return pnv_pci_dma_get_required_mask(to_pci_dev(dev));
172−
173− return __dma_get_required_mask(dev);
174−}
175−
176168 static void pnv_shutdown(void)
177169 {
178170 /* Let the PCI code clear up IODA tables */
@@ -243,6 +235,13 @@ static void pnv_kexec_cpu_down(int crash_shutdown, int secondary) · 64 unmodified lines
243235 } else {
244236 /* Primary waits for the secondaries to have reached OPAL */
245237 pnv_kexec_wait_secondaries_down();
238+
239+ /*
240+ * We might be running as little-endian - now that interrupts
241+ * are disabled, reset the HILE bit to big-endian so we don't
242+ * take interrupts in the wrong endian later
243+ */
244+ opal_reinit_cpus(OPAL_REINIT_CPUS_HILE_BE);
246245 }
247246 }
248247 #endif /* CONFIG_KEXEC */
@@ -314,7 +313,6 @@ define_machine(powernv) { · 65 unmodified lines
314313 .machine_shutdown = pnv_shutdown,
315314 .power_save = power7_idle,
316315 .calibrate_decr = generic_calibrate_decr,
317− .dma_get_required_mask = pnv_dma_get_required_mask,
318316 #ifdef CONFIG_KEXEC
319317 .kexec_cpu_down = pnv_kexec_cpu_down,
320318 #endif
arch/powerpc/platforms/powernv/subcore.c+2−2
@@ -190,7 +190,7 @@ static void unsplit_core(void) · 189 unmodified lines
190190
191191 hid0 = mfspr(SPRN_HID0);
192192 hid0 &= ~HID0_POWER8_DYNLPARDIS;
193− mtspr(SPRN_HID0, hid0);
193+ update_power8_hid0(hid0);
194194 update_hid_in_slw(hid0);
195195
196196 while (mfspr(SPRN_HID0) & mask)
@@ -227,7 +227,7 @@ static void split_core(int new_mode) · 30 unmodified lines
227227 /* Write new mode */
228228 hid0 = mfspr(SPRN_HID0);
229229 hid0 |= HID0_POWER8_DYNLPARDIS | split_parms[i].value;
230− mtspr(SPRN_HID0, hid0);
230+ update_power8_hid0(hid0);
231231 update_hid_in_slw(hid0);
232232
233233 /* Wait for it to happen */
arch/powerpc/platforms/pseries/hotplug-memory.c+1−2
@@ -92,13 +92,12 @@ static struct property *dlpar_clone_drconf_property(struct device_node *dn) · 91 unmodified lines
9292 return NULL;
9393
9494 new_prop->name = kstrdup(prop->name, GFP_KERNEL);
95− new_prop->value = kmalloc(prop->length, GFP_KERNEL);
95+ new_prop->value = kmemdup(prop->value, prop->length, GFP_KERNEL);
9696 if (!new_prop->name || !new_prop->value) {
9797 dlpar_free_drconf_property(new_prop);
9898 return NULL;
9999 }
100100
101− memcpy(new_prop->value, prop->value, prop->length);
102101 new_prop->length = prop->length;
103102
104103 /* Convert the property to cpu endian-ness */
arch/powerpc/platforms/pseries/iommu.c+1−2
@@ -1253,11 +1253,10 @@ static int dma_set_mask_pSeriesLP(struct device *dev, u64 dma_mask) · 1252 unmodified lines
12531253 }
12541254 }
12551255
1256− /* fall back on iommu ops, restore table pointer with ops */
1256+ /* fall back on iommu ops */
12571257 if (!ddw_enabled && get_dma_ops(dev) != &dma_iommu_ops) {
12581258 dev_info(dev, "Restoring 32-bit DMA via iommu\n");
12591259 set_dma_ops(dev, &dma_iommu_ops);
1260− pci_dma_dev_setup_pSeriesLP(pdev);
12611260 }
12621261
12631262 check_mask:
arch/powerpc/platforms/pseries/ras.c+2−1
@@ -189,7 +189,8 @@ static irqreturn_t ras_epow_interrupt(int irq, void *dev_id) · 188 unmodified lines
189189 int state;
190190 int critical;
191191
192− status = rtas_get_sensor(EPOW_SENSOR_TOKEN, EPOW_SENSOR_INDEX, &state);
192+ status = rtas_get_sensor_fast(EPOW_SENSOR_TOKEN, EPOW_SENSOR_INDEX,
193+ &state);
193194
194195 if (state > 3)
195196 critical = 1; /* Time Critical */
arch/powerpc/platforms/pseries/rng.c+1−1
@@ -38,7 +38,7 @@ static __init int rng_init(void) · 37 unmodified lines
3838
3939 pr_info("Registering arch random hook.\n");
4040
41− ppc_md.get_random_long = pseries_get_random_long;
41+ ppc_md.get_random_seed = pseries_get_random_long;
4242
4343 return 0;
4444 }
arch/powerpc/platforms/pseries/setup.c+15−8
@@ -254,19 +254,26 @@ static void __init pseries_discover_pic(void) · 253 unmodified lines
254254 static int pci_dn_reconfig_notifier(struct notifier_block *nb, unsigned long action, void *data)
255255 {
256256 struct of_reconfig_data *rd = data;
257− struct device_node *np = rd->dn;
258− struct pci_dn *pci = NULL;
257+ struct device_node *parent, *np = rd->dn;
258+ struct pci_dn *pdn;
259259 int err = NOTIFY_OK;
260260
261261 switch (action) {
262262 case OF_RECONFIG_ATTACH_NODE:
263− pci = np->parent->data;
264− if (pci) {
265− update_dn_pci_info(np, pci->phb);
266−
267− /* Create EEH device for the OF node */
268− eeh_dev_init(PCI_DN(np), pci->phb);
263+ parent = of_get_parent(np);
264+ pdn = parent ? PCI_DN(parent) : NULL;
265+ if (pdn) {
266+ /* Create pdn and EEH device */
267+ update_dn_pci_info(np, pdn->phb);
268+ eeh_dev_init(PCI_DN(np), pdn->phb);
269269 }
270+
271+ of_node_put(parent);
272+ break;
273+ case OF_RECONFIG_DETACH_NODE:
274+ pdn = PCI_DN(np);
275+ if (pdn)
276+ list_del(&pdn->list);
270277 break;
271278 default:
272279 err = NOTIFY_DONE;
arch/powerpc/sysdev/cpm_common.c+1−1
@@ -147,7 +147,7 @@ unsigned long cpm_muram_alloc(unsigned long size, unsigned long align) · 146 unmodified lines
147147 spin_lock_irqsave(&cpm_muram_lock, flags);
148148 cpm_muram_info.alignment = align;
149149 start = rh_alloc(&cpm_muram_info, size, "commproc");
150− memset(cpm_muram_addr(start), 0, size);
150+ memset_io(cpm_muram_addr(start), 0, size);
151151 spin_unlock_irqrestore(&cpm_muram_lock, flags);
152152
153153 return start;
arch/powerpc/sysdev/dart_iommu.c+3−13
@@ -313,20 +313,11 @@ static void iommu_table_dart_setup(void) · 312 unmodified lines
313313 set_bit(iommu_table_dart.it_size - 1, iommu_table_dart.it_map);
314314 }
315315
316−static void dma_dev_setup_dart(struct device *dev)
317−{
318− /* We only have one iommu table on the mac for now, which makes
319− * things simple. Setup all PCI devices to point to this table
320− */
321− if (get_dma_ops(dev) == &dma_direct_ops)
322− set_dma_offset(dev, DART_U4_BYPASS_BASE);
323− else
324− set_iommu_table_base(dev, &iommu_table_dart);
325−}
326−
327316 static void pci_dma_dev_setup_dart(struct pci_dev *dev)
328317 {
329− dma_dev_setup_dart(&dev->dev);
318+ if (dart_is_u4)
319+ set_dma_offset(&dev->dev, DART_U4_BYPASS_BASE);
320+ set_iommu_table_base(&dev->dev, &iommu_table_dart);
330321 }
331322
332323 static void pci_dma_bus_setup_dart(struct pci_bus *bus)
@@ -370,7 +361,6 @@ static int dart_dma_set_mask(struct device *dev, u64 dma_mask) · 37 unmodified lines
370361 dev_info(dev, "Using 32-bit DMA via iommu\n");
371362 set_dma_ops(dev, &dma_iommu_ops);
372363 }
373− dma_dev_setup_dart(dev);
374364
375365 *dev->dma_mask = dma_mask;
376366 return 0;
arch/powerpc/sysdev/ppc4xx_hsta_msi.c+2−2
@@ -132,7 +132,7 @@ static int hsta_msi_probe(struct platform_device *pdev) · 131 unmodified lines
132132 struct pci_controller *phb;
133133
134134 mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
135− if (IS_ERR(mem)) {
135+ if (!mem) {
136136 dev_err(dev, "Unable to get mmio space\n");
137137 return -EINVAL;
138138 }
@@ -157,7 +157,7 @@ static int hsta_msi_probe(struct platform_device *pdev) · 18 unmodified lines
157157 goto out;
158158
159159 ppc4xx_hsta_msi.irq_map = kmalloc(sizeof(int) * irq_count, GFP_KERNEL);
160− if (IS_ERR(ppc4xx_hsta_msi.irq_map)) {
160+ if (!ppc4xx_hsta_msi.irq_map) {
161161 ret = -ENOMEM;
162162 goto out1;
163163 }
arch/powerpc/xmon/xmon.c+3−5
@@ -1987,7 +1987,6 @@ memex(void) · 1986 unmodified lines
19871987 case '^':
19881988 adrs -= size;
19891989 break;
1990− break;
19911990 case '/':
19921991 if (nslash > 0)
19931992 adrs -= 1 << nslash;
@@ -2731,7 +2730,7 @@ static void xmon_print_symbol(unsigned long address, const char *mid, · 737 unmodified lines
27312730 void dump_segments(void)
27322731 {
27332732 int i;
2734− unsigned long esid,vsid,valid;
2733+ unsigned long esid,vsid;
27352734 unsigned long llp;
27362735
27372736 printf("SLB contents of cpu 0x%x\n", smp_processor_id());
@@ -2739,10 +2738,9 @@ void dump_segments(void) · 1 unmodified line
27392738 for (i = 0; i < mmu_slb_size; i++) {
27402739 asm volatile("slbmfee %0,%1" : "=r" (esid) : "r" (i));
27412740 asm volatile("slbmfev %0,%1" : "=r" (vsid) : "r" (i));
2742− valid = (esid & SLB_ESID_V);
2743− if (valid | esid | vsid) {
2741+ if (esid || vsid) {
27442742 printf("%02d %016lx %016lx", i, esid, vsid);
2745− if (valid) {
2743+ if (esid & SLB_ESID_V) {
27462744 llp = vsid & SLB_VSID_LLP;
27472745 if (vsid & SLB_VSID_B_1T) {
27482746 printf(" 1T ESID=%9lx VSID=%13lx LLP:%3lx \n",
drivers/leds/Kconfig+11−0
@@ -565,6 +565,17 @@ config LEDS_BLINKM · 564 unmodified lines
565565 This option enables support for the BlinkM RGB LED connected
566566 through I2C. Say Y to enable support for the BlinkM LED.
567567
568+config LEDS_POWERNV
569+ tristate "LED support for PowerNV Platform"
570+ depends on LEDS_CLASS
571+ depends on PPC_POWERNV
572+ depends on OF
573+ help
574+ This option enables support for the system LEDs present on
575+ PowerNV platforms. Say 'y' to enable this support in kernel.
576+ To compile this driver as a module, choose 'm' here: the module
577+ will be called leds-powernv.
578+
568579 config LEDS_SYSCON
569580 bool "LED support for LEDs on system controllers"
570581 depends on LEDS_CLASS=y
drivers/leds/Makefile+1−0
@@ -65,6 +65,7 @@ obj-$(CONFIG_LEDS_VERSATILE) += leds-versatile.o · 64 unmodified lines
6565 obj-$(CONFIG_LEDS_MENF21BMC) += leds-menf21bmc.o
6666 obj-$(CONFIG_LEDS_PM8941_WLED) += leds-pm8941-wled.o
6767 obj-$(CONFIG_LEDS_KTD2692) += leds-ktd2692.o
68+obj-$(CONFIG_LEDS_POWERNV) += leds-powernv.o
6869
6970 # LED SPI Drivers
7071 obj-$(CONFIG_LEDS_DAC124S085) += leds-dac124s085.o
drivers/leds/leds-powernv.c+345−0
@@ -0,0 +1,345 @@
1+/*
2+ * PowerNV LED Driver
3+ *
4+ * Copyright IBM Corp. 2015
5+ *
6+ * Author: Vasant Hegde <hegdevasant@linux.vnet.ibm.com>
7+ * Author: Anshuman Khandual <khandual@linux.vnet.ibm.com>
8+ *
9+ * This program is free software; you can redistribute it and/or
10+ * modify it under the terms of the GNU General Public License
11+ * as published by the Free Software Foundation; either version
12+ * 2 of the License, or (at your option) any later version.
13+ */
14+
15+#include <linux/leds.h>
16+#include <linux/module.h>
17+#include <linux/of.h>
18+#include <linux/platform_device.h>
19+#include <linux/slab.h>
20+#include <linux/types.h>
21+
22+#include <asm/opal.h>
23+
24+/* Map LED type to description. */
25+struct led_type_map {
26+ const int type;
27+ const char *desc;
28+};
29+static const struct led_type_map led_type_map[] = {
30+ {OPAL_SLOT_LED_TYPE_ID, "identify"},
31+ {OPAL_SLOT_LED_TYPE_FAULT, "fault"},
32+ {OPAL_SLOT_LED_TYPE_ATTN, "attention"},
33+ {-1, NULL},
34+};
35+
36+struct powernv_led_common {
37+ /*
38+ * By default unload path resets all the LEDs. But on PowerNV
39+ * platform we want to retain LED state across reboot as these
40+ * are controlled by firmware. Also service processor can modify
41+ * the LEDs independent of OS. Hence avoid resetting LEDs in
42+ * unload path.
43+ */
44+ bool led_disabled;
45+
46+ /* Max supported LED type */
47+ __be64 max_led_type;
48+
49+ /* glabal lock */
50+ struct mutex lock;
51+};
52+
53+/* PowerNV LED data */
54+struct powernv_led_data {
55+ struct led_classdev cdev;
56+ char *loc_code; /* LED location code */
57+ int led_type; /* OPAL_SLOT_LED_TYPE_* */
58+
59+ struct powernv_led_common *common;
60+};
61+
62+
63+/* Returns OPAL_SLOT_LED_TYPE_* for given led type string */
64+static int powernv_get_led_type(const char *led_type_desc)
65+{
66+ int i;
67+
68+ for (i = 0; i < ARRAY_SIZE(led_type_map); i++)
69+ if (!strcmp(led_type_map[i].desc, led_type_desc))
70+ return led_type_map[i].type;
71+
72+ return -1;
73+}
74+
75+/*
76+ * This commits the state change of the requested LED through an OPAL call.
77+ * This function is called from work queue task context when ever it gets
78+ * scheduled. This function can sleep at opal_async_wait_response call.
79+ */
80+static void powernv_led_set(struct powernv_led_data *powernv_led,
81+ enum led_brightness value)
82+{
83+ int rc, token;
84+ u64 led_mask, led_value = 0;
85+ __be64 max_type;
86+ struct opal_msg msg;
87+ struct device *dev = powernv_led->cdev.dev;
88+ struct powernv_led_common *powernv_led_common = powernv_led->common;
89+
90+ /* Prepare for the OPAL call */
91+ max_type = powernv_led_common->max_led_type;
92+ led_mask = OPAL_SLOT_LED_STATE_ON << powernv_led->led_type;
93+ if (value)
94+ led_value = led_mask;
95+
96+ /* OPAL async call */
97+ token = opal_async_get_token_interruptible();
98+ if (token < 0) {
99+ if (token != -ERESTARTSYS)
100+ dev_err(dev, "%s: Couldn't get OPAL async token\n",
101+ __func__);
102+ return;
103+ }
104+
105+ rc = opal_leds_set_ind(token, powernv_led->loc_code,
106+ led_mask, led_value, &max_type);
107+ if (rc != OPAL_ASYNC_COMPLETION) {
108+ dev_err(dev, "%s: OPAL set LED call failed for %s [rc=%d]\n",
109+ __func__, powernv_led->loc_code, rc);
110+ goto out_token;
111+ }
112+
113+ rc = opal_async_wait_response(token, &msg);
114+ if (rc) {
115+ dev_err(dev,
116+ "%s: Failed to wait for the async response [rc=%d]\n",
117+ __func__, rc);
118+ goto out_token;
119+ }
120+
121+ rc = be64_to_cpu(msg.params[1]);
122+ if (rc != OPAL_SUCCESS)
123+ dev_err(dev, "%s : OAPL async call returned failed [rc=%d]\n",
124+ __func__, rc);
125+
126+out_token:
127+ opal_async_release_token(token);
128+}
129+
130+/*
131+ * This function fetches the LED state for a given LED type for
132+ * mentioned LED classdev structure.
133+ */
134+static enum led_brightness powernv_led_get(struct powernv_led_data *powernv_led)
135+{
136+ int rc;
137+ __be64 mask, value, max_type;
138+ u64 led_mask, led_value;
139+ struct device *dev = powernv_led->cdev.dev;
140+ struct powernv_led_common *powernv_led_common = powernv_led->common;
141+
142+ /* Fetch all LED status */
143+ mask = cpu_to_be64(0);
144+ value = cpu_to_be64(0);
145+ max_type = powernv_led_common->max_led_type;
146+
147+ rc = opal_leds_get_ind(powernv_led->loc_code,
148+ &mask, &value, &max_type);
149+ if (rc != OPAL_SUCCESS && rc != OPAL_PARTIAL) {
150+ dev_err(dev, "%s: OPAL get led call failed [rc=%d]\n",
151+ __func__, rc);
152+ return LED_OFF;
153+ }
154+
155+ led_mask = be64_to_cpu(mask);
156+ led_value = be64_to_cpu(value);
157+
158+ /* LED status available */
159+ if (!((led_mask >> powernv_led->led_type) & OPAL_SLOT_LED_STATE_ON)) {
160+ dev_err(dev, "%s: LED status not available for %s\n",
161+ __func__, powernv_led->cdev.name);
162+ return LED_OFF;
163+ }
164+
165+ /* LED status value */
166+ if ((led_value >> powernv_led->led_type) & OPAL_SLOT_LED_STATE_ON)
167+ return LED_FULL;
168+
169+ return LED_OFF;
170+}
171+
172+/*
173+ * LED classdev 'brightness_get' function. This schedules work
174+ * to update LED state.
175+ */
176+static void powernv_brightness_set(struct led_classdev *led_cdev,
177+ enum led_brightness value)
178+{
179+ struct powernv_led_data *powernv_led =
180+ container_of(led_cdev, struct powernv_led_data, cdev);
181+ struct powernv_led_common *powernv_led_common = powernv_led->common;
182+
183+ /* Do not modify LED in unload path */
184+ if (powernv_led_common->led_disabled)
185+ return;
186+
187+ mutex_lock(&powernv_led_common->lock);
188+ powernv_led_set(powernv_led, value);
189+ mutex_unlock(&powernv_led_common->lock);
190+}
191+
192+/* LED classdev 'brightness_get' function */
193+static enum led_brightness powernv_brightness_get(struct led_classdev *led_cdev)
194+{
195+ struct powernv_led_data *powernv_led =
196+ container_of(led_cdev, struct powernv_led_data, cdev);
197+
198+ return powernv_led_get(powernv_led);
199+}
200+
201+/*
202+ * This function registers classdev structure for any given type of LED on
203+ * a given child LED device node.
204+ */
205+static int powernv_led_create(struct device *dev,
206+ struct powernv_led_data *powernv_led,
207+ const char *led_type_desc)
208+{
209+ int rc;
210+
211+ /* Make sure LED type is supported */
212+ powernv_led->led_type = powernv_get_led_type(led_type_desc);
213+ if (powernv_led->led_type == -1) {
214+ dev_warn(dev, "%s: No support for led type : %s\n",
215+ __func__, led_type_desc);
216+ return -EINVAL;
217+ }
218+
219+ /* Create the name for classdev */
220+ powernv_led->cdev.name = devm_kasprintf(dev, GFP_KERNEL, "%s:%s",
221+ powernv_led->loc_code,
222+ led_type_desc);
223+ if (!powernv_led->cdev.name) {
224+ dev_err(dev,
225+ "%s: Memory allocation failed for classdev name\n",
226+ __func__);
227+ return -ENOMEM;
228+ }
229+
230+ powernv_led->cdev.brightness_set = powernv_brightness_set;
231+ powernv_led->cdev.brightness_get = powernv_brightness_get;
232+ powernv_led->cdev.brightness = LED_OFF;
233+ powernv_led->cdev.max_brightness = LED_FULL;
234+
235+ /* Register the classdev */
236+ rc = devm_led_classdev_register(dev, &powernv_led->cdev);
237+ if (rc) {
238+ dev_err(dev, "%s: Classdev registration failed for %s\n",
239+ __func__, powernv_led->cdev.name);
240+ }
241+
242+ return rc;
243+}
244+
245+/* Go through LED device tree node and register LED classdev structure */
246+static int powernv_led_classdev(struct platform_device *pdev,
247+ struct device_node *led_node,
248+ struct powernv_led_common *powernv_led_common)
249+{
250+ const char *cur = NULL;
251+ int rc = -1;
252+ struct property *p;
253+ struct device_node *np;
254+ struct powernv_led_data *powernv_led;
255+ struct device *dev = &pdev->dev;
256+
257+ for_each_child_of_node(led_node, np) {
258+ p = of_find_property(np, "led-types", NULL);
259+ if (!p)
260+ continue;
261+
262+ while ((cur = of_prop_next_string(p, cur)) != NULL) {
263+ powernv_led = devm_kzalloc(dev, sizeof(*powernv_led),
264+ GFP_KERNEL);
265+ if (!powernv_led)
266+ return -ENOMEM;
267+
268+ powernv_led->common = powernv_led_common;
269+ powernv_led->loc_code = (char *)np->name;
270+
271+ rc = powernv_led_create(dev, powernv_led, cur);
272+ if (rc)
273+ return rc;
274+ } /* while end */
275+ }
276+
277+ return rc;
278+}
279+
280+/* Platform driver probe */
281+static int powernv_led_probe(struct platform_device *pdev)
282+{
283+ struct device_node *led_node;
284+ struct powernv_led_common *powernv_led_common;
285+ struct device *dev = &pdev->dev;
286+
287+ led_node = of_find_node_by_path("/ibm,opal/leds");
288+ if (!led_node) {
289+ dev_err(dev, "%s: LED parent device node not found\n",
290+ __func__);
291+ return -EINVAL;
292+ }
293+
294+ powernv_led_common = devm_kzalloc(dev, sizeof(*powernv_led_common),
295+ GFP_KERNEL);
296+ if (!powernv_led_common)
297+ return -ENOMEM;
298+
299+ mutex_init(&powernv_led_common->lock);
300+ powernv_led_common->max_led_type = cpu_to_be64(OPAL_SLOT_LED_TYPE_MAX);
301+
302+ platform_set_drvdata(pdev, powernv_led_common);
303+
304+ return powernv_led_classdev(pdev, led_node, powernv_led_common);
305+}
306+
307+/* Platform driver remove */
308+static int powernv_led_remove(struct platform_device *pdev)
309+{
310+ struct powernv_led_common *powernv_led_common;
311+
312+ /* Disable LED operation */
313+ powernv_led_common = platform_get_drvdata(pdev);
314+ powernv_led_common->led_disabled = true;
315+
316+ /* Destroy lock */
317+ mutex_destroy(&powernv_led_common->lock);
318+
319+ dev_info(&pdev->dev, "PowerNV led module unregistered\n");
320+ return 0;
321+}
322+
323+/* Platform driver property match */
324+static const struct of_device_id powernv_led_match[] = {
325+ {
326+ .compatible = "ibm,opal-v3-led",
327+ },
328+ {},
329+};
330+MODULE_DEVICE_TABLE(of, powernv_led_match);
331+
332+static struct platform_driver powernv_led_driver = {
333+ .probe = powernv_led_probe,
334+ .remove = powernv_led_remove,
335+ .driver = {
336+ .name = "powernv-led-driver",
337+ .of_match_table = powernv_led_match,
338+ },
339+};
340+
341+module_platform_driver(powernv_led_driver);
342+
343+MODULE_LICENSE("GPL v2");
344+MODULE_DESCRIPTION("PowerNV LED driver");
345+MODULE_AUTHOR("Vasant Hegde <hegdevasant@linux.vnet.ibm.com>");
drivers/macintosh/therm_windtunnel.c+2−0
@@ -408,6 +408,7 @@ static const struct i2c_device_id therm_windtunnel_id[] = { · 407 unmodified lines
408408 { "therm_adm1030", adm1030 },
409409 { }
410410 };
411+MODULE_DEVICE_TABLE(i2c, therm_windtunnel_id);
411412
412413 static int
413414 do_probe(struct i2c_client *cl, const struct i2c_device_id *id)
@@ -459,6 +460,7 @@ static const struct of_device_id therm_of_match[] = {{ · 45 unmodified lines
459460 .compatible = "adm1030"
460461 }, {}
461462 };
463+MODULE_DEVICE_TABLE(of, therm_of_match);
462464
463465 static struct platform_driver therm_of_driver = {
464466 .driver = {
drivers/macintosh/windfarm.h+0−4
@@ -53,11 +53,9 @@ struct wf_control { · 52 unmodified lines
5353 * the kref and wf_unregister_control will decrement it, thus the
5454 * object creating/disposing a given control shouldn't assume it
5555 * still exists after wf_unregister_control has been called.
56− * wf_find_control will inc the refcount for you
5756 */
5857 extern int wf_register_control(struct wf_control *ct);
5958 extern void wf_unregister_control(struct wf_control *ct);
60−extern struct wf_control * wf_find_control(const char *name);
6159 extern int wf_get_control(struct wf_control *ct);
6260 extern void wf_put_control(struct wf_control *ct);
6361
@@ -117,7 +115,6 @@ struct wf_sensor { · 53 unmodified lines
117115 /* Same lifetime rules as controls */
118116 extern int wf_register_sensor(struct wf_sensor *sr);
119117 extern void wf_unregister_sensor(struct wf_sensor *sr);
120−extern struct wf_sensor * wf_find_sensor(const char *name);
121118 extern int wf_get_sensor(struct wf_sensor *sr);
122119 extern void wf_put_sensor(struct wf_sensor *sr);
123120
@@ -144,7 +141,6 @@ extern int wf_unregister_client(struct notifier_block *nb); · 20 unmodified lines
144141 /* Overtemp conditions. Those are refcounted */
145142 extern void wf_set_overtemp(void);
146143 extern void wf_clear_overtemp(void);
147−extern int wf_is_overtemp(void);
148144
149145 #define WF_EVENT_NEW_CONTROL 0 /* param is wf_control * */
150146 #define WF_EVENT_NEW_SENSOR 1 /* param is wf_sensor * */
drivers/macintosh/windfarm_core.c+2−45
@@ -72,7 +72,7 @@ static inline void wf_notify(int event, void *param) · 71 unmodified lines
7272 blocking_notifier_call_chain(&wf_client_list, event, param);
7373 }
7474
75−int wf_critical_overtemp(void)
75+static int wf_critical_overtemp(void)
7676 {
7777 static char * critical_overtemp_path = "/sbin/critical_overtemp";
7878 char *argv[] = { critical_overtemp_path, NULL };
@@ -84,7 +84,6 @@ int wf_critical_overtemp(void) · 5 unmodified lines
8484 return call_usermodehelper(critical_overtemp_path,
8585 argv, envp, UMH_WAIT_EXEC);
8686 }
87−EXPORT_SYMBOL_GPL(wf_critical_overtemp);
8887
8988 static int wf_thread_func(void *data)
9089 {
@@ -255,24 +254,6 @@ void wf_unregister_control(struct wf_control *ct) · 164 unmodified lines
255254 }
256255 EXPORT_SYMBOL_GPL(wf_unregister_control);
257256
258−struct wf_control * wf_find_control(const char *name)
259−{
260− struct wf_control *ct;
261−
262− mutex_lock(&wf_lock);
263− list_for_each_entry(ct, &wf_controls, link) {
264− if (!strcmp(ct->name, name)) {
265− if (wf_get_control(ct))
266− ct = NULL;
267− mutex_unlock(&wf_lock);
268− return ct;
269− }
270− }
271− mutex_unlock(&wf_lock);
272− return NULL;
273−}
274−EXPORT_SYMBOL_GPL(wf_find_control);
275−
276257 int wf_get_control(struct wf_control *ct)
277258 {
278259 if (!try_module_get(ct->ops->owner))
@@ -368,24 +349,6 @@ void wf_unregister_sensor(struct wf_sensor *sr) · 89 unmodified lines
368349 }
369350 EXPORT_SYMBOL_GPL(wf_unregister_sensor);
370351
371−struct wf_sensor * wf_find_sensor(const char *name)
372−{
373− struct wf_sensor *sr;
374−
375− mutex_lock(&wf_lock);
376− list_for_each_entry(sr, &wf_sensors, link) {
377− if (!strcmp(sr->name, name)) {
378− if (wf_get_sensor(sr))
379− sr = NULL;
380− mutex_unlock(&wf_lock);
381− return sr;
382− }
383− }
384− mutex_unlock(&wf_lock);
385− return NULL;
386−}
387−EXPORT_SYMBOL_GPL(wf_find_sensor);
388−
389352 int wf_get_sensor(struct wf_sensor *sr)
390353 {
391354 if (!try_module_get(sr->ops->owner))
@@ -435,7 +398,7 @@ int wf_unregister_client(struct notifier_block *nb) · 43 unmodified lines
435398 {
436399 mutex_lock(&wf_lock);
437400 blocking_notifier_chain_unregister(&wf_client_list, nb);
438− wf_client_count++;
401+ wf_client_count--;
439402 if (wf_client_count == 0)
440403 wf_stop_thread();
441404 mutex_unlock(&wf_lock);
@@ -474,12 +437,6 @@ void wf_clear_overtemp(void) · 32 unmodified lines
474437 }
475438 EXPORT_SYMBOL_GPL(wf_clear_overtemp);
476439
477−int wf_is_overtemp(void)
478−{
479− return (wf_overtemp != 0);
480−}
481−EXPORT_SYMBOL_GPL(wf_is_overtemp);
482−
483440 static int __init windfarm_core_init(void)
484441 {
485442 DBG("wf: core loaded\n");
drivers/memory/fsl_ifc.c+30−13
@@ -62,7 +62,7 @@ int fsl_ifc_find(phys_addr_t addr_base) · 61 unmodified lines
6262 return -ENODEV;
6363
6464 for (i = 0; i < fsl_ifc_ctrl_dev->banks; i++) {
65− u32 cspr = in_be32(&fsl_ifc_ctrl_dev->regs->cspr_cs[i].cspr);
65+ u32 cspr = ifc_in32(&fsl_ifc_ctrl_dev->regs->cspr_cs[i].cspr);
6666 if (cspr & CSPR_V && (cspr & CSPR_BA) ==
6767 convert_ifc_address(addr_base))
6868 return i;
@@ -79,16 +79,16 @@ static int fsl_ifc_ctrl_init(struct fsl_ifc_ctrl *ctrl) · 10 unmodified lines
7979 /*
8080 * Clear all the common status and event registers
8181 */
82− if (in_be32(&ifc->cm_evter_stat) & IFC_CM_EVTER_STAT_CSER)
83− out_be32(&ifc->cm_evter_stat, IFC_CM_EVTER_STAT_CSER);
82+ if (ifc_in32(&ifc->cm_evter_stat) & IFC_CM_EVTER_STAT_CSER)
83+ ifc_out32(IFC_CM_EVTER_STAT_CSER, &ifc->cm_evter_stat);
8484
8585 /* enable all error and events */
86− out_be32(&ifc->cm_evter_en, IFC_CM_EVTER_EN_CSEREN);
86+ ifc_out32(IFC_CM_EVTER_EN_CSEREN, &ifc->cm_evter_en);
8787
8888 /* enable all error and event interrupts */
89− out_be32(&ifc->cm_evter_intr_en, IFC_CM_EVTER_INTR_EN_CSERIREN);
90− out_be32(&ifc->cm_erattr0, 0x0);
91− out_be32(&ifc->cm_erattr1, 0x0);
89+ ifc_out32(IFC_CM_EVTER_INTR_EN_CSERIREN, &ifc->cm_evter_intr_en);
90+ ifc_out32(0x0, &ifc->cm_erattr0);
91+ ifc_out32(0x0, &ifc->cm_erattr1);
9292
9393 return 0;
9494 }
@@ -127,9 +127,9 @@ static u32 check_nand_stat(struct fsl_ifc_ctrl *ctrl) · 32 unmodified lines
127127
128128 spin_lock_irqsave(&nand_irq_lock, flags);
129129
130− stat = in_be32(&ifc->ifc_nand.nand_evter_stat);
130+ stat = ifc_in32(&ifc->ifc_nand.nand_evter_stat);
131131 if (stat) {
132− out_be32(&ifc->ifc_nand.nand_evter_stat, stat);
132+ ifc_out32(stat, &ifc->ifc_nand.nand_evter_stat);
133133 ctrl->nand_stat = stat;
134134 wake_up(&ctrl->nand_wait);
135135 }
@@ -161,16 +161,16 @@ static irqreturn_t fsl_ifc_ctrl_irq(int irqno, void *data) · 25 unmodified lines
161161 irqreturn_t ret = IRQ_NONE;
162162
163163 /* read for chip select error */
164− cs_err = in_be32(&ifc->cm_evter_stat);
164+ cs_err = ifc_in32(&ifc->cm_evter_stat);
165165 if (cs_err) {
166166 dev_err(ctrl->dev, "transaction sent to IFC is not mapped to"
167167 "any memory bank 0x%08X\n", cs_err);
168168 /* clear the chip select error */
169− out_be32(&ifc->cm_evter_stat, IFC_CM_EVTER_STAT_CSER);
169+ ifc_out32(IFC_CM_EVTER_STAT_CSER, &ifc->cm_evter_stat);
170170
171171 /* read error attribute registers print the error information */
172− status = in_be32(&ifc->cm_erattr0);
173− err_addr = in_be32(&ifc->cm_erattr1);
172+ status = ifc_in32(&ifc->cm_erattr0);
173+ err_addr = ifc_in32(&ifc->cm_erattr1);
174174
175175 if (status & IFC_CM_ERATTR0_ERTYP_READ)
176176 dev_err(ctrl->dev, "Read transaction error"
@@ -231,6 +231,23 @@ static int fsl_ifc_ctrl_probe(struct platform_device *dev) · 54 unmodified lines
231231 goto err;
232232 }
233233
234+ version = ifc_in32(&fsl_ifc_ctrl_dev->regs->ifc_rev) &
235+ FSL_IFC_VERSION_MASK;
236+ banks = (version == FSL_IFC_VERSION_1_0_0) ? 4 : 8;
237+ dev_info(&dev->dev, "IFC version %d.%d, %d banks\n",
238+ version >> 24, (version >> 16) & 0xf, banks);
239+
240+ fsl_ifc_ctrl_dev->version = version;
241+ fsl_ifc_ctrl_dev->banks = banks;
242+
243+ if (of_property_read_bool(dev->dev.of_node, "little-endian")) {
244+ fsl_ifc_ctrl_dev->little_endian = true;
245+ dev_dbg(&dev->dev, "IFC REGISTERS are LITTLE endian\n");
246+ } else {
247+ fsl_ifc_ctrl_dev->little_endian = false;
248+ dev_dbg(&dev->dev, "IFC REGISTERS are BIG endian\n");
249+ }
250+
234251 version = ioread32be(&fsl_ifc_ctrl_dev->regs->ifc_rev) &
235252 FSL_IFC_VERSION_MASK;
236253 banks = (version == FSL_IFC_VERSION_1_0_0) ? 4 : 8;
drivers/misc/cxl/Kconfig+6−1
@@ -11,11 +11,16 @@ config CXL_KERNEL_API · 10 unmodified lines
1111 bool
1212 default n
1313
14+config CXL_EEH
15+ bool
16+ default n
17+
1418 config CXL
1519 tristate "Support for IBM Coherent Accelerators (CXL)"
16− depends on PPC_POWERNV && PCI_MSI
20+ depends on PPC_POWERNV && PCI_MSI && EEH
1721 select CXL_BASE
1822 select CXL_KERNEL_API
23+ select CXL_EEH
1924 default m
2025 help
2126 Select this option to enable driver support for IBM Coherent
drivers/misc/cxl/Makefile+2−0
@@ -1,3 +1,5 @@
1+ccflags-y := -Werror
2+
13 cxl-y += main.o file.o irq.o fault.o native.o
24 cxl-y += context.o sysfs.o debugfs.o pci.o trace.o
35 cxl-y += vphb.o api.o
drivers/misc/cxl/api.c+49−10
@@ -12,11 +12,13 @@ · 11 unmodified lines
1212 #include <linux/anon_inodes.h>
1313 #include <linux/file.h>
1414 #include <misc/cxl.h>
15+#include <linux/fs.h>
1516
1617 #include "cxl.h"
1718
1819 struct cxl_context *cxl_dev_context_init(struct pci_dev *dev)
1920 {
21+ struct address_space *mapping;
2022 struct cxl_afu *afu;
2123 struct cxl_context *ctx;
2224 int rc;
@@ -25,19 +27,42 @@ struct cxl_context *cxl_dev_context_init(struct pci_dev *dev) · 2 unmodified lines
2527
2628 get_device(&afu->dev);
2729 ctx = cxl_context_alloc();
28− if (IS_ERR(ctx))
29− return ctx;
30+ if (IS_ERR(ctx)) {
31+ rc = PTR_ERR(ctx);
32+ goto err_dev;
33+ }
3034
31− /* Make it a slave context. We can promote it later? */
32− rc = cxl_context_init(ctx, afu, false, NULL);
33− if (rc) {
34− kfree(ctx);
35− put_device(&afu->dev);
36− return ERR_PTR(-ENOMEM);
35+ ctx->kernelapi = true;
36+
37+ /*
38+ * Make our own address space since we won't have one from the
39+ * filesystem like the user api has, and even if we do associate a file
40+ * with this context we don't want to use the global anonymous inode's
41+ * address space as that can invalidate unrelated users:
42+ */
43+ mapping = kmalloc(sizeof(struct address_space), GFP_KERNEL);
44+ if (!mapping) {
45+ rc = -ENOMEM;
46+ goto err_ctx;
3747 }
48+ address_space_init_once(mapping);
49+
50+ /* Make it a slave context. We can promote it later? */
51+ rc = cxl_context_init(ctx, afu, false, mapping);
52+ if (rc)
53+ goto err_mapping;
54+
3855 cxl_assign_psn_space(ctx);
3956
4057 return ctx;
58+
59+err_mapping:
60+ kfree(mapping);
61+err_ctx:
62+ kfree(ctx);
63+err_dev:
64+ put_device(&afu->dev);
65+ return ERR_PTR(rc);
4166 }
4267 EXPORT_SYMBOL_GPL(cxl_dev_context_init);
4368
@@ -59,7 +84,7 @@ EXPORT_SYMBOL_GPL(cxl_get_phys_dev); · 15 unmodified lines
5984
6085 int cxl_release_context(struct cxl_context *ctx)
6186 {
62− if (ctx->status != CLOSED)
87+ if (ctx->status >= STARTED)
6388 return -EBUSY;
6489
6590 put_device(&ctx->afu->dev);
@@ -255,9 +280,16 @@ struct file *cxl_get_fd(struct cxl_context *ctx, struct file_operations *fops, · 189 unmodified lines
255280
256281 file = anon_inode_getfile("cxl", fops, ctx, flags);
257282 if (IS_ERR(file))
258− put_unused_fd(fdtmp);
283+ goto err_fd;
284+
285+ file->f_mapping = ctx->mapping;
286+
259287 *fd = fdtmp;
260288 return file;
289+
290+err_fd:
291+ put_unused_fd(fdtmp);
292+ return NULL;
261293 }
262294 EXPORT_SYMBOL_GPL(cxl_get_fd);
263295
@@ -327,3 +359,10 @@ int cxl_afu_reset(struct cxl_context *ctx) · 63 unmodified lines
327359 return cxl_afu_check_and_enable(afu);
328360 }
329361 EXPORT_SYMBOL_GPL(cxl_afu_reset);
362+
363+void cxl_perst_reloads_same_image(struct cxl_afu *afu,
364+ bool perst_reloads_same_image)
365+{
366+ afu->adapter->perst_same_image = perst_reloads_same_image;
367+}
368+EXPORT_SYMBOL_GPL(cxl_perst_reloads_same_image);
drivers/misc/cxl/context.c+21−1
@@ -126,6 +126,18 @@ static int cxl_mmap_fault(struct vm_area_struct *vma, struct vm_fault *vmf) · 125 unmodified lines
126126 if (ctx->status != STARTED) {
127127 mutex_unlock(&ctx->status_mutex);
128128 pr_devel("%s: Context not started, failing problem state access\n", __func__);
129+ if (ctx->mmio_err_ff) {
130+ if (!ctx->ff_page) {
131+ ctx->ff_page = alloc_page(GFP_USER);
132+ if (!ctx->ff_page)
133+ return VM_FAULT_OOM;
134+ memset(page_address(ctx->ff_page), 0xff, PAGE_SIZE);
135+ }
136+ get_page(ctx->ff_page);
137+ vmf->page = ctx->ff_page;
138+ vma->vm_page_prot = pgprot_cached(vma->vm_page_prot);
139+ return 0;
140+ }
129141 return VM_FAULT_SIGBUS;
130142 }
131143
@@ -193,7 +205,11 @@ int __detach_context(struct cxl_context *ctx) · 61 unmodified lines
193205 if (status != STARTED)
194206 return -EBUSY;
195207
196− WARN_ON(cxl_detach_process(ctx));
208+ /* Only warn if we detached while the link was OK.
209+ * If detach fails when hw is down, we don't care.
210+ */
211+ WARN_ON(cxl_detach_process(ctx) &&
212+ cxl_adapter_link_ok(ctx->afu->adapter));
197213 flush_work(&ctx->fault_work); /* Only needed for dedicated process */
198214 put_pid(ctx->pid);
199215 cxl_ctx_put();
@@ -253,7 +269,11 @@ static void reclaim_ctx(struct rcu_head *rcu) · 53 unmodified lines
253269 struct cxl_context *ctx = container_of(rcu, struct cxl_context, rcu);
254270
255271 free_page((u64)ctx->sstp);
272+ if (ctx->ff_page)
273+ __free_page(ctx->ff_page);
256274 ctx->sstp = NULL;
275+ if (ctx->kernelapi)
276+ kfree(ctx->mapping);
257277
258278 kfree(ctx);
259279 }
drivers/misc/cxl/cxl.h+77−17
@@ -34,7 +34,7 @@ extern uint cxl_verbose; · 33 unmodified lines
3434 * Bump version each time a user API change is made, whether it is
3535 * backwards compatible ot not.
3636 */
37−#define CXL_API_VERSION 1
37+#define CXL_API_VERSION 2
3838 #define CXL_API_VERSION_COMPATIBLE 1
3939
4040 /*
@@ -83,8 +83,10 @@ static const cxl_p1_reg_t CXL_PSL_AFUSEL = {0x00B0}; · 42 unmodified lines
8383 /* 0x00C0:7EFF Implementation dependent area */
8484 static const cxl_p1_reg_t CXL_PSL_FIR1 = {0x0100};
8585 static const cxl_p1_reg_t CXL_PSL_FIR2 = {0x0108};
86+static const cxl_p1_reg_t CXL_PSL_Timebase = {0x0110};
8687 static const cxl_p1_reg_t CXL_PSL_VERSION = {0x0118};
8788 static const cxl_p1_reg_t CXL_PSL_RESLCKTO = {0x0128};
89+static const cxl_p1_reg_t CXL_PSL_TB_CTLSTAT = {0x0140};
8890 static const cxl_p1_reg_t CXL_PSL_FIR_CNTL = {0x0148};
8991 static const cxl_p1_reg_t CXL_PSL_DSNDCTL = {0x0150};
9092 static const cxl_p1_reg_t CXL_PSL_SNWRALLOC = {0x0158};
@@ -152,6 +154,9 @@ static const cxl_p2n_reg_t CXL_PSL_WED_An = {0x0A0}; · 61 unmodified lines
152154 #define CXL_PSL_SPAP_Size_Shift 4
153155 #define CXL_PSL_SPAP_V 0x0000000000000001ULL
154156
157+/****** CXL_PSL_Control ****************************************************/
158+#define CXL_PSL_Control_tb 0x0000000000000001ULL
159+
155160 /****** CXL_PSL_DLCNTL *****************************************************/
156161 #define CXL_PSL_DLCNTL_D (0x1ull << (63-28))
157162 #define CXL_PSL_DLCNTL_C (0x1ull << (63-29))
@@ -418,6 +423,9 @@ struct cxl_context { · 260 unmodified lines
418423 /* Used to unmap any mmaps when force detaching */
419424 struct address_space *mapping;
420425 struct mutex mapping_lock;
426+ struct page *ff_page;
427+ bool mmio_err_ff;
428+ bool kernelapi;
421429
422430 spinlock_t sste_lock; /* Protects segment table entries */
423431 struct cxl_sste *sstp;
@@ -493,6 +501,7 @@ struct cxl { · 69 unmodified lines
493501 bool user_image_loaded;
494502 bool perst_loads_image;
495503 bool perst_select_user;
504+ bool perst_same_image;
496505 };
497506
498507 int cxl_alloc_one_irq(struct cxl *adapter);
@@ -531,16 +540,33 @@ struct cxl_process_element { · 32 unmodified lines
531540 __be32 software_state;
532541 } __packed;
533542
543+static inline bool cxl_adapter_link_ok(struct cxl *cxl)
544+{
545+ struct pci_dev *pdev;
546+
547+ pdev = to_pci_dev(cxl->dev.parent);
548+ return !pci_channel_offline(pdev);
549+}
550+
534551 static inline void __iomem *_cxl_p1_addr(struct cxl *cxl, cxl_p1_reg_t reg)
535552 {
536553 WARN_ON(!cpu_has_feature(CPU_FTR_HVMODE));
537554 return cxl->p1_mmio + cxl_reg_off(reg);
538555 }
539556
540−#define cxl_p1_write(cxl, reg, val) \
541− out_be64(_cxl_p1_addr(cxl, reg), val)
542−#define cxl_p1_read(cxl, reg) \
543− in_be64(_cxl_p1_addr(cxl, reg))
557+static inline void cxl_p1_write(struct cxl *cxl, cxl_p1_reg_t reg, u64 val)
558+{
559+ if (likely(cxl_adapter_link_ok(cxl)))
560+ out_be64(_cxl_p1_addr(cxl, reg), val);
561+}
562+
563+static inline u64 cxl_p1_read(struct cxl *cxl, cxl_p1_reg_t reg)
564+{
565+ if (likely(cxl_adapter_link_ok(cxl)))
566+ return in_be64(_cxl_p1_addr(cxl, reg));
567+ else
568+ return ~0ULL;
569+}
544570
545571 static inline void __iomem *_cxl_p1n_addr(struct cxl_afu *afu, cxl_p1n_reg_t reg)
546572 {
@@ -548,26 +574,56 @@ static inline void __iomem *_cxl_p1n_addr(struct cxl_afu *afu, cxl_p1n_reg_t reg · 1 unmodified line
548574 return afu->p1n_mmio + cxl_reg_off(reg);
549575 }
550576
551−#define cxl_p1n_write(afu, reg, val) \
552− out_be64(_cxl_p1n_addr(afu, reg), val)
553−#define cxl_p1n_read(afu, reg) \
554− in_be64(_cxl_p1n_addr(afu, reg))
577+static inline void cxl_p1n_write(struct cxl_afu *afu, cxl_p1n_reg_t reg, u64 val)
578+{
579+ if (likely(cxl_adapter_link_ok(afu->adapter)))
580+ out_be64(_cxl_p1n_addr(afu, reg), val);
581+}
582+
583+static inline u64 cxl_p1n_read(struct cxl_afu *afu, cxl_p1n_reg_t reg)
584+{
585+ if (likely(cxl_adapter_link_ok(afu->adapter)))
586+ return in_be64(_cxl_p1n_addr(afu, reg));
587+ else
588+ return ~0ULL;
589+}
555590
556591 static inline void __iomem *_cxl_p2n_addr(struct cxl_afu *afu, cxl_p2n_reg_t reg)
557592 {
558593 return afu->p2n_mmio + cxl_reg_off(reg);
559594 }
560595
561−#define cxl_p2n_write(afu, reg, val) \
562− out_be64(_cxl_p2n_addr(afu, reg), val)
563−#define cxl_p2n_read(afu, reg) \
564− in_be64(_cxl_p2n_addr(afu, reg))
596+static inline void cxl_p2n_write(struct cxl_afu *afu, cxl_p2n_reg_t reg, u64 val)
597+{
598+ if (likely(cxl_adapter_link_ok(afu->adapter)))
599+ out_be64(_cxl_p2n_addr(afu, reg), val);
600+}
601+
602+static inline u64 cxl_p2n_read(struct cxl_afu *afu, cxl_p2n_reg_t reg)
603+{
604+ if (likely(cxl_adapter_link_ok(afu->adapter)))
605+ return in_be64(_cxl_p2n_addr(afu, reg));
606+ else
607+ return ~0ULL;
608+}
565609
610+static inline u64 cxl_afu_cr_read64(struct cxl_afu *afu, int cr, u64 off)
611+{
612+ if (likely(cxl_adapter_link_ok(afu->adapter)))
613+ return in_le64((afu)->afu_desc_mmio + (afu)->crs_offset +
614+ ((cr) * (afu)->crs_len) + (off));
615+ else
616+ return ~0ULL;
617+}
566618
567−#define cxl_afu_cr_read64(afu, cr, off) \
568− in_le64((afu)->afu_desc_mmio + (afu)->crs_offset + ((cr) * (afu)->crs_len) + (off))
569−#define cxl_afu_cr_read32(afu, cr, off) \
570− in_le32((afu)->afu_desc_mmio + (afu)->crs_offset + ((cr) * (afu)->crs_len) + (off))
619+static inline u32 cxl_afu_cr_read32(struct cxl_afu *afu, int cr, u64 off)
620+{
621+ if (likely(cxl_adapter_link_ok(afu->adapter)))
622+ return in_le32((afu)->afu_desc_mmio + (afu)->crs_offset +
623+ ((cr) * (afu)->crs_len) + (off));
624+ else
625+ return 0xffffffff;
626+}
571627 u16 cxl_afu_cr_read16(struct cxl_afu *afu, int cr, u64 off);
572628 u8 cxl_afu_cr_read8(struct cxl_afu *afu, int cr, u64 off);
573629
@@ -585,6 +641,9 @@ void unregister_cxl_calls(struct cxl_calls *calls); · 11 unmodified lines
585641 int cxl_alloc_adapter_nr(struct cxl *adapter);
586642 void cxl_remove_adapter_nr(struct cxl *adapter);
587643
644+int cxl_alloc_spa(struct cxl_afu *afu);
645+void cxl_release_spa(struct cxl_afu *afu);
646+
588647 int cxl_file_init(void);
589648 void cxl_file_exit(void);
590649 int cxl_register_adapter(struct cxl *adapter);
@@ -675,6 +734,7 @@ int cxl_psl_purge(struct cxl_afu *afu); · 84 unmodified lines
675734
676735 void cxl_stop_trace(struct cxl *cxl);
677736 int cxl_pci_vphb_add(struct cxl_afu *afu);
737+void cxl_pci_vphb_reconfigure(struct cxl_afu *afu);
678738 void cxl_pci_vphb_remove(struct cxl_afu *afu);
679739
680740 extern struct pci_driver cxl_pci_driver;
drivers/misc/cxl/debugfs.c+1−1
@@ -48,7 +48,7 @@ DEFINE_SIMPLE_ATTRIBUTE(fops_io_x64, debugfs_io_u64_get, debugfs_io_u64_set, "0x · 47 unmodified lines
4848 static struct dentry *debugfs_create_io_x64(const char *name, umode_t mode,
4949 struct dentry *parent, u64 __iomem *value)
5050 {
51− return debugfs_create_file(name, mode, parent, (void *)value, &fops_io_x64);
51+ return debugfs_create_file(name, mode, parent, (void __force *)value, &fops_io_x64);
5252 }
5353
5454 int cxl_debugfs_adapter_add(struct cxl *adapter)
drivers/misc/cxl/file.c+24−3
@@ -73,6 +73,11 @@ static int __afu_open(struct inode *inode, struct file *file, bool master) · 72 unmodified lines
7373 if (!afu->current_mode)
7474 goto err_put_afu;
7575
76+ if (!cxl_adapter_link_ok(adapter)) {
77+ rc = -EIO;
78+ goto err_put_afu;
79+ }
80+
7681 if (!(ctx = cxl_context_alloc())) {
7782 rc = -ENOMEM;
7883 goto err_put_afu;
@@ -179,6 +184,8 @@ static long afu_ioctl_start_work(struct cxl_context *ctx, · 100 unmodified lines
179184 if (work.flags & CXL_START_WORK_AMR)
180185 amr = work.amr & mfspr(SPRN_UAMOR);
181186
187+ ctx->mmio_err_ff = !!(work.flags & CXL_START_WORK_ERR_FF);
188+
182189 /*
183190 * We grab the PID here and not in the file open to allow for the case
184191 * where a process (master, some daemon, etc) has opened the chardev on
@@ -238,6 +245,9 @@ long afu_ioctl(struct file *file, unsigned int cmd, unsigned long arg) · 53 unmodified lines
238245 if (ctx->status == CLOSED)
239246 return -EIO;
240247
248+ if (!cxl_adapter_link_ok(ctx->afu->adapter))
249+ return -EIO;
250+
241251 pr_devel("afu_ioctl\n");
242252 switch (cmd) {
243253 case CXL_IOCTL_START_WORK:
@@ -251,7 +261,7 @@ long afu_ioctl(struct file *file, unsigned int cmd, unsigned long arg) · 7 unmodified lines
251261 return -EINVAL;
252262 }
253263
254−long afu_compat_ioctl(struct file *file, unsigned int cmd,
264+static long afu_compat_ioctl(struct file *file, unsigned int cmd,
255265 unsigned long arg)
256266 {
257267 return afu_ioctl(file, cmd, arg);
@@ -265,6 +275,9 @@ int afu_mmap(struct file *file, struct vm_area_struct *vm) · 7 unmodified lines
265275 if (ctx->status != STARTED)
266276 return -EIO;
267277
278+ if (!cxl_adapter_link_ok(ctx->afu->adapter))
279+ return -EIO;
280+
268281 return cxl_context_iomap(ctx, vm);
269282 }
270283
@@ -309,6 +322,9 @@ ssize_t afu_read(struct file *file, char __user *buf, size_t count, · 38 unmodified lines
309322 int rc;
310323 DEFINE_WAIT(wait);
311324
325+ if (!cxl_adapter_link_ok(ctx->afu->adapter))
326+ return -EIO;
327+
312328 if (count < CXL_READ_MIN_SIZE)
313329 return -EINVAL;
314330
@@ -319,6 +335,11 @@ ssize_t afu_read(struct file *file, char __user *buf, size_t count, · 4 unmodified lines
319335 if (ctx_event_pending(ctx))
320336 break;
321337
338+ if (!cxl_adapter_link_ok(ctx->afu->adapter)) {
339+ rc = -EIO;
340+ goto out;
341+ }
342+
322343 if (file->f_flags & O_NONBLOCK) {
323344 rc = -EAGAIN;
324345 goto out;
@@ -396,7 +417,7 @@ const struct file_operations afu_fops = { · 71 unmodified lines
396417 .mmap = afu_mmap,
397418 };
398419
399−const struct file_operations afu_master_fops = {
420+static const struct file_operations afu_master_fops = {
400421 .owner = THIS_MODULE,
401422 .open = afu_master_open,
402423 .poll = afu_poll,
@@ -519,7 +540,7 @@ int __init cxl_file_init(void) · 116 unmodified lines
519540 * If these change we really need to update API. Either change some
520541 * flags or update API version number CXL_API_VERSION.
521542 */
522− BUILD_BUG_ON(CXL_API_VERSION != 1);
543+ BUILD_BUG_ON(CXL_API_VERSION != 2);
523544 BUILD_BUG_ON(sizeof(struct cxl_ioctl_start_work) != 64);
524545 BUILD_BUG_ON(sizeof(struct cxl_event_header) != 8);
525546 BUILD_BUG_ON(sizeof(struct cxl_event_afu_interrupt) != 8);
drivers/misc/cxl/irq.c+36−20
@@ -30,12 +30,12 @@ static irqreturn_t handle_psl_slice_error(struct cxl_context *ctx, u64 dsisr, u6 · 29 unmodified lines
3030 serr = cxl_p1n_read(ctx->afu, CXL_PSL_SERR_An);
3131 afu_debug = cxl_p1n_read(ctx->afu, CXL_AFU_DEBUG_An);
3232
33− dev_crit(&ctx->afu->dev, "PSL ERROR STATUS: 0x%.16llx\n", errstat);
34− dev_crit(&ctx->afu->dev, "PSL_FIR1: 0x%.16llx\n", fir1);
35− dev_crit(&ctx->afu->dev, "PSL_FIR2: 0x%.16llx\n", fir2);
36− dev_crit(&ctx->afu->dev, "PSL_SERR_An: 0x%.16llx\n", serr);
37− dev_crit(&ctx->afu->dev, "PSL_FIR_SLICE_An: 0x%.16llx\n", fir_slice);
38− dev_crit(&ctx->afu->dev, "CXL_PSL_AFU_DEBUG_An: 0x%.16llx\n", afu_debug);
33+ dev_crit(&ctx->afu->dev, "PSL ERROR STATUS: 0x%016llx\n", errstat);
34+ dev_crit(&ctx->afu->dev, "PSL_FIR1: 0x%016llx\n", fir1);
35+ dev_crit(&ctx->afu->dev, "PSL_FIR2: 0x%016llx\n", fir2);
36+ dev_crit(&ctx->afu->dev, "PSL_SERR_An: 0x%016llx\n", serr);
37+ dev_crit(&ctx->afu->dev, "PSL_FIR_SLICE_An: 0x%016llx\n", fir_slice);
38+ dev_crit(&ctx->afu->dev, "CXL_PSL_AFU_DEBUG_An: 0x%016llx\n", afu_debug);
3939
4040 dev_crit(&ctx->afu->dev, "STOPPING CXL TRACE\n");
4141 cxl_stop_trace(ctx->afu->adapter);
@@ -54,10 +54,10 @@ irqreturn_t cxl_slice_irq_err(int irq, void *data) · 12 unmodified lines
5454 fir_slice = cxl_p1n_read(afu, CXL_PSL_FIR_SLICE_An);
5555 errstat = cxl_p2n_read(afu, CXL_PSL_ErrStat_An);
5656 afu_debug = cxl_p1n_read(afu, CXL_AFU_DEBUG_An);
57− dev_crit(&afu->dev, "PSL_SERR_An: 0x%.16llx\n", serr);
58− dev_crit(&afu->dev, "PSL_FIR_SLICE_An: 0x%.16llx\n", fir_slice);
59− dev_crit(&afu->dev, "CXL_PSL_ErrStat_An: 0x%.16llx\n", errstat);
60− dev_crit(&afu->dev, "CXL_PSL_AFU_DEBUG_An: 0x%.16llx\n", afu_debug);
57+ dev_crit(&afu->dev, "PSL_SERR_An: 0x%016llx\n", serr);
58+ dev_crit(&afu->dev, "PSL_FIR_SLICE_An: 0x%016llx\n", fir_slice);
59+ dev_crit(&afu->dev, "CXL_PSL_ErrStat_An: 0x%016llx\n", errstat);
60+ dev_crit(&afu->dev, "CXL_PSL_AFU_DEBUG_An: 0x%016llx\n", afu_debug);
6161
6262 cxl_p1n_write(afu, CXL_PSL_SERR_An, serr);
6363
@@ -72,7 +72,7 @@ static irqreturn_t cxl_irq_err(int irq, void *data) · 8 unmodified lines
7272 WARN(1, "CXL ERROR interrupt %i\n", irq);
7373
7474 err_ivte = cxl_p1_read(adapter, CXL_PSL_ErrIVTE);
75− dev_crit(&adapter->dev, "PSL_ErrIVTE: 0x%.16llx\n", err_ivte);
75+ dev_crit(&adapter->dev, "PSL_ErrIVTE: 0x%016llx\n", err_ivte);
7676
7777 dev_crit(&adapter->dev, "STOPPING CXL TRACE\n");
7878 cxl_stop_trace(adapter);
@@ -80,7 +80,7 @@ static irqreturn_t cxl_irq_err(int irq, void *data) · 1 unmodified line
8080 fir1 = cxl_p1_read(adapter, CXL_PSL_FIR1);
8181 fir2 = cxl_p1_read(adapter, CXL_PSL_FIR2);
8282
83− dev_crit(&adapter->dev, "PSL_FIR1: 0x%.16llx\nPSL_FIR2: 0x%.16llx\n", fir1, fir2);
83+ dev_crit(&adapter->dev, "PSL_FIR1: 0x%016llx\nPSL_FIR2: 0x%016llx\n", fir1, fir2);
8484
8585 return IRQ_HANDLED;
8686 }
@@ -147,7 +147,7 @@ static irqreturn_t cxl_irq(int irq, void *data, struct cxl_irq_info *irq_info) · 60 unmodified lines
147147 if (dsisr & CXL_PSL_DSISR_An_PE)
148148 return handle_psl_slice_error(ctx, dsisr, irq_info->errstat);
149149 if (dsisr & CXL_PSL_DSISR_An_AE) {
150− pr_devel("CXL interrupt: AFU Error %.llx\n", irq_info->afu_err);
150+ pr_devel("CXL interrupt: AFU Error 0x%016llx\n", irq_info->afu_err);
151151
152152 if (ctx->pending_afu_err) {
153153 /*
@@ -158,7 +158,7 @@ static irqreturn_t cxl_irq(int irq, void *data, struct cxl_irq_info *irq_info) · 4 unmodified lines
158158 * probably best that we log them somewhere:
159159 */
160160 dev_err_ratelimited(&ctx->afu->dev, "CXL AFU Error "
161− "undelivered to pe %i: %.llx\n",
161+ "undelivered to pe %i: 0x%016llx\n",
162162 ctx->pe, irq_info->afu_err);
163163 } else {
164164 spin_lock(&ctx->lock);
@@ -211,8 +211,8 @@ static irqreturn_t cxl_irq_multiplexed(int irq, void *data) · 46 unmodified lines
211211 }
212212 rcu_read_unlock();
213213
214− WARN(1, "Unable to demultiplex CXL PSL IRQ for PE %i DSISR %.16llx DAR"
215− " %.16llx\n(Possible AFU HW issue - was a term/remove acked"
214+ WARN(1, "Unable to demultiplex CXL PSL IRQ for PE %i DSISR %016llx DAR"
215+ " %016llx\n(Possible AFU HW issue - was a term/remove acked"
216216 " with outstanding transactions?)\n", ph, irq_info.dsisr,
217217 irq_info.dar);
218218 return fail_psl_irq(afu, &irq_info);
@@ -341,6 +341,9 @@ int cxl_register_psl_err_irq(struct cxl *adapter) · 122 unmodified lines
341341
342342 void cxl_release_psl_err_irq(struct cxl *adapter)
343343 {
344+ if (adapter->err_virq != irq_find_mapping(NULL, adapter->err_hwirq))
345+ return;
346+
344347 cxl_p1_write(adapter, CXL_PSL_ErrIVTE, 0x0000000000000000);
345348 cxl_unmap_irq(adapter->err_virq, adapter);
346349 cxl_release_one_irq(adapter, adapter->err_hwirq);
@@ -374,6 +377,9 @@ int cxl_register_serr_irq(struct cxl_afu *afu) · 27 unmodified lines
374377
375378 void cxl_release_serr_irq(struct cxl_afu *afu)
376379 {
380+ if (afu->serr_virq != irq_find_mapping(NULL, afu->serr_hwirq))
381+ return;
382+
377383 cxl_p1n_write(afu, CXL_PSL_SERR_An, 0x0000000000000000);
378384 cxl_unmap_irq(afu->serr_virq, afu);
379385 cxl_release_one_irq(afu->adapter, afu->serr_hwirq);
@@ -400,12 +406,15 @@ int cxl_register_psl_irq(struct cxl_afu *afu) · 20 unmodified lines
400406
401407 void cxl_release_psl_irq(struct cxl_afu *afu)
402408 {
409+ if (afu->psl_virq != irq_find_mapping(NULL, afu->psl_hwirq))
410+ return;
411+
403412 cxl_unmap_irq(afu->psl_virq, afu);
404413 cxl_release_one_irq(afu->adapter, afu->psl_hwirq);
405414 kfree(afu->psl_irq_name);
406415 }
407416
408−void afu_irq_name_free(struct cxl_context *ctx)
417+static void afu_irq_name_free(struct cxl_context *ctx)
409418 {
410419 struct cxl_irq_name *irq_name, *tmp;
411420
@@ -421,6 +430,9 @@ int afu_allocate_irqs(struct cxl_context *ctx, u32 count) · 9 unmodified lines
421430 int rc, r, i, j = 1;
422431 struct cxl_irq_name *irq_name;
423432
433+ /* Initialize the list head to hold irq names */
434+ INIT_LIST_HEAD(&ctx->irq_names);
435+
424436 if ((rc = cxl_alloc_irq_ranges(&ctx->irqs, ctx->afu->adapter, count)))
425437 return rc;
426438
@@ -432,13 +444,12 @@ int afu_allocate_irqs(struct cxl_context *ctx, u32 count) · 5 unmodified lines
432444 ctx->irq_bitmap = kcalloc(BITS_TO_LONGS(count),
433445 sizeof(*ctx->irq_bitmap), GFP_KERNEL);
434446 if (!ctx->irq_bitmap)
435− return -ENOMEM;
447+ goto out;
436448
437449 /*
438450 * Allocate names first. If any fail, bail out before allocating
439451 * actual hardware IRQs.
440452 */
441− INIT_LIST_HEAD(&ctx->irq_names);
442453 for (r = 1; r < CXL_IRQ_RANGES; r++) {
443454 for (i = 0; i < ctx->irqs.range[r]; i++) {
444455 irq_name = kmalloc(sizeof(struct cxl_irq_name),
@@ -460,11 +471,12 @@ int afu_allocate_irqs(struct cxl_context *ctx, u32 count) · 15 unmodified lines
460471 return 0;
461472
462473 out:
474+ cxl_release_irq_ranges(&ctx->irqs, ctx->afu->adapter);
463475 afu_irq_name_free(ctx);
464476 return -ENOMEM;
465477 }
466478
467−void afu_register_hwirqs(struct cxl_context *ctx)
479+static void afu_register_hwirqs(struct cxl_context *ctx)
468480 {
469481 irq_hw_number_t hwirq;
470482 struct cxl_irq_name *irq_name;
@@ -511,4 +523,8 @@ void afu_release_irqs(struct cxl_context *ctx, void *cookie) · 40 unmodified lines
511523
512524 afu_irq_name_free(ctx);
513525 cxl_release_irq_ranges(&ctx->irqs, ctx->afu->adapter);
526+
527+ kfree(ctx->irq_bitmap);
528+ ctx->irq_bitmap = NULL;
529+ ctx->irq_count = 0;
514530 }
drivers/misc/cxl/main.c+1−0
@@ -222,6 +222,7 @@ static void exit_cxl(void) · 221 unmodified lines
222222 cxl_debugfs_exit();
223223 cxl_file_exit();
224224 unregister_cxl_calls(&cxl_calls);
225+ idr_destroy(&cxl_adapter_idr);
225226 }
226227
227228 module_init(init_cxl);
drivers/misc/cxl/native.c+97−22
@@ -41,7 +41,14 @@ static int afu_control(struct cxl_afu *afu, u64 command, · 40 unmodified lines
4141 rc = -EBUSY;
4242 goto out;
4343 }
44− pr_devel_ratelimited("AFU control... (0x%.16llx)\n",
44+
45+ if (!cxl_adapter_link_ok(afu->adapter)) {
46+ afu->enabled = enabled;
47+ rc = -EIO;
48+ goto out;
49+ }
50+
51+ pr_devel_ratelimited("AFU control... (0x%016llx)\n",
4552 AFU_Cntl | command);
4653 cpu_relax();
4754 AFU_Cntl = cxl_p2n_read(afu, CXL_AFU_Cntl_An);
@@ -85,6 +92,10 @@ int __cxl_afu_reset(struct cxl_afu *afu) · 37 unmodified lines
8592
8693 int cxl_afu_check_and_enable(struct cxl_afu *afu)
8794 {
95+ if (!cxl_adapter_link_ok(afu->adapter)) {
96+ WARN(1, "Refusing to enable afu while link down!\n");
97+ return -EIO;
98+ }
8899 if (afu->enabled)
89100 return 0;
90101 return afu_enable(afu);
@@ -103,6 +114,12 @@ int cxl_psl_purge(struct cxl_afu *afu) · 12 unmodified lines
103114
104115 pr_devel("PSL purge request\n");
105116
117+ if (!cxl_adapter_link_ok(afu->adapter)) {
118+ dev_warn(&afu->dev, "PSL Purge called with link down, ignoring\n");
119+ rc = -EIO;
120+ goto out;
121+ }
122+
106123 if ((AFU_Cntl & CXL_AFU_Cntl_An_ES_MASK) != CXL_AFU_Cntl_An_ES_Disabled) {
107124 WARN(1, "psl_purge request while AFU not disabled!\n");
108125 cxl_afu_disable(afu);
@@ -119,14 +136,19 @@ int cxl_psl_purge(struct cxl_afu *afu) · 10 unmodified lines
119136 rc = -EBUSY;
120137 goto out;
121138 }
139+ if (!cxl_adapter_link_ok(afu->adapter)) {
140+ rc = -EIO;
141+ goto out;
142+ }
143+
122144 dsisr = cxl_p2n_read(afu, CXL_PSL_DSISR_An);
123− pr_devel_ratelimited("PSL purging... PSL_CNTL: 0x%.16llx PSL_DSISR: 0x%.16llx\n", PSL_CNTL, dsisr);
145+ pr_devel_ratelimited("PSL purging... PSL_CNTL: 0x%016llx PSL_DSISR: 0x%016llx\n", PSL_CNTL, dsisr);
124146 if (dsisr & CXL_PSL_DSISR_TRANS) {
125147 dar = cxl_p2n_read(afu, CXL_PSL_DAR_An);
126− dev_notice(&afu->dev, "PSL purge terminating pending translation, DSISR: 0x%.16llx, DAR: 0x%.16llx\n", dsisr, dar);
148+ dev_notice(&afu->dev, "PSL purge terminating pending translation, DSISR: 0x%016llx, DAR: 0x%016llx\n", dsisr, dar);
127149 cxl_p2n_write(afu, CXL_PSL_TFC_An, CXL_PSL_TFC_An_AE);
128150 } else if (dsisr) {
129− dev_notice(&afu->dev, "PSL purge acknowledging pending non-translation fault, DSISR: 0x%.16llx\n", dsisr);
151+ dev_notice(&afu->dev, "PSL purge acknowledging pending non-translation fault, DSISR: 0x%016llx\n", dsisr);
130152 cxl_p2n_write(afu, CXL_PSL_TFC_An, CXL_PSL_TFC_An_A);
131153 } else {
132154 cpu_relax();
@@ -161,10 +183,8 @@ static int spa_max_procs(int spa_size) · 28 unmodified lines
161183 return ((spa_size / 8) - 96) / 17;
162184 }
163185
164−static int alloc_spa(struct cxl_afu *afu)
186+int cxl_alloc_spa(struct cxl_afu *afu)
165187 {
166− u64 spap;
167−
168188 /* Work out how many pages to allocate */
169189 afu->spa_order = 0;
170190 do {
@@ -183,6 +203,13 @@ static int alloc_spa(struct cxl_afu *afu) · 12 unmodified lines
183203 pr_devel("spa pages: %i afu->spa_max_procs: %i afu->num_procs: %i\n",
184204 1<<afu->spa_order, afu->spa_max_procs, afu->num_procs);
185205
206+ return 0;
207+}
208+
209+static void attach_spa(struct cxl_afu *afu)
210+{
211+ u64 spap;
212+
186213 afu->sw_command_status = (__be64 *)((char *)afu->spa +
187214 ((afu->spa_max_procs + 3) * 128));
188215
@@ -191,14 +218,19 @@ static int alloc_spa(struct cxl_afu *afu) · 2 unmodified lines
191218 spap |= CXL_PSL_SPAP_V;
192219 pr_devel("cxl: SPA allocated at 0x%p. Max processes: %i, sw_command_status: 0x%p CXL_PSL_SPAP_An=0x%016llx\n", afu->spa, afu->spa_max_procs, afu->sw_command_status, spap);
193220 cxl_p1n_write(afu, CXL_PSL_SPAP_An, spap);
194−
195− return 0;
196221 }
197222
198−static void release_spa(struct cxl_afu *afu)
223+static inline void detach_spa(struct cxl_afu *afu)
199224 {
200225 cxl_p1n_write(afu, CXL_PSL_SPAP_An, 0);
201− free_pages((unsigned long) afu->spa, afu->spa_order);
226+}
227+
228+void cxl_release_spa(struct cxl_afu *afu)
229+{
230+ if (afu->spa) {
231+ free_pages((unsigned long) afu->spa, afu->spa_order);
232+ afu->spa = NULL;
233+ }
202234 }
203235
204236 int cxl_tlb_slb_invalidate(struct cxl *adapter)
@@ -215,6 +247,8 @@ int cxl_tlb_slb_invalidate(struct cxl *adapter) · 10 unmodified lines
215247 dev_warn(&adapter->dev, "WARNING: CXL adapter wide TLBIA timed out!\n");
216248 return -EBUSY;
217249 }
250+ if (!cxl_adapter_link_ok(adapter))
251+ return -EIO;
218252 cpu_relax();
219253 }
220254
@@ -224,6 +258,8 @@ int cxl_tlb_slb_invalidate(struct cxl *adapter) · 3 unmodified lines
224258 dev_warn(&adapter->dev, "WARNING: CXL adapter wide SLBIA timed out!\n");
225259 return -EBUSY;
226260 }
261+ if (!cxl_adapter_link_ok(adapter))
262+ return -EIO;
227263 cpu_relax();
228264 }
229265 return 0;
@@ -240,6 +276,11 @@ int cxl_afu_slbia(struct cxl_afu *afu) · 10 unmodified lines
240276 dev_warn(&afu->dev, "WARNING: CXL AFU SLBIA timed out!\n");
241277 return -EBUSY;
242278 }
279+ /* If the adapter has gone down, we can assume that we
280+ * will PERST it and that will invalidate everything.
281+ */
282+ if (!cxl_adapter_link_ok(afu->adapter))
283+ return -EIO;
243284 cpu_relax();
244285 }
245286 return 0;
@@ -279,6 +320,8 @@ static void slb_invalid(struct cxl_context *ctx) · 33 unmodified lines
279320 cxl_p1_write(adapter, CXL_PSL_SLBIA, CXL_TLB_SLB_IQ_LPIDPID);
280321
281322 while (1) {
323+ if (!cxl_adapter_link_ok(adapter))
324+ break;
282325 slbia = cxl_p1_read(adapter, CXL_PSL_SLBIA);
283326 if (!(slbia & CXL_TLB_SLB_P))
284327 break;
@@ -308,6 +351,11 @@ static int do_process_element_cmd(struct cxl_context *ctx, · 23 unmodified lines
308351 rc = -EBUSY;
309352 goto out;
310353 }
354+ if (!cxl_adapter_link_ok(ctx->afu->adapter)) {
355+ dev_warn(&ctx->afu->dev, "WARNING: Device link down, aborting Process Element Command!\n");
356+ rc = -EIO;
357+ goto out;
358+ }
311359 state = be64_to_cpup(ctx->afu->sw_command_status);
312360 if (state == ~0ULL) {
313361 pr_err("cxl: Error adding process element to AFU\n");
@@ -355,8 +403,13 @@ static int terminate_process_element(struct cxl_context *ctx) · 41 unmodified lines
355403
356404 mutex_lock(&ctx->afu->spa_mutex);
357405 pr_devel("%s Terminate pe: %i started\n", __func__, ctx->pe);
358− rc = do_process_element_cmd(ctx, CXL_SPA_SW_CMD_TERMINATE,
359− CXL_PE_SOFTWARE_STATE_V | CXL_PE_SOFTWARE_STATE_T);
406+ /* We could be asked to terminate when the hw is down. That
407+ * should always succeed: it's not running if the hw has gone
408+ * away and is being reset.
409+ */
410+ if (cxl_adapter_link_ok(ctx->afu->adapter))
411+ rc = do_process_element_cmd(ctx, CXL_SPA_SW_CMD_TERMINATE,
412+ CXL_PE_SOFTWARE_STATE_V | CXL_PE_SOFTWARE_STATE_T);
360413 ctx->elem->software_state = 0; /* Remove Valid bit */
361414 pr_devel("%s Terminate pe: %i finished\n", __func__, ctx->pe);
362415 mutex_unlock(&ctx->afu->spa_mutex);
@@ -369,7 +422,14 @@ static int remove_process_element(struct cxl_context *ctx) · 6 unmodified lines
369422
370423 mutex_lock(&ctx->afu->spa_mutex);
371424 pr_devel("%s Remove pe: %i started\n", __func__, ctx->pe);
372− if (!(rc = do_process_element_cmd(ctx, CXL_SPA_SW_CMD_REMOVE, 0)))
425+
426+ /* We could be asked to remove when the hw is down. Again, if
427+ * the hw is down, the PE is gone, so we succeed.
428+ */
429+ if (cxl_adapter_link_ok(ctx->afu->adapter))
430+ rc = do_process_element_cmd(ctx, CXL_SPA_SW_CMD_REMOVE, 0);
431+
432+ if (!rc)
373433 ctx->pe_inserted = false;
374434 slb_invalid(ctx);
375435 pr_devel("%s Remove pe: %i finished\n", __func__, ctx->pe);
@@ -397,8 +457,11 @@ static int activate_afu_directed(struct cxl_afu *afu) · 21 unmodified lines
397457
398458 dev_info(&afu->dev, "Activating AFU directed mode\n");
399459
400− if (alloc_spa(afu))
401− return -ENOMEM;
460+ if (afu->spa == NULL) {
461+ if (cxl_alloc_spa(afu))
462+ return -ENOMEM;
463+ }
464+ attach_spa(afu);
402465
403466 cxl_p1n_write(afu, CXL_PSL_SCNTL_An, CXL_PSL_SCNTL_An_PM_AFU);
404467 cxl_p1n_write(afu, CXL_PSL_AMOR_An, 0xFFFFFFFFFFFFFFFFULL);
@@ -492,9 +555,7 @@ static int attach_afu_directed(struct cxl_context *ctx, u64 wed, u64 amr) · 87 unmodified lines
492555 if ((result = cxl_afu_check_and_enable(ctx->afu)))
493556 return result;
494557
495− add_process_element(ctx);
496−
497− return 0;
558+ return add_process_element(ctx);
498559 }
499560
500561 static int deactivate_afu_directed(struct cxl_afu *afu)
@@ -511,8 +572,6 @@ static int deactivate_afu_directed(struct cxl_afu *afu) · 10 unmodified lines
511572 cxl_afu_disable(afu);
512573 cxl_psl_purge(afu);
513574
514− release_spa(afu);
515−
516575 return 0;
517576 }
518577
@@ -614,6 +673,11 @@ int cxl_afu_activate_mode(struct cxl_afu *afu, int mode) · 95 unmodified lines
614673 if (!(mode & afu->modes_supported))
615674 return -EINVAL;
616675
676+ if (!cxl_adapter_link_ok(afu->adapter)) {
677+ WARN(1, "Device link is down, refusing to activate!\n");
678+ return -EIO;
679+ }
680+
617681 if (mode == CXL_MODE_DIRECTED)
618682 return activate_afu_directed(afu);
619683 if (mode == CXL_MODE_DEDICATED)
@@ -624,6 +688,11 @@ int cxl_afu_activate_mode(struct cxl_afu *afu, int mode) · 4 unmodified lines
624688
625689 int cxl_attach_process(struct cxl_context *ctx, bool kernel, u64 wed, u64 amr)
626690 {
691+ if (!cxl_adapter_link_ok(ctx->afu->adapter)) {
692+ WARN(1, "Device link is down, refusing to attach process!\n");
693+ return -EIO;
694+ }
695+
627696 ctx->kernel = kernel;
628697 if (ctx->afu->current_mode == CXL_MODE_DIRECTED)
629698 return attach_afu_directed(ctx, wed, amr);
@@ -668,6 +737,12 @@ int cxl_get_irq(struct cxl_afu *afu, struct cxl_irq_info *info) · 38 unmodified lines
668737 {
669738 u64 pidtid;
670739
740+ /* If the adapter has gone away, we can't get any meaningful
741+ * information.
742+ */
743+ if (!cxl_adapter_link_ok(afu->adapter))
744+ return -EIO;
745+
671746 info->dsisr = cxl_p2n_read(afu, CXL_PSL_DSISR_An);
672747 info->dar = cxl_p2n_read(afu, CXL_PSL_DAR_An);
673748 info->dsr = cxl_p2n_read(afu, CXL_PSL_DSR_An);
@@ -684,7 +759,7 @@ static void recover_psl_err(struct cxl_afu *afu, u64 errstat) · 10 unmodified lines
684759 {
685760 u64 dsisr;
686761
687− pr_devel("RECOVERING FROM PSL ERROR... (0x%.16llx)\n", errstat);
762+ pr_devel("RECOVERING FROM PSL ERROR... (0x%016llx)\n", errstat);
688763
689764 /* Clear PSL_DSISR[PE] */
690765 dsisr = cxl_p2n_read(afu, CXL_PSL_DSISR_An);
drivers/misc/cxl/pci.c+486−125
@@ -24,6 +24,7 @@ · 23 unmodified lines
2424 #include <asm/io.h>
2525
2626 #include "cxl.h"
27+#include <misc/cxl.h>
2728
2829
2930 #define CXL_PCI_VSEC_ID 0x1280
@@ -133,7 +134,7 @@ u8 cxl_afu_cr_read8(struct cxl_afu *afu, int cr, u64 off) · 103 unmodified lines
133134 return (val >> ((off & 0x3) * 8)) & 0xff;
134135 }
135136
136−static DEFINE_PCI_DEVICE_TABLE(cxl_pci_tbl) = {
137+static const struct pci_device_id cxl_pci_tbl[] = {
137138 { PCI_DEVICE(PCI_VENDOR_ID_IBM, 0x0477), },
138139 { PCI_DEVICE(PCI_VENDOR_ID_IBM, 0x044b), },
139140 { PCI_DEVICE(PCI_VENDOR_ID_IBM, 0x04cf), },
@@ -369,6 +370,55 @@ static int init_implementation_adapter_regs(struct cxl *adapter, struct pci_dev · 229 unmodified lines
369370 return 0;
370371 }
371372
373+#define TBSYNC_CNT(n) (((u64)n & 0x7) << (63-6))
374+#define _2048_250MHZ_CYCLES 1
375+
376+static int cxl_setup_psl_timebase(struct cxl *adapter, struct pci_dev *dev)
377+{
378+ u64 psl_tb;
379+ int delta;
380+ unsigned int retry = 0;
381+ struct device_node *np;
382+
383+ if (!(np = pnv_pci_get_phb_node(dev)))
384+ return -ENODEV;
385+
386+ /* Do not fail when CAPP timebase sync is not supported by OPAL */
387+ of_node_get(np);
388+ if (! of_get_property(np, "ibm,capp-timebase-sync", NULL)) {
389+ of_node_put(np);
390+ pr_err("PSL: Timebase sync: OPAL support missing\n");
391+ return 0;
392+ }
393+ of_node_put(np);
394+
395+ /*
396+ * Setup PSL Timebase Control and Status register
397+ * with the recommended Timebase Sync Count value
398+ */
399+ cxl_p1_write(adapter, CXL_PSL_TB_CTLSTAT,
400+ TBSYNC_CNT(2 * _2048_250MHZ_CYCLES));
401+
402+ /* Enable PSL Timebase */
403+ cxl_p1_write(adapter, CXL_PSL_Control, 0x0000000000000000);
404+ cxl_p1_write(adapter, CXL_PSL_Control, CXL_PSL_Control_tb);
405+
406+ /* Wait until CORE TB and PSL TB difference <= 16usecs */
407+ do {
408+ msleep(1);
409+ if (retry++ > 5) {
410+ pr_err("PSL: Timebase sync: giving up!\n");
411+ return -EIO;
412+ }
413+ psl_tb = cxl_p1_read(adapter, CXL_PSL_Timebase);
414+ delta = mftb() - psl_tb;
415+ if (delta < 0)
416+ delta = -delta;
417+ } while (cputime_to_usecs(delta) > 16);
418+
419+ return 0;
420+}
421+
372422 static int init_implementation_afu_regs(struct cxl_afu *afu)
373423 {
374424 /* read/write masks for this slice */
@@ -539,10 +589,18 @@ err: · 164 unmodified lines
539589
540590 static void cxl_unmap_slice_regs(struct cxl_afu *afu)
541591 {
542− if (afu->p2n_mmio)
592+ if (afu->p2n_mmio) {
543593 iounmap(afu->p2n_mmio);
544− if (afu->p1n_mmio)
594+ afu->p2n_mmio = NULL;
595+ }
596+ if (afu->p1n_mmio) {
545597 iounmap(afu->p1n_mmio);
598+ afu->p1n_mmio = NULL;
599+ }
600+ if (afu->afu_desc_mmio) {
601+ iounmap(afu->afu_desc_mmio);
602+ afu->afu_desc_mmio = NULL;
603+ }
546604 }
547605
548606 static void cxl_release_afu(struct device *dev)
@@ -551,6 +609,9 @@ static void cxl_release_afu(struct device *dev) · 2 unmodified lines
551609
552610 pr_devel("cxl_release_afu\n");
553611
612+ idr_destroy(&afu->contexts_idr);
613+ cxl_release_spa(afu);
614+
554615 kfree(afu);
555616 }
556617
@@ -656,7 +717,7 @@ static int sanitise_afu_regs(struct cxl_afu *afu) · 99 unmodified lines
656717 */
657718 reg = cxl_p2n_read(afu, CXL_AFU_Cntl_An);
658719 if ((reg & CXL_AFU_Cntl_An_ES_MASK) != CXL_AFU_Cntl_An_ES_Disabled) {
659− dev_warn(&afu->dev, "WARNING: AFU was not disabled: %#.16llx\n", reg);
720+ dev_warn(&afu->dev, "WARNING: AFU was not disabled: %#016llx\n", reg);
660721 if (__cxl_afu_reset(afu))
661722 return -EIO;
662723 if (cxl_afu_disable(afu))
@@ -677,7 +738,7 @@ static int sanitise_afu_regs(struct cxl_afu *afu) · 14 unmodified lines
677738 cxl_p2n_write(afu, CXL_SSTP0_An, 0x0000000000000000);
678739 reg = cxl_p2n_read(afu, CXL_PSL_DSISR_An);
679740 if (reg) {
680− dev_warn(&afu->dev, "AFU had pending DSISR: %#.16llx\n", reg);
741+ dev_warn(&afu->dev, "AFU had pending DSISR: %#016llx\n", reg);
681742 if (reg & CXL_PSL_DSISR_TRANS)
682743 cxl_p2n_write(afu, CXL_PSL_TFC_An, CXL_PSL_TFC_An_AE);
683744 else
@@ -686,12 +747,12 @@ static int sanitise_afu_regs(struct cxl_afu *afu) · 2 unmodified lines
686747 reg = cxl_p1n_read(afu, CXL_PSL_SERR_An);
687748 if (reg) {
688749 if (reg & ~0xffff)
689− dev_warn(&afu->dev, "AFU had pending SERR: %#.16llx\n", reg);
750+ dev_warn(&afu->dev, "AFU had pending SERR: %#016llx\n", reg);
690751 cxl_p1n_write(afu, CXL_PSL_SERR_An, reg & ~0xffff);
691752 }
692753 reg = cxl_p2n_read(afu, CXL_PSL_ErrStat_An);
693754 if (reg) {
694− dev_warn(&afu->dev, "AFU had pending error status: %#.16llx\n", reg);
755+ dev_warn(&afu->dev, "AFU had pending error status: %#016llx\n", reg);
695756 cxl_p2n_write(afu, CXL_PSL_ErrStat_An, reg);
696757 }
697758
@@ -742,45 +803,70 @@ ssize_t cxl_afu_read_err_buffer(struct cxl_afu *afu, char *buf, · 44 unmodified lines
742803 return count;
743804 }
744805
745−static int cxl_init_afu(struct cxl *adapter, int slice, struct pci_dev *dev)
806+static int cxl_configure_afu(struct cxl_afu *afu, struct cxl *adapter, struct pci_dev *dev)
746807 {
747− struct cxl_afu *afu;
748− bool free = true;
749808 int rc;
750809
751− if (!(afu = cxl_alloc_afu(adapter, slice)))
752− return -ENOMEM;
753−
754− if ((rc = dev_set_name(&afu->dev, "afu%i.%i", adapter->adapter_num, slice)))
755− goto err1;
756−
757810 if ((rc = cxl_map_slice_regs(afu, adapter, dev)))
758− goto err1;
811+ return rc;
759812
760813 if ((rc = sanitise_afu_regs(afu)))
761− goto err2;
814+ goto err1;
762815
763816 /* We need to reset the AFU before we can read the AFU descriptor */
764817 if ((rc = __cxl_afu_reset(afu)))
765− goto err2;
818+ goto err1;
766819
767820 if (cxl_verbose)
768821 dump_afu_descriptor(afu);
769822
770823 if ((rc = cxl_read_afu_descriptor(afu)))
771− goto err2;
824+ goto err1;
772825
773826 if ((rc = cxl_afu_descriptor_looks_ok(afu)))
774− goto err2;
827+ goto err1;
775828
776829 if ((rc = init_implementation_afu_regs(afu)))
777− goto err2;
830+ goto err1;
778831
779832 if ((rc = cxl_register_serr_irq(afu)))
780− goto err2;
833+ goto err1;
781834
782835 if ((rc = cxl_register_psl_irq(afu)))
783− goto err3;
836+ goto err2;
837+
838+ return 0;
839+
840+err2:
841+ cxl_release_serr_irq(afu);
842+err1:
843+ cxl_unmap_slice_regs(afu);
844+ return rc;
845+}
846+
847+static void cxl_deconfigure_afu(struct cxl_afu *afu)
848+{
849+ cxl_release_psl_irq(afu);
850+ cxl_release_serr_irq(afu);
851+ cxl_unmap_slice_regs(afu);
852+}
853+
854+static int cxl_init_afu(struct cxl *adapter, int slice, struct pci_dev *dev)
855+{
856+ struct cxl_afu *afu;
857+ int rc;
858+
859+ afu = cxl_alloc_afu(adapter, slice);
860+ if (!afu)
861+ return -ENOMEM;
862+
863+ rc = dev_set_name(&afu->dev, "afu%i.%i", adapter->adapter_num, slice);
864+ if (rc)
865+ goto err_free;
866+
867+ rc = cxl_configure_afu(afu, adapter, dev);
868+ if (rc)
869+ goto err_free;
784870
785871 /* Don't care if this fails */
786872 cxl_debugfs_afu_add(afu);
@@ -795,10 +881,6 @@ static int cxl_init_afu(struct cxl *adapter, int slice, struct pci_dev *dev) · 8 unmodified lines
795881 if ((rc = cxl_sysfs_afu_add(afu)))
796882 goto err_put1;
797883
798−
799− if ((rc = cxl_afu_select_best_mode(afu)))
800− goto err_put2;
801−
802884 adapter->afu[afu->slice] = afu;
803885
804886 if ((rc = cxl_pci_vphb_add(afu)))
@@ -806,21 +888,16 @@ static int cxl_init_afu(struct cxl *adapter, int slice, struct pci_dev *dev) · 1 unmodified line
806888
807889 return 0;
808890
809−err_put2:
810− cxl_sysfs_afu_remove(afu);
811891 err_put1:
812− device_unregister(&afu->dev);
813− free = false;
892+ cxl_deconfigure_afu(afu);
814893 cxl_debugfs_afu_remove(afu);
815− cxl_release_psl_irq(afu);
816−err3:
817− cxl_release_serr_irq(afu);
818−err2:
819− cxl_unmap_slice_regs(afu);
820−err1:
821− if (free)
822− kfree(afu);
894+ device_unregister(&afu->dev);
895+ return rc;
896+
897+err_free:
898+ kfree(afu);
823899 return rc;
900+
824901 }
825902
826903 static void cxl_remove_afu(struct cxl_afu *afu)
@@ -840,10 +917,7 @@ static void cxl_remove_afu(struct cxl_afu *afu) · 13 unmodified lines
840917 cxl_context_detach_all(afu);
841918 cxl_afu_deactivate_mode(afu);
842919
843− cxl_release_psl_irq(afu);
844− cxl_release_serr_irq(afu);
845− cxl_unmap_slice_regs(afu);
846−
920+ cxl_deconfigure_afu(afu);
847921 device_unregister(&afu->dev);
848922 }
849923
@@ -851,16 +925,15 @@ int cxl_reset(struct cxl *adapter) · 1 unmodified line
851925 {
852926 struct pci_dev *dev = to_pci_dev(adapter->dev.parent);
853927 int rc;
854− int i;
855− u32 val;
856−
857− dev_info(&dev->dev, "CXL reset\n");
858928
859− for (i = 0; i < adapter->slices; i++) {
860− cxl_pci_vphb_remove(adapter->afu[i]);
861− cxl_remove_afu(adapter->afu[i]);
929+ if (adapter->perst_same_image) {
930+ dev_warn(&dev->dev,
931+ "cxl: refusing to reset/reflash when perst_reloads_same_image is set.\n");
932+ return -EINVAL;
862933 }
863934
935+ dev_info(&dev->dev, "CXL reset\n");
936+
864937 /* pcie_warm_reset requests a fundamental pci reset which includes a
865938 * PERST assert/deassert. PERST triggers a loading of the image
866939 * if "user" or "factory" is selected in sysfs */
@@ -869,20 +942,6 @@ int cxl_reset(struct cxl *adapter) · 2 unmodified lines
869942 return rc;
870943 }
871944
872− /* the PERST done above fences the PHB. So, reset depends on EEH
873− * to unbind the driver, tell Sapphire to reinit the PHB, and rebind
874− * the driver. Do an mmio read explictly to ensure EEH notices the
875− * fenced PHB. Retry for a few seconds before giving up. */
876− i = 0;
877− while (((val = mmio_read32be(adapter->p1_mmio)) != 0xffffffff) &&
878− (i < 5)) {
879− msleep(500);
880− i++;
881− }
882−
883− if (val != 0xffffffff)
884− dev_err(&dev->dev, "cxl: PERST failed to trigger EEH\n");
885−
886945 return rc;
887946 }
888947
@@ -893,7 +952,7 @@ static int cxl_map_adapter_regs(struct cxl *adapter, struct pci_dev *dev) · 4 unmodified lines
893952 if (pci_request_region(dev, 0, "priv 1 regs"))
894953 goto err2;
895954
896− pr_devel("cxl_map_adapter_regs: p1: %#.16llx %#llx, p2: %#.16llx %#llx",
955+ pr_devel("cxl_map_adapter_regs: p1: %#016llx %#llx, p2: %#016llx %#llx",
897956 p1_base(dev), p1_size(dev), p2_base(dev), p2_size(dev));
898957
899958 if (!(adapter->p1_mmio = ioremap(p1_base(dev), p1_size(dev))))
@@ -917,10 +976,16 @@ err1: · 17 unmodified lines
917976
918977 static void cxl_unmap_adapter_regs(struct cxl *adapter)
919978 {
920− if (adapter->p1_mmio)
979+ if (adapter->p1_mmio) {
921980 iounmap(adapter->p1_mmio);
922− if (adapter->p2_mmio)
981+ adapter->p1_mmio = NULL;
982+ pci_release_region(to_pci_dev(adapter->dev.parent), 2);
983+ }
984+ if (adapter->p2_mmio) {
923985 iounmap(adapter->p2_mmio);
986+ adapter->p2_mmio = NULL;
987+ pci_release_region(to_pci_dev(adapter->dev.parent), 0);
988+ }
924989 }
925990
926991 static int cxl_read_vsec(struct cxl *adapter, struct pci_dev *dev)
@@ -949,7 +1014,6 @@ static int cxl_read_vsec(struct cxl *adapter, struct pci_dev *dev) · 22 unmodified lines
9491014 CXL_READ_VSEC_BASE_IMAGE(dev, vsec, &adapter->base_image);
9501015 CXL_READ_VSEC_IMAGE_STATE(dev, vsec, &image_state);
9511016 adapter->user_image_loaded = !!(image_state & CXL_VSEC_USER_IMAGE_LOADED);
952− adapter->perst_loads_image = true;
9531017 adapter->perst_select_user = !!(image_state & CXL_VSEC_USER_IMAGE_LOADED);
9541018
9551019 CXL_READ_VSEC_NAFUS(dev, vsec, &adapter->slices);
@@ -1009,81 +1073,138 @@ static void cxl_release_adapter(struct device *dev) · 53 unmodified lines
10091073
10101074 pr_devel("cxl_release_adapter\n");
10111075
1076+ cxl_remove_adapter_nr(adapter);
1077+
10121078 kfree(adapter);
10131079 }
10141080
1015−static struct cxl *cxl_alloc_adapter(struct pci_dev *dev)
1081+static struct cxl *cxl_alloc_adapter(void)
10161082 {
10171083 struct cxl *adapter;
10181084
10191085 if (!(adapter = kzalloc(sizeof(struct cxl), GFP_KERNEL)))
10201086 return NULL;
10211087
1022− adapter->dev.parent = &dev->dev;
1023− adapter->dev.release = cxl_release_adapter;
1024− pci_set_drvdata(dev, adapter);
10251088 spin_lock_init(&adapter->afu_list_lock);
10261089
1090+ if (cxl_alloc_adapter_nr(adapter))
1091+ goto err1;
1092+
1093+ if (dev_set_name(&adapter->dev, "card%i", adapter->adapter_num))
1094+ goto err2;
1095+
10271096 return adapter;
1097+
1098+err2:
1099+ cxl_remove_adapter_nr(adapter);
1100+err1:
1101+ kfree(adapter);
1102+ return NULL;
10281103 }
10291104
1105+#define CXL_PSL_ErrIVTE_tberror (0x1ull << (63-31))
1106+
10301107 static int sanitise_adapter_regs(struct cxl *adapter)
10311108 {
1032− cxl_p1_write(adapter, CXL_PSL_ErrIVTE, 0x0000000000000000);
1109+ /* Clear PSL tberror bit by writing 1 to it */
1110+ cxl_p1_write(adapter, CXL_PSL_ErrIVTE, CXL_PSL_ErrIVTE_tberror);
10331111 return cxl_tlb_slb_invalidate(adapter);
10341112 }
10351113
1036−static struct cxl *cxl_init_adapter(struct pci_dev *dev)
1114+/* This should contain *only* operations that can safely be done in
1115+ * both creation and recovery.
1116+ */
1117+static int cxl_configure_adapter(struct cxl *adapter, struct pci_dev *dev)
10371118 {
1038− struct cxl *adapter;
1039− bool free = true;
10401119 int rc;
10411120
1121+ adapter->dev.parent = &dev->dev;
1122+ adapter->dev.release = cxl_release_adapter;
1123+ pci_set_drvdata(dev, adapter);
10421124
1043− if (!(adapter = cxl_alloc_adapter(dev)))
1044− return ERR_PTR(-ENOMEM);
1125+ rc = pci_enable_device(dev);
1126+ if (rc) {
1127+ dev_err(&dev->dev, "pci_enable_device failed: %i\n", rc);
1128+ return rc;
1129+ }
10451130
10461131 if ((rc = cxl_read_vsec(adapter, dev)))
1047− goto err1;
1132+ return rc;
10481133
10491134 if ((rc = cxl_vsec_looks_ok(adapter, dev)))
1050− goto err1;
1135+ return rc;
10511136
10521137 if ((rc = setup_cxl_bars(dev)))
1053− goto err1;
1138+ return rc;
10541139
10551140 if ((rc = switch_card_to_cxl(dev)))
1056− goto err1;
1057−
1058− if ((rc = cxl_alloc_adapter_nr(adapter)))
1059− goto err1;
1060−
1061− if ((rc = dev_set_name(&adapter->dev, "card%i", adapter->adapter_num)))
1062− goto err2;
1141+ return rc;
10631142
10641143 if ((rc = cxl_update_image_control(adapter)))
1065− goto err2;
1144+ return rc;
10661145
10671146 if ((rc = cxl_map_adapter_regs(adapter, dev)))
1068− goto err2;
1147+ return rc;
10691148
10701149 if ((rc = sanitise_adapter_regs(adapter)))
1071− goto err2;
1150+ goto err;
10721151
10731152 if ((rc = init_implementation_adapter_regs(adapter, dev)))
1074− goto err3;
1153+ goto err;
10751154
10761155 if ((rc = pnv_phb_to_cxl_mode(dev, OPAL_PHB_CAPI_MODE_CAPI)))
1077− goto err3;
1156+ goto err;
10781157
10791158 /* If recovery happened, the last step is to turn on snooping.
10801159 * In the non-recovery case this has no effect */
1081− if ((rc = pnv_phb_to_cxl_mode(dev, OPAL_PHB_CAPI_MODE_SNOOP_ON))) {
1082− goto err3;
1083− }
1160+ if ((rc = pnv_phb_to_cxl_mode(dev, OPAL_PHB_CAPI_MODE_SNOOP_ON)))
1161+ goto err;
1162+
1163+ if ((rc = cxl_setup_psl_timebase(adapter, dev)))
1164+ goto err;
10841165
10851166 if ((rc = cxl_register_psl_err_irq(adapter)))
1086− goto err3;
1167+ goto err;
1168+
1169+ return 0;
1170+
1171+err:
1172+ cxl_unmap_adapter_regs(adapter);
1173+ return rc;
1174+
1175+}
1176+
1177+static void cxl_deconfigure_adapter(struct cxl *adapter)
1178+{
1179+ struct pci_dev *pdev = to_pci_dev(adapter->dev.parent);
1180+
1181+ cxl_release_psl_err_irq(adapter);
1182+ cxl_unmap_adapter_regs(adapter);
1183+
1184+ pci_disable_device(pdev);
1185+}
1186+
1187+static struct cxl *cxl_init_adapter(struct pci_dev *dev)
1188+{
1189+ struct cxl *adapter;
1190+ int rc;
1191+
1192+ adapter = cxl_alloc_adapter();
1193+ if (!adapter)
1194+ return ERR_PTR(-ENOMEM);
1195+
1196+ /* Set defaults for parameters which need to persist over
1197+ * configure/reconfigure
1198+ */
1199+ adapter->perst_loads_image = true;
1200+ adapter->perst_same_image = false;
1201+
1202+ rc = cxl_configure_adapter(adapter, dev);
1203+ if (rc) {
1204+ pci_disable_device(dev);
1205+ cxl_release_adapter(&adapter->dev);
1206+ return ERR_PTR(rc);
1207+ }
10871208
10881209 /* Don't care if this one fails: */
10891210 cxl_debugfs_adapter_add(adapter);
@@ -1101,37 +1222,25 @@ static struct cxl *cxl_init_adapter(struct pci_dev *dev) · 11 unmodified lines
11011222 return adapter;
11021223
11031224 err_put1:
1104− device_unregister(&adapter->dev);
1105− free = false;
1225+ /* This should mirror cxl_remove_adapter, except without the
1226+ * sysfs parts
1227+ */
11061228 cxl_debugfs_adapter_remove(adapter);
1107− cxl_release_psl_err_irq(adapter);
1108−err3:
1109− cxl_unmap_adapter_regs(adapter);
1110−err2:
1111− cxl_remove_adapter_nr(adapter);
1112−err1:
1113− if (free)
1114− kfree(adapter);
1229+ cxl_deconfigure_adapter(adapter);
1230+ device_unregister(&adapter->dev);
11151231 return ERR_PTR(rc);
11161232 }
11171233
11181234 static void cxl_remove_adapter(struct cxl *adapter)
11191235 {
1120− struct pci_dev *pdev = to_pci_dev(adapter->dev.parent);
1121−
1122− pr_devel("cxl_release_adapter\n");
1236+ pr_devel("cxl_remove_adapter\n");
11231237
11241238 cxl_sysfs_adapter_remove(adapter);
11251239 cxl_debugfs_adapter_remove(adapter);
1126− cxl_release_psl_err_irq(adapter);
1127− cxl_unmap_adapter_regs(adapter);
1128− cxl_remove_adapter_nr(adapter);
11291240
1130− device_unregister(&adapter->dev);
1241+ cxl_deconfigure_adapter(adapter);
11311242
1132− pci_release_region(pdev, 0);
1133− pci_release_region(pdev, 2);
1134− pci_disable_device(pdev);
1243+ device_unregister(&adapter->dev);
11351244 }
11361245
11371246 static int cxl_probe(struct pci_dev *dev, const struct pci_device_id *id)
@@ -1145,21 +1254,21 @@ static int cxl_probe(struct pci_dev *dev, const struct pci_device_id *id) · 7 unmodified lines
11451254 if (cxl_verbose)
11461255 dump_cxl_config_space(dev);
11471256
1148− if ((rc = pci_enable_device(dev))) {
1149− dev_err(&dev->dev, "pci_enable_device failed: %i\n", rc);
1150− return rc;
1151− }
1152−
11531257 adapter = cxl_init_adapter(dev);
11541258 if (IS_ERR(adapter)) {
11551259 dev_err(&dev->dev, "cxl_init_adapter failed: %li\n", PTR_ERR(adapter));
1156− pci_disable_device(dev);
11571260 return PTR_ERR(adapter);
11581261 }
11591262
11601263 for (slice = 0; slice < adapter->slices; slice++) {
1161− if ((rc = cxl_init_afu(adapter, slice, dev)))
1264+ if ((rc = cxl_init_afu(adapter, slice, dev))) {
11621265 dev_err(&dev->dev, "AFU %i failed to initialise: %i\n", slice, rc);
1266+ continue;
1267+ }
1268+
1269+ rc = cxl_afu_select_best_mode(adapter->afu[slice]);
1270+ if (rc)
1271+ dev_err(&dev->dev, "AFU %i failed to start: %i\n", slice, rc);
11631272 }
11641273
11651274 return 0;
@@ -1183,10 +1292,262 @@ static void cxl_remove(struct pci_dev *dev) · 17 unmodified lines
11831292 cxl_remove_adapter(adapter);
11841293 }
11851294
1295+static pci_ers_result_t cxl_vphb_error_detected(struct cxl_afu *afu,
1296+ pci_channel_state_t state)
1297+{
1298+ struct pci_dev *afu_dev;
1299+ pci_ers_result_t result = PCI_ERS_RESULT_NEED_RESET;
1300+ pci_ers_result_t afu_result = PCI_ERS_RESULT_NEED_RESET;
1301+
1302+ /* There should only be one entry, but go through the list
1303+ * anyway
1304+ */
1305+ list_for_each_entry(afu_dev, &afu->phb->bus->devices, bus_list) {
1306+ if (!afu_dev->driver)
1307+ continue;
1308+
1309+ afu_dev->error_state = state;
1310+
1311+ if (afu_dev->driver->err_handler)
1312+ afu_result = afu_dev->driver->err_handler->error_detected(afu_dev,
1313+ state);
1314+ /* Disconnect trumps all, NONE trumps NEED_RESET */
1315+ if (afu_result == PCI_ERS_RESULT_DISCONNECT)
1316+ result = PCI_ERS_RESULT_DISCONNECT;
1317+ else if ((afu_result == PCI_ERS_RESULT_NONE) &&
1318+ (result == PCI_ERS_RESULT_NEED_RESET))
1319+ result = PCI_ERS_RESULT_NONE;
1320+ }
1321+ return result;
1322+}
1323+
1324+static pci_ers_result_t cxl_pci_error_detected(struct pci_dev *pdev,
1325+ pci_channel_state_t state)
1326+{
1327+ struct cxl *adapter = pci_get_drvdata(pdev);
1328+ struct cxl_afu *afu;
1329+ pci_ers_result_t result = PCI_ERS_RESULT_NEED_RESET;
1330+ int i;
1331+
1332+ /* At this point, we could still have an interrupt pending.
1333+ * Let's try to get them out of the way before they do
1334+ * anything we don't like.
1335+ */
1336+ schedule();
1337+
1338+ /* If we're permanently dead, give up. */
1339+ if (state == pci_channel_io_perm_failure) {
1340+ /* Tell the AFU drivers; but we don't care what they
1341+ * say, we're going away.
1342+ */
1343+ for (i = 0; i < adapter->slices; i++) {
1344+ afu = adapter->afu[i];
1345+ cxl_vphb_error_detected(afu, state);
1346+ }
1347+ return PCI_ERS_RESULT_DISCONNECT;
1348+ }
1349+
1350+ /* Are we reflashing?
1351+ *
1352+ * If we reflash, we could come back as something entirely
1353+ * different, including a non-CAPI card. As such, by default
1354+ * we don't participate in the process. We'll be unbound and
1355+ * the slot re-probed. (TODO: check EEH doesn't blindly rebind
1356+ * us!)
1357+ *
1358+ * However, this isn't the entire story: for reliablity
1359+ * reasons, we usually want to reflash the FPGA on PERST in
1360+ * order to get back to a more reliable known-good state.
1361+ *
1362+ * This causes us a bit of a problem: if we reflash we can't
1363+ * trust that we'll come back the same - we could have a new
1364+ * image and been PERSTed in order to load that
1365+ * image. However, most of the time we actually *will* come
1366+ * back the same - for example a regular EEH event.
1367+ *
1368+ * Therefore, we allow the user to assert that the image is
1369+ * indeed the same and that we should continue on into EEH
1370+ * anyway.
1371+ */
1372+ if (adapter->perst_loads_image && !adapter->perst_same_image) {
1373+ /* TODO take the PHB out of CXL mode */
1374+ dev_info(&pdev->dev, "reflashing, so opting out of EEH!\n");
1375+ return PCI_ERS_RESULT_NONE;
1376+ }
1377+
1378+ /*
1379+ * At this point, we want to try to recover. We'll always
1380+ * need a complete slot reset: we don't trust any other reset.
1381+ *
1382+ * Now, we go through each AFU:
1383+ * - We send the driver, if bound, an error_detected callback.
1384+ * We expect it to clean up, but it can also tell us to give
1385+ * up and permanently detach the card. To simplify things, if
1386+ * any bound AFU driver doesn't support EEH, we give up on EEH.
1387+ *
1388+ * - We detach all contexts associated with the AFU. This
1389+ * does not free them, but puts them into a CLOSED state
1390+ * which causes any the associated files to return useful
1391+ * errors to userland. It also unmaps, but does not free,
1392+ * any IRQs.
1393+ *
1394+ * - We clean up our side: releasing and unmapping resources we hold
1395+ * so we can wire them up again when the hardware comes back up.
1396+ *
1397+ * Driver authors should note:
1398+ *
1399+ * - Any contexts you create in your kernel driver (except
1400+ * those associated with anonymous file descriptors) are
1401+ * your responsibility to free and recreate. Likewise with
1402+ * any attached resources.
1403+ *
1404+ * - We will take responsibility for re-initialising the
1405+ * device context (the one set up for you in
1406+ * cxl_pci_enable_device_hook and accessed through
1407+ * cxl_get_context). If you've attached IRQs or other
1408+ * resources to it, they remains yours to free.
1409+ *
1410+ * You can call the same functions to release resources as you
1411+ * normally would: we make sure that these functions continue
1412+ * to work when the hardware is down.
1413+ *
1414+ * Two examples:
1415+ *
1416+ * 1) If you normally free all your resources at the end of
1417+ * each request, or if you use anonymous FDs, your
1418+ * error_detected callback can simply set a flag to tell
1419+ * your driver not to start any new calls. You can then
1420+ * clear the flag in the resume callback.
1421+ *
1422+ * 2) If you normally allocate your resources on startup:
1423+ * * Set a flag in error_detected as above.
1424+ * * Let CXL detach your contexts.
1425+ * * In slot_reset, free the old resources and allocate new ones.
1426+ * * In resume, clear the flag to allow things to start.
1427+ */
1428+ for (i = 0; i < adapter->slices; i++) {
1429+ afu = adapter->afu[i];
1430+
1431+ result = cxl_vphb_error_detected(afu, state);
1432+
1433+ /* Only continue if everyone agrees on NEED_RESET */
1434+ if (result != PCI_ERS_RESULT_NEED_RESET)
1435+ return result;
1436+
1437+ cxl_context_detach_all(afu);
1438+ cxl_afu_deactivate_mode(afu);
1439+ cxl_deconfigure_afu(afu);
1440+ }
1441+ cxl_deconfigure_adapter(adapter);
1442+
1443+ return result;
1444+}
1445+
1446+static pci_ers_result_t cxl_pci_slot_reset(struct pci_dev *pdev)
1447+{
1448+ struct cxl *adapter = pci_get_drvdata(pdev);
1449+ struct cxl_afu *afu;
1450+ struct cxl_context *ctx;
1451+ struct pci_dev *afu_dev;
1452+ pci_ers_result_t afu_result = PCI_ERS_RESULT_RECOVERED;
1453+ pci_ers_result_t result = PCI_ERS_RESULT_RECOVERED;
1454+ int i;
1455+
1456+ if (cxl_configure_adapter(adapter, pdev))
1457+ goto err;
1458+
1459+ for (i = 0; i < adapter->slices; i++) {
1460+ afu = adapter->afu[i];
1461+
1462+ if (cxl_configure_afu(afu, adapter, pdev))
1463+ goto err;
1464+
1465+ if (cxl_afu_select_best_mode(afu))
1466+ goto err;
1467+
1468+ cxl_pci_vphb_reconfigure(afu);
1469+
1470+ list_for_each_entry(afu_dev, &afu->phb->bus->devices, bus_list) {
1471+ /* Reset the device context.
1472+ * TODO: make this less disruptive
1473+ */
1474+ ctx = cxl_get_context(afu_dev);
1475+
1476+ if (ctx && cxl_release_context(ctx))
1477+ goto err;
1478+
1479+ ctx = cxl_dev_context_init(afu_dev);
1480+ if (!ctx)
1481+ goto err;
1482+
1483+ afu_dev->dev.archdata.cxl_ctx = ctx;
1484+
1485+ if (cxl_afu_check_and_enable(afu))
1486+ goto err;
1487+
1488+ afu_dev->error_state = pci_channel_io_normal;
1489+
1490+ /* If there's a driver attached, allow it to
1491+ * chime in on recovery. Drivers should check
1492+ * if everything has come back OK, but
1493+ * shouldn't start new work until we call
1494+ * their resume function.
1495+ */
1496+ if (!afu_dev->driver)
1497+ continue;
1498+
1499+ if (afu_dev->driver->err_handler &&
1500+ afu_dev->driver->err_handler->slot_reset)
1501+ afu_result = afu_dev->driver->err_handler->slot_reset(afu_dev);
1502+
1503+ if (afu_result == PCI_ERS_RESULT_DISCONNECT)
1504+ result = PCI_ERS_RESULT_DISCONNECT;
1505+ }
1506+ }
1507+ return result;
1508+
1509+err:
1510+ /* All the bits that happen in both error_detected and cxl_remove
1511+ * should be idempotent, so we don't need to worry about leaving a mix
1512+ * of unconfigured and reconfigured resources.
1513+ */
1514+ dev_err(&pdev->dev, "EEH recovery failed. Asking to be disconnected.\n");
1515+ return PCI_ERS_RESULT_DISCONNECT;
1516+}
1517+
1518+static void cxl_pci_resume(struct pci_dev *pdev)
1519+{
1520+ struct cxl *adapter = pci_get_drvdata(pdev);
1521+ struct cxl_afu *afu;
1522+ struct pci_dev *afu_dev;
1523+ int i;
1524+
1525+ /* Everything is back now. Drivers should restart work now.
1526+ * This is not the place to be checking if everything came back up
1527+ * properly, because there's no return value: do that in slot_reset.
1528+ */
1529+ for (i = 0; i < adapter->slices; i++) {
1530+ afu = adapter->afu[i];
1531+
1532+ list_for_each_entry(afu_dev, &afu->phb->bus->devices, bus_list) {
1533+ if (afu_dev->driver && afu_dev->driver->err_handler &&
1534+ afu_dev->driver->err_handler->resume)
1535+ afu_dev->driver->err_handler->resume(afu_dev);
1536+ }
1537+ }
1538+}
1539+
1540+static const struct pci_error_handlers cxl_err_handler = {
1541+ .error_detected = cxl_pci_error_detected,
1542+ .slot_reset = cxl_pci_slot_reset,
1543+ .resume = cxl_pci_resume,
1544+};
1545+
11861546 struct pci_driver cxl_pci_driver = {
11871547 .name = "cxl-pci",
11881548 .id_table = cxl_pci_tbl,
11891549 .probe = cxl_probe,
11901550 .remove = cxl_remove,
11911551 .shutdown = cxl_remove,
1552+ .err_handler = &cxl_err_handler,
11921553 };
drivers/misc/cxl/sysfs.c+26−0
@@ -112,12 +112,38 @@ static ssize_t load_image_on_perst_store(struct device *device, · 111 unmodified lines
112112 return count;
113113 }
114114
115+static ssize_t perst_reloads_same_image_show(struct device *device,
116+ struct device_attribute *attr,
117+ char *buf)
118+{
119+ struct cxl *adapter = to_cxl_adapter(device);
120+
121+ return scnprintf(buf, PAGE_SIZE, "%i\n", adapter->perst_same_image);
122+}
123+
124+static ssize_t perst_reloads_same_image_store(struct device *device,
125+ struct device_attribute *attr,
126+ const char *buf, size_t count)
127+{
128+ struct cxl *adapter = to_cxl_adapter(device);
129+ int rc;
130+ int val;
131+
132+ rc = sscanf(buf, "%i", &val);
133+ if ((rc != 1) || !(val == 1 || val == 0))
134+ return -EINVAL;
135+
136+ adapter->perst_same_image = (val == 1 ? true : false);
137+ return count;
138+}
139+
115140 static struct device_attribute adapter_attrs[] = {
116141 __ATTR_RO(caia_version),
117142 __ATTR_RO(psl_revision),
118143 __ATTR_RO(base_image),
119144 __ATTR_RO(image_loaded),
120145 __ATTR_RW(load_image_on_perst),
146+ __ATTR_RW(perst_reloads_same_image),
121147 __ATTR(reset, S_IWUSR, NULL, reset_adapter_store),
122148 };
123149
drivers/misc/cxl/trace.h+5−5
@@ -105,7 +105,7 @@ TRACE_EVENT(cxl_attach, · 104 unmodified lines
105105 __entry->num_interrupts = num_interrupts;
106106 ),
107107
108− TP_printk("afu%i.%i pid=%i pe=%i wed=0x%.16llx irqs=%i amr=0x%llx",
108+ TP_printk("afu%i.%i pid=%i pe=%i wed=0x%016llx irqs=%i amr=0x%llx",
109109 __entry->card,
110110 __entry->afu,
111111 __entry->pid,
@@ -177,7 +177,7 @@ TRACE_EVENT(cxl_psl_irq, · 65 unmodified lines
177177 __entry->dar = dar;
178178 ),
179179
180− TP_printk("afu%i.%i pe=%i irq=%i dsisr=%s dar=0x%.16llx",
180+ TP_printk("afu%i.%i pe=%i irq=%i dsisr=%s dar=0x%016llx",
181181 __entry->card,
182182 __entry->afu,
183183 __entry->pe,
@@ -233,7 +233,7 @@ TRACE_EVENT(cxl_ste_miss, · 49 unmodified lines
233233 __entry->dar = dar;
234234 ),
235235
236− TP_printk("afu%i.%i pe=%i dar=0x%.16llx",
236+ TP_printk("afu%i.%i pe=%i dar=0x%016llx",
237237 __entry->card,
238238 __entry->afu,
239239 __entry->pe,
@@ -264,7 +264,7 @@ TRACE_EVENT(cxl_ste_write, · 24 unmodified lines
264264 __entry->v = v;
265265 ),
266266
267− TP_printk("afu%i.%i pe=%i SSTE[%i] E=0x%.16llx V=0x%.16llx",
267+ TP_printk("afu%i.%i pe=%i SSTE[%i] E=0x%016llx V=0x%016llx",
268268 __entry->card,
269269 __entry->afu,
270270 __entry->pe,
@@ -295,7 +295,7 @@ TRACE_EVENT(cxl_pte_miss, · 24 unmodified lines
295295 __entry->dar = dar;
296296 ),
297297
298− TP_printk("afu%i.%i pe=%i dsisr=%s dar=0x%.16llx",
298+ TP_printk("afu%i.%i pe=%i dsisr=%s dar=0x%016llx",
299299 __entry->card,
300300 __entry->afu,
301301 __entry->pe,
drivers/misc/cxl/vphb.c+34−0
@@ -138,6 +138,26 @@ static int cxl_pcie_config_info(struct pci_bus *bus, unsigned int devfn, · 137 unmodified lines
138138 return 0;
139139 }
140140
141+
142+static inline bool cxl_config_link_ok(struct pci_bus *bus)
143+{
144+ struct pci_controller *phb;
145+ struct cxl_afu *afu;
146+
147+ /* Config space IO is based on phb->cfg_addr, which is based on
148+ * afu_desc_mmio. This isn't safe to read/write when the link
149+ * goes down, as EEH tears down MMIO space.
150+ *
151+ * Check if the link is OK before proceeding.
152+ */
153+
154+ phb = pci_bus_to_host(bus);
155+ if (phb == NULL)
156+ return false;
157+ afu = (struct cxl_afu *)phb->private_data;
158+ return cxl_adapter_link_ok(afu->adapter);
159+}
160+
141161 static int cxl_pcie_read_config(struct pci_bus *bus, unsigned int devfn,
142162 int offset, int len, u32 *val)
143163 {
@@ -150,6 +170,9 @@ static int cxl_pcie_read_config(struct pci_bus *bus, unsigned int devfn, · 6 unmodified lines
150170 if (rc)
151171 return rc;
152172
173+ if (!cxl_config_link_ok(bus))
174+ return PCIBIOS_DEVICE_NOT_FOUND;
175+
153176 /* Can only read 32 bits */
154177 *val = (in_le32(ioaddr) >> shift) & mask;
155178 return PCIBIOS_SUCCESSFUL;
@@ -167,6 +190,9 @@ static int cxl_pcie_write_config(struct pci_bus *bus, unsigned int devfn, · 11 unmodified lines
167190 if (rc)
168191 return rc;
169192
193+ if (!cxl_config_link_ok(bus))
194+ return PCIBIOS_DEVICE_NOT_FOUND;
195+
170196 /* Can only write 32 bits so do read-modify-write */
171197 mask <<= shift;
172198 val <<= shift;
@@ -240,6 +266,14 @@ int cxl_pci_vphb_add(struct cxl_afu *afu) · 67 unmodified lines
240266 return 0;
241267 }
242268
269+void cxl_pci_vphb_reconfigure(struct cxl_afu *afu)
270+{
271+ /* When we are reconfigured, the AFU's MMIO space is unmapped
272+ * and remapped. We need to reflect this in the PHB's view of
273+ * the world.
274+ */
275+ afu->phb->cfg_addr = afu->afu_desc_mmio + afu->crs_offset;
276+}
243277
244278 void cxl_pci_vphb_remove(struct cxl_afu *afu)
245279 {
drivers/mtd/nand/fsl_ifc_nand.c+130−128
@@ -238,8 +238,8 @@ static void set_addr(struct mtd_info *mtd, int column, int page_addr, int oob) · 237 unmodified lines
238238
239239 ifc_nand_ctrl->page = page_addr;
240240 /* Program ROW0/COL0 */
241− iowrite32be(page_addr, &ifc->ifc_nand.row0);
242− iowrite32be((oob ? IFC_NAND_COL_MS : 0) | column, &ifc->ifc_nand.col0);
241+ ifc_out32(page_addr, &ifc->ifc_nand.row0);
242+ ifc_out32((oob ? IFC_NAND_COL_MS : 0) | column, &ifc->ifc_nand.col0);
243243
244244 buf_num = page_addr & priv->bufnum_mask;
245245
@@ -301,19 +301,19 @@ static void fsl_ifc_run_command(struct mtd_info *mtd) · 55 unmodified lines
301301 int i;
302302
303303 /* set the chip select for NAND Transaction */
304− iowrite32be(priv->bank << IFC_NAND_CSEL_SHIFT,
305− &ifc->ifc_nand.nand_csel);
304+ ifc_out32(priv->bank << IFC_NAND_CSEL_SHIFT,
305+ &ifc->ifc_nand.nand_csel);
306306
307307 dev_vdbg(priv->dev,
308308 "%s: fir0=%08x fcr0=%08x\n",
309309 __func__,
310− ioread32be(&ifc->ifc_nand.nand_fir0),
311− ioread32be(&ifc->ifc_nand.nand_fcr0));
310+ ifc_in32(&ifc->ifc_nand.nand_fir0),
311+ ifc_in32(&ifc->ifc_nand.nand_fcr0));
312312
313313 ctrl->nand_stat = 0;
314314
315315 /* start read/write seq */
316− iowrite32be(IFC_NAND_SEQ_STRT_FIR_STRT, &ifc->ifc_nand.nandseq_strt);
316+ ifc_out32(IFC_NAND_SEQ_STRT_FIR_STRT, &ifc->ifc_nand.nandseq_strt);
317317
318318 /* wait for command complete flag or timeout */
319319 wait_event_timeout(ctrl->nand_wait, ctrl->nand_stat,
@@ -336,7 +336,7 @@ static void fsl_ifc_run_command(struct mtd_info *mtd) · 16 unmodified lines
336336 int sector_end = sector + chip->ecc.steps - 1;
337337
338338 for (i = sector / 4; i <= sector_end / 4; i++)
339− eccstat[i] = ioread32be(&ifc->ifc_nand.nand_eccstat[i]);
339+ eccstat[i] = ifc_in32(&ifc->ifc_nand.nand_eccstat[i]);
340340
341341 for (i = sector; i <= sector_end; i++) {
342342 errors = check_read_ecc(mtd, ctrl, eccstat, i);
@@ -376,33 +376,33 @@ static void fsl_ifc_do_read(struct nand_chip *chip, · 33 unmodified lines
376376
377377 /* Program FIR/IFC_NAND_FCR0 for Small/Large page */
378378 if (mtd->writesize > 512) {
379− iowrite32be((IFC_FIR_OP_CW0 << IFC_NAND_FIR0_OP0_SHIFT) |
380− (IFC_FIR_OP_CA0 << IFC_NAND_FIR0_OP1_SHIFT) |
381− (IFC_FIR_OP_RA0 << IFC_NAND_FIR0_OP2_SHIFT) |
382− (IFC_FIR_OP_CMD1 << IFC_NAND_FIR0_OP3_SHIFT) |
383− (IFC_FIR_OP_RBCD << IFC_NAND_FIR0_OP4_SHIFT),
384− &ifc->ifc_nand.nand_fir0);
385− iowrite32be(0x0, &ifc->ifc_nand.nand_fir1);
386−
387− iowrite32be((NAND_CMD_READ0 << IFC_NAND_FCR0_CMD0_SHIFT) |
388− (NAND_CMD_READSTART << IFC_NAND_FCR0_CMD1_SHIFT),
389− &ifc->ifc_nand.nand_fcr0);
379+ ifc_out32((IFC_FIR_OP_CW0 << IFC_NAND_FIR0_OP0_SHIFT) |
380+ (IFC_FIR_OP_CA0 << IFC_NAND_FIR0_OP1_SHIFT) |
381+ (IFC_FIR_OP_RA0 << IFC_NAND_FIR0_OP2_SHIFT) |
382+ (IFC_FIR_OP_CMD1 << IFC_NAND_FIR0_OP3_SHIFT) |
383+ (IFC_FIR_OP_RBCD << IFC_NAND_FIR0_OP4_SHIFT),
384+ &ifc->ifc_nand.nand_fir0);
385+ ifc_out32(0x0, &ifc->ifc_nand.nand_fir1);
386+
387+ ifc_out32((NAND_CMD_READ0 << IFC_NAND_FCR0_CMD0_SHIFT) |
388+ (NAND_CMD_READSTART << IFC_NAND_FCR0_CMD1_SHIFT),
389+ &ifc->ifc_nand.nand_fcr0);
390390 } else {
391− iowrite32be((IFC_FIR_OP_CW0 << IFC_NAND_FIR0_OP0_SHIFT) |
392− (IFC_FIR_OP_CA0 << IFC_NAND_FIR0_OP1_SHIFT) |
393− (IFC_FIR_OP_RA0 << IFC_NAND_FIR0_OP2_SHIFT) |
394− (IFC_FIR_OP_RBCD << IFC_NAND_FIR0_OP3_SHIFT),
395− &ifc->ifc_nand.nand_fir0);
396− iowrite32be(0x0, &ifc->ifc_nand.nand_fir1);
391+ ifc_out32((IFC_FIR_OP_CW0 << IFC_NAND_FIR0_OP0_SHIFT) |
392+ (IFC_FIR_OP_CA0 << IFC_NAND_FIR0_OP1_SHIFT) |
393+ (IFC_FIR_OP_RA0 << IFC_NAND_FIR0_OP2_SHIFT) |
394+ (IFC_FIR_OP_RBCD << IFC_NAND_FIR0_OP3_SHIFT),
395+ &ifc->ifc_nand.nand_fir0);
396+ ifc_out32(0x0, &ifc->ifc_nand.nand_fir1);
397397
398398 if (oob)
399− iowrite32be(NAND_CMD_READOOB <<
400− IFC_NAND_FCR0_CMD0_SHIFT,
401− &ifc->ifc_nand.nand_fcr0);
399+ ifc_out32(NAND_CMD_READOOB <<
400+ IFC_NAND_FCR0_CMD0_SHIFT,
401+ &ifc->ifc_nand.nand_fcr0);
402402 else
403− iowrite32be(NAND_CMD_READ0 <<
404− IFC_NAND_FCR0_CMD0_SHIFT,
405− &ifc->ifc_nand.nand_fcr0);
403+ ifc_out32(NAND_CMD_READ0 <<
404+ IFC_NAND_FCR0_CMD0_SHIFT,
405+ &ifc->ifc_nand.nand_fcr0);
406406 }
407407 }
408408
@@ -422,7 +422,7 @@ static void fsl_ifc_cmdfunc(struct mtd_info *mtd, unsigned int command, · 13 unmodified lines
422422 switch (command) {
423423 /* READ0 read the entire buffer to use hardware ECC. */
424424 case NAND_CMD_READ0:
425− iowrite32be(0, &ifc->ifc_nand.nand_fbcr);
425+ ifc_out32(0, &ifc->ifc_nand.nand_fbcr);
426426 set_addr(mtd, 0, page_addr, 0);
427427
428428 ifc_nand_ctrl->read_bytes = mtd->writesize + mtd->oobsize;
@@ -437,7 +437,7 @@ static void fsl_ifc_cmdfunc(struct mtd_info *mtd, unsigned int command, · 8 unmodified lines
437437
438438 /* READOOB reads only the OOB because no ECC is performed. */
439439 case NAND_CMD_READOOB:
440− iowrite32be(mtd->oobsize - column, &ifc->ifc_nand.nand_fbcr);
440+ ifc_out32(mtd->oobsize - column, &ifc->ifc_nand.nand_fbcr);
441441 set_addr(mtd, column, page_addr, 1);
442442
443443 ifc_nand_ctrl->read_bytes = mtd->writesize + mtd->oobsize;
@@ -453,19 +453,19 @@ static void fsl_ifc_cmdfunc(struct mtd_info *mtd, unsigned int command, · 9 unmodified lines
453453 if (command == NAND_CMD_PARAM)
454454 timing = IFC_FIR_OP_RBCD;
455455
456− iowrite32be((IFC_FIR_OP_CW0 << IFC_NAND_FIR0_OP0_SHIFT) |
457− (IFC_FIR_OP_UA << IFC_NAND_FIR0_OP1_SHIFT) |
458− (timing << IFC_NAND_FIR0_OP2_SHIFT),
459− &ifc->ifc_nand.nand_fir0);
460− iowrite32be(command << IFC_NAND_FCR0_CMD0_SHIFT,
461− &ifc->ifc_nand.nand_fcr0);
462− iowrite32be(column, &ifc->ifc_nand.row3);
456+ ifc_out32((IFC_FIR_OP_CW0 << IFC_NAND_FIR0_OP0_SHIFT) |
457+ (IFC_FIR_OP_UA << IFC_NAND_FIR0_OP1_SHIFT) |
458+ (timing << IFC_NAND_FIR0_OP2_SHIFT),
459+ &ifc->ifc_nand.nand_fir0);
460+ ifc_out32(command << IFC_NAND_FCR0_CMD0_SHIFT,
461+ &ifc->ifc_nand.nand_fcr0);
462+ ifc_out32(column, &ifc->ifc_nand.row3);
463463
464464 /*
465465 * although currently it's 8 bytes for READID, we always read
466466 * the maximum 256 bytes(for PARAM)
467467 */
468− iowrite32be(256, &ifc->ifc_nand.nand_fbcr);
468+ ifc_out32(256, &ifc->ifc_nand.nand_fbcr);
469469 ifc_nand_ctrl->read_bytes = 256;
470470
471471 set_addr(mtd, 0, 0, 0);
@@ -480,16 +480,16 @@ static void fsl_ifc_cmdfunc(struct mtd_info *mtd, unsigned int command, · 8 unmodified lines
480480
481481 /* ERASE2 uses the block and page address from ERASE1 */
482482 case NAND_CMD_ERASE2:
483− iowrite32be((IFC_FIR_OP_CW0 << IFC_NAND_FIR0_OP0_SHIFT) |
484− (IFC_FIR_OP_RA0 << IFC_NAND_FIR0_OP1_SHIFT) |
485− (IFC_FIR_OP_CMD1 << IFC_NAND_FIR0_OP2_SHIFT),
486− &ifc->ifc_nand.nand_fir0);
483+ ifc_out32((IFC_FIR_OP_CW0 << IFC_NAND_FIR0_OP0_SHIFT) |
484+ (IFC_FIR_OP_RA0 << IFC_NAND_FIR0_OP1_SHIFT) |
485+ (IFC_FIR_OP_CMD1 << IFC_NAND_FIR0_OP2_SHIFT),
486+ &ifc->ifc_nand.nand_fir0);
487487
488− iowrite32be((NAND_CMD_ERASE1 << IFC_NAND_FCR0_CMD0_SHIFT) |
489− (NAND_CMD_ERASE2 << IFC_NAND_FCR0_CMD1_SHIFT),
490− &ifc->ifc_nand.nand_fcr0);
488+ ifc_out32((NAND_CMD_ERASE1 << IFC_NAND_FCR0_CMD0_SHIFT) |
489+ (NAND_CMD_ERASE2 << IFC_NAND_FCR0_CMD1_SHIFT),
490+ &ifc->ifc_nand.nand_fcr0);
491491
492− iowrite32be(0, &ifc->ifc_nand.nand_fbcr);
492+ ifc_out32(0, &ifc->ifc_nand.nand_fbcr);
493493 ifc_nand_ctrl->read_bytes = 0;
494494 fsl_ifc_run_command(mtd);
495495 return;
@@ -506,19 +506,18 @@ static void fsl_ifc_cmdfunc(struct mtd_info *mtd, unsigned int command, · 10 unmodified lines
506506 (NAND_CMD_STATUS << IFC_NAND_FCR0_CMD1_SHIFT) |
507507 (NAND_CMD_PAGEPROG << IFC_NAND_FCR0_CMD2_SHIFT);
508508
509− iowrite32be(
510− (IFC_FIR_OP_CW0 << IFC_NAND_FIR0_OP0_SHIFT) |
511− (IFC_FIR_OP_CA0 << IFC_NAND_FIR0_OP1_SHIFT) |
512− (IFC_FIR_OP_RA0 << IFC_NAND_FIR0_OP2_SHIFT) |
513− (IFC_FIR_OP_WBCD << IFC_NAND_FIR0_OP3_SHIFT) |
514− (IFC_FIR_OP_CMD2 << IFC_NAND_FIR0_OP4_SHIFT),
515− &ifc->ifc_nand.nand_fir0);
516− iowrite32be(
517− (IFC_FIR_OP_CW1 << IFC_NAND_FIR1_OP5_SHIFT) |
518− (IFC_FIR_OP_RDSTAT <<
519− IFC_NAND_FIR1_OP6_SHIFT) |
520− (IFC_FIR_OP_NOP << IFC_NAND_FIR1_OP7_SHIFT),
521− &ifc->ifc_nand.nand_fir1);
509+ ifc_out32(
510+ (IFC_FIR_OP_CW0 << IFC_NAND_FIR0_OP0_SHIFT) |
511+ (IFC_FIR_OP_CA0 << IFC_NAND_FIR0_OP1_SHIFT) |
512+ (IFC_FIR_OP_RA0 << IFC_NAND_FIR0_OP2_SHIFT) |
513+ (IFC_FIR_OP_WBCD << IFC_NAND_FIR0_OP3_SHIFT) |
514+ (IFC_FIR_OP_CMD2 << IFC_NAND_FIR0_OP4_SHIFT),
515+ &ifc->ifc_nand.nand_fir0);
516+ ifc_out32(
517+ (IFC_FIR_OP_CW1 << IFC_NAND_FIR1_OP5_SHIFT) |
518+ (IFC_FIR_OP_RDSTAT << IFC_NAND_FIR1_OP6_SHIFT) |
519+ (IFC_FIR_OP_NOP << IFC_NAND_FIR1_OP7_SHIFT),
520+ &ifc->ifc_nand.nand_fir1);
522521 } else {
523522 nand_fcr0 = ((NAND_CMD_PAGEPROG <<
524523 IFC_NAND_FCR0_CMD1_SHIFT) |
@@ -527,20 +526,19 @@ static void fsl_ifc_cmdfunc(struct mtd_info *mtd, unsigned int command, · 2 unmodified lines
527526 (NAND_CMD_STATUS <<
528527 IFC_NAND_FCR0_CMD3_SHIFT));
529528
530− iowrite32be(
529+ ifc_out32(
531530 (IFC_FIR_OP_CW0 << IFC_NAND_FIR0_OP0_SHIFT) |
532531 (IFC_FIR_OP_CMD2 << IFC_NAND_FIR0_OP1_SHIFT) |
533532 (IFC_FIR_OP_CA0 << IFC_NAND_FIR0_OP2_SHIFT) |
534533 (IFC_FIR_OP_RA0 << IFC_NAND_FIR0_OP3_SHIFT) |
535534 (IFC_FIR_OP_WBCD << IFC_NAND_FIR0_OP4_SHIFT),
536535 &ifc->ifc_nand.nand_fir0);
537− iowrite32be(
538− (IFC_FIR_OP_CMD1 << IFC_NAND_FIR1_OP5_SHIFT) |
539− (IFC_FIR_OP_CW3 << IFC_NAND_FIR1_OP6_SHIFT) |
540− (IFC_FIR_OP_RDSTAT <<
541− IFC_NAND_FIR1_OP7_SHIFT) |
542− (IFC_FIR_OP_NOP << IFC_NAND_FIR1_OP8_SHIFT),
543− &ifc->ifc_nand.nand_fir1);
536+ ifc_out32(
537+ (IFC_FIR_OP_CMD1 << IFC_NAND_FIR1_OP5_SHIFT) |
538+ (IFC_FIR_OP_CW3 << IFC_NAND_FIR1_OP6_SHIFT) |
539+ (IFC_FIR_OP_RDSTAT << IFC_NAND_FIR1_OP7_SHIFT) |
540+ (IFC_FIR_OP_NOP << IFC_NAND_FIR1_OP8_SHIFT),
541+ &ifc->ifc_nand.nand_fir1);
544542
545543 if (column >= mtd->writesize)
546544 nand_fcr0 |=
@@ -555,7 +553,7 @@ static void fsl_ifc_cmdfunc(struct mtd_info *mtd, unsigned int command, · 8 unmodified lines
555553 column -= mtd->writesize;
556554 ifc_nand_ctrl->oob = 1;
557555 }
558− iowrite32be(nand_fcr0, &ifc->ifc_nand.nand_fcr0);
556+ ifc_out32(nand_fcr0, &ifc->ifc_nand.nand_fcr0);
559557 set_addr(mtd, column, page_addr, ifc_nand_ctrl->oob);
560558 return;
561559 }
@@ -563,24 +561,26 @@ static void fsl_ifc_cmdfunc(struct mtd_info *mtd, unsigned int command, · 1 unmodified line
563561 /* PAGEPROG reuses all of the setup from SEQIN and adds the length */
564562 case NAND_CMD_PAGEPROG: {
565563 if (ifc_nand_ctrl->oob) {
566− iowrite32be(ifc_nand_ctrl->index -
567− ifc_nand_ctrl->column,
568− &ifc->ifc_nand.nand_fbcr);
564+ ifc_out32(ifc_nand_ctrl->index -
565+ ifc_nand_ctrl->column,
566+ &ifc->ifc_nand.nand_fbcr);
569567 } else {
570− iowrite32be(0, &ifc->ifc_nand.nand_fbcr);
568+ ifc_out32(0, &ifc->ifc_nand.nand_fbcr);
571569 }
572570
573571 fsl_ifc_run_command(mtd);
574572 return;
575573 }
576574
577− case NAND_CMD_STATUS:
578− iowrite32be((IFC_FIR_OP_CW0 << IFC_NAND_FIR0_OP0_SHIFT) |
579− (IFC_FIR_OP_RB << IFC_NAND_FIR0_OP1_SHIFT),
580− &ifc->ifc_nand.nand_fir0);
581− iowrite32be(NAND_CMD_STATUS << IFC_NAND_FCR0_CMD0_SHIFT,
582− &ifc->ifc_nand.nand_fcr0);
583− iowrite32be(1, &ifc->ifc_nand.nand_fbcr);
575+ case NAND_CMD_STATUS: {
576+ void __iomem *addr;
577+
578+ ifc_out32((IFC_FIR_OP_CW0 << IFC_NAND_FIR0_OP0_SHIFT) |
579+ (IFC_FIR_OP_RB << IFC_NAND_FIR0_OP1_SHIFT),
580+ &ifc->ifc_nand.nand_fir0);
581+ ifc_out32(NAND_CMD_STATUS << IFC_NAND_FCR0_CMD0_SHIFT,
582+ &ifc->ifc_nand.nand_fcr0);
583+ ifc_out32(1, &ifc->ifc_nand.nand_fbcr);
584584 set_addr(mtd, 0, 0, 0);
585585 ifc_nand_ctrl->read_bytes = 1;
586586
@@ -590,17 +590,19 @@ static void fsl_ifc_cmdfunc(struct mtd_info *mtd, unsigned int command, · 3 unmodified lines
590590 * The chip always seems to report that it is
591591 * write-protected, even when it is not.
592592 */
593+ addr = ifc_nand_ctrl->addr;
593594 if (chip->options & NAND_BUSWIDTH_16)
594− setbits16(ifc_nand_ctrl->addr, NAND_STATUS_WP);
595+ ifc_out16(ifc_in16(addr) | (NAND_STATUS_WP), addr);
595596 else
596− setbits8(ifc_nand_ctrl->addr, NAND_STATUS_WP);
597+ ifc_out8(ifc_in8(addr) | (NAND_STATUS_WP), addr);
597598 return;
599+ }
598600
599601 case NAND_CMD_RESET:
600− iowrite32be(IFC_FIR_OP_CW0 << IFC_NAND_FIR0_OP0_SHIFT,
601− &ifc->ifc_nand.nand_fir0);
602− iowrite32be(NAND_CMD_RESET << IFC_NAND_FCR0_CMD0_SHIFT,
603− &ifc->ifc_nand.nand_fcr0);
602+ ifc_out32(IFC_FIR_OP_CW0 << IFC_NAND_FIR0_OP0_SHIFT,
603+ &ifc->ifc_nand.nand_fir0);
604+ ifc_out32(NAND_CMD_RESET << IFC_NAND_FCR0_CMD0_SHIFT,
605+ &ifc->ifc_nand.nand_fcr0);
604606 fsl_ifc_run_command(mtd);
605607 return;
606608
@@ -658,7 +660,7 @@ static uint8_t fsl_ifc_read_byte(struct mtd_info *mtd) · 51 unmodified lines
658660 */
659661 if (ifc_nand_ctrl->index < ifc_nand_ctrl->read_bytes) {
660662 offset = ifc_nand_ctrl->index++;
661− return in_8(ifc_nand_ctrl->addr + offset);
663+ return ifc_in8(ifc_nand_ctrl->addr + offset);
662664 }
663665
664666 dev_err(priv->dev, "%s: beyond end of buffer\n", __func__);
@@ -680,7 +682,7 @@ static uint8_t fsl_ifc_read_byte16(struct mtd_info *mtd) · 15 unmodified lines
680682 * next byte.
681683 */
682684 if (ifc_nand_ctrl->index < ifc_nand_ctrl->read_bytes) {
683− data = in_be16(ifc_nand_ctrl->addr + ifc_nand_ctrl->index);
685+ data = ifc_in16(ifc_nand_ctrl->addr + ifc_nand_ctrl->index);
684686 ifc_nand_ctrl->index += 2;
685687 return (uint8_t) data;
686688 }
@@ -726,18 +728,18 @@ static int fsl_ifc_wait(struct mtd_info *mtd, struct nand_chip *chip) · 39 unmodified lines
726728 u32 nand_fsr;
727729
728730 /* Use READ_STATUS command, but wait for the device to be ready */
729− iowrite32be((IFC_FIR_OP_CW0 << IFC_NAND_FIR0_OP0_SHIFT) |
730− (IFC_FIR_OP_RDSTAT << IFC_NAND_FIR0_OP1_SHIFT),
731− &ifc->ifc_nand.nand_fir0);
732− iowrite32be(NAND_CMD_STATUS << IFC_NAND_FCR0_CMD0_SHIFT,
733− &ifc->ifc_nand.nand_fcr0);
734− iowrite32be(1, &ifc->ifc_nand.nand_fbcr);
731+ ifc_out32((IFC_FIR_OP_CW0 << IFC_NAND_FIR0_OP0_SHIFT) |
732+ (IFC_FIR_OP_RDSTAT << IFC_NAND_FIR0_OP1_SHIFT),
733+ &ifc->ifc_nand.nand_fir0);
734+ ifc_out32(NAND_CMD_STATUS << IFC_NAND_FCR0_CMD0_SHIFT,
735+ &ifc->ifc_nand.nand_fcr0);
736+ ifc_out32(1, &ifc->ifc_nand.nand_fbcr);
735737 set_addr(mtd, 0, 0, 0);
736738 ifc_nand_ctrl->read_bytes = 1;
737739
738740 fsl_ifc_run_command(mtd);
739741
740− nand_fsr = ioread32be(&ifc->ifc_nand.nand_fsr);
742+ nand_fsr = ifc_in32(&ifc->ifc_nand.nand_fsr);
741743
742744 /*
743745 * The chip always seems to report that it is
@@ -829,34 +831,34 @@ static void fsl_ifc_sram_init(struct fsl_ifc_mtd *priv) · 85 unmodified lines
829831 uint32_t cs = priv->bank;
830832
831833 /* Save CSOR and CSOR_ext */
832− csor = ioread32be(&ifc->csor_cs[cs].csor);
833− csor_ext = ioread32be(&ifc->csor_cs[cs].csor_ext);
834+ csor = ifc_in32(&ifc->csor_cs[cs].csor);
835+ csor_ext = ifc_in32(&ifc->csor_cs[cs].csor_ext);
834836
835837 /* chage PageSize 8K and SpareSize 1K*/
836838 csor_8k = (csor & ~(CSOR_NAND_PGS_MASK)) | 0x0018C000;
837− iowrite32be(csor_8k, &ifc->csor_cs[cs].csor);
838− iowrite32be(0x0000400, &ifc->csor_cs[cs].csor_ext);
839+ ifc_out32(csor_8k, &ifc->csor_cs[cs].csor);
840+ ifc_out32(0x0000400, &ifc->csor_cs[cs].csor_ext);
839841
840842 /* READID */
841− iowrite32be((IFC_FIR_OP_CW0 << IFC_NAND_FIR0_OP0_SHIFT) |
842− (IFC_FIR_OP_UA << IFC_NAND_FIR0_OP1_SHIFT) |
843− (IFC_FIR_OP_RB << IFC_NAND_FIR0_OP2_SHIFT),
844− &ifc->ifc_nand.nand_fir0);
845− iowrite32be(NAND_CMD_READID << IFC_NAND_FCR0_CMD0_SHIFT,
846− &ifc->ifc_nand.nand_fcr0);
847− iowrite32be(0x0, &ifc->ifc_nand.row3);
843+ ifc_out32((IFC_FIR_OP_CW0 << IFC_NAND_FIR0_OP0_SHIFT) |
844+ (IFC_FIR_OP_UA << IFC_NAND_FIR0_OP1_SHIFT) |
845+ (IFC_FIR_OP_RB << IFC_NAND_FIR0_OP2_SHIFT),
846+ &ifc->ifc_nand.nand_fir0);
847+ ifc_out32(NAND_CMD_READID << IFC_NAND_FCR0_CMD0_SHIFT,
848+ &ifc->ifc_nand.nand_fcr0);
849+ ifc_out32(0x0, &ifc->ifc_nand.row3);
848850
849− iowrite32be(0x0, &ifc->ifc_nand.nand_fbcr);
851+ ifc_out32(0x0, &ifc->ifc_nand.nand_fbcr);
850852
851853 /* Program ROW0/COL0 */
852− iowrite32be(0x0, &ifc->ifc_nand.row0);
853− iowrite32be(0x0, &ifc->ifc_nand.col0);
854+ ifc_out32(0x0, &ifc->ifc_nand.row0);
855+ ifc_out32(0x0, &ifc->ifc_nand.col0);
854856
855857 /* set the chip select for NAND Transaction */
856− iowrite32be(cs << IFC_NAND_CSEL_SHIFT, &ifc->ifc_nand.nand_csel);
858+ ifc_out32(cs << IFC_NAND_CSEL_SHIFT, &ifc->ifc_nand.nand_csel);
857859
858860 /* start read seq */
859− iowrite32be(IFC_NAND_SEQ_STRT_FIR_STRT, &ifc->ifc_nand.nandseq_strt);
861+ ifc_out32(IFC_NAND_SEQ_STRT_FIR_STRT, &ifc->ifc_nand.nandseq_strt);
860862
861863 /* wait for command complete flag or timeout */
862864 wait_event_timeout(ctrl->nand_wait, ctrl->nand_stat,
@@ -866,8 +868,8 @@ static void fsl_ifc_sram_init(struct fsl_ifc_mtd *priv) · 3 unmodified lines
866868 printk(KERN_ERR "fsl-ifc: Failed to Initialise SRAM\n");
867869
868870 /* Restore CSOR and CSOR_ext */
869− iowrite32be(csor, &ifc->csor_cs[cs].csor);
870− iowrite32be(csor_ext, &ifc->csor_cs[cs].csor_ext);
871+ ifc_out32(csor, &ifc->csor_cs[cs].csor);
872+ ifc_out32(csor_ext, &ifc->csor_cs[cs].csor_ext);
871873 }
872874
873875 static int fsl_ifc_chip_init(struct fsl_ifc_mtd *priv)
@@ -884,7 +886,7 @@ static int fsl_ifc_chip_init(struct fsl_ifc_mtd *priv) · 10 unmodified lines
884886
885887 /* fill in nand_chip structure */
886888 /* set up function call table */
887− if ((ioread32be(&ifc->cspr_cs[priv->bank].cspr)) & CSPR_PORT_SIZE_16)
889+ if ((ifc_in32(&ifc->cspr_cs[priv->bank].cspr)) & CSPR_PORT_SIZE_16)
888890 chip->read_byte = fsl_ifc_read_byte16;
889891 else
890892 chip->read_byte = fsl_ifc_read_byte;
@@ -898,13 +900,13 @@ static int fsl_ifc_chip_init(struct fsl_ifc_mtd *priv) · 7 unmodified lines
898900 chip->bbt_td = &bbt_main_descr;
899901 chip->bbt_md = &bbt_mirror_descr;
900902
901− iowrite32be(0x0, &ifc->ifc_nand.ncfgr);
903+ ifc_out32(0x0, &ifc->ifc_nand.ncfgr);
902904
903905 /* set up nand options */
904906 chip->bbt_options = NAND_BBT_USE_FLASH;
905907 chip->options = NAND_NO_SUBPAGE_WRITE;
906908
907− if (ioread32be(&ifc->cspr_cs[priv->bank].cspr) & CSPR_PORT_SIZE_16) {
909+ if (ifc_in32(&ifc->cspr_cs[priv->bank].cspr) & CSPR_PORT_SIZE_16) {
908910 chip->read_byte = fsl_ifc_read_byte16;
909911 chip->options |= NAND_BUSWIDTH_16;
910912 } else {
@@ -917,7 +919,7 @@ static int fsl_ifc_chip_init(struct fsl_ifc_mtd *priv) · 6 unmodified lines
917919 chip->ecc.read_page = fsl_ifc_read_page;
918920 chip->ecc.write_page = fsl_ifc_write_page;
919921
920− csor = ioread32be(&ifc->csor_cs[priv->bank].csor);
922+ csor = ifc_in32(&ifc->csor_cs[priv->bank].csor);
921923
922924 /* Hardware generates ECC per 512 Bytes */
923925 chip->ecc.size = 512;
@@ -1006,7 +1008,7 @@ static int fsl_ifc_chip_remove(struct fsl_ifc_mtd *priv) · 82 unmodified lines
10061008 static int match_bank(struct fsl_ifc_regs __iomem *ifc, int bank,
10071009 phys_addr_t addr)
10081010 {
1009− u32 cspr = ioread32be(&ifc->cspr_cs[bank].cspr);
1011+ u32 cspr = ifc_in32(&ifc->cspr_cs[bank].cspr);
10101012
10111013 if (!(cspr & CSPR_V))
10121014 return 0;
@@ -1092,16 +1094,16 @@ static int fsl_ifc_nand_probe(struct platform_device *dev) · 79 unmodified lines
10921094
10931095 dev_set_drvdata(priv->dev, priv);
10941096
1095− iowrite32be(IFC_NAND_EVTER_EN_OPC_EN |
1096− IFC_NAND_EVTER_EN_FTOER_EN |
1097− IFC_NAND_EVTER_EN_WPER_EN,
1098− &ifc->ifc_nand.nand_evter_en);
1097+ ifc_out32(IFC_NAND_EVTER_EN_OPC_EN |
1098+ IFC_NAND_EVTER_EN_FTOER_EN |
1099+ IFC_NAND_EVTER_EN_WPER_EN,
1100+ &ifc->ifc_nand.nand_evter_en);
10991101
11001102 /* enable NAND Machine Interrupts */
1101− iowrite32be(IFC_NAND_EVTER_INTR_OPCIR_EN |
1102− IFC_NAND_EVTER_INTR_FTOERIR_EN |
1103− IFC_NAND_EVTER_INTR_WPERIR_EN,
1104− &ifc->ifc_nand.nand_evter_intr_en);
1103+ ifc_out32(IFC_NAND_EVTER_INTR_OPCIR_EN |
1104+ IFC_NAND_EVTER_INTR_FTOERIR_EN |
1105+ IFC_NAND_EVTER_INTR_WPERIR_EN,
1106+ &ifc->ifc_nand.nand_evter_intr_en);
11051107 priv->mtd.name = kasprintf(GFP_KERNEL, "%llx.flash", (u64)res.start);
11061108 if (!priv->mtd.name) {
11071109 ret = -ENOMEM;
drivers/tty/hvc/hvsi.c+24−22
@@ -240,9 +240,9 @@ static void hvsi_recv_control(struct hvsi_struct *hp, uint8_t *packet, · 239 unmodified lines
240240 {
241241 struct hvsi_control *header = (struct hvsi_control *)packet;
242242
243− switch (header->verb) {
243+ switch (be16_to_cpu(header->verb)) {
244244 case VSV_MODEM_CTL_UPDATE:
245− if ((header->word & HVSI_TSCD) == 0) {
245+ if ((be32_to_cpu(header->word) & HVSI_TSCD) == 0) {
246246 /* CD went away; no more connection */
247247 pr_debug("hvsi%i: CD dropped\n", hp->index);
248248 hp->mctrl &= TIOCM_CD;
@@ -267,6 +267,7 @@ static void hvsi_recv_control(struct hvsi_struct *hp, uint8_t *packet, · 18 unmodified lines
267267 static void hvsi_recv_response(struct hvsi_struct *hp, uint8_t *packet)
268268 {
269269 struct hvsi_query_response *resp = (struct hvsi_query_response *)packet;
270+ uint32_t mctrl_word;
270271
271272 switch (hp->state) {
272273 case HVSI_WAIT_FOR_VER_RESPONSE:
@@ -274,9 +275,10 @@ static void hvsi_recv_response(struct hvsi_struct *hp, uint8_t *packet) · 1 unmodified line
274275 break;
275276 case HVSI_WAIT_FOR_MCTRL_RESPONSE:
276277 hp->mctrl = 0;
277− if (resp->u.mctrl_word & HVSI_TSDTR)
278+ mctrl_word = be32_to_cpu(resp->u.mctrl_word);
279+ if (mctrl_word & HVSI_TSDTR)
278280 hp->mctrl |= TIOCM_DTR;
279− if (resp->u.mctrl_word & HVSI_TSCD)
281+ if (mctrl_word & HVSI_TSCD)
280282 hp->mctrl |= TIOCM_CD;
281283 __set_state(hp, HVSI_OPEN);
282284 break;
@@ -295,10 +297,10 @@ static int hvsi_version_respond(struct hvsi_struct *hp, uint16_t query_seqno) · 12 unmodified lines
295297
296298 packet.hdr.type = VS_QUERY_RESPONSE_PACKET_HEADER;
297299 packet.hdr.len = sizeof(struct hvsi_query_response);
298− packet.hdr.seqno = atomic_inc_return(&hp->seqno);
299− packet.verb = VSV_SEND_VERSION_NUMBER;
300+ packet.hdr.seqno = cpu_to_be16(atomic_inc_return(&hp->seqno));
301+ packet.verb = cpu_to_be16(VSV_SEND_VERSION_NUMBER);
300302 packet.u.version = HVSI_VERSION;
301− packet.query_seqno = query_seqno+1;
303+ packet.query_seqno = cpu_to_be16(query_seqno+1);
302304
303305 pr_debug("%s: sending %i bytes\n", __func__, packet.hdr.len);
304306 dbg_dump_hex((uint8_t*)&packet, packet.hdr.len);
@@ -319,7 +321,7 @@ static void hvsi_recv_query(struct hvsi_struct *hp, uint8_t *packet) · 14 unmodified lines
319321
320322 switch (hp->state) {
321323 case HVSI_WAIT_FOR_VER_QUERY:
322− hvsi_version_respond(hp, query->hdr.seqno);
324+ hvsi_version_respond(hp, be16_to_cpu(query->hdr.seqno));
323325 __set_state(hp, HVSI_OPEN);
324326 break;
325327 default:
@@ -555,8 +557,8 @@ static int hvsi_query(struct hvsi_struct *hp, uint16_t verb) · 229 unmodified lines
555557
556558 packet.hdr.type = VS_QUERY_PACKET_HEADER;
557559 packet.hdr.len = sizeof(struct hvsi_query);
558− packet.hdr.seqno = atomic_inc_return(&hp->seqno);
559− packet.verb = verb;
560+ packet.hdr.seqno = cpu_to_be16(atomic_inc_return(&hp->seqno));
561+ packet.verb = cpu_to_be16(verb);
560562
561563 pr_debug("%s: sending %i bytes\n", __func__, packet.hdr.len);
562564 dbg_dump_hex((uint8_t*)&packet, packet.hdr.len);
@@ -596,14 +598,14 @@ static int hvsi_set_mctrl(struct hvsi_struct *hp, uint16_t mctrl) · 33 unmodified lines
596598 struct hvsi_control packet __ALIGNED__;
597599 int wrote;
598600
599− packet.hdr.type = VS_CONTROL_PACKET_HEADER,
600− packet.hdr.seqno = atomic_inc_return(&hp->seqno);
601+ packet.hdr.type = VS_CONTROL_PACKET_HEADER;
602+ packet.hdr.seqno = cpu_to_be16(atomic_inc_return(&hp->seqno));
601603 packet.hdr.len = sizeof(struct hvsi_control);
602− packet.verb = VSV_SET_MODEM_CTL;
603− packet.mask = HVSI_TSDTR;
604+ packet.verb = cpu_to_be16(VSV_SET_MODEM_CTL);
605+ packet.mask = cpu_to_be32(HVSI_TSDTR);
604606
605607 if (mctrl & TIOCM_DTR)
606− packet.word = HVSI_TSDTR;
608+ packet.word = cpu_to_be32(HVSI_TSDTR);
607609
608610 pr_debug("%s: sending %i bytes\n", __func__, packet.hdr.len);
609611 dbg_dump_hex((uint8_t*)&packet, packet.hdr.len);
@@ -680,7 +682,7 @@ static int hvsi_put_chars(struct hvsi_struct *hp, const char *buf, int count) · 70 unmodified lines
680682 BUG_ON(count > HVSI_MAX_OUTGOING_DATA);
681683
682684 packet.hdr.type = VS_DATA_PACKET_HEADER;
683− packet.hdr.seqno = atomic_inc_return(&hp->seqno);
685+ packet.hdr.seqno = cpu_to_be16(atomic_inc_return(&hp->seqno));
684686 packet.hdr.len = count + sizeof(struct hvsi_header);
685687 memcpy(&packet.data, buf, count);
686688
@@ -697,9 +699,9 @@ static void hvsi_close_protocol(struct hvsi_struct *hp) · 10 unmodified lines
697699 struct hvsi_control packet __ALIGNED__;
698700
699701 packet.hdr.type = VS_CONTROL_PACKET_HEADER;
700− packet.hdr.seqno = atomic_inc_return(&hp->seqno);
702+ packet.hdr.seqno = cpu_to_be16(atomic_inc_return(&hp->seqno));
701703 packet.hdr.len = 6;
702− packet.verb = VSV_CLOSE_PROTOCOL;
704+ packet.verb = cpu_to_be16(VSV_CLOSE_PROTOCOL);
703705
704706 pr_debug("%s: sending %i bytes\n", __func__, packet.hdr.len);
705707 dbg_dump_hex((uint8_t*)&packet, packet.hdr.len);
@@ -1180,7 +1182,7 @@ static int __init hvsi_console_init(void) · 474 unmodified lines
11801182 /* search device tree for vty nodes */
11811183 for_each_compatible_node(vty, "serial", "hvterm-protocol") {
11821184 struct hvsi_struct *hp;
1183− const uint32_t *vtermno, *irq;
1185+ const __be32 *vtermno, *irq;
11841186
11851187 vtermno = of_get_property(vty, "reg", NULL);
11861188 irq = of_get_property(vty, "interrupts", NULL);
@@ -1202,11 +1204,11 @@ static int __init hvsi_console_init(void) · 15 unmodified lines
12021204 hp->index = hvsi_count;
12031205 hp->inbuf_end = hp->inbuf;
12041206 hp->state = HVSI_CLOSED;
1205− hp->vtermno = *vtermno;
1206− hp->virq = irq_create_mapping(NULL, irq[0]);
1207+ hp->vtermno = be32_to_cpup(vtermno);
1208+ hp->virq = irq_create_mapping(NULL, be32_to_cpup(irq));
12071209 if (hp->virq == 0) {
12081210 printk(KERN_ERR "%s: couldn't create irq mapping for 0x%x\n",
1209− __func__, irq[0]);
1211+ __func__, be32_to_cpup(irq));
12101212 tty_port_destroy(&hp->port);
12111213 continue;
12121214 }
include/linux/fsl_ifc.h+50−0
@@ -841,9 +841,59 @@ struct fsl_ifc_ctrl { · 840 unmodified lines
841841
842842 u32 nand_stat;
843843 wait_queue_head_t nand_wait;
844+ bool little_endian;
844845 };
845846
846847 extern struct fsl_ifc_ctrl *fsl_ifc_ctrl_dev;
847848
849+static inline u32 ifc_in32(void __iomem *addr)
850+{
851+ u32 val;
852+
853+ if (fsl_ifc_ctrl_dev->little_endian)
854+ val = ioread32(addr);
855+ else
856+ val = ioread32be(addr);
857+
858+ return val;
859+}
860+
861+static inline u16 ifc_in16(void __iomem *addr)
862+{
863+ u16 val;
864+
865+ if (fsl_ifc_ctrl_dev->little_endian)
866+ val = ioread16(addr);
867+ else
868+ val = ioread16be(addr);
869+
870+ return val;
871+}
872+
873+static inline u8 ifc_in8(void __iomem *addr)
874+{
875+ return ioread8(addr);
876+}
877+
878+static inline void ifc_out32(u32 val, void __iomem *addr)
879+{
880+ if (fsl_ifc_ctrl_dev->little_endian)
881+ iowrite32(val, addr);
882+ else
883+ iowrite32be(val, addr);
884+}
885+
886+static inline void ifc_out16(u16 val, void __iomem *addr)
887+{
888+ if (fsl_ifc_ctrl_dev->little_endian)
889+ iowrite16(val, addr);
890+ else
891+ iowrite16be(val, addr);
892+}
893+
894+static inline void ifc_out8(u8 val, void __iomem *addr)
895+{
896+ iowrite8(val, addr);
897+}
848898
849899 #endif /* __ASM_FSL_IFC_H */
include/misc/cxl.h+10−0
@@ -200,4 +200,14 @@ unsigned int cxl_fd_poll(struct file *file, struct poll_table_struct *poll); · 199 unmodified lines
200200 ssize_t cxl_fd_read(struct file *file, char __user *buf, size_t count,
201201 loff_t *off);
202202
203+/*
204+ * For EEH, a driver may want to assert a PERST will reload the same image
205+ * from flash into the FPGA.
206+ *
207+ * This is a property of the entire adapter, not a single AFU, so drivers
208+ * should set this property with care!
209+ */
210+void cxl_perst_reloads_same_image(struct cxl_afu *afu,
211+ bool perst_reloads_same_image);
212+
203213 #endif /* _MISC_CXL_H */
include/uapi/misc/cxl.h+3−1
@@ -29,8 +29,10 @@ struct cxl_ioctl_start_work { · 28 unmodified lines
2929
3030 #define CXL_START_WORK_AMR 0x0000000000000001ULL
3131 #define CXL_START_WORK_NUM_IRQS 0x0000000000000002ULL
32+#define CXL_START_WORK_ERR_FF 0x0000000000000004ULL
3233 #define CXL_START_WORK_ALL (CXL_START_WORK_AMR |\
33− CXL_START_WORK_NUM_IRQS)
34+ CXL_START_WORK_NUM_IRQS |\
35+ CXL_START_WORK_ERR_FF)
3436
3537
3638 /* Possible modes that an afu can be in */
tools/testing/selftests/powerpc/mm/Makefile+2−1
@@ -2,8 +2,9 @@ noarg: · 1 unmodified line
22 $(MAKE) -C ../
33
44 TEST_PROGS := hugetlb_vs_thp_test subpage_prot
5+TEST_FILES := tempfile
56
6−all: $(TEST_PROGS) tempfile
7+all: $(TEST_PROGS) $(TEST_FILES)
78
89 $(TEST_PROGS): ../harness.c
910
tools/testing/selftests/seccomp/seccomp_bpf.c+14−1
@@ -14,6 +14,7 @@ · 13 unmodified lines
1414 #include <linux/filter.h>
1515 #include <sys/prctl.h>
1616 #include <sys/ptrace.h>
17+#include <sys/types.h>
1718 #include <sys/user.h>
1819 #include <linux/prctl.h>
1920 #include <linux/ptrace.h>
@@ -82,7 +83,13 @@ struct seccomp_data { · 62 unmodified lines
8283 };
8384 #endif
8485
86+#if __BYTE_ORDER == __LITTLE_ENDIAN
8587 #define syscall_arg(_n) (offsetof(struct seccomp_data, args[_n]))
88+#elif __BYTE_ORDER == __BIG_ENDIAN
89+#define syscall_arg(_n) (offsetof(struct seccomp_data, args[_n]) + sizeof(__u32))
90+#else
91+#error "wut? Unknown __BYTE_ORDER?!"
92+#endif
8693
8794 #define SIBLING_EXIT_UNKILLED 0xbadbeef
8895 #define SIBLING_EXIT_FAILURE 0xbadface
@@ -1199,6 +1206,10 @@ TEST_F(TRACE_poke, getpid_runs_normally) · 1110 unmodified lines
11991206 # define ARCH_REGS struct user_pt_regs
12001207 # define SYSCALL_NUM regs[8]
12011208 # define SYSCALL_RET regs[0]
1209+#elif defined(__powerpc__)
1210+# define ARCH_REGS struct pt_regs
1211+# define SYSCALL_NUM gpr[0]
1212+# define SYSCALL_RET gpr[3]
12021213 #else
12031214 # error "Do not know how to find your architecture's registers and syscalls"
12041215 #endif
@@ -1232,7 +1243,7 @@ void change_syscall(struct __test_metadata *_metadata, · 27 unmodified lines
12321243 ret = ptrace(PTRACE_GETREGSET, tracee, NT_PRSTATUS, &iov);
12331244 EXPECT_EQ(0, ret);
12341245
1235−#if defined(__x86_64__) || defined(__i386__) || defined(__aarch64__)
1246+#if defined(__x86_64__) || defined(__i386__) || defined(__aarch64__) || defined(__powerpc__)
12361247 {
12371248 regs.SYSCALL_NUM = syscall;
12381249 }
@@ -1396,6 +1407,8 @@ TEST_F(TRACE_syscall, syscall_dropped) · 157 unmodified lines
13961407 # define __NR_seccomp 383
13971408 # elif defined(__aarch64__)
13981409 # define __NR_seccomp 277
1410+# elif defined(__powerpc__)
1411+# define __NR_seccomp 358
13991412 # else
14001413 # warning "seccomp syscall number unknown for this architecture"
14011414 # define __NR_seccomp 0xffff