Linux 4.12-rc6 * tag 'v4.12-rc6': (813 commits) Linux 4.12-rc6 mm: larger stack guard gap, between vmas virtio_balloon: disable VIOMMU support mm: correct the comment when reclaimed pages exceed the scanned pages userfaultfd: shmem: handle coredumping in handle_userfault() mm: numa: avoid waiting on freed migrated pages swap: cond_resched in swap_cgroup_prepare() mm/memory-failure.c: use compound_head() flags for huge pages perf unwind: Report module before querying isactivation in dwfl unwind fs: pass on flags in compat_writev objtool: Add fortify_panic as __noreturn function powerpc/debug: Add missing warn flag to WARN_ON's non-builtin path USB: gadgetfs, dummy-hcd, net2280: fix locking for callbacks drm: mxsfb_crtc: Reset the eLCDIF controller drm/mgag200: Fix to always set HiPri for G200e4 V2 i2c: ismt: fix wrong device address when unmap the data buffer i2c: rcar: use correct length when unmapping DMA powerpc/xive: Fix offset for store EOI MMIOs drm/tegra: Correct idr_alloc() minimum id drm/tegra: Fix lockup on a use of staging API ...
Unified · Split
| @@ -866,6 +866,15 @@ · 865 unmodified lines | ||
| 866 | 866 | |
| 867 | 867 | dscc4.setup= [NET] |
| 868 | 868 | |
| 869 | + dt_cpu_ftrs= [PPC] | |
| 870 | + Format: {"off" | "known"} | |
| 871 | + Control how the dt_cpu_ftrs device-tree binding is | |
| 872 | + used for CPU feature discovery and setup (if it | |
| 873 | + exists). | |
| 874 | + off: Do not use it, fall back to legacy cpu table. | |
| 875 | + known: Do not pass through unknown features to guests | |
| 876 | + or userspace, only those that the kernel is aware of. | |
| 877 | + | |
| 869 | 878 | dump_apple_properties [X86] |
| 870 | 879 | Dump name and content of EFI device properties on |
| 871 | 880 | x86 Macs. Useful for driver authors to determine |
| @@ -3802,6 +3811,13 @@ · 2930 unmodified lines | ||
| 3802 | 3811 | expediting. Set to zero to disable automatic |
| 3803 | 3812 | expediting. |
| 3804 | 3813 | |
| 3814 | + stack_guard_gap= [MM] | |
| 3815 | + override the default stack gap protection. The value | |
| 3816 | + is in page units and it defines how many pages prior | |
| 3817 | + to (for stacks growing down) resp. after (for stacks | |
| 3818 | + growing up) the main stack are reserved for no other | |
| 3819 | + mapping. Default value is 256 pages. | |
| 3820 | + | |
| 3805 | 3821 | stacktrace [FTRACE] |
| 3806 | 3822 | Enabled the stack tracer on boot up. |
| 3807 | 3823 | |
| @@ -26,6 +26,10 @@ Optional properties: · 25 unmodified lines | ||
| 26 | 26 | - interrupt-controller : Indicates the switch is itself an interrupt |
| 27 | 27 | controller. This is used for the PHY interrupts. |
| 28 | 28 | #interrupt-cells = <2> : Controller uses two cells, number and flag |
| 29 | +- eeprom-length : Set to the length of an EEPROM connected to the | |
| 30 | + switch. Must be set if the switch can not detect | |
| 31 | + the presence and/or size of a connected EEPROM, | |
| 32 | + otherwise optional. | |
| 29 | 33 | - mdio : Container of PHY and devices on the switches MDIO |
| 30 | 34 | bus. |
| 31 | 35 | - mdio? : Container of PHYs and devices on the external MDIO |
| @@ -247,7 +247,6 @@ bias-bus-hold - latch weakly · 246 unmodified lines | ||
| 247 | 247 | bias-pull-up - pull up the pin |
| 248 | 248 | bias-pull-down - pull down the pin |
| 249 | 249 | bias-pull-pin-default - use pin-default pull state |
| 250 | −bi-directional - pin supports simultaneous input/output operations | |
| 251 | 250 | drive-push-pull - drive actively high and low |
| 252 | 251 | drive-open-drain - drive with open drain |
| 253 | 252 | drive-open-source - drive with open source |
| @@ -260,7 +259,6 @@ input-debounce - debounce mode with debound time X · 6 unmodified lines | ||
| 260 | 259 | power-source - select between different power supplies |
| 261 | 260 | low-power-enable - enable low power mode |
| 262 | 261 | low-power-disable - disable low power mode |
| 263 | −output-enable - enable output on pin regardless of output value | |
| 264 | 262 | output-low - set the pin to output mode with low level |
| 265 | 263 | output-high - set the pin to output mode with high level |
| 266 | 264 | slew-rate - set the slew rate |
| @@ -10,6 +10,7 @@ Required properties: · 9 unmodified lines | ||
| 10 | 10 | - "rockchip,rk3288-usb", "rockchip,rk3066-usb", "snps,dwc2": for rk3288 Soc; |
| 11 | 11 | - "lantiq,arx100-usb": The DWC2 USB controller instance in Lantiq ARX SoCs; |
| 12 | 12 | - "lantiq,xrx200-usb": The DWC2 USB controller instance in Lantiq XRX SoCs; |
| 13 | + - "amlogic,meson8-usb": The DWC2 USB controller instance in Amlogic Meson8 SoCs; | |
| 13 | 14 | - "amlogic,meson8b-usb": The DWC2 USB controller instance in Amlogic Meson8b SoCs; |
| 14 | 15 | - "amlogic,meson-gxbb-usb": The DWC2 USB controller instance in Amlogic S905 SoCs; |
| 15 | 16 | - "amcc,dwc-otg": The DWC2 USB controller instance in AMCC Canyonlands 460EX SoCs; |
| @@ -0,0 +1,194 @@ | ||
| 1 | +The QorIQ DPAA Ethernet Driver | |
| 2 | +============================== | |
| 3 | + | |
| 4 | +Authors: | |
| 5 | +Madalin Bucur <madalin.bucur@nxp.com> | |
| 6 | +Camelia Groza <camelia.groza@nxp.com> | |
| 7 | + | |
| 8 | +Contents | |
| 9 | +======== | |
| 10 | + | |
| 11 | + - DPAA Ethernet Overview | |
| 12 | + - DPAA Ethernet Supported SoCs | |
| 13 | + - Configuring DPAA Ethernet in your kernel | |
| 14 | + - DPAA Ethernet Frame Processing | |
| 15 | + - DPAA Ethernet Features | |
| 16 | + - Debugging | |
| 17 | + | |
| 18 | +DPAA Ethernet Overview | |
| 19 | +====================== | |
| 20 | + | |
| 21 | +DPAA stands for Data Path Acceleration Architecture and it is a | |
| 22 | +set of networking acceleration IPs that are available on several | |
| 23 | +generations of SoCs, both on PowerPC and ARM64. | |
| 24 | + | |
| 25 | +The Freescale DPAA architecture consists of a series of hardware blocks | |
| 26 | +that support Ethernet connectivity. The Ethernet driver depends upon the | |
| 27 | +following drivers in the Linux kernel: | |
| 28 | + | |
| 29 | + - Peripheral Access Memory Unit (PAMU) (* needed only for PPC platforms) | |
| 30 | + drivers/iommu/fsl_* | |
| 31 | + - Frame Manager (FMan) | |
| 32 | + drivers/net/ethernet/freescale/fman | |
| 33 | + - Queue Manager (QMan), Buffer Manager (BMan) | |
| 34 | + drivers/soc/fsl/qbman | |
| 35 | + | |
| 36 | +A simplified view of the dpaa_eth interfaces mapped to FMan MACs: | |
| 37 | + | |
| 38 | + dpaa_eth /eth0\ ... /ethN\ | |
| 39 | + driver | | | | | |
| 40 | + ------------- ---- ----------- ---- ------------- | |
| 41 | + -Ports / Tx Rx \ ... / Tx Rx \ | |
| 42 | + FMan | | | | | |
| 43 | + -MACs | MAC0 | | MACN | | |
| 44 | + / dtsec0 \ ... / dtsecN \ (or tgec) | |
| 45 | + / \ / \(or memac) | |
| 46 | + --------- -------------- --- -------------- --------- | |
| 47 | + FMan, FMan Port, FMan SP, FMan MURAM drivers | |
| 48 | + --------------------------------------------------------- | |
| 49 | + FMan HW blocks: MURAM, MACs, Ports, SP | |
| 50 | + --------------------------------------------------------- | |
| 51 | + | |
| 52 | +The dpaa_eth relation to the QMan, BMan and FMan: | |
| 53 | + ________________________________ | |
| 54 | + dpaa_eth / eth0 \ | |
| 55 | + driver / \ | |
| 56 | + --------- -^- -^- -^- --- --------- | |
| 57 | + QMan driver / \ / \ / \ \ / | BMan | | |
| 58 | + |Rx | |Rx | |Tx | |Tx | | driver | | |
| 59 | + --------- |Dfl| |Err| |Cnf| |FQs| | | | |
| 60 | + QMan HW |FQ | |FQ | |FQs| | | | | | |
| 61 | + / \ / \ / \ \ / | | | |
| 62 | + --------- --- --- --- -v- --------- | |
| 63 | + | FMan QMI | | | |
| 64 | + | FMan HW FMan BMI | BMan HW | | |
| 65 | + ----------------------- -------- | |
| 66 | + | |
| 67 | +where the acronyms used above (and in the code) are: | |
| 68 | +DPAA = Data Path Acceleration Architecture | |
| 69 | +FMan = DPAA Frame Manager | |
| 70 | +QMan = DPAA Queue Manager | |
| 71 | +BMan = DPAA Buffers Manager | |
| 72 | +QMI = QMan interface in FMan | |
| 73 | +BMI = BMan interface in FMan | |
| 74 | +FMan SP = FMan Storage Profiles | |
| 75 | +MURAM = Multi-user RAM in FMan | |
| 76 | +FQ = QMan Frame Queue | |
| 77 | +Rx Dfl FQ = default reception FQ | |
| 78 | +Rx Err FQ = Rx error frames FQ | |
| 79 | +Tx Cnf FQ = Tx confirmation FQs | |
| 80 | +Tx FQs = transmission frame queues | |
| 81 | +dtsec = datapath three speed Ethernet controller (10/100/1000 Mbps) | |
| 82 | +tgec = ten gigabit Ethernet controller (10 Gbps) | |
| 83 | +memac = multirate Ethernet MAC (10/100/1000/10000) | |
| 84 | + | |
| 85 | +DPAA Ethernet Supported SoCs | |
| 86 | +============================ | |
| 87 | + | |
| 88 | +The DPAA drivers enable the Ethernet controllers present on the following SoCs: | |
| 89 | + | |
| 90 | +# PPC | |
| 91 | +P1023 | |
| 92 | +P2041 | |
| 93 | +P3041 | |
| 94 | +P4080 | |
| 95 | +P5020 | |
| 96 | +P5040 | |
| 97 | +T1023 | |
| 98 | +T1024 | |
| 99 | +T1040 | |
| 100 | +T1042 | |
| 101 | +T2080 | |
| 102 | +T4240 | |
| 103 | +B4860 | |
| 104 | + | |
| 105 | +# ARM | |
| 106 | +LS1043A | |
| 107 | +LS1046A | |
| 108 | + | |
| 109 | +Configuring DPAA Ethernet in your kernel | |
| 110 | +======================================== | |
| 111 | + | |
| 112 | +To enable the DPAA Ethernet driver, the following Kconfig options are required: | |
| 113 | + | |
| 114 | +# common for arch/arm64 and arch/powerpc platforms | |
| 115 | +CONFIG_FSL_DPAA=y | |
| 116 | +CONFIG_FSL_FMAN=y | |
| 117 | +CONFIG_FSL_DPAA_ETH=y | |
| 118 | +CONFIG_FSL_XGMAC_MDIO=y | |
| 119 | + | |
| 120 | +# for arch/powerpc only | |
| 121 | +CONFIG_FSL_PAMU=y | |
| 122 | + | |
| 123 | +# common options needed for the PHYs used on the RDBs | |
| 124 | +CONFIG_VITESSE_PHY=y | |
| 125 | +CONFIG_REALTEK_PHY=y | |
| 126 | +CONFIG_AQUANTIA_PHY=y | |
| 127 | + | |
| 128 | +DPAA Ethernet Frame Processing | |
| 129 | +============================== | |
| 130 | + | |
| 131 | +On Rx, buffers for the incoming frames are retrieved from one of the three | |
| 132 | +existing buffers pools. The driver initializes and seeds these, each with | |
| 133 | +buffers of different sizes: 1KB, 2KB and 4KB. | |
| 134 | + | |
| 135 | +On Tx, all transmitted frames are returned to the driver through Tx | |
| 136 | +confirmation frame queues. The driver is then responsible for freeing the | |
| 137 | +buffers. In order to do this properly, a backpointer is added to the buffer | |
| 138 | +before transmission that points to the skb. When the buffer returns to the | |
| 139 | +driver on a confirmation FQ, the skb can be correctly consumed. | |
| 140 | + | |
| 141 | +DPAA Ethernet Features | |
| 142 | +====================== | |
| 143 | + | |
| 144 | +Currently the DPAA Ethernet driver enables the basic features required for | |
| 145 | +a Linux Ethernet driver. The support for advanced features will be added | |
| 146 | +gradually. | |
| 147 | + | |
| 148 | +The driver has Rx and Tx checksum offloading for UDP and TCP. Currently the Rx | |
| 149 | +checksum offload feature is enabled by default and cannot be controlled through | |
| 150 | +ethtool. | |
| 151 | + | |
| 152 | +The driver has support for multiple prioritized Tx traffic classes. Priorities | |
| 153 | +range from 0 (lowest) to 3 (highest). These are mapped to HW workqueues with | |
| 154 | +strict priority levels. Each traffic class contains NR_CPU TX queues. By | |
| 155 | +default, only one traffic class is enabled and the lowest priority Tx queues | |
| 156 | +are used. Higher priority traffic classes can be enabled with the mqprio | |
| 157 | +qdisc. For example, all four traffic classes are enabled on an interface with | |
| 158 | +the following command. Furthermore, skb priority levels are mapped to traffic | |
| 159 | +classes as follows: | |
| 160 | + | |
| 161 | + * priorities 0 to 3 - traffic class 0 (low priority) | |
| 162 | + * priorities 4 to 7 - traffic class 1 (medium-low priority) | |
| 163 | + * priorities 8 to 11 - traffic class 2 (medium-high priority) | |
| 164 | + * priorities 12 to 15 - traffic class 3 (high priority) | |
| 165 | + | |
| 166 | +tc qdisc add dev <int> root handle 1: \ | |
| 167 | + mqprio num_tc 4 map 0 0 0 0 1 1 1 1 2 2 2 2 3 3 3 3 hw 1 | |
| 168 | + | |
| 169 | +Debugging | |
| 170 | +========= | |
| 171 | + | |
| 172 | +The following statistics are exported for each interface through ethtool: | |
| 173 | + | |
| 174 | + - interrupt count per CPU | |
| 175 | + - Rx packets count per CPU | |
| 176 | + - Tx packets count per CPU | |
| 177 | + - Tx confirmed packets count per CPU | |
| 178 | + - Tx S/G frames count per CPU | |
| 179 | + - Tx error count per CPU | |
| 180 | + - Rx error count per CPU | |
| 181 | + - Rx error count per type | |
| 182 | + - congestion related statistics: | |
| 183 | + - congestion status | |
| 184 | + - time spent in congestion | |
| 185 | + - number of time the device entered congestion | |
| 186 | + - dropped packets count per cause | |
| 187 | + | |
| 188 | +The driver also exports the following information in sysfs: | |
| 189 | + | |
| 190 | + - the FQ IDs for each FQ type | |
| 191 | + /sys/devices/platform/dpaa-ethernet.0/net/<int>/fqids | |
| 192 | + | |
| 193 | + - the IDs of the buffer pools in use | |
| 194 | + /sys/devices/platform/dpaa-ethernet.0/net/<int>/bpids | |
| @@ -122,7 +122,7 @@ associated flow of the packet. The hash is either provided by hardware · 121 unmodified lines | ||
| 122 | 122 | or will be computed in the stack. Capable hardware can pass the hash in |
| 123 | 123 | the receive descriptor for the packet; this would usually be the same |
| 124 | 124 | hash used for RSS (e.g. computed Toeplitz hash). The hash is saved in |
| 125 | −skb->rx_hash and can be used elsewhere in the stack as a hash of the | |
| 125 | +skb->hash and can be used elsewhere in the stack as a hash of the | |
| 126 | 126 | packet’s flow. |
| 127 | 127 | |
| 128 | 128 | Each receive hardware queue has an associated list of CPUs to which |
| @@ -1,7 +1,7 @@ | ||
| 1 | 1 | TCP protocol |
| 2 | 2 | ============ |
| 3 | 3 | |
| 4 | −Last updated: 9 February 2008 | |
| 4 | +Last updated: 3 June 2017 | |
| 5 | 5 | |
| 6 | 6 | Contents |
| 7 | 7 | ======== |
| @@ -29,18 +29,19 @@ As of 2.6.13, Linux supports pluggable congestion control algorithms. · 21 unmodified lines | ||
| 29 | 29 | A congestion control mechanism can be registered through functions in |
| 30 | 30 | tcp_cong.c. The functions used by the congestion control mechanism are |
| 31 | 31 | registered via passing a tcp_congestion_ops struct to |
| 32 | −tcp_register_congestion_control. As a minimum name, ssthresh, | |
| 33 | −cong_avoid must be valid. | |
| 32 | +tcp_register_congestion_control. As a minimum, the congestion control | |
| 33 | +mechanism must provide a valid name and must implement either ssthresh, | |
| 34 | +cong_avoid and undo_cwnd hooks or the "omnipotent" cong_control hook. | |
| 34 | 35 | |
| 35 | 36 | Private data for a congestion control mechanism is stored in tp->ca_priv. |
| 36 | 37 | tcp_ca(tp) returns a pointer to this space. This is preallocated space - it |
| 37 | 38 | is important to check the size of your private data will fit this space, or |
| 38 | −alternatively space could be allocated elsewhere and a pointer to it could | |
| 39 | +alternatively, space could be allocated elsewhere and a pointer to it could | |
| 39 | 40 | be stored here. |
| 40 | 41 | |
| 41 | 42 | There are three kinds of congestion control algorithms currently: The |
| 42 | 43 | simplest ones are derived from TCP reno (highspeed, scalable) and just |
| 43 | −provide an alternative the congestion window calculation. More complex | |
| 44 | +provide an alternative congestion window calculation. More complex | |
| 44 | 45 | ones like BIC try to look at other events to provide better |
| 45 | 46 | heuristics. There are also round trip time based algorithms like |
| 46 | 47 | Vegas and Westwood+. |
| @@ -49,21 +50,15 @@ Good TCP congestion control is a complex problem because the algorithm · 2 unmodified lines | ||
| 49 | 50 | needs to maintain fairness and performance. Please review current |
| 50 | 51 | research and RFC's before developing new modules. |
| 51 | 52 | |
| 52 | −The method that is used to determine which congestion control mechanism is | |
| 53 | −determined by the setting of the sysctl net.ipv4.tcp_congestion_control. | |
| 54 | −The default congestion control will be the last one registered (LIFO); | |
| 55 | −so if you built everything as modules, the default will be reno. If you | |
| 56 | −build with the defaults from Kconfig, then CUBIC will be builtin (not a | |
| 57 | −module) and it will end up the default. | |
| 53 | +The default congestion control mechanism is chosen based on the | |
| 54 | +DEFAULT_TCP_CONG Kconfig parameter. If you really want a particular default | |
| 55 | +value then you can set it using sysctl net.ipv4.tcp_congestion_control. The | |
| 56 | +module will be autoloaded if needed and you will get the expected protocol. If | |
| 57 | +you ask for an unknown congestion method, then the sysctl attempt will fail. | |
| 58 | 58 | |
| 59 | −If you really want a particular default value then you will need | |
| 60 | −to set it with the sysctl. If you use a sysctl, the module will be autoloaded | |
| 61 | −if needed and you will get the expected protocol. If you ask for an | |
| 62 | −unknown congestion method, then the sysctl attempt will fail. | |
| 63 | − | |
| 64 | −If you remove a tcp congestion control module, then you will get the next | |
| 59 | +If you remove a TCP congestion control module, then you will get the next | |
| 65 | 60 | available one. Since reno cannot be built as a module, and cannot be |
| 66 | −deleted, it will always be available. | |
| 61 | +removed, it will always be available. | |
| 67 | 62 | |
| 68 | 63 | How the new TCP output machine [nyi] works. |
| 69 | 64 | =========================================== |
| @@ -1172,7 +1172,7 @@ N: clps711x · 1171 unmodified lines | ||
| 1172 | 1172 | |
| 1173 | 1173 | ARM/CIRRUS LOGIC EP93XX ARM ARCHITECTURE |
| 1174 | 1174 | M: Hartley Sweeten <hsweeten@visionengravers.com> |
| 1175 | −M: Ryan Mallon <rmallon@gmail.com> | |
| 1175 | +M: Alexander Sverdlin <alexander.sverdlin@gmail.com> | |
| 1176 | 1176 | L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) |
| 1177 | 1177 | S: Maintained |
| 1178 | 1178 | F: arch/arm/mach-ep93xx/ |
| @@ -1489,13 +1489,15 @@ M: Gregory Clement <gregory.clement@free-electrons.com> · 310 unmodified lines | ||
| 1489 | 1489 | M: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> |
| 1490 | 1490 | L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) |
| 1491 | 1491 | S: Maintained |
| 1492 | −F: arch/arm/mach-mvebu/ | |
| 1493 | −F: drivers/rtc/rtc-armada38x.c | |
| 1494 | 1492 | F: arch/arm/boot/dts/armada* |
| 1495 | 1493 | F: arch/arm/boot/dts/kirkwood* |
| 1494 | +F: arch/arm/configs/mvebu_*_defconfig | |
| 1495 | +F: arch/arm/mach-mvebu/ | |
| 1496 | 1496 | F: arch/arm64/boot/dts/marvell/armada* |
| 1497 | 1497 | F: drivers/cpufreq/mvebu-cpufreq.c |
| 1498 | −F: arch/arm/configs/mvebu_*_defconfig | |
| 1498 | +F: drivers/irqchip/irq-armada-370-xp.c | |
| 1499 | +F: drivers/irqchip/irq-mvebu-* | |
| 1500 | +F: drivers/rtc/rtc-armada38x.c | |
| 1499 | 1501 | |
| 1500 | 1502 | ARM/Marvell Berlin SoC support |
| 1501 | 1503 | M: Jisheng Zhang <jszhang@marvell.com> |
| @@ -1721,7 +1723,6 @@ N: rockchip · 219 unmodified lines | ||
| 1721 | 1723 | ARM/SAMSUNG EXYNOS ARM ARCHITECTURES |
| 1722 | 1724 | M: Kukjin Kim <kgene@kernel.org> |
| 1723 | 1725 | M: Krzysztof Kozlowski <krzk@kernel.org> |
| 1724 | −R: Javier Martinez Canillas <javier@osg.samsung.com> | |
| 1725 | 1726 | L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) |
| 1726 | 1727 | L: linux-samsung-soc@vger.kernel.org (moderated for non-subscribers) |
| 1727 | 1728 | Q: https://patchwork.kernel.org/project/linux-samsung-soc/list/ |
| @@ -1829,7 +1830,6 @@ F: drivers/edac/altera_edac. · 101 unmodified lines | ||
| 1829 | 1830 | ARM/STI ARCHITECTURE |
| 1830 | 1831 | M: Patrice Chotard <patrice.chotard@st.com> |
| 1831 | 1832 | L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) |
| 1832 | −L: kernel@stlinux.com | |
| 1833 | 1833 | W: http://www.stlinux.com |
| 1834 | 1834 | S: Maintained |
| 1835 | 1835 | F: arch/arm/mach-sti/ |
| @@ -5630,7 +5630,7 @@ F: scripts/get_maintainer.pl · 3794 unmodified lines | ||
| 5630 | 5630 | |
| 5631 | 5631 | GENWQE (IBM Generic Workqueue Card) |
| 5632 | 5632 | M: Frank Haverkamp <haver@linux.vnet.ibm.com> |
| 5633 | −M: Gabriel Krisman Bertazi <krisman@linux.vnet.ibm.com> | |
| 5633 | +M: Guilherme G. Piccoli <gpiccoli@linux.vnet.ibm.com> | |
| 5634 | 5634 | S: Supported |
| 5635 | 5635 | F: drivers/misc/genwqe/ |
| 5636 | 5636 | |
| @@ -5675,7 +5675,6 @@ F: tools/testing/selftests/gpio/ · 38 unmodified lines | ||
| 5675 | 5675 | |
| 5676 | 5676 | GPIO SUBSYSTEM |
| 5677 | 5677 | M: Linus Walleij <linus.walleij@linaro.org> |
| 5678 | −M: Alexandre Courbot <gnurou@gmail.com> | |
| 5679 | 5678 | L: linux-gpio@vger.kernel.org |
| 5680 | 5679 | T: git git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio.git |
| 5681 | 5680 | S: Maintained |
| @@ -7715,7 +7714,7 @@ F: drivers/platform/x86/hp_accel.c · 2033 unmodified lines | ||
| 7715 | 7714 | |
| 7716 | 7715 | LIVE PATCHING |
| 7717 | 7716 | M: Josh Poimboeuf <jpoimboe@redhat.com> |
| 7718 | −M: Jessica Yu <jeyu@redhat.com> | |
| 7717 | +M: Jessica Yu <jeyu@kernel.org> | |
| 7719 | 7718 | M: Jiri Kosina <jikos@kernel.org> |
| 7720 | 7719 | M: Miroslav Benes <mbenes@suse.cz> |
| 7721 | 7720 | R: Petr Mladek <pmladek@suse.com> |
| @@ -8547,7 +8546,7 @@ S: Odd Fixes · 825 unmodified lines | ||
| 8547 | 8546 | F: drivers/media/radio/radio-miropcm20* |
| 8548 | 8547 | |
| 8549 | 8548 | MELLANOX MLX4 core VPI driver |
| 8550 | −M: Yishai Hadas <yishaih@mellanox.com> | |
| 8549 | +M: Tariq Toukan <tariqt@mellanox.com> | |
| 8551 | 8550 | L: netdev@vger.kernel.org |
| 8552 | 8551 | L: linux-rdma@vger.kernel.org |
| 8553 | 8552 | W: http://www.mellanox.com |
| @@ -8555,7 +8554,6 @@ Q: http://patchwork.ozlabs.org/project/netdev/list/ · 1 unmodified line | ||
| 8555 | 8554 | S: Supported |
| 8556 | 8555 | F: drivers/net/ethernet/mellanox/mlx4/ |
| 8557 | 8556 | F: include/linux/mlx4/ |
| 8558 | −F: include/uapi/rdma/mlx4-abi.h | |
| 8559 | 8557 | |
| 8560 | 8558 | MELLANOX MLX4 IB driver |
| 8561 | 8559 | M: Yishai Hadas <yishaih@mellanox.com> |
| @@ -8565,6 +8563,7 @@ Q: http://patchwork.kernel.org/project/linux-rdma/list/ · 3 unmodified lines | ||
| 8565 | 8563 | S: Supported |
| 8566 | 8564 | F: drivers/infiniband/hw/mlx4/ |
| 8567 | 8565 | F: include/linux/mlx4/ |
| 8566 | +F: include/uapi/rdma/mlx4-abi.h | |
| 8568 | 8567 | |
| 8569 | 8568 | MELLANOX MLX5 core VPI driver |
| 8570 | 8569 | M: Saeed Mahameed <saeedm@mellanox.com> |
| @@ -8577,7 +8576,6 @@ Q: http://patchwork.ozlabs.org/project/netdev/list/ · 6 unmodified lines | ||
| 8577 | 8576 | S: Supported |
| 8578 | 8577 | F: drivers/net/ethernet/mellanox/mlx5/core/ |
| 8579 | 8578 | F: include/linux/mlx5/ |
| 8580 | −F: include/uapi/rdma/mlx5-abi.h | |
| 8581 | 8579 | |
| 8582 | 8580 | MELLANOX MLX5 IB driver |
| 8583 | 8581 | M: Matan Barak <matanb@mellanox.com> |
| @@ -8588,6 +8586,7 @@ Q: http://patchwork.kernel.org/project/linux-rdma/list/ · 4 unmodified lines | ||
| 8588 | 8586 | S: Supported |
| 8589 | 8587 | F: drivers/infiniband/hw/mlx5/ |
| 8590 | 8588 | F: include/linux/mlx5/ |
| 8589 | +F: include/uapi/rdma/mlx5-abi.h | |
| 8591 | 8590 | |
| 8592 | 8591 | MELEXIS MLX90614 DRIVER |
| 8593 | 8592 | M: Crt Mori <cmo@melexis.com> |
| @@ -8627,7 +8626,7 @@ S: Maintained · 33 unmodified lines | ||
| 8627 | 8626 | F: drivers/media/dvb-frontends/mn88473* |
| 8628 | 8627 | |
| 8629 | 8628 | MODULE SUPPORT |
| 8630 | −M: Jessica Yu <jeyu@redhat.com> | |
| 8629 | +M: Jessica Yu <jeyu@kernel.org> | |
| 8631 | 8630 | M: Rusty Russell <rusty@rustcorp.com.au> |
| 8632 | 8631 | T: git git://git.kernel.org/pub/scm/linux/kernel/git/jeyu/linux.git modules-next |
| 8633 | 8632 | S: Maintained |
| @@ -10503,7 +10502,7 @@ S: Orphan · 1869 unmodified lines | ||
| 10503 | 10502 | |
| 10504 | 10503 | PXA RTC DRIVER |
| 10505 | 10504 | M: Robert Jarzmik <robert.jarzmik@free.fr> |
| 10506 | −L: rtc-linux@googlegroups.com | |
| 10505 | +L: linux-rtc@vger.kernel.org | |
| 10507 | 10506 | S: Maintained |
| 10508 | 10507 | |
| 10509 | 10508 | QAT DRIVER |
| @@ -10810,7 +10809,7 @@ X: kernel/torture.c · 300 unmodified lines | ||
| 10810 | 10809 | REAL TIME CLOCK (RTC) SUBSYSTEM |
| 10811 | 10810 | M: Alessandro Zummo <a.zummo@towertech.it> |
| 10812 | 10811 | M: Alexandre Belloni <alexandre.belloni@free-electrons.com> |
| 10813 | −L: rtc-linux@googlegroups.com | |
| 10812 | +L: linux-rtc@vger.kernel.org | |
| 10814 | 10813 | Q: http://patchwork.ozlabs.org/project/rtc-linux/list/ |
| 10815 | 10814 | T: git git://git.kernel.org/pub/scm/linux/kernel/git/abelloni/linux.git |
| 10816 | 10815 | S: Maintained |
| @@ -11321,7 +11320,6 @@ F: drivers/media/rc/serial_ir.c · 504 unmodified lines | ||
| 11321 | 11320 | |
| 11322 | 11321 | STI CEC DRIVER |
| 11323 | 11322 | M: Benjamin Gaignard <benjamin.gaignard@linaro.org> |
| 11324 | −L: kernel@stlinux.com | |
| 11325 | 11323 | S: Maintained |
| 11326 | 11324 | F: drivers/staging/media/st-cec/ |
| 11327 | 11325 | F: Documentation/devicetree/bindings/media/stih-cec.txt |
| @@ -11831,6 +11829,7 @@ T: git git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci.git · 503 unmodified lines | ||
| 11831 | 11829 | S: Supported |
| 11832 | 11830 | F: arch/arm/mach-davinci/ |
| 11833 | 11831 | F: drivers/i2c/busses/i2c-davinci.c |
| 11832 | +F: arch/arm/boot/dts/da850* | |
| 11834 | 11833 | |
| 11835 | 11834 | TI DAVINCI SERIES MEDIA DRIVER |
| 11836 | 11835 | M: "Lad, Prabhakar" <prabhakar.csengg@gmail.com> |
| @@ -13920,7 +13919,7 @@ S: Odd fixes · 2083 unmodified lines | ||
| 13920 | 13919 | F: drivers/net/wireless/wl3501* |
| 13921 | 13920 | |
| 13922 | 13921 | WOLFSON MICROELECTRONICS DRIVERS |
| 13923 | −L: patches@opensource.wolfsonmicro.com | |
| 13922 | +L: patches@opensource.cirrus.com | |
| 13924 | 13923 | T: git https://github.com/CirrusLogic/linux-drivers.git |
| 13925 | 13924 | W: https://github.com/CirrusLogic/linux-drivers/wiki |
| 13926 | 13925 | S: Supported |
| @@ -1,7 +1,7 @@ | ||
| 1 | 1 | VERSION = 4 |
| 2 | 2 | PATCHLEVEL = 12 |
| 3 | 3 | SUBLEVEL = 0 |
| 4 | −EXTRAVERSION = -rc3 | |
| 4 | +EXTRAVERSION = -rc6 | |
| 5 | 5 | NAME = Fearless Coyote |
| 6 | 6 | |
| 7 | 7 | # *DOCUMENTATION* |
| @@ -65,7 +65,7 @@ arch_get_unmapped_area(struct file *filp, unsigned long addr, · 64 unmodified lines | ||
| 65 | 65 | |
| 66 | 66 | vma = find_vma(mm, addr); |
| 67 | 67 | if (TASK_SIZE - len >= addr && |
| 68 | − (!vma || addr + len <= vma->vm_start)) | |
| 68 | + (!vma || addr + len <= vm_start_gap(vma))) | |
| 69 | 69 | return addr; |
| 70 | 70 | } |
| 71 | 71 | |
| @@ -17,14 +17,12 @@ · 16 unmodified lines | ||
| 17 | 17 | @ there. |
| 18 | 18 | .inst 'M' | ('Z' << 8) | (0x1310 << 16) @ tstne r0, #0x4d000 |
| 19 | 19 | #else |
| 20 | − mov r0, r0 | |
| 20 | + W(mov) r0, r0 | |
| 21 | 21 | #endif |
| 22 | 22 | .endm |
| 23 | 23 | |
| 24 | 24 | .macro __EFI_HEADER |
| 25 | 25 | #ifdef CONFIG_EFI_STUB |
| 26 | − b __efi_start | |
| 27 | − | |
| 28 | 26 | .set start_offset, __efi_start - start |
| 29 | 27 | .org start + 0x3c |
| 30 | 28 | @ |
| @@ -130,19 +130,22 @@ start: · 129 unmodified lines | ||
| 130 | 130 | .rept 7 |
| 131 | 131 | __nop |
| 132 | 132 | .endr |
| 133 | − ARM( mov r0, r0 ) | |
| 134 | − ARM( b 1f ) | |
| 135 | − THUMB( badr r12, 1f ) | |
| 136 | − THUMB( bx r12 ) | |
| 133 | +#ifndef CONFIG_THUMB2_KERNEL | |
| 134 | + mov r0, r0 | |
| 135 | +#else | |
| 136 | + AR_CLASS( sub pc, pc, #3 ) @ A/R: switch to Thumb2 mode | |
| 137 | + M_CLASS( nop.w ) @ M: already in Thumb2 mode | |
| 138 | + .thumb | |
| 139 | +#endif | |
| 140 | + W(b) 1f | |
| 137 | 141 | |
| 138 | 142 | .word _magic_sig @ Magic numbers to help the loader |
| 139 | 143 | .word _magic_start @ absolute load/run zImage address |
| 140 | 144 | .word _magic_end @ zImage end address |
| 141 | 145 | .word 0x04030201 @ endianness flag |
| 142 | 146 | |
| 143 | − THUMB( .thumb ) | |
| 144 | −1: __EFI_HEADER | |
| 145 | − | |
| 147 | + __EFI_HEADER | |
| 148 | +1: | |
| 146 | 149 | ARM_BE8( setend be ) @ go BE8 if compiled for BE8 |
| 147 | 150 | AR_CLASS( mrs r9, cpsr ) |
| 148 | 151 | #ifdef CONFIG_ARM_VIRT_EXT |
| @@ -220,7 +220,7 @@ · 219 unmodified lines | ||
| 220 | 220 | |
| 221 | 221 | mmc1_pins: pinmux_mmc1_pins { |
| 222 | 222 | pinctrl-single,pins = < |
| 223 | − AM33XX_IOPAD(0x960, PIN_INPUT | MUX_MODE7) /* spi0_cs1.gpio0_6 */ | |
| 223 | + AM33XX_IOPAD(0x96c, PIN_INPUT | MUX_MODE7) /* uart0_rtsn.gpio1_9 */ | |
| 224 | 224 | >; |
| 225 | 225 | }; |
| 226 | 226 | |
| @@ -280,10 +280,6 @@ · 53 unmodified lines | ||
| 280 | 280 | AM33XX_IOPAD(0x834, PIN_INPUT_PULLUP | MUX_MODE7) /* nKbdReset - gpmc_ad13.gpio1_13 */ |
| 281 | 281 | AM33XX_IOPAD(0x838, PIN_INPUT_PULLUP | MUX_MODE7) /* nDispReset - gpmc_ad14.gpio1_14 */ |
| 282 | 282 | AM33XX_IOPAD(0x844, PIN_INPUT_PULLUP | MUX_MODE7) /* USB1_enPower - gpmc_a1.gpio1_17 */ |
| 283 | − /* AVR Programming - SPI Bus (bit bang) - Screen and Keyboard */ | |
| 284 | − AM33XX_IOPAD(0x954, PIN_INPUT_PULLUP | MUX_MODE7) /* Kbd/Disp/BattMOSI spi0_d0.gpio0_3 */ | |
| 285 | − AM33XX_IOPAD(0x958, PIN_INPUT_PULLUP | MUX_MODE7) /* Kbd/Disp/BattMISO spi0_d1.gpio0_4 */ | |
| 286 | − AM33XX_IOPAD(0x950, PIN_INPUT_PULLUP | MUX_MODE7) /* Kbd/Disp/BattSCLK spi0_clk.gpio0_2 */ | |
| 287 | 283 | /* PDI Bus - Battery system */ |
| 288 | 284 | AM33XX_IOPAD(0x840, PIN_INPUT_PULLUP | MUX_MODE7) /* nBattReset gpmc_a0.gpio1_16 */ |
| 289 | 285 | AM33XX_IOPAD(0x83c, PIN_INPUT_PULLUP | MUX_MODE7) /* BattPDIData gpmc_ad15.gpio1_15 */ |
| @@ -384,7 +380,7 @@ · 94 unmodified lines | ||
| 384 | 380 | pinctrl-names = "default"; |
| 385 | 381 | pinctrl-0 = <&mmc1_pins>; |
| 386 | 382 | bus-width = <4>; |
| 387 | − cd-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>; | |
| 383 | + cd-gpios = <&gpio1 9 GPIO_ACTIVE_LOW>; | |
| 388 | 384 | vmmc-supply = <&vmmcsd_fixed>; |
| 389 | 385 | }; |
| 390 | 386 | |
| @@ -3,6 +3,11 @@ · 2 unmodified lines | ||
| 3 | 3 | #include <dt-bindings/clock/bcm2835-aux.h> |
| 4 | 4 | #include <dt-bindings/gpio/gpio.h> |
| 5 | 5 | |
| 6 | +/* firmware-provided startup stubs live here, where the secondary CPUs are | |
| 7 | + * spinning. | |
| 8 | + */ | |
| 9 | +/memreserve/ 0x00000000 0x00001000; | |
| 10 | + | |
| 6 | 11 | /* This include file covers the common peripherals and configuration between |
| 7 | 12 | * bcm2835 and bcm2836 implementations, leaving the CPU configuration to |
| 8 | 13 | * bcm2835.dtsi and bcm2836.dtsi. |
| @@ -120,10 +120,16 @@ · 119 unmodified lines | ||
| 120 | 120 | |
| 121 | 121 | ethphy0: ethernet-phy@2 { |
| 122 | 122 | reg = <2>; |
| 123 | + micrel,led-mode = <1>; | |
| 124 | + clocks = <&clks IMX6UL_CLK_ENET_REF>; | |
| 125 | + clock-names = "rmii-ref"; | |
| 123 | 126 | }; |
| 124 | 127 | |
| 125 | 128 | ethphy1: ethernet-phy@1 { |
| 126 | 129 | reg = <1>; |
| 130 | + micrel,led-mode = <1>; | |
| 131 | + clocks = <&clks IMX6UL_CLK_ENET2_REF>; | |
| 132 | + clock-names = "rmii-ref"; | |
| 127 | 133 | }; |
| 128 | 134 | }; |
| 129 | 135 | }; |
| @@ -137,8 +137,8 @@ netcp: netcp@26000000 { · 136 unmodified lines | ||
| 137 | 137 | /* NetCP address range */ |
| 138 | 138 | ranges = <0 0x26000000 0x1000000>; |
| 139 | 139 | |
| 140 | − clocks = <&clkpa>, <&clkcpgmac>, <&chipclk12>, <&clkosr>; | |
| 141 | − clock-names = "pa_clk", "ethss_clk", "cpts", "osr_clk"; | |
| 140 | + clocks = <&clkpa>, <&clkcpgmac>, <&chipclk12>; | |
| 141 | + clock-names = "pa_clk", "ethss_clk", "cpts"; | |
| 142 | 142 | dma-coherent; |
| 143 | 143 | |
| 144 | 144 | ti,navigator-dmas = <&dma_gbe 0>, |
| @@ -232,6 +232,14 @@ · 231 unmodified lines | ||
| 232 | 232 | }; |
| 233 | 233 | }; |
| 234 | 234 | |
| 235 | + osr: sram@70000000 { | |
| 236 | + compatible = "mmio-sram"; | |
| 237 | + reg = <0x70000000 0x10000>; | |
| 238 | + #address-cells = <1>; | |
| 239 | + #size-cells = <1>; | |
| 240 | + clocks = <&clkosr>; | |
| 241 | + }; | |
| 242 | + | |
| 235 | 243 | dspgpio0: keystone_dsp_gpio@02620240 { |
| 236 | 244 | compatible = "ti,keystone-dsp-gpio"; |
| 237 | 245 | gpio-controller; |
| @@ -558,10 +558,11 @@ · 557 unmodified lines | ||
| 558 | 558 | }; |
| 559 | 559 | |
| 560 | 560 | r_ccu: clock@1f01400 { |
| 561 | − compatible = "allwinner,sun50i-a64-r-ccu"; | |
| 561 | + compatible = "allwinner,sun8i-h3-r-ccu"; | |
| 562 | 562 | reg = <0x01f01400 0x100>; |
| 563 | − clocks = <&osc24M>, <&osc32k>, <&iosc>; | |
| 564 | − clock-names = "hosc", "losc", "iosc"; | |
| 563 | + clocks = <&osc24M>, <&osc32k>, <&iosc>, | |
| 564 | + <&ccu 9>; | |
| 565 | + clock-names = "hosc", "losc", "iosc", "pll-periph"; | |
| 565 | 566 | #clock-cells = <1>; |
| 566 | 567 | #reset-cells = <1>; |
| 567 | 568 | }; |
| @@ -1,4 +1,4 @@ | ||
| 1 | −#include <versatile-ab.dts> | |
| 1 | +#include "versatile-ab.dts" | |
| 2 | 2 | |
| 3 | 3 | / { |
| 4 | 4 | model = "ARM Versatile PB"; |
| @@ -235,7 +235,7 @@ int mcpm_cpu_power_up(unsigned int cpu, unsigned int cluster) · 234 unmodified lines | ||
| 235 | 235 | return ret; |
| 236 | 236 | } |
| 237 | 237 | |
| 238 | −typedef void (*phys_reset_t)(unsigned long); | |
| 238 | +typedef typeof(cpu_reset) phys_reset_t; | |
| 239 | 239 | |
| 240 | 240 | void mcpm_cpu_power_down(void) |
| 241 | 241 | { |
| @@ -300,7 +300,7 @@ void mcpm_cpu_power_down(void) · 58 unmodified lines | ||
| 300 | 300 | * on the CPU. |
| 301 | 301 | */ |
| 302 | 302 | phys_reset = (phys_reset_t)(unsigned long)__pa_symbol(cpu_reset); |
| 303 | − phys_reset(__pa_symbol(mcpm_entry_point)); | |
| 303 | + phys_reset(__pa_symbol(mcpm_entry_point), false); | |
| 304 | 304 | |
| 305 | 305 | /* should never get here */ |
| 306 | 306 | BUG(); |
| @@ -389,7 +389,7 @@ static int __init nocache_trampoline(unsigned long _arg) · 82 unmodified lines | ||
| 389 | 389 | __mcpm_cpu_down(cpu, cluster); |
| 390 | 390 | |
| 391 | 391 | phys_reset = (phys_reset_t)(unsigned long)__pa_symbol(cpu_reset); |
| 392 | − phys_reset(__pa_symbol(mcpm_entry_point)); | |
| 392 | + phys_reset(__pa_symbol(mcpm_entry_point), false); | |
| 393 | 393 | BUG(); |
| 394 | 394 | } |
| 395 | 395 | |
| @@ -19,7 +19,8 @@ struct dev_archdata { · 18 unmodified lines | ||
| 19 | 19 | #ifdef CONFIG_XEN |
| 20 | 20 | const struct dma_map_ops *dev_dma_ops; |
| 21 | 21 | #endif |
| 22 | − bool dma_coherent; | |
| 22 | + unsigned int dma_coherent:1; | |
| 23 | + unsigned int dma_ops_setup:1; | |
| 23 | 24 | }; |
| 24 | 25 | |
| 25 | 26 | struct omap_device; |
| @@ -66,6 +66,7 @@ typedef pte_t *pte_addr_t; · 65 unmodified lines | ||
| 66 | 66 | #define pgprot_noncached(prot) (prot) |
| 67 | 67 | #define pgprot_writecombine(prot) (prot) |
| 68 | 68 | #define pgprot_dmacoherent(prot) (prot) |
| 69 | +#define pgprot_device(prot) (prot) | |
| 69 | 70 | |
| 70 | 71 | |
| 71 | 72 | /* |
| @@ -104,7 +104,6 @@ __do_hyp_init: · 103 unmodified lines | ||
| 104 | 104 | @ - Write permission implies XN: disabled |
| 105 | 105 | @ - Instruction cache: enabled |
| 106 | 106 | @ - Data/Unified cache: enabled |
| 107 | − @ - Memory alignment checks: enabled | |
| 108 | 107 | @ - MMU: enabled (this code must be run from an identity mapping) |
| 109 | 108 | mrc p15, 4, r0, c1, c0, 0 @ HSCR |
| 110 | 109 | ldr r2, =HSCTLR_MASK |
| @@ -112,8 +111,8 @@ __do_hyp_init: · 1 unmodified line | ||
| 112 | 111 | mrc p15, 0, r1, c1, c0, 0 @ SCTLR |
| 113 | 112 | ldr r2, =(HSCTLR_EE | HSCTLR_FI | HSCTLR_I | HSCTLR_C) |
| 114 | 113 | and r1, r1, r2 |
| 115 | − ARM( ldr r2, =(HSCTLR_M | HSCTLR_A) ) | |
| 116 | − THUMB( ldr r2, =(HSCTLR_M | HSCTLR_A | HSCTLR_TE) ) | |
| 114 | + ARM( ldr r2, =(HSCTLR_M) ) | |
| 115 | + THUMB( ldr r2, =(HSCTLR_M | HSCTLR_TE) ) | |
| 117 | 116 | orr r1, r1, r2 |
| 118 | 117 | orr r0, r0, r1 |
| 119 | 118 | mcr p15, 4, r0, c1, c0, 0 @ HSCR |
| @@ -1,6 +1,7 @@ | ||
| 1 | 1 | menuconfig ARCH_AT91 |
| 2 | 2 | bool "Atmel SoCs" |
| 3 | 3 | depends on ARCH_MULTI_V4T || ARCH_MULTI_V5 || ARCH_MULTI_V7 |
| 4 | + select ARM_CPU_SUSPEND if PM | |
| 4 | 5 | select COMMON_CLK_AT91 |
| 5 | 6 | select GPIOLIB |
| 6 | 7 | select PINCTRL |
| @@ -153,7 +153,8 @@ int __init davinci_pm_init(void) · 152 unmodified lines | ||
| 153 | 153 | davinci_sram_suspend = sram_alloc(davinci_cpu_suspend_sz, NULL); |
| 154 | 154 | if (!davinci_sram_suspend) { |
| 155 | 155 | pr_err("PM: cannot allocate SRAM memory\n"); |
| 156 | − return -ENOMEM; | |
| 156 | + ret = -ENOMEM; | |
| 157 | + goto no_sram_mem; | |
| 157 | 158 | } |
| 158 | 159 | |
| 159 | 160 | davinci_sram_push(davinci_sram_suspend, davinci_cpu_suspend, |
| @@ -161,6 +162,10 @@ int __init davinci_pm_init(void) · 1 unmodified line | ||
| 161 | 162 | |
| 162 | 163 | suspend_set_ops(&davinci_pm_ops); |
| 163 | 164 | |
| 165 | + return 0; | |
| 166 | + | |
| 167 | +no_sram_mem: | |
| 168 | + iounmap(pm_config.ddrpsc_reg_base); | |
| 164 | 169 | no_ddrpsc_mem: |
| 165 | 170 | iounmap(pm_config.ddrpll_reg_base); |
| 166 | 171 | no_ddrpll_mem: |
| @@ -2311,7 +2311,14 @@ int arm_iommu_attach_device(struct device *dev, · 2310 unmodified lines | ||
| 2311 | 2311 | } |
| 2312 | 2312 | EXPORT_SYMBOL_GPL(arm_iommu_attach_device); |
| 2313 | 2313 | |
| 2314 | −static void __arm_iommu_detach_device(struct device *dev) | |
| 2314 | +/** | |
| 2315 | + * arm_iommu_detach_device | |
| 2316 | + * @dev: valid struct device pointer | |
| 2317 | + * | |
| 2318 | + * Detaches the provided device from a previously attached map. | |
| 2319 | + * This voids the dma operations (dma_map_ops pointer) | |
| 2320 | + */ | |
| 2321 | +void arm_iommu_detach_device(struct device *dev) | |
| 2315 | 2322 | { |
| 2316 | 2323 | struct dma_iommu_mapping *mapping; |
| 2317 | 2324 | |
| @@ -2324,22 +2331,10 @@ static void __arm_iommu_detach_device(struct device *dev) · 6 unmodified lines | ||
| 2324 | 2331 | iommu_detach_device(mapping->domain, dev); |
| 2325 | 2332 | kref_put(&mapping->kref, release_iommu_mapping); |
| 2326 | 2333 | to_dma_iommu_mapping(dev) = NULL; |
| 2334 | + set_dma_ops(dev, NULL); | |
| 2327 | 2335 | |
| 2328 | 2336 | pr_debug("Detached IOMMU controller from %s device.\n", dev_name(dev)); |
| 2329 | 2337 | } |
| 2330 | − | |
| 2331 | −/** | |
| 2332 | − * arm_iommu_detach_device | |
| 2333 | − * @dev: valid struct device pointer | |
| 2334 | − * | |
| 2335 | − * Detaches the provided device from a previously attached map. | |
| 2336 | − * This voids the dma operations (dma_map_ops pointer) | |
| 2337 | − */ | |
| 2338 | −void arm_iommu_detach_device(struct device *dev) | |
| 2339 | −{ | |
| 2340 | − __arm_iommu_detach_device(dev); | |
| 2341 | − set_dma_ops(dev, NULL); | |
| 2342 | −} | |
| 2343 | 2338 | EXPORT_SYMBOL_GPL(arm_iommu_detach_device); |
| 2344 | 2339 | |
| 2345 | 2340 | static const struct dma_map_ops *arm_get_iommu_dma_map_ops(bool coherent) |
| @@ -2379,7 +2374,7 @@ static void arm_teardown_iommu_dma_ops(struct device *dev) · 33 unmodified lines | ||
| 2379 | 2374 | if (!mapping) |
| 2380 | 2375 | return; |
| 2381 | 2376 | |
| 2382 | − __arm_iommu_detach_device(dev); | |
| 2377 | + arm_iommu_detach_device(dev); | |
| 2383 | 2378 | arm_iommu_release_mapping(mapping); |
| 2384 | 2379 | } |
| 2385 | 2380 | |
| @@ -2430,9 +2425,13 @@ void arch_setup_dma_ops(struct device *dev, u64 dma_base, u64 size, · 44 unmodified lines | ||
| 2430 | 2425 | dev->dma_ops = xen_dma_ops; |
| 2431 | 2426 | } |
| 2432 | 2427 | #endif |
| 2428 | + dev->archdata.dma_ops_setup = true; | |
| 2433 | 2429 | } |
| 2434 | 2430 | |
| 2435 | 2431 | void arch_teardown_dma_ops(struct device *dev) |
| 2436 | 2432 | { |
| 2433 | + if (!dev->archdata.dma_ops_setup) | |
| 2434 | + return; | |
| 2435 | + | |
| 2437 | 2436 | arm_teardown_iommu_dma_ops(dev); |
| 2438 | 2437 | } |
| @@ -90,7 +90,7 @@ arch_get_unmapped_area(struct file *filp, unsigned long addr, · 89 unmodified lines | ||
| 90 | 90 | |
| 91 | 91 | vma = find_vma(mm, addr); |
| 92 | 92 | if (TASK_SIZE - len >= addr && |
| 93 | − (!vma || addr + len <= vma->vm_start)) | |
| 93 | + (!vma || addr + len <= vm_start_gap(vma))) | |
| 94 | 94 | return addr; |
| 95 | 95 | } |
| 96 | 96 | |
| @@ -141,7 +141,7 @@ arch_get_unmapped_area_topdown(struct file *filp, const unsigned long addr0, · 44 unmodified lines | ||
| 141 | 141 | addr = PAGE_ALIGN(addr); |
| 142 | 142 | vma = find_vma(mm, addr); |
| 143 | 143 | if (TASK_SIZE - len >= addr && |
| 144 | − (!vma || addr + len <= vma->vm_start)) | |
| 144 | + (!vma || addr + len <= vm_start_gap(vma))) | |
| 145 | 145 | return addr; |
| 146 | 146 | } |
| 147 | 147 | |
| @@ -1084,10 +1084,6 @@ config SYSVIPC_COMPAT · 1083 unmodified lines | ||
| 1084 | 1084 | def_bool y |
| 1085 | 1085 | depends on COMPAT && SYSVIPC |
| 1086 | 1086 | |
| 1087 | −config KEYS_COMPAT | |
| 1088 | − def_bool y | |
| 1089 | − depends on COMPAT && KEYS | |
| 1090 | − | |
| 1091 | 1087 | endmenu |
| 1092 | 1088 | |
| 1093 | 1089 | menu "Power management options" |
| @@ -406,8 +406,9 @@ · 405 unmodified lines | ||
| 406 | 406 | r_ccu: clock@1f01400 { |
| 407 | 407 | compatible = "allwinner,sun50i-a64-r-ccu"; |
| 408 | 408 | reg = <0x01f01400 0x100>; |
| 409 | − clocks = <&osc24M>, <&osc32k>, <&iosc>; | |
| 410 | − clock-names = "hosc", "losc", "iosc"; | |
| 409 | + clocks = <&osc24M>, <&osc32k>, <&iosc>, | |
| 410 | + <&ccu 11>; | |
| 411 | + clock-names = "hosc", "losc", "iosc", "pll-periph"; | |
| 411 | 412 | #clock-cells = <1>; |
| 412 | 413 | #reset-cells = <1>; |
| 413 | 414 | }; |
| @@ -40,7 +40,7 @@ · 39 unmodified lines | ||
| 40 | 40 | * OTHER DEALINGS IN THE SOFTWARE. |
| 41 | 41 | */ |
| 42 | 42 | |
| 43 | −#include "sunxi-h3-h5.dtsi" | |
| 43 | +#include <arm/sunxi-h3-h5.dtsi> | |
| 44 | 44 | |
| 45 | 45 | / { |
| 46 | 46 | cpus { |
| @@ -1 +0,0 @@ | ||
| 1 | −../../../../arm/boot/dts/sunxi-h3-h5.dtsi | |
| @@ -231,8 +231,7 @@ · 230 unmodified lines | ||
| 231 | 231 | cpm_crypto: crypto@800000 { |
| 232 | 232 | compatible = "inside-secure,safexcel-eip197"; |
| 233 | 233 | reg = <0x800000 0x200000>; |
| 234 | − interrupts = <GIC_SPI 34 (IRQ_TYPE_EDGE_RISING | |
| 235 | − | IRQ_TYPE_LEVEL_HIGH)>, | |
| 234 | + interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>, | |
| 236 | 235 | <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>, |
| 237 | 236 | <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>, |
| 238 | 237 | <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>, |
| @@ -221,8 +221,7 @@ · 220 unmodified lines | ||
| 221 | 221 | cps_crypto: crypto@800000 { |
| 222 | 222 | compatible = "inside-secure,safexcel-eip197"; |
| 223 | 223 | reg = <0x800000 0x200000>; |
| 224 | − interrupts = <GIC_SPI 34 (IRQ_TYPE_EDGE_RISING | |
| 225 | − | IRQ_TYPE_LEVEL_HIGH)>, | |
| 224 | + interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>, | |
| 226 | 225 | <GIC_SPI 278 IRQ_TYPE_LEVEL_HIGH>, |
| 227 | 226 | <GIC_SPI 279 IRQ_TYPE_LEVEL_HIGH>, |
| 228 | 227 | <GIC_SPI 280 IRQ_TYPE_LEVEL_HIGH>, |
| @@ -68,6 +68,7 @@ CONFIG_PCIE_QCOM=y · 67 unmodified lines | ||
| 68 | 68 | CONFIG_PCIE_ARMADA_8K=y |
| 69 | 69 | CONFIG_PCI_AARDVARK=y |
| 70 | 70 | CONFIG_PCIE_RCAR=y |
| 71 | +CONFIG_PCIE_ROCKCHIP=m | |
| 71 | 72 | CONFIG_PCI_HOST_GENERIC=y |
| 72 | 73 | CONFIG_PCI_XGENE=y |
| 73 | 74 | CONFIG_ARM64_VA_BITS_48=y |
| @@ -208,6 +209,8 @@ CONFIG_BRCMFMAC=m · 134 unmodified lines | ||
| 208 | 209 | CONFIG_WL18XX=m |
| 209 | 210 | CONFIG_WLCORE_SDIO=m |
| 210 | 211 | CONFIG_INPUT_EVDEV=y |
| 212 | +CONFIG_KEYBOARD_ADC=m | |
| 213 | +CONFIG_KEYBOARD_CROS_EC=y | |
| 211 | 214 | CONFIG_KEYBOARD_GPIO=y |
| 212 | 215 | CONFIG_INPUT_MISC=y |
| 213 | 216 | CONFIG_INPUT_PM8941_PWRKEY=y |
| @@ -263,6 +266,7 @@ CONFIG_SPI_MESON_SPIFC=m · 49 unmodified lines | ||
| 263 | 266 | CONFIG_SPI_ORION=y |
| 264 | 267 | CONFIG_SPI_PL022=y |
| 265 | 268 | CONFIG_SPI_QUP=y |
| 269 | +CONFIG_SPI_ROCKCHIP=y | |
| 266 | 270 | CONFIG_SPI_S3C64XX=y |
| 267 | 271 | CONFIG_SPI_SPIDEV=m |
| 268 | 272 | CONFIG_SPMI=y |
| @@ -292,6 +296,7 @@ CONFIG_THERMAL_GOV_POWER_ALLOCATOR=y · 23 unmodified lines | ||
| 292 | 296 | CONFIG_CPU_THERMAL=y |
| 293 | 297 | CONFIG_THERMAL_EMULATION=y |
| 294 | 298 | CONFIG_EXYNOS_THERMAL=y |
| 299 | +CONFIG_ROCKCHIP_THERMAL=m | |
| 295 | 300 | CONFIG_WATCHDOG=y |
| 296 | 301 | CONFIG_S3C2410_WATCHDOG=y |
| 297 | 302 | CONFIG_MESON_GXBB_WATCHDOG=m |
| @@ -300,12 +305,14 @@ CONFIG_RENESAS_WDT=y · 2 unmodified lines | ||
| 300 | 305 | CONFIG_BCM2835_WDT=y |
| 301 | 306 | CONFIG_MFD_CROS_EC=y |
| 302 | 307 | CONFIG_MFD_CROS_EC_I2C=y |
| 308 | +CONFIG_MFD_CROS_EC_SPI=y | |
| 303 | 309 | CONFIG_MFD_EXYNOS_LPASS=m |
| 304 | 310 | CONFIG_MFD_HI655X_PMIC=y |
| 305 | 311 | CONFIG_MFD_MAX77620=y |
| 306 | 312 | CONFIG_MFD_SPMI_PMIC=y |
| 307 | 313 | CONFIG_MFD_RK808=y |
| 308 | 314 | CONFIG_MFD_SEC_CORE=y |
| 315 | +CONFIG_REGULATOR_FAN53555=y | |
| 309 | 316 | CONFIG_REGULATOR_FIXED_VOLTAGE=y |
| 310 | 317 | CONFIG_REGULATOR_GPIO=y |
| 311 | 318 | CONFIG_REGULATOR_HI655X=y |
| @@ -473,8 +480,10 @@ CONFIG_ARCH_TEGRA_186_SOC=y · 161 unmodified lines | ||
| 473 | 480 | CONFIG_EXTCON_USB_GPIO=y |
| 474 | 481 | CONFIG_IIO=y |
| 475 | 482 | CONFIG_EXYNOS_ADC=y |
| 483 | +CONFIG_ROCKCHIP_SARADC=m | |
| 476 | 484 | CONFIG_PWM=y |
| 477 | 485 | CONFIG_PWM_BCM2835=m |
| 486 | +CONFIG_PWM_CROS_EC=m | |
| 478 | 487 | CONFIG_PWM_MESON=m |
| 479 | 488 | CONFIG_PWM_ROCKCHIP=y |
| 480 | 489 | CONFIG_PWM_SAMSUNG=y |
| @@ -484,6 +493,7 @@ CONFIG_PHY_HI6220_USB=y · 3 unmodified lines | ||
| 484 | 493 | CONFIG_PHY_SUN4I_USB=y |
| 485 | 494 | CONFIG_PHY_ROCKCHIP_INNO_USB2=y |
| 486 | 495 | CONFIG_PHY_ROCKCHIP_EMMC=y |
| 496 | +CONFIG_PHY_ROCKCHIP_PCIE=m | |
| 487 | 497 | CONFIG_PHY_XGENE=y |
| 488 | 498 | CONFIG_PHY_TEGRA_XUSB=y |
| 489 | 499 | CONFIG_ARM_SCPI_PROTOCOL=y |
| @@ -23,9 +23,9 @@ · 22 unmodified lines | ||
| 23 | 23 | #define ACPI_MADT_GICC_LENGTH \ |
| 24 | 24 | (acpi_gbl_FADT.header.revision < 6 ? 76 : 80) |
| 25 | 25 | |
| 26 | −#define BAD_MADT_GICC_ENTRY(entry, end) \ | |
| 27 | − (!(entry) || (unsigned long)(entry) + sizeof(*(entry)) > (end) || \ | |
| 28 | − (entry)->header.length != ACPI_MADT_GICC_LENGTH) | |
| 26 | +#define BAD_MADT_GICC_ENTRY(entry, end) \ | |
| 27 | + (!(entry) || (entry)->header.length != ACPI_MADT_GICC_LENGTH || \ | |
| 28 | + (unsigned long)(entry) + ACPI_MADT_GICC_LENGTH > (end)) | |
| 29 | 29 | |
| 30 | 30 | /* Basic configuration for ACPI */ |
| 31 | 31 | #ifdef CONFIG_ACPI |
| @@ -286,6 +286,10 @@ · 285 unmodified lines | ||
| 286 | 286 | #define SCTLR_ELx_A (1 << 1) |
| 287 | 287 | #define SCTLR_ELx_M 1 |
| 288 | 288 | |
| 289 | +#define SCTLR_EL2_RES1 ((1 << 4) | (1 << 5) | (1 << 11) | (1 << 16) | \ | |
| 290 | + (1 << 16) | (1 << 18) | (1 << 22) | (1 << 23) | \ | |
| 291 | + (1 << 28) | (1 << 29)) | |
| 292 | + | |
| 289 | 293 | #define SCTLR_ELx_FLAGS (SCTLR_ELx_M | SCTLR_ELx_A | SCTLR_ELx_C | \ |
| 290 | 294 | SCTLR_ELx_SA | SCTLR_ELx_I) |
| 291 | 295 | |
| @@ -191,8 +191,10 @@ struct pci_bus *pci_acpi_scan_root(struct acpi_pci_root *root) · 190 unmodified lines | ||
| 191 | 191 | return NULL; |
| 192 | 192 | |
| 193 | 193 | root_ops = kzalloc_node(sizeof(*root_ops), GFP_KERNEL, node); |
| 194 | − if (!root_ops) | |
| 194 | + if (!root_ops) { | |
| 195 | + kfree(ri); | |
| 195 | 196 | return NULL; |
| 197 | + } | |
| 196 | 198 | |
| 197 | 199 | ri->cfg = pci_acpi_setup_ecam_mapping(root); |
| 198 | 200 | if (!ri->cfg) { |
| @@ -106,10 +106,13 @@ __do_hyp_init: · 105 unmodified lines | ||
| 106 | 106 | tlbi alle2 |
| 107 | 107 | dsb sy |
| 108 | 108 | |
| 109 | − mrs x4, sctlr_el2 | |
| 110 | − and x4, x4, #SCTLR_ELx_EE // preserve endianness of EL2 | |
| 111 | − ldr x5, =SCTLR_ELx_FLAGS | |
| 112 | − orr x4, x4, x5 | |
| 109 | + /* | |
| 110 | + * Preserve all the RES1 bits while setting the default flags, | |
| 111 | + * as well as the EE bit on BE. Drop the A flag since the compiler | |
| 112 | + * is allowed to generate unaligned accesses. | |
| 113 | + */ | |
| 114 | + ldr x4, =(SCTLR_EL2_RES1 | (SCTLR_ELx_FLAGS & ~SCTLR_ELx_A)) | |
| 115 | +CPU_BE( orr x4, x4, #SCTLR_ELx_EE) | |
| 113 | 116 | msr sctlr_el2, x4 |
| 114 | 117 | isb |
| 115 | 118 | |
| @@ -65,8 +65,8 @@ static bool access_gic_ctlr(struct kvm_vcpu *vcpu, struct sys_reg_params *p, · 64 unmodified lines | ||
| 65 | 65 | * Here set VMCR.CTLR in ICC_CTLR_EL1 layout. |
| 66 | 66 | * The vgic_set_vmcr() will convert to ICH_VMCR layout. |
| 67 | 67 | */ |
| 68 | − vmcr.ctlr = val & ICC_CTLR_EL1_CBPR_MASK; | |
| 69 | − vmcr.ctlr |= val & ICC_CTLR_EL1_EOImode_MASK; | |
| 68 | + vmcr.cbpr = (val & ICC_CTLR_EL1_CBPR_MASK) >> ICC_CTLR_EL1_CBPR_SHIFT; | |
| 69 | + vmcr.eoim = (val & ICC_CTLR_EL1_EOImode_MASK) >> ICC_CTLR_EL1_EOImode_SHIFT; | |
| 70 | 70 | vgic_set_vmcr(vcpu, &vmcr); |
| 71 | 71 | } else { |
| 72 | 72 | val = 0; |
| @@ -83,8 +83,8 @@ static bool access_gic_ctlr(struct kvm_vcpu *vcpu, struct sys_reg_params *p, · 10 unmodified lines | ||
| 83 | 83 | * The VMCR.CTLR value is in ICC_CTLR_EL1 layout. |
| 84 | 84 | * Extract it directly using ICC_CTLR_EL1 reg definitions. |
| 85 | 85 | */ |
| 86 | − val |= vmcr.ctlr & ICC_CTLR_EL1_CBPR_MASK; | |
| 87 | − val |= vmcr.ctlr & ICC_CTLR_EL1_EOImode_MASK; | |
| 86 | + val |= (vmcr.cbpr << ICC_CTLR_EL1_CBPR_SHIFT) & ICC_CTLR_EL1_CBPR_MASK; | |
| 87 | + val |= (vmcr.eoim << ICC_CTLR_EL1_EOImode_SHIFT) & ICC_CTLR_EL1_EOImode_MASK; | |
| 88 | 88 | |
| 89 | 89 | p->regval = val; |
| 90 | 90 | } |
| @@ -135,7 +135,7 @@ static bool access_gic_bpr1(struct kvm_vcpu *vcpu, struct sys_reg_params *p, · 44 unmodified lines | ||
| 135 | 135 | p->regval = 0; |
| 136 | 136 | |
| 137 | 137 | vgic_get_vmcr(vcpu, &vmcr); |
| 138 | − if (!((vmcr.ctlr & ICH_VMCR_CBPR_MASK) >> ICH_VMCR_CBPR_SHIFT)) { | |
| 138 | + if (!vmcr.cbpr) { | |
| 139 | 139 | if (p->is_write) { |
| 140 | 140 | vmcr.abpr = (p->regval & ICC_BPR1_EL1_MASK) >> |
| 141 | 141 | ICC_BPR1_EL1_SHIFT; |
| @@ -36,6 +36,7 @@ int bpf_jit_enable __read_mostly; · 35 unmodified lines | ||
| 36 | 36 | #define TMP_REG_1 (MAX_BPF_JIT_REG + 0) |
| 37 | 37 | #define TMP_REG_2 (MAX_BPF_JIT_REG + 1) |
| 38 | 38 | #define TCALL_CNT (MAX_BPF_JIT_REG + 2) |
| 39 | +#define TMP_REG_3 (MAX_BPF_JIT_REG + 3) | |
| 39 | 40 | |
| 40 | 41 | /* Map BPF registers to A64 registers */ |
| 41 | 42 | static const int bpf2a64[] = { |
| @@ -57,6 +58,7 @@ static const int bpf2a64[] = { · 15 unmodified lines | ||
| 57 | 58 | /* temporary registers for internal BPF JIT */ |
| 58 | 59 | [TMP_REG_1] = A64_R(10), |
| 59 | 60 | [TMP_REG_2] = A64_R(11), |
| 61 | + [TMP_REG_3] = A64_R(12), | |
| 60 | 62 | /* tail_call_cnt */ |
| 61 | 63 | [TCALL_CNT] = A64_R(26), |
| 62 | 64 | /* temporary register for blinding constants */ |
| @@ -319,6 +321,7 @@ static int build_insn(const struct bpf_insn *insn, struct jit_ctx *ctx) · 256 unmodified lines | ||
| 319 | 321 | const u8 src = bpf2a64[insn->src_reg]; |
| 320 | 322 | const u8 tmp = bpf2a64[TMP_REG_1]; |
| 321 | 323 | const u8 tmp2 = bpf2a64[TMP_REG_2]; |
| 324 | + const u8 tmp3 = bpf2a64[TMP_REG_3]; | |
| 322 | 325 | const s16 off = insn->off; |
| 323 | 326 | const s32 imm = insn->imm; |
| 324 | 327 | const int i = insn - ctx->prog->insnsi; |
| @@ -689,10 +692,10 @@ emit_cond_jmp: · 364 unmodified lines | ||
| 689 | 692 | emit(A64_PRFM(tmp, PST, L1, STRM), ctx); |
| 690 | 693 | emit(A64_LDXR(isdw, tmp2, tmp), ctx); |
| 691 | 694 | emit(A64_ADD(isdw, tmp2, tmp2, src), ctx); |
| 692 | − emit(A64_STXR(isdw, tmp2, tmp, tmp2), ctx); | |
| 695 | + emit(A64_STXR(isdw, tmp2, tmp, tmp3), ctx); | |
| 693 | 696 | jmp_offset = -3; |
| 694 | 697 | check_imm19(jmp_offset); |
| 695 | − emit(A64_CBNZ(0, tmp2, jmp_offset), ctx); | |
| 698 | + emit(A64_CBNZ(0, tmp3, jmp_offset), ctx); | |
| 696 | 699 | break; |
| 697 | 700 | |
| 698 | 701 | /* R0 = ntohx(*(size *)(((struct sk_buff *)R6)->data + imm)) */ |
| @@ -16,5 +16,11 @@ static inline cycles_t get_cycles(void) · 15 unmodified lines | ||
| 16 | 16 | #define vxtime_lock() do {} while (0) |
| 17 | 17 | #define vxtime_unlock() do {} while (0) |
| 18 | 18 | |
| 19 | +/* This attribute is used in include/linux/jiffies.h alongside with | |
| 20 | + * __cacheline_aligned_in_smp. It is assumed that __cacheline_aligned_in_smp | |
| 21 | + * for frv does not contain another section specification. | |
| 22 | + */ | |
| 23 | +#define __jiffy_arch_data __attribute__((__section__(".data"))) | |
| 24 | + | |
| 19 | 25 | #endif |
| 20 | 26 | |
| @@ -75,7 +75,7 @@ unsigned long arch_get_unmapped_area(struct file *filp, unsigned long addr, unsi · 74 unmodified lines | ||
| 75 | 75 | addr = PAGE_ALIGN(addr); |
| 76 | 76 | vma = find_vma(current->mm, addr); |
| 77 | 77 | if (TASK_SIZE - len >= addr && |
| 78 | − (!vma || addr + len <= vma->vm_start)) | |
| 78 | + (!vma || addr + len <= vm_start_gap(vma))) | |
| 79 | 79 | goto success; |
| 80 | 80 | } |
| 81 | 81 | |
| @@ -37,15 +37,14 @@ __kernel_size_t __clear_user_hexagon(void __user *dest, unsigned long count) · 36 unmodified lines | ||
| 37 | 37 | long uncleared; |
| 38 | 38 | |
| 39 | 39 | while (count > PAGE_SIZE) { |
| 40 | − uncleared = __copy_to_user_hexagon(dest, &empty_zero_page, | |
| 41 | − PAGE_SIZE); | |
| 40 | + uncleared = raw_copy_to_user(dest, &empty_zero_page, PAGE_SIZE); | |
| 42 | 41 | if (uncleared) |
| 43 | 42 | return count - (PAGE_SIZE - uncleared); |
| 44 | 43 | count -= PAGE_SIZE; |
| 45 | 44 | dest += PAGE_SIZE; |
| 46 | 45 | } |
| 47 | 46 | if (count) |
| 48 | − count = __copy_to_user_hexagon(dest, &empty_zero_page, count); | |
| 47 | + count = raw_copy_to_user(dest, &empty_zero_page, count); | |
| 49 | 48 | |
| 50 | 49 | return count; |
| 51 | 50 | } |
| @@ -128,19 +128,19 @@ quiet_cmd_cpp_its_S = ITS $@ · 127 unmodified lines | ||
| 128 | 128 | -DADDR_BITS=$(ADDR_BITS) \ |
| 129 | 129 | -DADDR_CELLS=$(itb_addr_cells) |
| 130 | 130 | |
| 131 | −$(obj)/vmlinux.its: $(srctree)/arch/mips/$(PLATFORM)/vmlinux.its.S FORCE | |
| 131 | +$(obj)/vmlinux.its: $(srctree)/arch/mips/$(PLATFORM)/vmlinux.its.S $(VMLINUX) FORCE | |
| 132 | 132 | $(call if_changed_dep,cpp_its_S,none,vmlinux.bin) |
| 133 | 133 | |
| 134 | −$(obj)/vmlinux.gz.its: $(srctree)/arch/mips/$(PLATFORM)/vmlinux.its.S FORCE | |
| 134 | +$(obj)/vmlinux.gz.its: $(srctree)/arch/mips/$(PLATFORM)/vmlinux.its.S $(VMLINUX) FORCE | |
| 135 | 135 | $(call if_changed_dep,cpp_its_S,gzip,vmlinux.bin.gz) |
| 136 | 136 | |
| 137 | −$(obj)/vmlinux.bz2.its: $(srctree)/arch/mips/$(PLATFORM)/vmlinux.its.S FORCE | |
| 137 | +$(obj)/vmlinux.bz2.its: $(srctree)/arch/mips/$(PLATFORM)/vmlinux.its.S $(VMLINUX) FORCE | |
| 138 | 138 | $(call if_changed_dep,cpp_its_S,bzip2,vmlinux.bin.bz2) |
| 139 | 139 | |
| 140 | −$(obj)/vmlinux.lzma.its: $(srctree)/arch/mips/$(PLATFORM)/vmlinux.its.S FORCE | |
| 140 | +$(obj)/vmlinux.lzma.its: $(srctree)/arch/mips/$(PLATFORM)/vmlinux.its.S $(VMLINUX) FORCE | |
| 141 | 141 | $(call if_changed_dep,cpp_its_S,lzma,vmlinux.bin.lzma) |
| 142 | 142 | |
| 143 | −$(obj)/vmlinux.lzo.its: $(srctree)/arch/mips/$(PLATFORM)/vmlinux.its.S FORCE | |
| 143 | +$(obj)/vmlinux.lzo.its: $(srctree)/arch/mips/$(PLATFORM)/vmlinux.its.S $(VMLINUX) FORCE | |
| 144 | 144 | $(call if_changed_dep,cpp_its_S,lzo,vmlinux.bin.lzo) |
| 145 | 145 | |
| 146 | 146 | quiet_cmd_itb-image = ITB $@ |
| @@ -35,7 +35,12 @@ extern pte_t *pkmap_page_table; · 34 unmodified lines | ||
| 35 | 35 | * easily, subsequent pte tables have to be allocated in one physical |
| 36 | 36 | * chunk of RAM. |
| 37 | 37 | */ |
| 38 | +#ifdef CONFIG_PHYS_ADDR_T_64BIT | |
| 39 | +#define LAST_PKMAP 512 | |
| 40 | +#else | |
| 38 | 41 | #define LAST_PKMAP 1024 |
| 42 | +#endif | |
| 43 | + | |
| 39 | 44 | #define LAST_PKMAP_MASK (LAST_PKMAP-1) |
| 40 | 45 | #define PKMAP_NR(virt) ((virt-PKMAP_BASE) >> PAGE_SHIFT) |
| 41 | 46 | #define PKMAP_ADDR(nr) (PKMAP_BASE + ((nr) << PAGE_SHIFT)) |
| @@ -43,7 +43,8 @@ typedef union mips_instruction kprobe_opcode_t; · 42 unmodified lines | ||
| 43 | 43 | |
| 44 | 44 | #define flush_insn_slot(p) \ |
| 45 | 45 | do { \ |
| 46 | − flush_icache_range((unsigned long)p->addr, \ | |
| 46 | + if (p->addr) \ | |
| 47 | + flush_icache_range((unsigned long)p->addr, \ | |
| 47 | 48 | (unsigned long)p->addr + \ |
| 48 | 49 | (MAX_INSN_SIZE * sizeof(kprobe_opcode_t))); \ |
| 49 | 50 | } while (0) |
| @@ -19,6 +19,10 @@ · 18 unmodified lines | ||
| 19 | 19 | #define __ARCH_USE_5LEVEL_HACK |
| 20 | 20 | #include <asm-generic/pgtable-nopmd.h> |
| 21 | 21 | |
| 22 | +#ifdef CONFIG_HIGHMEM | |
| 23 | +#include <asm/highmem.h> | |
| 24 | +#endif | |
| 25 | + | |
| 22 | 26 | extern int temp_tlb_entry; |
| 23 | 27 | |
| 24 | 28 | /* |
| @@ -62,7 +66,8 @@ extern int add_temporary_entry(unsigned long entrylo0, unsigned long entrylo1, · 37 unmodified lines | ||
| 62 | 66 | |
| 63 | 67 | #define VMALLOC_START MAP_BASE |
| 64 | 68 | |
| 65 | −#define PKMAP_BASE (0xfe000000UL) | |
| 69 | +#define PKMAP_END ((FIXADDR_START) & ~((LAST_PKMAP << PAGE_SHIFT)-1)) | |
| 70 | +#define PKMAP_BASE (PKMAP_END - PAGE_SIZE * LAST_PKMAP) | |
| 66 | 71 | |
| 67 | 72 | #ifdef CONFIG_HIGHMEM |
| 68 | 73 | # define VMALLOC_END (PKMAP_BASE-2*PAGE_SIZE) |
| @@ -804,8 +804,10 @@ int __compute_return_epc_for_insn(struct pt_regs *regs, · 803 unmodified lines | ||
| 804 | 804 | break; |
| 805 | 805 | } |
| 806 | 806 | /* Compact branch: BNEZC || JIALC */ |
| 807 | − if (insn.i_format.rs) | |
| 807 | + if (!insn.i_format.rs) { | |
| 808 | + /* JIALC: set $31/ra */ | |
| 808 | 809 | regs->regs[31] = epc + 4; |
| 810 | + } | |
| 809 | 811 | regs->cp0_epc += 8; |
| 810 | 812 | break; |
| 811 | 813 | #endif |
| @@ -38,20 +38,6 @@ void arch_ftrace_update_code(int command) · 37 unmodified lines | ||
| 38 | 38 | |
| 39 | 39 | #endif |
| 40 | 40 | |
| 41 | −/* | |
| 42 | − * Check if the address is in kernel space | |
| 43 | − * | |
| 44 | − * Clone core_kernel_text() from kernel/extable.c, but doesn't call | |
| 45 | − * init_kernel_text() for Ftrace doesn't trace functions in init sections. | |
| 46 | − */ | |
| 47 | −static inline int in_kernel_space(unsigned long ip) | |
| 48 | −{ | |
| 49 | − if (ip >= (unsigned long)_stext && | |
| 50 | − ip <= (unsigned long)_etext) | |
| 51 | − return 1; | |
| 52 | − return 0; | |
| 53 | −} | |
| 54 | − | |
| 55 | 41 | #ifdef CONFIG_DYNAMIC_FTRACE |
| 56 | 42 | |
| 57 | 43 | #define JAL 0x0c000000 /* jump & link: ip --> ra, jump to target */ |
| @@ -198,7 +184,7 @@ int ftrace_make_nop(struct module *mod, · 140 unmodified lines | ||
| 198 | 184 | * If ip is in kernel space, no long call, otherwise, long call is |
| 199 | 185 | * needed. |
| 200 | 186 | */ |
| 201 | − new = in_kernel_space(ip) ? INSN_NOP : INSN_B_1F; | |
| 187 | + new = core_kernel_text(ip) ? INSN_NOP : INSN_B_1F; | |
| 202 | 188 | #ifdef CONFIG_64BIT |
| 203 | 189 | return ftrace_modify_code(ip, new); |
| 204 | 190 | #else |
| @@ -218,12 +204,12 @@ int ftrace_make_call(struct dyn_ftrace *rec, unsigned long addr) · 13 unmodified lines | ||
| 218 | 204 | unsigned int new; |
| 219 | 205 | unsigned long ip = rec->ip; |
| 220 | 206 | |
| 221 | − new = in_kernel_space(ip) ? insn_jal_ftrace_caller : insn_la_mcount[0]; | |
| 207 | + new = core_kernel_text(ip) ? insn_jal_ftrace_caller : insn_la_mcount[0]; | |
| 222 | 208 | |
| 223 | 209 | #ifdef CONFIG_64BIT |
| 224 | 210 | return ftrace_modify_code(ip, new); |
| 225 | 211 | #else |
| 226 | − return ftrace_modify_code_2r(ip, new, in_kernel_space(ip) ? | |
| 212 | + return ftrace_modify_code_2r(ip, new, core_kernel_text(ip) ? | |
| 227 | 213 | INSN_NOP : insn_la_mcount[1]); |
| 228 | 214 | #endif |
| 229 | 215 | } |
| @@ -289,7 +275,7 @@ unsigned long ftrace_get_parent_ra_addr(unsigned long self_ra, unsigned long · 59 unmodified lines | ||
| 289 | 275 | * instruction "lui v1, hi_16bit_of_mcount"(offset is 24), but for |
| 290 | 276 | * kernel, move after the instruction "move ra, at"(offset is 16) |
| 291 | 277 | */ |
| 292 | − ip = self_ra - (in_kernel_space(self_ra) ? 16 : 24); | |
| 278 | + ip = self_ra - (core_kernel_text(self_ra) ? 16 : 24); | |
| 293 | 279 | |
| 294 | 280 | /* |
| 295 | 281 | * search the text until finding the non-store instruction or "s{d,w} |
| @@ -394,7 +380,7 @@ void prepare_ftrace_return(unsigned long *parent_ra_addr, unsigned long self_ra, · 98 unmodified lines | ||
| 394 | 380 | * entries configured through the tracing/set_graph_function interface. |
| 395 | 381 | */ |
| 396 | 382 | |
| 397 | − insns = in_kernel_space(self_ra) ? 2 : MCOUNT_OFFSET_INSNS + 1; | |
| 383 | + insns = core_kernel_text(self_ra) ? 2 : MCOUNT_OFFSET_INSNS + 1; | |
| 398 | 384 | trace.func = self_ra - (MCOUNT_INSN_SIZE * insns); |
| 399 | 385 | |
| 400 | 386 | /* Only trace if the calling function expects to */ |
| @@ -1597,7 +1597,6 @@ static const struct mips_perf_event *mipsxx_pmu_map_raw_event(u64 config) · 1596 unmodified lines | ||
| 1597 | 1597 | break; |
| 1598 | 1598 | case CPU_P5600: |
| 1599 | 1599 | case CPU_P6600: |
| 1600 | − case CPU_I6400: | |
| 1601 | 1600 | /* 8-bit event numbers */ |
| 1602 | 1601 | raw_id = config & 0x1ff; |
| 1603 | 1602 | base_id = raw_id & 0xff; |
| @@ -1610,6 +1609,11 @@ static const struct mips_perf_event *mipsxx_pmu_map_raw_event(u64 config) · 6 unmodified lines | ||
| 1610 | 1609 | raw_event.range = P; |
| 1611 | 1610 | #endif |
| 1612 | 1611 | break; |
| 1612 | + case CPU_I6400: | |
| 1613 | + /* 8-bit event numbers */ | |
| 1614 | + base_id = config & 0xff; | |
| 1615 | + raw_event.cntr_mask = CNTR_EVEN | CNTR_ODD; | |
| 1616 | + break; | |
| 1613 | 1617 | case CPU_1004K: |
| 1614 | 1618 | if (IS_BOTH_COUNTERS_1004K_EVENT(base_id)) |
| 1615 | 1619 | raw_event.cntr_mask = CNTR_EVEN | CNTR_ODD; |
| @@ -120,7 +120,6 @@ int copy_thread_tls(unsigned long clone_flags, unsigned long usp, · 119 unmodified lines | ||
| 120 | 120 | struct thread_info *ti = task_thread_info(p); |
| 121 | 121 | struct pt_regs *childregs, *regs = current_pt_regs(); |
| 122 | 122 | unsigned long childksp; |
| 123 | − p->set_child_tid = p->clear_child_tid = NULL; | |
| 124 | 123 | |
| 125 | 124 | childksp = (unsigned long)task_stack_page(p) + THREAD_SIZE - 32; |
| 126 | 125 | |
| @@ -93,7 +93,7 @@ static unsigned long arch_get_unmapped_area_common(struct file *filp, · 92 unmodified lines | ||
| 93 | 93 | |
| 94 | 94 | vma = find_vma(mm, addr); |
| 95 | 95 | if (TASK_SIZE - len >= addr && |
| 96 | − (!vma || addr + len <= vma->vm_start)) | |
| 96 | + (!vma || addr + len <= vm_start_gap(vma))) | |
| 97 | 97 | return addr; |
| 98 | 98 | } |
| 99 | 99 | |
| @@ -51,15 +51,15 @@ void __init pagetable_init(void) · 50 unmodified lines | ||
| 51 | 51 | /* |
| 52 | 52 | * Fixed mappings: |
| 53 | 53 | */ |
| 54 | − vaddr = __fix_to_virt(__end_of_fixed_addresses - 1) & PMD_MASK; | |
| 55 | − fixrange_init(vaddr, vaddr + FIXADDR_SIZE, pgd_base); | |
| 54 | + vaddr = __fix_to_virt(__end_of_fixed_addresses - 1); | |
| 55 | + fixrange_init(vaddr & PMD_MASK, vaddr + FIXADDR_SIZE, pgd_base); | |
| 56 | 56 | |
| 57 | 57 | #ifdef CONFIG_HIGHMEM |
| 58 | 58 | /* |
| 59 | 59 | * Permanent kmaps: |
| 60 | 60 | */ |
| 61 | 61 | vaddr = PKMAP_BASE; |
| 62 | − fixrange_init(vaddr, vaddr + PAGE_SIZE*LAST_PKMAP, pgd_base); | |
| 62 | + fixrange_init(vaddr & PMD_MASK, vaddr + PAGE_SIZE*LAST_PKMAP, pgd_base); | |
| 63 | 63 | |
| 64 | 64 | pgd = swapper_pg_dir + __pgd_offset(vaddr); |
| 65 | 65 | pud = pud_offset(pgd, vaddr); |
| @@ -167,8 +167,6 @@ copy_thread(unsigned long clone_flags, unsigned long usp, · 166 unmodified lines | ||
| 167 | 167 | |
| 168 | 168 | top_of_kernel_stack = sp; |
| 169 | 169 | |
| 170 | − p->set_child_tid = p->clear_child_tid = NULL; | |
| 171 | − | |
| 172 | 170 | /* Locate userspace context on stack... */ |
| 173 | 171 | sp -= STACK_FRAME_OVERHEAD; /* redzone */ |
| 174 | 172 | sp -= sizeof(struct pt_regs); |
| @@ -90,7 +90,7 @@ unsigned long arch_get_unmapped_area(struct file *filp, unsigned long addr, · 89 unmodified lines | ||
| 90 | 90 | unsigned long len, unsigned long pgoff, unsigned long flags) |
| 91 | 91 | { |
| 92 | 92 | struct mm_struct *mm = current->mm; |
| 93 | − struct vm_area_struct *vma; | |
| 93 | + struct vm_area_struct *vma, *prev; | |
| 94 | 94 | unsigned long task_size = TASK_SIZE; |
| 95 | 95 | int do_color_align, last_mmap; |
| 96 | 96 | struct vm_unmapped_area_info info; |
| @@ -117,9 +117,10 @@ unsigned long arch_get_unmapped_area(struct file *filp, unsigned long addr, · 20 unmodified lines | ||
| 117 | 117 | else |
| 118 | 118 | addr = PAGE_ALIGN(addr); |
| 119 | 119 | |
| 120 | − vma = find_vma(mm, addr); | |
| 120 | + vma = find_vma_prev(mm, addr, &prev); | |
| 121 | 121 | if (task_size - len >= addr && |
| 122 | − (!vma || addr + len <= vma->vm_start)) | |
| 122 | + (!vma || addr + len <= vm_start_gap(vma)) && | |
| 123 | + (!prev || addr >= vm_end_gap(prev))) | |
| 123 | 124 | goto found_addr; |
| 124 | 125 | } |
| 125 | 126 | |
| @@ -143,7 +144,7 @@ arch_get_unmapped_area_topdown(struct file *filp, const unsigned long addr0, · 17 unmodified lines | ||
| 143 | 144 | const unsigned long len, const unsigned long pgoff, |
| 144 | 145 | const unsigned long flags) |
| 145 | 146 | { |
| 146 | − struct vm_area_struct *vma; | |
| 147 | + struct vm_area_struct *vma, *prev; | |
| 147 | 148 | struct mm_struct *mm = current->mm; |
| 148 | 149 | unsigned long addr = addr0; |
| 149 | 150 | int do_color_align, last_mmap; |
| @@ -177,9 +178,11 @@ arch_get_unmapped_area_topdown(struct file *filp, const unsigned long addr0, · 27 unmodified lines | ||
| 177 | 178 | addr = COLOR_ALIGN(addr, last_mmap, pgoff); |
| 178 | 179 | else |
| 179 | 180 | addr = PAGE_ALIGN(addr); |
| 180 | − vma = find_vma(mm, addr); | |
| 181 | + | |
| 182 | + vma = find_vma_prev(mm, addr, &prev); | |
| 181 | 183 | if (TASK_SIZE - len >= addr && |
| 182 | − (!vma || addr + len <= vma->vm_start)) | |
| 184 | + (!vma || addr + len <= vm_start_gap(vma)) && | |
| 185 | + (!prev || addr >= vm_end_gap(prev))) | |
| 183 | 186 | goto found_addr; |
| 184 | 187 | } |
| 185 | 188 | |
| @@ -380,22 +380,6 @@ source "arch/powerpc/platforms/Kconfig" · 379 unmodified lines | ||
| 380 | 380 | |
| 381 | 381 | menu "Kernel options" |
| 382 | 382 | |
| 383 | −config PPC_DT_CPU_FTRS | |
| 384 | − bool "Device-tree based CPU feature discovery & setup" | |
| 385 | − depends on PPC_BOOK3S_64 | |
| 386 | − default n | |
| 387 | − help | |
| 388 | − This enables code to use a new device tree binding for describing CPU | |
| 389 | − compatibility and features. Saying Y here will attempt to use the new | |
| 390 | − binding if the firmware provides it. Currently only the skiboot | |
| 391 | − firmware provides this binding. | |
| 392 | − If you're not sure say Y. | |
| 393 | − | |
| 394 | −config PPC_CPUFEATURES_ENABLE_UNKNOWN | |
| 395 | − bool "cpufeatures pass through unknown features to guest/userspace" | |
| 396 | − depends on PPC_DT_CPU_FTRS | |
| 397 | − default y | |
| 398 | − | |
| 399 | 383 | config HIGHMEM |
| 400 | 384 | bool "High memory support" |
| 401 | 385 | depends on PPC32 |
| @@ -1215,11 +1199,6 @@ source "arch/powerpc/Kconfig.debug" · 813 unmodified lines | ||
| 1215 | 1199 | |
| 1216 | 1200 | source "security/Kconfig" |
| 1217 | 1201 | |
| 1218 | −config KEYS_COMPAT | |
| 1219 | − bool | |
| 1220 | − depends on COMPAT && KEYS | |
| 1221 | − default y | |
| 1222 | − | |
| 1223 | 1202 | source "crypto/Kconfig" |
| 1224 | 1203 | |
| 1225 | 1204 | config PPC_LIB_RHEAP |
| @@ -8,7 +8,7 @@ · 7 unmodified lines | ||
| 8 | 8 | #define H_PTE_INDEX_SIZE 9 |
| 9 | 9 | #define H_PMD_INDEX_SIZE 7 |
| 10 | 10 | #define H_PUD_INDEX_SIZE 9 |
| 11 | −#define H_PGD_INDEX_SIZE 12 | |
| 11 | +#define H_PGD_INDEX_SIZE 9 | |
| 12 | 12 | |
| 13 | 13 | #ifndef __ASSEMBLY__ |
| 14 | 14 | #define H_PTE_TABLE_SIZE (sizeof(pte_t) << H_PTE_INDEX_SIZE) |
| @@ -104,7 +104,7 @@ · 103 unmodified lines | ||
| 104 | 104 | "1: "PPC_TLNEI" %4,0\n" \ |
| 105 | 105 | _EMIT_BUG_ENTRY \ |
| 106 | 106 | : : "i" (__FILE__), "i" (__LINE__), \ |
| 107 | − "i" (BUGFLAG_TAINT(TAINT_WARN)), \ | |
| 107 | + "i" (BUGFLAG_WARNING|BUGFLAG_TAINT(TAINT_WARN)),\ | |
| 108 | 108 | "i" (sizeof(struct bug_entry)), \ |
| 109 | 109 | "r" (__ret_warn_on)); \ |
| 110 | 110 | } \ |
| @@ -214,7 +214,6 @@ enum { · 213 unmodified lines | ||
| 214 | 214 | #define CPU_FTR_DAWR LONG_ASM_CONST(0x0400000000000000) |
| 215 | 215 | #define CPU_FTR_DABRX LONG_ASM_CONST(0x0800000000000000) |
| 216 | 216 | #define CPU_FTR_PMAO_BUG LONG_ASM_CONST(0x1000000000000000) |
| 217 | −#define CPU_FTR_SUBCORE LONG_ASM_CONST(0x2000000000000000) | |
| 218 | 217 | #define CPU_FTR_POWER9_DD1 LONG_ASM_CONST(0x4000000000000000) |
| 219 | 218 | |
| 220 | 219 | #ifndef __ASSEMBLY__ |
| @@ -463,7 +462,7 @@ enum { · 242 unmodified lines | ||
| 463 | 462 | CPU_FTR_STCX_CHECKS_ADDRESS | CPU_FTR_POPCNTB | CPU_FTR_POPCNTD | \ |
| 464 | 463 | CPU_FTR_ICSWX | CPU_FTR_CFAR | CPU_FTR_HVMODE | CPU_FTR_VMX_COPY | \ |
| 465 | 464 | CPU_FTR_DBELL | CPU_FTR_HAS_PPR | CPU_FTR_DAWR | \ |
| 466 | − CPU_FTR_ARCH_207S | CPU_FTR_TM_COMP | CPU_FTR_SUBCORE) | |
| 465 | + CPU_FTR_ARCH_207S | CPU_FTR_TM_COMP) | |
| 467 | 466 | #define CPU_FTRS_POWER8E (CPU_FTRS_POWER8 | CPU_FTR_PMAO_BUG) |
| 468 | 467 | #define CPU_FTRS_POWER8_DD1 (CPU_FTRS_POWER8 & ~CPU_FTR_DBELL) |
| 469 | 468 | #define CPU_FTRS_POWER9 (CPU_FTR_USE_TB | CPU_FTR_LWSYNC | \ |
| @@ -110,13 +110,18 @@ void release_thread(struct task_struct *); · 109 unmodified lines | ||
| 110 | 110 | #define TASK_SIZE_128TB (0x0000800000000000UL) |
| 111 | 111 | #define TASK_SIZE_512TB (0x0002000000000000UL) |
| 112 | 112 | |
| 113 | −#ifdef CONFIG_PPC_BOOK3S_64 | |
| 113 | +/* | |
| 114 | + * For now 512TB is only supported with book3s and 64K linux page size. | |
| 115 | + */ | |
| 116 | +#if defined(CONFIG_PPC_BOOK3S_64) && defined(CONFIG_PPC_64K_PAGES) | |
| 114 | 117 | /* |
| 115 | 118 | * Max value currently used: |
| 116 | 119 | */ |
| 117 | −#define TASK_SIZE_USER64 TASK_SIZE_512TB | |
| 120 | +#define TASK_SIZE_USER64 TASK_SIZE_512TB | |
| 121 | +#define DEFAULT_MAP_WINDOW_USER64 TASK_SIZE_128TB | |
| 118 | 122 | #else |
| 119 | −#define TASK_SIZE_USER64 TASK_SIZE_64TB | |
| 123 | +#define TASK_SIZE_USER64 TASK_SIZE_64TB | |
| 124 | +#define DEFAULT_MAP_WINDOW_USER64 TASK_SIZE_64TB | |
| 120 | 125 | #endif |
| 121 | 126 | |
| 122 | 127 | /* |
| @@ -132,7 +137,7 @@ void release_thread(struct task_struct *); · 9 unmodified lines | ||
| 132 | 137 | * space during mmap's. |
| 133 | 138 | */ |
| 134 | 139 | #define TASK_UNMAPPED_BASE_USER32 (PAGE_ALIGN(TASK_SIZE_USER32 / 4)) |
| 135 | −#define TASK_UNMAPPED_BASE_USER64 (PAGE_ALIGN(TASK_SIZE_128TB / 4)) | |
| 140 | +#define TASK_UNMAPPED_BASE_USER64 (PAGE_ALIGN(DEFAULT_MAP_WINDOW_USER64 / 4)) | |
| 136 | 141 | |
| 137 | 142 | #define TASK_UNMAPPED_BASE ((is_32bit_task()) ? \ |
| 138 | 143 | TASK_UNMAPPED_BASE_USER32 : TASK_UNMAPPED_BASE_USER64 ) |
| @@ -143,21 +148,15 @@ void release_thread(struct task_struct *); · 4 unmodified lines | ||
| 143 | 148 | * with 128TB and conditionally enable upto 512TB |
| 144 | 149 | */ |
| 145 | 150 | #ifdef CONFIG_PPC_BOOK3S_64 |
| 146 | −#define DEFAULT_MAP_WINDOW ((is_32bit_task()) ? \ | |
| 147 | − TASK_SIZE_USER32 : TASK_SIZE_128TB) | |
| 151 | +#define DEFAULT_MAP_WINDOW ((is_32bit_task()) ? \ | |
| 152 | + TASK_SIZE_USER32 : DEFAULT_MAP_WINDOW_USER64) | |
| 148 | 153 | #else |
| 149 | 154 | #define DEFAULT_MAP_WINDOW TASK_SIZE |
| 150 | 155 | #endif |
| 151 | 156 | |
| 152 | 157 | #ifdef __powerpc64__ |
| 153 | 158 | |
| 154 | −#ifdef CONFIG_PPC_BOOK3S_64 | |
| 155 | −/* Limit stack to 128TB */ | |
| 156 | −#define STACK_TOP_USER64 TASK_SIZE_128TB | |
| 157 | −#else | |
| 158 | −#define STACK_TOP_USER64 TASK_SIZE_USER64 | |
| 159 | −#endif | |
| 160 | − | |
| 159 | +#define STACK_TOP_USER64 DEFAULT_MAP_WINDOW_USER64 | |
| 161 | 160 | #define STACK_TOP_USER32 TASK_SIZE_USER32 |
| 162 | 161 | |
| 163 | 162 | #define STACK_TOP (is_32bit_task() ? \ |
| @@ -44,8 +44,22 @@ extern void __init dump_numa_cpu_topology(void); · 43 unmodified lines | ||
| 44 | 44 | extern int sysfs_add_device_to_node(struct device *dev, int nid); |
| 45 | 45 | extern void sysfs_remove_device_from_node(struct device *dev, int nid); |
| 46 | 46 | |
| 47 | +static inline int early_cpu_to_node(int cpu) | |
| 48 | +{ | |
| 49 | + int nid; | |
| 50 | + | |
| 51 | + nid = numa_cpu_lookup_table[cpu]; | |
| 52 | + | |
| 53 | + /* | |
| 54 | + * Fall back to node 0 if nid is unset (it should be, except bugs). | |
| 55 | + * This allows callers to safely do NODE_DATA(early_cpu_to_node(cpu)). | |
| 56 | + */ | |
| 57 | + return (nid < 0) ? 0 : nid; | |
| 58 | +} | |
| 47 | 59 | #else |
| 48 | 60 | |
| 61 | +static inline int early_cpu_to_node(int cpu) { return 0; } | |
| 62 | + | |
| 49 | 63 | static inline void dump_numa_cpu_topology(void) {} |
| 50 | 64 | |
| 51 | 65 | static inline int sysfs_add_device_to_node(struct device *dev, int nid) |
| @@ -94,11 +94,13 @@ struct xive_q { · 93 unmodified lines | ||
| 94 | 94 | * store at 0 and some ESBs support doing a trigger via a |
| 95 | 95 | * separate trigger page. |
| 96 | 96 | */ |
| 97 | −#define XIVE_ESB_GET 0x800 | |
| 98 | −#define XIVE_ESB_SET_PQ_00 0xc00 | |
| 99 | −#define XIVE_ESB_SET_PQ_01 0xd00 | |
| 100 | −#define XIVE_ESB_SET_PQ_10 0xe00 | |
| 101 | −#define XIVE_ESB_SET_PQ_11 0xf00 | |
| 97 | +#define XIVE_ESB_STORE_EOI 0x400 /* Store */ | |
| 98 | +#define XIVE_ESB_LOAD_EOI 0x000 /* Load */ | |
| 99 | +#define XIVE_ESB_GET 0x800 /* Load */ | |
| 100 | +#define XIVE_ESB_SET_PQ_00 0xc00 /* Load */ | |
| 101 | +#define XIVE_ESB_SET_PQ_01 0xd00 /* Load */ | |
| 102 | +#define XIVE_ESB_SET_PQ_10 0xe00 /* Load */ | |
| 103 | +#define XIVE_ESB_SET_PQ_11 0xf00 /* Load */ | |
| 102 | 104 | |
| 103 | 105 | #define XIVE_ESB_VAL_P 0x2 |
| 104 | 106 | #define XIVE_ESB_VAL_Q 0x1 |
| @@ -8,6 +8,7 @@ · 7 unmodified lines | ||
| 8 | 8 | #include <linux/export.h> |
| 9 | 9 | #include <linux/init.h> |
| 10 | 10 | #include <linux/jump_label.h> |
| 11 | +#include <linux/libfdt.h> | |
| 11 | 12 | #include <linux/memblock.h> |
| 12 | 13 | #include <linux/printk.h> |
| 13 | 14 | #include <linux/sched.h> |
| @@ -642,7 +643,6 @@ static struct dt_cpu_feature_match __initdata · 628 unmodified lines | ||
| 642 | 643 | {"processor-control-facility", feat_enable_dbell, CPU_FTR_DBELL}, |
| 643 | 644 | {"processor-control-facility-v3", feat_enable_dbell, CPU_FTR_DBELL}, |
| 644 | 645 | {"processor-utilization-of-resources-register", feat_enable_purr, 0}, |
| 645 | − {"subcore", feat_enable, CPU_FTR_SUBCORE}, | |
| 646 | 646 | {"no-execute", feat_enable, 0}, |
| 647 | 647 | {"strong-access-ordering", feat_enable, CPU_FTR_SAO}, |
| 648 | 648 | {"cache-inhibited-large-page", feat_enable_large_ci, 0}, |
| @@ -671,12 +671,24 @@ static struct dt_cpu_feature_match __initdata · 22 unmodified lines | ||
| 671 | 671 | {"wait-v3", feat_enable, 0}, |
| 672 | 672 | }; |
| 673 | 673 | |
| 674 | −/* XXX: how to configure this? Default + boot time? */ | |
| 675 | −#ifdef CONFIG_PPC_CPUFEATURES_ENABLE_UNKNOWN | |
| 676 | −#define CPU_FEATURE_ENABLE_UNKNOWN 1 | |
| 677 | −#else | |
| 678 | −#define CPU_FEATURE_ENABLE_UNKNOWN 0 | |
| 679 | −#endif | |
| 674 | +static bool __initdata using_dt_cpu_ftrs; | |
| 675 | +static bool __initdata enable_unknown = true; | |
| 676 | + | |
| 677 | +static int __init dt_cpu_ftrs_parse(char *str) | |
| 678 | +{ | |
| 679 | + if (!str) | |
| 680 | + return 0; | |
| 681 | + | |
| 682 | + if (!strcmp(str, "off")) | |
| 683 | + using_dt_cpu_ftrs = false; | |
| 684 | + else if (!strcmp(str, "known")) | |
| 685 | + enable_unknown = false; | |
| 686 | + else | |
| 687 | + return 1; | |
| 688 | + | |
| 689 | + return 0; | |
| 690 | +} | |
| 691 | +early_param("dt_cpu_ftrs", dt_cpu_ftrs_parse); | |
| 680 | 692 | |
| 681 | 693 | static void __init cpufeatures_setup_start(u32 isa) |
| 682 | 694 | { |
| @@ -707,7 +719,7 @@ static bool __init cpufeatures_process_feature(struct dt_cpu_feature *f) · 24 unmodified lines | ||
| 707 | 719 | } |
| 708 | 720 | } |
| 709 | 721 | |
| 710 | − if (!known && CPU_FEATURE_ENABLE_UNKNOWN) { | |
| 722 | + if (!known && enable_unknown) { | |
| 711 | 723 | if (!feat_try_enable_unknown(f)) { |
| 712 | 724 | pr_info("not enabling: %s (unknown and unsupported by kernel)\n", |
| 713 | 725 | f->name); |
| @@ -756,6 +768,26 @@ static void __init cpufeatures_setup_finished(void) · 42 unmodified lines | ||
| 756 | 768 | cur_cpu_spec->cpu_features, cur_cpu_spec->mmu_features); |
| 757 | 769 | } |
| 758 | 770 | |
| 771 | +static int __init disabled_on_cmdline(void) | |
| 772 | +{ | |
| 773 | + unsigned long root, chosen; | |
| 774 | + const char *p; | |
| 775 | + | |
| 776 | + root = of_get_flat_dt_root(); | |
| 777 | + chosen = of_get_flat_dt_subnode_by_name(root, "chosen"); | |
| 778 | + if (chosen == -FDT_ERR_NOTFOUND) | |
| 779 | + return false; | |
| 780 | + | |
| 781 | + p = of_get_flat_dt_prop(chosen, "bootargs", NULL); | |
| 782 | + if (!p) | |
| 783 | + return false; | |
| 784 | + | |
| 785 | + if (strstr(p, "dt_cpu_ftrs=off")) | |
| 786 | + return true; | |
| 787 | + | |
| 788 | + return false; | |
| 789 | +} | |
| 790 | + | |
| 759 | 791 | static int __init fdt_find_cpu_features(unsigned long node, const char *uname, |
| 760 | 792 | int depth, void *data) |
| 761 | 793 | { |
| @@ -766,8 +798,6 @@ static int __init fdt_find_cpu_features(unsigned long node, const char *uname, · 4 unmodified lines | ||
| 766 | 798 | return 0; |
| 767 | 799 | } |
| 768 | 800 | |
| 769 | −static bool __initdata using_dt_cpu_ftrs = false; | |
| 770 | − | |
| 771 | 801 | bool __init dt_cpu_ftrs_in_use(void) |
| 772 | 802 | { |
| 773 | 803 | return using_dt_cpu_ftrs; |
| @@ -775,6 +805,8 @@ bool __init dt_cpu_ftrs_in_use(void) · 1 unmodified line | ||
| 775 | 805 | |
| 776 | 806 | bool __init dt_cpu_ftrs_init(void *fdt) |
| 777 | 807 | { |
| 808 | + using_dt_cpu_ftrs = false; | |
| 809 | + | |
| 778 | 810 | /* Setup and verify the FDT, if it fails we just bail */ |
| 779 | 811 | if (!early_init_dt_verify(fdt)) |
| 780 | 812 | return false; |
| @@ -782,6 +814,9 @@ bool __init dt_cpu_ftrs_init(void *fdt) · 1 unmodified line | ||
| 782 | 814 | if (!of_scan_flat_dt(fdt_find_cpu_features, NULL)) |
| 783 | 815 | return false; |
| 784 | 816 | |
| 817 | + if (disabled_on_cmdline()) | |
| 818 | + return false; | |
| 819 | + | |
| 785 | 820 | cpufeatures_setup_cpu(); |
| 786 | 821 | |
| 787 | 822 | using_dt_cpu_ftrs = true; |
| @@ -1027,5 +1062,8 @@ static int __init dt_cpu_ftrs_scan_callback(unsigned long node, const char · 239 unmodified lines | ||
| 1027 | 1062 | |
| 1028 | 1063 | void __init dt_cpu_ftrs_scan(void) |
| 1029 | 1064 | { |
| 1065 | + if (!using_dt_cpu_ftrs) | |
| 1066 | + return; | |
| 1067 | + | |
| 1030 | 1068 | of_scan_flat_dt(dt_cpu_ftrs_scan_callback, NULL); |
| 1031 | 1069 | } |
| @@ -1666,6 +1666,7 @@ void start_thread(struct pt_regs *regs, unsigned long start, unsigned long sp) · 1665 unmodified lines | ||
| 1666 | 1666 | #ifdef CONFIG_VSX |
| 1667 | 1667 | current->thread.used_vsr = 0; |
| 1668 | 1668 | #endif |
| 1669 | + current->thread.load_fp = 0; | |
| 1669 | 1670 | memset(¤t->thread.fp_state, 0, sizeof(current->thread.fp_state)); |
| 1670 | 1671 | current->thread.fp_save_area = NULL; |
| 1671 | 1672 | #ifdef CONFIG_ALTIVEC |
| @@ -1674,6 +1675,7 @@ void start_thread(struct pt_regs *regs, unsigned long start, unsigned long sp) · 2 unmodified lines | ||
| 1674 | 1675 | current->thread.vr_save_area = NULL; |
| 1675 | 1676 | current->thread.vrsave = 0; |
| 1676 | 1677 | current->thread.used_vr = 0; |
| 1678 | + current->thread.load_vec = 0; | |
| 1677 | 1679 | #endif /* CONFIG_ALTIVEC */ |
| 1678 | 1680 | #ifdef CONFIG_SPE |
| 1679 | 1681 | memset(current->thread.evr, 0, sizeof(current->thread.evr)); |
| @@ -1685,6 +1687,7 @@ void start_thread(struct pt_regs *regs, unsigned long start, unsigned long sp) · 5 unmodified lines | ||
| 1685 | 1687 | current->thread.tm_tfhar = 0; |
| 1686 | 1688 | current->thread.tm_texasr = 0; |
| 1687 | 1689 | current->thread.tm_tfiar = 0; |
| 1690 | + current->thread.load_tm = 0; | |
| 1688 | 1691 | #endif /* CONFIG_PPC_TRANSACTIONAL_MEM */ |
| 1689 | 1692 | } |
| 1690 | 1693 | EXPORT_SYMBOL(start_thread); |
| @@ -928,7 +928,7 @@ void __init setup_arch(char **cmdline_p) · 927 unmodified lines | ||
| 928 | 928 | |
| 929 | 929 | #ifdef CONFIG_PPC_MM_SLICES |
| 930 | 930 | #ifdef CONFIG_PPC64 |
| 931 | − init_mm.context.addr_limit = TASK_SIZE_128TB; | |
| 931 | + init_mm.context.addr_limit = DEFAULT_MAP_WINDOW_USER64; | |
| 932 | 932 | #else |
| 933 | 933 | #error "context.addr_limit not initialized." |
| 934 | 934 | #endif |
| @@ -661,7 +661,7 @@ void __init emergency_stack_init(void) · 660 unmodified lines | ||
| 661 | 661 | |
| 662 | 662 | static void * __init pcpu_fc_alloc(unsigned int cpu, size_t size, size_t align) |
| 663 | 663 | { |
| 664 | − return __alloc_bootmem_node(NODE_DATA(cpu_to_node(cpu)), size, align, | |
| 664 | + return __alloc_bootmem_node(NODE_DATA(early_cpu_to_node(cpu)), size, align, | |
| 665 | 665 | __pa(MAX_DMA_ADDRESS)); |
| 666 | 666 | } |
| 667 | 667 | |
| @@ -672,7 +672,7 @@ static void __init pcpu_fc_free(void *ptr, size_t size) · 4 unmodified lines | ||
| 672 | 672 | |
| 673 | 673 | static int pcpu_cpu_distance(unsigned int from, unsigned int to) |
| 674 | 674 | { |
| 675 | − if (cpu_to_node(from) == cpu_to_node(to)) | |
| 675 | + if (early_cpu_to_node(from) == early_cpu_to_node(to)) | |
| 676 | 676 | return LOCAL_DISTANCE; |
| 677 | 677 | else |
| 678 | 678 | return REMOTE_DISTANCE; |
| @@ -69,7 +69,7 @@ static void GLUE(X_PFX,source_eoi)(u32 hw_irq, struct xive_irq_data *xd) · 68 unmodified lines | ||
| 69 | 69 | { |
| 70 | 70 | /* If the XIVE supports the new "store EOI facility, use it */ |
| 71 | 71 | if (xd->flags & XIVE_IRQ_FLAG_STORE_EOI) |
| 72 | − __x_writeq(0, __x_eoi_page(xd)); | |
| 72 | + __x_writeq(0, __x_eoi_page(xd) + XIVE_ESB_STORE_EOI); | |
| 73 | 73 | else if (hw_irq && xd->flags & XIVE_IRQ_FLAG_EOI_FW) { |
| 74 | 74 | opal_int_eoi(hw_irq); |
| 75 | 75 | } else { |
| @@ -89,7 +89,7 @@ static void GLUE(X_PFX,source_eoi)(u32 hw_irq, struct xive_irq_data *xd) · 13 unmodified lines | ||
| 89 | 89 | * properly. |
| 90 | 90 | */ |
| 91 | 91 | if (xd->flags & XIVE_IRQ_FLAG_LSI) |
| 92 | − __x_readq(__x_eoi_page(xd)); | |
| 92 | + __x_readq(__x_eoi_page(xd) + XIVE_ESB_LOAD_EOI); | |
| 93 | 93 | else { |
| 94 | 94 | eoi_val = GLUE(X_PFX,esb_load)(xd, XIVE_ESB_SET_PQ_00); |
| 95 | 95 | |
| @@ -68,7 +68,7 @@ radix__hugetlb_get_unmapped_area(struct file *file, unsigned long addr, · 67 unmodified lines | ||
| 68 | 68 | addr = ALIGN(addr, huge_page_size(h)); |
| 69 | 69 | vma = find_vma(mm, addr); |
| 70 | 70 | if (mm->task_size - len >= addr && |
| 71 | − (!vma || addr + len <= vma->vm_start)) | |
| 71 | + (!vma || addr + len <= vm_start_gap(vma))) | |
| 72 | 72 | return addr; |
| 73 | 73 | } |
| 74 | 74 | /* |
| @@ -112,7 +112,7 @@ radix__arch_get_unmapped_area(struct file *filp, unsigned long addr, · 111 unmodified lines | ||
| 112 | 112 | addr = PAGE_ALIGN(addr); |
| 113 | 113 | vma = find_vma(mm, addr); |
| 114 | 114 | if (mm->task_size - len >= addr && addr >= mmap_min_addr && |
| 115 | − (!vma || addr + len <= vma->vm_start)) | |
| 115 | + (!vma || addr + len <= vm_start_gap(vma))) | |
| 116 | 116 | return addr; |
| 117 | 117 | } |
| 118 | 118 | |
| @@ -157,7 +157,7 @@ radix__arch_get_unmapped_area_topdown(struct file *filp, · 38 unmodified lines | ||
| 157 | 157 | addr = PAGE_ALIGN(addr); |
| 158 | 158 | vma = find_vma(mm, addr); |
| 159 | 159 | if (mm->task_size - len >= addr && addr >= mmap_min_addr && |
| 160 | − (!vma || addr + len <= vma->vm_start)) | |
| 160 | + (!vma || addr + len <= vm_start_gap(vma))) | |
| 161 | 161 | return addr; |
| 162 | 162 | } |
| 163 | 163 | |
| @@ -99,7 +99,7 @@ static int hash__init_new_context(struct mm_struct *mm) · 98 unmodified lines | ||
| 99 | 99 | * mm->context.addr_limit. Default to max task size so that we copy the |
| 100 | 100 | * default values to paca which will help us to handle slb miss early. |
| 101 | 101 | */ |
| 102 | − mm->context.addr_limit = TASK_SIZE_128TB; | |
| 102 | + mm->context.addr_limit = DEFAULT_MAP_WINDOW_USER64; | |
| 103 | 103 | |
| 104 | 104 | /* |
| 105 | 105 | * The old code would re-promote on fork, we don't do that when using |
| @@ -99,7 +99,7 @@ static int slice_area_is_free(struct mm_struct *mm, unsigned long addr, · 98 unmodified lines | ||
| 99 | 99 | if ((mm->task_size - len) < addr) |
| 100 | 100 | return 0; |
| 101 | 101 | vma = find_vma(mm, addr); |
| 102 | − return (!vma || (addr + len) <= vma->vm_start); | |
| 102 | + return (!vma || (addr + len) <= vm_start_gap(vma)); | |
| 103 | 103 | } |
| 104 | 104 | |
| 105 | 105 | static int slice_low_has_vma(struct mm_struct *mm, unsigned long slice) |
| @@ -402,7 +402,7 @@ static struct power_pmu power9_isa207_pmu = { · 401 unmodified lines | ||
| 402 | 402 | .name = "POWER9", |
| 403 | 403 | .n_counter = MAX_PMU_COUNTERS, |
| 404 | 404 | .add_fields = ISA207_ADD_FIELDS, |
| 405 | − .test_adder = ISA207_TEST_ADDER, | |
| 405 | + .test_adder = P9_DD1_TEST_ADDER, | |
| 406 | 406 | .compute_mmcr = isa207_compute_mmcr, |
| 407 | 407 | .config_bhrb = power9_config_bhrb, |
| 408 | 408 | .bhrb_filter_map = power9_bhrb_filter_map, |
| @@ -421,7 +421,7 @@ static struct power_pmu power9_pmu = { · 12 unmodified lines | ||
| 421 | 421 | .name = "POWER9", |
| 422 | 422 | .n_counter = MAX_PMU_COUNTERS, |
| 423 | 423 | .add_fields = ISA207_ADD_FIELDS, |
| 424 | − .test_adder = P9_DD1_TEST_ADDER, | |
| 424 | + .test_adder = ISA207_TEST_ADDER, | |
| 425 | 425 | .compute_mmcr = isa207_compute_mmcr, |
| 426 | 426 | .config_bhrb = power9_config_bhrb, |
| 427 | 427 | .bhrb_filter_map = power9_bhrb_filter_map, |
| @@ -59,6 +59,17 @@ config PPC_OF_BOOT_TRAMPOLINE · 58 unmodified lines | ||
| 59 | 59 | |
| 60 | 60 | In case of doubt, say Y |
| 61 | 61 | |
| 62 | +config PPC_DT_CPU_FTRS | |
| 63 | + bool "Device-tree based CPU feature discovery & setup" | |
| 64 | + depends on PPC_BOOK3S_64 | |
| 65 | + default y | |
| 66 | + help | |
| 67 | + This enables code to use a new device tree binding for describing CPU | |
| 68 | + compatibility and features. Saying Y here will attempt to use the new | |
| 69 | + binding if the firmware provides it. Currently only the skiboot | |
| 70 | + firmware provides this binding. | |
| 71 | + If you're not sure say Y. | |
| 72 | + | |
| 62 | 73 | config UDBG_RTAS_CONSOLE |
| 63 | 74 | bool "RTAS based debug console" |
| 64 | 75 | depends on PPC_RTAS |
| @@ -175,6 +175,8 @@ static int spufs_arch_write_note(struct spu_context *ctx, int i, · 174 unmodified lines | ||
| 175 | 175 | skip = roundup(cprm->pos - total + sz, 4) - cprm->pos; |
| 176 | 176 | if (!dump_skip(cprm, skip)) |
| 177 | 177 | goto Eio; |
| 178 | + | |
| 179 | + rc = 0; | |
| 178 | 180 | out: |
| 179 | 181 | free_page((unsigned long)buf); |
| 180 | 182 | return rc; |
| @@ -75,7 +75,8 @@ struct pci_dev *pnv_pci_get_npu_dev(struct pci_dev *gpdev, int index) · 74 unmodified lines | ||
| 75 | 75 | if (WARN_ON(!gpdev)) |
| 76 | 76 | return NULL; |
| 77 | 77 | |
| 78 | − if (WARN_ON(!gpdev->dev.of_node)) | |
| 78 | + /* Not all PCI devices have device-tree nodes */ | |
| 79 | + if (!gpdev->dev.of_node) | |
| 79 | 80 | return NULL; |
| 80 | 81 | |
| 81 | 82 | /* Get assoicated PCI device */ |
| @@ -407,7 +407,13 @@ static DEVICE_ATTR(subcores_per_core, 0644, · 406 unmodified lines | ||
| 407 | 407 | |
| 408 | 408 | static int subcore_init(void) |
| 409 | 409 | { |
| 410 | − if (!cpu_has_feature(CPU_FTR_SUBCORE)) | |
| 410 | + unsigned pvr_ver; | |
| 411 | + | |
| 412 | + pvr_ver = PVR_VER(mfspr(SPRN_PVR)); | |
| 413 | + | |
| 414 | + if (pvr_ver != PVR_POWER8 && | |
| 415 | + pvr_ver != PVR_POWER8E && | |
| 416 | + pvr_ver != PVR_POWER8NVL) | |
| 411 | 417 | return 0; |
| 412 | 418 | |
| 413 | 419 | /* |
| @@ -124,6 +124,7 @@ static struct property *dlpar_clone_drconf_property(struct device_node *dn) · 123 unmodified lines | ||
| 124 | 124 | for (i = 0; i < num_lmbs; i++) { |
| 125 | 125 | lmbs[i].base_addr = be64_to_cpu(lmbs[i].base_addr); |
| 126 | 126 | lmbs[i].drc_index = be32_to_cpu(lmbs[i].drc_index); |
| 127 | + lmbs[i].aa_index = be32_to_cpu(lmbs[i].aa_index); | |
| 127 | 128 | lmbs[i].flags = be32_to_cpu(lmbs[i].flags); |
| 128 | 129 | } |
| 129 | 130 | |
| @@ -147,6 +148,7 @@ static void dlpar_update_drconf_property(struct device_node *dn, · 17 unmodified lines | ||
| 147 | 148 | for (i = 0; i < num_lmbs; i++) { |
| 148 | 149 | lmbs[i].base_addr = cpu_to_be64(lmbs[i].base_addr); |
| 149 | 150 | lmbs[i].drc_index = cpu_to_be32(lmbs[i].drc_index); |
| 151 | + lmbs[i].aa_index = cpu_to_be32(lmbs[i].aa_index); | |
| 150 | 152 | lmbs[i].flags = cpu_to_be32(lmbs[i].flags); |
| 151 | 153 | } |
| 152 | 154 | |
| @@ -75,7 +75,8 @@ static int u8_gpio_dir_out(struct gpio_chip *gc, unsigned int gpio, int val) · 74 unmodified lines | ||
| 75 | 75 | |
| 76 | 76 | static void u8_gpio_save_regs(struct of_mm_gpio_chip *mm_gc) |
| 77 | 77 | { |
| 78 | − struct u8_gpio_chip *u8_gc = gpiochip_get_data(&mm_gc->gc); | |
| 78 | + struct u8_gpio_chip *u8_gc = | |
| 79 | + container_of(mm_gc, struct u8_gpio_chip, mm_gc); | |
| 79 | 80 | |
| 80 | 81 | u8_gc->data = in_8(mm_gc->regs); |
| 81 | 82 | } |
| @@ -297,7 +297,7 @@ void xive_do_source_eoi(u32 hw_irq, struct xive_irq_data *xd) · 296 unmodified lines | ||
| 297 | 297 | { |
| 298 | 298 | /* If the XIVE supports the new "store EOI facility, use it */ |
| 299 | 299 | if (xd->flags & XIVE_IRQ_FLAG_STORE_EOI) |
| 300 | − out_be64(xd->eoi_mmio, 0); | |
| 300 | + out_be64(xd->eoi_mmio + XIVE_ESB_STORE_EOI, 0); | |
| 301 | 301 | else if (hw_irq && xd->flags & XIVE_IRQ_FLAG_EOI_FW) { |
| 302 | 302 | /* |
| 303 | 303 | * The FW told us to call it. This happens for some |
| @@ -363,9 +363,6 @@ config COMPAT · 362 unmodified lines | ||
| 363 | 363 | config SYSVIPC_COMPAT |
| 364 | 364 | def_bool y if COMPAT && SYSVIPC |
| 365 | 365 | |
| 366 | −config KEYS_COMPAT | |
| 367 | − def_bool y if COMPAT && KEYS | |
| 368 | − | |
| 369 | 366 | config SMP |
| 370 | 367 | def_bool y |
| 371 | 368 | prompt "Symmetric multi-processing support" |
| @@ -30,6 +30,7 @@ CONFIG_USER_NS=y · 29 unmodified lines | ||
| 30 | 30 | CONFIG_SCHED_AUTOGROUP=y |
| 31 | 31 | CONFIG_BLK_DEV_INITRD=y |
| 32 | 32 | CONFIG_EXPERT=y |
| 33 | +# CONFIG_SYSFS_SYSCALL is not set | |
| 33 | 34 | CONFIG_BPF_SYSCALL=y |
| 34 | 35 | CONFIG_USERFAULTFD=y |
| 35 | 36 | # CONFIG_COMPAT_BRK is not set |
| @@ -44,7 +45,10 @@ CONFIG_MODULE_UNLOAD=y · 8 unmodified lines | ||
| 44 | 45 | CONFIG_MODULE_FORCE_UNLOAD=y |
| 45 | 46 | CONFIG_MODVERSIONS=y |
| 46 | 47 | CONFIG_MODULE_SRCVERSION_ALL=y |
| 48 | +CONFIG_BLK_DEV_INTEGRITY=y | |
| 47 | 49 | CONFIG_BLK_DEV_THROTTLING=y |
| 50 | +CONFIG_BLK_WBT=y | |
| 51 | +CONFIG_BLK_WBT_SQ=y | |
| 48 | 52 | CONFIG_PARTITION_ADVANCED=y |
| 49 | 53 | CONFIG_IBM_PARTITION=y |
| 50 | 54 | CONFIG_BSD_DISKLABEL=y |
| @@ -90,6 +94,8 @@ CONFIG_UNIX=y · 39 unmodified lines | ||
| 90 | 94 | CONFIG_UNIX_DIAG=m |
| 91 | 95 | CONFIG_XFRM_USER=m |
| 92 | 96 | CONFIG_NET_KEY=m |
| 97 | +CONFIG_SMC=m | |
| 98 | +CONFIG_SMC_DIAG=m | |
| 93 | 99 | CONFIG_INET=y |
| 94 | 100 | CONFIG_IP_MULTICAST=y |
| 95 | 101 | CONFIG_IP_ADVANCED_ROUTER=y |
| @@ -359,6 +365,7 @@ CONFIG_NET_ACT_SIMP=m · 263 unmodified lines | ||
| 359 | 365 | CONFIG_NET_ACT_SKBEDIT=m |
| 360 | 366 | CONFIG_NET_ACT_CSUM=m |
| 361 | 367 | CONFIG_DNS_RESOLVER=y |
| 368 | +CONFIG_NETLINK_DIAG=m | |
| 362 | 369 | CONFIG_CGROUP_NET_PRIO=y |
| 363 | 370 | CONFIG_BPF_JIT=y |
| 364 | 371 | CONFIG_NET_PKTGEN=m |
| @@ -367,16 +374,19 @@ CONFIG_DEVTMPFS=y · 2 unmodified lines | ||
| 367 | 374 | CONFIG_DMA_CMA=y |
| 368 | 375 | CONFIG_CMA_SIZE_MBYTES=0 |
| 369 | 376 | CONFIG_CONNECTOR=y |
| 377 | +CONFIG_ZRAM=m | |
| 370 | 378 | CONFIG_BLK_DEV_LOOP=m |
| 371 | 379 | CONFIG_BLK_DEV_CRYPTOLOOP=m |
| 380 | +CONFIG_BLK_DEV_DRBD=m | |
| 372 | 381 | CONFIG_BLK_DEV_NBD=m |
| 373 | 382 | CONFIG_BLK_DEV_OSD=m |
| 374 | 383 | CONFIG_BLK_DEV_RAM=y |
| 375 | 384 | CONFIG_BLK_DEV_RAM_SIZE=32768 |
| 376 | −CONFIG_CDROM_PKTCDVD=m | |
| 377 | −CONFIG_ATA_OVER_ETH=m | |
| 385 | +CONFIG_BLK_DEV_RAM_DAX=y | |
| 378 | 386 | CONFIG_VIRTIO_BLK=y |
| 387 | +CONFIG_BLK_DEV_RBD=m | |
| 379 | 388 | CONFIG_ENCLOSURE_SERVICES=m |
| 389 | +CONFIG_GENWQE=m | |
| 380 | 390 | CONFIG_RAID_ATTRS=m |
| 381 | 391 | CONFIG_SCSI=y |
| 382 | 392 | CONFIG_BLK_DEV_SD=y |
| @@ -442,6 +452,8 @@ CONFIG_NLMON=m · 59 unmodified lines | ||
| 442 | 452 | # CONFIG_NET_VENDOR_INTEL is not set |
| 443 | 453 | # CONFIG_NET_VENDOR_MARVELL is not set |
| 444 | 454 | CONFIG_MLX4_EN=m |
| 455 | +CONFIG_MLX5_CORE=m | |
| 456 | +CONFIG_MLX5_CORE_EN=y | |
| 445 | 457 | # CONFIG_NET_VENDOR_NATSEMI is not set |
| 446 | 458 | CONFIG_PPP=m |
| 447 | 459 | CONFIG_PPP_BSDCOMP=m |
| @@ -452,7 +464,6 @@ CONFIG_PPTP=m · 4 unmodified lines | ||
| 452 | 464 | CONFIG_PPPOL2TP=m |
| 453 | 465 | CONFIG_PPP_ASYNC=m |
| 454 | 466 | CONFIG_PPP_SYNC_TTY=m |
| 455 | −# CONFIG_INPUT_MOUSEDEV_PSAUX is not set | |
| 456 | 467 | # CONFIG_INPUT_KEYBOARD is not set |
| 457 | 468 | # CONFIG_INPUT_MOUSE is not set |
| 458 | 469 | # CONFIG_SERIO is not set |
| @@ -471,6 +482,7 @@ CONFIG_DIAG288_WATCHDOG=m · 12 unmodified lines | ||
| 471 | 482 | CONFIG_INFINIBAND=m |
| 472 | 483 | CONFIG_INFINIBAND_USER_ACCESS=m |
| 473 | 484 | CONFIG_MLX4_INFINIBAND=m |
| 485 | +CONFIG_MLX5_INFINIBAND=m | |
| 474 | 486 | CONFIG_VIRTIO_BALLOON=m |
| 475 | 487 | CONFIG_EXT4_FS=y |
| 476 | 488 | CONFIG_EXT4_FS_POSIX_ACL=y |
| @@ -487,12 +499,18 @@ CONFIG_XFS_POSIX_ACL=y · 10 unmodified lines | ||
| 487 | 499 | CONFIG_XFS_RT=y |
| 488 | 500 | CONFIG_XFS_DEBUG=y |
| 489 | 501 | CONFIG_GFS2_FS=m |
| 502 | +CONFIG_GFS2_FS_LOCKING_DLM=y | |
| 490 | 503 | CONFIG_OCFS2_FS=m |
| 491 | 504 | CONFIG_BTRFS_FS=y |
| 492 | 505 | CONFIG_BTRFS_FS_POSIX_ACL=y |
| 506 | +CONFIG_BTRFS_DEBUG=y | |
| 493 | 507 | CONFIG_NILFS2_FS=m |
| 508 | +CONFIG_FS_DAX=y | |
| 509 | +CONFIG_EXPORTFS_BLOCK_OPS=y | |
| 494 | 510 | CONFIG_FANOTIFY=y |
| 511 | +CONFIG_FANOTIFY_ACCESS_PERMISSIONS=y | |
| 495 | 512 | CONFIG_QUOTA_NETLINK_INTERFACE=y |
| 513 | +CONFIG_QUOTA_DEBUG=y | |
| 496 | 514 | CONFIG_QFMT_V1=m |
| 497 | 515 | CONFIG_QFMT_V2=m |
| 498 | 516 | CONFIG_AUTOFS4_FS=m |
| @@ -558,6 +576,7 @@ CONFIG_HEADERS_CHECK=y · 59 unmodified lines | ||
| 558 | 576 | CONFIG_DEBUG_SECTION_MISMATCH=y |
| 559 | 577 | CONFIG_MAGIC_SYSRQ=y |
| 560 | 578 | CONFIG_DEBUG_PAGEALLOC=y |
| 579 | +CONFIG_DEBUG_RODATA_TEST=y | |
| 561 | 580 | CONFIG_DEBUG_OBJECTS=y |
| 562 | 581 | CONFIG_DEBUG_OBJECTS_SELFTEST=y |
| 563 | 582 | CONFIG_DEBUG_OBJECTS_FREE=y |
| @@ -580,7 +599,6 @@ CONFIG_DETECT_HUNG_TASK=y · 16 unmodified lines | ||
| 580 | 599 | CONFIG_WQ_WATCHDOG=y |
| 581 | 600 | CONFIG_PANIC_ON_OOPS=y |
| 582 | 601 | CONFIG_DEBUG_TIMEKEEPING=y |
| 583 | −CONFIG_TIMER_STATS=y | |
| 584 | 602 | CONFIG_DEBUG_RT_MUTEXES=y |
| 585 | 603 | CONFIG_DEBUG_WW_MUTEX_SLOWPATH=y |
| 586 | 604 | CONFIG_PROVE_LOCKING=y |
| @@ -595,6 +613,7 @@ CONFIG_RCU_TORTURE_TEST=m · 8 unmodified lines | ||
| 595 | 613 | CONFIG_RCU_CPU_STALL_TIMEOUT=300 |
| 596 | 614 | CONFIG_NOTIFIER_ERROR_INJECTION=m |
| 597 | 615 | CONFIG_PM_NOTIFIER_ERROR_INJECT=m |
| 616 | +CONFIG_NETDEV_NOTIFIER_ERROR_INJECT=m | |
| 598 | 617 | CONFIG_FAULT_INJECTION=y |
| 599 | 618 | CONFIG_FAILSLAB=y |
| 600 | 619 | CONFIG_FAIL_PAGE_ALLOC=y |
| @@ -616,13 +635,12 @@ CONFIG_HIST_TRIGGERS=y · 15 unmodified lines | ||
| 616 | 635 | CONFIG_TRACE_ENUM_MAP_FILE=y |
| 617 | 636 | CONFIG_LKDTM=m |
| 618 | 637 | CONFIG_TEST_LIST_SORT=y |
| 638 | +CONFIG_TEST_SORT=y | |
| 619 | 639 | CONFIG_KPROBES_SANITY_TEST=y |
| 620 | 640 | CONFIG_RBTREE_TEST=y |
| 621 | 641 | CONFIG_INTERVAL_TREE_TEST=m |
| 622 | 642 | CONFIG_PERCPU_TEST=m |
| 623 | 643 | CONFIG_ATOMIC64_SELFTEST=y |
| 624 | −CONFIG_TEST_STRING_HELPERS=y | |
| 625 | −CONFIG_TEST_KSTRTOX=y | |
| 626 | 644 | CONFIG_DMA_API_DEBUG=y |
| 627 | 645 | CONFIG_TEST_BPF=m |
| 628 | 646 | CONFIG_BUG_ON_DATA_CORRUPTION=y |
| @@ -630,6 +648,7 @@ CONFIG_S390_PTDUMP=y · 1 unmodified line | ||
| 630 | 648 | CONFIG_ENCRYPTED_KEYS=m |
| 631 | 649 | CONFIG_SECURITY=y |
| 632 | 650 | CONFIG_SECURITY_NETWORK=y |
| 651 | +CONFIG_HARDENED_USERCOPY=y | |
| 633 | 652 | CONFIG_SECURITY_SELINUX=y |
| 634 | 653 | CONFIG_SECURITY_SELINUX_BOOTPARAM=y |
| 635 | 654 | CONFIG_SECURITY_SELINUX_BOOTPARAM_VALUE=0 |
| @@ -640,7 +659,9 @@ CONFIG_CRYPTO_RSA=m · 4 unmodified lines | ||
| 640 | 659 | CONFIG_CRYPTO_DH=m |
| 641 | 660 | CONFIG_CRYPTO_ECDH=m |
| 642 | 661 | CONFIG_CRYPTO_USER=m |
| 662 | +CONFIG_CRYPTO_PCRYPT=m | |
| 643 | 663 | CONFIG_CRYPTO_CRYPTD=m |
| 664 | +CONFIG_CRYPTO_MCRYPTD=m | |
| 644 | 665 | CONFIG_CRYPTO_TEST=m |
| 645 | 666 | CONFIG_CRYPTO_CCM=m |
| 646 | 667 | CONFIG_CRYPTO_GCM=m |
| @@ -648,6 +669,7 @@ CONFIG_CRYPTO_CHACHA20POLY1305=m · 1 unmodified line | ||
| 648 | 669 | CONFIG_CRYPTO_LRW=m |
| 649 | 670 | CONFIG_CRYPTO_PCBC=m |
| 650 | 671 | CONFIG_CRYPTO_KEYWRAP=m |
| 672 | +CONFIG_CRYPTO_CMAC=m | |
| 651 | 673 | CONFIG_CRYPTO_XCBC=m |
| 652 | 674 | CONFIG_CRYPTO_VMAC=m |
| 653 | 675 | CONFIG_CRYPTO_CRC32=m |
| @@ -657,8 +679,10 @@ CONFIG_CRYPTO_RMD160=m · 3 unmodified lines | ||
| 657 | 679 | CONFIG_CRYPTO_RMD256=m |
| 658 | 680 | CONFIG_CRYPTO_RMD320=m |
| 659 | 681 | CONFIG_CRYPTO_SHA512=m |
| 682 | +CONFIG_CRYPTO_SHA3=m | |
| 660 | 683 | CONFIG_CRYPTO_TGR192=m |
| 661 | 684 | CONFIG_CRYPTO_WP512=m |
| 685 | +CONFIG_CRYPTO_AES_TI=m | |
| 662 | 686 | CONFIG_CRYPTO_ANUBIS=m |
| 663 | 687 | CONFIG_CRYPTO_BLOWFISH=m |
| 664 | 688 | CONFIG_CRYPTO_CAMELLIA=m |
| @@ -674,6 +698,7 @@ CONFIG_CRYPTO_TWOFISH=m · 9 unmodified lines | ||
| 674 | 698 | CONFIG_CRYPTO_842=m |
| 675 | 699 | CONFIG_CRYPTO_LZ4=m |
| 676 | 700 | CONFIG_CRYPTO_LZ4HC=m |
| 701 | +CONFIG_CRYPTO_ANSI_CPRNG=m | |
| 677 | 702 | CONFIG_CRYPTO_USER_API_HASH=m |
| 678 | 703 | CONFIG_CRYPTO_USER_API_SKCIPHER=m |
| 679 | 704 | CONFIG_CRYPTO_USER_API_RNG=m |
| @@ -685,6 +710,7 @@ CONFIG_CRYPTO_SHA256_S390=m · 5 unmodified lines | ||
| 685 | 710 | CONFIG_CRYPTO_SHA512_S390=m |
| 686 | 711 | CONFIG_CRYPTO_DES_S390=m |
| 687 | 712 | CONFIG_CRYPTO_AES_S390=m |
| 713 | +CONFIG_CRYPTO_PAES_S390=m | |
| 688 | 714 | CONFIG_CRYPTO_GHASH_S390=m |
| 689 | 715 | CONFIG_CRYPTO_CRC32_S390=y |
| 690 | 716 | CONFIG_ASYMMETRIC_KEY_TYPE=y |
| @@ -692,6 +718,7 @@ CONFIG_ASYMMETRIC_PUBLIC_KEY_SUBTYPE=m · 1 unmodified line | ||
| 692 | 718 | CONFIG_X509_CERTIFICATE_PARSER=m |
| 693 | 719 | CONFIG_CRC7=m |
| 694 | 720 | CONFIG_CRC8=m |
| 721 | +CONFIG_RANDOM32_SELFTEST=y | |
| 695 | 722 | CONFIG_CORDIC=m |
| 696 | 723 | CONFIG_CMM=m |
| 697 | 724 | CONFIG_APPLDATA_BASE=y |
| @@ -31,6 +31,7 @@ CONFIG_USER_NS=y · 30 unmodified lines | ||
| 31 | 31 | CONFIG_SCHED_AUTOGROUP=y |
| 32 | 32 | CONFIG_BLK_DEV_INITRD=y |
| 33 | 33 | CONFIG_EXPERT=y |
| 34 | +# CONFIG_SYSFS_SYSCALL is not set | |
| 34 | 35 | CONFIG_BPF_SYSCALL=y |
| 35 | 36 | CONFIG_USERFAULTFD=y |
| 36 | 37 | # CONFIG_COMPAT_BRK is not set |
| @@ -46,7 +47,10 @@ CONFIG_MODULE_UNLOAD=y · 9 unmodified lines | ||
| 46 | 47 | CONFIG_MODULE_FORCE_UNLOAD=y |
| 47 | 48 | CONFIG_MODVERSIONS=y |
| 48 | 49 | CONFIG_MODULE_SRCVERSION_ALL=y |
| 50 | +CONFIG_BLK_DEV_INTEGRITY=y | |
| 49 | 51 | CONFIG_BLK_DEV_THROTTLING=y |
| 52 | +CONFIG_BLK_WBT=y | |
| 53 | +CONFIG_BLK_WBT_SQ=y | |
| 50 | 54 | CONFIG_PARTITION_ADVANCED=y |
| 51 | 55 | CONFIG_IBM_PARTITION=y |
| 52 | 56 | CONFIG_BSD_DISKLABEL=y |
| @@ -88,6 +92,8 @@ CONFIG_UNIX=y · 35 unmodified lines | ||
| 88 | 92 | CONFIG_UNIX_DIAG=m |
| 89 | 93 | CONFIG_XFRM_USER=m |
| 90 | 94 | CONFIG_NET_KEY=m |
| 95 | +CONFIG_SMC=m | |
| 96 | +CONFIG_SMC_DIAG=m | |
| 91 | 97 | CONFIG_INET=y |
| 92 | 98 | CONFIG_IP_MULTICAST=y |
| 93 | 99 | CONFIG_IP_ADVANCED_ROUTER=y |
| @@ -356,6 +362,7 @@ CONFIG_NET_ACT_SIMP=m · 262 unmodified lines | ||
| 356 | 362 | CONFIG_NET_ACT_SKBEDIT=m |
| 357 | 363 | CONFIG_NET_ACT_CSUM=m |
| 358 | 364 | CONFIG_DNS_RESOLVER=y |
| 365 | +CONFIG_NETLINK_DIAG=m | |
| 359 | 366 | CONFIG_CGROUP_NET_PRIO=y |
| 360 | 367 | CONFIG_BPF_JIT=y |
| 361 | 368 | CONFIG_NET_PKTGEN=m |
| @@ -364,16 +371,18 @@ CONFIG_DEVTMPFS=y · 2 unmodified lines | ||
| 364 | 371 | CONFIG_DMA_CMA=y |
| 365 | 372 | CONFIG_CMA_SIZE_MBYTES=0 |
| 366 | 373 | CONFIG_CONNECTOR=y |
| 374 | +CONFIG_ZRAM=m | |
| 367 | 375 | CONFIG_BLK_DEV_LOOP=m |
| 368 | 376 | CONFIG_BLK_DEV_CRYPTOLOOP=m |
| 377 | +CONFIG_BLK_DEV_DRBD=m | |
| 369 | 378 | CONFIG_BLK_DEV_NBD=m |
| 370 | 379 | CONFIG_BLK_DEV_OSD=m |
| 371 | 380 | CONFIG_BLK_DEV_RAM=y |
| 372 | 381 | CONFIG_BLK_DEV_RAM_SIZE=32768 |
| 373 | −CONFIG_CDROM_PKTCDVD=m | |
| 374 | −CONFIG_ATA_OVER_ETH=m | |
| 382 | +CONFIG_BLK_DEV_RAM_DAX=y | |
| 375 | 383 | CONFIG_VIRTIO_BLK=y |
| 376 | 384 | CONFIG_ENCLOSURE_SERVICES=m |
| 385 | +CONFIG_GENWQE=m | |
| 377 | 386 | CONFIG_RAID_ATTRS=m |
| 378 | 387 | CONFIG_SCSI=y |
| 379 | 388 | CONFIG_BLK_DEV_SD=y |
| @@ -439,6 +448,8 @@ CONFIG_NLMON=m · 59 unmodified lines | ||
| 439 | 448 | # CONFIG_NET_VENDOR_INTEL is not set |
| 440 | 449 | # CONFIG_NET_VENDOR_MARVELL is not set |
| 441 | 450 | CONFIG_MLX4_EN=m |
| 451 | +CONFIG_MLX5_CORE=m | |
| 452 | +CONFIG_MLX5_CORE_EN=y | |
| 442 | 453 | # CONFIG_NET_VENDOR_NATSEMI is not set |
| 443 | 454 | CONFIG_PPP=m |
| 444 | 455 | CONFIG_PPP_BSDCOMP=m |
| @@ -449,7 +460,6 @@ CONFIG_PPTP=m · 4 unmodified lines | ||
| 449 | 460 | CONFIG_PPPOL2TP=m |
| 450 | 461 | CONFIG_PPP_ASYNC=m |
| 451 | 462 | CONFIG_PPP_SYNC_TTY=m |
| 452 | −# CONFIG_INPUT_MOUSEDEV_PSAUX is not set | |
| 453 | 463 | # CONFIG_INPUT_KEYBOARD is not set |
| 454 | 464 | # CONFIG_INPUT_MOUSE is not set |
| 455 | 465 | # CONFIG_SERIO is not set |
| @@ -468,6 +478,7 @@ CONFIG_DIAG288_WATCHDOG=m · 12 unmodified lines | ||
| 468 | 478 | CONFIG_INFINIBAND=m |
| 469 | 479 | CONFIG_INFINIBAND_USER_ACCESS=m |
| 470 | 480 | CONFIG_MLX4_INFINIBAND=m |
| 481 | +CONFIG_MLX5_INFINIBAND=m | |
| 471 | 482 | CONFIG_VIRTIO_BALLOON=m |
| 472 | 483 | CONFIG_EXT4_FS=y |
| 473 | 484 | CONFIG_EXT4_FS_POSIX_ACL=y |
| @@ -483,11 +494,15 @@ CONFIG_XFS_QUOTA=y · 9 unmodified lines | ||
| 483 | 494 | CONFIG_XFS_POSIX_ACL=y |
| 484 | 495 | CONFIG_XFS_RT=y |
| 485 | 496 | CONFIG_GFS2_FS=m |
| 497 | +CONFIG_GFS2_FS_LOCKING_DLM=y | |
| 486 | 498 | CONFIG_OCFS2_FS=m |
| 487 | 499 | CONFIG_BTRFS_FS=y |
| 488 | 500 | CONFIG_BTRFS_FS_POSIX_ACL=y |
| 489 | 501 | CONFIG_NILFS2_FS=m |
| 502 | +CONFIG_FS_DAX=y | |
| 503 | +CONFIG_EXPORTFS_BLOCK_OPS=y | |
| 490 | 504 | CONFIG_FANOTIFY=y |
| 505 | +CONFIG_FANOTIFY_ACCESS_PERMISSIONS=y | |
| 491 | 506 | CONFIG_QUOTA_NETLINK_INTERFACE=y |
| 492 | 507 | CONFIG_QFMT_V1=m |
| 493 | 508 | CONFIG_QFMT_V2=m |
| @@ -553,7 +568,6 @@ CONFIG_UNUSED_SYMBOLS=y · 59 unmodified lines | ||
| 553 | 568 | CONFIG_MAGIC_SYSRQ=y |
| 554 | 569 | CONFIG_DEBUG_MEMORY_INIT=y |
| 555 | 570 | CONFIG_PANIC_ON_OOPS=y |
| 556 | −CONFIG_TIMER_STATS=y | |
| 557 | 571 | CONFIG_RCU_TORTURE_TEST=m |
| 558 | 572 | CONFIG_RCU_CPU_STALL_TIMEOUT=60 |
| 559 | 573 | CONFIG_LATENCYTOP=y |
| @@ -576,6 +590,7 @@ CONFIG_BIG_KEYS=y · 16 unmodified lines | ||
| 576 | 590 | CONFIG_ENCRYPTED_KEYS=m |
| 577 | 591 | CONFIG_SECURITY=y |
| 578 | 592 | CONFIG_SECURITY_NETWORK=y |
| 593 | +CONFIG_HARDENED_USERCOPY=y | |
| 579 | 594 | CONFIG_SECURITY_SELINUX=y |
| 580 | 595 | CONFIG_SECURITY_SELINUX_BOOTPARAM=y |
| 581 | 596 | CONFIG_SECURITY_SELINUX_BOOTPARAM_VALUE=0 |
| @@ -599,6 +614,7 @@ CONFIG_CRYPTO_CHACHA20POLY1305=m · 17 unmodified lines | ||
| 599 | 614 | CONFIG_CRYPTO_LRW=m |
| 600 | 615 | CONFIG_CRYPTO_PCBC=m |
| 601 | 616 | CONFIG_CRYPTO_KEYWRAP=m |
| 617 | +CONFIG_CRYPTO_CMAC=m | |
| 602 | 618 | CONFIG_CRYPTO_XCBC=m |
| 603 | 619 | CONFIG_CRYPTO_VMAC=m |
| 604 | 620 | CONFIG_CRYPTO_CRC32=m |
| @@ -611,6 +627,7 @@ CONFIG_CRYPTO_SHA512=m · 6 unmodified lines | ||
| 611 | 627 | CONFIG_CRYPTO_SHA3=m |
| 612 | 628 | CONFIG_CRYPTO_TGR192=m |
| 613 | 629 | CONFIG_CRYPTO_WP512=m |
| 630 | +CONFIG_CRYPTO_AES_TI=m | |
| 614 | 631 | CONFIG_CRYPTO_ANUBIS=m |
| 615 | 632 | CONFIG_CRYPTO_BLOWFISH=m |
| 616 | 633 | CONFIG_CRYPTO_CAMELLIA=m |
| @@ -626,16 +643,19 @@ CONFIG_CRYPTO_TWOFISH=m · 9 unmodified lines | ||
| 626 | 643 | CONFIG_CRYPTO_842=m |
| 627 | 644 | CONFIG_CRYPTO_LZ4=m |
| 628 | 645 | CONFIG_CRYPTO_LZ4HC=m |
| 646 | +CONFIG_CRYPTO_ANSI_CPRNG=m | |
| 629 | 647 | CONFIG_CRYPTO_USER_API_HASH=m |
| 630 | 648 | CONFIG_CRYPTO_USER_API_SKCIPHER=m |
| 631 | 649 | CONFIG_CRYPTO_USER_API_RNG=m |
| 632 | 650 | CONFIG_CRYPTO_USER_API_AEAD=m |
| 633 | 651 | CONFIG_ZCRYPT=m |
| 652 | +CONFIG_PKEY=m | |
| 634 | 653 | CONFIG_CRYPTO_SHA1_S390=m |
| 635 | 654 | CONFIG_CRYPTO_SHA256_S390=m |
| 636 | 655 | CONFIG_CRYPTO_SHA512_S390=m |
| 637 | 656 | CONFIG_CRYPTO_DES_S390=m |
| 638 | 657 | CONFIG_CRYPTO_AES_S390=m |
| 658 | +CONFIG_CRYPTO_PAES_S390=m | |
| 639 | 659 | CONFIG_CRYPTO_GHASH_S390=m |
| 640 | 660 | CONFIG_CRYPTO_CRC32_S390=y |
| 641 | 661 | CONFIG_CRC7=m |
| @@ -31,6 +31,7 @@ CONFIG_USER_NS=y · 30 unmodified lines | ||
| 31 | 31 | CONFIG_SCHED_AUTOGROUP=y |
| 32 | 32 | CONFIG_BLK_DEV_INITRD=y |
| 33 | 33 | CONFIG_EXPERT=y |
| 34 | +# CONFIG_SYSFS_SYSCALL is not set | |
| 34 | 35 | CONFIG_BPF_SYSCALL=y |
| 35 | 36 | CONFIG_USERFAULTFD=y |
| 36 | 37 | # CONFIG_COMPAT_BRK is not set |
| @@ -44,7 +45,10 @@ CONFIG_MODULE_UNLOAD=y · 7 unmodified lines | ||
| 44 | 45 | CONFIG_MODULE_FORCE_UNLOAD=y |
| 45 | 46 | CONFIG_MODVERSIONS=y |
| 46 | 47 | CONFIG_MODULE_SRCVERSION_ALL=y |
| 48 | +CONFIG_BLK_DEV_INTEGRITY=y | |
| 47 | 49 | CONFIG_BLK_DEV_THROTTLING=y |
| 50 | +CONFIG_BLK_WBT=y | |
| 51 | +CONFIG_BLK_WBT_SQ=y | |
| 48 | 52 | CONFIG_PARTITION_ADVANCED=y |
| 49 | 53 | CONFIG_IBM_PARTITION=y |
| 50 | 54 | CONFIG_BSD_DISKLABEL=y |
| @@ -86,6 +90,8 @@ CONFIG_UNIX=y · 35 unmodified lines | ||
| 86 | 90 | CONFIG_UNIX_DIAG=m |
| 87 | 91 | CONFIG_XFRM_USER=m |
| 88 | 92 | CONFIG_NET_KEY=m |
| 93 | +CONFIG_SMC=m | |
| 94 | +CONFIG_SMC_DIAG=m | |
| 89 | 95 | CONFIG_INET=y |
| 90 | 96 | CONFIG_IP_MULTICAST=y |
| 91 | 97 | CONFIG_IP_ADVANCED_ROUTER=y |
| @@ -354,6 +360,7 @@ CONFIG_NET_ACT_SIMP=m · 262 unmodified lines | ||
| 354 | 360 | CONFIG_NET_ACT_SKBEDIT=m |
| 355 | 361 | CONFIG_NET_ACT_CSUM=m |
| 356 | 362 | CONFIG_DNS_RESOLVER=y |
| 363 | +CONFIG_NETLINK_DIAG=m | |
| 357 | 364 | CONFIG_CGROUP_NET_PRIO=y |
| 358 | 365 | CONFIG_BPF_JIT=y |
| 359 | 366 | CONFIG_NET_PKTGEN=m |
| @@ -362,16 +369,18 @@ CONFIG_DEVTMPFS=y · 2 unmodified lines | ||
| 362 | 369 | CONFIG_DMA_CMA=y |
| 363 | 370 | CONFIG_CMA_SIZE_MBYTES=0 |
| 364 | 371 | CONFIG_CONNECTOR=y |
| 372 | +CONFIG_ZRAM=m | |
| 365 | 373 | CONFIG_BLK_DEV_LOOP=m |
| 366 | 374 | CONFIG_BLK_DEV_CRYPTOLOOP=m |
| 375 | +CONFIG_BLK_DEV_DRBD=m | |
| 367 | 376 | CONFIG_BLK_DEV_NBD=m |
| 368 | 377 | CONFIG_BLK_DEV_OSD=m |
| 369 | 378 | CONFIG_BLK_DEV_RAM=y |
| 370 | 379 | CONFIG_BLK_DEV_RAM_SIZE=32768 |
| 371 | −CONFIG_CDROM_PKTCDVD=m | |
| 372 | −CONFIG_ATA_OVER_ETH=m | |
| 380 | +CONFIG_BLK_DEV_RAM_DAX=y | |
| 373 | 381 | CONFIG_VIRTIO_BLK=y |
| 374 | 382 | CONFIG_ENCLOSURE_SERVICES=m |
| 383 | +CONFIG_GENWQE=m | |
| 375 | 384 | CONFIG_RAID_ATTRS=m |
| 376 | 385 | CONFIG_SCSI=y |
| 377 | 386 | CONFIG_BLK_DEV_SD=y |
| @@ -437,6 +446,8 @@ CONFIG_NLMON=m · 59 unmodified lines | ||
| 437 | 446 | # CONFIG_NET_VENDOR_INTEL is not set |
| 438 | 447 | # CONFIG_NET_VENDOR_MARVELL is not set |
| 439 | 448 | CONFIG_MLX4_EN=m |
| 449 | +CONFIG_MLX5_CORE=m | |
| 450 | +CONFIG_MLX5_CORE_EN=y | |
| 440 | 451 | # CONFIG_NET_VENDOR_NATSEMI is not set |
| 441 | 452 | CONFIG_PPP=m |
| 442 | 453 | CONFIG_PPP_BSDCOMP=m |
| @@ -447,7 +458,6 @@ CONFIG_PPTP=m · 4 unmodified lines | ||
| 447 | 458 | CONFIG_PPPOL2TP=m |
| 448 | 459 | CONFIG_PPP_ASYNC=m |
| 449 | 460 | CONFIG_PPP_SYNC_TTY=m |
| 450 | −# CONFIG_INPUT_MOUSEDEV_PSAUX is not set | |
| 451 | 461 | # CONFIG_INPUT_KEYBOARD is not set |
| 452 | 462 | # CONFIG_INPUT_MOUSE is not set |
| 453 | 463 | # CONFIG_SERIO is not set |
| @@ -466,6 +476,7 @@ CONFIG_DIAG288_WATCHDOG=m · 12 unmodified lines | ||
| 466 | 476 | CONFIG_INFINIBAND=m |
| 467 | 477 | CONFIG_INFINIBAND_USER_ACCESS=m |
| 468 | 478 | CONFIG_MLX4_INFINIBAND=m |
| 479 | +CONFIG_MLX5_INFINIBAND=m | |
| 469 | 480 | CONFIG_VIRTIO_BALLOON=m |
| 470 | 481 | CONFIG_EXT4_FS=y |
| 471 | 482 | CONFIG_EXT4_FS_POSIX_ACL=y |
| @@ -481,11 +492,15 @@ CONFIG_XFS_QUOTA=y · 9 unmodified lines | ||
| 481 | 492 | CONFIG_XFS_POSIX_ACL=y |
| 482 | 493 | CONFIG_XFS_RT=y |
| 483 | 494 | CONFIG_GFS2_FS=m |
| 495 | +CONFIG_GFS2_FS_LOCKING_DLM=y | |
| 484 | 496 | CONFIG_OCFS2_FS=m |
| 485 | 497 | CONFIG_BTRFS_FS=y |
| 486 | 498 | CONFIG_BTRFS_FS_POSIX_ACL=y |
| 487 | 499 | CONFIG_NILFS2_FS=m |
| 500 | +CONFIG_FS_DAX=y | |
| 501 | +CONFIG_EXPORTFS_BLOCK_OPS=y | |
| 488 | 502 | CONFIG_FANOTIFY=y |
| 503 | +CONFIG_FANOTIFY_ACCESS_PERMISSIONS=y | |
| 489 | 504 | CONFIG_QUOTA_NETLINK_INTERFACE=y |
| 490 | 505 | CONFIG_QFMT_V1=m |
| 491 | 506 | CONFIG_QFMT_V2=m |
| @@ -551,7 +566,6 @@ CONFIG_UNUSED_SYMBOLS=y · 59 unmodified lines | ||
| 551 | 566 | CONFIG_MAGIC_SYSRQ=y |
| 552 | 567 | CONFIG_DEBUG_MEMORY_INIT=y |
| 553 | 568 | CONFIG_PANIC_ON_OOPS=y |
| 554 | −CONFIG_TIMER_STATS=y | |
| 555 | 569 | CONFIG_RCU_TORTURE_TEST=m |
| 556 | 570 | CONFIG_RCU_CPU_STALL_TIMEOUT=60 |
| 557 | 571 | CONFIG_LATENCYTOP=y |
| @@ -574,6 +588,7 @@ CONFIG_BIG_KEYS=y · 16 unmodified lines | ||
| 574 | 588 | CONFIG_ENCRYPTED_KEYS=m |
| 575 | 589 | CONFIG_SECURITY=y |
| 576 | 590 | CONFIG_SECURITY_NETWORK=y |
| 591 | +CONFIG_HARDENED_USERCOPY=y | |
| 577 | 592 | CONFIG_SECURITY_SELINUX=y |
| 578 | 593 | CONFIG_SECURITY_SELINUX_BOOTPARAM=y |
| 579 | 594 | CONFIG_SECURITY_SELINUX_BOOTPARAM_VALUE=0 |
| @@ -597,6 +612,7 @@ CONFIG_CRYPTO_CHACHA20POLY1305=m · 17 unmodified lines | ||
| 597 | 612 | CONFIG_CRYPTO_LRW=m |
| 598 | 613 | CONFIG_CRYPTO_PCBC=m |
| 599 | 614 | CONFIG_CRYPTO_KEYWRAP=m |
| 615 | +CONFIG_CRYPTO_CMAC=m | |
| 600 | 616 | CONFIG_CRYPTO_XCBC=m |
| 601 | 617 | CONFIG_CRYPTO_VMAC=m |
| 602 | 618 | CONFIG_CRYPTO_CRC32=m |
| @@ -609,6 +625,7 @@ CONFIG_CRYPTO_SHA512=m · 6 unmodified lines | ||
| 609 | 625 | CONFIG_CRYPTO_SHA3=m |
| 610 | 626 | CONFIG_CRYPTO_TGR192=m |
| 611 | 627 | CONFIG_CRYPTO_WP512=m |
| 628 | +CONFIG_CRYPTO_AES_TI=m | |
| 612 | 629 | CONFIG_CRYPTO_ANUBIS=m |
| 613 | 630 | CONFIG_CRYPTO_BLOWFISH=m |
| 614 | 631 | CONFIG_CRYPTO_CAMELLIA=m |
| @@ -624,6 +641,7 @@ CONFIG_CRYPTO_TWOFISH=m · 9 unmodified lines | ||
| 624 | 641 | CONFIG_CRYPTO_842=m |
| 625 | 642 | CONFIG_CRYPTO_LZ4=m |
| 626 | 643 | CONFIG_CRYPTO_LZ4HC=m |
| 644 | +CONFIG_CRYPTO_ANSI_CPRNG=m | |
| 627 | 645 | CONFIG_CRYPTO_USER_API_HASH=m |
| 628 | 646 | CONFIG_CRYPTO_USER_API_SKCIPHER=m |
| 629 | 647 | CONFIG_CRYPTO_USER_API_RNG=m |
| @@ -635,6 +653,7 @@ CONFIG_CRYPTO_SHA256_S390=m · 5 unmodified lines | ||
| 635 | 653 | CONFIG_CRYPTO_SHA512_S390=m |
| 636 | 654 | CONFIG_CRYPTO_DES_S390=m |
| 637 | 655 | CONFIG_CRYPTO_AES_S390=m |
| 656 | +CONFIG_CRYPTO_PAES_S390=m | |
| 638 | 657 | CONFIG_CRYPTO_GHASH_S390=m |
| 639 | 658 | CONFIG_CRYPTO_CRC32_S390=y |
| 640 | 659 | CONFIG_CRC7=m |
| @@ -12,8 +12,10 @@ CONFIG_TUNE_ZEC12=y · 11 unmodified lines | ||
| 12 | 12 | CONFIG_NR_CPUS=2 |
| 13 | 13 | # CONFIG_HOTPLUG_CPU is not set |
| 14 | 14 | CONFIG_HZ_100=y |
| 15 | +# CONFIG_ARCH_RANDOM is not set | |
| 15 | 16 | # CONFIG_COMPACTION is not set |
| 16 | 17 | # CONFIG_MIGRATION is not set |
| 18 | +# CONFIG_BOUNCE is not set | |
| 17 | 19 | # CONFIG_CHECK_STACK is not set |
| 18 | 20 | # CONFIG_CHSC_SCH is not set |
| 19 | 21 | # CONFIG_SCM_BUS is not set |
| @@ -36,11 +38,11 @@ CONFIG_SCSI_CONSTANTS=y · 16 unmodified lines | ||
| 36 | 38 | CONFIG_SCSI_LOGGING=y |
| 37 | 39 | CONFIG_SCSI_FC_ATTRS=y |
| 38 | 40 | CONFIG_ZFCP=y |
| 39 | −# CONFIG_INPUT_MOUSEDEV_PSAUX is not set | |
| 40 | 41 | # CONFIG_INPUT_KEYBOARD is not set |
| 41 | 42 | # CONFIG_INPUT_MOUSE is not set |
| 42 | 43 | # CONFIG_SERIO is not set |
| 43 | 44 | # CONFIG_HVC_IUCV is not set |
| 45 | +# CONFIG_HW_RANDOM_S390 is not set | |
| 44 | 46 | CONFIG_RAW_DRIVER=y |
| 45 | 47 | # CONFIG_SCLP_ASYNC is not set |
| 46 | 48 | # CONFIG_HMC_DRV is not set |
| @@ -54,9 +56,9 @@ CONFIG_RAW_DRIVER=y · 7 unmodified lines | ||
| 54 | 56 | # CONFIG_INOTIFY_USER is not set |
| 55 | 57 | CONFIG_CONFIGFS_FS=y |
| 56 | 58 | # CONFIG_MISC_FILESYSTEMS is not set |
| 59 | +# CONFIG_NETWORK_FILESYSTEMS is not set | |
| 57 | 60 | CONFIG_PRINTK_TIME=y |
| 58 | 61 | CONFIG_DEBUG_INFO=y |
| 59 | −CONFIG_DEBUG_FS=y | |
| 60 | 62 | CONFIG_DEBUG_KERNEL=y |
| 61 | 63 | CONFIG_PANIC_ON_OOPS=y |
| 62 | 64 | # CONFIG_SCHED_DEBUG is not set |
| @@ -28,6 +28,7 @@ CONFIG_NAMESPACES=y · 27 unmodified lines | ||
| 28 | 28 | CONFIG_USER_NS=y |
| 29 | 29 | CONFIG_BLK_DEV_INITRD=y |
| 30 | 30 | CONFIG_EXPERT=y |
| 31 | +# CONFIG_SYSFS_SYSCALL is not set | |
| 31 | 32 | CONFIG_BPF_SYSCALL=y |
| 32 | 33 | CONFIG_USERFAULTFD=y |
| 33 | 34 | # CONFIG_COMPAT_BRK is not set |
| @@ -108,7 +109,6 @@ CONFIG_ZFCP=y · 74 unmodified lines | ||
| 108 | 109 | CONFIG_SCSI_VIRTIO=y |
| 109 | 110 | CONFIG_MD=y |
| 110 | 111 | CONFIG_MD_LINEAR=m |
| 111 | −CONFIG_MD_RAID0=m | |
| 112 | 112 | CONFIG_MD_MULTIPATH=m |
| 113 | 113 | CONFIG_BLK_DEV_DM=y |
| 114 | 114 | CONFIG_DM_CRYPT=m |
| @@ -131,6 +131,7 @@ CONFIG_TUN=m · 16 unmodified lines | ||
| 131 | 131 | CONFIG_VIRTIO_NET=y |
| 132 | 132 | # CONFIG_NET_VENDOR_ALACRITECH is not set |
| 133 | 133 | # CONFIG_NET_VENDOR_SOLARFLARE is not set |
| 134 | +# CONFIG_NET_VENDOR_SYNOPSYS is not set | |
| 134 | 135 | # CONFIG_INPUT is not set |
| 135 | 136 | # CONFIG_SERIO is not set |
| 136 | 137 | CONFIG_DEVKMEM=y |
| @@ -162,7 +163,6 @@ CONFIG_MAGIC_SYSRQ=y · 25 unmodified lines | ||
| 162 | 163 | CONFIG_DEBUG_PAGEALLOC=y |
| 163 | 164 | CONFIG_DETECT_HUNG_TASK=y |
| 164 | 165 | CONFIG_PANIC_ON_OOPS=y |
| 165 | −CONFIG_TIMER_STATS=y | |
| 166 | 166 | CONFIG_DEBUG_RT_MUTEXES=y |
| 167 | 167 | CONFIG_PROVE_LOCKING=y |
| 168 | 168 | CONFIG_LOCK_STAT=y |
| @@ -172,14 +172,12 @@ CONFIG_DEBUG_LIST=y · 3 unmodified lines | ||
| 172 | 172 | CONFIG_DEBUG_SG=y |
| 173 | 173 | CONFIG_DEBUG_NOTIFIERS=y |
| 174 | 174 | CONFIG_RCU_CPU_STALL_TIMEOUT=60 |
| 175 | −CONFIG_RCU_TRACE=y | |
| 176 | 175 | CONFIG_LATENCYTOP=y |
| 177 | 176 | CONFIG_SCHED_TRACER=y |
| 178 | 177 | CONFIG_FTRACE_SYSCALLS=y |
| 179 | 178 | CONFIG_TRACER_SNAPSHOT_PER_CPU_SWAP=y |
| 180 | 179 | CONFIG_STACK_TRACER=y |
| 181 | 180 | CONFIG_BLK_DEV_IO_TRACE=y |
| 182 | −CONFIG_UPROBE_EVENTS=y | |
| 183 | 181 | CONFIG_FUNCTION_PROFILER=y |
| 184 | 182 | CONFIG_TRACE_ENUM_MAP_FILE=y |
| 185 | 183 | CONFIG_KPROBES_SANITY_TEST=y |
| @@ -190,7 +188,6 @@ CONFIG_CRYPTO_CCM=m · 4 unmodified lines | ||
| 190 | 188 | CONFIG_CRYPTO_GCM=m |
| 191 | 189 | CONFIG_CRYPTO_CBC=y |
| 192 | 190 | CONFIG_CRYPTO_CTS=m |
| 193 | −CONFIG_CRYPTO_ECB=m | |
| 194 | 191 | CONFIG_CRYPTO_LRW=m |
| 195 | 192 | CONFIG_CRYPTO_PCBC=m |
| 196 | 193 | CONFIG_CRYPTO_XTS=m |
| @@ -230,6 +227,7 @@ CONFIG_CRYPTO_USER_API_SKCIPHER=m · 33 unmodified lines | ||
| 230 | 227 | CONFIG_CRYPTO_USER_API_RNG=m |
| 231 | 228 | CONFIG_ZCRYPT=m |
| 232 | 229 | CONFIG_PKEY=m |
| 230 | +CONFIG_CRYPTO_PAES_S390=m | |
| 233 | 231 | CONFIG_CRYPTO_SHA1_S390=m |
| 234 | 232 | CONFIG_CRYPTO_SHA256_S390=m |
| 235 | 233 | CONFIG_CRYPTO_SHA512_S390=m |
| @@ -541,7 +541,6 @@ struct kvm_s390_float_interrupt { · 540 unmodified lines | ||
| 541 | 541 | struct mutex ais_lock; |
| 542 | 542 | u8 simm; |
| 543 | 543 | u8 nimm; |
| 544 | − int ais_enabled; | |
| 545 | 544 | }; |
| 546 | 545 | |
| 547 | 546 | struct kvm_hw_wp_info_arch { |
| @@ -231,12 +231,17 @@ ENTRY(sie64a) · 230 unmodified lines | ||
| 231 | 231 | lctlg %c1,%c1,__LC_USER_ASCE # load primary asce |
| 232 | 232 | .Lsie_done: |
| 233 | 233 | # some program checks are suppressing. C code (e.g. do_protection_exception) |
| 234 | −# will rewind the PSW by the ILC, which is 4 bytes in case of SIE. Other | |
| 235 | −# instructions between sie64a and .Lsie_done should not cause program | |
| 236 | −# interrupts. So lets use a nop (47 00 00 00) as a landing pad. | |
| 234 | +# will rewind the PSW by the ILC, which is often 4 bytes in case of SIE. There | |
| 235 | +# are some corner cases (e.g. runtime instrumentation) where ILC is unpredictable. | |
| 236 | +# Other instructions between sie64a and .Lsie_done should not cause program | |
| 237 | +# interrupts. So lets use 3 nops as a landing pad for all possible rewinds. | |
| 237 | 238 | # See also .Lcleanup_sie |
| 238 | −.Lrewind_pad: | |
| 239 | − nop 0 | |
| 239 | +.Lrewind_pad6: | |
| 240 | + nopr 7 | |
| 241 | +.Lrewind_pad4: | |
| 242 | + nopr 7 | |
| 243 | +.Lrewind_pad2: | |
| 244 | + nopr 7 | |
| 240 | 245 | .globl sie_exit |
| 241 | 246 | sie_exit: |
| 242 | 247 | lg %r14,__SF_EMPTY+8(%r15) # load guest register save area |
| @@ -249,7 +254,9 @@ sie_exit: · 6 unmodified lines | ||
| 249 | 254 | stg %r14,__SF_EMPTY+16(%r15) # set exit reason code |
| 250 | 255 | j sie_exit |
| 251 | 256 | |
| 252 | − EX_TABLE(.Lrewind_pad,.Lsie_fault) | |
| 257 | + EX_TABLE(.Lrewind_pad6,.Lsie_fault) | |
| 258 | + EX_TABLE(.Lrewind_pad4,.Lsie_fault) | |
| 259 | + EX_TABLE(.Lrewind_pad2,.Lsie_fault) | |
| 253 | 260 | EX_TABLE(sie_exit,.Lsie_fault) |
| 254 | 261 | EXPORT_SYMBOL(sie64a) |
| 255 | 262 | EXPORT_SYMBOL(sie_exit) |
| @@ -2160,7 +2160,7 @@ static int modify_ais_mode(struct kvm *kvm, struct kvm_device_attr *attr) · 2159 unmodified lines | ||
| 2160 | 2160 | struct kvm_s390_ais_req req; |
| 2161 | 2161 | int ret = 0; |
| 2162 | 2162 | |
| 2163 | − if (!fi->ais_enabled) | |
| 2163 | + if (!test_kvm_facility(kvm, 72)) | |
| 2164 | 2164 | return -ENOTSUPP; |
| 2165 | 2165 | |
| 2166 | 2166 | if (copy_from_user(&req, (void __user *)attr->addr, sizeof(req))) |
| @@ -2204,7 +2204,7 @@ static int kvm_s390_inject_airq(struct kvm *kvm, · 37 unmodified lines | ||
| 2204 | 2204 | }; |
| 2205 | 2205 | int ret = 0; |
| 2206 | 2206 | |
| 2207 | − if (!fi->ais_enabled || !adapter->suppressible) | |
| 2207 | + if (!test_kvm_facility(kvm, 72) || !adapter->suppressible) | |
| 2208 | 2208 | return kvm_s390_inject_vm(kvm, &s390int); |
| 2209 | 2209 | |
| 2210 | 2210 | mutex_lock(&fi->ais_lock); |
| @@ -558,7 +558,6 @@ static int kvm_vm_ioctl_enable_cap(struct kvm *kvm, struct kvm_enable_cap *cap) · 557 unmodified lines | ||
| 558 | 558 | } else { |
| 559 | 559 | set_kvm_facility(kvm->arch.model.fac_mask, 72); |
| 560 | 560 | set_kvm_facility(kvm->arch.model.fac_list, 72); |
| 561 | − kvm->arch.float_int.ais_enabled = 1; | |
| 562 | 561 | r = 0; |
| 563 | 562 | } |
| 564 | 563 | mutex_unlock(&kvm->lock); |
| @@ -1533,7 +1532,6 @@ int kvm_arch_init_vm(struct kvm *kvm, unsigned long type) · 968 unmodified lines | ||
| 1533 | 1532 | mutex_init(&kvm->arch.float_int.ais_lock); |
| 1534 | 1533 | kvm->arch.float_int.simm = 0; |
| 1535 | 1534 | kvm->arch.float_int.nimm = 0; |
| 1536 | − kvm->arch.float_int.ais_enabled = 0; | |
| 1537 | 1535 | spin_lock_init(&kvm->arch.float_int.lock); |
| 1538 | 1536 | for (i = 0; i < FIRQ_LIST_COUNT; i++) |
| 1539 | 1537 | INIT_LIST_HEAD(&kvm->arch.float_int.lists[i]); |
| @@ -101,7 +101,7 @@ arch_get_unmapped_area(struct file *filp, unsigned long addr, · 100 unmodified lines | ||
| 101 | 101 | addr = PAGE_ALIGN(addr); |
| 102 | 102 | vma = find_vma(mm, addr); |
| 103 | 103 | if (TASK_SIZE - len >= addr && addr >= mmap_min_addr && |
| 104 | − (!vma || addr + len <= vma->vm_start)) | |
| 104 | + (!vma || addr + len <= vm_start_gap(vma))) | |
| 105 | 105 | goto check_asce_limit; |
| 106 | 106 | } |
| 107 | 107 | |
| @@ -151,7 +151,7 @@ arch_get_unmapped_area_topdown(struct file *filp, const unsigned long addr0, · 43 unmodified lines | ||
| 151 | 151 | addr = PAGE_ALIGN(addr); |
| 152 | 152 | vma = find_vma(mm, addr); |
| 153 | 153 | if (TASK_SIZE - len >= addr && addr >= mmap_min_addr && |
| 154 | − (!vma || addr + len <= vma->vm_start)) | |
| 154 | + (!vma || addr + len <= vm_start_gap(vma))) | |
| 155 | 155 | goto check_asce_limit; |
| 156 | 156 | } |
| 157 | 157 | |
| @@ -64,7 +64,7 @@ unsigned long arch_get_unmapped_area(struct file *filp, unsigned long addr, · 63 unmodified lines | ||
| 64 | 64 | |
| 65 | 65 | vma = find_vma(mm, addr); |
| 66 | 66 | if (TASK_SIZE - len >= addr && |
| 67 | − (!vma || addr + len <= vma->vm_start)) | |
| 67 | + (!vma || addr + len <= vm_start_gap(vma))) | |
| 68 | 68 | return addr; |
| 69 | 69 | } |
| 70 | 70 | |
| @@ -114,7 +114,7 @@ arch_get_unmapped_area_topdown(struct file *filp, const unsigned long addr0, · 43 unmodified lines | ||
| 114 | 114 | |
| 115 | 115 | vma = find_vma(mm, addr); |
| 116 | 116 | if (TASK_SIZE - len >= addr && |
| 117 | − (!vma || addr + len <= vma->vm_start)) | |
| 117 | + (!vma || addr + len <= vm_start_gap(vma))) | |
| 118 | 118 | return addr; |
| 119 | 119 | } |
| 120 | 120 | |
| @@ -192,9 +192,9 @@ config NR_CPUS · 191 unmodified lines | ||
| 192 | 192 | int "Maximum number of CPUs" |
| 193 | 193 | depends on SMP |
| 194 | 194 | range 2 32 if SPARC32 |
| 195 | − range 2 1024 if SPARC64 | |
| 195 | + range 2 4096 if SPARC64 | |
| 196 | 196 | default 32 if SPARC32 |
| 197 | − default 64 if SPARC64 | |
| 197 | + default 4096 if SPARC64 | |
| 198 | 198 | |
| 199 | 199 | source kernel/Kconfig.hz |
| 200 | 200 | |
| @@ -295,9 +295,13 @@ config NUMA · 94 unmodified lines | ||
| 295 | 295 | depends on SPARC64 && SMP |
| 296 | 296 | |
| 297 | 297 | config NODES_SHIFT |
| 298 | − int | |
| 299 | − default "4" | |
| 298 | + int "Maximum NUMA Nodes (as a power of 2)" | |
| 299 | + range 4 5 if SPARC64 | |
| 300 | + default "5" | |
| 300 | 301 | depends on NEED_MULTIPLE_NODES |
| 302 | + help | |
| 303 | + Specify the maximum number of NUMA Nodes available on the target | |
| 304 | + system. Increases memory reserved to accommodate various tables. | |
| 301 | 305 | |
| 302 | 306 | # Some NUMA nodes have memory ranges that span |
| 303 | 307 | # other nodes. Even though a pfn is valid and |
| @@ -573,9 +577,6 @@ config SYSVIPC_COMPAT · 269 unmodified lines | ||
| 573 | 577 | depends on COMPAT && SYSVIPC |
| 574 | 578 | default y |
| 575 | 579 | |
| 576 | −config KEYS_COMPAT | |
| 577 | − def_bool y if COMPAT && KEYS | |
| 578 | − | |
| 579 | 580 | endmenu |
| 580 | 581 | |
| 581 | 582 | source "net/Kconfig" |
| @@ -52,7 +52,7 @@ · 51 unmodified lines | ||
| 52 | 52 | #define CTX_NR_MASK TAG_CONTEXT_BITS |
| 53 | 53 | #define CTX_HW_MASK (CTX_NR_MASK | CTX_PGSZ_MASK) |
| 54 | 54 | |
| 55 | −#define CTX_FIRST_VERSION ((_AC(1,UL) << CTX_VERSION_SHIFT) + _AC(1,UL)) | |
| 55 | +#define CTX_FIRST_VERSION BIT(CTX_VERSION_SHIFT) | |
| 56 | 56 | #define CTX_VALID(__ctx) \ |
| 57 | 57 | (!(((__ctx.sparc64_ctx_val) ^ tlb_context_cache) & CTX_VERSION_MASK)) |
| 58 | 58 | #define CTX_HWBITS(__ctx) ((__ctx.sparc64_ctx_val) & CTX_HW_MASK) |
| @@ -19,13 +19,8 @@ extern spinlock_t ctx_alloc_lock; · 18 unmodified lines | ||
| 19 | 19 | extern unsigned long tlb_context_cache; |
| 20 | 20 | extern unsigned long mmu_context_bmap[]; |
| 21 | 21 | |
| 22 | +DECLARE_PER_CPU(struct mm_struct *, per_cpu_secondary_mm); | |
| 22 | 23 | void get_new_mmu_context(struct mm_struct *mm); |
| 23 | −#ifdef CONFIG_SMP | |
| 24 | −void smp_new_mmu_context_version(void); | |
| 25 | −#else | |
| 26 | −#define smp_new_mmu_context_version() do { } while (0) | |
| 27 | −#endif | |
| 28 | − | |
| 29 | 24 | int init_new_context(struct task_struct *tsk, struct mm_struct *mm); |
| 30 | 25 | void destroy_context(struct mm_struct *mm); |
| 31 | 26 | |
| @@ -76,8 +71,9 @@ void __flush_tlb_mm(unsigned long, unsigned long); · 44 unmodified lines | ||
| 76 | 71 | static inline void switch_mm(struct mm_struct *old_mm, struct mm_struct *mm, struct task_struct *tsk) |
| 77 | 72 | { |
| 78 | 73 | unsigned long ctx_valid, flags; |
| 79 | − int cpu; | |
| 74 | + int cpu = smp_processor_id(); | |
| 80 | 75 | |
| 76 | + per_cpu(per_cpu_secondary_mm, cpu) = mm; | |
| 81 | 77 | if (unlikely(mm == &init_mm)) |
| 82 | 78 | return; |
| 83 | 79 | |
| @@ -123,7 +119,6 @@ static inline void switch_mm(struct mm_struct *old_mm, struct mm_struct *mm, str · 39 unmodified lines | ||
| 123 | 119 | * for the first time, we must flush that context out of the |
| 124 | 120 | * local TLB. |
| 125 | 121 | */ |
| 126 | − cpu = smp_processor_id(); | |
| 127 | 122 | if (!ctx_valid || !cpumask_test_cpu(cpu, mm_cpumask(mm))) { |
| 128 | 123 | cpumask_set_cpu(cpu, mm_cpumask(mm)); |
| 129 | 124 | __flush_tlb_mm(CTX_HWBITS(mm->context), |
| @@ -133,26 +128,7 @@ static inline void switch_mm(struct mm_struct *old_mm, struct mm_struct *mm, str · 3 unmodified lines | ||
| 133 | 128 | } |
| 134 | 129 | |
| 135 | 130 | #define deactivate_mm(tsk,mm) do { } while (0) |
| 136 | − | |
| 137 | −/* Activate a new MM instance for the current task. */ | |
| 138 | −static inline void activate_mm(struct mm_struct *active_mm, struct mm_struct *mm) | |
| 139 | −{ | |
| 140 | − unsigned long flags; | |
| 141 | − int cpu; | |
| 142 | − | |
| 143 | − spin_lock_irqsave(&mm->context.lock, flags); | |
| 144 | − if (!CTX_VALID(mm->context)) | |
| 145 | − get_new_mmu_context(mm); | |
| 146 | − cpu = smp_processor_id(); | |
| 147 | − if (!cpumask_test_cpu(cpu, mm_cpumask(mm))) | |
| 148 | − cpumask_set_cpu(cpu, mm_cpumask(mm)); | |
| 149 | − | |
| 150 | − load_secondary_context(mm); | |
| 151 | − __flush_tlb_mm(CTX_HWBITS(mm->context), SECONDARY_CONTEXT); | |
| 152 | − tsb_context_switch(mm); | |
| 153 | − spin_unlock_irqrestore(&mm->context.lock, flags); | |
| 154 | −} | |
| 155 | − | |
| 131 | +#define activate_mm(active_mm, mm) switch_mm(active_mm, mm, NULL) | |
| 156 | 132 | #endif /* !(__ASSEMBLY__) */ |
| 157 | 133 | |
| 158 | 134 | #endif /* !(__SPARC64_MMU_CONTEXT_H) */ |
| @@ -20,7 +20,6 @@ · 19 unmodified lines | ||
| 20 | 20 | #define PIL_SMP_CALL_FUNC 1 |
| 21 | 21 | #define PIL_SMP_RECEIVE_SIGNAL 2 |
| 22 | 22 | #define PIL_SMP_CAPTURE 3 |
| 23 | −#define PIL_SMP_CTX_NEW_VERSION 4 | |
| 24 | 23 | #define PIL_DEVICE_IRQ 5 |
| 25 | 24 | #define PIL_SMP_CALL_FUNC_SNGL 6 |
| 26 | 25 | #define PIL_DEFERRED_PCR_WORK 7 |
| @@ -327,6 +327,7 @@ struct vio_dev { · 326 unmodified lines | ||
| 327 | 327 | int compat_len; |
| 328 | 328 | |
| 329 | 329 | u64 dev_no; |
| 330 | + u64 id; | |
| 330 | 331 | |
| 331 | 332 | unsigned long channel_id; |
| 332 | 333 | |
| @@ -909,7 +909,7 @@ static int register_services(struct ds_info *dp) · 908 unmodified lines | ||
| 909 | 909 | pbuf.req.handle = cp->handle; |
| 910 | 910 | pbuf.req.major = 1; |
| 911 | 911 | pbuf.req.minor = 0; |
| 912 | − strcpy(pbuf.req.svc_id, cp->service_id); | |
| 912 | + strcpy(pbuf.id_buf, cp->service_id); | |
| 913 | 913 | |
| 914 | 914 | err = __ds_send(lp, &pbuf, msg_len); |
| 915 | 915 | if (err > 0) |
| @@ -1034,17 +1034,26 @@ static void __init init_cpu_send_mondo_info(struct trap_per_cpu *tb) · 1033 unmodified lines | ||
| 1034 | 1034 | { |
| 1035 | 1035 | #ifdef CONFIG_SMP |
| 1036 | 1036 | unsigned long page; |
| 1037 | + void *mondo, *p; | |
| 1037 | 1038 | |
| 1038 | − BUILD_BUG_ON((NR_CPUS * sizeof(u16)) > (PAGE_SIZE - 64)); | |
| 1039 | + BUILD_BUG_ON((NR_CPUS * sizeof(u16)) > PAGE_SIZE); | |
| 1040 | + | |
| 1041 | + /* Make sure mondo block is 64byte aligned */ | |
| 1042 | + p = kzalloc(127, GFP_KERNEL); | |
| 1043 | + if (!p) { | |
| 1044 | + prom_printf("SUN4V: Error, cannot allocate mondo block.\n"); | |
| 1045 | + prom_halt(); | |
| 1046 | + } | |
| 1047 | + mondo = (void *)(((unsigned long)p + 63) & ~0x3f); | |
| 1048 | + tb->cpu_mondo_block_pa = __pa(mondo); | |
| 1039 | 1049 | |
| 1040 | 1050 | page = get_zeroed_page(GFP_KERNEL); |
| 1041 | 1051 | if (!page) { |
| 1042 | − prom_printf("SUN4V: Error, cannot allocate cpu mondo page.\n"); | |
| 1052 | + prom_printf("SUN4V: Error, cannot allocate cpu list page.\n"); | |
| 1043 | 1053 | prom_halt(); |
| 1044 | 1054 | } |
| 1045 | 1055 | |
| 1046 | − tb->cpu_mondo_block_pa = __pa(page); | |
| 1047 | − tb->cpu_list_pa = __pa(page + 64); | |
| 1056 | + tb->cpu_list_pa = __pa(page); | |
| 1048 | 1057 | #endif |
| 1049 | 1058 | } |
| 1050 | 1059 | |
| @@ -37,7 +37,6 @@ void handle_stdfmna(struct pt_regs *regs, unsigned long sfar, unsigned long sfsr · 36 unmodified lines | ||
| 37 | 37 | /* smp_64.c */ |
| 38 | 38 | void __irq_entry smp_call_function_client(int irq, struct pt_regs *regs); |
| 39 | 39 | void __irq_entry smp_call_function_single_client(int irq, struct pt_regs *regs); |
| 40 | −void __irq_entry smp_new_mmu_context_version_client(int irq, struct pt_regs *regs); | |
| 41 | 40 | void __irq_entry smp_penguin_jailcell(int irq, struct pt_regs *regs); |
| 42 | 41 | void __irq_entry smp_receive_signal_client(int irq, struct pt_regs *regs); |
| 43 | 42 | |
| @@ -964,37 +964,6 @@ void flush_dcache_page_all(struct mm_struct *mm, struct page *page) · 963 unmodified lines | ||
| 964 | 964 | preempt_enable(); |
| 965 | 965 | } |
| 966 | 966 | |
| 967 | −void __irq_entry smp_new_mmu_context_version_client(int irq, struct pt_regs *regs) | |
| 968 | −{ | |
| 969 | − struct mm_struct *mm; | |
| 970 | − unsigned long flags; | |
| 971 | − | |
| 972 | − clear_softint(1 << irq); | |
| 973 | − | |
| 974 | − /* See if we need to allocate a new TLB context because | |
| 975 | − * the version of the one we are using is now out of date. | |
| 976 | − */ | |
| 977 | − mm = current->active_mm; | |
| 978 | − if (unlikely(!mm || (mm == &init_mm))) | |
| 979 | − return; | |
| 980 | − | |
| 981 | − spin_lock_irqsave(&mm->context.lock, flags); | |
| 982 | − | |
| 983 | − if (unlikely(!CTX_VALID(mm->context))) | |
| 984 | − get_new_mmu_context(mm); | |
| 985 | − | |
| 986 | − spin_unlock_irqrestore(&mm->context.lock, flags); | |
| 987 | − | |
| 988 | − load_secondary_context(mm); | |
| 989 | − __flush_tlb_mm(CTX_HWBITS(mm->context), | |
| 990 | − SECONDARY_CONTEXT); | |
| 991 | −} | |
| 992 | − | |
| 993 | −void smp_new_mmu_context_version(void) | |
| 994 | −{ | |
| 995 | − smp_cross_call(&xcall_new_mmu_context_version, 0, 0, 0); | |
| 996 | −} | |
| 997 | − | |
| 998 | 967 | #ifdef CONFIG_KGDB |
| 999 | 968 | void kgdb_roundup_cpus(unsigned long flags) |
| 1000 | 969 | { |
| @@ -120,7 +120,7 @@ unsigned long arch_get_unmapped_area(struct file *filp, unsigned long addr, unsi · 119 unmodified lines | ||
| 120 | 120 | |
| 121 | 121 | vma = find_vma(mm, addr); |
| 122 | 122 | if (task_size - len >= addr && |
| 123 | − (!vma || addr + len <= vma->vm_start)) | |
| 123 | + (!vma || addr + len <= vm_start_gap(vma))) | |
| 124 | 124 | return addr; |
| 125 | 125 | } |
| 126 | 126 | |
| @@ -183,7 +183,7 @@ arch_get_unmapped_area_topdown(struct file *filp, const unsigned long addr0, · 56 unmodified lines | ||
| 183 | 183 | |
| 184 | 184 | vma = find_vma(mm, addr); |
| 185 | 185 | if (task_size - len >= addr && |
| 186 | − (!vma || addr + len <= vma->vm_start)) | |
| 186 | + (!vma || addr + len <= vm_start_gap(vma))) | |
| 187 | 187 | return addr; |
| 188 | 188 | } |
| 189 | 189 | |
| @@ -455,13 +455,16 @@ __tsb_context_switch: · 454 unmodified lines | ||
| 455 | 455 | .type copy_tsb,#function |
| 456 | 456 | copy_tsb: /* %o0=old_tsb_base, %o1=old_tsb_size |
| 457 | 457 | * %o2=new_tsb_base, %o3=new_tsb_size |
| 458 | + * %o4=page_size_shift | |
| 458 | 459 | */ |
| 459 | 460 | sethi %uhi(TSB_PASS_BITS), %g7 |
| 460 | 461 | srlx %o3, 4, %o3 |
| 461 | − add %o0, %o1, %g1 /* end of old tsb */ | |
| 462 | + add %o0, %o1, %o1 /* end of old tsb */ | |
| 462 | 463 | sllx %g7, 32, %g7 |
| 463 | 464 | sub %o3, 1, %o3 /* %o3 == new tsb hash mask */ |
| 464 | 465 | |
| 466 | + mov %o4, %g1 /* page_size_shift */ | |
| 467 | + | |
| 465 | 468 | 661: prefetcha [%o0] ASI_N, #one_read |
| 466 | 469 | .section .tsb_phys_patch, "ax" |
| 467 | 470 | .word 661b |
| @@ -486,9 +489,9 @@ copy_tsb: /* %o0=old_tsb_base, %o1=old_tsb_size · 18 unmodified lines | ||
| 486 | 489 | /* This can definitely be computed faster... */ |
| 487 | 490 | srlx %o0, 4, %o5 /* Build index */ |
| 488 | 491 | and %o5, 511, %o5 /* Mask index */ |
| 489 | − sllx %o5, PAGE_SHIFT, %o5 /* Put into vaddr position */ | |
| 492 | + sllx %o5, %g1, %o5 /* Put into vaddr position */ | |
| 490 | 493 | or %o4, %o5, %o4 /* Full VADDR. */ |
| 491 | − srlx %o4, PAGE_SHIFT, %o4 /* Shift down to create index */ | |
| 494 | + srlx %o4, %g1, %o4 /* Shift down to create index */ | |
| 492 | 495 | and %o4, %o3, %o4 /* Mask with new_tsb_nents-1 */ |
| 493 | 496 | sllx %o4, 4, %o4 /* Shift back up into tsb ent offset */ |
| 494 | 497 | TSB_STORE(%o2 + %o4, %g2) /* Store TAG */ |
| @@ -496,7 +499,7 @@ copy_tsb: /* %o0=old_tsb_base, %o1=old_tsb_size · 1 unmodified line | ||
| 496 | 499 | TSB_STORE(%o2 + %o4, %g3) /* Store TTE */ |
| 497 | 500 | |
| 498 | 501 | 80: add %o0, 16, %o0 |
| 499 | − cmp %o0, %g1 | |
| 502 | + cmp %o0, %o1 | |
| 500 | 503 | bne,pt %xcc, 90b |
| 501 | 504 | nop |
| 502 | 505 | |
| @@ -50,7 +50,7 @@ tl0_resv03e: BTRAP(0x3e) BTRAP(0x3f) BTRAP(0x40) · 49 unmodified lines | ||
| 50 | 50 | tl0_irq1: TRAP_IRQ(smp_call_function_client, 1) |
| 51 | 51 | tl0_irq2: TRAP_IRQ(smp_receive_signal_client, 2) |
| 52 | 52 | tl0_irq3: TRAP_IRQ(smp_penguin_jailcell, 3) |
| 53 | −tl0_irq4: TRAP_IRQ(smp_new_mmu_context_version_client, 4) | |
| 53 | +tl0_irq4: BTRAP(0x44) | |
| 54 | 54 | #else |
| 55 | 55 | tl0_irq1: BTRAP(0x41) |
| 56 | 56 | tl0_irq2: BTRAP(0x42) |
| @@ -302,13 +302,16 @@ static struct vio_dev *vio_create_one(struct mdesc_handle *hp, u64 mp, · 301 unmodified lines | ||
| 302 | 302 | if (!id) { |
| 303 | 303 | dev_set_name(&vdev->dev, "%s", bus_id_name); |
| 304 | 304 | vdev->dev_no = ~(u64)0; |
| 305 | + vdev->id = ~(u64)0; | |
| 305 | 306 | } else if (!cfg_handle) { |
| 306 | 307 | dev_set_name(&vdev->dev, "%s-%llu", bus_id_name, *id); |
| 307 | 308 | vdev->dev_no = *id; |
| 309 | + vdev->id = ~(u64)0; | |
| 308 | 310 | } else { |
| 309 | 311 | dev_set_name(&vdev->dev, "%s-%llu-%llu", bus_id_name, |
| 310 | 312 | *cfg_handle, *id); |
| 311 | 313 | vdev->dev_no = *cfg_handle; |
| 314 | + vdev->id = *id; | |
| 312 | 315 | } |
| 313 | 316 | |
| 314 | 317 | vdev->dev.parent = parent; |
| @@ -351,27 +354,84 @@ static void vio_add(struct mdesc_handle *hp, u64 node) · 36 unmodified lines | ||
| 351 | 354 | (void) vio_create_one(hp, node, &root_vdev->dev); |
| 352 | 355 | } |
| 353 | 356 | |
| 357 | +struct vio_md_node_query { | |
| 358 | + const char *type; | |
| 359 | + u64 dev_no; | |
| 360 | + u64 id; | |
| 361 | +}; | |
| 362 | + | |
| 354 | 363 | static int vio_md_node_match(struct device *dev, void *arg) |
| 355 | 364 | { |
| 365 | + struct vio_md_node_query *query = (struct vio_md_node_query *) arg; | |
| 356 | 366 | struct vio_dev *vdev = to_vio_dev(dev); |
| 357 | 367 | |
| 358 | − if (vdev->mp == (u64) arg) | |
| 359 | − return 1; | |
| 368 | + if (vdev->dev_no != query->dev_no) | |
| 369 | + return 0; | |
| 370 | + if (vdev->id != query->id) | |
| 371 | + return 0; | |
| 372 | + if (strcmp(vdev->type, query->type)) | |
| 373 | + return 0; | |
| 360 | 374 | |
| 361 | − return 0; | |
| 375 | + return 1; | |
| 362 | 376 | } |
| 363 | 377 | |
| 364 | 378 | static void vio_remove(struct mdesc_handle *hp, u64 node) |
| 365 | 379 | { |
| 380 | + const char *type; | |
| 381 | + const u64 *id, *cfg_handle; | |
| 382 | + u64 a; | |
| 383 | + struct vio_md_node_query query; | |
| 366 | 384 | struct device *dev; |
| 367 | 385 | |
| 368 | − dev = device_find_child(&root_vdev->dev, (void *) node, | |
| 386 | + type = mdesc_get_property(hp, node, "device-type", NULL); | |
| 387 | + if (!type) { | |
| 388 | + type = mdesc_get_property(hp, node, "name", NULL); | |
| 389 | + if (!type) | |
| 390 | + type = mdesc_node_name(hp, node); | |
| 391 | + } | |
| 392 | + | |
| 393 | + query.type = type; | |
| 394 | + | |
| 395 | + id = mdesc_get_property(hp, node, "id", NULL); | |
| 396 | + cfg_handle = NULL; | |
| 397 | + mdesc_for_each_arc(a, hp, node, MDESC_ARC_TYPE_BACK) { | |
| 398 | + u64 target; | |
| 399 | + | |
| 400 | + target = mdesc_arc_target(hp, a); | |
| 401 | + cfg_handle = mdesc_get_property(hp, target, | |
| 402 | + "cfg-handle", NULL); | |
| 403 | + if (cfg_handle) | |
| 404 | + break; | |
| 405 | + } | |
| 406 | + | |
| 407 | + if (!id) { | |
| 408 | + query.dev_no = ~(u64)0; | |
| 409 | + query.id = ~(u64)0; | |
| 410 | + } else if (!cfg_handle) { | |
| 411 | + query.dev_no = *id; | |
| 412 | + query.id = ~(u64)0; | |
| 413 | + } else { | |
| 414 | + query.dev_no = *cfg_handle; | |
| 415 | + query.id = *id; | |
| 416 | + } | |
| 417 | + | |
| 418 | + dev = device_find_child(&root_vdev->dev, &query, | |
| 369 | 419 | vio_md_node_match); |
| 370 | 420 | if (dev) { |
| 371 | 421 | printk(KERN_INFO "VIO: Removing device %s\n", dev_name(dev)); |
| 372 | 422 | |
| 373 | 423 | device_unregister(dev); |
| 374 | 424 | put_device(dev); |
| 425 | + } else { | |
| 426 | + if (!id) | |
| 427 | + printk(KERN_ERR "VIO: Removed unknown %s node.\n", | |
| 428 | + type); | |
| 429 | + else if (!cfg_handle) | |
| 430 | + printk(KERN_ERR "VIO: Removed unknown %s node %llu.\n", | |
| 431 | + type, *id); | |
| 432 | + else | |
| 433 | + printk(KERN_ERR "VIO: Removed unknown %s node %llu-%llu.\n", | |
| 434 | + type, *cfg_handle, *id); | |
| 375 | 435 | } |
| 376 | 436 | } |
| 377 | 437 | |
| @@ -15,6 +15,7 @@ lib-$(CONFIG_SPARC32) += copy_user.o locks.o · 14 unmodified lines | ||
| 15 | 15 | lib-$(CONFIG_SPARC64) += atomic_64.o |
| 16 | 16 | lib-$(CONFIG_SPARC32) += lshrdi3.o ashldi3.o |
| 17 | 17 | lib-$(CONFIG_SPARC32) += muldi3.o bitext.o cmpdi2.o |
| 18 | +lib-$(CONFIG_SPARC64) += multi3.o | |
| 18 | 19 | |
| 19 | 20 | lib-$(CONFIG_SPARC64) += copy_page.o clear_page.o bzero.o |
| 20 | 21 | lib-$(CONFIG_SPARC64) += csum_copy.o csum_copy_from_user.o csum_copy_to_user.o |
| @@ -0,0 +1,35 @@ | ||
| 1 | +#include <linux/linkage.h> | |
| 2 | +#include <asm/export.h> | |
| 3 | + | |
| 4 | + .text | |
| 5 | + .align 4 | |
| 6 | +ENTRY(__multi3) /* %o0 = u, %o1 = v */ | |
| 7 | + mov %o1, %g1 | |
| 8 | + srl %o3, 0, %g4 | |
| 9 | + mulx %g4, %g1, %o1 | |
| 10 | + srlx %g1, 0x20, %g3 | |
| 11 | + mulx %g3, %g4, %g5 | |
| 12 | + sllx %g5, 0x20, %o5 | |
| 13 | + srl %g1, 0, %g4 | |
| 14 | + sub %o1, %o5, %o5 | |
| 15 | + srlx %o5, 0x20, %o5 | |
| 16 | + addcc %g5, %o5, %g5 | |
| 17 | + srlx %o3, 0x20, %o5 | |
| 18 | + mulx %g4, %o5, %g4 | |
| 19 | + mulx %g3, %o5, %o5 | |
| 20 | + sethi %hi(0x80000000), %g3 | |
| 21 | + addcc %g5, %g4, %g5 | |
| 22 | + srlx %g5, 0x20, %g5 | |
| 23 | + add %g3, %g3, %g3 | |
| 24 | + movcc %xcc, %g0, %g3 | |
| 25 | + addcc %o5, %g5, %o5 | |
| 26 | + sllx %g4, 0x20, %g4 | |
| 27 | + add %o1, %g4, %o1 | |
| 28 | + add %o5, %g3, %g2 | |
| 29 | + mulx %g1, %o2, %g1 | |
| 30 | + add %g1, %g2, %g1 | |
| 31 | + mulx %o0, %o3, %o0 | |
| 32 | + retl | |
| 33 | + add %g1, %o0, %o0 | |
| 34 | +ENDPROC(__multi3) | |
| 35 | +EXPORT_SYMBOL(__multi3) | |
| @@ -120,7 +120,7 @@ hugetlb_get_unmapped_area(struct file *file, unsigned long addr, · 119 unmodified lines | ||
| 120 | 120 | addr = ALIGN(addr, huge_page_size(h)); |
| 121 | 121 | vma = find_vma(mm, addr); |
| 122 | 122 | if (task_size - len >= addr && |
| 123 | − (!vma || addr + len <= vma->vm_start)) | |
| 123 | + (!vma || addr + len <= vm_start_gap(vma))) | |
| 124 | 124 | return addr; |
| 125 | 125 | } |
| 126 | 126 | if (mm->get_unmapped_area == arch_get_unmapped_area) |
| @@ -358,7 +358,8 @@ static int __init setup_hugepagesz(char *string) · 357 unmodified lines | ||
| 358 | 358 | } |
| 359 | 359 | |
| 360 | 360 | if ((hv_pgsz_mask & cpu_pgsz_mask) == 0U) { |
| 361 | − pr_warn("hugepagesz=%llu not supported by MMU.\n", | |
| 361 | + hugetlb_bad_size(); | |
| 362 | + pr_err("hugepagesz=%llu not supported by MMU.\n", | |
| 362 | 363 | hugepage_size); |
| 363 | 364 | goto out; |
| 364 | 365 | } |
| @@ -706,10 +707,58 @@ EXPORT_SYMBOL(__flush_dcache_range); · 341 unmodified lines | ||
| 706 | 707 | |
| 707 | 708 | /* get_new_mmu_context() uses "cache + 1". */ |
| 708 | 709 | DEFINE_SPINLOCK(ctx_alloc_lock); |
| 709 | −unsigned long tlb_context_cache = CTX_FIRST_VERSION - 1; | |
| 710 | +unsigned long tlb_context_cache = CTX_FIRST_VERSION; | |
| 710 | 711 | #define MAX_CTX_NR (1UL << CTX_NR_BITS) |
| 711 | 712 | #define CTX_BMAP_SLOTS BITS_TO_LONGS(MAX_CTX_NR) |
| 712 | 713 | DECLARE_BITMAP(mmu_context_bmap, MAX_CTX_NR); |
| 714 | +DEFINE_PER_CPU(struct mm_struct *, per_cpu_secondary_mm) = {0}; | |
| 715 | + | |
| 716 | +static void mmu_context_wrap(void) | |
| 717 | +{ | |
| 718 | + unsigned long old_ver = tlb_context_cache & CTX_VERSION_MASK; | |
| 719 | + unsigned long new_ver, new_ctx, old_ctx; | |
| 720 | + struct mm_struct *mm; | |
| 721 | + int cpu; | |
| 722 | + | |
| 723 | + bitmap_zero(mmu_context_bmap, 1 << CTX_NR_BITS); | |
| 724 | + | |
| 725 | + /* Reserve kernel context */ | |
| 726 | + set_bit(0, mmu_context_bmap); | |
| 727 | + | |
| 728 | + new_ver = (tlb_context_cache & CTX_VERSION_MASK) + CTX_FIRST_VERSION; | |
| 729 | + if (unlikely(new_ver == 0)) | |
| 730 | + new_ver = CTX_FIRST_VERSION; | |
| 731 | + tlb_context_cache = new_ver; | |
| 732 | + | |
| 733 | + /* | |
| 734 | + * Make sure that any new mm that are added into per_cpu_secondary_mm, | |
| 735 | + * are going to go through get_new_mmu_context() path. | |
| 736 | + */ | |
| 737 | + mb(); | |
| 738 | + | |
| 739 | + /* | |
| 740 | + * Updated versions to current on those CPUs that had valid secondary | |
| 741 | + * contexts | |
| 742 | + */ | |
| 743 | + for_each_online_cpu(cpu) { | |
| 744 | + /* | |
| 745 | + * If a new mm is stored after we took this mm from the array, | |
| 746 | + * it will go into get_new_mmu_context() path, because we | |
| 747 | + * already bumped the version in tlb_context_cache. | |
| 748 | + */ | |
| 749 | + mm = per_cpu(per_cpu_secondary_mm, cpu); | |
| 750 | + | |
| 751 | + if (unlikely(!mm || mm == &init_mm)) | |
| 752 | + continue; | |
| 753 | + | |
| 754 | + old_ctx = mm->context.sparc64_ctx_val; | |
| 755 | + if (likely((old_ctx & CTX_VERSION_MASK) == old_ver)) { | |
| 756 | + new_ctx = (old_ctx & ~CTX_VERSION_MASK) | new_ver; | |
| 757 | + set_bit(new_ctx & CTX_NR_MASK, mmu_context_bmap); | |
| 758 | + mm->context.sparc64_ctx_val = new_ctx; | |
| 759 | + } | |
| 760 | + } | |
| 761 | +} | |
| 713 | 762 | |
| 714 | 763 | /* Caller does TLB context flushing on local CPU if necessary. |
| 715 | 764 | * The caller also ensures that CTX_VALID(mm->context) is false. |
| @@ -725,48 +774,30 @@ void get_new_mmu_context(struct mm_struct *mm) · 9 unmodified lines | ||
| 725 | 774 | { |
| 726 | 775 | unsigned long ctx, new_ctx; |
| 727 | 776 | unsigned long orig_pgsz_bits; |
| 728 | − int new_version; | |
| 729 | 777 | |
| 730 | 778 | spin_lock(&ctx_alloc_lock); |
| 779 | +retry: | |
| 780 | + /* wrap might have happened, test again if our context became valid */ | |
| 781 | + if (unlikely(CTX_VALID(mm->context))) | |
| 782 | + goto out; | |
| 731 | 783 | orig_pgsz_bits = (mm->context.sparc64_ctx_val & CTX_PGSZ_MASK); |
| 732 | 784 | ctx = (tlb_context_cache + 1) & CTX_NR_MASK; |
| 733 | 785 | new_ctx = find_next_zero_bit(mmu_context_bmap, 1 << CTX_NR_BITS, ctx); |
| 734 | − new_version = 0; | |
| 735 | 786 | if (new_ctx >= (1 << CTX_NR_BITS)) { |
| 736 | 787 | new_ctx = find_next_zero_bit(mmu_context_bmap, ctx, 1); |
| 737 | 788 | if (new_ctx >= ctx) { |
| 738 | − int i; | |
| 739 | − new_ctx = (tlb_context_cache & CTX_VERSION_MASK) + | |
| 740 | − CTX_FIRST_VERSION; | |
| 741 | − if (new_ctx == 1) | |
| 742 | − new_ctx = CTX_FIRST_VERSION; | |
| 743 | − | |
| 744 | − /* Don't call memset, for 16 entries that's just | |
| 745 | − * plain silly... | |
| 746 | − */ | |
| 747 | − mmu_context_bmap[0] = 3; | |
| 748 | − mmu_context_bmap[1] = 0; | |
| 749 | − mmu_context_bmap[2] = 0; | |
| 750 | − mmu_context_bmap[3] = 0; | |
| 751 | − for (i = 4; i < CTX_BMAP_SLOTS; i += 4) { | |
| 752 | − mmu_context_bmap[i + 0] = 0; | |
| 753 | − mmu_context_bmap[i + 1] = 0; | |
| 754 | − mmu_context_bmap[i + 2] = 0; | |
| 755 | − mmu_context_bmap[i + 3] = 0; | |
| 756 | − } | |
| 757 | − new_version = 1; | |
| 758 | − goto out; | |
| 789 | + mmu_context_wrap(); | |
| 790 | + goto retry; | |
| 759 | 791 | } |
| 760 | 792 | } |
| 793 | + if (mm->context.sparc64_ctx_val) | |
| 794 | + cpumask_clear(mm_cpumask(mm)); | |
| 761 | 795 | mmu_context_bmap[new_ctx>>6] |= (1UL << (new_ctx & 63)); |
| 762 | 796 | new_ctx |= (tlb_context_cache & CTX_VERSION_MASK); |
| 763 | −out: | |
| 764 | 797 | tlb_context_cache = new_ctx; |
| 765 | 798 | mm->context.sparc64_ctx_val = new_ctx | orig_pgsz_bits; |
| 799 | +out: | |
| 766 | 800 | spin_unlock(&ctx_alloc_lock); |
| 767 | − | |
| 768 | − if (unlikely(new_version)) | |
| 769 | − smp_new_mmu_context_version(); | |
| 770 | 801 | } |
| 771 | 802 | |
| 772 | 803 | static int numa_enabled = 1; |
| @@ -496,7 +496,8 @@ retry_tsb_alloc: · 495 unmodified lines | ||
| 496 | 496 | extern void copy_tsb(unsigned long old_tsb_base, |
| 497 | 497 | unsigned long old_tsb_size, |
| 498 | 498 | unsigned long new_tsb_base, |
| 499 | − unsigned long new_tsb_size); | |
| 499 | + unsigned long new_tsb_size, | |
| 500 | + unsigned long page_size_shift); | |
| 500 | 501 | unsigned long old_tsb_base = (unsigned long) old_tsb; |
| 501 | 502 | unsigned long new_tsb_base = (unsigned long) new_tsb; |
| 502 | 503 | |
| @@ -504,7 +505,9 @@ retry_tsb_alloc: · 1 unmodified line | ||
| 504 | 505 | old_tsb_base = __pa(old_tsb_base); |
| 505 | 506 | new_tsb_base = __pa(new_tsb_base); |
| 506 | 507 | } |
| 507 | − copy_tsb(old_tsb_base, old_size, new_tsb_base, new_size); | |
| 508 | + copy_tsb(old_tsb_base, old_size, new_tsb_base, new_size, | |
| 509 | + tsb_index == MM_TSB_BASE ? | |
| 510 | + PAGE_SHIFT : REAL_HPAGE_SHIFT); | |
| 508 | 511 | } |
| 509 | 512 | |
| 510 | 513 | mm->context.tsb_block[tsb_index].tsb = new_tsb; |
| @@ -971,11 +971,6 @@ xcall_capture: · 970 unmodified lines | ||
| 971 | 971 | wr %g0, (1 << PIL_SMP_CAPTURE), %set_softint |
| 972 | 972 | retry |
| 973 | 973 | |
| 974 | − .globl xcall_new_mmu_context_version | |
| 975 | −xcall_new_mmu_context_version: | |
| 976 | − wr %g0, (1 << PIL_SMP_CTX_NEW_VERSION), %set_softint | |
| 977 | − retry | |
| 978 | − | |
| 979 | 974 | #ifdef CONFIG_KGDB |
| 980 | 975 | .globl xcall_kgdb_capture |
| 981 | 976 | xcall_kgdb_capture: |
| @@ -233,7 +233,7 @@ unsigned long hugetlb_get_unmapped_area(struct file *file, unsigned long addr, · 232 unmodified lines | ||
| 233 | 233 | addr = ALIGN(addr, huge_page_size(h)); |
| 234 | 234 | vma = find_vma(mm, addr); |
| 235 | 235 | if (TASK_SIZE - len >= addr && |
| 236 | − (!vma || addr + len <= vma->vm_start)) | |
| 236 | + (!vma || addr + len <= vm_start_gap(vma))) | |
| 237 | 237 | return addr; |
| 238 | 238 | } |
| 239 | 239 | if (current->mm->get_unmapped_area == arch_get_unmapped_area) |
| @@ -2776,10 +2776,6 @@ config COMPAT_FOR_U64_ALIGNMENT · 2775 unmodified lines | ||
| 2776 | 2776 | config SYSVIPC_COMPAT |
| 2777 | 2777 | def_bool y |
| 2778 | 2778 | depends on SYSVIPC |
| 2779 | − | |
| 2780 | −config KEYS_COMPAT | |
| 2781 | − def_bool y | |
| 2782 | − depends on KEYS | |
| 2783 | 2779 | endif |
| 2784 | 2780 | |
| 2785 | 2781 | endmenu |
| @@ -29,6 +29,7 @@ struct pt_regs; · 28 unmodified lines | ||
| 29 | 29 | } while (0) |
| 30 | 30 | |
| 31 | 31 | extern int fixup_exception(struct pt_regs *regs, int trapnr); |
| 32 | +extern int fixup_bug(struct pt_regs *regs, int trapnr); | |
| 32 | 33 | extern bool ex_has_fault_handler(unsigned long ip); |
| 33 | 34 | extern void early_fixup_exception(struct pt_regs *regs, int trapnr); |
| 34 | 35 | |
| @@ -255,6 +255,7 @@ static void init_cyrix(struct cpuinfo_x86 *c) · 254 unmodified lines | ||
| 255 | 255 | break; |
| 256 | 256 | |
| 257 | 257 | case 4: /* MediaGX/GXm or Geode GXM/GXLV/GX1 */ |
| 258 | + case 11: /* GX1 with inverted Device ID */ | |
| 258 | 259 | #ifdef CONFIG_PCI |
| 259 | 260 | { |
| 260 | 261 | u32 vendor, device; |
| @@ -320,7 +320,7 @@ void load_ucode_amd_ap(unsigned int cpuid_1_eax) · 319 unmodified lines | ||
| 320 | 320 | } |
| 321 | 321 | |
| 322 | 322 | static enum ucode_state |
| 323 | −load_microcode_amd(int cpu, u8 family, const u8 *data, size_t size); | |
| 323 | +load_microcode_amd(bool save, u8 family, const u8 *data, size_t size); | |
| 324 | 324 | |
| 325 | 325 | int __init save_microcode_in_initrd_amd(unsigned int cpuid_1_eax) |
| 326 | 326 | { |
| @@ -338,8 +338,7 @@ int __init save_microcode_in_initrd_amd(unsigned int cpuid_1_eax) · 11 unmodified lines | ||
| 338 | 338 | if (!desc.mc) |
| 339 | 339 | return -EINVAL; |
| 340 | 340 | |
| 341 | − ret = load_microcode_amd(smp_processor_id(), x86_family(cpuid_1_eax), | |
| 342 | − desc.data, desc.size); | |
| 341 | + ret = load_microcode_amd(true, x86_family(cpuid_1_eax), desc.data, desc.size); | |
| 343 | 342 | if (ret != UCODE_OK) |
| 344 | 343 | return -EINVAL; |
| 345 | 344 | |
| @@ -675,7 +674,7 @@ static enum ucode_state __load_microcode_amd(u8 family, const u8 *data, · 329 unmodified lines | ||
| 675 | 674 | } |
| 676 | 675 | |
| 677 | 676 | static enum ucode_state |
| 678 | −load_microcode_amd(int cpu, u8 family, const u8 *data, size_t size) | |
| 677 | +load_microcode_amd(bool save, u8 family, const u8 *data, size_t size) | |
| 679 | 678 | { |
| 680 | 679 | enum ucode_state ret; |
| 681 | 680 | |
| @@ -689,8 +688,8 @@ load_microcode_amd(int cpu, u8 family, const u8 *data, size_t size) · 7 unmodified lines | ||
| 689 | 688 | |
| 690 | 689 | #ifdef CONFIG_X86_32 |
| 691 | 690 | /* save BSP's matching patch for early load */ |
| 692 | − if (cpu_data(cpu).cpu_index == boot_cpu_data.cpu_index) { | |
| 693 | − struct ucode_patch *p = find_patch(cpu); | |
| 691 | + if (save) { | |
| 692 | + struct ucode_patch *p = find_patch(0); | |
| 694 | 693 | if (p) { |
| 695 | 694 | memset(amd_ucode_patch, 0, PATCH_MAX_SIZE); |
| 696 | 695 | memcpy(amd_ucode_patch, p->data, min_t(u32, ksize(p->data), |
| @@ -722,11 +721,12 @@ static enum ucode_state request_microcode_amd(int cpu, struct device *device, · 25 unmodified lines | ||
| 722 | 721 | { |
| 723 | 722 | char fw_name[36] = "amd-ucode/microcode_amd.bin"; |
| 724 | 723 | struct cpuinfo_x86 *c = &cpu_data(cpu); |
| 724 | + bool bsp = c->cpu_index == boot_cpu_data.cpu_index; | |
| 725 | 725 | enum ucode_state ret = UCODE_NFOUND; |
| 726 | 726 | const struct firmware *fw; |
| 727 | 727 | |
| 728 | 728 | /* reload ucode container only on the boot cpu */ |
| 729 | − if (!refresh_fw || c->cpu_index != boot_cpu_data.cpu_index) | |
| 729 | + if (!refresh_fw || !bsp) | |
| 730 | 730 | return UCODE_OK; |
| 731 | 731 | |
| 732 | 732 | if (c->x86 >= 0x15) |
| @@ -743,7 +743,7 @@ static enum ucode_state request_microcode_amd(int cpu, struct device *device, · 10 unmodified lines | ||
| 743 | 743 | goto fw_release; |
| 744 | 744 | } |
| 745 | 745 | |
| 746 | − ret = load_microcode_amd(cpu, c->x86, fw->data, fw->size); | |
| 746 | + ret = load_microcode_amd(bsp, c->x86, fw->data, fw->size); | |
| 747 | 747 | |
| 748 | 748 | fw_release: |
| 749 | 749 | release_firmware(fw); |
| @@ -619,6 +619,9 @@ int __init save_microcode_in_initrd_intel(void) · 618 unmodified lines | ||
| 619 | 619 | |
| 620 | 620 | show_saved_mc(); |
| 621 | 621 | |
| 622 | + /* initrd is going away, clear patch ptr. */ | |
| 623 | + intel_ucode_patch = NULL; | |
| 624 | + | |
| 622 | 625 | return 0; |
| 623 | 626 | } |
| 624 | 627 | |
| @@ -161,8 +161,8 @@ void kvm_async_pf_task_wait(u32 token) · 160 unmodified lines | ||
| 161 | 161 | */ |
| 162 | 162 | rcu_irq_exit(); |
| 163 | 163 | native_safe_halt(); |
| 164 | − rcu_irq_enter(); | |
| 165 | 164 | local_irq_disable(); |
| 165 | + rcu_irq_enter(); | |
| 166 | 166 | } |
| 167 | 167 | } |
| 168 | 168 | if (!n.halted) |
| @@ -78,7 +78,7 @@ void __show_regs(struct pt_regs *regs, int all) · 77 unmodified lines | ||
| 78 | 78 | |
| 79 | 79 | printk(KERN_DEFAULT "EIP: %pS\n", (void *)regs->ip); |
| 80 | 80 | printk(KERN_DEFAULT "EFLAGS: %08lx CPU: %d\n", regs->flags, |
| 81 | − smp_processor_id()); | |
| 81 | + raw_smp_processor_id()); | |
| 82 | 82 | |
| 83 | 83 | printk(KERN_DEFAULT "EAX: %08lx EBX: %08lx ECX: %08lx EDX: %08lx\n", |
| 84 | 84 | regs->ax, regs->bx, regs->cx, regs->dx); |
| @@ -144,7 +144,7 @@ arch_get_unmapped_area(struct file *filp, unsigned long addr, · 143 unmodified lines | ||
| 144 | 144 | addr = PAGE_ALIGN(addr); |
| 145 | 145 | vma = find_vma(mm, addr); |
| 146 | 146 | if (end - len >= addr && |
| 147 | − (!vma || addr + len <= vma->vm_start)) | |
| 147 | + (!vma || addr + len <= vm_start_gap(vma))) | |
| 148 | 148 | return addr; |
| 149 | 149 | } |
| 150 | 150 | |
| @@ -187,7 +187,7 @@ arch_get_unmapped_area_topdown(struct file *filp, const unsigned long addr0, · 36 unmodified lines | ||
| 187 | 187 | addr = PAGE_ALIGN(addr); |
| 188 | 188 | vma = find_vma(mm, addr); |
| 189 | 189 | if (TASK_SIZE - len >= addr && |
| 190 | − (!vma || addr + len <= vma->vm_start)) | |
| 190 | + (!vma || addr + len <= vm_start_gap(vma))) | |
| 191 | 191 | return addr; |
| 192 | 192 | } |
| 193 | 193 | |
| @@ -182,7 +182,7 @@ int is_valid_bugaddr(unsigned long addr) · 181 unmodified lines | ||
| 182 | 182 | return ud == INSN_UD0 || ud == INSN_UD2; |
| 183 | 183 | } |
| 184 | 184 | |
| 185 | −static int fixup_bug(struct pt_regs *regs, int trapnr) | |
| 185 | +int fixup_bug(struct pt_regs *regs, int trapnr) | |
| 186 | 186 | { |
| 187 | 187 | if (trapnr != X86_TRAP_UD) |
| 188 | 188 | return 0; |
| @@ -780,18 +780,20 @@ out: · 779 unmodified lines | ||
| 780 | 780 | static int move_to_next_stateful_cpuid_entry(struct kvm_vcpu *vcpu, int i) |
| 781 | 781 | { |
| 782 | 782 | struct kvm_cpuid_entry2 *e = &vcpu->arch.cpuid_entries[i]; |
| 783 | − int j, nent = vcpu->arch.cpuid_nent; | |
| 783 | + struct kvm_cpuid_entry2 *ej; | |
| 784 | + int j = i; | |
| 785 | + int nent = vcpu->arch.cpuid_nent; | |
| 784 | 786 | |
| 785 | 787 | e->flags &= ~KVM_CPUID_FLAG_STATE_READ_NEXT; |
| 786 | 788 | /* when no next entry is found, the current entry[i] is reselected */ |
| 787 | − for (j = i + 1; ; j = (j + 1) % nent) { | |
| 788 | − struct kvm_cpuid_entry2 *ej = &vcpu->arch.cpuid_entries[j]; | |
| 789 | − if (ej->function == e->function) { | |
| 790 | − ej->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT; | |
| 791 | − return j; | |
| 792 | − } | |
| 793 | − } | |
| 794 | − return 0; /* silence gcc, even though control never reaches here */ | |
| 789 | + do { | |
| 790 | + j = (j + 1) % nent; | |
| 791 | + ej = &vcpu->arch.cpuid_entries[j]; | |
| 792 | + } while (ej->function != e->function); | |
| 793 | + | |
| 794 | + ej->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT; | |
| 795 | + | |
| 796 | + return j; | |
| 795 | 797 | } |
| 796 | 798 | |
| 797 | 799 | /* find an entry with matching function, matching index (if needed), and that |
| @@ -1495,8 +1495,10 @@ EXPORT_SYMBOL_GPL(kvm_lapic_hv_timer_in_use); · 1494 unmodified lines | ||
| 1495 | 1495 | |
| 1496 | 1496 | static void cancel_hv_timer(struct kvm_lapic *apic) |
| 1497 | 1497 | { |
| 1498 | + preempt_disable(); | |
| 1498 | 1499 | kvm_x86_ops->cancel_hv_timer(apic->vcpu); |
| 1499 | 1500 | apic->lapic_timer.hv_timer_in_use = false; |
| 1501 | + preempt_enable(); | |
| 1500 | 1502 | } |
| 1501 | 1503 | |
| 1502 | 1504 | static bool start_hv_timer(struct kvm_lapic *apic) |
| @@ -1934,7 +1936,8 @@ void kvm_lapic_reset(struct kvm_vcpu *vcpu, bool init_event) · 431 unmodified lines | ||
| 1934 | 1936 | for (i = 0; i < KVM_APIC_LVT_NUM; i++) |
| 1935 | 1937 | kvm_lapic_set_reg(apic, APIC_LVTT + 0x10 * i, APIC_LVT_MASKED); |
| 1936 | 1938 | apic_update_lvtt(apic); |
| 1937 | − if (kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_LINT0_REENABLED)) | |
| 1939 | + if (kvm_vcpu_is_reset_bsp(vcpu) && | |
| 1940 | + kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_LINT0_REENABLED)) | |
| 1938 | 1941 | kvm_lapic_set_reg(apic, APIC_LVT0, |
| 1939 | 1942 | SET_APIC_DELIVERY_MODE(0, APIC_MODE_EXTINT)); |
| 1940 | 1943 | apic_manage_nmi_watchdog(apic, kvm_lapic_get_reg(apic, APIC_LVT0)); |
| @@ -3698,12 +3698,15 @@ static int kvm_arch_setup_async_pf(struct kvm_vcpu *vcpu, gva_t gva, gfn_t gfn) · 3697 unmodified lines | ||
| 3698 | 3698 | return kvm_setup_async_pf(vcpu, gva, kvm_vcpu_gfn_to_hva(vcpu, gfn), &arch); |
| 3699 | 3699 | } |
| 3700 | 3700 | |
| 3701 | −static bool can_do_async_pf(struct kvm_vcpu *vcpu) | |
| 3701 | +bool kvm_can_do_async_pf(struct kvm_vcpu *vcpu) | |
| 3702 | 3702 | { |
| 3703 | 3703 | if (unlikely(!lapic_in_kernel(vcpu) || |
| 3704 | 3704 | kvm_event_needs_reinjection(vcpu))) |
| 3705 | 3705 | return false; |
| 3706 | 3706 | |
| 3707 | + if (is_guest_mode(vcpu)) | |
| 3708 | + return false; | |
| 3709 | + | |
| 3707 | 3710 | return kvm_x86_ops->interrupt_allowed(vcpu); |
| 3708 | 3711 | } |
| 3709 | 3712 | |
| @@ -3719,7 +3722,7 @@ static bool try_async_pf(struct kvm_vcpu *vcpu, bool prefault, gfn_t gfn, · 9 unmodified lines | ||
| 3719 | 3722 | if (!async) |
| 3720 | 3723 | return false; /* *pfn has correct page already */ |
| 3721 | 3724 | |
| 3722 | − if (!prefault && can_do_async_pf(vcpu)) { | |
| 3725 | + if (!prefault && kvm_can_do_async_pf(vcpu)) { | |
| 3723 | 3726 | trace_kvm_try_async_get_page(gva, gfn); |
| 3724 | 3727 | if (kvm_find_async_pf_gfn(vcpu, gfn)) { |
| 3725 | 3728 | trace_kvm_async_pf_doublefault(gva, gfn); |
| @@ -76,6 +76,7 @@ int handle_mmio_page_fault(struct kvm_vcpu *vcpu, u64 addr, bool direct); · 75 unmodified lines | ||
| 76 | 76 | void kvm_init_shadow_mmu(struct kvm_vcpu *vcpu); |
| 77 | 77 | void kvm_init_shadow_ept_mmu(struct kvm_vcpu *vcpu, bool execonly, |
| 78 | 78 | bool accessed_dirty); |
| 79 | +bool kvm_can_do_async_pf(struct kvm_vcpu *vcpu); | |
| 79 | 80 | |
| 80 | 81 | static inline unsigned int kvm_mmu_available_pages(struct kvm *kvm) |
| 81 | 82 | { |
| @@ -1807,7 +1807,7 @@ static void svm_get_segment(struct kvm_vcpu *vcpu, · 1806 unmodified lines | ||
| 1807 | 1807 | * AMD's VMCB does not have an explicit unusable field, so emulate it |
| 1808 | 1808 | * for cross vendor migration purposes by "not present" |
| 1809 | 1809 | */ |
| 1810 | − var->unusable = !var->present || (var->type == 0); | |
| 1810 | + var->unusable = !var->present; | |
| 1811 | 1811 | |
| 1812 | 1812 | switch (seg) { |
| 1813 | 1813 | case VCPU_SREG_TR: |
| @@ -1840,6 +1840,7 @@ static void svm_get_segment(struct kvm_vcpu *vcpu, · 26 unmodified lines | ||
| 1840 | 1840 | */ |
| 1841 | 1841 | if (var->unusable) |
| 1842 | 1842 | var->db = 0; |
| 1843 | + /* This is symmetric with svm_set_segment() */ | |
| 1843 | 1844 | var->dpl = to_svm(vcpu)->vmcb->save.cpl; |
| 1844 | 1845 | break; |
| 1845 | 1846 | } |
| @@ -1980,18 +1981,14 @@ static void svm_set_segment(struct kvm_vcpu *vcpu, · 134 unmodified lines | ||
| 1980 | 1981 | s->base = var->base; |
| 1981 | 1982 | s->limit = var->limit; |
| 1982 | 1983 | s->selector = var->selector; |
| 1983 | − if (var->unusable) | |
| 1984 | − s->attrib = 0; | |
| 1985 | − else { | |
| 1986 | − s->attrib = (var->type & SVM_SELECTOR_TYPE_MASK); | |
| 1987 | − s->attrib |= (var->s & 1) << SVM_SELECTOR_S_SHIFT; | |
| 1988 | − s->attrib |= (var->dpl & 3) << SVM_SELECTOR_DPL_SHIFT; | |
| 1989 | − s->attrib |= (var->present & 1) << SVM_SELECTOR_P_SHIFT; | |
| 1990 | − s->attrib |= (var->avl & 1) << SVM_SELECTOR_AVL_SHIFT; | |
| 1991 | − s->attrib |= (var->l & 1) << SVM_SELECTOR_L_SHIFT; | |
| 1992 | − s->attrib |= (var->db & 1) << SVM_SELECTOR_DB_SHIFT; | |
| 1993 | − s->attrib |= (var->g & 1) << SVM_SELECTOR_G_SHIFT; | |
| 1994 | − } | |
| 1984 | + s->attrib = (var->type & SVM_SELECTOR_TYPE_MASK); | |
| 1985 | + s->attrib |= (var->s & 1) << SVM_SELECTOR_S_SHIFT; | |
| 1986 | + s->attrib |= (var->dpl & 3) << SVM_SELECTOR_DPL_SHIFT; | |
| 1987 | + s->attrib |= ((var->present & 1) && !var->unusable) << SVM_SELECTOR_P_SHIFT; | |
| 1988 | + s->attrib |= (var->avl & 1) << SVM_SELECTOR_AVL_SHIFT; | |
| 1989 | + s->attrib |= (var->l & 1) << SVM_SELECTOR_L_SHIFT; | |
| 1990 | + s->attrib |= (var->db & 1) << SVM_SELECTOR_DB_SHIFT; | |
| 1991 | + s->attrib |= (var->g & 1) << SVM_SELECTOR_G_SHIFT; | |
| 1995 | 1992 | |
| 1996 | 1993 | /* |
| 1997 | 1994 | * This is always accurate, except if SYSRET returned to a segment |
| @@ -2000,7 +1997,8 @@ static void svm_set_segment(struct kvm_vcpu *vcpu, · 2 unmodified lines | ||
| 2000 | 1997 | * would entail passing the CPL to userspace and back. |
| 2001 | 1998 | */ |
| 2002 | 1999 | if (seg == VCPU_SREG_SS) |
| 2003 | − svm->vmcb->save.cpl = (s->attrib >> SVM_SELECTOR_DPL_SHIFT) & 3; | |
| 2000 | + /* This is symmetric with svm_get_segment() */ | |
| 2001 | + svm->vmcb->save.cpl = (var->dpl & 3); | |
| 2004 | 2002 | |
| 2005 | 2003 | mark_dirty(svm->vmcb, VMCB_SEG); |
| 2006 | 2004 | } |
| @@ -2425,7 +2425,7 @@ static int nested_vmx_check_exception(struct kvm_vcpu *vcpu, unsigned nr) · 2424 unmodified lines | ||
| 2425 | 2425 | if (!(vmcs12->exception_bitmap & (1u << nr))) |
| 2426 | 2426 | return 0; |
| 2427 | 2427 | |
| 2428 | − nested_vmx_vmexit(vcpu, to_vmx(vcpu)->exit_reason, | |
| 2428 | + nested_vmx_vmexit(vcpu, EXIT_REASON_EXCEPTION_NMI, | |
| 2429 | 2429 | vmcs_read32(VM_EXIT_INTR_INFO), |
| 2430 | 2430 | vmcs_readl(EXIT_QUALIFICATION)); |
| 2431 | 2431 | return 1; |
| @@ -6914,97 +6914,21 @@ static int get_vmx_mem_address(struct kvm_vcpu *vcpu, · 4482 unmodified lines | ||
| 6914 | 6914 | return 0; |
| 6915 | 6915 | } |
| 6916 | 6916 | |
| 6917 | −/* | |
| 6918 | − * This function performs the various checks including | |
| 6919 | − * - if it's 4KB aligned | |
| 6920 | − * - No bits beyond the physical address width are set | |
| 6921 | − * - Returns 0 on success or else 1 | |
| 6922 | − * (Intel SDM Section 30.3) | |
| 6923 | − */ | |
| 6924 | −static int nested_vmx_check_vmptr(struct kvm_vcpu *vcpu, int exit_reason, | |
| 6925 | − gpa_t *vmpointer) | |
| 6917 | +static int nested_vmx_get_vmptr(struct kvm_vcpu *vcpu, gpa_t *vmpointer) | |
| 6926 | 6918 | { |
| 6927 | 6919 | gva_t gva; |
| 6928 | − gpa_t vmptr; | |
| 6929 | 6920 | struct x86_exception e; |
| 6930 | − struct page *page; | |
| 6931 | − struct vcpu_vmx *vmx = to_vmx(vcpu); | |
| 6932 | − int maxphyaddr = cpuid_maxphyaddr(vcpu); | |
| 6933 | 6921 | |
| 6934 | 6922 | if (get_vmx_mem_address(vcpu, vmcs_readl(EXIT_QUALIFICATION), |
| 6935 | 6923 | vmcs_read32(VMX_INSTRUCTION_INFO), false, &gva)) |
| 6936 | 6924 | return 1; |
| 6937 | 6925 | |
| 6938 | − if (kvm_read_guest_virt(&vcpu->arch.emulate_ctxt, gva, &vmptr, | |
| 6939 | − sizeof(vmptr), &e)) { | |
| 6926 | + if (kvm_read_guest_virt(&vcpu->arch.emulate_ctxt, gva, vmpointer, | |
| 6927 | + sizeof(*vmpointer), &e)) { | |
| 6940 | 6928 | kvm_inject_page_fault(vcpu, &e); |
| 6941 | 6929 | return 1; |
| 6942 | 6930 | } |
| 6943 | 6931 | |
| 6944 | − switch (exit_reason) { | |
| 6945 | − case EXIT_REASON_VMON: | |
| 6946 | − /* | |
| 6947 | − * SDM 3: 24.11.5 | |
| 6948 | − * The first 4 bytes of VMXON region contain the supported | |
| 6949 | − * VMCS revision identifier | |
| 6950 | − * | |
| 6951 | − * Note - IA32_VMX_BASIC[48] will never be 1 | |
| 6952 | − * for the nested case; | |
| 6953 | − * which replaces physical address width with 32 | |
| 6954 | − * | |
| 6955 | − */ | |
| 6956 | − if (!PAGE_ALIGNED(vmptr) || (vmptr >> maxphyaddr)) { | |
| 6957 | − nested_vmx_failInvalid(vcpu); | |
| 6958 | − return kvm_skip_emulated_instruction(vcpu); | |
| 6959 | − } | |
| 6960 | − | |
| 6961 | − page = nested_get_page(vcpu, vmptr); | |
| 6962 | − if (page == NULL) { | |
| 6963 | − nested_vmx_failInvalid(vcpu); | |
| 6964 | − return kvm_skip_emulated_instruction(vcpu); | |
| 6965 | − } | |
| 6966 | − if (*(u32 *)kmap(page) != VMCS12_REVISION) { | |
| 6967 | − kunmap(page); | |
| 6968 | − nested_release_page_clean(page); | |
| 6969 | − nested_vmx_failInvalid(vcpu); | |
| 6970 | − return kvm_skip_emulated_instruction(vcpu); | |
| 6971 | − } | |
| 6972 | − kunmap(page); | |
| 6973 | − nested_release_page_clean(page); | |
| 6974 | − vmx->nested.vmxon_ptr = vmptr; | |
| 6975 | − break; | |
| 6976 | − case EXIT_REASON_VMCLEAR: | |
| 6977 | − if (!PAGE_ALIGNED(vmptr) || (vmptr >> maxphyaddr)) { | |
| 6978 | − nested_vmx_failValid(vcpu, | |
| 6979 | − VMXERR_VMCLEAR_INVALID_ADDRESS); | |
| 6980 | − return kvm_skip_emulated_instruction(vcpu); | |
| 6981 | − } | |
| 6982 | − | |
| 6983 | − if (vmptr == vmx->nested.vmxon_ptr) { | |
| 6984 | − nested_vmx_failValid(vcpu, | |
| 6985 | − VMXERR_VMCLEAR_VMXON_POINTER); | |
| 6986 | − return kvm_skip_emulated_instruction(vcpu); | |
| 6987 | − } | |
| 6988 | − break; | |
| 6989 | − case EXIT_REASON_VMPTRLD: | |
| 6990 | − if (!PAGE_ALIGNED(vmptr) || (vmptr >> maxphyaddr)) { | |
| 6991 | − nested_vmx_failValid(vcpu, | |
| 6992 | − VMXERR_VMPTRLD_INVALID_ADDRESS); | |
| 6993 | − return kvm_skip_emulated_instruction(vcpu); | |
| 6994 | − } | |
| 6995 | − | |
| 6996 | − if (vmptr == vmx->nested.vmxon_ptr) { | |
| 6997 | − nested_vmx_failValid(vcpu, | |
| 6998 | − VMXERR_VMPTRLD_VMXON_POINTER); | |
| 6999 | − return kvm_skip_emulated_instruction(vcpu); | |
| 7000 | − } | |
| 7001 | − break; | |
| 7002 | − default: | |
| 7003 | − return 1; /* shouldn't happen */ | |
| 7004 | − } | |
| 7005 | − | |
| 7006 | − if (vmpointer) | |
| 7007 | − *vmpointer = vmptr; | |
| 7008 | 6932 | return 0; |
| 7009 | 6933 | } |
| 7010 | 6934 | |
| @@ -7066,6 +6990,8 @@ out_msr_bitmap: · 55 unmodified lines | ||
| 7066 | 6990 | static int handle_vmon(struct kvm_vcpu *vcpu) |
| 7067 | 6991 | { |
| 7068 | 6992 | int ret; |
| 6993 | + gpa_t vmptr; | |
| 6994 | + struct page *page; | |
| 7069 | 6995 | struct vcpu_vmx *vmx = to_vmx(vcpu); |
| 7070 | 6996 | const u64 VMXON_NEEDED_FEATURES = FEATURE_CONTROL_LOCKED |
| 7071 | 6997 | | FEATURE_CONTROL_VMXON_ENABLED_OUTSIDE_SMX; |
| @@ -7095,9 +7021,37 @@ static int handle_vmon(struct kvm_vcpu *vcpu) · 23 unmodified lines | ||
| 7095 | 7021 | return 1; |
| 7096 | 7022 | } |
| 7097 | 7023 | |
| 7098 | − if (nested_vmx_check_vmptr(vcpu, EXIT_REASON_VMON, NULL)) | |
| 7024 | + if (nested_vmx_get_vmptr(vcpu, &vmptr)) | |
| 7099 | 7025 | return 1; |
| 7100 | − | |
| 7026 | + | |
| 7027 | + /* | |
| 7028 | + * SDM 3: 24.11.5 | |
| 7029 | + * The first 4 bytes of VMXON region contain the supported | |
| 7030 | + * VMCS revision identifier | |
| 7031 | + * | |
| 7032 | + * Note - IA32_VMX_BASIC[48] will never be 1 for the nested case; | |
| 7033 | + * which replaces physical address width with 32 | |
| 7034 | + */ | |
| 7035 | + if (!PAGE_ALIGNED(vmptr) || (vmptr >> cpuid_maxphyaddr(vcpu))) { | |
| 7036 | + nested_vmx_failInvalid(vcpu); | |
| 7037 | + return kvm_skip_emulated_instruction(vcpu); | |
| 7038 | + } | |
| 7039 | + | |
| 7040 | + page = nested_get_page(vcpu, vmptr); | |
| 7041 | + if (page == NULL) { | |
| 7042 | + nested_vmx_failInvalid(vcpu); | |
| 7043 | + return kvm_skip_emulated_instruction(vcpu); | |
| 7044 | + } | |
| 7045 | + if (*(u32 *)kmap(page) != VMCS12_REVISION) { | |
| 7046 | + kunmap(page); | |
| 7047 | + nested_release_page_clean(page); | |
| 7048 | + nested_vmx_failInvalid(vcpu); | |
| 7049 | + return kvm_skip_emulated_instruction(vcpu); | |
| 7050 | + } | |
| 7051 | + kunmap(page); | |
| 7052 | + nested_release_page_clean(page); | |
| 7053 | + | |
| 7054 | + vmx->nested.vmxon_ptr = vmptr; | |
| 7101 | 7055 | ret = enter_vmx_operation(vcpu); |
| 7102 | 7056 | if (ret) |
| 7103 | 7057 | return ret; |
| @@ -7213,9 +7167,19 @@ static int handle_vmclear(struct kvm_vcpu *vcpu) · 109 unmodified lines | ||
| 7213 | 7167 | if (!nested_vmx_check_permission(vcpu)) |
| 7214 | 7168 | return 1; |
| 7215 | 7169 | |
| 7216 | − if (nested_vmx_check_vmptr(vcpu, EXIT_REASON_VMCLEAR, &vmptr)) | |
| 7170 | + if (nested_vmx_get_vmptr(vcpu, &vmptr)) | |
| 7217 | 7171 | return 1; |
| 7218 | 7172 | |
| 7173 | + if (!PAGE_ALIGNED(vmptr) || (vmptr >> cpuid_maxphyaddr(vcpu))) { | |
| 7174 | + nested_vmx_failValid(vcpu, VMXERR_VMCLEAR_INVALID_ADDRESS); | |
| 7175 | + return kvm_skip_emulated_instruction(vcpu); | |
| 7176 | + } | |
| 7177 | + | |
| 7178 | + if (vmptr == vmx->nested.vmxon_ptr) { | |
| 7179 | + nested_vmx_failValid(vcpu, VMXERR_VMCLEAR_VMXON_POINTER); | |
| 7180 | + return kvm_skip_emulated_instruction(vcpu); | |
| 7181 | + } | |
| 7182 | + | |
| 7219 | 7183 | if (vmptr == vmx->nested.current_vmptr) |
| 7220 | 7184 | nested_release_vmcs12(vmx); |
| 7221 | 7185 | |
| @@ -7545,9 +7509,19 @@ static int handle_vmptrld(struct kvm_vcpu *vcpu) · 323 unmodified lines | ||
| 7545 | 7509 | if (!nested_vmx_check_permission(vcpu)) |
| 7546 | 7510 | return 1; |
| 7547 | 7511 | |
| 7548 | − if (nested_vmx_check_vmptr(vcpu, EXIT_REASON_VMPTRLD, &vmptr)) | |
| 7512 | + if (nested_vmx_get_vmptr(vcpu, &vmptr)) | |
| 7549 | 7513 | return 1; |
| 7550 | 7514 | |
| 7515 | + if (!PAGE_ALIGNED(vmptr) || (vmptr >> cpuid_maxphyaddr(vcpu))) { | |
| 7516 | + nested_vmx_failValid(vcpu, VMXERR_VMPTRLD_INVALID_ADDRESS); | |
| 7517 | + return kvm_skip_emulated_instruction(vcpu); | |
| 7518 | + } | |
| 7519 | + | |
| 7520 | + if (vmptr == vmx->nested.vmxon_ptr) { | |
| 7521 | + nested_vmx_failValid(vcpu, VMXERR_VMPTRLD_VMXON_POINTER); | |
| 7522 | + return kvm_skip_emulated_instruction(vcpu); | |
| 7523 | + } | |
| 7524 | + | |
| 7551 | 7525 | if (vmx->nested.current_vmptr != vmptr) { |
| 7552 | 7526 | struct vmcs12 *new_vmcs12; |
| 7553 | 7527 | struct page *page; |
| @@ -7913,11 +7887,13 @@ static bool nested_vmx_exit_handled_cr(struct kvm_vcpu *vcpu, · 359 unmodified lines | ||
| 7913 | 7887 | { |
| 7914 | 7888 | unsigned long exit_qualification = vmcs_readl(EXIT_QUALIFICATION); |
| 7915 | 7889 | int cr = exit_qualification & 15; |
| 7916 | − int reg = (exit_qualification >> 8) & 15; | |
| 7917 | − unsigned long val = kvm_register_readl(vcpu, reg); | |
| 7890 | + int reg; | |
| 7891 | + unsigned long val; | |
| 7918 | 7892 | |
| 7919 | 7893 | switch ((exit_qualification >> 4) & 3) { |
| 7920 | 7894 | case 0: /* mov to cr */ |
| 7895 | + reg = (exit_qualification >> 8) & 15; | |
| 7896 | + val = kvm_register_readl(vcpu, reg); | |
| 7921 | 7897 | switch (cr) { |
| 7922 | 7898 | case 0: |
| 7923 | 7899 | if (vmcs12->cr0_guest_host_mask & |
| @@ -7972,6 +7948,7 @@ static bool nested_vmx_exit_handled_cr(struct kvm_vcpu *vcpu, · 48 unmodified lines | ||
| 7972 | 7948 | * lmsw can change bits 1..3 of cr0, and only set bit 0 of |
| 7973 | 7949 | * cr0. Other attempted changes are ignored, with no exit. |
| 7974 | 7950 | */ |
| 7951 | + val = (exit_qualification >> LMSW_SOURCE_DATA_SHIFT) & 0x0f; | |
| 7975 | 7952 | if (vmcs12->cr0_guest_host_mask & 0xe & |
| 7976 | 7953 | (val ^ vmcs12->cr0_read_shadow)) |
| 7977 | 7954 | return true; |
| @@ -8394,10 +8394,13 @@ static inline bool kvm_vcpu_has_events(struct kvm_vcpu *vcpu) · 8393 unmodified lines | ||
| 8394 | 8394 | if (vcpu->arch.pv.pv_unhalted) |
| 8395 | 8395 | return true; |
| 8396 | 8396 | |
| 8397 | − if (atomic_read(&vcpu->arch.nmi_queued)) | |
| 8397 | + if (kvm_test_request(KVM_REQ_NMI, vcpu) || | |
| 8398 | + (vcpu->arch.nmi_pending && | |
| 8399 | + kvm_x86_ops->nmi_allowed(vcpu))) | |
| 8398 | 8400 | return true; |
| 8399 | 8401 | |
| 8400 | − if (kvm_test_request(KVM_REQ_SMI, vcpu)) | |
| 8402 | + if (kvm_test_request(KVM_REQ_SMI, vcpu) || | |
| 8403 | + (vcpu->arch.smi_pending && !is_smm(vcpu))) | |
| 8401 | 8404 | return true; |
| 8402 | 8405 | |
| 8403 | 8406 | if (kvm_arch_interrupt_allowed(vcpu) && |
| @@ -8604,8 +8607,7 @@ bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu *vcpu) · 200 unmodified lines | ||
| 8604 | 8607 | if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED)) |
| 8605 | 8608 | return true; |
| 8606 | 8609 | else |
| 8607 | − return !kvm_event_needs_reinjection(vcpu) && | |
| 8608 | − kvm_x86_ops->interrupt_allowed(vcpu); | |
| 8610 | + return kvm_can_do_async_pf(vcpu); | |
| 8609 | 8611 | } |
| 8610 | 8612 | |
| 8611 | 8613 | void kvm_arch_start_assignment(struct kvm *kvm) |
| @@ -162,6 +162,9 @@ void __init early_fixup_exception(struct pt_regs *regs, int trapnr) · 161 unmodified lines | ||
| 162 | 162 | if (fixup_exception(regs, trapnr)) |
| 163 | 163 | return; |
| 164 | 164 | |
| 165 | + if (fixup_bug(regs, trapnr)) | |
| 166 | + return; | |
| 167 | + | |
| 165 | 168 | fail: |
| 166 | 169 | early_printk("PANIC: early exception 0x%02x IP %lx:%lx error %lx cr2 0x%lx\n", |
| 167 | 170 | (unsigned)trapnr, (unsigned long)regs->cs, regs->ip, |
| @@ -148,7 +148,7 @@ hugetlb_get_unmapped_area(struct file *file, unsigned long addr, · 147 unmodified lines | ||
| 148 | 148 | addr = ALIGN(addr, huge_page_size(h)); |
| 149 | 149 | vma = find_vma(mm, addr); |
| 150 | 150 | if (TASK_SIZE - len >= addr && |
| 151 | − (!vma || addr + len <= vma->vm_start)) | |
| 151 | + (!vma || addr + len <= vm_start_gap(vma))) | |
| 152 | 152 | return addr; |
| 153 | 153 | } |
| 154 | 154 | if (mm->get_unmapped_area == arch_get_unmapped_area) |
| @@ -161,16 +161,16 @@ static int page_size_mask; · 160 unmodified lines | ||
| 161 | 161 | |
| 162 | 162 | static void __init probe_page_size_mask(void) |
| 163 | 163 | { |
| 164 | −#if !defined(CONFIG_KMEMCHECK) | |
| 165 | 164 | /* |
| 166 | 165 | * For CONFIG_KMEMCHECK or pagealloc debugging, identity mapping will |
| 167 | 166 | * use small pages. |
| 168 | 167 | * This will simplify cpa(), which otherwise needs to support splitting |
| 169 | 168 | * large pages into small in interrupt context, etc. |
| 170 | 169 | */ |
| 171 | − if (boot_cpu_has(X86_FEATURE_PSE) && !debug_pagealloc_enabled()) | |
| 170 | + if (boot_cpu_has(X86_FEATURE_PSE) && !debug_pagealloc_enabled() && !IS_ENABLED(CONFIG_KMEMCHECK)) | |
| 172 | 171 | page_size_mask |= 1 << PG_LEVEL_2M; |
| 173 | −#endif | |
| 172 | + else | |
| 173 | + direct_gbpages = 0; | |
| 174 | 174 | |
| 175 | 175 | /* Enable PSE if available */ |
| 176 | 176 | if (boot_cpu_has(X86_FEATURE_PSE)) |
| @@ -65,11 +65,9 @@ static int __init nopat(char *str) · 64 unmodified lines | ||
| 65 | 65 | } |
| 66 | 66 | early_param("nopat", nopat); |
| 67 | 67 | |
| 68 | −static bool __read_mostly __pat_initialized = false; | |
| 69 | − | |
| 70 | 68 | bool pat_enabled(void) |
| 71 | 69 | { |
| 72 | − return __pat_initialized; | |
| 70 | + return !!__pat_enabled; | |
| 73 | 71 | } |
| 74 | 72 | EXPORT_SYMBOL_GPL(pat_enabled); |
| 75 | 73 | |
| @@ -227,14 +225,13 @@ static void pat_bsp_init(u64 pat) · 151 unmodified lines | ||
| 227 | 225 | } |
| 228 | 226 | |
| 229 | 227 | wrmsrl(MSR_IA32_CR_PAT, pat); |
| 230 | − __pat_initialized = true; | |
| 231 | 228 | |
| 232 | 229 | __init_cache_modes(pat); |
| 233 | 230 | } |
| 234 | 231 | |
| 235 | 232 | static void pat_ap_init(u64 pat) |
| 236 | 233 | { |
| 237 | − if (!this_cpu_has(X86_FEATURE_PAT)) { | |
| 234 | + if (!boot_cpu_has(X86_FEATURE_PAT)) { | |
| 238 | 235 | /* |
| 239 | 236 | * If this happens we are on a secondary CPU, but switched to |
| 240 | 237 | * PAT on the boot CPU. We have no way to undo PAT. |
| @@ -309,7 +306,7 @@ void pat_init(void) · 68 unmodified lines | ||
| 309 | 306 | u64 pat; |
| 310 | 307 | struct cpuinfo_x86 *c = &boot_cpu_data; |
| 311 | 308 | |
| 312 | − if (!__pat_enabled) { | |
| 309 | + if (!pat_enabled()) { | |
| 313 | 310 | init_cache_modes(); |
| 314 | 311 | return; |
| 315 | 312 | } |
| @@ -828,9 +828,11 @@ static void __init kexec_enter_virtual_mode(void) · 827 unmodified lines | ||
| 828 | 828 | |
| 829 | 829 | /* |
| 830 | 830 | * We don't do virtual mode, since we don't do runtime services, on |
| 831 | − * non-native EFI | |
| 831 | + * non-native EFI. With efi=old_map, we don't do runtime services in | |
| 832 | + * kexec kernel because in the initial boot something else might | |
| 833 | + * have been mapped at these virtual addresses. | |
| 832 | 834 | */ |
| 833 | − if (!efi_is_native()) { | |
| 835 | + if (!efi_is_native() || efi_enabled(EFI_OLD_MEMMAP)) { | |
| 834 | 836 | efi_memmap_unmap(); |
| 835 | 837 | clear_bit(EFI_RUNTIME_SERVICES, &efi.flags); |
| 836 | 838 | return; |
| @@ -71,11 +71,13 @@ static void __init early_code_mapping_set_exec(int executable) · 70 unmodified lines | ||
| 71 | 71 | |
| 72 | 72 | pgd_t * __init efi_call_phys_prolog(void) |
| 73 | 73 | { |
| 74 | − unsigned long vaddress; | |
| 75 | − pgd_t *save_pgd; | |
| 74 | + unsigned long vaddr, addr_pgd, addr_p4d, addr_pud; | |
| 75 | + pgd_t *save_pgd, *pgd_k, *pgd_efi; | |
| 76 | + p4d_t *p4d, *p4d_k, *p4d_efi; | |
| 77 | + pud_t *pud; | |
| 76 | 78 | |
| 77 | 79 | int pgd; |
| 78 | − int n_pgds; | |
| 80 | + int n_pgds, i, j; | |
| 79 | 81 | |
| 80 | 82 | if (!efi_enabled(EFI_OLD_MEMMAP)) { |
| 81 | 83 | save_pgd = (pgd_t *)read_cr3(); |
| @@ -88,10 +90,49 @@ pgd_t * __init efi_call_phys_prolog(void) · 6 unmodified lines | ||
| 88 | 90 | n_pgds = DIV_ROUND_UP((max_pfn << PAGE_SHIFT), PGDIR_SIZE); |
| 89 | 91 | save_pgd = kmalloc_array(n_pgds, sizeof(*save_pgd), GFP_KERNEL); |
| 90 | 92 | |
| 93 | + /* | |
| 94 | + * Build 1:1 identity mapping for efi=old_map usage. Note that | |
| 95 | + * PAGE_OFFSET is PGDIR_SIZE aligned when KASLR is disabled, while | |
| 96 | + * it is PUD_SIZE ALIGNED with KASLR enabled. So for a given physical | |
| 97 | + * address X, the pud_index(X) != pud_index(__va(X)), we can only copy | |
| 98 | + * PUD entry of __va(X) to fill in pud entry of X to build 1:1 mapping. | |
| 99 | + * This means here we can only reuse the PMD tables of the direct mapping. | |
| 100 | + */ | |
| 91 | 101 | for (pgd = 0; pgd < n_pgds; pgd++) { |
| 92 | − save_pgd[pgd] = *pgd_offset_k(pgd * PGDIR_SIZE); | |
| 93 | − vaddress = (unsigned long)__va(pgd * PGDIR_SIZE); | |
| 94 | − set_pgd(pgd_offset_k(pgd * PGDIR_SIZE), *pgd_offset_k(vaddress)); | |
| 102 | + addr_pgd = (unsigned long)(pgd * PGDIR_SIZE); | |
| 103 | + vaddr = (unsigned long)__va(pgd * PGDIR_SIZE); | |
| 104 | + pgd_efi = pgd_offset_k(addr_pgd); | |
| 105 | + save_pgd[pgd] = *pgd_efi; | |
| 106 | + | |
| 107 | + p4d = p4d_alloc(&init_mm, pgd_efi, addr_pgd); | |
| 108 | + if (!p4d) { | |
| 109 | + pr_err("Failed to allocate p4d table!\n"); | |
| 110 | + goto out; | |
| 111 | + } | |
| 112 | + | |
| 113 | + for (i = 0; i < PTRS_PER_P4D; i++) { | |
| 114 | + addr_p4d = addr_pgd + i * P4D_SIZE; | |
| 115 | + p4d_efi = p4d + p4d_index(addr_p4d); | |
| 116 | + | |
| 117 | + pud = pud_alloc(&init_mm, p4d_efi, addr_p4d); | |
| 118 | + if (!pud) { | |
| 119 | + pr_err("Failed to allocate pud table!\n"); | |
| 120 | + goto out; | |
| 121 | + } | |
| 122 | + | |
| 123 | + for (j = 0; j < PTRS_PER_PUD; j++) { | |
| 124 | + addr_pud = addr_p4d + j * PUD_SIZE; | |
| 125 | + | |
| 126 | + if (addr_pud > (max_pfn << PAGE_SHIFT)) | |
| 127 | + break; | |
| 128 | + | |
| 129 | + vaddr = (unsigned long)__va(addr_pud); | |
| 130 | + | |
| 131 | + pgd_k = pgd_offset_k(vaddr); | |
| 132 | + p4d_k = p4d_offset(pgd_k, vaddr); | |
| 133 | + pud[j] = *pud_offset(p4d_k, vaddr); | |
| 134 | + } | |
| 135 | + } | |
| 95 | 136 | } |
| 96 | 137 | out: |
| 97 | 138 | __flush_tlb_all(); |
| @@ -104,8 +145,11 @@ void __init efi_call_phys_epilog(pgd_t *save_pgd) · 6 unmodified lines | ||
| 104 | 145 | /* |
| 105 | 146 | * After the lock is released, the original page table is restored. |
| 106 | 147 | */ |
| 107 | − int pgd_idx; | |
| 148 | + int pgd_idx, i; | |
| 108 | 149 | int nr_pgds; |
| 150 | + pgd_t *pgd; | |
| 151 | + p4d_t *p4d; | |
| 152 | + pud_t *pud; | |
| 109 | 153 | |
| 110 | 154 | if (!efi_enabled(EFI_OLD_MEMMAP)) { |
| 111 | 155 | write_cr3((unsigned long)save_pgd); |
| @@ -115,9 +159,28 @@ void __init efi_call_phys_epilog(pgd_t *save_pgd) · 3 unmodified lines | ||
| 115 | 159 | |
| 116 | 160 | nr_pgds = DIV_ROUND_UP((max_pfn << PAGE_SHIFT) , PGDIR_SIZE); |
| 117 | 161 | |
| 118 | − for (pgd_idx = 0; pgd_idx < nr_pgds; pgd_idx++) | |
| 162 | + for (pgd_idx = 0; pgd_idx < nr_pgds; pgd_idx++) { | |
| 163 | + pgd = pgd_offset_k(pgd_idx * PGDIR_SIZE); | |
| 119 | 164 | set_pgd(pgd_offset_k(pgd_idx * PGDIR_SIZE), save_pgd[pgd_idx]); |
| 120 | 165 | |
| 166 | + if (!(pgd_val(*pgd) & _PAGE_PRESENT)) | |
| 167 | + continue; | |
| 168 | + | |
| 169 | + for (i = 0; i < PTRS_PER_P4D; i++) { | |
| 170 | + p4d = p4d_offset(pgd, | |
| 171 | + pgd_idx * PGDIR_SIZE + i * P4D_SIZE); | |
| 172 | + | |
| 173 | + if (!(p4d_val(*p4d) & _PAGE_PRESENT)) | |
| 174 | + continue; | |
| 175 | + | |
| 176 | + pud = (pud_t *)p4d_page_vaddr(*p4d); | |
| 177 | + pud_free(&init_mm, pud); | |
| 178 | + } | |
| 179 | + | |
| 180 | + p4d = (p4d_t *)pgd_page_vaddr(*pgd); | |
| 181 | + p4d_free(&init_mm, p4d); | |
| 182 | + } | |
| 183 | + | |
| 121 | 184 | kfree(save_pgd); |
| 122 | 185 | |
| 123 | 186 | __flush_tlb_all(); |
| @@ -360,6 +360,9 @@ void __init efi_free_boot_services(void) · 359 unmodified lines | ||
| 360 | 360 | free_bootmem_late(start, size); |
| 361 | 361 | } |
| 362 | 362 | |
| 363 | + if (!num_entries) | |
| 364 | + return; | |
| 365 | + | |
| 363 | 366 | new_size = efi.memmap.desc_size * num_entries; |
| 364 | 367 | new_phys = efi_memmap_alloc(num_entries); |
| 365 | 368 | if (!new_phys) { |
| @@ -29,7 +29,8 @@ static inline void variant_irq_disable(unsigned int irq) { } · 28 unmodified lines | ||
| 29 | 29 | # define PLATFORM_NR_IRQS 0 |
| 30 | 30 | #endif |
| 31 | 31 | #define XTENSA_NR_IRQS XCHAL_NUM_INTERRUPTS |
| 32 | −#define NR_IRQS (XTENSA_NR_IRQS + VARIANT_NR_IRQS + PLATFORM_NR_IRQS) | |
| 32 | +#define NR_IRQS (XTENSA_NR_IRQS + VARIANT_NR_IRQS + PLATFORM_NR_IRQS + 1) | |
| 33 | +#define XTENSA_PIC_LINUX_IRQ(hwirq) ((hwirq) + 1) | |
| 33 | 34 | |
| 34 | 35 | #if VARIANT_NR_IRQS == 0 |
| 35 | 36 | static inline void variant_init_irq(void) { } |
| @@ -34,11 +34,6 @@ asmlinkage void do_IRQ(int hwirq, struct pt_regs *regs) · 33 unmodified lines | ||
| 34 | 34 | { |
| 35 | 35 | int irq = irq_find_mapping(NULL, hwirq); |
| 36 | 36 | |
| 37 | − if (hwirq >= NR_IRQS) { | |
| 38 | − printk(KERN_EMERG "%s: cannot handle IRQ %d\n", | |
| 39 | − __func__, hwirq); | |
| 40 | − } | |
| 41 | − | |
| 42 | 37 | #ifdef CONFIG_DEBUG_STACKOVERFLOW |
| 43 | 38 | /* Debugging check for stack overflow: is there less than 1KB free? */ |
| 44 | 39 | { |
| @@ -593,8 +593,7 @@ c_show(struct seq_file *f, void *slot) · 592 unmodified lines | ||
| 593 | 593 | (ccount_freq/10000) % 100, |
| 594 | 594 | loops_per_jiffy/(500000/HZ), |
| 595 | 595 | (loops_per_jiffy/(5000/HZ)) % 100); |
| 596 | − | |
| 597 | − seq_printf(f,"flags\t\t: " | |
| 596 | + seq_puts(f, "flags\t\t: " | |
| 598 | 597 | #if XCHAL_HAVE_NMI |
| 599 | 598 | "nmi " |
| 600 | 599 | #endif |
| @@ -88,7 +88,7 @@ unsigned long arch_get_unmapped_area(struct file *filp, unsigned long addr, · 87 unmodified lines | ||
| 88 | 88 | /* At this point: (!vmm || addr < vmm->vm_end). */ |
| 89 | 89 | if (TASK_SIZE - len < addr) |
| 90 | 90 | return -ENOMEM; |
| 91 | − if (!vmm || addr + len <= vmm->vm_start) | |
| 91 | + if (!vmm || addr + len <= vm_start_gap(vmm)) | |
| 92 | 92 | return addr; |
| 93 | 93 | addr = vmm->vm_end; |
| 94 | 94 | if (flags & MAP_SHARED) |
| @@ -118,7 +118,7 @@ SECTIONS · 117 unmodified lines | ||
| 118 | 118 | SECTION_VECTOR (.KernelExceptionVector.text, KERNEL_VECTOR_VADDR) |
| 119 | 119 | SECTION_VECTOR (.UserExceptionVector.literal, USER_VECTOR_VADDR - 4) |
| 120 | 120 | SECTION_VECTOR (.UserExceptionVector.text, USER_VECTOR_VADDR) |
| 121 | − SECTION_VECTOR (.DoubleExceptionVector.literal, DOUBLEEXC_VECTOR_VADDR - 48) | |
| 121 | + SECTION_VECTOR (.DoubleExceptionVector.literal, DOUBLEEXC_VECTOR_VADDR - 20) | |
| 122 | 122 | SECTION_VECTOR (.DoubleExceptionVector.text, DOUBLEEXC_VECTOR_VADDR) |
| 123 | 123 | #endif |
| 124 | 124 | |
| @@ -306,13 +306,13 @@ SECTIONS · 181 unmodified lines | ||
| 306 | 306 | .UserExceptionVector.literal) |
| 307 | 307 | SECTION_VECTOR (_DoubleExceptionVector_literal, |
| 308 | 308 | .DoubleExceptionVector.literal, |
| 309 | − DOUBLEEXC_VECTOR_VADDR - 48, | |
| 309 | + DOUBLEEXC_VECTOR_VADDR - 20, | |
| 310 | 310 | SIZEOF(.UserExceptionVector.text), |
| 311 | 311 | .UserExceptionVector.text) |
| 312 | 312 | SECTION_VECTOR (_DoubleExceptionVector_text, |
| 313 | 313 | .DoubleExceptionVector.text, |
| 314 | 314 | DOUBLEEXC_VECTOR_VADDR, |
| 315 | − 48, | |
| 315 | + 20, | |
| 316 | 316 | .DoubleExceptionVector.literal) |
| 317 | 317 | |
| 318 | 318 | . = (LOADADDR( .DoubleExceptionVector.text ) + SIZEOF( .DoubleExceptionVector.text ) + 3) & ~ 3; |
| @@ -317,8 +317,7 @@ static int __init simdisk_init(void) · 316 unmodified lines | ||
| 317 | 317 | if (simdisk_count > MAX_SIMDISK_COUNT) |
| 318 | 318 | simdisk_count = MAX_SIMDISK_COUNT; |
| 319 | 319 | |
| 320 | − sddev = kmalloc(simdisk_count * sizeof(struct simdisk), | |
| 321 | − GFP_KERNEL); | |
| 320 | + sddev = kmalloc_array(simdisk_count, sizeof(*sddev), GFP_KERNEL); | |
| 322 | 321 | if (sddev == NULL) |
| 323 | 322 | goto out_unregister; |
| 324 | 323 | |
| @@ -24,16 +24,18 @@ · 23 unmodified lines | ||
| 24 | 24 | |
| 25 | 25 | /* Interrupt configuration. */ |
| 26 | 26 | |
| 27 | −#define PLATFORM_NR_IRQS 10 | |
| 27 | +#define PLATFORM_NR_IRQS 0 | |
| 28 | 28 | |
| 29 | 29 | /* Default assignment of LX60 devices to external interrupts. */ |
| 30 | 30 | |
| 31 | 31 | #ifdef CONFIG_XTENSA_MX |
| 32 | 32 | #define DUART16552_INTNUM XCHAL_EXTINT3_NUM |
| 33 | 33 | #define OETH_IRQ XCHAL_EXTINT4_NUM |
| 34 | +#define C67X00_IRQ XCHAL_EXTINT8_NUM | |
| 34 | 35 | #else |
| 35 | 36 | #define DUART16552_INTNUM XCHAL_EXTINT0_NUM |
| 36 | 37 | #define OETH_IRQ XCHAL_EXTINT1_NUM |
| 38 | +#define C67X00_IRQ XCHAL_EXTINT5_NUM | |
| 37 | 39 | #endif |
| 38 | 40 | |
| 39 | 41 | /* |
| @@ -63,5 +65,5 @@ · 23 unmodified lines | ||
| 63 | 65 | |
| 64 | 66 | #define C67X00_PADDR (XCHAL_KIO_PADDR + 0x0D0D0000) |
| 65 | 67 | #define C67X00_SIZE 0x10 |
| 66 | −#define C67X00_IRQ 5 | |
| 68 | + | |
| 67 | 69 | #endif /* __XTENSA_XTAVNET_HARDWARE_H */ |
| @@ -175,8 +175,8 @@ static struct resource ethoc_res[] = { · 174 unmodified lines | ||
| 175 | 175 | .flags = IORESOURCE_MEM, |
| 176 | 176 | }, |
| 177 | 177 | [2] = { /* IRQ number */ |
| 178 | − .start = OETH_IRQ, | |
| 179 | − .end = OETH_IRQ, | |
| 178 | + .start = XTENSA_PIC_LINUX_IRQ(OETH_IRQ), | |
| 179 | + .end = XTENSA_PIC_LINUX_IRQ(OETH_IRQ), | |
| 180 | 180 | .flags = IORESOURCE_IRQ, |
| 181 | 181 | }, |
| 182 | 182 | }; |
| @@ -213,8 +213,8 @@ static struct resource c67x00_res[] = { · 30 unmodified lines | ||
| 213 | 213 | .flags = IORESOURCE_MEM, |
| 214 | 214 | }, |
| 215 | 215 | [1] = { /* IRQ number */ |
| 216 | − .start = C67X00_IRQ, | |
| 217 | − .end = C67X00_IRQ, | |
| 216 | + .start = XTENSA_PIC_LINUX_IRQ(C67X00_IRQ), | |
| 217 | + .end = XTENSA_PIC_LINUX_IRQ(C67X00_IRQ), | |
| 218 | 218 | .flags = IORESOURCE_IRQ, |
| 219 | 219 | }, |
| 220 | 220 | }; |
| @@ -247,7 +247,7 @@ static struct resource serial_resource = { · 26 unmodified lines | ||
| 247 | 247 | static struct plat_serial8250_port serial_platform_data[] = { |
| 248 | 248 | [0] = { |
| 249 | 249 | .mapbase = DUART16552_PADDR, |
| 250 | − .irq = DUART16552_INTNUM, | |
| 250 | + .irq = XTENSA_PIC_LINUX_IRQ(DUART16552_INTNUM), | |
| 251 | 251 | .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | |
| 252 | 252 | UPF_IOREMAP, |
| 253 | 253 | .iotype = XCHAL_HAVE_BE ? UPIO_MEM32BE : UPIO_MEM32, |
| @@ -52,7 +52,7 @@ BFQG_FLAG_FNS(idling) · 51 unmodified lines | ||
| 52 | 52 | BFQG_FLAG_FNS(empty) |
| 53 | 53 | #undef BFQG_FLAG_FNS |
| 54 | 54 | |
| 55 | −/* This should be called with the queue_lock held. */ | |
| 55 | +/* This should be called with the scheduler lock held. */ | |
| 56 | 56 | static void bfqg_stats_update_group_wait_time(struct bfqg_stats *stats) |
| 57 | 57 | { |
| 58 | 58 | unsigned long long now; |
| @@ -67,7 +67,7 @@ static void bfqg_stats_update_group_wait_time(struct bfqg_stats *stats) · 8 unmodified lines | ||
| 67 | 67 | bfqg_stats_clear_waiting(stats); |
| 68 | 68 | } |
| 69 | 69 | |
| 70 | −/* This should be called with the queue_lock held. */ | |
| 70 | +/* This should be called with the scheduler lock held. */ | |
| 71 | 71 | static void bfqg_stats_set_start_group_wait_time(struct bfq_group *bfqg, |
| 72 | 72 | struct bfq_group *curr_bfqg) |
| 73 | 73 | { |
| @@ -81,7 +81,7 @@ static void bfqg_stats_set_start_group_wait_time(struct bfq_group *bfqg, · 7 unmodified lines | ||
| 81 | 81 | bfqg_stats_mark_waiting(stats); |
| 82 | 82 | } |
| 83 | 83 | |
| 84 | −/* This should be called with the queue_lock held. */ | |
| 84 | +/* This should be called with the scheduler lock held. */ | |
| 85 | 85 | static void bfqg_stats_end_empty_time(struct bfqg_stats *stats) |
| 86 | 86 | { |
| 87 | 87 | unsigned long long now; |
| @@ -203,12 +203,30 @@ struct bfq_group *bfqq_group(struct bfq_queue *bfqq) · 115 unmodified lines | ||
| 203 | 203 | |
| 204 | 204 | static void bfqg_get(struct bfq_group *bfqg) |
| 205 | 205 | { |
| 206 | − return blkg_get(bfqg_to_blkg(bfqg)); | |
| 206 | + bfqg->ref++; | |
| 207 | 207 | } |
| 208 | 208 | |
| 209 | 209 | void bfqg_put(struct bfq_group *bfqg) |
| 210 | 210 | { |
| 211 | − return blkg_put(bfqg_to_blkg(bfqg)); | |
| 211 | + bfqg->ref--; | |
| 212 | + | |
| 213 | + if (bfqg->ref == 0) | |
| 214 | + kfree(bfqg); | |
| 215 | +} | |
| 216 | + | |
| 217 | +static void bfqg_and_blkg_get(struct bfq_group *bfqg) | |
| 218 | +{ | |
| 219 | + /* see comments in bfq_bic_update_cgroup for why refcounting bfqg */ | |
| 220 | + bfqg_get(bfqg); | |
| 221 | + | |
| 222 | + blkg_get(bfqg_to_blkg(bfqg)); | |
| 223 | +} | |
| 224 | + | |
| 225 | +void bfqg_and_blkg_put(struct bfq_group *bfqg) | |
| 226 | +{ | |
| 227 | + bfqg_put(bfqg); | |
| 228 | + | |
| 229 | + blkg_put(bfqg_to_blkg(bfqg)); | |
| 212 | 230 | } |
| 213 | 231 | |
| 214 | 232 | void bfqg_stats_update_io_add(struct bfq_group *bfqg, struct bfq_queue *bfqq, |
| @@ -312,7 +330,11 @@ void bfq_init_entity(struct bfq_entity *entity, struct bfq_group *bfqg) · 97 unmodified lines | ||
| 312 | 330 | if (bfqq) { |
| 313 | 331 | bfqq->ioprio = bfqq->new_ioprio; |
| 314 | 332 | bfqq->ioprio_class = bfqq->new_ioprio_class; |
| 315 | − bfqg_get(bfqg); | |
| 333 | + /* | |
| 334 | + * Make sure that bfqg and its associated blkg do not | |
| 335 | + * disappear before entity. | |
| 336 | + */ | |
| 337 | + bfqg_and_blkg_get(bfqg); | |
| 316 | 338 | } |
| 317 | 339 | entity->parent = bfqg->my_entity; /* NULL for root group */ |
| 318 | 340 | entity->sched_data = &bfqg->sched_data; |
| @@ -399,6 +421,8 @@ struct blkg_policy_data *bfq_pd_alloc(gfp_t gfp, int node) · 80 unmodified lines | ||
| 399 | 421 | return NULL; |
| 400 | 422 | } |
| 401 | 423 | |
| 424 | + /* see comments in bfq_bic_update_cgroup for why refcounting */ | |
| 425 | + bfqg_get(bfqg); | |
| 402 | 426 | return &bfqg->pd; |
| 403 | 427 | } |
| 404 | 428 | |
| @@ -426,7 +450,7 @@ void bfq_pd_free(struct blkg_policy_data *pd) · 21 unmodified lines | ||
| 426 | 450 | struct bfq_group *bfqg = pd_to_bfqg(pd); |
| 427 | 451 | |
| 428 | 452 | bfqg_stats_exit(&bfqg->stats); |
| 429 | − return kfree(bfqg); | |
| 453 | + bfqg_put(bfqg); | |
| 430 | 454 | } |
| 431 | 455 | |
| 432 | 456 | void bfq_pd_reset_stats(struct blkg_policy_data *pd) |
| @@ -496,9 +520,10 @@ struct bfq_group *bfq_find_set_group(struct bfq_data *bfqd, · 63 unmodified lines | ||
| 496 | 520 | * Move @bfqq to @bfqg, deactivating it from its old group and reactivating |
| 497 | 521 | * it on the new one. Avoid putting the entity on the old group idle tree. |
| 498 | 522 | * |
| 499 | − * Must be called under the queue lock; the cgroup owning @bfqg must | |
| 500 | − * not disappear (by now this just means that we are called under | |
| 501 | − * rcu_read_lock()). | |
| 523 | + * Must be called under the scheduler lock, to make sure that the blkg | |
| 524 | + * owning @bfqg does not disappear (see comments in | |
| 525 | + * bfq_bic_update_cgroup on guaranteeing the consistency of blkg | |
| 526 | + * objects). | |
| 502 | 527 | */ |
| 503 | 528 | void bfq_bfqq_move(struct bfq_data *bfqd, struct bfq_queue *bfqq, |
| 504 | 529 | struct bfq_group *bfqg) |
| @@ -519,16 +544,12 @@ void bfq_bfqq_move(struct bfq_data *bfqd, struct bfq_queue *bfqq, · 14 unmodified lines | ||
| 519 | 544 | bfq_deactivate_bfqq(bfqd, bfqq, false, false); |
| 520 | 545 | else if (entity->on_st) |
| 521 | 546 | bfq_put_idle_entity(bfq_entity_service_tree(entity), entity); |
| 522 | − bfqg_put(bfqq_group(bfqq)); | |
| 547 | + bfqg_and_blkg_put(bfqq_group(bfqq)); | |
| 523 | 548 | |
| 524 | − /* | |
| 525 | − * Here we use a reference to bfqg. We don't need a refcounter | |
| 526 | − * as the cgroup reference will not be dropped, so that its | |
| 527 | − * destroy() callback will not be invoked. | |
| 528 | − */ | |
| 529 | 549 | entity->parent = bfqg->my_entity; |
| 530 | 550 | entity->sched_data = &bfqg->sched_data; |
| 531 | − bfqg_get(bfqg); | |
| 551 | + /* pin down bfqg and its associated blkg */ | |
| 552 | + bfqg_and_blkg_get(bfqg); | |
| 532 | 553 | |
| 533 | 554 | if (bfq_bfqq_busy(bfqq)) { |
| 534 | 555 | bfq_pos_tree_add_move(bfqd, bfqq); |
| @@ -545,8 +566,9 @@ void bfq_bfqq_move(struct bfq_data *bfqd, struct bfq_queue *bfqq, · 10 unmodified lines | ||
| 545 | 566 | * @bic: the bic to move. |
| 546 | 567 | * @blkcg: the blk-cgroup to move to. |
| 547 | 568 | * |
| 548 | − * Move bic to blkcg, assuming that bfqd->queue is locked; the caller | |
| 549 | − * has to make sure that the reference to cgroup is valid across the call. | |
| 569 | + * Move bic to blkcg, assuming that bfqd->lock is held; which makes | |
| 570 | + * sure that the reference to cgroup is valid across the call (see | |
| 571 | + * comments in bfq_bic_update_cgroup on this issue) | |
| 550 | 572 | * |
| 551 | 573 | * NOTE: an alternative approach might have been to store the current |
| 552 | 574 | * cgroup in bfqq and getting a reference to it, reducing the lookup |
| @@ -604,6 +626,57 @@ void bfq_bic_update_cgroup(struct bfq_io_cq *bic, struct bio *bio) · 51 unmodified lines | ||
| 604 | 626 | goto out; |
| 605 | 627 | |
| 606 | 628 | bfqg = __bfq_bic_change_cgroup(bfqd, bic, bio_blkcg(bio)); |
| 629 | + /* | |
| 630 | + * Update blkg_path for bfq_log_* functions. We cache this | |
| 631 | + * path, and update it here, for the following | |
| 632 | + * reasons. Operations on blkg objects in blk-cgroup are | |
| 633 | + * protected with the request_queue lock, and not with the | |
| 634 | + * lock that protects the instances of this scheduler | |
| 635 | + * (bfqd->lock). This exposes BFQ to the following sort of | |
| 636 | + * race. | |
| 637 | + * | |
| 638 | + * The blkg_lookup performed in bfq_get_queue, protected | |
| 639 | + * through rcu, may happen to return the address of a copy of | |
| 640 | + * the original blkg. If this is the case, then the | |
| 641 | + * bfqg_and_blkg_get performed in bfq_get_queue, to pin down | |
| 642 | + * the blkg, is useless: it does not prevent blk-cgroup code | |
| 643 | + * from destroying both the original blkg and all objects | |
| 644 | + * directly or indirectly referred by the copy of the | |
| 645 | + * blkg. | |
| 646 | + * | |
| 647 | + * On the bright side, destroy operations on a blkg invoke, as | |
| 648 | + * a first step, hooks of the scheduler associated with the | |
| 649 | + * blkg. And these hooks are executed with bfqd->lock held for | |
| 650 | + * BFQ. As a consequence, for any blkg associated with the | |
| 651 | + * request queue this instance of the scheduler is attached | |
| 652 | + * to, we are guaranteed that such a blkg is not destroyed, and | |
| 653 | + * that all the pointers it contains are consistent, while we | |
| 654 | + * are holding bfqd->lock. A blkg_lookup performed with | |
| 655 | + * bfqd->lock held then returns a fully consistent blkg, which | |
| 656 | + * remains consistent until this lock is held. | |
| 657 | + * | |
| 658 | + * Thanks to the last fact, and to the fact that: (1) bfqg has | |
| 659 | + * been obtained through a blkg_lookup in the above | |
| 660 | + * assignment, and (2) bfqd->lock is being held, here we can | |
| 661 | + * safely use the policy data for the involved blkg (i.e., the | |
| 662 | + * field bfqg->pd) to get to the blkg associated with bfqg, | |
| 663 | + * and then we can safely use any field of blkg. After we | |
| 664 | + * release bfqd->lock, even just getting blkg through this | |
| 665 | + * bfqg may cause dangling references to be traversed, as | |
| 666 | + * bfqg->pd may not exist any more. | |
| 667 | + * | |
| 668 | + * In view of the above facts, here we cache, in the bfqg, any | |
| 669 | + * blkg data we may need for this bic, and for its associated | |
| 670 | + * bfq_queue. As of now, we need to cache only the path of the | |
| 671 | + * blkg, which is used in the bfq_log_* functions. | |
| 672 | + * | |
| 673 | + * Finally, note that bfqg itself needs to be protected from | |
| 674 | + * destruction on the blkg_free of the original blkg (which | |
| 675 | + * invokes bfq_pd_free). We use an additional private | |
| 676 | + * refcounter for bfqg, to let it disappear only after no | |
| 677 | + * bfq_queue refers to it any longer. | |
| 678 | + */ | |
| 679 | + blkg_path(bfqg_to_blkg(bfqg), bfqg->blkg_path, sizeof(bfqg->blkg_path)); | |
| 607 | 680 | bic->blkcg_serial_nr = serial_nr; |
| 608 | 681 | out: |
| 609 | 682 | rcu_read_unlock(); |
| @@ -640,8 +713,6 @@ static void bfq_reparent_leaf_entity(struct bfq_data *bfqd, · 30 unmodified lines | ||
| 640 | 713 | * @bfqd: the device data structure with the root group. |
| 641 | 714 | * @bfqg: the group to move from. |
| 642 | 715 | * @st: the service tree with the entities. |
| 643 | − * | |
| 644 | − * Needs queue_lock to be taken and reference to be valid over the call. | |
| 645 | 716 | */ |
| 646 | 717 | static void bfq_reparent_active_entities(struct bfq_data *bfqd, |
| 647 | 718 | struct bfq_group *bfqg, |
| @@ -692,8 +763,7 @@ void bfq_pd_offline(struct blkg_policy_data *pd) · 44 unmodified lines | ||
| 692 | 763 | /* |
| 693 | 764 | * The idle tree may still contain bfq_queues belonging |
| 694 | 765 | * to exited task because they never migrated to a different |
| 695 | − * cgroup from the one being destroyed now. No one else | |
| 696 | − * can access them so it's safe to act without any lock. | |
| 766 | + * cgroup from the one being destroyed now. | |
| 697 | 767 | */ |
| 698 | 768 | bfq_flush_idle_tree(st); |
| 699 | 769 | |
| @@ -3665,7 +3665,7 @@ void bfq_put_queue(struct bfq_queue *bfqq) · 3664 unmodified lines | ||
| 3665 | 3665 | |
| 3666 | 3666 | kmem_cache_free(bfq_pool, bfqq); |
| 3667 | 3667 | #ifdef CONFIG_BFQ_GROUP_IOSCHED |
| 3668 | − bfqg_put(bfqg); | |
| 3668 | + bfqg_and_blkg_put(bfqg); | |
| 3669 | 3669 | #endif |
| 3670 | 3670 | } |
| 3671 | 3671 | |
| @@ -759,6 +759,12 @@ struct bfq_group { · 758 unmodified lines | ||
| 759 | 759 | /* must be the first member */ |
| 760 | 760 | struct blkg_policy_data pd; |
| 761 | 761 | |
| 762 | + /* cached path for this blkg (see comments in bfq_bic_update_cgroup) */ | |
| 763 | + char blkg_path[128]; | |
| 764 | + | |
| 765 | + /* reference counter (see comments in bfq_bic_update_cgroup) */ | |
| 766 | + int ref; | |
| 767 | + | |
| 762 | 768 | struct bfq_entity entity; |
| 763 | 769 | struct bfq_sched_data sched_data; |
| 764 | 770 | |
| @@ -838,7 +844,7 @@ struct bfq_group *bfq_find_set_group(struct bfq_data *bfqd, · 73 unmodified lines | ||
| 838 | 844 | struct blkcg_gq *bfqg_to_blkg(struct bfq_group *bfqg); |
| 839 | 845 | struct bfq_group *bfqq_group(struct bfq_queue *bfqq); |
| 840 | 846 | struct bfq_group *bfq_create_group_hierarchy(struct bfq_data *bfqd, int node); |
| 841 | −void bfqg_put(struct bfq_group *bfqg); | |
| 847 | +void bfqg_and_blkg_put(struct bfq_group *bfqg); | |
| 842 | 848 | |
| 843 | 849 | #ifdef CONFIG_BFQ_GROUP_IOSCHED |
| 844 | 850 | extern struct cftype bfq_blkcg_legacy_files[]; |
| @@ -910,20 +916,13 @@ void bfq_add_bfqq_busy(struct bfq_data *bfqd, struct bfq_queue *bfqq); · 65 unmodified lines | ||
| 910 | 916 | struct bfq_group *bfqq_group(struct bfq_queue *bfqq); |
| 911 | 917 | |
| 912 | 918 | #define bfq_log_bfqq(bfqd, bfqq, fmt, args...) do { \ |
| 913 | − char __pbuf[128]; \ | |
| 914 | − \ | |
| 915 | − blkg_path(bfqg_to_blkg(bfqq_group(bfqq)), __pbuf, sizeof(__pbuf)); \ | |
| 916 | − blk_add_trace_msg((bfqd)->queue, "bfq%d%c %s " fmt, (bfqq)->pid, \ | |
| 919 | + blk_add_trace_msg((bfqd)->queue, "bfq%d%c %s " fmt, (bfqq)->pid,\ | |
| 917 | 920 | bfq_bfqq_sync((bfqq)) ? 'S' : 'A', \ |
| 918 | − __pbuf, ##args); \ | |
| 921 | + bfqq_group(bfqq)->blkg_path, ##args); \ | |
| 919 | 922 | } while (0) |
| 920 | 923 | |
| 921 | −#define bfq_log_bfqg(bfqd, bfqg, fmt, args...) do { \ | |
| 922 | − char __pbuf[128]; \ | |
| 923 | − \ | |
| 924 | − blkg_path(bfqg_to_blkg(bfqg), __pbuf, sizeof(__pbuf)); \ | |
| 925 | − blk_add_trace_msg((bfqd)->queue, "%s " fmt, __pbuf, ##args); \ | |
| 926 | −} while (0) | |
| 924 | +#define bfq_log_bfqg(bfqd, bfqg, fmt, args...) \ | |
| 925 | + blk_add_trace_msg((bfqd)->queue, "%s " fmt, (bfqg)->blkg_path, ##args) | |
| 927 | 926 | |
| 928 | 927 | #else /* CONFIG_BFQ_GROUP_IOSCHED */ |
| 929 | 928 | |
| @@ -175,6 +175,9 @@ bool bio_integrity_enabled(struct bio *bio) · 174 unmodified lines | ||
| 175 | 175 | if (bio_op(bio) != REQ_OP_READ && bio_op(bio) != REQ_OP_WRITE) |
| 176 | 176 | return false; |
| 177 | 177 | |
| 178 | + if (!bio_sectors(bio)) | |
| 179 | + return false; | |
| 180 | + | |
| 178 | 181 | /* Already protected? */ |
| 179 | 182 | if (bio_integrity(bio)) |
| 180 | 183 | return false; |
| @@ -74,7 +74,7 @@ static void blkg_free(struct blkcg_gq *blkg) · 73 unmodified lines | ||
| 74 | 74 | blkcg_policy[i]->pd_free_fn(blkg->pd[i]); |
| 75 | 75 | |
| 76 | 76 | if (blkg->blkcg != &blkcg_root) |
| 77 | − blk_exit_rl(&blkg->rl); | |
| 77 | + blk_exit_rl(blkg->q, &blkg->rl); | |
| 78 | 78 | |
| 79 | 79 | blkg_rwstat_exit(&blkg->stat_ios); |
| 80 | 80 | blkg_rwstat_exit(&blkg->stat_bytes); |
| @@ -648,13 +648,19 @@ int blk_init_rl(struct request_list *rl, struct request_queue *q, · 647 unmodified lines | ||
| 648 | 648 | if (!rl->rq_pool) |
| 649 | 649 | return -ENOMEM; |
| 650 | 650 | |
| 651 | + if (rl != &q->root_rl) | |
| 652 | + WARN_ON_ONCE(!blk_get_queue(q)); | |
| 653 | + | |
| 651 | 654 | return 0; |
| 652 | 655 | } |
| 653 | 656 | |
| 654 | −void blk_exit_rl(struct request_list *rl) | |
| 657 | +void blk_exit_rl(struct request_queue *q, struct request_list *rl) | |
| 655 | 658 | { |
| 656 | − if (rl->rq_pool) | |
| 659 | + if (rl->rq_pool) { | |
| 657 | 660 | mempool_destroy(rl->rq_pool); |
| 661 | + if (rl != &q->root_rl) | |
| 662 | + blk_put_queue(q); | |
| 663 | + } | |
| 658 | 664 | } |
| 659 | 665 | |
| 660 | 666 | struct request_queue *blk_alloc_queue(gfp_t gfp_mask) |
| @@ -1461,22 +1461,28 @@ static blk_qc_t request_to_qc_t(struct blk_mq_hw_ctx *hctx, struct request *rq) · 1460 unmodified lines | ||
| 1461 | 1461 | return blk_tag_to_qc_t(rq->internal_tag, hctx->queue_num, true); |
| 1462 | 1462 | } |
| 1463 | 1463 | |
| 1464 | −static void __blk_mq_try_issue_directly(struct request *rq, blk_qc_t *cookie, | |
| 1465 | − bool may_sleep) | |
| 1464 | +static void __blk_mq_try_issue_directly(struct blk_mq_hw_ctx *hctx, | |
| 1465 | + struct request *rq, | |
| 1466 | + blk_qc_t *cookie, bool may_sleep) | |
| 1466 | 1467 | { |
| 1467 | 1468 | struct request_queue *q = rq->q; |
| 1468 | 1469 | struct blk_mq_queue_data bd = { |
| 1469 | 1470 | .rq = rq, |
| 1470 | 1471 | .last = true, |
| 1471 | 1472 | }; |
| 1472 | − struct blk_mq_hw_ctx *hctx; | |
| 1473 | 1473 | blk_qc_t new_cookie; |
| 1474 | 1474 | int ret; |
| 1475 | + bool run_queue = true; | |
| 1476 | + | |
| 1477 | + if (blk_mq_hctx_stopped(hctx)) { | |
| 1478 | + run_queue = false; | |
| 1479 | + goto insert; | |
| 1480 | + } | |
| 1475 | 1481 | |
| 1476 | 1482 | if (q->elevator) |
| 1477 | 1483 | goto insert; |
| 1478 | 1484 | |
| 1479 | − if (!blk_mq_get_driver_tag(rq, &hctx, false)) | |
| 1485 | + if (!blk_mq_get_driver_tag(rq, NULL, false)) | |
| 1480 | 1486 | goto insert; |
| 1481 | 1487 | |
| 1482 | 1488 | new_cookie = request_to_qc_t(hctx, rq); |
| @@ -1500,7 +1506,7 @@ static void __blk_mq_try_issue_directly(struct request *rq, blk_qc_t *cookie, · 17 unmodified lines | ||
| 1500 | 1506 | |
| 1501 | 1507 | __blk_mq_requeue_request(rq); |
| 1502 | 1508 | insert: |
| 1503 | − blk_mq_sched_insert_request(rq, false, true, false, may_sleep); | |
| 1509 | + blk_mq_sched_insert_request(rq, false, run_queue, false, may_sleep); | |
| 1504 | 1510 | } |
| 1505 | 1511 | |
| 1506 | 1512 | static void blk_mq_try_issue_directly(struct blk_mq_hw_ctx *hctx, |
| @@ -1508,7 +1514,7 @@ static void blk_mq_try_issue_directly(struct blk_mq_hw_ctx *hctx, · 1 unmodified line | ||
| 1508 | 1514 | { |
| 1509 | 1515 | if (!(hctx->flags & BLK_MQ_F_BLOCKING)) { |
| 1510 | 1516 | rcu_read_lock(); |
| 1511 | − __blk_mq_try_issue_directly(rq, cookie, false); | |
| 1517 | + __blk_mq_try_issue_directly(hctx, rq, cookie, false); | |
| 1512 | 1518 | rcu_read_unlock(); |
| 1513 | 1519 | } else { |
| 1514 | 1520 | unsigned int srcu_idx; |
| @@ -1516,7 +1522,7 @@ static void blk_mq_try_issue_directly(struct blk_mq_hw_ctx *hctx, · 1 unmodified line | ||
| 1516 | 1522 | might_sleep(); |
| 1517 | 1523 | |
| 1518 | 1524 | srcu_idx = srcu_read_lock(&hctx->queue_rq_srcu); |
| 1519 | − __blk_mq_try_issue_directly(rq, cookie, true); | |
| 1525 | + __blk_mq_try_issue_directly(hctx, rq, cookie, true); | |
| 1520 | 1526 | srcu_read_unlock(&hctx->queue_rq_srcu, srcu_idx); |
| 1521 | 1527 | } |
| 1522 | 1528 | } |
| @@ -1619,9 +1625,12 @@ static blk_qc_t blk_mq_make_request(struct request_queue *q, struct bio *bio) · 96 unmodified lines | ||
| 1619 | 1625 | |
| 1620 | 1626 | blk_mq_put_ctx(data.ctx); |
| 1621 | 1627 | |
| 1622 | − if (same_queue_rq) | |
| 1628 | + if (same_queue_rq) { | |
| 1629 | + data.hctx = blk_mq_map_queue(q, | |
| 1630 | + same_queue_rq->mq_ctx->cpu); | |
| 1623 | 1631 | blk_mq_try_issue_directly(data.hctx, same_queue_rq, |
| 1624 | 1632 | &cookie); |
| 1633 | + } | |
| 1625 | 1634 | } else if (q->nr_hw_queues > 1 && is_sync) { |
| 1626 | 1635 | blk_mq_put_ctx(data.ctx); |
| 1627 | 1636 | blk_mq_bio_to_request(rq, bio); |
| @@ -2641,7 +2650,8 @@ int blk_mq_update_nr_requests(struct request_queue *q, unsigned int nr) · 1013 unmodified lines | ||
| 2641 | 2650 | return ret; |
| 2642 | 2651 | } |
| 2643 | 2652 | |
| 2644 | −void blk_mq_update_nr_hw_queues(struct blk_mq_tag_set *set, int nr_hw_queues) | |
| 2653 | +static void __blk_mq_update_nr_hw_queues(struct blk_mq_tag_set *set, | |
| 2654 | + int nr_hw_queues) | |
| 2645 | 2655 | { |
| 2646 | 2656 | struct request_queue *q; |
| 2647 | 2657 | |
| @@ -2665,6 +2675,13 @@ void blk_mq_update_nr_hw_queues(struct blk_mq_tag_set *set, int nr_hw_queues) · 17 unmodified lines | ||
| 2665 | 2675 | list_for_each_entry(q, &set->tag_list, tag_set_list) |
| 2666 | 2676 | blk_mq_unfreeze_queue(q); |
| 2667 | 2677 | } |
| 2678 | + | |
| 2679 | +void blk_mq_update_nr_hw_queues(struct blk_mq_tag_set *set, int nr_hw_queues) | |
| 2680 | +{ | |
| 2681 | + mutex_lock(&set->tag_list_lock); | |
| 2682 | + __blk_mq_update_nr_hw_queues(set, nr_hw_queues); | |
| 2683 | + mutex_unlock(&set->tag_list_lock); | |
| 2684 | +} | |
| 2668 | 2685 | EXPORT_SYMBOL_GPL(blk_mq_update_nr_hw_queues); |
| 2669 | 2686 | |
| 2670 | 2687 | /* Enable polling stats and return whether they were already enabled. */ |
| @@ -777,24 +777,25 @@ static void blk_free_queue_rcu(struct rcu_head *rcu_head) · 776 unmodified lines | ||
| 777 | 777 | } |
| 778 | 778 | |
| 779 | 779 | /** |
| 780 | − * blk_release_queue: - release a &struct request_queue when it is no longer needed | |
| 781 | − * @kobj: the kobj belonging to the request queue to be released | |
| 780 | + * __blk_release_queue - release a request queue when it is no longer needed | |
| 781 | + * @work: pointer to the release_work member of the request queue to be released | |
| 782 | 782 | * |
| 783 | 783 | * Description: |
| 784 | − * blk_release_queue is the pair to blk_init_queue() or | |
| 785 | − * blk_queue_make_request(). It should be called when a request queue is | |
| 786 | − * being released; typically when a block device is being de-registered. | |
| 787 | − * Currently, its primary task it to free all the &struct request | |
| 788 | − * structures that were allocated to the queue and the queue itself. | |
| 784 | + * blk_release_queue is the counterpart of blk_init_queue(). It should be | |
| 785 | + * called when a request queue is being released; typically when a block | |
| 786 | + * device is being de-registered. Its primary task it to free the queue | |
| 787 | + * itself. | |
| 789 | 788 | * |
| 790 | − * Note: | |
| 789 | + * Notes: | |
| 791 | 790 | * The low level driver must have finished any outstanding requests first |
| 792 | 791 | * via blk_cleanup_queue(). |
| 793 | − **/ | |
| 794 | −static void blk_release_queue(struct kobject *kobj) | |
| 792 | + * | |
| 793 | + * Although blk_release_queue() may be called with preemption disabled, | |
| 794 | + * __blk_release_queue() may sleep. | |
| 795 | + */ | |
| 796 | +static void __blk_release_queue(struct work_struct *work) | |
| 795 | 797 | { |
| 796 | − struct request_queue *q = | |
| 797 | − container_of(kobj, struct request_queue, kobj); | |
| 798 | + struct request_queue *q = container_of(work, typeof(*q), release_work); | |
| 798 | 799 | |
| 799 | 800 | if (test_bit(QUEUE_FLAG_POLL_STATS, &q->queue_flags)) |
| 800 | 801 | blk_stat_remove_callback(q, q->poll_cb); |
| @@ -809,7 +810,7 @@ static void blk_release_queue(struct kobject *kobj) · 8 unmodified lines | ||
| 809 | 810 | |
| 810 | 811 | blk_free_queue_stats(q->stats); |
| 811 | 812 | |
| 812 | − blk_exit_rl(&q->root_rl); | |
| 813 | + blk_exit_rl(q, &q->root_rl); | |
| 813 | 814 | |
| 814 | 815 | if (q->queue_tags) |
| 815 | 816 | __blk_queue_free_tags(q); |
| @@ -834,6 +835,15 @@ static void blk_release_queue(struct kobject *kobj) · 18 unmodified lines | ||
| 834 | 835 | call_rcu(&q->rcu_head, blk_free_queue_rcu); |
| 835 | 836 | } |
| 836 | 837 | |
| 838 | +static void blk_release_queue(struct kobject *kobj) | |
| 839 | +{ | |
| 840 | + struct request_queue *q = | |
| 841 | + container_of(kobj, struct request_queue, kobj); | |
| 842 | + | |
| 843 | + INIT_WORK(&q->release_work, __blk_release_queue); | |
| 844 | + schedule_work(&q->release_work); | |
| 845 | +} | |
| 846 | + | |
| 837 | 847 | static const struct sysfs_ops queue_sysfs_ops = { |
| 838 | 848 | .show = queue_attr_show, |
| 839 | 849 | .store = queue_attr_store, |
| @@ -27,6 +27,13 @@ static int throtl_quantum = 32; · 26 unmodified lines | ||
| 27 | 27 | #define MIN_THROTL_IOPS (10) |
| 28 | 28 | #define DFL_LATENCY_TARGET (-1L) |
| 29 | 29 | #define DFL_IDLE_THRESHOLD (0) |
| 30 | +#define DFL_HD_BASELINE_LATENCY (4000L) /* 4ms */ | |
| 31 | +#define LATENCY_FILTERED_SSD (0) | |
| 32 | +/* | |
| 33 | + * For HD, very small latency comes from sequential IO. Such IO is helpless to | |
| 34 | + * help determine if its IO is impacted by others, hence we ignore the IO | |
| 35 | + */ | |
| 36 | +#define LATENCY_FILTERED_HD (1000L) /* 1ms */ | |
| 30 | 37 | |
| 31 | 38 | #define SKIP_LATENCY (((u64)1) << BLK_STAT_RES_SHIFT) |
| 32 | 39 | |
| @@ -212,6 +219,7 @@ struct throtl_data · 179 unmodified lines | ||
| 212 | 219 | struct avg_latency_bucket avg_buckets[LATENCY_BUCKET_SIZE]; |
| 213 | 220 | struct latency_bucket __percpu *latency_buckets; |
| 214 | 221 | unsigned long last_calculate_time; |
| 222 | + unsigned long filtered_latency; | |
| 215 | 223 | |
| 216 | 224 | bool track_bio_latency; |
| 217 | 225 | }; |
| @@ -698,7 +706,7 @@ static void throtl_dequeue_tg(struct throtl_grp *tg) · 480 unmodified lines | ||
| 698 | 706 | static void throtl_schedule_pending_timer(struct throtl_service_queue *sq, |
| 699 | 707 | unsigned long expires) |
| 700 | 708 | { |
| 701 | − unsigned long max_expire = jiffies + 8 * sq_to_tg(sq)->td->throtl_slice; | |
| 709 | + unsigned long max_expire = jiffies + 8 * sq_to_td(sq)->throtl_slice; | |
| 702 | 710 | |
| 703 | 711 | /* |
| 704 | 712 | * Since we are adjusting the throttle limit dynamically, the sleep |
| @@ -2281,7 +2289,7 @@ void blk_throtl_bio_endio(struct bio *bio) · 1576 unmodified lines | ||
| 2281 | 2289 | throtl_track_latency(tg->td, blk_stat_size(&bio->bi_issue_stat), |
| 2282 | 2290 | bio_op(bio), lat); |
| 2283 | 2291 | |
| 2284 | − if (tg->latency_target) { | |
| 2292 | + if (tg->latency_target && lat >= tg->td->filtered_latency) { | |
| 2285 | 2293 | int bucket; |
| 2286 | 2294 | unsigned int threshold; |
| 2287 | 2295 | |
| @@ -2417,14 +2425,20 @@ void blk_throtl_exit(struct request_queue *q) · 129 unmodified lines | ||
| 2417 | 2425 | void blk_throtl_register_queue(struct request_queue *q) |
| 2418 | 2426 | { |
| 2419 | 2427 | struct throtl_data *td; |
| 2428 | + int i; | |
| 2420 | 2429 | |
| 2421 | 2430 | td = q->td; |
| 2422 | 2431 | BUG_ON(!td); |
| 2423 | 2432 | |
| 2424 | − if (blk_queue_nonrot(q)) | |
| 2433 | + if (blk_queue_nonrot(q)) { | |
| 2425 | 2434 | td->throtl_slice = DFL_THROTL_SLICE_SSD; |
| 2426 | − else | |
| 2435 | + td->filtered_latency = LATENCY_FILTERED_SSD; | |
| 2436 | + } else { | |
| 2427 | 2437 | td->throtl_slice = DFL_THROTL_SLICE_HD; |
| 2438 | + td->filtered_latency = LATENCY_FILTERED_HD; | |
| 2439 | + for (i = 0; i < LATENCY_BUCKET_SIZE; i++) | |
| 2440 | + td->avg_buckets[i].latency = DFL_HD_BASELINE_LATENCY; | |
| 2441 | + } | |
| 2428 | 2442 | #ifndef CONFIG_BLK_DEV_THROTTLING_LOW |
| 2429 | 2443 | /* if no low limit, use previous default */ |
| 2430 | 2444 | td->throtl_slice = DFL_THROTL_SLICE_HD; |
| @@ -59,7 +59,7 @@ void blk_free_flush_queue(struct blk_flush_queue *q); · 58 unmodified lines | ||
| 59 | 59 | |
| 60 | 60 | int blk_init_rl(struct request_list *rl, struct request_queue *q, |
| 61 | 61 | gfp_t gfp_mask); |
| 62 | −void blk_exit_rl(struct request_list *rl); | |
| 62 | +void blk_exit_rl(struct request_queue *q, struct request_list *rl); | |
| 63 | 63 | void blk_rq_bio_prep(struct request_queue *q, struct request *rq, |
| 64 | 64 | struct bio *bio); |
| 65 | 65 | void blk_queue_bypass_start(struct request_queue *q); |
| @@ -38,9 +38,13 @@ static const u64 cfq_target_latency = (u64)NSEC_PER_SEC * 3/10; /* 300 ms */ · 37 unmodified lines | ||
| 38 | 38 | static const int cfq_hist_divisor = 4; |
| 39 | 39 | |
| 40 | 40 | /* |
| 41 | − * offset from end of service tree | |
| 41 | + * offset from end of queue service tree for idle class | |
| 42 | 42 | */ |
| 43 | 43 | #define CFQ_IDLE_DELAY (NSEC_PER_SEC / 5) |
| 44 | +/* offset from end of group service tree under time slice mode */ | |
| 45 | +#define CFQ_SLICE_MODE_GROUP_DELAY (NSEC_PER_SEC / 5) | |
| 46 | +/* offset from end of group service under IOPS mode */ | |
| 47 | +#define CFQ_IOPS_MODE_GROUP_DELAY (HZ / 5) | |
| 44 | 48 | |
| 45 | 49 | /* |
| 46 | 50 | * below this threshold, we consider thinktime immediate |
| @@ -1362,6 +1366,14 @@ cfq_group_service_tree_add(struct cfq_rb_root *st, struct cfq_group *cfqg) · 1315 unmodified lines | ||
| 1362 | 1366 | cfqg->vfraction = max_t(unsigned, vfr, 1); |
| 1363 | 1367 | } |
| 1364 | 1368 | |
| 1369 | +static inline u64 cfq_get_cfqg_vdisktime_delay(struct cfq_data *cfqd) | |
| 1370 | +{ | |
| 1371 | + if (!iops_mode(cfqd)) | |
| 1372 | + return CFQ_SLICE_MODE_GROUP_DELAY; | |
| 1373 | + else | |
| 1374 | + return CFQ_IOPS_MODE_GROUP_DELAY; | |
| 1375 | +} | |
| 1376 | + | |
| 1365 | 1377 | static void |
| 1366 | 1378 | cfq_group_notify_queue_add(struct cfq_data *cfqd, struct cfq_group *cfqg) |
| 1367 | 1379 | { |
| @@ -1381,7 +1393,8 @@ cfq_group_notify_queue_add(struct cfq_data *cfqd, struct cfq_group *cfqg) · 13 unmodified lines | ||
| 1381 | 1393 | n = rb_last(&st->rb); |
| 1382 | 1394 | if (n) { |
| 1383 | 1395 | __cfqg = rb_entry_cfqg(n); |
| 1384 | − cfqg->vdisktime = __cfqg->vdisktime + CFQ_IDLE_DELAY; | |
| 1396 | + cfqg->vdisktime = __cfqg->vdisktime + | |
| 1397 | + cfq_get_cfqg_vdisktime_delay(cfqd); | |
| 1385 | 1398 | } else |
| 1386 | 1399 | cfqg->vdisktime = st->min_vdisktime; |
| 1387 | 1400 | cfq_group_service_tree_add(st, cfqg); |
| @@ -141,7 +141,7 @@ int public_key_verify_signature(const struct public_key *pkey, · 140 unmodified lines | ||
| 141 | 141 | * signature and returns that to us. |
| 142 | 142 | */ |
| 143 | 143 | ret = crypto_akcipher_verify(req); |
| 144 | − if (ret == -EINPROGRESS) { | |
| 144 | + if ((ret == -EINPROGRESS) || (ret == -EBUSY)) { | |
| 145 | 145 | wait_for_completion(&compl.completion); |
| 146 | 146 | ret = compl.err; |
| 147 | 147 | } |
| @@ -381,7 +381,7 @@ static int pefile_digest_pe(const void *pebuf, unsigned int pelen, · 380 unmodified lines | ||
| 381 | 381 | } |
| 382 | 382 | |
| 383 | 383 | error: |
| 384 | − kfree(desc); | |
| 384 | + kzfree(desc); | |
| 385 | 385 | error_no_desc: |
| 386 | 386 | crypto_free_shash(tfm); |
| 387 | 387 | kleave(" = %d", ret); |
| @@ -450,6 +450,6 @@ int verify_pefile_signature(const void *pebuf, unsigned pelen, · 62 unmodified lines | ||
| 450 | 450 | ret = pefile_digest_pe(pebuf, pelen, &ctx); |
| 451 | 451 | |
| 452 | 452 | error: |
| 453 | − kfree(ctx.digest); | |
| 453 | + kzfree(ctx.digest); | |
| 454 | 454 | return ret; |
| 455 | 455 | } |
| @@ -102,6 +102,7 @@ struct x509_certificate *x509_cert_parse(const void *data, size_t datalen) · 101 unmodified lines | ||
| 102 | 102 | } |
| 103 | 103 | } |
| 104 | 104 | |
| 105 | + ret = -ENOMEM; | |
| 105 | 106 | cert->pub->key = kmemdup(ctx->key, ctx->key_size, GFP_KERNEL); |
| 106 | 107 | if (!cert->pub->key) |
| 107 | 108 | goto error_decode; |
| @@ -1767,9 +1767,8 @@ static int drbg_kcapi_sym_ctr(struct drbg_state *drbg, · 1766 unmodified lines | ||
| 1767 | 1767 | break; |
| 1768 | 1768 | case -EINPROGRESS: |
| 1769 | 1769 | case -EBUSY: |
| 1770 | − ret = wait_for_completion_interruptible( | |
| 1771 | − &drbg->ctr_completion); | |
| 1772 | − if (!ret && !drbg->ctr_async_err) { | |
| 1770 | + wait_for_completion(&drbg->ctr_completion); | |
| 1771 | + if (!drbg->ctr_async_err) { | |
| 1773 | 1772 | reinit_completion(&drbg->ctr_completion); |
| 1774 | 1773 | break; |
| 1775 | 1774 | } |
| @@ -152,10 +152,8 @@ static int crypto_gcm_setkey(struct crypto_aead *aead, const u8 *key, · 151 unmodified lines | ||
| 152 | 152 | |
| 153 | 153 | err = crypto_skcipher_encrypt(&data->req); |
| 154 | 154 | if (err == -EINPROGRESS || err == -EBUSY) { |
| 155 | − err = wait_for_completion_interruptible( | |
| 156 | − &data->result.completion); | |
| 157 | − if (!err) | |
| 158 | − err = data->result.err; | |
| 155 | + wait_for_completion(&data->result.completion); | |
| 156 | + err = data->result.err; | |
| 159 | 157 | } |
| 160 | 158 | |
| 161 | 159 | if (err) |
| @@ -416,13 +416,18 @@ acpi_tb_get_table(struct acpi_table_desc *table_desc, · 415 unmodified lines | ||
| 416 | 416 | } |
| 417 | 417 | } |
| 418 | 418 | |
| 419 | − table_desc->validation_count++; | |
| 420 | − if (table_desc->validation_count == 0) { | |
| 421 | − ACPI_ERROR((AE_INFO, | |
| 422 | − "Table %p, Validation count is zero after increment\n", | |
| 423 | − table_desc)); | |
| 424 | − table_desc->validation_count--; | |
| 425 | − return_ACPI_STATUS(AE_LIMIT); | |
| 419 | + if (table_desc->validation_count < ACPI_MAX_TABLE_VALIDATIONS) { | |
| 420 | + table_desc->validation_count++; | |
| 421 | + | |
| 422 | + /* | |
| 423 | + * Detect validation_count overflows to ensure that the warning | |
| 424 | + * message will only be printed once. | |
| 425 | + */ | |
| 426 | + if (table_desc->validation_count >= ACPI_MAX_TABLE_VALIDATIONS) { | |
| 427 | + ACPI_WARNING((AE_INFO, | |
| 428 | + "Table %p, Validation count overflows\n", | |
| 429 | + table_desc)); | |
| 430 | + } | |
| 426 | 431 | } |
| 427 | 432 | |
| 428 | 433 | *out_table = table_desc->pointer; |
| @@ -449,13 +454,20 @@ void acpi_tb_put_table(struct acpi_table_desc *table_desc) · 20 unmodified lines | ||
| 449 | 454 | |
| 450 | 455 | ACPI_FUNCTION_TRACE(acpi_tb_put_table); |
| 451 | 456 | |
| 452 | − if (table_desc->validation_count == 0) { | |
| 453 | − ACPI_WARNING((AE_INFO, | |
| 454 | − "Table %p, Validation count is zero before decrement\n", | |
| 455 | − table_desc)); | |
| 456 | − return_VOID; | |
| 457 | + if (table_desc->validation_count < ACPI_MAX_TABLE_VALIDATIONS) { | |
| 458 | + table_desc->validation_count--; | |
| 459 | + | |
| 460 | + /* | |
| 461 | + * Detect validation_count underflows to ensure that the warning | |
| 462 | + * message will only be printed once. | |
| 463 | + */ | |
| 464 | + if (table_desc->validation_count >= ACPI_MAX_TABLE_VALIDATIONS) { | |
| 465 | + ACPI_WARNING((AE_INFO, | |
| 466 | + "Table %p, Validation count underflows\n", | |
| 467 | + table_desc)); | |
| 468 | + return_VOID; | |
| 469 | + } | |
| 457 | 470 | } |
| 458 | − table_desc->validation_count--; | |
| 459 | 471 | |
| 460 | 472 | if (table_desc->validation_count == 0) { |
| 461 | 473 | |
| @@ -474,15 +474,6 @@ acpi_ut_walk_aml_resources(struct acpi_walk_state *walk_state, · 473 unmodified lines | ||
| 474 | 474 | return_ACPI_STATUS(AE_AML_NO_RESOURCE_END_TAG); |
| 475 | 475 | } |
| 476 | 476 | |
| 477 | − /* | |
| 478 | − * The end_tag opcode must be followed by a zero byte. | |
| 479 | − * Although this byte is technically defined to be a checksum, | |
| 480 | − * in practice, all ASL compilers set this byte to zero. | |
| 481 | − */ | |
| 482 | − if (*(aml + 1) != 0) { | |
| 483 | − return_ACPI_STATUS(AE_AML_NO_RESOURCE_END_TAG); | |
| 484 | − } | |
| 485 | − | |
| 486 | 477 | /* Return the pointer to the end_tag if requested */ |
| 487 | 478 | |
| 488 | 479 | if (!user_function) { |
| @@ -666,14 +666,6 @@ static const struct iommu_ops *iort_iommu_xlate(struct device *dev, · 665 unmodified lines | ||
| 666 | 666 | int ret = -ENODEV; |
| 667 | 667 | struct fwnode_handle *iort_fwnode; |
| 668 | 668 | |
| 669 | − /* | |
| 670 | − * If we already translated the fwspec there | |
| 671 | − * is nothing left to do, return the iommu_ops. | |
| 672 | − */ | |
| 673 | − ops = iort_fwspec_iommu_ops(dev->iommu_fwspec); | |
| 674 | − if (ops) | |
| 675 | − return ops; | |
| 676 | − | |
| 677 | 669 | if (node) { |
| 678 | 670 | iort_fwnode = iort_get_fwnode(node); |
| 679 | 671 | if (!iort_fwnode) |
| @@ -735,6 +727,14 @@ const struct iommu_ops *iort_iommu_configure(struct device *dev) · 55 unmodified lines | ||
| 735 | 727 | u32 streamid = 0; |
| 736 | 728 | int err; |
| 737 | 729 | |
| 730 | + /* | |
| 731 | + * If we already translated the fwspec there | |
| 732 | + * is nothing left to do, return the iommu_ops. | |
| 733 | + */ | |
| 734 | + ops = iort_fwspec_iommu_ops(dev->iommu_fwspec); | |
| 735 | + if (ops) | |
| 736 | + return ops; | |
| 737 | + | |
| 738 | 738 | if (dev_is_pci(dev)) { |
| 739 | 739 | struct pci_bus *bus = to_pci_dev(dev)->bus; |
| 740 | 740 | u32 rid; |
| @@ -782,6 +782,12 @@ const struct iommu_ops *iort_iommu_configure(struct device *dev) · 41 unmodified lines | ||
| 782 | 782 | if (err) |
| 783 | 783 | ops = ERR_PTR(err); |
| 784 | 784 | |
| 785 | + /* Ignore all other errors apart from EPROBE_DEFER */ | |
| 786 | + if (IS_ERR(ops) && (PTR_ERR(ops) != -EPROBE_DEFER)) { | |
| 787 | + dev_dbg(dev, "Adding to IOMMU failed: %ld\n", PTR_ERR(ops)); | |
| 788 | + ops = NULL; | |
| 789 | + } | |
| 790 | + | |
| 785 | 791 | return ops; |
| 786 | 792 | } |
| 787 | 793 | |
| @@ -782,7 +782,7 @@ static int acpi_battery_update(struct acpi_battery *battery, bool resume) · 781 unmodified lines | ||
| 782 | 782 | if ((battery->state & ACPI_BATTERY_STATE_CRITICAL) || |
| 783 | 783 | (test_bit(ACPI_BATTERY_ALARM_PRESENT, &battery->flags) && |
| 784 | 784 | (battery->capacity_now <= battery->alarm))) |
| 785 | − pm_wakeup_hard_event(&battery->device->dev); | |
| 785 | + pm_wakeup_event(&battery->device->dev, 0); | |
| 786 | 786 | |
| 787 | 787 | return result; |
| 788 | 788 | } |
| @@ -113,7 +113,7 @@ struct acpi_button { · 112 unmodified lines | ||
| 113 | 113 | |
| 114 | 114 | static BLOCKING_NOTIFIER_HEAD(acpi_lid_notifier); |
| 115 | 115 | static struct acpi_device *lid_device; |
| 116 | −static u8 lid_init_state = ACPI_BUTTON_LID_INIT_OPEN; | |
| 116 | +static u8 lid_init_state = ACPI_BUTTON_LID_INIT_METHOD; | |
| 117 | 117 | |
| 118 | 118 | static unsigned long lid_report_interval __read_mostly = 500; |
| 119 | 119 | module_param(lid_report_interval, ulong, 0644); |
| @@ -217,7 +217,7 @@ static int acpi_lid_notify_state(struct acpi_device *device, int state) · 97 unmodified lines | ||
| 217 | 217 | } |
| 218 | 218 | |
| 219 | 219 | if (state) |
| 220 | − pm_wakeup_hard_event(&device->dev); | |
| 220 | + pm_wakeup_event(&device->dev, 0); | |
| 221 | 221 | |
| 222 | 222 | ret = blocking_notifier_call_chain(&acpi_lid_notifier, state, device); |
| 223 | 223 | if (ret == NOTIFY_DONE) |
| @@ -402,7 +402,7 @@ static void acpi_button_notify(struct acpi_device *device, u32 event) · 178 unmodified lines | ||
| 402 | 402 | } else { |
| 403 | 403 | int keycode; |
| 404 | 404 | |
| 405 | − pm_wakeup_hard_event(&device->dev); | |
| 405 | + pm_wakeup_event(&device->dev, 0); | |
| 406 | 406 | if (button->suspended) |
| 407 | 407 | break; |
| 408 | 408 | |
| @@ -534,7 +534,6 @@ static int acpi_button_add(struct acpi_device *device) · 125 unmodified lines | ||
| 534 | 534 | lid_device = device; |
| 535 | 535 | } |
| 536 | 536 | |
| 537 | − device_init_wakeup(&device->dev, true); | |
| 538 | 537 | printk(KERN_INFO PREFIX "%s [%s]\n", name, acpi_device_bid(device)); |
| 539 | 538 | return 0; |
| 540 | 539 | |
| @@ -24,7 +24,6 @@ · 23 unmodified lines | ||
| 24 | 24 | #include <linux/pm_qos.h> |
| 25 | 25 | #include <linux/pm_domain.h> |
| 26 | 26 | #include <linux/pm_runtime.h> |
| 27 | −#include <linux/suspend.h> | |
| 28 | 27 | |
| 29 | 28 | #include "internal.h" |
| 30 | 29 | |
| @@ -400,7 +399,7 @@ static void acpi_pm_notify_handler(acpi_handle handle, u32 val, void *not_used) · 369 unmodified lines | ||
| 400 | 399 | mutex_lock(&acpi_pm_notifier_lock); |
| 401 | 400 | |
| 402 | 401 | if (adev->wakeup.flags.notifier_present) { |
| 403 | − pm_wakeup_ws_event(adev->wakeup.ws, 0, true); | |
| 402 | + __pm_wakeup_event(adev->wakeup.ws, 0); | |
| 404 | 403 | if (adev->wakeup.context.work.func) |
| 405 | 404 | queue_pm_work(&adev->wakeup.context.work); |
| 406 | 405 | } |
| @@ -1371,8 +1371,8 @@ int acpi_dma_configure(struct device *dev, enum dev_dma_attr attr) · 1370 unmodified lines | ||
| 1371 | 1371 | iort_set_dma_mask(dev); |
| 1372 | 1372 | |
| 1373 | 1373 | iommu = iort_iommu_configure(dev); |
| 1374 | − if (IS_ERR(iommu)) | |
| 1375 | − return PTR_ERR(iommu); | |
| 1374 | + if (IS_ERR(iommu) && PTR_ERR(iommu) == -EPROBE_DEFER) | |
| 1375 | + return -EPROBE_DEFER; | |
| 1376 | 1376 | |
| 1377 | 1377 | size = max(dev->coherent_dma_mask, dev->coherent_dma_mask + 1); |
| 1378 | 1378 | /* |
| @@ -663,40 +663,14 @@ static int acpi_freeze_prepare(void) · 662 unmodified lines | ||
| 663 | 663 | acpi_os_wait_events_complete(); |
| 664 | 664 | if (acpi_sci_irq_valid()) |
| 665 | 665 | enable_irq_wake(acpi_sci_irq); |
| 666 | − | |
| 667 | 666 | return 0; |
| 668 | 667 | } |
| 669 | 668 | |
| 670 | −static void acpi_freeze_wake(void) | |
| 671 | −{ | |
| 672 | − /* | |
| 673 | − * If IRQD_WAKEUP_ARMED is not set for the SCI at this point, it means | |
| 674 | − * that the SCI has triggered while suspended, so cancel the wakeup in | |
| 675 | − * case it has not been a wakeup event (the GPEs will be checked later). | |
| 676 | − */ | |
| 677 | − if (acpi_sci_irq_valid() && | |
| 678 | − !irqd_is_wakeup_armed(irq_get_irq_data(acpi_sci_irq))) | |
| 679 | − pm_system_cancel_wakeup(); | |
| 680 | −} | |
| 681 | − | |
| 682 | −static void acpi_freeze_sync(void) | |
| 683 | −{ | |
| 684 | − /* | |
| 685 | − * Process all pending events in case there are any wakeup ones. | |
| 686 | − * | |
| 687 | − * The EC driver uses the system workqueue, so that one needs to be | |
| 688 | − * flushed too. | |
| 689 | − */ | |
| 690 | − acpi_os_wait_events_complete(); | |
| 691 | − flush_scheduled_work(); | |
| 692 | −} | |
| 693 | − | |
| 694 | 669 | static void acpi_freeze_restore(void) |
| 695 | 670 | { |
| 696 | 671 | acpi_disable_wakeup_devices(ACPI_STATE_S0); |
| 697 | 672 | if (acpi_sci_irq_valid()) |
| 698 | 673 | disable_irq_wake(acpi_sci_irq); |
| 699 | − | |
| 700 | 674 | acpi_enable_all_runtime_gpes(); |
| 701 | 675 | } |
| 702 | 676 | |
| @@ -708,8 +682,6 @@ static void acpi_freeze_end(void) · 5 unmodified lines | ||
| 708 | 682 | static const struct platform_freeze_ops acpi_freeze_ops = { |
| 709 | 683 | .begin = acpi_freeze_begin, |
| 710 | 684 | .prepare = acpi_freeze_prepare, |
| 711 | − .wake = acpi_freeze_wake, | |
| 712 | − .sync = acpi_freeze_sync, | |
| 713 | 685 | .restore = acpi_freeze_restore, |
| 714 | 686 | .end = acpi_freeze_end, |
| 715 | 687 | }; |
| @@ -333,14 +333,17 @@ static ssize_t acpi_table_show(struct file *filp, struct kobject *kobj, · 332 unmodified lines | ||
| 333 | 333 | container_of(bin_attr, struct acpi_table_attr, attr); |
| 334 | 334 | struct acpi_table_header *table_header = NULL; |
| 335 | 335 | acpi_status status; |
| 336 | + ssize_t rc; | |
| 336 | 337 | |
| 337 | 338 | status = acpi_get_table(table_attr->name, table_attr->instance, |
| 338 | 339 | &table_header); |
| 339 | 340 | if (ACPI_FAILURE(status)) |
| 340 | 341 | return -ENODEV; |
| 341 | 342 | |
| 342 | − return memory_read_from_buffer(buf, count, &offset, | |
| 343 | − table_header, table_header->length); | |
| 343 | + rc = memory_read_from_buffer(buf, count, &offset, table_header, | |
| 344 | + table_header->length); | |
| 345 | + acpi_put_table(table_header); | |
| 346 | + return rc; | |
| 344 | 347 | } |
| 345 | 348 | |
| 346 | 349 | static int acpi_table_attr_init(struct kobject *tables_obj, |
| @@ -1364,6 +1364,40 @@ static inline void ahci_gtf_filter_workaround(struct ata_host *host) · 1363 unmodified lines | ||
| 1364 | 1364 | {} |
| 1365 | 1365 | #endif |
| 1366 | 1366 | |
| 1367 | +/* | |
| 1368 | + * On the Acer Aspire Switch Alpha 12, sometimes all SATA ports are detected | |
| 1369 | + * as DUMMY, or detected but eventually get a "link down" and never get up | |
| 1370 | + * again. When this happens, CAP.NP may hold a value of 0x00 or 0x01, and the | |
| 1371 | + * port_map may hold a value of 0x00. | |
| 1372 | + * | |
| 1373 | + * Overriding CAP.NP to 0x02 and the port_map to 0x7 will reveal all 3 ports | |
| 1374 | + * and can significantly reduce the occurrence of the problem. | |
| 1375 | + * | |
| 1376 | + * https://bugzilla.kernel.org/show_bug.cgi?id=189471 | |
| 1377 | + */ | |
| 1378 | +static void acer_sa5_271_workaround(struct ahci_host_priv *hpriv, | |
| 1379 | + struct pci_dev *pdev) | |
| 1380 | +{ | |
| 1381 | + static const struct dmi_system_id sysids[] = { | |
| 1382 | + { | |
| 1383 | + .ident = "Acer Switch Alpha 12", | |
| 1384 | + .matches = { | |
| 1385 | + DMI_MATCH(DMI_SYS_VENDOR, "Acer"), | |
| 1386 | + DMI_MATCH(DMI_PRODUCT_NAME, "Switch SA5-271") | |
| 1387 | + }, | |
| 1388 | + }, | |
| 1389 | + { } | |
| 1390 | + }; | |
| 1391 | + | |
| 1392 | + if (dmi_check_system(sysids)) { | |
| 1393 | + dev_info(&pdev->dev, "enabling Acer Switch Alpha 12 workaround\n"); | |
| 1394 | + if ((hpriv->saved_cap & 0xC734FF00) == 0xC734FF00) { | |
| 1395 | + hpriv->port_map = 0x7; | |
| 1396 | + hpriv->cap = 0xC734FF02; | |
| 1397 | + } | |
| 1398 | + } | |
| 1399 | +} | |
| 1400 | + | |
| 1367 | 1401 | #ifdef CONFIG_ARM64 |
| 1368 | 1402 | /* |
| 1369 | 1403 | * Due to ERRATA#22536, ThunderX needs to handle HOST_IRQ_STAT differently. |
| @@ -1636,6 +1670,10 @@ static int ahci_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) · 266 unmodified lines | ||
| 1636 | 1670 | "online status unreliable, applying workaround\n"); |
| 1637 | 1671 | } |
| 1638 | 1672 | |
| 1673 | + | |
| 1674 | + /* Acer SA5-271 workaround modifies private_data */ | |
| 1675 | + acer_sa5_271_workaround(hpriv, pdev); | |
| 1676 | + | |
| 1639 | 1677 | /* CAP.NP sometimes indicate the index of the last enabled |
| 1640 | 1678 | * port, at other times, that of the last possible port, so |
| 1641 | 1679 | * determining the maximum port number requires looking at |
| @@ -514,8 +514,9 @@ int ahci_platform_init_host(struct platform_device *pdev, · 513 unmodified lines | ||
| 514 | 514 | |
| 515 | 515 | irq = platform_get_irq(pdev, 0); |
| 516 | 516 | if (irq <= 0) { |
| 517 | − dev_err(dev, "no irq\n"); | |
| 518 | − return -EINVAL; | |
| 517 | + if (irq != -EPROBE_DEFER) | |
| 518 | + dev_err(dev, "no irq\n"); | |
| 519 | + return irq; | |
| 519 | 520 | } |
| 520 | 521 | |
| 521 | 522 | hpriv->irq = irq; |
| @@ -6800,7 +6800,7 @@ static int __init ata_parse_force_one(char **cur, · 6799 unmodified lines | ||
| 6800 | 6800 | } |
| 6801 | 6801 | |
| 6802 | 6802 | force_ent->port = simple_strtoul(id, &endp, 10); |
| 6803 | − if (p == endp || *endp != '\0') { | |
| 6803 | + if (id == endp || *endp != '\0') { | |
| 6804 | 6804 | *reason = "invalid port/link"; |
| 6805 | 6805 | return -EINVAL; |
| 6806 | 6806 | } |
| @@ -4067,7 +4067,6 @@ static int mv_platform_probe(struct platform_device *pdev) · 4066 unmodified lines | ||
| 4067 | 4067 | struct ata_host *host; |
| 4068 | 4068 | struct mv_host_priv *hpriv; |
| 4069 | 4069 | struct resource *res; |
| 4070 | − void __iomem *mmio; | |
| 4071 | 4070 | int n_ports = 0, irq = 0; |
| 4072 | 4071 | int rc; |
| 4073 | 4072 | int port; |
| @@ -4086,9 +4085,8 @@ static int mv_platform_probe(struct platform_device *pdev) · 12 unmodified lines | ||
| 4086 | 4085 | * Get the register base first |
| 4087 | 4086 | */ |
| 4088 | 4087 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
| 4089 | − mmio = devm_ioremap_resource(&pdev->dev, res); | |
| 4090 | − if (IS_ERR(mmio)) | |
| 4091 | − return PTR_ERR(mmio); | |
| 4088 | + if (res == NULL) | |
| 4089 | + return -EINVAL; | |
| 4092 | 4090 | |
| 4093 | 4091 | /* allocate host */ |
| 4094 | 4092 | if (pdev->dev.of_node) { |
| @@ -4132,7 +4130,12 @@ static int mv_platform_probe(struct platform_device *pdev) · 37 unmodified lines | ||
| 4132 | 4130 | hpriv->board_idx = chip_soc; |
| 4133 | 4131 | |
| 4134 | 4132 | host->iomap = NULL; |
| 4135 | − hpriv->base = mmio - SATAHC0_REG_BASE; | |
| 4133 | + hpriv->base = devm_ioremap(&pdev->dev, res->start, | |
| 4134 | + resource_size(res)); | |
| 4135 | + if (!hpriv->base) | |
| 4136 | + return -ENOMEM; | |
| 4137 | + | |
| 4138 | + hpriv->base -= SATAHC0_REG_BASE; | |
| 4136 | 4139 | |
| 4137 | 4140 | hpriv->clk = clk_get(&pdev->dev, NULL); |
| 4138 | 4141 | if (IS_ERR(hpriv->clk)) |
| @@ -890,7 +890,10 @@ static int sata_rcar_probe(struct platform_device *pdev) · 889 unmodified lines | ||
| 890 | 890 | dev_err(&pdev->dev, "failed to get access to sata clock\n"); |
| 891 | 891 | return PTR_ERR(priv->clk); |
| 892 | 892 | } |
| 893 | − clk_prepare_enable(priv->clk); | |
| 893 | + | |
| 894 | + ret = clk_prepare_enable(priv->clk); | |
| 895 | + if (ret) | |
| 896 | + return ret; | |
| 894 | 897 | |
| 895 | 898 | host = ata_host_alloc(&pdev->dev, 1); |
| 896 | 899 | if (!host) { |
| @@ -970,8 +973,11 @@ static int sata_rcar_resume(struct device *dev) · 73 unmodified lines | ||
| 970 | 973 | struct ata_host *host = dev_get_drvdata(dev); |
| 971 | 974 | struct sata_rcar_priv *priv = host->private_data; |
| 972 | 975 | void __iomem *base = priv->base; |
| 976 | + int ret; | |
| 973 | 977 | |
| 974 | − clk_prepare_enable(priv->clk); | |
| 978 | + ret = clk_prepare_enable(priv->clk); | |
| 979 | + if (ret) | |
| 980 | + return ret; | |
| 975 | 981 | |
| 976 | 982 | /* ack and mask */ |
| 977 | 983 | iowrite32(0, base + SATAINTSTAT_REG); |
| @@ -988,8 +994,11 @@ static int sata_rcar_restore(struct device *dev) · 10 unmodified lines | ||
| 988 | 994 | { |
| 989 | 995 | struct ata_host *host = dev_get_drvdata(dev); |
| 990 | 996 | struct sata_rcar_priv *priv = host->private_data; |
| 997 | + int ret; | |
| 991 | 998 | |
| 992 | − clk_prepare_enable(priv->clk); | |
| 999 | + ret = clk_prepare_enable(priv->clk); | |
| 1000 | + if (ret) | |
| 1001 | + return ret; | |
| 993 | 1002 | |
| 994 | 1003 | sata_rcar_setup_port(host); |
| 995 | 1004 | |
| @@ -1091,6 +1091,11 @@ static int __device_suspend_noirq(struct device *dev, pm_message_t state, bool a · 1090 unmodified lines | ||
| 1091 | 1091 | if (async_error) |
| 1092 | 1092 | goto Complete; |
| 1093 | 1093 | |
| 1094 | + if (pm_wakeup_pending()) { | |
| 1095 | + async_error = -EBUSY; | |
| 1096 | + goto Complete; | |
| 1097 | + } | |
| 1098 | + | |
| 1094 | 1099 | if (dev->power.syscore || dev->power.direct_complete) |
| 1095 | 1100 | goto Complete; |
| 1096 | 1101 | |
| @@ -28,8 +28,8 @@ bool events_check_enabled __read_mostly; · 27 unmodified lines | ||
| 28 | 28 | /* First wakeup IRQ seen by the kernel in the last cycle. */ |
| 29 | 29 | unsigned int pm_wakeup_irq __read_mostly; |
| 30 | 30 | |
| 31 | −/* If greater than 0 and the system is suspending, terminate the suspend. */ | |
| 32 | −static atomic_t pm_abort_suspend __read_mostly; | |
| 31 | +/* If set and the system is suspending, terminate the suspend. */ | |
| 32 | +static bool pm_abort_suspend __read_mostly; | |
| 33 | 33 | |
| 34 | 34 | /* |
| 35 | 35 | * Combined counters of registered wakeup events and wakeup events in progress. |
| @@ -855,26 +855,20 @@ bool pm_wakeup_pending(void) · 819 unmodified lines | ||
| 855 | 855 | pm_print_active_wakeup_sources(); |
| 856 | 856 | } |
| 857 | 857 | |
| 858 | − return ret || atomic_read(&pm_abort_suspend) > 0; | |
| 858 | + return ret || pm_abort_suspend; | |
| 859 | 859 | } |
| 860 | 860 | |
| 861 | 861 | void pm_system_wakeup(void) |
| 862 | 862 | { |
| 863 | − atomic_inc(&pm_abort_suspend); | |
| 863 | + pm_abort_suspend = true; | |
| 864 | 864 | freeze_wake(); |
| 865 | 865 | } |
| 866 | 866 | EXPORT_SYMBOL_GPL(pm_system_wakeup); |
| 867 | 867 | |
| 868 | −void pm_system_cancel_wakeup(void) | |
| 869 | −{ | |
| 870 | − atomic_dec(&pm_abort_suspend); | |
| 871 | −} | |
| 872 | − | |
| 873 | −void pm_wakeup_clear(bool reset) | |
| 868 | +void pm_wakeup_clear(void) | |
| 874 | 869 | { |
| 870 | + pm_abort_suspend = false; | |
| 875 | 871 | pm_wakeup_irq = 0; |
| 876 | − if (reset) | |
| 877 | − atomic_set(&pm_abort_suspend, 0); | |
| 878 | 872 | } |
| 879 | 873 | |
| 880 | 874 | void pm_system_irq_wakeup(unsigned int irq_number) |
| @@ -608,6 +608,9 @@ static int loop_switch(struct loop_device *lo, struct file *file) · 607 unmodified lines | ||
| 608 | 608 | */ |
| 609 | 609 | static int loop_flush(struct loop_device *lo) |
| 610 | 610 | { |
| 611 | + /* loop not yet configured, no running thread, nothing to flush */ | |
| 612 | + if (lo->lo_state != Lo_bound) | |
| 613 | + return 0; | |
| 611 | 614 | return loop_switch(lo, NULL); |
| 612 | 615 | } |
| 613 | 616 | |
| @@ -937,14 +937,6 @@ static int nbd_reconnect_socket(struct nbd_device *nbd, unsigned long arg) · 936 unmodified lines | ||
| 937 | 937 | return -ENOSPC; |
| 938 | 938 | } |
| 939 | 939 | |
| 940 | −/* Reset all properties of an NBD device */ | |
| 941 | −static void nbd_reset(struct nbd_device *nbd) | |
| 942 | −{ | |
| 943 | − nbd->config = NULL; | |
| 944 | − nbd->tag_set.timeout = 0; | |
| 945 | − queue_flag_clear_unlocked(QUEUE_FLAG_DISCARD, nbd->disk->queue); | |
| 946 | −} | |
| 947 | − | |
| 948 | 940 | static void nbd_bdev_reset(struct block_device *bdev) |
| 949 | 941 | { |
| 950 | 942 | if (bdev->bd_openers > 1) |
| @@ -1029,7 +1021,11 @@ static void nbd_config_put(struct nbd_device *nbd) · 78 unmodified lines | ||
| 1029 | 1021 | } |
| 1030 | 1022 | kfree(config->socks); |
| 1031 | 1023 | } |
| 1032 | − nbd_reset(nbd); | |
| 1024 | + kfree(nbd->config); | |
| 1025 | + nbd->config = NULL; | |
| 1026 | + | |
| 1027 | + nbd->tag_set.timeout = 0; | |
| 1028 | + queue_flag_clear_unlocked(QUEUE_FLAG_DISCARD, nbd->disk->queue); | |
| 1033 | 1029 | |
| 1034 | 1030 | mutex_unlock(&nbd->config_lock); |
| 1035 | 1031 | nbd_put(nbd); |
| @@ -1483,7 +1479,6 @@ static int nbd_dev_add(int index) · 447 unmodified lines | ||
| 1483 | 1479 | disk->fops = &nbd_fops; |
| 1484 | 1480 | disk->private_data = nbd; |
| 1485 | 1481 | sprintf(disk->disk_name, "nbd%d", index); |
| 1486 | − nbd_reset(nbd); | |
| 1487 | 1482 | add_disk(disk); |
| 1488 | 1483 | nbd_total_devices++; |
| 1489 | 1484 | return index; |
| @@ -4023,6 +4023,7 @@ static void rbd_queue_workfn(struct work_struct *work) · 4022 unmodified lines | ||
| 4023 | 4023 | |
| 4024 | 4024 | switch (req_op(rq)) { |
| 4025 | 4025 | case REQ_OP_DISCARD: |
| 4026 | + case REQ_OP_WRITE_ZEROES: | |
| 4026 | 4027 | op_type = OBJ_OP_DISCARD; |
| 4027 | 4028 | break; |
| 4028 | 4029 | case REQ_OP_WRITE: |
| @@ -4420,6 +4421,7 @@ static int rbd_init_disk(struct rbd_device *rbd_dev) · 391 unmodified lines | ||
| 4420 | 4421 | q->limits.discard_granularity = segment_size; |
| 4421 | 4422 | q->limits.discard_alignment = segment_size; |
| 4422 | 4423 | blk_queue_max_discard_sectors(q, segment_size / SECTOR_SIZE); |
| 4424 | + blk_queue_max_write_zeroes_sectors(q, segment_size / SECTOR_SIZE); | |
| 4423 | 4425 | |
| 4424 | 4426 | if (!ceph_test_opt(rbd_dev->rbd_client->client, NOCRC)) |
| 4425 | 4427 | q->backing_dev_info->capabilities |= BDI_CAP_STABLE_WRITES; |
| @@ -343,7 +343,7 @@ static int mmap_mem(struct file *file, struct vm_area_struct *vma) · 342 unmodified lines | ||
| 343 | 343 | phys_addr_t offset = (phys_addr_t)vma->vm_pgoff << PAGE_SHIFT; |
| 344 | 344 | |
| 345 | 345 | /* It's illegal to wrap around the end of the physical address space. */ |
| 346 | − if (offset + (phys_addr_t)size < offset) | |
| 346 | + if (offset + (phys_addr_t)size - 1 < offset) | |
| 347 | 347 | return -EINVAL; |
| 348 | 348 | |
| 349 | 349 | if (!valid_mmap_phys_addr_range(vma->vm_pgoff, size)) |
| @@ -374,7 +374,7 @@ static ssize_t cm4040_write(struct file *filp, const char __user *buf, · 373 unmodified lines | ||
| 374 | 374 | |
| 375 | 375 | rc = write_sync_reg(SCR_HOST_TO_READER_START, dev); |
| 376 | 376 | if (rc <= 0) { |
| 377 | − DEBUGP(5, dev, "write_sync_reg c=%.2Zx\n", rc); | |
| 377 | + DEBUGP(5, dev, "write_sync_reg c=%.2zx\n", rc); | |
| 378 | 378 | DEBUGP(2, dev, "<- cm4040_write (failed)\n"); |
| 379 | 379 | if (rc == -ERESTARTSYS) |
| 380 | 380 | return rc; |
| @@ -387,7 +387,7 @@ static ssize_t cm4040_write(struct file *filp, const char __user *buf, · 6 unmodified lines | ||
| 387 | 387 | for (i = 0; i < bytes_to_write; i++) { |
| 388 | 388 | rc = wait_for_bulk_out_ready(dev); |
| 389 | 389 | if (rc <= 0) { |
| 390 | − DEBUGP(5, dev, "wait_for_bulk_out_ready rc=%.2Zx\n", | |
| 390 | + DEBUGP(5, dev, "wait_for_bulk_out_ready rc=%.2zx\n", | |
| 391 | 391 | rc); |
| 392 | 392 | DEBUGP(2, dev, "<- cm4040_write (failed)\n"); |
| 393 | 393 | if (rc == -ERESTARTSYS) |
| @@ -403,7 +403,7 @@ static ssize_t cm4040_write(struct file *filp, const char __user *buf, · 9 unmodified lines | ||
| 403 | 403 | rc = write_sync_reg(SCR_HOST_TO_READER_DONE, dev); |
| 404 | 404 | |
| 405 | 405 | if (rc <= 0) { |
| 406 | − DEBUGP(5, dev, "write_sync_reg c=%.2Zx\n", rc); | |
| 406 | + DEBUGP(5, dev, "write_sync_reg c=%.2zx\n", rc); | |
| 407 | 407 | DEBUGP(2, dev, "<- cm4040_write (failed)\n"); |
| 408 | 408 | if (rc == -ERESTARTSYS) |
| 409 | 409 | return rc; |
| @@ -1,6 +1,9 @@ | ||
| 1 | 1 | /* |
| 2 | 2 | * random.c -- A strong random number generator |
| 3 | 3 | * |
| 4 | + * Copyright (C) 2017 Jason A. Donenfeld <Jason@zx2c4.com>. All | |
| 5 | + * Rights Reserved. | |
| 6 | + * | |
| 4 | 7 | * Copyright Matt Mackall <mpm@selenic.com>, 2003, 2004, 2005 |
| 5 | 8 | * |
| 6 | 9 | * Copyright Theodore Ts'o, 1994, 1995, 1996, 1997, 1998, 1999. All |
| @@ -762,6 +765,8 @@ static DECLARE_WAIT_QUEUE_HEAD(crng_init_wait); · 755 unmodified lines | ||
| 762 | 765 | static struct crng_state **crng_node_pool __read_mostly; |
| 763 | 766 | #endif |
| 764 | 767 | |
| 768 | +static void invalidate_batched_entropy(void); | |
| 769 | + | |
| 765 | 770 | static void crng_initialize(struct crng_state *crng) |
| 766 | 771 | { |
| 767 | 772 | int i; |
| @@ -799,6 +804,7 @@ static int crng_fast_load(const char *cp, size_t len) · 31 unmodified lines | ||
| 799 | 804 | cp++; crng_init_cnt++; len--; |
| 800 | 805 | } |
| 801 | 806 | if (crng_init_cnt >= CRNG_INIT_CNT_THRESH) { |
| 807 | + invalidate_batched_entropy(); | |
| 802 | 808 | crng_init = 1; |
| 803 | 809 | wake_up_interruptible(&crng_init_wait); |
| 804 | 810 | pr_notice("random: fast init done\n"); |
| @@ -836,6 +842,7 @@ static void crng_reseed(struct crng_state *crng, struct entropy_store *r) · 31 unmodified lines | ||
| 836 | 842 | memzero_explicit(&buf, sizeof(buf)); |
| 837 | 843 | crng->init_time = jiffies; |
| 838 | 844 | if (crng == &primary_crng && crng_init < 2) { |
| 845 | + invalidate_batched_entropy(); | |
| 839 | 846 | crng_init = 2; |
| 840 | 847 | process_random_ready_list(); |
| 841 | 848 | wake_up_interruptible(&crng_init_wait); |
| @@ -1097,12 +1104,16 @@ static void add_interrupt_bench(cycles_t start) · 255 unmodified lines | ||
| 1097 | 1104 | static __u32 get_reg(struct fast_pool *f, struct pt_regs *regs) |
| 1098 | 1105 | { |
| 1099 | 1106 | __u32 *ptr = (__u32 *) regs; |
| 1107 | + unsigned int idx; | |
| 1100 | 1108 | |
| 1101 | 1109 | if (regs == NULL) |
| 1102 | 1110 | return 0; |
| 1103 | − if (f->reg_idx >= sizeof(struct pt_regs) / sizeof(__u32)) | |
| 1104 | − f->reg_idx = 0; | |
| 1105 | − return *(ptr + f->reg_idx++); | |
| 1111 | + idx = READ_ONCE(f->reg_idx); | |
| 1112 | + if (idx >= sizeof(struct pt_regs) / sizeof(__u32)) | |
| 1113 | + idx = 0; | |
| 1114 | + ptr += idx++; | |
| 1115 | + WRITE_ONCE(f->reg_idx, idx); | |
| 1116 | + return *ptr; | |
| 1106 | 1117 | } |
| 1107 | 1118 | |
| 1108 | 1119 | void add_interrupt_randomness(int irq, int irq_flags) |
| @@ -2019,6 +2030,7 @@ struct batched_entropy { · 910 unmodified lines | ||
| 2019 | 2030 | }; |
| 2020 | 2031 | unsigned int position; |
| 2021 | 2032 | }; |
| 2033 | +static rwlock_t batched_entropy_reset_lock = __RW_LOCK_UNLOCKED(batched_entropy_reset_lock); | |
| 2022 | 2034 | |
| 2023 | 2035 | /* |
| 2024 | 2036 | * Get a random word for internal kernel use only. The quality of the random |
| @@ -2029,6 +2041,8 @@ static DEFINE_PER_CPU(struct batched_entropy, batched_entropy_u64); · 4 unmodified lines | ||
| 2029 | 2041 | u64 get_random_u64(void) |
| 2030 | 2042 | { |
| 2031 | 2043 | u64 ret; |
| 2044 | + bool use_lock = crng_init < 2; | |
| 2045 | + unsigned long flags; | |
| 2032 | 2046 | struct batched_entropy *batch; |
| 2033 | 2047 | |
| 2034 | 2048 | #if BITS_PER_LONG == 64 |
| @@ -2041,11 +2055,15 @@ u64 get_random_u64(void) · 6 unmodified lines | ||
| 2041 | 2055 | #endif |
| 2042 | 2056 | |
| 2043 | 2057 | batch = &get_cpu_var(batched_entropy_u64); |
| 2058 | + if (use_lock) | |
| 2059 | + read_lock_irqsave(&batched_entropy_reset_lock, flags); | |
| 2044 | 2060 | if (batch->position % ARRAY_SIZE(batch->entropy_u64) == 0) { |
| 2045 | 2061 | extract_crng((u8 *)batch->entropy_u64); |
| 2046 | 2062 | batch->position = 0; |
| 2047 | 2063 | } |
| 2048 | 2064 | ret = batch->entropy_u64[batch->position++]; |
| 2065 | + if (use_lock) | |
| 2066 | + read_unlock_irqrestore(&batched_entropy_reset_lock, flags); | |
| 2049 | 2067 | put_cpu_var(batched_entropy_u64); |
| 2050 | 2068 | return ret; |
| 2051 | 2069 | } |
| @@ -2055,22 +2073,45 @@ static DEFINE_PER_CPU(struct batched_entropy, batched_entropy_u32); · 3 unmodified lines | ||
| 2055 | 2073 | u32 get_random_u32(void) |
| 2056 | 2074 | { |
| 2057 | 2075 | u32 ret; |
| 2076 | + bool use_lock = crng_init < 2; | |
| 2077 | + unsigned long flags; | |
| 2058 | 2078 | struct batched_entropy *batch; |
| 2059 | 2079 | |
| 2060 | 2080 | if (arch_get_random_int(&ret)) |
| 2061 | 2081 | return ret; |
| 2062 | 2082 | |
| 2063 | 2083 | batch = &get_cpu_var(batched_entropy_u32); |
| 2084 | + if (use_lock) | |
| 2085 | + read_lock_irqsave(&batched_entropy_reset_lock, flags); | |
| 2064 | 2086 | if (batch->position % ARRAY_SIZE(batch->entropy_u32) == 0) { |
| 2065 | 2087 | extract_crng((u8 *)batch->entropy_u32); |
| 2066 | 2088 | batch->position = 0; |
| 2067 | 2089 | } |
| 2068 | 2090 | ret = batch->entropy_u32[batch->position++]; |
| 2091 | + if (use_lock) | |
| 2092 | + read_unlock_irqrestore(&batched_entropy_reset_lock, flags); | |
| 2069 | 2093 | put_cpu_var(batched_entropy_u32); |
| 2070 | 2094 | return ret; |
| 2071 | 2095 | } |
| 2072 | 2096 | EXPORT_SYMBOL(get_random_u32); |
| 2073 | 2097 | |
| 2098 | +/* It's important to invalidate all potential batched entropy that might | |
| 2099 | + * be stored before the crng is initialized, which we can do lazily by | |
| 2100 | + * simply resetting the counter to zero so that it's re-extracted on the | |
| 2101 | + * next usage. */ | |
| 2102 | +static void invalidate_batched_entropy(void) | |
| 2103 | +{ | |
| 2104 | + int cpu; | |
| 2105 | + unsigned long flags; | |
| 2106 | + | |
| 2107 | + write_lock_irqsave(&batched_entropy_reset_lock, flags); | |
| 2108 | + for_each_possible_cpu (cpu) { | |
| 2109 | + per_cpu_ptr(&batched_entropy_u32, cpu)->position = 0; | |
| 2110 | + per_cpu_ptr(&batched_entropy_u64, cpu)->position = 0; | |
| 2111 | + } | |
| 2112 | + write_unlock_irqrestore(&batched_entropy_reset_lock, flags); | |
| 2113 | +} | |
| 2114 | + | |
| 2074 | 2115 | /** |
| 2075 | 2116 | * randomize_page - Generate a random, page aligned address |
| 2076 | 2117 | * @start: The smallest acceptable address the caller will take. |
| @@ -2468,6 +2468,7 @@ int cpufreq_register_driver(struct cpufreq_driver *driver_data) · 2467 unmodified lines | ||
| 2468 | 2468 | if (!(cpufreq_driver->flags & CPUFREQ_STICKY) && |
| 2469 | 2469 | list_empty(&cpufreq_policy_list)) { |
| 2470 | 2470 | /* if all ->init() calls failed, unregister */ |
| 2471 | + ret = -ENODEV; | |
| 2471 | 2472 | pr_debug("%s: No CPU initialized for driver %s\n", __func__, |
| 2472 | 2473 | driver_data->name); |
| 2473 | 2474 | goto err_if_unreg; |
| @@ -185,8 +185,8 @@ static ssize_t store_down_threshold(struct gov_attr_set *attr_set, · 184 unmodified lines | ||
| 185 | 185 | int ret; |
| 186 | 186 | ret = sscanf(buf, "%u", &input); |
| 187 | 187 | |
| 188 | − /* cannot be lower than 11 otherwise freq will not fall */ | |
| 189 | − if (ret != 1 || input < 11 || input > 100 || | |
| 188 | + /* cannot be lower than 1 otherwise freq will not fall */ | |
| 189 | + if (ret != 1 || input < 1 || input > 100 || | |
| 190 | 190 | input >= dbs_data->up_threshold) |
| 191 | 191 | return -EINVAL; |
| 192 | 192 | |
| @@ -571,9 +571,10 @@ static inline void update_turbo_state(void) · 570 unmodified lines | ||
| 571 | 571 | static int min_perf_pct_min(void) |
| 572 | 572 | { |
| 573 | 573 | struct cpudata *cpu = all_cpu_data[0]; |
| 574 | + int turbo_pstate = cpu->pstate.turbo_pstate; | |
| 574 | 575 | |
| 575 | − return DIV_ROUND_UP(cpu->pstate.min_pstate * 100, | |
| 576 | − cpu->pstate.turbo_pstate); | |
| 576 | + return turbo_pstate ? | |
| 577 | + DIV_ROUND_UP(cpu->pstate.min_pstate * 100, turbo_pstate) : 0; | |
| 577 | 578 | } |
| 578 | 579 | |
| 579 | 580 | static s16 intel_pstate_get_epb(struct cpudata *cpu_data) |
| @@ -127,7 +127,12 @@ static int kirkwood_cpufreq_probe(struct platform_device *pdev) · 126 unmodified lines | ||
| 127 | 127 | return PTR_ERR(priv.cpu_clk); |
| 128 | 128 | } |
| 129 | 129 | |
| 130 | − clk_prepare_enable(priv.cpu_clk); | |
| 130 | + err = clk_prepare_enable(priv.cpu_clk); | |
| 131 | + if (err) { | |
| 132 | + dev_err(priv.dev, "Unable to prepare cpuclk\n"); | |
| 133 | + return err; | |
| 134 | + } | |
| 135 | + | |
| 131 | 136 | kirkwood_freq_table[0].frequency = clk_get_rate(priv.cpu_clk) / 1000; |
| 132 | 137 | |
| 133 | 138 | priv.ddr_clk = of_clk_get_by_name(np, "ddrclk"); |
| @@ -137,7 +142,11 @@ static int kirkwood_cpufreq_probe(struct platform_device *pdev) · 3 unmodified lines | ||
| 137 | 142 | goto out_cpu; |
| 138 | 143 | } |
| 139 | 144 | |
| 140 | − clk_prepare_enable(priv.ddr_clk); | |
| 145 | + err = clk_prepare_enable(priv.ddr_clk); | |
| 146 | + if (err) { | |
| 147 | + dev_err(priv.dev, "Unable to prepare ddrclk\n"); | |
| 148 | + goto out_cpu; | |
| 149 | + } | |
| 141 | 150 | kirkwood_freq_table[1].frequency = clk_get_rate(priv.ddr_clk) / 1000; |
| 142 | 151 | |
| 143 | 152 | priv.powersave_clk = of_clk_get_by_name(np, "powersave"); |
| @@ -146,7 +155,11 @@ static int kirkwood_cpufreq_probe(struct platform_device *pdev) · 2 unmodified lines | ||
| 146 | 155 | err = PTR_ERR(priv.powersave_clk); |
| 147 | 156 | goto out_ddr; |
| 148 | 157 | } |
| 149 | − clk_prepare_enable(priv.powersave_clk); | |
| 158 | + err = clk_prepare_enable(priv.powersave_clk); | |
| 159 | + if (err) { | |
| 160 | + dev_err(priv.dev, "Unable to prepare powersave clk\n"); | |
| 161 | + goto out_ddr; | |
| 162 | + } | |
| 150 | 163 | |
| 151 | 164 | of_node_put(np); |
| 152 | 165 | np = NULL; |
| @@ -180,8 +180,10 @@ int dt_init_idle_driver(struct cpuidle_driver *drv, · 179 unmodified lines | ||
| 180 | 180 | if (!state_node) |
| 181 | 181 | break; |
| 182 | 182 | |
| 183 | − if (!of_device_is_available(state_node)) | |
| 183 | + if (!of_device_is_available(state_node)) { | |
| 184 | + of_node_put(state_node); | |
| 184 | 185 | continue; |
| 186 | + } | |
| 185 | 187 | |
| 186 | 188 | if (!idle_state_valid(state_node, i, cpumask)) { |
| 187 | 189 | pr_warn("%s idle state not valid, bailing out\n", |
| @@ -210,9 +210,12 @@ EXPORT_SYMBOL_GPL(kill_dax); · 209 unmodified lines | ||
| 210 | 210 | static struct inode *dax_alloc_inode(struct super_block *sb) |
| 211 | 211 | { |
| 212 | 212 | struct dax_device *dax_dev; |
| 213 | + struct inode *inode; | |
| 213 | 214 | |
| 214 | 215 | dax_dev = kmem_cache_alloc(dax_cache, GFP_KERNEL); |
| 215 | − return &dax_dev->inode; | |
| 216 | + inode = &dax_dev->inode; | |
| 217 | + inode->i_rdev = 0; | |
| 218 | + return inode; | |
| 216 | 219 | } |
| 217 | 220 | |
| 218 | 221 | static struct dax_device *to_dax_dev(struct inode *inode) |
| @@ -227,7 +230,8 @@ static void dax_i_callback(struct rcu_head *head) · 8 unmodified lines | ||
| 227 | 230 | |
| 228 | 231 | kfree(dax_dev->host); |
| 229 | 232 | dax_dev->host = NULL; |
| 230 | − ida_simple_remove(&dax_minor_ida, MINOR(inode->i_rdev)); | |
| 233 | + if (inode->i_rdev) | |
| 234 | + ida_simple_remove(&dax_minor_ida, MINOR(inode->i_rdev)); | |
| 231 | 235 | kmem_cache_free(dax_cache, dax_dev); |
| 232 | 236 | } |
| 233 | 237 | |
| @@ -423,6 +427,7 @@ static void init_once(void *_dax_dev) · 189 unmodified lines | ||
| 423 | 427 | struct dax_device *dax_dev = _dax_dev; |
| 424 | 428 | struct inode *inode = &dax_dev->inode; |
| 425 | 429 | |
| 430 | + memset(dax_dev, 0, sizeof(*dax_dev)); | |
| 426 | 431 | inode_init_once(inode); |
| 427 | 432 | } |
| 428 | 433 | |
| @@ -267,7 +267,11 @@ static int exynos_nocp_probe(struct platform_device *pdev) · 266 unmodified lines | ||
| 267 | 267 | } |
| 268 | 268 | platform_set_drvdata(pdev, nocp); |
| 269 | 269 | |
| 270 | − clk_prepare_enable(nocp->clk); | |
| 270 | + ret = clk_prepare_enable(nocp->clk); | |
| 271 | + if (ret) { | |
| 272 | + dev_err(&pdev->dev, "failed to prepare ppmu clock\n"); | |
| 273 | + return ret; | |
| 274 | + } | |
| 271 | 275 | |
| 272 | 276 | pr_info("exynos-nocp: new NoC Probe device registered: %s\n", |
| 273 | 277 | dev_name(dev)); |
| @@ -44,7 +44,7 @@ struct exynos_ppmu { · 43 unmodified lines | ||
| 44 | 44 | { "ppmu-event2-"#name, PPMU_PMNCNT2 }, \ |
| 45 | 45 | { "ppmu-event3-"#name, PPMU_PMNCNT3 } |
| 46 | 46 | |
| 47 | −struct __exynos_ppmu_events { | |
| 47 | +static struct __exynos_ppmu_events { | |
| 48 | 48 | char *name; |
| 49 | 49 | int id; |
| 50 | 50 | } ppmu_events[] = { |
| @@ -648,7 +648,11 @@ static int exynos_ppmu_probe(struct platform_device *pdev) · 597 unmodified lines | ||
| 648 | 648 | dev_name(&pdev->dev), desc[i].name); |
| 649 | 649 | } |
| 650 | 650 | |
| 651 | − clk_prepare_enable(info->ppmu.clk); | |
| 651 | + ret = clk_prepare_enable(info->ppmu.clk); | |
| 652 | + if (ret) { | |
| 653 | + dev_err(&pdev->dev, "failed to prepare ppmu clock\n"); | |
| 654 | + return ret; | |
| 655 | + } | |
| 652 | 656 | |
| 653 | 657 | return 0; |
| 654 | 658 | } |
| @@ -201,6 +201,7 @@ struct ep93xx_dma_engine { · 200 unmodified lines | ||
| 201 | 201 | struct dma_device dma_dev; |
| 202 | 202 | bool m2m; |
| 203 | 203 | int (*hw_setup)(struct ep93xx_dma_chan *); |
| 204 | + void (*hw_synchronize)(struct ep93xx_dma_chan *); | |
| 204 | 205 | void (*hw_shutdown)(struct ep93xx_dma_chan *); |
| 205 | 206 | void (*hw_submit)(struct ep93xx_dma_chan *); |
| 206 | 207 | int (*hw_interrupt)(struct ep93xx_dma_chan *); |
| @@ -323,6 +324,8 @@ static int m2p_hw_setup(struct ep93xx_dma_chan *edmac) · 116 unmodified lines | ||
| 323 | 324 | | M2P_CONTROL_ENABLE; |
| 324 | 325 | m2p_set_control(edmac, control); |
| 325 | 326 | |
| 327 | + edmac->buffer = 0; | |
| 328 | + | |
| 326 | 329 | return 0; |
| 327 | 330 | } |
| 328 | 331 | |
| @@ -331,21 +334,27 @@ static inline u32 m2p_channel_state(struct ep93xx_dma_chan *edmac) · 2 unmodified lines | ||
| 331 | 334 | return (readl(edmac->regs + M2P_STATUS) >> 4) & 0x3; |
| 332 | 335 | } |
| 333 | 336 | |
| 334 | −static void m2p_hw_shutdown(struct ep93xx_dma_chan *edmac) | |
| 337 | +static void m2p_hw_synchronize(struct ep93xx_dma_chan *edmac) | |
| 335 | 338 | { |
| 339 | + unsigned long flags; | |
| 336 | 340 | u32 control; |
| 337 | 341 | |
| 342 | + spin_lock_irqsave(&edmac->lock, flags); | |
| 338 | 343 | control = readl(edmac->regs + M2P_CONTROL); |
| 339 | 344 | control &= ~(M2P_CONTROL_STALLINT | M2P_CONTROL_NFBINT); |
| 340 | 345 | m2p_set_control(edmac, control); |
| 346 | + spin_unlock_irqrestore(&edmac->lock, flags); | |
| 341 | 347 | |
| 342 | 348 | while (m2p_channel_state(edmac) >= M2P_STATE_ON) |
| 343 | − cpu_relax(); | |
| 349 | + schedule(); | |
| 350 | +} | |
| 344 | 351 | |
| 352 | +static void m2p_hw_shutdown(struct ep93xx_dma_chan *edmac) | |
| 353 | +{ | |
| 345 | 354 | m2p_set_control(edmac, 0); |
| 346 | 355 | |
| 347 | − while (m2p_channel_state(edmac) == M2P_STATE_STALL) | |
| 348 | − cpu_relax(); | |
| 356 | + while (m2p_channel_state(edmac) != M2P_STATE_IDLE) | |
| 357 | + dev_warn(chan2dev(edmac), "M2P: Not yet IDLE\n"); | |
| 349 | 358 | } |
| 350 | 359 | |
| 351 | 360 | static void m2p_fill_desc(struct ep93xx_dma_chan *edmac) |
| @@ -1160,6 +1169,26 @@ fail: · 808 unmodified lines | ||
| 1160 | 1169 | return NULL; |
| 1161 | 1170 | } |
| 1162 | 1171 | |
| 1172 | +/** | |
| 1173 | + * ep93xx_dma_synchronize - Synchronizes the termination of transfers to the | |
| 1174 | + * current context. | |
| 1175 | + * @chan: channel | |
| 1176 | + * | |
| 1177 | + * Synchronizes the DMA channel termination to the current context. When this | |
| 1178 | + * function returns it is guaranteed that all transfers for previously issued | |
| 1179 | + * descriptors have stopped and and it is safe to free the memory associated | |
| 1180 | + * with them. Furthermore it is guaranteed that all complete callback functions | |
| 1181 | + * for a previously submitted descriptor have finished running and it is safe to | |
| 1182 | + * free resources accessed from within the complete callbacks. | |
| 1183 | + */ | |
| 1184 | +static void ep93xx_dma_synchronize(struct dma_chan *chan) | |
| 1185 | +{ | |
| 1186 | + struct ep93xx_dma_chan *edmac = to_ep93xx_dma_chan(chan); | |
| 1187 | + | |
| 1188 | + if (edmac->edma->hw_synchronize) | |
| 1189 | + edmac->edma->hw_synchronize(edmac); | |
| 1190 | +} | |
| 1191 | + | |
| 1163 | 1192 | /** |
| 1164 | 1193 | * ep93xx_dma_terminate_all - terminate all transactions |
| 1165 | 1194 | * @chan: channel |
| @@ -1323,6 +1352,7 @@ static int __init ep93xx_dma_probe(struct platform_device *pdev) · 157 unmodified lines | ||
| 1323 | 1352 | dma_dev->device_prep_slave_sg = ep93xx_dma_prep_slave_sg; |
| 1324 | 1353 | dma_dev->device_prep_dma_cyclic = ep93xx_dma_prep_dma_cyclic; |
| 1325 | 1354 | dma_dev->device_config = ep93xx_dma_slave_config; |
| 1355 | + dma_dev->device_synchronize = ep93xx_dma_synchronize; | |
| 1326 | 1356 | dma_dev->device_terminate_all = ep93xx_dma_terminate_all; |
| 1327 | 1357 | dma_dev->device_issue_pending = ep93xx_dma_issue_pending; |
| 1328 | 1358 | dma_dev->device_tx_status = ep93xx_dma_tx_status; |
| @@ -1340,6 +1370,7 @@ static int __init ep93xx_dma_probe(struct platform_device *pdev) · 11 unmodified lines | ||
| 1340 | 1370 | } else { |
| 1341 | 1371 | dma_cap_set(DMA_PRIVATE, dma_dev->cap_mask); |
| 1342 | 1372 | |
| 1373 | + edma->hw_synchronize = m2p_hw_synchronize; | |
| 1343 | 1374 | edma->hw_setup = m2p_hw_setup; |
| 1344 | 1375 | edma->hw_shutdown = m2p_hw_shutdown; |
| 1345 | 1376 | edma->hw_submit = m2p_hw_submit; |
| @@ -161,6 +161,7 @@ struct mv_xor_v2_device { · 160 unmodified lines | ||
| 161 | 161 | struct mv_xor_v2_sw_desc *sw_desq; |
| 162 | 162 | int desc_size; |
| 163 | 163 | unsigned int npendings; |
| 164 | + unsigned int hw_queue_idx; | |
| 164 | 165 | }; |
| 165 | 166 | |
| 166 | 167 | /** |
| @@ -213,18 +214,6 @@ static void mv_xor_v2_set_data_buffers(struct mv_xor_v2_device *xor_dev, · 46 unmodified lines | ||
| 213 | 214 | } |
| 214 | 215 | } |
| 215 | 216 | |
| 216 | −/* | |
| 217 | − * Return the next available index in the DESQ. | |
| 218 | − */ | |
| 219 | −static int mv_xor_v2_get_desq_write_ptr(struct mv_xor_v2_device *xor_dev) | |
| 220 | −{ | |
| 221 | − /* read the index for the next available descriptor in the DESQ */ | |
| 222 | − u32 reg = readl(xor_dev->dma_base + MV_XOR_V2_DMA_DESQ_ALLOC_OFF); | |
| 223 | − | |
| 224 | − return ((reg >> MV_XOR_V2_DMA_DESQ_ALLOC_WRPTR_SHIFT) | |
| 225 | − & MV_XOR_V2_DMA_DESQ_ALLOC_WRPTR_MASK); | |
| 226 | −} | |
| 227 | − | |
| 228 | 217 | /* |
| 229 | 218 | * notify the engine of new descriptors, and update the available index. |
| 230 | 219 | */ |
| @@ -257,22 +246,6 @@ static int mv_xor_v2_set_desc_size(struct mv_xor_v2_device *xor_dev) · 26 unmodified lines | ||
| 257 | 246 | return MV_XOR_V2_EXT_DESC_SIZE; |
| 258 | 247 | } |
| 259 | 248 | |
| 260 | −/* | |
| 261 | − * Set the IMSG threshold | |
| 262 | − */ | |
| 263 | −static inline | |
| 264 | −void mv_xor_v2_set_imsg_thrd(struct mv_xor_v2_device *xor_dev, int thrd_val) | |
| 265 | −{ | |
| 266 | − u32 reg; | |
| 267 | − | |
| 268 | − reg = readl(xor_dev->dma_base + MV_XOR_V2_DMA_IMSG_THRD_OFF); | |
| 269 | − | |
| 270 | − reg &= (~MV_XOR_V2_DMA_IMSG_THRD_MASK << MV_XOR_V2_DMA_IMSG_THRD_SHIFT); | |
| 271 | − reg |= (thrd_val << MV_XOR_V2_DMA_IMSG_THRD_SHIFT); | |
| 272 | − | |
| 273 | − writel(reg, xor_dev->dma_base + MV_XOR_V2_DMA_IMSG_THRD_OFF); | |
| 274 | −} | |
| 275 | − | |
| 276 | 249 | static irqreturn_t mv_xor_v2_interrupt_handler(int irq, void *data) |
| 277 | 250 | { |
| 278 | 251 | struct mv_xor_v2_device *xor_dev = data; |
| @@ -288,12 +261,6 @@ static irqreturn_t mv_xor_v2_interrupt_handler(int irq, void *data) · 9 unmodified lines | ||
| 288 | 261 | if (!ndescs) |
| 289 | 262 | return IRQ_NONE; |
| 290 | 263 | |
| 291 | − /* | |
| 292 | − * Update IMSG threshold, to disable new IMSG interrupts until | |
| 293 | − * end of the tasklet | |
| 294 | − */ | |
| 295 | − mv_xor_v2_set_imsg_thrd(xor_dev, MV_XOR_V2_DESC_NUM); | |
| 296 | − | |
| 297 | 264 | /* schedule a tasklet to handle descriptors callbacks */ |
| 298 | 265 | tasklet_schedule(&xor_dev->irq_tasklet); |
| 299 | 266 | |
| @@ -306,7 +273,6 @@ static irqreturn_t mv_xor_v2_interrupt_handler(int irq, void *data) · 6 unmodified lines | ||
| 306 | 273 | static dma_cookie_t |
| 307 | 274 | mv_xor_v2_tx_submit(struct dma_async_tx_descriptor *tx) |
| 308 | 275 | { |
| 309 | − int desq_ptr; | |
| 310 | 276 | void *dest_hw_desc; |
| 311 | 277 | dma_cookie_t cookie; |
| 312 | 278 | struct mv_xor_v2_sw_desc *sw_desc = |
| @@ -322,15 +288,15 @@ mv_xor_v2_tx_submit(struct dma_async_tx_descriptor *tx) · 9 unmodified lines | ||
| 322 | 288 | spin_lock_bh(&xor_dev->lock); |
| 323 | 289 | cookie = dma_cookie_assign(tx); |
| 324 | 290 | |
| 325 | − /* get the next available slot in the DESQ */ | |
| 326 | − desq_ptr = mv_xor_v2_get_desq_write_ptr(xor_dev); | |
| 327 | − | |
| 328 | 291 | /* copy the HW descriptor from the SW descriptor to the DESQ */ |
| 329 | − dest_hw_desc = xor_dev->hw_desq_virt + desq_ptr; | |
| 292 | + dest_hw_desc = xor_dev->hw_desq_virt + xor_dev->hw_queue_idx; | |
| 330 | 293 | |
| 331 | 294 | memcpy(dest_hw_desc, &sw_desc->hw_desc, xor_dev->desc_size); |
| 332 | 295 | |
| 333 | 296 | xor_dev->npendings++; |
| 297 | + xor_dev->hw_queue_idx++; | |
| 298 | + if (xor_dev->hw_queue_idx >= MV_XOR_V2_DESC_NUM) | |
| 299 | + xor_dev->hw_queue_idx = 0; | |
| 334 | 300 | |
| 335 | 301 | spin_unlock_bh(&xor_dev->lock); |
| 336 | 302 | |
| @@ -344,6 +310,7 @@ static struct mv_xor_v2_sw_desc * · 7 unmodified lines | ||
| 344 | 310 | mv_xor_v2_prep_sw_desc(struct mv_xor_v2_device *xor_dev) |
| 345 | 311 | { |
| 346 | 312 | struct mv_xor_v2_sw_desc *sw_desc; |
| 313 | + bool found = false; | |
| 347 | 314 | |
| 348 | 315 | /* Lock the channel */ |
| 349 | 316 | spin_lock_bh(&xor_dev->lock); |
| @@ -355,19 +322,23 @@ mv_xor_v2_prep_sw_desc(struct mv_xor_v2_device *xor_dev) · 5 unmodified lines | ||
| 355 | 322 | return NULL; |
| 356 | 323 | } |
| 357 | 324 | |
| 358 | − /* get a free SW descriptor from the SW DESQ */ | |
| 359 | − sw_desc = list_first_entry(&xor_dev->free_sw_desc, | |
| 360 | − struct mv_xor_v2_sw_desc, free_list); | |
| 325 | + list_for_each_entry(sw_desc, &xor_dev->free_sw_desc, free_list) { | |
| 326 | + if (async_tx_test_ack(&sw_desc->async_tx)) { | |
| 327 | + found = true; | |
| 328 | + break; | |
| 329 | + } | |
| 330 | + } | |
| 331 | + | |
| 332 | + if (!found) { | |
| 333 | + spin_unlock_bh(&xor_dev->lock); | |
| 334 | + return NULL; | |
| 335 | + } | |
| 336 | + | |
| 361 | 337 | list_del(&sw_desc->free_list); |
| 362 | 338 | |
| 363 | 339 | /* Release the channel */ |
| 364 | 340 | spin_unlock_bh(&xor_dev->lock); |
| 365 | 341 | |
| 366 | − /* set the async tx descriptor */ | |
| 367 | − dma_async_tx_descriptor_init(&sw_desc->async_tx, &xor_dev->dmachan); | |
| 368 | − sw_desc->async_tx.tx_submit = mv_xor_v2_tx_submit; | |
| 369 | − async_tx_ack(&sw_desc->async_tx); | |
| 370 | − | |
| 371 | 342 | return sw_desc; |
| 372 | 343 | } |
| 373 | 344 | |
| @@ -389,6 +360,8 @@ mv_xor_v2_prep_dma_memcpy(struct dma_chan *chan, dma_addr_t dest, · 15 unmodified lines | ||
| 389 | 360 | __func__, len, &src, &dest, flags); |
| 390 | 361 | |
| 391 | 362 | sw_desc = mv_xor_v2_prep_sw_desc(xor_dev); |
| 363 | + if (!sw_desc) | |
| 364 | + return NULL; | |
| 392 | 365 | |
| 393 | 366 | sw_desc->async_tx.flags = flags; |
| 394 | 367 | |
| @@ -443,6 +416,8 @@ mv_xor_v2_prep_dma_xor(struct dma_chan *chan, dma_addr_t dest, dma_addr_t *src, · 48 unmodified lines | ||
| 443 | 416 | __func__, src_cnt, len, &dest, flags); |
| 444 | 417 | |
| 445 | 418 | sw_desc = mv_xor_v2_prep_sw_desc(xor_dev); |
| 419 | + if (!sw_desc) | |
| 420 | + return NULL; | |
| 446 | 421 | |
| 447 | 422 | sw_desc->async_tx.flags = flags; |
| 448 | 423 | |
| @@ -491,6 +466,8 @@ mv_xor_v2_prep_dma_interrupt(struct dma_chan *chan, unsigned long flags) · 42 unmodified lines | ||
| 491 | 466 | container_of(chan, struct mv_xor_v2_device, dmachan); |
| 492 | 467 | |
| 493 | 468 | sw_desc = mv_xor_v2_prep_sw_desc(xor_dev); |
| 469 | + if (!sw_desc) | |
| 470 | + return NULL; | |
| 494 | 471 | |
| 495 | 472 | /* set the HW descriptor */ |
| 496 | 473 | hw_descriptor = &sw_desc->hw_desc; |
| @@ -554,7 +531,6 @@ static void mv_xor_v2_tasklet(unsigned long data) · 57 unmodified lines | ||
| 554 | 531 | { |
| 555 | 532 | struct mv_xor_v2_device *xor_dev = (struct mv_xor_v2_device *) data; |
| 556 | 533 | int pending_ptr, num_of_pending, i; |
| 557 | − struct mv_xor_v2_descriptor *next_pending_hw_desc = NULL; | |
| 558 | 534 | struct mv_xor_v2_sw_desc *next_pending_sw_desc = NULL; |
| 559 | 535 | |
| 560 | 536 | dev_dbg(xor_dev->dmadev.dev, "%s %d\n", __func__, __LINE__); |
| @@ -562,17 +538,10 @@ static void mv_xor_v2_tasklet(unsigned long data) · 1 unmodified line | ||
| 562 | 538 | /* get the pending descriptors parameters */ |
| 563 | 539 | num_of_pending = mv_xor_v2_get_pending_params(xor_dev, &pending_ptr); |
| 564 | 540 | |
| 565 | − /* next HW descriptor */ | |
| 566 | − next_pending_hw_desc = xor_dev->hw_desq_virt + pending_ptr; | |
| 567 | − | |
| 568 | 541 | /* loop over free descriptors */ |
| 569 | 542 | for (i = 0; i < num_of_pending; i++) { |
| 570 | − | |
| 571 | − if (pending_ptr > MV_XOR_V2_DESC_NUM) | |
| 572 | − pending_ptr = 0; | |
| 573 | − | |
| 574 | − if (next_pending_sw_desc != NULL) | |
| 575 | − next_pending_hw_desc++; | |
| 543 | + struct mv_xor_v2_descriptor *next_pending_hw_desc = | |
| 544 | + xor_dev->hw_desq_virt + pending_ptr; | |
| 576 | 545 | |
| 577 | 546 | /* get the SW descriptor related to the HW descriptor */ |
| 578 | 547 | next_pending_sw_desc = |
| @@ -608,15 +577,14 @@ static void mv_xor_v2_tasklet(unsigned long data) · 29 unmodified lines | ||
| 608 | 577 | |
| 609 | 578 | /* increment the next descriptor */ |
| 610 | 579 | pending_ptr++; |
| 580 | + if (pending_ptr >= MV_XOR_V2_DESC_NUM) | |
| 581 | + pending_ptr = 0; | |
| 611 | 582 | } |
| 612 | 583 | |
| 613 | 584 | if (num_of_pending != 0) { |
| 614 | 585 | /* free the descriptores */ |
| 615 | 586 | mv_xor_v2_free_desc_from_desq(xor_dev, num_of_pending); |
| 616 | 587 | } |
| 617 | − | |
| 618 | − /* Update IMSG threshold, to enable new IMSG interrupts */ | |
| 619 | − mv_xor_v2_set_imsg_thrd(xor_dev, 0); | |
| 620 | 588 | } |
| 621 | 589 | |
| 622 | 590 | /* |
| @@ -648,9 +616,6 @@ static int mv_xor_v2_descq_init(struct mv_xor_v2_device *xor_dev) · 25 unmodified lines | ||
| 648 | 616 | writel((xor_dev->hw_desq & 0xFFFF00000000) >> 32, |
| 649 | 617 | xor_dev->dma_base + MV_XOR_V2_DMA_DESQ_BAHR_OFF); |
| 650 | 618 | |
| 651 | − /* enable the DMA engine */ | |
| 652 | − writel(0, xor_dev->dma_base + MV_XOR_V2_DMA_DESQ_STOP_OFF); | |
| 653 | − | |
| 654 | 619 | /* |
| 655 | 620 | * This is a temporary solution, until we activate the |
| 656 | 621 | * SMMU. Set the attributes for reading & writing data buffers |
| @@ -694,6 +659,9 @@ static int mv_xor_v2_descq_init(struct mv_xor_v2_device *xor_dev) · 37 unmodified lines | ||
| 694 | 659 | reg |= MV_XOR_V2_GLOB_PAUSE_AXI_TIME_DIS_VAL; |
| 695 | 660 | writel(reg, xor_dev->glob_base + MV_XOR_V2_GLOB_PAUSE); |
| 696 | 661 | |
| 662 | + /* enable the DMA engine */ | |
| 663 | + writel(0, xor_dev->dma_base + MV_XOR_V2_DMA_DESQ_STOP_OFF); | |
| 664 | + | |
| 697 | 665 | return 0; |
| 698 | 666 | } |
| 699 | 667 | |
| @@ -725,6 +693,10 @@ static int mv_xor_v2_probe(struct platform_device *pdev) · 25 unmodified lines | ||
| 725 | 693 | |
| 726 | 694 | platform_set_drvdata(pdev, xor_dev); |
| 727 | 695 | |
| 696 | + ret = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(40)); | |
| 697 | + if (ret) | |
| 698 | + return ret; | |
| 699 | + | |
| 728 | 700 | xor_dev->clk = devm_clk_get(&pdev->dev, NULL); |
| 729 | 701 | if (IS_ERR(xor_dev->clk) && PTR_ERR(xor_dev->clk) == -EPROBE_DEFER) |
| 730 | 702 | return -EPROBE_DEFER; |
| @@ -785,8 +757,15 @@ static int mv_xor_v2_probe(struct platform_device *pdev) · 54 unmodified lines | ||
| 785 | 757 | |
| 786 | 758 | /* add all SW descriptors to the free list */ |
| 787 | 759 | for (i = 0; i < MV_XOR_V2_DESC_NUM; i++) { |
| 788 | − xor_dev->sw_desq[i].idx = i; | |
| 789 | − list_add(&xor_dev->sw_desq[i].free_list, | |
| 760 | + struct mv_xor_v2_sw_desc *sw_desc = | |
| 761 | + xor_dev->sw_desq + i; | |
| 762 | + sw_desc->idx = i; | |
| 763 | + dma_async_tx_descriptor_init(&sw_desc->async_tx, | |
| 764 | + &xor_dev->dmachan); | |
| 765 | + sw_desc->async_tx.tx_submit = mv_xor_v2_tx_submit; | |
| 766 | + async_tx_ack(&sw_desc->async_tx); | |
| 767 | + | |
| 768 | + list_add(&sw_desc->free_list, | |
| 790 | 769 | &xor_dev->free_sw_desc); |
| 791 | 770 | } |
| 792 | 771 | |
| @@ -3008,7 +3008,8 @@ static int pl330_remove(struct amba_device *adev) · 3007 unmodified lines | ||
| 3008 | 3008 | |
| 3009 | 3009 | for (i = 0; i < AMBA_NR_IRQS; i++) { |
| 3010 | 3010 | irq = adev->irq[i]; |
| 3011 | − devm_free_irq(&adev->dev, irq, pl330); | |
| 3011 | + if (irq) | |
| 3012 | + devm_free_irq(&adev->dev, irq, pl330); | |
| 3012 | 3013 | } |
| 3013 | 3014 | |
| 3014 | 3015 | dma_async_device_unregister(&pl330->ddma); |
| @@ -1287,6 +1287,9 @@ static unsigned int rcar_dmac_chan_get_residue(struct rcar_dmac_chan *chan, · 1286 unmodified lines | ||
| 1287 | 1287 | if (desc->hwdescs.use) { |
| 1288 | 1288 | dptr = (rcar_dmac_chan_read(chan, RCAR_DMACHCRB) & |
| 1289 | 1289 | RCAR_DMACHCRB_DPTR_MASK) >> RCAR_DMACHCRB_DPTR_SHIFT; |
| 1290 | + if (dptr == 0) | |
| 1291 | + dptr = desc->nchunks; | |
| 1292 | + dptr--; | |
| 1290 | 1293 | WARN_ON(dptr >= desc->nchunks); |
| 1291 | 1294 | } else { |
| 1292 | 1295 | running = desc->running; |
| @@ -117,7 +117,7 @@ struct usb_dmac { · 116 unmodified lines | ||
| 117 | 117 | #define USB_DMASWR 0x0008 |
| 118 | 118 | #define USB_DMASWR_SWR (1 << 0) |
| 119 | 119 | #define USB_DMAOR 0x0060 |
| 120 | −#define USB_DMAOR_AE (1 << 2) | |
| 120 | +#define USB_DMAOR_AE (1 << 1) | |
| 121 | 121 | #define USB_DMAOR_DME (1 << 0) |
| 122 | 122 | |
| 123 | 123 | #define USB_DMASAR 0x0000 |
| @@ -47,6 +47,7 @@ DEFINE_DMI_ATTR_WITH_SHOW(product_name, 0444, DMI_PRODUCT_NAME); · 46 unmodified lines | ||
| 47 | 47 | DEFINE_DMI_ATTR_WITH_SHOW(product_version, 0444, DMI_PRODUCT_VERSION); |
| 48 | 48 | DEFINE_DMI_ATTR_WITH_SHOW(product_serial, 0400, DMI_PRODUCT_SERIAL); |
| 49 | 49 | DEFINE_DMI_ATTR_WITH_SHOW(product_uuid, 0400, DMI_PRODUCT_UUID); |
| 50 | +DEFINE_DMI_ATTR_WITH_SHOW(product_family, 0444, DMI_PRODUCT_FAMILY); | |
| 50 | 51 | DEFINE_DMI_ATTR_WITH_SHOW(board_vendor, 0444, DMI_BOARD_VENDOR); |
| 51 | 52 | DEFINE_DMI_ATTR_WITH_SHOW(board_name, 0444, DMI_BOARD_NAME); |
| 52 | 53 | DEFINE_DMI_ATTR_WITH_SHOW(board_version, 0444, DMI_BOARD_VERSION); |
| @@ -191,6 +192,7 @@ static void __init dmi_id_init_attr_table(void) · 138 unmodified lines | ||
| 191 | 192 | ADD_DMI_ATTR(product_version, DMI_PRODUCT_VERSION); |
| 192 | 193 | ADD_DMI_ATTR(product_serial, DMI_PRODUCT_SERIAL); |
| 193 | 194 | ADD_DMI_ATTR(product_uuid, DMI_PRODUCT_UUID); |
| 195 | + ADD_DMI_ATTR(product_family, DMI_PRODUCT_FAMILY); | |
| 194 | 196 | ADD_DMI_ATTR(board_vendor, DMI_BOARD_VENDOR); |
| 195 | 197 | ADD_DMI_ATTR(board_name, DMI_BOARD_NAME); |
| 196 | 198 | ADD_DMI_ATTR(board_version, DMI_BOARD_VERSION); |
| @@ -144,7 +144,7 @@ static int __init dmi_walk_early(void (*decode)(const struct dmi_header *, · 143 unmodified lines | ||
| 144 | 144 | |
| 145 | 145 | buf = dmi_early_remap(dmi_base, orig_dmi_len); |
| 146 | 146 | if (buf == NULL) |
| 147 | − return -1; | |
| 147 | + return -ENOMEM; | |
| 148 | 148 | |
| 149 | 149 | dmi_decode_table(buf, decode, NULL); |
| 150 | 150 | |
| @@ -178,7 +178,7 @@ static void __init dmi_save_ident(const struct dmi_header *dm, int slot, · 27 unmodified lines | ||
| 178 | 178 | const char *d = (const char *) dm; |
| 179 | 179 | const char *p; |
| 180 | 180 | |
| 181 | − if (dmi_ident[slot]) | |
| 181 | + if (dmi_ident[slot] || dm->length <= string) | |
| 182 | 182 | return; |
| 183 | 183 | |
| 184 | 184 | p = dmi_string(dm, d[string]); |
| @@ -191,13 +191,14 @@ static void __init dmi_save_ident(const struct dmi_header *dm, int slot, · 6 unmodified lines | ||
| 191 | 191 | static void __init dmi_save_uuid(const struct dmi_header *dm, int slot, |
| 192 | 192 | int index) |
| 193 | 193 | { |
| 194 | − const u8 *d = (u8 *) dm + index; | |
| 194 | + const u8 *d; | |
| 195 | 195 | char *s; |
| 196 | 196 | int is_ff = 1, is_00 = 1, i; |
| 197 | 197 | |
| 198 | − if (dmi_ident[slot]) | |
| 198 | + if (dmi_ident[slot] || dm->length <= index + 16) | |
| 199 | 199 | return; |
| 200 | 200 | |
| 201 | + d = (u8 *) dm + index; | |
| 201 | 202 | for (i = 0; i < 16 && (is_ff || is_00); i++) { |
| 202 | 203 | if (d[i] != 0x00) |
| 203 | 204 | is_00 = 0; |
| @@ -228,16 +229,17 @@ static void __init dmi_save_uuid(const struct dmi_header *dm, int slot, · 24 unmodified lines | ||
| 228 | 229 | static void __init dmi_save_type(const struct dmi_header *dm, int slot, |
| 229 | 230 | int index) |
| 230 | 231 | { |
| 231 | − const u8 *d = (u8 *) dm + index; | |
| 232 | + const u8 *d; | |
| 232 | 233 | char *s; |
| 233 | 234 | |
| 234 | − if (dmi_ident[slot]) | |
| 235 | + if (dmi_ident[slot] || dm->length <= index) | |
| 235 | 236 | return; |
| 236 | 237 | |
| 237 | 238 | s = dmi_alloc(4); |
| 238 | 239 | if (!s) |
| 239 | 240 | return; |
| 240 | 241 | |
| 242 | + d = (u8 *) dm + index; | |
| 241 | 243 | sprintf(s, "%u", *d & 0x7F); |
| 242 | 244 | dmi_ident[slot] = s; |
| 243 | 245 | } |
| @@ -278,9 +280,13 @@ static void __init dmi_save_devices(const struct dmi_header *dm) · 34 unmodified lines | ||
| 278 | 280 | |
| 279 | 281 | static void __init dmi_save_oem_strings_devices(const struct dmi_header *dm) |
| 280 | 282 | { |
| 281 | − int i, count = *(u8 *)(dm + 1); | |
| 283 | + int i, count; | |
| 282 | 284 | struct dmi_device *dev; |
| 283 | 285 | |
| 286 | + if (dm->length < 0x05) | |
| 287 | + return; | |
| 288 | + | |
| 289 | + count = *(u8 *)(dm + 1); | |
| 284 | 290 | for (i = 1; i <= count; i++) { |
| 285 | 291 | const char *devname = dmi_string(dm, i); |
| 286 | 292 | |
| @@ -353,6 +359,9 @@ static void __init dmi_save_extended_devices(const struct dmi_header *dm) · 66 unmodified lines | ||
| 353 | 359 | const char *name; |
| 354 | 360 | const u8 *d = (u8 *)dm; |
| 355 | 361 | |
| 362 | + if (dm->length < 0x0B) | |
| 363 | + return; | |
| 364 | + | |
| 356 | 365 | /* Skip disabled device */ |
| 357 | 366 | if ((d[0x5] & 0x80) == 0) |
| 358 | 367 | return; |
| @@ -387,7 +396,7 @@ static void __init save_mem_devices(const struct dmi_header *dm, void *v) · 28 unmodified lines | ||
| 387 | 396 | const char *d = (const char *)dm; |
| 388 | 397 | static int nr; |
| 389 | 398 | |
| 390 | − if (dm->type != DMI_ENTRY_MEM_DEVICE) | |
| 399 | + if (dm->type != DMI_ENTRY_MEM_DEVICE || dm->length < 0x12) | |
| 391 | 400 | return; |
| 392 | 401 | if (nr >= dmi_memdev_nr) { |
| 393 | 402 | pr_warn(FW_BUG "Too many DIMM entries in SMBIOS table\n"); |
| @@ -430,6 +439,7 @@ static void __init dmi_decode(const struct dmi_header *dm, void *dummy) · 36 unmodified lines | ||
| 430 | 439 | dmi_save_ident(dm, DMI_PRODUCT_VERSION, 6); |
| 431 | 440 | dmi_save_ident(dm, DMI_PRODUCT_SERIAL, 7); |
| 432 | 441 | dmi_save_uuid(dm, DMI_PRODUCT_UUID, 8); |
| 442 | + dmi_save_ident(dm, DMI_PRODUCT_FAMILY, 26); | |
| 433 | 443 | break; |
| 434 | 444 | case 2: /* Base Board Information */ |
| 435 | 445 | dmi_save_ident(dm, DMI_BOARD_VENDOR, 4); |
| @@ -648,6 +658,21 @@ void __init dmi_scan_machine(void) · 212 unmodified lines | ||
| 648 | 658 | if (p == NULL) |
| 649 | 659 | goto error; |
| 650 | 660 | |
| 661 | + /* | |
| 662 | + * Same logic as above, look for a 64-bit entry point | |
| 663 | + * first, and if not found, fall back to 32-bit entry point. | |
| 664 | + */ | |
| 665 | + memcpy_fromio(buf, p, 16); | |
| 666 | + for (q = p + 16; q < p + 0x10000; q += 16) { | |
| 667 | + memcpy_fromio(buf + 16, q, 16); | |
| 668 | + if (!dmi_smbios3_present(buf)) { | |
| 669 | + dmi_available = 1; | |
| 670 | + dmi_early_unmap(p, 0x10000); | |
| 671 | + goto out; | |
| 672 | + } | |
| 673 | + memcpy(buf, buf + 16, 16); | |
| 674 | + } | |
| 675 | + | |
| 651 | 676 | /* |
| 652 | 677 | * Iterate over all possible DMI header addresses q. |
| 653 | 678 | * Maintain the 32 bytes around q in buf. On the |
| @@ -658,7 +683,7 @@ void __init dmi_scan_machine(void) · 4 unmodified lines | ||
| 658 | 683 | memset(buf, 0, 16); |
| 659 | 684 | for (q = p; q < p + 0x10000; q += 16) { |
| 660 | 685 | memcpy_fromio(buf + 16, q, 16); |
| 661 | − if (!dmi_smbios3_present(buf) || !dmi_present(buf)) { | |
| 686 | + if (!dmi_present(buf)) { | |
| 662 | 687 | dmi_available = 1; |
| 663 | 688 | dmi_early_unmap(p, 0x10000); |
| 664 | 689 | goto out; |
| @@ -992,7 +1017,8 @@ EXPORT_SYMBOL(dmi_get_date); · 327 unmodified lines | ||
| 992 | 1017 | * @decode: Callback function |
| 993 | 1018 | * @private_data: Private data to be passed to the callback function |
| 994 | 1019 | * |
| 995 | − * Returns -1 when the DMI table can't be reached, 0 on success. | |
| 1020 | + * Returns 0 on success, -ENXIO if DMI is not selected or not present, | |
| 1021 | + * or a different negative error code if DMI walking fails. | |
| 996 | 1022 | */ |
| 997 | 1023 | int dmi_walk(void (*decode)(const struct dmi_header *, void *), |
| 998 | 1024 | void *private_data) |
| @@ -1000,11 +1026,11 @@ int dmi_walk(void (*decode)(const struct dmi_header *, void *), · 1 unmodified line | ||
| 1000 | 1026 | u8 *buf; |
| 1001 | 1027 | |
| 1002 | 1028 | if (!dmi_available) |
| 1003 | − return -1; | |
| 1029 | + return -ENXIO; | |
| 1004 | 1030 | |
| 1005 | 1031 | buf = dmi_remap(dmi_base, dmi_len); |
| 1006 | 1032 | if (buf == NULL) |
| 1007 | − return -1; | |
| 1033 | + return -ENOMEM; | |
| 1008 | 1034 | |
| 1009 | 1035 | dmi_decode_table(buf, decode, private_data); |
| 1010 | 1036 | |
| @@ -27,6 +27,26 @@ struct bmp_header { · 26 unmodified lines | ||
| 27 | 27 | u32 size; |
| 28 | 28 | } __packed; |
| 29 | 29 | |
| 30 | +static bool efi_bgrt_addr_valid(u64 addr) | |
| 31 | +{ | |
| 32 | + efi_memory_desc_t *md; | |
| 33 | + | |
| 34 | + for_each_efi_memory_desc(md) { | |
| 35 | + u64 size; | |
| 36 | + u64 end; | |
| 37 | + | |
| 38 | + if (md->type != EFI_BOOT_SERVICES_DATA) | |
| 39 | + continue; | |
| 40 | + | |
| 41 | + size = md->num_pages << EFI_PAGE_SHIFT; | |
| 42 | + end = md->phys_addr + size; | |
| 43 | + if (addr >= md->phys_addr && addr < end) | |
| 44 | + return true; | |
| 45 | + } | |
| 46 | + | |
| 47 | + return false; | |
| 48 | +} | |
| 49 | + | |
| 30 | 50 | void __init efi_bgrt_init(struct acpi_table_header *table) |
| 31 | 51 | { |
| 32 | 52 | void *image; |
| @@ -36,6 +56,9 @@ void __init efi_bgrt_init(struct acpi_table_header *table) · 3 unmodified lines | ||
| 36 | 56 | if (acpi_disabled) |
| 37 | 57 | return; |
| 38 | 58 | |
| 59 | + if (!efi_enabled(EFI_MEMMAP)) | |
| 60 | + return; | |
| 61 | + | |
| 39 | 62 | if (table->length < sizeof(bgrt_tab)) { |
| 40 | 63 | pr_notice("Ignoring BGRT: invalid length %u (expected %zu)\n", |
| 41 | 64 | table->length, sizeof(bgrt_tab)); |
| @@ -62,6 +85,10 @@ void __init efi_bgrt_init(struct acpi_table_header *table) · 20 unmodified lines | ||
| 62 | 85 | goto out; |
| 63 | 86 | } |
| 64 | 87 | |
| 88 | + if (!efi_bgrt_addr_valid(bgrt->image_address)) { | |
| 89 | + pr_notice("Ignoring BGRT: invalid image address\n"); | |
| 90 | + goto out; | |
| 91 | + } | |
| 65 | 92 | image = early_memremap(bgrt->image_address, sizeof(bmp_header)); |
| 66 | 93 | if (!image) { |
| 67 | 94 | pr_notice("Ignoring BGRT: failed to map image header memory\n"); |
| @@ -16,10 +16,10 @@ · 15 unmodified lines | ||
| 16 | 16 | |
| 17 | 17 | /* BIOS variables */ |
| 18 | 18 | static const efi_guid_t efi_variable_guid = EFI_GLOBAL_VARIABLE_GUID; |
| 19 | −static const efi_char16_t const efi_SecureBoot_name[] = { | |
| 19 | +static const efi_char16_t efi_SecureBoot_name[] = { | |
| 20 | 20 | 'S', 'e', 'c', 'u', 'r', 'e', 'B', 'o', 'o', 't', 0 |
| 21 | 21 | }; |
| 22 | −static const efi_char16_t const efi_SetupMode_name[] = { | |
| 22 | +static const efi_char16_t efi_SetupMode_name[] = { | |
| 23 | 23 | 'S', 'e', 't', 'u', 'p', 'M', 'o', 'd', 'e', 0 |
| 24 | 24 | }; |
| 25 | 25 | |
| @@ -136,12 +136,12 @@ static int vpd_section_attrib_add(const u8 *key, s32 key_len, · 135 unmodified lines | ||
| 136 | 136 | info->value = value; |
| 137 | 137 | |
| 138 | 138 | INIT_LIST_HEAD(&info->list); |
| 139 | − list_add_tail(&info->list, &sec->attribs); | |
| 140 | 139 | |
| 141 | 140 | ret = sysfs_create_bin_file(sec->kobj, &info->bin_attr); |
| 142 | 141 | if (ret) |
| 143 | 142 | goto free_info_key; |
| 144 | 143 | |
| 144 | + list_add_tail(&info->list, &sec->attribs); | |
| 145 | 145 | return 0; |
| 146 | 146 | |
| 147 | 147 | free_info_key: |
| @@ -158,8 +158,8 @@ static void vpd_section_attrib_destroy(struct vpd_section *sec) · 10 unmodified lines | ||
| 158 | 158 | struct vpd_attrib_info *temp; |
| 159 | 159 | |
| 160 | 160 | list_for_each_entry_safe(info, temp, &sec->attribs, list) { |
| 161 | − kfree(info->key); | |
| 162 | 161 | sysfs_remove_bin_file(sec->kobj, &info->bin_attr); |
| 162 | + kfree(info->key); | |
| 163 | 163 | kfree(info); |
| 164 | 164 | } |
| 165 | 165 | } |
| @@ -244,7 +244,7 @@ static int vpd_section_destroy(struct vpd_section *sec) · 78 unmodified lines | ||
| 244 | 244 | { |
| 245 | 245 | if (sec->enabled) { |
| 246 | 246 | vpd_section_attrib_destroy(sec); |
| 247 | − kobject_del(sec->kobj); | |
| 247 | + kobject_put(sec->kobj); | |
| 248 | 248 | sysfs_remove_bin_file(vpd_kobj, &sec->bin_attr); |
| 249 | 249 | kfree(sec->raw_name); |
| 250 | 250 | iounmap(sec->baseaddr); |
| @@ -331,7 +331,7 @@ static void __exit vpd_platform_exit(void) · 80 unmodified lines | ||
| 331 | 331 | { |
| 332 | 332 | vpd_section_destroy(&ro_vpd); |
| 333 | 333 | vpd_section_destroy(&rw_vpd); |
| 334 | − kobject_del(vpd_kobj); | |
| 334 | + kobject_put(vpd_kobj); | |
| 335 | 335 | } |
| 336 | 336 | |
| 337 | 337 | module_init(vpd_platform_init); |
| @@ -646,6 +646,9 @@ static int enable_debounce(struct gpio_chip *chip, unsigned int offset, · 645 unmodified lines | ||
| 646 | 646 | int rc; |
| 647 | 647 | int i; |
| 648 | 648 | |
| 649 | + if (!gpio->clk) | |
| 650 | + return -EINVAL; | |
| 651 | + | |
| 649 | 652 | rc = usecs_to_cycles(gpio, usecs, &requested_cycles); |
| 650 | 653 | if (rc < 0) { |
| 651 | 654 | dev_warn(chip->parent, "Failed to convert %luus to cycles at %luHz: %d\n", |
| @@ -90,8 +90,18 @@ static inline int to_reg(int gpio, enum ctrl_register reg_type) · 89 unmodified lines | ||
| 90 | 90 | { |
| 91 | 91 | int reg; |
| 92 | 92 | |
| 93 | − if (gpio == 94) | |
| 94 | − return GPIOPANELCTL; | |
| 93 | + if (gpio >= CRYSTALCOVE_GPIO_NUM) { | |
| 94 | + /* | |
| 95 | + * Virtual GPIO called from ACPI, for now we only support | |
| 96 | + * the panel ctl. | |
| 97 | + */ | |
| 98 | + switch (gpio) { | |
| 99 | + case 0x5e: | |
| 100 | + return GPIOPANELCTL; | |
| 101 | + default: | |
| 102 | + return -EOPNOTSUPP; | |
| 103 | + } | |
| 104 | + } | |
| 95 | 105 | |
| 96 | 106 | if (reg_type == CTRL_IN) { |
| 97 | 107 | if (gpio < 8) |
| @@ -130,36 +140,36 @@ static void crystalcove_update_irq_ctrl(struct crystalcove_gpio *cg, int gpio) · 32 unmodified lines | ||
| 130 | 140 | static int crystalcove_gpio_dir_in(struct gpio_chip *chip, unsigned gpio) |
| 131 | 141 | { |
| 132 | 142 | struct crystalcove_gpio *cg = gpiochip_get_data(chip); |
| 143 | + int reg = to_reg(gpio, CTRL_OUT); | |
| 133 | 144 | |
| 134 | − if (gpio > CRYSTALCOVE_VGPIO_NUM) | |
| 145 | + if (reg < 0) | |
| 135 | 146 | return 0; |
| 136 | 147 | |
| 137 | − return regmap_write(cg->regmap, to_reg(gpio, CTRL_OUT), | |
| 138 | − CTLO_INPUT_SET); | |
| 148 | + return regmap_write(cg->regmap, reg, CTLO_INPUT_SET); | |
| 139 | 149 | } |
| 140 | 150 | |
| 141 | 151 | static int crystalcove_gpio_dir_out(struct gpio_chip *chip, unsigned gpio, |
| 142 | 152 | int value) |
| 143 | 153 | { |
| 144 | 154 | struct crystalcove_gpio *cg = gpiochip_get_data(chip); |
| 155 | + int reg = to_reg(gpio, CTRL_OUT); | |
| 145 | 156 | |
| 146 | − if (gpio > CRYSTALCOVE_VGPIO_NUM) | |
| 157 | + if (reg < 0) | |
| 147 | 158 | return 0; |
| 148 | 159 | |
| 149 | − return regmap_write(cg->regmap, to_reg(gpio, CTRL_OUT), | |
| 150 | − CTLO_OUTPUT_SET | value); | |
| 160 | + return regmap_write(cg->regmap, reg, CTLO_OUTPUT_SET | value); | |
| 151 | 161 | } |
| 152 | 162 | |
| 153 | 163 | static int crystalcove_gpio_get(struct gpio_chip *chip, unsigned gpio) |
| 154 | 164 | { |
| 155 | 165 | struct crystalcove_gpio *cg = gpiochip_get_data(chip); |
| 156 | − int ret; | |
| 157 | 166 | unsigned int val; |
| 167 | + int ret, reg = to_reg(gpio, CTRL_IN); | |
| 158 | 168 | |
| 159 | − if (gpio > CRYSTALCOVE_VGPIO_NUM) | |
| 169 | + if (reg < 0) | |
| 160 | 170 | return 0; |
| 161 | 171 | |
| 162 | − ret = regmap_read(cg->regmap, to_reg(gpio, CTRL_IN), &val); | |
| 172 | + ret = regmap_read(cg->regmap, reg, &val); | |
| 163 | 173 | if (ret) |
| 164 | 174 | return ret; |
| 165 | 175 | |
| @@ -170,14 +180,15 @@ static void crystalcove_gpio_set(struct gpio_chip *chip, · 4 unmodified lines | ||
| 170 | 180 | unsigned gpio, int value) |
| 171 | 181 | { |
| 172 | 182 | struct crystalcove_gpio *cg = gpiochip_get_data(chip); |
| 183 | + int reg = to_reg(gpio, CTRL_OUT); | |
| 173 | 184 | |
| 174 | − if (gpio > CRYSTALCOVE_VGPIO_NUM) | |
| 185 | + if (reg < 0) | |
| 175 | 186 | return; |
| 176 | 187 | |
| 177 | 188 | if (value) |
| 178 | − regmap_update_bits(cg->regmap, to_reg(gpio, CTRL_OUT), 1, 1); | |
| 189 | + regmap_update_bits(cg->regmap, reg, 1, 1); | |
| 179 | 190 | else |
| 180 | − regmap_update_bits(cg->regmap, to_reg(gpio, CTRL_OUT), 1, 0); | |
| 191 | + regmap_update_bits(cg->regmap, reg, 1, 0); | |
| 181 | 192 | } |
| 182 | 193 | |
| 183 | 194 | static int crystalcove_irq_type(struct irq_data *data, unsigned type) |
| @@ -185,6 +196,9 @@ static int crystalcove_irq_type(struct irq_data *data, unsigned type) · 1 unmodified line | ||
| 185 | 196 | struct crystalcove_gpio *cg = |
| 186 | 197 | gpiochip_get_data(irq_data_get_irq_chip_data(data)); |
| 187 | 198 | |
| 199 | + if (data->hwirq >= CRYSTALCOVE_GPIO_NUM) | |
| 200 | + return 0; | |
| 201 | + | |
| 188 | 202 | switch (type) { |
| 189 | 203 | case IRQ_TYPE_NONE: |
| 190 | 204 | cg->intcnt_value = CTLI_INTCNT_DIS; |
| @@ -235,8 +249,10 @@ static void crystalcove_irq_unmask(struct irq_data *data) · 44 unmodified lines | ||
| 235 | 249 | struct crystalcove_gpio *cg = |
| 236 | 250 | gpiochip_get_data(irq_data_get_irq_chip_data(data)); |
| 237 | 251 | |
| 238 | − cg->set_irq_mask = false; | |
| 239 | − cg->update |= UPDATE_IRQ_MASK; | |
| 252 | + if (data->hwirq < CRYSTALCOVE_GPIO_NUM) { | |
| 253 | + cg->set_irq_mask = false; | |
| 254 | + cg->update |= UPDATE_IRQ_MASK; | |
| 255 | + } | |
| 240 | 256 | } |
| 241 | 257 | |
| 242 | 258 | static void crystalcove_irq_mask(struct irq_data *data) |
| @@ -244,8 +260,10 @@ static void crystalcove_irq_mask(struct irq_data *data) · 1 unmodified line | ||
| 244 | 260 | struct crystalcove_gpio *cg = |
| 245 | 261 | gpiochip_get_data(irq_data_get_irq_chip_data(data)); |
| 246 | 262 | |
| 247 | − cg->set_irq_mask = true; | |
| 248 | − cg->update |= UPDATE_IRQ_MASK; | |
| 263 | + if (data->hwirq < CRYSTALCOVE_GPIO_NUM) { | |
| 264 | + cg->set_irq_mask = true; | |
| 265 | + cg->update |= UPDATE_IRQ_MASK; | |
| 266 | + } | |
| 249 | 267 | } |
| 250 | 268 | |
| 251 | 269 | static struct irq_chip crystalcove_irqchip = { |
| @@ -747,7 +747,7 @@ static int mvebu_pwm_probe(struct platform_device *pdev, · 746 unmodified lines | ||
| 747 | 747 | set = U32_MAX; |
| 748 | 748 | else |
| 749 | 749 | return -EINVAL; |
| 750 | − writel_relaxed(0, mvebu_gpioreg_blink_counter_select(mvchip)); | |
| 750 | + writel_relaxed(set, mvebu_gpioreg_blink_counter_select(mvchip)); | |
| 751 | 751 | |
| 752 | 752 | mvpwm = devm_kzalloc(dev, sizeof(struct mvebu_pwm), GFP_KERNEL); |
| 753 | 753 | if (!mvpwm) |
| @@ -768,6 +768,13 @@ static int mvebu_pwm_probe(struct platform_device *pdev, · 14 unmodified lines | ||
| 768 | 768 | mvpwm->chip.dev = dev; |
| 769 | 769 | mvpwm->chip.ops = &mvebu_pwm_ops; |
| 770 | 770 | mvpwm->chip.npwm = mvchip->chip.ngpio; |
| 771 | + /* | |
| 772 | + * There may already be some PWM allocated, so we can't force | |
| 773 | + * mvpwm->chip.base to a fixed point like mvchip->chip.base. | |
| 774 | + * So, we let pwmchip_add() do the numbering and take the next free | |
| 775 | + * region. | |
| 776 | + */ | |
| 777 | + mvpwm->chip.base = -1; | |
| 771 | 778 | |
| 772 | 779 | spin_lock_init(&mvpwm->lock); |
| 773 | 780 | |
| @@ -220,9 +220,9 @@ static void amdgpu_vram_mgr_debug(struct ttm_mem_type_manager *man, · 219 unmodified lines | ||
| 220 | 220 | } |
| 221 | 221 | |
| 222 | 222 | const struct ttm_mem_type_manager_func amdgpu_vram_mgr_func = { |
| 223 | − amdgpu_vram_mgr_init, | |
| 224 | − amdgpu_vram_mgr_fini, | |
| 225 | − amdgpu_vram_mgr_new, | |
| 226 | − amdgpu_vram_mgr_del, | |
| 227 | − amdgpu_vram_mgr_debug | |
| 223 | + .init = amdgpu_vram_mgr_init, | |
| 224 | + .takedown = amdgpu_vram_mgr_fini, | |
| 225 | + .get_node = amdgpu_vram_mgr_new, | |
| 226 | + .put_node = amdgpu_vram_mgr_del, | |
| 227 | + .debug = amdgpu_vram_mgr_debug | |
| 228 | 228 | }; |
| @@ -1207,8 +1207,11 @@ static void dce_v10_0_program_watermarks(struct amdgpu_device *adev, · 1206 unmodified lines | ||
| 1207 | 1207 | u32 tmp, wm_mask, lb_vblank_lead_lines = 0; |
| 1208 | 1208 | |
| 1209 | 1209 | if (amdgpu_crtc->base.enabled && num_heads && mode) { |
| 1210 | − active_time = 1000000UL * (u32)mode->crtc_hdisplay / (u32)mode->clock; | |
| 1211 | − line_time = min((u32) (1000000UL * (u32)mode->crtc_htotal / (u32)mode->clock), (u32)65535); | |
| 1210 | + active_time = (u32) div_u64((u64)mode->crtc_hdisplay * 1000000, | |
| 1211 | + (u32)mode->clock); | |
| 1212 | + line_time = (u32) div_u64((u64)mode->crtc_htotal * 1000000, | |
| 1213 | + (u32)mode->clock); | |
| 1214 | + line_time = min(line_time, (u32)65535); | |
| 1212 | 1215 | |
| 1213 | 1216 | /* watermark for high clocks */ |
| 1214 | 1217 | if (adev->pm.dpm_enabled) { |
| @@ -1176,8 +1176,11 @@ static void dce_v11_0_program_watermarks(struct amdgpu_device *adev, · 1175 unmodified lines | ||
| 1176 | 1176 | u32 tmp, wm_mask, lb_vblank_lead_lines = 0; |
| 1177 | 1177 | |
| 1178 | 1178 | if (amdgpu_crtc->base.enabled && num_heads && mode) { |
| 1179 | − active_time = 1000000UL * (u32)mode->crtc_hdisplay / (u32)mode->clock; | |
| 1180 | − line_time = min((u32) (1000000UL * (u32)mode->crtc_htotal / (u32)mode->clock), (u32)65535); | |
| 1179 | + active_time = (u32) div_u64((u64)mode->crtc_hdisplay * 1000000, | |
| 1180 | + (u32)mode->clock); | |
| 1181 | + line_time = (u32) div_u64((u64)mode->crtc_htotal * 1000000, | |
| 1182 | + (u32)mode->clock); | |
| 1183 | + line_time = min(line_time, (u32)65535); | |
| 1181 | 1184 | |
| 1182 | 1185 | /* watermark for high clocks */ |
| 1183 | 1186 | if (adev->pm.dpm_enabled) { |
| @@ -983,8 +983,11 @@ static void dce_v6_0_program_watermarks(struct amdgpu_device *adev, · 982 unmodified lines | ||
| 983 | 983 | fixed20_12 a, b, c; |
| 984 | 984 | |
| 985 | 985 | if (amdgpu_crtc->base.enabled && num_heads && mode) { |
| 986 | − active_time = 1000000UL * (u32)mode->crtc_hdisplay / (u32)mode->clock; | |
| 987 | − line_time = min((u32) (1000000UL * (u32)mode->crtc_htotal / (u32)mode->clock), (u32)65535); | |
| 986 | + active_time = (u32) div_u64((u64)mode->crtc_hdisplay * 1000000, | |
| 987 | + (u32)mode->clock); | |
| 988 | + line_time = (u32) div_u64((u64)mode->crtc_htotal * 1000000, | |
| 989 | + (u32)mode->clock); | |
| 990 | + line_time = min(line_time, (u32)65535); | |
| 988 | 991 | priority_a_cnt = 0; |
| 989 | 992 | priority_b_cnt = 0; |
| 990 | 993 | |
| @@ -1091,8 +1091,11 @@ static void dce_v8_0_program_watermarks(struct amdgpu_device *adev, · 1090 unmodified lines | ||
| 1091 | 1091 | u32 tmp, wm_mask, lb_vblank_lead_lines = 0; |
| 1092 | 1092 | |
| 1093 | 1093 | if (amdgpu_crtc->base.enabled && num_heads && mode) { |
| 1094 | − active_time = 1000000UL * (u32)mode->crtc_hdisplay / (u32)mode->clock; | |
| 1095 | − line_time = min((u32) (1000000UL * (u32)mode->crtc_htotal / (u32)mode->clock), (u32)65535); | |
| 1094 | + active_time = (u32) div_u64((u64)mode->crtc_hdisplay * 1000000, | |
| 1095 | + (u32)mode->clock); | |
| 1096 | + line_time = (u32) div_u64((u64)mode->crtc_htotal * 1000000, | |
| 1097 | + (u32)mode->clock); | |
| 1098 | + line_time = min(line_time, (u32)65535); | |
| 1096 | 1099 | |
| 1097 | 1100 | /* watermark for high clocks */ |
| 1098 | 1101 | if (adev->pm.dpm_enabled) { |
| @@ -77,13 +77,26 @@ static int vce_v3_0_set_clockgating_state(void *handle, · 76 unmodified lines | ||
| 77 | 77 | static uint64_t vce_v3_0_ring_get_rptr(struct amdgpu_ring *ring) |
| 78 | 78 | { |
| 79 | 79 | struct amdgpu_device *adev = ring->adev; |
| 80 | + u32 v; | |
| 81 | + | |
| 82 | + mutex_lock(&adev->grbm_idx_mutex); | |
| 83 | + if (adev->vce.harvest_config == 0 || | |
| 84 | + adev->vce.harvest_config == AMDGPU_VCE_HARVEST_VCE1) | |
| 85 | + WREG32(mmGRBM_GFX_INDEX, GET_VCE_INSTANCE(0)); | |
| 86 | + else if (adev->vce.harvest_config == AMDGPU_VCE_HARVEST_VCE0) | |
| 87 | + WREG32(mmGRBM_GFX_INDEX, GET_VCE_INSTANCE(1)); | |
| 80 | 88 | |
| 81 | 89 | if (ring == &adev->vce.ring[0]) |
| 82 | − return RREG32(mmVCE_RB_RPTR); | |
| 90 | + v = RREG32(mmVCE_RB_RPTR); | |
| 83 | 91 | else if (ring == &adev->vce.ring[1]) |
| 84 | − return RREG32(mmVCE_RB_RPTR2); | |
| 92 | + v = RREG32(mmVCE_RB_RPTR2); | |
| 85 | 93 | else |
| 86 | − return RREG32(mmVCE_RB_RPTR3); | |
| 94 | + v = RREG32(mmVCE_RB_RPTR3); | |
| 95 | + | |
| 96 | + WREG32(mmGRBM_GFX_INDEX, mmGRBM_GFX_INDEX_DEFAULT); | |
| 97 | + mutex_unlock(&adev->grbm_idx_mutex); | |
| 98 | + | |
| 99 | + return v; | |
| 87 | 100 | } |
| 88 | 101 | |
| 89 | 102 | /** |
| @@ -96,13 +109,26 @@ static uint64_t vce_v3_0_ring_get_rptr(struct amdgpu_ring *ring) · 6 unmodified lines | ||
| 96 | 109 | static uint64_t vce_v3_0_ring_get_wptr(struct amdgpu_ring *ring) |
| 97 | 110 | { |
| 98 | 111 | struct amdgpu_device *adev = ring->adev; |
| 112 | + u32 v; | |
| 113 | + | |
| 114 | + mutex_lock(&adev->grbm_idx_mutex); | |
| 115 | + if (adev->vce.harvest_config == 0 || | |
| 116 | + adev->vce.harvest_config == AMDGPU_VCE_HARVEST_VCE1) | |
| 117 | + WREG32(mmGRBM_GFX_INDEX, GET_VCE_INSTANCE(0)); | |
| 118 | + else if (adev->vce.harvest_config == AMDGPU_VCE_HARVEST_VCE0) | |
| 119 | + WREG32(mmGRBM_GFX_INDEX, GET_VCE_INSTANCE(1)); | |
| 99 | 120 | |
| 100 | 121 | if (ring == &adev->vce.ring[0]) |
| 101 | − return RREG32(mmVCE_RB_WPTR); | |
| 122 | + v = RREG32(mmVCE_RB_WPTR); | |
| 102 | 123 | else if (ring == &adev->vce.ring[1]) |
| 103 | − return RREG32(mmVCE_RB_WPTR2); | |
| 124 | + v = RREG32(mmVCE_RB_WPTR2); | |
| 104 | 125 | else |
| 105 | − return RREG32(mmVCE_RB_WPTR3); | |
| 126 | + v = RREG32(mmVCE_RB_WPTR3); | |
| 127 | + | |
| 128 | + WREG32(mmGRBM_GFX_INDEX, mmGRBM_GFX_INDEX_DEFAULT); | |
| 129 | + mutex_unlock(&adev->grbm_idx_mutex); | |
| 130 | + | |
| 131 | + return v; | |
| 106 | 132 | } |
| 107 | 133 | |
| 108 | 134 | /** |
| @@ -116,12 +142,22 @@ static void vce_v3_0_ring_set_wptr(struct amdgpu_ring *ring) · 7 unmodified lines | ||
| 116 | 142 | { |
| 117 | 143 | struct amdgpu_device *adev = ring->adev; |
| 118 | 144 | |
| 145 | + mutex_lock(&adev->grbm_idx_mutex); | |
| 146 | + if (adev->vce.harvest_config == 0 || | |
| 147 | + adev->vce.harvest_config == AMDGPU_VCE_HARVEST_VCE1) | |
| 148 | + WREG32(mmGRBM_GFX_INDEX, GET_VCE_INSTANCE(0)); | |
| 149 | + else if (adev->vce.harvest_config == AMDGPU_VCE_HARVEST_VCE0) | |
| 150 | + WREG32(mmGRBM_GFX_INDEX, GET_VCE_INSTANCE(1)); | |
| 151 | + | |
| 119 | 152 | if (ring == &adev->vce.ring[0]) |
| 120 | 153 | WREG32(mmVCE_RB_WPTR, lower_32_bits(ring->wptr)); |
| 121 | 154 | else if (ring == &adev->vce.ring[1]) |
| 122 | 155 | WREG32(mmVCE_RB_WPTR2, lower_32_bits(ring->wptr)); |
| 123 | 156 | else |
| 124 | 157 | WREG32(mmVCE_RB_WPTR3, lower_32_bits(ring->wptr)); |
| 158 | + | |
| 159 | + WREG32(mmGRBM_GFX_INDEX, mmGRBM_GFX_INDEX_DEFAULT); | |
| 160 | + mutex_unlock(&adev->grbm_idx_mutex); | |
| 125 | 161 | } |
| 126 | 162 | |
| 127 | 163 | static void vce_v3_0_override_vce_clock_gating(struct amdgpu_device *adev, bool override) |
| @@ -231,33 +267,38 @@ static int vce_v3_0_start(struct amdgpu_device *adev) · 103 unmodified lines | ||
| 231 | 267 | struct amdgpu_ring *ring; |
| 232 | 268 | int idx, r; |
| 233 | 269 | |
| 234 | − ring = &adev->vce.ring[0]; | |
| 235 | − WREG32(mmVCE_RB_RPTR, lower_32_bits(ring->wptr)); | |
| 236 | − WREG32(mmVCE_RB_WPTR, lower_32_bits(ring->wptr)); | |
| 237 | − WREG32(mmVCE_RB_BASE_LO, ring->gpu_addr); | |
| 238 | − WREG32(mmVCE_RB_BASE_HI, upper_32_bits(ring->gpu_addr)); | |
| 239 | − WREG32(mmVCE_RB_SIZE, ring->ring_size / 4); | |
| 240 | − | |
| 241 | − ring = &adev->vce.ring[1]; | |
| 242 | − WREG32(mmVCE_RB_RPTR2, lower_32_bits(ring->wptr)); | |
| 243 | − WREG32(mmVCE_RB_WPTR2, lower_32_bits(ring->wptr)); | |
| 244 | − WREG32(mmVCE_RB_BASE_LO2, ring->gpu_addr); | |
| 245 | − WREG32(mmVCE_RB_BASE_HI2, upper_32_bits(ring->gpu_addr)); | |
| 246 | − WREG32(mmVCE_RB_SIZE2, ring->ring_size / 4); | |
| 247 | − | |
| 248 | − ring = &adev->vce.ring[2]; | |
| 249 | − WREG32(mmVCE_RB_RPTR3, lower_32_bits(ring->wptr)); | |
| 250 | − WREG32(mmVCE_RB_WPTR3, lower_32_bits(ring->wptr)); | |
| 251 | − WREG32(mmVCE_RB_BASE_LO3, ring->gpu_addr); | |
| 252 | − WREG32(mmVCE_RB_BASE_HI3, upper_32_bits(ring->gpu_addr)); | |
| 253 | − WREG32(mmVCE_RB_SIZE3, ring->ring_size / 4); | |
| 254 | − | |
| 255 | 270 | mutex_lock(&adev->grbm_idx_mutex); |
| 256 | 271 | for (idx = 0; idx < 2; ++idx) { |
| 257 | 272 | if (adev->vce.harvest_config & (1 << idx)) |
| 258 | 273 | continue; |
| 259 | 274 | |
| 260 | 275 | WREG32(mmGRBM_GFX_INDEX, GET_VCE_INSTANCE(idx)); |
| 276 | + | |
| 277 | + /* Program instance 0 reg space for two instances or instance 0 case | |
| 278 | + program instance 1 reg space for only instance 1 available case */ | |
| 279 | + if (idx != 1 || adev->vce.harvest_config == AMDGPU_VCE_HARVEST_VCE0) { | |
| 280 | + ring = &adev->vce.ring[0]; | |
| 281 | + WREG32(mmVCE_RB_RPTR, lower_32_bits(ring->wptr)); | |
| 282 | + WREG32(mmVCE_RB_WPTR, lower_32_bits(ring->wptr)); | |
| 283 | + WREG32(mmVCE_RB_BASE_LO, ring->gpu_addr); | |
| 284 | + WREG32(mmVCE_RB_BASE_HI, upper_32_bits(ring->gpu_addr)); | |
| 285 | + WREG32(mmVCE_RB_SIZE, ring->ring_size / 4); | |
| 286 | + | |
| 287 | + ring = &adev->vce.ring[1]; | |
| 288 | + WREG32(mmVCE_RB_RPTR2, lower_32_bits(ring->wptr)); | |
| 289 | + WREG32(mmVCE_RB_WPTR2, lower_32_bits(ring->wptr)); | |
| 290 | + WREG32(mmVCE_RB_BASE_LO2, ring->gpu_addr); | |
| 291 | + WREG32(mmVCE_RB_BASE_HI2, upper_32_bits(ring->gpu_addr)); | |
| 292 | + WREG32(mmVCE_RB_SIZE2, ring->ring_size / 4); | |
| 293 | + | |
| 294 | + ring = &adev->vce.ring[2]; | |
| 295 | + WREG32(mmVCE_RB_RPTR3, lower_32_bits(ring->wptr)); | |
| 296 | + WREG32(mmVCE_RB_WPTR3, lower_32_bits(ring->wptr)); | |
| 297 | + WREG32(mmVCE_RB_BASE_LO3, ring->gpu_addr); | |
| 298 | + WREG32(mmVCE_RB_BASE_HI3, upper_32_bits(ring->gpu_addr)); | |
| 299 | + WREG32(mmVCE_RB_SIZE3, ring->ring_size / 4); | |
| 300 | + } | |
| 301 | + | |
| 261 | 302 | vce_v3_0_mc_resume(adev, idx); |
| 262 | 303 | WREG32_FIELD(VCE_STATUS, JOB_BUSY, 1); |
| 263 | 304 | |
| @@ -709,17 +709,17 @@ static int tf_vega10_thermal_disable_alert(struct pp_hwmgr *hwmgr, · 708 unmodified lines | ||
| 709 | 709 | |
| 710 | 710 | static struct phm_master_table_item |
| 711 | 711 | vega10_thermal_start_thermal_controller_master_list[] = { |
| 712 | − {NULL, tf_vega10_thermal_initialize}, | |
| 713 | − {NULL, tf_vega10_thermal_set_temperature_range}, | |
| 714 | − {NULL, tf_vega10_thermal_enable_alert}, | |
| 712 | + { .tableFunction = tf_vega10_thermal_initialize }, | |
| 713 | + { .tableFunction = tf_vega10_thermal_set_temperature_range }, | |
| 714 | + { .tableFunction = tf_vega10_thermal_enable_alert }, | |
| 715 | 715 | /* We should restrict performance levels to low before we halt the SMC. |
| 716 | 716 | * On the other hand we are still in boot state when we do this |
| 717 | 717 | * so it would be pointless. |
| 718 | 718 | * If this assumption changes we have to revisit this table. |
| 719 | 719 | */ |
| 720 | − {NULL, tf_vega10_thermal_setup_fan_table}, | |
| 721 | − {NULL, tf_vega10_thermal_start_smc_fan_control}, | |
| 722 | − {NULL, NULL} | |
| 720 | + { .tableFunction = tf_vega10_thermal_setup_fan_table }, | |
| 721 | + { .tableFunction = tf_vega10_thermal_start_smc_fan_control }, | |
| 722 | + { } | |
| 723 | 723 | }; |
| 724 | 724 | |
| 725 | 725 | static struct phm_master_table_header |
| @@ -731,10 +731,10 @@ vega10_thermal_start_thermal_controller_master = { · 5 unmodified lines | ||
| 731 | 731 | |
| 732 | 732 | static struct phm_master_table_item |
| 733 | 733 | vega10_thermal_set_temperature_range_master_list[] = { |
| 734 | − {NULL, tf_vega10_thermal_disable_alert}, | |
| 735 | − {NULL, tf_vega10_thermal_set_temperature_range}, | |
| 736 | − {NULL, tf_vega10_thermal_enable_alert}, | |
| 737 | − {NULL, NULL} | |
| 734 | + { .tableFunction = tf_vega10_thermal_disable_alert }, | |
| 735 | + { .tableFunction = tf_vega10_thermal_set_temperature_range }, | |
| 736 | + { .tableFunction = tf_vega10_thermal_enable_alert }, | |
| 737 | + { } | |
| 738 | 738 | }; |
| 739 | 739 | |
| 740 | 740 | struct phm_master_table_header |
| @@ -1,6 +1,7 @@ | ||
| 1 | 1 | config DRM_DW_HDMI |
| 2 | 2 | tristate |
| 3 | 3 | select DRM_KMS_HELPER |
| 4 | + select REGMAP_MMIO | |
| 4 | 5 | |
| 5 | 6 | config DRM_DW_HDMI_AHB_AUDIO |
| 6 | 7 | tristate "Synopsys Designware AHB Audio interface" |
| @@ -508,6 +508,8 @@ drm_atomic_helper_check_modeset(struct drm_device *dev, · 507 unmodified lines | ||
| 508 | 508 | bool has_connectors = |
| 509 | 509 | !!new_crtc_state->connector_mask; |
| 510 | 510 | |
| 511 | + WARN_ON(!drm_modeset_is_locked(&crtc->mutex)); | |
| 512 | + | |
| 511 | 513 | if (!drm_mode_equal(&old_crtc_state->mode, &new_crtc_state->mode)) { |
| 512 | 514 | DRM_DEBUG_ATOMIC("[CRTC:%d:%s] mode changed\n", |
| 513 | 515 | crtc->base.id, crtc->name); |
| @@ -551,6 +553,8 @@ drm_atomic_helper_check_modeset(struct drm_device *dev, · 37 unmodified lines | ||
| 551 | 553 | for_each_oldnew_connector_in_state(state, connector, old_connector_state, new_connector_state, i) { |
| 552 | 554 | const struct drm_connector_helper_funcs *funcs = connector->helper_private; |
| 553 | 555 | |
| 556 | + WARN_ON(!drm_modeset_is_locked(&dev->mode_config.connection_mutex)); | |
| 557 | + | |
| 554 | 558 | /* |
| 555 | 559 | * This only sets crtc->connectors_changed for routing changes, |
| 556 | 560 | * drivers must set crtc->connectors_changed themselves when |
| @@ -650,6 +654,8 @@ drm_atomic_helper_check_planes(struct drm_device *dev, · 93 unmodified lines | ||
| 650 | 654 | for_each_oldnew_plane_in_state(state, plane, old_plane_state, new_plane_state, i) { |
| 651 | 655 | const struct drm_plane_helper_funcs *funcs; |
| 652 | 656 | |
| 657 | + WARN_ON(!drm_modeset_is_locked(&plane->mutex)); | |
| 658 | + | |
| 653 | 659 | funcs = plane->helper_private; |
| 654 | 660 | |
| 655 | 661 | drm_atomic_helper_plane_changed(state, old_plane_state, new_plane_state, plane); |
| @@ -2663,7 +2669,12 @@ int drm_atomic_helper_resume(struct drm_device *dev, · 2007 unmodified lines | ||
| 2663 | 2669 | |
| 2664 | 2670 | drm_modeset_acquire_init(&ctx, 0); |
| 2665 | 2671 | while (1) { |
| 2672 | + err = drm_modeset_lock_all_ctx(dev, &ctx); | |
| 2673 | + if (err) | |
| 2674 | + goto out; | |
| 2675 | + | |
| 2666 | 2676 | err = drm_atomic_helper_commit_duplicated_state(state, &ctx); |
| 2677 | +out: | |
| 2667 | 2678 | if (err != -EDEADLK) |
| 2668 | 2679 | break; |
| 2669 | 2680 | |
| @@ -1208,3 +1208,86 @@ int drm_dp_stop_crc(struct drm_dp_aux *aux) · 1207 unmodified lines | ||
| 1208 | 1208 | return 0; |
| 1209 | 1209 | } |
| 1210 | 1210 | EXPORT_SYMBOL(drm_dp_stop_crc); |
| 1211 | + | |
| 1212 | +struct dpcd_quirk { | |
| 1213 | + u8 oui[3]; | |
| 1214 | + bool is_branch; | |
| 1215 | + u32 quirks; | |
| 1216 | +}; | |
| 1217 | + | |
| 1218 | +#define OUI(first, second, third) { (first), (second), (third) } | |
| 1219 | + | |
| 1220 | +static const struct dpcd_quirk dpcd_quirk_list[] = { | |
| 1221 | + /* Analogix 7737 needs reduced M and N at HBR2 link rates */ | |
| 1222 | + { OUI(0x00, 0x22, 0xb9), true, BIT(DP_DPCD_QUIRK_LIMITED_M_N) }, | |
| 1223 | +}; | |
| 1224 | + | |
| 1225 | +#undef OUI | |
| 1226 | + | |
| 1227 | +/* | |
| 1228 | + * Get a bit mask of DPCD quirks for the sink/branch device identified by | |
| 1229 | + * ident. The quirk data is shared but it's up to the drivers to act on the | |
| 1230 | + * data. | |
| 1231 | + * | |
| 1232 | + * For now, only the OUI (first three bytes) is used, but this may be extended | |
| 1233 | + * to device identification string and hardware/firmware revisions later. | |
| 1234 | + */ | |
| 1235 | +static u32 | |
| 1236 | +drm_dp_get_quirks(const struct drm_dp_dpcd_ident *ident, bool is_branch) | |
| 1237 | +{ | |
| 1238 | + const struct dpcd_quirk *quirk; | |
| 1239 | + u32 quirks = 0; | |
| 1240 | + int i; | |
| 1241 | + | |
| 1242 | + for (i = 0; i < ARRAY_SIZE(dpcd_quirk_list); i++) { | |
| 1243 | + quirk = &dpcd_quirk_list[i]; | |
| 1244 | + | |
| 1245 | + if (quirk->is_branch != is_branch) | |
| 1246 | + continue; | |
| 1247 | + | |
| 1248 | + if (memcmp(quirk->oui, ident->oui, sizeof(ident->oui)) != 0) | |
| 1249 | + continue; | |
| 1250 | + | |
| 1251 | + quirks |= quirk->quirks; | |
| 1252 | + } | |
| 1253 | + | |
| 1254 | + return quirks; | |
| 1255 | +} | |
| 1256 | + | |
| 1257 | +/** | |
| 1258 | + * drm_dp_read_desc - read sink/branch descriptor from DPCD | |
| 1259 | + * @aux: DisplayPort AUX channel | |
| 1260 | + * @desc: Device decriptor to fill from DPCD | |
| 1261 | + * @is_branch: true for branch devices, false for sink devices | |
| 1262 | + * | |
| 1263 | + * Read DPCD 0x400 (sink) or 0x500 (branch) into @desc. Also debug log the | |
| 1264 | + * identification. | |
| 1265 | + * | |
| 1266 | + * Returns 0 on success or a negative error code on failure. | |
| 1267 | + */ | |
| 1268 | +int drm_dp_read_desc(struct drm_dp_aux *aux, struct drm_dp_desc *desc, | |
| 1269 | + bool is_branch) | |
| 1270 | +{ | |
| 1271 | + struct drm_dp_dpcd_ident *ident = &desc->ident; | |
| 1272 | + unsigned int offset = is_branch ? DP_BRANCH_OUI : DP_SINK_OUI; | |
| 1273 | + int ret, dev_id_len; | |
| 1274 | + | |
| 1275 | + ret = drm_dp_dpcd_read(aux, offset, ident, sizeof(*ident)); | |
| 1276 | + if (ret < 0) | |
| 1277 | + return ret; | |
| 1278 | + | |
| 1279 | + desc->quirks = drm_dp_get_quirks(ident, is_branch); | |
| 1280 | + | |
| 1281 | + dev_id_len = strnlen(ident->device_id, sizeof(ident->device_id)); | |
| 1282 | + | |
| 1283 | + DRM_DEBUG_KMS("DP %s: OUI %*phD dev-ID %*pE HW-rev %d.%d SW-rev %d.%d quirks 0x%04x\n", | |
| 1284 | + is_branch ? "branch" : "sink", | |
| 1285 | + (int)sizeof(ident->oui), ident->oui, | |
| 1286 | + dev_id_len, ident->device_id, | |
| 1287 | + ident->hw_rev >> 4, ident->hw_rev & 0xf, | |
| 1288 | + ident->sw_major_rev, ident->sw_minor_rev, | |
| 1289 | + desc->quirks); | |
| 1290 | + | |
| 1291 | + return 0; | |
| 1292 | +} | |
| 1293 | +EXPORT_SYMBOL(drm_dp_read_desc); | |
| @@ -358,7 +358,12 @@ EXPORT_SYMBOL(drm_put_dev); · 357 unmodified lines | ||
| 358 | 358 | void drm_unplug_dev(struct drm_device *dev) |
| 359 | 359 | { |
| 360 | 360 | /* for a USB device */ |
| 361 | − drm_dev_unregister(dev); | |
| 361 | + if (drm_core_check_feature(dev, DRIVER_MODESET)) | |
| 362 | + drm_modeset_unregister_all(dev); | |
| 363 | + | |
| 364 | + drm_minor_unregister(dev, DRM_MINOR_PRIMARY); | |
| 365 | + drm_minor_unregister(dev, DRM_MINOR_RENDER); | |
| 366 | + drm_minor_unregister(dev, DRM_MINOR_CONTROL); | |
| 362 | 367 | |
| 363 | 368 | mutex_lock(&drm_global_mutex); |
| 364 | 369 | |
| @@ -82,14 +82,9 @@ err_file_priv_free: · 81 unmodified lines | ||
| 82 | 82 | return ret; |
| 83 | 83 | } |
| 84 | 84 | |
| 85 | −static void exynos_drm_preclose(struct drm_device *dev, | |
| 86 | − struct drm_file *file) | |
| 87 | −{ | |
| 88 | − exynos_drm_subdrv_close(dev, file); | |
| 89 | −} | |
| 90 | − | |
| 91 | 85 | static void exynos_drm_postclose(struct drm_device *dev, struct drm_file *file) |
| 92 | 86 | { |
| 87 | + exynos_drm_subdrv_close(dev, file); | |
| 93 | 88 | kfree(file->driver_priv); |
| 94 | 89 | file->driver_priv = NULL; |
| 95 | 90 | } |
| @@ -145,7 +140,6 @@ static struct drm_driver exynos_drm_driver = { · 49 unmodified lines | ||
| 145 | 140 | .driver_features = DRIVER_MODESET | DRIVER_GEM | DRIVER_PRIME |
| 146 | 141 | | DRIVER_ATOMIC | DRIVER_RENDER, |
| 147 | 142 | .open = exynos_drm_open, |
| 148 | − .preclose = exynos_drm_preclose, | |
| 149 | 143 | .lastclose = exynos_drm_lastclose, |
| 150 | 144 | .postclose = exynos_drm_postclose, |
| 151 | 145 | .gem_free_object_unlocked = exynos_drm_gem_free_object, |
| @@ -160,12 +160,9 @@ struct exynos_drm_clk { · 159 unmodified lines | ||
| 160 | 160 | * drm framework doesn't support multiple irq yet. |
| 161 | 161 | * we can refer to the crtc to current hardware interrupt occurred through |
| 162 | 162 | * this pipe value. |
| 163 | − * @enabled: if the crtc is enabled or not | |
| 164 | − * @event: vblank event that is currently queued for flip | |
| 165 | − * @wait_update: wait all pending planes updates to finish | |
| 166 | − * @pending_update: number of pending plane updates in this crtc | |
| 167 | 163 | * @ops: pointer to callbacks for exynos drm specific functionality |
| 168 | 164 | * @ctx: A pointer to the crtc's implementation specific context |
| 165 | + * @pipe_clk: A pointer to the crtc's pipeline clock. | |
| 169 | 166 | */ |
| 170 | 167 | struct exynos_drm_crtc { |
| 171 | 168 | struct drm_crtc base; |
| @@ -1633,7 +1633,6 @@ static int exynos_dsi_parse_dt(struct exynos_dsi *dsi) · 1632 unmodified lines | ||
| 1633 | 1633 | { |
| 1634 | 1634 | struct device *dev = dsi->dev; |
| 1635 | 1635 | struct device_node *node = dev->of_node; |
| 1636 | − struct device_node *ep; | |
| 1637 | 1636 | int ret; |
| 1638 | 1637 | |
| 1639 | 1638 | ret = exynos_dsi_of_read_u32(node, "samsung,pll-clock-frequency", |
| @@ -1641,32 +1640,21 @@ static int exynos_dsi_parse_dt(struct exynos_dsi *dsi) · 1 unmodified line | ||
| 1641 | 1640 | if (ret < 0) |
| 1642 | 1641 | return ret; |
| 1643 | 1642 | |
| 1644 | − ep = of_graph_get_endpoint_by_regs(node, DSI_PORT_OUT, 0); | |
| 1645 | − if (!ep) { | |
| 1646 | − dev_err(dev, "no output port with endpoint specified\n"); | |
| 1647 | − return -EINVAL; | |
| 1648 | − } | |
| 1649 | − | |
| 1650 | − ret = exynos_dsi_of_read_u32(ep, "samsung,burst-clock-frequency", | |
| 1643 | + ret = exynos_dsi_of_read_u32(node, "samsung,burst-clock-frequency", | |
| 1651 | 1644 | &dsi->burst_clk_rate); |
| 1652 | 1645 | if (ret < 0) |
| 1653 | − goto end; | |
| 1646 | + return ret; | |
| 1654 | 1647 | |
| 1655 | − ret = exynos_dsi_of_read_u32(ep, "samsung,esc-clock-frequency", | |
| 1648 | + ret = exynos_dsi_of_read_u32(node, "samsung,esc-clock-frequency", | |
| 1656 | 1649 | &dsi->esc_clk_rate); |
| 1657 | 1650 | if (ret < 0) |
| 1658 | − goto end; | |
| 1659 | − | |
| 1660 | − of_node_put(ep); | |
| 1651 | + return ret; | |
| 1661 | 1652 | |
| 1662 | 1653 | dsi->bridge_node = of_graph_get_remote_node(node, DSI_PORT_OUT, 0); |
| 1663 | 1654 | if (!dsi->bridge_node) |
| 1664 | 1655 | return -EINVAL; |
| 1665 | 1656 | |
| 1666 | −end: | |
| 1667 | − of_node_put(ep); | |
| 1668 | − | |
| 1669 | − return ret; | |
| 1657 | + return 0; | |
| 1670 | 1658 | } |
| 1671 | 1659 | |
| 1672 | 1660 | static int exynos_dsi_bind(struct device *dev, struct device *master, |
| @@ -1817,6 +1805,10 @@ static int exynos_dsi_probe(struct platform_device *pdev) · 144 unmodified lines | ||
| 1817 | 1805 | |
| 1818 | 1806 | static int exynos_dsi_remove(struct platform_device *pdev) |
| 1819 | 1807 | { |
| 1808 | + struct exynos_dsi *dsi = platform_get_drvdata(pdev); | |
| 1809 | + | |
| 1810 | + of_node_put(dsi->bridge_node); | |
| 1811 | + | |
| 1820 | 1812 | pm_runtime_disable(&pdev->dev); |
| 1821 | 1813 | |
| 1822 | 1814 | component_del(&pdev->dev, &exynos_dsi_component_ops); |
| @@ -760,7 +760,7 @@ static int dsi_parse_dt(struct platform_device *pdev, struct dw_dsi *dsi) · 759 unmodified lines | ||
| 760 | 760 | * Get the endpoint node. In our case, dsi has one output port1 |
| 761 | 761 | * to which the external HDMI bridge is connected. |
| 762 | 762 | */ |
| 763 | − ret = drm_of_find_panel_or_bridge(np, 0, 0, NULL, &dsi->bridge); | |
| 763 | + ret = drm_of_find_panel_or_bridge(np, 1, 0, NULL, &dsi->bridge); | |
| 764 | 764 | if (ret) |
| 765 | 765 | return ret; |
| 766 | 766 | |
| @@ -779,8 +779,26 @@ static void init_vgpu_execlist(struct intel_vgpu *vgpu, int ring_id) · 778 unmodified lines | ||
| 779 | 779 | vgpu_vreg(vgpu, ctx_status_ptr_reg) = ctx_status_ptr.dw; |
| 780 | 780 | } |
| 781 | 781 | |
| 782 | +static void clean_workloads(struct intel_vgpu *vgpu, unsigned long engine_mask) | |
| 783 | +{ | |
| 784 | + struct drm_i915_private *dev_priv = vgpu->gvt->dev_priv; | |
| 785 | + struct intel_engine_cs *engine; | |
| 786 | + struct intel_vgpu_workload *pos, *n; | |
| 787 | + unsigned int tmp; | |
| 788 | + | |
| 789 | + /* free the unsubmited workloads in the queues. */ | |
| 790 | + for_each_engine_masked(engine, dev_priv, engine_mask, tmp) { | |
| 791 | + list_for_each_entry_safe(pos, n, | |
| 792 | + &vgpu->workload_q_head[engine->id], list) { | |
| 793 | + list_del_init(&pos->list); | |
| 794 | + free_workload(pos); | |
| 795 | + } | |
| 796 | + } | |
| 797 | +} | |
| 798 | + | |
| 782 | 799 | void intel_vgpu_clean_execlist(struct intel_vgpu *vgpu) |
| 783 | 800 | { |
| 801 | + clean_workloads(vgpu, ALL_ENGINES); | |
| 784 | 802 | kmem_cache_destroy(vgpu->workloads); |
| 785 | 803 | } |
| 786 | 804 | |
| @@ -811,17 +829,9 @@ void intel_vgpu_reset_execlist(struct intel_vgpu *vgpu, · 24 unmodified lines | ||
| 811 | 829 | { |
| 812 | 830 | struct drm_i915_private *dev_priv = vgpu->gvt->dev_priv; |
| 813 | 831 | struct intel_engine_cs *engine; |
| 814 | − struct intel_vgpu_workload *pos, *n; | |
| 815 | 832 | unsigned int tmp; |
| 816 | 833 | |
| 817 | − for_each_engine_masked(engine, dev_priv, engine_mask, tmp) { | |
| 818 | − /* free the unsubmited workload in the queue */ | |
| 819 | − list_for_each_entry_safe(pos, n, | |
| 820 | − &vgpu->workload_q_head[engine->id], list) { | |
| 821 | − list_del_init(&pos->list); | |
| 822 | − free_workload(pos); | |
| 823 | − } | |
| 824 | − | |
| 834 | + clean_workloads(vgpu, engine_mask); | |
| 835 | + for_each_engine_masked(engine, dev_priv, engine_mask, tmp) | |
| 825 | 836 | init_vgpu_execlist(vgpu, engine->id); |
| 826 | − } | |
| 827 | 837 | } |
| @@ -1366,18 +1366,28 @@ static int skl_misc_ctl_write(struct intel_vgpu *vgpu, unsigned int offset, · 1365 unmodified lines | ||
| 1366 | 1366 | void *p_data, unsigned int bytes) |
| 1367 | 1367 | { |
| 1368 | 1368 | struct drm_i915_private *dev_priv = vgpu->gvt->dev_priv; |
| 1369 | − i915_reg_t reg = {.reg = offset}; | |
| 1369 | + u32 v = *(u32 *)p_data; | |
| 1370 | + | |
| 1371 | + if (!IS_SKYLAKE(dev_priv) && !IS_KABYLAKE(dev_priv)) | |
| 1372 | + return intel_vgpu_default_mmio_write(vgpu, | |
| 1373 | + offset, p_data, bytes); | |
| 1370 | 1374 | |
| 1371 | 1375 | switch (offset) { |
| 1372 | 1376 | case 0x4ddc: |
| 1373 | − vgpu_vreg(vgpu, offset) = 0x8000003c; | |
| 1374 | − /* WaCompressedResourceSamplerPbeMediaNewHashMode:skl */ | |
| 1375 | − I915_WRITE(reg, vgpu_vreg(vgpu, offset)); | |
| 1377 | + /* bypass WaCompressedResourceSamplerPbeMediaNewHashMode */ | |
| 1378 | + vgpu_vreg(vgpu, offset) = v & ~(1 << 31); | |
| 1376 | 1379 | break; |
| 1377 | 1380 | case 0x42080: |
| 1378 | − vgpu_vreg(vgpu, offset) = 0x8000; | |
| 1379 | − /* WaCompressedResourceDisplayNewHashMode:skl */ | |
| 1380 | − I915_WRITE(reg, vgpu_vreg(vgpu, offset)); | |
| 1381 | + /* bypass WaCompressedResourceDisplayNewHashMode */ | |
| 1382 | + vgpu_vreg(vgpu, offset) = v & ~(1 << 15); | |
| 1383 | + break; | |
| 1384 | + case 0xe194: | |
| 1385 | + /* bypass WaCompressedResourceSamplerPbeMediaNewHashMode */ | |
| 1386 | + vgpu_vreg(vgpu, offset) = v & ~(1 << 8); | |
| 1387 | + break; | |
| 1388 | + case 0x7014: | |
| 1389 | + /* bypass WaCompressedResourceSamplerPbeMediaNewHashMode */ | |
| 1390 | + vgpu_vreg(vgpu, offset) = v & ~(1 << 13); | |
| 1381 | 1391 | break; |
| 1382 | 1392 | default: |
| 1383 | 1393 | return -EINVAL; |
| @@ -1634,7 +1644,8 @@ static int init_generic_mmio_info(struct intel_gvt *gvt) · 250 unmodified lines | ||
| 1634 | 1644 | MMIO_DFH(GAM_ECOCHK, D_ALL, F_CMD_ACCESS, NULL, NULL); |
| 1635 | 1645 | MMIO_DFH(GEN7_COMMON_SLICE_CHICKEN1, D_ALL, F_MODE_MASK | F_CMD_ACCESS, |
| 1636 | 1646 | NULL, NULL); |
| 1637 | − MMIO_DFH(COMMON_SLICE_CHICKEN2, D_ALL, F_MODE_MASK | F_CMD_ACCESS, NULL, NULL); | |
| 1647 | + MMIO_DFH(COMMON_SLICE_CHICKEN2, D_ALL, F_MODE_MASK | F_CMD_ACCESS, NULL, | |
| 1648 | + skl_misc_ctl_write); | |
| 1638 | 1649 | MMIO_DFH(0x9030, D_ALL, F_CMD_ACCESS, NULL, NULL); |
| 1639 | 1650 | MMIO_DFH(0x20a0, D_ALL, F_CMD_ACCESS, NULL, NULL); |
| 1640 | 1651 | MMIO_DFH(0x2420, D_ALL, F_CMD_ACCESS, NULL, NULL); |
| @@ -2568,7 +2579,8 @@ static int init_broadwell_mmio_info(struct intel_gvt *gvt) · 927 unmodified lines | ||
| 2568 | 2579 | MMIO_D(0x6e570, D_BDW_PLUS); |
| 2569 | 2580 | MMIO_D(0x65f10, D_BDW_PLUS); |
| 2570 | 2581 | |
| 2571 | − MMIO_DFH(0xe194, D_BDW_PLUS, F_MODE_MASK | F_CMD_ACCESS, NULL, NULL); | |
| 2582 | + MMIO_DFH(0xe194, D_BDW_PLUS, F_MODE_MASK | F_CMD_ACCESS, NULL, | |
| 2583 | + skl_misc_ctl_write); | |
| 2572 | 2584 | MMIO_DFH(0xe188, D_BDW_PLUS, F_MODE_MASK | F_CMD_ACCESS, NULL, NULL); |
| 2573 | 2585 | MMIO_DFH(HALF_SLICE_CHICKEN2, D_BDW_PLUS, F_MODE_MASK | F_CMD_ACCESS, NULL, NULL); |
| 2574 | 2586 | MMIO_DFH(0x2580, D_BDW_PLUS, F_MODE_MASK | F_CMD_ACCESS, NULL, NULL); |
| @@ -1235,6 +1235,15 @@ int i915_driver_load(struct pci_dev *pdev, const struct pci_device_id *ent) · 1234 unmodified lines | ||
| 1235 | 1235 | goto out_fini; |
| 1236 | 1236 | |
| 1237 | 1237 | pci_set_drvdata(pdev, &dev_priv->drm); |
| 1238 | + /* | |
| 1239 | + * Disable the system suspend direct complete optimization, which can | |
| 1240 | + * leave the device suspended skipping the driver's suspend handlers | |
| 1241 | + * if the device was already runtime suspended. This is needed due to | |
| 1242 | + * the difference in our runtime and system suspend sequence and | |
| 1243 | + * becaue the HDA driver may require us to enable the audio power | |
| 1244 | + * domain during system suspend. | |
| 1245 | + */ | |
| 1246 | + pdev->dev_flags |= PCI_DEV_FLAGS_NEEDS_RESUME; | |
| 1238 | 1247 | |
| 1239 | 1248 | ret = i915_driver_init_early(dev_priv, ent); |
| 1240 | 1249 | if (ret < 0) |
| @@ -1272,10 +1281,6 @@ int i915_driver_load(struct pci_dev *pdev, const struct pci_device_id *ent) · 31 unmodified lines | ||
| 1272 | 1281 | |
| 1273 | 1282 | dev_priv->ipc_enabled = false; |
| 1274 | 1283 | |
| 1275 | − /* Everything is in place, we can now relax! */ | |
| 1276 | − DRM_INFO("Initialized %s %d.%d.%d %s for %s on minor %d\n", | |
| 1277 | − driver.name, driver.major, driver.minor, driver.patchlevel, | |
| 1278 | − driver.date, pci_name(pdev), dev_priv->drm.primary->index); | |
| 1279 | 1284 | if (IS_ENABLED(CONFIG_DRM_I915_DEBUG)) |
| 1280 | 1285 | DRM_INFO("DRM_I915_DEBUG enabled\n"); |
| 1281 | 1286 | if (IS_ENABLED(CONFIG_DRM_I915_DEBUG_GEM)) |
| @@ -562,7 +562,8 @@ struct intel_link_m_n { · 561 unmodified lines | ||
| 562 | 562 | |
| 563 | 563 | void intel_link_compute_m_n(int bpp, int nlanes, |
| 564 | 564 | int pixel_clock, int link_clock, |
| 565 | − struct intel_link_m_n *m_n); | |
| 565 | + struct intel_link_m_n *m_n, | |
| 566 | + bool reduce_m_n); | |
| 566 | 567 | |
| 567 | 568 | /* Interface history: |
| 568 | 569 | * |
| @@ -2990,6 +2991,16 @@ static inline bool intel_scanout_needs_vtd_wa(struct drm_i915_private *dev_priv) · 2421 unmodified lines | ||
| 2990 | 2991 | return false; |
| 2991 | 2992 | } |
| 2992 | 2993 | |
| 2994 | +static inline bool | |
| 2995 | +intel_ggtt_update_needs_vtd_wa(struct drm_i915_private *dev_priv) | |
| 2996 | +{ | |
| 2997 | +#ifdef CONFIG_INTEL_IOMMU | |
| 2998 | + if (IS_BROXTON(dev_priv) && intel_iommu_gfx_mapped) | |
| 2999 | + return true; | |
| 3000 | +#endif | |
| 3001 | + return false; | |
| 3002 | +} | |
| 3003 | + | |
| 2993 | 3004 | int intel_sanitize_enable_ppgtt(struct drm_i915_private *dev_priv, |
| 2994 | 3005 | int enable_ppgtt); |
| 2995 | 3006 | |
| @@ -3298,6 +3298,10 @@ int i915_gem_wait_for_idle(struct drm_i915_private *i915, unsigned int flags) · 3297 unmodified lines | ||
| 3298 | 3298 | { |
| 3299 | 3299 | int ret; |
| 3300 | 3300 | |
| 3301 | + /* If the device is asleep, we have no requests outstanding */ | |
| 3302 | + if (!READ_ONCE(i915->gt.awake)) | |
| 3303 | + return 0; | |
| 3304 | + | |
| 3301 | 3305 | if (flags & I915_WAIT_LOCKED) { |
| 3302 | 3306 | struct i915_gem_timeline *tl; |
| 3303 | 3307 | |
| @@ -2191,6 +2191,101 @@ static void gen8_ggtt_clear_range(struct i915_address_space *vm, · 2190 unmodified lines | ||
| 2191 | 2191 | gen8_set_pte(>t_base[i], scratch_pte); |
| 2192 | 2192 | } |
| 2193 | 2193 | |
| 2194 | +static void bxt_vtd_ggtt_wa(struct i915_address_space *vm) | |
| 2195 | +{ | |
| 2196 | + struct drm_i915_private *dev_priv = vm->i915; | |
| 2197 | + | |
| 2198 | + /* | |
| 2199 | + * Make sure the internal GAM fifo has been cleared of all GTT | |
| 2200 | + * writes before exiting stop_machine(). This guarantees that | |
| 2201 | + * any aperture accesses waiting to start in another process | |
| 2202 | + * cannot back up behind the GTT writes causing a hang. | |
| 2203 | + * The register can be any arbitrary GAM register. | |
| 2204 | + */ | |
| 2205 | + POSTING_READ(GFX_FLSH_CNTL_GEN6); | |
| 2206 | +} | |
| 2207 | + | |
| 2208 | +struct insert_page { | |
| 2209 | + struct i915_address_space *vm; | |
| 2210 | + dma_addr_t addr; | |
| 2211 | + u64 offset; | |
| 2212 | + enum i915_cache_level level; | |
| 2213 | +}; | |
| 2214 | + | |
| 2215 | +static int bxt_vtd_ggtt_insert_page__cb(void *_arg) | |
| 2216 | +{ | |
| 2217 | + struct insert_page *arg = _arg; | |
| 2218 | + | |
| 2219 | + gen8_ggtt_insert_page(arg->vm, arg->addr, arg->offset, arg->level, 0); | |
| 2220 | + bxt_vtd_ggtt_wa(arg->vm); | |
| 2221 | + | |
| 2222 | + return 0; | |
| 2223 | +} | |
| 2224 | + | |
| 2225 | +static void bxt_vtd_ggtt_insert_page__BKL(struct i915_address_space *vm, | |
| 2226 | + dma_addr_t addr, | |
| 2227 | + u64 offset, | |
| 2228 | + enum i915_cache_level level, | |
| 2229 | + u32 unused) | |
| 2230 | +{ | |
| 2231 | + struct insert_page arg = { vm, addr, offset, level }; | |
| 2232 | + | |
| 2233 | + stop_machine(bxt_vtd_ggtt_insert_page__cb, &arg, NULL); | |
| 2234 | +} | |
| 2235 | + | |
| 2236 | +struct insert_entries { | |
| 2237 | + struct i915_address_space *vm; | |
| 2238 | + struct sg_table *st; | |
| 2239 | + u64 start; | |
| 2240 | + enum i915_cache_level level; | |
| 2241 | +}; | |
| 2242 | + | |
| 2243 | +static int bxt_vtd_ggtt_insert_entries__cb(void *_arg) | |
| 2244 | +{ | |
| 2245 | + struct insert_entries *arg = _arg; | |
| 2246 | + | |
| 2247 | + gen8_ggtt_insert_entries(arg->vm, arg->st, arg->start, arg->level, 0); | |
| 2248 | + bxt_vtd_ggtt_wa(arg->vm); | |
| 2249 | + | |
| 2250 | + return 0; | |
| 2251 | +} | |
| 2252 | + | |
| 2253 | +static void bxt_vtd_ggtt_insert_entries__BKL(struct i915_address_space *vm, | |
| 2254 | + struct sg_table *st, | |
| 2255 | + u64 start, | |
| 2256 | + enum i915_cache_level level, | |
| 2257 | + u32 unused) | |
| 2258 | +{ | |
| 2259 | + struct insert_entries arg = { vm, st, start, level }; | |
| 2260 | + | |
| 2261 | + stop_machine(bxt_vtd_ggtt_insert_entries__cb, &arg, NULL); | |
| 2262 | +} | |
| 2263 | + | |
| 2264 | +struct clear_range { | |
| 2265 | + struct i915_address_space *vm; | |
| 2266 | + u64 start; | |
| 2267 | + u64 length; | |
| 2268 | +}; | |
| 2269 | + | |
| 2270 | +static int bxt_vtd_ggtt_clear_range__cb(void *_arg) | |
| 2271 | +{ | |
| 2272 | + struct clear_range *arg = _arg; | |
| 2273 | + | |
| 2274 | + gen8_ggtt_clear_range(arg->vm, arg->start, arg->length); | |
| 2275 | + bxt_vtd_ggtt_wa(arg->vm); | |
| 2276 | + | |
| 2277 | + return 0; | |
| 2278 | +} | |
| 2279 | + | |
| 2280 | +static void bxt_vtd_ggtt_clear_range__BKL(struct i915_address_space *vm, | |
| 2281 | + u64 start, | |
| 2282 | + u64 length) | |
| 2283 | +{ | |
| 2284 | + struct clear_range arg = { vm, start, length }; | |
| 2285 | + | |
| 2286 | + stop_machine(bxt_vtd_ggtt_clear_range__cb, &arg, NULL); | |
| 2287 | +} | |
| 2288 | + | |
| 2194 | 2289 | static void gen6_ggtt_clear_range(struct i915_address_space *vm, |
| 2195 | 2290 | u64 start, u64 length) |
| 2196 | 2291 | { |
| @@ -2313,7 +2408,7 @@ static int aliasing_gtt_bind_vma(struct i915_vma *vma, · 116 unmodified lines | ||
| 2313 | 2408 | appgtt->base.allocate_va_range) { |
| 2314 | 2409 | ret = appgtt->base.allocate_va_range(&appgtt->base, |
| 2315 | 2410 | vma->node.start, |
| 2316 | − vma->node.size); | |
| 2411 | + vma->size); | |
| 2317 | 2412 | if (ret) |
| 2318 | 2413 | goto err_pages; |
| 2319 | 2414 | } |
| @@ -2785,6 +2880,14 @@ static int gen8_gmch_probe(struct i915_ggtt *ggtt) · 465 unmodified lines | ||
| 2785 | 2880 | |
| 2786 | 2881 | ggtt->base.insert_entries = gen8_ggtt_insert_entries; |
| 2787 | 2882 | |
| 2883 | + /* Serialize GTT updates with aperture access on BXT if VT-d is on. */ | |
| 2884 | + if (intel_ggtt_update_needs_vtd_wa(dev_priv)) { | |
| 2885 | + ggtt->base.insert_entries = bxt_vtd_ggtt_insert_entries__BKL; | |
| 2886 | + ggtt->base.insert_page = bxt_vtd_ggtt_insert_page__BKL; | |
| 2887 | + if (ggtt->base.clear_range != nop_clear_range) | |
| 2888 | + ggtt->base.clear_range = bxt_vtd_ggtt_clear_range__BKL; | |
| 2889 | + } | |
| 2890 | + | |
| 2788 | 2891 | ggtt->invalidate = gen6_ggtt_invalidate; |
| 2789 | 2892 | |
| 2790 | 2893 | return ggtt_probe_common(ggtt, size); |
| @@ -2997,7 +3100,8 @@ void i915_ggtt_enable_guc(struct drm_i915_private *i915) · 206 unmodified lines | ||
| 2997 | 3100 | |
| 2998 | 3101 | void i915_ggtt_disable_guc(struct drm_i915_private *i915) |
| 2999 | 3102 | { |
| 3000 | − i915->ggtt.invalidate = gen6_ggtt_invalidate; | |
| 3103 | + if (i915->ggtt.invalidate == guc_ggtt_invalidate) | |
| 3104 | + i915->ggtt.invalidate = gen6_ggtt_invalidate; | |
| 3001 | 3105 | } |
| 3002 | 3106 | |
| 3003 | 3107 | void i915_gem_restore_gtt_mappings(struct drm_i915_private *dev_priv) |
| @@ -59,9 +59,6 @@ static void i915_gem_shrinker_unlock(struct drm_device *dev, bool unlock) · 58 unmodified lines | ||
| 59 | 59 | return; |
| 60 | 60 | |
| 61 | 61 | mutex_unlock(&dev->struct_mutex); |
| 62 | − | |
| 63 | − /* expedite the RCU grace period to free some request slabs */ | |
| 64 | − synchronize_rcu_expedited(); | |
| 65 | 62 | } |
| 66 | 63 | |
| 67 | 64 | static bool any_vma_pinned(struct drm_i915_gem_object *obj) |
| @@ -274,8 +271,6 @@ unsigned long i915_gem_shrink_all(struct drm_i915_private *dev_priv) · 206 unmodified lines | ||
| 274 | 271 | I915_SHRINK_ACTIVE); |
| 275 | 272 | intel_runtime_pm_put(dev_priv); |
| 276 | 273 | |
| 277 | − synchronize_rcu(); /* wait for our earlier RCU delayed slab frees */ | |
| 278 | − | |
| 279 | 274 | return freed; |
| 280 | 275 | } |
| 281 | 276 | |
| @@ -278,7 +278,7 @@ i915_gem_object_set_tiling(struct drm_i915_gem_object *obj, · 277 unmodified lines | ||
| 278 | 278 | obj->mm.quirked = false; |
| 279 | 279 | } |
| 280 | 280 | if (!i915_gem_object_is_tiled(obj)) { |
| 281 | − GEM_BUG_ON(!obj->mm.quirked); | |
| 281 | + GEM_BUG_ON(obj->mm.quirked); | |
| 282 | 282 | __i915_gem_object_pin_pages(obj); |
| 283 | 283 | obj->mm.quirked = true; |
| 284 | 284 | } |
| @@ -2953,7 +2953,6 @@ static void vlv_display_irq_postinstall(struct drm_i915_private *dev_priv) · 2952 unmodified lines | ||
| 2953 | 2953 | u32 pipestat_mask; |
| 2954 | 2954 | u32 enable_mask; |
| 2955 | 2955 | enum pipe pipe; |
| 2956 | − u32 val; | |
| 2957 | 2956 | |
| 2958 | 2957 | pipestat_mask = PLANE_FLIP_DONE_INT_STATUS_VLV | |
| 2959 | 2958 | PIPE_CRC_DONE_INTERRUPT_STATUS; |
| @@ -2964,18 +2963,16 @@ static void vlv_display_irq_postinstall(struct drm_i915_private *dev_priv) · 4 unmodified lines | ||
| 2964 | 2963 | |
| 2965 | 2964 | enable_mask = I915_DISPLAY_PORT_INTERRUPT | |
| 2966 | 2965 | I915_DISPLAY_PIPE_A_EVENT_INTERRUPT | |
| 2967 | − I915_DISPLAY_PIPE_B_EVENT_INTERRUPT; | |
| 2966 | + I915_DISPLAY_PIPE_B_EVENT_INTERRUPT | | |
| 2967 | + I915_LPE_PIPE_A_INTERRUPT | | |
| 2968 | + I915_LPE_PIPE_B_INTERRUPT; | |
| 2969 | + | |
| 2968 | 2970 | if (IS_CHERRYVIEW(dev_priv)) |
| 2969 | − enable_mask |= I915_DISPLAY_PIPE_C_EVENT_INTERRUPT; | |
| 2971 | + enable_mask |= I915_DISPLAY_PIPE_C_EVENT_INTERRUPT | | |
| 2972 | + I915_LPE_PIPE_C_INTERRUPT; | |
| 2970 | 2973 | |
| 2971 | 2974 | WARN_ON(dev_priv->irq_mask != ~0); |
| 2972 | 2975 | |
| 2973 | − val = (I915_LPE_PIPE_A_INTERRUPT | | |
| 2974 | − I915_LPE_PIPE_B_INTERRUPT | | |
| 2975 | − I915_LPE_PIPE_C_INTERRUPT); | |
| 2976 | − | |
| 2977 | − enable_mask |= val; | |
| 2978 | − | |
| 2979 | 2976 | dev_priv->irq_mask = ~enable_mask; |
| 2980 | 2977 | |
| 2981 | 2978 | GEN5_IRQ_INIT(VLV_, dev_priv->irq_mask, enable_mask); |
| @@ -208,7 +208,7 @@ static const struct intel_device_info intel_ironlake_d_info = { · 207 unmodified lines | ||
| 208 | 208 | static const struct intel_device_info intel_ironlake_m_info = { |
| 209 | 209 | GEN5_FEATURES, |
| 210 | 210 | .platform = INTEL_IRONLAKE, |
| 211 | − .is_mobile = 1, | |
| 211 | + .is_mobile = 1, .has_fbc = 1, | |
| 212 | 212 | }; |
| 213 | 213 | |
| 214 | 214 | #define GEN6_FEATURES \ |
| @@ -390,7 +390,6 @@ static const struct intel_device_info intel_skylake_gt3_info = { · 175 unmodified lines | ||
| 390 | 390 | .has_hw_contexts = 1, \ |
| 391 | 391 | .has_logical_ring_contexts = 1, \ |
| 392 | 392 | .has_guc = 1, \ |
| 393 | − .has_decoupled_mmio = 1, \ | |
| 394 | 393 | .has_aliasing_ppgtt = 1, \ |
| 395 | 394 | .has_full_ppgtt = 1, \ |
| 396 | 395 | .has_full_48bit_ppgtt = 1, \ |
| @@ -36,10 +36,6 @@ · 35 unmodified lines | ||
| 36 | 36 | #define VGT_VERSION_MAJOR 1 |
| 37 | 37 | #define VGT_VERSION_MINOR 0 |
| 38 | 38 | |
| 39 | −#define INTEL_VGT_IF_VERSION_ENCODE(major, minor) ((major) << 16 | (minor)) | |
| 40 | −#define INTEL_VGT_IF_VERSION \ | |
| 41 | − INTEL_VGT_IF_VERSION_ENCODE(VGT_VERSION_MAJOR, VGT_VERSION_MINOR) | |
| 42 | − | |
| 43 | 39 | /* |
| 44 | 40 | * notifications from guest to vgpu device model |
| 45 | 41 | */ |
| @@ -55,8 +51,8 @@ enum vgt_g2v_type { · 9 unmodified lines | ||
| 55 | 51 | |
| 56 | 52 | struct vgt_if { |
| 57 | 53 | u64 magic; /* VGT_MAGIC */ |
| 58 | − uint16_t version_major; | |
| 59 | − uint16_t version_minor; | |
| 54 | + u16 version_major; | |
| 55 | + u16 version_minor; | |
| 60 | 56 | u32 vgt_id; /* ID of vGT instance */ |
| 61 | 57 | u32 rsv1[12]; /* pad to offset 0x40 */ |
| 62 | 58 | /* |
| @@ -8280,7 +8280,7 @@ enum { · 8279 unmodified lines | ||
| 8280 | 8280 | |
| 8281 | 8281 | /* MIPI DSI registers */ |
| 8282 | 8282 | |
| 8283 | −#define _MIPI_PORT(port, a, c) ((port) ? c : a) /* ports A and C only */ | |
| 8283 | +#define _MIPI_PORT(port, a, c) (((port) == PORT_A) ? a : c) /* ports A and C only */ | |
| 8284 | 8284 | #define _MMIO_MIPI(port, a, c) _MMIO(_MIPI_PORT(port, a, c)) |
| 8285 | 8285 | |
| 8286 | 8286 | #define MIPIO_TXESC_CLK_DIV1 _MMIO(0x160004) |
| @@ -60,8 +60,8 @@ · 59 unmodified lines | ||
| 60 | 60 | */ |
| 61 | 61 | void i915_check_vgpu(struct drm_i915_private *dev_priv) |
| 62 | 62 | { |
| 63 | − uint64_t magic; | |
| 64 | − uint32_t version; | |
| 63 | + u64 magic; | |
| 64 | + u16 version_major; | |
| 65 | 65 | |
| 66 | 66 | BUILD_BUG_ON(sizeof(struct vgt_if) != VGT_PVINFO_SIZE); |
| 67 | 67 | |
| @@ -69,10 +69,8 @@ void i915_check_vgpu(struct drm_i915_private *dev_priv) · 1 unmodified line | ||
| 69 | 69 | if (magic != VGT_MAGIC) |
| 70 | 70 | return; |
| 71 | 71 | |
| 72 | − version = INTEL_VGT_IF_VERSION_ENCODE( | |
| 73 | − __raw_i915_read16(dev_priv, vgtif_reg(version_major)), | |
| 74 | − __raw_i915_read16(dev_priv, vgtif_reg(version_minor))); | |
| 75 | − if (version != INTEL_VGT_IF_VERSION) { | |
| 72 | + version_major = __raw_i915_read16(dev_priv, vgtif_reg(version_major)); | |
| 73 | + if (version_major < VGT_VERSION_MAJOR) { | |
| 76 | 74 | DRM_INFO("VGT interface version mismatch!\n"); |
| 77 | 75 | return; |
| 78 | 76 | } |
| @@ -4598,7 +4598,7 @@ static void cpt_verify_modeset(struct drm_device *dev, int pipe) · 4597 unmodified lines | ||
| 4598 | 4598 | |
| 4599 | 4599 | static int |
| 4600 | 4600 | skl_update_scaler(struct intel_crtc_state *crtc_state, bool force_detach, |
| 4601 | − unsigned scaler_user, int *scaler_id, unsigned int rotation, | |
| 4601 | + unsigned int scaler_user, int *scaler_id, | |
| 4602 | 4602 | int src_w, int src_h, int dst_w, int dst_h) |
| 4603 | 4603 | { |
| 4604 | 4604 | struct intel_crtc_scaler_state *scaler_state = |
| @@ -4607,9 +4607,12 @@ skl_update_scaler(struct intel_crtc_state *crtc_state, bool force_detach, · 2 unmodified lines | ||
| 4607 | 4607 | to_intel_crtc(crtc_state->base.crtc); |
| 4608 | 4608 | int need_scaling; |
| 4609 | 4609 | |
| 4610 | − need_scaling = drm_rotation_90_or_270(rotation) ? | |
| 4611 | − (src_h != dst_w || src_w != dst_h): | |
| 4612 | − (src_w != dst_w || src_h != dst_h); | |
| 4610 | + /* | |
| 4611 | + * Src coordinates are already rotated by 270 degrees for | |
| 4612 | + * the 90/270 degree plane rotation cases (to match the | |
| 4613 | + * GTT mapping), hence no need to account for rotation here. | |
| 4614 | + */ | |
| 4615 | + need_scaling = src_w != dst_w || src_h != dst_h; | |
| 4613 | 4616 | |
| 4614 | 4617 | /* |
| 4615 | 4618 | * if plane is being disabled or scaler is no more required or force detach |
| @@ -4671,7 +4674,7 @@ int skl_update_scaler_crtc(struct intel_crtc_state *state) · 55 unmodified lines | ||
| 4671 | 4674 | const struct drm_display_mode *adjusted_mode = &state->base.adjusted_mode; |
| 4672 | 4675 | |
| 4673 | 4676 | return skl_update_scaler(state, !state->base.active, SKL_CRTC_INDEX, |
| 4674 | − &state->scaler_state.scaler_id, DRM_ROTATE_0, | |
| 4677 | + &state->scaler_state.scaler_id, | |
| 4675 | 4678 | state->pipe_src_w, state->pipe_src_h, |
| 4676 | 4679 | adjusted_mode->crtc_hdisplay, adjusted_mode->crtc_vdisplay); |
| 4677 | 4680 | } |
| @@ -4700,7 +4703,6 @@ static int skl_update_scaler_plane(struct intel_crtc_state *crtc_state, · 22 unmodified lines | ||
| 4700 | 4703 | ret = skl_update_scaler(crtc_state, force_detach, |
| 4701 | 4704 | drm_plane_index(&intel_plane->base), |
| 4702 | 4705 | &plane_state->scaler_id, |
| 4703 | − plane_state->base.rotation, | |
| 4704 | 4706 | drm_rect_width(&plane_state->base.src) >> 16, |
| 4705 | 4707 | drm_rect_height(&plane_state->base.src) >> 16, |
| 4706 | 4708 | drm_rect_width(&plane_state->base.dst), |
| @@ -6101,7 +6103,7 @@ retry: · 1394 unmodified lines | ||
| 6101 | 6103 | pipe_config->fdi_lanes = lane; |
| 6102 | 6104 | |
| 6103 | 6105 | intel_link_compute_m_n(pipe_config->pipe_bpp, lane, fdi_dotclock, |
| 6104 | − link_bw, &pipe_config->fdi_m_n); | |
| 6106 | + link_bw, &pipe_config->fdi_m_n, false); | |
| 6105 | 6107 | |
| 6106 | 6108 | ret = ironlake_check_fdi_lanes(dev, intel_crtc->pipe, pipe_config); |
| 6107 | 6109 | if (ret == -EINVAL && pipe_config->pipe_bpp > 6*3) { |
| @@ -6277,7 +6279,8 @@ intel_reduce_m_n_ratio(uint32_t *num, uint32_t *den) · 169 unmodified lines | ||
| 6277 | 6279 | } |
| 6278 | 6280 | |
| 6279 | 6281 | static void compute_m_n(unsigned int m, unsigned int n, |
| 6280 | − uint32_t *ret_m, uint32_t *ret_n) | |
| 6282 | + uint32_t *ret_m, uint32_t *ret_n, | |
| 6283 | + bool reduce_m_n) | |
| 6281 | 6284 | { |
| 6282 | 6285 | /* |
| 6283 | 6286 | * Reduce M/N as much as possible without loss in precision. Several DP |
| @@ -6285,9 +6288,11 @@ static void compute_m_n(unsigned int m, unsigned int n, · 1 unmodified line | ||
| 6285 | 6288 | * values. The passed in values are more likely to have the least |
| 6286 | 6289 | * significant bits zero than M after rounding below, so do this first. |
| 6287 | 6290 | */ |
| 6288 | − while ((m & 1) == 0 && (n & 1) == 0) { | |
| 6289 | − m >>= 1; | |
| 6290 | − n >>= 1; | |
| 6291 | + if (reduce_m_n) { | |
| 6292 | + while ((m & 1) == 0 && (n & 1) == 0) { | |
| 6293 | + m >>= 1; | |
| 6294 | + n >>= 1; | |
| 6295 | + } | |
| 6291 | 6296 | } |
| 6292 | 6297 | |
| 6293 | 6298 | *ret_n = min_t(unsigned int, roundup_pow_of_two(n), DATA_LINK_N_MAX); |
| @@ -6298,16 +6303,19 @@ static void compute_m_n(unsigned int m, unsigned int n, · 4 unmodified lines | ||
| 6298 | 6303 | void |
| 6299 | 6304 | intel_link_compute_m_n(int bits_per_pixel, int nlanes, |
| 6300 | 6305 | int pixel_clock, int link_clock, |
| 6301 | − struct intel_link_m_n *m_n) | |
| 6306 | + struct intel_link_m_n *m_n, | |
| 6307 | + bool reduce_m_n) | |
| 6302 | 6308 | { |
| 6303 | 6309 | m_n->tu = 64; |
| 6304 | 6310 | |
| 6305 | 6311 | compute_m_n(bits_per_pixel * pixel_clock, |
| 6306 | 6312 | link_clock * nlanes * 8, |
| 6307 | − &m_n->gmch_m, &m_n->gmch_n); | |
| 6313 | + &m_n->gmch_m, &m_n->gmch_n, | |
| 6314 | + reduce_m_n); | |
| 6308 | 6315 | |
| 6309 | 6316 | compute_m_n(pixel_clock, link_clock, |
| 6310 | − &m_n->link_m, &m_n->link_n); | |
| 6317 | + &m_n->link_m, &m_n->link_n, | |
| 6318 | + reduce_m_n); | |
| 6311 | 6319 | } |
| 6312 | 6320 | |
| 6313 | 6321 | static inline bool intel_panel_use_ssc(struct drm_i915_private *dev_priv) |
| @@ -12197,6 +12205,15 @@ static void update_scanline_offset(struct intel_crtc *crtc) · 5883 unmodified lines | ||
| 12197 | 12205 | * type. For DP ports it behaves like most other platforms, but on HDMI |
| 12198 | 12206 | * there's an extra 1 line difference. So we need to add two instead of |
| 12199 | 12207 | * one to the value. |
| 12208 | + * | |
| 12209 | + * On VLV/CHV DSI the scanline counter would appear to increment | |
| 12210 | + * approx. 1/3 of a scanline before start of vblank. Unfortunately | |
| 12211 | + * that means we can't tell whether we're in vblank or not while | |
| 12212 | + * we're on that particular line. We must still set scanline_offset | |
| 12213 | + * to 1 so that the vblank timestamps come out correct when we query | |
| 12214 | + * the scanline counter from within the vblank interrupt handler. | |
| 12215 | + * However if queried just before the start of vblank we'll get an | |
| 12216 | + * answer that's slightly in the future. | |
| 12200 | 12217 | */ |
| 12201 | 12218 | if (IS_GEN2(dev_priv)) { |
| 12202 | 12219 | const struct drm_display_mode *adjusted_mode = &crtc->config->base.adjusted_mode; |
| @@ -1507,37 +1507,6 @@ static void intel_dp_print_rates(struct intel_dp *intel_dp) · 1506 unmodified lines | ||
| 1507 | 1507 | DRM_DEBUG_KMS("common rates: %s\n", str); |
| 1508 | 1508 | } |
| 1509 | 1509 | |
| 1510 | −bool | |
| 1511 | −__intel_dp_read_desc(struct intel_dp *intel_dp, struct intel_dp_desc *desc) | |
| 1512 | −{ | |
| 1513 | − u32 base = drm_dp_is_branch(intel_dp->dpcd) ? DP_BRANCH_OUI : | |
| 1514 | − DP_SINK_OUI; | |
| 1515 | − | |
| 1516 | − return drm_dp_dpcd_read(&intel_dp->aux, base, desc, sizeof(*desc)) == | |
| 1517 | − sizeof(*desc); | |
| 1518 | −} | |
| 1519 | − | |
| 1520 | −bool intel_dp_read_desc(struct intel_dp *intel_dp) | |
| 1521 | −{ | |
| 1522 | − struct intel_dp_desc *desc = &intel_dp->desc; | |
| 1523 | − bool oui_sup = intel_dp->dpcd[DP_DOWN_STREAM_PORT_COUNT] & | |
| 1524 | − DP_OUI_SUPPORT; | |
| 1525 | − int dev_id_len; | |
| 1526 | − | |
| 1527 | − if (!__intel_dp_read_desc(intel_dp, desc)) | |
| 1528 | − return false; | |
| 1529 | − | |
| 1530 | − dev_id_len = strnlen(desc->device_id, sizeof(desc->device_id)); | |
| 1531 | − DRM_DEBUG_KMS("DP %s: OUI %*phD%s dev-ID %*pE HW-rev %d.%d SW-rev %d.%d\n", | |
| 1532 | − drm_dp_is_branch(intel_dp->dpcd) ? "branch" : "sink", | |
| 1533 | − (int)sizeof(desc->oui), desc->oui, oui_sup ? "" : "(NS)", | |
| 1534 | − dev_id_len, desc->device_id, | |
| 1535 | − desc->hw_rev >> 4, desc->hw_rev & 0xf, | |
| 1536 | − desc->sw_major_rev, desc->sw_minor_rev); | |
| 1537 | − | |
| 1538 | − return true; | |
| 1539 | −} | |
| 1540 | − | |
| 1541 | 1510 | static int rate_to_index(int find, const int *rates) |
| 1542 | 1511 | { |
| 1543 | 1512 | int i = 0; |
| @@ -1624,6 +1593,8 @@ intel_dp_compute_config(struct intel_encoder *encoder, · 80 unmodified lines | ||
| 1624 | 1593 | int common_rates[DP_MAX_SUPPORTED_RATES] = {}; |
| 1625 | 1594 | int common_len; |
| 1626 | 1595 | uint8_t link_bw, rate_select; |
| 1596 | + bool reduce_m_n = drm_dp_has_quirk(&intel_dp->desc, | |
| 1597 | + DP_DPCD_QUIRK_LIMITED_M_N); | |
| 1627 | 1598 | |
| 1628 | 1599 | common_len = intel_dp_common_rates(intel_dp, common_rates); |
| 1629 | 1600 | |
| @@ -1753,7 +1724,8 @@ found: · 123 unmodified lines | ||
| 1753 | 1724 | intel_link_compute_m_n(bpp, lane_count, |
| 1754 | 1725 | adjusted_mode->crtc_clock, |
| 1755 | 1726 | pipe_config->port_clock, |
| 1756 | − &pipe_config->dp_m_n); | |
| 1727 | + &pipe_config->dp_m_n, | |
| 1728 | + reduce_m_n); | |
| 1757 | 1729 | |
| 1758 | 1730 | if (intel_connector->panel.downclock_mode != NULL && |
| 1759 | 1731 | dev_priv->drrs.type == SEAMLESS_DRRS_SUPPORT) { |
| @@ -1761,7 +1733,8 @@ found: · 1 unmodified line | ||
| 1761 | 1733 | intel_link_compute_m_n(bpp, lane_count, |
| 1762 | 1734 | intel_connector->panel.downclock_mode->clock, |
| 1763 | 1735 | pipe_config->port_clock, |
| 1764 | − &pipe_config->dp_m2_n2); | |
| 1736 | + &pipe_config->dp_m2_n2, | |
| 1737 | + reduce_m_n); | |
| 1765 | 1738 | } |
| 1766 | 1739 | |
| 1767 | 1740 | /* |
| @@ -3622,7 +3595,8 @@ intel_edp_init_dpcd(struct intel_dp *intel_dp) · 1854 unmodified lines | ||
| 3622 | 3595 | if (!intel_dp_read_dpcd(intel_dp)) |
| 3623 | 3596 | return false; |
| 3624 | 3597 | |
| 3625 | − intel_dp_read_desc(intel_dp); | |
| 3598 | + drm_dp_read_desc(&intel_dp->aux, &intel_dp->desc, | |
| 3599 | + drm_dp_is_branch(intel_dp->dpcd)); | |
| 3626 | 3600 | |
| 3627 | 3601 | if (intel_dp->dpcd[DP_DPCD_REV] >= 0x11) |
| 3628 | 3602 | dev_priv->no_aux_handshake = intel_dp->dpcd[DP_MAX_DOWNSPREAD] & |
| @@ -4624,7 +4598,8 @@ intel_dp_long_pulse(struct intel_connector *intel_connector) · 995 unmodified lines | ||
| 4624 | 4598 | |
| 4625 | 4599 | intel_dp_print_rates(intel_dp); |
| 4626 | 4600 | |
| 4627 | − intel_dp_read_desc(intel_dp); | |
| 4601 | + drm_dp_read_desc(&intel_dp->aux, &intel_dp->desc, | |
| 4602 | + drm_dp_is_branch(intel_dp->dpcd)); | |
| 4628 | 4603 | |
| 4629 | 4604 | intel_dp_configure_mst(intel_dp); |
| 4630 | 4605 | |
| @@ -44,6 +44,8 @@ static bool intel_dp_mst_compute_config(struct intel_encoder *encoder, · 43 unmodified lines | ||
| 44 | 44 | int lane_count, slots; |
| 45 | 45 | const struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode; |
| 46 | 46 | int mst_pbn; |
| 47 | + bool reduce_m_n = drm_dp_has_quirk(&intel_dp->desc, | |
| 48 | + DP_DPCD_QUIRK_LIMITED_M_N); | |
| 47 | 49 | |
| 48 | 50 | pipe_config->has_pch_encoder = false; |
| 49 | 51 | bpp = 24; |
| @@ -75,7 +77,8 @@ static bool intel_dp_mst_compute_config(struct intel_encoder *encoder, · 25 unmodified lines | ||
| 75 | 77 | intel_link_compute_m_n(bpp, lane_count, |
| 76 | 78 | adjusted_mode->crtc_clock, |
| 77 | 79 | pipe_config->port_clock, |
| 78 | − &pipe_config->dp_m_n); | |
| 80 | + &pipe_config->dp_m_n, | |
| 81 | + reduce_m_n); | |
| 79 | 82 | |
| 80 | 83 | pipe_config->dp_m_n.tu = slots; |
| 81 | 84 | |
| @@ -906,14 +906,6 @@ enum link_m_n_set { · 905 unmodified lines | ||
| 906 | 906 | M2_N2 |
| 907 | 907 | }; |
| 908 | 908 | |
| 909 | −struct intel_dp_desc { | |
| 910 | − u8 oui[3]; | |
| 911 | − u8 device_id[6]; | |
| 912 | − u8 hw_rev; | |
| 913 | − u8 sw_major_rev; | |
| 914 | − u8 sw_minor_rev; | |
| 915 | −} __packed; | |
| 916 | − | |
| 917 | 909 | struct intel_dp_compliance_data { |
| 918 | 910 | unsigned long edid; |
| 919 | 911 | uint8_t video_pattern; |
| @@ -957,7 +949,7 @@ struct intel_dp { · 37 unmodified lines | ||
| 957 | 949 | /* Max link BW for the sink as per DPCD registers */ |
| 958 | 950 | int max_sink_link_bw; |
| 959 | 951 | /* sink or branch descriptor */ |
| 960 | − struct intel_dp_desc desc; | |
| 952 | + struct drm_dp_desc desc; | |
| 961 | 953 | struct drm_dp_aux aux; |
| 962 | 954 | enum intel_display_power_domain aux_power_domain; |
| 963 | 955 | uint8_t train_set[4]; |
| @@ -1532,9 +1524,6 @@ static inline unsigned int intel_dp_unused_lane_mask(int lane_count) · 568 unmodified lines | ||
| 1532 | 1524 | } |
| 1533 | 1525 | |
| 1534 | 1526 | bool intel_dp_read_dpcd(struct intel_dp *intel_dp); |
| 1535 | −bool __intel_dp_read_desc(struct intel_dp *intel_dp, | |
| 1536 | − struct intel_dp_desc *desc); | |
| 1537 | −bool intel_dp_read_desc(struct intel_dp *intel_dp); | |
| 1538 | 1527 | int intel_dp_link_required(int pixel_clock, int bpp); |
| 1539 | 1528 | int intel_dp_max_data_rate(int max_link_clock, int max_lanes); |
| 1540 | 1529 | bool intel_digital_port_connected(struct drm_i915_private *dev_priv, |
| @@ -1075,6 +1075,22 @@ int intel_ring_workarounds_emit(struct drm_i915_gem_request *req) · 1074 unmodified lines | ||
| 1075 | 1075 | return 0; |
| 1076 | 1076 | } |
| 1077 | 1077 | |
| 1078 | +static bool ring_is_idle(struct intel_engine_cs *engine) | |
| 1079 | +{ | |
| 1080 | + struct drm_i915_private *dev_priv = engine->i915; | |
| 1081 | + bool idle = true; | |
| 1082 | + | |
| 1083 | + intel_runtime_pm_get(dev_priv); | |
| 1084 | + | |
| 1085 | + /* No bit for gen2, so assume the CS parser is idle */ | |
| 1086 | + if (INTEL_GEN(dev_priv) > 2 && !(I915_READ_MODE(engine) & MODE_IDLE)) | |
| 1087 | + idle = false; | |
| 1088 | + | |
| 1089 | + intel_runtime_pm_put(dev_priv); | |
| 1090 | + | |
| 1091 | + return idle; | |
| 1092 | +} | |
| 1093 | + | |
| 1078 | 1094 | /** |
| 1079 | 1095 | * intel_engine_is_idle() - Report if the engine has finished process all work |
| 1080 | 1096 | * @engine: the intel_engine_cs |
| @@ -1084,8 +1100,6 @@ int intel_ring_workarounds_emit(struct drm_i915_gem_request *req) · 3 unmodified lines | ||
| 1084 | 1100 | */ |
| 1085 | 1101 | bool intel_engine_is_idle(struct intel_engine_cs *engine) |
| 1086 | 1102 | { |
| 1087 | − struct drm_i915_private *dev_priv = engine->i915; | |
| 1088 | − | |
| 1089 | 1103 | /* Any inflight/incomplete requests? */ |
| 1090 | 1104 | if (!i915_seqno_passed(intel_engine_get_seqno(engine), |
| 1091 | 1105 | intel_engine_last_submit(engine))) |
| @@ -1100,7 +1114,7 @@ bool intel_engine_is_idle(struct intel_engine_cs *engine) · 8 unmodified lines | ||
| 1100 | 1114 | return false; |
| 1101 | 1115 | |
| 1102 | 1116 | /* Ring stopped? */ |
| 1103 | − if (INTEL_GEN(dev_priv) > 2 && !(I915_READ_MODE(engine) & MODE_IDLE)) | |
| 1117 | + if (!ring_is_idle(engine)) | |
| 1104 | 1118 | return false; |
| 1105 | 1119 | |
| 1106 | 1120 | return true; |
| @@ -82,20 +82,10 @@ static unsigned int get_crtc_fence_y_offset(struct intel_crtc *crtc) · 81 unmodified lines | ||
| 82 | 82 | static void intel_fbc_get_plane_source_size(struct intel_fbc_state_cache *cache, |
| 83 | 83 | int *width, int *height) |
| 84 | 84 | { |
| 85 | − int w, h; | |
| 86 | − | |
| 87 | − if (drm_rotation_90_or_270(cache->plane.rotation)) { | |
| 88 | − w = cache->plane.src_h; | |
| 89 | − h = cache->plane.src_w; | |
| 90 | − } else { | |
| 91 | − w = cache->plane.src_w; | |
| 92 | − h = cache->plane.src_h; | |
| 93 | − } | |
| 94 | − | |
| 95 | 85 | if (width) |
| 96 | − *width = w; | |
| 86 | + *width = cache->plane.src_w; | |
| 97 | 87 | if (height) |
| 98 | − *height = h; | |
| 88 | + *height = cache->plane.src_h; | |
| 99 | 89 | } |
| 100 | 90 | |
| 101 | 91 | static int intel_fbc_calculate_cfb_size(struct drm_i915_private *dev_priv, |
| @@ -746,6 +736,11 @@ static void intel_fbc_update_state_cache(struct intel_crtc *crtc, · 644 unmodified lines | ||
| 746 | 736 | cache->crtc.hsw_bdw_pixel_rate = crtc_state->pixel_rate; |
| 747 | 737 | |
| 748 | 738 | cache->plane.rotation = plane_state->base.rotation; |
| 739 | + /* | |
| 740 | + * Src coordinates are already rotated by 270 degrees for | |
| 741 | + * the 90/270 degree plane rotation cases (to match the | |
| 742 | + * GTT mapping), hence no need to account for rotation here. | |
| 743 | + */ | |
| 749 | 744 | cache->plane.src_w = drm_rect_width(&plane_state->base.src) >> 16; |
| 750 | 745 | cache->plane.src_h = drm_rect_height(&plane_state->base.src) >> 16; |
| 751 | 746 | cache->plane.visible = plane_state->base.visible; |
| @@ -149,44 +149,10 @@ static void lpe_audio_platdev_destroy(struct drm_i915_private *dev_priv) · 148 unmodified lines | ||
| 149 | 149 | |
| 150 | 150 | static void lpe_audio_irq_unmask(struct irq_data *d) |
| 151 | 151 | { |
| 152 | − struct drm_i915_private *dev_priv = d->chip_data; | |
| 153 | − unsigned long irqflags; | |
| 154 | − u32 val = (I915_LPE_PIPE_A_INTERRUPT | | |
| 155 | − I915_LPE_PIPE_B_INTERRUPT); | |
| 156 | − | |
| 157 | − if (IS_CHERRYVIEW(dev_priv)) | |
| 158 | − val |= I915_LPE_PIPE_C_INTERRUPT; | |
| 159 | − | |
| 160 | − spin_lock_irqsave(&dev_priv->irq_lock, irqflags); | |
| 161 | − | |
| 162 | − dev_priv->irq_mask &= ~val; | |
| 163 | − I915_WRITE(VLV_IIR, val); | |
| 164 | − I915_WRITE(VLV_IIR, val); | |
| 165 | − I915_WRITE(VLV_IMR, dev_priv->irq_mask); | |
| 166 | − POSTING_READ(VLV_IMR); | |
| 167 | − | |
| 168 | − spin_unlock_irqrestore(&dev_priv->irq_lock, irqflags); | |
| 169 | 152 | } |
| 170 | 153 | |
| 171 | 154 | static void lpe_audio_irq_mask(struct irq_data *d) |
| 172 | 155 | { |
| 173 | − struct drm_i915_private *dev_priv = d->chip_data; | |
| 174 | − unsigned long irqflags; | |
| 175 | − u32 val = (I915_LPE_PIPE_A_INTERRUPT | | |
| 176 | − I915_LPE_PIPE_B_INTERRUPT); | |
| 177 | − | |
| 178 | − if (IS_CHERRYVIEW(dev_priv)) | |
| 179 | − val |= I915_LPE_PIPE_C_INTERRUPT; | |
| 180 | − | |
| 181 | − spin_lock_irqsave(&dev_priv->irq_lock, irqflags); | |
| 182 | − | |
| 183 | − dev_priv->irq_mask |= val; | |
| 184 | − I915_WRITE(VLV_IMR, dev_priv->irq_mask); | |
| 185 | − I915_WRITE(VLV_IIR, val); | |
| 186 | − I915_WRITE(VLV_IIR, val); | |
| 187 | − POSTING_READ(VLV_IIR); | |
| 188 | − | |
| 189 | − spin_unlock_irqrestore(&dev_priv->irq_lock, irqflags); | |
| 190 | 156 | } |
| 191 | 157 | |
| 192 | 158 | static struct irq_chip lpe_audio_irqchip = { |
| @@ -330,8 +296,6 @@ void intel_lpe_audio_teardown(struct drm_i915_private *dev_priv) · 137 unmodified lines | ||
| 330 | 296 | |
| 331 | 297 | desc = irq_to_desc(dev_priv->lpe_audio.irq); |
| 332 | 298 | |
| 333 | − lpe_audio_irq_mask(&desc->irq_data); | |
| 334 | − | |
| 335 | 299 | lpe_audio_platdev_destroy(dev_priv); |
| 336 | 300 | |
| 337 | 301 | irq_free_desc(dev_priv->lpe_audio.irq); |
| @@ -1989,7 +1989,7 @@ static int execlists_context_deferred_alloc(struct i915_gem_context *ctx, · 1988 unmodified lines | ||
| 1989 | 1989 | |
| 1990 | 1990 | ce->ring = ring; |
| 1991 | 1991 | ce->state = vma; |
| 1992 | − ce->initialised = engine->init_context == NULL; | |
| 1992 | + ce->initialised |= engine->init_context == NULL; | |
| 1993 | 1993 | |
| 1994 | 1994 | return 0; |
| 1995 | 1995 | |
| @@ -240,7 +240,7 @@ bool lspcon_init(struct intel_digital_port *intel_dig_port) · 239 unmodified lines | ||
| 240 | 240 | return false; |
| 241 | 241 | } |
| 242 | 242 | |
| 243 | − intel_dp_read_desc(dp); | |
| 243 | + drm_dp_read_desc(&dp->aux, &dp->desc, drm_dp_is_branch(dp->dpcd)); | |
| 244 | 244 | |
| 245 | 245 | DRM_DEBUG_KMS("Success: LSPCON init\n"); |
| 246 | 246 | return true; |
| @@ -3373,20 +3373,26 @@ skl_plane_downscale_amount(const struct intel_crtc_state *cstate, · 3372 unmodified lines | ||
| 3373 | 3373 | |
| 3374 | 3374 | /* n.b., src is 16.16 fixed point, dst is whole integer */ |
| 3375 | 3375 | if (plane->id == PLANE_CURSOR) { |
| 3376 | + /* | |
| 3377 | + * Cursors only support 0/180 degree rotation, | |
| 3378 | + * hence no need to account for rotation here. | |
| 3379 | + */ | |
| 3376 | 3380 | src_w = pstate->base.src_w; |
| 3377 | 3381 | src_h = pstate->base.src_h; |
| 3378 | 3382 | dst_w = pstate->base.crtc_w; |
| 3379 | 3383 | dst_h = pstate->base.crtc_h; |
| 3380 | 3384 | } else { |
| 3385 | + /* | |
| 3386 | + * Src coordinates are already rotated by 270 degrees for | |
| 3387 | + * the 90/270 degree plane rotation cases (to match the | |
| 3388 | + * GTT mapping), hence no need to account for rotation here. | |
| 3389 | + */ | |
| 3381 | 3390 | src_w = drm_rect_width(&pstate->base.src); |
| 3382 | 3391 | src_h = drm_rect_height(&pstate->base.src); |
| 3383 | 3392 | dst_w = drm_rect_width(&pstate->base.dst); |
| 3384 | 3393 | dst_h = drm_rect_height(&pstate->base.dst); |
| 3385 | 3394 | } |
| 3386 | 3395 | |
| 3387 | − if (drm_rotation_90_or_270(pstate->base.rotation)) | |
| 3388 | − swap(dst_w, dst_h); | |
| 3389 | − | |
| 3390 | 3396 | downscale_h = max(src_h / dst_h, (uint32_t)DRM_PLANE_HELPER_NO_SCALING); |
| 3391 | 3397 | downscale_w = max(src_w / dst_w, (uint32_t)DRM_PLANE_HELPER_NO_SCALING); |
| 3392 | 3398 | |
| @@ -3417,12 +3423,14 @@ skl_plane_relative_data_rate(const struct intel_crtc_state *cstate, · 24 unmodified lines | ||
| 3417 | 3423 | if (y && format != DRM_FORMAT_NV12) |
| 3418 | 3424 | return 0; |
| 3419 | 3425 | |
| 3426 | + /* | |
| 3427 | + * Src coordinates are already rotated by 270 degrees for | |
| 3428 | + * the 90/270 degree plane rotation cases (to match the | |
| 3429 | + * GTT mapping), hence no need to account for rotation here. | |
| 3430 | + */ | |
| 3420 | 3431 | width = drm_rect_width(&intel_pstate->base.src) >> 16; |
| 3421 | 3432 | height = drm_rect_height(&intel_pstate->base.src) >> 16; |
| 3422 | 3433 | |
| 3423 | − if (drm_rotation_90_or_270(pstate->rotation)) | |
| 3424 | − swap(width, height); | |
| 3425 | − | |
| 3426 | 3434 | /* for planar format */ |
| 3427 | 3435 | if (format == DRM_FORMAT_NV12) { |
| 3428 | 3436 | if (y) /* y-plane data rate */ |
| @@ -3505,12 +3513,14 @@ skl_ddb_min_alloc(const struct drm_plane_state *pstate, · 76 unmodified lines | ||
| 3505 | 3513 | fb->modifier != I915_FORMAT_MOD_Yf_TILED) |
| 3506 | 3514 | return 8; |
| 3507 | 3515 | |
| 3516 | + /* | |
| 3517 | + * Src coordinates are already rotated by 270 degrees for | |
| 3518 | + * the 90/270 degree plane rotation cases (to match the | |
| 3519 | + * GTT mapping), hence no need to account for rotation here. | |
| 3520 | + */ | |
| 3508 | 3521 | src_w = drm_rect_width(&intel_pstate->base.src) >> 16; |
| 3509 | 3522 | src_h = drm_rect_height(&intel_pstate->base.src) >> 16; |
| 3510 | 3523 | |
| 3511 | − if (drm_rotation_90_or_270(pstate->rotation)) | |
| 3512 | − swap(src_w, src_h); | |
| 3513 | − | |
| 3514 | 3524 | /* Halve UV plane width and height for NV12 */ |
| 3515 | 3525 | if (fb->format->format == DRM_FORMAT_NV12 && !y) { |
| 3516 | 3526 | src_w /= 2; |
| @@ -3794,13 +3804,15 @@ static int skl_compute_plane_wm(const struct drm_i915_private *dev_priv, · 277 unmodified lines | ||
| 3794 | 3804 | width = intel_pstate->base.crtc_w; |
| 3795 | 3805 | height = intel_pstate->base.crtc_h; |
| 3796 | 3806 | } else { |
| 3807 | + /* | |
| 3808 | + * Src coordinates are already rotated by 270 degrees for | |
| 3809 | + * the 90/270 degree plane rotation cases (to match the | |
| 3810 | + * GTT mapping), hence no need to account for rotation here. | |
| 3811 | + */ | |
| 3797 | 3812 | width = drm_rect_width(&intel_pstate->base.src) >> 16; |
| 3798 | 3813 | height = drm_rect_height(&intel_pstate->base.src) >> 16; |
| 3799 | 3814 | } |
| 3800 | 3815 | |
| 3801 | − if (drm_rotation_90_or_270(pstate->rotation)) | |
| 3802 | − swap(width, height); | |
| 3803 | − | |
| 3804 | 3816 | cpp = fb->format->cpp[0]; |
| 3805 | 3817 | plane_pixel_rate = skl_adjusted_plane_pixel_rate(cstate, intel_pstate); |
| 3806 | 3818 | |
| @@ -4335,10 +4347,18 @@ skl_compute_wm(struct drm_atomic_state *state) · 528 unmodified lines | ||
| 4335 | 4347 | struct drm_crtc_state *cstate; |
| 4336 | 4348 | struct intel_atomic_state *intel_state = to_intel_atomic_state(state); |
| 4337 | 4349 | struct skl_wm_values *results = &intel_state->wm_results; |
| 4350 | + struct drm_device *dev = state->dev; | |
| 4338 | 4351 | struct skl_pipe_wm *pipe_wm; |
| 4339 | 4352 | bool changed = false; |
| 4340 | 4353 | int ret, i; |
| 4341 | 4354 | |
| 4355 | + /* | |
| 4356 | + * When we distrust bios wm we always need to recompute to set the | |
| 4357 | + * expected DDB allocations for each CRTC. | |
| 4358 | + */ | |
| 4359 | + if (to_i915(dev)->wm.distrust_bios_wm) | |
| 4360 | + changed = true; | |
| 4361 | + | |
| 4342 | 4362 | /* |
| 4343 | 4363 | * If this transaction isn't actually touching any CRTC's, don't |
| 4344 | 4364 | * bother with watermark calculation. Note that if we pass this |
| @@ -4349,6 +4369,7 @@ skl_compute_wm(struct drm_atomic_state *state) · 4 unmodified lines | ||
| 4349 | 4369 | */ |
| 4350 | 4370 | for_each_new_crtc_in_state(state, crtc, cstate, i) |
| 4351 | 4371 | changed = true; |
| 4372 | + | |
| 4352 | 4373 | if (!changed) |
| 4353 | 4374 | return 0; |
| 4354 | 4375 | |
| @@ -435,8 +435,9 @@ static bool intel_psr_match_conditions(struct intel_dp *intel_dp) · 434 unmodified lines | ||
| 435 | 435 | } |
| 436 | 436 | |
| 437 | 437 | /* PSR2 is restricted to work with panel resolutions upto 3200x2000 */ |
| 438 | − if (intel_crtc->config->pipe_src_w > 3200 || | |
| 439 | − intel_crtc->config->pipe_src_h > 2000) { | |
| 438 | + if (dev_priv->psr.psr2_support && | |
| 439 | + (intel_crtc->config->pipe_src_w > 3200 || | |
| 440 | + intel_crtc->config->pipe_src_h > 2000)) { | |
| 440 | 441 | dev_priv->psr.psr2_support = false; |
| 441 | 442 | return false; |
| 442 | 443 | } |
| @@ -83,10 +83,13 @@ int intel_usecs_to_scanlines(const struct drm_display_mode *adjusted_mode, · 82 unmodified lines | ||
| 83 | 83 | */ |
| 84 | 84 | void intel_pipe_update_start(struct intel_crtc *crtc) |
| 85 | 85 | { |
| 86 | + struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); | |
| 86 | 87 | const struct drm_display_mode *adjusted_mode = &crtc->config->base.adjusted_mode; |
| 87 | 88 | long timeout = msecs_to_jiffies_timeout(1); |
| 88 | 89 | int scanline, min, max, vblank_start; |
| 89 | 90 | wait_queue_head_t *wq = drm_crtc_vblank_waitqueue(&crtc->base); |
| 91 | + bool need_vlv_dsi_wa = (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) && | |
| 92 | + intel_crtc_has_type(crtc->config, INTEL_OUTPUT_DSI); | |
| 90 | 93 | DEFINE_WAIT(wait); |
| 91 | 94 | |
| 92 | 95 | vblank_start = adjusted_mode->crtc_vblank_start; |
| @@ -139,6 +142,24 @@ void intel_pipe_update_start(struct intel_crtc *crtc) · 46 unmodified lines | ||
| 139 | 142 | |
| 140 | 143 | drm_crtc_vblank_put(&crtc->base); |
| 141 | 144 | |
| 145 | + /* | |
| 146 | + * On VLV/CHV DSI the scanline counter would appear to | |
| 147 | + * increment approx. 1/3 of a scanline before start of vblank. | |
| 148 | + * The registers still get latched at start of vblank however. | |
| 149 | + * This means we must not write any registers on the first | |
| 150 | + * line of vblank (since not the whole line is actually in | |
| 151 | + * vblank). And unfortunately we can't use the interrupt to | |
| 152 | + * wait here since it will fire too soon. We could use the | |
| 153 | + * frame start interrupt instead since it will fire after the | |
| 154 | + * critical scanline, but that would require more changes | |
| 155 | + * in the interrupt code. So for now we'll just do the nasty | |
| 156 | + * thing and poll for the bad scanline to pass us by. | |
| 157 | + * | |
| 158 | + * FIXME figure out if BXT+ DSI suffers from this as well | |
| 159 | + */ | |
| 160 | + while (need_vlv_dsi_wa && scanline == vblank_start) | |
| 161 | + scanline = intel_get_crtc_scanline(crtc); | |
| 162 | + | |
| 142 | 163 | crtc->debug.scanline_start = scanline; |
| 143 | 164 | crtc->debug.start_vbl_time = ktime_get(); |
| 144 | 165 | crtc->debug.start_vbl_count = intel_crtc_get_vblank_counter(crtc); |
| @@ -59,8 +59,6 @@ struct drm_i915_gem_request; · 58 unmodified lines | ||
| 59 | 59 | * available in the work queue (note, the queue is shared, |
| 60 | 60 | * not per-engine). It is OK for this to be nonzero, but |
| 61 | 61 | * it should not be huge! |
| 62 | − * q_fail: failed to enqueue a work item. This should never happen, | |
| 63 | − * because we check for space beforehand. | |
| 64 | 62 | * b_fail: failed to ring the doorbell. This should never happen, unless |
| 65 | 63 | * somehow the hardware misbehaves, or maybe if the GuC firmware |
| 66 | 64 | * crashes? We probably need to reset the GPU to recover. |
| @@ -320,7 +320,7 @@ static unsigned long max_dwords(struct drm_i915_gem_object *obj) · 319 unmodified lines | ||
| 320 | 320 | static int igt_ctx_exec(void *arg) |
| 321 | 321 | { |
| 322 | 322 | struct drm_i915_private *i915 = arg; |
| 323 | − struct drm_i915_gem_object *obj; | |
| 323 | + struct drm_i915_gem_object *obj = NULL; | |
| 324 | 324 | struct drm_file *file; |
| 325 | 325 | IGT_TIMEOUT(end_time); |
| 326 | 326 | LIST_HEAD(objects); |
| @@ -359,7 +359,7 @@ static int igt_ctx_exec(void *arg) · 32 unmodified lines | ||
| 359 | 359 | } |
| 360 | 360 | |
| 361 | 361 | for_each_engine(engine, i915, id) { |
| 362 | − if (dw == 0) { | |
| 362 | + if (!obj) { | |
| 363 | 363 | obj = create_test_object(ctx, file, &objects); |
| 364 | 364 | if (IS_ERR(obj)) { |
| 365 | 365 | err = PTR_ERR(obj); |
| @@ -376,8 +376,10 @@ static int igt_ctx_exec(void *arg) · 10 unmodified lines | ||
| 376 | 376 | goto out_unlock; |
| 377 | 377 | } |
| 378 | 378 | |
| 379 | − if (++dw == max_dwords(obj)) | |
| 379 | + if (++dw == max_dwords(obj)) { | |
| 380 | + obj = NULL; | |
| 380 | 381 | dw = 0; |
| 382 | + } | |
| 381 | 383 | ndwords++; |
| 382 | 384 | } |
| 383 | 385 | ncontexts++; |
| @@ -673,7 +673,7 @@ static int imx_ldb_bind(struct device *dev, struct device *master, void *data) · 672 unmodified lines | ||
| 673 | 673 | ret = drm_of_find_panel_or_bridge(child, |
| 674 | 674 | imx_ldb->lvds_mux ? 4 : 2, 0, |
| 675 | 675 | &channel->panel, &channel->bridge); |
| 676 | − if (ret) | |
| 676 | + if (ret && ret != -ENODEV) | |
| 677 | 677 | return ret; |
| 678 | 678 | |
| 679 | 679 | /* panel ddc only if there is no bridge */ |
| @@ -19,6 +19,7 @@ · 18 unmodified lines | ||
| 19 | 19 | #include <drm/drm_of.h> |
| 20 | 20 | #include <linux/clk.h> |
| 21 | 21 | #include <linux/component.h> |
| 22 | +#include <linux/iopoll.h> | |
| 22 | 23 | #include <linux/irq.h> |
| 23 | 24 | #include <linux/of.h> |
| 24 | 25 | #include <linux/of_platform.h> |
| @@ -900,16 +901,12 @@ static int mtk_dsi_host_detach(struct mipi_dsi_host *host, · 875 unmodified lines | ||
| 900 | 901 | |
| 901 | 902 | static void mtk_dsi_wait_for_idle(struct mtk_dsi *dsi) |
| 902 | 903 | { |
| 903 | − u32 timeout_ms = 500000; /* total 1s ~ 2s timeout */ | |
| 904 | − | |
| 905 | − while (timeout_ms--) { | |
| 906 | − if (!(readl(dsi->regs + DSI_INTSTA) & DSI_BUSY)) | |
| 907 | − break; | |
| 908 | − | |
| 909 | − usleep_range(2, 4); | |
| 910 | − } | |
| 904 | + int ret; | |
| 905 | + u32 val; | |
| 911 | 906 | |
| 912 | − if (timeout_ms == 0) { | |
| 907 | + ret = readl_poll_timeout(dsi->regs + DSI_INTSTA, val, !(val & DSI_BUSY), | |
| 908 | + 4, 2000000); | |
| 909 | + if (ret) { | |
| 913 | 910 | DRM_WARN("polling dsi wait not busy timeout!\n"); |
| 914 | 911 | |
| 915 | 912 | mtk_dsi_enable(dsi); |
| @@ -1062,7 +1062,7 @@ static int mtk_hdmi_setup_vendor_specific_infoframe(struct mtk_hdmi *hdmi, · 1061 unmodified lines | ||
| 1062 | 1062 | } |
| 1063 | 1063 | |
| 1064 | 1064 | err = hdmi_vendor_infoframe_pack(&frame, buffer, sizeof(buffer)); |
| 1065 | − if (err) { | |
| 1065 | + if (err < 0) { | |
| 1066 | 1066 | dev_err(hdmi->dev, "Failed to pack vendor infoframe: %zd\n", |
| 1067 | 1067 | err); |
| 1068 | 1068 | return err; |
| @@ -152,7 +152,7 @@ static struct regmap_config meson_regmap_config = { · 151 unmodified lines | ||
| 152 | 152 | .max_register = 0x1000, |
| 153 | 153 | }; |
| 154 | 154 | |
| 155 | −static int meson_drv_bind(struct device *dev) | |
| 155 | +static int meson_drv_bind_master(struct device *dev, bool has_components) | |
| 156 | 156 | { |
| 157 | 157 | struct platform_device *pdev = to_platform_device(dev); |
| 158 | 158 | struct meson_drm *priv; |
| @@ -233,10 +233,12 @@ static int meson_drv_bind(struct device *dev) · 74 unmodified lines | ||
| 233 | 233 | if (ret) |
| 234 | 234 | goto free_drm; |
| 235 | 235 | |
| 236 | − ret = component_bind_all(drm->dev, drm); | |
| 237 | − if (ret) { | |
| 238 | − dev_err(drm->dev, "Couldn't bind all components\n"); | |
| 239 | − goto free_drm; | |
| 236 | + if (has_components) { | |
| 237 | + ret = component_bind_all(drm->dev, drm); | |
| 238 | + if (ret) { | |
| 239 | + dev_err(drm->dev, "Couldn't bind all components\n"); | |
| 240 | + goto free_drm; | |
| 241 | + } | |
| 240 | 242 | } |
| 241 | 243 | |
| 242 | 244 | ret = meson_plane_create(priv); |
| @@ -276,6 +278,11 @@ free_drm: · 33 unmodified lines | ||
| 276 | 278 | return ret; |
| 277 | 279 | } |
| 278 | 280 | |
| 281 | +static int meson_drv_bind(struct device *dev) | |
| 282 | +{ | |
| 283 | + return meson_drv_bind_master(dev, true); | |
| 284 | +} | |
| 285 | + | |
| 279 | 286 | static void meson_drv_unbind(struct device *dev) |
| 280 | 287 | { |
| 281 | 288 | struct drm_device *drm = dev_get_drvdata(dev); |
| @@ -357,6 +364,9 @@ static int meson_drv_probe(struct platform_device *pdev) · 75 unmodified lines | ||
| 357 | 364 | count += meson_probe_remote(pdev, &match, np, remote); |
| 358 | 365 | } |
| 359 | 366 | |
| 367 | + if (count && !match) | |
| 368 | + return meson_drv_bind_master(&pdev->dev, false); | |
| 369 | + | |
| 360 | 370 | /* If some endpoints were found, initialize the nodes */ |
| 361 | 371 | if (count) { |
| 362 | 372 | dev_info(&pdev->dev, "Queued %d outputs on vpu\n", count); |
| @@ -1173,7 +1173,10 @@ static int mga_crtc_mode_set(struct drm_crtc *crtc, · 1172 unmodified lines | ||
| 1173 | 1173 | |
| 1174 | 1174 | |
| 1175 | 1175 | if (IS_G200_SE(mdev)) { |
| 1176 | − if (mdev->unique_rev_id >= 0x02) { | |
| 1176 | + if (mdev->unique_rev_id >= 0x04) { | |
| 1177 | + WREG8(MGAREG_CRTCEXT_INDEX, 0x06); | |
| 1178 | + WREG8(MGAREG_CRTCEXT_DATA, 0); | |
| 1179 | + } else if (mdev->unique_rev_id >= 0x02) { | |
| 1177 | 1180 | u8 hi_pri_lvl; |
| 1178 | 1181 | u32 bpp; |
| 1179 | 1182 | u32 mb; |
| @@ -1639,6 +1642,10 @@ static int mga_vga_mode_valid(struct drm_connector *connector, · 459 unmodified lines | ||
| 1639 | 1642 | if (mga_vga_calculate_mode_bandwidth(mode, bpp) |
| 1640 | 1643 | > (30100 * 1024)) |
| 1641 | 1644 | return MODE_BANDWIDTH; |
| 1645 | + } else { | |
| 1646 | + if (mga_vga_calculate_mode_bandwidth(mode, bpp) | |
| 1647 | + > (55000 * 1024)) | |
| 1648 | + return MODE_BANDWIDTH; | |
| 1642 | 1649 | } |
| 1643 | 1650 | } else if (mdev->type == G200_WB) { |
| 1644 | 1651 | if (mode->hdisplay > 1280) |
| @@ -13,6 +13,7 @@ config DRM_MSM · 12 unmodified lines | ||
| 13 | 13 | select QCOM_SCM |
| 14 | 14 | select SND_SOC_HDMI_CODEC if SND_SOC |
| 15 | 15 | select SYNC_FILE |
| 16 | + select PM_OPP | |
| 16 | 17 | default y |
| 17 | 18 | help |
| 18 | 19 | DRM/KMS driver for MSM/snapdragon. |
| @@ -116,7 +116,7 @@ static int mdss_hw_irqdomain_map(struct irq_domain *d, unsigned int irq, · 115 unmodified lines | ||
| 116 | 116 | return 0; |
| 117 | 117 | } |
| 118 | 118 | |
| 119 | −static struct irq_domain_ops mdss_hw_irqdomain_ops = { | |
| 119 | +static const struct irq_domain_ops mdss_hw_irqdomain_ops = { | |
| 120 | 120 | .map = mdss_hw_irqdomain_map, |
| 121 | 121 | .xlate = irq_domain_xlate_onecell, |
| 122 | 122 | }; |
| @@ -225,9 +225,10 @@ mdp5_plane_duplicate_state(struct drm_plane *plane) · 224 unmodified lines | ||
| 225 | 225 | |
| 226 | 226 | mdp5_state = kmemdup(to_mdp5_plane_state(plane->state), |
| 227 | 227 | sizeof(*mdp5_state), GFP_KERNEL); |
| 228 | + if (!mdp5_state) | |
| 229 | + return NULL; | |
| 228 | 230 | |
| 229 | − if (mdp5_state && mdp5_state->base.fb) | |
| 230 | − drm_framebuffer_reference(mdp5_state->base.fb); | |
| 231 | + __drm_atomic_helper_plane_duplicate_state(plane, &mdp5_state->base); | |
| 231 | 232 | |
| 232 | 233 | return &mdp5_state->base; |
| 233 | 234 | } |
| @@ -444,6 +445,10 @@ static int mdp5_plane_atomic_check_with_state(struct drm_crtc_state *crtc_state, · 210 unmodified lines | ||
| 444 | 445 | mdp5_pipe_release(state->state, old_hwpipe); |
| 445 | 446 | mdp5_pipe_release(state->state, old_right_hwpipe); |
| 446 | 447 | } |
| 448 | + } else { | |
| 449 | + mdp5_pipe_release(state->state, mdp5_state->hwpipe); | |
| 450 | + mdp5_pipe_release(state->state, mdp5_state->r_hwpipe); | |
| 451 | + mdp5_state->hwpipe = mdp5_state->r_hwpipe = NULL; | |
| 447 | 452 | } |
| 448 | 453 | |
| 449 | 454 | return 0; |
| @@ -830,6 +830,7 @@ static struct drm_driver msm_driver = { · 829 unmodified lines | ||
| 830 | 830 | .prime_fd_to_handle = drm_gem_prime_fd_to_handle, |
| 831 | 831 | .gem_prime_export = drm_gem_prime_export, |
| 832 | 832 | .gem_prime_import = drm_gem_prime_import, |
| 833 | + .gem_prime_res_obj = msm_gem_prime_res_obj, | |
| 833 | 834 | .gem_prime_pin = msm_gem_prime_pin, |
| 834 | 835 | .gem_prime_unpin = msm_gem_prime_unpin, |
| 835 | 836 | .gem_prime_get_sg_table = msm_gem_prime_get_sg_table, |
| @@ -224,6 +224,7 @@ struct sg_table *msm_gem_prime_get_sg_table(struct drm_gem_object *obj); · 223 unmodified lines | ||
| 224 | 224 | void *msm_gem_prime_vmap(struct drm_gem_object *obj); |
| 225 | 225 | void msm_gem_prime_vunmap(struct drm_gem_object *obj, void *vaddr); |
| 226 | 226 | int msm_gem_prime_mmap(struct drm_gem_object *obj, struct vm_area_struct *vma); |
| 227 | +struct reservation_object *msm_gem_prime_res_obj(struct drm_gem_object *obj); | |
| 227 | 228 | struct drm_gem_object *msm_gem_prime_import_sg_table(struct drm_device *dev, |
| 228 | 229 | struct dma_buf_attachment *attach, struct sg_table *sg); |
| 229 | 230 | int msm_gem_prime_pin(struct drm_gem_object *obj); |
| @@ -99,8 +99,8 @@ void msm_update_fence(struct msm_fence_context *fctx, uint32_t fence) · 98 unmodified lines | ||
| 99 | 99 | } |
| 100 | 100 | |
| 101 | 101 | struct msm_fence { |
| 102 | − struct msm_fence_context *fctx; | |
| 103 | 102 | struct dma_fence base; |
| 103 | + struct msm_fence_context *fctx; | |
| 104 | 104 | }; |
| 105 | 105 | |
| 106 | 106 | static inline struct msm_fence *to_msm_fence(struct dma_fence *fence) |
| @@ -130,19 +130,13 @@ static bool msm_fence_signaled(struct dma_fence *fence) · 23 unmodified lines | ||
| 130 | 130 | return fence_completed(f->fctx, f->base.seqno); |
| 131 | 131 | } |
| 132 | 132 | |
| 133 | −static void msm_fence_release(struct dma_fence *fence) | |
| 134 | −{ | |
| 135 | − struct msm_fence *f = to_msm_fence(fence); | |
| 136 | − kfree_rcu(f, base.rcu); | |
| 137 | −} | |
| 138 | − | |
| 139 | 133 | static const struct dma_fence_ops msm_fence_ops = { |
| 140 | 134 | .get_driver_name = msm_fence_get_driver_name, |
| 141 | 135 | .get_timeline_name = msm_fence_get_timeline_name, |
| 142 | 136 | .enable_signaling = msm_fence_enable_signaling, |
| 143 | 137 | .signaled = msm_fence_signaled, |
| 144 | 138 | .wait = dma_fence_default_wait, |
| 145 | − .release = msm_fence_release, | |
| 139 | + .release = dma_fence_free, | |
| 146 | 140 | }; |
| 147 | 141 | |
| 148 | 142 | struct dma_fence * |
| @@ -758,6 +758,8 @@ static int msm_gem_new_impl(struct drm_device *dev, · 757 unmodified lines | ||
| 758 | 758 | struct msm_gem_object *msm_obj; |
| 759 | 759 | bool use_vram = false; |
| 760 | 760 | |
| 761 | + WARN_ON(!mutex_is_locked(&dev->struct_mutex)); | |
| 762 | + | |
| 761 | 763 | switch (flags & MSM_BO_CACHE_MASK) { |
| 762 | 764 | case MSM_BO_UNCACHED: |
| 763 | 765 | case MSM_BO_CACHED: |
| @@ -853,7 +855,11 @@ struct drm_gem_object *msm_gem_import(struct drm_device *dev, · 89 unmodified lines | ||
| 853 | 855 | |
| 854 | 856 | size = PAGE_ALIGN(dmabuf->size); |
| 855 | 857 | |
| 858 | + /* Take mutex so we can modify the inactive list in msm_gem_new_impl */ | |
| 859 | + mutex_lock(&dev->struct_mutex); | |
| 856 | 860 | ret = msm_gem_new_impl(dev, size, MSM_BO_WC, dmabuf->resv, &obj); |
| 861 | + mutex_unlock(&dev->struct_mutex); | |
| 862 | + | |
| 857 | 863 | if (ret) |
| 858 | 864 | goto fail; |
| 859 | 865 | |
| @@ -70,3 +70,10 @@ void msm_gem_prime_unpin(struct drm_gem_object *obj) · 69 unmodified lines | ||
| 70 | 70 | if (!obj->import_attach) |
| 71 | 71 | msm_gem_put_pages(obj); |
| 72 | 72 | } |
| 73 | + | |
| 74 | +struct reservation_object *msm_gem_prime_res_obj(struct drm_gem_object *obj) | |
| 75 | +{ | |
| 76 | + struct msm_gem_object *msm_obj = to_msm_bo(obj); | |
| 77 | + | |
| 78 | + return msm_obj->resv; | |
| 79 | +} | |
| @@ -410,12 +410,11 @@ int msm_ioctl_gem_submit(struct drm_device *dev, void *data, · 409 unmodified lines | ||
| 410 | 410 | if (!in_fence) |
| 411 | 411 | return -EINVAL; |
| 412 | 412 | |
| 413 | − /* TODO if we get an array-fence due to userspace merging multiple | |
| 414 | − * fences, we need a way to determine if all the backing fences | |
| 415 | − * are from our own context.. | |
| 413 | + /* | |
| 414 | + * Wait if the fence is from a foreign context, or if the fence | |
| 415 | + * array contains any fence from a foreign context. | |
| 416 | 416 | */ |
| 417 | − | |
| 418 | − if (in_fence->context != gpu->fctx->context) { | |
| 417 | + if (!dma_fence_match_context(in_fence, gpu->fctx->context)) { | |
| 419 | 418 | ret = dma_fence_wait(in_fence, true); |
| 420 | 419 | if (ret) |
| 421 | 420 | return ret; |
| @@ -496,8 +495,9 @@ int msm_ioctl_gem_submit(struct drm_device *dev, void *data, · 74 unmodified lines | ||
| 496 | 495 | goto out; |
| 497 | 496 | } |
| 498 | 497 | |
| 499 | − if ((submit_cmd.size + submit_cmd.submit_offset) >= | |
| 500 | − msm_obj->base.size) { | |
| 498 | + if (!submit_cmd.size || | |
| 499 | + ((submit_cmd.size + submit_cmd.submit_offset) > | |
| 500 | + msm_obj->base.size)) { | |
| 501 | 501 | DRM_ERROR("invalid cmdstream size: %u\n", submit_cmd.size); |
| 502 | 502 | ret = -EINVAL; |
| 503 | 503 | goto out; |
| @@ -549,9 +549,9 @@ static int get_clocks(struct platform_device *pdev, struct msm_gpu *gpu) · 548 unmodified lines | ||
| 549 | 549 | gpu->grp_clks[i] = get_clock(dev, name); |
| 550 | 550 | |
| 551 | 551 | /* Remember the key clocks that we need to control later */ |
| 552 | − if (!strcmp(name, "core")) | |
| 552 | + if (!strcmp(name, "core") || !strcmp(name, "core_clk")) | |
| 553 | 553 | gpu->core_clk = gpu->grp_clks[i]; |
| 554 | − else if (!strcmp(name, "rbbmtimer")) | |
| 554 | + else if (!strcmp(name, "rbbmtimer") || !strcmp(name, "rbbmtimer_clk")) | |
| 555 | 555 | gpu->rbbmtimer_clk = gpu->grp_clks[i]; |
| 556 | 556 | |
| 557 | 557 | ++i; |
| @@ -35,6 +35,13 @@ · 34 unmodified lines | ||
| 35 | 35 | #include "mxsfb_drv.h" |
| 36 | 36 | #include "mxsfb_regs.h" |
| 37 | 37 | |
| 38 | +#define MXS_SET_ADDR 0x4 | |
| 39 | +#define MXS_CLR_ADDR 0x8 | |
| 40 | +#define MODULE_CLKGATE BIT(30) | |
| 41 | +#define MODULE_SFTRST BIT(31) | |
| 42 | +/* 1 second delay should be plenty of time for block reset */ | |
| 43 | +#define RESET_TIMEOUT 1000000 | |
| 44 | + | |
| 38 | 45 | static u32 set_hsync_pulse_width(struct mxsfb_drm_private *mxsfb, u32 val) |
| 39 | 46 | { |
| 40 | 47 | return (val & mxsfb->devdata->hs_wdth_mask) << |
| @@ -159,6 +166,36 @@ static void mxsfb_disable_controller(struct mxsfb_drm_private *mxsfb) · 118 unmodified lines | ||
| 159 | 166 | clk_disable_unprepare(mxsfb->clk_disp_axi); |
| 160 | 167 | } |
| 161 | 168 | |
| 169 | +/* | |
| 170 | + * Clear the bit and poll it cleared. This is usually called with | |
| 171 | + * a reset address and mask being either SFTRST(bit 31) or CLKGATE | |
| 172 | + * (bit 30). | |
| 173 | + */ | |
| 174 | +static int clear_poll_bit(void __iomem *addr, u32 mask) | |
| 175 | +{ | |
| 176 | + u32 reg; | |
| 177 | + | |
| 178 | + writel(mask, addr + MXS_CLR_ADDR); | |
| 179 | + return readl_poll_timeout(addr, reg, !(reg & mask), 0, RESET_TIMEOUT); | |
| 180 | +} | |
| 181 | + | |
| 182 | +static int mxsfb_reset_block(void __iomem *reset_addr) | |
| 183 | +{ | |
| 184 | + int ret; | |
| 185 | + | |
| 186 | + ret = clear_poll_bit(reset_addr, MODULE_SFTRST); | |
| 187 | + if (ret) | |
| 188 | + return ret; | |
| 189 | + | |
| 190 | + writel(MODULE_CLKGATE, reset_addr + MXS_CLR_ADDR); | |
| 191 | + | |
| 192 | + ret = clear_poll_bit(reset_addr, MODULE_SFTRST); | |
| 193 | + if (ret) | |
| 194 | + return ret; | |
| 195 | + | |
| 196 | + return clear_poll_bit(reset_addr, MODULE_CLKGATE); | |
| 197 | +} | |
| 198 | + | |
| 162 | 199 | static void mxsfb_crtc_mode_set_nofb(struct mxsfb_drm_private *mxsfb) |
| 163 | 200 | { |
| 164 | 201 | struct drm_display_mode *m = &mxsfb->pipe.crtc.state->adjusted_mode; |
| @@ -173,6 +210,11 @@ static void mxsfb_crtc_mode_set_nofb(struct mxsfb_drm_private *mxsfb) · 8 unmodified lines | ||
| 173 | 210 | */ |
| 174 | 211 | mxsfb_enable_axi_clk(mxsfb); |
| 175 | 212 | |
| 213 | + /* Mandatory eLCDIF reset as per the Reference Manual */ | |
| 214 | + err = mxsfb_reset_block(mxsfb->base); | |
| 215 | + if (err) | |
| 216 | + return; | |
| 217 | + | |
| 176 | 218 | /* Clear the FIFOs */ |
| 177 | 219 | writel(CTRL1_FIFO_CLEAR, mxsfb->base + LCDC_CTRL1 + REG_SET); |
| 178 | 220 | |
| @@ -4,6 +4,7 @@ · 3 unmodified lines | ||
| 4 | 4 | |
| 5 | 5 | struct nvkm_alarm { |
| 6 | 6 | struct list_head head; |
| 7 | + struct list_head exec; | |
| 7 | 8 | u64 timestamp; |
| 8 | 9 | void (*func)(struct nvkm_alarm *); |
| 9 | 10 | }; |
| @@ -80,7 +80,7 @@ int nouveau_modeset = -1; · 79 unmodified lines | ||
| 80 | 80 | module_param_named(modeset, nouveau_modeset, int, 0400); |
| 81 | 81 | |
| 82 | 82 | MODULE_PARM_DESC(runpm, "disable (0), force enable (1), optimus only default (-1)"); |
| 83 | −int nouveau_runtime_pm = -1; | |
| 83 | +static int nouveau_runtime_pm = -1; | |
| 84 | 84 | module_param_named(runpm, nouveau_runtime_pm, int, 0400); |
| 85 | 85 | |
| 86 | 86 | static struct drm_driver driver_stub; |
| @@ -495,7 +495,7 @@ nouveau_drm_load(struct drm_device *dev, unsigned long flags) · 408 unmodified lines | ||
| 495 | 495 | nouveau_fbcon_init(dev); |
| 496 | 496 | nouveau_led_init(dev); |
| 497 | 497 | |
| 498 | − if (nouveau_runtime_pm != 0) { | |
| 498 | + if (nouveau_pmops_runtime()) { | |
| 499 | 499 | pm_runtime_use_autosuspend(dev->dev); |
| 500 | 500 | pm_runtime_set_autosuspend_delay(dev->dev, 5000); |
| 501 | 501 | pm_runtime_set_active(dev->dev); |
| @@ -527,7 +527,7 @@ nouveau_drm_unload(struct drm_device *dev) · 25 unmodified lines | ||
| 527 | 527 | { |
| 528 | 528 | struct nouveau_drm *drm = nouveau_drm(dev); |
| 529 | 529 | |
| 530 | − if (nouveau_runtime_pm != 0) { | |
| 530 | + if (nouveau_pmops_runtime()) { | |
| 531 | 531 | pm_runtime_get_sync(dev->dev); |
| 532 | 532 | pm_runtime_forbid(dev->dev); |
| 533 | 533 | } |
| @@ -726,6 +726,14 @@ nouveau_pmops_thaw(struct device *dev) · 192 unmodified lines | ||
| 726 | 726 | return nouveau_do_resume(drm_dev, false); |
| 727 | 727 | } |
| 728 | 728 | |
| 729 | +bool | |
| 730 | +nouveau_pmops_runtime() | |
| 731 | +{ | |
| 732 | + if (nouveau_runtime_pm == -1) | |
| 733 | + return nouveau_is_optimus() || nouveau_is_v1_dsm(); | |
| 734 | + return nouveau_runtime_pm == 1; | |
| 735 | +} | |
| 736 | + | |
| 729 | 737 | static int |
| 730 | 738 | nouveau_pmops_runtime_suspend(struct device *dev) |
| 731 | 739 | { |
| @@ -733,14 +741,7 @@ nouveau_pmops_runtime_suspend(struct device *dev) · 1 unmodified line | ||
| 733 | 741 | struct drm_device *drm_dev = pci_get_drvdata(pdev); |
| 734 | 742 | int ret; |
| 735 | 743 | |
| 736 | − if (nouveau_runtime_pm == 0) { | |
| 737 | − pm_runtime_forbid(dev); | |
| 738 | − return -EBUSY; | |
| 739 | − } | |
| 740 | − | |
| 741 | − /* are we optimus enabled? */ | |
| 742 | − if (nouveau_runtime_pm == -1 && !nouveau_is_optimus() && !nouveau_is_v1_dsm()) { | |
| 743 | − DRM_DEBUG_DRIVER("failing to power off - not optimus\n"); | |
| 744 | + if (!nouveau_pmops_runtime()) { | |
| 744 | 745 | pm_runtime_forbid(dev); |
| 745 | 746 | return -EBUSY; |
| 746 | 747 | } |
| @@ -765,8 +766,10 @@ nouveau_pmops_runtime_resume(struct device *dev) · 18 unmodified lines | ||
| 765 | 766 | struct nvif_device *device = &nouveau_drm(drm_dev)->client.device; |
| 766 | 767 | int ret; |
| 767 | 768 | |
| 768 | − if (nouveau_runtime_pm == 0) | |
| 769 | − return -EINVAL; | |
| 769 | + if (!nouveau_pmops_runtime()) { | |
| 770 | + pm_runtime_forbid(dev); | |
| 771 | + return -EBUSY; | |
| 772 | + } | |
| 770 | 773 | |
| 771 | 774 | pci_set_power_state(pdev, PCI_D0); |
| 772 | 775 | pci_restore_state(pdev); |
| @@ -796,14 +799,7 @@ nouveau_pmops_runtime_idle(struct device *dev) · 23 unmodified lines | ||
| 796 | 799 | struct nouveau_drm *drm = nouveau_drm(drm_dev); |
| 797 | 800 | struct drm_crtc *crtc; |
| 798 | 801 | |
| 799 | − if (nouveau_runtime_pm == 0) { | |
| 800 | − pm_runtime_forbid(dev); | |
| 801 | − return -EBUSY; | |
| 802 | − } | |
| 803 | − | |
| 804 | − /* are we optimus enabled? */ | |
| 805 | − if (nouveau_runtime_pm == -1 && !nouveau_is_optimus() && !nouveau_is_v1_dsm()) { | |
| 806 | − DRM_DEBUG_DRIVER("failing to power off - not optimus\n"); | |
| 802 | + if (!nouveau_pmops_runtime()) { | |
| 807 | 803 | pm_runtime_forbid(dev); |
| 808 | 804 | return -EBUSY; |
| 809 | 805 | } |
| @@ -108,8 +108,6 @@ nouveau_cli(struct drm_file *fpriv) · 107 unmodified lines | ||
| 108 | 108 | #include <nvif/object.h> |
| 109 | 109 | #include <nvif/device.h> |
| 110 | 110 | |
| 111 | −extern int nouveau_runtime_pm; | |
| 112 | − | |
| 113 | 111 | struct nouveau_drm { |
| 114 | 112 | struct nouveau_cli client; |
| 115 | 113 | struct drm_device *dev; |
| @@ -195,6 +193,7 @@ nouveau_drm(struct drm_device *dev) · 79 unmodified lines | ||
| 195 | 193 | |
| 196 | 194 | int nouveau_pmops_suspend(struct device *); |
| 197 | 195 | int nouveau_pmops_resume(struct device *); |
| 196 | +bool nouveau_pmops_runtime(void); | |
| 198 | 197 | |
| 199 | 198 | #include <nvkm/core/tegra.h> |
| 200 | 199 | |
| @@ -87,7 +87,7 @@ void · 86 unmodified lines | ||
| 87 | 87 | nouveau_vga_init(struct nouveau_drm *drm) |
| 88 | 88 | { |
| 89 | 89 | struct drm_device *dev = drm->dev; |
| 90 | − bool runtime = false; | |
| 90 | + bool runtime = nouveau_pmops_runtime(); | |
| 91 | 91 | |
| 92 | 92 | /* only relevant for PCI devices */ |
| 93 | 93 | if (!dev->pdev) |
| @@ -99,10 +99,6 @@ nouveau_vga_init(struct nouveau_drm *drm) · 5 unmodified lines | ||
| 99 | 99 | if (pci_is_thunderbolt_attached(dev->pdev)) |
| 100 | 100 | return; |
| 101 | 101 | |
| 102 | − if (nouveau_runtime_pm == 1) | |
| 103 | − runtime = true; | |
| 104 | − if ((nouveau_runtime_pm == -1) && (nouveau_is_optimus() || nouveau_is_v1_dsm())) | |
| 105 | − runtime = true; | |
| 106 | 102 | vga_switcheroo_register_client(dev->pdev, &nouveau_switcheroo_ops, runtime); |
| 107 | 103 | |
| 108 | 104 | if (runtime && nouveau_is_v1_dsm() && !nouveau_is_optimus()) |
| @@ -113,18 +109,13 @@ void · 4 unmodified lines | ||
| 113 | 109 | nouveau_vga_fini(struct nouveau_drm *drm) |
| 114 | 110 | { |
| 115 | 111 | struct drm_device *dev = drm->dev; |
| 116 | − bool runtime = false; | |
| 112 | + bool runtime = nouveau_pmops_runtime(); | |
| 117 | 113 | |
| 118 | 114 | vga_client_register(dev->pdev, NULL, NULL, NULL); |
| 119 | 115 | |
| 120 | 116 | if (pci_is_thunderbolt_attached(dev->pdev)) |
| 121 | 117 | return; |
| 122 | 118 | |
| 123 | − if (nouveau_runtime_pm == 1) | |
| 124 | − runtime = true; | |
| 125 | − if ((nouveau_runtime_pm == -1) && (nouveau_is_optimus() || nouveau_is_v1_dsm())) | |
| 126 | − runtime = true; | |
| 127 | − | |
| 128 | 119 | vga_switcheroo_unregister_client(dev->pdev); |
| 129 | 120 | if (runtime && nouveau_is_v1_dsm() && !nouveau_is_optimus()) |
| 130 | 121 | vga_switcheroo_fini_domain_pm_ops(drm->dev->dev); |
| @@ -2107,7 +2107,8 @@ nv50_head_atomic_check(struct drm_crtc *crtc, struct drm_crtc_state *state) · 2106 unmodified lines | ||
| 2107 | 2107 | asyc->set.dither = true; |
| 2108 | 2108 | } |
| 2109 | 2109 | } else { |
| 2110 | − asyc->set.mask = ~0; | |
| 2110 | + if (asyc) | |
| 2111 | + asyc->set.mask = ~0; | |
| 2111 | 2112 | asyh->set.mask = ~0; |
| 2112 | 2113 | } |
| 2113 | 2114 | |
| @@ -50,7 +50,8 @@ nvkm_timer_alarm_trigger(struct nvkm_timer *tmr) · 49 unmodified lines | ||
| 50 | 50 | /* Move to completed list. We'll drop the lock before |
| 51 | 51 | * executing the callback so it can reschedule itself. |
| 52 | 52 | */ |
| 53 | − list_move_tail(&alarm->head, &exec); | |
| 53 | + list_del_init(&alarm->head); | |
| 54 | + list_add(&alarm->exec, &exec); | |
| 54 | 55 | } |
| 55 | 56 | |
| 56 | 57 | /* Shut down interrupt if no more pending alarms. */ |
| @@ -59,8 +60,8 @@ nvkm_timer_alarm_trigger(struct nvkm_timer *tmr) · 2 unmodified lines | ||
| 59 | 60 | spin_unlock_irqrestore(&tmr->lock, flags); |
| 60 | 61 | |
| 61 | 62 | /* Execute completed callbacks. */ |
| 62 | − list_for_each_entry_safe(alarm, atemp, &exec, head) { | |
| 63 | − list_del_init(&alarm->head); | |
| 63 | + list_for_each_entry_safe(alarm, atemp, &exec, exec) { | |
| 64 | + list_del(&alarm->exec); | |
| 64 | 65 | alarm->func(alarm); |
| 65 | 66 | } |
| 66 | 67 | } |
| @@ -9267,8 +9267,11 @@ static void dce8_program_watermarks(struct radeon_device *rdev, · 9266 unmodified lines | ||
| 9267 | 9267 | u32 tmp, wm_mask; |
| 9268 | 9268 | |
| 9269 | 9269 | if (radeon_crtc->base.enabled && num_heads && mode) { |
| 9270 | − active_time = 1000000UL * (u32)mode->crtc_hdisplay / (u32)mode->clock; | |
| 9271 | − line_time = min((u32) (1000000UL * (u32)mode->crtc_htotal / (u32)mode->clock), (u32)65535); | |
| 9270 | + active_time = (u32) div_u64((u64)mode->crtc_hdisplay * 1000000, | |
| 9271 | + (u32)mode->clock); | |
| 9272 | + line_time = (u32) div_u64((u64)mode->crtc_htotal * 1000000, | |
| 9273 | + (u32)mode->clock); | |
| 9274 | + line_time = min(line_time, (u32)65535); | |
| 9272 | 9275 | |
| 9273 | 9276 | /* watermark for high clocks */ |
| 9274 | 9277 | if ((rdev->pm.pm_method == PM_METHOD_DPM) && |
| @@ -2266,8 +2266,11 @@ static void evergreen_program_watermarks(struct radeon_device *rdev, · 2265 unmodified lines | ||
| 2266 | 2266 | fixed20_12 a, b, c; |
| 2267 | 2267 | |
| 2268 | 2268 | if (radeon_crtc->base.enabled && num_heads && mode) { |
| 2269 | − active_time = 1000000UL * (u32)mode->crtc_hdisplay / (u32)mode->clock; | |
| 2270 | − line_time = min((u32) (1000000UL * (u32)mode->crtc_htotal / (u32)mode->clock), (u32)65535); | |
| 2269 | + active_time = (u32) div_u64((u64)mode->crtc_hdisplay * 1000000, | |
| 2270 | + (u32)mode->clock); | |
| 2271 | + line_time = (u32) div_u64((u64)mode->crtc_htotal * 1000000, | |
| 2272 | + (u32)mode->clock); | |
| 2273 | + line_time = min(line_time, (u32)65535); | |
| 2271 | 2274 | priority_a_cnt = 0; |
| 2272 | 2275 | priority_b_cnt = 0; |
| 2273 | 2276 | dram_channels = evergreen_get_number_of_dram_channels(rdev); |
| @@ -621,7 +621,7 @@ static int radeon_uvd_cs_reloc(struct radeon_cs_parser *p, · 620 unmodified lines | ||
| 621 | 621 | } |
| 622 | 622 | |
| 623 | 623 | /* TODO: is this still necessary on NI+ ? */ |
| 624 | − if ((cmd == 0 || cmd == 1 || cmd == 0x3) && | |
| 624 | + if ((cmd == 0 || cmd == 0x3) && | |
| 625 | 625 | (start >> 28) != (p->rdev->uvd.gpu_addr >> 28)) { |
| 626 | 626 | DRM_ERROR("msg/fb buffer %LX-%LX out of 256MB segment!\n", |
| 627 | 627 | start, end); |
| @@ -2284,8 +2284,11 @@ static void dce6_program_watermarks(struct radeon_device *rdev, · 2283 unmodified lines | ||
| 2284 | 2284 | fixed20_12 a, b, c; |
| 2285 | 2285 | |
| 2286 | 2286 | if (radeon_crtc->base.enabled && num_heads && mode) { |
| 2287 | − active_time = 1000000UL * (u32)mode->crtc_hdisplay / (u32)mode->clock; | |
| 2288 | − line_time = min((u32) (1000000UL * (u32)mode->crtc_htotal / (u32)mode->clock), (u32)65535); | |
| 2287 | + active_time = (u32) div_u64((u64)mode->crtc_hdisplay * 1000000, | |
| 2288 | + (u32)mode->clock); | |
| 2289 | + line_time = (u32) div_u64((u64)mode->crtc_htotal * 1000000, | |
| 2290 | + (u32)mode->clock); | |
| 2291 | + line_time = min(line_time, (u32)65535); | |
| 2289 | 2292 | priority_a_cnt = 0; |
| 2290 | 2293 | priority_b_cnt = 0; |
| 2291 | 2294 | |
| @@ -245,8 +245,6 @@ rockchip_dp_drm_encoder_atomic_check(struct drm_encoder *encoder, · 244 unmodified lines | ||
| 245 | 245 | struct drm_connector_state *conn_state) |
| 246 | 246 | { |
| 247 | 247 | struct rockchip_crtc_state *s = to_rockchip_crtc_state(crtc_state); |
| 248 | − struct rockchip_dp_device *dp = to_dp(encoder); | |
| 249 | − int ret; | |
| 250 | 248 | |
| 251 | 249 | /* |
| 252 | 250 | * The hardware IC designed that VOP must output the RGB10 video |
| @@ -258,16 +256,6 @@ rockchip_dp_drm_encoder_atomic_check(struct drm_encoder *encoder, · 5 unmodified lines | ||
| 258 | 256 | |
| 259 | 257 | s->output_mode = ROCKCHIP_OUT_MODE_AAAA; |
| 260 | 258 | s->output_type = DRM_MODE_CONNECTOR_eDP; |
| 261 | − if (dp->data->chip_type == RK3399_EDP) { | |
| 262 | − /* | |
| 263 | − * For RK3399, VOP Lit must code the out mode to RGB888, | |
| 264 | − * VOP Big must code the out mode to RGB10. | |
| 265 | − */ | |
| 266 | − ret = drm_of_encoder_active_endpoint_id(dp->dev->of_node, | |
| 267 | − encoder); | |
| 268 | − if (ret > 0) | |
| 269 | − s->output_mode = ROCKCHIP_OUT_MODE_P888; | |
| 270 | − } | |
| 271 | 259 | |
| 272 | 260 | return 0; |
| 273 | 261 | } |
| @@ -615,7 +615,6 @@ static void cdn_dp_encoder_enable(struct drm_encoder *encoder) · 614 unmodified lines | ||
| 615 | 615 | { |
| 616 | 616 | struct cdn_dp_device *dp = encoder_to_dp(encoder); |
| 617 | 617 | int ret, val; |
| 618 | − struct rockchip_crtc_state *state; | |
| 619 | 618 | |
| 620 | 619 | ret = drm_of_encoder_active_endpoint_id(dp->dev->of_node, encoder); |
| 621 | 620 | if (ret < 0) { |
| @@ -625,14 +624,10 @@ static void cdn_dp_encoder_enable(struct drm_encoder *encoder) · 3 unmodified lines | ||
| 625 | 624 | |
| 626 | 625 | DRM_DEV_DEBUG_KMS(dp->dev, "vop %s output to cdn-dp\n", |
| 627 | 626 | (ret) ? "LIT" : "BIG"); |
| 628 | − state = to_rockchip_crtc_state(encoder->crtc->state); | |
| 629 | − if (ret) { | |
| 627 | + if (ret) | |
| 630 | 628 | val = DP_SEL_VOP_LIT | (DP_SEL_VOP_LIT << 16); |
| 631 | − state->output_mode = ROCKCHIP_OUT_MODE_P888; | |
| 632 | − } else { | |
| 629 | + else | |
| 633 | 630 | val = DP_SEL_VOP_LIT << 16; |
| 634 | − state->output_mode = ROCKCHIP_OUT_MODE_AAAA; | |
| 635 | − } | |
| 636 | 631 | |
| 637 | 632 | ret = cdn_dp_grf_write(dp, GRF_SOC_CON9, val); |
| 638 | 633 | if (ret) |
| @@ -875,6 +875,7 @@ static bool vop_crtc_mode_fixup(struct drm_crtc *crtc, · 874 unmodified lines | ||
| 875 | 875 | static void vop_crtc_enable(struct drm_crtc *crtc) |
| 876 | 876 | { |
| 877 | 877 | struct vop *vop = to_vop(crtc); |
| 878 | + const struct vop_data *vop_data = vop->data; | |
| 878 | 879 | struct rockchip_crtc_state *s = to_rockchip_crtc_state(crtc->state); |
| 879 | 880 | struct drm_display_mode *adjusted_mode = &crtc->state->adjusted_mode; |
| 880 | 881 | u16 hsync_len = adjusted_mode->hsync_end - adjusted_mode->hsync_start; |
| @@ -967,6 +968,13 @@ static void vop_crtc_enable(struct drm_crtc *crtc) · 86 unmodified lines | ||
| 967 | 968 | DRM_DEV_ERROR(vop->dev, "unsupported connector_type [%d]\n", |
| 968 | 969 | s->output_type); |
| 969 | 970 | } |
| 971 | + | |
| 972 | + /* | |
| 973 | + * if vop is not support RGB10 output, need force RGB10 to RGB888. | |
| 974 | + */ | |
| 975 | + if (s->output_mode == ROCKCHIP_OUT_MODE_AAAA && | |
| 976 | + !(vop_data->feature & VOP_FEATURE_OUTPUT_RGB10)) | |
| 977 | + s->output_mode = ROCKCHIP_OUT_MODE_P888; | |
| 970 | 978 | VOP_CTRL_SET(vop, out_mode, s->output_mode); |
| 971 | 979 | |
| 972 | 980 | VOP_CTRL_SET(vop, htotal_pw, (htotal << 16) | hsync_len); |
| @@ -142,6 +142,9 @@ struct vop_data { · 141 unmodified lines | ||
| 142 | 142 | const struct vop_intr *intr; |
| 143 | 143 | const struct vop_win_data *win; |
| 144 | 144 | unsigned int win_size; |
| 145 | + | |
| 146 | +#define VOP_FEATURE_OUTPUT_RGB10 BIT(0) | |
| 147 | + u64 feature; | |
| 145 | 148 | }; |
| 146 | 149 | |
| 147 | 150 | /* interrupt define */ |
| @@ -275,6 +275,7 @@ static const struct vop_intr rk3288_vop_intr = { · 274 unmodified lines | ||
| 275 | 275 | static const struct vop_data rk3288_vop = { |
| 276 | 276 | .init_table = rk3288_init_reg_table, |
| 277 | 277 | .table_size = ARRAY_SIZE(rk3288_init_reg_table), |
| 278 | + .feature = VOP_FEATURE_OUTPUT_RGB10, | |
| 278 | 279 | .intr = &rk3288_vop_intr, |
| 279 | 280 | .ctrl = &rk3288_ctrl_data, |
| 280 | 281 | .win = rk3288_vop_win_data, |
| @@ -343,6 +344,7 @@ static const struct vop_reg_data rk3399_init_reg_table[] = { · 62 unmodified lines | ||
| 343 | 344 | static const struct vop_data rk3399_vop_big = { |
| 344 | 345 | .init_table = rk3399_init_reg_table, |
| 345 | 346 | .table_size = ARRAY_SIZE(rk3399_init_reg_table), |
| 347 | + .feature = VOP_FEATURE_OUTPUT_RGB10, | |
| 346 | 348 | .intr = &rk3399_vop_intr, |
| 347 | 349 | .ctrl = &rk3399_ctrl_data, |
| 348 | 350 | /* |
| @@ -451,18 +451,6 @@ fail: · 450 unmodified lines | ||
| 451 | 451 | |
| 452 | 452 | |
| 453 | 453 | #ifdef CONFIG_DRM_TEGRA_STAGING |
| 454 | −static struct tegra_drm_context * | |
| 455 | −tegra_drm_file_get_context(struct tegra_drm_file *file, u32 id) | |
| 456 | −{ | |
| 457 | − struct tegra_drm_context *context; | |
| 458 | − | |
| 459 | − mutex_lock(&file->lock); | |
| 460 | − context = idr_find(&file->contexts, id); | |
| 461 | − mutex_unlock(&file->lock); | |
| 462 | − | |
| 463 | − return context; | |
| 464 | −} | |
| 465 | − | |
| 466 | 454 | static int tegra_gem_create(struct drm_device *drm, void *data, |
| 467 | 455 | struct drm_file *file) |
| 468 | 456 | { |
| @@ -551,7 +539,7 @@ static int tegra_client_open(struct tegra_drm_file *fpriv, · 82 unmodified lines | ||
| 551 | 539 | if (err < 0) |
| 552 | 540 | return err; |
| 553 | 541 | |
| 554 | − err = idr_alloc(&fpriv->contexts, context, 0, 0, GFP_KERNEL); | |
| 542 | + err = idr_alloc(&fpriv->contexts, context, 1, 0, GFP_KERNEL); | |
| 555 | 543 | if (err < 0) { |
| 556 | 544 | client->ops->close_channel(context); |
| 557 | 545 | return err; |
| @@ -606,7 +594,7 @@ static int tegra_close_channel(struct drm_device *drm, void *data, · 48 unmodified lines | ||
| 606 | 594 | |
| 607 | 595 | mutex_lock(&fpriv->lock); |
| 608 | 596 | |
| 609 | − context = tegra_drm_file_get_context(fpriv, args->context); | |
| 597 | + context = idr_find(&fpriv->contexts, args->context); | |
| 610 | 598 | if (!context) { |
| 611 | 599 | err = -EINVAL; |
| 612 | 600 | goto unlock; |
| @@ -631,7 +619,7 @@ static int tegra_get_syncpt(struct drm_device *drm, void *data, · 18 unmodified lines | ||
| 631 | 619 | |
| 632 | 620 | mutex_lock(&fpriv->lock); |
| 633 | 621 | |
| 634 | − context = tegra_drm_file_get_context(fpriv, args->context); | |
| 622 | + context = idr_find(&fpriv->contexts, args->context); | |
| 635 | 623 | if (!context) { |
| 636 | 624 | err = -ENODEV; |
| 637 | 625 | goto unlock; |
| @@ -660,7 +648,7 @@ static int tegra_submit(struct drm_device *drm, void *data, · 22 unmodified lines | ||
| 660 | 648 | |
| 661 | 649 | mutex_lock(&fpriv->lock); |
| 662 | 650 | |
| 663 | − context = tegra_drm_file_get_context(fpriv, args->context); | |
| 651 | + context = idr_find(&fpriv->contexts, args->context); | |
| 664 | 652 | if (!context) { |
| 665 | 653 | err = -ENODEV; |
| 666 | 654 | goto unlock; |
| @@ -685,7 +673,7 @@ static int tegra_get_syncpt_base(struct drm_device *drm, void *data, · 18 unmodified lines | ||
| 685 | 673 | |
| 686 | 674 | mutex_lock(&fpriv->lock); |
| 687 | 675 | |
| 688 | − context = tegra_drm_file_get_context(fpriv, args->context); | |
| 676 | + context = idr_find(&fpriv->contexts, args->context); | |
| 689 | 677 | if (!context) { |
| 690 | 678 | err = -ENODEV; |
| 691 | 679 | goto unlock; |
| @@ -41,9 +41,9 @@ · 40 unmodified lines | ||
| 41 | 41 | #include <drm/ttm/ttm_module.h> |
| 42 | 42 | #include "vmwgfx_fence.h" |
| 43 | 43 | |
| 44 | −#define VMWGFX_DRIVER_DATE "20170221" | |
| 44 | +#define VMWGFX_DRIVER_DATE "20170607" | |
| 45 | 45 | #define VMWGFX_DRIVER_MAJOR 2 |
| 46 | −#define VMWGFX_DRIVER_MINOR 12 | |
| 46 | +#define VMWGFX_DRIVER_MINOR 13 | |
| 47 | 47 | #define VMWGFX_DRIVER_PATCHLEVEL 0 |
| 48 | 48 | #define VMWGFX_FILE_PAGE_OFFSET 0x00100000 |
| 49 | 49 | #define VMWGFX_FIFO_STATIC_SIZE (1024*1024) |
| @@ -368,6 +368,8 @@ static void *vmw_local_fifo_reserve(struct vmw_private *dev_priv, · 367 unmodified lines | ||
| 368 | 368 | return fifo_state->static_buffer; |
| 369 | 369 | else { |
| 370 | 370 | fifo_state->dynamic_buffer = vmalloc(bytes); |
| 371 | + if (!fifo_state->dynamic_buffer) | |
| 372 | + goto out_err; | |
| 371 | 373 | return fifo_state->dynamic_buffer; |
| 372 | 374 | } |
| 373 | 375 | } |
| @@ -274,108 +274,6 @@ void vmw_kms_cursor_post_execbuf(struct vmw_private *dev_priv) · 273 unmodified lines | ||
| 274 | 274 | } |
| 275 | 275 | |
| 276 | 276 | |
| 277 | − | |
| 278 | −/** | |
| 279 | − * vmw_du_cursor_plane_update() - Update cursor image and location | |
| 280 | − * | |
| 281 | − * @plane: plane object to update | |
| 282 | − * @crtc: owning CRTC of @plane | |
| 283 | − * @fb: framebuffer to flip onto plane | |
| 284 | − * @crtc_x: x offset of plane on crtc | |
| 285 | − * @crtc_y: y offset of plane on crtc | |
| 286 | − * @crtc_w: width of plane rectangle on crtc | |
| 287 | − * @crtc_h: height of plane rectangle on crtc | |
| 288 | − * @src_x: Not used | |
| 289 | − * @src_y: Not used | |
| 290 | − * @src_w: Not used | |
| 291 | − * @src_h: Not used | |
| 292 | − * | |
| 293 | − * | |
| 294 | − * RETURNS: | |
| 295 | − * Zero on success, error code on failure | |
| 296 | − */ | |
| 297 | −int vmw_du_cursor_plane_update(struct drm_plane *plane, | |
| 298 | − struct drm_crtc *crtc, | |
| 299 | − struct drm_framebuffer *fb, | |
| 300 | − int crtc_x, int crtc_y, | |
| 301 | − unsigned int crtc_w, | |
| 302 | − unsigned int crtc_h, | |
| 303 | − uint32_t src_x, uint32_t src_y, | |
| 304 | − uint32_t src_w, uint32_t src_h) | |
| 305 | −{ | |
| 306 | − struct vmw_private *dev_priv = vmw_priv(crtc->dev); | |
| 307 | − struct vmw_display_unit *du = vmw_crtc_to_du(crtc); | |
| 308 | − struct vmw_surface *surface = NULL; | |
| 309 | − struct vmw_dma_buffer *dmabuf = NULL; | |
| 310 | − s32 hotspot_x, hotspot_y; | |
| 311 | − int ret; | |
| 312 | − | |
| 313 | − hotspot_x = du->hotspot_x + fb->hot_x; | |
| 314 | − hotspot_y = du->hotspot_y + fb->hot_y; | |
| 315 | − | |
| 316 | − /* A lot of the code assumes this */ | |
| 317 | − if (crtc_w != 64 || crtc_h != 64) { | |
| 318 | − ret = -EINVAL; | |
| 319 | − goto out; | |
| 320 | − } | |
| 321 | − | |
| 322 | − if (vmw_framebuffer_to_vfb(fb)->dmabuf) | |
| 323 | − dmabuf = vmw_framebuffer_to_vfbd(fb)->buffer; | |
| 324 | − else | |
| 325 | − surface = vmw_framebuffer_to_vfbs(fb)->surface; | |
| 326 | − | |
| 327 | − if (surface && !surface->snooper.image) { | |
| 328 | − DRM_ERROR("surface not suitable for cursor\n"); | |
| 329 | − ret = -EINVAL; | |
| 330 | − goto out; | |
| 331 | − } | |
| 332 | − | |
| 333 | − /* setup new image */ | |
| 334 | − ret = 0; | |
| 335 | − if (surface) { | |
| 336 | − /* vmw_user_surface_lookup takes one reference */ | |
| 337 | − du->cursor_surface = surface; | |
| 338 | − | |
| 339 | − du->cursor_age = du->cursor_surface->snooper.age; | |
| 340 | − | |
| 341 | − ret = vmw_cursor_update_image(dev_priv, surface->snooper.image, | |
| 342 | − 64, 64, hotspot_x, hotspot_y); | |
| 343 | − } else if (dmabuf) { | |
| 344 | − /* vmw_user_surface_lookup takes one reference */ | |
| 345 | − du->cursor_dmabuf = dmabuf; | |
| 346 | − | |
| 347 | − ret = vmw_cursor_update_dmabuf(dev_priv, dmabuf, crtc_w, crtc_h, | |
| 348 | − hotspot_x, hotspot_y); | |
| 349 | − } else { | |
| 350 | − vmw_cursor_update_position(dev_priv, false, 0, 0); | |
| 351 | − goto out; | |
| 352 | − } | |
| 353 | − | |
| 354 | − if (!ret) { | |
| 355 | − du->cursor_x = crtc_x + du->set_gui_x; | |
| 356 | − du->cursor_y = crtc_y + du->set_gui_y; | |
| 357 | − | |
| 358 | − vmw_cursor_update_position(dev_priv, true, | |
| 359 | − du->cursor_x + hotspot_x, | |
| 360 | − du->cursor_y + hotspot_y); | |
| 361 | − } | |
| 362 | − | |
| 363 | −out: | |
| 364 | − return ret; | |
| 365 | −} | |
| 366 | − | |
| 367 | − | |
| 368 | −int vmw_du_cursor_plane_disable(struct drm_plane *plane) | |
| 369 | −{ | |
| 370 | − if (plane->fb) { | |
| 371 | − drm_framebuffer_unreference(plane->fb); | |
| 372 | − plane->fb = NULL; | |
| 373 | − } | |
| 374 | − | |
| 375 | − return -EINVAL; | |
| 376 | −} | |
| 377 | − | |
| 378 | − | |
| 379 | 277 | void vmw_du_cursor_plane_destroy(struct drm_plane *plane) |
| 380 | 278 | { |
| 381 | 279 | vmw_cursor_update_position(plane->dev->dev_private, false, 0, 0); |
| @@ -472,18 +370,6 @@ vmw_du_cursor_plane_prepare_fb(struct drm_plane *plane, · 90 unmodified lines | ||
| 472 | 370 | } |
| 473 | 371 | |
| 474 | 372 | |
| 475 | −void | |
| 476 | −vmw_du_cursor_plane_atomic_disable(struct drm_plane *plane, | |
| 477 | − struct drm_plane_state *old_state) | |
| 478 | −{ | |
| 479 | − struct drm_crtc *crtc = plane->state->crtc ?: old_state->crtc; | |
| 480 | − struct vmw_private *dev_priv = vmw_priv(crtc->dev); | |
| 481 | − | |
| 482 | − drm_atomic_set_fb_for_plane(plane->state, NULL); | |
| 483 | − vmw_cursor_update_position(dev_priv, false, 0, 0); | |
| 484 | −} | |
| 485 | − | |
| 486 | − | |
| 487 | 373 | void |
| 488 | 374 | vmw_du_cursor_plane_atomic_update(struct drm_plane *plane, |
| 489 | 375 | struct drm_plane_state *old_state) |
| @@ -1498,6 +1384,7 @@ vmw_kms_new_framebuffer(struct vmw_private *dev_priv, · 1008 unmodified lines | ||
| 1498 | 1384 | */ |
| 1499 | 1385 | if (vmw_kms_srf_ok(dev_priv, mode_cmd->width, mode_cmd->height) && |
| 1500 | 1386 | dmabuf && only_2d && |
| 1387 | + mode_cmd->width > 64 && /* Don't create a proxy for cursor */ | |
| 1501 | 1388 | dev_priv->active_display_unit == vmw_du_screen_target) { |
| 1502 | 1389 | ret = vmw_create_dmabuf_proxy(dev_priv->dev, mode_cmd, |
| 1503 | 1390 | dmabuf, &surface); |
| @@ -256,10 +256,6 @@ int vmw_du_crtc_gamma_set(struct drm_crtc *crtc, · 255 unmodified lines | ||
| 256 | 256 | u16 *r, u16 *g, u16 *b, |
| 257 | 257 | uint32_t size, |
| 258 | 258 | struct drm_modeset_acquire_ctx *ctx); |
| 259 | −int vmw_du_crtc_cursor_set2(struct drm_crtc *crtc, struct drm_file *file_priv, | |
| 260 | − uint32_t handle, uint32_t width, uint32_t height, | |
| 261 | − int32_t hot_x, int32_t hot_y); | |
| 262 | −int vmw_du_crtc_cursor_move(struct drm_crtc *crtc, int x, int y); | |
| 263 | 259 | int vmw_du_connector_set_property(struct drm_connector *connector, |
| 264 | 260 | struct drm_property *property, |
| 265 | 261 | uint64_t val); |
| @@ -339,15 +335,6 @@ void vmw_kms_create_implicit_placement_property(struct vmw_private *dev_priv, · 73 unmodified lines | ||
| 339 | 335 | /* Universal Plane Helpers */ |
| 340 | 336 | void vmw_du_primary_plane_destroy(struct drm_plane *plane); |
| 341 | 337 | void vmw_du_cursor_plane_destroy(struct drm_plane *plane); |
| 342 | −int vmw_du_cursor_plane_disable(struct drm_plane *plane); | |
| 343 | −int vmw_du_cursor_plane_update(struct drm_plane *plane, | |
| 344 | − struct drm_crtc *crtc, | |
| 345 | − struct drm_framebuffer *fb, | |
| 346 | − int crtc_x, int crtc_y, | |
| 347 | − unsigned int crtc_w, | |
| 348 | − unsigned int crtc_h, | |
| 349 | − uint32_t src_x, uint32_t src_y, | |
| 350 | − uint32_t src_w, uint32_t src_h); | |
| 351 | 338 | |
| 352 | 339 | /* Atomic Helpers */ |
| 353 | 340 | int vmw_du_primary_plane_atomic_check(struct drm_plane *plane, |
| @@ -356,8 +343,6 @@ int vmw_du_cursor_plane_atomic_check(struct drm_plane *plane, · 2 unmodified lines | ||
| 356 | 343 | struct drm_plane_state *state); |
| 357 | 344 | void vmw_du_cursor_plane_atomic_update(struct drm_plane *plane, |
| 358 | 345 | struct drm_plane_state *old_state); |
| 359 | −void vmw_du_cursor_plane_atomic_disable(struct drm_plane *plane, | |
| 360 | − struct drm_plane_state *old_state); | |
| 361 | 346 | int vmw_du_cursor_plane_prepare_fb(struct drm_plane *plane, |
| 362 | 347 | struct drm_plane_state *new_state); |
| 363 | 348 | void vmw_du_plane_cleanup_fb(struct drm_plane *plane, |
| @@ -56,6 +56,8 @@ enum stdu_content_type { · 55 unmodified lines | ||
| 56 | 56 | * @right: Right side of bounding box. |
| 57 | 57 | * @top: Top side of bounding box. |
| 58 | 58 | * @bottom: Bottom side of bounding box. |
| 59 | + * @fb_left: Left side of the framebuffer/content bounding box | |
| 60 | + * @fb_top: Top of the framebuffer/content bounding box | |
| 59 | 61 | * @buf: DMA buffer when DMA-ing between buffer and screen targets. |
| 60 | 62 | * @sid: Surface ID when copying between surface and screen targets. |
| 61 | 63 | */ |
| @@ -63,6 +65,7 @@ struct vmw_stdu_dirty { · 1 unmodified line | ||
| 63 | 65 | struct vmw_kms_dirty base; |
| 64 | 66 | SVGA3dTransferType transfer; |
| 65 | 67 | s32 left, right, top, bottom; |
| 68 | + s32 fb_left, fb_top; | |
| 66 | 69 | u32 pitch; |
| 67 | 70 | union { |
| 68 | 71 | struct vmw_dma_buffer *buf; |
| @@ -647,7 +650,7 @@ static void vmw_stdu_dmabuf_fifo_commit(struct vmw_kms_dirty *dirty) · 578 unmodified lines | ||
| 647 | 650 | * |
| 648 | 651 | * @dirty: The closure structure. |
| 649 | 652 | * |
| 650 | − * This function calculates the bounding box for all the incoming clips | |
| 653 | + * This function calculates the bounding box for all the incoming clips. | |
| 651 | 654 | */ |
| 652 | 655 | static void vmw_stdu_dmabuf_cpu_clip(struct vmw_kms_dirty *dirty) |
| 653 | 656 | { |
| @@ -656,11 +659,19 @@ static void vmw_stdu_dmabuf_cpu_clip(struct vmw_kms_dirty *dirty) · 2 unmodified lines | ||
| 656 | 659 | |
| 657 | 660 | dirty->num_hits = 1; |
| 658 | 661 | |
| 659 | − /* Calculate bounding box */ | |
| 662 | + /* Calculate destination bounding box */ | |
| 660 | 663 | ddirty->left = min_t(s32, ddirty->left, dirty->unit_x1); |
| 661 | 664 | ddirty->top = min_t(s32, ddirty->top, dirty->unit_y1); |
| 662 | 665 | ddirty->right = max_t(s32, ddirty->right, dirty->unit_x2); |
| 663 | 666 | ddirty->bottom = max_t(s32, ddirty->bottom, dirty->unit_y2); |
| 667 | + | |
| 668 | + /* | |
| 669 | + * Calculate content bounding box. We only need the top-left | |
| 670 | + * coordinate because width and height will be the same as the | |
| 671 | + * destination bounding box above | |
| 672 | + */ | |
| 673 | + ddirty->fb_left = min_t(s32, ddirty->fb_left, dirty->fb_x); | |
| 674 | + ddirty->fb_top = min_t(s32, ddirty->fb_top, dirty->fb_y); | |
| 664 | 675 | } |
| 665 | 676 | |
| 666 | 677 | |
| @@ -697,11 +708,11 @@ static void vmw_stdu_dmabuf_cpu_commit(struct vmw_kms_dirty *dirty) · 30 unmodified lines | ||
| 697 | 708 | /* Assume we are blitting from Host (display_srf) to Guest (dmabuf) */ |
| 698 | 709 | src_pitch = stdu->display_srf->base_size.width * stdu->cpp; |
| 699 | 710 | src = ttm_kmap_obj_virtual(&stdu->host_map, ¬_used); |
| 700 | − src += dirty->unit_y1 * src_pitch + dirty->unit_x1 * stdu->cpp; | |
| 711 | + src += ddirty->top * src_pitch + ddirty->left * stdu->cpp; | |
| 701 | 712 | |
| 702 | 713 | dst_pitch = ddirty->pitch; |
| 703 | 714 | dst = ttm_kmap_obj_virtual(&stdu->guest_map, ¬_used); |
| 704 | − dst += dirty->fb_y * dst_pitch + dirty->fb_x * stdu->cpp; | |
| 715 | + dst += ddirty->fb_top * dst_pitch + ddirty->fb_left * stdu->cpp; | |
| 705 | 716 | |
| 706 | 717 | |
| 707 | 718 | /* Figure out the real direction */ |
| @@ -760,7 +771,7 @@ static void vmw_stdu_dmabuf_cpu_commit(struct vmw_kms_dirty *dirty) · 52 unmodified lines | ||
| 760 | 771 | } |
| 761 | 772 | |
| 762 | 773 | out_cleanup: |
| 763 | − ddirty->left = ddirty->top = S32_MAX; | |
| 774 | + ddirty->left = ddirty->top = ddirty->fb_left = ddirty->fb_top = S32_MAX; | |
| 764 | 775 | ddirty->right = ddirty->bottom = S32_MIN; |
| 765 | 776 | } |
| 766 | 777 | |
| @@ -812,6 +823,7 @@ int vmw_kms_stdu_dma(struct vmw_private *dev_priv, · 45 unmodified lines | ||
| 812 | 823 | SVGA3D_READ_HOST_VRAM; |
| 813 | 824 | ddirty.left = ddirty.top = S32_MAX; |
| 814 | 825 | ddirty.right = ddirty.bottom = S32_MIN; |
| 826 | + ddirty.fb_left = ddirty.fb_top = S32_MAX; | |
| 815 | 827 | ddirty.pitch = vfb->base.pitches[0]; |
| 816 | 828 | ddirty.buf = buf; |
| 817 | 829 | ddirty.base.fifo_commit = vmw_stdu_dmabuf_fifo_commit; |
| @@ -1355,6 +1367,11 @@ vmw_stdu_primary_plane_atomic_update(struct drm_plane *plane, · 537 unmodified lines | ||
| 1355 | 1367 | DRM_ERROR("Failed to bind surface to STDU.\n"); |
| 1356 | 1368 | else |
| 1357 | 1369 | crtc->primary->fb = plane->state->fb; |
| 1370 | + | |
| 1371 | + ret = vmw_stdu_update_st(dev_priv, stdu); | |
| 1372 | + | |
| 1373 | + if (ret) | |
| 1374 | + DRM_ERROR("Failed to update STDU.\n"); | |
| 1358 | 1375 | } |
| 1359 | 1376 | |
| 1360 | 1377 | |
| @@ -1274,11 +1274,14 @@ int vmw_gb_surface_define_ioctl(struct drm_device *dev, void *data, · 1273 unmodified lines | ||
| 1274 | 1274 | struct ttm_object_file *tfile = vmw_fpriv(file_priv)->tfile; |
| 1275 | 1275 | int ret; |
| 1276 | 1276 | uint32_t size; |
| 1277 | − uint32_t backup_handle; | |
| 1277 | + uint32_t backup_handle = 0; | |
| 1278 | 1278 | |
| 1279 | 1279 | if (req->multisample_count != 0) |
| 1280 | 1280 | return -EINVAL; |
| 1281 | 1281 | |
| 1282 | + if (req->mip_levels > DRM_VMW_MAX_MIP_LEVELS) | |
| 1283 | + return -EINVAL; | |
| 1284 | + | |
| 1282 | 1285 | if (unlikely(vmw_user_surface_size == 0)) |
| 1283 | 1286 | vmw_user_surface_size = ttm_round_pot(sizeof(*user_srf)) + |
| 1284 | 1287 | 128; |
| @@ -1314,12 +1317,16 @@ int vmw_gb_surface_define_ioctl(struct drm_device *dev, void *data, · 29 unmodified lines | ||
| 1314 | 1317 | ret = vmw_user_dmabuf_lookup(tfile, req->buffer_handle, |
| 1315 | 1318 | &res->backup, |
| 1316 | 1319 | &user_srf->backup_base); |
| 1317 | − if (ret == 0 && res->backup->base.num_pages * PAGE_SIZE < | |
| 1318 | − res->backup_size) { | |
| 1319 | − DRM_ERROR("Surface backup buffer is too small.\n"); | |
| 1320 | − vmw_dmabuf_unreference(&res->backup); | |
| 1321 | − ret = -EINVAL; | |
| 1322 | − goto out_unlock; | |
| 1320 | + if (ret == 0) { | |
| 1321 | + if (res->backup->base.num_pages * PAGE_SIZE < | |
| 1322 | + res->backup_size) { | |
| 1323 | + DRM_ERROR("Surface backup buffer is too small.\n"); | |
| 1324 | + vmw_dmabuf_unreference(&res->backup); | |
| 1325 | + ret = -EINVAL; | |
| 1326 | + goto out_unlock; | |
| 1327 | + } else { | |
| 1328 | + backup_handle = req->buffer_handle; | |
| 1329 | + } | |
| 1323 | 1330 | } |
| 1324 | 1331 | } else if (req->drm_surface_flags & drm_vmw_surface_flag_create_buffer) |
| 1325 | 1332 | ret = vmw_user_dmabuf_alloc(dev_priv, tfile, |
| @@ -1491,7 +1498,7 @@ int vmw_surface_gb_priv_define(struct drm_device *dev, · 165 unmodified lines | ||
| 1491 | 1498 | dev_priv->stdu_max_height); |
| 1492 | 1499 | |
| 1493 | 1500 | if (size.width > max_width || size.height > max_height) { |
| 1494 | − DRM_ERROR("%ux%u\n, exeeds max surface size %ux%u", | |
| 1501 | + DRM_ERROR("%ux%u\n, exceeds max surface size %ux%u", | |
| 1495 | 1502 | size.width, size.height, |
| 1496 | 1503 | max_width, max_height); |
| 1497 | 1504 | return -EINVAL; |
| @@ -172,7 +172,7 @@ static int host1x_probe(struct platform_device *pdev) · 171 unmodified lines | ||
| 172 | 172 | |
| 173 | 173 | host->rst = devm_reset_control_get(&pdev->dev, "host1x"); |
| 174 | 174 | if (IS_ERR(host->rst)) { |
| 175 | − err = PTR_ERR(host->clk); | |
| 175 | + err = PTR_ERR(host->rst); | |
| 176 | 176 | dev_err(&pdev->dev, "failed to get reset: %d\n", err); |
| 177 | 177 | return err; |
| 178 | 178 | } |
| @@ -725,15 +725,16 @@ void ipu_set_ic_src_mux(struct ipu_soc *ipu, int csi_id, bool vdi) · 724 unmodified lines | ||
| 725 | 725 | spin_lock_irqsave(&ipu->lock, flags); |
| 726 | 726 | |
| 727 | 727 | val = ipu_cm_read(ipu, IPU_CONF); |
| 728 | − if (vdi) { | |
| 728 | + if (vdi) | |
| 729 | 729 | val |= IPU_CONF_IC_INPUT; |
| 730 | − } else { | |
| 730 | + else | |
| 731 | 731 | val &= ~IPU_CONF_IC_INPUT; |
| 732 | − if (csi_id == 1) | |
| 733 | − val |= IPU_CONF_CSI_SEL; | |
| 734 | − else | |
| 735 | − val &= ~IPU_CONF_CSI_SEL; | |
| 736 | − } | |
| 732 | + | |
| 733 | + if (csi_id == 1) | |
| 734 | + val |= IPU_CONF_CSI_SEL; | |
| 735 | + else | |
| 736 | + val &= ~IPU_CONF_CSI_SEL; | |
| 737 | + | |
| 737 | 738 | ipu_cm_write(ipu, val, IPU_CONF); |
| 738 | 739 | |
| 739 | 740 | spin_unlock_irqrestore(&ipu->lock, flags); |
| @@ -131,8 +131,6 @@ int ipu_pre_get(struct ipu_pre *pre) · 130 unmodified lines | ||
| 131 | 131 | if (pre->in_use) |
| 132 | 132 | return -EBUSY; |
| 133 | 133 | |
| 134 | − clk_prepare_enable(pre->clk_axi); | |
| 135 | − | |
| 136 | 134 | /* first get the engine out of reset and remove clock gating */ |
| 137 | 135 | writel(0, pre->regs + IPU_PRE_CTRL); |
| 138 | 136 | |
| @@ -149,12 +147,7 @@ int ipu_pre_get(struct ipu_pre *pre) · 10 unmodified lines | ||
| 149 | 147 | |
| 150 | 148 | void ipu_pre_put(struct ipu_pre *pre) |
| 151 | 149 | { |
| 152 | − u32 val; | |
| 153 | − | |
| 154 | − val = IPU_PRE_CTRL_SFTRST | IPU_PRE_CTRL_CLKGATE; | |
| 155 | − writel(val, pre->regs + IPU_PRE_CTRL); | |
| 156 | − | |
| 157 | − clk_disable_unprepare(pre->clk_axi); | |
| 150 | + writel(IPU_PRE_CTRL_SFTRST, pre->regs + IPU_PRE_CTRL); | |
| 158 | 151 | |
| 159 | 152 | pre->in_use = false; |
| 160 | 153 | } |
| @@ -249,6 +242,8 @@ static int ipu_pre_probe(struct platform_device *pdev) · 88 unmodified lines | ||
| 249 | 242 | if (!pre->buffer_virt) |
| 250 | 243 | return -ENOMEM; |
| 251 | 244 | |
| 245 | + clk_prepare_enable(pre->clk_axi); | |
| 246 | + | |
| 252 | 247 | pre->dev = dev; |
| 253 | 248 | platform_set_drvdata(pdev, pre); |
| 254 | 249 | mutex_lock(&ipu_pre_list_mutex); |
| @@ -268,6 +263,8 @@ static int ipu_pre_remove(struct platform_device *pdev) · 13 unmodified lines | ||
| 268 | 263 | available_pres--; |
| 269 | 264 | mutex_unlock(&ipu_pre_list_mutex); |
| 270 | 265 | |
| 266 | + clk_disable_unprepare(pre->clk_axi); | |
| 267 | + | |
| 271 | 268 | if (pre->buffer_virt) |
| 272 | 269 | gen_pool_free(pre->iram, (unsigned long)pre->buffer_virt, |
| 273 | 270 | IPU_PRE_MAX_WIDTH * IPU_PRE_NUM_SCANLINES * 4); |
| @@ -275,10 +275,12 @@ config HID_EMS_FF · 274 unmodified lines | ||
| 275 | 275 | - Trio Linker Plus II |
| 276 | 276 | |
| 277 | 277 | config HID_ELECOM |
| 278 | − tristate "ELECOM BM084 bluetooth mouse" | |
| 278 | + tristate "ELECOM HID devices" | |
| 279 | 279 | depends on HID |
| 280 | 280 | ---help--- |
| 281 | − Support for the ELECOM BM084 (bluetooth mouse). | |
| 281 | + Support for ELECOM devices: | |
| 282 | + - BM084 Bluetooth Mouse | |
| 283 | + - DEFT Trackball (Wired and wireless) | |
| 282 | 284 | |
| 283 | 285 | config HID_ELO |
| 284 | 286 | tristate "ELO USB 4000/4500 touchscreen" |
| @@ -69,6 +69,7 @@ MODULE_DESCRIPTION("Asus HID Keyboard and TouchPad"); · 68 unmodified lines | ||
| 69 | 69 | #define QUIRK_IS_MULTITOUCH BIT(3) |
| 70 | 70 | #define QUIRK_NO_CONSUMER_USAGES BIT(4) |
| 71 | 71 | #define QUIRK_USE_KBD_BACKLIGHT BIT(5) |
| 72 | +#define QUIRK_T100_KEYBOARD BIT(6) | |
| 72 | 73 | |
| 73 | 74 | #define I2C_KEYBOARD_QUIRKS (QUIRK_FIX_NOTEBOOK_REPORT | \ |
| 74 | 75 | QUIRK_NO_INIT_REPORTS | \ |
| @@ -536,6 +537,8 @@ static void asus_remove(struct hid_device *hdev) · 461 unmodified lines | ||
| 536 | 537 | drvdata->kbd_backlight->removed = true; |
| 537 | 538 | cancel_work_sync(&drvdata->kbd_backlight->work); |
| 538 | 539 | } |
| 540 | + | |
| 541 | + hid_hw_stop(hdev); | |
| 539 | 542 | } |
| 540 | 543 | |
| 541 | 544 | static __u8 *asus_report_fixup(struct hid_device *hdev, __u8 *rdesc, |
| @@ -548,6 +551,12 @@ static __u8 *asus_report_fixup(struct hid_device *hdev, __u8 *rdesc, · 6 unmodified lines | ||
| 548 | 551 | hid_info(hdev, "Fixing up Asus notebook report descriptor\n"); |
| 549 | 552 | rdesc[55] = 0xdd; |
| 550 | 553 | } |
| 554 | + if (drvdata->quirks & QUIRK_T100_KEYBOARD && | |
| 555 | + *rsize == 76 && rdesc[73] == 0x81 && rdesc[74] == 0x01) { | |
| 556 | + hid_info(hdev, "Fixing up Asus T100 keyb report descriptor\n"); | |
| 557 | + rdesc[74] &= ~HID_MAIN_ITEM_CONSTANT; | |
| 558 | + } | |
| 559 | + | |
| 551 | 560 | return rdesc; |
| 552 | 561 | } |
| 553 | 562 | |
| @@ -560,6 +569,9 @@ static const struct hid_device_id asus_devices[] = { · 6 unmodified lines | ||
| 560 | 569 | USB_DEVICE_ID_ASUSTEK_ROG_KEYBOARD1) }, |
| 561 | 570 | { HID_USB_DEVICE(USB_VENDOR_ID_ASUSTEK, |
| 562 | 571 | USB_DEVICE_ID_ASUSTEK_ROG_KEYBOARD2), QUIRK_USE_KBD_BACKLIGHT }, |
| 572 | + { HID_USB_DEVICE(USB_VENDOR_ID_ASUSTEK, | |
| 573 | + USB_DEVICE_ID_ASUSTEK_T100_KEYBOARD), | |
| 574 | + QUIRK_T100_KEYBOARD | QUIRK_NO_CONSUMER_USAGES }, | |
| 563 | 575 | { } |
| 564 | 576 | }; |
| 565 | 577 | MODULE_DEVICE_TABLE(hid, asus_devices); |
| @@ -826,11 +826,35 @@ static int hid_scan_report(struct hid_device *hid) · 825 unmodified lines | ||
| 826 | 826 | * hid-rmi should take care of them, |
| 827 | 827 | * not hid-generic |
| 828 | 828 | */ |
| 829 | − if (IS_ENABLED(CONFIG_HID_RMI)) | |
| 830 | − hid->group = HID_GROUP_RMI; | |
| 829 | + hid->group = HID_GROUP_RMI; | |
| 831 | 830 | break; |
| 832 | 831 | } |
| 833 | 832 | |
| 833 | + /* fall back to generic driver in case specific driver doesn't exist */ | |
| 834 | + switch (hid->group) { | |
| 835 | + case HID_GROUP_MULTITOUCH_WIN_8: | |
| 836 | + /* fall-through */ | |
| 837 | + case HID_GROUP_MULTITOUCH: | |
| 838 | + if (!IS_ENABLED(CONFIG_HID_MULTITOUCH)) | |
| 839 | + hid->group = HID_GROUP_GENERIC; | |
| 840 | + break; | |
| 841 | + case HID_GROUP_SENSOR_HUB: | |
| 842 | + if (!IS_ENABLED(CONFIG_HID_SENSOR_HUB)) | |
| 843 | + hid->group = HID_GROUP_GENERIC; | |
| 844 | + break; | |
| 845 | + case HID_GROUP_RMI: | |
| 846 | + if (!IS_ENABLED(CONFIG_HID_RMI)) | |
| 847 | + hid->group = HID_GROUP_GENERIC; | |
| 848 | + break; | |
| 849 | + case HID_GROUP_WACOM: | |
| 850 | + if (!IS_ENABLED(CONFIG_HID_WACOM)) | |
| 851 | + hid->group = HID_GROUP_GENERIC; | |
| 852 | + break; | |
| 853 | + case HID_GROUP_LOGITECH_DJ_DEVICE: | |
| 854 | + if (!IS_ENABLED(CONFIG_HID_LOGITECH_DJ)) | |
| 855 | + hid->group = HID_GROUP_GENERIC; | |
| 856 | + break; | |
| 857 | + } | |
| 834 | 858 | vfree(parser); |
| 835 | 859 | return 0; |
| 836 | 860 | } |
| @@ -1763,15 +1787,23 @@ EXPORT_SYMBOL_GPL(hid_disconnect); · 926 unmodified lines | ||
| 1763 | 1787 | * used as a driver. See hid_scan_report(). |
| 1764 | 1788 | */ |
| 1765 | 1789 | static const struct hid_device_id hid_have_special_driver[] = { |
| 1790 | +#if IS_ENABLED(CONFIG_HID_A4TECH) | |
| 1766 | 1791 | { HID_USB_DEVICE(USB_VENDOR_ID_A4TECH, USB_DEVICE_ID_A4TECH_WCP32PU) }, |
| 1767 | 1792 | { HID_USB_DEVICE(USB_VENDOR_ID_A4TECH, USB_DEVICE_ID_A4TECH_X5_005D) }, |
| 1768 | 1793 | { HID_USB_DEVICE(USB_VENDOR_ID_A4TECH, USB_DEVICE_ID_A4TECH_RP_649) }, |
| 1794 | +#endif | |
| 1795 | +#if IS_ENABLED(CONFIG_HID_ACCUTOUCH) | |
| 1796 | + { HID_USB_DEVICE(USB_VENDOR_ID_ELO, USB_DEVICE_ID_ELO_ACCUTOUCH_2216) }, | |
| 1797 | +#endif | |
| 1798 | +#if IS_ENABLED(CONFIG_HID_ACRUX) | |
| 1769 | 1799 | { HID_USB_DEVICE(USB_VENDOR_ID_ACRUX, 0x0802) }, |
| 1770 | 1800 | { HID_USB_DEVICE(USB_VENDOR_ID_ACRUX, 0xf705) }, |
| 1801 | +#endif | |
| 1802 | +#if IS_ENABLED(CONFIG_HID_ALPS) | |
| 1771 | 1803 | { HID_DEVICE(HID_BUS_ANY, HID_GROUP_ANY, USB_VENDOR_ID_ALPS_JP, HID_DEVICE_ID_ALPS_U1_DUAL) }, |
| 1804 | +#endif | |
| 1805 | +#if IS_ENABLED(CONFIG_HID_APPLE) | |
| 1772 | 1806 | { HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_MIGHTYMOUSE) }, |
| 1773 | − { HID_BLUETOOTH_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_MAGICMOUSE) }, | |
| 1774 | − { HID_BLUETOOTH_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_MAGICTRACKPAD) }, | |
| 1775 | 1807 | { HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_FOUNTAIN_ANSI) }, |
| 1776 | 1808 | { HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_FOUNTAIN_ISO) }, |
| 1777 | 1809 | { HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_GEYSER_ANSI) }, |
| @@ -1792,11 +1824,6 @@ static const struct hid_device_id hid_have_special_driver[] = { · 14 unmodified lines | ||
| 1792 | 1824 | { HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_GEYSER4_HF_ANSI) }, |
| 1793 | 1825 | { HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_GEYSER4_HF_ISO) }, |
| 1794 | 1826 | { HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_GEYSER4_HF_JIS) }, |
| 1795 | − { HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_IRCONTROL) }, | |
| 1796 | − { HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_IRCONTROL2) }, | |
| 1797 | − { HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_IRCONTROL3) }, | |
| 1798 | − { HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_IRCONTROL4) }, | |
| 1799 | − { HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_IRCONTROL5) }, | |
| 1800 | 1827 | { HID_BLUETOOTH_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_ALU_WIRELESS_ANSI) }, |
| 1801 | 1828 | { HID_BLUETOOTH_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_ALU_WIRELESS_ISO) }, |
| 1802 | 1829 | { HID_BLUETOOTH_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_ALU_WIRELESS_JIS) }, |
| @@ -1851,59 +1878,100 @@ static const struct hid_device_id hid_have_special_driver[] = { · 48 unmodified lines | ||
| 1851 | 1878 | { HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_MAGIC_KEYBOARD_ANSI) }, |
| 1852 | 1879 | { HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_FOUNTAIN_TP_ONLY) }, |
| 1853 | 1880 | { HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_GEYSER1_TP_ONLY) }, |
| 1881 | +#endif | |
| 1882 | +#if IS_ENABLED(CONFIG_HID_APPLEIR) | |
| 1883 | + { HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_IRCONTROL) }, | |
| 1884 | + { HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_IRCONTROL2) }, | |
| 1885 | + { HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_IRCONTROL3) }, | |
| 1886 | + { HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_IRCONTROL4) }, | |
| 1887 | + { HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_IRCONTROL5) }, | |
| 1888 | +#endif | |
| 1889 | +#if IS_ENABLED(CONFIG_HID_ASUS) | |
| 1854 | 1890 | { HID_I2C_DEVICE(USB_VENDOR_ID_ASUSTEK, USB_DEVICE_ID_ASUSTEK_I2C_KEYBOARD) }, |
| 1855 | 1891 | { HID_I2C_DEVICE(USB_VENDOR_ID_ASUSTEK, USB_DEVICE_ID_ASUSTEK_I2C_TOUCHPAD) }, |
| 1856 | 1892 | { HID_USB_DEVICE(USB_VENDOR_ID_ASUSTEK, USB_DEVICE_ID_ASUSTEK_ROG_KEYBOARD1) }, |
| 1857 | 1893 | { HID_USB_DEVICE(USB_VENDOR_ID_ASUSTEK, USB_DEVICE_ID_ASUSTEK_ROG_KEYBOARD2) }, |
| 1894 | + { HID_USB_DEVICE(USB_VENDOR_ID_ASUSTEK, USB_DEVICE_ID_ASUSTEK_T100_KEYBOARD) }, | |
| 1895 | +#endif | |
| 1896 | +#if IS_ENABLED(CONFIG_HID_AUREAL) | |
| 1858 | 1897 | { HID_USB_DEVICE(USB_VENDOR_ID_AUREAL, USB_DEVICE_ID_AUREAL_W01RN) }, |
| 1898 | +#endif | |
| 1899 | +#if IS_ENABLED(CONFIG_HID_BELKIN) | |
| 1859 | 1900 | { HID_USB_DEVICE(USB_VENDOR_ID_BELKIN, USB_DEVICE_ID_FLIP_KVM) }, |
| 1901 | + { HID_USB_DEVICE(USB_VENDOR_ID_LABTEC, USB_DEVICE_ID_LABTEC_WIRELESS_KEYBOARD) }, | |
| 1902 | +#endif | |
| 1903 | +#if IS_ENABLED(CONFIG_HID_BETOP_FF) | |
| 1860 | 1904 | { HID_USB_DEVICE(USB_VENDOR_ID_BETOP_2185BFM, 0x2208) }, |
| 1861 | 1905 | { HID_USB_DEVICE(USB_VENDOR_ID_BETOP_2185PC, 0x5506) }, |
| 1862 | 1906 | { HID_USB_DEVICE(USB_VENDOR_ID_BETOP_2185V2PC, 0x1850) }, |
| 1863 | 1907 | { HID_USB_DEVICE(USB_VENDOR_ID_BETOP_2185V2BFM, 0x5500) }, |
| 1864 | − { HID_USB_DEVICE(USB_VENDOR_ID_BTC, USB_DEVICE_ID_BTC_EMPREX_REMOTE) }, | |
| 1865 | − { HID_USB_DEVICE(USB_VENDOR_ID_BTC, USB_DEVICE_ID_BTC_EMPREX_REMOTE_2) }, | |
| 1908 | +#endif | |
| 1909 | +#if IS_ENABLED(CONFIG_HID_CHERRY) | |
| 1866 | 1910 | { HID_USB_DEVICE(USB_VENDOR_ID_CHERRY, USB_DEVICE_ID_CHERRY_CYMOTION) }, |
| 1867 | 1911 | { HID_USB_DEVICE(USB_VENDOR_ID_CHERRY, USB_DEVICE_ID_CHERRY_CYMOTION_SOLAR) }, |
| 1912 | +#endif | |
| 1913 | +#if IS_ENABLED(CONFIG_HID_CHICONY) | |
| 1868 | 1914 | { HID_USB_DEVICE(USB_VENDOR_ID_CHICONY, USB_DEVICE_ID_CHICONY_TACTICAL_PAD) }, |
| 1869 | − { HID_USB_DEVICE(USB_VENDOR_ID_CHICONY, USB_DEVICE_ID_CHICONY_WIRELESS) }, | |
| 1870 | 1915 | { HID_USB_DEVICE(USB_VENDOR_ID_CHICONY, USB_DEVICE_ID_CHICONY_WIRELESS2) }, |
| 1871 | 1916 | { HID_USB_DEVICE(USB_VENDOR_ID_CHICONY, USB_DEVICE_ID_CHICONY_AK1D) }, |
| 1872 | 1917 | { HID_USB_DEVICE(USB_VENDOR_ID_CHICONY, USB_DEVICE_ID_CHICONY_ACER_SWITCH12) }, |
| 1918 | + { HID_USB_DEVICE(USB_VENDOR_ID_JESS, USB_DEVICE_ID_JESS_ZEN_AIO_KBD) }, | |
| 1919 | +#endif | |
| 1920 | +#if IS_ENABLED(CONFIG_HID_CMEDIA) | |
| 1921 | + { HID_USB_DEVICE(USB_VENDOR_ID_CMEDIA, USB_DEVICE_ID_CM6533) }, | |
| 1922 | +#endif | |
| 1923 | +#if IS_ENABLED(CONFIG_HID_CORSAIR) | |
| 1873 | 1924 | { HID_USB_DEVICE(USB_VENDOR_ID_CORSAIR, USB_DEVICE_ID_CORSAIR_K90) }, |
| 1874 | 1925 | { HID_USB_DEVICE(USB_VENDOR_ID_CORSAIR, USB_DEVICE_ID_CORSAIR_SCIMITAR_PRO_RGB) }, |
| 1875 | − { HID_USB_DEVICE(USB_VENDOR_ID_CREATIVELABS, USB_DEVICE_ID_PRODIKEYS_PCMIDI) }, | |
| 1926 | +#endif | |
| 1927 | +#if IS_ENABLED(CONFIG_HID_CP2112) | |
| 1876 | 1928 | { HID_USB_DEVICE(USB_VENDOR_ID_CYGNAL, USB_DEVICE_ID_CYGNAL_CP2112) }, |
| 1929 | +#endif | |
| 1930 | +#if IS_ENABLED(CONFIG_HID_CYPRESS) | |
| 1877 | 1931 | { HID_USB_DEVICE(USB_VENDOR_ID_CYPRESS, USB_DEVICE_ID_CYPRESS_BARCODE_1) }, |
| 1878 | 1932 | { HID_USB_DEVICE(USB_VENDOR_ID_CYPRESS, USB_DEVICE_ID_CYPRESS_BARCODE_2) }, |
| 1879 | 1933 | { HID_USB_DEVICE(USB_VENDOR_ID_CYPRESS, USB_DEVICE_ID_CYPRESS_BARCODE_3) }, |
| 1880 | 1934 | { HID_USB_DEVICE(USB_VENDOR_ID_CYPRESS, USB_DEVICE_ID_CYPRESS_BARCODE_4) }, |
| 1881 | 1935 | { HID_USB_DEVICE(USB_VENDOR_ID_CYPRESS, USB_DEVICE_ID_CYPRESS_MOUSE) }, |
| 1882 | − { HID_USB_DEVICE(USB_VENDOR_ID_DELCOM, USB_DEVICE_ID_DELCOM_VISUAL_IND) }, | |
| 1936 | +#endif | |
| 1937 | +#if IS_ENABLED(CONFIG_HID_DRAGONRISE) | |
| 1883 | 1938 | { HID_USB_DEVICE(USB_VENDOR_ID_DRAGONRISE, 0x0006) }, |
| 1884 | 1939 | { HID_USB_DEVICE(USB_VENDOR_ID_DRAGONRISE, 0x0011) }, |
| 1885 | −#if IS_ENABLED(CONFIG_HID_MAYFLASH) | |
| 1886 | − { HID_USB_DEVICE(USB_VENDOR_ID_DRAGONRISE, USB_DEVICE_ID_DRAGONRISE_PS3) }, | |
| 1887 | − { HID_USB_DEVICE(USB_VENDOR_ID_DRAGONRISE, USB_DEVICE_ID_DRAGONRISE_DOLPHINBAR) }, | |
| 1888 | − { HID_USB_DEVICE(USB_VENDOR_ID_DRAGONRISE, USB_DEVICE_ID_DRAGONRISE_GAMECUBE1) }, | |
| 1889 | − { HID_USB_DEVICE(USB_VENDOR_ID_DRAGONRISE, USB_DEVICE_ID_DRAGONRISE_GAMECUBE2) }, | |
| 1890 | 1940 | #endif |
| 1891 | − { HID_USB_DEVICE(USB_VENDOR_ID_DREAM_CHEEKY, USB_DEVICE_ID_DREAM_CHEEKY_WN) }, | |
| 1892 | − { HID_USB_DEVICE(USB_VENDOR_ID_DREAM_CHEEKY, USB_DEVICE_ID_DREAM_CHEEKY_FA) }, | |
| 1941 | +#if IS_ENABLED(CONFIG_HID_ELECOM) | |
| 1893 | 1942 | { HID_BLUETOOTH_DEVICE(USB_VENDOR_ID_ELECOM, USB_DEVICE_ID_ELECOM_BM084) }, |
| 1943 | + { HID_USB_DEVICE(USB_VENDOR_ID_ELECOM, USB_DEVICE_ID_ELECOM_DEFT_WIRED) }, | |
| 1944 | + { HID_USB_DEVICE(USB_VENDOR_ID_ELECOM, USB_DEVICE_ID_ELECOM_DEFT_WIRELESS) }, | |
| 1945 | +#endif | |
| 1946 | +#if IS_ENABLED(CONFIG_HID_ELO) | |
| 1894 | 1947 | { HID_USB_DEVICE(USB_VENDOR_ID_ELO, 0x0009) }, |
| 1895 | 1948 | { HID_USB_DEVICE(USB_VENDOR_ID_ELO, 0x0030) }, |
| 1896 | − { HID_USB_DEVICE(USB_VENDOR_ID_ELO, USB_DEVICE_ID_ELO_ACCUTOUCH_2216) }, | |
| 1949 | +#endif | |
| 1950 | +#if IS_ENABLED(CONFIG_HID_EMS_FF) | |
| 1897 | 1951 | { HID_USB_DEVICE(USB_VENDOR_ID_EMS, USB_DEVICE_ID_EMS_TRIO_LINKER_PLUS_II) }, |
| 1952 | +#endif | |
| 1953 | +#if IS_ENABLED(CONFIG_HID_EZKEY) | |
| 1898 | 1954 | { HID_USB_DEVICE(USB_VENDOR_ID_EZKEY, USB_DEVICE_ID_BTC_8193) }, |
| 1899 | − { HID_USB_DEVICE(USB_VENDOR_ID_GAMERON, USB_DEVICE_ID_GAMERON_DUAL_PSX_ADAPTOR) }, | |
| 1900 | − { HID_USB_DEVICE(USB_VENDOR_ID_GAMERON, USB_DEVICE_ID_GAMERON_DUAL_PCS_ADAPTOR) }, | |
| 1955 | +#endif | |
| 1956 | +#if IS_ENABLED(CONFIG_HID_GEMBIRD) | |
| 1901 | 1957 | { HID_USB_DEVICE(USB_VENDOR_ID_GEMBIRD, USB_DEVICE_ID_GEMBIRD_JPD_DUALFORCE2) }, |
| 1902 | − { HID_USB_DEVICE(USB_VENDOR_ID_GREENASIA, 0x0003) }, | |
| 1958 | +#endif | |
| 1959 | +#if IS_ENABLED(CONFIG_HID_GFRM) | |
| 1960 | + { HID_BLUETOOTH_DEVICE(0x58, 0x2000) }, | |
| 1961 | + { HID_BLUETOOTH_DEVICE(0x471, 0x2210) }, | |
| 1962 | +#endif | |
| 1963 | +#if IS_ENABLED(CONFIG_HID_GREENASIA) | |
| 1903 | 1964 | { HID_USB_DEVICE(USB_VENDOR_ID_GREENASIA, 0x0012) }, |
| 1965 | +#endif | |
| 1966 | +#if IS_ENABLED(CONFIG_HID_GT683R) | |
| 1967 | + { HID_USB_DEVICE(USB_VENDOR_ID_MSI, USB_DEVICE_ID_MSI_GT683R_LED_PANEL) }, | |
| 1968 | +#endif | |
| 1969 | +#if IS_ENABLED(CONFIG_HID_GYRATION) | |
| 1904 | 1970 | { HID_USB_DEVICE(USB_VENDOR_ID_GYRATION, USB_DEVICE_ID_GYRATION_REMOTE) }, |
| 1905 | 1971 | { HID_USB_DEVICE(USB_VENDOR_ID_GYRATION, USB_DEVICE_ID_GYRATION_REMOTE_2) }, |
| 1906 | 1972 | { HID_USB_DEVICE(USB_VENDOR_ID_GYRATION, USB_DEVICE_ID_GYRATION_REMOTE_3) }, |
| 1973 | +#endif | |
| 1974 | +#if IS_ENABLED(CONFIG_HID_HOLTEK) | |
| 1907 | 1975 | { HID_USB_DEVICE(USB_VENDOR_ID_HOLTEK, USB_DEVICE_ID_HOLTEK_ON_LINE_GRIP) }, |
| 1908 | 1976 | { HID_USB_DEVICE(USB_VENDOR_ID_HOLTEK_ALT, USB_DEVICE_ID_HOLTEK_ALT_KEYBOARD) }, |
| 1909 | 1977 | { HID_USB_DEVICE(USB_VENDOR_ID_HOLTEK_ALT, USB_DEVICE_ID_HOLTEK_ALT_MOUSE_A04A) }, |
| @@ -1912,12 +1980,17 @@ static const struct hid_device_id hid_have_special_driver[] = { · 2 unmodified lines | ||
| 1912 | 1980 | { HID_USB_DEVICE(USB_VENDOR_ID_HOLTEK_ALT, USB_DEVICE_ID_HOLTEK_ALT_MOUSE_A072) }, |
| 1913 | 1981 | { HID_USB_DEVICE(USB_VENDOR_ID_HOLTEK_ALT, USB_DEVICE_ID_HOLTEK_ALT_MOUSE_A081) }, |
| 1914 | 1982 | { HID_USB_DEVICE(USB_VENDOR_ID_HOLTEK_ALT, USB_DEVICE_ID_HOLTEK_ALT_MOUSE_A0C2) }, |
| 1915 | − { HID_USB_DEVICE(USB_VENDOR_ID_HUION, USB_DEVICE_ID_HUION_TABLET) }, | |
| 1916 | − { HID_USB_DEVICE(USB_VENDOR_ID_JESS, USB_DEVICE_ID_JESS_ZEN_AIO_KBD) }, | |
| 1917 | − { HID_USB_DEVICE(USB_VENDOR_ID_JESS2, USB_DEVICE_ID_JESS2_COLOR_RUMBLE_PAD) }, | |
| 1983 | +#endif | |
| 1984 | +#if IS_ENABLED(CONFIG_HID_ICADE) | |
| 1918 | 1985 | { HID_BLUETOOTH_DEVICE(USB_VENDOR_ID_ION, USB_DEVICE_ID_ICADE) }, |
| 1986 | +#endif | |
| 1987 | +#if IS_ENABLED(CONFIG_HID_KENSINGTON) | |
| 1919 | 1988 | { HID_USB_DEVICE(USB_VENDOR_ID_KENSINGTON, USB_DEVICE_ID_KS_SLIMBLADE) }, |
| 1989 | +#endif | |
| 1990 | +#if IS_ENABLED(CONFIG_HID_KEYTOUCH) | |
| 1920 | 1991 | { HID_USB_DEVICE(USB_VENDOR_ID_KEYTOUCH, USB_DEVICE_ID_KEYTOUCH_IEC) }, |
| 1992 | +#endif | |
| 1993 | +#if IS_ENABLED(CONFIG_HID_KYE) | |
| 1921 | 1994 | { HID_USB_DEVICE(USB_VENDOR_ID_KYE, USB_DEVICE_ID_GENIUS_GILA_GAMING_MOUSE) }, |
| 1922 | 1995 | { HID_USB_DEVICE(USB_VENDOR_ID_KYE, USB_DEVICE_ID_GENIUS_MANTICORE) }, |
| 1923 | 1996 | { HID_USB_DEVICE(USB_VENDOR_ID_KYE, USB_DEVICE_ID_GENIUS_GX_IMPERATOR) }, |
| @@ -1927,21 +2000,29 @@ static const struct hid_device_id hid_have_special_driver[] = { · 3 unmodified lines | ||
| 1927 | 2000 | { HID_USB_DEVICE(USB_VENDOR_ID_KYE, USB_DEVICE_ID_KYE_MOUSEPEN_I608X_V2) }, |
| 1928 | 2001 | { HID_USB_DEVICE(USB_VENDOR_ID_KYE, USB_DEVICE_ID_KYE_EASYPEN_M610X) }, |
| 1929 | 2002 | { HID_USB_DEVICE(USB_VENDOR_ID_KYE, USB_DEVICE_ID_KYE_PENSKETCH_M912) }, |
| 1930 | − { HID_USB_DEVICE(USB_VENDOR_ID_LABTEC, USB_DEVICE_ID_LABTEC_WIRELESS_KEYBOARD) }, | |
| 2003 | +#endif | |
| 2004 | +#if IS_ENABLED(CONFIG_HID_LCPOWER) | |
| 1931 | 2005 | { HID_USB_DEVICE(USB_VENDOR_ID_LCPOWER, USB_DEVICE_ID_LCPOWER_LC1000 ) }, |
| 2006 | +#endif | |
| 2007 | +#if IS_ENABLED(CONFIG_HID_LED) | |
| 2008 | + { HID_USB_DEVICE(USB_VENDOR_ID_DELCOM, USB_DEVICE_ID_DELCOM_VISUAL_IND) }, | |
| 2009 | + { HID_USB_DEVICE(USB_VENDOR_ID_DREAM_CHEEKY, USB_DEVICE_ID_DREAM_CHEEKY_WN) }, | |
| 2010 | + { HID_USB_DEVICE(USB_VENDOR_ID_DREAM_CHEEKY, USB_DEVICE_ID_DREAM_CHEEKY_FA) }, | |
| 2011 | + { HID_USB_DEVICE(USB_VENDOR_ID_MICROCHIP, USB_DEVICE_ID_LUXAFOR) }, | |
| 2012 | + { HID_USB_DEVICE(USB_VENDOR_ID_RISO_KAGAKU, USB_DEVICE_ID_RI_KA_WEBMAIL) }, | |
| 2013 | + { HID_USB_DEVICE(USB_VENDOR_ID_THINGM, USB_DEVICE_ID_BLINK1) }, | |
| 2014 | +#endif | |
| 1932 | 2015 | #if IS_ENABLED(CONFIG_HID_LENOVO) |
| 1933 | 2016 | { HID_USB_DEVICE(USB_VENDOR_ID_LENOVO, USB_DEVICE_ID_LENOVO_TPKBD) }, |
| 1934 | 2017 | { HID_USB_DEVICE(USB_VENDOR_ID_LENOVO, USB_DEVICE_ID_LENOVO_CUSBKBD) }, |
| 1935 | 2018 | { HID_BLUETOOTH_DEVICE(USB_VENDOR_ID_LENOVO, USB_DEVICE_ID_LENOVO_CBTKBD) }, |
| 1936 | 2019 | { HID_USB_DEVICE(USB_VENDOR_ID_LENOVO, USB_DEVICE_ID_LENOVO_TPPRODOCK) }, |
| 1937 | 2020 | #endif |
| 1938 | − { HID_USB_DEVICE(USB_VENDOR_ID_LG, USB_DEVICE_ID_LG_MELFAS_MT) }, | |
| 2021 | +#if IS_ENABLED(CONFIG_HID_LOGITECH) | |
| 1939 | 2022 | { HID_USB_DEVICE(USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_MX3000_RECEIVER) }, |
| 1940 | 2023 | { HID_USB_DEVICE(USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_S510_RECEIVER) }, |
| 1941 | 2024 | { HID_USB_DEVICE(USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_S510_RECEIVER_2) }, |
| 1942 | 2025 | { HID_USB_DEVICE(USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_RECEIVER) }, |
| 1943 | − { HID_BLUETOOTH_DEVICE(USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_HARMONY_PS3) }, | |
| 1944 | − { HID_BLUETOOTH_DEVICE(USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_T651) }, | |
| 1945 | 2026 | { HID_USB_DEVICE(USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_DINOVO_DESKTOP) }, |
| 1946 | 2027 | { HID_USB_DEVICE(USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_DINOVO_EDGE) }, |
| 1947 | 2028 | { HID_USB_DEVICE(USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_DINOVO_MINI) }, |
| @@ -1954,7 +2035,6 @@ static const struct hid_device_id hid_have_special_driver[] = { · 6 unmodified lines | ||
| 1954 | 2035 | { HID_USB_DEVICE(USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_RUMBLEPAD) }, |
| 1955 | 2036 | { HID_USB_DEVICE(USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_RUMBLEPAD2_2) }, |
| 1956 | 2037 | { HID_USB_DEVICE(USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_G29_WHEEL) }, |
| 1957 | − { HID_USB_DEVICE(USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_G920_WHEEL) }, | |
| 1958 | 2038 | { HID_USB_DEVICE(USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_WINGMAN_F3D) }, |
| 1959 | 2039 | { HID_USB_DEVICE(USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_WINGMAN_FFG ) }, |
| 1960 | 2040 | { HID_USB_DEVICE(USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_FORCE3D_PRO) }, |
| @@ -1966,17 +2046,30 @@ static const struct hid_device_id hid_have_special_driver[] = { · 5 unmodified lines | ||
| 1966 | 2046 | { HID_USB_DEVICE(USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_DFGT_WHEEL) }, |
| 1967 | 2047 | { HID_USB_DEVICE(USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_G25_WHEEL) }, |
| 1968 | 2048 | { HID_USB_DEVICE(USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_G27_WHEEL) }, |
| 1969 | −#if IS_ENABLED(CONFIG_HID_LOGITECH_DJ) | |
| 1970 | − { HID_USB_DEVICE(USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_UNIFYING_RECEIVER) }, | |
| 1971 | − { HID_USB_DEVICE(USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_UNIFYING_RECEIVER_2) }, | |
| 1972 | −#endif | |
| 1973 | 2049 | { HID_USB_DEVICE(USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_WII_WHEEL) }, |
| 1974 | 2050 | { HID_USB_DEVICE(USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_RUMBLEPAD2) }, |
| 1975 | 2051 | { HID_USB_DEVICE(USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_SPACETRAVELLER) }, |
| 1976 | 2052 | { HID_USB_DEVICE(USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_SPACENAVIGATOR) }, |
| 1977 | − { HID_USB_DEVICE(USB_VENDOR_ID_MICROCHIP, USB_DEVICE_ID_PICOLCD) }, | |
| 1978 | − { HID_USB_DEVICE(USB_VENDOR_ID_MICROCHIP, USB_DEVICE_ID_PICOLCD_BOOTLOADER) }, | |
| 1979 | − { HID_USB_DEVICE(USB_VENDOR_ID_MICROCHIP, USB_DEVICE_ID_LUXAFOR) }, | |
| 2053 | +#endif | |
| 2054 | +#if IS_ENABLED(CONFIG_HID_LOGITECH_HIDPP) | |
| 2055 | + { HID_BLUETOOTH_DEVICE(USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_T651) }, | |
| 2056 | + { HID_USB_DEVICE(USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_G920_WHEEL) }, | |
| 2057 | +#endif | |
| 2058 | +#if IS_ENABLED(CONFIG_HID_LOGITECH_DJ) | |
| 2059 | + { HID_USB_DEVICE(USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_UNIFYING_RECEIVER) }, | |
| 2060 | + { HID_USB_DEVICE(USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_UNIFYING_RECEIVER_2) }, | |
| 2061 | +#endif | |
| 2062 | +#if IS_ENABLED(CONFIG_HID_MAGICMOUSE) | |
| 2063 | + { HID_BLUETOOTH_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_MAGICMOUSE) }, | |
| 2064 | + { HID_BLUETOOTH_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_MAGICTRACKPAD) }, | |
| 2065 | +#endif | |
| 2066 | +#if IS_ENABLED(CONFIG_HID_MAYFLASH) | |
| 2067 | + { HID_USB_DEVICE(USB_VENDOR_ID_DRAGONRISE, USB_DEVICE_ID_DRAGONRISE_PS3) }, | |
| 2068 | + { HID_USB_DEVICE(USB_VENDOR_ID_DRAGONRISE, USB_DEVICE_ID_DRAGONRISE_DOLPHINBAR) }, | |
| 2069 | + { HID_USB_DEVICE(USB_VENDOR_ID_DRAGONRISE, USB_DEVICE_ID_DRAGONRISE_GAMECUBE1) }, | |
| 2070 | + { HID_USB_DEVICE(USB_VENDOR_ID_DRAGONRISE, USB_DEVICE_ID_DRAGONRISE_GAMECUBE2) }, | |
| 2071 | +#endif | |
| 2072 | +#if IS_ENABLED(CONFIG_HID_MICROSOFT) | |
| 1980 | 2073 | { HID_USB_DEVICE(USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_COMFORT_MOUSE_4500) }, |
| 1981 | 2074 | { HID_USB_DEVICE(USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_COMFORT_KEYBOARD) }, |
| 1982 | 2075 | { HID_USB_DEVICE(USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_SIDEWINDER_GV) }, |
| @@ -1992,9 +2085,22 @@ static const struct hid_device_id hid_have_special_driver[] = { · 9 unmodified lines | ||
| 1992 | 2085 | { HID_USB_DEVICE(USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_DIGITAL_MEDIA_600) }, |
| 1993 | 2086 | { HID_USB_DEVICE(USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_DIGITAL_MEDIA_3KV1) }, |
| 1994 | 2087 | { HID_USB_DEVICE(USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_POWER_COVER) }, |
| 2088 | + { HID_BLUETOOTH_DEVICE(USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_PRESENTER_8K_BT) }, | |
| 2089 | +#endif | |
| 2090 | +#if IS_ENABLED(CONFIG_HID_MONTEREY) | |
| 1995 | 2091 | { HID_USB_DEVICE(USB_VENDOR_ID_MONTEREY, USB_DEVICE_ID_GENIUS_KB29E) }, |
| 1996 | − { HID_USB_DEVICE(USB_VENDOR_ID_MSI, USB_DEVICE_ID_MSI_GT683R_LED_PANEL) }, | |
| 2092 | +#endif | |
| 2093 | +#if IS_ENABLED(CONFIG_HID_MULTITOUCH) | |
| 2094 | + { HID_USB_DEVICE(USB_VENDOR_ID_LG, USB_DEVICE_ID_LG_MELFAS_MT) }, | |
| 2095 | +#endif | |
| 2096 | +#if IS_ENABLED(CONFIG_HID_WIIMOTE) | |
| 2097 | + { HID_BLUETOOTH_DEVICE(USB_VENDOR_ID_NINTENDO, USB_DEVICE_ID_NINTENDO_WIIMOTE) }, | |
| 2098 | + { HID_BLUETOOTH_DEVICE(USB_VENDOR_ID_NINTENDO, USB_DEVICE_ID_NINTENDO_WIIMOTE2) }, | |
| 2099 | +#endif | |
| 2100 | +#if IS_ENABLED(CONFIG_HID_NTI) | |
| 1997 | 2101 | { HID_USB_DEVICE(USB_VENDOR_ID_NTI, USB_DEVICE_ID_USB_SUN) }, |
| 2102 | +#endif | |
| 2103 | +#if IS_ENABLED(CONFIG_HID_NTRIG) | |
| 1998 | 2104 | { HID_USB_DEVICE(USB_VENDOR_ID_NTRIG, USB_DEVICE_ID_NTRIG_TOUCH_SCREEN) }, |
| 1999 | 2105 | { HID_USB_DEVICE(USB_VENDOR_ID_NTRIG, USB_DEVICE_ID_NTRIG_TOUCH_SCREEN_1) }, |
| 2000 | 2106 | { HID_USB_DEVICE(USB_VENDOR_ID_NTRIG, USB_DEVICE_ID_NTRIG_TOUCH_SCREEN_2) }, |
| @@ -2014,13 +2120,41 @@ static const struct hid_device_id hid_have_special_driver[] = { · 13 unmodified lines | ||
| 2014 | 2120 | { HID_USB_DEVICE(USB_VENDOR_ID_NTRIG, USB_DEVICE_ID_NTRIG_TOUCH_SCREEN_16) }, |
| 2015 | 2121 | { HID_USB_DEVICE(USB_VENDOR_ID_NTRIG, USB_DEVICE_ID_NTRIG_TOUCH_SCREEN_17) }, |
| 2016 | 2122 | { HID_USB_DEVICE(USB_VENDOR_ID_NTRIG, USB_DEVICE_ID_NTRIG_TOUCH_SCREEN_18) }, |
| 2123 | +#endif | |
| 2124 | +#if IS_ENABLED(CONFIG_HID_ORTEK) | |
| 2017 | 2125 | { HID_USB_DEVICE(USB_VENDOR_ID_ORTEK, USB_DEVICE_ID_ORTEK_PKB1700) }, |
| 2018 | 2126 | { HID_USB_DEVICE(USB_VENDOR_ID_ORTEK, USB_DEVICE_ID_ORTEK_WKB2000) }, |
| 2127 | + { HID_USB_DEVICE(USB_VENDOR_ID_SKYCABLE, USB_DEVICE_ID_SKYCABLE_WIRELESS_PRESENTER) }, | |
| 2128 | +#endif | |
| 2129 | +#if IS_ENABLED(CONFIG_HID_PANTHERLORD) | |
| 2130 | + { HID_USB_DEVICE(USB_VENDOR_ID_GAMERON, USB_DEVICE_ID_GAMERON_DUAL_PSX_ADAPTOR) }, | |
| 2131 | + { HID_USB_DEVICE(USB_VENDOR_ID_GAMERON, USB_DEVICE_ID_GAMERON_DUAL_PCS_ADAPTOR) }, | |
| 2132 | + { HID_USB_DEVICE(USB_VENDOR_ID_GREENASIA, 0x0003) }, | |
| 2133 | + { HID_USB_DEVICE(USB_VENDOR_ID_JESS2, USB_DEVICE_ID_JESS2_COLOR_RUMBLE_PAD) }, | |
| 2134 | +#endif | |
| 2135 | +#if IS_ENABLED(CONFIG_HID_PENMOUNT) | |
| 2019 | 2136 | { HID_USB_DEVICE(USB_VENDOR_ID_PENMOUNT, USB_DEVICE_ID_PENMOUNT_6000) }, |
| 2137 | +#endif | |
| 2138 | +#if IS_ENABLED(CONFIG_HID_PETALYNX) | |
| 2020 | 2139 | { HID_USB_DEVICE(USB_VENDOR_ID_PETALYNX, USB_DEVICE_ID_PETALYNX_MAXTER_REMOTE) }, |
| 2140 | +#endif | |
| 2141 | +#if IS_ENABLED(CONFIG_HID_PICOLCD) | |
| 2142 | + { HID_USB_DEVICE(USB_VENDOR_ID_MICROCHIP, USB_DEVICE_ID_PICOLCD) }, | |
| 2143 | + { HID_USB_DEVICE(USB_VENDOR_ID_MICROCHIP, USB_DEVICE_ID_PICOLCD_BOOTLOADER) }, | |
| 2144 | +#endif | |
| 2145 | +#if IS_ENABLED(CONFIG_HID_PLANTRONICS) | |
| 2021 | 2146 | { HID_USB_DEVICE(USB_VENDOR_ID_PLANTRONICS, HID_ANY_ID) }, |
| 2147 | +#endif | |
| 2148 | +#if IS_ENABLED(CONFIG_HID_PRIMAX) | |
| 2022 | 2149 | { HID_USB_DEVICE(USB_VENDOR_ID_PRIMAX, USB_DEVICE_ID_PRIMAX_KEYBOARD) }, |
| 2023 | − { HID_USB_DEVICE(USB_VENDOR_ID_RISO_KAGAKU, USB_DEVICE_ID_RI_KA_WEBMAIL) }, | |
| 2150 | +#endif | |
| 2151 | +#if IS_ENABLED(CONFIG_HID_PRODIKEYS) | |
| 2152 | + { HID_USB_DEVICE(USB_VENDOR_ID_CREATIVELABS, USB_DEVICE_ID_PRODIKEYS_PCMIDI) }, | |
| 2153 | +#endif | |
| 2154 | +#if IS_ENABLED(CONFIG_HID_RMI) | |
| 2155 | + { HID_USB_DEVICE(USB_VENDOR_ID_LENOVO, USB_DEVICE_ID_LENOVO_X1_COVER) }, | |
| 2156 | + { HID_USB_DEVICE(USB_VENDOR_ID_RAZER, USB_DEVICE_ID_RAZER_BLADE_14) }, | |
| 2157 | +#endif | |
| 2024 | 2158 | #if IS_ENABLED(CONFIG_HID_ROCCAT) |
| 2025 | 2159 | { HID_USB_DEVICE(USB_VENDOR_ID_ROCCAT, USB_DEVICE_ID_ROCCAT_ARVO) }, |
| 2026 | 2160 | { HID_USB_DEVICE(USB_VENDOR_ID_ROCCAT, USB_DEVICE_ID_ROCCAT_ISKU) }, |
| @@ -2048,9 +2182,21 @@ static const struct hid_device_id hid_have_special_driver[] = { · 21 unmodified lines | ||
| 2048 | 2182 | { HID_USB_DEVICE(USB_VENDOR_ID_MADCATZ, USB_DEVICE_ID_MADCATZ_RAT5) }, |
| 2049 | 2183 | { HID_USB_DEVICE(USB_VENDOR_ID_MADCATZ, USB_DEVICE_ID_MADCATZ_RAT9) }, |
| 2050 | 2184 | #endif |
| 2185 | +#if IS_ENABLED(CONFIG_HID_SAMSUNG) | |
| 2051 | 2186 | { HID_USB_DEVICE(USB_VENDOR_ID_SAMSUNG, USB_DEVICE_ID_SAMSUNG_IR_REMOTE) }, |
| 2052 | 2187 | { HID_USB_DEVICE(USB_VENDOR_ID_SAMSUNG, USB_DEVICE_ID_SAMSUNG_WIRELESS_KBD_MOUSE) }, |
| 2053 | − { HID_USB_DEVICE(USB_VENDOR_ID_SKYCABLE, USB_DEVICE_ID_SKYCABLE_WIRELESS_PRESENTER) }, | |
| 2188 | +#endif | |
| 2189 | +#if IS_ENABLED(CONFIG_HID_SMARTJOYPLUS) | |
| 2190 | + { HID_USB_DEVICE(USB_VENDOR_ID_PLAYDOTCOM, USB_DEVICE_ID_PLAYDOTCOM_EMS_USBII) }, | |
| 2191 | + { HID_USB_DEVICE(USB_VENDOR_ID_WISEGROUP, USB_DEVICE_ID_SMARTJOY_PLUS) }, | |
| 2192 | + { HID_USB_DEVICE(USB_VENDOR_ID_WISEGROUP, USB_DEVICE_ID_SUPER_JOY_BOX_3) }, | |
| 2193 | + { HID_USB_DEVICE(USB_VENDOR_ID_WISEGROUP, USB_DEVICE_ID_DUAL_USB_JOYPAD) }, | |
| 2194 | + { HID_USB_DEVICE(USB_VENDOR_ID_WISEGROUP_LTD, USB_DEVICE_ID_SUPER_JOY_BOX_3_PRO) }, | |
| 2195 | + { HID_USB_DEVICE(USB_VENDOR_ID_WISEGROUP_LTD, USB_DEVICE_ID_SUPER_DUAL_BOX_PRO) }, | |
| 2196 | + { HID_USB_DEVICE(USB_VENDOR_ID_WISEGROUP_LTD, USB_DEVICE_ID_SUPER_JOY_BOX_5_PRO) }, | |
| 2197 | +#endif | |
| 2198 | +#if IS_ENABLED(CONFIG_HID_SONY) | |
| 2199 | + { HID_BLUETOOTH_DEVICE(USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_HARMONY_PS3) }, | |
| 2054 | 2200 | { HID_BLUETOOTH_DEVICE(USB_VENDOR_ID_SMK, USB_DEVICE_ID_SMK_PS3_BDREMOTE) }, |
| 2055 | 2201 | { HID_USB_DEVICE(USB_VENDOR_ID_SONY, USB_DEVICE_ID_SONY_BUZZ_CONTROLLER) }, |
| 2056 | 2202 | { HID_USB_DEVICE(USB_VENDOR_ID_SONY, USB_DEVICE_ID_SONY_WIRELESS_BUZZ_CONTROLLER) }, |
| @@ -2069,9 +2215,17 @@ static const struct hid_device_id hid_have_special_driver[] = { · 12 unmodified lines | ||
| 2069 | 2215 | { HID_USB_DEVICE(USB_VENDOR_ID_SONY, USB_DEVICE_ID_SONY_VAIO_VGX_MOUSE) }, |
| 2070 | 2216 | { HID_USB_DEVICE(USB_VENDOR_ID_SONY, USB_DEVICE_ID_SONY_VAIO_VGP_MOUSE) }, |
| 2071 | 2217 | { HID_USB_DEVICE(USB_VENDOR_ID_SINO_LITE, USB_DEVICE_ID_SINO_LITE_CONTROLLER) }, |
| 2218 | +#endif | |
| 2219 | +#if IS_ENABLED(CONFIG_HID_SPEEDLINK) | |
| 2220 | + { HID_USB_DEVICE(USB_VENDOR_ID_X_TENSIONS, USB_DEVICE_ID_SPEEDLINK_VAD_CEZANNE) }, | |
| 2221 | +#endif | |
| 2222 | +#if IS_ENABLED(CONFIG_HID_STEELSERIES) | |
| 2072 | 2223 | { HID_USB_DEVICE(USB_VENDOR_ID_STEELSERIES, USB_DEVICE_ID_STEELSERIES_SRWS1) }, |
| 2224 | +#endif | |
| 2225 | +#if IS_ENABLED(CONFIG_HID_SUNPLUS) | |
| 2073 | 2226 | { HID_USB_DEVICE(USB_VENDOR_ID_SUNPLUS, USB_DEVICE_ID_SUNPLUS_WDESKTOP) }, |
| 2074 | − { HID_USB_DEVICE(USB_VENDOR_ID_THINGM, USB_DEVICE_ID_BLINK1) }, | |
| 2227 | +#endif | |
| 2228 | +#if IS_ENABLED(CONFIG_HID_THRUSTMASTER) | |
| 2075 | 2229 | { HID_USB_DEVICE(USB_VENDOR_ID_THRUSTMASTER, 0xb300) }, |
| 2076 | 2230 | { HID_USB_DEVICE(USB_VENDOR_ID_THRUSTMASTER, 0xb304) }, |
| 2077 | 2231 | { HID_USB_DEVICE(USB_VENDOR_ID_THRUSTMASTER, 0xb323) }, |
| @@ -2080,12 +2234,25 @@ static const struct hid_device_id hid_have_special_driver[] = { · 2 unmodified lines | ||
| 2080 | 2234 | { HID_USB_DEVICE(USB_VENDOR_ID_THRUSTMASTER, 0xb653) }, |
| 2081 | 2235 | { HID_USB_DEVICE(USB_VENDOR_ID_THRUSTMASTER, 0xb654) }, |
| 2082 | 2236 | { HID_USB_DEVICE(USB_VENDOR_ID_THRUSTMASTER, 0xb65a) }, |
| 2237 | +#endif | |
| 2238 | +#if IS_ENABLED(CONFIG_HID_TIVO) | |
| 2083 | 2239 | { HID_BLUETOOTH_DEVICE(USB_VENDOR_ID_TIVO, USB_DEVICE_ID_TIVO_SLIDE_BT) }, |
| 2084 | 2240 | { HID_USB_DEVICE(USB_VENDOR_ID_TIVO, USB_DEVICE_ID_TIVO_SLIDE) }, |
| 2085 | 2241 | { HID_USB_DEVICE(USB_VENDOR_ID_TIVO, USB_DEVICE_ID_TIVO_SLIDE_PRO) }, |
| 2242 | +#endif | |
| 2243 | +#if IS_ENABLED(CONFIG_HID_TOPSEED) | |
| 2244 | + { HID_USB_DEVICE(USB_VENDOR_ID_BTC, USB_DEVICE_ID_BTC_EMPREX_REMOTE) }, | |
| 2245 | + { HID_USB_DEVICE(USB_VENDOR_ID_BTC, USB_DEVICE_ID_BTC_EMPREX_REMOTE_2) }, | |
| 2246 | + { HID_USB_DEVICE(USB_VENDOR_ID_CHICONY, USB_DEVICE_ID_CHICONY_WIRELESS) }, | |
| 2086 | 2247 | { HID_USB_DEVICE(USB_VENDOR_ID_TOPSEED, USB_DEVICE_ID_TOPSEED_CYBERLINK) }, |
| 2087 | 2248 | { HID_USB_DEVICE(USB_VENDOR_ID_TOPSEED2, USB_DEVICE_ID_TOPSEED2_RF_COMBO) }, |
| 2249 | +#endif | |
| 2250 | +#if IS_ENABLED(CONFIG_HID_TWINHAN) | |
| 2088 | 2251 | { HID_USB_DEVICE(USB_VENDOR_ID_TWINHAN, USB_DEVICE_ID_TWINHAN_IR_REMOTE) }, |
| 2252 | +#endif | |
| 2253 | +#if IS_ENABLED(CONFIG_HID_UCLOGIC) | |
| 2254 | + { HID_USB_DEVICE(USB_VENDOR_ID_HUION, USB_DEVICE_ID_HUION_TABLET) }, | |
| 2255 | + { HID_USB_DEVICE(USB_VENDOR_ID_UCLOGIC, USB_DEVICE_ID_HUION_TABLET) }, | |
| 2089 | 2256 | { HID_USB_DEVICE(USB_VENDOR_ID_UCLOGIC, USB_DEVICE_ID_UCLOGIC_TABLET_PF1209) }, |
| 2090 | 2257 | { HID_USB_DEVICE(USB_VENDOR_ID_UCLOGIC, USB_DEVICE_ID_UCLOGIC_TABLET_WP4030U) }, |
| 2091 | 2258 | { HID_USB_DEVICE(USB_VENDOR_ID_UCLOGIC, USB_DEVICE_ID_UCLOGIC_TABLET_WP5540U) }, |
| @@ -2093,20 +2260,17 @@ static const struct hid_device_id hid_have_special_driver[] = { · 1 unmodified line | ||
| 2093 | 2260 | { HID_USB_DEVICE(USB_VENDOR_ID_UCLOGIC, USB_DEVICE_ID_UCLOGIC_TABLET_WP1062) }, |
| 2094 | 2261 | { HID_USB_DEVICE(USB_VENDOR_ID_UCLOGIC, USB_DEVICE_ID_UCLOGIC_WIRELESS_TABLET_TWHL850) }, |
| 2095 | 2262 | { HID_USB_DEVICE(USB_VENDOR_ID_UCLOGIC, USB_DEVICE_ID_UCLOGIC_TABLET_TWHA60) }, |
| 2096 | − { HID_USB_DEVICE(USB_VENDOR_ID_THQ, USB_DEVICE_ID_THQ_PS3_UDRAW) }, | |
| 2097 | 2263 | { HID_USB_DEVICE(USB_VENDOR_ID_UCLOGIC, USB_DEVICE_ID_YIYNOVA_TABLET) }, |
| 2098 | 2264 | { HID_USB_DEVICE(USB_VENDOR_ID_UCLOGIC, USB_DEVICE_ID_UGEE_TABLET_81) }, |
| 2099 | 2265 | { HID_USB_DEVICE(USB_VENDOR_ID_UCLOGIC, USB_DEVICE_ID_UGEE_TABLET_45) }, |
| 2100 | 2266 | { HID_USB_DEVICE(USB_VENDOR_ID_UCLOGIC, USB_DEVICE_ID_UCLOGIC_DRAWIMAGE_G3) }, |
| 2101 | − { HID_USB_DEVICE(USB_VENDOR_ID_UGTIZER, USB_DEVICE_ID_UGTIZER_TABLET_GP0610) }, | |
| 2102 | 2267 | { HID_USB_DEVICE(USB_VENDOR_ID_UGEE, USB_DEVICE_ID_UGEE_TABLET_EX07S) }, |
| 2103 | − { HID_USB_DEVICE(USB_VENDOR_ID_WISEGROUP, USB_DEVICE_ID_SMARTJOY_PLUS) }, | |
| 2104 | − { HID_USB_DEVICE(USB_VENDOR_ID_WISEGROUP, USB_DEVICE_ID_SUPER_JOY_BOX_3) }, | |
| 2105 | − { HID_USB_DEVICE(USB_VENDOR_ID_WISEGROUP, USB_DEVICE_ID_DUAL_USB_JOYPAD) }, | |
| 2106 | − { HID_USB_DEVICE(USB_VENDOR_ID_WISEGROUP_LTD, USB_DEVICE_ID_SUPER_JOY_BOX_3_PRO) }, | |
| 2107 | − { HID_USB_DEVICE(USB_VENDOR_ID_WISEGROUP_LTD, USB_DEVICE_ID_SUPER_DUAL_BOX_PRO) }, | |
| 2108 | − { HID_USB_DEVICE(USB_VENDOR_ID_WISEGROUP_LTD, USB_DEVICE_ID_SUPER_JOY_BOX_5_PRO) }, | |
| 2109 | − { HID_USB_DEVICE(USB_VENDOR_ID_PLAYDOTCOM, USB_DEVICE_ID_PLAYDOTCOM_EMS_USBII) }, | |
| 2268 | + { HID_USB_DEVICE(USB_VENDOR_ID_UGTIZER, USB_DEVICE_ID_UGTIZER_TABLET_GP0610) }, | |
| 2269 | +#endif | |
| 2270 | +#if IS_ENABLED(CONFIG_HID_UDRAW_PS3) | |
| 2271 | + { HID_USB_DEVICE(USB_VENDOR_ID_THQ, USB_DEVICE_ID_THQ_PS3_UDRAW) }, | |
| 2272 | +#endif | |
| 2273 | +#if IS_ENABLED(CONFIG_HID_WALTOP) | |
| 2110 | 2274 | { HID_USB_DEVICE(USB_VENDOR_ID_WALTOP, USB_DEVICE_ID_WALTOP_SLIM_TABLET_5_8_INCH) }, |
| 2111 | 2275 | { HID_USB_DEVICE(USB_VENDOR_ID_WALTOP, USB_DEVICE_ID_WALTOP_SLIM_TABLET_12_1_INCH) }, |
| 2112 | 2276 | { HID_USB_DEVICE(USB_VENDOR_ID_WALTOP, USB_DEVICE_ID_WALTOP_Q_PAD) }, |
| @@ -2114,19 +2278,18 @@ static const struct hid_device_id hid_have_special_driver[] = { · 1 unmodified line | ||
| 2114 | 2278 | { HID_USB_DEVICE(USB_VENDOR_ID_WALTOP, USB_DEVICE_ID_WALTOP_MEDIA_TABLET_10_6_INCH) }, |
| 2115 | 2279 | { HID_USB_DEVICE(USB_VENDOR_ID_WALTOP, USB_DEVICE_ID_WALTOP_MEDIA_TABLET_14_1_INCH) }, |
| 2116 | 2280 | { HID_USB_DEVICE(USB_VENDOR_ID_WALTOP, USB_DEVICE_ID_WALTOP_SIRIUS_BATTERY_FREE_TABLET) }, |
| 2117 | − { HID_USB_DEVICE(USB_VENDOR_ID_X_TENSIONS, USB_DEVICE_ID_SPEEDLINK_VAD_CEZANNE) }, | |
| 2281 | +#endif | |
| 2282 | +#if IS_ENABLED(CONFIG_HID_XINMO) | |
| 2118 | 2283 | { HID_USB_DEVICE(USB_VENDOR_ID_XIN_MO, USB_DEVICE_ID_XIN_MO_DUAL_ARCADE) }, |
| 2119 | 2284 | { HID_USB_DEVICE(USB_VENDOR_ID_XIN_MO, USB_DEVICE_ID_THT_2P_ARCADE) }, |
| 2285 | +#endif | |
| 2286 | +#if IS_ENABLED(CONFIG_HID_ZEROPLUS) | |
| 2120 | 2287 | { HID_USB_DEVICE(USB_VENDOR_ID_ZEROPLUS, 0x0005) }, |
| 2121 | 2288 | { HID_USB_DEVICE(USB_VENDOR_ID_ZEROPLUS, 0x0030) }, |
| 2289 | +#endif | |
| 2290 | +#if IS_ENABLED(CONFIG_HID_ZYDACRON) | |
| 2122 | 2291 | { HID_USB_DEVICE(USB_VENDOR_ID_ZYDACRON, USB_DEVICE_ID_ZYDACRON_REMOTE_CONTROL) }, |
| 2123 | − | |
| 2124 | − { HID_BLUETOOTH_DEVICE(USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_PRESENTER_8K_BT) }, | |
| 2125 | − { HID_BLUETOOTH_DEVICE(USB_VENDOR_ID_NINTENDO, USB_DEVICE_ID_NINTENDO_WIIMOTE) }, | |
| 2126 | − { HID_BLUETOOTH_DEVICE(USB_VENDOR_ID_NINTENDO, USB_DEVICE_ID_NINTENDO_WIIMOTE2) }, | |
| 2127 | − { HID_USB_DEVICE(USB_VENDOR_ID_RAZER, USB_DEVICE_ID_RAZER_BLADE_14) }, | |
| 2128 | − { HID_USB_DEVICE(USB_VENDOR_ID_CMEDIA, USB_DEVICE_ID_CM6533) }, | |
| 2129 | − { HID_USB_DEVICE(USB_VENDOR_ID_LENOVO, USB_DEVICE_ID_LENOVO_X1_COVER) }, | |
| 2292 | +#endif | |
| 2130 | 2293 | { } |
| 2131 | 2294 | }; |
| 2132 | 2295 | |
| @@ -1,10 +1,8 @@ | ||
| 1 | 1 | /* |
| 2 | − * HID driver for Elecom BM084 (bluetooth mouse). | |
| 3 | − * Removes a non-existing horizontal wheel from | |
| 4 | − * the HID descriptor. | |
| 5 | − * (This module is based on "hid-ortek".) | |
| 6 | − * | |
| 2 | + * HID driver for ELECOM devices. | |
| 7 | 3 | * Copyright (c) 2010 Richard Nauber <Richard.Nauber@gmail.com> |
| 4 | + * Copyright (c) 2016 Yuxuan Shui <yshuiv7@gmail.com> | |
| 5 | + * Copyright (c) 2017 Diego Elio Pettenò <flameeyes@flameeyes.eu> | |
| 8 | 6 | */ |
| 9 | 7 | |
| 10 | 8 | /* |
| @@ -23,15 +21,61 @@ · 12 unmodified lines | ||
| 23 | 21 | static __u8 *elecom_report_fixup(struct hid_device *hdev, __u8 *rdesc, |
| 24 | 22 | unsigned int *rsize) |
| 25 | 23 | { |
| 26 | − if (*rsize >= 48 && rdesc[46] == 0x05 && rdesc[47] == 0x0c) { | |
| 27 | − hid_info(hdev, "Fixing up Elecom BM084 report descriptor\n"); | |
| 28 | − rdesc[47] = 0x00; | |
| 24 | + switch (hdev->product) { | |
| 25 | + case USB_DEVICE_ID_ELECOM_BM084: | |
| 26 | + /* The BM084 Bluetooth mouse includes a non-existing horizontal | |
| 27 | + * wheel in the HID descriptor. */ | |
| 28 | + if (*rsize >= 48 && rdesc[46] == 0x05 && rdesc[47] == 0x0c) { | |
| 29 | + hid_info(hdev, "Fixing up Elecom BM084 report descriptor\n"); | |
| 30 | + rdesc[47] = 0x00; | |
| 31 | + } | |
| 32 | + break; | |
| 33 | + case USB_DEVICE_ID_ELECOM_DEFT_WIRED: | |
| 34 | + case USB_DEVICE_ID_ELECOM_DEFT_WIRELESS: | |
| 35 | + /* The DEFT trackball has eight buttons, but its descriptor only | |
| 36 | + * reports five, disabling the three Fn buttons on the top of | |
| 37 | + * the mouse. | |
| 38 | + * | |
| 39 | + * Apply the following diff to the descriptor: | |
| 40 | + * | |
| 41 | + * Collection (Physical), Collection (Physical), | |
| 42 | + * Report ID (1), Report ID (1), | |
| 43 | + * Report Count (5), -> Report Count (8), | |
| 44 | + * Report Size (1), Report Size (1), | |
| 45 | + * Usage Page (Button), Usage Page (Button), | |
| 46 | + * Usage Minimum (01h), Usage Minimum (01h), | |
| 47 | + * Usage Maximum (05h), -> Usage Maximum (08h), | |
| 48 | + * Logical Minimum (0), Logical Minimum (0), | |
| 49 | + * Logical Maximum (1), Logical Maximum (1), | |
| 50 | + * Input (Variable), Input (Variable), | |
| 51 | + * Report Count (1), -> Report Count (0), | |
| 52 | + * Report Size (3), Report Size (3), | |
| 53 | + * Input (Constant), Input (Constant), | |
| 54 | + * Report Size (16), Report Size (16), | |
| 55 | + * Report Count (2), Report Count (2), | |
| 56 | + * Usage Page (Desktop), Usage Page (Desktop), | |
| 57 | + * Usage (X), Usage (X), | |
| 58 | + * Usage (Y), Usage (Y), | |
| 59 | + * Logical Minimum (-32768), Logical Minimum (-32768), | |
| 60 | + * Logical Maximum (32767), Logical Maximum (32767), | |
| 61 | + * Input (Variable, Relative), Input (Variable, Relative), | |
| 62 | + * End Collection, End Collection, | |
| 63 | + */ | |
| 64 | + if (*rsize == 213 && rdesc[13] == 5 && rdesc[21] == 5) { | |
| 65 | + hid_info(hdev, "Fixing up Elecom DEFT Fn buttons\n"); | |
| 66 | + rdesc[13] = 8; /* Button/Variable Report Count */ | |
| 67 | + rdesc[21] = 8; /* Button/Variable Usage Maximum */ | |
| 68 | + rdesc[29] = 0; /* Button/Constant Report Count */ | |
| 69 | + } | |
| 70 | + break; | |
| 29 | 71 | } |
| 30 | 72 | return rdesc; |
| 31 | 73 | } |
| 32 | 74 | |
| 33 | 75 | static const struct hid_device_id elecom_devices[] = { |
| 34 | − { HID_BLUETOOTH_DEVICE(USB_VENDOR_ID_ELECOM, USB_DEVICE_ID_ELECOM_BM084)}, | |
| 76 | + { HID_BLUETOOTH_DEVICE(USB_VENDOR_ID_ELECOM, USB_DEVICE_ID_ELECOM_BM084) }, | |
| 77 | + { HID_USB_DEVICE(USB_VENDOR_ID_ELECOM, USB_DEVICE_ID_ELECOM_DEFT_WIRED) }, | |
| 78 | + { HID_USB_DEVICE(USB_VENDOR_ID_ELECOM, USB_DEVICE_ID_ELECOM_DEFT_WIRELESS) }, | |
| 35 | 79 | { } |
| 36 | 80 | }; |
| 37 | 81 | MODULE_DEVICE_TABLE(hid, elecom_devices); |
| @@ -173,6 +173,7 @@ · 172 unmodified lines | ||
| 173 | 173 | #define USB_VENDOR_ID_ASUSTEK 0x0b05 |
| 174 | 174 | #define USB_DEVICE_ID_ASUSTEK_LCM 0x1726 |
| 175 | 175 | #define USB_DEVICE_ID_ASUSTEK_LCM2 0x175b |
| 176 | +#define USB_DEVICE_ID_ASUSTEK_T100_KEYBOARD 0x17e0 | |
| 176 | 177 | #define USB_DEVICE_ID_ASUSTEK_I2C_KEYBOARD 0x8585 |
| 177 | 178 | #define USB_DEVICE_ID_ASUSTEK_I2C_TOUCHPAD 0x0101 |
| 178 | 179 | #define USB_DEVICE_ID_ASUSTEK_ROG_KEYBOARD1 0x1854 |
| @@ -358,6 +359,8 @@ · 179 unmodified lines | ||
| 358 | 359 | |
| 359 | 360 | #define USB_VENDOR_ID_ELECOM 0x056e |
| 360 | 361 | #define USB_DEVICE_ID_ELECOM_BM084 0x0061 |
| 362 | +#define USB_DEVICE_ID_ELECOM_DEFT_WIRED 0x00fe | |
| 363 | +#define USB_DEVICE_ID_ELECOM_DEFT_WIRELESS 0x00ff | |
| 361 | 364 | |
| 362 | 365 | #define USB_VENDOR_ID_DREAM_CHEEKY 0x1d34 |
| 363 | 366 | #define USB_DEVICE_ID_DREAM_CHEEKY_WN 0x0004 |
| @@ -349,6 +349,7 @@ static int magicmouse_raw_event(struct hid_device *hdev, · 348 unmodified lines | ||
| 349 | 349 | |
| 350 | 350 | if (input->id.product == USB_DEVICE_ID_APPLE_MAGICMOUSE) { |
| 351 | 351 | magicmouse_emit_buttons(msc, clicks & 3); |
| 352 | + input_mt_report_pointer_emulation(input, true); | |
| 352 | 353 | input_report_rel(input, REL_X, x); |
| 353 | 354 | input_report_rel(input, REL_Y, y); |
| 354 | 355 | } else { /* USB_DEVICE_ID_APPLE_MAGICTRACKPAD */ |
| @@ -388,16 +389,16 @@ static int magicmouse_setup_input(struct input_dev *input, struct hid_device *hd · 33 unmodified lines | ||
| 388 | 389 | __clear_bit(BTN_RIGHT, input->keybit); |
| 389 | 390 | __clear_bit(BTN_MIDDLE, input->keybit); |
| 390 | 391 | __set_bit(BTN_MOUSE, input->keybit); |
| 391 | − __set_bit(BTN_TOOL_FINGER, input->keybit); | |
| 392 | − __set_bit(BTN_TOOL_DOUBLETAP, input->keybit); | |
| 393 | − __set_bit(BTN_TOOL_TRIPLETAP, input->keybit); | |
| 394 | − __set_bit(BTN_TOOL_QUADTAP, input->keybit); | |
| 395 | − __set_bit(BTN_TOOL_QUINTTAP, input->keybit); | |
| 396 | − __set_bit(BTN_TOUCH, input->keybit); | |
| 397 | − __set_bit(INPUT_PROP_POINTER, input->propbit); | |
| 398 | 392 | __set_bit(INPUT_PROP_BUTTONPAD, input->propbit); |
| 399 | 393 | } |
| 400 | 394 | |
| 395 | + __set_bit(BTN_TOOL_FINGER, input->keybit); | |
| 396 | + __set_bit(BTN_TOOL_DOUBLETAP, input->keybit); | |
| 397 | + __set_bit(BTN_TOOL_TRIPLETAP, input->keybit); | |
| 398 | + __set_bit(BTN_TOOL_QUADTAP, input->keybit); | |
| 399 | + __set_bit(BTN_TOOL_QUINTTAP, input->keybit); | |
| 400 | + __set_bit(BTN_TOUCH, input->keybit); | |
| 401 | + __set_bit(INPUT_PROP_POINTER, input->propbit); | |
| 401 | 402 | |
| 402 | 403 | __set_bit(EV_ABS, input->evbit); |
| 403 | 404 | |
| @@ -897,6 +897,15 @@ static int i2c_hid_acpi_pdata(struct i2c_client *client, · 896 unmodified lines | ||
| 897 | 897 | return 0; |
| 898 | 898 | } |
| 899 | 899 | |
| 900 | +static void i2c_hid_acpi_fix_up_power(struct device *dev) | |
| 901 | +{ | |
| 902 | + acpi_handle handle = ACPI_HANDLE(dev); | |
| 903 | + struct acpi_device *adev; | |
| 904 | + | |
| 905 | + if (handle && acpi_bus_get_device(handle, &adev) == 0) | |
| 906 | + acpi_device_fix_up_power(adev); | |
| 907 | +} | |
| 908 | + | |
| 900 | 909 | static const struct acpi_device_id i2c_hid_acpi_match[] = { |
| 901 | 910 | {"ACPI0C50", 0 }, |
| 902 | 911 | {"PNP0C50", 0 }, |
| @@ -909,6 +918,8 @@ static inline int i2c_hid_acpi_pdata(struct i2c_client *client, · 6 unmodified lines | ||
| 909 | 918 | { |
| 910 | 919 | return -ENODEV; |
| 911 | 920 | } |
| 921 | + | |
| 922 | +static inline void i2c_hid_acpi_fix_up_power(struct device *dev) {} | |
| 912 | 923 | #endif |
| 913 | 924 | |
| 914 | 925 | #ifdef CONFIG_OF |
| @@ -1030,6 +1041,8 @@ static int i2c_hid_probe(struct i2c_client *client, · 115 unmodified lines | ||
| 1030 | 1041 | if (ret < 0) |
| 1031 | 1042 | goto err_regulator; |
| 1032 | 1043 | |
| 1044 | + i2c_hid_acpi_fix_up_power(&client->dev); | |
| 1045 | + | |
| 1033 | 1046 | pm_runtime_get_noresume(&client->dev); |
| 1034 | 1047 | pm_runtime_set_active(&client->dev); |
| 1035 | 1048 | pm_runtime_enable(&client->dev); |
| @@ -1571,37 +1571,38 @@ static int wacom_tpc_irq(struct wacom_wac *wacom, size_t len) · 1570 unmodified lines | ||
| 1571 | 1571 | { |
| 1572 | 1572 | unsigned char *data = wacom->data; |
| 1573 | 1573 | |
| 1574 | − if (wacom->pen_input) | |
| 1574 | + if (wacom->pen_input) { | |
| 1575 | 1575 | dev_dbg(wacom->pen_input->dev.parent, |
| 1576 | 1576 | "%s: received report #%d\n", __func__, data[0]); |
| 1577 | − else if (wacom->touch_input) | |
| 1577 | + | |
| 1578 | + if (len == WACOM_PKGLEN_PENABLED || | |
| 1579 | + data[0] == WACOM_REPORT_PENABLED) | |
| 1580 | + return wacom_tpc_pen(wacom); | |
| 1581 | + } | |
| 1582 | + else if (wacom->touch_input) { | |
| 1578 | 1583 | dev_dbg(wacom->touch_input->dev.parent, |
| 1579 | 1584 | "%s: received report #%d\n", __func__, data[0]); |
| 1580 | 1585 | |
| 1581 | − switch (len) { | |
| 1582 | − case WACOM_PKGLEN_TPC1FG: | |
| 1583 | − return wacom_tpc_single_touch(wacom, len); | |
| 1586 | + switch (len) { | |
| 1587 | + case WACOM_PKGLEN_TPC1FG: | |
| 1588 | + return wacom_tpc_single_touch(wacom, len); | |
| 1584 | 1589 | |
| 1585 | − case WACOM_PKGLEN_TPC2FG: | |
| 1586 | − return wacom_tpc_mt_touch(wacom); | |
| 1590 | + case WACOM_PKGLEN_TPC2FG: | |
| 1591 | + return wacom_tpc_mt_touch(wacom); | |
| 1587 | 1592 | |
| 1588 | − case WACOM_PKGLEN_PENABLED: | |
| 1589 | − return wacom_tpc_pen(wacom); | |
| 1593 | + default: | |
| 1594 | + switch (data[0]) { | |
| 1595 | + case WACOM_REPORT_TPC1FG: | |
| 1596 | + case WACOM_REPORT_TPCHID: | |
| 1597 | + case WACOM_REPORT_TPCST: | |
| 1598 | + case WACOM_REPORT_TPC1FGE: | |
| 1599 | + return wacom_tpc_single_touch(wacom, len); | |
| 1590 | 1600 | |
| 1591 | − default: | |
| 1592 | − switch (data[0]) { | |
| 1593 | − case WACOM_REPORT_TPC1FG: | |
| 1594 | − case WACOM_REPORT_TPCHID: | |
| 1595 | − case WACOM_REPORT_TPCST: | |
| 1596 | − case WACOM_REPORT_TPC1FGE: | |
| 1597 | − return wacom_tpc_single_touch(wacom, len); | |
| 1598 | − | |
| 1599 | − case WACOM_REPORT_TPCMT: | |
| 1600 | − case WACOM_REPORT_TPCMT2: | |
| 1601 | − return wacom_mt_touch(wacom); | |
| 1601 | + case WACOM_REPORT_TPCMT: | |
| 1602 | + case WACOM_REPORT_TPCMT2: | |
| 1603 | + return wacom_mt_touch(wacom); | |
| 1602 | 1604 | |
| 1603 | − case WACOM_REPORT_PENABLED: | |
| 1604 | − return wacom_tpc_pen(wacom); | |
| 1605 | + } | |
| 1605 | 1606 | } |
| 1606 | 1607 | } |
| 1607 | 1608 | |
| @@ -1066,7 +1066,7 @@ static void ssip_pn_setup(struct net_device *dev) · 1065 unmodified lines | ||
| 1066 | 1066 | dev->addr_len = 1; |
| 1067 | 1067 | dev->tx_queue_len = SSIP_TXQUEUE_LEN; |
| 1068 | 1068 | |
| 1069 | − dev->destructor = free_netdev; | |
| 1069 | + dev->needs_free_netdev = true; | |
| 1070 | 1070 | dev->header_ops = &phonet_header_ops; |
| 1071 | 1071 | } |
| 1072 | 1072 | |
| @@ -343,6 +343,7 @@ config SENSORS_ASB100 · 342 unmodified lines | ||
| 343 | 343 | |
| 344 | 344 | config SENSORS_ASPEED |
| 345 | 345 | tristate "ASPEED AST2400/AST2500 PWM and Fan tach driver" |
| 346 | + select REGMAP | |
| 346 | 347 | help |
| 347 | 348 | This driver provides support for ASPEED AST2400/AST2500 PWM |
| 348 | 349 | and Fan Tacho controllers. |
| @@ -7,6 +7,7 @@ · 6 unmodified lines | ||
| 7 | 7 | */ |
| 8 | 8 | |
| 9 | 9 | #include <linux/clk.h> |
| 10 | +#include <linux/errno.h> | |
| 10 | 11 | #include <linux/gpio/consumer.h> |
| 11 | 12 | #include <linux/delay.h> |
| 12 | 13 | #include <linux/hwmon.h> |
| @@ -494,7 +495,7 @@ static u32 aspeed_get_fan_tach_ch_measure_period(struct aspeed_pwm_tacho_data · 481 unmodified lines | ||
| 494 | 495 | return clk / (clk_unit * div_h * div_l * tacho_div * tacho_unit); |
| 495 | 496 | } |
| 496 | 497 | |
| 497 | −static u32 aspeed_get_fan_tach_ch_rpm(struct aspeed_pwm_tacho_data *priv, | |
| 498 | +static int aspeed_get_fan_tach_ch_rpm(struct aspeed_pwm_tacho_data *priv, | |
| 498 | 499 | u8 fan_tach_ch) |
| 499 | 500 | { |
| 500 | 501 | u32 raw_data, tach_div, clk_source, sec, val; |
| @@ -510,6 +511,9 @@ static u32 aspeed_get_fan_tach_ch_rpm(struct aspeed_pwm_tacho_data *priv, · 9 unmodified lines | ||
| 510 | 511 | msleep(sec); |
| 511 | 512 | |
| 512 | 513 | regmap_read(priv->regmap, ASPEED_PTCR_RESULT, &val); |
| 514 | + if (!(val & RESULT_STATUS_MASK)) | |
| 515 | + return -ETIMEDOUT; | |
| 516 | + | |
| 513 | 517 | raw_data = val & RESULT_VALUE_MASK; |
| 514 | 518 | tach_div = priv->type_fan_tach_clock_division[type]; |
| 515 | 519 | tach_div = 0x4 << (tach_div * 2); |
| @@ -561,12 +565,14 @@ static ssize_t show_rpm(struct device *dev, struct device_attribute *attr, · 45 unmodified lines | ||
| 561 | 565 | { |
| 562 | 566 | struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); |
| 563 | 567 | int index = sensor_attr->index; |
| 564 | − u32 rpm; | |
| 568 | + int rpm; | |
| 565 | 569 | struct aspeed_pwm_tacho_data *priv = dev_get_drvdata(dev); |
| 566 | 570 | |
| 567 | 571 | rpm = aspeed_get_fan_tach_ch_rpm(priv, index); |
| 572 | + if (rpm < 0) | |
| 573 | + return rpm; | |
| 568 | 574 | |
| 569 | − return sprintf(buf, "%u\n", rpm); | |
| 575 | + return sprintf(buf, "%d\n", rpm); | |
| 570 | 576 | } |
| 571 | 577 | |
| 572 | 578 | static umode_t pwm_is_visible(struct kobject *kobj, |
| @@ -591,24 +597,23 @@ static umode_t fan_dev_is_visible(struct kobject *kobj, · 18 unmodified lines | ||
| 591 | 597 | return a->mode; |
| 592 | 598 | } |
| 593 | 599 | |
| 594 | −static SENSOR_DEVICE_ATTR(pwm0, 0644, | |
| 595 | − show_pwm, set_pwm, 0); | |
| 596 | 600 | static SENSOR_DEVICE_ATTR(pwm1, 0644, |
| 597 | − show_pwm, set_pwm, 1); | |
| 601 | + show_pwm, set_pwm, 0); | |
| 598 | 602 | static SENSOR_DEVICE_ATTR(pwm2, 0644, |
| 599 | − show_pwm, set_pwm, 2); | |
| 603 | + show_pwm, set_pwm, 1); | |
| 600 | 604 | static SENSOR_DEVICE_ATTR(pwm3, 0644, |
| 601 | − show_pwm, set_pwm, 3); | |
| 605 | + show_pwm, set_pwm, 2); | |
| 602 | 606 | static SENSOR_DEVICE_ATTR(pwm4, 0644, |
| 603 | − show_pwm, set_pwm, 4); | |
| 607 | + show_pwm, set_pwm, 3); | |
| 604 | 608 | static SENSOR_DEVICE_ATTR(pwm5, 0644, |
| 605 | − show_pwm, set_pwm, 5); | |
| 609 | + show_pwm, set_pwm, 4); | |
| 606 | 610 | static SENSOR_DEVICE_ATTR(pwm6, 0644, |
| 607 | − show_pwm, set_pwm, 6); | |
| 611 | + show_pwm, set_pwm, 5); | |
| 608 | 612 | static SENSOR_DEVICE_ATTR(pwm7, 0644, |
| 613 | + show_pwm, set_pwm, 6); | |
| 614 | +static SENSOR_DEVICE_ATTR(pwm8, 0644, | |
| 609 | 615 | show_pwm, set_pwm, 7); |
| 610 | 616 | static struct attribute *pwm_dev_attrs[] = { |
| 611 | − &sensor_dev_attr_pwm0.dev_attr.attr, | |
| 612 | 617 | &sensor_dev_attr_pwm1.dev_attr.attr, |
| 613 | 618 | &sensor_dev_attr_pwm2.dev_attr.attr, |
| 614 | 619 | &sensor_dev_attr_pwm3.dev_attr.attr, |
| @@ -616,6 +621,7 @@ static struct attribute *pwm_dev_attrs[] = { · 1 unmodified line | ||
| 616 | 621 | &sensor_dev_attr_pwm5.dev_attr.attr, |
| 617 | 622 | &sensor_dev_attr_pwm6.dev_attr.attr, |
| 618 | 623 | &sensor_dev_attr_pwm7.dev_attr.attr, |
| 624 | + &sensor_dev_attr_pwm8.dev_attr.attr, | |
| 619 | 625 | NULL, |
| 620 | 626 | }; |
| 621 | 627 | |
| @@ -624,40 +630,39 @@ static const struct attribute_group pwm_dev_group = { · 2 unmodified lines | ||
| 624 | 630 | .is_visible = pwm_is_visible, |
| 625 | 631 | }; |
| 626 | 632 | |
| 627 | −static SENSOR_DEVICE_ATTR(fan0_input, 0444, | |
| 628 | − show_rpm, NULL, 0); | |
| 629 | 633 | static SENSOR_DEVICE_ATTR(fan1_input, 0444, |
| 630 | − show_rpm, NULL, 1); | |
| 634 | + show_rpm, NULL, 0); | |
| 631 | 635 | static SENSOR_DEVICE_ATTR(fan2_input, 0444, |
| 632 | − show_rpm, NULL, 2); | |
| 636 | + show_rpm, NULL, 1); | |
| 633 | 637 | static SENSOR_DEVICE_ATTR(fan3_input, 0444, |
| 634 | − show_rpm, NULL, 3); | |
| 638 | + show_rpm, NULL, 2); | |
| 635 | 639 | static SENSOR_DEVICE_ATTR(fan4_input, 0444, |
| 636 | − show_rpm, NULL, 4); | |
| 640 | + show_rpm, NULL, 3); | |
| 637 | 641 | static SENSOR_DEVICE_ATTR(fan5_input, 0444, |
| 638 | − show_rpm, NULL, 5); | |
| 642 | + show_rpm, NULL, 4); | |
| 639 | 643 | static SENSOR_DEVICE_ATTR(fan6_input, 0444, |
| 640 | − show_rpm, NULL, 6); | |
| 644 | + show_rpm, NULL, 5); | |
| 641 | 645 | static SENSOR_DEVICE_ATTR(fan7_input, 0444, |
| 642 | − show_rpm, NULL, 7); | |
| 646 | + show_rpm, NULL, 6); | |
| 643 | 647 | static SENSOR_DEVICE_ATTR(fan8_input, 0444, |
| 644 | − show_rpm, NULL, 8); | |
| 648 | + show_rpm, NULL, 7); | |
| 645 | 649 | static SENSOR_DEVICE_ATTR(fan9_input, 0444, |
| 646 | − show_rpm, NULL, 9); | |
| 650 | + show_rpm, NULL, 8); | |
| 647 | 651 | static SENSOR_DEVICE_ATTR(fan10_input, 0444, |
| 648 | − show_rpm, NULL, 10); | |
| 652 | + show_rpm, NULL, 9); | |
| 649 | 653 | static SENSOR_DEVICE_ATTR(fan11_input, 0444, |
| 650 | − show_rpm, NULL, 11); | |
| 654 | + show_rpm, NULL, 10); | |
| 651 | 655 | static SENSOR_DEVICE_ATTR(fan12_input, 0444, |
| 652 | − show_rpm, NULL, 12); | |
| 656 | + show_rpm, NULL, 11); | |
| 653 | 657 | static SENSOR_DEVICE_ATTR(fan13_input, 0444, |
| 654 | − show_rpm, NULL, 13); | |
| 658 | + show_rpm, NULL, 12); | |
| 655 | 659 | static SENSOR_DEVICE_ATTR(fan14_input, 0444, |
| 656 | − show_rpm, NULL, 14); | |
| 660 | + show_rpm, NULL, 13); | |
| 657 | 661 | static SENSOR_DEVICE_ATTR(fan15_input, 0444, |
| 662 | + show_rpm, NULL, 14); | |
| 663 | +static SENSOR_DEVICE_ATTR(fan16_input, 0444, | |
| 658 | 664 | show_rpm, NULL, 15); |
| 659 | 665 | static struct attribute *fan_dev_attrs[] = { |
| 660 | − &sensor_dev_attr_fan0_input.dev_attr.attr, | |
| 661 | 666 | &sensor_dev_attr_fan1_input.dev_attr.attr, |
| 662 | 667 | &sensor_dev_attr_fan2_input.dev_attr.attr, |
| 663 | 668 | &sensor_dev_attr_fan3_input.dev_attr.attr, |
| @@ -673,6 +678,7 @@ static struct attribute *fan_dev_attrs[] = { · 9 unmodified lines | ||
| 673 | 678 | &sensor_dev_attr_fan13_input.dev_attr.attr, |
| 674 | 679 | &sensor_dev_attr_fan14_input.dev_attr.attr, |
| 675 | 680 | &sensor_dev_attr_fan15_input.dev_attr.attr, |
| 681 | + &sensor_dev_attr_fan16_input.dev_attr.attr, | |
| 676 | 682 | NULL |
| 677 | 683 | }; |
| 678 | 684 | |
| @@ -802,7 +808,6 @@ static int aspeed_pwm_tacho_probe(struct platform_device *pdev) · 123 unmodified lines | ||
| 802 | 808 | if (ret) |
| 803 | 809 | return ret; |
| 804 | 810 | } |
| 805 | − of_node_put(np); | |
| 806 | 811 | |
| 807 | 812 | priv->groups[0] = &pwm_dev_group; |
| 808 | 813 | priv->groups[1] = &fan_dev_group; |
| @@ -584,7 +584,7 @@ static int ismt_access(struct i2c_adapter *adap, u16 addr, · 583 unmodified lines | ||
| 584 | 584 | |
| 585 | 585 | /* unmap the data buffer */ |
| 586 | 586 | if (dma_size != 0) |
| 587 | − dma_unmap_single(&adap->dev, dma_addr, dma_size, dma_direction); | |
| 587 | + dma_unmap_single(dev, dma_addr, dma_size, dma_direction); | |
| 588 | 588 | |
| 589 | 589 | if (unlikely(!time_left)) { |
| 590 | 590 | dev_err(dev, "completion wait timed out\n"); |
| @@ -319,7 +319,7 @@ static void rcar_i2c_dma_unmap(struct rcar_i2c_priv *priv) · 318 unmodified lines | ||
| 319 | 319 | rcar_i2c_write(priv, ICFBSCR, TCYC06); |
| 320 | 320 | |
| 321 | 321 | dma_unmap_single(chan->device->dev, sg_dma_address(&priv->sg), |
| 322 | − priv->msg->len, priv->dma_direction); | |
| 322 | + sg_dma_len(&priv->sg), priv->dma_direction); | |
| 323 | 323 | |
| 324 | 324 | priv->dma_direction = DMA_NONE; |
| 325 | 325 | } |
| @@ -143,7 +143,7 @@ static void iproc_adc_reg_dump(struct iio_dev *indio_dev) · 142 unmodified lines | ||
| 143 | 143 | iproc_adc_dbg_reg(dev, adc_priv, IPROC_SOFT_BYPASS_DATA); |
| 144 | 144 | } |
| 145 | 145 | |
| 146 | −static irqreturn_t iproc_adc_interrupt_handler(int irq, void *data) | |
| 146 | +static irqreturn_t iproc_adc_interrupt_thread(int irq, void *data) | |
| 147 | 147 | { |
| 148 | 148 | u32 channel_intr_status; |
| 149 | 149 | u32 intr_status; |
| @@ -167,7 +167,7 @@ static irqreturn_t iproc_adc_interrupt_handler(int irq, void *data) · 17 unmodified lines | ||
| 167 | 167 | return IRQ_NONE; |
| 168 | 168 | } |
| 169 | 169 | |
| 170 | −static irqreturn_t iproc_adc_interrupt_thread(int irq, void *data) | |
| 170 | +static irqreturn_t iproc_adc_interrupt_handler(int irq, void *data) | |
| 171 | 171 | { |
| 172 | 172 | irqreturn_t retval = IRQ_NONE; |
| 173 | 173 | struct iproc_adc_priv *adc_priv; |
| @@ -181,7 +181,7 @@ static irqreturn_t iproc_adc_interrupt_thread(int irq, void *data) · 7 unmodified lines | ||
| 181 | 181 | adc_priv = iio_priv(indio_dev); |
| 182 | 182 | |
| 183 | 183 | regmap_read(adc_priv->regmap, IPROC_INTERRUPT_STATUS, &intr_status); |
| 184 | − dev_dbg(&indio_dev->dev, "iproc_adc_interrupt_thread(),INTRPT_STS:%x\n", | |
| 184 | + dev_dbg(&indio_dev->dev, "iproc_adc_interrupt_handler(),INTRPT_STS:%x\n", | |
| 185 | 185 | intr_status); |
| 186 | 186 | |
| 187 | 187 | intr_channels = (intr_status & IPROC_ADC_INTR_MASK) >> IPROC_ADC_INTR; |
| @@ -566,8 +566,8 @@ static int iproc_adc_probe(struct platform_device *pdev) · 378 unmodified lines | ||
| 566 | 566 | } |
| 567 | 567 | |
| 568 | 568 | ret = devm_request_threaded_irq(&pdev->dev, adc_priv->irqno, |
| 569 | − iproc_adc_interrupt_thread, | |
| 570 | 569 | iproc_adc_interrupt_handler, |
| 570 | + iproc_adc_interrupt_thread, | |
| 571 | 571 | IRQF_SHARED, "iproc-adc", indio_dev); |
| 572 | 572 | if (ret) { |
| 573 | 573 | dev_err(&pdev->dev, "request_irq error %d\n", ret); |
| @@ -438,10 +438,10 @@ static ssize_t max9611_shunt_resistor_show(struct device *dev, · 437 unmodified lines | ||
| 438 | 438 | struct max9611_dev *max9611 = iio_priv(dev_to_iio_dev(dev)); |
| 439 | 439 | unsigned int i, r; |
| 440 | 440 | |
| 441 | − i = max9611->shunt_resistor_uohm / 1000; | |
| 442 | − r = max9611->shunt_resistor_uohm % 1000; | |
| 441 | + i = max9611->shunt_resistor_uohm / 1000000; | |
| 442 | + r = max9611->shunt_resistor_uohm % 1000000; | |
| 443 | 443 | |
| 444 | − return sprintf(buf, "%u.%03u\n", i, r); | |
| 444 | + return sprintf(buf, "%u.%06u\n", i, r); | |
| 445 | 445 | } |
| 446 | 446 | |
| 447 | 447 | static IIO_DEVICE_ATTR(in_power_shunt_resistor, 0444, |
| @@ -536,8 +536,8 @@ static int max9611_probe(struct i2c_client *client, · 88 unmodified lines | ||
| 536 | 536 | int ret; |
| 537 | 537 | |
| 538 | 538 | indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*max9611)); |
| 539 | − if (IS_ERR(indio_dev)) | |
| 540 | − return PTR_ERR(indio_dev); | |
| 539 | + if (!indio_dev) | |
| 540 | + return -ENOMEM; | |
| 541 | 541 | |
| 542 | 542 | i2c_set_clientdata(client, indio_dev); |
| 543 | 543 | |
| @@ -468,13 +468,13 @@ static void meson_sar_adc_unlock(struct iio_dev *indio_dev) · 467 unmodified lines | ||
| 468 | 468 | static void meson_sar_adc_clear_fifo(struct iio_dev *indio_dev) |
| 469 | 469 | { |
| 470 | 470 | struct meson_sar_adc_priv *priv = iio_priv(indio_dev); |
| 471 | − int count; | |
| 471 | + unsigned int count, tmp; | |
| 472 | 472 | |
| 473 | 473 | for (count = 0; count < MESON_SAR_ADC_MAX_FIFO_SIZE; count++) { |
| 474 | 474 | if (!meson_sar_adc_get_fifo_count(indio_dev)) |
| 475 | 475 | break; |
| 476 | 476 | |
| 477 | − regmap_read(priv->regmap, MESON_SAR_ADC_FIFO_RD, 0); | |
| 477 | + regmap_read(priv->regmap, MESON_SAR_ADC_FIFO_RD, &tmp); | |
| 478 | 478 | } |
| 479 | 479 | } |
| 480 | 480 | |
| @@ -718,9 +718,12 @@ static int mxs_lradc_adc_probe(struct platform_device *pdev) · 717 unmodified lines | ||
| 718 | 718 | adc->dev = dev; |
| 719 | 719 | |
| 720 | 720 | iores = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
| 721 | + if (!iores) | |
| 722 | + return -EINVAL; | |
| 723 | + | |
| 721 | 724 | adc->base = devm_ioremap(dev, iores->start, resource_size(iores)); |
| 722 | − if (IS_ERR(adc->base)) | |
| 723 | − return PTR_ERR(adc->base); | |
| 725 | + if (!adc->base) | |
| 726 | + return -ENOMEM; | |
| 724 | 727 | |
| 725 | 728 | init_completion(&adc->completion); |
| 726 | 729 | spin_lock_init(&adc->lock); |
| @@ -105,6 +105,8 @@ struct sun4i_gpadc_iio { · 104 unmodified lines | ||
| 105 | 105 | bool no_irq; |
| 106 | 106 | /* prevents concurrent reads of temperature and ADC */ |
| 107 | 107 | struct mutex mutex; |
| 108 | + struct thermal_zone_device *tzd; | |
| 109 | + struct device *sensor_device; | |
| 108 | 110 | }; |
| 109 | 111 | |
| 110 | 112 | #define SUN4I_GPADC_ADC_CHANNEL(_channel, _name) { \ |
| @@ -502,7 +504,6 @@ static int sun4i_gpadc_probe_dt(struct platform_device *pdev, · 391 unmodified lines | ||
| 502 | 504 | { |
| 503 | 505 | struct sun4i_gpadc_iio *info = iio_priv(indio_dev); |
| 504 | 506 | const struct of_device_id *of_dev; |
| 505 | − struct thermal_zone_device *tzd; | |
| 506 | 507 | struct resource *mem; |
| 507 | 508 | void __iomem *base; |
| 508 | 509 | int ret; |
| @@ -532,13 +533,14 @@ static int sun4i_gpadc_probe_dt(struct platform_device *pdev, · 23 unmodified lines | ||
| 532 | 533 | if (!IS_ENABLED(CONFIG_THERMAL_OF)) |
| 533 | 534 | return 0; |
| 534 | 535 | |
| 535 | − tzd = devm_thermal_zone_of_sensor_register(&pdev->dev, 0, info, | |
| 536 | − &sun4i_ts_tz_ops); | |
| 537 | − if (IS_ERR(tzd)) | |
| 536 | + info->sensor_device = &pdev->dev; | |
| 537 | + info->tzd = thermal_zone_of_sensor_register(info->sensor_device, 0, | |
| 538 | + info, &sun4i_ts_tz_ops); | |
| 539 | + if (IS_ERR(info->tzd)) | |
| 538 | 540 | dev_err(&pdev->dev, "could not register thermal sensor: %ld\n", |
| 539 | − PTR_ERR(tzd)); | |
| 541 | + PTR_ERR(info->tzd)); | |
| 540 | 542 | |
| 541 | − return PTR_ERR_OR_ZERO(tzd); | |
| 543 | + return PTR_ERR_OR_ZERO(info->tzd); | |
| 542 | 544 | } |
| 543 | 545 | |
| 544 | 546 | static int sun4i_gpadc_probe_mfd(struct platform_device *pdev, |
| @@ -584,15 +586,15 @@ static int sun4i_gpadc_probe_mfd(struct platform_device *pdev, · 39 unmodified lines | ||
| 584 | 586 | * of_node, and the device from this driver as third argument to |
| 585 | 587 | * return the temperature. |
| 586 | 588 | */ |
| 587 | − struct thermal_zone_device *tzd; | |
| 588 | − tzd = devm_thermal_zone_of_sensor_register(pdev->dev.parent, 0, | |
| 589 | − info, | |
| 590 | − &sun4i_ts_tz_ops); | |
| 591 | − if (IS_ERR(tzd)) { | |
| 589 | + info->sensor_device = pdev->dev.parent; | |
| 590 | + info->tzd = thermal_zone_of_sensor_register(info->sensor_device, | |
| 591 | + 0, info, | |
| 592 | + &sun4i_ts_tz_ops); | |
| 593 | + if (IS_ERR(info->tzd)) { | |
| 592 | 594 | dev_err(&pdev->dev, |
| 593 | 595 | "could not register thermal sensor: %ld\n", |
| 594 | − PTR_ERR(tzd)); | |
| 595 | − return PTR_ERR(tzd); | |
| 596 | + PTR_ERR(info->tzd)); | |
| 597 | + return PTR_ERR(info->tzd); | |
| 596 | 598 | } |
| 597 | 599 | } else { |
| 598 | 600 | indio_dev->num_channels = |
| @@ -688,7 +690,13 @@ static int sun4i_gpadc_remove(struct platform_device *pdev) · 89 unmodified lines | ||
| 688 | 690 | |
| 689 | 691 | pm_runtime_put(&pdev->dev); |
| 690 | 692 | pm_runtime_disable(&pdev->dev); |
| 691 | − if (!info->no_irq && IS_ENABLED(CONFIG_THERMAL_OF)) | |
| 693 | + | |
| 694 | + if (!IS_ENABLED(CONFIG_THERMAL_OF)) | |
| 695 | + return 0; | |
| 696 | + | |
| 697 | + thermal_zone_of_sensor_unregister(info->sensor_device, info->tzd); | |
| 698 | + | |
| 699 | + if (!info->no_irq) | |
| 692 | 700 | iio_map_array_unregister(indio_dev); |
| 693 | 701 | |
| 694 | 702 | return 0; |
| @@ -700,6 +708,7 @@ static const struct platform_device_id sun4i_gpadc_id[] = { · 5 unmodified lines | ||
| 700 | 708 | { "sun6i-a31-gpadc-iio", (kernel_ulong_t)&sun6i_gpadc_data }, |
| 701 | 709 | { /* sentinel */ }, |
| 702 | 710 | }; |
| 711 | +MODULE_DEVICE_TABLE(platform, sun4i_gpadc_id); | |
| 703 | 712 | |
| 704 | 713 | static struct platform_driver sun4i_gpadc_driver = { |
| 705 | 714 | .driver = { |
| @@ -711,6 +720,7 @@ static struct platform_driver sun4i_gpadc_driver = { · 5 unmodified lines | ||
| 711 | 720 | .probe = sun4i_gpadc_probe, |
| 712 | 721 | .remove = sun4i_gpadc_remove, |
| 713 | 722 | }; |
| 723 | +MODULE_DEVICE_TABLE(of, sun4i_gpadc_of_id); | |
| 714 | 724 | |
| 715 | 725 | module_platform_driver(sun4i_gpadc_driver); |
| 716 | 726 | |
| @@ -614,7 +614,7 @@ static int tiadc_probe(struct platform_device *pdev) · 613 unmodified lines | ||
| 614 | 614 | return -EINVAL; |
| 615 | 615 | } |
| 616 | 616 | |
| 617 | − indio_dev = devm_iio_device_alloc(&pdev->dev, sizeof(*indio_dev)); | |
| 617 | + indio_dev = devm_iio_device_alloc(&pdev->dev, sizeof(*adc_dev)); | |
| 618 | 618 | if (indio_dev == NULL) { |
| 619 | 619 | dev_err(&pdev->dev, "failed to allocate iio device\n"); |
| 620 | 620 | return -ENOMEM; |
| @@ -14,6 +14,7 @@ · 13 unmodified lines | ||
| 14 | 14 | #include <linux/sched.h> |
| 15 | 15 | #include <linux/poll.h> |
| 16 | 16 | #include <linux/iio/buffer.h> |
| 17 | +#include <linux/iio/buffer_impl.h> | |
| 17 | 18 | #include <linux/iio/buffer-dma.h> |
| 18 | 19 | #include <linux/dma-mapping.h> |
| 19 | 20 | #include <linux/sizes.h> |
| @@ -14,6 +14,7 @@ · 13 unmodified lines | ||
| 14 | 14 | |
| 15 | 15 | #include <linux/iio/iio.h> |
| 16 | 16 | #include <linux/iio/buffer.h> |
| 17 | +#include <linux/iio/buffer_impl.h> | |
| 17 | 18 | #include <linux/iio/buffer-dma.h> |
| 18 | 19 | #include <linux/iio/buffer-dmaengine.h> |
| 19 | 20 | |
| @@ -41,6 +41,7 @@ static const int accel_scale[] = {598, 1196, 2392, 4785}; · 40 unmodified lines | ||
| 41 | 41 | static const struct inv_mpu6050_reg_map reg_set_6500 = { |
| 42 | 42 | .sample_rate_div = INV_MPU6050_REG_SAMPLE_RATE_DIV, |
| 43 | 43 | .lpf = INV_MPU6050_REG_CONFIG, |
| 44 | + .accel_lpf = INV_MPU6500_REG_ACCEL_CONFIG_2, | |
| 44 | 45 | .user_ctrl = INV_MPU6050_REG_USER_CTRL, |
| 45 | 46 | .fifo_en = INV_MPU6050_REG_FIFO_EN, |
| 46 | 47 | .gyro_config = INV_MPU6050_REG_GYRO_CONFIG, |
| @@ -210,6 +211,37 @@ int inv_mpu6050_set_power_itg(struct inv_mpu6050_state *st, bool power_on) · 163 unmodified lines | ||
| 210 | 211 | } |
| 211 | 212 | EXPORT_SYMBOL_GPL(inv_mpu6050_set_power_itg); |
| 212 | 213 | |
| 214 | +/** | |
| 215 | + * inv_mpu6050_set_lpf_regs() - set low pass filter registers, chip dependent | |
| 216 | + * | |
| 217 | + * MPU60xx/MPU9150 use only 1 register for accelerometer + gyroscope | |
| 218 | + * MPU6500 and above have a dedicated register for accelerometer | |
| 219 | + */ | |
| 220 | +static int inv_mpu6050_set_lpf_regs(struct inv_mpu6050_state *st, | |
| 221 | + enum inv_mpu6050_filter_e val) | |
| 222 | +{ | |
| 223 | + int result; | |
| 224 | + | |
| 225 | + result = regmap_write(st->map, st->reg->lpf, val); | |
| 226 | + if (result) | |
| 227 | + return result; | |
| 228 | + | |
| 229 | + switch (st->chip_type) { | |
| 230 | + case INV_MPU6050: | |
| 231 | + case INV_MPU6000: | |
| 232 | + case INV_MPU9150: | |
| 233 | + /* old chips, nothing to do */ | |
| 234 | + result = 0; | |
| 235 | + break; | |
| 236 | + default: | |
| 237 | + /* set accel lpf */ | |
| 238 | + result = regmap_write(st->map, st->reg->accel_lpf, val); | |
| 239 | + break; | |
| 240 | + } | |
| 241 | + | |
| 242 | + return result; | |
| 243 | +} | |
| 244 | + | |
| 213 | 245 | /** |
| 214 | 246 | * inv_mpu6050_init_config() - Initialize hardware, disable FIFO. |
| 215 | 247 | * |
| @@ -233,8 +265,7 @@ static int inv_mpu6050_init_config(struct iio_dev *indio_dev) · 17 unmodified lines | ||
| 233 | 265 | if (result) |
| 234 | 266 | return result; |
| 235 | 267 | |
| 236 | − d = INV_MPU6050_FILTER_20HZ; | |
| 237 | − result = regmap_write(st->map, st->reg->lpf, d); | |
| 268 | + result = inv_mpu6050_set_lpf_regs(st, INV_MPU6050_FILTER_20HZ); | |
| 238 | 269 | if (result) |
| 239 | 270 | return result; |
| 240 | 271 | |
| @@ -537,6 +568,8 @@ error_write_raw: · 296 unmodified lines | ||
| 537 | 568 | * would be alising. This function basically search for the |
| 538 | 569 | * correct low pass parameters based on the fifo rate, e.g, |
| 539 | 570 | * sampling frequency. |
| 571 | + * | |
| 572 | + * lpf is set automatically when setting sampling rate to avoid any aliases. | |
| 540 | 573 | */ |
| 541 | 574 | static int inv_mpu6050_set_lpf(struct inv_mpu6050_state *st, int rate) |
| 542 | 575 | { |
| @@ -552,7 +585,7 @@ static int inv_mpu6050_set_lpf(struct inv_mpu6050_state *st, int rate) · 9 unmodified lines | ||
| 552 | 585 | while ((h < hz[i]) && (i < ARRAY_SIZE(d) - 1)) |
| 553 | 586 | i++; |
| 554 | 587 | data = d[i]; |
| 555 | − result = regmap_write(st->map, st->reg->lpf, data); | |
| 588 | + result = inv_mpu6050_set_lpf_regs(st, data); | |
| 556 | 589 | if (result) |
| 557 | 590 | return result; |
| 558 | 591 | st->chip_config.lpf = data; |
| @@ -28,6 +28,7 @@ · 27 unmodified lines | ||
| 28 | 28 | * struct inv_mpu6050_reg_map - Notable registers. |
| 29 | 29 | * @sample_rate_div: Divider applied to gyro output rate. |
| 30 | 30 | * @lpf: Configures internal low pass filter. |
| 31 | + * @accel_lpf: Configures accelerometer low pass filter. | |
| 31 | 32 | * @user_ctrl: Enables/resets the FIFO. |
| 32 | 33 | * @fifo_en: Determines which data will appear in FIFO. |
| 33 | 34 | * @gyro_config: gyro config register. |
| @@ -47,6 +48,7 @@ · 13 unmodified lines | ||
| 47 | 48 | struct inv_mpu6050_reg_map { |
| 48 | 49 | u8 sample_rate_div; |
| 49 | 50 | u8 lpf; |
| 51 | + u8 accel_lpf; | |
| 50 | 52 | u8 user_ctrl; |
| 51 | 53 | u8 fifo_en; |
| 52 | 54 | u8 gyro_config; |
| @@ -188,6 +190,7 @@ struct inv_mpu6050_state { · 135 unmodified lines | ||
| 188 | 190 | #define INV_MPU6050_FIFO_THRESHOLD 500 |
| 189 | 191 | |
| 190 | 192 | /* mpu6500 registers */ |
| 193 | +#define INV_MPU6500_REG_ACCEL_CONFIG_2 0x1D | |
| 191 | 194 | #define INV_MPU6500_REG_ACCEL_OFFSET 0x77 |
| 192 | 195 | |
| 193 | 196 | /* delay time in milliseconds */ |
| @@ -451,7 +451,8 @@ static ssize_t iio_trigger_write_current(struct device *dev, · 450 unmodified lines | ||
| 451 | 451 | return len; |
| 452 | 452 | |
| 453 | 453 | out_trigger_put: |
| 454 | − iio_trigger_put(trig); | |
| 454 | + if (trig) | |
| 455 | + iio_trigger_put(trig); | |
| 455 | 456 | return ret; |
| 456 | 457 | } |
| 457 | 458 | |
| @@ -74,9 +74,9 @@ static const int int_time_mapping[] = {100000, 50000, 200000, 400000}; · 73 unmodified lines | ||
| 74 | 74 | static const struct reg_field reg_field_it = |
| 75 | 75 | REG_FIELD(LTR501_ALS_MEAS_RATE, 3, 4); |
| 76 | 76 | static const struct reg_field reg_field_als_intr = |
| 77 | − REG_FIELD(LTR501_INTR, 0, 0); | |
| 78 | −static const struct reg_field reg_field_ps_intr = | |
| 79 | 77 | REG_FIELD(LTR501_INTR, 1, 1); |
| 78 | +static const struct reg_field reg_field_ps_intr = | |
| 79 | + REG_FIELD(LTR501_INTR, 0, 0); | |
| 80 | 80 | static const struct reg_field reg_field_als_rate = |
| 81 | 81 | REG_FIELD(LTR501_ALS_MEAS_RATE, 0, 2); |
| 82 | 82 | static const struct reg_field reg_field_ps_rate = |
| @@ -40,9 +40,9 @@ · 39 unmodified lines | ||
| 40 | 40 | #define AS3935_AFE_PWR_BIT BIT(0) |
| 41 | 41 | |
| 42 | 42 | #define AS3935_INT 0x03 |
| 43 | −#define AS3935_INT_MASK 0x07 | |
| 43 | +#define AS3935_INT_MASK 0x0f | |
| 44 | 44 | #define AS3935_EVENT_INT BIT(3) |
| 45 | −#define AS3935_NOISE_INT BIT(1) | |
| 45 | +#define AS3935_NOISE_INT BIT(0) | |
| 46 | 46 | |
| 47 | 47 | #define AS3935_DATA 0x07 |
| 48 | 48 | #define AS3935_DATA_MASK 0x3F |
| @@ -215,7 +215,7 @@ static irqreturn_t as3935_trigger_handler(int irq, void *private) · 166 unmodified lines | ||
| 215 | 215 | |
| 216 | 216 | st->buffer[0] = val & AS3935_DATA_MASK; |
| 217 | 217 | iio_push_to_buffers_with_timestamp(indio_dev, &st->buffer, |
| 218 | − pf->timestamp); | |
| 218 | + iio_get_time_ns(indio_dev)); | |
| 219 | 219 | err_read: |
| 220 | 220 | iio_trigger_notify_done(indio_dev->trig); |
| 221 | 221 | |
| @@ -244,7 +244,7 @@ static void as3935_event_work(struct work_struct *work) · 22 unmodified lines | ||
| 244 | 244 | |
| 245 | 245 | switch (val) { |
| 246 | 246 | case AS3935_EVENT_INT: |
| 247 | − iio_trigger_poll(st->trig); | |
| 247 | + iio_trigger_poll_chained(st->trig); | |
| 248 | 248 | break; |
| 249 | 249 | case AS3935_NOISE_INT: |
| 250 | 250 | dev_warn(&st->spi->dev, "noise level is too high\n"); |
| @@ -269,8 +269,6 @@ static irqreturn_t as3935_interrupt_handler(int irq, void *private) · 18 unmodified lines | ||
| 269 | 269 | |
| 270 | 270 | static void calibrate_as3935(struct as3935_state *st) |
| 271 | 271 | { |
| 272 | − mutex_lock(&st->lock); | |
| 273 | − | |
| 274 | 272 | /* mask disturber interrupt bit */ |
| 275 | 273 | as3935_write(st, AS3935_INT, BIT(5)); |
| 276 | 274 | |
| @@ -280,8 +278,6 @@ static void calibrate_as3935(struct as3935_state *st) · 3 unmodified lines | ||
| 280 | 278 | |
| 281 | 279 | mdelay(2); |
| 282 | 280 | as3935_write(st, AS3935_TUNE_CAP, (st->tune_cap / TUNE_CAP_DIV)); |
| 283 | − | |
| 284 | − mutex_unlock(&st->lock); | |
| 285 | 281 | } |
| 286 | 282 | |
| 287 | 283 | #ifdef CONFIG_PM_SLEEP |
| @@ -318,6 +314,8 @@ static int as3935_resume(struct device *dev) · 30 unmodified lines | ||
| 318 | 314 | val &= ~AS3935_AFE_PWR_BIT; |
| 319 | 315 | ret = as3935_write(st, AS3935_AFE_GAIN, val); |
| 320 | 316 | |
| 317 | + calibrate_as3935(st); | |
| 318 | + | |
| 321 | 319 | err_resume: |
| 322 | 320 | mutex_unlock(&st->lock); |
| 323 | 321 | |
| @@ -449,12 +449,7 @@ static int addr6_resolve(struct sockaddr_in6 *src_in, · 448 unmodified lines | ||
| 449 | 449 | return ret; |
| 450 | 450 | |
| 451 | 451 | rt = (struct rt6_info *)dst; |
| 452 | − if (ipv6_addr_any(&fl6.saddr)) { | |
| 453 | − ret = ipv6_dev_get_saddr(addr->net, ip6_dst_idev(dst)->dev, | |
| 454 | − &fl6.daddr, 0, &fl6.saddr); | |
| 455 | − if (ret) | |
| 456 | − goto put; | |
| 457 | − | |
| 452 | + if (ipv6_addr_any(&src_in->sin6_addr)) { | |
| 458 | 453 | src_in->sin6_family = AF_INET6; |
| 459 | 454 | src_in->sin6_addr = fl6.saddr; |
| 460 | 455 | } |
| @@ -471,9 +466,6 @@ static int addr6_resolve(struct sockaddr_in6 *src_in, · 10 unmodified lines | ||
| 471 | 466 | |
| 472 | 467 | *pdst = dst; |
| 473 | 468 | return 0; |
| 474 | −put: | |
| 475 | − dst_release(dst); | |
| 476 | − return ret; | |
| 477 | 469 | } |
| 478 | 470 | #else |
| 479 | 471 | static int addr6_resolve(struct sockaddr_in6 *src_in, |
| @@ -1429,7 +1429,7 @@ static void cm_format_paths_from_req(struct cm_req_msg *req_msg, · 1428 unmodified lines | ||
| 1429 | 1429 | primary_path->packet_life_time = |
| 1430 | 1430 | cm_req_get_primary_local_ack_timeout(req_msg); |
| 1431 | 1431 | primary_path->packet_life_time -= (primary_path->packet_life_time > 0); |
| 1432 | − sa_path_set_service_id(primary_path, req_msg->service_id); | |
| 1432 | + primary_path->service_id = req_msg->service_id; | |
| 1433 | 1433 | |
| 1434 | 1434 | if (req_msg->alt_local_lid) { |
| 1435 | 1435 | alt_path->dgid = req_msg->alt_local_gid; |
| @@ -1452,7 +1452,7 @@ static void cm_format_paths_from_req(struct cm_req_msg *req_msg, · 16 unmodified lines | ||
| 1452 | 1452 | alt_path->packet_life_time = |
| 1453 | 1453 | cm_req_get_alt_local_ack_timeout(req_msg); |
| 1454 | 1454 | alt_path->packet_life_time -= (alt_path->packet_life_time > 0); |
| 1455 | − sa_path_set_service_id(alt_path, req_msg->service_id); | |
| 1455 | + alt_path->service_id = req_msg->service_id; | |
| 1456 | 1456 | } |
| 1457 | 1457 | } |
| 1458 | 1458 | |
| @@ -1140,7 +1140,7 @@ static void cma_save_ib_info(struct sockaddr *src_addr, · 1139 unmodified lines | ||
| 1140 | 1140 | ib->sib_pkey = path->pkey; |
| 1141 | 1141 | ib->sib_flowinfo = path->flow_label; |
| 1142 | 1142 | memcpy(&ib->sib_addr, &path->sgid, 16); |
| 1143 | − ib->sib_sid = sa_path_get_service_id(path); | |
| 1143 | + ib->sib_sid = path->service_id; | |
| 1144 | 1144 | ib->sib_scope_id = 0; |
| 1145 | 1145 | } else { |
| 1146 | 1146 | ib->sib_pkey = listen_ib->sib_pkey; |
| @@ -1274,8 +1274,7 @@ static int cma_save_req_info(const struct ib_cm_event *ib_event, · 127 unmodified lines | ||
| 1274 | 1274 | memcpy(&req->local_gid, &req_param->primary_path->sgid, |
| 1275 | 1275 | sizeof(req->local_gid)); |
| 1276 | 1276 | req->has_gid = true; |
| 1277 | − req->service_id = | |
| 1278 | − sa_path_get_service_id(req_param->primary_path); | |
| 1277 | + req->service_id = req_param->primary_path->service_id; | |
| 1279 | 1278 | req->pkey = be16_to_cpu(req_param->primary_path->pkey); |
| 1280 | 1279 | if (req->pkey != req_param->bth_pkey) |
| 1281 | 1280 | pr_warn_ratelimited("RDMA CMA: got different BTH P_Key (0x%x) and primary path P_Key (0x%x)\n" |
| @@ -1827,7 +1826,8 @@ static struct rdma_id_private *cma_new_conn_id(struct rdma_cm_id *listen_id, · 545 unmodified lines | ||
| 1827 | 1826 | struct rdma_route *rt; |
| 1828 | 1827 | const sa_family_t ss_family = listen_id->route.addr.src_addr.ss_family; |
| 1829 | 1828 | struct sa_path_rec *path = ib_event->param.req_rcvd.primary_path; |
| 1830 | − const __be64 service_id = sa_path_get_service_id(path); | |
| 1829 | + const __be64 service_id = | |
| 1830 | + ib_event->param.req_rcvd.primary_path->service_id; | |
| 1831 | 1831 | int ret; |
| 1832 | 1832 | |
| 1833 | 1833 | id = rdma_create_id(listen_id->route.addr.dev_addr.net, |
| @@ -2345,9 +2345,8 @@ static int cma_query_ib_route(struct rdma_id_private *id_priv, int timeout_ms, · 511 unmodified lines | ||
| 2345 | 2345 | path_rec.pkey = cpu_to_be16(ib_addr_get_pkey(dev_addr)); |
| 2346 | 2346 | path_rec.numb_path = 1; |
| 2347 | 2347 | path_rec.reversible = 1; |
| 2348 | − sa_path_set_service_id(&path_rec, | |
| 2349 | − rdma_get_service_id(&id_priv->id, | |
| 2350 | − cma_dst_addr(id_priv))); | |
| 2348 | + path_rec.service_id = rdma_get_service_id(&id_priv->id, | |
| 2349 | + cma_dst_addr(id_priv)); | |
| 2351 | 2350 | |
| 2352 | 2351 | comp_mask = IB_SA_PATH_REC_DGID | IB_SA_PATH_REC_SGID | |
| 2353 | 2352 | IB_SA_PATH_REC_PKEY | IB_SA_PATH_REC_NUMB_PATH | |
| @@ -169,6 +169,16 @@ void ib_mad_cleanup(void); · 168 unmodified lines | ||
| 169 | 169 | int ib_sa_init(void); |
| 170 | 170 | void ib_sa_cleanup(void); |
| 171 | 171 | |
| 172 | +int ibnl_init(void); | |
| 173 | +void ibnl_cleanup(void); | |
| 174 | + | |
| 175 | +/** | |
| 176 | + * Check if there are any listeners to the netlink group | |
| 177 | + * @group: the netlink group ID | |
| 178 | + * Returns 0 on success or a negative for no listeners. | |
| 179 | + */ | |
| 180 | +int ibnl_chk_listeners(unsigned int group); | |
| 181 | + | |
| 172 | 182 | int ib_nl_handle_resolve_resp(struct sk_buff *skb, |
| 173 | 183 | struct netlink_callback *cb); |
| 174 | 184 | int ib_nl_handle_set_timeout(struct sk_buff *skb, |
| @@ -37,6 +37,7 @@ · 36 unmodified lines | ||
| 37 | 37 | #include <net/net_namespace.h> |
| 38 | 38 | #include <net/sock.h> |
| 39 | 39 | #include <rdma/rdma_netlink.h> |
| 40 | +#include "core_priv.h" | |
| 40 | 41 | |
| 41 | 42 | struct ibnl_client { |
| 42 | 43 | struct list_head list; |
| @@ -55,7 +56,6 @@ int ibnl_chk_listeners(unsigned int group) · 12 unmodified lines | ||
| 55 | 56 | return -1; |
| 56 | 57 | return 0; |
| 57 | 58 | } |
| 58 | −EXPORT_SYMBOL(ibnl_chk_listeners); | |
| 59 | 59 | |
| 60 | 60 | int ibnl_add_client(int index, int nops, |
| 61 | 61 | const struct ibnl_client_cbs cb_table[]) |
| @@ -194,7 +194,7 @@ static u32 tid; · 193 unmodified lines | ||
| 194 | 194 | .field_name = "sa_path_rec:" #field |
| 195 | 195 | |
| 196 | 196 | static const struct ib_field path_rec_table[] = { |
| 197 | − { PATH_REC_FIELD(ib.service_id), | |
| 197 | + { PATH_REC_FIELD(service_id), | |
| 198 | 198 | .offset_words = 0, |
| 199 | 199 | .offset_bits = 0, |
| 200 | 200 | .size_bits = 64 }, |
| @@ -296,7 +296,7 @@ static const struct ib_field path_rec_table[] = { · 95 unmodified lines | ||
| 296 | 296 | .field_name = "sa_path_rec:" #field |
| 297 | 297 | |
| 298 | 298 | static const struct ib_field opa_path_rec_table[] = { |
| 299 | − { OPA_PATH_REC_FIELD(opa.service_id), | |
| 299 | + { OPA_PATH_REC_FIELD(service_id), | |
| 300 | 300 | .offset_words = 0, |
| 301 | 301 | .offset_bits = 0, |
| 302 | 302 | .size_bits = 64 }, |
| @@ -774,7 +774,7 @@ static void ib_nl_set_path_rec_attrs(struct sk_buff *skb, · 471 unmodified lines | ||
| 774 | 774 | |
| 775 | 775 | /* Now build the attributes */ |
| 776 | 776 | if (comp_mask & IB_SA_PATH_REC_SERVICE_ID) { |
| 777 | − val64 = be64_to_cpu(sa_path_get_service_id(sa_rec)); | |
| 777 | + val64 = be64_to_cpu(sa_rec->service_id); | |
| 778 | 778 | nla_put(skb, RDMA_NLA_F_MANDATORY | LS_NLA_TYPE_SERVICE_ID, |
| 779 | 779 | sizeof(val64), &val64); |
| 780 | 780 | } |
| @@ -58,7 +58,7 @@ static void __ib_umem_release(struct ib_device *dev, struct ib_umem *umem, int d · 57 unmodified lines | ||
| 58 | 58 | for_each_sg(umem->sg_head.sgl, sg, umem->npages, i) { |
| 59 | 59 | |
| 60 | 60 | page = sg_page(sg); |
| 61 | − if (umem->writable && dirty) | |
| 61 | + if (!PageDirty(page) && umem->writable && dirty) | |
| 62 | 62 | set_page_dirty_lock(page); |
| 63 | 63 | put_page(page); |
| 64 | 64 | } |
| @@ -321,11 +321,15 @@ int ib_umem_odp_get(struct ib_ucontext *context, struct ib_umem *umem, · 320 unmodified lines | ||
| 321 | 321 | struct vm_area_struct *vma; |
| 322 | 322 | struct hstate *h; |
| 323 | 323 | |
| 324 | + down_read(&mm->mmap_sem); | |
| 324 | 325 | vma = find_vma(mm, ib_umem_start(umem)); |
| 325 | − if (!vma || !is_vm_hugetlb_page(vma)) | |
| 326 | + if (!vma || !is_vm_hugetlb_page(vma)) { | |
| 327 | + up_read(&mm->mmap_sem); | |
| 326 | 328 | return -EINVAL; |
| 329 | + } | |
| 327 | 330 | h = hstate_vma(vma); |
| 328 | 331 | umem->page_shift = huge_page_shift(h); |
| 332 | + up_read(&mm->mmap_sem); | |
| 329 | 333 | umem->hugetlb = 1; |
| 330 | 334 | } else { |
| 331 | 335 | umem->hugetlb = 0; |
| @@ -96,11 +96,11 @@ void ib_copy_qp_attr_to_user(struct ib_uverbs_qp_attr *dst, · 95 unmodified lines | ||
| 96 | 96 | } |
| 97 | 97 | EXPORT_SYMBOL(ib_copy_qp_attr_to_user); |
| 98 | 98 | |
| 99 | −void __ib_copy_path_rec_to_user(struct ib_user_path_rec *dst, | |
| 100 | − struct sa_path_rec *src) | |
| 99 | +static void __ib_copy_path_rec_to_user(struct ib_user_path_rec *dst, | |
| 100 | + struct sa_path_rec *src) | |
| 101 | 101 | { |
| 102 | − memcpy(dst->dgid, src->dgid.raw, sizeof src->dgid); | |
| 103 | − memcpy(dst->sgid, src->sgid.raw, sizeof src->sgid); | |
| 102 | + memcpy(dst->dgid, src->dgid.raw, sizeof(src->dgid)); | |
| 103 | + memcpy(dst->sgid, src->sgid.raw, sizeof(src->sgid)); | |
| 104 | 104 | |
| 105 | 105 | dst->dlid = htons(ntohl(sa_path_get_dlid(src))); |
| 106 | 106 | dst->slid = htons(ntohl(sa_path_get_slid(src))); |
| @@ -56,6 +56,10 @@ · 55 unmodified lines | ||
| 56 | 56 | #define BNXT_RE_MAX_SRQC_COUNT (64 * 1024) |
| 57 | 57 | #define BNXT_RE_MAX_CQ_COUNT (64 * 1024) |
| 58 | 58 | |
| 59 | +#define BNXT_RE_UD_QP_HW_STALL 0x400000 | |
| 60 | + | |
| 61 | +#define BNXT_RE_RQ_WQE_THRESHOLD 32 | |
| 62 | + | |
| 59 | 63 | struct bnxt_re_work { |
| 60 | 64 | struct work_struct work; |
| 61 | 65 | unsigned long event; |
| @@ -61,6 +61,48 @@ · 60 unmodified lines | ||
| 61 | 61 | #include "ib_verbs.h" |
| 62 | 62 | #include <rdma/bnxt_re-abi.h> |
| 63 | 63 | |
| 64 | +static int __from_ib_access_flags(int iflags) | |
| 65 | +{ | |
| 66 | + int qflags = 0; | |
| 67 | + | |
| 68 | + if (iflags & IB_ACCESS_LOCAL_WRITE) | |
| 69 | + qflags |= BNXT_QPLIB_ACCESS_LOCAL_WRITE; | |
| 70 | + if (iflags & IB_ACCESS_REMOTE_READ) | |
| 71 | + qflags |= BNXT_QPLIB_ACCESS_REMOTE_READ; | |
| 72 | + if (iflags & IB_ACCESS_REMOTE_WRITE) | |
| 73 | + qflags |= BNXT_QPLIB_ACCESS_REMOTE_WRITE; | |
| 74 | + if (iflags & IB_ACCESS_REMOTE_ATOMIC) | |
| 75 | + qflags |= BNXT_QPLIB_ACCESS_REMOTE_ATOMIC; | |
| 76 | + if (iflags & IB_ACCESS_MW_BIND) | |
| 77 | + qflags |= BNXT_QPLIB_ACCESS_MW_BIND; | |
| 78 | + if (iflags & IB_ZERO_BASED) | |
| 79 | + qflags |= BNXT_QPLIB_ACCESS_ZERO_BASED; | |
| 80 | + if (iflags & IB_ACCESS_ON_DEMAND) | |
| 81 | + qflags |= BNXT_QPLIB_ACCESS_ON_DEMAND; | |
| 82 | + return qflags; | |
| 83 | +}; | |
| 84 | + | |
| 85 | +static enum ib_access_flags __to_ib_access_flags(int qflags) | |
| 86 | +{ | |
| 87 | + enum ib_access_flags iflags = 0; | |
| 88 | + | |
| 89 | + if (qflags & BNXT_QPLIB_ACCESS_LOCAL_WRITE) | |
| 90 | + iflags |= IB_ACCESS_LOCAL_WRITE; | |
| 91 | + if (qflags & BNXT_QPLIB_ACCESS_REMOTE_WRITE) | |
| 92 | + iflags |= IB_ACCESS_REMOTE_WRITE; | |
| 93 | + if (qflags & BNXT_QPLIB_ACCESS_REMOTE_READ) | |
| 94 | + iflags |= IB_ACCESS_REMOTE_READ; | |
| 95 | + if (qflags & BNXT_QPLIB_ACCESS_REMOTE_ATOMIC) | |
| 96 | + iflags |= IB_ACCESS_REMOTE_ATOMIC; | |
| 97 | + if (qflags & BNXT_QPLIB_ACCESS_MW_BIND) | |
| 98 | + iflags |= IB_ACCESS_MW_BIND; | |
| 99 | + if (qflags & BNXT_QPLIB_ACCESS_ZERO_BASED) | |
| 100 | + iflags |= IB_ZERO_BASED; | |
| 101 | + if (qflags & BNXT_QPLIB_ACCESS_ON_DEMAND) | |
| 102 | + iflags |= IB_ACCESS_ON_DEMAND; | |
| 103 | + return iflags; | |
| 104 | +}; | |
| 105 | + | |
| 64 | 106 | static int bnxt_re_build_sgl(struct ib_sge *ib_sg_list, |
| 65 | 107 | struct bnxt_qplib_sge *sg_list, int num) |
| 66 | 108 | { |
| @@ -149,8 +191,8 @@ int bnxt_re_query_device(struct ib_device *ibdev, · 82 unmodified lines | ||
| 149 | 191 | ib_attr->max_total_mcast_qp_attach = 0; |
| 150 | 192 | ib_attr->max_ah = dev_attr->max_ah; |
| 151 | 193 | |
| 152 | − ib_attr->max_fmr = dev_attr->max_fmr; | |
| 153 | − ib_attr->max_map_per_fmr = 1; /* ? */ | |
| 194 | + ib_attr->max_fmr = 0; | |
| 195 | + ib_attr->max_map_per_fmr = 0; | |
| 154 | 196 | |
| 155 | 197 | ib_attr->max_srq = dev_attr->max_srq; |
| 156 | 198 | ib_attr->max_srq_wr = dev_attr->max_srq_wqes; |
| @@ -410,6 +452,158 @@ enum rdma_link_layer bnxt_re_get_link_layer(struct ib_device *ibdev, · 253 unmodified lines | ||
| 410 | 452 | return IB_LINK_LAYER_ETHERNET; |
| 411 | 453 | } |
| 412 | 454 | |
| 455 | +#define BNXT_RE_FENCE_PBL_SIZE DIV_ROUND_UP(BNXT_RE_FENCE_BYTES, PAGE_SIZE) | |
| 456 | + | |
| 457 | +static void bnxt_re_create_fence_wqe(struct bnxt_re_pd *pd) | |
| 458 | +{ | |
| 459 | + struct bnxt_re_fence_data *fence = &pd->fence; | |
| 460 | + struct ib_mr *ib_mr = &fence->mr->ib_mr; | |
| 461 | + struct bnxt_qplib_swqe *wqe = &fence->bind_wqe; | |
| 462 | + | |
| 463 | + memset(wqe, 0, sizeof(*wqe)); | |
| 464 | + wqe->type = BNXT_QPLIB_SWQE_TYPE_BIND_MW; | |
| 465 | + wqe->wr_id = BNXT_QPLIB_FENCE_WRID; | |
| 466 | + wqe->flags |= BNXT_QPLIB_SWQE_FLAGS_SIGNAL_COMP; | |
| 467 | + wqe->flags |= BNXT_QPLIB_SWQE_FLAGS_UC_FENCE; | |
| 468 | + wqe->bind.zero_based = false; | |
| 469 | + wqe->bind.parent_l_key = ib_mr->lkey; | |
| 470 | + wqe->bind.va = (u64)(unsigned long)fence->va; | |
| 471 | + wqe->bind.length = fence->size; | |
| 472 | + wqe->bind.access_cntl = __from_ib_access_flags(IB_ACCESS_REMOTE_READ); | |
| 473 | + wqe->bind.mw_type = SQ_BIND_MW_TYPE_TYPE1; | |
| 474 | + | |
| 475 | + /* Save the initial rkey in fence structure for now; | |
| 476 | + * wqe->bind.r_key will be set at (re)bind time. | |
| 477 | + */ | |
| 478 | + fence->bind_rkey = ib_inc_rkey(fence->mw->rkey); | |
| 479 | +} | |
| 480 | + | |
| 481 | +static int bnxt_re_bind_fence_mw(struct bnxt_qplib_qp *qplib_qp) | |
| 482 | +{ | |
| 483 | + struct bnxt_re_qp *qp = container_of(qplib_qp, struct bnxt_re_qp, | |
| 484 | + qplib_qp); | |
| 485 | + struct ib_pd *ib_pd = qp->ib_qp.pd; | |
| 486 | + struct bnxt_re_pd *pd = container_of(ib_pd, struct bnxt_re_pd, ib_pd); | |
| 487 | + struct bnxt_re_fence_data *fence = &pd->fence; | |
| 488 | + struct bnxt_qplib_swqe *fence_wqe = &fence->bind_wqe; | |
| 489 | + struct bnxt_qplib_swqe wqe; | |
| 490 | + int rc; | |
| 491 | + | |
| 492 | + memcpy(&wqe, fence_wqe, sizeof(wqe)); | |
| 493 | + wqe.bind.r_key = fence->bind_rkey; | |
| 494 | + fence->bind_rkey = ib_inc_rkey(fence->bind_rkey); | |
| 495 | + | |
| 496 | + dev_dbg(rdev_to_dev(qp->rdev), | |
| 497 | + "Posting bind fence-WQE: rkey: %#x QP: %d PD: %p\n", | |
| 498 | + wqe.bind.r_key, qp->qplib_qp.id, pd); | |
| 499 | + rc = bnxt_qplib_post_send(&qp->qplib_qp, &wqe); | |
| 500 | + if (rc) { | |
| 501 | + dev_err(rdev_to_dev(qp->rdev), "Failed to bind fence-WQE\n"); | |
| 502 | + return rc; | |
| 503 | + } | |
| 504 | + bnxt_qplib_post_send_db(&qp->qplib_qp); | |
| 505 | + | |
| 506 | + return rc; | |
| 507 | +} | |
| 508 | + | |
| 509 | +static void bnxt_re_destroy_fence_mr(struct bnxt_re_pd *pd) | |
| 510 | +{ | |
| 511 | + struct bnxt_re_fence_data *fence = &pd->fence; | |
| 512 | + struct bnxt_re_dev *rdev = pd->rdev; | |
| 513 | + struct device *dev = &rdev->en_dev->pdev->dev; | |
| 514 | + struct bnxt_re_mr *mr = fence->mr; | |
| 515 | + | |
| 516 | + if (fence->mw) { | |
| 517 | + bnxt_re_dealloc_mw(fence->mw); | |
| 518 | + fence->mw = NULL; | |
| 519 | + } | |
| 520 | + if (mr) { | |
| 521 | + if (mr->ib_mr.rkey) | |
| 522 | + bnxt_qplib_dereg_mrw(&rdev->qplib_res, &mr->qplib_mr, | |
| 523 | + true); | |
| 524 | + if (mr->ib_mr.lkey) | |
| 525 | + bnxt_qplib_free_mrw(&rdev->qplib_res, &mr->qplib_mr); | |
| 526 | + kfree(mr); | |
| 527 | + fence->mr = NULL; | |
| 528 | + } | |
| 529 | + if (fence->dma_addr) { | |
| 530 | + dma_unmap_single(dev, fence->dma_addr, BNXT_RE_FENCE_BYTES, | |
| 531 | + DMA_BIDIRECTIONAL); | |
| 532 | + fence->dma_addr = 0; | |
| 533 | + } | |
| 534 | +} | |
| 535 | + | |
| 536 | +static int bnxt_re_create_fence_mr(struct bnxt_re_pd *pd) | |
| 537 | +{ | |
| 538 | + int mr_access_flags = IB_ACCESS_LOCAL_WRITE | IB_ACCESS_MW_BIND; | |
| 539 | + struct bnxt_re_fence_data *fence = &pd->fence; | |
| 540 | + struct bnxt_re_dev *rdev = pd->rdev; | |
| 541 | + struct device *dev = &rdev->en_dev->pdev->dev; | |
| 542 | + struct bnxt_re_mr *mr = NULL; | |
| 543 | + dma_addr_t dma_addr = 0; | |
| 544 | + struct ib_mw *mw; | |
| 545 | + u64 pbl_tbl; | |
| 546 | + int rc; | |
| 547 | + | |
| 548 | + dma_addr = dma_map_single(dev, fence->va, BNXT_RE_FENCE_BYTES, | |
| 549 | + DMA_BIDIRECTIONAL); | |
| 550 | + rc = dma_mapping_error(dev, dma_addr); | |
| 551 | + if (rc) { | |
| 552 | + dev_err(rdev_to_dev(rdev), "Failed to dma-map fence-MR-mem\n"); | |
| 553 | + rc = -EIO; | |
| 554 | + fence->dma_addr = 0; | |
| 555 | + goto fail; | |
| 556 | + } | |
| 557 | + fence->dma_addr = dma_addr; | |
| 558 | + | |
| 559 | + /* Allocate a MR */ | |
| 560 | + mr = kzalloc(sizeof(*mr), GFP_KERNEL); | |
| 561 | + if (!mr) { | |
| 562 | + rc = -ENOMEM; | |
| 563 | + goto fail; | |
| 564 | + } | |
| 565 | + fence->mr = mr; | |
| 566 | + mr->rdev = rdev; | |
| 567 | + mr->qplib_mr.pd = &pd->qplib_pd; | |
| 568 | + mr->qplib_mr.type = CMDQ_ALLOCATE_MRW_MRW_FLAGS_PMR; | |
| 569 | + mr->qplib_mr.flags = __from_ib_access_flags(mr_access_flags); | |
| 570 | + rc = bnxt_qplib_alloc_mrw(&rdev->qplib_res, &mr->qplib_mr); | |
| 571 | + if (rc) { | |
| 572 | + dev_err(rdev_to_dev(rdev), "Failed to alloc fence-HW-MR\n"); | |
| 573 | + goto fail; | |
| 574 | + } | |
| 575 | + | |
| 576 | + /* Register MR */ | |
| 577 | + mr->ib_mr.lkey = mr->qplib_mr.lkey; | |
| 578 | + mr->qplib_mr.va = (u64)(unsigned long)fence->va; | |
| 579 | + mr->qplib_mr.total_size = BNXT_RE_FENCE_BYTES; | |
| 580 | + pbl_tbl = dma_addr; | |
| 581 | + rc = bnxt_qplib_reg_mr(&rdev->qplib_res, &mr->qplib_mr, &pbl_tbl, | |
| 582 | + BNXT_RE_FENCE_PBL_SIZE, false); | |
| 583 | + if (rc) { | |
| 584 | + dev_err(rdev_to_dev(rdev), "Failed to register fence-MR\n"); | |
| 585 | + goto fail; | |
| 586 | + } | |
| 587 | + mr->ib_mr.rkey = mr->qplib_mr.rkey; | |
| 588 | + | |
| 589 | + /* Create a fence MW only for kernel consumers */ | |
| 590 | + mw = bnxt_re_alloc_mw(&pd->ib_pd, IB_MW_TYPE_1, NULL); | |
| 591 | + if (!mw) { | |
| 592 | + dev_err(rdev_to_dev(rdev), | |
| 593 | + "Failed to create fence-MW for PD: %p\n", pd); | |
| 594 | + rc = -EINVAL; | |
| 595 | + goto fail; | |
| 596 | + } | |
| 597 | + fence->mw = mw; | |
| 598 | + | |
| 599 | + bnxt_re_create_fence_wqe(pd); | |
| 600 | + return 0; | |
| 601 | + | |
| 602 | +fail: | |
| 603 | + bnxt_re_destroy_fence_mr(pd); | |
| 604 | + return rc; | |
| 605 | +} | |
| 606 | + | |
| 413 | 607 | /* Protection Domains */ |
| 414 | 608 | int bnxt_re_dealloc_pd(struct ib_pd *ib_pd) |
| 415 | 609 | { |
| @@ -417,6 +611,7 @@ int bnxt_re_dealloc_pd(struct ib_pd *ib_pd) · 1 unmodified line | ||
| 417 | 611 | struct bnxt_re_dev *rdev = pd->rdev; |
| 418 | 612 | int rc; |
| 419 | 613 | |
| 614 | + bnxt_re_destroy_fence_mr(pd); | |
| 420 | 615 | if (ib_pd->uobject && pd->dpi.dbr) { |
| 421 | 616 | struct ib_ucontext *ib_uctx = ib_pd->uobject->context; |
| 422 | 617 | struct bnxt_re_ucontext *ucntx; |
| @@ -498,6 +693,10 @@ struct ib_pd *bnxt_re_alloc_pd(struct ib_device *ibdev, · 75 unmodified lines | ||
| 498 | 693 | } |
| 499 | 694 | } |
| 500 | 695 | |
| 696 | + if (!udata) | |
| 697 | + if (bnxt_re_create_fence_mr(pd)) | |
| 698 | + dev_warn(rdev_to_dev(rdev), | |
| 699 | + "Failed to create Fence-MR\n"); | |
| 501 | 700 | return &pd->ib_pd; |
| 502 | 701 | dbfail: |
| 503 | 702 | (void)bnxt_qplib_dealloc_pd(&rdev->qplib_res, &rdev->qplib_res.pd_tbl, |
| @@ -849,12 +1048,16 @@ static struct bnxt_re_qp *bnxt_re_create_shadow_qp · 345 unmodified lines | ||
| 849 | 1048 | /* Shadow QP SQ depth should be same as QP1 RQ depth */ |
| 850 | 1049 | qp->qplib_qp.sq.max_wqe = qp1_qp->rq.max_wqe; |
| 851 | 1050 | qp->qplib_qp.sq.max_sge = 2; |
| 1051 | + /* Q full delta can be 1 since it is internal QP */ | |
| 1052 | + qp->qplib_qp.sq.q_full_delta = 1; | |
| 852 | 1053 | |
| 853 | 1054 | qp->qplib_qp.scq = qp1_qp->scq; |
| 854 | 1055 | qp->qplib_qp.rcq = qp1_qp->rcq; |
| 855 | 1056 | |
| 856 | 1057 | qp->qplib_qp.rq.max_wqe = qp1_qp->rq.max_wqe; |
| 857 | 1058 | qp->qplib_qp.rq.max_sge = qp1_qp->rq.max_sge; |
| 1059 | + /* Q full delta can be 1 since it is internal QP */ | |
| 1060 | + qp->qplib_qp.rq.q_full_delta = 1; | |
| 858 | 1061 | |
| 859 | 1062 | qp->qplib_qp.mtu = qp1_qp->mtu; |
| 860 | 1063 | |
| @@ -917,10 +1120,6 @@ struct ib_qp *bnxt_re_create_qp(struct ib_pd *ib_pd, · 56 unmodified lines | ||
| 917 | 1120 | qp->qplib_qp.sig_type = ((qp_init_attr->sq_sig_type == |
| 918 | 1121 | IB_SIGNAL_ALL_WR) ? true : false); |
| 919 | 1122 | |
| 920 | − entries = roundup_pow_of_two(qp_init_attr->cap.max_send_wr + 1); | |
| 921 | − qp->qplib_qp.sq.max_wqe = min_t(u32, entries, | |
| 922 | − dev_attr->max_qp_wqes + 1); | |
| 923 | − | |
| 924 | 1123 | qp->qplib_qp.sq.max_sge = qp_init_attr->cap.max_send_sge; |
| 925 | 1124 | if (qp->qplib_qp.sq.max_sge > dev_attr->max_qp_sges) |
| 926 | 1125 | qp->qplib_qp.sq.max_sge = dev_attr->max_qp_sges; |
| @@ -959,6 +1158,9 @@ struct ib_qp *bnxt_re_create_qp(struct ib_pd *ib_pd, · 32 unmodified lines | ||
| 959 | 1158 | qp->qplib_qp.rq.max_wqe = min_t(u32, entries, |
| 960 | 1159 | dev_attr->max_qp_wqes + 1); |
| 961 | 1160 | |
| 1161 | + qp->qplib_qp.rq.q_full_delta = qp->qplib_qp.rq.max_wqe - | |
| 1162 | + qp_init_attr->cap.max_recv_wr; | |
| 1163 | + | |
| 962 | 1164 | qp->qplib_qp.rq.max_sge = qp_init_attr->cap.max_recv_sge; |
| 963 | 1165 | if (qp->qplib_qp.rq.max_sge > dev_attr->max_qp_sges) |
| 964 | 1166 | qp->qplib_qp.rq.max_sge = dev_attr->max_qp_sges; |
| @@ -967,6 +1169,12 @@ struct ib_qp *bnxt_re_create_qp(struct ib_pd *ib_pd, · 2 unmodified lines | ||
| 967 | 1169 | qp->qplib_qp.mtu = ib_mtu_enum_to_int(iboe_get_mtu(rdev->netdev->mtu)); |
| 968 | 1170 | |
| 969 | 1171 | if (qp_init_attr->qp_type == IB_QPT_GSI) { |
| 1172 | + /* Allocate 1 more than what's provided */ | |
| 1173 | + entries = roundup_pow_of_two(qp_init_attr->cap.max_send_wr + 1); | |
| 1174 | + qp->qplib_qp.sq.max_wqe = min_t(u32, entries, | |
| 1175 | + dev_attr->max_qp_wqes + 1); | |
| 1176 | + qp->qplib_qp.sq.q_full_delta = qp->qplib_qp.sq.max_wqe - | |
| 1177 | + qp_init_attr->cap.max_send_wr; | |
| 970 | 1178 | qp->qplib_qp.rq.max_sge = dev_attr->max_qp_sges; |
| 971 | 1179 | if (qp->qplib_qp.rq.max_sge > dev_attr->max_qp_sges) |
| 972 | 1180 | qp->qplib_qp.rq.max_sge = dev_attr->max_qp_sges; |
| @@ -1006,6 +1214,22 @@ struct ib_qp *bnxt_re_create_qp(struct ib_pd *ib_pd, · 33 unmodified lines | ||
| 1006 | 1214 | } |
| 1007 | 1215 | |
| 1008 | 1216 | } else { |
| 1217 | + /* Allocate 128 + 1 more than what's provided */ | |
| 1218 | + entries = roundup_pow_of_two(qp_init_attr->cap.max_send_wr + | |
| 1219 | + BNXT_QPLIB_RESERVED_QP_WRS + 1); | |
| 1220 | + qp->qplib_qp.sq.max_wqe = min_t(u32, entries, | |
| 1221 | + dev_attr->max_qp_wqes + | |
| 1222 | + BNXT_QPLIB_RESERVED_QP_WRS + 1); | |
| 1223 | + qp->qplib_qp.sq.q_full_delta = BNXT_QPLIB_RESERVED_QP_WRS + 1; | |
| 1224 | + | |
| 1225 | + /* | |
| 1226 | + * Reserving one slot for Phantom WQE. Application can | |
| 1227 | + * post one extra entry in this case. But allowing this to avoid | |
| 1228 | + * unexpected Queue full condition | |
| 1229 | + */ | |
| 1230 | + | |
| 1231 | + qp->qplib_qp.sq.q_full_delta -= 1; | |
| 1232 | + | |
| 1009 | 1233 | qp->qplib_qp.max_rd_atomic = dev_attr->max_qp_rd_atom; |
| 1010 | 1234 | qp->qplib_qp.max_dest_rd_atomic = dev_attr->max_qp_init_rd_atom; |
| 1011 | 1235 | if (udata) { |
| @@ -1025,6 +1249,7 @@ struct ib_qp *bnxt_re_create_qp(struct ib_pd *ib_pd, · 13 unmodified lines | ||
| 1025 | 1249 | |
| 1026 | 1250 | qp->ib_qp.qp_num = qp->qplib_qp.id; |
| 1027 | 1251 | spin_lock_init(&qp->sq_lock); |
| 1252 | + spin_lock_init(&qp->rq_lock); | |
| 1028 | 1253 | |
| 1029 | 1254 | if (udata) { |
| 1030 | 1255 | struct bnxt_re_qp_resp resp; |
| @@ -1129,48 +1354,6 @@ static enum ib_mtu __to_ib_mtu(u32 mtu) · 98 unmodified lines | ||
| 1129 | 1354 | } |
| 1130 | 1355 | } |
| 1131 | 1356 | |
| 1132 | −static int __from_ib_access_flags(int iflags) | |
| 1133 | −{ | |
| 1134 | − int qflags = 0; | |
| 1135 | − | |
| 1136 | − if (iflags & IB_ACCESS_LOCAL_WRITE) | |
| 1137 | − qflags |= BNXT_QPLIB_ACCESS_LOCAL_WRITE; | |
| 1138 | − if (iflags & IB_ACCESS_REMOTE_READ) | |
| 1139 | − qflags |= BNXT_QPLIB_ACCESS_REMOTE_READ; | |
| 1140 | − if (iflags & IB_ACCESS_REMOTE_WRITE) | |
| 1141 | − qflags |= BNXT_QPLIB_ACCESS_REMOTE_WRITE; | |
| 1142 | − if (iflags & IB_ACCESS_REMOTE_ATOMIC) | |
| 1143 | − qflags |= BNXT_QPLIB_ACCESS_REMOTE_ATOMIC; | |
| 1144 | − if (iflags & IB_ACCESS_MW_BIND) | |
| 1145 | − qflags |= BNXT_QPLIB_ACCESS_MW_BIND; | |
| 1146 | − if (iflags & IB_ZERO_BASED) | |
| 1147 | − qflags |= BNXT_QPLIB_ACCESS_ZERO_BASED; | |
| 1148 | − if (iflags & IB_ACCESS_ON_DEMAND) | |
| 1149 | − qflags |= BNXT_QPLIB_ACCESS_ON_DEMAND; | |
| 1150 | − return qflags; | |
| 1151 | −}; | |
| 1152 | − | |
| 1153 | −static enum ib_access_flags __to_ib_access_flags(int qflags) | |
| 1154 | −{ | |
| 1155 | − enum ib_access_flags iflags = 0; | |
| 1156 | − | |
| 1157 | − if (qflags & BNXT_QPLIB_ACCESS_LOCAL_WRITE) | |
| 1158 | − iflags |= IB_ACCESS_LOCAL_WRITE; | |
| 1159 | − if (qflags & BNXT_QPLIB_ACCESS_REMOTE_WRITE) | |
| 1160 | − iflags |= IB_ACCESS_REMOTE_WRITE; | |
| 1161 | − if (qflags & BNXT_QPLIB_ACCESS_REMOTE_READ) | |
| 1162 | − iflags |= IB_ACCESS_REMOTE_READ; | |
| 1163 | − if (qflags & BNXT_QPLIB_ACCESS_REMOTE_ATOMIC) | |
| 1164 | − iflags |= IB_ACCESS_REMOTE_ATOMIC; | |
| 1165 | − if (qflags & BNXT_QPLIB_ACCESS_MW_BIND) | |
| 1166 | − iflags |= IB_ACCESS_MW_BIND; | |
| 1167 | − if (qflags & BNXT_QPLIB_ACCESS_ZERO_BASED) | |
| 1168 | − iflags |= IB_ZERO_BASED; | |
| 1169 | − if (qflags & BNXT_QPLIB_ACCESS_ON_DEMAND) | |
| 1170 | − iflags |= IB_ACCESS_ON_DEMAND; | |
| 1171 | − return iflags; | |
| 1172 | −}; | |
| 1173 | − | |
| 1174 | 1357 | static int bnxt_re_modify_shadow_qp(struct bnxt_re_dev *rdev, |
| 1175 | 1358 | struct bnxt_re_qp *qp1_qp, |
| 1176 | 1359 | int qp_attr_mask) |
| @@ -1378,11 +1561,21 @@ int bnxt_re_modify_qp(struct ib_qp *ib_qp, struct ib_qp_attr *qp_attr, · 201 unmodified lines | ||
| 1378 | 1561 | entries = roundup_pow_of_two(qp_attr->cap.max_send_wr); |
| 1379 | 1562 | qp->qplib_qp.sq.max_wqe = min_t(u32, entries, |
| 1380 | 1563 | dev_attr->max_qp_wqes + 1); |
| 1564 | + qp->qplib_qp.sq.q_full_delta = qp->qplib_qp.sq.max_wqe - | |
| 1565 | + qp_attr->cap.max_send_wr; | |
| 1566 | + /* | |
| 1567 | + * Reserving one slot for Phantom WQE. Some application can | |
| 1568 | + * post one extra entry in this case. Allowing this to avoid | |
| 1569 | + * unexpected Queue full condition | |
| 1570 | + */ | |
| 1571 | + qp->qplib_qp.sq.q_full_delta -= 1; | |
| 1381 | 1572 | qp->qplib_qp.sq.max_sge = qp_attr->cap.max_send_sge; |
| 1382 | 1573 | if (qp->qplib_qp.rq.max_wqe) { |
| 1383 | 1574 | entries = roundup_pow_of_two(qp_attr->cap.max_recv_wr); |
| 1384 | 1575 | qp->qplib_qp.rq.max_wqe = |
| 1385 | 1576 | min_t(u32, entries, dev_attr->max_qp_wqes + 1); |
| 1577 | + qp->qplib_qp.rq.q_full_delta = qp->qplib_qp.rq.max_wqe - | |
| 1578 | + qp_attr->cap.max_recv_wr; | |
| 1386 | 1579 | qp->qplib_qp.rq.max_sge = qp_attr->cap.max_recv_sge; |
| 1387 | 1580 | } else { |
| 1388 | 1581 | /* SRQ was used prior, just ignore the RQ caps */ |
| @@ -1883,6 +2076,22 @@ static int bnxt_re_copy_wr_payload(struct bnxt_re_dev *rdev, · 494 unmodified lines | ||
| 1883 | 2076 | return payload_sz; |
| 1884 | 2077 | } |
| 1885 | 2078 | |
| 2079 | +static void bnxt_ud_qp_hw_stall_workaround(struct bnxt_re_qp *qp) | |
| 2080 | +{ | |
| 2081 | + if ((qp->ib_qp.qp_type == IB_QPT_UD || | |
| 2082 | + qp->ib_qp.qp_type == IB_QPT_GSI || | |
| 2083 | + qp->ib_qp.qp_type == IB_QPT_RAW_ETHERTYPE) && | |
| 2084 | + qp->qplib_qp.wqe_cnt == BNXT_RE_UD_QP_HW_STALL) { | |
| 2085 | + int qp_attr_mask; | |
| 2086 | + struct ib_qp_attr qp_attr; | |
| 2087 | + | |
| 2088 | + qp_attr_mask = IB_QP_STATE; | |
| 2089 | + qp_attr.qp_state = IB_QPS_RTS; | |
| 2090 | + bnxt_re_modify_qp(&qp->ib_qp, &qp_attr, qp_attr_mask, NULL); | |
| 2091 | + qp->qplib_qp.wqe_cnt = 0; | |
| 2092 | + } | |
| 2093 | +} | |
| 2094 | + | |
| 1886 | 2095 | static int bnxt_re_post_send_shadow_qp(struct bnxt_re_dev *rdev, |
| 1887 | 2096 | struct bnxt_re_qp *qp, |
| 1888 | 2097 | struct ib_send_wr *wr) |
| @@ -1928,6 +2137,7 @@ bad: · 39 unmodified lines | ||
| 1928 | 2137 | wr = wr->next; |
| 1929 | 2138 | } |
| 1930 | 2139 | bnxt_qplib_post_send_db(&qp->qplib_qp); |
| 2140 | + bnxt_ud_qp_hw_stall_workaround(qp); | |
| 1931 | 2141 | spin_unlock_irqrestore(&qp->sq_lock, flags); |
| 1932 | 2142 | return rc; |
| 1933 | 2143 | } |
| @@ -2024,6 +2234,7 @@ bad: · 90 unmodified lines | ||
| 2024 | 2234 | wr = wr->next; |
| 2025 | 2235 | } |
| 2026 | 2236 | bnxt_qplib_post_send_db(&qp->qplib_qp); |
| 2237 | + bnxt_ud_qp_hw_stall_workaround(qp); | |
| 2027 | 2238 | spin_unlock_irqrestore(&qp->sq_lock, flags); |
| 2028 | 2239 | |
| 2029 | 2240 | return rc; |
| @@ -2071,7 +2282,10 @@ int bnxt_re_post_recv(struct ib_qp *ib_qp, struct ib_recv_wr *wr, · 41 unmodified lines | ||
| 2071 | 2282 | struct bnxt_re_qp *qp = container_of(ib_qp, struct bnxt_re_qp, ib_qp); |
| 2072 | 2283 | struct bnxt_qplib_swqe wqe; |
| 2073 | 2284 | int rc = 0, payload_sz = 0; |
| 2285 | + unsigned long flags; | |
| 2286 | + u32 count = 0; | |
| 2074 | 2287 | |
| 2288 | + spin_lock_irqsave(&qp->rq_lock, flags); | |
| 2075 | 2289 | while (wr) { |
| 2076 | 2290 | /* House keeping */ |
| 2077 | 2291 | memset(&wqe, 0, sizeof(wqe)); |
| @@ -2100,9 +2314,21 @@ int bnxt_re_post_recv(struct ib_qp *ib_qp, struct ib_recv_wr *wr, · 22 unmodified lines | ||
| 2100 | 2314 | *bad_wr = wr; |
| 2101 | 2315 | break; |
| 2102 | 2316 | } |
| 2317 | + | |
| 2318 | + /* Ring DB if the RQEs posted reaches a threshold value */ | |
| 2319 | + if (++count >= BNXT_RE_RQ_WQE_THRESHOLD) { | |
| 2320 | + bnxt_qplib_post_recv_db(&qp->qplib_qp); | |
| 2321 | + count = 0; | |
| 2322 | + } | |
| 2323 | + | |
| 2103 | 2324 | wr = wr->next; |
| 2104 | 2325 | } |
| 2105 | − bnxt_qplib_post_recv_db(&qp->qplib_qp); | |
| 2326 | + | |
| 2327 | + if (count) | |
| 2328 | + bnxt_qplib_post_recv_db(&qp->qplib_qp); | |
| 2329 | + | |
| 2330 | + spin_unlock_irqrestore(&qp->rq_lock, flags); | |
| 2331 | + | |
| 2106 | 2332 | return rc; |
| 2107 | 2333 | } |
| 2108 | 2334 | |
| @@ -2643,12 +2869,36 @@ static void bnxt_re_process_res_ud_wc(struct ib_wc *wc, · 534 unmodified lines | ||
| 2643 | 2869 | wc->opcode = IB_WC_RECV_RDMA_WITH_IMM; |
| 2644 | 2870 | } |
| 2645 | 2871 | |
| 2872 | +static int send_phantom_wqe(struct bnxt_re_qp *qp) | |
| 2873 | +{ | |
| 2874 | + struct bnxt_qplib_qp *lib_qp = &qp->qplib_qp; | |
| 2875 | + unsigned long flags; | |
| 2876 | + int rc = 0; | |
| 2877 | + | |
| 2878 | + spin_lock_irqsave(&qp->sq_lock, flags); | |
| 2879 | + | |
| 2880 | + rc = bnxt_re_bind_fence_mw(lib_qp); | |
| 2881 | + if (!rc) { | |
| 2882 | + lib_qp->sq.phantom_wqe_cnt++; | |
| 2883 | + dev_dbg(&lib_qp->sq.hwq.pdev->dev, | |
| 2884 | + "qp %#x sq->prod %#x sw_prod %#x phantom_wqe_cnt %d\n", | |
| 2885 | + lib_qp->id, lib_qp->sq.hwq.prod, | |
| 2886 | + HWQ_CMP(lib_qp->sq.hwq.prod, &lib_qp->sq.hwq), | |
| 2887 | + lib_qp->sq.phantom_wqe_cnt); | |
| 2888 | + } | |
| 2889 | + | |
| 2890 | + spin_unlock_irqrestore(&qp->sq_lock, flags); | |
| 2891 | + return rc; | |
| 2892 | +} | |
| 2893 | + | |
| 2646 | 2894 | int bnxt_re_poll_cq(struct ib_cq *ib_cq, int num_entries, struct ib_wc *wc) |
| 2647 | 2895 | { |
| 2648 | 2896 | struct bnxt_re_cq *cq = container_of(ib_cq, struct bnxt_re_cq, ib_cq); |
| 2649 | 2897 | struct bnxt_re_qp *qp; |
| 2650 | 2898 | struct bnxt_qplib_cqe *cqe; |
| 2651 | 2899 | int i, ncqe, budget; |
| 2900 | + struct bnxt_qplib_q *sq; | |
| 2901 | + struct bnxt_qplib_qp *lib_qp; | |
| 2652 | 2902 | u32 tbl_idx; |
| 2653 | 2903 | struct bnxt_re_sqp_entries *sqp_entry = NULL; |
| 2654 | 2904 | unsigned long flags; |
| @@ -2661,7 +2911,21 @@ int bnxt_re_poll_cq(struct ib_cq *ib_cq, int num_entries, struct ib_wc *wc) · 6 unmodified lines | ||
| 2661 | 2911 | } |
| 2662 | 2912 | cqe = &cq->cql[0]; |
| 2663 | 2913 | while (budget) { |
| 2664 | − ncqe = bnxt_qplib_poll_cq(&cq->qplib_cq, cqe, budget); | |
| 2914 | + lib_qp = NULL; | |
| 2915 | + ncqe = bnxt_qplib_poll_cq(&cq->qplib_cq, cqe, budget, &lib_qp); | |
| 2916 | + if (lib_qp) { | |
| 2917 | + sq = &lib_qp->sq; | |
| 2918 | + if (sq->send_phantom) { | |
| 2919 | + qp = container_of(lib_qp, | |
| 2920 | + struct bnxt_re_qp, qplib_qp); | |
| 2921 | + if (send_phantom_wqe(qp) == -ENOMEM) | |
| 2922 | + dev_err(rdev_to_dev(cq->rdev), | |
| 2923 | + "Phantom failed! Scheduled to send again\n"); | |
| 2924 | + else | |
| 2925 | + sq->send_phantom = false; | |
| 2926 | + } | |
| 2927 | + } | |
| 2928 | + | |
| 2665 | 2929 | if (!ncqe) |
| 2666 | 2930 | break; |
| 2667 | 2931 | |
| @@ -2822,6 +3086,12 @@ int bnxt_re_dereg_mr(struct ib_mr *ib_mr) · 154 unmodified lines | ||
| 2822 | 3086 | struct bnxt_re_dev *rdev = mr->rdev; |
| 2823 | 3087 | int rc; |
| 2824 | 3088 | |
| 3089 | + rc = bnxt_qplib_free_mrw(&rdev->qplib_res, &mr->qplib_mr); | |
| 3090 | + if (rc) { | |
| 3091 | + dev_err(rdev_to_dev(rdev), "Dereg MR failed: %#x\n", rc); | |
| 3092 | + return rc; | |
| 3093 | + } | |
| 3094 | + | |
| 2825 | 3095 | if (mr->npages && mr->pages) { |
| 2826 | 3096 | rc = bnxt_qplib_free_fast_reg_page_list(&rdev->qplib_res, |
| 2827 | 3097 | &mr->qplib_frpl); |
| @@ -2829,8 +3099,6 @@ int bnxt_re_dereg_mr(struct ib_mr *ib_mr) · 1 unmodified line | ||
| 2829 | 3099 | mr->npages = 0; |
| 2830 | 3100 | mr->pages = NULL; |
| 2831 | 3101 | } |
| 2832 | − rc = bnxt_qplib_free_mrw(&rdev->qplib_res, &mr->qplib_mr); | |
| 2833 | − | |
| 2834 | 3102 | if (!IS_ERR_OR_NULL(mr->ib_umem)) |
| 2835 | 3103 | ib_umem_release(mr->ib_umem); |
| 2836 | 3104 | |
| @@ -2914,97 +3182,52 @@ fail: · 77 unmodified lines | ||
| 2914 | 3182 | return ERR_PTR(rc); |
| 2915 | 3183 | } |
| 2916 | 3184 | |
| 2917 | −/* Fast Memory Regions */ | |
| 2918 | −struct ib_fmr *bnxt_re_alloc_fmr(struct ib_pd *ib_pd, int mr_access_flags, | |
| 2919 | − struct ib_fmr_attr *fmr_attr) | |
| 3185 | +struct ib_mw *bnxt_re_alloc_mw(struct ib_pd *ib_pd, enum ib_mw_type type, | |
| 3186 | + struct ib_udata *udata) | |
| 2920 | 3187 | { |
| 2921 | 3188 | struct bnxt_re_pd *pd = container_of(ib_pd, struct bnxt_re_pd, ib_pd); |
| 2922 | 3189 | struct bnxt_re_dev *rdev = pd->rdev; |
| 2923 | − struct bnxt_re_fmr *fmr; | |
| 3190 | + struct bnxt_re_mw *mw; | |
| 2924 | 3191 | int rc; |
| 2925 | 3192 | |
| 2926 | − if (fmr_attr->max_pages > MAX_PBL_LVL_2_PGS || | |
| 2927 | − fmr_attr->max_maps > rdev->dev_attr.max_map_per_fmr) { | |
| 2928 | − dev_err(rdev_to_dev(rdev), "Allocate FMR exceeded Max limit"); | |
| 3193 | + mw = kzalloc(sizeof(*mw), GFP_KERNEL); | |
| 3194 | + if (!mw) | |
| 2929 | 3195 | return ERR_PTR(-ENOMEM); |
| 2930 | − } | |
| 2931 | − fmr = kzalloc(sizeof(*fmr), GFP_KERNEL); | |
| 2932 | − if (!fmr) | |
| 2933 | − return ERR_PTR(-ENOMEM); | |
| 2934 | − | |
| 2935 | − fmr->rdev = rdev; | |
| 2936 | − fmr->qplib_fmr.pd = &pd->qplib_pd; | |
| 2937 | − fmr->qplib_fmr.type = CMDQ_ALLOCATE_MRW_MRW_FLAGS_PMR; | |
| 3196 | + mw->rdev = rdev; | |
| 3197 | + mw->qplib_mw.pd = &pd->qplib_pd; | |
| 2938 | 3198 | |
| 2939 | − rc = bnxt_qplib_alloc_mrw(&rdev->qplib_res, &fmr->qplib_fmr); | |
| 2940 | − if (rc) | |
| 3199 | + mw->qplib_mw.type = (type == IB_MW_TYPE_1 ? | |
| 3200 | + CMDQ_ALLOCATE_MRW_MRW_FLAGS_MW_TYPE1 : | |
| 3201 | + CMDQ_ALLOCATE_MRW_MRW_FLAGS_MW_TYPE2B); | |
| 3202 | + rc = bnxt_qplib_alloc_mrw(&rdev->qplib_res, &mw->qplib_mw); | |
| 3203 | + if (rc) { | |
| 3204 | + dev_err(rdev_to_dev(rdev), "Allocate MW failed!"); | |
| 2941 | 3205 | goto fail; |
| 3206 | + } | |
| 3207 | + mw->ib_mw.rkey = mw->qplib_mw.rkey; | |
| 2942 | 3208 | |
| 2943 | − fmr->qplib_fmr.flags = __from_ib_access_flags(mr_access_flags); | |
| 2944 | − fmr->ib_fmr.lkey = fmr->qplib_fmr.lkey; | |
| 2945 | − fmr->ib_fmr.rkey = fmr->ib_fmr.lkey; | |
| 3209 | + atomic_inc(&rdev->mw_count); | |
| 3210 | + return &mw->ib_mw; | |
| 2946 | 3211 | |
| 2947 | − atomic_inc(&rdev->mr_count); | |
| 2948 | − return &fmr->ib_fmr; | |
| 2949 | 3212 | fail: |
| 2950 | − kfree(fmr); | |
| 3213 | + kfree(mw); | |
| 2951 | 3214 | return ERR_PTR(rc); |
| 2952 | 3215 | } |
| 2953 | 3216 | |
| 2954 | −int bnxt_re_map_phys_fmr(struct ib_fmr *ib_fmr, u64 *page_list, int list_len, | |
| 2955 | − u64 iova) | |
| 3217 | +int bnxt_re_dealloc_mw(struct ib_mw *ib_mw) | |
| 2956 | 3218 | { |
| 2957 | − struct bnxt_re_fmr *fmr = container_of(ib_fmr, struct bnxt_re_fmr, | |
| 2958 | − ib_fmr); | |
| 2959 | − struct bnxt_re_dev *rdev = fmr->rdev; | |
| 3219 | + struct bnxt_re_mw *mw = container_of(ib_mw, struct bnxt_re_mw, ib_mw); | |
| 3220 | + struct bnxt_re_dev *rdev = mw->rdev; | |
| 2960 | 3221 | int rc; |
| 2961 | 3222 | |
| 2962 | − fmr->qplib_fmr.va = iova; | |
| 2963 | − fmr->qplib_fmr.total_size = list_len * PAGE_SIZE; | |
| 2964 | − | |
| 2965 | − rc = bnxt_qplib_reg_mr(&rdev->qplib_res, &fmr->qplib_fmr, page_list, | |
| 2966 | − list_len, true); | |
| 2967 | − if (rc) | |
| 2968 | − dev_err(rdev_to_dev(rdev), "Failed to map FMR for lkey = 0x%x!", | |
| 2969 | − fmr->ib_fmr.lkey); | |
| 2970 | − return rc; | |
| 2971 | −} | |
| 2972 | − | |
| 2973 | −int bnxt_re_unmap_fmr(struct list_head *fmr_list) | |
| 2974 | −{ | |
| 2975 | − struct bnxt_re_dev *rdev; | |
| 2976 | − struct bnxt_re_fmr *fmr; | |
| 2977 | − struct ib_fmr *ib_fmr; | |
| 2978 | − int rc = 0; | |
| 2979 | − | |
| 2980 | − /* Validate each FMRs inside the fmr_list */ | |
| 2981 | − list_for_each_entry(ib_fmr, fmr_list, list) { | |
| 2982 | − fmr = container_of(ib_fmr, struct bnxt_re_fmr, ib_fmr); | |
| 2983 | − rdev = fmr->rdev; | |
| 2984 | − | |
| 2985 | − if (rdev) { | |
| 2986 | − rc = bnxt_qplib_dereg_mrw(&rdev->qplib_res, | |
| 2987 | − &fmr->qplib_fmr, true); | |
| 2988 | − if (rc) | |
| 2989 | − break; | |
| 2990 | − } | |
| 3223 | + rc = bnxt_qplib_free_mrw(&rdev->qplib_res, &mw->qplib_mw); | |
| 3224 | + if (rc) { | |
| 3225 | + dev_err(rdev_to_dev(rdev), "Free MW failed: %#x\n", rc); | |
| 3226 | + return rc; | |
| 2991 | 3227 | } |
| 2992 | − return rc; | |
| 2993 | −} | |
| 2994 | − | |
| 2995 | −int bnxt_re_dealloc_fmr(struct ib_fmr *ib_fmr) | |
| 2996 | −{ | |
| 2997 | − struct bnxt_re_fmr *fmr = container_of(ib_fmr, struct bnxt_re_fmr, | |
| 2998 | − ib_fmr); | |
| 2999 | − struct bnxt_re_dev *rdev = fmr->rdev; | |
| 3000 | − int rc; | |
| 3001 | 3228 | |
| 3002 | − rc = bnxt_qplib_free_mrw(&rdev->qplib_res, &fmr->qplib_fmr); | |
| 3003 | − if (rc) | |
| 3004 | − dev_err(rdev_to_dev(rdev), "Failed to free FMR"); | |
| 3005 | − | |
| 3006 | − kfree(fmr); | |
| 3007 | − atomic_dec(&rdev->mr_count); | |
| 3229 | + kfree(mw); | |
| 3230 | + atomic_dec(&rdev->mw_count); | |
| 3008 | 3231 | return rc; |
| 3009 | 3232 | } |
| 3010 | 3233 | |
| @@ -44,11 +44,23 @@ struct bnxt_re_gid_ctx { · 43 unmodified lines | ||
| 44 | 44 | u32 refcnt; |
| 45 | 45 | }; |
| 46 | 46 | |
| 47 | +#define BNXT_RE_FENCE_BYTES 64 | |
| 48 | +struct bnxt_re_fence_data { | |
| 49 | + u32 size; | |
| 50 | + u8 va[BNXT_RE_FENCE_BYTES]; | |
| 51 | + dma_addr_t dma_addr; | |
| 52 | + struct bnxt_re_mr *mr; | |
| 53 | + struct ib_mw *mw; | |
| 54 | + struct bnxt_qplib_swqe bind_wqe; | |
| 55 | + u32 bind_rkey; | |
| 56 | +}; | |
| 57 | + | |
| 47 | 58 | struct bnxt_re_pd { |
| 48 | 59 | struct bnxt_re_dev *rdev; |
| 49 | 60 | struct ib_pd ib_pd; |
| 50 | 61 | struct bnxt_qplib_pd qplib_pd; |
| 51 | 62 | struct bnxt_qplib_dpi dpi; |
| 63 | + struct bnxt_re_fence_data fence; | |
| 52 | 64 | }; |
| 53 | 65 | |
| 54 | 66 | struct bnxt_re_ah { |
| @@ -62,6 +74,7 @@ struct bnxt_re_qp { · 7 unmodified lines | ||
| 62 | 74 | struct bnxt_re_dev *rdev; |
| 63 | 75 | struct ib_qp ib_qp; |
| 64 | 76 | spinlock_t sq_lock; /* protect sq */ |
| 77 | + spinlock_t rq_lock; /* protect rq */ | |
| 65 | 78 | struct bnxt_qplib_qp qplib_qp; |
| 66 | 79 | struct ib_umem *sumem; |
| 67 | 80 | struct ib_umem *rumem; |
| @@ -181,12 +194,9 @@ int bnxt_re_map_mr_sg(struct ib_mr *ib_mr, struct scatterlist *sg, int sg_nents, · 113 unmodified lines | ||
| 181 | 194 | struct ib_mr *bnxt_re_alloc_mr(struct ib_pd *ib_pd, enum ib_mr_type mr_type, |
| 182 | 195 | u32 max_num_sg); |
| 183 | 196 | int bnxt_re_dereg_mr(struct ib_mr *mr); |
| 184 | −struct ib_fmr *bnxt_re_alloc_fmr(struct ib_pd *pd, int mr_access_flags, | |
| 185 | − struct ib_fmr_attr *fmr_attr); | |
| 186 | −int bnxt_re_map_phys_fmr(struct ib_fmr *fmr, u64 *page_list, int list_len, | |
| 187 | − u64 iova); | |
| 188 | −int bnxt_re_unmap_fmr(struct list_head *fmr_list); | |
| 189 | −int bnxt_re_dealloc_fmr(struct ib_fmr *fmr); | |
| 197 | +struct ib_mw *bnxt_re_alloc_mw(struct ib_pd *ib_pd, enum ib_mw_type type, | |
| 198 | + struct ib_udata *udata); | |
| 199 | +int bnxt_re_dealloc_mw(struct ib_mw *mw); | |
| 190 | 200 | struct ib_mr *bnxt_re_reg_user_mr(struct ib_pd *pd, u64 start, u64 length, |
| 191 | 201 | u64 virt_addr, int mr_access_flags, |
| 192 | 202 | struct ib_udata *udata); |
| @@ -507,10 +507,6 @@ static int bnxt_re_register_ib(struct bnxt_re_dev *rdev) · 506 unmodified lines | ||
| 507 | 507 | ibdev->dereg_mr = bnxt_re_dereg_mr; |
| 508 | 508 | ibdev->alloc_mr = bnxt_re_alloc_mr; |
| 509 | 509 | ibdev->map_mr_sg = bnxt_re_map_mr_sg; |
| 510 | − ibdev->alloc_fmr = bnxt_re_alloc_fmr; | |
| 511 | − ibdev->map_phys_fmr = bnxt_re_map_phys_fmr; | |
| 512 | − ibdev->unmap_fmr = bnxt_re_unmap_fmr; | |
| 513 | − ibdev->dealloc_fmr = bnxt_re_dealloc_fmr; | |
| 514 | 510 | |
| 515 | 511 | ibdev->reg_user_mr = bnxt_re_reg_user_mr; |
| 516 | 512 | ibdev->alloc_ucontext = bnxt_re_alloc_ucontext; |
| @@ -284,7 +284,7 @@ int bnxt_qplib_create_qp1(struct bnxt_qplib_res *res, struct bnxt_qplib_qp *qp) · 283 unmodified lines | ||
| 284 | 284 | { |
| 285 | 285 | struct bnxt_qplib_rcfw *rcfw = res->rcfw; |
| 286 | 286 | struct cmdq_create_qp1 req; |
| 287 | − struct creq_create_qp1_resp *resp; | |
| 287 | + struct creq_create_qp1_resp resp; | |
| 288 | 288 | struct bnxt_qplib_pbl *pbl; |
| 289 | 289 | struct bnxt_qplib_q *sq = &qp->sq; |
| 290 | 290 | struct bnxt_qplib_q *rq = &qp->rq; |
| @@ -394,31 +394,12 @@ int bnxt_qplib_create_qp1(struct bnxt_qplib_res *res, struct bnxt_qplib_qp *qp) · 103 unmodified lines | ||
| 394 | 394 | |
| 395 | 395 | req.pd_id = cpu_to_le32(qp->pd->id); |
| 396 | 396 | |
| 397 | − resp = (struct creq_create_qp1_resp *) | |
| 398 | − bnxt_qplib_rcfw_send_message(rcfw, (void *)&req, | |
| 399 | − NULL, 0); | |
| 400 | − if (!resp) { | |
| 401 | − dev_err(&res->pdev->dev, "QPLIB: FP: CREATE_QP1 send failed"); | |
| 402 | − rc = -EINVAL; | |
| 403 | − goto fail; | |
| 404 | − } | |
| 405 | − if (!bnxt_qplib_rcfw_wait_for_resp(rcfw, le16_to_cpu(req.cookie))) { | |
| 406 | − /* Cmd timed out */ | |
| 407 | − dev_err(&rcfw->pdev->dev, "QPLIB: FP: CREATE_QP1 timed out"); | |
| 408 | − rc = -ETIMEDOUT; | |
| 409 | − goto fail; | |
| 410 | − } | |
| 411 | − if (resp->status || | |
| 412 | − le16_to_cpu(resp->cookie) != le16_to_cpu(req.cookie)) { | |
| 413 | − dev_err(&rcfw->pdev->dev, "QPLIB: FP: CREATE_QP1 failed "); | |
| 414 | − dev_err(&rcfw->pdev->dev, | |
| 415 | − "QPLIB: with status 0x%x cmdq 0x%x resp 0x%x", | |
| 416 | − resp->status, le16_to_cpu(req.cookie), | |
| 417 | − le16_to_cpu(resp->cookie)); | |
| 418 | − rc = -EINVAL; | |
| 397 | + rc = bnxt_qplib_rcfw_send_message(rcfw, (void *)&req, | |
| 398 | + (void *)&resp, NULL, 0); | |
| 399 | + if (rc) | |
| 419 | 400 | goto fail; |
| 420 | − } | |
| 421 | − qp->id = le32_to_cpu(resp->xid); | |
| 401 | + | |
| 402 | + qp->id = le32_to_cpu(resp.xid); | |
| 422 | 403 | qp->cur_qp_state = CMDQ_MODIFY_QP_NEW_STATE_RESET; |
| 423 | 404 | sq->flush_in_progress = false; |
| 424 | 405 | rq->flush_in_progress = false; |
| @@ -442,7 +423,7 @@ int bnxt_qplib_create_qp(struct bnxt_qplib_res *res, struct bnxt_qplib_qp *qp) · 17 unmodified lines | ||
| 442 | 423 | struct bnxt_qplib_rcfw *rcfw = res->rcfw; |
| 443 | 424 | struct sq_send *hw_sq_send_hdr, **hw_sq_send_ptr; |
| 444 | 425 | struct cmdq_create_qp req; |
| 445 | − struct creq_create_qp_resp *resp; | |
| 426 | + struct creq_create_qp_resp resp; | |
| 446 | 427 | struct bnxt_qplib_pbl *pbl; |
| 447 | 428 | struct sq_psn_search **psn_search_ptr; |
| 448 | 429 | unsigned long int psn_search, poff = 0; |
| @@ -627,31 +608,12 @@ int bnxt_qplib_create_qp(struct bnxt_qplib_res *res, struct bnxt_qplib_qp *qp) · 178 unmodified lines | ||
| 627 | 608 | } |
| 628 | 609 | req.pd_id = cpu_to_le32(qp->pd->id); |
| 629 | 610 | |
| 630 | − resp = (struct creq_create_qp_resp *) | |
| 631 | − bnxt_qplib_rcfw_send_message(rcfw, (void *)&req, | |
| 632 | − NULL, 0); | |
| 633 | − if (!resp) { | |
| 634 | − dev_err(&rcfw->pdev->dev, "QPLIB: FP: CREATE_QP send failed"); | |
| 635 | − rc = -EINVAL; | |
| 636 | − goto fail; | |
| 637 | − } | |
| 638 | − if (!bnxt_qplib_rcfw_wait_for_resp(rcfw, le16_to_cpu(req.cookie))) { | |
| 639 | − /* Cmd timed out */ | |
| 640 | − dev_err(&rcfw->pdev->dev, "QPLIB: FP: CREATE_QP timed out"); | |
| 641 | − rc = -ETIMEDOUT; | |
| 642 | − goto fail; | |
| 643 | − } | |
| 644 | − if (resp->status || | |
| 645 | − le16_to_cpu(resp->cookie) != le16_to_cpu(req.cookie)) { | |
| 646 | − dev_err(&rcfw->pdev->dev, "QPLIB: FP: CREATE_QP failed "); | |
| 647 | − dev_err(&rcfw->pdev->dev, | |
| 648 | − "QPLIB: with status 0x%x cmdq 0x%x resp 0x%x", | |
| 649 | − resp->status, le16_to_cpu(req.cookie), | |
| 650 | − le16_to_cpu(resp->cookie)); | |
| 651 | − rc = -EINVAL; | |
| 611 | + rc = bnxt_qplib_rcfw_send_message(rcfw, (void *)&req, | |
| 612 | + (void *)&resp, NULL, 0); | |
| 613 | + if (rc) | |
| 652 | 614 | goto fail; |
| 653 | − } | |
| 654 | − qp->id = le32_to_cpu(resp->xid); | |
| 615 | + | |
| 616 | + qp->id = le32_to_cpu(resp.xid); | |
| 655 | 617 | qp->cur_qp_state = CMDQ_MODIFY_QP_NEW_STATE_RESET; |
| 656 | 618 | sq->flush_in_progress = false; |
| 657 | 619 | rq->flush_in_progress = false; |
| @@ -769,10 +731,11 @@ int bnxt_qplib_modify_qp(struct bnxt_qplib_res *res, struct bnxt_qplib_qp *qp) · 111 unmodified lines | ||
| 769 | 731 | { |
| 770 | 732 | struct bnxt_qplib_rcfw *rcfw = res->rcfw; |
| 771 | 733 | struct cmdq_modify_qp req; |
| 772 | − struct creq_modify_qp_resp *resp; | |
| 734 | + struct creq_modify_qp_resp resp; | |
| 773 | 735 | u16 cmd_flags = 0, pkey; |
| 774 | 736 | u32 temp32[4]; |
| 775 | 737 | u32 bmask; |
| 738 | + int rc; | |
| 776 | 739 | |
| 777 | 740 | RCFW_CMD_PREP(req, MODIFY_QP, cmd_flags); |
| 778 | 741 | |
| @@ -862,27 +825,10 @@ int bnxt_qplib_modify_qp(struct bnxt_qplib_res *res, struct bnxt_qplib_qp *qp) · 83 unmodified lines | ||
| 862 | 825 | |
| 863 | 826 | req.vlan_pcp_vlan_dei_vlan_id = cpu_to_le16(qp->vlan_id); |
| 864 | 827 | |
| 865 | − resp = (struct creq_modify_qp_resp *) | |
| 866 | − bnxt_qplib_rcfw_send_message(rcfw, (void *)&req, | |
| 867 | − NULL, 0); | |
| 868 | − if (!resp) { | |
| 869 | − dev_err(&rcfw->pdev->dev, "QPLIB: FP: MODIFY_QP send failed"); | |
| 870 | − return -EINVAL; | |
| 871 | − } | |
| 872 | − if (!bnxt_qplib_rcfw_wait_for_resp(rcfw, le16_to_cpu(req.cookie))) { | |
| 873 | − /* Cmd timed out */ | |
| 874 | − dev_err(&rcfw->pdev->dev, "QPLIB: FP: MODIFY_QP timed out"); | |
| 875 | − return -ETIMEDOUT; | |
| 876 | − } | |
| 877 | − if (resp->status || | |
| 878 | − le16_to_cpu(resp->cookie) != le16_to_cpu(req.cookie)) { | |
| 879 | − dev_err(&rcfw->pdev->dev, "QPLIB: FP: MODIFY_QP failed "); | |
| 880 | − dev_err(&rcfw->pdev->dev, | |
| 881 | − "QPLIB: with status 0x%x cmdq 0x%x resp 0x%x", | |
| 882 | − resp->status, le16_to_cpu(req.cookie), | |
| 883 | − le16_to_cpu(resp->cookie)); | |
| 884 | − return -EINVAL; | |
| 885 | − } | |
| 828 | + rc = bnxt_qplib_rcfw_send_message(rcfw, (void *)&req, | |
| 829 | + (void *)&resp, NULL, 0); | |
| 830 | + if (rc) | |
| 831 | + return rc; | |
| 886 | 832 | qp->cur_qp_state = qp->state; |
| 887 | 833 | return 0; |
| 888 | 834 | } |
| @@ -891,37 +837,26 @@ int bnxt_qplib_query_qp(struct bnxt_qplib_res *res, struct bnxt_qplib_qp *qp) · 2 unmodified lines | ||
| 891 | 837 | { |
| 892 | 838 | struct bnxt_qplib_rcfw *rcfw = res->rcfw; |
| 893 | 839 | struct cmdq_query_qp req; |
| 894 | − struct creq_query_qp_resp *resp; | |
| 840 | + struct creq_query_qp_resp resp; | |
| 841 | + struct bnxt_qplib_rcfw_sbuf *sbuf; | |
| 895 | 842 | struct creq_query_qp_resp_sb *sb; |
| 896 | 843 | u16 cmd_flags = 0; |
| 897 | 844 | u32 temp32[4]; |
| 898 | − int i; | |
| 845 | + int i, rc = 0; | |
| 899 | 846 | |
| 900 | 847 | RCFW_CMD_PREP(req, QUERY_QP, cmd_flags); |
| 901 | 848 | |
| 849 | + sbuf = bnxt_qplib_rcfw_alloc_sbuf(rcfw, sizeof(*sb)); | |
| 850 | + if (!sbuf) | |
| 851 | + return -ENOMEM; | |
| 852 | + sb = sbuf->sb; | |
| 853 | + | |
| 902 | 854 | req.qp_cid = cpu_to_le32(qp->id); |
| 903 | 855 | req.resp_size = sizeof(*sb) / BNXT_QPLIB_CMDQE_UNITS; |
| 904 | − resp = (struct creq_query_qp_resp *) | |
| 905 | − bnxt_qplib_rcfw_send_message(rcfw, (void *)&req, | |
| 906 | − (void **)&sb, 0); | |
| 907 | − if (!resp) { | |
| 908 | − dev_err(&rcfw->pdev->dev, "QPLIB: FP: QUERY_QP send failed"); | |
| 909 | − return -EINVAL; | |
| 910 | − } | |
| 911 | − if (!bnxt_qplib_rcfw_wait_for_resp(rcfw, le16_to_cpu(req.cookie))) { | |
| 912 | − /* Cmd timed out */ | |
| 913 | − dev_err(&rcfw->pdev->dev, "QPLIB: FP: QUERY_QP timed out"); | |
| 914 | − return -ETIMEDOUT; | |
| 915 | − } | |
| 916 | − if (resp->status || | |
| 917 | − le16_to_cpu(resp->cookie) != le16_to_cpu(req.cookie)) { | |
| 918 | − dev_err(&rcfw->pdev->dev, "QPLIB: FP: QUERY_QP failed "); | |
| 919 | − dev_err(&rcfw->pdev->dev, | |
| 920 | − "QPLIB: with status 0x%x cmdq 0x%x resp 0x%x", | |
| 921 | − resp->status, le16_to_cpu(req.cookie), | |
| 922 | − le16_to_cpu(resp->cookie)); | |
| 923 | − return -EINVAL; | |
| 924 | − } | |
| 856 | + rc = bnxt_qplib_rcfw_send_message(rcfw, (void *)&req, (void *)&resp, | |
| 857 | + (void *)sbuf, 0); | |
| 858 | + if (rc) | |
| 859 | + goto bail; | |
| 925 | 860 | /* Extract the context from the side buffer */ |
| 926 | 861 | qp->state = sb->en_sqd_async_notify_state & |
| 927 | 862 | CREQ_QUERY_QP_RESP_SB_STATE_MASK; |
| @@ -976,7 +911,9 @@ int bnxt_qplib_query_qp(struct bnxt_qplib_res *res, struct bnxt_qplib_qp *qp) · 48 unmodified lines | ||
| 976 | 911 | qp->dest_qpn = le32_to_cpu(sb->dest_qp_id); |
| 977 | 912 | memcpy(qp->smac, sb->src_mac, 6); |
| 978 | 913 | qp->vlan_id = le16_to_cpu(sb->vlan_pcp_vlan_dei_vlan_id); |
| 979 | − return 0; | |
| 914 | +bail: | |
| 915 | + bnxt_qplib_rcfw_free_sbuf(rcfw, sbuf); | |
| 916 | + return rc; | |
| 980 | 917 | } |
| 981 | 918 | |
| 982 | 919 | static void __clean_cq(struct bnxt_qplib_cq *cq, u64 qp) |
| @@ -1021,34 +958,18 @@ int bnxt_qplib_destroy_qp(struct bnxt_qplib_res *res, · 38 unmodified lines | ||
| 1021 | 958 | { |
| 1022 | 959 | struct bnxt_qplib_rcfw *rcfw = res->rcfw; |
| 1023 | 960 | struct cmdq_destroy_qp req; |
| 1024 | − struct creq_destroy_qp_resp *resp; | |
| 961 | + struct creq_destroy_qp_resp resp; | |
| 1025 | 962 | unsigned long flags; |
| 1026 | 963 | u16 cmd_flags = 0; |
| 964 | + int rc; | |
| 1027 | 965 | |
| 1028 | 966 | RCFW_CMD_PREP(req, DESTROY_QP, cmd_flags); |
| 1029 | 967 | |
| 1030 | 968 | req.qp_cid = cpu_to_le32(qp->id); |
| 1031 | − resp = (struct creq_destroy_qp_resp *) | |
| 1032 | − bnxt_qplib_rcfw_send_message(rcfw, (void *)&req, | |
| 1033 | − NULL, 0); | |
| 1034 | − if (!resp) { | |
| 1035 | − dev_err(&rcfw->pdev->dev, "QPLIB: FP: DESTROY_QP send failed"); | |
| 1036 | − return -EINVAL; | |
| 1037 | − } | |
| 1038 | − if (!bnxt_qplib_rcfw_wait_for_resp(rcfw, le16_to_cpu(req.cookie))) { | |
| 1039 | − /* Cmd timed out */ | |
| 1040 | − dev_err(&rcfw->pdev->dev, "QPLIB: FP: DESTROY_QP timed out"); | |
| 1041 | − return -ETIMEDOUT; | |
| 1042 | − } | |
| 1043 | − if (resp->status || | |
| 1044 | − le16_to_cpu(resp->cookie) != le16_to_cpu(req.cookie)) { | |
| 1045 | − dev_err(&rcfw->pdev->dev, "QPLIB: FP: DESTROY_QP failed "); | |
| 1046 | − dev_err(&rcfw->pdev->dev, | |
| 1047 | − "QPLIB: with status 0x%x cmdq 0x%x resp 0x%x", | |
| 1048 | − resp->status, le16_to_cpu(req.cookie), | |
| 1049 | − le16_to_cpu(resp->cookie)); | |
| 1050 | − return -EINVAL; | |
| 1051 | − } | |
| 969 | + rc = bnxt_qplib_rcfw_send_message(rcfw, (void *)&req, | |
| 970 | + (void *)&resp, NULL, 0); | |
| 971 | + if (rc) | |
| 972 | + return rc; | |
| 1052 | 973 | |
| 1053 | 974 | /* Must walk the associated CQs to nullified the QP ptr */ |
| 1054 | 975 | spin_lock_irqsave(&qp->scq->hwq.lock, flags); |
| @@ -1162,8 +1083,12 @@ int bnxt_qplib_post_send(struct bnxt_qplib_qp *qp, · 107 unmodified lines | ||
| 1162 | 1083 | rc = -EINVAL; |
| 1163 | 1084 | goto done; |
| 1164 | 1085 | } |
| 1165 | − if (HWQ_CMP((sq->hwq.prod + 1), &sq->hwq) == | |
| 1166 | − HWQ_CMP(sq->hwq.cons, &sq->hwq)) { | |
| 1086 | + | |
| 1087 | + if (bnxt_qplib_queue_full(sq)) { | |
| 1088 | + dev_err(&sq->hwq.pdev->dev, | |
| 1089 | + "QPLIB: prod = %#x cons = %#x qdepth = %#x delta = %#x", | |
| 1090 | + sq->hwq.prod, sq->hwq.cons, sq->hwq.max_elements, | |
| 1091 | + sq->q_full_delta); | |
| 1167 | 1092 | rc = -ENOMEM; |
| 1168 | 1093 | goto done; |
| 1169 | 1094 | } |
| @@ -1373,6 +1298,9 @@ int bnxt_qplib_post_send(struct bnxt_qplib_qp *qp, · 203 unmodified lines | ||
| 1373 | 1298 | } |
| 1374 | 1299 | |
| 1375 | 1300 | sq->hwq.prod++; |
| 1301 | + | |
| 1302 | + qp->wqe_cnt++; | |
| 1303 | + | |
| 1376 | 1304 | done: |
| 1377 | 1305 | return rc; |
| 1378 | 1306 | } |
| @@ -1411,8 +1339,7 @@ int bnxt_qplib_post_recv(struct bnxt_qplib_qp *qp, · 32 unmodified lines | ||
| 1411 | 1339 | rc = -EINVAL; |
| 1412 | 1340 | goto done; |
| 1413 | 1341 | } |
| 1414 | − if (HWQ_CMP((rq->hwq.prod + 1), &rq->hwq) == | |
| 1415 | − HWQ_CMP(rq->hwq.cons, &rq->hwq)) { | |
| 1342 | + if (bnxt_qplib_queue_full(rq)) { | |
| 1416 | 1343 | dev_err(&rq->hwq.pdev->dev, |
| 1417 | 1344 | "QPLIB: FP: QP (0x%x) RQ is full!", qp->id); |
| 1418 | 1345 | rc = -EINVAL; |
| @@ -1483,7 +1410,7 @@ int bnxt_qplib_create_cq(struct bnxt_qplib_res *res, struct bnxt_qplib_cq *cq) · 64 unmodified lines | ||
| 1483 | 1410 | { |
| 1484 | 1411 | struct bnxt_qplib_rcfw *rcfw = res->rcfw; |
| 1485 | 1412 | struct cmdq_create_cq req; |
| 1486 | − struct creq_create_cq_resp *resp; | |
| 1413 | + struct creq_create_cq_resp resp; | |
| 1487 | 1414 | struct bnxt_qplib_pbl *pbl; |
| 1488 | 1415 | u16 cmd_flags = 0; |
| 1489 | 1416 | int rc; |
| @@ -1525,30 +1452,12 @@ int bnxt_qplib_create_cq(struct bnxt_qplib_res *res, struct bnxt_qplib_cq *cq) · 35 unmodified lines | ||
| 1525 | 1452 | (cq->cnq_hw_ring_id & CMDQ_CREATE_CQ_CNQ_ID_MASK) << |
| 1526 | 1453 | CMDQ_CREATE_CQ_CNQ_ID_SFT); |
| 1527 | 1454 | |
| 1528 | − resp = (struct creq_create_cq_resp *) | |
| 1529 | − bnxt_qplib_rcfw_send_message(rcfw, (void *)&req, | |
| 1530 | − NULL, 0); | |
| 1531 | − if (!resp) { | |
| 1532 | − dev_err(&rcfw->pdev->dev, "QPLIB: FP: CREATE_CQ send failed"); | |
| 1533 | − return -EINVAL; | |
| 1534 | − } | |
| 1535 | − if (!bnxt_qplib_rcfw_wait_for_resp(rcfw, le16_to_cpu(req.cookie))) { | |
| 1536 | − /* Cmd timed out */ | |
| 1537 | − dev_err(&rcfw->pdev->dev, "QPLIB: FP: CREATE_CQ timed out"); | |
| 1538 | − rc = -ETIMEDOUT; | |
| 1539 | − goto fail; | |
| 1540 | − } | |
| 1541 | − if (resp->status || | |
| 1542 | − le16_to_cpu(resp->cookie) != le16_to_cpu(req.cookie)) { | |
| 1543 | − dev_err(&rcfw->pdev->dev, "QPLIB: FP: CREATE_CQ failed "); | |
| 1544 | − dev_err(&rcfw->pdev->dev, | |
| 1545 | − "QPLIB: with status 0x%x cmdq 0x%x resp 0x%x", | |
| 1546 | − resp->status, le16_to_cpu(req.cookie), | |
| 1547 | − le16_to_cpu(resp->cookie)); | |
| 1548 | − rc = -EINVAL; | |
| 1455 | + rc = bnxt_qplib_rcfw_send_message(rcfw, (void *)&req, | |
| 1456 | + (void *)&resp, NULL, 0); | |
| 1457 | + if (rc) | |
| 1549 | 1458 | goto fail; |
| 1550 | − } | |
| 1551 | − cq->id = le32_to_cpu(resp->xid); | |
| 1459 | + | |
| 1460 | + cq->id = le32_to_cpu(resp.xid); | |
| 1552 | 1461 | cq->dbr_base = res->dpi_tbl.dbr_bar_reg_iomem; |
| 1553 | 1462 | cq->period = BNXT_QPLIB_QUEUE_START_PERIOD; |
| 1554 | 1463 | init_waitqueue_head(&cq->waitq); |
| @@ -1566,33 +1475,17 @@ int bnxt_qplib_destroy_cq(struct bnxt_qplib_res *res, struct bnxt_qplib_cq *cq) · 11 unmodified lines | ||
| 1566 | 1475 | { |
| 1567 | 1476 | struct bnxt_qplib_rcfw *rcfw = res->rcfw; |
| 1568 | 1477 | struct cmdq_destroy_cq req; |
| 1569 | − struct creq_destroy_cq_resp *resp; | |
| 1478 | + struct creq_destroy_cq_resp resp; | |
| 1570 | 1479 | u16 cmd_flags = 0; |
| 1480 | + int rc; | |
| 1571 | 1481 | |
| 1572 | 1482 | RCFW_CMD_PREP(req, DESTROY_CQ, cmd_flags); |
| 1573 | 1483 | |
| 1574 | 1484 | req.cq_cid = cpu_to_le32(cq->id); |
| 1575 | − resp = (struct creq_destroy_cq_resp *) | |
| 1576 | − bnxt_qplib_rcfw_send_message(rcfw, (void *)&req, | |
| 1577 | − NULL, 0); | |
| 1578 | − if (!resp) { | |
| 1579 | − dev_err(&rcfw->pdev->dev, "QPLIB: FP: DESTROY_CQ send failed"); | |
| 1580 | − return -EINVAL; | |
| 1581 | − } | |
| 1582 | − if (!bnxt_qplib_rcfw_wait_for_resp(rcfw, le16_to_cpu(req.cookie))) { | |
| 1583 | − /* Cmd timed out */ | |
| 1584 | − dev_err(&rcfw->pdev->dev, "QPLIB: FP: DESTROY_CQ timed out"); | |
| 1585 | − return -ETIMEDOUT; | |
| 1586 | − } | |
| 1587 | − if (resp->status || | |
| 1588 | − le16_to_cpu(resp->cookie) != le16_to_cpu(req.cookie)) { | |
| 1589 | − dev_err(&rcfw->pdev->dev, "QPLIB: FP: DESTROY_CQ failed "); | |
| 1590 | − dev_err(&rcfw->pdev->dev, | |
| 1591 | − "QPLIB: with status 0x%x cmdq 0x%x resp 0x%x", | |
| 1592 | − resp->status, le16_to_cpu(req.cookie), | |
| 1593 | − le16_to_cpu(resp->cookie)); | |
| 1594 | − return -EINVAL; | |
| 1595 | − } | |
| 1485 | + rc = bnxt_qplib_rcfw_send_message(rcfw, (void *)&req, | |
| 1486 | + (void *)&resp, NULL, 0); | |
| 1487 | + if (rc) | |
| 1488 | + return rc; | |
| 1596 | 1489 | bnxt_qplib_free_hwq(res->pdev, &cq->hwq); |
| 1597 | 1490 | return 0; |
| 1598 | 1491 | } |
| @@ -1664,14 +1557,113 @@ static int __flush_rq(struct bnxt_qplib_q *rq, struct bnxt_qplib_qp *qp, · 65 unmodified lines | ||
| 1664 | 1557 | return rc; |
| 1665 | 1558 | } |
| 1666 | 1559 | |
| 1560 | +/* Note: SQE is valid from sw_sq_cons up to cqe_sq_cons (exclusive) | |
| 1561 | + * CQE is track from sw_cq_cons to max_element but valid only if VALID=1 | |
| 1562 | + */ | |
| 1563 | +static int do_wa9060(struct bnxt_qplib_qp *qp, struct bnxt_qplib_cq *cq, | |
| 1564 | + u32 cq_cons, u32 sw_sq_cons, u32 cqe_sq_cons) | |
| 1565 | +{ | |
| 1566 | + struct bnxt_qplib_q *sq = &qp->sq; | |
| 1567 | + struct bnxt_qplib_swq *swq; | |
| 1568 | + u32 peek_sw_cq_cons, peek_raw_cq_cons, peek_sq_cons_idx; | |
| 1569 | + struct cq_base *peek_hwcqe, **peek_hw_cqe_ptr; | |
| 1570 | + struct cq_req *peek_req_hwcqe; | |
| 1571 | + struct bnxt_qplib_qp *peek_qp; | |
| 1572 | + struct bnxt_qplib_q *peek_sq; | |
| 1573 | + int i, rc = 0; | |
| 1574 | + | |
| 1575 | + /* Normal mode */ | |
| 1576 | + /* Check for the psn_search marking before completing */ | |
| 1577 | + swq = &sq->swq[sw_sq_cons]; | |
| 1578 | + if (swq->psn_search && | |
| 1579 | + le32_to_cpu(swq->psn_search->flags_next_psn) & 0x80000000) { | |
| 1580 | + /* Unmark */ | |
| 1581 | + swq->psn_search->flags_next_psn = cpu_to_le32 | |
| 1582 | + (le32_to_cpu(swq->psn_search->flags_next_psn) | |
| 1583 | + & ~0x80000000); | |
| 1584 | + dev_dbg(&cq->hwq.pdev->dev, | |
| 1585 | + "FP: Process Req cq_cons=0x%x qp=0x%x sq cons sw=0x%x cqe=0x%x marked!\n", | |
| 1586 | + cq_cons, qp->id, sw_sq_cons, cqe_sq_cons); | |
| 1587 | + sq->condition = true; | |
| 1588 | + sq->send_phantom = true; | |
| 1589 | + | |
| 1590 | + /* TODO: Only ARM if the previous SQE is ARMALL */ | |
| 1591 | + bnxt_qplib_arm_cq(cq, DBR_DBR_TYPE_CQ_ARMALL); | |
| 1592 | + | |
| 1593 | + rc = -EAGAIN; | |
| 1594 | + goto out; | |
| 1595 | + } | |
| 1596 | + if (sq->condition) { | |
| 1597 | + /* Peek at the completions */ | |
| 1598 | + peek_raw_cq_cons = cq->hwq.cons; | |
| 1599 | + peek_sw_cq_cons = cq_cons; | |
| 1600 | + i = cq->hwq.max_elements; | |
| 1601 | + while (i--) { | |
| 1602 | + peek_sw_cq_cons = HWQ_CMP((peek_sw_cq_cons), &cq->hwq); | |
| 1603 | + peek_hw_cqe_ptr = (struct cq_base **)cq->hwq.pbl_ptr; | |
| 1604 | + peek_hwcqe = &peek_hw_cqe_ptr[CQE_PG(peek_sw_cq_cons)] | |
| 1605 | + [CQE_IDX(peek_sw_cq_cons)]; | |
| 1606 | + /* If the next hwcqe is VALID */ | |
| 1607 | + if (CQE_CMP_VALID(peek_hwcqe, peek_raw_cq_cons, | |
| 1608 | + cq->hwq.max_elements)) { | |
| 1609 | + /* If the next hwcqe is a REQ */ | |
| 1610 | + if ((peek_hwcqe->cqe_type_toggle & | |
| 1611 | + CQ_BASE_CQE_TYPE_MASK) == | |
| 1612 | + CQ_BASE_CQE_TYPE_REQ) { | |
| 1613 | + peek_req_hwcqe = (struct cq_req *) | |
| 1614 | + peek_hwcqe; | |
| 1615 | + peek_qp = (struct bnxt_qplib_qp *) | |
| 1616 | + ((unsigned long) | |
| 1617 | + le64_to_cpu | |
| 1618 | + (peek_req_hwcqe->qp_handle)); | |
| 1619 | + peek_sq = &peek_qp->sq; | |
| 1620 | + peek_sq_cons_idx = HWQ_CMP(le16_to_cpu( | |
| 1621 | + peek_req_hwcqe->sq_cons_idx) - 1 | |
| 1622 | + , &sq->hwq); | |
| 1623 | + /* If the hwcqe's sq's wr_id matches */ | |
| 1624 | + if (peek_sq == sq && | |
| 1625 | + sq->swq[peek_sq_cons_idx].wr_id == | |
| 1626 | + BNXT_QPLIB_FENCE_WRID) { | |
| 1627 | + /* | |
| 1628 | + * Unbreak only if the phantom | |
| 1629 | + * comes back | |
| 1630 | + */ | |
| 1631 | + dev_dbg(&cq->hwq.pdev->dev, | |
| 1632 | + "FP:Got Phantom CQE"); | |
| 1633 | + sq->condition = false; | |
| 1634 | + sq->single = true; | |
| 1635 | + rc = 0; | |
| 1636 | + goto out; | |
| 1637 | + } | |
| 1638 | + } | |
| 1639 | + /* Valid but not the phantom, so keep looping */ | |
| 1640 | + } else { | |
| 1641 | + /* Not valid yet, just exit and wait */ | |
| 1642 | + rc = -EINVAL; | |
| 1643 | + goto out; | |
| 1644 | + } | |
| 1645 | + peek_sw_cq_cons++; | |
| 1646 | + peek_raw_cq_cons++; | |
| 1647 | + } | |
| 1648 | + dev_err(&cq->hwq.pdev->dev, | |
| 1649 | + "Should not have come here! cq_cons=0x%x qp=0x%x sq cons sw=0x%x hw=0x%x", | |
| 1650 | + cq_cons, qp->id, sw_sq_cons, cqe_sq_cons); | |
| 1651 | + rc = -EINVAL; | |
| 1652 | + } | |
| 1653 | +out: | |
| 1654 | + return rc; | |
| 1655 | +} | |
| 1656 | + | |
| 1667 | 1657 | static int bnxt_qplib_cq_process_req(struct bnxt_qplib_cq *cq, |
| 1668 | 1658 | struct cq_req *hwcqe, |
| 1669 | − struct bnxt_qplib_cqe **pcqe, int *budget) | |
| 1659 | + struct bnxt_qplib_cqe **pcqe, int *budget, | |
| 1660 | + u32 cq_cons, struct bnxt_qplib_qp **lib_qp) | |
| 1670 | 1661 | { |
| 1671 | 1662 | struct bnxt_qplib_qp *qp; |
| 1672 | 1663 | struct bnxt_qplib_q *sq; |
| 1673 | 1664 | struct bnxt_qplib_cqe *cqe; |
| 1674 | − u32 sw_cons, cqe_cons; | |
| 1665 | + u32 sw_sq_cons, cqe_sq_cons; | |
| 1666 | + struct bnxt_qplib_swq *swq; | |
| 1675 | 1667 | int rc = 0; |
| 1676 | 1668 | |
| 1677 | 1669 | qp = (struct bnxt_qplib_qp *)((unsigned long) |
| @@ -1683,13 +1675,13 @@ static int bnxt_qplib_cq_process_req(struct bnxt_qplib_cq *cq, · 5 unmodified lines | ||
| 1683 | 1675 | } |
| 1684 | 1676 | sq = &qp->sq; |
| 1685 | 1677 | |
| 1686 | − cqe_cons = HWQ_CMP(le16_to_cpu(hwcqe->sq_cons_idx), &sq->hwq); | |
| 1687 | − if (cqe_cons > sq->hwq.max_elements) { | |
| 1678 | + cqe_sq_cons = HWQ_CMP(le16_to_cpu(hwcqe->sq_cons_idx), &sq->hwq); | |
| 1679 | + if (cqe_sq_cons > sq->hwq.max_elements) { | |
| 1688 | 1680 | dev_err(&cq->hwq.pdev->dev, |
| 1689 | 1681 | "QPLIB: FP: CQ Process req reported "); |
| 1690 | 1682 | dev_err(&cq->hwq.pdev->dev, |
| 1691 | 1683 | "QPLIB: sq_cons_idx 0x%x which exceeded max 0x%x", |
| 1692 | − cqe_cons, sq->hwq.max_elements); | |
| 1684 | + cqe_sq_cons, sq->hwq.max_elements); | |
| 1693 | 1685 | return -EINVAL; |
| 1694 | 1686 | } |
| 1695 | 1687 | /* If we were in the middle of flushing the SQ, continue */ |
| @@ -1698,53 +1690,74 @@ static int bnxt_qplib_cq_process_req(struct bnxt_qplib_cq *cq, · 2 unmodified lines | ||
| 1698 | 1690 | |
| 1699 | 1691 | /* Require to walk the sq's swq to fabricate CQEs for all previously |
| 1700 | 1692 | * signaled SWQEs due to CQE aggregation from the current sq cons |
| 1701 | − * to the cqe_cons | |
| 1693 | + * to the cqe_sq_cons | |
| 1702 | 1694 | */ |
| 1703 | 1695 | cqe = *pcqe; |
| 1704 | 1696 | while (*budget) { |
| 1705 | − sw_cons = HWQ_CMP(sq->hwq.cons, &sq->hwq); | |
| 1706 | − if (sw_cons == cqe_cons) | |
| 1697 | + sw_sq_cons = HWQ_CMP(sq->hwq.cons, &sq->hwq); | |
| 1698 | + if (sw_sq_cons == cqe_sq_cons) | |
| 1699 | + /* Done */ | |
| 1707 | 1700 | break; |
| 1701 | + | |
| 1702 | + swq = &sq->swq[sw_sq_cons]; | |
| 1708 | 1703 | memset(cqe, 0, sizeof(*cqe)); |
| 1709 | 1704 | cqe->opcode = CQ_BASE_CQE_TYPE_REQ; |
| 1710 | 1705 | cqe->qp_handle = (u64)(unsigned long)qp; |
| 1711 | 1706 | cqe->src_qp = qp->id; |
| 1712 | − cqe->wr_id = sq->swq[sw_cons].wr_id; | |
| 1713 | − cqe->type = sq->swq[sw_cons].type; | |
| 1707 | + cqe->wr_id = swq->wr_id; | |
| 1708 | + if (cqe->wr_id == BNXT_QPLIB_FENCE_WRID) | |
| 1709 | + goto skip; | |
| 1710 | + cqe->type = swq->type; | |
| 1714 | 1711 | |
| 1715 | 1712 | /* For the last CQE, check for status. For errors, regardless |
| 1716 | 1713 | * of the request being signaled or not, it must complete with |
| 1717 | 1714 | * the hwcqe error status |
| 1718 | 1715 | */ |
| 1719 | − if (HWQ_CMP((sw_cons + 1), &sq->hwq) == cqe_cons && | |
| 1716 | + if (HWQ_CMP((sw_sq_cons + 1), &sq->hwq) == cqe_sq_cons && | |
| 1720 | 1717 | hwcqe->status != CQ_REQ_STATUS_OK) { |
| 1721 | 1718 | cqe->status = hwcqe->status; |
| 1722 | 1719 | dev_err(&cq->hwq.pdev->dev, |
| 1723 | 1720 | "QPLIB: FP: CQ Processed Req "); |
| 1724 | 1721 | dev_err(&cq->hwq.pdev->dev, |
| 1725 | 1722 | "QPLIB: wr_id[%d] = 0x%llx with status 0x%x", |
| 1726 | − sw_cons, cqe->wr_id, cqe->status); | |
| 1723 | + sw_sq_cons, cqe->wr_id, cqe->status); | |
| 1727 | 1724 | cqe++; |
| 1728 | 1725 | (*budget)--; |
| 1729 | 1726 | sq->flush_in_progress = true; |
| 1730 | 1727 | /* Must block new posting of SQ and RQ */ |
| 1731 | 1728 | qp->state = CMDQ_MODIFY_QP_NEW_STATE_ERR; |
| 1729 | + sq->condition = false; | |
| 1730 | + sq->single = false; | |
| 1732 | 1731 | } else { |
| 1733 | − if (sq->swq[sw_cons].flags & | |
| 1734 | − SQ_SEND_FLAGS_SIGNAL_COMP) { | |
| 1732 | + if (swq->flags & SQ_SEND_FLAGS_SIGNAL_COMP) { | |
| 1733 | + /* Before we complete, do WA 9060 */ | |
| 1734 | + if (do_wa9060(qp, cq, cq_cons, sw_sq_cons, | |
| 1735 | + cqe_sq_cons)) { | |
| 1736 | + *lib_qp = qp; | |
| 1737 | + goto out; | |
| 1738 | + } | |
| 1735 | 1739 | cqe->status = CQ_REQ_STATUS_OK; |
| 1736 | 1740 | cqe++; |
| 1737 | 1741 | (*budget)--; |
| 1738 | 1742 | } |
| 1739 | 1743 | } |
| 1744 | +skip: | |
| 1740 | 1745 | sq->hwq.cons++; |
| 1746 | + if (sq->single) | |
| 1747 | + break; | |
| 1741 | 1748 | } |
| 1749 | +out: | |
| 1742 | 1750 | *pcqe = cqe; |
| 1743 | − if (!*budget && HWQ_CMP(sq->hwq.cons, &sq->hwq) != cqe_cons) { | |
| 1751 | + if (HWQ_CMP(sq->hwq.cons, &sq->hwq) != cqe_sq_cons) { | |
| 1744 | 1752 | /* Out of budget */ |
| 1745 | 1753 | rc = -EAGAIN; |
| 1746 | 1754 | goto done; |
| 1747 | 1755 | } |
| 1756 | + /* | |
| 1757 | + * Back to normal completion mode only after it has completed all of | |
| 1758 | + * the WC for this CQE | |
| 1759 | + */ | |
| 1760 | + sq->single = false; | |
| 1748 | 1761 | if (!sq->flush_in_progress) |
| 1749 | 1762 | goto done; |
| 1750 | 1763 | flush: |
| @@ -2074,7 +2087,7 @@ static int bnxt_qplib_cq_process_cutoff(struct bnxt_qplib_cq *cq, · 323 unmodified lines | ||
| 2074 | 2087 | } |
| 2075 | 2088 | |
| 2076 | 2089 | int bnxt_qplib_poll_cq(struct bnxt_qplib_cq *cq, struct bnxt_qplib_cqe *cqe, |
| 2077 | − int num_cqes) | |
| 2090 | + int num_cqes, struct bnxt_qplib_qp **lib_qp) | |
| 2078 | 2091 | { |
| 2079 | 2092 | struct cq_base *hw_cqe, **hw_cqe_ptr; |
| 2080 | 2093 | unsigned long flags; |
| @@ -2099,7 +2112,8 @@ int bnxt_qplib_poll_cq(struct bnxt_qplib_cq *cq, struct bnxt_qplib_cqe *cqe, · 18 unmodified lines | ||
| 2099 | 2112 | case CQ_BASE_CQE_TYPE_REQ: |
| 2100 | 2113 | rc = bnxt_qplib_cq_process_req(cq, |
| 2101 | 2114 | (struct cq_req *)hw_cqe, |
| 2102 | − &cqe, &budget); | |
| 2115 | + &cqe, &budget, | |
| 2116 | + sw_cons, lib_qp); | |
| 2103 | 2117 | break; |
| 2104 | 2118 | case CQ_BASE_CQE_TYPE_RES_RC: |
| 2105 | 2119 | rc = bnxt_qplib_cq_process_res_rc(cq, |
| @@ -88,6 +88,7 @@ struct bnxt_qplib_swq { · 87 unmodified lines | ||
| 88 | 88 | |
| 89 | 89 | struct bnxt_qplib_swqe { |
| 90 | 90 | /* General */ |
| 91 | +#define BNXT_QPLIB_FENCE_WRID 0x46454E43 /* "FENC" */ | |
| 91 | 92 | u64 wr_id; |
| 92 | 93 | u8 reqs_type; |
| 93 | 94 | u8 type; |
| @@ -216,9 +217,16 @@ struct bnxt_qplib_q { · 122 unmodified lines | ||
| 216 | 217 | struct scatterlist *sglist; |
| 217 | 218 | u32 nmap; |
| 218 | 219 | u32 max_wqe; |
| 220 | + u16 q_full_delta; | |
| 219 | 221 | u16 max_sge; |
| 220 | 222 | u32 psn; |
| 221 | 223 | bool flush_in_progress; |
| 224 | + bool condition; | |
| 225 | + bool single; | |
| 226 | + bool send_phantom; | |
| 227 | + u32 phantom_wqe_cnt; | |
| 228 | + u32 phantom_cqe_cnt; | |
| 229 | + u32 next_cq_cons; | |
| 222 | 230 | }; |
| 223 | 231 | |
| 224 | 232 | struct bnxt_qplib_qp { |
| @@ -242,6 +250,7 @@ struct bnxt_qplib_qp { · 17 unmodified lines | ||
| 242 | 250 | u8 timeout; |
| 243 | 251 | u8 retry_cnt; |
| 244 | 252 | u8 rnr_retry; |
| 253 | + u64 wqe_cnt; | |
| 245 | 254 | u32 min_rnr_timer; |
| 246 | 255 | u32 max_rd_atomic; |
| 247 | 256 | u32 max_dest_rd_atomic; |
| @@ -301,6 +310,13 @@ struct bnxt_qplib_qp { · 53 unmodified lines | ||
| 301 | 310 | (!!((hdr)->cqe_type_toggle & CQ_BASE_TOGGLE) == \ |
| 302 | 311 | !((raw_cons) & (cp_bit))) |
| 303 | 312 | |
| 313 | +static inline bool bnxt_qplib_queue_full(struct bnxt_qplib_q *qplib_q) | |
| 314 | +{ | |
| 315 | + return HWQ_CMP((qplib_q->hwq.prod + qplib_q->q_full_delta), | |
| 316 | + &qplib_q->hwq) == HWQ_CMP(qplib_q->hwq.cons, | |
| 317 | + &qplib_q->hwq); | |
| 318 | +} | |
| 319 | + | |
| 304 | 320 | struct bnxt_qplib_cqe { |
| 305 | 321 | u8 status; |
| 306 | 322 | u8 type; |
| @@ -432,7 +448,7 @@ int bnxt_qplib_post_recv(struct bnxt_qplib_qp *qp, · 125 unmodified lines | ||
| 432 | 448 | int bnxt_qplib_create_cq(struct bnxt_qplib_res *res, struct bnxt_qplib_cq *cq); |
| 433 | 449 | int bnxt_qplib_destroy_cq(struct bnxt_qplib_res *res, struct bnxt_qplib_cq *cq); |
| 434 | 450 | int bnxt_qplib_poll_cq(struct bnxt_qplib_cq *cq, struct bnxt_qplib_cqe *cqe, |
| 435 | − int num); | |
| 451 | + int num, struct bnxt_qplib_qp **qp); | |
| 436 | 452 | void bnxt_qplib_req_notify_cq(struct bnxt_qplib_cq *cq, u32 arm_type); |
| 437 | 453 | void bnxt_qplib_free_nq(struct bnxt_qplib_nq *nq); |
| 438 | 454 | int bnxt_qplib_alloc_nq(struct pci_dev *pdev, struct bnxt_qplib_nq *nq); |
| @@ -39,72 +39,55 @@ · 38 unmodified lines | ||
| 39 | 39 | #include <linux/spinlock.h> |
| 40 | 40 | #include <linux/pci.h> |
| 41 | 41 | #include <linux/prefetch.h> |
| 42 | +#include <linux/delay.h> | |
| 43 | + | |
| 42 | 44 | #include "roce_hsi.h" |
| 43 | 45 | #include "qplib_res.h" |
| 44 | 46 | #include "qplib_rcfw.h" |
| 45 | 47 | static void bnxt_qplib_service_creq(unsigned long data); |
| 46 | 48 | |
| 47 | 49 | /* Hardware communication channel */ |
| 48 | −int bnxt_qplib_rcfw_wait_for_resp(struct bnxt_qplib_rcfw *rcfw, u16 cookie) | |
| 50 | +static int __wait_for_resp(struct bnxt_qplib_rcfw *rcfw, u16 cookie) | |
| 49 | 51 | { |
| 50 | 52 | u16 cbit; |
| 51 | 53 | int rc; |
| 52 | 54 | |
| 53 | − cookie &= RCFW_MAX_COOKIE_VALUE; | |
| 54 | 55 | cbit = cookie % RCFW_MAX_OUTSTANDING_CMD; |
| 55 | − if (!test_bit(cbit, rcfw->cmdq_bitmap)) | |
| 56 | − dev_warn(&rcfw->pdev->dev, | |
| 57 | − "QPLIB: CMD bit %d for cookie 0x%x is not set?", | |
| 58 | − cbit, cookie); | |
| 59 | − | |
| 60 | 56 | rc = wait_event_timeout(rcfw->waitq, |
| 61 | 57 | !test_bit(cbit, rcfw->cmdq_bitmap), |
| 62 | 58 | msecs_to_jiffies(RCFW_CMD_WAIT_TIME_MS)); |
| 63 | − if (!rc) { | |
| 64 | − dev_warn(&rcfw->pdev->dev, | |
| 65 | − "QPLIB: Bono Error: timeout %d msec, msg {0x%x}\n", | |
| 66 | − RCFW_CMD_WAIT_TIME_MS, cookie); | |
| 67 | − } | |
| 68 | − | |
| 69 | − return rc; | |
| 59 | + return rc ? 0 : -ETIMEDOUT; | |
| 70 | 60 | }; |
| 71 | 61 | |
| 72 | −int bnxt_qplib_rcfw_block_for_resp(struct bnxt_qplib_rcfw *rcfw, u16 cookie) | |
| 62 | +static int __block_for_resp(struct bnxt_qplib_rcfw *rcfw, u16 cookie) | |
| 73 | 63 | { |
| 74 | − u32 count = -1; | |
| 64 | + u32 count = RCFW_BLOCKED_CMD_WAIT_COUNT; | |
| 75 | 65 | u16 cbit; |
| 76 | 66 | |
| 77 | − cookie &= RCFW_MAX_COOKIE_VALUE; | |
| 78 | 67 | cbit = cookie % RCFW_MAX_OUTSTANDING_CMD; |
| 79 | 68 | if (!test_bit(cbit, rcfw->cmdq_bitmap)) |
| 80 | 69 | goto done; |
| 81 | 70 | do { |
| 71 | + mdelay(1); /* 1m sec */ | |
| 82 | 72 | bnxt_qplib_service_creq((unsigned long)rcfw); |
| 83 | 73 | } while (test_bit(cbit, rcfw->cmdq_bitmap) && --count); |
| 84 | 74 | done: |
| 85 | − return count; | |
| 75 | + return count ? 0 : -ETIMEDOUT; | |
| 86 | 76 | }; |
| 87 | 77 | |
| 88 | −void *bnxt_qplib_rcfw_send_message(struct bnxt_qplib_rcfw *rcfw, | |
| 89 | − struct cmdq_base *req, void **crsbe, | |
| 90 | − u8 is_block) | |
| 78 | +static int __send_message(struct bnxt_qplib_rcfw *rcfw, struct cmdq_base *req, | |
| 79 | + struct creq_base *resp, void *sb, u8 is_block) | |
| 91 | 80 | { |
| 92 | − struct bnxt_qplib_crsq *crsq = &rcfw->crsq; | |
| 93 | 81 | struct bnxt_qplib_cmdqe *cmdqe, **cmdq_ptr; |
| 94 | 82 | struct bnxt_qplib_hwq *cmdq = &rcfw->cmdq; |
| 95 | − struct bnxt_qplib_hwq *crsb = &rcfw->crsb; | |
| 96 | − struct bnxt_qplib_crsqe *crsqe = NULL; | |
| 97 | − struct bnxt_qplib_crsbe **crsb_ptr; | |
| 83 | + struct bnxt_qplib_crsq *crsqe; | |
| 98 | 84 | u32 sw_prod, cmdq_prod; |
| 99 | − u8 retry_cnt = 0xFF; | |
| 100 | − dma_addr_t dma_addr; | |
| 101 | 85 | unsigned long flags; |
| 102 | 86 | u32 size, opcode; |
| 103 | 87 | u16 cookie, cbit; |
| 104 | 88 | int pg, idx; |
| 105 | 89 | u8 *preq; |
| 106 | 90 | |
| 107 | −retry: | |
| 108 | 91 | opcode = req->opcode; |
| 109 | 92 | if (!test_bit(FIRMWARE_INITIALIZED_FLAG, &rcfw->flags) && |
| 110 | 93 | (opcode != CMDQ_BASE_OPCODE_QUERY_FUNC && |
| @@ -112,63 +95,50 @@ retry: · 1 unmodified line | ||
| 112 | 95 | dev_err(&rcfw->pdev->dev, |
| 113 | 96 | "QPLIB: RCFW not initialized, reject opcode 0x%x", |
| 114 | 97 | opcode); |
| 115 | − return NULL; | |
| 98 | + return -EINVAL; | |
| 116 | 99 | } |
| 117 | 100 | |
| 118 | 101 | if (test_bit(FIRMWARE_INITIALIZED_FLAG, &rcfw->flags) && |
| 119 | 102 | opcode == CMDQ_BASE_OPCODE_INITIALIZE_FW) { |
| 120 | 103 | dev_err(&rcfw->pdev->dev, "QPLIB: RCFW already initialized!"); |
| 121 | − return NULL; | |
| 104 | + return -EINVAL; | |
| 122 | 105 | } |
| 123 | 106 | |
| 124 | 107 | /* Cmdq are in 16-byte units, each request can consume 1 or more |
| 125 | 108 | * cmdqe |
| 126 | 109 | */ |
| 127 | 110 | spin_lock_irqsave(&cmdq->lock, flags); |
| 128 | − if (req->cmd_size > cmdq->max_elements - | |
| 129 | − ((HWQ_CMP(cmdq->prod, cmdq) - HWQ_CMP(cmdq->cons, cmdq)) & | |
| 130 | − (cmdq->max_elements - 1))) { | |
| 111 | + if (req->cmd_size >= HWQ_FREE_SLOTS(cmdq)) { | |
| 131 | 112 | dev_err(&rcfw->pdev->dev, "QPLIB: RCFW: CMDQ is full!"); |
| 132 | 113 | spin_unlock_irqrestore(&cmdq->lock, flags); |
| 133 | − | |
| 134 | − if (!retry_cnt--) | |
| 135 | − return NULL; | |
| 136 | − goto retry; | |
| 114 | + return -EAGAIN; | |
| 137 | 115 | } |
| 138 | 116 | |
| 139 | − retry_cnt = 0xFF; | |
| 140 | 117 | |
| 141 | − cookie = atomic_inc_return(&rcfw->seq_num) & RCFW_MAX_COOKIE_VALUE; | |
| 118 | + cookie = rcfw->seq_num & RCFW_MAX_COOKIE_VALUE; | |
| 142 | 119 | cbit = cookie % RCFW_MAX_OUTSTANDING_CMD; |
| 143 | 120 | if (is_block) |
| 144 | 121 | cookie |= RCFW_CMD_IS_BLOCKING; |
| 122 | + | |
| 123 | + set_bit(cbit, rcfw->cmdq_bitmap); | |
| 145 | 124 | req->cookie = cpu_to_le16(cookie); |
| 146 | − if (test_and_set_bit(cbit, rcfw->cmdq_bitmap)) { | |
| 147 | − dev_err(&rcfw->pdev->dev, | |
| 148 | − "QPLIB: RCFW MAX outstanding cmd reached!"); | |
| 149 | − atomic_dec(&rcfw->seq_num); | |
| 125 | + crsqe = &rcfw->crsqe_tbl[cbit]; | |
| 126 | + if (crsqe->resp) { | |
| 150 | 127 | spin_unlock_irqrestore(&cmdq->lock, flags); |
| 151 | − | |
| 152 | − if (!retry_cnt--) | |
| 153 | − return NULL; | |
| 154 | − goto retry; | |
| 128 | + return -EBUSY; | |
| 155 | 129 | } |
| 156 | − /* Reserve a resp buffer slot if requested */ | |
| 157 | − if (req->resp_size && crsbe) { | |
| 158 | − spin_lock(&crsb->lock); | |
| 159 | − sw_prod = HWQ_CMP(crsb->prod, crsb); | |
| 160 | − crsb_ptr = (struct bnxt_qplib_crsbe **)crsb->pbl_ptr; | |
| 161 | − *crsbe = (void *)&crsb_ptr[get_crsb_pg(sw_prod)] | |
| 162 | − [get_crsb_idx(sw_prod)]; | |
| 163 | − bnxt_qplib_crsb_dma_next(crsb->pbl_dma_ptr, sw_prod, &dma_addr); | |
| 164 | − req->resp_addr = cpu_to_le64(dma_addr); | |
| 165 | − crsb->prod++; | |
| 166 | − spin_unlock(&crsb->lock); | |
| 167 | − | |
| 168 | − req->resp_size = (sizeof(struct bnxt_qplib_crsbe) + | |
| 169 | − BNXT_QPLIB_CMDQE_UNITS - 1) / | |
| 170 | − BNXT_QPLIB_CMDQE_UNITS; | |
| 130 | + memset(resp, 0, sizeof(*resp)); | |
| 131 | + crsqe->resp = (struct creq_qp_event *)resp; | |
| 132 | + crsqe->resp->cookie = req->cookie; | |
| 133 | + crsqe->req_size = req->cmd_size; | |
| 134 | + if (req->resp_size && sb) { | |
| 135 | + struct bnxt_qplib_rcfw_sbuf *sbuf = sb; | |
| 136 | + | |
| 137 | + req->resp_addr = cpu_to_le64(sbuf->dma_addr); | |
| 138 | + req->resp_size = (sbuf->size + BNXT_QPLIB_CMDQE_UNITS - 1) / | |
| 139 | + BNXT_QPLIB_CMDQE_UNITS; | |
| 171 | 140 | } |
| 141 | + | |
| 172 | 142 | cmdq_ptr = (struct bnxt_qplib_cmdqe **)cmdq->pbl_ptr; |
| 173 | 143 | preq = (u8 *)req; |
| 174 | 144 | size = req->cmd_size * BNXT_QPLIB_CMDQE_UNITS; |
| @@ -190,23 +160,24 @@ retry: · 15 unmodified lines | ||
| 190 | 160 | preq += min_t(u32, size, sizeof(*cmdqe)); |
| 191 | 161 | size -= min_t(u32, size, sizeof(*cmdqe)); |
| 192 | 162 | cmdq->prod++; |
| 163 | + rcfw->seq_num++; | |
| 193 | 164 | } while (size > 0); |
| 194 | 165 | |
| 166 | + rcfw->seq_num++; | |
| 167 | + | |
| 195 | 168 | cmdq_prod = cmdq->prod; |
| 196 | 169 | if (rcfw->flags & FIRMWARE_FIRST_FLAG) { |
| 197 | − /* The very first doorbell write is required to set this flag | |
| 198 | − * which prompts the FW to reset its internal pointers | |
| 170 | + /* The very first doorbell write | |
| 171 | + * is required to set this flag | |
| 172 | + * which prompts the FW to reset | |
| 173 | + * its internal pointers | |
| 199 | 174 | */ |
| 200 | 175 | cmdq_prod |= FIRMWARE_FIRST_FLAG; |
| 201 | 176 | rcfw->flags &= ~FIRMWARE_FIRST_FLAG; |
| 202 | 177 | } |
| 203 | − sw_prod = HWQ_CMP(crsq->prod, crsq); | |
| 204 | − crsqe = &crsq->crsq[sw_prod]; | |
| 205 | − memset(crsqe, 0, sizeof(*crsqe)); | |
| 206 | − crsq->prod++; | |
| 207 | − crsqe->req_size = req->cmd_size; | |
| 208 | 178 | |
| 209 | 179 | /* ring CMDQ DB */ |
| 180 | + wmb(); | |
| 210 | 181 | writel(cmdq_prod, rcfw->cmdq_bar_reg_iomem + |
| 211 | 182 | rcfw->cmdq_bar_reg_prod_off); |
| 212 | 183 | writel(RCFW_CMDQ_TRIG_VAL, rcfw->cmdq_bar_reg_iomem + |
| @@ -214,9 +185,56 @@ retry: · 1 unmodified line | ||
| 214 | 185 | done: |
| 215 | 186 | spin_unlock_irqrestore(&cmdq->lock, flags); |
| 216 | 187 | /* Return the CREQ response pointer */ |
| 217 | − return crsqe ? &crsqe->qp_event : NULL; | |
| 188 | + return 0; | |
| 218 | 189 | } |
| 219 | 190 | |
| 191 | +int bnxt_qplib_rcfw_send_message(struct bnxt_qplib_rcfw *rcfw, | |
| 192 | + struct cmdq_base *req, | |
| 193 | + struct creq_base *resp, | |
| 194 | + void *sb, u8 is_block) | |
| 195 | +{ | |
| 196 | + struct creq_qp_event *evnt = (struct creq_qp_event *)resp; | |
| 197 | + u16 cookie; | |
| 198 | + u8 opcode, retry_cnt = 0xFF; | |
| 199 | + int rc = 0; | |
| 200 | + | |
| 201 | + do { | |
| 202 | + opcode = req->opcode; | |
| 203 | + rc = __send_message(rcfw, req, resp, sb, is_block); | |
| 204 | + cookie = le16_to_cpu(req->cookie) & RCFW_MAX_COOKIE_VALUE; | |
| 205 | + if (!rc) | |
| 206 | + break; | |
| 207 | + | |
| 208 | + if (!retry_cnt || (rc != -EAGAIN && rc != -EBUSY)) { | |
| 209 | + /* send failed */ | |
| 210 | + dev_err(&rcfw->pdev->dev, "QPLIB: cmdq[%#x]=%#x send failed", | |
| 211 | + cookie, opcode); | |
| 212 | + return rc; | |
| 213 | + } | |
| 214 | + is_block ? mdelay(1) : usleep_range(500, 1000); | |
| 215 | + | |
| 216 | + } while (retry_cnt--); | |
| 217 | + | |
| 218 | + if (is_block) | |
| 219 | + rc = __block_for_resp(rcfw, cookie); | |
| 220 | + else | |
| 221 | + rc = __wait_for_resp(rcfw, cookie); | |
| 222 | + if (rc) { | |
| 223 | + /* timed out */ | |
| 224 | + dev_err(&rcfw->pdev->dev, "QPLIB: cmdq[%#x]=%#x timedout (%d)msec", | |
| 225 | + cookie, opcode, RCFW_CMD_WAIT_TIME_MS); | |
| 226 | + return rc; | |
| 227 | + } | |
| 228 | + | |
| 229 | + if (evnt->status) { | |
| 230 | + /* failed with status */ | |
| 231 | + dev_err(&rcfw->pdev->dev, "QPLIB: cmdq[%#x]=%#x status %#x", | |
| 232 | + cookie, opcode, evnt->status); | |
| 233 | + rc = -EFAULT; | |
| 234 | + } | |
| 235 | + | |
| 236 | + return rc; | |
| 237 | +} | |
| 220 | 238 | /* Completions */ |
| 221 | 239 | static int bnxt_qplib_process_func_event(struct bnxt_qplib_rcfw *rcfw, |
| 222 | 240 | struct creq_func_event *func_event) |
| @@ -260,12 +278,12 @@ static int bnxt_qplib_process_func_event(struct bnxt_qplib_rcfw *rcfw, · 37 unmodified lines | ||
| 260 | 278 | static int bnxt_qplib_process_qp_event(struct bnxt_qplib_rcfw *rcfw, |
| 261 | 279 | struct creq_qp_event *qp_event) |
| 262 | 280 | { |
| 263 | − struct bnxt_qplib_crsq *crsq = &rcfw->crsq; | |
| 264 | 281 | struct bnxt_qplib_hwq *cmdq = &rcfw->cmdq; |
| 265 | − struct bnxt_qplib_crsqe *crsqe; | |
| 266 | − u16 cbit, cookie, blocked = 0; | |
| 282 | + struct bnxt_qplib_crsq *crsqe; | |
| 267 | 283 | unsigned long flags; |
| 268 | − u32 sw_cons; | |
| 284 | + u16 cbit, blocked = 0; | |
| 285 | + u16 cookie; | |
| 286 | + __le16 mcookie; | |
| 269 | 287 | |
| 270 | 288 | switch (qp_event->event) { |
| 271 | 289 | case CREQ_QP_EVENT_EVENT_QP_ERROR_NOTIFICATION: |
| @@ -275,24 +293,31 @@ static int bnxt_qplib_process_qp_event(struct bnxt_qplib_rcfw *rcfw, · 3 unmodified lines | ||
| 275 | 293 | default: |
| 276 | 294 | /* Command Response */ |
| 277 | 295 | spin_lock_irqsave(&cmdq->lock, flags); |
| 278 | − sw_cons = HWQ_CMP(crsq->cons, crsq); | |
| 279 | − crsqe = &crsq->crsq[sw_cons]; | |
| 280 | − crsq->cons++; | |
| 281 | − memcpy(&crsqe->qp_event, qp_event, sizeof(crsqe->qp_event)); | |
| 282 | − | |
| 283 | − cookie = le16_to_cpu(crsqe->qp_event.cookie); | |
| 296 | + cookie = le16_to_cpu(qp_event->cookie); | |
| 297 | + mcookie = qp_event->cookie; | |
| 284 | 298 | blocked = cookie & RCFW_CMD_IS_BLOCKING; |
| 285 | 299 | cookie &= RCFW_MAX_COOKIE_VALUE; |
| 286 | 300 | cbit = cookie % RCFW_MAX_OUTSTANDING_CMD; |
| 301 | + crsqe = &rcfw->crsqe_tbl[cbit]; | |
| 302 | + if (crsqe->resp && | |
| 303 | + crsqe->resp->cookie == mcookie) { | |
| 304 | + memcpy(crsqe->resp, qp_event, sizeof(*qp_event)); | |
| 305 | + crsqe->resp = NULL; | |
| 306 | + } else { | |
| 307 | + dev_err(&rcfw->pdev->dev, | |
| 308 | + "QPLIB: CMD %s resp->cookie = %#x, evnt->cookie = %#x", | |
| 309 | + crsqe->resp ? "mismatch" : "collision", | |
| 310 | + crsqe->resp ? crsqe->resp->cookie : 0, mcookie); | |
| 311 | + } | |
| 287 | 312 | if (!test_and_clear_bit(cbit, rcfw->cmdq_bitmap)) |
| 288 | 313 | dev_warn(&rcfw->pdev->dev, |
| 289 | 314 | "QPLIB: CMD bit %d was not requested", cbit); |
| 290 | − | |
| 291 | 315 | cmdq->cons += crsqe->req_size; |
| 292 | − spin_unlock_irqrestore(&cmdq->lock, flags); | |
| 316 | + crsqe->req_size = 0; | |
| 317 | + | |
| 293 | 318 | if (!blocked) |
| 294 | 319 | wake_up(&rcfw->waitq); |
| 295 | − break; | |
| 320 | + spin_unlock_irqrestore(&cmdq->lock, flags); | |
| 296 | 321 | } |
| 297 | 322 | return 0; |
| 298 | 323 | } |
| @@ -305,12 +330,12 @@ static void bnxt_qplib_service_creq(unsigned long data) · 6 unmodified lines | ||
| 305 | 330 | struct creq_base *creqe, **creq_ptr; |
| 306 | 331 | u32 sw_cons, raw_cons; |
| 307 | 332 | unsigned long flags; |
| 308 | − u32 type; | |
| 333 | + u32 type, budget = CREQ_ENTRY_POLL_BUDGET; | |
| 309 | 334 | |
| 310 | − /* Service the CREQ until empty */ | |
| 335 | + /* Service the CREQ until budget is over */ | |
| 311 | 336 | spin_lock_irqsave(&creq->lock, flags); |
| 312 | 337 | raw_cons = creq->cons; |
| 313 | − while (1) { | |
| 338 | + while (budget > 0) { | |
| 314 | 339 | sw_cons = HWQ_CMP(raw_cons, creq); |
| 315 | 340 | creq_ptr = (struct creq_base **)creq->pbl_ptr; |
| 316 | 341 | creqe = &creq_ptr[get_creq_pg(sw_cons)][get_creq_idx(sw_cons)]; |
| @@ -320,15 +345,9 @@ static void bnxt_qplib_service_creq(unsigned long data) · 3 unmodified lines | ||
| 320 | 345 | type = creqe->type & CREQ_BASE_TYPE_MASK; |
| 321 | 346 | switch (type) { |
| 322 | 347 | case CREQ_BASE_TYPE_QP_EVENT: |
| 323 | − if (!bnxt_qplib_process_qp_event | |
| 324 | − (rcfw, (struct creq_qp_event *)creqe)) | |
| 325 | − rcfw->creq_qp_event_processed++; | |
| 326 | − else { | |
| 327 | − dev_warn(&rcfw->pdev->dev, "QPLIB: crsqe with"); | |
| 328 | − dev_warn(&rcfw->pdev->dev, | |
| 329 | − "QPLIB: type = 0x%x not handled", | |
| 330 | − type); | |
| 331 | − } | |
| 348 | + bnxt_qplib_process_qp_event | |
| 349 | + (rcfw, (struct creq_qp_event *)creqe); | |
| 350 | + rcfw->creq_qp_event_processed++; | |
| 332 | 351 | break; |
| 333 | 352 | case CREQ_BASE_TYPE_FUNC_EVENT: |
| 334 | 353 | if (!bnxt_qplib_process_func_event |
| @@ -346,7 +365,9 @@ static void bnxt_qplib_service_creq(unsigned long data) · 11 unmodified lines | ||
| 346 | 365 | break; |
| 347 | 366 | } |
| 348 | 367 | raw_cons++; |
| 368 | + budget--; | |
| 349 | 369 | } |
| 370 | + | |
| 350 | 371 | if (creq->cons != raw_cons) { |
| 351 | 372 | creq->cons = raw_cons; |
| 352 | 373 | CREQ_DB_REARM(rcfw->creq_bar_reg_iomem, raw_cons, |
| @@ -375,23 +396,16 @@ static irqreturn_t bnxt_qplib_creq_irq(int irq, void *dev_instance) · 22 unmodified lines | ||
| 375 | 396 | /* RCFW */ |
| 376 | 397 | int bnxt_qplib_deinit_rcfw(struct bnxt_qplib_rcfw *rcfw) |
| 377 | 398 | { |
| 378 | − struct creq_deinitialize_fw_resp *resp; | |
| 379 | 399 | struct cmdq_deinitialize_fw req; |
| 400 | + struct creq_deinitialize_fw_resp resp; | |
| 380 | 401 | u16 cmd_flags = 0; |
| 402 | + int rc; | |
| 381 | 403 | |
| 382 | 404 | RCFW_CMD_PREP(req, DEINITIALIZE_FW, cmd_flags); |
| 383 | − resp = (struct creq_deinitialize_fw_resp *) | |
| 384 | − bnxt_qplib_rcfw_send_message(rcfw, (void *)&req, | |
| 385 | − NULL, 0); | |
| 386 | − if (!resp) | |
| 387 | − return -EINVAL; | |
| 388 | − | |
| 389 | − if (!bnxt_qplib_rcfw_wait_for_resp(rcfw, le16_to_cpu(req.cookie))) | |
| 390 | − return -ETIMEDOUT; | |
| 391 | − | |
| 392 | − if (resp->status || | |
| 393 | − le16_to_cpu(resp->cookie) != le16_to_cpu(req.cookie)) | |
| 394 | − return -EFAULT; | |
| 405 | + rc = bnxt_qplib_rcfw_send_message(rcfw, (void *)&req, (void *)&resp, | |
| 406 | + NULL, 0); | |
| 407 | + if (rc) | |
| 408 | + return rc; | |
| 395 | 409 | |
| 396 | 410 | clear_bit(FIRMWARE_INITIALIZED_FLAG, &rcfw->flags); |
| 397 | 411 | return 0; |
| @@ -417,9 +431,10 @@ static int __get_pbl_pg_idx(struct bnxt_qplib_pbl *pbl) · 19 unmodified lines | ||
| 417 | 431 | int bnxt_qplib_init_rcfw(struct bnxt_qplib_rcfw *rcfw, |
| 418 | 432 | struct bnxt_qplib_ctx *ctx, int is_virtfn) |
| 419 | 433 | { |
| 420 | − struct creq_initialize_fw_resp *resp; | |
| 421 | 434 | struct cmdq_initialize_fw req; |
| 435 | + struct creq_initialize_fw_resp resp; | |
| 422 | 436 | u16 cmd_flags = 0, level; |
| 437 | + int rc; | |
| 423 | 438 | |
| 424 | 439 | RCFW_CMD_PREP(req, INITIALIZE_FW, cmd_flags); |
| 425 | 440 | |
| @@ -482,37 +497,19 @@ int bnxt_qplib_init_rcfw(struct bnxt_qplib_rcfw *rcfw, · 56 unmodified lines | ||
| 482 | 497 | |
| 483 | 498 | skip_ctx_setup: |
| 484 | 499 | req.stat_ctx_id = cpu_to_le32(ctx->stats.fw_id); |
| 485 | − resp = (struct creq_initialize_fw_resp *) | |
| 486 | − bnxt_qplib_rcfw_send_message(rcfw, (void *)&req, | |
| 487 | − NULL, 0); | |
| 488 | − if (!resp) { | |
| 489 | − dev_err(&rcfw->pdev->dev, | |
| 490 | − "QPLIB: RCFW: INITIALIZE_FW send failed"); | |
| 491 | − return -EINVAL; | |
| 492 | − } | |
| 493 | − if (!bnxt_qplib_rcfw_wait_for_resp(rcfw, le16_to_cpu(req.cookie))) { | |
| 494 | − /* Cmd timed out */ | |
| 495 | − dev_err(&rcfw->pdev->dev, | |
| 496 | − "QPLIB: RCFW: INITIALIZE_FW timed out"); | |
| 497 | − return -ETIMEDOUT; | |
| 498 | − } | |
| 499 | − if (resp->status || | |
| 500 | − le16_to_cpu(resp->cookie) != le16_to_cpu(req.cookie)) { | |
| 501 | − dev_err(&rcfw->pdev->dev, | |
| 502 | − "QPLIB: RCFW: INITIALIZE_FW failed"); | |
| 503 | − return -EINVAL; | |
| 504 | − } | |
| 500 | + rc = bnxt_qplib_rcfw_send_message(rcfw, (void *)&req, (void *)&resp, | |
| 501 | + NULL, 0); | |
| 502 | + if (rc) | |
| 503 | + return rc; | |
| 505 | 504 | set_bit(FIRMWARE_INITIALIZED_FLAG, &rcfw->flags); |
| 506 | 505 | return 0; |
| 507 | 506 | } |
| 508 | 507 | |
| 509 | 508 | void bnxt_qplib_free_rcfw_channel(struct bnxt_qplib_rcfw *rcfw) |
| 510 | 509 | { |
| 511 | − bnxt_qplib_free_hwq(rcfw->pdev, &rcfw->crsb); | |
| 512 | − kfree(rcfw->crsq.crsq); | |
| 510 | + kfree(rcfw->crsqe_tbl); | |
| 513 | 511 | bnxt_qplib_free_hwq(rcfw->pdev, &rcfw->cmdq); |
| 514 | 512 | bnxt_qplib_free_hwq(rcfw->pdev, &rcfw->creq); |
| 515 | − | |
| 516 | 513 | rcfw->pdev = NULL; |
| 517 | 514 | } |
| 518 | 515 | |
| @@ -539,21 +536,11 @@ int bnxt_qplib_alloc_rcfw_channel(struct pci_dev *pdev, · 20 unmodified lines | ||
| 539 | 536 | goto fail; |
| 540 | 537 | } |
| 541 | 538 | |
| 542 | − rcfw->crsq.max_elements = rcfw->cmdq.max_elements; | |
| 543 | − rcfw->crsq.crsq = kcalloc(rcfw->crsq.max_elements, | |
| 544 | − sizeof(*rcfw->crsq.crsq), GFP_KERNEL); | |
| 545 | − if (!rcfw->crsq.crsq) | |
| 539 | + rcfw->crsqe_tbl = kcalloc(rcfw->cmdq.max_elements, | |
| 540 | + sizeof(*rcfw->crsqe_tbl), GFP_KERNEL); | |
| 541 | + if (!rcfw->crsqe_tbl) | |
| 546 | 542 | goto fail; |
| 547 | 543 | |
| 548 | − rcfw->crsb.max_elements = BNXT_QPLIB_CRSBE_MAX_CNT; | |
| 549 | − if (bnxt_qplib_alloc_init_hwq(rcfw->pdev, &rcfw->crsb, NULL, 0, | |
| 550 | − &rcfw->crsb.max_elements, | |
| 551 | − BNXT_QPLIB_CRSBE_UNITS, 0, PAGE_SIZE, | |
| 552 | − HWQ_TYPE_CTX)) { | |
| 553 | − dev_err(&rcfw->pdev->dev, | |
| 554 | − "QPLIB: HW channel CRSB allocation failed"); | |
| 555 | − goto fail; | |
| 556 | − } | |
| 557 | 544 | return 0; |
| 558 | 545 | |
| 559 | 546 | fail: |
| @@ -606,7 +593,7 @@ int bnxt_qplib_enable_rcfw_channel(struct pci_dev *pdev, · 46 unmodified lines | ||
| 606 | 593 | int rc; |
| 607 | 594 | |
| 608 | 595 | /* General */ |
| 609 | − atomic_set(&rcfw->seq_num, 0); | |
| 596 | + rcfw->seq_num = 0; | |
| 610 | 597 | rcfw->flags = FIRMWARE_FIRST_FLAG; |
| 611 | 598 | bmap_size = BITS_TO_LONGS(RCFW_MAX_OUTSTANDING_CMD * |
| 612 | 599 | sizeof(unsigned long)); |
| @@ -636,10 +623,6 @@ int bnxt_qplib_enable_rcfw_channel(struct pci_dev *pdev, · 23 unmodified lines | ||
| 636 | 623 | |
| 637 | 624 | rcfw->cmdq_bar_reg_trig_off = RCFW_COMM_TRIG_OFFSET; |
| 638 | 625 | |
| 639 | − /* CRSQ */ | |
| 640 | − rcfw->crsq.prod = 0; | |
| 641 | − rcfw->crsq.cons = 0; | |
| 642 | − | |
| 643 | 626 | /* CREQ */ |
| 644 | 627 | rcfw->creq_bar_reg = RCFW_COMM_CONS_PCI_BAR_REGION; |
| 645 | 628 | res_base = pci_resource_start(pdev, rcfw->creq_bar_reg); |
| @@ -692,3 +675,34 @@ int bnxt_qplib_enable_rcfw_channel(struct pci_dev *pdev, · 46 unmodified lines | ||
| 692 | 675 | __iowrite32_copy(rcfw->cmdq_bar_reg_iomem, &init, sizeof(init) / 4); |
| 693 | 676 | return 0; |
| 694 | 677 | } |
| 678 | + | |
| 679 | +struct bnxt_qplib_rcfw_sbuf *bnxt_qplib_rcfw_alloc_sbuf( | |
| 680 | + struct bnxt_qplib_rcfw *rcfw, | |
| 681 | + u32 size) | |
| 682 | +{ | |
| 683 | + struct bnxt_qplib_rcfw_sbuf *sbuf; | |
| 684 | + | |
| 685 | + sbuf = kzalloc(sizeof(*sbuf), GFP_ATOMIC); | |
| 686 | + if (!sbuf) | |
| 687 | + return NULL; | |
| 688 | + | |
| 689 | + sbuf->size = size; | |
| 690 | + sbuf->sb = dma_zalloc_coherent(&rcfw->pdev->dev, sbuf->size, | |
| 691 | + &sbuf->dma_addr, GFP_ATOMIC); | |
| 692 | + if (!sbuf->sb) | |
| 693 | + goto bail; | |
| 694 | + | |
| 695 | + return sbuf; | |
| 696 | +bail: | |
| 697 | + kfree(sbuf); | |
| 698 | + return NULL; | |
| 699 | +} | |
| 700 | + | |
| 701 | +void bnxt_qplib_rcfw_free_sbuf(struct bnxt_qplib_rcfw *rcfw, | |
| 702 | + struct bnxt_qplib_rcfw_sbuf *sbuf) | |
| 703 | +{ | |
| 704 | + if (sbuf->sb) | |
| 705 | + dma_free_coherent(&rcfw->pdev->dev, sbuf->size, | |
| 706 | + sbuf->sb, sbuf->dma_addr); | |
| 707 | + kfree(sbuf); | |
| 708 | +} | |
| @@ -73,6 +73,7 @@ · 72 unmodified lines | ||
| 73 | 73 | #define RCFW_MAX_OUTSTANDING_CMD BNXT_QPLIB_CMDQE_MAX_CNT |
| 74 | 74 | #define RCFW_MAX_COOKIE_VALUE 0x7FFF |
| 75 | 75 | #define RCFW_CMD_IS_BLOCKING 0x8000 |
| 76 | +#define RCFW_BLOCKED_CMD_WAIT_COUNT 0x4E20 | |
| 76 | 77 | |
| 77 | 78 | /* Cmdq contains a fix number of a 16-Byte slots */ |
| 78 | 79 | struct bnxt_qplib_cmdqe { |
| @@ -94,32 +95,6 @@ struct bnxt_qplib_crsbe { · 15 unmodified lines | ||
| 94 | 95 | u8 data[1024]; |
| 95 | 96 | }; |
| 96 | 97 | |
| 97 | −/* CRSQ SB */ | |
| 98 | −#define BNXT_QPLIB_CRSBE_MAX_CNT 4 | |
| 99 | −#define BNXT_QPLIB_CRSBE_UNITS sizeof(struct bnxt_qplib_crsbe) | |
| 100 | −#define BNXT_QPLIB_CRSBE_CNT_PER_PG (PAGE_SIZE / BNXT_QPLIB_CRSBE_UNITS) | |
| 101 | − | |
| 102 | −#define MAX_CRSB_IDX (BNXT_QPLIB_CRSBE_MAX_CNT - 1) | |
| 103 | −#define MAX_CRSB_IDX_PER_PG (BNXT_QPLIB_CRSBE_CNT_PER_PG - 1) | |
| 104 | − | |
| 105 | −static inline u32 get_crsb_pg(u32 val) | |
| 106 | −{ | |
| 107 | − return (val & ~MAX_CRSB_IDX_PER_PG) / BNXT_QPLIB_CRSBE_CNT_PER_PG; | |
| 108 | −} | |
| 109 | − | |
| 110 | −static inline u32 get_crsb_idx(u32 val) | |
| 111 | −{ | |
| 112 | − return val & MAX_CRSB_IDX_PER_PG; | |
| 113 | −} | |
| 114 | − | |
| 115 | −static inline void bnxt_qplib_crsb_dma_next(dma_addr_t *pg_map_arr, | |
| 116 | − u32 prod, dma_addr_t *dma_addr) | |
| 117 | −{ | |
| 118 | − *dma_addr = pg_map_arr[(prod) / BNXT_QPLIB_CRSBE_CNT_PER_PG]; | |
| 119 | − *dma_addr += ((prod) % BNXT_QPLIB_CRSBE_CNT_PER_PG) * | |
| 120 | − BNXT_QPLIB_CRSBE_UNITS; | |
| 121 | −} | |
| 122 | − | |
| 123 | 98 | /* CREQ */ |
| 124 | 99 | /* Allocate 1 per QP for async error notification for now */ |
| 125 | 100 | #define BNXT_QPLIB_CREQE_MAX_CNT (64 * 1024) |
| @@ -158,17 +133,19 @@ static inline u32 get_creq_idx(u32 val) · 32 unmodified lines | ||
| 158 | 133 | #define CREQ_DB(db, raw_cons, cp_bit) \ |
| 159 | 134 | writel(CREQ_DB_CP_FLAGS | ((raw_cons) & ((cp_bit) - 1)), db) |
| 160 | 135 | |
| 136 | +#define CREQ_ENTRY_POLL_BUDGET 0x100 | |
| 137 | + | |
| 161 | 138 | /* HWQ */ |
| 162 | −struct bnxt_qplib_crsqe { | |
| 163 | − struct creq_qp_event qp_event; | |
| 139 | + | |
| 140 | +struct bnxt_qplib_crsq { | |
| 141 | + struct creq_qp_event *resp; | |
| 164 | 142 | u32 req_size; |
| 165 | 143 | }; |
| 166 | 144 | |
| 167 | −struct bnxt_qplib_crsq { | |
| 168 | − struct bnxt_qplib_crsqe *crsq; | |
| 169 | − u32 prod; | |
| 170 | − u32 cons; | |
| 171 | − u32 max_elements; | |
| 145 | +struct bnxt_qplib_rcfw_sbuf { | |
| 146 | + void *sb; | |
| 147 | + dma_addr_t dma_addr; | |
| 148 | + u32 size; | |
| 172 | 149 | }; |
| 173 | 150 | |
| 174 | 151 | /* RCFW Communication Channels */ |
| @@ -185,7 +162,7 @@ struct bnxt_qplib_rcfw { · 10 unmodified lines | ||
| 185 | 162 | wait_queue_head_t waitq; |
| 186 | 163 | int (*aeq_handler)(struct bnxt_qplib_rcfw *, |
| 187 | 164 | struct creq_func_event *); |
| 188 | − atomic_t seq_num; | |
| 165 | + u32 seq_num; | |
| 189 | 166 | |
| 190 | 167 | /* Bar region info */ |
| 191 | 168 | void __iomem *cmdq_bar_reg_iomem; |
| @@ -203,8 +180,7 @@ struct bnxt_qplib_rcfw { · 11 unmodified lines | ||
| 203 | 180 | |
| 204 | 181 | /* Actual Cmd and Resp Queues */ |
| 205 | 182 | struct bnxt_qplib_hwq cmdq; |
| 206 | − struct bnxt_qplib_crsq crsq; | |
| 207 | − struct bnxt_qplib_hwq crsb; | |
| 183 | + struct bnxt_qplib_crsq *crsqe_tbl; | |
| 208 | 184 | }; |
| 209 | 185 | |
| 210 | 186 | void bnxt_qplib_free_rcfw_channel(struct bnxt_qplib_rcfw *rcfw); |
| @@ -219,11 +195,14 @@ int bnxt_qplib_enable_rcfw_channel(struct pci_dev *pdev, · 8 unmodified lines | ||
| 219 | 195 | (struct bnxt_qplib_rcfw *, |
| 220 | 196 | struct creq_func_event *)); |
| 221 | 197 | |
| 222 | −int bnxt_qplib_rcfw_block_for_resp(struct bnxt_qplib_rcfw *rcfw, u16 cookie); | |
| 223 | −int bnxt_qplib_rcfw_wait_for_resp(struct bnxt_qplib_rcfw *rcfw, u16 cookie); | |
| 224 | −void *bnxt_qplib_rcfw_send_message(struct bnxt_qplib_rcfw *rcfw, | |
| 225 | − struct cmdq_base *req, void **crsbe, | |
| 226 | − u8 is_block); | |
| 198 | +struct bnxt_qplib_rcfw_sbuf *bnxt_qplib_rcfw_alloc_sbuf( | |
| 199 | + struct bnxt_qplib_rcfw *rcfw, | |
| 200 | + u32 size); | |
| 201 | +void bnxt_qplib_rcfw_free_sbuf(struct bnxt_qplib_rcfw *rcfw, | |
| 202 | + struct bnxt_qplib_rcfw_sbuf *sbuf); | |
| 203 | +int bnxt_qplib_rcfw_send_message(struct bnxt_qplib_rcfw *rcfw, | |
| 204 | + struct cmdq_base *req, struct creq_base *resp, | |
| 205 | + void *sbuf, u8 is_block); | |
| 227 | 206 | |
| 228 | 207 | int bnxt_qplib_deinit_rcfw(struct bnxt_qplib_rcfw *rcfw); |
| 229 | 208 | int bnxt_qplib_init_rcfw(struct bnxt_qplib_rcfw *rcfw, |
| @@ -48,6 +48,10 @@ extern const struct bnxt_qplib_gid bnxt_qplib_gid_zero; · 47 unmodified lines | ||
| 48 | 48 | |
| 49 | 49 | #define HWQ_CMP(idx, hwq) ((idx) & ((hwq)->max_elements - 1)) |
| 50 | 50 | |
| 51 | +#define HWQ_FREE_SLOTS(hwq) (hwq->max_elements - \ | |
| 52 | + ((HWQ_CMP(hwq->prod, hwq)\ | |
| 53 | + - HWQ_CMP(hwq->cons, hwq))\ | |
| 54 | + & (hwq->max_elements - 1))) | |
| 51 | 55 | enum bnxt_qplib_hwq_type { |
| 52 | 56 | HWQ_TYPE_CTX, |
| 53 | 57 | HWQ_TYPE_QUEUE, |
| @@ -55,37 +55,30 @@ int bnxt_qplib_get_dev_attr(struct bnxt_qplib_rcfw *rcfw, · 54 unmodified lines | ||
| 55 | 55 | struct bnxt_qplib_dev_attr *attr) |
| 56 | 56 | { |
| 57 | 57 | struct cmdq_query_func req; |
| 58 | − struct creq_query_func_resp *resp; | |
| 58 | + struct creq_query_func_resp resp; | |
| 59 | + struct bnxt_qplib_rcfw_sbuf *sbuf; | |
| 59 | 60 | struct creq_query_func_resp_sb *sb; |
| 60 | 61 | u16 cmd_flags = 0; |
| 61 | 62 | u32 temp; |
| 62 | 63 | u8 *tqm_alloc; |
| 63 | − int i; | |
| 64 | + int i, rc = 0; | |
| 64 | 65 | |
| 65 | 66 | RCFW_CMD_PREP(req, QUERY_FUNC, cmd_flags); |
| 66 | 67 | |
| 67 | − req.resp_size = sizeof(*sb) / BNXT_QPLIB_CMDQE_UNITS; | |
| 68 | − resp = (struct creq_query_func_resp *) | |
| 69 | − bnxt_qplib_rcfw_send_message(rcfw, (void *)&req, (void **)&sb, | |
| 70 | − 0); | |
| 71 | − if (!resp) { | |
| 72 | − dev_err(&rcfw->pdev->dev, "QPLIB: SP: QUERY_FUNC send failed"); | |
| 73 | − return -EINVAL; | |
| 74 | − } | |
| 75 | − if (!bnxt_qplib_rcfw_wait_for_resp(rcfw, le16_to_cpu(req.cookie))) { | |
| 76 | − /* Cmd timed out */ | |
| 77 | − dev_err(&rcfw->pdev->dev, "QPLIB: SP: QUERY_FUNC timed out"); | |
| 78 | − return -ETIMEDOUT; | |
| 79 | − } | |
| 80 | − if (resp->status || | |
| 81 | − le16_to_cpu(resp->cookie) != le16_to_cpu(req.cookie)) { | |
| 82 | − dev_err(&rcfw->pdev->dev, "QPLIB: SP: QUERY_FUNC failed "); | |
| 68 | + sbuf = bnxt_qplib_rcfw_alloc_sbuf(rcfw, sizeof(*sb)); | |
| 69 | + if (!sbuf) { | |
| 83 | 70 | dev_err(&rcfw->pdev->dev, |
| 84 | − "QPLIB: with status 0x%x cmdq 0x%x resp 0x%x", | |
| 85 | − resp->status, le16_to_cpu(req.cookie), | |
| 86 | − le16_to_cpu(resp->cookie)); | |
| 87 | − return -EINVAL; | |
| 71 | + "QPLIB: SP: QUERY_FUNC alloc side buffer failed"); | |
| 72 | + return -ENOMEM; | |
| 88 | 73 | } |
| 74 | + | |
| 75 | + sb = sbuf->sb; | |
| 76 | + req.resp_size = sizeof(*sb) / BNXT_QPLIB_CMDQE_UNITS; | |
| 77 | + rc = bnxt_qplib_rcfw_send_message(rcfw, (void *)&req, (void *)&resp, | |
| 78 | + (void *)sbuf, 0); | |
| 79 | + if (rc) | |
| 80 | + goto bail; | |
| 81 | + | |
| 89 | 82 | /* Extract the context from the side buffer */ |
| 90 | 83 | attr->max_qp = le32_to_cpu(sb->max_qp); |
| 91 | 84 | attr->max_qp_rd_atom = |
| @@ -95,6 +88,11 @@ int bnxt_qplib_get_dev_attr(struct bnxt_qplib_rcfw *rcfw, · 3 unmodified lines | ||
| 95 | 88 | sb->max_qp_init_rd_atom > BNXT_QPLIB_MAX_OUT_RD_ATOM ? |
| 96 | 89 | BNXT_QPLIB_MAX_OUT_RD_ATOM : sb->max_qp_init_rd_atom; |
| 97 | 90 | attr->max_qp_wqes = le16_to_cpu(sb->max_qp_wr); |
| 91 | + /* | |
| 92 | + * 128 WQEs needs to be reserved for the HW (8916). Prevent | |
| 93 | + * reporting the max number | |
| 94 | + */ | |
| 95 | + attr->max_qp_wqes -= BNXT_QPLIB_RESERVED_QP_WRS; | |
| 98 | 96 | attr->max_qp_sges = sb->max_sge; |
| 99 | 97 | attr->max_cq = le32_to_cpu(sb->max_cq); |
| 100 | 98 | attr->max_cq_wqes = le32_to_cpu(sb->max_cqe); |
| @@ -130,7 +128,10 @@ int bnxt_qplib_get_dev_attr(struct bnxt_qplib_rcfw *rcfw, · 29 unmodified lines | ||
| 130 | 128 | attr->tqm_alloc_reqs[i * 4 + 2] = *(++tqm_alloc); |
| 131 | 129 | attr->tqm_alloc_reqs[i * 4 + 3] = *(++tqm_alloc); |
| 132 | 130 | } |
| 133 | − return 0; | |
| 131 | + | |
| 132 | +bail: | |
| 133 | + bnxt_qplib_rcfw_free_sbuf(rcfw, sbuf); | |
| 134 | + return rc; | |
| 134 | 135 | } |
| 135 | 136 | |
| 136 | 137 | /* SGID */ |
| @@ -178,8 +179,9 @@ int bnxt_qplib_del_sgid(struct bnxt_qplib_sgid_tbl *sgid_tbl, · 41 unmodified lines | ||
| 178 | 179 | /* Remove GID from the SGID table */ |
| 179 | 180 | if (update) { |
| 180 | 181 | struct cmdq_delete_gid req; |
| 181 | − struct creq_delete_gid_resp *resp; | |
| 182 | + struct creq_delete_gid_resp resp; | |
| 182 | 183 | u16 cmd_flags = 0; |
| 184 | + int rc; | |
| 183 | 185 | |
| 184 | 186 | RCFW_CMD_PREP(req, DELETE_GID, cmd_flags); |
| 185 | 187 | if (sgid_tbl->hw_id[index] == 0xFFFF) { |
| @@ -188,31 +190,10 @@ int bnxt_qplib_del_sgid(struct bnxt_qplib_sgid_tbl *sgid_tbl, · 2 unmodified lines | ||
| 188 | 190 | return -EINVAL; |
| 189 | 191 | } |
| 190 | 192 | req.gid_index = cpu_to_le16(sgid_tbl->hw_id[index]); |
| 191 | − resp = (struct creq_delete_gid_resp *) | |
| 192 | − bnxt_qplib_rcfw_send_message(rcfw, (void *)&req, NULL, | |
| 193 | − 0); | |
| 194 | − if (!resp) { | |
| 195 | − dev_err(&res->pdev->dev, | |
| 196 | − "QPLIB: SP: DELETE_GID send failed"); | |
| 197 | − return -EINVAL; | |
| 198 | − } | |
| 199 | − if (!bnxt_qplib_rcfw_wait_for_resp(rcfw, | |
| 200 | − le16_to_cpu(req.cookie))) { | |
| 201 | − /* Cmd timed out */ | |
| 202 | − dev_err(&res->pdev->dev, | |
| 203 | − "QPLIB: SP: DELETE_GID timed out"); | |
| 204 | − return -ETIMEDOUT; | |
| 205 | − } | |
| 206 | − if (resp->status || | |
| 207 | − le16_to_cpu(resp->cookie) != le16_to_cpu(req.cookie)) { | |
| 208 | − dev_err(&res->pdev->dev, | |
| 209 | − "QPLIB: SP: DELETE_GID failed "); | |
| 210 | − dev_err(&res->pdev->dev, | |
| 211 | − "QPLIB: with status 0x%x cmdq 0x%x resp 0x%x", | |
| 212 | − resp->status, le16_to_cpu(req.cookie), | |
| 213 | − le16_to_cpu(resp->cookie)); | |
| 214 | − return -EINVAL; | |
| 215 | − } | |
| 193 | + rc = bnxt_qplib_rcfw_send_message(rcfw, (void *)&req, | |
| 194 | + (void *)&resp, NULL, 0); | |
| 195 | + if (rc) | |
| 196 | + return rc; | |
| 216 | 197 | } |
| 217 | 198 | memcpy(&sgid_tbl->tbl[index], &bnxt_qplib_gid_zero, |
| 218 | 199 | sizeof(bnxt_qplib_gid_zero)); |
| @@ -234,7 +215,7 @@ int bnxt_qplib_add_sgid(struct bnxt_qplib_sgid_tbl *sgid_tbl, · 15 unmodified lines | ||
| 234 | 215 | struct bnxt_qplib_res, |
| 235 | 216 | sgid_tbl); |
| 236 | 217 | struct bnxt_qplib_rcfw *rcfw = res->rcfw; |
| 237 | − int i, free_idx, rc = 0; | |
| 218 | + int i, free_idx; | |
| 238 | 219 | |
| 239 | 220 | if (!sgid_tbl) { |
| 240 | 221 | dev_err(&res->pdev->dev, "QPLIB: SGID table not allocated"); |
| @@ -266,10 +247,11 @@ int bnxt_qplib_add_sgid(struct bnxt_qplib_sgid_tbl *sgid_tbl, · 25 unmodified lines | ||
| 266 | 247 | } |
| 267 | 248 | if (update) { |
| 268 | 249 | struct cmdq_add_gid req; |
| 269 | − struct creq_add_gid_resp *resp; | |
| 250 | + struct creq_add_gid_resp resp; | |
| 270 | 251 | u16 cmd_flags = 0; |
| 271 | 252 | u32 temp32[4]; |
| 272 | 253 | u16 temp16[3]; |
| 254 | + int rc; | |
| 273 | 255 | |
| 274 | 256 | RCFW_CMD_PREP(req, ADD_GID, cmd_flags); |
| 275 | 257 | |
| @@ -290,31 +272,11 @@ int bnxt_qplib_add_sgid(struct bnxt_qplib_sgid_tbl *sgid_tbl, · 14 unmodified lines | ||
| 290 | 272 | req.src_mac[1] = cpu_to_be16(temp16[1]); |
| 291 | 273 | req.src_mac[2] = cpu_to_be16(temp16[2]); |
| 292 | 274 | |
| 293 | − resp = (struct creq_add_gid_resp *) | |
| 294 | − bnxt_qplib_rcfw_send_message(rcfw, (void *)&req, | |
| 295 | − NULL, 0); | |
| 296 | − if (!resp) { | |
| 297 | − dev_err(&res->pdev->dev, | |
| 298 | − "QPLIB: SP: ADD_GID send failed"); | |
| 299 | − return -EINVAL; | |
| 300 | − } | |
| 301 | − if (!bnxt_qplib_rcfw_wait_for_resp(rcfw, | |
| 302 | − le16_to_cpu(req.cookie))) { | |
| 303 | − /* Cmd timed out */ | |
| 304 | − dev_err(&res->pdev->dev, | |
| 305 | − "QPIB: SP: ADD_GID timed out"); | |
| 306 | − return -ETIMEDOUT; | |
| 307 | − } | |
| 308 | − if (resp->status || | |
| 309 | − le16_to_cpu(resp->cookie) != le16_to_cpu(req.cookie)) { | |
| 310 | − dev_err(&res->pdev->dev, "QPLIB: SP: ADD_GID failed "); | |
| 311 | − dev_err(&res->pdev->dev, | |
| 312 | − "QPLIB: with status 0x%x cmdq 0x%x resp 0x%x", | |
| 313 | − resp->status, le16_to_cpu(req.cookie), | |
| 314 | − le16_to_cpu(resp->cookie)); | |
| 315 | − return -EINVAL; | |
| 316 | − } | |
| 317 | − sgid_tbl->hw_id[free_idx] = le32_to_cpu(resp->xid); | |
| 275 | + rc = bnxt_qplib_rcfw_send_message(rcfw, (void *)&req, | |
| 276 | + (void *)&resp, NULL, 0); | |
| 277 | + if (rc) | |
| 278 | + return rc; | |
| 279 | + sgid_tbl->hw_id[free_idx] = le32_to_cpu(resp.xid); | |
| 318 | 280 | } |
| 319 | 281 | /* Add GID to the sgid_tbl */ |
| 320 | 282 | memcpy(&sgid_tbl->tbl[free_idx], gid, sizeof(*gid)); |
| @@ -325,7 +287,7 @@ int bnxt_qplib_add_sgid(struct bnxt_qplib_sgid_tbl *sgid_tbl, · 4 unmodified lines | ||
| 325 | 287 | |
| 326 | 288 | *index = free_idx; |
| 327 | 289 | /* unlock */ |
| 328 | − return rc; | |
| 290 | + return 0; | |
| 329 | 291 | } |
| 330 | 292 | |
| 331 | 293 | /* pkeys */ |
| @@ -422,10 +384,11 @@ int bnxt_qplib_create_ah(struct bnxt_qplib_res *res, struct bnxt_qplib_ah *ah) · 90 unmodified lines | ||
| 422 | 384 | { |
| 423 | 385 | struct bnxt_qplib_rcfw *rcfw = res->rcfw; |
| 424 | 386 | struct cmdq_create_ah req; |
| 425 | − struct creq_create_ah_resp *resp; | |
| 387 | + struct creq_create_ah_resp resp; | |
| 426 | 388 | u16 cmd_flags = 0; |
| 427 | 389 | u32 temp32[4]; |
| 428 | 390 | u16 temp16[3]; |
| 391 | + int rc; | |
| 429 | 392 | |
| 430 | 393 | RCFW_CMD_PREP(req, CREATE_AH, cmd_flags); |
| 431 | 394 | |
| @@ -450,28 +413,12 @@ int bnxt_qplib_create_ah(struct bnxt_qplib_res *res, struct bnxt_qplib_ah *ah) · 18 unmodified lines | ||
| 450 | 413 | req.dest_mac[1] = cpu_to_le16(temp16[1]); |
| 451 | 414 | req.dest_mac[2] = cpu_to_le16(temp16[2]); |
| 452 | 415 | |
| 453 | − resp = (struct creq_create_ah_resp *) | |
| 454 | − bnxt_qplib_rcfw_send_message(rcfw, (void *)&req, | |
| 455 | − NULL, 1); | |
| 456 | − if (!resp) { | |
| 457 | − dev_err(&rcfw->pdev->dev, "QPLIB: SP: CREATE_AH send failed"); | |
| 458 | − return -EINVAL; | |
| 459 | − } | |
| 460 | − if (!bnxt_qplib_rcfw_block_for_resp(rcfw, le16_to_cpu(req.cookie))) { | |
| 461 | − /* Cmd timed out */ | |
| 462 | − dev_err(&rcfw->pdev->dev, "QPLIB: SP: CREATE_AH timed out"); | |
| 463 | − return -ETIMEDOUT; | |
| 464 | − } | |
| 465 | − if (resp->status || | |
| 466 | − le16_to_cpu(resp->cookie) != le16_to_cpu(req.cookie)) { | |
| 467 | − dev_err(&rcfw->pdev->dev, "QPLIB: SP: CREATE_AH failed "); | |
| 468 | − dev_err(&rcfw->pdev->dev, | |
| 469 | − "QPLIB: with status 0x%x cmdq 0x%x resp 0x%x", | |
| 470 | − resp->status, le16_to_cpu(req.cookie), | |
| 471 | − le16_to_cpu(resp->cookie)); | |
| 472 | − return -EINVAL; | |
| 473 | − } | |
| 474 | − ah->id = le32_to_cpu(resp->xid); | |
| 416 | + rc = bnxt_qplib_rcfw_send_message(rcfw, (void *)&req, (void *)&resp, | |
| 417 | + NULL, 1); | |
| 418 | + if (rc) | |
| 419 | + return rc; | |
| 420 | + | |
| 421 | + ah->id = le32_to_cpu(resp.xid); | |
| 475 | 422 | return 0; |
| 476 | 423 | } |
| 477 | 424 | |
| @@ -479,35 +426,19 @@ int bnxt_qplib_destroy_ah(struct bnxt_qplib_res *res, struct bnxt_qplib_ah *ah) · 1 unmodified line | ||
| 479 | 426 | { |
| 480 | 427 | struct bnxt_qplib_rcfw *rcfw = res->rcfw; |
| 481 | 428 | struct cmdq_destroy_ah req; |
| 482 | − struct creq_destroy_ah_resp *resp; | |
| 429 | + struct creq_destroy_ah_resp resp; | |
| 483 | 430 | u16 cmd_flags = 0; |
| 431 | + int rc; | |
| 484 | 432 | |
| 485 | 433 | /* Clean up the AH table in the device */ |
| 486 | 434 | RCFW_CMD_PREP(req, DESTROY_AH, cmd_flags); |
| 487 | 435 | |
| 488 | 436 | req.ah_cid = cpu_to_le32(ah->id); |
| 489 | 437 | |
| 490 | − resp = (struct creq_destroy_ah_resp *) | |
| 491 | − bnxt_qplib_rcfw_send_message(rcfw, (void *)&req, | |
| 492 | − NULL, 1); | |
| 493 | − if (!resp) { | |
| 494 | − dev_err(&rcfw->pdev->dev, "QPLIB: SP: DESTROY_AH send failed"); | |
| 495 | − return -EINVAL; | |
| 496 | − } | |
| 497 | − if (!bnxt_qplib_rcfw_block_for_resp(rcfw, le16_to_cpu(req.cookie))) { | |
| 498 | − /* Cmd timed out */ | |
| 499 | − dev_err(&rcfw->pdev->dev, "QPLIB: SP: DESTROY_AH timed out"); | |
| 500 | − return -ETIMEDOUT; | |
| 501 | − } | |
| 502 | − if (resp->status || | |
| 503 | − le16_to_cpu(resp->cookie) != le16_to_cpu(req.cookie)) { | |
| 504 | − dev_err(&rcfw->pdev->dev, "QPLIB: SP: DESTROY_AH failed "); | |
| 505 | − dev_err(&rcfw->pdev->dev, | |
| 506 | − "QPLIB: with status 0x%x cmdq 0x%x resp 0x%x", | |
| 507 | − resp->status, le16_to_cpu(req.cookie), | |
| 508 | − le16_to_cpu(resp->cookie)); | |
| 509 | − return -EINVAL; | |
| 510 | − } | |
| 438 | + rc = bnxt_qplib_rcfw_send_message(rcfw, (void *)&req, (void *)&resp, | |
| 439 | + NULL, 1); | |
| 440 | + if (rc) | |
| 441 | + return rc; | |
| 511 | 442 | return 0; |
| 512 | 443 | } |
| 513 | 444 | |
| @@ -516,8 +447,9 @@ int bnxt_qplib_free_mrw(struct bnxt_qplib_res *res, struct bnxt_qplib_mrw *mrw) · 2 unmodified lines | ||
| 516 | 447 | { |
| 517 | 448 | struct bnxt_qplib_rcfw *rcfw = res->rcfw; |
| 518 | 449 | struct cmdq_deallocate_key req; |
| 519 | − struct creq_deallocate_key_resp *resp; | |
| 450 | + struct creq_deallocate_key_resp resp; | |
| 520 | 451 | u16 cmd_flags = 0; |
| 452 | + int rc; | |
| 521 | 453 | |
| 522 | 454 | if (mrw->lkey == 0xFFFFFFFF) { |
| 523 | 455 | dev_info(&res->pdev->dev, |
| @@ -536,27 +468,11 @@ int bnxt_qplib_free_mrw(struct bnxt_qplib_res *res, struct bnxt_qplib_mrw *mrw) · 12 unmodified lines | ||
| 536 | 468 | else |
| 537 | 469 | req.key = cpu_to_le32(mrw->lkey); |
| 538 | 470 | |
| 539 | − resp = (struct creq_deallocate_key_resp *) | |
| 540 | − bnxt_qplib_rcfw_send_message(rcfw, (void *)&req, | |
| 541 | − NULL, 0); | |
| 542 | − if (!resp) { | |
| 543 | − dev_err(&res->pdev->dev, "QPLIB: SP: FREE_MR send failed"); | |
| 544 | − return -EINVAL; | |
| 545 | − } | |
| 546 | − if (!bnxt_qplib_rcfw_wait_for_resp(rcfw, le16_to_cpu(req.cookie))) { | |
| 547 | − /* Cmd timed out */ | |
| 548 | − dev_err(&res->pdev->dev, "QPLIB: SP: FREE_MR timed out"); | |
| 549 | − return -ETIMEDOUT; | |
| 550 | − } | |
| 551 | − if (resp->status || | |
| 552 | − le16_to_cpu(resp->cookie) != le16_to_cpu(req.cookie)) { | |
| 553 | − dev_err(&res->pdev->dev, "QPLIB: SP: FREE_MR failed "); | |
| 554 | − dev_err(&res->pdev->dev, | |
| 555 | − "QPLIB: with status 0x%x cmdq 0x%x resp 0x%x", | |
| 556 | − resp->status, le16_to_cpu(req.cookie), | |
| 557 | − le16_to_cpu(resp->cookie)); | |
| 558 | − return -EINVAL; | |
| 559 | − } | |
| 471 | + rc = bnxt_qplib_rcfw_send_message(rcfw, (void *)&req, (void *)&resp, | |
| 472 | + NULL, 0); | |
| 473 | + if (rc) | |
| 474 | + return rc; | |
| 475 | + | |
| 560 | 476 | /* Free the qplib's MRW memory */ |
| 561 | 477 | if (mrw->hwq.max_elements) |
| 562 | 478 | bnxt_qplib_free_hwq(res->pdev, &mrw->hwq); |
| @@ -568,9 +484,10 @@ int bnxt_qplib_alloc_mrw(struct bnxt_qplib_res *res, struct bnxt_qplib_mrw *mrw) · 5 unmodified lines | ||
| 568 | 484 | { |
| 569 | 485 | struct bnxt_qplib_rcfw *rcfw = res->rcfw; |
| 570 | 486 | struct cmdq_allocate_mrw req; |
| 571 | − struct creq_allocate_mrw_resp *resp; | |
| 487 | + struct creq_allocate_mrw_resp resp; | |
| 572 | 488 | u16 cmd_flags = 0; |
| 573 | 489 | unsigned long tmp; |
| 490 | + int rc; | |
| 574 | 491 | |
| 575 | 492 | RCFW_CMD_PREP(req, ALLOCATE_MRW, cmd_flags); |
| 576 | 493 | |
| @@ -584,33 +501,17 @@ int bnxt_qplib_alloc_mrw(struct bnxt_qplib_res *res, struct bnxt_qplib_mrw *mrw) · 7 unmodified lines | ||
| 584 | 501 | tmp = (unsigned long)mrw; |
| 585 | 502 | req.mrw_handle = cpu_to_le64(tmp); |
| 586 | 503 | |
| 587 | − resp = (struct creq_allocate_mrw_resp *) | |
| 588 | − bnxt_qplib_rcfw_send_message(rcfw, (void *)&req, | |
| 589 | − NULL, 0); | |
| 590 | − if (!resp) { | |
| 591 | − dev_err(&rcfw->pdev->dev, "QPLIB: SP: ALLOC_MRW send failed"); | |
| 592 | − return -EINVAL; | |
| 593 | − } | |
| 594 | − if (!bnxt_qplib_rcfw_wait_for_resp(rcfw, le16_to_cpu(req.cookie))) { | |
| 595 | − /* Cmd timed out */ | |
| 596 | − dev_err(&rcfw->pdev->dev, "QPLIB: SP: ALLOC_MRW timed out"); | |
| 597 | − return -ETIMEDOUT; | |
| 598 | − } | |
| 599 | − if (resp->status || | |
| 600 | − le16_to_cpu(resp->cookie) != le16_to_cpu(req.cookie)) { | |
| 601 | − dev_err(&rcfw->pdev->dev, "QPLIB: SP: ALLOC_MRW failed "); | |
| 602 | − dev_err(&rcfw->pdev->dev, | |
| 603 | − "QPLIB: with status 0x%x cmdq 0x%x resp 0x%x", | |
| 604 | − resp->status, le16_to_cpu(req.cookie), | |
| 605 | − le16_to_cpu(resp->cookie)); | |
| 606 | − return -EINVAL; | |
| 607 | − } | |
| 504 | + rc = bnxt_qplib_rcfw_send_message(rcfw, (void *)&req, | |
| 505 | + (void *)&resp, NULL, 0); | |
| 506 | + if (rc) | |
| 507 | + return rc; | |
| 508 | + | |
| 608 | 509 | if ((mrw->type == CMDQ_ALLOCATE_MRW_MRW_FLAGS_MW_TYPE1) || |
| 609 | 510 | (mrw->type == CMDQ_ALLOCATE_MRW_MRW_FLAGS_MW_TYPE2A) || |
| 610 | 511 | (mrw->type == CMDQ_ALLOCATE_MRW_MRW_FLAGS_MW_TYPE2B)) |
| 611 | − mrw->rkey = le32_to_cpu(resp->xid); | |
| 512 | + mrw->rkey = le32_to_cpu(resp.xid); | |
| 612 | 513 | else |
| 613 | − mrw->lkey = le32_to_cpu(resp->xid); | |
| 514 | + mrw->lkey = le32_to_cpu(resp.xid); | |
| 614 | 515 | return 0; |
| 615 | 516 | } |
| 616 | 517 | |
| @@ -619,40 +520,17 @@ int bnxt_qplib_dereg_mrw(struct bnxt_qplib_res *res, struct bnxt_qplib_mrw *mrw, · 2 unmodified lines | ||
| 619 | 520 | { |
| 620 | 521 | struct bnxt_qplib_rcfw *rcfw = res->rcfw; |
| 621 | 522 | struct cmdq_deregister_mr req; |
| 622 | − struct creq_deregister_mr_resp *resp; | |
| 523 | + struct creq_deregister_mr_resp resp; | |
| 623 | 524 | u16 cmd_flags = 0; |
| 624 | 525 | int rc; |
| 625 | 526 | |
| 626 | 527 | RCFW_CMD_PREP(req, DEREGISTER_MR, cmd_flags); |
| 627 | 528 | |
| 628 | 529 | req.lkey = cpu_to_le32(mrw->lkey); |
| 629 | − resp = (struct creq_deregister_mr_resp *) | |
| 630 | − bnxt_qplib_rcfw_send_message(rcfw, (void *)&req, | |
| 631 | − NULL, block); | |
| 632 | − if (!resp) { | |
| 633 | − dev_err(&rcfw->pdev->dev, "QPLIB: SP: DEREG_MR send failed"); | |
| 634 | − return -EINVAL; | |
| 635 | − } | |
| 636 | − if (block) | |
| 637 | − rc = bnxt_qplib_rcfw_block_for_resp(rcfw, | |
| 638 | − le16_to_cpu(req.cookie)); | |
| 639 | − else | |
| 640 | − rc = bnxt_qplib_rcfw_wait_for_resp(rcfw, | |
| 641 | − le16_to_cpu(req.cookie)); | |
| 642 | − if (!rc) { | |
| 643 | − /* Cmd timed out */ | |
| 644 | − dev_err(&res->pdev->dev, "QPLIB: SP: DEREG_MR timed out"); | |
| 645 | − return -ETIMEDOUT; | |
| 646 | − } | |
| 647 | − if (resp->status || | |
| 648 | − le16_to_cpu(resp->cookie) != le16_to_cpu(req.cookie)) { | |
| 649 | − dev_err(&rcfw->pdev->dev, "QPLIB: SP: DEREG_MR failed "); | |
| 650 | − dev_err(&rcfw->pdev->dev, | |
| 651 | − "QPLIB: with status 0x%x cmdq 0x%x resp 0x%x", | |
| 652 | − resp->status, le16_to_cpu(req.cookie), | |
| 653 | − le16_to_cpu(resp->cookie)); | |
| 654 | − return -EINVAL; | |
| 655 | − } | |
| 530 | + rc = bnxt_qplib_rcfw_send_message(rcfw, (void *)&req, | |
| 531 | + (void *)&resp, NULL, block); | |
| 532 | + if (rc) | |
| 533 | + return rc; | |
| 656 | 534 | |
| 657 | 535 | /* Free the qplib's MR memory */ |
| 658 | 536 | if (mrw->hwq.max_elements) { |
| @@ -669,7 +547,7 @@ int bnxt_qplib_reg_mr(struct bnxt_qplib_res *res, struct bnxt_qplib_mrw *mr, · 10 unmodified lines | ||
| 669 | 547 | { |
| 670 | 548 | struct bnxt_qplib_rcfw *rcfw = res->rcfw; |
| 671 | 549 | struct cmdq_register_mr req; |
| 672 | − struct creq_register_mr_resp *resp; | |
| 550 | + struct creq_register_mr_resp resp; | |
| 673 | 551 | u16 cmd_flags = 0, level; |
| 674 | 552 | int pg_ptrs, pages, i, rc; |
| 675 | 553 | dma_addr_t **pbl_ptr; |
| @@ -730,36 +608,11 @@ int bnxt_qplib_reg_mr(struct bnxt_qplib_res *res, struct bnxt_qplib_mrw *mr, · 54 unmodified lines | ||
| 730 | 608 | req.key = cpu_to_le32(mr->lkey); |
| 731 | 609 | req.mr_size = cpu_to_le64(mr->total_size); |
| 732 | 610 | |
| 733 | − resp = (struct creq_register_mr_resp *) | |
| 734 | − bnxt_qplib_rcfw_send_message(rcfw, (void *)&req, | |
| 735 | − NULL, block); | |
| 736 | − if (!resp) { | |
| 737 | − dev_err(&res->pdev->dev, "SP: REG_MR send failed"); | |
| 738 | − rc = -EINVAL; | |
| 739 | − goto fail; | |
| 740 | − } | |
| 741 | − if (block) | |
| 742 | − rc = bnxt_qplib_rcfw_block_for_resp(rcfw, | |
| 743 | − le16_to_cpu(req.cookie)); | |
| 744 | − else | |
| 745 | − rc = bnxt_qplib_rcfw_wait_for_resp(rcfw, | |
| 746 | − le16_to_cpu(req.cookie)); | |
| 747 | − if (!rc) { | |
| 748 | − /* Cmd timed out */ | |
| 749 | − dev_err(&res->pdev->dev, "SP: REG_MR timed out"); | |
| 750 | − rc = -ETIMEDOUT; | |
| 751 | − goto fail; | |
| 752 | − } | |
| 753 | − if (resp->status || | |
| 754 | − le16_to_cpu(resp->cookie) != le16_to_cpu(req.cookie)) { | |
| 755 | − dev_err(&res->pdev->dev, "QPLIB: SP: REG_MR failed "); | |
| 756 | − dev_err(&res->pdev->dev, | |
| 757 | − "QPLIB: SP: with status 0x%x cmdq 0x%x resp 0x%x", | |
| 758 | − resp->status, le16_to_cpu(req.cookie), | |
| 759 | − le16_to_cpu(resp->cookie)); | |
| 760 | − rc = -EINVAL; | |
| 611 | + rc = bnxt_qplib_rcfw_send_message(rcfw, (void *)&req, | |
| 612 | + (void *)&resp, NULL, block); | |
| 613 | + if (rc) | |
| 761 | 614 | goto fail; |
| 762 | − } | |
| 615 | + | |
| 763 | 616 | return 0; |
| 764 | 617 | |
| 765 | 618 | fail: |
| @@ -804,35 +657,15 @@ int bnxt_qplib_map_tc2cos(struct bnxt_qplib_res *res, u16 *cids) · 38 unmodified lines | ||
| 804 | 657 | { |
| 805 | 658 | struct bnxt_qplib_rcfw *rcfw = res->rcfw; |
| 806 | 659 | struct cmdq_map_tc_to_cos req; |
| 807 | − struct creq_map_tc_to_cos_resp *resp; | |
| 660 | + struct creq_map_tc_to_cos_resp resp; | |
| 808 | 661 | u16 cmd_flags = 0; |
| 809 | − int tleft; | |
| 662 | + int rc = 0; | |
| 810 | 663 | |
| 811 | 664 | RCFW_CMD_PREP(req, MAP_TC_TO_COS, cmd_flags); |
| 812 | 665 | req.cos0 = cpu_to_le16(cids[0]); |
| 813 | 666 | req.cos1 = cpu_to_le16(cids[1]); |
| 814 | 667 | |
| 815 | − resp = bnxt_qplib_rcfw_send_message(rcfw, (void *)&req, NULL, 0); | |
| 816 | − if (!resp) { | |
| 817 | − dev_err(&res->pdev->dev, "QPLIB: SP: MAP_TC2COS send failed"); | |
| 818 | − return -EINVAL; | |
| 819 | − } | |
| 820 | − | |
| 821 | − tleft = bnxt_qplib_rcfw_block_for_resp(rcfw, le16_to_cpu(req.cookie)); | |
| 822 | − if (!tleft) { | |
| 823 | − dev_err(&res->pdev->dev, "QPLIB: SP: MAP_TC2COS timed out"); | |
| 824 | − return -ETIMEDOUT; | |
| 825 | − } | |
| 826 | − | |
| 827 | − if (resp->status || | |
| 828 | − le16_to_cpu(resp->cookie) != le16_to_cpu(req.cookie)) { | |
| 829 | − dev_err(&res->pdev->dev, "QPLIB: SP: MAP_TC2COS failed "); | |
| 830 | − dev_err(&res->pdev->dev, | |
| 831 | − "QPLIB: with status 0x%x cmdq 0x%x resp 0x%x", | |
| 832 | − resp->status, le16_to_cpu(req.cookie), | |
| 833 | − le16_to_cpu(resp->cookie)); | |
| 834 | − return -EINVAL; | |
| 835 | − } | |
| 836 | − | |
| 668 | + rc = bnxt_qplib_rcfw_send_message(rcfw, (void *)&req, | |
| 669 | + (void *)&resp, NULL, 0); | |
| 837 | 670 | return 0; |
| 838 | 671 | } |
| @@ -40,6 +40,8 @@ · 39 unmodified lines | ||
| 40 | 40 | #ifndef __BNXT_QPLIB_SP_H__ |
| 41 | 41 | #define __BNXT_QPLIB_SP_H__ |
| 42 | 42 | |
| 43 | +#define BNXT_QPLIB_RESERVED_QP_WRS 128 | |
| 44 | + | |
| 43 | 45 | struct bnxt_qplib_dev_attr { |
| 44 | 46 | char fw_ver[32]; |
| 45 | 47 | u16 max_sgid; |
| @@ -488,6 +488,7 @@ static int _put_ep_safe(struct c4iw_dev *dev, struct sk_buff *skb) · 487 unmodified lines | ||
| 488 | 488 | |
| 489 | 489 | ep = *((struct c4iw_ep **)(skb->cb + 2 * sizeof(void *))); |
| 490 | 490 | release_ep_resources(ep); |
| 491 | + kfree_skb(skb); | |
| 491 | 492 | return 0; |
| 492 | 493 | } |
| 493 | 494 | |
| @@ -498,6 +499,7 @@ static int _put_pass_ep_safe(struct c4iw_dev *dev, struct sk_buff *skb) · 4 unmodified lines | ||
| 498 | 499 | ep = *((struct c4iw_ep **)(skb->cb + 2 * sizeof(void *))); |
| 499 | 500 | c4iw_put_ep(&ep->parent_ep->com); |
| 500 | 501 | release_ep_resources(ep); |
| 502 | + kfree_skb(skb); | |
| 501 | 503 | return 0; |
| 502 | 504 | } |
| 503 | 505 | |
| @@ -569,11 +571,13 @@ static void abort_arp_failure(void *handle, struct sk_buff *skb) · 65 unmodified lines | ||
| 569 | 571 | |
| 570 | 572 | pr_debug("%s rdev %p\n", __func__, rdev); |
| 571 | 573 | req->cmd = CPL_ABORT_NO_RST; |
| 574 | + skb_get(skb); | |
| 572 | 575 | ret = c4iw_ofld_send(rdev, skb); |
| 573 | 576 | if (ret) { |
| 574 | 577 | __state_set(&ep->com, DEAD); |
| 575 | 578 | queue_arp_failure_cpl(ep, skb, FAKE_CPL_PUT_EP_SAFE); |
| 576 | − } | |
| 579 | + } else | |
| 580 | + kfree_skb(skb); | |
| 577 | 581 | } |
| 578 | 582 | |
| 579 | 583 | static int send_flowc(struct c4iw_ep *ep) |
| @@ -2517,7 +2521,8 @@ static int pass_accept_req(struct c4iw_dev *dev, struct sk_buff *skb) · 1937 unmodified lines | ||
| 2517 | 2521 | goto reject; |
| 2518 | 2522 | } |
| 2519 | 2523 | |
| 2520 | − hdrs = sizeof(struct iphdr) + sizeof(struct tcphdr) + | |
| 2524 | + hdrs = ((iptype == 4) ? sizeof(struct iphdr) : sizeof(struct ipv6hdr)) + | |
| 2525 | + sizeof(struct tcphdr) + | |
| 2521 | 2526 | ((enable_tcp_timestamps && req->tcpopt.tstamp) ? 12 : 0); |
| 2522 | 2527 | if (peer_mss && child_ep->mtu > (peer_mss + hdrs)) |
| 2523 | 2528 | child_ep->mtu = peer_mss + hdrs; |
| @@ -767,7 +767,7 @@ void c4iw_release_dev_ucontext(struct c4iw_rdev *rdev, · 766 unmodified lines | ||
| 767 | 767 | kfree(entry); |
| 768 | 768 | } |
| 769 | 769 | |
| 770 | − list_for_each_safe(pos, nxt, &uctx->qpids) { | |
| 770 | + list_for_each_safe(pos, nxt, &uctx->cqids) { | |
| 771 | 771 | entry = list_entry(pos, struct c4iw_qid_list, entry); |
| 772 | 772 | list_del_init(&entry->entry); |
| 773 | 773 | kfree(entry); |
| @@ -880,13 +880,15 @@ static int c4iw_rdev_open(struct c4iw_rdev *rdev) · 106 unmodified lines | ||
| 880 | 880 | rdev->free_workq = create_singlethread_workqueue("iw_cxgb4_free"); |
| 881 | 881 | if (!rdev->free_workq) { |
| 882 | 882 | err = -ENOMEM; |
| 883 | − goto err_free_status_page; | |
| 883 | + goto err_free_status_page_and_wr_log; | |
| 884 | 884 | } |
| 885 | 885 | |
| 886 | 886 | rdev->status_page->db_off = 0; |
| 887 | 887 | |
| 888 | 888 | return 0; |
| 889 | −err_free_status_page: | |
| 889 | +err_free_status_page_and_wr_log: | |
| 890 | + if (c4iw_wr_log && rdev->wr_log) | |
| 891 | + kfree(rdev->wr_log); | |
| 890 | 892 | free_page((unsigned long)rdev->status_page); |
| 891 | 893 | destroy_ocqp_pool: |
| 892 | 894 | c4iw_ocqp_pool_destroy(rdev); |
| @@ -903,9 +905,11 @@ static void c4iw_rdev_close(struct c4iw_rdev *rdev) · 10 unmodified lines | ||
| 903 | 905 | { |
| 904 | 906 | destroy_workqueue(rdev->free_workq); |
| 905 | 907 | kfree(rdev->wr_log); |
| 908 | + c4iw_release_dev_ucontext(rdev, &rdev->uctx); | |
| 906 | 909 | free_page((unsigned long)rdev->status_page); |
| 907 | 910 | c4iw_pblpool_destroy(rdev); |
| 908 | 911 | c4iw_rqtpool_destroy(rdev); |
| 912 | + c4iw_ocqp_pool_destroy(rdev); | |
| 909 | 913 | c4iw_destroy_resource(&rdev->resource); |
| 910 | 914 | } |
| 911 | 915 | |
| @@ -971,7 +975,7 @@ static struct c4iw_dev *c4iw_alloc(const struct cxgb4_lld_info *infop) · 59 unmodified lines | ||
| 971 | 975 | devp->rdev.lldi.sge_egrstatuspagesize); |
| 972 | 976 | |
| 973 | 977 | devp->rdev.hw_queue.t4_eq_status_entries = |
| 974 | − devp->rdev.lldi.sge_ingpadboundary > 64 ? 2 : 1; | |
| 978 | + devp->rdev.lldi.sge_egrstatuspagesize / 64; | |
| 975 | 979 | devp->rdev.hw_queue.t4_max_eq_size = 65520; |
| 976 | 980 | devp->rdev.hw_queue.t4_max_iq_size = 65520; |
| 977 | 981 | devp->rdev.hw_queue.t4_max_rq_size = 8192 - |
| @@ -6312,25 +6312,38 @@ static void handle_8051_request(struct hfi1_pportdata *ppd) · 6311 unmodified lines | ||
| 6312 | 6312 | } |
| 6313 | 6313 | } |
| 6314 | 6314 | |
| 6315 | −static void write_global_credit(struct hfi1_devdata *dd, | |
| 6316 | − u8 vau, u16 total, u16 shared) | |
| 6315 | +/* | |
| 6316 | + * Set up allocation unit vaulue. | |
| 6317 | + */ | |
| 6318 | +void set_up_vau(struct hfi1_devdata *dd, u8 vau) | |
| 6317 | 6319 | { |
| 6318 | − write_csr(dd, SEND_CM_GLOBAL_CREDIT, | |
| 6319 | − ((u64)total << | |
| 6320 | − SEND_CM_GLOBAL_CREDIT_TOTAL_CREDIT_LIMIT_SHIFT) | | |
| 6321 | − ((u64)shared << | |
| 6322 | − SEND_CM_GLOBAL_CREDIT_SHARED_LIMIT_SHIFT) | | |
| 6323 | − ((u64)vau << SEND_CM_GLOBAL_CREDIT_AU_SHIFT)); | |
| 6320 | + u64 reg = read_csr(dd, SEND_CM_GLOBAL_CREDIT); | |
| 6321 | + | |
| 6322 | + /* do not modify other values in the register */ | |
| 6323 | + reg &= ~SEND_CM_GLOBAL_CREDIT_AU_SMASK; | |
| 6324 | + reg |= (u64)vau << SEND_CM_GLOBAL_CREDIT_AU_SHIFT; | |
| 6325 | + write_csr(dd, SEND_CM_GLOBAL_CREDIT, reg); | |
| 6324 | 6326 | } |
| 6325 | 6327 | |
| 6326 | 6328 | /* |
| 6327 | 6329 | * Set up initial VL15 credits of the remote. Assumes the rest of |
| 6328 | − * the CM credit registers are zero from a previous global or credit reset . | |
| 6330 | + * the CM credit registers are zero from a previous global or credit reset. | |
| 6331 | + * Shared limit for VL15 will always be 0. | |
| 6329 | 6332 | */ |
| 6330 | −void set_up_vl15(struct hfi1_devdata *dd, u8 vau, u16 vl15buf) | |
| 6333 | +void set_up_vl15(struct hfi1_devdata *dd, u16 vl15buf) | |
| 6331 | 6334 | { |
| 6332 | − /* leave shared count at zero for both global and VL15 */ | |
| 6333 | − write_global_credit(dd, vau, vl15buf, 0); | |
| 6335 | + u64 reg = read_csr(dd, SEND_CM_GLOBAL_CREDIT); | |
| 6336 | + | |
| 6337 | + /* set initial values for total and shared credit limit */ | |
| 6338 | + reg &= ~(SEND_CM_GLOBAL_CREDIT_TOTAL_CREDIT_LIMIT_SMASK | | |
| 6339 | + SEND_CM_GLOBAL_CREDIT_SHARED_LIMIT_SMASK); | |
| 6340 | + | |
| 6341 | + /* | |
| 6342 | + * Set total limit to be equal to VL15 credits. | |
| 6343 | + * Leave shared limit at 0. | |
| 6344 | + */ | |
| 6345 | + reg |= (u64)vl15buf << SEND_CM_GLOBAL_CREDIT_TOTAL_CREDIT_LIMIT_SHIFT; | |
| 6346 | + write_csr(dd, SEND_CM_GLOBAL_CREDIT, reg); | |
| 6334 | 6347 | |
| 6335 | 6348 | write_csr(dd, SEND_CM_CREDIT_VL15, (u64)vl15buf |
| 6336 | 6349 | << SEND_CM_CREDIT_VL15_DEDICATED_LIMIT_VL_SHIFT); |
| @@ -6348,9 +6361,11 @@ void reset_link_credits(struct hfi1_devdata *dd) · 11 unmodified lines | ||
| 6348 | 6361 | for (i = 0; i < TXE_NUM_DATA_VL; i++) |
| 6349 | 6362 | write_csr(dd, SEND_CM_CREDIT_VL + (8 * i), 0); |
| 6350 | 6363 | write_csr(dd, SEND_CM_CREDIT_VL15, 0); |
| 6351 | − write_global_credit(dd, 0, 0, 0); | |
| 6364 | + write_csr(dd, SEND_CM_GLOBAL_CREDIT, 0); | |
| 6352 | 6365 | /* reset the CM block */ |
| 6353 | 6366 | pio_send_control(dd, PSC_CM_RESET); |
| 6367 | + /* reset cached value */ | |
| 6368 | + dd->vl15buf_cached = 0; | |
| 6354 | 6369 | } |
| 6355 | 6370 | |
| 6356 | 6371 | /* convert a vCU to a CU */ |
| @@ -6839,24 +6854,35 @@ void handle_link_up(struct work_struct *work) · 482 unmodified lines | ||
| 6839 | 6854 | { |
| 6840 | 6855 | struct hfi1_pportdata *ppd = container_of(work, struct hfi1_pportdata, |
| 6841 | 6856 | link_up_work); |
| 6857 | + struct hfi1_devdata *dd = ppd->dd; | |
| 6858 | + | |
| 6842 | 6859 | set_link_state(ppd, HLS_UP_INIT); |
| 6843 | 6860 | |
| 6844 | 6861 | /* cache the read of DC_LCB_STS_ROUND_TRIP_LTP_CNT */ |
| 6845 | − read_ltp_rtt(ppd->dd); | |
| 6862 | + read_ltp_rtt(dd); | |
| 6846 | 6863 | /* |
| 6847 | 6864 | * OPA specifies that certain counters are cleared on a transition |
| 6848 | 6865 | * to link up, so do that. |
| 6849 | 6866 | */ |
| 6850 | − clear_linkup_counters(ppd->dd); | |
| 6867 | + clear_linkup_counters(dd); | |
| 6851 | 6868 | /* |
| 6852 | 6869 | * And (re)set link up default values. |
| 6853 | 6870 | */ |
| 6854 | 6871 | set_linkup_defaults(ppd); |
| 6855 | 6872 | |
| 6873 | + /* | |
| 6874 | + * Set VL15 credits. Use cached value from verify cap interrupt. | |
| 6875 | + * In case of quick linkup or simulator, vl15 value will be set by | |
| 6876 | + * handle_linkup_change. VerifyCap interrupt handler will not be | |
| 6877 | + * called in those scenarios. | |
| 6878 | + */ | |
| 6879 | + if (!(quick_linkup || dd->icode == ICODE_FUNCTIONAL_SIMULATOR)) | |
| 6880 | + set_up_vl15(dd, dd->vl15buf_cached); | |
| 6881 | + | |
| 6856 | 6882 | /* enforce link speed enabled */ |
| 6857 | 6883 | if ((ppd->link_speed_active & ppd->link_speed_enabled) == 0) { |
| 6858 | 6884 | /* oops - current speed is not enabled, bounce */ |
| 6859 | − dd_dev_err(ppd->dd, | |
| 6885 | + dd_dev_err(dd, | |
| 6860 | 6886 | "Link speed active 0x%x is outside enabled 0x%x, downing link\n", |
| 6861 | 6887 | ppd->link_speed_active, ppd->link_speed_enabled); |
| 6862 | 6888 | set_link_down_reason(ppd, OPA_LINKDOWN_REASON_SPEED_POLICY, 0, |
| @@ -7357,7 +7383,14 @@ void handle_verify_cap(struct work_struct *work) · 494 unmodified lines | ||
| 7357 | 7383 | */ |
| 7358 | 7384 | if (vau == 0) |
| 7359 | 7385 | vau = 1; |
| 7360 | − set_up_vl15(dd, vau, vl15buf); | |
| 7386 | + set_up_vau(dd, vau); | |
| 7387 | + | |
| 7388 | + /* | |
| 7389 | + * Set VL15 credits to 0 in global credit register. Cache remote VL15 | |
| 7390 | + * credits value and wait for link-up interrupt ot set it. | |
| 7391 | + */ | |
| 7392 | + set_up_vl15(dd, 0); | |
| 7393 | + dd->vl15buf_cached = vl15buf; | |
| 7361 | 7394 | |
| 7362 | 7395 | /* set up the LCB CRC mode */ |
| 7363 | 7396 | crc_mask = ppd->port_crc_mode_enabled & partner_supported_crc; |
| @@ -839,7 +839,9 @@ · 838 unmodified lines | ||
| 839 | 839 | #define SEND_CM_CTRL_FORCE_CREDIT_MODE_SMASK 0x8ull |
| 840 | 840 | #define SEND_CM_CTRL_RESETCSR 0x0000000000000020ull |
| 841 | 841 | #define SEND_CM_GLOBAL_CREDIT (TXE + 0x000000000508) |
| 842 | +#define SEND_CM_GLOBAL_CREDIT_AU_MASK 0x7ull | |
| 842 | 843 | #define SEND_CM_GLOBAL_CREDIT_AU_SHIFT 16 |
| 844 | +#define SEND_CM_GLOBAL_CREDIT_AU_SMASK 0x70000ull | |
| 843 | 845 | #define SEND_CM_GLOBAL_CREDIT_RESETCSR 0x0000094000030000ull |
| 844 | 846 | #define SEND_CM_GLOBAL_CREDIT_SHARED_LIMIT_MASK 0xFFFFull |
| 845 | 847 | #define SEND_CM_GLOBAL_CREDIT_SHARED_LIMIT_SHIFT 0 |
| @@ -1045,6 +1045,14 @@ struct hfi1_devdata { · 1044 unmodified lines | ||
| 1045 | 1045 | /* initial vl15 credits to use */ |
| 1046 | 1046 | u16 vl15_init; |
| 1047 | 1047 | |
| 1048 | + /* | |
| 1049 | + * Cached value for vl15buf, read during verify cap interrupt. VL15 | |
| 1050 | + * credits are to be kept at 0 and set when handling the link-up | |
| 1051 | + * interrupt. This removes the possibility of receiving VL15 MAD | |
| 1052 | + * packets before this HFI is ready. | |
| 1053 | + */ | |
| 1054 | + u16 vl15buf_cached; | |
| 1055 | + | |
| 1048 | 1056 | /* Misc small ints */ |
| 1049 | 1057 | u8 n_krcv_queues; |
| 1050 | 1058 | u8 qos_shift; |
| @@ -1598,7 +1606,8 @@ int hfi1_rcvbuf_validate(u32 size, u8 type, u16 *encode); · 547 unmodified lines | ||
| 1598 | 1606 | int fm_get_table(struct hfi1_pportdata *ppd, int which, void *t); |
| 1599 | 1607 | int fm_set_table(struct hfi1_pportdata *ppd, int which, void *t); |
| 1600 | 1608 | |
| 1601 | −void set_up_vl15(struct hfi1_devdata *dd, u8 vau, u16 vl15buf); | |
| 1609 | +void set_up_vau(struct hfi1_devdata *dd, u8 vau); | |
| 1610 | +void set_up_vl15(struct hfi1_devdata *dd, u16 vl15buf); | |
| 1602 | 1611 | void reset_link_credits(struct hfi1_devdata *dd); |
| 1603 | 1612 | void assign_remote_cm_au_table(struct hfi1_devdata *dd, u8 vcu); |
| 1604 | 1613 | |
| @@ -130,7 +130,8 @@ void handle_linkup_change(struct hfi1_devdata *dd, u32 linkup) · 129 unmodified lines | ||
| 130 | 130 | * the remote values. Both sides must be using the values. |
| 131 | 131 | */ |
| 132 | 132 | if (quick_linkup || dd->icode == ICODE_FUNCTIONAL_SIMULATOR) { |
| 133 | − set_up_vl15(dd, dd->vau, dd->vl15_init); | |
| 133 | + set_up_vau(dd, dd->vau); | |
| 134 | + set_up_vl15(dd, dd->vl15_init); | |
| 134 | 135 | assign_remote_cm_au_table(dd, dd->vcu); |
| 135 | 136 | } |
| 136 | 137 | |
| @@ -207,8 +207,8 @@ int hfi1_pcie_ddinit(struct hfi1_devdata *dd, struct pci_dev *pdev) · 206 unmodified lines | ||
| 207 | 207 | /* |
| 208 | 208 | * Save BARs and command to rewrite after device reset. |
| 209 | 209 | */ |
| 210 | − dd->pcibar0 = addr; | |
| 211 | − dd->pcibar1 = addr >> 32; | |
| 210 | + pci_read_config_dword(dd->pcidev, PCI_BASE_ADDRESS_0, &dd->pcibar0); | |
| 211 | + pci_read_config_dword(dd->pcidev, PCI_BASE_ADDRESS_1, &dd->pcibar1); | |
| 212 | 212 | pci_read_config_dword(dd->pcidev, PCI_ROM_ADDRESS, &dd->pci_rom); |
| 213 | 213 | pci_read_config_word(dd->pcidev, PCI_COMMAND, &dd->pci_command); |
| 214 | 214 | pcie_capability_read_word(dd->pcidev, PCI_EXP_DEVCTL, &dd->pcie_devctl); |
| @@ -2159,8 +2159,11 @@ send_last: · 2158 unmodified lines | ||
| 2159 | 2159 | ret = hfi1_rvt_get_rwqe(qp, 1); |
| 2160 | 2160 | if (ret < 0) |
| 2161 | 2161 | goto nack_op_err; |
| 2162 | − if (!ret) | |
| 2162 | + if (!ret) { | |
| 2163 | + /* peer will send again */ | |
| 2164 | + rvt_put_ss(&qp->r_sge); | |
| 2163 | 2165 | goto rnr_nak; |
| 2166 | + } | |
| 2164 | 2167 | wc.ex.imm_data = ohdr->u.rc.imm_data; |
| 2165 | 2168 | wc.wc_flags = IB_WC_WITH_IMM; |
| 2166 | 2169 | goto send_last; |
| @@ -196,7 +196,8 @@ static const struct sysfs_ops port_cc_sysfs_ops = { · 195 unmodified lines | ||
| 196 | 196 | }; |
| 197 | 197 | |
| 198 | 198 | static struct attribute *port_cc_default_attributes[] = { |
| 199 | − &cc_prescan_attr.attr | |
| 199 | + &cc_prescan_attr.attr, | |
| 200 | + NULL | |
| 200 | 201 | }; |
| 201 | 202 | |
| 202 | 203 | static struct kobj_type port_cc_ktype = { |
| @@ -784,7 +784,6 @@ static void i40iw_build_mpa_v2(struct i40iw_cm_node *cm_node, · 783 unmodified lines | ||
| 784 | 784 | } |
| 785 | 785 | |
| 786 | 786 | ctrl_ird |= IETF_PEER_TO_PEER; |
| 787 | − ctrl_ird |= IETF_FLPDU_ZERO_LEN; | |
| 788 | 787 | |
| 789 | 788 | switch (mpa_key) { |
| 790 | 789 | case MPA_KEY_REQUEST: |
| @@ -2446,8 +2445,8 @@ static void i40iw_handle_rcv_mpa(struct i40iw_cm_node *cm_node, · 1655 unmodified lines | ||
| 2446 | 2445 | } else { |
| 2447 | 2446 | type = I40IW_CM_EVENT_CONNECTED; |
| 2448 | 2447 | cm_node->state = I40IW_CM_STATE_OFFLOADED; |
| 2449 | − i40iw_send_ack(cm_node); | |
| 2450 | 2448 | } |
| 2449 | + i40iw_send_ack(cm_node); | |
| 2451 | 2450 | break; |
| 2452 | 2451 | default: |
| 2453 | 2452 | pr_err("%s wrong cm_node state =%d\n", __func__, cm_node->state); |
| @@ -285,28 +285,20 @@ void i40iw_change_l2params(struct i40iw_sc_vsi *vsi, struct i40iw_l2params *l2pa · 284 unmodified lines | ||
| 285 | 285 | struct i40iw_sc_dev *dev = vsi->dev; |
| 286 | 286 | struct i40iw_sc_qp *qp = NULL; |
| 287 | 287 | bool qs_handle_change = false; |
| 288 | − bool mss_change = false; | |
| 289 | 288 | unsigned long flags; |
| 290 | 289 | u16 qs_handle; |
| 291 | 290 | int i; |
| 292 | 291 | |
| 293 | − if (vsi->mss != l2params->mss) { | |
| 294 | − mss_change = true; | |
| 295 | − vsi->mss = l2params->mss; | |
| 296 | − } | |
| 292 | + vsi->mss = l2params->mss; | |
| 297 | 293 | |
| 298 | 294 | i40iw_fill_qos_list(l2params->qs_handle_list); |
| 299 | 295 | for (i = 0; i < I40IW_MAX_USER_PRIORITY; i++) { |
| 300 | 296 | qs_handle = l2params->qs_handle_list[i]; |
| 301 | 297 | if (vsi->qos[i].qs_handle != qs_handle) |
| 302 | 298 | qs_handle_change = true; |
| 303 | − else if (!mss_change) | |
| 304 | − continue; /* no MSS nor qs handle change */ | |
| 305 | 299 | spin_lock_irqsave(&vsi->qos[i].lock, flags); |
| 306 | 300 | qp = i40iw_get_qp(&vsi->qos[i].qplist, qp); |
| 307 | 301 | while (qp) { |
| 308 | − if (mss_change) | |
| 309 | − i40iw_qp_mss_modify(dev, qp); | |
| 310 | 302 | if (qs_handle_change) { |
| 311 | 303 | qp->qs_handle = qs_handle; |
| 312 | 304 | /* issue cqp suspend command */ |
| @@ -2395,7 +2387,6 @@ static enum i40iw_status_code i40iw_sc_qp_modify( · 2082 unmodified lines | ||
| 2395 | 2387 | |
| 2396 | 2388 | set_64bit_val(wqe, |
| 2397 | 2389 | 8, |
| 2398 | − LS_64(info->new_mss, I40IW_CQPSQ_QP_NEWMSS) | | |
| 2399 | 2390 | LS_64(term_len, I40IW_CQPSQ_QP_TERMLEN)); |
| 2400 | 2391 | |
| 2401 | 2392 | set_64bit_val(wqe, 16, qp->hw_host_ctx_pa); |
| @@ -2410,7 +2401,6 @@ static enum i40iw_status_code i40iw_sc_qp_modify( · 8 unmodified lines | ||
| 2410 | 2401 | LS_64(info->cq_num_valid, I40IW_CQPSQ_QP_CQNUMVALID) | |
| 2411 | 2402 | LS_64(info->force_loopback, I40IW_CQPSQ_QP_FORCELOOPBACK) | |
| 2412 | 2403 | LS_64(qp->qp_type, I40IW_CQPSQ_QP_QPTYPE) | |
| 2413 | − LS_64(info->mss_change, I40IW_CQPSQ_QP_MSSCHANGE) | | |
| 2414 | 2404 | LS_64(info->static_rsrc, I40IW_CQPSQ_QP_STATRSRC) | |
| 2415 | 2405 | LS_64(info->remove_hash_idx, I40IW_CQPSQ_QP_REMOVEHASHENTRY) | |
| 2416 | 2406 | LS_64(term_actions, I40IW_CQPSQ_QP_TERMACT) | |
| @@ -1319,13 +1319,13 @@ static enum i40iw_status_code i40iw_initialize_dev(struct i40iw_device *iwdev, · 1318 unmodified lines | ||
| 1319 | 1319 | status = i40iw_obj_aligned_mem(iwdev, &mem, I40IW_QUERY_FPM_BUF_SIZE, |
| 1320 | 1320 | I40IW_FPM_QUERY_BUF_ALIGNMENT_MASK); |
| 1321 | 1321 | if (status) |
| 1322 | − goto exit; | |
| 1322 | + goto error; | |
| 1323 | 1323 | info.fpm_query_buf_pa = mem.pa; |
| 1324 | 1324 | info.fpm_query_buf = mem.va; |
| 1325 | 1325 | status = i40iw_obj_aligned_mem(iwdev, &mem, I40IW_COMMIT_FPM_BUF_SIZE, |
| 1326 | 1326 | I40IW_FPM_COMMIT_BUF_ALIGNMENT_MASK); |
| 1327 | 1327 | if (status) |
| 1328 | − goto exit; | |
| 1328 | + goto error; | |
| 1329 | 1329 | info.fpm_commit_buf_pa = mem.pa; |
| 1330 | 1330 | info.fpm_commit_buf = mem.va; |
| 1331 | 1331 | info.hmc_fn_id = ldev->fid; |
| @@ -1347,11 +1347,9 @@ static enum i40iw_status_code i40iw_initialize_dev(struct i40iw_device *iwdev, · 15 unmodified lines | ||
| 1347 | 1347 | info.exception_lan_queue = 1; |
| 1348 | 1348 | info.vchnl_send = i40iw_virtchnl_send; |
| 1349 | 1349 | status = i40iw_device_init(&iwdev->sc_dev, &info); |
| 1350 | −exit: | |
| 1351 | − if (status) { | |
| 1352 | − kfree(iwdev->hmc_info_mem); | |
| 1353 | − iwdev->hmc_info_mem = NULL; | |
| 1354 | − } | |
| 1350 | + | |
| 1351 | + if (status) | |
| 1352 | + goto error; | |
| 1355 | 1353 | memset(&vsi_info, 0, sizeof(vsi_info)); |
| 1356 | 1354 | vsi_info.dev = &iwdev->sc_dev; |
| 1357 | 1355 | vsi_info.back_vsi = (void *)iwdev; |
| @@ -1362,11 +1360,19 @@ exit: · 4 unmodified lines | ||
| 1362 | 1360 | memset(&stats_info, 0, sizeof(stats_info)); |
| 1363 | 1361 | stats_info.fcn_id = ldev->fid; |
| 1364 | 1362 | stats_info.pestat = kzalloc(sizeof(*stats_info.pestat), GFP_KERNEL); |
| 1363 | + if (!stats_info.pestat) { | |
| 1364 | + status = I40IW_ERR_NO_MEMORY; | |
| 1365 | + goto error; | |
| 1366 | + } | |
| 1365 | 1367 | stats_info.stats_initialize = true; |
| 1366 | 1368 | if (stats_info.pestat) |
| 1367 | 1369 | i40iw_vsi_stats_init(&iwdev->vsi, &stats_info); |
| 1368 | 1370 | } |
| 1369 | 1371 | return status; |
| 1372 | +error: | |
| 1373 | + kfree(iwdev->hmc_info_mem); | |
| 1374 | + iwdev->hmc_info_mem = NULL; | |
| 1375 | + return status; | |
| 1370 | 1376 | } |
| 1371 | 1377 | |
| 1372 | 1378 | /** |
| @@ -199,7 +199,6 @@ void i40iw_cqp_spawn_worker(struct i40iw_sc_dev *dev, · 198 unmodified lines | ||
| 199 | 199 | struct i40iw_virtchnl_work_info *work_info, u32 iw_vf_idx); |
| 200 | 200 | void *i40iw_remove_head(struct list_head *list); |
| 201 | 201 | void i40iw_qp_suspend_resume(struct i40iw_sc_dev *dev, struct i40iw_sc_qp *qp, bool suspend); |
| 202 | −void i40iw_qp_mss_modify(struct i40iw_sc_dev *dev, struct i40iw_sc_qp *qp); | |
| 203 | 202 | |
| 204 | 203 | void i40iw_term_modify_qp(struct i40iw_sc_qp *qp, u8 next_state, u8 term, u8 term_len); |
| 205 | 204 | void i40iw_terminate_done(struct i40iw_sc_qp *qp, int timeout_occurred); |
| @@ -541,7 +541,6 @@ struct i40iw_create_qp_info { · 540 unmodified lines | ||
| 541 | 541 | struct i40iw_modify_qp_info { |
| 542 | 542 | u64 rx_win0; |
| 543 | 543 | u64 rx_win1; |
| 544 | − u16 new_mss; | |
| 545 | 544 | u8 next_iwarp_state; |
| 546 | 545 | u8 termlen; |
| 547 | 546 | bool ord_valid; |
| @@ -554,7 +553,6 @@ struct i40iw_modify_qp_info { · 6 unmodified lines | ||
| 554 | 553 | bool dont_send_term; |
| 555 | 554 | bool dont_send_fin; |
| 556 | 555 | bool cached_var_valid; |
| 557 | − bool mss_change; | |
| 558 | 556 | bool force_loopback; |
| 559 | 557 | }; |
| 560 | 558 | |
| @@ -756,23 +756,6 @@ void i40iw_qp_suspend_resume(struct i40iw_sc_dev *dev, struct i40iw_sc_qp *qp, b · 755 unmodified lines | ||
| 756 | 756 | i40iw_pr_err("CQP-OP QP Suspend/Resume fail"); |
| 757 | 757 | } |
| 758 | 758 | |
| 759 | −/** | |
| 760 | − * i40iw_qp_mss_modify - modify mss for qp | |
| 761 | − * @dev: hardware control device structure | |
| 762 | − * @qp: hardware control qp | |
| 763 | − */ | |
| 764 | −void i40iw_qp_mss_modify(struct i40iw_sc_dev *dev, struct i40iw_sc_qp *qp) | |
| 765 | −{ | |
| 766 | − struct i40iw_device *iwdev = (struct i40iw_device *)dev->back_dev; | |
| 767 | − struct i40iw_qp *iwqp = (struct i40iw_qp *)qp->back_qp; | |
| 768 | − struct i40iw_modify_qp_info info; | |
| 769 | − | |
| 770 | − memset(&info, 0, sizeof(info)); | |
| 771 | − info.mss_change = true; | |
| 772 | − info.new_mss = qp->vsi->mss; | |
| 773 | − i40iw_hw_modify_qp(iwdev, iwqp, &info, false); | |
| 774 | −} | |
| 775 | − | |
| 776 | 759 | /** |
| 777 | 760 | * i40iw_term_modify_qp - modify qp for term message |
| 778 | 761 | * @qp: hardware control qp |
| @@ -443,10 +443,7 @@ enum i40iw_status_code i40iw_vchnl_recv_pf(struct i40iw_sc_dev *dev, · 442 unmodified lines | ||
| 443 | 443 | if (!dev->vchnl_up) |
| 444 | 444 | return I40IW_ERR_NOT_READY; |
| 445 | 445 | if (vchnl_msg->iw_op_code == I40IW_VCHNL_OP_GET_VER) { |
| 446 | − if (vchnl_msg->iw_op_ver != I40IW_VCHNL_OP_GET_VER_V0) | |
| 447 | − vchnl_pf_send_get_ver_resp(dev, vf_id, vchnl_msg); | |
| 448 | − else | |
| 449 | − vchnl_pf_send_get_ver_resp(dev, vf_id, vchnl_msg); | |
| 446 | + vchnl_pf_send_get_ver_resp(dev, vf_id, vchnl_msg); | |
| 450 | 447 | return I40IW_SUCCESS; |
| 451 | 448 | } |
| 452 | 449 | for (iw_vf_idx = 0; iw_vf_idx < I40IW_MAX_PE_ENABLED_VF_COUNT; iw_vf_idx++) { |
| @@ -1578,6 +1578,7 @@ static void mlx4_ib_multiplex_mad(struct mlx4_ib_demux_pv_ctx *ctx, struct ib_wc · 1577 unmodified lines | ||
| 1578 | 1578 | if (port < 0) |
| 1579 | 1579 | return; |
| 1580 | 1580 | ah.av.ib.port_pd = cpu_to_be32(port << 24 | (be32_to_cpu(ah.av.ib.port_pd) & 0xffffff)); |
| 1581 | + ah.ibah.type = rdma_ah_find_type(&dev->ib_dev, port); | |
| 1581 | 1582 | |
| 1582 | 1583 | mlx4_ib_query_ah(&ah.ibah, &ah_attr); |
| 1583 | 1584 | if (rdma_ah_get_ah_flags(&ah_attr) & IB_AH_GRH) |
| @@ -2979,6 +2979,18 @@ error_0: · 2978 unmodified lines | ||
| 2979 | 2979 | return ret; |
| 2980 | 2980 | } |
| 2981 | 2981 | |
| 2982 | +static u8 mlx5_get_umr_fence(u8 umr_fence_cap) | |
| 2983 | +{ | |
| 2984 | + switch (umr_fence_cap) { | |
| 2985 | + case MLX5_CAP_UMR_FENCE_NONE: | |
| 2986 | + return MLX5_FENCE_MODE_NONE; | |
| 2987 | + case MLX5_CAP_UMR_FENCE_SMALL: | |
| 2988 | + return MLX5_FENCE_MODE_INITIATOR_SMALL; | |
| 2989 | + default: | |
| 2990 | + return MLX5_FENCE_MODE_STRONG_ORDERING; | |
| 2991 | + } | |
| 2992 | +} | |
| 2993 | + | |
| 2982 | 2994 | static int create_dev_resources(struct mlx5_ib_resources *devr) |
| 2983 | 2995 | { |
| 2984 | 2996 | struct ib_srq_init_attr attr; |
| @@ -3680,8 +3692,10 @@ static void *mlx5_ib_add(struct mlx5_core_dev *mdev) · 695 unmodified lines | ||
| 3680 | 3692 | dev->ib_dev.check_mr_status = mlx5_ib_check_mr_status; |
| 3681 | 3693 | dev->ib_dev.get_port_immutable = mlx5_port_immutable; |
| 3682 | 3694 | dev->ib_dev.get_dev_fw_str = get_dev_fw_str; |
| 3683 | − dev->ib_dev.alloc_rdma_netdev = mlx5_ib_alloc_rdma_netdev; | |
| 3684 | − dev->ib_dev.free_rdma_netdev = mlx5_ib_free_rdma_netdev; | |
| 3695 | + if (MLX5_CAP_GEN(mdev, ipoib_enhanced_offloads)) { | |
| 3696 | + dev->ib_dev.alloc_rdma_netdev = mlx5_ib_alloc_rdma_netdev; | |
| 3697 | + dev->ib_dev.free_rdma_netdev = mlx5_ib_free_rdma_netdev; | |
| 3698 | + } | |
| 3685 | 3699 | if (mlx5_core_is_pf(mdev)) { |
| 3686 | 3700 | dev->ib_dev.get_vf_config = mlx5_ib_get_vf_config; |
| 3687 | 3701 | dev->ib_dev.set_vf_link_state = mlx5_ib_set_vf_link_state; |
| @@ -3693,6 +3707,8 @@ static void *mlx5_ib_add(struct mlx5_core_dev *mdev) · 5 unmodified lines | ||
| 3693 | 3707 | |
| 3694 | 3708 | mlx5_ib_internal_fill_odp_caps(dev); |
| 3695 | 3709 | |
| 3710 | + dev->umr_fence = mlx5_get_umr_fence(MLX5_CAP_GEN(mdev, umr_fence)); | |
| 3711 | + | |
| 3696 | 3712 | if (MLX5_CAP_GEN(mdev, imaicl)) { |
| 3697 | 3713 | dev->ib_dev.alloc_mw = mlx5_ib_alloc_mw; |
| 3698 | 3714 | dev->ib_dev.dealloc_mw = mlx5_ib_dealloc_mw; |
| @@ -349,7 +349,7 @@ struct mlx5_ib_qp { · 348 unmodified lines | ||
| 349 | 349 | struct mlx5_ib_wq rq; |
| 350 | 350 | |
| 351 | 351 | u8 sq_signal_bits; |
| 352 | − u8 fm_cache; | |
| 352 | + u8 next_fence; | |
| 353 | 353 | struct mlx5_ib_wq sq; |
| 354 | 354 | |
| 355 | 355 | /* serialize qp state modifications |
| @@ -654,6 +654,7 @@ struct mlx5_ib_dev { · 298 unmodified lines | ||
| 654 | 654 | struct mlx5_ib_port *port; |
| 655 | 655 | struct mlx5_sq_bfreg bfreg; |
| 656 | 656 | struct mlx5_sq_bfreg fp_bfreg; |
| 657 | + u8 umr_fence; | |
| 657 | 658 | }; |
| 658 | 659 | |
| 659 | 660 | static inline struct mlx5_ib_cq *to_mibcq(struct mlx5_core_cq *mcq) |
| @@ -3738,24 +3738,6 @@ static void dump_wqe(struct mlx5_ib_qp *qp, int idx, int size_16) · 3737 unmodified lines | ||
| 3738 | 3738 | } |
| 3739 | 3739 | } |
| 3740 | 3740 | |
| 3741 | −static u8 get_fence(u8 fence, struct ib_send_wr *wr) | |
| 3742 | −{ | |
| 3743 | − if (unlikely(wr->opcode == IB_WR_LOCAL_INV && | |
| 3744 | − wr->send_flags & IB_SEND_FENCE)) | |
| 3745 | − return MLX5_FENCE_MODE_STRONG_ORDERING; | |
| 3746 | − | |
| 3747 | − if (unlikely(fence)) { | |
| 3748 | − if (wr->send_flags & IB_SEND_FENCE) | |
| 3749 | − return MLX5_FENCE_MODE_SMALL_AND_FENCE; | |
| 3750 | − else | |
| 3751 | − return fence; | |
| 3752 | − } else if (unlikely(wr->send_flags & IB_SEND_FENCE)) { | |
| 3753 | − return MLX5_FENCE_MODE_FENCE; | |
| 3754 | − } | |
| 3755 | − | |
| 3756 | − return 0; | |
| 3757 | −} | |
| 3758 | − | |
| 3759 | 3741 | static int begin_wqe(struct mlx5_ib_qp *qp, void **seg, |
| 3760 | 3742 | struct mlx5_wqe_ctrl_seg **ctrl, |
| 3761 | 3743 | struct ib_send_wr *wr, unsigned *idx, |
| @@ -3784,8 +3766,7 @@ static int begin_wqe(struct mlx5_ib_qp *qp, void **seg, · 22 unmodified lines | ||
| 3784 | 3766 | static void finish_wqe(struct mlx5_ib_qp *qp, |
| 3785 | 3767 | struct mlx5_wqe_ctrl_seg *ctrl, |
| 3786 | 3768 | u8 size, unsigned idx, u64 wr_id, |
| 3787 | − int nreq, u8 fence, u8 next_fence, | |
| 3788 | − u32 mlx5_opcode) | |
| 3769 | + int nreq, u8 fence, u32 mlx5_opcode) | |
| 3789 | 3770 | { |
| 3790 | 3771 | u8 opmod = 0; |
| 3791 | 3772 | |
| @@ -3793,7 +3774,6 @@ static void finish_wqe(struct mlx5_ib_qp *qp, · 1 unmodified line | ||
| 3793 | 3774 | mlx5_opcode | ((u32)opmod << 24)); |
| 3794 | 3775 | ctrl->qpn_ds = cpu_to_be32(size | (qp->trans_qp.base.mqp.qpn << 8)); |
| 3795 | 3776 | ctrl->fm_ce_se |= fence; |
| 3796 | − qp->fm_cache = next_fence; | |
| 3797 | 3777 | if (unlikely(qp->wq_sig)) |
| 3798 | 3778 | ctrl->signature = wq_sig(ctrl); |
| 3799 | 3779 | |
| @@ -3853,7 +3833,6 @@ int mlx5_ib_post_send(struct ib_qp *ibqp, struct ib_send_wr *wr, · 53 unmodified lines | ||
| 3853 | 3833 | goto out; |
| 3854 | 3834 | } |
| 3855 | 3835 | |
| 3856 | − fence = qp->fm_cache; | |
| 3857 | 3836 | num_sge = wr->num_sge; |
| 3858 | 3837 | if (unlikely(num_sge > qp->sq.max_gs)) { |
| 3859 | 3838 | mlx5_ib_warn(dev, "\n"); |
| @@ -3870,6 +3849,19 @@ int mlx5_ib_post_send(struct ib_qp *ibqp, struct ib_send_wr *wr, · 10 unmodified lines | ||
| 3870 | 3849 | goto out; |
| 3871 | 3850 | } |
| 3872 | 3851 | |
| 3852 | + if (wr->opcode == IB_WR_LOCAL_INV || | |
| 3853 | + wr->opcode == IB_WR_REG_MR) { | |
| 3854 | + fence = dev->umr_fence; | |
| 3855 | + next_fence = MLX5_FENCE_MODE_INITIATOR_SMALL; | |
| 3856 | + } else if (wr->send_flags & IB_SEND_FENCE) { | |
| 3857 | + if (qp->next_fence) | |
| 3858 | + fence = MLX5_FENCE_MODE_SMALL_AND_FENCE; | |
| 3859 | + else | |
| 3860 | + fence = MLX5_FENCE_MODE_FENCE; | |
| 3861 | + } else { | |
| 3862 | + fence = qp->next_fence; | |
| 3863 | + } | |
| 3864 | + | |
| 3873 | 3865 | switch (ibqp->qp_type) { |
| 3874 | 3866 | case IB_QPT_XRC_INI: |
| 3875 | 3867 | xrc = seg; |
| @@ -3896,7 +3888,6 @@ int mlx5_ib_post_send(struct ib_qp *ibqp, struct ib_send_wr *wr, · 20 unmodified lines | ||
| 3896 | 3888 | goto out; |
| 3897 | 3889 | |
| 3898 | 3890 | case IB_WR_LOCAL_INV: |
| 3899 | − next_fence = MLX5_FENCE_MODE_INITIATOR_SMALL; | |
| 3900 | 3891 | qp->sq.wr_data[idx] = IB_WR_LOCAL_INV; |
| 3901 | 3892 | ctrl->imm = cpu_to_be32(wr->ex.invalidate_rkey); |
| 3902 | 3893 | set_linv_wr(qp, &seg, &size); |
| @@ -3904,7 +3895,6 @@ int mlx5_ib_post_send(struct ib_qp *ibqp, struct ib_send_wr *wr, · 1 unmodified line | ||
| 3904 | 3895 | break; |
| 3905 | 3896 | |
| 3906 | 3897 | case IB_WR_REG_MR: |
| 3907 | − next_fence = MLX5_FENCE_MODE_INITIATOR_SMALL; | |
| 3908 | 3898 | qp->sq.wr_data[idx] = IB_WR_REG_MR; |
| 3909 | 3899 | ctrl->imm = cpu_to_be32(reg_wr(wr)->key); |
| 3910 | 3900 | err = set_reg_wr(qp, reg_wr(wr), &seg, &size); |
| @@ -3927,9 +3917,8 @@ int mlx5_ib_post_send(struct ib_qp *ibqp, struct ib_send_wr *wr, · 16 unmodified lines | ||
| 3927 | 3917 | goto out; |
| 3928 | 3918 | } |
| 3929 | 3919 | |
| 3930 | − finish_wqe(qp, ctrl, size, idx, wr->wr_id, | |
| 3931 | − nreq, get_fence(fence, wr), | |
| 3932 | − next_fence, MLX5_OPCODE_UMR); | |
| 3920 | + finish_wqe(qp, ctrl, size, idx, wr->wr_id, nreq, | |
| 3921 | + fence, MLX5_OPCODE_UMR); | |
| 3933 | 3922 | /* |
| 3934 | 3923 | * SET_PSV WQEs are not signaled and solicited |
| 3935 | 3924 | * on error |
| @@ -3954,9 +3943,8 @@ int mlx5_ib_post_send(struct ib_qp *ibqp, struct ib_send_wr *wr, · 18 unmodified lines | ||
| 3954 | 3943 | goto out; |
| 3955 | 3944 | } |
| 3956 | 3945 | |
| 3957 | − finish_wqe(qp, ctrl, size, idx, wr->wr_id, | |
| 3958 | − nreq, get_fence(fence, wr), | |
| 3959 | − next_fence, MLX5_OPCODE_SET_PSV); | |
| 3946 | + finish_wqe(qp, ctrl, size, idx, wr->wr_id, nreq, | |
| 3947 | + fence, MLX5_OPCODE_SET_PSV); | |
| 3960 | 3948 | err = begin_wqe(qp, &seg, &ctrl, wr, |
| 3961 | 3949 | &idx, &size, nreq); |
| 3962 | 3950 | if (err) { |
| @@ -3966,7 +3954,6 @@ int mlx5_ib_post_send(struct ib_qp *ibqp, struct ib_send_wr *wr, · 3 unmodified lines | ||
| 3966 | 3954 | goto out; |
| 3967 | 3955 | } |
| 3968 | 3956 | |
| 3969 | − next_fence = MLX5_FENCE_MODE_INITIATOR_SMALL; | |
| 3970 | 3957 | err = set_psv_wr(&sig_handover_wr(wr)->sig_attrs->wire, |
| 3971 | 3958 | mr->sig->psv_wire.psv_idx, &seg, |
| 3972 | 3959 | &size); |
| @@ -3976,9 +3963,9 @@ int mlx5_ib_post_send(struct ib_qp *ibqp, struct ib_send_wr *wr, · 3 unmodified lines | ||
| 3976 | 3963 | goto out; |
| 3977 | 3964 | } |
| 3978 | 3965 | |
| 3979 | − finish_wqe(qp, ctrl, size, idx, wr->wr_id, | |
| 3980 | − nreq, get_fence(fence, wr), | |
| 3981 | − next_fence, MLX5_OPCODE_SET_PSV); | |
| 3966 | + finish_wqe(qp, ctrl, size, idx, wr->wr_id, nreq, | |
| 3967 | + fence, MLX5_OPCODE_SET_PSV); | |
| 3968 | + qp->next_fence = MLX5_FENCE_MODE_INITIATOR_SMALL; | |
| 3982 | 3969 | num_sge = 0; |
| 3983 | 3970 | goto skip_psv; |
| 3984 | 3971 | |
| @@ -4089,8 +4076,8 @@ int mlx5_ib_post_send(struct ib_qp *ibqp, struct ib_send_wr *wr, · 104 unmodified lines | ||
| 4089 | 4076 | } |
| 4090 | 4077 | } |
| 4091 | 4078 | |
| 4092 | − finish_wqe(qp, ctrl, size, idx, wr->wr_id, nreq, | |
| 4093 | − get_fence(fence, wr), next_fence, | |
| 4079 | + qp->next_fence = next_fence; | |
| 4080 | + finish_wqe(qp, ctrl, size, idx, wr->wr_id, nreq, fence, | |
| 4094 | 4081 | mlx5_ib_opcode[wr->opcode]); |
| 4095 | 4082 | skip_psv: |
| 4096 | 4083 | if (0) |
| @@ -610,7 +610,6 @@ static void build_mpa_v2(struct nes_cm_node *cm_node, · 609 unmodified lines | ||
| 610 | 610 | ctrl_ord = cm_node->ord_size & IETF_NO_IRD_ORD; |
| 611 | 611 | } |
| 612 | 612 | ctrl_ird |= IETF_PEER_TO_PEER; |
| 613 | − ctrl_ird |= IETF_FLPDU_ZERO_LEN; | |
| 614 | 613 | |
| 615 | 614 | switch (mpa_key) { |
| 616 | 615 | case MPA_KEY_REQUEST: |
| @@ -1826,7 +1825,7 @@ static void handle_rcv_mpa(struct nes_cm_node *cm_node, struct sk_buff *skb) · 1209 unmodified lines | ||
| 1826 | 1825 | type = NES_CM_EVENT_CONNECTED; |
| 1827 | 1826 | cm_node->state = NES_CM_STATE_TSA; |
| 1828 | 1827 | } |
| 1829 | − | |
| 1828 | + send_ack(cm_node, NULL); | |
| 1830 | 1829 | break; |
| 1831 | 1830 | default: |
| 1832 | 1831 | WARN_ON(1); |
| @@ -58,7 +58,10 @@ · 57 unmodified lines | ||
| 58 | 58 | #define QEDR_MSG_QP " QP" |
| 59 | 59 | #define QEDR_MSG_GSI " GSI" |
| 60 | 60 | |
| 61 | −#define QEDR_CQ_MAGIC_NUMBER (0x11223344) | |
| 61 | +#define QEDR_CQ_MAGIC_NUMBER (0x11223344) | |
| 62 | + | |
| 63 | +#define FW_PAGE_SIZE (RDMA_RING_PAGE_SIZE) | |
| 64 | +#define FW_PAGE_SHIFT (12) | |
| 62 | 65 | |
| 63 | 66 | struct qedr_dev; |
| 64 | 67 | |
| @@ -270,11 +270,13 @@ static inline int qedr_gsi_build_header(struct qedr_dev *dev, · 269 unmodified lines | ||
| 270 | 270 | return rc; |
| 271 | 271 | } |
| 272 | 272 | |
| 273 | − vlan_id = rdma_vlan_dev_vlan_id(sgid_attr.ndev); | |
| 274 | − if (vlan_id < VLAN_CFI_MASK) | |
| 275 | − has_vlan = true; | |
| 276 | − if (sgid_attr.ndev) | |
| 273 | + if (sgid_attr.ndev) { | |
| 274 | + vlan_id = rdma_vlan_dev_vlan_id(sgid_attr.ndev); | |
| 275 | + if (vlan_id < VLAN_CFI_MASK) | |
| 276 | + has_vlan = true; | |
| 277 | + | |
| 277 | 278 | dev_put(sgid_attr.ndev); |
| 279 | + } | |
| 278 | 280 | |
| 279 | 281 | if (!memcmp(&sgid, &zgid, sizeof(sgid))) { |
| 280 | 282 | DP_ERR(dev, "gsi post send: GID not found GID index %d\n", |
| @@ -653,14 +653,15 @@ static int qedr_prepare_pbl_tbl(struct qedr_dev *dev, · 652 unmodified lines | ||
| 653 | 653 | |
| 654 | 654 | static void qedr_populate_pbls(struct qedr_dev *dev, struct ib_umem *umem, |
| 655 | 655 | struct qedr_pbl *pbl, |
| 656 | − struct qedr_pbl_info *pbl_info) | |
| 656 | + struct qedr_pbl_info *pbl_info, u32 pg_shift) | |
| 657 | 657 | { |
| 658 | 658 | int shift, pg_cnt, pages, pbe_cnt, total_num_pbes = 0; |
| 659 | + u32 fw_pg_cnt, fw_pg_per_umem_pg; | |
| 659 | 660 | struct qedr_pbl *pbl_tbl; |
| 660 | 661 | struct scatterlist *sg; |
| 661 | 662 | struct regpair *pbe; |
| 663 | + u64 pg_addr; | |
| 662 | 664 | int entry; |
| 663 | − u32 addr; | |
| 664 | 665 | |
| 665 | 666 | if (!pbl_info->num_pbes) |
| 666 | 667 | return; |
| @@ -683,29 +684,35 @@ static void qedr_populate_pbls(struct qedr_dev *dev, struct ib_umem *umem, · 16 unmodified lines | ||
| 683 | 684 | |
| 684 | 685 | shift = umem->page_shift; |
| 685 | 686 | |
| 687 | + fw_pg_per_umem_pg = BIT(umem->page_shift - pg_shift); | |
| 688 | + | |
| 686 | 689 | for_each_sg(umem->sg_head.sgl, sg, umem->nmap, entry) { |
| 687 | 690 | pages = sg_dma_len(sg) >> shift; |
| 691 | + pg_addr = sg_dma_address(sg); | |
| 688 | 692 | for (pg_cnt = 0; pg_cnt < pages; pg_cnt++) { |
| 689 | − /* store the page address in pbe */ | |
| 690 | − pbe->lo = cpu_to_le32(sg_dma_address(sg) + | |
| 691 | − (pg_cnt << shift)); | |
| 692 | − addr = upper_32_bits(sg_dma_address(sg) + | |
| 693 | − (pg_cnt << shift)); | |
| 694 | − pbe->hi = cpu_to_le32(addr); | |
| 695 | − pbe_cnt++; | |
| 696 | − total_num_pbes++; | |
| 697 | − pbe++; | |
| 698 | − | |
| 699 | − if (total_num_pbes == pbl_info->num_pbes) | |
| 700 | − return; | |
| 701 | − | |
| 702 | − /* If the given pbl is full storing the pbes, | |
| 703 | − * move to next pbl. | |
| 704 | − */ | |
| 705 | − if (pbe_cnt == (pbl_info->pbl_size / sizeof(u64))) { | |
| 706 | − pbl_tbl++; | |
| 707 | − pbe = (struct regpair *)pbl_tbl->va; | |
| 708 | − pbe_cnt = 0; | |
| 693 | + for (fw_pg_cnt = 0; fw_pg_cnt < fw_pg_per_umem_pg;) { | |
| 694 | + pbe->lo = cpu_to_le32(pg_addr); | |
| 695 | + pbe->hi = cpu_to_le32(upper_32_bits(pg_addr)); | |
| 696 | + | |
| 697 | + pg_addr += BIT(pg_shift); | |
| 698 | + pbe_cnt++; | |
| 699 | + total_num_pbes++; | |
| 700 | + pbe++; | |
| 701 | + | |
| 702 | + if (total_num_pbes == pbl_info->num_pbes) | |
| 703 | + return; | |
| 704 | + | |
| 705 | + /* If the given pbl is full storing the pbes, | |
| 706 | + * move to next pbl. | |
| 707 | + */ | |
| 708 | + if (pbe_cnt == | |
| 709 | + (pbl_info->pbl_size / sizeof(u64))) { | |
| 710 | + pbl_tbl++; | |
| 711 | + pbe = (struct regpair *)pbl_tbl->va; | |
| 712 | + pbe_cnt = 0; | |
| 713 | + } | |
| 714 | + | |
| 715 | + fw_pg_cnt++; | |
| 709 | 716 | } |
| 710 | 717 | } |
| 711 | 718 | } |
| @@ -754,7 +761,7 @@ static inline int qedr_init_user_queue(struct ib_ucontext *ib_ctx, · 42 unmodified lines | ||
| 754 | 761 | u64 buf_addr, size_t buf_len, |
| 755 | 762 | int access, int dmasync) |
| 756 | 763 | { |
| 757 | − int page_cnt; | |
| 764 | + u32 fw_pages; | |
| 758 | 765 | int rc; |
| 759 | 766 | |
| 760 | 767 | q->buf_addr = buf_addr; |
| @@ -766,8 +773,10 @@ static inline int qedr_init_user_queue(struct ib_ucontext *ib_ctx, · 5 unmodified lines | ||
| 766 | 773 | return PTR_ERR(q->umem); |
| 767 | 774 | } |
| 768 | 775 | |
| 769 | − page_cnt = ib_umem_page_count(q->umem); | |
| 770 | − rc = qedr_prepare_pbl_tbl(dev, &q->pbl_info, page_cnt, 0); | |
| 776 | + fw_pages = ib_umem_page_count(q->umem) << | |
| 777 | + (q->umem->page_shift - FW_PAGE_SHIFT); | |
| 778 | + | |
| 779 | + rc = qedr_prepare_pbl_tbl(dev, &q->pbl_info, fw_pages, 0); | |
| 771 | 780 | if (rc) |
| 772 | 781 | goto err0; |
| 773 | 782 | |
| @@ -777,7 +786,8 @@ static inline int qedr_init_user_queue(struct ib_ucontext *ib_ctx, · 3 unmodified lines | ||
| 777 | 786 | goto err0; |
| 778 | 787 | } |
| 779 | 788 | |
| 780 | − qedr_populate_pbls(dev, q->umem, q->pbl_tbl, &q->pbl_info); | |
| 789 | + qedr_populate_pbls(dev, q->umem, q->pbl_tbl, &q->pbl_info, | |
| 790 | + FW_PAGE_SHIFT); | |
| 781 | 791 | |
| 782 | 792 | return 0; |
| 783 | 793 | |
| @@ -2226,7 +2236,7 @@ struct ib_mr *qedr_reg_user_mr(struct ib_pd *ibpd, u64 start, u64 len, · 1442 unmodified lines | ||
| 2226 | 2236 | goto err1; |
| 2227 | 2237 | |
| 2228 | 2238 | qedr_populate_pbls(dev, mr->umem, mr->info.pbl_table, |
| 2229 | − &mr->info.pbl_info); | |
| 2239 | + &mr->info.pbl_info, mr->umem->page_shift); | |
| 2230 | 2240 | |
| 2231 | 2241 | rc = dev->ops->rdma_alloc_tid(dev->rdma_ctx, &mr->hw_mr.itid); |
| 2232 | 2242 | if (rc) { |
| @@ -3209,6 +3219,10 @@ static int process_req(struct qedr_dev *dev, struct qedr_qp *qp, · 976 unmodified lines | ||
| 3209 | 3219 | case IB_WC_REG_MR: |
| 3210 | 3220 | qp->wqe_wr_id[qp->sq.cons].mr->info.completed++; |
| 3211 | 3221 | break; |
| 3222 | + case IB_WC_RDMA_READ: | |
| 3223 | + case IB_WC_SEND: | |
| 3224 | + wc->byte_len = qp->wqe_wr_id[qp->sq.cons].bytes_len; | |
| 3225 | + break; | |
| 3212 | 3226 | default: |
| 3213 | 3227 | break; |
| 3214 | 3228 | } |
| @@ -1956,8 +1956,10 @@ send_last: · 1955 unmodified lines | ||
| 1956 | 1956 | ret = qib_get_rwqe(qp, 1); |
| 1957 | 1957 | if (ret < 0) |
| 1958 | 1958 | goto nack_op_err; |
| 1959 | − if (!ret) | |
| 1959 | + if (!ret) { | |
| 1960 | + rvt_put_ss(&qp->r_sge); | |
| 1960 | 1961 | goto rnr_nak; |
| 1962 | + } | |
| 1961 | 1963 | wc.ex.imm_data = ohdr->u.rc.imm_data; |
| 1962 | 1964 | hdrsize += 4; |
| 1963 | 1965 | wc.wc_flags = IB_WC_WITH_IMM; |
| @@ -68,6 +68,7 @@ · 67 unmodified lines | ||
| 68 | 68 | static inline u32 rxe_crc32(struct rxe_dev *rxe, |
| 69 | 69 | u32 crc, void *next, size_t len) |
| 70 | 70 | { |
| 71 | + u32 retval; | |
| 71 | 72 | int err; |
| 72 | 73 | |
| 73 | 74 | SHASH_DESC_ON_STACK(shash, rxe->tfm); |
| @@ -81,7 +82,9 @@ static inline u32 rxe_crc32(struct rxe_dev *rxe, · 7 unmodified lines | ||
| 81 | 82 | return crc32_le(crc, next, len); |
| 82 | 83 | } |
| 83 | 84 | |
| 84 | − return *(u32 *)shash_desc_ctx(shash); | |
| 85 | + retval = *(u32 *)shash_desc_ctx(shash); | |
| 86 | + barrier_data(shash_desc_ctx(shash)); | |
| 87 | + return retval; | |
| 85 | 88 | } |
| 86 | 89 | |
| 87 | 90 | int rxe_set_mtu(struct rxe_dev *rxe, unsigned int dev_mtu); |
| @@ -740,13 +740,8 @@ static int init_send_wqe(struct rxe_qp *qp, struct ib_send_wr *ibwr, · 739 unmodified lines | ||
| 740 | 740 | |
| 741 | 741 | sge = ibwr->sg_list; |
| 742 | 742 | for (i = 0; i < num_sge; i++, sge++) { |
| 743 | − if (qp->is_user && copy_from_user(p, (__user void *) | |
| 744 | − (uintptr_t)sge->addr, sge->length)) | |
| 745 | − return -EFAULT; | |
| 746 | − | |
| 747 | − else if (!qp->is_user) | |
| 748 | − memcpy(p, (void *)(uintptr_t)sge->addr, | |
| 749 | − sge->length); | |
| 743 | + memcpy(p, (void *)(uintptr_t)sge->addr, | |
| 744 | + sge->length); | |
| 750 | 745 | |
| 751 | 746 | p += sge->length; |
| 752 | 747 | } |
| @@ -178,7 +178,7 @@ static inline int ib_speed_enum_to_int(int speed) · 177 unmodified lines | ||
| 178 | 178 | static int ipoib_get_link_ksettings(struct net_device *netdev, |
| 179 | 179 | struct ethtool_link_ksettings *cmd) |
| 180 | 180 | { |
| 181 | − struct ipoib_dev_priv *priv = netdev_priv(netdev); | |
| 181 | + struct ipoib_dev_priv *priv = ipoib_priv(netdev); | |
| 182 | 182 | struct ib_port_attr attr; |
| 183 | 183 | int ret, speed, width; |
| 184 | 184 | |
| @@ -863,7 +863,6 @@ dev_stop: · 862 unmodified lines | ||
| 863 | 863 | set_bit(IPOIB_STOP_REAPER, &priv->flags); |
| 864 | 864 | cancel_delayed_work(&priv->ah_reap_task); |
| 865 | 865 | set_bit(IPOIB_FLAG_INITIALIZED, &priv->flags); |
| 866 | − napi_enable(&priv->napi); | |
| 867 | 866 | ipoib_ib_dev_stop(dev); |
| 868 | 867 | return -1; |
| 869 | 868 | } |
| @@ -1590,12 +1590,14 @@ static void ipoib_neigh_hash_uninit(struct net_device *dev) · 1589 unmodified lines | ||
| 1590 | 1590 | wait_for_completion(&priv->ntbl.deleted); |
| 1591 | 1591 | } |
| 1592 | 1592 | |
| 1593 | −void ipoib_dev_uninit_default(struct net_device *dev) | |
| 1593 | +static void ipoib_dev_uninit_default(struct net_device *dev) | |
| 1594 | 1594 | { |
| 1595 | 1595 | struct ipoib_dev_priv *priv = ipoib_priv(dev); |
| 1596 | 1596 | |
| 1597 | 1597 | ipoib_transport_dev_cleanup(dev); |
| 1598 | 1598 | |
| 1599 | + netif_napi_del(&priv->napi); | |
| 1600 | + | |
| 1599 | 1601 | ipoib_cm_dev_cleanup(dev); |
| 1600 | 1602 | |
| 1601 | 1603 | kfree(priv->rx_ring); |
| @@ -1649,6 +1651,7 @@ out_rx_ring_cleanup: · 47 unmodified lines | ||
| 1649 | 1651 | kfree(priv->rx_ring); |
| 1650 | 1652 | |
| 1651 | 1653 | out: |
| 1654 | + netif_napi_del(&priv->napi); | |
| 1652 | 1655 | return -ENOMEM; |
| 1653 | 1656 | } |
| 1654 | 1657 | |
| @@ -2237,6 +2240,7 @@ event_failed: · 582 unmodified lines | ||
| 2237 | 2240 | |
| 2238 | 2241 | device_init_failed: |
| 2239 | 2242 | free_netdev(priv->dev); |
| 2243 | + kfree(priv); | |
| 2240 | 2244 | |
| 2241 | 2245 | alloc_mem_failed: |
| 2242 | 2246 | return ERR_PTR(result); |
| @@ -2277,7 +2281,7 @@ static void ipoib_add_one(struct ib_device *device) · 34 unmodified lines | ||
| 2277 | 2281 | |
| 2278 | 2282 | static void ipoib_remove_one(struct ib_device *device, void *client_data) |
| 2279 | 2283 | { |
| 2280 | − struct ipoib_dev_priv *priv, *tmp; | |
| 2284 | + struct ipoib_dev_priv *priv, *tmp, *cpriv, *tcpriv; | |
| 2281 | 2285 | struct list_head *dev_list = client_data; |
| 2282 | 2286 | |
| 2283 | 2287 | if (!dev_list) |
| @@ -2300,7 +2304,14 @@ static void ipoib_remove_one(struct ib_device *device, void *client_data) · 16 unmodified lines | ||
| 2300 | 2304 | flush_workqueue(priv->wq); |
| 2301 | 2305 | |
| 2302 | 2306 | unregister_netdev(priv->dev); |
| 2303 | − free_netdev(priv->dev); | |
| 2307 | + if (device->free_rdma_netdev) | |
| 2308 | + device->free_rdma_netdev(priv->dev); | |
| 2309 | + else | |
| 2310 | + free_netdev(priv->dev); | |
| 2311 | + | |
| 2312 | + list_for_each_entry_safe(cpriv, tcpriv, &priv->child_intfs, list) | |
| 2313 | + kfree(cpriv); | |
| 2314 | + | |
| 2304 | 2315 | kfree(priv); |
| 2305 | 2316 | } |
| 2306 | 2317 | |
| @@ -133,13 +133,13 @@ int ipoib_vlan_add(struct net_device *pdev, unsigned short pkey) · 132 unmodified lines | ||
| 133 | 133 | snprintf(intf_name, sizeof intf_name, "%s.%04x", |
| 134 | 134 | ppriv->dev->name, pkey); |
| 135 | 135 | |
| 136 | + if (!rtnl_trylock()) | |
| 137 | + return restart_syscall(); | |
| 138 | + | |
| 136 | 139 | priv = ipoib_intf_alloc(ppriv->ca, ppriv->port, intf_name); |
| 137 | 140 | if (!priv) |
| 138 | 141 | return -ENOMEM; |
| 139 | 142 | |
| 140 | − if (!rtnl_trylock()) | |
| 141 | − return restart_syscall(); | |
| 142 | − | |
| 143 | 143 | down_write(&ppriv->vlan_rwsem); |
| 144 | 144 | |
| 145 | 145 | /* |
| @@ -167,8 +167,10 @@ out: · 21 unmodified lines | ||
| 167 | 167 | |
| 168 | 168 | rtnl_unlock(); |
| 169 | 169 | |
| 170 | − if (result) | |
| 170 | + if (result) { | |
| 171 | 171 | free_netdev(priv->dev); |
| 172 | + kfree(priv); | |
| 173 | + } | |
| 172 | 174 | |
| 173 | 175 | return result; |
| 174 | 176 | } |
| @@ -209,6 +211,7 @@ int ipoib_vlan_delete(struct net_device *pdev, unsigned short pkey) · 34 unmodified lines | ||
| 209 | 211 | |
| 210 | 212 | if (dev) { |
| 211 | 213 | free_netdev(dev); |
| 214 | + kfree(priv); | |
| 212 | 215 | return 0; |
| 213 | 216 | } |
| 214 | 217 | |
| @@ -320,7 +320,7 @@ static int srp_new_cm_id(struct srp_rdma_ch *ch) · 319 unmodified lines | ||
| 320 | 320 | ch->path.sgid = target->sgid; |
| 321 | 321 | ch->path.dgid = target->orig_dgid; |
| 322 | 322 | ch->path.pkey = target->pkey; |
| 323 | − sa_path_set_service_id(&ch->path, target->service_id); | |
| 323 | + ch->path.service_id = target->service_id; | |
| 324 | 324 | |
| 325 | 325 | return 0; |
| 326 | 326 | } |
| @@ -575,7 +575,7 @@ static int srp_create_ch_ib(struct srp_rdma_ch *ch) · 248 unmodified lines | ||
| 575 | 575 | return 0; |
| 576 | 576 | |
| 577 | 577 | err_qp: |
| 578 | − srp_destroy_qp(ch, qp); | |
| 578 | + ib_destroy_qp(qp); | |
| 579 | 579 | |
| 580 | 580 | err_send_cq: |
| 581 | 581 | ib_free_cq(send_cq); |
| @@ -213,7 +213,7 @@ static int tm2_touchkey_probe(struct i2c_client *client, · 212 unmodified lines | ||
| 213 | 213 | /* led device */ |
| 214 | 214 | touchkey->led_dev.name = TM2_TOUCHKEY_DEV_NAME; |
| 215 | 215 | touchkey->led_dev.brightness = LED_FULL; |
| 216 | − touchkey->led_dev.max_brightness = LED_FULL; | |
| 216 | + touchkey->led_dev.max_brightness = LED_ON; | |
| 217 | 217 | touchkey->led_dev.brightness_set = tm2_touchkey_led_brightness_set; |
| 218 | 218 | |
| 219 | 219 | error = devm_led_classdev_register(&client->dev, &touchkey->led_dev); |
| @@ -256,6 +256,42 @@ static int axp20x_pek_probe_input_device(struct axp20x_pek *axp20x_pek, · 255 unmodified lines | ||
| 256 | 256 | return 0; |
| 257 | 257 | } |
| 258 | 258 | |
| 259 | +#ifdef CONFIG_ACPI | |
| 260 | +static bool axp20x_pek_should_register_input(struct axp20x_pek *axp20x_pek, | |
| 261 | + struct platform_device *pdev) | |
| 262 | +{ | |
| 263 | + unsigned long long hrv = 0; | |
| 264 | + acpi_status status; | |
| 265 | + | |
| 266 | + if (IS_ENABLED(CONFIG_INPUT_SOC_BUTTON_ARRAY) && | |
| 267 | + axp20x_pek->axp20x->variant == AXP288_ID) { | |
| 268 | + status = acpi_evaluate_integer(ACPI_HANDLE(pdev->dev.parent), | |
| 269 | + "_HRV", NULL, &hrv); | |
| 270 | + if (ACPI_FAILURE(status)) | |
| 271 | + dev_err(&pdev->dev, "Failed to get PMIC hardware revision\n"); | |
| 272 | + | |
| 273 | + /* | |
| 274 | + * On Cherry Trail platforms (hrv == 3), do not register the | |
| 275 | + * input device if there is an "INTCFD9" or "ACPI0011" gpio | |
| 276 | + * button ACPI device, as that handles the power button too, | |
| 277 | + * and otherwise we end up reporting all presses twice. | |
| 278 | + */ | |
| 279 | + if (hrv == 3 && (acpi_dev_present("INTCFD9", NULL, -1) || | |
| 280 | + acpi_dev_present("ACPI0011", NULL, -1))) | |
| 281 | + return false; | |
| 282 | + | |
| 283 | + } | |
| 284 | + | |
| 285 | + return true; | |
| 286 | +} | |
| 287 | +#else | |
| 288 | +static bool axp20x_pek_should_register_input(struct axp20x_pek *axp20x_pek, | |
| 289 | + struct platform_device *pdev) | |
| 290 | +{ | |
| 291 | + return true; | |
| 292 | +} | |
| 293 | +#endif | |
| 294 | + | |
| 259 | 295 | static int axp20x_pek_probe(struct platform_device *pdev) |
| 260 | 296 | { |
| 261 | 297 | struct axp20x_pek *axp20x_pek; |
| @@ -268,13 +304,7 @@ static int axp20x_pek_probe(struct platform_device *pdev) · 6 unmodified lines | ||
| 268 | 304 | |
| 269 | 305 | axp20x_pek->axp20x = dev_get_drvdata(pdev->dev.parent); |
| 270 | 306 | |
| 271 | − /* | |
| 272 | − * Do not register the input device if there is an "INTCFD9" | |
| 273 | − * gpio button ACPI device, that handles the power button too, | |
| 274 | − * and otherwise we end up reporting all presses twice. | |
| 275 | − */ | |
| 276 | − if (!acpi_dev_found("INTCFD9") || | |
| 277 | − !IS_ENABLED(CONFIG_INPUT_SOC_BUTTON_ARRAY)) { | |
| 307 | + if (axp20x_pek_should_register_input(axp20x_pek, pdev)) { | |
| 278 | 308 | error = axp20x_pek_probe_input_device(axp20x_pek, pdev); |
| 279 | 309 | if (error) |
| 280 | 310 | return error; |
| @@ -1118,8 +1118,10 @@ static int elantech_get_resolution_v4(struct psmouse *psmouse, · 1117 unmodified lines | ||
| 1118 | 1118 | * Asus UX32VD 0x361f02 00, 15, 0e clickpad |
| 1119 | 1119 | * Avatar AVIU-145A2 0x361f00 ? clickpad |
| 1120 | 1120 | * Fujitsu LIFEBOOK E544 0x470f00 d0, 12, 09 2 hw buttons |
| 1121 | + * Fujitsu LIFEBOOK E546 0x470f00 50, 12, 09 2 hw buttons | |
| 1121 | 1122 | * Fujitsu LIFEBOOK E547 0x470f00 50, 12, 09 2 hw buttons |
| 1122 | 1123 | * Fujitsu LIFEBOOK E554 0x570f01 40, 14, 0c 2 hw buttons |
| 1124 | + * Fujitsu LIFEBOOK E557 0x570f01 40, 14, 0c 2 hw buttons | |
| 1123 | 1125 | * Fujitsu T725 0x470f01 05, 12, 09 2 hw buttons |
| 1124 | 1126 | * Fujitsu H730 0x570f00 c0, 14, 0c 3 hw buttons (**) |
| 1125 | 1127 | * Gigabyte U2442 0x450f01 58, 17, 0c 2 hw buttons |
| @@ -1524,6 +1526,13 @@ static const struct dmi_system_id elantech_dmi_force_crc_enabled[] = { · 398 unmodified lines | ||
| 1524 | 1526 | DMI_MATCH(DMI_PRODUCT_NAME, "LIFEBOOK E544"), |
| 1525 | 1527 | }, |
| 1526 | 1528 | }, |
| 1529 | + { | |
| 1530 | + /* Fujitsu LIFEBOOK E546 does not work with crc_enabled == 0 */ | |
| 1531 | + .matches = { | |
| 1532 | + DMI_MATCH(DMI_SYS_VENDOR, "FUJITSU"), | |
| 1533 | + DMI_MATCH(DMI_PRODUCT_NAME, "LIFEBOOK E546"), | |
| 1534 | + }, | |
| 1535 | + }, | |
| 1527 | 1536 | { |
| 1528 | 1537 | /* Fujitsu LIFEBOOK E547 does not work with crc_enabled == 0 */ |
| 1529 | 1538 | .matches = { |
| @@ -1545,6 +1554,13 @@ static const struct dmi_system_id elantech_dmi_force_crc_enabled[] = { · 15 unmodified lines | ||
| 1545 | 1554 | DMI_MATCH(DMI_PRODUCT_NAME, "LIFEBOOK E556"), |
| 1546 | 1555 | }, |
| 1547 | 1556 | }, |
| 1557 | + { | |
| 1558 | + /* Fujitsu LIFEBOOK E557 does not work with crc_enabled == 0 */ | |
| 1559 | + .matches = { | |
| 1560 | + DMI_MATCH(DMI_SYS_VENDOR, "FUJITSU"), | |
| 1561 | + DMI_MATCH(DMI_PRODUCT_NAME, "LIFEBOOK E557"), | |
| 1562 | + }, | |
| 1563 | + }, | |
| 1548 | 1564 | { |
| 1549 | 1565 | /* Fujitsu LIFEBOOK U745 does not work with crc_enabled == 0 */ |
| 1550 | 1566 | .matches = { |
| @@ -176,6 +176,12 @@ static const char * const smbus_pnp_ids[] = { · 175 unmodified lines | ||
| 176 | 176 | NULL |
| 177 | 177 | }; |
| 178 | 178 | |
| 179 | +static const char * const forcepad_pnp_ids[] = { | |
| 180 | + "SYN300D", | |
| 181 | + "SYN3014", | |
| 182 | + NULL | |
| 183 | +}; | |
| 184 | + | |
| 179 | 185 | /* |
| 180 | 186 | * Send a command to the synpatics touchpad by special commands |
| 181 | 187 | */ |
| @@ -397,6 +403,8 @@ static int synaptics_query_hardware(struct psmouse *psmouse, · 215 unmodified lines | ||
| 397 | 403 | { |
| 398 | 404 | int error; |
| 399 | 405 | |
| 406 | + memset(info, 0, sizeof(*info)); | |
| 407 | + | |
| 400 | 408 | error = synaptics_identify(psmouse, info); |
| 401 | 409 | if (error) |
| 402 | 410 | return error; |
| @@ -480,13 +488,6 @@ static const struct min_max_quirk min_max_pnpid_table[] = { · 77 unmodified lines | ||
| 480 | 488 | { } |
| 481 | 489 | }; |
| 482 | 490 | |
| 483 | −/* This list has been kindly provided by Synaptics. */ | |
| 484 | −static const char * const forcepad_pnp_ids[] = { | |
| 485 | − "SYN300D", | |
| 486 | − "SYN3014", | |
| 487 | − NULL | |
| 488 | −}; | |
| 489 | − | |
| 490 | 491 | /***************************************************************************** |
| 491 | 492 | * Synaptics communications functions |
| 492 | 493 | ****************************************************************************/ |
| @@ -1687,7 +1688,8 @@ enum { · 1194 unmodified lines | ||
| 1687 | 1688 | SYNAPTICS_INTERTOUCH_ON, |
| 1688 | 1689 | }; |
| 1689 | 1690 | |
| 1690 | −static int synaptics_intertouch = SYNAPTICS_INTERTOUCH_NOT_SET; | |
| 1691 | +static int synaptics_intertouch = IS_ENABLED(CONFIG_RMI4_SMB) ? | |
| 1692 | + SYNAPTICS_INTERTOUCH_NOT_SET : SYNAPTICS_INTERTOUCH_OFF; | |
| 1691 | 1693 | module_param_named(synaptics_intertouch, synaptics_intertouch, int, 0644); |
| 1692 | 1694 | MODULE_PARM_DESC(synaptics_intertouch, "Use a secondary bus for the Synaptics device."); |
| 1693 | 1695 | |
| @@ -1737,8 +1739,16 @@ static int synaptics_setup_intertouch(struct psmouse *psmouse, · 43 unmodified lines | ||
| 1737 | 1739 | |
| 1738 | 1740 | if (synaptics_intertouch == SYNAPTICS_INTERTOUCH_NOT_SET) { |
| 1739 | 1741 | if (!psmouse_matches_pnp_id(psmouse, topbuttonpad_pnp_ids) && |
| 1740 | − !psmouse_matches_pnp_id(psmouse, smbus_pnp_ids)) | |
| 1742 | + !psmouse_matches_pnp_id(psmouse, smbus_pnp_ids)) { | |
| 1743 | + | |
| 1744 | + if (!psmouse_matches_pnp_id(psmouse, forcepad_pnp_ids)) | |
| 1745 | + psmouse_info(psmouse, | |
| 1746 | + "Your touchpad (%s) says it can support a different bus. " | |
| 1747 | + "If i2c-hid and hid-rmi are not used, you might want to try setting psmouse.synaptics_intertouch to 1 and report this to linux-input@vger.kernel.org.\n", | |
| 1748 | + psmouse->ps2dev.serio->firmware_id); | |
| 1749 | + | |
| 1741 | 1750 | return -ENXIO; |
| 1751 | + } | |
| 1742 | 1752 | } |
| 1743 | 1753 | |
| 1744 | 1754 | psmouse_info(psmouse, "Trying to set up SMBus access\n"); |
| @@ -1810,6 +1820,15 @@ int synaptics_init(struct psmouse *psmouse) · 65 unmodified lines | ||
| 1810 | 1820 | } |
| 1811 | 1821 | |
| 1812 | 1822 | if (SYN_CAP_INTERTOUCH(info.ext_cap_0c)) { |
| 1823 | + if ((!IS_ENABLED(CONFIG_RMI4_SMB) || | |
| 1824 | + !IS_ENABLED(CONFIG_MOUSE_PS2_SYNAPTICS_SMBUS)) && | |
| 1825 | + /* Forcepads need F21, which is not ready */ | |
| 1826 | + !psmouse_matches_pnp_id(psmouse, forcepad_pnp_ids)) { | |
| 1827 | + psmouse_warn(psmouse, | |
| 1828 | + "The touchpad can support a better bus than the too old PS/2 protocol. " | |
| 1829 | + "Make sure MOUSE_PS2_SYNAPTICS_SMBUS and RMI4_SMB are enabled to get a better touchpad experience.\n"); | |
| 1830 | + } | |
| 1831 | + | |
| 1813 | 1832 | error = synaptics_setup_intertouch(psmouse, &info, true); |
| 1814 | 1833 | if (!error) |
| 1815 | 1834 | return PSMOUSE_SYNAPTICS_SMBUS; |
| @@ -146,7 +146,7 @@ static int rmi_f03_register_pt(struct f03_data *f03) · 145 unmodified lines | ||
| 146 | 146 | if (!serio) |
| 147 | 147 | return -ENOMEM; |
| 148 | 148 | |
| 149 | − serio->id.type = SERIO_8042; | |
| 149 | + serio->id.type = SERIO_PS_PSTHRU; | |
| 150 | 150 | serio->write = rmi_f03_pt_write; |
| 151 | 151 | serio->port_data = f03; |
| 152 | 152 | |
| @@ -526,6 +526,7 @@ static int __maybe_unused silead_ts_suspend(struct device *dev) · 525 unmodified lines | ||
| 526 | 526 | { |
| 527 | 527 | struct i2c_client *client = to_i2c_client(dev); |
| 528 | 528 | |
| 529 | + disable_irq(client->irq); | |
| 529 | 530 | silead_ts_set_power(client, SILEAD_POWER_OFF); |
| 530 | 531 | return 0; |
| 531 | 532 | } |
| @@ -551,6 +552,8 @@ static int __maybe_unused silead_ts_resume(struct device *dev) · 19 unmodified lines | ||
| 551 | 552 | return -ENODEV; |
| 552 | 553 | } |
| 553 | 554 | |
| 555 | + enable_irq(client->irq); | |
| 556 | + | |
| 554 | 557 | return 0; |
| 555 | 558 | } |
| 556 | 559 | |
| @@ -118,6 +118,7 @@ static const struct iommu_ops · 117 unmodified lines | ||
| 118 | 118 | |
| 119 | 119 | ops = iommu_ops_from_fwnode(fwnode); |
| 120 | 120 | if ((ops && !ops->of_xlate) || |
| 121 | + !of_device_is_available(iommu_spec->np) || | |
| 121 | 122 | (!ops && !of_iommu_driver_present(iommu_spec->np))) |
| 122 | 123 | return NULL; |
| 123 | 124 | |
| @@ -236,6 +237,12 @@ const struct iommu_ops *of_iommu_configure(struct device *dev, · 112 unmodified lines | ||
| 236 | 237 | ops = ERR_PTR(err); |
| 237 | 238 | } |
| 238 | 239 | |
| 240 | + /* Ignore all other errors apart from EPROBE_DEFER */ | |
| 241 | + if (IS_ERR(ops) && (PTR_ERR(ops) != -EPROBE_DEFER)) { | |
| 242 | + dev_dbg(dev, "Adding to IOMMU failed: %ld\n", PTR_ERR(ops)); | |
| 243 | + ops = NULL; | |
| 244 | + } | |
| 245 | + | |
| 239 | 246 | return ops; |
| 240 | 247 | } |
| 241 | 248 | |
| @@ -142,7 +142,7 @@ static struct irq_chip xtensa_mx_irq_chip = { · 141 unmodified lines | ||
| 142 | 142 | int __init xtensa_mx_init_legacy(struct device_node *interrupt_parent) |
| 143 | 143 | { |
| 144 | 144 | struct irq_domain *root_domain = |
| 145 | − irq_domain_add_legacy(NULL, NR_IRQS, 0, 0, | |
| 145 | + irq_domain_add_legacy(NULL, NR_IRQS - 1, 1, 0, | |
| 146 | 146 | &xtensa_mx_irq_domain_ops, |
| 147 | 147 | &xtensa_mx_irq_chip); |
| 148 | 148 | irq_set_default_host(root_domain); |
| @@ -89,7 +89,7 @@ static struct irq_chip xtensa_irq_chip = { · 88 unmodified lines | ||
| 89 | 89 | int __init xtensa_pic_init_legacy(struct device_node *interrupt_parent) |
| 90 | 90 | { |
| 91 | 91 | struct irq_domain *root_domain = |
| 92 | − irq_domain_add_legacy(NULL, NR_IRQS, 0, 0, | |
| 92 | + irq_domain_add_legacy(NULL, NR_IRQS - 1, 1, 0, | |
| 93 | 93 | &xtensa_irq_domain_ops, &xtensa_irq_chip); |
| 94 | 94 | irq_set_default_host(root_domain); |
| 95 | 95 | return 0; |
| @@ -2364,7 +2364,7 @@ static struct ippp_ccp_reset_state *isdn_ppp_ccp_reset_alloc_state(struct ippp_s · 2363 unmodified lines | ||
| 2364 | 2364 | id); |
| 2365 | 2365 | return NULL; |
| 2366 | 2366 | } else { |
| 2367 | − rs = kzalloc(sizeof(struct ippp_ccp_reset_state), GFP_KERNEL); | |
| 2367 | + rs = kzalloc(sizeof(struct ippp_ccp_reset_state), GFP_ATOMIC); | |
| 2368 | 2368 | if (!rs) |
| 2369 | 2369 | return NULL; |
| 2370 | 2370 | rs->state = CCPResetIdle; |
| @@ -75,7 +75,7 @@ send_socklist(struct mISDN_sock_list *sl, struct sk_buff *skb) · 74 unmodified lines | ||
| 75 | 75 | if (sk->sk_state != MISDN_BOUND) |
| 76 | 76 | continue; |
| 77 | 77 | if (!cskb) |
| 78 | − cskb = skb_copy(skb, GFP_KERNEL); | |
| 78 | + cskb = skb_copy(skb, GFP_ATOMIC); | |
| 79 | 79 | if (!cskb) { |
| 80 | 80 | printk(KERN_WARNING "%s no skb\n", __func__); |
| 81 | 81 | break; |
| @@ -242,7 +242,7 @@ static int bcm6328_hwled(struct device *dev, struct device_node *nc, u32 reg, · 241 unmodified lines | ||
| 242 | 242 | |
| 243 | 243 | spin_lock_irqsave(lock, flags); |
| 244 | 244 | val = bcm6328_led_read(addr); |
| 245 | − val |= (BIT(reg) << (((sel % 4) * 4) + 16)); | |
| 245 | + val |= (BIT(reg % 4) << (((sel % 4) * 4) + 16)); | |
| 246 | 246 | bcm6328_led_write(addr, val); |
| 247 | 247 | spin_unlock_irqrestore(lock, flags); |
| 248 | 248 | } |
| @@ -269,7 +269,7 @@ static int bcm6328_hwled(struct device *dev, struct device_node *nc, u32 reg, · 20 unmodified lines | ||
| 269 | 269 | |
| 270 | 270 | spin_lock_irqsave(lock, flags); |
| 271 | 271 | val = bcm6328_led_read(addr); |
| 272 | − val |= (BIT(reg) << ((sel % 4) * 4)); | |
| 272 | + val |= (BIT(reg % 4) << ((sel % 4) * 4)); | |
| 273 | 273 | bcm6328_led_write(addr, val); |
| 274 | 274 | spin_unlock_irqrestore(lock, flags); |
| 275 | 275 | } |
| @@ -20,7 +20,6 @@ · 19 unmodified lines | ||
| 20 | 20 | #include <linux/sched/loadavg.h> |
| 21 | 21 | #include <linux/leds.h> |
| 22 | 22 | #include <linux/reboot.h> |
| 23 | −#include <linux/suspend.h> | |
| 24 | 23 | #include "../leds.h" |
| 25 | 24 | |
| 26 | 25 | static int panic_heartbeats; |
| @@ -163,30 +162,6 @@ static struct led_trigger heartbeat_led_trigger = { · 136 unmodified lines | ||
| 163 | 162 | .deactivate = heartbeat_trig_deactivate, |
| 164 | 163 | }; |
| 165 | 164 | |
| 166 | −static int heartbeat_pm_notifier(struct notifier_block *nb, | |
| 167 | − unsigned long pm_event, void *unused) | |
| 168 | −{ | |
| 169 | − int rc; | |
| 170 | − | |
| 171 | − switch (pm_event) { | |
| 172 | − case PM_SUSPEND_PREPARE: | |
| 173 | − case PM_HIBERNATION_PREPARE: | |
| 174 | − case PM_RESTORE_PREPARE: | |
| 175 | − led_trigger_unregister(&heartbeat_led_trigger); | |
| 176 | − break; | |
| 177 | − case PM_POST_SUSPEND: | |
| 178 | − case PM_POST_HIBERNATION: | |
| 179 | − case PM_POST_RESTORE: | |
| 180 | − rc = led_trigger_register(&heartbeat_led_trigger); | |
| 181 | − if (rc) | |
| 182 | − pr_err("could not re-register heartbeat trigger\n"); | |
| 183 | − break; | |
| 184 | − default: | |
| 185 | − break; | |
| 186 | − } | |
| 187 | − return NOTIFY_DONE; | |
| 188 | −} | |
| 189 | − | |
| 190 | 165 | static int heartbeat_reboot_notifier(struct notifier_block *nb, |
| 191 | 166 | unsigned long code, void *unused) |
| 192 | 167 | { |
| @@ -201,10 +176,6 @@ static int heartbeat_panic_notifier(struct notifier_block *nb, · 8 unmodified lines | ||
| 201 | 176 | return NOTIFY_DONE; |
| 202 | 177 | } |
| 203 | 178 | |
| 204 | −static struct notifier_block heartbeat_pm_nb = { | |
| 205 | − .notifier_call = heartbeat_pm_notifier, | |
| 206 | −}; | |
| 207 | − | |
| 208 | 179 | static struct notifier_block heartbeat_reboot_nb = { |
| 209 | 180 | .notifier_call = heartbeat_reboot_notifier, |
| 210 | 181 | }; |
| @@ -221,14 +192,12 @@ static int __init heartbeat_trig_init(void) · 10 unmodified lines | ||
| 221 | 192 | atomic_notifier_chain_register(&panic_notifier_list, |
| 222 | 193 | &heartbeat_panic_nb); |
| 223 | 194 | register_reboot_notifier(&heartbeat_reboot_nb); |
| 224 | − register_pm_notifier(&heartbeat_pm_nb); | |
| 225 | 195 | } |
| 226 | 196 | return rc; |
| 227 | 197 | } |
| 228 | 198 | |
| 229 | 199 | static void __exit heartbeat_trig_exit(void) |
| 230 | 200 | { |
| 231 | − unregister_pm_notifier(&heartbeat_pm_nb); | |
| 232 | 201 | unregister_reboot_notifier(&heartbeat_reboot_nb); |
| 233 | 202 | atomic_notifier_chain_unregister(&panic_notifier_list, |
| 234 | 203 | &heartbeat_panic_nb); |
| @@ -485,10 +485,10 @@ void bitmap_print_sb(struct bitmap *bitmap) · 484 unmodified lines | ||
| 485 | 485 | pr_debug(" magic: %08x\n", le32_to_cpu(sb->magic)); |
| 486 | 486 | pr_debug(" version: %d\n", le32_to_cpu(sb->version)); |
| 487 | 487 | pr_debug(" uuid: %08x.%08x.%08x.%08x\n", |
| 488 | − *(__u32 *)(sb->uuid+0), | |
| 489 | − *(__u32 *)(sb->uuid+4), | |
| 490 | − *(__u32 *)(sb->uuid+8), | |
| 491 | − *(__u32 *)(sb->uuid+12)); | |
| 488 | + le32_to_cpu(*(__u32 *)(sb->uuid+0)), | |
| 489 | + le32_to_cpu(*(__u32 *)(sb->uuid+4)), | |
| 490 | + le32_to_cpu(*(__u32 *)(sb->uuid+8)), | |
| 491 | + le32_to_cpu(*(__u32 *)(sb->uuid+12))); | |
| 492 | 492 | pr_debug(" events: %llu\n", |
| 493 | 493 | (unsigned long long) le64_to_cpu(sb->events)); |
| 494 | 494 | pr_debug("events cleared: %llu\n", |
| @@ -1334,7 +1334,7 @@ int dm_bufio_issue_flush(struct dm_bufio_client *c) · 1333 unmodified lines | ||
| 1334 | 1334 | { |
| 1335 | 1335 | struct dm_io_request io_req = { |
| 1336 | 1336 | .bi_op = REQ_OP_WRITE, |
| 1337 | − .bi_op_flags = REQ_PREFLUSH, | |
| 1337 | + .bi_op_flags = REQ_PREFLUSH | REQ_SYNC, | |
| 1338 | 1338 | .mem.type = DM_IO_KMEM, |
| 1339 | 1339 | .mem.ptr.addr = NULL, |
| 1340 | 1340 | .client = c->dm_io, |
| @@ -783,7 +783,8 @@ static void write_journal(struct dm_integrity_c *ic, unsigned commit_start, unsi · 782 unmodified lines | ||
| 783 | 783 | for (i = 0; i < commit_sections; i++) |
| 784 | 784 | rw_section_mac(ic, commit_start + i, true); |
| 785 | 785 | } |
| 786 | − rw_journal(ic, REQ_OP_WRITE, REQ_FUA, commit_start, commit_sections, &io_comp); | |
| 786 | + rw_journal(ic, REQ_OP_WRITE, REQ_FUA | REQ_SYNC, commit_start, | |
| 787 | + commit_sections, &io_comp); | |
| 787 | 788 | } else { |
| 788 | 789 | unsigned to_end; |
| 789 | 790 | io_comp.in_flight = (atomic_t)ATOMIC_INIT(2); |
| @@ -2374,21 +2375,6 @@ static void dm_integrity_set(struct dm_target *ti, struct dm_integrity_c *ic) · 1584 unmodified lines | ||
| 2374 | 2375 | blk_queue_max_integrity_segments(disk->queue, UINT_MAX); |
| 2375 | 2376 | } |
| 2376 | 2377 | |
| 2377 | −/* FIXME: use new kvmalloc */ | |
| 2378 | −static void *dm_integrity_kvmalloc(size_t size, gfp_t gfp) | |
| 2379 | −{ | |
| 2380 | − void *ptr = NULL; | |
| 2381 | − | |
| 2382 | − if (size <= PAGE_SIZE) | |
| 2383 | − ptr = kmalloc(size, GFP_KERNEL | gfp); | |
| 2384 | − if (!ptr && size <= KMALLOC_MAX_SIZE) | |
| 2385 | − ptr = kmalloc(size, GFP_KERNEL | __GFP_NOWARN | __GFP_NORETRY | gfp); | |
| 2386 | − if (!ptr) | |
| 2387 | − ptr = __vmalloc(size, GFP_KERNEL | gfp, PAGE_KERNEL); | |
| 2388 | − | |
| 2389 | − return ptr; | |
| 2390 | −} | |
| 2391 | − | |
| 2392 | 2378 | static void dm_integrity_free_page_list(struct dm_integrity_c *ic, struct page_list *pl) |
| 2393 | 2379 | { |
| 2394 | 2380 | unsigned i; |
| @@ -2407,7 +2393,7 @@ static struct page_list *dm_integrity_alloc_page_list(struct dm_integrity_c *ic) · 12 unmodified lines | ||
| 2407 | 2393 | struct page_list *pl; |
| 2408 | 2394 | unsigned i; |
| 2409 | 2395 | |
| 2410 | − pl = dm_integrity_kvmalloc(page_list_desc_size, __GFP_ZERO); | |
| 2396 | + pl = kvmalloc(page_list_desc_size, GFP_KERNEL | __GFP_ZERO); | |
| 2411 | 2397 | if (!pl) |
| 2412 | 2398 | return NULL; |
| 2413 | 2399 | |
| @@ -2437,7 +2423,7 @@ static struct scatterlist **dm_integrity_alloc_journal_scatterlist(struct dm_int · 23 unmodified lines | ||
| 2437 | 2423 | struct scatterlist **sl; |
| 2438 | 2424 | unsigned i; |
| 2439 | 2425 | |
| 2440 | − sl = dm_integrity_kvmalloc(ic->journal_sections * sizeof(struct scatterlist *), __GFP_ZERO); | |
| 2426 | + sl = kvmalloc(ic->journal_sections * sizeof(struct scatterlist *), GFP_KERNEL | __GFP_ZERO); | |
| 2441 | 2427 | if (!sl) |
| 2442 | 2428 | return NULL; |
| 2443 | 2429 | |
| @@ -2453,7 +2439,7 @@ static struct scatterlist **dm_integrity_alloc_journal_scatterlist(struct dm_int · 9 unmodified lines | ||
| 2453 | 2439 | |
| 2454 | 2440 | n_pages = (end_index - start_index + 1); |
| 2455 | 2441 | |
| 2456 | − s = dm_integrity_kvmalloc(n_pages * sizeof(struct scatterlist), 0); | |
| 2442 | + s = kvmalloc(n_pages * sizeof(struct scatterlist), GFP_KERNEL); | |
| 2457 | 2443 | if (!s) { |
| 2458 | 2444 | dm_integrity_free_journal_scatterlist(ic, sl); |
| 2459 | 2445 | return NULL; |
| @@ -2617,7 +2603,7 @@ static int create_journal(struct dm_integrity_c *ic, char **error) · 157 unmodified lines | ||
| 2617 | 2603 | goto bad; |
| 2618 | 2604 | } |
| 2619 | 2605 | |
| 2620 | − sg = dm_integrity_kvmalloc((ic->journal_pages + 1) * sizeof(struct scatterlist), 0); | |
| 2606 | + sg = kvmalloc((ic->journal_pages + 1) * sizeof(struct scatterlist), GFP_KERNEL); | |
| 2621 | 2607 | if (!sg) { |
| 2622 | 2608 | *error = "Unable to allocate sg list"; |
| 2623 | 2609 | r = -ENOMEM; |
| @@ -2673,7 +2659,7 @@ static int create_journal(struct dm_integrity_c *ic, char **error) · 49 unmodified lines | ||
| 2673 | 2659 | r = -ENOMEM; |
| 2674 | 2660 | goto bad; |
| 2675 | 2661 | } |
| 2676 | − ic->sk_requests = dm_integrity_kvmalloc(ic->journal_sections * sizeof(struct skcipher_request *), __GFP_ZERO); | |
| 2662 | + ic->sk_requests = kvmalloc(ic->journal_sections * sizeof(struct skcipher_request *), GFP_KERNEL | __GFP_ZERO); | |
| 2677 | 2663 | if (!ic->sk_requests) { |
| 2678 | 2664 | *error = "Unable to allocate sk requests"; |
| 2679 | 2665 | r = -ENOMEM; |
| @@ -2740,7 +2726,7 @@ retest_commit_id: · 60 unmodified lines | ||
| 2740 | 2726 | r = -ENOMEM; |
| 2741 | 2727 | goto bad; |
| 2742 | 2728 | } |
| 2743 | − ic->journal_tree = dm_integrity_kvmalloc(journal_tree_size, 0); | |
| 2729 | + ic->journal_tree = kvmalloc(journal_tree_size, GFP_KERNEL); | |
| 2744 | 2730 | if (!ic->journal_tree) { |
| 2745 | 2731 | *error = "Could not allocate memory for journal tree"; |
| 2746 | 2732 | r = -ENOMEM; |
| @@ -1710,12 +1710,13 @@ static int copy_params(struct dm_ioctl __user *user, struct dm_ioctl *param_kern · 1709 unmodified lines | ||
| 1710 | 1710 | } |
| 1711 | 1711 | |
| 1712 | 1712 | /* |
| 1713 | − * Try to avoid low memory issues when a device is suspended. | |
| 1713 | + * Use __GFP_HIGH to avoid low memory issues when a device is | |
| 1714 | + * suspended and the ioctl is needed to resume it. | |
| 1714 | 1715 | * Use kmalloc() rather than vmalloc() when we can. |
| 1715 | 1716 | */ |
| 1716 | 1717 | dmi = NULL; |
| 1717 | 1718 | noio_flag = memalloc_noio_save(); |
| 1718 | − dmi = kvmalloc(param_kernel->data_size, GFP_KERNEL); | |
| 1719 | + dmi = kvmalloc(param_kernel->data_size, GFP_KERNEL | __GFP_HIGH); | |
| 1719 | 1720 | memalloc_noio_restore(noio_flag); |
| 1720 | 1721 | |
| 1721 | 1722 | if (!dmi) { |
| @@ -260,7 +260,7 @@ static int mirror_flush(struct dm_target *ti) · 259 unmodified lines | ||
| 260 | 260 | struct mirror *m; |
| 261 | 261 | struct dm_io_request io_req = { |
| 262 | 262 | .bi_op = REQ_OP_WRITE, |
| 263 | − .bi_op_flags = REQ_PREFLUSH, | |
| 263 | + .bi_op_flags = REQ_PREFLUSH | REQ_SYNC, | |
| 264 | 264 | .mem.type = DM_IO_KMEM, |
| 265 | 265 | .mem.ptr.addr = NULL, |
| 266 | 266 | .client = ms->io_client, |
| @@ -741,7 +741,8 @@ static void persistent_commit_exception(struct dm_exception_store *store, · 740 unmodified lines | ||
| 741 | 741 | /* |
| 742 | 742 | * Commit exceptions to disk. |
| 743 | 743 | */ |
| 744 | − if (ps->valid && area_io(ps, REQ_OP_WRITE, REQ_PREFLUSH | REQ_FUA)) | |
| 744 | + if (ps->valid && area_io(ps, REQ_OP_WRITE, | |
| 745 | + REQ_PREFLUSH | REQ_FUA | REQ_SYNC)) | |
| 745 | 746 | ps->valid = 0; |
| 746 | 747 | |
| 747 | 748 | /* |
| @@ -166,7 +166,7 @@ static int verity_hash_init(struct dm_verity *v, struct ahash_request *req, · 165 unmodified lines | ||
| 166 | 166 | return r; |
| 167 | 167 | } |
| 168 | 168 | |
| 169 | − if (likely(v->version >= 1)) | |
| 169 | + if (likely(v->salt_size && (v->version >= 1))) | |
| 170 | 170 | r = verity_hash_update(v, req, v->salt, v->salt_size, res); |
| 171 | 171 | |
| 172 | 172 | return r; |
| @@ -177,7 +177,7 @@ static int verity_hash_final(struct dm_verity *v, struct ahash_request *req, · 4 unmodified lines | ||
| 177 | 177 | { |
| 178 | 178 | int r; |
| 179 | 179 | |
| 180 | − if (unlikely(!v->version)) { | |
| 180 | + if (unlikely(v->salt_size && (!v->version))) { | |
| 181 | 181 | r = verity_hash_update(v, req, v->salt, v->salt_size, res); |
| 182 | 182 | |
| 183 | 183 | if (r < 0) { |
| @@ -1657,7 +1657,7 @@ static struct mapped_device *alloc_dev(int minor) · 1656 unmodified lines | ||
| 1657 | 1657 | |
| 1658 | 1658 | bio_init(&md->flush_bio, NULL, 0); |
| 1659 | 1659 | md->flush_bio.bi_bdev = md->bdev; |
| 1660 | − md->flush_bio.bi_opf = REQ_OP_WRITE | REQ_PREFLUSH; | |
| 1660 | + md->flush_bio.bi_opf = REQ_OP_WRITE | REQ_PREFLUSH | REQ_SYNC; | |
| 1661 | 1661 | |
| 1662 | 1662 | dm_stats_init(&md->stats); |
| 1663 | 1663 | |
| @@ -1311,8 +1311,10 @@ static int add_new_disk(struct mddev *mddev, struct md_rdev *rdev) · 1310 unmodified lines | ||
| 1311 | 1311 | cmsg.raid_slot = cpu_to_le32(rdev->desc_nr); |
| 1312 | 1312 | lock_comm(cinfo, 1); |
| 1313 | 1313 | ret = __sendmsg(cinfo, &cmsg); |
| 1314 | − if (ret) | |
| 1314 | + if (ret) { | |
| 1315 | + unlock_comm(cinfo); | |
| 1315 | 1316 | return ret; |
| 1317 | + } | |
| 1316 | 1318 | cinfo->no_new_dev_lockres->flags |= DLM_LKF_NOQUEUE; |
| 1317 | 1319 | ret = dlm_lock_sync(cinfo->no_new_dev_lockres, DLM_LOCK_EX); |
| 1318 | 1320 | cinfo->no_new_dev_lockres->flags &= ~DLM_LKF_NOQUEUE; |
| @@ -765,7 +765,7 @@ void md_super_write(struct mddev *mddev, struct md_rdev *rdev, · 764 unmodified lines | ||
| 765 | 765 | test_bit(FailFast, &rdev->flags) && |
| 766 | 766 | !test_bit(LastDev, &rdev->flags)) |
| 767 | 767 | ff = MD_FAILFAST; |
| 768 | − bio->bi_opf = REQ_OP_WRITE | REQ_PREFLUSH | REQ_FUA | ff; | |
| 768 | + bio->bi_opf = REQ_OP_WRITE | REQ_SYNC | REQ_PREFLUSH | REQ_FUA | ff; | |
| 769 | 769 | |
| 770 | 770 | atomic_inc(&mddev->pending_writes); |
| 771 | 771 | submit_bio(bio); |
| @@ -5174,6 +5174,18 @@ static void mddev_delayed_delete(struct work_struct *ws) · 4402 unmodified lines | ||
| 5174 | 5174 | |
| 5175 | 5175 | static void no_op(struct percpu_ref *r) {} |
| 5176 | 5176 | |
| 5177 | +int mddev_init_writes_pending(struct mddev *mddev) | |
| 5178 | +{ | |
| 5179 | + if (mddev->writes_pending.percpu_count_ptr) | |
| 5180 | + return 0; | |
| 5181 | + if (percpu_ref_init(&mddev->writes_pending, no_op, 0, GFP_KERNEL) < 0) | |
| 5182 | + return -ENOMEM; | |
| 5183 | + /* We want to start with the refcount at zero */ | |
| 5184 | + percpu_ref_put(&mddev->writes_pending); | |
| 5185 | + return 0; | |
| 5186 | +} | |
| 5187 | +EXPORT_SYMBOL_GPL(mddev_init_writes_pending); | |
| 5188 | + | |
| 5177 | 5189 | static int md_alloc(dev_t dev, char *name) |
| 5178 | 5190 | { |
| 5179 | 5191 | /* |
| @@ -5239,10 +5251,6 @@ static int md_alloc(dev_t dev, char *name) · 59 unmodified lines | ||
| 5239 | 5251 | blk_queue_make_request(mddev->queue, md_make_request); |
| 5240 | 5252 | blk_set_stacking_limits(&mddev->queue->limits); |
| 5241 | 5253 | |
| 5242 | − if (percpu_ref_init(&mddev->writes_pending, no_op, 0, GFP_KERNEL) < 0) | |
| 5243 | − goto abort; | |
| 5244 | − /* We want to start with the refcount at zero */ | |
| 5245 | − percpu_ref_put(&mddev->writes_pending); | |
| 5246 | 5254 | disk = alloc_disk(1 << shift); |
| 5247 | 5255 | if (!disk) { |
| 5248 | 5256 | blk_cleanup_queue(mddev->queue); |
| @@ -648,6 +648,7 @@ extern void md_unregister_thread(struct md_thread **threadp); · 647 unmodified lines | ||
| 648 | 648 | extern void md_wakeup_thread(struct md_thread *thread); |
| 649 | 649 | extern void md_check_recovery(struct mddev *mddev); |
| 650 | 650 | extern void md_reap_sync_thread(struct mddev *mddev); |
| 651 | +extern int mddev_init_writes_pending(struct mddev *mddev); | |
| 651 | 652 | extern void md_write_start(struct mddev *mddev, struct bio *bi); |
| 652 | 653 | extern void md_write_inc(struct mddev *mddev, struct bio *bi); |
| 653 | 654 | extern void md_write_end(struct mddev *mddev); |
| @@ -3063,6 +3063,8 @@ static int raid1_run(struct mddev *mddev) · 3062 unmodified lines | ||
| 3063 | 3063 | mdname(mddev)); |
| 3064 | 3064 | return -EIO; |
| 3065 | 3065 | } |
| 3066 | + if (mddev_init_writes_pending(mddev) < 0) | |
| 3067 | + return -ENOMEM; | |
| 3066 | 3068 | /* |
| 3067 | 3069 | * copy the already verified devices into our private RAID1 |
| 3068 | 3070 | * bookkeeping area. [whatever we allocate in run(), |
| @@ -3611,6 +3611,9 @@ static int raid10_run(struct mddev *mddev) · 3610 unmodified lines | ||
| 3611 | 3611 | int first = 1; |
| 3612 | 3612 | bool discard_supported = false; |
| 3613 | 3613 | |
| 3614 | + if (mddev_init_writes_pending(mddev) < 0) | |
| 3615 | + return -ENOMEM; | |
| 3616 | + | |
| 3614 | 3617 | if (mddev->private == NULL) { |
| 3615 | 3618 | conf = setup_conf(mddev); |
| 3616 | 3619 | if (IS_ERR(conf)) |
| @@ -1782,7 +1782,7 @@ static int r5l_log_write_empty_meta_block(struct r5l_log *log, sector_t pos, · 1781 unmodified lines | ||
| 1782 | 1782 | mb->checksum = cpu_to_le32(crc32c_le(log->uuid_checksum, |
| 1783 | 1783 | mb, PAGE_SIZE)); |
| 1784 | 1784 | if (!sync_page_io(log->rdev, pos, PAGE_SIZE, page, REQ_OP_WRITE, |
| 1785 | − REQ_FUA, false)) { | |
| 1785 | + REQ_SYNC | REQ_FUA, false)) { | |
| 1786 | 1786 | __free_page(page); |
| 1787 | 1787 | return -EIO; |
| 1788 | 1788 | } |
| @@ -2388,7 +2388,7 @@ r5c_recovery_rewrite_data_only_stripes(struct r5l_log *log, · 599 unmodified lines | ||
| 2388 | 2388 | mb->checksum = cpu_to_le32(crc32c_le(log->uuid_checksum, |
| 2389 | 2389 | mb, PAGE_SIZE)); |
| 2390 | 2390 | sync_page_io(log->rdev, ctx->pos, PAGE_SIZE, page, |
| 2391 | − REQ_OP_WRITE, REQ_FUA, false); | |
| 2391 | + REQ_OP_WRITE, REQ_SYNC | REQ_FUA, false); | |
| 2392 | 2392 | sh->log_start = ctx->pos; |
| 2393 | 2393 | list_add_tail(&sh->r5c, &log->stripe_in_journal_list); |
| 2394 | 2394 | atomic_inc(&log->stripe_in_journal_count); |
| @@ -907,8 +907,8 @@ static int ppl_write_empty_header(struct ppl_log *log) · 906 unmodified lines | ||
| 907 | 907 | pplhdr->checksum = cpu_to_le32(~crc32c_le(~0, pplhdr, PAGE_SIZE)); |
| 908 | 908 | |
| 909 | 909 | if (!sync_page_io(rdev, rdev->ppl.sector - rdev->data_offset, |
| 910 | − PPL_HEADER_SIZE, page, REQ_OP_WRITE | REQ_FUA, 0, | |
| 911 | − false)) { | |
| 910 | + PPL_HEADER_SIZE, page, REQ_OP_WRITE | REQ_SYNC | | |
| 911 | + REQ_FUA, 0, false)) { | |
| 912 | 912 | md_error(rdev->mddev, rdev); |
| 913 | 913 | ret = -EIO; |
| 914 | 914 | } |
| @@ -4085,10 +4085,15 @@ static void handle_parity_checks5(struct r5conf *conf, struct stripe_head *sh, · 4084 unmodified lines | ||
| 4085 | 4085 | set_bit(STRIPE_INSYNC, &sh->state); |
| 4086 | 4086 | else { |
| 4087 | 4087 | atomic64_add(STRIPE_SECTORS, &conf->mddev->resync_mismatches); |
| 4088 | − if (test_bit(MD_RECOVERY_CHECK, &conf->mddev->recovery)) | |
| 4088 | + if (test_bit(MD_RECOVERY_CHECK, &conf->mddev->recovery)) { | |
| 4089 | 4089 | /* don't try to repair!! */ |
| 4090 | 4090 | set_bit(STRIPE_INSYNC, &sh->state); |
| 4091 | − else { | |
| 4091 | + pr_warn_ratelimited("%s: mismatch sector in range " | |
| 4092 | + "%llu-%llu\n", mdname(conf->mddev), | |
| 4093 | + (unsigned long long) sh->sector, | |
| 4094 | + (unsigned long long) sh->sector + | |
| 4095 | + STRIPE_SECTORS); | |
| 4096 | + } else { | |
| 4092 | 4097 | sh->check_state = check_state_compute_run; |
| 4093 | 4098 | set_bit(STRIPE_COMPUTE_RUN, &sh->state); |
| 4094 | 4099 | set_bit(STRIPE_OP_COMPUTE_BLK, &s->ops_request); |
| @@ -4237,10 +4242,15 @@ static void handle_parity_checks6(struct r5conf *conf, struct stripe_head *sh, · 142 unmodified lines | ||
| 4237 | 4242 | } |
| 4238 | 4243 | } else { |
| 4239 | 4244 | atomic64_add(STRIPE_SECTORS, &conf->mddev->resync_mismatches); |
| 4240 | − if (test_bit(MD_RECOVERY_CHECK, &conf->mddev->recovery)) | |
| 4245 | + if (test_bit(MD_RECOVERY_CHECK, &conf->mddev->recovery)) { | |
| 4241 | 4246 | /* don't try to repair!! */ |
| 4242 | 4247 | set_bit(STRIPE_INSYNC, &sh->state); |
| 4243 | − else { | |
| 4248 | + pr_warn_ratelimited("%s: mismatch sector in range " | |
| 4249 | + "%llu-%llu\n", mdname(conf->mddev), | |
| 4250 | + (unsigned long long) sh->sector, | |
| 4251 | + (unsigned long long) sh->sector + | |
| 4252 | + STRIPE_SECTORS); | |
| 4253 | + } else { | |
| 4244 | 4254 | int *target = &sh->ops.target; |
| 4245 | 4255 | |
| 4246 | 4256 | sh->ops.target = -1; |
| @@ -7108,6 +7118,9 @@ static int raid5_run(struct mddev *mddev) · 2861 unmodified lines | ||
| 7108 | 7118 | long long min_offset_diff = 0; |
| 7109 | 7119 | int first = 1; |
| 7110 | 7120 | |
| 7121 | + if (mddev_init_writes_pending(mddev) < 0) | |
| 7122 | + return -ENOMEM; | |
| 7123 | + | |
| 7111 | 7124 | if (mddev->recovery_cp != MaxSector) |
| 7112 | 7125 | pr_notice("md/raid:%s: not clean -- starting background reconstruction\n", |
| 7113 | 7126 | mdname(mddev)); |
| @@ -272,16 +272,10 @@ static long cec_receive(struct cec_adapter *adap, struct cec_fh *fh, · 271 unmodified lines | ||
| 272 | 272 | bool block, struct cec_msg __user *parg) |
| 273 | 273 | { |
| 274 | 274 | struct cec_msg msg = {}; |
| 275 | − long err = 0; | |
| 275 | + long err; | |
| 276 | 276 | |
| 277 | 277 | if (copy_from_user(&msg, parg, sizeof(msg))) |
| 278 | 278 | return -EFAULT; |
| 279 | − mutex_lock(&adap->lock); | |
| 280 | − if (!adap->is_configured && fh->mode_follower < CEC_MODE_MONITOR) | |
| 281 | − err = -ENONET; | |
| 282 | − mutex_unlock(&adap->lock); | |
| 283 | − if (err) | |
| 284 | − return err; | |
| 285 | 279 | |
| 286 | 280 | err = cec_receive_msg(fh, &msg, block); |
| 287 | 281 | if (err) |
| @@ -493,10 +493,10 @@ static int vdec_h264_get_param(unsigned long h_vdec, · 492 unmodified lines | ||
| 493 | 493 | } |
| 494 | 494 | |
| 495 | 495 | static struct vdec_common_if vdec_h264_if = { |
| 496 | − vdec_h264_init, | |
| 497 | − vdec_h264_decode, | |
| 498 | − vdec_h264_get_param, | |
| 499 | − vdec_h264_deinit, | |
| 496 | + .init = vdec_h264_init, | |
| 497 | + .decode = vdec_h264_decode, | |
| 498 | + .get_param = vdec_h264_get_param, | |
| 499 | + .deinit = vdec_h264_deinit, | |
| 500 | 500 | }; |
| 501 | 501 | |
| 502 | 502 | struct vdec_common_if *get_h264_dec_comm_if(void); |
| @@ -620,10 +620,10 @@ static void vdec_vp8_deinit(unsigned long h_vdec) · 619 unmodified lines | ||
| 620 | 620 | } |
| 621 | 621 | |
| 622 | 622 | static struct vdec_common_if vdec_vp8_if = { |
| 623 | − vdec_vp8_init, | |
| 624 | − vdec_vp8_decode, | |
| 625 | − vdec_vp8_get_param, | |
| 626 | − vdec_vp8_deinit, | |
| 623 | + .init = vdec_vp8_init, | |
| 624 | + .decode = vdec_vp8_decode, | |
| 625 | + .get_param = vdec_vp8_get_param, | |
| 626 | + .deinit = vdec_vp8_deinit, | |
| 627 | 627 | }; |
| 628 | 628 | |
| 629 | 629 | struct vdec_common_if *get_vp8_dec_comm_if(void); |
| @@ -979,10 +979,10 @@ static int vdec_vp9_get_param(unsigned long h_vdec, · 978 unmodified lines | ||
| 979 | 979 | } |
| 980 | 980 | |
| 981 | 981 | static struct vdec_common_if vdec_vp9_if = { |
| 982 | − vdec_vp9_init, | |
| 983 | − vdec_vp9_decode, | |
| 984 | − vdec_vp9_get_param, | |
| 985 | − vdec_vp9_deinit, | |
| 982 | + .init = vdec_vp9_init, | |
| 983 | + .decode = vdec_vp9_decode, | |
| 984 | + .get_param = vdec_vp9_get_param, | |
| 985 | + .deinit = vdec_vp9_deinit, | |
| 986 | 986 | }; |
| 987 | 987 | |
| 988 | 988 | struct vdec_common_if *get_vp9_dec_comm_if(void); |
| @@ -581,7 +581,7 @@ static int atmel_ebi_probe(struct platform_device *pdev) · 580 unmodified lines | ||
| 581 | 581 | return of_platform_populate(np, NULL, NULL, dev); |
| 582 | 582 | } |
| 583 | 583 | |
| 584 | −static int atmel_ebi_resume(struct device *dev) | |
| 584 | +static __maybe_unused int atmel_ebi_resume(struct device *dev) | |
| 585 | 585 | { |
| 586 | 586 | struct atmel_ebi *ebi = dev_get_drvdata(dev); |
| 587 | 587 | struct atmel_ebi_dev *ebid; |
| @@ -159,11 +159,8 @@ static long afu_ioctl_start_work(struct cxl_context *ctx, · 158 unmodified lines | ||
| 159 | 159 | |
| 160 | 160 | /* Do this outside the status_mutex to avoid a circular dependency with |
| 161 | 161 | * the locking in cxl_mmap_fault() */ |
| 162 | − if (copy_from_user(&work, uwork, | |
| 163 | − sizeof(struct cxl_ioctl_start_work))) { | |
| 164 | − rc = -EFAULT; | |
| 165 | − goto out; | |
| 166 | − } | |
| 162 | + if (copy_from_user(&work, uwork, sizeof(work))) | |
| 163 | + return -EFAULT; | |
| 167 | 164 | |
| 168 | 165 | mutex_lock(&ctx->status_mutex); |
| 169 | 166 | if (ctx->status != OPENED) { |
| @@ -1302,13 +1302,16 @@ int cxl_native_register_psl_err_irq(struct cxl *adapter) · 1301 unmodified lines | ||
| 1302 | 1302 | |
| 1303 | 1303 | void cxl_native_release_psl_err_irq(struct cxl *adapter) |
| 1304 | 1304 | { |
| 1305 | − if (adapter->native->err_virq != irq_find_mapping(NULL, adapter->native->err_hwirq)) | |
| 1305 | + if (adapter->native->err_virq == 0 || | |
| 1306 | + adapter->native->err_virq != | |
| 1307 | + irq_find_mapping(NULL, adapter->native->err_hwirq)) | |
| 1306 | 1308 | return; |
| 1307 | 1309 | |
| 1308 | 1310 | cxl_p1_write(adapter, CXL_PSL_ErrIVTE, 0x0000000000000000); |
| 1309 | 1311 | cxl_unmap_irq(adapter->native->err_virq, adapter); |
| 1310 | 1312 | cxl_ops->release_one_irq(adapter, adapter->native->err_hwirq); |
| 1311 | 1313 | kfree(adapter->irq_name); |
| 1314 | + adapter->native->err_virq = 0; | |
| 1312 | 1315 | } |
| 1313 | 1316 | |
| 1314 | 1317 | int cxl_native_register_serr_irq(struct cxl_afu *afu) |
| @@ -1346,13 +1349,15 @@ int cxl_native_register_serr_irq(struct cxl_afu *afu) · 31 unmodified lines | ||
| 1346 | 1349 | |
| 1347 | 1350 | void cxl_native_release_serr_irq(struct cxl_afu *afu) |
| 1348 | 1351 | { |
| 1349 | − if (afu->serr_virq != irq_find_mapping(NULL, afu->serr_hwirq)) | |
| 1352 | + if (afu->serr_virq == 0 || | |
| 1353 | + afu->serr_virq != irq_find_mapping(NULL, afu->serr_hwirq)) | |
| 1350 | 1354 | return; |
| 1351 | 1355 | |
| 1352 | 1356 | cxl_p1n_write(afu, CXL_PSL_SERR_An, 0x0000000000000000); |
| 1353 | 1357 | cxl_unmap_irq(afu->serr_virq, afu); |
| 1354 | 1358 | cxl_ops->release_one_irq(afu->adapter, afu->serr_hwirq); |
| 1355 | 1359 | kfree(afu->err_irq_name); |
| 1360 | + afu->serr_virq = 0; | |
| 1356 | 1361 | } |
| 1357 | 1362 | |
| 1358 | 1363 | int cxl_native_register_psl_irq(struct cxl_afu *afu) |
| @@ -1375,12 +1380,15 @@ int cxl_native_register_psl_irq(struct cxl_afu *afu) · 16 unmodified lines | ||
| 1375 | 1380 | |
| 1376 | 1381 | void cxl_native_release_psl_irq(struct cxl_afu *afu) |
| 1377 | 1382 | { |
| 1378 | − if (afu->native->psl_virq != irq_find_mapping(NULL, afu->native->psl_hwirq)) | |
| 1383 | + if (afu->native->psl_virq == 0 || | |
| 1384 | + afu->native->psl_virq != | |
| 1385 | + irq_find_mapping(NULL, afu->native->psl_hwirq)) | |
| 1379 | 1386 | return; |
| 1380 | 1387 | |
| 1381 | 1388 | cxl_unmap_irq(afu->native->psl_virq, afu); |
| 1382 | 1389 | cxl_ops->release_one_irq(afu->adapter, afu->native->psl_hwirq); |
| 1383 | 1390 | kfree(afu->psl_irq_name); |
| 1391 | + afu->native->psl_virq = 0; | |
| 1384 | 1392 | } |
| 1385 | 1393 | |
| 1386 | 1394 | static void recover_psl_err(struct cxl_afu *afu, u64 errstat) |
| @@ -763,8 +763,10 @@ static ssize_t modalias_show(struct device *dev, struct device_attribute *a, · 762 unmodified lines | ||
| 763 | 763 | { |
| 764 | 764 | struct mei_cl_device *cldev = to_mei_cl_device(dev); |
| 765 | 765 | const uuid_le *uuid = mei_me_cl_uuid(cldev->me_cl); |
| 766 | + u8 version = mei_me_cl_ver(cldev->me_cl); | |
| 766 | 767 | |
| 767 | − return scnprintf(buf, PAGE_SIZE, "mei:%s:%pUl:", cldev->name, uuid); | |
| 768 | + return scnprintf(buf, PAGE_SIZE, "mei:%s:%pUl:%02X:", | |
| 769 | + cldev->name, uuid, version); | |
| 768 | 770 | } |
| 769 | 771 | static DEVICE_ATTR_RO(modalias); |
| 770 | 772 | |
| @@ -309,6 +309,9 @@ static inline enum xp_retval · 308 unmodified lines | ||
| 309 | 309 | xpc_send(short partid, int ch_number, u32 flags, void *payload, |
| 310 | 310 | u16 payload_size) |
| 311 | 311 | { |
| 312 | + if (!xpc_interface.send) | |
| 313 | + return xpNotLoaded; | |
| 314 | + | |
| 312 | 315 | return xpc_interface.send(partid, ch_number, flags, payload, |
| 313 | 316 | payload_size); |
| 314 | 317 | } |
| @@ -317,6 +320,9 @@ static inline enum xp_retval · 2 unmodified lines | ||
| 317 | 320 | xpc_send_notify(short partid, int ch_number, u32 flags, void *payload, |
| 318 | 321 | u16 payload_size, xpc_notify_func func, void *key) |
| 319 | 322 | { |
| 323 | + if (!xpc_interface.send_notify) | |
| 324 | + return xpNotLoaded; | |
| 325 | + | |
| 320 | 326 | return xpc_interface.send_notify(partid, ch_number, flags, payload, |
| 321 | 327 | payload_size, func, key); |
| 322 | 328 | } |
| @@ -324,12 +330,16 @@ xpc_send_notify(short partid, int ch_number, u32 flags, void *payload, · 1 unmodified line | ||
| 324 | 330 | static inline void |
| 325 | 331 | xpc_received(short partid, int ch_number, void *payload) |
| 326 | 332 | { |
| 327 | − return xpc_interface.received(partid, ch_number, payload); | |
| 333 | + if (xpc_interface.received) | |
| 334 | + xpc_interface.received(partid, ch_number, payload); | |
| 328 | 335 | } |
| 329 | 336 | |
| 330 | 337 | static inline enum xp_retval |
| 331 | 338 | xpc_partid_to_nasids(short partid, void *nasids) |
| 332 | 339 | { |
| 340 | + if (!xpc_interface.partid_to_nasids) | |
| 341 | + return xpNotLoaded; | |
| 342 | + | |
| 333 | 343 | return xpc_interface.partid_to_nasids(partid, nasids); |
| 334 | 344 | } |
| 335 | 345 | |
| @@ -69,23 +69,9 @@ struct xpc_registration xpc_registrations[XPC_MAX_NCHANNELS]; · 68 unmodified lines | ||
| 69 | 69 | EXPORT_SYMBOL_GPL(xpc_registrations); |
| 70 | 70 | |
| 71 | 71 | /* |
| 72 | − * Initialize the XPC interface to indicate that XPC isn't loaded. | |
| 72 | + * Initialize the XPC interface to NULL to indicate that XPC isn't loaded. | |
| 73 | 73 | */ |
| 74 | −static enum xp_retval | |
| 75 | −xpc_notloaded(void) | |
| 76 | −{ | |
| 77 | − return xpNotLoaded; | |
| 78 | −} | |
| 79 | − | |
| 80 | −struct xpc_interface xpc_interface = { | |
| 81 | − (void (*)(int))xpc_notloaded, | |
| 82 | − (void (*)(int))xpc_notloaded, | |
| 83 | − (enum xp_retval(*)(short, int, u32, void *, u16))xpc_notloaded, | |
| 84 | − (enum xp_retval(*)(short, int, u32, void *, u16, xpc_notify_func, | |
| 85 | − void *))xpc_notloaded, | |
| 86 | − (void (*)(short, int, void *))xpc_notloaded, | |
| 87 | − (enum xp_retval(*)(short, void *))xpc_notloaded | |
| 88 | −}; | |
| 74 | +struct xpc_interface xpc_interface = { }; | |
| 89 | 75 | EXPORT_SYMBOL_GPL(xpc_interface); |
| 90 | 76 | |
| 91 | 77 | /* |
| @@ -115,17 +101,7 @@ EXPORT_SYMBOL_GPL(xpc_set_interface); · 23 unmodified lines | ||
| 115 | 101 | void |
| 116 | 102 | xpc_clear_interface(void) |
| 117 | 103 | { |
| 118 | − xpc_interface.connect = (void (*)(int))xpc_notloaded; | |
| 119 | − xpc_interface.disconnect = (void (*)(int))xpc_notloaded; | |
| 120 | − xpc_interface.send = (enum xp_retval(*)(short, int, u32, void *, u16)) | |
| 121 | − xpc_notloaded; | |
| 122 | − xpc_interface.send_notify = (enum xp_retval(*)(short, int, u32, void *, | |
| 123 | − u16, xpc_notify_func, | |
| 124 | − void *))xpc_notloaded; | |
| 125 | − xpc_interface.received = (void (*)(short, int, void *)) | |
| 126 | − xpc_notloaded; | |
| 127 | − xpc_interface.partid_to_nasids = (enum xp_retval(*)(short, void *)) | |
| 128 | − xpc_notloaded; | |
| 104 | + memset(&xpc_interface, 0, sizeof(xpc_interface)); | |
| 129 | 105 | } |
| 130 | 106 | EXPORT_SYMBOL_GPL(xpc_clear_interface); |
| 131 | 107 | |
| @@ -188,7 +164,8 @@ xpc_connect(int ch_number, xpc_channel_func func, void *key, u16 payload_size, · 56 unmodified lines | ||
| 188 | 164 | |
| 189 | 165 | mutex_unlock(®istration->mutex); |
| 190 | 166 | |
| 191 | − xpc_interface.connect(ch_number); | |
| 167 | + if (xpc_interface.connect) | |
| 168 | + xpc_interface.connect(ch_number); | |
| 192 | 169 | |
| 193 | 170 | return xpSuccess; |
| 194 | 171 | } |
| @@ -237,7 +214,8 @@ xpc_disconnect(int ch_number) · 42 unmodified lines | ||
| 237 | 214 | registration->assigned_limit = 0; |
| 238 | 215 | registration->idle_limit = 0; |
| 239 | 216 | |
| 240 | − xpc_interface.disconnect(ch_number); | |
| 217 | + if (xpc_interface.disconnect) | |
| 218 | + xpc_interface.disconnect(ch_number); | |
| 241 | 219 | |
| 242 | 220 | mutex_unlock(®istration->mutex); |
| 243 | 221 | |
| @@ -210,6 +210,15 @@ static void meson_mmc_get_transfer_mode(struct mmc_host *mmc, · 209 unmodified lines | ||
| 210 | 210 | int i; |
| 211 | 211 | bool use_desc_chain_mode = true; |
| 212 | 212 | |
| 213 | + /* | |
| 214 | + * Broken SDIO with AP6255-based WiFi on Khadas VIM Pro has been | |
| 215 | + * reported. For some strange reason this occurs in descriptor | |
| 216 | + * chain mode only. So let's fall back to bounce buffer mode | |
| 217 | + * for command SD_IO_RW_EXTENDED. | |
| 218 | + */ | |
| 219 | + if (mrq->cmd->opcode == SD_IO_RW_EXTENDED) | |
| 220 | + return; | |
| 221 | + | |
| 213 | 222 | for_each_sg(data->sg, sg, data->sg_len, i) |
| 214 | 223 | /* check for 8 byte alignment */ |
| 215 | 224 | if (sg->offset & 7) { |
| @@ -202,7 +202,7 @@ static int nand_ooblayout_free_lp_hamming(struct mtd_info *mtd, int section, · 201 unmodified lines | ||
| 202 | 202 | return 0; |
| 203 | 203 | } |
| 204 | 204 | |
| 205 | −const struct mtd_ooblayout_ops nand_ooblayout_lp_hamming_ops = { | |
| 205 | +static const struct mtd_ooblayout_ops nand_ooblayout_lp_hamming_ops = { | |
| 206 | 206 | .ecc = nand_ooblayout_ecc_lp_hamming, |
| 207 | 207 | .free = nand_ooblayout_free_lp_hamming, |
| 208 | 208 | }; |
| @@ -4361,7 +4361,7 @@ int nand_scan_ident(struct mtd_info *mtd, int maxchips, · 4152 unmodified lines | ||
| 4361 | 4361 | /* Initialize the ->data_interface field. */ |
| 4362 | 4362 | ret = nand_init_data_interface(chip); |
| 4363 | 4363 | if (ret) |
| 4364 | − return ret; | |
| 4364 | + goto err_nand_init; | |
| 4365 | 4365 | |
| 4366 | 4366 | /* |
| 4367 | 4367 | * Setup the data interface correctly on the chip and controller side. |
| @@ -4373,7 +4373,7 @@ int nand_scan_ident(struct mtd_info *mtd, int maxchips, · 5 unmodified lines | ||
| 4373 | 4373 | */ |
| 4374 | 4374 | ret = nand_setup_data_interface(chip); |
| 4375 | 4375 | if (ret) |
| 4376 | − return ret; | |
| 4376 | + goto err_nand_init; | |
| 4377 | 4377 | |
| 4378 | 4378 | nand_maf_id = chip->id.data[0]; |
| 4379 | 4379 | nand_dev_id = chip->id.data[1]; |
| @@ -4404,6 +4404,12 @@ int nand_scan_ident(struct mtd_info *mtd, int maxchips, · 24 unmodified lines | ||
| 4404 | 4404 | mtd->size = i * chip->chipsize; |
| 4405 | 4405 | |
| 4406 | 4406 | return 0; |
| 4407 | + | |
| 4408 | +err_nand_init: | |
| 4409 | + /* Free manufacturer priv data. */ | |
| 4410 | + nand_manufacturer_cleanup(chip); | |
| 4411 | + | |
| 4412 | + return ret; | |
| 4407 | 4413 | } |
| 4408 | 4414 | EXPORT_SYMBOL(nand_scan_ident); |
| 4409 | 4415 | |
| @@ -4574,18 +4580,23 @@ int nand_scan_tail(struct mtd_info *mtd) · 164 unmodified lines | ||
| 4574 | 4580 | |
| 4575 | 4581 | /* New bad blocks should be marked in OOB, flash-based BBT, or both */ |
| 4576 | 4582 | if (WARN_ON((chip->bbt_options & NAND_BBT_NO_OOB_BBM) && |
| 4577 | − !(chip->bbt_options & NAND_BBT_USE_FLASH))) | |
| 4578 | − return -EINVAL; | |
| 4583 | + !(chip->bbt_options & NAND_BBT_USE_FLASH))) { | |
| 4584 | + ret = -EINVAL; | |
| 4585 | + goto err_ident; | |
| 4586 | + } | |
| 4579 | 4587 | |
| 4580 | 4588 | if (invalid_ecc_page_accessors(chip)) { |
| 4581 | 4589 | pr_err("Invalid ECC page accessors setup\n"); |
| 4582 | − return -EINVAL; | |
| 4590 | + ret = -EINVAL; | |
| 4591 | + goto err_ident; | |
| 4583 | 4592 | } |
| 4584 | 4593 | |
| 4585 | 4594 | if (!(chip->options & NAND_OWN_BUFFERS)) { |
| 4586 | 4595 | nbuf = kzalloc(sizeof(*nbuf), GFP_KERNEL); |
| 4587 | − if (!nbuf) | |
| 4588 | − return -ENOMEM; | |
| 4596 | + if (!nbuf) { | |
| 4597 | + ret = -ENOMEM; | |
| 4598 | + goto err_ident; | |
| 4599 | + } | |
| 4589 | 4600 | |
| 4590 | 4601 | nbuf->ecccalc = kmalloc(mtd->oobsize, GFP_KERNEL); |
| 4591 | 4602 | if (!nbuf->ecccalc) { |
| @@ -4608,8 +4619,10 @@ int nand_scan_tail(struct mtd_info *mtd) · 16 unmodified lines | ||
| 4608 | 4619 | |
| 4609 | 4620 | chip->buffers = nbuf; |
| 4610 | 4621 | } else { |
| 4611 | − if (!chip->buffers) | |
| 4612 | − return -ENOMEM; | |
| 4622 | + if (!chip->buffers) { | |
| 4623 | + ret = -ENOMEM; | |
| 4624 | + goto err_ident; | |
| 4625 | + } | |
| 4613 | 4626 | } |
| 4614 | 4627 | |
| 4615 | 4628 | /* Set the internal oob buffer location, just after the page data */ |
| @@ -4842,7 +4855,11 @@ int nand_scan_tail(struct mtd_info *mtd) · 226 unmodified lines | ||
| 4842 | 4855 | return 0; |
| 4843 | 4856 | |
| 4844 | 4857 | /* Build bad block table */ |
| 4845 | − return chip->scan_bbt(mtd); | |
| 4858 | + ret = chip->scan_bbt(mtd); | |
| 4859 | + if (ret) | |
| 4860 | + goto err_free; | |
| 4861 | + return 0; | |
| 4862 | + | |
| 4846 | 4863 | err_free: |
| 4847 | 4864 | if (nbuf) { |
| 4848 | 4865 | kfree(nbuf->databuf); |
| @@ -4850,6 +4867,13 @@ err_free: · 1 unmodified line | ||
| 4850 | 4867 | kfree(nbuf->ecccalc); |
| 4851 | 4868 | kfree(nbuf); |
| 4852 | 4869 | } |
| 4870 | + | |
| 4871 | +err_ident: | |
| 4872 | + /* Clean up nand_scan_ident(). */ | |
| 4873 | + | |
| 4874 | + /* Free manufacturer priv data. */ | |
| 4875 | + nand_manufacturer_cleanup(chip); | |
| 4876 | + | |
| 4853 | 4877 | return ret; |
| 4854 | 4878 | } |
| 4855 | 4879 | EXPORT_SYMBOL(nand_scan_tail); |
| @@ -6,7 +6,6 @@ · 5 unmodified lines | ||
| 6 | 6 | * published by the Free Software Foundation. |
| 7 | 7 | * |
| 8 | 8 | */ |
| 9 | −#include <linux/module.h> | |
| 10 | 9 | #include <linux/mtd/nand.h> |
| 11 | 10 | #include <linux/sizes.h> |
| 12 | 11 | |
| @@ -84,6 +84,9 @@ static void samsung_nand_decode_id(struct nand_chip *chip) · 83 unmodified lines | ||
| 84 | 84 | case 7: |
| 85 | 85 | chip->ecc_strength_ds = 60; |
| 86 | 86 | break; |
| 87 | + default: | |
| 88 | + WARN(1, "Could not decode ECC info"); | |
| 89 | + chip->ecc_step_ds = 0; | |
| 87 | 90 | } |
| 88 | 91 | } |
| 89 | 92 | } else { |
| @@ -55,10 +55,10 @@ · 54 unmodified lines | ||
| 55 | 55 | * byte 1 for other packets in the page (PKT_N, for N > 0) |
| 56 | 56 | * ERR_COUNT_PKT_N is the max error count over all but the first packet. |
| 57 | 57 | */ |
| 58 | −#define DECODE_OK_PKT_0(v) ((v) & BIT(7)) | |
| 59 | −#define DECODE_OK_PKT_N(v) ((v) & BIT(15)) | |
| 60 | 58 | #define ERR_COUNT_PKT_0(v) (((v) >> 0) & 0x3f) |
| 61 | 59 | #define ERR_COUNT_PKT_N(v) (((v) >> 8) & 0x3f) |
| 60 | +#define DECODE_FAIL_PKT_0(v) (((v) & BIT(7)) == 0) | |
| 61 | +#define DECODE_FAIL_PKT_N(v) (((v) & BIT(15)) == 0) | |
| 62 | 62 | |
| 63 | 63 | /* Offsets relative to pbus_base */ |
| 64 | 64 | #define PBUS_CS_CTRL 0x83c |
| @@ -193,6 +193,8 @@ static int check_erased_page(struct nand_chip *chip, u8 *buf) · 128 unmodified lines | ||
| 193 | 193 | chip->ecc.strength); |
| 194 | 194 | if (res < 0) |
| 195 | 195 | mtd->ecc_stats.failed++; |
| 196 | + else | |
| 197 | + mtd->ecc_stats.corrected += res; | |
| 196 | 198 | |
| 197 | 199 | bitflips = max(res, bitflips); |
| 198 | 200 | buf += pkt_size; |
| @@ -202,9 +204,11 @@ static int check_erased_page(struct nand_chip *chip, u8 *buf) · 3 unmodified lines | ||
| 202 | 204 | return bitflips; |
| 203 | 205 | } |
| 204 | 206 | |
| 205 | −static int decode_error_report(struct tango_nfc *nfc) | |
| 207 | +static int decode_error_report(struct nand_chip *chip) | |
| 206 | 208 | { |
| 207 | 209 | u32 status, res; |
| 210 | + struct mtd_info *mtd = nand_to_mtd(chip); | |
| 211 | + struct tango_nfc *nfc = to_tango_nfc(chip->controller); | |
| 208 | 212 | |
| 209 | 213 | status = readl_relaxed(nfc->reg_base + NFC_XFER_STATUS); |
| 210 | 214 | if (status & PAGE_IS_EMPTY) |
| @@ -212,10 +216,14 @@ static int decode_error_report(struct tango_nfc *nfc) · 1 unmodified line | ||
| 212 | 216 | |
| 213 | 217 | res = readl_relaxed(nfc->mem_base + ERROR_REPORT); |
| 214 | 218 | |
| 215 | − if (DECODE_OK_PKT_0(res) && DECODE_OK_PKT_N(res)) | |
| 216 | − return max(ERR_COUNT_PKT_0(res), ERR_COUNT_PKT_N(res)); | |
| 219 | + if (DECODE_FAIL_PKT_0(res) || DECODE_FAIL_PKT_N(res)) | |
| 220 | + return -EBADMSG; | |
| 221 | + | |
| 222 | + /* ERR_COUNT_PKT_N is max, not sum, but that's all we have */ | |
| 223 | + mtd->ecc_stats.corrected += | |
| 224 | + ERR_COUNT_PKT_0(res) + ERR_COUNT_PKT_N(res); | |
| 217 | 225 | |
| 218 | − return -EBADMSG; | |
| 226 | + return max(ERR_COUNT_PKT_0(res), ERR_COUNT_PKT_N(res)); | |
| 219 | 227 | } |
| 220 | 228 | |
| 221 | 229 | static void tango_dma_callback(void *arg) |
| @@ -282,7 +290,7 @@ static int tango_read_page(struct mtd_info *mtd, struct nand_chip *chip, · 60 unmodified lines | ||
| 282 | 290 | if (err) |
| 283 | 291 | return err; |
| 284 | 292 | |
| 285 | − res = decode_error_report(nfc); | |
| 293 | + res = decode_error_report(chip); | |
| 286 | 294 | if (res < 0) { |
| 287 | 295 | chip->ecc.read_oob_raw(mtd, chip, page); |
| 288 | 296 | res = check_erased_page(chip, buf); |
| @@ -663,6 +671,7 @@ static const struct of_device_id tango_nand_ids[] = { · 374 unmodified lines | ||
| 663 | 671 | { .compatible = "sigma,smp8758-nand" }, |
| 664 | 672 | { /* sentinel */ } |
| 665 | 673 | }; |
| 674 | +MODULE_DEVICE_TABLE(of, tango_nand_ids); | |
| 666 | 675 | |
| 667 | 676 | static struct platform_driver tango_nand_driver = { |
| 668 | 677 | .probe = tango_nand_probe, |
| @@ -90,10 +90,13 @@ enum ad_link_speed_type { · 89 unmodified lines | ||
| 90 | 90 | AD_LINK_SPEED_100MBPS, |
| 91 | 91 | AD_LINK_SPEED_1000MBPS, |
| 92 | 92 | AD_LINK_SPEED_2500MBPS, |
| 93 | + AD_LINK_SPEED_5000MBPS, | |
| 93 | 94 | AD_LINK_SPEED_10000MBPS, |
| 95 | + AD_LINK_SPEED_14000MBPS, | |
| 94 | 96 | AD_LINK_SPEED_20000MBPS, |
| 95 | 97 | AD_LINK_SPEED_25000MBPS, |
| 96 | 98 | AD_LINK_SPEED_40000MBPS, |
| 99 | + AD_LINK_SPEED_50000MBPS, | |
| 97 | 100 | AD_LINK_SPEED_56000MBPS, |
| 98 | 101 | AD_LINK_SPEED_100000MBPS, |
| 99 | 102 | }; |
| @@ -259,10 +262,13 @@ static inline int __check_agg_selection_timer(struct port *port) · 159 unmodified lines | ||
| 259 | 262 | * %AD_LINK_SPEED_100MBPS, |
| 260 | 263 | * %AD_LINK_SPEED_1000MBPS, |
| 261 | 264 | * %AD_LINK_SPEED_2500MBPS, |
| 265 | + * %AD_LINK_SPEED_5000MBPS, | |
| 262 | 266 | * %AD_LINK_SPEED_10000MBPS |
| 267 | + * %AD_LINK_SPEED_14000MBPS, | |
| 263 | 268 | * %AD_LINK_SPEED_20000MBPS |
| 264 | 269 | * %AD_LINK_SPEED_25000MBPS |
| 265 | 270 | * %AD_LINK_SPEED_40000MBPS |
| 271 | + * %AD_LINK_SPEED_50000MBPS | |
| 266 | 272 | * %AD_LINK_SPEED_56000MBPS |
| 267 | 273 | * %AD_LINK_SPEED_100000MBPS |
| 268 | 274 | */ |
| @@ -296,10 +302,18 @@ static u16 __get_link_speed(struct port *port) · 27 unmodified lines | ||
| 296 | 302 | speed = AD_LINK_SPEED_2500MBPS; |
| 297 | 303 | break; |
| 298 | 304 | |
| 305 | + case SPEED_5000: | |
| 306 | + speed = AD_LINK_SPEED_5000MBPS; | |
| 307 | + break; | |
| 308 | + | |
| 299 | 309 | case SPEED_10000: |
| 300 | 310 | speed = AD_LINK_SPEED_10000MBPS; |
| 301 | 311 | break; |
| 302 | 312 | |
| 313 | + case SPEED_14000: | |
| 314 | + speed = AD_LINK_SPEED_14000MBPS; | |
| 315 | + break; | |
| 316 | + | |
| 303 | 317 | case SPEED_20000: |
| 304 | 318 | speed = AD_LINK_SPEED_20000MBPS; |
| 305 | 319 | break; |
| @@ -312,6 +326,10 @@ static u16 __get_link_speed(struct port *port) · 6 unmodified lines | ||
| 312 | 326 | speed = AD_LINK_SPEED_40000MBPS; |
| 313 | 327 | break; |
| 314 | 328 | |
| 329 | + case SPEED_50000: | |
| 330 | + speed = AD_LINK_SPEED_50000MBPS; | |
| 331 | + break; | |
| 332 | + | |
| 315 | 333 | case SPEED_56000: |
| 316 | 334 | speed = AD_LINK_SPEED_56000MBPS; |
| 317 | 335 | break; |
| @@ -707,9 +725,15 @@ static u32 __get_agg_bandwidth(struct aggregator *aggregator) · 389 unmodified lines | ||
| 707 | 725 | case AD_LINK_SPEED_2500MBPS: |
| 708 | 726 | bandwidth = nports * 2500; |
| 709 | 727 | break; |
| 728 | + case AD_LINK_SPEED_5000MBPS: | |
| 729 | + bandwidth = nports * 5000; | |
| 730 | + break; | |
| 710 | 731 | case AD_LINK_SPEED_10000MBPS: |
| 711 | 732 | bandwidth = nports * 10000; |
| 712 | 733 | break; |
| 734 | + case AD_LINK_SPEED_14000MBPS: | |
| 735 | + bandwidth = nports * 14000; | |
| 736 | + break; | |
| 713 | 737 | case AD_LINK_SPEED_20000MBPS: |
| 714 | 738 | bandwidth = nports * 20000; |
| 715 | 739 | break; |
| @@ -719,6 +743,9 @@ static u32 __get_agg_bandwidth(struct aggregator *aggregator) · 3 unmodified lines | ||
| 719 | 743 | case AD_LINK_SPEED_40000MBPS: |
| 720 | 744 | bandwidth = nports * 40000; |
| 721 | 745 | break; |
| 746 | + case AD_LINK_SPEED_50000MBPS: | |
| 747 | + bandwidth = nports * 50000; | |
| 748 | + break; | |
| 722 | 749 | case AD_LINK_SPEED_56000MBPS: |
| 723 | 750 | bandwidth = nports * 56000; |
| 724 | 751 | break; |
| @@ -4192,7 +4192,6 @@ static void bond_destructor(struct net_device *bond_dev) · 4191 unmodified lines | ||
| 4192 | 4192 | struct bonding *bond = netdev_priv(bond_dev); |
| 4193 | 4193 | if (bond->wq) |
| 4194 | 4194 | destroy_workqueue(bond->wq); |
| 4195 | − free_netdev(bond_dev); | |
| 4196 | 4195 | } |
| 4197 | 4196 | |
| 4198 | 4197 | void bond_setup(struct net_device *bond_dev) |
| @@ -4212,7 +4211,8 @@ void bond_setup(struct net_device *bond_dev) · 13 unmodified lines | ||
| 4212 | 4211 | bond_dev->netdev_ops = &bond_netdev_ops; |
| 4213 | 4212 | bond_dev->ethtool_ops = &bond_ethtool_ops; |
| 4214 | 4213 | |
| 4215 | − bond_dev->destructor = bond_destructor; | |
| 4214 | + bond_dev->needs_free_netdev = true; | |
| 4215 | + bond_dev->priv_destructor = bond_destructor; | |
| 4216 | 4216 | |
| 4217 | 4217 | SET_NETDEV_DEVTYPE(bond_dev, &bond_type); |
| 4218 | 4218 | |
| @@ -4736,7 +4736,7 @@ int bond_create(struct net *net, const char *name) · 517 unmodified lines | ||
| 4736 | 4736 | |
| 4737 | 4737 | rtnl_unlock(); |
| 4738 | 4738 | if (res < 0) |
| 4739 | − bond_destructor(bond_dev); | |
| 4739 | + free_netdev(bond_dev); | |
| 4740 | 4740 | return res; |
| 4741 | 4741 | } |
| 4742 | 4742 | |
| @@ -1121,7 +1121,7 @@ static void cfhsi_setup(struct net_device *dev) · 1120 unmodified lines | ||
| 1121 | 1121 | dev->flags = IFF_POINTOPOINT | IFF_NOARP; |
| 1122 | 1122 | dev->mtu = CFHSI_MAX_CAIF_FRAME_SZ; |
| 1123 | 1123 | dev->priv_flags |= IFF_NO_QUEUE; |
| 1124 | − dev->destructor = free_netdev; | |
| 1124 | + dev->needs_free_netdev = true; | |
| 1125 | 1125 | dev->netdev_ops = &cfhsi_netdevops; |
| 1126 | 1126 | for (i = 0; i < CFHSI_PRIO_LAST; ++i) |
| 1127 | 1127 | skb_queue_head_init(&cfhsi->qhead[i]); |
| @@ -428,7 +428,7 @@ static void caifdev_setup(struct net_device *dev) · 427 unmodified lines | ||
| 428 | 428 | dev->flags = IFF_POINTOPOINT | IFF_NOARP; |
| 429 | 429 | dev->mtu = CAIF_MAX_MTU; |
| 430 | 430 | dev->priv_flags |= IFF_NO_QUEUE; |
| 431 | − dev->destructor = free_netdev; | |
| 431 | + dev->needs_free_netdev = true; | |
| 432 | 432 | skb_queue_head_init(&serdev->head); |
| 433 | 433 | serdev->common.link_select = CAIF_LINK_LOW_LATENCY; |
| 434 | 434 | serdev->common.use_frag = true; |
| @@ -712,7 +712,7 @@ static void cfspi_setup(struct net_device *dev) · 711 unmodified lines | ||
| 712 | 712 | dev->flags = IFF_NOARP | IFF_POINTOPOINT; |
| 713 | 713 | dev->priv_flags |= IFF_NO_QUEUE; |
| 714 | 714 | dev->mtu = SPI_MAX_PAYLOAD_SIZE; |
| 715 | − dev->destructor = free_netdev; | |
| 715 | + dev->needs_free_netdev = true; | |
| 716 | 716 | skb_queue_head_init(&cfspi->qhead); |
| 717 | 717 | skb_queue_head_init(&cfspi->chead); |
| 718 | 718 | cfspi->cfdev.link_select = CAIF_LINK_HIGH_BANDW; |
| @@ -617,7 +617,7 @@ static void cfv_netdev_setup(struct net_device *netdev) · 616 unmodified lines | ||
| 617 | 617 | netdev->tx_queue_len = 100; |
| 618 | 618 | netdev->flags = IFF_POINTOPOINT | IFF_NOARP; |
| 619 | 619 | netdev->mtu = CFV_DEF_MTU_SIZE; |
| 620 | − netdev->destructor = free_netdev; | |
| 620 | + netdev->needs_free_netdev = true; | |
| 621 | 621 | } |
| 622 | 622 | |
| 623 | 623 | /* Create debugfs counters for the device */ |
| @@ -391,6 +391,9 @@ void can_change_state(struct net_device *dev, struct can_frame *cf, · 390 unmodified lines | ||
| 391 | 391 | can_update_state_error_stats(dev, new_state); |
| 392 | 392 | priv->state = new_state; |
| 393 | 393 | |
| 394 | + if (!cf) | |
| 395 | + return; | |
| 396 | + | |
| 394 | 397 | if (unlikely(new_state == CAN_STATE_BUS_OFF)) { |
| 395 | 398 | cf->can_id |= CAN_ERR_BUSOFF; |
| 396 | 399 | return; |
| @@ -489,7 +489,7 @@ int peak_canfd_handle_msgs_list(struct peak_canfd_priv *priv, · 488 unmodified lines | ||
| 489 | 489 | struct pucan_rx_msg *msg_list, int msg_count) |
| 490 | 490 | { |
| 491 | 491 | void *msg_ptr = msg_list; |
| 492 | − int i, msg_size; | |
| 492 | + int i, msg_size = 0; | |
| 493 | 493 | |
| 494 | 494 | for (i = 0; i < msg_count; i++) { |
| 495 | 495 | msg_size = peak_canfd_handle_msg(priv, msg_ptr); |
| @@ -417,7 +417,7 @@ static int slc_open(struct net_device *dev) · 416 unmodified lines | ||
| 417 | 417 | static void slc_free_netdev(struct net_device *dev) |
| 418 | 418 | { |
| 419 | 419 | int i = dev->base_addr; |
| 420 | − free_netdev(dev); | |
| 420 | + | |
| 421 | 421 | slcan_devs[i] = NULL; |
| 422 | 422 | } |
| 423 | 423 | |
| @@ -436,7 +436,8 @@ static const struct net_device_ops slc_netdev_ops = { · 12 unmodified lines | ||
| 436 | 436 | static void slc_setup(struct net_device *dev) |
| 437 | 437 | { |
| 438 | 438 | dev->netdev_ops = &slc_netdev_ops; |
| 439 | − dev->destructor = slc_free_netdev; | |
| 439 | + dev->needs_free_netdev = true; | |
| 440 | + dev->priv_destructor = slc_free_netdev; | |
| 440 | 441 | |
| 441 | 442 | dev->hard_header_len = 0; |
| 442 | 443 | dev->addr_len = 0; |
| @@ -761,8 +762,6 @@ static void __exit slcan_exit(void) · 318 unmodified lines | ||
| 761 | 762 | if (sl->tty) { |
| 762 | 763 | printk(KERN_ERR "%s: tty discipline still running\n", |
| 763 | 764 | dev->name); |
| 764 | − /* Intentionally leak the control block. */ | |
| 765 | − dev->destructor = NULL; | |
| 766 | 765 | } |
| 767 | 766 | |
| 768 | 767 | unregister_netdev(dev); |
| @@ -265,6 +265,8 @@ static int gs_cmd_reset(struct gs_usb *gsusb, struct gs_can *gsdev) · 264 unmodified lines | ||
| 265 | 265 | sizeof(*dm), |
| 266 | 266 | 1000); |
| 267 | 267 | |
| 268 | + kfree(dm); | |
| 269 | + | |
| 268 | 270 | return rc; |
| 269 | 271 | } |
| 270 | 272 | |
| @@ -908,8 +908,6 @@ static int peak_usb_probe(struct usb_interface *intf, · 907 unmodified lines | ||
| 908 | 908 | const struct peak_usb_adapter *peak_usb_adapter = NULL; |
| 909 | 909 | int i, err = -ENOMEM; |
| 910 | 910 | |
| 911 | − usb_dev = interface_to_usbdev(intf); | |
| 912 | − | |
| 913 | 911 | /* get corresponding PCAN-USB adapter */ |
| 914 | 912 | for (i = 0; i < ARRAY_SIZE(peak_usb_adapters_list); i++) |
| 915 | 913 | if (peak_usb_adapters_list[i]->device_id == usb_id_product) { |
| @@ -920,7 +918,7 @@ static int peak_usb_probe(struct usb_interface *intf, · 4 unmodified lines | ||
| 920 | 918 | if (!peak_usb_adapter) { |
| 921 | 919 | /* should never come except device_id bad usage in this file */ |
| 922 | 920 | pr_err("%s: didn't find device id. 0x%x in devices list\n", |
| 923 | − PCAN_USB_DRIVER_NAME, usb_dev->descriptor.idProduct); | |
| 921 | + PCAN_USB_DRIVER_NAME, usb_id_product); | |
| 924 | 922 | return -ENODEV; |
| 925 | 923 | } |
| 926 | 924 | |
| @@ -152,7 +152,7 @@ static const struct net_device_ops vcan_netdev_ops = { · 151 unmodified lines | ||
| 152 | 152 | static void vcan_setup(struct net_device *dev) |
| 153 | 153 | { |
| 154 | 154 | dev->type = ARPHRD_CAN; |
| 155 | − dev->mtu = CAN_MTU; | |
| 155 | + dev->mtu = CANFD_MTU; | |
| 156 | 156 | dev->hard_header_len = 0; |
| 157 | 157 | dev->addr_len = 0; |
| 158 | 158 | dev->tx_queue_len = 0; |
| @@ -163,7 +163,7 @@ static void vcan_setup(struct net_device *dev) · 4 unmodified lines | ||
| 163 | 163 | dev->flags |= IFF_ECHO; |
| 164 | 164 | |
| 165 | 165 | dev->netdev_ops = &vcan_netdev_ops; |
| 166 | − dev->destructor = free_netdev; | |
| 166 | + dev->needs_free_netdev = true; | |
| 167 | 167 | } |
| 168 | 168 | |
| 169 | 169 | static struct rtnl_link_ops vcan_link_ops __read_mostly = { |
| @@ -150,13 +150,13 @@ static const struct net_device_ops vxcan_netdev_ops = { · 149 unmodified lines | ||
| 150 | 150 | static void vxcan_setup(struct net_device *dev) |
| 151 | 151 | { |
| 152 | 152 | dev->type = ARPHRD_CAN; |
| 153 | − dev->mtu = CAN_MTU; | |
| 153 | + dev->mtu = CANFD_MTU; | |
| 154 | 154 | dev->hard_header_len = 0; |
| 155 | 155 | dev->addr_len = 0; |
| 156 | 156 | dev->tx_queue_len = 0; |
| 157 | 157 | dev->flags = (IFF_NOARP|IFF_ECHO); |
| 158 | 158 | dev->netdev_ops = &vxcan_netdev_ops; |
| 159 | − dev->destructor = free_netdev; | |
| 159 | + dev->needs_free_netdev = true; | |
| 160 | 160 | } |
| 161 | 161 | |
| 162 | 162 | /* forward declaration for rtnl_create_link() */ |
| @@ -114,13 +114,13 @@ static inline int mv88e6xxx_g2_set_eeprom16(struct mv88e6xxx_chip *chip, · 113 unmodified lines | ||
| 114 | 114 | return -EOPNOTSUPP; |
| 115 | 115 | } |
| 116 | 116 | |
| 117 | −int mv88e6xxx_g2_pvt_write(struct mv88e6xxx_chip *chip, int src_dev, | |
| 118 | − int src_port, u16 data) | |
| 117 | +static inline int mv88e6xxx_g2_pvt_write(struct mv88e6xxx_chip *chip, | |
| 118 | + int src_dev, int src_port, u16 data) | |
| 119 | 119 | { |
| 120 | 120 | return -EOPNOTSUPP; |
| 121 | 121 | } |
| 122 | 122 | |
| 123 | −int mv88e6xxx_g2_misc_4_bit_port(struct mv88e6xxx_chip *chip) | |
| 123 | +static inline int mv88e6xxx_g2_misc_4_bit_port(struct mv88e6xxx_chip *chip) | |
| 124 | 124 | { |
| 125 | 125 | return -EOPNOTSUPP; |
| 126 | 126 | } |
| @@ -328,7 +328,6 @@ static void dummy_free_netdev(struct net_device *dev) · 327 unmodified lines | ||
| 328 | 328 | struct dummy_priv *priv = netdev_priv(dev); |
| 329 | 329 | |
| 330 | 330 | kfree(priv->vfinfo); |
| 331 | − free_netdev(dev); | |
| 332 | 331 | } |
| 333 | 332 | |
| 334 | 333 | static void dummy_setup(struct net_device *dev) |
| @@ -338,7 +337,8 @@ static void dummy_setup(struct net_device *dev) · 3 unmodified lines | ||
| 338 | 337 | /* Initialize the device structure. */ |
| 339 | 338 | dev->netdev_ops = &dummy_netdev_ops; |
| 340 | 339 | dev->ethtool_ops = &dummy_ethtool_ops; |
| 341 | − dev->destructor = dummy_free_netdev; | |
| 340 | + dev->needs_free_netdev = true; | |
| 341 | + dev->priv_destructor = dummy_free_netdev; | |
| 342 | 342 | |
| 343 | 343 | /* Fill in device structure with ethernet-generic values. */ |
| 344 | 344 | dev->flags |= IFF_NOARP; |
| @@ -61,6 +61,8 @@ · 60 unmodified lines | ||
| 61 | 61 | |
| 62 | 62 | #define ENA_MMIO_READ_TIMEOUT 0xFFFFFFFF |
| 63 | 63 | |
| 64 | +#define ENA_REGS_ADMIN_INTR_MASK 1 | |
| 65 | + | |
| 64 | 66 | /*****************************************************************************/ |
| 65 | 67 | /*****************************************************************************/ |
| 66 | 68 | /*****************************************************************************/ |
| @@ -232,11 +234,9 @@ static struct ena_comp_ctx *__ena_com_submit_admin_cmd(struct ena_com_admin_queu · 165 unmodified lines | ||
| 232 | 234 | tail_masked = admin_queue->sq.tail & queue_size_mask; |
| 233 | 235 | |
| 234 | 236 | /* In case of queue FULL */ |
| 235 | − cnt = admin_queue->sq.tail - admin_queue->sq.head; | |
| 237 | + cnt = atomic_read(&admin_queue->outstanding_cmds); | |
| 236 | 238 | if (cnt >= admin_queue->q_depth) { |
| 237 | − pr_debug("admin queue is FULL (tail %d head %d depth: %d)\n", | |
| 238 | − admin_queue->sq.tail, admin_queue->sq.head, | |
| 239 | − admin_queue->q_depth); | |
| 239 | + pr_debug("admin queue is full.\n"); | |
| 240 | 240 | admin_queue->stats.out_of_space++; |
| 241 | 241 | return ERR_PTR(-ENOSPC); |
| 242 | 242 | } |
| @@ -508,15 +508,20 @@ static int ena_com_comp_status_to_errno(u8 comp_status) · 265 unmodified lines | ||
| 508 | 508 | static int ena_com_wait_and_process_admin_cq_polling(struct ena_comp_ctx *comp_ctx, |
| 509 | 509 | struct ena_com_admin_queue *admin_queue) |
| 510 | 510 | { |
| 511 | − unsigned long flags; | |
| 512 | − u32 start_time; | |
| 511 | + unsigned long flags, timeout; | |
| 513 | 512 | int ret; |
| 514 | 513 | |
| 515 | − start_time = ((u32)jiffies_to_usecs(jiffies)); | |
| 514 | + timeout = jiffies + ADMIN_CMD_TIMEOUT_US; | |
| 515 | + | |
| 516 | + while (1) { | |
| 517 | + spin_lock_irqsave(&admin_queue->q_lock, flags); | |
| 518 | + ena_com_handle_admin_completion(admin_queue); | |
| 519 | + spin_unlock_irqrestore(&admin_queue->q_lock, flags); | |
| 520 | + | |
| 521 | + if (comp_ctx->status != ENA_CMD_SUBMITTED) | |
| 522 | + break; | |
| 516 | 523 | |
| 517 | − while (comp_ctx->status == ENA_CMD_SUBMITTED) { | |
| 518 | − if ((((u32)jiffies_to_usecs(jiffies)) - start_time) > | |
| 519 | − ADMIN_CMD_TIMEOUT_US) { | |
| 524 | + if (time_is_before_jiffies(timeout)) { | |
| 520 | 525 | pr_err("Wait for completion (polling) timeout\n"); |
| 521 | 526 | /* ENA didn't have any completion */ |
| 522 | 527 | spin_lock_irqsave(&admin_queue->q_lock, flags); |
| @@ -528,10 +533,6 @@ static int ena_com_wait_and_process_admin_cq_polling(struct ena_comp_ctx *comp_c · 5 unmodified lines | ||
| 528 | 533 | goto err; |
| 529 | 534 | } |
| 530 | 535 | |
| 531 | − spin_lock_irqsave(&admin_queue->q_lock, flags); | |
| 532 | − ena_com_handle_admin_completion(admin_queue); | |
| 533 | − spin_unlock_irqrestore(&admin_queue->q_lock, flags); | |
| 534 | − | |
| 535 | 536 | msleep(100); |
| 536 | 537 | } |
| 537 | 538 | |
| @@ -1455,6 +1456,12 @@ void ena_com_admin_destroy(struct ena_com_dev *ena_dev) · 917 unmodified lines | ||
| 1455 | 1456 | |
| 1456 | 1457 | void ena_com_set_admin_polling_mode(struct ena_com_dev *ena_dev, bool polling) |
| 1457 | 1458 | { |
| 1459 | + u32 mask_value = 0; | |
| 1460 | + | |
| 1461 | + if (polling) | |
| 1462 | + mask_value = ENA_REGS_ADMIN_INTR_MASK; | |
| 1463 | + | |
| 1464 | + writel(mask_value, ena_dev->reg_bar + ENA_REGS_INTR_MASK_OFF); | |
| 1458 | 1465 | ena_dev->admin_queue.polling = polling; |
| 1459 | 1466 | } |
| 1460 | 1467 | |
| @@ -80,7 +80,6 @@ static const struct ena_stats ena_stats_tx_strings[] = { · 79 unmodified lines | ||
| 80 | 80 | ENA_STAT_TX_ENTRY(tx_poll), |
| 81 | 81 | ENA_STAT_TX_ENTRY(doorbells), |
| 82 | 82 | ENA_STAT_TX_ENTRY(prepare_ctx_err), |
| 83 | − ENA_STAT_TX_ENTRY(missing_tx_comp), | |
| 84 | 83 | ENA_STAT_TX_ENTRY(bad_req_id), |
| 85 | 84 | }; |
| 86 | 85 | |
| @@ -94,6 +93,7 @@ static const struct ena_stats ena_stats_rx_strings[] = { · 7 unmodified lines | ||
| 94 | 93 | ENA_STAT_RX_ENTRY(dma_mapping_err), |
| 95 | 94 | ENA_STAT_RX_ENTRY(bad_desc_num), |
| 96 | 95 | ENA_STAT_RX_ENTRY(rx_copybreak_pkt), |
| 96 | + ENA_STAT_RX_ENTRY(empty_rx_ring), | |
| 97 | 97 | }; |
| 98 | 98 | |
| 99 | 99 | static const struct ena_stats ena_stats_ena_com_strings[] = { |
| @@ -190,6 +190,7 @@ static void ena_init_io_rings(struct ena_adapter *adapter) · 189 unmodified lines | ||
| 190 | 190 | rxr->sgl_size = adapter->max_rx_sgl_size; |
| 191 | 191 | rxr->smoothed_interval = |
| 192 | 192 | ena_com_get_nonadaptive_moderation_interval_rx(ena_dev); |
| 193 | + rxr->empty_rx_queue = 0; | |
| 193 | 194 | } |
| 194 | 195 | } |
| 195 | 196 | |
| @@ -1078,6 +1079,26 @@ inline void ena_adjust_intr_moderation(struct ena_ring *rx_ring, · 882 unmodified lines | ||
| 1078 | 1079 | rx_ring->per_napi_bytes = 0; |
| 1079 | 1080 | } |
| 1080 | 1081 | |
| 1082 | +static inline void ena_unmask_interrupt(struct ena_ring *tx_ring, | |
| 1083 | + struct ena_ring *rx_ring) | |
| 1084 | +{ | |
| 1085 | + struct ena_eth_io_intr_reg intr_reg; | |
| 1086 | + | |
| 1087 | + /* Update intr register: rx intr delay, | |
| 1088 | + * tx intr delay and interrupt unmask | |
| 1089 | + */ | |
| 1090 | + ena_com_update_intr_reg(&intr_reg, | |
| 1091 | + rx_ring->smoothed_interval, | |
| 1092 | + tx_ring->smoothed_interval, | |
| 1093 | + true); | |
| 1094 | + | |
| 1095 | + /* It is a shared MSI-X. | |
| 1096 | + * Tx and Rx CQ have pointer to it. | |
| 1097 | + * So we use one of them to reach the intr reg | |
| 1098 | + */ | |
| 1099 | + ena_com_unmask_intr(rx_ring->ena_com_io_cq, &intr_reg); | |
| 1100 | +} | |
| 1101 | + | |
| 1081 | 1102 | static inline void ena_update_ring_numa_node(struct ena_ring *tx_ring, |
| 1082 | 1103 | struct ena_ring *rx_ring) |
| 1083 | 1104 | { |
| @@ -1108,7 +1129,6 @@ static int ena_io_poll(struct napi_struct *napi, int budget) · 24 unmodified lines | ||
| 1108 | 1129 | { |
| 1109 | 1130 | struct ena_napi *ena_napi = container_of(napi, struct ena_napi, napi); |
| 1110 | 1131 | struct ena_ring *tx_ring, *rx_ring; |
| 1111 | − struct ena_eth_io_intr_reg intr_reg; | |
| 1112 | 1132 | |
| 1113 | 1133 | u32 tx_work_done; |
| 1114 | 1134 | u32 rx_work_done; |
| @@ -1149,22 +1169,9 @@ static int ena_io_poll(struct napi_struct *napi, int budget) · 34 unmodified lines | ||
| 1149 | 1169 | if (ena_com_get_adaptive_moderation_enabled(rx_ring->ena_dev)) |
| 1150 | 1170 | ena_adjust_intr_moderation(rx_ring, tx_ring); |
| 1151 | 1171 | |
| 1152 | − /* Update intr register: rx intr delay, | |
| 1153 | − * tx intr delay and interrupt unmask | |
| 1154 | − */ | |
| 1155 | − ena_com_update_intr_reg(&intr_reg, | |
| 1156 | − rx_ring->smoothed_interval, | |
| 1157 | − tx_ring->smoothed_interval, | |
| 1158 | − true); | |
| 1159 | − | |
| 1160 | − /* It is a shared MSI-X. | |
| 1161 | − * Tx and Rx CQ have pointer to it. | |
| 1162 | − * So we use one of them to reach the intr reg | |
| 1163 | − */ | |
| 1164 | − ena_com_unmask_intr(rx_ring->ena_com_io_cq, &intr_reg); | |
| 1172 | + ena_unmask_interrupt(tx_ring, rx_ring); | |
| 1165 | 1173 | } |
| 1166 | 1174 | |
| 1167 | − | |
| 1168 | 1175 | ena_update_ring_numa_node(tx_ring, rx_ring); |
| 1169 | 1176 | |
| 1170 | 1177 | ret = rx_work_done; |
| @@ -1485,6 +1492,11 @@ static int ena_up_complete(struct ena_adapter *adapter) · 314 unmodified lines | ||
| 1485 | 1492 | |
| 1486 | 1493 | ena_napi_enable_all(adapter); |
| 1487 | 1494 | |
| 1495 | + /* Enable completion queues interrupt */ | |
| 1496 | + for (i = 0; i < adapter->num_queues; i++) | |
| 1497 | + ena_unmask_interrupt(&adapter->tx_ring[i], | |
| 1498 | + &adapter->rx_ring[i]); | |
| 1499 | + | |
| 1488 | 1500 | /* schedule napi in case we had pending packets |
| 1489 | 1501 | * from the last time we disable napi |
| 1490 | 1502 | */ |
| @@ -1532,6 +1544,7 @@ static int ena_create_io_tx_queue(struct ena_adapter *adapter, int qid) · 41 unmodified lines | ||
| 1532 | 1544 | "Failed to get TX queue handlers. TX queue num %d rc: %d\n", |
| 1533 | 1545 | qid, rc); |
| 1534 | 1546 | ena_com_destroy_io_queue(ena_dev, ena_qid); |
| 1547 | + return rc; | |
| 1535 | 1548 | } |
| 1536 | 1549 | |
| 1537 | 1550 | ena_com_update_numa_node(tx_ring->ena_com_io_cq, ctx.numa_node); |
| @@ -1596,6 +1609,7 @@ static int ena_create_io_rx_queue(struct ena_adapter *adapter, int qid) · 58 unmodified lines | ||
| 1596 | 1609 | "Failed to get RX queue handlers. RX queue num %d rc: %d\n", |
| 1597 | 1610 | qid, rc); |
| 1598 | 1611 | ena_com_destroy_io_queue(ena_dev, ena_qid); |
| 1612 | + return rc; | |
| 1599 | 1613 | } |
| 1600 | 1614 | |
| 1601 | 1615 | ena_com_update_numa_node(rx_ring->ena_com_io_cq, ctx.numa_node); |
| @@ -1981,6 +1995,7 @@ static netdev_tx_t ena_start_xmit(struct sk_buff *skb, struct net_device *dev) · 379 unmodified lines | ||
| 1981 | 1995 | |
| 1982 | 1996 | tx_info->tx_descs = nb_hw_desc; |
| 1983 | 1997 | tx_info->last_jiffies = jiffies; |
| 1998 | + tx_info->print_once = 0; | |
| 1984 | 1999 | |
| 1985 | 2000 | tx_ring->next_to_use = ENA_TX_RING_IDX_NEXT(next_to_use, |
| 1986 | 2001 | tx_ring->ring_size); |
| @@ -2550,13 +2565,44 @@ err: · 563 unmodified lines | ||
| 2550 | 2565 | "Reset attempt failed. Can not reset the device\n"); |
| 2551 | 2566 | } |
| 2552 | 2567 | |
| 2553 | −static void check_for_missing_tx_completions(struct ena_adapter *adapter) | |
| 2568 | +static int check_missing_comp_in_queue(struct ena_adapter *adapter, | |
| 2569 | + struct ena_ring *tx_ring) | |
| 2554 | 2570 | { |
| 2555 | 2571 | struct ena_tx_buffer *tx_buf; |
| 2556 | 2572 | unsigned long last_jiffies; |
| 2573 | + u32 missed_tx = 0; | |
| 2574 | + int i; | |
| 2575 | + | |
| 2576 | + for (i = 0; i < tx_ring->ring_size; i++) { | |
| 2577 | + tx_buf = &tx_ring->tx_buffer_info[i]; | |
| 2578 | + last_jiffies = tx_buf->last_jiffies; | |
| 2579 | + if (unlikely(last_jiffies && | |
| 2580 | + time_is_before_jiffies(last_jiffies + TX_TIMEOUT))) { | |
| 2581 | + if (!tx_buf->print_once) | |
| 2582 | + netif_notice(adapter, tx_err, adapter->netdev, | |
| 2583 | + "Found a Tx that wasn't completed on time, qid %d, index %d.\n", | |
| 2584 | + tx_ring->qid, i); | |
| 2585 | + | |
| 2586 | + tx_buf->print_once = 1; | |
| 2587 | + missed_tx++; | |
| 2588 | + | |
| 2589 | + if (unlikely(missed_tx > MAX_NUM_OF_TIMEOUTED_PACKETS)) { | |
| 2590 | + netif_err(adapter, tx_err, adapter->netdev, | |
| 2591 | + "The number of lost tx completions is above the threshold (%d > %d). Reset the device\n", | |
| 2592 | + missed_tx, MAX_NUM_OF_TIMEOUTED_PACKETS); | |
| 2593 | + set_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags); | |
| 2594 | + return -EIO; | |
| 2595 | + } | |
| 2596 | + } | |
| 2597 | + } | |
| 2598 | + | |
| 2599 | + return 0; | |
| 2600 | +} | |
| 2601 | + | |
| 2602 | +static void check_for_missing_tx_completions(struct ena_adapter *adapter) | |
| 2603 | +{ | |
| 2557 | 2604 | struct ena_ring *tx_ring; |
| 2558 | − int i, j, budget; | |
| 2559 | − u32 missed_tx; | |
| 2605 | + int i, budget, rc; | |
| 2560 | 2606 | |
| 2561 | 2607 | /* Make sure the driver doesn't turn the device in other process */ |
| 2562 | 2608 | smp_rmb(); |
| @@ -2572,31 +2618,9 @@ static void check_for_missing_tx_completions(struct ena_adapter *adapter) · 9 unmodified lines | ||
| 2572 | 2618 | for (i = adapter->last_monitored_tx_qid; i < adapter->num_queues; i++) { |
| 2573 | 2619 | tx_ring = &adapter->tx_ring[i]; |
| 2574 | 2620 | |
| 2575 | − for (j = 0; j < tx_ring->ring_size; j++) { | |
| 2576 | − tx_buf = &tx_ring->tx_buffer_info[j]; | |
| 2577 | − last_jiffies = tx_buf->last_jiffies; | |
| 2578 | − if (unlikely(last_jiffies && time_is_before_jiffies(last_jiffies + TX_TIMEOUT))) { | |
| 2579 | − netif_notice(adapter, tx_err, adapter->netdev, | |
| 2580 | − "Found a Tx that wasn't completed on time, qid %d, index %d.\n", | |
| 2581 | − tx_ring->qid, j); | |
| 2582 | − | |
| 2583 | − u64_stats_update_begin(&tx_ring->syncp); | |
| 2584 | − missed_tx = tx_ring->tx_stats.missing_tx_comp++; | |
| 2585 | − u64_stats_update_end(&tx_ring->syncp); | |
| 2586 | − | |
| 2587 | − /* Clear last jiffies so the lost buffer won't | |
| 2588 | − * be counted twice. | |
| 2589 | − */ | |
| 2590 | − tx_buf->last_jiffies = 0; | |
| 2591 | − | |
| 2592 | − if (unlikely(missed_tx > MAX_NUM_OF_TIMEOUTED_PACKETS)) { | |
| 2593 | − netif_err(adapter, tx_err, adapter->netdev, | |
| 2594 | − "The number of lost tx completion is above the threshold (%d > %d). Reset the device\n", | |
| 2595 | − missed_tx, MAX_NUM_OF_TIMEOUTED_PACKETS); | |
| 2596 | − set_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags); | |
| 2597 | − } | |
| 2598 | − } | |
| 2599 | − } | |
| 2621 | + rc = check_missing_comp_in_queue(adapter, tx_ring); | |
| 2622 | + if (unlikely(rc)) | |
| 2623 | + return; | |
| 2600 | 2624 | |
| 2601 | 2625 | budget--; |
| 2602 | 2626 | if (!budget) |
| @@ -2606,6 +2630,58 @@ static void check_for_missing_tx_completions(struct ena_adapter *adapter) · 3 unmodified lines | ||
| 2606 | 2630 | adapter->last_monitored_tx_qid = i % adapter->num_queues; |
| 2607 | 2631 | } |
| 2608 | 2632 | |
| 2633 | +/* trigger napi schedule after 2 consecutive detections */ | |
| 2634 | +#define EMPTY_RX_REFILL 2 | |
| 2635 | +/* For the rare case where the device runs out of Rx descriptors and the | |
| 2636 | + * napi handler failed to refill new Rx descriptors (due to a lack of memory | |
| 2637 | + * for example). | |
| 2638 | + * This case will lead to a deadlock: | |
| 2639 | + * The device won't send interrupts since all the new Rx packets will be dropped | |
| 2640 | + * The napi handler won't allocate new Rx descriptors so the device will be | |
| 2641 | + * able to send new packets. | |
| 2642 | + * | |
| 2643 | + * This scenario can happen when the kernel's vm.min_free_kbytes is too small. | |
| 2644 | + * It is recommended to have at least 512MB, with a minimum of 128MB for | |
| 2645 | + * constrained environment). | |
| 2646 | + * | |
| 2647 | + * When such a situation is detected - Reschedule napi | |
| 2648 | + */ | |
| 2649 | +static void check_for_empty_rx_ring(struct ena_adapter *adapter) | |
| 2650 | +{ | |
| 2651 | + struct ena_ring *rx_ring; | |
| 2652 | + int i, refill_required; | |
| 2653 | + | |
| 2654 | + if (!test_bit(ENA_FLAG_DEV_UP, &adapter->flags)) | |
| 2655 | + return; | |
| 2656 | + | |
| 2657 | + if (test_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags)) | |
| 2658 | + return; | |
| 2659 | + | |
| 2660 | + for (i = 0; i < adapter->num_queues; i++) { | |
| 2661 | + rx_ring = &adapter->rx_ring[i]; | |
| 2662 | + | |
| 2663 | + refill_required = | |
| 2664 | + ena_com_sq_empty_space(rx_ring->ena_com_io_sq); | |
| 2665 | + if (unlikely(refill_required == (rx_ring->ring_size - 1))) { | |
| 2666 | + rx_ring->empty_rx_queue++; | |
| 2667 | + | |
| 2668 | + if (rx_ring->empty_rx_queue >= EMPTY_RX_REFILL) { | |
| 2669 | + u64_stats_update_begin(&rx_ring->syncp); | |
| 2670 | + rx_ring->rx_stats.empty_rx_ring++; | |
| 2671 | + u64_stats_update_end(&rx_ring->syncp); | |
| 2672 | + | |
| 2673 | + netif_err(adapter, drv, adapter->netdev, | |
| 2674 | + "trigger refill for ring %d\n", i); | |
| 2675 | + | |
| 2676 | + napi_schedule(rx_ring->napi); | |
| 2677 | + rx_ring->empty_rx_queue = 0; | |
| 2678 | + } | |
| 2679 | + } else { | |
| 2680 | + rx_ring->empty_rx_queue = 0; | |
| 2681 | + } | |
| 2682 | + } | |
| 2683 | +} | |
| 2684 | + | |
| 2609 | 2685 | /* Check for keep alive expiration */ |
| 2610 | 2686 | static void check_for_missing_keep_alive(struct ena_adapter *adapter) |
| 2611 | 2687 | { |
| @@ -2660,6 +2736,8 @@ static void ena_timer_service(unsigned long data) · 48 unmodified lines | ||
| 2660 | 2736 | |
| 2661 | 2737 | check_for_missing_tx_completions(adapter); |
| 2662 | 2738 | |
| 2739 | + check_for_empty_rx_ring(adapter); | |
| 2740 | + | |
| 2663 | 2741 | if (debug_area) |
| 2664 | 2742 | ena_dump_stats_to_buf(adapter, debug_area); |
| 2665 | 2743 | |
| @@ -2840,6 +2918,11 @@ static void ena_release_bars(struct ena_com_dev *ena_dev, struct pci_dev *pdev) · 174 unmodified lines | ||
| 2840 | 2918 | { |
| 2841 | 2919 | int release_bars; |
| 2842 | 2920 | |
| 2921 | + if (ena_dev->mem_bar) | |
| 2922 | + devm_iounmap(&pdev->dev, ena_dev->mem_bar); | |
| 2923 | + | |
| 2924 | + devm_iounmap(&pdev->dev, ena_dev->reg_bar); | |
| 2925 | + | |
| 2843 | 2926 | release_bars = pci_select_bars(pdev, IORESOURCE_MEM) & ENA_BAR_MASK; |
| 2844 | 2927 | pci_release_selected_regions(pdev, release_bars); |
| 2845 | 2928 | } |
| @@ -2927,8 +3010,9 @@ static int ena_probe(struct pci_dev *pdev, const struct pci_device_id *ent) · 81 unmodified lines | ||
| 2927 | 3010 | goto err_free_ena_dev; |
| 2928 | 3011 | } |
| 2929 | 3012 | |
| 2930 | − ena_dev->reg_bar = ioremap(pci_resource_start(pdev, ENA_REG_BAR), | |
| 2931 | − pci_resource_len(pdev, ENA_REG_BAR)); | |
| 3013 | + ena_dev->reg_bar = devm_ioremap(&pdev->dev, | |
| 3014 | + pci_resource_start(pdev, ENA_REG_BAR), | |
| 3015 | + pci_resource_len(pdev, ENA_REG_BAR)); | |
| 2932 | 3016 | if (!ena_dev->reg_bar) { |
| 2933 | 3017 | dev_err(&pdev->dev, "failed to remap regs bar\n"); |
| 2934 | 3018 | rc = -EFAULT; |
| @@ -2948,8 +3032,9 @@ static int ena_probe(struct pci_dev *pdev, const struct pci_device_id *ent) · 13 unmodified lines | ||
| 2948 | 3032 | ena_set_push_mode(pdev, ena_dev, &get_feat_ctx); |
| 2949 | 3033 | |
| 2950 | 3034 | if (ena_dev->tx_mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_DEV) { |
| 2951 | − ena_dev->mem_bar = ioremap_wc(pci_resource_start(pdev, ENA_MEM_BAR), | |
| 2952 | − pci_resource_len(pdev, ENA_MEM_BAR)); | |
| 3035 | + ena_dev->mem_bar = devm_ioremap_wc(&pdev->dev, | |
| 3036 | + pci_resource_start(pdev, ENA_MEM_BAR), | |
| 3037 | + pci_resource_len(pdev, ENA_MEM_BAR)); | |
| 2953 | 3038 | if (!ena_dev->mem_bar) { |
| 2954 | 3039 | rc = -EFAULT; |
| 2955 | 3040 | goto err_device_destroy; |
| @@ -45,7 +45,7 @@ · 44 unmodified lines | ||
| 45 | 45 | |
| 46 | 46 | #define DRV_MODULE_VER_MAJOR 1 |
| 47 | 47 | #define DRV_MODULE_VER_MINOR 1 |
| 48 | −#define DRV_MODULE_VER_SUBMINOR 2 | |
| 48 | +#define DRV_MODULE_VER_SUBMINOR 7 | |
| 49 | 49 | |
| 50 | 50 | #define DRV_MODULE_NAME "ena" |
| 51 | 51 | #ifndef DRV_MODULE_VERSION |
| @@ -146,7 +146,18 @@ struct ena_tx_buffer { · 94 unmodified lines | ||
| 146 | 146 | u32 tx_descs; |
| 147 | 147 | /* num of buffers used by this skb */ |
| 148 | 148 | u32 num_of_bufs; |
| 149 | − /* Save the last jiffies to detect missing tx packets */ | |
| 149 | + | |
| 150 | + /* Used for detect missing tx packets to limit the number of prints */ | |
| 151 | + u32 print_once; | |
| 152 | + /* Save the last jiffies to detect missing tx packets | |
| 153 | + * | |
| 154 | + * sets to non zero value on ena_start_xmit and set to zero on | |
| 155 | + * napi and timer_Service_routine. | |
| 156 | + * | |
| 157 | + * while this value is not protected by lock, | |
| 158 | + * a given packet is not expected to be handled by ena_start_xmit | |
| 159 | + * and by napi/timer_service at the same time. | |
| 160 | + */ | |
| 150 | 161 | unsigned long last_jiffies; |
| 151 | 162 | struct ena_com_buf bufs[ENA_PKT_MAX_BUFS]; |
| 152 | 163 | } ____cacheline_aligned; |
| @@ -170,7 +181,6 @@ struct ena_stats_tx { · 17 unmodified lines | ||
| 170 | 181 | u64 napi_comp; |
| 171 | 182 | u64 tx_poll; |
| 172 | 183 | u64 doorbells; |
| 173 | − u64 missing_tx_comp; | |
| 174 | 184 | u64 bad_req_id; |
| 175 | 185 | }; |
| 176 | 186 | |
| @@ -184,6 +194,7 @@ struct ena_stats_rx { · 7 unmodified lines | ||
| 184 | 194 | u64 dma_mapping_err; |
| 185 | 195 | u64 bad_desc_num; |
| 186 | 196 | u64 rx_copybreak_pkt; |
| 197 | + u64 empty_rx_ring; | |
| 187 | 198 | }; |
| 188 | 199 | |
| 189 | 200 | struct ena_ring { |
| @@ -231,6 +242,7 @@ struct ena_ring { · 41 unmodified lines | ||
| 231 | 242 | struct ena_stats_tx tx_stats; |
| 232 | 243 | struct ena_stats_rx rx_stats; |
| 233 | 244 | }; |
| 245 | + int empty_rx_queue; | |
| 234 | 246 | } ____cacheline_aligned; |
| 235 | 247 | |
| 236 | 248 | struct ena_stats_dev { |
| @@ -324,7 +324,7 @@ static int xgbe_map_rx_buffer(struct xgbe_prv_data *pdata, · 323 unmodified lines | ||
| 324 | 324 | struct xgbe_ring *ring, |
| 325 | 325 | struct xgbe_ring_data *rdata) |
| 326 | 326 | { |
| 327 | − int order, ret; | |
| 327 | + int ret; | |
| 328 | 328 | |
| 329 | 329 | if (!ring->rx_hdr_pa.pages) { |
| 330 | 330 | ret = xgbe_alloc_pages(pdata, &ring->rx_hdr_pa, GFP_ATOMIC, 0); |
| @@ -333,9 +333,8 @@ static int xgbe_map_rx_buffer(struct xgbe_prv_data *pdata, · 2 unmodified lines | ||
| 333 | 333 | } |
| 334 | 334 | |
| 335 | 335 | if (!ring->rx_buf_pa.pages) { |
| 336 | − order = max_t(int, PAGE_ALLOC_COSTLY_ORDER - 1, 0); | |
| 337 | 336 | ret = xgbe_alloc_pages(pdata, &ring->rx_buf_pa, GFP_ATOMIC, |
| 338 | − order); | |
| 337 | + PAGE_ALLOC_COSTLY_ORDER); | |
| 339 | 338 | if (ret) |
| 340 | 339 | return ret; |
| 341 | 340 | } |
| @@ -193,9 +193,6 @@ int hw_atl_utils_hw_get_regs(struct aq_hw_s *self, · 192 unmodified lines | ||
| 193 | 193 | struct aq_hw_caps_s *aq_hw_caps, |
| 194 | 194 | u32 *regs_buff); |
| 195 | 195 | |
| 196 | −int hw_atl_utils_hw_get_settings(struct aq_hw_s *self, | |
| 197 | − struct ethtool_cmd *cmd); | |
| 198 | − | |
| 199 | 196 | int hw_atl_utils_hw_set_power(struct aq_hw_s *self, |
| 200 | 197 | unsigned int power_state); |
| 201 | 198 | |
| @@ -2026,9 +2026,12 @@ static int bcm_sysport_probe(struct platform_device *pdev) · 2025 unmodified lines | ||
| 2026 | 2026 | priv->num_rx_desc_words = params->num_rx_desc_words; |
| 2027 | 2027 | |
| 2028 | 2028 | priv->irq0 = platform_get_irq(pdev, 0); |
| 2029 | − if (!priv->is_lite) | |
| 2029 | + if (!priv->is_lite) { | |
| 2030 | 2030 | priv->irq1 = platform_get_irq(pdev, 1); |
| 2031 | − priv->wol_irq = platform_get_irq(pdev, 2); | |
| 2031 | + priv->wol_irq = platform_get_irq(pdev, 2); | |
| 2032 | + } else { | |
| 2033 | + priv->wol_irq = platform_get_irq(pdev, 1); | |
| 2034 | + } | |
| 2032 | 2035 | if (priv->irq0 <= 0 || (priv->irq1 <= 0 && !priv->is_lite)) { |
| 2033 | 2036 | dev_err(&pdev->dev, "invalid interrupts\n"); |
| 2034 | 2037 | ret = -EINVAL; |
| @@ -1926,7 +1926,7 @@ u16 bnx2x_select_queue(struct net_device *dev, struct sk_buff *skb, · 1925 unmodified lines | ||
| 1926 | 1926 | } |
| 1927 | 1927 | |
| 1928 | 1928 | /* select a non-FCoE queue */ |
| 1929 | − return fallback(dev, skb) % BNX2X_NUM_ETH_QUEUES(bp); | |
| 1929 | + return fallback(dev, skb) % (BNX2X_NUM_ETH_QUEUES(bp) * bp->max_cos); | |
| 1930 | 1930 | } |
| 1931 | 1931 | |
| 1932 | 1932 | void bnx2x_set_num_queues(struct bnx2x *bp) |
| @@ -3883,15 +3883,26 @@ netdev_tx_t bnx2x_start_xmit(struct sk_buff *skb, struct net_device *dev) · 1950 unmodified lines | ||
| 3883 | 3883 | /* when transmitting in a vf, start bd must hold the ethertype |
| 3884 | 3884 | * for fw to enforce it |
| 3885 | 3885 | */ |
| 3886 | + u16 vlan_tci = 0; | |
| 3886 | 3887 | #ifndef BNX2X_STOP_ON_ERROR |
| 3887 | − if (IS_VF(bp)) | |
| 3888 | + if (IS_VF(bp)) { | |
| 3888 | 3889 | #endif |
| 3889 | − tx_start_bd->vlan_or_ethertype = | |
| 3890 | − cpu_to_le16(ntohs(eth->h_proto)); | |
| 3890 | + /* Still need to consider inband vlan for enforced */ | |
| 3891 | + if (__vlan_get_tag(skb, &vlan_tci)) { | |
| 3892 | + tx_start_bd->vlan_or_ethertype = | |
| 3893 | + cpu_to_le16(ntohs(eth->h_proto)); | |
| 3894 | + } else { | |
| 3895 | + tx_start_bd->bd_flags.as_bitfield |= | |
| 3896 | + (X_ETH_INBAND_VLAN << | |
| 3897 | + ETH_TX_BD_FLAGS_VLAN_MODE_SHIFT); | |
| 3898 | + tx_start_bd->vlan_or_ethertype = | |
| 3899 | + cpu_to_le16(vlan_tci); | |
| 3900 | + } | |
| 3891 | 3901 | #ifndef BNX2X_STOP_ON_ERROR |
| 3892 | − else | |
| 3902 | + } else { | |
| 3893 | 3903 | /* used by FW for packet accounting */ |
| 3894 | 3904 | tx_start_bd->vlan_or_ethertype = cpu_to_le16(pkt_prod); |
| 3905 | + } | |
| 3895 | 3906 | #endif |
| 3896 | 3907 | } |
| 3897 | 3908 | |
| @@ -901,6 +901,8 @@ static void bnx2x_vf_flr(struct bnx2x *bp, struct bnx2x_virtf *vf) · 900 unmodified lines | ||
| 901 | 901 | /* release VF resources */ |
| 902 | 902 | bnx2x_vf_free_resc(bp, vf); |
| 903 | 903 | |
| 904 | + vf->malicious = false; | |
| 905 | + | |
| 904 | 906 | /* re-open the mailbox */ |
| 905 | 907 | bnx2x_vf_enable_mbx(bp, vf->abs_vfid); |
| 906 | 908 | return; |
| @@ -1822,9 +1824,11 @@ get_vf: · 915 unmodified lines | ||
| 1822 | 1824 | vf->abs_vfid, qidx); |
| 1823 | 1825 | bnx2x_vf_handle_rss_update_eqe(bp, vf); |
| 1824 | 1826 | case EVENT_RING_OPCODE_VF_FLR: |
| 1825 | − case EVENT_RING_OPCODE_MALICIOUS_VF: | |
| 1826 | 1827 | /* Do nothing for now */ |
| 1827 | 1828 | return 0; |
| 1829 | + case EVENT_RING_OPCODE_MALICIOUS_VF: | |
| 1830 | + vf->malicious = true; | |
| 1831 | + return 0; | |
| 1828 | 1832 | } |
| 1829 | 1833 | |
| 1830 | 1834 | return 0; |
| @@ -1905,6 +1909,13 @@ void bnx2x_iov_adjust_stats_req(struct bnx2x *bp) · 74 unmodified lines | ||
| 1905 | 1909 | continue; |
| 1906 | 1910 | } |
| 1907 | 1911 | |
| 1912 | + if (vf->malicious) { | |
| 1913 | + DP_AND((BNX2X_MSG_IOV | BNX2X_MSG_STATS), | |
| 1914 | + "vf %d malicious so no stats for it\n", | |
| 1915 | + vf->abs_vfid); | |
| 1916 | + continue; | |
| 1917 | + } | |
| 1918 | + | |
| 1908 | 1919 | DP_AND((BNX2X_MSG_IOV | BNX2X_MSG_STATS), |
| 1909 | 1920 | "add addresses for vf %d\n", vf->abs_vfid); |
| 1910 | 1921 | for_each_vfq(vf, j) { |
| @@ -3042,7 +3053,7 @@ void bnx2x_vf_pci_dealloc(struct bnx2x *bp) · 1131 unmodified lines | ||
| 3042 | 3053 | { |
| 3043 | 3054 | BNX2X_PCI_FREE(bp->vf2pf_mbox, bp->vf2pf_mbox_mapping, |
| 3044 | 3055 | sizeof(struct bnx2x_vf_mbx_msg)); |
| 3045 | − BNX2X_PCI_FREE(bp->vf2pf_mbox, bp->pf2vf_bulletin_mapping, | |
| 3056 | + BNX2X_PCI_FREE(bp->pf2vf_bulletin, bp->pf2vf_bulletin_mapping, | |
| 3046 | 3057 | sizeof(union pf_vf_bulletin)); |
| 3047 | 3058 | } |
| 3048 | 3059 | |
| @@ -141,6 +141,7 @@ struct bnx2x_virtf { · 140 unmodified lines | ||
| 141 | 141 | #define VF_RESET 3 /* VF FLR'd, pending cleanup */ |
| 142 | 142 | |
| 143 | 143 | bool flr_clnup_stage; /* true during flr cleanup */ |
| 144 | + bool malicious; /* true if FW indicated so, until FLR */ | |
| 144 | 145 | |
| 145 | 146 | /* dma */ |
| 146 | 147 | dma_addr_t fw_stat_map; |
| @@ -2196,10 +2196,14 @@ static int cxgb_up(struct adapter *adap) · 2195 unmodified lines | ||
| 2196 | 2196 | if (err) |
| 2197 | 2197 | goto irq_err; |
| 2198 | 2198 | } |
| 2199 | + | |
| 2200 | + mutex_lock(&uld_mutex); | |
| 2199 | 2201 | enable_rx(adap); |
| 2200 | 2202 | t4_sge_start(adap); |
| 2201 | 2203 | t4_intr_enable(adap); |
| 2202 | 2204 | adap->flags |= FULL_INIT_DONE; |
| 2205 | + mutex_unlock(&uld_mutex); | |
| 2206 | + | |
| 2203 | 2207 | notify_ulds(adap, CXGB4_STATE_UP); |
| 2204 | 2208 | #if IS_ENABLED(CONFIG_IPV6) |
| 2205 | 2209 | update_clip(adap); |
| @@ -2771,6 +2775,9 @@ void t4_fatal_err(struct adapter *adap) · 565 unmodified lines | ||
| 2771 | 2775 | { |
| 2772 | 2776 | int port; |
| 2773 | 2777 | |
| 2778 | + if (pci_channel_offline(adap->pdev)) | |
| 2779 | + return; | |
| 2780 | + | |
| 2774 | 2781 | /* Disable the SGE since ULDs are going to free resources that |
| 2775 | 2782 | * could be exposed to the adapter. RDMA MWs for example... |
| 2776 | 2783 | */ |
| @@ -3882,9 +3889,10 @@ static pci_ers_result_t eeh_err_detected(struct pci_dev *pdev, · 1105 unmodified lines | ||
| 3882 | 3889 | spin_lock(&adap->stats_lock); |
| 3883 | 3890 | for_each_port(adap, i) { |
| 3884 | 3891 | struct net_device *dev = adap->port[i]; |
| 3885 | − | |
| 3886 | − netif_device_detach(dev); | |
| 3887 | − netif_carrier_off(dev); | |
| 3892 | + if (dev) { | |
| 3893 | + netif_device_detach(dev); | |
| 3894 | + netif_carrier_off(dev); | |
| 3895 | + } | |
| 3888 | 3896 | } |
| 3889 | 3897 | spin_unlock(&adap->stats_lock); |
| 3890 | 3898 | disable_interrupts(adap); |
| @@ -3963,12 +3971,13 @@ static void eeh_resume(struct pci_dev *pdev) · 72 unmodified lines | ||
| 3963 | 3971 | rtnl_lock(); |
| 3964 | 3972 | for_each_port(adap, i) { |
| 3965 | 3973 | struct net_device *dev = adap->port[i]; |
| 3966 | − | |
| 3967 | − if (netif_running(dev)) { | |
| 3968 | − link_start(dev); | |
| 3969 | − cxgb_set_rxmode(dev); | |
| 3974 | + if (dev) { | |
| 3975 | + if (netif_running(dev)) { | |
| 3976 | + link_start(dev); | |
| 3977 | + cxgb_set_rxmode(dev); | |
| 3978 | + } | |
| 3979 | + netif_device_attach(dev); | |
| 3970 | 3980 | } |
| 3971 | − netif_device_attach(dev); | |
| 3972 | 3981 | } |
| 3973 | 3982 | rtnl_unlock(); |
| 3974 | 3983 | } |
| @@ -4516,7 +4525,7 @@ static void dummy_setup(struct net_device *dev) · 541 unmodified lines | ||
| 4516 | 4525 | /* Initialize the device structure. */ |
| 4517 | 4526 | dev->netdev_ops = &cxgb4_mgmt_netdev_ops; |
| 4518 | 4527 | dev->ethtool_ops = &cxgb4_mgmt_ethtool_ops; |
| 4519 | − dev->destructor = free_netdev; | |
| 4528 | + dev->needs_free_netdev = true; | |
| 4520 | 4529 | } |
| 4521 | 4530 | |
| 4522 | 4531 | static int config_mgmt_dev(struct pci_dev *pdev) |
| @@ -4557,8 +4557,13 @@ void t4_intr_enable(struct adapter *adapter) · 4556 unmodified lines | ||
| 4557 | 4557 | */ |
| 4558 | 4558 | void t4_intr_disable(struct adapter *adapter) |
| 4559 | 4559 | { |
| 4560 | − u32 whoami = t4_read_reg(adapter, PL_WHOAMI_A); | |
| 4561 | − u32 pf = CHELSIO_CHIP_VERSION(adapter->params.chip) <= CHELSIO_T5 ? | |
| 4560 | + u32 whoami, pf; | |
| 4561 | + | |
| 4562 | + if (pci_channel_offline(adapter->pdev)) | |
| 4563 | + return; | |
| 4564 | + | |
| 4565 | + whoami = t4_read_reg(adapter, PL_WHOAMI_A); | |
| 4566 | + pf = CHELSIO_CHIP_VERSION(adapter->params.chip) <= CHELSIO_T5 ? | |
| 4562 | 4567 | SOURCEPF_G(whoami) : T6_SOURCEPF_G(whoami); |
| 4563 | 4568 | |
| 4564 | 4569 | t4_write_reg(adapter, MYPF_REG(PL_PF_INT_ENABLE_A), 0); |
| @@ -37,7 +37,7 @@ · 36 unmodified lines | ||
| 37 | 37 | |
| 38 | 38 | #define T4FW_VERSION_MAJOR 0x01 |
| 39 | 39 | #define T4FW_VERSION_MINOR 0x10 |
| 40 | −#define T4FW_VERSION_MICRO 0x2B | |
| 40 | +#define T4FW_VERSION_MICRO 0x2D | |
| 41 | 41 | #define T4FW_VERSION_BUILD 0x00 |
| 42 | 42 | |
| 43 | 43 | #define T4FW_MIN_VERSION_MAJOR 0x01 |
| @@ -46,7 +46,7 @@ · 2 unmodified lines | ||
| 46 | 46 | |
| 47 | 47 | #define T5FW_VERSION_MAJOR 0x01 |
| 48 | 48 | #define T5FW_VERSION_MINOR 0x10 |
| 49 | −#define T5FW_VERSION_MICRO 0x2B | |
| 49 | +#define T5FW_VERSION_MICRO 0x2D | |
| 50 | 50 | #define T5FW_VERSION_BUILD 0x00 |
| 51 | 51 | |
| 52 | 52 | #define T5FW_MIN_VERSION_MAJOR 0x00 |
| @@ -55,7 +55,7 @@ · 2 unmodified lines | ||
| 55 | 55 | |
| 56 | 56 | #define T6FW_VERSION_MAJOR 0x01 |
| 57 | 57 | #define T6FW_VERSION_MINOR 0x10 |
| 58 | −#define T6FW_VERSION_MICRO 0x2B | |
| 58 | +#define T6FW_VERSION_MICRO 0x2D | |
| 59 | 59 | #define T6FW_VERSION_BUILD 0x00 |
| 60 | 60 | |
| 61 | 61 | #define T6FW_MIN_VERSION_MAJOR 0x00 |
| @@ -739,6 +739,8 @@ static int ethoc_open(struct net_device *dev) · 738 unmodified lines | ||
| 739 | 739 | if (ret) |
| 740 | 740 | return ret; |
| 741 | 741 | |
| 742 | + napi_enable(&priv->napi); | |
| 743 | + | |
| 742 | 744 | ethoc_init_ring(priv, dev->mem_start); |
| 743 | 745 | ethoc_reset(priv); |
| 744 | 746 | |
| @@ -754,7 +756,6 @@ static int ethoc_open(struct net_device *dev) · 9 unmodified lines | ||
| 754 | 756 | priv->old_duplex = -1; |
| 755 | 757 | |
| 756 | 758 | phy_start(dev->phydev); |
| 757 | − napi_enable(&priv->napi); | |
| 758 | 759 | |
| 759 | 760 | if (netif_msg_ifup(priv)) { |
| 760 | 761 | dev_info(&dev->dev, "I/O: %08lx Memory: %08lx-%08lx\n", |
| @@ -381,7 +381,7 @@ static int fsl_pq_mdio_probe(struct platform_device *pdev) · 380 unmodified lines | ||
| 381 | 381 | { |
| 382 | 382 | const struct of_device_id *id = |
| 383 | 383 | of_match_device(fsl_pq_mdio_match, &pdev->dev); |
| 384 | − const struct fsl_pq_mdio_data *data = id->data; | |
| 384 | + const struct fsl_pq_mdio_data *data; | |
| 385 | 385 | struct device_node *np = pdev->dev.of_node; |
| 386 | 386 | struct resource res; |
| 387 | 387 | struct device_node *tbi; |
| @@ -389,6 +389,13 @@ static int fsl_pq_mdio_probe(struct platform_device *pdev) · 1 unmodified line | ||
| 389 | 389 | struct mii_bus *new_bus; |
| 390 | 390 | int err; |
| 391 | 391 | |
| 392 | + if (!id) { | |
| 393 | + dev_err(&pdev->dev, "Failed to match device\n"); | |
| 394 | + return -ENODEV; | |
| 395 | + } | |
| 396 | + | |
| 397 | + data = id->data; | |
| 398 | + | |
| 392 | 399 | dev_dbg(&pdev->dev, "found %s compatible node\n", id->compatible); |
| 393 | 400 | |
| 394 | 401 | new_bus = mdiobus_alloc_size(sizeof(*priv)); |
| @@ -343,6 +343,7 @@ static int emac_reset(struct emac_instance *dev) · 342 unmodified lines | ||
| 343 | 343 | { |
| 344 | 344 | struct emac_regs __iomem *p = dev->emacp; |
| 345 | 345 | int n = 20; |
| 346 | + bool __maybe_unused try_internal_clock = false; | |
| 346 | 347 | |
| 347 | 348 | DBG(dev, "reset" NL); |
| 348 | 349 | |
| @@ -355,6 +356,7 @@ static int emac_reset(struct emac_instance *dev) · 6 unmodified lines | ||
| 355 | 356 | } |
| 356 | 357 | |
| 357 | 358 | #ifdef CONFIG_PPC_DCR_NATIVE |
| 359 | +do_retry: | |
| 358 | 360 | /* |
| 359 | 361 | * PPC460EX/GT Embedded Processor Advanced User's Manual |
| 360 | 362 | * section 28.10.1 Mode Register 0 (EMACx_MR0) states: |
| @@ -362,10 +364,19 @@ static int emac_reset(struct emac_instance *dev) · 1 unmodified line | ||
| 362 | 364 | * of the EMAC. If none is present, select the internal clock |
| 363 | 365 | * (SDR0_ETH_CFG[EMACx_PHY_CLK] = 1). |
| 364 | 366 | * After a soft reset, select the external clock. |
| 367 | + * | |
| 368 | + * The AR8035-A PHY Meraki MR24 does not provide a TX Clk if the | |
| 369 | + * ethernet cable is not attached. This causes the reset to timeout | |
| 370 | + * and the PHY detection code in emac_init_phy() is unable to | |
| 371 | + * communicate and detect the AR8035-A PHY. As a result, the emac | |
| 372 | + * driver bails out early and the user has no ethernet. | |
| 373 | + * In order to stay compatible with existing configurations, the | |
| 374 | + * driver will temporarily switch to the internal clock, after | |
| 375 | + * the first reset fails. | |
| 365 | 376 | */ |
| 366 | 377 | if (emac_has_feature(dev, EMAC_FTR_460EX_PHY_CLK_FIX)) { |
| 367 | − if (dev->phy_address == 0xffffffff && | |
| 368 | − dev->phy_map == 0xffffffff) { | |
| 378 | + if (try_internal_clock || (dev->phy_address == 0xffffffff && | |
| 379 | + dev->phy_map == 0xffffffff)) { | |
| 369 | 380 | /* No PHY: select internal loop clock before reset */ |
| 370 | 381 | dcri_clrset(SDR0, SDR0_ETH_CFG, |
| 371 | 382 | 0, SDR0_ETH_CFG_ECS << dev->cell_index); |
| @@ -383,8 +394,15 @@ static int emac_reset(struct emac_instance *dev) · 11 unmodified lines | ||
| 383 | 394 | |
| 384 | 395 | #ifdef CONFIG_PPC_DCR_NATIVE |
| 385 | 396 | if (emac_has_feature(dev, EMAC_FTR_460EX_PHY_CLK_FIX)) { |
| 386 | − if (dev->phy_address == 0xffffffff && | |
| 387 | − dev->phy_map == 0xffffffff) { | |
| 397 | + if (!n && !try_internal_clock) { | |
| 398 | + /* first attempt has timed out. */ | |
| 399 | + n = 20; | |
| 400 | + try_internal_clock = true; | |
| 401 | + goto do_retry; | |
| 402 | + } | |
| 403 | + | |
| 404 | + if (try_internal_clock || (dev->phy_address == 0xffffffff && | |
| 405 | + dev->phy_map == 0xffffffff)) { | |
| 388 | 406 | /* No PHY: restore external clock source after reset */ |
| 389 | 407 | dcri_clrset(SDR0, SDR0_ETH_CFG, |
| 390 | 408 | SDR0_ETH_CFG_ECS << dev->cell_index, 0); |
| @@ -2460,20 +2478,24 @@ static int emac_mii_bus_reset(struct mii_bus *bus) · 2069 unmodified lines | ||
| 2460 | 2478 | return emac_reset(dev); |
| 2461 | 2479 | } |
| 2462 | 2480 | |
| 2481 | +static int emac_mdio_phy_start_aneg(struct mii_phy *phy, | |
| 2482 | + struct phy_device *phy_dev) | |
| 2483 | +{ | |
| 2484 | + phy_dev->autoneg = phy->autoneg; | |
| 2485 | + phy_dev->speed = phy->speed; | |
| 2486 | + phy_dev->duplex = phy->duplex; | |
| 2487 | + phy_dev->advertising = phy->advertising; | |
| 2488 | + return phy_start_aneg(phy_dev); | |
| 2489 | +} | |
| 2490 | + | |
| 2463 | 2491 | static int emac_mdio_setup_aneg(struct mii_phy *phy, u32 advertise) |
| 2464 | 2492 | { |
| 2465 | 2493 | struct net_device *ndev = phy->dev; |
| 2466 | 2494 | struct emac_instance *dev = netdev_priv(ndev); |
| 2467 | 2495 | |
| 2468 | − dev->phy.autoneg = AUTONEG_ENABLE; | |
| 2469 | − dev->phy.speed = SPEED_1000; | |
| 2470 | − dev->phy.duplex = DUPLEX_FULL; | |
| 2471 | − dev->phy.advertising = advertise; | |
| 2472 | 2496 | phy->autoneg = AUTONEG_ENABLE; |
| 2473 | − phy->speed = dev->phy.speed; | |
| 2474 | − phy->duplex = dev->phy.duplex; | |
| 2475 | 2497 | phy->advertising = advertise; |
| 2476 | − return phy_start_aneg(dev->phy_dev); | |
| 2498 | + return emac_mdio_phy_start_aneg(phy, dev->phy_dev); | |
| 2477 | 2499 | } |
| 2478 | 2500 | |
| 2479 | 2501 | static int emac_mdio_setup_forced(struct mii_phy *phy, int speed, int fd) |
| @@ -2481,13 +2503,10 @@ static int emac_mdio_setup_forced(struct mii_phy *phy, int speed, int fd) · 1 unmodified line | ||
| 2481 | 2503 | struct net_device *ndev = phy->dev; |
| 2482 | 2504 | struct emac_instance *dev = netdev_priv(ndev); |
| 2483 | 2505 | |
| 2484 | − dev->phy.autoneg = AUTONEG_DISABLE; | |
| 2485 | − dev->phy.speed = speed; | |
| 2486 | − dev->phy.duplex = fd; | |
| 2487 | 2506 | phy->autoneg = AUTONEG_DISABLE; |
| 2488 | 2507 | phy->speed = speed; |
| 2489 | 2508 | phy->duplex = fd; |
| 2490 | − return phy_start_aneg(dev->phy_dev); | |
| 2509 | + return emac_mdio_phy_start_aneg(phy, dev->phy_dev); | |
| 2491 | 2510 | } |
| 2492 | 2511 | |
| 2493 | 2512 | static int emac_mdio_poll_link(struct mii_phy *phy) |
| @@ -2509,16 +2528,17 @@ static int emac_mdio_read_link(struct mii_phy *phy) · 15 unmodified lines | ||
| 2509 | 2528 | { |
| 2510 | 2529 | struct net_device *ndev = phy->dev; |
| 2511 | 2530 | struct emac_instance *dev = netdev_priv(ndev); |
| 2531 | + struct phy_device *phy_dev = dev->phy_dev; | |
| 2512 | 2532 | int res; |
| 2513 | 2533 | |
| 2514 | − res = phy_read_status(dev->phy_dev); | |
| 2534 | + res = phy_read_status(phy_dev); | |
| 2515 | 2535 | if (res) |
| 2516 | 2536 | return res; |
| 2517 | 2537 | |
| 2518 | − dev->phy.speed = phy->speed; | |
| 2519 | − dev->phy.duplex = phy->duplex; | |
| 2520 | − dev->phy.pause = phy->pause; | |
| 2521 | − dev->phy.asym_pause = phy->asym_pause; | |
| 2538 | + phy->speed = phy_dev->speed; | |
| 2539 | + phy->duplex = phy_dev->duplex; | |
| 2540 | + phy->pause = phy_dev->pause; | |
| 2541 | + phy->asym_pause = phy_dev->asym_pause; | |
| 2522 | 2542 | return 0; |
| 2523 | 2543 | } |
| 2524 | 2544 | |
| @@ -2528,13 +2548,6 @@ static int emac_mdio_init_phy(struct mii_phy *phy) · 3 unmodified lines | ||
| 2528 | 2548 | struct emac_instance *dev = netdev_priv(ndev); |
| 2529 | 2549 | |
| 2530 | 2550 | phy_start(dev->phy_dev); |
| 2531 | − dev->phy.autoneg = phy->autoneg; | |
| 2532 | − dev->phy.speed = phy->speed; | |
| 2533 | − dev->phy.duplex = phy->duplex; | |
| 2534 | − dev->phy.advertising = phy->advertising; | |
| 2535 | − dev->phy.pause = phy->pause; | |
| 2536 | − dev->phy.asym_pause = phy->asym_pause; | |
| 2537 | − | |
| 2538 | 2551 | return phy_init_hw(dev->phy_dev); |
| 2539 | 2552 | } |
| 2540 | 2553 | |
| @@ -81,7 +81,7 @@ · 80 unmodified lines | ||
| 81 | 81 | static const char ibmvnic_driver_name[] = "ibmvnic"; |
| 82 | 82 | static const char ibmvnic_driver_string[] = "IBM System i/p Virtual NIC Driver"; |
| 83 | 83 | |
| 84 | −MODULE_AUTHOR("Santiago Leon <santi_leon@yahoo.com>"); | |
| 84 | +MODULE_AUTHOR("Santiago Leon"); | |
| 85 | 85 | MODULE_DESCRIPTION("IBM System i/p Virtual NIC Driver"); |
| 86 | 86 | MODULE_LICENSE("GPL"); |
| 87 | 87 | MODULE_VERSION(IBMVNIC_DRIVER_VERSION); |
| @@ -1468,6 +1468,11 @@ static void ibmvnic_netpoll_controller(struct net_device *dev) · 1380 unmodified lines | ||
| 1468 | 1468 | } |
| 1469 | 1469 | #endif |
| 1470 | 1470 | |
| 1471 | +static int ibmvnic_change_mtu(struct net_device *netdev, int new_mtu) | |
| 1472 | +{ | |
| 1473 | + return -EOPNOTSUPP; | |
| 1474 | +} | |
| 1475 | + | |
| 1471 | 1476 | static const struct net_device_ops ibmvnic_netdev_ops = { |
| 1472 | 1477 | .ndo_open = ibmvnic_open, |
| 1473 | 1478 | .ndo_stop = ibmvnic_close, |
| @@ -1479,6 +1484,7 @@ static const struct net_device_ops ibmvnic_netdev_ops = { · 5 unmodified lines | ||
| 1479 | 1484 | #ifdef CONFIG_NET_POLL_CONTROLLER |
| 1480 | 1485 | .ndo_poll_controller = ibmvnic_netpoll_controller, |
| 1481 | 1486 | #endif |
| 1487 | + .ndo_change_mtu = ibmvnic_change_mtu, | |
| 1482 | 1488 | }; |
| 1483 | 1489 | |
| 1484 | 1490 | /* ethtool functions */ |
| @@ -399,6 +399,7 @@ struct i40e_pf { · 398 unmodified lines | ||
| 399 | 399 | #define I40E_FLAG_RX_CSUM_ENABLED BIT_ULL(1) |
| 400 | 400 | #define I40E_FLAG_MSI_ENABLED BIT_ULL(2) |
| 401 | 401 | #define I40E_FLAG_MSIX_ENABLED BIT_ULL(3) |
| 402 | +#define I40E_FLAG_HW_ATR_EVICT_ENABLED BIT_ULL(4) | |
| 402 | 403 | #define I40E_FLAG_RSS_ENABLED BIT_ULL(6) |
| 403 | 404 | #define I40E_FLAG_VMDQ_ENABLED BIT_ULL(7) |
| 404 | 405 | #define I40E_FLAG_IWARP_ENABLED BIT_ULL(10) |
| @@ -224,7 +224,7 @@ static const struct i40e_priv_flags i40e_gstrings_priv_flags[] = { · 223 unmodified lines | ||
| 224 | 224 | I40E_PRIV_FLAG("LinkPolling", I40E_FLAG_LINK_POLLING_ENABLED, 0), |
| 225 | 225 | I40E_PRIV_FLAG("flow-director-atr", I40E_FLAG_FD_ATR_ENABLED, 0), |
| 226 | 226 | I40E_PRIV_FLAG("veb-stats", I40E_FLAG_VEB_STATS_ENABLED, 0), |
| 227 | − I40E_PRIV_FLAG("hw-atr-eviction", I40E_FLAG_HW_ATR_EVICT_CAPABLE, 0), | |
| 227 | + I40E_PRIV_FLAG("hw-atr-eviction", I40E_FLAG_HW_ATR_EVICT_ENABLED, 0), | |
| 228 | 228 | I40E_PRIV_FLAG("legacy-rx", I40E_FLAG_LEGACY_RX, 0), |
| 229 | 229 | }; |
| 230 | 230 | |
| @@ -4092,7 +4092,7 @@ flags_complete: · 3861 unmodified lines | ||
| 4092 | 4092 | |
| 4093 | 4093 | /* Only allow ATR evict on hardware that is capable of handling it */ |
| 4094 | 4094 | if (pf->flags & I40E_FLAG_HW_ATR_EVICT_CAPABLE) |
| 4095 | − pf->flags &= ~I40E_FLAG_HW_ATR_EVICT_CAPABLE; | |
| 4095 | + pf->flags &= ~I40E_FLAG_HW_ATR_EVICT_ENABLED; | |
| 4096 | 4096 | |
| 4097 | 4097 | if (changed_flags & I40E_FLAG_TRUE_PROMISC_SUPPORT) { |
| 4098 | 4098 | u16 sw_flags = 0, valid_flags = 0; |
| @@ -295,7 +295,7 @@ struct i40e_vsi *i40e_find_vsi_from_id(struct i40e_pf *pf, u16 id) · 294 unmodified lines | ||
| 295 | 295 | **/ |
| 296 | 296 | void i40e_service_event_schedule(struct i40e_pf *pf) |
| 297 | 297 | { |
| 298 | − if (!test_bit(__I40E_VSI_DOWN, pf->state) && | |
| 298 | + if (!test_bit(__I40E_DOWN, pf->state) && | |
| 299 | 299 | !test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state)) |
| 300 | 300 | queue_work(i40e_wq, &pf->service_task); |
| 301 | 301 | } |
| @@ -3611,7 +3611,7 @@ static irqreturn_t i40e_intr(int irq, void *data) · 3309 unmodified lines | ||
| 3611 | 3611 | * this is not a performance path and napi_schedule() |
| 3612 | 3612 | * can deal with rescheduling. |
| 3613 | 3613 | */ |
| 3614 | − if (!test_bit(__I40E_VSI_DOWN, pf->state)) | |
| 3614 | + if (!test_bit(__I40E_DOWN, pf->state)) | |
| 3615 | 3615 | napi_schedule_irqoff(&q_vector->napi); |
| 3616 | 3616 | } |
| 3617 | 3617 | |
| @@ -3687,7 +3687,7 @@ static irqreturn_t i40e_intr(int irq, void *data) · 69 unmodified lines | ||
| 3687 | 3687 | enable_intr: |
| 3688 | 3688 | /* re-enable interrupt causes */ |
| 3689 | 3689 | wr32(hw, I40E_PFINT_ICR0_ENA, ena_mask); |
| 3690 | − if (!test_bit(__I40E_VSI_DOWN, pf->state)) { | |
| 3690 | + if (!test_bit(__I40E_DOWN, pf->state)) { | |
| 3691 | 3691 | i40e_service_event_schedule(pf); |
| 3692 | 3692 | i40e_irq_dynamic_enable_icr0(pf, false); |
| 3693 | 3693 | } |
| @@ -6203,7 +6203,7 @@ static void i40e_fdir_reinit_subtask(struct i40e_pf *pf) · 2509 unmodified lines | ||
| 6203 | 6203 | { |
| 6204 | 6204 | |
| 6205 | 6205 | /* if interface is down do nothing */ |
| 6206 | − if (test_bit(__I40E_VSI_DOWN, pf->state)) | |
| 6206 | + if (test_bit(__I40E_DOWN, pf->state)) | |
| 6207 | 6207 | return; |
| 6208 | 6208 | |
| 6209 | 6209 | if (test_bit(__I40E_FD_FLUSH_REQUESTED, pf->state)) |
| @@ -6344,7 +6344,7 @@ static void i40e_watchdog_subtask(struct i40e_pf *pf) · 134 unmodified lines | ||
| 6344 | 6344 | int i; |
| 6345 | 6345 | |
| 6346 | 6346 | /* if interface is down do nothing */ |
| 6347 | − if (test_bit(__I40E_VSI_DOWN, pf->state) || | |
| 6347 | + if (test_bit(__I40E_DOWN, pf->state) || | |
| 6348 | 6348 | test_bit(__I40E_CONFIG_BUSY, pf->state)) |
| 6349 | 6349 | return; |
| 6350 | 6350 | |
| @@ -6399,9 +6399,9 @@ static void i40e_reset_subtask(struct i40e_pf *pf) · 48 unmodified lines | ||
| 6399 | 6399 | reset_flags |= BIT(__I40E_GLOBAL_RESET_REQUESTED); |
| 6400 | 6400 | clear_bit(__I40E_GLOBAL_RESET_REQUESTED, pf->state); |
| 6401 | 6401 | } |
| 6402 | − if (test_bit(__I40E_VSI_DOWN_REQUESTED, pf->state)) { | |
| 6403 | − reset_flags |= BIT(__I40E_VSI_DOWN_REQUESTED); | |
| 6404 | − clear_bit(__I40E_VSI_DOWN_REQUESTED, pf->state); | |
| 6402 | + if (test_bit(__I40E_DOWN_REQUESTED, pf->state)) { | |
| 6403 | + reset_flags |= BIT(__I40E_DOWN_REQUESTED); | |
| 6404 | + clear_bit(__I40E_DOWN_REQUESTED, pf->state); | |
| 6405 | 6405 | } |
| 6406 | 6406 | |
| 6407 | 6407 | /* If there's a recovery already waiting, it takes |
| @@ -6415,7 +6415,7 @@ static void i40e_reset_subtask(struct i40e_pf *pf) · 7 unmodified lines | ||
| 6415 | 6415 | |
| 6416 | 6416 | /* If we're already down or resetting, just bail */ |
| 6417 | 6417 | if (reset_flags && |
| 6418 | − !test_bit(__I40E_VSI_DOWN, pf->state) && | |
| 6418 | + !test_bit(__I40E_DOWN, pf->state) && | |
| 6419 | 6419 | !test_bit(__I40E_CONFIG_BUSY, pf->state)) { |
| 6420 | 6420 | rtnl_lock(); |
| 6421 | 6421 | i40e_do_reset(pf, reset_flags, true); |
| @@ -7002,7 +7002,7 @@ static void i40e_rebuild(struct i40e_pf *pf, bool reinit, bool lock_acquired) · 580 unmodified lines | ||
| 7002 | 7002 | u32 val; |
| 7003 | 7003 | int v; |
| 7004 | 7004 | |
| 7005 | − if (test_bit(__I40E_VSI_DOWN, pf->state)) | |
| 7005 | + if (test_bit(__I40E_DOWN, pf->state)) | |
| 7006 | 7006 | goto clear_recovery; |
| 7007 | 7007 | dev_dbg(&pf->pdev->dev, "Rebuilding internal switch\n"); |
| 7008 | 7008 | |
| @@ -8821,11 +8821,12 @@ static int i40e_sw_init(struct i40e_pf *pf) · 1812 unmodified lines | ||
| 8821 | 8821 | (pf->hw.aq.api_min_ver > 4))) { |
| 8822 | 8822 | /* Supported in FW API version higher than 1.4 */ |
| 8823 | 8823 | pf->flags |= I40E_FLAG_GENEVE_OFFLOAD_CAPABLE; |
| 8824 | − pf->flags = I40E_FLAG_HW_ATR_EVICT_CAPABLE; | |
| 8825 | − } else { | |
| 8826 | − pf->flags = I40E_FLAG_HW_ATR_EVICT_CAPABLE; | |
| 8827 | 8824 | } |
| 8828 | 8825 | |
| 8826 | + /* Enable HW ATR eviction if possible */ | |
| 8827 | + if (pf->flags & I40E_FLAG_HW_ATR_EVICT_CAPABLE) | |
| 8828 | + pf->flags |= I40E_FLAG_HW_ATR_EVICT_ENABLED; | |
| 8829 | + | |
| 8829 | 8830 | pf->eeprom_version = 0xDEAD; |
| 8830 | 8831 | pf->lan_veb = I40E_NO_VEB; |
| 8831 | 8832 | pf->lan_vsi = I40E_NO_VSI; |
| @@ -9767,7 +9768,7 @@ int i40e_vsi_release(struct i40e_vsi *vsi) · 935 unmodified lines | ||
| 9767 | 9768 | return -ENODEV; |
| 9768 | 9769 | } |
| 9769 | 9770 | if (vsi == pf->vsi[pf->lan_vsi] && |
| 9770 | − !test_bit(__I40E_VSI_DOWN, pf->state)) { | |
| 9771 | + !test_bit(__I40E_DOWN, pf->state)) { | |
| 9771 | 9772 | dev_info(&pf->pdev->dev, "Can't remove PF VSI\n"); |
| 9772 | 9773 | return -ENODEV; |
| 9773 | 9774 | } |
| @@ -11003,7 +11004,7 @@ static int i40e_probe(struct pci_dev *pdev, const struct pci_device_id *ent) · 1229 unmodified lines | ||
| 11003 | 11004 | } |
| 11004 | 11005 | pf->next_vsi = 0; |
| 11005 | 11006 | pf->pdev = pdev; |
| 11006 | − set_bit(__I40E_VSI_DOWN, pf->state); | |
| 11007 | + set_bit(__I40E_DOWN, pf->state); | |
| 11007 | 11008 | |
| 11008 | 11009 | hw = &pf->hw; |
| 11009 | 11010 | hw->back = pf; |
| @@ -11293,7 +11294,7 @@ static int i40e_probe(struct pci_dev *pdev, const struct pci_device_id *ent) · 283 unmodified lines | ||
| 11293 | 11294 | * before setting up the misc vector or we get a race and the vector |
| 11294 | 11295 | * ends up disabled forever. |
| 11295 | 11296 | */ |
| 11296 | − clear_bit(__I40E_VSI_DOWN, pf->state); | |
| 11297 | + clear_bit(__I40E_DOWN, pf->state); | |
| 11297 | 11298 | |
| 11298 | 11299 | /* In case of MSIX we are going to setup the misc vector right here |
| 11299 | 11300 | * to handle admin queue events etc. In case of legacy and MSI |
| @@ -11448,7 +11449,7 @@ static int i40e_probe(struct pci_dev *pdev, const struct pci_device_id *ent) · 148 unmodified lines | ||
| 11448 | 11449 | |
| 11449 | 11450 | /* Unwind what we've done if something failed in the setup */ |
| 11450 | 11451 | err_vsis: |
| 11451 | − set_bit(__I40E_VSI_DOWN, pf->state); | |
| 11452 | + set_bit(__I40E_DOWN, pf->state); | |
| 11452 | 11453 | i40e_clear_interrupt_scheme(pf); |
| 11453 | 11454 | kfree(pf->vsi); |
| 11454 | 11455 | err_switch_setup: |
| @@ -11500,7 +11501,7 @@ static void i40e_remove(struct pci_dev *pdev) · 45 unmodified lines | ||
| 11500 | 11501 | |
| 11501 | 11502 | /* no more scheduling of any task */ |
| 11502 | 11503 | set_bit(__I40E_SUSPENDED, pf->state); |
| 11503 | − set_bit(__I40E_VSI_DOWN, pf->state); | |
| 11504 | + set_bit(__I40E_DOWN, pf->state); | |
| 11504 | 11505 | if (pf->service_timer.data) |
| 11505 | 11506 | del_timer_sync(&pf->service_timer); |
| 11506 | 11507 | if (pf->service_task.func) |
| @@ -11740,7 +11741,7 @@ static void i40e_shutdown(struct pci_dev *pdev) · 233 unmodified lines | ||
| 11740 | 11741 | struct i40e_hw *hw = &pf->hw; |
| 11741 | 11742 | |
| 11742 | 11743 | set_bit(__I40E_SUSPENDED, pf->state); |
| 11743 | − set_bit(__I40E_VSI_DOWN, pf->state); | |
| 11744 | + set_bit(__I40E_DOWN, pf->state); | |
| 11744 | 11745 | rtnl_lock(); |
| 11745 | 11746 | i40e_prep_for_reset(pf, true); |
| 11746 | 11747 | rtnl_unlock(); |
| @@ -11789,7 +11790,7 @@ static int i40e_suspend(struct pci_dev *pdev, pm_message_t state) · 42 unmodified lines | ||
| 11789 | 11790 | int retval = 0; |
| 11790 | 11791 | |
| 11791 | 11792 | set_bit(__I40E_SUSPENDED, pf->state); |
| 11792 | − set_bit(__I40E_VSI_DOWN, pf->state); | |
| 11793 | + set_bit(__I40E_DOWN, pf->state); | |
| 11793 | 11794 | |
| 11794 | 11795 | if (pf->wol_en && (pf->flags & I40E_FLAG_WOL_MC_MAGIC_PKT_WAKE)) |
| 11795 | 11796 | i40e_enable_mc_magic_wake(pf); |
| @@ -11841,7 +11842,7 @@ static int i40e_resume(struct pci_dev *pdev) · 45 unmodified lines | ||
| 11841 | 11842 | |
| 11842 | 11843 | /* handling the reset will rebuild the device state */ |
| 11843 | 11844 | if (test_and_clear_bit(__I40E_SUSPENDED, pf->state)) { |
| 11844 | − clear_bit(__I40E_VSI_DOWN, pf->state); | |
| 11845 | + clear_bit(__I40E_DOWN, pf->state); | |
| 11845 | 11846 | rtnl_lock(); |
| 11846 | 11847 | i40e_reset_and_rebuild(pf, false, true); |
| 11847 | 11848 | rtnl_unlock(); |
| @@ -1854,7 +1854,8 @@ static struct sk_buff *i40e_build_skb(struct i40e_ring *rx_ring, · 1853 unmodified lines | ||
| 1854 | 1854 | #if (PAGE_SIZE < 8192) |
| 1855 | 1855 | unsigned int truesize = i40e_rx_pg_size(rx_ring) / 2; |
| 1856 | 1856 | #else |
| 1857 | − unsigned int truesize = SKB_DATA_ALIGN(size); | |
| 1857 | + unsigned int truesize = SKB_DATA_ALIGN(sizeof(struct skb_shared_info)) + | |
| 1858 | + SKB_DATA_ALIGN(I40E_SKB_PAD + size); | |
| 1858 | 1859 | #endif |
| 1859 | 1860 | struct sk_buff *skb; |
| 1860 | 1861 | |
| @@ -2340,7 +2341,7 @@ static void i40e_atr(struct i40e_ring *tx_ring, struct sk_buff *skb, · 479 unmodified lines | ||
| 2340 | 2341 | /* Due to lack of space, no more new filters can be programmed */ |
| 2341 | 2342 | if (th->syn && (pf->flags & I40E_FLAG_FD_ATR_AUTO_DISABLED)) |
| 2342 | 2343 | return; |
| 2343 | − if (pf->flags & I40E_FLAG_HW_ATR_EVICT_CAPABLE) { | |
| 2344 | + if (pf->flags & I40E_FLAG_HW_ATR_EVICT_ENABLED) { | |
| 2344 | 2345 | /* HW ATR eviction will take care of removing filters on FIN |
| 2345 | 2346 | * and RST packets. |
| 2346 | 2347 | */ |
| @@ -2402,7 +2403,7 @@ static void i40e_atr(struct i40e_ring *tx_ring, struct sk_buff *skb, · 55 unmodified lines | ||
| 2402 | 2403 | I40E_TXD_FLTR_QW1_CNTINDEX_SHIFT) & |
| 2403 | 2404 | I40E_TXD_FLTR_QW1_CNTINDEX_MASK; |
| 2404 | 2405 | |
| 2405 | − if (pf->flags & I40E_FLAG_HW_ATR_EVICT_CAPABLE) | |
| 2406 | + if (pf->flags & I40E_FLAG_HW_ATR_EVICT_ENABLED) | |
| 2406 | 2407 | dtype_cmd |= I40E_TXD_FLTR_QW1_ATR_MASK; |
| 2407 | 2408 | |
| 2408 | 2409 | fdir_desc->qindex_flex_ptype_vsi = cpu_to_le32(flex_ptype); |
| @@ -3017,10 +3017,12 @@ int i40e_ndo_set_vf_port_vlan(struct net_device *netdev, int vf_id, · 3016 unmodified lines | ||
| 3017 | 3017 | VLAN_VID_MASK)); |
| 3018 | 3018 | } |
| 3019 | 3019 | |
| 3020 | + spin_unlock_bh(&vsi->mac_filter_hash_lock); | |
| 3020 | 3021 | if (vlan_id || qos) |
| 3021 | 3022 | ret = i40e_vsi_add_pvid(vsi, vlanprio); |
| 3022 | 3023 | else |
| 3023 | 3024 | i40e_vsi_remove_pvid(vsi); |
| 3025 | + spin_lock_bh(&vsi->mac_filter_hash_lock); | |
| 3024 | 3026 | |
| 3025 | 3027 | if (vlan_id) { |
| 3026 | 3028 | dev_info(&pf->pdev->dev, "Setting VLAN %d, QOS 0x%x on VF %d\n", |
| @@ -1190,7 +1190,8 @@ static struct sk_buff *i40e_build_skb(struct i40e_ring *rx_ring, · 1189 unmodified lines | ||
| 1190 | 1190 | #if (PAGE_SIZE < 8192) |
| 1191 | 1191 | unsigned int truesize = i40e_rx_pg_size(rx_ring) / 2; |
| 1192 | 1192 | #else |
| 1193 | − unsigned int truesize = SKB_DATA_ALIGN(size); | |
| 1193 | + unsigned int truesize = SKB_DATA_ALIGN(sizeof(struct skb_shared_info)) + | |
| 1194 | + SKB_DATA_ALIGN(I40E_SKB_PAD + size); | |
| 1194 | 1195 | #endif |
| 1195 | 1196 | struct sk_buff *skb; |
| 1196 | 1197 | |
| @@ -3719,7 +3719,7 @@ static void mvpp2_bm_bufs_get_addrs(struct device *dev, struct mvpp2 *priv, · 3718 unmodified lines | ||
| 3719 | 3719 | dma_addr_t *dma_addr, |
| 3720 | 3720 | phys_addr_t *phys_addr) |
| 3721 | 3721 | { |
| 3722 | − int cpu = smp_processor_id(); | |
| 3722 | + int cpu = get_cpu(); | |
| 3723 | 3723 | |
| 3724 | 3724 | *dma_addr = mvpp2_percpu_read(priv, cpu, |
| 3725 | 3725 | MVPP2_BM_PHY_ALLOC_REG(bm_pool->id)); |
| @@ -3740,6 +3740,8 @@ static void mvpp2_bm_bufs_get_addrs(struct device *dev, struct mvpp2 *priv, · 14 unmodified lines | ||
| 3740 | 3740 | if (sizeof(phys_addr_t) == 8) |
| 3741 | 3741 | *phys_addr |= (u64)phys_addr_highbits << 32; |
| 3742 | 3742 | } |
| 3743 | + | |
| 3744 | + put_cpu(); | |
| 3743 | 3745 | } |
| 3744 | 3746 | |
| 3745 | 3747 | /* Free all buffers from the pool */ |
| @@ -3920,18 +3922,12 @@ static inline u32 mvpp2_bm_cookie_pool_set(u32 cookie, int pool) · 174 unmodified lines | ||
| 3920 | 3922 | return bm; |
| 3921 | 3923 | } |
| 3922 | 3924 | |
| 3923 | −/* Get pool number from a BM cookie */ | |
| 3924 | −static inline int mvpp2_bm_cookie_pool_get(unsigned long cookie) | |
| 3925 | −{ | |
| 3926 | − return (cookie >> MVPP2_BM_COOKIE_POOL_OFFS) & 0xFF; | |
| 3927 | −} | |
| 3928 | − | |
| 3929 | 3925 | /* Release buffer to BM */ |
| 3930 | 3926 | static inline void mvpp2_bm_pool_put(struct mvpp2_port *port, int pool, |
| 3931 | 3927 | dma_addr_t buf_dma_addr, |
| 3932 | 3928 | phys_addr_t buf_phys_addr) |
| 3933 | 3929 | { |
| 3934 | − int cpu = smp_processor_id(); | |
| 3930 | + int cpu = get_cpu(); | |
| 3935 | 3931 | |
| 3936 | 3932 | if (port->priv->hw_version == MVPP22) { |
| 3937 | 3933 | u32 val = 0; |
| @@ -3958,15 +3954,15 @@ static inline void mvpp2_bm_pool_put(struct mvpp2_port *port, int pool, · 20 unmodified lines | ||
| 3958 | 3954 | MVPP2_BM_VIRT_RLS_REG, buf_phys_addr); |
| 3959 | 3955 | mvpp2_percpu_write(port->priv, cpu, |
| 3960 | 3956 | MVPP2_BM_PHY_RLS_REG(pool), buf_dma_addr); |
| 3957 | + | |
| 3958 | + put_cpu(); | |
| 3961 | 3959 | } |
| 3962 | 3960 | |
| 3963 | 3961 | /* Refill BM pool */ |
| 3964 | −static void mvpp2_pool_refill(struct mvpp2_port *port, u32 bm, | |
| 3962 | +static void mvpp2_pool_refill(struct mvpp2_port *port, int pool, | |
| 3965 | 3963 | dma_addr_t dma_addr, |
| 3966 | 3964 | phys_addr_t phys_addr) |
| 3967 | 3965 | { |
| 3968 | − int pool = mvpp2_bm_cookie_pool_get(bm); | |
| 3969 | − | |
| 3970 | 3966 | mvpp2_bm_pool_put(port, pool, dma_addr, phys_addr); |
| 3971 | 3967 | } |
| 3972 | 3968 | |
| @@ -4186,8 +4182,6 @@ static void mvpp22_port_mii_set(struct mvpp2_port *port) · 213 unmodified lines | ||
| 4186 | 4182 | { |
| 4187 | 4183 | u32 val; |
| 4188 | 4184 | |
| 4189 | − return; | |
| 4190 | − | |
| 4191 | 4185 | /* Only GOP port 0 has an XLG MAC */ |
| 4192 | 4186 | if (port->gop_id == 0) { |
| 4193 | 4187 | val = readl(port->base + MVPP22_XLG_CTRL3_REG); |
| @@ -4515,21 +4509,6 @@ static void mvpp2_rxq_offset_set(struct mvpp2_port *port, · 321 unmodified lines | ||
| 4515 | 4509 | mvpp2_write(port->priv, MVPP2_RXQ_CONFIG_REG(prxq), val); |
| 4516 | 4510 | } |
| 4517 | 4511 | |
| 4518 | −/* Obtain BM cookie information from descriptor */ | |
| 4519 | −static u32 mvpp2_bm_cookie_build(struct mvpp2_port *port, | |
| 4520 | − struct mvpp2_rx_desc *rx_desc) | |
| 4521 | −{ | |
| 4522 | − int cpu = smp_processor_id(); | |
| 4523 | − int pool; | |
| 4524 | − | |
| 4525 | − pool = (mvpp2_rxdesc_status_get(port, rx_desc) & | |
| 4526 | − MVPP2_RXD_BM_POOL_ID_MASK) >> | |
| 4527 | − MVPP2_RXD_BM_POOL_ID_OFFS; | |
| 4528 | − | |
| 4529 | − return ((pool & 0xFF) << MVPP2_BM_COOKIE_POOL_OFFS) | | |
| 4530 | − ((cpu & 0xFF) << MVPP2_BM_COOKIE_CPU_OFFS); | |
| 4531 | −} | |
| 4532 | − | |
| 4533 | 4512 | /* Tx descriptors helper methods */ |
| 4534 | 4513 | |
| 4535 | 4514 | /* Get pointer to next Tx descriptor to be processed (send) by HW */ |
| @@ -4757,7 +4736,7 @@ static void mvpp2_txp_max_tx_size_set(struct mvpp2_port *port) · 221 unmodified lines | ||
| 4757 | 4736 | static void mvpp2_rx_pkts_coal_set(struct mvpp2_port *port, |
| 4758 | 4737 | struct mvpp2_rx_queue *rxq) |
| 4759 | 4738 | { |
| 4760 | − int cpu = smp_processor_id(); | |
| 4739 | + int cpu = get_cpu(); | |
| 4761 | 4740 | |
| 4762 | 4741 | if (rxq->pkts_coal > MVPP2_OCCUPIED_THRESH_MASK) |
| 4763 | 4742 | rxq->pkts_coal = MVPP2_OCCUPIED_THRESH_MASK; |
| @@ -4765,6 +4744,8 @@ static void mvpp2_rx_pkts_coal_set(struct mvpp2_port *port, · 1 unmodified line | ||
| 4765 | 4744 | mvpp2_percpu_write(port->priv, cpu, MVPP2_RXQ_NUM_REG, rxq->id); |
| 4766 | 4745 | mvpp2_percpu_write(port->priv, cpu, MVPP2_RXQ_THRESH_REG, |
| 4767 | 4746 | rxq->pkts_coal); |
| 4747 | + | |
| 4748 | + put_cpu(); | |
| 4768 | 4749 | } |
| 4769 | 4750 | |
| 4770 | 4751 | static u32 mvpp2_usec_to_cycles(u32 usec, unsigned long clk_hz) |
| @@ -4945,7 +4926,7 @@ static int mvpp2_rxq_init(struct mvpp2_port *port, · 174 unmodified lines | ||
| 4945 | 4926 | mvpp2_write(port->priv, MVPP2_RXQ_STATUS_REG(rxq->id), 0); |
| 4946 | 4927 | |
| 4947 | 4928 | /* Set Rx descriptors queue starting address - indirect access */ |
| 4948 | − cpu = smp_processor_id(); | |
| 4929 | + cpu = get_cpu(); | |
| 4949 | 4930 | mvpp2_percpu_write(port->priv, cpu, MVPP2_RXQ_NUM_REG, rxq->id); |
| 4950 | 4931 | if (port->priv->hw_version == MVPP21) |
| 4951 | 4932 | rxq_dma = rxq->descs_dma; |
| @@ -4954,6 +4935,7 @@ static int mvpp2_rxq_init(struct mvpp2_port *port, · 2 unmodified lines | ||
| 4954 | 4935 | mvpp2_percpu_write(port->priv, cpu, MVPP2_RXQ_DESC_ADDR_REG, rxq_dma); |
| 4955 | 4936 | mvpp2_percpu_write(port->priv, cpu, MVPP2_RXQ_DESC_SIZE_REG, rxq->size); |
| 4956 | 4937 | mvpp2_percpu_write(port->priv, cpu, MVPP2_RXQ_INDEX_REG, 0); |
| 4938 | + put_cpu(); | |
| 4957 | 4939 | |
| 4958 | 4940 | /* Set Offset */ |
| 4959 | 4941 | mvpp2_rxq_offset_set(port, rxq->id, NET_SKB_PAD); |
| @@ -4980,9 +4962,13 @@ static void mvpp2_rxq_drop_pkts(struct mvpp2_port *port, · 20 unmodified lines | ||
| 4980 | 4962 | |
| 4981 | 4963 | for (i = 0; i < rx_received; i++) { |
| 4982 | 4964 | struct mvpp2_rx_desc *rx_desc = mvpp2_rxq_next_desc_get(rxq); |
| 4983 | − u32 bm = mvpp2_bm_cookie_build(port, rx_desc); | |
| 4965 | + u32 status = mvpp2_rxdesc_status_get(port, rx_desc); | |
| 4966 | + int pool; | |
| 4967 | + | |
| 4968 | + pool = (status & MVPP2_RXD_BM_POOL_ID_MASK) >> | |
| 4969 | + MVPP2_RXD_BM_POOL_ID_OFFS; | |
| 4984 | 4970 | |
| 4985 | − mvpp2_pool_refill(port, bm, | |
| 4971 | + mvpp2_pool_refill(port, pool, | |
| 4986 | 4972 | mvpp2_rxdesc_dma_addr_get(port, rx_desc), |
| 4987 | 4973 | mvpp2_rxdesc_cookie_get(port, rx_desc)); |
| 4988 | 4974 | } |
| @@ -5012,10 +4998,11 @@ static void mvpp2_rxq_deinit(struct mvpp2_port *port, · 23 unmodified lines | ||
| 5012 | 4998 | * free descriptor number |
| 5013 | 4999 | */ |
| 5014 | 5000 | mvpp2_write(port->priv, MVPP2_RXQ_STATUS_REG(rxq->id), 0); |
| 5015 | − cpu = smp_processor_id(); | |
| 5001 | + cpu = get_cpu(); | |
| 5016 | 5002 | mvpp2_percpu_write(port->priv, cpu, MVPP2_RXQ_NUM_REG, rxq->id); |
| 5017 | 5003 | mvpp2_percpu_write(port->priv, cpu, MVPP2_RXQ_DESC_ADDR_REG, 0); |
| 5018 | 5004 | mvpp2_percpu_write(port->priv, cpu, MVPP2_RXQ_DESC_SIZE_REG, 0); |
| 5005 | + put_cpu(); | |
| 5019 | 5006 | } |
| 5020 | 5007 | |
| 5021 | 5008 | /* Create and initialize a Tx queue */ |
| @@ -5038,7 +5025,7 @@ static int mvpp2_txq_init(struct mvpp2_port *port, · 16 unmodified lines | ||
| 5038 | 5025 | txq->last_desc = txq->size - 1; |
| 5039 | 5026 | |
| 5040 | 5027 | /* Set Tx descriptors queue starting address - indirect access */ |
| 5041 | − cpu = smp_processor_id(); | |
| 5028 | + cpu = get_cpu(); | |
| 5042 | 5029 | mvpp2_percpu_write(port->priv, cpu, MVPP2_TXQ_NUM_REG, txq->id); |
| 5043 | 5030 | mvpp2_percpu_write(port->priv, cpu, MVPP2_TXQ_DESC_ADDR_REG, |
| 5044 | 5031 | txq->descs_dma); |
| @@ -5063,6 +5050,7 @@ static int mvpp2_txq_init(struct mvpp2_port *port, · 18 unmodified lines | ||
| 5063 | 5050 | mvpp2_percpu_write(port->priv, cpu, MVPP2_TXQ_PREF_BUF_REG, |
| 5064 | 5051 | MVPP2_PREF_BUF_PTR(desc) | MVPP2_PREF_BUF_SIZE_16 | |
| 5065 | 5052 | MVPP2_PREF_BUF_THRESH(desc_per_txq / 2)); |
| 5053 | + put_cpu(); | |
| 5066 | 5054 | |
| 5067 | 5055 | /* WRR / EJP configuration - indirect access */ |
| 5068 | 5056 | tx_port_num = mvpp2_egress_port(port); |
| @@ -5133,10 +5121,11 @@ static void mvpp2_txq_deinit(struct mvpp2_port *port, · 64 unmodified lines | ||
| 5133 | 5121 | mvpp2_write(port->priv, MVPP2_TXQ_SCHED_TOKEN_CNTR_REG(txq->id), 0); |
| 5134 | 5122 | |
| 5135 | 5123 | /* Set Tx descriptors queue starting address and size */ |
| 5136 | − cpu = smp_processor_id(); | |
| 5124 | + cpu = get_cpu(); | |
| 5137 | 5125 | mvpp2_percpu_write(port->priv, cpu, MVPP2_TXQ_NUM_REG, txq->id); |
| 5138 | 5126 | mvpp2_percpu_write(port->priv, cpu, MVPP2_TXQ_DESC_ADDR_REG, 0); |
| 5139 | 5127 | mvpp2_percpu_write(port->priv, cpu, MVPP2_TXQ_DESC_SIZE_REG, 0); |
| 5128 | + put_cpu(); | |
| 5140 | 5129 | } |
| 5141 | 5130 | |
| 5142 | 5131 | /* Cleanup Tx ports */ |
| @@ -5146,7 +5135,7 @@ static void mvpp2_txq_clean(struct mvpp2_port *port, struct mvpp2_tx_queue *txq) · 3 unmodified lines | ||
| 5146 | 5135 | int delay, pending, cpu; |
| 5147 | 5136 | u32 val; |
| 5148 | 5137 | |
| 5149 | − cpu = smp_processor_id(); | |
| 5138 | + cpu = get_cpu(); | |
| 5150 | 5139 | mvpp2_percpu_write(port->priv, cpu, MVPP2_TXQ_NUM_REG, txq->id); |
| 5151 | 5140 | val = mvpp2_percpu_read(port->priv, cpu, MVPP2_TXQ_PREF_BUF_REG); |
| 5152 | 5141 | val |= MVPP2_TXQ_DRAIN_EN_MASK; |
| @@ -5173,6 +5162,7 @@ static void mvpp2_txq_clean(struct mvpp2_port *port, struct mvpp2_tx_queue *txq) · 20 unmodified lines | ||
| 5173 | 5162 | |
| 5174 | 5163 | val &= ~MVPP2_TXQ_DRAIN_EN_MASK; |
| 5175 | 5164 | mvpp2_percpu_write(port->priv, cpu, MVPP2_TXQ_PREF_BUF_REG, val); |
| 5165 | + put_cpu(); | |
| 5176 | 5166 | |
| 5177 | 5167 | for_each_present_cpu(cpu) { |
| 5178 | 5168 | txq_pcpu = per_cpu_ptr(txq->pcpu, cpu); |
| @@ -5420,7 +5410,7 @@ static void mvpp2_rx_csum(struct mvpp2_port *port, u32 status, · 241 unmodified lines | ||
| 5420 | 5410 | |
| 5421 | 5411 | /* Reuse skb if possible, or allocate a new skb and add it to BM pool */ |
| 5422 | 5412 | static int mvpp2_rx_refill(struct mvpp2_port *port, |
| 5423 | − struct mvpp2_bm_pool *bm_pool, u32 bm) | |
| 5413 | + struct mvpp2_bm_pool *bm_pool, int pool) | |
| 5424 | 5414 | { |
| 5425 | 5415 | dma_addr_t dma_addr; |
| 5426 | 5416 | phys_addr_t phys_addr; |
| @@ -5432,7 +5422,7 @@ static int mvpp2_rx_refill(struct mvpp2_port *port, · 5 unmodified lines | ||
| 5432 | 5422 | if (!buf) |
| 5433 | 5423 | return -ENOMEM; |
| 5434 | 5424 | |
| 5435 | − mvpp2_pool_refill(port, bm, dma_addr, phys_addr); | |
| 5425 | + mvpp2_pool_refill(port, pool, dma_addr, phys_addr); | |
| 5436 | 5426 | |
| 5437 | 5427 | return 0; |
| 5438 | 5428 | } |
| @@ -5490,7 +5480,7 @@ static int mvpp2_rx(struct mvpp2_port *port, int rx_todo, · 51 unmodified lines | ||
| 5490 | 5480 | unsigned int frag_size; |
| 5491 | 5481 | dma_addr_t dma_addr; |
| 5492 | 5482 | phys_addr_t phys_addr; |
| 5493 | − u32 bm, rx_status; | |
| 5483 | + u32 rx_status; | |
| 5494 | 5484 | int pool, rx_bytes, err; |
| 5495 | 5485 | void *data; |
| 5496 | 5486 | |
| @@ -5502,8 +5492,8 @@ static int mvpp2_rx(struct mvpp2_port *port, int rx_todo, · 5 unmodified lines | ||
| 5502 | 5492 | phys_addr = mvpp2_rxdesc_cookie_get(port, rx_desc); |
| 5503 | 5493 | data = (void *)phys_to_virt(phys_addr); |
| 5504 | 5494 | |
| 5505 | − bm = mvpp2_bm_cookie_build(port, rx_desc); | |
| 5506 | − pool = mvpp2_bm_cookie_pool_get(bm); | |
| 5495 | + pool = (rx_status & MVPP2_RXD_BM_POOL_ID_MASK) >> | |
| 5496 | + MVPP2_RXD_BM_POOL_ID_OFFS; | |
| 5507 | 5497 | bm_pool = &port->priv->bm_pools[pool]; |
| 5508 | 5498 | |
| 5509 | 5499 | /* In case of an error, release the requested buffer pointer |
| @@ -5516,7 +5506,7 @@ err_drop_frame: · 6 unmodified lines | ||
| 5516 | 5506 | dev->stats.rx_errors++; |
| 5517 | 5507 | mvpp2_rx_error(port, rx_desc); |
| 5518 | 5508 | /* Return the buffer to the pool */ |
| 5519 | − mvpp2_pool_refill(port, bm, dma_addr, phys_addr); | |
| 5509 | + mvpp2_pool_refill(port, pool, dma_addr, phys_addr); | |
| 5520 | 5510 | continue; |
| 5521 | 5511 | } |
| 5522 | 5512 | |
| @@ -5531,7 +5521,7 @@ err_drop_frame: · 8 unmodified lines | ||
| 5531 | 5521 | goto err_drop_frame; |
| 5532 | 5522 | } |
| 5533 | 5523 | |
| 5534 | − err = mvpp2_rx_refill(port, bm_pool, bm); | |
| 5524 | + err = mvpp2_rx_refill(port, bm_pool, pool); | |
| 5535 | 5525 | if (err) { |
| 5536 | 5526 | netdev_err(port->dev, "failed to refill BM pools\n"); |
| 5537 | 5527 | goto err_drop_frame; |
| @@ -1562,11 +1562,6 @@ static int mlx4_en_flow_replace(struct net_device *dev, · 1561 unmodified lines | ||
| 1562 | 1562 | qpn = priv->drop_qp.qpn; |
| 1563 | 1563 | else if (cmd->fs.ring_cookie & EN_ETHTOOL_QP_ATTACH) { |
| 1564 | 1564 | qpn = cmd->fs.ring_cookie & (EN_ETHTOOL_QP_ATTACH - 1); |
| 1565 | − if (qpn < priv->rss_map.base_qpn || | |
| 1566 | − qpn >= priv->rss_map.base_qpn + priv->rx_ring_num) { | |
| 1567 | − en_warn(priv, "rxnfc: QP (0x%x) doesn't exist\n", qpn); | |
| 1568 | − return -EINVAL; | |
| 1569 | − } | |
| 1570 | 1565 | } else { |
| 1571 | 1566 | if (cmd->fs.ring_cookie >= priv->rx_ring_num) { |
| 1572 | 1567 | en_warn(priv, "rxnfc: RX ring (%llu) doesn't exist\n", |
| @@ -35,6 +35,7 @@ · 34 unmodified lines | ||
| 35 | 35 | #include <linux/etherdevice.h> |
| 36 | 36 | |
| 37 | 37 | #include <linux/mlx4/cmd.h> |
| 38 | +#include <linux/mlx4/qp.h> | |
| 38 | 39 | #include <linux/export.h> |
| 39 | 40 | |
| 40 | 41 | #include "mlx4.h" |
| @@ -985,16 +986,21 @@ int mlx4_flow_attach(struct mlx4_dev *dev, · 944 unmodified lines | ||
| 985 | 986 | if (IS_ERR(mailbox)) |
| 986 | 987 | return PTR_ERR(mailbox); |
| 987 | 988 | |
| 989 | + if (!mlx4_qp_lookup(dev, rule->qpn)) { | |
| 990 | + mlx4_err_rule(dev, "QP doesn't exist\n", rule); | |
| 991 | + ret = -EINVAL; | |
| 992 | + goto out; | |
| 993 | + } | |
| 994 | + | |
| 988 | 995 | trans_rule_ctrl_to_hw(rule, mailbox->buf); |
| 989 | 996 | |
| 990 | 997 | size += sizeof(struct mlx4_net_trans_rule_hw_ctrl); |
| 991 | 998 | |
| 992 | 999 | list_for_each_entry(cur, &rule->list, list) { |
| 993 | 1000 | ret = parse_trans_rule(dev, cur, mailbox->buf + size); |
| 994 | − if (ret < 0) { | |
| 995 | − mlx4_free_cmd_mailbox(dev, mailbox); | |
| 996 | − return ret; | |
| 997 | − } | |
| 1001 | + if (ret < 0) | |
| 1002 | + goto out; | |
| 1003 | + | |
| 998 | 1004 | size += ret; |
| 999 | 1005 | } |
| 1000 | 1006 | |
| @@ -1021,6 +1027,7 @@ int mlx4_flow_attach(struct mlx4_dev *dev, · 20 unmodified lines | ||
| 1021 | 1027 | } |
| 1022 | 1028 | } |
| 1023 | 1029 | |
| 1030 | +out: | |
| 1024 | 1031 | mlx4_free_cmd_mailbox(dev, mailbox); |
| 1025 | 1032 | |
| 1026 | 1033 | return ret; |
| @@ -384,6 +384,19 @@ static void mlx4_qp_free_icm(struct mlx4_dev *dev, int qpn) · 383 unmodified lines | ||
| 384 | 384 | __mlx4_qp_free_icm(dev, qpn); |
| 385 | 385 | } |
| 386 | 386 | |
| 387 | +struct mlx4_qp *mlx4_qp_lookup(struct mlx4_dev *dev, u32 qpn) | |
| 388 | +{ | |
| 389 | + struct mlx4_qp_table *qp_table = &mlx4_priv(dev)->qp_table; | |
| 390 | + struct mlx4_qp *qp; | |
| 391 | + | |
| 392 | + spin_lock(&qp_table->lock); | |
| 393 | + | |
| 394 | + qp = __mlx4_qp_lookup(dev, qpn); | |
| 395 | + | |
| 396 | + spin_unlock(&qp_table->lock); | |
| 397 | + return qp; | |
| 398 | +} | |
| 399 | + | |
| 387 | 400 | int mlx4_qp_alloc(struct mlx4_dev *dev, int qpn, struct mlx4_qp *qp, gfp_t gfp) |
| 388 | 401 | { |
| 389 | 402 | struct mlx4_priv *priv = mlx4_priv(dev); |
| @@ -471,6 +484,12 @@ int mlx4_update_qp(struct mlx4_dev *dev, u32 qpn, · 81 unmodified lines | ||
| 471 | 484 | } |
| 472 | 485 | |
| 473 | 486 | if (attr & MLX4_UPDATE_QP_QOS_VPORT) { |
| 487 | + if (!(dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_QOS_VPP)) { | |
| 488 | + mlx4_warn(dev, "Granular QoS per VF is not enabled\n"); | |
| 489 | + err = -EOPNOTSUPP; | |
| 490 | + goto out; | |
| 491 | + } | |
| 492 | + | |
| 474 | 493 | qp_mask |= 1ULL << MLX4_UPD_QP_MASK_QOS_VPP; |
| 475 | 494 | cmd->qp_context.qos_vport = params->qos_vport; |
| 476 | 495 | } |
| @@ -5255,6 +5255,13 @@ void mlx4_delete_all_resources_for_slave(struct mlx4_dev *dev, int slave) · 5254 unmodified lines | ||
| 5255 | 5255 | mutex_unlock(&priv->mfunc.master.res_tracker.slave_list[slave].mutex); |
| 5256 | 5256 | } |
| 5257 | 5257 | |
| 5258 | +static void update_qos_vpp(struct mlx4_update_qp_context *ctx, | |
| 5259 | + struct mlx4_vf_immed_vlan_work *work) | |
| 5260 | +{ | |
| 5261 | + ctx->qp_mask |= cpu_to_be64(1ULL << MLX4_UPD_QP_MASK_QOS_VPP); | |
| 5262 | + ctx->qp_context.qos_vport = work->qos_vport; | |
| 5263 | +} | |
| 5264 | + | |
| 5258 | 5265 | void mlx4_vf_immed_vlan_work_handler(struct work_struct *_work) |
| 5259 | 5266 | { |
| 5260 | 5267 | struct mlx4_vf_immed_vlan_work *work = |
| @@ -5369,11 +5376,10 @@ void mlx4_vf_immed_vlan_work_handler(struct work_struct *_work) · 108 unmodified lines | ||
| 5369 | 5376 | qp->sched_queue & 0xC7; |
| 5370 | 5377 | upd_context->qp_context.pri_path.sched_queue |= |
| 5371 | 5378 | ((work->qos & 0x7) << 3); |
| 5372 | − upd_context->qp_mask |= | |
| 5373 | − cpu_to_be64(1ULL << | |
| 5374 | − MLX4_UPD_QP_MASK_QOS_VPP); | |
| 5375 | − upd_context->qp_context.qos_vport = | |
| 5376 | − work->qos_vport; | |
| 5379 | + | |
| 5380 | + if (dev->caps.flags2 & | |
| 5381 | + MLX4_DEV_CAP_FLAG2_QOS_VPP) | |
| 5382 | + update_qos_vpp(upd_context, work); | |
| 5377 | 5383 | } |
| 5378 | 5384 | |
| 5379 | 5385 | err = mlx4_cmd(dev, mailbox->dma, |
| @@ -458,13 +458,15 @@ struct mlx5e_mpw_info { · 457 unmodified lines | ||
| 458 | 458 | |
| 459 | 459 | struct mlx5e_rx_am_stats { |
| 460 | 460 | int ppms; /* packets per msec */ |
| 461 | + int bpms; /* bytes per msec */ | |
| 461 | 462 | int epms; /* events per msec */ |
| 462 | 463 | }; |
| 463 | 464 | |
| 464 | 465 | struct mlx5e_rx_am_sample { |
| 465 | − ktime_t time; | |
| 466 | − unsigned int pkt_ctr; | |
| 467 | − u16 event_ctr; | |
| 466 | + ktime_t time; | |
| 467 | + u32 pkt_ctr; | |
| 468 | + u32 byte_ctr; | |
| 469 | + u16 event_ctr; | |
| 468 | 470 | }; |
| 469 | 471 | |
| 470 | 472 | struct mlx5e_rx_am { /* Adaptive Moderation */ |
| @@ -183,28 +183,27 @@ static void mlx5e_am_exit_parking(struct mlx5e_rx_am *am) · 182 unmodified lines | ||
| 183 | 183 | mlx5e_am_step(am); |
| 184 | 184 | } |
| 185 | 185 | |
| 186 | +#define IS_SIGNIFICANT_DIFF(val, ref) \ | |
| 187 | + (((100 * abs((val) - (ref))) / (ref)) > 10) /* more than 10% difference */ | |
| 188 | + | |
| 186 | 189 | static int mlx5e_am_stats_compare(struct mlx5e_rx_am_stats *curr, |
| 187 | 190 | struct mlx5e_rx_am_stats *prev) |
| 188 | 191 | { |
| 189 | − int diff; | |
| 190 | − | |
| 191 | − if (!prev->ppms) | |
| 192 | − return curr->ppms ? MLX5E_AM_STATS_BETTER : | |
| 192 | + if (!prev->bpms) | |
| 193 | + return curr->bpms ? MLX5E_AM_STATS_BETTER : | |
| 193 | 194 | MLX5E_AM_STATS_SAME; |
| 194 | 195 | |
| 195 | − diff = curr->ppms - prev->ppms; | |
| 196 | − if (((100 * abs(diff)) / prev->ppms) > 10) /* more than 10% diff */ | |
| 197 | − return (diff > 0) ? MLX5E_AM_STATS_BETTER : | |
| 198 | − MLX5E_AM_STATS_WORSE; | |
| 196 | + if (IS_SIGNIFICANT_DIFF(curr->bpms, prev->bpms)) | |
| 197 | + return (curr->bpms > prev->bpms) ? MLX5E_AM_STATS_BETTER : | |
| 198 | + MLX5E_AM_STATS_WORSE; | |
| 199 | 199 | |
| 200 | − if (!prev->epms) | |
| 201 | − return curr->epms ? MLX5E_AM_STATS_WORSE : | |
| 202 | − MLX5E_AM_STATS_SAME; | |
| 200 | + if (IS_SIGNIFICANT_DIFF(curr->ppms, prev->ppms)) | |
| 201 | + return (curr->ppms > prev->ppms) ? MLX5E_AM_STATS_BETTER : | |
| 202 | + MLX5E_AM_STATS_WORSE; | |
| 203 | 203 | |
| 204 | − diff = curr->epms - prev->epms; | |
| 205 | − if (((100 * abs(diff)) / prev->epms) > 10) /* more than 10% diff */ | |
| 206 | − return (diff < 0) ? MLX5E_AM_STATS_BETTER : | |
| 207 | − MLX5E_AM_STATS_WORSE; | |
| 204 | + if (IS_SIGNIFICANT_DIFF(curr->epms, prev->epms)) | |
| 205 | + return (curr->epms < prev->epms) ? MLX5E_AM_STATS_BETTER : | |
| 206 | + MLX5E_AM_STATS_WORSE; | |
| 208 | 207 | |
| 209 | 208 | return MLX5E_AM_STATS_SAME; |
| 210 | 209 | } |
| @@ -266,10 +265,13 @@ static void mlx5e_am_sample(struct mlx5e_rq *rq, · 55 unmodified lines | ||
| 266 | 265 | { |
| 267 | 266 | s->time = ktime_get(); |
| 268 | 267 | s->pkt_ctr = rq->stats.packets; |
| 268 | + s->byte_ctr = rq->stats.bytes; | |
| 269 | 269 | s->event_ctr = rq->cq.event_ctr; |
| 270 | 270 | } |
| 271 | 271 | |
| 272 | 272 | #define MLX5E_AM_NEVENTS 64 |
| 273 | +#define BITS_PER_TYPE(type) (sizeof(type) * BITS_PER_BYTE) | |
| 274 | +#define BIT_GAP(bits, end, start) ((((end) - (start)) + BIT_ULL(bits)) & (BIT_ULL(bits) - 1)) | |
| 273 | 275 | |
| 274 | 276 | static void mlx5e_am_calc_stats(struct mlx5e_rx_am_sample *start, |
| 275 | 277 | struct mlx5e_rx_am_sample *end, |
| @@ -277,13 +279,17 @@ static void mlx5e_am_calc_stats(struct mlx5e_rx_am_sample *start, · 1 unmodified line | ||
| 277 | 279 | { |
| 278 | 280 | /* u32 holds up to 71 minutes, should be enough */ |
| 279 | 281 | u32 delta_us = ktime_us_delta(end->time, start->time); |
| 280 | − unsigned int npkts = end->pkt_ctr - start->pkt_ctr; | |
| 282 | + u32 npkts = BIT_GAP(BITS_PER_TYPE(u32), end->pkt_ctr, start->pkt_ctr); | |
| 283 | + u32 nbytes = BIT_GAP(BITS_PER_TYPE(u32), end->byte_ctr, | |
| 284 | + start->byte_ctr); | |
| 281 | 285 | |
| 282 | 286 | if (!delta_us) |
| 283 | 287 | return; |
| 284 | 288 | |
| 285 | − curr_stats->ppms = (npkts * USEC_PER_MSEC) / delta_us; | |
| 286 | − curr_stats->epms = (MLX5E_AM_NEVENTS * USEC_PER_MSEC) / delta_us; | |
| 289 | + curr_stats->ppms = DIV_ROUND_UP(npkts * USEC_PER_MSEC, delta_us); | |
| 290 | + curr_stats->bpms = DIV_ROUND_UP(nbytes * USEC_PER_MSEC, delta_us); | |
| 291 | + curr_stats->epms = DIV_ROUND_UP(MLX5E_AM_NEVENTS * USEC_PER_MSEC, | |
| 292 | + delta_us); | |
| 287 | 293 | } |
| 288 | 294 | |
| 289 | 295 | void mlx5e_rx_am_work(struct work_struct *work) |
| @@ -308,7 +314,8 @@ void mlx5e_rx_am(struct mlx5e_rq *rq) · 18 unmodified lines | ||
| 308 | 314 | |
| 309 | 315 | switch (am->state) { |
| 310 | 316 | case MLX5E_AM_MEASURE_IN_PROGRESS: |
| 311 | − nevents = rq->cq.event_ctr - am->start_sample.event_ctr; | |
| 317 | + nevents = BIT_GAP(BITS_PER_TYPE(u16), rq->cq.event_ctr, | |
| 318 | + am->start_sample.event_ctr); | |
| 312 | 319 | if (nevents < MLX5E_AM_NEVENTS) |
| 313 | 320 | break; |
| 314 | 321 | mlx5e_am_sample(rq, &end_sample); |
| @@ -417,20 +417,13 @@ struct mlx5e_stats { · 416 unmodified lines | ||
| 417 | 417 | }; |
| 418 | 418 | |
| 419 | 419 | static const struct counter_desc mlx5e_pme_status_desc[] = { |
| 420 | − { "module_plug", 0 }, | |
| 421 | 420 | { "module_unplug", 8 }, |
| 422 | 421 | }; |
| 423 | 422 | |
| 424 | 423 | static const struct counter_desc mlx5e_pme_error_desc[] = { |
| 425 | − { "module_pwr_budget_exd", 0 }, /* power budget exceed */ | |
| 426 | − { "module_long_range", 8 }, /* long range for non MLNX cable */ | |
| 427 | − { "module_bus_stuck", 16 }, /* bus stuck (I2C or data shorted) */ | |
| 428 | − { "module_no_eeprom", 24 }, /* no eeprom/retry time out */ | |
| 429 | − { "module_enforce_part", 32 }, /* enforce part number list */ | |
| 430 | − { "module_unknown_id", 40 }, /* unknown identifier */ | |
| 431 | − { "module_high_temp", 48 }, /* high temperature */ | |
| 424 | + { "module_bus_stuck", 16 }, /* bus stuck (I2C or data shorted) */ | |
| 425 | + { "module_high_temp", 48 }, /* high temperature */ | |
| 432 | 426 | { "module_bad_shorted", 56 }, /* bad or shorted cable/module */ |
| 433 | − { "module_unknown_status", 64 }, | |
| 434 | 427 | }; |
| 435 | 428 | |
| 436 | 429 | #endif /* __MLX5_EN_STATS_H__ */ |
| @@ -862,7 +862,7 @@ struct mlx5_flow_table *mlx5_create_vport_flow_table(struct mlx5_flow_namespace · 861 unmodified lines | ||
| 862 | 862 | ft_attr.level = level; |
| 863 | 863 | ft_attr.prio = prio; |
| 864 | 864 | |
| 865 | − return __mlx5_create_flow_table(ns, &ft_attr, FS_FT_OP_MOD_NORMAL, 0); | |
| 865 | + return __mlx5_create_flow_table(ns, &ft_attr, FS_FT_OP_MOD_NORMAL, vport); | |
| 866 | 866 | } |
| 867 | 867 | |
| 868 | 868 | struct mlx5_flow_table* |
| @@ -275,10 +275,8 @@ static void poll_health(unsigned long data) · 274 unmodified lines | ||
| 275 | 275 | struct mlx5_core_health *health = &dev->priv.health; |
| 276 | 276 | u32 count; |
| 277 | 277 | |
| 278 | − if (dev->state == MLX5_DEVICE_STATE_INTERNAL_ERROR) { | |
| 279 | − mod_timer(&health->timer, get_next_poll_jiffies()); | |
| 280 | − return; | |
| 281 | − } | |
| 278 | + if (dev->state == MLX5_DEVICE_STATE_INTERNAL_ERROR) | |
| 279 | + goto out; | |
| 282 | 280 | |
| 283 | 281 | count = ioread32be(health->health_counter); |
| 284 | 282 | if (count == health->prev) |
| @@ -290,8 +288,6 @@ static void poll_health(unsigned long data) · 5 unmodified lines | ||
| 290 | 288 | if (health->miss_counter == MAX_MISSES) { |
| 291 | 289 | dev_err(&dev->pdev->dev, "device's health compromised - reached miss count\n"); |
| 292 | 290 | print_health_info(dev); |
| 293 | − } else { | |
| 294 | − mod_timer(&health->timer, get_next_poll_jiffies()); | |
| 295 | 291 | } |
| 296 | 292 | |
| 297 | 293 | if (in_fatal(dev) && !health->sick) { |
| @@ -305,6 +301,9 @@ static void poll_health(unsigned long data) · 7 unmodified lines | ||
| 305 | 301 | "new health works are not permitted at this stage\n"); |
| 306 | 302 | spin_unlock(&health->wq_lock); |
| 307 | 303 | } |
| 304 | + | |
| 305 | +out: | |
| 306 | + mod_timer(&health->timer, get_next_poll_jiffies()); | |
| 308 | 307 | } |
| 309 | 308 | |
| 310 | 309 | void mlx5_start_health_poll(struct mlx5_core_dev *dev) |
| @@ -537,8 +537,10 @@ static int handle_hca_cap(struct mlx5_core_dev *dev) · 536 unmodified lines | ||
| 537 | 537 | /* disable cmdif checksum */ |
| 538 | 538 | MLX5_SET(cmd_hca_cap, set_hca_cap, cmdif_checksum, 0); |
| 539 | 539 | |
| 540 | − /* If the HCA supports 4K UARs use it */ | |
| 541 | − if (MLX5_CAP_GEN_MAX(dev, uar_4k)) | |
| 540 | + /* Enable 4K UAR only when HCA supports it and page size is bigger | |
| 541 | + * than 4K. | |
| 542 | + */ | |
| 543 | + if (MLX5_CAP_GEN_MAX(dev, uar_4k) && PAGE_SIZE > 4096) | |
| 542 | 544 | MLX5_SET(cmd_hca_cap, set_hca_cap, uar_4k, 1); |
| 543 | 545 | |
| 544 | 546 | MLX5_SET(cmd_hca_cap, set_hca_cap, log_uar_page_sz, PAGE_SHIFT - 12); |
| @@ -621,10 +623,9 @@ static int mlx5_irq_set_affinity_hint(struct mlx5_core_dev *mdev, int i) · 76 unmodified lines | ||
| 621 | 623 | cpumask_set_cpu(cpumask_local_spread(i, priv->numa_node), |
| 622 | 624 | priv->irq_info[i].mask); |
| 623 | 625 | |
| 624 | −#ifdef CONFIG_SMP | |
| 625 | − if (irq_set_affinity_hint(irq, priv->irq_info[i].mask)) | |
| 626 | + if (IS_ENABLED(CONFIG_SMP) && | |
| 627 | + irq_set_affinity_hint(irq, priv->irq_info[i].mask)) | |
| 626 | 628 | mlx5_core_warn(mdev, "irq_set_affinity_hint failed, irq 0x%.4x", irq); |
| 627 | −#endif | |
| 628 | 629 | |
| 629 | 630 | return 0; |
| 630 | 631 | } |
| @@ -2956,7 +2956,7 @@ static u32 qed_grc_dump_ctx_data(struct qed_hwfn *p_hwfn, · 2955 unmodified lines | ||
| 2956 | 2956 | qed_wr(p_hwfn, |
| 2957 | 2957 | p_ptt, |
| 2958 | 2958 | s_storm_defs[storm_id].cm_ctx_wr_addr, |
| 2959 | − BIT(9) | lid); | |
| 2959 | + (i << 9) | lid); | |
| 2960 | 2960 | *(dump_buf + offset) = qed_rd(p_hwfn, |
| 2961 | 2961 | p_ptt, |
| 2962 | 2962 | rd_reg_addr); |
| @@ -1730,7 +1730,8 @@ void qed_get_protocol_stats(struct qed_dev *cdev, · 1729 unmodified lines | ||
| 1730 | 1730 | qed_get_protocol_stats_iscsi(cdev, &stats->iscsi_stats); |
| 1731 | 1731 | break; |
| 1732 | 1732 | default: |
| 1733 | − DP_ERR(cdev, "Invalid protocol type = %d\n", type); | |
| 1733 | + DP_VERBOSE(cdev, QED_MSG_SP, | |
| 1734 | + "Invalid protocol type = %d\n", type); | |
| 1734 | 1735 | return; |
| 1735 | 1736 | } |
| 1736 | 1737 | } |
| @@ -1824,22 +1824,44 @@ struct qlcnic_hardware_ops { · 1823 unmodified lines | ||
| 1824 | 1824 | u32 (*get_cap_size)(void *, int); |
| 1825 | 1825 | void (*set_sys_info)(void *, int, u32); |
| 1826 | 1826 | void (*store_cap_mask)(void *, u32); |
| 1827 | + bool (*encap_rx_offload) (struct qlcnic_adapter *adapter); | |
| 1828 | + bool (*encap_tx_offload) (struct qlcnic_adapter *adapter); | |
| 1827 | 1829 | }; |
| 1828 | 1830 | |
| 1829 | 1831 | extern struct qlcnic_nic_template qlcnic_vf_ops; |
| 1830 | 1832 | |
| 1831 | −static inline bool qlcnic_encap_tx_offload(struct qlcnic_adapter *adapter) | |
| 1833 | +static inline bool qlcnic_83xx_encap_tx_offload(struct qlcnic_adapter *adapter) | |
| 1832 | 1834 | { |
| 1833 | 1835 | return adapter->ahw->extra_capability[0] & |
| 1834 | 1836 | QLCNIC_83XX_FW_CAPAB_ENCAP_TX_OFFLOAD; |
| 1835 | 1837 | } |
| 1836 | 1838 | |
| 1837 | −static inline bool qlcnic_encap_rx_offload(struct qlcnic_adapter *adapter) | |
| 1839 | +static inline bool qlcnic_83xx_encap_rx_offload(struct qlcnic_adapter *adapter) | |
| 1838 | 1840 | { |
| 1839 | 1841 | return adapter->ahw->extra_capability[0] & |
| 1840 | 1842 | QLCNIC_83XX_FW_CAPAB_ENCAP_RX_OFFLOAD; |
| 1841 | 1843 | } |
| 1842 | 1844 | |
| 1845 | +static inline bool qlcnic_82xx_encap_tx_offload(struct qlcnic_adapter *adapter) | |
| 1846 | +{ | |
| 1847 | + return false; | |
| 1848 | +} | |
| 1849 | + | |
| 1850 | +static inline bool qlcnic_82xx_encap_rx_offload(struct qlcnic_adapter *adapter) | |
| 1851 | +{ | |
| 1852 | + return false; | |
| 1853 | +} | |
| 1854 | + | |
| 1855 | +static inline bool qlcnic_encap_rx_offload(struct qlcnic_adapter *adapter) | |
| 1856 | +{ | |
| 1857 | + return adapter->ahw->hw_ops->encap_rx_offload(adapter); | |
| 1858 | +} | |
| 1859 | + | |
| 1860 | +static inline bool qlcnic_encap_tx_offload(struct qlcnic_adapter *adapter) | |
| 1861 | +{ | |
| 1862 | + return adapter->ahw->hw_ops->encap_tx_offload(adapter); | |
| 1863 | +} | |
| 1864 | + | |
| 1843 | 1865 | static inline int qlcnic_start_firmware(struct qlcnic_adapter *adapter) |
| 1844 | 1866 | { |
| 1845 | 1867 | return adapter->nic_ops->start_firmware(adapter); |
| @@ -242,6 +242,8 @@ static struct qlcnic_hardware_ops qlcnic_83xx_hw_ops = { · 241 unmodified lines | ||
| 242 | 242 | .get_cap_size = qlcnic_83xx_get_cap_size, |
| 243 | 243 | .set_sys_info = qlcnic_83xx_set_sys_info, |
| 244 | 244 | .store_cap_mask = qlcnic_83xx_store_cap_mask, |
| 245 | + .encap_rx_offload = qlcnic_83xx_encap_rx_offload, | |
| 246 | + .encap_tx_offload = qlcnic_83xx_encap_tx_offload, | |
| 245 | 247 | }; |
| 246 | 248 | |
| 247 | 249 | static struct qlcnic_nic_template qlcnic_83xx_ops = { |
| @@ -341,7 +341,7 @@ qlcnic_pcie_sem_lock(struct qlcnic_adapter *adapter, int sem, u32 id_reg) · 340 unmodified lines | ||
| 341 | 341 | } |
| 342 | 342 | return -EIO; |
| 343 | 343 | } |
| 344 | − usleep_range(1000, 1500); | |
| 344 | + udelay(1200); | |
| 345 | 345 | } |
| 346 | 346 | |
| 347 | 347 | if (id_reg) |
| @@ -632,6 +632,8 @@ static struct qlcnic_hardware_ops qlcnic_hw_ops = { · 631 unmodified lines | ||
| 632 | 632 | .get_cap_size = qlcnic_82xx_get_cap_size, |
| 633 | 633 | .set_sys_info = qlcnic_82xx_set_sys_info, |
| 634 | 634 | .store_cap_mask = qlcnic_82xx_store_cap_mask, |
| 635 | + .encap_rx_offload = qlcnic_82xx_encap_rx_offload, | |
| 636 | + .encap_tx_offload = qlcnic_82xx_encap_tx_offload, | |
| 635 | 637 | }; |
| 636 | 638 | |
| 637 | 639 | static int qlcnic_check_multi_tx_capability(struct qlcnic_adapter *adapter) |
| @@ -77,6 +77,8 @@ static struct qlcnic_hardware_ops qlcnic_sriov_vf_hw_ops = { · 76 unmodified lines | ||
| 77 | 77 | .free_mac_list = qlcnic_sriov_vf_free_mac_list, |
| 78 | 78 | .enable_sds_intr = qlcnic_83xx_enable_sds_intr, |
| 79 | 79 | .disable_sds_intr = qlcnic_83xx_disable_sds_intr, |
| 80 | + .encap_rx_offload = qlcnic_83xx_encap_rx_offload, | |
| 81 | + .encap_tx_offload = qlcnic_83xx_encap_tx_offload, | |
| 80 | 82 | }; |
| 81 | 83 | |
| 82 | 84 | static struct qlcnic_nic_template qlcnic_sriov_vf_ops = { |
| @@ -931,7 +931,7 @@ int emac_mac_up(struct emac_adapter *adpt) · 930 unmodified lines | ||
| 931 | 931 | emac_mac_config(adpt); |
| 932 | 932 | emac_mac_rx_descs_refill(adpt, &adpt->rx_q); |
| 933 | 933 | |
| 934 | − adpt->phydev->irq = PHY_IGNORE_INTERRUPT; | |
| 934 | + adpt->phydev->irq = PHY_POLL; | |
| 935 | 935 | ret = phy_connect_direct(netdev, adpt->phydev, emac_adjust_link, |
| 936 | 936 | PHY_INTERFACE_MODE_SGMII); |
| 937 | 937 | if (ret) { |
| @@ -13,15 +13,11 @@ · 12 unmodified lines | ||
| 13 | 13 | /* Qualcomm Technologies, Inc. EMAC PHY Controller driver. |
| 14 | 14 | */ |
| 15 | 15 | |
| 16 | −#include <linux/module.h> | |
| 17 | −#include <linux/of.h> | |
| 18 | −#include <linux/of_net.h> | |
| 19 | 16 | #include <linux/of_mdio.h> |
| 20 | 17 | #include <linux/phy.h> |
| 21 | 18 | #include <linux/iopoll.h> |
| 22 | 19 | #include <linux/acpi.h> |
| 23 | 20 | #include "emac.h" |
| 24 | −#include "emac-mac.h" | |
| 25 | 21 | |
| 26 | 22 | /* EMAC base register offsets */ |
| 27 | 23 | #define EMAC_MDIO_CTRL 0x001414 |
| @@ -52,62 +48,10 @@ · 24 unmodified lines | ||
| 52 | 48 | |
| 53 | 49 | #define MDIO_WAIT_TIMES 1000 |
| 54 | 50 | |
| 55 | −#define EMAC_LINK_SPEED_DEFAULT (\ | |
| 56 | − EMAC_LINK_SPEED_10_HALF |\ | |
| 57 | − EMAC_LINK_SPEED_10_FULL |\ | |
| 58 | − EMAC_LINK_SPEED_100_HALF |\ | |
| 59 | − EMAC_LINK_SPEED_100_FULL |\ | |
| 60 | − EMAC_LINK_SPEED_1GB_FULL) | |
| 61 | − | |
| 62 | −/** | |
| 63 | − * emac_phy_mdio_autopoll_disable() - disable mdio autopoll | |
| 64 | − * @adpt: the emac adapter | |
| 65 | − * | |
| 66 | − * The autopoll feature takes over the MDIO bus. In order for | |
| 67 | − * the PHY driver to be able to talk to the PHY over the MDIO | |
| 68 | − * bus, we need to temporarily disable the autopoll feature. | |
| 69 | − */ | |
| 70 | −static int emac_phy_mdio_autopoll_disable(struct emac_adapter *adpt) | |
| 71 | −{ | |
| 72 | − u32 val; | |
| 73 | − | |
| 74 | − /* disable autopoll */ | |
| 75 | − emac_reg_update32(adpt->base + EMAC_MDIO_CTRL, MDIO_AP_EN, 0); | |
| 76 | − | |
| 77 | − /* wait for any mdio polling to complete */ | |
| 78 | − if (!readl_poll_timeout(adpt->base + EMAC_MDIO_CTRL, val, | |
| 79 | − !(val & MDIO_BUSY), 100, MDIO_WAIT_TIMES * 100)) | |
| 80 | − return 0; | |
| 81 | − | |
| 82 | − /* failed to disable; ensure it is enabled before returning */ | |
| 83 | − emac_reg_update32(adpt->base + EMAC_MDIO_CTRL, 0, MDIO_AP_EN); | |
| 84 | − | |
| 85 | − return -EBUSY; | |
| 86 | −} | |
| 87 | − | |
| 88 | −/** | |
| 89 | − * emac_phy_mdio_autopoll_disable() - disable mdio autopoll | |
| 90 | − * @adpt: the emac adapter | |
| 91 | − * | |
| 92 | − * The EMAC has the ability to poll the external PHY on the MDIO | |
| 93 | − * bus for link state changes. This eliminates the need for the | |
| 94 | − * driver to poll the phy. If if the link state does change, | |
| 95 | − * the EMAC issues an interrupt on behalf of the PHY. | |
| 96 | − */ | |
| 97 | −static void emac_phy_mdio_autopoll_enable(struct emac_adapter *adpt) | |
| 98 | −{ | |
| 99 | − emac_reg_update32(adpt->base + EMAC_MDIO_CTRL, 0, MDIO_AP_EN); | |
| 100 | −} | |
| 101 | − | |
| 102 | 51 | static int emac_mdio_read(struct mii_bus *bus, int addr, int regnum) |
| 103 | 52 | { |
| 104 | 53 | struct emac_adapter *adpt = bus->priv; |
| 105 | 54 | u32 reg; |
| 106 | − int ret; | |
| 107 | − | |
| 108 | − ret = emac_phy_mdio_autopoll_disable(adpt); | |
| 109 | − if (ret) | |
| 110 | − return ret; | |
| 111 | 55 | |
| 112 | 56 | emac_reg_update32(adpt->base + EMAC_PHY_STS, PHY_ADDR_BMSK, |
| 113 | 57 | (addr << PHY_ADDR_SHFT)); |
| @@ -122,24 +66,15 @@ static int emac_mdio_read(struct mii_bus *bus, int addr, int regnum) · 8 unmodified lines | ||
| 122 | 66 | if (readl_poll_timeout(adpt->base + EMAC_MDIO_CTRL, reg, |
| 123 | 67 | !(reg & (MDIO_START | MDIO_BUSY)), |
| 124 | 68 | 100, MDIO_WAIT_TIMES * 100)) |
| 125 | − ret = -EIO; | |
| 126 | − else | |
| 127 | − ret = (reg >> MDIO_DATA_SHFT) & MDIO_DATA_BMSK; | |
| 69 | + return -EIO; | |
| 128 | 70 | |
| 129 | − emac_phy_mdio_autopoll_enable(adpt); | |
| 130 | − | |
| 131 | − return ret; | |
| 71 | + return (reg >> MDIO_DATA_SHFT) & MDIO_DATA_BMSK; | |
| 132 | 72 | } |
| 133 | 73 | |
| 134 | 74 | static int emac_mdio_write(struct mii_bus *bus, int addr, int regnum, u16 val) |
| 135 | 75 | { |
| 136 | 76 | struct emac_adapter *adpt = bus->priv; |
| 137 | 77 | u32 reg; |
| 138 | − int ret; | |
| 139 | − | |
| 140 | − ret = emac_phy_mdio_autopoll_disable(adpt); | |
| 141 | − if (ret) | |
| 142 | − return ret; | |
| 143 | 78 | |
| 144 | 79 | emac_reg_update32(adpt->base + EMAC_PHY_STS, PHY_ADDR_BMSK, |
| 145 | 80 | (addr << PHY_ADDR_SHFT)); |
| @@ -155,11 +90,9 @@ static int emac_mdio_write(struct mii_bus *bus, int addr, int regnum, u16 val) · 9 unmodified lines | ||
| 155 | 90 | if (readl_poll_timeout(adpt->base + EMAC_MDIO_CTRL, reg, |
| 156 | 91 | !(reg & (MDIO_START | MDIO_BUSY)), 100, |
| 157 | 92 | MDIO_WAIT_TIMES * 100)) |
| 158 | − ret = -EIO; | |
| 93 | + return -EIO; | |
| 159 | 94 | |
| 160 | − emac_phy_mdio_autopoll_enable(adpt); | |
| 161 | − | |
| 162 | − return ret; | |
| 95 | + return 0; | |
| 163 | 96 | } |
| 164 | 97 | |
| 165 | 98 | /* Configure the MDIO bus and connect the external PHY */ |
| @@ -50,19 +50,7 @@ · 49 unmodified lines | ||
| 50 | 50 | #define DMAR_DLY_CNT_DEF 15 |
| 51 | 51 | #define DMAW_DLY_CNT_DEF 4 |
| 52 | 52 | |
| 53 | −#define IMR_NORMAL_MASK (\ | |
| 54 | − ISR_ERROR |\ | |
| 55 | − ISR_GPHY_LINK |\ | |
| 56 | − ISR_TX_PKT |\ | |
| 57 | − GPHY_WAKEUP_INT) | |
| 58 | − | |
| 59 | −#define IMR_EXTENDED_MASK (\ | |
| 60 | − SW_MAN_INT |\ | |
| 61 | − ISR_OVER |\ | |
| 62 | − ISR_ERROR |\ | |
| 63 | − ISR_GPHY_LINK |\ | |
| 64 | − ISR_TX_PKT |\ | |
| 65 | − GPHY_WAKEUP_INT) | |
| 53 | +#define IMR_NORMAL_MASK (ISR_ERROR | ISR_OVER | ISR_TX_PKT) | |
| 66 | 54 | |
| 67 | 55 | #define ISR_TX_PKT (\ |
| 68 | 56 | TX_PKT_INT |\ |
| @@ -70,10 +58,6 @@ · 1 unmodified line | ||
| 70 | 58 | TX_PKT_INT2 |\ |
| 71 | 59 | TX_PKT_INT3) |
| 72 | 60 | |
| 73 | −#define ISR_GPHY_LINK (\ | |
| 74 | − GPHY_LINK_UP_INT |\ | |
| 75 | − GPHY_LINK_DOWN_INT) | |
| 76 | − | |
| 77 | 61 | #define ISR_OVER (\ |
| 78 | 62 | RFD0_UR_INT |\ |
| 79 | 63 | RFD1_UR_INT |\ |
| @@ -187,10 +171,6 @@ irqreturn_t emac_isr(int _irq, void *data) · 107 unmodified lines | ||
| 187 | 171 | if (status & ISR_OVER) |
| 188 | 172 | net_warn_ratelimited("warning: TX/RX overflow\n"); |
| 189 | 173 | |
| 190 | − /* link event */ | |
| 191 | − if (status & ISR_GPHY_LINK) | |
| 192 | − phy_mac_interrupt(adpt->phydev, !!(status & GPHY_LINK_UP_INT)); | |
| 193 | − | |
| 194 | 174 | exit: |
| 195 | 175 | /* enable the interrupt */ |
| 196 | 176 | writel(irq->mask, adpt->base + EMAC_INT_MASK); |
| @@ -230,18 +230,6 @@ static void ravb_ring_free(struct net_device *ndev, int q) · 229 unmodified lines | ||
| 230 | 230 | int ring_size; |
| 231 | 231 | int i; |
| 232 | 232 | |
| 233 | − /* Free RX skb ringbuffer */ | |
| 234 | − if (priv->rx_skb[q]) { | |
| 235 | − for (i = 0; i < priv->num_rx_ring[q]; i++) | |
| 236 | − dev_kfree_skb(priv->rx_skb[q][i]); | |
| 237 | − } | |
| 238 | − kfree(priv->rx_skb[q]); | |
| 239 | − priv->rx_skb[q] = NULL; | |
| 240 | − | |
| 241 | − /* Free aligned TX buffers */ | |
| 242 | − kfree(priv->tx_align[q]); | |
| 243 | − priv->tx_align[q] = NULL; | |
| 244 | − | |
| 245 | 233 | if (priv->rx_ring[q]) { |
| 246 | 234 | for (i = 0; i < priv->num_rx_ring[q]; i++) { |
| 247 | 235 | struct ravb_ex_rx_desc *desc = &priv->rx_ring[q][i]; |
| @@ -270,6 +258,18 @@ static void ravb_ring_free(struct net_device *ndev, int q) · 22 unmodified lines | ||
| 270 | 258 | priv->tx_ring[q] = NULL; |
| 271 | 259 | } |
| 272 | 260 | |
| 261 | + /* Free RX skb ringbuffer */ | |
| 262 | + if (priv->rx_skb[q]) { | |
| 263 | + for (i = 0; i < priv->num_rx_ring[q]; i++) | |
| 264 | + dev_kfree_skb(priv->rx_skb[q][i]); | |
| 265 | + } | |
| 266 | + kfree(priv->rx_skb[q]); | |
| 267 | + priv->rx_skb[q] = NULL; | |
| 268 | + | |
| 269 | + /* Free aligned TX buffers */ | |
| 270 | + kfree(priv->tx_align[q]); | |
| 271 | + priv->tx_align[q] = NULL; | |
| 272 | + | |
| 273 | 273 | /* Free TX skb ringbuffer. |
| 274 | 274 | * SKBs are freed by ravb_tx_free() call above. |
| 275 | 275 | */ |
| @@ -37,6 +37,7 @@ · 36 unmodified lines | ||
| 37 | 37 | #define TSE_PCS_CONTROL_AN_EN_MASK BIT(12) |
| 38 | 38 | #define TSE_PCS_CONTROL_REG 0x00 |
| 39 | 39 | #define TSE_PCS_CONTROL_RESTART_AN_MASK BIT(9) |
| 40 | +#define TSE_PCS_CTRL_AUTONEG_SGMII 0x1140 | |
| 40 | 41 | #define TSE_PCS_IF_MODE_REG 0x28 |
| 41 | 42 | #define TSE_PCS_LINK_TIMER_0_REG 0x24 |
| 42 | 43 | #define TSE_PCS_LINK_TIMER_1_REG 0x26 |
| @@ -65,6 +66,7 @@ · 22 unmodified lines | ||
| 65 | 66 | #define TSE_PCS_SW_RESET_TIMEOUT 100 |
| 66 | 67 | #define TSE_PCS_USE_SGMII_AN_MASK BIT(1) |
| 67 | 68 | #define TSE_PCS_USE_SGMII_ENA BIT(0) |
| 69 | +#define TSE_PCS_IF_USE_SGMII 0x03 | |
| 68 | 70 | |
| 69 | 71 | #define SGMII_ADAPTER_CTRL_REG 0x00 |
| 70 | 72 | #define SGMII_ADAPTER_DISABLE 0x0001 |
| @@ -101,7 +103,9 @@ int tse_pcs_init(void __iomem *base, struct tse_pcs *pcs) · 30 unmodified lines | ||
| 101 | 103 | { |
| 102 | 104 | int ret = 0; |
| 103 | 105 | |
| 104 | − writew(TSE_PCS_USE_SGMII_ENA, base + TSE_PCS_IF_MODE_REG); | |
| 106 | + writew(TSE_PCS_IF_USE_SGMII, base + TSE_PCS_IF_MODE_REG); | |
| 107 | + | |
| 108 | + writew(TSE_PCS_CTRL_AUTONEG_SGMII, base + TSE_PCS_CONTROL_REG); | |
| 105 | 109 | |
| 106 | 110 | writew(TSE_PCS_SGMII_LINK_TIMER_0, base + TSE_PCS_LINK_TIMER_0_REG); |
| 107 | 111 | writew(TSE_PCS_SGMII_LINK_TIMER_1, base + TSE_PCS_LINK_TIMER_1_REG); |
| @@ -214,13 +214,13 @@ static int dwmac4_wrback_get_tx_timestamp_status(struct dma_desc *p) · 213 unmodified lines | ||
| 214 | 214 | { |
| 215 | 215 | /* Context type from W/B descriptor must be zero */ |
| 216 | 216 | if (le32_to_cpu(p->des3) & TDES3_CONTEXT_TYPE) |
| 217 | − return -EINVAL; | |
| 217 | + return 0; | |
| 218 | 218 | |
| 219 | 219 | /* Tx Timestamp Status is 1 so des0 and des1'll have valid values */ |
| 220 | 220 | if (le32_to_cpu(p->des3) & TDES3_TIMESTAMP_STATUS) |
| 221 | − return 0; | |
| 221 | + return 1; | |
| 222 | 222 | |
| 223 | − return 1; | |
| 223 | + return 0; | |
| 224 | 224 | } |
| 225 | 225 | |
| 226 | 226 | static inline u64 dwmac4_get_timestamp(void *desc, u32 ats) |
| @@ -282,7 +282,10 @@ static int dwmac4_wrback_get_rx_timestamp_status(void *desc, u32 ats) · 55 unmodified lines | ||
| 282 | 282 | } |
| 283 | 283 | } |
| 284 | 284 | exit: |
| 285 | − return ret; | |
| 285 | + if (likely(ret == 0)) | |
| 286 | + return 1; | |
| 287 | + | |
| 288 | + return 0; | |
| 286 | 289 | } |
| 287 | 290 | |
| 288 | 291 | static void dwmac4_rd_init_rx_desc(struct dma_desc *p, int disable_rx_ic, |
| @@ -434,14 +434,14 @@ static void stmmac_get_tx_hwtstamp(struct stmmac_priv *priv, · 433 unmodified lines | ||
| 434 | 434 | return; |
| 435 | 435 | |
| 436 | 436 | /* check tx tstamp status */ |
| 437 | − if (!priv->hw->desc->get_tx_timestamp_status(p)) { | |
| 437 | + if (priv->hw->desc->get_tx_timestamp_status(p)) { | |
| 438 | 438 | /* get the valid tstamp */ |
| 439 | 439 | ns = priv->hw->desc->get_timestamp(p, priv->adv_ts); |
| 440 | 440 | |
| 441 | 441 | memset(&shhwtstamp, 0, sizeof(struct skb_shared_hwtstamps)); |
| 442 | 442 | shhwtstamp.hwtstamp = ns_to_ktime(ns); |
| 443 | 443 | |
| 444 | − netdev_info(priv->dev, "get valid TX hw timestamp %llu\n", ns); | |
| 444 | + netdev_dbg(priv->dev, "get valid TX hw timestamp %llu\n", ns); | |
| 445 | 445 | /* pass tstamp to stack */ |
| 446 | 446 | skb_tstamp_tx(skb, &shhwtstamp); |
| 447 | 447 | } |
| @@ -468,19 +468,19 @@ static void stmmac_get_rx_hwtstamp(struct stmmac_priv *priv, struct dma_desc *p, · 20 unmodified lines | ||
| 468 | 468 | return; |
| 469 | 469 | |
| 470 | 470 | /* Check if timestamp is available */ |
| 471 | − if (!priv->hw->desc->get_rx_timestamp_status(p, priv->adv_ts)) { | |
| 471 | + if (priv->hw->desc->get_rx_timestamp_status(p, priv->adv_ts)) { | |
| 472 | 472 | /* For GMAC4, the valid timestamp is from CTX next desc. */ |
| 473 | 473 | if (priv->plat->has_gmac4) |
| 474 | 474 | ns = priv->hw->desc->get_timestamp(np, priv->adv_ts); |
| 475 | 475 | else |
| 476 | 476 | ns = priv->hw->desc->get_timestamp(p, priv->adv_ts); |
| 477 | 477 | |
| 478 | − netdev_info(priv->dev, "get valid RX hw timestamp %llu\n", ns); | |
| 478 | + netdev_dbg(priv->dev, "get valid RX hw timestamp %llu\n", ns); | |
| 479 | 479 | shhwtstamp = skb_hwtstamps(skb); |
| 480 | 480 | memset(shhwtstamp, 0, sizeof(struct skb_shared_hwtstamps)); |
| 481 | 481 | shhwtstamp->hwtstamp = ns_to_ktime(ns); |
| 482 | 482 | } else { |
| 483 | − netdev_err(priv->dev, "cannot get RX hw timestamp\n"); | |
| 483 | + netdev_dbg(priv->dev, "cannot get RX hw timestamp\n"); | |
| 484 | 484 | } |
| 485 | 485 | } |
| 486 | 486 | |
| @@ -546,7 +546,10 @@ static int stmmac_hwtstamp_ioctl(struct net_device *dev, struct ifreq *ifr) · 59 unmodified lines | ||
| 546 | 546 | /* PTP v1, UDP, any kind of event packet */ |
| 547 | 547 | config.rx_filter = HWTSTAMP_FILTER_PTP_V1_L4_EVENT; |
| 548 | 548 | /* take time stamp for all event messages */ |
| 549 | − snap_type_sel = PTP_TCR_SNAPTYPSEL_1; | |
| 549 | + if (priv->plat->has_gmac4) | |
| 550 | + snap_type_sel = PTP_GMAC4_TCR_SNAPTYPSEL_1; | |
| 551 | + else | |
| 552 | + snap_type_sel = PTP_TCR_SNAPTYPSEL_1; | |
| 550 | 553 | |
| 551 | 554 | ptp_over_ipv4_udp = PTP_TCR_TSIPV4ENA; |
| 552 | 555 | ptp_over_ipv6_udp = PTP_TCR_TSIPV6ENA; |
| @@ -578,7 +581,10 @@ static int stmmac_hwtstamp_ioctl(struct net_device *dev, struct ifreq *ifr) · 25 unmodified lines | ||
| 578 | 581 | config.rx_filter = HWTSTAMP_FILTER_PTP_V2_L4_EVENT; |
| 579 | 582 | ptp_v2 = PTP_TCR_TSVER2ENA; |
| 580 | 583 | /* take time stamp for all event messages */ |
| 581 | − snap_type_sel = PTP_TCR_SNAPTYPSEL_1; | |
| 584 | + if (priv->plat->has_gmac4) | |
| 585 | + snap_type_sel = PTP_GMAC4_TCR_SNAPTYPSEL_1; | |
| 586 | + else | |
| 587 | + snap_type_sel = PTP_TCR_SNAPTYPSEL_1; | |
| 582 | 588 | |
| 583 | 589 | ptp_over_ipv4_udp = PTP_TCR_TSIPV4ENA; |
| 584 | 590 | ptp_over_ipv6_udp = PTP_TCR_TSIPV6ENA; |
| @@ -612,7 +618,10 @@ static int stmmac_hwtstamp_ioctl(struct net_device *dev, struct ifreq *ifr) · 27 unmodified lines | ||
| 612 | 618 | config.rx_filter = HWTSTAMP_FILTER_PTP_V2_EVENT; |
| 613 | 619 | ptp_v2 = PTP_TCR_TSVER2ENA; |
| 614 | 620 | /* take time stamp for all event messages */ |
| 615 | − snap_type_sel = PTP_TCR_SNAPTYPSEL_1; | |
| 621 | + if (priv->plat->has_gmac4) | |
| 622 | + snap_type_sel = PTP_GMAC4_TCR_SNAPTYPSEL_1; | |
| 623 | + else | |
| 624 | + snap_type_sel = PTP_TCR_SNAPTYPSEL_1; | |
| 616 | 625 | |
| 617 | 626 | ptp_over_ipv4_udp = PTP_TCR_TSIPV4ENA; |
| 618 | 627 | ptp_over_ipv6_udp = PTP_TCR_TSIPV6ENA; |
| @@ -1208,7 +1217,7 @@ static int init_dma_rx_desc_rings(struct net_device *dev, gfp_t flags) · 589 unmodified lines | ||
| 1208 | 1217 | u32 rx_count = priv->plat->rx_queues_to_use; |
| 1209 | 1218 | unsigned int bfsize = 0; |
| 1210 | 1219 | int ret = -ENOMEM; |
| 1211 | − u32 queue; | |
| 1220 | + int queue; | |
| 1212 | 1221 | int i; |
| 1213 | 1222 | |
| 1214 | 1223 | if (priv->hw->mode->set_16kib_bfsize) |
| @@ -2724,7 +2733,7 @@ static void stmmac_tso_allocator(struct stmmac_priv *priv, unsigned int des, · 1509 unmodified lines | ||
| 2724 | 2733 | |
| 2725 | 2734 | priv->hw->desc->prepare_tso_tx_desc(desc, 0, buff_size, |
| 2726 | 2735 | 0, 1, |
| 2727 | − (last_segment) && (buff_size < TSO_MAX_BUFF_SIZE), | |
| 2736 | + (last_segment) && (tmp_len <= TSO_MAX_BUFF_SIZE), | |
| 2728 | 2737 | 0, 0); |
| 2729 | 2738 | |
| 2730 | 2739 | tmp_len -= TSO_MAX_BUFF_SIZE; |
| @@ -2947,7 +2956,8 @@ static netdev_tx_t stmmac_xmit(struct sk_buff *skb, struct net_device *dev) · 216 unmodified lines | ||
| 2947 | 2956 | int i, csum_insertion = 0, is_jumbo = 0; |
| 2948 | 2957 | u32 queue = skb_get_queue_mapping(skb); |
| 2949 | 2958 | int nfrags = skb_shinfo(skb)->nr_frags; |
| 2950 | − unsigned int entry, first_entry; | |
| 2959 | + int entry; | |
| 2960 | + unsigned int first_entry; | |
| 2951 | 2961 | struct dma_desc *desc, *first; |
| 2952 | 2962 | struct stmmac_tx_queue *tx_q; |
| 2953 | 2963 | unsigned int enh_desc; |
| @@ -59,7 +59,8 @@ · 58 unmodified lines | ||
| 59 | 59 | /* Enable Snapshot for Messages Relevant to Master */ |
| 60 | 60 | #define PTP_TCR_TSMSTRENA BIT(15) |
| 61 | 61 | /* Select PTP packets for Taking Snapshots */ |
| 62 | −#define PTP_TCR_SNAPTYPSEL_1 GENMASK(17, 16) | |
| 62 | +#define PTP_TCR_SNAPTYPSEL_1 BIT(16) | |
| 63 | +#define PTP_GMAC4_TCR_SNAPTYPSEL_1 GENMASK(17, 16) | |
| 63 | 64 | /* Enable MAC address for PTP Frame Filtering */ |
| 64 | 65 | #define PTP_TCR_TSENMACADDR BIT(18) |
| 65 | 66 | |
| @@ -1007,7 +1007,7 @@ static void geneve_setup(struct net_device *dev) · 1006 unmodified lines | ||
| 1007 | 1007 | |
| 1008 | 1008 | dev->netdev_ops = &geneve_netdev_ops; |
| 1009 | 1009 | dev->ethtool_ops = &geneve_ethtool_ops; |
| 1010 | − dev->destructor = free_netdev; | |
| 1010 | + dev->needs_free_netdev = true; | |
| 1011 | 1011 | |
| 1012 | 1012 | SET_NETDEV_DEVTYPE(dev, &geneve_type); |
| 1013 | 1013 | |
| @@ -1133,7 +1133,7 @@ static int geneve_configure(struct net *net, struct net_device *dev, · 119 unmodified lines | ||
| 1133 | 1133 | |
| 1134 | 1134 | /* make enough headroom for basic scenario */ |
| 1135 | 1135 | encap_len = GENEVE_BASE_HLEN + ETH_HLEN; |
| 1136 | − if (ip_tunnel_info_af(info) == AF_INET) { | |
| 1136 | + if (!metadata && ip_tunnel_info_af(info) == AF_INET) { | |
| 1137 | 1137 | encap_len += sizeof(struct iphdr); |
| 1138 | 1138 | dev->max_mtu -= sizeof(struct iphdr); |
| 1139 | 1139 | } else { |
| @@ -611,7 +611,7 @@ static const struct net_device_ops gtp_netdev_ops = { · 610 unmodified lines | ||
| 611 | 611 | static void gtp_link_setup(struct net_device *dev) |
| 612 | 612 | { |
| 613 | 613 | dev->netdev_ops = >p_netdev_ops; |
| 614 | − dev->destructor = free_netdev; | |
| 614 | + dev->needs_free_netdev = true; | |
| 615 | 615 | |
| 616 | 616 | dev->hard_header_len = 0; |
| 617 | 617 | dev->addr_len = 0; |
| @@ -311,7 +311,7 @@ static void sp_setup(struct net_device *dev) · 310 unmodified lines | ||
| 311 | 311 | { |
| 312 | 312 | /* Finish setting up the DEVICE info. */ |
| 313 | 313 | dev->netdev_ops = &sp_netdev_ops; |
| 314 | − dev->destructor = free_netdev; | |
| 314 | + dev->needs_free_netdev = true; | |
| 315 | 315 | dev->mtu = SIXP_MTU; |
| 316 | 316 | dev->hard_header_len = AX25_MAX_HEADER_LEN; |
| 317 | 317 | dev->header_ops = &ax25_header_ops; |
| @@ -476,7 +476,7 @@ static const struct net_device_ops bpq_netdev_ops = { · 475 unmodified lines | ||
| 476 | 476 | static void bpq_setup(struct net_device *dev) |
| 477 | 477 | { |
| 478 | 478 | dev->netdev_ops = &bpq_netdev_ops; |
| 479 | − dev->destructor = free_netdev; | |
| 479 | + dev->needs_free_netdev = true; | |
| 480 | 480 | |
| 481 | 481 | memcpy(dev->broadcast, &ax25_bcast, AX25_ADDR_LEN); |
| 482 | 482 | memcpy(dev->dev_addr, &ax25_defaddr, AX25_ADDR_LEN); |
| @@ -576,6 +576,8 @@ static int hdlcdrv_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd) · 575 unmodified lines | ||
| 576 | 576 | case HDLCDRVCTL_CALIBRATE: |
| 577 | 577 | if(!capable(CAP_SYS_RAWIO)) |
| 578 | 578 | return -EPERM; |
| 579 | + if (s->par.bitrate <= 0) | |
| 580 | + return -EINVAL; | |
| 579 | 581 | if (bi.data.calibrate > INT_MAX / s->par.bitrate) |
| 580 | 582 | return -EINVAL; |
| 581 | 583 | s->hdlctx.calibrate = bi.data.calibrate * s->par.bitrate / 16; |
| @@ -171,6 +171,8 @@ struct rndis_device { · 170 unmodified lines | ||
| 171 | 171 | spinlock_t request_lock; |
| 172 | 172 | struct list_head req_list; |
| 173 | 173 | |
| 174 | + struct work_struct mcast_work; | |
| 175 | + | |
| 174 | 176 | u8 hw_mac_adr[ETH_ALEN]; |
| 175 | 177 | u8 rss_key[NETVSC_HASH_KEYLEN]; |
| 176 | 178 | u16 ind_table[ITAB_NUM]; |
| @@ -201,6 +203,7 @@ int rndis_filter_open(struct netvsc_device *nvdev); · 24 unmodified lines | ||
| 201 | 203 | int rndis_filter_close(struct netvsc_device *nvdev); |
| 202 | 204 | int rndis_filter_device_add(struct hv_device *dev, |
| 203 | 205 | struct netvsc_device_info *info); |
| 206 | +void rndis_filter_update(struct netvsc_device *nvdev); | |
| 204 | 207 | void rndis_filter_device_remove(struct hv_device *dev, |
| 205 | 208 | struct netvsc_device *nvdev); |
| 206 | 209 | int rndis_filter_set_rss_param(struct rndis_device *rdev, |
| @@ -211,7 +214,6 @@ int rndis_filter_receive(struct net_device *ndev, · 4 unmodified lines | ||
| 211 | 214 | struct vmbus_channel *channel, |
| 212 | 215 | void *data, u32 buflen); |
| 213 | 216 | |
| 214 | −int rndis_filter_set_packet_filter(struct rndis_device *dev, u32 new_filter); | |
| 215 | 217 | int rndis_filter_set_device_mac(struct net_device *ndev, char *mac); |
| 216 | 218 | |
| 217 | 219 | void netvsc_switch_datapath(struct net_device *nv_dev, bool vf); |
| @@ -696,7 +698,6 @@ struct net_device_context { · 478 unmodified lines | ||
| 696 | 698 | /* list protection */ |
| 697 | 699 | spinlock_t lock; |
| 698 | 700 | |
| 699 | − struct work_struct work; | |
| 700 | 701 | u32 msg_enable; /* debug level */ |
| 701 | 702 | |
| 702 | 703 | u32 tx_checksum_mask; |
| @@ -56,37 +56,12 @@ static int debug = -1; · 55 unmodified lines | ||
| 56 | 56 | module_param(debug, int, S_IRUGO); |
| 57 | 57 | MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)"); |
| 58 | 58 | |
| 59 | −static void do_set_multicast(struct work_struct *w) | |
| 60 | −{ | |
| 61 | − struct net_device_context *ndevctx = | |
| 62 | − container_of(w, struct net_device_context, work); | |
| 63 | − struct hv_device *device_obj = ndevctx->device_ctx; | |
| 64 | − struct net_device *ndev = hv_get_drvdata(device_obj); | |
| 65 | − struct netvsc_device *nvdev = rcu_dereference(ndevctx->nvdev); | |
| 66 | − struct rndis_device *rdev; | |
| 67 | − | |
| 68 | − if (!nvdev) | |
| 69 | − return; | |
| 70 | − | |
| 71 | − rdev = nvdev->extension; | |
| 72 | − if (rdev == NULL) | |
| 73 | − return; | |
| 74 | − | |
| 75 | − if (ndev->flags & IFF_PROMISC) | |
| 76 | − rndis_filter_set_packet_filter(rdev, | |
| 77 | − NDIS_PACKET_TYPE_PROMISCUOUS); | |
| 78 | − else | |
| 79 | − rndis_filter_set_packet_filter(rdev, | |
| 80 | − NDIS_PACKET_TYPE_BROADCAST | | |
| 81 | − NDIS_PACKET_TYPE_ALL_MULTICAST | | |
| 82 | − NDIS_PACKET_TYPE_DIRECTED); | |
| 83 | −} | |
| 84 | − | |
| 85 | 59 | static void netvsc_set_multicast_list(struct net_device *net) |
| 86 | 60 | { |
| 87 | 61 | struct net_device_context *net_device_ctx = netdev_priv(net); |
| 62 | + struct netvsc_device *nvdev = rtnl_dereference(net_device_ctx->nvdev); | |
| 88 | 63 | |
| 89 | − schedule_work(&net_device_ctx->work); | |
| 64 | + rndis_filter_update(nvdev); | |
| 90 | 65 | } |
| 91 | 66 | |
| 92 | 67 | static int netvsc_open(struct net_device *net) |
| @@ -123,8 +98,6 @@ static int netvsc_close(struct net_device *net) · 30 unmodified lines | ||
| 123 | 98 | |
| 124 | 99 | netif_tx_disable(net); |
| 125 | 100 | |
| 126 | − /* Make sure netvsc_set_multicast_list doesn't re-enable filter! */ | |
| 127 | − cancel_work_sync(&net_device_ctx->work); | |
| 128 | 101 | ret = rndis_filter_close(nvdev); |
| 129 | 102 | if (ret != 0) { |
| 130 | 103 | netdev_err(net, "unable to close device (ret %d).\n", ret); |
| @@ -1028,7 +1001,7 @@ static const struct { · 897 unmodified lines | ||
| 1028 | 1001 | static int netvsc_get_sset_count(struct net_device *dev, int string_set) |
| 1029 | 1002 | { |
| 1030 | 1003 | struct net_device_context *ndc = netdev_priv(dev); |
| 1031 | − struct netvsc_device *nvdev = rcu_dereference(ndc->nvdev); | |
| 1004 | + struct netvsc_device *nvdev = rtnl_dereference(ndc->nvdev); | |
| 1032 | 1005 | |
| 1033 | 1006 | if (!nvdev) |
| 1034 | 1007 | return -ENODEV; |
| @@ -1158,11 +1131,22 @@ netvsc_get_rxnfc(struct net_device *dev, struct ethtool_rxnfc *info, · 123 unmodified lines | ||
| 1158 | 1131 | } |
| 1159 | 1132 | |
| 1160 | 1133 | #ifdef CONFIG_NET_POLL_CONTROLLER |
| 1161 | −static void netvsc_poll_controller(struct net_device *net) | |
| 1134 | +static void netvsc_poll_controller(struct net_device *dev) | |
| 1162 | 1135 | { |
| 1163 | − /* As netvsc_start_xmit() works synchronous we don't have to | |
| 1164 | − * trigger anything here. | |
| 1165 | − */ | |
| 1136 | + struct net_device_context *ndc = netdev_priv(dev); | |
| 1137 | + struct netvsc_device *ndev; | |
| 1138 | + int i; | |
| 1139 | + | |
| 1140 | + rcu_read_lock(); | |
| 1141 | + ndev = rcu_dereference(ndc->nvdev); | |
| 1142 | + if (ndev) { | |
| 1143 | + for (i = 0; i < ndev->num_chn; i++) { | |
| 1144 | + struct netvsc_channel *nvchan = &ndev->chan_table[i]; | |
| 1145 | + | |
| 1146 | + napi_schedule(&nvchan->napi); | |
| 1147 | + } | |
| 1148 | + } | |
| 1149 | + rcu_read_unlock(); | |
| 1166 | 1150 | } |
| 1167 | 1151 | #endif |
| 1168 | 1152 | |
| @@ -1552,7 +1536,6 @@ static int netvsc_probe(struct hv_device *dev, · 383 unmodified lines | ||
| 1552 | 1536 | hv_set_drvdata(dev, net); |
| 1553 | 1537 | |
| 1554 | 1538 | INIT_DELAYED_WORK(&net_device_ctx->dwork, netvsc_link_change); |
| 1555 | − INIT_WORK(&net_device_ctx->work, do_set_multicast); | |
| 1556 | 1539 | |
| 1557 | 1540 | spin_lock_init(&net_device_ctx->lock); |
| 1558 | 1541 | INIT_LIST_HEAD(&net_device_ctx->reconfig_events); |
| @@ -1622,7 +1605,6 @@ static int netvsc_remove(struct hv_device *dev) · 63 unmodified lines | ||
| 1622 | 1605 | netif_device_detach(net); |
| 1623 | 1606 | |
| 1624 | 1607 | cancel_delayed_work_sync(&ndev_ctx->dwork); |
| 1625 | − cancel_work_sync(&ndev_ctx->work); | |
| 1626 | 1608 | |
| 1627 | 1609 | /* |
| 1628 | 1610 | * Call to the vsc driver to let it know that the device is being |
| @@ -31,6 +31,7 @@ · 30 unmodified lines | ||
| 31 | 31 | |
| 32 | 32 | #include "hyperv_net.h" |
| 33 | 33 | |
| 34 | +static void rndis_set_multicast(struct work_struct *w); | |
| 34 | 35 | |
| 35 | 36 | #define RNDIS_EXT_LEN PAGE_SIZE |
| 36 | 37 | struct rndis_request { |
| @@ -76,6 +77,7 @@ static struct rndis_device *get_rndis_device(void) · 39 unmodified lines | ||
| 76 | 77 | spin_lock_init(&device->request_lock); |
| 77 | 78 | |
| 78 | 79 | INIT_LIST_HEAD(&device->req_list); |
| 80 | + INIT_WORK(&device->mcast_work, rndis_set_multicast); | |
| 79 | 81 | |
| 80 | 82 | device->state = RNDIS_DEV_UNINITIALIZED; |
| 81 | 83 | |
| @@ -815,7 +817,8 @@ static int rndis_filter_query_link_speed(struct rndis_device *dev) · 733 unmodified lines | ||
| 815 | 817 | return ret; |
| 816 | 818 | } |
| 817 | 819 | |
| 818 | −int rndis_filter_set_packet_filter(struct rndis_device *dev, u32 new_filter) | |
| 820 | +static int rndis_filter_set_packet_filter(struct rndis_device *dev, | |
| 821 | + u32 new_filter) | |
| 819 | 822 | { |
| 820 | 823 | struct rndis_request *request; |
| 821 | 824 | struct rndis_set_request *set; |
| @@ -846,6 +849,28 @@ int rndis_filter_set_packet_filter(struct rndis_device *dev, u32 new_filter) · 24 unmodified lines | ||
| 846 | 849 | return ret; |
| 847 | 850 | } |
| 848 | 851 | |
| 852 | +static void rndis_set_multicast(struct work_struct *w) | |
| 853 | +{ | |
| 854 | + struct rndis_device *rdev | |
| 855 | + = container_of(w, struct rndis_device, mcast_work); | |
| 856 | + | |
| 857 | + if (rdev->ndev->flags & IFF_PROMISC) | |
| 858 | + rndis_filter_set_packet_filter(rdev, | |
| 859 | + NDIS_PACKET_TYPE_PROMISCUOUS); | |
| 860 | + else | |
| 861 | + rndis_filter_set_packet_filter(rdev, | |
| 862 | + NDIS_PACKET_TYPE_BROADCAST | | |
| 863 | + NDIS_PACKET_TYPE_ALL_MULTICAST | | |
| 864 | + NDIS_PACKET_TYPE_DIRECTED); | |
| 865 | +} | |
| 866 | + | |
| 867 | +void rndis_filter_update(struct netvsc_device *nvdev) | |
| 868 | +{ | |
| 869 | + struct rndis_device *rdev = nvdev->extension; | |
| 870 | + | |
| 871 | + schedule_work(&rdev->mcast_work); | |
| 872 | +} | |
| 873 | + | |
| 849 | 874 | static int rndis_filter_init_device(struct rndis_device *dev) |
| 850 | 875 | { |
| 851 | 876 | struct rndis_request *request; |
| @@ -973,6 +998,9 @@ static int rndis_filter_close_device(struct rndis_device *dev) · 121 unmodified lines | ||
| 973 | 998 | if (dev->state != RNDIS_DEV_DATAINITIALIZED) |
| 974 | 999 | return 0; |
| 975 | 1000 | |
| 1001 | + /* Make sure rndis_set_multicast doesn't re-enable filter! */ | |
| 1002 | + cancel_work_sync(&dev->mcast_work); | |
| 1003 | + | |
| 976 | 1004 | ret = rndis_filter_set_packet_filter(dev, 0); |
| 977 | 1005 | if (ret == -ENODEV) |
| 978 | 1006 | ret = 0; |
| @@ -207,7 +207,6 @@ static void ifb_dev_free(struct net_device *dev) · 206 unmodified lines | ||
| 207 | 207 | __skb_queue_purge(&txp->tq); |
| 208 | 208 | } |
| 209 | 209 | kfree(dp->tx_private); |
| 210 | − free_netdev(dev); | |
| 211 | 210 | } |
| 212 | 211 | |
| 213 | 212 | static void ifb_setup(struct net_device *dev) |
| @@ -230,7 +229,8 @@ static void ifb_setup(struct net_device *dev) · 16 unmodified lines | ||
| 230 | 229 | dev->priv_flags &= ~IFF_TX_SKB_SHARING; |
| 231 | 230 | netif_keep_dst(dev); |
| 232 | 231 | eth_hw_addr_random(dev); |
| 233 | − dev->destructor = ifb_dev_free; | |
| 232 | + dev->needs_free_netdev = true; | |
| 233 | + dev->priv_destructor = ifb_dev_free; | |
| 234 | 234 | } |
| 235 | 235 | |
| 236 | 236 | static netdev_tx_t ifb_xmit(struct sk_buff *skb, struct net_device *dev) |
| @@ -632,7 +632,7 @@ void ipvlan_link_setup(struct net_device *dev) · 631 unmodified lines | ||
| 632 | 632 | dev->priv_flags &= ~(IFF_XMIT_DST_RELEASE | IFF_TX_SKB_SHARING); |
| 633 | 633 | dev->priv_flags |= IFF_UNICAST_FLT | IFF_NO_QUEUE; |
| 634 | 634 | dev->netdev_ops = &ipvlan_netdev_ops; |
| 635 | − dev->destructor = free_netdev; | |
| 635 | + dev->needs_free_netdev = true; | |
| 636 | 636 | dev->header_ops = &ipvlan_header_ops; |
| 637 | 637 | dev->ethtool_ops = &ipvlan_ethtool_ops; |
| 638 | 638 | } |
| @@ -159,7 +159,6 @@ static void loopback_dev_free(struct net_device *dev) · 158 unmodified lines | ||
| 159 | 159 | { |
| 160 | 160 | dev_net(dev)->loopback_dev = NULL; |
| 161 | 161 | free_percpu(dev->lstats); |
| 162 | − free_netdev(dev); | |
| 163 | 162 | } |
| 164 | 163 | |
| 165 | 164 | static const struct net_device_ops loopback_ops = { |
| @@ -196,7 +195,8 @@ static void loopback_setup(struct net_device *dev) · 30 unmodified lines | ||
| 196 | 195 | dev->ethtool_ops = &loopback_ethtool_ops; |
| 197 | 196 | dev->header_ops = ð_header_ops; |
| 198 | 197 | dev->netdev_ops = &loopback_ops; |
| 199 | − dev->destructor = loopback_dev_free; | |
| 198 | + dev->needs_free_netdev = true; | |
| 199 | + dev->priv_destructor = loopback_dev_free; | |
| 200 | 200 | } |
| 201 | 201 | |
| 202 | 202 | /* Setup and register the loopback device. */ |
| @@ -2996,7 +2996,6 @@ static void macsec_free_netdev(struct net_device *dev) · 2995 unmodified lines | ||
| 2996 | 2996 | free_percpu(macsec->secy.tx_sc.stats); |
| 2997 | 2997 | |
| 2998 | 2998 | dev_put(real_dev); |
| 2999 | − free_netdev(dev); | |
| 3000 | 2999 | } |
| 3001 | 3000 | |
| 3002 | 3001 | static void macsec_setup(struct net_device *dev) |
| @@ -3006,7 +3005,8 @@ static void macsec_setup(struct net_device *dev) · 3 unmodified lines | ||
| 3006 | 3005 | dev->max_mtu = ETH_MAX_MTU; |
| 3007 | 3006 | dev->priv_flags |= IFF_NO_QUEUE; |
| 3008 | 3007 | dev->netdev_ops = &macsec_netdev_ops; |
| 3009 | − dev->destructor = macsec_free_netdev; | |
| 3008 | + dev->needs_free_netdev = true; | |
| 3009 | + dev->priv_destructor = macsec_free_netdev; | |
| 3010 | 3010 | SET_NETDEV_DEVTYPE(dev, &macsec_type); |
| 3011 | 3011 | |
| 3012 | 3012 | eth_zero_addr(dev->broadcast); |
| @@ -1092,7 +1092,7 @@ void macvlan_common_setup(struct net_device *dev) · 1091 unmodified lines | ||
| 1092 | 1092 | netif_keep_dst(dev); |
| 1093 | 1093 | dev->priv_flags |= IFF_UNICAST_FLT; |
| 1094 | 1094 | dev->netdev_ops = &macvlan_netdev_ops; |
| 1095 | − dev->destructor = free_netdev; | |
| 1095 | + dev->needs_free_netdev = true; | |
| 1096 | 1096 | dev->header_ops = &macvlan_hard_header_ops; |
| 1097 | 1097 | dev->ethtool_ops = &macvlan_ethtool_ops; |
| 1098 | 1098 | } |
| @@ -358,7 +358,7 @@ static ssize_t enabled_store(struct config_item *item, · 357 unmodified lines | ||
| 358 | 358 | if (err) |
| 359 | 359 | goto out_unlock; |
| 360 | 360 | |
| 361 | − pr_info("netconsole: network logging started\n"); | |
| 361 | + pr_info("network logging started\n"); | |
| 362 | 362 | } else { /* false */ |
| 363 | 363 | /* We need to disable the netconsole before cleaning it up |
| 364 | 364 | * otherwise we might end up in write_msg() with |
| @@ -113,7 +113,7 @@ static void nlmon_setup(struct net_device *dev) · 112 unmodified lines | ||
| 113 | 113 | |
| 114 | 114 | dev->netdev_ops = &nlmon_ops; |
| 115 | 115 | dev->ethtool_ops = &nlmon_ethtool_ops; |
| 116 | − dev->destructor = free_netdev; | |
| 116 | + dev->needs_free_netdev = true; | |
| 117 | 117 | |
| 118 | 118 | dev->features = NETIF_F_SG | NETIF_F_FRAGLIST | |
| 119 | 119 | NETIF_F_HIGHDMA | NETIF_F_LLTX; |
| @@ -127,6 +127,7 @@ config MDIO_THUNDER · 126 unmodified lines | ||
| 127 | 127 | tristate "ThunderX SOCs MDIO buses" |
| 128 | 128 | depends on 64BIT |
| 129 | 129 | depends on PCI |
| 130 | + depends on !(MDIO_DEVICE=y && PHYLIB=m) | |
| 130 | 131 | select MDIO_CAVIUM |
| 131 | 132 | help |
| 132 | 133 | This driver supports the MDIO interfaces found on Cavium |
| @@ -1127,8 +1127,6 @@ static int marvell_read_status_page(struct phy_device *phydev, int page) · 1126 unmodified lines | ||
| 1127 | 1127 | if (adv < 0) |
| 1128 | 1128 | return adv; |
| 1129 | 1129 | |
| 1130 | − lpa &= adv; | |
| 1131 | − | |
| 1132 | 1130 | if (status & MII_M1011_PHY_STATUS_FULLDUPLEX) |
| 1133 | 1131 | phydev->duplex = DUPLEX_FULL; |
| 1134 | 1132 | else |
| @@ -658,6 +658,18 @@ static int mdio_bus_match(struct device *dev, struct device_driver *drv) · 657 unmodified lines | ||
| 658 | 658 | return 0; |
| 659 | 659 | } |
| 660 | 660 | |
| 661 | +static int mdio_uevent(struct device *dev, struct kobj_uevent_env *env) | |
| 662 | +{ | |
| 663 | + int rc; | |
| 664 | + | |
| 665 | + /* Some devices have extra OF data and an OF-style MODALIAS */ | |
| 666 | + rc = of_device_uevent_modalias(dev, env); | |
| 667 | + if (rc != -ENODEV) | |
| 668 | + return rc; | |
| 669 | + | |
| 670 | + return 0; | |
| 671 | +} | |
| 672 | + | |
| 661 | 673 | #ifdef CONFIG_PM |
| 662 | 674 | static int mdio_bus_suspend(struct device *dev) |
| 663 | 675 | { |
| @@ -708,6 +720,7 @@ static const struct dev_pm_ops mdio_bus_pm_ops = { · 44 unmodified lines | ||
| 708 | 720 | struct bus_type mdio_bus_type = { |
| 709 | 721 | .name = "mdio_bus", |
| 710 | 722 | .match = mdio_bus_match, |
| 723 | + .uevent = mdio_uevent, | |
| 711 | 724 | .pm = MDIO_BUS_PM_OPS, |
| 712 | 725 | }; |
| 713 | 726 | EXPORT_SYMBOL(mdio_bus_type); |
| @@ -268,23 +268,12 @@ out: · 267 unmodified lines | ||
| 268 | 268 | return ret; |
| 269 | 269 | } |
| 270 | 270 | |
| 271 | −static int kszphy_config_init(struct phy_device *phydev) | |
| 271 | +/* Some config bits need to be set again on resume, handle them here. */ | |
| 272 | +static int kszphy_config_reset(struct phy_device *phydev) | |
| 272 | 273 | { |
| 273 | 274 | struct kszphy_priv *priv = phydev->priv; |
| 274 | − const struct kszphy_type *type; | |
| 275 | 275 | int ret; |
| 276 | 276 | |
| 277 | − if (!priv) | |
| 278 | − return 0; | |
| 279 | − | |
| 280 | − type = priv->type; | |
| 281 | − | |
| 282 | − if (type->has_broadcast_disable) | |
| 283 | − kszphy_broadcast_disable(phydev); | |
| 284 | − | |
| 285 | − if (type->has_nand_tree_disable) | |
| 286 | − kszphy_nand_tree_disable(phydev); | |
| 287 | − | |
| 288 | 277 | if (priv->rmii_ref_clk_sel) { |
| 289 | 278 | ret = kszphy_rmii_clk_sel(phydev, priv->rmii_ref_clk_sel_val); |
| 290 | 279 | if (ret) { |
| @@ -295,11 +284,30 @@ static int kszphy_config_init(struct phy_device *phydev) · 4 unmodified lines | ||
| 295 | 284 | } |
| 296 | 285 | |
| 297 | 286 | if (priv->led_mode >= 0) |
| 298 | − kszphy_setup_led(phydev, type->led_mode_reg, priv->led_mode); | |
| 287 | + kszphy_setup_led(phydev, priv->type->led_mode_reg, priv->led_mode); | |
| 299 | 288 | |
| 300 | 289 | return 0; |
| 301 | 290 | } |
| 302 | 291 | |
| 292 | +static int kszphy_config_init(struct phy_device *phydev) | |
| 293 | +{ | |
| 294 | + struct kszphy_priv *priv = phydev->priv; | |
| 295 | + const struct kszphy_type *type; | |
| 296 | + | |
| 297 | + if (!priv) | |
| 298 | + return 0; | |
| 299 | + | |
| 300 | + type = priv->type; | |
| 301 | + | |
| 302 | + if (type->has_broadcast_disable) | |
| 303 | + kszphy_broadcast_disable(phydev); | |
| 304 | + | |
| 305 | + if (type->has_nand_tree_disable) | |
| 306 | + kszphy_nand_tree_disable(phydev); | |
| 307 | + | |
| 308 | + return kszphy_config_reset(phydev); | |
| 309 | +} | |
| 310 | + | |
| 303 | 311 | static int ksz8041_config_init(struct phy_device *phydev) |
| 304 | 312 | { |
| 305 | 313 | struct device_node *of_node = phydev->mdio.dev.of_node; |
| @@ -700,8 +708,14 @@ static int kszphy_suspend(struct phy_device *phydev) · 394 unmodified lines | ||
| 700 | 708 | |
| 701 | 709 | static int kszphy_resume(struct phy_device *phydev) |
| 702 | 710 | { |
| 711 | + int ret; | |
| 712 | + | |
| 703 | 713 | genphy_resume(phydev); |
| 704 | 714 | |
| 715 | + ret = kszphy_config_reset(phydev); | |
| 716 | + if (ret) | |
| 717 | + return ret; | |
| 718 | + | |
| 705 | 719 | /* Enable PHY Interrupts */ |
| 706 | 720 | if (phy_interrupt_is_valid(phydev)) { |
| 707 | 721 | phydev->interrupts = PHY_INTERRUPT_ENABLED; |
| @@ -54,6 +54,8 @@ static const char *phy_speed_to_str(int speed) · 53 unmodified lines | ||
| 54 | 54 | return "5Gbps"; |
| 55 | 55 | case SPEED_10000: |
| 56 | 56 | return "10Gbps"; |
| 57 | + case SPEED_14000: | |
| 58 | + return "14Gbps"; | |
| 57 | 59 | case SPEED_20000: |
| 58 | 60 | return "20Gbps"; |
| 59 | 61 | case SPEED_25000: |
| @@ -241,7 +243,7 @@ static const struct phy_setting settings[] = { · 181 unmodified lines | ||
| 241 | 243 | * phy_lookup_setting - lookup a PHY setting |
| 242 | 244 | * @speed: speed to match |
| 243 | 245 | * @duplex: duplex to match |
| 244 | − * @feature: allowed link modes | |
| 246 | + * @features: allowed link modes | |
| 245 | 247 | * @exact: an exact match is required |
| 246 | 248 | * |
| 247 | 249 | * Search the settings array for a setting that matches the speed and |
| @@ -629,7 +629,7 @@ static void sl_uninit(struct net_device *dev) · 628 unmodified lines | ||
| 629 | 629 | static void sl_free_netdev(struct net_device *dev) |
| 630 | 630 | { |
| 631 | 631 | int i = dev->base_addr; |
| 632 | − free_netdev(dev); | |
| 632 | + | |
| 633 | 633 | slip_devs[i] = NULL; |
| 634 | 634 | } |
| 635 | 635 | |
| @@ -651,7 +651,8 @@ static const struct net_device_ops sl_netdev_ops = { · 15 unmodified lines | ||
| 651 | 651 | static void sl_setup(struct net_device *dev) |
| 652 | 652 | { |
| 653 | 653 | dev->netdev_ops = &sl_netdev_ops; |
| 654 | − dev->destructor = sl_free_netdev; | |
| 654 | + dev->needs_free_netdev = true; | |
| 655 | + dev->priv_destructor = sl_free_netdev; | |
| 655 | 656 | |
| 656 | 657 | dev->hard_header_len = 0; |
| 657 | 658 | dev->addr_len = 0; |
| @@ -1369,8 +1370,6 @@ static void __exit slip_exit(void) · 711 unmodified lines | ||
| 1369 | 1370 | if (sl->tty) { |
| 1370 | 1371 | printk(KERN_ERR "%s: tty discipline still running\n", |
| 1371 | 1372 | dev->name); |
| 1372 | − /* Intentionally leak the control block. */ | |
| 1373 | − dev->destructor = NULL; | |
| 1374 | 1373 | } |
| 1375 | 1374 | |
| 1376 | 1375 | unregister_netdev(dev); |
| @@ -1643,7 +1643,6 @@ static void team_destructor(struct net_device *dev) · 1642 unmodified lines | ||
| 1643 | 1643 | struct team *team = netdev_priv(dev); |
| 1644 | 1644 | |
| 1645 | 1645 | free_percpu(team->pcpu_stats); |
| 1646 | − free_netdev(dev); | |
| 1647 | 1646 | } |
| 1648 | 1647 | |
| 1649 | 1648 | static int team_open(struct net_device *dev) |
| @@ -2079,7 +2078,8 @@ static void team_setup(struct net_device *dev) · 429 unmodified lines | ||
| 2079 | 2078 | |
| 2080 | 2079 | dev->netdev_ops = &team_netdev_ops; |
| 2081 | 2080 | dev->ethtool_ops = &team_ethtool_ops; |
| 2082 | − dev->destructor = team_destructor; | |
| 2081 | + dev->needs_free_netdev = true; | |
| 2082 | + dev->priv_destructor = team_destructor; | |
| 2083 | 2083 | dev->priv_flags &= ~(IFF_XMIT_DST_RELEASE | IFF_TX_SKB_SHARING); |
| 2084 | 2084 | dev->priv_flags |= IFF_NO_QUEUE; |
| 2085 | 2085 | dev->priv_flags |= IFF_TEAM; |
| @@ -1560,7 +1560,6 @@ static void tun_free_netdev(struct net_device *dev) · 1559 unmodified lines | ||
| 1560 | 1560 | free_percpu(tun->pcpu_stats); |
| 1561 | 1561 | tun_flow_uninit(tun); |
| 1562 | 1562 | security_tun_dev_free_security(tun->security); |
| 1563 | − free_netdev(dev); | |
| 1564 | 1563 | } |
| 1565 | 1564 | |
| 1566 | 1565 | static void tun_setup(struct net_device *dev) |
| @@ -1571,7 +1570,8 @@ static void tun_setup(struct net_device *dev) · 4 unmodified lines | ||
| 1571 | 1570 | tun->group = INVALID_GID; |
| 1572 | 1571 | |
| 1573 | 1572 | dev->ethtool_ops = &tun_ethtool_ops; |
| 1574 | − dev->destructor = tun_free_netdev; | |
| 1573 | + dev->needs_free_netdev = true; | |
| 1574 | + dev->priv_destructor = tun_free_netdev; | |
| 1575 | 1575 | /* We prefer our own queue length */ |
| 1576 | 1576 | dev->tx_queue_len = TUN_READQ_SIZE; |
| 1577 | 1577 | } |
| @@ -298,7 +298,7 @@ static void usbpn_setup(struct net_device *dev) · 297 unmodified lines | ||
| 298 | 298 | dev->addr_len = 1; |
| 299 | 299 | dev->tx_queue_len = 3; |
| 300 | 300 | |
| 301 | − dev->destructor = free_netdev; | |
| 301 | + dev->needs_free_netdev = true; | |
| 302 | 302 | } |
| 303 | 303 | |
| 304 | 304 | /* |
| @@ -123,7 +123,7 @@ static void qmimux_setup(struct net_device *dev) · 122 unmodified lines | ||
| 123 | 123 | dev->addr_len = 0; |
| 124 | 124 | dev->flags = IFF_POINTOPOINT | IFF_NOARP | IFF_MULTICAST; |
| 125 | 125 | dev->netdev_ops = &qmimux_netdev_ops; |
| 126 | − dev->destructor = free_netdev; | |
| 126 | + dev->needs_free_netdev = true; | |
| 127 | 127 | } |
| 128 | 128 | |
| 129 | 129 | static struct net_device *qmimux_find_dev(struct usbnet *dev, u8 mux_id) |
| @@ -1192,6 +1192,8 @@ static const struct usb_device_id products[] = { · 1062 unmodified lines | ||
| 1192 | 1192 | {QMI_FIXED_INTF(0x1199, 0x9056, 8)}, /* Sierra Wireless Modem */ |
| 1193 | 1193 | {QMI_FIXED_INTF(0x1199, 0x9057, 8)}, |
| 1194 | 1194 | {QMI_FIXED_INTF(0x1199, 0x9061, 8)}, /* Sierra Wireless Modem */ |
| 1195 | + {QMI_FIXED_INTF(0x1199, 0x9063, 8)}, /* Sierra Wireless EM7305 */ | |
| 1196 | + {QMI_FIXED_INTF(0x1199, 0x9063, 10)}, /* Sierra Wireless EM7305 */ | |
| 1195 | 1197 | {QMI_FIXED_INTF(0x1199, 0x9071, 8)}, /* Sierra Wireless MC74xx */ |
| 1196 | 1198 | {QMI_FIXED_INTF(0x1199, 0x9071, 10)}, /* Sierra Wireless MC74xx */ |
| 1197 | 1199 | {QMI_FIXED_INTF(0x1199, 0x9079, 8)}, /* Sierra Wireless EM74xx */ |
| @@ -1206,6 +1208,8 @@ static const struct usb_device_id products[] = { · 8 unmodified lines | ||
| 1206 | 1208 | {QMI_FIXED_INTF(0x1bc7, 0x1100, 3)}, /* Telit ME910 */ |
| 1207 | 1209 | {QMI_FIXED_INTF(0x1bc7, 0x1200, 5)}, /* Telit LE920 */ |
| 1208 | 1210 | {QMI_QUIRK_SET_DTR(0x1bc7, 0x1201, 2)}, /* Telit LE920, LE920A4 */ |
| 1211 | + {QMI_FIXED_INTF(0x1c9e, 0x9801, 3)}, /* Telewell TW-3G HSPA+ */ | |
| 1212 | + {QMI_FIXED_INTF(0x1c9e, 0x9803, 4)}, /* Telewell TW-3G HSPA+ */ | |
| 1209 | 1213 | {QMI_FIXED_INTF(0x1c9e, 0x9b01, 3)}, /* XS Stick W100-2 from 4G Systems */ |
| 1210 | 1214 | {QMI_FIXED_INTF(0x0b3c, 0xc000, 4)}, /* Olivetti Olicard 100 */ |
| 1211 | 1215 | {QMI_FIXED_INTF(0x0b3c, 0xc001, 4)}, /* Olivetti Olicard 120 */ |
| @@ -4368,6 +4368,8 @@ static u8 rtl_get_version(struct usb_interface *intf) · 4367 unmodified lines | ||
| 4368 | 4368 | break; |
| 4369 | 4369 | } |
| 4370 | 4370 | |
| 4371 | + dev_dbg(&intf->dev, "Detected version 0x%04x\n", version); | |
| 4372 | + | |
| 4371 | 4373 | return version; |
| 4372 | 4374 | } |
| 4373 | 4375 | |
| @@ -222,7 +222,6 @@ static int veth_dev_init(struct net_device *dev) · 221 unmodified lines | ||
| 222 | 222 | static void veth_dev_free(struct net_device *dev) |
| 223 | 223 | { |
| 224 | 224 | free_percpu(dev->vstats); |
| 225 | − free_netdev(dev); | |
| 226 | 225 | } |
| 227 | 226 | |
| 228 | 227 | #ifdef CONFIG_NET_POLL_CONTROLLER |
| @@ -317,7 +316,8 @@ static void veth_setup(struct net_device *dev) · 88 unmodified lines | ||
| 317 | 316 | NETIF_F_HW_VLAN_STAG_TX | |
| 318 | 317 | NETIF_F_HW_VLAN_CTAG_RX | |
| 319 | 318 | NETIF_F_HW_VLAN_STAG_RX); |
| 320 | − dev->destructor = veth_dev_free; | |
| 319 | + dev->needs_free_netdev = true; | |
| 320 | + dev->priv_destructor = veth_dev_free; | |
| 321 | 321 | dev->max_mtu = ETH_MAX_MTU; |
| 322 | 322 | |
| 323 | 323 | dev->hw_features = VETH_FEATURES; |
| @@ -869,7 +869,7 @@ static unsigned int get_mergeable_buf_len(struct receive_queue *rq, · 868 unmodified lines | ||
| 869 | 869 | unsigned int len; |
| 870 | 870 | |
| 871 | 871 | len = hdr_len + clamp_t(unsigned int, ewma_pkt_len_read(avg_pkt_len), |
| 872 | − rq->min_buf_len - hdr_len, PAGE_SIZE - hdr_len); | |
| 872 | + rq->min_buf_len, PAGE_SIZE - hdr_len); | |
| 873 | 873 | return ALIGN(len, L1_CACHE_BYTES); |
| 874 | 874 | } |
| 875 | 875 | |
| @@ -2144,7 +2144,8 @@ static unsigned int mergeable_min_buf_len(struct virtnet_info *vi, struct virtqu · 1268 unmodified lines | ||
| 2144 | 2144 | unsigned int buf_len = hdr_len + ETH_HLEN + VLAN_HLEN + packet_len; |
| 2145 | 2145 | unsigned int min_buf_len = DIV_ROUND_UP(buf_len, rq_size); |
| 2146 | 2146 | |
| 2147 | − return max(min_buf_len, hdr_len); | |
| 2147 | + return max(max(min_buf_len, hdr_len) - hdr_len, | |
| 2148 | + (unsigned int)GOOD_PACKET_LEN); | |
| 2148 | 2149 | } |
| 2149 | 2150 | |
| 2150 | 2151 | static int virtnet_find_vqs(struct virtnet_info *vi) |
| @@ -36,12 +36,14 @@ · 35 unmodified lines | ||
| 36 | 36 | #include <net/addrconf.h> |
| 37 | 37 | #include <net/l3mdev.h> |
| 38 | 38 | #include <net/fib_rules.h> |
| 39 | +#include <net/netns/generic.h> | |
| 39 | 40 | |
| 40 | 41 | #define DRV_NAME "vrf" |
| 41 | 42 | #define DRV_VERSION "1.0" |
| 42 | 43 | |
| 43 | 44 | #define FIB_RULE_PREF 1000 /* default preference for FIB rules */ |
| 44 | −static bool add_fib_rules = true; | |
| 45 | + | |
| 46 | +static unsigned int vrf_net_id; | |
| 45 | 47 | |
| 46 | 48 | struct net_vrf { |
| 47 | 49 | struct rtable __rcu *rth; |
| @@ -1348,7 +1350,7 @@ static void vrf_setup(struct net_device *dev) · 1300 unmodified lines | ||
| 1348 | 1350 | dev->netdev_ops = &vrf_netdev_ops; |
| 1349 | 1351 | dev->l3mdev_ops = &vrf_l3mdev_ops; |
| 1350 | 1352 | dev->ethtool_ops = &vrf_ethtool_ops; |
| 1351 | − dev->destructor = free_netdev; | |
| 1353 | + dev->needs_free_netdev = true; | |
| 1352 | 1354 | |
| 1353 | 1355 | /* Fill in device structure with ethernet-generic values. */ |
| 1354 | 1356 | eth_hw_addr_random(dev); |
| @@ -1394,6 +1396,8 @@ static int vrf_newlink(struct net *src_net, struct net_device *dev, · 39 unmodified lines | ||
| 1394 | 1396 | struct nlattr *tb[], struct nlattr *data[]) |
| 1395 | 1397 | { |
| 1396 | 1398 | struct net_vrf *vrf = netdev_priv(dev); |
| 1399 | + bool *add_fib_rules; | |
| 1400 | + struct net *net; | |
| 1397 | 1401 | int err; |
| 1398 | 1402 | |
| 1399 | 1403 | if (!data || !data[IFLA_VRF_TABLE]) |
| @@ -1409,13 +1413,15 @@ static int vrf_newlink(struct net *src_net, struct net_device *dev, · 9 unmodified lines | ||
| 1409 | 1413 | if (err) |
| 1410 | 1414 | goto out; |
| 1411 | 1415 | |
| 1412 | − if (add_fib_rules) { | |
| 1416 | + net = dev_net(dev); | |
| 1417 | + add_fib_rules = net_generic(net, vrf_net_id); | |
| 1418 | + if (*add_fib_rules) { | |
| 1413 | 1419 | err = vrf_add_fib_rules(dev); |
| 1414 | 1420 | if (err) { |
| 1415 | 1421 | unregister_netdevice(dev); |
| 1416 | 1422 | goto out; |
| 1417 | 1423 | } |
| 1418 | − add_fib_rules = false; | |
| 1424 | + *add_fib_rules = false; | |
| 1419 | 1425 | } |
| 1420 | 1426 | |
| 1421 | 1427 | out: |
| @@ -1498,16 +1504,38 @@ static struct notifier_block vrf_notifier_block __read_mostly = { · 76 unmodified lines | ||
| 1498 | 1504 | .notifier_call = vrf_device_event, |
| 1499 | 1505 | }; |
| 1500 | 1506 | |
| 1507 | +/* Initialize per network namespace state */ | |
| 1508 | +static int __net_init vrf_netns_init(struct net *net) | |
| 1509 | +{ | |
| 1510 | + bool *add_fib_rules = net_generic(net, vrf_net_id); | |
| 1511 | + | |
| 1512 | + *add_fib_rules = true; | |
| 1513 | + | |
| 1514 | + return 0; | |
| 1515 | +} | |
| 1516 | + | |
| 1517 | +static struct pernet_operations vrf_net_ops __net_initdata = { | |
| 1518 | + .init = vrf_netns_init, | |
| 1519 | + .id = &vrf_net_id, | |
| 1520 | + .size = sizeof(bool), | |
| 1521 | +}; | |
| 1522 | + | |
| 1501 | 1523 | static int __init vrf_init_module(void) |
| 1502 | 1524 | { |
| 1503 | 1525 | int rc; |
| 1504 | 1526 | |
| 1505 | 1527 | register_netdevice_notifier(&vrf_notifier_block); |
| 1506 | 1528 | |
| 1507 | − rc = rtnl_link_register(&vrf_link_ops); | |
| 1529 | + rc = register_pernet_subsys(&vrf_net_ops); | |
| 1508 | 1530 | if (rc < 0) |
| 1509 | 1531 | goto error; |
| 1510 | 1532 | |
| 1533 | + rc = rtnl_link_register(&vrf_link_ops); | |
| 1534 | + if (rc < 0) { | |
| 1535 | + unregister_pernet_subsys(&vrf_net_ops); | |
| 1536 | + goto error; | |
| 1537 | + } | |
| 1538 | + | |
| 1511 | 1539 | return 0; |
| 1512 | 1540 | |
| 1513 | 1541 | error: |
| @@ -135,7 +135,7 @@ static void vsockmon_setup(struct net_device *dev) · 134 unmodified lines | ||
| 135 | 135 | |
| 136 | 136 | dev->netdev_ops = &vsockmon_ops; |
| 137 | 137 | dev->ethtool_ops = &vsockmon_ethtool_ops; |
| 138 | − dev->destructor = free_netdev; | |
| 138 | + dev->needs_free_netdev = true; | |
| 139 | 139 | |
| 140 | 140 | dev->features = NETIF_F_SG | NETIF_F_FRAGLIST | |
| 141 | 141 | NETIF_F_HIGHDMA | NETIF_F_LLTX; |
| @@ -59,6 +59,8 @@ static const u8 all_zeros_mac[ETH_ALEN + 2]; · 58 unmodified lines | ||
| 59 | 59 | |
| 60 | 60 | static int vxlan_sock_add(struct vxlan_dev *vxlan); |
| 61 | 61 | |
| 62 | +static void vxlan_vs_del_dev(struct vxlan_dev *vxlan); | |
| 63 | + | |
| 62 | 64 | /* per-network namespace private data for this module */ |
| 63 | 65 | struct vxlan_net { |
| 64 | 66 | struct list_head vxlan_list; |
| @@ -740,6 +742,22 @@ static void vxlan_fdb_destroy(struct vxlan_dev *vxlan, struct vxlan_fdb *f) · 675 unmodified lines | ||
| 740 | 742 | call_rcu(&f->rcu, vxlan_fdb_free); |
| 741 | 743 | } |
| 742 | 744 | |
| 745 | +static void vxlan_dst_free(struct rcu_head *head) | |
| 746 | +{ | |
| 747 | + struct vxlan_rdst *rd = container_of(head, struct vxlan_rdst, rcu); | |
| 748 | + | |
| 749 | + dst_cache_destroy(&rd->dst_cache); | |
| 750 | + kfree(rd); | |
| 751 | +} | |
| 752 | + | |
| 753 | +static void vxlan_fdb_dst_destroy(struct vxlan_dev *vxlan, struct vxlan_fdb *f, | |
| 754 | + struct vxlan_rdst *rd) | |
| 755 | +{ | |
| 756 | + list_del_rcu(&rd->list); | |
| 757 | + vxlan_fdb_notify(vxlan, f, rd, RTM_DELNEIGH); | |
| 758 | + call_rcu(&rd->rcu, vxlan_dst_free); | |
| 759 | +} | |
| 760 | + | |
| 743 | 761 | static int vxlan_fdb_parse(struct nlattr *tb[], struct vxlan_dev *vxlan, |
| 744 | 762 | union vxlan_addr *ip, __be16 *port, __be32 *src_vni, |
| 745 | 763 | __be32 *vni, u32 *ifindex) |
| @@ -864,9 +882,7 @@ static int __vxlan_fdb_delete(struct vxlan_dev *vxlan, · 118 unmodified lines | ||
| 864 | 882 | * otherwise destroy the fdb entry |
| 865 | 883 | */ |
| 866 | 884 | if (rd && !list_is_singular(&f->remotes)) { |
| 867 | − list_del_rcu(&rd->list); | |
| 868 | − vxlan_fdb_notify(vxlan, f, rd, RTM_DELNEIGH); | |
| 869 | − kfree_rcu(rd, rcu); | |
| 885 | + vxlan_fdb_dst_destroy(vxlan, f, rd); | |
| 870 | 886 | goto out; |
| 871 | 887 | } |
| 872 | 888 | |
| @@ -1067,6 +1083,8 @@ static void vxlan_sock_release(struct vxlan_dev *vxlan) · 194 unmodified lines | ||
| 1067 | 1083 | rcu_assign_pointer(vxlan->vn4_sock, NULL); |
| 1068 | 1084 | synchronize_net(); |
| 1069 | 1085 | |
| 1086 | + vxlan_vs_del_dev(vxlan); | |
| 1087 | + | |
| 1070 | 1088 | if (__vxlan_sock_release_prep(sock4)) { |
| 1071 | 1089 | udp_tunnel_sock_release(sock4->sock); |
| 1072 | 1090 | kfree(sock4); |
| @@ -2342,6 +2360,15 @@ static void vxlan_cleanup(unsigned long arg) · 1269 unmodified lines | ||
| 2342 | 2360 | mod_timer(&vxlan->age_timer, next_timer); |
| 2343 | 2361 | } |
| 2344 | 2362 | |
| 2363 | +static void vxlan_vs_del_dev(struct vxlan_dev *vxlan) | |
| 2364 | +{ | |
| 2365 | + struct vxlan_net *vn = net_generic(vxlan->net, vxlan_net_id); | |
| 2366 | + | |
| 2367 | + spin_lock(&vn->sock_lock); | |
| 2368 | + hlist_del_init_rcu(&vxlan->hlist); | |
| 2369 | + spin_unlock(&vn->sock_lock); | |
| 2370 | +} | |
| 2371 | + | |
| 2345 | 2372 | static void vxlan_vs_add_dev(struct vxlan_sock *vs, struct vxlan_dev *vxlan) |
| 2346 | 2373 | { |
| 2347 | 2374 | struct vxlan_net *vn = net_generic(vxlan->net, vxlan_net_id); |
| @@ -2584,7 +2611,7 @@ static void vxlan_setup(struct net_device *dev) · 236 unmodified lines | ||
| 2584 | 2611 | eth_hw_addr_random(dev); |
| 2585 | 2612 | ether_setup(dev); |
| 2586 | 2613 | |
| 2587 | − dev->destructor = free_netdev; | |
| 2614 | + dev->needs_free_netdev = true; | |
| 2588 | 2615 | SET_NETDEV_DEVTYPE(dev, &vxlan_type); |
| 2589 | 2616 | |
| 2590 | 2617 | dev->features |= NETIF_F_LLTX; |
| @@ -3286,15 +3313,9 @@ static int vxlan_changelink(struct net_device *dev, struct nlattr *tb[], · 695 unmodified lines | ||
| 3286 | 3313 | static void vxlan_dellink(struct net_device *dev, struct list_head *head) |
| 3287 | 3314 | { |
| 3288 | 3315 | struct vxlan_dev *vxlan = netdev_priv(dev); |
| 3289 | − struct vxlan_net *vn = net_generic(vxlan->net, vxlan_net_id); | |
| 3290 | 3316 | |
| 3291 | 3317 | vxlan_flush(vxlan, true); |
| 3292 | 3318 | |
| 3293 | − spin_lock(&vn->sock_lock); | |
| 3294 | − if (!hlist_unhashed(&vxlan->hlist)) | |
| 3295 | − hlist_del_rcu(&vxlan->hlist); | |
| 3296 | − spin_unlock(&vn->sock_lock); | |
| 3297 | − | |
| 3298 | 3319 | gro_cells_destroy(&vxlan->gro_cells); |
| 3299 | 3320 | list_del(&vxlan->next); |
| 3300 | 3321 | unregister_netdevice_queue(dev, head); |
| @@ -475,7 +475,7 @@ static void dlci_setup(struct net_device *dev) · 474 unmodified lines | ||
| 475 | 475 | dev->flags = 0; |
| 476 | 476 | dev->header_ops = &dlci_header_ops; |
| 477 | 477 | dev->netdev_ops = &dlci_netdev_ops; |
| 478 | − dev->destructor = free_netdev; | |
| 478 | + dev->needs_free_netdev = true; | |
| 479 | 479 | |
| 480 | 480 | dlp->receive = dlci_receive; |
| 481 | 481 | |
| @@ -1106,7 +1106,7 @@ static int fr_add_pvc(struct net_device *frad, unsigned int dlci, int type) · 1105 unmodified lines | ||
| 1106 | 1106 | return -EIO; |
| 1107 | 1107 | } |
| 1108 | 1108 | |
| 1109 | − dev->destructor = free_netdev; | |
| 1109 | + dev->needs_free_netdev = true; | |
| 1110 | 1110 | *get_dev_p(pvc, type) = dev; |
| 1111 | 1111 | if (!used) { |
| 1112 | 1112 | state(hdlc)->dce_changed = 1; |
| @@ -306,7 +306,7 @@ static const struct net_device_ops lapbeth_netdev_ops = { · 305 unmodified lines | ||
| 306 | 306 | static void lapbeth_setup(struct net_device *dev) |
| 307 | 307 | { |
| 308 | 308 | dev->netdev_ops = &lapbeth_netdev_ops; |
| 309 | − dev->destructor = free_netdev; | |
| 309 | + dev->needs_free_netdev = true; | |
| 310 | 310 | dev->type = ARPHRD_X25; |
| 311 | 311 | dev->hard_header_len = 3; |
| 312 | 312 | dev->mtu = 1000; |
| @@ -1287,7 +1287,7 @@ void init_netdev(struct net_device *dev) · 1286 unmodified lines | ||
| 1287 | 1287 | struct ath6kl *ar = ath6kl_priv(dev); |
| 1288 | 1288 | |
| 1289 | 1289 | dev->netdev_ops = &ath6kl_netdev_ops; |
| 1290 | − dev->destructor = free_netdev; | |
| 1290 | + dev->needs_free_netdev = true; | |
| 1291 | 1291 | dev->watchdog_timeo = ATH6KL_TX_TIMEOUT; |
| 1292 | 1292 | |
| 1293 | 1293 | dev->needed_headroom = ETH_HLEN; |
| @@ -1271,6 +1271,8 @@ static int wcn36xx_remove(struct platform_device *pdev) · 1270 unmodified lines | ||
| 1271 | 1271 | qcom_smem_state_put(wcn->tx_enable_state); |
| 1272 | 1272 | qcom_smem_state_put(wcn->tx_rings_empty_state); |
| 1273 | 1273 | |
| 1274 | + rpmsg_destroy_ept(wcn->smd_channel); | |
| 1275 | + | |
| 1274 | 1276 | iounmap(wcn->dxe_base); |
| 1275 | 1277 | iounmap(wcn->ccu_base); |
| 1276 | 1278 | |
| @@ -5225,7 +5225,6 @@ void brcmf_cfg80211_free_netdev(struct net_device *ndev) · 5224 unmodified lines | ||
| 5225 | 5225 | |
| 5226 | 5226 | if (vif) |
| 5227 | 5227 | brcmf_free_vif(vif); |
| 5228 | − free_netdev(ndev); | |
| 5229 | 5228 | } |
| 5230 | 5229 | |
| 5231 | 5230 | static bool brcmf_is_linkup(const struct brcmf_event_msg *e) |
| @@ -624,7 +624,8 @@ struct brcmf_if *brcmf_add_if(struct brcmf_pub *drvr, s32 bsscfgidx, s32 ifidx, · 623 unmodified lines | ||
| 624 | 624 | if (!ndev) |
| 625 | 625 | return ERR_PTR(-ENOMEM); |
| 626 | 626 | |
| 627 | − ndev->destructor = brcmf_cfg80211_free_netdev; | |
| 627 | + ndev->needs_free_netdev = true; | |
| 628 | + ndev->priv_destructor = brcmf_cfg80211_free_netdev; | |
| 628 | 629 | ifp = netdev_priv(ndev); |
| 629 | 630 | ifp->ndev = ndev; |
| 630 | 631 | /* store mapping ifidx to bsscfgidx */ |
| @@ -3422,7 +3422,7 @@ static int brcmf_sdio_bus_preinit(struct device *dev) · 3421 unmodified lines | ||
| 3422 | 3422 | /* otherwise, set txglomalign */ |
| 3423 | 3423 | value = sdiodev->settings->bus.sdio.sd_sgentry_align; |
| 3424 | 3424 | /* SDIO ADMA requires at least 32 bit alignment */ |
| 3425 | − value = max_t(u32, value, 4); | |
| 3425 | + value = max_t(u32, value, ALIGNMENT); | |
| 3426 | 3426 | err = brcmf_iovar_data_set(dev, "bus:txglomalign", &value, |
| 3427 | 3427 | sizeof(u32)); |
| 3428 | 3428 | } |
| @@ -79,8 +79,8 @@ · 78 unmodified lines | ||
| 79 | 79 | /* Lowest firmware API version supported */ |
| 80 | 80 | #define IWL7260_UCODE_API_MIN 17 |
| 81 | 81 | #define IWL7265_UCODE_API_MIN 17 |
| 82 | −#define IWL7265D_UCODE_API_MIN 17 | |
| 83 | −#define IWL3168_UCODE_API_MIN 20 | |
| 82 | +#define IWL7265D_UCODE_API_MIN 22 | |
| 83 | +#define IWL3168_UCODE_API_MIN 22 | |
| 84 | 84 | |
| 85 | 85 | /* NVM versions */ |
| 86 | 86 | #define IWL7260_NVM_VERSION 0x0a1d |
| @@ -74,8 +74,8 @@ · 73 unmodified lines | ||
| 74 | 74 | #define IWL8265_UCODE_API_MAX 30 |
| 75 | 75 | |
| 76 | 76 | /* Lowest firmware API version supported */ |
| 77 | −#define IWL8000_UCODE_API_MIN 17 | |
| 78 | −#define IWL8265_UCODE_API_MIN 20 | |
| 77 | +#define IWL8000_UCODE_API_MIN 22 | |
| 78 | +#define IWL8265_UCODE_API_MIN 22 | |
| 79 | 79 | |
| 80 | 80 | /* NVM versions */ |
| 81 | 81 | #define IWL8000_NVM_VERSION 0x0a1d |
| @@ -370,6 +370,7 @@ · 369 unmodified lines | ||
| 370 | 370 | #define MON_DMARB_RD_DATA_ADDR (0xa03c5c) |
| 371 | 371 | |
| 372 | 372 | #define DBGC_IN_SAMPLE (0xa03c00) |
| 373 | +#define DBGC_OUT_CTRL (0xa03c0c) | |
| 373 | 374 | |
| 374 | 375 | /* enable the ID buf for read */ |
| 375 | 376 | #define WFPM_PS_CTL_CLR 0xA0300C |
| @@ -307,6 +307,11 @@ enum { · 306 unmodified lines | ||
| 307 | 307 | /* Bit 1-3: LQ command color. Used to match responses to LQ commands */ |
| 308 | 308 | #define LQ_FLAG_COLOR_POS 1 |
| 309 | 309 | #define LQ_FLAG_COLOR_MSK (7 << LQ_FLAG_COLOR_POS) |
| 310 | +#define LQ_FLAG_COLOR_GET(_f) (((_f) & LQ_FLAG_COLOR_MSK) >>\ | |
| 311 | + LQ_FLAG_COLOR_POS) | |
| 312 | +#define LQ_FLAGS_COLOR_INC(_c) ((((_c) + 1) << LQ_FLAG_COLOR_POS) &\ | |
| 313 | + LQ_FLAG_COLOR_MSK) | |
| 314 | +#define LQ_FLAG_COLOR_SET(_f, _c) ((_c) | ((_f) & ~LQ_FLAG_COLOR_MSK)) | |
| 310 | 315 | |
| 311 | 316 | /* Bit 4-5: Tx RTS BW Signalling |
| 312 | 317 | * (0) No RTS BW signalling |
| @@ -519,8 +519,11 @@ struct agg_tx_status { · 518 unmodified lines | ||
| 519 | 519 | * bit-7 invalid rate indication |
| 520 | 520 | */ |
| 521 | 521 | #define TX_RES_INIT_RATE_INDEX_MSK 0x0f |
| 522 | +#define TX_RES_RATE_TABLE_COLOR_POS 4 | |
| 522 | 523 | #define TX_RES_RATE_TABLE_COLOR_MSK 0x70 |
| 523 | 524 | #define TX_RES_INV_RATE_INDEX_MSK 0x80 |
| 525 | +#define TX_RES_RATE_TABLE_COL_GET(_f) (((_f) & TX_RES_RATE_TABLE_COLOR_MSK) >>\ | |
| 526 | + TX_RES_RATE_TABLE_COLOR_POS) | |
| 524 | 527 | |
| 525 | 528 | #define IWL_MVM_TX_RES_GET_TID(_ra_tid) ((_ra_tid) & 0x0f) |
| 526 | 529 | #define IWL_MVM_TX_RES_GET_RA(_ra_tid) ((_ra_tid) >> 4) |
| @@ -1002,14 +1002,6 @@ int iwl_mvm_fw_dbg_collect_trig(struct iwl_mvm *mvm, · 1001 unmodified lines | ||
| 1002 | 1002 | return 0; |
| 1003 | 1003 | } |
| 1004 | 1004 | |
| 1005 | −static inline void iwl_mvm_restart_early_start(struct iwl_mvm *mvm) | |
| 1006 | −{ | |
| 1007 | − if (mvm->cfg->device_family == IWL_DEVICE_FAMILY_7000) | |
| 1008 | − iwl_clear_bits_prph(mvm->trans, MON_BUFF_SAMPLE_CTL, 0x100); | |
| 1009 | − else | |
| 1010 | − iwl_write_prph(mvm->trans, DBGC_IN_SAMPLE, 1); | |
| 1011 | −} | |
| 1012 | − | |
| 1013 | 1005 | int iwl_mvm_start_fw_dbg_conf(struct iwl_mvm *mvm, u8 conf_id) |
| 1014 | 1006 | { |
| 1015 | 1007 | u8 *ptr; |
| @@ -1023,10 +1015,8 @@ int iwl_mvm_start_fw_dbg_conf(struct iwl_mvm *mvm, u8 conf_id) · 7 unmodified lines | ||
| 1023 | 1015 | /* EARLY START - firmware's configuration is hard coded */ |
| 1024 | 1016 | if ((!mvm->fw->dbg_conf_tlv[conf_id] || |
| 1025 | 1017 | !mvm->fw->dbg_conf_tlv[conf_id]->num_of_hcmds) && |
| 1026 | − conf_id == FW_DBG_START_FROM_ALIVE) { | |
| 1027 | − iwl_mvm_restart_early_start(mvm); | |
| 1018 | + conf_id == FW_DBG_START_FROM_ALIVE) | |
| 1028 | 1019 | return 0; |
| 1029 | − } | |
| 1030 | 1020 | |
| 1031 | 1021 | if (!mvm->fw->dbg_conf_tlv[conf_id]) |
| 1032 | 1022 | return -EINVAL; |
| @@ -1040,7 +1040,7 @@ static int iwl_mvm_mac_ctxt_send_beacon(struct iwl_mvm *mvm, · 1039 unmodified lines | ||
| 1040 | 1040 | struct iwl_mac_beacon_cmd_v6 beacon_cmd_v6; |
| 1041 | 1041 | struct iwl_mac_beacon_cmd_v7 beacon_cmd; |
| 1042 | 1042 | } u = {}; |
| 1043 | − struct iwl_mac_beacon_cmd beacon_cmd; | |
| 1043 | + struct iwl_mac_beacon_cmd beacon_cmd = {}; | |
| 1044 | 1044 | struct ieee80211_tx_info *info; |
| 1045 | 1045 | u32 beacon_skb_len; |
| 1046 | 1046 | u32 rate, tx_flags; |
| @@ -1730,8 +1730,11 @@ int iwl_mvm_find_free_queue(struct iwl_mvm *mvm, u8 sta_id, u8 minq, u8 maxq); · 1729 unmodified lines | ||
| 1730 | 1730 | */ |
| 1731 | 1731 | static inline u32 iwl_mvm_flushable_queues(struct iwl_mvm *mvm) |
| 1732 | 1732 | { |
| 1733 | + u32 cmd_queue = iwl_mvm_is_dqa_supported(mvm) ? IWL_MVM_DQA_CMD_QUEUE : | |
| 1734 | + IWL_MVM_CMD_QUEUE; | |
| 1735 | + | |
| 1733 | 1736 | return ((BIT(mvm->cfg->base_params->num_of_queues) - 1) & |
| 1734 | − ~BIT(IWL_MVM_CMD_QUEUE)); | |
| 1737 | + ~BIT(cmd_queue)); | |
| 1735 | 1738 | } |
| 1736 | 1739 | |
| 1737 | 1740 | static inline |
| @@ -1753,6 +1756,7 @@ static inline void iwl_mvm_stop_device(struct iwl_mvm *mvm) · 15 unmodified lines | ||
| 1753 | 1756 | if (!iwl_mvm_has_new_tx_api(mvm)) |
| 1754 | 1757 | iwl_free_fw_paging(mvm); |
| 1755 | 1758 | mvm->ucode_loaded = false; |
| 1759 | + mvm->fw_dbg_conf = FW_DBG_INVALID; | |
| 1756 | 1760 | iwl_trans_stop_device(mvm->trans); |
| 1757 | 1761 | } |
| 1758 | 1762 | |
| @@ -1149,21 +1149,37 @@ static void iwl_mvm_fw_error_dump_wk(struct work_struct *work) · 1148 unmodified lines | ||
| 1149 | 1149 | |
| 1150 | 1150 | mutex_lock(&mvm->mutex); |
| 1151 | 1151 | |
| 1152 | − /* stop recording */ | |
| 1153 | 1152 | if (mvm->cfg->device_family == IWL_DEVICE_FAMILY_7000) { |
| 1153 | + /* stop recording */ | |
| 1154 | 1154 | iwl_set_bits_prph(mvm->trans, MON_BUFF_SAMPLE_CTL, 0x100); |
| 1155 | + | |
| 1156 | + iwl_mvm_fw_error_dump(mvm); | |
| 1157 | + | |
| 1158 | + /* start recording again if the firmware is not crashed */ | |
| 1159 | + if (!test_bit(STATUS_FW_ERROR, &mvm->trans->status) && | |
| 1160 | + mvm->fw->dbg_dest_tlv) | |
| 1161 | + iwl_clear_bits_prph(mvm->trans, | |
| 1162 | + MON_BUFF_SAMPLE_CTL, 0x100); | |
| 1155 | 1163 | } else { |
| 1164 | + u32 in_sample = iwl_read_prph(mvm->trans, DBGC_IN_SAMPLE); | |
| 1165 | + u32 out_ctrl = iwl_read_prph(mvm->trans, DBGC_OUT_CTRL); | |
| 1166 | + | |
| 1167 | + /* stop recording */ | |
| 1156 | 1168 | iwl_write_prph(mvm->trans, DBGC_IN_SAMPLE, 0); |
| 1157 | − /* wait before we collect the data till the DBGC stop */ | |
| 1158 | 1169 | udelay(100); |
| 1159 | − } | |
| 1170 | + iwl_write_prph(mvm->trans, DBGC_OUT_CTRL, 0); | |
| 1171 | + /* wait before we collect the data till the DBGC stop */ | |
| 1172 | + udelay(500); | |
| 1160 | 1173 | |
| 1161 | − iwl_mvm_fw_error_dump(mvm); | |
| 1174 | + iwl_mvm_fw_error_dump(mvm); | |
| 1162 | 1175 | |
| 1163 | − /* start recording again if the firmware is not crashed */ | |
| 1164 | − WARN_ON_ONCE((!test_bit(STATUS_FW_ERROR, &mvm->trans->status)) && | |
| 1165 | − mvm->fw->dbg_dest_tlv && | |
| 1166 | − iwl_mvm_start_fw_dbg_conf(mvm, mvm->fw_dbg_conf)); | |
| 1176 | + /* start recording again if the firmware is not crashed */ | |
| 1177 | + if (!test_bit(STATUS_FW_ERROR, &mvm->trans->status) && | |
| 1178 | + mvm->fw->dbg_dest_tlv) { | |
| 1179 | + iwl_write_prph(mvm->trans, DBGC_IN_SAMPLE, in_sample); | |
| 1180 | + iwl_write_prph(mvm->trans, DBGC_OUT_CTRL, out_ctrl); | |
| 1181 | + } | |
| 1182 | + } | |
| 1167 | 1183 | |
| 1168 | 1184 | mutex_unlock(&mvm->mutex); |
| 1169 | 1185 | |
| @@ -2,7 +2,7 @@ · 1 unmodified line | ||
| 2 | 2 | * |
| 3 | 3 | * Copyright(c) 2005 - 2014 Intel Corporation. All rights reserved. |
| 4 | 4 | * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH |
| 5 | − * Copyright(c) 2016 Intel Deutschland GmbH | |
| 5 | + * Copyright(c) 2016 - 2017 Intel Deutschland GmbH | |
| 6 | 6 | * |
| 7 | 7 | * This program is free software; you can redistribute it and/or modify it |
| 8 | 8 | * under the terms of version 2 of the GNU General Public License as |
| @@ -1083,34 +1083,6 @@ static void rs_get_lower_rate_down_column(struct iwl_lq_sta *lq_sta, · 1074 unmodified lines | ||
| 1083 | 1083 | rs_get_lower_rate_in_column(lq_sta, rate); |
| 1084 | 1084 | } |
| 1085 | 1085 | |
| 1086 | −/* Check if both rates are identical | |
| 1087 | − * allow_ant_mismatch enables matching a SISO rate on ANT_A or ANT_B | |
| 1088 | − * with a rate indicating STBC/BFER and ANT_AB. | |
| 1089 | − */ | |
| 1090 | −static inline bool rs_rate_equal(struct rs_rate *a, | |
| 1091 | − struct rs_rate *b, | |
| 1092 | − bool allow_ant_mismatch) | |
| 1093 | − | |
| 1094 | −{ | |
| 1095 | − bool ant_match = (a->ant == b->ant) && (a->stbc == b->stbc) && | |
| 1096 | − (a->bfer == b->bfer); | |
| 1097 | − | |
| 1098 | − if (allow_ant_mismatch) { | |
| 1099 | − if (a->stbc || a->bfer) { | |
| 1100 | − WARN_ONCE(a->ant != ANT_AB, "stbc %d bfer %d ant %d", | |
| 1101 | − a->stbc, a->bfer, a->ant); | |
| 1102 | − ant_match |= (b->ant == ANT_A || b->ant == ANT_B); | |
| 1103 | − } else if (b->stbc || b->bfer) { | |
| 1104 | − WARN_ONCE(b->ant != ANT_AB, "stbc %d bfer %d ant %d", | |
| 1105 | − b->stbc, b->bfer, b->ant); | |
| 1106 | − ant_match |= (a->ant == ANT_A || a->ant == ANT_B); | |
| 1107 | − } | |
| 1108 | − } | |
| 1109 | − | |
| 1110 | − return (a->type == b->type) && (a->bw == b->bw) && (a->sgi == b->sgi) && | |
| 1111 | − (a->ldpc == b->ldpc) && (a->index == b->index) && ant_match; | |
| 1112 | −} | |
| 1113 | − | |
| 1114 | 1086 | /* Check if both rates share the same column */ |
| 1115 | 1087 | static inline bool rs_rate_column_match(struct rs_rate *a, |
| 1116 | 1088 | struct rs_rate *b) |
| @@ -1182,12 +1154,12 @@ void iwl_mvm_rs_tx_status(struct iwl_mvm *mvm, struct ieee80211_sta *sta, · 65 unmodified lines | ||
| 1182 | 1154 | u32 lq_hwrate; |
| 1183 | 1155 | struct rs_rate lq_rate, tx_resp_rate; |
| 1184 | 1156 | struct iwl_scale_tbl_info *curr_tbl, *other_tbl, *tmp_tbl; |
| 1185 | − u8 reduced_txp = (uintptr_t)info->status.status_driver_data[0]; | |
| 1157 | + u32 tlc_info = (uintptr_t)info->status.status_driver_data[0]; | |
| 1158 | + u8 reduced_txp = tlc_info & RS_DRV_DATA_TXP_MSK; | |
| 1159 | + u8 lq_color = RS_DRV_DATA_LQ_COLOR_GET(tlc_info); | |
| 1186 | 1160 | u32 tx_resp_hwrate = (uintptr_t)info->status.status_driver_data[1]; |
| 1187 | 1161 | struct iwl_mvm_sta *mvmsta = iwl_mvm_sta_from_mac80211(sta); |
| 1188 | 1162 | struct iwl_lq_sta *lq_sta = &mvmsta->lq_sta; |
| 1189 | − bool allow_ant_mismatch = fw_has_api(&mvm->fw->ucode_capa, | |
| 1190 | − IWL_UCODE_TLV_API_LQ_SS_PARAMS); | |
| 1191 | 1163 | |
| 1192 | 1164 | /* Treat uninitialized rate scaling data same as non-existing. */ |
| 1193 | 1165 | if (!lq_sta) { |
| @@ -1262,10 +1234,10 @@ void iwl_mvm_rs_tx_status(struct iwl_mvm *mvm, struct ieee80211_sta *sta, · 68 unmodified lines | ||
| 1262 | 1234 | rs_rate_from_ucode_rate(lq_hwrate, info->band, &lq_rate); |
| 1263 | 1235 | |
| 1264 | 1236 | /* Here we actually compare this rate to the latest LQ command */ |
| 1265 | − if (!rs_rate_equal(&tx_resp_rate, &lq_rate, allow_ant_mismatch)) { | |
| 1237 | + if (lq_color != LQ_FLAG_COLOR_GET(table->flags)) { | |
| 1266 | 1238 | IWL_DEBUG_RATE(mvm, |
| 1267 | − "initial tx resp rate 0x%x does not match 0x%x\n", | |
| 1268 | − tx_resp_hwrate, lq_hwrate); | |
| 1239 | + "tx resp color 0x%x does not match 0x%x\n", | |
| 1240 | + lq_color, LQ_FLAG_COLOR_GET(table->flags)); | |
| 1269 | 1241 | |
| 1270 | 1242 | /* |
| 1271 | 1243 | * Since rates mis-match, the last LQ command may have failed. |
| @@ -3326,6 +3298,7 @@ static void rs_build_rates_table(struct iwl_mvm *mvm, · 2054 unmodified lines | ||
| 3326 | 3298 | u8 valid_tx_ant = 0; |
| 3327 | 3299 | struct iwl_lq_cmd *lq_cmd = &lq_sta->lq; |
| 3328 | 3300 | bool toggle_ant = false; |
| 3301 | + u32 color; | |
| 3329 | 3302 | |
| 3330 | 3303 | memcpy(&rate, initial_rate, sizeof(rate)); |
| 3331 | 3304 | |
| @@ -3380,6 +3353,9 @@ static void rs_build_rates_table(struct iwl_mvm *mvm, · 48 unmodified lines | ||
| 3380 | 3353 | num_rates, num_retries, valid_tx_ant, |
| 3381 | 3354 | toggle_ant); |
| 3382 | 3355 | |
| 3356 | + /* update the color of the LQ command (as a counter at bits 1-3) */ | |
| 3357 | + color = LQ_FLAGS_COLOR_INC(LQ_FLAG_COLOR_GET(lq_cmd->flags)); | |
| 3358 | + lq_cmd->flags = LQ_FLAG_COLOR_SET(lq_cmd->flags, color); | |
| 3383 | 3359 | } |
| 3384 | 3360 | |
| 3385 | 3361 | struct rs_bfer_active_iter_data { |
| @@ -2,6 +2,7 @@ · 1 unmodified line | ||
| 2 | 2 | * |
| 3 | 3 | * Copyright(c) 2003 - 2014 Intel Corporation. All rights reserved. |
| 4 | 4 | * Copyright(c) 2015 Intel Mobile Communications GmbH |
| 5 | + * Copyright(c) 2017 Intel Deutschland GmbH | |
| 5 | 6 | * |
| 6 | 7 | * This program is free software; you can redistribute it and/or modify it |
| 7 | 8 | * under the terms of version 2 of the GNU General Public License as |
| @@ -357,6 +358,20 @@ struct iwl_lq_sta { · 349 unmodified lines | ||
| 357 | 358 | } pers; |
| 358 | 359 | }; |
| 359 | 360 | |
| 361 | +/* ieee80211_tx_info's status_driver_data[0] is packed with lq color and txp | |
| 362 | + * Note, it's iwlmvm <-> mac80211 interface. | |
| 363 | + * bits 0-7: reduced tx power | |
| 364 | + * bits 8-10: LQ command's color | |
| 365 | + */ | |
| 366 | +#define RS_DRV_DATA_TXP_MSK 0xff | |
| 367 | +#define RS_DRV_DATA_LQ_COLOR_POS 8 | |
| 368 | +#define RS_DRV_DATA_LQ_COLOR_MSK (7 << RS_DRV_DATA_LQ_COLOR_POS) | |
| 369 | +#define RS_DRV_DATA_LQ_COLOR_GET(_f) (((_f) & RS_DRV_DATA_LQ_COLOR_MSK) >>\ | |
| 370 | + RS_DRV_DATA_LQ_COLOR_POS) | |
| 371 | +#define RS_DRV_DATA_PACK(_c, _p) ((void *)(uintptr_t)\ | |
| 372 | + (((uintptr_t)_p) |\ | |
| 373 | + ((_c) << RS_DRV_DATA_LQ_COLOR_POS))) | |
| 374 | + | |
| 360 | 375 | /* Initialize station's rate scaling information after adding station */ |
| 361 | 376 | void iwl_mvm_rs_rate_init(struct iwl_mvm *mvm, struct ieee80211_sta *sta, |
| 362 | 377 | enum nl80211_band band, bool init); |
| @@ -2120,7 +2120,8 @@ int iwl_mvm_add_mcast_sta(struct iwl_mvm *mvm, struct ieee80211_vif *vif) · 2119 unmodified lines | ||
| 2120 | 2120 | if (!iwl_mvm_is_dqa_supported(mvm)) |
| 2121 | 2121 | return 0; |
| 2122 | 2122 | |
| 2123 | − if (WARN_ON(vif->type != NL80211_IFTYPE_AP)) | |
| 2123 | + if (WARN_ON(vif->type != NL80211_IFTYPE_AP && | |
| 2124 | + vif->type != NL80211_IFTYPE_ADHOC)) | |
| 2124 | 2125 | return -ENOTSUPP; |
| 2125 | 2126 | |
| 2126 | 2127 | /* |
| @@ -2155,6 +2156,16 @@ int iwl_mvm_add_mcast_sta(struct iwl_mvm *mvm, struct ieee80211_vif *vif) · 28 unmodified lines | ||
| 2155 | 2156 | mvmvif->cab_queue = queue; |
| 2156 | 2157 | } else if (!fw_has_api(&mvm->fw->ucode_capa, |
| 2157 | 2158 | IWL_UCODE_TLV_API_STA_TYPE)) { |
| 2159 | + /* | |
| 2160 | + * In IBSS, ieee80211_check_queues() sets the cab_queue to be | |
| 2161 | + * invalid, so make sure we use the queue we want. | |
| 2162 | + * Note that this is done here as we want to avoid making DQA | |
| 2163 | + * changes in mac80211 layer. | |
| 2164 | + */ | |
| 2165 | + if (vif->type == NL80211_IFTYPE_ADHOC) { | |
| 2166 | + vif->cab_queue = IWL_MVM_DQA_GCAST_QUEUE; | |
| 2167 | + mvmvif->cab_queue = vif->cab_queue; | |
| 2168 | + } | |
| 2158 | 2169 | iwl_mvm_enable_txq(mvm, vif->cab_queue, vif->cab_queue, 0, |
| 2159 | 2170 | &cfg, timeout); |
| 2160 | 2171 | } |
| @@ -3321,18 +3332,15 @@ int iwl_mvm_remove_sta_key(struct iwl_mvm *mvm, · 1160 unmodified lines | ||
| 3321 | 3332 | |
| 3322 | 3333 | /* Get the station from the mvm local station table */ |
| 3323 | 3334 | mvm_sta = iwl_mvm_get_key_sta(mvm, vif, sta); |
| 3324 | − if (!mvm_sta) { | |
| 3325 | − IWL_ERR(mvm, "Failed to find station\n"); | |
| 3326 | − return -EINVAL; | |
| 3327 | − } | |
| 3328 | − sta_id = mvm_sta->sta_id; | |
| 3335 | + if (mvm_sta) | |
| 3336 | + sta_id = mvm_sta->sta_id; | |
| 3329 | 3337 | |
| 3330 | 3338 | IWL_DEBUG_WEP(mvm, "mvm remove dynamic key: idx=%d sta=%d\n", |
| 3331 | 3339 | keyconf->keyidx, sta_id); |
| 3332 | 3340 | |
| 3333 | − if (keyconf->cipher == WLAN_CIPHER_SUITE_AES_CMAC || | |
| 3334 | − keyconf->cipher == WLAN_CIPHER_SUITE_BIP_GMAC_128 || | |
| 3335 | − keyconf->cipher == WLAN_CIPHER_SUITE_BIP_GMAC_256) | |
| 3341 | + if (mvm_sta && (keyconf->cipher == WLAN_CIPHER_SUITE_AES_CMAC || | |
| 3342 | + keyconf->cipher == WLAN_CIPHER_SUITE_BIP_GMAC_128 || | |
| 3343 | + keyconf->cipher == WLAN_CIPHER_SUITE_BIP_GMAC_256)) | |
| 3336 | 3344 | return iwl_mvm_send_sta_igtk(mvm, keyconf, sta_id, true); |
| 3337 | 3345 | |
| 3338 | 3346 | if (!__test_and_clear_bit(keyconf->hw_key_idx, mvm->fw_key_table)) { |
| @@ -313,6 +313,7 @@ enum iwl_mvm_agg_state { · 312 unmodified lines | ||
| 313 | 313 | * This is basically (last acked packet++). |
| 314 | 314 | * @rate_n_flags: Rate at which Tx was attempted. Holds the data between the |
| 315 | 315 | * Tx response (TX_CMD), and the block ack notification (COMPRESSED_BA). |
| 316 | + * @lq_color: the color of the LQ command as it appears in tx response. | |
| 316 | 317 | * @amsdu_in_ampdu_allowed: true if A-MSDU in A-MPDU is allowed. |
| 317 | 318 | * @state: state of the BA agreement establishment / tear down. |
| 318 | 319 | * @txq_id: Tx queue used by the BA session / DQA |
| @@ -331,6 +332,7 @@ struct iwl_mvm_tid_data { · 12 unmodified lines | ||
| 331 | 332 | u16 next_reclaimed; |
| 332 | 333 | /* The rest is Tx AGG related */ |
| 333 | 334 | u32 rate_n_flags; |
| 335 | + u8 lq_color; | |
| 334 | 336 | bool amsdu_in_ampdu_allowed; |
| 335 | 337 | enum iwl_mvm_agg_state state; |
| 336 | 338 | u16 txq_id; |
| @@ -790,11 +790,13 @@ static int iwl_mvm_tcool_set_cur_state(struct thermal_cooling_device *cdev, · 789 unmodified lines | ||
| 790 | 790 | struct iwl_mvm *mvm = (struct iwl_mvm *)(cdev->devdata); |
| 791 | 791 | int ret; |
| 792 | 792 | |
| 793 | − if (!mvm->ucode_loaded || !(mvm->cur_ucode == IWL_UCODE_REGULAR)) | |
| 794 | − return -EIO; | |
| 795 | − | |
| 796 | 793 | mutex_lock(&mvm->mutex); |
| 797 | 794 | |
| 795 | + if (!mvm->ucode_loaded || !(mvm->cur_ucode == IWL_UCODE_REGULAR)) { | |
| 796 | + ret = -EIO; | |
| 797 | + goto unlock; | |
| 798 | + } | |
| 799 | + | |
| 798 | 800 | if (new_state >= ARRAY_SIZE(iwl_mvm_cdev_budgets)) { |
| 799 | 801 | ret = -EINVAL; |
| 800 | 802 | goto unlock; |
| @@ -1323,6 +1323,7 @@ static void iwl_mvm_rx_tx_cmd_single(struct iwl_mvm *mvm, · 1322 unmodified lines | ||
| 1323 | 1323 | struct iwl_mvm_sta *mvmsta; |
| 1324 | 1324 | struct sk_buff_head skbs; |
| 1325 | 1325 | u8 skb_freed = 0; |
| 1326 | + u8 lq_color; | |
| 1326 | 1327 | u16 next_reclaimed, seq_ctl; |
| 1327 | 1328 | bool is_ndp = false; |
| 1328 | 1329 | |
| @@ -1405,8 +1406,9 @@ static void iwl_mvm_rx_tx_cmd_single(struct iwl_mvm *mvm, · 76 unmodified lines | ||
| 1405 | 1406 | info->status.tx_time = |
| 1406 | 1407 | le16_to_cpu(tx_resp->wireless_media_time); |
| 1407 | 1408 | BUILD_BUG_ON(ARRAY_SIZE(info->status.status_driver_data) < 1); |
| 1409 | + lq_color = TX_RES_RATE_TABLE_COL_GET(tx_resp->tlc_info); | |
| 1408 | 1410 | info->status.status_driver_data[0] = |
| 1409 | − (void *)(uintptr_t)tx_resp->reduced_tpc; | |
| 1411 | + RS_DRV_DATA_PACK(lq_color, tx_resp->reduced_tpc); | |
| 1410 | 1412 | |
| 1411 | 1413 | ieee80211_tx_status(mvm->hw, skb); |
| 1412 | 1414 | } |
| @@ -1638,6 +1640,9 @@ static void iwl_mvm_rx_tx_cmd_agg(struct iwl_mvm *mvm, · 225 unmodified lines | ||
| 1638 | 1640 | le32_to_cpu(tx_resp->initial_rate); |
| 1639 | 1641 | mvmsta->tid_data[tid].tx_time = |
| 1640 | 1642 | le16_to_cpu(tx_resp->wireless_media_time); |
| 1643 | + mvmsta->tid_data[tid].lq_color = | |
| 1644 | + (tx_resp->tlc_info & TX_RES_RATE_TABLE_COLOR_MSK) >> | |
| 1645 | + TX_RES_RATE_TABLE_COLOR_POS; | |
| 1641 | 1646 | } |
| 1642 | 1647 | |
| 1643 | 1648 | rcu_read_unlock(); |
| @@ -1707,6 +1712,11 @@ static void iwl_mvm_tx_reclaim(struct iwl_mvm *mvm, int sta_id, int tid, · 63 unmodified lines | ||
| 1707 | 1712 | iwl_mvm_check_ratid_empty(mvm, sta, tid); |
| 1708 | 1713 | |
| 1709 | 1714 | freed = 0; |
| 1715 | + | |
| 1716 | + /* pack lq color from tid_data along the reduced txp */ | |
| 1717 | + ba_info->status.status_driver_data[0] = | |
| 1718 | + RS_DRV_DATA_PACK(tid_data->lq_color, | |
| 1719 | + ba_info->status.status_driver_data[0]); | |
| 1710 | 1720 | ba_info->status.status_driver_data[1] = (void *)(uintptr_t)rate; |
| 1711 | 1721 | |
| 1712 | 1722 | skb_queue_walk(&reclaimed_skbs, skb) { |
| @@ -2803,7 +2803,8 @@ static struct iwl_trans_dump_data · 2802 unmodified lines | ||
| 2803 | 2803 | #ifdef CONFIG_PM_SLEEP |
| 2804 | 2804 | static int iwl_trans_pcie_suspend(struct iwl_trans *trans) |
| 2805 | 2805 | { |
| 2806 | − if (trans->runtime_pm_mode == IWL_PLAT_PM_MODE_D0I3) | |
| 2806 | + if (trans->runtime_pm_mode == IWL_PLAT_PM_MODE_D0I3 && | |
| 2807 | + (trans->system_pm_mode == IWL_PLAT_PM_MODE_D0I3)) | |
| 2807 | 2808 | return iwl_pci_fw_enter_d0i3(trans); |
| 2808 | 2809 | |
| 2809 | 2810 | return 0; |
| @@ -2811,7 +2812,8 @@ static int iwl_trans_pcie_suspend(struct iwl_trans *trans) · 1 unmodified line | ||
| 2811 | 2812 | |
| 2812 | 2813 | static void iwl_trans_pcie_resume(struct iwl_trans *trans) |
| 2813 | 2814 | { |
| 2814 | − if (trans->runtime_pm_mode == IWL_PLAT_PM_MODE_D0I3) | |
| 2815 | + if (trans->runtime_pm_mode == IWL_PLAT_PM_MODE_D0I3 && | |
| 2816 | + (trans->system_pm_mode == IWL_PLAT_PM_MODE_D0I3)) | |
| 2815 | 2817 | iwl_pci_fw_exit_d0i3(trans); |
| 2816 | 2818 | } |
| 2817 | 2819 | #endif /* CONFIG_PM_SLEEP */ |
| @@ -906,7 +906,7 @@ int iwl_trans_pcie_dyn_txq_alloc(struct iwl_trans *trans, · 905 unmodified lines | ||
| 906 | 906 | |
| 907 | 907 | if (WARN_ON(iwl_rx_packet_payload_len(hcmd.resp_pkt) != sizeof(*rsp))) { |
| 908 | 908 | ret = -EINVAL; |
| 909 | − goto error; | |
| 909 | + goto error_free_resp; | |
| 910 | 910 | } |
| 911 | 911 | |
| 912 | 912 | rsp = (void *)hcmd.resp_pkt->data; |
| @@ -915,13 +915,13 @@ int iwl_trans_pcie_dyn_txq_alloc(struct iwl_trans *trans, · 2 unmodified lines | ||
| 915 | 915 | if (qid > ARRAY_SIZE(trans_pcie->txq)) { |
| 916 | 916 | WARN_ONCE(1, "queue index %d unsupported", qid); |
| 917 | 917 | ret = -EIO; |
| 918 | − goto error; | |
| 918 | + goto error_free_resp; | |
| 919 | 919 | } |
| 920 | 920 | |
| 921 | 921 | if (test_and_set_bit(qid, trans_pcie->queue_used)) { |
| 922 | 922 | WARN_ONCE(1, "queue %d already used", qid); |
| 923 | 923 | ret = -EIO; |
| 924 | − goto error; | |
| 924 | + goto error_free_resp; | |
| 925 | 925 | } |
| 926 | 926 | |
| 927 | 927 | txq->id = qid; |
| @@ -934,8 +934,11 @@ int iwl_trans_pcie_dyn_txq_alloc(struct iwl_trans *trans, · 6 unmodified lines | ||
| 934 | 934 | (txq->write_ptr) | (qid << 16)); |
| 935 | 935 | IWL_DEBUG_TX_QUEUES(trans, "Activate queue %d\n", qid); |
| 936 | 936 | |
| 937 | + iwl_free_resp(&hcmd); | |
| 937 | 938 | return qid; |
| 938 | 939 | |
| 940 | +error_free_resp: | |
| 941 | + iwl_free_resp(&hcmd); | |
| 939 | 942 | error: |
| 940 | 943 | iwl_pcie_gen2_txq_free_memory(trans, txq); |
| 941 | 944 | return ret; |
| @@ -73,7 +73,7 @@ struct net_device * hostap_add_interface(struct local_info *local, · 72 unmodified lines | ||
| 73 | 73 | dev->mem_end = mdev->mem_end; |
| 74 | 74 | |
| 75 | 75 | hostap_setup_dev(dev, local, type); |
| 76 | − dev->destructor = free_netdev; | |
| 76 | + dev->needs_free_netdev = true; | |
| 77 | 77 | |
| 78 | 78 | sprintf(dev->name, "%s%s", prefix, name); |
| 79 | 79 | if (!rtnl_locked) |
| @@ -2861,7 +2861,7 @@ static const struct net_device_ops hwsim_netdev_ops = { · 2860 unmodified lines | ||
| 2861 | 2861 | static void hwsim_mon_setup(struct net_device *dev) |
| 2862 | 2862 | { |
| 2863 | 2863 | dev->netdev_ops = &hwsim_netdev_ops; |
| 2864 | − dev->destructor = free_netdev; | |
| 2864 | + dev->needs_free_netdev = true; | |
| 2865 | 2865 | ether_setup(dev); |
| 2866 | 2866 | dev->priv_flags |= IFF_NO_QUEUE; |
| 2867 | 2867 | dev->type = ARPHRD_IEEE80211_RADIOTAP; |
| @@ -1280,7 +1280,7 @@ void mwifiex_init_priv_params(struct mwifiex_private *priv, · 1279 unmodified lines | ||
| 1280 | 1280 | struct net_device *dev) |
| 1281 | 1281 | { |
| 1282 | 1282 | dev->netdev_ops = &mwifiex_netdev_ops; |
| 1283 | − dev->destructor = free_netdev; | |
| 1283 | + dev->needs_free_netdev = true; | |
| 1284 | 1284 | /* Initialize private structure */ |
| 1285 | 1285 | priv->current_key_index = 0; |
| 1286 | 1286 | priv->media_connected = false; |
| @@ -56,7 +56,7 @@ MODULE_PARM_DESC(max_retries, "max number of retries a command may have"); · 55 unmodified lines | ||
| 56 | 56 | static int nvme_char_major; |
| 57 | 57 | module_param(nvme_char_major, int, 0); |
| 58 | 58 | |
| 59 | −static unsigned long default_ps_max_latency_us = 25000; | |
| 59 | +static unsigned long default_ps_max_latency_us = 100000; | |
| 60 | 60 | module_param(default_ps_max_latency_us, ulong, 0644); |
| 61 | 61 | MODULE_PARM_DESC(default_ps_max_latency_us, |
| 62 | 62 | "max power saving latency for new devices; use PM QOS to change per device"); |
| @@ -1342,7 +1342,7 @@ static void nvme_configure_apst(struct nvme_ctrl *ctrl) · 1279 unmodified lines | ||
| 1342 | 1342 | * transitioning between power states. Therefore, when running |
| 1343 | 1343 | * in any given state, we will enter the next lower-power |
| 1344 | 1344 | * non-operational state after waiting 50 * (enlat + exlat) |
| 1345 | − * microseconds, as long as that state's total latency is under | |
| 1345 | + * microseconds, as long as that state's exit latency is under | |
| 1346 | 1346 | * the requested maximum latency. |
| 1347 | 1347 | * |
| 1348 | 1348 | * We will not autonomously enter any non-operational state for |
| @@ -1387,7 +1387,7 @@ static void nvme_configure_apst(struct nvme_ctrl *ctrl) · 38 unmodified lines | ||
| 1387 | 1387 | * lowest-power state, not the number of states. |
| 1388 | 1388 | */ |
| 1389 | 1389 | for (state = (int)ctrl->npss; state >= 0; state--) { |
| 1390 | − u64 total_latency_us, transition_ms; | |
| 1390 | + u64 total_latency_us, exit_latency_us, transition_ms; | |
| 1391 | 1391 | |
| 1392 | 1392 | if (target) |
| 1393 | 1393 | table->entries[state] = target; |
| @@ -1408,12 +1408,15 @@ static void nvme_configure_apst(struct nvme_ctrl *ctrl) · 14 unmodified lines | ||
| 1408 | 1408 | NVME_PS_FLAGS_NON_OP_STATE)) |
| 1409 | 1409 | continue; |
| 1410 | 1410 | |
| 1411 | − total_latency_us = | |
| 1412 | − (u64)le32_to_cpu(ctrl->psd[state].entry_lat) + | |
| 1413 | − + le32_to_cpu(ctrl->psd[state].exit_lat); | |
| 1414 | − if (total_latency_us > ctrl->ps_max_latency_us) | |
| 1411 | + exit_latency_us = | |
| 1412 | + (u64)le32_to_cpu(ctrl->psd[state].exit_lat); | |
| 1413 | + if (exit_latency_us > ctrl->ps_max_latency_us) | |
| 1415 | 1414 | continue; |
| 1416 | 1415 | |
| 1416 | + total_latency_us = | |
| 1417 | + exit_latency_us + | |
| 1418 | + le32_to_cpu(ctrl->psd[state].entry_lat); | |
| 1419 | + | |
| 1417 | 1420 | /* |
| 1418 | 1421 | * This state is good. Use it as the APST idle |
| 1419 | 1422 | * target for higher power states. |
| @@ -2438,6 +2441,10 @@ void nvme_kill_queues(struct nvme_ctrl *ctrl) · 1018 unmodified lines | ||
| 2438 | 2441 | struct nvme_ns *ns; |
| 2439 | 2442 | |
| 2440 | 2443 | mutex_lock(&ctrl->namespaces_mutex); |
| 2444 | + | |
| 2445 | + /* Forcibly start all queues to avoid having stuck requests */ | |
| 2446 | + blk_mq_start_hw_queues(ctrl->admin_q); | |
| 2447 | + | |
| 2441 | 2448 | list_for_each_entry(ns, &ctrl->namespaces, list) { |
| 2442 | 2449 | /* |
| 2443 | 2450 | * Revalidating a dead namespace sets capacity to 0. This will |
| @@ -1139,6 +1139,7 @@ nvme_fc_xmt_disconnect_assoc(struct nvme_fc_ctrl *ctrl) · 1138 unmodified lines | ||
| 1139 | 1139 | /* *********************** NVME Ctrl Routines **************************** */ |
| 1140 | 1140 | |
| 1141 | 1141 | static void __nvme_fc_final_op_cleanup(struct request *rq); |
| 1142 | +static void nvme_fc_error_recovery(struct nvme_fc_ctrl *ctrl, char *errmsg); | |
| 1142 | 1143 | |
| 1143 | 1144 | static int |
| 1144 | 1145 | nvme_fc_reinit_request(void *data, struct request *rq) |
| @@ -1265,7 +1266,7 @@ nvme_fc_fcpio_done(struct nvmefc_fcp_req *req) · 120 unmodified lines | ||
| 1265 | 1266 | struct nvme_command *sqe = &op->cmd_iu.sqe; |
| 1266 | 1267 | __le16 status = cpu_to_le16(NVME_SC_SUCCESS << 1); |
| 1267 | 1268 | union nvme_result result; |
| 1268 | − bool complete_rq; | |
| 1269 | + bool complete_rq, terminate_assoc = true; | |
| 1269 | 1270 | |
| 1270 | 1271 | /* |
| 1271 | 1272 | * WARNING: |
| @@ -1294,6 +1295,14 @@ nvme_fc_fcpio_done(struct nvmefc_fcp_req *req) · 22 unmodified lines | ||
| 1294 | 1295 | * fabricate a CQE, the following fields will not be set as they |
| 1295 | 1296 | * are not referenced: |
| 1296 | 1297 | * cqe.sqid, cqe.sqhd, cqe.command_id |
| 1298 | + * | |
| 1299 | + * Failure or error of an individual i/o, in a transport | |
| 1300 | + * detected fashion unrelated to the nvme completion status, | |
| 1301 | + * potentially cause the initiator and target sides to get out | |
| 1302 | + * of sync on SQ head/tail (aka outstanding io count allowed). | |
| 1303 | + * Per FC-NVME spec, failure of an individual command requires | |
| 1304 | + * the connection to be terminated, which in turn requires the | |
| 1305 | + * association to be terminated. | |
| 1297 | 1306 | */ |
| 1298 | 1307 | |
| 1299 | 1308 | fc_dma_sync_single_for_cpu(ctrl->lport->dev, op->fcp_req.rspdma, |
| @@ -1359,6 +1368,8 @@ nvme_fc_fcpio_done(struct nvmefc_fcp_req *req) · 59 unmodified lines | ||
| 1359 | 1368 | goto done; |
| 1360 | 1369 | } |
| 1361 | 1370 | |
| 1371 | + terminate_assoc = false; | |
| 1372 | + | |
| 1362 | 1373 | done: |
| 1363 | 1374 | if (op->flags & FCOP_FLAGS_AEN) { |
| 1364 | 1375 | nvme_complete_async_event(&queue->ctrl->ctrl, status, &result); |
| @@ -1366,7 +1377,7 @@ done: · 1 unmodified line | ||
| 1366 | 1377 | atomic_set(&op->state, FCPOP_STATE_IDLE); |
| 1367 | 1378 | op->flags = FCOP_FLAGS_AEN; /* clear other flags */ |
| 1368 | 1379 | nvme_fc_ctrl_put(ctrl); |
| 1369 | − return; | |
| 1380 | + goto check_error; | |
| 1370 | 1381 | } |
| 1371 | 1382 | |
| 1372 | 1383 | complete_rq = __nvme_fc_fcpop_chk_teardowns(ctrl, op); |
| @@ -1379,6 +1390,10 @@ done: · 6 unmodified lines | ||
| 1379 | 1390 | nvme_end_request(rq, status, result); |
| 1380 | 1391 | } else |
| 1381 | 1392 | __nvme_fc_final_op_cleanup(rq); |
| 1393 | + | |
| 1394 | +check_error: | |
| 1395 | + if (terminate_assoc) | |
| 1396 | + nvme_fc_error_recovery(ctrl, "transport detected io error"); | |
| 1382 | 1397 | } |
| 1383 | 1398 | |
| 1384 | 1399 | static int |
| @@ -2791,6 +2806,7 @@ nvme_fc_init_ctrl(struct device *dev, struct nvmf_ctrl_options *opts, · 1406 unmodified lines | ||
| 2791 | 2806 | ctrl->ctrl.opts = NULL; |
| 2792 | 2807 | /* initiate nvme ctrl ref counting teardown */ |
| 2793 | 2808 | nvme_uninit_ctrl(&ctrl->ctrl); |
| 2809 | + nvme_put_ctrl(&ctrl->ctrl); | |
| 2794 | 2810 | |
| 2795 | 2811 | /* as we're past the point where we transition to the ref |
| 2796 | 2812 | * counting teardown path, if we return a bad pointer here, |
| @@ -1367,7 +1367,7 @@ static bool nvme_should_reset(struct nvme_dev *dev, u32 csts) · 1366 unmodified lines | ||
| 1367 | 1367 | bool nssro = dev->subsystem && (csts & NVME_CSTS_NSSRO); |
| 1368 | 1368 | |
| 1369 | 1369 | /* If there is a reset ongoing, we shouldn't reset again. */ |
| 1370 | − if (work_busy(&dev->reset_work)) | |
| 1370 | + if (dev->ctrl.state == NVME_CTRL_RESETTING) | |
| 1371 | 1371 | return false; |
| 1372 | 1372 | |
| 1373 | 1373 | /* We shouldn't reset unless the controller is on fatal error state |
| @@ -1903,7 +1903,7 @@ static void nvme_reset_work(struct work_struct *work) · 529 unmodified lines | ||
| 1903 | 1903 | bool was_suspend = !!(dev->ctrl.ctrl_config & NVME_CC_SHN_NORMAL); |
| 1904 | 1904 | int result = -ENODEV; |
| 1905 | 1905 | |
| 1906 | − if (WARN_ON(dev->ctrl.state == NVME_CTRL_RESETTING)) | |
| 1906 | + if (WARN_ON(dev->ctrl.state != NVME_CTRL_RESETTING)) | |
| 1907 | 1907 | goto out; |
| 1908 | 1908 | |
| 1909 | 1909 | /* |
| @@ -1913,9 +1913,6 @@ static void nvme_reset_work(struct work_struct *work) · 3 unmodified lines | ||
| 1913 | 1913 | if (dev->ctrl.ctrl_config & NVME_CC_ENABLE) |
| 1914 | 1914 | nvme_dev_disable(dev, false); |
| 1915 | 1915 | |
| 1916 | − if (!nvme_change_ctrl_state(&dev->ctrl, NVME_CTRL_RESETTING)) | |
| 1917 | − goto out; | |
| 1918 | − | |
| 1919 | 1916 | result = nvme_pci_enable(dev); |
| 1920 | 1917 | if (result) |
| 1921 | 1918 | goto out; |
| @@ -2009,8 +2006,8 @@ static int nvme_reset(struct nvme_dev *dev) · 87 unmodified lines | ||
| 2009 | 2006 | { |
| 2010 | 2007 | if (!dev->ctrl.admin_q || blk_queue_dying(dev->ctrl.admin_q)) |
| 2011 | 2008 | return -ENODEV; |
| 2012 | − if (work_busy(&dev->reset_work)) | |
| 2013 | − return -ENODEV; | |
| 2009 | + if (!nvme_change_ctrl_state(&dev->ctrl, NVME_CTRL_RESETTING)) | |
| 2010 | + return -EBUSY; | |
| 2014 | 2011 | if (!queue_work(nvme_workq, &dev->reset_work)) |
| 2015 | 2012 | return -EBUSY; |
| 2016 | 2013 | return 0; |
| @@ -2136,6 +2133,7 @@ static int nvme_probe(struct pci_dev *pdev, const struct pci_device_id *id) · 119 unmodified lines | ||
| 2136 | 2133 | if (result) |
| 2137 | 2134 | goto release_pools; |
| 2138 | 2135 | |
| 2136 | + nvme_change_ctrl_state(&dev->ctrl, NVME_CTRL_RESETTING); | |
| 2139 | 2137 | dev_info(dev->ctrl.device, "pci function %s\n", dev_name(&pdev->dev)); |
| 2140 | 2138 | |
| 2141 | 2139 | queue_work(nvme_workq, &dev->reset_work); |
| @@ -2179,6 +2177,7 @@ static void nvme_remove(struct pci_dev *pdev) · 37 unmodified lines | ||
| 2179 | 2177 | |
| 2180 | 2178 | nvme_change_ctrl_state(&dev->ctrl, NVME_CTRL_DELETING); |
| 2181 | 2179 | |
| 2180 | + cancel_work_sync(&dev->reset_work); | |
| 2182 | 2181 | pci_set_drvdata(pdev, NULL); |
| 2183 | 2182 | |
| 2184 | 2183 | if (!pci_device_is_present(pdev)) { |
| @@ -753,28 +753,26 @@ static void nvme_rdma_reconnect_ctrl_work(struct work_struct *work) · 752 unmodified lines | ||
| 753 | 753 | if (ret) |
| 754 | 754 | goto requeue; |
| 755 | 755 | |
| 756 | − blk_mq_start_stopped_hw_queues(ctrl->ctrl.admin_q, true); | |
| 757 | − | |
| 758 | 756 | ret = nvmf_connect_admin_queue(&ctrl->ctrl); |
| 759 | 757 | if (ret) |
| 760 | − goto stop_admin_q; | |
| 758 | + goto requeue; | |
| 761 | 759 | |
| 762 | 760 | set_bit(NVME_RDMA_Q_LIVE, &ctrl->queues[0].flags); |
| 763 | 761 | |
| 764 | 762 | ret = nvme_enable_ctrl(&ctrl->ctrl, ctrl->cap); |
| 765 | 763 | if (ret) |
| 766 | − goto stop_admin_q; | |
| 764 | + goto requeue; | |
| 767 | 765 | |
| 768 | 766 | nvme_start_keep_alive(&ctrl->ctrl); |
| 769 | 767 | |
| 770 | 768 | if (ctrl->queue_count > 1) { |
| 771 | 769 | ret = nvme_rdma_init_io_queues(ctrl); |
| 772 | 770 | if (ret) |
| 773 | − goto stop_admin_q; | |
| 771 | + goto requeue; | |
| 774 | 772 | |
| 775 | 773 | ret = nvme_rdma_connect_io_queues(ctrl); |
| 776 | 774 | if (ret) |
| 777 | − goto stop_admin_q; | |
| 775 | + goto requeue; | |
| 778 | 776 | } |
| 779 | 777 | |
| 780 | 778 | changed = nvme_change_ctrl_state(&ctrl->ctrl, NVME_CTRL_LIVE); |
| @@ -782,7 +780,6 @@ static void nvme_rdma_reconnect_ctrl_work(struct work_struct *work) · 1 unmodified line | ||
| 782 | 780 | ctrl->ctrl.opts->nr_reconnects = 0; |
| 783 | 781 | |
| 784 | 782 | if (ctrl->queue_count > 1) { |
| 785 | − nvme_start_queues(&ctrl->ctrl); | |
| 786 | 783 | nvme_queue_scan(&ctrl->ctrl); |
| 787 | 784 | nvme_queue_async_events(&ctrl->ctrl); |
| 788 | 785 | } |
| @@ -791,8 +788,6 @@ static void nvme_rdma_reconnect_ctrl_work(struct work_struct *work) · 2 unmodified lines | ||
| 791 | 788 | |
| 792 | 789 | return; |
| 793 | 790 | |
| 794 | −stop_admin_q: | |
| 795 | − blk_mq_stop_hw_queues(ctrl->ctrl.admin_q); | |
| 796 | 791 | requeue: |
| 797 | 792 | dev_info(ctrl->ctrl.device, "Failed reconnect attempt %d\n", |
| 798 | 793 | ctrl->ctrl.opts->nr_reconnects); |
| @@ -823,6 +818,13 @@ static void nvme_rdma_error_recovery_work(struct work_struct *work) · 24 unmodified lines | ||
| 823 | 818 | blk_mq_tagset_busy_iter(&ctrl->admin_tag_set, |
| 824 | 819 | nvme_cancel_request, &ctrl->ctrl); |
| 825 | 820 | |
| 821 | + /* | |
| 822 | + * queues are not a live anymore, so restart the queues to fail fast | |
| 823 | + * new IO | |
| 824 | + */ | |
| 825 | + blk_mq_start_stopped_hw_queues(ctrl->ctrl.admin_q, true); | |
| 826 | + nvme_start_queues(&ctrl->ctrl); | |
| 827 | + | |
| 826 | 828 | nvme_rdma_reconnect_or_remove(ctrl); |
| 827 | 829 | } |
| 828 | 830 | |
| @@ -1433,7 +1435,7 @@ nvme_rdma_timeout(struct request *rq, bool reserved) · 604 unmodified lines | ||
| 1433 | 1435 | /* |
| 1434 | 1436 | * We cannot accept any other command until the Connect command has completed. |
| 1435 | 1437 | */ |
| 1436 | −static inline bool nvme_rdma_queue_is_ready(struct nvme_rdma_queue *queue, | |
| 1438 | +static inline int nvme_rdma_queue_is_ready(struct nvme_rdma_queue *queue, | |
| 1437 | 1439 | struct request *rq) |
| 1438 | 1440 | { |
| 1439 | 1441 | if (unlikely(!test_bit(NVME_RDMA_Q_LIVE, &queue->flags))) { |
| @@ -1441,11 +1443,22 @@ static inline bool nvme_rdma_queue_is_ready(struct nvme_rdma_queue *queue, · 1 unmodified line | ||
| 1441 | 1443 | |
| 1442 | 1444 | if (!blk_rq_is_passthrough(rq) || |
| 1443 | 1445 | cmd->common.opcode != nvme_fabrics_command || |
| 1444 | − cmd->fabrics.fctype != nvme_fabrics_type_connect) | |
| 1445 | − return false; | |
| 1446 | + cmd->fabrics.fctype != nvme_fabrics_type_connect) { | |
| 1447 | + /* | |
| 1448 | + * reconnecting state means transport disruption, which | |
| 1449 | + * can take a long time and even might fail permanently, | |
| 1450 | + * so we can't let incoming I/O be requeued forever. | |
| 1451 | + * fail it fast to allow upper layers a chance to | |
| 1452 | + * failover. | |
| 1453 | + */ | |
| 1454 | + if (queue->ctrl->ctrl.state == NVME_CTRL_RECONNECTING) | |
| 1455 | + return -EIO; | |
| 1456 | + else | |
| 1457 | + return -EAGAIN; | |
| 1458 | + } | |
| 1446 | 1459 | } |
| 1447 | 1460 | |
| 1448 | − return true; | |
| 1461 | + return 0; | |
| 1449 | 1462 | } |
| 1450 | 1463 | |
| 1451 | 1464 | static int nvme_rdma_queue_rq(struct blk_mq_hw_ctx *hctx, |
| @@ -1463,8 +1476,9 @@ static int nvme_rdma_queue_rq(struct blk_mq_hw_ctx *hctx, · 11 unmodified lines | ||
| 1463 | 1476 | |
| 1464 | 1477 | WARN_ON_ONCE(rq->tag < 0); |
| 1465 | 1478 | |
| 1466 | − if (!nvme_rdma_queue_is_ready(queue, rq)) | |
| 1467 | − return BLK_MQ_RQ_QUEUE_BUSY; | |
| 1479 | + ret = nvme_rdma_queue_is_ready(queue, rq); | |
| 1480 | + if (unlikely(ret)) | |
| 1481 | + goto err; | |
| 1468 | 1482 | |
| 1469 | 1483 | dev = queue->device->dev; |
| 1470 | 1484 | ib_dma_sync_single_for_cpu(dev, sqe->dma, |
| @@ -144,8 +144,8 @@ int of_dma_configure(struct device *dev, struct device_node *np) · 143 unmodified lines | ||
| 144 | 144 | coherent ? " " : " not "); |
| 145 | 145 | |
| 146 | 146 | iommu = of_iommu_configure(dev, np); |
| 147 | − if (IS_ERR(iommu)) | |
| 148 | − return PTR_ERR(iommu); | |
| 147 | + if (IS_ERR(iommu) && PTR_ERR(iommu) == -EPROBE_DEFER) | |
| 148 | + return -EPROBE_DEFER; | |
| 149 | 149 | |
| 150 | 150 | dev_dbg(dev, "device is%sbehind an iommu\n", |
| 151 | 151 | iommu ? " " : " not "); |
| @@ -896,7 +896,7 @@ int pci_read_config_byte(const struct pci_dev *dev, int where, u8 *val) · 895 unmodified lines | ||
| 896 | 896 | { |
| 897 | 897 | if (pci_dev_is_disconnected(dev)) { |
| 898 | 898 | *val = ~0; |
| 899 | − return -ENODEV; | |
| 899 | + return PCIBIOS_DEVICE_NOT_FOUND; | |
| 900 | 900 | } |
| 901 | 901 | return pci_bus_read_config_byte(dev->bus, dev->devfn, where, val); |
| 902 | 902 | } |
| @@ -906,7 +906,7 @@ int pci_read_config_word(const struct pci_dev *dev, int where, u16 *val) · 3 unmodified lines | ||
| 906 | 906 | { |
| 907 | 907 | if (pci_dev_is_disconnected(dev)) { |
| 908 | 908 | *val = ~0; |
| 909 | − return -ENODEV; | |
| 909 | + return PCIBIOS_DEVICE_NOT_FOUND; | |
| 910 | 910 | } |
| 911 | 911 | return pci_bus_read_config_word(dev->bus, dev->devfn, where, val); |
| 912 | 912 | } |
| @@ -917,7 +917,7 @@ int pci_read_config_dword(const struct pci_dev *dev, int where, · 4 unmodified lines | ||
| 917 | 917 | { |
| 918 | 918 | if (pci_dev_is_disconnected(dev)) { |
| 919 | 919 | *val = ~0; |
| 920 | − return -ENODEV; | |
| 920 | + return PCIBIOS_DEVICE_NOT_FOUND; | |
| 921 | 921 | } |
| 922 | 922 | return pci_bus_read_config_dword(dev->bus, dev->devfn, where, val); |
| 923 | 923 | } |
| @@ -926,7 +926,7 @@ EXPORT_SYMBOL(pci_read_config_dword); · 2 unmodified lines | ||
| 926 | 926 | int pci_write_config_byte(const struct pci_dev *dev, int where, u8 val) |
| 927 | 927 | { |
| 928 | 928 | if (pci_dev_is_disconnected(dev)) |
| 929 | − return -ENODEV; | |
| 929 | + return PCIBIOS_DEVICE_NOT_FOUND; | |
| 930 | 930 | return pci_bus_write_config_byte(dev->bus, dev->devfn, where, val); |
| 931 | 931 | } |
| 932 | 932 | EXPORT_SYMBOL(pci_write_config_byte); |
| @@ -934,7 +934,7 @@ EXPORT_SYMBOL(pci_write_config_byte); · 1 unmodified line | ||
| 934 | 934 | int pci_write_config_word(const struct pci_dev *dev, int where, u16 val) |
| 935 | 935 | { |
| 936 | 936 | if (pci_dev_is_disconnected(dev)) |
| 937 | − return -ENODEV; | |
| 937 | + return PCIBIOS_DEVICE_NOT_FOUND; | |
| 938 | 938 | return pci_bus_write_config_word(dev->bus, dev->devfn, where, val); |
| 939 | 939 | } |
| 940 | 940 | EXPORT_SYMBOL(pci_write_config_word); |
| @@ -943,7 +943,7 @@ int pci_write_config_dword(const struct pci_dev *dev, int where, · 2 unmodified lines | ||
| 943 | 943 | u32 val) |
| 944 | 944 | { |
| 945 | 945 | if (pci_dev_is_disconnected(dev)) |
| 946 | − return -ENODEV; | |
| 946 | + return PCIBIOS_DEVICE_NOT_FOUND; | |
| 947 | 947 | return pci_bus_write_config_dword(dev->bus, dev->devfn, where, val); |
| 948 | 948 | } |
| 949 | 949 | EXPORT_SYMBOL(pci_write_config_dword); |
| @@ -5,6 +5,7 @@ · 4 unmodified lines | ||
| 5 | 5 | config PCI_EPF_TEST |
| 6 | 6 | tristate "PCI Endpoint Test driver" |
| 7 | 7 | depends on PCI_ENDPOINT |
| 8 | + select CRC32 | |
| 8 | 9 | help |
| 9 | 10 | Enable this configuration option to enable the test driver |
| 10 | 11 | for PCI Endpoint. |
| @@ -29,6 +29,17 @@ static int arm_pmu_acpi_register_irq(int cpu) · 28 unmodified lines | ||
| 29 | 29 | return -EINVAL; |
| 30 | 30 | |
| 31 | 31 | gsi = gicc->performance_interrupt; |
| 32 | + | |
| 33 | + /* | |
| 34 | + * Per the ACPI spec, the MADT cannot describe a PMU that doesn't | |
| 35 | + * have an interrupt. QEMU advertises this by using a GSI of zero, | |
| 36 | + * which is not known to be valid on any hardware despite being | |
| 37 | + * valid per the spec. Take the pragmatic approach and reject a | |
| 38 | + * GSI of zero for now. | |
| 39 | + */ | |
| 40 | + if (!gsi) | |
| 41 | + return 0; | |
| 42 | + | |
| 32 | 43 | if (gicc->flags & ACPI_MADT_PERFORMANCE_IRQ_MODE) |
| 33 | 44 | trigger = ACPI_EDGE_SENSITIVE; |
| 34 | 45 | else |
| @@ -844,7 +844,7 @@ static int qcom_qmp_phy_vreg_init(struct device *dev) · 843 unmodified lines | ||
| 844 | 844 | int num = qmp->cfg->num_vregs; |
| 845 | 845 | int i; |
| 846 | 846 | |
| 847 | − qmp->vregs = devm_kcalloc(dev, num, sizeof(qmp->vregs), GFP_KERNEL); | |
| 847 | + qmp->vregs = devm_kcalloc(dev, num, sizeof(*qmp->vregs), GFP_KERNEL); | |
| 848 | 848 | if (!qmp->vregs) |
| 849 | 849 | return -ENOMEM; |
| 850 | 850 | |
| @@ -983,16 +983,16 @@ int qcom_qmp_phy_create(struct device *dev, struct device_node *np, int id) · 132 unmodified lines | ||
| 983 | 983 | * Resources are indexed as: tx -> 0; rx -> 1; pcs -> 2. |
| 984 | 984 | */ |
| 985 | 985 | qphy->tx = of_iomap(np, 0); |
| 986 | − if (IS_ERR(qphy->tx)) | |
| 987 | − return PTR_ERR(qphy->tx); | |
| 986 | + if (!qphy->tx) | |
| 987 | + return -ENOMEM; | |
| 988 | 988 | |
| 989 | 989 | qphy->rx = of_iomap(np, 1); |
| 990 | − if (IS_ERR(qphy->rx)) | |
| 991 | − return PTR_ERR(qphy->rx); | |
| 990 | + if (!qphy->rx) | |
| 991 | + return -ENOMEM; | |
| 992 | 992 | |
| 993 | 993 | qphy->pcs = of_iomap(np, 2); |
| 994 | − if (IS_ERR(qphy->pcs)) | |
| 995 | − return PTR_ERR(qphy->pcs); | |
| 994 | + if (!qphy->pcs) | |
| 995 | + return -ENOMEM; | |
| 996 | 996 | |
| 997 | 997 | /* |
| 998 | 998 | * Get PHY's Pipe clock, if any. USB3 and PCIe are PIPE3 |
| @@ -680,30 +680,16 @@ EXPORT_SYMBOL_GPL(pinctrl_generic_remove_group); · 679 unmodified lines | ||
| 680 | 680 | * pinctrl_generic_free_groups() - removes all pin groups |
| 681 | 681 | * @pctldev: pin controller device |
| 682 | 682 | * |
| 683 | − * Note that the caller must take care of locking. | |
| 683 | + * Note that the caller must take care of locking. The pinctrl groups | |
| 684 | + * are allocated with devm_kzalloc() so no need to free them here. | |
| 684 | 685 | */ |
| 685 | 686 | static void pinctrl_generic_free_groups(struct pinctrl_dev *pctldev) |
| 686 | 687 | { |
| 687 | 688 | struct radix_tree_iter iter; |
| 688 | − struct group_desc *group; | |
| 689 | − unsigned long *indices; | |
| 690 | 689 | void **slot; |
| 691 | − int i = 0; | |
| 692 | − | |
| 693 | − indices = devm_kzalloc(pctldev->dev, sizeof(*indices) * | |
| 694 | − pctldev->num_groups, GFP_KERNEL); | |
| 695 | − if (!indices) | |
| 696 | − return; | |
| 697 | 690 | |
| 698 | 691 | radix_tree_for_each_slot(slot, &pctldev->pin_group_tree, &iter, 0) |
| 699 | − indices[i++] = iter.index; | |
| 700 | − | |
| 701 | − for (i = 0; i < pctldev->num_groups; i++) { | |
| 702 | − group = radix_tree_lookup(&pctldev->pin_group_tree, | |
| 703 | − indices[i]); | |
| 704 | − radix_tree_delete(&pctldev->pin_group_tree, indices[i]); | |
| 705 | − devm_kfree(pctldev->dev, group); | |
| 706 | − } | |
| 692 | + radix_tree_delete(&pctldev->pin_group_tree, iter.index); | |
| 707 | 693 | |
| 708 | 694 | pctldev->num_groups = 0; |
| 709 | 695 | } |
| @@ -194,6 +194,16 @@ static int mxs_pinctrl_get_func_groups(struct pinctrl_dev *pctldev, · 193 unmodified lines | ||
| 194 | 194 | return 0; |
| 195 | 195 | } |
| 196 | 196 | |
| 197 | +static void mxs_pinctrl_rmwl(u32 value, u32 mask, u8 shift, void __iomem *reg) | |
| 198 | +{ | |
| 199 | + u32 tmp; | |
| 200 | + | |
| 201 | + tmp = readl(reg); | |
| 202 | + tmp &= ~(mask << shift); | |
| 203 | + tmp |= value << shift; | |
| 204 | + writel(tmp, reg); | |
| 205 | +} | |
| 206 | + | |
| 197 | 207 | static int mxs_pinctrl_set_mux(struct pinctrl_dev *pctldev, unsigned selector, |
| 198 | 208 | unsigned group) |
| 199 | 209 | { |
| @@ -211,8 +221,7 @@ static int mxs_pinctrl_set_mux(struct pinctrl_dev *pctldev, unsigned selector, · 11 unmodified lines | ||
| 211 | 221 | reg += bank * 0x20 + pin / 16 * 0x10; |
| 212 | 222 | shift = pin % 16 * 2; |
| 213 | 223 | |
| 214 | − writel(0x3 << shift, reg + CLR); | |
| 215 | − writel(g->muxsel[i] << shift, reg + SET); | |
| 224 | + mxs_pinctrl_rmwl(g->muxsel[i], 0x3, shift, reg); | |
| 216 | 225 | } |
| 217 | 226 | |
| 218 | 227 | return 0; |
| @@ -279,8 +288,7 @@ static int mxs_pinconf_group_set(struct pinctrl_dev *pctldev, · 60 unmodified lines | ||
| 279 | 288 | /* mA */ |
| 280 | 289 | if (config & MA_PRESENT) { |
| 281 | 290 | shift = pin % 8 * 4; |
| 282 | − writel(0x3 << shift, reg + CLR); | |
| 283 | − writel(ma << shift, reg + SET); | |
| 291 | + mxs_pinctrl_rmwl(ma, 0x3, shift, reg); | |
| 284 | 292 | } |
| 285 | 293 | |
| 286 | 294 | /* vol */ |
| @@ -1539,15 +1539,29 @@ static void chv_gpio_irq_handler(struct irq_desc *desc) · 1538 unmodified lines | ||
| 1539 | 1539 | * is not listed below. |
| 1540 | 1540 | */ |
| 1541 | 1541 | static const struct dmi_system_id chv_no_valid_mask[] = { |
| 1542 | + /* See https://bugzilla.kernel.org/show_bug.cgi?id=194945 */ | |
| 1542 | 1543 | { |
| 1543 | − /* See https://bugzilla.kernel.org/show_bug.cgi?id=194945 */ | |
| 1544 | − .ident = "Acer Chromebook (CYAN)", | |
| 1544 | + .ident = "Intel_Strago based Chromebooks (All models)", | |
| 1545 | 1545 | .matches = { |
| 1546 | 1546 | DMI_MATCH(DMI_SYS_VENDOR, "GOOGLE"), |
| 1547 | − DMI_MATCH(DMI_PRODUCT_NAME, "Edgar"), | |
| 1548 | − DMI_MATCH(DMI_BIOS_DATE, "05/21/2016"), | |
| 1547 | + DMI_MATCH(DMI_PRODUCT_FAMILY, "Intel_Strago"), | |
| 1549 | 1548 | }, |
| 1550 | − } | |
| 1549 | + }, | |
| 1550 | + { | |
| 1551 | + .ident = "Acer Chromebook R11 (Cyan)", | |
| 1552 | + .matches = { | |
| 1553 | + DMI_MATCH(DMI_SYS_VENDOR, "GOOGLE"), | |
| 1554 | + DMI_MATCH(DMI_PRODUCT_NAME, "Cyan"), | |
| 1555 | + }, | |
| 1556 | + }, | |
| 1557 | + { | |
| 1558 | + .ident = "Samsung Chromebook 3 (Celes)", | |
| 1559 | + .matches = { | |
| 1560 | + DMI_MATCH(DMI_SYS_VENDOR, "GOOGLE"), | |
| 1561 | + DMI_MATCH(DMI_PRODUCT_NAME, "Celes"), | |
| 1562 | + }, | |
| 1563 | + }, | |
| 1564 | + {} | |
| 1551 | 1565 | }; |
| 1552 | 1566 | |
| 1553 | 1567 | static int chv_gpio_probe(struct chv_pinctrl *pctrl, int irq) |
| @@ -35,7 +35,6 @@ static const struct pin_config_item conf_items[] = { · 34 unmodified lines | ||
| 35 | 35 | PCONFDUMP(PIN_CONFIG_BIAS_PULL_PIN_DEFAULT, |
| 36 | 36 | "input bias pull to pin specific state", NULL, false), |
| 37 | 37 | PCONFDUMP(PIN_CONFIG_BIAS_PULL_UP, "input bias pull up", NULL, false), |
| 38 | − PCONFDUMP(PIN_CONFIG_BIDIRECTIONAL, "bi-directional pin operations", NULL, false), | |
| 39 | 38 | PCONFDUMP(PIN_CONFIG_DRIVE_OPEN_DRAIN, "output drive open drain", NULL, false), |
| 40 | 39 | PCONFDUMP(PIN_CONFIG_DRIVE_OPEN_SOURCE, "output drive open source", NULL, false), |
| 41 | 40 | PCONFDUMP(PIN_CONFIG_DRIVE_PUSH_PULL, "output drive push pull", NULL, false), |
| @@ -161,7 +160,6 @@ static const struct pinconf_generic_params dt_params[] = { · 119 unmodified lines | ||
| 161 | 160 | { "bias-pull-up", PIN_CONFIG_BIAS_PULL_UP, 1 }, |
| 162 | 161 | { "bias-pull-pin-default", PIN_CONFIG_BIAS_PULL_PIN_DEFAULT, 1 }, |
| 163 | 162 | { "bias-pull-down", PIN_CONFIG_BIAS_PULL_DOWN, 1 }, |
| 164 | − { "bi-directional", PIN_CONFIG_BIDIRECTIONAL, 1 }, | |
| 165 | 163 | { "drive-open-drain", PIN_CONFIG_DRIVE_OPEN_DRAIN, 0 }, |
| 166 | 164 | { "drive-open-source", PIN_CONFIG_DRIVE_OPEN_SOURCE, 0 }, |
| 167 | 165 | { "drive-push-pull", PIN_CONFIG_DRIVE_PUSH_PULL, 0 }, |
| @@ -174,7 +172,6 @@ static const struct pinconf_generic_params dt_params[] = { · 6 unmodified lines | ||
| 174 | 172 | { "input-schmitt-enable", PIN_CONFIG_INPUT_SCHMITT_ENABLE, 1 }, |
| 175 | 173 | { "low-power-disable", PIN_CONFIG_LOW_POWER_MODE, 0 }, |
| 176 | 174 | { "low-power-enable", PIN_CONFIG_LOW_POWER_MODE, 1 }, |
| 177 | − { "output-enable", PIN_CONFIG_OUTPUT, 1, }, | |
| 178 | 175 | { "output-high", PIN_CONFIG_OUTPUT, 1, }, |
| 179 | 176 | { "output-low", PIN_CONFIG_OUTPUT, 0, }, |
| 180 | 177 | { "power-source", PIN_CONFIG_POWER_SOURCE, 0 }, |
| @@ -826,30 +826,17 @@ EXPORT_SYMBOL_GPL(pinmux_generic_remove_function); · 825 unmodified lines | ||
| 826 | 826 | * pinmux_generic_free_functions() - removes all functions |
| 827 | 827 | * @pctldev: pin controller device |
| 828 | 828 | * |
| 829 | − * Note that the caller must take care of locking. | |
| 829 | + * Note that the caller must take care of locking. The pinctrl | |
| 830 | + * functions are allocated with devm_kzalloc() so no need to free | |
| 831 | + * them here. | |
| 830 | 832 | */ |
| 831 | 833 | void pinmux_generic_free_functions(struct pinctrl_dev *pctldev) |
| 832 | 834 | { |
| 833 | 835 | struct radix_tree_iter iter; |
| 834 | − struct function_desc *function; | |
| 835 | − unsigned long *indices; | |
| 836 | 836 | void **slot; |
| 837 | − int i = 0; | |
| 838 | − | |
| 839 | − indices = devm_kzalloc(pctldev->dev, sizeof(*indices) * | |
| 840 | − pctldev->num_functions, GFP_KERNEL); | |
| 841 | − if (!indices) | |
| 842 | − return; | |
| 843 | 837 | |
| 844 | 838 | radix_tree_for_each_slot(slot, &pctldev->pin_function_tree, &iter, 0) |
| 845 | − indices[i++] = iter.index; | |
| 846 | − | |
| 847 | − for (i = 0; i < pctldev->num_functions; i++) { | |
| 848 | − function = radix_tree_lookup(&pctldev->pin_function_tree, | |
| 849 | − indices[i]); | |
| 850 | − radix_tree_delete(&pctldev->pin_function_tree, indices[i]); | |
| 851 | − devm_kfree(pctldev->dev, function); | |
| 852 | − } | |
| 839 | + radix_tree_delete(&pctldev->pin_function_tree, iter.index); | |
| 853 | 840 | |
| 854 | 841 | pctldev->num_functions = 0; |
| 855 | 842 | } |
| @@ -394,7 +394,7 @@ static const struct sunxi_desc_pin sun8i_a83t_pins[] = { · 393 unmodified lines | ||
| 394 | 394 | SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 18), |
| 395 | 395 | SUNXI_FUNCTION(0x0, "gpio_in"), |
| 396 | 396 | SUNXI_FUNCTION(0x1, "gpio_out"), |
| 397 | − SUNXI_FUNCTION(0x3, "owa")), /* DOUT */ | |
| 397 | + SUNXI_FUNCTION(0x3, "spdif")), /* DOUT */ | |
| 398 | 398 | SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 19), |
| 399 | 399 | SUNXI_FUNCTION(0x0, "gpio_in"), |
| 400 | 400 | SUNXI_FUNCTION(0x1, "gpio_out")), |
| @@ -704,7 +704,7 @@ static int get_free_pipe_id_locked(struct goldfish_pipe_dev *dev) · 703 unmodified lines | ||
| 704 | 704 | /* Reallocate the array */ |
| 705 | 705 | u32 new_capacity = 2 * dev->pipes_capacity; |
| 706 | 706 | struct goldfish_pipe **pipes = |
| 707 | − kcalloc(new_capacity, sizeof(*pipes), GFP_KERNEL); | |
| 707 | + kcalloc(new_capacity, sizeof(*pipes), GFP_ATOMIC); | |
| 708 | 708 | if (!pipes) |
| 709 | 709 | return -ENOMEM; |
| 710 | 710 | memcpy(pipes, dev->pipes, sizeof(*pipes) * dev->pipes_capacity); |
| @@ -97,11 +97,9 @@ · 96 unmodified lines | ||
| 97 | 97 | } \ |
| 98 | 98 | } |
| 99 | 99 | |
| 100 | −#ifdef CONFIG_PM_SLEEP | |
| 101 | 100 | static u8 suspend_prep_ok; |
| 102 | 101 | static u32 suspend_shlw_ctr_temp, suspend_deep_ctr_temp; |
| 103 | 102 | static u64 suspend_shlw_res_temp, suspend_deep_res_temp; |
| 104 | −#endif | |
| 105 | 103 | |
| 106 | 104 | struct telemetry_susp_stats { |
| 107 | 105 | u32 shlw_swake_ctr; |
| @@ -807,7 +805,6 @@ static const struct file_operations telem_ioss_trc_verb_ops = { · 699 unmodified lines | ||
| 807 | 805 | .release = single_release, |
| 808 | 806 | }; |
| 809 | 807 | |
| 810 | −#ifdef CONFIG_PM_SLEEP | |
| 811 | 808 | static int pm_suspend_prep_cb(void) |
| 812 | 809 | { |
| 813 | 810 | struct telemetry_evtlog evtlog[TELEM_MAX_OS_ALLOCATED_EVENTS]; |
| @@ -937,7 +934,6 @@ static int pm_notification(struct notifier_block *this, · 123 unmodified lines | ||
| 937 | 934 | static struct notifier_block pm_notifier = { |
| 938 | 935 | .notifier_call = pm_notification, |
| 939 | 936 | }; |
| 940 | −#endif /* CONFIG_PM_SLEEP */ | |
| 941 | 937 | |
| 942 | 938 | static int __init telemetry_debugfs_init(void) |
| 943 | 939 | { |
| @@ -960,14 +956,13 @@ static int __init telemetry_debugfs_init(void) · 16 unmodified lines | ||
| 960 | 956 | if (err < 0) |
| 961 | 957 | return -EINVAL; |
| 962 | 958 | |
| 963 | − | |
| 964 | −#ifdef CONFIG_PM_SLEEP | |
| 965 | 959 | register_pm_notifier(&pm_notifier); |
| 966 | −#endif /* CONFIG_PM_SLEEP */ | |
| 967 | 960 | |
| 968 | 961 | debugfs_conf->telemetry_dbg_dir = debugfs_create_dir("telemetry", NULL); |
| 969 | − if (!debugfs_conf->telemetry_dbg_dir) | |
| 970 | − return -ENOMEM; | |
| 962 | + if (!debugfs_conf->telemetry_dbg_dir) { | |
| 963 | + err = -ENOMEM; | |
| 964 | + goto out_pm; | |
| 965 | + } | |
| 971 | 966 | |
| 972 | 967 | f = debugfs_create_file("pss_info", S_IFREG | S_IRUGO, |
| 973 | 968 | debugfs_conf->telemetry_dbg_dir, NULL, |
| @@ -1014,6 +1009,8 @@ static int __init telemetry_debugfs_init(void) · 40 unmodified lines | ||
| 1014 | 1009 | out: |
| 1015 | 1010 | debugfs_remove_recursive(debugfs_conf->telemetry_dbg_dir); |
| 1016 | 1011 | debugfs_conf->telemetry_dbg_dir = NULL; |
| 1012 | +out_pm: | |
| 1013 | + unregister_pm_notifier(&pm_notifier); | |
| 1017 | 1014 | |
| 1018 | 1015 | return err; |
| 1019 | 1016 | } |
| @@ -1022,6 +1019,7 @@ static void __exit telemetry_debugfs_exit(void) · 2 unmodified lines | ||
| 1022 | 1019 | { |
| 1023 | 1020 | debugfs_remove_recursive(debugfs_conf->telemetry_dbg_dir); |
| 1024 | 1021 | debugfs_conf->telemetry_dbg_dir = NULL; |
| 1022 | + unregister_pm_notifier(&pm_notifier); | |
| 1025 | 1023 | } |
| 1026 | 1024 | |
| 1027 | 1025 | late_initcall(telemetry_debugfs_init); |
| @@ -155,3 +155,5 @@ static int __init hi6220_reset_init(void) · 154 unmodified lines | ||
| 155 | 155 | } |
| 156 | 156 | |
| 157 | 157 | postcore_initcall(hi6220_reset_init); |
| 158 | + | |
| 159 | +MODULE_LICENSE("GPL v2"); | |
| @@ -70,14 +70,14 @@ static ssize_t name_show(struct kobject *kobj, struct device *dev, char *buf) · 69 unmodified lines | ||
| 70 | 70 | { |
| 71 | 71 | return sprintf(buf, "I/O subchannel (Non-QDIO)\n"); |
| 72 | 72 | } |
| 73 | −MDEV_TYPE_ATTR_RO(name); | |
| 73 | +static MDEV_TYPE_ATTR_RO(name); | |
| 74 | 74 | |
| 75 | 75 | static ssize_t device_api_show(struct kobject *kobj, struct device *dev, |
| 76 | 76 | char *buf) |
| 77 | 77 | { |
| 78 | 78 | return sprintf(buf, "%s\n", VFIO_DEVICE_API_CCW_STRING); |
| 79 | 79 | } |
| 80 | −MDEV_TYPE_ATTR_RO(device_api); | |
| 80 | +static MDEV_TYPE_ATTR_RO(device_api); | |
| 81 | 81 | |
| 82 | 82 | static ssize_t available_instances_show(struct kobject *kobj, |
| 83 | 83 | struct device *dev, char *buf) |
| @@ -86,7 +86,7 @@ static ssize_t available_instances_show(struct kobject *kobj, · 2 unmodified lines | ||
| 86 | 86 | |
| 87 | 87 | return sprintf(buf, "%d\n", atomic_read(&private->avail)); |
| 88 | 88 | } |
| 89 | −MDEV_TYPE_ATTR_RO(available_instances); | |
| 89 | +static MDEV_TYPE_ATTR_RO(available_instances); | |
| 90 | 90 | |
| 91 | 91 | static struct attribute *mdev_types_attrs[] = { |
| 92 | 92 | &mdev_type_attr_name.attr, |
| @@ -100,7 +100,7 @@ static struct attribute_group mdev_type_group = { · 7 unmodified lines | ||
| 100 | 100 | .attrs = mdev_types_attrs, |
| 101 | 101 | }; |
| 102 | 102 | |
| 103 | −struct attribute_group *mdev_type_groups[] = { | |
| 103 | +static struct attribute_group *mdev_type_groups[] = { | |
| 104 | 104 | &mdev_type_group, |
| 105 | 105 | NULL, |
| 106 | 106 | }; |
| @@ -152,7 +152,7 @@ static int vfio_ccw_mdev_open(struct mdev_device *mdev) · 45 unmodified lines | ||
| 152 | 152 | &events, &private->nb); |
| 153 | 153 | } |
| 154 | 154 | |
| 155 | −void vfio_ccw_mdev_release(struct mdev_device *mdev) | |
| 155 | +static void vfio_ccw_mdev_release(struct mdev_device *mdev) | |
| 156 | 156 | { |
| 157 | 157 | struct vfio_ccw_private *private = |
| 158 | 158 | dev_get_drvdata(mdev_parent_dev(mdev)); |
| @@ -233,7 +233,7 @@ static int vfio_ccw_mdev_get_region_info(struct vfio_region_info *info, · 74 unmodified lines | ||
| 233 | 233 | } |
| 234 | 234 | } |
| 235 | 235 | |
| 236 | −int vfio_ccw_mdev_get_irq_info(struct vfio_irq_info *info) | |
| 236 | +static int vfio_ccw_mdev_get_irq_info(struct vfio_irq_info *info) | |
| 237 | 237 | { |
| 238 | 238 | if (info->index != VFIO_CCW_IO_IRQ_INDEX) |
| 239 | 239 | return -EINVAL; |
| @@ -668,10 +668,28 @@ static int ap_device_probe(struct device *dev) · 667 unmodified lines | ||
| 668 | 668 | struct ap_driver *ap_drv = to_ap_drv(dev->driver); |
| 669 | 669 | int rc; |
| 670 | 670 | |
| 671 | + /* Add queue/card to list of active queues/cards */ | |
| 672 | + spin_lock_bh(&ap_list_lock); | |
| 673 | + if (is_card_dev(dev)) | |
| 674 | + list_add(&to_ap_card(dev)->list, &ap_card_list); | |
| 675 | + else | |
| 676 | + list_add(&to_ap_queue(dev)->list, | |
| 677 | + &to_ap_queue(dev)->card->queues); | |
| 678 | + spin_unlock_bh(&ap_list_lock); | |
| 679 | + | |
| 671 | 680 | ap_dev->drv = ap_drv; |
| 672 | 681 | rc = ap_drv->probe ? ap_drv->probe(ap_dev) : -ENODEV; |
| 673 | − if (rc) | |
| 682 | + | |
| 683 | + if (rc) { | |
| 684 | + spin_lock_bh(&ap_list_lock); | |
| 685 | + if (is_card_dev(dev)) | |
| 686 | + list_del_init(&to_ap_card(dev)->list); | |
| 687 | + else | |
| 688 | + list_del_init(&to_ap_queue(dev)->list); | |
| 689 | + spin_unlock_bh(&ap_list_lock); | |
| 674 | 690 | ap_dev->drv = NULL; |
| 691 | + } | |
| 692 | + | |
| 675 | 693 | return rc; |
| 676 | 694 | } |
| 677 | 695 | |
| @@ -680,14 +698,17 @@ static int ap_device_remove(struct device *dev) · 2 unmodified lines | ||
| 680 | 698 | struct ap_device *ap_dev = to_ap_dev(dev); |
| 681 | 699 | struct ap_driver *ap_drv = ap_dev->drv; |
| 682 | 700 | |
| 701 | + if (ap_drv->remove) | |
| 702 | + ap_drv->remove(ap_dev); | |
| 703 | + | |
| 704 | + /* Remove queue/card from list of active queues/cards */ | |
| 683 | 705 | spin_lock_bh(&ap_list_lock); |
| 684 | 706 | if (is_card_dev(dev)) |
| 685 | 707 | list_del_init(&to_ap_card(dev)->list); |
| 686 | 708 | else |
| 687 | 709 | list_del_init(&to_ap_queue(dev)->list); |
| 688 | 710 | spin_unlock_bh(&ap_list_lock); |
| 689 | − if (ap_drv->remove) | |
| 690 | − ap_drv->remove(ap_dev); | |
| 711 | + | |
| 691 | 712 | return 0; |
| 692 | 713 | } |
| 693 | 714 | |
| @@ -1056,10 +1077,6 @@ static void ap_scan_bus(struct work_struct *unused) · 362 unmodified lines | ||
| 1056 | 1077 | } |
| 1057 | 1078 | /* get it and thus adjust reference counter */ |
| 1058 | 1079 | get_device(&ac->ap_dev.device); |
| 1059 | − /* Add card device to card list */ | |
| 1060 | − spin_lock_bh(&ap_list_lock); | |
| 1061 | − list_add(&ac->list, &ap_card_list); | |
| 1062 | − spin_unlock_bh(&ap_list_lock); | |
| 1063 | 1080 | } |
| 1064 | 1081 | /* now create the new queue device */ |
| 1065 | 1082 | aq = ap_queue_create(qid, type); |
| @@ -1070,10 +1087,6 @@ static void ap_scan_bus(struct work_struct *unused) · 4 unmodified lines | ||
| 1070 | 1087 | aq->ap_dev.device.parent = &ac->ap_dev.device; |
| 1071 | 1088 | dev_set_name(&aq->ap_dev.device, |
| 1072 | 1089 | "%02x.%04x", id, dom); |
| 1073 | − /* Add queue device to card queue list */ | |
| 1074 | − spin_lock_bh(&ap_list_lock); | |
| 1075 | − list_add(&aq->list, &ac->queues); | |
| 1076 | − spin_unlock_bh(&ap_list_lock); | |
| 1077 | 1090 | /* Start with a device reset */ |
| 1078 | 1091 | spin_lock_bh(&aq->lock); |
| 1079 | 1092 | ap_wait(ap_sm_event(aq, AP_EVENT_POLL)); |
| @@ -1081,9 +1094,6 @@ static void ap_scan_bus(struct work_struct *unused) · 1 unmodified line | ||
| 1081 | 1094 | /* Register device */ |
| 1082 | 1095 | rc = device_register(&aq->ap_dev.device); |
| 1083 | 1096 | if (rc) { |
| 1084 | − spin_lock_bh(&ap_list_lock); | |
| 1085 | − list_del_init(&aq->list); | |
| 1086 | − spin_unlock_bh(&ap_list_lock); | |
| 1087 | 1097 | put_device(&aq->ap_dev.device); |
| 1088 | 1098 | continue; |
| 1089 | 1099 | } |
| @@ -160,7 +160,14 @@ static struct device_type ap_card_type = { · 159 unmodified lines | ||
| 160 | 160 | |
| 161 | 161 | static void ap_card_device_release(struct device *dev) |
| 162 | 162 | { |
| 163 | − kfree(to_ap_card(dev)); | |
| 163 | + struct ap_card *ac = to_ap_card(dev); | |
| 164 | + | |
| 165 | + if (!list_empty(&ac->list)) { | |
| 166 | + spin_lock_bh(&ap_list_lock); | |
| 167 | + list_del_init(&ac->list); | |
| 168 | + spin_unlock_bh(&ap_list_lock); | |
| 169 | + } | |
| 170 | + kfree(ac); | |
| 164 | 171 | } |
| 165 | 172 | |
| 166 | 173 | struct ap_card *ap_card_create(int id, int queue_depth, int device_type, |
| @@ -584,7 +584,14 @@ static struct device_type ap_queue_type = { · 583 unmodified lines | ||
| 584 | 584 | |
| 585 | 585 | static void ap_queue_device_release(struct device *dev) |
| 586 | 586 | { |
| 587 | − kfree(to_ap_queue(dev)); | |
| 587 | + struct ap_queue *aq = to_ap_queue(dev); | |
| 588 | + | |
| 589 | + if (!list_empty(&aq->list)) { | |
| 590 | + spin_lock_bh(&ap_list_lock); | |
| 591 | + list_del_init(&aq->list); | |
| 592 | + spin_unlock_bh(&ap_list_lock); | |
| 593 | + } | |
| 594 | + kfree(aq); | |
| 588 | 595 | } |
| 589 | 596 | |
| 590 | 597 | struct ap_queue *ap_queue_create(ap_qid_t qid, int device_type) |
| @@ -1954,7 +1954,6 @@ static void netiucv_free_netdevice(struct net_device *dev) · 1953 unmodified lines | ||
| 1954 | 1954 | privptr->conn = NULL; privptr->fsm = NULL; |
| 1955 | 1955 | /* privptr gets freed by free_netdev() */ |
| 1956 | 1956 | } |
| 1957 | − free_netdev(dev); | |
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