ACAlgea Caophy: phy-rockchip-samsung-hdptx: Fix PHY PLL output 50.25MHz errorf9475051 year agoHistory

Name	Last commit message	Last commit date
..
Kconfig
Makefile
phy-rockchip-dp.c
phy-rockchip-dphy-rx0.c
phy-rockchip-emmc.c
phy-rockchip-inno-csidphy.c
phy-rockchip-inno-dsidphy.c
phy-rockchip-inno-hdmi.c
phy-rockchip-inno-usb2.c
phy-rockchip-naneng-combphy.c
phy-rockchip-pcie.c
phy-rockchip-samsung-dcphy.c
phy-rockchip-samsung-hdptx.c
phy-rockchip-snps-pcie3.c
phy-rockchip-typec.c
phy-rockchip-usb.c
phy-rockchip-usbdp.c