/*  * Ralink RT2860 driver * * Written without any documentation but Damien Bergaminis * OpenBSD ral(4) driver sources. Requires ralink firmware * to be present in /lib/firmware/ral-rt2860 on attach. */ #include "u.h"#include "../port/lib.h"#include "mem.h"#include "dat.h"#include "fns.h"#include "io.h"#include "../port/error.h"#include "../port/netif.h" #include "etherif.h"#include "wifi.h" /* for consistency */typedef signed char s8int; enum {	/* PCI registers */	PciCfg = 0x0000,		PciCfgUsb = (1 << 17),		PciCfgPci = (1 << 16),	PciEectrl = 0x0004,		EectrlC = (1 << 0),		EectrlS = (1 << 1),		EectrlD = (1 << 2),		EectrlShiftD = 2,		EectrlQ = (1 << 3),		EectrlShiftQ = 3,	PciMcuctrl = 0x0008,	PciSysctrl = 0x000c,	PcieJtag = 0x0010, 	Rt3090AuxCtrl = 0x010c, 	Rt3070Opt14 = 0x0114,}; enum {	/* SCH/DMA registers */	IntStatus = 0x0200,		/* flags for registers IntStatus/IntMask */		TxCoherent = (1 << 17),		RxCoherent = (1 << 16),		MacInt4 = (1 << 15),		MacInt3 = (1 << 14),		MacInt2 = (1 << 13),		MacInt1 = (1 << 12),		MacInt0 = (1 << 11),		TxRxCoherent = (1 << 10),		McuCmdInt = (1 << 9),		TxDoneInt5 = (1 << 8),		TxDoneInt4 = (1 << 7),		TxDoneInt3 = (1 << 6),		TxDoneInt2 = (1 << 5),		TxDoneInt1 = (1 << 4),		TxDoneInt0 = (1 << 3),		RxDoneInt = (1 << 2),		TxDlyInt = (1 << 1),		RxDlyInt = (1 << 0),	IntMask = 0x0204,	WpdmaGloCfg = 0x0208,		HdrSegLenShift = 8,		BigEndian = (1 << 7),		TxWbDdone = (1 << 6),		WpdmaBtSizeShift = 4,		WpdmaBtSize16 = 0,		WpdmaBtSize32 = 1,		WpdmaBtSize64 = 2,		WpdmaBtSize128 = 3,		RxDmaBusy = (1 << 3),		RxDmaEn = (1 << 2),		TxDmaBusy = (1 << 1),		TxDmaEn = (1 << 0),	WpdmaRstIdx = 0x020c,	DelayIntCfg = 0x0210,		TxdlyIntEn = (1 << 31),		TxmaxPintShift = 24,		TxmaxPtimeShift = 16,		RxdlyIntEn = (1 << 15),		RxmaxPintShift = 8,		RxmaxPtimeShift = 0,	WmmAifsnCfg = 0x0214,	WmmCwminCfg = 0x0218,	WmmCwmaxCfg = 0x021c,	WmmTxop0Cfg = 0x0220,	WmmTxop1Cfg = 0x0224,	GpioCtrl = 0x0228,		GpioDShift = 8,		GpioOShift = 0,	McuCmdReg = 0x022c,#define TxBasePtr(qid) (0x0230 + (qid) * 16)#define TxMaxCnt(qid) (0x0234 + (qid) * 16)#define TxCtxIdx(qid) (0x0238 + (qid) * 16)#define TxDtxIdx(qid) (0x023c + (qid) * 16)	RxBasePtr = 0x0290,	RxMaxCnt = 0x0294,	RxCalcIdx = 0x0298,	FsDrxIdx = 0x029c,	UsbDmaCfg = 0x02a0 /* RT2870 only */,		UsbTxBusy = (1 << 31),		UsbRxBusy = (1 << 30),		UsbEpoutVldShift = 24,		UsbTxEn = (1 << 23),		UsbRxEn = (1 << 22),		UsbRxAggEn = (1 << 21),		UsbTxopHalt = (1 << 20),		UsbTxClear = (1 << 19),		UsbPhyWdEn = (1 << 16),		UsbPhyManRst = (1 << 15),#define UsbRxAggLmt(x) ((x) << 8) /* in unit of 1KB */#define UsbRxAggTo(x) ((x) & 0xff) /* in unit of 33ns */	UsCycCnt = 0x02a4,		TestEn = (1 << 24),		TestSelShift = 16,		BtModeEn = (1 << 8),		UsCycCntShift = 0,}; enum {	/* PBF registers */	SysCtrl = 0x0400,		HstPmSel = (1 << 16),		CapMode = (1 << 14),		PmeOen = (1 << 13),		Clkselect = (1 << 12),		PbfClkEn = (1 << 11),		MacClkEn = (1 << 10),		DmaClkEn = (1 << 9),		McuReady = (1 << 7),		AsyReset = (1 << 4),		PbfReset = (1 << 3),		MacReset = (1 << 2),		DmaReset = (1 << 1),		McuReset = (1 << 0),	HostCmd = 0x0404,		McuCmdSleep = 0x30,		McuCmdWakeup = 0x31,		McuCmdLeds = 0x50,			LedRadio = (1 << 13),			LedLink2ghz = (1 << 14),			LedLink5ghz = (1 << 15),		McuCmdLedRssi = 0x51,		McuCmdLed1 = 0x52,		McuCmdLed2 = 0x53,		McuCmdLed3 = 0x54,		McuCmdRfreset = 0x72,		McuCmdAntsel = 0x73,		McuCmdBbp = 0x80,		McuCmdPslevel = 0x83,	PbfCfg = 0x0408,		Tx1qNumShift = 21,		Tx2qNumShift = 16,		Null0Mode = (1 << 15),		Null1Mode = (1 << 14),		RxDropMode = (1 << 13),		Tx0qManual = (1 << 12),		Tx1qManual = (1 << 11),		Tx2qManual = (1 << 10),		Rx0qManual = (1 << 9),		HccaEn = (1 << 8),		Tx0qEn = (1 << 4),		Tx1qEn = (1 << 3),		Tx2qEn = (1 << 2),		Rx0qEn = (1 << 1),	MaxPcnt = 0x040c,	BufCtrl = 0x0410,#define WriteTxq(qid) (1 << (11 - (qid)))		Null0Kick = (1 << 7),		Null1Kick = (1 << 6),		BufReset = (1 << 5),#define ReadTxq(qid) = (1 << (3 - (qid))		ReadRx0q = (1 << 0),	McuIntSta = 0x0414,		/* flags for registers McuIntSta/McuIntEna */		McuMacInt8 = (1 << 24),		McuMacInt7 = (1 << 23),		McuMacInt6 = (1 << 22),		McuMacInt4 = (1 << 20),		McuMacInt3 = (1 << 19),		McuMacInt2 = (1 << 18),		McuMacInt1 = (1 << 17),		McuMacInt0 = (1 << 16),		Dtx0Int = (1 << 11),		Dtx1Int = (1 << 10),		Dtx2Int = (1 << 9),		Drx0Int = (1 << 8),		HcmdInt = (1 << 7),		N0txInt = (1 << 6),		N1txInt = (1 << 5),		BcntxInt = (1 << 4),		Mtx0Int = (1 << 3),		Mtx1Int = (1 << 2),		Mtx2Int = (1 << 1),		Mrx0Int = (1 << 0),	McuIntEna = 0x0418,#define TxqIo(qid) (0x041c + (qid) * 4)	Rx0qIo = 0x0424,	BcnOffset0 = 0x042c,	BcnOffset1 = 0x0430,	TxrxqSta = 0x0434,	TxrxqPcnt = 0x0438,		Rx0qPcntMask = 0xff000000,		Tx2qPcntMask = 0x00ff0000,		Tx1qPcntMask = 0x0000ff00,		Tx0qPcntMask = 0x000000ff,	PbfDbg = 0x043c,	CapCtrl = 0x0440,		CapAdcFeq = (1 << 31),		CapStart = (1 << 30),		ManTrig = (1 << 29),		TrigOffsetShift = 16,		StartAddrShift = 0,}; enum {	/* RT3070 registers */	Rt3070RfCsrCfg = 0x0500,		Rt3070RfKick = (1 << 17),		Rt3070RfWrite = (1 << 16),	Rt3070EfuseCtrl = 0x0580,		Rt3070SelEfuse = (1 << 31),		Rt3070EfsromKick = (1 << 30),		Rt3070EfsromAinMask = 0x03ff0000,		Rt3070EfsromAinShift = 16,		Rt3070EfsromModeMask = 0x000000c0,		Rt3070EfuseAoutMask = 0x0000003f,	Rt3070EfuseData0 = 0x0590,	Rt3070EfuseData1 = 0x0594,	Rt3070EfuseData2 = 0x0598,	Rt3070EfuseData3 = 0x059c,	Rt3090OscCtrl = 0x05a4,	Rt3070LdoCfg0 = 0x05d4,	Rt3070GpioSwitch = 0x05dc,}; enum {	/* MAC registers */	AsicVerId = 0x1000,	MacSysCtrl = 0x1004,		RxTsEn = (1 << 7),		WlanHaltEn = (1 << 6),		PbfLoopEn = (1 << 5),		ContTxTest = (1 << 4),		MacRxEn = (1 << 3),		MacTxEn = (1 << 2),		BbpHrst = (1 << 1),		MacSrst = (1 << 0),	MacAddrDw0 = 0x1008,	MacAddrDw1 = 0x100c,	MacBssidDw0 = 0x1010,	MacBssidDw1 = 0x1014,		MultiBcnNumShift = 18,		MultiBssidModeShift = 16,	MaxLenCfg = 0x1018,		MinMpduLenShift = 16,		MaxPsduLenShift = 12,		MaxPsduLen8k = 0,		MaxPsduLen16k = 1,		MaxPsduLen32k = 2,		MaxPsduLen64k = 3,		MaxMpduLenShift = 0,	BbpCsrCfg = 0x101c,		BbpRwParallel = (1 << 19),		BbpParDur1125 = (1 << 18),		BbpCsrKick = (1 << 17),		BbpCsrRead = (1 << 16),		BbpAddrShift = 8,		BbpDataShift = 0,	RfCsrCfg0 = 0x1020,		RfRegCtrl = (1 << 31),		RfLeSel1 = (1 << 30),		RfLeStby = (1 << 29),		RfRegWidthShift = 24,		RfReg0Shift = 0,	RfCsrCfg1 = 0x1024,		RfDur5 = (1 << 24),		RfReg1Shift = 0,	RfCsrCfg2 = 0x1028,	LedCfg = 0x102c,		LedPol = (1 << 30),		YLedModeShift = 28,		GLedModeShift = 26,		RLedModeShift = 24,		LedModeOff = 0,		LedModeBlinkTx = 1,		LedModeSlowBlink = 2,		LedModeOn = 3,		SlowBlkTimeShift = 16,		LedOffTimeShift = 8,		LedOnTimeShift = 0,}; enum {	/* undocumented registers */	Debug = 0x10f4,}; enum {	/* MAC Timing control registers */	XifsTimeCfg = 0x1100,		BbRxendEn = (1 << 29),		EifsTimeShift = 20,		OfdmXifsTimeShift = 16,		OfdmSifsTimeShift = 8,		CckSifsTimeShift = 0,	BkoffSlotCfg = 0x1104,		CcDelayTimeShift = 8,		SlotTime = 0,	NavTimeCfg = 0x1108,		NavUpd = (1 << 31),		NavUpdValShift = 16,		NavClrEn = (1 << 15),		NavTimerShift = 0,	ChTimeCfg = 0x110c,		EifsAsChBusy = (1 << 4),		NavAsChBusy = (1 << 3),		RxAsChBusy = (1 << 2),		TxAsChBusy = (1 << 1),		ChStaTimerEn = (1 << 0),	PbfLifeTimer = 0x1110,	BcnTimeCfg = 0x1114,		TsfInsCompShift = 24,		BcnTxEn = (1 << 20),		TbttTimerEn = (1 << 19),		TsfSyncModeShift = 17,		TsfSyncModeDis = 0,		TsfSyncModeSta = 1,		TsfSyncModeIbss = 2,		TsfSyncModeHostap = 3,		TsfTimerEn = (1 << 16),		BcnIntvalShift = 0,	TbttSyncCfg = 0x1118,		BcnCwminShift = 20,		BcnAifsnShift = 16,		BcnExpWinShift = 8,		TbttAdjustShift = 0,	TsfTimerDw0 = 0x111c,	TsfTimerDw1 = 0x1120,	TbttTimer = 0x1124,	IntTimerCfg = 0x1128,		GpTimerShift = 16,		PreTbttTimerShift = 0,	IntTimerEn = 0x112c,		GpTimerEn = (1 << 1),		PreTbttIntEn = (1 << 0),	ChIdleTime = 0x1130,}; enum {	/* MAC Power Save configuration registers */	MacStatusReg = 0x1200,		RxStatusBusy = (1 << 1),		TxStatusBusy = (1 << 0),	PwrPinCfg = 0x1204,		IoAddaPd = (1 << 3),		IoPllPd = (1 << 2),		IoRaPe = (1 << 1),		IoRfPe = (1 << 0),	AutoWakeupCfg = 0x1208,		AutoWakeupEn = (1 << 15),		SleepTbttNumShift = 8,		WakeupLeadTimeShift = 0,}; enum {	/* MAC TX configuration registers */#define EdcaAcCfg(aci) (0x1300 + (aci) * 4)	EdcaTidAcMap = 0x1310,#define TxPwrCfg(ridx) (0x1314 + (ridx) * 4)	TxPinCfg = 0x1328,		Rt3593LnaPeG2Pol = (1 << 31),		Rt3593LnaPeA2Pol = (1 << 30),		Rt3593LnaPeG2En = (1 << 29),		Rt3593LnaPeA2En = (1 << 28),		Rt3593LnaPe2En = (Rt3593LnaPeA2En | Rt3593LnaPeG2En),		Rt3593PaPeG2Pol = (1 << 27),		Rt3593PaPeA2Pol = (1 << 26),		Rt3593PaPeG2En = (1 << 25),		Rt3593PaPeA2En = (1 << 24),		TrswPol = (1 << 19),		TrswEn = (1 << 18),		RftrPol = (1 << 17),		RftrEn = (1 << 16),		LnaPeG1Pol = (1 << 15),		LnaPeA1Pol = (1 << 14),		LnaPeG0Pol = (1 << 13),		LnaPeA0Pol = (1 << 12),		LnaPeG1En = (1 << 11),		LnaPeA1En = (1 << 10),		LnaPe1En = (LnaPeA1En | LnaPeG1En),		LnaPeG0En = (1 << 9),		LnaPeA0En = (1 << 8),		LnaPe0En = (LnaPeA0En | LnaPeG0En),		PaPeG1Pol = (1 << 7),		PaPeA1Pol = (1 << 6),		PaPeG0Pol = (1 << 5),		PaPeA0Pol = (1 << 4),		PaPeG1En = (1 << 3),		PaPeA1En = (1 << 2),		PaPeG0En = (1 << 1),		PaPeA0En = (1 << 0),	TxBandCfg = 0x132c,		Tx5gBandSelN = (1 << 2),		Tx5gBandSelP = (1 << 1),		TxBandSel = (1 << 0),	TxSwCfg0 = 0x1330,		DlyRftrEnShift = 24,		DlyTrswEnShift = 16,		DlyPapeEnShift = 8,		DlyTxpeEnShift = 0,	TxSwCfg1 = 0x1334,		DlyRftrDisShift = 16,		DlyTrswDisShift = 8,		DlyPapeDisShift = 0,	TxSwCfg2 = 0x1338,		DlyLnaEnShift = 24,		DlyLnaDisShift = 16,		DlyDacEnShift = 8,		DlyDacDisShift = 0,	TxopThresCfg = 0x133c,		TxopRemThresShift = 24,		CfEndThresShift = 16,		RdgInThres = 8,		RdgOutThres = 0,	TxopCtrlCfg = 0x1340,		ExtCwMinShift = 16,		ExtCcaDlyShift = 8,		ExtCcaEn = (1 << 7),		LsigTxopEn = (1 << 6),		TxopTrunEnMimops = (1 << 4),		TxopTrunEnTxop = (1 << 3),		TxopTrunEnRate = (1 << 2),		TxopTrunEnAc = (1 << 1),		TxopTrunEnTimeout = (1 << 0),	TxRtsCfg = 0x1344,		RtsFbkEn = (1 << 24),		RtsThresShift = 8,		RtsRtyLimitShift = 0,	TxTimeoutCfg = 0x1348,		TxopTimeoutShift = 16,		RxAckTimeoutShift = 8,		MpduLifeTimeShift = 4,	TxRtyCfg = 0x134c,		TxAutofbEn = (1 << 30),		AggRtyModeTimer = (1 << 29),		NagRtyModeTimer = (1 << 28),		LongRtyThresShift = 16,		LongRtyLimitShift = 8,		ShortRtyLimitShift = 0,	TxLinkCfg = 0x1350,		RemoteMfsShift = 24,		RemoteMfbShift = 16,		TxCfackEn = (1 << 12),		TxRdgEn = (1 << 11),		TxMrqEn = (1 << 10),		RemoteUmfsEn = (1 << 9),		TxMfbEn = (1 << 8),		RemoteMfbLtShift = 0,	HtFbkCfg0 = 0x1354,	HtFbkCfg1 = 0x1358,	LgFbkCfg0 = 0x135c,	LgFbkCfg1 = 0x1360,	CckProtCfg = 0x1364,		/* possible flags for registers *ProtCfg */		RtsthEn = (1 << 26),		TxopAllowGf40 = (1 << 25),		TxopAllowGf20 = (1 << 24),		TxopAllowMm40 = (1 << 23),		TxopAllowMm20 = (1 << 22),		TxopAllowOfdm = (1 << 21),		TxopAllowCck = (1 << 20),		TxopAllowAll = (0x3f << 20),		ProtNavShort = (1 << 18),		ProtNavLong = (2 << 18),		ProtCtrlRtsCts = (1 << 16),		ProtCtrlCts = (2 << 16),	OfdmProtCfg = 0x1368,	Mm20ProtCfg = 0x136c,	Mm40ProtCfg = 0x1370,	Gf20ProtCfg = 0x1374,	Gf40ProtCfg = 0x1378,	ExpCtsTime = 0x137c,		/* possible flags for registers EXP_{CTS,ACK}_TIME */		ExpOfdmTimeShift = 16,		ExpCckTimeShift = 0,	ExpAckTime = 0x1380,}; enum {	/* MAC RX configuration registers */	RxFiltrCfg = 0x1400,		DropCtrlRsv = (1 << 16),		DropBar = (1 << 15),

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