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/*  * This file is part of the UCB release of Plan 9. It is subject to the license * terms in the LICENSE file found in the top-level directory of this * distribution and at http://akaros.cs.berkeley.edu/files/Plan9License. No * part of the UCB release of Plan 9, including this file, may be copied, * modified, propagated, or distributed except according to the terms contained * in the LICENSE file. */ #include <u.h>#include <libc.h>#include <bio.h>#include <mach.h>#define Extern extern#include "power.h" void	add(ulong);void	addc(ulong);void	adde(ulong);void	addme(ulong);void	addze(ulong);void	and(ulong);void	andc(ulong);void	cmp(ulong);void	cmpl(ulong);void	cntlzw(ulong);void	dcbf(ulong);void	dcbi(ulong);void	dcbst(ulong);void	dcbt(ulong);void	dcbtst(ulong);void	dcbz(ulong);void	divw(ulong);void	divwu(ulong);void	eciwx(ulong);void	ecowx(ulong);void	eieio(ulong);void	eqv(ulong);void	extsb(ulong);void	extsh(ulong);void	icbi(ulong);void	lbzx(ulong);void	lfdx(ulong);void	lfsx(ulong);void	lhax(ulong);void	lhbrx(ulong);void	lhzx(ulong);void	lswi(ulong);void	lswx(ulong);void	lwarx(ulong);void	lwbrx(ulong);void	lwzx(ulong);void	mcrxr(ulong);void	mfcr(ulong);void	mfmsr(ulong);void	mfpmr(ulong);void	mfspr(ulong);void	mfsr(ulong);void	mfsrin(ulong);void	mftb(ulong);void	mftbu(ulong);void	mspr(ulong);void	mtcrf(ulong);void	mtmsr(ulong);void	mtpmr(ulong);void	mtspr(ulong);void	mtsr(ulong);void	mtsrin(ulong);void	mttb(ulong);void	mttbu(ulong);void	mulhw(ulong);void	mulhwu(ulong);void	mullw(ulong);void	nand(ulong);void	neg(ulong);void	nor(ulong);void	or(ulong);void	orc(ulong);void	slbia(ulong);void	slbia(ulong);void	slw(ulong);void	sraw(ulong);void	srawi(ulong);void	srw(ulong);void	stbx(ulong);void	stfdx(ulong);void	stfiwx(ulong);void	stfsx(ulong);void	sthbrx(ulong);void	sthx(ulong);void	stswi(ulong);void	stswx(ulong);void	stwbrx(ulong);void	stwcx(ulong);void	stwx(ulong);void	subf(ulong);void	subfc(ulong);void	subfe(ulong);void	subfme(ulong);void	subfze(ulong);void	sync(ulong);void	tlbie(ulong);void	tw(ulong);void	xor(ulong); Inst	op31[] = {[0] {cmp, "cmp", Iarith},[4] {tw, "tw", Iarith},[8] {subfc, "subfc", Iarith},[10] {addc, "addc", Iarith},[11] {mulhwu, "mulhwu", Iarith},[19] {mfcr, "mfcr", Iarith},[20] {lwarx, "lwarx", Iload},[23] {lwzx, "lwzx", Iload},[24] {slw, "slw", Ilog},[26] {cntlzw, "cntlzw", Ilog},[28] {and, "and", Ilog},[32] {cmpl, "cmpl", Iarith},[40] {subf, "subf", Iarith},[54] {dcbst, "dcbst", Icontrol},[55] {lwzx, "lwzux", Iload},[60] {andc, "andc", Ilog},[75] {mulhw, "mulhw", Iarith},[83] {0, "mfmsr", Icontrol},[86] {dcbf, "dcbf", Icontrol},[87] {lbzx, "lbzx", Iload},[104] {neg, "neg", Iarith},[115] {0, "mfpmr", Iarith},[119] {lbzx, "lbzux", Iload},[124] {nor, "nor", Iarith},[136] {subfe, "subfe", Iarith},[138] {adde, "adde", Iarith},[144] {mtcrf, "mtcrf", Ireg},[146] {0, "mtmsr", Icontrol},[150] {stwcx, "stwcx.", Istore},[151] {stwx, "stwx", Istore},[178] {0, "mtpmr", Icontrol},[183] {stwx, "stwux", Istore},[200] {subfze, "subfze", Iarith},[202] {addze, "addze", Iarith},[210] {0, "mtsr", Ireg},[215] {stbx, "stbx", Istore},[232] {subfme, "subfme", Iarith},[234] {addme, "addme", Iarith},[235] {mullw, "mullw", Iarith},[242] {0, "mtsrin", Ireg},[246] {dcbtst, "dcbtst", Icontrol},[247] {stbx, "stbux", Istore},[266] {add, "add", Iarith},[275] {0, "mftb", Icontrol},[278] {dcbt, "dcbt", Icontrol},[279] {lhzx, "lhzx", Iload},[284] {eqv, "eqv", Ilog},[306] {0, "tlbie", Icontrol},[307] {0, "mftbu", Icontrol},[310] {0, "eciwx", Icontrol},[311] {lhzx, "lhzux", Iload},[316] {xor, "xor", Ilog},[339] {mspr, "mfspr", Ireg},[343] {lhax, "lhax", Iload},[375] {lhax, "lhaux", Iload},[403] {0, "mttb", Icontrol},[407] {sthx, "sthx", Istore},[412] {orc, "orc", Ilog},[434] {0, "slbia", Iarith},[435] {0, "mttbu", Icontrol},[438] {0, "ecowx", Icontrol},[439] {sthx, "sthux", Istore},[444] {or, "or", Ilog},[459] {divwu, "divwu", Iarith},[467] {mspr, "mtspr", Ireg},[470] {0, "dcbi", Icontrol},[476] {nand, "nand", Ilog},[491] {divw, "divw", Iarith},[498] {0, "slbia", Icontrol},[512] {mcrxr, "mcrxr", Ireg},[533] {lswx, "lswx", Iload},[534] {lwbrx, "lwbrx", Iload},[535] {lfsx, "lfsx", Ifloat},[536] {srw, "srw", Ilog},[567] {lfsx, "lfsux", Ifloat},[595] {0, "mfsr", Iarith},[597] {lswi, "lswi", Iarith},[598] {sync, "sync", Iarith},[599] {lfdx, "lfdx", Ifloat},[631] {lfdx, "lfdux", Ifloat},[659] {0, "mfsrin", Ireg},[661] {stswx, "stswx", Istore},[662] {stwbrx, "stwbrx", Istore},[663] {stfsx, "stfsx", Istore},[695] {stfsx, "stfsux", Istore},[725] {stswi, "stswi", Istore},[727] {stfdx, "stfdx", Istore},[759] {stfdx, "stfdux", Istore},[790] {lhbrx, "lhbrx", Iload},[792] {sraw, "sraw", Ilog},[824] {srawi, "srawi", Ilog},[854] {0, "eieio", Icontrol},[918] {sthbrx, "sthbrx", Istore},[922] {extsh, "extsh", Iarith},[954] {extsb, "extsb", Iarith},[982] {icbi, "icbi", Icontrol},[983] {unimp, "stfiwx", Istore},[1014] {dcbz, "dcbz", Icontrol},}; Inset	ops31 = {op31, nelem(op31)}; voidmspr(ulong ir){	int rd, ra, rb;	ulong *d;	char *n;	char buf[20]; 	getarrr(ir);	switch((rb<<5) | ra) {	case 0:		undef(ir);	/* was mq */		return;	case 1:		d = &reg.xer; n = "xer";		break;	case 268:	case 284:		d = &reg.tbl; n = "tbl";		break;	case 269:	case 285:		d = &reg.tbu; n = "tbu";		break;	case 22:		d = &reg.dec; n = "dec";		break;	case 8:		d = &reg.lr; n = "lr";		break;	case 9:		d = &reg.ctr; n = "ctr";		break;	default:		d = 0; sprint(n = buf, "spr%d", rd);		break;	}	if(getxo(ir) == 339) {		if(trace)			itrace("%s\tr%d,%s", ci->name, rd, n);		if(d != nil)			reg.r[rd] = *d;	} else {		if(trace)			itrace("%s\t%s,r%d", ci->name, n, rd);		if(d != nil)			*d = reg.r[rd];	}} static voidsetcr(int d, long r){	int c; 	c = 0;	if(reg.xer & XER_SO)		c |= 1;	if(r == 0)		c |= 2;	else if(r > 0)		c |= 4;	else		c |= 8;	reg.cr = (reg.cr & ~mkCR(d, 0xF)) | mkCR(d, c);} voidaddi(ulong ir){	int rd, ra;	long imm; 	getairr(ir);	if(trace) {		if(ra)			itrace("%s\tr%d,r%d,$0x%lux", ci->name, rd, ra, imm);		else			itrace("li\tr%d,$0x%lux", rd, imm);	}	if(ra)		imm += reg.r[ra];	reg.r[rd] = imm;} voidaddis(ulong ir){	int rd, ra;	long imm; 	getairr(ir);	if(trace) {		if(ra)			itrace("%s\tr%d,r%d,$0x%lux", ci->name, rd, ra, imm);		else			itrace("lis\tr%d,$0x%lux", rd, imm);	}	imm <<= 16;	if(ra)		imm += reg.r[ra];	reg.r[rd] = imm;} voidand(ulong ir){	int rs, ra, rb; 	getlrrr(ir);	reg.r[ra] = reg.r[rs] & reg.r[rb];	if(trace)		itrace("%s%s\tr%d,r%d,r%d", ci->name, ir&1?".":"", ra, rs, rb);	if(ir & 1)		setcr(0, reg.r[ra]);} voidandc(ulong ir){	int rs, ra, rb; 	getlrrr(ir);	reg.r[ra] = reg.r[rs] & ~reg.r[rb];	if(trace)		itrace("%s%s\tr%d,r%d,r%d", ci->name, ir&1?".":"", ra, rs, rb);	if(ir & 1)		setcr(0, reg.r[ra]);} voidandicc(ulong ir){	int rs, ra;	ulong imm; 	getlirr(ir);	reg.r[ra] = reg.r[rs] & imm;	if(trace)		itrace("%s\tr%d,r%d,$0x%lx", ci->name, ra, rs, imm);	setcr(0, reg.r[ra]);} voidandiscc(ulong ir){	int rs, ra;	ulong imm; 	getlirr(ir);	reg.r[ra] = reg.r[rs] & (imm<<16);	if(trace)		itrace("%s\tr%d,r%d,$0x%lx", ci->name, ra, rs, imm);	setcr(0, reg.r[ra]);} voidcmpli(ulong ir){	int rd, ra;	ulong c;	ulong imm, v; 	getairr(ir);	imm &= 0xFFFF;	if(rd & 3)		undef(ir);	rd >>= 2;	v = reg.r[ra];	c = 0;	if(reg.xer & XER_SO)		c |= CRSO;	if(v < imm)		c |= CRLT;	else if(v == imm)		c |= CREQ;	else		c |= CRGT;	c >>= 28;	reg.cr = (reg.cr & ~mkCR(rd, 0xF)) | mkCR(rd, c);	if(trace)		itrace("%s\tcrf%d,r%d,0x%lux [cr=#%x]", ci->name, rd, ra, imm, c);} voidcmp(ulong ir){	int rd, ra, rb;	ulong c;	long va, vb; 	getarrr(ir);	if(rd & 3)		undef(ir);	rd >>= 2;	c = 0;	if(reg.xer & XER_SO)		c |= CRSO;	va = reg.r[ra];	vb = reg.r[rb];	if(va < vb)		c |= CRLT;	else if(va == vb)		c |= CREQ;	else		c |= CRGT;	c >>= 28;	reg.cr = (reg.cr & ~mkCR(rd, 0xF)) | mkCR(rd, c);	if(trace)		itrace("%s\tcrf%d,r%d,r%d [cr=#%x]", ci->name, rd, ra, rb, c);} voidcmpi(ulong ir){	int rd, ra;	ulong c;	long imm, v; 	getairr(ir);	if(rd & 3)		undef(ir);	rd >>= 2;	v = reg.r[ra];	c = 0;	if(reg.xer & XER_SO)		c |= CRSO;	if(v < imm)		c |= CRLT;	else if(v == imm)		c |= CREQ;	else		c |= CRGT;	c >>= 28;	reg.cr = (reg.cr & ~mkCR(rd, 0xF)) | mkCR(rd, c);	if(trace)		itrace("%s\tcrf%d,r%d,0x%lux [cr=#%x]", ci->name, rd, ra, imm, c);} voidcmpl(ulong ir){	int rd, ra, rb;	ulong c;	ulong va, vb; 	getarrr(ir);	if(rd & 3)		undef(ir);	rd >>= 2;	c = 0;	if(reg.xer & XER_SO)		c |= CRSO;	va = reg.r[ra];	vb = reg.r[rb];	if(va < vb)		c |= CRLT;	else if(va == vb)		c |= CREQ;	else		c |= CRGT;	c >>= 28;	reg.cr = (reg.cr & ~mkCR(rd, 0xF)) | mkCR(rd, c);	if(trace)		itrace("%s\tcrf%d,r%d,r%d [cr=#%x]", ci->name, rd, ra, rb, c);} voidcntlzw(ulong ir){	int rs, ra, rb, n; 	getlrrr(ir);	if(rb)		undef(ir);	for(n=0; n<32 && (reg.r[rs] & (1L<<(31-n))) == 0; n++)		;	reg.r[ra] = n;	if(trace)		itrace("%s%s\tr%d,r%d", ci->name, ir&1?".":"", ra, rs);	if(ir & 1)		setcr(0, reg.r[ra]);} voideqv(ulong ir){	int rs, ra, rb; 	getlrrr(ir);	reg.r[ra] = ~(reg.r[rs] ^ reg.r[rb]);	if(trace)

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