\ From: John Hayes S1I\ Subject: core.fr\ Date: Mon, 27 Nov 95 13:10 \ (C) 1995 JOHNS HOPKINS UNIVERSITY / APPLIED PHYSICS LABORATORY\ MAY BE DISTRIBUTED FREELY AS LONG AS THIS COPYRIGHT NOTICE REMAINS.\ VERSION 1.2\ THIS PROGRAM TESTS THE CORE WORDS OF AN ANS FORTH SYSTEM.\ THE PROGRAM ASSUMES A TWO'S COMPLEMENT IMPLEMENTATION WHERE\ THE RANGE OF SIGNED NUMBERS IS -2^(N-1) ... 2^(N-1)-1 AND\ THE RANGE OF UNSIGNED NUMBERS IS 0 ... 2^(N)-1.\ I HAVEN'T FIGURED OUT HOW TO TEST KEY, QUIT, ABORT, OR ABORT"...\ I ALSO HAVEN'T THOUGHT OF A WAY TO TEST ENVIRONMENT?... \ Load test tools - Phil Burkinclude? testing tester.fth TESTING CORE WORDSHEX \ ------------------------------------------------------------------------TESTING BASIC ASSUMPTIONS { -> }                  \ START WITH CLEAN SLATE( TEST IF ANY BITS ARE SET; ANSWER IN BASE 1 ){ : BITSSET? IF 0 0 ELSE 0 THEN ; -> }{  0 BITSSET? -> 0 }        ( ZERO IS ALL BITS CLEAR ){  1 BITSSET? -> 0 0 }      ( OTHER NUMBER HAVE AT LEAST ONE BIT ){ -1 BITSSET? -> 0 0 } \ ------------------------------------------------------------------------TESTING BOOLEANS: INVERT AND OR XOR { 0 0 AND -> 0 }{ 0 1 AND -> 0 }{ 1 0 AND -> 0 }{ 1 1 AND -> 1 } { 0 INVERT 1 AND -> 1 }{ 1 INVERT 1 AND -> 0 } 0    CONSTANT 0S0 INVERT CONSTANT 1S { 0S INVERT -> 1S }{ 1S INVERT -> 0S } { 0S 0S AND -> 0S }{ 0S 1S AND -> 0S }{ 1S 0S AND -> 0S }{ 1S 1S AND -> 1S } { 0S 0S OR -> 0S }{ 0S 1S OR -> 1S }{ 1S 0S OR -> 1S }{ 1S 1S OR -> 1S } { 0S 0S XOR -> 0S }{ 0S 1S XOR -> 1S }{ 1S 0S XOR -> 1S }{ 1S 1S XOR -> 0S } \ ------------------------------------------------------------------------TESTING 2* 2/ LSHIFT RSHIFT ( WE TRUST 1S, INVERT, AND BITSSET?; WE WILL CONFIRM RSHIFT LATER )1S 1 RSHIFT INVERT CONSTANT MSB{ MSB BITSSET? -> 0 0 } { 0S 2* -> 0S }{ 1 2* -> 2 }{ 4000 2* -> 8000 }{ 1S 2* 1 XOR -> 1S }{ MSB 2* -> 0S } { 0S 2/ -> 0S }{ 1 2/ -> 0 }{ 4000 2/ -> 2000 }{ 1S 2/ -> 1S }             \ MSB PROPOGATED{ 1S 1 XOR 2/ -> 1S }{ MSB 2/ MSB AND -> MSB } { 1 0 LSHIFT -> 1 }{ 1 1 LSHIFT -> 2 }{ 1 2 LSHIFT -> 4 }{ 1 F LSHIFT -> 8000 }          \ BIGGEST GUARANTEED SHIFT{ 1S 1 LSHIFT 1 XOR -> 1S }{ MSB 1 LSHIFT -> 0 } { 1 0 RSHIFT -> 1 }{ 1 1 RSHIFT -> 0 }{ 2 1 RSHIFT -> 1 }{ 4 2 RSHIFT -> 1 }{ 8000 F RSHIFT -> 1 }          \ BIGGEST{ MSB 1 RSHIFT MSB AND -> 0 }       \ RSHIFT ZERO FILLS MSBS{ MSB 1 RSHIFT 2* -> MSB } \ ------------------------------------------------------------------------TESTING COMPARISONS: 0= = 0< < > U< MIN MAX0 INVERT            CONSTANT MAX-UINT0 INVERT 1 RSHIFT       CONSTANT MAX-INT0 INVERT 1 RSHIFT INVERT    CONSTANT MIN-INT0 INVERT 1 RSHIFT       CONSTANT MID-UINT0 INVERT 1 RSHIFT INVERT    CONSTANT MID-UINT+1 0S CONSTANT <FALSE>1S CONSTANT <TRUE> { 0 0= -> <TRUE> }{ 1 0= -> <FALSE> }{ 2 0= -> <FALSE> }{ -1 0= -> <FALSE> }{ MAX-UINT 0= -> <FALSE> }{ MIN-INT 0= -> <FALSE> }{ MAX-INT 0= -> <FALSE> } { 0 0 = -> <TRUE> }{ 1 1 = -> <TRUE> }{ -1 -1 = -> <TRUE> }{ 1 0 = -> <FALSE> }{ -1 0 = -> <FALSE> }{ 0 1 = -> <FALSE> }{ 0 -1 = -> <FALSE> } { 0 0< -> <FALSE> }{ -1 0< -> <TRUE> }{ MIN-INT 0< -> <TRUE> }{ 1 0< -> <FALSE> }{ MAX-INT 0< -> <FALSE> } { 0 1 < -> <TRUE> }{ 1 2 < -> <TRUE> }{ -1 0 < -> <TRUE> }{ -1 1 < -> <TRUE> }{ MIN-INT 0 < -> <TRUE> }{ MIN-INT MAX-INT < -> <TRUE> }{ 0 MAX-INT < -> <TRUE> }{ 0 0 < -> <FALSE> }{ 1 1 < -> <FALSE> }{ 1 0 < -> <FALSE> }{ 2 1 < -> <FALSE> }{ 0 -1 < -> <FALSE> }{ 1 -1 < -> <FALSE> }{ 0 MIN-INT < -> <FALSE> }{ MAX-INT MIN-INT < -> <FALSE> }{ MAX-INT 0 < -> <FALSE> } { 0 1 > -> <FALSE> }{ 1 2 > -> <FALSE> }{ -1 0 > -> <FALSE> }{ -1 1 > -> <FALSE> }{ MIN-INT 0 > -> <FALSE> }{ MIN-INT MAX-INT > -> <FALSE> }{ 0 MAX-INT > -> <FALSE> }{ 0 0 > -> <FALSE> }{ 1 1 > -> <FALSE> }{ 1 0 > -> <TRUE> }{ 2 1 > -> <TRUE> }{ 0 -1 > -> <TRUE> }{ 1 -1 > -> <TRUE> }{ 0 MIN-INT > -> <TRUE> }{ MAX-INT MIN-INT > -> <TRUE> }{ MAX-INT 0 > -> <TRUE> } { 0 1 U< -> <TRUE> }{ 1 2 U< -> <TRUE> }{ 0 MID-UINT U< -> <TRUE> }{ 0 MAX-UINT U< -> <TRUE> }{ MID-UINT MAX-UINT U< -> <TRUE> }{ 0 0 U< -> <FALSE> }{ 1 1 U< -> <FALSE> }{ 1 0 U< -> <FALSE> }{ 2 1 U< -> <FALSE> }{ MID-UINT 0 U< -> <FALSE> }{ MAX-UINT 0 U< -> <FALSE> }{ MAX-UINT MID-UINT U< -> <FALSE> } { 0 1 MIN -> 0 }{ 1 2 MIN -> 1 }{ -1 0 MIN -> -1 }{ -1 1 MIN -> -1 }{ MIN-INT 0 MIN -> MIN-INT }{ MIN-INT MAX-INT MIN -> MIN-INT }{ 0 MAX-INT MIN -> 0 }{ 0 0 MIN -> 0 }{ 1 1 MIN -> 1 }{ 1 0 MIN -> 0 }{ 2 1 MIN -> 1 }{ 0 -1 MIN -> -1 }{ 1 -1 MIN -> -1 }{ 0 MIN-INT MIN -> MIN-INT }{ MAX-INT MIN-INT MIN -> MIN-INT }{ MAX-INT 0 MIN -> 0 } { 0 1 MAX -> 1 }{ 1 2 MAX -> 2 }{ -1 0 MAX -> 0 }{ -1 1 MAX -> 1 }{ MIN-INT 0 MAX -> 0 }{ MIN-INT MAX-INT MAX -> MAX-INT }{ 0 MAX-INT MAX -> MAX-INT }{ 0 0 MAX -> 0 }{ 1 1 MAX -> 1 }{ 1 0 MAX -> 1 }{ 2 1 MAX -> 2 }{ 0 -1 MAX -> 0 }{ 1 -1 MAX -> 1 }{ 0 MIN-INT MAX -> 0 }{ MAX-INT MIN-INT MAX -> MAX-INT }{ MAX-INT 0 MAX -> MAX-INT } \ ------------------------------------------------------------------------TESTING STACK OPS: 2DROP 2DUP 2OVER 2SWAP ?DUP DEPTH DROP DUP OVER ROT SWAP { 1 2 2DROP -> }{ 1 2 2DUP -> 1 2 1 2 }{ 1 2 3 4 2OVER -> 1 2 3 4 1 2 }{ 1 2 3 4 2SWAP -> 3 4 1 2 }{ 0 ?DUP -> 0 }{ 1 ?DUP -> 1 1 }{ -1 ?DUP -> -1 -1 }{ DEPTH -> 0 }{ 0 DEPTH -> 0 1 }{ 0 1 DEPTH -> 0 1 2 }{ 0 DROP -> }{ 1 2 DROP -> 1 }{ 1 DUP -> 1 1 }{ 1 2 OVER -> 1 2 1 }{ 1 2 3 ROT -> 2 3 1 }{ 1 2 SWAP -> 2 1 } \ ------------------------------------------------------------------------TESTING >R R> R@ { : GR1 >R R> ; -> }{ : GR2 >R R@ R> DROP ; -> }{ 123 GR1 -> 123 }{ 123 GR2 -> 123 }{ 1S GR1 -> 1S }   ( RETURN STACK HOLDS CELLS ) \ ------------------------------------------------------------------------TESTING ADD/SUBTRACT: + - 1+ 1- ABS NEGATE { 0 5 + -> 5 }{ 5 0 + -> 5 }{ 0 -5 + -> -5 }{ -5 0 + -> -5 }{ 1 2 + -> 3 }{ 1 -2 + -> -1 }{ -1 2 + -> 1 }{ -1 -2 + -> -3 }{ -1 1 + -> 0 }{ MID-UINT 1 + -> MID-UINT+1 } { 0 5 - -> -5 }{ 5 0 - -> 5 }{ 0 -5 - -> 5 }{ -5 0 - -> -5 }{ 1 2 - -> -1 }{ 1 -2 - -> 3 }{ -1 2 - -> -3 }{ -1 -2 - -> 1 }{ 0 1 - -> -1 }{ MID-UINT+1 1 - -> MID-UINT } { 0 1+ -> 1 }{ -1 1+ -> 0 }{ 1 1+ -> 2 }{ MID-UINT 1+ -> MID-UINT+1 } { 2 1- -> 1 }{ 1 1- -> 0 }{ 0 1- -> -1 }{ MID-UINT+1 1- -> MID-UINT } { 0 NEGATE -> 0 }{ 1 NEGATE -> -1 }{ -1 NEGATE -> 1 }{ 2 NEGATE -> -2 }{ -2 NEGATE -> 2 } { 0 ABS -> 0 }{ 1 ABS -> 1 }{ -1 ABS -> 1 }{ MIN-INT ABS -> MID-UINT+1 } \ ------------------------------------------------------------------------TESTING MULTIPLY: S>D * M* UM* { 0 S>D -> 0 0 }{ 1 S>D -> 1 0 }{ 2 S>D -> 2 0 }{ -1 S>D -> -1 -1 }{ -2 S>D -> -2 -1 }{ MIN-INT S>D -> MIN-INT -1 }{ MAX-INT S>D -> MAX-INT 0 } { 0 0 M* -> 0 S>D }{ 0 1 M* -> 0 S>D }{ 1 0 M* -> 0 S>D }{ 1 2 M* -> 2 S>D }{ 2 1 M* -> 2 S>D }{ 3 3 M* -> 9 S>D }{ -3 3 M* -> -9 S>D }{ 3 -3 M* -> -9 S>D }{ -3 -3 M* -> 9 S>D }{ 0 MIN-INT M* -> 0 S>D }{ 1 MIN-INT M* -> MIN-INT S>D }{ 2 MIN-INT M* -> 0 1S }{ 0 MAX-INT M* -> 0 S>D }{ 1 MAX-INT M* -> MAX-INT S>D }{ 2 MAX-INT M* -> MAX-INT 1 LSHIFT 0 }{ MIN-INT MIN-INT M* -> 0 MSB 1 RSHIFT }{ MAX-INT MIN-INT M* -> MSB MSB 2/ }{ MAX-INT MAX-INT M* -> 1 MSB 2/ INVERT } { 0 0 * -> 0 }              \ TEST IDENTITIES{ 0 1 * -> 0 }{ 1 0 * -> 0 }{ 1 2 * -> 2 }{ 2 1 * -> 2 }{ 3 3 * -> 9 }{ -3 3 * -> -9 }{ 3 -3 * -> -9 }{ -3 -3 * -> 9 } { MID-UINT+1 1 RSHIFT 2 * -> MID-UINT+1 }{ MID-UINT+1 2 RSHIFT 4 * -> MID-UINT+1 }{ MID-UINT+1 1 RSHIFT MID-UINT+1 OR 2 * -> MID-UINT+1 } { 0 0 UM* -> 0 0 }{ 0 1 UM* -> 0 0 }{ 1 0 UM* -> 0 0 }{ 1 2 UM* -> 2 0 }{ 2 1 UM* -> 2 0 }{ 3 3 UM* -> 9 0 } { MID-UINT+1 1 RSHIFT 2 UM* -> MID-UINT+1 0 }{ MID-UINT+1 2 UM* -> 0 1 }{ MID-UINT+1 4 UM* -> 0 2 }{ 1S 2 UM* -> 1S 1 LSHIFT 1 }{ MAX-UINT MAX-UINT UM* -> 1 1 INVERT } \ ------------------------------------------------------------------------TESTING DIVIDE: FM/MOD SM/REM UM/MOD */ */MOD / /MOD MOD { 0 S>D 1 FM/MOD -> 0 0 }{ 1 S>D 1 FM/MOD -> 0 1 }{ 2 S>D 1 FM/MOD -> 0 2 }{ -1 S>D 1 FM/MOD -> 0 -1 }{ -2 S>D 1 FM/MOD -> 0 -2 }{ 0 S>D -1 FM/MOD -> 0 0 }{ 1 S>D -1 FM/MOD -> 0 -1 }{ 2 S>D -1 FM/MOD -> 0 -2 }{ -1 S>D -1 FM/MOD -> 0 1 }{ -2 S>D -1 FM/MOD -> 0 2 }{ 2 S>D 2 FM/MOD -> 0 1 }{ -1 S>D -1 FM/MOD -> 0 1 }{ -2 S>D -2 FM/MOD -> 0 1 }{  7 S>D  3 FM/MOD -> 1 2 }{  7 S>D -3 FM/MOD -> -2 -3 }{ -7 S>D  3 FM/MOD -> 2 -3 }{ -7 S>D -3 FM/MOD -> -1 2 }{ MAX-INT S>D 1 FM/MOD -> 0 MAX-INT }{ MIN-INT S>D 1 FM/MOD -> 0 MIN-INT }{ MAX-INT S>D MAX-INT FM/MOD -> 0 1 }{ MIN-INT S>D MIN-INT FM/MOD -> 0 1 }{ 1S 1 4 FM/MOD -> 3 MAX-INT }{ 1 MIN-INT M* 1 FM/MOD -> 0 MIN-INT }{ 1 MIN-INT M* MIN-INT FM/MOD -> 0 1 }{ 2 MIN-INT M* 2 FM/MOD -> 0 MIN-INT }{ 2 MIN-INT M* MIN-INT FM/MOD -> 0 2 }{ 1 MAX-INT M* 1 FM/MOD -> 0 MAX-INT }{ 1 MAX-INT M* MAX-INT FM/MOD -> 0 1 }{ 2 MAX-INT M* 2 FM/MOD -> 0 MAX-INT }{ 2 MAX-INT M* MAX-INT FM/MOD -> 0 2 }{ MIN-INT MIN-INT M* MIN-INT FM/MOD -> 0 MIN-INT }{ MIN-INT MAX-INT M* MIN-INT FM/MOD -> 0 MAX-INT }{ MIN-INT MAX-INT M* MAX-INT FM/MOD -> 0 MIN-INT }{ MAX-INT MAX-INT M* MAX-INT FM/MOD -> 0 MAX-INT } { 0 S>D 1 SM/REM -> 0 0 }{ 1 S>D 1 SM/REM -> 0 1 }{ 2 S>D 1 SM/REM -> 0 2 }{ -1 S>D 1 SM/REM -> 0 -1 }{ -2 S>D 1 SM/REM -> 0 -2 }{ 0 S>D -1 SM/REM -> 0 0 }{ 1 S>D -1 SM/REM -> 0 -1 }{ 2 S>D -1 SM/REM -> 0 -2 }{ -1 S>D -1 SM/REM -> 0 1 }{ -2 S>D -1 SM/REM -> 0 2 }{ 2 S>D 2 SM/REM -> 0 1 }{ -1 S>D -1 SM/REM -> 0 1 }{ -2 S>D -2 SM/REM -> 0 1 }{  7 S>D  3 SM/REM -> 1 2 }{  7 S>D -3 SM/REM -> 1 -2 }{ -7 S>D  3 SM/REM -> -1 -2 }{ -7 S>D -3 SM/REM -> -1 2 }{ MAX-INT S>D 1 SM/REM -> 0 MAX-INT }{ MIN-INT S>D 1 SM/REM -> 0 MIN-INT }{ MAX-INT S>D MAX-INT SM/REM -> 0 1 }{ MIN-INT S>D MIN-INT SM/REM -> 0 1 }{ 1S 1 4 SM/REM -> 3 MAX-INT }{ 2 MIN-INT M* 2 SM/REM -> 0 MIN-INT }{ 2 MIN-INT M* MIN-INT SM/REM -> 0 2 }{ 2 MAX-INT M* 2 SM/REM -> 0 MAX-INT }{ 2 MAX-INT M* MAX-INT SM/REM -> 0 2 }{ MIN-INT MIN-INT M* MIN-INT SM/REM -> 0 MIN-INT }{ MIN-INT MAX-INT M* MIN-INT SM/REM -> 0 MAX-INT }{ MIN-INT MAX-INT M* MAX-INT SM/REM -> 0 MIN-INT }{ MAX-INT MAX-INT M* MAX-INT SM/REM -> 0 MAX-INT } { 0 0 1 UM/MOD -> 0 0 }{ 1 0 1 UM/MOD -> 0 1 }{ 1 0 2 UM/MOD -> 1 0 }{ 3 0 2 UM/MOD -> 1 1 }{ MAX-UINT 2 UM* 2 UM/MOD -> 0 MAX-UINT }{ MAX-UINT 2 UM* MAX-UINT UM/MOD -> 0 2 }{ MAX-UINT MAX-UINT UM* MAX-UINT UM/MOD -> 0 MAX-UINT } : IFFLOORED   [ -3 2 / -2 = INVERT ] LITERAL IF POSTPONE \ THEN ;: IFSYM   [ -3 2 / -1 = INVERT ] LITERAL IF POSTPONE \ THEN ; \ THE SYSTEM MIGHT DO EITHER FLOORED OR SYMMETRIC DIVISION.\ SINCE WE HAVE ALREADY TESTED M*, FM/MOD, AND SM/REM WE CAN USE THEM IN TEST.IFFLOORED : T/MOD  >R S>D R> FM/MOD ;IFFLOORED : T/     T/MOD SWAP DROP ;IFFLOORED : TMOD   T/MOD DROP ;IFFLOORED : T*/MOD >R M* R> FM/MOD ;IFFLOORED : T*/    T*/MOD SWAP DROP ;IFSYM     : T/MOD  >R S>D R> SM/REM ;IFSYM     : T/     T/MOD SWAP DROP ;IFSYM     : TMOD   T/MOD DROP ;IFSYM     : T*/MOD >R M* R> SM/REM ;IFSYM     : T*/    T*/MOD SWAP DROP ; { 0 1 /MOD -> 0 1 T/MOD }{ 1 1 /MOD -> 1 1 T/MOD }{ 2 1 /MOD -> 2 1 T/MOD }{ -1 1 /MOD -> -1 1 T/MOD }{ -2 1 /MOD -> -2 1 T/MOD }{ 0 -1 /MOD -> 0 -1 T/MOD }{ 1 -1 /MOD -> 1 -1 T/MOD }{ 2 -1 /MOD -> 2 -1 T/MOD }{ -1 -1 /MOD -> -1 -1 T/MOD }{ -2 -1 /MOD -> -2 -1 T/MOD }{ 2 2 /MOD -> 2 2 T/MOD }{ -1 -1 /MOD -> -1 -1 T/MOD }{ -2 -2 /MOD -> -2 -2 T/MOD }{ 7 3 /MOD -> 7 3 T/MOD }{ 7 -3 /MOD -> 7 -3 T/MOD }{ -7 3 /MOD -> -7 3 T/MOD }{ -7 -3 /MOD -> -7 -3 T/MOD }{ MAX-INT 1 /MOD -> MAX-INT 1 T/MOD }{ MIN-INT 1 /MOD -> MIN-INT 1 T/MOD }{ MAX-INT MAX-INT /MOD -> MAX-INT MAX-INT T/MOD }{ MIN-INT MIN-INT /MOD -> MIN-INT MIN-INT T/MOD } { 0 1 / -> 0 1 T/ }{ 1 1 / -> 1 1 T/ }{ 2 1 / -> 2 1 T/ }{ -1 1 / -> -1 1 T/ }{ -2 1 / -> -2 1 T/ }{ 0 -1 / -> 0 -1 T/ }{ 1 -1 / -> 1 -1 T/ }{ 2 -1 / -> 2 -1 T/ }{ -1 -1 / -> -1 -1 T/ }{ -2 -1 / -> -2 -1 T/ }{ 2 2 / -> 2 2 T/ }{ -1 -1 / -> -1 -1 T/ }{ -2 -2 / -> -2 -2 T/ }{ 7 3 / -> 7 3 T/ }{ 7 -3 / -> 7 -3 T/ }{ -7 3 / -> -7 3 T/ }{ -7 -3 / -> -7 -3 T/ }{ MAX-INT 1 / -> MAX-INT 1 T/ }{ MIN-INT 1 / -> MIN-INT 1 T/ }{ MAX-INT MAX-INT / -> MAX-INT MAX-INT T/ }{ MIN-INT MIN-INT / -> MIN-INT MIN-INT T/ } { 0 1 MOD -> 0 1 TMOD }{ 1 1 MOD -> 1 1 TMOD }{ 2 1 MOD -> 2 1 TMOD }{ -1 1 MOD -> -1 1 TMOD }{ -2 1 MOD -> -2 1 TMOD }{ 0 -1 MOD -> 0 -1 TMOD }{ 1 -1 MOD -> 1 -1 TMOD }{ 2 -1 MOD -> 2 -1 TMOD }{ -1 -1 MOD -> -1 -1 TMOD }{ -2 -1 MOD -> -2 -1 TMOD }{ 2 2 MOD -> 2 2 TMOD }{ -1 -1 MOD -> -1 -1 TMOD }{ -2 -2 MOD -> -2 -2 TMOD }{ 7 3 MOD -> 7 3 TMOD }{ 7 -3 MOD -> 7 -3 TMOD }{ -7 3 MOD -> -7 3 TMOD }{ -7 -3 MOD -> -7 -3 TMOD }{ MAX-INT 1 MOD -> MAX-INT 1 TMOD }

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