This file is part of MXE. See LICENSE.md for licensing information. From 05788ad7e6bf16402aa7c9c085784c3582de425c Mon Sep 17 00:00:00 2001From: Mark Brand <mabrand@mabrand.nl>Date: Thu, 30 Jul 2015 10:00:49 +0200Subject: [PATCH 1/3] mingw-float This patch has been taken from:https://gcc.gnu.org/ml/gcc-patches/2010-06/msg00387.htmlhttps://sourceforge.net/p/mingw/bugs/1809 diff --git a/gcc/ginclude/float.h b/gcc/ginclude/float.hindex 805b84d..b9dcc48 100644--- a/gcc/ginclude/float.h+++ b/gcc/ginclude/float.h@@ -263,3 +263,17 @@ see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see #endif /* __STDC_WANT_DEC_FP__ */  #endif /* _FLOAT_H___ */++#ifdef __MINGW32__+ /*+  * the MinGW-supplied header, which is guarded by the+  * _MINGW_FLOAT_H_ macro, may be found first, thus...+  */+#ifndef _MINGW_FLOAT_H_+ /*+  * ...when we didn't find the MinGW-supplied header first, we+  * want to pull it in now; include_next should achieve this+  */+# include_next <float.h>+#endif+#endif-- 2.1.4  From b5497062665c4f4e2a9e10f6ec44817f845ebe17 Mon Sep 17 00:00:00 2001From: Ilya Goncharov <zenbooster@gmail.com>Date: Thu, 30 Jul 2015 10:04:07 +0200Subject: [PATCH 2/3] intrinsics This patch has been taken from:https://gcc.gnu.org/bugzilla/show_bug.cgi?id=56038 diff --git a/gcc/config/i386/adxintrin.h b/gcc/config/i386/adxintrin.hindex dd2a26c..2e680b3 100644--- a/gcc/config/i386/adxintrin.h+++ b/gcc/config/i386/adxintrin.h@@ -28,5 +28,9 @@ #ifndef _ADXINTRIN_H_INCLUDED #define _ADXINTRIN_H_INCLUDED +#ifdef __cplusplus+extern "C" {+#endif+ extern __inline unsigned char __attribute__((__gnu_inline__, __always_inline__, __artificial__))@@ -78,4 +82,8 @@ _addcarryx_u64 (unsigned char __CF, unsigned long long __X, } #endif +#ifdef __cplusplus+}+#endif+ #endif /* _ADXINTRIN_H_INCLUDED */diff --git a/gcc/config/i386/ammintrin.h b/gcc/config/i386/ammintrin.hindex fb9a53f..341a1e4 100644--- a/gcc/config/i386/ammintrin.h+++ b/gcc/config/i386/ammintrin.h@@ -36,6 +36,10 @@ #define __DISABLE_SSE4A__ #endif /* __SSE4A__ */ +#ifdef __cplusplus+extern "C" {+#endif+ extern __inline void __attribute__((__gnu_inline__, __always_inline__, __artificial__)) _mm_stream_sd (double * __P, __m128d __Y) {@@ -85,6 +89,10 @@ _mm_inserti_si64(__m128i __X, __m128i __Y, unsigned const int __I, unsigned cons 				      (unsigned int)(I), (unsigned int)(L))) #endif +#ifdef __cplusplus+}+#endif+ #ifdef __DISABLE_SSE4A__ #undef __DISABLE_SSE4A__ #pragma GCC pop_optionsdiff --git a/gcc/config/i386/avx2intrin.h b/gcc/config/i386/avx2intrin.hindex b2a2f48..6d9e7ce 100644--- a/gcc/config/i386/avx2intrin.h+++ b/gcc/config/i386/avx2intrin.h@@ -34,6 +34,10 @@ #define __DISABLE_AVX2__ #endif /* __AVX2__ */ +#ifdef __cplusplus+extern "C" {+#endif+ /* Sum absolute 8-bit integer difference of adjacent groups of 4    byte integers in the first 2 operands.  Starting offsets within    operands are determined by the 3rd mask operand.  */@@ -1901,4 +1905,8 @@ _mm256_mask_i64gather_epi32 (__m128i src, int const *base, #pragma GCC pop_options #endif /* __DISABLE_AVX2__ */ +#ifdef __cplusplus+}+#endif+ #endif /* _AVX2INTRIN_H_INCLUDED */diff --git a/gcc/config/i386/avxintrin.h b/gcc/config/i386/avxintrin.hindex f49fe9d..dc099b8 100644--- a/gcc/config/i386/avxintrin.h+++ b/gcc/config/i386/avxintrin.h@@ -37,6 +37,10 @@ #define __DISABLE_AVX__ #endif /* __AVX__ */ +#ifdef __cplusplus+extern "C" {+#endif+ /* Internal data types for implementing the intrinsics.  */ typedef double __v4df __attribute__ ((__vector_size__ (32))); typedef float __v8sf __attribute__ ((__vector_size__ (32)));@@ -1464,4 +1468,8 @@ _mm256_castsi128_si256 (__m128i __A) #pragma GCC pop_options #endif /* __DISABLE_AVX__ */ +#ifdef __cplusplus+}+#endif+ #endif /* _AVXINTRIN_H_INCLUDED */diff --git a/gcc/config/i386/bmi2intrin.h b/gcc/config/i386/bmi2intrin.hindex 9f4df77..af873b0 100644--- a/gcc/config/i386/bmi2intrin.h+++ b/gcc/config/i386/bmi2intrin.h@@ -34,6 +34,10 @@ #define __DISABLE_BMI2__ #endif /* __BMI2__ */ +#ifdef __cplusplus+extern "C" {+#endif+ extern __inline unsigned int __attribute__((__gnu_inline__, __always_inline__, __artificial__)) _bzhi_u32 (unsigned int __X, unsigned int __Y)@@ -106,4 +110,8 @@ _mulx_u32 (unsigned int __X, unsigned int __Y, unsigned int *__P) #pragma GCC pop_options #endif /* __DISABLE_BMI2__ */ +#ifdef __cplusplus+}+#endif+ #endif /* _BMI2INTRIN_H_INCLUDED */diff --git a/gcc/config/i386/bmiintrin.h b/gcc/config/i386/bmiintrin.hindex a2e966c..ebf541d 100644--- a/gcc/config/i386/bmiintrin.h+++ b/gcc/config/i386/bmiintrin.h@@ -34,6 +34,10 @@ #define __DISABLE_BMI__ #endif /* __BMI__ */ +#ifdef __cplusplus+extern "C" {+#endif+ extern __inline unsigned short __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __tzcnt_u16 (unsigned short __X) {@@ -181,4 +185,8 @@ _tzcnt_u64 (unsigned long long __X) #pragma GCC pop_options #endif /* __DISABLE_BMI__ */ +#ifdef __cplusplus+}+#endif+ #endif /* _BMIINTRIN_H_INCLUDED */diff --git a/gcc/config/i386/cpuid.h b/gcc/config/i386/cpuid.hindex f3ad4db..b145078 100644--- a/gcc/config/i386/cpuid.h+++ b/gcc/config/i386/cpuid.h@@ -21,6 +21,10 @@  * <http://www.gnu.org/licenses/>.  */ +#ifdef __cplusplus+extern "C" {+#endif+ /* %ecx */ #define bit_SSE3	(1 << 0) #define bit_PCLMUL	(1 << 1)@@ -242,3 +246,8 @@ __get_cpuid (unsigned int __level,   __cpuid (__level, *__eax, *__ebx, *__ecx, *__edx);   return 1; }++#ifdef __cplusplus+}+#endif+diff --git a/gcc/config/i386/emmintrin.h b/gcc/config/i386/emmintrin.hindex b19f05a..64ef2d9 100644--- a/gcc/config/i386/emmintrin.h+++ b/gcc/config/i386/emmintrin.h@@ -36,6 +36,10 @@ #define __DISABLE_SSE2__ #endif /* __SSE2__ */ +#ifdef __cplusplus+extern "C" {+#endif+ /* SSE2 */ typedef double __v2df __attribute__ ((__vector_size__ (16))); typedef long long __v2di __attribute__ ((__vector_size__ (16)));@@ -1535,6 +1539,10 @@ _mm_castps_pd(__m128 __A)   return (__m128d) __A; } +#ifdef __cplusplus+}+#endif+ extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__)) _mm_castps_si128(__m128 __A) {diff --git a/gcc/config/i386/f16cintrin.h b/gcc/config/i386/f16cintrin.hindex d810a93..e2574ca 100644--- a/gcc/config/i386/f16cintrin.h+++ b/gcc/config/i386/f16cintrin.h@@ -34,6 +34,10 @@ #define __DISABLE_F16C__ #endif /* __F16C__ */ +#ifdef __cplusplus+extern "C" {+#endif+ extern __inline float __attribute__((__gnu_inline__, __always_inline__, __artificial__)) _cvtsh_ss (unsigned short __S) {@@ -95,4 +99,8 @@ _mm256_cvtps_ph (__m256 __A, const int __I) #pragma GCC pop_options #endif /* __DISABLE_F16C__ */ +#ifdef __cplusplus+}+#endif+ #endif /* _F16CINTRIN_H_INCLUDED */diff --git a/gcc/config/i386/fma4intrin.h b/gcc/config/i386/fma4intrin.hindex 06668e8..8813ee4 100644--- a/gcc/config/i386/fma4intrin.h+++ b/gcc/config/i386/fma4intrin.h@@ -37,6 +37,10 @@ #define __DISABLE_FMA4__ #endif /* __FMA4__ */ +#ifdef __cplusplus+extern "C" {+#endif+ /* 128b Floating point multiply/add type instructions.  */ extern __inline __m128 __attribute__((__gnu_inline__, __always_inline__, __artificial__)) _mm_macc_ps (__m128 __A, __m128 __B, __m128 __C)@@ -233,6 +237,10 @@ _mm256_msubadd_pd (__m256d __A, __m256d __B, __m256d __C)   return (__m256d) __builtin_ia32_vfmaddsubpd256 ((__v4df)__A, (__v4df)__B, -(__v4df)__C); } +#ifdef __cplusplus+}+#endif+ #ifdef __DISABLE_FMA4__ #undef __DISABLE_FMA4__ #pragma GCC pop_optionsdiff --git a/gcc/config/i386/fmaintrin.h b/gcc/config/i386/fmaintrin.hindex 9128b4d..d4bdf5d 100644--- a/gcc/config/i386/fmaintrin.h+++ b/gcc/config/i386/fmaintrin.h@@ -34,6 +34,10 @@ #define __DISABLE_FMA__ #endif /* __FMA__ */ +#ifdef __cplusplus+extern "C" {+#endif+ extern __inline __m128d __attribute__((__gnu_inline__, __always_inline__, __artificial__)) _mm_fmadd_pd (__m128d __A, __m128d __B, __m128d __C)@@ -294,6 +298,10 @@ _mm256_fmsubadd_ps (__m256 __A, __m256 __B, __m256 __C)                                                 -(__v8sf)__C); } +#ifdef __cplusplus+}+#endif+ #ifdef __DISABLE_FMA__ #undef __DISABLE_FMA__ #pragma GCC pop_optionsdiff --git a/gcc/config/i386/fxsrintrin.h b/gcc/config/i386/fxsrintrin.hindex a3932e0..aa5dfa4 100644--- a/gcc/config/i386/fxsrintrin.h+++ b/gcc/config/i386/fxsrintrin.h@@ -34,6 +34,10 @@ #define __DISABLE_FXSR__ #endif /* __FXSR__ */ +#ifdef __cplusplus+extern "C" {+#endif+ extern __inline void __attribute__((__gnu_inline__, __always_inline__, __artificial__)) _fxsave (void *__P)@@ -70,4 +74,8 @@ _fxrstor64 (void *__P) #endif /* __DISABLE_FXSR__ */  +#ifdef __cplusplus+}+#endif+ #endif /* _FXSRINTRIN_H_INCLUDED */diff --git a/gcc/config/i386/gmm_malloc.h b/gcc/config/i386/gmm_malloc.hindex 52b853c..de07c3c 100644--- a/gcc/config/i386/gmm_malloc.h+++ b/gcc/config/i386/gmm_malloc.h@@ -27,6 +27,10 @@ #include <stdlib.h> #include <errno.h> +#ifdef __cplusplus+extern "C" {+#endif+ static __inline__ void*  _mm_malloc (size_t size, size_t align) {@@ -71,4 +75,8 @@ _mm_free (void * aligned_ptr)     free (((void **) aligned_ptr) [-1]); } +#ifdef __cplusplus+}+#endif+ #endif /* _MM_MALLOC_H_INCLUDED */diff --git a/gcc/config/i386/ia32intrin.h b/gcc/config/i386/ia32intrin.hindex 1f728c8..e8abf07 100644--- a/gcc/config/i386/ia32intrin.h+++ b/gcc/config/i386/ia32intrin.h@@ -25,6 +25,10 @@ # error "Never use <ia32intrin.h> directly; include <x86intrin.h> instead." #endif +#ifdef __cplusplus+extern "C" {+#endif+ /* 32bit bsf */ extern __inline int __attribute__((__gnu_inline__, __always_inline__, __artificial__))@@ -297,3 +301,7 @@ __writeeflags (unsigned int X) #define _rotwr(a,b)		__rorw((a), (b)) #define _rotl(a,b)		__rold((a), (b)) #define _rotr(a,b)		__rord((a), (b))++#ifdef __cplusplus+}+#endifdiff --git a/gcc/config/i386/immintrin.h b/gcc/config/i386/immintrin.hindex a1e9c3c..dfd9ea7 100644--- a/gcc/config/i386/immintrin.h+++ b/gcc/config/i386/immintrin.h@@ -96,6 +96,10 @@ _rdrand16_step (unsigned short *__P)   return __builtin_ia32_rdrand16_step (__P); } +#ifdef __cplusplus+extern "C" {+#endif+ extern __inline int __attribute__((__gnu_inline__, __always_inline__, __artificial__)) _rdrand32_step (unsigned int *__P)@@ -192,4 +196,8 @@ _rdrand64_step (unsigned long long *__P)  #endif /* __x86_64__  */ +#ifdef __cplusplus+}+#endif+ #endif /* _IMMINTRIN_H_INCLUDED */diff --git a/gcc/config/i386/lwpintrin.h b/gcc/config/i386/lwpintrin.hindex 714b565..a362d57 100644--- a/gcc/config/i386/lwpintrin.h+++ b/gcc/config/i386/lwpintrin.h@@ -34,6 +34,10 @@ #define __DISABLE_LWP__ #endif /* __LWP__ */ +#ifdef __cplusplus+extern "C" {+#endif+ extern __inline void __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __llwpcb (void *pcbAddress) {@@ -71,6 +75,9 @@ __lwpval64 (unsigned long long data2, unsigned int data1, unsigned int flags) #endif #endif +#ifdef __cplusplus+}+#endif  #ifdef __OPTIMIZE__ extern __inline unsigned char __attribute__((__gnu_inline__, __always_inline__, __artificial__))diff --git a/gcc/config/i386/lzcntintrin.h b/gcc/config/i386/lzcntintrin.hindex 9f9f145..357940b 100644--- a/gcc/config/i386/lzcntintrin.h+++ b/gcc/config/i386/lzcntintrin.h@@ -35,6 +35,10 @@ #define __DISABLE_LZCNT__ #endif /* __LZCNT__ */ +#ifdef __cplusplus+extern "C" {+#endif+ extern __inline unsigned short __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __lzcnt16 (unsigned short __X) {@@ -72,4 +76,8 @@ _lzcnt_u64 (unsigned long long __X) #pragma GCC pop_options #endif /* __DISABLE_LZCNT__ */ +#ifdef __cplusplus+}+#endif+ #endif /* _LZCNTINTRIN_H_INCLUDED */diff --git a/gcc/config/i386/mm3dnow.h b/gcc/config/i386/mm3dnow.hindex 2a88997..1f22553 100644--- a/gcc/config/i386/mm3dnow.h+++ b/gcc/config/i386/mm3dnow.h@@ -36,6 +36,10 @@ #define __DISABLE_3dNOW__ #endif /* __3dNOW__ */ +#ifdef __cplusplus+extern "C" {+#endif+ extern __inline void __attribute__((__gnu_inline__, __always_inline__, __artificial__)) _m_femms (void) {@@ -210,6 +214,10 @@ _m_pswapd (__m64 __A)  #endif /* __3dNOW_A__ */ +#ifdef __cplusplus+}+#endif+ #ifdef __DISABLE_3dNOW__ #undef __DISABLE_3dNOW__ #pragma GCC pop_optionsdiff --git a/gcc/config/i386/mmintrin.h b/gcc/config/i386/mmintrin.hindex d098473..1cb9e54 100644--- a/gcc/config/i386/mmintrin.h+++ b/gcc/config/i386/mmintrin.h@@ -33,6 +33,10 @@ #define __DISABLE_MMX__ #endif /* __MMX__ */ +#ifdef __cplusplus+extern "C" {+#endif+ /* The Intel API is flexible enough that we must allow aliasing with other    vector types, and their scalar components.  */

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