Tests found excessive cache thrashing on x86-64 architectures. The problem was traced to the alignment of sections. This patch sets up an architecture-specific alignment of 512 bytes for x86-64 and 16 bytes for all others. It uses preprocessor directives that, hopefully, make it easy to tweak for other architectures.
Unified · Split
| @@ -174,6 +174,12 @@ LIBTCCAPI int tcc_run(TCCState *s1, int argc, char **argv) · 173 unmodified lines | |||
| 174 | return (*prog_main)(argc, argv); | 174 | return (*prog_main)(argc, argv); |
| 175 | } | 175 | } |
| 176 | 176 | ||
| 177 | #ifdef TCC_TARGET_X86_64 | ||
| 178 | #define SECTION_ALIGNMENT 511 | ||
| 179 | #else | ||
| 180 | #define SECTION_ALIGNMENT 15 | ||
| 181 | #endif | ||
| 182 | |||
| 177 | /* relocate code. Return -1 on error, required size if ptr is NULL, | 183 | /* relocate code. Return -1 on error, required size if ptr is NULL, |
| 178 | otherwise copy code into buffer passed by the caller */ | 184 | otherwise copy code into buffer passed by the caller */ |
| 179 | static int tcc_relocate_ex(TCCState *s1, void *ptr) | 185 | static int tcc_relocate_ex(TCCState *s1, void *ptr) |
| @@ -205,7 +211,7 @@ static int tcc_relocate_ex(TCCState *s1, void *ptr) · 25 unmodified lines | |||
| 205 | s = s1->sections[i]; | 211 | s = s1->sections[i]; |
| 206 | if (0 == (s->sh_flags & SHF_ALLOC)) | 212 | if (0 == (s->sh_flags & SHF_ALLOC)) |
| 207 | continue; | 213 | continue; |
| 208 | offset = (offset + 15) & ~15; | 214 | offset = (offset + SECTION_ALIGNMENT) & ~SECTION_ALIGNMENT; |
| 209 | s->sh_addr = mem ? mem + offset : 0; | 215 | s->sh_addr = mem ? mem + offset : 0; |
| 210 | offset += s->data_offset; | 216 | offset += s->data_offset; |
| 211 | } | 217 | } |