/* * Lance ethernet driver for the MIPS processor based * DECstation family * * * adopted from sunlance.c by Richard van den Berg * * Copyright (C) 2002, 2003, 2005, 2006 Maciej W. Rozycki * * additional sources: * - PMAD-AA TURBOchannel Ethernet Module Functional Specification, * Revision 1.2 * * History: * * v0.001: The kernel accepts the code and it shows the hardware address. * * v0.002: Removed most sparc stuff, left only some module and dma stuff. * * v0.003: Enhanced base address calculation from proposals by * Harald Koerfgen and Thomas Riemer. * * v0.004: lance-regs is pointing at the right addresses, added prom * check. First start of address mapping and DMA. * * v0.005: started to play around with LANCE-DMA. This driver will not * work for non IOASIC lances. HK * * v0.006: added pointer arrays to lance_private and setup routine for * them in dec_lance_init. HK * * v0.007: Big shit. The LANCE seems to use a different DMA mechanism to * access the init block. This looks like one (short) word at a * time, but the smallest amount the IOASIC can transfer is a * (long) word. So we have a 2-2 padding here. Changed * lance_init_block accordingly. The 16-16 padding for the buffers * seems to be correct. HK * * v0.008: mods to make PMAX_LANCE work. 01/09/1999 triemer * * v0.009: Module support fixes, multiple interfaces support, various * bits. macro * * v0.010: Fixes for the PMAD mapping of the LANCE buffer and for the * PMAX requirement to only use halfword accesses to the * buffer. macro * * v0.011: Converted the PMAD to the driver model. macro */ #include <linux/crc32.h>#include <linux/delay.h>#include <linux/errno.h>#include <linux/if_ether.h>#include <linux/init.h>#include <linux/kernel.h>#include <linux/module.h>#include <linux/netdevice.h>#include <linux/etherdevice.h>#include <linux/spinlock.h>#include <linux/stddef.h>#include <linux/string.h>#include <linux/tc.h>#include <linux/types.h> #include <asm/addrspace.h>#include <asm/system.h> #include <asm/dec/interrupts.h>#include <asm/dec/ioasic.h>#include <asm/dec/ioasic_addrs.h>#include <asm/dec/kn01.h>#include <asm/dec/machtype.h>#include <asm/dec/system.h> static char version[] __devinitdata ="declance.c: v0.011 by Linux MIPS DECstation task force\n"; MODULE_AUTHOR("Linux MIPS DECstation task force");MODULE_DESCRIPTION("DEC LANCE (DECstation onboard, PMAD-xx) driver");MODULE_LICENSE("GPL"); #define __unused __attribute__ ((unused)) /* * card types */#define ASIC_LANCE 1#define PMAD_LANCE 2#define PMAX_LANCE 3 #define LE_CSR0 0#define LE_CSR1 1#define LE_CSR2 2#define LE_CSR3 3 #define LE_MO_PROM 0x8000 /* Enable promiscuous mode */ #define LE_C0_ERR 0x8000 /* Error: set if BAB, SQE, MISS or ME is set */#define LE_C0_BABL 0x4000 /* BAB: Babble: tx timeout. */#define LE_C0_CERR 0x2000 /* SQE: Signal quality error */#define LE_C0_MISS 0x1000 /* MISS: Missed a packet */#define LE_C0_MERR 0x0800 /* ME: Memory error */#define LE_C0_RINT 0x0400 /* Received interrupt */#define LE_C0_TINT 0x0200 /* Transmitter Interrupt */#define LE_C0_IDON 0x0100 /* IFIN: Init finished. */#define LE_C0_INTR 0x0080 /* Interrupt or error */#define LE_C0_INEA 0x0040 /* Interrupt enable */#define LE_C0_RXON 0x0020 /* Receiver on */#define LE_C0_TXON 0x0010 /* Transmitter on */#define LE_C0_TDMD 0x0008 /* Transmitter demand */#define LE_C0_STOP 0x0004 /* Stop the card */#define LE_C0_STRT 0x0002 /* Start the card */#define LE_C0_INIT 0x0001 /* Init the card */ #define LE_C3_BSWP 0x4 /* SWAP */#define LE_C3_ACON 0x2 /* ALE Control */#define LE_C3_BCON 0x1 /* Byte control */ /* Receive message descriptor 1 */#define LE_R1_OWN 0x8000 /* Who owns the entry */#define LE_R1_ERR 0x4000 /* Error: if FRA, OFL, CRC or BUF is set */#define LE_R1_FRA 0x2000 /* FRA: Frame error */#define LE_R1_OFL 0x1000 /* OFL: Frame overflow */#define LE_R1_CRC 0x0800 /* CRC error */#define LE_R1_BUF 0x0400 /* BUF: Buffer error */#define LE_R1_SOP 0x0200 /* Start of packet */#define LE_R1_EOP 0x0100 /* End of packet */#define LE_R1_POK 0x0300 /* Packet is complete: SOP + EOP */ /* Transmit message descriptor 1 */#define LE_T1_OWN 0x8000 /* Lance owns the packet */#define LE_T1_ERR 0x4000 /* Error summary */#define LE_T1_EMORE 0x1000 /* Error: more than one retry needed */#define LE_T1_EONE 0x0800 /* Error: one retry needed */#define LE_T1_EDEF 0x0400 /* Error: deferred */#define LE_T1_SOP 0x0200 /* Start of packet */#define LE_T1_EOP 0x0100 /* End of packet */#define LE_T1_POK 0x0300 /* Packet is complete: SOP + EOP */ #define LE_T3_BUF 0x8000 /* Buffer error */#define LE_T3_UFL 0x4000 /* Error underflow */#define LE_T3_LCOL 0x1000 /* Error late collision */#define LE_T3_CLOS 0x0800 /* Error carrier loss */#define LE_T3_RTY 0x0400 /* Error retry */#define LE_T3_TDR 0x03ff /* Time Domain Reflectometry counter */ /* Define: 2^4 Tx buffers and 2^4 Rx buffers */ #ifndef LANCE_LOG_TX_BUFFERS#define LANCE_LOG_TX_BUFFERS 4#define LANCE_LOG_RX_BUFFERS 4#endif #define TX_RING_SIZE (1 << (LANCE_LOG_TX_BUFFERS))#define TX_RING_MOD_MASK (TX_RING_SIZE - 1) #define RX_RING_SIZE (1 << (LANCE_LOG_RX_BUFFERS))#define RX_RING_MOD_MASK (RX_RING_SIZE - 1) #define PKT_BUF_SZ 1536#define RX_BUFF_SIZE PKT_BUF_SZ#define TX_BUFF_SIZE PKT_BUF_SZ #undef TEST_HITS#define ZERO 0 /* * The DS2100/3100 have a linear 64 kB buffer which supports halfword * accesses only. Each halfword of the buffer is word-aligned in the * CPU address space. * * The PMAD-AA has a 128 kB buffer on-board. * * The IOASIC LANCE devices use a shared memory region. This region * as seen from the CPU is (max) 128 kB long and has to be on an 128 kB * boundary. The LANCE sees this as a 64 kB long continuous memory * region. * * The LANCE's DMA address is used as an index in this buffer and DMA * takes place in bursts of eight 16-bit words which are packed into * four 32-bit words by the IOASIC. This leads to a strange padding: * 16 bytes of valid data followed by a 16 byte gap :-(. */ struct lance_rx_desc { unsigned short rmd0; /* low address of packet */ unsigned short rmd1; /* high address of packet and descriptor bits */ short length; /* 2s complement (negative!) of buffer length */ unsigned short mblength; /* actual number of bytes received */}; struct lance_tx_desc { unsigned short tmd0; /* low address of packet */ unsigned short tmd1; /* high address of packet and descriptor bits */ short length; /* 2s complement (negative!) of buffer length */ unsigned short misc;}; /* First part of the LANCE initialization block, described in databook. */struct lance_init_block { unsigned short mode; /* pre-set mode (reg. 15) */ unsigned short phys_addr[3]; /* physical ethernet address */ unsigned short filter[4]; /* multicast filter */ /* Receive and transmit ring base, along with extra bits. */ unsigned short rx_ptr; /* receive descriptor addr */ unsigned short rx_len; /* receive len and high addr */ unsigned short tx_ptr; /* transmit descriptor addr */ unsigned short tx_len; /* transmit len and high addr */ short gap[4]; /* The buffer descriptors */ struct lance_rx_desc brx_ring[RX_RING_SIZE]; struct lance_tx_desc btx_ring[TX_RING_SIZE];}; #define BUF_OFFSET_CPU sizeof(struct lance_init_block)#define BUF_OFFSET_LNC sizeof(struct lance_init_block) #define shift_off(off, type) \ (type == ASIC_LANCE || type == PMAX_LANCE ? off << 1 : off) #define lib_off(rt, type) \ shift_off(offsetof(struct lance_init_block, rt), type) #define lib_ptr(ib, rt, type) \ ((volatile u16 *)((u8 *)(ib) + lib_off(rt, type))) #define rds_off(rt, type) \ shift_off(offsetof(struct lance_rx_desc, rt), type) #define rds_ptr(rd, rt, type) \ ((volatile u16 *)((u8 *)(rd) + rds_off(rt, type))) #define tds_off(rt, type) \ shift_off(offsetof(struct lance_tx_desc, rt), type) #define tds_ptr(td, rt, type) \ ((volatile u16 *)((u8 *)(td) + tds_off(rt, type))) struct lance_private { struct net_device *next; int type; int dma_irq; volatile struct lance_regs *ll; spinlock_t lock; int rx_new, tx_new; int rx_old, tx_old; struct net_device_stats stats; unsigned short busmaster_regval; struct timer_list multicast_timer; /* Pointers to the ring buffers as seen from the CPU */ char *rx_buf_ptr_cpu[RX_RING_SIZE]; char *tx_buf_ptr_cpu[TX_RING_SIZE]; /* Pointers to the ring buffers as seen from the LANCE */ uint rx_buf_ptr_lnc[RX_RING_SIZE]; uint tx_buf_ptr_lnc[TX_RING_SIZE];}; #define TX_BUFFS_AVAIL ((lp->tx_old<=lp->tx_new)?\ lp->tx_old+TX_RING_MOD_MASK-lp->tx_new:\ lp->tx_old - lp->tx_new-1) /* The lance control ports are at an absolute address, machine and tc-slot * dependent. * DECstations do only 32-bit access and the LANCE uses 16 bit addresses, * so we have to give the structure an extra member making rap pointing * at the right address */struct lance_regs { volatile unsigned short rdp; /* register data port */ unsigned short pad; volatile unsigned short rap; /* register address port */}; int dec_lance_debug = 2; static struct tc_driver dec_lance_tc_driver;static struct net_device *root_lance_dev; static inline void writereg(volatile unsigned short *regptr, short value){ *regptr = value; iob();} /* Load the CSR registers */static void load_csrs(struct lance_private *lp){ volatile struct lance_regs *ll = lp->ll; uint leptr; /* The address space as seen from the LANCE * begins at address 0. HK */ leptr = 0; writereg(&ll->rap, LE_CSR1); writereg(&ll->rdp, (leptr & 0xFFFF)); writereg(&ll->rap, LE_CSR2); writereg(&ll->rdp, leptr >> 16); writereg(&ll->rap, LE_CSR3); writereg(&ll->rdp, lp->busmaster_regval); /* Point back to csr0 */ writereg(&ll->rap, LE_CSR0);} /* * Our specialized copy routines * */static void cp_to_buf(const int type, void *to, const void *from, int len){ unsigned short *tp, *fp, clen; unsigned char *rtp, *rfp; if (type == PMAD_LANCE) { memcpy(to, from, len); } else if (type == PMAX_LANCE) { clen = len >> 1; tp = (unsigned short *) to; fp = (unsigned short *) from; while (clen--) { *tp++ = *fp++; tp++; } clen = len & 1; rtp = (unsigned char *) tp; rfp = (unsigned char *) fp; while (clen--) { *rtp++ = *rfp++; } } else { /* * copy 16 Byte chunks */ clen = len >> 4; tp = (unsigned short *) to; fp = (unsigned short *) from; while (clen--) { *tp++ = *fp++; *tp++ = *fp++; *tp++ = *fp++; *tp++ = *fp++; *tp++ = *fp++; *tp++ = *fp++; *tp++ = *fp++; *tp++ = *fp++; tp += 8; } /* * do the rest, if any. */ clen = len & 15; rtp = (unsigned char *) tp; rfp = (unsigned char *) fp; while (clen--) { *rtp++ = *rfp++; } } iob();} static void cp_from_buf(const int type, void *to, const void *from, int len){ unsigned short *tp, *fp, clen; unsigned char *rtp, *rfp; if (type == PMAD_LANCE) { memcpy(to, from, len); } else if (type == PMAX_LANCE) { clen = len >> 1; tp = (unsigned short *) to; fp = (unsigned short *) from; while (clen--) { *tp++ = *fp++; fp++; } clen = len & 1; rtp = (unsigned char *) tp; rfp = (unsigned char *) fp; while (clen--) { *rtp++ = *rfp++; } } else { /* * copy 16 Byte chunks */ clen = len >> 4; tp = (unsigned short *) to; fp = (unsigned short *) from; while (clen--) { *tp++ = *fp++; *tp++ = *fp++; *tp++ = *fp++; *tp++ = *fp++; *tp++ = *fp++; *tp++ = *fp++; *tp++ = *fp++; *tp++ = *fp++; fp += 8; } /* * do the rest, if any. */ clen = len & 15; rtp = (unsigned char *) tp; rfp = (unsigned char *) fp; while (clen--) { *rtp++ = *rfp++; } } } /* Setup the Lance Rx and Tx rings */static void lance_init_ring(struct net_device *dev){ struct lance_private *lp = netdev_priv(dev); volatile u16 *ib = (volatile u16 *)dev->mem_start; uint leptr; int i; /* Lock out other processes while setting up hardware */ netif_stop_queue(dev); lp->rx_new = lp->tx_new = 0; lp->rx_old = lp->tx_old = 0; /* Copy the ethernet address to the lance init block. * XXX bit 0 of the physical address registers has to be zero */ *lib_ptr(ib, phys_addr[0], lp->type) = (dev->dev_addr[1] << 8) | dev->dev_addr[0]; *lib_ptr(ib, phys_addr[1], lp->type) = (dev->dev_addr[3] << 8) | dev->dev_addr[2]; *lib_ptr(ib, phys_addr[2], lp->type) = (dev->dev_addr[5] << 8) | dev->dev_addr[4]; /* Setup the initialization block */ /* Setup rx descriptor pointer */ leptr = offsetof(struct lance_init_block, brx_ring); *lib_ptr(ib, rx_len, lp->type) = (LANCE_LOG_RX_BUFFERS << 13) | (leptr >> 16); *lib_ptr(ib, rx_ptr, lp->type) = leptr; if (ZERO) printk("RX ptr: %8.8x(%8.8x)\n", leptr, lib_off(brx_ring, lp->type)); /* Setup tx descriptor pointer */ leptr = offsetof(struct lance_init_block, btx_ring); *lib_ptr(ib, tx_len, lp->type) = (LANCE_LOG_TX_BUFFERS << 13) | (leptr >> 16); *lib_ptr(ib, tx_ptr, lp->type) = leptr; if (ZERO) printk("TX ptr: %8.8x(%8.8x)\n", leptr, lib_off(btx_ring, lp->type)); if (ZERO) printk("TX rings:\n"); /* Setup the Tx ring entries */ for (i = 0; i < TX_RING_SIZE; i++) { leptr = lp->tx_buf_ptr_lnc[i]; *lib_ptr(ib, btx_ring[i].tmd0, lp->type) = leptr; *lib_ptr(ib, btx_ring[i].tmd1, lp->type) = (leptr >> 16) & 0xff; *lib_ptr(ib, btx_ring[i].length, lp->type) = 0xf000; /* The ones required by tmd2 */ *lib_ptr(ib, btx_ring[i].misc, lp->type) = 0; if (i < 3 && ZERO) printk("%d: 0x%8.8x(0x%8.8x)\n", i, leptr, (uint)lp->tx_buf_ptr_cpu[i]);Lines 1–500 of 1394. Load more
/* * Lance ethernet driver for the MIPS processor based * DECstation family * * * adopted from sunlance.c by Richard van den Berg * * Copyright (C) 2002, 2003, 2005, 2006 Maciej W. Rozycki * * additional sources: * - PMAD-AA TURBOchannel Ethernet Module Functional Specification, * Revision 1.2 * * History: * * v0.001: The kernel accepts the code and it shows the hardware address. * * v0.002: Removed most sparc stuff, left only some module and dma stuff. * * v0.003: Enhanced base address calculation from proposals by * Harald Koerfgen and Thomas Riemer. * * v0.004: lance-regs is pointing at the right addresses, added prom * check. First start of address mapping and DMA. * * v0.005: started to play around with LANCE-DMA. This driver will not * work for non IOASIC lances. HK * * v0.006: added pointer arrays to lance_private and setup routine for * them in dec_lance_init. HK * * v0.007: Big shit. The LANCE seems to use a different DMA mechanism to * access the init block. This looks like one (short) word at a * time, but the smallest amount the IOASIC can transfer is a * (long) word. So we have a 2-2 padding here. Changed * lance_init_block accordingly. The 16-16 padding for the buffers * seems to be correct. HK * * v0.008: mods to make PMAX_LANCE work. 01/09/1999 triemer * * v0.009: Module support fixes, multiple interfaces support, various * bits. macro * * v0.010: Fixes for the PMAD mapping of the LANCE buffer and for the * PMAX requirement to only use halfword accesses to the * buffer. macro * * v0.011: Converted the PMAD to the driver model. macro */ #include <linux/crc32.h> #include <linux/delay.h> #include <linux/errno.h> #include <linux/if_ether.h> #include <linux/init.h> #include <linux/kernel.h> #include <linux/module.h> #include <linux/netdevice.h> #include <linux/etherdevice.h> #include <linux/spinlock.h> #include <linux/stddef.h> #include <linux/string.h> #include <linux/tc.h> #include <linux/types.h> #include <asm/addrspace.h> #include <asm/system.h> #include <asm/dec/interrupts.h> #include <asm/dec/ioasic.h> #include <asm/dec/ioasic_addrs.h> #include <asm/dec/kn01.h> #include <asm/dec/machtype.h> #include <asm/dec/system.h> static char version[] __devinitdata = "declance.c: v0.011 by Linux MIPS DECstation task force\n"; MODULE_AUTHOR("Linux MIPS DECstation task force"); MODULE_DESCRIPTION("DEC LANCE (DECstation onboard, PMAD-xx) driver"); MODULE_LICENSE("GPL"); #define __unused __attribute__ ((unused)) /* * card types */ #define ASIC_LANCE 1 #define PMAD_LANCE 2 #define PMAX_LANCE 3 #define LE_CSR0 0 #define LE_CSR1 1 #define LE_CSR2 2 #define LE_CSR3 3 #define LE_MO_PROM 0x8000 /* Enable promiscuous mode */ #define LE_C0_ERR 0x8000 /* Error: set if BAB, SQE, MISS or ME is set */ #define LE_C0_BABL 0x4000 /* BAB: Babble: tx timeout. */ #define LE_C0_CERR 0x2000 /* SQE: Signal quality error */ #define LE_C0_MISS 0x1000 /* MISS: Missed a packet */ #define LE_C0_MERR 0x0800 /* ME: Memory error */ #define LE_C0_RINT 0x0400 /* Received interrupt */ #define LE_C0_TINT 0x0200 /* Transmitter Interrupt */ #define LE_C0_IDON 0x0100 /* IFIN: Init finished. */ #define LE_C0_INTR 0x0080 /* Interrupt or error */ #define LE_C0_INEA 0x0040 /* Interrupt enable */ #define LE_C0_RXON 0x0020 /* Receiver on */ #define LE_C0_TXON 0x0010 /* Transmitter on */ #define LE_C0_TDMD 0x0008 /* Transmitter demand */ #define LE_C0_STOP 0x0004 /* Stop the card */ #define LE_C0_STRT 0x0002 /* Start the card */ #define LE_C0_INIT 0x0001 /* Init the card */ #define LE_C3_BSWP 0x4 /* SWAP */ #define LE_C3_ACON 0x2 /* ALE Control */ #define LE_C3_BCON 0x1 /* Byte control */ /* Receive message descriptor 1 */ #define LE_R1_OWN 0x8000 /* Who owns the entry */ #define LE_R1_ERR 0x4000 /* Error: if FRA, OFL, CRC or BUF is set */ #define LE_R1_FRA 0x2000 /* FRA: Frame error */ #define LE_R1_OFL 0x1000 /* OFL: Frame overflow */ #define LE_R1_CRC 0x0800 /* CRC error */ #define LE_R1_BUF 0x0400 /* BUF: Buffer error */ #define LE_R1_SOP 0x0200 /* Start of packet */ #define LE_R1_EOP 0x0100 /* End of packet */ #define LE_R1_POK 0x0300 /* Packet is complete: SOP + EOP */ /* Transmit message descriptor 1 */ #define LE_T1_OWN 0x8000 /* Lance owns the packet */ #define LE_T1_ERR 0x4000 /* Error summary */ #define LE_T1_EMORE 0x1000 /* Error: more than one retry needed */ #define LE_T1_EONE 0x0800 /* Error: one retry needed */ #define LE_T1_EDEF 0x0400 /* Error: deferred */ #define LE_T1_SOP 0x0200 /* Start of packet */ #define LE_T1_EOP 0x0100 /* End of packet */ #define LE_T1_POK 0x0300 /* Packet is complete: SOP + EOP */ #define LE_T3_BUF 0x8000 /* Buffer error */ #define LE_T3_UFL 0x4000 /* Error underflow */ #define LE_T3_LCOL 0x1000 /* Error late collision */ #define LE_T3_CLOS 0x0800 /* Error carrier loss */ #define LE_T3_RTY 0x0400 /* Error retry */ #define LE_T3_TDR 0x03ff /* Time Domain Reflectometry counter */ /* Define: 2^4 Tx buffers and 2^4 Rx buffers */ #ifndef LANCE_LOG_TX_BUFFERS #define LANCE_LOG_TX_BUFFERS 4 #define LANCE_LOG_RX_BUFFERS 4 #endif #define TX_RING_SIZE (1 << (LANCE_LOG_TX_BUFFERS)) #define TX_RING_MOD_MASK (TX_RING_SIZE - 1) #define RX_RING_SIZE (1 << (LANCE_LOG_RX_BUFFERS)) #define RX_RING_MOD_MASK (RX_RING_SIZE - 1) #define PKT_BUF_SZ 1536 #define RX_BUFF_SIZE PKT_BUF_SZ #define TX_BUFF_SIZE PKT_BUF_SZ #undef TEST_HITS #define ZERO 0 /* * The DS2100/3100 have a linear 64 kB buffer which supports halfword * accesses only. Each halfword of the buffer is word-aligned in the * CPU address space. * * The PMAD-AA has a 128 kB buffer on-board. * * The IOASIC LANCE devices use a shared memory region. This region * as seen from the CPU is (max) 128 kB long and has to be on an 128 kB * boundary. The LANCE sees this as a 64 kB long continuous memory * region. * * The LANCE's DMA address is used as an index in this buffer and DMA * takes place in bursts of eight 16-bit words which are packed into * four 32-bit words by the IOASIC. This leads to a strange padding: * 16 bytes of valid data followed by a 16 byte gap :-(. */ struct lance_rx_desc { unsigned short rmd0; /* low address of packet */ unsigned short rmd1; /* high address of packet and descriptor bits */ short length; /* 2s complement (negative!) of buffer length */ unsigned short mblength; /* actual number of bytes received */ }; struct lance_tx_desc { unsigned short tmd0; /* low address of packet */ unsigned short tmd1; /* high address of packet and descriptor bits */ short length; /* 2s complement (negative!) of buffer length */ unsigned short misc; }; /* First part of the LANCE initialization block, described in databook. */ struct lance_init_block { unsigned short mode; /* pre-set mode (reg. 15) */ unsigned short phys_addr[3]; /* physical ethernet address */ unsigned short filter[4]; /* multicast filter */ /* Receive and transmit ring base, along with extra bits. */ unsigned short rx_ptr; /* receive descriptor addr */ unsigned short rx_len; /* receive len and high addr */ unsigned short tx_ptr; /* transmit descriptor addr */ unsigned short tx_len; /* transmit len and high addr */ short gap[4]; /* The buffer descriptors */ struct lance_rx_desc brx_ring[RX_RING_SIZE]; struct lance_tx_desc btx_ring[TX_RING_SIZE]; }; #define BUF_OFFSET_CPU sizeof(struct lance_init_block) #define BUF_OFFSET_LNC sizeof(struct lance_init_block) #define shift_off(off, type) \ (type == ASIC_LANCE || type == PMAX_LANCE ? off << 1 : off) #define lib_off(rt, type) \ shift_off(offsetof(struct lance_init_block, rt), type) #define lib_ptr(ib, rt, type) \ ((volatile u16 *)((u8 *)(ib) + lib_off(rt, type))) #define rds_off(rt, type) \ shift_off(offsetof(struct lance_rx_desc, rt), type) #define rds_ptr(rd, rt, type) \ ((volatile u16 *)((u8 *)(rd) + rds_off(rt, type))) #define tds_off(rt, type) \ shift_off(offsetof(struct lance_tx_desc, rt), type) #define tds_ptr(td, rt, type) \ ((volatile u16 *)((u8 *)(td) + tds_off(rt, type))) struct lance_private { struct net_device *next; int type; int dma_irq; volatile struct lance_regs *ll; spinlock_t lock; int rx_new, tx_new; int rx_old, tx_old; struct net_device_stats stats; unsigned short busmaster_regval; struct timer_list multicast_timer; /* Pointers to the ring buffers as seen from the CPU */ char *rx_buf_ptr_cpu[RX_RING_SIZE]; char *tx_buf_ptr_cpu[TX_RING_SIZE]; /* Pointers to the ring buffers as seen from the LANCE */ uint rx_buf_ptr_lnc[RX_RING_SIZE]; uint tx_buf_ptr_lnc[TX_RING_SIZE]; }; #define TX_BUFFS_AVAIL ((lp->tx_old<=lp->tx_new)?\ lp->tx_old+TX_RING_MOD_MASK-lp->tx_new:\ lp->tx_old - lp->tx_new-1) /* The lance control ports are at an absolute address, machine and tc-slot * dependent. * DECstations do only 32-bit access and the LANCE uses 16 bit addresses, * so we have to give the structure an extra member making rap pointing * at the right address */ struct lance_regs { volatile unsigned short rdp; /* register data port */ unsigned short pad; volatile unsigned short rap; /* register address port */ }; int dec_lance_debug = 2; static struct tc_driver dec_lance_tc_driver; static struct net_device *root_lance_dev; static inline void writereg(volatile unsigned short *regptr, short value) { *regptr = value; iob(); } /* Load the CSR registers */ static void load_csrs(struct lance_private *lp) { volatile struct lance_regs *ll = lp->ll; uint leptr; /* The address space as seen from the LANCE * begins at address 0. HK */ leptr = 0; writereg(&ll->rap, LE_CSR1); writereg(&ll->rdp, (leptr & 0xFFFF)); writereg(&ll->rap, LE_CSR2); writereg(&ll->rdp, leptr >> 16); writereg(&ll->rap, LE_CSR3); writereg(&ll->rdp, lp->busmaster_regval); /* Point back to csr0 */ writereg(&ll->rap, LE_CSR0); } /* * Our specialized copy routines * */ static void cp_to_buf(const int type, void *to, const void *from, int len) { unsigned short *tp, *fp, clen; unsigned char *rtp, *rfp; if (type == PMAD_LANCE) { memcpy(to, from, len); } else if (type == PMAX_LANCE) { clen = len >> 1; tp = (unsigned short *) to; fp = (unsigned short *) from; while (clen--) { *tp++ = *fp++; tp++; } clen = len & 1; rtp = (unsigned char *) tp; rfp = (unsigned char *) fp; while (clen--) { *rtp++ = *rfp++; } } else { /* * copy 16 Byte chunks */ clen = len >> 4; tp = (unsigned short *) to; fp = (unsigned short *) from; while (clen--) { *tp++ = *fp++; *tp++ = *fp++; *tp++ = *fp++; *tp++ = *fp++; *tp++ = *fp++; *tp++ = *fp++; *tp++ = *fp++; *tp++ = *fp++; tp += 8; } /* * do the rest, if any. */ clen = len & 15; rtp = (unsigned char *) tp; rfp = (unsigned char *) fp; while (clen--) { *rtp++ = *rfp++; } } iob(); } static void cp_from_buf(const int type, void *to, const void *from, int len) { unsigned short *tp, *fp, clen; unsigned char *rtp, *rfp; if (type == PMAD_LANCE) { memcpy(to, from, len); } else if (type == PMAX_LANCE) { clen = len >> 1; tp = (unsigned short *) to; fp = (unsigned short *) from; while (clen--) { *tp++ = *fp++; fp++; } clen = len & 1; rtp = (unsigned char *) tp; rfp = (unsigned char *) fp; while (clen--) { *rtp++ = *rfp++; } } else { /* * copy 16 Byte chunks */ clen = len >> 4; tp = (unsigned short *) to; fp = (unsigned short *) from; while (clen--) { *tp++ = *fp++; *tp++ = *fp++; *tp++ = *fp++; *tp++ = *fp++; *tp++ = *fp++; *tp++ = *fp++; *tp++ = *fp++; *tp++ = *fp++; fp += 8; } /* * do the rest, if any. */ clen = len & 15; rtp = (unsigned char *) tp; rfp = (unsigned char *) fp; while (clen--) { *rtp++ = *rfp++; } } } /* Setup the Lance Rx and Tx rings */ static void lance_init_ring(struct net_device *dev) { struct lance_private *lp = netdev_priv(dev); volatile u16 *ib = (volatile u16 *)dev->mem_start; uint leptr; int i; /* Lock out other processes while setting up hardware */ netif_stop_queue(dev); lp->rx_new = lp->tx_new = 0; lp->rx_old = lp->tx_old = 0; /* Copy the ethernet address to the lance init block. * XXX bit 0 of the physical address registers has to be zero */ *lib_ptr(ib, phys_addr[0], lp->type) = (dev->dev_addr[1] << 8) | dev->dev_addr[0]; *lib_ptr(ib, phys_addr[1], lp->type) = (dev->dev_addr[3] << 8) | dev->dev_addr[2]; *lib_ptr(ib, phys_addr[2], lp->type) = (dev->dev_addr[5] << 8) | dev->dev_addr[4]; /* Setup the initialization block */ /* Setup rx descriptor pointer */ leptr = offsetof(struct lance_init_block, brx_ring); *lib_ptr(ib, rx_len, lp->type) = (LANCE_LOG_RX_BUFFERS << 13) | (leptr >> 16); *lib_ptr(ib, rx_ptr, lp->type) = leptr; if (ZERO) printk("RX ptr: %8.8x(%8.8x)\n", leptr, lib_off(brx_ring, lp->type)); /* Setup tx descriptor pointer */ leptr = offsetof(struct lance_init_block, btx_ring); *lib_ptr(ib, tx_len, lp->type) = (LANCE_LOG_TX_BUFFERS << 13) | (leptr >> 16); *lib_ptr(ib, tx_ptr, lp->type) = leptr; if (ZERO) printk("TX ptr: %8.8x(%8.8x)\n", leptr, lib_off(btx_ring, lp->type)); if (ZERO) printk("TX rings:\n"); /* Setup the Tx ring entries */ for (i = 0; i < TX_RING_SIZE; i++) { leptr = lp->tx_buf_ptr_lnc[i]; *lib_ptr(ib, btx_ring[i].tmd0, lp->type) = leptr; *lib_ptr(ib, btx_ring[i].tmd1, lp->type) = (leptr >> 16) & 0xff; *lib_ptr(ib, btx_ring[i].length, lp->type) = 0xf000; /* The ones required by tmd2 */ *lib_ptr(ib, btx_ring[i].misc, lp->type) = 0; if (i < 3 && ZERO) printk("%d: 0x%8.8x(0x%8.8x)\n", i, leptr, (uint)lp->tx_buf_ptr_cpu[i]);