/* * Copyright 2015 Advanced Micro Devices, Inc. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be included in * all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR * OTHER DEALINGS IN THE SOFTWARE. * * Authors: AMD * */ #include <linux/string.h>#include <linux/acpi.h>#include <linux/i2c.h> #include <drm/drm_atomic.h>#include <drm/drm_probe_helper.h>#include <drm/amdgpu_drm.h>#include <drm/drm_edid.h> #include "dm_services.h"#include "amdgpu.h"#include "dc.h"#include "amdgpu_dm.h"#include "amdgpu_dm_irq.h"#include "amdgpu_dm_mst_types.h" #include "dm_helpers.h"#include "ddc_service_types.h" /* dm_helpers_parse_edid_caps * * Parse edid caps * * @edid:	[in] pointer to edid *  edid_caps:	[in] pointer to edid caps * @return *	void * */enum dc_edid_status dm_helpers_parse_edid_caps(		struct dc_link *link,		const struct dc_edid *edid,		struct dc_edid_caps *edid_caps){	struct amdgpu_dm_connector *aconnector = link->priv;	struct drm_connector *connector = &aconnector->base;	struct edid *edid_buf = edid ? (struct edid *) edid->raw_edid : NULL;	struct cea_sad *sads;	int sad_count = -1;	int sadb_count = -1;	int i = 0;	uint8_t *sadb = NULL; 	enum dc_edid_status result = EDID_OK; 	if (!edid_caps || !edid)		return EDID_BAD_INPUT; 	if (!drm_edid_is_valid(edid_buf))		result = EDID_BAD_CHECKSUM; 	edid_caps->manufacturer_id = (uint16_t) edid_buf->mfg_id[0] |					((uint16_t) edid_buf->mfg_id[1])<<8;	edid_caps->product_id = (uint16_t) edid_buf->prod_code[0] |					((uint16_t) edid_buf->prod_code[1])<<8;	edid_caps->serial_number = edid_buf->serial;	edid_caps->manufacture_week = edid_buf->mfg_week;	edid_caps->manufacture_year = edid_buf->mfg_year; 	drm_edid_get_monitor_name(edid_buf,				  edid_caps->display_name,				  AUDIO_INFO_DISPLAY_NAME_SIZE_IN_CHARS); 	edid_caps->edid_hdmi = connector->display_info.is_hdmi; 	sad_count = drm_edid_to_sad((struct edid *) edid->raw_edid, &sads);	if (sad_count <= 0)		return result; 	edid_caps->audio_mode_count = sad_count < DC_MAX_AUDIO_DESC_COUNT ? sad_count : DC_MAX_AUDIO_DESC_COUNT;	for (i = 0; i < edid_caps->audio_mode_count; ++i) {		struct cea_sad *sad = &sads[i]; 		edid_caps->audio_modes[i].format_code = sad->format;		edid_caps->audio_modes[i].channel_count = sad->channels + 1;		edid_caps->audio_modes[i].sample_rate = sad->freq;		edid_caps->audio_modes[i].sample_size = sad->byte2;	} 	sadb_count = drm_edid_to_speaker_allocation((struct edid *) edid->raw_edid, &sadb); 	if (sadb_count < 0) {		DRM_ERROR("Couldn't read Speaker Allocation Data Block: %d\n", sadb_count);		sadb_count = 0;	} 	if (sadb_count)		edid_caps->speaker_flags = sadb[0];	else		edid_caps->speaker_flags = DEFAULT_SPEAKER_LOCATION; 	kfree(sads);	kfree(sadb); 	return result;} static voidfill_dc_mst_payload_table_from_drm(struct dc_link *link,				   bool enable,				   struct drm_dp_mst_atomic_payload *target_payload,				   struct dc_dp_mst_stream_allocation_table *table){	struct dc_dp_mst_stream_allocation_table new_table = { 0 };	struct dc_dp_mst_stream_allocation *sa;	struct link_mst_stream_allocation_table copy_of_link_table =										link->mst_stream_alloc_table; 	int i;	int current_hw_table_stream_cnt = copy_of_link_table.stream_count;	struct link_mst_stream_allocation *dc_alloc; 	/* TODO: refactor to set link->mst_stream_alloc_table directly if possible.*/	if (enable) {		dc_alloc =		&copy_of_link_table.stream_allocations[current_hw_table_stream_cnt];		dc_alloc->vcp_id = target_payload->vcpi;		dc_alloc->slot_count = target_payload->time_slots;	} else {		for (i = 0; i < copy_of_link_table.stream_count; i++) {			dc_alloc =			&copy_of_link_table.stream_allocations[i]; 			if (dc_alloc->vcp_id == target_payload->vcpi) {				dc_alloc->vcp_id = 0;				dc_alloc->slot_count = 0;				break;			}		}		ASSERT(i != copy_of_link_table.stream_count);	} 	/* Fill payload info*/	for (i = 0; i < MAX_CONTROLLER_NUM; i++) {		dc_alloc =			&copy_of_link_table.stream_allocations[i];		if (dc_alloc->vcp_id > 0 && dc_alloc->slot_count > 0) {			sa = &new_table.stream_allocations[new_table.stream_count];			sa->slot_count = dc_alloc->slot_count;			sa->vcp_id = dc_alloc->vcp_id;			new_table.stream_count++;		}	} 	/* Overwrite the old table */	*table = new_table;} void dm_helpers_dp_update_branch_info(	struct dc_context *ctx,	const struct dc_link *link){} /* * Writes payload allocation table in immediate downstream device. */bool dm_helpers_dp_mst_write_payload_allocation_table(		struct dc_context *ctx,		const struct dc_stream_state *stream,		struct dc_dp_mst_stream_allocation_table *proposed_table,		bool enable){	struct amdgpu_dm_connector *aconnector;	struct drm_dp_mst_topology_state *mst_state;	struct drm_dp_mst_atomic_payload *payload;	struct drm_dp_mst_topology_mgr *mst_mgr; 	aconnector = (struct amdgpu_dm_connector *)stream->dm_stream_context;	/* Accessing the connector state is required for vcpi_slots allocation	 * and directly relies on behaviour in commit check	 * that blocks before commit guaranteeing that the state	 * is not gonna be swapped while still in use in commit tail */ 	if (!aconnector || !aconnector->mst_port)		return false; 	mst_mgr = &aconnector->mst_port->mst_mgr;	mst_state = to_drm_dp_mst_topology_state(mst_mgr->base.state); 	/* It's OK for this to fail */	payload = drm_atomic_get_mst_payload_state(mst_state, aconnector->port);	if (enable)		drm_dp_add_payload_part1(mst_mgr, mst_state, payload);	else		drm_dp_remove_payload(mst_mgr, mst_state, payload); 	/* mst_mgr->->payloads are VC payload notify MST branch using DPCD or	 * AUX message. The sequence is slot 1-63 allocated sequence for each	 * stream. AMD ASIC stream slot allocation should follow the same	 * sequence. copy DRM MST allocation to dc */	fill_dc_mst_payload_table_from_drm(stream->link, enable, payload, proposed_table); 	return true;} /* * poll pending down reply */void dm_helpers_dp_mst_poll_pending_down_reply(	struct dc_context *ctx,	const struct dc_link *link){} /* * Clear payload allocation table before enable MST DP link. */void dm_helpers_dp_mst_clear_payload_allocation_table(	struct dc_context *ctx,	const struct dc_link *link){} /* * Polls for ACT (allocation change trigger) handled and sends * ALLOCATE_PAYLOAD message. */enum act_return_status dm_helpers_dp_mst_poll_for_allocation_change_trigger(		struct dc_context *ctx,		const struct dc_stream_state *stream){	struct amdgpu_dm_connector *aconnector;	struct drm_dp_mst_topology_mgr *mst_mgr;	int ret; 	aconnector = (struct amdgpu_dm_connector *)stream->dm_stream_context; 	if (!aconnector || !aconnector->mst_port)		return ACT_FAILED; 	mst_mgr = &aconnector->mst_port->mst_mgr; 	if (!mst_mgr->mst_state)		return ACT_FAILED; 	ret = drm_dp_check_act_status(mst_mgr); 	if (ret)		return ACT_FAILED; 	return ACT_SUCCESS;} bool dm_helpers_dp_mst_send_payload_allocation(		struct dc_context *ctx,		const struct dc_stream_state *stream,		bool enable){	struct amdgpu_dm_connector *aconnector;	struct drm_dp_mst_topology_state *mst_state;	struct drm_dp_mst_topology_mgr *mst_mgr;	struct drm_dp_mst_atomic_payload *payload;	enum mst_progress_status set_flag = MST_ALLOCATE_NEW_PAYLOAD;	enum mst_progress_status clr_flag = MST_CLEAR_ALLOCATED_PAYLOAD; 	aconnector = (struct amdgpu_dm_connector *)stream->dm_stream_context; 	if (!aconnector || !aconnector->mst_port)		return false; 	mst_mgr = &aconnector->mst_port->mst_mgr;	mst_state = to_drm_dp_mst_topology_state(mst_mgr->base.state); 	payload = drm_atomic_get_mst_payload_state(mst_state, aconnector->port);	if (!enable) {		set_flag = MST_CLEAR_ALLOCATED_PAYLOAD;		clr_flag = MST_ALLOCATE_NEW_PAYLOAD;	} 	if (enable && drm_dp_add_payload_part2(mst_mgr, mst_state->base.state, payload)) {		amdgpu_dm_set_mst_status(&aconnector->mst_status,			set_flag, false);	} else {		amdgpu_dm_set_mst_status(&aconnector->mst_status,			set_flag, true);		amdgpu_dm_set_mst_status(&aconnector->mst_status,			clr_flag, false);	} 	return true;} void dm_dtn_log_begin(struct dc_context *ctx,	struct dc_log_buffer_ctx *log_ctx){	static const char msg[] = "[dtn begin]\n"; 	if (!log_ctx) {		pr_info("%s", msg);		return;	} 	dm_dtn_log_append_v(ctx, log_ctx, "%s", msg);} __printf(3, 4)void dm_dtn_log_append_v(struct dc_context *ctx,	struct dc_log_buffer_ctx *log_ctx,	const char *msg, ...){	va_list args;	size_t total;	int n; 	if (!log_ctx) {		/* No context, redirect to dmesg. */		struct va_format vaf; 		vaf.fmt = msg;		vaf.va = &args; 		va_start(args, msg);		pr_info("%pV", &vaf);		va_end(args); 		return;	} 	/* Measure the output. */	va_start(args, msg);	n = vsnprintf(NULL, 0, msg, args);	va_end(args); 	if (n <= 0)		return; 	/* Reallocate the string buffer as needed. */	total = log_ctx->pos + n + 1; 	if (total > log_ctx->size) {		char *buf = (char *)kvcalloc(total, sizeof(char), GFP_KERNEL); 		if (buf) {			memcpy(buf, log_ctx->buf, log_ctx->pos);			kfree(log_ctx->buf); 			log_ctx->buf = buf;			log_ctx->size = total;		}	} 	if (!log_ctx->buf)		return; 	/* Write the formatted string to the log buffer. */	va_start(args, msg);	n = vscnprintf(		log_ctx->buf + log_ctx->pos,		log_ctx->size - log_ctx->pos,		msg,		args);	va_end(args); 	if (n > 0)		log_ctx->pos += n;} void dm_dtn_log_end(struct dc_context *ctx,	struct dc_log_buffer_ctx *log_ctx){	static const char msg[] = "[dtn end]\n"; 	if (!log_ctx) {		pr_info("%s", msg);		return;	} 	dm_dtn_log_append_v(ctx, log_ctx, "%s", msg);} bool dm_helpers_dp_mst_start_top_mgr(		struct dc_context *ctx,		const struct dc_link *link,		bool boot){	struct amdgpu_dm_connector *aconnector = link->priv; 	if (!aconnector) {		DRM_ERROR("Failed to find connector for link!");		return false;	} 	if (boot) {		DRM_INFO("DM_MST: Differing MST start on aconnector: %p [id: %d]\n",					aconnector, aconnector->base.base.id);		return true;	} 	DRM_INFO("DM_MST: starting TM on aconnector: %p [id: %d]\n",			aconnector, aconnector->base.base.id); 	return (drm_dp_mst_topology_mgr_set_mst(&aconnector->mst_mgr, true) == 0);} bool dm_helpers_dp_mst_stop_top_mgr(		struct dc_context *ctx,		struct dc_link *link){	struct amdgpu_dm_connector *aconnector = link->priv; 	if (!aconnector) {		DRM_ERROR("Failed to find connector for link!");		return false;	} 	DRM_INFO("DM_MST: stopping TM on aconnector: %p [id: %d]\n",			aconnector, aconnector->base.base.id); 	if (aconnector->mst_mgr.mst_state == true) {		drm_dp_mst_topology_mgr_set_mst(&aconnector->mst_mgr, false);		link->cur_link_settings.lane_count = 0;	} 	return false;} bool dm_helpers_dp_read_dpcd(		struct dc_context *ctx,		const struct dc_link *link,		uint32_t address,		uint8_t *data,		uint32_t size){ 	struct amdgpu_dm_connector *aconnector = link->priv; 	if (!aconnector) {		DC_LOG_DC("Failed to find connector for link!\n");		return false;	} 	return drm_dp_dpcd_read(&aconnector->dm_dp_aux.aux, address,			data, size) > 0;} bool dm_helpers_dp_write_dpcd(		struct dc_context *ctx,		const struct dc_link *link,		uint32_t address,		const uint8_t *data,		uint32_t size){	struct amdgpu_dm_connector *aconnector = link->priv; 	if (!aconnector) {		DRM_ERROR("Failed to find connector for link!");		return false;	} 	return drm_dp_dpcd_write(&aconnector->dm_dp_aux.aux,			address, (uint8_t *)data, size) > 0;} bool dm_helpers_submit_i2c(		struct dc_context *ctx,		const struct dc_link *link,		struct i2c_command *cmd){	struct amdgpu_dm_connector *aconnector = link->priv;	struct i2c_msg *msgs;	int i = 0;	int num = cmd->number_of_payloads;	bool result; 	if (!aconnector) {		DRM_ERROR("Failed to find connector for link!");		return false;	} 	msgs = kcalloc(num, sizeof(struct i2c_msg), GFP_KERNEL); 	if (!msgs)		return false; 	for (i = 0; i < num; i++) {		msgs[i].flags = cmd->payloads[i].write ? 0 : I2C_M_RD;		msgs[i].addr = cmd->payloads[i].address;		msgs[i].len = cmd->payloads[i].length;

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