Unified · Split
| @@ -1142,16 +1142,17 @@ used by the kernel. · 1141 unmodified lines | ||
| 1142 | 1142 | |
| 1143 | 1143 | pids.max |
| 1144 | 1144 | |
| 1145 | − A read-write single value file which exists on non-root cgroups. The | |
| 1146 | − default is "max". | |
| 1145 | + A read-write single value file which exists on non-root | |
| 1146 | + cgroups. The default is "max". | |
| 1147 | 1147 | |
| 1148 | − Hard limit of number of processes. | |
| 1148 | + Hard limit of number of processes. | |
| 1149 | 1149 | |
| 1150 | 1150 | pids.current |
| 1151 | 1151 | |
| 1152 | − A read-only single value file which exists on all cgroups. | |
| 1152 | + A read-only single value file which exists on all cgroups. | |
| 1153 | 1153 | |
| 1154 | − The number of processes currently in the cgroup and its descendants. | |
| 1154 | + The number of processes currently in the cgroup and its | |
| 1155 | + descendants. | |
| 1155 | 1156 | |
| 1156 | 1157 | Organisational operations are not blocked by cgroup policies, so it is |
| 1157 | 1158 | possible to have pids.current > pids.max. This can be done by either |
| @@ -45,7 +45,7 @@ The following clocks are available: · 44 unmodified lines | ||
| 45 | 45 | - 1 15 SATA |
| 46 | 46 | - 1 16 SATA USB |
| 47 | 47 | - 1 17 Main |
| 48 | − - 1 18 SD/MMC | |
| 48 | + - 1 18 SD/MMC/GOP | |
| 49 | 49 | - 1 21 Slow IO (SPI, NOR, BootROM, I2C, UART) |
| 50 | 50 | - 1 22 USB3H0 |
| 51 | 51 | - 1 23 USB3H1 |
| @@ -65,7 +65,7 @@ Required properties: · 13 unmodified lines | ||
| 65 | 65 | "cpm-audio", "cpm-communit", "cpm-nand", "cpm-ppv2", "cpm-sdio", |
| 66 | 66 | "cpm-mg-domain", "cpm-mg-core", "cpm-xor1", "cpm-xor0", "cpm-gop-dp", "none", |
| 67 | 67 | "cpm-pcie_x10", "cpm-pcie_x11", "cpm-pcie_x4", "cpm-pcie-xor", "cpm-sata", |
| 68 | − "cpm-sata-usb", "cpm-main", "cpm-sd-mmc", "none", "none", "cpm-slow-io", | |
| 68 | + "cpm-sata-usb", "cpm-main", "cpm-sd-mmc-gop", "none", "none", "cpm-slow-io", | |
| 69 | 69 | "cpm-usb3h0", "cpm-usb3h1", "cpm-usb3dev", "cpm-eip150", "cpm-eip197"; |
| 70 | 70 | |
| 71 | 71 | Example: |
| @@ -78,6 +78,6 @@ Example: · 6 unmodified lines | ||
| 78 | 78 | gate-clock-output-names = "cpm-audio", "cpm-communit", "cpm-nand", "cpm-ppv2", "cpm-sdio", |
| 79 | 79 | "cpm-mg-domain", "cpm-mg-core", "cpm-xor1", "cpm-xor0", "cpm-gop-dp", "none", |
| 80 | 80 | "cpm-pcie_x10", "cpm-pcie_x11", "cpm-pcie_x4", "cpm-pcie-xor", "cpm-sata", |
| 81 | − "cpm-sata-usb", "cpm-main", "cpm-sd-mmc", "none", "none", "cpm-slow-io", | |
| 81 | + "cpm-sata-usb", "cpm-main", "cpm-sd-mmc-gop", "none", "none", "cpm-slow-io", | |
| 82 | 82 | "cpm-usb3h0", "cpm-usb3h1", "cpm-usb3dev", "cpm-eip150", "cpm-eip197"; |
| 83 | 83 | }; |
| @@ -4,7 +4,6 @@ Required properties: · 3 unmodified lines | ||
| 4 | 4 | - compatible: value should be one of the following |
| 5 | 5 | "samsung,exynos3250-mipi-dsi" /* for Exynos3250/3472 SoCs */ |
| 6 | 6 | "samsung,exynos4210-mipi-dsi" /* for Exynos4 SoCs */ |
| 7 | − "samsung,exynos4415-mipi-dsi" /* for Exynos4415 SoC */ | |
| 8 | 7 | "samsung,exynos5410-mipi-dsi" /* for Exynos5410/5420/5440 SoCs */ |
| 9 | 8 | "samsung,exynos5422-mipi-dsi" /* for Exynos5422/5800 SoCs */ |
| 10 | 9 | "samsung,exynos5433-mipi-dsi" /* for Exynos5433 SoCs */ |
| @@ -11,7 +11,6 @@ Required properties: · 10 unmodified lines | ||
| 11 | 11 | "samsung,s5pv210-fimd"; /* for S5PV210 SoC */ |
| 12 | 12 | "samsung,exynos3250-fimd"; /* for Exynos3250/3472 SoCs */ |
| 13 | 13 | "samsung,exynos4210-fimd"; /* for Exynos4 SoCs */ |
| 14 | − "samsung,exynos4415-fimd"; /* for Exynos4415 SoC */ | |
| 15 | 14 | "samsung,exynos5250-fimd"; /* for Exynos5250 SoCs */ |
| 16 | 15 | "samsung,exynos5420-fimd"; /* for Exynos5420/5422/5800 SoCs */ |
| 17 | 16 | |
| @@ -13,7 +13,7 @@ Required Properties: · 12 unmodified lines | ||
| 13 | 13 | - "rockchip,rk2928-dw-mshc": for Rockchip RK2928 and following, |
| 14 | 14 | before RK3288 |
| 15 | 15 | - "rockchip,rk3288-dw-mshc": for Rockchip RK3288 |
| 16 | − - "rockchip,rk1108-dw-mshc", "rockchip,rk3288-dw-mshc": for Rockchip RK1108 | |
| 16 | + - "rockchip,rv1108-dw-mshc", "rockchip,rk3288-dw-mshc": for Rockchip RV1108 | |
| 17 | 17 | - "rockchip,rk3036-dw-mshc", "rockchip,rk3288-dw-mshc": for Rockchip RK3036 |
| 18 | 18 | - "rockchip,rk3368-dw-mshc", "rockchip,rk3288-dw-mshc": for Rockchip RK3368 |
| 19 | 19 | - "rockchip,rk3399-dw-mshc", "rockchip,rk3288-dw-mshc": for Rockchip RK3399 |
| @@ -1,39 +0,0 @@ | ||
| 1 | −Broadcom USB3 phy binding for northstar plus SoC | |
| 2 | −The USB3 phy is internal to the SoC and is accessed using mdio interface. | |
| 3 | − | |
| 4 | −Required mdio bus properties: | |
| 5 | −- reg: Should be 0x0 for SoC internal USB3 phy | |
| 6 | −- #address-cells: must be 1 | |
| 7 | −- #size-cells: must be 0 | |
| 8 | − | |
| 9 | −Required USB3 PHY properties: | |
| 10 | −- compatible: should be "brcm,nsp-usb3-phy" | |
| 11 | −- reg: USB3 Phy address on SoC internal MDIO bus and it should be 0x10. | |
| 12 | −- usb3-ctrl-syscon: handler of syscon node defining physical address | |
| 13 | − of usb3 control register. | |
| 14 | −- #phy-cells: must be 0 | |
| 15 | − | |
| 16 | −Required usb3 control properties: | |
| 17 | −- compatible: should be "brcm,nsp-usb3-ctrl" | |
| 18 | −- reg: offset and length of the control registers | |
| 19 | − | |
| 20 | −Example: | |
| 21 | − | |
| 22 | − mdio@0 { | |
| 23 | − reg = <0x0>; | |
| 24 | − #address-cells = <1>; | |
| 25 | − #size-cells = <0>; | |
| 26 | − | |
| 27 | − usb3_phy: usb-phy@10 { | |
| 28 | − compatible = "brcm,nsp-usb3-phy"; | |
| 29 | − reg = <0x10>; | |
| 30 | − usb3-ctrl-syscon = <&usb3_ctrl>; | |
| 31 | − #phy-cells = <0>; | |
| 32 | − status = "disabled"; | |
| 33 | − }; | |
| 34 | − }; | |
| 35 | − | |
| 36 | − usb3_ctrl: syscon@104408 { | |
| 37 | − compatible = "brcm,nsp-usb3-ctrl", "syscon"; | |
| 38 | − reg = <0x104408 0x3fc>; | |
| 39 | − }; | |
| @@ -71,6 +71,9 @@ · 70 unmodified lines | ||
| 71 | 71 | For Axon it can be absent, though my current driver |
| 72 | 72 | doesn't handle phy-address yet so for now, keep |
| 73 | 73 | 0x00ffffff in it. |
| 74 | + - phy-handle : Used to describe configurations where a external PHY | |
| 75 | + is used. Please refer to: | |
| 76 | + Documentation/devicetree/bindings/net/ethernet.txt | |
| 74 | 77 | - rx-fifo-size-gige : 1 cell, Rx fifo size in bytes for 1000 Mb/sec |
| 75 | 78 | operations (if absent the value is the same as |
| 76 | 79 | rx-fifo-size). For Axon, either absent or 2048. |
| @@ -81,8 +84,22 @@ · 4 unmodified lines | ||
| 81 | 84 | offload, phandle of the TAH device node. |
| 82 | 85 | - tah-channel : 1 cell, optional. If appropriate, channel used on the |
| 83 | 86 | TAH engine. |
| 87 | + - fixed-link : Fixed-link subnode describing a link to a non-MDIO | |
| 88 | + managed entity. See | |
| 89 | + Documentation/devicetree/bindings/net/fixed-link.txt | |
| 90 | + for details. | |
| 91 | + - mdio subnode : When the EMAC has a phy connected to its local | |
| 92 | + mdio, which us supported by the kernel's network | |
| 93 | + PHY library in drivers/net/phy, there must be device | |
| 94 | + tree subnode with the following required properties: | |
| 95 | + - #address-cells: Must be <1>. | |
| 96 | + - #size-cells: Must be <0>. | |
| 84 | 97 | |
| 85 | − Example: | |
| 98 | + For PHY definitions: Please refer to | |
| 99 | + Documentation/devicetree/bindings/net/phy.txt and | |
| 100 | + Documentation/devicetree/bindings/net/ethernet.txt | |
| 101 | + | |
| 102 | + Examples: | |
| 86 | 103 | |
| 87 | 104 | EMAC0: ethernet@40000800 { |
| 88 | 105 | device_type = "network"; |
| @@ -104,6 +121,48 @@ · 15 unmodified lines | ||
| 104 | 121 | zmii-channel = <0>; |
| 105 | 122 | }; |
| 106 | 123 | |
| 124 | + EMAC1: ethernet@ef600c00 { | |
| 125 | + device_type = "network"; | |
| 126 | + compatible = "ibm,emac-apm821xx", "ibm,emac4sync"; | |
| 127 | + interrupt-parent = <&EMAC1>; | |
| 128 | + interrupts = <0 1>; | |
| 129 | + #interrupt-cells = <1>; | |
| 130 | + #address-cells = <0>; | |
| 131 | + #size-cells = <0>; | |
| 132 | + interrupt-map = <0 &UIC2 0x10 IRQ_TYPE_LEVEL_HIGH /* Status */ | |
| 133 | + 1 &UIC2 0x14 IRQ_TYPE_LEVEL_HIGH /* Wake */>; | |
| 134 | + reg = <0xef600c00 0x000000c4>; | |
| 135 | + local-mac-address = [000000000000]; /* Filled in by U-Boot */ | |
| 136 | + mal-device = <&MAL0>; | |
| 137 | + mal-tx-channel = <0>; | |
| 138 | + mal-rx-channel = <0>; | |
| 139 | + cell-index = <0>; | |
| 140 | + max-frame-size = <9000>; | |
| 141 | + rx-fifo-size = <16384>; | |
| 142 | + tx-fifo-size = <2048>; | |
| 143 | + fifo-entry-size = <10>; | |
| 144 | + phy-mode = "rgmii"; | |
| 145 | + phy-handle = <&phy0>; | |
| 146 | + phy-map = <0x00000000>; | |
| 147 | + rgmii-device = <&RGMII0>; | |
| 148 | + rgmii-channel = <0>; | |
| 149 | + tah-device = <&TAH0>; | |
| 150 | + tah-channel = <0>; | |
| 151 | + has-inverted-stacr-oc; | |
| 152 | + has-new-stacr-staopc; | |
| 153 | + | |
| 154 | + mdio { | |
| 155 | + #address-cells = <1>; | |
| 156 | + #size-cells = <0>; | |
| 157 | + | |
| 158 | + phy0: ethernet-phy@0 { | |
| 159 | + compatible = "ethernet-phy-ieee802.3-c22"; | |
| 160 | + reg = <0>; | |
| 161 | + }; | |
| 162 | + }; | |
| 163 | + }; | |
| 164 | + | |
| 165 | + | |
| 107 | 166 | ii) McMAL node |
| 108 | 167 | |
| 109 | 168 | Required properties: |
| @@ -145,4 +204,3 @@ · 35 unmodified lines | ||
| 145 | 204 | - revision : as provided by the RGMII new version register if |
| 146 | 205 | available. |
| 147 | 206 | For Axon: 0x0000012a |
| 148 | − | |
| @@ -20,3 +20,8 @@ Index 1: The output gpio for enabling Vbus output from the device to the otg · 19 unmodified lines | ||
| 20 | 20 | Index 2: The output gpio for muxing of the data pins between the USB host and |
| 21 | 21 | the USB peripheral controller, write 1 to mux to the peripheral |
| 22 | 22 | controller |
| 23 | + | |
| 24 | +There is a mapping between indices and GPIO connection IDs as follows | |
| 25 | + id index 0 | |
| 26 | + vbus index 1 | |
| 27 | + mux index 2 | |
| @@ -18,8 +18,8 @@ because gcc versions 4.5 and 4.6 are compiled by a C compiler, · 17 unmodified lines | ||
| 18 | 18 | gcc-4.7 can be compiled by a C or a C++ compiler, |
| 19 | 19 | and versions 4.8+ can only be compiled by a C++ compiler. |
| 20 | 20 | |
| 21 | −Currently the GCC plugin infrastructure supports only the x86, arm and arm64 | |
| 22 | −architectures. | |
| 21 | +Currently the GCC plugin infrastructure supports only the x86, arm, arm64 and | |
| 22 | +powerpc architectures. | |
| 23 | 23 | |
| 24 | 24 | This infrastructure was ported from grsecurity [6] and PaX [7]. |
| 25 | 25 | |
| @@ -1006,7 +1006,8 @@ accept_redirects - BOOLEAN · 1005 unmodified lines | ||
| 1006 | 1006 | FALSE (router) |
| 1007 | 1007 | |
| 1008 | 1008 | forwarding - BOOLEAN |
| 1009 | − Enable IP forwarding on this interface. | |
| 1009 | + Enable IP forwarding on this interface. This controls whether packets | |
| 1010 | + received _on_ this interface can be forwarded. | |
| 1010 | 1011 | |
| 1011 | 1012 | mc_forwarding - BOOLEAN |
| 1012 | 1013 | Do multicast routing. The kernel needs to be compiled with CONFIG_MROUTE |
| @@ -3216,7 +3216,6 @@ F: drivers/platform/chrome/ · 3215 unmodified lines | ||
| 3216 | 3216 | |
| 3217 | 3217 | CISCO VIC ETHERNET NIC DRIVER |
| 3218 | 3218 | M: Christian Benvenuti <benve@cisco.com> |
| 3219 | −M: Sujith Sankar <ssujith@cisco.com> | |
| 3220 | 3219 | M: Govindarajulu Varadarajan <_govind@gmx.com> |
| 3221 | 3220 | M: Neel Patel <neepatel@cisco.com> |
| 3222 | 3221 | S: Supported |
| @@ -7773,13 +7772,6 @@ F: include/net/mac80211.h · 4550 unmodified lines | ||
| 7773 | 7772 | F: net/mac80211/ |
| 7774 | 7773 | F: drivers/net/wireless/mac80211_hwsim.[ch] |
| 7775 | 7774 | |
| 7776 | −MACVLAN DRIVER | |
| 7777 | −M: Patrick McHardy <kaber@trash.net> | |
| 7778 | −L: netdev@vger.kernel.org | |
| 7779 | −S: Maintained | |
| 7780 | −F: drivers/net/macvlan.c | |
| 7781 | −F: include/linux/if_macvlan.h | |
| 7782 | − | |
| 7783 | 7775 | MAILBOX API |
| 7784 | 7776 | M: Jassi Brar <jassisinghbrar@gmail.com> |
| 7785 | 7777 | L: linux-kernel@vger.kernel.org |
| @@ -7852,6 +7844,8 @@ F: drivers/net/ethernet/marvell/mvneta.* · 66 unmodified lines | ||
| 7852 | 7844 | MARVELL MWIFIEX WIRELESS DRIVER |
| 7853 | 7845 | M: Amitkumar Karwar <akarwar@marvell.com> |
| 7854 | 7846 | M: Nishant Sarmukadam <nishants@marvell.com> |
| 7847 | +M: Ganapathi Bhat <gbhat@marvell.com> | |
| 7848 | +M: Xinming Hu <huxm@marvell.com> | |
| 7855 | 7849 | L: linux-wireless@vger.kernel.org |
| 7856 | 7850 | S: Maintained |
| 7857 | 7851 | F: drivers/net/wireless/marvell/mwifiex/ |
| @@ -13382,14 +13376,6 @@ W: https://linuxtv.org · 5524 unmodified lines | ||
| 13382 | 13376 | S: Maintained |
| 13383 | 13377 | F: drivers/media/platform/vivid/* |
| 13384 | 13378 | |
| 13385 | −VLAN (802.1Q) | |
| 13386 | −M: Patrick McHardy <kaber@trash.net> | |
| 13387 | −L: netdev@vger.kernel.org | |
| 13388 | −S: Maintained | |
| 13389 | −F: drivers/net/macvlan.c | |
| 13390 | −F: include/linux/if_*vlan.h | |
| 13391 | −F: net/8021q/ | |
| 13392 | − | |
| 13393 | 13379 | VLYNQ BUS |
| 13394 | 13380 | M: Florian Fainelli <f.fainelli@gmail.com> |
| 13395 | 13381 | L: openwrt-devel@lists.openwrt.org (subscribers-only) |
| @@ -1,7 +1,7 @@ | ||
| 1 | 1 | VERSION = 4 |
| 2 | 2 | PATCHLEVEL = 11 |
| 3 | 3 | SUBLEVEL = 0 |
| 4 | −EXTRAVERSION = -rc2 | |
| 4 | +EXTRAVERSION = -rc4 | |
| 5 | 5 | NAME = Fearless Coyote |
| 6 | 6 | |
| 7 | 7 | # *DOCUMENTATION* |
| @@ -63,14 +63,14 @@ · 62 unmodified lines | ||
| 63 | 63 | label = "home"; |
| 64 | 64 | linux,code = <KEY_HOME>; |
| 65 | 65 | gpios = <&gpio3 7 GPIO_ACTIVE_HIGH>; |
| 66 | − gpio-key,wakeup; | |
| 66 | + wakeup-source; | |
| 67 | 67 | }; |
| 68 | 68 | |
| 69 | 69 | button@1 { |
| 70 | 70 | label = "menu"; |
| 71 | 71 | linux,code = <KEY_MENU>; |
| 72 | 72 | gpios = <&gpio3 8 GPIO_ACTIVE_HIGH>; |
| 73 | − gpio-key,wakeup; | |
| 73 | + wakeup-source; | |
| 74 | 74 | }; |
| 75 | 75 | |
| 76 | 76 | }; |
| @@ -315,6 +315,13 @@ · 314 unmodified lines | ||
| 315 | 315 | /* ID & VBUS GPIOs provided in board dts */ |
| 316 | 316 | }; |
| 317 | 317 | }; |
| 318 | + | |
| 319 | + tpic2810: tpic2810@60 { | |
| 320 | + compatible = "ti,tpic2810"; | |
| 321 | + reg = <0x60>; | |
| 322 | + gpio-controller; | |
| 323 | + #gpio-cells = <2>; | |
| 324 | + }; | |
| 318 | 325 | }; |
| 319 | 326 | |
| 320 | 327 | &mcspi3 { |
| @@ -330,13 +337,6 @@ · 9 unmodified lines | ||
| 330 | 337 | spi-max-frequency = <1000000>; |
| 331 | 338 | spi-cpol; |
| 332 | 339 | }; |
| 333 | − | |
| 334 | − tpic2810: tpic2810@60 { | |
| 335 | − compatible = "ti,tpic2810"; | |
| 336 | − reg = <0x60>; | |
| 337 | − gpio-controller; | |
| 338 | − #gpio-cells = <2>; | |
| 339 | − }; | |
| 340 | 340 | }; |
| 341 | 341 | |
| 342 | 342 | &uart3 { |
| @@ -66,14 +66,14 @@ · 65 unmodified lines | ||
| 66 | 66 | timer@20200 { |
| 67 | 67 | compatible = "arm,cortex-a9-global-timer"; |
| 68 | 68 | reg = <0x20200 0x100>; |
| 69 | − interrupts = <GIC_PPI 11 IRQ_TYPE_LEVEL_HIGH>; | |
| 69 | + interrupts = <GIC_PPI 11 IRQ_TYPE_EDGE_RISING>; | |
| 70 | 70 | clocks = <&periph_clk>; |
| 71 | 71 | }; |
| 72 | 72 | |
| 73 | 73 | local-timer@20600 { |
| 74 | 74 | compatible = "arm,cortex-a9-twd-timer"; |
| 75 | 75 | reg = <0x20600 0x100>; |
| 76 | − interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_HIGH>; | |
| 76 | + interrupts = <GIC_PPI 13 IRQ_TYPE_EDGE_RISING>; | |
| 77 | 77 | clocks = <&periph_clk>; |
| 78 | 78 | }; |
| 79 | 79 | |
| @@ -48,15 +48,14 @@ · 47 unmodified lines | ||
| 48 | 48 | }; |
| 49 | 49 | |
| 50 | 50 | memory { |
| 51 | − reg = <0x00000000 0x10000000>; | |
| 51 | + reg = <0x80000000 0x10000000>; | |
| 52 | 52 | }; |
| 53 | 53 | }; |
| 54 | 54 | |
| 55 | 55 | &uart0 { |
| 56 | − clock-frequency = <62499840>; | |
| 56 | + status = "okay"; | |
| 57 | 57 | }; |
| 58 | 58 | |
| 59 | 59 | &uart1 { |
| 60 | − clock-frequency = <62499840>; | |
| 61 | 60 | status = "okay"; |
| 62 | 61 | }; |
| @@ -55,6 +55,7 @@ · 54 unmodified lines | ||
| 55 | 55 | gpio-restart { |
| 56 | 56 | compatible = "gpio-restart"; |
| 57 | 57 | gpios = <&gpioa 15 GPIO_ACTIVE_LOW>; |
| 58 | + open-source; | |
| 58 | 59 | priority = <200>; |
| 59 | 60 | }; |
| 60 | 61 | }; |
| @@ -55,6 +55,7 @@ · 54 unmodified lines | ||
| 55 | 55 | gpio-restart { |
| 56 | 56 | compatible = "gpio-restart"; |
| 57 | 57 | gpios = <&gpioa 15 GPIO_ACTIVE_LOW>; |
| 58 | + open-source; | |
| 58 | 59 | priority = <200>; |
| 59 | 60 | }; |
| 60 | 61 | }; |
| @@ -55,6 +55,7 @@ · 54 unmodified lines | ||
| 55 | 55 | gpio-restart { |
| 56 | 56 | compatible = "gpio-restart"; |
| 57 | 57 | gpios = <&gpioa 31 GPIO_ACTIVE_LOW>; |
| 58 | + open-source; | |
| 58 | 59 | priority = <200>; |
| 59 | 60 | }; |
| 60 | 61 | }; |
| @@ -55,6 +55,7 @@ · 54 unmodified lines | ||
| 55 | 55 | gpio-restart { |
| 56 | 56 | compatible = "gpio-restart"; |
| 57 | 57 | gpios = <&gpioa 15 GPIO_ACTIVE_LOW>; |
| 58 | + open-source; | |
| 58 | 59 | priority = <200>; |
| 59 | 60 | }; |
| 60 | 61 | }; |
| @@ -55,6 +55,7 @@ · 54 unmodified lines | ||
| 55 | 55 | gpio-restart { |
| 56 | 56 | compatible = "gpio-restart"; |
| 57 | 57 | gpios = <&gpioa 15 GPIO_ACTIVE_LOW>; |
| 58 | + open-source; | |
| 58 | 59 | priority = <200>; |
| 59 | 60 | }; |
| 60 | 61 | }; |
| @@ -55,6 +55,7 @@ · 54 unmodified lines | ||
| 55 | 55 | gpio-restart { |
| 56 | 56 | compatible = "gpio-restart"; |
| 57 | 57 | gpios = <&gpioa 15 GPIO_ACTIVE_LOW>; |
| 58 | + open-source; | |
| 58 | 59 | priority = <200>; |
| 59 | 60 | }; |
| 60 | 61 | }; |
| @@ -55,6 +55,7 @@ · 54 unmodified lines | ||
| 55 | 55 | gpio-restart { |
| 56 | 56 | compatible = "gpio-restart"; |
| 57 | 57 | gpios = <&gpioa 15 GPIO_ACTIVE_LOW>; |
| 58 | + open-source; | |
| 58 | 59 | priority = <200>; |
| 59 | 60 | }; |
| 60 | 61 | }; |
| @@ -121,11 +121,6 @@ · 120 unmodified lines | ||
| 121 | 121 | }; |
| 122 | 122 | }; |
| 123 | 123 | |
| 124 | −&cpu0 { | |
| 125 | − arm-supply = <&sw1a_reg>; | |
| 126 | − soc-supply = <&sw1c_reg>; | |
| 127 | −}; | |
| 128 | − | |
| 129 | 124 | &fec1 { |
| 130 | 125 | pinctrl-names = "default"; |
| 131 | 126 | pinctrl-0 = <&pinctrl_enet1>; |
| @@ -266,7 +266,7 @@ · 265 unmodified lines | ||
| 266 | 266 | }; |
| 267 | 267 | |
| 268 | 268 | usb1: ohci@00400000 { |
| 269 | − compatible = "atmel,sama5d2-ohci", "usb-ohci"; | |
| 269 | + compatible = "atmel,at91rm9200-ohci", "usb-ohci"; | |
| 270 | 270 | reg = <0x00400000 0x100000>; |
| 271 | 271 | interrupts = <41 IRQ_TYPE_LEVEL_HIGH 2>; |
| 272 | 272 | clocks = <&uhphs_clk>, <&uhphs_clk>, <&uhpck>; |
| @@ -14,6 +14,7 @@ · 13 unmodified lines | ||
| 14 | 14 | #include <dt-bindings/mfd/dbx500-prcmu.h> |
| 15 | 15 | #include <dt-bindings/arm/ux500_pm_domains.h> |
| 16 | 16 | #include <dt-bindings/gpio/gpio.h> |
| 17 | +#include <dt-bindings/clock/ste-ab8500.h> | |
| 17 | 18 | #include "skeleton.dtsi" |
| 18 | 19 | |
| 19 | 20 | / { |
| @@ -603,6 +604,11 @@ · 583 unmodified lines | ||
| 603 | 604 | interrupt-controller; |
| 604 | 605 | #interrupt-cells = <2>; |
| 605 | 606 | |
| 607 | + ab8500_clock: clock-controller { | |
| 608 | + compatible = "stericsson,ab8500-clk"; | |
| 609 | + #clock-cells = <1>; | |
| 610 | + }; | |
| 611 | + | |
| 606 | 612 | ab8500_gpio: ab8500-gpio { |
| 607 | 613 | compatible = "stericsson,ab8500-gpio"; |
| 608 | 614 | gpio-controller; |
| @@ -686,6 +692,8 @@ · 77 unmodified lines | ||
| 686 | 692 | |
| 687 | 693 | ab8500-pwm { |
| 688 | 694 | compatible = "stericsson,ab8500-pwm"; |
| 695 | + clocks = <&ab8500_clock AB8500_SYSCLK_INT>; | |
| 696 | + clock-names = "intclk"; | |
| 689 | 697 | }; |
| 690 | 698 | |
| 691 | 699 | ab8500-debugfs { |
| @@ -700,6 +708,9 @@ · 8 unmodified lines | ||
| 700 | 708 | V-AMIC2-supply = <&ab8500_ldo_anamic2_reg>; |
| 701 | 709 | V-DMIC-supply = <&ab8500_ldo_dmic_reg>; |
| 702 | 710 | |
| 711 | + clocks = <&ab8500_clock AB8500_SYSCLK_AUDIO>; | |
| 712 | + clock-names = "audioclk"; | |
| 713 | + | |
| 703 | 714 | stericsson,earpeice-cmv = <950>; /* Units in mV. */ |
| 704 | 715 | }; |
| 705 | 716 | |
| @@ -1095,6 +1106,14 @@ · 389 unmodified lines | ||
| 1095 | 1106 | status = "disabled"; |
| 1096 | 1107 | }; |
| 1097 | 1108 | |
| 1109 | + sound { | |
| 1110 | + compatible = "stericsson,snd-soc-mop500"; | |
| 1111 | + stericsson,cpu-dai = <&msp1 &msp3>; | |
| 1112 | + stericsson,audio-codec = <&codec>; | |
| 1113 | + clocks = <&prcmu_clk PRCMU_SYSCLK>, <&ab8500_clock AB8500_SYSCLK_ULP>, <&ab8500_clock AB8500_SYSCLK_INT>; | |
| 1114 | + clock-names = "sysclk", "ulpclk", "intclk"; | |
| 1115 | + }; | |
| 1116 | + | |
| 1098 | 1117 | msp0: msp@80123000 { |
| 1099 | 1118 | compatible = "stericsson,ux500-msp-i2s"; |
| 1100 | 1119 | reg = <0x80123000 0x1000>; |
| @@ -186,15 +186,6 @@ · 185 unmodified lines | ||
| 186 | 186 | status = "okay"; |
| 187 | 187 | }; |
| 188 | 188 | |
| 189 | − sound { | |
| 190 | − compatible = "stericsson,snd-soc-mop500"; | |
| 191 | − | |
| 192 | − stericsson,cpu-dai = <&msp1 &msp3>; | |
| 193 | − stericsson,audio-codec = <&codec>; | |
| 194 | − clocks = <&prcmu_clk PRCMU_SYSCLK>; | |
| 195 | − clock-names = "sysclk"; | |
| 196 | − }; | |
| 197 | − | |
| 198 | 189 | msp0: msp@80123000 { |
| 199 | 190 | pinctrl-names = "default"; |
| 200 | 191 | pinctrl-0 = <&msp0_default_mode>; |
| @@ -159,15 +159,6 @@ · 158 unmodified lines | ||
| 159 | 159 | "", "", "", "", "", "", "", ""; |
| 160 | 160 | }; |
| 161 | 161 | |
| 162 | − sound { | |
| 163 | − compatible = "stericsson,snd-soc-mop500"; | |
| 164 | − | |
| 165 | − stericsson,cpu-dai = <&msp1 &msp3>; | |
| 166 | − stericsson,audio-codec = <&codec>; | |
| 167 | − clocks = <&prcmu_clk PRCMU_SYSCLK>; | |
| 168 | − clock-names = "sysclk"; | |
| 169 | − }; | |
| 170 | − | |
| 171 | 162 | msp0: msp@80123000 { |
| 172 | 163 | pinctrl-names = "default"; |
| 173 | 164 | pinctrl-0 = <&msp0_default_mode>; |
| @@ -167,7 +167,7 @@ · 166 unmodified lines | ||
| 167 | 167 | reg = <8>; |
| 168 | 168 | label = "cpu"; |
| 169 | 169 | ethernet = <&gmac>; |
| 170 | − phy-mode = "rgmii"; | |
| 170 | + phy-mode = "rgmii-txid"; | |
| 171 | 171 | fixed-link { |
| 172 | 172 | speed = <1000>; |
| 173 | 173 | full-duplex; |
| @@ -495,7 +495,7 @@ · 494 unmodified lines | ||
| 495 | 495 | resets = <&ccu RST_BUS_GPU>; |
| 496 | 496 | |
| 497 | 497 | assigned-clocks = <&ccu CLK_GPU>; |
| 498 | − assigned-clock-rates = <408000000>; | |
| 498 | + assigned-clock-rates = <384000000>; | |
| 499 | 499 | }; |
| 500 | 500 | |
| 501 | 501 | gic: interrupt-controller@01c81000 { |
| @@ -50,8 +50,6 @@ · 49 unmodified lines | ||
| 50 | 50 | |
| 51 | 51 | backlight: backlight { |
| 52 | 52 | compatible = "pwm-backlight"; |
| 53 | − pinctrl-names = "default"; | |
| 54 | − pinctrl-0 = <&bl_en_pin>; | |
| 55 | 53 | pwms = <&pwm 0 50000 PWM_POLARITY_INVERTED>; |
| 56 | 54 | brightness-levels = <0 10 20 30 40 50 60 70 80 90 100>; |
| 57 | 55 | default-brightness-level = <8>; |
| @@ -93,11 +91,6 @@ · 35 unmodified lines | ||
| 93 | 91 | }; |
| 94 | 92 | |
| 95 | 93 | &pio { |
| 96 | − bl_en_pin: bl_en_pin@0 { | |
| 97 | − pins = "PH6"; | |
| 98 | − function = "gpio_in"; | |
| 99 | − }; | |
| 100 | − | |
| 101 | 94 | mmc0_cd_pin: mmc0_cd_pin@0 { |
| 102 | 95 | pins = "PB4"; |
| 103 | 96 | function = "gpio_in"; |
| @@ -188,6 +188,7 @@ CONFIG_WL12XX=m · 187 unmodified lines | ||
| 188 | 188 | CONFIG_WL18XX=m |
| 189 | 189 | CONFIG_WLCORE_SPI=m |
| 190 | 190 | CONFIG_WLCORE_SDIO=m |
| 191 | +CONFIG_INPUT_MOUSEDEV=m | |
| 191 | 192 | CONFIG_INPUT_JOYDEV=m |
| 192 | 193 | CONFIG_INPUT_EVDEV=m |
| 193 | 194 | CONFIG_KEYBOARD_ATKBD=m |
| @@ -289,6 +289,22 @@ static void at91_ddr_standby(void) · 288 unmodified lines | ||
| 289 | 289 | at91_ramc_write(1, AT91_DDRSDRC_LPR, saved_lpr1); |
| 290 | 290 | } |
| 291 | 291 | |
| 292 | +static void sama5d3_ddr_standby(void) | |
| 293 | +{ | |
| 294 | + u32 lpr0; | |
| 295 | + u32 saved_lpr0; | |
| 296 | + | |
| 297 | + saved_lpr0 = at91_ramc_read(0, AT91_DDRSDRC_LPR); | |
| 298 | + lpr0 = saved_lpr0 & ~AT91_DDRSDRC_LPCB; | |
| 299 | + lpr0 |= AT91_DDRSDRC_LPCB_POWER_DOWN; | |
| 300 | + | |
| 301 | + at91_ramc_write(0, AT91_DDRSDRC_LPR, lpr0); | |
| 302 | + | |
| 303 | + cpu_do_idle(); | |
| 304 | + | |
| 305 | + at91_ramc_write(0, AT91_DDRSDRC_LPR, saved_lpr0); | |
| 306 | +} | |
| 307 | + | |
| 292 | 308 | /* We manage both DDRAM/SDRAM controllers, we need more than one value to |
| 293 | 309 | * remember. |
| 294 | 310 | */ |
| @@ -323,7 +339,7 @@ static const struct of_device_id const ramc_ids[] __initconst = { · 28 unmodified lines | ||
| 323 | 339 | { .compatible = "atmel,at91rm9200-sdramc", .data = at91rm9200_standby }, |
| 324 | 340 | { .compatible = "atmel,at91sam9260-sdramc", .data = at91sam9_sdram_standby }, |
| 325 | 341 | { .compatible = "atmel,at91sam9g45-ddramc", .data = at91_ddr_standby }, |
| 326 | − { .compatible = "atmel,sama5d3-ddramc", .data = at91_ddr_standby }, | |
| 342 | + { .compatible = "atmel,sama5d3-ddramc", .data = sama5d3_ddr_standby }, | |
| 327 | 343 | { /*sentinel*/ } |
| 328 | 344 | }; |
| 329 | 345 | |
| @@ -241,6 +241,3 @@ obj-$(CONFIG_MACH_OMAP2_TUSB6010) += usb-tusb6010.o · 240 unmodified lines | ||
| 241 | 241 | |
| 242 | 242 | onenand-$(CONFIG_MTD_ONENAND_OMAP2) := gpmc-onenand.o |
| 243 | 243 | obj-y += $(onenand-m) $(onenand-y) |
| 244 | − | |
| 245 | −nand-$(CONFIG_MTD_NAND_OMAP2) := gpmc-nand.o | |
| 246 | −obj-y += $(nand-m) $(nand-y) | |
| @@ -1,154 +0,0 @@ | ||
| 1 | −/* | |
| 2 | − * gpmc-nand.c | |
| 3 | − * | |
| 4 | − * Copyright (C) 2009 Texas Instruments | |
| 5 | − * Vimal Singh <vimalsingh@ti.com> | |
| 6 | − * | |
| 7 | − * This program is free software; you can redistribute it and/or modify | |
| 8 | − * it under the terms of the GNU General Public License version 2 as | |
| 9 | − * published by the Free Software Foundation. | |
| 10 | − */ | |
| 11 | − | |
| 12 | −#include <linux/kernel.h> | |
| 13 | −#include <linux/platform_device.h> | |
| 14 | −#include <linux/io.h> | |
| 15 | −#include <linux/omap-gpmc.h> | |
| 16 | −#include <linux/mtd/nand.h> | |
| 17 | −#include <linux/platform_data/mtd-nand-omap2.h> | |
| 18 | − | |
| 19 | −#include <asm/mach/flash.h> | |
| 20 | − | |
| 21 | −#include "soc.h" | |
| 22 | − | |
| 23 | −/* minimum size for IO mapping */ | |
| 24 | −#define NAND_IO_SIZE 4 | |
| 25 | − | |
| 26 | −static bool gpmc_hwecc_bch_capable(enum omap_ecc ecc_opt) | |
| 27 | −{ | |
| 28 | − /* platforms which support all ECC schemes */ | |
| 29 | − if (soc_is_am33xx() || soc_is_am43xx() || cpu_is_omap44xx() || | |
| 30 | − soc_is_omap54xx() || soc_is_dra7xx()) | |
| 31 | − return 1; | |
| 32 | − | |
| 33 | − if (ecc_opt == OMAP_ECC_BCH4_CODE_HW_DETECTION_SW || | |
| 34 | − ecc_opt == OMAP_ECC_BCH8_CODE_HW_DETECTION_SW) { | |
| 35 | − if (cpu_is_omap24xx()) | |
| 36 | − return 0; | |
| 37 | − else if (cpu_is_omap3630() && (GET_OMAP_REVISION() == 0)) | |
| 38 | − return 0; | |
| 39 | − else | |
| 40 | − return 1; | |
| 41 | − } | |
| 42 | − | |
| 43 | − /* OMAP3xxx do not have ELM engine, so cannot support ECC schemes | |
| 44 | − * which require H/W based ECC error detection */ | |
| 45 | − if ((cpu_is_omap34xx() || cpu_is_omap3630()) && | |
| 46 | − ((ecc_opt == OMAP_ECC_BCH4_CODE_HW) || | |
| 47 | − (ecc_opt == OMAP_ECC_BCH8_CODE_HW))) | |
| 48 | − return 0; | |
| 49 | − | |
| 50 | − /* legacy platforms support only HAM1 (1-bit Hamming) ECC scheme */ | |
| 51 | − if (ecc_opt == OMAP_ECC_HAM1_CODE_HW || | |
| 52 | − ecc_opt == OMAP_ECC_HAM1_CODE_SW) | |
| 53 | − return 1; | |
| 54 | − else | |
| 55 | − return 0; | |
| 56 | −} | |
| 57 | − | |
| 58 | −/* This function will go away once the device-tree convertion is complete */ | |
| 59 | −static void gpmc_set_legacy(struct omap_nand_platform_data *gpmc_nand_data, | |
| 60 | − struct gpmc_settings *s) | |
| 61 | −{ | |
| 62 | − /* Enable RD PIN Monitoring Reg */ | |
| 63 | − if (gpmc_nand_data->dev_ready) { | |
| 64 | − s->wait_on_read = true; | |
| 65 | − s->wait_on_write = true; | |
| 66 | − } | |
| 67 | − | |
| 68 | − if (gpmc_nand_data->devsize == NAND_BUSWIDTH_16) | |
| 69 | − s->device_width = GPMC_DEVWIDTH_16BIT; | |
| 70 | − else | |
| 71 | − s->device_width = GPMC_DEVWIDTH_8BIT; | |
| 72 | −} | |
| 73 | − | |
| 74 | −int gpmc_nand_init(struct omap_nand_platform_data *gpmc_nand_data, | |
| 75 | − struct gpmc_timings *gpmc_t) | |
| 76 | −{ | |
| 77 | − int err = 0; | |
| 78 | − struct gpmc_settings s; | |
| 79 | − struct platform_device *pdev; | |
| 80 | − struct resource gpmc_nand_res[] = { | |
| 81 | − { .flags = IORESOURCE_MEM, }, | |
| 82 | − { .flags = IORESOURCE_IRQ, }, | |
| 83 | − { .flags = IORESOURCE_IRQ, }, | |
| 84 | − }; | |
| 85 | − | |
| 86 | − BUG_ON(gpmc_nand_data->cs >= GPMC_CS_NUM); | |
| 87 | − | |
| 88 | − err = gpmc_cs_request(gpmc_nand_data->cs, NAND_IO_SIZE, | |
| 89 | − (unsigned long *)&gpmc_nand_res[0].start); | |
| 90 | − if (err < 0) { | |
| 91 | − pr_err("omap2-gpmc: Cannot request GPMC CS %d, error %d\n", | |
| 92 | − gpmc_nand_data->cs, err); | |
| 93 | − return err; | |
| 94 | − } | |
| 95 | − gpmc_nand_res[0].end = gpmc_nand_res[0].start + NAND_IO_SIZE - 1; | |
| 96 | − gpmc_nand_res[1].start = gpmc_get_client_irq(GPMC_IRQ_FIFOEVENTENABLE); | |
| 97 | − gpmc_nand_res[2].start = gpmc_get_client_irq(GPMC_IRQ_COUNT_EVENT); | |
| 98 | − | |
| 99 | − memset(&s, 0, sizeof(struct gpmc_settings)); | |
| 100 | − gpmc_set_legacy(gpmc_nand_data, &s); | |
| 101 | − | |
| 102 | − s.device_nand = true; | |
| 103 | − | |
| 104 | − if (gpmc_t) { | |
| 105 | − err = gpmc_cs_set_timings(gpmc_nand_data->cs, gpmc_t, &s); | |
| 106 | − if (err < 0) { | |
| 107 | − pr_err("omap2-gpmc: Unable to set gpmc timings: %d\n", | |
| 108 | − err); | |
| 109 | − return err; | |
| 110 | − } | |
| 111 | − } | |
| 112 | − | |
| 113 | − err = gpmc_cs_program_settings(gpmc_nand_data->cs, &s); | |
| 114 | − if (err < 0) | |
| 115 | − goto out_free_cs; | |
| 116 | − | |
| 117 | − err = gpmc_configure(GPMC_CONFIG_WP, 0); | |
| 118 | − if (err < 0) | |
| 119 | − goto out_free_cs; | |
| 120 | − | |
| 121 | − if (!gpmc_hwecc_bch_capable(gpmc_nand_data->ecc_opt)) { | |
| 122 | − pr_err("omap2-nand: Unsupported NAND ECC scheme selected\n"); | |
| 123 | − err = -EINVAL; | |
| 124 | − goto out_free_cs; | |
| 125 | − } | |
| 126 | − | |
| 127 | − | |
| 128 | − pdev = platform_device_alloc("omap2-nand", gpmc_nand_data->cs); | |
| 129 | − if (pdev) { | |
| 130 | − err = platform_device_add_resources(pdev, gpmc_nand_res, | |
| 131 | − ARRAY_SIZE(gpmc_nand_res)); | |
| 132 | − if (!err) | |
| 133 | − pdev->dev.platform_data = gpmc_nand_data; | |
| 134 | − } else { | |
| 135 | − err = -ENOMEM; | |
| 136 | − } | |
| 137 | − if (err) | |
| 138 | − goto out_free_pdev; | |
| 139 | − | |
| 140 | − err = platform_device_add(pdev); | |
| 141 | − if (err) { | |
| 142 | − dev_err(&pdev->dev, "Unable to register NAND device\n"); | |
| 143 | − goto out_free_pdev; | |
| 144 | − } | |
| 145 | − | |
| 146 | − return 0; | |
| 147 | − | |
| 148 | −out_free_pdev: | |
| 149 | − platform_device_put(pdev); | |
| 150 | −out_free_cs: | |
| 151 | − gpmc_cs_free(gpmc_nand_data->cs); | |
| 152 | − | |
| 153 | − return err; | |
| 154 | −} | |
| @@ -367,7 +367,7 @@ static int gpmc_onenand_setup(void __iomem *onenand_base, int *freq_ptr) · 366 unmodified lines | ||
| 367 | 367 | return ret; |
| 368 | 368 | } |
| 369 | 369 | |
| 370 | −void gpmc_onenand_init(struct omap_onenand_platform_data *_onenand_data) | |
| 370 | +int gpmc_onenand_init(struct omap_onenand_platform_data *_onenand_data) | |
| 371 | 371 | { |
| 372 | 372 | int err; |
| 373 | 373 | struct device *dev = &gpmc_onenand_device.dev; |
| @@ -393,15 +393,17 @@ void gpmc_onenand_init(struct omap_onenand_platform_data *_onenand_data) · 19 unmodified lines | ||
| 393 | 393 | if (err < 0) { |
| 394 | 394 | dev_err(dev, "Cannot request GPMC CS %d, error %d\n", |
| 395 | 395 | gpmc_onenand_data->cs, err); |
| 396 | − return; | |
| 396 | + return err; | |
| 397 | 397 | } |
| 398 | 398 | |
| 399 | 399 | gpmc_onenand_resource.end = gpmc_onenand_resource.start + |
| 400 | 400 | ONENAND_IO_SIZE - 1; |
| 401 | 401 | |
| 402 | − if (platform_device_register(&gpmc_onenand_device) < 0) { | |
| 402 | + err = platform_device_register(&gpmc_onenand_device); | |
| 403 | + if (err) { | |
| 403 | 404 | dev_err(dev, "Unable to register OneNAND device\n"); |
| 404 | 405 | gpmc_cs_free(gpmc_onenand_data->cs); |
| 405 | − return; | |
| 406 | 406 | } |
| 407 | + | |
| 408 | + return err; | |
| 407 | 409 | } |
| @@ -17,6 +17,7 @@ · 16 unmodified lines | ||
| 17 | 17 | |
| 18 | 18 | #include <linux/linkage.h> |
| 19 | 19 | #include <linux/init.h> |
| 20 | +#include <asm/assembler.h> | |
| 20 | 21 | |
| 21 | 22 | #include "omap44xx.h" |
| 22 | 23 | |
| @@ -66,7 +67,7 @@ wait_2: ldr r2, =AUX_CORE_BOOT0_PA @ read from AuxCoreBoot0 · 43 unmodified lines | ||
| 66 | 67 | cmp r0, r4 |
| 67 | 68 | bne wait_2 |
| 68 | 69 | ldr r12, =API_HYP_ENTRY |
| 69 | − adr r0, hyp_boot | |
| 70 | + badr r0, hyp_boot | |
| 70 | 71 | smc #0 |
| 71 | 72 | hyp_boot: |
| 72 | 73 | b omap_secondary_startup |
| @@ -2112,11 +2112,20 @@ static struct omap_hwmod_ocp_if omap3_l4_core__i2c3 = { · 2111 unmodified lines | ||
| 2112 | 2112 | }; |
| 2113 | 2113 | |
| 2114 | 2114 | /* L4 CORE -> SR1 interface */ |
| 2115 | +static struct omap_hwmod_addr_space omap3_sr1_addr_space[] = { | |
| 2116 | + { | |
| 2117 | + .pa_start = OMAP34XX_SR1_BASE, | |
| 2118 | + .pa_end = OMAP34XX_SR1_BASE + SZ_1K - 1, | |
| 2119 | + .flags = ADDR_TYPE_RT, | |
| 2120 | + }, | |
| 2121 | + { }, | |
| 2122 | +}; | |
| 2115 | 2123 | |
| 2116 | 2124 | static struct omap_hwmod_ocp_if omap34xx_l4_core__sr1 = { |
| 2117 | 2125 | .master = &omap3xxx_l4_core_hwmod, |
| 2118 | 2126 | .slave = &omap34xx_sr1_hwmod, |
| 2119 | 2127 | .clk = "sr_l4_ick", |
| 2128 | + .addr = omap3_sr1_addr_space, | |
| 2120 | 2129 | .user = OCP_USER_MPU, |
| 2121 | 2130 | }; |
| 2122 | 2131 | |
| @@ -2124,15 +2133,25 @@ static struct omap_hwmod_ocp_if omap36xx_l4_core__sr1 = { · 1 unmodified line | ||
| 2124 | 2133 | .master = &omap3xxx_l4_core_hwmod, |
| 2125 | 2134 | .slave = &omap36xx_sr1_hwmod, |
| 2126 | 2135 | .clk = "sr_l4_ick", |
| 2136 | + .addr = omap3_sr1_addr_space, | |
| 2127 | 2137 | .user = OCP_USER_MPU, |
| 2128 | 2138 | }; |
| 2129 | 2139 | |
| 2130 | 2140 | /* L4 CORE -> SR1 interface */ |
| 2141 | +static struct omap_hwmod_addr_space omap3_sr2_addr_space[] = { | |
| 2142 | + { | |
| 2143 | + .pa_start = OMAP34XX_SR2_BASE, | |
| 2144 | + .pa_end = OMAP34XX_SR2_BASE + SZ_1K - 1, | |
| 2145 | + .flags = ADDR_TYPE_RT, | |
| 2146 | + }, | |
| 2147 | + { }, | |
| 2148 | +}; | |
| 2131 | 2149 | |
| 2132 | 2150 | static struct omap_hwmod_ocp_if omap34xx_l4_core__sr2 = { |
| 2133 | 2151 | .master = &omap3xxx_l4_core_hwmod, |
| 2134 | 2152 | .slave = &omap34xx_sr2_hwmod, |
| 2135 | 2153 | .clk = "sr_l4_ick", |
| 2154 | + .addr = omap3_sr2_addr_space, | |
| 2136 | 2155 | .user = OCP_USER_MPU, |
| 2137 | 2156 | }; |
| 2138 | 2157 | |
| @@ -2140,6 +2159,7 @@ static struct omap_hwmod_ocp_if omap36xx_l4_core__sr2 = { · 1 unmodified line | ||
| 2140 | 2159 | .master = &omap3xxx_l4_core_hwmod, |
| 2141 | 2160 | .slave = &omap36xx_sr2_hwmod, |
| 2142 | 2161 | .clk = "sr_l4_ick", |
| 2162 | + .addr = omap3_sr2_addr_space, | |
| 2143 | 2163 | .user = OCP_USER_MPU, |
| 2144 | 2164 | }; |
| 2145 | 2165 | |
| @@ -3111,16 +3131,20 @@ static struct omap_hwmod_ocp_if *omap3xxx_dss_hwmod_ocp_ifs[] __initdata = { · 965 unmodified lines | ||
| 3111 | 3131 | * Return: 0 if device named @dev_name is not likely to be accessible, |
| 3112 | 3132 | * or 1 if it is likely to be accessible. |
| 3113 | 3133 | */ |
| 3114 | −static int __init omap3xxx_hwmod_is_hs_ip_block_usable(struct device_node *bus, | |
| 3115 | − const char *dev_name) | |
| 3134 | +static bool __init omap3xxx_hwmod_is_hs_ip_block_usable(struct device_node *bus, | |
| 3135 | + const char *dev_name) | |
| 3116 | 3136 | { |
| 3137 | + struct device_node *node; | |
| 3138 | + bool available; | |
| 3139 | + | |
| 3117 | 3140 | if (!bus) |
| 3118 | − return (omap_type() == OMAP2_DEVICE_TYPE_GP) ? 1 : 0; | |
| 3141 | + return omap_type() == OMAP2_DEVICE_TYPE_GP; | |
| 3119 | 3142 | |
| 3120 | − if (of_device_is_available(of_find_node_by_name(bus, dev_name))) | |
| 3121 | − return 1; | |
| 3143 | + node = of_get_child_by_name(bus, dev_name); | |
| 3144 | + available = of_device_is_available(node); | |
| 3145 | + of_node_put(node); | |
| 3122 | 3146 | |
| 3123 | − return 0; | |
| 3147 | + return available; | |
| 3124 | 3148 | } |
| 3125 | 3149 | |
| 3126 | 3150 | int __init omap3xxx_hwmod_init(void) |
| @@ -3189,15 +3213,20 @@ int __init omap3xxx_hwmod_init(void) · 62 unmodified lines | ||
| 3189 | 3213 | |
| 3190 | 3214 | if (h_sham && omap3xxx_hwmod_is_hs_ip_block_usable(bus, "sham")) { |
| 3191 | 3215 | r = omap_hwmod_register_links(h_sham); |
| 3192 | − if (r < 0) | |
| 3216 | + if (r < 0) { | |
| 3217 | + of_node_put(bus); | |
| 3193 | 3218 | return r; |
| 3219 | + } | |
| 3194 | 3220 | } |
| 3195 | 3221 | |
| 3196 | 3222 | if (h_aes && omap3xxx_hwmod_is_hs_ip_block_usable(bus, "aes")) { |
| 3197 | 3223 | r = omap_hwmod_register_links(h_aes); |
| 3198 | − if (r < 0) | |
| 3224 | + if (r < 0) { | |
| 3225 | + of_node_put(bus); | |
| 3199 | 3226 | return r; |
| 3227 | + } | |
| 3200 | 3228 | } |
| 3229 | + of_node_put(bus); | |
| 3201 | 3230 | |
| 3202 | 3231 | /* |
| 3203 | 3232 | * Register hwmod links specific to certain ES levels of a |
| @@ -411,3 +411,4 @@ · 410 unmodified lines | ||
| 411 | 411 | 394 common pkey_mprotect sys_pkey_mprotect |
| 412 | 412 | 395 common pkey_alloc sys_pkey_alloc |
| 413 | 413 | 396 common pkey_free sys_pkey_free |
| 414 | +397 common statx sys_statx | |
| @@ -1073,6 +1073,10 @@ config SYSVIPC_COMPAT · 1072 unmodified lines | ||
| 1073 | 1073 | def_bool y |
| 1074 | 1074 | depends on COMPAT && SYSVIPC |
| 1075 | 1075 | |
| 1076 | +config KEYS_COMPAT | |
| 1077 | + def_bool y | |
| 1078 | + depends on COMPAT && KEYS | |
| 1079 | + | |
| 1076 | 1080 | endmenu |
| 1077 | 1081 | |
| 1078 | 1082 | menu "Power management options" |
| @@ -114,6 +114,7 @@ · 113 unmodified lines | ||
| 114 | 114 | pcie0: pcie@20020000 { |
| 115 | 115 | compatible = "brcm,iproc-pcie"; |
| 116 | 116 | reg = <0 0x20020000 0 0x1000>; |
| 117 | + dma-coherent; | |
| 117 | 118 | |
| 118 | 119 | #interrupt-cells = <1>; |
| 119 | 120 | interrupt-map-mask = <0 0 0 0>; |
| @@ -144,6 +145,7 @@ · 24 unmodified lines | ||
| 144 | 145 | pcie4: pcie@50020000 { |
| 145 | 146 | compatible = "brcm,iproc-pcie"; |
| 146 | 147 | reg = <0 0x50020000 0 0x1000>; |
| 148 | + dma-coherent; | |
| 147 | 149 | |
| 148 | 150 | #interrupt-cells = <1>; |
| 149 | 151 | interrupt-map-mask = <0 0 0 0>; |
| @@ -174,6 +176,7 @@ · 24 unmodified lines | ||
| 174 | 176 | pcie8: pcie@60c00000 { |
| 175 | 177 | compatible = "brcm,iproc-pcie-paxc"; |
| 176 | 178 | reg = <0 0x60c00000 0 0x1000>; |
| 179 | + dma-coherent; | |
| 177 | 180 | linux,pci-domain = <8>; |
| 178 | 181 | |
| 179 | 182 | bus-range = <0x0 0x1>; |
| @@ -203,6 +206,7 @@ · 23 unmodified lines | ||
| 203 | 206 | <0x61030000 0x100>; |
| 204 | 207 | reg-names = "amac_base", "idm_base", "nicpm_base"; |
| 205 | 208 | interrupts = <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>; |
| 209 | + dma-coherent; | |
| 206 | 210 | phy-handle = <&gphy0>; |
| 207 | 211 | phy-mode = "rgmii"; |
| 208 | 212 | status = "disabled"; |
| @@ -213,6 +217,7 @@ · 4 unmodified lines | ||
| 213 | 217 | reg = <0x612c0000 0x445>; /* PDC FS0 regs */ |
| 214 | 218 | interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>; |
| 215 | 219 | #mbox-cells = <1>; |
| 220 | + dma-coherent; | |
| 216 | 221 | brcm,rx-status-len = <32>; |
| 217 | 222 | brcm,use-bcm-hdr; |
| 218 | 223 | }; |
| @@ -222,6 +227,7 @@ · 3 unmodified lines | ||
| 222 | 227 | reg = <0x612e0000 0x445>; /* PDC FS1 regs */ |
| 223 | 228 | interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>; |
| 224 | 229 | #mbox-cells = <1>; |
| 230 | + dma-coherent; | |
| 225 | 231 | brcm,rx-status-len = <32>; |
| 226 | 232 | brcm,use-bcm-hdr; |
| 227 | 233 | }; |
| @@ -231,6 +237,7 @@ · 3 unmodified lines | ||
| 231 | 237 | reg = <0x61300000 0x445>; /* PDC FS2 regs */ |
| 232 | 238 | interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>; |
| 233 | 239 | #mbox-cells = <1>; |
| 240 | + dma-coherent; | |
| 234 | 241 | brcm,rx-status-len = <32>; |
| 235 | 242 | brcm,use-bcm-hdr; |
| 236 | 243 | }; |
| @@ -240,6 +247,7 @@ · 3 unmodified lines | ||
| 240 | 247 | reg = <0x61320000 0x445>; /* PDC FS3 regs */ |
| 241 | 248 | interrupts = <GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH>; |
| 242 | 249 | #mbox-cells = <1>; |
| 250 | + dma-coherent; | |
| 243 | 251 | brcm,rx-status-len = <32>; |
| 244 | 252 | brcm,use-bcm-hdr; |
| 245 | 253 | }; |
| @@ -644,6 +652,7 @@ · 398 unmodified lines | ||
| 644 | 652 | sata: ahci@663f2000 { |
| 645 | 653 | compatible = "brcm,iproc-ahci", "generic-ahci"; |
| 646 | 654 | reg = <0x663f2000 0x1000>; |
| 655 | + dma-coherent; | |
| 647 | 656 | reg-names = "ahci"; |
| 648 | 657 | interrupts = <GIC_SPI 438 IRQ_TYPE_LEVEL_HIGH>; |
| 649 | 658 | #address-cells = <1>; |
| @@ -667,6 +676,7 @@ · 17 unmodified lines | ||
| 667 | 676 | compatible = "brcm,sdhci-iproc-cygnus"; |
| 668 | 677 | reg = <0x66420000 0x100>; |
| 669 | 678 | interrupts = <GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH>; |
| 679 | + dma-coherent; | |
| 670 | 680 | bus-width = <8>; |
| 671 | 681 | clocks = <&genpll_sw BCM_NS2_GENPLL_SW_SDIO_CLK>; |
| 672 | 682 | status = "disabled"; |
| @@ -676,6 +686,7 @@ · 3 unmodified lines | ||
| 676 | 686 | compatible = "brcm,sdhci-iproc-cygnus"; |
| 677 | 687 | reg = <0x66430000 0x100>; |
| 678 | 688 | interrupts = <GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH>; |
| 689 | + dma-coherent; | |
| 679 | 690 | bus-width = <8>; |
| 680 | 691 | clocks = <&genpll_sw BCM_NS2_GENPLL_SW_SDIO_CLK>; |
| 681 | 692 | status = "disabled"; |
| @@ -251,7 +251,7 @@ static inline bool system_supports_fpsimd(void) · 250 unmodified lines | ||
| 251 | 251 | static inline bool system_uses_ttbr0_pan(void) |
| 252 | 252 | { |
| 253 | 253 | return IS_ENABLED(CONFIG_ARM64_SW_TTBR0_PAN) && |
| 254 | − !cpus_have_cap(ARM64_HAS_PAN); | |
| 254 | + !cpus_have_const_cap(ARM64_HAS_PAN); | |
| 255 | 255 | } |
| 256 | 256 | |
| 257 | 257 | #endif /* __ASSEMBLY__ */ |
| @@ -44,7 +44,7 @@ · 43 unmodified lines | ||
| 44 | 44 | #define __ARM_NR_compat_cacheflush (__ARM_NR_COMPAT_BASE+2) |
| 45 | 45 | #define __ARM_NR_compat_set_tls (__ARM_NR_COMPAT_BASE+5) |
| 46 | 46 | |
| 47 | −#define __NR_compat_syscalls 394 | |
| 47 | +#define __NR_compat_syscalls 398 | |
| 48 | 48 | #endif |
| 49 | 49 | |
| 50 | 50 | #define __ARCH_WANT_SYS_CLONE |
| @@ -809,6 +809,14 @@ __SYSCALL(__NR_copy_file_range, sys_copy_file_range) · 808 unmodified lines | ||
| 809 | 809 | __SYSCALL(__NR_preadv2, compat_sys_preadv2) |
| 810 | 810 | #define __NR_pwritev2 393 |
| 811 | 811 | __SYSCALL(__NR_pwritev2, compat_sys_pwritev2) |
| 812 | +#define __NR_pkey_mprotect 394 | |
| 813 | +__SYSCALL(__NR_pkey_mprotect, sys_pkey_mprotect) | |
| 814 | +#define __NR_pkey_alloc 395 | |
| 815 | +__SYSCALL(__NR_pkey_alloc, sys_pkey_alloc) | |
| 816 | +#define __NR_pkey_free 396 | |
| 817 | +__SYSCALL(__NR_pkey_free, sys_pkey_free) | |
| 818 | +#define __NR_statx 397 | |
| 819 | +__SYSCALL(__NR_statx, sys_statx) | |
| 812 | 820 | |
| 813 | 821 | /* |
| 814 | 822 | * Please add new compat syscalls above this comment and update |
| @@ -30,7 +30,7 @@ int arm_cpuidle_init(unsigned int cpu) · 29 unmodified lines | ||
| 30 | 30 | } |
| 31 | 31 | |
| 32 | 32 | /** |
| 33 | − * cpu_suspend() - function to enter a low-power idle state | |
| 33 | + * arm_cpuidle_suspend() - function to enter a low-power idle state | |
| 34 | 34 | * @arg: argument to pass to CPU suspend operations |
| 35 | 35 | * |
| 36 | 36 | * Return: 0 on success, -EOPNOTSUPP if CPU suspend hook not initialized, CPU |
| @@ -131,11 +131,15 @@ u64 __init kaslr_early_init(u64 dt_phys, u64 modulo_offset) · 130 unmodified lines | ||
| 131 | 131 | /* |
| 132 | 132 | * The kernel Image should not extend across a 1GB/32MB/512MB alignment |
| 133 | 133 | * boundary (for 4KB/16KB/64KB granule kernels, respectively). If this |
| 134 | − * happens, increase the KASLR offset by the size of the kernel image. | |
| 134 | + * happens, increase the KASLR offset by the size of the kernel image | |
| 135 | + * rounded up by SWAPPER_BLOCK_SIZE. | |
| 135 | 136 | */ |
| 136 | 137 | if ((((u64)_text + offset + modulo_offset) >> SWAPPER_TABLE_SHIFT) != |
| 137 | − (((u64)_end + offset + modulo_offset) >> SWAPPER_TABLE_SHIFT)) | |
| 138 | − offset = (offset + (u64)(_end - _text)) & mask; | |
| 138 | + (((u64)_end + offset + modulo_offset) >> SWAPPER_TABLE_SHIFT)) { | |
| 139 | + u64 kimg_sz = _end - _text; | |
| 140 | + offset = (offset + round_up(kimg_sz, SWAPPER_BLOCK_SIZE)) | |
| 141 | + & mask; | |
| 142 | + } | |
| 139 | 143 | |
| 140 | 144 | if (IS_ENABLED(CONFIG_KASAN)) |
| 141 | 145 | /* |
| @@ -372,12 +372,6 @@ int __kprobes kprobe_fault_handler(struct pt_regs *regs, unsigned int fsr) · 371 unmodified lines | ||
| 372 | 372 | return 0; |
| 373 | 373 | } |
| 374 | 374 | |
| 375 | −int __kprobes kprobe_exceptions_notify(struct notifier_block *self, | |
| 376 | − unsigned long val, void *data) | |
| 377 | −{ | |
| 378 | − return NOTIFY_DONE; | |
| 379 | −} | |
| 380 | − | |
| 381 | 375 | static void __kprobes kprobe_handler(struct pt_regs *regs) |
| 382 | 376 | { |
| 383 | 377 | struct kprobe *p, *cur_kprobe; |
| @@ -162,7 +162,7 @@ void __init kasan_init(void) · 161 unmodified lines | ||
| 162 | 162 | clear_pgds(KASAN_SHADOW_START, KASAN_SHADOW_END); |
| 163 | 163 | |
| 164 | 164 | vmemmap_populate(kimg_shadow_start, kimg_shadow_end, |
| 165 | − pfn_to_nid(virt_to_pfn(_text))); | |
| 165 | + pfn_to_nid(virt_to_pfn(lm_alias(_text)))); | |
| 166 | 166 | |
| 167 | 167 | /* |
| 168 | 168 | * vmemmap_populate() has populated the shadow region that covers the |
| @@ -77,7 +77,11 @@ static inline unsigned long __xchg(unsigned long val, volatile void *ptr, · 76 unmodified lines | ||
| 77 | 77 | return val; |
| 78 | 78 | } |
| 79 | 79 | |
| 80 | −#define xchg(ptr, with) \ | |
| 81 | − ((typeof(*(ptr)))__xchg((unsigned long)(with), (ptr), sizeof(*(ptr)))) | |
| 80 | +#define xchg(ptr, with) \ | |
| 81 | + ({ \ | |
| 82 | + (__typeof__(*(ptr))) __xchg((unsigned long)(with), \ | |
| 83 | + (ptr), \ | |
| 84 | + sizeof(*(ptr))); \ | |
| 85 | + }) | |
| 82 | 86 | |
| 83 | 87 | #endif /* __ASM_OPENRISC_CMPXCHG_H */ |
| @@ -211,7 +211,7 @@ do { \ · 210 unmodified lines | ||
| 211 | 211 | case 1: __get_user_asm(x, ptr, retval, "l.lbz"); break; \ |
| 212 | 212 | case 2: __get_user_asm(x, ptr, retval, "l.lhz"); break; \ |
| 213 | 213 | case 4: __get_user_asm(x, ptr, retval, "l.lwz"); break; \ |
| 214 | − case 8: __get_user_asm2(x, ptr, retval); \ | |
| 214 | + case 8: __get_user_asm2(x, ptr, retval); break; \ | |
| 215 | 215 | default: (x) = __get_user_bad(); \ |
| 216 | 216 | } \ |
| 217 | 217 | } while (0) |
| @@ -30,6 +30,7 @@ · 29 unmodified lines | ||
| 30 | 30 | #include <asm/hardirq.h> |
| 31 | 31 | #include <asm/delay.h> |
| 32 | 32 | #include <asm/pgalloc.h> |
| 33 | +#include <asm/pgtable.h> | |
| 33 | 34 | |
| 34 | 35 | #define DECLARE_EXPORT(name) extern void name(void); EXPORT_SYMBOL(name) |
| 35 | 36 | |
| @@ -42,6 +43,9 @@ DECLARE_EXPORT(__muldi3); · 6 unmodified lines | ||
| 42 | 43 | DECLARE_EXPORT(__ashrdi3); |
| 43 | 44 | DECLARE_EXPORT(__ashldi3); |
| 44 | 45 | DECLARE_EXPORT(__lshrdi3); |
| 46 | +DECLARE_EXPORT(__ucmpdi2); | |
| 45 | 47 | |
| 48 | +EXPORT_SYMBOL(empty_zero_page); | |
| 46 | 49 | EXPORT_SYMBOL(__copy_tofrom_user); |
| 50 | +EXPORT_SYMBOL(__clear_user); | |
| 47 | 51 | EXPORT_SYMBOL(memset); |
| @@ -90,6 +90,7 @@ void arch_cpu_idle(void) · 89 unmodified lines | ||
| 90 | 90 | } |
| 91 | 91 | |
| 92 | 92 | void (*pm_power_off) (void) = machine_power_off; |
| 93 | +EXPORT_SYMBOL(pm_power_off); | |
| 93 | 94 | |
| 94 | 95 | /* |
| 95 | 96 | * When a process does an "exec", machine state like FPU and debug |
| @@ -43,28 +43,9 @@ static inline void flush_kernel_dcache_page(struct page *page) · 42 unmodified lines | ||
| 43 | 43 | |
| 44 | 44 | #define flush_kernel_dcache_range(start,size) \ |
| 45 | 45 | flush_kernel_dcache_range_asm((start), (start)+(size)); |
| 46 | −/* vmap range flushes and invalidates. Architecturally, we don't need | |
| 47 | − * the invalidate, because the CPU should refuse to speculate once an | |
| 48 | − * area has been flushed, so invalidate is left empty */ | |
| 49 | −static inline void flush_kernel_vmap_range(void *vaddr, int size) | |
| 50 | −{ | |
| 51 | − unsigned long start = (unsigned long)vaddr; | |
| 52 | − | |
| 53 | − flush_kernel_dcache_range_asm(start, start + size); | |
| 54 | −} | |
| 55 | −static inline void invalidate_kernel_vmap_range(void *vaddr, int size) | |
| 56 | −{ | |
| 57 | − unsigned long start = (unsigned long)vaddr; | |
| 58 | − void *cursor = vaddr; | |
| 59 | 46 | |
| 60 | − for ( ; cursor < vaddr + size; cursor += PAGE_SIZE) { | |
| 61 | − struct page *page = vmalloc_to_page(cursor); | |
| 62 | − | |
| 63 | − if (test_and_clear_bit(PG_dcache_dirty, &page->flags)) | |
| 64 | − flush_kernel_dcache_page(page); | |
| 65 | − } | |
| 66 | − flush_kernel_dcache_range_asm(start, start + size); | |
| 67 | −} | |
| 47 | +void flush_kernel_vmap_range(void *vaddr, int size); | |
| 48 | +void invalidate_kernel_vmap_range(void *vaddr, int size); | |
| 68 | 49 | |
| 69 | 50 | #define flush_cache_vmap(start, end) flush_cache_all() |
| 70 | 51 | #define flush_cache_vunmap(start, end) flush_cache_all() |
| @@ -32,7 +32,8 @@ · 31 unmodified lines | ||
| 32 | 32 | * that put_user is the same as __put_user, etc. |
| 33 | 33 | */ |
| 34 | 34 | |
| 35 | −#define access_ok(type, uaddr, size) (1) | |
| 35 | +#define access_ok(type, uaddr, size) \ | |
| 36 | + ( (uaddr) == (uaddr) ) | |
| 36 | 37 | |
| 37 | 38 | #define put_user __put_user |
| 38 | 39 | #define get_user __get_user |
| @@ -362,8 +362,9 @@ · 361 unmodified lines | ||
| 362 | 362 | #define __NR_copy_file_range (__NR_Linux + 346) |
| 363 | 363 | #define __NR_preadv2 (__NR_Linux + 347) |
| 364 | 364 | #define __NR_pwritev2 (__NR_Linux + 348) |
| 365 | +#define __NR_statx (__NR_Linux + 349) | |
| 365 | 366 | |
| 366 | −#define __NR_Linux_syscalls (__NR_pwritev2 + 1) | |
| 367 | +#define __NR_Linux_syscalls (__NR_statx + 1) | |
| 367 | 368 | |
| 368 | 369 | |
| 369 | 370 | #define __IGNORE_select /* newselect */ |
| @@ -616,3 +616,25 @@ flush_cache_page(struct vm_area_struct *vma, unsigned long vmaddr, unsigned long · 615 unmodified lines | ||
| 616 | 616 | __flush_cache_page(vma, vmaddr, PFN_PHYS(pfn)); |
| 617 | 617 | } |
| 618 | 618 | } |
| 619 | + | |
| 620 | +void flush_kernel_vmap_range(void *vaddr, int size) | |
| 621 | +{ | |
| 622 | + unsigned long start = (unsigned long)vaddr; | |
| 623 | + | |
| 624 | + if ((unsigned long)size > parisc_cache_flush_threshold) | |
| 625 | + flush_data_cache(); | |
| 626 | + else | |
| 627 | + flush_kernel_dcache_range_asm(start, start + size); | |
| 628 | +} | |
| 629 | +EXPORT_SYMBOL(flush_kernel_vmap_range); | |
| 630 | + | |
| 631 | +void invalidate_kernel_vmap_range(void *vaddr, int size) | |
| 632 | +{ | |
| 633 | + unsigned long start = (unsigned long)vaddr; | |
| 634 | + | |
| 635 | + if ((unsigned long)size > parisc_cache_flush_threshold) | |
| 636 | + flush_data_cache(); | |
| 637 | + else | |
| 638 | + flush_kernel_dcache_range_asm(start, start + size); | |
| 639 | +} | |
| 640 | +EXPORT_SYMBOL(invalidate_kernel_vmap_range); | |
| @@ -620,6 +620,10 @@ int apply_relocate_add(Elf_Shdr *sechdrs, · 619 unmodified lines | ||
| 620 | 620 | */ |
| 621 | 621 | *loc = fsel(val, addend); |
| 622 | 622 | break; |
| 623 | + case R_PARISC_SECREL32: | |
| 624 | + /* 32-bit section relative address. */ | |
| 625 | + *loc = fsel(val, addend); | |
| 626 | + break; | |
| 623 | 627 | case R_PARISC_DPREL21L: |
| 624 | 628 | /* left 21 bit of relative address */ |
| 625 | 629 | val = lrsel(val - dp, addend); |
| @@ -807,6 +811,10 @@ int apply_relocate_add(Elf_Shdr *sechdrs, · 181 unmodified lines | ||
| 807 | 811 | */ |
| 808 | 812 | *loc = fsel(val, addend); |
| 809 | 813 | break; |
| 814 | + case R_PARISC_SECREL32: | |
| 815 | + /* 32-bit section relative address. */ | |
| 816 | + *loc = fsel(val, addend); | |
| 817 | + break; | |
| 810 | 818 | case R_PARISC_FPTR64: |
| 811 | 819 | /* 64-bit function address */ |
| 812 | 820 | if(in_local(me, (void *)(val + addend))) { |
| @@ -39,7 +39,7 @@ · 38 unmodified lines | ||
| 39 | 39 | * the PDC INTRIGUE calls. This is done to eliminate bugs introduced |
| 40 | 40 | * in various PDC revisions. The code is much more maintainable |
| 41 | 41 | * and reliable this way vs having to debug on every version of PDC |
| 42 | − * on every box. | |
| 42 | + * on every box. | |
| 43 | 43 | */ |
| 44 | 44 | |
| 45 | 45 | #include <linux/capability.h> |
| @@ -195,8 +195,8 @@ static int perf_config(uint32_t *image_ptr); · 149 unmodified lines | ||
| 195 | 195 | static int perf_release(struct inode *inode, struct file *file); |
| 196 | 196 | static int perf_open(struct inode *inode, struct file *file); |
| 197 | 197 | static ssize_t perf_read(struct file *file, char __user *buf, size_t cnt, loff_t *ppos); |
| 198 | −static ssize_t perf_write(struct file *file, const char __user *buf, size_t count, | |
| 199 | − loff_t *ppos); | |
| 198 | +static ssize_t perf_write(struct file *file, const char __user *buf, | |
| 199 | + size_t count, loff_t *ppos); | |
| 200 | 200 | static long perf_ioctl(struct file *file, unsigned int cmd, unsigned long arg); |
| 201 | 201 | static void perf_start_counters(void); |
| 202 | 202 | static int perf_stop_counters(uint32_t *raddr); |
| @@ -222,7 +222,7 @@ extern void perf_intrigue_disable_perf_counters (void); · 19 unmodified lines | ||
| 222 | 222 | /* |
| 223 | 223 | * configure: |
| 224 | 224 | * |
| 225 | − * Configure the cpu with a given data image. First turn off the counters, | |
| 225 | + * Configure the cpu with a given data image. First turn off the counters, | |
| 226 | 226 | * then download the image, then turn the counters back on. |
| 227 | 227 | */ |
| 228 | 228 | static int perf_config(uint32_t *image_ptr) |
| @@ -234,7 +234,7 @@ static int perf_config(uint32_t *image_ptr) · 5 unmodified lines | ||
| 234 | 234 | error = perf_stop_counters(raddr); |
| 235 | 235 | if (error != 0) { |
| 236 | 236 | printk("perf_config: perf_stop_counters = %ld\n", error); |
| 237 | − return -EINVAL; | |
| 237 | + return -EINVAL; | |
| 238 | 238 | } |
| 239 | 239 | |
| 240 | 240 | printk("Preparing to write image\n"); |
| @@ -242,7 +242,7 @@ printk("Preparing to write image\n"); · 1 unmodified line | ||
| 242 | 242 | error = perf_write_image((uint64_t *)image_ptr); |
| 243 | 243 | if (error != 0) { |
| 244 | 244 | printk("perf_config: DOWNLOAD = %ld\n", error); |
| 245 | − return -EINVAL; | |
| 245 | + return -EINVAL; | |
| 246 | 246 | } |
| 247 | 247 | |
| 248 | 248 | printk("Preparing to start counters\n"); |
| @@ -254,7 +254,7 @@ printk("Preparing to start counters\n"); · 5 unmodified lines | ||
| 254 | 254 | } |
| 255 | 255 | |
| 256 | 256 | /* |
| 257 | − * Open the device and initialize all of its memory. The device is only | |
| 257 | + * Open the device and initialize all of its memory. The device is only | |
| 258 | 258 | * opened once, but can be "queried" by multiple processes that know its |
| 259 | 259 | * file descriptor. |
| 260 | 260 | */ |
| @@ -298,19 +298,19 @@ static ssize_t perf_read(struct file *file, char __user *buf, size_t cnt, loff_t · 37 unmodified lines | ||
| 298 | 298 | * called on the processor that the download should happen |
| 299 | 299 | * on. |
| 300 | 300 | */ |
| 301 | −static ssize_t perf_write(struct file *file, const char __user *buf, size_t count, | |
| 302 | − loff_t *ppos) | |
| 301 | +static ssize_t perf_write(struct file *file, const char __user *buf, | |
| 302 | + size_t count, loff_t *ppos) | |
| 303 | 303 | { |
| 304 | 304 | size_t image_size; |
| 305 | 305 | uint32_t image_type; |
| 306 | 306 | uint32_t interface_type; |
| 307 | 307 | uint32_t test; |
| 308 | 308 | |
| 309 | − if (perf_processor_interface == ONYX_INTF) | |
| 309 | + if (perf_processor_interface == ONYX_INTF) | |
| 310 | 310 | image_size = PCXU_IMAGE_SIZE; |
| 311 | − else if (perf_processor_interface == CUDA_INTF) | |
| 311 | + else if (perf_processor_interface == CUDA_INTF) | |
| 312 | 312 | image_size = PCXW_IMAGE_SIZE; |
| 313 | − else | |
| 313 | + else | |
| 314 | 314 | return -EFAULT; |
| 315 | 315 | |
| 316 | 316 | if (!capable(CAP_SYS_ADMIN)) |
| @@ -330,22 +330,22 @@ static ssize_t perf_write(struct file *file, const char __user *buf, size_t coun · 13 unmodified lines | ||
| 330 | 330 | |
| 331 | 331 | /* First check the machine type is correct for |
| 332 | 332 | the requested image */ |
| 333 | − if (((perf_processor_interface == CUDA_INTF) && | |
| 334 | − (interface_type != CUDA_INTF)) || | |
| 335 | − ((perf_processor_interface == ONYX_INTF) && | |
| 336 | − (interface_type != ONYX_INTF))) | |
| 333 | + if (((perf_processor_interface == CUDA_INTF) && | |
| 334 | + (interface_type != CUDA_INTF)) || | |
| 335 | + ((perf_processor_interface == ONYX_INTF) && | |
| 336 | + (interface_type != ONYX_INTF))) | |
| 337 | 337 | return -EINVAL; |
| 338 | 338 | |
| 339 | 339 | /* Next check to make sure the requested image |
| 340 | 340 | is valid */ |
| 341 | − if (((interface_type == CUDA_INTF) && | |
| 341 | + if (((interface_type == CUDA_INTF) && | |
| 342 | 342 | (test >= MAX_CUDA_IMAGES)) || |
| 343 | − ((interface_type == ONYX_INTF) && | |
| 344 | − (test >= MAX_ONYX_IMAGES))) | |
| 343 | + ((interface_type == ONYX_INTF) && | |
| 344 | + (test >= MAX_ONYX_IMAGES))) | |
| 345 | 345 | return -EINVAL; |
| 346 | 346 | |
| 347 | 347 | /* Copy the image into the processor */ |
| 348 | − if (interface_type == CUDA_INTF) | |
| 348 | + if (interface_type == CUDA_INTF) | |
| 349 | 349 | return perf_config(cuda_images[test]); |
| 350 | 350 | else |
| 351 | 351 | return perf_config(onyx_images[test]); |
| @@ -359,7 +359,7 @@ static ssize_t perf_write(struct file *file, const char __user *buf, size_t coun · 7 unmodified lines | ||
| 359 | 359 | static void perf_patch_images(void) |
| 360 | 360 | { |
| 361 | 361 | #if 0 /* FIXME!! */ |
| 362 | −/* | |
| 362 | +/* | |
| 363 | 363 | * NOTE: this routine is VERY specific to the current TLB image. |
| 364 | 364 | * If the image is changed, this routine might also need to be changed. |
| 365 | 365 | */ |
| @@ -367,9 +367,9 @@ static void perf_patch_images(void) · 1 unmodified line | ||
| 367 | 367 | extern void $i_dtlb_miss_2_0(); |
| 368 | 368 | extern void PA2_0_iva(); |
| 369 | 369 | |
| 370 | − /* | |
| 370 | + /* | |
| 371 | 371 | * We can only use the lower 32-bits, the upper 32-bits should be 0 |
| 372 | − * anyway given this is in the kernel | |
| 372 | + * anyway given this is in the kernel | |
| 373 | 373 | */ |
| 374 | 374 | uint32_t itlb_addr = (uint32_t)&($i_itlb_miss_2_0); |
| 375 | 375 | uint32_t dtlb_addr = (uint32_t)&($i_dtlb_miss_2_0); |
| @@ -377,21 +377,21 @@ static void perf_patch_images(void) · 1 unmodified line | ||
| 377 | 377 | |
| 378 | 378 | if (perf_processor_interface == ONYX_INTF) { |
| 379 | 379 | /* clear last 2 bytes */ |
| 380 | − onyx_images[TLBMISS][15] &= 0xffffff00; | |
| 380 | + onyx_images[TLBMISS][15] &= 0xffffff00; | |
| 381 | 381 | /* set 2 bytes */ |
| 382 | 382 | onyx_images[TLBMISS][15] |= (0x000000ff&((dtlb_addr) >> 24)); |
| 383 | 383 | onyx_images[TLBMISS][16] = (dtlb_addr << 8)&0xffffff00; |
| 384 | 384 | onyx_images[TLBMISS][17] = itlb_addr; |
| 385 | 385 | |
| 386 | 386 | /* clear last 2 bytes */ |
| 387 | − onyx_images[TLBHANDMISS][15] &= 0xffffff00; | |
| 387 | + onyx_images[TLBHANDMISS][15] &= 0xffffff00; | |
| 388 | 388 | /* set 2 bytes */ |
| 389 | 389 | onyx_images[TLBHANDMISS][15] |= (0x000000ff&((dtlb_addr) >> 24)); |
| 390 | 390 | onyx_images[TLBHANDMISS][16] = (dtlb_addr << 8)&0xffffff00; |
| 391 | 391 | onyx_images[TLBHANDMISS][17] = itlb_addr; |
| 392 | 392 | |
| 393 | 393 | /* clear last 2 bytes */ |
| 394 | − onyx_images[BIG_CPI][15] &= 0xffffff00; | |
| 394 | + onyx_images[BIG_CPI][15] &= 0xffffff00; | |
| 395 | 395 | /* set 2 bytes */ |
| 396 | 396 | onyx_images[BIG_CPI][15] |= (0x000000ff&((dtlb_addr) >> 24)); |
| 397 | 397 | onyx_images[BIG_CPI][16] = (dtlb_addr << 8)&0xffffff00; |
| @@ -404,24 +404,24 @@ static void perf_patch_images(void) · 6 unmodified lines | ||
| 404 | 404 | |
| 405 | 405 | } else if (perf_processor_interface == CUDA_INTF) { |
| 406 | 406 | /* Cuda interface */ |
| 407 | − cuda_images[TLBMISS][16] = | |
| 407 | + cuda_images[TLBMISS][16] = | |
| 408 | 408 | (cuda_images[TLBMISS][16]&0xffff0000) | |
| 409 | 409 | ((dtlb_addr >> 8)&0x0000ffff); |
| 410 | − cuda_images[TLBMISS][17] = | |
| 410 | + cuda_images[TLBMISS][17] = | |
| 411 | 411 | ((dtlb_addr << 24)&0xff000000) | ((itlb_addr >> 16)&0x000000ff); |
| 412 | 412 | cuda_images[TLBMISS][18] = (itlb_addr << 16)&0xffff0000; |
| 413 | 413 | |
| 414 | − cuda_images[TLBHANDMISS][16] = | |
| 414 | + cuda_images[TLBHANDMISS][16] = | |
| 415 | 415 | (cuda_images[TLBHANDMISS][16]&0xffff0000) | |
| 416 | 416 | ((dtlb_addr >> 8)&0x0000ffff); |
| 417 | − cuda_images[TLBHANDMISS][17] = | |
| 417 | + cuda_images[TLBHANDMISS][17] = | |
| 418 | 418 | ((dtlb_addr << 24)&0xff000000) | ((itlb_addr >> 16)&0x000000ff); |
| 419 | 419 | cuda_images[TLBHANDMISS][18] = (itlb_addr << 16)&0xffff0000; |
| 420 | 420 | |
| 421 | − cuda_images[BIG_CPI][16] = | |
| 421 | + cuda_images[BIG_CPI][16] = | |
| 422 | 422 | (cuda_images[BIG_CPI][16]&0xffff0000) | |
| 423 | 423 | ((dtlb_addr >> 8)&0x0000ffff); |
| 424 | − cuda_images[BIG_CPI][17] = | |
| 424 | + cuda_images[BIG_CPI][17] = | |
| 425 | 425 | ((dtlb_addr << 24)&0xff000000) | ((itlb_addr >> 16)&0x000000ff); |
| 426 | 426 | cuda_images[BIG_CPI][18] = (itlb_addr << 16)&0xffff0000; |
| 427 | 427 | } else { |
| @@ -433,7 +433,7 @@ static void perf_patch_images(void) · 5 unmodified lines | ||
| 433 | 433 | |
| 434 | 434 | /* |
| 435 | 435 | * ioctl routine |
| 436 | − * All routines effect the processor that they are executed on. Thus you | |
| 436 | + * All routines effect the processor that they are executed on. Thus you | |
| 437 | 437 | * must be running on the processor that you wish to change. |
| 438 | 438 | */ |
| 439 | 439 | |
| @@ -459,7 +459,7 @@ static long perf_ioctl(struct file *file, unsigned int cmd, unsigned long arg) · 19 unmodified lines | ||
| 459 | 459 | } |
| 460 | 460 | |
| 461 | 461 | /* copy out the Counters */ |
| 462 | − if (copy_to_user((void __user *)arg, raddr, | |
| 462 | + if (copy_to_user((void __user *)arg, raddr, | |
| 463 | 463 | sizeof (raddr)) != 0) { |
| 464 | 464 | error = -EFAULT; |
| 465 | 465 | break; |
| @@ -487,7 +487,7 @@ static const struct file_operations perf_fops = { · 21 unmodified lines | ||
| 487 | 487 | .open = perf_open, |
| 488 | 488 | .release = perf_release |
| 489 | 489 | }; |
| 490 | − | |
| 490 | + | |
| 491 | 491 | static struct miscdevice perf_dev = { |
| 492 | 492 | MISC_DYNAMIC_MINOR, |
| 493 | 493 | PA_PERF_DEV, |
| @@ -595,7 +595,7 @@ static int perf_stop_counters(uint32_t *raddr) · 101 unmodified lines | ||
| 595 | 595 | /* OR sticky2 (bit 1496) to counter2 bit 32 */ |
| 596 | 596 | tmp64 |= (userbuf[23] >> 8) & 0x0000000080000000; |
| 597 | 597 | raddr[2] = (uint32_t)tmp64; |
| 598 | − | |
| 598 | + | |
| 599 | 599 | /* Counter3 is bits 1497 to 1528 */ |
| 600 | 600 | tmp64 = (userbuf[23] >> 7) & 0x00000000ffffffff; |
| 601 | 601 | /* OR sticky3 (bit 1529) to counter3 bit 32 */ |
| @@ -617,7 +617,7 @@ static int perf_stop_counters(uint32_t *raddr) · 15 unmodified lines | ||
| 617 | 617 | userbuf[22] = 0; |
| 618 | 618 | userbuf[23] = 0; |
| 619 | 619 | |
| 620 | − /* | |
| 620 | + /* | |
| 621 | 621 | * Write back the zeroed bytes + the image given |
| 622 | 622 | * the read was destructive. |
| 623 | 623 | */ |
| @@ -625,13 +625,13 @@ static int perf_stop_counters(uint32_t *raddr) · 1 unmodified line | ||
| 625 | 625 | } else { |
| 626 | 626 | |
| 627 | 627 | /* |
| 628 | − * Read RDR-15 which contains the counters and sticky bits | |
| 628 | + * Read RDR-15 which contains the counters and sticky bits | |
| 629 | 629 | */ |
| 630 | 630 | if (!perf_rdr_read_ubuf(15, userbuf)) { |
| 631 | 631 | return -13; |
| 632 | 632 | } |
| 633 | 633 | |
| 634 | − /* | |
| 634 | + /* | |
| 635 | 635 | * Clear out the counters |
| 636 | 636 | */ |
| 637 | 637 | perf_rdr_clear(15); |
| @@ -644,7 +644,7 @@ static int perf_stop_counters(uint32_t *raddr) · 6 unmodified lines | ||
| 644 | 644 | raddr[2] = (uint32_t)((userbuf[1] >> 32) & 0x00000000ffffffffUL); |
| 645 | 645 | raddr[3] = (uint32_t)(userbuf[1] & 0x00000000ffffffffUL); |
| 646 | 646 | } |
| 647 | − | |
| 647 | + | |
| 648 | 648 | return 0; |
| 649 | 649 | } |
| 650 | 650 | |
| @@ -682,7 +682,7 @@ static int perf_rdr_read_ubuf(uint32_t rdr_num, uint64_t *buffer) · 31 unmodified lines | ||
| 682 | 682 | i = tentry->num_words; |
| 683 | 683 | while (i--) { |
| 684 | 684 | buffer[i] = 0; |
| 685 | − } | |
| 685 | + } | |
| 686 | 686 | |
| 687 | 687 | /* Check for bits an even number of 64 */ |
| 688 | 688 | if ((xbits = width & 0x03f) != 0) { |
| @@ -808,18 +808,22 @@ static int perf_write_image(uint64_t *memaddr) · 119 unmodified lines | ||
| 808 | 808 | } |
| 809 | 809 | |
| 810 | 810 | runway = ioremap_nocache(cpu_device->hpa.start, 4096); |
| 811 | + if (!runway) { | |
| 812 | + pr_err("perf_write_image: ioremap failed!\n"); | |
| 813 | + return -ENOMEM; | |
| 814 | + } | |
| 811 | 815 | |
| 812 | 816 | /* Merge intrigue bits into Runway STATUS 0 */ |
| 813 | 817 | tmp64 = __raw_readq(runway + RUNWAY_STATUS) & 0xffecfffffffffffful; |
| 814 | − __raw_writeq(tmp64 | (*memaddr++ & 0x0013000000000000ul), | |
| 818 | + __raw_writeq(tmp64 | (*memaddr++ & 0x0013000000000000ul), | |
| 815 | 819 | runway + RUNWAY_STATUS); |
| 816 | − | |
| 820 | + | |
| 817 | 821 | /* Write RUNWAY DEBUG registers */ |
| 818 | 822 | for (i = 0; i < 8; i++) { |
| 819 | 823 | __raw_writeq(*memaddr++, runway + RUNWAY_DEBUG); |
| 820 | 824 | } |
| 821 | 825 | |
| 822 | − return 0; | |
| 826 | + return 0; | |
| 823 | 827 | } |
| 824 | 828 | |
| 825 | 829 | /* |
| @@ -843,7 +847,7 @@ printk("perf_rdr_write\n"); · 17 unmodified lines | ||
| 843 | 847 | perf_rdr_shift_out_U(rdr_num, buffer[i]); |
| 844 | 848 | } else { |
| 845 | 849 | perf_rdr_shift_out_W(rdr_num, buffer[i]); |
| 846 | − } | |
| 850 | + } | |
| 847 | 851 | } |
| 848 | 852 | printk("perf_rdr_write done\n"); |
| 849 | 853 | } |
| @@ -142,6 +142,8 @@ void machine_power_off(void) · 141 unmodified lines | ||
| 142 | 142 | |
| 143 | 143 | printk(KERN_EMERG "System shut down completed.\n" |
| 144 | 144 | "Please power this system off now."); |
| 145 | + | |
| 146 | + for (;;); | |
| 145 | 147 | } |
| 146 | 148 | |
| 147 | 149 | void (*pm_power_off)(void) = machine_power_off; |
| @@ -444,6 +444,7 @@ · 443 unmodified lines | ||
| 444 | 444 | ENTRY_SAME(copy_file_range) |
| 445 | 445 | ENTRY_COMP(preadv2) |
| 446 | 446 | ENTRY_COMP(pwritev2) |
| 447 | + ENTRY_SAME(statx) | |
| 447 | 448 | |
| 448 | 449 | |
| 449 | 450 | .ifne (. - 90b) - (__NR_Linux_syscalls * (91b - 90b)) |
| @@ -68,6 +68,7 @@ SECTIONS · 67 unmodified lines | ||
| 68 | 68 | } |
| 69 | 69 | |
| 70 | 70 | #ifdef CONFIG_PPC64_BOOT_WRAPPER |
| 71 | + . = ALIGN(256); | |
| 71 | 72 | .got : |
| 72 | 73 | { |
| 73 | 74 | __toc_start = .; |
| @@ -52,7 +52,7 @@ static int crc32c_vpmsum_cra_init(struct crypto_tfm *tfm) · 51 unmodified lines | ||
| 52 | 52 | { |
| 53 | 53 | u32 *key = crypto_tfm_ctx(tfm); |
| 54 | 54 | |
| 55 | − *key = 0; | |
| 55 | + *key = ~0; | |
| 56 | 56 | |
| 57 | 57 | return 0; |
| 58 | 58 | } |
| @@ -51,6 +51,10 @@ · 50 unmodified lines | ||
| 51 | 51 | #define PPC_BIT(bit) (1UL << PPC_BITLSHIFT(bit)) |
| 52 | 52 | #define PPC_BITMASK(bs, be) ((PPC_BIT(bs) - PPC_BIT(be)) | PPC_BIT(bs)) |
| 53 | 53 | |
| 54 | +/* Put a PPC bit into a "normal" bit position */ | |
| 55 | +#define PPC_BITEXTRACT(bits, ppc_bit, dst_bit) \ | |
| 56 | + ((((bits) >> PPC_BITLSHIFT(ppc_bit)) & 1) << (dst_bit)) | |
| 57 | + | |
| 54 | 58 | #include <asm/barrier.h> |
| 55 | 59 | |
| 56 | 60 | /* Macro for generating the ***_bits() functions */ |
| @@ -66,6 +66,55 @@ · 65 unmodified lines | ||
| 66 | 66 | |
| 67 | 67 | #define P8_DSISR_MC_SLB_ERRORS (P7_DSISR_MC_SLB_ERRORS | \ |
| 68 | 68 | P8_DSISR_MC_ERAT_MULTIHIT_SEC) |
| 69 | + | |
| 70 | +/* | |
| 71 | + * Machine Check bits on power9 | |
| 72 | + */ | |
| 73 | +#define P9_SRR1_MC_LOADSTORE(srr1) (((srr1) >> PPC_BITLSHIFT(42)) & 1) | |
| 74 | + | |
| 75 | +#define P9_SRR1_MC_IFETCH(srr1) ( \ | |
| 76 | + PPC_BITEXTRACT(srr1, 45, 0) | \ | |
| 77 | + PPC_BITEXTRACT(srr1, 44, 1) | \ | |
| 78 | + PPC_BITEXTRACT(srr1, 43, 2) | \ | |
| 79 | + PPC_BITEXTRACT(srr1, 36, 3) ) | |
| 80 | + | |
| 81 | +/* 0 is reserved */ | |
| 82 | +#define P9_SRR1_MC_IFETCH_UE 1 | |
| 83 | +#define P9_SRR1_MC_IFETCH_SLB_PARITY 2 | |
| 84 | +#define P9_SRR1_MC_IFETCH_SLB_MULTIHIT 3 | |
| 85 | +#define P9_SRR1_MC_IFETCH_ERAT_MULTIHIT 4 | |
| 86 | +#define P9_SRR1_MC_IFETCH_TLB_MULTIHIT 5 | |
| 87 | +#define P9_SRR1_MC_IFETCH_UE_TLB_RELOAD 6 | |
| 88 | +/* 7 is reserved */ | |
| 89 | +#define P9_SRR1_MC_IFETCH_LINK_TIMEOUT 8 | |
| 90 | +#define P9_SRR1_MC_IFETCH_LINK_TABLEWALK_TIMEOUT 9 | |
| 91 | +/* 10 ? */ | |
| 92 | +#define P9_SRR1_MC_IFETCH_RA 11 | |
| 93 | +#define P9_SRR1_MC_IFETCH_RA_TABLEWALK 12 | |
| 94 | +#define P9_SRR1_MC_IFETCH_RA_ASYNC_STORE 13 | |
| 95 | +#define P9_SRR1_MC_IFETCH_LINK_ASYNC_STORE_TIMEOUT 14 | |
| 96 | +#define P9_SRR1_MC_IFETCH_RA_TABLEWALK_FOREIGN 15 | |
| 97 | + | |
| 98 | +/* DSISR bits for machine check (On Power9) */ | |
| 99 | +#define P9_DSISR_MC_UE (PPC_BIT(48)) | |
| 100 | +#define P9_DSISR_MC_UE_TABLEWALK (PPC_BIT(49)) | |
| 101 | +#define P9_DSISR_MC_LINK_LOAD_TIMEOUT (PPC_BIT(50)) | |
| 102 | +#define P9_DSISR_MC_LINK_TABLEWALK_TIMEOUT (PPC_BIT(51)) | |
| 103 | +#define P9_DSISR_MC_ERAT_MULTIHIT (PPC_BIT(52)) | |
| 104 | +#define P9_DSISR_MC_TLB_MULTIHIT_MFTLB (PPC_BIT(53)) | |
| 105 | +#define P9_DSISR_MC_USER_TLBIE (PPC_BIT(54)) | |
| 106 | +#define P9_DSISR_MC_SLB_PARITY_MFSLB (PPC_BIT(55)) | |
| 107 | +#define P9_DSISR_MC_SLB_MULTIHIT_MFSLB (PPC_BIT(56)) | |
| 108 | +#define P9_DSISR_MC_RA_LOAD (PPC_BIT(57)) | |
| 109 | +#define P9_DSISR_MC_RA_TABLEWALK (PPC_BIT(58)) | |
| 110 | +#define P9_DSISR_MC_RA_TABLEWALK_FOREIGN (PPC_BIT(59)) | |
| 111 | +#define P9_DSISR_MC_RA_FOREIGN (PPC_BIT(60)) | |
| 112 | + | |
| 113 | +/* SLB error bits */ | |
| 114 | +#define P9_DSISR_MC_SLB_ERRORS (P9_DSISR_MC_ERAT_MULTIHIT | \ | |
| 115 | + P9_DSISR_MC_SLB_PARITY_MFSLB | \ | |
| 116 | + P9_DSISR_MC_SLB_MULTIHIT_MFSLB) | |
| 117 | + | |
| 69 | 118 | enum MCE_Version { |
| 70 | 119 | MCE_V1 = 1, |
| 71 | 120 | }; |
| @@ -93,6 +142,9 @@ enum MCE_ErrorType { · 21 unmodified lines | ||
| 93 | 142 | MCE_ERROR_TYPE_SLB = 2, |
| 94 | 143 | MCE_ERROR_TYPE_ERAT = 3, |
| 95 | 144 | MCE_ERROR_TYPE_TLB = 4, |
| 145 | + MCE_ERROR_TYPE_USER = 5, | |
| 146 | + MCE_ERROR_TYPE_RA = 6, | |
| 147 | + MCE_ERROR_TYPE_LINK = 7, | |
| 96 | 148 | }; |
| 97 | 149 | |
| 98 | 150 | enum MCE_UeErrorType { |
| @@ -121,6 +173,32 @@ enum MCE_TlbErrorType { · 22 unmodified lines | ||
| 121 | 173 | MCE_TLB_ERROR_MULTIHIT = 2, |
| 122 | 174 | }; |
| 123 | 175 | |
| 176 | +enum MCE_UserErrorType { | |
| 177 | + MCE_USER_ERROR_INDETERMINATE = 0, | |
| 178 | + MCE_USER_ERROR_TLBIE = 1, | |
| 179 | +}; | |
| 180 | + | |
| 181 | +enum MCE_RaErrorType { | |
| 182 | + MCE_RA_ERROR_INDETERMINATE = 0, | |
| 183 | + MCE_RA_ERROR_IFETCH = 1, | |
| 184 | + MCE_RA_ERROR_PAGE_TABLE_WALK_IFETCH = 2, | |
| 185 | + MCE_RA_ERROR_PAGE_TABLE_WALK_IFETCH_FOREIGN = 3, | |
| 186 | + MCE_RA_ERROR_LOAD = 4, | |
| 187 | + MCE_RA_ERROR_STORE = 5, | |
| 188 | + MCE_RA_ERROR_PAGE_TABLE_WALK_LOAD_STORE = 6, | |
| 189 | + MCE_RA_ERROR_PAGE_TABLE_WALK_LOAD_STORE_FOREIGN = 7, | |
| 190 | + MCE_RA_ERROR_LOAD_STORE_FOREIGN = 8, | |
| 191 | +}; | |
| 192 | + | |
| 193 | +enum MCE_LinkErrorType { | |
| 194 | + MCE_LINK_ERROR_INDETERMINATE = 0, | |
| 195 | + MCE_LINK_ERROR_IFETCH_TIMEOUT = 1, | |
| 196 | + MCE_LINK_ERROR_PAGE_TABLE_WALK_IFETCH_TIMEOUT = 2, | |
| 197 | + MCE_LINK_ERROR_LOAD_TIMEOUT = 3, | |
| 198 | + MCE_LINK_ERROR_STORE_TIMEOUT = 4, | |
| 199 | + MCE_LINK_ERROR_PAGE_TABLE_WALK_LOAD_STORE_TIMEOUT = 5, | |
| 200 | +}; | |
| 201 | + | |
| 124 | 202 | struct machine_check_event { |
| 125 | 203 | enum MCE_Version version:8; /* 0x00 */ |
| 126 | 204 | uint8_t in_use; /* 0x01 */ |
| @@ -166,6 +244,30 @@ struct machine_check_event { · 39 unmodified lines | ||
| 166 | 244 | uint64_t effective_address; |
| 167 | 245 | uint8_t reserved_2[16]; |
| 168 | 246 | } tlb_error; |
| 247 | + | |
| 248 | + struct { | |
| 249 | + enum MCE_UserErrorType user_error_type:8; | |
| 250 | + uint8_t effective_address_provided; | |
| 251 | + uint8_t reserved_1[6]; | |
| 252 | + uint64_t effective_address; | |
| 253 | + uint8_t reserved_2[16]; | |
| 254 | + } user_error; | |
| 255 | + | |
| 256 | + struct { | |
| 257 | + enum MCE_RaErrorType ra_error_type:8; | |
| 258 | + uint8_t effective_address_provided; | |
| 259 | + uint8_t reserved_1[6]; | |
| 260 | + uint64_t effective_address; | |
| 261 | + uint8_t reserved_2[16]; | |
| 262 | + } ra_error; | |
| 263 | + | |
| 264 | + struct { | |
| 265 | + enum MCE_LinkErrorType link_error_type:8; | |
| 266 | + uint8_t effective_address_provided; | |
| 267 | + uint8_t reserved_1[6]; | |
| 268 | + uint64_t effective_address; | |
| 269 | + uint8_t reserved_2[16]; | |
| 270 | + } link_error; | |
| 169 | 271 | } u; |
| 170 | 272 | }; |
| 171 | 273 | |
| @@ -176,8 +278,12 @@ struct mce_error_info { · 4 unmodified lines | ||
| 176 | 278 | enum MCE_SlbErrorType slb_error_type:8; |
| 177 | 279 | enum MCE_EratErrorType erat_error_type:8; |
| 178 | 280 | enum MCE_TlbErrorType tlb_error_type:8; |
| 281 | + enum MCE_UserErrorType user_error_type:8; | |
| 282 | + enum MCE_RaErrorType ra_error_type:8; | |
| 283 | + enum MCE_LinkErrorType link_error_type:8; | |
| 179 | 284 | } u; |
| 180 | − uint8_t reserved[2]; | |
| 285 | + enum MCE_Severity severity:8; | |
| 286 | + enum MCE_Initiator initiator:8; | |
| 181 | 287 | }; |
| 182 | 288 | |
| 183 | 289 | #define MAX_MC_EVT 100 |
| @@ -387,3 +387,4 @@ SYSCALL(copy_file_range) · 386 unmodified lines | ||
| 387 | 387 | COMPAT_SYS_SPU(preadv2) |
| 388 | 388 | COMPAT_SYS_SPU(pwritev2) |
| 389 | 389 | SYSCALL(kexec_file_load) |
| 390 | +SYSCALL(statx) | |
| @@ -12,7 +12,7 @@ · 11 unmodified lines | ||
| 12 | 12 | #include <uapi/asm/unistd.h> |
| 13 | 13 | |
| 14 | 14 | |
| 15 | −#define NR_syscalls 383 | |
| 15 | +#define NR_syscalls 384 | |
| 16 | 16 | |
| 17 | 17 | #define __NR__exit __NR_exit |
| 18 | 18 | |
| @@ -393,5 +393,6 @@ · 392 unmodified lines | ||
| 393 | 393 | #define __NR_preadv2 380 |
| 394 | 394 | #define __NR_pwritev2 381 |
| 395 | 395 | #define __NR_kexec_file_load 382 |
| 396 | +#define __NR_statx 383 | |
| 396 | 397 | |
| 397 | 398 | #endif /* _UAPI_ASM_POWERPC_UNISTD_H_ */ |
| @@ -77,6 +77,7 @@ extern void __flush_tlb_power8(unsigned int action); · 76 unmodified lines | ||
| 77 | 77 | extern void __flush_tlb_power9(unsigned int action); |
| 78 | 78 | extern long __machine_check_early_realmode_p7(struct pt_regs *regs); |
| 79 | 79 | extern long __machine_check_early_realmode_p8(struct pt_regs *regs); |
| 80 | +extern long __machine_check_early_realmode_p9(struct pt_regs *regs); | |
| 80 | 81 | #endif /* CONFIG_PPC64 */ |
| 81 | 82 | #if defined(CONFIG_E500) |
| 82 | 83 | extern void __setup_cpu_e5500(unsigned long offset, struct cpu_spec* spec); |
| @@ -540,6 +541,7 @@ static struct cpu_spec __initdata cpu_specs[] = { · 457 unmodified lines | ||
| 540 | 541 | .cpu_setup = __setup_cpu_power9, |
| 541 | 542 | .cpu_restore = __restore_cpu_power9, |
| 542 | 543 | .flush_tlb = __flush_tlb_power9, |
| 544 | + .machine_check_early = __machine_check_early_realmode_p9, | |
| 543 | 545 | .platform = "power9", |
| 544 | 546 | }, |
| 545 | 547 | { /* Power9 */ |
| @@ -559,6 +561,7 @@ static struct cpu_spec __initdata cpu_specs[] = { · 13 unmodified lines | ||
| 559 | 561 | .cpu_setup = __setup_cpu_power9, |
| 560 | 562 | .cpu_restore = __restore_cpu_power9, |
| 561 | 563 | .flush_tlb = __flush_tlb_power9, |
| 564 | + .machine_check_early = __machine_check_early_realmode_p9, | |
| 562 | 565 | .platform = "power9", |
| 563 | 566 | }, |
| 564 | 567 | { /* Cell Broadband Engine */ |
| @@ -449,9 +449,23 @@ END_FTR_SECTION_IFSET(CPU_FTR_ARCH_300) · 448 unmodified lines | ||
| 449 | 449 | _GLOBAL(pnv_wakeup_tb_loss) |
| 450 | 450 | ld r1,PACAR1(r13) |
| 451 | 451 | /* |
| 452 | − * Before entering any idle state, the NVGPRs are saved in the stack | |
| 453 | − * and they are restored before switching to the process context. Hence | |
| 454 | − * until they are restored, they are free to be used. | |
| 452 | + * Before entering any idle state, the NVGPRs are saved in the stack. | |
| 453 | + * If there was a state loss, or PACA_NAPSTATELOST was set, then the | |
| 454 | + * NVGPRs are restored. If we are here, it is likely that state is lost, | |
| 455 | + * but not guaranteed -- neither ISA207 nor ISA300 tests to reach | |
| 456 | + * here are the same as the test to restore NVGPRS: | |
| 457 | + * PACA_THREAD_IDLE_STATE test for ISA207, PSSCR test for ISA300, | |
| 458 | + * and SRR1 test for restoring NVGPRs. | |
| 459 | + * | |
| 460 | + * We are about to clobber NVGPRs now, so set NAPSTATELOST to | |
| 461 | + * guarantee they will always be restored. This might be tightened | |
| 462 | + * with careful reading of specs (particularly for ISA300) but this | |
| 463 | + * is already a slow wakeup path and it's simpler to be safe. | |
| 464 | + */ | |
| 465 | + li r0,1 | |
| 466 | + stb r0,PACA_NAPSTATELOST(r13) | |
| 467 | + | |
| 468 | + /* | |
| 455 | 469 | * |
| 456 | 470 | * Save SRR1 and LR in NVGPRs as they might be clobbered in |
| 457 | 471 | * opal_call() (called in CHECK_HMI_INTERRUPT). SRR1 is required |
| @@ -58,6 +58,15 @@ static void mce_set_error_info(struct machine_check_event *mce, · 57 unmodified lines | ||
| 58 | 58 | case MCE_ERROR_TYPE_TLB: |
| 59 | 59 | mce->u.tlb_error.tlb_error_type = mce_err->u.tlb_error_type; |
| 60 | 60 | break; |
| 61 | + case MCE_ERROR_TYPE_USER: | |
| 62 | + mce->u.user_error.user_error_type = mce_err->u.user_error_type; | |
| 63 | + break; | |
| 64 | + case MCE_ERROR_TYPE_RA: | |
| 65 | + mce->u.ra_error.ra_error_type = mce_err->u.ra_error_type; | |
| 66 | + break; | |
| 67 | + case MCE_ERROR_TYPE_LINK: | |
| 68 | + mce->u.link_error.link_error_type = mce_err->u.link_error_type; | |
| 69 | + break; | |
| 61 | 70 | case MCE_ERROR_TYPE_UNKNOWN: |
| 62 | 71 | default: |
| 63 | 72 | break; |
| @@ -90,13 +99,14 @@ void save_mce_event(struct pt_regs *regs, long handled, · 26 unmodified lines | ||
| 90 | 99 | mce->gpr3 = regs->gpr[3]; |
| 91 | 100 | mce->in_use = 1; |
| 92 | 101 | |
| 93 | − mce->initiator = MCE_INITIATOR_CPU; | |
| 94 | 102 | /* Mark it recovered if we have handled it and MSR(RI=1). */ |
| 95 | 103 | if (handled && (regs->msr & MSR_RI)) |
| 96 | 104 | mce->disposition = MCE_DISPOSITION_RECOVERED; |
| 97 | 105 | else |
| 98 | 106 | mce->disposition = MCE_DISPOSITION_NOT_RECOVERED; |
| 99 | − mce->severity = MCE_SEV_ERROR_SYNC; | |
| 107 | + | |
| 108 | + mce->initiator = mce_err->initiator; | |
| 109 | + mce->severity = mce_err->severity; | |
| 100 | 110 | |
| 101 | 111 | /* |
| 102 | 112 | * Populate the mce error_type and type-specific error_type. |
| @@ -115,6 +125,15 @@ void save_mce_event(struct pt_regs *regs, long handled, · 12 unmodified lines | ||
| 115 | 125 | } else if (mce->error_type == MCE_ERROR_TYPE_ERAT) { |
| 116 | 126 | mce->u.erat_error.effective_address_provided = true; |
| 117 | 127 | mce->u.erat_error.effective_address = addr; |
| 128 | + } else if (mce->error_type == MCE_ERROR_TYPE_USER) { | |
| 129 | + mce->u.user_error.effective_address_provided = true; | |
| 130 | + mce->u.user_error.effective_address = addr; | |
| 131 | + } else if (mce->error_type == MCE_ERROR_TYPE_RA) { | |
| 132 | + mce->u.ra_error.effective_address_provided = true; | |
| 133 | + mce->u.ra_error.effective_address = addr; | |
| 134 | + } else if (mce->error_type == MCE_ERROR_TYPE_LINK) { | |
| 135 | + mce->u.link_error.effective_address_provided = true; | |
| 136 | + mce->u.link_error.effective_address = addr; | |
| 118 | 137 | } else if (mce->error_type == MCE_ERROR_TYPE_UE) { |
| 119 | 138 | mce->u.ue_error.effective_address_provided = true; |
| 120 | 139 | mce->u.ue_error.effective_address = addr; |
| @@ -239,6 +258,29 @@ void machine_check_print_event_info(struct machine_check_event *evt) · 118 unmodified lines | ||
| 239 | 258 | "Parity", |
| 240 | 259 | "Multihit", |
| 241 | 260 | }; |
| 261 | + static const char *mc_user_types[] = { | |
| 262 | + "Indeterminate", | |
| 263 | + "tlbie(l) invalid", | |
| 264 | + }; | |
| 265 | + static const char *mc_ra_types[] = { | |
| 266 | + "Indeterminate", | |
| 267 | + "Instruction fetch (bad)", | |
| 268 | + "Page table walk ifetch (bad)", | |
| 269 | + "Page table walk ifetch (foreign)", | |
| 270 | + "Load (bad)", | |
| 271 | + "Store (bad)", | |
| 272 | + "Page table walk Load/Store (bad)", | |
| 273 | + "Page table walk Load/Store (foreign)", | |
| 274 | + "Load/Store (foreign)", | |
| 275 | + }; | |
| 276 | + static const char *mc_link_types[] = { | |
| 277 | + "Indeterminate", | |
| 278 | + "Instruction fetch (timeout)", | |
| 279 | + "Page table walk ifetch (timeout)", | |
| 280 | + "Load (timeout)", | |
| 281 | + "Store (timeout)", | |
| 282 | + "Page table walk Load/Store (timeout)", | |
| 283 | + }; | |
| 242 | 284 | |
| 243 | 285 | /* Print things out */ |
| 244 | 286 | if (evt->version != MCE_V1) { |
| @@ -315,6 +357,36 @@ void machine_check_print_event_info(struct machine_check_event *evt) · 70 unmodified lines | ||
| 315 | 357 | printk("%s Effective address: %016llx\n", |
| 316 | 358 | level, evt->u.tlb_error.effective_address); |
| 317 | 359 | break; |
| 360 | + case MCE_ERROR_TYPE_USER: | |
| 361 | + subtype = evt->u.user_error.user_error_type < | |
| 362 | + ARRAY_SIZE(mc_user_types) ? | |
| 363 | + mc_user_types[evt->u.user_error.user_error_type] | |
| 364 | + : "Unknown"; | |
| 365 | + printk("%s Error type: User [%s]\n", level, subtype); | |
| 366 | + if (evt->u.user_error.effective_address_provided) | |
| 367 | + printk("%s Effective address: %016llx\n", | |
| 368 | + level, evt->u.user_error.effective_address); | |
| 369 | + break; | |
| 370 | + case MCE_ERROR_TYPE_RA: | |
| 371 | + subtype = evt->u.ra_error.ra_error_type < | |
| 372 | + ARRAY_SIZE(mc_ra_types) ? | |
| 373 | + mc_ra_types[evt->u.ra_error.ra_error_type] | |
| 374 | + : "Unknown"; | |
| 375 | + printk("%s Error type: Real address [%s]\n", level, subtype); | |
| 376 | + if (evt->u.ra_error.effective_address_provided) | |
| 377 | + printk("%s Effective address: %016llx\n", | |
| 378 | + level, evt->u.ra_error.effective_address); | |
| 379 | + break; | |
| 380 | + case MCE_ERROR_TYPE_LINK: | |
| 381 | + subtype = evt->u.link_error.link_error_type < | |
| 382 | + ARRAY_SIZE(mc_link_types) ? | |
| 383 | + mc_link_types[evt->u.link_error.link_error_type] | |
| 384 | + : "Unknown"; | |
| 385 | + printk("%s Error type: Link [%s]\n", level, subtype); | |
| 386 | + if (evt->u.link_error.effective_address_provided) | |
| 387 | + printk("%s Effective address: %016llx\n", | |
| 388 | + level, evt->u.link_error.effective_address); | |
| 389 | + break; | |
| 318 | 390 | default: |
| 319 | 391 | case MCE_ERROR_TYPE_UNKNOWN: |
| 320 | 392 | printk("%s Error type: Unknown\n", level); |
| @@ -341,6 +413,18 @@ uint64_t get_mce_fault_addr(struct machine_check_event *evt) · 20 unmodified lines | ||
| 341 | 413 | if (evt->u.tlb_error.effective_address_provided) |
| 342 | 414 | return evt->u.tlb_error.effective_address; |
| 343 | 415 | break; |
| 416 | + case MCE_ERROR_TYPE_USER: | |
| 417 | + if (evt->u.user_error.effective_address_provided) | |
| 418 | + return evt->u.user_error.effective_address; | |
| 419 | + break; | |
| 420 | + case MCE_ERROR_TYPE_RA: | |
| 421 | + if (evt->u.ra_error.effective_address_provided) | |
| 422 | + return evt->u.ra_error.effective_address; | |
| 423 | + break; | |
| 424 | + case MCE_ERROR_TYPE_LINK: | |
| 425 | + if (evt->u.link_error.effective_address_provided) | |
| 426 | + return evt->u.link_error.effective_address; | |
| 427 | + break; | |
| 344 | 428 | default: |
| 345 | 429 | case MCE_ERROR_TYPE_UNKNOWN: |
| 346 | 430 | break; |
| @@ -116,6 +116,51 @@ static void flush_and_reload_slb(void) · 115 unmodified lines | ||
| 116 | 116 | } |
| 117 | 117 | #endif |
| 118 | 118 | |
| 119 | +static void flush_erat(void) | |
| 120 | +{ | |
| 121 | + asm volatile(PPC_INVALIDATE_ERAT : : :"memory"); | |
| 122 | +} | |
| 123 | + | |
| 124 | +#define MCE_FLUSH_SLB 1 | |
| 125 | +#define MCE_FLUSH_TLB 2 | |
| 126 | +#define MCE_FLUSH_ERAT 3 | |
| 127 | + | |
| 128 | +static int mce_flush(int what) | |
| 129 | +{ | |
| 130 | +#ifdef CONFIG_PPC_STD_MMU_64 | |
| 131 | + if (what == MCE_FLUSH_SLB) { | |
| 132 | + flush_and_reload_slb(); | |
| 133 | + return 1; | |
| 134 | + } | |
| 135 | +#endif | |
| 136 | + if (what == MCE_FLUSH_ERAT) { | |
| 137 | + flush_erat(); | |
| 138 | + return 1; | |
| 139 | + } | |
| 140 | + if (what == MCE_FLUSH_TLB) { | |
| 141 | + if (cur_cpu_spec && cur_cpu_spec->flush_tlb) { | |
| 142 | + cur_cpu_spec->flush_tlb(TLB_INVAL_SCOPE_GLOBAL); | |
| 143 | + return 1; | |
| 144 | + } | |
| 145 | + } | |
| 146 | + | |
| 147 | + return 0; | |
| 148 | +} | |
| 149 | + | |
| 150 | +static int mce_handle_flush_derrors(uint64_t dsisr, uint64_t slb, uint64_t tlb, uint64_t erat) | |
| 151 | +{ | |
| 152 | + if ((dsisr & slb) && mce_flush(MCE_FLUSH_SLB)) | |
| 153 | + dsisr &= ~slb; | |
| 154 | + if ((dsisr & erat) && mce_flush(MCE_FLUSH_ERAT)) | |
| 155 | + dsisr &= ~erat; | |
| 156 | + if ((dsisr & tlb) && mce_flush(MCE_FLUSH_TLB)) | |
| 157 | + dsisr &= ~tlb; | |
| 158 | + /* Any other errors we don't understand? */ | |
| 159 | + if (dsisr) | |
| 160 | + return 0; | |
| 161 | + return 1; | |
| 162 | +} | |
| 163 | + | |
| 119 | 164 | static long mce_handle_derror(uint64_t dsisr, uint64_t slb_error_bits) |
| 120 | 165 | { |
| 121 | 166 | long handled = 1; |
| @@ -281,6 +326,9 @@ long __machine_check_early_realmode_p7(struct pt_regs *regs) · 159 unmodified lines | ||
| 281 | 326 | long handled = 1; |
| 282 | 327 | struct mce_error_info mce_error_info = { 0 }; |
| 283 | 328 | |
| 329 | + mce_error_info.severity = MCE_SEV_ERROR_SYNC; | |
| 330 | + mce_error_info.initiator = MCE_INITIATOR_CPU; | |
| 331 | + | |
| 284 | 332 | srr1 = regs->msr; |
| 285 | 333 | nip = regs->nip; |
| 286 | 334 | |
| @@ -352,6 +400,9 @@ long __machine_check_early_realmode_p8(struct pt_regs *regs) · 65 unmodified lines | ||
| 352 | 400 | long handled = 1; |
| 353 | 401 | struct mce_error_info mce_error_info = { 0 }; |
| 354 | 402 | |
| 403 | + mce_error_info.severity = MCE_SEV_ERROR_SYNC; | |
| 404 | + mce_error_info.initiator = MCE_INITIATOR_CPU; | |
| 405 | + | |
| 355 | 406 | srr1 = regs->msr; |
| 356 | 407 | nip = regs->nip; |
| 357 | 408 | |
| @@ -372,3 +423,189 @@ long __machine_check_early_realmode_p8(struct pt_regs *regs) · 14 unmodified lines | ||
| 372 | 423 | save_mce_event(regs, handled, &mce_error_info, nip, addr); |
| 373 | 424 | return handled; |
| 374 | 425 | } |
| 426 | + | |
| 427 | +static int mce_handle_derror_p9(struct pt_regs *regs) | |
| 428 | +{ | |
| 429 | + uint64_t dsisr = regs->dsisr; | |
| 430 | + | |
| 431 | + return mce_handle_flush_derrors(dsisr, | |
| 432 | + P9_DSISR_MC_SLB_PARITY_MFSLB | | |
| 433 | + P9_DSISR_MC_SLB_MULTIHIT_MFSLB, | |
| 434 | + | |
| 435 | + P9_DSISR_MC_TLB_MULTIHIT_MFTLB, | |
| 436 | + | |
| 437 | + P9_DSISR_MC_ERAT_MULTIHIT); | |
| 438 | +} | |
| 439 | + | |
| 440 | +static int mce_handle_ierror_p9(struct pt_regs *regs) | |
| 441 | +{ | |
| 442 | + uint64_t srr1 = regs->msr; | |
| 443 | + | |
| 444 | + switch (P9_SRR1_MC_IFETCH(srr1)) { | |
| 445 | + case P9_SRR1_MC_IFETCH_SLB_PARITY: | |
| 446 | + case P9_SRR1_MC_IFETCH_SLB_MULTIHIT: | |
| 447 | + return mce_flush(MCE_FLUSH_SLB); | |
| 448 | + case P9_SRR1_MC_IFETCH_TLB_MULTIHIT: | |
| 449 | + return mce_flush(MCE_FLUSH_TLB); | |
| 450 | + case P9_SRR1_MC_IFETCH_ERAT_MULTIHIT: | |
| 451 | + return mce_flush(MCE_FLUSH_ERAT); | |
| 452 | + default: | |
| 453 | + return 0; | |
| 454 | + } | |
| 455 | +} | |
| 456 | + | |
| 457 | +static void mce_get_derror_p9(struct pt_regs *regs, | |
| 458 | + struct mce_error_info *mce_err, uint64_t *addr) | |
| 459 | +{ | |
| 460 | + uint64_t dsisr = regs->dsisr; | |
| 461 | + | |
| 462 | + mce_err->severity = MCE_SEV_ERROR_SYNC; | |
| 463 | + mce_err->initiator = MCE_INITIATOR_CPU; | |
| 464 | + | |
| 465 | + if (dsisr & P9_DSISR_MC_USER_TLBIE) | |
| 466 | + *addr = regs->nip; | |
| 467 | + else | |
| 468 | + *addr = regs->dar; | |
| 469 | + | |
| 470 | + if (dsisr & P9_DSISR_MC_UE) { | |
| 471 | + mce_err->error_type = MCE_ERROR_TYPE_UE; | |
| 472 | + mce_err->u.ue_error_type = MCE_UE_ERROR_LOAD_STORE; | |
| 473 | + } else if (dsisr & P9_DSISR_MC_UE_TABLEWALK) { | |
| 474 | + mce_err->error_type = MCE_ERROR_TYPE_UE; | |
| 475 | + mce_err->u.ue_error_type = MCE_UE_ERROR_PAGE_TABLE_WALK_LOAD_STORE; | |
| 476 | + } else if (dsisr & P9_DSISR_MC_LINK_LOAD_TIMEOUT) { | |
| 477 | + mce_err->error_type = MCE_ERROR_TYPE_LINK; | |
| 478 | + mce_err->u.link_error_type = MCE_LINK_ERROR_LOAD_TIMEOUT; | |
| 479 | + } else if (dsisr & P9_DSISR_MC_LINK_TABLEWALK_TIMEOUT) { | |
| 480 | + mce_err->error_type = MCE_ERROR_TYPE_LINK; | |
| 481 | + mce_err->u.link_error_type = MCE_LINK_ERROR_PAGE_TABLE_WALK_LOAD_STORE_TIMEOUT; | |
| 482 | + } else if (dsisr & P9_DSISR_MC_ERAT_MULTIHIT) { | |
| 483 | + mce_err->error_type = MCE_ERROR_TYPE_ERAT; | |
| 484 | + mce_err->u.erat_error_type = MCE_ERAT_ERROR_MULTIHIT; | |
| 485 | + } else if (dsisr & P9_DSISR_MC_TLB_MULTIHIT_MFTLB) { | |
| 486 | + mce_err->error_type = MCE_ERROR_TYPE_TLB; | |
| 487 | + mce_err->u.tlb_error_type = MCE_TLB_ERROR_MULTIHIT; | |
| 488 | + } else if (dsisr & P9_DSISR_MC_USER_TLBIE) { | |
| 489 | + mce_err->error_type = MCE_ERROR_TYPE_USER; | |
| 490 | + mce_err->u.user_error_type = MCE_USER_ERROR_TLBIE; | |
| 491 | + } else if (dsisr & P9_DSISR_MC_SLB_PARITY_MFSLB) { | |
| 492 | + mce_err->error_type = MCE_ERROR_TYPE_SLB; | |
| 493 | + mce_err->u.slb_error_type = MCE_SLB_ERROR_PARITY; | |
| 494 | + } else if (dsisr & P9_DSISR_MC_SLB_MULTIHIT_MFSLB) { | |
| 495 | + mce_err->error_type = MCE_ERROR_TYPE_SLB; | |
| 496 | + mce_err->u.slb_error_type = MCE_SLB_ERROR_MULTIHIT; | |
| 497 | + } else if (dsisr & P9_DSISR_MC_RA_LOAD) { | |
| 498 | + mce_err->error_type = MCE_ERROR_TYPE_RA; | |
| 499 | + mce_err->u.ra_error_type = MCE_RA_ERROR_LOAD; | |
| 500 | + } else if (dsisr & P9_DSISR_MC_RA_TABLEWALK) { | |
| 501 | + mce_err->error_type = MCE_ERROR_TYPE_RA; | |
| 502 | + mce_err->u.ra_error_type = MCE_RA_ERROR_PAGE_TABLE_WALK_LOAD_STORE; | |
| 503 | + } else if (dsisr & P9_DSISR_MC_RA_TABLEWALK_FOREIGN) { | |
| 504 | + mce_err->error_type = MCE_ERROR_TYPE_RA; | |
| 505 | + mce_err->u.ra_error_type = MCE_RA_ERROR_PAGE_TABLE_WALK_LOAD_STORE_FOREIGN; | |
| 506 | + } else if (dsisr & P9_DSISR_MC_RA_FOREIGN) { | |
| 507 | + mce_err->error_type = MCE_ERROR_TYPE_RA; | |
| 508 | + mce_err->u.ra_error_type = MCE_RA_ERROR_LOAD_STORE_FOREIGN; | |
| 509 | + } | |
| 510 | +} | |
| 511 | + | |
| 512 | +static void mce_get_ierror_p9(struct pt_regs *regs, | |
| 513 | + struct mce_error_info *mce_err, uint64_t *addr) | |
| 514 | +{ | |
| 515 | + uint64_t srr1 = regs->msr; | |
| 516 | + | |
| 517 | + switch (P9_SRR1_MC_IFETCH(srr1)) { | |
| 518 | + case P9_SRR1_MC_IFETCH_RA_ASYNC_STORE: | |
| 519 | + case P9_SRR1_MC_IFETCH_LINK_ASYNC_STORE_TIMEOUT: | |
| 520 | + mce_err->severity = MCE_SEV_FATAL; | |
| 521 | + break; | |
| 522 | + default: | |
| 523 | + mce_err->severity = MCE_SEV_ERROR_SYNC; | |
| 524 | + break; | |
| 525 | + } | |
| 526 | + | |
| 527 | + mce_err->initiator = MCE_INITIATOR_CPU; | |
| 528 | + | |
| 529 | + *addr = regs->nip; | |
| 530 | + | |
| 531 | + switch (P9_SRR1_MC_IFETCH(srr1)) { | |
| 532 | + case P9_SRR1_MC_IFETCH_UE: | |
| 533 | + mce_err->error_type = MCE_ERROR_TYPE_UE; | |
| 534 | + mce_err->u.ue_error_type = MCE_UE_ERROR_IFETCH; | |
| 535 | + break; | |
| 536 | + case P9_SRR1_MC_IFETCH_SLB_PARITY: | |
| 537 | + mce_err->error_type = MCE_ERROR_TYPE_SLB; | |
| 538 | + mce_err->u.slb_error_type = MCE_SLB_ERROR_PARITY; | |
| 539 | + break; | |
| 540 | + case P9_SRR1_MC_IFETCH_SLB_MULTIHIT: | |
| 541 | + mce_err->error_type = MCE_ERROR_TYPE_SLB; | |
| 542 | + mce_err->u.slb_error_type = MCE_SLB_ERROR_MULTIHIT; | |
| 543 | + break; | |
| 544 | + case P9_SRR1_MC_IFETCH_ERAT_MULTIHIT: | |
| 545 | + mce_err->error_type = MCE_ERROR_TYPE_ERAT; | |
| 546 | + mce_err->u.erat_error_type = MCE_ERAT_ERROR_MULTIHIT; | |
| 547 | + break; | |
| 548 | + case P9_SRR1_MC_IFETCH_TLB_MULTIHIT: | |
| 549 | + mce_err->error_type = MCE_ERROR_TYPE_TLB; | |
| 550 | + mce_err->u.tlb_error_type = MCE_TLB_ERROR_MULTIHIT; | |
| 551 | + break; | |
| 552 | + case P9_SRR1_MC_IFETCH_UE_TLB_RELOAD: | |
| 553 | + mce_err->error_type = MCE_ERROR_TYPE_UE; | |
| 554 | + mce_err->u.ue_error_type = MCE_UE_ERROR_PAGE_TABLE_WALK_IFETCH; | |
| 555 | + break; | |
| 556 | + case P9_SRR1_MC_IFETCH_LINK_TIMEOUT: | |
| 557 | + mce_err->error_type = MCE_ERROR_TYPE_LINK; | |
| 558 | + mce_err->u.link_error_type = MCE_LINK_ERROR_IFETCH_TIMEOUT; | |
| 559 | + break; | |
| 560 | + case P9_SRR1_MC_IFETCH_LINK_TABLEWALK_TIMEOUT: | |
| 561 | + mce_err->error_type = MCE_ERROR_TYPE_LINK; | |
| 562 | + mce_err->u.link_error_type = MCE_LINK_ERROR_PAGE_TABLE_WALK_IFETCH_TIMEOUT; | |
| 563 | + break; | |
| 564 | + case P9_SRR1_MC_IFETCH_RA: | |
| 565 | + mce_err->error_type = MCE_ERROR_TYPE_RA; | |
| 566 | + mce_err->u.ra_error_type = MCE_RA_ERROR_IFETCH; | |
| 567 | + break; | |
| 568 | + case P9_SRR1_MC_IFETCH_RA_TABLEWALK: | |
| 569 | + mce_err->error_type = MCE_ERROR_TYPE_RA; | |
| 570 | + mce_err->u.ra_error_type = MCE_RA_ERROR_PAGE_TABLE_WALK_IFETCH; | |
| 571 | + break; | |
| 572 | + case P9_SRR1_MC_IFETCH_RA_ASYNC_STORE: | |
| 573 | + mce_err->error_type = MCE_ERROR_TYPE_RA; | |
| 574 | + mce_err->u.ra_error_type = MCE_RA_ERROR_STORE; | |
| 575 | + break; | |
| 576 | + case P9_SRR1_MC_IFETCH_LINK_ASYNC_STORE_TIMEOUT: | |
| 577 | + mce_err->error_type = MCE_ERROR_TYPE_LINK; | |
| 578 | + mce_err->u.link_error_type = MCE_LINK_ERROR_STORE_TIMEOUT; | |
| 579 | + break; | |
| 580 | + case P9_SRR1_MC_IFETCH_RA_TABLEWALK_FOREIGN: | |
| 581 | + mce_err->error_type = MCE_ERROR_TYPE_RA; | |
| 582 | + mce_err->u.ra_error_type = MCE_RA_ERROR_PAGE_TABLE_WALK_IFETCH_FOREIGN; | |
| 583 | + break; | |
| 584 | + default: | |
| 585 | + break; | |
| 586 | + } | |
| 587 | +} | |
| 588 | + | |
| 589 | +long __machine_check_early_realmode_p9(struct pt_regs *regs) | |
| 590 | +{ | |
| 591 | + uint64_t nip, addr; | |
| 592 | + long handled; | |
| 593 | + struct mce_error_info mce_error_info = { 0 }; | |
| 594 | + | |
| 595 | + nip = regs->nip; | |
| 596 | + | |
| 597 | + if (P9_SRR1_MC_LOADSTORE(regs->msr)) { | |
| 598 | + handled = mce_handle_derror_p9(regs); | |
| 599 | + mce_get_derror_p9(regs, &mce_error_info, &addr); | |
| 600 | + } else { | |
| 601 | + handled = mce_handle_ierror_p9(regs); | |
| 602 | + mce_get_ierror_p9(regs, &mce_error_info, &addr); | |
| 603 | + } | |
| 604 | + | |
| 605 | + /* Handle UE error. */ | |
| 606 | + if (mce_error_info.error_type == MCE_ERROR_TYPE_UE) | |
| 607 | + handled = mce_handle_ue_error(regs); | |
| 608 | + | |
| 609 | + save_mce_event(regs, handled, &mce_error_info, nip, addr); | |
| 610 | + return handled; | |
| 611 | +} | |
| @@ -397,8 +397,7 @@ static void early_check_vec5(void) · 396 unmodified lines | ||
| 397 | 397 | void __init mmu_early_init_devtree(void) |
| 398 | 398 | { |
| 399 | 399 | /* Disable radix mode based on kernel command line. */ |
| 400 | − /* We don't yet have the machinery to do radix as a guest. */ | |
| 401 | − if (disable_radix || !(mfmsr() & MSR_HV)) | |
| 400 | + if (disable_radix) | |
| 402 | 401 | cur_cpu_spec->mmu_features &= ~MMU_FTR_TYPE_RADIX; |
| 403 | 402 | |
| 404 | 403 | /* |
| @@ -188,6 +188,8 @@ static inline void perf_get_data_addr(struct pt_regs *regs, u64 *addrp) · 187 unmodified lines | ||
| 188 | 188 | sdsync = POWER7P_MMCRA_SDAR_VALID; |
| 189 | 189 | else if (ppmu->flags & PPMU_ALT_SIPR) |
| 190 | 190 | sdsync = POWER6_MMCRA_SDSYNC; |
| 191 | + else if (ppmu->flags & PPMU_NO_SIAR) | |
| 192 | + sdsync = MMCRA_SAMPLE_ENABLE; | |
| 191 | 193 | else |
| 192 | 194 | sdsync = MMCRA_SDSYNC; |
| 193 | 195 | |
| @@ -65,12 +65,41 @@ static bool is_event_valid(u64 event) · 64 unmodified lines | ||
| 65 | 65 | return !(event & ~valid_mask); |
| 66 | 66 | } |
| 67 | 67 | |
| 68 | −static u64 mmcra_sdar_mode(u64 event) | |
| 68 | +static inline bool is_event_marked(u64 event) | |
| 69 | 69 | { |
| 70 | − if (cpu_has_feature(CPU_FTR_ARCH_300) && !cpu_has_feature(CPU_FTR_POWER9_DD1)) | |
| 71 | − return p9_SDAR_MODE(event) << MMCRA_SDAR_MODE_SHIFT; | |
| 70 | + if (event & EVENT_IS_MARKED) | |
| 71 | + return true; | |
| 72 | + | |
| 73 | + return false; | |
| 74 | +} | |
| 72 | 75 | |
| 73 | − return MMCRA_SDAR_MODE_TLB; | |
| 76 | +static void mmcra_sdar_mode(u64 event, unsigned long *mmcra) | |
| 77 | +{ | |
| 78 | + /* | |
| 79 | + * MMCRA[SDAR_MODE] specifices how the SDAR should be updated in | |
| 80 | + * continous sampling mode. | |
| 81 | + * | |
| 82 | + * Incase of Power8: | |
| 83 | + * MMCRA[SDAR_MODE] will be programmed as "0b01" for continous sampling | |
| 84 | + * mode and will be un-changed when setting MMCRA[63] (Marked events). | |
| 85 | + * | |
| 86 | + * Incase of Power9: | |
| 87 | + * Marked event: MMCRA[SDAR_MODE] will be set to 0b00 ('No Updates'), | |
| 88 | + * or if group already have any marked events. | |
| 89 | + * Non-Marked events (for DD1): | |
| 90 | + * MMCRA[SDAR_MODE] will be set to 0b01 | |
| 91 | + * For rest | |
| 92 | + * MMCRA[SDAR_MODE] will be set from event code. | |
| 93 | + */ | |
| 94 | + if (cpu_has_feature(CPU_FTR_ARCH_300)) { | |
| 95 | + if (is_event_marked(event) || (*mmcra & MMCRA_SAMPLE_ENABLE)) | |
| 96 | + *mmcra &= MMCRA_SDAR_MODE_NO_UPDATES; | |
| 97 | + else if (!cpu_has_feature(CPU_FTR_POWER9_DD1)) | |
| 98 | + *mmcra |= p9_SDAR_MODE(event) << MMCRA_SDAR_MODE_SHIFT; | |
| 99 | + else if (cpu_has_feature(CPU_FTR_POWER9_DD1)) | |
| 100 | + *mmcra |= MMCRA_SDAR_MODE_TLB; | |
| 101 | + } else | |
| 102 | + *mmcra |= MMCRA_SDAR_MODE_TLB; | |
| 74 | 103 | } |
| 75 | 104 | |
| 76 | 105 | static u64 thresh_cmp_val(u64 value) |
| @@ -180,7 +209,7 @@ int isa207_get_constraint(u64 event, unsigned long *maskp, unsigned long *valp) · 103 unmodified lines | ||
| 180 | 209 | value |= CNST_L1_QUAL_VAL(cache); |
| 181 | 210 | } |
| 182 | 211 | |
| 183 | − if (event & EVENT_IS_MARKED) { | |
| 212 | + if (is_event_marked(event)) { | |
| 184 | 213 | mask |= CNST_SAMPLE_MASK; |
| 185 | 214 | value |= CNST_SAMPLE_VAL(event >> EVENT_SAMPLE_SHIFT); |
| 186 | 215 | } |
| @@ -276,7 +305,7 @@ int isa207_compute_mmcr(u64 event[], int n_ev, · 89 unmodified lines | ||
| 276 | 305 | } |
| 277 | 306 | |
| 278 | 307 | /* In continuous sampling mode, update SDAR on TLB miss */ |
| 279 | − mmcra |= mmcra_sdar_mode(event[i]); | |
| 308 | + mmcra_sdar_mode(event[i], &mmcra); | |
| 280 | 309 | |
| 281 | 310 | if (event[i] & EVENT_IS_L1) { |
| 282 | 311 | cache = event[i] >> EVENT_CACHE_SEL_SHIFT; |
| @@ -285,7 +314,7 @@ int isa207_compute_mmcr(u64 event[], int n_ev, · 2 unmodified lines | ||
| 285 | 314 | mmcr1 |= (cache & 1) << MMCR1_DC_QUAL_SHIFT; |
| 286 | 315 | } |
| 287 | 316 | |
| 288 | − if (event[i] & EVENT_IS_MARKED) { | |
| 317 | + if (is_event_marked(event[i])) { | |
| 289 | 318 | mmcra |= MMCRA_SAMPLE_ENABLE; |
| 290 | 319 | |
| 291 | 320 | val = (event[i] >> EVENT_SAMPLE_SHIFT) & EVENT_SAMPLE_MASK; |
| @@ -246,6 +246,7 @@ · 245 unmodified lines | ||
| 246 | 246 | #define MMCRA_THR_CMP_SHIFT 32 |
| 247 | 247 | #define MMCRA_SDAR_MODE_SHIFT 42 |
| 248 | 248 | #define MMCRA_SDAR_MODE_TLB (1ull << MMCRA_SDAR_MODE_SHIFT) |
| 249 | +#define MMCRA_SDAR_MODE_NO_UPDATES ~(0x3ull << MMCRA_SDAR_MODE_SHIFT) | |
| 249 | 250 | #define MMCRA_IFM_SHIFT 30 |
| 250 | 251 | |
| 251 | 252 | /* MMCR1 Threshold Compare bit constant for power9 */ |
| @@ -395,7 +395,6 @@ static int opal_recover_mce(struct pt_regs *regs, · 394 unmodified lines | ||
| 395 | 395 | struct machine_check_event *evt) |
| 396 | 396 | { |
| 397 | 397 | int recovered = 0; |
| 398 | − uint64_t ea = get_mce_fault_addr(evt); | |
| 399 | 398 | |
| 400 | 399 | if (!(regs->msr & MSR_RI)) { |
| 401 | 400 | /* If MSR_RI isn't set, we cannot recover */ |
| @@ -404,26 +403,18 @@ static int opal_recover_mce(struct pt_regs *regs, · 2 unmodified lines | ||
| 404 | 403 | } else if (evt->disposition == MCE_DISPOSITION_RECOVERED) { |
| 405 | 404 | /* Platform corrected itself */ |
| 406 | 405 | recovered = 1; |
| 407 | − } else if (ea && !is_kernel_addr(ea)) { | |
| 406 | + } else if (evt->severity == MCE_SEV_FATAL) { | |
| 407 | + /* Fatal machine check */ | |
| 408 | + pr_err("Machine check interrupt is fatal\n"); | |
| 409 | + recovered = 0; | |
| 410 | + } else if ((evt->severity == MCE_SEV_ERROR_SYNC) && | |
| 411 | + (user_mode(regs) && !is_global_init(current))) { | |
| 408 | 412 | /* |
| 409 | − * Faulting address is not in kernel text. We should be fine. | |
| 410 | − * We need to find which process uses this address. | |
| 411 | 413 | * For now, kill the task if we have received exception when |
| 412 | 414 | * in userspace. |
| 413 | 415 | * |
| 414 | 416 | * TODO: Queue up this address for hwpoisioning later. |
| 415 | 417 | */ |
| 416 | − if (user_mode(regs) && !is_global_init(current)) { | |
| 417 | − _exception(SIGBUS, regs, BUS_MCEERR_AR, regs->nip); | |
| 418 | − recovered = 1; | |
| 419 | − } else | |
| 420 | − recovered = 0; | |
| 421 | − } else if (user_mode(regs) && !is_global_init(current) && | |
| 422 | − evt->severity == MCE_SEV_ERROR_SYNC) { | |
| 423 | − /* | |
| 424 | − * If we have received a synchronous error when in userspace | |
| 425 | − * kill the task. | |
| 426 | − */ | |
| 427 | 418 | _exception(SIGBUS, regs, BUS_MCEERR_AR, regs->nip); |
| 428 | 419 | recovered = 1; |
| 429 | 420 | } |
| @@ -1775,17 +1775,20 @@ static u64 pnv_pci_ioda_dma_get_required_mask(struct pci_dev *pdev) · 1774 unmodified lines | ||
| 1775 | 1775 | } |
| 1776 | 1776 | |
| 1777 | 1777 | static void pnv_ioda_setup_bus_dma(struct pnv_ioda_pe *pe, |
| 1778 | − struct pci_bus *bus) | |
| 1778 | + struct pci_bus *bus, | |
| 1779 | + bool add_to_group) | |
| 1779 | 1780 | { |
| 1780 | 1781 | struct pci_dev *dev; |
| 1781 | 1782 | |
| 1782 | 1783 | list_for_each_entry(dev, &bus->devices, bus_list) { |
| 1783 | 1784 | set_iommu_table_base(&dev->dev, pe->table_group.tables[0]); |
| 1784 | 1785 | set_dma_offset(&dev->dev, pe->tce_bypass_base); |
| 1785 | − iommu_add_device(&dev->dev); | |
| 1786 | + if (add_to_group) | |
| 1787 | + iommu_add_device(&dev->dev); | |
| 1786 | 1788 | |
| 1787 | 1789 | if ((pe->flags & PNV_IODA_PE_BUS_ALL) && dev->subordinate) |
| 1788 | − pnv_ioda_setup_bus_dma(pe, dev->subordinate); | |
| 1790 | + pnv_ioda_setup_bus_dma(pe, dev->subordinate, | |
| 1791 | + add_to_group); | |
| 1789 | 1792 | } |
| 1790 | 1793 | } |
| 1791 | 1794 | |
| @@ -2191,7 +2194,7 @@ found: · 399 unmodified lines | ||
| 2191 | 2194 | set_iommu_table_base(&pe->pdev->dev, tbl); |
| 2192 | 2195 | iommu_add_device(&pe->pdev->dev); |
| 2193 | 2196 | } else if (pe->flags & (PNV_IODA_PE_BUS | PNV_IODA_PE_BUS_ALL)) |
| 2194 | − pnv_ioda_setup_bus_dma(pe, pe->pbus); | |
| 2197 | + pnv_ioda_setup_bus_dma(pe, pe->pbus, true); | |
| 2195 | 2198 | |
| 2196 | 2199 | return; |
| 2197 | 2200 | fail: |
| @@ -2426,6 +2429,8 @@ static void pnv_ioda2_take_ownership(struct iommu_table_group *table_group) · 228 unmodified lines | ||
| 2426 | 2429 | |
| 2427 | 2430 | pnv_pci_ioda2_set_bypass(pe, false); |
| 2428 | 2431 | pnv_pci_ioda2_unset_window(&pe->table_group, 0); |
| 2432 | + if (pe->pbus) | |
| 2433 | + pnv_ioda_setup_bus_dma(pe, pe->pbus, false); | |
| 2429 | 2434 | pnv_ioda2_table_free(tbl); |
| 2430 | 2435 | } |
| 2431 | 2436 | |
| @@ -2435,6 +2440,8 @@ static void pnv_ioda2_release_ownership(struct iommu_table_group *table_group) · 3 unmodified lines | ||
| 2435 | 2440 | table_group); |
| 2436 | 2441 | |
| 2437 | 2442 | pnv_pci_ioda2_setup_default_config(pe); |
| 2443 | + if (pe->pbus) | |
| 2444 | + pnv_ioda_setup_bus_dma(pe, pe->pbus, false); | |
| 2438 | 2445 | } |
| 2439 | 2446 | |
| 2440 | 2447 | static struct iommu_table_group_ops pnv_pci_ioda2_ops = { |
| @@ -2624,6 +2631,9 @@ static long pnv_pci_ioda2_table_alloc_pages(int nid, __u64 bus_offset, · 183 unmodified lines | ||
| 2624 | 2631 | level_shift = entries_shift + 3; |
| 2625 | 2632 | level_shift = max_t(unsigned, level_shift, PAGE_SHIFT); |
| 2626 | 2633 | |
| 2634 | + if ((level_shift - 3) * levels + page_shift >= 60) | |
| 2635 | + return -EINVAL; | |
| 2636 | + | |
| 2627 | 2637 | /* Allocate TCE table */ |
| 2628 | 2638 | addr = pnv_pci_ioda2_table_do_alloc_pages(nid, level_shift, |
| 2629 | 2639 | levels, tce_table_size, &offset, &total_allocated); |
| @@ -2728,7 +2738,7 @@ static void pnv_pci_ioda2_setup_dma_pe(struct pnv_phb *phb, · 98 unmodified lines | ||
| 2728 | 2738 | if (pe->flags & PNV_IODA_PE_DEV) |
| 2729 | 2739 | iommu_add_device(&pe->pdev->dev); |
| 2730 | 2740 | else if (pe->flags & (PNV_IODA_PE_BUS | PNV_IODA_PE_BUS_ALL)) |
| 2731 | − pnv_ioda_setup_bus_dma(pe, pe->pbus); | |
| 2741 | + pnv_ioda_setup_bus_dma(pe, pe->pbus, true); | |
| 2732 | 2742 | } |
| 2733 | 2743 | |
| 2734 | 2744 | #ifdef CONFIG_PCI_MSI |
| @@ -751,7 +751,9 @@ void __init hpte_init_pseries(void) · 750 unmodified lines | ||
| 751 | 751 | mmu_hash_ops.flush_hash_range = pSeries_lpar_flush_hash_range; |
| 752 | 752 | mmu_hash_ops.hpte_clear_all = pseries_hpte_clear_all; |
| 753 | 753 | mmu_hash_ops.hugepage_invalidate = pSeries_lpar_hugepage_invalidate; |
| 754 | − mmu_hash_ops.resize_hpt = pseries_lpar_resize_hpt; | |
| 754 | + | |
| 755 | + if (firmware_has_feature(FW_FEATURE_HPT_RESIZE)) | |
| 756 | + mmu_hash_ops.resize_hpt = pseries_lpar_resize_hpt; | |
| 755 | 757 | } |
| 756 | 758 | |
| 757 | 759 | void radix_init_pseries(void) |
| @@ -2101,8 +2101,8 @@ static int x86_pmu_event_init(struct perf_event *event) · 2100 unmodified lines | ||
| 2101 | 2101 | |
| 2102 | 2102 | static void refresh_pce(void *ignored) |
| 2103 | 2103 | { |
| 2104 | − if (current->mm) | |
| 2105 | − load_mm_cr4(current->mm); | |
| 2104 | + if (current->active_mm) | |
| 2105 | + load_mm_cr4(current->active_mm); | |
| 2106 | 2106 | } |
| 2107 | 2107 | |
| 2108 | 2108 | static void x86_pmu_event_mapped(struct perf_event *event) |
| @@ -2110,6 +2110,18 @@ static void x86_pmu_event_mapped(struct perf_event *event) · 1 unmodified line | ||
| 2110 | 2110 | if (!(event->hw.flags & PERF_X86_EVENT_RDPMC_ALLOWED)) |
| 2111 | 2111 | return; |
| 2112 | 2112 | |
| 2113 | + /* | |
| 2114 | + * This function relies on not being called concurrently in two | |
| 2115 | + * tasks in the same mm. Otherwise one task could observe | |
| 2116 | + * perf_rdpmc_allowed > 1 and return all the way back to | |
| 2117 | + * userspace with CR4.PCE clear while another task is still | |
| 2118 | + * doing on_each_cpu_mask() to propagate CR4.PCE. | |
| 2119 | + * | |
| 2120 | + * For now, this can't happen because all callers hold mmap_sem | |
| 2121 | + * for write. If this changes, we'll need a different solution. | |
| 2122 | + */ | |
| 2123 | + lockdep_assert_held_exclusive(¤t->mm->mmap_sem); | |
| 2124 | + | |
| 2113 | 2125 | if (atomic_inc_return(¤t->mm->context.perf_rdpmc_allowed) == 1) |
| 2114 | 2126 | on_each_cpu_mask(mm_cpumask(current->mm), refresh_pce, NULL, 1); |
| 2115 | 2127 | } |
| @@ -121,12 +121,9 @@ static inline void native_pmd_clear(pmd_t *pmd) · 120 unmodified lines | ||
| 121 | 121 | *(tmp + 1) = 0; |
| 122 | 122 | } |
| 123 | 123 | |
| 124 | −#if !defined(CONFIG_SMP) || (defined(CONFIG_HIGHMEM64G) && \ | |
| 125 | − defined(CONFIG_PARAVIRT)) | |
| 126 | 124 | static inline void native_pud_clear(pud_t *pudp) |
| 127 | 125 | { |
| 128 | 126 | } |
| 129 | −#endif | |
| 130 | 127 | |
| 131 | 128 | static inline void pud_clear(pud_t *pudp) |
| 132 | 129 | { |
| @@ -62,7 +62,7 @@ extern struct mm_struct *pgd_page_get_mm(struct page *page); · 61 unmodified lines | ||
| 62 | 62 | # define set_pud(pudp, pud) native_set_pud(pudp, pud) |
| 63 | 63 | #endif |
| 64 | 64 | |
| 65 | −#ifndef __PAGETABLE_PMD_FOLDED | |
| 65 | +#ifndef __PAGETABLE_PUD_FOLDED | |
| 66 | 66 | #define pud_clear(pud) native_pud_clear(pud) |
| 67 | 67 | #endif |
| 68 | 68 | |
| @@ -55,7 +55,8 @@ static inline int arch_memcpy_from_pmem(void *dst, const void *src, size_t n) · 54 unmodified lines | ||
| 55 | 55 | * @size: number of bytes to write back |
| 56 | 56 | * |
| 57 | 57 | * Write back a cache range using the CLWB (cache line write back) |
| 58 | − * instruction. | |
| 58 | + * instruction. Note that @size is internally rounded up to be cache | |
| 59 | + * line size aligned. | |
| 59 | 60 | */ |
| 60 | 61 | static inline void arch_wb_cache_pmem(void *addr, size_t size) |
| 61 | 62 | { |
| @@ -69,15 +70,6 @@ static inline void arch_wb_cache_pmem(void *addr, size_t size) · 7 unmodified lines | ||
| 69 | 70 | clwb(p); |
| 70 | 71 | } |
| 71 | 72 | |
| 72 | −/* | |
| 73 | − * copy_from_iter_nocache() on x86 only uses non-temporal stores for iovec | |
| 74 | − * iterators, so for other types (bvec & kvec) we must do a cache write-back. | |
| 75 | − */ | |
| 76 | −static inline bool __iter_needs_pmem_wb(struct iov_iter *i) | |
| 77 | −{ | |
| 78 | − return iter_is_iovec(i) == false; | |
| 79 | −} | |
| 80 | − | |
| 81 | 73 | /** |
| 82 | 74 | * arch_copy_from_iter_pmem - copy data from an iterator to PMEM |
| 83 | 75 | * @addr: PMEM destination address |
| @@ -94,7 +86,35 @@ static inline size_t arch_copy_from_iter_pmem(void *addr, size_t bytes, · 10 unmodified lines | ||
| 94 | 86 | /* TODO: skip the write-back by always using non-temporal stores */ |
| 95 | 87 | len = copy_from_iter_nocache(addr, bytes, i); |
| 96 | 88 | |
| 97 | − if (__iter_needs_pmem_wb(i)) | |
| 89 | + /* | |
| 90 | + * In the iovec case on x86_64 copy_from_iter_nocache() uses | |
| 91 | + * non-temporal stores for the bulk of the transfer, but we need | |
| 92 | + * to manually flush if the transfer is unaligned. A cached | |
| 93 | + * memory copy is used when destination or size is not naturally | |
| 94 | + * aligned. That is: | |
| 95 | + * - Require 8-byte alignment when size is 8 bytes or larger. | |
| 96 | + * - Require 4-byte alignment when size is 4 bytes. | |
| 97 | + * | |
| 98 | + * In the non-iovec case the entire destination needs to be | |
| 99 | + * flushed. | |
| 100 | + */ | |
| 101 | + if (iter_is_iovec(i)) { | |
| 102 | + unsigned long flushed, dest = (unsigned long) addr; | |
| 103 | + | |
| 104 | + if (bytes < 8) { | |
| 105 | + if (!IS_ALIGNED(dest, 4) || (bytes != 4)) | |
| 106 | + arch_wb_cache_pmem(addr, 1); | |
| 107 | + } else { | |
| 108 | + if (!IS_ALIGNED(dest, 8)) { | |
| 109 | + dest = ALIGN(dest, boot_cpu_data.x86_clflush_size); | |
| 110 | + arch_wb_cache_pmem(addr, 1); | |
| 111 | + } | |
| 112 | + | |
| 113 | + flushed = dest - (unsigned long) addr; | |
| 114 | + if (bytes > flushed && !IS_ALIGNED(bytes - flushed, 8)) | |
| 115 | + arch_wb_cache_pmem(addr + bytes - 1, 1); | |
| 116 | + } | |
| 117 | + } else | |
| 98 | 118 | arch_wb_cache_pmem(addr, bytes); |
| 99 | 119 | |
| 100 | 120 | return len; |
| @@ -179,10 +179,15 @@ static int acpi_register_lapic(int id, u32 acpiid, u8 enabled) · 178 unmodified lines | ||
| 179 | 179 | return -EINVAL; |
| 180 | 180 | } |
| 181 | 181 | |
| 182 | + if (!enabled) { | |
| 183 | + ++disabled_cpus; | |
| 184 | + return -EINVAL; | |
| 185 | + } | |
| 186 | + | |
| 182 | 187 | if (boot_cpu_physical_apicid != -1U) |
| 183 | 188 | ver = boot_cpu_apic_version; |
| 184 | 189 | |
| 185 | − cpu = __generic_processor_info(id, ver, enabled); | |
| 190 | + cpu = generic_processor_info(id, ver); | |
| 186 | 191 | if (cpu >= 0) |
| 187 | 192 | early_per_cpu(x86_cpu_to_acpiid, cpu) = acpiid; |
| 188 | 193 | |
| @@ -710,7 +715,7 @@ static void __init acpi_set_irq_model_ioapic(void) · 521 unmodified lines | ||
| 710 | 715 | #ifdef CONFIG_ACPI_HOTPLUG_CPU |
| 711 | 716 | #include <acpi/processor.h> |
| 712 | 717 | |
| 713 | −int acpi_map_cpu2node(acpi_handle handle, int cpu, int physid) | |
| 718 | +static int acpi_map_cpu2node(acpi_handle handle, int cpu, int physid) | |
| 714 | 719 | { |
| 715 | 720 | #ifdef CONFIG_ACPI_NUMA |
| 716 | 721 | int nid; |
| @@ -2063,7 +2063,7 @@ static int allocate_logical_cpuid(int apicid) · 2062 unmodified lines | ||
| 2063 | 2063 | return nr_logical_cpuids++; |
| 2064 | 2064 | } |
| 2065 | 2065 | |
| 2066 | −int __generic_processor_info(int apicid, int version, bool enabled) | |
| 2066 | +int generic_processor_info(int apicid, int version) | |
| 2067 | 2067 | { |
| 2068 | 2068 | int cpu, max = nr_cpu_ids; |
| 2069 | 2069 | bool boot_cpu_detected = physid_isset(boot_cpu_physical_apicid, |
| @@ -2121,11 +2121,9 @@ int __generic_processor_info(int apicid, int version, bool enabled) · 51 unmodified lines | ||
| 2121 | 2121 | if (num_processors >= nr_cpu_ids) { |
| 2122 | 2122 | int thiscpu = max + disabled_cpus; |
| 2123 | 2123 | |
| 2124 | − if (enabled) { | |
| 2125 | − pr_warning("APIC: NR_CPUS/possible_cpus limit of %i " | |
| 2126 | − "reached. Processor %d/0x%x ignored.\n", | |
| 2127 | − max, thiscpu, apicid); | |
| 2128 | − } | |
| 2124 | + pr_warning("APIC: NR_CPUS/possible_cpus limit of %i " | |
| 2125 | + "reached. Processor %d/0x%x ignored.\n", | |
| 2126 | + max, thiscpu, apicid); | |
| 2129 | 2127 | |
| 2130 | 2128 | disabled_cpus++; |
| 2131 | 2129 | return -EINVAL; |
| @@ -2177,23 +2175,13 @@ int __generic_processor_info(int apicid, int version, bool enabled) · 45 unmodified lines | ||
| 2177 | 2175 | apic->x86_32_early_logical_apicid(cpu); |
| 2178 | 2176 | #endif |
| 2179 | 2177 | set_cpu_possible(cpu, true); |
| 2180 | − | |
| 2181 | − if (enabled) { | |
| 2182 | − num_processors++; | |
| 2183 | − physid_set(apicid, phys_cpu_present_map); | |
| 2184 | − set_cpu_present(cpu, true); | |
| 2185 | − } else { | |
| 2186 | − disabled_cpus++; | |
| 2187 | − } | |
| 2178 | + physid_set(apicid, phys_cpu_present_map); | |
| 2179 | + set_cpu_present(cpu, true); | |
| 2180 | + num_processors++; | |
| 2188 | 2181 | |
| 2189 | 2182 | return cpu; |
| 2190 | 2183 | } |
| 2191 | 2184 | |
| 2192 | −int generic_processor_info(int apicid, int version) | |
| 2193 | −{ | |
| 2194 | − return __generic_processor_info(apicid, version, true); | |
| 2195 | −} | |
| 2196 | − | |
| 2197 | 2185 | int hard_smp_processor_id(void) |
| 2198 | 2186 | { |
| 2199 | 2187 | return read_apic_id(); |
| @@ -727,7 +727,7 @@ void rdtgroup_kn_unlock(struct kernfs_node *kn) · 726 unmodified lines | ||
| 727 | 727 | if (atomic_dec_and_test(&rdtgrp->waitcount) && |
| 728 | 728 | (rdtgrp->flags & RDT_DELETED)) { |
| 729 | 729 | kernfs_unbreak_active_protection(kn); |
| 730 | − kernfs_put(kn); | |
| 730 | + kernfs_put(rdtgrp->kn); | |
| 731 | 731 | kfree(rdtgrp); |
| 732 | 732 | } else { |
| 733 | 733 | kernfs_unbreak_active_protection(kn); |
| @@ -4,6 +4,7 @@ · 3 unmodified lines | ||
| 4 | 4 | * Copyright (C) 2000 Andrea Arcangeli <andrea@suse.de> SuSE |
| 5 | 5 | */ |
| 6 | 6 | |
| 7 | +#define DISABLE_BRANCH_PROFILING | |
| 7 | 8 | #include <linux/init.h> |
| 8 | 9 | #include <linux/linkage.h> |
| 9 | 10 | #include <linux/types.h> |
| @@ -166,11 +166,9 @@ int __register_nmi_handler(unsigned int type, struct nmiaction *action) · 165 unmodified lines | ||
| 166 | 166 | spin_lock_irqsave(&desc->lock, flags); |
| 167 | 167 | |
| 168 | 168 | /* |
| 169 | − * most handlers of type NMI_UNKNOWN never return because | |
| 170 | − * they just assume the NMI is theirs. Just a sanity check | |
| 171 | − * to manage expectations | |
| 169 | + * Indicate if there are multiple registrations on the | |
| 170 | + * internal NMI handler call chains (SERR and IO_CHECK). | |
| 172 | 171 | */ |
| 173 | − WARN_ON_ONCE(type == NMI_UNKNOWN && !list_empty(&desc->head)); | |
| 174 | 172 | WARN_ON_ONCE(type == NMI_SERR && !list_empty(&desc->head)); |
| 175 | 173 | WARN_ON_ONCE(type == NMI_IO_CHECK && !list_empty(&desc->head)); |
| 176 | 174 | |
| @@ -1333,6 +1333,8 @@ static int __init init_tsc_clocksource(void) · 1332 unmodified lines | ||
| 1333 | 1333 | * the refined calibration and directly register it as a clocksource. |
| 1334 | 1334 | */ |
| 1335 | 1335 | if (boot_cpu_has(X86_FEATURE_TSC_KNOWN_FREQ)) { |
| 1336 | + if (boot_cpu_has(X86_FEATURE_ART)) | |
| 1337 | + art_related_clocksource = &clocksource_tsc; | |
| 1336 | 1338 | clocksource_register_khz(&clocksource_tsc, tsc_khz); |
| 1337 | 1339 | return 0; |
| 1338 | 1340 | } |
| @@ -82,19 +82,43 @@ static size_t regs_size(struct pt_regs *regs) · 81 unmodified lines | ||
| 82 | 82 | return sizeof(*regs); |
| 83 | 83 | } |
| 84 | 84 | |
| 85 | +#ifdef CONFIG_X86_32 | |
| 86 | +#define GCC_REALIGN_WORDS 3 | |
| 87 | +#else | |
| 88 | +#define GCC_REALIGN_WORDS 1 | |
| 89 | +#endif | |
| 90 | + | |
| 85 | 91 | static bool is_last_task_frame(struct unwind_state *state) |
| 86 | 92 | { |
| 87 | − unsigned long bp = (unsigned long)state->bp; | |
| 88 | − unsigned long regs = (unsigned long)task_pt_regs(state->task); | |
| 93 | + unsigned long *last_bp = (unsigned long *)task_pt_regs(state->task) - 2; | |
| 94 | + unsigned long *aligned_bp = last_bp - GCC_REALIGN_WORDS; | |
| 89 | 95 | |
| 90 | 96 | /* |
| 91 | 97 | * We have to check for the last task frame at two different locations |
| 92 | 98 | * because gcc can occasionally decide to realign the stack pointer and |
| 93 | − * change the offset of the stack frame by a word in the prologue of a | |
| 94 | − * function called by head/entry code. | |
| 99 | + * change the offset of the stack frame in the prologue of a function | |
| 100 | + * called by head/entry code. Examples: | |
| 101 | + * | |
| 102 | + * <start_secondary>: | |
| 103 | + * push %edi | |
| 104 | + * lea 0x8(%esp),%edi | |
| 105 | + * and $0xfffffff8,%esp | |
| 106 | + * pushl -0x4(%edi) | |
| 107 | + * push %ebp | |
| 108 | + * mov %esp,%ebp | |
| 109 | + * | |
| 110 | + * <x86_64_start_kernel>: | |
| 111 | + * lea 0x8(%rsp),%r10 | |
| 112 | + * and $0xfffffffffffffff0,%rsp | |
| 113 | + * pushq -0x8(%r10) | |
| 114 | + * push %rbp | |
| 115 | + * mov %rsp,%rbp | |
| 116 | + * | |
| 117 | + * Note that after aligning the stack, it pushes a duplicate copy of | |
| 118 | + * the return address before pushing the frame pointer. | |
| 95 | 119 | */ |
| 96 | − return bp == regs - FRAME_HEADER_SIZE || | |
| 97 | − bp == regs - FRAME_HEADER_SIZE - sizeof(long); | |
| 120 | + return (state->bp == last_bp || | |
| 121 | + (state->bp == aligned_bp && *(aligned_bp+1) == *(last_bp+1))); | |
| 98 | 122 | } |
| 99 | 123 | |
| 100 | 124 | /* |
| @@ -1,3 +1,4 @@ | ||
| 1 | +#define DISABLE_BRANCH_PROFILING | |
| 1 | 2 | #define pr_fmt(fmt) "kasan: " fmt |
| 2 | 3 | #include <linux/bootmem.h> |
| 3 | 4 | #include <linux/kasan.h> |
| @@ -590,7 +590,7 @@ static unsigned long mpx_bd_entry_to_bt_addr(struct mm_struct *mm, · 589 unmodified lines | ||
| 590 | 590 | * we might run off the end of the bounds table if we are on |
| 591 | 591 | * a 64-bit kernel and try to get 8 bytes. |
| 592 | 592 | */ |
| 593 | −int get_user_bd_entry(struct mm_struct *mm, unsigned long *bd_entry_ret, | |
| 593 | +static int get_user_bd_entry(struct mm_struct *mm, unsigned long *bd_entry_ret, | |
| 594 | 594 | long __user *bd_entry_ptr) |
| 595 | 595 | { |
| 596 | 596 | u32 bd_entry_32; |
| @@ -26,5 +26,6 @@ obj-$(subst m,y,$(CONFIG_GPIO_PCA953X)) += platform_pcal9555a.o · 25 unmodified lines | ||
| 26 | 26 | obj-$(subst m,y,$(CONFIG_GPIO_PCA953X)) += platform_tca6416.o |
| 27 | 27 | # MISC Devices |
| 28 | 28 | obj-$(subst m,y,$(CONFIG_KEYBOARD_GPIO)) += platform_gpio_keys.o |
| 29 | +obj-$(subst m,y,$(CONFIG_INTEL_MID_POWER_BUTTON)) += platform_mrfld_power_btn.o | |
| 29 | 30 | obj-$(subst m,y,$(CONFIG_RTC_DRV_CMOS)) += platform_mrfld_rtc.o |
| 30 | 31 | obj-$(subst m,y,$(CONFIG_INTEL_MID_WATCHDOG)) += platform_mrfld_wdt.o |
| @@ -0,0 +1,82 @@ | ||
| 1 | +/* | |
| 2 | + * Intel Merrifield power button support | |
| 3 | + * | |
| 4 | + * (C) Copyright 2017 Intel Corporation | |
| 5 | + * | |
| 6 | + * Author: Andy Shevchenko <andriy.shevchenko@linux.intel.com> | |
| 7 | + * | |
| 8 | + * This program is free software; you can redistribute it and/or | |
| 9 | + * modify it under the terms of the GNU General Public License | |
| 10 | + * as published by the Free Software Foundation; version 2 | |
| 11 | + * of the License. | |
| 12 | + */ | |
| 13 | + | |
| 14 | +#include <linux/init.h> | |
| 15 | +#include <linux/ioport.h> | |
| 16 | +#include <linux/platform_device.h> | |
| 17 | +#include <linux/sfi.h> | |
| 18 | + | |
| 19 | +#include <asm/intel-mid.h> | |
| 20 | +#include <asm/intel_scu_ipc.h> | |
| 21 | + | |
| 22 | +static struct resource mrfld_power_btn_resources[] = { | |
| 23 | + { | |
| 24 | + .flags = IORESOURCE_IRQ, | |
| 25 | + }, | |
| 26 | +}; | |
| 27 | + | |
| 28 | +static struct platform_device mrfld_power_btn_dev = { | |
| 29 | + .name = "msic_power_btn", | |
| 30 | + .id = PLATFORM_DEVID_NONE, | |
| 31 | + .num_resources = ARRAY_SIZE(mrfld_power_btn_resources), | |
| 32 | + .resource = mrfld_power_btn_resources, | |
| 33 | +}; | |
| 34 | + | |
| 35 | +static int mrfld_power_btn_scu_status_change(struct notifier_block *nb, | |
| 36 | + unsigned long code, void *data) | |
| 37 | +{ | |
| 38 | + if (code == SCU_DOWN) { | |
| 39 | + platform_device_unregister(&mrfld_power_btn_dev); | |
| 40 | + return 0; | |
| 41 | + } | |
| 42 | + | |
| 43 | + return platform_device_register(&mrfld_power_btn_dev); | |
| 44 | +} | |
| 45 | + | |
| 46 | +static struct notifier_block mrfld_power_btn_scu_notifier = { | |
| 47 | + .notifier_call = mrfld_power_btn_scu_status_change, | |
| 48 | +}; | |
| 49 | + | |
| 50 | +static int __init register_mrfld_power_btn(void) | |
| 51 | +{ | |
| 52 | + if (intel_mid_identify_cpu() != INTEL_MID_CPU_CHIP_TANGIER) | |
| 53 | + return -ENODEV; | |
| 54 | + | |
| 55 | + /* | |
| 56 | + * We need to be sure that the SCU IPC is ready before | |
| 57 | + * PMIC power button device can be registered: | |
| 58 | + */ | |
| 59 | + intel_scu_notifier_add(&mrfld_power_btn_scu_notifier); | |
| 60 | + | |
| 61 | + return 0; | |
| 62 | +} | |
| 63 | +arch_initcall(register_mrfld_power_btn); | |
| 64 | + | |
| 65 | +static void __init *mrfld_power_btn_platform_data(void *info) | |
| 66 | +{ | |
| 67 | + struct resource *res = mrfld_power_btn_resources; | |
| 68 | + struct sfi_device_table_entry *pentry = info; | |
| 69 | + | |
| 70 | + res->start = res->end = pentry->irq; | |
| 71 | + return NULL; | |
| 72 | +} | |
| 73 | + | |
| 74 | +static const struct devs_id mrfld_power_btn_dev_id __initconst = { | |
| 75 | + .name = "bcove_power_btn", | |
| 76 | + .type = SFI_DEV_TYPE_IPC, | |
| 77 | + .delay = 1, | |
| 78 | + .msic = 1, | |
| 79 | + .get_platform_data = &mrfld_power_btn_platform_data, | |
| 80 | +}; | |
| 81 | + | |
| 82 | +sfi_device(mrfld_power_btn_dev_id); | |
| @@ -19,7 +19,7 @@ · 18 unmodified lines | ||
| 19 | 19 | #include <asm/intel_scu_ipc.h> |
| 20 | 20 | #include <asm/io_apic.h> |
| 21 | 21 | |
| 22 | −#define TANGIER_EXT_TIMER0_MSI 15 | |
| 22 | +#define TANGIER_EXT_TIMER0_MSI 12 | |
| 23 | 23 | |
| 24 | 24 | static struct platform_device wdt_dev = { |
| 25 | 25 | .name = "intel_mid_wdt", |
| @@ -17,16 +17,6 @@ · 16 unmodified lines | ||
| 17 | 17 | |
| 18 | 18 | #include "intel_mid_weak_decls.h" |
| 19 | 19 | |
| 20 | −static void penwell_arch_setup(void); | |
| 21 | −/* penwell arch ops */ | |
| 22 | −static struct intel_mid_ops penwell_ops = { | |
| 23 | − .arch_setup = penwell_arch_setup, | |
| 24 | −}; | |
| 25 | − | |
| 26 | −static void mfld_power_off(void) | |
| 27 | −{ | |
| 28 | −} | |
| 29 | − | |
| 30 | 20 | static unsigned long __init mfld_calibrate_tsc(void) |
| 31 | 21 | { |
| 32 | 22 | unsigned long fast_calibrate; |
| @@ -63,9 +53,12 @@ static unsigned long __init mfld_calibrate_tsc(void) · 30 unmodified lines | ||
| 63 | 53 | static void __init penwell_arch_setup(void) |
| 64 | 54 | { |
| 65 | 55 | x86_platform.calibrate_tsc = mfld_calibrate_tsc; |
| 66 | − pm_power_off = mfld_power_off; | |
| 67 | 56 | } |
| 68 | 57 | |
| 58 | +static struct intel_mid_ops penwell_ops = { | |
| 59 | + .arch_setup = penwell_arch_setup, | |
| 60 | +}; | |
| 61 | + | |
| 69 | 62 | void *get_penwell_ops(void) |
| 70 | 63 | { |
| 71 | 64 | return &penwell_ops; |
| @@ -376,10 +376,14 @@ static void punt_bios_to_rescuer(struct bio_set *bs) · 375 unmodified lines | ||
| 376 | 376 | bio_list_init(&punt); |
| 377 | 377 | bio_list_init(&nopunt); |
| 378 | 378 | |
| 379 | − while ((bio = bio_list_pop(current->bio_list))) | |
| 379 | + while ((bio = bio_list_pop(¤t->bio_list[0]))) | |
| 380 | 380 | bio_list_add(bio->bi_pool == bs ? &punt : &nopunt, bio); |
| 381 | + current->bio_list[0] = nopunt; | |
| 381 | 382 | |
| 382 | − *current->bio_list = nopunt; | |
| 383 | + bio_list_init(&nopunt); | |
| 384 | + while ((bio = bio_list_pop(¤t->bio_list[1]))) | |
| 385 | + bio_list_add(bio->bi_pool == bs ? &punt : &nopunt, bio); | |
| 386 | + current->bio_list[1] = nopunt; | |
| 383 | 387 | |
| 384 | 388 | spin_lock(&bs->rescue_lock); |
| 385 | 389 | bio_list_merge(&bs->rescue_list, &punt); |
| @@ -466,7 +470,9 @@ struct bio *bio_alloc_bioset(gfp_t gfp_mask, int nr_iovecs, struct bio_set *bs) · 80 unmodified lines | ||
| 466 | 470 | * we retry with the original gfp_flags. |
| 467 | 471 | */ |
| 468 | 472 | |
| 469 | − if (current->bio_list && !bio_list_empty(current->bio_list)) | |
| 473 | + if (current->bio_list && | |
| 474 | + (!bio_list_empty(¤t->bio_list[0]) || | |
| 475 | + !bio_list_empty(¤t->bio_list[1]))) | |
| 470 | 476 | gfp_mask &= ~__GFP_DIRECT_RECLAIM; |
| 471 | 477 | |
| 472 | 478 | p = mempool_alloc(bs->bio_pool, gfp_mask); |
| @@ -1973,7 +1973,14 @@ end_io: · 1972 unmodified lines | ||
| 1973 | 1973 | */ |
| 1974 | 1974 | blk_qc_t generic_make_request(struct bio *bio) |
| 1975 | 1975 | { |
| 1976 | − struct bio_list bio_list_on_stack; | |
| 1976 | + /* | |
| 1977 | + * bio_list_on_stack[0] contains bios submitted by the current | |
| 1978 | + * make_request_fn. | |
| 1979 | + * bio_list_on_stack[1] contains bios that were submitted before | |
| 1980 | + * the current make_request_fn, but that haven't been processed | |
| 1981 | + * yet. | |
| 1982 | + */ | |
| 1983 | + struct bio_list bio_list_on_stack[2]; | |
| 1977 | 1984 | blk_qc_t ret = BLK_QC_T_NONE; |
| 1978 | 1985 | |
| 1979 | 1986 | if (!generic_make_request_checks(bio)) |
| @@ -1990,7 +1997,7 @@ blk_qc_t generic_make_request(struct bio *bio) · 10 unmodified lines | ||
| 1990 | 1997 | * should be added at the tail |
| 1991 | 1998 | */ |
| 1992 | 1999 | if (current->bio_list) { |
| 1993 | − bio_list_add(current->bio_list, bio); | |
| 2000 | + bio_list_add(¤t->bio_list[0], bio); | |
| 1994 | 2001 | goto out; |
| 1995 | 2002 | } |
| 1996 | 2003 | |
| @@ -2009,18 +2016,17 @@ blk_qc_t generic_make_request(struct bio *bio) · 12 unmodified lines | ||
| 2009 | 2016 | * bio_list, and call into ->make_request() again. |
| 2010 | 2017 | */ |
| 2011 | 2018 | BUG_ON(bio->bi_next); |
| 2012 | − bio_list_init(&bio_list_on_stack); | |
| 2013 | − current->bio_list = &bio_list_on_stack; | |
| 2019 | + bio_list_init(&bio_list_on_stack[0]); | |
| 2020 | + current->bio_list = bio_list_on_stack; | |
| 2014 | 2021 | do { |
| 2015 | 2022 | struct request_queue *q = bdev_get_queue(bio->bi_bdev); |
| 2016 | 2023 | |
| 2017 | 2024 | if (likely(blk_queue_enter(q, false) == 0)) { |
| 2018 | − struct bio_list hold; | |
| 2019 | 2025 | struct bio_list lower, same; |
| 2020 | 2026 | |
| 2021 | 2027 | /* Create a fresh bio_list for all subordinate requests */ |
| 2022 | − hold = bio_list_on_stack; | |
| 2023 | − bio_list_init(&bio_list_on_stack); | |
| 2028 | + bio_list_on_stack[1] = bio_list_on_stack[0]; | |
| 2029 | + bio_list_init(&bio_list_on_stack[0]); | |
| 2024 | 2030 | ret = q->make_request_fn(q, bio); |
| 2025 | 2031 | |
| 2026 | 2032 | blk_queue_exit(q); |
| @@ -2030,19 +2036,19 @@ blk_qc_t generic_make_request(struct bio *bio) · 3 unmodified lines | ||
| 2030 | 2036 | */ |
| 2031 | 2037 | bio_list_init(&lower); |
| 2032 | 2038 | bio_list_init(&same); |
| 2033 | − while ((bio = bio_list_pop(&bio_list_on_stack)) != NULL) | |
| 2039 | + while ((bio = bio_list_pop(&bio_list_on_stack[0])) != NULL) | |
| 2034 | 2040 | if (q == bdev_get_queue(bio->bi_bdev)) |
| 2035 | 2041 | bio_list_add(&same, bio); |
| 2036 | 2042 | else |
| 2037 | 2043 | bio_list_add(&lower, bio); |
| 2038 | 2044 | /* now assemble so we handle the lowest level first */ |
| 2039 | − bio_list_merge(&bio_list_on_stack, &lower); | |
| 2040 | − bio_list_merge(&bio_list_on_stack, &same); | |
| 2041 | − bio_list_merge(&bio_list_on_stack, &hold); | |
| 2045 | + bio_list_merge(&bio_list_on_stack[0], &lower); | |
| 2046 | + bio_list_merge(&bio_list_on_stack[0], &same); | |
| 2047 | + bio_list_merge(&bio_list_on_stack[0], &bio_list_on_stack[1]); | |
| 2042 | 2048 | } else { |
| 2043 | 2049 | bio_io_error(bio); |
| 2044 | 2050 | } |
| 2045 | − bio = bio_list_pop(current->bio_list); | |
| 2051 | + bio = bio_list_pop(&bio_list_on_stack[0]); | |
| 2046 | 2052 | } while (bio); |
| 2047 | 2053 | current->bio_list = NULL; /* deactivate */ |
| 2048 | 2054 | |
| @@ -295,6 +295,9 @@ int blk_mq_reinit_tagset(struct blk_mq_tag_set *set) · 294 unmodified lines | ||
| 295 | 295 | for (i = 0; i < set->nr_hw_queues; i++) { |
| 296 | 296 | struct blk_mq_tags *tags = set->tags[i]; |
| 297 | 297 | |
| 298 | + if (!tags) | |
| 299 | + continue; | |
| 300 | + | |
| 298 | 301 | for (j = 0; j < tags->nr_tags; j++) { |
| 299 | 302 | if (!tags->static_rqs[j]) |
| 300 | 303 | continue; |
| @@ -697,17 +697,8 @@ static void blk_mq_check_expired(struct blk_mq_hw_ctx *hctx, · 696 unmodified lines | ||
| 697 | 697 | { |
| 698 | 698 | struct blk_mq_timeout_data *data = priv; |
| 699 | 699 | |
| 700 | − if (!test_bit(REQ_ATOM_STARTED, &rq->atomic_flags)) { | |
| 701 | − /* | |
| 702 | − * If a request wasn't started before the queue was | |
| 703 | − * marked dying, kill it here or it'll go unnoticed. | |
| 704 | − */ | |
| 705 | − if (unlikely(blk_queue_dying(rq->q))) { | |
| 706 | − rq->errors = -EIO; | |
| 707 | − blk_mq_end_request(rq, rq->errors); | |
| 708 | − } | |
| 700 | + if (!test_bit(REQ_ATOM_STARTED, &rq->atomic_flags)) | |
| 709 | 701 | return; |
| 710 | − } | |
| 711 | 702 | |
| 712 | 703 | if (time_after_eq(jiffies, rq->deadline)) { |
| 713 | 704 | if (!blk_mark_rq_complete(rq)) |
| @@ -1434,7 +1425,8 @@ static blk_qc_t request_to_qc_t(struct blk_mq_hw_ctx *hctx, struct request *rq) · 720 unmodified lines | ||
| 1434 | 1425 | return blk_tag_to_qc_t(rq->internal_tag, hctx->queue_num, true); |
| 1435 | 1426 | } |
| 1436 | 1427 | |
| 1437 | −static void blk_mq_try_issue_directly(struct request *rq, blk_qc_t *cookie) | |
| 1428 | +static void blk_mq_try_issue_directly(struct request *rq, blk_qc_t *cookie, | |
| 1429 | + bool may_sleep) | |
| 1438 | 1430 | { |
| 1439 | 1431 | struct request_queue *q = rq->q; |
| 1440 | 1432 | struct blk_mq_queue_data bd = { |
| @@ -1475,7 +1467,7 @@ static void blk_mq_try_issue_directly(struct request *rq, blk_qc_t *cookie) · 34 unmodified lines | ||
| 1475 | 1467 | } |
| 1476 | 1468 | |
| 1477 | 1469 | insert: |
| 1478 | − blk_mq_sched_insert_request(rq, false, true, true, false); | |
| 1470 | + blk_mq_sched_insert_request(rq, false, true, false, may_sleep); | |
| 1479 | 1471 | } |
| 1480 | 1472 | |
| 1481 | 1473 | /* |
| @@ -1569,11 +1561,11 @@ static blk_qc_t blk_mq_make_request(struct request_queue *q, struct bio *bio) · 87 unmodified lines | ||
| 1569 | 1561 | |
| 1570 | 1562 | if (!(data.hctx->flags & BLK_MQ_F_BLOCKING)) { |
| 1571 | 1563 | rcu_read_lock(); |
| 1572 | − blk_mq_try_issue_directly(old_rq, &cookie); | |
| 1564 | + blk_mq_try_issue_directly(old_rq, &cookie, false); | |
| 1573 | 1565 | rcu_read_unlock(); |
| 1574 | 1566 | } else { |
| 1575 | 1567 | srcu_idx = srcu_read_lock(&data.hctx->queue_rq_srcu); |
| 1576 | − blk_mq_try_issue_directly(old_rq, &cookie); | |
| 1568 | + blk_mq_try_issue_directly(old_rq, &cookie, true); | |
| 1577 | 1569 | srcu_read_unlock(&data.hctx->queue_rq_srcu, srcu_idx); |
| 1578 | 1570 | } |
| 1579 | 1571 | goto done; |
| @@ -30,11 +30,11 @@ static void blk_stat_flush_batch(struct blk_rq_stat *stat) · 29 unmodified lines | ||
| 30 | 30 | |
| 31 | 31 | static void blk_stat_sum(struct blk_rq_stat *dst, struct blk_rq_stat *src) |
| 32 | 32 | { |
| 33 | + blk_stat_flush_batch(src); | |
| 34 | + | |
| 33 | 35 | if (!src->nr_samples) |
| 34 | 36 | return; |
| 35 | 37 | |
| 36 | − blk_stat_flush_batch(src); | |
| 37 | − | |
| 38 | 38 | dst->min = min(dst->min, src->min); |
| 39 | 39 | dst->max = max(dst->max, src->max); |
| 40 | 40 | |
| @@ -266,7 +266,7 @@ unlock: · 265 unmodified lines | ||
| 266 | 266 | return err; |
| 267 | 267 | } |
| 268 | 268 | |
| 269 | −int af_alg_accept(struct sock *sk, struct socket *newsock) | |
| 269 | +int af_alg_accept(struct sock *sk, struct socket *newsock, bool kern) | |
| 270 | 270 | { |
| 271 | 271 | struct alg_sock *ask = alg_sk(sk); |
| 272 | 272 | const struct af_alg_type *type; |
| @@ -281,7 +281,7 @@ int af_alg_accept(struct sock *sk, struct socket *newsock) · 8 unmodified lines | ||
| 281 | 281 | if (!type) |
| 282 | 282 | goto unlock; |
| 283 | 283 | |
| 284 | − sk2 = sk_alloc(sock_net(sk), PF_ALG, GFP_KERNEL, &alg_proto, 0); | |
| 284 | + sk2 = sk_alloc(sock_net(sk), PF_ALG, GFP_KERNEL, &alg_proto, kern); | |
| 285 | 285 | err = -ENOMEM; |
| 286 | 286 | if (!sk2) |
| 287 | 287 | goto unlock; |
| @@ -323,9 +323,10 @@ unlock: · 35 unmodified lines | ||
| 323 | 323 | } |
| 324 | 324 | EXPORT_SYMBOL_GPL(af_alg_accept); |
| 325 | 325 | |
| 326 | −static int alg_accept(struct socket *sock, struct socket *newsock, int flags) | |
| 326 | +static int alg_accept(struct socket *sock, struct socket *newsock, int flags, | |
| 327 | + bool kern) | |
| 327 | 328 | { |
| 328 | − return af_alg_accept(sock->sk, newsock); | |
| 329 | + return af_alg_accept(sock->sk, newsock, kern); | |
| 329 | 330 | } |
| 330 | 331 | |
| 331 | 332 | static const struct proto_ops alg_proto_ops = { |
| @@ -239,7 +239,8 @@ unlock: · 238 unmodified lines | ||
| 239 | 239 | return err ?: len; |
| 240 | 240 | } |
| 241 | 241 | |
| 242 | −static int hash_accept(struct socket *sock, struct socket *newsock, int flags) | |
| 242 | +static int hash_accept(struct socket *sock, struct socket *newsock, int flags, | |
| 243 | + bool kern) | |
| 243 | 244 | { |
| 244 | 245 | struct sock *sk = sock->sk; |
| 245 | 246 | struct alg_sock *ask = alg_sk(sk); |
| @@ -260,7 +261,7 @@ static int hash_accept(struct socket *sock, struct socket *newsock, int flags) · 14 unmodified lines | ||
| 260 | 261 | if (err) |
| 261 | 262 | return err; |
| 262 | 263 | |
| 263 | − err = af_alg_accept(ask->parent, newsock); | |
| 264 | + err = af_alg_accept(ask->parent, newsock, kern); | |
| 264 | 265 | if (err) |
| 265 | 266 | return err; |
| 266 | 267 | |
| @@ -378,7 +379,7 @@ static int hash_recvmsg_nokey(struct socket *sock, struct msghdr *msg, · 111 unmodified lines | ||
| 378 | 379 | } |
| 379 | 380 | |
| 380 | 381 | static int hash_accept_nokey(struct socket *sock, struct socket *newsock, |
| 381 | − int flags) | |
| 382 | + int flags, bool kern) | |
| 382 | 383 | { |
| 383 | 384 | int err; |
| 384 | 385 | |
| @@ -386,7 +387,7 @@ static int hash_accept_nokey(struct socket *sock, struct socket *newsock, · 1 unmodified line | ||
| 386 | 387 | if (err) |
| 387 | 388 | return err; |
| 388 | 389 | |
| 389 | − return hash_accept(sock, newsock, flags); | |
| 390 | + return hash_accept(sock, newsock, flags, kern); | |
| 390 | 391 | } |
| 391 | 392 | |
| 392 | 393 | static struct proto_ops algif_hash_ops_nokey = { |
| @@ -182,11 +182,6 @@ int __weak arch_register_cpu(int cpu) · 181 unmodified lines | ||
| 182 | 182 | |
| 183 | 183 | void __weak arch_unregister_cpu(int cpu) {} |
| 184 | 184 | |
| 185 | −int __weak acpi_map_cpu2node(acpi_handle handle, int cpu, int physid) | |
| 186 | −{ | |
| 187 | − return -ENODEV; | |
| 188 | −} | |
| 189 | − | |
| 190 | 185 | static int acpi_processor_hotadd_init(struct acpi_processor *pr) |
| 191 | 186 | { |
| 192 | 187 | unsigned long long sta; |
| @@ -285,6 +280,13 @@ static int acpi_processor_get_info(struct acpi_device *device) · 92 unmodified lines | ||
| 285 | 280 | pr->acpi_id = value; |
| 286 | 281 | } |
| 287 | 282 | |
| 283 | + if (acpi_duplicate_processor_id(pr->acpi_id)) { | |
| 284 | + dev_err(&device->dev, | |
| 285 | + "Failed to get unique processor _UID (0x%x)\n", | |
| 286 | + pr->acpi_id); | |
| 287 | + return -ENODEV; | |
| 288 | + } | |
| 289 | + | |
| 288 | 290 | pr->phys_id = acpi_get_phys_id(pr->handle, device_declaration, |
| 289 | 291 | pr->acpi_id); |
| 290 | 292 | if (invalid_phys_cpuid(pr->phys_id)) |
| @@ -585,7 +587,7 @@ static struct acpi_scan_handler processor_container_handler = { · 294 unmodified lines | ||
| 585 | 587 | static int nr_unique_ids __initdata; |
| 586 | 588 | |
| 587 | 589 | /* The number of the duplicate processor IDs */ |
| 588 | −static int nr_duplicate_ids __initdata; | |
| 590 | +static int nr_duplicate_ids; | |
| 589 | 591 | |
| 590 | 592 | /* Used to store the unique processor IDs */ |
| 591 | 593 | static int unique_processor_ids[] __initdata = { |
| @@ -593,7 +595,7 @@ static int unique_processor_ids[] __initdata = { · 1 unmodified line | ||
| 593 | 595 | }; |
| 594 | 596 | |
| 595 | 597 | /* Used to store the duplicate processor IDs */ |
| 596 | −static int duplicate_processor_ids[] __initdata = { | |
| 598 | +static int duplicate_processor_ids[] = { | |
| 597 | 599 | [0 ... NR_CPUS - 1] = -1, |
| 598 | 600 | }; |
| 599 | 601 | |
| @@ -638,28 +640,53 @@ static acpi_status __init acpi_processor_ids_walk(acpi_handle handle, · 38 unmodified lines | ||
| 638 | 640 | void **rv) |
| 639 | 641 | { |
| 640 | 642 | acpi_status status; |
| 643 | + acpi_object_type acpi_type; | |
| 644 | + unsigned long long uid; | |
| 641 | 645 | union acpi_object object = { 0 }; |
| 642 | 646 | struct acpi_buffer buffer = { sizeof(union acpi_object), &object }; |
| 643 | 647 | |
| 644 | − status = acpi_evaluate_object(handle, NULL, NULL, &buffer); | |
| 648 | + status = acpi_get_type(handle, &acpi_type); | |
| 645 | 649 | if (ACPI_FAILURE(status)) |
| 646 | − acpi_handle_info(handle, "Not get the processor object\n"); | |
| 647 | − else | |
| 648 | − processor_validated_ids_update(object.processor.proc_id); | |
| 650 | + return false; | |
| 651 | + | |
| 652 | + switch (acpi_type) { | |
| 653 | + case ACPI_TYPE_PROCESSOR: | |
| 654 | + status = acpi_evaluate_object(handle, NULL, NULL, &buffer); | |
| 655 | + if (ACPI_FAILURE(status)) | |
| 656 | + goto err; | |
| 657 | + uid = object.processor.proc_id; | |
| 658 | + break; | |
| 659 | + | |
| 660 | + case ACPI_TYPE_DEVICE: | |
| 661 | + status = acpi_evaluate_integer(handle, "_UID", NULL, &uid); | |
| 662 | + if (ACPI_FAILURE(status)) | |
| 663 | + goto err; | |
| 664 | + break; | |
| 665 | + default: | |
| 666 | + goto err; | |
| 667 | + } | |
| 668 | + | |
| 669 | + processor_validated_ids_update(uid); | |
| 670 | + return true; | |
| 671 | + | |
| 672 | +err: | |
| 673 | + acpi_handle_info(handle, "Invalid processor object\n"); | |
| 674 | + return false; | |
| 649 | 675 | |
| 650 | − return AE_OK; | |
| 651 | 676 | } |
| 652 | 677 | |
| 653 | −static void __init acpi_processor_check_duplicates(void) | |
| 678 | +void __init acpi_processor_check_duplicates(void) | |
| 654 | 679 | { |
| 655 | − /* Search all processor nodes in ACPI namespace */ | |
| 680 | + /* check the correctness for all processors in ACPI namespace */ | |
| 656 | 681 | acpi_walk_namespace(ACPI_TYPE_PROCESSOR, ACPI_ROOT_OBJECT, |
| 657 | 682 | ACPI_UINT32_MAX, |
| 658 | 683 | acpi_processor_ids_walk, |
| 659 | 684 | NULL, NULL, NULL); |
| 685 | + acpi_get_devices(ACPI_PROCESSOR_DEVICE_HID, acpi_processor_ids_walk, | |
| 686 | + NULL, NULL); | |
| 660 | 687 | } |
| 661 | 688 | |
| 662 | −bool __init acpi_processor_validate_proc_id(int proc_id) | |
| 689 | +bool acpi_duplicate_processor_id(int proc_id) | |
| 663 | 690 | { |
| 664 | 691 | int i; |
| 665 | 692 | |
| @@ -1249,7 +1249,6 @@ static int __init acpi_init(void) · 1248 unmodified lines | ||
| 1249 | 1249 | acpi_wakeup_device_init(); |
| 1250 | 1250 | acpi_debugger_init(); |
| 1251 | 1251 | acpi_setup_sb_notify_handler(); |
| 1252 | − acpi_set_processor_mapping(); | |
| 1253 | 1252 | return 0; |
| 1254 | 1253 | } |
| 1255 | 1254 | |
| @@ -1617,7 +1617,11 @@ static int cmp_map(const void *m0, const void *m1) · 1616 unmodified lines | ||
| 1617 | 1617 | const struct nfit_set_info_map *map0 = m0; |
| 1618 | 1618 | const struct nfit_set_info_map *map1 = m1; |
| 1619 | 1619 | |
| 1620 | − return map0->region_offset - map1->region_offset; | |
| 1620 | + if (map0->region_offset < map1->region_offset) | |
| 1621 | + return -1; | |
| 1622 | + else if (map0->region_offset > map1->region_offset) | |
| 1623 | + return 1; | |
| 1624 | + return 0; | |
| 1621 | 1625 | } |
| 1622 | 1626 | |
| 1623 | 1627 | /* Retrieve the nth entry referencing this spa */ |
| @@ -32,12 +32,12 @@ static struct acpi_table_madt *get_madt_table(void) · 31 unmodified lines | ||
| 32 | 32 | } |
| 33 | 33 | |
| 34 | 34 | static int map_lapic_id(struct acpi_subtable_header *entry, |
| 35 | − u32 acpi_id, phys_cpuid_t *apic_id, bool ignore_disabled) | |
| 35 | + u32 acpi_id, phys_cpuid_t *apic_id) | |
| 36 | 36 | { |
| 37 | 37 | struct acpi_madt_local_apic *lapic = |
| 38 | 38 | container_of(entry, struct acpi_madt_local_apic, header); |
| 39 | 39 | |
| 40 | − if (ignore_disabled && !(lapic->lapic_flags & ACPI_MADT_ENABLED)) | |
| 40 | + if (!(lapic->lapic_flags & ACPI_MADT_ENABLED)) | |
| 41 | 41 | return -ENODEV; |
| 42 | 42 | |
| 43 | 43 | if (lapic->processor_id != acpi_id) |
| @@ -48,13 +48,12 @@ static int map_lapic_id(struct acpi_subtable_header *entry, · 4 unmodified lines | ||
| 48 | 48 | } |
| 49 | 49 | |
| 50 | 50 | static int map_x2apic_id(struct acpi_subtable_header *entry, |
| 51 | − int device_declaration, u32 acpi_id, phys_cpuid_t *apic_id, | |
| 52 | − bool ignore_disabled) | |
| 51 | + int device_declaration, u32 acpi_id, phys_cpuid_t *apic_id) | |
| 53 | 52 | { |
| 54 | 53 | struct acpi_madt_local_x2apic *apic = |
| 55 | 54 | container_of(entry, struct acpi_madt_local_x2apic, header); |
| 56 | 55 | |
| 57 | − if (ignore_disabled && !(apic->lapic_flags & ACPI_MADT_ENABLED)) | |
| 56 | + if (!(apic->lapic_flags & ACPI_MADT_ENABLED)) | |
| 58 | 57 | return -ENODEV; |
| 59 | 58 | |
| 60 | 59 | if (device_declaration && (apic->uid == acpi_id)) { |
| @@ -66,13 +65,12 @@ static int map_x2apic_id(struct acpi_subtable_header *entry, · 5 unmodified lines | ||
| 66 | 65 | } |
| 67 | 66 | |
| 68 | 67 | static int map_lsapic_id(struct acpi_subtable_header *entry, |
| 69 | − int device_declaration, u32 acpi_id, phys_cpuid_t *apic_id, | |
| 70 | − bool ignore_disabled) | |
| 68 | + int device_declaration, u32 acpi_id, phys_cpuid_t *apic_id) | |
| 71 | 69 | { |
| 72 | 70 | struct acpi_madt_local_sapic *lsapic = |
| 73 | 71 | container_of(entry, struct acpi_madt_local_sapic, header); |
| 74 | 72 | |
| 75 | − if (ignore_disabled && !(lsapic->lapic_flags & ACPI_MADT_ENABLED)) | |
| 73 | + if (!(lsapic->lapic_flags & ACPI_MADT_ENABLED)) | |
| 76 | 74 | return -ENODEV; |
| 77 | 75 | |
| 78 | 76 | if (device_declaration) { |
| @@ -89,13 +87,12 @@ static int map_lsapic_id(struct acpi_subtable_header *entry, · 10 unmodified lines | ||
| 89 | 87 | * Retrieve the ARM CPU physical identifier (MPIDR) |
| 90 | 88 | */ |
| 91 | 89 | static int map_gicc_mpidr(struct acpi_subtable_header *entry, |
| 92 | − int device_declaration, u32 acpi_id, phys_cpuid_t *mpidr, | |
| 93 | − bool ignore_disabled) | |
| 90 | + int device_declaration, u32 acpi_id, phys_cpuid_t *mpidr) | |
| 94 | 91 | { |
| 95 | 92 | struct acpi_madt_generic_interrupt *gicc = |
| 96 | 93 | container_of(entry, struct acpi_madt_generic_interrupt, header); |
| 97 | 94 | |
| 98 | − if (ignore_disabled && !(gicc->flags & ACPI_MADT_ENABLED)) | |
| 95 | + if (!(gicc->flags & ACPI_MADT_ENABLED)) | |
| 99 | 96 | return -ENODEV; |
| 100 | 97 | |
| 101 | 98 | /* device_declaration means Device object in DSDT, in the |
| @@ -112,7 +109,7 @@ static int map_gicc_mpidr(struct acpi_subtable_header *entry, · 10 unmodified lines | ||
| 112 | 109 | } |
| 113 | 110 | |
| 114 | 111 | static phys_cpuid_t map_madt_entry(struct acpi_table_madt *madt, |
| 115 | − int type, u32 acpi_id, bool ignore_disabled) | |
| 112 | + int type, u32 acpi_id) | |
| 116 | 113 | { |
| 117 | 114 | unsigned long madt_end, entry; |
| 118 | 115 | phys_cpuid_t phys_id = PHYS_CPUID_INVALID; /* CPU hardware ID */ |
| @@ -130,20 +127,16 @@ static phys_cpuid_t map_madt_entry(struct acpi_table_madt *madt, · 11 unmodified lines | ||
| 130 | 127 | struct acpi_subtable_header *header = |
| 131 | 128 | (struct acpi_subtable_header *)entry; |
| 132 | 129 | if (header->type == ACPI_MADT_TYPE_LOCAL_APIC) { |
| 133 | − if (!map_lapic_id(header, acpi_id, &phys_id, | |
| 134 | − ignore_disabled)) | |
| 130 | + if (!map_lapic_id(header, acpi_id, &phys_id)) | |
| 135 | 131 | break; |
| 136 | 132 | } else if (header->type == ACPI_MADT_TYPE_LOCAL_X2APIC) { |
| 137 | − if (!map_x2apic_id(header, type, acpi_id, &phys_id, | |
| 138 | − ignore_disabled)) | |
| 133 | + if (!map_x2apic_id(header, type, acpi_id, &phys_id)) | |
| 139 | 134 | break; |
| 140 | 135 | } else if (header->type == ACPI_MADT_TYPE_LOCAL_SAPIC) { |
| 141 | − if (!map_lsapic_id(header, type, acpi_id, &phys_id, | |
| 142 | − ignore_disabled)) | |
| 136 | + if (!map_lsapic_id(header, type, acpi_id, &phys_id)) | |
| 143 | 137 | break; |
| 144 | 138 | } else if (header->type == ACPI_MADT_TYPE_GENERIC_INTERRUPT) { |
| 145 | − if (!map_gicc_mpidr(header, type, acpi_id, &phys_id, | |
| 146 | − ignore_disabled)) | |
| 139 | + if (!map_gicc_mpidr(header, type, acpi_id, &phys_id)) | |
| 147 | 140 | break; |
| 148 | 141 | } |
| 149 | 142 | entry += header->length; |
| @@ -161,15 +154,14 @@ phys_cpuid_t __init acpi_map_madt_entry(u32 acpi_id) · 11 unmodified lines | ||
| 161 | 154 | if (!madt) |
| 162 | 155 | return PHYS_CPUID_INVALID; |
| 163 | 156 | |
| 164 | − rv = map_madt_entry(madt, 1, acpi_id, true); | |
| 157 | + rv = map_madt_entry(madt, 1, acpi_id); | |
| 165 | 158 | |
| 166 | 159 | acpi_put_table((struct acpi_table_header *)madt); |
| 167 | 160 | |
| 168 | 161 | return rv; |
| 169 | 162 | } |
| 170 | 163 | |
| 171 | −static phys_cpuid_t map_mat_entry(acpi_handle handle, int type, u32 acpi_id, | |
| 172 | − bool ignore_disabled) | |
| 164 | +static phys_cpuid_t map_mat_entry(acpi_handle handle, int type, u32 acpi_id) | |
| 173 | 165 | { |
| 174 | 166 | struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL }; |
| 175 | 167 | union acpi_object *obj; |
| @@ -190,38 +182,30 @@ static phys_cpuid_t map_mat_entry(acpi_handle handle, int type, u32 acpi_id, · 14 unmodified lines | ||
| 190 | 182 | |
| 191 | 183 | header = (struct acpi_subtable_header *)obj->buffer.pointer; |
| 192 | 184 | if (header->type == ACPI_MADT_TYPE_LOCAL_APIC) |
| 193 | − map_lapic_id(header, acpi_id, &phys_id, ignore_disabled); | |
| 185 | + map_lapic_id(header, acpi_id, &phys_id); | |
| 194 | 186 | else if (header->type == ACPI_MADT_TYPE_LOCAL_SAPIC) |
| 195 | − map_lsapic_id(header, type, acpi_id, &phys_id, ignore_disabled); | |
| 187 | + map_lsapic_id(header, type, acpi_id, &phys_id); | |
| 196 | 188 | else if (header->type == ACPI_MADT_TYPE_LOCAL_X2APIC) |
| 197 | − map_x2apic_id(header, type, acpi_id, &phys_id, ignore_disabled); | |
| 189 | + map_x2apic_id(header, type, acpi_id, &phys_id); | |
| 198 | 190 | else if (header->type == ACPI_MADT_TYPE_GENERIC_INTERRUPT) |
| 199 | − map_gicc_mpidr(header, type, acpi_id, &phys_id, | |
| 200 | − ignore_disabled); | |
| 191 | + map_gicc_mpidr(header, type, acpi_id, &phys_id); | |
| 201 | 192 | |
| 202 | 193 | exit: |
| 203 | 194 | kfree(buffer.pointer); |
| 204 | 195 | return phys_id; |
| 205 | 196 | } |
| 206 | 197 | |
| 207 | −static phys_cpuid_t __acpi_get_phys_id(acpi_handle handle, int type, | |
| 208 | − u32 acpi_id, bool ignore_disabled) | |
| 198 | +phys_cpuid_t acpi_get_phys_id(acpi_handle handle, int type, u32 acpi_id) | |
| 209 | 199 | { |
| 210 | 200 | phys_cpuid_t phys_id; |
| 211 | 201 | |
| 212 | − phys_id = map_mat_entry(handle, type, acpi_id, ignore_disabled); | |
| 202 | + phys_id = map_mat_entry(handle, type, acpi_id); | |
| 213 | 203 | if (invalid_phys_cpuid(phys_id)) |
| 214 | − phys_id = map_madt_entry(get_madt_table(), type, acpi_id, | |
| 215 | − ignore_disabled); | |
| 204 | + phys_id = map_madt_entry(get_madt_table(), type, acpi_id); | |
| 216 | 205 | |
| 217 | 206 | return phys_id; |
| 218 | 207 | } |
| 219 | 208 | |
| 220 | −phys_cpuid_t acpi_get_phys_id(acpi_handle handle, int type, u32 acpi_id) | |
| 221 | −{ | |
| 222 | − return __acpi_get_phys_id(handle, type, acpi_id, true); | |
| 223 | −} | |
| 224 | − | |
| 225 | 209 | int acpi_map_cpuid(phys_cpuid_t phys_id, u32 acpi_id) |
| 226 | 210 | { |
| 227 | 211 | #ifdef CONFIG_SMP |
| @@ -278,79 +262,6 @@ int acpi_get_cpuid(acpi_handle handle, int type, u32 acpi_id) · 50 unmodified lines | ||
| 278 | 262 | } |
| 279 | 263 | EXPORT_SYMBOL_GPL(acpi_get_cpuid); |
| 280 | 264 | |
| 281 | −#ifdef CONFIG_ACPI_HOTPLUG_CPU | |
| 282 | −static bool __init | |
| 283 | −map_processor(acpi_handle handle, phys_cpuid_t *phys_id, int *cpuid) | |
| 284 | −{ | |
| 285 | − int type, id; | |
| 286 | − u32 acpi_id; | |
| 287 | − acpi_status status; | |
| 288 | − acpi_object_type acpi_type; | |
| 289 | − unsigned long long tmp; | |
| 290 | − union acpi_object object = { 0 }; | |
| 291 | − struct acpi_buffer buffer = { sizeof(union acpi_object), &object }; | |
| 292 | − | |
| 293 | − status = acpi_get_type(handle, &acpi_type); | |
| 294 | − if (ACPI_FAILURE(status)) | |
| 295 | − return false; | |
| 296 | − | |
| 297 | − switch (acpi_type) { | |
| 298 | − case ACPI_TYPE_PROCESSOR: | |
| 299 | − status = acpi_evaluate_object(handle, NULL, NULL, &buffer); | |
| 300 | − if (ACPI_FAILURE(status)) | |
| 301 | − return false; | |
| 302 | − acpi_id = object.processor.proc_id; | |
| 303 | − | |
| 304 | − /* validate the acpi_id */ | |
| 305 | − if(acpi_processor_validate_proc_id(acpi_id)) | |
| 306 | − return false; | |
| 307 | − break; | |
| 308 | − case ACPI_TYPE_DEVICE: | |
| 309 | − status = acpi_evaluate_integer(handle, "_UID", NULL, &tmp); | |
| 310 | − if (ACPI_FAILURE(status)) | |
| 311 | − return false; | |
| 312 | − acpi_id = tmp; | |
| 313 | − break; | |
| 314 | − default: | |
| 315 | − return false; | |
| 316 | − } | |
| 317 | − | |
| 318 | − type = (acpi_type == ACPI_TYPE_DEVICE) ? 1 : 0; | |
| 319 | − | |
| 320 | − *phys_id = __acpi_get_phys_id(handle, type, acpi_id, false); | |
| 321 | − id = acpi_map_cpuid(*phys_id, acpi_id); | |
| 322 | − | |
| 323 | − if (id < 0) | |
| 324 | − return false; | |
| 325 | − *cpuid = id; | |
| 326 | − return true; | |
| 327 | −} | |
| 328 | − | |
| 329 | −static acpi_status __init | |
| 330 | −set_processor_node_mapping(acpi_handle handle, u32 lvl, void *context, | |
| 331 | − void **rv) | |
| 332 | −{ | |
| 333 | − phys_cpuid_t phys_id; | |
| 334 | − int cpu_id; | |
| 335 | − | |
| 336 | − if (!map_processor(handle, &phys_id, &cpu_id)) | |
| 337 | − return AE_ERROR; | |
| 338 | − | |
| 339 | − acpi_map_cpu2node(handle, cpu_id, phys_id); | |
| 340 | − return AE_OK; | |
| 341 | −} | |
| 342 | − | |
| 343 | −void __init acpi_set_processor_mapping(void) | |
| 344 | −{ | |
| 345 | − /* Set persistent cpu <-> node mapping for all processors. */ | |
| 346 | − acpi_walk_namespace(ACPI_TYPE_PROCESSOR, ACPI_ROOT_OBJECT, | |
| 347 | − ACPI_UINT32_MAX, set_processor_node_mapping, | |
| 348 | − NULL, NULL, NULL); | |
| 349 | −} | |
| 350 | −#else | |
| 351 | −void __init acpi_set_processor_mapping(void) {} | |
| 352 | −#endif /* CONFIG_ACPI_HOTPLUG_CPU */ | |
| 353 | − | |
| 354 | 265 | #ifdef CONFIG_ACPI_HOTPLUG_IOAPIC |
| 355 | 266 | static int get_ioapic_id(struct acpi_subtable_header *entry, u32 gsi_base, |
| 356 | 267 | u64 *phys_addr, int *ioapic_id) |
| @@ -30,7 +30,7 @@ static bool qdf2400_erratum_44_present(struct acpi_table_header *h) · 29 unmodified lines | ||
| 30 | 30 | return true; |
| 31 | 31 | |
| 32 | 32 | if (!memcmp(h->oem_table_id, "QDF2400 ", ACPI_OEM_TABLE_ID_SIZE) && |
| 33 | − h->oem_revision == 0) | |
| 33 | + h->oem_revision == 1) | |
| 34 | 34 | return true; |
| 35 | 35 | |
| 36 | 36 | return false; |
| @@ -177,7 +177,8 @@ static int ahci_qoriq_phy_init(struct ahci_host_priv *hpriv) · 176 unmodified lines | ||
| 177 | 177 | case AHCI_LS1043A: |
| 178 | 178 | if (!qpriv->ecc_addr) |
| 179 | 179 | return -EINVAL; |
| 180 | − writel(ECC_DIS_ARMV8_CH2, qpriv->ecc_addr); | |
| 180 | + writel(readl(qpriv->ecc_addr) | ECC_DIS_ARMV8_CH2, | |
| 181 | + qpriv->ecc_addr); | |
| 181 | 182 | writel(AHCI_PORT_PHY_1_CFG, reg_base + PORT_PHY1); |
| 182 | 183 | writel(AHCI_PORT_TRANS_CFG, reg_base + PORT_TRANS); |
| 183 | 184 | if (qpriv->is_dmacoherent) |
| @@ -194,7 +195,8 @@ static int ahci_qoriq_phy_init(struct ahci_host_priv *hpriv) · 10 unmodified lines | ||
| 194 | 195 | case AHCI_LS1046A: |
| 195 | 196 | if (!qpriv->ecc_addr) |
| 196 | 197 | return -EINVAL; |
| 197 | − writel(ECC_DIS_ARMV8_CH2, qpriv->ecc_addr); | |
| 198 | + writel(readl(qpriv->ecc_addr) | ECC_DIS_ARMV8_CH2, | |
| 199 | + qpriv->ecc_addr); | |
| 198 | 200 | writel(AHCI_PORT_PHY_1_CFG, reg_base + PORT_PHY1); |
| 199 | 201 | writel(AHCI_PORT_TRANS_CFG, reg_base + PORT_TRANS); |
| 200 | 202 | if (qpriv->is_dmacoherent) |
| @@ -1482,7 +1482,6 @@ unsigned int ata_sff_qc_issue(struct ata_queued_cmd *qc) · 1481 unmodified lines | ||
| 1482 | 1482 | break; |
| 1483 | 1483 | |
| 1484 | 1484 | default: |
| 1485 | − WARN_ON_ONCE(1); | |
| 1486 | 1485 | return AC_ERR_SYSTEM; |
| 1487 | 1486 | } |
| 1488 | 1487 | |
| @@ -224,7 +224,6 @@ static DECLARE_TRANSPORT_CLASS(ata_port_class, · 223 unmodified lines | ||
| 224 | 224 | |
| 225 | 225 | static void ata_tport_release(struct device *dev) |
| 226 | 226 | { |
| 227 | − put_device(dev->parent); | |
| 228 | 227 | } |
| 229 | 228 | |
| 230 | 229 | /** |
| @@ -284,7 +283,7 @@ int ata_tport_add(struct device *parent, · 53 unmodified lines | ||
| 284 | 283 | device_initialize(dev); |
| 285 | 284 | dev->type = &ata_port_type; |
| 286 | 285 | |
| 287 | − dev->parent = get_device(parent); | |
| 286 | + dev->parent = parent; | |
| 288 | 287 | dev->release = ata_tport_release; |
| 289 | 288 | dev_set_name(dev, "ata%d", ap->print_id); |
| 290 | 289 | transport_setup_device(dev); |
| @@ -348,7 +347,6 @@ static DECLARE_TRANSPORT_CLASS(ata_link_class, · 57 unmodified lines | ||
| 348 | 347 | |
| 349 | 348 | static void ata_tlink_release(struct device *dev) |
| 350 | 349 | { |
| 351 | − put_device(dev->parent); | |
| 352 | 350 | } |
| 353 | 351 | |
| 354 | 352 | /** |
| @@ -410,7 +408,7 @@ int ata_tlink_add(struct ata_link *link) · 55 unmodified lines | ||
| 410 | 408 | int error; |
| 411 | 409 | |
| 412 | 410 | device_initialize(dev); |
| 413 | − dev->parent = get_device(&ap->tdev); | |
| 411 | + dev->parent = &ap->tdev; | |
| 414 | 412 | dev->release = ata_tlink_release; |
| 415 | 413 | if (ata_is_host_link(link)) |
| 416 | 414 | dev_set_name(dev, "link%d", ap->print_id); |
| @@ -589,7 +587,6 @@ static DECLARE_TRANSPORT_CLASS(ata_dev_class, · 172 unmodified lines | ||
| 589 | 587 | |
| 590 | 588 | static void ata_tdev_release(struct device *dev) |
| 591 | 589 | { |
| 592 | − put_device(dev->parent); | |
| 593 | 590 | } |
| 594 | 591 | |
| 595 | 592 | /** |
| @@ -662,7 +659,7 @@ static int ata_tdev_add(struct ata_device *ata_dev) · 66 unmodified lines | ||
| 662 | 659 | int error; |
| 663 | 660 | |
| 664 | 661 | device_initialize(dev); |
| 665 | − dev->parent = get_device(&link->tdev); | |
| 662 | + dev->parent = &link->tdev; | |
| 666 | 663 | dev->release = ata_tdev_release; |
| 667 | 664 | if (ata_is_host_link(link)) |
| 668 | 665 | dev_set_name(dev, "dev%d.%d", ap->print_id,ata_dev->devno); |
| @@ -218,6 +218,7 @@ static const struct of_device_id img_ascii_lcd_matches[] = { · 217 unmodified lines | ||
| 218 | 218 | { .compatible = "img,boston-lcd", .data = &boston_config }, |
| 219 | 219 | { .compatible = "mti,malta-lcd", .data = &malta_config }, |
| 220 | 220 | { .compatible = "mti,sead3-lcd", .data = &sead3_config }, |
| 221 | + { /* sentinel */ } | |
| 221 | 222 | }; |
| 222 | 223 | |
| 223 | 224 | /** |
| @@ -639,11 +639,6 @@ int lock_device_hotplug_sysfs(void) · 638 unmodified lines | ||
| 639 | 639 | return restart_syscall(); |
| 640 | 640 | } |
| 641 | 641 | |
| 642 | −void assert_held_device_hotplug(void) | |
| 643 | −{ | |
| 644 | − lockdep_assert_held(&device_hotplug_lock); | |
| 645 | −} | |
| 646 | − | |
| 647 | 642 | #ifdef CONFIG_BLOCK |
| 648 | 643 | static inline int device_is_not_partition(struct device *dev) |
| 649 | 644 | { |
| @@ -344,7 +344,8 @@ config BT_WILINK · 343 unmodified lines | ||
| 344 | 344 | |
| 345 | 345 | config BT_QCOMSMD |
| 346 | 346 | tristate "Qualcomm SMD based HCI support" |
| 347 | − depends on (QCOM_SMD && QCOM_WCNSS_CTRL) || COMPILE_TEST | |
| 347 | + depends on QCOM_SMD || (COMPILE_TEST && QCOM_SMD=n) | |
| 348 | + depends on QCOM_WCNSS_CTRL || (COMPILE_TEST && QCOM_WCNSS_CTRL=n) | |
| 348 | 349 | select BT_QCA |
| 349 | 350 | help |
| 350 | 351 | Qualcomm SMD based HCI driver. |
| @@ -55,6 +55,7 @@ MODULE_DEVICE_TABLE(pci, pci_tbl); · 54 unmodified lines | ||
| 55 | 55 | struct amd768_priv { |
| 56 | 56 | void __iomem *iobase; |
| 57 | 57 | struct pci_dev *pcidev; |
| 58 | + u32 pmbase; | |
| 58 | 59 | }; |
| 59 | 60 | |
| 60 | 61 | static int amd_rng_read(struct hwrng *rng, void *buf, size_t max, bool wait) |
| @@ -148,33 +149,58 @@ found: · 87 unmodified lines | ||
| 148 | 149 | if (pmbase == 0) |
| 149 | 150 | return -EIO; |
| 150 | 151 | |
| 151 | − priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL); | |
| 152 | + priv = kzalloc(sizeof(*priv), GFP_KERNEL); | |
| 152 | 153 | if (!priv) |
| 153 | 154 | return -ENOMEM; |
| 154 | 155 | |
| 155 | − if (!devm_request_region(&pdev->dev, pmbase + PMBASE_OFFSET, | |
| 156 | − PMBASE_SIZE, DRV_NAME)) { | |
| 156 | + if (!request_region(pmbase + PMBASE_OFFSET, PMBASE_SIZE, DRV_NAME)) { | |
| 157 | 157 | dev_err(&pdev->dev, DRV_NAME " region 0x%x already in use!\n", |
| 158 | 158 | pmbase + 0xF0); |
| 159 | − return -EBUSY; | |
| 159 | + err = -EBUSY; | |
| 160 | + goto out; | |
| 160 | 161 | } |
| 161 | 162 | |
| 162 | − priv->iobase = devm_ioport_map(&pdev->dev, pmbase + PMBASE_OFFSET, | |
| 163 | − PMBASE_SIZE); | |
| 163 | + priv->iobase = ioport_map(pmbase + PMBASE_OFFSET, PMBASE_SIZE); | |
| 164 | 164 | if (!priv->iobase) { |
| 165 | 165 | pr_err(DRV_NAME "Cannot map ioport\n"); |
| 166 | − return -ENOMEM; | |
| 166 | + err = -EINVAL; | |
| 167 | + goto err_iomap; | |
| 167 | 168 | } |
| 168 | 169 | |
| 169 | 170 | amd_rng.priv = (unsigned long)priv; |
| 171 | + priv->pmbase = pmbase; | |
| 170 | 172 | priv->pcidev = pdev; |
| 171 | 173 | |
| 172 | 174 | pr_info(DRV_NAME " detected\n"); |
| 173 | − return devm_hwrng_register(&pdev->dev, &amd_rng); | |
| 175 | + err = hwrng_register(&amd_rng); | |
| 176 | + if (err) { | |
| 177 | + pr_err(DRV_NAME " registering failed (%d)\n", err); | |
| 178 | + goto err_hwrng; | |
| 179 | + } | |
| 180 | + return 0; | |
| 181 | + | |
| 182 | +err_hwrng: | |
| 183 | + ioport_unmap(priv->iobase); | |
| 184 | +err_iomap: | |
| 185 | + release_region(pmbase + PMBASE_OFFSET, PMBASE_SIZE); | |
| 186 | +out: | |
| 187 | + kfree(priv); | |
| 188 | + return err; | |
| 174 | 189 | } |
| 175 | 190 | |
| 176 | 191 | static void __exit mod_exit(void) |
| 177 | 192 | { |
| 193 | + struct amd768_priv *priv; | |
| 194 | + | |
| 195 | + priv = (struct amd768_priv *)amd_rng.priv; | |
| 196 | + | |
| 197 | + hwrng_unregister(&amd_rng); | |
| 198 | + | |
| 199 | + ioport_unmap(priv->iobase); | |
| 200 | + | |
| 201 | + release_region(priv->pmbase + PMBASE_OFFSET, PMBASE_SIZE); | |
| 202 | + | |
| 203 | + kfree(priv); | |
| 178 | 204 | } |
| 179 | 205 | |
| 180 | 206 | module_init(mod_init); |
| @@ -31,6 +31,9 @@ · 30 unmodified lines | ||
| 31 | 31 | #include <linux/module.h> |
| 32 | 32 | #include <linux/pci.h> |
| 33 | 33 | |
| 34 | + | |
| 35 | +#define PFX KBUILD_MODNAME ": " | |
| 36 | + | |
| 34 | 37 | #define GEODE_RNG_DATA_REG 0x50 |
| 35 | 38 | #define GEODE_RNG_STATUS_REG 0x54 |
| 36 | 39 | |
| @@ -82,6 +85,7 @@ static struct hwrng geode_rng = { · 45 unmodified lines | ||
| 82 | 85 | |
| 83 | 86 | static int __init mod_init(void) |
| 84 | 87 | { |
| 88 | + int err = -ENODEV; | |
| 85 | 89 | struct pci_dev *pdev = NULL; |
| 86 | 90 | const struct pci_device_id *ent; |
| 87 | 91 | void __iomem *mem; |
| @@ -89,27 +93,43 @@ static int __init mod_init(void) · 1 unmodified line | ||
| 89 | 93 | |
| 90 | 94 | for_each_pci_dev(pdev) { |
| 91 | 95 | ent = pci_match_id(pci_tbl, pdev); |
| 92 | − if (ent) { | |
| 93 | − rng_base = pci_resource_start(pdev, 0); | |
| 94 | − if (rng_base == 0) | |
| 95 | − return -ENODEV; | |
| 96 | − | |
| 97 | − mem = devm_ioremap(&pdev->dev, rng_base, 0x58); | |
| 98 | − if (!mem) | |
| 99 | − return -ENOMEM; | |
| 100 | − geode_rng.priv = (unsigned long)mem; | |
| 101 | − | |
| 102 | − pr_info("AMD Geode RNG detected\n"); | |
| 103 | − return devm_hwrng_register(&pdev->dev, &geode_rng); | |
| 104 | − } | |
| 96 | + if (ent) | |
| 97 | + goto found; | |
| 105 | 98 | } |
| 106 | − | |
| 107 | 99 | /* Device not found. */ |
| 108 | − return -ENODEV; | |
| 100 | + goto out; | |
| 101 | + | |
| 102 | +found: | |
| 103 | + rng_base = pci_resource_start(pdev, 0); | |
| 104 | + if (rng_base == 0) | |
| 105 | + goto out; | |
| 106 | + err = -ENOMEM; | |
| 107 | + mem = ioremap(rng_base, 0x58); | |
| 108 | + if (!mem) | |
| 109 | + goto out; | |
| 110 | + geode_rng.priv = (unsigned long)mem; | |
| 111 | + | |
| 112 | + pr_info("AMD Geode RNG detected\n"); | |
| 113 | + err = hwrng_register(&geode_rng); | |
| 114 | + if (err) { | |
| 115 | + pr_err(PFX "RNG registering failed (%d)\n", | |
| 116 | + err); | |
| 117 | + goto err_unmap; | |
| 118 | + } | |
| 119 | +out: | |
| 120 | + return err; | |
| 121 | + | |
| 122 | +err_unmap: | |
| 123 | + iounmap(mem); | |
| 124 | + goto out; | |
| 109 | 125 | } |
| 110 | 126 | |
| 111 | 127 | static void __exit mod_exit(void) |
| 112 | 128 | { |
| 129 | + void __iomem *mem = (void __iomem *)geode_rng.priv; | |
| 130 | + | |
| 131 | + hwrng_unregister(&geode_rng); | |
| 132 | + iounmap(mem); | |
| 113 | 133 | } |
| 114 | 134 | |
| 115 | 135 | module_init(mod_init); |
| @@ -397,9 +397,8 @@ static int of_get_omap_rng_device_details(struct omap_rng_dev *priv, · 396 unmodified lines | ||
| 397 | 397 | irq, err); |
| 398 | 398 | return err; |
| 399 | 399 | } |
| 400 | − omap_rng_write(priv, RNG_INTMASK_REG, RNG_SHUTDOWN_OFLO_MASK); | |
| 401 | 400 | |
| 402 | − priv->clk = of_clk_get(pdev->dev.of_node, 0); | |
| 401 | + priv->clk = devm_clk_get(&pdev->dev, NULL); | |
| 403 | 402 | if (IS_ERR(priv->clk) && PTR_ERR(priv->clk) == -EPROBE_DEFER) |
| 404 | 403 | return -EPROBE_DEFER; |
| 405 | 404 | if (!IS_ERR(priv->clk)) { |
| @@ -408,6 +407,19 @@ static int of_get_omap_rng_device_details(struct omap_rng_dev *priv, · 2 unmodified lines | ||
| 408 | 407 | dev_err(&pdev->dev, "unable to enable the clk, " |
| 409 | 408 | "err = %d\n", err); |
| 410 | 409 | } |
| 410 | + | |
| 411 | + /* | |
| 412 | + * On OMAP4, enabling the shutdown_oflo interrupt is | |
| 413 | + * done in the interrupt mask register. There is no | |
| 414 | + * such register on EIP76, and it's enabled by the | |
| 415 | + * same bit in the control register | |
| 416 | + */ | |
| 417 | + if (priv->pdata->regs[RNG_INTMASK_REG]) | |
| 418 | + omap_rng_write(priv, RNG_INTMASK_REG, | |
| 419 | + RNG_SHUTDOWN_OFLO_MASK); | |
| 420 | + else | |
| 421 | + omap_rng_write(priv, RNG_CONTROL_REG, | |
| 422 | + RNG_SHUTDOWN_OFLO_MASK); | |
| 411 | 423 | } |
| 412 | 424 | return 0; |
| 413 | 425 | } |
| @@ -84,11 +84,14 @@ struct pp_struct { · 83 unmodified lines | ||
| 84 | 84 | struct ieee1284_info state; |
| 85 | 85 | struct ieee1284_info saved_state; |
| 86 | 86 | long default_inactivity; |
| 87 | + int index; | |
| 87 | 88 | }; |
| 88 | 89 | |
| 89 | 90 | /* should we use PARDEVICE_MAX here? */ |
| 90 | 91 | static struct device *devices[PARPORT_MAX]; |
| 91 | 92 | |
| 93 | +static DEFINE_IDA(ida_index); | |
| 94 | + | |
| 92 | 95 | /* pp_struct.flags bitfields */ |
| 93 | 96 | #define PP_CLAIMED (1<<0) |
| 94 | 97 | #define PP_EXCL (1<<1) |
| @@ -290,7 +293,7 @@ static int register_device(int minor, struct pp_struct *pp) · 195 unmodified lines | ||
| 290 | 293 | struct pardevice *pdev = NULL; |
| 291 | 294 | char *name; |
| 292 | 295 | struct pardev_cb ppdev_cb; |
| 293 | − int rc = 0; | |
| 296 | + int rc = 0, index; | |
| 294 | 297 | |
| 295 | 298 | name = kasprintf(GFP_KERNEL, CHRDEV "%x", minor); |
| 296 | 299 | if (name == NULL) |
| @@ -303,20 +306,23 @@ static int register_device(int minor, struct pp_struct *pp) · 6 unmodified lines | ||
| 303 | 306 | goto err; |
| 304 | 307 | } |
| 305 | 308 | |
| 309 | + index = ida_simple_get(&ida_index, 0, 0, GFP_KERNEL); | |
| 306 | 310 | memset(&ppdev_cb, 0, sizeof(ppdev_cb)); |
| 307 | 311 | ppdev_cb.irq_func = pp_irq; |
| 308 | 312 | ppdev_cb.flags = (pp->flags & PP_EXCL) ? PARPORT_FLAG_EXCL : 0; |
| 309 | 313 | ppdev_cb.private = pp; |
| 310 | − pdev = parport_register_dev_model(port, name, &ppdev_cb, minor); | |
| 314 | + pdev = parport_register_dev_model(port, name, &ppdev_cb, index); | |
| 311 | 315 | parport_put_port(port); |
| 312 | 316 | |
| 313 | 317 | if (!pdev) { |
| 314 | 318 | pr_warn("%s: failed to register device!\n", name); |
| 315 | 319 | rc = -ENXIO; |
| 320 | + ida_simple_remove(&ida_index, index); | |
| 316 | 321 | goto err; |
| 317 | 322 | } |
| 318 | 323 | |
| 319 | 324 | pp->pdev = pdev; |
| 325 | + pp->index = index; | |
| 320 | 326 | dev_dbg(&pdev->dev, "registered pardevice\n"); |
| 321 | 327 | err: |
| 322 | 328 | kfree(name); |
| @@ -755,6 +761,7 @@ static int pp_release(struct inode *inode, struct file *file) · 432 unmodified lines | ||
| 755 | 761 | |
| 756 | 762 | if (pp->pdev) { |
| 757 | 763 | parport_unregister_device(pp->pdev); |
| 764 | + ida_simple_remove(&ida_index, pp->index); | |
| 758 | 765 | pp->pdev = NULL; |
| 759 | 766 | pr_debug(CHRDEV "%x: unregistered pardevice\n", minor); |
| 760 | 767 | } |
| @@ -2502,7 +2502,7 @@ struct clk *__clk_create_clk(struct clk_hw *hw, const char *dev_id, · 2501 unmodified lines | ||
| 2502 | 2502 | |
| 2503 | 2503 | clk->core = hw->core; |
| 2504 | 2504 | clk->dev_id = dev_id; |
| 2505 | − clk->con_id = con_id; | |
| 2505 | + clk->con_id = kstrdup_const(con_id, GFP_KERNEL); | |
| 2506 | 2506 | clk->max_rate = ULONG_MAX; |
| 2507 | 2507 | |
| 2508 | 2508 | clk_prepare_lock(); |
| @@ -2518,6 +2518,7 @@ void __clk_free_clk(struct clk *clk) · 9 unmodified lines | ||
| 2518 | 2518 | hlist_del(&clk->clks_node); |
| 2519 | 2519 | clk_prepare_unlock(); |
| 2520 | 2520 | |
| 2521 | + kfree_const(clk->con_id); | |
| 2521 | 2522 | kfree(clk); |
| 2522 | 2523 | } |
| 2523 | 2524 | |
| @@ -127,7 +127,7 @@ PNAME(mux_ddrphy_p) = { "dpll_ddr", "gpll_ddr" }; · 126 unmodified lines | ||
| 127 | 127 | PNAME(mux_pll_src_3plls_p) = { "apll", "dpll", "gpll" }; |
| 128 | 128 | PNAME(mux_timer_p) = { "xin24m", "pclk_peri_src" }; |
| 129 | 129 | |
| 130 | −PNAME(mux_pll_src_apll_dpll_gpll_usb480m_p) = { "apll", "dpll", "gpll" "usb480m" }; | |
| 130 | +PNAME(mux_pll_src_apll_dpll_gpll_usb480m_p) = { "apll", "dpll", "gpll", "usb480m" }; | |
| 131 | 131 | |
| 132 | 132 | PNAME(mux_mmc_src_p) = { "apll", "dpll", "gpll", "xin24m" }; |
| 133 | 133 | PNAME(mux_i2s_pre_p) = { "i2s_src", "i2s_frac", "ext_i2s", "xin12m" }; |
| @@ -450,6 +450,13 @@ static void __init rk3036_clk_init(struct device_node *np) · 316 unmodified lines | ||
| 450 | 450 | return; |
| 451 | 451 | } |
| 452 | 452 | |
| 453 | + /* | |
| 454 | + * Make uart_pll_clk a child of the gpll, as all other sources are | |
| 455 | + * not that usable / stable. | |
| 456 | + */ | |
| 457 | + writel_relaxed(HIWORD_UPDATE(0x2, 0x3, 10), | |
| 458 | + reg_base + RK2928_CLKSEL_CON(13)); | |
| 459 | + | |
| 453 | 460 | ctx = rockchip_clk_init(np, reg_base, CLK_NR_CLKS); |
| 454 | 461 | if (IS_ERR(ctx)) { |
| 455 | 462 | pr_err("%s: rockchip clk init failed\n", __func__); |
| @@ -80,6 +80,7 @@ config SUN6I_A31_CCU · 79 unmodified lines | ||
| 80 | 80 | select SUNXI_CCU_DIV |
| 81 | 81 | select SUNXI_CCU_NK |
| 82 | 82 | select SUNXI_CCU_NKM |
| 83 | + select SUNXI_CCU_NKMP | |
| 83 | 84 | select SUNXI_CCU_NM |
| 84 | 85 | select SUNXI_CCU_MP |
| 85 | 86 | select SUNXI_CCU_PHASE |
| @@ -566,7 +566,7 @@ static SUNXI_CCU_M_WITH_GATE(gpu_clk, "gpu", "pll-gpu", · 565 unmodified lines | ||
| 566 | 566 | 0x1a0, 0, 3, BIT(31), CLK_SET_RATE_PARENT); |
| 567 | 567 | |
| 568 | 568 | /* Fixed Factor clocks */ |
| 569 | −static CLK_FIXED_FACTOR(osc12M_clk, "osc12M", "osc24M", 1, 2, 0); | |
| 569 | +static CLK_FIXED_FACTOR(osc12M_clk, "osc12M", "osc24M", 2, 1, 0); | |
| 570 | 570 | |
| 571 | 571 | /* We hardcode the divider to 4 for now */ |
| 572 | 572 | static CLK_FIXED_FACTOR(pll_audio_clk, "pll-audio", |
| @@ -608,7 +608,7 @@ static SUNXI_CCU_M_WITH_MUX_GATE(hdmi_clk, "hdmi", lcd_ch1_parents, · 607 unmodified lines | ||
| 608 | 608 | 0x150, 0, 4, 24, 2, BIT(31), |
| 609 | 609 | CLK_SET_RATE_PARENT); |
| 610 | 610 | |
| 611 | −static SUNXI_CCU_GATE(hdmi_ddc_clk, "hdmi-ddc", "osc24M", 0x150, BIT(31), 0); | |
| 611 | +static SUNXI_CCU_GATE(hdmi_ddc_clk, "hdmi-ddc", "osc24M", 0x150, BIT(30), 0); | |
| 612 | 612 | |
| 613 | 613 | static SUNXI_CCU_GATE(ps_clk, "ps", "lcd1-ch1", 0x140, BIT(31), 0); |
| 614 | 614 | |
| @@ -85,6 +85,10 @@ static unsigned long ccu_mp_recalc_rate(struct clk_hw *hw, · 84 unmodified lines | ||
| 85 | 85 | unsigned int m, p; |
| 86 | 86 | u32 reg; |
| 87 | 87 | |
| 88 | + /* Adjust parent_rate according to pre-dividers */ | |
| 89 | + ccu_mux_helper_adjust_parent_for_prediv(&cmp->common, &cmp->mux, | |
| 90 | + -1, &parent_rate); | |
| 91 | + | |
| 88 | 92 | reg = readl(cmp->common.base + cmp->common.reg); |
| 89 | 93 | |
| 90 | 94 | m = reg >> cmp->m.shift; |
| @@ -117,6 +121,10 @@ static int ccu_mp_set_rate(struct clk_hw *hw, unsigned long rate, · 26 unmodified lines | ||
| 117 | 121 | unsigned int m, p; |
| 118 | 122 | u32 reg; |
| 119 | 123 | |
| 124 | + /* Adjust parent_rate according to pre-dividers */ | |
| 125 | + ccu_mux_helper_adjust_parent_for_prediv(&cmp->common, &cmp->mux, | |
| 126 | + -1, &parent_rate); | |
| 127 | + | |
| 120 | 128 | max_m = cmp->m.max ?: 1 << cmp->m.width; |
| 121 | 129 | max_p = cmp->p.max ?: 1 << ((1 << cmp->p.width) - 1); |
| 122 | 130 | |
| @@ -107,7 +107,7 @@ static unsigned long ccu_nkmp_recalc_rate(struct clk_hw *hw, · 106 unmodified lines | ||
| 107 | 107 | p = reg >> nkmp->p.shift; |
| 108 | 108 | p &= (1 << nkmp->p.width) - 1; |
| 109 | 109 | |
| 110 | − return parent_rate * n * k >> p / m; | |
| 110 | + return (parent_rate * n * k >> p) / m; | |
| 111 | 111 | } |
| 112 | 112 | |
| 113 | 113 | static long ccu_nkmp_round_rate(struct clk_hw *hw, unsigned long rate, |
| @@ -10,7 +10,6 @@ · 9 unmodified lines | ||
| 10 | 10 | #include <linux/io.h> |
| 11 | 11 | #include <linux/platform_device.h> |
| 12 | 12 | #include <linux/atmel_tc.h> |
| 13 | −#include <linux/sched_clock.h> | |
| 14 | 13 | |
| 15 | 14 | |
| 16 | 15 | /* |
| @@ -57,14 +56,9 @@ static u64 tc_get_cycles(struct clocksource *cs) · 40 unmodified lines | ||
| 57 | 56 | return (upper << 16) | lower; |
| 58 | 57 | } |
| 59 | 58 | |
| 60 | −static u32 tc_get_cv32(void) | |
| 61 | −{ | |
| 62 | − return __raw_readl(tcaddr + ATMEL_TC_REG(0, CV)); | |
| 63 | −} | |
| 64 | − | |
| 65 | 59 | static u64 tc_get_cycles32(struct clocksource *cs) |
| 66 | 60 | { |
| 67 | − return tc_get_cv32(); | |
| 61 | + return __raw_readl(tcaddr + ATMEL_TC_REG(0, CV)); | |
| 68 | 62 | } |
| 69 | 63 | |
| 70 | 64 | static struct clocksource clksrc = { |
| @@ -75,11 +69,6 @@ static struct clocksource clksrc = { · 4 unmodified lines | ||
| 75 | 69 | .flags = CLOCK_SOURCE_IS_CONTINUOUS, |
| 76 | 70 | }; |
| 77 | 71 | |
| 78 | −static u64 notrace tc_read_sched_clock(void) | |
| 79 | −{ | |
| 80 | − return tc_get_cv32(); | |
| 81 | −} | |
| 82 | − | |
| 83 | 72 | #ifdef CONFIG_GENERIC_CLOCKEVENTS |
| 84 | 73 | |
| 85 | 74 | struct tc_clkevt_device { |
| @@ -350,9 +339,6 @@ static int __init tcb_clksrc_init(void) · 264 unmodified lines | ||
| 350 | 339 | clksrc.read = tc_get_cycles32; |
| 351 | 340 | /* setup ony channel 0 */ |
| 352 | 341 | tcb_setup_single_chan(tc, best_divisor_idx); |
| 353 | − | |
| 354 | − /* register sched_clock on chips with single 32 bit counter */ | |
| 355 | − sched_clock_register(tc_read_sched_clock, 32, divided_rate); | |
| 356 | 342 | } else { |
| 357 | 343 | /* tclib will give us three clocks no matter what the |
| 358 | 344 | * underlying platform supports. |
| @@ -680,9 +680,11 @@ static ssize_t show_cpuinfo_cur_freq(struct cpufreq_policy *policy, · 679 unmodified lines | ||
| 680 | 680 | char *buf) |
| 681 | 681 | { |
| 682 | 682 | unsigned int cur_freq = __cpufreq_get(policy); |
| 683 | − if (!cur_freq) | |
| 684 | − return sprintf(buf, "<unknown>"); | |
| 685 | − return sprintf(buf, "%u\n", cur_freq); | |
| 683 | + | |
| 684 | + if (cur_freq) | |
| 685 | + return sprintf(buf, "%u\n", cur_freq); | |
| 686 | + | |
| 687 | + return sprintf(buf, "<unknown>\n"); | |
| 686 | 688 | } |
| 687 | 689 | |
| 688 | 690 | /** |
| @@ -1182,6 +1184,9 @@ static int cpufreq_online(unsigned int cpu) · 493 unmodified lines | ||
| 1182 | 1184 | for_each_cpu(j, policy->related_cpus) |
| 1183 | 1185 | per_cpu(cpufreq_cpu_data, j) = policy; |
| 1184 | 1186 | write_unlock_irqrestore(&cpufreq_driver_lock, flags); |
| 1187 | + } else { | |
| 1188 | + policy->min = policy->user_policy.min; | |
| 1189 | + policy->max = policy->user_policy.max; | |
| 1185 | 1190 | } |
| 1186 | 1191 | |
| 1187 | 1192 | if (cpufreq_driver->get && !cpufreq_driver->setpolicy) { |
| @@ -84,6 +84,11 @@ static inline u64 div_ext_fp(u64 x, u64 y) · 83 unmodified lines | ||
| 84 | 84 | return div64_u64(x << EXT_FRAC_BITS, y); |
| 85 | 85 | } |
| 86 | 86 | |
| 87 | +static inline int32_t percent_ext_fp(int percent) | |
| 88 | +{ | |
| 89 | + return div_ext_fp(percent, 100); | |
| 90 | +} | |
| 91 | + | |
| 87 | 92 | /** |
| 88 | 93 | * struct sample - Store performance sample |
| 89 | 94 | * @core_avg_perf: Ratio of APERF/MPERF which is the actual average |
| @@ -359,9 +364,7 @@ static bool driver_registered __read_mostly; · 269 unmodified lines | ||
| 359 | 364 | static bool acpi_ppc; |
| 360 | 365 | #endif |
| 361 | 366 | |
| 362 | −static struct perf_limits performance_limits; | |
| 363 | −static struct perf_limits powersave_limits; | |
| 364 | −static struct perf_limits *limits; | |
| 367 | +static struct perf_limits global; | |
| 365 | 368 | |
| 366 | 369 | static void intel_pstate_init_limits(struct perf_limits *limits) |
| 367 | 370 | { |
| @@ -372,14 +375,6 @@ static void intel_pstate_init_limits(struct perf_limits *limits) · 4 unmodified lines | ||
| 372 | 375 | limits->max_sysfs_pct = 100; |
| 373 | 376 | } |
| 374 | 377 | |
| 375 | −static void intel_pstate_set_performance_limits(struct perf_limits *limits) | |
| 376 | −{ | |
| 377 | − intel_pstate_init_limits(limits); | |
| 378 | − limits->min_perf_pct = 100; | |
| 379 | − limits->min_perf = int_ext_tofp(1); | |
| 380 | − limits->min_sysfs_pct = 100; | |
| 381 | −} | |
| 382 | − | |
| 383 | 378 | static DEFINE_MUTEX(intel_pstate_driver_lock); |
| 384 | 379 | static DEFINE_MUTEX(intel_pstate_limits_lock); |
| 385 | 380 | |
| @@ -502,7 +497,7 @@ static void intel_pstate_init_acpi_perf_limits(struct cpufreq_policy *policy) · 116 unmodified lines | ||
| 502 | 497 | * correct max turbo frequency based on the turbo state. |
| 503 | 498 | * Also need to convert to MHz as _PSS freq is in MHz. |
| 504 | 499 | */ |
| 505 | − if (!limits->turbo_disabled) | |
| 500 | + if (!global.turbo_disabled) | |
| 506 | 501 | cpu->acpi_perf_data.states[0].core_frequency = |
| 507 | 502 | policy->cpuinfo.max_freq / 1000; |
| 508 | 503 | cpu->valid_pss_table = true; |
| @@ -621,7 +616,7 @@ static inline void update_turbo_state(void) · 112 unmodified lines | ||
| 621 | 616 | |
| 622 | 617 | cpu = all_cpu_data[0]; |
| 623 | 618 | rdmsrl(MSR_IA32_MISC_ENABLE, misc_en); |
| 624 | − limits->turbo_disabled = | |
| 619 | + global.turbo_disabled = | |
| 625 | 620 | (misc_en & MSR_IA32_MISC_ENABLE_TURBO_DISABLE || |
| 626 | 621 | cpu->pstate.max_pstate == cpu->pstate.turbo_pstate); |
| 627 | 622 | } |
| @@ -845,12 +840,11 @@ static struct freq_attr *hwp_cpufreq_attrs[] = { · 217 unmodified lines | ||
| 845 | 840 | |
| 846 | 841 | static void intel_pstate_hwp_set(struct cpufreq_policy *policy) |
| 847 | 842 | { |
| 848 | − int min, hw_min, max, hw_max, cpu, range, adj_range; | |
| 849 | − struct perf_limits *perf_limits = limits; | |
| 843 | + int min, hw_min, max, hw_max, cpu; | |
| 844 | + struct perf_limits *perf_limits = &global; | |
| 850 | 845 | u64 value, cap; |
| 851 | 846 | |
| 852 | 847 | for_each_cpu(cpu, policy->cpus) { |
| 853 | − int max_perf_pct, min_perf_pct; | |
| 854 | 848 | struct cpudata *cpu_data = all_cpu_data[cpu]; |
| 855 | 849 | s16 epp; |
| 856 | 850 | |
| @@ -859,24 +853,22 @@ static void intel_pstate_hwp_set(struct cpufreq_policy *policy) · 2 unmodified lines | ||
| 859 | 853 | |
| 860 | 854 | rdmsrl_on_cpu(cpu, MSR_HWP_CAPABILITIES, &cap); |
| 861 | 855 | hw_min = HWP_LOWEST_PERF(cap); |
| 862 | − if (limits->no_turbo) | |
| 856 | + if (global.no_turbo) | |
| 863 | 857 | hw_max = HWP_GUARANTEED_PERF(cap); |
| 864 | 858 | else |
| 865 | 859 | hw_max = HWP_HIGHEST_PERF(cap); |
| 866 | − range = hw_max - hw_min; | |
| 867 | 860 | |
| 868 | − max_perf_pct = perf_limits->max_perf_pct; | |
| 869 | − min_perf_pct = perf_limits->min_perf_pct; | |
| 861 | + max = fp_ext_toint(hw_max * perf_limits->max_perf); | |
| 862 | + if (cpu_data->policy == CPUFREQ_POLICY_PERFORMANCE) | |
| 863 | + min = max; | |
| 864 | + else | |
| 865 | + min = fp_ext_toint(hw_max * perf_limits->min_perf); | |
| 870 | 866 | |
| 871 | 867 | rdmsrl_on_cpu(cpu, MSR_HWP_REQUEST, &value); |
| 872 | − adj_range = min_perf_pct * range / 100; | |
| 873 | − min = hw_min + adj_range; | |
| 868 | + | |
| 874 | 869 | value &= ~HWP_MIN_PERF(~0L); |
| 875 | 870 | value |= HWP_MIN_PERF(min); |
| 876 | 871 | |
| 877 | − adj_range = max_perf_pct * range / 100; | |
| 878 | − max = hw_min + adj_range; | |
| 879 | − | |
| 880 | 872 | value &= ~HWP_MAX_PERF(~0L); |
| 881 | 873 | value |= HWP_MAX_PERF(max); |
| 882 | 874 | |
| @@ -969,26 +961,18 @@ static int intel_pstate_resume(struct cpufreq_policy *policy) · 86 unmodified lines | ||
| 969 | 961 | } |
| 970 | 962 | |
| 971 | 963 | static void intel_pstate_update_policies(void) |
| 972 | − __releases(&intel_pstate_limits_lock) | |
| 973 | − __acquires(&intel_pstate_limits_lock) | |
| 974 | 964 | { |
| 975 | − struct perf_limits *saved_limits = limits; | |
| 976 | 965 | int cpu; |
| 977 | 966 | |
| 978 | − mutex_unlock(&intel_pstate_limits_lock); | |
| 979 | − | |
| 980 | 967 | for_each_possible_cpu(cpu) |
| 981 | 968 | cpufreq_update_policy(cpu); |
| 982 | − | |
| 983 | − mutex_lock(&intel_pstate_limits_lock); | |
| 984 | − | |
| 985 | − limits = saved_limits; | |
| 986 | 969 | } |
| 987 | 970 | |
| 988 | 971 | /************************** debugfs begin ************************/ |
| 989 | 972 | static int pid_param_set(void *data, u64 val) |
| 990 | 973 | { |
| 991 | 974 | *(u32 *)data = val; |
| 975 | + pid_params.sample_rate_ns = pid_params.sample_rate_ms * NSEC_PER_MSEC; | |
| 992 | 976 | intel_pstate_reset_all_pid(); |
| 993 | 977 | return 0; |
| 994 | 978 | } |
| @@ -1060,7 +1044,7 @@ static void intel_pstate_debug_hide_params(void) · 65 unmodified lines | ||
| 1060 | 1044 | static ssize_t show_##file_name \ |
| 1061 | 1045 | (struct kobject *kobj, struct attribute *attr, char *buf) \ |
| 1062 | 1046 | { \ |
| 1063 | − return sprintf(buf, "%u\n", limits->object); \ | |
| 1047 | + return sprintf(buf, "%u\n", global.object); \ | |
| 1064 | 1048 | } |
| 1065 | 1049 | |
| 1066 | 1050 | static ssize_t intel_pstate_show_status(char *buf); |
| @@ -1151,10 +1135,10 @@ static ssize_t show_no_turbo(struct kobject *kobj, · 84 unmodified lines | ||
| 1151 | 1135 | } |
| 1152 | 1136 | |
| 1153 | 1137 | update_turbo_state(); |
| 1154 | − if (limits->turbo_disabled) | |
| 1155 | − ret = sprintf(buf, "%u\n", limits->turbo_disabled); | |
| 1138 | + if (global.turbo_disabled) | |
| 1139 | + ret = sprintf(buf, "%u\n", global.turbo_disabled); | |
| 1156 | 1140 | else |
| 1157 | − ret = sprintf(buf, "%u\n", limits->no_turbo); | |
| 1141 | + ret = sprintf(buf, "%u\n", global.no_turbo); | |
| 1158 | 1142 | |
| 1159 | 1143 | mutex_unlock(&intel_pstate_driver_lock); |
| 1160 | 1144 | |
| @@ -1181,19 +1165,19 @@ static ssize_t store_no_turbo(struct kobject *a, struct attribute *b, · 20 unmodified lines | ||
| 1181 | 1165 | mutex_lock(&intel_pstate_limits_lock); |
| 1182 | 1166 | |
| 1183 | 1167 | update_turbo_state(); |
| 1184 | − if (limits->turbo_disabled) { | |
| 1168 | + if (global.turbo_disabled) { | |
| 1185 | 1169 | pr_warn("Turbo disabled by BIOS or unavailable on processor\n"); |
| 1186 | 1170 | mutex_unlock(&intel_pstate_limits_lock); |
| 1187 | 1171 | mutex_unlock(&intel_pstate_driver_lock); |
| 1188 | 1172 | return -EPERM; |
| 1189 | 1173 | } |
| 1190 | 1174 | |
| 1191 | − limits->no_turbo = clamp_t(int, input, 0, 1); | |
| 1192 | − | |
| 1193 | − intel_pstate_update_policies(); | |
| 1175 | + global.no_turbo = clamp_t(int, input, 0, 1); | |
| 1194 | 1176 | |
| 1195 | 1177 | mutex_unlock(&intel_pstate_limits_lock); |
| 1196 | 1178 | |
| 1179 | + intel_pstate_update_policies(); | |
| 1180 | + | |
| 1197 | 1181 | mutex_unlock(&intel_pstate_driver_lock); |
| 1198 | 1182 | |
| 1199 | 1183 | return count; |
| @@ -1218,19 +1202,16 @@ static ssize_t store_max_perf_pct(struct kobject *a, struct attribute *b, · 18 unmodified lines | ||
| 1218 | 1202 | |
| 1219 | 1203 | mutex_lock(&intel_pstate_limits_lock); |
| 1220 | 1204 | |
| 1221 | − limits->max_sysfs_pct = clamp_t(int, input, 0 , 100); | |
| 1222 | − limits->max_perf_pct = min(limits->max_policy_pct, | |
| 1223 | − limits->max_sysfs_pct); | |
| 1224 | − limits->max_perf_pct = max(limits->min_policy_pct, | |
| 1225 | − limits->max_perf_pct); | |
| 1226 | − limits->max_perf_pct = max(limits->min_perf_pct, | |
| 1227 | − limits->max_perf_pct); | |
| 1228 | − limits->max_perf = div_ext_fp(limits->max_perf_pct, 100); | |
| 1229 | − | |
| 1230 | − intel_pstate_update_policies(); | |
| 1205 | + global.max_sysfs_pct = clamp_t(int, input, 0 , 100); | |
| 1206 | + global.max_perf_pct = min(global.max_policy_pct, global.max_sysfs_pct); | |
| 1207 | + global.max_perf_pct = max(global.min_policy_pct, global.max_perf_pct); | |
| 1208 | + global.max_perf_pct = max(global.min_perf_pct, global.max_perf_pct); | |
| 1209 | + global.max_perf = percent_ext_fp(global.max_perf_pct); | |
| 1231 | 1210 | |
| 1232 | 1211 | mutex_unlock(&intel_pstate_limits_lock); |
| 1233 | 1212 | |
| 1213 | + intel_pstate_update_policies(); | |
| 1214 | + | |
| 1234 | 1215 | mutex_unlock(&intel_pstate_driver_lock); |
| 1235 | 1216 | |
| 1236 | 1217 | return count; |
| @@ -1255,19 +1236,16 @@ static ssize_t store_min_perf_pct(struct kobject *a, struct attribute *b, · 18 unmodified lines | ||
| 1255 | 1236 | |
| 1256 | 1237 | mutex_lock(&intel_pstate_limits_lock); |
| 1257 | 1238 | |
| 1258 | − limits->min_sysfs_pct = clamp_t(int, input, 0 , 100); | |
| 1259 | − limits->min_perf_pct = max(limits->min_policy_pct, | |
| 1260 | − limits->min_sysfs_pct); | |
| 1261 | − limits->min_perf_pct = min(limits->max_policy_pct, | |
| 1262 | − limits->min_perf_pct); | |
| 1263 | − limits->min_perf_pct = min(limits->max_perf_pct, | |
| 1264 | − limits->min_perf_pct); | |
| 1265 | − limits->min_perf = div_ext_fp(limits->min_perf_pct, 100); | |
| 1266 | − | |
| 1267 | − intel_pstate_update_policies(); | |
| 1239 | + global.min_sysfs_pct = clamp_t(int, input, 0 , 100); | |
| 1240 | + global.min_perf_pct = max(global.min_policy_pct, global.min_sysfs_pct); | |
| 1241 | + global.min_perf_pct = min(global.max_policy_pct, global.min_perf_pct); | |
| 1242 | + global.min_perf_pct = min(global.max_perf_pct, global.min_perf_pct); | |
| 1243 | + global.min_perf = percent_ext_fp(global.min_perf_pct); | |
| 1268 | 1244 | |
| 1269 | 1245 | mutex_unlock(&intel_pstate_limits_lock); |
| 1270 | 1246 | |
| 1247 | + intel_pstate_update_policies(); | |
| 1248 | + | |
| 1271 | 1249 | mutex_unlock(&intel_pstate_driver_lock); |
| 1272 | 1250 | |
| 1273 | 1251 | return count; |
| @@ -1387,7 +1365,7 @@ static u64 atom_get_val(struct cpudata *cpudata, int pstate) · 113 unmodified lines | ||
| 1387 | 1365 | u32 vid; |
| 1388 | 1366 | |
| 1389 | 1367 | val = (u64)pstate << 8; |
| 1390 | − if (limits->no_turbo && !limits->turbo_disabled) | |
| 1368 | + if (global.no_turbo && !global.turbo_disabled) | |
| 1391 | 1369 | val |= (u64)1 << 32; |
| 1392 | 1370 | |
| 1393 | 1371 | vid_fp = cpudata->vid.min + mul_fp( |
| @@ -1557,7 +1535,7 @@ static u64 core_get_val(struct cpudata *cpudata, int pstate) · 163 unmodified lines | ||
| 1557 | 1535 | u64 val; |
| 1558 | 1536 | |
| 1559 | 1537 | val = (u64)pstate << 8; |
| 1560 | − if (limits->no_turbo && !limits->turbo_disabled) | |
| 1538 | + if (global.no_turbo && !global.turbo_disabled) | |
| 1561 | 1539 | val |= (u64)1 << 32; |
| 1562 | 1540 | |
| 1563 | 1541 | return val; |
| @@ -1683,9 +1661,9 @@ static void intel_pstate_get_min_max(struct cpudata *cpu, int *min, int *max) · 119 unmodified lines | ||
| 1683 | 1661 | int max_perf = cpu->pstate.turbo_pstate; |
| 1684 | 1662 | int max_perf_adj; |
| 1685 | 1663 | int min_perf; |
| 1686 | − struct perf_limits *perf_limits = limits; | |
| 1664 | + struct perf_limits *perf_limits = &global; | |
| 1687 | 1665 | |
| 1688 | − if (limits->no_turbo || limits->turbo_disabled) | |
| 1666 | + if (global.no_turbo || global.turbo_disabled) | |
| 1689 | 1667 | max_perf = cpu->pstate.max_pstate; |
| 1690 | 1668 | |
| 1691 | 1669 | if (per_cpu_limits) |
| @@ -1820,7 +1798,7 @@ static inline int32_t get_target_pstate_use_cpu_load(struct cpudata *cpu) · 128 unmodified lines | ||
| 1820 | 1798 | |
| 1821 | 1799 | sample->busy_scaled = busy_frac * 100; |
| 1822 | 1800 | |
| 1823 | − target = limits->no_turbo || limits->turbo_disabled ? | |
| 1801 | + target = global.no_turbo || global.turbo_disabled ? | |
| 1824 | 1802 | cpu->pstate.max_pstate : cpu->pstate.turbo_pstate; |
| 1825 | 1803 | target += target >> 2; |
| 1826 | 1804 | target = mul_fp(target, busy_frac); |
| @@ -2080,36 +2058,34 @@ static void intel_pstate_clear_update_util_hook(unsigned int cpu) · 253 unmodified lines | ||
| 2080 | 2058 | static void intel_pstate_update_perf_limits(struct cpufreq_policy *policy, |
| 2081 | 2059 | struct perf_limits *limits) |
| 2082 | 2060 | { |
| 2061 | + int32_t max_policy_perf, min_policy_perf; | |
| 2083 | 2062 | |
| 2084 | − limits->max_policy_pct = DIV_ROUND_UP(policy->max * 100, | |
| 2085 | − policy->cpuinfo.max_freq); | |
| 2086 | − limits->max_policy_pct = clamp_t(int, limits->max_policy_pct, 0, 100); | |
| 2063 | + max_policy_perf = div_ext_fp(policy->max, policy->cpuinfo.max_freq); | |
| 2064 | + max_policy_perf = clamp_t(int32_t, max_policy_perf, 0, int_ext_tofp(1)); | |
| 2087 | 2065 | if (policy->max == policy->min) { |
| 2088 | − limits->min_policy_pct = limits->max_policy_pct; | |
| 2066 | + min_policy_perf = max_policy_perf; | |
| 2089 | 2067 | } else { |
| 2090 | − limits->min_policy_pct = DIV_ROUND_UP(policy->min * 100, | |
| 2091 | − policy->cpuinfo.max_freq); | |
| 2092 | − limits->min_policy_pct = clamp_t(int, limits->min_policy_pct, | |
| 2093 | − 0, 100); | |
| 2068 | + min_policy_perf = div_ext_fp(policy->min, | |
| 2069 | + policy->cpuinfo.max_freq); | |
| 2070 | + min_policy_perf = clamp_t(int32_t, min_policy_perf, | |
| 2071 | + 0, max_policy_perf); | |
| 2094 | 2072 | } |
| 2095 | 2073 | |
| 2096 | − /* Normalize user input to [min_policy_pct, max_policy_pct] */ | |
| 2097 | − limits->min_perf_pct = max(limits->min_policy_pct, | |
| 2098 | − limits->min_sysfs_pct); | |
| 2099 | − limits->min_perf_pct = min(limits->max_policy_pct, | |
| 2100 | − limits->min_perf_pct); | |
| 2101 | − limits->max_perf_pct = min(limits->max_policy_pct, | |
| 2102 | − limits->max_sysfs_pct); | |
| 2103 | − limits->max_perf_pct = max(limits->min_policy_pct, | |
| 2104 | − limits->max_perf_pct); | |
| 2105 | − | |
| 2106 | − /* Make sure min_perf_pct <= max_perf_pct */ | |
| 2107 | − limits->min_perf_pct = min(limits->max_perf_pct, limits->min_perf_pct); | |
| 2108 | − | |
| 2109 | − limits->min_perf = div_ext_fp(limits->min_perf_pct, 100); | |
| 2110 | − limits->max_perf = div_ext_fp(limits->max_perf_pct, 100); | |
| 2074 | + /* Normalize user input to [min_perf, max_perf] */ | |
| 2075 | + limits->min_perf = max(min_policy_perf, | |
| 2076 | + percent_ext_fp(limits->min_sysfs_pct)); | |
| 2077 | + limits->min_perf = min(limits->min_perf, max_policy_perf); | |
| 2078 | + limits->max_perf = min(max_policy_perf, | |
| 2079 | + percent_ext_fp(limits->max_sysfs_pct)); | |
| 2080 | + limits->max_perf = max(min_policy_perf, limits->max_perf); | |
| 2081 | + | |
| 2082 | + /* Make sure min_perf <= max_perf */ | |
| 2083 | + limits->min_perf = min(limits->min_perf, limits->max_perf); | |
| 2084 | + | |
| 2111 | 2085 | limits->max_perf = round_up(limits->max_perf, EXT_FRAC_BITS); |
| 2112 | 2086 | limits->min_perf = round_up(limits->min_perf, EXT_FRAC_BITS); |
| 2087 | + limits->max_perf_pct = fp_ext_toint(limits->max_perf * 100); | |
| 2088 | + limits->min_perf_pct = fp_ext_toint(limits->min_perf * 100); | |
| 2113 | 2089 | |
| 2114 | 2090 | pr_debug("cpu:%d max_perf_pct:%d min_perf_pct:%d\n", policy->cpu, |
| 2115 | 2091 | limits->max_perf_pct, limits->min_perf_pct); |
| @@ -2118,7 +2094,7 @@ static void intel_pstate_update_perf_limits(struct cpufreq_policy *policy, · 2 unmodified lines | ||
| 2118 | 2094 | static int intel_pstate_set_policy(struct cpufreq_policy *policy) |
| 2119 | 2095 | { |
| 2120 | 2096 | struct cpudata *cpu; |
| 2121 | − struct perf_limits *perf_limits = NULL; | |
| 2097 | + struct perf_limits *perf_limits = &global; | |
| 2122 | 2098 | |
| 2123 | 2099 | if (!policy->cpuinfo.max_freq) |
| 2124 | 2100 | return -ENODEV; |
| @@ -2141,21 +2117,6 @@ static int intel_pstate_set_policy(struct cpufreq_policy *policy) · 16 unmodified lines | ||
| 2141 | 2117 | |
| 2142 | 2118 | mutex_lock(&intel_pstate_limits_lock); |
| 2143 | 2119 | |
| 2144 | − if (policy->policy == CPUFREQ_POLICY_PERFORMANCE) { | |
| 2145 | − pr_debug("set performance\n"); | |
| 2146 | − if (!perf_limits) { | |
| 2147 | − limits = &performance_limits; | |
| 2148 | − perf_limits = limits; | |
| 2149 | − } | |
| 2150 | − } else { | |
| 2151 | − pr_debug("set powersave\n"); | |
| 2152 | − if (!perf_limits) { | |
| 2153 | − limits = &powersave_limits; | |
| 2154 | − perf_limits = limits; | |
| 2155 | − } | |
| 2156 | − | |
| 2157 | − } | |
| 2158 | − | |
| 2159 | 2120 | intel_pstate_update_perf_limits(policy, perf_limits); |
| 2160 | 2121 | |
| 2161 | 2122 | if (cpu->policy == CPUFREQ_POLICY_PERFORMANCE) { |
| @@ -2179,16 +2140,9 @@ static int intel_pstate_set_policy(struct cpufreq_policy *policy) · 17 unmodified lines | ||
| 2179 | 2140 | static int intel_pstate_verify_policy(struct cpufreq_policy *policy) |
| 2180 | 2141 | { |
| 2181 | 2142 | struct cpudata *cpu = all_cpu_data[policy->cpu]; |
| 2182 | − struct perf_limits *perf_limits; | |
| 2183 | − | |
| 2184 | − if (policy->policy == CPUFREQ_POLICY_PERFORMANCE) | |
| 2185 | − perf_limits = &performance_limits; | |
| 2186 | − else | |
| 2187 | − perf_limits = &powersave_limits; | |
| 2188 | 2143 | |
| 2189 | 2144 | update_turbo_state(); |
| 2190 | − policy->cpuinfo.max_freq = perf_limits->turbo_disabled || | |
| 2191 | − perf_limits->no_turbo ? | |
| 2145 | + policy->cpuinfo.max_freq = global.turbo_disabled || global.no_turbo ? | |
| 2192 | 2146 | cpu->pstate.max_freq : |
| 2193 | 2147 | cpu->pstate.turbo_freq; |
| 2194 | 2148 | |
| @@ -2203,9 +2157,9 @@ static int intel_pstate_verify_policy(struct cpufreq_policy *policy) · 8 unmodified lines | ||
| 2203 | 2157 | unsigned int max_freq, min_freq; |
| 2204 | 2158 | |
| 2205 | 2159 | max_freq = policy->cpuinfo.max_freq * |
| 2206 | − perf_limits->max_sysfs_pct / 100; | |
| 2160 | + global.max_sysfs_pct / 100; | |
| 2207 | 2161 | min_freq = policy->cpuinfo.max_freq * |
| 2208 | − perf_limits->min_sysfs_pct / 100; | |
| 2162 | + global.min_sysfs_pct / 100; | |
| 2209 | 2163 | cpufreq_verify_within_limits(policy, min_freq, max_freq); |
| 2210 | 2164 | } |
| 2211 | 2165 | |
| @@ -2257,7 +2211,7 @@ static int __intel_pstate_cpu_init(struct cpufreq_policy *policy) · 45 unmodified lines | ||
| 2257 | 2211 | /* cpuinfo and default policy values */ |
| 2258 | 2212 | policy->cpuinfo.min_freq = cpu->pstate.min_pstate * cpu->pstate.scaling; |
| 2259 | 2213 | update_turbo_state(); |
| 2260 | − policy->cpuinfo.max_freq = limits->turbo_disabled ? | |
| 2214 | + policy->cpuinfo.max_freq = global.turbo_disabled ? | |
| 2261 | 2215 | cpu->pstate.max_pstate : cpu->pstate.turbo_pstate; |
| 2262 | 2216 | policy->cpuinfo.max_freq *= cpu->pstate.scaling; |
| 2263 | 2217 | |
| @@ -2277,7 +2231,7 @@ static int intel_pstate_cpu_init(struct cpufreq_policy *policy) · 13 unmodified lines | ||
| 2277 | 2231 | return ret; |
| 2278 | 2232 | |
| 2279 | 2233 | policy->cpuinfo.transition_latency = CPUFREQ_ETERNAL; |
| 2280 | − if (limits->min_perf_pct == 100 && limits->max_perf_pct == 100) | |
| 2234 | + if (IS_ENABLED(CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE)) | |
| 2281 | 2235 | policy->policy = CPUFREQ_POLICY_PERFORMANCE; |
| 2282 | 2236 | else |
| 2283 | 2237 | policy->policy = CPUFREQ_POLICY_POWERSAVE; |
| @@ -2303,7 +2257,7 @@ static int intel_cpufreq_verify_policy(struct cpufreq_policy *policy) · 19 unmodified lines | ||
| 2303 | 2257 | struct cpudata *cpu = all_cpu_data[policy->cpu]; |
| 2304 | 2258 | |
| 2305 | 2259 | update_turbo_state(); |
| 2306 | − policy->cpuinfo.max_freq = limits->turbo_disabled ? | |
| 2260 | + policy->cpuinfo.max_freq = global.no_turbo || global.turbo_disabled ? | |
| 2307 | 2261 | cpu->pstate.max_freq : cpu->pstate.turbo_freq; |
| 2308 | 2262 | |
| 2309 | 2263 | cpufreq_verify_within_cpu_limits(policy); |
| @@ -2311,26 +2265,6 @@ static int intel_cpufreq_verify_policy(struct cpufreq_policy *policy) · 1 unmodified line | ||
| 2311 | 2265 | return 0; |
| 2312 | 2266 | } |
| 2313 | 2267 | |
| 2314 | −static unsigned int intel_cpufreq_turbo_update(struct cpudata *cpu, | |
| 2315 | − struct cpufreq_policy *policy, | |
| 2316 | − unsigned int target_freq) | |
| 2317 | −{ | |
| 2318 | − unsigned int max_freq; | |
| 2319 | − | |
| 2320 | − update_turbo_state(); | |
| 2321 | − | |
| 2322 | − max_freq = limits->no_turbo || limits->turbo_disabled ? | |
| 2323 | − cpu->pstate.max_freq : cpu->pstate.turbo_freq; | |
| 2324 | − policy->cpuinfo.max_freq = max_freq; | |
| 2325 | − if (policy->max > max_freq) | |
| 2326 | − policy->max = max_freq; | |
| 2327 | − | |
| 2328 | − if (target_freq > max_freq) | |
| 2329 | − target_freq = max_freq; | |
| 2330 | − | |
| 2331 | − return target_freq; | |
| 2332 | −} | |
| 2333 | − | |
| 2334 | 2268 | static int intel_cpufreq_target(struct cpufreq_policy *policy, |
| 2335 | 2269 | unsigned int target_freq, |
| 2336 | 2270 | unsigned int relation) |
| @@ -2339,8 +2273,10 @@ static int intel_cpufreq_target(struct cpufreq_policy *policy, · 2 unmodified lines | ||
| 2339 | 2273 | struct cpufreq_freqs freqs; |
| 2340 | 2274 | int target_pstate; |
| 2341 | 2275 | |
| 2276 | + update_turbo_state(); | |
| 2277 | + | |
| 2342 | 2278 | freqs.old = policy->cur; |
| 2343 | − freqs.new = intel_cpufreq_turbo_update(cpu, policy, target_freq); | |
| 2279 | + freqs.new = target_freq; | |
| 2344 | 2280 | |
| 2345 | 2281 | cpufreq_freq_transition_begin(policy, &freqs); |
| 2346 | 2282 | switch (relation) { |
| @@ -2372,7 +2308,8 @@ static unsigned int intel_cpufreq_fast_switch(struct cpufreq_policy *policy, · 25 unmodified lines | ||
| 2372 | 2308 | struct cpudata *cpu = all_cpu_data[policy->cpu]; |
| 2373 | 2309 | int target_pstate; |
| 2374 | 2310 | |
| 2375 | − target_freq = intel_cpufreq_turbo_update(cpu, policy, target_freq); | |
| 2311 | + update_turbo_state(); | |
| 2312 | + | |
| 2376 | 2313 | target_pstate = DIV_ROUND_UP(target_freq, cpu->pstate.scaling); |
| 2377 | 2314 | target_pstate = intel_pstate_prepare_request(cpu, target_pstate); |
| 2378 | 2315 | intel_pstate_update_pstate(cpu, target_pstate); |
| @@ -2427,13 +2364,7 @@ static int intel_pstate_register_driver(void) · 48 unmodified lines | ||
| 2427 | 2364 | { |
| 2428 | 2365 | int ret; |
| 2429 | 2366 | |
| 2430 | − intel_pstate_init_limits(&powersave_limits); | |
| 2431 | − intel_pstate_set_performance_limits(&performance_limits); | |
| 2432 | − if (IS_ENABLED(CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE) && | |
| 2433 | − intel_pstate_driver == &intel_pstate) | |
| 2434 | − limits = &performance_limits; | |
| 2435 | − else | |
| 2436 | − limits = &powersave_limits; | |
| 2367 | + intel_pstate_init_limits(&global); | |
| 2437 | 2368 | |
| 2438 | 2369 | ret = cpufreq_register_driver(intel_pstate_driver); |
| 2439 | 2370 | if (ret) { |
| @@ -615,6 +615,18 @@ int cpuidle_add_sysfs(struct cpuidle_device *dev) · 614 unmodified lines | ||
| 615 | 615 | struct device *cpu_dev = get_cpu_device((unsigned long)dev->cpu); |
| 616 | 616 | int error; |
| 617 | 617 | |
| 618 | + /* | |
| 619 | + * Return if cpu_device is not setup for this CPU. | |
| 620 | + * | |
| 621 | + * This could happen if the arch did not set up cpu_device | |
| 622 | + * since this CPU is not in cpu_present mask and the | |
| 623 | + * driver did not send a correct CPU mask during registration. | |
| 624 | + * Without this check we would end up passing bogus | |
| 625 | + * value for &cpu_dev->kobj in kobject_init_and_add() | |
| 626 | + */ | |
| 627 | + if (!cpu_dev) | |
| 628 | + return -ENODEV; | |
| 629 | + | |
| 618 | 630 | kdev = kzalloc(sizeof(*kdev), GFP_KERNEL); |
| 619 | 631 | if (!kdev) |
| 620 | 632 | return -ENOMEM; |
| @@ -283,11 +283,14 @@ EXPORT_SYMBOL_GPL(ccp_version); · 282 unmodified lines | ||
| 283 | 283 | */ |
| 284 | 284 | int ccp_enqueue_cmd(struct ccp_cmd *cmd) |
| 285 | 285 | { |
| 286 | − struct ccp_device *ccp = ccp_get_device(); | |
| 286 | + struct ccp_device *ccp; | |
| 287 | 287 | unsigned long flags; |
| 288 | 288 | unsigned int i; |
| 289 | 289 | int ret; |
| 290 | 290 | |
| 291 | + /* Some commands might need to be sent to a specific device */ | |
| 292 | + ccp = cmd->ccp ? cmd->ccp : ccp_get_device(); | |
| 293 | + | |
| 291 | 294 | if (!ccp) |
| 292 | 295 | return -ENODEV; |
| 293 | 296 | |
| @@ -390,6 +390,7 @@ static struct ccp_dma_desc *ccp_create_desc(struct dma_chan *dma_chan, · 389 unmodified lines | ||
| 390 | 390 | goto err; |
| 391 | 391 | |
| 392 | 392 | ccp_cmd = &cmd->ccp_cmd; |
| 393 | + ccp_cmd->ccp = chan->ccp; | |
| 393 | 394 | ccp_pt = &ccp_cmd->u.passthru_nomap; |
| 394 | 395 | ccp_cmd->flags = CCP_CMD_MAY_BACKLOG; |
| 395 | 396 | ccp_cmd->flags |= CCP_CMD_PASSTHRU_NO_DMA_MAP; |
| @@ -270,7 +270,7 @@ static void s5p_sg_copy_buf(void *buf, struct scatterlist *sg, · 269 unmodified lines | ||
| 270 | 270 | scatterwalk_done(&walk, out, 0); |
| 271 | 271 | } |
| 272 | 272 | |
| 273 | −static void s5p_aes_complete(struct s5p_aes_dev *dev, int err) | |
| 273 | +static void s5p_sg_done(struct s5p_aes_dev *dev) | |
| 274 | 274 | { |
| 275 | 275 | if (dev->sg_dst_cpy) { |
| 276 | 276 | dev_dbg(dev->dev, |
| @@ -281,8 +281,11 @@ static void s5p_aes_complete(struct s5p_aes_dev *dev, int err) · 4 unmodified lines | ||
| 281 | 281 | } |
| 282 | 282 | s5p_free_sg_cpy(dev, &dev->sg_src_cpy); |
| 283 | 283 | s5p_free_sg_cpy(dev, &dev->sg_dst_cpy); |
| 284 | +} | |
| 284 | 285 | |
| 285 | − /* holding a lock outside */ | |
| 286 | +/* Calls the completion. Cannot be called with dev->lock hold. */ | |
| 287 | +static void s5p_aes_complete(struct s5p_aes_dev *dev, int err) | |
| 288 | +{ | |
| 286 | 289 | dev->req->base.complete(&dev->req->base, err); |
| 287 | 290 | dev->busy = false; |
| 288 | 291 | } |
| @@ -368,51 +371,44 @@ exit: · 79 unmodified lines | ||
| 368 | 371 | } |
| 369 | 372 | |
| 370 | 373 | /* |
| 371 | − * Returns true if new transmitting (output) data is ready and its | |
| 372 | − * address+length have to be written to device (by calling | |
| 373 | − * s5p_set_dma_outdata()). False otherwise. | |
| 374 | + * Returns -ERRNO on error (mapping of new data failed). | |
| 375 | + * On success returns: | |
| 376 | + * - 0 if there is no more data, | |
| 377 | + * - 1 if new transmitting (output) data is ready and its address+length | |
| 378 | + * have to be written to device (by calling s5p_set_dma_outdata()). | |
| 374 | 379 | */ |
| 375 | −static bool s5p_aes_tx(struct s5p_aes_dev *dev) | |
| 380 | +static int s5p_aes_tx(struct s5p_aes_dev *dev) | |
| 376 | 381 | { |
| 377 | − int err = 0; | |
| 378 | − bool ret = false; | |
| 382 | + int ret = 0; | |
| 379 | 383 | |
| 380 | 384 | s5p_unset_outdata(dev); |
| 381 | 385 | |
| 382 | 386 | if (!sg_is_last(dev->sg_dst)) { |
| 383 | − err = s5p_set_outdata(dev, sg_next(dev->sg_dst)); | |
| 384 | − if (err) | |
| 385 | − s5p_aes_complete(dev, err); | |
| 386 | − else | |
| 387 | − ret = true; | |
| 388 | − } else { | |
| 389 | − s5p_aes_complete(dev, err); | |
| 390 | − | |
| 391 | − dev->busy = true; | |
| 392 | − tasklet_schedule(&dev->tasklet); | |
| 387 | + ret = s5p_set_outdata(dev, sg_next(dev->sg_dst)); | |
| 388 | + if (!ret) | |
| 389 | + ret = 1; | |
| 393 | 390 | } |
| 394 | 391 | |
| 395 | 392 | return ret; |
| 396 | 393 | } |
| 397 | 394 | |
| 398 | 395 | /* |
| 399 | − * Returns true if new receiving (input) data is ready and its | |
| 400 | − * address+length have to be written to device (by calling | |
| 401 | − * s5p_set_dma_indata()). False otherwise. | |
| 396 | + * Returns -ERRNO on error (mapping of new data failed). | |
| 397 | + * On success returns: | |
| 398 | + * - 0 if there is no more data, | |
| 399 | + * - 1 if new receiving (input) data is ready and its address+length | |
| 400 | + * have to be written to device (by calling s5p_set_dma_indata()). | |
| 402 | 401 | */ |
| 403 | −static bool s5p_aes_rx(struct s5p_aes_dev *dev) | |
| 402 | +static int s5p_aes_rx(struct s5p_aes_dev *dev/*, bool *set_dma*/) | |
| 404 | 403 | { |
| 405 | − int err; | |
| 406 | − bool ret = false; | |
| 404 | + int ret = 0; | |
| 407 | 405 | |
| 408 | 406 | s5p_unset_indata(dev); |
| 409 | 407 | |
| 410 | 408 | if (!sg_is_last(dev->sg_src)) { |
| 411 | − err = s5p_set_indata(dev, sg_next(dev->sg_src)); | |
| 412 | − if (err) | |
| 413 | − s5p_aes_complete(dev, err); | |
| 414 | − else | |
| 415 | − ret = true; | |
| 409 | + ret = s5p_set_indata(dev, sg_next(dev->sg_src)); | |
| 410 | + if (!ret) | |
| 411 | + ret = 1; | |
| 416 | 412 | } |
| 417 | 413 | |
| 418 | 414 | return ret; |
| @@ -422,33 +418,73 @@ static irqreturn_t s5p_aes_interrupt(int irq, void *dev_id) · 3 unmodified lines | ||
| 422 | 418 | { |
| 423 | 419 | struct platform_device *pdev = dev_id; |
| 424 | 420 | struct s5p_aes_dev *dev = platform_get_drvdata(pdev); |
| 425 | − bool set_dma_tx = false; | |
| 426 | − bool set_dma_rx = false; | |
| 421 | + int err_dma_tx = 0; | |
| 422 | + int err_dma_rx = 0; | |
| 423 | + bool tx_end = false; | |
| 427 | 424 | unsigned long flags; |
| 428 | 425 | uint32_t status; |
| 426 | + int err; | |
| 429 | 427 | |
| 430 | 428 | spin_lock_irqsave(&dev->lock, flags); |
| 431 | 429 | |
| 430 | + /* | |
| 431 | + * Handle rx or tx interrupt. If there is still data (scatterlist did not | |
| 432 | + * reach end), then map next scatterlist entry. | |
| 433 | + * In case of such mapping error, s5p_aes_complete() should be called. | |
| 434 | + * | |
| 435 | + * If there is no more data in tx scatter list, call s5p_aes_complete() | |
| 436 | + * and schedule new tasklet. | |
| 437 | + */ | |
| 432 | 438 | status = SSS_READ(dev, FCINTSTAT); |
| 433 | 439 | if (status & SSS_FCINTSTAT_BRDMAINT) |
| 434 | − set_dma_rx = s5p_aes_rx(dev); | |
| 435 | − if (status & SSS_FCINTSTAT_BTDMAINT) | |
| 436 | − set_dma_tx = s5p_aes_tx(dev); | |
| 440 | + err_dma_rx = s5p_aes_rx(dev); | |
| 441 | + | |
| 442 | + if (status & SSS_FCINTSTAT_BTDMAINT) { | |
| 443 | + if (sg_is_last(dev->sg_dst)) | |
| 444 | + tx_end = true; | |
| 445 | + err_dma_tx = s5p_aes_tx(dev); | |
| 446 | + } | |
| 437 | 447 | |
| 438 | 448 | SSS_WRITE(dev, FCINTPEND, status); |
| 439 | 449 | |
| 440 | − /* | |
| 441 | − * Writing length of DMA block (either receiving or transmitting) | |
| 442 | − * will start the operation immediately, so this should be done | |
| 443 | − * at the end (even after clearing pending interrupts to not miss the | |
| 444 | − * interrupt). | |
| 445 | − */ | |
| 446 | − if (set_dma_tx) | |
| 447 | − s5p_set_dma_outdata(dev, dev->sg_dst); | |
| 448 | − if (set_dma_rx) | |
| 449 | − s5p_set_dma_indata(dev, dev->sg_src); | |
| 450 | + if (err_dma_rx < 0) { | |
| 451 | + err = err_dma_rx; | |
| 452 | + goto error; | |
| 453 | + } | |
| 454 | + if (err_dma_tx < 0) { | |
| 455 | + err = err_dma_tx; | |
| 456 | + goto error; | |
| 457 | + } | |
| 458 | + | |
| 459 | + if (tx_end) { | |
| 460 | + s5p_sg_done(dev); | |
| 461 | + | |
| 462 | + spin_unlock_irqrestore(&dev->lock, flags); | |
| 463 | + | |
| 464 | + s5p_aes_complete(dev, 0); | |
| 465 | + dev->busy = true; | |
| 466 | + tasklet_schedule(&dev->tasklet); | |
| 467 | + } else { | |
| 468 | + /* | |
| 469 | + * Writing length of DMA block (either receiving or | |
| 470 | + * transmitting) will start the operation immediately, so this | |
| 471 | + * should be done at the end (even after clearing pending | |
| 472 | + * interrupts to not miss the interrupt). | |
| 473 | + */ | |
| 474 | + if (err_dma_tx == 1) | |
| 475 | + s5p_set_dma_outdata(dev, dev->sg_dst); | |
| 476 | + if (err_dma_rx == 1) | |
| 477 | + s5p_set_dma_indata(dev, dev->sg_src); | |
| 450 | 478 | |
| 479 | + spin_unlock_irqrestore(&dev->lock, flags); | |
| 480 | + } | |
| 481 | + | |
| 482 | + return IRQ_HANDLED; | |
| 483 | + | |
| 484 | +error: | |
| 485 | + s5p_sg_done(dev); | |
| 451 | 486 | spin_unlock_irqrestore(&dev->lock, flags); |
| 487 | + s5p_aes_complete(dev, err); | |
| 452 | 488 | |
| 453 | 489 | return IRQ_HANDLED; |
| 454 | 490 | } |
| @@ -597,8 +633,9 @@ outdata_error: · 142 unmodified lines | ||
| 597 | 633 | s5p_unset_indata(dev); |
| 598 | 634 | |
| 599 | 635 | indata_error: |
| 600 | − s5p_aes_complete(dev, err); | |
| 636 | + s5p_sg_done(dev); | |
| 601 | 637 | spin_unlock_irqrestore(&dev->lock, flags); |
| 638 | + s5p_aes_complete(dev, err); | |
| 602 | 639 | } |
| 603 | 640 | |
| 604 | 641 | static void s5p_tasklet_cb(unsigned long data) |
| @@ -805,8 +842,9 @@ static int s5p_aes_probe(struct platform_device *pdev) · 200 unmodified lines | ||
| 805 | 842 | dev_warn(dev, "feed control interrupt is not available.\n"); |
| 806 | 843 | goto err_irq; |
| 807 | 844 | } |
| 808 | − err = devm_request_irq(dev, pdata->irq_fc, s5p_aes_interrupt, | |
| 809 | − IRQF_SHARED, pdev->name, pdev); | |
| 845 | + err = devm_request_threaded_irq(dev, pdata->irq_fc, NULL, | |
| 846 | + s5p_aes_interrupt, IRQF_ONESHOT, | |
| 847 | + pdev->name, pdev); | |
| 810 | 848 | if (err < 0) { |
| 811 | 849 | dev_warn(dev, "feed control interrupt is not available.\n"); |
| 812 | 850 | goto err_irq; |
| @@ -2,6 +2,7 @@ menuconfig DEV_DAX · 1 unmodified line | ||
| 2 | 2 | tristate "DAX: direct access to differentiated memory" |
| 3 | 3 | default m if NVDIMM_DAX |
| 4 | 4 | depends on TRANSPARENT_HUGEPAGE |
| 5 | + select SRCU | |
| 5 | 6 | help |
| 6 | 7 | Support raw access to differentiated (persistence, bandwidth, |
| 7 | 8 | latency...) memory via an mmap(2) capable character |
| @@ -25,6 +25,7 @@ · 24 unmodified lines | ||
| 25 | 25 | #include "dax.h" |
| 26 | 26 | |
| 27 | 27 | static dev_t dax_devt; |
| 28 | +DEFINE_STATIC_SRCU(dax_srcu); | |
| 28 | 29 | static struct class *dax_class; |
| 29 | 30 | static DEFINE_IDA(dax_minor_ida); |
| 30 | 31 | static int nr_dax = CONFIG_NR_DEV_DAX; |
| @@ -60,7 +61,7 @@ struct dax_region { · 29 unmodified lines | ||
| 60 | 61 | * @region - parent region |
| 61 | 62 | * @dev - device backing the character device |
| 62 | 63 | * @cdev - core chardev data |
| 63 | − * @alive - !alive + rcu grace period == no new mappings can be established | |
| 64 | + * @alive - !alive + srcu grace period == no new mappings can be established | |
| 64 | 65 | * @id - child id in the region |
| 65 | 66 | * @num_resources - number of physical address extents in this device |
| 66 | 67 | * @res - array of physical address ranges |
| @@ -427,6 +428,7 @@ static int __dax_dev_pte_fault(struct dax_dev *dax_dev, struct vm_fault *vmf) · 360 unmodified lines | ||
| 427 | 428 | int rc = VM_FAULT_SIGBUS; |
| 428 | 429 | phys_addr_t phys; |
| 429 | 430 | pfn_t pfn; |
| 431 | + unsigned int fault_size = PAGE_SIZE; | |
| 430 | 432 | |
| 431 | 433 | if (check_vma(dax_dev, vmf->vma, __func__)) |
| 432 | 434 | return VM_FAULT_SIGBUS; |
| @@ -437,9 +439,12 @@ static int __dax_dev_pte_fault(struct dax_dev *dax_dev, struct vm_fault *vmf) · 4 unmodified lines | ||
| 437 | 439 | return VM_FAULT_SIGBUS; |
| 438 | 440 | } |
| 439 | 441 | |
| 442 | + if (fault_size != dax_region->align) | |
| 443 | + return VM_FAULT_SIGBUS; | |
| 444 | + | |
| 440 | 445 | phys = pgoff_to_phys(dax_dev, vmf->pgoff, PAGE_SIZE); |
| 441 | 446 | if (phys == -1) { |
| 442 | − dev_dbg(dev, "%s: phys_to_pgoff(%#lx) failed\n", __func__, | |
| 447 | + dev_dbg(dev, "%s: pgoff_to_phys(%#lx) failed\n", __func__, | |
| 443 | 448 | vmf->pgoff); |
| 444 | 449 | return VM_FAULT_SIGBUS; |
| 445 | 450 | } |
| @@ -464,6 +469,7 @@ static int __dax_dev_pmd_fault(struct dax_dev *dax_dev, struct vm_fault *vmf) · 18 unmodified lines | ||
| 464 | 469 | phys_addr_t phys; |
| 465 | 470 | pgoff_t pgoff; |
| 466 | 471 | pfn_t pfn; |
| 472 | + unsigned int fault_size = PMD_SIZE; | |
| 467 | 473 | |
| 468 | 474 | if (check_vma(dax_dev, vmf->vma, __func__)) |
| 469 | 475 | return VM_FAULT_SIGBUS; |
| @@ -480,10 +486,20 @@ static int __dax_dev_pmd_fault(struct dax_dev *dax_dev, struct vm_fault *vmf) · 10 unmodified lines | ||
| 480 | 486 | return VM_FAULT_SIGBUS; |
| 481 | 487 | } |
| 482 | 488 | |
| 489 | + if (fault_size < dax_region->align) | |
| 490 | + return VM_FAULT_SIGBUS; | |
| 491 | + else if (fault_size > dax_region->align) | |
| 492 | + return VM_FAULT_FALLBACK; | |
| 493 | + | |
| 494 | + /* if we are outside of the VMA */ | |
| 495 | + if (pmd_addr < vmf->vma->vm_start || | |
| 496 | + (pmd_addr + PMD_SIZE) > vmf->vma->vm_end) | |
| 497 | + return VM_FAULT_SIGBUS; | |
| 498 | + | |
| 483 | 499 | pgoff = linear_page_index(vmf->vma, pmd_addr); |
| 484 | 500 | phys = pgoff_to_phys(dax_dev, pgoff, PMD_SIZE); |
| 485 | 501 | if (phys == -1) { |
| 486 | − dev_dbg(dev, "%s: phys_to_pgoff(%#lx) failed\n", __func__, | |
| 502 | + dev_dbg(dev, "%s: pgoff_to_phys(%#lx) failed\n", __func__, | |
| 487 | 503 | pgoff); |
| 488 | 504 | return VM_FAULT_SIGBUS; |
| 489 | 505 | } |
| @@ -503,6 +519,8 @@ static int __dax_dev_pud_fault(struct dax_dev *dax_dev, struct vm_fault *vmf) · 13 unmodified lines | ||
| 503 | 519 | phys_addr_t phys; |
| 504 | 520 | pgoff_t pgoff; |
| 505 | 521 | pfn_t pfn; |
| 522 | + unsigned int fault_size = PUD_SIZE; | |
| 523 | + | |
| 506 | 524 | |
| 507 | 525 | if (check_vma(dax_dev, vmf->vma, __func__)) |
| 508 | 526 | return VM_FAULT_SIGBUS; |
| @@ -519,10 +537,20 @@ static int __dax_dev_pud_fault(struct dax_dev *dax_dev, struct vm_fault *vmf) · 10 unmodified lines | ||
| 519 | 537 | return VM_FAULT_SIGBUS; |
| 520 | 538 | } |
| 521 | 539 | |
| 540 | + if (fault_size < dax_region->align) | |
| 541 | + return VM_FAULT_SIGBUS; | |
| 542 | + else if (fault_size > dax_region->align) | |
| 543 | + return VM_FAULT_FALLBACK; | |
| 544 | + | |
| 545 | + /* if we are outside of the VMA */ | |
| 546 | + if (pud_addr < vmf->vma->vm_start || | |
| 547 | + (pud_addr + PUD_SIZE) > vmf->vma->vm_end) | |
| 548 | + return VM_FAULT_SIGBUS; | |
| 549 | + | |
| 522 | 550 | pgoff = linear_page_index(vmf->vma, pud_addr); |
| 523 | 551 | phys = pgoff_to_phys(dax_dev, pgoff, PUD_SIZE); |
| 524 | 552 | if (phys == -1) { |
| 525 | − dev_dbg(dev, "%s: phys_to_pgoff(%#lx) failed\n", __func__, | |
| 553 | + dev_dbg(dev, "%s: pgoff_to_phys(%#lx) failed\n", __func__, | |
| 526 | 554 | pgoff); |
| 527 | 555 | return VM_FAULT_SIGBUS; |
| 528 | 556 | } |
| @@ -542,7 +570,7 @@ static int __dax_dev_pud_fault(struct dax_dev *dax_dev, struct vm_fault *vmf) · 13 unmodified lines | ||
| 542 | 570 | static int dax_dev_huge_fault(struct vm_fault *vmf, |
| 543 | 571 | enum page_entry_size pe_size) |
| 544 | 572 | { |
| 545 | − int rc; | |
| 573 | + int rc, id; | |
| 546 | 574 | struct file *filp = vmf->vma->vm_file; |
| 547 | 575 | struct dax_dev *dax_dev = filp->private_data; |
| 548 | 576 | |
| @@ -551,7 +579,7 @@ static int dax_dev_huge_fault(struct vm_fault *vmf, · 2 unmodified lines | ||
| 551 | 579 | ? "write" : "read", |
| 552 | 580 | vmf->vma->vm_start, vmf->vma->vm_end); |
| 553 | 581 | |
| 554 | − rcu_read_lock(); | |
| 582 | + id = srcu_read_lock(&dax_srcu); | |
| 555 | 583 | switch (pe_size) { |
| 556 | 584 | case PE_SIZE_PTE: |
| 557 | 585 | rc = __dax_dev_pte_fault(dax_dev, vmf); |
| @@ -565,7 +593,7 @@ static int dax_dev_huge_fault(struct vm_fault *vmf, · 7 unmodified lines | ||
| 565 | 593 | default: |
| 566 | 594 | return VM_FAULT_FALLBACK; |
| 567 | 595 | } |
| 568 | − rcu_read_unlock(); | |
| 596 | + srcu_read_unlock(&dax_srcu, id); | |
| 569 | 597 | |
| 570 | 598 | return rc; |
| 571 | 599 | } |
| @@ -681,11 +709,11 @@ static void kill_dax_dev(struct dax_dev *dax_dev) · 109 unmodified lines | ||
| 681 | 709 | * Note, rcu is not protecting the liveness of dax_dev, rcu is |
| 682 | 710 | * ensuring that any fault handlers that might have seen |
| 683 | 711 | * dax_dev->alive == true, have completed. Any fault handlers |
| 684 | − * that start after synchronize_rcu() has started will abort | |
| 712 | + * that start after synchronize_srcu() has started will abort | |
| 685 | 713 | * upon seeing dax_dev->alive == false. |
| 686 | 714 | */ |
| 687 | 715 | dax_dev->alive = false; |
| 688 | − synchronize_rcu(); | |
| 716 | + synchronize_srcu(&dax_srcu); | |
| 689 | 717 | unmap_mapping_range(dax_dev->inode->i_mapping, 0, 0, 1); |
| 690 | 718 | } |
| 691 | 719 | |
| @@ -44,7 +44,7 @@ config EXTCON_GPIO · 43 unmodified lines | ||
| 44 | 44 | |
| 45 | 45 | config EXTCON_INTEL_INT3496 |
| 46 | 46 | tristate "Intel INT3496 ACPI device extcon driver" |
| 47 | − depends on GPIOLIB && ACPI | |
| 47 | + depends on GPIOLIB && ACPI && (X86 || COMPILE_TEST) | |
| 48 | 48 | help |
| 49 | 49 | Say Y here to enable extcon support for USB OTG ports controlled by |
| 50 | 50 | an Intel INT3496 ACPI device. |
| @@ -45,6 +45,17 @@ static const unsigned int int3496_cable[] = { · 44 unmodified lines | ||
| 45 | 45 | EXTCON_NONE, |
| 46 | 46 | }; |
| 47 | 47 | |
| 48 | +static const struct acpi_gpio_params id_gpios = { INT3496_GPIO_USB_ID, 0, false }; | |
| 49 | +static const struct acpi_gpio_params vbus_gpios = { INT3496_GPIO_VBUS_EN, 0, false }; | |
| 50 | +static const struct acpi_gpio_params mux_gpios = { INT3496_GPIO_USB_MUX, 0, false }; | |
| 51 | + | |
| 52 | +static const struct acpi_gpio_mapping acpi_int3496_default_gpios[] = { | |
| 53 | + { "id-gpios", &id_gpios, 1 }, | |
| 54 | + { "vbus-gpios", &vbus_gpios, 1 }, | |
| 55 | + { "mux-gpios", &mux_gpios, 1 }, | |
| 56 | + { }, | |
| 57 | +}; | |
| 58 | + | |
| 48 | 59 | static void int3496_do_usb_id(struct work_struct *work) |
| 49 | 60 | { |
| 50 | 61 | struct int3496_data *data = |
| @@ -83,6 +94,13 @@ static int int3496_probe(struct platform_device *pdev) · 32 unmodified lines | ||
| 83 | 94 | struct int3496_data *data; |
| 84 | 95 | int ret; |
| 85 | 96 | |
| 97 | + ret = acpi_dev_add_driver_gpios(ACPI_COMPANION(dev), | |
| 98 | + acpi_int3496_default_gpios); | |
| 99 | + if (ret) { | |
| 100 | + dev_err(dev, "can't add GPIO ACPI mapping\n"); | |
| 101 | + return ret; | |
| 102 | + } | |
| 103 | + | |
| 86 | 104 | data = devm_kzalloc(dev, sizeof(*data), GFP_KERNEL); |
| 87 | 105 | if (!data) |
| 88 | 106 | return -ENOMEM; |
| @@ -90,30 +108,27 @@ static int int3496_probe(struct platform_device *pdev) · 1 unmodified line | ||
| 90 | 108 | data->dev = dev; |
| 91 | 109 | INIT_DELAYED_WORK(&data->work, int3496_do_usb_id); |
| 92 | 110 | |
| 93 | − data->gpio_usb_id = devm_gpiod_get_index(dev, "id", | |
| 94 | − INT3496_GPIO_USB_ID, | |
| 95 | − GPIOD_IN); | |
| 111 | + data->gpio_usb_id = devm_gpiod_get(dev, "id", GPIOD_IN); | |
| 96 | 112 | if (IS_ERR(data->gpio_usb_id)) { |
| 97 | 113 | ret = PTR_ERR(data->gpio_usb_id); |
| 98 | 114 | dev_err(dev, "can't request USB ID GPIO: %d\n", ret); |
| 99 | 115 | return ret; |
| 116 | + } else if (gpiod_get_direction(data->gpio_usb_id) != GPIOF_DIR_IN) { | |
| 117 | + dev_warn(dev, FW_BUG "USB ID GPIO not in input mode, fixing\n"); | |
| 118 | + gpiod_direction_input(data->gpio_usb_id); | |
| 100 | 119 | } |
| 101 | 120 | |
| 102 | 121 | data->usb_id_irq = gpiod_to_irq(data->gpio_usb_id); |
| 103 | − if (data->usb_id_irq <= 0) { | |
| 122 | + if (data->usb_id_irq < 0) { | |
| 104 | 123 | dev_err(dev, "can't get USB ID IRQ: %d\n", data->usb_id_irq); |
| 105 | − return -EINVAL; | |
| 124 | + return data->usb_id_irq; | |
| 106 | 125 | } |
| 107 | 126 | |
| 108 | − data->gpio_vbus_en = devm_gpiod_get_index(dev, "vbus en", | |
| 109 | − INT3496_GPIO_VBUS_EN, | |
| 110 | − GPIOD_ASIS); | |
| 127 | + data->gpio_vbus_en = devm_gpiod_get(dev, "vbus", GPIOD_ASIS); | |
| 111 | 128 | if (IS_ERR(data->gpio_vbus_en)) |
| 112 | 129 | dev_info(dev, "can't request VBUS EN GPIO\n"); |
| 113 | 130 | |
| 114 | − data->gpio_usb_mux = devm_gpiod_get_index(dev, "usb mux", | |
| 115 | − INT3496_GPIO_USB_MUX, | |
| 116 | − GPIOD_ASIS); | |
| 131 | + data->gpio_usb_mux = devm_gpiod_get(dev, "mux", GPIOD_ASIS); | |
| 117 | 132 | if (IS_ERR(data->gpio_usb_mux)) |
| 118 | 133 | dev_info(dev, "can't request USB MUX GPIO\n"); |
| 119 | 134 | |
| @@ -154,6 +169,8 @@ static int int3496_remove(struct platform_device *pdev) · 34 unmodified lines | ||
| 154 | 169 | devm_free_irq(&pdev->dev, data->usb_id_irq, data); |
| 155 | 170 | cancel_delayed_work_sync(&data->work); |
| 156 | 171 | |
| 172 | + acpi_dev_remove_driver_gpios(ACPI_COMPANION(&pdev->dev)); | |
| 173 | + | |
| 157 | 174 | return 0; |
| 158 | 175 | } |
| 159 | 176 | |
| @@ -96,7 +96,7 @@ static int altr_a10sr_gpio_probe(struct platform_device *pdev) · 95 unmodified lines | ||
| 96 | 96 | gpio->regmap = a10sr->regmap; |
| 97 | 97 | |
| 98 | 98 | gpio->gp = altr_a10sr_gc; |
| 99 | − | |
| 99 | + gpio->gp.parent = pdev->dev.parent; | |
| 100 | 100 | gpio->gp.of_node = pdev->dev.of_node; |
| 101 | 101 | |
| 102 | 102 | ret = devm_gpiochip_add_data(&pdev->dev, &gpio->gp, gpio); |
| @@ -90,21 +90,18 @@ static int altera_gpio_irq_set_type(struct irq_data *d, · 89 unmodified lines | ||
| 90 | 90 | |
| 91 | 91 | altera_gc = gpiochip_get_data(irq_data_get_irq_chip_data(d)); |
| 92 | 92 | |
| 93 | − if (type == IRQ_TYPE_NONE) | |
| 93 | + if (type == IRQ_TYPE_NONE) { | |
| 94 | + irq_set_handler_locked(d, handle_bad_irq); | |
| 94 | 95 | return 0; |
| 95 | − if (type == IRQ_TYPE_LEVEL_HIGH && | |
| 96 | − altera_gc->interrupt_trigger == IRQ_TYPE_LEVEL_HIGH) | |
| 97 | − return 0; | |
| 98 | − if (type == IRQ_TYPE_EDGE_RISING && | |
| 99 | − altera_gc->interrupt_trigger == IRQ_TYPE_EDGE_RISING) | |
| 100 | − return 0; | |
| 101 | − if (type == IRQ_TYPE_EDGE_FALLING && | |
| 102 | − altera_gc->interrupt_trigger == IRQ_TYPE_EDGE_FALLING) | |
| 103 | − return 0; | |
| 104 | − if (type == IRQ_TYPE_EDGE_BOTH && | |
| 105 | − altera_gc->interrupt_trigger == IRQ_TYPE_EDGE_BOTH) | |
| 96 | + } | |
| 97 | + if (type == altera_gc->interrupt_trigger) { | |
| 98 | + if (type == IRQ_TYPE_LEVEL_HIGH) | |
| 99 | + irq_set_handler_locked(d, handle_level_irq); | |
| 100 | + else | |
| 101 | + irq_set_handler_locked(d, handle_simple_irq); | |
| 106 | 102 | return 0; |
| 107 | − | |
| 103 | + } | |
| 104 | + irq_set_handler_locked(d, handle_bad_irq); | |
| 108 | 105 | return -EINVAL; |
| 109 | 106 | } |
| 110 | 107 | |
| @@ -230,7 +227,6 @@ static void altera_gpio_irq_edge_handler(struct irq_desc *desc) · 119 unmodified lines | ||
| 230 | 227 | chained_irq_exit(chip, desc); |
| 231 | 228 | } |
| 232 | 229 | |
| 233 | − | |
| 234 | 230 | static void altera_gpio_irq_leveL_high_handler(struct irq_desc *desc) |
| 235 | 231 | { |
| 236 | 232 | struct altera_gpio_chip *altera_gc; |
| @@ -310,7 +306,7 @@ static int altera_gpio_probe(struct platform_device *pdev) · 73 unmodified lines | ||
| 310 | 306 | altera_gc->interrupt_trigger = reg; |
| 311 | 307 | |
| 312 | 308 | ret = gpiochip_irqchip_add(&altera_gc->mmchip.gc, &altera_irq_chip, 0, |
| 313 | − handle_simple_irq, IRQ_TYPE_NONE); | |
| 309 | + handle_bad_irq, IRQ_TYPE_NONE); | |
| 314 | 310 | |
| 315 | 311 | if (ret) { |
| 316 | 312 | dev_err(&pdev->dev, "could not add irqchip\n"); |
| @@ -270,8 +270,10 @@ mcp23s08_direction_output(struct gpio_chip *chip, unsigned offset, int value) · 269 unmodified lines | ||
| 270 | 270 | static irqreturn_t mcp23s08_irq(int irq, void *data) |
| 271 | 271 | { |
| 272 | 272 | struct mcp23s08 *mcp = data; |
| 273 | − int intcap, intf, i; | |
| 273 | + int intcap, intf, i, gpio, gpio_orig, intcap_mask; | |
| 274 | 274 | unsigned int child_irq; |
| 275 | + bool intf_set, intcap_changed, gpio_bit_changed, | |
| 276 | + defval_changed, gpio_set; | |
| 275 | 277 | |
| 276 | 278 | mutex_lock(&mcp->lock); |
| 277 | 279 | if (mcp_read(mcp, MCP_INTF, &intf) < 0) { |
| @@ -287,14 +289,67 @@ static irqreturn_t mcp23s08_irq(int irq, void *data) · 9 unmodified lines | ||
| 287 | 289 | } |
| 288 | 290 | |
| 289 | 291 | mcp->cache[MCP_INTCAP] = intcap; |
| 292 | + | |
| 293 | + /* This clears the interrupt(configurable on S18) */ | |
| 294 | + if (mcp_read(mcp, MCP_GPIO, &gpio) < 0) { | |
| 295 | + mutex_unlock(&mcp->lock); | |
| 296 | + return IRQ_HANDLED; | |
| 297 | + } | |
| 298 | + gpio_orig = mcp->cache[MCP_GPIO]; | |
| 299 | + mcp->cache[MCP_GPIO] = gpio; | |
| 290 | 300 | mutex_unlock(&mcp->lock); |
| 291 | 301 | |
| 302 | + if (mcp->cache[MCP_INTF] == 0) { | |
| 303 | + /* There is no interrupt pending */ | |
| 304 | + return IRQ_HANDLED; | |
| 305 | + } | |
| 306 | + | |
| 307 | + dev_dbg(mcp->chip.parent, | |
| 308 | + "intcap 0x%04X intf 0x%04X gpio_orig 0x%04X gpio 0x%04X\n", | |
| 309 | + intcap, intf, gpio_orig, gpio); | |
| 292 | 310 | |
| 293 | 311 | for (i = 0; i < mcp->chip.ngpio; i++) { |
| 294 | − if ((BIT(i) & mcp->cache[MCP_INTF]) && | |
| 295 | − ((BIT(i) & intcap & mcp->irq_rise) || | |
| 296 | − (mcp->irq_fall & ~intcap & BIT(i)) || | |
| 297 | − (BIT(i) & mcp->cache[MCP_INTCON]))) { | |
| 312 | + /* We must check all of the inputs on the chip, | |
| 313 | + * otherwise we may not notice a change on >=2 pins. | |
| 314 | + * | |
| 315 | + * On at least the mcp23s17, INTCAP is only updated | |
| 316 | + * one byte at a time(INTCAPA and INTCAPB are | |
| 317 | + * not written to at the same time - only on a per-bank | |
| 318 | + * basis). | |
| 319 | + * | |
| 320 | + * INTF only contains the single bit that caused the | |
| 321 | + * interrupt per-bank. On the mcp23s17, there is | |
| 322 | + * INTFA and INTFB. If two pins are changed on the A | |
| 323 | + * side at the same time, INTF will only have one bit | |
| 324 | + * set. If one pin on the A side and one pin on the B | |
| 325 | + * side are changed at the same time, INTF will have | |
| 326 | + * two bits set. Thus, INTF can't be the only check | |
| 327 | + * to see if the input has changed. | |
| 328 | + */ | |
| 329 | + | |
| 330 | + intf_set = BIT(i) & mcp->cache[MCP_INTF]; | |
| 331 | + if (i < 8 && intf_set) | |
| 332 | + intcap_mask = 0x00FF; | |
| 333 | + else if (i >= 8 && intf_set) | |
| 334 | + intcap_mask = 0xFF00; | |
| 335 | + else | |
| 336 | + intcap_mask = 0x00; | |
| 337 | + | |
| 338 | + intcap_changed = (intcap_mask & | |
| 339 | + (BIT(i) & mcp->cache[MCP_INTCAP])) != | |
| 340 | + (intcap_mask & (BIT(i) & gpio_orig)); | |
| 341 | + gpio_set = BIT(i) & mcp->cache[MCP_GPIO]; | |
| 342 | + gpio_bit_changed = (BIT(i) & gpio_orig) != | |
| 343 | + (BIT(i) & mcp->cache[MCP_GPIO]); | |
| 344 | + defval_changed = (BIT(i) & mcp->cache[MCP_INTCON]) && | |
| 345 | + ((BIT(i) & mcp->cache[MCP_GPIO]) != | |
| 346 | + (BIT(i) & mcp->cache[MCP_DEFVAL])); | |
| 347 | + | |
| 348 | + if (((gpio_bit_changed || intcap_changed) && | |
| 349 | + (BIT(i) & mcp->irq_rise) && gpio_set) || | |
| 350 | + ((gpio_bit_changed || intcap_changed) && | |
| 351 | + (BIT(i) & mcp->irq_fall) && !gpio_set) || | |
| 352 | + defval_changed) { | |
| 298 | 353 | child_irq = irq_find_mapping(mcp->chip.irqdomain, i); |
| 299 | 354 | handle_nested_irq(child_irq); |
| 300 | 355 | } |
| @@ -197,7 +197,7 @@ static ssize_t gpio_mockup_event_write(struct file *file, · 196 unmodified lines | ||
| 197 | 197 | struct seq_file *sfile; |
| 198 | 198 | struct gpio_desc *desc; |
| 199 | 199 | struct gpio_chip *gc; |
| 200 | − int status, val; | |
| 200 | + int val; | |
| 201 | 201 | char buf; |
| 202 | 202 | |
| 203 | 203 | sfile = file->private_data; |
| @@ -206,9 +206,8 @@ static ssize_t gpio_mockup_event_write(struct file *file, · 2 unmodified lines | ||
| 206 | 206 | chip = priv->chip; |
| 207 | 207 | gc = &chip->gc; |
| 208 | 208 | |
| 209 | − status = copy_from_user(&buf, usr_buf, 1); | |
| 210 | − if (status) | |
| 211 | − return status; | |
| 209 | + if (copy_from_user(&buf, usr_buf, 1)) | |
| 210 | + return -EFAULT; | |
| 212 | 211 | |
| 213 | 212 | if (buf == '0') |
| 214 | 213 | val = 0; |
| @@ -42,9 +42,7 @@ struct xgene_gpio { · 41 unmodified lines | ||
| 42 | 42 | struct gpio_chip chip; |
| 43 | 43 | void __iomem *base; |
| 44 | 44 | spinlock_t lock; |
| 45 | −#ifdef CONFIG_PM | |
| 46 | 45 | u32 set_dr_val[XGENE_MAX_GPIO_BANKS]; |
| 47 | −#endif | |
| 48 | 46 | }; |
| 49 | 47 | |
| 50 | 48 | static int xgene_gpio_get(struct gpio_chip *gc, unsigned int offset) |
| @@ -138,8 +136,7 @@ static int xgene_gpio_dir_out(struct gpio_chip *gc, · 87 unmodified lines | ||
| 138 | 136 | return 0; |
| 139 | 137 | } |
| 140 | 138 | |
| 141 | −#ifdef CONFIG_PM | |
| 142 | −static int xgene_gpio_suspend(struct device *dev) | |
| 139 | +static __maybe_unused int xgene_gpio_suspend(struct device *dev) | |
| 143 | 140 | { |
| 144 | 141 | struct xgene_gpio *gpio = dev_get_drvdata(dev); |
| 145 | 142 | unsigned long bank_offset; |
| @@ -152,7 +149,7 @@ static int xgene_gpio_suspend(struct device *dev) · 6 unmodified lines | ||
| 152 | 149 | return 0; |
| 153 | 150 | } |
| 154 | 151 | |
| 155 | −static int xgene_gpio_resume(struct device *dev) | |
| 152 | +static __maybe_unused int xgene_gpio_resume(struct device *dev) | |
| 156 | 153 | { |
| 157 | 154 | struct xgene_gpio *gpio = dev_get_drvdata(dev); |
| 158 | 155 | unsigned long bank_offset; |
| @@ -166,10 +163,6 @@ static int xgene_gpio_resume(struct device *dev) · 7 unmodified lines | ||
| 166 | 163 | } |
| 167 | 164 | |
| 168 | 165 | static SIMPLE_DEV_PM_OPS(xgene_gpio_pm, xgene_gpio_suspend, xgene_gpio_resume); |
| 169 | −#define XGENE_GPIO_PM_OPS (&xgene_gpio_pm) | |
| 170 | −#else | |
| 171 | −#define XGENE_GPIO_PM_OPS NULL | |
| 172 | −#endif | |
| 173 | 166 | |
| 174 | 167 | static int xgene_gpio_probe(struct platform_device *pdev) |
| 175 | 168 | { |
| @@ -241,7 +234,7 @@ static struct platform_driver xgene_gpio_driver = { · 65 unmodified lines | ||
| 241 | 234 | .name = "xgene-gpio", |
| 242 | 235 | .of_match_table = xgene_gpio_of_match, |
| 243 | 236 | .acpi_match_table = ACPI_PTR(xgene_gpio_acpi_match), |
| 244 | − .pm = XGENE_GPIO_PM_OPS, | |
| 237 | + .pm = &xgene_gpio_pm, | |
| 245 | 238 | }, |
| 246 | 239 | .probe = xgene_gpio_probe, |
| 247 | 240 | }; |
| @@ -3,6 +3,4 @@ · 2 unmodified lines | ||
| 3 | 3 | # of AMDSOC/AMDGPU drm driver. |
| 4 | 4 | # It provides the HW control for ACP related functionalities. |
| 5 | 5 | |
| 6 | −subdir-ccflags-y += -I$(AMDACPPATH)/ -I$(AMDACPPATH)/include | |
| 7 | − | |
| 8 | 6 | AMD_ACP_FILES := $(AMDACPPATH)/acp_hw.o |
| @@ -240,6 +240,8 @@ free_partial_kdata: · 239 unmodified lines | ||
| 240 | 240 | for (; i >= 0; i--) |
| 241 | 241 | drm_free_large(p->chunks[i].kdata); |
| 242 | 242 | kfree(p->chunks); |
| 243 | + p->chunks = NULL; | |
| 244 | + p->nchunks = 0; | |
| 243 | 245 | put_ctx: |
| 244 | 246 | amdgpu_ctx_put(p->ctx); |
| 245 | 247 | free_chunk: |
| @@ -475,7 +475,7 @@ static int amdgpu_wb_init(struct amdgpu_device *adev) · 474 unmodified lines | ||
| 475 | 475 | int r; |
| 476 | 476 | |
| 477 | 477 | if (adev->wb.wb_obj == NULL) { |
| 478 | − r = amdgpu_bo_create_kernel(adev, AMDGPU_MAX_WB * 4, | |
| 478 | + r = amdgpu_bo_create_kernel(adev, AMDGPU_MAX_WB * sizeof(uint32_t), | |
| 479 | 479 | PAGE_SIZE, AMDGPU_GEM_DOMAIN_GTT, |
| 480 | 480 | &adev->wb.wb_obj, &adev->wb.gpu_addr, |
| 481 | 481 | (void **)&adev->wb.wb); |
| @@ -488,7 +488,7 @@ static int amdgpu_wb_init(struct amdgpu_device *adev) · 6 unmodified lines | ||
| 488 | 488 | memset(&adev->wb.used, 0, sizeof(adev->wb.used)); |
| 489 | 489 | |
| 490 | 490 | /* clear wb memory */ |
| 491 | − memset((char *)adev->wb.wb, 0, AMDGPU_GPU_PAGE_SIZE); | |
| 491 | + memset((char *)adev->wb.wb, 0, AMDGPU_MAX_WB * sizeof(uint32_t)); | |
| 492 | 492 | } |
| 493 | 493 | |
| 494 | 494 | return 0; |
| @@ -2590,7 +2590,7 @@ static ssize_t amdgpu_debugfs_regs_read(struct file *f, char __user *buf, · 2095 unmodified lines | ||
| 2590 | 2590 | use_bank = 0; |
| 2591 | 2591 | } |
| 2592 | 2592 | |
| 2593 | − *pos &= 0x3FFFF; | |
| 2593 | + *pos &= (1UL << 22) - 1; | |
| 2594 | 2594 | |
| 2595 | 2595 | if (use_bank) { |
| 2596 | 2596 | if ((sh_bank != 0xFFFFFFFF && sh_bank >= adev->gfx.config.max_sh_per_se) || |
| @@ -2666,7 +2666,7 @@ static ssize_t amdgpu_debugfs_regs_write(struct file *f, const char __user *buf, · 69 unmodified lines | ||
| 2666 | 2666 | use_bank = 0; |
| 2667 | 2667 | } |
| 2668 | 2668 | |
| 2669 | − *pos &= 0x3FFFF; | |
| 2669 | + *pos &= (1UL << 22) - 1; | |
| 2670 | 2670 | |
| 2671 | 2671 | if (use_bank) { |
| 2672 | 2672 | if ((sh_bank != 0xFFFFFFFF && sh_bank >= adev->gfx.config.max_sh_per_se) || |
| @@ -421,6 +421,7 @@ static const struct pci_device_id pciidlist[] = { · 420 unmodified lines | ||
| 421 | 421 | {0x1002, 0x6985, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_POLARIS12}, |
| 422 | 422 | {0x1002, 0x6986, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_POLARIS12}, |
| 423 | 423 | {0x1002, 0x6987, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_POLARIS12}, |
| 424 | + {0x1002, 0x6995, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_POLARIS12}, | |
| 424 | 425 | {0x1002, 0x699F, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_POLARIS12}, |
| 425 | 426 | |
| 426 | 427 | {0, 0, 0} |
| @@ -3464,6 +3464,16 @@ static void si_apply_state_adjust_rules(struct amdgpu_device *adev, · 3463 unmodified lines | ||
| 3464 | 3464 | (adev->pdev->device == 0x6667)) { |
| 3465 | 3465 | max_sclk = 75000; |
| 3466 | 3466 | } |
| 3467 | + } else if (adev->asic_type == CHIP_OLAND) { | |
| 3468 | + if ((adev->pdev->revision == 0xC7) || | |
| 3469 | + (adev->pdev->revision == 0x80) || | |
| 3470 | + (adev->pdev->revision == 0x81) || | |
| 3471 | + (adev->pdev->revision == 0x83) || | |
| 3472 | + (adev->pdev->revision == 0x87) || | |
| 3473 | + (adev->pdev->device == 0x6604) || | |
| 3474 | + (adev->pdev->device == 0x6605)) { | |
| 3475 | + max_sclk = 75000; | |
| 3476 | + } | |
| 3467 | 3477 | } |
| 3468 | 3478 | |
| 3469 | 3479 | if (rps->vce_active) { |
| @@ -1051,7 +1051,7 @@ static int vi_common_early_init(void *handle) · 1050 unmodified lines | ||
| 1051 | 1051 | /* rev0 hardware requires workarounds to support PG */ |
| 1052 | 1052 | adev->pg_flags = 0; |
| 1053 | 1053 | if (adev->rev_id != 0x00) { |
| 1054 | − adev->pg_flags |= AMD_PG_SUPPORT_GFX_PG | | |
| 1054 | + adev->pg_flags |= | |
| 1055 | 1055 | AMD_PG_SUPPORT_GFX_SMG | |
| 1056 | 1056 | AMD_PG_SUPPORT_GFX_PIPELINE | |
| 1057 | 1057 | AMD_PG_SUPPORT_CP | |
| @@ -178,7 +178,7 @@ int smu7_powergate_vce(struct pp_hwmgr *hwmgr, bool bgate) · 177 unmodified lines | ||
| 178 | 178 | if (bgate) { |
| 179 | 179 | cgs_set_powergating_state(hwmgr->device, |
| 180 | 180 | AMD_IP_BLOCK_TYPE_VCE, |
| 181 | − AMD_PG_STATE_UNGATE); | |
| 181 | + AMD_PG_STATE_GATE); | |
| 182 | 182 | cgs_set_clockgating_state(hwmgr->device, |
| 183 | 183 | AMD_IP_BLOCK_TYPE_VCE, |
| 184 | 184 | AMD_CG_STATE_GATE); |
| @@ -63,8 +63,7 @@ static void malidp_crtc_enable(struct drm_crtc *crtc) · 62 unmodified lines | ||
| 63 | 63 | |
| 64 | 64 | clk_prepare_enable(hwdev->pxlclk); |
| 65 | 65 | |
| 66 | − /* mclk needs to be set to the same or higher rate than pxlclk */ | |
| 67 | − clk_set_rate(hwdev->mclk, crtc->state->adjusted_mode.crtc_clock * 1000); | |
| 66 | + /* We rely on firmware to set mclk to a sensible level. */ | |
| 68 | 67 | clk_set_rate(hwdev->pxlclk, crtc->state->adjusted_mode.crtc_clock * 1000); |
| 69 | 68 | |
| 70 | 69 | hwdev->modeset(hwdev, &vm); |
| @@ -83,7 +83,7 @@ static const struct malidp_layer malidp550_layers[] = { · 82 unmodified lines | ||
| 83 | 83 | { DE_VIDEO1, MALIDP550_DE_LV1_BASE, MALIDP550_DE_LV1_PTR_BASE, MALIDP_DE_LV_STRIDE0 }, |
| 84 | 84 | { DE_GRAPHICS1, MALIDP550_DE_LG_BASE, MALIDP550_DE_LG_PTR_BASE, MALIDP_DE_LG_STRIDE }, |
| 85 | 85 | { DE_VIDEO2, MALIDP550_DE_LV2_BASE, MALIDP550_DE_LV2_PTR_BASE, MALIDP_DE_LV_STRIDE0 }, |
| 86 | − { DE_SMART, MALIDP550_DE_LS_BASE, MALIDP550_DE_LS_PTR_BASE, 0 }, | |
| 86 | + { DE_SMART, MALIDP550_DE_LS_BASE, MALIDP550_DE_LS_PTR_BASE, MALIDP550_DE_LS_R1_STRIDE }, | |
| 87 | 87 | }; |
| 88 | 88 | |
| 89 | 89 | #define MALIDP_DE_DEFAULT_PREFETCH_START 5 |
| @@ -37,6 +37,8 @@ · 36 unmodified lines | ||
| 37 | 37 | #define LAYER_V_VAL(x) (((x) & 0x1fff) << 16) |
| 38 | 38 | #define MALIDP_LAYER_COMP_SIZE 0x010 |
| 39 | 39 | #define MALIDP_LAYER_OFFSET 0x014 |
| 40 | +#define MALIDP550_LS_ENABLE 0x01c | |
| 41 | +#define MALIDP550_LS_R1_IN_SIZE 0x020 | |
| 40 | 42 | |
| 41 | 43 | /* |
| 42 | 44 | * This 4-entry look-up-table is used to determine the full 8-bit alpha value |
| @@ -242,6 +244,11 @@ static void malidp_de_plane_update(struct drm_plane *plane, · 199 unmodified lines | ||
| 242 | 244 | LAYER_V_VAL(plane->state->crtc_y), |
| 243 | 245 | mp->layer->base + MALIDP_LAYER_OFFSET); |
| 244 | 246 | |
| 247 | + if (mp->layer->id == DE_SMART) | |
| 248 | + malidp_hw_write(mp->hwdev, | |
| 249 | + LAYER_H_VAL(src_w) | LAYER_V_VAL(src_h), | |
| 250 | + mp->layer->base + MALIDP550_LS_R1_IN_SIZE); | |
| 251 | + | |
| 245 | 252 | /* first clear the rotation bits */ |
| 246 | 253 | val = malidp_hw_read(mp->hwdev, mp->layer->base + MALIDP_LAYER_CONTROL); |
| 247 | 254 | val &= ~LAYER_ROT_MASK; |
| @@ -330,9 +337,16 @@ int malidp_de_planes_init(struct drm_device *drm) · 82 unmodified lines | ||
| 330 | 337 | plane->hwdev = malidp->dev; |
| 331 | 338 | plane->layer = &map->layers[i]; |
| 332 | 339 | |
| 333 | − /* Skip the features which the SMART layer doesn't have */ | |
| 334 | − if (id == DE_SMART) | |
| 340 | + if (id == DE_SMART) { | |
| 341 | + /* | |
| 342 | + * Enable the first rectangle in the SMART layer to be | |
| 343 | + * able to use it as a drm plane. | |
| 344 | + */ | |
| 345 | + malidp_hw_write(malidp->dev, 1, | |
| 346 | + plane->layer->base + MALIDP550_LS_ENABLE); | |
| 347 | + /* Skip the features which the SMART layer doesn't have. */ | |
| 335 | 348 | continue; |
| 349 | + } | |
| 336 | 350 | |
| 337 | 351 | drm_plane_create_rotation_property(&plane->base, DRM_ROTATE_0, flags); |
| 338 | 352 | malidp_hw_write(malidp->dev, MALIDP_ALPHA_LUT, |
| @@ -84,6 +84,7 @@ · 83 unmodified lines | ||
| 84 | 84 | /* Stride register offsets relative to Lx_BASE */ |
| 85 | 85 | #define MALIDP_DE_LG_STRIDE 0x18 |
| 86 | 86 | #define MALIDP_DE_LV_STRIDE0 0x18 |
| 87 | +#define MALIDP550_DE_LS_R1_STRIDE 0x28 | |
| 87 | 88 | |
| 88 | 89 | /* macros to set values into registers */ |
| 89 | 90 | #define MALIDP_DE_H_FRONTPORCH(x) (((x) & 0xfff) << 0) |
| @@ -1260,9 +1260,9 @@ int drm_fb_helper_check_var(struct fb_var_screeninfo *var, · 1259 unmodified lines | ||
| 1260 | 1260 | * to KMS, hence fail if different settings are requested. |
| 1261 | 1261 | */ |
| 1262 | 1262 | if (var->bits_per_pixel != fb->format->cpp[0] * 8 || |
| 1263 | − var->xres != fb->width || var->yres != fb->height || | |
| 1264 | − var->xres_virtual != fb->width || var->yres_virtual != fb->height) { | |
| 1265 | − DRM_DEBUG("fb userspace requested width/height/bpp different than current fb " | |
| 1263 | + var->xres > fb->width || var->yres > fb->height || | |
| 1264 | + var->xres_virtual > fb->width || var->yres_virtual > fb->height) { | |
| 1265 | + DRM_DEBUG("fb requested width/height/bpp can't fit in current fb " | |
| 1266 | 1266 | "request %dx%d-%d (virtual %dx%d) > %dx%d-%d\n", |
| 1267 | 1267 | var->xres, var->yres, var->bits_per_pixel, |
| 1268 | 1268 | var->xres_virtual, var->yres_virtual, |
| @@ -68,6 +68,8 @@ struct decon_context { · 67 unmodified lines | ||
| 68 | 68 | unsigned long flags; |
| 69 | 69 | unsigned long out_type; |
| 70 | 70 | int first_win; |
| 71 | + spinlock_t vblank_lock; | |
| 72 | + u32 frame_id; | |
| 71 | 73 | }; |
| 72 | 74 | |
| 73 | 75 | static const uint32_t decon_formats[] = { |
| @@ -103,7 +105,7 @@ static int decon_enable_vblank(struct exynos_drm_crtc *crtc) · 29 unmodified lines | ||
| 103 | 105 | if (ctx->out_type & IFTYPE_I80) |
| 104 | 106 | val |= VIDINTCON0_FRAMEDONE; |
| 105 | 107 | else |
| 106 | − val |= VIDINTCON0_INTFRMEN; | |
| 108 | + val |= VIDINTCON0_INTFRMEN | VIDINTCON0_FRAMESEL_FP; | |
| 107 | 109 | |
| 108 | 110 | writel(val, ctx->addr + DECON_VIDINTCON0); |
| 109 | 111 | } |
| @@ -122,14 +124,56 @@ static void decon_disable_vblank(struct exynos_drm_crtc *crtc) · 12 unmodified lines | ||
| 122 | 124 | writel(0, ctx->addr + DECON_VIDINTCON0); |
| 123 | 125 | } |
| 124 | 126 | |
| 127 | +/* return number of starts/ends of frame transmissions since reset */ | |
| 128 | +static u32 decon_get_frame_count(struct decon_context *ctx, bool end) | |
| 129 | +{ | |
| 130 | + u32 frm, pfrm, status, cnt = 2; | |
| 131 | + | |
| 132 | + /* To get consistent result repeat read until frame id is stable. | |
| 133 | + * Usually the loop will be executed once, in rare cases when the loop | |
| 134 | + * is executed at frame change time 2nd pass will be needed. | |
| 135 | + */ | |
| 136 | + frm = readl(ctx->addr + DECON_CRFMID); | |
| 137 | + do { | |
| 138 | + status = readl(ctx->addr + DECON_VIDCON1); | |
| 139 | + pfrm = frm; | |
| 140 | + frm = readl(ctx->addr + DECON_CRFMID); | |
| 141 | + } while (frm != pfrm && --cnt); | |
| 142 | + | |
| 143 | + /* CRFMID is incremented on BPORCH in case of I80 and on VSYNC in case | |
| 144 | + * of RGB, it should be taken into account. | |
| 145 | + */ | |
| 146 | + if (!frm) | |
| 147 | + return 0; | |
| 148 | + | |
| 149 | + switch (status & (VIDCON1_VSTATUS_MASK | VIDCON1_I80_ACTIVE)) { | |
| 150 | + case VIDCON1_VSTATUS_VS: | |
| 151 | + if (!(ctx->out_type & IFTYPE_I80)) | |
| 152 | + --frm; | |
| 153 | + break; | |
| 154 | + case VIDCON1_VSTATUS_BP: | |
| 155 | + --frm; | |
| 156 | + break; | |
| 157 | + case VIDCON1_I80_ACTIVE: | |
| 158 | + case VIDCON1_VSTATUS_AC: | |
| 159 | + if (end) | |
| 160 | + --frm; | |
| 161 | + break; | |
| 162 | + default: | |
| 163 | + break; | |
| 164 | + } | |
| 165 | + | |
| 166 | + return frm; | |
| 167 | +} | |
| 168 | + | |
| 125 | 169 | static void decon_setup_trigger(struct decon_context *ctx) |
| 126 | 170 | { |
| 127 | 171 | if (!(ctx->out_type & (IFTYPE_I80 | I80_HW_TRG))) |
| 128 | 172 | return; |
| 129 | 173 | |
| 130 | 174 | if (!(ctx->out_type & I80_HW_TRG)) { |
| 131 | − writel(TRIGCON_TE_AUTO_MASK | TRIGCON_SWTRIGEN | |
| 132 | − | TRIGCON_TE_AUTO_MASK | TRIGCON_SWTRIGEN, | |
| 175 | + writel(TRIGCON_TRIGEN_PER_F | TRIGCON_TRIGEN_F | | |
| 176 | + TRIGCON_TE_AUTO_MASK | TRIGCON_SWTRIGEN, | |
| 133 | 177 | ctx->addr + DECON_TRIGCON); |
| 134 | 178 | return; |
| 135 | 179 | } |
| @@ -365,11 +409,14 @@ static void decon_disable_plane(struct exynos_drm_crtc *crtc, · 229 unmodified lines | ||
| 365 | 409 | static void decon_atomic_flush(struct exynos_drm_crtc *crtc) |
| 366 | 410 | { |
| 367 | 411 | struct decon_context *ctx = crtc->ctx; |
| 412 | + unsigned long flags; | |
| 368 | 413 | int i; |
| 369 | 414 | |
| 370 | 415 | if (test_bit(BIT_SUSPENDED, &ctx->flags)) |
| 371 | 416 | return; |
| 372 | 417 | |
| 418 | + spin_lock_irqsave(&ctx->vblank_lock, flags); | |
| 419 | + | |
| 373 | 420 | for (i = ctx->first_win; i < WINDOWS_NR; i++) |
| 374 | 421 | decon_shadow_protect_win(ctx, i, false); |
| 375 | 422 | |
| @@ -378,11 +425,18 @@ static void decon_atomic_flush(struct exynos_drm_crtc *crtc) · 2 unmodified lines | ||
| 378 | 425 | |
| 379 | 426 | if (ctx->out_type & IFTYPE_I80) |
| 380 | 427 | set_bit(BIT_WIN_UPDATED, &ctx->flags); |
| 428 | + | |
| 429 | + ctx->frame_id = decon_get_frame_count(ctx, true); | |
| 430 | + | |
| 431 | + exynos_crtc_handle_event(crtc); | |
| 432 | + | |
| 433 | + spin_unlock_irqrestore(&ctx->vblank_lock, flags); | |
| 381 | 434 | } |
| 382 | 435 | |
| 383 | 436 | static void decon_swreset(struct decon_context *ctx) |
| 384 | 437 | { |
| 385 | 438 | unsigned int tries; |
| 439 | + unsigned long flags; | |
| 386 | 440 | |
| 387 | 441 | writel(0, ctx->addr + DECON_VIDCON0); |
| 388 | 442 | for (tries = 2000; tries; --tries) { |
| @@ -400,6 +454,10 @@ static void decon_swreset(struct decon_context *ctx) · 11 unmodified lines | ||
| 400 | 454 | |
| 401 | 455 | WARN(tries == 0, "failed to software reset DECON\n"); |
| 402 | 456 | |
| 457 | + spin_lock_irqsave(&ctx->vblank_lock, flags); | |
| 458 | + ctx->frame_id = 0; | |
| 459 | + spin_unlock_irqrestore(&ctx->vblank_lock, flags); | |
| 460 | + | |
| 403 | 461 | if (!(ctx->out_type & IFTYPE_HDMI)) |
| 404 | 462 | return; |
| 405 | 463 | |
| @@ -578,6 +636,24 @@ static const struct component_ops decon_component_ops = { · 172 unmodified lines | ||
| 578 | 636 | .unbind = decon_unbind, |
| 579 | 637 | }; |
| 580 | 638 | |
| 639 | +static void decon_handle_vblank(struct decon_context *ctx) | |
| 640 | +{ | |
| 641 | + u32 frm; | |
| 642 | + | |
| 643 | + spin_lock(&ctx->vblank_lock); | |
| 644 | + | |
| 645 | + frm = decon_get_frame_count(ctx, true); | |
| 646 | + | |
| 647 | + if (frm != ctx->frame_id) { | |
| 648 | + /* handle only if incremented, take care of wrap-around */ | |
| 649 | + if ((s32)(frm - ctx->frame_id) > 0) | |
| 650 | + drm_crtc_handle_vblank(&ctx->crtc->base); | |
| 651 | + ctx->frame_id = frm; | |
| 652 | + } | |
| 653 | + | |
| 654 | + spin_unlock(&ctx->vblank_lock); | |
| 655 | +} | |
| 656 | + | |
| 581 | 657 | static irqreturn_t decon_irq_handler(int irq, void *dev_id) |
| 582 | 658 | { |
| 583 | 659 | struct decon_context *ctx = dev_id; |
| @@ -598,7 +674,7 @@ static irqreturn_t decon_irq_handler(int irq, void *dev_id) · 14 unmodified lines | ||
| 598 | 674 | (VIDOUT_INTERLACE_EN_F | VIDOUT_INTERLACE_FIELD_F)) |
| 599 | 675 | return IRQ_HANDLED; |
| 600 | 676 | } |
| 601 | − drm_crtc_handle_vblank(&ctx->crtc->base); | |
| 677 | + decon_handle_vblank(ctx); | |
| 602 | 678 | } |
| 603 | 679 | |
| 604 | 680 | out: |
| @@ -671,6 +747,7 @@ static int exynos5433_decon_probe(struct platform_device *pdev) · 66 unmodified lines | ||
| 671 | 747 | __set_bit(BIT_SUSPENDED, &ctx->flags); |
| 672 | 748 | ctx->dev = dev; |
| 673 | 749 | ctx->out_type = (unsigned long)of_device_get_match_data(dev); |
| 750 | + spin_lock_init(&ctx->vblank_lock); | |
| 674 | 751 | |
| 675 | 752 | if (ctx->out_type & IFTYPE_HDMI) { |
| 676 | 753 | ctx->first_win = 1; |
| @@ -678,7 +755,7 @@ static int exynos5433_decon_probe(struct platform_device *pdev) · 1 unmodified line | ||
| 678 | 755 | ctx->out_type |= IFTYPE_I80; |
| 679 | 756 | } |
| 680 | 757 | |
| 681 | − if (ctx->out_type | I80_HW_TRG) { | |
| 758 | + if (ctx->out_type & I80_HW_TRG) { | |
| 682 | 759 | ctx->sysreg = syscon_regmap_lookup_by_phandle(dev->of_node, |
| 683 | 760 | "samsung,disp-sysreg"); |
| 684 | 761 | if (IS_ERR(ctx->sysreg)) { |
| @@ -526,6 +526,7 @@ static void decon_atomic_flush(struct exynos_drm_crtc *crtc) · 525 unmodified lines | ||
| 526 | 526 | |
| 527 | 527 | for (i = 0; i < WINDOWS_NR; i++) |
| 528 | 528 | decon_shadow_protect_win(ctx, i, false); |
| 529 | + exynos_crtc_handle_event(crtc); | |
| 529 | 530 | } |
| 530 | 531 | |
| 531 | 532 | static void decon_init(struct decon_context *ctx) |
| @@ -85,16 +85,28 @@ static void exynos_crtc_atomic_flush(struct drm_crtc *crtc, · 84 unmodified lines | ||
| 85 | 85 | struct drm_crtc_state *old_crtc_state) |
| 86 | 86 | { |
| 87 | 87 | struct exynos_drm_crtc *exynos_crtc = to_exynos_crtc(crtc); |
| 88 | − struct drm_pending_vblank_event *event; | |
| 89 | − unsigned long flags; | |
| 90 | 88 | |
| 91 | 89 | if (exynos_crtc->ops->atomic_flush) |
| 92 | 90 | exynos_crtc->ops->atomic_flush(exynos_crtc); |
| 91 | +} | |
| 92 | + | |
| 93 | +static const struct drm_crtc_helper_funcs exynos_crtc_helper_funcs = { | |
| 94 | + .enable = exynos_drm_crtc_enable, | |
| 95 | + .disable = exynos_drm_crtc_disable, | |
| 96 | + .mode_set_nofb = exynos_drm_crtc_mode_set_nofb, | |
| 97 | + .atomic_check = exynos_crtc_atomic_check, | |
| 98 | + .atomic_begin = exynos_crtc_atomic_begin, | |
| 99 | + .atomic_flush = exynos_crtc_atomic_flush, | |
| 100 | +}; | |
| 101 | + | |
| 102 | +void exynos_crtc_handle_event(struct exynos_drm_crtc *exynos_crtc) | |
| 103 | +{ | |
| 104 | + struct drm_crtc *crtc = &exynos_crtc->base; | |
| 105 | + struct drm_pending_vblank_event *event = crtc->state->event; | |
| 106 | + unsigned long flags; | |
| 93 | 107 | |
| 94 | − event = crtc->state->event; | |
| 95 | 108 | if (event) { |
| 96 | 109 | crtc->state->event = NULL; |
| 97 | − | |
| 98 | 110 | spin_lock_irqsave(&crtc->dev->event_lock, flags); |
| 99 | 111 | if (drm_crtc_vblank_get(crtc) == 0) |
| 100 | 112 | drm_crtc_arm_vblank_event(crtc, event); |
| @@ -105,15 +117,6 @@ static void exynos_crtc_atomic_flush(struct drm_crtc *crtc, · 4 unmodified lines | ||
| 105 | 117 | |
| 106 | 118 | } |
| 107 | 119 | |
| 108 | −static const struct drm_crtc_helper_funcs exynos_crtc_helper_funcs = { | |
| 109 | − .enable = exynos_drm_crtc_enable, | |
| 110 | − .disable = exynos_drm_crtc_disable, | |
| 111 | − .mode_set_nofb = exynos_drm_crtc_mode_set_nofb, | |
| 112 | − .atomic_check = exynos_crtc_atomic_check, | |
| 113 | − .atomic_begin = exynos_crtc_atomic_begin, | |
| 114 | − .atomic_flush = exynos_crtc_atomic_flush, | |
| 115 | −}; | |
| 116 | − | |
| 117 | 120 | static void exynos_drm_crtc_destroy(struct drm_crtc *crtc) |
| 118 | 121 | { |
| 119 | 122 | struct exynos_drm_crtc *exynos_crtc = to_exynos_crtc(crtc); |
| @@ -40,4 +40,6 @@ int exynos_drm_crtc_get_pipe_from_type(struct drm_device *drm_dev, · 39 unmodified lines | ||
| 40 | 40 | */ |
| 41 | 41 | void exynos_drm_crtc_te_handler(struct drm_crtc *crtc); |
| 42 | 42 | |
| 43 | +void exynos_crtc_handle_event(struct exynos_drm_crtc *exynos_crtc); | |
| 44 | + | |
| 43 | 45 | #endif |
| @@ -86,7 +86,7 @@ · 85 unmodified lines | ||
| 86 | 86 | #define DSIM_SYNC_INFORM (1 << 27) |
| 87 | 87 | #define DSIM_EOT_DISABLE (1 << 28) |
| 88 | 88 | #define DSIM_MFLUSH_VS (1 << 29) |
| 89 | −/* This flag is valid only for exynos3250/3472/4415/5260/5430 */ | |
| 89 | +/* This flag is valid only for exynos3250/3472/5260/5430 */ | |
| 90 | 90 | #define DSIM_CLKLANE_STOP (1 << 30) |
| 91 | 91 | |
| 92 | 92 | /* DSIM_ESCMODE */ |
| @@ -473,17 +473,6 @@ static const struct exynos_dsi_driver_data exynos4_dsi_driver_data = { · 380 unmodified lines | ||
| 473 | 473 | .reg_values = reg_values, |
| 474 | 474 | }; |
| 475 | 475 | |
| 476 | −static const struct exynos_dsi_driver_data exynos4415_dsi_driver_data = { | |
| 477 | − .reg_ofs = exynos_reg_ofs, | |
| 478 | − .plltmr_reg = 0x58, | |
| 479 | − .has_clklane_stop = 1, | |
| 480 | − .num_clks = 2, | |
| 481 | − .max_freq = 1000, | |
| 482 | − .wait_for_reset = 1, | |
| 483 | − .num_bits_resol = 11, | |
| 484 | − .reg_values = reg_values, | |
| 485 | −}; | |
| 486 | − | |
| 487 | 476 | static const struct exynos_dsi_driver_data exynos5_dsi_driver_data = { |
| 488 | 477 | .reg_ofs = exynos_reg_ofs, |
| 489 | 478 | .plltmr_reg = 0x58, |
| @@ -521,8 +510,6 @@ static const struct of_device_id exynos_dsi_of_match[] = { · 31 unmodified lines | ||
| 521 | 510 | .data = &exynos3_dsi_driver_data }, |
| 522 | 511 | { .compatible = "samsung,exynos4210-mipi-dsi", |
| 523 | 512 | .data = &exynos4_dsi_driver_data }, |
| 524 | − { .compatible = "samsung,exynos4415-mipi-dsi", | |
| 525 | − .data = &exynos4415_dsi_driver_data }, | |
| 526 | 513 | { .compatible = "samsung,exynos5410-mipi-dsi", |
| 527 | 514 | .data = &exynos5_dsi_driver_data }, |
| 528 | 515 | { .compatible = "samsung,exynos5422-mipi-dsi", |
| @@ -979,7 +966,7 @@ static void exynos_dsi_send_to_fifo(struct exynos_dsi *dsi, · 450 unmodified lines | ||
| 979 | 966 | bool first = !xfer->tx_done; |
| 980 | 967 | u32 reg; |
| 981 | 968 | |
| 982 | − dev_dbg(dev, "< xfer %p: tx len %u, done %u, rx len %u, done %u\n", | |
| 969 | + dev_dbg(dev, "< xfer %pK: tx len %u, done %u, rx len %u, done %u\n", | |
| 983 | 970 | xfer, length, xfer->tx_done, xfer->rx_len, xfer->rx_done); |
| 984 | 971 | |
| 985 | 972 | if (length > DSI_TX_FIFO_SIZE) |
| @@ -1177,7 +1164,7 @@ static bool exynos_dsi_transfer_finish(struct exynos_dsi *dsi) · 191 unmodified lines | ||
| 1177 | 1164 | spin_unlock_irqrestore(&dsi->transfer_lock, flags); |
| 1178 | 1165 | |
| 1179 | 1166 | dev_dbg(dsi->dev, |
| 1180 | − "> xfer %p, tx_len %zu, tx_done %u, rx_len %u, rx_done %u\n", | |
| 1167 | + "> xfer %pK, tx_len %zu, tx_done %u, rx_len %u, rx_done %u\n", | |
| 1181 | 1168 | xfer, xfer->packet.payload_length, xfer->tx_done, xfer->rx_len, |
| 1182 | 1169 | xfer->rx_done); |
| 1183 | 1170 | |
| @@ -1348,9 +1335,12 @@ static int exynos_dsi_register_te_irq(struct exynos_dsi *dsi) · 164 unmodified lines | ||
| 1348 | 1335 | int te_gpio_irq; |
| 1349 | 1336 | |
| 1350 | 1337 | dsi->te_gpio = of_get_named_gpio(dsi->panel_node, "te-gpios", 0); |
| 1338 | + if (dsi->te_gpio == -ENOENT) | |
| 1339 | + return 0; | |
| 1340 | + | |
| 1351 | 1341 | if (!gpio_is_valid(dsi->te_gpio)) { |
| 1352 | − dev_err(dsi->dev, "no te-gpios specified\n"); | |
| 1353 | 1342 | ret = dsi->te_gpio; |
| 1343 | + dev_err(dsi->dev, "cannot get te-gpios, %d\n", ret); | |
| 1354 | 1344 | goto out; |
| 1355 | 1345 | } |
| 1356 | 1346 | |
| @@ -1695,7 +1695,7 @@ static int fimc_probe(struct platform_device *pdev) · 1694 unmodified lines | ||
| 1695 | 1695 | goto err_put_clk; |
| 1696 | 1696 | } |
| 1697 | 1697 | |
| 1698 | − DRM_DEBUG_KMS("id[%d]ippdrv[%p]\n", ctx->id, ippdrv); | |
| 1698 | + DRM_DEBUG_KMS("id[%d]ippdrv[%pK]\n", ctx->id, ippdrv); | |
| 1699 | 1699 | |
| 1700 | 1700 | spin_lock_init(&ctx->lock); |
| 1701 | 1701 | platform_set_drvdata(pdev, ctx); |
| @@ -71,10 +71,10 @@ · 70 unmodified lines | ||
| 71 | 71 | #define TRIGCON 0x1A4 |
| 72 | 72 | #define TRGMODE_ENABLE (1 << 0) |
| 73 | 73 | #define SWTRGCMD_ENABLE (1 << 1) |
| 74 | −/* Exynos3250, 3472, 4415, 5260 5410, 5420 and 5422 only supported. */ | |
| 74 | +/* Exynos3250, 3472, 5260 5410, 5420 and 5422 only supported. */ | |
| 75 | 75 | #define HWTRGEN_ENABLE (1 << 3) |
| 76 | 76 | #define HWTRGMASK_ENABLE (1 << 4) |
| 77 | −/* Exynos3250, 3472, 4415, 5260, 5420 and 5422 only supported. */ | |
| 77 | +/* Exynos3250, 3472, 5260, 5420 and 5422 only supported. */ | |
| 78 | 78 | #define HWTRIGEN_PER_ENABLE (1 << 31) |
| 79 | 79 | |
| 80 | 80 | /* display mode change control register except exynos4 */ |
| @@ -138,18 +138,6 @@ static struct fimd_driver_data exynos4_fimd_driver_data = { · 57 unmodified lines | ||
| 138 | 138 | .has_vtsel = 1, |
| 139 | 139 | }; |
| 140 | 140 | |
| 141 | −static struct fimd_driver_data exynos4415_fimd_driver_data = { | |
| 142 | − .timing_base = 0x20000, | |
| 143 | − .lcdblk_offset = 0x210, | |
| 144 | − .lcdblk_vt_shift = 10, | |
| 145 | − .lcdblk_bypass_shift = 1, | |
| 146 | − .trg_type = I80_HW_TRG, | |
| 147 | − .has_shadowcon = 1, | |
| 148 | − .has_vidoutcon = 1, | |
| 149 | − .has_vtsel = 1, | |
| 150 | − .has_trigger_per_te = 1, | |
| 151 | −}; | |
| 152 | − | |
| 153 | 141 | static struct fimd_driver_data exynos5_fimd_driver_data = { |
| 154 | 142 | .timing_base = 0x20000, |
| 155 | 143 | .lcdblk_offset = 0x214, |
| @@ -210,8 +198,6 @@ static const struct of_device_id fimd_driver_dt_match[] = { · 54 unmodified lines | ||
| 210 | 198 | .data = &exynos3_fimd_driver_data }, |
| 211 | 199 | { .compatible = "samsung,exynos4210-fimd", |
| 212 | 200 | .data = &exynos4_fimd_driver_data }, |
| 213 | − { .compatible = "samsung,exynos4415-fimd", | |
| 214 | − .data = &exynos4415_fimd_driver_data }, | |
| 215 | 201 | { .compatible = "samsung,exynos5250-fimd", |
| 216 | 202 | .data = &exynos5_fimd_driver_data }, |
| 217 | 203 | { .compatible = "samsung,exynos5420-fimd", |
| @@ -257,7 +243,7 @@ static int fimd_enable_vblank(struct exynos_drm_crtc *crtc) · 39 unmodified lines | ||
| 257 | 243 | val |= VIDINTCON0_INT_FRAME; |
| 258 | 244 | |
| 259 | 245 | val &= ~VIDINTCON0_FRAMESEL0_MASK; |
| 260 | − val |= VIDINTCON0_FRAMESEL0_VSYNC; | |
| 246 | + val |= VIDINTCON0_FRAMESEL0_FRONTPORCH; | |
| 261 | 247 | val &= ~VIDINTCON0_FRAMESEL1_MASK; |
| 262 | 248 | val |= VIDINTCON0_FRAMESEL1_NONE; |
| 263 | 249 | } |
| @@ -723,6 +709,8 @@ static void fimd_atomic_flush(struct exynos_drm_crtc *crtc) · 459 unmodified lines | ||
| 723 | 709 | |
| 724 | 710 | for (i = 0; i < WINDOWS_NR; i++) |
| 725 | 711 | fimd_shadow_protect_win(ctx, i, false); |
| 712 | + | |
| 713 | + exynos_crtc_handle_event(crtc); | |
| 726 | 714 | } |
| 727 | 715 | |
| 728 | 716 | static void fimd_update_plane(struct exynos_drm_crtc *crtc, |
| @@ -218,7 +218,7 @@ static struct exynos_drm_gem *exynos_drm_gem_init(struct drm_device *dev, · 217 unmodified lines | ||
| 218 | 218 | return ERR_PTR(ret); |
| 219 | 219 | } |
| 220 | 220 | |
| 221 | − DRM_DEBUG_KMS("created file object = %p\n", obj->filp); | |
| 221 | + DRM_DEBUG_KMS("created file object = %pK\n", obj->filp); | |
| 222 | 222 | |
| 223 | 223 | return exynos_gem; |
| 224 | 224 | } |
| @@ -1723,7 +1723,7 @@ static int gsc_probe(struct platform_device *pdev) · 1722 unmodified lines | ||
| 1723 | 1723 | return ret; |
| 1724 | 1724 | } |
| 1725 | 1725 | |
| 1726 | − DRM_DEBUG_KMS("id[%d]ippdrv[%p]\n", ctx->id, ippdrv); | |
| 1726 | + DRM_DEBUG_KMS("id[%d]ippdrv[%pK]\n", ctx->id, ippdrv); | |
| 1727 | 1727 | |
| 1728 | 1728 | mutex_init(&ctx->lock); |
| 1729 | 1729 | platform_set_drvdata(pdev, ctx); |
| @@ -208,7 +208,7 @@ static struct exynos_drm_ippdrv *ipp_find_drv_by_handle(u32 prop_id) · 207 unmodified lines | ||
| 208 | 208 | * e.g PAUSE state, queue buf, command control. |
| 209 | 209 | */ |
| 210 | 210 | list_for_each_entry(ippdrv, &exynos_drm_ippdrv_list, drv_list) { |
| 211 | − DRM_DEBUG_KMS("count[%d]ippdrv[%p]\n", count++, ippdrv); | |
| 211 | + DRM_DEBUG_KMS("count[%d]ippdrv[%pK]\n", count++, ippdrv); | |
| 212 | 212 | |
| 213 | 213 | mutex_lock(&ippdrv->cmd_lock); |
| 214 | 214 | list_for_each_entry(c_node, &ippdrv->cmd_list, list) { |
| @@ -388,7 +388,7 @@ int exynos_drm_ipp_set_property(struct drm_device *drm_dev, void *data, · 173 unmodified lines | ||
| 388 | 388 | } |
| 389 | 389 | property->prop_id = ret; |
| 390 | 390 | |
| 391 | − DRM_DEBUG_KMS("created prop_id[%d]cmd[%d]ippdrv[%p]\n", | |
| 391 | + DRM_DEBUG_KMS("created prop_id[%d]cmd[%d]ippdrv[%pK]\n", | |
| 392 | 392 | property->prop_id, property->cmd, ippdrv); |
| 393 | 393 | |
| 394 | 394 | /* stored property information and ippdrv in private data */ |
| @@ -518,7 +518,7 @@ static int ipp_put_mem_node(struct drm_device *drm_dev, · 123 unmodified lines | ||
| 518 | 518 | { |
| 519 | 519 | int i; |
| 520 | 520 | |
| 521 | − DRM_DEBUG_KMS("node[%p]\n", m_node); | |
| 521 | + DRM_DEBUG_KMS("node[%pK]\n", m_node); | |
| 522 | 522 | |
| 523 | 523 | if (!m_node) { |
| 524 | 524 | DRM_ERROR("invalid dequeue node.\n"); |
| @@ -562,7 +562,7 @@ static struct drm_exynos_ipp_mem_node · 37 unmodified lines | ||
| 562 | 562 | m_node->buf_id = qbuf->buf_id; |
| 563 | 563 | INIT_LIST_HEAD(&m_node->list); |
| 564 | 564 | |
| 565 | − DRM_DEBUG_KMS("m_node[%p]ops_id[%d]\n", m_node, qbuf->ops_id); | |
| 565 | + DRM_DEBUG_KMS("m_node[%pK]ops_id[%d]\n", m_node, qbuf->ops_id); | |
| 566 | 566 | DRM_DEBUG_KMS("prop_id[%d]buf_id[%d]\n", qbuf->prop_id, m_node->buf_id); |
| 567 | 567 | |
| 568 | 568 | for_each_ipp_planar(i) { |
| @@ -659,7 +659,7 @@ static void ipp_put_event(struct drm_exynos_ipp_cmd_node *c_node, · 90 unmodified lines | ||
| 659 | 659 | |
| 660 | 660 | mutex_lock(&c_node->event_lock); |
| 661 | 661 | list_for_each_entry_safe(e, te, &c_node->event_list, base.link) { |
| 662 | − DRM_DEBUG_KMS("count[%d]e[%p]\n", count++, e); | |
| 662 | + DRM_DEBUG_KMS("count[%d]e[%pK]\n", count++, e); | |
| 663 | 663 | |
| 664 | 664 | /* |
| 665 | 665 | * qbuf == NULL condition means all event deletion. |
| @@ -750,7 +750,7 @@ static struct drm_exynos_ipp_mem_node · 84 unmodified lines | ||
| 750 | 750 | |
| 751 | 751 | /* find memory node from memory list */ |
| 752 | 752 | list_for_each_entry(m_node, head, list) { |
| 753 | − DRM_DEBUG_KMS("count[%d]m_node[%p]\n", count++, m_node); | |
| 753 | + DRM_DEBUG_KMS("count[%d]m_node[%pK]\n", count++, m_node); | |
| 754 | 754 | |
| 755 | 755 | /* compare buffer id */ |
| 756 | 756 | if (m_node->buf_id == qbuf->buf_id) |
| @@ -767,7 +767,7 @@ static int ipp_set_mem_node(struct exynos_drm_ippdrv *ippdrv, · 10 unmodified lines | ||
| 767 | 767 | struct exynos_drm_ipp_ops *ops = NULL; |
| 768 | 768 | int ret = 0; |
| 769 | 769 | |
| 770 | − DRM_DEBUG_KMS("node[%p]\n", m_node); | |
| 770 | + DRM_DEBUG_KMS("node[%pK]\n", m_node); | |
| 771 | 771 | |
| 772 | 772 | if (!m_node) { |
| 773 | 773 | DRM_ERROR("invalid queue node.\n"); |
| @@ -1232,7 +1232,7 @@ static int ipp_start_property(struct exynos_drm_ippdrv *ippdrv, · 458 unmodified lines | ||
| 1232 | 1232 | m_node = list_first_entry(head, |
| 1233 | 1233 | struct drm_exynos_ipp_mem_node, list); |
| 1234 | 1234 | |
| 1235 | − DRM_DEBUG_KMS("m_node[%p]\n", m_node); | |
| 1235 | + DRM_DEBUG_KMS("m_node[%pK]\n", m_node); | |
| 1236 | 1236 | |
| 1237 | 1237 | ret = ipp_set_mem_node(ippdrv, c_node, m_node); |
| 1238 | 1238 | if (ret) { |
| @@ -1601,7 +1601,7 @@ static int ipp_subdrv_probe(struct drm_device *drm_dev, struct device *dev) · 362 unmodified lines | ||
| 1601 | 1601 | } |
| 1602 | 1602 | ippdrv->prop_list.ipp_id = ret; |
| 1603 | 1603 | |
| 1604 | − DRM_DEBUG_KMS("count[%d]ippdrv[%p]ipp_id[%d]\n", | |
| 1604 | + DRM_DEBUG_KMS("count[%d]ippdrv[%pK]ipp_id[%d]\n", | |
| 1605 | 1605 | count++, ippdrv, ret); |
| 1606 | 1606 | |
| 1607 | 1607 | /* store parent device for node */ |
| @@ -1659,7 +1659,7 @@ static int ipp_subdrv_open(struct drm_device *drm_dev, struct device *dev, · 51 unmodified lines | ||
| 1659 | 1659 | |
| 1660 | 1660 | file_priv->ipp_dev = dev; |
| 1661 | 1661 | |
| 1662 | − DRM_DEBUG_KMS("done priv[%p]\n", dev); | |
| 1662 | + DRM_DEBUG_KMS("done priv[%pK]\n", dev); | |
| 1663 | 1663 | |
| 1664 | 1664 | return 0; |
| 1665 | 1665 | } |
| @@ -1676,7 +1676,7 @@ static void ipp_subdrv_close(struct drm_device *drm_dev, struct device *dev, · 10 unmodified lines | ||
| 1676 | 1676 | mutex_lock(&ippdrv->cmd_lock); |
| 1677 | 1677 | list_for_each_entry_safe(c_node, tc_node, |
| 1678 | 1678 | &ippdrv->cmd_list, list) { |
| 1679 | − DRM_DEBUG_KMS("count[%d]ippdrv[%p]\n", | |
| 1679 | + DRM_DEBUG_KMS("count[%d]ippdrv[%pK]\n", | |
| 1680 | 1680 | count++, ippdrv); |
| 1681 | 1681 | |
| 1682 | 1682 | if (c_node->filp == file) { |
| @@ -748,7 +748,7 @@ static int rotator_probe(struct platform_device *pdev) · 747 unmodified lines | ||
| 748 | 748 | goto err_ippdrv_register; |
| 749 | 749 | } |
| 750 | 750 | |
| 751 | − DRM_DEBUG_KMS("ippdrv[%p]\n", ippdrv); | |
| 751 | + DRM_DEBUG_KMS("ippdrv[%pK]\n", ippdrv); | |
| 752 | 752 | |
| 753 | 753 | platform_set_drvdata(pdev, rot); |
| 754 | 754 | |
| @@ -170,6 +170,7 @@ static const struct exynos_drm_crtc_ops vidi_crtc_ops = { · 169 unmodified lines | ||
| 170 | 170 | .enable_vblank = vidi_enable_vblank, |
| 171 | 171 | .disable_vblank = vidi_disable_vblank, |
| 172 | 172 | .update_plane = vidi_update_plane, |
| 173 | + .atomic_flush = exynos_crtc_handle_event, | |
| 173 | 174 | }; |
| 174 | 175 | |
| 175 | 176 | static void vidi_fake_vblank_timer(unsigned long arg) |
| @@ -1012,6 +1012,7 @@ static void mixer_atomic_flush(struct exynos_drm_crtc *crtc) · 1011 unmodified lines | ||
| 1012 | 1012 | return; |
| 1013 | 1013 | |
| 1014 | 1014 | mixer_vsync_set_update(mixer_ctx, true); |
| 1015 | + exynos_crtc_handle_event(crtc); | |
| 1015 | 1016 | } |
| 1016 | 1017 | |
| 1017 | 1018 | static void mixer_enable(struct exynos_drm_crtc *crtc) |
| @@ -242,7 +242,7 @@ static int alloc_resource(struct intel_vgpu *vgpu, · 241 unmodified lines | ||
| 242 | 242 | const char *item; |
| 243 | 243 | |
| 244 | 244 | if (!param->low_gm_sz || !param->high_gm_sz || !param->fence_sz) { |
| 245 | − gvt_err("Invalid vGPU creation params\n"); | |
| 245 | + gvt_vgpu_err("Invalid vGPU creation params\n"); | |
| 246 | 246 | return -EINVAL; |
| 247 | 247 | } |
| 248 | 248 | |
| @@ -285,9 +285,9 @@ static int alloc_resource(struct intel_vgpu *vgpu, · 36 unmodified lines | ||
| 285 | 285 | return 0; |
| 286 | 286 | |
| 287 | 287 | no_enough_resource: |
| 288 | − gvt_err("vgpu%d: fail to allocate resource %s\n", vgpu->id, item); | |
| 289 | − gvt_err("vgpu%d: request %luMB avail %luMB max %luMB taken %luMB\n", | |
| 290 | − vgpu->id, BYTES_TO_MB(request), BYTES_TO_MB(avail), | |
| 288 | + gvt_vgpu_err("fail to allocate resource %s\n", item); | |
| 289 | + gvt_vgpu_err("request %luMB avail %luMB max %luMB taken %luMB\n", | |
| 290 | + BYTES_TO_MB(request), BYTES_TO_MB(avail), | |
| 291 | 291 | BYTES_TO_MB(max), BYTES_TO_MB(taken)); |
| 292 | 292 | return -ENOSPC; |
| 293 | 293 | } |
| @@ -817,6 +817,25 @@ static bool is_shadowed_mmio(unsigned int offset) · 816 unmodified lines | ||
| 817 | 817 | return ret; |
| 818 | 818 | } |
| 819 | 819 | |
| 820 | +static inline bool is_force_nonpriv_mmio(unsigned int offset) | |
| 821 | +{ | |
| 822 | + return (offset >= 0x24d0 && offset < 0x2500); | |
| 823 | +} | |
| 824 | + | |
| 825 | +static int force_nonpriv_reg_handler(struct parser_exec_state *s, | |
| 826 | + unsigned int offset, unsigned int index) | |
| 827 | +{ | |
| 828 | + struct intel_gvt *gvt = s->vgpu->gvt; | |
| 829 | + unsigned int data = cmd_val(s, index + 1); | |
| 830 | + | |
| 831 | + if (!intel_gvt_in_force_nonpriv_whitelist(gvt, data)) { | |
| 832 | + gvt_err("Unexpected forcenonpriv 0x%x LRI write, value=0x%x\n", | |
| 833 | + offset, data); | |
| 834 | + return -EINVAL; | |
| 835 | + } | |
| 836 | + return 0; | |
| 837 | +} | |
| 838 | + | |
| 820 | 839 | static int cmd_reg_handler(struct parser_exec_state *s, |
| 821 | 840 | unsigned int offset, unsigned int index, char *cmd) |
| 822 | 841 | { |
| @@ -824,23 +843,26 @@ static int cmd_reg_handler(struct parser_exec_state *s, · 1 unmodified line | ||
| 824 | 843 | struct intel_gvt *gvt = vgpu->gvt; |
| 825 | 844 | |
| 826 | 845 | if (offset + 4 > gvt->device_info.mmio_size) { |
| 827 | − gvt_err("%s access to (%x) outside of MMIO range\n", | |
| 846 | + gvt_vgpu_err("%s access to (%x) outside of MMIO range\n", | |
| 828 | 847 | cmd, offset); |
| 829 | 848 | return -EINVAL; |
| 830 | 849 | } |
| 831 | 850 | |
| 832 | 851 | if (!intel_gvt_mmio_is_cmd_access(gvt, offset)) { |
| 833 | − gvt_err("vgpu%d: %s access to non-render register (%x)\n", | |
| 834 | − s->vgpu->id, cmd, offset); | |
| 852 | + gvt_vgpu_err("%s access to non-render register (%x)\n", | |
| 853 | + cmd, offset); | |
| 835 | 854 | return 0; |
| 836 | 855 | } |
| 837 | 856 | |
| 838 | 857 | if (is_shadowed_mmio(offset)) { |
| 839 | − gvt_err("vgpu%d: found access of shadowed MMIO %x\n", | |
| 840 | − s->vgpu->id, offset); | |
| 858 | + gvt_vgpu_err("found access of shadowed MMIO %x\n", offset); | |
| 841 | 859 | return 0; |
| 842 | 860 | } |
| 843 | 861 | |
| 862 | + if (is_force_nonpriv_mmio(offset) && | |
| 863 | + force_nonpriv_reg_handler(s, offset, index)) | |
| 864 | + return -EINVAL; | |
| 865 | + | |
| 844 | 866 | if (offset == i915_mmio_reg_offset(DERRMR) || |
| 845 | 867 | offset == i915_mmio_reg_offset(FORCEWAKE_MT)) { |
| 846 | 868 | /* Writing to HW VGT_PVINFO_PAGE offset will be discarded */ |
| @@ -1008,7 +1030,7 @@ static int cmd_handler_pipe_control(struct parser_exec_state *s) · 161 unmodified lines | ||
| 1008 | 1030 | ret = cmd_reg_handler(s, 0x2358, 1, "pipe_ctrl"); |
| 1009 | 1031 | else if (post_sync == 1) { |
| 1010 | 1032 | /* check ggtt*/ |
| 1011 | − if ((cmd_val(s, 2) & (1 << 2))) { | |
| 1033 | + if ((cmd_val(s, 1) & PIPE_CONTROL_GLOBAL_GTT_IVB)) { | |
| 1012 | 1034 | gma = cmd_val(s, 2) & GENMASK(31, 3); |
| 1013 | 1035 | if (gmadr_bytes == 8) |
| 1014 | 1036 | gma |= (cmd_gma_hi(s, 3)) << 32; |
| @@ -1129,6 +1151,7 @@ static int skl_decode_mi_display_flip(struct parser_exec_state *s, · 114 unmodified lines | ||
| 1129 | 1151 | struct mi_display_flip_command_info *info) |
| 1130 | 1152 | { |
| 1131 | 1153 | struct drm_i915_private *dev_priv = s->vgpu->gvt->dev_priv; |
| 1154 | + struct intel_vgpu *vgpu = s->vgpu; | |
| 1132 | 1155 | u32 dword0 = cmd_val(s, 0); |
| 1133 | 1156 | u32 dword1 = cmd_val(s, 1); |
| 1134 | 1157 | u32 dword2 = cmd_val(s, 2); |
| @@ -1167,7 +1190,7 @@ static int skl_decode_mi_display_flip(struct parser_exec_state *s, · 32 unmodified lines | ||
| 1167 | 1190 | break; |
| 1168 | 1191 | |
| 1169 | 1192 | default: |
| 1170 | − gvt_err("unknown plane code %d\n", plane); | |
| 1193 | + gvt_vgpu_err("unknown plane code %d\n", plane); | |
| 1171 | 1194 | return -EINVAL; |
| 1172 | 1195 | } |
| 1173 | 1196 | |
| @@ -1274,25 +1297,26 @@ static int update_plane_mmio_from_mi_display_flip( · 100 unmodified lines | ||
| 1274 | 1297 | static int cmd_handler_mi_display_flip(struct parser_exec_state *s) |
| 1275 | 1298 | { |
| 1276 | 1299 | struct mi_display_flip_command_info info; |
| 1300 | + struct intel_vgpu *vgpu = s->vgpu; | |
| 1277 | 1301 | int ret; |
| 1278 | 1302 | int i; |
| 1279 | 1303 | int len = cmd_length(s); |
| 1280 | 1304 | |
| 1281 | 1305 | ret = decode_mi_display_flip(s, &info); |
| 1282 | 1306 | if (ret) { |
| 1283 | − gvt_err("fail to decode MI display flip command\n"); | |
| 1307 | + gvt_vgpu_err("fail to decode MI display flip command\n"); | |
| 1284 | 1308 | return ret; |
| 1285 | 1309 | } |
| 1286 | 1310 | |
| 1287 | 1311 | ret = check_mi_display_flip(s, &info); |
| 1288 | 1312 | if (ret) { |
| 1289 | − gvt_err("invalid MI display flip command\n"); | |
| 1313 | + gvt_vgpu_err("invalid MI display flip command\n"); | |
| 1290 | 1314 | return ret; |
| 1291 | 1315 | } |
| 1292 | 1316 | |
| 1293 | 1317 | ret = update_plane_mmio_from_mi_display_flip(s, &info); |
| 1294 | 1318 | if (ret) { |
| 1295 | − gvt_err("fail to update plane mmio\n"); | |
| 1319 | + gvt_vgpu_err("fail to update plane mmio\n"); | |
| 1296 | 1320 | return ret; |
| 1297 | 1321 | } |
| 1298 | 1322 | |
| @@ -1350,7 +1374,8 @@ static inline int cmd_address_audit(struct parser_exec_state *s, · 51 unmodified lines | ||
| 1350 | 1374 | int ret; |
| 1351 | 1375 | |
| 1352 | 1376 | if (op_size > max_surface_size) { |
| 1353 | − gvt_err("command address audit fail name %s\n", s->info->name); | |
| 1377 | + gvt_vgpu_err("command address audit fail name %s\n", | |
| 1378 | + s->info->name); | |
| 1354 | 1379 | return -EINVAL; |
| 1355 | 1380 | } |
| 1356 | 1381 | |
| @@ -1367,7 +1392,7 @@ static inline int cmd_address_audit(struct parser_exec_state *s, · 10 unmodified lines | ||
| 1367 | 1392 | } |
| 1368 | 1393 | return 0; |
| 1369 | 1394 | err: |
| 1370 | − gvt_err("cmd_parser: Malicious %s detected, addr=0x%lx, len=%d!\n", | |
| 1395 | + gvt_vgpu_err("cmd_parser: Malicious %s detected, addr=0x%lx, len=%d!\n", | |
| 1371 | 1396 | s->info->name, guest_gma, op_size); |
| 1372 | 1397 | |
| 1373 | 1398 | pr_err("cmd dump: "); |
| @@ -1412,8 +1437,10 @@ static int cmd_handler_mi_store_data_imm(struct parser_exec_state *s) · 38 unmodified lines | ||
| 1412 | 1437 | |
| 1413 | 1438 | static inline int unexpected_cmd(struct parser_exec_state *s) |
| 1414 | 1439 | { |
| 1415 | − gvt_err("vgpu%d: Unexpected %s in command buffer!\n", | |
| 1416 | − s->vgpu->id, s->info->name); | |
| 1440 | + struct intel_vgpu *vgpu = s->vgpu; | |
| 1441 | + | |
| 1442 | + gvt_vgpu_err("Unexpected %s in command buffer!\n", s->info->name); | |
| 1443 | + | |
| 1417 | 1444 | return -EINVAL; |
| 1418 | 1445 | } |
| 1419 | 1446 | |
| @@ -1516,7 +1543,7 @@ static int copy_gma_to_hva(struct intel_vgpu *vgpu, struct intel_vgpu_mm *mm, · 96 unmodified lines | ||
| 1516 | 1543 | while (gma != end_gma) { |
| 1517 | 1544 | gpa = intel_vgpu_gma_to_gpa(mm, gma); |
| 1518 | 1545 | if (gpa == INTEL_GVT_INVALID_ADDR) { |
| 1519 | − gvt_err("invalid gma address: %lx\n", gma); | |
| 1546 | + gvt_vgpu_err("invalid gma address: %lx\n", gma); | |
| 1520 | 1547 | return -EFAULT; |
| 1521 | 1548 | } |
| 1522 | 1549 | |
| @@ -1557,6 +1584,7 @@ static uint32_t find_bb_size(struct parser_exec_state *s) · 34 unmodified lines | ||
| 1557 | 1584 | uint32_t bb_size = 0; |
| 1558 | 1585 | uint32_t cmd_len = 0; |
| 1559 | 1586 | bool met_bb_end = false; |
| 1587 | + struct intel_vgpu *vgpu = s->vgpu; | |
| 1560 | 1588 | u32 cmd; |
| 1561 | 1589 | |
| 1562 | 1590 | /* get the start gm address of the batch buffer */ |
| @@ -1565,7 +1593,7 @@ static uint32_t find_bb_size(struct parser_exec_state *s) · 2 unmodified lines | ||
| 1565 | 1593 | |
| 1566 | 1594 | info = get_cmd_info(s->vgpu->gvt, cmd, s->ring_id); |
| 1567 | 1595 | if (info == NULL) { |
| 1568 | − gvt_err("unknown cmd 0x%x, opcode=0x%x\n", | |
| 1596 | + gvt_vgpu_err("unknown cmd 0x%x, opcode=0x%x\n", | |
| 1569 | 1597 | cmd, get_opcode(cmd, s->ring_id)); |
| 1570 | 1598 | return -EINVAL; |
| 1571 | 1599 | } |
| @@ -1574,7 +1602,7 @@ static uint32_t find_bb_size(struct parser_exec_state *s) · 2 unmodified lines | ||
| 1574 | 1602 | gma, gma + 4, &cmd); |
| 1575 | 1603 | info = get_cmd_info(s->vgpu->gvt, cmd, s->ring_id); |
| 1576 | 1604 | if (info == NULL) { |
| 1577 | − gvt_err("unknown cmd 0x%x, opcode=0x%x\n", | |
| 1605 | + gvt_vgpu_err("unknown cmd 0x%x, opcode=0x%x\n", | |
| 1578 | 1606 | cmd, get_opcode(cmd, s->ring_id)); |
| 1579 | 1607 | return -EINVAL; |
| 1580 | 1608 | } |
| @@ -1599,6 +1627,7 @@ static uint32_t find_bb_size(struct parser_exec_state *s) · 18 unmodified lines | ||
| 1599 | 1627 | static int perform_bb_shadow(struct parser_exec_state *s) |
| 1600 | 1628 | { |
| 1601 | 1629 | struct intel_shadow_bb_entry *entry_obj; |
| 1630 | + struct intel_vgpu *vgpu = s->vgpu; | |
| 1602 | 1631 | unsigned long gma = 0; |
| 1603 | 1632 | uint32_t bb_size; |
| 1604 | 1633 | void *dst = NULL; |
| @@ -1633,7 +1662,7 @@ static int perform_bb_shadow(struct parser_exec_state *s) · 28 unmodified lines | ||
| 1633 | 1662 | |
| 1634 | 1663 | ret = i915_gem_object_set_to_cpu_domain(entry_obj->obj, false); |
| 1635 | 1664 | if (ret) { |
| 1636 | − gvt_err("failed to set shadow batch to CPU\n"); | |
| 1665 | + gvt_vgpu_err("failed to set shadow batch to CPU\n"); | |
| 1637 | 1666 | goto unmap_src; |
| 1638 | 1667 | } |
| 1639 | 1668 | |
| @@ -1645,7 +1674,7 @@ static int perform_bb_shadow(struct parser_exec_state *s) · 5 unmodified lines | ||
| 1645 | 1674 | gma, gma + bb_size, |
| 1646 | 1675 | dst); |
| 1647 | 1676 | if (ret) { |
| 1648 | − gvt_err("fail to copy guest ring buffer\n"); | |
| 1677 | + gvt_vgpu_err("fail to copy guest ring buffer\n"); | |
| 1649 | 1678 | goto unmap_src; |
| 1650 | 1679 | } |
| 1651 | 1680 | |
| @@ -1676,15 +1705,16 @@ static int cmd_handler_mi_batch_buffer_start(struct parser_exec_state *s) · 24 unmodified lines | ||
| 1676 | 1705 | { |
| 1677 | 1706 | bool second_level; |
| 1678 | 1707 | int ret = 0; |
| 1708 | + struct intel_vgpu *vgpu = s->vgpu; | |
| 1679 | 1709 | |
| 1680 | 1710 | if (s->buf_type == BATCH_BUFFER_2ND_LEVEL) { |
| 1681 | − gvt_err("Found MI_BATCH_BUFFER_START in 2nd level BB\n"); | |
| 1711 | + gvt_vgpu_err("Found MI_BATCH_BUFFER_START in 2nd level BB\n"); | |
| 1682 | 1712 | return -EINVAL; |
| 1683 | 1713 | } |
| 1684 | 1714 | |
| 1685 | 1715 | second_level = BATCH_BUFFER_2ND_LEVEL_BIT(cmd_val(s, 0)) == 1; |
| 1686 | 1716 | if (second_level && (s->buf_type != BATCH_BUFFER_INSTRUCTION)) { |
| 1687 | − gvt_err("Jumping to 2nd level BB from RB is not allowed\n"); | |
| 1717 | + gvt_vgpu_err("Jumping to 2nd level BB from RB is not allowed\n"); | |
| 1688 | 1718 | return -EINVAL; |
| 1689 | 1719 | } |
| 1690 | 1720 | |
| @@ -1702,7 +1732,7 @@ static int cmd_handler_mi_batch_buffer_start(struct parser_exec_state *s) · 11 unmodified lines | ||
| 1702 | 1732 | if (batch_buffer_needs_scan(s)) { |
| 1703 | 1733 | ret = perform_bb_shadow(s); |
| 1704 | 1734 | if (ret < 0) |
| 1705 | − gvt_err("invalid shadow batch buffer\n"); | |
| 1735 | + gvt_vgpu_err("invalid shadow batch buffer\n"); | |
| 1706 | 1736 | } else { |
| 1707 | 1737 | /* emulate a batch buffer end to do return right */ |
| 1708 | 1738 | ret = cmd_handler_mi_batch_buffer_end(s); |
| @@ -2429,6 +2459,7 @@ static int cmd_parser_exec(struct parser_exec_state *s) · 720 unmodified lines | ||
| 2429 | 2459 | int ret = 0; |
| 2430 | 2460 | cycles_t t0, t1, t2; |
| 2431 | 2461 | struct parser_exec_state s_before_advance_custom; |
| 2462 | + struct intel_vgpu *vgpu = s->vgpu; | |
| 2432 | 2463 | |
| 2433 | 2464 | t0 = get_cycles(); |
| 2434 | 2465 | |
| @@ -2436,7 +2467,7 @@ static int cmd_parser_exec(struct parser_exec_state *s) · 1 unmodified line | ||
| 2436 | 2467 | |
| 2437 | 2468 | info = get_cmd_info(s->vgpu->gvt, cmd, s->ring_id); |
| 2438 | 2469 | if (info == NULL) { |
| 2439 | − gvt_err("unknown cmd 0x%x, opcode=0x%x\n", | |
| 2470 | + gvt_vgpu_err("unknown cmd 0x%x, opcode=0x%x\n", | |
| 2440 | 2471 | cmd, get_opcode(cmd, s->ring_id)); |
| 2441 | 2472 | return -EINVAL; |
| 2442 | 2473 | } |
| @@ -2452,7 +2483,7 @@ static int cmd_parser_exec(struct parser_exec_state *s) · 9 unmodified lines | ||
| 2452 | 2483 | if (info->handler) { |
| 2453 | 2484 | ret = info->handler(s); |
| 2454 | 2485 | if (ret < 0) { |
| 2455 | − gvt_err("%s handler error\n", info->name); | |
| 2486 | + gvt_vgpu_err("%s handler error\n", info->name); | |
| 2456 | 2487 | return ret; |
| 2457 | 2488 | } |
| 2458 | 2489 | } |
| @@ -2463,7 +2494,7 @@ static int cmd_parser_exec(struct parser_exec_state *s) · 4 unmodified lines | ||
| 2463 | 2494 | if (!(info->flag & F_IP_ADVANCE_CUSTOM)) { |
| 2464 | 2495 | ret = cmd_advance_default(s); |
| 2465 | 2496 | if (ret) { |
| 2466 | − gvt_err("%s IP advance error\n", info->name); | |
| 2497 | + gvt_vgpu_err("%s IP advance error\n", info->name); | |
| 2467 | 2498 | return ret; |
| 2468 | 2499 | } |
| 2469 | 2500 | } |
| @@ -2486,6 +2517,7 @@ static int command_scan(struct parser_exec_state *s, · 16 unmodified lines | ||
| 2486 | 2517 | |
| 2487 | 2518 | unsigned long gma_head, gma_tail, gma_bottom; |
| 2488 | 2519 | int ret = 0; |
| 2520 | + struct intel_vgpu *vgpu = s->vgpu; | |
| 2489 | 2521 | |
| 2490 | 2522 | gma_head = rb_start + rb_head; |
| 2491 | 2523 | gma_tail = rb_start + rb_tail; |
| @@ -2497,7 +2529,7 @@ static int command_scan(struct parser_exec_state *s, · 5 unmodified lines | ||
| 2497 | 2529 | if (s->buf_type == RING_BUFFER_INSTRUCTION) { |
| 2498 | 2530 | if (!(s->ip_gma >= rb_start) || |
| 2499 | 2531 | !(s->ip_gma < gma_bottom)) { |
| 2500 | − gvt_err("ip_gma %lx out of ring scope." | |
| 2532 | + gvt_vgpu_err("ip_gma %lx out of ring scope." | |
| 2501 | 2533 | "(base:0x%lx, bottom: 0x%lx)\n", |
| 2502 | 2534 | s->ip_gma, rb_start, |
| 2503 | 2535 | gma_bottom); |
| @@ -2505,7 +2537,7 @@ static int command_scan(struct parser_exec_state *s, · 1 unmodified line | ||
| 2505 | 2537 | return -EINVAL; |
| 2506 | 2538 | } |
| 2507 | 2539 | if (gma_out_of_range(s->ip_gma, gma_head, gma_tail)) { |
| 2508 | − gvt_err("ip_gma %lx out of range." | |
| 2540 | + gvt_vgpu_err("ip_gma %lx out of range." | |
| 2509 | 2541 | "base 0x%lx head 0x%lx tail 0x%lx\n", |
| 2510 | 2542 | s->ip_gma, rb_start, |
| 2511 | 2543 | rb_head, rb_tail); |
| @@ -2515,7 +2547,7 @@ static int command_scan(struct parser_exec_state *s, · 3 unmodified lines | ||
| 2515 | 2547 | } |
| 2516 | 2548 | ret = cmd_parser_exec(s); |
| 2517 | 2549 | if (ret) { |
| 2518 | − gvt_err("cmd parser error\n"); | |
| 2550 | + gvt_vgpu_err("cmd parser error\n"); | |
| 2519 | 2551 | parser_exec_state_dump(s); |
| 2520 | 2552 | break; |
| 2521 | 2553 | } |
| @@ -2639,7 +2671,7 @@ static int shadow_workload_ring_buffer(struct intel_vgpu_workload *workload) · 117 unmodified lines | ||
| 2639 | 2671 | gma_head, gma_top, |
| 2640 | 2672 | workload->shadow_ring_buffer_va); |
| 2641 | 2673 | if (ret) { |
| 2642 | − gvt_err("fail to copy guest ring buffer\n"); | |
| 2674 | + gvt_vgpu_err("fail to copy guest ring buffer\n"); | |
| 2643 | 2675 | return ret; |
| 2644 | 2676 | } |
| 2645 | 2677 | copy_len = gma_top - gma_head; |
| @@ -2651,7 +2683,7 @@ static int shadow_workload_ring_buffer(struct intel_vgpu_workload *workload) · 5 unmodified lines | ||
| 2651 | 2683 | gma_head, gma_tail, |
| 2652 | 2684 | workload->shadow_ring_buffer_va + copy_len); |
| 2653 | 2685 | if (ret) { |
| 2654 | − gvt_err("fail to copy guest ring buffer\n"); | |
| 2686 | + gvt_vgpu_err("fail to copy guest ring buffer\n"); | |
| 2655 | 2687 | return ret; |
| 2656 | 2688 | } |
| 2657 | 2689 | ring->tail += workload->rb_len; |
| @@ -2662,16 +2694,17 @@ static int shadow_workload_ring_buffer(struct intel_vgpu_workload *workload) · 4 unmodified lines | ||
| 2662 | 2694 | int intel_gvt_scan_and_shadow_workload(struct intel_vgpu_workload *workload) |
| 2663 | 2695 | { |
| 2664 | 2696 | int ret; |
| 2697 | + struct intel_vgpu *vgpu = workload->vgpu; | |
| 2665 | 2698 | |
| 2666 | 2699 | ret = shadow_workload_ring_buffer(workload); |
| 2667 | 2700 | if (ret) { |
| 2668 | − gvt_err("fail to shadow workload ring_buffer\n"); | |
| 2701 | + gvt_vgpu_err("fail to shadow workload ring_buffer\n"); | |
| 2669 | 2702 | return ret; |
| 2670 | 2703 | } |
| 2671 | 2704 | |
| 2672 | 2705 | ret = scan_workload(workload); |
| 2673 | 2706 | if (ret) { |
| 2674 | − gvt_err("scan workload error\n"); | |
| 2707 | + gvt_vgpu_err("scan workload error\n"); | |
| 2675 | 2708 | return ret; |
| 2676 | 2709 | } |
| 2677 | 2710 | return 0; |
| @@ -2681,6 +2714,7 @@ static int shadow_indirect_ctx(struct intel_shadow_wa_ctx *wa_ctx) · 3 unmodified lines | ||
| 2681 | 2714 | { |
| 2682 | 2715 | int ctx_size = wa_ctx->indirect_ctx.size; |
| 2683 | 2716 | unsigned long guest_gma = wa_ctx->indirect_ctx.guest_gma; |
| 2717 | + struct intel_vgpu *vgpu = wa_ctx->workload->vgpu; | |
| 2684 | 2718 | struct drm_i915_gem_object *obj; |
| 2685 | 2719 | int ret = 0; |
| 2686 | 2720 | void *map; |
| @@ -2694,14 +2728,14 @@ static int shadow_indirect_ctx(struct intel_shadow_wa_ctx *wa_ctx) · 7 unmodified lines | ||
| 2694 | 2728 | /* get the va of the shadow batch buffer */ |
| 2695 | 2729 | map = i915_gem_object_pin_map(obj, I915_MAP_WB); |
| 2696 | 2730 | if (IS_ERR(map)) { |
| 2697 | − gvt_err("failed to vmap shadow indirect ctx\n"); | |
| 2731 | + gvt_vgpu_err("failed to vmap shadow indirect ctx\n"); | |
| 2698 | 2732 | ret = PTR_ERR(map); |
| 2699 | 2733 | goto put_obj; |
| 2700 | 2734 | } |
| 2701 | 2735 | |
| 2702 | 2736 | ret = i915_gem_object_set_to_cpu_domain(obj, false); |
| 2703 | 2737 | if (ret) { |
| 2704 | − gvt_err("failed to set shadow indirect ctx to CPU\n"); | |
| 2738 | + gvt_vgpu_err("failed to set shadow indirect ctx to CPU\n"); | |
| 2705 | 2739 | goto unmap_src; |
| 2706 | 2740 | } |
| 2707 | 2741 | |
| @@ -2710,7 +2744,7 @@ static int shadow_indirect_ctx(struct intel_shadow_wa_ctx *wa_ctx) · 2 unmodified lines | ||
| 2710 | 2744 | guest_gma, guest_gma + ctx_size, |
| 2711 | 2745 | map); |
| 2712 | 2746 | if (ret) { |
| 2713 | − gvt_err("fail to copy guest indirect ctx\n"); | |
| 2747 | + gvt_vgpu_err("fail to copy guest indirect ctx\n"); | |
| 2714 | 2748 | goto unmap_src; |
| 2715 | 2749 | } |
| 2716 | 2750 | |
| @@ -2744,13 +2778,14 @@ static int combine_wa_ctx(struct intel_shadow_wa_ctx *wa_ctx) · 27 unmodified lines | ||
| 2744 | 2778 | int intel_gvt_scan_and_shadow_wa_ctx(struct intel_shadow_wa_ctx *wa_ctx) |
| 2745 | 2779 | { |
| 2746 | 2780 | int ret; |
| 2781 | + struct intel_vgpu *vgpu = wa_ctx->workload->vgpu; | |
| 2747 | 2782 | |
| 2748 | 2783 | if (wa_ctx->indirect_ctx.size == 0) |
| 2749 | 2784 | return 0; |
| 2750 | 2785 | |
| 2751 | 2786 | ret = shadow_indirect_ctx(wa_ctx); |
| 2752 | 2787 | if (ret) { |
| 2753 | − gvt_err("fail to shadow indirect ctx\n"); | |
| 2788 | + gvt_vgpu_err("fail to shadow indirect ctx\n"); | |
| 2754 | 2789 | return ret; |
| 2755 | 2790 | } |
| 2756 | 2791 | |
| @@ -2758,7 +2793,7 @@ int intel_gvt_scan_and_shadow_wa_ctx(struct intel_shadow_wa_ctx *wa_ctx) · 1 unmodified line | ||
| 2758 | 2793 | |
| 2759 | 2794 | ret = scan_wa_ctx(wa_ctx); |
| 2760 | 2795 | if (ret) { |
| 2761 | − gvt_err("scan wa ctx error\n"); | |
| 2796 | + gvt_vgpu_err("scan wa ctx error\n"); | |
| 2762 | 2797 | return ret; |
| 2763 | 2798 | } |
| 2764 | 2799 | |
| @@ -27,6 +27,14 @@ · 26 unmodified lines | ||
| 27 | 27 | #define gvt_err(fmt, args...) \ |
| 28 | 28 | DRM_ERROR("gvt: "fmt, ##args) |
| 29 | 29 | |
| 30 | +#define gvt_vgpu_err(fmt, args...) \ | |
| 31 | +do { \ | |
| 32 | + if (IS_ERR_OR_NULL(vgpu)) \ | |
| 33 | + DRM_DEBUG_DRIVER("gvt: "fmt, ##args); \ | |
| 34 | + else \ | |
| 35 | + DRM_DEBUG_DRIVER("gvt: vgpu %d: "fmt, vgpu->id, ##args);\ | |
| 36 | +} while (0) | |
| 37 | + | |
| 30 | 38 | #define gvt_dbg_core(fmt, args...) \ |
| 31 | 39 | DRM_DEBUG_DRIVER("gvt: core: "fmt, ##args) |
| 32 | 40 | |
| @@ -52,16 +52,16 @@ static unsigned char edid_get_byte(struct intel_vgpu *vgpu) · 51 unmodified lines | ||
| 52 | 52 | unsigned char chr = 0; |
| 53 | 53 | |
| 54 | 54 | if (edid->state == I2C_NOT_SPECIFIED || !edid->slave_selected) { |
| 55 | − gvt_err("Driver tries to read EDID without proper sequence!\n"); | |
| 55 | + gvt_vgpu_err("Driver tries to read EDID without proper sequence!\n"); | |
| 56 | 56 | return 0; |
| 57 | 57 | } |
| 58 | 58 | if (edid->current_edid_read >= EDID_SIZE) { |
| 59 | − gvt_err("edid_get_byte() exceeds the size of EDID!\n"); | |
| 59 | + gvt_vgpu_err("edid_get_byte() exceeds the size of EDID!\n"); | |
| 60 | 60 | return 0; |
| 61 | 61 | } |
| 62 | 62 | |
| 63 | 63 | if (!edid->edid_available) { |
| 64 | − gvt_err("Reading EDID but EDID is not available!\n"); | |
| 64 | + gvt_vgpu_err("Reading EDID but EDID is not available!\n"); | |
| 65 | 65 | return 0; |
| 66 | 66 | } |
| 67 | 67 | |
| @@ -72,7 +72,7 @@ static unsigned char edid_get_byte(struct intel_vgpu *vgpu) · 4 unmodified lines | ||
| 72 | 72 | chr = edid_data->edid_block[edid->current_edid_read]; |
| 73 | 73 | edid->current_edid_read++; |
| 74 | 74 | } else { |
| 75 | − gvt_err("No EDID available during the reading?\n"); | |
| 75 | + gvt_vgpu_err("No EDID available during the reading?\n"); | |
| 76 | 76 | } |
| 77 | 77 | return chr; |
| 78 | 78 | } |
| @@ -223,7 +223,7 @@ static int gmbus1_mmio_write(struct intel_vgpu *vgpu, unsigned int offset, · 144 unmodified lines | ||
| 223 | 223 | vgpu_vreg(vgpu, PCH_GMBUS2) |= GMBUS_ACTIVE; |
| 224 | 224 | break; |
| 225 | 225 | default: |
| 226 | − gvt_err("Unknown/reserved GMBUS cycle detected!\n"); | |
| 226 | + gvt_vgpu_err("Unknown/reserved GMBUS cycle detected!\n"); | |
| 227 | 227 | break; |
| 228 | 228 | } |
| 229 | 229 | /* |
| @@ -292,8 +292,7 @@ static int gmbus3_mmio_read(struct intel_vgpu *vgpu, unsigned int offset, · 62 unmodified lines | ||
| 292 | 292 | */ |
| 293 | 293 | } else { |
| 294 | 294 | memcpy(p_data, &vgpu_vreg(vgpu, offset), bytes); |
| 295 | − gvt_err("vgpu%d: warning: gmbus3 read with nothing returned\n", | |
| 296 | − vgpu->id); | |
| 295 | + gvt_vgpu_err("warning: gmbus3 read with nothing returned\n"); | |
| 297 | 296 | } |
| 298 | 297 | return 0; |
| 299 | 298 | } |
| @@ -172,6 +172,7 @@ static int emulate_execlist_ctx_schedule_out( · 171 unmodified lines | ||
| 172 | 172 | struct intel_vgpu_execlist *execlist, |
| 173 | 173 | struct execlist_ctx_descriptor_format *ctx) |
| 174 | 174 | { |
| 175 | + struct intel_vgpu *vgpu = execlist->vgpu; | |
| 175 | 176 | struct intel_vgpu_execlist_slot *running = execlist->running_slot; |
| 176 | 177 | struct intel_vgpu_execlist_slot *pending = execlist->pending_slot; |
| 177 | 178 | struct execlist_ctx_descriptor_format *ctx0 = &running->ctx[0]; |
| @@ -183,7 +184,7 @@ static int emulate_execlist_ctx_schedule_out( · 5 unmodified lines | ||
| 183 | 184 | gvt_dbg_el("schedule out context id %x\n", ctx->context_id); |
| 184 | 185 | |
| 185 | 186 | if (WARN_ON(!same_context(ctx, execlist->running_context))) { |
| 186 | − gvt_err("schedule out context is not running context," | |
| 187 | + gvt_vgpu_err("schedule out context is not running context," | |
| 187 | 188 | "ctx id %x running ctx id %x\n", |
| 188 | 189 | ctx->context_id, |
| 189 | 190 | execlist->running_context->context_id); |
| @@ -254,7 +255,7 @@ static struct intel_vgpu_execlist_slot *get_next_execlist_slot( · 64 unmodified lines | ||
| 254 | 255 | status.udw = vgpu_vreg(vgpu, status_reg + 4); |
| 255 | 256 | |
| 256 | 257 | if (status.execlist_queue_full) { |
| 257 | − gvt_err("virtual execlist slots are full\n"); | |
| 258 | + gvt_vgpu_err("virtual execlist slots are full\n"); | |
| 258 | 259 | return NULL; |
| 259 | 260 | } |
| 260 | 261 | |
| @@ -270,11 +271,12 @@ static int emulate_execlist_schedule_in(struct intel_vgpu_execlist *execlist, · 9 unmodified lines | ||
| 270 | 271 | |
| 271 | 272 | struct execlist_ctx_descriptor_format *ctx0, *ctx1; |
| 272 | 273 | struct execlist_context_status_format status; |
| 274 | + struct intel_vgpu *vgpu = execlist->vgpu; | |
| 273 | 275 | |
| 274 | 276 | gvt_dbg_el("emulate schedule-in\n"); |
| 275 | 277 | |
| 276 | 278 | if (!slot) { |
| 277 | − gvt_err("no available execlist slot\n"); | |
| 279 | + gvt_vgpu_err("no available execlist slot\n"); | |
| 278 | 280 | return -EINVAL; |
| 279 | 281 | } |
| 280 | 282 | |
| @@ -375,7 +377,6 @@ static void prepare_shadow_batch_buffer(struct intel_vgpu_workload *workload) · 94 unmodified lines | ||
| 375 | 377 | |
| 376 | 378 | vma = i915_gem_object_ggtt_pin(entry_obj->obj, NULL, 0, 4, 0); |
| 377 | 379 | if (IS_ERR(vma)) { |
| 378 | − gvt_err("Cannot pin\n"); | |
| 379 | 380 | return; |
| 380 | 381 | } |
| 381 | 382 | |
| @@ -428,7 +429,6 @@ static void prepare_shadow_wa_ctx(struct intel_shadow_wa_ctx *wa_ctx) · 46 unmodified lines | ||
| 428 | 429 | vma = i915_gem_object_ggtt_pin(wa_ctx->indirect_ctx.obj, NULL, |
| 429 | 430 | 0, CACHELINE_BYTES, 0); |
| 430 | 431 | if (IS_ERR(vma)) { |
| 431 | − gvt_err("Cannot pin indirect ctx obj\n"); | |
| 432 | 432 | return; |
| 433 | 433 | } |
| 434 | 434 | |
| @@ -561,6 +561,7 @@ static int prepare_mm(struct intel_vgpu_workload *workload) · 126 unmodified lines | ||
| 561 | 561 | { |
| 562 | 562 | struct execlist_ctx_descriptor_format *desc = &workload->ctx_desc; |
| 563 | 563 | struct intel_vgpu_mm *mm; |
| 564 | + struct intel_vgpu *vgpu = workload->vgpu; | |
| 564 | 565 | int page_table_level; |
| 565 | 566 | u32 pdp[8]; |
| 566 | 567 | |
| @@ -569,7 +570,7 @@ static int prepare_mm(struct intel_vgpu_workload *workload) · 2 unmodified lines | ||
| 569 | 570 | } else if (desc->addressing_mode == 3) { /* legacy 64 bit */ |
| 570 | 571 | page_table_level = 4; |
| 571 | 572 | } else { |
| 572 | − gvt_err("Advanced Context mode(SVM) is not supported!\n"); | |
| 573 | + gvt_vgpu_err("Advanced Context mode(SVM) is not supported!\n"); | |
| 573 | 574 | return -EINVAL; |
| 574 | 575 | } |
| 575 | 576 | |
| @@ -583,7 +584,7 @@ static int prepare_mm(struct intel_vgpu_workload *workload) · 7 unmodified lines | ||
| 583 | 584 | mm = intel_vgpu_create_mm(workload->vgpu, INTEL_GVT_MM_PPGTT, |
| 584 | 585 | pdp, page_table_level, 0); |
| 585 | 586 | if (IS_ERR(mm)) { |
| 586 | − gvt_err("fail to create mm object.\n"); | |
| 587 | + gvt_vgpu_err("fail to create mm object.\n"); | |
| 587 | 588 | return PTR_ERR(mm); |
| 588 | 589 | } |
| 589 | 590 | } |
| @@ -609,7 +610,7 @@ static int submit_context(struct intel_vgpu *vgpu, int ring_id, · 19 unmodified lines | ||
| 609 | 610 | ring_context_gpa = intel_vgpu_gma_to_gpa(vgpu->gtt.ggtt_mm, |
| 610 | 611 | (u32)((desc->lrca + 1) << GTT_PAGE_SHIFT)); |
| 611 | 612 | if (ring_context_gpa == INTEL_GVT_INVALID_ADDR) { |
| 612 | − gvt_err("invalid guest context LRCA: %x\n", desc->lrca); | |
| 613 | + gvt_vgpu_err("invalid guest context LRCA: %x\n", desc->lrca); | |
| 613 | 614 | return -EINVAL; |
| 614 | 615 | } |
| 615 | 616 | |
| @@ -724,8 +725,7 @@ int intel_vgpu_submit_execlist(struct intel_vgpu *vgpu, int ring_id) · 108 unmodified lines | ||
| 724 | 725 | continue; |
| 725 | 726 | |
| 726 | 727 | if (!desc[i]->privilege_access) { |
| 727 | − gvt_err("vgpu%d: unexpected GGTT elsp submission\n", | |
| 728 | − vgpu->id); | |
| 728 | + gvt_vgpu_err("unexpected GGTT elsp submission\n"); | |
| 729 | 729 | return -EINVAL; |
| 730 | 730 | } |
| 731 | 731 | |
| @@ -735,15 +735,13 @@ int intel_vgpu_submit_execlist(struct intel_vgpu *vgpu, int ring_id) · 3 unmodified lines | ||
| 735 | 735 | } |
| 736 | 736 | |
| 737 | 737 | if (!valid_desc_bitmap) { |
| 738 | − gvt_err("vgpu%d: no valid desc in a elsp submission\n", | |
| 739 | − vgpu->id); | |
| 738 | + gvt_vgpu_err("no valid desc in a elsp submission\n"); | |
| 740 | 739 | return -EINVAL; |
| 741 | 740 | } |
| 742 | 741 | |
| 743 | 742 | if (!test_bit(0, (void *)&valid_desc_bitmap) && |
| 744 | 743 | test_bit(1, (void *)&valid_desc_bitmap)) { |
| 745 | − gvt_err("vgpu%d: weird elsp submission, desc 0 is not valid\n", | |
| 746 | − vgpu->id); | |
| 744 | + gvt_vgpu_err("weird elsp submission, desc 0 is not valid\n"); | |
| 747 | 745 | return -EINVAL; |
| 748 | 746 | } |
| 749 | 747 | |
| @@ -752,8 +750,7 @@ int intel_vgpu_submit_execlist(struct intel_vgpu *vgpu, int ring_id) · 2 unmodified lines | ||
| 752 | 750 | ret = submit_context(vgpu, ring_id, &valid_desc[i], |
| 753 | 751 | emulate_schedule_in); |
| 754 | 752 | if (ret) { |
| 755 | − gvt_err("vgpu%d: fail to schedule workload\n", | |
| 756 | − vgpu->id); | |
| 753 | + gvt_vgpu_err("fail to schedule workload\n"); | |
| 757 | 754 | return ret; |
| 758 | 755 | } |
| 759 | 756 | emulate_schedule_in = false; |
| @@ -49,8 +49,8 @@ bool intel_gvt_ggtt_validate_range(struct intel_vgpu *vgpu, u64 addr, u32 size) · 48 unmodified lines | ||
| 49 | 49 | { |
| 50 | 50 | if ((!vgpu_gmadr_is_valid(vgpu, addr)) || (size |
| 51 | 51 | && !vgpu_gmadr_is_valid(vgpu, addr + size - 1))) { |
| 52 | − gvt_err("vgpu%d: invalid range gmadr 0x%llx size 0x%x\n", | |
| 53 | − vgpu->id, addr, size); | |
| 52 | + gvt_vgpu_err("invalid range gmadr 0x%llx size 0x%x\n", | |
| 53 | + addr, size); | |
| 54 | 54 | return false; |
| 55 | 55 | } |
| 56 | 56 | return true; |
| @@ -430,7 +430,7 @@ static int gtt_entry_p2m(struct intel_vgpu *vgpu, struct intel_gvt_gtt_entry *p, · 373 unmodified lines | ||
| 430 | 430 | |
| 431 | 431 | mfn = intel_gvt_hypervisor_gfn_to_mfn(vgpu, gfn); |
| 432 | 432 | if (mfn == INTEL_GVT_INVALID_ADDR) { |
| 433 | − gvt_err("fail to translate gfn: 0x%lx\n", gfn); | |
| 433 | + gvt_vgpu_err("fail to translate gfn: 0x%lx\n", gfn); | |
| 434 | 434 | return -ENXIO; |
| 435 | 435 | } |
| 436 | 436 | |
| @@ -611,7 +611,7 @@ static inline int init_shadow_page(struct intel_vgpu *vgpu, · 174 unmodified lines | ||
| 611 | 611 | |
| 612 | 612 | daddr = dma_map_page(kdev, p->page, 0, 4096, PCI_DMA_BIDIRECTIONAL); |
| 613 | 613 | if (dma_mapping_error(kdev, daddr)) { |
| 614 | − gvt_err("fail to map dma addr\n"); | |
| 614 | + gvt_vgpu_err("fail to map dma addr\n"); | |
| 615 | 615 | return -EINVAL; |
| 616 | 616 | } |
| 617 | 617 | |
| @@ -735,7 +735,7 @@ retry: · 117 unmodified lines | ||
| 735 | 735 | if (reclaim_one_mm(vgpu->gvt)) |
| 736 | 736 | goto retry; |
| 737 | 737 | |
| 738 | − gvt_err("fail to allocate ppgtt shadow page\n"); | |
| 738 | + gvt_vgpu_err("fail to allocate ppgtt shadow page\n"); | |
| 739 | 739 | return ERR_PTR(-ENOMEM); |
| 740 | 740 | } |
| 741 | 741 | |
| @@ -750,14 +750,14 @@ retry: · 8 unmodified lines | ||
| 750 | 750 | */ |
| 751 | 751 | ret = init_shadow_page(vgpu, &spt->shadow_page, type); |
| 752 | 752 | if (ret) { |
| 753 | − gvt_err("fail to initialize shadow page for spt\n"); | |
| 753 | + gvt_vgpu_err("fail to initialize shadow page for spt\n"); | |
| 754 | 754 | goto err; |
| 755 | 755 | } |
| 756 | 756 | |
| 757 | 757 | ret = intel_vgpu_init_guest_page(vgpu, &spt->guest_page, |
| 758 | 758 | gfn, ppgtt_write_protection_handler, NULL); |
| 759 | 759 | if (ret) { |
| 760 | − gvt_err("fail to initialize guest page for spt\n"); | |
| 760 | + gvt_vgpu_err("fail to initialize guest page for spt\n"); | |
| 761 | 761 | goto err; |
| 762 | 762 | } |
| 763 | 763 | |
| @@ -776,8 +776,7 @@ static struct intel_vgpu_ppgtt_spt *ppgtt_find_shadow_page( · 12 unmodified lines | ||
| 776 | 776 | if (p) |
| 777 | 777 | return shadow_page_to_ppgtt_spt(p); |
| 778 | 778 | |
| 779 | − gvt_err("vgpu%d: fail to find ppgtt shadow page: 0x%lx\n", | |
| 780 | − vgpu->id, mfn); | |
| 779 | + gvt_vgpu_err("fail to find ppgtt shadow page: 0x%lx\n", mfn); | |
| 781 | 780 | return NULL; |
| 782 | 781 | } |
| 783 | 782 | |
| @@ -827,8 +826,8 @@ static int ppgtt_invalidate_shadow_page_by_shadow_entry(struct intel_vgpu *vgpu, · 43 unmodified lines | ||
| 827 | 826 | } |
| 828 | 827 | s = ppgtt_find_shadow_page(vgpu, ops->get_pfn(e)); |
| 829 | 828 | if (!s) { |
| 830 | − gvt_err("vgpu%d: fail to find shadow page: mfn: 0x%lx\n", | |
| 831 | − vgpu->id, ops->get_pfn(e)); | |
| 829 | + gvt_vgpu_err("fail to find shadow page: mfn: 0x%lx\n", | |
| 830 | + ops->get_pfn(e)); | |
| 832 | 831 | return -ENXIO; |
| 833 | 832 | } |
| 834 | 833 | return ppgtt_invalidate_shadow_page(s); |
| @@ -836,6 +835,7 @@ static int ppgtt_invalidate_shadow_page_by_shadow_entry(struct intel_vgpu *vgpu, · 1 unmodified line | ||
| 836 | 835 | |
| 837 | 836 | static int ppgtt_invalidate_shadow_page(struct intel_vgpu_ppgtt_spt *spt) |
| 838 | 837 | { |
| 838 | + struct intel_vgpu *vgpu = spt->vgpu; | |
| 839 | 839 | struct intel_gvt_gtt_entry e; |
| 840 | 840 | unsigned long index; |
| 841 | 841 | int ret; |
| @@ -854,7 +854,7 @@ static int ppgtt_invalidate_shadow_page(struct intel_vgpu_ppgtt_spt *spt) · 12 unmodified lines | ||
| 854 | 854 | |
| 855 | 855 | for_each_present_shadow_entry(spt, &e, index) { |
| 856 | 856 | if (!gtt_type_is_pt(get_next_pt_type(e.type))) { |
| 857 | − gvt_err("GVT doesn't support pse bit for now\n"); | |
| 857 | + gvt_vgpu_err("GVT doesn't support pse bit for now\n"); | |
| 858 | 858 | return -EINVAL; |
| 859 | 859 | } |
| 860 | 860 | ret = ppgtt_invalidate_shadow_page_by_shadow_entry( |
| @@ -868,8 +868,8 @@ release: · 7 unmodified lines | ||
| 868 | 868 | ppgtt_free_shadow_page(spt); |
| 869 | 869 | return 0; |
| 870 | 870 | fail: |
| 871 | − gvt_err("vgpu%d: fail: shadow page %p shadow entry 0x%llx type %d\n", | |
| 872 | − spt->vgpu->id, spt, e.val64, e.type); | |
| 871 | + gvt_vgpu_err("fail: shadow page %p shadow entry 0x%llx type %d\n", | |
| 872 | + spt, e.val64, e.type); | |
| 873 | 873 | return ret; |
| 874 | 874 | } |
| 875 | 875 | |
| @@ -914,8 +914,8 @@ static struct intel_vgpu_ppgtt_spt *ppgtt_populate_shadow_page_by_guest_entry( · 38 unmodified lines | ||
| 914 | 914 | } |
| 915 | 915 | return s; |
| 916 | 916 | fail: |
| 917 | − gvt_err("vgpu%d: fail: shadow page %p guest entry 0x%llx type %d\n", | |
| 918 | − vgpu->id, s, we->val64, we->type); | |
| 917 | + gvt_vgpu_err("fail: shadow page %p guest entry 0x%llx type %d\n", | |
| 918 | + s, we->val64, we->type); | |
| 919 | 919 | return ERR_PTR(ret); |
| 920 | 920 | } |
| 921 | 921 | |
| @@ -953,7 +953,7 @@ static int ppgtt_populate_shadow_page(struct intel_vgpu_ppgtt_spt *spt) · 31 unmodified lines | ||
| 953 | 953 | |
| 954 | 954 | for_each_present_guest_entry(spt, &ge, i) { |
| 955 | 955 | if (!gtt_type_is_pt(get_next_pt_type(ge.type))) { |
| 956 | − gvt_err("GVT doesn't support pse bit now\n"); | |
| 956 | + gvt_vgpu_err("GVT doesn't support pse bit now\n"); | |
| 957 | 957 | ret = -EINVAL; |
| 958 | 958 | goto fail; |
| 959 | 959 | } |
| @@ -969,8 +969,8 @@ static int ppgtt_populate_shadow_page(struct intel_vgpu_ppgtt_spt *spt) · 9 unmodified lines | ||
| 969 | 969 | } |
| 970 | 970 | return 0; |
| 971 | 971 | fail: |
| 972 | − gvt_err("vgpu%d: fail: shadow page %p guest entry 0x%llx type %d\n", | |
| 973 | − vgpu->id, spt, ge.val64, ge.type); | |
| 972 | + gvt_vgpu_err("fail: shadow page %p guest entry 0x%llx type %d\n", | |
| 973 | + spt, ge.val64, ge.type); | |
| 974 | 974 | return ret; |
| 975 | 975 | } |
| 976 | 976 | |
| @@ -999,7 +999,7 @@ static int ppgtt_handle_guest_entry_removal(struct intel_vgpu_guest_page *gpt, · 22 unmodified lines | ||
| 999 | 999 | struct intel_vgpu_ppgtt_spt *s = |
| 1000 | 1000 | ppgtt_find_shadow_page(vgpu, ops->get_pfn(&e)); |
| 1001 | 1001 | if (!s) { |
| 1002 | − gvt_err("fail to find guest page\n"); | |
| 1002 | + gvt_vgpu_err("fail to find guest page\n"); | |
| 1003 | 1003 | ret = -ENXIO; |
| 1004 | 1004 | goto fail; |
| 1005 | 1005 | } |
| @@ -1011,8 +1011,8 @@ static int ppgtt_handle_guest_entry_removal(struct intel_vgpu_guest_page *gpt, · 5 unmodified lines | ||
| 1011 | 1011 | ppgtt_set_shadow_entry(spt, &e, index); |
| 1012 | 1012 | return 0; |
| 1013 | 1013 | fail: |
| 1014 | − gvt_err("vgpu%d: fail: shadow page %p guest entry 0x%llx type %d\n", | |
| 1015 | − vgpu->id, spt, e.val64, e.type); | |
| 1014 | + gvt_vgpu_err("fail: shadow page %p guest entry 0x%llx type %d\n", | |
| 1015 | + spt, e.val64, e.type); | |
| 1016 | 1016 | return ret; |
| 1017 | 1017 | } |
| 1018 | 1018 | |
| @@ -1046,8 +1046,8 @@ static int ppgtt_handle_guest_entry_add(struct intel_vgpu_guest_page *gpt, · 27 unmodified lines | ||
| 1046 | 1046 | } |
| 1047 | 1047 | return 0; |
| 1048 | 1048 | fail: |
| 1049 | − gvt_err("vgpu%d: fail: spt %p guest entry 0x%llx type %d\n", vgpu->id, | |
| 1050 | − spt, we->val64, we->type); | |
| 1049 | + gvt_vgpu_err("fail: spt %p guest entry 0x%llx type %d\n", | |
| 1050 | + spt, we->val64, we->type); | |
| 1051 | 1051 | return ret; |
| 1052 | 1052 | } |
| 1053 | 1053 | |
| @@ -1250,8 +1250,8 @@ static int ppgtt_handle_guest_write_page_table( · 196 unmodified lines | ||
| 1250 | 1250 | } |
| 1251 | 1251 | return 0; |
| 1252 | 1252 | fail: |
| 1253 | − gvt_err("vgpu%d: fail: shadow page %p guest entry 0x%llx type %d.\n", | |
| 1254 | − vgpu->id, spt, we->val64, we->type); | |
| 1253 | + gvt_vgpu_err("fail: shadow page %p guest entry 0x%llx type %d.\n", | |
| 1254 | + spt, we->val64, we->type); | |
| 1255 | 1255 | return ret; |
| 1256 | 1256 | } |
| 1257 | 1257 | |
| @@ -1493,7 +1493,7 @@ static int shadow_mm(struct intel_vgpu_mm *mm) · 235 unmodified lines | ||
| 1493 | 1493 | |
| 1494 | 1494 | spt = ppgtt_populate_shadow_page_by_guest_entry(vgpu, &ge); |
| 1495 | 1495 | if (IS_ERR(spt)) { |
| 1496 | − gvt_err("fail to populate guest root pointer\n"); | |
| 1496 | + gvt_vgpu_err("fail to populate guest root pointer\n"); | |
| 1497 | 1497 | ret = PTR_ERR(spt); |
| 1498 | 1498 | goto fail; |
| 1499 | 1499 | } |
| @@ -1566,7 +1566,7 @@ struct intel_vgpu_mm *intel_vgpu_create_mm(struct intel_vgpu *vgpu, · 66 unmodified lines | ||
| 1566 | 1566 | |
| 1567 | 1567 | ret = gtt->mm_alloc_page_table(mm); |
| 1568 | 1568 | if (ret) { |
| 1569 | − gvt_err("fail to allocate page table for mm\n"); | |
| 1569 | + gvt_vgpu_err("fail to allocate page table for mm\n"); | |
| 1570 | 1570 | goto fail; |
| 1571 | 1571 | } |
| 1572 | 1572 | |
| @@ -1584,7 +1584,7 @@ struct intel_vgpu_mm *intel_vgpu_create_mm(struct intel_vgpu *vgpu, · 11 unmodified lines | ||
| 1584 | 1584 | } |
| 1585 | 1585 | return mm; |
| 1586 | 1586 | fail: |
| 1587 | − gvt_err("fail to create mm\n"); | |
| 1587 | + gvt_vgpu_err("fail to create mm\n"); | |
| 1588 | 1588 | if (mm) |
| 1589 | 1589 | intel_gvt_mm_unreference(mm); |
| 1590 | 1590 | return ERR_PTR(ret); |
| @@ -1760,7 +1760,7 @@ unsigned long intel_vgpu_gma_to_gpa(struct intel_vgpu_mm *mm, unsigned long gma) · 169 unmodified lines | ||
| 1760 | 1760 | mm->page_table_level, gma, gpa); |
| 1761 | 1761 | return gpa; |
| 1762 | 1762 | err: |
| 1763 | − gvt_err("invalid mm type: %d gma %lx\n", mm->type, gma); | |
| 1763 | + gvt_vgpu_err("invalid mm type: %d gma %lx\n", mm->type, gma); | |
| 1764 | 1764 | return INTEL_GVT_INVALID_ADDR; |
| 1765 | 1765 | } |
| 1766 | 1766 | |
| @@ -1836,8 +1836,7 @@ static int emulate_gtt_mmio_write(struct intel_vgpu *vgpu, unsigned int off, · 69 unmodified lines | ||
| 1836 | 1836 | if (ops->test_present(&e)) { |
| 1837 | 1837 | ret = gtt_entry_p2m(vgpu, &e, &m); |
| 1838 | 1838 | if (ret) { |
| 1839 | − gvt_err("vgpu%d: fail to translate guest gtt entry\n", | |
| 1840 | − vgpu->id); | |
| 1839 | + gvt_vgpu_err("fail to translate guest gtt entry\n"); | |
| 1841 | 1840 | return ret; |
| 1842 | 1841 | } |
| 1843 | 1842 | } else { |
| @@ -1893,14 +1892,14 @@ static int alloc_scratch_pages(struct intel_vgpu *vgpu, · 49 unmodified lines | ||
| 1893 | 1892 | |
| 1894 | 1893 | scratch_pt = (void *)get_zeroed_page(GFP_KERNEL); |
| 1895 | 1894 | if (!scratch_pt) { |
| 1896 | − gvt_err("fail to allocate scratch page\n"); | |
| 1895 | + gvt_vgpu_err("fail to allocate scratch page\n"); | |
| 1897 | 1896 | return -ENOMEM; |
| 1898 | 1897 | } |
| 1899 | 1898 | |
| 1900 | 1899 | daddr = dma_map_page(dev, virt_to_page(scratch_pt), 0, |
| 1901 | 1900 | 4096, PCI_DMA_BIDIRECTIONAL); |
| 1902 | 1901 | if (dma_mapping_error(dev, daddr)) { |
| 1903 | − gvt_err("fail to dmamap scratch_pt\n"); | |
| 1902 | + gvt_vgpu_err("fail to dmamap scratch_pt\n"); | |
| 1904 | 1903 | __free_page(virt_to_page(scratch_pt)); |
| 1905 | 1904 | return -ENOMEM; |
| 1906 | 1905 | } |
| @@ -2003,7 +2002,7 @@ int intel_vgpu_init_gtt(struct intel_vgpu *vgpu) · 96 unmodified lines | ||
| 2003 | 2002 | ggtt_mm = intel_vgpu_create_mm(vgpu, INTEL_GVT_MM_GGTT, |
| 2004 | 2003 | NULL, 1, 0); |
| 2005 | 2004 | if (IS_ERR(ggtt_mm)) { |
| 2006 | − gvt_err("fail to create mm for ggtt.\n"); | |
| 2005 | + gvt_vgpu_err("fail to create mm for ggtt.\n"); | |
| 2007 | 2006 | return PTR_ERR(ggtt_mm); |
| 2008 | 2007 | } |
| 2009 | 2008 | |
| @@ -2076,7 +2075,6 @@ static int setup_spt_oos(struct intel_gvt *gvt) · 66 unmodified lines | ||
| 2076 | 2075 | for (i = 0; i < preallocated_oos_pages; i++) { |
| 2077 | 2076 | oos_page = kzalloc(sizeof(*oos_page), GFP_KERNEL); |
| 2078 | 2077 | if (!oos_page) { |
| 2079 | − gvt_err("fail to pre-allocate oos page\n"); | |
| 2080 | 2078 | ret = -ENOMEM; |
| 2081 | 2079 | goto fail; |
| 2082 | 2080 | } |
| @@ -2166,7 +2164,7 @@ int intel_vgpu_g2v_create_ppgtt_mm(struct intel_vgpu *vgpu, · 83 unmodified lines | ||
| 2166 | 2164 | mm = intel_vgpu_create_mm(vgpu, INTEL_GVT_MM_PPGTT, |
| 2167 | 2165 | pdp, page_table_level, 0); |
| 2168 | 2166 | if (IS_ERR(mm)) { |
| 2169 | − gvt_err("fail to create mm\n"); | |
| 2167 | + gvt_vgpu_err("fail to create mm\n"); | |
| 2170 | 2168 | return PTR_ERR(mm); |
| 2171 | 2169 | } |
| 2172 | 2170 | } |
| @@ -2196,7 +2194,7 @@ int intel_vgpu_g2v_destroy_ppgtt_mm(struct intel_vgpu *vgpu, · 23 unmodified lines | ||
| 2196 | 2194 | |
| 2197 | 2195 | mm = intel_vgpu_find_ppgtt_mm(vgpu, page_table_level, pdp); |
| 2198 | 2196 | if (!mm) { |
| 2199 | − gvt_err("fail to find ppgtt instance.\n"); | |
| 2197 | + gvt_vgpu_err("fail to find ppgtt instance.\n"); | |
| 2200 | 2198 | return -EINVAL; |
| 2201 | 2199 | } |
| 2202 | 2200 | intel_gvt_mm_unreference(mm); |
| @@ -162,7 +162,6 @@ struct intel_vgpu { · 161 unmodified lines | ||
| 162 | 162 | atomic_t running_workload_num; |
| 163 | 163 | DECLARE_BITMAP(tlb_handle_pending, I915_NUM_ENGINES); |
| 164 | 164 | struct i915_gem_context *shadow_ctx; |
| 165 | − struct notifier_block shadow_ctx_notifier_block; | |
| 166 | 165 | |
| 167 | 166 | #if IS_ENABLED(CONFIG_DRM_I915_GVT_KVMGT) |
| 168 | 167 | struct { |
| @@ -233,6 +232,7 @@ struct intel_gvt { · 64 unmodified lines | ||
| 233 | 232 | struct intel_gvt_gtt gtt; |
| 234 | 233 | struct intel_gvt_opregion opregion; |
| 235 | 234 | struct intel_gvt_workload_scheduler scheduler; |
| 235 | + struct notifier_block shadow_ctx_notifier_block[I915_NUM_ENGINES]; | |
| 236 | 236 | DECLARE_HASHTABLE(cmd_table, GVT_CMD_HASH_BITS); |
| 237 | 237 | struct intel_vgpu_type *types; |
| 238 | 238 | unsigned int num_types; |
| @@ -181,11 +181,9 @@ static int sanitize_fence_mmio_access(struct intel_vgpu *vgpu, · 180 unmodified lines | ||
| 181 | 181 | GVT_FAILSAFE_UNSUPPORTED_GUEST); |
| 182 | 182 | |
| 183 | 183 | if (!vgpu->mmio.disable_warn_untrack) { |
| 184 | − gvt_err("vgpu%d: found oob fence register access\n", | |
| 185 | − vgpu->id); | |
| 186 | − gvt_err("vgpu%d: total fence %d, access fence %d\n", | |
| 187 | − vgpu->id, vgpu_fence_sz(vgpu), | |
| 188 | − fence_num); | |
| 184 | + gvt_vgpu_err("found oob fence register access\n"); | |
| 185 | + gvt_vgpu_err("total fence %d, access fence %d\n", | |
| 186 | + vgpu_fence_sz(vgpu), fence_num); | |
| 189 | 187 | } |
| 190 | 188 | memset(p_data, 0, bytes); |
| 191 | 189 | return -EINVAL; |
| @@ -249,7 +247,7 @@ static int mul_force_wake_write(struct intel_vgpu *vgpu, · 57 unmodified lines | ||
| 249 | 247 | break; |
| 250 | 248 | default: |
| 251 | 249 | /*should not hit here*/ |
| 252 | − gvt_err("invalid forcewake offset 0x%x\n", offset); | |
| 250 | + gvt_vgpu_err("invalid forcewake offset 0x%x\n", offset); | |
| 253 | 251 | return -EINVAL; |
| 254 | 252 | } |
| 255 | 253 | } else { |
| @@ -530,7 +528,7 @@ static int check_fdi_rx_train_status(struct intel_vgpu *vgpu, · 274 unmodified lines | ||
| 530 | 528 | fdi_tx_train_bits = FDI_LINK_TRAIN_PATTERN_2; |
| 531 | 529 | fdi_iir_check_bits = FDI_RX_SYMBOL_LOCK; |
| 532 | 530 | } else { |
| 533 | − gvt_err("Invalid train pattern %d\n", train_pattern); | |
| 531 | + gvt_vgpu_err("Invalid train pattern %d\n", train_pattern); | |
| 534 | 532 | return -EINVAL; |
| 535 | 533 | } |
| 536 | 534 | |
| @@ -588,7 +586,7 @@ static int update_fdi_rx_iir_status(struct intel_vgpu *vgpu, · 51 unmodified lines | ||
| 588 | 586 | else if (FDI_RX_IMR_TO_PIPE(offset) != INVALID_INDEX) |
| 589 | 587 | index = FDI_RX_IMR_TO_PIPE(offset); |
| 590 | 588 | else { |
| 591 | − gvt_err("Unsupport registers %x\n", offset); | |
| 589 | + gvt_vgpu_err("Unsupport registers %x\n", offset); | |
| 592 | 590 | return -EINVAL; |
| 593 | 591 | } |
| 594 | 592 | |
| @@ -818,7 +816,7 @@ static int dp_aux_ch_ctl_mmio_write(struct intel_vgpu *vgpu, · 223 unmodified lines | ||
| 818 | 816 | u32 data; |
| 819 | 817 | |
| 820 | 818 | if (!dpy_is_valid_port(port_index)) { |
| 821 | − gvt_err("GVT(%d): Unsupported DP port access!\n", vgpu->id); | |
| 819 | + gvt_vgpu_err("Unsupported DP port access!\n"); | |
| 822 | 820 | return 0; |
| 823 | 821 | } |
| 824 | 822 | |
| @@ -1016,8 +1014,7 @@ static void write_virtual_sbi_register(struct intel_vgpu *vgpu, · 191 unmodified lines | ||
| 1016 | 1014 | |
| 1017 | 1015 | if (i == num) { |
| 1018 | 1016 | if (num == SBI_REG_MAX) { |
| 1019 | − gvt_err("vgpu%d: SBI caching meets maximum limits\n", | |
| 1020 | − vgpu->id); | |
| 1017 | + gvt_vgpu_err("SBI caching meets maximum limits\n"); | |
| 1021 | 1018 | return; |
| 1022 | 1019 | } |
| 1023 | 1020 | display->sbi.number++; |
| @@ -1097,7 +1094,7 @@ static int pvinfo_mmio_read(struct intel_vgpu *vgpu, unsigned int offset, · 73 unmodified lines | ||
| 1097 | 1094 | break; |
| 1098 | 1095 | } |
| 1099 | 1096 | if (invalid_read) |
| 1100 | − gvt_err("invalid pvinfo read: [%x:%x] = %x\n", | |
| 1097 | + gvt_vgpu_err("invalid pvinfo read: [%x:%x] = %x\n", | |
| 1101 | 1098 | offset, bytes, *(u32 *)p_data); |
| 1102 | 1099 | vgpu->pv_notified = true; |
| 1103 | 1100 | return 0; |
| @@ -1125,7 +1122,7 @@ static int handle_g2v_notification(struct intel_vgpu *vgpu, int notification) · 21 unmodified lines | ||
| 1125 | 1122 | case 1: /* Remove this in guest driver. */ |
| 1126 | 1123 | break; |
| 1127 | 1124 | default: |
| 1128 | − gvt_err("Invalid PV notification %d\n", notification); | |
| 1125 | + gvt_vgpu_err("Invalid PV notification %d\n", notification); | |
| 1129 | 1126 | } |
| 1130 | 1127 | return ret; |
| 1131 | 1128 | } |
| @@ -1181,7 +1178,7 @@ static int pvinfo_mmio_write(struct intel_vgpu *vgpu, unsigned int offset, · 49 unmodified lines | ||
| 1181 | 1178 | enter_failsafe_mode(vgpu, GVT_FAILSAFE_INSUFFICIENT_RESOURCE); |
| 1182 | 1179 | break; |
| 1183 | 1180 | default: |
| 1184 | − gvt_err("invalid pvinfo write offset %x bytes %x data %x\n", | |
| 1181 | + gvt_vgpu_err("invalid pvinfo write offset %x bytes %x data %x\n", | |
| 1185 | 1182 | offset, bytes, data); |
| 1186 | 1183 | break; |
| 1187 | 1184 | } |
| @@ -1415,7 +1412,8 @@ static int elsp_mmio_write(struct intel_vgpu *vgpu, unsigned int offset, · 227 unmodified lines | ||
| 1415 | 1412 | if (execlist->elsp_dwords.index == 3) { |
| 1416 | 1413 | ret = intel_vgpu_submit_execlist(vgpu, ring_id); |
| 1417 | 1414 | if(ret) |
| 1418 | − gvt_err("fail submit workload on ring %d\n", ring_id); | |
| 1415 | + gvt_vgpu_err("fail submit workload on ring %d\n", | |
| 1416 | + ring_id); | |
| 1419 | 1417 | } |
| 1420 | 1418 | |
| 1421 | 1419 | ++execlist->elsp_dwords.index; |
| @@ -2988,3 +2986,20 @@ int intel_vgpu_default_mmio_write(struct intel_vgpu *vgpu, unsigned int offset, · 1566 unmodified lines | ||
| 2988 | 2986 | write_vreg(vgpu, offset, p_data, bytes); |
| 2989 | 2987 | return 0; |
| 2990 | 2988 | } |
| 2989 | + | |
| 2990 | +/** | |
| 2991 | + * intel_gvt_in_force_nonpriv_whitelist - if a mmio is in whitelist to be | |
| 2992 | + * force-nopriv register | |
| 2993 | + * | |
| 2994 | + * @gvt: a GVT device | |
| 2995 | + * @offset: register offset | |
| 2996 | + * | |
| 2997 | + * Returns: | |
| 2998 | + * True if the register is in force-nonpriv whitelist; | |
| 2999 | + * False if outside; | |
| 3000 | + */ | |
| 3001 | +bool intel_gvt_in_force_nonpriv_whitelist(struct intel_gvt *gvt, | |
| 3002 | + unsigned int offset) | |
| 3003 | +{ | |
| 3004 | + return in_whitelist(offset); | |
| 3005 | +} | |
| @@ -426,7 +426,7 @@ static void kvmgt_protect_table_del(struct kvmgt_guest_info *info, · 425 unmodified lines | ||
| 426 | 426 | |
| 427 | 427 | static int intel_vgpu_create(struct kobject *kobj, struct mdev_device *mdev) |
| 428 | 428 | { |
| 429 | − struct intel_vgpu *vgpu; | |
| 429 | + struct intel_vgpu *vgpu = NULL; | |
| 430 | 430 | struct intel_vgpu_type *type; |
| 431 | 431 | struct device *pdev; |
| 432 | 432 | void *gvt; |
| @@ -437,7 +437,7 @@ static int intel_vgpu_create(struct kobject *kobj, struct mdev_device *mdev) · 4 unmodified lines | ||
| 437 | 437 | |
| 438 | 438 | type = intel_gvt_find_vgpu_type(gvt, kobject_name(kobj)); |
| 439 | 439 | if (!type) { |
| 440 | − gvt_err("failed to find type %s to create\n", | |
| 440 | + gvt_vgpu_err("failed to find type %s to create\n", | |
| 441 | 441 | kobject_name(kobj)); |
| 442 | 442 | ret = -EINVAL; |
| 443 | 443 | goto out; |
| @@ -446,7 +446,7 @@ static int intel_vgpu_create(struct kobject *kobj, struct mdev_device *mdev) · 2 unmodified lines | ||
| 446 | 446 | vgpu = intel_gvt_ops->vgpu_create(gvt, type); |
| 447 | 447 | if (IS_ERR_OR_NULL(vgpu)) { |
| 448 | 448 | ret = vgpu == NULL ? -EFAULT : PTR_ERR(vgpu); |
| 449 | − gvt_err("failed to create intel vgpu: %d\n", ret); | |
| 449 | + gvt_vgpu_err("failed to create intel vgpu: %d\n", ret); | |
| 450 | 450 | goto out; |
| 451 | 451 | } |
| 452 | 452 | |
| @@ -526,7 +526,8 @@ static int intel_vgpu_open(struct mdev_device *mdev) · 73 unmodified lines | ||
| 526 | 526 | ret = vfio_register_notifier(mdev_dev(mdev), VFIO_IOMMU_NOTIFY, &events, |
| 527 | 527 | &vgpu->vdev.iommu_notifier); |
| 528 | 528 | if (ret != 0) { |
| 529 | − gvt_err("vfio_register_notifier for iommu failed: %d\n", ret); | |
| 529 | + gvt_vgpu_err("vfio_register_notifier for iommu failed: %d\n", | |
| 530 | + ret); | |
| 530 | 531 | goto out; |
| 531 | 532 | } |
| 532 | 533 | |
| @@ -534,7 +535,8 @@ static int intel_vgpu_open(struct mdev_device *mdev) · 1 unmodified line | ||
| 534 | 535 | ret = vfio_register_notifier(mdev_dev(mdev), VFIO_GROUP_NOTIFY, &events, |
| 535 | 536 | &vgpu->vdev.group_notifier); |
| 536 | 537 | if (ret != 0) { |
| 537 | − gvt_err("vfio_register_notifier for group failed: %d\n", ret); | |
| 538 | + gvt_vgpu_err("vfio_register_notifier for group failed: %d\n", | |
| 539 | + ret); | |
| 538 | 540 | goto undo_iommu; |
| 539 | 541 | } |
| 540 | 542 | |
| @@ -635,7 +637,7 @@ static ssize_t intel_vgpu_rw(struct mdev_device *mdev, char *buf, · 94 unmodified lines | ||
| 635 | 637 | |
| 636 | 638 | |
| 637 | 639 | if (index >= VFIO_PCI_NUM_REGIONS) { |
| 638 | − gvt_err("invalid index: %u\n", index); | |
| 640 | + gvt_vgpu_err("invalid index: %u\n", index); | |
| 639 | 641 | return -EINVAL; |
| 640 | 642 | } |
| 641 | 643 | |
| @@ -669,7 +671,7 @@ static ssize_t intel_vgpu_rw(struct mdev_device *mdev, char *buf, · 27 unmodified lines | ||
| 669 | 671 | case VFIO_PCI_VGA_REGION_INDEX: |
| 670 | 672 | case VFIO_PCI_ROM_REGION_INDEX: |
| 671 | 673 | default: |
| 672 | − gvt_err("unsupported region: %u\n", index); | |
| 674 | + gvt_vgpu_err("unsupported region: %u\n", index); | |
| 673 | 675 | } |
| 674 | 676 | |
| 675 | 677 | return ret == 0 ? count : ret; |
| @@ -861,7 +863,7 @@ static int intel_vgpu_set_msi_trigger(struct intel_vgpu *vgpu, · 185 unmodified lines | ||
| 861 | 863 | |
| 862 | 864 | trigger = eventfd_ctx_fdget(fd); |
| 863 | 865 | if (IS_ERR(trigger)) { |
| 864 | − gvt_err("eventfd_ctx_fdget failed\n"); | |
| 866 | + gvt_vgpu_err("eventfd_ctx_fdget failed\n"); | |
| 865 | 867 | return PTR_ERR(trigger); |
| 866 | 868 | } |
| 867 | 869 | vgpu->vdev.msi_trigger = trigger; |
| @@ -1120,7 +1122,7 @@ static long intel_vgpu_ioctl(struct mdev_device *mdev, unsigned int cmd, · 252 unmodified lines | ||
| 1120 | 1122 | ret = vfio_set_irqs_validate_and_prepare(&hdr, max, |
| 1121 | 1123 | VFIO_PCI_NUM_IRQS, &data_size); |
| 1122 | 1124 | if (ret) { |
| 1123 | − gvt_err("intel:vfio_set_irqs_validate_and_prepare failed\n"); | |
| 1125 | + gvt_vgpu_err("intel:vfio_set_irqs_validate_and_prepare failed\n"); | |
| 1124 | 1126 | return -EINVAL; |
| 1125 | 1127 | } |
| 1126 | 1128 | if (data_size) { |
| @@ -1310,7 +1312,7 @@ static int kvmgt_guest_init(struct mdev_device *mdev) · 183 unmodified lines | ||
| 1310 | 1312 | |
| 1311 | 1313 | kvm = vgpu->vdev.kvm; |
| 1312 | 1314 | if (!kvm || kvm->mm != current->mm) { |
| 1313 | − gvt_err("KVM is required to use Intel vGPU\n"); | |
| 1315 | + gvt_vgpu_err("KVM is required to use Intel vGPU\n"); | |
| 1314 | 1316 | return -ESRCH; |
| 1315 | 1317 | } |
| 1316 | 1318 | |
| @@ -1337,8 +1339,10 @@ static int kvmgt_guest_init(struct mdev_device *mdev) · 20 unmodified lines | ||
| 1337 | 1339 | |
| 1338 | 1340 | static bool kvmgt_guest_exit(struct kvmgt_guest_info *info) |
| 1339 | 1341 | { |
| 1342 | + struct intel_vgpu *vgpu = info->vgpu; | |
| 1343 | + | |
| 1340 | 1344 | if (!info) { |
| 1341 | − gvt_err("kvmgt_guest_info invalid\n"); | |
| 1345 | + gvt_vgpu_err("kvmgt_guest_info invalid\n"); | |
| 1342 | 1346 | return false; |
| 1343 | 1347 | } |
| 1344 | 1348 | |
| @@ -1383,12 +1387,14 @@ static unsigned long kvmgt_gfn_to_pfn(unsigned long handle, unsigned long gfn) · 38 unmodified lines | ||
| 1383 | 1387 | unsigned long iova, pfn; |
| 1384 | 1388 | struct kvmgt_guest_info *info; |
| 1385 | 1389 | struct device *dev; |
| 1390 | + struct intel_vgpu *vgpu; | |
| 1386 | 1391 | int rc; |
| 1387 | 1392 | |
| 1388 | 1393 | if (!handle_valid(handle)) |
| 1389 | 1394 | return INTEL_GVT_INVALID_ADDR; |
| 1390 | 1395 | |
| 1391 | 1396 | info = (struct kvmgt_guest_info *)handle; |
| 1397 | + vgpu = info->vgpu; | |
| 1392 | 1398 | iova = gvt_cache_find(info->vgpu, gfn); |
| 1393 | 1399 | if (iova != INTEL_GVT_INVALID_ADDR) |
| 1394 | 1400 | return iova; |
| @@ -1397,13 +1403,14 @@ static unsigned long kvmgt_gfn_to_pfn(unsigned long handle, unsigned long gfn) · 2 unmodified lines | ||
| 1397 | 1403 | dev = mdev_dev(info->vgpu->vdev.mdev); |
| 1398 | 1404 | rc = vfio_pin_pages(dev, &gfn, 1, IOMMU_READ | IOMMU_WRITE, &pfn); |
| 1399 | 1405 | if (rc != 1) { |
| 1400 | − gvt_err("vfio_pin_pages failed for gfn 0x%lx: %d\n", gfn, rc); | |
| 1406 | + gvt_vgpu_err("vfio_pin_pages failed for gfn 0x%lx: %d\n", | |
| 1407 | + gfn, rc); | |
| 1401 | 1408 | return INTEL_GVT_INVALID_ADDR; |
| 1402 | 1409 | } |
| 1403 | 1410 | /* transfer to host iova for GFX to use DMA */ |
| 1404 | 1411 | rc = gvt_dma_map_iova(info->vgpu, pfn, &iova); |
| 1405 | 1412 | if (rc) { |
| 1406 | − gvt_err("gvt_dma_map_iova failed for gfn: 0x%lx\n", gfn); | |
| 1413 | + gvt_vgpu_err("gvt_dma_map_iova failed for gfn: 0x%lx\n", gfn); | |
| 1407 | 1414 | vfio_unpin_pages(dev, &gfn, 1); |
| 1408 | 1415 | return INTEL_GVT_INVALID_ADDR; |
| 1409 | 1416 | } |
| @@ -1417,7 +1424,7 @@ static int kvmgt_rw_gpa(unsigned long handle, unsigned long gpa, · 7 unmodified lines | ||
| 1417 | 1424 | { |
| 1418 | 1425 | struct kvmgt_guest_info *info; |
| 1419 | 1426 | struct kvm *kvm; |
| 1420 | − int ret; | |
| 1427 | + int idx, ret; | |
| 1421 | 1428 | bool kthread = current->mm == NULL; |
| 1422 | 1429 | |
| 1423 | 1430 | if (!handle_valid(handle)) |
| @@ -1429,8 +1436,10 @@ static int kvmgt_rw_gpa(unsigned long handle, unsigned long gpa, · 5 unmodified lines | ||
| 1429 | 1436 | if (kthread) |
| 1430 | 1437 | use_mm(kvm->mm); |
| 1431 | 1438 | |
| 1439 | + idx = srcu_read_lock(&kvm->srcu); | |
| 1432 | 1440 | ret = write ? kvm_write_guest(kvm, gpa, buf, len) : |
| 1433 | 1441 | kvm_read_guest(kvm, gpa, buf, len); |
| 1442 | + srcu_read_unlock(&kvm->srcu, idx); | |
| 1434 | 1443 | |
| 1435 | 1444 | if (kthread) |
| 1436 | 1445 | unuse_mm(kvm->mm); |
| @@ -142,10 +142,10 @@ int intel_vgpu_emulate_mmio_read(struct intel_vgpu *vgpu, uint64_t pa, · 141 unmodified lines | ||
| 142 | 142 | ret = intel_gvt_hypervisor_read_gpa(vgpu, pa, |
| 143 | 143 | p_data, bytes); |
| 144 | 144 | if (ret) { |
| 145 | − gvt_err("vgpu%d: guest page read error %d, " | |
| 145 | + gvt_vgpu_err("guest page read error %d, " | |
| 146 | 146 | "gfn 0x%lx, pa 0x%llx, var 0x%x, len %d\n", |
| 147 | − vgpu->id, ret, | |
| 148 | − gp->gfn, pa, *(u32 *)p_data, bytes); | |
| 147 | + ret, gp->gfn, pa, *(u32 *)p_data, | |
| 148 | + bytes); | |
| 149 | 149 | } |
| 150 | 150 | mutex_unlock(&gvt->lock); |
| 151 | 151 | return ret; |
| @@ -200,14 +200,13 @@ int intel_vgpu_emulate_mmio_read(struct intel_vgpu *vgpu, uint64_t pa, · 48 unmodified lines | ||
| 200 | 200 | ret = intel_vgpu_default_mmio_read(vgpu, offset, p_data, bytes); |
| 201 | 201 | |
| 202 | 202 | if (!vgpu->mmio.disable_warn_untrack) { |
| 203 | − gvt_err("vgpu%d: read untracked MMIO %x(%dB) val %x\n", | |
| 204 | − vgpu->id, offset, bytes, *(u32 *)p_data); | |
| 203 | + gvt_vgpu_err("read untracked MMIO %x(%dB) val %x\n", | |
| 204 | + offset, bytes, *(u32 *)p_data); | |
| 205 | 205 | |
| 206 | 206 | if (offset == 0x206c) { |
| 207 | − gvt_err("------------------------------------------\n"); | |
| 208 | − gvt_err("vgpu%d: likely triggers a gfx reset\n", | |
| 209 | − vgpu->id); | |
| 210 | − gvt_err("------------------------------------------\n"); | |
| 207 | + gvt_vgpu_err("------------------------------------------\n"); | |
| 208 | + gvt_vgpu_err("likely triggers a gfx reset\n"); | |
| 209 | + gvt_vgpu_err("------------------------------------------\n"); | |
| 211 | 210 | vgpu->mmio.disable_warn_untrack = true; |
| 212 | 211 | } |
| 213 | 212 | } |
| @@ -220,8 +219,8 @@ int intel_vgpu_emulate_mmio_read(struct intel_vgpu *vgpu, uint64_t pa, · 6 unmodified lines | ||
| 220 | 219 | mutex_unlock(&gvt->lock); |
| 221 | 220 | return 0; |
| 222 | 221 | err: |
| 223 | − gvt_err("vgpu%d: fail to emulate MMIO read %08x len %d\n", | |
| 224 | − vgpu->id, offset, bytes); | |
| 222 | + gvt_vgpu_err("fail to emulate MMIO read %08x len %d\n", | |
| 223 | + offset, bytes); | |
| 225 | 224 | mutex_unlock(&gvt->lock); |
| 226 | 225 | return ret; |
| 227 | 226 | } |
| @@ -259,10 +258,11 @@ int intel_vgpu_emulate_mmio_write(struct intel_vgpu *vgpu, uint64_t pa, · 31 unmodified lines | ||
| 259 | 258 | if (gp) { |
| 260 | 259 | ret = gp->handler(gp, pa, p_data, bytes); |
| 261 | 260 | if (ret) { |
| 262 | − gvt_err("vgpu%d: guest page write error %d, " | |
| 263 | − "gfn 0x%lx, pa 0x%llx, var 0x%x, len %d\n", | |
| 264 | − vgpu->id, ret, | |
| 265 | − gp->gfn, pa, *(u32 *)p_data, bytes); | |
| 261 | + gvt_err("guest page write error %d, " | |
| 262 | + "gfn 0x%lx, pa 0x%llx, " | |
| 263 | + "var 0x%x, len %d\n", | |
| 264 | + ret, gp->gfn, pa, | |
| 265 | + *(u32 *)p_data, bytes); | |
| 266 | 266 | } |
| 267 | 267 | mutex_unlock(&gvt->lock); |
| 268 | 268 | return ret; |
| @@ -329,8 +329,8 @@ int intel_vgpu_emulate_mmio_write(struct intel_vgpu *vgpu, uint64_t pa, · 60 unmodified lines | ||
| 329 | 329 | |
| 330 | 330 | /* all register bits are RO. */ |
| 331 | 331 | if (ro_mask == ~(u64)0) { |
| 332 | − gvt_err("vgpu%d: try to write RO reg %x\n", | |
| 333 | − vgpu->id, offset); | |
| 332 | + gvt_vgpu_err("try to write RO reg %x\n", | |
| 333 | + offset); | |
| 334 | 334 | ret = 0; |
| 335 | 335 | goto out; |
| 336 | 336 | } |
| @@ -360,8 +360,8 @@ out: · 23 unmodified lines | ||
| 360 | 360 | mutex_unlock(&gvt->lock); |
| 361 | 361 | return 0; |
| 362 | 362 | err: |
| 363 | − gvt_err("vgpu%d: fail to emulate MMIO write %08x len %d\n", | |
| 364 | − vgpu->id, offset, bytes); | |
| 363 | + gvt_vgpu_err("fail to emulate MMIO write %08x len %d\n", offset, | |
| 364 | + bytes); | |
| 365 | 365 | mutex_unlock(&gvt->lock); |
| 366 | 366 | return ret; |
| 367 | 367 | } |
| @@ -107,4 +107,7 @@ int intel_vgpu_default_mmio_read(struct intel_vgpu *vgpu, unsigned int offset, · 106 unmodified lines | ||
| 107 | 107 | void *p_data, unsigned int bytes); |
| 108 | 108 | int intel_vgpu_default_mmio_write(struct intel_vgpu *vgpu, unsigned int offset, |
| 109 | 109 | void *p_data, unsigned int bytes); |
| 110 | + | |
| 111 | +bool intel_gvt_in_force_nonpriv_whitelist(struct intel_gvt *gvt, | |
| 112 | + unsigned int offset); | |
| 110 | 113 | #endif |
| @@ -67,14 +67,15 @@ static int map_vgpu_opregion(struct intel_vgpu *vgpu, bool map) · 66 unmodified lines | ||
| 67 | 67 | mfn = intel_gvt_hypervisor_virt_to_mfn(vgpu_opregion(vgpu)->va |
| 68 | 68 | + i * PAGE_SIZE); |
| 69 | 69 | if (mfn == INTEL_GVT_INVALID_ADDR) { |
| 70 | − gvt_err("fail to get MFN from VA\n"); | |
| 70 | + gvt_vgpu_err("fail to get MFN from VA\n"); | |
| 71 | 71 | return -EINVAL; |
| 72 | 72 | } |
| 73 | 73 | ret = intel_gvt_hypervisor_map_gfn_to_mfn(vgpu, |
| 74 | 74 | vgpu_opregion(vgpu)->gfn[i], |
| 75 | 75 | mfn, 1, map); |
| 76 | 76 | if (ret) { |
| 77 | − gvt_err("fail to map GFN to MFN, errno: %d\n", ret); | |
| 77 | + gvt_vgpu_err("fail to map GFN to MFN, errno: %d\n", | |
| 78 | + ret); | |
| 78 | 79 | return ret; |
| 79 | 80 | } |
| 80 | 81 | } |
| @@ -287,7 +288,7 @@ int intel_vgpu_emulate_opregion_request(struct intel_vgpu *vgpu, u32 swsci) · 206 unmodified lines | ||
| 287 | 288 | parm = vgpu_opregion(vgpu)->va + INTEL_GVT_OPREGION_PARM; |
| 288 | 289 | |
| 289 | 290 | if (!(swsci & SWSCI_SCI_SELECT)) { |
| 290 | − gvt_err("vgpu%d: requesting SMI service\n", vgpu->id); | |
| 291 | + gvt_vgpu_err("requesting SMI service\n"); | |
| 291 | 292 | return 0; |
| 292 | 293 | } |
| 293 | 294 | /* ignore non 0->1 trasitions */ |
| @@ -300,9 +301,8 @@ int intel_vgpu_emulate_opregion_request(struct intel_vgpu *vgpu, u32 swsci) · 6 unmodified lines | ||
| 300 | 301 | func = GVT_OPREGION_FUNC(*scic); |
| 301 | 302 | subfunc = GVT_OPREGION_SUBFUNC(*scic); |
| 302 | 303 | if (!querying_capabilities(*scic)) { |
| 303 | − gvt_err("vgpu%d: requesting runtime service: func \"%s\"," | |
| 304 | + gvt_vgpu_err("requesting runtime service: func \"%s\"," | |
| 304 | 305 | " subfunc \"%s\"\n", |
| 305 | − vgpu->id, | |
| 306 | 306 | opregion_func_name(func), |
| 307 | 307 | opregion_subfunc_name(subfunc)); |
| 308 | 308 | /* |
| @@ -167,7 +167,7 @@ static void handle_tlb_pending_event(struct intel_vgpu *vgpu, int ring_id) · 166 unmodified lines | ||
| 167 | 167 | I915_WRITE_FW(reg, 0x1); |
| 168 | 168 | |
| 169 | 169 | if (wait_for_atomic((I915_READ_FW(reg) == 0), 50)) |
| 170 | − gvt_err("timeout in invalidate ring (%d) tlb\n", ring_id); | |
| 170 | + gvt_vgpu_err("timeout in invalidate ring (%d) tlb\n", ring_id); | |
| 171 | 171 | else |
| 172 | 172 | vgpu_vreg(vgpu, regs[ring_id]) = 0; |
| 173 | 173 | |
| @@ -101,7 +101,7 @@ struct tbs_sched_data { · 100 unmodified lines | ||
| 101 | 101 | struct list_head runq_head; |
| 102 | 102 | }; |
| 103 | 103 | |
| 104 | −#define GVT_DEFAULT_TIME_SLICE (1 * HZ / 1000) | |
| 104 | +#define GVT_DEFAULT_TIME_SLICE (msecs_to_jiffies(1)) | |
| 105 | 105 | |
| 106 | 106 | static void tbs_sched_func(struct work_struct *work) |
| 107 | 107 | { |
| @@ -223,7 +223,7 @@ static void tbs_sched_start_schedule(struct intel_vgpu *vgpu) · 115 unmodified lines | ||
| 223 | 223 | return; |
| 224 | 224 | |
| 225 | 225 | list_add_tail(&vgpu_data->list, &sched_data->runq_head); |
| 226 | − schedule_delayed_work(&sched_data->work, sched_data->period); | |
| 226 | + schedule_delayed_work(&sched_data->work, 0); | |
| 227 | 227 | } |
| 228 | 228 | |
| 229 | 229 | static void tbs_sched_stop_schedule(struct intel_vgpu *vgpu) |
| @@ -84,7 +84,7 @@ static int populate_shadow_context(struct intel_vgpu_workload *workload) · 83 unmodified lines | ||
| 84 | 84 | (u32)((workload->ctx_desc.lrca + i) << |
| 85 | 85 | GTT_PAGE_SHIFT)); |
| 86 | 86 | if (context_gpa == INTEL_GVT_INVALID_ADDR) { |
| 87 | − gvt_err("Invalid guest context descriptor\n"); | |
| 87 | + gvt_vgpu_err("Invalid guest context descriptor\n"); | |
| 88 | 88 | return -EINVAL; |
| 89 | 89 | } |
| 90 | 90 | |
| @@ -130,12 +130,10 @@ static int populate_shadow_context(struct intel_vgpu_workload *workload) · 39 unmodified lines | ||
| 130 | 130 | static int shadow_context_status_change(struct notifier_block *nb, |
| 131 | 131 | unsigned long action, void *data) |
| 132 | 132 | { |
| 133 | − struct intel_vgpu *vgpu = container_of(nb, | |
| 134 | − struct intel_vgpu, shadow_ctx_notifier_block); | |
| 135 | − struct drm_i915_gem_request *req = | |
| 136 | − (struct drm_i915_gem_request *)data; | |
| 137 | − struct intel_gvt_workload_scheduler *scheduler = | |
| 138 | − &vgpu->gvt->scheduler; | |
| 133 | + struct drm_i915_gem_request *req = (struct drm_i915_gem_request *)data; | |
| 134 | + struct intel_gvt *gvt = container_of(nb, struct intel_gvt, | |
| 135 | + shadow_ctx_notifier_block[req->engine->id]); | |
| 136 | + struct intel_gvt_workload_scheduler *scheduler = &gvt->scheduler; | |
| 139 | 137 | struct intel_vgpu_workload *workload = |
| 140 | 138 | scheduler->current_workload[req->engine->id]; |
| 141 | 139 | |
| @@ -175,7 +173,9 @@ static int dispatch_workload(struct intel_vgpu_workload *workload) · 33 unmodified lines | ||
| 175 | 173 | int ring_id = workload->ring_id; |
| 176 | 174 | struct i915_gem_context *shadow_ctx = workload->vgpu->shadow_ctx; |
| 177 | 175 | struct drm_i915_private *dev_priv = workload->vgpu->gvt->dev_priv; |
| 176 | + struct intel_engine_cs *engine = dev_priv->engine[ring_id]; | |
| 178 | 177 | struct drm_i915_gem_request *rq; |
| 178 | + struct intel_vgpu *vgpu = workload->vgpu; | |
| 179 | 179 | int ret; |
| 180 | 180 | |
| 181 | 181 | gvt_dbg_sched("ring id %d prepare to dispatch workload %p\n", |
| @@ -187,9 +187,24 @@ static int dispatch_workload(struct intel_vgpu_workload *workload) · 5 unmodified lines | ||
| 187 | 187 | |
| 188 | 188 | mutex_lock(&dev_priv->drm.struct_mutex); |
| 189 | 189 | |
| 190 | + /* pin shadow context by gvt even the shadow context will be pinned | |
| 191 | + * when i915 alloc request. That is because gvt will update the guest | |
| 192 | + * context from shadow context when workload is completed, and at that | |
| 193 | + * moment, i915 may already unpined the shadow context to make the | |
| 194 | + * shadow_ctx pages invalid. So gvt need to pin itself. After update | |
| 195 | + * the guest context, gvt can unpin the shadow_ctx safely. | |
| 196 | + */ | |
| 197 | + ret = engine->context_pin(engine, shadow_ctx); | |
| 198 | + if (ret) { | |
| 199 | + gvt_vgpu_err("fail to pin shadow context\n"); | |
| 200 | + workload->status = ret; | |
| 201 | + mutex_unlock(&dev_priv->drm.struct_mutex); | |
| 202 | + return ret; | |
| 203 | + } | |
| 204 | + | |
| 190 | 205 | rq = i915_gem_request_alloc(dev_priv->engine[ring_id], shadow_ctx); |
| 191 | 206 | if (IS_ERR(rq)) { |
| 192 | − gvt_err("fail to allocate gem request\n"); | |
| 207 | + gvt_vgpu_err("fail to allocate gem request\n"); | |
| 193 | 208 | ret = PTR_ERR(rq); |
| 194 | 209 | goto out; |
| 195 | 210 | } |
| @@ -202,9 +217,12 @@ static int dispatch_workload(struct intel_vgpu_workload *workload) · 6 unmodified lines | ||
| 202 | 217 | if (ret) |
| 203 | 218 | goto out; |
| 204 | 219 | |
| 205 | − ret = intel_gvt_scan_and_shadow_wa_ctx(&workload->wa_ctx); | |
| 206 | − if (ret) | |
| 207 | − goto out; | |
| 220 | + if ((workload->ring_id == RCS) && | |
| 221 | + (workload->wa_ctx.indirect_ctx.size != 0)) { | |
| 222 | + ret = intel_gvt_scan_and_shadow_wa_ctx(&workload->wa_ctx); | |
| 223 | + if (ret) | |
| 224 | + goto out; | |
| 225 | + } | |
| 208 | 226 | |
| 209 | 227 | ret = populate_shadow_context(workload); |
| 210 | 228 | if (ret) |
| @@ -227,6 +245,9 @@ out: · 16 unmodified lines | ||
| 227 | 245 | |
| 228 | 246 | if (!IS_ERR_OR_NULL(rq)) |
| 229 | 247 | i915_add_request_no_flush(rq); |
| 248 | + else | |
| 249 | + engine->context_unpin(engine, shadow_ctx); | |
| 250 | + | |
| 230 | 251 | mutex_unlock(&dev_priv->drm.struct_mutex); |
| 231 | 252 | return ret; |
| 232 | 253 | } |
| @@ -322,7 +343,7 @@ static void update_guest_context(struct intel_vgpu_workload *workload) · 89 unmodified lines | ||
| 322 | 343 | (u32)((workload->ctx_desc.lrca + i) << |
| 323 | 344 | GTT_PAGE_SHIFT)); |
| 324 | 345 | if (context_gpa == INTEL_GVT_INVALID_ADDR) { |
| 325 | − gvt_err("invalid guest context descriptor\n"); | |
| 346 | + gvt_vgpu_err("invalid guest context descriptor\n"); | |
| 326 | 347 | return; |
| 327 | 348 | } |
| 328 | 349 | |
| @@ -376,6 +397,10 @@ static void complete_current_workload(struct intel_gvt *gvt, int ring_id) · 47 unmodified lines | ||
| 376 | 397 | * For the workload w/o request, directly complete the workload. |
| 377 | 398 | */ |
| 378 | 399 | if (workload->req) { |
| 400 | + struct drm_i915_private *dev_priv = | |
| 401 | + workload->vgpu->gvt->dev_priv; | |
| 402 | + struct intel_engine_cs *engine = | |
| 403 | + dev_priv->engine[workload->ring_id]; | |
| 379 | 404 | wait_event(workload->shadow_ctx_status_wq, |
| 380 | 405 | !atomic_read(&workload->shadow_ctx_active)); |
| 381 | 406 | |
| @@ -388,6 +413,10 @@ static void complete_current_workload(struct intel_gvt *gvt, int ring_id) · 6 unmodified lines | ||
| 388 | 413 | INTEL_GVT_EVENT_MAX) |
| 389 | 414 | intel_vgpu_trigger_virtual_event(vgpu, event); |
| 390 | 415 | } |
| 416 | + mutex_lock(&dev_priv->drm.struct_mutex); | |
| 417 | + /* unpin shadow ctx as the shadow_ctx update is done */ | |
| 418 | + engine->context_unpin(engine, workload->vgpu->shadow_ctx); | |
| 419 | + mutex_unlock(&dev_priv->drm.struct_mutex); | |
| 391 | 420 | } |
| 392 | 421 | |
| 393 | 422 | gvt_dbg_sched("ring id %d complete workload %p status %d\n", |
| @@ -417,6 +446,7 @@ static int workload_thread(void *priv) · 23 unmodified lines | ||
| 417 | 446 | int ring_id = p->ring_id; |
| 418 | 447 | struct intel_gvt_workload_scheduler *scheduler = &gvt->scheduler; |
| 419 | 448 | struct intel_vgpu_workload *workload = NULL; |
| 449 | + struct intel_vgpu *vgpu = NULL; | |
| 420 | 450 | int ret; |
| 421 | 451 | bool need_force_wake = IS_SKYLAKE(gvt->dev_priv); |
| 422 | 452 | DEFINE_WAIT_FUNC(wait, woken_wake_function); |
| @@ -459,25 +489,14 @@ static int workload_thread(void *priv) · 36 unmodified lines | ||
| 459 | 489 | mutex_unlock(&gvt->lock); |
| 460 | 490 | |
| 461 | 491 | if (ret) { |
| 462 | − gvt_err("fail to dispatch workload, skip\n"); | |
| 492 | + vgpu = workload->vgpu; | |
| 493 | + gvt_vgpu_err("fail to dispatch workload, skip\n"); | |
| 463 | 494 | goto complete; |
| 464 | 495 | } |
| 465 | 496 | |
| 466 | 497 | gvt_dbg_sched("ring id %d wait workload %p\n", |
| 467 | 498 | workload->ring_id, workload); |
| 468 | −retry: | |
| 469 | − i915_wait_request(workload->req, | |
| 470 | − 0, MAX_SCHEDULE_TIMEOUT); | |
| 471 | − /* I915 has replay mechanism and a request will be replayed | |
| 472 | − * if there is i915 reset. So the seqno will be updated anyway. | |
| 473 | − * If the seqno is not updated yet after waiting, which means | |
| 474 | − * the replay may still be in progress and we can wait again. | |
| 475 | − */ | |
| 476 | − if (!i915_gem_request_completed(workload->req)) { | |
| 477 | − gvt_dbg_sched("workload %p not completed, wait again\n", | |
| 478 | − workload); | |
| 479 | − goto retry; | |
| 480 | − } | |
| 499 | + i915_wait_request(workload->req, 0, MAX_SCHEDULE_TIMEOUT); | |
| 481 | 500 | |
| 482 | 501 | complete: |
| 483 | 502 | gvt_dbg_sched("will complete workload %p, status: %d\n", |
| @@ -513,15 +532,16 @@ void intel_gvt_wait_vgpu_idle(struct intel_vgpu *vgpu) · 29 unmodified lines | ||
| 513 | 532 | void intel_gvt_clean_workload_scheduler(struct intel_gvt *gvt) |
| 514 | 533 | { |
| 515 | 534 | struct intel_gvt_workload_scheduler *scheduler = &gvt->scheduler; |
| 516 | − int i; | |
| 535 | + struct intel_engine_cs *engine; | |
| 536 | + enum intel_engine_id i; | |
| 517 | 537 | |
| 518 | 538 | gvt_dbg_core("clean workload scheduler\n"); |
| 519 | 539 | |
| 520 | − for (i = 0; i < I915_NUM_ENGINES; i++) { | |
| 521 | − if (scheduler->thread[i]) { | |
| 522 | − kthread_stop(scheduler->thread[i]); | |
| 523 | − scheduler->thread[i] = NULL; | |
| 524 | − } | |
| 540 | + for_each_engine(engine, gvt->dev_priv, i) { | |
| 541 | + atomic_notifier_chain_unregister( | |
| 542 | + &engine->context_status_notifier, | |
| 543 | + &gvt->shadow_ctx_notifier_block[i]); | |
| 544 | + kthread_stop(scheduler->thread[i]); | |
| 525 | 545 | } |
| 526 | 546 | } |
| 527 | 547 | |
| @@ -529,18 +549,15 @@ int intel_gvt_init_workload_scheduler(struct intel_gvt *gvt) · 1 unmodified line | ||
| 529 | 549 | { |
| 530 | 550 | struct intel_gvt_workload_scheduler *scheduler = &gvt->scheduler; |
| 531 | 551 | struct workload_thread_param *param = NULL; |
| 552 | + struct intel_engine_cs *engine; | |
| 553 | + enum intel_engine_id i; | |
| 532 | 554 | int ret; |
| 533 | − int i; | |
| 534 | 555 | |
| 535 | 556 | gvt_dbg_core("init workload scheduler\n"); |
| 536 | 557 | |
| 537 | 558 | init_waitqueue_head(&scheduler->workload_complete_wq); |
| 538 | 559 | |
| 539 | − for (i = 0; i < I915_NUM_ENGINES; i++) { | |
| 540 | − /* check ring mask at init time */ | |
| 541 | − if (!HAS_ENGINE(gvt->dev_priv, i)) | |
| 542 | − continue; | |
| 543 | − | |
| 560 | + for_each_engine(engine, gvt->dev_priv, i) { | |
| 544 | 561 | init_waitqueue_head(&scheduler->waitq[i]); |
| 545 | 562 | |
| 546 | 563 | param = kzalloc(sizeof(*param), GFP_KERNEL); |
| @@ -559,6 +576,11 @@ int intel_gvt_init_workload_scheduler(struct intel_gvt *gvt) · 12 unmodified lines | ||
| 559 | 576 | ret = PTR_ERR(scheduler->thread[i]); |
| 560 | 577 | goto err; |
| 561 | 578 | } |
| 579 | + | |
| 580 | + gvt->shadow_ctx_notifier_block[i].notifier_call = | |
| 581 | + shadow_context_status_change; | |
| 582 | + atomic_notifier_chain_register(&engine->context_status_notifier, | |
| 583 | + &gvt->shadow_ctx_notifier_block[i]); | |
| 562 | 584 | } |
| 563 | 585 | return 0; |
| 564 | 586 | err: |
| @@ -570,9 +592,6 @@ err: · 5 unmodified lines | ||
| 570 | 592 | |
| 571 | 593 | void intel_vgpu_clean_gvt_context(struct intel_vgpu *vgpu) |
| 572 | 594 | { |
| 573 | − atomic_notifier_chain_unregister(&vgpu->shadow_ctx->status_notifier, | |
| 574 | − &vgpu->shadow_ctx_notifier_block); | |
| 575 | − | |
| 576 | 595 | i915_gem_context_put_unlocked(vgpu->shadow_ctx); |
| 577 | 596 | } |
| 578 | 597 | |
| @@ -587,10 +606,5 @@ int intel_vgpu_init_gvt_context(struct intel_vgpu *vgpu) · 8 unmodified lines | ||
| 587 | 606 | |
| 588 | 607 | vgpu->shadow_ctx->engine[RCS].initialised = true; |
| 589 | 608 | |
| 590 | − vgpu->shadow_ctx_notifier_block.notifier_call = | |
| 591 | − shadow_context_status_change; | |
| 592 | − | |
| 593 | − atomic_notifier_chain_register(&vgpu->shadow_ctx->status_notifier, | |
| 594 | − &vgpu->shadow_ctx_notifier_block); | |
| 595 | 609 | return 0; |
| 596 | 610 | } |
| @@ -248,6 +248,7 @@ static int i915_getparam(struct drm_device *dev, void *data, · 247 unmodified lines | ||
| 248 | 248 | case I915_PARAM_IRQ_ACTIVE: |
| 249 | 249 | case I915_PARAM_ALLOW_BATCHBUFFER: |
| 250 | 250 | case I915_PARAM_LAST_DISPATCH: |
| 251 | + case I915_PARAM_HAS_EXEC_CONSTANTS: | |
| 251 | 252 | /* Reject all old ums/dri params. */ |
| 252 | 253 | return -ENODEV; |
| 253 | 254 | case I915_PARAM_CHIPSET_ID: |
| @@ -274,9 +275,6 @@ static int i915_getparam(struct drm_device *dev, void *data, · 20 unmodified lines | ||
| 274 | 275 | case I915_PARAM_HAS_BSD2: |
| 275 | 276 | value = !!dev_priv->engine[VCS2]; |
| 276 | 277 | break; |
| 277 | − case I915_PARAM_HAS_EXEC_CONSTANTS: | |
| 278 | − value = INTEL_GEN(dev_priv) >= 4; | |
| 279 | − break; | |
| 280 | 278 | case I915_PARAM_HAS_LLC: |
| 281 | 279 | value = HAS_LLC(dev_priv); |
| 282 | 280 | break; |
| @@ -1788,7 +1786,7 @@ void i915_reset(struct drm_i915_private *dev_priv) · 1505 unmodified lines | ||
| 1788 | 1786 | goto error; |
| 1789 | 1787 | } |
| 1790 | 1788 | |
| 1791 | − i915_gem_reset_finish(dev_priv); | |
| 1789 | + i915_gem_reset(dev_priv); | |
| 1792 | 1790 | intel_overlay_reset(dev_priv); |
| 1793 | 1791 | |
| 1794 | 1792 | /* Ok, now get things going again... */ |
| @@ -1814,6 +1812,7 @@ void i915_reset(struct drm_i915_private *dev_priv) · 19 unmodified lines | ||
| 1814 | 1812 | i915_queue_hangcheck(dev_priv); |
| 1815 | 1813 | |
| 1816 | 1814 | wakeup: |
| 1815 | + i915_gem_reset_finish(dev_priv); | |
| 1817 | 1816 | enable_irq(dev_priv->drm.irq); |
| 1818 | 1817 | wake_up_bit(&error->flags, I915_RESET_IN_PROGRESS); |
| 1819 | 1818 | return; |
| @@ -293,6 +293,7 @@ enum plane_id { · 292 unmodified lines | ||
| 293 | 293 | PLANE_PRIMARY, |
| 294 | 294 | PLANE_SPRITE0, |
| 295 | 295 | PLANE_SPRITE1, |
| 296 | + PLANE_SPRITE2, | |
| 296 | 297 | PLANE_CURSOR, |
| 297 | 298 | I915_MAX_PLANES, |
| 298 | 299 | }; |
| @@ -1324,7 +1325,7 @@ struct intel_gen6_power_mgmt { · 1025 unmodified lines | ||
| 1324 | 1325 | unsigned boosts; |
| 1325 | 1326 | |
| 1326 | 1327 | /* manual wa residency calculations */ |
| 1327 | − struct intel_rps_ei up_ei, down_ei; | |
| 1328 | + struct intel_rps_ei ei; | |
| 1328 | 1329 | |
| 1329 | 1330 | /* |
| 1330 | 1331 | * Protects RPS/RC6 register access and PCU communication. |
| @@ -2063,8 +2064,6 @@ struct drm_i915_private { · 732 unmodified lines | ||
| 2063 | 2064 | |
| 2064 | 2065 | const struct intel_device_info info; |
| 2065 | 2066 | |
| 2066 | − int relative_constants_mode; | |
| 2067 | − | |
| 2068 | 2067 | void __iomem *regs; |
| 2069 | 2068 | |
| 2070 | 2069 | struct intel_uncore uncore; |
| @@ -3341,6 +3340,7 @@ static inline u32 i915_reset_count(struct i915_gpu_error *error) · 1270 unmodified lines | ||
| 3341 | 3340 | } |
| 3342 | 3341 | |
| 3343 | 3342 | int i915_gem_reset_prepare(struct drm_i915_private *dev_priv); |
| 3343 | +void i915_gem_reset(struct drm_i915_private *dev_priv); | |
| 3344 | 3344 | void i915_gem_reset_finish(struct drm_i915_private *dev_priv); |
| 3345 | 3345 | void i915_gem_set_wedged(struct drm_i915_private *dev_priv); |
| 3346 | 3346 | void i915_gem_clflush_object(struct drm_i915_gem_object *obj, bool force); |
| @@ -1434,6 +1434,12 @@ i915_gem_pwrite_ioctl(struct drm_device *dev, void *data, · 1433 unmodified lines | ||
| 1434 | 1434 | |
| 1435 | 1435 | trace_i915_gem_object_pwrite(obj, args->offset, args->size); |
| 1436 | 1436 | |
| 1437 | + ret = -ENODEV; | |
| 1438 | + if (obj->ops->pwrite) | |
| 1439 | + ret = obj->ops->pwrite(obj, args); | |
| 1440 | + if (ret != -ENODEV) | |
| 1441 | + goto err; | |
| 1442 | + | |
| 1437 | 1443 | ret = i915_gem_object_wait(obj, |
| 1438 | 1444 | I915_WAIT_INTERRUPTIBLE | |
| 1439 | 1445 | I915_WAIT_ALL, |
| @@ -2119,6 +2125,7 @@ i915_gem_object_truncate(struct drm_i915_gem_object *obj) · 679 unmodified lines | ||
| 2119 | 2125 | */ |
| 2120 | 2126 | shmem_truncate_range(file_inode(obj->base.filp), 0, (loff_t)-1); |
| 2121 | 2127 | obj->mm.madv = __I915_MADV_PURGED; |
| 2128 | + obj->mm.pages = ERR_PTR(-EFAULT); | |
| 2122 | 2129 | } |
| 2123 | 2130 | |
| 2124 | 2131 | /* Try to discard unwanted pages */ |
| @@ -2218,7 +2225,9 @@ void __i915_gem_object_put_pages(struct drm_i915_gem_object *obj, · 93 unmodified lines | ||
| 2218 | 2225 | |
| 2219 | 2226 | __i915_gem_object_reset_page_iter(obj); |
| 2220 | 2227 | |
| 2221 | − obj->ops->put_pages(obj, pages); | |
| 2228 | + if (!IS_ERR(pages)) | |
| 2229 | + obj->ops->put_pages(obj, pages); | |
| 2230 | + | |
| 2222 | 2231 | unlock: |
| 2223 | 2232 | mutex_unlock(&obj->mm.lock); |
| 2224 | 2233 | } |
| @@ -2437,7 +2446,7 @@ int __i915_gem_object_get_pages(struct drm_i915_gem_object *obj) · 212 unmodified lines | ||
| 2437 | 2446 | if (err) |
| 2438 | 2447 | return err; |
| 2439 | 2448 | |
| 2440 | − if (unlikely(!obj->mm.pages)) { | |
| 2449 | + if (unlikely(IS_ERR_OR_NULL(obj->mm.pages))) { | |
| 2441 | 2450 | err = ____i915_gem_object_get_pages(obj); |
| 2442 | 2451 | if (err) |
| 2443 | 2452 | goto unlock; |
| @@ -2515,7 +2524,7 @@ void *i915_gem_object_pin_map(struct drm_i915_gem_object *obj, · 71 unmodified lines | ||
| 2515 | 2524 | |
| 2516 | 2525 | pinned = true; |
| 2517 | 2526 | if (!atomic_inc_not_zero(&obj->mm.pages_pin_count)) { |
| 2518 | − if (unlikely(!obj->mm.pages)) { | |
| 2527 | + if (unlikely(IS_ERR_OR_NULL(obj->mm.pages))) { | |
| 2519 | 2528 | ret = ____i915_gem_object_get_pages(obj); |
| 2520 | 2529 | if (ret) |
| 2521 | 2530 | goto err_unlock; |
| @@ -2563,6 +2572,75 @@ err_unlock: · 41 unmodified lines | ||
| 2563 | 2572 | goto out_unlock; |
| 2564 | 2573 | } |
| 2565 | 2574 | |
| 2575 | +static int | |
| 2576 | +i915_gem_object_pwrite_gtt(struct drm_i915_gem_object *obj, | |
| 2577 | + const struct drm_i915_gem_pwrite *arg) | |
| 2578 | +{ | |
| 2579 | + struct address_space *mapping = obj->base.filp->f_mapping; | |
| 2580 | + char __user *user_data = u64_to_user_ptr(arg->data_ptr); | |
| 2581 | + u64 remain, offset; | |
| 2582 | + unsigned int pg; | |
| 2583 | + | |
| 2584 | + /* Before we instantiate/pin the backing store for our use, we | |
| 2585 | + * can prepopulate the shmemfs filp efficiently using a write into | |
| 2586 | + * the pagecache. We avoid the penalty of instantiating all the | |
| 2587 | + * pages, important if the user is just writing to a few and never | |
| 2588 | + * uses the object on the GPU, and using a direct write into shmemfs | |
| 2589 | + * allows it to avoid the cost of retrieving a page (either swapin | |
| 2590 | + * or clearing-before-use) before it is overwritten. | |
| 2591 | + */ | |
| 2592 | + if (READ_ONCE(obj->mm.pages)) | |
| 2593 | + return -ENODEV; | |
| 2594 | + | |
| 2595 | + /* Before the pages are instantiated the object is treated as being | |
| 2596 | + * in the CPU domain. The pages will be clflushed as required before | |
| 2597 | + * use, and we can freely write into the pages directly. If userspace | |
| 2598 | + * races pwrite with any other operation; corruption will ensue - | |
| 2599 | + * that is userspace's prerogative! | |
| 2600 | + */ | |
| 2601 | + | |
| 2602 | + remain = arg->size; | |
| 2603 | + offset = arg->offset; | |
| 2604 | + pg = offset_in_page(offset); | |
| 2605 | + | |
| 2606 | + do { | |
| 2607 | + unsigned int len, unwritten; | |
| 2608 | + struct page *page; | |
| 2609 | + void *data, *vaddr; | |
| 2610 | + int err; | |
| 2611 | + | |
| 2612 | + len = PAGE_SIZE - pg; | |
| 2613 | + if (len > remain) | |
| 2614 | + len = remain; | |
| 2615 | + | |
| 2616 | + err = pagecache_write_begin(obj->base.filp, mapping, | |
| 2617 | + offset, len, 0, | |
| 2618 | + &page, &data); | |
| 2619 | + if (err < 0) | |
| 2620 | + return err; | |
| 2621 | + | |
| 2622 | + vaddr = kmap(page); | |
| 2623 | + unwritten = copy_from_user(vaddr + pg, user_data, len); | |
| 2624 | + kunmap(page); | |
| 2625 | + | |
| 2626 | + err = pagecache_write_end(obj->base.filp, mapping, | |
| 2627 | + offset, len, len - unwritten, | |
| 2628 | + page, data); | |
| 2629 | + if (err < 0) | |
| 2630 | + return err; | |
| 2631 | + | |
| 2632 | + if (unwritten) | |
| 2633 | + return -EFAULT; | |
| 2634 | + | |
| 2635 | + remain -= len; | |
| 2636 | + user_data += len; | |
| 2637 | + offset += len; | |
| 2638 | + pg = 0; | |
| 2639 | + } while (remain); | |
| 2640 | + | |
| 2641 | + return 0; | |
| 2642 | +} | |
| 2643 | + | |
| 2566 | 2644 | static bool ban_context(const struct i915_gem_context *ctx) |
| 2567 | 2645 | { |
| 2568 | 2646 | return (i915_gem_context_is_bannable(ctx) && |
| @@ -2641,7 +2719,16 @@ int i915_gem_reset_prepare(struct drm_i915_private *dev_priv) · 72 unmodified lines | ||
| 2641 | 2719 | for_each_engine(engine, dev_priv, id) { |
| 2642 | 2720 | struct drm_i915_gem_request *request; |
| 2643 | 2721 | |
| 2722 | + /* Prevent request submission to the hardware until we have | |
| 2723 | + * completed the reset in i915_gem_reset_finish(). If a request | |
| 2724 | + * is completed by one engine, it may then queue a request | |
| 2725 | + * to a second via its engine->irq_tasklet *just* as we are | |
| 2726 | + * calling engine->init_hw() and also writing the ELSP. | |
| 2727 | + * Turning off the engine->irq_tasklet until the reset is over | |
| 2728 | + * prevents the race. | |
| 2729 | + */ | |
| 2644 | 2730 | tasklet_kill(&engine->irq_tasklet); |
| 2731 | + tasklet_disable(&engine->irq_tasklet); | |
| 2645 | 2732 | |
| 2646 | 2733 | if (engine_stalled(engine)) { |
| 2647 | 2734 | request = i915_gem_find_active_request(engine); |
| @@ -2756,7 +2843,7 @@ static void i915_gem_reset_engine(struct intel_engine_cs *engine) · 108 unmodified lines | ||
| 2756 | 2843 | engine->reset_hw(engine, request); |
| 2757 | 2844 | } |
| 2758 | 2845 | |
| 2759 | −void i915_gem_reset_finish(struct drm_i915_private *dev_priv) | |
| 2846 | +void i915_gem_reset(struct drm_i915_private *dev_priv) | |
| 2760 | 2847 | { |
| 2761 | 2848 | struct intel_engine_cs *engine; |
| 2762 | 2849 | enum intel_engine_id id; |
| @@ -2778,6 +2865,17 @@ void i915_gem_reset_finish(struct drm_i915_private *dev_priv) · 15 unmodified lines | ||
| 2778 | 2865 | } |
| 2779 | 2866 | } |
| 2780 | 2867 | |
| 2868 | +void i915_gem_reset_finish(struct drm_i915_private *dev_priv) | |
| 2869 | +{ | |
| 2870 | + struct intel_engine_cs *engine; | |
| 2871 | + enum intel_engine_id id; | |
| 2872 | + | |
| 2873 | + lockdep_assert_held(&dev_priv->drm.struct_mutex); | |
| 2874 | + | |
| 2875 | + for_each_engine(engine, dev_priv, id) | |
| 2876 | + tasklet_enable(&engine->irq_tasklet); | |
| 2877 | +} | |
| 2878 | + | |
| 2781 | 2879 | static void nop_submit_request(struct drm_i915_gem_request *request) |
| 2782 | 2880 | { |
| 2783 | 2881 | dma_fence_set_error(&request->fence, -EIO); |
| @@ -3029,6 +3127,16 @@ i915_gem_wait_ioctl(struct drm_device *dev, void *data, struct drm_file *file) · 245 unmodified lines | ||
| 3029 | 3127 | args->timeout_ns -= ktime_to_ns(ktime_sub(ktime_get(), start)); |
| 3030 | 3128 | if (args->timeout_ns < 0) |
| 3031 | 3129 | args->timeout_ns = 0; |
| 3130 | + | |
| 3131 | + /* | |
| 3132 | + * Apparently ktime isn't accurate enough and occasionally has a | |
| 3133 | + * bit of mismatch in the jiffies<->nsecs<->ktime loop. So patch | |
| 3134 | + * things up to make the test happy. We allow up to 1 jiffy. | |
| 3135 | + * | |
| 3136 | + * This is a regression from the timespec->ktime conversion. | |
| 3137 | + */ | |
| 3138 | + if (ret == -ETIME && !nsecs_to_jiffies(args->timeout_ns)) | |
| 3139 | + args->timeout_ns = 0; | |
| 3032 | 3140 | } |
| 3033 | 3141 | |
| 3034 | 3142 | i915_gem_object_put(obj); |
| @@ -3974,8 +4082,11 @@ void i915_gem_object_init(struct drm_i915_gem_object *obj, · 939 unmodified lines | ||
| 3974 | 4082 | static const struct drm_i915_gem_object_ops i915_gem_object_ops = { |
| 3975 | 4083 | .flags = I915_GEM_OBJECT_HAS_STRUCT_PAGE | |
| 3976 | 4084 | I915_GEM_OBJECT_IS_SHRINKABLE, |
| 4085 | + | |
| 3977 | 4086 | .get_pages = i915_gem_object_get_pages_gtt, |
| 3978 | 4087 | .put_pages = i915_gem_object_put_pages_gtt, |
| 4088 | + | |
| 4089 | + .pwrite = i915_gem_object_pwrite_gtt, | |
| 3979 | 4090 | }; |
| 3980 | 4091 | |
| 3981 | 4092 | struct drm_i915_gem_object * |
| @@ -4583,8 +4694,6 @@ i915_gem_load_init(struct drm_i915_private *dev_priv) · 601 unmodified lines | ||
| 4583 | 4694 | init_waitqueue_head(&dev_priv->gpu_error.wait_queue); |
| 4584 | 4695 | init_waitqueue_head(&dev_priv->gpu_error.reset_queue); |
| 4585 | 4696 | |
| 4586 | − dev_priv->relative_constants_mode = I915_EXEC_CONSTANTS_REL_GENERAL; | |
| 4587 | − | |
| 4588 | 4697 | init_waitqueue_head(&dev_priv->pending_flip_queue); |
| 4589 | 4698 | |
| 4590 | 4699 | dev_priv->mm.interruptible = true; |
| @@ -311,7 +311,6 @@ __create_hw_context(struct drm_i915_private *dev_priv, · 310 unmodified lines | ||
| 311 | 311 | ctx->ring_size = 4 * PAGE_SIZE; |
| 312 | 312 | ctx->desc_template = GEN8_CTX_ADDRESSING_MODE(dev_priv) << |
| 313 | 313 | GEN8_CTX_ADDRESSING_MODE_SHIFT; |
| 314 | − ATOMIC_INIT_NOTIFIER_HEAD(&ctx->status_notifier); | |
| 315 | 314 | |
| 316 | 315 | /* GuC requires the ring to be placed above GUC_WOPCM_TOP. If GuC is not |
| 317 | 316 | * present or not in use we still need a small bias as ring wraparound |
| @@ -160,9 +160,6 @@ struct i915_gem_context { · 159 unmodified lines | ||
| 160 | 160 | /** desc_template: invariant fields for the HW context descriptor */ |
| 161 | 161 | u32 desc_template; |
| 162 | 162 | |
| 163 | − /** status_notifier: list of callbacks for context-switch changes */ | |
| 164 | − struct atomic_notifier_head status_notifier; | |
| 165 | − | |
| 166 | 163 | /** guilty_count: How many times this context has caused a GPU hang. */ |
| 167 | 164 | unsigned int guilty_count; |
| 168 | 165 | /** |
| @@ -293,12 +293,12 @@ int i915_gem_evict_for_node(struct i915_address_space *vm, · 292 unmodified lines | ||
| 293 | 293 | * those as well to make room for our guard pages. |
| 294 | 294 | */ |
| 295 | 295 | if (check_color) { |
| 296 | − if (vma->node.start + vma->node.size == node->start) { | |
| 297 | − if (vma->node.color == node->color) | |
| 296 | + if (node->start + node->size == target->start) { | |
| 297 | + if (node->color == target->color) | |
| 298 | 298 | continue; |
| 299 | 299 | } |
| 300 | − if (vma->node.start == node->start + node->size) { | |
| 301 | − if (vma->node.color == node->color) | |
| 300 | + if (node->start == target->start + target->size) { | |
| 301 | + if (node->color == target->color) | |
| 302 | 302 | continue; |
| 303 | 303 | } |
| 304 | 304 | } |
| @@ -1408,10 +1408,7 @@ execbuf_submit(struct i915_execbuffer_params *params, · 1407 unmodified lines | ||
| 1408 | 1408 | struct drm_i915_gem_execbuffer2 *args, |
| 1409 | 1409 | struct list_head *vmas) |
| 1410 | 1410 | { |
| 1411 | − struct drm_i915_private *dev_priv = params->request->i915; | |
| 1412 | 1411 | u64 exec_start, exec_len; |
| 1413 | − int instp_mode; | |
| 1414 | − u32 instp_mask; | |
| 1415 | 1412 | int ret; |
| 1416 | 1413 | |
| 1417 | 1414 | ret = i915_gem_execbuffer_move_to_gpu(params->request, vmas); |
| @@ -1422,56 +1419,11 @@ execbuf_submit(struct i915_execbuffer_params *params, · 4 unmodified lines | ||
| 1422 | 1419 | if (ret) |
| 1423 | 1420 | return ret; |
| 1424 | 1421 | |
| 1425 | − instp_mode = args->flags & I915_EXEC_CONSTANTS_MASK; | |
| 1426 | − instp_mask = I915_EXEC_CONSTANTS_MASK; | |
| 1427 | − switch (instp_mode) { | |
| 1428 | − case I915_EXEC_CONSTANTS_REL_GENERAL: | |
| 1429 | − case I915_EXEC_CONSTANTS_ABSOLUTE: | |
| 1430 | − case I915_EXEC_CONSTANTS_REL_SURFACE: | |
| 1431 | − if (instp_mode != 0 && params->engine->id != RCS) { | |
| 1432 | − DRM_DEBUG("non-0 rel constants mode on non-RCS\n"); | |
| 1433 | − return -EINVAL; | |
| 1434 | − } | |
| 1435 | − | |
| 1436 | − if (instp_mode != dev_priv->relative_constants_mode) { | |
| 1437 | − if (INTEL_INFO(dev_priv)->gen < 4) { | |
| 1438 | − DRM_DEBUG("no rel constants on pre-gen4\n"); | |
| 1439 | − return -EINVAL; | |
| 1440 | − } | |
| 1441 | − | |
| 1442 | − if (INTEL_INFO(dev_priv)->gen > 5 && | |
| 1443 | − instp_mode == I915_EXEC_CONSTANTS_REL_SURFACE) { | |
| 1444 | − DRM_DEBUG("rel surface constants mode invalid on gen5+\n"); | |
| 1445 | − return -EINVAL; | |
| 1446 | − } | |
| 1447 | − | |
| 1448 | − /* The HW changed the meaning on this bit on gen6 */ | |
| 1449 | − if (INTEL_INFO(dev_priv)->gen >= 6) | |
| 1450 | − instp_mask &= ~I915_EXEC_CONSTANTS_REL_SURFACE; | |
| 1451 | − } | |
| 1452 | − break; | |
| 1453 | − default: | |
| 1454 | − DRM_DEBUG("execbuf with unknown constants: %d\n", instp_mode); | |
| 1422 | + if (args->flags & I915_EXEC_CONSTANTS_MASK) { | |
| 1423 | + DRM_DEBUG("I915_EXEC_CONSTANTS_* unsupported\n"); | |
| 1455 | 1424 | return -EINVAL; |
| 1456 | 1425 | } |
| 1457 | 1426 | |
| 1458 | − if (params->engine->id == RCS && | |
| 1459 | − instp_mode != dev_priv->relative_constants_mode) { | |
| 1460 | − struct intel_ring *ring = params->request->ring; | |
| 1461 | − | |
| 1462 | − ret = intel_ring_begin(params->request, 4); | |
| 1463 | − if (ret) | |
| 1464 | − return ret; | |
| 1465 | − | |
| 1466 | − intel_ring_emit(ring, MI_NOOP); | |
| 1467 | − intel_ring_emit(ring, MI_LOAD_REGISTER_IMM(1)); | |
| 1468 | − intel_ring_emit_reg(ring, INSTPM); | |
| 1469 | − intel_ring_emit(ring, instp_mask << 16 | instp_mode); | |
| 1470 | − intel_ring_advance(ring); | |
| 1471 | − | |
| 1472 | − dev_priv->relative_constants_mode = instp_mode; | |
| 1473 | − } | |
| 1474 | − | |
| 1475 | 1427 | if (args->flags & I915_EXEC_GEN7_SOL_RESET) { |
| 1476 | 1428 | ret = i915_reset_gen7_sol_offsets(params->request); |
| 1477 | 1429 | if (ret) |
| @@ -54,6 +54,9 @@ struct drm_i915_gem_object_ops { · 53 unmodified lines | ||
| 54 | 54 | struct sg_table *(*get_pages)(struct drm_i915_gem_object *); |
| 55 | 55 | void (*put_pages)(struct drm_i915_gem_object *, struct sg_table *); |
| 56 | 56 | |
| 57 | + int (*pwrite)(struct drm_i915_gem_object *, | |
| 58 | + const struct drm_i915_gem_pwrite *); | |
| 59 | + | |
| 57 | 60 | int (*dmabuf_export)(struct drm_i915_gem_object *); |
| 58 | 61 | void (*release)(struct drm_i915_gem_object *); |
| 59 | 62 | }; |
| @@ -263,7 +263,7 @@ unsigned long i915_gem_shrink_all(struct drm_i915_private *dev_priv) · 262 unmodified lines | ||
| 263 | 263 | I915_SHRINK_BOUND | |
| 264 | 264 | I915_SHRINK_UNBOUND | |
| 265 | 265 | I915_SHRINK_ACTIVE); |
| 266 | − rcu_barrier(); /* wait until our RCU delayed slab frees are completed */ | |
| 266 | + synchronize_rcu(); /* wait for our earlier RCU delayed slab frees */ | |
| 267 | 267 | |
| 268 | 268 | return freed; |
| 269 | 269 | } |
| @@ -1046,68 +1046,51 @@ static void vlv_c0_read(struct drm_i915_private *dev_priv, · 1045 unmodified lines | ||
| 1046 | 1046 | ei->media_c0 = I915_READ(VLV_MEDIA_C0_COUNT); |
| 1047 | 1047 | } |
| 1048 | 1048 | |
| 1049 | −static bool vlv_c0_above(struct drm_i915_private *dev_priv, | |
| 1050 | − const struct intel_rps_ei *old, | |
| 1051 | − const struct intel_rps_ei *now, | |
| 1052 | − int threshold) | |
| 1053 | −{ | |
| 1054 | − u64 time, c0; | |
| 1055 | − unsigned int mul = 100; | |
| 1056 | − | |
| 1057 | − if (old->cz_clock == 0) | |
| 1058 | − return false; | |
| 1059 | − | |
| 1060 | − if (I915_READ(VLV_COUNTER_CONTROL) & VLV_COUNT_RANGE_HIGH) | |
| 1061 | − mul <<= 8; | |
| 1062 | − | |
| 1063 | − time = now->cz_clock - old->cz_clock; | |
| 1064 | − time *= threshold * dev_priv->czclk_freq; | |
| 1065 | − | |
| 1066 | − /* Workload can be split between render + media, e.g. SwapBuffers | |
| 1067 | − * being blitted in X after being rendered in mesa. To account for | |
| 1068 | − * this we need to combine both engines into our activity counter. | |
| 1069 | − */ | |
| 1070 | − c0 = now->render_c0 - old->render_c0; | |
| 1071 | − c0 += now->media_c0 - old->media_c0; | |
| 1072 | − c0 *= mul * VLV_CZ_CLOCK_TO_MILLI_SEC; | |
| 1073 | − | |
| 1074 | − return c0 >= time; | |
| 1075 | −} | |
| 1076 | − | |
| 1077 | 1049 | void gen6_rps_reset_ei(struct drm_i915_private *dev_priv) |
| 1078 | 1050 | { |
| 1079 | − vlv_c0_read(dev_priv, &dev_priv->rps.down_ei); | |
| 1080 | − dev_priv->rps.up_ei = dev_priv->rps.down_ei; | |
| 1051 | + memset(&dev_priv->rps.ei, 0, sizeof(dev_priv->rps.ei)); | |
| 1081 | 1052 | } |
| 1082 | 1053 | |
| 1083 | 1054 | static u32 vlv_wa_c0_ei(struct drm_i915_private *dev_priv, u32 pm_iir) |
| 1084 | 1055 | { |
| 1056 | + const struct intel_rps_ei *prev = &dev_priv->rps.ei; | |
| 1085 | 1057 | struct intel_rps_ei now; |
| 1086 | 1058 | u32 events = 0; |
| 1087 | 1059 | |
| 1088 | − if ((pm_iir & (GEN6_PM_RP_DOWN_EI_EXPIRED | GEN6_PM_RP_UP_EI_EXPIRED)) == 0) | |
| 1060 | + if ((pm_iir & GEN6_PM_RP_UP_EI_EXPIRED) == 0) | |
| 1089 | 1061 | return 0; |
| 1090 | 1062 | |
| 1091 | 1063 | vlv_c0_read(dev_priv, &now); |
| 1092 | 1064 | if (now.cz_clock == 0) |
| 1093 | 1065 | return 0; |
| 1094 | 1066 | |
| 1095 | − if (pm_iir & GEN6_PM_RP_DOWN_EI_EXPIRED) { | |
| 1096 | − if (!vlv_c0_above(dev_priv, | |
| 1097 | − &dev_priv->rps.down_ei, &now, | |
| 1098 | − dev_priv->rps.down_threshold)) | |
| 1099 | − events |= GEN6_PM_RP_DOWN_THRESHOLD; | |
| 1100 | − dev_priv->rps.down_ei = now; | |
| 1101 | − } | |
| 1067 | + if (prev->cz_clock) { | |
| 1068 | + u64 time, c0; | |
| 1069 | + unsigned int mul; | |
| 1070 | + | |
| 1071 | + mul = VLV_CZ_CLOCK_TO_MILLI_SEC * 100; /* scale to threshold% */ | |
| 1072 | + if (I915_READ(VLV_COUNTER_CONTROL) & VLV_COUNT_RANGE_HIGH) | |
| 1073 | + mul <<= 8; | |
| 1102 | 1074 | |
| 1103 | − if (pm_iir & GEN6_PM_RP_UP_EI_EXPIRED) { | |
| 1104 | − if (vlv_c0_above(dev_priv, | |
| 1105 | − &dev_priv->rps.up_ei, &now, | |
| 1106 | − dev_priv->rps.up_threshold)) | |
| 1107 | − events |= GEN6_PM_RP_UP_THRESHOLD; | |
| 1108 | − dev_priv->rps.up_ei = now; | |
| 1075 | + time = now.cz_clock - prev->cz_clock; | |
| 1076 | + time *= dev_priv->czclk_freq; | |
| 1077 | + | |
| 1078 | + /* Workload can be split between render + media, | |
| 1079 | + * e.g. SwapBuffers being blitted in X after being rendered in | |
| 1080 | + * mesa. To account for this we need to combine both engines | |
| 1081 | + * into our activity counter. | |
| 1082 | + */ | |
| 1083 | + c0 = now.render_c0 - prev->render_c0; | |
| 1084 | + c0 += now.media_c0 - prev->media_c0; | |
| 1085 | + c0 *= mul; | |
| 1086 | + | |
| 1087 | + if (c0 > time * dev_priv->rps.up_threshold) | |
| 1088 | + events = GEN6_PM_RP_UP_THRESHOLD; | |
| 1089 | + else if (c0 < time * dev_priv->rps.down_threshold) | |
| 1090 | + events = GEN6_PM_RP_DOWN_THRESHOLD; | |
| 1109 | 1091 | } |
| 1110 | 1092 | |
| 1093 | + dev_priv->rps.ei = now; | |
| 1111 | 1094 | return events; |
| 1112 | 1095 | } |
| 1113 | 1096 | |
| @@ -4228,7 +4211,7 @@ void intel_irq_init(struct drm_i915_private *dev_priv) · 3114 unmodified lines | ||
| 4228 | 4211 | /* Let's track the enabled rps events */ |
| 4229 | 4212 | if (IS_VALLEYVIEW(dev_priv)) |
| 4230 | 4213 | /* WaGsvRC0ResidencyMethod:vlv */ |
| 4231 | − dev_priv->pm_rps_events = GEN6_PM_RP_DOWN_EI_EXPIRED | GEN6_PM_RP_UP_EI_EXPIRED; | |
| 4214 | + dev_priv->pm_rps_events = GEN6_PM_RP_UP_EI_EXPIRED; | |
| 4232 | 4215 | else |
| 4233 | 4216 | dev_priv->pm_rps_events = GEN6_PM_RPS_EVENTS; |
| 4234 | 4217 | |
| @@ -4266,6 +4249,16 @@ void intel_irq_init(struct drm_i915_private *dev_priv) · 31 unmodified lines | ||
| 4266 | 4249 | if (!IS_GEN2(dev_priv)) |
| 4267 | 4250 | dev->vblank_disable_immediate = true; |
| 4268 | 4251 | |
| 4252 | + /* Most platforms treat the display irq block as an always-on | |
| 4253 | + * power domain. vlv/chv can disable it at runtime and need | |
| 4254 | + * special care to avoid writing any of the display block registers | |
| 4255 | + * outside of the power domain. We defer setting up the display irqs | |
| 4256 | + * in this case to the runtime pm. | |
| 4257 | + */ | |
| 4258 | + dev_priv->display_irqs_enabled = true; | |
| 4259 | + if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) | |
| 4260 | + dev_priv->display_irqs_enabled = false; | |
| 4261 | + | |
| 4269 | 4262 | dev->driver->get_vblank_timestamp = i915_get_vblank_timestamp; |
| 4270 | 4263 | dev->driver->get_scanout_position = i915_get_crtc_scanoutpos; |
| 4271 | 4264 | |
| @@ -512,10 +512,36 @@ err_unpin: · 511 unmodified lines | ||
| 512 | 512 | return ret; |
| 513 | 513 | } |
| 514 | 514 | |
| 515 | +static void | |
| 516 | +i915_vma_remove(struct i915_vma *vma) | |
| 517 | +{ | |
| 518 | + struct drm_i915_gem_object *obj = vma->obj; | |
| 519 | + | |
| 520 | + GEM_BUG_ON(!drm_mm_node_allocated(&vma->node)); | |
| 521 | + GEM_BUG_ON(vma->flags & (I915_VMA_GLOBAL_BIND | I915_VMA_LOCAL_BIND)); | |
| 522 | + | |
| 523 | + drm_mm_remove_node(&vma->node); | |
| 524 | + list_move_tail(&vma->vm_link, &vma->vm->unbound_list); | |
| 525 | + | |
| 526 | + /* Since the unbound list is global, only move to that list if | |
| 527 | + * no more VMAs exist. | |
| 528 | + */ | |
| 529 | + if (--obj->bind_count == 0) | |
| 530 | + list_move_tail(&obj->global_link, | |
| 531 | + &to_i915(obj->base.dev)->mm.unbound_list); | |
| 532 | + | |
| 533 | + /* And finally now the object is completely decoupled from this vma, | |
| 534 | + * we can drop its hold on the backing storage and allow it to be | |
| 535 | + * reaped by the shrinker. | |
| 536 | + */ | |
| 537 | + i915_gem_object_unpin_pages(obj); | |
| 538 | + GEM_BUG_ON(atomic_read(&obj->mm.pages_pin_count) < obj->bind_count); | |
| 539 | +} | |
| 540 | + | |
| 515 | 541 | int __i915_vma_do_pin(struct i915_vma *vma, |
| 516 | 542 | u64 size, u64 alignment, u64 flags) |
| 517 | 543 | { |
| 518 | − unsigned int bound = vma->flags; | |
| 544 | + const unsigned int bound = vma->flags; | |
| 519 | 545 | int ret; |
| 520 | 546 | |
| 521 | 547 | lockdep_assert_held(&vma->vm->i915->drm.struct_mutex); |
| @@ -524,18 +550,18 @@ int __i915_vma_do_pin(struct i915_vma *vma, · 2 unmodified lines | ||
| 524 | 550 | |
| 525 | 551 | if (WARN_ON(bound & I915_VMA_PIN_OVERFLOW)) { |
| 526 | 552 | ret = -EBUSY; |
| 527 | − goto err; | |
| 553 | + goto err_unpin; | |
| 528 | 554 | } |
| 529 | 555 | |
| 530 | 556 | if ((bound & I915_VMA_BIND_MASK) == 0) { |
| 531 | 557 | ret = i915_vma_insert(vma, size, alignment, flags); |
| 532 | 558 | if (ret) |
| 533 | − goto err; | |
| 559 | + goto err_unpin; | |
| 534 | 560 | } |
| 535 | 561 | |
| 536 | 562 | ret = i915_vma_bind(vma, vma->obj->cache_level, flags); |
| 537 | 563 | if (ret) |
| 538 | − goto err; | |
| 564 | + goto err_remove; | |
| 539 | 565 | |
| 540 | 566 | if ((bound ^ vma->flags) & I915_VMA_GLOBAL_BIND) |
| 541 | 567 | __i915_vma_set_map_and_fenceable(vma); |
| @@ -544,7 +570,12 @@ int __i915_vma_do_pin(struct i915_vma *vma, · 2 unmodified lines | ||
| 544 | 570 | GEM_BUG_ON(i915_vma_misplaced(vma, size, alignment, flags)); |
| 545 | 571 | return 0; |
| 546 | 572 | |
| 547 | −err: | |
| 573 | +err_remove: | |
| 574 | + if ((bound & I915_VMA_BIND_MASK) == 0) { | |
| 575 | + GEM_BUG_ON(vma->pages); | |
| 576 | + i915_vma_remove(vma); | |
| 577 | + } | |
| 578 | +err_unpin: | |
| 548 | 579 | __i915_vma_unpin(vma); |
| 549 | 580 | return ret; |
| 550 | 581 | } |
| @@ -657,9 +688,6 @@ int i915_vma_unbind(struct i915_vma *vma) · 106 unmodified lines | ||
| 657 | 688 | } |
| 658 | 689 | vma->flags &= ~(I915_VMA_GLOBAL_BIND | I915_VMA_LOCAL_BIND); |
| 659 | 690 | |
| 660 | − drm_mm_remove_node(&vma->node); | |
| 661 | − list_move_tail(&vma->vm_link, &vma->vm->unbound_list); | |
| 662 | − | |
| 663 | 691 | if (vma->pages != obj->mm.pages) { |
| 664 | 692 | GEM_BUG_ON(!vma->pages); |
| 665 | 693 | sg_free_table(vma->pages); |
| @@ -667,18 +695,7 @@ int i915_vma_unbind(struct i915_vma *vma) · 1 unmodified line | ||
| 667 | 695 | } |
| 668 | 696 | vma->pages = NULL; |
| 669 | 697 | |
| 670 | − /* Since the unbound list is global, only move to that list if | |
| 671 | − * no more VMAs exist. */ | |
| 672 | − if (--obj->bind_count == 0) | |
| 673 | − list_move_tail(&obj->global_link, | |
| 674 | − &to_i915(obj->base.dev)->mm.unbound_list); | |
| 675 | − | |
| 676 | − /* And finally now the object is completely decoupled from this vma, | |
| 677 | − * we can drop its hold on the backing storage and allow it to be | |
| 678 | − * reaped by the shrinker. | |
| 679 | − */ | |
| 680 | − i915_gem_object_unpin_pages(obj); | |
| 681 | − GEM_BUG_ON(atomic_read(&obj->mm.pages_pin_count) < obj->bind_count); | |
| 698 | + i915_vma_remove(vma); | |
| 682 | 699 | |
| 683 | 700 | destroy: |
| 684 | 701 | if (unlikely(i915_vma_is_closed(vma))) |
| @@ -35,7 +35,6 @@ · 34 unmodified lines | ||
| 35 | 35 | */ |
| 36 | 36 | |
| 37 | 37 | #define I915_CSR_GLK "i915/glk_dmc_ver1_01.bin" |
| 38 | −MODULE_FIRMWARE(I915_CSR_GLK); | |
| 39 | 38 | #define GLK_CSR_VERSION_REQUIRED CSR_VERSION(1, 1) |
| 40 | 39 | |
| 41 | 40 | #define I915_CSR_KBL "i915/kbl_dmc_ver1_01.bin" |
| @@ -3669,10 +3669,6 @@ static void intel_update_pipe_config(struct intel_crtc *crtc, · 3668 unmodified lines | ||
| 3669 | 3669 | /* drm_atomic_helper_update_legacy_modeset_state might not be called. */ |
| 3670 | 3670 | crtc->base.mode = crtc->base.state->mode; |
| 3671 | 3671 | |
| 3672 | − DRM_DEBUG_KMS("Updating pipe size %ix%i -> %ix%i\n", | |
| 3673 | − old_crtc_state->pipe_src_w, old_crtc_state->pipe_src_h, | |
| 3674 | − pipe_config->pipe_src_w, pipe_config->pipe_src_h); | |
| 3675 | − | |
| 3676 | 3672 | /* |
| 3677 | 3673 | * Update pipe size and adjust fitter if needed: the reason for this is |
| 3678 | 3674 | * that in compute_mode_changes we check the native mode (not the pfit |
| @@ -4796,23 +4792,17 @@ static void skylake_pfit_enable(struct intel_crtc *crtc) · 1117 unmodified lines | ||
| 4796 | 4792 | struct intel_crtc_scaler_state *scaler_state = |
| 4797 | 4793 | &crtc->config->scaler_state; |
| 4798 | 4794 | |
| 4799 | − DRM_DEBUG_KMS("for crtc_state = %p\n", crtc->config); | |
| 4800 | − | |
| 4801 | 4795 | if (crtc->config->pch_pfit.enabled) { |
| 4802 | 4796 | int id; |
| 4803 | 4797 | |
| 4804 | − if (WARN_ON(crtc->config->scaler_state.scaler_id < 0)) { | |
| 4805 | − DRM_ERROR("Requesting pfit without getting a scaler first\n"); | |
| 4798 | + if (WARN_ON(crtc->config->scaler_state.scaler_id < 0)) | |
| 4806 | 4799 | return; |
| 4807 | − } | |
| 4808 | 4800 | |
| 4809 | 4801 | id = scaler_state->scaler_id; |
| 4810 | 4802 | I915_WRITE(SKL_PS_CTRL(pipe, id), PS_SCALER_EN | |
| 4811 | 4803 | PS_FILTER_MEDIUM | scaler_state->scalers[id].mode); |
| 4812 | 4804 | I915_WRITE(SKL_PS_WIN_POS(pipe, id), crtc->config->pch_pfit.pos); |
| 4813 | 4805 | I915_WRITE(SKL_PS_WIN_SZ(pipe, id), crtc->config->pch_pfit.size); |
| 4814 | − | |
| 4815 | − DRM_DEBUG_KMS("for crtc_state = %p scaler_id = %d\n", crtc->config, id); | |
| 4816 | 4806 | } |
| 4817 | 4807 | } |
| 4818 | 4808 | |
| @@ -14379,6 +14369,24 @@ static void skl_update_crtcs(struct drm_atomic_state *state, · 9560 unmodified lines | ||
| 14379 | 14369 | } while (progress); |
| 14380 | 14370 | } |
| 14381 | 14371 | |
| 14372 | +static void intel_atomic_helper_free_state(struct drm_i915_private *dev_priv) | |
| 14373 | +{ | |
| 14374 | + struct intel_atomic_state *state, *next; | |
| 14375 | + struct llist_node *freed; | |
| 14376 | + | |
| 14377 | + freed = llist_del_all(&dev_priv->atomic_helper.free_list); | |
| 14378 | + llist_for_each_entry_safe(state, next, freed, freed) | |
| 14379 | + drm_atomic_state_put(&state->base); | |
| 14380 | +} | |
| 14381 | + | |
| 14382 | +static void intel_atomic_helper_free_state_worker(struct work_struct *work) | |
| 14383 | +{ | |
| 14384 | + struct drm_i915_private *dev_priv = | |
| 14385 | + container_of(work, typeof(*dev_priv), atomic_helper.free_work); | |
| 14386 | + | |
| 14387 | + intel_atomic_helper_free_state(dev_priv); | |
| 14388 | +} | |
| 14389 | + | |
| 14382 | 14390 | static void intel_atomic_commit_tail(struct drm_atomic_state *state) |
| 14383 | 14391 | { |
| 14384 | 14392 | struct drm_device *dev = state->dev; |
| @@ -14545,6 +14553,8 @@ static void intel_atomic_commit_tail(struct drm_atomic_state *state) · 160 unmodified lines | ||
| 14545 | 14553 | * can happen also when the device is completely off. |
| 14546 | 14554 | */ |
| 14547 | 14555 | intel_uncore_arm_unclaimed_mmio_detection(dev_priv); |
| 14556 | + | |
| 14557 | + intel_atomic_helper_free_state(dev_priv); | |
| 14548 | 14558 | } |
| 14549 | 14559 | |
| 14550 | 14560 | static void intel_atomic_commit_work(struct work_struct *work) |
| @@ -14946,17 +14956,19 @@ static void intel_begin_crtc_commit(struct drm_crtc *crtc, · 395 unmodified lines | ||
| 14946 | 14956 | to_intel_atomic_state(old_crtc_state->state); |
| 14947 | 14957 | bool modeset = needs_modeset(crtc->state); |
| 14948 | 14958 | |
| 14959 | + if (!modeset && | |
| 14960 | + (intel_cstate->base.color_mgmt_changed || | |
| 14961 | + intel_cstate->update_pipe)) { | |
| 14962 | + intel_color_set_csc(crtc->state); | |
| 14963 | + intel_color_load_luts(crtc->state); | |
| 14964 | + } | |
| 14965 | + | |
| 14949 | 14966 | /* Perform vblank evasion around commit operation */ |
| 14950 | 14967 | intel_pipe_update_start(intel_crtc); |
| 14951 | 14968 | |
| 14952 | 14969 | if (modeset) |
| 14953 | 14970 | goto out; |
| 14954 | 14971 | |
| 14955 | − if (crtc->state->color_mgmt_changed || to_intel_crtc_state(crtc->state)->update_pipe) { | |
| 14956 | − intel_color_set_csc(crtc->state); | |
| 14957 | − intel_color_load_luts(crtc->state); | |
| 14958 | − } | |
| 14959 | − | |
| 14960 | 14972 | if (intel_cstate->update_pipe) |
| 14961 | 14973 | intel_update_pipe_config(intel_crtc, old_intel_cstate); |
| 14962 | 14974 | else if (INTEL_GEN(dev_priv) >= 9) |
| @@ -16599,18 +16611,6 @@ fail: · 1636 unmodified lines | ||
| 16599 | 16611 | drm_modeset_acquire_fini(&ctx); |
| 16600 | 16612 | } |
| 16601 | 16613 | |
| 16602 | −static void intel_atomic_helper_free_state(struct work_struct *work) | |
| 16603 | −{ | |
| 16604 | − struct drm_i915_private *dev_priv = | |
| 16605 | − container_of(work, typeof(*dev_priv), atomic_helper.free_work); | |
| 16606 | − struct intel_atomic_state *state, *next; | |
| 16607 | − struct llist_node *freed; | |
| 16608 | − | |
| 16609 | − freed = llist_del_all(&dev_priv->atomic_helper.free_list); | |
| 16610 | − llist_for_each_entry_safe(state, next, freed, freed) | |
| 16611 | − drm_atomic_state_put(&state->base); | |
| 16612 | −} | |
| 16613 | − | |
| 16614 | 16614 | int intel_modeset_init(struct drm_device *dev) |
| 16615 | 16615 | { |
| 16616 | 16616 | struct drm_i915_private *dev_priv = to_i915(dev); |
| @@ -16631,7 +16631,7 @@ int intel_modeset_init(struct drm_device *dev) · 14 unmodified lines | ||
| 16631 | 16631 | dev->mode_config.funcs = &intel_mode_funcs; |
| 16632 | 16632 | |
| 16633 | 16633 | INIT_WORK(&dev_priv->atomic_helper.free_work, |
| 16634 | − intel_atomic_helper_free_state); | |
| 16634 | + intel_atomic_helper_free_state_worker); | |
| 16635 | 16635 | |
| 16636 | 16636 | intel_init_quirks(dev); |
| 16637 | 16637 | |
| @@ -16696,12 +16696,11 @@ int intel_modeset_init(struct drm_device *dev) · 58 unmodified lines | ||
| 16696 | 16696 | } |
| 16697 | 16697 | } |
| 16698 | 16698 | |
| 16699 | − intel_update_czclk(dev_priv); | |
| 16700 | − intel_update_cdclk(dev_priv); | |
| 16701 | − dev_priv->atomic_cdclk_freq = dev_priv->cdclk_freq; | |
| 16702 | − | |
| 16703 | 16699 | intel_shared_dpll_init(dev); |
| 16704 | 16700 | |
| 16701 | + intel_update_czclk(dev_priv); | |
| 16702 | + intel_modeset_init_hw(dev); | |
| 16703 | + | |
| 16705 | 16704 | if (dev_priv->max_cdclk_freq == 0) |
| 16706 | 16705 | intel_update_max_cdclk(dev_priv); |
| 16707 | 16706 | |
| @@ -17258,8 +17257,6 @@ void intel_modeset_gem_init(struct drm_device *dev) · 550 unmodified lines | ||
| 17258 | 17257 | |
| 17259 | 17258 | intel_init_gt_powersave(dev_priv); |
| 17260 | 17259 | |
| 17261 | − intel_modeset_init_hw(dev); | |
| 17262 | − | |
| 17263 | 17260 | intel_setup_overlay(dev_priv); |
| 17264 | 17261 | } |
| 17265 | 17262 | |
| @@ -105,6 +105,8 @@ intel_engine_setup(struct drm_i915_private *dev_priv, · 104 unmodified lines | ||
| 105 | 105 | /* Nothing to do here, execute in order of dependencies */ |
| 106 | 106 | engine->schedule = NULL; |
| 107 | 107 | |
| 108 | + ATOMIC_INIT_NOTIFIER_HEAD(&engine->context_status_notifier); | |
| 109 | + | |
| 108 | 110 | dev_priv->engine[id] = engine; |
| 109 | 111 | return 0; |
| 110 | 112 | } |
| @@ -357,14 +357,13 @@ static bool intel_fb_initial_config(struct drm_fb_helper *fb_helper, · 356 unmodified lines | ||
| 357 | 357 | bool *enabled, int width, int height) |
| 358 | 358 | { |
| 359 | 359 | struct drm_i915_private *dev_priv = to_i915(fb_helper->dev); |
| 360 | − unsigned long conn_configured, mask; | |
| 360 | + unsigned long conn_configured, conn_seq, mask; | |
| 361 | 361 | unsigned int count = min(fb_helper->connector_count, BITS_PER_LONG); |
| 362 | 362 | int i, j; |
| 363 | 363 | bool *save_enabled; |
| 364 | 364 | bool fallback = true; |
| 365 | 365 | int num_connectors_enabled = 0; |
| 366 | 366 | int num_connectors_detected = 0; |
| 367 | − int pass = 0; | |
| 368 | 367 | |
| 369 | 368 | save_enabled = kcalloc(count, sizeof(bool), GFP_KERNEL); |
| 370 | 369 | if (!save_enabled) |
| @@ -374,6 +373,7 @@ static bool intel_fb_initial_config(struct drm_fb_helper *fb_helper, · 3 unmodified lines | ||
| 374 | 373 | mask = BIT(count) - 1; |
| 375 | 374 | conn_configured = 0; |
| 376 | 375 | retry: |
| 376 | + conn_seq = conn_configured; | |
| 377 | 377 | for (i = 0; i < count; i++) { |
| 378 | 378 | struct drm_fb_helper_connector *fb_conn; |
| 379 | 379 | struct drm_connector *connector; |
| @@ -387,7 +387,7 @@ retry: · 7 unmodified lines | ||
| 387 | 387 | if (conn_configured & BIT(i)) |
| 388 | 388 | continue; |
| 389 | 389 | |
| 390 | − if (pass == 0 && !connector->has_tile) | |
| 390 | + if (conn_seq == 0 && !connector->has_tile) | |
| 391 | 391 | continue; |
| 392 | 392 | |
| 393 | 393 | if (connector->status == connector_status_connected) |
| @@ -498,10 +498,8 @@ retry: · 104 unmodified lines | ||
| 498 | 498 | conn_configured |= BIT(i); |
| 499 | 499 | } |
| 500 | 500 | |
| 501 | − if ((conn_configured & mask) != mask) { | |
| 502 | − pass++; | |
| 501 | + if ((conn_configured & mask) != mask && conn_configured != conn_seq) | |
| 503 | 502 | goto retry; |
| 504 | − } | |
| 505 | 503 | |
| 506 | 504 | /* |
| 507 | 505 | * If the BIOS didn't enable everything it could, fall back to have the |
| @@ -77,6 +77,11 @@ int intel_gvt_init(struct drm_i915_private *dev_priv) · 76 unmodified lines | ||
| 77 | 77 | goto bail; |
| 78 | 78 | } |
| 79 | 79 | |
| 80 | + if (!i915.enable_execlists) { | |
| 81 | + DRM_INFO("GPU guest virtualisation [GVT-g] disabled due to disabled execlist submission [i915.enable_execlists module parameter]\n"); | |
| 82 | + goto bail; | |
| 83 | + } | |
| 84 | + | |
| 80 | 85 | /* |
| 81 | 86 | * We're not in host or fail to find a MPT module, disable GVT-g |
| 82 | 87 | */ |
| @@ -1298,16 +1298,34 @@ intel_hdmi_mode_valid(struct drm_connector *connector, · 1297 unmodified lines | ||
| 1298 | 1298 | |
| 1299 | 1299 | static bool hdmi_12bpc_possible(struct intel_crtc_state *crtc_state) |
| 1300 | 1300 | { |
| 1301 | − struct drm_device *dev = crtc_state->base.crtc->dev; | |
| 1301 | + struct drm_i915_private *dev_priv = | |
| 1302 | + to_i915(crtc_state->base.crtc->dev); | |
| 1303 | + struct drm_atomic_state *state = crtc_state->base.state; | |
| 1304 | + struct drm_connector_state *connector_state; | |
| 1305 | + struct drm_connector *connector; | |
| 1306 | + int i; | |
| 1302 | 1307 | |
| 1303 | − if (HAS_GMCH_DISPLAY(to_i915(dev))) | |
| 1308 | + if (HAS_GMCH_DISPLAY(dev_priv)) | |
| 1304 | 1309 | return false; |
| 1305 | 1310 | |
| 1306 | 1311 | /* |
| 1307 | 1312 | * HDMI 12bpc affects the clocks, so it's only possible |
| 1308 | 1313 | * when not cloning with other encoder types. |
| 1309 | 1314 | */ |
| 1310 | − return crtc_state->output_types == 1 << INTEL_OUTPUT_HDMI; | |
| 1315 | + if (crtc_state->output_types != 1 << INTEL_OUTPUT_HDMI) | |
| 1316 | + return false; | |
| 1317 | + | |
| 1318 | + for_each_connector_in_state(state, connector, connector_state, i) { | |
| 1319 | + const struct drm_display_info *info = &connector->display_info; | |
| 1320 | + | |
| 1321 | + if (connector_state->crtc != crtc_state->base.crtc) | |
| 1322 | + continue; | |
| 1323 | + | |
| 1324 | + if ((info->edid_hdmi_dc_modes & DRM_EDID_HDMI_DC_36) == 0) | |
| 1325 | + return false; | |
| 1326 | + } | |
| 1327 | + | |
| 1328 | + return true; | |
| 1311 | 1329 | } |
| 1312 | 1330 | |
| 1313 | 1331 | bool intel_hdmi_compute_config(struct intel_encoder *encoder, |
| @@ -219,7 +219,7 @@ static void intel_hpd_irq_storm_reenable_work(struct work_struct *work) · 218 unmodified lines | ||
| 219 | 219 | } |
| 220 | 220 | } |
| 221 | 221 | } |
| 222 | − if (dev_priv->display.hpd_irq_setup) | |
| 222 | + if (dev_priv->display_irqs_enabled && dev_priv->display.hpd_irq_setup) | |
| 223 | 223 | dev_priv->display.hpd_irq_setup(dev_priv); |
| 224 | 224 | spin_unlock_irq(&dev_priv->irq_lock); |
| 225 | 225 | |
| @@ -425,7 +425,7 @@ void intel_hpd_irq_handler(struct drm_i915_private *dev_priv, · 199 unmodified lines | ||
| 425 | 425 | } |
| 426 | 426 | } |
| 427 | 427 | |
| 428 | − if (storm_detected) | |
| 428 | + if (storm_detected && dev_priv->display_irqs_enabled) | |
| 429 | 429 | dev_priv->display.hpd_irq_setup(dev_priv); |
| 430 | 430 | spin_unlock(&dev_priv->irq_lock); |
| 431 | 431 | |
| @@ -471,10 +471,12 @@ void intel_hpd_init(struct drm_i915_private *dev_priv) · 39 unmodified lines | ||
| 471 | 471 | * Interrupt setup is already guaranteed to be single-threaded, this is |
| 472 | 472 | * just to make the assert_spin_locked checks happy. |
| 473 | 473 | */ |
| 474 | − spin_lock_irq(&dev_priv->irq_lock); | |
| 475 | − if (dev_priv->display.hpd_irq_setup) | |
| 476 | − dev_priv->display.hpd_irq_setup(dev_priv); | |
| 477 | − spin_unlock_irq(&dev_priv->irq_lock); | |
| 474 | + if (dev_priv->display_irqs_enabled && dev_priv->display.hpd_irq_setup) { | |
| 475 | + spin_lock_irq(&dev_priv->irq_lock); | |
| 476 | + if (dev_priv->display_irqs_enabled) | |
| 477 | + dev_priv->display.hpd_irq_setup(dev_priv); | |
| 478 | + spin_unlock_irq(&dev_priv->irq_lock); | |
| 479 | + } | |
| 478 | 480 | } |
| 479 | 481 | |
| 480 | 482 | static void i915_hpd_poll_init_work(struct work_struct *work) |
| @@ -345,7 +345,8 @@ execlists_context_status_change(struct drm_i915_gem_request *rq, · 344 unmodified lines | ||
| 345 | 345 | if (!IS_ENABLED(CONFIG_DRM_I915_GVT)) |
| 346 | 346 | return; |
| 347 | 347 | |
| 348 | − atomic_notifier_call_chain(&rq->ctx->status_notifier, status, rq); | |
| 348 | + atomic_notifier_call_chain(&rq->engine->context_status_notifier, | |
| 349 | + status, rq); | |
| 349 | 350 | } |
| 350 | 351 | |
| 351 | 352 | static void |
| @@ -4891,6 +4891,12 @@ static void gen6_set_rps_thresholds(struct drm_i915_private *dev_priv, u8 val) · 4890 unmodified lines | ||
| 4891 | 4891 | break; |
| 4892 | 4892 | } |
| 4893 | 4893 | |
| 4894 | + /* When byt can survive without system hang with dynamic | |
| 4895 | + * sw freq adjustments, this restriction can be lifted. | |
| 4896 | + */ | |
| 4897 | + if (IS_VALLEYVIEW(dev_priv)) | |
| 4898 | + goto skip_hw_write; | |
| 4899 | + | |
| 4894 | 4900 | I915_WRITE(GEN6_RP_UP_EI, |
| 4895 | 4901 | GT_INTERVAL_FROM_US(dev_priv, ei_up)); |
| 4896 | 4902 | I915_WRITE(GEN6_RP_UP_THRESHOLD, |
| @@ -4911,6 +4917,7 @@ static void gen6_set_rps_thresholds(struct drm_i915_private *dev_priv, u8 val) · 14 unmodified lines | ||
| 4911 | 4917 | GEN6_RP_UP_BUSY_AVG | |
| 4912 | 4918 | GEN6_RP_DOWN_IDLE_AVG); |
| 4913 | 4919 | |
| 4920 | +skip_hw_write: | |
| 4914 | 4921 | dev_priv->rps.power = new_power; |
| 4915 | 4922 | dev_priv->rps.up_threshold = threshold_up; |
| 4916 | 4923 | dev_priv->rps.down_threshold = threshold_down; |
| @@ -4921,8 +4928,9 @@ static u32 gen6_rps_pm_mask(struct drm_i915_private *dev_priv, u8 val) · 4 unmodified lines | ||
| 4921 | 4928 | { |
| 4922 | 4929 | u32 mask = 0; |
| 4923 | 4930 | |
| 4931 | + /* We use UP_EI_EXPIRED interupts for both up/down in manual mode */ | |
| 4924 | 4932 | if (val > dev_priv->rps.min_freq_softlimit) |
| 4925 | − mask |= GEN6_PM_RP_DOWN_EI_EXPIRED | GEN6_PM_RP_DOWN_THRESHOLD | GEN6_PM_RP_DOWN_TIMEOUT; | |
| 4933 | + mask |= GEN6_PM_RP_UP_EI_EXPIRED | GEN6_PM_RP_DOWN_THRESHOLD | GEN6_PM_RP_DOWN_TIMEOUT; | |
| 4926 | 4934 | if (val < dev_priv->rps.max_freq_softlimit) |
| 4927 | 4935 | mask |= GEN6_PM_RP_UP_EI_EXPIRED | GEN6_PM_RP_UP_THRESHOLD; |
| 4928 | 4936 | |
| @@ -5032,7 +5040,7 @@ void gen6_rps_busy(struct drm_i915_private *dev_priv) · 103 unmodified lines | ||
| 5032 | 5040 | { |
| 5033 | 5041 | mutex_lock(&dev_priv->rps.hw_lock); |
| 5034 | 5042 | if (dev_priv->rps.enabled) { |
| 5035 | − if (dev_priv->pm_rps_events & (GEN6_PM_RP_DOWN_EI_EXPIRED | GEN6_PM_RP_UP_EI_EXPIRED)) | |
| 5043 | + if (dev_priv->pm_rps_events & GEN6_PM_RP_UP_EI_EXPIRED) | |
| 5036 | 5044 | gen6_rps_reset_ei(dev_priv); |
| 5037 | 5045 | I915_WRITE(GEN6_PMINTRMSK, |
| 5038 | 5046 | gen6_rps_pm_mask(dev_priv, dev_priv->rps.cur_freq)); |
| @@ -7916,10 +7924,10 @@ static bool skl_pcode_try_request(struct drm_i915_private *dev_priv, u32 mbox, · 2877 unmodified lines | ||
| 7916 | 7924 | * @timeout_base_ms: timeout for polling with preemption enabled |
| 7917 | 7925 | * |
| 7918 | 7926 | * Keep resending the @request to @mbox until PCODE acknowledges it, PCODE |
| 7919 | − * reports an error or an overall timeout of @timeout_base_ms+10 ms expires. | |
| 7927 | + * reports an error or an overall timeout of @timeout_base_ms+50 ms expires. | |
| 7920 | 7928 | * The request is acknowledged once the PCODE reply dword equals @reply after |
| 7921 | 7929 | * applying @reply_mask. Polling is first attempted with preemption enabled |
| 7922 | − * for @timeout_base_ms and if this times out for another 10 ms with | |
| 7930 | + * for @timeout_base_ms and if this times out for another 50 ms with | |
| 7923 | 7931 | * preemption disabled. |
| 7924 | 7932 | * |
| 7925 | 7933 | * Returns 0 on success, %-ETIMEDOUT in case of a timeout, <0 in case of some |
| @@ -7955,14 +7963,15 @@ int skl_pcode_request(struct drm_i915_private *dev_priv, u32 mbox, u32 request, · 29 unmodified lines | ||
| 7955 | 7963 | * worst case) _and_ PCODE was busy for some reason even after a |
| 7956 | 7964 | * (queued) request and @timeout_base_ms delay. As a workaround retry |
| 7957 | 7965 | * the poll with preemption disabled to maximize the number of |
| 7958 | − * requests. Increase the timeout from @timeout_base_ms to 10ms to | |
| 7966 | + * requests. Increase the timeout from @timeout_base_ms to 50ms to | |
| 7959 | 7967 | * account for interrupts that could reduce the number of these |
| 7960 | − * requests. | |
| 7968 | + * requests, and for any quirks of the PCODE firmware that delays | |
| 7969 | + * the request completion. | |
| 7961 | 7970 | */ |
| 7962 | 7971 | DRM_DEBUG_KMS("PCODE timeout, retrying with preemption disabled\n"); |
| 7963 | 7972 | WARN_ON_ONCE(timeout_base_ms > 3); |
| 7964 | 7973 | preempt_disable(); |
| 7965 | − ret = wait_for_atomic(COND, 10); | |
| 7974 | + ret = wait_for_atomic(COND, 50); | |
| 7966 | 7975 | preempt_enable(); |
| 7967 | 7976 | |
| 7968 | 7977 | out: |
| @@ -403,6 +403,9 @@ struct intel_engine_cs { · 402 unmodified lines | ||
| 403 | 403 | */ |
| 404 | 404 | struct i915_gem_context *legacy_active_context; |
| 405 | 405 | |
| 406 | + /* status_notifier: list of callbacks for context-switch changes */ | |
| 407 | + struct atomic_notifier_head context_status_notifier; | |
| 408 | + | |
| 406 | 409 | struct intel_engine_hangcheck hangcheck; |
| 407 | 410 | |
| 408 | 411 | bool needs_cmd_parser; |
| @@ -254,9 +254,6 @@ skl_update_plane(struct drm_plane *drm_plane, · 253 unmodified lines | ||
| 254 | 254 | int scaler_id = plane_state->scaler_id; |
| 255 | 255 | const struct intel_scaler *scaler; |
| 256 | 256 | |
| 257 | − DRM_DEBUG_KMS("plane = %d PS_PLANE_SEL(plane) = 0x%x\n", | |
| 258 | − plane_id, PS_PLANE_SEL(plane_id)); | |
| 259 | − | |
| 260 | 257 | scaler = &crtc_state->scaler_state.scalers[scaler_id]; |
| 261 | 258 | |
| 262 | 259 | I915_WRITE(SKL_PS_CTRL(pipe, scaler_id), |
| @@ -119,6 +119,8 @@ fw_domains_get(struct drm_i915_private *dev_priv, enum forcewake_domains fw_doma · 118 unmodified lines | ||
| 119 | 119 | |
| 120 | 120 | for_each_fw_domain_masked(d, fw_domains, dev_priv) |
| 121 | 121 | fw_domain_wait_ack(d); |
| 122 | + | |
| 123 | + dev_priv->uncore.fw_domains_active |= fw_domains; | |
| 122 | 124 | } |
| 123 | 125 | |
| 124 | 126 | static void |
| @@ -130,6 +132,8 @@ fw_domains_put(struct drm_i915_private *dev_priv, enum forcewake_domains fw_doma · 5 unmodified lines | ||
| 130 | 132 | fw_domain_put(d); |
| 131 | 133 | fw_domain_posting_read(d); |
| 132 | 134 | } |
| 135 | + | |
| 136 | + dev_priv->uncore.fw_domains_active &= ~fw_domains; | |
| 133 | 137 | } |
| 134 | 138 | |
| 135 | 139 | static void |
| @@ -240,10 +244,8 @@ intel_uncore_fw_release_timer(struct hrtimer *timer) · 104 unmodified lines | ||
| 240 | 244 | if (WARN_ON(domain->wake_count == 0)) |
| 241 | 245 | domain->wake_count++; |
| 242 | 246 | |
| 243 | − if (--domain->wake_count == 0) { | |
| 247 | + if (--domain->wake_count == 0) | |
| 244 | 248 | dev_priv->uncore.funcs.force_wake_put(dev_priv, domain->mask); |
| 245 | − dev_priv->uncore.fw_domains_active &= ~domain->mask; | |
| 246 | − } | |
| 247 | 249 | |
| 248 | 250 | spin_unlock_irqrestore(&dev_priv->uncore.lock, irqflags); |
| 249 | 251 | |
| @@ -454,10 +456,8 @@ static void __intel_uncore_forcewake_get(struct drm_i915_private *dev_priv, · 204 unmodified lines | ||
| 454 | 456 | fw_domains &= ~domain->mask; |
| 455 | 457 | } |
| 456 | 458 | |
| 457 | − if (fw_domains) { | |
| 459 | + if (fw_domains) | |
| 458 | 460 | dev_priv->uncore.funcs.force_wake_get(dev_priv, fw_domains); |
| 459 | − dev_priv->uncore.fw_domains_active |= fw_domains; | |
| 460 | − } | |
| 461 | 461 | } |
| 462 | 462 | |
| 463 | 463 | /** |
| @@ -968,7 +968,6 @@ static noinline void ___force_wake_auto(struct drm_i915_private *dev_priv, · 504 unmodified lines | ||
| 968 | 968 | fw_domain_arm_timer(domain); |
| 969 | 969 | |
| 970 | 970 | dev_priv->uncore.funcs.force_wake_get(dev_priv, fw_domains); |
| 971 | − dev_priv->uncore.fw_domains_active |= fw_domains; | |
| 972 | 971 | } |
| 973 | 972 | |
| 974 | 973 | static inline void __force_wake_auto(struct drm_i915_private *dev_priv, |
| @@ -147,9 +147,6 @@ static int omap_gem_dmabuf_mmap(struct dma_buf *buffer, · 146 unmodified lines | ||
| 147 | 147 | struct drm_gem_object *obj = buffer->priv; |
| 148 | 148 | int ret = 0; |
| 149 | 149 | |
| 150 | − if (WARN_ON(!obj->filp)) | |
| 151 | − return -EINVAL; | |
| 152 | − | |
| 153 | 150 | ret = drm_gem_mmap_obj(obj, omap_gem_mmap_size(obj), vma); |
| 154 | 151 | if (ret < 0) |
| 155 | 152 | return ret; |
| @@ -2984,6 +2984,16 @@ static void si_apply_state_adjust_rules(struct radeon_device *rdev, · 2983 unmodified lines | ||
| 2984 | 2984 | (rdev->pdev->device == 0x6667)) { |
| 2985 | 2985 | max_sclk = 75000; |
| 2986 | 2986 | } |
| 2987 | + } else if (rdev->family == CHIP_OLAND) { | |
| 2988 | + if ((rdev->pdev->revision == 0xC7) || | |
| 2989 | + (rdev->pdev->revision == 0x80) || | |
| 2990 | + (rdev->pdev->revision == 0x81) || | |
| 2991 | + (rdev->pdev->revision == 0x83) || | |
| 2992 | + (rdev->pdev->revision == 0x87) || | |
| 2993 | + (rdev->pdev->device == 0x6604) || | |
| 2994 | + (rdev->pdev->device == 0x6605)) { | |
| 2995 | + max_sclk = 75000; | |
| 2996 | + } | |
| 2987 | 2997 | } |
| 2988 | 2998 | |
| 2989 | 2999 | if (rps->vce_active) { |
| @@ -464,6 +464,7 @@ static void tilcdc_crtc_enable(struct drm_crtc *crtc) · 463 unmodified lines | ||
| 464 | 464 | { |
| 465 | 465 | struct drm_device *dev = crtc->dev; |
| 466 | 466 | struct tilcdc_crtc *tilcdc_crtc = to_tilcdc_crtc(crtc); |
| 467 | + unsigned long flags; | |
| 467 | 468 | |
| 468 | 469 | WARN_ON(!drm_modeset_is_locked(&crtc->mutex)); |
| 469 | 470 | mutex_lock(&tilcdc_crtc->enable_lock); |
| @@ -484,7 +485,17 @@ static void tilcdc_crtc_enable(struct drm_crtc *crtc) · 14 unmodified lines | ||
| 484 | 485 | tilcdc_write_mask(dev, LCDC_RASTER_CTRL_REG, |
| 485 | 486 | LCDC_PALETTE_LOAD_MODE(DATA_ONLY), |
| 486 | 487 | LCDC_PALETTE_LOAD_MODE_MASK); |
| 488 | + | |
| 489 | + /* There is no real chance for a race here as the time stamp | |
| 490 | + * is taken before the raster DMA is started. The spin-lock is | |
| 491 | + * taken to have a memory barrier after taking the time-stamp | |
| 492 | + * and to avoid a context switch between taking the stamp and | |
| 493 | + * enabling the raster. | |
| 494 | + */ | |
| 495 | + spin_lock_irqsave(&tilcdc_crtc->irq_lock, flags); | |
| 496 | + tilcdc_crtc->last_vblank = ktime_get(); | |
| 487 | 497 | tilcdc_set(dev, LCDC_RASTER_CTRL_REG, LCDC_RASTER_ENABLE); |
| 498 | + spin_unlock_irqrestore(&tilcdc_crtc->irq_lock, flags); | |
| 488 | 499 | |
| 489 | 500 | drm_crtc_vblank_on(crtc); |
| 490 | 501 | |
| @@ -539,7 +550,6 @@ static void tilcdc_crtc_off(struct drm_crtc *crtc, bool shutdown) · 48 unmodified lines | ||
| 539 | 550 | } |
| 540 | 551 | |
| 541 | 552 | drm_flip_work_commit(&tilcdc_crtc->unref_work, priv->wq); |
| 542 | − tilcdc_crtc->last_vblank = 0; | |
| 543 | 553 | |
| 544 | 554 | tilcdc_crtc->enabled = false; |
| 545 | 555 | mutex_unlock(&tilcdc_crtc->enable_lock); |
| @@ -602,7 +612,6 @@ int tilcdc_crtc_update_fb(struct drm_crtc *crtc, · 56 unmodified lines | ||
| 602 | 612 | { |
| 603 | 613 | struct tilcdc_crtc *tilcdc_crtc = to_tilcdc_crtc(crtc); |
| 604 | 614 | struct drm_device *dev = crtc->dev; |
| 605 | − unsigned long flags; | |
| 606 | 615 | |
| 607 | 616 | WARN_ON(!drm_modeset_is_locked(&crtc->mutex)); |
| 608 | 617 | |
| @@ -614,28 +623,30 @@ int tilcdc_crtc_update_fb(struct drm_crtc *crtc, · 5 unmodified lines | ||
| 614 | 623 | drm_framebuffer_reference(fb); |
| 615 | 624 | |
| 616 | 625 | crtc->primary->fb = fb; |
| 626 | + tilcdc_crtc->event = event; | |
| 617 | 627 | |
| 618 | − spin_lock_irqsave(&tilcdc_crtc->irq_lock, flags); | |
| 628 | + mutex_lock(&tilcdc_crtc->enable_lock); | |
| 619 | 629 | |
| 620 | − if (crtc->hwmode.vrefresh && ktime_to_ns(tilcdc_crtc->last_vblank)) { | |
| 630 | + if (tilcdc_crtc->enabled) { | |
| 631 | + unsigned long flags; | |
| 621 | 632 | ktime_t next_vblank; |
| 622 | 633 | s64 tdiff; |
| 623 | 634 | |
| 624 | − next_vblank = ktime_add_us(tilcdc_crtc->last_vblank, | |
| 625 | − 1000000 / crtc->hwmode.vrefresh); | |
| 635 | + spin_lock_irqsave(&tilcdc_crtc->irq_lock, flags); | |
| 626 | 636 | |
| 637 | + next_vblank = ktime_add_us(tilcdc_crtc->last_vblank, | |
| 638 | + 1000000 / crtc->hwmode.vrefresh); | |
| 627 | 639 | tdiff = ktime_to_us(ktime_sub(next_vblank, ktime_get())); |
| 628 | 640 | |
| 629 | 641 | if (tdiff < TILCDC_VBLANK_SAFETY_THRESHOLD_US) |
| 630 | 642 | tilcdc_crtc->next_fb = fb; |
| 631 | − } | |
| 632 | − | |
| 633 | − if (tilcdc_crtc->next_fb != fb) | |
| 634 | − set_scanout(crtc, fb); | |
| 643 | + else | |
| 644 | + set_scanout(crtc, fb); | |
| 635 | 645 | |
| 636 | − tilcdc_crtc->event = event; | |
| 646 | + spin_unlock_irqrestore(&tilcdc_crtc->irq_lock, flags); | |
| 647 | + } | |
| 637 | 648 | |
| 638 | − spin_unlock_irqrestore(&tilcdc_crtc->irq_lock, flags); | |
| 649 | + mutex_unlock(&tilcdc_crtc->enable_lock); | |
| 639 | 650 | |
| 640 | 651 | return 0; |
| 641 | 652 | } |
| @@ -1036,5 +1047,5 @@ int tilcdc_crtc_create(struct drm_device *dev) · 394 unmodified lines | ||
| 1036 | 1047 | |
| 1037 | 1048 | fail: |
| 1038 | 1049 | tilcdc_crtc_destroy(crtc); |
| 1039 | − return -ENOMEM; | |
| 1050 | + return ret; | |
| 1040 | 1051 | } |
| @@ -175,11 +175,11 @@ config HID_CHERRY · 174 unmodified lines | ||
| 175 | 175 | Support for Cherry Cymotion keyboard. |
| 176 | 176 | |
| 177 | 177 | config HID_CHICONY |
| 178 | − tristate "Chicony Tactical pad" | |
| 178 | + tristate "Chicony devices" | |
| 179 | 179 | depends on HID |
| 180 | 180 | default !EXPERT |
| 181 | 181 | ---help--- |
| 182 | − Support for Chicony Tactical pad. | |
| 182 | + Support for Chicony Tactical pad and special keys on Chicony keyboards. | |
| 183 | 183 | |
| 184 | 184 | config HID_CORSAIR |
| 185 | 185 | tristate "Corsair devices" |
| @@ -190,6 +190,7 @@ config HID_CORSAIR · 4 unmodified lines | ||
| 190 | 190 | |
| 191 | 191 | Supported devices: |
| 192 | 192 | - Vengeance K90 |
| 193 | + - Scimitar PRO RGB | |
| 193 | 194 | |
| 194 | 195 | config HID_PRODIKEYS |
| 195 | 196 | tristate "Prodikeys PC-MIDI Keyboard support" |
| @@ -86,6 +86,7 @@ static const struct hid_device_id ch_devices[] = { · 85 unmodified lines | ||
| 86 | 86 | { HID_USB_DEVICE(USB_VENDOR_ID_CHICONY, USB_DEVICE_ID_CHICONY_WIRELESS2) }, |
| 87 | 87 | { HID_USB_DEVICE(USB_VENDOR_ID_CHICONY, USB_DEVICE_ID_CHICONY_AK1D) }, |
| 88 | 88 | { HID_USB_DEVICE(USB_VENDOR_ID_CHICONY, USB_DEVICE_ID_CHICONY_ACER_SWITCH12) }, |
| 89 | + { HID_USB_DEVICE(USB_VENDOR_ID_JESS, USB_DEVICE_ID_JESS_ZEN_AIO_KBD) }, | |
| 89 | 90 | { } |
| 90 | 91 | }; |
| 91 | 92 | MODULE_DEVICE_TABLE(hid, ch_devices); |
| @@ -1870,6 +1870,7 @@ static const struct hid_device_id hid_have_special_driver[] = { · 1869 unmodified lines | ||
| 1870 | 1870 | { HID_USB_DEVICE(USB_VENDOR_ID_CHICONY, USB_DEVICE_ID_CHICONY_AK1D) }, |
| 1871 | 1871 | { HID_USB_DEVICE(USB_VENDOR_ID_CHICONY, USB_DEVICE_ID_CHICONY_ACER_SWITCH12) }, |
| 1872 | 1872 | { HID_USB_DEVICE(USB_VENDOR_ID_CORSAIR, USB_DEVICE_ID_CORSAIR_K90) }, |
| 1873 | + { HID_USB_DEVICE(USB_VENDOR_ID_CORSAIR, USB_DEVICE_ID_CORSAIR_SCIMITAR_PRO_RGB) }, | |
| 1873 | 1874 | { HID_USB_DEVICE(USB_VENDOR_ID_CREATIVELABS, USB_DEVICE_ID_PRODIKEYS_PCMIDI) }, |
| 1874 | 1875 | { HID_USB_DEVICE(USB_VENDOR_ID_CYGNAL, USB_DEVICE_ID_CYGNAL_CP2112) }, |
| 1875 | 1876 | { HID_USB_DEVICE(USB_VENDOR_ID_CYPRESS, USB_DEVICE_ID_CYPRESS_BARCODE_1) }, |
| @@ -1910,6 +1911,7 @@ static const struct hid_device_id hid_have_special_driver[] = { · 34 unmodified lines | ||
| 1910 | 1911 | { HID_USB_DEVICE(USB_VENDOR_ID_HOLTEK_ALT, USB_DEVICE_ID_HOLTEK_ALT_MOUSE_A081) }, |
| 1911 | 1912 | { HID_USB_DEVICE(USB_VENDOR_ID_HOLTEK_ALT, USB_DEVICE_ID_HOLTEK_ALT_MOUSE_A0C2) }, |
| 1912 | 1913 | { HID_USB_DEVICE(USB_VENDOR_ID_HUION, USB_DEVICE_ID_HUION_TABLET) }, |
| 1914 | + { HID_USB_DEVICE(USB_VENDOR_ID_JESS, USB_DEVICE_ID_JESS_ZEN_AIO_KBD) }, | |
| 1913 | 1915 | { HID_USB_DEVICE(USB_VENDOR_ID_JESS2, USB_DEVICE_ID_JESS2_COLOR_RUMBLE_PAD) }, |
| 1914 | 1916 | { HID_BLUETOOTH_DEVICE(USB_VENDOR_ID_ION, USB_DEVICE_ID_ICADE) }, |
| 1915 | 1917 | { HID_USB_DEVICE(USB_VENDOR_ID_KENSINGTON, USB_DEVICE_ID_KS_SLIMBLADE) }, |
| @@ -3,8 +3,10 @@ · 2 unmodified lines | ||
| 3 | 3 | * |
| 4 | 4 | * Supported devices: |
| 5 | 5 | * - Vengeance K90 Keyboard |
| 6 | + * - Scimitar PRO RGB Gaming Mouse | |
| 6 | 7 | * |
| 7 | 8 | * Copyright (c) 2015 Clement Vuchener |
| 9 | + * Copyright (c) 2017 Oscar Campos | |
| 8 | 10 | */ |
| 9 | 11 | |
| 10 | 12 | /* |
| @@ -670,10 +672,51 @@ static int corsair_input_mapping(struct hid_device *dev, · 659 unmodified lines | ||
| 670 | 672 | return 0; |
| 671 | 673 | } |
| 672 | 674 | |
| 675 | +/* | |
| 676 | + * The report descriptor of Corsair Scimitar RGB Pro gaming mouse is | |
| 677 | + * non parseable as they define two consecutive Logical Minimum for | |
| 678 | + * the Usage Page (Consumer) in rdescs bytes 75 and 77 being 77 0x16 | |
| 679 | + * that should be obviousy 0x26 for Logical Magimum of 16 bits. This | |
| 680 | + * prevents poper parsing of the report descriptor due Logical | |
| 681 | + * Minimum being larger than Logical Maximum. | |
| 682 | + * | |
| 683 | + * This driver fixes the report descriptor for: | |
| 684 | + * - USB ID b1c:1b3e, sold as Scimitar RGB Pro Gaming mouse | |
| 685 | + */ | |
| 686 | + | |
| 687 | +static __u8 *corsair_mouse_report_fixup(struct hid_device *hdev, __u8 *rdesc, | |
| 688 | + unsigned int *rsize) | |
| 689 | +{ | |
| 690 | + struct usb_interface *intf = to_usb_interface(hdev->dev.parent); | |
| 691 | + | |
| 692 | + if (intf->cur_altsetting->desc.bInterfaceNumber == 1) { | |
| 693 | + /* | |
| 694 | + * Corsair Scimitar RGB Pro report descriptor is broken and | |
| 695 | + * defines two different Logical Minimum for the Consumer | |
| 696 | + * Application. The byte 77 should be a 0x26 defining a 16 | |
| 697 | + * bits integer for the Logical Maximum but it is a 0x16 | |
| 698 | + * instead (Logical Minimum) | |
| 699 | + */ | |
| 700 | + switch (hdev->product) { | |
| 701 | + case USB_DEVICE_ID_CORSAIR_SCIMITAR_PRO_RGB: | |
| 702 | + if (*rsize >= 172 && rdesc[75] == 0x15 && rdesc[77] == 0x16 | |
| 703 | + && rdesc[78] == 0xff && rdesc[79] == 0x0f) { | |
| 704 | + hid_info(hdev, "Fixing up report descriptor\n"); | |
| 705 | + rdesc[77] = 0x26; | |
| 706 | + } | |
| 707 | + break; | |
| 708 | + } | |
| 709 | + | |
| 710 | + } | |
| 711 | + return rdesc; | |
| 712 | +} | |
| 713 | + | |
| 673 | 714 | static const struct hid_device_id corsair_devices[] = { |
| 674 | 715 | { HID_USB_DEVICE(USB_VENDOR_ID_CORSAIR, USB_DEVICE_ID_CORSAIR_K90), |
| 675 | 716 | .driver_data = CORSAIR_USE_K90_MACRO | |
| 676 | 717 | CORSAIR_USE_K90_BACKLIGHT }, |
| 718 | + { HID_USB_DEVICE(USB_VENDOR_ID_CORSAIR, | |
| 719 | + USB_DEVICE_ID_CORSAIR_SCIMITAR_PRO_RGB) }, | |
| 677 | 720 | {} |
| 678 | 721 | }; |
| 679 | 722 | |
| @@ -686,10 +729,14 @@ static struct hid_driver corsair_driver = { · 6 unmodified lines | ||
| 686 | 729 | .event = corsair_event, |
| 687 | 730 | .remove = corsair_remove, |
| 688 | 731 | .input_mapping = corsair_input_mapping, |
| 732 | + .report_fixup = corsair_mouse_report_fixup, | |
| 689 | 733 | }; |
| 690 | 734 | |
| 691 | 735 | module_hid_driver(corsair_driver); |
| 692 | 736 | |
| 693 | 737 | MODULE_LICENSE("GPL"); |
| 738 | +/* Original K90 driver author */ | |
| 694 | 739 | MODULE_AUTHOR("Clement Vuchener"); |
| 740 | +/* Scimitar PRO RGB driver author */ | |
| 741 | +MODULE_AUTHOR("Oscar Campos"); | |
| 695 | 742 | MODULE_DESCRIPTION("HID driver for Corsair devices"); |
| @@ -278,6 +278,9 @@ · 277 unmodified lines | ||
| 278 | 278 | #define USB_DEVICE_ID_CORSAIR_K70RGB 0x1b13 |
| 279 | 279 | #define USB_DEVICE_ID_CORSAIR_STRAFE 0x1b15 |
| 280 | 280 | #define USB_DEVICE_ID_CORSAIR_K65RGB 0x1b17 |
| 281 | +#define USB_DEVICE_ID_CORSAIR_K70RGB_RAPIDFIRE 0x1b38 | |
| 282 | +#define USB_DEVICE_ID_CORSAIR_K65RGB_RAPIDFIRE 0x1b39 | |
| 283 | +#define USB_DEVICE_ID_CORSAIR_SCIMITAR_PRO_RGB 0x1b3e | |
| 281 | 284 | |
| 282 | 285 | #define USB_VENDOR_ID_CREATIVELABS 0x041e |
| 283 | 286 | #define USB_DEVICE_ID_CREATIVE_SB_OMNI_SURROUND_51 0x322c |
| @@ -557,6 +560,7 @@ · 273 unmodified lines | ||
| 557 | 560 | |
| 558 | 561 | #define USB_VENDOR_ID_JESS 0x0c45 |
| 559 | 562 | #define USB_DEVICE_ID_JESS_YUREX 0x1010 |
| 563 | +#define USB_DEVICE_ID_JESS_ZEN_AIO_KBD 0x5112 | |
| 560 | 564 | |
| 561 | 565 | #define USB_VENDOR_ID_JESS2 0x0f30 |
| 562 | 566 | #define USB_DEVICE_ID_JESS2_COLOR_RUMBLE_PAD 0x0111 |
| @@ -2632,6 +2632,8 @@ err_stop: · 2631 unmodified lines | ||
| 2632 | 2632 | sony_leds_remove(sc); |
| 2633 | 2633 | if (sc->quirks & SONY_BATTERY_SUPPORT) |
| 2634 | 2634 | sony_battery_remove(sc); |
| 2635 | + if (sc->touchpad) | |
| 2636 | + sony_unregister_touchpad(sc); | |
| 2635 | 2637 | sony_cancel_work_sync(sc); |
| 2636 | 2638 | kfree(sc->output_report_dmabuf); |
| 2637 | 2639 | sony_remove_dev_list(sc); |
| @@ -80,6 +80,9 @@ static const struct hid_blacklist { · 79 unmodified lines | ||
| 80 | 80 | { USB_VENDOR_ID_CORSAIR, USB_DEVICE_ID_CORSAIR_K70RGB, HID_QUIRK_NO_INIT_REPORTS }, |
| 81 | 81 | { USB_VENDOR_ID_CORSAIR, USB_DEVICE_ID_CORSAIR_K65RGB, HID_QUIRK_NO_INIT_REPORTS }, |
| 82 | 82 | { USB_VENDOR_ID_CORSAIR, USB_DEVICE_ID_CORSAIR_STRAFE, HID_QUIRK_NO_INIT_REPORTS | HID_QUIRK_ALWAYS_POLL }, |
| 83 | + { USB_VENDOR_ID_CORSAIR, USB_DEVICE_ID_CORSAIR_K70RGB_RAPIDFIRE, HID_QUIRK_NO_INIT_REPORTS | HID_QUIRK_ALWAYS_POLL }, | |
| 84 | + { USB_VENDOR_ID_CORSAIR, USB_DEVICE_ID_CORSAIR_K65RGB_RAPIDFIRE, HID_QUIRK_NO_INIT_REPORTS | HID_QUIRK_ALWAYS_POLL }, | |
| 85 | + { USB_VENDOR_ID_CORSAIR, USB_DEVICE_ID_CORSAIR_SCIMITAR_PRO_RGB, HID_QUIRK_NO_INIT_REPORTS | HID_QUIRK_ALWAYS_POLL }, | |
| 83 | 86 | { USB_VENDOR_ID_CREATIVELABS, USB_DEVICE_ID_CREATIVE_SB_OMNI_SURROUND_51, HID_QUIRK_NOGET }, |
| 84 | 87 | { USB_VENDOR_ID_DMI, USB_DEVICE_ID_DMI_ENC, HID_QUIRK_NOGET }, |
| 85 | 88 | { USB_VENDOR_ID_DRAGONRISE, USB_DEVICE_ID_DRAGONRISE_WIIU, HID_QUIRK_MULTI_INPUT }, |
| @@ -2579,7 +2579,9 @@ static void wacom_remove(struct hid_device *hdev) · 2578 unmodified lines | ||
| 2579 | 2579 | |
| 2580 | 2580 | /* make sure we don't trigger the LEDs */ |
| 2581 | 2581 | wacom_led_groups_release(wacom); |
| 2582 | − wacom_release_resources(wacom); | |
| 2582 | + | |
| 2583 | + if (wacom->wacom_wac.features.type != REMOTE) | |
| 2584 | + wacom_release_resources(wacom); | |
| 2583 | 2585 | |
| 2584 | 2586 | hid_set_drvdata(hdev, NULL); |
| 2585 | 2587 | } |
| @@ -1959,8 +1959,10 @@ static void wacom_wac_pen_usage_mapping(struct hid_device *hdev, · 1958 unmodified lines | ||
| 1959 | 1959 | input_set_capability(input, EV_KEY, BTN_TOOL_BRUSH); |
| 1960 | 1960 | input_set_capability(input, EV_KEY, BTN_TOOL_PENCIL); |
| 1961 | 1961 | input_set_capability(input, EV_KEY, BTN_TOOL_AIRBRUSH); |
| 1962 | − input_set_capability(input, EV_KEY, BTN_TOOL_MOUSE); | |
| 1963 | − input_set_capability(input, EV_KEY, BTN_TOOL_LENS); | |
| 1962 | + if (!(features->device_type & WACOM_DEVICETYPE_DIRECT)) { | |
| 1963 | + input_set_capability(input, EV_KEY, BTN_TOOL_MOUSE); | |
| 1964 | + input_set_capability(input, EV_KEY, BTN_TOOL_LENS); | |
| 1965 | + } | |
| 1964 | 1966 | break; |
| 1965 | 1967 | case WACOM_HID_WD_FINGERWHEEL: |
| 1966 | 1968 | wacom_map_usage(input, usage, field, EV_ABS, ABS_WHEEL, 0); |
| @@ -4197,10 +4199,10 @@ static const struct wacom_features wacom_features_0x343 = · 2230 unmodified lines | ||
| 4197 | 4199 | WACOM_DTU_OFFSET, WACOM_DTU_OFFSET }; |
| 4198 | 4200 | static const struct wacom_features wacom_features_0x360 = |
| 4199 | 4201 | { "Wacom Intuos Pro M", 44800, 29600, 8191, 63, |
| 4200 | − INTUOSP2_BT, WACOM_INTUOS_RES, WACOM_INTUOS_RES, 9, .touch_max = 10 }; | |
| 4202 | + INTUOSP2_BT, WACOM_INTUOS3_RES, WACOM_INTUOS3_RES, 9, .touch_max = 10 }; | |
| 4201 | 4203 | static const struct wacom_features wacom_features_0x361 = |
| 4202 | 4204 | { "Wacom Intuos Pro L", 62200, 43200, 8191, 63, |
| 4203 | − INTUOSP2_BT, WACOM_INTUOS_RES, WACOM_INTUOS_RES, 9, .touch_max = 10 }; | |
| 4205 | + INTUOSP2_BT, WACOM_INTUOS3_RES, WACOM_INTUOS3_RES, 9, .touch_max = 10 }; | |
| 4204 | 4206 | |
| 4205 | 4207 | static const struct wacom_features wacom_features_HID_ANY_ID = |
| 4206 | 4208 | { "Wacom HID", .type = HID_GENERIC, .oVid = HID_ANY_ID, .oPid = HID_ANY_ID }; |
| @@ -502,12 +502,15 @@ int vmbus_teardown_gpadl(struct vmbus_channel *channel, u32 gpadl_handle) · 501 unmodified lines | ||
| 502 | 502 | |
| 503 | 503 | wait_for_completion(&info->waitevent); |
| 504 | 504 | |
| 505 | − if (channel->rescind) { | |
| 506 | − ret = -ENODEV; | |
| 507 | − goto post_msg_err; | |
| 508 | − } | |
| 509 | − | |
| 510 | 505 | post_msg_err: |
| 506 | + /* | |
| 507 | + * If the channel has been rescinded; | |
| 508 | + * we will be awakened by the rescind | |
| 509 | + * handler; set the error code to zero so we don't leak memory. | |
| 510 | + */ | |
| 511 | + if (channel->rescind) | |
| 512 | + ret = 0; | |
| 513 | + | |
| 511 | 514 | spin_lock_irqsave(&vmbus_connection.channelmsg_lock, flags); |
| 512 | 515 | list_del(&info->msglistentry); |
| 513 | 516 | spin_unlock_irqrestore(&vmbus_connection.channelmsg_lock, flags); |
| @@ -530,15 +533,13 @@ static int vmbus_close_internal(struct vmbus_channel *channel) · 16 unmodified lines | ||
| 530 | 533 | int ret; |
| 531 | 534 | |
| 532 | 535 | /* |
| 533 | − * vmbus_on_event(), running in the tasklet, can race | |
| 536 | + * vmbus_on_event(), running in the per-channel tasklet, can race | |
| 534 | 537 | * with vmbus_close_internal() in the case of SMP guest, e.g., when |
| 535 | 538 | * the former is accessing channel->inbound.ring_buffer, the latter |
| 536 | − * could be freeing the ring_buffer pages. | |
| 537 | − * | |
| 538 | − * To resolve the race, we can serialize them by disabling the | |
| 539 | − * tasklet when the latter is running here. | |
| 539 | + * could be freeing the ring_buffer pages, so here we must stop it | |
| 540 | + * first. | |
| 540 | 541 | */ |
| 541 | − hv_event_tasklet_disable(channel); | |
| 542 | + tasklet_disable(&channel->callback_event); | |
| 542 | 543 | |
| 543 | 544 | /* |
| 544 | 545 | * In case a device driver's probe() fails (e.g., |
| @@ -605,8 +606,6 @@ static int vmbus_close_internal(struct vmbus_channel *channel) · 60 unmodified lines | ||
| 605 | 606 | get_order(channel->ringbuffer_pagecount * PAGE_SIZE)); |
| 606 | 607 | |
| 607 | 608 | out: |
| 608 | − hv_event_tasklet_enable(channel); | |
| 609 | − | |
| 610 | 609 | return ret; |
| 611 | 610 | } |
| 612 | 611 | |
| @@ -350,7 +350,8 @@ static struct vmbus_channel *alloc_channel(void) · 349 unmodified lines | ||
| 350 | 350 | static void free_channel(struct vmbus_channel *channel) |
| 351 | 351 | { |
| 352 | 352 | tasklet_kill(&channel->callback_event); |
| 353 | − kfree(channel); | |
| 353 | + | |
| 354 | + kfree_rcu(channel, rcu); | |
| 354 | 355 | } |
| 355 | 356 | |
| 356 | 357 | static void percpu_channel_enq(void *arg) |
| @@ -359,14 +360,14 @@ static void percpu_channel_enq(void *arg) · 2 unmodified lines | ||
| 359 | 360 | struct hv_per_cpu_context *hv_cpu |
| 360 | 361 | = this_cpu_ptr(hv_context.cpu_context); |
| 361 | 362 | |
| 362 | − list_add_tail(&channel->percpu_list, &hv_cpu->chan_list); | |
| 363 | + list_add_tail_rcu(&channel->percpu_list, &hv_cpu->chan_list); | |
| 363 | 364 | } |
| 364 | 365 | |
| 365 | 366 | static void percpu_channel_deq(void *arg) |
| 366 | 367 | { |
| 367 | 368 | struct vmbus_channel *channel = arg; |
| 368 | 369 | |
| 369 | − list_del(&channel->percpu_list); | |
| 370 | + list_del_rcu(&channel->percpu_list); | |
| 370 | 371 | } |
| 371 | 372 | |
| 372 | 373 | |
| @@ -381,19 +382,6 @@ static void vmbus_release_relid(u32 relid) · 8 unmodified lines | ||
| 381 | 382 | true); |
| 382 | 383 | } |
| 383 | 384 | |
| 384 | −void hv_event_tasklet_disable(struct vmbus_channel *channel) | |
| 385 | −{ | |
| 386 | − tasklet_disable(&channel->callback_event); | |
| 387 | −} | |
| 388 | − | |
| 389 | −void hv_event_tasklet_enable(struct vmbus_channel *channel) | |
| 390 | −{ | |
| 391 | − tasklet_enable(&channel->callback_event); | |
| 392 | − | |
| 393 | − /* In case there is any pending event */ | |
| 394 | − tasklet_schedule(&channel->callback_event); | |
| 395 | −} | |
| 396 | − | |
| 397 | 385 | void hv_process_channel_removal(struct vmbus_channel *channel, u32 relid) |
| 398 | 386 | { |
| 399 | 387 | unsigned long flags; |
| @@ -402,7 +390,6 @@ void hv_process_channel_removal(struct vmbus_channel *channel, u32 relid) · 2 unmodified lines | ||
| 402 | 390 | BUG_ON(!channel->rescind); |
| 403 | 391 | BUG_ON(!mutex_is_locked(&vmbus_connection.channel_mutex)); |
| 404 | 392 | |
| 405 | − hv_event_tasklet_disable(channel); | |
| 406 | 393 | if (channel->target_cpu != get_cpu()) { |
| 407 | 394 | put_cpu(); |
| 408 | 395 | smp_call_function_single(channel->target_cpu, |
| @@ -411,7 +398,6 @@ void hv_process_channel_removal(struct vmbus_channel *channel, u32 relid) · 2 unmodified lines | ||
| 411 | 398 | percpu_channel_deq(channel); |
| 412 | 399 | put_cpu(); |
| 413 | 400 | } |
| 414 | − hv_event_tasklet_enable(channel); | |
| 415 | 401 | |
| 416 | 402 | if (channel->primary_channel == NULL) { |
| 417 | 403 | list_del(&channel->listentry); |
| @@ -505,7 +491,6 @@ static void vmbus_process_offer(struct vmbus_channel *newchannel) · 87 unmodified lines | ||
| 505 | 491 | |
| 506 | 492 | init_vp_index(newchannel, dev_type); |
| 507 | 493 | |
| 508 | − hv_event_tasklet_disable(newchannel); | |
| 509 | 494 | if (newchannel->target_cpu != get_cpu()) { |
| 510 | 495 | put_cpu(); |
| 511 | 496 | smp_call_function_single(newchannel->target_cpu, |
| @@ -515,7 +500,6 @@ static void vmbus_process_offer(struct vmbus_channel *newchannel) · 3 unmodified lines | ||
| 515 | 500 | percpu_channel_enq(newchannel); |
| 516 | 501 | put_cpu(); |
| 517 | 502 | } |
| 518 | − hv_event_tasklet_enable(newchannel); | |
| 519 | 503 | |
| 520 | 504 | /* |
| 521 | 505 | * This state is used to indicate a successful open |
| @@ -565,7 +549,6 @@ err_deq_chan: · 43 unmodified lines | ||
| 565 | 549 | list_del(&newchannel->listentry); |
| 566 | 550 | mutex_unlock(&vmbus_connection.channel_mutex); |
| 567 | 551 | |
| 568 | − hv_event_tasklet_disable(newchannel); | |
| 569 | 552 | if (newchannel->target_cpu != get_cpu()) { |
| 570 | 553 | put_cpu(); |
| 571 | 554 | smp_call_function_single(newchannel->target_cpu, |
| @@ -574,7 +557,6 @@ err_deq_chan: · 2 unmodified lines | ||
| 574 | 557 | percpu_channel_deq(newchannel); |
| 575 | 558 | put_cpu(); |
| 576 | 559 | } |
| 577 | − hv_event_tasklet_enable(newchannel); | |
| 578 | 560 | |
| 579 | 561 | vmbus_release_relid(newchannel->offermsg.child_relid); |
| 580 | 562 | |
| @@ -814,6 +796,7 @@ static void vmbus_onoffer(struct vmbus_channel_message_header *hdr) · 233 unmodified lines | ||
| 814 | 796 | /* Allocate the channel object and save this offer. */ |
| 815 | 797 | newchannel = alloc_channel(); |
| 816 | 798 | if (!newchannel) { |
| 799 | + vmbus_release_relid(offer->child_relid); | |
| 817 | 800 | pr_err("Unable to allocate channel object\n"); |
| 818 | 801 | return; |
| 819 | 802 | } |
| @@ -71,7 +71,6 @@ static DECLARE_WORK(fcopy_send_work, fcopy_send_data); · 70 unmodified lines | ||
| 71 | 71 | static const char fcopy_devname[] = "vmbus/hv_fcopy"; |
| 72 | 72 | static u8 *recv_buffer; |
| 73 | 73 | static struct hvutil_transport *hvt; |
| 74 | −static struct completion release_event; | |
| 75 | 74 | /* |
| 76 | 75 | * This state maintains the version number registered by the daemon. |
| 77 | 76 | */ |
| @@ -329,7 +328,6 @@ static void fcopy_on_reset(void) · 251 unmodified lines | ||
| 329 | 328 | |
| 330 | 329 | if (cancel_delayed_work_sync(&fcopy_timeout_work)) |
| 331 | 330 | fcopy_respond_to_host(HV_E_FAIL); |
| 332 | − complete(&release_event); | |
| 333 | 331 | } |
| 334 | 332 | |
| 335 | 333 | int hv_fcopy_init(struct hv_util_service *srv) |
| @@ -337,7 +335,6 @@ int hv_fcopy_init(struct hv_util_service *srv) · 1 unmodified line | ||
| 337 | 335 | recv_buffer = srv->recv_buffer; |
| 338 | 336 | fcopy_transaction.recv_channel = srv->channel; |
| 339 | 337 | |
| 340 | − init_completion(&release_event); | |
| 341 | 338 | /* |
| 342 | 339 | * When this driver loads, the user level daemon that |
| 343 | 340 | * processes the host requests may not yet be running. |
| @@ -359,5 +356,4 @@ void hv_fcopy_deinit(void) · 15 unmodified lines | ||
| 359 | 356 | fcopy_transaction.state = HVUTIL_DEVICE_DYING; |
| 360 | 357 | cancel_delayed_work_sync(&fcopy_timeout_work); |
| 361 | 358 | hvutil_transport_destroy(hvt); |
| 362 | − wait_for_completion(&release_event); | |
| 363 | 359 | } |
| @@ -101,7 +101,6 @@ static DECLARE_WORK(kvp_sendkey_work, kvp_send_key); · 100 unmodified lines | ||
| 101 | 101 | static const char kvp_devname[] = "vmbus/hv_kvp"; |
| 102 | 102 | static u8 *recv_buffer; |
| 103 | 103 | static struct hvutil_transport *hvt; |
| 104 | −static struct completion release_event; | |
| 105 | 104 | /* |
| 106 | 105 | * Register the kernel component with the user-level daemon. |
| 107 | 106 | * As part of this registration, pass the LIC version number. |
| @@ -712,7 +711,6 @@ static void kvp_on_reset(void) · 604 unmodified lines | ||
| 712 | 711 | if (cancel_delayed_work_sync(&kvp_timeout_work)) |
| 713 | 712 | kvp_respond_to_host(NULL, HV_E_FAIL); |
| 714 | 713 | kvp_transaction.state = HVUTIL_DEVICE_INIT; |
| 715 | − complete(&release_event); | |
| 716 | 714 | } |
| 717 | 715 | |
| 718 | 716 | int |
| @@ -721,7 +719,6 @@ hv_kvp_init(struct hv_util_service *srv) · 2 unmodified lines | ||
| 721 | 719 | recv_buffer = srv->recv_buffer; |
| 722 | 720 | kvp_transaction.recv_channel = srv->channel; |
| 723 | 721 | |
| 724 | − init_completion(&release_event); | |
| 725 | 722 | /* |
| 726 | 723 | * When this driver loads, the user level daemon that |
| 727 | 724 | * processes the host requests may not yet be running. |
| @@ -745,5 +742,4 @@ void hv_kvp_deinit(void) · 17 unmodified lines | ||
| 745 | 742 | cancel_delayed_work_sync(&kvp_timeout_work); |
| 746 | 743 | cancel_work_sync(&kvp_sendkey_work); |
| 747 | 744 | hvutil_transport_destroy(hvt); |
| 748 | − wait_for_completion(&release_event); | |
| 749 | 745 | } |
| @@ -79,7 +79,6 @@ static int dm_reg_value; · 78 unmodified lines | ||
| 79 | 79 | static const char vss_devname[] = "vmbus/hv_vss"; |
| 80 | 80 | static __u8 *recv_buffer; |
| 81 | 81 | static struct hvutil_transport *hvt; |
| 82 | −static struct completion release_event; | |
| 83 | 82 | |
| 84 | 83 | static void vss_timeout_func(struct work_struct *dummy); |
| 85 | 84 | static void vss_handle_request(struct work_struct *dummy); |
| @@ -359,13 +358,11 @@ static void vss_on_reset(void) · 273 unmodified lines | ||
| 359 | 358 | if (cancel_delayed_work_sync(&vss_timeout_work)) |
| 360 | 359 | vss_respond_to_host(HV_E_FAIL); |
| 361 | 360 | vss_transaction.state = HVUTIL_DEVICE_INIT; |
| 362 | − complete(&release_event); | |
| 363 | 361 | } |
| 364 | 362 | |
| 365 | 363 | int |
| 366 | 364 | hv_vss_init(struct hv_util_service *srv) |
| 367 | 365 | { |
| 368 | − init_completion(&release_event); | |
| 369 | 366 | if (vmbus_proto_version < VERSION_WIN8_1) { |
| 370 | 367 | pr_warn("Integration service 'Backup (volume snapshot)'" |
| 371 | 368 | " not supported on this host version.\n"); |
| @@ -398,5 +395,4 @@ void hv_vss_deinit(void) · 26 unmodified lines | ||
| 398 | 395 | cancel_delayed_work_sync(&vss_timeout_work); |
| 399 | 396 | cancel_work_sync(&vss_handle_request_work); |
| 400 | 397 | hvutil_transport_destroy(hvt); |
| 401 | − wait_for_completion(&release_event); | |
| 402 | 398 | } |
| @@ -590,6 +590,8 @@ static int hv_timesync_init(struct hv_util_service *srv) · 589 unmodified lines | ||
| 590 | 590 | if (!hyperv_cs) |
| 591 | 591 | return -ENODEV; |
| 592 | 592 | |
| 593 | + spin_lock_init(&host_ts.lock); | |
| 594 | + | |
| 593 | 595 | INIT_WORK(&wrk.work, hv_set_host_time); |
| 594 | 596 | |
| 595 | 597 | /* |
| @@ -182,10 +182,11 @@ static int hvt_op_release(struct inode *inode, struct file *file) · 181 unmodified lines | ||
| 182 | 182 | * connects back. |
| 183 | 183 | */ |
| 184 | 184 | hvt_reset(hvt); |
| 185 | − mutex_unlock(&hvt->lock); | |
| 186 | 185 | |
| 187 | 186 | if (mode_old == HVUTIL_TRANSPORT_DESTROY) |
| 188 | − hvt_transport_free(hvt); | |
| 187 | + complete(&hvt->release); | |
| 188 | + | |
| 189 | + mutex_unlock(&hvt->lock); | |
| 189 | 190 | |
| 190 | 191 | return 0; |
| 191 | 192 | } |
| @@ -304,6 +305,7 @@ struct hvutil_transport *hvutil_transport_init(const char *name, · 112 unmodified lines | ||
| 304 | 305 | |
| 305 | 306 | init_waitqueue_head(&hvt->outmsg_q); |
| 306 | 307 | mutex_init(&hvt->lock); |
| 308 | + init_completion(&hvt->release); | |
| 307 | 309 | |
| 308 | 310 | spin_lock(&hvt_list_lock); |
| 309 | 311 | list_add(&hvt->list, &hvt_list); |
| @@ -351,6 +353,8 @@ void hvutil_transport_destroy(struct hvutil_transport *hvt) · 41 unmodified lines | ||
| 351 | 353 | if (hvt->cn_id.idx > 0 && hvt->cn_id.val > 0) |
| 352 | 354 | cn_del_callback(&hvt->cn_id); |
| 353 | 355 | |
| 354 | − if (mode_old != HVUTIL_TRANSPORT_CHARDEV) | |
| 355 | − hvt_transport_free(hvt); | |
| 356 | + if (mode_old == HVUTIL_TRANSPORT_CHARDEV) | |
| 357 | + wait_for_completion(&hvt->release); | |
| 358 | + | |
| 359 | + hvt_transport_free(hvt); | |
| 356 | 360 | } |
| @@ -41,6 +41,7 @@ struct hvutil_transport { · 40 unmodified lines | ||
| 41 | 41 | int outmsg_len; /* its length */ |
| 42 | 42 | wait_queue_head_t outmsg_q; /* poll/read wait queue */ |
| 43 | 43 | struct mutex lock; /* protects struct members */ |
| 44 | + struct completion release; /* synchronize with fd release */ | |
| 44 | 45 | }; |
| 45 | 46 | |
| 46 | 47 | struct hvutil_transport *hvutil_transport_init(const char *name, |
| @@ -937,8 +937,10 @@ static void vmbus_chan_sched(struct hv_per_cpu_context *hv_cpu) · 936 unmodified lines | ||
| 937 | 937 | if (relid == 0) |
| 938 | 938 | continue; |
| 939 | 939 | |
| 940 | + rcu_read_lock(); | |
| 941 | + | |
| 940 | 942 | /* Find channel based on relid */ |
| 941 | − list_for_each_entry(channel, &hv_cpu->chan_list, percpu_list) { | |
| 943 | + list_for_each_entry_rcu(channel, &hv_cpu->chan_list, percpu_list) { | |
| 942 | 944 | if (channel->offermsg.child_relid != relid) |
| 943 | 945 | continue; |
| 944 | 946 | |
| @@ -954,6 +956,8 @@ static void vmbus_chan_sched(struct hv_per_cpu_context *hv_cpu) · 9 unmodified lines | ||
| 954 | 956 | tasklet_schedule(&channel->callback_event); |
| 955 | 957 | } |
| 956 | 958 | } |
| 959 | + | |
| 960 | + rcu_read_unlock(); | |
| 957 | 961 | } |
| 958 | 962 | } |
| 959 | 963 | |
| @@ -646,6 +646,9 @@ static int atk_read_value(struct atk_sensor_data *sensor, u64 *value) · 645 unmodified lines | ||
| 646 | 646 | else |
| 647 | 647 | err = atk_read_value_new(sensor, value); |
| 648 | 648 | |
| 649 | + if (err) | |
| 650 | + return err; | |
| 651 | + | |
| 649 | 652 | sensor->is_valid = true; |
| 650 | 653 | sensor->last_updated = jiffies; |
| 651 | 654 | sensor->cached_value = *value; |
| @@ -3198,7 +3198,7 @@ static int __init sm_it87_init(void) · 3197 unmodified lines | ||
| 3198 | 3198 | { |
| 3199 | 3199 | int sioaddr[2] = { REG_2E, REG_4E }; |
| 3200 | 3200 | struct it87_sio_data sio_data; |
| 3201 | − unsigned short isa_address; | |
| 3201 | + unsigned short isa_address[2]; | |
| 3202 | 3202 | bool found = false; |
| 3203 | 3203 | int i, err; |
| 3204 | 3204 | |
| @@ -3208,15 +3208,29 @@ static int __init sm_it87_init(void) · 3 unmodified lines | ||
| 3208 | 3208 | |
| 3209 | 3209 | for (i = 0; i < ARRAY_SIZE(sioaddr); i++) { |
| 3210 | 3210 | memset(&sio_data, 0, sizeof(struct it87_sio_data)); |
| 3211 | − isa_address = 0; | |
| 3212 | − err = it87_find(sioaddr[i], &isa_address, &sio_data); | |
| 3213 | − if (err || isa_address == 0) | |
| 3211 | + isa_address[i] = 0; | |
| 3212 | + err = it87_find(sioaddr[i], &isa_address[i], &sio_data); | |
| 3213 | + if (err || isa_address[i] == 0) | |
| 3214 | 3214 | continue; |
| 3215 | + /* | |
| 3216 | + * Don't register second chip if its ISA address matches | |
| 3217 | + * the first chip's ISA address. | |
| 3218 | + */ | |
| 3219 | + if (i && isa_address[i] == isa_address[0]) | |
| 3220 | + break; | |
| 3215 | 3221 | |
| 3216 | − err = it87_device_add(i, isa_address, &sio_data); | |
| 3222 | + err = it87_device_add(i, isa_address[i], &sio_data); | |
| 3217 | 3223 | if (err) |
| 3218 | 3224 | goto exit_dev_unregister; |
| 3225 | + | |
| 3219 | 3226 | found = true; |
| 3227 | + | |
| 3228 | + /* | |
| 3229 | + * IT8705F may respond on both SIO addresses. | |
| 3230 | + * Stop probing after finding one. | |
| 3231 | + */ | |
| 3232 | + if (sio_data.type == it87) | |
| 3233 | + break; | |
| 3220 | 3234 | } |
| 3221 | 3235 | |
| 3222 | 3236 | if (!found) { |
| @@ -311,7 +311,7 @@ static int max31790_write_pwm(struct device *dev, u32 attr, int channel, · 310 unmodified lines | ||
| 311 | 311 | data->pwm[channel] = val << 8; |
| 312 | 312 | err = i2c_smbus_write_word_swapped(client, |
| 313 | 313 | MAX31790_REG_PWMOUT(channel), |
| 314 | − val); | |
| 314 | + data->pwm[channel]); | |
| 315 | 315 | break; |
| 316 | 316 | case hwmon_pwm_enable: |
| 317 | 317 | fan_config = data->fan_config[channel]; |
| @@ -221,8 +221,10 @@ static int intel_th_output_activate(struct intel_th_device *thdev) · 220 unmodified lines | ||
| 221 | 221 | else |
| 222 | 222 | intel_th_trace_enable(thdev); |
| 223 | 223 | |
| 224 | − if (ret) | |
| 224 | + if (ret) { | |
| 225 | 225 | pm_runtime_put(&thdev->dev); |
| 226 | + module_put(thdrv->driver.owner); | |
| 227 | + } | |
| 226 | 228 | |
| 227 | 229 | return ret; |
| 228 | 230 | } |
| @@ -85,6 +85,16 @@ static const struct pci_device_id intel_th_pci_id_table[] = { · 84 unmodified lines | ||
| 85 | 85 | PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0xa2a6), |
| 86 | 86 | .driver_data = (kernel_ulong_t)0, |
| 87 | 87 | }, |
| 88 | + { | |
| 89 | + /* Denverton */ | |
| 90 | + PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x19e1), | |
| 91 | + .driver_data = (kernel_ulong_t)0, | |
| 92 | + }, | |
| 93 | + { | |
| 94 | + /* Gemini Lake */ | |
| 95 | + PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x318e), | |
| 96 | + .driver_data = (kernel_ulong_t)0, | |
| 97 | + }, | |
| 88 | 98 | { 0 }, |
| 89 | 99 | }; |
| 90 | 100 | |
| @@ -169,7 +169,9 @@ static irqreturn_t tiadc_irq_h(int irq, void *private) · 168 unmodified lines | ||
| 169 | 169 | { |
| 170 | 170 | struct iio_dev *indio_dev = private; |
| 171 | 171 | struct tiadc_device *adc_dev = iio_priv(indio_dev); |
| 172 | − unsigned int status, config; | |
| 172 | + unsigned int status, config, adc_fsm; | |
| 173 | + unsigned short count = 0; | |
| 174 | + | |
| 173 | 175 | status = tiadc_readl(adc_dev, REG_IRQSTATUS); |
| 174 | 176 | |
| 175 | 177 | /* |
| @@ -183,6 +185,15 @@ static irqreturn_t tiadc_irq_h(int irq, void *private) · 7 unmodified lines | ||
| 183 | 185 | tiadc_writel(adc_dev, REG_CTRL, config); |
| 184 | 186 | tiadc_writel(adc_dev, REG_IRQSTATUS, IRQENB_FIFO1OVRRUN |
| 185 | 187 | | IRQENB_FIFO1UNDRFLW | IRQENB_FIFO1THRES); |
| 188 | + | |
| 189 | + /* wait for idle state. | |
| 190 | + * ADC needs to finish the current conversion | |
| 191 | + * before disabling the module | |
| 192 | + */ | |
| 193 | + do { | |
| 194 | + adc_fsm = tiadc_readl(adc_dev, REG_ADCFSM); | |
| 195 | + } while (adc_fsm != 0x10 && count++ < 100); | |
| 196 | + | |
| 186 | 197 | tiadc_writel(adc_dev, REG_CTRL, (config | CNTRLREG_TSCSSENB)); |
| 187 | 198 | return IRQ_HANDLED; |
| 188 | 199 | } else if (status & IRQENB_FIFO1THRES) { |
| @@ -51,8 +51,6 @@ static int _hid_sensor_power_state(struct hid_sensor_common *st, bool state) · 50 unmodified lines | ||
| 51 | 51 | st->report_state.report_id, |
| 52 | 52 | st->report_state.index, |
| 53 | 53 | HID_USAGE_SENSOR_PROP_REPORTING_STATE_ALL_EVENTS_ENUM); |
| 54 | − | |
| 55 | − poll_value = hid_sensor_read_poll_value(st); | |
| 56 | 54 | } else { |
| 57 | 55 | int val; |
| 58 | 56 | |
| @@ -89,7 +87,9 @@ static int _hid_sensor_power_state(struct hid_sensor_common *st, bool state) · 30 unmodified lines | ||
| 89 | 87 | sensor_hub_get_feature(st->hsdev, st->power_state.report_id, |
| 90 | 88 | st->power_state.index, |
| 91 | 89 | sizeof(state_val), &state_val); |
| 92 | − if (state && poll_value) | |
| 90 | + if (state) | |
| 91 | + poll_value = hid_sensor_read_poll_value(st); | |
| 92 | + if (poll_value > 0) | |
| 93 | 93 | msleep_interruptible(poll_value * 2); |
| 94 | 94 | |
| 95 | 95 | return 0; |
| @@ -193,8 +193,8 @@ int st_lsm6dsx_update_watermark(struct st_lsm6dsx_sensor *sensor, u16 watermark) · 192 unmodified lines | ||
| 193 | 193 | if (err < 0) |
| 194 | 194 | goto out; |
| 195 | 195 | |
| 196 | − fifo_watermark = ((data & ~ST_LSM6DSX_FIFO_TH_MASK) << 8) | | |
| 197 | − (fifo_watermark & ST_LSM6DSX_FIFO_TH_MASK); | |
| 196 | + fifo_watermark = ((data << 8) & ~ST_LSM6DSX_FIFO_TH_MASK) | | |
| 197 | + (fifo_watermark & ST_LSM6DSX_FIFO_TH_MASK); | |
| 198 | 198 | |
| 199 | 199 | wdata = cpu_to_le16(fifo_watermark); |
| 200 | 200 | err = hw->tf->write(hw->dev, ST_LSM6DSX_REG_FIFO_THL_ADDR, |
| @@ -763,7 +763,7 @@ power_off: · 762 unmodified lines | ||
| 763 | 763 | return ret; |
| 764 | 764 | } |
| 765 | 765 | |
| 766 | −static int __exit ak8974_remove(struct i2c_client *i2c) | |
| 766 | +static int ak8974_remove(struct i2c_client *i2c) | |
| 767 | 767 | { |
| 768 | 768 | struct iio_dev *indio_dev = i2c_get_clientdata(i2c); |
| 769 | 769 | struct ak8974 *ak8974 = iio_priv(indio_dev); |
| @@ -845,7 +845,7 @@ static struct i2c_driver ak8974_driver = { · 75 unmodified lines | ||
| 845 | 845 | .of_match_table = of_match_ptr(ak8974_of_match), |
| 846 | 846 | }, |
| 847 | 847 | .probe = ak8974_probe, |
| 848 | − .remove = __exit_p(ak8974_remove), | |
| 848 | + .remove = ak8974_remove, | |
| 849 | 849 | .id_table = ak8974_id, |
| 850 | 850 | }; |
| 851 | 851 | module_i2c_driver(ak8974_driver); |
| @@ -29,7 +29,13 @@ static int __ib_process_cq(struct ib_cq *cq, int budget) · 28 unmodified lines | ||
| 29 | 29 | { |
| 30 | 30 | int i, n, completed = 0; |
| 31 | 31 | |
| 32 | − while ((n = ib_poll_cq(cq, IB_POLL_BATCH, cq->wc)) > 0) { | |
| 32 | + /* | |
| 33 | + * budget might be (-1) if the caller does not | |
| 34 | + * want to bound this call, thus we need unsigned | |
| 35 | + * minimum here. | |
| 36 | + */ | |
| 37 | + while ((n = ib_poll_cq(cq, min_t(u32, IB_POLL_BATCH, | |
| 38 | + budget - completed), cq->wc)) > 0) { | |
| 33 | 39 | for (i = 0; i < n; i++) { |
| 34 | 40 | struct ib_wc *wc = &cq->wc[i]; |
| 35 | 41 | |
| @@ -196,7 +202,7 @@ void ib_free_cq(struct ib_cq *cq) · 160 unmodified lines | ||
| 196 | 202 | irq_poll_disable(&cq->iop); |
| 197 | 203 | break; |
| 198 | 204 | case IB_POLL_WORKQUEUE: |
| 199 | − flush_work(&cq->work); | |
| 205 | + cancel_work_sync(&cq->work); | |
| 200 | 206 | break; |
| 201 | 207 | default: |
| 202 | 208 | WARN_ON_ONCE(1); |
| @@ -336,12 +336,26 @@ int ib_register_device(struct ib_device *device, · 335 unmodified lines | ||
| 336 | 336 | struct device *parent = device->dev.parent; |
| 337 | 337 | |
| 338 | 338 | WARN_ON_ONCE(!parent); |
| 339 | − if (!device->dev.dma_ops) | |
| 340 | − device->dev.dma_ops = parent->dma_ops; | |
| 341 | − if (!device->dev.dma_mask) | |
| 342 | − device->dev.dma_mask = parent->dma_mask; | |
| 343 | − if (!device->dev.coherent_dma_mask) | |
| 344 | − device->dev.coherent_dma_mask = parent->coherent_dma_mask; | |
| 339 | + WARN_ON_ONCE(device->dma_device); | |
| 340 | + if (device->dev.dma_ops) { | |
| 341 | + /* | |
| 342 | + * The caller provided custom DMA operations. Copy the | |
| 343 | + * DMA-related fields that are used by e.g. dma_alloc_coherent() | |
| 344 | + * into device->dev. | |
| 345 | + */ | |
| 346 | + device->dma_device = &device->dev; | |
| 347 | + if (!device->dev.dma_mask) | |
| 348 | + device->dev.dma_mask = parent->dma_mask; | |
| 349 | + if (!device->dev.coherent_dma_mask) | |
| 350 | + device->dev.coherent_dma_mask = | |
| 351 | + parent->coherent_dma_mask; | |
| 352 | + } else { | |
| 353 | + /* | |
| 354 | + * The caller did not provide custom DMA operations. Use the | |
| 355 | + * DMA mapping operations of the parent device. | |
| 356 | + */ | |
| 357 | + device->dma_device = parent; | |
| 358 | + } | |
| 345 | 359 | |
| 346 | 360 | mutex_lock(&device_mutex); |
| 347 | 361 | |
| @@ -1015,8 +1029,7 @@ static int __init ib_core_init(void) · 667 unmodified lines | ||
| 1015 | 1029 | return -ENOMEM; |
| 1016 | 1030 | |
| 1017 | 1031 | ib_comp_wq = alloc_workqueue("ib-comp-wq", |
| 1018 | − WQ_UNBOUND | WQ_HIGHPRI | WQ_MEM_RECLAIM, | |
| 1019 | − WQ_UNBOUND_MAX_ACTIVE); | |
| 1032 | + WQ_HIGHPRI | WQ_MEM_RECLAIM | WQ_SYSFS, 0); | |
| 1020 | 1033 | if (!ib_comp_wq) { |
| 1021 | 1034 | ret = -ENOMEM; |
| 1022 | 1035 | goto err; |
| @@ -160,6 +160,9 @@ int i40iw_inetaddr_event(struct notifier_block *notifier, · 159 unmodified lines | ||
| 160 | 160 | return NOTIFY_DONE; |
| 161 | 161 | |
| 162 | 162 | iwdev = &hdl->device; |
| 163 | + if (iwdev->init_state < INET_NOTIFIER) | |
| 164 | + return NOTIFY_DONE; | |
| 165 | + | |
| 163 | 166 | netdev = iwdev->ldev->netdev; |
| 164 | 167 | upper_dev = netdev_master_upper_dev_get(netdev); |
| 165 | 168 | if (netdev != event_netdev) |
| @@ -214,6 +217,9 @@ int i40iw_inet6addr_event(struct notifier_block *notifier, · 48 unmodified lines | ||
| 214 | 217 | return NOTIFY_DONE; |
| 215 | 218 | |
| 216 | 219 | iwdev = &hdl->device; |
| 220 | + if (iwdev->init_state < INET_NOTIFIER) | |
| 221 | + return NOTIFY_DONE; | |
| 222 | + | |
| 217 | 223 | netdev = iwdev->ldev->netdev; |
| 218 | 224 | if (netdev != event_netdev) |
| 219 | 225 | return NOTIFY_DONE; |
| @@ -260,6 +266,8 @@ int i40iw_net_event(struct notifier_block *notifier, unsigned long event, void * · 40 unmodified lines | ||
| 260 | 266 | if (!iwhdl) |
| 261 | 267 | return NOTIFY_DONE; |
| 262 | 268 | iwdev = &iwhdl->device; |
| 269 | + if (iwdev->init_state < INET_NOTIFIER) | |
| 270 | + return NOTIFY_DONE; | |
| 263 | 271 | p = (__be32 *)neigh->primary_key; |
| 264 | 272 | i40iw_copy_ip_ntohl(local_ipaddr, p); |
| 265 | 273 | if (neigh->nud_state & NUD_VALID) { |
| @@ -372,7 +372,7 @@ static int _ocrdma_pd_mgr_put_bitmap(struct ocrdma_dev *dev, u16 pd_id, · 371 unmodified lines | ||
| 372 | 372 | return 0; |
| 373 | 373 | } |
| 374 | 374 | |
| 375 | −static u8 ocrdma_put_pd_num(struct ocrdma_dev *dev, u16 pd_id, | |
| 375 | +static int ocrdma_put_pd_num(struct ocrdma_dev *dev, u16 pd_id, | |
| 376 | 376 | bool dpp_pool) |
| 377 | 377 | { |
| 378 | 378 | int status; |
| @@ -7068,7 +7068,7 @@ static void qib_7322_txchk_change(struct qib_devdata *dd, u32 start, · 7067 unmodified lines | ||
| 7068 | 7068 | unsigned long flags; |
| 7069 | 7069 | |
| 7070 | 7070 | while (wait) { |
| 7071 | − unsigned long shadow; | |
| 7071 | + unsigned long shadow = 0; | |
| 7072 | 7072 | int cstart, previ = -1; |
| 7073 | 7073 | |
| 7074 | 7074 | /* |
| @@ -69,6 +69,9 @@ · 68 unmodified lines | ||
| 69 | 69 | */ |
| 70 | 70 | #define PCI_DEVICE_ID_VMWARE_PVRDMA 0x0820 |
| 71 | 71 | |
| 72 | +#define PVRDMA_NUM_RING_PAGES 4 | |
| 73 | +#define PVRDMA_QP_NUM_HEADER_PAGES 1 | |
| 74 | + | |
| 72 | 75 | struct pvrdma_dev; |
| 73 | 76 | |
| 74 | 77 | struct pvrdma_page_dir { |
| @@ -132,7 +132,7 @@ enum pvrdma_pci_resource { · 131 unmodified lines | ||
| 132 | 132 | |
| 133 | 133 | enum pvrdma_device_ctl { |
| 134 | 134 | PVRDMA_DEVICE_CTL_ACTIVATE, /* Activate device. */ |
| 135 | − PVRDMA_DEVICE_CTL_QUIESCE, /* Quiesce device. */ | |
| 135 | + PVRDMA_DEVICE_CTL_UNQUIESCE, /* Unquiesce device. */ | |
| 136 | 136 | PVRDMA_DEVICE_CTL_RESET, /* Reset device. */ |
| 137 | 137 | }; |
| 138 | 138 | |
| @@ -56,7 +56,7 @@ · 55 unmodified lines | ||
| 56 | 56 | #include "pvrdma.h" |
| 57 | 57 | |
| 58 | 58 | #define DRV_NAME "vmw_pvrdma" |
| 59 | −#define DRV_VERSION "1.0.0.0-k" | |
| 59 | +#define DRV_VERSION "1.0.1.0-k" | |
| 60 | 60 | |
| 61 | 61 | static DEFINE_MUTEX(pvrdma_device_list_lock); |
| 62 | 62 | static LIST_HEAD(pvrdma_device_list); |
| @@ -660,7 +660,16 @@ static void pvrdma_netdevice_event_handle(struct pvrdma_dev *dev, · 597 unmodified lines | ||
| 660 | 660 | pvrdma_dispatch_event(dev, 1, IB_EVENT_PORT_ERR); |
| 661 | 661 | break; |
| 662 | 662 | case NETDEV_UP: |
| 663 | − pvrdma_dispatch_event(dev, 1, IB_EVENT_PORT_ACTIVE); | |
| 663 | + pvrdma_write_reg(dev, PVRDMA_REG_CTL, | |
| 664 | + PVRDMA_DEVICE_CTL_UNQUIESCE); | |
| 665 | + | |
| 666 | + mb(); | |
| 667 | + | |
| 668 | + if (pvrdma_read_reg(dev, PVRDMA_REG_ERR)) | |
| 669 | + dev_err(&dev->pdev->dev, | |
| 670 | + "failed to activate device during link up\n"); | |
| 671 | + else | |
| 672 | + pvrdma_dispatch_event(dev, 1, IB_EVENT_PORT_ACTIVE); | |
| 664 | 673 | break; |
| 665 | 674 | default: |
| 666 | 675 | dev_dbg(&dev->pdev->dev, "ignore netdevice event %ld on %s\n", |
| @@ -858,7 +867,7 @@ static int pvrdma_pci_probe(struct pci_dev *pdev, · 191 unmodified lines | ||
| 858 | 867 | dev->dsr->resp_slot_dma = (u64)slot_dma; |
| 859 | 868 | |
| 860 | 869 | /* Async event ring */ |
| 861 | − dev->dsr->async_ring_pages.num_pages = 4; | |
| 870 | + dev->dsr->async_ring_pages.num_pages = PVRDMA_NUM_RING_PAGES; | |
| 862 | 871 | ret = pvrdma_page_dir_init(dev, &dev->async_pdir, |
| 863 | 872 | dev->dsr->async_ring_pages.num_pages, true); |
| 864 | 873 | if (ret) |
| @@ -867,7 +876,7 @@ static int pvrdma_pci_probe(struct pci_dev *pdev, · 2 unmodified lines | ||
| 867 | 876 | dev->dsr->async_ring_pages.pdir_dma = dev->async_pdir.dir_dma; |
| 868 | 877 | |
| 869 | 878 | /* CQ notification ring */ |
| 870 | − dev->dsr->cq_ring_pages.num_pages = 4; | |
| 879 | + dev->dsr->cq_ring_pages.num_pages = PVRDMA_NUM_RING_PAGES; | |
| 871 | 880 | ret = pvrdma_page_dir_init(dev, &dev->cq_pdir, |
| 872 | 881 | dev->dsr->cq_ring_pages.num_pages, true); |
| 873 | 882 | if (ret) |
| @@ -170,8 +170,9 @@ static int pvrdma_set_sq_size(struct pvrdma_dev *dev, struct ib_qp_cap *req_cap, · 169 unmodified lines | ||
| 170 | 170 | sizeof(struct pvrdma_sge) * |
| 171 | 171 | qp->sq.max_sg); |
| 172 | 172 | /* Note: one extra page for the header. */ |
| 173 | − qp->npages_send = 1 + (qp->sq.wqe_cnt * qp->sq.wqe_size + | |
| 174 | − PAGE_SIZE - 1) / PAGE_SIZE; | |
| 173 | + qp->npages_send = PVRDMA_QP_NUM_HEADER_PAGES + | |
| 174 | + (qp->sq.wqe_cnt * qp->sq.wqe_size + PAGE_SIZE - 1) / | |
| 175 | + PAGE_SIZE; | |
| 175 | 176 | |
| 176 | 177 | return 0; |
| 177 | 178 | } |
| @@ -288,7 +289,7 @@ struct ib_qp *pvrdma_create_qp(struct ib_pd *pd, · 110 unmodified lines | ||
| 288 | 289 | qp->npages = qp->npages_send + qp->npages_recv; |
| 289 | 290 | |
| 290 | 291 | /* Skip header page. */ |
| 291 | − qp->sq.offset = PAGE_SIZE; | |
| 292 | + qp->sq.offset = PVRDMA_QP_NUM_HEADER_PAGES * PAGE_SIZE; | |
| 292 | 293 | |
| 293 | 294 | /* Recv queue pages are after send pages. */ |
| 294 | 295 | qp->rq.offset = qp->npages_send * PAGE_SIZE; |
| @@ -341,7 +342,7 @@ struct ib_qp *pvrdma_create_qp(struct ib_pd *pd, · 46 unmodified lines | ||
| 341 | 342 | cmd->qp_type = ib_qp_type_to_pvrdma(init_attr->qp_type); |
| 342 | 343 | cmd->access_flags = IB_ACCESS_LOCAL_WRITE; |
| 343 | 344 | cmd->total_chunks = qp->npages; |
| 344 | − cmd->send_chunks = qp->npages_send - 1; | |
| 345 | + cmd->send_chunks = qp->npages_send - PVRDMA_QP_NUM_HEADER_PAGES; | |
| 345 | 346 | cmd->pdir_dma = qp->pdir.dir_dma; |
| 346 | 347 | |
| 347 | 348 | dev_dbg(&dev->pdev->dev, "create queuepair with %d, %d, %d, %d\n", |
| @@ -554,13 +555,13 @@ out: · 206 unmodified lines | ||
| 554 | 555 | return ret; |
| 555 | 556 | } |
| 556 | 557 | |
| 557 | −static inline void *get_sq_wqe(struct pvrdma_qp *qp, int n) | |
| 558 | +static inline void *get_sq_wqe(struct pvrdma_qp *qp, unsigned int n) | |
| 558 | 559 | { |
| 559 | 560 | return pvrdma_page_dir_get_ptr(&qp->pdir, |
| 560 | 561 | qp->sq.offset + n * qp->sq.wqe_size); |
| 561 | 562 | } |
| 562 | 563 | |
| 563 | −static inline void *get_rq_wqe(struct pvrdma_qp *qp, int n) | |
| 564 | +static inline void *get_rq_wqe(struct pvrdma_qp *qp, unsigned int n) | |
| 564 | 565 | { |
| 565 | 566 | return pvrdma_page_dir_get_ptr(&qp->pdir, |
| 566 | 567 | qp->rq.offset + n * qp->rq.wqe_size); |
| @@ -598,9 +599,7 @@ int pvrdma_post_send(struct ib_qp *ibqp, struct ib_send_wr *wr, · 31 unmodified lines | ||
| 598 | 599 | unsigned long flags; |
| 599 | 600 | struct pvrdma_sq_wqe_hdr *wqe_hdr; |
| 600 | 601 | struct pvrdma_sge *sge; |
| 601 | − int i, index; | |
| 602 | − int nreq; | |
| 603 | − int ret; | |
| 602 | + int i, ret; | |
| 604 | 603 | |
| 605 | 604 | /* |
| 606 | 605 | * In states lower than RTS, we can fail immediately. In other states, |
| @@ -613,9 +612,8 @@ int pvrdma_post_send(struct ib_qp *ibqp, struct ib_send_wr *wr, · 6 unmodified lines | ||
| 613 | 612 | |
| 614 | 613 | spin_lock_irqsave(&qp->sq.lock, flags); |
| 615 | 614 | |
| 616 | − index = pvrdma_idx(&qp->sq.ring->prod_tail, qp->sq.wqe_cnt); | |
| 617 | − for (nreq = 0; wr; nreq++, wr = wr->next) { | |
| 618 | − unsigned int tail; | |
| 615 | + while (wr) { | |
| 616 | + unsigned int tail = 0; | |
| 619 | 617 | |
| 620 | 618 | if (unlikely(!pvrdma_idx_ring_has_space( |
| 621 | 619 | qp->sq.ring, qp->sq.wqe_cnt, &tail))) { |
| @@ -680,7 +678,7 @@ int pvrdma_post_send(struct ib_qp *ibqp, struct ib_send_wr *wr, · 58 unmodified lines | ||
| 680 | 678 | } |
| 681 | 679 | } |
| 682 | 680 | |
| 683 | − wqe_hdr = (struct pvrdma_sq_wqe_hdr *)get_sq_wqe(qp, index); | |
| 681 | + wqe_hdr = (struct pvrdma_sq_wqe_hdr *)get_sq_wqe(qp, tail); | |
| 684 | 682 | memset(wqe_hdr, 0, sizeof(*wqe_hdr)); |
| 685 | 683 | wqe_hdr->wr_id = wr->wr_id; |
| 686 | 684 | wqe_hdr->num_sge = wr->num_sge; |
| @@ -771,12 +769,11 @@ int pvrdma_post_send(struct ib_qp *ibqp, struct ib_send_wr *wr, · 84 unmodified lines | ||
| 771 | 769 | /* Make sure wqe is written before index update */ |
| 772 | 770 | smp_wmb(); |
| 773 | 771 | |
| 774 | − index++; | |
| 775 | − if (unlikely(index >= qp->sq.wqe_cnt)) | |
| 776 | − index = 0; | |
| 777 | 772 | /* Update shared sq ring */ |
| 778 | 773 | pvrdma_idx_ring_inc(&qp->sq.ring->prod_tail, |
| 779 | 774 | qp->sq.wqe_cnt); |
| 775 | + | |
| 776 | + wr = wr->next; | |
| 780 | 777 | } |
| 781 | 778 | |
| 782 | 779 | ret = 0; |
| @@ -806,7 +803,6 @@ int pvrdma_post_recv(struct ib_qp *ibqp, struct ib_recv_wr *wr, · 23 unmodified lines | ||
| 806 | 803 | struct pvrdma_qp *qp = to_vqp(ibqp); |
| 807 | 804 | struct pvrdma_rq_wqe_hdr *wqe_hdr; |
| 808 | 805 | struct pvrdma_sge *sge; |
| 809 | − int index, nreq; | |
| 810 | 806 | int ret = 0; |
| 811 | 807 | int i; |
| 812 | 808 | |
| @@ -821,9 +817,8 @@ int pvrdma_post_recv(struct ib_qp *ibqp, struct ib_recv_wr *wr, · 8 unmodified lines | ||
| 821 | 817 | |
| 822 | 818 | spin_lock_irqsave(&qp->rq.lock, flags); |
| 823 | 819 | |
| 824 | − index = pvrdma_idx(&qp->rq.ring->prod_tail, qp->rq.wqe_cnt); | |
| 825 | − for (nreq = 0; wr; nreq++, wr = wr->next) { | |
| 826 | − unsigned int tail; | |
| 820 | + while (wr) { | |
| 821 | + unsigned int tail = 0; | |
| 827 | 822 | |
| 828 | 823 | if (unlikely(wr->num_sge > qp->rq.max_sg || |
| 829 | 824 | wr->num_sge < 0)) { |
| @@ -843,7 +838,7 @@ int pvrdma_post_recv(struct ib_qp *ibqp, struct ib_recv_wr *wr, · 13 unmodified lines | ||
| 843 | 838 | goto out; |
| 844 | 839 | } |
| 845 | 840 | |
| 846 | − wqe_hdr = (struct pvrdma_rq_wqe_hdr *)get_rq_wqe(qp, index); | |
| 841 | + wqe_hdr = (struct pvrdma_rq_wqe_hdr *)get_rq_wqe(qp, tail); | |
| 847 | 842 | wqe_hdr->wr_id = wr->wr_id; |
| 848 | 843 | wqe_hdr->num_sge = wr->num_sge; |
| 849 | 844 | wqe_hdr->total_len = 0; |
| @@ -859,12 +854,11 @@ int pvrdma_post_recv(struct ib_qp *ibqp, struct ib_recv_wr *wr, · 9 unmodified lines | ||
| 859 | 854 | /* Make sure wqe is written before index update */ |
| 860 | 855 | smp_wmb(); |
| 861 | 856 | |
| 862 | − index++; | |
| 863 | − if (unlikely(index >= qp->rq.wqe_cnt)) | |
| 864 | − index = 0; | |
| 865 | 857 | /* Update shared rq ring */ |
| 866 | 858 | pvrdma_idx_ring_inc(&qp->rq.ring->prod_tail, |
| 867 | 859 | qp->rq.wqe_cnt); |
| 860 | + | |
| 861 | + wr = wr->next; | |
| 868 | 862 | } |
| 869 | 863 | |
| 870 | 864 | spin_unlock_irqrestore(&qp->rq.lock, flags); |
| @@ -170,9 +170,9 @@ struct rvt_mmap_info *rvt_create_mmap_info(struct rvt_dev_info *rdi, · 169 unmodified lines | ||
| 170 | 170 | |
| 171 | 171 | spin_lock_irq(&rdi->mmap_offset_lock); |
| 172 | 172 | if (rdi->mmap_offset == 0) |
| 173 | − rdi->mmap_offset = PAGE_SIZE; | |
| 173 | + rdi->mmap_offset = ALIGN(PAGE_SIZE, SHMLBA); | |
| 174 | 174 | ip->offset = rdi->mmap_offset; |
| 175 | − rdi->mmap_offset += size; | |
| 175 | + rdi->mmap_offset += ALIGN(size, SHMLBA); | |
| 176 | 176 | spin_unlock_irq(&rdi->mmap_offset_lock); |
| 177 | 177 | |
| 178 | 178 | INIT_LIST_HEAD(&ip->pending_mmaps); |
| @@ -22,4 +22,4 @@ config RDMA_RXE · 21 unmodified lines | ||
| 22 | 22 | To configure and work with soft-RoCE driver please use the |
| 23 | 23 | following wiki page under "configure Soft-RoCE (RXE)" section: |
| 24 | 24 | |
| 25 | − https://github.com/SoftRoCE/rxe-dev/wiki/rxe-dev:-Home | |
| 25 | + https://github.com/linux-rdma/rdma-core/blob/master/Documentation/rxe.md | |
| @@ -156,10 +156,10 @@ struct rxe_mmap_info *rxe_create_mmap_info(struct rxe_dev *rxe, · 155 unmodified lines | ||
| 156 | 156 | spin_lock_bh(&rxe->mmap_offset_lock); |
| 157 | 157 | |
| 158 | 158 | if (rxe->mmap_offset == 0) |
| 159 | − rxe->mmap_offset = PAGE_SIZE; | |
| 159 | + rxe->mmap_offset = ALIGN(PAGE_SIZE, SHMLBA); | |
| 160 | 160 | |
| 161 | 161 | ip->info.offset = rxe->mmap_offset; |
| 162 | − rxe->mmap_offset += size; | |
| 162 | + rxe->mmap_offset += ALIGN(size, SHMLBA); | |
| 163 | 163 | |
| 164 | 164 | spin_unlock_bh(&rxe->mmap_offset_lock); |
| 165 | 165 | |
| @@ -729,11 +729,11 @@ next_wqe: · 728 unmodified lines | ||
| 729 | 729 | ret = rxe_xmit_packet(to_rdev(qp->ibqp.device), qp, &pkt, skb); |
| 730 | 730 | if (ret) { |
| 731 | 731 | qp->need_req_skb = 1; |
| 732 | − kfree_skb(skb); | |
| 733 | 732 | |
| 734 | 733 | rollback_state(wqe, qp, &rollback_wqe, rollback_psn); |
| 735 | 734 | |
| 736 | 735 | if (ret == -EAGAIN) { |
| 736 | + kfree_skb(skb); | |
| 737 | 737 | rxe_run_task(&qp->req.task, 1); |
| 738 | 738 | goto exit; |
| 739 | 739 | } |
| @@ -813,18 +813,17 @@ static enum resp_states execute(struct rxe_qp *qp, struct rxe_pkt_info *pkt) · 812 unmodified lines | ||
| 813 | 813 | WARN_ON_ONCE(1); |
| 814 | 814 | } |
| 815 | 815 | |
| 816 | − /* We successfully processed this new request. */ | |
| 817 | − qp->resp.msn++; | |
| 818 | − | |
| 819 | 816 | /* next expected psn, read handles this separately */ |
| 820 | 817 | qp->resp.psn = (pkt->psn + 1) & BTH_PSN_MASK; |
| 821 | 818 | |
| 822 | 819 | qp->resp.opcode = pkt->opcode; |
| 823 | 820 | qp->resp.status = IB_WC_SUCCESS; |
| 824 | 821 | |
| 825 | − if (pkt->mask & RXE_COMP_MASK) | |
| 822 | + if (pkt->mask & RXE_COMP_MASK) { | |
| 823 | + /* We successfully processed this new request. */ | |
| 824 | + qp->resp.msn++; | |
| 826 | 825 | return RESPST_COMPLETE; |
| 827 | − else if (qp_type(qp) == IB_QPT_RC) | |
| 826 | + } else if (qp_type(qp) == IB_QPT_RC) | |
| 828 | 827 | return RESPST_ACKNOWLEDGE; |
| 829 | 828 | else |
| 830 | 829 | return RESPST_CLEANUP; |
| @@ -430,6 +430,7 @@ struct iser_fr_desc { · 429 unmodified lines | ||
| 430 | 430 | struct list_head list; |
| 431 | 431 | struct iser_reg_resources rsc; |
| 432 | 432 | struct iser_pi_context *pi_ctx; |
| 433 | + struct list_head all_list; | |
| 433 | 434 | }; |
| 434 | 435 | |
| 435 | 436 | /** |
| @@ -443,6 +444,7 @@ struct iser_fr_pool { · 7 unmodified lines | ||
| 443 | 444 | struct list_head list; |
| 444 | 445 | spinlock_t lock; |
| 445 | 446 | int size; |
| 447 | + struct list_head all_list; | |
| 446 | 448 | }; |
| 447 | 449 | |
| 448 | 450 | /** |
| @@ -362,6 +362,7 @@ int iser_alloc_fastreg_pool(struct ib_conn *ib_conn, · 361 unmodified lines | ||
| 362 | 362 | int i, ret; |
| 363 | 363 | |
| 364 | 364 | INIT_LIST_HEAD(&fr_pool->list); |
| 365 | + INIT_LIST_HEAD(&fr_pool->all_list); | |
| 365 | 366 | spin_lock_init(&fr_pool->lock); |
| 366 | 367 | fr_pool->size = 0; |
| 367 | 368 | for (i = 0; i < cmds_max; i++) { |
| @@ -373,6 +374,7 @@ int iser_alloc_fastreg_pool(struct ib_conn *ib_conn, · 5 unmodified lines | ||
| 373 | 374 | } |
| 374 | 375 | |
| 375 | 376 | list_add_tail(&desc->list, &fr_pool->list); |
| 377 | + list_add_tail(&desc->all_list, &fr_pool->all_list); | |
| 376 | 378 | fr_pool->size++; |
| 377 | 379 | } |
| 378 | 380 | |
| @@ -392,13 +394,13 @@ void iser_free_fastreg_pool(struct ib_conn *ib_conn) · 13 unmodified lines | ||
| 392 | 394 | struct iser_fr_desc *desc, *tmp; |
| 393 | 395 | int i = 0; |
| 394 | 396 | |
| 395 | − if (list_empty(&fr_pool->list)) | |
| 397 | + if (list_empty(&fr_pool->all_list)) | |
| 396 | 398 | return; |
| 397 | 399 | |
| 398 | 400 | iser_info("freeing conn %p fr pool\n", ib_conn); |
| 399 | 401 | |
| 400 | − list_for_each_entry_safe(desc, tmp, &fr_pool->list, list) { | |
| 401 | − list_del(&desc->list); | |
| 402 | + list_for_each_entry_safe(desc, tmp, &fr_pool->all_list, all_list) { | |
| 403 | + list_del(&desc->all_list); | |
| 402 | 404 | iser_free_reg_res(&desc->rsc); |
| 403 | 405 | if (desc->pi_ctx) |
| 404 | 406 | iser_free_pi_ctx(desc->pi_ctx); |
| @@ -141,6 +141,9 @@ static int iforce_usb_probe(struct usb_interface *intf, · 140 unmodified lines | ||
| 141 | 141 | |
| 142 | 142 | interface = intf->cur_altsetting; |
| 143 | 143 | |
| 144 | + if (interface->desc.bNumEndpoints < 2) | |
| 145 | + return -ENODEV; | |
| 146 | + | |
| 144 | 147 | epirq = &interface->endpoint[0].desc; |
| 145 | 148 | epout = &interface->endpoint[1].desc; |
| 146 | 149 | |
| @@ -700,6 +700,10 @@ static int cm109_usb_probe(struct usb_interface *intf, · 699 unmodified lines | ||
| 700 | 700 | int error = -ENOMEM; |
| 701 | 701 | |
| 702 | 702 | interface = intf->cur_altsetting; |
| 703 | + | |
| 704 | + if (interface->desc.bNumEndpoints < 1) | |
| 705 | + return -ENODEV; | |
| 706 | + | |
| 703 | 707 | endpoint = &interface->endpoint[0].desc; |
| 704 | 708 | |
| 705 | 709 | if (!usb_endpoint_is_int_in(endpoint)) |
| @@ -1667,6 +1667,10 @@ static int ims_pcu_parse_cdc_data(struct usb_interface *intf, struct ims_pcu *pc · 1666 unmodified lines | ||
| 1667 | 1667 | return -EINVAL; |
| 1668 | 1668 | |
| 1669 | 1669 | alt = pcu->ctrl_intf->cur_altsetting; |
| 1670 | + | |
| 1671 | + if (alt->desc.bNumEndpoints < 1) | |
| 1672 | + return -ENODEV; | |
| 1673 | + | |
| 1670 | 1674 | pcu->ep_ctrl = &alt->endpoint[0].desc; |
| 1671 | 1675 | pcu->max_ctrl_size = usb_endpoint_maxp(pcu->ep_ctrl); |
| 1672 | 1676 | |
| @@ -875,6 +875,10 @@ static int usb_probe(struct usb_interface *intf, const struct usb_device_id *id) · 874 unmodified lines | ||
| 875 | 875 | int ret, pipe, i; |
| 876 | 876 | |
| 877 | 877 | interface = intf->cur_altsetting; |
| 878 | + | |
| 879 | + if (interface->desc.bNumEndpoints < 1) | |
| 880 | + return -ENODEV; | |
| 881 | + | |
| 878 | 882 | endpoint = &interface->endpoint[0].desc; |
| 879 | 883 | if (!usb_endpoint_is_int_in(endpoint)) |
| 880 | 884 | return -ENODEV; |
| @@ -1282,10 +1282,8 @@ static int alps_decode_ss4_v2(struct alps_fields *f, · 1281 unmodified lines | ||
| 1282 | 1282 | /* handle buttons */ |
| 1283 | 1283 | if (pkt_id == SS4_PACKET_ID_STICK) { |
| 1284 | 1284 | f->ts_left = !!(SS4_BTN_V2(p) & 0x01); |
| 1285 | − if (!(priv->flags & ALPS_BUTTONPAD)) { | |
| 1286 | − f->ts_right = !!(SS4_BTN_V2(p) & 0x02); | |
| 1287 | − f->ts_middle = !!(SS4_BTN_V2(p) & 0x04); | |
| 1288 | − } | |
| 1285 | + f->ts_right = !!(SS4_BTN_V2(p) & 0x02); | |
| 1286 | + f->ts_middle = !!(SS4_BTN_V2(p) & 0x04); | |
| 1289 | 1287 | } else { |
| 1290 | 1288 | f->left = !!(SS4_BTN_V2(p) & 0x01); |
| 1291 | 1289 | if (!(priv->flags & ALPS_BUTTONPAD)) { |
| @@ -2462,14 +2460,34 @@ static int alps_update_device_area_ss4_v2(unsigned char otp[][4], · 1170 unmodified lines | ||
| 2462 | 2460 | int num_y_electrode; |
| 2463 | 2461 | int x_pitch, y_pitch, x_phys, y_phys; |
| 2464 | 2462 | |
| 2465 | − num_x_electrode = SS4_NUMSENSOR_XOFFSET + (otp[1][0] & 0x0F); | |
| 2466 | − num_y_electrode = SS4_NUMSENSOR_YOFFSET + ((otp[1][0] >> 4) & 0x0F); | |
| 2463 | + if (IS_SS4PLUS_DEV(priv->dev_id)) { | |
| 2464 | + num_x_electrode = | |
| 2465 | + SS4PLUS_NUMSENSOR_XOFFSET + (otp[0][2] & 0x0F); | |
| 2466 | + num_y_electrode = | |
| 2467 | + SS4PLUS_NUMSENSOR_YOFFSET + ((otp[0][2] >> 4) & 0x0F); | |
| 2468 | + | |
| 2469 | + priv->x_max = | |
| 2470 | + (num_x_electrode - 1) * SS4PLUS_COUNT_PER_ELECTRODE; | |
| 2471 | + priv->y_max = | |
| 2472 | + (num_y_electrode - 1) * SS4PLUS_COUNT_PER_ELECTRODE; | |
| 2467 | 2473 | |
| 2468 | − priv->x_max = (num_x_electrode - 1) * SS4_COUNT_PER_ELECTRODE; | |
| 2469 | − priv->y_max = (num_y_electrode - 1) * SS4_COUNT_PER_ELECTRODE; | |
| 2474 | + x_pitch = (otp[0][1] & 0x0F) + SS4PLUS_MIN_PITCH_MM; | |
| 2475 | + y_pitch = ((otp[0][1] >> 4) & 0x0F) + SS4PLUS_MIN_PITCH_MM; | |
| 2470 | 2476 | |
| 2471 | − x_pitch = ((otp[1][2] >> 2) & 0x07) + SS4_MIN_PITCH_MM; | |
| 2472 | − y_pitch = ((otp[1][2] >> 5) & 0x07) + SS4_MIN_PITCH_MM; | |
| 2477 | + } else { | |
| 2478 | + num_x_electrode = | |
| 2479 | + SS4_NUMSENSOR_XOFFSET + (otp[1][0] & 0x0F); | |
| 2480 | + num_y_electrode = | |
| 2481 | + SS4_NUMSENSOR_YOFFSET + ((otp[1][0] >> 4) & 0x0F); | |
| 2482 | + | |
| 2483 | + priv->x_max = | |
| 2484 | + (num_x_electrode - 1) * SS4_COUNT_PER_ELECTRODE; | |
| 2485 | + priv->y_max = | |
| 2486 | + (num_y_electrode - 1) * SS4_COUNT_PER_ELECTRODE; | |
| 2487 | + | |
| 2488 | + x_pitch = ((otp[1][2] >> 2) & 0x07) + SS4_MIN_PITCH_MM; | |
| 2489 | + y_pitch = ((otp[1][2] >> 5) & 0x07) + SS4_MIN_PITCH_MM; | |
| 2490 | + } | |
| 2473 | 2491 | |
| 2474 | 2492 | x_phys = x_pitch * (num_x_electrode - 1); /* In 0.1 mm units */ |
| 2475 | 2493 | y_phys = y_pitch * (num_y_electrode - 1); /* In 0.1 mm units */ |
| @@ -2485,7 +2503,10 @@ static int alps_update_btn_info_ss4_v2(unsigned char otp[][4], · 9 unmodified lines | ||
| 2485 | 2503 | { |
| 2486 | 2504 | unsigned char is_btnless; |
| 2487 | 2505 | |
| 2488 | − is_btnless = (otp[1][1] >> 3) & 0x01; | |
| 2506 | + if (IS_SS4PLUS_DEV(priv->dev_id)) | |
| 2507 | + is_btnless = (otp[1][0] >> 1) & 0x01; | |
| 2508 | + else | |
| 2509 | + is_btnless = (otp[1][1] >> 3) & 0x01; | |
| 2489 | 2510 | |
| 2490 | 2511 | if (is_btnless) |
| 2491 | 2512 | priv->flags |= ALPS_BUTTONPAD; |
| @@ -2493,6 +2514,21 @@ static int alps_update_btn_info_ss4_v2(unsigned char otp[][4], · 1 unmodified line | ||
| 2493 | 2514 | return 0; |
| 2494 | 2515 | } |
| 2495 | 2516 | |
| 2517 | +static int alps_update_dual_info_ss4_v2(unsigned char otp[][4], | |
| 2518 | + struct alps_data *priv) | |
| 2519 | +{ | |
| 2520 | + bool is_dual = false; | |
| 2521 | + | |
| 2522 | + if (IS_SS4PLUS_DEV(priv->dev_id)) | |
| 2523 | + is_dual = (otp[0][0] >> 4) & 0x01; | |
| 2524 | + | |
| 2525 | + if (is_dual) | |
| 2526 | + priv->flags |= ALPS_DUALPOINT | | |
| 2527 | + ALPS_DUALPOINT_WITH_PRESSURE; | |
| 2528 | + | |
| 2529 | + return 0; | |
| 2530 | +} | |
| 2531 | + | |
| 2496 | 2532 | static int alps_set_defaults_ss4_v2(struct psmouse *psmouse, |
| 2497 | 2533 | struct alps_data *priv) |
| 2498 | 2534 | { |
| @@ -2508,6 +2544,8 @@ static int alps_set_defaults_ss4_v2(struct psmouse *psmouse, · 9 unmodified lines | ||
| 2508 | 2544 | |
| 2509 | 2545 | alps_update_btn_info_ss4_v2(otp, priv); |
| 2510 | 2546 | |
| 2547 | + alps_update_dual_info_ss4_v2(otp, priv); | |
| 2548 | + | |
| 2511 | 2549 | return 0; |
| 2512 | 2550 | } |
| 2513 | 2551 | |
| @@ -2753,10 +2791,6 @@ static int alps_set_protocol(struct psmouse *psmouse, · 239 unmodified lines | ||
| 2753 | 2791 | if (alps_set_defaults_ss4_v2(psmouse, priv)) |
| 2754 | 2792 | return -EIO; |
| 2755 | 2793 | |
| 2756 | − if (priv->fw_ver[1] == 0x1) | |
| 2757 | − priv->flags |= ALPS_DUALPOINT | | |
| 2758 | − ALPS_DUALPOINT_WITH_PRESSURE; | |
| 2759 | − | |
| 2760 | 2794 | break; |
| 2761 | 2795 | } |
| 2762 | 2796 | |
| @@ -2827,10 +2861,7 @@ static int alps_identify(struct psmouse *psmouse, struct alps_data *priv) · 64 unmodified lines | ||
| 2827 | 2861 | ec[2] >= 0x90 && ec[2] <= 0x9d) { |
| 2828 | 2862 | protocol = &alps_v3_protocol_data; |
| 2829 | 2863 | } else if (e7[0] == 0x73 && e7[1] == 0x03 && |
| 2830 | − e7[2] == 0x14 && ec[1] == 0x02) { | |
| 2831 | − protocol = &alps_v8_protocol_data; | |
| 2832 | − } else if (e7[0] == 0x73 && e7[1] == 0x03 && | |
| 2833 | − e7[2] == 0x28 && ec[1] == 0x01) { | |
| 2864 | + (e7[2] == 0x14 || e7[2] == 0x28)) { | |
| 2834 | 2865 | protocol = &alps_v8_protocol_data; |
| 2835 | 2866 | } else { |
| 2836 | 2867 | psmouse_dbg(psmouse, |
| @@ -2840,7 +2871,8 @@ static int alps_identify(struct psmouse *psmouse, struct alps_data *priv) · 3 unmodified lines | ||
| 2840 | 2871 | } |
| 2841 | 2872 | |
| 2842 | 2873 | if (priv) { |
| 2843 | − /* Save the Firmware version */ | |
| 2874 | + /* Save Device ID and Firmware version */ | |
| 2875 | + memcpy(priv->dev_id, e7, 3); | |
| 2844 | 2876 | memcpy(priv->fw_ver, ec, 3); |
| 2845 | 2877 | error = alps_set_protocol(psmouse, priv, protocol); |
| 2846 | 2878 | if (error) |
| @@ -54,6 +54,16 @@ enum SS4_PACKET_ID { · 53 unmodified lines | ||
| 54 | 54 | |
| 55 | 55 | #define SS4_MASK_NORMAL_BUTTONS 0x07 |
| 56 | 56 | |
| 57 | +#define SS4PLUS_COUNT_PER_ELECTRODE 128 | |
| 58 | +#define SS4PLUS_NUMSENSOR_XOFFSET 16 | |
| 59 | +#define SS4PLUS_NUMSENSOR_YOFFSET 5 | |
| 60 | +#define SS4PLUS_MIN_PITCH_MM 37 | |
| 61 | + | |
| 62 | +#define IS_SS4PLUS_DEV(_b) (((_b[0]) == 0x73) && \ | |
| 63 | + ((_b[1]) == 0x03) && \ | |
| 64 | + ((_b[2]) == 0x28) \ | |
| 65 | + ) | |
| 66 | + | |
| 57 | 67 | #define SS4_IS_IDLE_V2(_b) (((_b[0]) == 0x18) && \ |
| 58 | 68 | ((_b[1]) == 0x10) && \ |
| 59 | 69 | ((_b[2]) == 0x00) && \ |
| @@ -283,6 +293,7 @@ struct alps_data { · 223 unmodified lines | ||
| 283 | 293 | int addr_command; |
| 284 | 294 | u16 proto_version; |
| 285 | 295 | u8 byte0, mask0; |
| 296 | + u8 dev_id[3]; | |
| 286 | 297 | u8 fw_ver[3]; |
| 287 | 298 | int flags; |
| 288 | 299 | int x_max; |
| @@ -218,17 +218,19 @@ static int elan_query_product(struct elan_tp_data *data) · 217 unmodified lines | ||
| 218 | 218 | |
| 219 | 219 | static int elan_check_ASUS_special_fw(struct elan_tp_data *data) |
| 220 | 220 | { |
| 221 | − if (data->ic_type != 0x0E) | |
| 222 | − return false; | |
| 223 | − | |
| 224 | − switch (data->product_id) { | |
| 225 | − case 0x05 ... 0x07: | |
| 226 | − case 0x09: | |
| 227 | − case 0x13: | |
| 221 | + if (data->ic_type == 0x0E) { | |
| 222 | + switch (data->product_id) { | |
| 223 | + case 0x05 ... 0x07: | |
| 224 | + case 0x09: | |
| 225 | + case 0x13: | |
| 226 | + return true; | |
| 227 | + } | |
| 228 | + } else if (data->ic_type == 0x08 && data->product_id == 0x26) { | |
| 229 | + /* ASUS EeeBook X205TA */ | |
| 228 | 230 | return true; |
| 229 | − default: | |
| 230 | − return false; | |
| 231 | 231 | } |
| 232 | + | |
| 233 | + return false; | |
| 232 | 234 | } |
| 233 | 235 | |
| 234 | 236 | static int __elan_initialize(struct elan_tp_data *data) |
| @@ -170,6 +170,10 @@ static int rmi_f30_config(struct rmi_function *fn) · 169 unmodified lines | ||
| 170 | 170 | rmi_get_platform_data(fn->rmi_dev); |
| 171 | 171 | int error; |
| 172 | 172 | |
| 173 | + /* can happen if f30_data.disable is set */ | |
| 174 | + if (!f30) | |
| 175 | + return 0; | |
| 176 | + | |
| 173 | 177 | if (pdata->f30_data.trackstick_buttons) { |
| 174 | 178 | /* Try [re-]establish link to F03. */ |
| 175 | 179 | f30->f03 = rmi_find_function(fn->rmi_dev, 0x03); |
| @@ -119,6 +119,13 @@ static const struct dmi_system_id __initconst i8042_dmi_noloop_table[] = { · 118 unmodified lines | ||
| 119 | 119 | DMI_MATCH(DMI_PRODUCT_VERSION, "DL760"), |
| 120 | 120 | }, |
| 121 | 121 | }, |
| 122 | + { | |
| 123 | + /* Dell Embedded Box PC 3000 */ | |
| 124 | + .matches = { | |
| 125 | + DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."), | |
| 126 | + DMI_MATCH(DMI_PRODUCT_NAME, "Embedded Box PC 3000"), | |
| 127 | + }, | |
| 128 | + }, | |
| 122 | 129 | { |
| 123 | 130 | /* OQO Model 01 */ |
| 124 | 131 | .matches = { |
| @@ -513,6 +520,13 @@ static const struct dmi_system_id __initconst i8042_dmi_nomux_table[] = { · 388 unmodified lines | ||
| 513 | 520 | DMI_MATCH(DMI_PRODUCT_NAME, "IC4I"), |
| 514 | 521 | }, |
| 515 | 522 | }, |
| 523 | + { | |
| 524 | + /* TUXEDO BU1406 */ | |
| 525 | + .matches = { | |
| 526 | + DMI_MATCH(DMI_SYS_VENDOR, "Notebook"), | |
| 527 | + DMI_MATCH(DMI_PRODUCT_NAME, "N24_25BU"), | |
| 528 | + }, | |
| 529 | + }, | |
| 516 | 530 | { } |
| 517 | 531 | }; |
| 518 | 532 | |
| @@ -340,6 +340,9 @@ static int hanwang_probe(struct usb_interface *intf, const struct usb_device_id · 339 unmodified lines | ||
| 340 | 340 | int error; |
| 341 | 341 | int i; |
| 342 | 342 | |
| 343 | + if (intf->cur_altsetting->desc.bNumEndpoints < 1) | |
| 344 | + return -ENODEV; | |
| 345 | + | |
| 343 | 346 | hanwang = kzalloc(sizeof(struct hanwang), GFP_KERNEL); |
| 344 | 347 | input_dev = input_allocate_device(); |
| 345 | 348 | if (!hanwang || !input_dev) { |
| @@ -122,6 +122,9 @@ static int kbtab_probe(struct usb_interface *intf, const struct usb_device_id *i · 121 unmodified lines | ||
| 122 | 122 | struct input_dev *input_dev; |
| 123 | 123 | int error = -ENOMEM; |
| 124 | 124 | |
| 125 | + if (intf->cur_altsetting->desc.bNumEndpoints < 1) | |
| 126 | + return -ENODEV; | |
| 127 | + | |
| 125 | 128 | kbtab = kzalloc(sizeof(struct kbtab), GFP_KERNEL); |
| 126 | 129 | input_dev = input_allocate_device(); |
| 127 | 130 | if (!kbtab || !input_dev) |
| @@ -527,6 +527,9 @@ static int sur40_probe(struct usb_interface *interface, · 526 unmodified lines | ||
| 527 | 527 | if (iface_desc->desc.bInterfaceClass != 0xFF) |
| 528 | 528 | return -ENODEV; |
| 529 | 529 | |
| 530 | + if (iface_desc->desc.bNumEndpoints < 5) | |
| 531 | + return -ENODEV; | |
| 532 | + | |
| 530 | 533 | /* Use endpoint #4 (0x86). */ |
| 531 | 534 | endpoint = &iface_desc->endpoint[4].desc; |
| 532 | 535 | if (endpoint->bEndpointAddress != TOUCH_ENDPOINT) |
| @@ -3202,7 +3202,7 @@ static void amd_iommu_get_resv_regions(struct device *dev, · 3201 unmodified lines | ||
| 3202 | 3202 | |
| 3203 | 3203 | region = iommu_alloc_resv_region(MSI_RANGE_START, |
| 3204 | 3204 | MSI_RANGE_END - MSI_RANGE_START + 1, |
| 3205 | − 0, IOMMU_RESV_RESERVED); | |
| 3205 | + 0, IOMMU_RESV_MSI); | |
| 3206 | 3206 | if (!region) |
| 3207 | 3207 | return; |
| 3208 | 3208 | list_add_tail(®ion->list, head); |
| @@ -1888,7 +1888,7 @@ static void arm_smmu_get_resv_regions(struct device *dev, · 1887 unmodified lines | ||
| 1888 | 1888 | int prot = IOMMU_WRITE | IOMMU_NOEXEC | IOMMU_MMIO; |
| 1889 | 1889 | |
| 1890 | 1890 | region = iommu_alloc_resv_region(MSI_IOVA_BASE, MSI_IOVA_LENGTH, |
| 1891 | − prot, IOMMU_RESV_MSI); | |
| 1891 | + prot, IOMMU_RESV_SW_MSI); | |
| 1892 | 1892 | if (!region) |
| 1893 | 1893 | return; |
| 1894 | 1894 | |
| @@ -1608,7 +1608,7 @@ static void arm_smmu_get_resv_regions(struct device *dev, · 1607 unmodified lines | ||
| 1608 | 1608 | int prot = IOMMU_WRITE | IOMMU_NOEXEC | IOMMU_MMIO; |
| 1609 | 1609 | |
| 1610 | 1610 | region = iommu_alloc_resv_region(MSI_IOVA_BASE, MSI_IOVA_LENGTH, |
| 1611 | − prot, IOMMU_RESV_MSI); | |
| 1611 | + prot, IOMMU_RESV_SW_MSI); | |
| 1612 | 1612 | if (!region) |
| 1613 | 1613 | return; |
| 1614 | 1614 | |
| @@ -512,7 +512,13 @@ static void sysmmu_tlb_invalidate_flpdcache(struct sysmmu_drvdata *data, · 511 unmodified lines | ||
| 512 | 512 | spin_lock_irqsave(&data->lock, flags); |
| 513 | 513 | if (data->active && data->version >= MAKE_MMU_VER(3, 3)) { |
| 514 | 514 | clk_enable(data->clk_master); |
| 515 | − __sysmmu_tlb_invalidate_entry(data, iova, 1); | |
| 515 | + if (sysmmu_block(data)) { | |
| 516 | + if (data->version >= MAKE_MMU_VER(5, 0)) | |
| 517 | + __sysmmu_tlb_invalidate(data); | |
| 518 | + else | |
| 519 | + __sysmmu_tlb_invalidate_entry(data, iova, 1); | |
| 520 | + sysmmu_unblock(data); | |
| 521 | + } | |
| 516 | 522 | clk_disable(data->clk_master); |
| 517 | 523 | } |
| 518 | 524 | spin_unlock_irqrestore(&data->lock, flags); |
| @@ -916,7 +916,7 @@ static struct intel_iommu *device_to_iommu(struct device *dev, u8 *bus, u8 *devf · 915 unmodified lines | ||
| 916 | 916 | * which we used for the IOMMU lookup. Strictly speaking |
| 917 | 917 | * we could do this for all PCI devices; we only need to |
| 918 | 918 | * get the BDF# from the scope table for ACPI matches. */ |
| 919 | − if (pdev->is_virtfn) | |
| 919 | + if (pdev && pdev->is_virtfn) | |
| 920 | 920 | goto got_pdev; |
| 921 | 921 | |
| 922 | 922 | *bus = drhd->devices[i].bus; |
| @@ -5249,7 +5249,7 @@ static void intel_iommu_get_resv_regions(struct device *device, · 4326 unmodified lines | ||
| 5249 | 5249 | |
| 5250 | 5250 | reg = iommu_alloc_resv_region(IOAPIC_RANGE_START, |
| 5251 | 5251 | IOAPIC_RANGE_END - IOAPIC_RANGE_START + 1, |
| 5252 | − 0, IOMMU_RESV_RESERVED); | |
| 5252 | + 0, IOMMU_RESV_MSI); | |
| 5253 | 5253 | if (!reg) |
| 5254 | 5254 | return; |
| 5255 | 5255 | list_add_tail(®->list, head); |
| @@ -422,8 +422,12 @@ static int __arm_v7s_map(struct arm_v7s_io_pgtable *data, unsigned long iova, · 421 unmodified lines | ||
| 422 | 422 | pte |= ARM_V7S_ATTR_NS_TABLE; |
| 423 | 423 | |
| 424 | 424 | __arm_v7s_set_pte(ptep, pte, 1, cfg); |
| 425 | − } else { | |
| 425 | + } else if (ARM_V7S_PTE_IS_TABLE(pte, lvl)) { | |
| 426 | 426 | cptep = iopte_deref(pte, lvl); |
| 427 | + } else { | |
| 428 | + /* We require an unmap first */ | |
| 429 | + WARN_ON(!selftest_running); | |
| 430 | + return -EEXIST; | |
| 427 | 431 | } |
| 428 | 432 | |
| 429 | 433 | /* Rinse, repeat */ |
| @@ -335,8 +335,12 @@ static int __arm_lpae_map(struct arm_lpae_io_pgtable *data, unsigned long iova, · 334 unmodified lines | ||
| 335 | 335 | if (cfg->quirks & IO_PGTABLE_QUIRK_ARM_NS) |
| 336 | 336 | pte |= ARM_LPAE_PTE_NSTABLE; |
| 337 | 337 | __arm_lpae_set_pte(ptep, pte, cfg); |
| 338 | − } else { | |
| 338 | + } else if (!iopte_leaf(pte, lvl)) { | |
| 339 | 339 | cptep = iopte_deref(pte, data); |
| 340 | + } else { | |
| 341 | + /* We require an unmap first */ | |
| 342 | + WARN_ON(!selftest_running); | |
| 343 | + return -EEXIST; | |
| 340 | 344 | } |
| 341 | 345 | |
| 342 | 346 | /* Rinse, repeat */ |
| @@ -72,6 +72,7 @@ static const char * const iommu_group_resv_type_string[] = { · 71 unmodified lines | ||
| 72 | 72 | [IOMMU_RESV_DIRECT] = "direct", |
| 73 | 73 | [IOMMU_RESV_RESERVED] = "reserved", |
| 74 | 74 | [IOMMU_RESV_MSI] = "msi", |
| 75 | + [IOMMU_RESV_SW_MSI] = "msi", | |
| 75 | 76 | }; |
| 76 | 77 | |
| 77 | 78 | #define IOMMU_GROUP_ATTR(_name, _mode, _show, _store) \ |
| @@ -1743,8 +1744,8 @@ void iommu_put_resv_regions(struct device *dev, struct list_head *list) · 1665 unmodified lines | ||
| 1743 | 1744 | } |
| 1744 | 1745 | |
| 1745 | 1746 | struct iommu_resv_region *iommu_alloc_resv_region(phys_addr_t start, |
| 1746 | − size_t length, | |
| 1747 | − int prot, int type) | |
| 1747 | + size_t length, int prot, | |
| 1748 | + enum iommu_resv_type type) | |
| 1748 | 1749 | { |
| 1749 | 1750 | struct iommu_resv_region *region; |
| 1750 | 1751 | |
| @@ -2317,6 +2317,9 @@ static int gigaset_probe(struct usb_interface *interface, · 2316 unmodified lines | ||
| 2317 | 2317 | return -ENODEV; |
| 2318 | 2318 | } |
| 2319 | 2319 | |
| 2320 | + if (hostif->desc.bNumEndpoints < 1) | |
| 2321 | + return -ENODEV; | |
| 2322 | + | |
| 2320 | 2323 | dev_info(&udev->dev, |
| 2321 | 2324 | "%s: Device matched (Vendor: 0x%x, Product: 0x%x)\n", |
| 2322 | 2325 | __func__, le16_to_cpu(udev->descriptor.idVendor), |
| @@ -392,6 +392,7 @@ static struct macio_dev * macio_add_one_device(struct macio_chip *chip, · 391 unmodified lines | ||
| 392 | 392 | * To get all the fields, copy all archdata |
| 393 | 393 | */ |
| 394 | 394 | dev->ofdev.dev.archdata = chip->lbus.pdev->dev.archdata; |
| 395 | + dev->ofdev.dev.dma_ops = chip->lbus.pdev->dev.dma_ops; | |
| 395 | 396 | #endif /* CONFIG_PCI */ |
| 396 | 397 | |
| 397 | 398 | #ifdef DEBUG |
| @@ -989,26 +989,29 @@ static void flush_current_bio_list(struct blk_plug_cb *cb, bool from_schedule) · 988 unmodified lines | ||
| 989 | 989 | struct dm_offload *o = container_of(cb, struct dm_offload, cb); |
| 990 | 990 | struct bio_list list; |
| 991 | 991 | struct bio *bio; |
| 992 | + int i; | |
| 992 | 993 | |
| 993 | 994 | INIT_LIST_HEAD(&o->cb.list); |
| 994 | 995 | |
| 995 | 996 | if (unlikely(!current->bio_list)) |
| 996 | 997 | return; |
| 997 | 998 | |
| 998 | − list = *current->bio_list; | |
| 999 | − bio_list_init(current->bio_list); | |
| 1000 | − | |
| 1001 | − while ((bio = bio_list_pop(&list))) { | |
| 1002 | − struct bio_set *bs = bio->bi_pool; | |
| 1003 | − if (unlikely(!bs) || bs == fs_bio_set) { | |
| 1004 | − bio_list_add(current->bio_list, bio); | |
| 1005 | − continue; | |
| 999 | + for (i = 0; i < 2; i++) { | |
| 1000 | + list = current->bio_list[i]; | |
| 1001 | + bio_list_init(¤t->bio_list[i]); | |
| 1002 | + | |
| 1003 | + while ((bio = bio_list_pop(&list))) { | |
| 1004 | + struct bio_set *bs = bio->bi_pool; | |
| 1005 | + if (unlikely(!bs) || bs == fs_bio_set) { | |
| 1006 | + bio_list_add(¤t->bio_list[i], bio); | |
| 1007 | + continue; | |
| 1008 | + } | |
| 1009 | + | |
| 1010 | + spin_lock(&bs->rescue_lock); | |
| 1011 | + bio_list_add(&bs->rescue_list, bio); | |
| 1012 | + queue_work(bs->rescue_workqueue, &bs->rescue_work); | |
| 1013 | + spin_unlock(&bs->rescue_lock); | |
| 1006 | 1014 | } |
| 1007 | − | |
| 1008 | − spin_lock(&bs->rescue_lock); | |
| 1009 | − bio_list_add(&bs->rescue_list, bio); | |
| 1010 | − queue_work(bs->rescue_workqueue, &bs->rescue_work); | |
| 1011 | − spin_unlock(&bs->rescue_lock); | |
| 1012 | 1015 | } |
| 1013 | 1016 | } |
| 1014 | 1017 | |
| @@ -777,7 +777,6 @@ static int gather_all_resync_info(struct mddev *mddev, int total_slots) · 776 unmodified lines | ||
| 777 | 777 | bm_lockres->flags |= DLM_LKF_NOQUEUE; |
| 778 | 778 | ret = dlm_lock_sync(bm_lockres, DLM_LOCK_PW); |
| 779 | 779 | if (ret == -EAGAIN) { |
| 780 | − memset(bm_lockres->lksb.sb_lvbptr, '\0', LVB_SIZE); | |
| 781 | 780 | s = read_resync_info(mddev, bm_lockres); |
| 782 | 781 | if (s) { |
| 783 | 782 | pr_info("%s:%d Resync[%llu..%llu] in progress on %d\n", |
| @@ -974,6 +973,7 @@ static int leave(struct mddev *mddev) · 190 unmodified lines | ||
| 974 | 973 | lockres_free(cinfo->bitmap_lockres); |
| 975 | 974 | unlock_all_bitmaps(mddev); |
| 976 | 975 | dlm_release_lockspace(cinfo->lockspace, 2); |
| 976 | + kfree(cinfo); | |
| 977 | 977 | return 0; |
| 978 | 978 | } |
| 979 | 979 | |
| @@ -440,14 +440,6 @@ void md_flush_request(struct mddev *mddev, struct bio *bio) · 439 unmodified lines | ||
| 440 | 440 | } |
| 441 | 441 | EXPORT_SYMBOL(md_flush_request); |
| 442 | 442 | |
| 443 | −void md_unplug(struct blk_plug_cb *cb, bool from_schedule) | |
| 444 | −{ | |
| 445 | − struct mddev *mddev = cb->data; | |
| 446 | − md_wakeup_thread(mddev->thread); | |
| 447 | − kfree(cb); | |
| 448 | −} | |
| 449 | −EXPORT_SYMBOL(md_unplug); | |
| 450 | − | |
| 451 | 443 | static inline struct mddev *mddev_get(struct mddev *mddev) |
| 452 | 444 | { |
| 453 | 445 | atomic_inc(&mddev->active); |
| @@ -1887,7 +1879,7 @@ super_1_rdev_size_change(struct md_rdev *rdev, sector_t num_sectors) · 1433 unmodified lines | ||
| 1887 | 1879 | } |
| 1888 | 1880 | sb = page_address(rdev->sb_page); |
| 1889 | 1881 | sb->data_size = cpu_to_le64(num_sectors); |
| 1890 | − sb->super_offset = rdev->sb_start; | |
| 1882 | + sb->super_offset = cpu_to_le64(rdev->sb_start); | |
| 1891 | 1883 | sb->sb_csum = calc_sb_1_csum(sb); |
| 1892 | 1884 | do { |
| 1893 | 1885 | md_super_write(rdev->mddev, rdev, rdev->sb_start, rdev->sb_size, |
| @@ -2295,7 +2287,7 @@ static bool does_sb_need_changing(struct mddev *mddev) · 401 unmodified lines | ||
| 2295 | 2287 | /* Check if any mddev parameters have changed */ |
| 2296 | 2288 | if ((mddev->dev_sectors != le64_to_cpu(sb->size)) || |
| 2297 | 2289 | (mddev->reshape_position != le64_to_cpu(sb->reshape_position)) || |
| 2298 | − (mddev->layout != le64_to_cpu(sb->layout)) || | |
| 2290 | + (mddev->layout != le32_to_cpu(sb->layout)) || | |
| 2299 | 2291 | (mddev->raid_disks != le32_to_cpu(sb->raid_disks)) || |
| 2300 | 2292 | (mddev->chunk_sectors != le32_to_cpu(sb->chunksize))) |
| 2301 | 2293 | return true; |
| @@ -6458,11 +6450,10 @@ static int set_array_info(struct mddev *mddev, mdu_array_info_t *info) · 4156 unmodified lines | ||
| 6458 | 6450 | mddev->layout = info->layout; |
| 6459 | 6451 | mddev->chunk_sectors = info->chunk_size >> 9; |
| 6460 | 6452 | |
| 6461 | − mddev->max_disks = MD_SB_DISKS; | |
| 6462 | − | |
| 6463 | 6453 | if (mddev->persistent) { |
| 6464 | − mddev->flags = 0; | |
| 6465 | − mddev->sb_flags = 0; | |
| 6454 | + mddev->max_disks = MD_SB_DISKS; | |
| 6455 | + mddev->flags = 0; | |
| 6456 | + mddev->sb_flags = 0; | |
| 6466 | 6457 | } |
| 6467 | 6458 | set_bit(MD_SB_CHANGE_DEVS, &mddev->sb_flags); |
| 6468 | 6459 | |
| @@ -6533,8 +6524,12 @@ static int update_size(struct mddev *mddev, sector_t num_sectors) · 64 unmodified lines | ||
| 6533 | 6524 | return -ENOSPC; |
| 6534 | 6525 | } |
| 6535 | 6526 | rv = mddev->pers->resize(mddev, num_sectors); |
| 6536 | − if (!rv) | |
| 6537 | − revalidate_disk(mddev->gendisk); | |
| 6527 | + if (!rv) { | |
| 6528 | + if (mddev->queue) { | |
| 6529 | + set_capacity(mddev->gendisk, mddev->array_sectors); | |
| 6530 | + revalidate_disk(mddev->gendisk); | |
| 6531 | + } | |
| 6532 | + } | |
| 6538 | 6533 | return rv; |
| 6539 | 6534 | } |
| 6540 | 6535 | |
| @@ -676,16 +676,10 @@ extern void mddev_resume(struct mddev *mddev); · 675 unmodified lines | ||
| 676 | 676 | extern struct bio *bio_alloc_mddev(gfp_t gfp_mask, int nr_iovecs, |
| 677 | 677 | struct mddev *mddev); |
| 678 | 678 | |
| 679 | −extern void md_unplug(struct blk_plug_cb *cb, bool from_schedule); | |
| 680 | 679 | extern void md_reload_sb(struct mddev *mddev, int raid_disk); |
| 681 | 680 | extern void md_update_sb(struct mddev *mddev, int force); |
| 682 | 681 | extern void md_kick_rdev_from_array(struct md_rdev * rdev); |
| 683 | 682 | struct md_rdev *md_find_rdev_nr_rcu(struct mddev *mddev, int nr); |
| 684 | −static inline int mddev_check_plugged(struct mddev *mddev) | |
| 685 | −{ | |
| 686 | − return !!blk_check_plugged(md_unplug, mddev, | |
| 687 | − sizeof(struct blk_plug_cb)); | |
| 688 | −} | |
| 689 | 683 | |
| 690 | 684 | static inline void rdev_dec_pending(struct md_rdev *rdev, struct mddev *mddev) |
| 691 | 685 | { |
| @@ -1027,7 +1027,7 @@ static int get_unqueued_pending(struct r1conf *conf) · 1026 unmodified lines | ||
| 1027 | 1027 | static void freeze_array(struct r1conf *conf, int extra) |
| 1028 | 1028 | { |
| 1029 | 1029 | /* Stop sync I/O and normal I/O and wait for everything to |
| 1030 | − * go quite. | |
| 1030 | + * go quiet. | |
| 1031 | 1031 | * This is called in two situations: |
| 1032 | 1032 | * 1) management command handlers (reshape, remove disk, quiesce). |
| 1033 | 1033 | * 2) one normal I/O request failed. |
| @@ -1587,9 +1587,30 @@ static void raid1_make_request(struct mddev *mddev, struct bio *bio) · 553 unmodified lines | ||
| 1587 | 1587 | split = bio; |
| 1588 | 1588 | } |
| 1589 | 1589 | |
| 1590 | − if (bio_data_dir(split) == READ) | |
| 1590 | + if (bio_data_dir(split) == READ) { | |
| 1591 | 1591 | raid1_read_request(mddev, split); |
| 1592 | − else | |
| 1592 | + | |
| 1593 | + /* | |
| 1594 | + * If a bio is splitted, the first part of bio will | |
| 1595 | + * pass barrier but the bio is queued in | |
| 1596 | + * current->bio_list (see generic_make_request). If | |
| 1597 | + * there is a raise_barrier() called here, the second | |
| 1598 | + * part of bio can't pass barrier. But since the first | |
| 1599 | + * part bio isn't dispatched to underlaying disks yet, | |
| 1600 | + * the barrier is never released, hence raise_barrier | |
| 1601 | + * will alays wait. We have a deadlock. | |
| 1602 | + * Note, this only happens in read path. For write | |
| 1603 | + * path, the first part of bio is dispatched in a | |
| 1604 | + * schedule() call (because of blk plug) or offloaded | |
| 1605 | + * to raid10d. | |
| 1606 | + * Quitting from the function immediately can change | |
| 1607 | + * the bio order queued in bio_list and avoid the deadlock. | |
| 1608 | + */ | |
| 1609 | + if (split != bio) { | |
| 1610 | + generic_make_request(bio); | |
| 1611 | + break; | |
| 1612 | + } | |
| 1613 | + } else | |
| 1593 | 1614 | raid1_write_request(mddev, split); |
| 1594 | 1615 | } while (split != bio); |
| 1595 | 1616 | } |
| @@ -3246,8 +3267,6 @@ static int raid1_resize(struct mddev *mddev, sector_t sectors) · 1650 unmodified lines | ||
| 3246 | 3267 | return ret; |
| 3247 | 3268 | } |
| 3248 | 3269 | md_set_array_sectors(mddev, newsize); |
| 3249 | − set_capacity(mddev->gendisk, mddev->array_sectors); | |
| 3250 | − revalidate_disk(mddev->gendisk); | |
| 3251 | 3270 | if (sectors > mddev->dev_sectors && |
| 3252 | 3271 | mddev->recovery_cp > mddev->dev_sectors) { |
| 3253 | 3272 | mddev->recovery_cp = mddev->dev_sectors; |
| @@ -974,7 +974,8 @@ static void wait_barrier(struct r10conf *conf) · 973 unmodified lines | ||
| 974 | 974 | !conf->barrier || |
| 975 | 975 | (atomic_read(&conf->nr_pending) && |
| 976 | 976 | current->bio_list && |
| 977 | − !bio_list_empty(current->bio_list)), | |
| 977 | + (!bio_list_empty(¤t->bio_list[0]) || | |
| 978 | + !bio_list_empty(¤t->bio_list[1]))), | |
| 978 | 979 | conf->resync_lock); |
| 979 | 980 | conf->nr_waiting--; |
| 980 | 981 | if (!conf->nr_waiting) |
| @@ -1477,11 +1478,24 @@ retry_write: · 496 unmodified lines | ||
| 1477 | 1478 | mbio->bi_bdev = (void*)rdev; |
| 1478 | 1479 | |
| 1479 | 1480 | atomic_inc(&r10_bio->remaining); |
| 1481 | + | |
| 1482 | + cb = blk_check_plugged(raid10_unplug, mddev, | |
| 1483 | + sizeof(*plug)); | |
| 1484 | + if (cb) | |
| 1485 | + plug = container_of(cb, struct raid10_plug_cb, | |
| 1486 | + cb); | |
| 1487 | + else | |
| 1488 | + plug = NULL; | |
| 1480 | 1489 | spin_lock_irqsave(&conf->device_lock, flags); |
| 1481 | − bio_list_add(&conf->pending_bio_list, mbio); | |
| 1482 | − conf->pending_count++; | |
| 1490 | + if (plug) { | |
| 1491 | + bio_list_add(&plug->pending, mbio); | |
| 1492 | + plug->pending_cnt++; | |
| 1493 | + } else { | |
| 1494 | + bio_list_add(&conf->pending_bio_list, mbio); | |
| 1495 | + conf->pending_count++; | |
| 1496 | + } | |
| 1483 | 1497 | spin_unlock_irqrestore(&conf->device_lock, flags); |
| 1484 | − if (!mddev_check_plugged(mddev)) | |
| 1498 | + if (!plug) | |
| 1485 | 1499 | md_wakeup_thread(mddev->thread); |
| 1486 | 1500 | } |
| 1487 | 1501 | } |
| @@ -1571,7 +1585,25 @@ static void raid10_make_request(struct mddev *mddev, struct bio *bio) · 83 unmodified lines | ||
| 1571 | 1585 | split = bio; |
| 1572 | 1586 | } |
| 1573 | 1587 | |
| 1588 | + /* | |
| 1589 | + * If a bio is splitted, the first part of bio will pass | |
| 1590 | + * barrier but the bio is queued in current->bio_list (see | |
| 1591 | + * generic_make_request). If there is a raise_barrier() called | |
| 1592 | + * here, the second part of bio can't pass barrier. But since | |
| 1593 | + * the first part bio isn't dispatched to underlaying disks | |
| 1594 | + * yet, the barrier is never released, hence raise_barrier will | |
| 1595 | + * alays wait. We have a deadlock. | |
| 1596 | + * Note, this only happens in read path. For write path, the | |
| 1597 | + * first part of bio is dispatched in a schedule() call | |
| 1598 | + * (because of blk plug) or offloaded to raid10d. | |
| 1599 | + * Quitting from the function immediately can change the bio | |
| 1600 | + * order queued in bio_list and avoid the deadlock. | |
| 1601 | + */ | |
| 1574 | 1602 | __make_request(mddev, split); |
| 1603 | + if (split != bio && bio_data_dir(bio) == READ) { | |
| 1604 | + generic_make_request(bio); | |
| 1605 | + break; | |
| 1606 | + } | |
| 1575 | 1607 | } while (split != bio); |
| 1576 | 1608 | |
| 1577 | 1609 | /* In case raid10d snuck in to freeze_array */ |
| @@ -3943,10 +3975,6 @@ static int raid10_resize(struct mddev *mddev, sector_t sectors) · 2365 unmodified lines | ||
| 3943 | 3975 | return ret; |
| 3944 | 3976 | } |
| 3945 | 3977 | md_set_array_sectors(mddev, size); |
| 3946 | − if (mddev->queue) { | |
| 3947 | − set_capacity(mddev->gendisk, mddev->array_sectors); | |
| 3948 | − revalidate_disk(mddev->gendisk); | |
| 3949 | − } | |
| 3950 | 3978 | if (sectors > mddev->dev_sectors && |
| 3951 | 3979 | mddev->recovery_cp > oldsize) { |
| 3952 | 3980 | mddev->recovery_cp = oldsize; |
| @@ -1401,7 +1401,8 @@ static int set_syndrome_sources(struct page **srcs, · 1400 unmodified lines | ||
| 1401 | 1401 | (test_bit(R5_Wantdrain, &dev->flags) || |
| 1402 | 1402 | test_bit(R5_InJournal, &dev->flags))) || |
| 1403 | 1403 | (srctype == SYNDROME_SRC_WRITTEN && |
| 1404 | − dev->written)) { | |
| 1404 | + (dev->written || | |
| 1405 | + test_bit(R5_InJournal, &dev->flags)))) { | |
| 1405 | 1406 | if (test_bit(R5_InJournal, &dev->flags)) |
| 1406 | 1407 | srcs[slot] = sh->dev[i].orig_page; |
| 1407 | 1408 | else |
| @@ -7605,8 +7606,6 @@ static int raid5_resize(struct mddev *mddev, sector_t sectors) · 6197 unmodified lines | ||
| 7605 | 7606 | return ret; |
| 7606 | 7607 | } |
| 7607 | 7608 | md_set_array_sectors(mddev, newsize); |
| 7608 | − set_capacity(mddev->gendisk, mddev->array_sectors); | |
| 7609 | − revalidate_disk(mddev->gendisk); | |
| 7610 | 7609 | if (sectors > mddev->dev_sectors && |
| 7611 | 7610 | mddev->recovery_cp > mddev->dev_sectors) { |
| 7612 | 7611 | mddev->recovery_cp = mddev->dev_sectors; |
| @@ -321,7 +321,7 @@ static const struct of_device_id vdoa_dt_ids[] = { · 320 unmodified lines | ||
| 321 | 321 | }; |
| 322 | 322 | MODULE_DEVICE_TABLE(of, vdoa_dt_ids); |
| 323 | 323 | |
| 324 | −static const struct platform_driver vdoa_driver = { | |
| 324 | +static struct platform_driver vdoa_driver = { | |
| 325 | 325 | .probe = vdoa_probe, |
| 326 | 326 | .remove = vdoa_remove, |
| 327 | 327 | .driver = { |
| @@ -861,9 +861,7 @@ int gsc_prepare_addr(struct gsc_ctx *ctx, struct vb2_buffer *vb, · 860 unmodified lines | ||
| 861 | 861 | |
| 862 | 862 | if ((frame->fmt->pixelformat == V4L2_PIX_FMT_VYUY) || |
| 863 | 863 | (frame->fmt->pixelformat == V4L2_PIX_FMT_YVYU) || |
| 864 | − (frame->fmt->pixelformat == V4L2_PIX_FMT_NV61) || | |
| 865 | 864 | (frame->fmt->pixelformat == V4L2_PIX_FMT_YVU420) || |
| 866 | − (frame->fmt->pixelformat == V4L2_PIX_FMT_NV21) || | |
| 867 | 865 | (frame->fmt->pixelformat == V4L2_PIX_FMT_YVU420M)) |
| 868 | 866 | swap(addr->cb, addr->cr); |
| 869 | 867 | |
| @@ -632,8 +632,8 @@ static int bdisp_open(struct file *file) · 631 unmodified lines | ||
| 632 | 632 | |
| 633 | 633 | error_ctrls: |
| 634 | 634 | bdisp_ctrls_delete(ctx); |
| 635 | −error_fh: | |
| 636 | 635 | v4l2_fh_del(&ctx->fh); |
| 636 | +error_fh: | |
| 637 | 637 | v4l2_fh_exit(&ctx->fh); |
| 638 | 638 | bdisp_hw_free_nodes(ctx); |
| 639 | 639 | mem_ctx: |
| @@ -36,16 +36,18 @@ static int usb_cypress_writemem(struct usb_device *udev,u16 addr,u8 *data, u8 le · 35 unmodified lines | ||
| 36 | 36 | int usb_cypress_load_firmware(struct usb_device *udev, const struct firmware *fw, int type) |
| 37 | 37 | { |
| 38 | 38 | struct hexline *hx; |
| 39 | − u8 reset; | |
| 40 | − int ret,pos=0; | |
| 39 | + u8 *buf; | |
| 40 | + int ret, pos = 0; | |
| 41 | + u16 cpu_cs_register = cypress[type].cpu_cs_register; | |
| 41 | 42 | |
| 42 | − hx = kmalloc(sizeof(*hx), GFP_KERNEL); | |
| 43 | − if (!hx) | |
| 43 | + buf = kmalloc(sizeof(*hx), GFP_KERNEL); | |
| 44 | + if (!buf) | |
| 44 | 45 | return -ENOMEM; |
| 46 | + hx = (struct hexline *)buf; | |
| 45 | 47 | |
| 46 | 48 | /* stop the CPU */ |
| 47 | − reset = 1; | |
| 48 | − if ((ret = usb_cypress_writemem(udev,cypress[type].cpu_cs_register,&reset,1)) != 1) | |
| 49 | + buf[0] = 1; | |
| 50 | + if (usb_cypress_writemem(udev, cpu_cs_register, buf, 1) != 1) | |
| 49 | 51 | err("could not stop the USB controller CPU."); |
| 50 | 52 | |
| 51 | 53 | while ((ret = dvb_usb_get_hexline(fw, hx, &pos)) > 0) { |
| @@ -61,21 +63,21 @@ int usb_cypress_load_firmware(struct usb_device *udev, const struct firmware *fw · 9 unmodified lines | ||
| 61 | 63 | } |
| 62 | 64 | if (ret < 0) { |
| 63 | 65 | err("firmware download failed at %d with %d",pos,ret); |
| 64 | − kfree(hx); | |
| 66 | + kfree(buf); | |
| 65 | 67 | return ret; |
| 66 | 68 | } |
| 67 | 69 | |
| 68 | 70 | if (ret == 0) { |
| 69 | 71 | /* restart the CPU */ |
| 70 | − reset = 0; | |
| 71 | − if (ret || usb_cypress_writemem(udev,cypress[type].cpu_cs_register,&reset,1) != 1) { | |
| 72 | + buf[0] = 0; | |
| 73 | + if (usb_cypress_writemem(udev, cpu_cs_register, buf, 1) != 1) { | |
| 72 | 74 | err("could not restart the USB controller CPU."); |
| 73 | 75 | ret = -EINVAL; |
| 74 | 76 | } |
| 75 | 77 | } else |
| 76 | 78 | ret = -EIO; |
| 77 | 79 | |
| 78 | − kfree(hx); | |
| 80 | + kfree(buf); | |
| 79 | 81 | |
| 80 | 82 | return ret; |
| 81 | 83 | } |
| @@ -1947,9 +1947,7 @@ static int gpmc_probe_onenand_child(struct platform_device *pdev, · 1946 unmodified lines | ||
| 1947 | 1947 | if (!of_property_read_u32(child, "dma-channel", &val)) |
| 1948 | 1948 | gpmc_onenand_data->dma_channel = val; |
| 1949 | 1949 | |
| 1950 | − gpmc_onenand_init(gpmc_onenand_data); | |
| 1951 | − | |
| 1952 | − return 0; | |
| 1950 | + return gpmc_onenand_init(gpmc_onenand_data); | |
| 1953 | 1951 | } |
| 1954 | 1952 | #else |
| 1955 | 1953 | static int gpmc_probe_onenand_child(struct platform_device *pdev, |
| @@ -1792,15 +1792,14 @@ static pci_ers_result_t cxl_pci_error_detected(struct pci_dev *pdev, · 1791 unmodified lines | ||
| 1792 | 1792 | |
| 1793 | 1793 | /* If we're permanently dead, give up. */ |
| 1794 | 1794 | if (state == pci_channel_io_perm_failure) { |
| 1795 | − /* Tell the AFU drivers; but we don't care what they | |
| 1796 | − * say, we're going away. | |
| 1797 | − */ | |
| 1798 | 1795 | for (i = 0; i < adapter->slices; i++) { |
| 1799 | 1796 | afu = adapter->afu[i]; |
| 1800 | − /* Only participate in EEH if we are on a virtual PHB */ | |
| 1801 | − if (afu->phb == NULL) | |
| 1802 | − return PCI_ERS_RESULT_NONE; | |
| 1803 | − cxl_vphb_error_detected(afu, state); | |
| 1797 | + /* | |
| 1798 | + * Tell the AFU drivers; but we don't care what they | |
| 1799 | + * say, we're going away. | |
| 1800 | + */ | |
| 1801 | + if (afu->phb != NULL) | |
| 1802 | + cxl_vphb_error_detected(afu, state); | |
| 1804 | 1803 | } |
| 1805 | 1804 | return PCI_ERS_RESULT_DISCONNECT; |
| 1806 | 1805 | } |
| @@ -112,11 +112,9 @@ struct mkhi_msg { · 111 unmodified lines | ||
| 112 | 112 | |
| 113 | 113 | static int mei_osver(struct mei_cl_device *cldev) |
| 114 | 114 | { |
| 115 | − int ret; | |
| 116 | 115 | const size_t size = sizeof(struct mkhi_msg_hdr) + |
| 117 | 116 | sizeof(struct mkhi_fwcaps) + |
| 118 | 117 | sizeof(struct mei_os_ver); |
| 119 | − size_t length = 8; | |
| 120 | 118 | char buf[size]; |
| 121 | 119 | struct mkhi_msg *req; |
| 122 | 120 | struct mkhi_fwcaps *fwcaps; |
| @@ -137,15 +135,7 @@ static int mei_osver(struct mei_cl_device *cldev) · 14 unmodified lines | ||
| 137 | 135 | os_ver = (struct mei_os_ver *)fwcaps->data; |
| 138 | 136 | os_ver->os_type = OSTYPE_LINUX; |
| 139 | 137 | |
| 140 | − ret = __mei_cl_send(cldev->cl, buf, size, mode); | |
| 141 | − if (ret < 0) | |
| 142 | − return ret; | |
| 143 | − | |
| 144 | − ret = __mei_cl_recv(cldev->cl, buf, length, 0); | |
| 145 | − if (ret < 0) | |
| 146 | − return ret; | |
| 147 | − | |
| 148 | − return 0; | |
| 138 | + return __mei_cl_send(cldev->cl, buf, size, mode); | |
| 149 | 139 | } |
| 150 | 140 | |
| 151 | 141 | static void mei_mkhi_fix(struct mei_cl_device *cldev) |
| @@ -160,7 +150,7 @@ static void mei_mkhi_fix(struct mei_cl_device *cldev) · 8 unmodified lines | ||
| 160 | 150 | return; |
| 161 | 151 | |
| 162 | 152 | ret = mei_osver(cldev); |
| 163 | − if (ret) | |
| 153 | + if (ret < 0) | |
| 164 | 154 | dev_err(&cldev->dev, "OS version command failed %d\n", ret); |
| 165 | 155 | |
| 166 | 156 | mei_cldev_disable(cldev); |
| @@ -124,8 +124,6 @@ int mei_reset(struct mei_device *dev) · 123 unmodified lines | ||
| 124 | 124 | |
| 125 | 125 | mei_clear_interrupts(dev); |
| 126 | 126 | |
| 127 | − mei_synchronize_irq(dev); | |
| 128 | − | |
| 129 | 127 | /* we're already in reset, cancel the init timer |
| 130 | 128 | * if the reset was called due the hbm protocol error |
| 131 | 129 | * we need to call it before hw start |
| @@ -304,6 +302,9 @@ static void mei_reset_work(struct work_struct *work) · 172 unmodified lines | ||
| 304 | 302 | container_of(work, struct mei_device, reset_work); |
| 305 | 303 | int ret; |
| 306 | 304 | |
| 305 | + mei_clear_interrupts(dev); | |
| 306 | + mei_synchronize_irq(dev); | |
| 307 | + | |
| 307 | 308 | mutex_lock(&dev->device_lock); |
| 308 | 309 | |
| 309 | 310 | ret = mei_reset(dev); |
| @@ -328,6 +329,9 @@ void mei_stop(struct mei_device *dev) · 18 unmodified lines | ||
| 328 | 329 | |
| 329 | 330 | mei_cancel_work(dev); |
| 330 | 331 | |
| 332 | + mei_clear_interrupts(dev); | |
| 333 | + mei_synchronize_irq(dev); | |
| 334 | + | |
| 331 | 335 | mutex_lock(&dev->device_lock); |
| 332 | 336 | |
| 333 | 337 | dev->dev_state = MEI_DEV_POWER_DOWN; |
| @@ -566,10 +566,10 @@ static int vmci_guest_probe_device(struct pci_dev *pdev, · 565 unmodified lines | ||
| 566 | 566 | */ |
| 567 | 567 | error = pci_alloc_irq_vectors(pdev, VMCI_MAX_INTRS, VMCI_MAX_INTRS, |
| 568 | 568 | PCI_IRQ_MSIX); |
| 569 | − if (error) { | |
| 569 | + if (error < 0) { | |
| 570 | 570 | error = pci_alloc_irq_vectors(pdev, 1, 1, |
| 571 | 571 | PCI_IRQ_MSIX | PCI_IRQ_MSI | PCI_IRQ_LEGACY); |
| 572 | − if (error) | |
| 572 | + if (error < 0) | |
| 573 | 573 | goto err_remove_bitmap; |
| 574 | 574 | } else { |
| 575 | 575 | vmci_dev->exclusive_vectors = true; |
| @@ -1560,11 +1560,8 @@ static bool mmc_blk_rw_cmd_err(struct mmc_blk_data *md, struct mmc_card *card, · 1559 unmodified lines | ||
| 1560 | 1560 | struct mmc_blk_request *brq, struct request *req, |
| 1561 | 1561 | bool old_req_pending) |
| 1562 | 1562 | { |
| 1563 | − struct mmc_queue_req *mq_rq; | |
| 1564 | 1563 | bool req_pending; |
| 1565 | 1564 | |
| 1566 | − mq_rq = container_of(brq, struct mmc_queue_req, brq); | |
| 1567 | − | |
| 1568 | 1565 | /* |
| 1569 | 1566 | * If this is an SD card and we're writing, we can first |
| 1570 | 1567 | * mark the known good sectors as ok. |
| @@ -1701,7 +1698,8 @@ static void mmc_blk_issue_rw_rq(struct mmc_queue *mq, struct request *new_req) · 130 unmodified lines | ||
| 1701 | 1698 | case MMC_BLK_CMD_ERR: |
| 1702 | 1699 | req_pending = mmc_blk_rw_cmd_err(md, card, brq, old_req, req_pending); |
| 1703 | 1700 | if (mmc_blk_reset(md, card->host, type)) { |
| 1704 | − mmc_blk_rw_cmd_abort(card, old_req); | |
| 1701 | + if (req_pending) | |
| 1702 | + mmc_blk_rw_cmd_abort(card, old_req); | |
| 1705 | 1703 | mmc_blk_rw_try_restart(mq, new_req); |
| 1706 | 1704 | return; |
| 1707 | 1705 | } |
| @@ -1817,6 +1815,7 @@ void mmc_blk_issue_rq(struct mmc_queue *mq, struct request *req) · 109 unmodified lines | ||
| 1817 | 1815 | mmc_blk_issue_flush(mq, req); |
| 1818 | 1816 | } else { |
| 1819 | 1817 | mmc_blk_issue_rw_rq(mq, req); |
| 1818 | + card->host->context_info.is_waiting_last_req = false; | |
| 1820 | 1819 | } |
| 1821 | 1820 | |
| 1822 | 1821 | out: |
| @@ -1730,7 +1730,7 @@ static int mmc_init_card(struct mmc_host *host, u32 ocr, · 1729 unmodified lines | ||
| 1730 | 1730 | err = mmc_select_hs400(card); |
| 1731 | 1731 | if (err) |
| 1732 | 1732 | goto free_card; |
| 1733 | − } else { | |
| 1733 | + } else if (!mmc_card_hs400es(card)) { | |
| 1734 | 1734 | /* Select the desired bus width optionally */ |
| 1735 | 1735 | err = mmc_select_bus_width(card); |
| 1736 | 1736 | if (err > 0 && mmc_card_hs(card)) { |
| @@ -580,7 +580,7 @@ static void msdc_set_mclk(struct msdc_host *host, unsigned char timing, u32 hz) · 579 unmodified lines | ||
| 580 | 580 | } |
| 581 | 581 | } |
| 582 | 582 | sdr_set_field(host->base + MSDC_CFG, MSDC_CFG_CKMOD | MSDC_CFG_CKDIV, |
| 583 | − (mode << 8) | (div % 0xff)); | |
| 583 | + (mode << 8) | div); | |
| 584 | 584 | sdr_set_bits(host->base + MSDC_CFG, MSDC_CFG_CKPDN); |
| 585 | 585 | while (!(readl(host->base + MSDC_CFG) & MSDC_CFG_CKSTB)) |
| 586 | 586 | cpu_relax(); |
| @@ -1559,7 +1559,7 @@ static int msdc_drv_probe(struct platform_device *pdev) · 972 unmodified lines | ||
| 1559 | 1559 | host->src_clk_freq = clk_get_rate(host->src_clk); |
| 1560 | 1560 | /* Set host parameters to mmc */ |
| 1561 | 1561 | mmc->ops = &mt_msdc_ops; |
| 1562 | − mmc->f_min = host->src_clk_freq / (4 * 255); | |
| 1562 | + mmc->f_min = DIV_ROUND_UP(host->src_clk_freq, 4 * 255); | |
| 1563 | 1563 | |
| 1564 | 1564 | mmc->caps |= MMC_CAP_ERASE | MMC_CAP_CMD23; |
| 1565 | 1565 | /* MMC core transfer sizes tunable parameters */ |
| @@ -28,13 +28,9 @@ · 27 unmodified lines | ||
| 28 | 28 | #include "sdhci-pltfm.h" |
| 29 | 29 | #include <linux/of.h> |
| 30 | 30 | |
| 31 | −#define SDHCI_ARASAN_CLK_CTRL_OFFSET 0x2c | |
| 32 | 31 | #define SDHCI_ARASAN_VENDOR_REGISTER 0x78 |
| 33 | 32 | |
| 34 | 33 | #define VENDOR_ENHANCED_STROBE BIT(0) |
| 35 | −#define CLK_CTRL_TIMEOUT_SHIFT 16 | |
| 36 | −#define CLK_CTRL_TIMEOUT_MASK (0xf << CLK_CTRL_TIMEOUT_SHIFT) | |
| 37 | −#define CLK_CTRL_TIMEOUT_MIN_EXP 13 | |
| 38 | 34 | |
| 39 | 35 | #define PHY_CLK_TOO_SLOW_HZ 400000 |
| 40 | 36 | |
| @@ -163,15 +159,15 @@ static int sdhci_arasan_syscon_write(struct sdhci_host *host, · 122 unmodified lines | ||
| 163 | 159 | |
| 164 | 160 | static unsigned int sdhci_arasan_get_timeout_clock(struct sdhci_host *host) |
| 165 | 161 | { |
| 166 | − u32 div; | |
| 167 | 162 | unsigned long freq; |
| 168 | 163 | struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); |
| 169 | 164 | |
| 170 | − div = readl(host->ioaddr + SDHCI_ARASAN_CLK_CTRL_OFFSET); | |
| 171 | − div = (div & CLK_CTRL_TIMEOUT_MASK) >> CLK_CTRL_TIMEOUT_SHIFT; | |
| 165 | + /* SDHCI timeout clock is in kHz */ | |
| 166 | + freq = DIV_ROUND_UP(clk_get_rate(pltfm_host->clk), 1000); | |
| 172 | 167 | |
| 173 | − freq = clk_get_rate(pltfm_host->clk); | |
| 174 | − freq /= 1 << (CLK_CTRL_TIMEOUT_MIN_EXP + div); | |
| 168 | + /* or in MHz */ | |
| 169 | + if (host->caps & SDHCI_TIMEOUT_CLK_UNIT) | |
| 170 | + freq = DIV_ROUND_UP(freq, 1000); | |
| 175 | 171 | |
| 176 | 172 | return freq; |
| 177 | 173 | } |
| @@ -85,11 +85,30 @@ static void sdhci_at91_set_clock(struct sdhci_host *host, unsigned int clock) · 84 unmodified lines | ||
| 85 | 85 | sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL); |
| 86 | 86 | } |
| 87 | 87 | |
| 88 | +/* | |
| 89 | + * In this specific implementation of the SDHCI controller, the power register | |
| 90 | + * needs to have a valid voltage set even when the power supply is managed by | |
| 91 | + * an external regulator. | |
| 92 | + */ | |
| 93 | +static void sdhci_at91_set_power(struct sdhci_host *host, unsigned char mode, | |
| 94 | + unsigned short vdd) | |
| 95 | +{ | |
| 96 | + if (!IS_ERR(host->mmc->supply.vmmc)) { | |
| 97 | + struct mmc_host *mmc = host->mmc; | |
| 98 | + | |
| 99 | + spin_unlock_irq(&host->lock); | |
| 100 | + mmc_regulator_set_ocr(mmc, mmc->supply.vmmc, vdd); | |
| 101 | + spin_lock_irq(&host->lock); | |
| 102 | + } | |
| 103 | + sdhci_set_power_noreg(host, mode, vdd); | |
| 104 | +} | |
| 105 | + | |
| 88 | 106 | static const struct sdhci_ops sdhci_at91_sama5d2_ops = { |
| 89 | 107 | .set_clock = sdhci_at91_set_clock, |
| 90 | 108 | .set_bus_width = sdhci_set_bus_width, |
| 91 | 109 | .reset = sdhci_reset, |
| 92 | 110 | .set_uhs_signaling = sdhci_set_uhs_signaling, |
| 111 | + .set_power = sdhci_at91_set_power, | |
| 93 | 112 | }; |
| 94 | 113 | |
| 95 | 114 | static const struct sdhci_pltfm_data soc_data_sama5d2 = { |
| @@ -451,6 +451,8 @@ static void sdhci_intel_set_power(struct sdhci_host *host, unsigned char mode, · 450 unmodified lines | ||
| 451 | 451 | if (mode == MMC_POWER_OFF) |
| 452 | 452 | return; |
| 453 | 453 | |
| 454 | + spin_unlock_irq(&host->lock); | |
| 455 | + | |
| 454 | 456 | /* |
| 455 | 457 | * Bus power might not enable after D3 -> D0 transition due to the |
| 456 | 458 | * present state not yet having propagated. Retry for up to 2ms. |
| @@ -463,6 +465,8 @@ static void sdhci_intel_set_power(struct sdhci_host *host, unsigned char mode, · 6 unmodified lines | ||
| 463 | 465 | reg |= SDHCI_POWER_ON; |
| 464 | 466 | sdhci_writeb(host, reg, SDHCI_POWER_CONTROL); |
| 465 | 467 | } |
| 468 | + | |
| 469 | + spin_lock_irq(&host->lock); | |
| 466 | 470 | } |
| 467 | 471 | |
| 468 | 472 | static const struct sdhci_ops sdhci_intel_byt_ops = { |
| @@ -1362,7 +1362,9 @@ void sdhci_enable_clk(struct sdhci_host *host, u16 clk) · 1361 unmodified lines | ||
| 1362 | 1362 | return; |
| 1363 | 1363 | } |
| 1364 | 1364 | timeout--; |
| 1365 | − mdelay(1); | |
| 1365 | + spin_unlock_irq(&host->lock); | |
| 1366 | + usleep_range(900, 1100); | |
| 1367 | + spin_lock_irq(&host->lock); | |
| 1366 | 1368 | } |
| 1367 | 1369 | |
| 1368 | 1370 | clk |= SDHCI_CLOCK_CARD_EN; |
| @@ -426,6 +426,9 @@ static int ushc_probe(struct usb_interface *intf, const struct usb_device_id *id · 425 unmodified lines | ||
| 426 | 426 | struct ushc_data *ushc; |
| 427 | 427 | int ret; |
| 428 | 428 | |
| 429 | + if (intf->cur_altsetting->desc.bNumEndpoints < 1) | |
| 430 | + return -ENODEV; | |
| 431 | + | |
| 429 | 432 | mmc = mmc_alloc_host(sizeof(struct ushc_data), &intf->dev); |
| 430 | 433 | if (mmc == NULL) |
| 431 | 434 | return -ENOMEM; |
| @@ -984,29 +984,29 @@ · 983 unmodified lines | ||
| 984 | 984 | #define XP_ECC_CNT1_DESC_DED_WIDTH 8 |
| 985 | 985 | #define XP_ECC_CNT1_DESC_SEC_INDEX 0 |
| 986 | 986 | #define XP_ECC_CNT1_DESC_SEC_WIDTH 8 |
| 987 | −#define XP_ECC_IER_DESC_DED_INDEX 0 | |
| 987 | +#define XP_ECC_IER_DESC_DED_INDEX 5 | |
| 988 | 988 | #define XP_ECC_IER_DESC_DED_WIDTH 1 |
| 989 | −#define XP_ECC_IER_DESC_SEC_INDEX 1 | |
| 989 | +#define XP_ECC_IER_DESC_SEC_INDEX 4 | |
| 990 | 990 | #define XP_ECC_IER_DESC_SEC_WIDTH 1 |
| 991 | −#define XP_ECC_IER_RX_DED_INDEX 2 | |
| 991 | +#define XP_ECC_IER_RX_DED_INDEX 3 | |
| 992 | 992 | #define XP_ECC_IER_RX_DED_WIDTH 1 |
| 993 | −#define XP_ECC_IER_RX_SEC_INDEX 3 | |
| 993 | +#define XP_ECC_IER_RX_SEC_INDEX 2 | |
| 994 | 994 | #define XP_ECC_IER_RX_SEC_WIDTH 1 |
| 995 | −#define XP_ECC_IER_TX_DED_INDEX 4 | |
| 995 | +#define XP_ECC_IER_TX_DED_INDEX 1 | |
| 996 | 996 | #define XP_ECC_IER_TX_DED_WIDTH 1 |
| 997 | −#define XP_ECC_IER_TX_SEC_INDEX 5 | |
| 997 | +#define XP_ECC_IER_TX_SEC_INDEX 0 | |
| 998 | 998 | #define XP_ECC_IER_TX_SEC_WIDTH 1 |
| 999 | −#define XP_ECC_ISR_DESC_DED_INDEX 0 | |
| 999 | +#define XP_ECC_ISR_DESC_DED_INDEX 5 | |
| 1000 | 1000 | #define XP_ECC_ISR_DESC_DED_WIDTH 1 |
| 1001 | −#define XP_ECC_ISR_DESC_SEC_INDEX 1 | |
| 1001 | +#define XP_ECC_ISR_DESC_SEC_INDEX 4 | |
| 1002 | 1002 | #define XP_ECC_ISR_DESC_SEC_WIDTH 1 |
| 1003 | −#define XP_ECC_ISR_RX_DED_INDEX 2 | |
| 1003 | +#define XP_ECC_ISR_RX_DED_INDEX 3 | |
| 1004 | 1004 | #define XP_ECC_ISR_RX_DED_WIDTH 1 |
| 1005 | −#define XP_ECC_ISR_RX_SEC_INDEX 3 | |
| 1005 | +#define XP_ECC_ISR_RX_SEC_INDEX 2 | |
| 1006 | 1006 | #define XP_ECC_ISR_RX_SEC_WIDTH 1 |
| 1007 | −#define XP_ECC_ISR_TX_DED_INDEX 4 | |
| 1007 | +#define XP_ECC_ISR_TX_DED_INDEX 1 | |
| 1008 | 1008 | #define XP_ECC_ISR_TX_DED_WIDTH 1 |
| 1009 | −#define XP_ECC_ISR_TX_SEC_INDEX 5 | |
| 1009 | +#define XP_ECC_ISR_TX_SEC_INDEX 0 | |
| 1010 | 1010 | #define XP_ECC_ISR_TX_SEC_WIDTH 1 |
| 1011 | 1011 | #define XP_I2C_MUTEX_BUSY_INDEX 31 |
| 1012 | 1012 | #define XP_I2C_MUTEX_BUSY_WIDTH 1 |
| @@ -1148,8 +1148,8 @@ · 135 unmodified lines | ||
| 1148 | 1148 | #define RX_PACKET_ATTRIBUTES_CSUM_DONE_WIDTH 1 |
| 1149 | 1149 | #define RX_PACKET_ATTRIBUTES_VLAN_CTAG_INDEX 1 |
| 1150 | 1150 | #define RX_PACKET_ATTRIBUTES_VLAN_CTAG_WIDTH 1 |
| 1151 | −#define RX_PACKET_ATTRIBUTES_INCOMPLETE_INDEX 2 | |
| 1152 | −#define RX_PACKET_ATTRIBUTES_INCOMPLETE_WIDTH 1 | |
| 1151 | +#define RX_PACKET_ATTRIBUTES_LAST_INDEX 2 | |
| 1152 | +#define RX_PACKET_ATTRIBUTES_LAST_WIDTH 1 | |
| 1153 | 1153 | #define RX_PACKET_ATTRIBUTES_CONTEXT_NEXT_INDEX 3 |
| 1154 | 1154 | #define RX_PACKET_ATTRIBUTES_CONTEXT_NEXT_WIDTH 1 |
| 1155 | 1155 | #define RX_PACKET_ATTRIBUTES_CONTEXT_INDEX 4 |
| @@ -1158,6 +1158,8 @@ · 2 unmodified lines | ||
| 1158 | 1158 | #define RX_PACKET_ATTRIBUTES_RX_TSTAMP_WIDTH 1 |
| 1159 | 1159 | #define RX_PACKET_ATTRIBUTES_RSS_HASH_INDEX 6 |
| 1160 | 1160 | #define RX_PACKET_ATTRIBUTES_RSS_HASH_WIDTH 1 |
| 1161 | +#define RX_PACKET_ATTRIBUTES_FIRST_INDEX 7 | |
| 1162 | +#define RX_PACKET_ATTRIBUTES_FIRST_WIDTH 1 | |
| 1161 | 1163 | |
| 1162 | 1164 | #define RX_NORMAL_DESC0_OVT_INDEX 0 |
| 1163 | 1165 | #define RX_NORMAL_DESC0_OVT_WIDTH 16 |
| @@ -1896,10 +1896,15 @@ static int xgbe_dev_read(struct xgbe_channel *channel) · 1895 unmodified lines | ||
| 1896 | 1896 | |
| 1897 | 1897 | /* Get the header length */ |
| 1898 | 1898 | if (XGMAC_GET_BITS_LE(rdesc->desc3, RX_NORMAL_DESC3, FD)) { |
| 1899 | + XGMAC_SET_BITS(packet->attributes, RX_PACKET_ATTRIBUTES, | |
| 1900 | + FIRST, 1); | |
| 1899 | 1901 | rdata->rx.hdr_len = XGMAC_GET_BITS_LE(rdesc->desc2, |
| 1900 | 1902 | RX_NORMAL_DESC2, HL); |
| 1901 | 1903 | if (rdata->rx.hdr_len) |
| 1902 | 1904 | pdata->ext_stats.rx_split_header_packets++; |
| 1905 | + } else { | |
| 1906 | + XGMAC_SET_BITS(packet->attributes, RX_PACKET_ATTRIBUTES, | |
| 1907 | + FIRST, 0); | |
| 1903 | 1908 | } |
| 1904 | 1909 | |
| 1905 | 1910 | /* Get the RSS hash */ |
| @@ -1922,19 +1927,16 @@ static int xgbe_dev_read(struct xgbe_channel *channel) · 16 unmodified lines | ||
| 1922 | 1927 | } |
| 1923 | 1928 | } |
| 1924 | 1929 | |
| 1925 | − /* Get the packet length */ | |
| 1926 | − rdata->rx.len = XGMAC_GET_BITS_LE(rdesc->desc3, RX_NORMAL_DESC3, PL); | |
| 1927 | − | |
| 1928 | − if (!XGMAC_GET_BITS_LE(rdesc->desc3, RX_NORMAL_DESC3, LD)) { | |
| 1929 | − /* Not all the data has been transferred for this packet */ | |
| 1930 | − XGMAC_SET_BITS(packet->attributes, RX_PACKET_ATTRIBUTES, | |
| 1931 | − INCOMPLETE, 1); | |
| 1930 | + /* Not all the data has been transferred for this packet */ | |
| 1931 | + if (!XGMAC_GET_BITS_LE(rdesc->desc3, RX_NORMAL_DESC3, LD)) | |
| 1932 | 1932 | return 0; |
| 1933 | − } | |
| 1934 | 1933 | |
| 1935 | 1934 | /* This is the last of the data for this packet */ |
| 1936 | 1935 | XGMAC_SET_BITS(packet->attributes, RX_PACKET_ATTRIBUTES, |
| 1937 | − INCOMPLETE, 0); | |
| 1936 | + LAST, 1); | |
| 1937 | + | |
| 1938 | + /* Get the packet length */ | |
| 1939 | + rdata->rx.len = XGMAC_GET_BITS_LE(rdesc->desc3, RX_NORMAL_DESC3, PL); | |
| 1938 | 1940 | |
| 1939 | 1941 | /* Set checksum done indicator as appropriate */ |
| 1940 | 1942 | if (netdev->features & NETIF_F_RXCSUM) |
| @@ -1971,13 +1971,12 @@ static struct sk_buff *xgbe_create_skb(struct xgbe_prv_data *pdata, · 1970 unmodified lines | ||
| 1971 | 1971 | { |
| 1972 | 1972 | struct sk_buff *skb; |
| 1973 | 1973 | u8 *packet; |
| 1974 | − unsigned int copy_len; | |
| 1975 | 1974 | |
| 1976 | 1975 | skb = napi_alloc_skb(napi, rdata->rx.hdr.dma_len); |
| 1977 | 1976 | if (!skb) |
| 1978 | 1977 | return NULL; |
| 1979 | 1978 | |
| 1980 | − /* Start with the header buffer which may contain just the header | |
| 1979 | + /* Pull in the header buffer which may contain just the header | |
| 1981 | 1980 | * or the header plus data |
| 1982 | 1981 | */ |
| 1983 | 1982 | dma_sync_single_range_for_cpu(pdata->dev, rdata->rx.hdr.dma_base, |
| @@ -1986,30 +1985,49 @@ static struct sk_buff *xgbe_create_skb(struct xgbe_prv_data *pdata, · 2 unmodified lines | ||
| 1986 | 1985 | |
| 1987 | 1986 | packet = page_address(rdata->rx.hdr.pa.pages) + |
| 1988 | 1987 | rdata->rx.hdr.pa.pages_offset; |
| 1989 | − copy_len = (rdata->rx.hdr_len) ? rdata->rx.hdr_len : len; | |
| 1990 | − copy_len = min(rdata->rx.hdr.dma_len, copy_len); | |
| 1991 | − skb_copy_to_linear_data(skb, packet, copy_len); | |
| 1992 | − skb_put(skb, copy_len); | |
| 1993 | − | |
| 1994 | − len -= copy_len; | |
| 1995 | − if (len) { | |
| 1996 | − /* Add the remaining data as a frag */ | |
| 1997 | − dma_sync_single_range_for_cpu(pdata->dev, | |
| 1998 | − rdata->rx.buf.dma_base, | |
| 1999 | − rdata->rx.buf.dma_off, | |
| 2000 | − rdata->rx.buf.dma_len, | |
| 2001 | − DMA_FROM_DEVICE); | |
| 2002 | − | |
| 2003 | − skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, | |
| 2004 | − rdata->rx.buf.pa.pages, | |
| 2005 | − rdata->rx.buf.pa.pages_offset, | |
| 2006 | − len, rdata->rx.buf.dma_len); | |
| 2007 | − rdata->rx.buf.pa.pages = NULL; | |
| 2008 | − } | |
| 1988 | + skb_copy_to_linear_data(skb, packet, len); | |
| 1989 | + skb_put(skb, len); | |
| 2009 | 1990 | |
| 2010 | 1991 | return skb; |
| 2011 | 1992 | } |
| 2012 | 1993 | |
| 1994 | +static unsigned int xgbe_rx_buf1_len(struct xgbe_ring_data *rdata, | |
| 1995 | + struct xgbe_packet_data *packet) | |
| 1996 | +{ | |
| 1997 | + /* Always zero if not the first descriptor */ | |
| 1998 | + if (!XGMAC_GET_BITS(packet->attributes, RX_PACKET_ATTRIBUTES, FIRST)) | |
| 1999 | + return 0; | |
| 2000 | + | |
| 2001 | + /* First descriptor with split header, return header length */ | |
| 2002 | + if (rdata->rx.hdr_len) | |
| 2003 | + return rdata->rx.hdr_len; | |
| 2004 | + | |
| 2005 | + /* First descriptor but not the last descriptor and no split header, | |
| 2006 | + * so the full buffer was used | |
| 2007 | + */ | |
| 2008 | + if (!XGMAC_GET_BITS(packet->attributes, RX_PACKET_ATTRIBUTES, LAST)) | |
| 2009 | + return rdata->rx.hdr.dma_len; | |
| 2010 | + | |
| 2011 | + /* First descriptor and last descriptor and no split header, so | |
| 2012 | + * calculate how much of the buffer was used | |
| 2013 | + */ | |
| 2014 | + return min_t(unsigned int, rdata->rx.hdr.dma_len, rdata->rx.len); | |
| 2015 | +} | |
| 2016 | + | |
| 2017 | +static unsigned int xgbe_rx_buf2_len(struct xgbe_ring_data *rdata, | |
| 2018 | + struct xgbe_packet_data *packet, | |
| 2019 | + unsigned int len) | |
| 2020 | +{ | |
| 2021 | + /* Always the full buffer if not the last descriptor */ | |
| 2022 | + if (!XGMAC_GET_BITS(packet->attributes, RX_PACKET_ATTRIBUTES, LAST)) | |
| 2023 | + return rdata->rx.buf.dma_len; | |
| 2024 | + | |
| 2025 | + /* Last descriptor so calculate how much of the buffer was used | |
| 2026 | + * for the last bit of data | |
| 2027 | + */ | |
| 2028 | + return rdata->rx.len - len; | |
| 2029 | +} | |
| 2030 | + | |
| 2013 | 2031 | static int xgbe_tx_poll(struct xgbe_channel *channel) |
| 2014 | 2032 | { |
| 2015 | 2033 | struct xgbe_prv_data *pdata = channel->pdata; |
| @@ -2092,8 +2110,8 @@ static int xgbe_rx_poll(struct xgbe_channel *channel, int budget) · 76 unmodified lines | ||
| 2092 | 2110 | struct napi_struct *napi; |
| 2093 | 2111 | struct sk_buff *skb; |
| 2094 | 2112 | struct skb_shared_hwtstamps *hwtstamps; |
| 2095 | − unsigned int incomplete, error, context_next, context; | |
| 2096 | − unsigned int len, rdesc_len, max_len; | |
| 2113 | + unsigned int last, error, context_next, context; | |
| 2114 | + unsigned int len, buf1_len, buf2_len, max_len; | |
| 2097 | 2115 | unsigned int received = 0; |
| 2098 | 2116 | int packet_count = 0; |
| 2099 | 2117 | |
| @@ -2103,7 +2121,7 @@ static int xgbe_rx_poll(struct xgbe_channel *channel, int budget) · 3 unmodified lines | ||
| 2103 | 2121 | if (!ring) |
| 2104 | 2122 | return 0; |
| 2105 | 2123 | |
| 2106 | − incomplete = 0; | |
| 2124 | + last = 0; | |
| 2107 | 2125 | context_next = 0; |
| 2108 | 2126 | |
| 2109 | 2127 | napi = (pdata->per_channel_irq) ? &channel->napi : &pdata->napi; |
| @@ -2137,9 +2155,8 @@ read_again: · 27 unmodified lines | ||
| 2137 | 2155 | received++; |
| 2138 | 2156 | ring->cur++; |
| 2139 | 2157 | |
| 2140 | − incomplete = XGMAC_GET_BITS(packet->attributes, | |
| 2141 | − RX_PACKET_ATTRIBUTES, | |
| 2142 | − INCOMPLETE); | |
| 2158 | + last = XGMAC_GET_BITS(packet->attributes, RX_PACKET_ATTRIBUTES, | |
| 2159 | + LAST); | |
| 2143 | 2160 | context_next = XGMAC_GET_BITS(packet->attributes, |
| 2144 | 2161 | RX_PACKET_ATTRIBUTES, |
| 2145 | 2162 | CONTEXT_NEXT); |
| @@ -2148,7 +2165,7 @@ read_again: · 2 unmodified lines | ||
| 2148 | 2165 | CONTEXT); |
| 2149 | 2166 | |
| 2150 | 2167 | /* Earlier error, just drain the remaining data */ |
| 2151 | − if ((incomplete || context_next) && error) | |
| 2168 | + if ((!last || context_next) && error) | |
| 2152 | 2169 | goto read_again; |
| 2153 | 2170 | |
| 2154 | 2171 | if (error || packet->errors) { |
| @@ -2160,16 +2177,22 @@ read_again: · 5 unmodified lines | ||
| 2160 | 2177 | } |
| 2161 | 2178 | |
| 2162 | 2179 | if (!context) { |
| 2163 | − /* Length is cumulative, get this descriptor's length */ | |
| 2164 | − rdesc_len = rdata->rx.len - len; | |
| 2165 | − len += rdesc_len; | |
| 2180 | + /* Get the data length in the descriptor buffers */ | |
| 2181 | + buf1_len = xgbe_rx_buf1_len(rdata, packet); | |
| 2182 | + len += buf1_len; | |
| 2183 | + buf2_len = xgbe_rx_buf2_len(rdata, packet, len); | |
| 2184 | + len += buf2_len; | |
| 2166 | 2185 | |
| 2167 | − if (rdesc_len && !skb) { | |
| 2186 | + if (!skb) { | |
| 2168 | 2187 | skb = xgbe_create_skb(pdata, napi, rdata, |
| 2169 | − rdesc_len); | |
| 2170 | − if (!skb) | |
| 2188 | + buf1_len); | |
| 2189 | + if (!skb) { | |
| 2171 | 2190 | error = 1; |
| 2172 | − } else if (rdesc_len) { | |
| 2191 | + goto skip_data; | |
| 2192 | + } | |
| 2193 | + } | |
| 2194 | + | |
| 2195 | + if (buf2_len) { | |
| 2173 | 2196 | dma_sync_single_range_for_cpu(pdata->dev, |
| 2174 | 2197 | rdata->rx.buf.dma_base, |
| 2175 | 2198 | rdata->rx.buf.dma_off, |
| @@ -2179,13 +2202,14 @@ read_again: · 3 unmodified lines | ||
| 2179 | 2202 | skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, |
| 2180 | 2203 | rdata->rx.buf.pa.pages, |
| 2181 | 2204 | rdata->rx.buf.pa.pages_offset, |
| 2182 | − rdesc_len, | |
| 2205 | + buf2_len, | |
| 2183 | 2206 | rdata->rx.buf.dma_len); |
| 2184 | 2207 | rdata->rx.buf.pa.pages = NULL; |
| 2185 | 2208 | } |
| 2186 | 2209 | } |
| 2187 | 2210 | |
| 2188 | − if (incomplete || context_next) | |
| 2211 | +skip_data: | |
| 2212 | + if (!last || context_next) | |
| 2189 | 2213 | goto read_again; |
| 2190 | 2214 | |
| 2191 | 2215 | if (!skb) |
| @@ -2243,7 +2267,7 @@ next_packet: · 51 unmodified lines | ||
| 2243 | 2267 | } |
| 2244 | 2268 | |
| 2245 | 2269 | /* Check if we need to save state before leaving */ |
| 2246 | − if (received && (incomplete || context_next)) { | |
| 2270 | + if (received && (!last || context_next)) { | |
| 2247 | 2271 | rdata = XGBE_GET_DESC_DATA(ring, ring->cur); |
| 2248 | 2272 | rdata->state_saved = 1; |
| 2249 | 2273 | rdata->state.skb = skb; |
| @@ -2272,10 +2296,7 @@ static int xgbe_one_poll(struct napi_struct *napi, int budget) · 22 unmodified lines | ||
| 2272 | 2296 | processed = xgbe_rx_poll(channel, budget); |
| 2273 | 2297 | |
| 2274 | 2298 | /* If we processed everything, we are done */ |
| 2275 | − if (processed < budget) { | |
| 2276 | − /* Turn off polling */ | |
| 2277 | − napi_complete_done(napi, processed); | |
| 2278 | − | |
| 2299 | + if ((processed < budget) && napi_complete_done(napi, processed)) { | |
| 2279 | 2300 | /* Enable Tx and Rx interrupts */ |
| 2280 | 2301 | if (pdata->channel_irq_mode) |
| 2281 | 2302 | xgbe_enable_rx_tx_int(pdata, channel); |
| @@ -2317,10 +2338,7 @@ static int xgbe_all_poll(struct napi_struct *napi, int budget) · 35 unmodified lines | ||
| 2317 | 2338 | } while ((processed < budget) && (processed != last_processed)); |
| 2318 | 2339 | |
| 2319 | 2340 | /* If we processed everything, we are done */ |
| 2320 | − if (processed < budget) { | |
| 2321 | − /* Turn off polling */ | |
| 2322 | − napi_complete_done(napi, processed); | |
| 2323 | − | |
| 2341 | + if ((processed < budget) && napi_complete_done(napi, processed)) { | |
| 2324 | 2342 | /* Enable Tx and Rx interrupts */ |
| 2325 | 2343 | xgbe_enable_rx_tx_ints(pdata); |
| 2326 | 2344 | } |
| @@ -98,6 +98,7 @@ static int aq_ndev_change_mtu(struct net_device *ndev, int new_mtu) · 97 unmodified lines | ||
| 98 | 98 | |
| 99 | 99 | if (err < 0) |
| 100 | 100 | goto err_exit; |
| 101 | + ndev->mtu = new_mtu; | |
| 101 | 102 | |
| 102 | 103 | if (netif_running(ndev)) { |
| 103 | 104 | aq_ndev_close(ndev); |
| @@ -213,9 +213,9 @@ void aq_pci_func_free_irqs(struct aq_pci_func_s *self) · 212 unmodified lines | ||
| 213 | 213 | if (!((1U << i) & self->msix_entry_mask)) |
| 214 | 214 | continue; |
| 215 | 215 | |
| 216 | − free_irq(pci_irq_vector(pdev, i), self->aq_vec[i]); | |
| 217 | 216 | if (pdev->msix_enabled) |
| 218 | 217 | irq_set_affinity_hint(pci_irq_vector(pdev, i), NULL); |
| 218 | + free_irq(pci_irq_vector(pdev, i), self->aq_vec[i]); | |
| 219 | 219 | self->msix_entry_mask &= ~(1U << i); |
| 220 | 220 | } |
| 221 | 221 | } |
| @@ -137,6 +137,7 @@ static struct aq_hw_caps_s hw_atl_a0_hw_caps_ = { · 136 unmodified lines | ||
| 137 | 137 | .tx_rings = HW_ATL_A0_TX_RINGS, |
| 138 | 138 | .rx_rings = HW_ATL_A0_RX_RINGS, |
| 139 | 139 | .hw_features = NETIF_F_HW_CSUM | |
| 140 | + NETIF_F_RXCSUM | | |
| 140 | 141 | NETIF_F_RXHASH | |
| 141 | 142 | NETIF_F_SG | |
| 142 | 143 | NETIF_F_TSO, |
| @@ -188,6 +188,7 @@ static struct aq_hw_caps_s hw_atl_b0_hw_caps_ = { · 187 unmodified lines | ||
| 188 | 188 | .tx_rings = HW_ATL_B0_TX_RINGS, |
| 189 | 189 | .rx_rings = HW_ATL_B0_RX_RINGS, |
| 190 | 190 | .hw_features = NETIF_F_HW_CSUM | |
| 191 | + NETIF_F_RXCSUM | | |
| 191 | 192 | NETIF_F_RXHASH | |
| 192 | 193 | NETIF_F_SG | |
| 193 | 194 | NETIF_F_TSO | |
| @@ -13292,17 +13292,15 @@ static int bnx2x_init_dev(struct bnx2x *bp, struct pci_dev *pdev, · 13291 unmodified lines | ||
| 13292 | 13292 | dev->vlan_features = NETIF_F_SG | NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM | |
| 13293 | 13293 | NETIF_F_TSO | NETIF_F_TSO_ECN | NETIF_F_TSO6 | NETIF_F_HIGHDMA; |
| 13294 | 13294 | |
| 13295 | − /* VF with OLD Hypervisor or old PF do not support filtering */ | |
| 13296 | 13295 | if (IS_PF(bp)) { |
| 13297 | 13296 | if (chip_is_e1x) |
| 13298 | 13297 | bp->accept_any_vlan = true; |
| 13299 | 13298 | else |
| 13300 | 13299 | dev->hw_features |= NETIF_F_HW_VLAN_CTAG_FILTER; |
| 13301 | −#ifdef CONFIG_BNX2X_SRIOV | |
| 13302 | − } else if (bp->acquire_resp.pfdev_info.pf_cap & PFVF_CAP_VLAN_FILTER) { | |
| 13303 | − dev->hw_features |= NETIF_F_HW_VLAN_CTAG_FILTER; | |
| 13304 | −#endif | |
| 13305 | 13300 | } |
| 13301 | + /* For VF we'll know whether to enable VLAN filtering after | |
| 13302 | + * getting a response to CHANNEL_TLV_ACQUIRE from PF. | |
| 13303 | + */ | |
| 13306 | 13304 | |
| 13307 | 13305 | dev->features |= dev->hw_features | NETIF_F_HW_VLAN_CTAG_RX; |
| 13308 | 13306 | dev->features |= NETIF_F_HIGHDMA; |
| @@ -13738,7 +13736,7 @@ static int bnx2x_ptp_adjfreq(struct ptp_clock_info *ptp, s32 ppb) · 429 unmodified lines | ||
| 13738 | 13736 | if (!netif_running(bp->dev)) { |
| 13739 | 13737 | DP(BNX2X_MSG_PTP, |
| 13740 | 13738 | "PTP adjfreq called while the interface is down\n"); |
| 13741 | − return -EFAULT; | |
| 13739 | + return -ENETDOWN; | |
| 13742 | 13740 | } |
| 13743 | 13741 | |
| 13744 | 13742 | if (ppb < 0) { |
| @@ -13797,6 +13795,12 @@ static int bnx2x_ptp_adjtime(struct ptp_clock_info *ptp, s64 delta) · 52 unmodified lines | ||
| 13797 | 13795 | { |
| 13798 | 13796 | struct bnx2x *bp = container_of(ptp, struct bnx2x, ptp_clock_info); |
| 13799 | 13797 | |
| 13798 | + if (!netif_running(bp->dev)) { | |
| 13799 | + DP(BNX2X_MSG_PTP, | |
| 13800 | + "PTP adjtime called while the interface is down\n"); | |
| 13801 | + return -ENETDOWN; | |
| 13802 | + } | |
| 13803 | + | |
| 13800 | 13804 | DP(BNX2X_MSG_PTP, "PTP adjtime called, delta = %llx\n", delta); |
| 13801 | 13805 | |
| 13802 | 13806 | timecounter_adjtime(&bp->timecounter, delta); |
| @@ -13809,6 +13813,12 @@ static int bnx2x_ptp_gettime(struct ptp_clock_info *ptp, struct timespec64 *ts) · 6 unmodified lines | ||
| 13809 | 13813 | struct bnx2x *bp = container_of(ptp, struct bnx2x, ptp_clock_info); |
| 13810 | 13814 | u64 ns; |
| 13811 | 13815 | |
| 13816 | + if (!netif_running(bp->dev)) { | |
| 13817 | + DP(BNX2X_MSG_PTP, | |
| 13818 | + "PTP gettime called while the interface is down\n"); | |
| 13819 | + return -ENETDOWN; | |
| 13820 | + } | |
| 13821 | + | |
| 13812 | 13822 | ns = timecounter_read(&bp->timecounter); |
| 13813 | 13823 | |
| 13814 | 13824 | DP(BNX2X_MSG_PTP, "PTP gettime called, ns = %llu\n", ns); |
| @@ -13824,6 +13834,12 @@ static int bnx2x_ptp_settime(struct ptp_clock_info *ptp, · 9 unmodified lines | ||
| 13824 | 13834 | struct bnx2x *bp = container_of(ptp, struct bnx2x, ptp_clock_info); |
| 13825 | 13835 | u64 ns; |
| 13826 | 13836 | |
| 13837 | + if (!netif_running(bp->dev)) { | |
| 13838 | + DP(BNX2X_MSG_PTP, | |
| 13839 | + "PTP settime called while the interface is down\n"); | |
| 13840 | + return -ENETDOWN; | |
| 13841 | + } | |
| 13842 | + | |
| 13827 | 13843 | ns = timespec64_to_ns(ts); |
| 13828 | 13844 | |
| 13829 | 13845 | DP(BNX2X_MSG_PTP, "PTP settime called, ns = %llu\n", ns); |
| @@ -13991,6 +14007,14 @@ static int bnx2x_init_one(struct pci_dev *pdev, · 161 unmodified lines | ||
| 13991 | 14007 | rc = bnx2x_vfpf_acquire(bp, tx_count, rx_count); |
| 13992 | 14008 | if (rc) |
| 13993 | 14009 | goto init_one_freemem; |
| 14010 | + | |
| 14011 | +#ifdef CONFIG_BNX2X_SRIOV | |
| 14012 | + /* VF with OLD Hypervisor or old PF do not support filtering */ | |
| 14013 | + if (bp->acquire_resp.pfdev_info.pf_cap & PFVF_CAP_VLAN_FILTER) { | |
| 14014 | + dev->hw_features |= NETIF_F_HW_VLAN_CTAG_FILTER; | |
| 14015 | + dev->features |= NETIF_F_HW_VLAN_CTAG_FILTER; | |
| 14016 | + } | |
| 14017 | +#endif | |
| 13994 | 14018 | } |
| 13995 | 14019 | |
| 13996 | 14020 | /* Enable SRIOV if capability found in configuration space */ |
| @@ -434,7 +434,9 @@ static int bnx2x_vf_mac_vlan_config(struct bnx2x *bp, · 433 unmodified lines | ||
| 434 | 434 | |
| 435 | 435 | /* Add/Remove the filter */ |
| 436 | 436 | rc = bnx2x_config_vlan_mac(bp, &ramrod); |
| 437 | − if (rc && rc != -EEXIST) { | |
| 437 | + if (rc == -EEXIST) | |
| 438 | + return 0; | |
| 439 | + if (rc) { | |
| 438 | 440 | BNX2X_ERR("Failed to %s %s\n", |
| 439 | 441 | filter->add ? "add" : "delete", |
| 440 | 442 | (filter->type == BNX2X_VF_FILTER_VLAN_MAC) ? |
| @@ -444,6 +446,8 @@ static int bnx2x_vf_mac_vlan_config(struct bnx2x *bp, · 3 unmodified lines | ||
| 444 | 446 | return rc; |
| 445 | 447 | } |
| 446 | 448 | |
| 449 | + filter->applied = true; | |
| 450 | + | |
| 447 | 451 | return 0; |
| 448 | 452 | } |
| 449 | 453 | |
| @@ -469,8 +473,10 @@ int bnx2x_vf_mac_vlan_config_list(struct bnx2x *bp, struct bnx2x_virtf *vf, · 19 unmodified lines | ||
| 469 | 473 | /* Rollback if needed */ |
| 470 | 474 | if (i != filters->count) { |
| 471 | 475 | BNX2X_ERR("Managed only %d/%d filters - rolling back\n", |
| 472 | − i, filters->count + 1); | |
| 476 | + i, filters->count); | |
| 473 | 477 | while (--i >= 0) { |
| 478 | + if (!filters->filters[i].applied) | |
| 479 | + continue; | |
| 474 | 480 | filters->filters[i].add = !filters->filters[i].add; |
| 475 | 481 | bnx2x_vf_mac_vlan_config(bp, vf, qid, |
| 476 | 482 | &filters->filters[i], |
| @@ -1899,7 +1905,8 @@ void bnx2x_iov_adjust_stats_req(struct bnx2x *bp) · 1422 unmodified lines | ||
| 1899 | 1905 | continue; |
| 1900 | 1906 | } |
| 1901 | 1907 | |
| 1902 | − DP(BNX2X_MSG_IOV, "add addresses for vf %d\n", vf->abs_vfid); | |
| 1908 | + DP_AND((BNX2X_MSG_IOV | BNX2X_MSG_STATS), | |
| 1909 | + "add addresses for vf %d\n", vf->abs_vfid); | |
| 1903 | 1910 | for_each_vfq(vf, j) { |
| 1904 | 1911 | struct bnx2x_vf_queue *rxq = vfq_get(vf, j); |
| 1905 | 1912 | |
| @@ -1920,11 +1927,12 @@ void bnx2x_iov_adjust_stats_req(struct bnx2x *bp) · 14 unmodified lines | ||
| 1920 | 1927 | cpu_to_le32(U64_HI(q_stats_addr)); |
| 1921 | 1928 | cur_query_entry->address.lo = |
| 1922 | 1929 | cpu_to_le32(U64_LO(q_stats_addr)); |
| 1923 | − DP(BNX2X_MSG_IOV, | |
| 1924 | − "added address %x %x for vf %d queue %d client %d\n", | |
| 1925 | − cur_query_entry->address.hi, | |
| 1926 | − cur_query_entry->address.lo, cur_query_entry->funcID, | |
| 1927 | − j, cur_query_entry->index); | |
| 1930 | + DP_AND((BNX2X_MSG_IOV | BNX2X_MSG_STATS), | |
| 1931 | + "added address %x %x for vf %d queue %d client %d\n", | |
| 1932 | + cur_query_entry->address.hi, | |
| 1933 | + cur_query_entry->address.lo, | |
| 1934 | + cur_query_entry->funcID, | |
| 1935 | + j, cur_query_entry->index); | |
| 1928 | 1936 | cur_query_entry++; |
| 1929 | 1937 | cur_data_offset += sizeof(struct per_queue_stats); |
| 1930 | 1938 | stats_count++; |
| @@ -114,6 +114,7 @@ struct bnx2x_vf_mac_vlan_filter { · 113 unmodified lines | ||
| 114 | 114 | (BNX2X_VF_FILTER_MAC | BNX2X_VF_FILTER_VLAN) /*shortcut*/ |
| 115 | 115 | |
| 116 | 116 | bool add; |
| 117 | + bool applied; | |
| 117 | 118 | u8 *mac; |
| 118 | 119 | u16 vid; |
| 119 | 120 | }; |
| @@ -868,7 +868,7 @@ int bnx2x_vfpf_set_mcast(struct net_device *dev) · 867 unmodified lines | ||
| 868 | 868 | struct bnx2x *bp = netdev_priv(dev); |
| 869 | 869 | struct vfpf_set_q_filters_tlv *req = &bp->vf2pf_mbox->req.set_q_filters; |
| 870 | 870 | struct pfvf_general_resp_tlv *resp = &bp->vf2pf_mbox->resp.general_resp; |
| 871 | − int rc, i = 0; | |
| 871 | + int rc = 0, i = 0; | |
| 872 | 872 | struct netdev_hw_addr *ha; |
| 873 | 873 | |
| 874 | 874 | if (bp->state != BNX2X_STATE_OPEN) { |
| @@ -883,6 +883,15 @@ int bnx2x_vfpf_set_mcast(struct net_device *dev) · 8 unmodified lines | ||
| 883 | 883 | /* Get Rx mode requested */ |
| 884 | 884 | DP(NETIF_MSG_IFUP, "dev->flags = %x\n", dev->flags); |
| 885 | 885 | |
| 886 | + /* We support PFVF_MAX_MULTICAST_PER_VF mcast addresses tops */ | |
| 887 | + if (netdev_mc_count(dev) > PFVF_MAX_MULTICAST_PER_VF) { | |
| 888 | + DP(NETIF_MSG_IFUP, | |
| 889 | + "VF supports not more than %d multicast MAC addresses\n", | |
| 890 | + PFVF_MAX_MULTICAST_PER_VF); | |
| 891 | + rc = -EINVAL; | |
| 892 | + goto out; | |
| 893 | + } | |
| 894 | + | |
| 886 | 895 | netdev_for_each_mc_addr(ha, dev) { |
| 887 | 896 | DP(NETIF_MSG_IFUP, "Adding mcast MAC: %pM\n", |
| 888 | 897 | bnx2x_mc_addr(ha)); |
| @@ -890,16 +899,6 @@ int bnx2x_vfpf_set_mcast(struct net_device *dev) · 1 unmodified line | ||
| 890 | 899 | i++; |
| 891 | 900 | } |
| 892 | 901 | |
| 893 | − /* We support four PFVF_MAX_MULTICAST_PER_VF mcast | |
| 894 | − * addresses tops | |
| 895 | − */ | |
| 896 | − if (i >= PFVF_MAX_MULTICAST_PER_VF) { | |
| 897 | − DP(NETIF_MSG_IFUP, | |
| 898 | − "VF supports not more than %d multicast MAC addresses\n", | |
| 899 | − PFVF_MAX_MULTICAST_PER_VF); | |
| 900 | − return -EINVAL; | |
| 901 | − } | |
| 902 | − | |
| 903 | 902 | req->n_multicast = i; |
| 904 | 903 | req->flags |= VFPF_SET_Q_FILTERS_MULTICAST_CHANGED; |
| 905 | 904 | req->vf_qid = 0; |
| @@ -924,7 +923,7 @@ int bnx2x_vfpf_set_mcast(struct net_device *dev) · 18 unmodified lines | ||
| 924 | 923 | out: |
| 925 | 924 | bnx2x_vfpf_finalize(bp, &req->first_tlv); |
| 926 | 925 | |
| 927 | − return 0; | |
| 926 | + return rc; | |
| 928 | 927 | } |
| 929 | 928 | |
| 930 | 929 | /* request pf to add a vlan for the vf */ |
| @@ -1778,6 +1777,23 @@ static int bnx2x_vf_mbx_qfilters(struct bnx2x *bp, struct bnx2x_virtf *vf) · 847 unmodified lines | ||
| 1778 | 1777 | goto op_err; |
| 1779 | 1778 | } |
| 1780 | 1779 | |
| 1780 | + /* build vlan list */ | |
| 1781 | + fl = NULL; | |
| 1782 | + | |
| 1783 | + rc = bnx2x_vf_mbx_macvlan_list(bp, vf, msg, &fl, | |
| 1784 | + VFPF_VLAN_FILTER); | |
| 1785 | + if (rc) | |
| 1786 | + goto op_err; | |
| 1787 | + | |
| 1788 | + if (fl) { | |
| 1789 | + /* set vlan list */ | |
| 1790 | + rc = bnx2x_vf_mac_vlan_config_list(bp, vf, fl, | |
| 1791 | + msg->vf_qid, | |
| 1792 | + false); | |
| 1793 | + if (rc) | |
| 1794 | + goto op_err; | |
| 1795 | + } | |
| 1796 | + | |
| 1781 | 1797 | } |
| 1782 | 1798 | |
| 1783 | 1799 | if (msg->flags & VFPF_SET_Q_FILTERS_RX_MASK_CHANGED) { |
| @@ -4465,6 +4465,10 @@ static int bnxt_hwrm_func_qcfg(struct bnxt *bp) · 4464 unmodified lines | ||
| 4465 | 4465 | vf->vlan = le16_to_cpu(resp->vlan) & VLAN_VID_MASK; |
| 4466 | 4466 | } |
| 4467 | 4467 | #endif |
| 4468 | + if (BNXT_PF(bp) && (le16_to_cpu(resp->flags) & | |
| 4469 | + FUNC_QCFG_RESP_FLAGS_FW_DCBX_AGENT_ENABLED)) | |
| 4470 | + bp->flags |= BNXT_FLAG_FW_LLDP_AGENT; | |
| 4471 | + | |
| 4468 | 4472 | switch (resp->port_partition_type) { |
| 4469 | 4473 | case FUNC_QCFG_RESP_PORT_PARTITION_TYPE_NPAR1_0: |
| 4470 | 4474 | case FUNC_QCFG_RESP_PORT_PARTITION_TYPE_NPAR1_5: |
| @@ -5507,8 +5511,9 @@ static int bnxt_hwrm_phy_qcaps(struct bnxt *bp) · 1036 unmodified lines | ||
| 5507 | 5511 | bp->lpi_tmr_hi = le32_to_cpu(resp->valid_tx_lpi_timer_high) & |
| 5508 | 5512 | PORT_PHY_QCAPS_RESP_TX_LPI_TIMER_HIGH_MASK; |
| 5509 | 5513 | } |
| 5510 | − link_info->support_auto_speeds = | |
| 5511 | − le16_to_cpu(resp->supported_speeds_auto_mode); | |
| 5514 | + if (resp->supported_speeds_auto_mode) | |
| 5515 | + link_info->support_auto_speeds = | |
| 5516 | + le16_to_cpu(resp->supported_speeds_auto_mode); | |
| 5512 | 5517 | |
| 5513 | 5518 | hwrm_phy_qcaps_exit: |
| 5514 | 5519 | mutex_unlock(&bp->hwrm_cmd_lock); |
| @@ -6495,8 +6500,14 @@ static void bnxt_reset_task(struct bnxt *bp, bool silent) · 980 unmodified lines | ||
| 6495 | 6500 | if (!silent) |
| 6496 | 6501 | bnxt_dbg_dump_states(bp); |
| 6497 | 6502 | if (netif_running(bp->dev)) { |
| 6503 | + int rc; | |
| 6504 | + | |
| 6505 | + if (!silent) | |
| 6506 | + bnxt_ulp_stop(bp); | |
| 6498 | 6507 | bnxt_close_nic(bp, false, false); |
| 6499 | − bnxt_open_nic(bp, false, false); | |
| 6508 | + rc = bnxt_open_nic(bp, false, false); | |
| 6509 | + if (!silent && !rc) | |
| 6510 | + bnxt_ulp_start(bp); | |
| 6500 | 6511 | } |
| 6501 | 6512 | } |
| 6502 | 6513 | |
| @@ -7444,6 +7455,10 @@ static int bnxt_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) · 941 unmodified lines | ||
| 7444 | 7455 | if (rc) |
| 7445 | 7456 | goto init_err_pci_clean; |
| 7446 | 7457 | |
| 7458 | + rc = bnxt_hwrm_func_reset(bp); | |
| 7459 | + if (rc) | |
| 7460 | + goto init_err_pci_clean; | |
| 7461 | + | |
| 7447 | 7462 | bnxt_hwrm_fw_set_time(bp); |
| 7448 | 7463 | |
| 7449 | 7464 | dev->hw_features = NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM | NETIF_F_SG | |
| @@ -7554,10 +7569,6 @@ static int bnxt_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) · 104 unmodified lines | ||
| 7554 | 7569 | if (rc) |
| 7555 | 7570 | goto init_err_pci_clean; |
| 7556 | 7571 | |
| 7557 | − rc = bnxt_hwrm_func_reset(bp); | |
| 7558 | − if (rc) | |
| 7559 | − goto init_err_pci_clean; | |
| 7560 | − | |
| 7561 | 7572 | rc = bnxt_init_int_mode(bp); |
| 7562 | 7573 | if (rc) |
| 7563 | 7574 | goto init_err_pci_clean; |
| @@ -993,6 +993,7 @@ struct bnxt { · 992 unmodified lines | ||
| 993 | 993 | BNXT_FLAG_ROCEV2_CAP) |
| 994 | 994 | #define BNXT_FLAG_NO_AGG_RINGS 0x20000 |
| 995 | 995 | #define BNXT_FLAG_RX_PAGE_MODE 0x40000 |
| 996 | + #define BNXT_FLAG_FW_LLDP_AGENT 0x80000 | |
| 996 | 997 | #define BNXT_FLAG_CHIP_NITRO_A0 0x1000000 |
| 997 | 998 | |
| 998 | 999 | #define BNXT_FLAG_ALL_CONFIG_FEATS (BNXT_FLAG_TPA | \ |
| @@ -474,7 +474,7 @@ void bnxt_dcb_init(struct bnxt *bp) · 473 unmodified lines | ||
| 474 | 474 | return; |
| 475 | 475 | |
| 476 | 476 | bp->dcbx_cap = DCB_CAP_DCBX_VER_IEEE; |
| 477 | − if (BNXT_PF(bp)) | |
| 477 | + if (BNXT_PF(bp) && !(bp->flags & BNXT_FLAG_FW_LLDP_AGENT)) | |
| 478 | 478 | bp->dcbx_cap |= DCB_CAP_DCBX_HOST; |
| 479 | 479 | else |
| 480 | 480 | bp->dcbx_cap |= DCB_CAP_DCBX_LLD_MANAGED; |
| @@ -1,7 +1,7 @@ | ||
| 1 | 1 | /* |
| 2 | 2 | * Broadcom GENET (Gigabit Ethernet) controller driver |
| 3 | 3 | * |
| 4 | − * Copyright (c) 2014 Broadcom Corporation | |
| 4 | + * Copyright (c) 2014-2017 Broadcom | |
| 5 | 5 | * |
| 6 | 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | 7 | * it under the terms of the GNU General Public License version 2 as |
| @@ -450,6 +450,22 @@ static inline void bcmgenet_rdma_ring_writel(struct bcmgenet_priv *priv, · 442 unmodified lines | ||
| 450 | 450 | genet_dma_ring_regs[r]); |
| 451 | 451 | } |
| 452 | 452 | |
| 453 | +static int bcmgenet_begin(struct net_device *dev) | |
| 454 | +{ | |
| 455 | + struct bcmgenet_priv *priv = netdev_priv(dev); | |
| 456 | + | |
| 457 | + /* Turn on the clock */ | |
| 458 | + return clk_prepare_enable(priv->clk); | |
| 459 | +} | |
| 460 | + | |
| 461 | +static void bcmgenet_complete(struct net_device *dev) | |
| 462 | +{ | |
| 463 | + struct bcmgenet_priv *priv = netdev_priv(dev); | |
| 464 | + | |
| 465 | + /* Turn off the clock */ | |
| 466 | + clk_disable_unprepare(priv->clk); | |
| 467 | +} | |
| 468 | + | |
| 453 | 469 | static int bcmgenet_get_link_ksettings(struct net_device *dev, |
| 454 | 470 | struct ethtool_link_ksettings *cmd) |
| 455 | 471 | { |
| @@ -778,8 +794,9 @@ static const struct bcmgenet_stats bcmgenet_gstrings_stats[] = { · 322 unmodified lines | ||
| 778 | 794 | STAT_GENET_RUNT("rx_runt_bytes", mib.rx_runt_bytes), |
| 779 | 795 | /* Misc UniMAC counters */ |
| 780 | 796 | STAT_GENET_MISC("rbuf_ovflow_cnt", mib.rbuf_ovflow_cnt, |
| 781 | − UMAC_RBUF_OVFL_CNT), | |
| 782 | − STAT_GENET_MISC("rbuf_err_cnt", mib.rbuf_err_cnt, UMAC_RBUF_ERR_CNT), | |
| 797 | + UMAC_RBUF_OVFL_CNT_V1), | |
| 798 | + STAT_GENET_MISC("rbuf_err_cnt", mib.rbuf_err_cnt, | |
| 799 | + UMAC_RBUF_ERR_CNT_V1), | |
| 783 | 800 | STAT_GENET_MISC("mdf_err_cnt", mib.mdf_err_cnt, UMAC_MDF_ERR_CNT), |
| 784 | 801 | STAT_GENET_SOFT_MIB("alloc_rx_buff_failed", mib.alloc_rx_buff_failed), |
| 785 | 802 | STAT_GENET_SOFT_MIB("rx_dma_failed", mib.rx_dma_failed), |
| @@ -821,6 +838,45 @@ static void bcmgenet_get_strings(struct net_device *dev, u32 stringset, · 35 unmodified lines | ||
| 821 | 838 | } |
| 822 | 839 | } |
| 823 | 840 | |
| 841 | +static u32 bcmgenet_update_stat_misc(struct bcmgenet_priv *priv, u16 offset) | |
| 842 | +{ | |
| 843 | + u16 new_offset; | |
| 844 | + u32 val; | |
| 845 | + | |
| 846 | + switch (offset) { | |
| 847 | + case UMAC_RBUF_OVFL_CNT_V1: | |
| 848 | + if (GENET_IS_V2(priv)) | |
| 849 | + new_offset = RBUF_OVFL_CNT_V2; | |
| 850 | + else | |
| 851 | + new_offset = RBUF_OVFL_CNT_V3PLUS; | |
| 852 | + | |
| 853 | + val = bcmgenet_rbuf_readl(priv, new_offset); | |
| 854 | + /* clear if overflowed */ | |
| 855 | + if (val == ~0) | |
| 856 | + bcmgenet_rbuf_writel(priv, 0, new_offset); | |
| 857 | + break; | |
| 858 | + case UMAC_RBUF_ERR_CNT_V1: | |
| 859 | + if (GENET_IS_V2(priv)) | |
| 860 | + new_offset = RBUF_ERR_CNT_V2; | |
| 861 | + else | |
| 862 | + new_offset = RBUF_ERR_CNT_V3PLUS; | |
| 863 | + | |
| 864 | + val = bcmgenet_rbuf_readl(priv, new_offset); | |
| 865 | + /* clear if overflowed */ | |
| 866 | + if (val == ~0) | |
| 867 | + bcmgenet_rbuf_writel(priv, 0, new_offset); | |
| 868 | + break; | |
| 869 | + default: | |
| 870 | + val = bcmgenet_umac_readl(priv, offset); | |
| 871 | + /* clear if overflowed */ | |
| 872 | + if (val == ~0) | |
| 873 | + bcmgenet_umac_writel(priv, 0, offset); | |
| 874 | + break; | |
| 875 | + } | |
| 876 | + | |
| 877 | + return val; | |
| 878 | +} | |
| 879 | + | |
| 824 | 880 | static void bcmgenet_update_mib_counters(struct bcmgenet_priv *priv) |
| 825 | 881 | { |
| 826 | 882 | int i, j = 0; |
| @@ -836,19 +892,28 @@ static void bcmgenet_update_mib_counters(struct bcmgenet_priv *priv) · 9 unmodified lines | ||
| 836 | 892 | case BCMGENET_STAT_NETDEV: |
| 837 | 893 | case BCMGENET_STAT_SOFT: |
| 838 | 894 | continue; |
| 839 | − case BCMGENET_STAT_MIB_RX: | |
| 840 | − case BCMGENET_STAT_MIB_TX: | |
| 841 | 895 | case BCMGENET_STAT_RUNT: |
| 842 | − if (s->type != BCMGENET_STAT_MIB_RX) | |
| 843 | − offset = BCMGENET_STAT_OFFSET; | |
| 896 | + offset += BCMGENET_STAT_OFFSET; | |
| 897 | + /* fall through */ | |
| 898 | + case BCMGENET_STAT_MIB_TX: | |
| 899 | + offset += BCMGENET_STAT_OFFSET; | |
| 900 | + /* fall through */ | |
| 901 | + case BCMGENET_STAT_MIB_RX: | |
| 844 | 902 | val = bcmgenet_umac_readl(priv, |
| 845 | 903 | UMAC_MIB_START + j + offset); |
| 904 | + offset = 0; /* Reset Offset */ | |
| 846 | 905 | break; |
| 847 | 906 | case BCMGENET_STAT_MISC: |
| 848 | − val = bcmgenet_umac_readl(priv, s->reg_offset); | |
| 849 | − /* clear if overflowed */ | |
| 850 | − if (val == ~0) | |
| 851 | − bcmgenet_umac_writel(priv, 0, s->reg_offset); | |
| 907 | + if (GENET_IS_V1(priv)) { | |
| 908 | + val = bcmgenet_umac_readl(priv, s->reg_offset); | |
| 909 | + /* clear if overflowed */ | |
| 910 | + if (val == ~0) | |
| 911 | + bcmgenet_umac_writel(priv, 0, | |
| 912 | + s->reg_offset); | |
| 913 | + } else { | |
| 914 | + val = bcmgenet_update_stat_misc(priv, | |
| 915 | + s->reg_offset); | |
| 916 | + } | |
| 852 | 917 | break; |
| 853 | 918 | } |
| 854 | 919 | |
| @@ -973,6 +1038,8 @@ static int bcmgenet_set_eee(struct net_device *dev, struct ethtool_eee *e) · 118 unmodified lines | ||
| 973 | 1038 | |
| 974 | 1039 | /* standard ethtool support functions. */ |
| 975 | 1040 | static const struct ethtool_ops bcmgenet_ethtool_ops = { |
| 1041 | + .begin = bcmgenet_begin, | |
| 1042 | + .complete = bcmgenet_complete, | |
| 976 | 1043 | .get_strings = bcmgenet_get_strings, |
| 977 | 1044 | .get_sset_count = bcmgenet_get_sset_count, |
| 978 | 1045 | .get_ethtool_stats = bcmgenet_get_ethtool_stats, |
| @@ -1167,7 +1234,6 @@ static unsigned int __bcmgenet_tx_reclaim(struct net_device *dev, · 188 unmodified lines | ||
| 1167 | 1234 | struct bcmgenet_priv *priv = netdev_priv(dev); |
| 1168 | 1235 | struct device *kdev = &priv->pdev->dev; |
| 1169 | 1236 | struct enet_cb *tx_cb_ptr; |
| 1170 | − struct netdev_queue *txq; | |
| 1171 | 1237 | unsigned int pkts_compl = 0; |
| 1172 | 1238 | unsigned int bytes_compl = 0; |
| 1173 | 1239 | unsigned int c_index; |
| @@ -1219,13 +1285,8 @@ static unsigned int __bcmgenet_tx_reclaim(struct net_device *dev, · 45 unmodified lines | ||
| 1219 | 1285 | dev->stats.tx_packets += pkts_compl; |
| 1220 | 1286 | dev->stats.tx_bytes += bytes_compl; |
| 1221 | 1287 | |
| 1222 | − txq = netdev_get_tx_queue(dev, ring->queue); | |
| 1223 | − netdev_tx_completed_queue(txq, pkts_compl, bytes_compl); | |
| 1224 | − | |
| 1225 | − if (ring->free_bds > (MAX_SKB_FRAGS + 1)) { | |
| 1226 | − if (netif_tx_queue_stopped(txq)) | |
| 1227 | − netif_tx_wake_queue(txq); | |
| 1228 | − } | |
| 1288 | + netdev_tx_completed_queue(netdev_get_tx_queue(dev, ring->queue), | |
| 1289 | + pkts_compl, bytes_compl); | |
| 1229 | 1290 | |
| 1230 | 1291 | return pkts_compl; |
| 1231 | 1292 | } |
| @@ -1248,8 +1309,16 @@ static int bcmgenet_tx_poll(struct napi_struct *napi, int budget) · 16 unmodified lines | ||
| 1248 | 1309 | struct bcmgenet_tx_ring *ring = |
| 1249 | 1310 | container_of(napi, struct bcmgenet_tx_ring, napi); |
| 1250 | 1311 | unsigned int work_done = 0; |
| 1312 | + struct netdev_queue *txq; | |
| 1313 | + unsigned long flags; | |
| 1251 | 1314 | |
| 1252 | − work_done = bcmgenet_tx_reclaim(ring->priv->dev, ring); | |
| 1315 | + spin_lock_irqsave(&ring->lock, flags); | |
| 1316 | + work_done = __bcmgenet_tx_reclaim(ring->priv->dev, ring); | |
| 1317 | + if (ring->free_bds > (MAX_SKB_FRAGS + 1)) { | |
| 1318 | + txq = netdev_get_tx_queue(ring->priv->dev, ring->queue); | |
| 1319 | + netif_tx_wake_queue(txq); | |
| 1320 | + } | |
| 1321 | + spin_unlock_irqrestore(&ring->lock, flags); | |
| 1253 | 1322 | |
| 1254 | 1323 | if (work_done == 0) { |
| 1255 | 1324 | napi_complete(napi); |
| @@ -2457,24 +2526,28 @@ static int bcmgenet_init_dma(struct bcmgenet_priv *priv) · 1201 unmodified lines | ||
| 2457 | 2526 | /* Interrupt bottom half */ |
| 2458 | 2527 | static void bcmgenet_irq_task(struct work_struct *work) |
| 2459 | 2528 | { |
| 2529 | + unsigned long flags; | |
| 2530 | + unsigned int status; | |
| 2460 | 2531 | struct bcmgenet_priv *priv = container_of( |
| 2461 | 2532 | work, struct bcmgenet_priv, bcmgenet_irq_work); |
| 2462 | 2533 | |
| 2463 | 2534 | netif_dbg(priv, intr, priv->dev, "%s\n", __func__); |
| 2464 | 2535 | |
| 2465 | − if (priv->irq0_stat & UMAC_IRQ_MPD_R) { | |
| 2466 | − priv->irq0_stat &= ~UMAC_IRQ_MPD_R; | |
| 2536 | + spin_lock_irqsave(&priv->lock, flags); | |
| 2537 | + status = priv->irq0_stat; | |
| 2538 | + priv->irq0_stat = 0; | |
| 2539 | + spin_unlock_irqrestore(&priv->lock, flags); | |
| 2540 | + | |
| 2541 | + if (status & UMAC_IRQ_MPD_R) { | |
| 2467 | 2542 | netif_dbg(priv, wol, priv->dev, |
| 2468 | 2543 | "magic packet detected, waking up\n"); |
| 2469 | 2544 | bcmgenet_power_up(priv, GENET_POWER_WOL_MAGIC); |
| 2470 | 2545 | } |
| 2471 | 2546 | |
| 2472 | 2547 | /* Link UP/DOWN event */ |
| 2473 | − if (priv->irq0_stat & UMAC_IRQ_LINK_EVENT) { | |
| 2548 | + if (status & UMAC_IRQ_LINK_EVENT) | |
| 2474 | 2549 | phy_mac_interrupt(priv->phydev, |
| 2475 | − !!(priv->irq0_stat & UMAC_IRQ_LINK_UP)); | |
| 2476 | − priv->irq0_stat &= ~UMAC_IRQ_LINK_EVENT; | |
| 2477 | − } | |
| 2550 | + !!(status & UMAC_IRQ_LINK_UP)); | |
| 2478 | 2551 | } |
| 2479 | 2552 | |
| 2480 | 2553 | /* bcmgenet_isr1: handle Rx and Tx priority queues */ |
| @@ -2483,22 +2556,21 @@ static irqreturn_t bcmgenet_isr1(int irq, void *dev_id) · 2 unmodified lines | ||
| 2483 | 2556 | struct bcmgenet_priv *priv = dev_id; |
| 2484 | 2557 | struct bcmgenet_rx_ring *rx_ring; |
| 2485 | 2558 | struct bcmgenet_tx_ring *tx_ring; |
| 2486 | − unsigned int index; | |
| 2559 | + unsigned int index, status; | |
| 2487 | 2560 | |
| 2488 | − /* Save irq status for bottom-half processing. */ | |
| 2489 | − priv->irq1_stat = | |
| 2490 | − bcmgenet_intrl2_1_readl(priv, INTRL2_CPU_STAT) & | |
| 2561 | + /* Read irq status */ | |
| 2562 | + status = bcmgenet_intrl2_1_readl(priv, INTRL2_CPU_STAT) & | |
| 2491 | 2563 | ~bcmgenet_intrl2_1_readl(priv, INTRL2_CPU_MASK_STATUS); |
| 2492 | 2564 | |
| 2493 | 2565 | /* clear interrupts */ |
| 2494 | − bcmgenet_intrl2_1_writel(priv, priv->irq1_stat, INTRL2_CPU_CLEAR); | |
| 2566 | + bcmgenet_intrl2_1_writel(priv, status, INTRL2_CPU_CLEAR); | |
| 2495 | 2567 | |
| 2496 | 2568 | netif_dbg(priv, intr, priv->dev, |
| 2497 | − "%s: IRQ=0x%x\n", __func__, priv->irq1_stat); | |
| 2569 | + "%s: IRQ=0x%x\n", __func__, status); | |
| 2498 | 2570 | |
| 2499 | 2571 | /* Check Rx priority queue interrupts */ |
| 2500 | 2572 | for (index = 0; index < priv->hw_params->rx_queues; index++) { |
| 2501 | − if (!(priv->irq1_stat & BIT(UMAC_IRQ1_RX_INTR_SHIFT + index))) | |
| 2573 | + if (!(status & BIT(UMAC_IRQ1_RX_INTR_SHIFT + index))) | |
| 2502 | 2574 | continue; |
| 2503 | 2575 | |
| 2504 | 2576 | rx_ring = &priv->rx_rings[index]; |
| @@ -2511,7 +2583,7 @@ static irqreturn_t bcmgenet_isr1(int irq, void *dev_id) · 6 unmodified lines | ||
| 2511 | 2583 | |
| 2512 | 2584 | /* Check Tx priority queue interrupts */ |
| 2513 | 2585 | for (index = 0; index < priv->hw_params->tx_queues; index++) { |
| 2514 | − if (!(priv->irq1_stat & BIT(index))) | |
| 2586 | + if (!(status & BIT(index))) | |
| 2515 | 2587 | continue; |
| 2516 | 2588 | |
| 2517 | 2589 | tx_ring = &priv->tx_rings[index]; |
| @@ -2531,19 +2603,20 @@ static irqreturn_t bcmgenet_isr0(int irq, void *dev_id) · 13 unmodified lines | ||
| 2531 | 2603 | struct bcmgenet_priv *priv = dev_id; |
| 2532 | 2604 | struct bcmgenet_rx_ring *rx_ring; |
| 2533 | 2605 | struct bcmgenet_tx_ring *tx_ring; |
| 2606 | + unsigned int status; | |
| 2607 | + unsigned long flags; | |
| 2534 | 2608 | |
| 2535 | − /* Save irq status for bottom-half processing. */ | |
| 2536 | − priv->irq0_stat = | |
| 2537 | − bcmgenet_intrl2_0_readl(priv, INTRL2_CPU_STAT) & | |
| 2609 | + /* Read irq status */ | |
| 2610 | + status = bcmgenet_intrl2_0_readl(priv, INTRL2_CPU_STAT) & | |
| 2538 | 2611 | ~bcmgenet_intrl2_0_readl(priv, INTRL2_CPU_MASK_STATUS); |
| 2539 | 2612 | |
| 2540 | 2613 | /* clear interrupts */ |
| 2541 | − bcmgenet_intrl2_0_writel(priv, priv->irq0_stat, INTRL2_CPU_CLEAR); | |
| 2614 | + bcmgenet_intrl2_0_writel(priv, status, INTRL2_CPU_CLEAR); | |
| 2542 | 2615 | |
| 2543 | 2616 | netif_dbg(priv, intr, priv->dev, |
| 2544 | − "IRQ=0x%x\n", priv->irq0_stat); | |
| 2617 | + "IRQ=0x%x\n", status); | |
| 2545 | 2618 | |
| 2546 | − if (priv->irq0_stat & UMAC_IRQ_RXDMA_DONE) { | |
| 2619 | + if (status & UMAC_IRQ_RXDMA_DONE) { | |
| 2547 | 2620 | rx_ring = &priv->rx_rings[DESC_INDEX]; |
| 2548 | 2621 | |
| 2549 | 2622 | if (likely(napi_schedule_prep(&rx_ring->napi))) { |
| @@ -2552,7 +2625,7 @@ static irqreturn_t bcmgenet_isr0(int irq, void *dev_id) · 2 unmodified lines | ||
| 2552 | 2625 | } |
| 2553 | 2626 | } |
| 2554 | 2627 | |
| 2555 | − if (priv->irq0_stat & UMAC_IRQ_TXDMA_DONE) { | |
| 2628 | + if (status & UMAC_IRQ_TXDMA_DONE) { | |
| 2556 | 2629 | tx_ring = &priv->tx_rings[DESC_INDEX]; |
| 2557 | 2630 | |
| 2558 | 2631 | if (likely(napi_schedule_prep(&tx_ring->napi))) { |
| @@ -2561,22 +2634,23 @@ static irqreturn_t bcmgenet_isr0(int irq, void *dev_id) · 2 unmodified lines | ||
| 2561 | 2634 | } |
| 2562 | 2635 | } |
| 2563 | 2636 | |
| 2564 | − if (priv->irq0_stat & (UMAC_IRQ_PHY_DET_R | | |
| 2565 | − UMAC_IRQ_PHY_DET_F | | |
| 2566 | − UMAC_IRQ_LINK_EVENT | | |
| 2567 | − UMAC_IRQ_HFB_SM | | |
| 2568 | − UMAC_IRQ_HFB_MM | | |
| 2569 | − UMAC_IRQ_MPD_R)) { | |
| 2570 | − /* all other interested interrupts handled in bottom half */ | |
| 2571 | − schedule_work(&priv->bcmgenet_irq_work); | |
| 2572 | − } | |
| 2573 | − | |
| 2574 | 2637 | if ((priv->hw_params->flags & GENET_HAS_MDIO_INTR) && |
| 2575 | − priv->irq0_stat & (UMAC_IRQ_MDIO_DONE | UMAC_IRQ_MDIO_ERROR)) { | |
| 2576 | − priv->irq0_stat &= ~(UMAC_IRQ_MDIO_DONE | UMAC_IRQ_MDIO_ERROR); | |
| 2638 | + status & (UMAC_IRQ_MDIO_DONE | UMAC_IRQ_MDIO_ERROR)) { | |
| 2577 | 2639 | wake_up(&priv->wq); |
| 2578 | 2640 | } |
| 2579 | 2641 | |
| 2642 | + /* all other interested interrupts handled in bottom half */ | |
| 2643 | + status &= (UMAC_IRQ_LINK_EVENT | | |
| 2644 | + UMAC_IRQ_MPD_R); | |
| 2645 | + if (status) { | |
| 2646 | + /* Save irq status for bottom-half processing. */ | |
| 2647 | + spin_lock_irqsave(&priv->lock, flags); | |
| 2648 | + priv->irq0_stat |= status; | |
| 2649 | + spin_unlock_irqrestore(&priv->lock, flags); | |
| 2650 | + | |
| 2651 | + schedule_work(&priv->bcmgenet_irq_work); | |
| 2652 | + } | |
| 2653 | + | |
| 2580 | 2654 | return IRQ_HANDLED; |
| 2581 | 2655 | } |
| 2582 | 2656 | |
| @@ -2801,6 +2875,8 @@ err_irq0: · 218 unmodified lines | ||
| 2801 | 2875 | err_fini_dma: |
| 2802 | 2876 | bcmgenet_fini_dma(priv); |
| 2803 | 2877 | err_clk_disable: |
| 2878 | + if (priv->internal_phy) | |
| 2879 | + bcmgenet_power_down(priv, GENET_POWER_PASSIVE); | |
| 2804 | 2880 | clk_disable_unprepare(priv->clk); |
| 2805 | 2881 | return ret; |
| 2806 | 2882 | } |
| @@ -3177,6 +3253,12 @@ static void bcmgenet_set_hw_params(struct bcmgenet_priv *priv) · 370 unmodified lines | ||
| 3177 | 3253 | */ |
| 3178 | 3254 | gphy_rev = reg & 0xffff; |
| 3179 | 3255 | |
| 3256 | + /* This is reserved so should require special treatment */ | |
| 3257 | + if (gphy_rev == 0 || gphy_rev == 0x01ff) { | |
| 3258 | + pr_warn("Invalid GPHY revision detected: 0x%04x\n", gphy_rev); | |
| 3259 | + return; | |
| 3260 | + } | |
| 3261 | + | |
| 3180 | 3262 | /* This is the good old scheme, just GPHY major, no minor nor patch */ |
| 3181 | 3263 | if ((gphy_rev & 0xf0) != 0) |
| 3182 | 3264 | priv->gphy_rev = gphy_rev << 8; |
| @@ -3185,12 +3267,6 @@ static void bcmgenet_set_hw_params(struct bcmgenet_priv *priv) · 2 unmodified lines | ||
| 3185 | 3267 | else if ((gphy_rev & 0xff00) != 0) |
| 3186 | 3268 | priv->gphy_rev = gphy_rev; |
| 3187 | 3269 | |
| 3188 | − /* This is reserved so should require special treatment */ | |
| 3189 | − else if (gphy_rev == 0 || gphy_rev == 0x01ff) { | |
| 3190 | − pr_warn("Invalid GPHY revision detected: 0x%04x\n", gphy_rev); | |
| 3191 | − return; | |
| 3192 | − } | |
| 3193 | − | |
| 3194 | 3270 | #ifdef CONFIG_PHYS_ADDR_T_64BIT |
| 3195 | 3271 | if (!(params->flags & GENET_HAS_40BITS)) |
| 3196 | 3272 | pr_warn("GENET does not support 40-bits PA\n"); |
| @@ -3233,6 +3309,7 @@ static int bcmgenet_probe(struct platform_device *pdev) · 36 unmodified lines | ||
| 3233 | 3309 | const void *macaddr; |
| 3234 | 3310 | struct resource *r; |
| 3235 | 3311 | int err = -EIO; |
| 3312 | + const char *phy_mode_str; | |
| 3236 | 3313 | |
| 3237 | 3314 | /* Up to GENET_MAX_MQ_CNT + 1 TX queues and RX queues */ |
| 3238 | 3315 | dev = alloc_etherdev_mqs(sizeof(*priv), GENET_MAX_MQ_CNT + 1, |
| @@ -3276,6 +3353,8 @@ static int bcmgenet_probe(struct platform_device *pdev) · 37 unmodified lines | ||
| 3276 | 3353 | goto err; |
| 3277 | 3354 | } |
| 3278 | 3355 | |
| 3356 | + spin_lock_init(&priv->lock); | |
| 3357 | + | |
| 3279 | 3358 | SET_NETDEV_DEV(dev, &pdev->dev); |
| 3280 | 3359 | dev_set_drvdata(&pdev->dev, dev); |
| 3281 | 3360 | ether_addr_copy(dev->dev_addr, macaddr); |
| @@ -3338,6 +3417,13 @@ static int bcmgenet_probe(struct platform_device *pdev) · 56 unmodified lines | ||
| 3338 | 3417 | priv->clk_eee = NULL; |
| 3339 | 3418 | } |
| 3340 | 3419 | |
| 3420 | + /* If this is an internal GPHY, power it on now, before UniMAC is | |
| 3421 | + * brought out of reset as absolutely no UniMAC activity is allowed | |
| 3422 | + */ | |
| 3423 | + if (dn && !of_property_read_string(dn, "phy-mode", &phy_mode_str) && | |
| 3424 | + !strcasecmp(phy_mode_str, "internal")) | |
| 3425 | + bcmgenet_power_up(priv, GENET_POWER_PASSIVE); | |
| 3426 | + | |
| 3341 | 3427 | err = reset_umac(priv); |
| 3342 | 3428 | if (err) |
| 3343 | 3429 | goto err_clk_disable; |
| @@ -3395,7 +3481,8 @@ static int bcmgenet_suspend(struct device *d) · 51 unmodified lines | ||
| 3395 | 3481 | |
| 3396 | 3482 | bcmgenet_netif_stop(dev); |
| 3397 | 3483 | |
| 3398 | − phy_suspend(priv->phydev); | |
| 3484 | + if (!device_may_wakeup(d)) | |
| 3485 | + phy_suspend(priv->phydev); | |
| 3399 | 3486 | |
| 3400 | 3487 | netif_device_detach(dev); |
| 3401 | 3488 | |
| @@ -3492,7 +3579,8 @@ static int bcmgenet_resume(struct device *d) · 90 unmodified lines | ||
| 3492 | 3579 | |
| 3493 | 3580 | netif_device_attach(dev); |
| 3494 | 3581 | |
| 3495 | − phy_resume(priv->phydev); | |
| 3582 | + if (!device_may_wakeup(d)) | |
| 3583 | + phy_resume(priv->phydev); | |
| 3496 | 3584 | |
| 3497 | 3585 | if (priv->eee.eee_enabled) |
| 3498 | 3586 | bcmgenet_eee_enable_set(dev, true); |
| @@ -3502,6 +3590,8 @@ static int bcmgenet_resume(struct device *d) · 3 unmodified lines | ||
| 3502 | 3590 | return 0; |
| 3503 | 3591 | |
| 3504 | 3592 | out_clk_disable: |
| 3593 | + if (priv->internal_phy) | |
| 3594 | + bcmgenet_power_down(priv, GENET_POWER_PASSIVE); | |
| 3505 | 3595 | clk_disable_unprepare(priv->clk); |
| 3506 | 3596 | return ret; |
| 3507 | 3597 | } |
| @@ -1,5 +1,5 @@ | ||
| 1 | 1 | /* |
| 2 | − * Copyright (c) 2014 Broadcom Corporation | |
| 2 | + * Copyright (c) 2014-2017 Broadcom | |
| 3 | 3 | * |
| 4 | 4 | * This program is free software; you can redistribute it and/or modify |
| 5 | 5 | * it under the terms of the GNU General Public License version 2 as |
| @@ -214,7 +214,9 @@ struct bcmgenet_mib_counters { · 208 unmodified lines | ||
| 214 | 214 | #define MDIO_REG_SHIFT 16 |
| 215 | 215 | #define MDIO_REG_MASK 0x1F |
| 216 | 216 | |
| 217 | −#define UMAC_RBUF_OVFL_CNT 0x61C | |
| 217 | +#define UMAC_RBUF_OVFL_CNT_V1 0x61C | |
| 218 | +#define RBUF_OVFL_CNT_V2 0x80 | |
| 219 | +#define RBUF_OVFL_CNT_V3PLUS 0x94 | |
| 218 | 220 | |
| 219 | 221 | #define UMAC_MPD_CTRL 0x620 |
| 220 | 222 | #define MPD_EN (1 << 0) |
| @@ -224,7 +226,9 @@ struct bcmgenet_mib_counters { · 3 unmodified lines | ||
| 224 | 226 | |
| 225 | 227 | #define UMAC_MPD_PW_MS 0x624 |
| 226 | 228 | #define UMAC_MPD_PW_LS 0x628 |
| 227 | −#define UMAC_RBUF_ERR_CNT 0x634 | |
| 229 | +#define UMAC_RBUF_ERR_CNT_V1 0x634 | |
| 230 | +#define RBUF_ERR_CNT_V2 0x84 | |
| 231 | +#define RBUF_ERR_CNT_V3PLUS 0x98 | |
| 228 | 232 | #define UMAC_MDF_ERR_CNT 0x638 |
| 229 | 233 | #define UMAC_MDF_CTRL 0x650 |
| 230 | 234 | #define UMAC_MDF_ADDR 0x654 |
| @@ -619,11 +623,13 @@ struct bcmgenet_priv { · 388 unmodified lines | ||
| 619 | 623 | struct work_struct bcmgenet_irq_work; |
| 620 | 624 | int irq0; |
| 621 | 625 | int irq1; |
| 622 | − unsigned int irq0_stat; | |
| 623 | − unsigned int irq1_stat; | |
| 624 | 626 | int wol_irq; |
| 625 | 627 | bool wol_irq_disabled; |
| 626 | 628 | |
| 629 | + /* shared status */ | |
| 630 | + spinlock_t lock; | |
| 631 | + unsigned int irq0_stat; | |
| 632 | + | |
| 627 | 633 | /* HW descriptors/checksum variables */ |
| 628 | 634 | bool desc_64b_en; |
| 629 | 635 | bool desc_rxchk_en; |
| @@ -220,20 +220,6 @@ void bcmgenet_phy_power_set(struct net_device *dev, bool enable) · 219 unmodified lines | ||
| 220 | 220 | udelay(60); |
| 221 | 221 | } |
| 222 | 222 | |
| 223 | −static void bcmgenet_internal_phy_setup(struct net_device *dev) | |
| 224 | −{ | |
| 225 | − struct bcmgenet_priv *priv = netdev_priv(dev); | |
| 226 | − u32 reg; | |
| 227 | − | |
| 228 | − /* Power up PHY */ | |
| 229 | − bcmgenet_phy_power_set(dev, true); | |
| 230 | − /* enable APD */ | |
| 231 | − reg = bcmgenet_ext_readl(priv, EXT_EXT_PWR_MGMT); | |
| 232 | − reg |= EXT_PWR_DN_EN_LD; | |
| 233 | − bcmgenet_ext_writel(priv, reg, EXT_EXT_PWR_MGMT); | |
| 234 | − bcmgenet_mii_reset(dev); | |
| 235 | −} | |
| 236 | − | |
| 237 | 223 | static void bcmgenet_moca_phy_setup(struct bcmgenet_priv *priv) |
| 238 | 224 | { |
| 239 | 225 | u32 reg; |
| @@ -281,7 +267,6 @@ int bcmgenet_mii_config(struct net_device *dev) · 41 unmodified lines | ||
| 281 | 267 | |
| 282 | 268 | if (priv->internal_phy) { |
| 283 | 269 | phy_name = "internal PHY"; |
| 284 | − bcmgenet_internal_phy_setup(dev); | |
| 285 | 270 | } else if (priv->phy_interface == PHY_INTERFACE_MODE_MOCA) { |
| 286 | 271 | phy_name = "MoCA"; |
| 287 | 272 | bcmgenet_moca_phy_setup(priv); |
| @@ -325,7 +325,7 @@ bnad_debugfs_write_regrd(struct file *file, const char __user *buf, · 324 unmodified lines | ||
| 325 | 325 | return PTR_ERR(kern_buf); |
| 326 | 326 | |
| 327 | 327 | rc = sscanf(kern_buf, "%x:%x", &addr, &len); |
| 328 | − if (rc < 2) { | |
| 328 | + if (rc < 2 || len > UINT_MAX >> 2) { | |
| 329 | 329 | netdev_warn(bnad->netdev, "failed to read user buffer\n"); |
| 330 | 330 | kfree(kern_buf); |
| 331 | 331 | return -EINVAL; |
| @@ -152,7 +152,7 @@ struct octnic_gather { · 151 unmodified lines | ||
| 152 | 152 | */ |
| 153 | 153 | struct octeon_sg_entry *sg; |
| 154 | 154 | |
| 155 | − u64 sg_dma_ptr; | |
| 155 | + dma_addr_t sg_dma_ptr; | |
| 156 | 156 | }; |
| 157 | 157 | |
| 158 | 158 | struct handshake { |
| @@ -734,6 +734,9 @@ static void delete_glists(struct lio *lio) · 575 unmodified lines | ||
| 734 | 734 | struct octnic_gather *g; |
| 735 | 735 | int i; |
| 736 | 736 | |
| 737 | + kfree(lio->glist_lock); | |
| 738 | + lio->glist_lock = NULL; | |
| 739 | + | |
| 737 | 740 | if (!lio->glist) |
| 738 | 741 | return; |
| 739 | 742 | |
| @@ -741,23 +744,26 @@ static void delete_glists(struct lio *lio) · 1 unmodified line | ||
| 741 | 744 | do { |
| 742 | 745 | g = (struct octnic_gather *) |
| 743 | 746 | list_delete_head(&lio->glist[i]); |
| 744 | − if (g) { | |
| 745 | − if (g->sg) { | |
| 746 | − dma_unmap_single(&lio->oct_dev-> | |
| 747 | − pci_dev->dev, | |
| 748 | − g->sg_dma_ptr, | |
| 749 | − g->sg_size, | |
| 750 | − DMA_TO_DEVICE); | |
| 751 | − kfree((void *)((unsigned long)g->sg - | |
| 752 | − g->adjust)); | |
| 753 | − } | |
| 747 | + if (g) | |
| 754 | 748 | kfree(g); |
| 755 | − } | |
| 756 | 749 | } while (g); |
| 750 | + | |
| 751 | + if (lio->glists_virt_base && lio->glists_virt_base[i]) { | |
| 752 | + lio_dma_free(lio->oct_dev, | |
| 753 | + lio->glist_entry_size * lio->tx_qsize, | |
| 754 | + lio->glists_virt_base[i], | |
| 755 | + lio->glists_dma_base[i]); | |
| 756 | + } | |
| 757 | 757 | } |
| 758 | 758 | |
| 759 | − kfree((void *)lio->glist); | |
| 760 | − kfree((void *)lio->glist_lock); | |
| 759 | + kfree(lio->glists_virt_base); | |
| 760 | + lio->glists_virt_base = NULL; | |
| 761 | + | |
| 762 | + kfree(lio->glists_dma_base); | |
| 763 | + lio->glists_dma_base = NULL; | |
| 764 | + | |
| 765 | + kfree(lio->glist); | |
| 766 | + lio->glist = NULL; | |
| 761 | 767 | } |
| 762 | 768 | |
| 763 | 769 | /** |
| @@ -772,13 +778,30 @@ static int setup_glists(struct octeon_device *oct, struct lio *lio, int num_iqs) · 8 unmodified lines | ||
| 772 | 778 | lio->glist_lock = kcalloc(num_iqs, sizeof(*lio->glist_lock), |
| 773 | 779 | GFP_KERNEL); |
| 774 | 780 | if (!lio->glist_lock) |
| 775 | − return 1; | |
| 781 | + return -ENOMEM; | |
| 776 | 782 | |
| 777 | 783 | lio->glist = kcalloc(num_iqs, sizeof(*lio->glist), |
| 778 | 784 | GFP_KERNEL); |
| 779 | 785 | if (!lio->glist) { |
| 780 | − kfree((void *)lio->glist_lock); | |
| 781 | − return 1; | |
| 786 | + kfree(lio->glist_lock); | |
| 787 | + lio->glist_lock = NULL; | |
| 788 | + return -ENOMEM; | |
| 789 | + } | |
| 790 | + | |
| 791 | + lio->glist_entry_size = | |
| 792 | + ROUNDUP8((ROUNDUP4(OCTNIC_MAX_SG) >> 2) * OCT_SG_ENTRY_SIZE); | |
| 793 | + | |
| 794 | + /* allocate memory to store virtual and dma base address of | |
| 795 | + * per glist consistent memory | |
| 796 | + */ | |
| 797 | + lio->glists_virt_base = kcalloc(num_iqs, sizeof(*lio->glists_virt_base), | |
| 798 | + GFP_KERNEL); | |
| 799 | + lio->glists_dma_base = kcalloc(num_iqs, sizeof(*lio->glists_dma_base), | |
| 800 | + GFP_KERNEL); | |
| 801 | + | |
| 802 | + if (!lio->glists_virt_base || !lio->glists_dma_base) { | |
| 803 | + delete_glists(lio); | |
| 804 | + return -ENOMEM; | |
| 782 | 805 | } |
| 783 | 806 | |
| 784 | 807 | for (i = 0; i < num_iqs; i++) { |
| @@ -788,6 +811,16 @@ static int setup_glists(struct octeon_device *oct, struct lio *lio, int num_iqs) · 3 unmodified lines | ||
| 788 | 811 | |
| 789 | 812 | INIT_LIST_HEAD(&lio->glist[i]); |
| 790 | 813 | |
| 814 | + lio->glists_virt_base[i] = | |
| 815 | + lio_dma_alloc(oct, | |
| 816 | + lio->glist_entry_size * lio->tx_qsize, | |
| 817 | + &lio->glists_dma_base[i]); | |
| 818 | + | |
| 819 | + if (!lio->glists_virt_base[i]) { | |
| 820 | + delete_glists(lio); | |
| 821 | + return -ENOMEM; | |
| 822 | + } | |
| 823 | + | |
| 791 | 824 | for (j = 0; j < lio->tx_qsize; j++) { |
| 792 | 825 | g = kzalloc_node(sizeof(*g), GFP_KERNEL, |
| 793 | 826 | numa_node); |
| @@ -796,43 +829,18 @@ static int setup_glists(struct octeon_device *oct, struct lio *lio, int num_iqs) · 2 unmodified lines | ||
| 796 | 829 | if (!g) |
| 797 | 830 | break; |
| 798 | 831 | |
| 799 | − g->sg_size = ((ROUNDUP4(OCTNIC_MAX_SG) >> 2) * | |
| 800 | − OCT_SG_ENTRY_SIZE); | |
| 832 | + g->sg = lio->glists_virt_base[i] + | |
| 833 | + (j * lio->glist_entry_size); | |
| 801 | 834 | |
| 802 | − g->sg = kmalloc_node(g->sg_size + 8, | |
| 803 | − GFP_KERNEL, numa_node); | |
| 804 | − if (!g->sg) | |
| 805 | − g->sg = kmalloc(g->sg_size + 8, GFP_KERNEL); | |
| 806 | − if (!g->sg) { | |
| 807 | − kfree(g); | |
| 808 | − break; | |
| 809 | − } | |
| 810 | − | |
| 811 | − /* The gather component should be aligned on 64-bit | |
| 812 | − * boundary | |
| 813 | − */ | |
| 814 | − if (((unsigned long)g->sg) & 7) { | |
| 815 | − g->adjust = 8 - (((unsigned long)g->sg) & 7); | |
| 816 | − g->sg = (struct octeon_sg_entry *) | |
| 817 | − ((unsigned long)g->sg + g->adjust); | |
| 818 | − } | |
| 819 | − g->sg_dma_ptr = dma_map_single(&oct->pci_dev->dev, | |
| 820 | − g->sg, g->sg_size, | |
| 821 | − DMA_TO_DEVICE); | |
| 822 | − if (dma_mapping_error(&oct->pci_dev->dev, | |
| 823 | − g->sg_dma_ptr)) { | |
| 824 | − kfree((void *)((unsigned long)g->sg - | |
| 825 | − g->adjust)); | |
| 826 | − kfree(g); | |
| 827 | − break; | |
| 828 | − } | |
| 835 | + g->sg_dma_ptr = lio->glists_dma_base[i] + | |
| 836 | + (j * lio->glist_entry_size); | |
| 829 | 837 | |
| 830 | 838 | list_add_tail(&g->list, &lio->glist[i]); |
| 831 | 839 | } |
| 832 | 840 | |
| 833 | 841 | if (j != lio->tx_qsize) { |
| 834 | 842 | delete_glists(lio); |
| 835 | − return 1; | |
| 843 | + return -ENOMEM; | |
| 836 | 844 | } |
| 837 | 845 | } |
| 838 | 846 | |
| @@ -1885,9 +1893,6 @@ static void free_netsgbuf(void *buf) · 1046 unmodified lines | ||
| 1885 | 1893 | i++; |
| 1886 | 1894 | } |
| 1887 | 1895 | |
| 1888 | − dma_sync_single_for_cpu(&lio->oct_dev->pci_dev->dev, | |
| 1889 | − g->sg_dma_ptr, g->sg_size, DMA_TO_DEVICE); | |
| 1890 | − | |
| 1891 | 1896 | iq = skb_iq(lio, skb); |
| 1892 | 1897 | spin_lock(&lio->glist_lock[iq]); |
| 1893 | 1898 | list_add_tail(&g->list, &lio->glist[iq]); |
| @@ -1933,9 +1938,6 @@ static void free_netsgbuf_with_resp(void *buf) · 39 unmodified lines | ||
| 1933 | 1938 | i++; |
| 1934 | 1939 | } |
| 1935 | 1940 | |
| 1936 | − dma_sync_single_for_cpu(&lio->oct_dev->pci_dev->dev, | |
| 1937 | − g->sg_dma_ptr, g->sg_size, DMA_TO_DEVICE); | |
| 1938 | − | |
| 1939 | 1941 | iq = skb_iq(lio, skb); |
| 1940 | 1942 | |
| 1941 | 1943 | spin_lock(&lio->glist_lock[iq]); |
| @@ -3273,8 +3275,6 @@ static int liquidio_xmit(struct sk_buff *skb, struct net_device *netdev) · 1331 unmodified lines | ||
| 3273 | 3275 | i++; |
| 3274 | 3276 | } |
| 3275 | 3277 | |
| 3276 | − dma_sync_single_for_device(&oct->pci_dev->dev, g->sg_dma_ptr, | |
| 3277 | − g->sg_size, DMA_TO_DEVICE); | |
| 3278 | 3278 | dptr = g->sg_dma_ptr; |
| 3279 | 3279 | |
| 3280 | 3280 | if (OCTEON_CN23XX_PF(oct)) |
| @@ -108,6 +108,8 @@ struct octnic_gather { · 107 unmodified lines | ||
| 108 | 108 | * received from the IP layer. |
| 109 | 109 | */ |
| 110 | 110 | struct octeon_sg_entry *sg; |
| 111 | + | |
| 112 | + dma_addr_t sg_dma_ptr; | |
| 111 | 113 | }; |
| 112 | 114 | |
| 113 | 115 | struct octeon_device_priv { |
| @@ -490,6 +492,9 @@ static void delete_glists(struct lio *lio) · 376 unmodified lines | ||
| 490 | 492 | struct octnic_gather *g; |
| 491 | 493 | int i; |
| 492 | 494 | |
| 495 | + kfree(lio->glist_lock); | |
| 496 | + lio->glist_lock = NULL; | |
| 497 | + | |
| 493 | 498 | if (!lio->glist) |
| 494 | 499 | return; |
| 495 | 500 | |
| @@ -497,17 +502,26 @@ static void delete_glists(struct lio *lio) · 1 unmodified line | ||
| 497 | 502 | do { |
| 498 | 503 | g = (struct octnic_gather *) |
| 499 | 504 | list_delete_head(&lio->glist[i]); |
| 500 | − if (g) { | |
| 501 | − if (g->sg) | |
| 502 | − kfree((void *)((unsigned long)g->sg - | |
| 503 | − g->adjust)); | |
| 505 | + if (g) | |
| 504 | 506 | kfree(g); |
| 505 | − } | |
| 506 | 507 | } while (g); |
| 508 | + | |
| 509 | + if (lio->glists_virt_base && lio->glists_virt_base[i]) { | |
| 510 | + lio_dma_free(lio->oct_dev, | |
| 511 | + lio->glist_entry_size * lio->tx_qsize, | |
| 512 | + lio->glists_virt_base[i], | |
| 513 | + lio->glists_dma_base[i]); | |
| 514 | + } | |
| 507 | 515 | } |
| 508 | 516 | |
| 517 | + kfree(lio->glists_virt_base); | |
| 518 | + lio->glists_virt_base = NULL; | |
| 519 | + | |
| 520 | + kfree(lio->glists_dma_base); | |
| 521 | + lio->glists_dma_base = NULL; | |
| 522 | + | |
| 509 | 523 | kfree(lio->glist); |
| 510 | − kfree(lio->glist_lock); | |
| 524 | + lio->glist = NULL; | |
| 511 | 525 | } |
| 512 | 526 | |
| 513 | 527 | /** |
| @@ -522,13 +536,30 @@ static int setup_glists(struct lio *lio, int num_iqs) · 8 unmodified lines | ||
| 522 | 536 | lio->glist_lock = |
| 523 | 537 | kzalloc(sizeof(*lio->glist_lock) * num_iqs, GFP_KERNEL); |
| 524 | 538 | if (!lio->glist_lock) |
| 525 | − return 1; | |
| 539 | + return -ENOMEM; | |
| 526 | 540 | |
| 527 | 541 | lio->glist = |
| 528 | 542 | kzalloc(sizeof(*lio->glist) * num_iqs, GFP_KERNEL); |
| 529 | 543 | if (!lio->glist) { |
| 530 | 544 | kfree(lio->glist_lock); |
| 531 | − return 1; | |
| 545 | + lio->glist_lock = NULL; | |
| 546 | + return -ENOMEM; | |
| 547 | + } | |
| 548 | + | |
| 549 | + lio->glist_entry_size = | |
| 550 | + ROUNDUP8((ROUNDUP4(OCTNIC_MAX_SG) >> 2) * OCT_SG_ENTRY_SIZE); | |
| 551 | + | |
| 552 | + /* allocate memory to store virtual and dma base address of | |
| 553 | + * per glist consistent memory | |
| 554 | + */ | |
| 555 | + lio->glists_virt_base = kcalloc(num_iqs, sizeof(*lio->glists_virt_base), | |
| 556 | + GFP_KERNEL); | |
| 557 | + lio->glists_dma_base = kcalloc(num_iqs, sizeof(*lio->glists_dma_base), | |
| 558 | + GFP_KERNEL); | |
| 559 | + | |
| 560 | + if (!lio->glists_virt_base || !lio->glists_dma_base) { | |
| 561 | + delete_glists(lio); | |
| 562 | + return -ENOMEM; | |
| 532 | 563 | } |
| 533 | 564 | |
| 534 | 565 | for (i = 0; i < num_iqs; i++) { |
| @@ -536,34 +567,33 @@ static int setup_glists(struct lio *lio, int num_iqs) · 1 unmodified line | ||
| 536 | 567 | |
| 537 | 568 | INIT_LIST_HEAD(&lio->glist[i]); |
| 538 | 569 | |
| 570 | + lio->glists_virt_base[i] = | |
| 571 | + lio_dma_alloc(lio->oct_dev, | |
| 572 | + lio->glist_entry_size * lio->tx_qsize, | |
| 573 | + &lio->glists_dma_base[i]); | |
| 574 | + | |
| 575 | + if (!lio->glists_virt_base[i]) { | |
| 576 | + delete_glists(lio); | |
| 577 | + return -ENOMEM; | |
| 578 | + } | |
| 579 | + | |
| 539 | 580 | for (j = 0; j < lio->tx_qsize; j++) { |
| 540 | 581 | g = kzalloc(sizeof(*g), GFP_KERNEL); |
| 541 | 582 | if (!g) |
| 542 | 583 | break; |
| 543 | 584 | |
| 544 | − g->sg_size = ((ROUNDUP4(OCTNIC_MAX_SG) >> 2) * | |
| 545 | − OCT_SG_ENTRY_SIZE); | |
| 585 | + g->sg = lio->glists_virt_base[i] + | |
| 586 | + (j * lio->glist_entry_size); | |
| 546 | 587 | |
| 547 | − g->sg = kmalloc(g->sg_size + 8, GFP_KERNEL); | |
| 548 | − if (!g->sg) { | |
| 549 | − kfree(g); | |
| 550 | − break; | |
| 551 | − } | |
| 588 | + g->sg_dma_ptr = lio->glists_dma_base[i] + | |
| 589 | + (j * lio->glist_entry_size); | |
| 552 | 590 | |
| 553 | − /* The gather component should be aligned on 64-bit | |
| 554 | − * boundary | |
| 555 | − */ | |
| 556 | − if (((unsigned long)g->sg) & 7) { | |
| 557 | − g->adjust = 8 - (((unsigned long)g->sg) & 7); | |
| 558 | − g->sg = (struct octeon_sg_entry *) | |
| 559 | − ((unsigned long)g->sg + g->adjust); | |
| 560 | − } | |
| 561 | 591 | list_add_tail(&g->list, &lio->glist[i]); |
| 562 | 592 | } |
| 563 | 593 | |
| 564 | 594 | if (j != lio->tx_qsize) { |
| 565 | 595 | delete_glists(lio); |
| 566 | − return 1; | |
| 596 | + return -ENOMEM; | |
| 567 | 597 | } |
| 568 | 598 | } |
| 569 | 599 | |
| @@ -1324,10 +1354,6 @@ static void free_netsgbuf(void *buf) · 754 unmodified lines | ||
| 1324 | 1354 | i++; |
| 1325 | 1355 | } |
| 1326 | 1356 | |
| 1327 | − dma_unmap_single(&lio->oct_dev->pci_dev->dev, | |
| 1328 | − finfo->dptr, g->sg_size, | |
| 1329 | − DMA_TO_DEVICE); | |
| 1330 | − | |
| 1331 | 1357 | iq = skb_iq(lio, skb); |
| 1332 | 1358 | |
| 1333 | 1359 | spin_lock(&lio->glist_lock[iq]); |
| @@ -1374,10 +1400,6 @@ static void free_netsgbuf_with_resp(void *buf) · 40 unmodified lines | ||
| 1374 | 1400 | i++; |
| 1375 | 1401 | } |
| 1376 | 1402 | |
| 1377 | − dma_unmap_single(&lio->oct_dev->pci_dev->dev, | |
| 1378 | − finfo->dptr, g->sg_size, | |
| 1379 | − DMA_TO_DEVICE); | |
| 1380 | − | |
| 1381 | 1403 | iq = skb_iq(lio, skb); |
| 1382 | 1404 | |
| 1383 | 1405 | spin_lock(&lio->glist_lock[iq]); |
| @@ -2382,23 +2404,7 @@ static int liquidio_xmit(struct sk_buff *skb, struct net_device *netdev) · 998 unmodified lines | ||
| 2382 | 2404 | i++; |
| 2383 | 2405 | } |
| 2384 | 2406 | |
| 2385 | − dptr = dma_map_single(&oct->pci_dev->dev, | |
| 2386 | − g->sg, g->sg_size, | |
| 2387 | − DMA_TO_DEVICE); | |
| 2388 | − if (dma_mapping_error(&oct->pci_dev->dev, dptr)) { | |
| 2389 | − dev_err(&oct->pci_dev->dev, "%s DMA mapping error 4\n", | |
| 2390 | − __func__); | |
| 2391 | − dma_unmap_single(&oct->pci_dev->dev, g->sg[0].ptr[0], | |
| 2392 | − skb->len - skb->data_len, | |
| 2393 | − DMA_TO_DEVICE); | |
| 2394 | − for (j = 1; j <= frags; j++) { | |
| 2395 | − frag = &skb_shinfo(skb)->frags[j - 1]; | |
| 2396 | − dma_unmap_page(&oct->pci_dev->dev, | |
| 2397 | − g->sg[j >> 2].ptr[j & 3], | |
| 2398 | − frag->size, DMA_TO_DEVICE); | |
| 2399 | − } | |
| 2400 | − return NETDEV_TX_BUSY; | |
| 2401 | − } | |
| 2407 | + dptr = g->sg_dma_ptr; | |
| 2402 | 2408 | |
| 2403 | 2409 | ndata.cmd.cmd3.dptr = dptr; |
| 2404 | 2410 | finfo->dptr = dptr; |
| @@ -71,17 +71,17 @@ · 70 unmodified lines | ||
| 71 | 71 | #define CN23XX_MAX_RINGS_PER_VF 8 |
| 72 | 72 | |
| 73 | 73 | #define CN23XX_MAX_INPUT_QUEUES CN23XX_MAX_RINGS_PER_PF |
| 74 | −#define CN23XX_MAX_IQ_DESCRIPTORS 2048 | |
| 74 | +#define CN23XX_MAX_IQ_DESCRIPTORS 512 | |
| 75 | 75 | #define CN23XX_DB_MIN 1 |
| 76 | 76 | #define CN23XX_DB_MAX 8 |
| 77 | 77 | #define CN23XX_DB_TIMEOUT 1 |
| 78 | 78 | |
| 79 | 79 | #define CN23XX_MAX_OUTPUT_QUEUES CN23XX_MAX_RINGS_PER_PF |
| 80 | −#define CN23XX_MAX_OQ_DESCRIPTORS 2048 | |
| 80 | +#define CN23XX_MAX_OQ_DESCRIPTORS 512 | |
| 81 | 81 | #define CN23XX_OQ_BUF_SIZE 1536 |
| 82 | 82 | #define CN23XX_OQ_PKTSPER_INTR 128 |
| 83 | 83 | /*#define CAVIUM_ONLY_CN23XX_RX_PERF*/ |
| 84 | −#define CN23XX_OQ_REFIL_THRESHOLD 128 | |
| 84 | +#define CN23XX_OQ_REFIL_THRESHOLD 16 | |
| 85 | 85 | |
| 86 | 86 | #define CN23XX_OQ_INTR_PKT 64 |
| 87 | 87 | #define CN23XX_OQ_INTR_TIME 100 |
| @@ -155,11 +155,6 @@ octeon_droq_destroy_ring_buffers(struct octeon_device *oct, · 154 unmodified lines | ||
| 155 | 155 | recv_buffer_destroy(droq->recv_buf_list[i].buffer, |
| 156 | 156 | pg_info); |
| 157 | 157 | |
| 158 | − if (droq->desc_ring && droq->desc_ring[i].info_ptr) | |
| 159 | − lio_unmap_ring_info(oct->pci_dev, | |
| 160 | − (u64)droq-> | |
| 161 | − desc_ring[i].info_ptr, | |
| 162 | − OCT_DROQ_INFO_SIZE); | |
| 163 | 158 | droq->recv_buf_list[i].buffer = NULL; |
| 164 | 159 | } |
| 165 | 160 | |
| @@ -211,10 +206,7 @@ int octeon_delete_droq(struct octeon_device *oct, u32 q_no) · 45 unmodified lines | ||
| 211 | 206 | vfree(droq->recv_buf_list); |
| 212 | 207 | |
| 213 | 208 | if (droq->info_base_addr) |
| 214 | − cnnic_free_aligned_dma(oct->pci_dev, droq->info_list, | |
| 215 | − droq->info_alloc_size, | |
| 216 | − droq->info_base_addr, | |
| 217 | − droq->info_list_dma); | |
| 209 | + lio_free_info_buffer(oct, droq); | |
| 218 | 210 | |
| 219 | 211 | if (droq->desc_ring) |
| 220 | 212 | lio_dma_free(oct, (droq->max_count * OCT_DROQ_DESC_SIZE), |
| @@ -294,12 +286,7 @@ int octeon_init_droq(struct octeon_device *oct, · 73 unmodified lines | ||
| 294 | 286 | dev_dbg(&oct->pci_dev->dev, "droq[%d]: num_desc: %d\n", q_no, |
| 295 | 287 | droq->max_count); |
| 296 | 288 | |
| 297 | − droq->info_list = | |
| 298 | − cnnic_numa_alloc_aligned_dma((droq->max_count * | |
| 299 | − OCT_DROQ_INFO_SIZE), | |
| 300 | − &droq->info_alloc_size, | |
| 301 | − &droq->info_base_addr, | |
| 302 | − numa_node); | |
| 289 | + droq->info_list = lio_alloc_info_buffer(oct, droq); | |
| 303 | 290 | if (!droq->info_list) { |
| 304 | 291 | dev_err(&oct->pci_dev->dev, "Cannot allocate memory for info list.\n"); |
| 305 | 292 | lio_dma_free(oct, (droq->max_count * OCT_DROQ_DESC_SIZE), |
| @@ -325,10 +325,10 @@ struct octeon_droq { · 324 unmodified lines | ||
| 325 | 325 | size_t desc_ring_dma; |
| 326 | 326 | |
| 327 | 327 | /** Info ptr list are allocated at this virtual address. */ |
| 328 | − size_t info_base_addr; | |
| 328 | + void *info_base_addr; | |
| 329 | 329 | |
| 330 | 330 | /** DMA mapped address of the info list */ |
| 331 | − size_t info_list_dma; | |
| 331 | + dma_addr_t info_list_dma; | |
| 332 | 332 | |
| 333 | 333 | /** Allocated size of info list. */ |
| 334 | 334 | u32 info_alloc_size; |
| @@ -140,48 +140,6 @@ err_release_region: · 139 unmodified lines | ||
| 140 | 140 | return 1; |
| 141 | 141 | } |
| 142 | 142 | |
| 143 | −static inline void * | |
| 144 | −cnnic_numa_alloc_aligned_dma(u32 size, | |
| 145 | − u32 *alloc_size, | |
| 146 | − size_t *orig_ptr, | |
| 147 | − int numa_node) | |
| 148 | −{ | |
| 149 | − int retries = 0; | |
| 150 | − void *ptr = NULL; | |
| 151 | − | |
| 152 | −#define OCTEON_MAX_ALLOC_RETRIES 1 | |
| 153 | − do { | |
| 154 | − struct page *page = NULL; | |
| 155 | − | |
| 156 | − page = alloc_pages_node(numa_node, | |
| 157 | − GFP_KERNEL, | |
| 158 | − get_order(size)); | |
| 159 | − if (!page) | |
| 160 | − page = alloc_pages(GFP_KERNEL, | |
| 161 | − get_order(size)); | |
| 162 | − ptr = (void *)page_address(page); | |
| 163 | − if ((unsigned long)ptr & 0x07) { | |
| 164 | − __free_pages(page, get_order(size)); | |
| 165 | − ptr = NULL; | |
| 166 | − /* Increment the size required if the first | |
| 167 | − * attempt failed. | |
| 168 | − */ | |
| 169 | − if (!retries) | |
| 170 | − size += 7; | |
| 171 | − } | |
| 172 | − retries++; | |
| 173 | − } while ((retries <= OCTEON_MAX_ALLOC_RETRIES) && !ptr); | |
| 174 | − | |
| 175 | − *alloc_size = size; | |
| 176 | − *orig_ptr = (unsigned long)ptr; | |
| 177 | − if ((unsigned long)ptr & 0x07) | |
| 178 | − ptr = (void *)(((unsigned long)ptr + 7) & ~(7UL)); | |
| 179 | − return ptr; | |
| 180 | −} | |
| 181 | − | |
| 182 | −#define cnnic_free_aligned_dma(pci_dev, ptr, size, orig_ptr, dma_addr) \ | |
| 183 | − free_pages(orig_ptr, get_order(size)) | |
| 184 | − | |
| 185 | 143 | static inline int |
| 186 | 144 | sleep_cond(wait_queue_head_t *wait_queue, int *condition) |
| 187 | 145 | { |
| @@ -62,6 +62,9 @@ struct lio { · 61 unmodified lines | ||
| 62 | 62 | |
| 63 | 63 | /** Array of gather component linked lists */ |
| 64 | 64 | struct list_head *glist; |
| 65 | + void **glists_virt_base; | |
| 66 | + dma_addr_t *glists_dma_base; | |
| 67 | + u32 glist_entry_size; | |
| 65 | 68 | |
| 66 | 69 | /** Pointer to the NIC properties for the Octeon device this network |
| 67 | 70 | * interface is associated with. |
| @@ -344,6 +347,29 @@ static inline void tx_buffer_free(void *buffer) · 276 unmodified lines | ||
| 344 | 347 | #define lio_dma_free(oct, size, virt_addr, dma_addr) \ |
| 345 | 348 | dma_free_coherent(&(oct)->pci_dev->dev, size, virt_addr, dma_addr) |
| 346 | 349 | |
| 350 | +static inline void * | |
| 351 | +lio_alloc_info_buffer(struct octeon_device *oct, | |
| 352 | + struct octeon_droq *droq) | |
| 353 | +{ | |
| 354 | + void *virt_ptr; | |
| 355 | + | |
| 356 | + virt_ptr = lio_dma_alloc(oct, (droq->max_count * OCT_DROQ_INFO_SIZE), | |
| 357 | + &droq->info_list_dma); | |
| 358 | + if (virt_ptr) { | |
| 359 | + droq->info_alloc_size = droq->max_count * OCT_DROQ_INFO_SIZE; | |
| 360 | + droq->info_base_addr = virt_ptr; | |
| 361 | + } | |
| 362 | + | |
| 363 | + return virt_ptr; | |
| 364 | +} | |
| 365 | + | |
| 366 | +static inline void lio_free_info_buffer(struct octeon_device *oct, | |
| 367 | + struct octeon_droq *droq) | |
| 368 | +{ | |
| 369 | + lio_dma_free(oct, droq->info_alloc_size, droq->info_base_addr, | |
| 370 | + droq->info_list_dma); | |
| 371 | +} | |
| 372 | + | |
| 347 | 373 | static inline |
| 348 | 374 | void *get_rbd(struct sk_buff *skb) |
| 349 | 375 | { |
| @@ -359,22 +385,7 @@ void *get_rbd(struct sk_buff *skb) · 9 unmodified lines | ||
| 359 | 385 | static inline u64 |
| 360 | 386 | lio_map_ring_info(struct octeon_droq *droq, u32 i) |
| 361 | 387 | { |
| 362 | − dma_addr_t dma_addr; | |
| 363 | − struct octeon_device *oct = droq->oct_dev; | |
| 364 | − | |
| 365 | − dma_addr = dma_map_single(&oct->pci_dev->dev, &droq->info_list[i], | |
| 366 | − OCT_DROQ_INFO_SIZE, DMA_FROM_DEVICE); | |
| 367 | − | |
| 368 | − WARN_ON(dma_mapping_error(&oct->pci_dev->dev, dma_addr)); | |
| 369 | − | |
| 370 | − return (u64)dma_addr; | |
| 371 | −} | |
| 372 | − | |
| 373 | −static inline void | |
| 374 | −lio_unmap_ring_info(struct pci_dev *pci_dev, | |
| 375 | − u64 info_ptr, u32 size) | |
| 376 | −{ | |
| 377 | − dma_unmap_single(&pci_dev->dev, info_ptr, size, DMA_FROM_DEVICE); | |
| 388 | + return droq->info_list_dma + (i * sizeof(struct octeon_droq_info)); | |
| 378 | 389 | } |
| 379 | 390 | |
| 380 | 391 | static inline u64 |
| @@ -269,6 +269,7 @@ struct nicvf { · 268 unmodified lines | ||
| 269 | 269 | #define MAX_QUEUES_PER_QSET 8 |
| 270 | 270 | struct queue_set *qs; |
| 271 | 271 | struct nicvf_cq_poll *napi[8]; |
| 272 | + void *iommu_domain; | |
| 272 | 273 | u8 vf_id; |
| 273 | 274 | u8 sqs_id; |
| 274 | 275 | bool sqs_mode; |
| @@ -16,6 +16,7 @@ · 15 unmodified lines | ||
| 16 | 16 | #include <linux/log2.h> |
| 17 | 17 | #include <linux/prefetch.h> |
| 18 | 18 | #include <linux/irq.h> |
| 19 | +#include <linux/iommu.h> | |
| 19 | 20 | |
| 20 | 21 | #include "nic_reg.h" |
| 21 | 22 | #include "nic.h" |
| @@ -525,7 +526,12 @@ static void nicvf_snd_pkt_handler(struct net_device *netdev, · 503 unmodified lines | ||
| 525 | 526 | /* Get actual TSO descriptors and free them */ |
| 526 | 527 | tso_sqe = |
| 527 | 528 | (struct sq_hdr_subdesc *)GET_SQ_DESC(sq, hdr->rsvd2); |
| 529 | + nicvf_unmap_sndq_buffers(nic, sq, hdr->rsvd2, | |
| 530 | + tso_sqe->subdesc_cnt); | |
| 528 | 531 | nicvf_put_sq_desc(sq, tso_sqe->subdesc_cnt + 1); |
| 532 | + } else { | |
| 533 | + nicvf_unmap_sndq_buffers(nic, sq, cqe_tx->sqe_ptr, | |
| 534 | + hdr->subdesc_cnt); | |
| 529 | 535 | } |
| 530 | 536 | nicvf_put_sq_desc(sq, hdr->subdesc_cnt + 1); |
| 531 | 537 | prefetch(skb); |
| @@ -576,6 +582,7 @@ static void nicvf_rcv_pkt_handler(struct net_device *netdev, · 44 unmodified lines | ||
| 576 | 582 | { |
| 577 | 583 | struct sk_buff *skb; |
| 578 | 584 | struct nicvf *nic = netdev_priv(netdev); |
| 585 | + struct nicvf *snic = nic; | |
| 579 | 586 | int err = 0; |
| 580 | 587 | int rq_idx; |
| 581 | 588 | |
| @@ -592,7 +599,7 @@ static void nicvf_rcv_pkt_handler(struct net_device *netdev, · 10 unmodified lines | ||
| 592 | 599 | if (err && !cqe_rx->rb_cnt) |
| 593 | 600 | return; |
| 594 | 601 | |
| 595 | − skb = nicvf_get_rcv_skb(nic, cqe_rx); | |
| 602 | + skb = nicvf_get_rcv_skb(snic, cqe_rx); | |
| 596 | 603 | if (!skb) { |
| 597 | 604 | netdev_dbg(nic->netdev, "Packet not received\n"); |
| 598 | 605 | return; |
| @@ -1643,6 +1650,9 @@ static int nicvf_probe(struct pci_dev *pdev, const struct pci_device_id *ent) · 1044 unmodified lines | ||
| 1643 | 1650 | if (!pass1_silicon(nic->pdev)) |
| 1644 | 1651 | nic->hw_tso = true; |
| 1645 | 1652 | |
| 1653 | + /* Get iommu domain for iova to physical addr conversion */ | |
| 1654 | + nic->iommu_domain = iommu_get_domain_for_dev(dev); | |
| 1655 | + | |
| 1646 | 1656 | pci_read_config_word(nic->pdev, PCI_SUBSYSTEM_ID, &sdevid); |
| 1647 | 1657 | if (sdevid == 0xA134) |
| 1648 | 1658 | nic->t88 = true; |
| @@ -10,6 +10,7 @@ · 9 unmodified lines | ||
| 10 | 10 | #include <linux/netdevice.h> |
| 11 | 11 | #include <linux/ip.h> |
| 12 | 12 | #include <linux/etherdevice.h> |
| 13 | +#include <linux/iommu.h> | |
| 13 | 14 | #include <net/ip.h> |
| 14 | 15 | #include <net/tso.h> |
| 15 | 16 | |
| @@ -18,6 +19,16 @@ · 2 unmodified lines | ||
| 18 | 19 | #include "q_struct.h" |
| 19 | 20 | #include "nicvf_queues.h" |
| 20 | 21 | |
| 22 | +#define NICVF_PAGE_ORDER ((PAGE_SIZE <= 4096) ? PAGE_ALLOC_COSTLY_ORDER : 0) | |
| 23 | + | |
| 24 | +static inline u64 nicvf_iova_to_phys(struct nicvf *nic, dma_addr_t dma_addr) | |
| 25 | +{ | |
| 26 | + /* Translation is installed only when IOMMU is present */ | |
| 27 | + if (nic->iommu_domain) | |
| 28 | + return iommu_iova_to_phys(nic->iommu_domain, dma_addr); | |
| 29 | + return dma_addr; | |
| 30 | +} | |
| 31 | + | |
| 21 | 32 | static void nicvf_get_page(struct nicvf *nic) |
| 22 | 33 | { |
| 23 | 34 | if (!nic->rb_pageref || !nic->rb_page) |
| @@ -87,7 +98,7 @@ static void nicvf_free_q_desc_mem(struct nicvf *nic, struct q_desc_mem *dmem) · 63 unmodified lines | ||
| 87 | 98 | static inline int nicvf_alloc_rcv_buffer(struct nicvf *nic, gfp_t gfp, |
| 88 | 99 | u32 buf_len, u64 **rbuf) |
| 89 | 100 | { |
| 90 | − int order = (PAGE_SIZE <= 4096) ? PAGE_ALLOC_COSTLY_ORDER : 0; | |
| 101 | + int order = NICVF_PAGE_ORDER; | |
| 91 | 102 | |
| 92 | 103 | /* Check if request can be accomodated in previous allocated page */ |
| 93 | 104 | if (nic->rb_page && |
| @@ -97,22 +108,27 @@ static inline int nicvf_alloc_rcv_buffer(struct nicvf *nic, gfp_t gfp, · 3 unmodified lines | ||
| 97 | 108 | } |
| 98 | 109 | |
| 99 | 110 | nicvf_get_page(nic); |
| 100 | − nic->rb_page = NULL; | |
| 101 | 111 | |
| 102 | 112 | /* Allocate a new page */ |
| 113 | + nic->rb_page = alloc_pages(gfp | __GFP_COMP | __GFP_NOWARN, | |
| 114 | + order); | |
| 103 | 115 | if (!nic->rb_page) { |
| 104 | − nic->rb_page = alloc_pages(gfp | __GFP_COMP | __GFP_NOWARN, | |
| 105 | − order); | |
| 106 | − if (!nic->rb_page) { | |
| 107 | − this_cpu_inc(nic->pnicvf->drv_stats-> | |
| 108 | − rcv_buffer_alloc_failures); | |
| 109 | − return -ENOMEM; | |
| 110 | − } | |
| 111 | − nic->rb_page_offset = 0; | |
| 116 | + this_cpu_inc(nic->pnicvf->drv_stats->rcv_buffer_alloc_failures); | |
| 117 | + return -ENOMEM; | |
| 112 | 118 | } |
| 113 | − | |
| 119 | + nic->rb_page_offset = 0; | |
| 114 | 120 | ret: |
| 115 | − *rbuf = (u64 *)((u64)page_address(nic->rb_page) + nic->rb_page_offset); | |
| 121 | + /* HW will ensure data coherency, CPU sync not required */ | |
| 122 | + *rbuf = (u64 *)((u64)dma_map_page_attrs(&nic->pdev->dev, nic->rb_page, | |
| 123 | + nic->rb_page_offset, buf_len, | |
| 124 | + DMA_FROM_DEVICE, | |
| 125 | + DMA_ATTR_SKIP_CPU_SYNC)); | |
| 126 | + if (dma_mapping_error(&nic->pdev->dev, (dma_addr_t)*rbuf)) { | |
| 127 | + if (!nic->rb_page_offset) | |
| 128 | + __free_pages(nic->rb_page, order); | |
| 129 | + nic->rb_page = NULL; | |
| 130 | + return -ENOMEM; | |
| 131 | + } | |
| 116 | 132 | nic->rb_page_offset += buf_len; |
| 117 | 133 | |
| 118 | 134 | return 0; |
| @@ -158,16 +174,21 @@ static int nicvf_init_rbdr(struct nicvf *nic, struct rbdr *rbdr, · 39 unmodified lines | ||
| 158 | 174 | rbdr->dma_size = buf_size; |
| 159 | 175 | rbdr->enable = true; |
| 160 | 176 | rbdr->thresh = RBDR_THRESH; |
| 177 | + rbdr->head = 0; | |
| 178 | + rbdr->tail = 0; | |
| 161 | 179 | |
| 162 | 180 | nic->rb_page = NULL; |
| 163 | 181 | for (idx = 0; idx < ring_len; idx++) { |
| 164 | 182 | err = nicvf_alloc_rcv_buffer(nic, GFP_KERNEL, RCV_FRAG_LEN, |
| 165 | 183 | &rbuf); |
| 166 | − if (err) | |
| 184 | + if (err) { | |
| 185 | + /* To free already allocated and mapped ones */ | |
| 186 | + rbdr->tail = idx - 1; | |
| 167 | 187 | return err; |
| 188 | + } | |
| 168 | 189 | |
| 169 | 190 | desc = GET_RBDR_DESC(rbdr, idx); |
| 170 | − desc->buf_addr = virt_to_phys(rbuf) >> NICVF_RCV_BUF_ALIGN; | |
| 191 | + desc->buf_addr = (u64)rbuf >> NICVF_RCV_BUF_ALIGN; | |
| 171 | 192 | } |
| 172 | 193 | |
| 173 | 194 | nicvf_get_page(nic); |
| @@ -179,7 +200,7 @@ static int nicvf_init_rbdr(struct nicvf *nic, struct rbdr *rbdr, · 5 unmodified lines | ||
| 179 | 200 | static void nicvf_free_rbdr(struct nicvf *nic, struct rbdr *rbdr) |
| 180 | 201 | { |
| 181 | 202 | int head, tail; |
| 182 | − u64 buf_addr; | |
| 203 | + u64 buf_addr, phys_addr; | |
| 183 | 204 | struct rbdr_entry_t *desc; |
| 184 | 205 | |
| 185 | 206 | if (!rbdr) |
| @@ -192,18 +213,26 @@ static void nicvf_free_rbdr(struct nicvf *nic, struct rbdr *rbdr) · 6 unmodified lines | ||
| 192 | 213 | head = rbdr->head; |
| 193 | 214 | tail = rbdr->tail; |
| 194 | 215 | |
| 195 | − /* Free SKBs */ | |
| 216 | + /* Release page references */ | |
| 196 | 217 | while (head != tail) { |
| 197 | 218 | desc = GET_RBDR_DESC(rbdr, head); |
| 198 | − buf_addr = desc->buf_addr << NICVF_RCV_BUF_ALIGN; | |
| 199 | − put_page(virt_to_page(phys_to_virt(buf_addr))); | |
| 219 | + buf_addr = ((u64)desc->buf_addr) << NICVF_RCV_BUF_ALIGN; | |
| 220 | + phys_addr = nicvf_iova_to_phys(nic, buf_addr); | |
| 221 | + dma_unmap_page_attrs(&nic->pdev->dev, buf_addr, RCV_FRAG_LEN, | |
| 222 | + DMA_FROM_DEVICE, DMA_ATTR_SKIP_CPU_SYNC); | |
| 223 | + if (phys_addr) | |
| 224 | + put_page(virt_to_page(phys_to_virt(phys_addr))); | |
| 200 | 225 | head++; |
| 201 | 226 | head &= (rbdr->dmem.q_len - 1); |
| 202 | 227 | } |
| 203 | − /* Free SKB of tail desc */ | |
| 228 | + /* Release buffer of tail desc */ | |
| 204 | 229 | desc = GET_RBDR_DESC(rbdr, tail); |
| 205 | − buf_addr = desc->buf_addr << NICVF_RCV_BUF_ALIGN; | |
| 206 | − put_page(virt_to_page(phys_to_virt(buf_addr))); | |
| 230 | + buf_addr = ((u64)desc->buf_addr) << NICVF_RCV_BUF_ALIGN; | |
| 231 | + phys_addr = nicvf_iova_to_phys(nic, buf_addr); | |
| 232 | + dma_unmap_page_attrs(&nic->pdev->dev, buf_addr, RCV_FRAG_LEN, | |
| 233 | + DMA_FROM_DEVICE, DMA_ATTR_SKIP_CPU_SYNC); | |
| 234 | + if (phys_addr) | |
| 235 | + put_page(virt_to_page(phys_to_virt(phys_addr))); | |
| 207 | 236 | |
| 208 | 237 | /* Free RBDR ring */ |
| 209 | 238 | nicvf_free_q_desc_mem(nic, &rbdr->dmem); |
| @@ -250,7 +279,7 @@ refill: · 40 unmodified lines | ||
| 250 | 279 | break; |
| 251 | 280 | |
| 252 | 281 | desc = GET_RBDR_DESC(rbdr, tail); |
| 253 | − desc->buf_addr = virt_to_phys(rbuf) >> NICVF_RCV_BUF_ALIGN; | |
| 282 | + desc->buf_addr = (u64)rbuf >> NICVF_RCV_BUF_ALIGN; | |
| 254 | 283 | refill_rb_cnt--; |
| 255 | 284 | new_rb++; |
| 256 | 285 | } |
| @@ -361,9 +390,29 @@ static int nicvf_init_snd_queue(struct nicvf *nic, · 104 unmodified lines | ||
| 361 | 390 | return 0; |
| 362 | 391 | } |
| 363 | 392 | |
| 393 | +void nicvf_unmap_sndq_buffers(struct nicvf *nic, struct snd_queue *sq, | |
| 394 | + int hdr_sqe, u8 subdesc_cnt) | |
| 395 | +{ | |
| 396 | + u8 idx; | |
| 397 | + struct sq_gather_subdesc *gather; | |
| 398 | + | |
| 399 | + /* Unmap DMA mapped skb data buffers */ | |
| 400 | + for (idx = 0; idx < subdesc_cnt; idx++) { | |
| 401 | + hdr_sqe++; | |
| 402 | + hdr_sqe &= (sq->dmem.q_len - 1); | |
| 403 | + gather = (struct sq_gather_subdesc *)GET_SQ_DESC(sq, hdr_sqe); | |
| 404 | + /* HW will ensure data coherency, CPU sync not required */ | |
| 405 | + dma_unmap_page_attrs(&nic->pdev->dev, gather->addr, | |
| 406 | + gather->size, DMA_TO_DEVICE, | |
| 407 | + DMA_ATTR_SKIP_CPU_SYNC); | |
| 408 | + } | |
| 409 | +} | |
| 410 | + | |
| 364 | 411 | static void nicvf_free_snd_queue(struct nicvf *nic, struct snd_queue *sq) |
| 365 | 412 | { |
| 366 | 413 | struct sk_buff *skb; |
| 414 | + struct sq_hdr_subdesc *hdr; | |
| 415 | + struct sq_hdr_subdesc *tso_sqe; | |
| 367 | 416 | |
| 368 | 417 | if (!sq) |
| 369 | 418 | return; |
| @@ -379,8 +428,22 @@ static void nicvf_free_snd_queue(struct nicvf *nic, struct snd_queue *sq) · 9 unmodified lines | ||
| 379 | 428 | smp_rmb(); |
| 380 | 429 | while (sq->head != sq->tail) { |
| 381 | 430 | skb = (struct sk_buff *)sq->skbuff[sq->head]; |
| 382 | − if (skb) | |
| 383 | − dev_kfree_skb_any(skb); | |
| 431 | + if (!skb) | |
| 432 | + goto next; | |
| 433 | + hdr = (struct sq_hdr_subdesc *)GET_SQ_DESC(sq, sq->head); | |
| 434 | + /* Check for dummy descriptor used for HW TSO offload on 88xx */ | |
| 435 | + if (hdr->dont_send) { | |
| 436 | + /* Get actual TSO descriptors and unmap them */ | |
| 437 | + tso_sqe = | |
| 438 | + (struct sq_hdr_subdesc *)GET_SQ_DESC(sq, hdr->rsvd2); | |
| 439 | + nicvf_unmap_sndq_buffers(nic, sq, hdr->rsvd2, | |
| 440 | + tso_sqe->subdesc_cnt); | |
| 441 | + } else { | |
| 442 | + nicvf_unmap_sndq_buffers(nic, sq, sq->head, | |
| 443 | + hdr->subdesc_cnt); | |
| 444 | + } | |
| 445 | + dev_kfree_skb_any(skb); | |
| 446 | +next: | |
| 384 | 447 | sq->head++; |
| 385 | 448 | sq->head &= (sq->dmem.q_len - 1); |
| 386 | 449 | } |
| @@ -559,9 +622,11 @@ static void nicvf_rcv_queue_config(struct nicvf *nic, struct queue_set *qs, · 172 unmodified lines | ||
| 559 | 622 | nicvf_send_msg_to_pf(nic, &mbx); |
| 560 | 623 | |
| 561 | 624 | if (!nic->sqs_mode && (qidx == 0)) { |
| 562 | − /* Enable checking L3/L4 length and TCP/UDP checksums */ | |
| 625 | + /* Enable checking L3/L4 length and TCP/UDP checksums | |
| 626 | + * Also allow IPv6 pkts with zero UDP checksum. | |
| 627 | + */ | |
| 563 | 628 | nicvf_queue_reg_write(nic, NIC_QSET_RQ_GEN_CFG, 0, |
| 564 | − (BIT(24) | BIT(23) | BIT(21))); | |
| 629 | + (BIT(24) | BIT(23) | BIT(21) | BIT(20))); | |
| 565 | 630 | nicvf_config_vlan_stripping(nic, nic->netdev->features); |
| 566 | 631 | } |
| 567 | 632 | |
| @@ -882,6 +947,14 @@ static inline int nicvf_get_sq_desc(struct snd_queue *sq, int desc_cnt) · 314 unmodified lines | ||
| 882 | 947 | return qentry; |
| 883 | 948 | } |
| 884 | 949 | |
| 950 | +/* Rollback to previous tail pointer when descriptors not used */ | |
| 951 | +static inline void nicvf_rollback_sq_desc(struct snd_queue *sq, | |
| 952 | + int qentry, int desc_cnt) | |
| 953 | +{ | |
| 954 | + sq->tail = qentry; | |
| 955 | + atomic_add(desc_cnt, &sq->free_cnt); | |
| 956 | +} | |
| 957 | + | |
| 885 | 958 | /* Free descriptor back to SQ for future use */ |
| 886 | 959 | void nicvf_put_sq_desc(struct snd_queue *sq, int desc_cnt) |
| 887 | 960 | { |
| @@ -1207,8 +1280,9 @@ int nicvf_sq_append_skb(struct nicvf *nic, struct snd_queue *sq, · 319 unmodified lines | ||
| 1207 | 1280 | struct sk_buff *skb, u8 sq_num) |
| 1208 | 1281 | { |
| 1209 | 1282 | int i, size; |
| 1210 | − int subdesc_cnt, tso_sqe = 0; | |
| 1283 | + int subdesc_cnt, hdr_sqe = 0; | |
| 1211 | 1284 | int qentry; |
| 1285 | + u64 dma_addr; | |
| 1212 | 1286 | |
| 1213 | 1287 | subdesc_cnt = nicvf_sq_subdesc_required(nic, skb); |
| 1214 | 1288 | if (subdesc_cnt > atomic_read(&sq->free_cnt)) |
| @@ -1223,12 +1297,21 @@ int nicvf_sq_append_skb(struct nicvf *nic, struct snd_queue *sq, · 8 unmodified lines | ||
| 1223 | 1297 | /* Add SQ header subdesc */ |
| 1224 | 1298 | nicvf_sq_add_hdr_subdesc(nic, sq, qentry, subdesc_cnt - 1, |
| 1225 | 1299 | skb, skb->len); |
| 1226 | − tso_sqe = qentry; | |
| 1300 | + hdr_sqe = qentry; | |
| 1227 | 1301 | |
| 1228 | 1302 | /* Add SQ gather subdescs */ |
| 1229 | 1303 | qentry = nicvf_get_nxt_sqentry(sq, qentry); |
| 1230 | 1304 | size = skb_is_nonlinear(skb) ? skb_headlen(skb) : skb->len; |
| 1231 | − nicvf_sq_add_gather_subdesc(sq, qentry, size, virt_to_phys(skb->data)); | |
| 1305 | + /* HW will ensure data coherency, CPU sync not required */ | |
| 1306 | + dma_addr = dma_map_page_attrs(&nic->pdev->dev, virt_to_page(skb->data), | |
| 1307 | + offset_in_page(skb->data), size, | |
| 1308 | + DMA_TO_DEVICE, DMA_ATTR_SKIP_CPU_SYNC); | |
| 1309 | + if (dma_mapping_error(&nic->pdev->dev, dma_addr)) { | |
| 1310 | + nicvf_rollback_sq_desc(sq, qentry, subdesc_cnt); | |
| 1311 | + return 0; | |
| 1312 | + } | |
| 1313 | + | |
| 1314 | + nicvf_sq_add_gather_subdesc(sq, qentry, size, dma_addr); | |
| 1232 | 1315 | |
| 1233 | 1316 | /* Check for scattered buffer */ |
| 1234 | 1317 | if (!skb_is_nonlinear(skb)) |
| @@ -1241,15 +1324,26 @@ int nicvf_sq_append_skb(struct nicvf *nic, struct snd_queue *sq, · 6 unmodified lines | ||
| 1241 | 1324 | |
| 1242 | 1325 | qentry = nicvf_get_nxt_sqentry(sq, qentry); |
| 1243 | 1326 | size = skb_frag_size(frag); |
| 1244 | − nicvf_sq_add_gather_subdesc(sq, qentry, size, | |
| 1245 | − virt_to_phys( | |
| 1246 | − skb_frag_address(frag))); | |
| 1327 | + dma_addr = dma_map_page_attrs(&nic->pdev->dev, | |
| 1328 | + skb_frag_page(frag), | |
| 1329 | + frag->page_offset, size, | |
| 1330 | + DMA_TO_DEVICE, | |
| 1331 | + DMA_ATTR_SKIP_CPU_SYNC); | |
| 1332 | + if (dma_mapping_error(&nic->pdev->dev, dma_addr)) { | |
| 1333 | + /* Free entire chain of mapped buffers | |
| 1334 | + * here 'i' = frags mapped + above mapped skb->data | |
| 1335 | + */ | |
| 1336 | + nicvf_unmap_sndq_buffers(nic, sq, hdr_sqe, i); | |
| 1337 | + nicvf_rollback_sq_desc(sq, qentry, subdesc_cnt); | |
| 1338 | + return 0; | |
| 1339 | + } | |
| 1340 | + nicvf_sq_add_gather_subdesc(sq, qentry, size, dma_addr); | |
| 1247 | 1341 | } |
| 1248 | 1342 | |
| 1249 | 1343 | doorbell: |
| 1250 | 1344 | if (nic->t88 && skb_shinfo(skb)->gso_size) { |
| 1251 | 1345 | qentry = nicvf_get_nxt_sqentry(sq, qentry); |
| 1252 | − nicvf_sq_add_cqe_subdesc(sq, qentry, tso_sqe, skb); | |
| 1346 | + nicvf_sq_add_cqe_subdesc(sq, qentry, hdr_sqe, skb); | |
| 1253 | 1347 | } |
| 1254 | 1348 | |
| 1255 | 1349 | nicvf_sq_doorbell(nic, skb, sq_num, subdesc_cnt); |
| @@ -1282,6 +1376,7 @@ struct sk_buff *nicvf_get_rcv_skb(struct nicvf *nic, struct cqe_rx_t *cqe_rx) · 26 unmodified lines | ||
| 1282 | 1376 | int offset; |
| 1283 | 1377 | u16 *rb_lens = NULL; |
| 1284 | 1378 | u64 *rb_ptrs = NULL; |
| 1379 | + u64 phys_addr; | |
| 1285 | 1380 | |
| 1286 | 1381 | rb_lens = (void *)cqe_rx + (3 * sizeof(u64)); |
| 1287 | 1382 | /* Except 88xx pass1 on all other chips CQE_RX2_S is added to |
| @@ -1296,15 +1391,23 @@ struct sk_buff *nicvf_get_rcv_skb(struct nicvf *nic, struct cqe_rx_t *cqe_rx) · 8 unmodified lines | ||
| 1296 | 1391 | else |
| 1297 | 1392 | rb_ptrs = (void *)cqe_rx + (7 * sizeof(u64)); |
| 1298 | 1393 | |
| 1299 | − netdev_dbg(nic->netdev, "%s rb_cnt %d rb0_ptr %llx rb0_sz %d\n", | |
| 1300 | − __func__, cqe_rx->rb_cnt, cqe_rx->rb0_ptr, cqe_rx->rb0_sz); | |
| 1301 | − | |
| 1302 | 1394 | for (frag = 0; frag < cqe_rx->rb_cnt; frag++) { |
| 1303 | 1395 | payload_len = rb_lens[frag_num(frag)]; |
| 1396 | + phys_addr = nicvf_iova_to_phys(nic, *rb_ptrs); | |
| 1397 | + if (!phys_addr) { | |
| 1398 | + if (skb) | |
| 1399 | + dev_kfree_skb_any(skb); | |
| 1400 | + return NULL; | |
| 1401 | + } | |
| 1402 | + | |
| 1304 | 1403 | if (!frag) { |
| 1305 | 1404 | /* First fragment */ |
| 1405 | + dma_unmap_page_attrs(&nic->pdev->dev, | |
| 1406 | + *rb_ptrs - cqe_rx->align_pad, | |
| 1407 | + RCV_FRAG_LEN, DMA_FROM_DEVICE, | |
| 1408 | + DMA_ATTR_SKIP_CPU_SYNC); | |
| 1306 | 1409 | skb = nicvf_rb_ptr_to_skb(nic, |
| 1307 | − *rb_ptrs - cqe_rx->align_pad, | |
| 1410 | + phys_addr - cqe_rx->align_pad, | |
| 1308 | 1411 | payload_len); |
| 1309 | 1412 | if (!skb) |
| 1310 | 1413 | return NULL; |
| @@ -1312,8 +1415,11 @@ struct sk_buff *nicvf_get_rcv_skb(struct nicvf *nic, struct cqe_rx_t *cqe_rx) · 1 unmodified line | ||
| 1312 | 1415 | skb_put(skb, payload_len); |
| 1313 | 1416 | } else { |
| 1314 | 1417 | /* Add fragments */ |
| 1315 | − page = virt_to_page(phys_to_virt(*rb_ptrs)); | |
| 1316 | − offset = phys_to_virt(*rb_ptrs) - page_address(page); | |
| 1418 | + dma_unmap_page_attrs(&nic->pdev->dev, *rb_ptrs, | |
| 1419 | + RCV_FRAG_LEN, DMA_FROM_DEVICE, | |
| 1420 | + DMA_ATTR_SKIP_CPU_SYNC); | |
| 1421 | + page = virt_to_page(phys_to_virt(phys_addr)); | |
| 1422 | + offset = phys_to_virt(phys_addr) - page_address(page); | |
| 1317 | 1423 | skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, page, |
| 1318 | 1424 | offset, payload_len, RCV_FRAG_LEN); |
| 1319 | 1425 | } |
| @@ -87,7 +87,7 @@ · 86 unmodified lines | ||
| 87 | 87 | #define RCV_BUF_COUNT (1ULL << (RBDR_SIZE + 13)) |
| 88 | 88 | #define MAX_RCV_BUF_COUNT (1ULL << (RBDR_SIZE6 + 13)) |
| 89 | 89 | #define RBDR_THRESH (RCV_BUF_COUNT / 2) |
| 90 | −#define DMA_BUFFER_LEN 2048 /* In multiples of 128bytes */ | |
| 90 | +#define DMA_BUFFER_LEN 1536 /* In multiples of 128bytes */ | |
| 91 | 91 | #define RCV_FRAG_LEN (SKB_DATA_ALIGN(DMA_BUFFER_LEN + NET_SKB_PAD) + \ |
| 92 | 92 | SKB_DATA_ALIGN(sizeof(struct skb_shared_info))) |
| 93 | 93 | |
| @@ -301,6 +301,8 @@ struct queue_set { · 207 unmodified lines | ||
| 301 | 301 | |
| 302 | 302 | #define CQ_ERR_MASK (CQ_WR_FULL | CQ_WR_DISABLE | CQ_WR_FAULT) |
| 303 | 303 | |
| 304 | +void nicvf_unmap_sndq_buffers(struct nicvf *nic, struct snd_queue *sq, | |
| 305 | + int hdr_sqe, u8 subdesc_cnt); | |
| 304 | 306 | void nicvf_config_vlan_stripping(struct nicvf *nic, |
| 305 | 307 | netdev_features_t features); |
| 306 | 308 | int nicvf_set_qset_resources(struct nicvf *nic); |
| @@ -123,14 +123,44 @@ static int bgx_poll_reg(struct bgx *bgx, u8 lmac, u64 reg, u64 mask, bool zero) · 122 unmodified lines | ||
| 123 | 123 | return 1; |
| 124 | 124 | } |
| 125 | 125 | |
| 126 | +static int max_bgx_per_node; | |
| 127 | +static void set_max_bgx_per_node(struct pci_dev *pdev) | |
| 128 | +{ | |
| 129 | + u16 sdevid; | |
| 130 | + | |
| 131 | + if (max_bgx_per_node) | |
| 132 | + return; | |
| 133 | + | |
| 134 | + pci_read_config_word(pdev, PCI_SUBSYSTEM_ID, &sdevid); | |
| 135 | + switch (sdevid) { | |
| 136 | + case PCI_SUBSYS_DEVID_81XX_BGX: | |
| 137 | + max_bgx_per_node = MAX_BGX_PER_CN81XX; | |
| 138 | + break; | |
| 139 | + case PCI_SUBSYS_DEVID_83XX_BGX: | |
| 140 | + max_bgx_per_node = MAX_BGX_PER_CN83XX; | |
| 141 | + break; | |
| 142 | + case PCI_SUBSYS_DEVID_88XX_BGX: | |
| 143 | + default: | |
| 144 | + max_bgx_per_node = MAX_BGX_PER_CN88XX; | |
| 145 | + break; | |
| 146 | + } | |
| 147 | +} | |
| 148 | + | |
| 149 | +static struct bgx *get_bgx(int node, int bgx_idx) | |
| 150 | +{ | |
| 151 | + int idx = (node * max_bgx_per_node) + bgx_idx; | |
| 152 | + | |
| 153 | + return bgx_vnic[idx]; | |
| 154 | +} | |
| 155 | + | |
| 126 | 156 | /* Return number of BGX present in HW */ |
| 127 | 157 | unsigned bgx_get_map(int node) |
| 128 | 158 | { |
| 129 | 159 | int i; |
| 130 | 160 | unsigned map = 0; |
| 131 | 161 | |
| 132 | − for (i = 0; i < MAX_BGX_PER_NODE; i++) { | |
| 133 | − if (bgx_vnic[(node * MAX_BGX_PER_NODE) + i]) | |
| 162 | + for (i = 0; i < max_bgx_per_node; i++) { | |
| 163 | + if (bgx_vnic[(node * max_bgx_per_node) + i]) | |
| 134 | 164 | map |= (1 << i); |
| 135 | 165 | } |
| 136 | 166 | |
| @@ -143,7 +173,7 @@ int bgx_get_lmac_count(int node, int bgx_idx) · 6 unmodified lines | ||
| 143 | 173 | { |
| 144 | 174 | struct bgx *bgx; |
| 145 | 175 | |
| 146 | − bgx = bgx_vnic[(node * MAX_BGX_PER_NODE) + bgx_idx]; | |
| 176 | + bgx = get_bgx(node, bgx_idx); | |
| 147 | 177 | if (bgx) |
| 148 | 178 | return bgx->lmac_count; |
| 149 | 179 | |
| @@ -158,7 +188,7 @@ void bgx_get_lmac_link_state(int node, int bgx_idx, int lmacid, void *status) · 8 unmodified lines | ||
| 158 | 188 | struct bgx *bgx; |
| 159 | 189 | struct lmac *lmac; |
| 160 | 190 | |
| 161 | − bgx = bgx_vnic[(node * MAX_BGX_PER_NODE) + bgx_idx]; | |
| 191 | + bgx = get_bgx(node, bgx_idx); | |
| 162 | 192 | if (!bgx) |
| 163 | 193 | return; |
| 164 | 194 | |
| @@ -172,7 +202,7 @@ EXPORT_SYMBOL(bgx_get_lmac_link_state); · 7 unmodified lines | ||
| 172 | 202 | |
| 173 | 203 | const u8 *bgx_get_lmac_mac(int node, int bgx_idx, int lmacid) |
| 174 | 204 | { |
| 175 | − struct bgx *bgx = bgx_vnic[(node * MAX_BGX_PER_NODE) + bgx_idx]; | |
| 205 | + struct bgx *bgx = get_bgx(node, bgx_idx); | |
| 176 | 206 | |
| 177 | 207 | if (bgx) |
| 178 | 208 | return bgx->lmac[lmacid].mac; |
| @@ -183,7 +213,7 @@ EXPORT_SYMBOL(bgx_get_lmac_mac); · 4 unmodified lines | ||
| 183 | 213 | |
| 184 | 214 | void bgx_set_lmac_mac(int node, int bgx_idx, int lmacid, const u8 *mac) |
| 185 | 215 | { |
| 186 | − struct bgx *bgx = bgx_vnic[(node * MAX_BGX_PER_NODE) + bgx_idx]; | |
| 216 | + struct bgx *bgx = get_bgx(node, bgx_idx); | |
| 187 | 217 | |
| 188 | 218 | if (!bgx) |
| 189 | 219 | return; |
| @@ -194,7 +224,7 @@ EXPORT_SYMBOL(bgx_set_lmac_mac); · 4 unmodified lines | ||
| 194 | 224 | |
| 195 | 225 | void bgx_lmac_rx_tx_enable(int node, int bgx_idx, int lmacid, bool enable) |
| 196 | 226 | { |
| 197 | − struct bgx *bgx = bgx_vnic[(node * MAX_BGX_PER_NODE) + bgx_idx]; | |
| 227 | + struct bgx *bgx = get_bgx(node, bgx_idx); | |
| 198 | 228 | struct lmac *lmac; |
| 199 | 229 | u64 cfg; |
| 200 | 230 | |
| @@ -217,7 +247,7 @@ EXPORT_SYMBOL(bgx_lmac_rx_tx_enable); · 16 unmodified lines | ||
| 217 | 247 | void bgx_lmac_get_pfc(int node, int bgx_idx, int lmacid, void *pause) |
| 218 | 248 | { |
| 219 | 249 | struct pfc *pfc = (struct pfc *)pause; |
| 220 | − struct bgx *bgx = bgx_vnic[(node * MAX_BGX_PER_CN88XX) + bgx_idx]; | |
| 250 | + struct bgx *bgx = get_bgx(node, bgx_idx); | |
| 221 | 251 | struct lmac *lmac; |
| 222 | 252 | u64 cfg; |
| 223 | 253 | |
| @@ -237,7 +267,7 @@ EXPORT_SYMBOL(bgx_lmac_get_pfc); · 13 unmodified lines | ||
| 237 | 267 | void bgx_lmac_set_pfc(int node, int bgx_idx, int lmacid, void *pause) |
| 238 | 268 | { |
| 239 | 269 | struct pfc *pfc = (struct pfc *)pause; |
| 240 | − struct bgx *bgx = bgx_vnic[(node * MAX_BGX_PER_CN88XX) + bgx_idx]; | |
| 270 | + struct bgx *bgx = get_bgx(node, bgx_idx); | |
| 241 | 271 | struct lmac *lmac; |
| 242 | 272 | u64 cfg; |
| 243 | 273 | |
| @@ -369,7 +399,7 @@ u64 bgx_get_rx_stats(int node, int bgx_idx, int lmac, int idx) · 125 unmodified lines | ||
| 369 | 399 | { |
| 370 | 400 | struct bgx *bgx; |
| 371 | 401 | |
| 372 | − bgx = bgx_vnic[(node * MAX_BGX_PER_NODE) + bgx_idx]; | |
| 402 | + bgx = get_bgx(node, bgx_idx); | |
| 373 | 403 | if (!bgx) |
| 374 | 404 | return 0; |
| 375 | 405 | |
| @@ -383,7 +413,7 @@ u64 bgx_get_tx_stats(int node, int bgx_idx, int lmac, int idx) · 7 unmodified lines | ||
| 383 | 413 | { |
| 384 | 414 | struct bgx *bgx; |
| 385 | 415 | |
| 386 | − bgx = bgx_vnic[(node * MAX_BGX_PER_NODE) + bgx_idx]; | |
| 416 | + bgx = get_bgx(node, bgx_idx); | |
| 387 | 417 | if (!bgx) |
| 388 | 418 | return 0; |
| 389 | 419 | |
| @@ -411,7 +441,7 @@ void bgx_lmac_internal_loopback(int node, int bgx_idx, · 21 unmodified lines | ||
| 411 | 441 | struct lmac *lmac; |
| 412 | 442 | u64 cfg; |
| 413 | 443 | |
| 414 | − bgx = bgx_vnic[(node * MAX_BGX_PER_NODE) + bgx_idx]; | |
| 444 | + bgx = get_bgx(node, bgx_idx); | |
| 415 | 445 | if (!bgx) |
| 416 | 446 | return; |
| 417 | 447 | |
| @@ -1011,12 +1041,6 @@ static void bgx_print_qlm_mode(struct bgx *bgx, u8 lmacid) · 593 unmodified lines | ||
| 1011 | 1041 | dev_info(dev, "%s: 40G_KR4\n", (char *)str); |
| 1012 | 1042 | break; |
| 1013 | 1043 | case BGX_MODE_QSGMII: |
| 1014 | − if ((lmacid == 0) && | |
| 1015 | − (bgx_get_lane2sds_cfg(bgx, lmac) != lmacid)) | |
| 1016 | − return; | |
| 1017 | − if ((lmacid == 2) && | |
| 1018 | − (bgx_get_lane2sds_cfg(bgx, lmac) == lmacid)) | |
| 1019 | − return; | |
| 1020 | 1044 | dev_info(dev, "%s: QSGMII\n", (char *)str); |
| 1021 | 1045 | break; |
| 1022 | 1046 | case BGX_MODE_RGMII: |
| @@ -1334,11 +1358,13 @@ static int bgx_probe(struct pci_dev *pdev, const struct pci_device_id *ent) · 311 unmodified lines | ||
| 1334 | 1358 | goto err_release_regions; |
| 1335 | 1359 | } |
| 1336 | 1360 | |
| 1361 | + set_max_bgx_per_node(pdev); | |
| 1362 | + | |
| 1337 | 1363 | pci_read_config_word(pdev, PCI_DEVICE_ID, &sdevid); |
| 1338 | 1364 | if (sdevid != PCI_DEVICE_ID_THUNDER_RGX) { |
| 1339 | 1365 | bgx->bgx_id = (pci_resource_start(pdev, |
| 1340 | 1366 | PCI_CFG_REG_BAR_NUM) >> 24) & BGX_ID_MASK; |
| 1341 | − bgx->bgx_id += nic_get_node_id(pdev) * MAX_BGX_PER_NODE; | |
| 1367 | + bgx->bgx_id += nic_get_node_id(pdev) * max_bgx_per_node; | |
| 1342 | 1368 | bgx->max_lmac = MAX_LMAC_PER_BGX; |
| 1343 | 1369 | bgx_vnic[bgx->bgx_id] = bgx; |
| 1344 | 1370 | } else { |
| @@ -22,7 +22,6 @@ · 21 unmodified lines | ||
| 22 | 22 | #define MAX_BGX_PER_CN88XX 2 |
| 23 | 23 | #define MAX_BGX_PER_CN81XX 3 /* 2 BGXs + 1 RGX */ |
| 24 | 24 | #define MAX_BGX_PER_CN83XX 4 |
| 25 | −#define MAX_BGX_PER_NODE 4 | |
| 26 | 25 | #define MAX_LMAC_PER_BGX 4 |
| 27 | 26 | #define MAX_BGX_CHANS_PER_LMAC 16 |
| 28 | 27 | #define MAX_DMAC_PER_LMAC 8 |
| @@ -2589,8 +2589,6 @@ static int emac_dt_mdio_probe(struct emac_instance *dev) · 2588 unmodified lines | ||
| 2589 | 2589 | static int emac_dt_phy_connect(struct emac_instance *dev, |
| 2590 | 2590 | struct device_node *phy_handle) |
| 2591 | 2591 | { |
| 2592 | − int res; | |
| 2593 | − | |
| 2594 | 2592 | dev->phy.def = devm_kzalloc(&dev->ofdev->dev, sizeof(*dev->phy.def), |
| 2595 | 2593 | GFP_KERNEL); |
| 2596 | 2594 | if (!dev->phy.def) |
| @@ -2617,7 +2615,7 @@ static int emac_dt_phy_probe(struct emac_instance *dev) · 20 unmodified lines | ||
| 2617 | 2615 | { |
| 2618 | 2616 | struct device_node *np = dev->ofdev->dev.of_node; |
| 2619 | 2617 | struct device_node *phy_handle; |
| 2620 | − int res = 0; | |
| 2618 | + int res = 1; | |
| 2621 | 2619 | |
| 2622 | 2620 | phy_handle = of_parse_phandle(np, "phy-handle", 0); |
| 2623 | 2621 | |
| @@ -2714,13 +2712,24 @@ static int emac_init_phy(struct emac_instance *dev) · 90 unmodified lines | ||
| 2714 | 2712 | if (emac_has_feature(dev, EMAC_FTR_HAS_RGMII)) { |
| 2715 | 2713 | int res = emac_dt_phy_probe(dev); |
| 2716 | 2714 | |
| 2717 | − mutex_unlock(&emac_phy_map_lock); | |
| 2718 | − if (!res) | |
| 2715 | + switch (res) { | |
| 2716 | + case 1: | |
| 2717 | + /* No phy-handle property configured. | |
| 2718 | + * Continue with the existing phy probe | |
| 2719 | + * and setup code. | |
| 2720 | + */ | |
| 2721 | + break; | |
| 2722 | + | |
| 2723 | + case 0: | |
| 2724 | + mutex_unlock(&emac_phy_map_lock); | |
| 2719 | 2725 | goto init_phy; |
| 2720 | 2726 | |
| 2721 | − dev_err(&dev->ofdev->dev, "failed to attach dt phy (%d).\n", | |
| 2722 | − res); | |
| 2723 | − return res; | |
| 2727 | + default: | |
| 2728 | + mutex_unlock(&emac_phy_map_lock); | |
| 2729 | + dev_err(&dev->ofdev->dev, "failed to attach dt phy (%d).\n", | |
| 2730 | + res); | |
| 2731 | + return res; | |
| 2732 | + } | |
| 2724 | 2733 | } |
| 2725 | 2734 | |
| 2726 | 2735 | if (dev->phy_address != 0xffffffff) |
| @@ -404,7 +404,7 @@ static int ibmvnic_open(struct net_device *netdev) · 403 unmodified lines | ||
| 404 | 404 | send_map_query(adapter); |
| 405 | 405 | for (i = 0; i < rxadd_subcrqs; i++) { |
| 406 | 406 | init_rx_pool(adapter, &adapter->rx_pool[i], |
| 407 | − IBMVNIC_BUFFS_PER_POOL, i, | |
| 407 | + adapter->req_rx_add_entries_per_subcrq, i, | |
| 408 | 408 | be64_to_cpu(size_array[i]), 1); |
| 409 | 409 | if (alloc_rx_pool(adapter, &adapter->rx_pool[i])) { |
| 410 | 410 | dev_err(dev, "Couldn't alloc rx pool\n"); |
| @@ -419,23 +419,23 @@ static int ibmvnic_open(struct net_device *netdev) · 8 unmodified lines | ||
| 419 | 419 | for (i = 0; i < tx_subcrqs; i++) { |
| 420 | 420 | tx_pool = &adapter->tx_pool[i]; |
| 421 | 421 | tx_pool->tx_buff = |
| 422 | − kcalloc(adapter->max_tx_entries_per_subcrq, | |
| 422 | + kcalloc(adapter->req_tx_entries_per_subcrq, | |
| 423 | 423 | sizeof(struct ibmvnic_tx_buff), GFP_KERNEL); |
| 424 | 424 | if (!tx_pool->tx_buff) |
| 425 | 425 | goto tx_pool_alloc_failed; |
| 426 | 426 | |
| 427 | 427 | if (alloc_long_term_buff(adapter, &tx_pool->long_term_buff, |
| 428 | − adapter->max_tx_entries_per_subcrq * | |
| 428 | + adapter->req_tx_entries_per_subcrq * | |
| 429 | 429 | adapter->req_mtu)) |
| 430 | 430 | goto tx_ltb_alloc_failed; |
| 431 | 431 | |
| 432 | 432 | tx_pool->free_map = |
| 433 | − kcalloc(adapter->max_tx_entries_per_subcrq, | |
| 433 | + kcalloc(adapter->req_tx_entries_per_subcrq, | |
| 434 | 434 | sizeof(int), GFP_KERNEL); |
| 435 | 435 | if (!tx_pool->free_map) |
| 436 | 436 | goto tx_fm_alloc_failed; |
| 437 | 437 | |
| 438 | − for (j = 0; j < adapter->max_tx_entries_per_subcrq; j++) | |
| 438 | + for (j = 0; j < adapter->req_tx_entries_per_subcrq; j++) | |
| 439 | 439 | tx_pool->free_map[j] = j; |
| 440 | 440 | |
| 441 | 441 | tx_pool->consumer_index = 0; |
| @@ -705,6 +705,7 @@ static int ibmvnic_xmit(struct sk_buff *skb, struct net_device *netdev) · 263 unmodified lines | ||
| 705 | 705 | u8 *hdrs = (u8 *)&adapter->tx_rx_desc_req; |
| 706 | 706 | struct device *dev = &adapter->vdev->dev; |
| 707 | 707 | struct ibmvnic_tx_buff *tx_buff = NULL; |
| 708 | + struct ibmvnic_sub_crq_queue *tx_scrq; | |
| 708 | 709 | struct ibmvnic_tx_pool *tx_pool; |
| 709 | 710 | unsigned int tx_send_failed = 0; |
| 710 | 711 | unsigned int tx_map_failed = 0; |
| @@ -724,6 +725,7 @@ static int ibmvnic_xmit(struct sk_buff *skb, struct net_device *netdev) · 13 unmodified lines | ||
| 724 | 725 | int ret = 0; |
| 725 | 726 | |
| 726 | 727 | tx_pool = &adapter->tx_pool[queue_num]; |
| 728 | + tx_scrq = adapter->tx_scrq[queue_num]; | |
| 727 | 729 | txq = netdev_get_tx_queue(netdev, skb_get_queue_mapping(skb)); |
| 728 | 730 | handle_array = (u64 *)((u8 *)(adapter->login_rsp_buf) + |
| 729 | 731 | be32_to_cpu(adapter->login_rsp_buf-> |
| @@ -744,7 +746,7 @@ static int ibmvnic_xmit(struct sk_buff *skb, struct net_device *netdev) · 14 unmodified lines | ||
| 744 | 746 | |
| 745 | 747 | tx_pool->consumer_index = |
| 746 | 748 | (tx_pool->consumer_index + 1) % |
| 747 | − adapter->max_tx_entries_per_subcrq; | |
| 749 | + adapter->req_tx_entries_per_subcrq; | |
| 748 | 750 | |
| 749 | 751 | tx_buff = &tx_pool->tx_buff[index]; |
| 750 | 752 | tx_buff->skb = skb; |
| @@ -817,7 +819,7 @@ static int ibmvnic_xmit(struct sk_buff *skb, struct net_device *netdev) · 66 unmodified lines | ||
| 817 | 819 | |
| 818 | 820 | if (tx_pool->consumer_index == 0) |
| 819 | 821 | tx_pool->consumer_index = |
| 820 | − adapter->max_tx_entries_per_subcrq - 1; | |
| 822 | + adapter->req_tx_entries_per_subcrq - 1; | |
| 821 | 823 | else |
| 822 | 824 | tx_pool->consumer_index--; |
| 823 | 825 | |
| @@ -826,6 +828,14 @@ static int ibmvnic_xmit(struct sk_buff *skb, struct net_device *netdev) · 2 unmodified lines | ||
| 826 | 828 | ret = NETDEV_TX_BUSY; |
| 827 | 829 | goto out; |
| 828 | 830 | } |
| 831 | + | |
| 832 | + atomic_inc(&tx_scrq->used); | |
| 833 | + | |
| 834 | + if (atomic_read(&tx_scrq->used) >= adapter->req_tx_entries_per_subcrq) { | |
| 835 | + netdev_info(netdev, "Stopping queue %d\n", queue_num); | |
| 836 | + netif_stop_subqueue(netdev, queue_num); | |
| 837 | + } | |
| 838 | + | |
| 829 | 839 | tx_packets++; |
| 830 | 840 | tx_bytes += skb->len; |
| 831 | 841 | txq->trans_start = jiffies; |
| @@ -1213,6 +1223,7 @@ static struct ibmvnic_sub_crq_queue *init_sub_crq_queue(struct ibmvnic_adapter · 381 unmodified lines | ||
| 1213 | 1223 | scrq->adapter = adapter; |
| 1214 | 1224 | scrq->size = 4 * PAGE_SIZE / sizeof(*scrq->msgs); |
| 1215 | 1225 | scrq->cur = 0; |
| 1226 | + atomic_set(&scrq->used, 0); | |
| 1216 | 1227 | scrq->rx_skb_top = NULL; |
| 1217 | 1228 | spin_lock_init(&scrq->lock); |
| 1218 | 1229 | |
| @@ -1246,6 +1257,7 @@ static void release_sub_crqs(struct ibmvnic_adapter *adapter) · 27 unmodified lines | ||
| 1246 | 1257 | release_sub_crq_queue(adapter, |
| 1247 | 1258 | adapter->tx_scrq[i]); |
| 1248 | 1259 | } |
| 1260 | + kfree(adapter->tx_scrq); | |
| 1249 | 1261 | adapter->tx_scrq = NULL; |
| 1250 | 1262 | } |
| 1251 | 1263 | |
| @@ -1258,6 +1270,7 @@ static void release_sub_crqs(struct ibmvnic_adapter *adapter) · 6 unmodified lines | ||
| 1258 | 1270 | release_sub_crq_queue(adapter, |
| 1259 | 1271 | adapter->rx_scrq[i]); |
| 1260 | 1272 | } |
| 1273 | + kfree(adapter->rx_scrq); | |
| 1261 | 1274 | adapter->rx_scrq = NULL; |
| 1262 | 1275 | } |
| 1263 | 1276 | } |
| @@ -1355,14 +1368,28 @@ restart_loop: · 91 unmodified lines | ||
| 1355 | 1368 | DMA_TO_DEVICE); |
| 1356 | 1369 | } |
| 1357 | 1370 | |
| 1358 | − if (txbuff->last_frag) | |
| 1371 | + if (txbuff->last_frag) { | |
| 1372 | + atomic_dec(&scrq->used); | |
| 1373 | + | |
| 1374 | + if (atomic_read(&scrq->used) <= | |
| 1375 | + (adapter->req_tx_entries_per_subcrq / 2) && | |
| 1376 | + netif_subqueue_stopped(adapter->netdev, | |
| 1377 | + txbuff->skb)) { | |
| 1378 | + netif_wake_subqueue(adapter->netdev, | |
| 1379 | + scrq->pool_index); | |
| 1380 | + netdev_dbg(adapter->netdev, | |
| 1381 | + "Started queue %d\n", | |
| 1382 | + scrq->pool_index); | |
| 1383 | + } | |
| 1384 | + | |
| 1359 | 1385 | dev_kfree_skb_any(txbuff->skb); |
| 1386 | + } | |
| 1360 | 1387 | |
| 1361 | 1388 | adapter->tx_pool[pool].free_map[adapter->tx_pool[pool]. |
| 1362 | 1389 | producer_index] = index; |
| 1363 | 1390 | adapter->tx_pool[pool].producer_index = |
| 1364 | 1391 | (adapter->tx_pool[pool].producer_index + 1) % |
| 1365 | − adapter->max_tx_entries_per_subcrq; | |
| 1392 | + adapter->req_tx_entries_per_subcrq; | |
| 1366 | 1393 | } |
| 1367 | 1394 | /* remove tx_comp scrq*/ |
| 1368 | 1395 | next->tx_comp.first = 0; |
| @@ -863,6 +863,7 @@ struct ibmvnic_sub_crq_queue { · 862 unmodified lines | ||
| 863 | 863 | spinlock_t lock; |
| 864 | 864 | struct sk_buff *rx_skb_top; |
| 865 | 865 | struct ibmvnic_adapter *adapter; |
| 866 | + atomic_t used; | |
| 866 | 867 | }; |
| 867 | 868 | |
| 868 | 869 | struct ibmvnic_long_term_buff { |
| @@ -2305,6 +2305,17 @@ static int sync_toggles(struct mlx4_dev *dev) · 2304 unmodified lines | ||
| 2305 | 2305 | rd_toggle = swab32(readl(&priv->mfunc.comm->slave_read)); |
| 2306 | 2306 | if (wr_toggle == 0xffffffff || rd_toggle == 0xffffffff) { |
| 2307 | 2307 | /* PCI might be offline */ |
| 2308 | + | |
| 2309 | + /* If device removal has been requested, | |
| 2310 | + * do not continue retrying. | |
| 2311 | + */ | |
| 2312 | + if (dev->persist->interface_state & | |
| 2313 | + MLX4_INTERFACE_STATE_NOWAIT) { | |
| 2314 | + mlx4_warn(dev, | |
| 2315 | + "communication channel is offline\n"); | |
| 2316 | + return -EIO; | |
| 2317 | + } | |
| 2318 | + | |
| 2308 | 2319 | msleep(100); |
| 2309 | 2320 | wr_toggle = swab32(readl(&priv->mfunc.comm-> |
| 2310 | 2321 | slave_write)); |
| @@ -1940,6 +1940,14 @@ static int mlx4_comm_check_offline(struct mlx4_dev *dev) · 1939 unmodified lines | ||
| 1940 | 1940 | (u32)(1 << COMM_CHAN_OFFLINE_OFFSET)); |
| 1941 | 1941 | if (!offline_bit) |
| 1942 | 1942 | return 0; |
| 1943 | + | |
| 1944 | + /* If device removal has been requested, | |
| 1945 | + * do not continue retrying. | |
| 1946 | + */ | |
| 1947 | + if (dev->persist->interface_state & | |
| 1948 | + MLX4_INTERFACE_STATE_NOWAIT) | |
| 1949 | + break; | |
| 1950 | + | |
| 1943 | 1951 | /* There are cases as part of AER/Reset flow that PF needs |
| 1944 | 1952 | * around 100 msec to load. We therefore sleep for 100 msec |
| 1945 | 1953 | * to allow other tasks to make use of that CPU during this |
| @@ -3955,6 +3963,9 @@ static void mlx4_remove_one(struct pci_dev *pdev) · 2009 unmodified lines | ||
| 3955 | 3963 | struct devlink *devlink = priv_to_devlink(priv); |
| 3956 | 3964 | int active_vfs = 0; |
| 3957 | 3965 | |
| 3966 | + if (mlx4_is_slave(dev)) | |
| 3967 | + persist->interface_state |= MLX4_INTERFACE_STATE_NOWAIT; | |
| 3968 | + | |
| 3958 | 3969 | mutex_lock(&persist->interface_state_mutex); |
| 3959 | 3970 | persist->interface_state |= MLX4_INTERFACE_STATE_DELETION; |
| 3960 | 3971 | mutex_unlock(&persist->interface_state_mutex); |
| @@ -14,6 +14,7 @@ config MLX5_CORE · 13 unmodified lines | ||
| 14 | 14 | config MLX5_CORE_EN |
| 15 | 15 | bool "Mellanox Technologies ConnectX-4 Ethernet support" |
| 16 | 16 | depends on NETDEVICES && ETHERNET && PCI && MLX5_CORE |
| 17 | + depends on IPV6=y || IPV6=n || MLX5_CORE=m | |
| 17 | 18 | imply PTP_1588_CLOCK |
| 18 | 19 | default n |
| 19 | 20 | ---help--- |
| @@ -361,6 +361,8 @@ static int mlx5_internal_err_ret_value(struct mlx5_core_dev *dev, u16 op, · 360 unmodified lines | ||
| 361 | 361 | case MLX5_CMD_OP_QUERY_VPORT_COUNTER: |
| 362 | 362 | case MLX5_CMD_OP_ALLOC_Q_COUNTER: |
| 363 | 363 | case MLX5_CMD_OP_QUERY_Q_COUNTER: |
| 364 | + case MLX5_CMD_OP_SET_RATE_LIMIT: | |
| 365 | + case MLX5_CMD_OP_QUERY_RATE_LIMIT: | |
| 364 | 366 | case MLX5_CMD_OP_ALLOC_PD: |
| 365 | 367 | case MLX5_CMD_OP_ALLOC_UAR: |
| 366 | 368 | case MLX5_CMD_OP_CONFIG_INT_MODERATION: |
| @@ -497,6 +499,8 @@ const char *mlx5_command_str(int command) · 130 unmodified lines | ||
| 497 | 499 | MLX5_COMMAND_STR_CASE(ALLOC_Q_COUNTER); |
| 498 | 500 | MLX5_COMMAND_STR_CASE(DEALLOC_Q_COUNTER); |
| 499 | 501 | MLX5_COMMAND_STR_CASE(QUERY_Q_COUNTER); |
| 502 | + MLX5_COMMAND_STR_CASE(SET_RATE_LIMIT); | |
| 503 | + MLX5_COMMAND_STR_CASE(QUERY_RATE_LIMIT); | |
| 500 | 504 | MLX5_COMMAND_STR_CASE(ALLOC_PD); |
| 501 | 505 | MLX5_COMMAND_STR_CASE(DEALLOC_PD); |
| 502 | 506 | MLX5_COMMAND_STR_CASE(ALLOC_UAR); |
| @@ -928,10 +928,6 @@ void mlx5e_destroy_netdev(struct mlx5_core_dev *mdev, struct mlx5e_priv *priv); · 927 unmodified lines | ||
| 928 | 928 | int mlx5e_attach_netdev(struct mlx5_core_dev *mdev, struct net_device *netdev); |
| 929 | 929 | void mlx5e_detach_netdev(struct mlx5_core_dev *mdev, struct net_device *netdev); |
| 930 | 930 | u32 mlx5e_choose_lro_timeout(struct mlx5_core_dev *mdev, u32 wanted_timeout); |
| 931 | −void mlx5e_add_vxlan_port(struct net_device *netdev, | |
| 932 | − struct udp_tunnel_info *ti); | |
| 933 | −void mlx5e_del_vxlan_port(struct net_device *netdev, | |
| 934 | − struct udp_tunnel_info *ti); | |
| 935 | 931 | |
| 936 | 932 | int mlx5e_get_offload_stats(int attr_id, const struct net_device *dev, |
| 937 | 933 | void *sp); |
| @@ -302,6 +302,9 @@ static u8 mlx5e_dcbnl_setdcbx(struct net_device *dev, u8 mode) · 301 unmodified lines | ||
| 302 | 302 | struct mlx5e_priv *priv = netdev_priv(dev); |
| 303 | 303 | struct mlx5e_dcbx *dcbx = &priv->dcbx; |
| 304 | 304 | |
| 305 | + if (mode & DCB_CAP_DCBX_LLD_MANAGED) | |
| 306 | + return 1; | |
| 307 | + | |
| 305 | 308 | if ((!mode) && MLX5_CAP_GEN(priv->mdev, dcbx)) { |
| 306 | 309 | if (dcbx->mode == MLX5E_DCBX_PARAM_VER_OPER_AUTO) |
| 307 | 310 | return 0; |
| @@ -315,13 +318,10 @@ static u8 mlx5e_dcbnl_setdcbx(struct net_device *dev, u8 mode) · 7 unmodified lines | ||
| 315 | 318 | return 1; |
| 316 | 319 | } |
| 317 | 320 | |
| 318 | − if (mlx5e_dcbnl_switch_to_host_mode(netdev_priv(dev))) | |
| 321 | + if (!(mode & DCB_CAP_DCBX_HOST)) | |
| 319 | 322 | return 1; |
| 320 | 323 | |
| 321 | − if ((mode & DCB_CAP_DCBX_LLD_MANAGED) || | |
| 322 | − !(mode & DCB_CAP_DCBX_VER_CEE) || | |
| 323 | − !(mode & DCB_CAP_DCBX_VER_IEEE) || | |
| 324 | − !(mode & DCB_CAP_DCBX_HOST)) | |
| 324 | + if (mlx5e_dcbnl_switch_to_host_mode(netdev_priv(dev))) | |
| 325 | 325 | return 1; |
| 326 | 326 | |
| 327 | 327 | return 0; |
| @@ -3100,8 +3100,8 @@ static int mlx5e_get_vf_stats(struct net_device *dev, · 3099 unmodified lines | ||
| 3100 | 3100 | vf_stats); |
| 3101 | 3101 | } |
| 3102 | 3102 | |
| 3103 | −void mlx5e_add_vxlan_port(struct net_device *netdev, | |
| 3104 | − struct udp_tunnel_info *ti) | |
| 3103 | +static void mlx5e_add_vxlan_port(struct net_device *netdev, | |
| 3104 | + struct udp_tunnel_info *ti) | |
| 3105 | 3105 | { |
| 3106 | 3106 | struct mlx5e_priv *priv = netdev_priv(netdev); |
| 3107 | 3107 | |
| @@ -3114,8 +3114,8 @@ void mlx5e_add_vxlan_port(struct net_device *netdev, · 6 unmodified lines | ||
| 3114 | 3114 | mlx5e_vxlan_queue_work(priv, ti->sa_family, be16_to_cpu(ti->port), 1); |
| 3115 | 3115 | } |
| 3116 | 3116 | |
| 3117 | −void mlx5e_del_vxlan_port(struct net_device *netdev, | |
| 3118 | − struct udp_tunnel_info *ti) | |
| 3117 | +static void mlx5e_del_vxlan_port(struct net_device *netdev, | |
| 3118 | + struct udp_tunnel_info *ti) | |
| 3119 | 3119 | { |
| 3120 | 3120 | struct mlx5e_priv *priv = netdev_priv(netdev); |
| 3121 | 3121 | |
| @@ -393,8 +393,6 @@ static const struct net_device_ops mlx5e_netdev_ops_rep = { · 392 unmodified lines | ||
| 393 | 393 | .ndo_get_phys_port_name = mlx5e_rep_get_phys_port_name, |
| 394 | 394 | .ndo_setup_tc = mlx5e_rep_ndo_setup_tc, |
| 395 | 395 | .ndo_get_stats64 = mlx5e_rep_get_stats, |
| 396 | − .ndo_udp_tunnel_add = mlx5e_add_vxlan_port, | |
| 397 | − .ndo_udp_tunnel_del = mlx5e_del_vxlan_port, | |
| 398 | 396 | .ndo_has_offload_stats = mlx5e_has_offload_stats, |
| 399 | 397 | .ndo_get_offload_stats = mlx5e_get_offload_stats, |
| 400 | 398 | }; |
| @@ -601,6 +601,10 @@ static inline void mlx5e_build_rx_skb(struct mlx5_cqe64 *cqe, · 600 unmodified lines | ||
| 601 | 601 | if (lro_num_seg > 1) { |
| 602 | 602 | mlx5e_lro_update_hdr(skb, cqe, cqe_bcnt); |
| 603 | 603 | skb_shinfo(skb)->gso_size = DIV_ROUND_UP(cqe_bcnt, lro_num_seg); |
| 604 | + /* Subtract one since we already counted this as one | |
| 605 | + * "regular" packet in mlx5e_complete_rx_cqe() | |
| 606 | + */ | |
| 607 | + rq->stats.packets += lro_num_seg - 1; | |
| 604 | 608 | rq->stats.lro_packets++; |
| 605 | 609 | rq->stats.lro_bytes += cqe_bcnt; |
| 606 | 610 | } |
| @@ -204,9 +204,6 @@ mlx5e_test_loopback_validate(struct sk_buff *skb, · 203 unmodified lines | ||
| 204 | 204 | struct iphdr *iph; |
| 205 | 205 | |
| 206 | 206 | /* We are only going to peek, no need to clone the SKB */ |
| 207 | − if (skb->protocol != htons(ETH_P_IP)) | |
| 208 | − goto out; | |
| 209 | − | |
| 210 | 207 | if (MLX5E_TEST_PKT_SIZE - ETH_HLEN > skb_headlen(skb)) |
| 211 | 208 | goto out; |
| 212 | 209 | |
| @@ -249,7 +246,7 @@ static int mlx5e_test_loopback_setup(struct mlx5e_priv *priv, · 36 unmodified lines | ||
| 249 | 246 | lbtp->loopback_ok = false; |
| 250 | 247 | init_completion(&lbtp->comp); |
| 251 | 248 | |
| 252 | − lbtp->pt.type = htons(ETH_P_ALL); | |
| 249 | + lbtp->pt.type = htons(ETH_P_IP); | |
| 253 | 250 | lbtp->pt.func = mlx5e_test_loopback_validate; |
| 254 | 251 | lbtp->pt.dev = priv->netdev; |
| 255 | 252 | lbtp->pt.af_packet_priv = lbtp; |
| @@ -48,9 +48,14 @@ · 47 unmodified lines | ||
| 48 | 48 | #include "eswitch.h" |
| 49 | 49 | #include "vxlan.h" |
| 50 | 50 | |
| 51 | +enum { | |
| 52 | + MLX5E_TC_FLOW_ESWITCH = BIT(0), | |
| 53 | +}; | |
| 54 | + | |
| 51 | 55 | struct mlx5e_tc_flow { |
| 52 | 56 | struct rhash_head node; |
| 53 | 57 | u64 cookie; |
| 58 | + u8 flags; | |
| 54 | 59 | struct mlx5_flow_handle *rule; |
| 55 | 60 | struct list_head encap; /* flows sharing the same encap */ |
| 56 | 61 | struct mlx5_esw_flow_attr *attr; |
| @@ -128,6 +133,23 @@ err_create_ft: · 71 unmodified lines | ||
| 128 | 133 | return rule; |
| 129 | 134 | } |
| 130 | 135 | |
| 136 | +static void mlx5e_tc_del_nic_flow(struct mlx5e_priv *priv, | |
| 137 | + struct mlx5e_tc_flow *flow) | |
| 138 | +{ | |
| 139 | + struct mlx5_fc *counter = NULL; | |
| 140 | + | |
| 141 | + if (!IS_ERR(flow->rule)) { | |
| 142 | + counter = mlx5_flow_rule_counter(flow->rule); | |
| 143 | + mlx5_del_flow_rules(flow->rule); | |
| 144 | + mlx5_fc_destroy(priv->mdev, counter); | |
| 145 | + } | |
| 146 | + | |
| 147 | + if (!mlx5e_tc_num_filters(priv) && (priv->fs.tc.t)) { | |
| 148 | + mlx5_destroy_flow_table(priv->fs.tc.t); | |
| 149 | + priv->fs.tc.t = NULL; | |
| 150 | + } | |
| 151 | +} | |
| 152 | + | |
| 131 | 153 | static struct mlx5_flow_handle * |
| 132 | 154 | mlx5e_tc_add_fdb_flow(struct mlx5e_priv *priv, |
| 133 | 155 | struct mlx5_flow_spec *spec, |
| @@ -144,7 +166,24 @@ mlx5e_tc_add_fdb_flow(struct mlx5e_priv *priv, · 10 unmodified lines | ||
| 144 | 166 | } |
| 145 | 167 | |
| 146 | 168 | static void mlx5e_detach_encap(struct mlx5e_priv *priv, |
| 147 | − struct mlx5e_tc_flow *flow) { | |
| 169 | + struct mlx5e_tc_flow *flow); | |
| 170 | + | |
| 171 | +static void mlx5e_tc_del_fdb_flow(struct mlx5e_priv *priv, | |
| 172 | + struct mlx5e_tc_flow *flow) | |
| 173 | +{ | |
| 174 | + struct mlx5_eswitch *esw = priv->mdev->priv.eswitch; | |
| 175 | + | |
| 176 | + mlx5_eswitch_del_offloaded_rule(esw, flow->rule, flow->attr); | |
| 177 | + | |
| 178 | + mlx5_eswitch_del_vlan_action(esw, flow->attr); | |
| 179 | + | |
| 180 | + if (flow->attr->action & MLX5_FLOW_CONTEXT_ACTION_ENCAP) | |
| 181 | + mlx5e_detach_encap(priv, flow); | |
| 182 | +} | |
| 183 | + | |
| 184 | +static void mlx5e_detach_encap(struct mlx5e_priv *priv, | |
| 185 | + struct mlx5e_tc_flow *flow) | |
| 186 | +{ | |
| 148 | 187 | struct list_head *next = flow->encap.next; |
| 149 | 188 | |
| 150 | 189 | list_del(&flow->encap); |
| @@ -168,25 +207,10 @@ static void mlx5e_detach_encap(struct mlx5e_priv *priv, · 17 unmodified lines | ||
| 168 | 207 | static void mlx5e_tc_del_flow(struct mlx5e_priv *priv, |
| 169 | 208 | struct mlx5e_tc_flow *flow) |
| 170 | 209 | { |
| 171 | − struct mlx5_eswitch *esw = priv->mdev->priv.eswitch; | |
| 172 | − struct mlx5_fc *counter = NULL; | |
| 173 | − | |
| 174 | − if (!IS_ERR(flow->rule)) { | |
| 175 | − counter = mlx5_flow_rule_counter(flow->rule); | |
| 176 | − mlx5_del_flow_rules(flow->rule); | |
| 177 | − mlx5_fc_destroy(priv->mdev, counter); | |
| 178 | − } | |
| 179 | − | |
| 180 | − if (esw && esw->mode == SRIOV_OFFLOADS) { | |
| 181 | − mlx5_eswitch_del_vlan_action(esw, flow->attr); | |
| 182 | − if (flow->attr->action & MLX5_FLOW_CONTEXT_ACTION_ENCAP) | |
| 183 | − mlx5e_detach_encap(priv, flow); | |
| 184 | − } | |
| 185 | − | |
| 186 | − if (!mlx5e_tc_num_filters(priv) && (priv->fs.tc.t)) { | |
| 187 | − mlx5_destroy_flow_table(priv->fs.tc.t); | |
| 188 | − priv->fs.tc.t = NULL; | |
| 189 | − } | |
| 210 | + if (flow->flags & MLX5E_TC_FLOW_ESWITCH) | |
| 211 | + mlx5e_tc_del_fdb_flow(priv, flow); | |
| 212 | + else | |
| 213 | + mlx5e_tc_del_nic_flow(priv, flow); | |
| 190 | 214 | } |
| 191 | 215 | |
| 192 | 216 | static void parse_vxlan_attr(struct mlx5_flow_spec *spec, |
| @@ -243,12 +267,15 @@ static int parse_tunnel_attr(struct mlx5e_priv *priv, · 50 unmodified lines | ||
| 243 | 267 | skb_flow_dissector_target(f->dissector, |
| 244 | 268 | FLOW_DISSECTOR_KEY_ENC_PORTS, |
| 245 | 269 | f->mask); |
| 270 | + struct mlx5_eswitch *esw = priv->mdev->priv.eswitch; | |
| 271 | + struct net_device *up_dev = mlx5_eswitch_get_uplink_netdev(esw); | |
| 272 | + struct mlx5e_priv *up_priv = netdev_priv(up_dev); | |
| 246 | 273 | |
| 247 | 274 | /* Full udp dst port must be given */ |
| 248 | 275 | if (memchr_inv(&mask->dst, 0xff, sizeof(mask->dst))) |
| 249 | 276 | goto vxlan_match_offload_err; |
| 250 | 277 | |
| 251 | − if (mlx5e_vxlan_lookup_port(priv, be16_to_cpu(key->dst)) && | |
| 278 | + if (mlx5e_vxlan_lookup_port(up_priv, be16_to_cpu(key->dst)) && | |
| 252 | 279 | MLX5_CAP_ESW(priv->mdev, vxlan_encap_decap)) |
| 253 | 280 | parse_vxlan_attr(spec, f); |
| 254 | 281 | else { |
| @@ -598,6 +625,7 @@ static int __parse_cls_flower(struct mlx5e_priv *priv, · 343 unmodified lines | ||
| 598 | 625 | } |
| 599 | 626 | |
| 600 | 627 | static int parse_cls_flower(struct mlx5e_priv *priv, |
| 628 | + struct mlx5e_tc_flow *flow, | |
| 601 | 629 | struct mlx5_flow_spec *spec, |
| 602 | 630 | struct tc_cls_flower_offload *f) |
| 603 | 631 | { |
| @@ -609,7 +637,7 @@ static int parse_cls_flower(struct mlx5e_priv *priv, · 5 unmodified lines | ||
| 609 | 637 | |
| 610 | 638 | err = __parse_cls_flower(priv, spec, f, &min_inline); |
| 611 | 639 | |
| 612 | − if (!err && esw->mode == SRIOV_OFFLOADS && | |
| 640 | + if (!err && (flow->flags & MLX5E_TC_FLOW_ESWITCH) && | |
| 613 | 641 | rep->vport != FDB_UPLINK_VPORT) { |
| 614 | 642 | if (min_inline > esw->offloads.inline_mode) { |
| 615 | 643 | netdev_warn(priv->netdev, |
| @@ -970,6 +998,8 @@ static int mlx5e_attach_encap(struct mlx5e_priv *priv, · 354 unmodified lines | ||
| 970 | 998 | struct mlx5_esw_flow_attr *attr) |
| 971 | 999 | { |
| 972 | 1000 | struct mlx5_eswitch *esw = priv->mdev->priv.eswitch; |
| 1001 | + struct net_device *up_dev = mlx5_eswitch_get_uplink_netdev(esw); | |
| 1002 | + struct mlx5e_priv *up_priv = netdev_priv(up_dev); | |
| 973 | 1003 | unsigned short family = ip_tunnel_info_af(tun_info); |
| 974 | 1004 | struct ip_tunnel_key *key = &tun_info->key; |
| 975 | 1005 | struct mlx5_encap_entry *e; |
| @@ -990,7 +1020,7 @@ vxlan_encap_offload_err: · 14 unmodified lines | ||
| 990 | 1020 | return -EOPNOTSUPP; |
| 991 | 1021 | } |
| 992 | 1022 | |
| 993 | − if (mlx5e_vxlan_lookup_port(priv, be16_to_cpu(key->tp_dst)) && | |
| 1023 | + if (mlx5e_vxlan_lookup_port(up_priv, be16_to_cpu(key->tp_dst)) && | |
| 994 | 1024 | MLX5_CAP_ESW(priv->mdev, vxlan_encap_decap)) { |
| 995 | 1025 | tunnel_type = MLX5_HEADER_TYPE_VXLAN; |
| 996 | 1026 | } else { |
| @@ -1106,14 +1136,16 @@ static int parse_tc_fdb_actions(struct mlx5e_priv *priv, struct tcf_exts *exts, · 109 unmodified lines | ||
| 1106 | 1136 | } |
| 1107 | 1137 | |
| 1108 | 1138 | if (is_tcf_vlan(a)) { |
| 1109 | − if (tcf_vlan_action(a) == VLAN_F_POP) { | |
| 1139 | + if (tcf_vlan_action(a) == TCA_VLAN_ACT_POP) { | |
| 1110 | 1140 | attr->action |= MLX5_FLOW_CONTEXT_ACTION_VLAN_POP; |
| 1111 | − } else if (tcf_vlan_action(a) == VLAN_F_PUSH) { | |
| 1141 | + } else if (tcf_vlan_action(a) == TCA_VLAN_ACT_PUSH) { | |
| 1112 | 1142 | if (tcf_vlan_push_proto(a) != htons(ETH_P_8021Q)) |
| 1113 | 1143 | return -EOPNOTSUPP; |
| 1114 | 1144 | |
| 1115 | 1145 | attr->action |= MLX5_FLOW_CONTEXT_ACTION_VLAN_PUSH; |
| 1116 | 1146 | attr->vlan = tcf_vlan_push_vid(a); |
| 1147 | + } else { /* action is TCA_VLAN_ACT_MODIFY */ | |
| 1148 | + return -EOPNOTSUPP; | |
| 1117 | 1149 | } |
| 1118 | 1150 | continue; |
| 1119 | 1151 | } |
| @@ -1132,23 +1164,19 @@ int mlx5e_configure_flower(struct mlx5e_priv *priv, __be16 protocol, · 12 unmodified lines | ||
| 1132 | 1164 | struct tc_cls_flower_offload *f) |
| 1133 | 1165 | { |
| 1134 | 1166 | struct mlx5e_tc_table *tc = &priv->fs.tc; |
| 1135 | − int err = 0; | |
| 1136 | − bool fdb_flow = false; | |
| 1167 | + int err, attr_size = 0; | |
| 1137 | 1168 | u32 flow_tag, action; |
| 1138 | 1169 | struct mlx5e_tc_flow *flow; |
| 1139 | 1170 | struct mlx5_flow_spec *spec; |
| 1140 | 1171 | struct mlx5_eswitch *esw = priv->mdev->priv.eswitch; |
| 1172 | + u8 flow_flags = 0; | |
| 1141 | 1173 | |
| 1142 | − if (esw && esw->mode == SRIOV_OFFLOADS) | |
| 1143 | − fdb_flow = true; | |
| 1144 | − | |
| 1145 | − if (fdb_flow) | |
| 1146 | − flow = kzalloc(sizeof(*flow) + | |
| 1147 | − sizeof(struct mlx5_esw_flow_attr), | |
| 1148 | − GFP_KERNEL); | |
| 1149 | − else | |
| 1150 | − flow = kzalloc(sizeof(*flow), GFP_KERNEL); | |
| 1174 | + if (esw && esw->mode == SRIOV_OFFLOADS) { | |
| 1175 | + flow_flags = MLX5E_TC_FLOW_ESWITCH; | |
| 1176 | + attr_size = sizeof(struct mlx5_esw_flow_attr); | |
| 1177 | + } | |
| 1151 | 1178 | |
| 1179 | + flow = kzalloc(sizeof(*flow) + attr_size, GFP_KERNEL); | |
| 1152 | 1180 | spec = mlx5_vzalloc(sizeof(*spec)); |
| 1153 | 1181 | if (!spec || !flow) { |
| 1154 | 1182 | err = -ENOMEM; |
| @@ -1156,12 +1184,13 @@ int mlx5e_configure_flower(struct mlx5e_priv *priv, __be16 protocol, · 1 unmodified line | ||
| 1156 | 1184 | } |
| 1157 | 1185 | |
| 1158 | 1186 | flow->cookie = f->cookie; |
| 1187 | + flow->flags = flow_flags; | |
| 1159 | 1188 | |
| 1160 | − err = parse_cls_flower(priv, spec, f); | |
| 1189 | + err = parse_cls_flower(priv, flow, spec, f); | |
| 1161 | 1190 | if (err < 0) |
| 1162 | 1191 | goto err_free; |
| 1163 | 1192 | |
| 1164 | − if (fdb_flow) { | |
| 1193 | + if (flow->flags & MLX5E_TC_FLOW_ESWITCH) { | |
| 1165 | 1194 | flow->attr = (struct mlx5_esw_flow_attr *)(flow + 1); |
| 1166 | 1195 | err = parse_tc_fdb_actions(priv, f->exts, flow); |
| 1167 | 1196 | if (err < 0) |
| @@ -274,15 +274,18 @@ static netdev_tx_t mlx5e_sq_xmit(struct mlx5e_sq *sq, struct sk_buff *skb) · 273 unmodified lines | ||
| 274 | 274 | sq->stats.tso_bytes += skb->len - ihs; |
| 275 | 275 | } |
| 276 | 276 | |
| 277 | + sq->stats.packets += skb_shinfo(skb)->gso_segs; | |
| 277 | 278 | num_bytes = skb->len + (skb_shinfo(skb)->gso_segs - 1) * ihs; |
| 278 | 279 | } else { |
| 279 | 280 | bf = sq->bf_budget && |
| 280 | 281 | !skb->xmit_more && |
| 281 | 282 | !skb_shinfo(skb)->nr_frags; |
| 282 | 283 | ihs = mlx5e_get_inline_hdr_size(sq, skb, bf); |
| 284 | + sq->stats.packets++; | |
| 283 | 285 | num_bytes = max_t(unsigned int, skb->len, ETH_ZLEN); |
| 284 | 286 | } |
| 285 | 287 | |
| 288 | + sq->stats.bytes += num_bytes; | |
| 286 | 289 | wi->num_bytes = num_bytes; |
| 287 | 290 | |
| 288 | 291 | ds_cnt = sizeof(*wqe) / MLX5_SEND_WQE_DS; |
| @@ -381,8 +384,6 @@ static netdev_tx_t mlx5e_sq_xmit(struct mlx5e_sq *sq, struct sk_buff *skb) · 92 unmodified lines | ||
| 381 | 384 | if (bf) |
| 382 | 385 | sq->bf_budget--; |
| 383 | 386 | |
| 384 | − sq->stats.packets++; | |
| 385 | − sq->stats.bytes += num_bytes; | |
| 386 | 387 | return NETDEV_TX_OK; |
| 387 | 388 | |
| 388 | 389 | dma_unmap_wqe_err: |
| @@ -209,6 +209,7 @@ struct mlx5_esw_offload { · 208 unmodified lines | ||
| 209 | 209 | struct mlx5_eswitch_rep *vport_reps; |
| 210 | 210 | DECLARE_HASHTABLE(encap_tbl, 8); |
| 211 | 211 | u8 inline_mode; |
| 212 | + u64 num_flows; | |
| 212 | 213 | }; |
| 213 | 214 | |
| 214 | 215 | struct mlx5_eswitch { |
| @@ -271,6 +272,11 @@ struct mlx5_flow_handle * · 56 unmodified lines | ||
| 271 | 272 | mlx5_eswitch_add_offloaded_rule(struct mlx5_eswitch *esw, |
| 272 | 273 | struct mlx5_flow_spec *spec, |
| 273 | 274 | struct mlx5_esw_flow_attr *attr); |
| 275 | +void | |
| 276 | +mlx5_eswitch_del_offloaded_rule(struct mlx5_eswitch *esw, | |
| 277 | + struct mlx5_flow_handle *rule, | |
| 278 | + struct mlx5_esw_flow_attr *attr); | |
| 279 | + | |
| 274 | 280 | struct mlx5_flow_handle * |
| 275 | 281 | mlx5_eswitch_create_vport_rx_rule(struct mlx5_eswitch *esw, int vport, u32 tirn); |
| 276 | 282 | |
| @@ -93,10 +93,27 @@ mlx5_eswitch_add_offloaded_rule(struct mlx5_eswitch *esw, · 92 unmodified lines | ||
| 93 | 93 | spec, &flow_act, dest, i); |
| 94 | 94 | if (IS_ERR(rule)) |
| 95 | 95 | mlx5_fc_destroy(esw->dev, counter); |
| 96 | + else | |
| 97 | + esw->offloads.num_flows++; | |
| 96 | 98 | |
| 97 | 99 | return rule; |
| 98 | 100 | } |
| 99 | 101 | |
| 102 | +void | |
| 103 | +mlx5_eswitch_del_offloaded_rule(struct mlx5_eswitch *esw, | |
| 104 | + struct mlx5_flow_handle *rule, | |
| 105 | + struct mlx5_esw_flow_attr *attr) | |
| 106 | +{ | |
| 107 | + struct mlx5_fc *counter = NULL; | |
| 108 | + | |
| 109 | + if (!IS_ERR(rule)) { | |
| 110 | + counter = mlx5_flow_rule_counter(rule); | |
| 111 | + mlx5_del_flow_rules(rule); | |
| 112 | + mlx5_fc_destroy(esw->dev, counter); | |
| 113 | + esw->offloads.num_flows--; | |
| 114 | + } | |
| 115 | +} | |
| 116 | + | |
| 100 | 117 | static int esw_set_global_vlan_pop(struct mlx5_eswitch *esw, u8 val) |
| 101 | 118 | { |
| 102 | 119 | struct mlx5_eswitch_rep *rep; |
| @@ -908,6 +925,11 @@ int mlx5_devlink_eswitch_inline_mode_set(struct devlink *devlink, u8 mode) · 805 unmodified lines | ||
| 908 | 925 | MLX5_CAP_INLINE_MODE_VPORT_CONTEXT) |
| 909 | 926 | return -EOPNOTSUPP; |
| 910 | 927 | |
| 928 | + if (esw->offloads.num_flows > 0) { | |
| 929 | + esw_warn(dev, "Can't set inline mode when flows are configured\n"); | |
| 930 | + return -EOPNOTSUPP; | |
| 931 | + } | |
| 932 | + | |
| 911 | 933 | err = esw_inline_mode_from_devlink(mode, &mlx5_mode); |
| 912 | 934 | if (err) |
| 913 | 935 | goto out; |
| @@ -1136,7 +1136,7 @@ static struct mlx5_flow_group *create_autogroup(struct mlx5_flow_table *ft, · 1135 unmodified lines | ||
| 1136 | 1136 | u32 *match_criteria) |
| 1137 | 1137 | { |
| 1138 | 1138 | int inlen = MLX5_ST_SZ_BYTES(create_flow_group_in); |
| 1139 | − struct list_head *prev = ft->node.children.prev; | |
| 1139 | + struct list_head *prev = &ft->node.children; | |
| 1140 | 1140 | unsigned int candidate_index = 0; |
| 1141 | 1141 | struct mlx5_flow_group *fg; |
| 1142 | 1142 | void *match_criteria_addr; |
| @@ -87,7 +87,7 @@ static struct mlx5_profile profile[] = { · 86 unmodified lines | ||
| 87 | 87 | [2] = { |
| 88 | 88 | .mask = MLX5_PROF_MASK_QP_SIZE | |
| 89 | 89 | MLX5_PROF_MASK_MR_CACHE, |
| 90 | − .log_max_qp = 17, | |
| 90 | + .log_max_qp = 18, | |
| 91 | 91 | .mr_cache[0] = { |
| 92 | 92 | .size = 500, |
| 93 | 93 | .limit = 250 |
| @@ -1352,6 +1352,7 @@ static int init_one(struct pci_dev *pdev, · 1258 unmodified lines | ||
| 1352 | 1352 | if (err) |
| 1353 | 1353 | goto clean_load; |
| 1354 | 1354 | |
| 1355 | + pci_save_state(pdev); | |
| 1355 | 1356 | return 0; |
| 1356 | 1357 | |
| 1357 | 1358 | clean_load: |
| @@ -1407,9 +1408,8 @@ static pci_ers_result_t mlx5_pci_err_detected(struct pci_dev *pdev, · 49 unmodified lines | ||
| 1407 | 1408 | |
| 1408 | 1409 | mlx5_enter_error_state(dev); |
| 1409 | 1410 | mlx5_unload_one(dev, priv, false); |
| 1410 | − /* In case of kernel call save the pci state and drain the health wq */ | |
| 1411 | + /* In case of kernel call drain the health wq */ | |
| 1411 | 1412 | if (state) { |
| 1412 | − pci_save_state(pdev); | |
| 1413 | 1413 | mlx5_drain_health_wq(dev); |
| 1414 | 1414 | mlx5_pci_disable_device(dev); |
| 1415 | 1415 | } |
| @@ -1461,6 +1461,7 @@ static pci_ers_result_t mlx5_pci_slot_reset(struct pci_dev *pdev) · 45 unmodified lines | ||
| 1461 | 1461 | |
| 1462 | 1462 | pci_set_master(pdev); |
| 1463 | 1463 | pci_restore_state(pdev); |
| 1464 | + pci_save_state(pdev); | |
| 1464 | 1465 | |
| 1465 | 1466 | if (wait_vital(pdev)) { |
| 1466 | 1467 | dev_err(&pdev->dev, "%s: wait_vital timed out\n", __func__); |
| @@ -769,7 +769,7 @@ static inline void mlxsw_reg_spvid_pack(char *payload, u8 local_port, u16 pvid) · 768 unmodified lines | ||
| 769 | 769 | #define MLXSW_REG_SPVM_ID 0x200F |
| 770 | 770 | #define MLXSW_REG_SPVM_BASE_LEN 0x04 /* base length, without records */ |
| 771 | 771 | #define MLXSW_REG_SPVM_REC_LEN 0x04 /* record length */ |
| 772 | −#define MLXSW_REG_SPVM_REC_MAX_COUNT 256 | |
| 772 | +#define MLXSW_REG_SPVM_REC_MAX_COUNT 255 | |
| 773 | 773 | #define MLXSW_REG_SPVM_LEN (MLXSW_REG_SPVM_BASE_LEN + \ |
| 774 | 774 | MLXSW_REG_SPVM_REC_LEN * MLXSW_REG_SPVM_REC_MAX_COUNT) |
| 775 | 775 | |
| @@ -1702,7 +1702,7 @@ static inline void mlxsw_reg_sfmr_pack(char *payload, · 926 unmodified lines | ||
| 1702 | 1702 | #define MLXSW_REG_SPVMLR_ID 0x2020 |
| 1703 | 1703 | #define MLXSW_REG_SPVMLR_BASE_LEN 0x04 /* base length, without records */ |
| 1704 | 1704 | #define MLXSW_REG_SPVMLR_REC_LEN 0x04 /* record length */ |
| 1705 | −#define MLXSW_REG_SPVMLR_REC_MAX_COUNT 256 | |
| 1705 | +#define MLXSW_REG_SPVMLR_REC_MAX_COUNT 255 | |
| 1706 | 1706 | #define MLXSW_REG_SPVMLR_LEN (MLXSW_REG_SPVMLR_BASE_LEN + \ |
| 1707 | 1707 | MLXSW_REG_SPVMLR_REC_LEN * \ |
| 1708 | 1708 | MLXSW_REG_SPVMLR_REC_MAX_COUNT) |
| @@ -303,11 +303,11 @@ void mlxsw_sp_flower_destroy(struct mlxsw_sp_port *mlxsw_sp_port, bool ingress, · 302 unmodified lines | ||
| 303 | 303 | ruleset = mlxsw_sp_acl_ruleset_get(mlxsw_sp, mlxsw_sp_port->dev, |
| 304 | 304 | ingress, |
| 305 | 305 | MLXSW_SP_ACL_PROFILE_FLOWER); |
| 306 | − if (WARN_ON(IS_ERR(ruleset))) | |
| 306 | + if (IS_ERR(ruleset)) | |
| 307 | 307 | return; |
| 308 | 308 | |
| 309 | 309 | rule = mlxsw_sp_acl_rule_lookup(mlxsw_sp, ruleset, f->cookie); |
| 310 | − if (!WARN_ON(!rule)) { | |
| 310 | + if (rule) { | |
| 311 | 311 | mlxsw_sp_acl_rule_del(mlxsw_sp, rule); |
| 312 | 312 | mlxsw_sp_acl_rule_destroy(mlxsw_sp, rule); |
| 313 | 313 | } |
| @@ -422,8 +422,9 @@ static void qed_cxt_set_proto_cid_count(struct qed_hwfn *p_hwfn, · 421 unmodified lines | ||
| 422 | 422 | u32 page_sz = p_mgr->clients[ILT_CLI_CDUC].p_size.val; |
| 423 | 423 | u32 cxt_size = CONN_CXT_SIZE(p_hwfn); |
| 424 | 424 | u32 elems_per_page = ILT_PAGE_IN_BYTES(page_sz) / cxt_size; |
| 425 | + u32 align = elems_per_page * DQ_RANGE_ALIGN; | |
| 425 | 426 | |
| 426 | − p_conn->cid_count = roundup(p_conn->cid_count, elems_per_page); | |
| 427 | + p_conn->cid_count = roundup(p_conn->cid_count, align); | |
| 427 | 428 | } |
| 428 | 429 | } |
| 429 | 430 | |
| @@ -2389,9 +2389,8 @@ qed_chain_alloc_sanity_check(struct qed_dev *cdev, · 2388 unmodified lines | ||
| 2389 | 2389 | * size/capacity fields are of a u32 type. |
| 2390 | 2390 | */ |
| 2391 | 2391 | if ((cnt_type == QED_CHAIN_CNT_TYPE_U16 && |
| 2392 | − chain_size > 0x10000) || | |
| 2393 | − (cnt_type == QED_CHAIN_CNT_TYPE_U32 && | |
| 2394 | − chain_size > 0x100000000ULL)) { | |
| 2392 | + chain_size > ((u32)U16_MAX + 1)) || | |
| 2393 | + (cnt_type == QED_CHAIN_CNT_TYPE_U32 && chain_size > U32_MAX)) { | |
| 2395 | 2394 | DP_NOTICE(cdev, |
| 2396 | 2395 | "The actual chain size (0x%llx) is larger than the maximal possible value\n", |
| 2397 | 2396 | chain_size); |
| @@ -190,6 +190,9 @@ qed_sp_iscsi_func_start(struct qed_hwfn *p_hwfn, · 189 unmodified lines | ||
| 190 | 190 | p_init->num_sq_pages_in_ring = p_params->num_sq_pages_in_ring; |
| 191 | 191 | p_init->num_r2tq_pages_in_ring = p_params->num_r2tq_pages_in_ring; |
| 192 | 192 | p_init->num_uhq_pages_in_ring = p_params->num_uhq_pages_in_ring; |
| 193 | + p_init->ooo_enable = p_params->ooo_enable; | |
| 194 | + p_init->ll2_rx_queue_id = p_hwfn->hw_info.resc_start[QED_LL2_QUEUE] + | |
| 195 | + p_params->ll2_ooo_queue_id; | |
| 193 | 196 | p_init->func_params.log_page_size = p_params->log_page_size; |
| 194 | 197 | val = p_params->num_tasks; |
| 195 | 198 | p_init->func_params.num_tasks = cpu_to_le16(val); |
| @@ -786,6 +789,23 @@ static void qed_iscsi_release_connection(struct qed_hwfn *p_hwfn, · 590 unmodified lines | ||
| 786 | 789 | spin_unlock_bh(&p_hwfn->p_iscsi_info->lock); |
| 787 | 790 | } |
| 788 | 791 | |
| 792 | +void qed_iscsi_free_connection(struct qed_hwfn *p_hwfn, | |
| 793 | + struct qed_iscsi_conn *p_conn) | |
| 794 | +{ | |
| 795 | + qed_chain_free(p_hwfn->cdev, &p_conn->xhq); | |
| 796 | + qed_chain_free(p_hwfn->cdev, &p_conn->uhq); | |
| 797 | + qed_chain_free(p_hwfn->cdev, &p_conn->r2tq); | |
| 798 | + dma_free_coherent(&p_hwfn->cdev->pdev->dev, | |
| 799 | + sizeof(struct tcp_upload_params), | |
| 800 | + p_conn->tcp_upload_params_virt_addr, | |
| 801 | + p_conn->tcp_upload_params_phys_addr); | |
| 802 | + dma_free_coherent(&p_hwfn->cdev->pdev->dev, | |
| 803 | + sizeof(struct scsi_terminate_extra_params), | |
| 804 | + p_conn->queue_cnts_virt_addr, | |
| 805 | + p_conn->queue_cnts_phys_addr); | |
| 806 | + kfree(p_conn); | |
| 807 | +} | |
| 808 | + | |
| 789 | 809 | struct qed_iscsi_info *qed_iscsi_alloc(struct qed_hwfn *p_hwfn) |
| 790 | 810 | { |
| 791 | 811 | struct qed_iscsi_info *p_iscsi_info; |
| @@ -807,6 +827,17 @@ void qed_iscsi_setup(struct qed_hwfn *p_hwfn, · 15 unmodified lines | ||
| 807 | 827 | void qed_iscsi_free(struct qed_hwfn *p_hwfn, |
| 808 | 828 | struct qed_iscsi_info *p_iscsi_info) |
| 809 | 829 | { |
| 830 | + struct qed_iscsi_conn *p_conn = NULL; | |
| 831 | + | |
| 832 | + while (!list_empty(&p_hwfn->p_iscsi_info->free_list)) { | |
| 833 | + p_conn = list_first_entry(&p_hwfn->p_iscsi_info->free_list, | |
| 834 | + struct qed_iscsi_conn, list_entry); | |
| 835 | + if (p_conn) { | |
| 836 | + list_del(&p_conn->list_entry); | |
| 837 | + qed_iscsi_free_connection(p_hwfn, p_conn); | |
| 838 | + } | |
| 839 | + } | |
| 840 | + | |
| 810 | 841 | kfree(p_iscsi_info); |
| 811 | 842 | } |
| 812 | 843 | |
| @@ -211,6 +211,8 @@ static void qed_ll2b_complete_rx_packet(struct qed_hwfn *p_hwfn, · 210 unmodified lines | ||
| 211 | 211 | /* If need to reuse or there's no replacement buffer, repost this */ |
| 212 | 212 | if (rc) |
| 213 | 213 | goto out_post; |
| 214 | + dma_unmap_single(&cdev->pdev->dev, buffer->phys_addr, | |
| 215 | + cdev->ll2->rx_size, DMA_FROM_DEVICE); | |
| 214 | 216 | |
| 215 | 217 | skb = build_skb(buffer->data, 0); |
| 216 | 218 | if (!skb) { |
| @@ -474,7 +476,7 @@ qed_ll2_rxq_completion_gsi(struct qed_hwfn *p_hwfn, · 257 unmodified lines | ||
| 474 | 476 | static int qed_ll2_rxq_completion_reg(struct qed_hwfn *p_hwfn, |
| 475 | 477 | struct qed_ll2_info *p_ll2_conn, |
| 476 | 478 | union core_rx_cqe_union *p_cqe, |
| 477 | − unsigned long lock_flags, | |
| 479 | + unsigned long *p_lock_flags, | |
| 478 | 480 | bool b_last_cqe) |
| 479 | 481 | { |
| 480 | 482 | struct qed_ll2_rx_queue *p_rx = &p_ll2_conn->rx_queue; |
| @@ -495,10 +497,10 @@ static int qed_ll2_rxq_completion_reg(struct qed_hwfn *p_hwfn, · 14 unmodified lines | ||
| 495 | 497 | "Mismatch between active_descq and the LL2 Rx chain\n"); |
| 496 | 498 | list_add_tail(&p_pkt->list_entry, &p_rx->free_descq); |
| 497 | 499 | |
| 498 | − spin_unlock_irqrestore(&p_rx->lock, lock_flags); | |
| 500 | + spin_unlock_irqrestore(&p_rx->lock, *p_lock_flags); | |
| 499 | 501 | qed_ll2b_complete_rx_packet(p_hwfn, p_ll2_conn->my_id, |
| 500 | 502 | p_pkt, &p_cqe->rx_cqe_fp, b_last_cqe); |
| 501 | − spin_lock_irqsave(&p_rx->lock, lock_flags); | |
| 503 | + spin_lock_irqsave(&p_rx->lock, *p_lock_flags); | |
| 502 | 504 | |
| 503 | 505 | return 0; |
| 504 | 506 | } |
| @@ -538,7 +540,8 @@ static int qed_ll2_rxq_completion(struct qed_hwfn *p_hwfn, void *cookie) · 33 unmodified lines | ||
| 538 | 540 | break; |
| 539 | 541 | case CORE_RX_CQE_TYPE_REGULAR: |
| 540 | 542 | rc = qed_ll2_rxq_completion_reg(p_hwfn, p_ll2_conn, |
| 541 | − cqe, flags, b_last_cqe); | |
| 543 | + cqe, &flags, | |
| 544 | + b_last_cqe); | |
| 542 | 545 | break; |
| 543 | 546 | default: |
| 544 | 547 | rc = -EIO; |
| @@ -968,7 +971,7 @@ static int qed_ll2_start_ooo(struct qed_dev *cdev, · 423 unmodified lines | ||
| 968 | 971 | { |
| 969 | 972 | struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev); |
| 970 | 973 | u8 *handle = &hwfn->pf_params.iscsi_pf_params.ll2_ooo_queue_id; |
| 971 | − struct qed_ll2_conn ll2_info; | |
| 974 | + struct qed_ll2_conn ll2_info = { 0 }; | |
| 972 | 975 | int rc; |
| 973 | 976 | |
| 974 | 977 | ll2_info.conn_type = QED_LL2_TYPE_ISCSI_OOO; |
| @@ -159,6 +159,8 @@ struct qed_ooo_info *qed_ooo_alloc(struct qed_hwfn *p_hwfn) · 158 unmodified lines | ||
| 159 | 159 | if (!p_ooo_info->ooo_history.p_cqes) |
| 160 | 160 | goto no_history_mem; |
| 161 | 161 | |
| 162 | + p_ooo_info->ooo_history.num_of_cqes = QED_MAX_NUM_OOO_HISTORY_ENTRIES; | |
| 163 | + | |
| 162 | 164 | return p_ooo_info; |
| 163 | 165 | |
| 164 | 166 | no_history_mem: |
| @@ -2404,7 +2404,7 @@ static void efx_udp_tunnel_del(struct net_device *dev, struct udp_tunnel_info *t · 2403 unmodified lines | ||
| 2404 | 2404 | tnl.type = (u16)efx_tunnel_type; |
| 2405 | 2405 | tnl.port = ti->port; |
| 2406 | 2406 | |
| 2407 | − if (efx->type->udp_tnl_add_port) | |
| 2407 | + if (efx->type->udp_tnl_del_port) | |
| 2408 | 2408 | (void)efx->type->udp_tnl_del_port(efx, tnl); |
| 2409 | 2409 | } |
| 2410 | 2410 | |
| @@ -1535,32 +1535,33 @@ static int smc_close(struct net_device *dev) · 1534 unmodified lines | ||
| 1535 | 1535 | * Ethtool support |
| 1536 | 1536 | */ |
| 1537 | 1537 | static int |
| 1538 | −smc_ethtool_getsettings(struct net_device *dev, struct ethtool_cmd *cmd) | |
| 1538 | +smc_ethtool_get_link_ksettings(struct net_device *dev, | |
| 1539 | + struct ethtool_link_ksettings *cmd) | |
| 1539 | 1540 | { |
| 1540 | 1541 | struct smc_local *lp = netdev_priv(dev); |
| 1541 | 1542 | int ret; |
| 1542 | 1543 | |
| 1543 | − cmd->maxtxpkt = 1; | |
| 1544 | − cmd->maxrxpkt = 1; | |
| 1545 | − | |
| 1546 | 1544 | if (lp->phy_type != 0) { |
| 1547 | 1545 | spin_lock_irq(&lp->lock); |
| 1548 | − ret = mii_ethtool_gset(&lp->mii, cmd); | |
| 1546 | + ret = mii_ethtool_get_link_ksettings(&lp->mii, cmd); | |
| 1549 | 1547 | spin_unlock_irq(&lp->lock); |
| 1550 | 1548 | } else { |
| 1551 | − cmd->supported = SUPPORTED_10baseT_Half | | |
| 1549 | + u32 supported = SUPPORTED_10baseT_Half | | |
| 1552 | 1550 | SUPPORTED_10baseT_Full | |
| 1553 | 1551 | SUPPORTED_TP | SUPPORTED_AUI; |
| 1554 | 1552 | |
| 1555 | 1553 | if (lp->ctl_rspeed == 10) |
| 1556 | − ethtool_cmd_speed_set(cmd, SPEED_10); | |
| 1554 | + cmd->base.speed = SPEED_10; | |
| 1557 | 1555 | else if (lp->ctl_rspeed == 100) |
| 1558 | − ethtool_cmd_speed_set(cmd, SPEED_100); | |
| 1556 | + cmd->base.speed = SPEED_100; | |
| 1557 | + | |
| 1558 | + cmd->base.autoneg = AUTONEG_DISABLE; | |
| 1559 | + cmd->base.port = 0; | |
| 1560 | + cmd->base.duplex = lp->tcr_cur_mode & TCR_SWFDUP ? | |
| 1561 | + DUPLEX_FULL : DUPLEX_HALF; | |
| 1559 | 1562 | |
| 1560 | − cmd->autoneg = AUTONEG_DISABLE; | |
| 1561 | − cmd->transceiver = XCVR_INTERNAL; | |
| 1562 | − cmd->port = 0; | |
| 1563 | − cmd->duplex = lp->tcr_cur_mode & TCR_SWFDUP ? DUPLEX_FULL : DUPLEX_HALF; | |
| 1563 | + ethtool_convert_legacy_u32_to_link_mode( | |
| 1564 | + cmd->link_modes.supported, supported); | |
| 1564 | 1565 | |
| 1565 | 1566 | ret = 0; |
| 1566 | 1567 | } |
| @@ -1569,24 +1570,26 @@ smc_ethtool_getsettings(struct net_device *dev, struct ethtool_cmd *cmd) · 2 unmodified lines | ||
| 1569 | 1570 | } |
| 1570 | 1571 | |
| 1571 | 1572 | static int |
| 1572 | −smc_ethtool_setsettings(struct net_device *dev, struct ethtool_cmd *cmd) | |
| 1573 | +smc_ethtool_set_link_ksettings(struct net_device *dev, | |
| 1574 | + const struct ethtool_link_ksettings *cmd) | |
| 1573 | 1575 | { |
| 1574 | 1576 | struct smc_local *lp = netdev_priv(dev); |
| 1575 | 1577 | int ret; |
| 1576 | 1578 | |
| 1577 | 1579 | if (lp->phy_type != 0) { |
| 1578 | 1580 | spin_lock_irq(&lp->lock); |
| 1579 | − ret = mii_ethtool_sset(&lp->mii, cmd); | |
| 1581 | + ret = mii_ethtool_set_link_ksettings(&lp->mii, cmd); | |
| 1580 | 1582 | spin_unlock_irq(&lp->lock); |
| 1581 | 1583 | } else { |
| 1582 | − if (cmd->autoneg != AUTONEG_DISABLE || | |
| 1583 | − cmd->speed != SPEED_10 || | |
| 1584 | − (cmd->duplex != DUPLEX_HALF && cmd->duplex != DUPLEX_FULL) || | |
| 1585 | − (cmd->port != PORT_TP && cmd->port != PORT_AUI)) | |
| 1584 | + if (cmd->base.autoneg != AUTONEG_DISABLE || | |
| 1585 | + cmd->base.speed != SPEED_10 || | |
| 1586 | + (cmd->base.duplex != DUPLEX_HALF && | |
| 1587 | + cmd->base.duplex != DUPLEX_FULL) || | |
| 1588 | + (cmd->base.port != PORT_TP && cmd->base.port != PORT_AUI)) | |
| 1586 | 1589 | return -EINVAL; |
| 1587 | 1590 | |
| 1588 | −// lp->port = cmd->port; | |
| 1589 | − lp->ctl_rfduplx = cmd->duplex == DUPLEX_FULL; | |
| 1591 | +// lp->port = cmd->base.port; | |
| 1592 | + lp->ctl_rfduplx = cmd->base.duplex == DUPLEX_FULL; | |
| 1590 | 1593 | |
| 1591 | 1594 | // if (netif_running(dev)) |
| 1592 | 1595 | // smc_set_port(dev); |
| @@ -1744,8 +1747,6 @@ static int smc_ethtool_seteeprom(struct net_device *dev, · 151 unmodified lines | ||
| 1744 | 1747 | |
| 1745 | 1748 | |
| 1746 | 1749 | static const struct ethtool_ops smc_ethtool_ops = { |
| 1747 | − .get_settings = smc_ethtool_getsettings, | |
| 1748 | − .set_settings = smc_ethtool_setsettings, | |
| 1749 | 1750 | .get_drvinfo = smc_ethtool_getdrvinfo, |
| 1750 | 1751 | |
| 1751 | 1752 | .get_msglevel = smc_ethtool_getmsglevel, |
| @@ -1755,6 +1756,8 @@ static const struct ethtool_ops smc_ethtool_ops = { · 3 unmodified lines | ||
| 1755 | 1756 | .get_eeprom_len = smc_ethtool_geteeprom_len, |
| 1756 | 1757 | .get_eeprom = smc_ethtool_geteeprom, |
| 1757 | 1758 | .set_eeprom = smc_ethtool_seteeprom, |
| 1759 | + .get_link_ksettings = smc_ethtool_get_link_ksettings, | |
| 1760 | + .set_link_ksettings = smc_ethtool_set_link_ksettings, | |
| 1758 | 1761 | }; |
| 1759 | 1762 | |
| 1760 | 1763 | static const struct net_device_ops smc_netdev_ops = { |
| @@ -74,15 +74,21 @@ config TI_CPSW · 73 unmodified lines | ||
| 74 | 74 | will be called cpsw. |
| 75 | 75 | |
| 76 | 76 | config TI_CPTS |
| 77 | − tristate "TI Common Platform Time Sync (CPTS) Support" | |
| 77 | + bool "TI Common Platform Time Sync (CPTS) Support" | |
| 78 | 78 | depends on TI_CPSW || TI_KEYSTONE_NETCP |
| 79 | − imply PTP_1588_CLOCK | |
| 79 | + depends on PTP_1588_CLOCK | |
| 80 | 80 | ---help--- |
| 81 | 81 | This driver supports the Common Platform Time Sync unit of |
| 82 | 82 | the CPSW Ethernet Switch and Keystone 2 1g/10g Switch Subsystem. |
| 83 | 83 | The unit can time stamp PTP UDP/IPv4 and Layer 2 packets, and the |
| 84 | 84 | driver offers a PTP Hardware Clock. |
| 85 | 85 | |
| 86 | +config TI_CPTS_MOD | |
| 87 | + tristate | |
| 88 | + depends on TI_CPTS | |
| 89 | + default y if TI_CPSW=y || TI_KEYSTONE_NETCP=y | |
| 90 | + default m | |
| 91 | + | |
| 86 | 92 | config TI_KEYSTONE_NETCP |
| 87 | 93 | tristate "TI Keystone NETCP Core Support" |
| 88 | 94 | select TI_CPSW_ALE |
| @@ -12,7 +12,7 @@ obj-$(CONFIG_TI_DAVINCI_MDIO) += davinci_mdio.o · 11 unmodified lines | ||
| 12 | 12 | obj-$(CONFIG_TI_DAVINCI_CPDMA) += davinci_cpdma.o |
| 13 | 13 | obj-$(CONFIG_TI_CPSW_PHY_SEL) += cpsw-phy-sel.o |
| 14 | 14 | obj-$(CONFIG_TI_CPSW_ALE) += cpsw_ale.o |
| 15 | −obj-$(CONFIG_TI_CPTS) += cpts.o | |
| 15 | +obj-$(CONFIG_TI_CPTS_MOD) += cpts.o | |
| 16 | 16 | obj-$(CONFIG_TI_CPSW) += ti_cpsw.o |
| 17 | 17 | ti_cpsw-y := cpsw.o |
| 18 | 18 | |
| @@ -45,6 +45,8 @@ MODULE_DESCRIPTION("FUJITSU Extended Socket Network Device Driver"); · 44 unmodified lines | ||
| 45 | 45 | MODULE_LICENSE("GPL"); |
| 46 | 46 | MODULE_VERSION(DRV_VERSION); |
| 47 | 47 | |
| 48 | +#define ACPI_MOTHERBOARD_RESOURCE_HID "PNP0C02" | |
| 49 | + | |
| 48 | 50 | static int fjes_request_irq(struct fjes_adapter *); |
| 49 | 51 | static void fjes_free_irq(struct fjes_adapter *); |
| 50 | 52 | |
| @@ -78,7 +80,7 @@ static void fjes_rx_irq(struct fjes_adapter *, int); · 27 unmodified lines | ||
| 78 | 80 | static int fjes_poll(struct napi_struct *, int); |
| 79 | 81 | |
| 80 | 82 | static const struct acpi_device_id fjes_acpi_ids[] = { |
| 81 | − {"PNP0C02", 0}, | |
| 83 | + {ACPI_MOTHERBOARD_RESOURCE_HID, 0}, | |
| 82 | 84 | {"", 0}, |
| 83 | 85 | }; |
| 84 | 86 | MODULE_DEVICE_TABLE(acpi, fjes_acpi_ids); |
| @@ -115,18 +117,17 @@ static struct resource fjes_resource[] = { · 30 unmodified lines | ||
| 115 | 117 | }, |
| 116 | 118 | }; |
| 117 | 119 | |
| 118 | −static int fjes_acpi_add(struct acpi_device *device) | |
| 120 | +static bool is_extended_socket_device(struct acpi_device *device) | |
| 119 | 121 | { |
| 120 | 122 | struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL}; |
| 121 | 123 | char str_buf[sizeof(FJES_ACPI_SYMBOL) + 1]; |
| 122 | − struct platform_device *plat_dev; | |
| 123 | 124 | union acpi_object *str; |
| 124 | 125 | acpi_status status; |
| 125 | 126 | int result; |
| 126 | 127 | |
| 127 | 128 | status = acpi_evaluate_object(device->handle, "_STR", NULL, &buffer); |
| 128 | 129 | if (ACPI_FAILURE(status)) |
| 129 | − return -ENODEV; | |
| 130 | + return false; | |
| 130 | 131 | |
| 131 | 132 | str = buffer.pointer; |
| 132 | 133 | result = utf16s_to_utf8s((wchar_t *)str->string.pointer, |
| @@ -136,10 +137,42 @@ static int fjes_acpi_add(struct acpi_device *device) · 3 unmodified lines | ||
| 136 | 137 | |
| 137 | 138 | if (strncmp(FJES_ACPI_SYMBOL, str_buf, strlen(FJES_ACPI_SYMBOL)) != 0) { |
| 138 | 139 | kfree(buffer.pointer); |
| 139 | − return -ENODEV; | |
| 140 | + return false; | |
| 140 | 141 | } |
| 141 | 142 | kfree(buffer.pointer); |
| 142 | 143 | |
| 144 | + return true; | |
| 145 | +} | |
| 146 | + | |
| 147 | +static int acpi_check_extended_socket_status(struct acpi_device *device) | |
| 148 | +{ | |
| 149 | + unsigned long long sta; | |
| 150 | + acpi_status status; | |
| 151 | + | |
| 152 | + status = acpi_evaluate_integer(device->handle, "_STA", NULL, &sta); | |
| 153 | + if (ACPI_FAILURE(status)) | |
| 154 | + return -ENODEV; | |
| 155 | + | |
| 156 | + if (!((sta & ACPI_STA_DEVICE_PRESENT) && | |
| 157 | + (sta & ACPI_STA_DEVICE_ENABLED) && | |
| 158 | + (sta & ACPI_STA_DEVICE_UI) && | |
| 159 | + (sta & ACPI_STA_DEVICE_FUNCTIONING))) | |
| 160 | + return -ENODEV; | |
| 161 | + | |
| 162 | + return 0; | |
| 163 | +} | |
| 164 | + | |
| 165 | +static int fjes_acpi_add(struct acpi_device *device) | |
| 166 | +{ | |
| 167 | + struct platform_device *plat_dev; | |
| 168 | + acpi_status status; | |
| 169 | + | |
| 170 | + if (!is_extended_socket_device(device)) | |
| 171 | + return -ENODEV; | |
| 172 | + | |
| 173 | + if (acpi_check_extended_socket_status(device)) | |
| 174 | + return -ENODEV; | |
| 175 | + | |
| 143 | 176 | status = acpi_walk_resources(device->handle, METHOD_NAME__CRS, |
| 144 | 177 | fjes_get_acpi_resource, fjes_resource); |
| 145 | 178 | if (ACPI_FAILURE(status)) |
| @@ -1316,7 +1349,7 @@ static void fjes_netdev_setup(struct net_device *netdev) · 1170 unmodified lines | ||
| 1316 | 1349 | netdev->min_mtu = fjes_support_mtu[0]; |
| 1317 | 1350 | netdev->max_mtu = fjes_support_mtu[3]; |
| 1318 | 1351 | netdev->flags |= IFF_BROADCAST; |
| 1319 | − netdev->features |= NETIF_F_HW_CSUM | NETIF_F_HW_VLAN_CTAG_FILTER; | |
| 1352 | + netdev->features |= NETIF_F_HW_VLAN_CTAG_FILTER; | |
| 1320 | 1353 | } |
| 1321 | 1354 | |
| 1322 | 1355 | static void fjes_irq_watch_task(struct work_struct *work) |
| @@ -1473,11 +1506,44 @@ static void fjes_watch_unshare_task(struct work_struct *work) · 150 unmodified lines | ||
| 1473 | 1506 | } |
| 1474 | 1507 | } |
| 1475 | 1508 | |
| 1509 | +static acpi_status | |
| 1510 | +acpi_find_extended_socket_device(acpi_handle obj_handle, u32 level, | |
| 1511 | + void *context, void **return_value) | |
| 1512 | +{ | |
| 1513 | + struct acpi_device *device; | |
| 1514 | + bool *found = context; | |
| 1515 | + int result; | |
| 1516 | + | |
| 1517 | + result = acpi_bus_get_device(obj_handle, &device); | |
| 1518 | + if (result) | |
| 1519 | + return AE_OK; | |
| 1520 | + | |
| 1521 | + if (strcmp(acpi_device_hid(device), ACPI_MOTHERBOARD_RESOURCE_HID)) | |
| 1522 | + return AE_OK; | |
| 1523 | + | |
| 1524 | + if (!is_extended_socket_device(device)) | |
| 1525 | + return AE_OK; | |
| 1526 | + | |
| 1527 | + if (acpi_check_extended_socket_status(device)) | |
| 1528 | + return AE_OK; | |
| 1529 | + | |
| 1530 | + *found = true; | |
| 1531 | + return AE_CTRL_TERMINATE; | |
| 1532 | +} | |
| 1533 | + | |
| 1476 | 1534 | /* fjes_init_module - Driver Registration Routine */ |
| 1477 | 1535 | static int __init fjes_init_module(void) |
| 1478 | 1536 | { |
| 1537 | + bool found = false; | |
| 1479 | 1538 | int result; |
| 1480 | 1539 | |
| 1540 | + acpi_walk_namespace(ACPI_TYPE_DEVICE, ACPI_ROOT_OBJECT, ACPI_UINT32_MAX, | |
| 1541 | + acpi_find_extended_socket_device, NULL, &found, | |
| 1542 | + NULL); | |
| 1543 | + | |
| 1544 | + if (!found) | |
| 1545 | + return -ENODEV; | |
| 1546 | + | |
| 1481 | 1547 | pr_info("%s - version %s - %s\n", |
| 1482 | 1548 | fjes_driver_string, fjes_driver_version, fjes_copyright); |
| 1483 | 1549 | |
| @@ -700,6 +700,8 @@ struct net_device_context { · 699 unmodified lines | ||
| 700 | 700 | |
| 701 | 701 | u32 tx_checksum_mask; |
| 702 | 702 | |
| 703 | + u32 tx_send_table[VRSS_SEND_TAB_SIZE]; | |
| 704 | + | |
| 703 | 705 | /* Ethtool settings */ |
| 704 | 706 | u8 duplex; |
| 705 | 707 | u32 speed; |
| @@ -757,7 +759,6 @@ struct netvsc_device { · 51 unmodified lines | ||
| 757 | 759 | |
| 758 | 760 | struct nvsp_message revoke_packet; |
| 759 | 761 | |
| 760 | − u32 send_table[VRSS_SEND_TAB_SIZE]; | |
| 761 | 762 | u32 max_chn; |
| 762 | 763 | u32 num_chn; |
| 763 | 764 | spinlock_t sc_lock; /* Protects num_sc_offered variable */ |
| @@ -1136,15 +1136,11 @@ static void netvsc_receive(struct net_device *ndev, · 1135 unmodified lines | ||
| 1136 | 1136 | static void netvsc_send_table(struct hv_device *hdev, |
| 1137 | 1137 | struct nvsp_message *nvmsg) |
| 1138 | 1138 | { |
| 1139 | − struct netvsc_device *nvscdev; | |
| 1140 | 1139 | struct net_device *ndev = hv_get_drvdata(hdev); |
| 1140 | + struct net_device_context *net_device_ctx = netdev_priv(ndev); | |
| 1141 | 1141 | int i; |
| 1142 | 1142 | u32 count, *tab; |
| 1143 | 1143 | |
| 1144 | − nvscdev = get_outbound_net_device(hdev); | |
| 1145 | − if (!nvscdev) | |
| 1146 | − return; | |
| 1147 | − | |
| 1148 | 1144 | count = nvmsg->msg.v5_msg.send_table.count; |
| 1149 | 1145 | if (count != VRSS_SEND_TAB_SIZE) { |
| 1150 | 1146 | netdev_err(ndev, "Received wrong send-table size:%u\n", count); |
| @@ -1155,7 +1151,7 @@ static void netvsc_send_table(struct hv_device *hdev, · 4 unmodified lines | ||
| 1155 | 1151 | nvmsg->msg.v5_msg.send_table.offset); |
| 1156 | 1152 | |
| 1157 | 1153 | for (i = 0; i < count; i++) |
| 1158 | − nvscdev->send_table[i] = tab[i]; | |
| 1154 | + net_device_ctx->tx_send_table[i] = tab[i]; | |
| 1159 | 1155 | } |
| 1160 | 1156 | |
| 1161 | 1157 | static void netvsc_send_vf(struct net_device_context *net_device_ctx, |
| @@ -1235,8 +1231,11 @@ void netvsc_channel_cb(void *context) · 73 unmodified lines | ||
| 1235 | 1231 | return; |
| 1236 | 1232 | |
| 1237 | 1233 | net_device = net_device_to_netvsc_device(ndev); |
| 1238 | − if (unlikely(net_device->destroy) && | |
| 1239 | − netvsc_channel_idle(net_device, q_idx)) | |
| 1234 | + if (unlikely(!net_device)) | |
| 1235 | + return; | |
| 1236 | + | |
| 1237 | + if (unlikely(net_device->destroy && | |
| 1238 | + netvsc_channel_idle(net_device, q_idx))) | |
| 1240 | 1239 | return; |
| 1241 | 1240 | |
| 1242 | 1241 | /* commit_rd_index() -> hv_signal_on_read() needs this. */ |
| @@ -206,17 +206,15 @@ static u16 netvsc_select_queue(struct net_device *ndev, struct sk_buff *skb, · 205 unmodified lines | ||
| 206 | 206 | void *accel_priv, select_queue_fallback_t fallback) |
| 207 | 207 | { |
| 208 | 208 | struct net_device_context *net_device_ctx = netdev_priv(ndev); |
| 209 | − struct netvsc_device *nvsc_dev = net_device_ctx->nvdev; | |
| 209 | + unsigned int num_tx_queues = ndev->real_num_tx_queues; | |
| 210 | 210 | struct sock *sk = skb->sk; |
| 211 | 211 | int q_idx = sk_tx_queue_get(sk); |
| 212 | 212 | |
| 213 | − if (q_idx < 0 || skb->ooo_okay || | |
| 214 | − q_idx >= ndev->real_num_tx_queues) { | |
| 213 | + if (q_idx < 0 || skb->ooo_okay || q_idx >= num_tx_queues) { | |
| 215 | 214 | u16 hash = __skb_tx_hash(ndev, skb, VRSS_SEND_TAB_SIZE); |
| 216 | 215 | int new_idx; |
| 217 | 216 | |
| 218 | − new_idx = nvsc_dev->send_table[hash] | |
| 219 | − % nvsc_dev->num_chn; | |
| 217 | + new_idx = net_device_ctx->tx_send_table[hash] % num_tx_queues; | |
| 220 | 218 | |
| 221 | 219 | if (q_idx != new_idx && sk && |
| 222 | 220 | sk_fullsock(sk) && rcu_access_pointer(sk->sk_dst_cache)) |
| @@ -225,9 +223,6 @@ static u16 netvsc_select_queue(struct net_device *ndev, struct sk_buff *skb, · 2 unmodified lines | ||
| 225 | 223 | q_idx = new_idx; |
| 226 | 224 | } |
| 227 | 225 | |
| 228 | − if (unlikely(!nvsc_dev->chan_table[q_idx].channel)) | |
| 229 | − q_idx = 0; | |
| 230 | − | |
| 231 | 226 | return q_idx; |
| 232 | 227 | } |
| 233 | 228 | |
| @@ -1883,17 +1883,6 @@ static int m88e1510_probe(struct phy_device *phydev) · 1882 unmodified lines | ||
| 1883 | 1883 | return m88e1510_hwmon_probe(phydev); |
| 1884 | 1884 | } |
| 1885 | 1885 | |
| 1886 | −static void marvell_remove(struct phy_device *phydev) | |
| 1887 | −{ | |
| 1888 | −#ifdef CONFIG_HWMON | |
| 1889 | − | |
| 1890 | − struct marvell_priv *priv = phydev->priv; | |
| 1891 | − | |
| 1892 | − if (priv && priv->hwmon_dev) | |
| 1893 | − hwmon_device_unregister(priv->hwmon_dev); | |
| 1894 | −#endif | |
| 1895 | −} | |
| 1896 | − | |
| 1897 | 1886 | static struct phy_driver marvell_drivers[] = { |
| 1898 | 1887 | { |
| 1899 | 1888 | .phy_id = MARVELL_PHY_ID_88E1101, |
| @@ -1974,7 +1963,6 @@ static struct phy_driver marvell_drivers[] = { · 74 unmodified lines | ||
| 1974 | 1963 | .features = PHY_GBIT_FEATURES, |
| 1975 | 1964 | .flags = PHY_HAS_INTERRUPT, |
| 1976 | 1965 | .probe = &m88e1121_probe, |
| 1977 | − .remove = &marvell_remove, | |
| 1978 | 1966 | .config_init = &m88e1121_config_init, |
| 1979 | 1967 | .config_aneg = &m88e1121_config_aneg, |
| 1980 | 1968 | .read_status = &marvell_read_status, |
| @@ -2087,7 +2075,6 @@ static struct phy_driver marvell_drivers[] = { · 106 unmodified lines | ||
| 2087 | 2075 | .features = PHY_GBIT_FEATURES | SUPPORTED_FIBRE, |
| 2088 | 2076 | .flags = PHY_HAS_INTERRUPT, |
| 2089 | 2077 | .probe = &m88e1510_probe, |
| 2090 | − .remove = &marvell_remove, | |
| 2091 | 2078 | .config_init = &m88e1510_config_init, |
| 2092 | 2079 | .config_aneg = &m88e1510_config_aneg, |
| 2093 | 2080 | .read_status = &marvell_read_status, |
| @@ -2109,7 +2096,6 @@ static struct phy_driver marvell_drivers[] = { · 15 unmodified lines | ||
| 2109 | 2096 | .features = PHY_GBIT_FEATURES, |
| 2110 | 2097 | .flags = PHY_HAS_INTERRUPT, |
| 2111 | 2098 | .probe = m88e1510_probe, |
| 2112 | − .remove = &marvell_remove, | |
| 2113 | 2099 | .config_init = &marvell_config_init, |
| 2114 | 2100 | .config_aneg = &m88e1510_config_aneg, |
| 2115 | 2101 | .read_status = &marvell_read_status, |
| @@ -2127,7 +2113,6 @@ static struct phy_driver marvell_drivers[] = { · 11 unmodified lines | ||
| 2127 | 2113 | .phy_id_mask = MARVELL_PHY_ID_MASK, |
| 2128 | 2114 | .name = "Marvell 88E1545", |
| 2129 | 2115 | .probe = m88e1510_probe, |
| 2130 | − .remove = &marvell_remove, | |
| 2131 | 2116 | .features = PHY_GBIT_FEATURES, |
| 2132 | 2117 | .flags = PHY_HAS_INTERRUPT, |
| 2133 | 2118 | .config_init = &marvell_config_init, |
| @@ -1864,7 +1864,7 @@ static struct phy_driver genphy_driver[] = { · 1863 unmodified lines | ||
| 1864 | 1864 | .phy_id = 0xffffffff, |
| 1865 | 1865 | .phy_id_mask = 0xffffffff, |
| 1866 | 1866 | .name = "Generic PHY", |
| 1867 | − .soft_reset = genphy_soft_reset, | |
| 1867 | + .soft_reset = genphy_no_soft_reset, | |
| 1868 | 1868 | .config_init = genphy_config_init, |
| 1869 | 1869 | .features = PHY_GBIT_FEATURES | SUPPORTED_MII | |
| 1870 | 1870 | SUPPORTED_AUI | SUPPORTED_FIBRE | |
| @@ -491,13 +491,14 @@ static int ks8995_probe(struct spi_device *spi) · 490 unmodified lines | ||
| 491 | 491 | if (err) |
| 492 | 492 | return err; |
| 493 | 493 | |
| 494 | − ks->regs_attr.size = ks->chip->regs_size; | |
| 495 | 494 | memcpy(&ks->regs_attr, &ks8995_registers_attr, sizeof(ks->regs_attr)); |
| 495 | + ks->regs_attr.size = ks->chip->regs_size; | |
| 496 | 496 | |
| 497 | 497 | err = ks8995_reset(ks); |
| 498 | 498 | if (err) |
| 499 | 499 | return err; |
| 500 | 500 | |
| 501 | + sysfs_attr_init(&ks->regs_attr.attr); | |
| 501 | 502 | err = sysfs_create_bin_file(&spi->dev.kobj, &ks->regs_attr); |
| 502 | 503 | if (err) { |
| 503 | 504 | dev_err(&spi->dev, "unable to create sysfs file, err=%d\n", |
| @@ -2072,6 +2072,7 @@ static int team_dev_type_check_change(struct net_device *dev, · 2071 unmodified lines | ||
| 2072 | 2072 | static void team_setup(struct net_device *dev) |
| 2073 | 2073 | { |
| 2074 | 2074 | ether_setup(dev); |
| 2075 | + dev->max_mtu = ETH_MAX_MTU; | |
| 2075 | 2076 | |
| 2076 | 2077 | dev->netdev_ops = &team_netdev_ops; |
| 2077 | 2078 | dev->ethtool_ops = &team_ethtool_ops; |
| @@ -822,7 +822,18 @@ static void tun_net_uninit(struct net_device *dev) · 821 unmodified lines | ||
| 822 | 822 | /* Net device open. */ |
| 823 | 823 | static int tun_net_open(struct net_device *dev) |
| 824 | 824 | { |
| 825 | + struct tun_struct *tun = netdev_priv(dev); | |
| 826 | + int i; | |
| 827 | + | |
| 825 | 828 | netif_tx_start_all_queues(dev); |
| 829 | + | |
| 830 | + for (i = 0; i < tun->numqueues; i++) { | |
| 831 | + struct tun_file *tfile; | |
| 832 | + | |
| 833 | + tfile = rtnl_dereference(tun->tfiles[i]); | |
| 834 | + tfile->socket.sk->sk_write_space(tfile->socket.sk); | |
| 835 | + } | |
| 836 | + | |
| 826 | 837 | return 0; |
| 827 | 838 | } |
| 828 | 839 | |
| @@ -1103,9 +1114,10 @@ static unsigned int tun_chr_poll(struct file *file, poll_table *wait) · 274 unmodified lines | ||
| 1103 | 1114 | if (!skb_array_empty(&tfile->tx_array)) |
| 1104 | 1115 | mask |= POLLIN | POLLRDNORM; |
| 1105 | 1116 | |
| 1106 | − if (sock_writeable(sk) || | |
| 1107 | − (!test_and_set_bit(SOCKWQ_ASYNC_NOSPACE, &sk->sk_socket->flags) && | |
| 1108 | − sock_writeable(sk))) | |
| 1117 | + if (tun->dev->flags & IFF_UP && | |
| 1118 | + (sock_writeable(sk) || | |
| 1119 | + (!test_and_set_bit(SOCKWQ_ASYNC_NOSPACE, &sk->sk_socket->flags) && | |
| 1120 | + sock_writeable(sk)))) | |
| 1109 | 1121 | mask |= POLLOUT | POLLWRNORM; |
| 1110 | 1122 | |
| 1111 | 1123 | if (tun->dev->reg_state != NETREG_REGISTERED) |
| @@ -1919,6 +1931,8 @@ static int set_offload(struct tun_struct *tun, unsigned long arg) · 807 unmodified lines | ||
| 1919 | 1931 | return -EINVAL; |
| 1920 | 1932 | |
| 1921 | 1933 | tun->set_features = features; |
| 1934 | + tun->dev->wanted_features &= ~TUN_USER_FEATURES; | |
| 1935 | + tun->dev->wanted_features |= features; | |
| 1922 | 1936 | netdev_update_features(tun->dev); |
| 1923 | 1937 | |
| 1924 | 1938 | return 0; |
| @@ -2570,7 +2584,6 @@ static int __init tun_init(void) · 645 unmodified lines | ||
| 2570 | 2584 | int ret = 0; |
| 2571 | 2585 | |
| 2572 | 2586 | pr_info("%s, %s\n", DRV_DESCRIPTION, DRV_VERSION); |
| 2573 | − pr_info("%s\n", DRV_COPYRIGHT); | |
| 2574 | 2587 | |
| 2575 | 2588 | ret = rtnl_link_register(&tun_link_ops); |
| 2576 | 2589 | if (ret) { |
| @@ -580,6 +580,10 @@ static const struct usb_device_id products[] = { · 579 unmodified lines | ||
| 580 | 580 | USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, USB_CLASS_VENDOR_SPEC, 0x01, 0x69), |
| 581 | 581 | .driver_info = (unsigned long)&qmi_wwan_info, |
| 582 | 582 | }, |
| 583 | + { /* Motorola Mapphone devices with MDM6600 */ | |
| 584 | + USB_VENDOR_AND_INTERFACE_INFO(0x22b8, USB_CLASS_VENDOR_SPEC, 0xfb, 0xff), | |
| 585 | + .driver_info = (unsigned long)&qmi_wwan_info, | |
| 586 | + }, | |
| 583 | 587 | |
| 584 | 588 | /* 2. Combined interface devices matching on class+protocol */ |
| 585 | 589 | { /* Huawei E367 and possibly others in "Windows mode" */ |
| @@ -925,6 +929,8 @@ static const struct usb_device_id products[] = { · 339 unmodified lines | ||
| 925 | 929 | {QMI_FIXED_INTF(0x413c, 0x81a9, 8)}, /* Dell Wireless 5808e Gobi(TM) 4G LTE Mobile Broadband Card */ |
| 926 | 930 | {QMI_FIXED_INTF(0x413c, 0x81b1, 8)}, /* Dell Wireless 5809e Gobi(TM) 4G LTE Mobile Broadband Card */ |
| 927 | 931 | {QMI_FIXED_INTF(0x413c, 0x81b3, 8)}, /* Dell Wireless 5809e Gobi(TM) 4G LTE Mobile Broadband Card (rev3) */ |
| 932 | + {QMI_FIXED_INTF(0x413c, 0x81b6, 8)}, /* Dell Wireless 5811e */ | |
| 933 | + {QMI_FIXED_INTF(0x413c, 0x81b6, 10)}, /* Dell Wireless 5811e */ | |
| 928 | 934 | {QMI_FIXED_INTF(0x03f0, 0x4e1d, 8)}, /* HP lt4111 LTE/EV-DO/HSPA+ Gobi 4G Module */ |
| 929 | 935 | {QMI_FIXED_INTF(0x22de, 0x9061, 3)}, /* WeTelecom WPD-600N */ |
| 930 | 936 | {QMI_FIXED_INTF(0x1e0e, 0x9001, 5)}, /* SIMCom 7230E */ |
| @@ -32,7 +32,7 @@ · 31 unmodified lines | ||
| 32 | 32 | #define NETNEXT_VERSION "08" |
| 33 | 33 | |
| 34 | 34 | /* Information for net */ |
| 35 | −#define NET_VERSION "8" | |
| 35 | +#define NET_VERSION "9" | |
| 36 | 36 | |
| 37 | 37 | #define DRIVER_VERSION "v1." NETNEXT_VERSION "." NET_VERSION |
| 38 | 38 | #define DRIVER_AUTHOR "Realtek linux nic maintainers <nic_swsd@realtek.com>" |
| @@ -501,6 +501,8 @@ enum rtl_register_content { · 462 unmodified lines | ||
| 501 | 501 | #define RTL8153_RMS RTL8153_MAX_PACKET |
| 502 | 502 | #define RTL8152_TX_TIMEOUT (5 * HZ) |
| 503 | 503 | #define RTL8152_NAPI_WEIGHT 64 |
| 504 | +#define rx_reserved_size(x) ((x) + VLAN_ETH_HLEN + CRC_SIZE + \ | |
| 505 | + sizeof(struct rx_desc) + RX_ALIGN) | |
| 504 | 506 | |
| 505 | 507 | /* rtl8152 flags */ |
| 506 | 508 | enum rtl8152_flags { |
| @@ -1362,6 +1364,7 @@ static int alloc_all_mem(struct r8152 *tp) · 855 unmodified lines | ||
| 1362 | 1364 | spin_lock_init(&tp->rx_lock); |
| 1363 | 1365 | spin_lock_init(&tp->tx_lock); |
| 1364 | 1366 | INIT_LIST_HEAD(&tp->tx_free); |
| 1367 | + INIT_LIST_HEAD(&tp->rx_done); | |
| 1365 | 1368 | skb_queue_head_init(&tp->tx_queue); |
| 1366 | 1369 | skb_queue_head_init(&tp->rx_queue); |
| 1367 | 1370 | |
| @@ -2252,8 +2255,7 @@ static void r8153_set_rx_early_timeout(struct r8152 *tp) · 884 unmodified lines | ||
| 2252 | 2255 | |
| 2253 | 2256 | static void r8153_set_rx_early_size(struct r8152 *tp) |
| 2254 | 2257 | { |
| 2255 | − u32 mtu = tp->netdev->mtu; | |
| 2256 | − u32 ocp_data = (agg_buf_sz - mtu - VLAN_ETH_HLEN - VLAN_HLEN) / 8; | |
| 2258 | + u32 ocp_data = (agg_buf_sz - rx_reserved_size(tp->netdev->mtu)) / 4; | |
| 2257 | 2259 | |
| 2258 | 2260 | ocp_write_word(tp, MCU_TYPE_USB, USB_RX_EARLY_SIZE, ocp_data); |
| 2259 | 2261 | } |
| @@ -2898,7 +2900,8 @@ static void r8153_first_init(struct r8152 *tp) · 638 unmodified lines | ||
| 2898 | 2900 | |
| 2899 | 2901 | rtl_rx_vlan_en(tp, tp->netdev->features & NETIF_F_HW_VLAN_CTAG_RX); |
| 2900 | 2902 | |
| 2901 | − ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, RTL8153_RMS); | |
| 2903 | + ocp_data = tp->netdev->mtu + VLAN_ETH_HLEN + CRC_SIZE; | |
| 2904 | + ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, ocp_data); | |
| 2902 | 2905 | ocp_write_byte(tp, MCU_TYPE_PLA, PLA_MTPS, MTPS_JUMBO); |
| 2903 | 2906 | |
| 2904 | 2907 | ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TCR0); |
| @@ -2950,7 +2953,8 @@ static void r8153_enter_oob(struct r8152 *tp) · 45 unmodified lines | ||
| 2950 | 2953 | usleep_range(1000, 2000); |
| 2951 | 2954 | } |
| 2952 | 2955 | |
| 2953 | − ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, RTL8153_RMS); | |
| 2956 | + ocp_data = tp->netdev->mtu + VLAN_ETH_HLEN + CRC_SIZE; | |
| 2957 | + ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, ocp_data); | |
| 2954 | 2958 | |
| 2955 | 2959 | ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TEREDO_CFG); |
| 2956 | 2960 | ocp_data &= ~TEREDO_WAKE_MASK; |
| @@ -4200,8 +4204,14 @@ static int rtl8152_change_mtu(struct net_device *dev, int new_mtu) · 1243 unmodified lines | ||
| 4200 | 4204 | |
| 4201 | 4205 | dev->mtu = new_mtu; |
| 4202 | 4206 | |
| 4203 | − if (netif_running(dev) && netif_carrier_ok(dev)) | |
| 4204 | − r8153_set_rx_early_size(tp); | |
| 4207 | + if (netif_running(dev)) { | |
| 4208 | + u32 rms = new_mtu + VLAN_ETH_HLEN + CRC_SIZE; | |
| 4209 | + | |
| 4210 | + ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, rms); | |
| 4211 | + | |
| 4212 | + if (netif_carrier_ok(dev)) | |
| 4213 | + r8153_set_rx_early_size(tp); | |
| 4214 | + } | |
| 4205 | 4215 | |
| 4206 | 4216 | mutex_unlock(&tp->control); |
| 4207 | 4217 | |
| @@ -340,6 +340,7 @@ static netdev_tx_t is_ip_tx_frame(struct sk_buff *skb, struct net_device *dev) · 339 unmodified lines | ||
| 340 | 340 | |
| 341 | 341 | static netdev_tx_t vrf_xmit(struct sk_buff *skb, struct net_device *dev) |
| 342 | 342 | { |
| 343 | + int len = skb->len; | |
| 343 | 344 | netdev_tx_t ret = is_ip_tx_frame(skb, dev); |
| 344 | 345 | |
| 345 | 346 | if (likely(ret == NET_XMIT_SUCCESS || ret == NET_XMIT_CN)) { |
| @@ -347,7 +348,7 @@ static netdev_tx_t vrf_xmit(struct sk_buff *skb, struct net_device *dev) · 1 unmodified line | ||
| 347 | 348 | |
| 348 | 349 | u64_stats_update_begin(&dstats->syncp); |
| 349 | 350 | dstats->tx_pkts++; |
| 350 | − dstats->tx_bytes += skb->len; | |
| 351 | + dstats->tx_bytes += len; | |
| 351 | 352 | u64_stats_update_end(&dstats->syncp); |
| 352 | 353 | } else { |
| 353 | 354 | this_cpu_inc(dev->dstats->tx_drps); |
| @@ -461,8 +462,10 @@ static void vrf_rt6_release(struct net_device *dev, struct net_vrf *vrf) · 107 unmodified lines | ||
| 461 | 462 | } |
| 462 | 463 | |
| 463 | 464 | if (rt6_local) { |
| 464 | − if (rt6_local->rt6i_idev) | |
| 465 | + if (rt6_local->rt6i_idev) { | |
| 465 | 466 | in6_dev_put(rt6_local->rt6i_idev); |
| 467 | + rt6_local->rt6i_idev = NULL; | |
| 468 | + } | |
| 466 | 469 | |
| 467 | 470 | dst = &rt6_local->dst; |
| 468 | 471 | dev_put(dst->dev); |
| @@ -2976,6 +2976,44 @@ static int vxlan_dev_configure(struct net *src_net, struct net_device *dev, · 2975 unmodified lines | ||
| 2976 | 2976 | return 0; |
| 2977 | 2977 | } |
| 2978 | 2978 | |
| 2979 | +static int __vxlan_dev_create(struct net *net, struct net_device *dev, | |
| 2980 | + struct vxlan_config *conf) | |
| 2981 | +{ | |
| 2982 | + struct vxlan_net *vn = net_generic(net, vxlan_net_id); | |
| 2983 | + struct vxlan_dev *vxlan = netdev_priv(dev); | |
| 2984 | + int err; | |
| 2985 | + | |
| 2986 | + err = vxlan_dev_configure(net, dev, conf, false); | |
| 2987 | + if (err) | |
| 2988 | + return err; | |
| 2989 | + | |
| 2990 | + dev->ethtool_ops = &vxlan_ethtool_ops; | |
| 2991 | + | |
| 2992 | + /* create an fdb entry for a valid default destination */ | |
| 2993 | + if (!vxlan_addr_any(&vxlan->default_dst.remote_ip)) { | |
| 2994 | + err = vxlan_fdb_create(vxlan, all_zeros_mac, | |
| 2995 | + &vxlan->default_dst.remote_ip, | |
| 2996 | + NUD_REACHABLE | NUD_PERMANENT, | |
| 2997 | + NLM_F_EXCL | NLM_F_CREATE, | |
| 2998 | + vxlan->cfg.dst_port, | |
| 2999 | + vxlan->default_dst.remote_vni, | |
| 3000 | + vxlan->default_dst.remote_vni, | |
| 3001 | + vxlan->default_dst.remote_ifindex, | |
| 3002 | + NTF_SELF); | |
| 3003 | + if (err) | |
| 3004 | + return err; | |
| 3005 | + } | |
| 3006 | + | |
| 3007 | + err = register_netdevice(dev); | |
| 3008 | + if (err) { | |
| 3009 | + vxlan_fdb_delete_default(vxlan, vxlan->default_dst.remote_vni); | |
| 3010 | + return err; | |
| 3011 | + } | |
| 3012 | + | |
| 3013 | + list_add(&vxlan->next, &vn->vxlan_list); | |
| 3014 | + return 0; | |
| 3015 | +} | |
| 3016 | + | |
| 2979 | 3017 | static int vxlan_nl2conf(struct nlattr *tb[], struct nlattr *data[], |
| 2980 | 3018 | struct net_device *dev, struct vxlan_config *conf, |
| 2981 | 3019 | bool changelink) |
| @@ -3172,8 +3210,6 @@ static int vxlan_nl2conf(struct nlattr *tb[], struct nlattr *data[], · 190 unmodified lines | ||
| 3172 | 3210 | static int vxlan_newlink(struct net *src_net, struct net_device *dev, |
| 3173 | 3211 | struct nlattr *tb[], struct nlattr *data[]) |
| 3174 | 3212 | { |
| 3175 | − struct vxlan_net *vn = net_generic(src_net, vxlan_net_id); | |
| 3176 | − struct vxlan_dev *vxlan = netdev_priv(dev); | |
| 3177 | 3213 | struct vxlan_config conf; |
| 3178 | 3214 | int err; |
| 3179 | 3215 | |
| @@ -3181,36 +3217,7 @@ static int vxlan_newlink(struct net *src_net, struct net_device *dev, · 1 unmodified line | ||
| 3181 | 3217 | if (err) |
| 3182 | 3218 | return err; |
| 3183 | 3219 | |
| 3184 | − err = vxlan_dev_configure(src_net, dev, &conf, false); | |
| 3185 | − if (err) | |
| 3186 | − return err; | |
| 3187 | − | |
| 3188 | − dev->ethtool_ops = &vxlan_ethtool_ops; | |
| 3189 | − | |
| 3190 | − /* create an fdb entry for a valid default destination */ | |
| 3191 | − if (!vxlan_addr_any(&vxlan->default_dst.remote_ip)) { | |
| 3192 | − err = vxlan_fdb_create(vxlan, all_zeros_mac, | |
| 3193 | − &vxlan->default_dst.remote_ip, | |
| 3194 | − NUD_REACHABLE | NUD_PERMANENT, | |
| 3195 | − NLM_F_EXCL | NLM_F_CREATE, | |
| 3196 | − vxlan->cfg.dst_port, | |
| 3197 | − vxlan->default_dst.remote_vni, | |
| 3198 | − vxlan->default_dst.remote_vni, | |
| 3199 | − vxlan->default_dst.remote_ifindex, | |
| 3200 | − NTF_SELF); | |
| 3201 | − if (err) | |
| 3202 | − return err; | |
| 3203 | − } | |
| 3204 | − | |
| 3205 | − err = register_netdevice(dev); | |
| 3206 | − if (err) { | |
| 3207 | − vxlan_fdb_delete_default(vxlan, vxlan->default_dst.remote_vni); | |
| 3208 | − return err; | |
| 3209 | − } | |
| 3210 | − | |
| 3211 | − list_add(&vxlan->next, &vn->vxlan_list); | |
| 3212 | − | |
| 3213 | − return 0; | |
| 3220 | + return __vxlan_dev_create(src_net, dev, &conf); | |
| 3214 | 3221 | } |
| 3215 | 3222 | |
| 3216 | 3223 | static int vxlan_changelink(struct net_device *dev, struct nlattr *tb[], |
| @@ -3440,7 +3447,7 @@ struct net_device *vxlan_dev_create(struct net *net, const char *name, · 223 unmodified lines | ||
| 3440 | 3447 | if (IS_ERR(dev)) |
| 3441 | 3448 | return dev; |
| 3442 | 3449 | |
| 3443 | − err = vxlan_dev_configure(net, dev, conf, false); | |
| 3450 | + err = __vxlan_dev_create(net, dev, conf); | |
| 3444 | 3451 | if (err < 0) { |
| 3445 | 3452 | free_netdev(dev); |
| 3446 | 3453 | return ERR_PTR(err); |
| @@ -381,8 +381,8 @@ static netdev_tx_t ucc_hdlc_tx(struct sk_buff *skb, struct net_device *dev) · 380 unmodified lines | ||
| 381 | 381 | /* set bd status and length */ |
| 382 | 382 | bd_status = (bd_status & T_W_S) | T_R_S | T_I_S | T_L_S | T_TC_S; |
| 383 | 383 | |
| 384 | − iowrite16be(bd_status, &bd->status); | |
| 385 | 384 | iowrite16be(skb->len, &bd->length); |
| 385 | + iowrite16be(bd_status, &bd->status); | |
| 386 | 386 | |
| 387 | 387 | /* Move to next BD in the ring */ |
| 388 | 388 | if (!(bd_status & T_W_S)) |
| @@ -457,7 +457,7 @@ static int hdlc_rx_done(struct ucc_hdlc_private *priv, int rx_work_limit) · 68 unmodified lines | ||
| 457 | 457 | struct sk_buff *skb; |
| 458 | 458 | hdlc_device *hdlc = dev_to_hdlc(dev); |
| 459 | 459 | struct qe_bd *bd; |
| 460 | − u32 bd_status; | |
| 460 | + u16 bd_status; | |
| 461 | 461 | u16 length, howmany = 0; |
| 462 | 462 | u8 *bdbuffer; |
| 463 | 463 | int i; |
| @@ -467,6 +467,9 @@ int i2400mu_probe(struct usb_interface *iface, · 466 unmodified lines | ||
| 467 | 467 | struct i2400mu *i2400mu; |
| 468 | 468 | struct usb_device *usb_dev = interface_to_usbdev(iface); |
| 469 | 469 | |
| 470 | + if (iface->cur_altsetting->desc.bNumEndpoints < 4) | |
| 471 | + return -ENODEV; | |
| 472 | + | |
| 470 | 473 | if (usb_dev->speed != USB_SPEED_HIGH) |
| 471 | 474 | dev_err(dev, "device not connected as high speed\n"); |
| 472 | 475 | |
| @@ -51,7 +51,7 @@ const struct ath10k_hw_regs qca6174_regs = { · 50 unmodified lines | ||
| 51 | 51 | .rtc_soc_base_address = 0x00000800, |
| 52 | 52 | .rtc_wmac_base_address = 0x00001000, |
| 53 | 53 | .soc_core_base_address = 0x0003a000, |
| 54 | − .wlan_mac_base_address = 0x00020000, | |
| 54 | + .wlan_mac_base_address = 0x00010000, | |
| 55 | 55 | .ce_wrapper_base_address = 0x00034000, |
| 56 | 56 | .ce0_base_address = 0x00034400, |
| 57 | 57 | .ce1_base_address = 0x00034800, |
| @@ -2319,7 +2319,7 @@ iwl_mvm_mac_release_buffered_frames(struct ieee80211_hw *hw, · 2318 unmodified lines | ||
| 2319 | 2319 | { |
| 2320 | 2320 | struct iwl_mvm *mvm = IWL_MAC80211_GET_MVM(hw); |
| 2321 | 2321 | |
| 2322 | − /* Called when we need to transmit (a) frame(s) from agg queue */ | |
| 2322 | + /* Called when we need to transmit (a) frame(s) from agg or dqa queue */ | |
| 2323 | 2323 | |
| 2324 | 2324 | iwl_mvm_sta_modify_sleep_tx_count(mvm, sta, reason, num_frames, |
| 2325 | 2325 | tids, more_data, true); |
| @@ -2338,7 +2338,8 @@ static void __iwl_mvm_mac_sta_notify(struct ieee80211_hw *hw, · 12 unmodified lines | ||
| 2338 | 2338 | for (tid = 0; tid < IWL_MAX_TID_COUNT; tid++) { |
| 2339 | 2339 | struct iwl_mvm_tid_data *tid_data = &mvmsta->tid_data[tid]; |
| 2340 | 2340 | |
| 2341 | − if (tid_data->state != IWL_AGG_ON && | |
| 2341 | + if (!iwl_mvm_is_dqa_supported(mvm) && | |
| 2342 | + tid_data->state != IWL_AGG_ON && | |
| 2342 | 2343 | tid_data->state != IWL_EMPTYING_HW_QUEUE_DELBA) |
| 2343 | 2344 | continue; |
| 2344 | 2345 | |
| @@ -3135,7 +3135,7 @@ void iwl_mvm_sta_modify_sleep_tx_count(struct iwl_mvm *mvm, · 3134 unmodified lines | ||
| 3135 | 3135 | struct ieee80211_sta *sta, |
| 3136 | 3136 | enum ieee80211_frame_release_type reason, |
| 3137 | 3137 | u16 cnt, u16 tids, bool more_data, |
| 3138 | − bool agg) | |
| 3138 | + bool single_sta_queue) | |
| 3139 | 3139 | { |
| 3140 | 3140 | struct iwl_mvm_sta *mvmsta = iwl_mvm_sta_from_mac80211(sta); |
| 3141 | 3141 | struct iwl_mvm_add_sta_cmd cmd = { |
| @@ -3155,14 +3155,14 @@ void iwl_mvm_sta_modify_sleep_tx_count(struct iwl_mvm *mvm, · 13 unmodified lines | ||
| 3155 | 3155 | for_each_set_bit(tid, &_tids, IWL_MAX_TID_COUNT) |
| 3156 | 3156 | cmd.awake_acs |= BIT(tid_to_ucode_ac[tid]); |
| 3157 | 3157 | |
| 3158 | − /* If we're releasing frames from aggregation queues then check if the | |
| 3159 | − * all queues combined that we're releasing frames from have | |
| 3158 | + /* If we're releasing frames from aggregation or dqa queues then check | |
| 3159 | + * if all the queues that we're releasing frames from, combined, have: | |
| 3160 | 3160 | * - more frames than the service period, in which case more_data |
| 3161 | 3161 | * needs to be set |
| 3162 | 3162 | * - fewer than 'cnt' frames, in which case we need to adjust the |
| 3163 | 3163 | * firmware command (but do that unconditionally) |
| 3164 | 3164 | */ |
| 3165 | − if (agg) { | |
| 3165 | + if (single_sta_queue) { | |
| 3166 | 3166 | int remaining = cnt; |
| 3167 | 3167 | int sleep_tx_count; |
| 3168 | 3168 | |
| @@ -3172,7 +3172,8 @@ void iwl_mvm_sta_modify_sleep_tx_count(struct iwl_mvm *mvm, · 3 unmodified lines | ||
| 3172 | 3172 | u16 n_queued; |
| 3173 | 3173 | |
| 3174 | 3174 | tid_data = &mvmsta->tid_data[tid]; |
| 3175 | − if (WARN(tid_data->state != IWL_AGG_ON && | |
| 3175 | + if (WARN(!iwl_mvm_is_dqa_supported(mvm) && | |
| 3176 | + tid_data->state != IWL_AGG_ON && | |
| 3176 | 3177 | tid_data->state != IWL_EMPTYING_HW_QUEUE_DELBA, |
| 3177 | 3178 | "TID %d state is %d\n", |
| 3178 | 3179 | tid, tid_data->state)) { |
| @@ -547,7 +547,7 @@ void iwl_mvm_sta_modify_sleep_tx_count(struct iwl_mvm *mvm, · 546 unmodified lines | ||
| 547 | 547 | struct ieee80211_sta *sta, |
| 548 | 548 | enum ieee80211_frame_release_type reason, |
| 549 | 549 | u16 cnt, u16 tids, bool more_data, |
| 550 | − bool agg); | |
| 550 | + bool single_sta_queue); | |
| 551 | 551 | int iwl_mvm_drain_sta(struct iwl_mvm *mvm, struct iwl_mvm_sta *mvmsta, |
| 552 | 552 | bool drain); |
| 553 | 553 | void iwl_mvm_sta_modify_disable_tx(struct iwl_mvm *mvm, |
| @@ -7,7 +7,7 @@ · 6 unmodified lines | ||
| 7 | 7 | * |
| 8 | 8 | * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved. |
| 9 | 9 | * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH |
| 10 | − * Copyright(c) 2016 Intel Deutschland GmbH | |
| 10 | + * Copyright(c) 2016 - 2017 Intel Deutschland GmbH | |
| 11 | 11 | * |
| 12 | 12 | * This program is free software; you can redistribute it and/or modify |
| 13 | 13 | * it under the terms of version 2 of the GNU General Public License as |
| @@ -34,6 +34,7 @@ · 20 unmodified lines | ||
| 34 | 34 | * |
| 35 | 35 | * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved. |
| 36 | 36 | * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH |
| 37 | + * Copyright(c) 2016 - 2017 Intel Deutschland GmbH | |
| 37 | 38 | * All rights reserved. |
| 38 | 39 | * |
| 39 | 40 | * Redistribution and use in source and binary forms, with or without |
| @@ -628,8 +629,10 @@ int iwl_mvm_tx_skb_non_sta(struct iwl_mvm *mvm, struct sk_buff *skb) · 588 unmodified lines | ||
| 628 | 629 | * values. |
| 629 | 630 | * Note that we don't need to make sure it isn't agg'd, since we're |
| 630 | 631 | * TXing non-sta |
| 632 | + * For DQA mode - we shouldn't increase it though | |
| 631 | 633 | */ |
| 632 | − atomic_inc(&mvm->pending_frames[sta_id]); | |
| 634 | + if (!iwl_mvm_is_dqa_supported(mvm)) | |
| 635 | + atomic_inc(&mvm->pending_frames[sta_id]); | |
| 633 | 636 | |
| 634 | 637 | return 0; |
| 635 | 638 | } |
| @@ -1005,11 +1008,8 @@ static int iwl_mvm_tx_mpdu(struct iwl_mvm *mvm, struct sk_buff *skb, · 369 unmodified lines | ||
| 1005 | 1008 | |
| 1006 | 1009 | spin_unlock(&mvmsta->lock); |
| 1007 | 1010 | |
| 1008 | − /* Increase pending frames count if this isn't AMPDU */ | |
| 1009 | − if ((iwl_mvm_is_dqa_supported(mvm) && | |
| 1010 | − mvmsta->tid_data[tx_cmd->tid_tspec].state != IWL_AGG_ON && | |
| 1011 | − mvmsta->tid_data[tx_cmd->tid_tspec].state != IWL_AGG_STARTING) || | |
| 1012 | − (!iwl_mvm_is_dqa_supported(mvm) && !is_ampdu)) | |
| 1011 | + /* Increase pending frames count if this isn't AMPDU or DQA queue */ | |
| 1012 | + if (!iwl_mvm_is_dqa_supported(mvm) && !is_ampdu) | |
| 1013 | 1013 | atomic_inc(&mvm->pending_frames[mvmsta->sta_id]); |
| 1014 | 1014 | |
| 1015 | 1015 | return 0; |
| @@ -1079,12 +1079,13 @@ static void iwl_mvm_check_ratid_empty(struct iwl_mvm *mvm, · 63 unmodified lines | ||
| 1079 | 1079 | lockdep_assert_held(&mvmsta->lock); |
| 1080 | 1080 | |
| 1081 | 1081 | if ((tid_data->state == IWL_AGG_ON || |
| 1082 | − tid_data->state == IWL_EMPTYING_HW_QUEUE_DELBA) && | |
| 1082 | + tid_data->state == IWL_EMPTYING_HW_QUEUE_DELBA || | |
| 1083 | + iwl_mvm_is_dqa_supported(mvm)) && | |
| 1083 | 1084 | iwl_mvm_tid_queued(tid_data) == 0) { |
| 1084 | 1085 | /* |
| 1085 | − * Now that this aggregation queue is empty tell mac80211 so it | |
| 1086 | − * knows we no longer have frames buffered for the station on | |
| 1087 | − * this TID (for the TIM bitmap calculation.) | |
| 1086 | + * Now that this aggregation or DQA queue is empty tell | |
| 1087 | + * mac80211 so it knows we no longer have frames buffered for | |
| 1088 | + * the station on this TID (for the TIM bitmap calculation.) | |
| 1088 | 1089 | */ |
| 1089 | 1090 | ieee80211_sta_set_buffered(sta, tid, false); |
| 1090 | 1091 | } |
| @@ -1257,7 +1258,6 @@ static void iwl_mvm_rx_tx_cmd_single(struct iwl_mvm *mvm, · 166 unmodified lines | ||
| 1257 | 1258 | u8 skb_freed = 0; |
| 1258 | 1259 | u16 next_reclaimed, seq_ctl; |
| 1259 | 1260 | bool is_ndp = false; |
| 1260 | − bool txq_agg = false; /* Is this TXQ aggregated */ | |
| 1261 | 1261 | |
| 1262 | 1262 | __skb_queue_head_init(&skbs); |
| 1263 | 1263 | |
| @@ -1283,6 +1283,10 @@ static void iwl_mvm_rx_tx_cmd_single(struct iwl_mvm *mvm, · 19 unmodified lines | ||
| 1283 | 1283 | info->flags |= IEEE80211_TX_STAT_ACK; |
| 1284 | 1284 | break; |
| 1285 | 1285 | case TX_STATUS_FAIL_DEST_PS: |
| 1286 | + /* In DQA, the FW should have stopped the queue and not | |
| 1287 | + * return this status | |
| 1288 | + */ | |
| 1289 | + WARN_ON(iwl_mvm_is_dqa_supported(mvm)); | |
| 1286 | 1290 | info->flags |= IEEE80211_TX_STAT_TX_FILTERED; |
| 1287 | 1291 | break; |
| 1288 | 1292 | default: |
| @@ -1387,15 +1391,6 @@ static void iwl_mvm_rx_tx_cmd_single(struct iwl_mvm *mvm, · 98 unmodified lines | ||
| 1387 | 1391 | bool send_eosp_ndp = false; |
| 1388 | 1392 | |
| 1389 | 1393 | spin_lock_bh(&mvmsta->lock); |
| 1390 | − if (iwl_mvm_is_dqa_supported(mvm)) { | |
| 1391 | − enum iwl_mvm_agg_state state; | |
| 1392 | − | |
| 1393 | − state = mvmsta->tid_data[tid].state; | |
| 1394 | − txq_agg = (state == IWL_AGG_ON || | |
| 1395 | − state == IWL_EMPTYING_HW_QUEUE_DELBA); | |
| 1396 | − } else { | |
| 1397 | − txq_agg = txq_id >= mvm->first_agg_queue; | |
| 1398 | − } | |
| 1399 | 1394 | |
| 1400 | 1395 | if (!is_ndp) { |
| 1401 | 1396 | tid_data->next_reclaimed = next_reclaimed; |
| @@ -1452,11 +1447,11 @@ static void iwl_mvm_rx_tx_cmd_single(struct iwl_mvm *mvm, · 50 unmodified lines | ||
| 1452 | 1447 | * If the txq is not an AMPDU queue, there is no chance we freed |
| 1453 | 1448 | * several skbs. Check that out... |
| 1454 | 1449 | */ |
| 1455 | − if (txq_agg) | |
| 1450 | + if (iwl_mvm_is_dqa_supported(mvm) || txq_id >= mvm->first_agg_queue) | |
| 1456 | 1451 | goto out; |
| 1457 | 1452 | |
| 1458 | 1453 | /* We can't free more than one frame at once on a shared queue */ |
| 1459 | − WARN_ON(!iwl_mvm_is_dqa_supported(mvm) && (skb_freed > 1)); | |
| 1454 | + WARN_ON(skb_freed > 1); | |
| 1460 | 1455 | |
| 1461 | 1456 | /* If we have still frames for this STA nothing to do here */ |
| 1462 | 1457 | if (!atomic_sub_and_test(skb_freed, &mvm->pending_frames[sta_id])) |
| @@ -57,8 +57,8 @@ MODULE_PARM_DESC(mfg_mode, "manufacturing mode enable:1, disable:0"); · 56 unmodified lines | ||
| 57 | 57 | * In case of any errors during inittialization, this function also ensures |
| 58 | 58 | * proper cleanup before exiting. |
| 59 | 59 | */ |
| 60 | −static int mwifiex_register(void *card, struct mwifiex_if_ops *if_ops, | |
| 61 | − void **padapter) | |
| 60 | +static int mwifiex_register(void *card, struct device *dev, | |
| 61 | + struct mwifiex_if_ops *if_ops, void **padapter) | |
| 62 | 62 | { |
| 63 | 63 | struct mwifiex_adapter *adapter; |
| 64 | 64 | int i; |
| @@ -68,6 +68,7 @@ static int mwifiex_register(void *card, struct mwifiex_if_ops *if_ops, · 3 unmodified lines | ||
| 68 | 68 | return -ENOMEM; |
| 69 | 69 | |
| 70 | 70 | *padapter = adapter; |
| 71 | + adapter->dev = dev; | |
| 71 | 72 | adapter->card = card; |
| 72 | 73 | |
| 73 | 74 | /* Save interface specific operations in adapter */ |
| @@ -1568,12 +1569,11 @@ mwifiex_add_card(void *card, struct completion *fw_done, · 1494 unmodified lines | ||
| 1568 | 1569 | { |
| 1569 | 1570 | struct mwifiex_adapter *adapter; |
| 1570 | 1571 | |
| 1571 | − if (mwifiex_register(card, if_ops, (void **)&adapter)) { | |
| 1572 | + if (mwifiex_register(card, dev, if_ops, (void **)&adapter)) { | |
| 1572 | 1573 | pr_err("%s: software init failed\n", __func__); |
| 1573 | 1574 | goto err_init_sw; |
| 1574 | 1575 | } |
| 1575 | 1576 | |
| 1576 | − adapter->dev = dev; | |
| 1577 | 1577 | mwifiex_probe_of(adapter); |
| 1578 | 1578 | |
| 1579 | 1579 | adapter->iface_type = iface_type; |
| @@ -1718,6 +1718,9 @@ int mwifiex_remove_card(struct mwifiex_adapter *adapter) · 138 unmodified lines | ||
| 1718 | 1718 | wiphy_unregister(adapter->wiphy); |
| 1719 | 1719 | wiphy_free(adapter->wiphy); |
| 1720 | 1720 | |
| 1721 | + if (adapter->irq_wakeup >= 0) | |
| 1722 | + device_init_wakeup(adapter->dev, false); | |
| 1723 | + | |
| 1721 | 1724 | /* Unregister device */ |
| 1722 | 1725 | mwifiex_dbg(adapter, INFO, |
| 1723 | 1726 | "info: unregister device\n"); |
| @@ -2739,6 +2739,21 @@ static void mwifiex_pcie_device_dump(struct mwifiex_adapter *adapter) · 2738 unmodified lines | ||
| 2739 | 2739 | schedule_work(&card->work); |
| 2740 | 2740 | } |
| 2741 | 2741 | |
| 2742 | +static void mwifiex_pcie_free_buffers(struct mwifiex_adapter *adapter) | |
| 2743 | +{ | |
| 2744 | + struct pcie_service_card *card = adapter->card; | |
| 2745 | + const struct mwifiex_pcie_card_reg *reg = card->pcie.reg; | |
| 2746 | + | |
| 2747 | + if (reg->sleep_cookie) | |
| 2748 | + mwifiex_pcie_delete_sleep_cookie_buf(adapter); | |
| 2749 | + | |
| 2750 | + mwifiex_pcie_delete_cmdrsp_buf(adapter); | |
| 2751 | + mwifiex_pcie_delete_evtbd_ring(adapter); | |
| 2752 | + mwifiex_pcie_delete_rxbd_ring(adapter); | |
| 2753 | + mwifiex_pcie_delete_txbd_ring(adapter); | |
| 2754 | + card->cmdrsp_buf = NULL; | |
| 2755 | +} | |
| 2756 | + | |
| 2742 | 2757 | /* |
| 2743 | 2758 | * This function initializes the PCI-E host memory space, WCB rings, etc. |
| 2744 | 2759 | * |
| @@ -2850,13 +2865,6 @@ err_enable_dev: · 105 unmodified lines | ||
| 2850 | 2865 | |
| 2851 | 2866 | /* |
| 2852 | 2867 | * This function cleans up the allocated card buffers. |
| 2853 | − * | |
| 2854 | − * The following are freed by this function - | |
| 2855 | − * - TXBD ring buffers | |
| 2856 | − * - RXBD ring buffers | |
| 2857 | − * - Event BD ring buffers | |
| 2858 | − * - Command response ring buffer | |
| 2859 | − * - Sleep cookie buffer | |
| 2860 | 2868 | */ |
| 2861 | 2869 | static void mwifiex_cleanup_pcie(struct mwifiex_adapter *adapter) |
| 2862 | 2870 | { |
| @@ -2875,6 +2883,8 @@ static void mwifiex_cleanup_pcie(struct mwifiex_adapter *adapter) · 12 unmodified lines | ||
| 2875 | 2883 | "Failed to write driver not-ready signature\n"); |
| 2876 | 2884 | } |
| 2877 | 2885 | |
| 2886 | + mwifiex_pcie_free_buffers(adapter); | |
| 2887 | + | |
| 2878 | 2888 | if (pdev) { |
| 2879 | 2889 | pci_iounmap(pdev, card->pci_mmap); |
| 2880 | 2890 | pci_iounmap(pdev, card->pci_mmap1); |
| @@ -3126,10 +3136,7 @@ err_cre_txbd: · 245 unmodified lines | ||
| 3126 | 3136 | pci_iounmap(pdev, card->pci_mmap1); |
| 3127 | 3137 | } |
| 3128 | 3138 | |
| 3129 | −/* This function cleans up the PCI-E host memory space. | |
| 3130 | − * Some code is extracted from mwifiex_unregister_dev() | |
| 3131 | − * | |
| 3132 | − */ | |
| 3139 | +/* This function cleans up the PCI-E host memory space. */ | |
| 3133 | 3140 | static void mwifiex_pcie_down_dev(struct mwifiex_adapter *adapter) |
| 3134 | 3141 | { |
| 3135 | 3142 | struct pcie_service_card *card = adapter->card; |
| @@ -3140,14 +3147,7 @@ static void mwifiex_pcie_down_dev(struct mwifiex_adapter *adapter) · 4 unmodified lines | ||
| 3140 | 3147 | |
| 3141 | 3148 | adapter->seq_num = 0; |
| 3142 | 3149 | |
| 3143 | − if (reg->sleep_cookie) | |
| 3144 | − mwifiex_pcie_delete_sleep_cookie_buf(adapter); | |
| 3145 | − | |
| 3146 | − mwifiex_pcie_delete_cmdrsp_buf(adapter); | |
| 3147 | − mwifiex_pcie_delete_evtbd_ring(adapter); | |
| 3148 | − mwifiex_pcie_delete_rxbd_ring(adapter); | |
| 3149 | − mwifiex_pcie_delete_txbd_ring(adapter); | |
| 3150 | − card->cmdrsp_buf = NULL; | |
| 3150 | + mwifiex_pcie_free_buffers(adapter); | |
| 3151 | 3151 | } |
| 3152 | 3152 | |
| 3153 | 3153 | static struct mwifiex_if_ops pcie_ops = { |
| @@ -165,13 +165,17 @@ static int xenvif_start_xmit(struct sk_buff *skb, struct net_device *dev) · 164 unmodified lines | ||
| 165 | 165 | { |
| 166 | 166 | struct xenvif *vif = netdev_priv(dev); |
| 167 | 167 | struct xenvif_queue *queue = NULL; |
| 168 | − unsigned int num_queues = vif->num_queues; | |
| 168 | + unsigned int num_queues; | |
| 169 | 169 | u16 index; |
| 170 | 170 | struct xenvif_rx_cb *cb; |
| 171 | 171 | |
| 172 | 172 | BUG_ON(skb->dev != dev); |
| 173 | 173 | |
| 174 | − /* Drop the packet if queues are not set up */ | |
| 174 | + /* Drop the packet if queues are not set up. | |
| 175 | + * This handler should be called inside an RCU read section | |
| 176 | + * so we don't need to enter it here explicitly. | |
| 177 | + */ | |
| 178 | + num_queues = READ_ONCE(vif->num_queues); | |
| 175 | 179 | if (num_queues < 1) |
| 176 | 180 | goto drop; |
| 177 | 181 | |
| @@ -222,18 +226,18 @@ static struct net_device_stats *xenvif_get_stats(struct net_device *dev) · 44 unmodified lines | ||
| 222 | 226 | { |
| 223 | 227 | struct xenvif *vif = netdev_priv(dev); |
| 224 | 228 | struct xenvif_queue *queue = NULL; |
| 229 | + unsigned int num_queues; | |
| 225 | 230 | u64 rx_bytes = 0; |
| 226 | 231 | u64 rx_packets = 0; |
| 227 | 232 | u64 tx_bytes = 0; |
| 228 | 233 | u64 tx_packets = 0; |
| 229 | 234 | unsigned int index; |
| 230 | 235 | |
| 231 | − spin_lock(&vif->lock); | |
| 232 | − if (vif->queues == NULL) | |
| 233 | − goto out; | |
| 236 | + rcu_read_lock(); | |
| 237 | + num_queues = READ_ONCE(vif->num_queues); | |
| 234 | 238 | |
| 235 | 239 | /* Aggregate tx and rx stats from each queue */ |
| 236 | − for (index = 0; index < vif->num_queues; ++index) { | |
| 240 | + for (index = 0; index < num_queues; ++index) { | |
| 237 | 241 | queue = &vif->queues[index]; |
| 238 | 242 | rx_bytes += queue->stats.rx_bytes; |
| 239 | 243 | rx_packets += queue->stats.rx_packets; |
| @@ -241,8 +245,7 @@ static struct net_device_stats *xenvif_get_stats(struct net_device *dev) · 1 unmodified line | ||
| 241 | 245 | tx_packets += queue->stats.tx_packets; |
| 242 | 246 | } |
| 243 | 247 | |
| 244 | −out: | |
| 245 | − spin_unlock(&vif->lock); | |
| 248 | + rcu_read_unlock(); | |
| 246 | 249 | |
| 247 | 250 | vif->dev->stats.rx_bytes = rx_bytes; |
| 248 | 251 | vif->dev->stats.rx_packets = rx_packets; |
| @@ -378,10 +381,13 @@ static void xenvif_get_ethtool_stats(struct net_device *dev, · 129 unmodified lines | ||
| 378 | 381 | struct ethtool_stats *stats, u64 * data) |
| 379 | 382 | { |
| 380 | 383 | struct xenvif *vif = netdev_priv(dev); |
| 381 | − unsigned int num_queues = vif->num_queues; | |
| 384 | + unsigned int num_queues; | |
| 382 | 385 | int i; |
| 383 | 386 | unsigned int queue_index; |
| 384 | 387 | |
| 388 | + rcu_read_lock(); | |
| 389 | + num_queues = READ_ONCE(vif->num_queues); | |
| 390 | + | |
| 385 | 391 | for (i = 0; i < ARRAY_SIZE(xenvif_stats); i++) { |
| 386 | 392 | unsigned long accum = 0; |
| 387 | 393 | for (queue_index = 0; queue_index < num_queues; ++queue_index) { |
| @@ -390,6 +396,8 @@ static void xenvif_get_ethtool_stats(struct net_device *dev, · 2 unmodified lines | ||
| 390 | 396 | } |
| 391 | 397 | data[i] = accum; |
| 392 | 398 | } |
| 399 | + | |
| 400 | + rcu_read_unlock(); | |
| 393 | 401 | } |
| 394 | 402 | |
| 395 | 403 | static void xenvif_get_strings(struct net_device *dev, u32 stringset, u8 * data) |
| @@ -214,7 +214,7 @@ static void xenvif_fatal_tx_err(struct xenvif *vif) · 213 unmodified lines | ||
| 214 | 214 | netdev_err(vif->dev, "fatal error; disabling device\n"); |
| 215 | 215 | vif->disabled = true; |
| 216 | 216 | /* Disable the vif from queue 0's kthread */ |
| 217 | − if (vif->queues) | |
| 217 | + if (vif->num_queues) | |
| 218 | 218 | xenvif_kick_thread(&vif->queues[0]); |
| 219 | 219 | } |
| 220 | 220 | |
| @@ -495,26 +495,26 @@ static void backend_disconnect(struct backend_info *be) · 494 unmodified lines | ||
| 495 | 495 | struct xenvif *vif = be->vif; |
| 496 | 496 | |
| 497 | 497 | if (vif) { |
| 498 | + unsigned int num_queues = vif->num_queues; | |
| 498 | 499 | unsigned int queue_index; |
| 499 | − struct xenvif_queue *queues; | |
| 500 | 500 | |
| 501 | 501 | xen_unregister_watchers(vif); |
| 502 | 502 | #ifdef CONFIG_DEBUG_FS |
| 503 | 503 | xenvif_debugfs_delif(vif); |
| 504 | 504 | #endif /* CONFIG_DEBUG_FS */ |
| 505 | 505 | xenvif_disconnect_data(vif); |
| 506 | − for (queue_index = 0; | |
| 507 | − queue_index < vif->num_queues; | |
| 508 | − ++queue_index) | |
| 509 | − xenvif_deinit_queue(&vif->queues[queue_index]); | |
| 510 | 506 | |
| 511 | − spin_lock(&vif->lock); | |
| 512 | − queues = vif->queues; | |
| 507 | + /* At this point some of the handlers may still be active | |
| 508 | + * so we need to have additional synchronization here. | |
| 509 | + */ | |
| 513 | 510 | vif->num_queues = 0; |
| 514 | − vif->queues = NULL; | |
| 515 | − spin_unlock(&vif->lock); | |
| 511 | + synchronize_net(); | |
| 516 | 512 | |
| 517 | − vfree(queues); | |
| 513 | + for (queue_index = 0; queue_index < num_queues; ++queue_index) | |
| 514 | + xenvif_deinit_queue(&vif->queues[queue_index]); | |
| 515 | + | |
| 516 | + vfree(vif->queues); | |
| 517 | + vif->queues = NULL; | |
| 518 | 518 | |
| 519 | 519 | xenvif_disconnect_ctrl(vif); |
| 520 | 520 | } |
| @@ -934,8 +934,14 @@ static int __nd_ioctl(struct nvdimm_bus *nvdimm_bus, struct nvdimm *nvdimm, · 933 unmodified lines | ||
| 934 | 934 | rc = nd_desc->ndctl(nd_desc, nvdimm, cmd, buf, buf_len, NULL); |
| 935 | 935 | if (rc < 0) |
| 936 | 936 | goto out_unlock; |
| 937 | + nvdimm_bus_unlock(&nvdimm_bus->dev); | |
| 938 | + | |
| 937 | 939 | if (copy_to_user(p, buf, buf_len)) |
| 938 | 940 | rc = -EFAULT; |
| 941 | + | |
| 942 | + vfree(buf); | |
| 943 | + return rc; | |
| 944 | + | |
| 939 | 945 | out_unlock: |
| 940 | 946 | nvdimm_bus_unlock(&nvdimm_bus->dev); |
| 941 | 947 | out: |
| @@ -243,7 +243,15 @@ static int nsio_rw_bytes(struct nd_namespace_common *ndns, · 242 unmodified lines | ||
| 243 | 243 | } |
| 244 | 244 | |
| 245 | 245 | if (unlikely(is_bad_pmem(&nsio->bb, sector, sz_align))) { |
| 246 | − if (IS_ALIGNED(offset, 512) && IS_ALIGNED(size, 512)) { | |
| 246 | + /* | |
| 247 | + * FIXME: nsio_rw_bytes() may be called from atomic | |
| 248 | + * context in the btt case and nvdimm_clear_poison() | |
| 249 | + * takes a sleeping lock. Until the locking can be | |
| 250 | + * reworked this capability requires that the namespace | |
| 251 | + * is not claimed by btt. | |
| 252 | + */ | |
| 253 | + if (IS_ALIGNED(offset, 512) && IS_ALIGNED(size, 512) | |
| 254 | + && (!ndns->claim || !is_nd_btt(ndns->claim))) { | |
| 247 | 255 | long cleared; |
| 248 | 256 | |
| 249 | 257 | cleared = nvdimm_clear_poison(&ndns->dev, offset, size); |
| @@ -395,7 +395,7 @@ EXPORT_SYMBOL_GPL(nvdimm_create); · 394 unmodified lines | ||
| 395 | 395 | |
| 396 | 396 | int alias_dpa_busy(struct device *dev, void *data) |
| 397 | 397 | { |
| 398 | − resource_size_t map_end, blk_start, new, busy; | |
| 398 | + resource_size_t map_end, blk_start, new; | |
| 399 | 399 | struct blk_alloc_info *info = data; |
| 400 | 400 | struct nd_mapping *nd_mapping; |
| 401 | 401 | struct nd_region *nd_region; |
| @@ -436,29 +436,19 @@ int alias_dpa_busy(struct device *dev, void *data) · 34 unmodified lines | ||
| 436 | 436 | retry: |
| 437 | 437 | /* |
| 438 | 438 | * Find the free dpa from the end of the last pmem allocation to |
| 439 | − * the end of the interleave-set mapping that is not already | |
| 440 | − * covered by a blk allocation. | |
| 439 | + * the end of the interleave-set mapping. | |
| 441 | 440 | */ |
| 442 | − busy = 0; | |
| 443 | 441 | for_each_dpa_resource(ndd, res) { |
| 442 | + if (strncmp(res->name, "pmem", 4) != 0) | |
| 443 | + continue; | |
| 444 | 444 | if ((res->start >= blk_start && res->start < map_end) |
| 445 | 445 | || (res->end >= blk_start |
| 446 | 446 | && res->end <= map_end)) { |
| 447 | − if (strncmp(res->name, "pmem", 4) == 0) { | |
| 448 | − new = max(blk_start, min(map_end + 1, | |
| 449 | − res->end + 1)); | |
| 450 | − if (new != blk_start) { | |
| 451 | − blk_start = new; | |
| 452 | − goto retry; | |
| 453 | − } | |
| 454 | − } else | |
| 455 | − busy += min(map_end, res->end) | |
| 456 | − - max(nd_mapping->start, res->start) + 1; | |
| 457 | − } else if (nd_mapping->start > res->start | |
| 458 | − && map_end < res->end) { | |
| 459 | − /* total eclipse of the PMEM region mapping */ | |
| 460 | − busy += nd_mapping->size; | |
| 461 | − break; | |
| 447 | + new = max(blk_start, min(map_end + 1, res->end + 1)); | |
| 448 | + if (new != blk_start) { | |
| 449 | + blk_start = new; | |
| 450 | + goto retry; | |
| 451 | + } | |
| 462 | 452 | } |
| 463 | 453 | } |
| 464 | 454 | |
| @@ -470,52 +460,11 @@ int alias_dpa_busy(struct device *dev, void *data) · 5 unmodified lines | ||
| 470 | 460 | return 1; |
| 471 | 461 | } |
| 472 | 462 | |
| 473 | − info->available -= blk_start - nd_mapping->start + busy; | |
| 463 | + info->available -= blk_start - nd_mapping->start; | |
| 474 | 464 | |
| 475 | 465 | return 0; |
| 476 | 466 | } |
| 477 | 467 | |
| 478 | −static int blk_dpa_busy(struct device *dev, void *data) | |
| 479 | −{ | |
| 480 | − struct blk_alloc_info *info = data; | |
| 481 | − struct nd_mapping *nd_mapping; | |
| 482 | − struct nd_region *nd_region; | |
| 483 | − resource_size_t map_end; | |
| 484 | − int i; | |
| 485 | − | |
| 486 | − if (!is_nd_pmem(dev)) | |
| 487 | − return 0; | |
| 488 | − | |
| 489 | − nd_region = to_nd_region(dev); | |
| 490 | − for (i = 0; i < nd_region->ndr_mappings; i++) { | |
| 491 | − nd_mapping = &nd_region->mapping[i]; | |
| 492 | − if (nd_mapping->nvdimm == info->nd_mapping->nvdimm) | |
| 493 | − break; | |
| 494 | − } | |
| 495 | − | |
| 496 | − if (i >= nd_region->ndr_mappings) | |
| 497 | − return 0; | |
| 498 | − | |
| 499 | − map_end = nd_mapping->start + nd_mapping->size - 1; | |
| 500 | − if (info->res->start >= nd_mapping->start | |
| 501 | − && info->res->start < map_end) { | |
| 502 | − if (info->res->end <= map_end) { | |
| 503 | − info->busy = 0; | |
| 504 | − return 1; | |
| 505 | − } else { | |
| 506 | − info->busy -= info->res->end - map_end; | |
| 507 | − return 0; | |
| 508 | − } | |
| 509 | − } else if (info->res->end >= nd_mapping->start | |
| 510 | − && info->res->end <= map_end) { | |
| 511 | − info->busy -= nd_mapping->start - info->res->start; | |
| 512 | − return 0; | |
| 513 | − } else { | |
| 514 | − info->busy -= nd_mapping->size; | |
| 515 | − return 0; | |
| 516 | − } | |
| 517 | −} | |
| 518 | − | |
| 519 | 468 | /** |
| 520 | 469 | * nd_blk_available_dpa - account the unused dpa of BLK region |
| 521 | 470 | * @nd_mapping: container of dpa-resource-root + labels |
| @@ -545,11 +494,7 @@ resource_size_t nd_blk_available_dpa(struct nd_region *nd_region) · 23 unmodified lines | ||
| 545 | 494 | for_each_dpa_resource(ndd, res) { |
| 546 | 495 | if (strncmp(res->name, "blk", 3) != 0) |
| 547 | 496 | continue; |
| 548 | − | |
| 549 | − info.res = res; | |
| 550 | − info.busy = resource_size(res); | |
| 551 | − device_for_each_child(&nvdimm_bus->dev, &info, blk_dpa_busy); | |
| 552 | − info.available -= info.busy; | |
| 497 | + info.available -= resource_size(res); | |
| 553 | 498 | } |
| 554 | 499 | |
| 555 | 500 | return info.available; |
| @@ -343,8 +343,6 @@ static int __nvme_rdma_init_request(struct nvme_rdma_ctrl *ctrl, · 342 unmodified lines | ||
| 343 | 343 | struct ib_device *ibdev = dev->dev; |
| 344 | 344 | int ret; |
| 345 | 345 | |
| 346 | − BUG_ON(queue_idx >= ctrl->queue_count); | |
| 347 | − | |
| 348 | 346 | ret = nvme_rdma_alloc_qe(ibdev, &req->sqe, sizeof(struct nvme_command), |
| 349 | 347 | DMA_TO_DEVICE); |
| 350 | 348 | if (ret) |
| @@ -652,8 +650,22 @@ out_free_queues: · 301 unmodified lines | ||
| 652 | 650 | |
| 653 | 651 | static int nvme_rdma_init_io_queues(struct nvme_rdma_ctrl *ctrl) |
| 654 | 652 | { |
| 653 | + struct nvmf_ctrl_options *opts = ctrl->ctrl.opts; | |
| 654 | + unsigned int nr_io_queues; | |
| 655 | 655 | int i, ret; |
| 656 | 656 | |
| 657 | + nr_io_queues = min(opts->nr_io_queues, num_online_cpus()); | |
| 658 | + ret = nvme_set_queue_count(&ctrl->ctrl, &nr_io_queues); | |
| 659 | + if (ret) | |
| 660 | + return ret; | |
| 661 | + | |
| 662 | + ctrl->queue_count = nr_io_queues + 1; | |
| 663 | + if (ctrl->queue_count < 2) | |
| 664 | + return 0; | |
| 665 | + | |
| 666 | + dev_info(ctrl->ctrl.device, | |
| 667 | + "creating %d I/O queues.\n", nr_io_queues); | |
| 668 | + | |
| 657 | 669 | for (i = 1; i < ctrl->queue_count; i++) { |
| 658 | 670 | ret = nvme_rdma_init_queue(ctrl, i, |
| 659 | 671 | ctrl->ctrl.opts->queue_size); |
| @@ -1791,20 +1803,8 @@ static const struct nvme_ctrl_ops nvme_rdma_ctrl_ops = { · 1131 unmodified lines | ||
| 1791 | 1803 | |
| 1792 | 1804 | static int nvme_rdma_create_io_queues(struct nvme_rdma_ctrl *ctrl) |
| 1793 | 1805 | { |
| 1794 | − struct nvmf_ctrl_options *opts = ctrl->ctrl.opts; | |
| 1795 | 1806 | int ret; |
| 1796 | 1807 | |
| 1797 | − ret = nvme_set_queue_count(&ctrl->ctrl, &opts->nr_io_queues); | |
| 1798 | − if (ret) | |
| 1799 | − return ret; | |
| 1800 | − | |
| 1801 | − ctrl->queue_count = opts->nr_io_queues + 1; | |
| 1802 | − if (ctrl->queue_count < 2) | |
| 1803 | − return 0; | |
| 1804 | − | |
| 1805 | − dev_info(ctrl->ctrl.device, | |
| 1806 | − "creating %d I/O queues.\n", opts->nr_io_queues); | |
| 1807 | − | |
| 1808 | 1808 | ret = nvme_rdma_init_io_queues(ctrl); |
| 1809 | 1809 | if (ret) |
| 1810 | 1810 | return ret; |
| @@ -425,6 +425,13 @@ void nvmet_sq_setup(struct nvmet_ctrl *ctrl, struct nvmet_sq *sq, · 424 unmodified lines | ||
| 425 | 425 | ctrl->sqs[qid] = sq; |
| 426 | 426 | } |
| 427 | 427 | |
| 428 | +static void nvmet_confirm_sq(struct percpu_ref *ref) | |
| 429 | +{ | |
| 430 | + struct nvmet_sq *sq = container_of(ref, struct nvmet_sq, ref); | |
| 431 | + | |
| 432 | + complete(&sq->confirm_done); | |
| 433 | +} | |
| 434 | + | |
| 428 | 435 | void nvmet_sq_destroy(struct nvmet_sq *sq) |
| 429 | 436 | { |
| 430 | 437 | /* |
| @@ -433,7 +440,8 @@ void nvmet_sq_destroy(struct nvmet_sq *sq) · 2 unmodified lines | ||
| 433 | 440 | */ |
| 434 | 441 | if (sq->ctrl && sq->ctrl->sqs && sq->ctrl->sqs[0] == sq) |
| 435 | 442 | nvmet_async_events_free(sq->ctrl); |
| 436 | − percpu_ref_kill(&sq->ref); | |
| 443 | + percpu_ref_kill_and_confirm(&sq->ref, nvmet_confirm_sq); | |
| 444 | + wait_for_completion(&sq->confirm_done); | |
| 437 | 445 | wait_for_completion(&sq->free_done); |
| 438 | 446 | percpu_ref_exit(&sq->ref); |
| 439 | 447 | |
| @@ -461,6 +469,7 @@ int nvmet_sq_init(struct nvmet_sq *sq) · 21 unmodified lines | ||
| 461 | 469 | return ret; |
| 462 | 470 | } |
| 463 | 471 | init_completion(&sq->free_done); |
| 472 | + init_completion(&sq->confirm_done); | |
| 464 | 473 | |
| 465 | 474 | return 0; |
| 466 | 475 | } |
| @@ -223,8 +223,6 @@ static void nvme_loop_submit_async_event(struct nvme_ctrl *arg, int aer_idx) · 222 unmodified lines | ||
| 223 | 223 | static int nvme_loop_init_iod(struct nvme_loop_ctrl *ctrl, |
| 224 | 224 | struct nvme_loop_iod *iod, unsigned int queue_idx) |
| 225 | 225 | { |
| 226 | − BUG_ON(queue_idx >= ctrl->queue_count); | |
| 227 | − | |
| 228 | 226 | iod->req.cmd = &iod->cmd; |
| 229 | 227 | iod->req.rsp = &iod->rsp; |
| 230 | 228 | iod->queue = &ctrl->queues[queue_idx]; |
| @@ -288,9 +286,9 @@ static struct blk_mq_ops nvme_loop_admin_mq_ops = { · 57 unmodified lines | ||
| 288 | 286 | |
| 289 | 287 | static void nvme_loop_destroy_admin_queue(struct nvme_loop_ctrl *ctrl) |
| 290 | 288 | { |
| 289 | + nvmet_sq_destroy(&ctrl->queues[0].nvme_sq); | |
| 291 | 290 | blk_cleanup_queue(ctrl->ctrl.admin_q); |
| 292 | 291 | blk_mq_free_tag_set(&ctrl->admin_tag_set); |
| 293 | − nvmet_sq_destroy(&ctrl->queues[0].nvme_sq); | |
| 294 | 292 | } |
| 295 | 293 | |
| 296 | 294 | static void nvme_loop_free_ctrl(struct nvme_ctrl *nctrl) |
| @@ -314,6 +312,43 @@ free_ctrl: · 17 unmodified lines | ||
| 314 | 312 | kfree(ctrl); |
| 315 | 313 | } |
| 316 | 314 | |
| 315 | +static void nvme_loop_destroy_io_queues(struct nvme_loop_ctrl *ctrl) | |
| 316 | +{ | |
| 317 | + int i; | |
| 318 | + | |
| 319 | + for (i = 1; i < ctrl->queue_count; i++) | |
| 320 | + nvmet_sq_destroy(&ctrl->queues[i].nvme_sq); | |
| 321 | +} | |
| 322 | + | |
| 323 | +static int nvme_loop_init_io_queues(struct nvme_loop_ctrl *ctrl) | |
| 324 | +{ | |
| 325 | + struct nvmf_ctrl_options *opts = ctrl->ctrl.opts; | |
| 326 | + unsigned int nr_io_queues; | |
| 327 | + int ret, i; | |
| 328 | + | |
| 329 | + nr_io_queues = min(opts->nr_io_queues, num_online_cpus()); | |
| 330 | + ret = nvme_set_queue_count(&ctrl->ctrl, &nr_io_queues); | |
| 331 | + if (ret || !nr_io_queues) | |
| 332 | + return ret; | |
| 333 | + | |
| 334 | + dev_info(ctrl->ctrl.device, "creating %d I/O queues.\n", nr_io_queues); | |
| 335 | + | |
| 336 | + for (i = 1; i <= nr_io_queues; i++) { | |
| 337 | + ctrl->queues[i].ctrl = ctrl; | |
| 338 | + ret = nvmet_sq_init(&ctrl->queues[i].nvme_sq); | |
| 339 | + if (ret) | |
| 340 | + goto out_destroy_queues; | |
| 341 | + | |
| 342 | + ctrl->queue_count++; | |
| 343 | + } | |
| 344 | + | |
| 345 | + return 0; | |
| 346 | + | |
| 347 | +out_destroy_queues: | |
| 348 | + nvme_loop_destroy_io_queues(ctrl); | |
| 349 | + return ret; | |
| 350 | +} | |
| 351 | + | |
| 317 | 352 | static int nvme_loop_configure_admin_queue(struct nvme_loop_ctrl *ctrl) |
| 318 | 353 | { |
| 319 | 354 | int error; |
| @@ -385,17 +420,13 @@ out_free_sq: · 65 unmodified lines | ||
| 385 | 420 | |
| 386 | 421 | static void nvme_loop_shutdown_ctrl(struct nvme_loop_ctrl *ctrl) |
| 387 | 422 | { |
| 388 | − int i; | |
| 389 | − | |
| 390 | 423 | nvme_stop_keep_alive(&ctrl->ctrl); |
| 391 | 424 | |
| 392 | 425 | if (ctrl->queue_count > 1) { |
| 393 | 426 | nvme_stop_queues(&ctrl->ctrl); |
| 394 | 427 | blk_mq_tagset_busy_iter(&ctrl->tag_set, |
| 395 | 428 | nvme_cancel_request, &ctrl->ctrl); |
| 396 | − | |
| 397 | − for (i = 1; i < ctrl->queue_count; i++) | |
| 398 | − nvmet_sq_destroy(&ctrl->queues[i].nvme_sq); | |
| 429 | + nvme_loop_destroy_io_queues(ctrl); | |
| 399 | 430 | } |
| 400 | 431 | |
| 401 | 432 | if (ctrl->ctrl.state == NVME_CTRL_LIVE) |
| @@ -467,19 +498,14 @@ static void nvme_loop_reset_ctrl_work(struct work_struct *work) · 65 unmodified lines | ||
| 467 | 498 | if (ret) |
| 468 | 499 | goto out_disable; |
| 469 | 500 | |
| 470 | − for (i = 1; i <= ctrl->ctrl.opts->nr_io_queues; i++) { | |
| 471 | − ctrl->queues[i].ctrl = ctrl; | |
| 472 | − ret = nvmet_sq_init(&ctrl->queues[i].nvme_sq); | |
| 473 | − if (ret) | |
| 474 | − goto out_free_queues; | |
| 475 | − | |
| 476 | − ctrl->queue_count++; | |
| 477 | − } | |
| 501 | + ret = nvme_loop_init_io_queues(ctrl); | |
| 502 | + if (ret) | |
| 503 | + goto out_destroy_admin; | |
| 478 | 504 | |
| 479 | − for (i = 1; i <= ctrl->ctrl.opts->nr_io_queues; i++) { | |
| 505 | + for (i = 1; i < ctrl->queue_count; i++) { | |
| 480 | 506 | ret = nvmf_connect_io_queue(&ctrl->ctrl, i); |
| 481 | 507 | if (ret) |
| 482 | − goto out_free_queues; | |
| 508 | + goto out_destroy_io; | |
| 483 | 509 | } |
| 484 | 510 | |
| 485 | 511 | changed = nvme_change_ctrl_state(&ctrl->ctrl, NVME_CTRL_LIVE); |
| @@ -492,9 +518,9 @@ static void nvme_loop_reset_ctrl_work(struct work_struct *work) · 6 unmodified lines | ||
| 492 | 518 | |
| 493 | 519 | return; |
| 494 | 520 | |
| 495 | −out_free_queues: | |
| 496 | − for (i = 1; i < ctrl->queue_count; i++) | |
| 497 | − nvmet_sq_destroy(&ctrl->queues[i].nvme_sq); | |
| 521 | +out_destroy_io: | |
| 522 | + nvme_loop_destroy_io_queues(ctrl); | |
| 523 | +out_destroy_admin: | |
| 498 | 524 | nvme_loop_destroy_admin_queue(ctrl); |
| 499 | 525 | out_disable: |
| 500 | 526 | dev_warn(ctrl->ctrl.device, "Removing after reset failure\n"); |
| @@ -533,25 +559,12 @@ static const struct nvme_ctrl_ops nvme_loop_ctrl_ops = { · 32 unmodified lines | ||
| 533 | 559 | |
| 534 | 560 | static int nvme_loop_create_io_queues(struct nvme_loop_ctrl *ctrl) |
| 535 | 561 | { |
| 536 | − struct nvmf_ctrl_options *opts = ctrl->ctrl.opts; | |
| 537 | 562 | int ret, i; |
| 538 | 563 | |
| 539 | − ret = nvme_set_queue_count(&ctrl->ctrl, &opts->nr_io_queues); | |
| 540 | − if (ret || !opts->nr_io_queues) | |
| 564 | + ret = nvme_loop_init_io_queues(ctrl); | |
| 565 | + if (ret) | |
| 541 | 566 | return ret; |
| 542 | 567 | |
| 543 | − dev_info(ctrl->ctrl.device, "creating %d I/O queues.\n", | |
| 544 | − opts->nr_io_queues); | |
| 545 | − | |
| 546 | − for (i = 1; i <= opts->nr_io_queues; i++) { | |
| 547 | − ctrl->queues[i].ctrl = ctrl; | |
| 548 | − ret = nvmet_sq_init(&ctrl->queues[i].nvme_sq); | |
| 549 | − if (ret) | |
| 550 | − goto out_destroy_queues; | |
| 551 | − | |
| 552 | − ctrl->queue_count++; | |
| 553 | − } | |
| 554 | − | |
| 555 | 568 | memset(&ctrl->tag_set, 0, sizeof(ctrl->tag_set)); |
| 556 | 569 | ctrl->tag_set.ops = &nvme_loop_mq_ops; |
| 557 | 570 | ctrl->tag_set.queue_depth = ctrl->ctrl.opts->queue_size; |
| @@ -575,7 +588,7 @@ static int nvme_loop_create_io_queues(struct nvme_loop_ctrl *ctrl) · 17 unmodified lines | ||
| 575 | 588 | goto out_free_tagset; |
| 576 | 589 | } |
| 577 | 590 | |
| 578 | − for (i = 1; i <= opts->nr_io_queues; i++) { | |
| 591 | + for (i = 1; i < ctrl->queue_count; i++) { | |
| 579 | 592 | ret = nvmf_connect_io_queue(&ctrl->ctrl, i); |
| 580 | 593 | if (ret) |
| 581 | 594 | goto out_cleanup_connect_q; |
| @@ -588,8 +601,7 @@ out_cleanup_connect_q: · 6 unmodified lines | ||
| 588 | 601 | out_free_tagset: |
| 589 | 602 | blk_mq_free_tag_set(&ctrl->tag_set); |
| 590 | 603 | out_destroy_queues: |
| 591 | − for (i = 1; i < ctrl->queue_count; i++) | |
| 592 | − nvmet_sq_destroy(&ctrl->queues[i].nvme_sq); | |
| 604 | + nvme_loop_destroy_io_queues(ctrl); | |
| 593 | 605 | return ret; |
| 594 | 606 | } |
| 595 | 607 | |
| @@ -73,6 +73,7 @@ struct nvmet_sq { · 72 unmodified lines | ||
| 73 | 73 | u16 qid; |
| 74 | 74 | u16 size; |
| 75 | 75 | struct completion free_done; |
| 76 | + struct completion confirm_done; | |
| 76 | 77 | }; |
| 77 | 78 | |
| 78 | 79 | /** |
| @@ -703,11 +703,6 @@ static void nvmet_rdma_handle_command(struct nvmet_rdma_queue *queue, · 702 unmodified lines | ||
| 703 | 703 | { |
| 704 | 704 | u16 status; |
| 705 | 705 | |
| 706 | − cmd->queue = queue; | |
| 707 | − cmd->n_rdma = 0; | |
| 708 | − cmd->req.port = queue->port; | |
| 709 | − | |
| 710 | − | |
| 711 | 706 | ib_dma_sync_single_for_cpu(queue->dev->device, |
| 712 | 707 | cmd->cmd->sge[0].addr, cmd->cmd->sge[0].length, |
| 713 | 708 | DMA_FROM_DEVICE); |
| @@ -760,9 +755,12 @@ static void nvmet_rdma_recv_done(struct ib_cq *cq, struct ib_wc *wc) · 46 unmodified lines | ||
| 760 | 755 | |
| 761 | 756 | cmd->queue = queue; |
| 762 | 757 | rsp = nvmet_rdma_get_rsp(queue); |
| 758 | + rsp->queue = queue; | |
| 763 | 759 | rsp->cmd = cmd; |
| 764 | 760 | rsp->flags = 0; |
| 765 | 761 | rsp->req.cmd = cmd->nvme_cmd; |
| 762 | + rsp->req.port = queue->port; | |
| 763 | + rsp->n_rdma = 0; | |
| 766 | 764 | |
| 767 | 765 | if (unlikely(queue->state != NVMET_RDMA_Q_LIVE)) { |
| 768 | 766 | unsigned long flags; |
| @@ -939,8 +939,10 @@ parport_register_dev_model(struct parport *port, const char *name, · 938 unmodified lines | ||
| 939 | 939 | * pardevice fields. -arca |
| 940 | 940 | */ |
| 941 | 941 | port->ops->init_state(par_dev, par_dev->state); |
| 942 | − port->proc_device = par_dev; | |
| 943 | − parport_device_proc_register(par_dev); | |
| 942 | + if (!test_and_set_bit(PARPORT_DEVPROC_REGISTERED, &port->devflags)) { | |
| 943 | + port->proc_device = par_dev; | |
| 944 | + parport_device_proc_register(par_dev); | |
| 945 | + } | |
| 944 | 946 | |
| 945 | 947 | return par_dev; |
| 946 | 948 | |
| @@ -449,6 +449,7 @@ config PHY_QCOM_UFS · 448 unmodified lines | ||
| 449 | 449 | config PHY_QCOM_USB_HS |
| 450 | 450 | tristate "Qualcomm USB HS PHY module" |
| 451 | 451 | depends on USB_ULPI_BUS |
| 452 | + depends on EXTCON || !EXTCON # if EXTCON=m, this cannot be built-in | |
| 452 | 453 | select GENERIC_PHY |
| 453 | 454 | help |
| 454 | 455 | Support for the USB high-speed ULPI compliant phy on Qualcomm |
| @@ -510,12 +511,4 @@ config PHY_MESON8B_USB2 · 55 unmodified lines | ||
| 510 | 511 | and GXBB SoCs. |
| 511 | 512 | If unsure, say N. |
| 512 | 513 | |
| 513 | −config PHY_NSP_USB3 | |
| 514 | − tristate "Broadcom NorthStar plus USB3 PHY driver" | |
| 515 | − depends on OF && (ARCH_BCM_NSP || COMPILE_TEST) | |
| 516 | − select GENERIC_PHY | |
| 517 | − default ARCH_BCM_NSP | |
| 518 | − help | |
| 519 | − Enable this to support the Broadcom Northstar plus USB3 PHY. | |
| 520 | − If unsure, say N. | |
| 521 | 514 | endmenu |
| @@ -62,4 +62,3 @@ obj-$(CONFIG_PHY_CYGNUS_PCIE) += phy-bcm-cygnus-pcie.o · 61 unmodified lines | ||
| 62 | 62 | obj-$(CONFIG_ARCH_TEGRA) += tegra/ |
| 63 | 63 | obj-$(CONFIG_PHY_NS2_PCIE) += phy-bcm-ns2-pcie.o |
| 64 | 64 | obj-$(CONFIG_PHY_MESON8B_USB2) += phy-meson8b-usb2.o |
| 65 | −obj-$(CONFIG_PHY_NSP_USB3) += phy-bcm-nsp-usb3.o | |
| @@ -1,177 +0,0 @@ | ||
| 1 | −/* | |
| 2 | − * Copyright (C) 2016 Broadcom | |
| 3 | − * | |
| 4 | − * This program is free software; you can redistribute it and/or | |
| 5 | − * modify it under the terms of the GNU General Public License as | |
| 6 | − * published by the Free Software Foundation version 2. | |
| 7 | − * | |
| 8 | − * This program is distributed "as is" WITHOUT ANY WARRANTY of any | |
| 9 | − * kind, whether express or implied; without even the implied warranty | |
| 10 | − * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
| 11 | − * GNU General Public License for more details. | |
| 12 | − */ | |
| 13 | − | |
| 14 | −#include <linux/delay.h> | |
| 15 | −#include <linux/io.h> | |
| 16 | −#include <linux/kernel.h> | |
| 17 | −#include <linux/mfd/syscon.h> | |
| 18 | −#include <linux/mdio.h> | |
| 19 | −#include <linux/module.h> | |
| 20 | −#include <linux/of.h> | |
| 21 | −#include <linux/of_address.h> | |
| 22 | −#include <linux/phy/phy.h> | |
| 23 | −#include <linux/regmap.h> | |
| 24 | − | |
| 25 | −#define NSP_USB3_RST_CTRL_OFFSET 0x3f8 | |
| 26 | − | |
| 27 | −/* mdio reg access */ | |
| 28 | −#define NSP_USB3_PHY_BASE_ADDR_REG 0x1f | |
| 29 | − | |
| 30 | −#define NSP_USB3_PHY_PLL30_BLOCK 0x8000 | |
| 31 | −#define NSP_USB3_PLL_CONTROL 0x01 | |
| 32 | −#define NSP_USB3_PLLA_CONTROL0 0x0a | |
| 33 | −#define NSP_USB3_PLLA_CONTROL1 0x0b | |
| 34 | − | |
| 35 | −#define NSP_USB3_PHY_TX_PMD_BLOCK 0x8040 | |
| 36 | −#define NSP_USB3_TX_PMD_CONTROL1 0x01 | |
| 37 | − | |
| 38 | −#define NSP_USB3_PHY_PIPE_BLOCK 0x8060 | |
| 39 | −#define NSP_USB3_LFPS_CMP 0x02 | |
| 40 | −#define NSP_USB3_LFPS_DEGLITCH 0x03 | |
| 41 | − | |
| 42 | −struct nsp_usb3_phy { | |
| 43 | − struct regmap *usb3_ctrl; | |
| 44 | − struct phy *phy; | |
| 45 | − struct mdio_device *mdiodev; | |
| 46 | −}; | |
| 47 | − | |
| 48 | −static int nsp_usb3_phy_init(struct phy *phy) | |
| 49 | −{ | |
| 50 | − struct nsp_usb3_phy *iphy = phy_get_drvdata(phy); | |
| 51 | − struct mii_bus *bus = iphy->mdiodev->bus; | |
| 52 | − int addr = iphy->mdiodev->addr; | |
| 53 | − u32 data; | |
| 54 | − int rc; | |
| 55 | − | |
| 56 | − rc = regmap_read(iphy->usb3_ctrl, 0, &data); | |
| 57 | − if (rc) | |
| 58 | − return rc; | |
| 59 | − data |= 1; | |
| 60 | − rc = regmap_write(iphy->usb3_ctrl, 0, data); | |
| 61 | − if (rc) | |
| 62 | − return rc; | |
| 63 | − | |
| 64 | − rc = regmap_write(iphy->usb3_ctrl, NSP_USB3_RST_CTRL_OFFSET, 1); | |
| 65 | − if (rc) | |
| 66 | − return rc; | |
| 67 | − | |
| 68 | − rc = mdiobus_write(bus, addr, NSP_USB3_PHY_BASE_ADDR_REG, | |
| 69 | − NSP_USB3_PHY_PLL30_BLOCK); | |
| 70 | − if (rc) | |
| 71 | − return rc; | |
| 72 | − | |
| 73 | − rc = mdiobus_write(bus, addr, NSP_USB3_PLL_CONTROL, 0x1000); | |
| 74 | − if (rc) | |
| 75 | − return rc; | |
| 76 | − | |
| 77 | − rc = mdiobus_write(bus, addr, NSP_USB3_PLLA_CONTROL0, 0x6400); | |
| 78 | − if (rc) | |
| 79 | − return rc; | |
| 80 | − | |
| 81 | − rc = mdiobus_write(bus, addr, NSP_USB3_PLLA_CONTROL1, 0xc000); | |
| 82 | − if (rc) | |
| 83 | − return rc; | |
| 84 | − | |
| 85 | − rc = mdiobus_write(bus, addr, NSP_USB3_PLLA_CONTROL1, 0x8000); | |
| 86 | − if (rc) | |
| 87 | − return rc; | |
| 88 | − | |
| 89 | − rc = regmap_write(iphy->usb3_ctrl, NSP_USB3_RST_CTRL_OFFSET, 0); | |
| 90 | − if (rc) | |
| 91 | − return rc; | |
| 92 | − | |
| 93 | − rc = mdiobus_write(bus, addr, NSP_USB3_PLL_CONTROL, 0x9000); | |
| 94 | − if (rc) | |
| 95 | − return rc; | |
| 96 | − | |
| 97 | − rc = mdiobus_write(bus, addr, NSP_USB3_PHY_BASE_ADDR_REG, | |
| 98 | − NSP_USB3_PHY_PIPE_BLOCK); | |
| 99 | − if (rc) | |
| 100 | − return rc; | |
| 101 | − | |
| 102 | − rc = mdiobus_write(bus, addr, NSP_USB3_LFPS_CMP, 0xf30d); | |
| 103 | − if (rc) | |
| 104 | − return rc; | |
| 105 | − | |
| 106 | − rc = mdiobus_write(bus, addr, NSP_USB3_LFPS_DEGLITCH, 0x6302); | |
| 107 | − if (rc) | |
| 108 | − return rc; | |
| 109 | − | |
| 110 | − rc = mdiobus_write(bus, addr, NSP_USB3_PHY_BASE_ADDR_REG, | |
| 111 | − NSP_USB3_PHY_TX_PMD_BLOCK); | |
| 112 | − if (rc) | |
| 113 | − return rc; | |
| 114 | − | |
| 115 | − rc = mdiobus_write(bus, addr, NSP_USB3_TX_PMD_CONTROL1, 0x1003); | |
| 116 | − | |
| 117 | − return rc; | |
| 118 | −} | |
| 119 | − | |
| 120 | −static struct phy_ops nsp_usb3_phy_ops = { | |
| 121 | − .init = nsp_usb3_phy_init, | |
| 122 | − .owner = THIS_MODULE, | |
| 123 | −}; | |
| 124 | − | |
| 125 | −static int nsp_usb3_phy_probe(struct mdio_device *mdiodev) | |
| 126 | −{ | |
| 127 | − struct device *dev = &mdiodev->dev; | |
| 128 | − struct phy_provider *provider; | |
| 129 | − struct nsp_usb3_phy *iphy; | |
| 130 | − | |
| 131 | − iphy = devm_kzalloc(dev, sizeof(*iphy), GFP_KERNEL); | |
| 132 | − if (!iphy) | |
| 133 | − return -ENOMEM; | |
| 134 | − iphy->mdiodev = mdiodev; | |
| 135 | − | |
| 136 | − iphy->usb3_ctrl = syscon_regmap_lookup_by_phandle(dev->of_node, | |
| 137 | − "usb3-ctrl-syscon"); | |
| 138 | − if (IS_ERR(iphy->usb3_ctrl)) | |
| 139 | − return PTR_ERR(iphy->usb3_ctrl); | |
| 140 | − | |
| 141 | − iphy->phy = devm_phy_create(dev, dev->of_node, &nsp_usb3_phy_ops); | |
| 142 | − if (IS_ERR(iphy->phy)) { | |
| 143 | − dev_err(dev, "failed to create PHY\n"); | |
| 144 | − return PTR_ERR(iphy->phy); | |
| 145 | − } | |
| 146 | − | |
| 147 | − phy_set_drvdata(iphy->phy, iphy); | |
| 148 | − | |
| 149 | − provider = devm_of_phy_provider_register(dev, of_phy_simple_xlate); | |
| 150 | − if (IS_ERR(provider)) { | |
| 151 | − dev_err(dev, "could not register PHY provider\n"); | |
| 152 | − return PTR_ERR(provider); | |
| 153 | − } | |
| 154 | − | |
| 155 | − return 0; | |
| 156 | −} | |
| 157 | − | |
| 158 | −static const struct of_device_id nsp_usb3_phy_of_match[] = { | |
| 159 | − {.compatible = "brcm,nsp-usb3-phy",}, | |
| 160 | − { /* sentinel */ } | |
| 161 | −}; | |
| 162 | − | |
| 163 | −static struct mdio_driver nsp_usb3_phy_driver = { | |
| 164 | − .mdiodrv = { | |
| 165 | − .driver = { | |
| 166 | − .name = "nsp-usb3-phy", | |
| 167 | − .of_match_table = nsp_usb3_phy_of_match, | |
| 168 | − }, | |
| 169 | − }, | |
| 170 | − .probe = nsp_usb3_phy_probe, | |
| 171 | −}; | |
| 172 | − | |
| 173 | −mdio_module_driver(nsp_usb3_phy_driver); | |
| 174 | − | |
| 175 | −MODULE_DESCRIPTION("Broadcom NSP USB3 PHY driver"); | |
| 176 | −MODULE_LICENSE("GPL v2"); | |
| 177 | −MODULE_AUTHOR("Yendapally Reddy Dhananjaya Reddy <yendapally.reddy@broadcom.com"); | |
| @@ -254,8 +254,8 @@ static int exynos_pcie_phy_probe(struct platform_device *pdev) · 253 unmodified lines | ||
| 254 | 254 | |
| 255 | 255 | res = platform_get_resource(pdev, IORESOURCE_MEM, 1); |
| 256 | 256 | exynos_phy->blk_base = devm_ioremap_resource(dev, res); |
| 257 | − if (IS_ERR(exynos_phy->phy_base)) | |
| 258 | − return PTR_ERR(exynos_phy->phy_base); | |
| 257 | + if (IS_ERR(exynos_phy->blk_base)) | |
| 258 | + return PTR_ERR(exynos_phy->blk_base); | |
| 259 | 259 | |
| 260 | 260 | exynos_phy->drv_data = drv_data; |
| 261 | 261 | |
| @@ -103,15 +103,6 @@ static struct quirk_entry quirk_asus_x200ca = { · 102 unmodified lines | ||
| 103 | 103 | .wapf = 2, |
| 104 | 104 | }; |
| 105 | 105 | |
| 106 | −static struct quirk_entry quirk_no_rfkill = { | |
| 107 | − .no_rfkill = true, | |
| 108 | −}; | |
| 109 | − | |
| 110 | −static struct quirk_entry quirk_no_rfkill_wapf4 = { | |
| 111 | − .wapf = 4, | |
| 112 | − .no_rfkill = true, | |
| 113 | −}; | |
| 114 | − | |
| 115 | 106 | static struct quirk_entry quirk_asus_ux303ub = { |
| 116 | 107 | .wmi_backlight_native = true, |
| 117 | 108 | }; |
| @@ -194,7 +185,7 @@ static const struct dmi_system_id asus_quirks[] = { · 76 unmodified lines | ||
| 194 | 185 | DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK COMPUTER INC."), |
| 195 | 186 | DMI_MATCH(DMI_PRODUCT_NAME, "X456UA"), |
| 196 | 187 | }, |
| 197 | − .driver_data = &quirk_no_rfkill_wapf4, | |
| 188 | + .driver_data = &quirk_asus_wapf4, | |
| 198 | 189 | }, |
| 199 | 190 | { |
| 200 | 191 | .callback = dmi_matched, |
| @@ -203,7 +194,7 @@ static const struct dmi_system_id asus_quirks[] = { · 2 unmodified lines | ||
| 203 | 194 | DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK COMPUTER INC."), |
| 204 | 195 | DMI_MATCH(DMI_PRODUCT_NAME, "X456UF"), |
| 205 | 196 | }, |
| 206 | − .driver_data = &quirk_no_rfkill_wapf4, | |
| 197 | + .driver_data = &quirk_asus_wapf4, | |
| 207 | 198 | }, |
| 208 | 199 | { |
| 209 | 200 | .callback = dmi_matched, |
| @@ -367,42 +358,6 @@ static const struct dmi_system_id asus_quirks[] = { · 157 unmodified lines | ||
| 367 | 358 | }, |
| 368 | 359 | .driver_data = &quirk_asus_x200ca, |
| 369 | 360 | }, |
| 370 | − { | |
| 371 | − .callback = dmi_matched, | |
| 372 | − .ident = "ASUSTeK COMPUTER INC. X555UB", | |
| 373 | − .matches = { | |
| 374 | − DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK COMPUTER INC."), | |
| 375 | − DMI_MATCH(DMI_PRODUCT_NAME, "X555UB"), | |
| 376 | − }, | |
| 377 | − .driver_data = &quirk_no_rfkill, | |
| 378 | − }, | |
| 379 | − { | |
| 380 | − .callback = dmi_matched, | |
| 381 | − .ident = "ASUSTeK COMPUTER INC. N552VW", | |
| 382 | − .matches = { | |
| 383 | − DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK COMPUTER INC."), | |
| 384 | − DMI_MATCH(DMI_PRODUCT_NAME, "N552VW"), | |
| 385 | − }, | |
| 386 | − .driver_data = &quirk_no_rfkill, | |
| 387 | − }, | |
| 388 | − { | |
| 389 | − .callback = dmi_matched, | |
| 390 | − .ident = "ASUSTeK COMPUTER INC. U303LB", | |
| 391 | − .matches = { | |
| 392 | − DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK COMPUTER INC."), | |
| 393 | − DMI_MATCH(DMI_PRODUCT_NAME, "U303LB"), | |
| 394 | − }, | |
| 395 | − .driver_data = &quirk_no_rfkill, | |
| 396 | − }, | |
| 397 | − { | |
| 398 | − .callback = dmi_matched, | |
| 399 | − .ident = "ASUSTeK COMPUTER INC. Z550MA", | |
| 400 | − .matches = { | |
| 401 | − DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK COMPUTER INC."), | |
| 402 | − DMI_MATCH(DMI_PRODUCT_NAME, "Z550MA"), | |
| 403 | − }, | |
| 404 | − .driver_data = &quirk_no_rfkill, | |
| 405 | − }, | |
| 406 | 361 | { |
| 407 | 362 | .callback = dmi_matched, |
| 408 | 363 | .ident = "ASUSTeK COMPUTER INC. UX303UB", |
| @@ -159,6 +159,8 @@ MODULE_LICENSE("GPL"); · 158 unmodified lines | ||
| 159 | 159 | #define USB_INTEL_XUSB2PR 0xD0 |
| 160 | 160 | #define PCI_DEVICE_ID_INTEL_LYNXPOINT_LP_XHCI 0x9c31 |
| 161 | 161 | |
| 162 | +static const char * const ashs_ids[] = { "ATK4001", "ATK4002", NULL }; | |
| 163 | + | |
| 162 | 164 | struct bios_args { |
| 163 | 165 | u32 arg0; |
| 164 | 166 | u32 arg1; |
| @@ -2051,6 +2053,16 @@ static int asus_wmi_fan_init(struct asus_wmi *asus) · 1886 unmodified lines | ||
| 2051 | 2053 | return 0; |
| 2052 | 2054 | } |
| 2053 | 2055 | |
| 2056 | +static bool ashs_present(void) | |
| 2057 | +{ | |
| 2058 | + int i = 0; | |
| 2059 | + while (ashs_ids[i]) { | |
| 2060 | + if (acpi_dev_found(ashs_ids[i++])) | |
| 2061 | + return true; | |
| 2062 | + } | |
| 2063 | + return false; | |
| 2064 | +} | |
| 2065 | + | |
| 2054 | 2066 | /* |
| 2055 | 2067 | * WMI Driver |
| 2056 | 2068 | */ |
| @@ -2095,7 +2107,11 @@ static int asus_wmi_add(struct platform_device *pdev) · 38 unmodified lines | ||
| 2095 | 2107 | if (err) |
| 2096 | 2108 | goto fail_leds; |
| 2097 | 2109 | |
| 2098 | − if (!asus->driver->quirks->no_rfkill) { | |
| 2110 | + asus_wmi_get_devstate(asus, ASUS_WMI_DEVID_WLAN, &result); | |
| 2111 | + if (result & (ASUS_WMI_DSTS_PRESENCE_BIT | ASUS_WMI_DSTS_USER_BIT)) | |
| 2112 | + asus->driver->wlan_ctrl_by_user = 1; | |
| 2113 | + | |
| 2114 | + if (!(asus->driver->wlan_ctrl_by_user && ashs_present())) { | |
| 2099 | 2115 | err = asus_wmi_rfkill_init(asus); |
| 2100 | 2116 | if (err) |
| 2101 | 2117 | goto fail_rfkill; |
| @@ -2134,10 +2150,6 @@ static int asus_wmi_add(struct platform_device *pdev) · 32 unmodified lines | ||
| 2134 | 2150 | if (err) |
| 2135 | 2151 | goto fail_debugfs; |
| 2136 | 2152 | |
| 2137 | − asus_wmi_get_devstate(asus, ASUS_WMI_DEVID_WLAN, &result); | |
| 2138 | − if (result & (ASUS_WMI_DSTS_PRESENCE_BIT | ASUS_WMI_DSTS_USER_BIT)) | |
| 2139 | − asus->driver->wlan_ctrl_by_user = 1; | |
| 2140 | − | |
| 2141 | 2153 | return 0; |
| 2142 | 2154 | |
| 2143 | 2155 | fail_debugfs: |
| @@ -39,7 +39,6 @@ struct key_entry; · 38 unmodified lines | ||
| 39 | 39 | struct asus_wmi; |
| 40 | 40 | |
| 41 | 41 | struct quirk_entry { |
| 42 | − bool no_rfkill; | |
| 43 | 42 | bool hotplug_wireless; |
| 44 | 43 | bool scalar_panel_brightness; |
| 45 | 44 | bool store_backlight_power; |
| @@ -78,18 +78,18 @@ · 77 unmodified lines | ||
| 78 | 78 | |
| 79 | 79 | #define FUJITSU_LCD_N_LEVELS 8 |
| 80 | 80 | |
| 81 | −#define ACPI_FUJITSU_CLASS "fujitsu" | |
| 82 | −#define ACPI_FUJITSU_HID "FUJ02B1" | |
| 83 | −#define ACPI_FUJITSU_DRIVER_NAME "Fujitsu laptop FUJ02B1 ACPI brightness driver" | |
| 84 | −#define ACPI_FUJITSU_DEVICE_NAME "Fujitsu FUJ02B1" | |
| 85 | −#define ACPI_FUJITSU_HOTKEY_HID "FUJ02E3" | |
| 86 | −#define ACPI_FUJITSU_HOTKEY_DRIVER_NAME "Fujitsu laptop FUJ02E3 ACPI hotkeys driver" | |
| 87 | −#define ACPI_FUJITSU_HOTKEY_DEVICE_NAME "Fujitsu FUJ02E3" | |
| 81 | +#define ACPI_FUJITSU_CLASS "fujitsu" | |
| 82 | +#define ACPI_FUJITSU_BL_HID "FUJ02B1" | |
| 83 | +#define ACPI_FUJITSU_BL_DRIVER_NAME "Fujitsu laptop FUJ02B1 ACPI brightness driver" | |
| 84 | +#define ACPI_FUJITSU_BL_DEVICE_NAME "Fujitsu FUJ02B1" | |
| 85 | +#define ACPI_FUJITSU_LAPTOP_HID "FUJ02E3" | |
| 86 | +#define ACPI_FUJITSU_LAPTOP_DRIVER_NAME "Fujitsu laptop FUJ02E3 ACPI hotkeys driver" | |
| 87 | +#define ACPI_FUJITSU_LAPTOP_DEVICE_NAME "Fujitsu FUJ02E3" | |
| 88 | 88 | |
| 89 | 89 | #define ACPI_FUJITSU_NOTIFY_CODE1 0x80 |
| 90 | 90 | |
| 91 | 91 | /* FUNC interface - command values */ |
| 92 | −#define FUNC_RFKILL 0x1000 | |
| 92 | +#define FUNC_FLAGS 0x1000 | |
| 93 | 93 | #define FUNC_LEDS 0x1001 |
| 94 | 94 | #define FUNC_BUTTONS 0x1002 |
| 95 | 95 | #define FUNC_BACKLIGHT 0x1004 |
| @@ -97,6 +97,11 @@ · 1 unmodified line | ||
| 97 | 97 | /* FUNC interface - responses */ |
| 98 | 98 | #define UNSUPPORTED_CMD 0x80000000 |
| 99 | 99 | |
| 100 | +/* FUNC interface - status flags */ | |
| 101 | +#define FLAG_RFKILL 0x020 | |
| 102 | +#define FLAG_LID 0x100 | |
| 103 | +#define FLAG_DOCK 0x200 | |
| 104 | + | |
| 100 | 105 | #if IS_ENABLED(CONFIG_LEDS_CLASS) |
| 101 | 106 | /* FUNC interface - LED control */ |
| 102 | 107 | #define FUNC_LED_OFF 0x1 |
| @@ -136,7 +141,7 @@ · 33 unmodified lines | ||
| 136 | 141 | #endif |
| 137 | 142 | |
| 138 | 143 | /* Device controlling the backlight and associated keys */ |
| 139 | −struct fujitsu_t { | |
| 144 | +struct fujitsu_bl { | |
| 140 | 145 | acpi_handle acpi_handle; |
| 141 | 146 | struct acpi_device *dev; |
| 142 | 147 | struct input_dev *input; |
| @@ -150,12 +155,12 @@ struct fujitsu_t { · 7 unmodified lines | ||
| 150 | 155 | unsigned int brightness_level; |
| 151 | 156 | }; |
| 152 | 157 | |
| 153 | −static struct fujitsu_t *fujitsu; | |
| 158 | +static struct fujitsu_bl *fujitsu_bl; | |
| 154 | 159 | static int use_alt_lcd_levels = -1; |
| 155 | 160 | static int disable_brightness_adjust = -1; |
| 156 | 161 | |
| 157 | −/* Device used to access other hotkeys on the laptop */ | |
| 158 | −struct fujitsu_hotkey_t { | |
| 162 | +/* Device used to access hotkeys and other features on the laptop */ | |
| 163 | +struct fujitsu_laptop { | |
| 159 | 164 | acpi_handle acpi_handle; |
| 160 | 165 | struct acpi_device *dev; |
| 161 | 166 | struct input_dev *input; |
| @@ -163,17 +168,15 @@ struct fujitsu_hotkey_t { · 1 unmodified line | ||
| 163 | 168 | struct platform_device *pf_device; |
| 164 | 169 | struct kfifo fifo; |
| 165 | 170 | spinlock_t fifo_lock; |
| 166 | − int rfkill_supported; | |
| 167 | − int rfkill_state; | |
| 171 | + int flags_supported; | |
| 172 | + int flags_state; | |
| 168 | 173 | int logolamp_registered; |
| 169 | 174 | int kblamps_registered; |
| 170 | 175 | int radio_led_registered; |
| 171 | 176 | int eco_led_registered; |
| 172 | 177 | }; |
| 173 | 178 | |
| 174 | −static struct fujitsu_hotkey_t *fujitsu_hotkey; | |
| 175 | − | |
| 176 | −static void acpi_fujitsu_hotkey_notify(struct acpi_device *device, u32 event); | |
| 179 | +static struct fujitsu_laptop *fujitsu_laptop; | |
| 177 | 180 | |
| 178 | 181 | #if IS_ENABLED(CONFIG_LEDS_CLASS) |
| 179 | 182 | static enum led_brightness logolamp_get(struct led_classdev *cdev); |
| @@ -222,8 +225,6 @@ static struct led_classdev eco_led = { · 42 unmodified lines | ||
| 222 | 225 | static u32 dbg_level = 0x03; |
| 223 | 226 | #endif |
| 224 | 227 | |
| 225 | −static void acpi_fujitsu_notify(struct acpi_device *device, u32 event); | |
| 226 | − | |
| 227 | 228 | /* Fujitsu ACPI interface function */ |
| 228 | 229 | |
| 229 | 230 | static int call_fext_func(int cmd, int arg0, int arg1, int arg2) |
| @@ -239,7 +240,7 @@ static int call_fext_func(int cmd, int arg0, int arg1, int arg2) · 9 unmodified lines | ||
| 239 | 240 | unsigned long long value; |
| 240 | 241 | acpi_handle handle = NULL; |
| 241 | 242 | |
| 242 | − status = acpi_get_handle(fujitsu_hotkey->acpi_handle, "FUNC", &handle); | |
| 243 | + status = acpi_get_handle(fujitsu_laptop->acpi_handle, "FUNC", &handle); | |
| 243 | 244 | if (ACPI_FAILURE(status)) { |
| 244 | 245 | vdbg_printk(FUJLAPTOP_DBG_ERROR, |
| 245 | 246 | "FUNC interface is not present\n"); |
| @@ -300,9 +301,9 @@ static int radio_led_set(struct led_classdev *cdev, · 54 unmodified lines | ||
| 300 | 301 | enum led_brightness brightness) |
| 301 | 302 | { |
| 302 | 303 | if (brightness >= LED_FULL) |
| 303 | − return call_fext_func(FUNC_RFKILL, 0x5, RADIO_LED_ON, RADIO_LED_ON); | |
| 304 | + return call_fext_func(FUNC_FLAGS, 0x5, RADIO_LED_ON, RADIO_LED_ON); | |
| 304 | 305 | else |
| 305 | − return call_fext_func(FUNC_RFKILL, 0x5, RADIO_LED_ON, 0x0); | |
| 306 | + return call_fext_func(FUNC_FLAGS, 0x5, RADIO_LED_ON, 0x0); | |
| 306 | 307 | } |
| 307 | 308 | |
| 308 | 309 | static int eco_led_set(struct led_classdev *cdev, |
| @@ -346,7 +347,7 @@ static enum led_brightness radio_led_get(struct led_classdev *cdev) · 37 unmodified lines | ||
| 346 | 347 | { |
| 347 | 348 | enum led_brightness brightness = LED_OFF; |
| 348 | 349 | |
| 349 | − if (call_fext_func(FUNC_RFKILL, 0x4, 0x0, 0x0) & RADIO_LED_ON) | |
| 350 | + if (call_fext_func(FUNC_FLAGS, 0x4, 0x0, 0x0) & RADIO_LED_ON) | |
| 350 | 351 | brightness = LED_FULL; |
| 351 | 352 | |
| 352 | 353 | return brightness; |
| @@ -373,10 +374,10 @@ static int set_lcd_level(int level) · 20 unmodified lines | ||
| 373 | 374 | vdbg_printk(FUJLAPTOP_DBG_TRACE, "set lcd level via SBLL [%d]\n", |
| 374 | 375 | level); |
| 375 | 376 | |
| 376 | − if (level < 0 || level >= fujitsu->max_brightness) | |
| 377 | + if (level < 0 || level >= fujitsu_bl->max_brightness) | |
| 377 | 378 | return -EINVAL; |
| 378 | 379 | |
| 379 | − status = acpi_get_handle(fujitsu->acpi_handle, "SBLL", &handle); | |
| 380 | + status = acpi_get_handle(fujitsu_bl->acpi_handle, "SBLL", &handle); | |
| 380 | 381 | if (ACPI_FAILURE(status)) { |
| 381 | 382 | vdbg_printk(FUJLAPTOP_DBG_ERROR, "SBLL not present\n"); |
| 382 | 383 | return -ENODEV; |
| @@ -398,10 +399,10 @@ static int set_lcd_level_alt(int level) · 15 unmodified lines | ||
| 398 | 399 | vdbg_printk(FUJLAPTOP_DBG_TRACE, "set lcd level via SBL2 [%d]\n", |
| 399 | 400 | level); |
| 400 | 401 | |
| 401 | − if (level < 0 || level >= fujitsu->max_brightness) | |
| 402 | + if (level < 0 || level >= fujitsu_bl->max_brightness) | |
| 402 | 403 | return -EINVAL; |
| 403 | 404 | |
| 404 | − status = acpi_get_handle(fujitsu->acpi_handle, "SBL2", &handle); | |
| 405 | + status = acpi_get_handle(fujitsu_bl->acpi_handle, "SBL2", &handle); | |
| 405 | 406 | if (ACPI_FAILURE(status)) { |
| 406 | 407 | vdbg_printk(FUJLAPTOP_DBG_ERROR, "SBL2 not present\n"); |
| 407 | 408 | return -ENODEV; |
| @@ -421,19 +422,19 @@ static int get_lcd_level(void) · 13 unmodified lines | ||
| 421 | 422 | |
| 422 | 423 | vdbg_printk(FUJLAPTOP_DBG_TRACE, "get lcd level via GBLL\n"); |
| 423 | 424 | |
| 424 | − status = | |
| 425 | − acpi_evaluate_integer(fujitsu->acpi_handle, "GBLL", NULL, &state); | |
| 425 | + status = acpi_evaluate_integer(fujitsu_bl->acpi_handle, "GBLL", NULL, | |
| 426 | + &state); | |
| 426 | 427 | if (ACPI_FAILURE(status)) |
| 427 | 428 | return 0; |
| 428 | 429 | |
| 429 | − fujitsu->brightness_level = state & 0x0fffffff; | |
| 430 | + fujitsu_bl->brightness_level = state & 0x0fffffff; | |
| 430 | 431 | |
| 431 | 432 | if (state & 0x80000000) |
| 432 | − fujitsu->brightness_changed = 1; | |
| 433 | + fujitsu_bl->brightness_changed = 1; | |
| 433 | 434 | else |
| 434 | − fujitsu->brightness_changed = 0; | |
| 435 | + fujitsu_bl->brightness_changed = 0; | |
| 435 | 436 | |
| 436 | − return fujitsu->brightness_level; | |
| 437 | + return fujitsu_bl->brightness_level; | |
| 437 | 438 | } |
| 438 | 439 | |
| 439 | 440 | static int get_max_brightness(void) |
| @@ -443,14 +444,14 @@ static int get_max_brightness(void) · 3 unmodified lines | ||
| 443 | 444 | |
| 444 | 445 | vdbg_printk(FUJLAPTOP_DBG_TRACE, "get max lcd level via RBLL\n"); |
| 445 | 446 | |
| 446 | − status = | |
| 447 | − acpi_evaluate_integer(fujitsu->acpi_handle, "RBLL", NULL, &state); | |
| 447 | + status = acpi_evaluate_integer(fujitsu_bl->acpi_handle, "RBLL", NULL, | |
| 448 | + &state); | |
| 448 | 449 | if (ACPI_FAILURE(status)) |
| 449 | 450 | return -1; |
| 450 | 451 | |
| 451 | − fujitsu->max_brightness = state; | |
| 452 | + fujitsu_bl->max_brightness = state; | |
| 452 | 453 | |
| 453 | − return fujitsu->max_brightness; | |
| 454 | + return fujitsu_bl->max_brightness; | |
| 454 | 455 | } |
| 455 | 456 | |
| 456 | 457 | /* Backlight device stuff */ |
| @@ -483,7 +484,7 @@ static int bl_update_status(struct backlight_device *b) · 26 unmodified lines | ||
| 483 | 484 | return ret; |
| 484 | 485 | } |
| 485 | 486 | |
| 486 | −static const struct backlight_ops fujitsubl_ops = { | |
| 487 | +static const struct backlight_ops fujitsu_bl_ops = { | |
| 487 | 488 | .get_brightness = bl_get_brightness, |
| 488 | 489 | .update_status = bl_update_status, |
| 489 | 490 | }; |
| @@ -511,7 +512,7 @@ show_brightness_changed(struct device *dev, · 21 unmodified lines | ||
| 511 | 512 | |
| 512 | 513 | int ret; |
| 513 | 514 | |
| 514 | − ret = fujitsu->brightness_changed; | |
| 515 | + ret = fujitsu_bl->brightness_changed; | |
| 515 | 516 | if (ret < 0) |
| 516 | 517 | return ret; |
| 517 | 518 | |
| @@ -539,7 +540,7 @@ static ssize_t store_lcd_level(struct device *dev, · 21 unmodified lines | ||
| 539 | 540 | int level, ret; |
| 540 | 541 | |
| 541 | 542 | if (sscanf(buf, "%i", &level) != 1 |
| 542 | − || (level < 0 || level >= fujitsu->max_brightness)) | |
| 543 | + || (level < 0 || level >= fujitsu_bl->max_brightness)) | |
| 543 | 544 | return -EINVAL; |
| 544 | 545 | |
| 545 | 546 | if (use_alt_lcd_levels) |
| @@ -567,9 +568,9 @@ static ssize_t · 21 unmodified lines | ||
| 567 | 568 | show_lid_state(struct device *dev, |
| 568 | 569 | struct device_attribute *attr, char *buf) |
| 569 | 570 | { |
| 570 | − if (!(fujitsu_hotkey->rfkill_supported & 0x100)) | |
| 571 | + if (!(fujitsu_laptop->flags_supported & FLAG_LID)) | |
| 571 | 572 | return sprintf(buf, "unknown\n"); |
| 572 | − if (fujitsu_hotkey->rfkill_state & 0x100) | |
| 573 | + if (fujitsu_laptop->flags_state & FLAG_LID) | |
| 573 | 574 | return sprintf(buf, "open\n"); |
| 574 | 575 | else |
| 575 | 576 | return sprintf(buf, "closed\n"); |
| @@ -579,9 +580,9 @@ static ssize_t · 3 unmodified lines | ||
| 579 | 580 | show_dock_state(struct device *dev, |
| 580 | 581 | struct device_attribute *attr, char *buf) |
| 581 | 582 | { |
| 582 | − if (!(fujitsu_hotkey->rfkill_supported & 0x200)) | |
| 583 | + if (!(fujitsu_laptop->flags_supported & FLAG_DOCK)) | |
| 583 | 584 | return sprintf(buf, "unknown\n"); |
| 584 | − if (fujitsu_hotkey->rfkill_state & 0x200) | |
| 585 | + if (fujitsu_laptop->flags_state & FLAG_DOCK) | |
| 585 | 586 | return sprintf(buf, "docked\n"); |
| 586 | 587 | else |
| 587 | 588 | return sprintf(buf, "undocked\n"); |
| @@ -591,9 +592,9 @@ static ssize_t · 3 unmodified lines | ||
| 591 | 592 | show_radios_state(struct device *dev, |
| 592 | 593 | struct device_attribute *attr, char *buf) |
| 593 | 594 | { |
| 594 | − if (!(fujitsu_hotkey->rfkill_supported & 0x20)) | |
| 595 | + if (!(fujitsu_laptop->flags_supported & FLAG_RFKILL)) | |
| 595 | 596 | return sprintf(buf, "unknown\n"); |
| 596 | − if (fujitsu_hotkey->rfkill_state & 0x20) | |
| 597 | + if (fujitsu_laptop->flags_state & FLAG_RFKILL) | |
| 597 | 598 | return sprintf(buf, "on\n"); |
| 598 | 599 | else |
| 599 | 600 | return sprintf(buf, "killed\n"); |
| @@ -607,7 +608,7 @@ static DEVICE_ATTR(lid, 0444, show_lid_state, ignore_store); · 7 unmodified lines | ||
| 607 | 608 | static DEVICE_ATTR(dock, 0444, show_dock_state, ignore_store); |
| 608 | 609 | static DEVICE_ATTR(radios, 0444, show_radios_state, ignore_store); |
| 609 | 610 | |
| 610 | −static struct attribute *fujitsupf_attributes[] = { | |
| 611 | +static struct attribute *fujitsu_pf_attributes[] = { | |
| 611 | 612 | &dev_attr_brightness_changed.attr, |
| 612 | 613 | &dev_attr_max_brightness.attr, |
| 613 | 614 | &dev_attr_lcd_level.attr, |
| @@ -617,11 +618,11 @@ static struct attribute *fujitsupf_attributes[] = { · 3 unmodified lines | ||
| 617 | 618 | NULL |
| 618 | 619 | }; |
| 619 | 620 | |
| 620 | −static struct attribute_group fujitsupf_attribute_group = { | |
| 621 | − .attrs = fujitsupf_attributes | |
| 621 | +static struct attribute_group fujitsu_pf_attribute_group = { | |
| 622 | + .attrs = fujitsu_pf_attributes | |
| 622 | 623 | }; |
| 623 | 624 | |
| 624 | −static struct platform_driver fujitsupf_driver = { | |
| 625 | +static struct platform_driver fujitsu_pf_driver = { | |
| 625 | 626 | .driver = { |
| 626 | 627 | .name = "fujitsu-laptop", |
| 627 | 628 | } |
| @@ -630,39 +631,30 @@ static struct platform_driver fujitsupf_driver = { · 2 unmodified lines | ||
| 630 | 631 | static void __init dmi_check_cb_common(const struct dmi_system_id *id) |
| 631 | 632 | { |
| 632 | 633 | pr_info("Identified laptop model '%s'\n", id->ident); |
| 633 | − if (use_alt_lcd_levels == -1) { | |
| 634 | − if (acpi_has_method(NULL, | |
| 635 | − "\\_SB.PCI0.LPCB.FJEX.SBL2")) | |
| 636 | − use_alt_lcd_levels = 1; | |
| 637 | − else | |
| 638 | − use_alt_lcd_levels = 0; | |
| 639 | − vdbg_printk(FUJLAPTOP_DBG_TRACE, "auto-detected usealt as " | |
| 640 | − "%i\n", use_alt_lcd_levels); | |
| 641 | − } | |
| 642 | 634 | } |
| 643 | 635 | |
| 644 | 636 | static int __init dmi_check_cb_s6410(const struct dmi_system_id *id) |
| 645 | 637 | { |
| 646 | 638 | dmi_check_cb_common(id); |
| 647 | − fujitsu->keycode1 = KEY_SCREENLOCK; /* "Lock" */ | |
| 648 | − fujitsu->keycode2 = KEY_HELP; /* "Mobility Center" */ | |
| 639 | + fujitsu_bl->keycode1 = KEY_SCREENLOCK; /* "Lock" */ | |
| 640 | + fujitsu_bl->keycode2 = KEY_HELP; /* "Mobility Center" */ | |
| 649 | 641 | return 1; |
| 650 | 642 | } |
| 651 | 643 | |
| 652 | 644 | static int __init dmi_check_cb_s6420(const struct dmi_system_id *id) |
| 653 | 645 | { |
| 654 | 646 | dmi_check_cb_common(id); |
| 655 | − fujitsu->keycode1 = KEY_SCREENLOCK; /* "Lock" */ | |
| 656 | − fujitsu->keycode2 = KEY_HELP; /* "Mobility Center" */ | |
| 647 | + fujitsu_bl->keycode1 = KEY_SCREENLOCK; /* "Lock" */ | |
| 648 | + fujitsu_bl->keycode2 = KEY_HELP; /* "Mobility Center" */ | |
| 657 | 649 | return 1; |
| 658 | 650 | } |
| 659 | 651 | |
| 660 | 652 | static int __init dmi_check_cb_p8010(const struct dmi_system_id *id) |
| 661 | 653 | { |
| 662 | 654 | dmi_check_cb_common(id); |
| 663 | − fujitsu->keycode1 = KEY_HELP; /* "Support" */ | |
| 664 | − fujitsu->keycode3 = KEY_SWITCHVIDEOMODE; /* "Presentation" */ | |
| 665 | − fujitsu->keycode4 = KEY_WWW; /* "Internet" */ | |
| 655 | + fujitsu_bl->keycode1 = KEY_HELP; /* "Support" */ | |
| 656 | + fujitsu_bl->keycode3 = KEY_SWITCHVIDEOMODE; /* "Presentation" */ | |
| 657 | + fujitsu_bl->keycode4 = KEY_WWW; /* "Internet" */ | |
| 666 | 658 | return 1; |
| 667 | 659 | } |
| 668 | 660 | |
| @@ -693,7 +685,7 @@ static const struct dmi_system_id fujitsu_dmi_table[] __initconst = { · 24 unmodified lines | ||
| 693 | 685 | |
| 694 | 686 | /* ACPI device for LCD brightness control */ |
| 695 | 687 | |
| 696 | −static int acpi_fujitsu_add(struct acpi_device *device) | |
| 688 | +static int acpi_fujitsu_bl_add(struct acpi_device *device) | |
| 697 | 689 | { |
| 698 | 690 | int state = 0; |
| 699 | 691 | struct input_dev *input; |
| @@ -702,22 +694,22 @@ static int acpi_fujitsu_add(struct acpi_device *device) · 2 unmodified lines | ||
| 702 | 694 | if (!device) |
| 703 | 695 | return -EINVAL; |
| 704 | 696 | |
| 705 | − fujitsu->acpi_handle = device->handle; | |
| 706 | − sprintf(acpi_device_name(device), "%s", ACPI_FUJITSU_DEVICE_NAME); | |
| 697 | + fujitsu_bl->acpi_handle = device->handle; | |
| 698 | + sprintf(acpi_device_name(device), "%s", ACPI_FUJITSU_BL_DEVICE_NAME); | |
| 707 | 699 | sprintf(acpi_device_class(device), "%s", ACPI_FUJITSU_CLASS); |
| 708 | − device->driver_data = fujitsu; | |
| 700 | + device->driver_data = fujitsu_bl; | |
| 709 | 701 | |
| 710 | − fujitsu->input = input = input_allocate_device(); | |
| 702 | + fujitsu_bl->input = input = input_allocate_device(); | |
| 711 | 703 | if (!input) { |
| 712 | 704 | error = -ENOMEM; |
| 713 | 705 | goto err_stop; |
| 714 | 706 | } |
| 715 | 707 | |
| 716 | − snprintf(fujitsu->phys, sizeof(fujitsu->phys), | |
| 708 | + snprintf(fujitsu_bl->phys, sizeof(fujitsu_bl->phys), | |
| 717 | 709 | "%s/video/input0", acpi_device_hid(device)); |
| 718 | 710 | |
| 719 | 711 | input->name = acpi_device_name(device); |
| 720 | − input->phys = fujitsu->phys; | |
| 712 | + input->phys = fujitsu_bl->phys; | |
| 721 | 713 | input->id.bustype = BUS_HOST; |
| 722 | 714 | input->id.product = 0x06; |
| 723 | 715 | input->dev.parent = &device->dev; |
| @@ -730,7 +722,7 @@ static int acpi_fujitsu_add(struct acpi_device *device) · 6 unmodified lines | ||
| 730 | 722 | if (error) |
| 731 | 723 | goto err_free_input_dev; |
| 732 | 724 | |
| 733 | − error = acpi_bus_update_power(fujitsu->acpi_handle, &state); | |
| 725 | + error = acpi_bus_update_power(fujitsu_bl->acpi_handle, &state); | |
| 734 | 726 | if (error) { |
| 735 | 727 | pr_err("Error reading power state\n"); |
| 736 | 728 | goto err_unregister_input_dev; |
| @@ -740,7 +732,7 @@ static int acpi_fujitsu_add(struct acpi_device *device) · 3 unmodified lines | ||
| 740 | 732 | acpi_device_name(device), acpi_device_bid(device), |
| 741 | 733 | !device->power.state ? "on" : "off"); |
| 742 | 734 | |
| 743 | − fujitsu->dev = device; | |
| 735 | + fujitsu_bl->dev = device; | |
| 744 | 736 | |
| 745 | 737 | if (acpi_has_method(device->handle, METHOD_NAME__INI)) { |
| 746 | 738 | vdbg_printk(FUJLAPTOP_DBG_INFO, "Invoking _INI\n"); |
| @@ -750,6 +742,15 @@ static int acpi_fujitsu_add(struct acpi_device *device) · 3 unmodified lines | ||
| 750 | 742 | pr_err("_INI Method failed\n"); |
| 751 | 743 | } |
| 752 | 744 | |
| 745 | + if (use_alt_lcd_levels == -1) { | |
| 746 | + if (acpi_has_method(NULL, "\\_SB.PCI0.LPCB.FJEX.SBL2")) | |
| 747 | + use_alt_lcd_levels = 1; | |
| 748 | + else | |
| 749 | + use_alt_lcd_levels = 0; | |
| 750 | + vdbg_printk(FUJLAPTOP_DBG_TRACE, "auto-detected usealt as %i\n", | |
| 751 | + use_alt_lcd_levels); | |
| 752 | + } | |
| 753 | + | |
| 753 | 754 | /* do config (detect defaults) */ |
| 754 | 755 | use_alt_lcd_levels = use_alt_lcd_levels == 1 ? 1 : 0; |
| 755 | 756 | disable_brightness_adjust = disable_brightness_adjust == 1 ? 1 : 0; |
| @@ -758,7 +759,7 @@ static int acpi_fujitsu_add(struct acpi_device *device) · 2 unmodified lines | ||
| 758 | 759 | use_alt_lcd_levels, disable_brightness_adjust); |
| 759 | 760 | |
| 760 | 761 | if (get_max_brightness() <= 0) |
| 761 | − fujitsu->max_brightness = FUJITSU_LCD_N_LEVELS; | |
| 762 | + fujitsu_bl->max_brightness = FUJITSU_LCD_N_LEVELS; | |
| 762 | 763 | get_lcd_level(); |
| 763 | 764 | |
| 764 | 765 | return 0; |
| @@ -772,38 +773,38 @@ err_stop: · 7 unmodified lines | ||
| 772 | 773 | return error; |
| 773 | 774 | } |
| 774 | 775 | |
| 775 | −static int acpi_fujitsu_remove(struct acpi_device *device) | |
| 776 | +static int acpi_fujitsu_bl_remove(struct acpi_device *device) | |
| 776 | 777 | { |
| 777 | − struct fujitsu_t *fujitsu = acpi_driver_data(device); | |
| 778 | − struct input_dev *input = fujitsu->input; | |
| 778 | + struct fujitsu_bl *fujitsu_bl = acpi_driver_data(device); | |
| 779 | + struct input_dev *input = fujitsu_bl->input; | |
| 779 | 780 | |
| 780 | 781 | input_unregister_device(input); |
| 781 | 782 | |
| 782 | − fujitsu->acpi_handle = NULL; | |
| 783 | + fujitsu_bl->acpi_handle = NULL; | |
| 783 | 784 | |
| 784 | 785 | return 0; |
| 785 | 786 | } |
| 786 | 787 | |
| 787 | 788 | /* Brightness notify */ |
| 788 | 789 | |
| 789 | −static void acpi_fujitsu_notify(struct acpi_device *device, u32 event) | |
| 790 | +static void acpi_fujitsu_bl_notify(struct acpi_device *device, u32 event) | |
| 790 | 791 | { |
| 791 | 792 | struct input_dev *input; |
| 792 | 793 | int keycode; |
| 793 | 794 | int oldb, newb; |
| 794 | 795 | |
| 795 | − input = fujitsu->input; | |
| 796 | + input = fujitsu_bl->input; | |
| 796 | 797 | |
| 797 | 798 | switch (event) { |
| 798 | 799 | case ACPI_FUJITSU_NOTIFY_CODE1: |
| 799 | 800 | keycode = 0; |
| 800 | − oldb = fujitsu->brightness_level; | |
| 801 | + oldb = fujitsu_bl->brightness_level; | |
| 801 | 802 | get_lcd_level(); |
| 802 | − newb = fujitsu->brightness_level; | |
| 803 | + newb = fujitsu_bl->brightness_level; | |
| 803 | 804 | |
| 804 | 805 | vdbg_printk(FUJLAPTOP_DBG_TRACE, |
| 805 | 806 | "brightness button event [%i -> %i (%i)]\n", |
| 806 | − oldb, newb, fujitsu->brightness_changed); | |
| 807 | + oldb, newb, fujitsu_bl->brightness_changed); | |
| 807 | 808 | |
| 808 | 809 | if (oldb < newb) { |
| 809 | 810 | if (disable_brightness_adjust != 1) { |
| @@ -840,7 +841,7 @@ static void acpi_fujitsu_notify(struct acpi_device *device, u32 event) · 30 unmodified lines | ||
| 840 | 841 | |
| 841 | 842 | /* ACPI device for hotkey handling */ |
| 842 | 843 | |
| 843 | −static int acpi_fujitsu_hotkey_add(struct acpi_device *device) | |
| 844 | +static int acpi_fujitsu_laptop_add(struct acpi_device *device) | |
| 844 | 845 | { |
| 845 | 846 | int result = 0; |
| 846 | 847 | int state = 0; |
| @@ -851,42 +852,42 @@ static int acpi_fujitsu_hotkey_add(struct acpi_device *device) · 4 unmodified lines | ||
| 851 | 852 | if (!device) |
| 852 | 853 | return -EINVAL; |
| 853 | 854 | |
| 854 | − fujitsu_hotkey->acpi_handle = device->handle; | |
| 855 | + fujitsu_laptop->acpi_handle = device->handle; | |
| 855 | 856 | sprintf(acpi_device_name(device), "%s", |
| 856 | − ACPI_FUJITSU_HOTKEY_DEVICE_NAME); | |
| 857 | + ACPI_FUJITSU_LAPTOP_DEVICE_NAME); | |
| 857 | 858 | sprintf(acpi_device_class(device), "%s", ACPI_FUJITSU_CLASS); |
| 858 | − device->driver_data = fujitsu_hotkey; | |
| 859 | + device->driver_data = fujitsu_laptop; | |
| 859 | 860 | |
| 860 | 861 | /* kfifo */ |
| 861 | − spin_lock_init(&fujitsu_hotkey->fifo_lock); | |
| 862 | − error = kfifo_alloc(&fujitsu_hotkey->fifo, RINGBUFFERSIZE * sizeof(int), | |
| 862 | + spin_lock_init(&fujitsu_laptop->fifo_lock); | |
| 863 | + error = kfifo_alloc(&fujitsu_laptop->fifo, RINGBUFFERSIZE * sizeof(int), | |
| 863 | 864 | GFP_KERNEL); |
| 864 | 865 | if (error) { |
| 865 | 866 | pr_err("kfifo_alloc failed\n"); |
| 866 | 867 | goto err_stop; |
| 867 | 868 | } |
| 868 | 869 | |
| 869 | − fujitsu_hotkey->input = input = input_allocate_device(); | |
| 870 | + fujitsu_laptop->input = input = input_allocate_device(); | |
| 870 | 871 | if (!input) { |
| 871 | 872 | error = -ENOMEM; |
| 872 | 873 | goto err_free_fifo; |
| 873 | 874 | } |
| 874 | 875 | |
| 875 | − snprintf(fujitsu_hotkey->phys, sizeof(fujitsu_hotkey->phys), | |
| 876 | + snprintf(fujitsu_laptop->phys, sizeof(fujitsu_laptop->phys), | |
| 876 | 877 | "%s/video/input0", acpi_device_hid(device)); |
| 877 | 878 | |
| 878 | 879 | input->name = acpi_device_name(device); |
| 879 | − input->phys = fujitsu_hotkey->phys; | |
| 880 | + input->phys = fujitsu_laptop->phys; | |
| 880 | 881 | input->id.bustype = BUS_HOST; |
| 881 | 882 | input->id.product = 0x06; |
| 882 | 883 | input->dev.parent = &device->dev; |
| 883 | 884 | |
| 884 | 885 | set_bit(EV_KEY, input->evbit); |
| 885 | − set_bit(fujitsu->keycode1, input->keybit); | |
| 886 | − set_bit(fujitsu->keycode2, input->keybit); | |
| 887 | − set_bit(fujitsu->keycode3, input->keybit); | |
| 888 | − set_bit(fujitsu->keycode4, input->keybit); | |
| 889 | − set_bit(fujitsu->keycode5, input->keybit); | |
| 886 | + set_bit(fujitsu_bl->keycode1, input->keybit); | |
| 887 | + set_bit(fujitsu_bl->keycode2, input->keybit); | |
| 888 | + set_bit(fujitsu_bl->keycode3, input->keybit); | |
| 889 | + set_bit(fujitsu_bl->keycode4, input->keybit); | |
| 890 | + set_bit(fujitsu_bl->keycode5, input->keybit); | |
| 890 | 891 | set_bit(KEY_TOUCHPAD_TOGGLE, input->keybit); |
| 891 | 892 | set_bit(KEY_UNKNOWN, input->keybit); |
| 892 | 893 | |
| @@ -894,7 +895,7 @@ static int acpi_fujitsu_hotkey_add(struct acpi_device *device) · 1 unmodified line | ||
| 894 | 895 | if (error) |
| 895 | 896 | goto err_free_input_dev; |
| 896 | 897 | |
| 897 | − error = acpi_bus_update_power(fujitsu_hotkey->acpi_handle, &state); | |
| 898 | + error = acpi_bus_update_power(fujitsu_laptop->acpi_handle, &state); | |
| 898 | 899 | if (error) { |
| 899 | 900 | pr_err("Error reading power state\n"); |
| 900 | 901 | goto err_unregister_input_dev; |
| @@ -904,7 +905,7 @@ static int acpi_fujitsu_hotkey_add(struct acpi_device *device) · 3 unmodified lines | ||
| 904 | 905 | acpi_device_name(device), acpi_device_bid(device), |
| 905 | 906 | !device->power.state ? "on" : "off"); |
| 906 | 907 | |
| 907 | − fujitsu_hotkey->dev = device; | |
| 908 | + fujitsu_laptop->dev = device; | |
| 908 | 909 | |
| 909 | 910 | if (acpi_has_method(device->handle, METHOD_NAME__INI)) { |
| 910 | 911 | vdbg_printk(FUJLAPTOP_DBG_INFO, "Invoking _INI\n"); |
| @@ -920,27 +921,27 @@ static int acpi_fujitsu_hotkey_add(struct acpi_device *device) · 9 unmodified lines | ||
| 920 | 921 | ; /* No action, result is discarded */ |
| 921 | 922 | vdbg_printk(FUJLAPTOP_DBG_INFO, "Discarded %i ringbuffer entries\n", i); |
| 922 | 923 | |
| 923 | − fujitsu_hotkey->rfkill_supported = | |
| 924 | − call_fext_func(FUNC_RFKILL, 0x0, 0x0, 0x0); | |
| 924 | + fujitsu_laptop->flags_supported = | |
| 925 | + call_fext_func(FUNC_FLAGS, 0x0, 0x0, 0x0); | |
| 925 | 926 | |
| 926 | 927 | /* Make sure our bitmask of supported functions is cleared if the |
| 927 | 928 | RFKILL function block is not implemented, like on the S7020. */ |
| 928 | − if (fujitsu_hotkey->rfkill_supported == UNSUPPORTED_CMD) | |
| 929 | − fujitsu_hotkey->rfkill_supported = 0; | |
| 929 | + if (fujitsu_laptop->flags_supported == UNSUPPORTED_CMD) | |
| 930 | + fujitsu_laptop->flags_supported = 0; | |
| 930 | 931 | |
| 931 | − if (fujitsu_hotkey->rfkill_supported) | |
| 932 | − fujitsu_hotkey->rfkill_state = | |
| 933 | − call_fext_func(FUNC_RFKILL, 0x4, 0x0, 0x0); | |
| 932 | + if (fujitsu_laptop->flags_supported) | |
| 933 | + fujitsu_laptop->flags_state = | |
| 934 | + call_fext_func(FUNC_FLAGS, 0x4, 0x0, 0x0); | |
| 934 | 935 | |
| 935 | 936 | /* Suspect this is a keymap of the application panel, print it */ |
| 936 | 937 | pr_info("BTNI: [0x%x]\n", call_fext_func(FUNC_BUTTONS, 0x0, 0x0, 0x0)); |
| 937 | 938 | |
| 938 | 939 | #if IS_ENABLED(CONFIG_LEDS_CLASS) |
| 939 | 940 | if (call_fext_func(FUNC_LEDS, 0x0, 0x0, 0x0) & LOGOLAMP_POWERON) { |
| 940 | − result = led_classdev_register(&fujitsu->pf_device->dev, | |
| 941 | + result = led_classdev_register(&fujitsu_bl->pf_device->dev, | |
| 941 | 942 | &logolamp_led); |
| 942 | 943 | if (result == 0) { |
| 943 | − fujitsu_hotkey->logolamp_registered = 1; | |
| 944 | + fujitsu_laptop->logolamp_registered = 1; | |
| 944 | 945 | } else { |
| 945 | 946 | pr_err("Could not register LED handler for logo lamp, error %i\n", |
| 946 | 947 | result); |
| @@ -949,10 +950,10 @@ static int acpi_fujitsu_hotkey_add(struct acpi_device *device) · 2 unmodified lines | ||
| 949 | 950 | |
| 950 | 951 | if ((call_fext_func(FUNC_LEDS, 0x0, 0x0, 0x0) & KEYBOARD_LAMPS) && |
| 951 | 952 | (call_fext_func(FUNC_BUTTONS, 0x0, 0x0, 0x0) == 0x0)) { |
| 952 | − result = led_classdev_register(&fujitsu->pf_device->dev, | |
| 953 | + result = led_classdev_register(&fujitsu_bl->pf_device->dev, | |
| 953 | 954 | &kblamps_led); |
| 954 | 955 | if (result == 0) { |
| 955 | − fujitsu_hotkey->kblamps_registered = 1; | |
| 956 | + fujitsu_laptop->kblamps_registered = 1; | |
| 956 | 957 | } else { |
| 957 | 958 | pr_err("Could not register LED handler for keyboard lamps, error %i\n", |
| 958 | 959 | result); |
| @@ -966,10 +967,10 @@ static int acpi_fujitsu_hotkey_add(struct acpi_device *device) · 7 unmodified lines | ||
| 966 | 967 | * that an RF LED is present. |
| 967 | 968 | */ |
| 968 | 969 | if (call_fext_func(FUNC_BUTTONS, 0x0, 0x0, 0x0) & BIT(24)) { |
| 969 | − result = led_classdev_register(&fujitsu->pf_device->dev, | |
| 970 | + result = led_classdev_register(&fujitsu_bl->pf_device->dev, | |
| 970 | 971 | &radio_led); |
| 971 | 972 | if (result == 0) { |
| 972 | − fujitsu_hotkey->radio_led_registered = 1; | |
| 973 | + fujitsu_laptop->radio_led_registered = 1; | |
| 973 | 974 | } else { |
| 974 | 975 | pr_err("Could not register LED handler for radio LED, error %i\n", |
| 975 | 976 | result); |
| @@ -983,10 +984,10 @@ static int acpi_fujitsu_hotkey_add(struct acpi_device *device) · 7 unmodified lines | ||
| 983 | 984 | */ |
| 984 | 985 | if ((call_fext_func(FUNC_LEDS, 0x0, 0x0, 0x0) & BIT(14)) && |
| 985 | 986 | (call_fext_func(FUNC_LEDS, 0x2, ECO_LED, 0x0) != UNSUPPORTED_CMD)) { |
| 986 | − result = led_classdev_register(&fujitsu->pf_device->dev, | |
| 987 | + result = led_classdev_register(&fujitsu_bl->pf_device->dev, | |
| 987 | 988 | &eco_led); |
| 988 | 989 | if (result == 0) { |
| 989 | − fujitsu_hotkey->eco_led_registered = 1; | |
| 990 | + fujitsu_laptop->eco_led_registered = 1; | |
| 990 | 991 | } else { |
| 991 | 992 | pr_err("Could not register LED handler for eco LED, error %i\n", |
| 992 | 993 | result); |
| @@ -1002,47 +1003,47 @@ err_unregister_input_dev: · 9 unmodified lines | ||
| 1002 | 1003 | err_free_input_dev: |
| 1003 | 1004 | input_free_device(input); |
| 1004 | 1005 | err_free_fifo: |
| 1005 | − kfifo_free(&fujitsu_hotkey->fifo); | |
| 1006 | + kfifo_free(&fujitsu_laptop->fifo); | |
| 1006 | 1007 | err_stop: |
| 1007 | 1008 | return error; |
| 1008 | 1009 | } |
| 1009 | 1010 | |
| 1010 | −static int acpi_fujitsu_hotkey_remove(struct acpi_device *device) | |
| 1011 | +static int acpi_fujitsu_laptop_remove(struct acpi_device *device) | |
| 1011 | 1012 | { |
| 1012 | − struct fujitsu_hotkey_t *fujitsu_hotkey = acpi_driver_data(device); | |
| 1013 | − struct input_dev *input = fujitsu_hotkey->input; | |
| 1013 | + struct fujitsu_laptop *fujitsu_laptop = acpi_driver_data(device); | |
| 1014 | + struct input_dev *input = fujitsu_laptop->input; | |
| 1014 | 1015 | |
| 1015 | 1016 | #if IS_ENABLED(CONFIG_LEDS_CLASS) |
| 1016 | − if (fujitsu_hotkey->logolamp_registered) | |
| 1017 | + if (fujitsu_laptop->logolamp_registered) | |
| 1017 | 1018 | led_classdev_unregister(&logolamp_led); |
| 1018 | 1019 | |
| 1019 | − if (fujitsu_hotkey->kblamps_registered) | |
| 1020 | + if (fujitsu_laptop->kblamps_registered) | |
| 1020 | 1021 | led_classdev_unregister(&kblamps_led); |
| 1021 | 1022 | |
| 1022 | − if (fujitsu_hotkey->radio_led_registered) | |
| 1023 | + if (fujitsu_laptop->radio_led_registered) | |
| 1023 | 1024 | led_classdev_unregister(&radio_led); |
| 1024 | 1025 | |
| 1025 | − if (fujitsu_hotkey->eco_led_registered) | |
| 1026 | + if (fujitsu_laptop->eco_led_registered) | |
| 1026 | 1027 | led_classdev_unregister(&eco_led); |
| 1027 | 1028 | #endif |
| 1028 | 1029 | |
| 1029 | 1030 | input_unregister_device(input); |
| 1030 | 1031 | |
| 1031 | − kfifo_free(&fujitsu_hotkey->fifo); | |
| 1032 | + kfifo_free(&fujitsu_laptop->fifo); | |
| 1032 | 1033 | |
| 1033 | − fujitsu_hotkey->acpi_handle = NULL; | |
| 1034 | + fujitsu_laptop->acpi_handle = NULL; | |
| 1034 | 1035 | |
| 1035 | 1036 | return 0; |
| 1036 | 1037 | } |
| 1037 | 1038 | |
| 1038 | −static void acpi_fujitsu_hotkey_press(int keycode) | |
| 1039 | +static void acpi_fujitsu_laptop_press(int keycode) | |
| 1039 | 1040 | { |
| 1040 | − struct input_dev *input = fujitsu_hotkey->input; | |
| 1041 | + struct input_dev *input = fujitsu_laptop->input; | |
| 1041 | 1042 | int status; |
| 1042 | 1043 | |
| 1043 | − status = kfifo_in_locked(&fujitsu_hotkey->fifo, | |
| 1044 | + status = kfifo_in_locked(&fujitsu_laptop->fifo, | |
| 1044 | 1045 | (unsigned char *)&keycode, sizeof(keycode), |
| 1045 | − &fujitsu_hotkey->fifo_lock); | |
| 1046 | + &fujitsu_laptop->fifo_lock); | |
| 1046 | 1047 | if (status != sizeof(keycode)) { |
| 1047 | 1048 | vdbg_printk(FUJLAPTOP_DBG_WARN, |
| 1048 | 1049 | "Could not push keycode [0x%x]\n", keycode); |
| @@ -1054,16 +1055,16 @@ static void acpi_fujitsu_hotkey_press(int keycode) · 5 unmodified lines | ||
| 1054 | 1055 | "Push keycode into ringbuffer [%d]\n", keycode); |
| 1055 | 1056 | } |
| 1056 | 1057 | |
| 1057 | −static void acpi_fujitsu_hotkey_release(void) | |
| 1058 | +static void acpi_fujitsu_laptop_release(void) | |
| 1058 | 1059 | { |
| 1059 | − struct input_dev *input = fujitsu_hotkey->input; | |
| 1060 | + struct input_dev *input = fujitsu_laptop->input; | |
| 1060 | 1061 | int keycode, status; |
| 1061 | 1062 | |
| 1062 | 1063 | while (true) { |
| 1063 | − status = kfifo_out_locked(&fujitsu_hotkey->fifo, | |
| 1064 | + status = kfifo_out_locked(&fujitsu_laptop->fifo, | |
| 1064 | 1065 | (unsigned char *)&keycode, |
| 1065 | 1066 | sizeof(keycode), |
| 1066 | − &fujitsu_hotkey->fifo_lock); | |
| 1067 | + &fujitsu_laptop->fifo_lock); | |
| 1067 | 1068 | if (status != sizeof(keycode)) |
| 1068 | 1069 | return; |
| 1069 | 1070 | input_report_key(input, keycode, 0); |
| @@ -1073,14 +1074,14 @@ static void acpi_fujitsu_hotkey_release(void) · 3 unmodified lines | ||
| 1073 | 1074 | } |
| 1074 | 1075 | } |
| 1075 | 1076 | |
| 1076 | −static void acpi_fujitsu_hotkey_notify(struct acpi_device *device, u32 event) | |
| 1077 | +static void acpi_fujitsu_laptop_notify(struct acpi_device *device, u32 event) | |
| 1077 | 1078 | { |
| 1078 | 1079 | struct input_dev *input; |
| 1079 | 1080 | int keycode; |
| 1080 | 1081 | unsigned int irb = 1; |
| 1081 | 1082 | int i; |
| 1082 | 1083 | |
| 1083 | − input = fujitsu_hotkey->input; | |
| 1084 | + input = fujitsu_laptop->input; | |
| 1084 | 1085 | |
| 1085 | 1086 | if (event != ACPI_FUJITSU_NOTIFY_CODE1) { |
| 1086 | 1087 | keycode = KEY_UNKNOWN; |
| @@ -1093,9 +1094,9 @@ static void acpi_fujitsu_hotkey_notify(struct acpi_device *device, u32 event) · 6 unmodified lines | ||
| 1093 | 1094 | return; |
| 1094 | 1095 | } |
| 1095 | 1096 | |
| 1096 | − if (fujitsu_hotkey->rfkill_supported) | |
| 1097 | − fujitsu_hotkey->rfkill_state = | |
| 1098 | − call_fext_func(FUNC_RFKILL, 0x4, 0x0, 0x0); | |
| 1097 | + if (fujitsu_laptop->flags_supported) | |
| 1098 | + fujitsu_laptop->flags_state = | |
| 1099 | + call_fext_func(FUNC_FLAGS, 0x4, 0x0, 0x0); | |
| 1099 | 1100 | |
| 1100 | 1101 | i = 0; |
| 1101 | 1102 | while ((irb = |
| @@ -1103,19 +1104,19 @@ static void acpi_fujitsu_hotkey_notify(struct acpi_device *device, u32 event) · 1 unmodified line | ||
| 1103 | 1104 | && (i++) < MAX_HOTKEY_RINGBUFFER_SIZE) { |
| 1104 | 1105 | switch (irb & 0x4ff) { |
| 1105 | 1106 | case KEY1_CODE: |
| 1106 | − keycode = fujitsu->keycode1; | |
| 1107 | + keycode = fujitsu_bl->keycode1; | |
| 1107 | 1108 | break; |
| 1108 | 1109 | case KEY2_CODE: |
| 1109 | − keycode = fujitsu->keycode2; | |
| 1110 | + keycode = fujitsu_bl->keycode2; | |
| 1110 | 1111 | break; |
| 1111 | 1112 | case KEY3_CODE: |
| 1112 | − keycode = fujitsu->keycode3; | |
| 1113 | + keycode = fujitsu_bl->keycode3; | |
| 1113 | 1114 | break; |
| 1114 | 1115 | case KEY4_CODE: |
| 1115 | − keycode = fujitsu->keycode4; | |
| 1116 | + keycode = fujitsu_bl->keycode4; | |
| 1116 | 1117 | break; |
| 1117 | 1118 | case KEY5_CODE: |
| 1118 | − keycode = fujitsu->keycode5; | |
| 1119 | + keycode = fujitsu_bl->keycode5; | |
| 1119 | 1120 | break; |
| 1120 | 1121 | case 0: |
| 1121 | 1122 | keycode = 0; |
| @@ -1128,17 +1129,17 @@ static void acpi_fujitsu_hotkey_notify(struct acpi_device *device, u32 event) · 6 unmodified lines | ||
| 1128 | 1129 | } |
| 1129 | 1130 | |
| 1130 | 1131 | if (keycode > 0) |
| 1131 | − acpi_fujitsu_hotkey_press(keycode); | |
| 1132 | + acpi_fujitsu_laptop_press(keycode); | |
| 1132 | 1133 | else if (keycode == 0) |
| 1133 | − acpi_fujitsu_hotkey_release(); | |
| 1134 | + acpi_fujitsu_laptop_release(); | |
| 1134 | 1135 | } |
| 1135 | 1136 | |
| 1136 | 1137 | /* On some models (first seen on the Skylake-based Lifebook |
| 1137 | 1138 | * E736/E746/E756), the touchpad toggle hotkey (Fn+F4) is |
| 1138 | − * handled in software; its state is queried using FUNC_RFKILL | |
| 1139 | + * handled in software; its state is queried using FUNC_FLAGS | |
| 1139 | 1140 | */ |
| 1140 | − if ((fujitsu_hotkey->rfkill_supported & BIT(26)) && | |
| 1141 | − (call_fext_func(FUNC_RFKILL, 0x1, 0x0, 0x0) & BIT(26))) { | |
| 1141 | + if ((fujitsu_laptop->flags_supported & BIT(26)) && | |
| 1142 | + (call_fext_func(FUNC_FLAGS, 0x1, 0x0, 0x0) & BIT(26))) { | |
| 1142 | 1143 | keycode = KEY_TOUCHPAD_TOGGLE; |
| 1143 | 1144 | input_report_key(input, keycode, 1); |
| 1144 | 1145 | input_sync(input); |
| @@ -1150,83 +1151,81 @@ static void acpi_fujitsu_hotkey_notify(struct acpi_device *device, u32 event) · 5 unmodified lines | ||
| 1150 | 1151 | |
| 1151 | 1152 | /* Initialization */ |
| 1152 | 1153 | |
| 1153 | −static const struct acpi_device_id fujitsu_device_ids[] = { | |
| 1154 | − {ACPI_FUJITSU_HID, 0}, | |
| 1154 | +static const struct acpi_device_id fujitsu_bl_device_ids[] = { | |
| 1155 | + {ACPI_FUJITSU_BL_HID, 0}, | |
| 1155 | 1156 | {"", 0}, |
| 1156 | 1157 | }; |
| 1157 | 1158 | |
| 1158 | −static struct acpi_driver acpi_fujitsu_driver = { | |
| 1159 | − .name = ACPI_FUJITSU_DRIVER_NAME, | |
| 1159 | +static struct acpi_driver acpi_fujitsu_bl_driver = { | |
| 1160 | + .name = ACPI_FUJITSU_BL_DRIVER_NAME, | |
| 1160 | 1161 | .class = ACPI_FUJITSU_CLASS, |
| 1161 | − .ids = fujitsu_device_ids, | |
| 1162 | + .ids = fujitsu_bl_device_ids, | |
| 1162 | 1163 | .ops = { |
| 1163 | − .add = acpi_fujitsu_add, | |
| 1164 | − .remove = acpi_fujitsu_remove, | |
| 1165 | − .notify = acpi_fujitsu_notify, | |
| 1164 | + .add = acpi_fujitsu_bl_add, | |
| 1165 | + .remove = acpi_fujitsu_bl_remove, | |
| 1166 | + .notify = acpi_fujitsu_bl_notify, | |
| 1166 | 1167 | }, |
| 1167 | 1168 | }; |
| 1168 | 1169 | |
| 1169 | −static const struct acpi_device_id fujitsu_hotkey_device_ids[] = { | |
| 1170 | − {ACPI_FUJITSU_HOTKEY_HID, 0}, | |
| 1170 | +static const struct acpi_device_id fujitsu_laptop_device_ids[] = { | |
| 1171 | + {ACPI_FUJITSU_LAPTOP_HID, 0}, | |
| 1171 | 1172 | {"", 0}, |
| 1172 | 1173 | }; |
| 1173 | 1174 | |
| 1174 | −static struct acpi_driver acpi_fujitsu_hotkey_driver = { | |
| 1175 | − .name = ACPI_FUJITSU_HOTKEY_DRIVER_NAME, | |
| 1175 | +static struct acpi_driver acpi_fujitsu_laptop_driver = { | |
| 1176 | + .name = ACPI_FUJITSU_LAPTOP_DRIVER_NAME, | |
| 1176 | 1177 | .class = ACPI_FUJITSU_CLASS, |
| 1177 | − .ids = fujitsu_hotkey_device_ids, | |
| 1178 | + .ids = fujitsu_laptop_device_ids, | |
| 1178 | 1179 | .ops = { |
| 1179 | − .add = acpi_fujitsu_hotkey_add, | |
| 1180 | − .remove = acpi_fujitsu_hotkey_remove, | |
| 1181 | − .notify = acpi_fujitsu_hotkey_notify, | |
| 1180 | + .add = acpi_fujitsu_laptop_add, | |
| 1181 | + .remove = acpi_fujitsu_laptop_remove, | |
| 1182 | + .notify = acpi_fujitsu_laptop_notify, | |
| 1182 | 1183 | }, |
| 1183 | 1184 | }; |
| 1184 | 1185 | |
| 1185 | 1186 | static const struct acpi_device_id fujitsu_ids[] __used = { |
| 1186 | − {ACPI_FUJITSU_HID, 0}, | |
| 1187 | − {ACPI_FUJITSU_HOTKEY_HID, 0}, | |
| 1187 | + {ACPI_FUJITSU_BL_HID, 0}, | |
| 1188 | + {ACPI_FUJITSU_LAPTOP_HID, 0}, | |
| 1188 | 1189 | {"", 0} |
| 1189 | 1190 | }; |
| 1190 | 1191 | MODULE_DEVICE_TABLE(acpi, fujitsu_ids); |
| 1191 | 1192 | |
| 1192 | 1193 | static int __init fujitsu_init(void) |
| 1193 | 1194 | { |
| 1194 | − int ret, result, max_brightness; | |
| 1195 | + int ret, max_brightness; | |
| 1195 | 1196 | |
| 1196 | 1197 | if (acpi_disabled) |
| 1197 | 1198 | return -ENODEV; |
| 1198 | 1199 | |
| 1199 | − fujitsu = kzalloc(sizeof(struct fujitsu_t), GFP_KERNEL); | |
| 1200 | − if (!fujitsu) | |
| 1200 | + fujitsu_bl = kzalloc(sizeof(struct fujitsu_bl), GFP_KERNEL); | |
| 1201 | + if (!fujitsu_bl) | |
| 1201 | 1202 | return -ENOMEM; |
| 1202 | − fujitsu->keycode1 = KEY_PROG1; | |
| 1203 | − fujitsu->keycode2 = KEY_PROG2; | |
| 1204 | − fujitsu->keycode3 = KEY_PROG3; | |
| 1205 | − fujitsu->keycode4 = KEY_PROG4; | |
| 1206 | − fujitsu->keycode5 = KEY_RFKILL; | |
| 1203 | + fujitsu_bl->keycode1 = KEY_PROG1; | |
| 1204 | + fujitsu_bl->keycode2 = KEY_PROG2; | |
| 1205 | + fujitsu_bl->keycode3 = KEY_PROG3; | |
| 1206 | + fujitsu_bl->keycode4 = KEY_PROG4; | |
| 1207 | + fujitsu_bl->keycode5 = KEY_RFKILL; | |
| 1207 | 1208 | dmi_check_system(fujitsu_dmi_table); |
| 1208 | 1209 | |
| 1209 | − result = acpi_bus_register_driver(&acpi_fujitsu_driver); | |
| 1210 | − if (result < 0) { | |
| 1211 | − ret = -ENODEV; | |
| 1210 | + ret = acpi_bus_register_driver(&acpi_fujitsu_bl_driver); | |
| 1211 | + if (ret) | |
| 1212 | 1212 | goto fail_acpi; |
| 1213 | − } | |
| 1214 | 1213 | |
| 1215 | 1214 | /* Register platform stuff */ |
| 1216 | 1215 | |
| 1217 | − fujitsu->pf_device = platform_device_alloc("fujitsu-laptop", -1); | |
| 1218 | − if (!fujitsu->pf_device) { | |
| 1216 | + fujitsu_bl->pf_device = platform_device_alloc("fujitsu-laptop", -1); | |
| 1217 | + if (!fujitsu_bl->pf_device) { | |
| 1219 | 1218 | ret = -ENOMEM; |
| 1220 | 1219 | goto fail_platform_driver; |
| 1221 | 1220 | } |
| 1222 | 1221 | |
| 1223 | − ret = platform_device_add(fujitsu->pf_device); | |
| 1222 | + ret = platform_device_add(fujitsu_bl->pf_device); | |
| 1224 | 1223 | if (ret) |
| 1225 | 1224 | goto fail_platform_device1; |
| 1226 | 1225 | |
| 1227 | 1226 | ret = |
| 1228 | − sysfs_create_group(&fujitsu->pf_device->dev.kobj, | |
| 1229 | − &fujitsupf_attribute_group); | |
| 1227 | + sysfs_create_group(&fujitsu_bl->pf_device->dev.kobj, | |
| 1228 | + &fujitsu_pf_attribute_group); | |
| 1230 | 1229 | if (ret) |
| 1231 | 1230 | goto fail_platform_device2; |
| 1232 | 1231 | |
| @@ -1236,90 +1235,88 @@ static int __init fujitsu_init(void) · 3 unmodified lines | ||
| 1236 | 1235 | struct backlight_properties props; |
| 1237 | 1236 | |
| 1238 | 1237 | memset(&props, 0, sizeof(struct backlight_properties)); |
| 1239 | − max_brightness = fujitsu->max_brightness; | |
| 1238 | + max_brightness = fujitsu_bl->max_brightness; | |
| 1240 | 1239 | props.type = BACKLIGHT_PLATFORM; |
| 1241 | 1240 | props.max_brightness = max_brightness - 1; |
| 1242 | − fujitsu->bl_device = backlight_device_register("fujitsu-laptop", | |
| 1243 | − NULL, NULL, | |
| 1244 | − &fujitsubl_ops, | |
| 1245 | − &props); | |
| 1246 | − if (IS_ERR(fujitsu->bl_device)) { | |
| 1247 | − ret = PTR_ERR(fujitsu->bl_device); | |
| 1248 | − fujitsu->bl_device = NULL; | |
| 1241 | + fujitsu_bl->bl_device = backlight_device_register("fujitsu-laptop", | |
| 1242 | + NULL, NULL, | |
| 1243 | + &fujitsu_bl_ops, | |
| 1244 | + &props); | |
| 1245 | + if (IS_ERR(fujitsu_bl->bl_device)) { | |
| 1246 | + ret = PTR_ERR(fujitsu_bl->bl_device); | |
| 1247 | + fujitsu_bl->bl_device = NULL; | |
| 1249 | 1248 | goto fail_sysfs_group; |
| 1250 | 1249 | } |
| 1251 | − fujitsu->bl_device->props.brightness = fujitsu->brightness_level; | |
| 1250 | + fujitsu_bl->bl_device->props.brightness = fujitsu_bl->brightness_level; | |
| 1252 | 1251 | } |
| 1253 | 1252 | |
| 1254 | − ret = platform_driver_register(&fujitsupf_driver); | |
| 1253 | + ret = platform_driver_register(&fujitsu_pf_driver); | |
| 1255 | 1254 | if (ret) |
| 1256 | 1255 | goto fail_backlight; |
| 1257 | 1256 | |
| 1258 | − /* Register hotkey driver */ | |
| 1257 | + /* Register laptop driver */ | |
| 1259 | 1258 | |
| 1260 | − fujitsu_hotkey = kzalloc(sizeof(struct fujitsu_hotkey_t), GFP_KERNEL); | |
| 1261 | − if (!fujitsu_hotkey) { | |
| 1259 | + fujitsu_laptop = kzalloc(sizeof(struct fujitsu_laptop), GFP_KERNEL); | |
| 1260 | + if (!fujitsu_laptop) { | |
| 1262 | 1261 | ret = -ENOMEM; |
| 1263 | − goto fail_hotkey; | |
| 1262 | + goto fail_laptop; | |
| 1264 | 1263 | } |
| 1265 | 1264 | |
| 1266 | − result = acpi_bus_register_driver(&acpi_fujitsu_hotkey_driver); | |
| 1267 | − if (result < 0) { | |
| 1268 | − ret = -ENODEV; | |
| 1269 | − goto fail_hotkey1; | |
| 1270 | − } | |
| 1265 | + ret = acpi_bus_register_driver(&acpi_fujitsu_laptop_driver); | |
| 1266 | + if (ret) | |
| 1267 | + goto fail_laptop1; | |
| 1271 | 1268 | |
| 1272 | 1269 | /* Sync backlight power status (needs FUJ02E3 device, hence deferred) */ |
| 1273 | 1270 | if (acpi_video_get_backlight_type() == acpi_backlight_vendor) { |
| 1274 | 1271 | if (call_fext_func(FUNC_BACKLIGHT, 0x2, 0x4, 0x0) == 3) |
| 1275 | − fujitsu->bl_device->props.power = FB_BLANK_POWERDOWN; | |
| 1272 | + fujitsu_bl->bl_device->props.power = FB_BLANK_POWERDOWN; | |
| 1276 | 1273 | else |
| 1277 | − fujitsu->bl_device->props.power = FB_BLANK_UNBLANK; | |
| 1274 | + fujitsu_bl->bl_device->props.power = FB_BLANK_UNBLANK; | |
| 1278 | 1275 | } |
| 1279 | 1276 | |
| 1280 | 1277 | pr_info("driver " FUJITSU_DRIVER_VERSION " successfully loaded\n"); |
| 1281 | 1278 | |
| 1282 | 1279 | return 0; |
| 1283 | 1280 | |
| 1284 | −fail_hotkey1: | |
| 1285 | − kfree(fujitsu_hotkey); | |
| 1286 | −fail_hotkey: | |
| 1287 | − platform_driver_unregister(&fujitsupf_driver); | |
| 1281 | +fail_laptop1: | |
| 1282 | + kfree(fujitsu_laptop); | |
| 1283 | +fail_laptop: | |
| 1284 | + platform_driver_unregister(&fujitsu_pf_driver); | |
| 1288 | 1285 | fail_backlight: |
| 1289 | − backlight_device_unregister(fujitsu->bl_device); | |
| 1286 | + backlight_device_unregister(fujitsu_bl->bl_device); | |
| 1290 | 1287 | fail_sysfs_group: |
| 1291 | − sysfs_remove_group(&fujitsu->pf_device->dev.kobj, | |
| 1292 | − &fujitsupf_attribute_group); | |
| 1288 | + sysfs_remove_group(&fujitsu_bl->pf_device->dev.kobj, | |
| 1289 | + &fujitsu_pf_attribute_group); | |
| 1293 | 1290 | fail_platform_device2: |
| 1294 | − platform_device_del(fujitsu->pf_device); | |
| 1291 | + platform_device_del(fujitsu_bl->pf_device); | |
| 1295 | 1292 | fail_platform_device1: |
| 1296 | − platform_device_put(fujitsu->pf_device); | |
| 1293 | + platform_device_put(fujitsu_bl->pf_device); | |
| 1297 | 1294 | fail_platform_driver: |
| 1298 | − acpi_bus_unregister_driver(&acpi_fujitsu_driver); | |
| 1295 | + acpi_bus_unregister_driver(&acpi_fujitsu_bl_driver); | |
| 1299 | 1296 | fail_acpi: |
| 1300 | − kfree(fujitsu); | |
| 1297 | + kfree(fujitsu_bl); | |
| 1301 | 1298 | |
| 1302 | 1299 | return ret; |
| 1303 | 1300 | } |
| 1304 | 1301 | |
| 1305 | 1302 | static void __exit fujitsu_cleanup(void) |
| 1306 | 1303 | { |
| 1307 | − acpi_bus_unregister_driver(&acpi_fujitsu_hotkey_driver); | |
| 1304 | + acpi_bus_unregister_driver(&acpi_fujitsu_laptop_driver); | |
| 1308 | 1305 | |
| 1309 | − kfree(fujitsu_hotkey); | |
| 1306 | + kfree(fujitsu_laptop); | |
| 1310 | 1307 | |
| 1311 | − platform_driver_unregister(&fujitsupf_driver); | |
| 1308 | + platform_driver_unregister(&fujitsu_pf_driver); | |
| 1312 | 1309 | |
| 1313 | − backlight_device_unregister(fujitsu->bl_device); | |
| 1310 | + backlight_device_unregister(fujitsu_bl->bl_device); | |
| 1314 | 1311 | |
| 1315 | − sysfs_remove_group(&fujitsu->pf_device->dev.kobj, | |
| 1316 | − &fujitsupf_attribute_group); | |
| 1312 | + sysfs_remove_group(&fujitsu_bl->pf_device->dev.kobj, | |
| 1313 | + &fujitsu_pf_attribute_group); | |
| 1317 | 1314 | |
| 1318 | − platform_device_unregister(fujitsu->pf_device); | |
| 1315 | + platform_device_unregister(fujitsu_bl->pf_device); | |
| 1319 | 1316 | |
| 1320 | − acpi_bus_unregister_driver(&acpi_fujitsu_driver); | |
| 1317 | + acpi_bus_unregister_driver(&acpi_fujitsu_bl_driver); | |
| 1321 | 1318 | |
| 1322 | − kfree(fujitsu); | |
| 1319 | + kfree(fujitsu_bl); | |
| 1323 | 1320 | |
| 1324 | 1321 | pr_info("driver unloaded\n"); |
| 1325 | 1322 | } |
| @@ -1341,7 +1338,3 @@ MODULE_AUTHOR("Jonathan Woithe, Peter Gruber, Tony Vroon"); · 15 unmodified lines | ||
| 1341 | 1338 | MODULE_DESCRIPTION("Fujitsu laptop extras support"); |
| 1342 | 1339 | MODULE_VERSION(FUJITSU_DRIVER_VERSION); |
| 1343 | 1340 | MODULE_LICENSE("GPL"); |
| 1344 | − | |
| 1345 | −MODULE_ALIAS("dmi:*:svnFUJITSUSIEMENS:*:pvr:rvnFUJITSU:rnFJNB1D3:*:cvrS6410:*"); | |
| 1346 | −MODULE_ALIAS("dmi:*:svnFUJITSUSIEMENS:*:pvr:rvnFUJITSU:rnFJNB1E6:*:cvrS6420:*"); | |
| 1347 | −MODULE_ALIAS("dmi:*:svnFUJITSU:*:pvr:rvnFUJITSU:rnFJNB19C:*:cvrS7020:*"); | |
| @@ -76,7 +76,7 @@ config QCOM_ADSP_PIL · 75 unmodified lines | ||
| 76 | 76 | depends on OF && ARCH_QCOM |
| 77 | 77 | depends on REMOTEPROC |
| 78 | 78 | depends on QCOM_SMEM |
| 79 | − depends on QCOM_SMD || (COMPILE_TEST && QCOM_SMD=n) | |
| 79 | + depends on RPMSG_QCOM_SMD || QCOM_SMD || (COMPILE_TEST && QCOM_SMD=n && RPMSG_QCOM_SMD=n) | |
| 80 | 80 | select MFD_SYSCON |
| 81 | 81 | select QCOM_MDT_LOADER |
| 82 | 82 | select QCOM_RPROC_COMMON |
| @@ -93,7 +93,7 @@ config QCOM_Q6V5_PIL · 10 unmodified lines | ||
| 93 | 93 | depends on OF && ARCH_QCOM |
| 94 | 94 | depends on QCOM_SMEM |
| 95 | 95 | depends on REMOTEPROC |
| 96 | − depends on QCOM_SMD || (COMPILE_TEST && QCOM_SMD=n) | |
| 96 | + depends on RPMSG_QCOM_SMD || QCOM_SMD || (COMPILE_TEST && QCOM_SMD=n && RPMSG_QCOM_SMD=n) | |
| 97 | 97 | select MFD_SYSCON |
| 98 | 98 | select QCOM_RPROC_COMMON |
| 99 | 99 | select QCOM_SCM |
| @@ -104,7 +104,7 @@ config QCOM_Q6V5_PIL · 4 unmodified lines | ||
| 104 | 104 | config QCOM_WCNSS_PIL |
| 105 | 105 | tristate "Qualcomm WCNSS Peripheral Image Loader" |
| 106 | 106 | depends on OF && ARCH_QCOM |
| 107 | − depends on QCOM_SMD || (COMPILE_TEST && QCOM_SMD=n) | |
| 107 | + depends on RPMSG_QCOM_SMD || QCOM_SMD || (COMPILE_TEST && QCOM_SMD=n && RPMSG_QCOM_SMD=n) | |
| 108 | 108 | depends on QCOM_SMEM |
| 109 | 109 | depends on REMOTEPROC |
| 110 | 110 | select QCOM_MDT_LOADER |
| @@ -1241,16 +1241,15 @@ config SCSI_LPFC · 1240 unmodified lines | ||
| 1241 | 1241 | tristate "Emulex LightPulse Fibre Channel Support" |
| 1242 | 1242 | depends on PCI && SCSI |
| 1243 | 1243 | depends on SCSI_FC_ATTRS |
| 1244 | − depends on NVME_FC && NVME_TARGET_FC | |
| 1245 | 1244 | select CRC_T10DIF |
| 1246 | − help | |
| 1245 | + ---help--- | |
| 1247 | 1246 | This lpfc driver supports the Emulex LightPulse |
| 1248 | 1247 | Family of Fibre Channel PCI host adapters. |
| 1249 | 1248 | |
| 1250 | 1249 | config SCSI_LPFC_DEBUG_FS |
| 1251 | 1250 | bool "Emulex LightPulse Fibre Channel debugfs Support" |
| 1252 | 1251 | depends on SCSI_LPFC && DEBUG_FS |
| 1253 | − help | |
| 1252 | + ---help--- | |
| 1254 | 1253 | This makes debugging information from the lpfc driver |
| 1255 | 1254 | available via the debugfs filesystem. |
| 1256 | 1255 | |
| @@ -468,7 +468,7 @@ err_out: · 467 unmodified lines | ||
| 468 | 468 | return -1; |
| 469 | 469 | |
| 470 | 470 | err_blink: |
| 471 | − return (status > 16) & 0xFF; | |
| 471 | + return (status >> 16) & 0xFF; | |
| 472 | 472 | } |
| 473 | 473 | |
| 474 | 474 | static inline u32 aac_get_vector(struct aac_dev *dev) |
| @@ -2956,7 +2956,7 @@ static int hpsa_send_reset(struct ctlr_info *h, unsigned char *scsi3addr, · 2955 unmodified lines | ||
| 2956 | 2956 | /* fill_cmd can't fail here, no data buffer to map. */ |
| 2957 | 2957 | (void) fill_cmd(c, reset_type, h, NULL, 0, 0, |
| 2958 | 2958 | scsi3addr, TYPE_MSG); |
| 2959 | − rc = hpsa_scsi_do_simple_cmd(h, c, reply_queue, DEFAULT_TIMEOUT); | |
| 2959 | + rc = hpsa_scsi_do_simple_cmd(h, c, reply_queue, NO_TIMEOUT); | |
| 2960 | 2960 | if (rc) { |
| 2961 | 2961 | dev_warn(&h->pdev->dev, "Failed to send reset command\n"); |
| 2962 | 2962 | goto out; |
| @@ -3714,7 +3714,7 @@ exit_failed: · 751 unmodified lines | ||
| 3714 | 3714 | * # (integer code indicating one of several NOT READY states |
| 3715 | 3715 | * describing why a volume is to be kept offline) |
| 3716 | 3716 | */ |
| 3717 | −static int hpsa_volume_offline(struct ctlr_info *h, | |
| 3717 | +static unsigned char hpsa_volume_offline(struct ctlr_info *h, | |
| 3718 | 3718 | unsigned char scsi3addr[]) |
| 3719 | 3719 | { |
| 3720 | 3720 | struct CommandList *c; |
| @@ -3735,7 +3735,7 @@ static int hpsa_volume_offline(struct ctlr_info *h, · 14 unmodified lines | ||
| 3735 | 3735 | DEFAULT_TIMEOUT); |
| 3736 | 3736 | if (rc) { |
| 3737 | 3737 | cmd_free(h, c); |
| 3738 | − return 0; | |
| 3738 | + return HPSA_VPD_LV_STATUS_UNSUPPORTED; | |
| 3739 | 3739 | } |
| 3740 | 3740 | sense = c->err_info->SenseInfo; |
| 3741 | 3741 | if (c->err_info->SenseLen > sizeof(c->err_info->SenseInfo)) |
| @@ -3746,19 +3746,13 @@ static int hpsa_volume_offline(struct ctlr_info *h, · 4 unmodified lines | ||
| 3746 | 3746 | cmd_status = c->err_info->CommandStatus; |
| 3747 | 3747 | scsi_status = c->err_info->ScsiStatus; |
| 3748 | 3748 | cmd_free(h, c); |
| 3749 | − /* Is the volume 'not ready'? */ | |
| 3750 | − if (cmd_status != CMD_TARGET_STATUS || | |
| 3751 | − scsi_status != SAM_STAT_CHECK_CONDITION || | |
| 3752 | − sense_key != NOT_READY || | |
| 3753 | − asc != ASC_LUN_NOT_READY) { | |
| 3754 | − return 0; | |
| 3755 | − } | |
| 3756 | 3749 | |
| 3757 | 3750 | /* Determine the reason for not ready state */ |
| 3758 | 3751 | ldstat = hpsa_get_volume_status(h, scsi3addr); |
| 3759 | 3752 | |
| 3760 | 3753 | /* Keep volume offline in certain cases: */ |
| 3761 | 3754 | switch (ldstat) { |
| 3755 | + case HPSA_LV_FAILED: | |
| 3762 | 3756 | case HPSA_LV_UNDERGOING_ERASE: |
| 3763 | 3757 | case HPSA_LV_NOT_AVAILABLE: |
| 3764 | 3758 | case HPSA_LV_UNDERGOING_RPI: |
| @@ -3780,7 +3774,7 @@ static int hpsa_volume_offline(struct ctlr_info *h, · 15 unmodified lines | ||
| 3780 | 3774 | default: |
| 3781 | 3775 | break; |
| 3782 | 3776 | } |
| 3783 | − return 0; | |
| 3777 | + return HPSA_LV_OK; | |
| 3784 | 3778 | } |
| 3785 | 3779 | |
| 3786 | 3780 | /* |
| @@ -3853,10 +3847,10 @@ static int hpsa_update_device_info(struct ctlr_info *h, · 66 unmodified lines | ||
| 3853 | 3847 | /* Do an inquiry to the device to see what it is. */ |
| 3854 | 3848 | if (hpsa_scsi_do_inquiry(h, scsi3addr, 0, inq_buff, |
| 3855 | 3849 | (unsigned char) OBDR_TAPE_INQ_SIZE) != 0) { |
| 3856 | − /* Inquiry failed (msg printed already) */ | |
| 3857 | 3850 | dev_err(&h->pdev->dev, |
| 3858 | − "hpsa_update_device_info: inquiry failed\n"); | |
| 3859 | − rc = -EIO; | |
| 3851 | + "%s: inquiry failed, device will be skipped.\n", | |
| 3852 | + __func__); | |
| 3853 | + rc = HPSA_INQUIRY_FAILED; | |
| 3860 | 3854 | goto bail_out; |
| 3861 | 3855 | } |
| 3862 | 3856 | |
| @@ -3885,15 +3879,19 @@ static int hpsa_update_device_info(struct ctlr_info *h, · 22 unmodified lines | ||
| 3885 | 3879 | if ((this_device->devtype == TYPE_DISK || |
| 3886 | 3880 | this_device->devtype == TYPE_ZBC) && |
| 3887 | 3881 | is_logical_dev_addr_mode(scsi3addr)) { |
| 3888 | − int volume_offline; | |
| 3882 | + unsigned char volume_offline; | |
| 3889 | 3883 | |
| 3890 | 3884 | hpsa_get_raid_level(h, scsi3addr, &this_device->raid_level); |
| 3891 | 3885 | if (h->fw_support & MISC_FW_RAID_OFFLOAD_BASIC) |
| 3892 | 3886 | hpsa_get_ioaccel_status(h, scsi3addr, this_device); |
| 3893 | 3887 | volume_offline = hpsa_volume_offline(h, scsi3addr); |
| 3894 | − if (volume_offline < 0 || volume_offline > 0xff) | |
| 3895 | − volume_offline = HPSA_VPD_LV_STATUS_UNSUPPORTED; | |
| 3896 | − this_device->volume_offline = volume_offline & 0xff; | |
| 3888 | + if (volume_offline == HPSA_LV_FAILED) { | |
| 3889 | + rc = HPSA_LV_FAILED; | |
| 3890 | + dev_err(&h->pdev->dev, | |
| 3891 | + "%s: LV failed, device will be skipped.\n", | |
| 3892 | + __func__); | |
| 3893 | + goto bail_out; | |
| 3894 | + } | |
| 3897 | 3895 | } else { |
| 3898 | 3896 | this_device->raid_level = RAID_UNKNOWN; |
| 3899 | 3897 | this_device->offload_config = 0; |
| @@ -4379,8 +4377,7 @@ static void hpsa_update_scsi_devices(struct ctlr_info *h) · 479 unmodified lines | ||
| 4379 | 4377 | goto out; |
| 4380 | 4378 | } |
| 4381 | 4379 | if (rc) { |
| 4382 | − dev_warn(&h->pdev->dev, | |
| 4383 | − "Inquiry failed, skipping device.\n"); | |
| 4380 | + h->drv_req_rescan = 1; | |
| 4384 | 4381 | continue; |
| 4385 | 4382 | } |
| 4386 | 4383 | |
| @@ -5558,7 +5555,7 @@ static void hpsa_scan_complete(struct ctlr_info *h) · 1171 unmodified lines | ||
| 5558 | 5555 | |
| 5559 | 5556 | spin_lock_irqsave(&h->scan_lock, flags); |
| 5560 | 5557 | h->scan_finished = 1; |
| 5561 | − wake_up_all(&h->scan_wait_queue); | |
| 5558 | + wake_up(&h->scan_wait_queue); | |
| 5562 | 5559 | spin_unlock_irqrestore(&h->scan_lock, flags); |
| 5563 | 5560 | } |
| 5564 | 5561 | |
| @@ -5576,11 +5573,23 @@ static void hpsa_scan_start(struct Scsi_Host *sh) · 11 unmodified lines | ||
| 5576 | 5573 | if (unlikely(lockup_detected(h))) |
| 5577 | 5574 | return hpsa_scan_complete(h); |
| 5578 | 5575 | |
| 5576 | + /* | |
| 5577 | + * If a scan is already waiting to run, no need to add another | |
| 5578 | + */ | |
| 5579 | + spin_lock_irqsave(&h->scan_lock, flags); | |
| 5580 | + if (h->scan_waiting) { | |
| 5581 | + spin_unlock_irqrestore(&h->scan_lock, flags); | |
| 5582 | + return; | |
| 5583 | + } | |
| 5584 | + | |
| 5585 | + spin_unlock_irqrestore(&h->scan_lock, flags); | |
| 5586 | + | |
| 5579 | 5587 | /* wait until any scan already in progress is finished. */ |
| 5580 | 5588 | while (1) { |
| 5581 | 5589 | spin_lock_irqsave(&h->scan_lock, flags); |
| 5582 | 5590 | if (h->scan_finished) |
| 5583 | 5591 | break; |
| 5592 | + h->scan_waiting = 1; | |
| 5584 | 5593 | spin_unlock_irqrestore(&h->scan_lock, flags); |
| 5585 | 5594 | wait_event(h->scan_wait_queue, h->scan_finished); |
| 5586 | 5595 | /* Note: We don't need to worry about a race between this |
| @@ -5590,6 +5599,7 @@ static void hpsa_scan_start(struct Scsi_Host *sh) · 3 unmodified lines | ||
| 5590 | 5599 | */ |
| 5591 | 5600 | } |
| 5592 | 5601 | h->scan_finished = 0; /* mark scan as in progress */ |
| 5602 | + h->scan_waiting = 0; | |
| 5593 | 5603 | spin_unlock_irqrestore(&h->scan_lock, flags); |
| 5594 | 5604 | |
| 5595 | 5605 | if (unlikely(lockup_detected(h))) |
| @@ -8792,6 +8802,7 @@ reinit_after_soft_reset: · 3196 unmodified lines | ||
| 8792 | 8802 | init_waitqueue_head(&h->event_sync_wait_queue); |
| 8793 | 8803 | mutex_init(&h->reset_mutex); |
| 8794 | 8804 | h->scan_finished = 1; /* no scan currently in progress */ |
| 8805 | + h->scan_waiting = 0; | |
| 8795 | 8806 | |
| 8796 | 8807 | pci_set_drvdata(pdev, h); |
| 8797 | 8808 | h->ndevices = 0; |
| @@ -201,6 +201,7 @@ struct ctlr_info { · 200 unmodified lines | ||
| 201 | 201 | dma_addr_t errinfo_pool_dhandle; |
| 202 | 202 | unsigned long *cmd_pool_bits; |
| 203 | 203 | int scan_finished; |
| 204 | + u8 scan_waiting : 1; | |
| 204 | 205 | spinlock_t scan_lock; |
| 205 | 206 | wait_queue_head_t scan_wait_queue; |
| 206 | 207 | |
| @@ -156,6 +156,7 @@ · 155 unmodified lines | ||
| 156 | 156 | #define CFGTBL_BusType_Fibre2G 0x00000200l |
| 157 | 157 | |
| 158 | 158 | /* VPD Inquiry types */ |
| 159 | +#define HPSA_INQUIRY_FAILED 0x02 | |
| 159 | 160 | #define HPSA_VPD_SUPPORTED_PAGES 0x00 |
| 160 | 161 | #define HPSA_VPD_LV_DEVICE_ID 0x83 |
| 161 | 162 | #define HPSA_VPD_LV_DEVICE_GEOMETRY 0xC1 |
| @@ -166,6 +167,7 @@ · 4 unmodified lines | ||
| 166 | 167 | /* Logical volume states */ |
| 167 | 168 | #define HPSA_VPD_LV_STATUS_UNSUPPORTED 0xff |
| 168 | 169 | #define HPSA_LV_OK 0x0 |
| 170 | +#define HPSA_LV_FAILED 0x01 | |
| 169 | 171 | #define HPSA_LV_NOT_AVAILABLE 0x0b |
| 170 | 172 | #define HPSA_LV_UNDERGOING_ERASE 0x0F |
| 171 | 173 | #define HPSA_LV_UNDERGOING_RPI 0x12 |
| @@ -561,8 +561,12 @@ static void iscsi_complete_task(struct iscsi_task *task, int state) · 560 unmodified lines | ||
| 561 | 561 | WARN_ON_ONCE(task->state == ISCSI_TASK_FREE); |
| 562 | 562 | task->state = state; |
| 563 | 563 | |
| 564 | − if (!list_empty(&task->running)) | |
| 564 | + spin_lock_bh(&conn->taskqueuelock); | |
| 565 | + if (!list_empty(&task->running)) { | |
| 566 | + pr_debug_once("%s while task on list", __func__); | |
| 565 | 567 | list_del_init(&task->running); |
| 568 | + } | |
| 569 | + spin_unlock_bh(&conn->taskqueuelock); | |
| 566 | 570 | |
| 567 | 571 | if (conn->task == task) |
| 568 | 572 | conn->task = NULL; |
| @@ -784,7 +788,9 @@ __iscsi_conn_send_pdu(struct iscsi_conn *conn, struct iscsi_hdr *hdr, · 215 unmodified lines | ||
| 784 | 788 | if (session->tt->xmit_task(task)) |
| 785 | 789 | goto free_task; |
| 786 | 790 | } else { |
| 791 | + spin_lock_bh(&conn->taskqueuelock); | |
| 787 | 792 | list_add_tail(&task->running, &conn->mgmtqueue); |
| 793 | + spin_unlock_bh(&conn->taskqueuelock); | |
| 788 | 794 | iscsi_conn_queue_work(conn); |
| 789 | 795 | } |
| 790 | 796 | |
| @@ -1475,8 +1481,10 @@ void iscsi_requeue_task(struct iscsi_task *task) · 684 unmodified lines | ||
| 1475 | 1481 | * this may be on the requeue list already if the xmit_task callout |
| 1476 | 1482 | * is handling the r2ts while we are adding new ones |
| 1477 | 1483 | */ |
| 1484 | + spin_lock_bh(&conn->taskqueuelock); | |
| 1478 | 1485 | if (list_empty(&task->running)) |
| 1479 | 1486 | list_add_tail(&task->running, &conn->requeue); |
| 1487 | + spin_unlock_bh(&conn->taskqueuelock); | |
| 1480 | 1488 | iscsi_conn_queue_work(conn); |
| 1481 | 1489 | } |
| 1482 | 1490 | EXPORT_SYMBOL_GPL(iscsi_requeue_task); |
| @@ -1513,22 +1521,26 @@ static int iscsi_data_xmit(struct iscsi_conn *conn) · 30 unmodified lines | ||
| 1513 | 1521 | * only have one nop-out as a ping from us and targets should not |
| 1514 | 1522 | * overflow us with nop-ins |
| 1515 | 1523 | */ |
| 1524 | + spin_lock_bh(&conn->taskqueuelock); | |
| 1516 | 1525 | check_mgmt: |
| 1517 | 1526 | while (!list_empty(&conn->mgmtqueue)) { |
| 1518 | 1527 | conn->task = list_entry(conn->mgmtqueue.next, |
| 1519 | 1528 | struct iscsi_task, running); |
| 1520 | 1529 | list_del_init(&conn->task->running); |
| 1530 | + spin_unlock_bh(&conn->taskqueuelock); | |
| 1521 | 1531 | if (iscsi_prep_mgmt_task(conn, conn->task)) { |
| 1522 | 1532 | /* regular RX path uses back_lock */ |
| 1523 | 1533 | spin_lock_bh(&conn->session->back_lock); |
| 1524 | 1534 | __iscsi_put_task(conn->task); |
| 1525 | 1535 | spin_unlock_bh(&conn->session->back_lock); |
| 1526 | 1536 | conn->task = NULL; |
| 1537 | + spin_lock_bh(&conn->taskqueuelock); | |
| 1527 | 1538 | continue; |
| 1528 | 1539 | } |
| 1529 | 1540 | rc = iscsi_xmit_task(conn); |
| 1530 | 1541 | if (rc) |
| 1531 | 1542 | goto done; |
| 1543 | + spin_lock_bh(&conn->taskqueuelock); | |
| 1532 | 1544 | } |
| 1533 | 1545 | |
| 1534 | 1546 | /* process pending command queue */ |
| @@ -1536,19 +1548,24 @@ check_mgmt: · 1 unmodified line | ||
| 1536 | 1548 | conn->task = list_entry(conn->cmdqueue.next, struct iscsi_task, |
| 1537 | 1549 | running); |
| 1538 | 1550 | list_del_init(&conn->task->running); |
| 1551 | + spin_unlock_bh(&conn->taskqueuelock); | |
| 1539 | 1552 | if (conn->session->state == ISCSI_STATE_LOGGING_OUT) { |
| 1540 | 1553 | fail_scsi_task(conn->task, DID_IMM_RETRY); |
| 1554 | + spin_lock_bh(&conn->taskqueuelock); | |
| 1541 | 1555 | continue; |
| 1542 | 1556 | } |
| 1543 | 1557 | rc = iscsi_prep_scsi_cmd_pdu(conn->task); |
| 1544 | 1558 | if (rc) { |
| 1545 | 1559 | if (rc == -ENOMEM || rc == -EACCES) { |
| 1560 | + spin_lock_bh(&conn->taskqueuelock); | |
| 1546 | 1561 | list_add_tail(&conn->task->running, |
| 1547 | 1562 | &conn->cmdqueue); |
| 1548 | 1563 | conn->task = NULL; |
| 1564 | + spin_unlock_bh(&conn->taskqueuelock); | |
| 1549 | 1565 | goto done; |
| 1550 | 1566 | } else |
| 1551 | 1567 | fail_scsi_task(conn->task, DID_ABORT); |
| 1568 | + spin_lock_bh(&conn->taskqueuelock); | |
| 1552 | 1569 | continue; |
| 1553 | 1570 | } |
| 1554 | 1571 | rc = iscsi_xmit_task(conn); |
| @@ -1559,6 +1576,7 @@ check_mgmt: · 4 unmodified lines | ||
| 1559 | 1576 | * we need to check the mgmt queue for nops that need to |
| 1560 | 1577 | * be sent to aviod starvation |
| 1561 | 1578 | */ |
| 1579 | + spin_lock_bh(&conn->taskqueuelock); | |
| 1562 | 1580 | if (!list_empty(&conn->mgmtqueue)) |
| 1563 | 1581 | goto check_mgmt; |
| 1564 | 1582 | } |
| @@ -1578,12 +1596,15 @@ check_mgmt: · 13 unmodified lines | ||
| 1578 | 1596 | conn->task = task; |
| 1579 | 1597 | list_del_init(&conn->task->running); |
| 1580 | 1598 | conn->task->state = ISCSI_TASK_RUNNING; |
| 1599 | + spin_unlock_bh(&conn->taskqueuelock); | |
| 1581 | 1600 | rc = iscsi_xmit_task(conn); |
| 1582 | 1601 | if (rc) |
| 1583 | 1602 | goto done; |
| 1603 | + spin_lock_bh(&conn->taskqueuelock); | |
| 1584 | 1604 | if (!list_empty(&conn->mgmtqueue)) |
| 1585 | 1605 | goto check_mgmt; |
| 1586 | 1606 | } |
| 1607 | + spin_unlock_bh(&conn->taskqueuelock); | |
| 1587 | 1608 | spin_unlock_bh(&conn->session->frwd_lock); |
| 1588 | 1609 | return -ENODATA; |
| 1589 | 1610 | |
| @@ -1739,7 +1760,9 @@ int iscsi_queuecommand(struct Scsi_Host *host, struct scsi_cmnd *sc) · 149 unmodified lines | ||
| 1739 | 1760 | goto prepd_reject; |
| 1740 | 1761 | } |
| 1741 | 1762 | } else { |
| 1763 | + spin_lock_bh(&conn->taskqueuelock); | |
| 1742 | 1764 | list_add_tail(&task->running, &conn->cmdqueue); |
| 1765 | + spin_unlock_bh(&conn->taskqueuelock); | |
| 1743 | 1766 | iscsi_conn_queue_work(conn); |
| 1744 | 1767 | } |
| 1745 | 1768 | |
| @@ -2897,6 +2920,7 @@ iscsi_conn_setup(struct iscsi_cls_session *cls_session, int dd_size, · 1151 unmodified lines | ||
| 2897 | 2920 | INIT_LIST_HEAD(&conn->mgmtqueue); |
| 2898 | 2921 | INIT_LIST_HEAD(&conn->cmdqueue); |
| 2899 | 2922 | INIT_LIST_HEAD(&conn->requeue); |
| 2923 | + spin_lock_init(&conn->taskqueuelock); | |
| 2900 | 2924 | INIT_WORK(&conn->xmitwork, iscsi_xmitworker); |
| 2901 | 2925 | |
| 2902 | 2926 | /* allocate login_task used for the login/text sequences */ |
| @@ -99,12 +99,13 @@ struct lpfc_sli2_slim; · 98 unmodified lines | ||
| 99 | 99 | #define FC_MAX_ADPTMSG 64 |
| 100 | 100 | |
| 101 | 101 | #define MAX_HBAEVT 32 |
| 102 | +#define MAX_HBAS_NO_RESET 16 | |
| 102 | 103 | |
| 103 | 104 | /* Number of MSI-X vectors the driver uses */ |
| 104 | 105 | #define LPFC_MSIX_VECTORS 2 |
| 105 | 106 | |
| 106 | 107 | /* lpfc wait event data ready flag */ |
| 107 | −#define LPFC_DATA_READY (1<<0) | |
| 108 | +#define LPFC_DATA_READY 0 /* bit 0 */ | |
| 108 | 109 | |
| 109 | 110 | /* queue dump line buffer size */ |
| 110 | 111 | #define LPFC_LBUF_SZ 128 |
| @@ -692,6 +693,7 @@ struct lpfc_hba { · 581 unmodified lines | ||
| 692 | 693 | * capability |
| 693 | 694 | */ |
| 694 | 695 | #define HBA_NVME_IOQ_FLUSH 0x80000 /* NVME IO queues flushed. */ |
| 696 | +#define NVME_XRI_ABORT_EVENT 0x100000 | |
| 695 | 697 | |
| 696 | 698 | uint32_t fcp_ring_in_use; /* When polling test if intr-hndlr active*/ |
| 697 | 699 | struct lpfc_dmabuf slim2p; |
| @@ -3010,6 +3010,12 @@ MODULE_PARM_DESC(lpfc_poll, "FCP ring polling mode control:" · 3009 unmodified lines | ||
| 3010 | 3010 | static DEVICE_ATTR(lpfc_poll, S_IRUGO | S_IWUSR, |
| 3011 | 3011 | lpfc_poll_show, lpfc_poll_store); |
| 3012 | 3012 | |
| 3013 | +int lpfc_no_hba_reset_cnt; | |
| 3014 | +unsigned long lpfc_no_hba_reset[MAX_HBAS_NO_RESET] = { | |
| 3015 | + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}; | |
| 3016 | +module_param_array(lpfc_no_hba_reset, ulong, &lpfc_no_hba_reset_cnt, 0444); | |
| 3017 | +MODULE_PARM_DESC(lpfc_no_hba_reset, "WWPN of HBAs that should not be reset"); | |
| 3018 | + | |
| 3013 | 3019 | LPFC_ATTR(sli_mode, 0, 0, 3, |
| 3014 | 3020 | "SLI mode selector:" |
| 3015 | 3021 | " 0 - auto (SLI-3 if supported)," |
| @@ -3309,9 +3315,9 @@ LPFC_ATTR_R(nvmet_mrq_post, LPFC_DEF_MRQ_POST, · 293 unmodified lines | ||
| 3309 | 3315 | * lpfc_enable_fc4_type: Defines what FC4 types are supported. |
| 3310 | 3316 | * Supported Values: 1 - register just FCP |
| 3311 | 3317 | * 3 - register both FCP and NVME |
| 3312 | − * Supported values are [1,3]. Default value is 3 | |
| 3318 | + * Supported values are [1,3]. Default value is 1 | |
| 3313 | 3319 | */ |
| 3314 | −LPFC_ATTR_R(enable_fc4_type, LPFC_ENABLE_BOTH, | |
| 3320 | +LPFC_ATTR_R(enable_fc4_type, LPFC_ENABLE_FCP, | |
| 3315 | 3321 | LPFC_ENABLE_FCP, LPFC_ENABLE_BOTH, |
| 3316 | 3322 | "Define fc4 type to register with fabric."); |
| 3317 | 3323 | |
| @@ -4451,7 +4457,8 @@ lpfc_fcp_imax_store(struct device *dev, struct device_attribute *attr, · 1133 unmodified lines | ||
| 4451 | 4457 | return -EINVAL; |
| 4452 | 4458 | |
| 4453 | 4459 | phba->cfg_fcp_imax = (uint32_t)val; |
| 4454 | − for (i = 0; i < phba->io_channel_irqs; i++) | |
| 4460 | + | |
| 4461 | + for (i = 0; i < phba->io_channel_irqs; i += LPFC_MAX_EQ_DELAY_EQID_CNT) | |
| 4455 | 4462 | lpfc_modify_hba_eq_delay(phba, i); |
| 4456 | 4463 | |
| 4457 | 4464 | return strlen(buf); |
| @@ -384,7 +384,7 @@ void lpfc_free_sysfs_attr(struct lpfc_vport *); · 383 unmodified lines | ||
| 384 | 384 | extern struct device_attribute *lpfc_hba_attrs[]; |
| 385 | 385 | extern struct device_attribute *lpfc_vport_attrs[]; |
| 386 | 386 | extern struct scsi_host_template lpfc_template; |
| 387 | −extern struct scsi_host_template lpfc_template_s3; | |
| 387 | +extern struct scsi_host_template lpfc_template_no_hr; | |
| 388 | 388 | extern struct scsi_host_template lpfc_template_nvme; |
| 389 | 389 | extern struct scsi_host_template lpfc_vport_template; |
| 390 | 390 | extern struct fc_function_template lpfc_transport_functions; |
| @@ -554,3 +554,5 @@ void lpfc_nvme_abort_fcreq_cmpl(struct lpfc_hba *phba, · 163 unmodified lines | ||
| 554 | 554 | struct lpfc_wcqe_complete *abts_cmpl); |
| 555 | 555 | extern int lpfc_enable_nvmet_cnt; |
| 556 | 556 | extern unsigned long long lpfc_enable_nvmet[]; |
| 557 | +extern int lpfc_no_hba_reset_cnt; | |
| 558 | +extern unsigned long lpfc_no_hba_reset[]; | |
| @@ -939,8 +939,8 @@ lpfc_cmpl_ct_cmd_gft_id(struct lpfc_hba *phba, struct lpfc_iocbq *cmdiocb, · 938 unmodified lines | ||
| 939 | 939 | "FC4 x%08x, Data: x%08x x%08x\n", |
| 940 | 940 | ndlp, did, ndlp->nlp_fc4_type, |
| 941 | 941 | FC_TYPE_FCP, FC_TYPE_NVME); |
| 942 | + ndlp->nlp_prev_state = NLP_STE_REG_LOGIN_ISSUE; | |
| 942 | 943 | } |
| 943 | − ndlp->nlp_prev_state = NLP_STE_REG_LOGIN_ISSUE; | |
| 944 | 944 | lpfc_nlp_set_state(vport, ndlp, NLP_STE_PRLI_ISSUE); |
| 945 | 945 | lpfc_issue_els_prli(vport, ndlp, 0); |
| 946 | 946 | } else |
| @@ -3653,17 +3653,6 @@ lpfc_idiag_queacc_write(struct file *file, const char __user *buf, · 3652 unmodified lines | ||
| 3653 | 3653 | idiag.ptr_private = phba->sli4_hba.nvmels_cq; |
| 3654 | 3654 | goto pass_check; |
| 3655 | 3655 | } |
| 3656 | − /* NVME LS complete queue */ | |
| 3657 | − if (phba->sli4_hba.nvmels_cq && | |
| 3658 | − phba->sli4_hba.nvmels_cq->queue_id == queid) { | |
| 3659 | − /* Sanity check */ | |
| 3660 | − rc = lpfc_idiag_que_param_check( | |
| 3661 | − phba->sli4_hba.nvmels_cq, index, count); | |
| 3662 | − if (rc) | |
| 3663 | − goto error_out; | |
| 3664 | − idiag.ptr_private = phba->sli4_hba.nvmels_cq; | |
| 3665 | − goto pass_check; | |
| 3666 | − } | |
| 3667 | 3656 | /* FCP complete queue */ |
| 3668 | 3657 | if (phba->sli4_hba.fcp_cq) { |
| 3669 | 3658 | for (qidx = 0; qidx < phba->cfg_fcp_io_channel; |
| @@ -3738,17 +3727,6 @@ lpfc_idiag_queacc_write(struct file *file, const char __user *buf, · 68 unmodified lines | ||
| 3738 | 3727 | idiag.ptr_private = phba->sli4_hba.nvmels_wq; |
| 3739 | 3728 | goto pass_check; |
| 3740 | 3729 | } |
| 3741 | − /* NVME LS work queue */ | |
| 3742 | − if (phba->sli4_hba.nvmels_wq && | |
| 3743 | − phba->sli4_hba.nvmels_wq->queue_id == queid) { | |
| 3744 | − /* Sanity check */ | |
| 3745 | − rc = lpfc_idiag_que_param_check( | |
| 3746 | − phba->sli4_hba.nvmels_wq, index, count); | |
| 3747 | − if (rc) | |
| 3748 | − goto error_out; | |
| 3749 | − idiag.ptr_private = phba->sli4_hba.nvmels_wq; | |
| 3750 | − goto pass_check; | |
| 3751 | − } | |
| 3752 | 3730 | /* FCP work queue */ |
| 3753 | 3731 | if (phba->sli4_hba.fcp_wq) { |
| 3754 | 3732 | for (qidx = 0; qidx < phba->cfg_fcp_io_channel; |
| @@ -5177,15 +5177,15 @@ lpfc_rdp_res_speed(struct fc_rdp_port_speed_desc *desc, struct lpfc_hba *phba) · 5176 unmodified lines | ||
| 5177 | 5177 | |
| 5178 | 5178 | static uint32_t |
| 5179 | 5179 | lpfc_rdp_res_diag_port_names(struct fc_rdp_port_name_desc *desc, |
| 5180 | − struct lpfc_hba *phba) | |
| 5180 | + struct lpfc_vport *vport) | |
| 5181 | 5181 | { |
| 5182 | 5182 | |
| 5183 | 5183 | desc->tag = cpu_to_be32(RDP_PORT_NAMES_DESC_TAG); |
| 5184 | 5184 | |
| 5185 | − memcpy(desc->port_names.wwnn, phba->wwnn, | |
| 5185 | + memcpy(desc->port_names.wwnn, &vport->fc_nodename, | |
| 5186 | 5186 | sizeof(desc->port_names.wwnn)); |
| 5187 | 5187 | |
| 5188 | − memcpy(desc->port_names.wwpn, phba->wwpn, | |
| 5188 | + memcpy(desc->port_names.wwpn, &vport->fc_portname, | |
| 5189 | 5189 | sizeof(desc->port_names.wwpn)); |
| 5190 | 5190 | |
| 5191 | 5191 | desc->length = cpu_to_be32(sizeof(desc->port_names)); |
| @@ -5279,7 +5279,7 @@ lpfc_els_rdp_cmpl(struct lpfc_hba *phba, struct lpfc_rdp_context *rdp_context, · 87 unmodified lines | ||
| 5279 | 5279 | len += lpfc_rdp_res_link_error((struct fc_rdp_link_error_status_desc *) |
| 5280 | 5280 | (len + pcmd), &rdp_context->link_stat); |
| 5281 | 5281 | len += lpfc_rdp_res_diag_port_names((struct fc_rdp_port_name_desc *) |
| 5282 | − (len + pcmd), phba); | |
| 5282 | + (len + pcmd), vport); | |
| 5283 | 5283 | len += lpfc_rdp_res_attach_port_names((struct fc_rdp_port_name_desc *) |
| 5284 | 5284 | (len + pcmd), vport, ndlp); |
| 5285 | 5285 | len += lpfc_rdp_res_fec_desc((struct fc_fec_rdp_desc *)(len + pcmd), |
| @@ -8371,11 +8371,17 @@ lpfc_cmpl_reg_new_vport(struct lpfc_hba *phba, LPFC_MBOXQ_t *pmb) · 3085 unmodified lines | ||
| 8371 | 8371 | spin_lock_irq(shost->host_lock); |
| 8372 | 8372 | vport->fc_flag |= FC_VPORT_NEEDS_REG_VPI; |
| 8373 | 8373 | spin_unlock_irq(shost->host_lock); |
| 8374 | − if (vport->port_type == LPFC_PHYSICAL_PORT | |
| 8375 | − && !(vport->fc_flag & FC_LOGO_RCVD_DID_CHNG)) | |
| 8376 | − lpfc_issue_init_vfi(vport); | |
| 8377 | − else | |
| 8374 | + if (mb->mbxStatus == MBX_NOT_FINISHED) | |
| 8375 | + break; | |
| 8376 | + if ((vport->port_type == LPFC_PHYSICAL_PORT) && | |
| 8377 | + !(vport->fc_flag & FC_LOGO_RCVD_DID_CHNG)) { | |
| 8378 | + if (phba->sli_rev == LPFC_SLI_REV4) | |
| 8379 | + lpfc_issue_init_vfi(vport); | |
| 8380 | + else | |
| 8381 | + lpfc_initial_flogi(vport); | |
| 8382 | + } else { | |
| 8378 | 8383 | lpfc_initial_fdisc(vport); |
| 8384 | + } | |
| 8379 | 8385 | break; |
| 8380 | 8386 | } |
| 8381 | 8387 | } else { |
| @@ -313,8 +313,7 @@ lpfc_dev_loss_tmo_handler(struct lpfc_nodelist *ndlp) · 312 unmodified lines | ||
| 313 | 313 | ndlp->nlp_state, ndlp->nlp_rpi); |
| 314 | 314 | } |
| 315 | 315 | |
| 316 | − if (!(vport->load_flag & FC_UNLOADING) && | |
| 317 | − !(ndlp->nlp_flag & NLP_DELAY_TMO) && | |
| 316 | + if (!(ndlp->nlp_flag & NLP_DELAY_TMO) && | |
| 318 | 317 | !(ndlp->nlp_flag & NLP_NPR_2B_DISC) && |
| 319 | 318 | (ndlp->nlp_state != NLP_STE_UNMAPPED_NODE) && |
| 320 | 319 | (ndlp->nlp_state != NLP_STE_REG_LOGIN_ISSUE) && |
| @@ -641,6 +640,8 @@ lpfc_work_done(struct lpfc_hba *phba) · 320 unmodified lines | ||
| 641 | 640 | lpfc_handle_rrq_active(phba); |
| 642 | 641 | if (phba->hba_flag & FCP_XRI_ABORT_EVENT) |
| 643 | 642 | lpfc_sli4_fcp_xri_abort_event_proc(phba); |
| 643 | + if (phba->hba_flag & NVME_XRI_ABORT_EVENT) | |
| 644 | + lpfc_sli4_nvme_xri_abort_event_proc(phba); | |
| 644 | 645 | if (phba->hba_flag & ELS_XRI_ABORT_EVENT) |
| 645 | 646 | lpfc_sli4_els_xri_abort_event_proc(phba); |
| 646 | 647 | if (phba->hba_flag & ASYNC_EVENT) |
| @@ -2173,7 +2174,7 @@ lpfc_mbx_cmpl_fcf_scan_read_fcf_rec(struct lpfc_hba *phba, LPFC_MBOXQ_t *mboxq) · 1526 unmodified lines | ||
| 2173 | 2174 | uint32_t boot_flag, addr_mode; |
| 2174 | 2175 | uint16_t fcf_index, next_fcf_index; |
| 2175 | 2176 | struct lpfc_fcf_rec *fcf_rec = NULL; |
| 2176 | − uint16_t vlan_id; | |
| 2177 | + uint16_t vlan_id = LPFC_FCOE_NULL_VID; | |
| 2177 | 2178 | bool select_new_fcf; |
| 2178 | 2179 | int rc; |
| 2179 | 2180 | |
| @@ -4020,9 +4021,11 @@ lpfc_register_remote_port(struct lpfc_vport *vport, struct lpfc_nodelist *ndlp) · 1840 unmodified lines | ||
| 4020 | 4021 | rdata = rport->dd_data; |
| 4021 | 4022 | /* break the link before dropping the ref */ |
| 4022 | 4023 | ndlp->rport = NULL; |
| 4023 | − if (rdata && rdata->pnode == ndlp) | |
| 4024 | − lpfc_nlp_put(ndlp); | |
| 4025 | − rdata->pnode = NULL; | |
| 4024 | + if (rdata) { | |
| 4025 | + if (rdata->pnode == ndlp) | |
| 4026 | + lpfc_nlp_put(ndlp); | |
| 4027 | + rdata->pnode = NULL; | |
| 4028 | + } | |
| 4026 | 4029 | /* drop reference for earlier registeration */ |
| 4027 | 4030 | put_device(&rport->dev); |
| 4028 | 4031 | } |
| @@ -4344,9 +4347,8 @@ lpfc_initialize_node(struct lpfc_vport *vport, struct lpfc_nodelist *ndlp, · 315 unmodified lines | ||
| 4344 | 4347 | { |
| 4345 | 4348 | INIT_LIST_HEAD(&ndlp->els_retry_evt.evt_listp); |
| 4346 | 4349 | INIT_LIST_HEAD(&ndlp->dev_loss_evt.evt_listp); |
| 4347 | − init_timer(&ndlp->nlp_delayfunc); | |
| 4348 | − ndlp->nlp_delayfunc.function = lpfc_els_retry_delay; | |
| 4349 | − ndlp->nlp_delayfunc.data = (unsigned long)ndlp; | |
| 4350 | + setup_timer(&ndlp->nlp_delayfunc, lpfc_els_retry_delay, | |
| 4351 | + (unsigned long)ndlp); | |
| 4350 | 4352 | ndlp->nlp_DID = did; |
| 4351 | 4353 | ndlp->vport = vport; |
| 4352 | 4354 | ndlp->phba = vport->phba; |
| @@ -4606,9 +4608,9 @@ lpfc_sli4_dequeue_nport_iocbs(struct lpfc_hba *phba, · 253 unmodified lines | ||
| 4606 | 4608 | pring = qp->pring; |
| 4607 | 4609 | if (!pring) |
| 4608 | 4610 | continue; |
| 4609 | − spin_lock_irq(&pring->ring_lock); | |
| 4611 | + spin_lock(&pring->ring_lock); | |
| 4610 | 4612 | __lpfc_dequeue_nport_iocbs(phba, ndlp, pring, dequeue_list); |
| 4611 | − spin_unlock_irq(&pring->ring_lock); | |
| 4613 | + spin_unlock(&pring->ring_lock); | |
| 4612 | 4614 | } |
| 4613 | 4615 | spin_unlock_irq(&phba->hbalock); |
| 4614 | 4616 | } |
| @@ -1001,7 +1001,7 @@ struct eq_delay_info { · 1000 unmodified lines | ||
| 1001 | 1001 | uint32_t phase; |
| 1002 | 1002 | uint32_t delay_multi; |
| 1003 | 1003 | }; |
| 1004 | −#define LPFC_MAX_EQ_DELAY 8 | |
| 1004 | +#define LPFC_MAX_EQ_DELAY_EQID_CNT 8 | |
| 1005 | 1005 | |
| 1006 | 1006 | struct sgl_page_pairs { |
| 1007 | 1007 | uint32_t sgl_pg0_addr_lo; |
| @@ -1070,7 +1070,7 @@ struct lpfc_mbx_modify_eq_delay { · 62 unmodified lines | ||
| 1070 | 1070 | union { |
| 1071 | 1071 | struct { |
| 1072 | 1072 | uint32_t num_eq; |
| 1073 | − struct eq_delay_info eq[LPFC_MAX_EQ_DELAY]; | |
| 1073 | + struct eq_delay_info eq[LPFC_MAX_EQ_DELAY_EQID_CNT]; | |
| 1074 | 1074 | } request; |
| 1075 | 1075 | struct { |
| 1076 | 1076 | uint32_t word0; |
| @@ -3555,6 +3555,44 @@ out_free_mem: · 3554 unmodified lines | ||
| 3555 | 3555 | return rc; |
| 3556 | 3556 | } |
| 3557 | 3557 | |
| 3558 | +static uint64_t | |
| 3559 | +lpfc_get_wwpn(struct lpfc_hba *phba) | |
| 3560 | +{ | |
| 3561 | + uint64_t wwn; | |
| 3562 | + int rc; | |
| 3563 | + LPFC_MBOXQ_t *mboxq; | |
| 3564 | + MAILBOX_t *mb; | |
| 3565 | + | |
| 3566 | + | |
| 3567 | + mboxq = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, | |
| 3568 | + GFP_KERNEL); | |
| 3569 | + if (!mboxq) | |
| 3570 | + return (uint64_t)-1; | |
| 3571 | + | |
| 3572 | + /* First get WWN of HBA instance */ | |
| 3573 | + lpfc_read_nv(phba, mboxq); | |
| 3574 | + rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL); | |
| 3575 | + if (rc != MBX_SUCCESS) { | |
| 3576 | + lpfc_printf_log(phba, KERN_ERR, LOG_SLI, | |
| 3577 | + "6019 Mailbox failed , mbxCmd x%x " | |
| 3578 | + "READ_NV, mbxStatus x%x\n", | |
| 3579 | + bf_get(lpfc_mqe_command, &mboxq->u.mqe), | |
| 3580 | + bf_get(lpfc_mqe_status, &mboxq->u.mqe)); | |
| 3581 | + mempool_free(mboxq, phba->mbox_mem_pool); | |
| 3582 | + return (uint64_t) -1; | |
| 3583 | + } | |
| 3584 | + mb = &mboxq->u.mb; | |
| 3585 | + memcpy(&wwn, (char *)mb->un.varRDnvp.portname, sizeof(uint64_t)); | |
| 3586 | + /* wwn is WWPN of HBA instance */ | |
| 3587 | + mempool_free(mboxq, phba->mbox_mem_pool); | |
| 3588 | + if (phba->sli_rev == LPFC_SLI_REV4) | |
| 3589 | + return be64_to_cpu(wwn); | |
| 3590 | + else | |
| 3591 | + return (((wwn & 0xffffffff00000000) >> 32) | | |
| 3592 | + ((wwn & 0x00000000ffffffff) << 32)); | |
| 3593 | + | |
| 3594 | +} | |
| 3595 | + | |
| 3558 | 3596 | /** |
| 3559 | 3597 | * lpfc_sli4_nvme_sgl_update - update xri-sgl sizing and mapping |
| 3560 | 3598 | * @phba: pointer to lpfc hba data structure. |
| @@ -3676,17 +3714,32 @@ lpfc_create_port(struct lpfc_hba *phba, int instance, struct device *dev) · 115 unmodified lines | ||
| 3676 | 3714 | struct lpfc_vport *vport; |
| 3677 | 3715 | struct Scsi_Host *shost = NULL; |
| 3678 | 3716 | int error = 0; |
| 3717 | + int i; | |
| 3718 | + uint64_t wwn; | |
| 3719 | + bool use_no_reset_hba = false; | |
| 3720 | + | |
| 3721 | + wwn = lpfc_get_wwpn(phba); | |
| 3722 | + | |
| 3723 | + for (i = 0; i < lpfc_no_hba_reset_cnt; i++) { | |
| 3724 | + if (wwn == lpfc_no_hba_reset[i]) { | |
| 3725 | + lpfc_printf_log(phba, KERN_ERR, LOG_SLI, | |
| 3726 | + "6020 Setting use_no_reset port=%llx\n", | |
| 3727 | + wwn); | |
| 3728 | + use_no_reset_hba = true; | |
| 3729 | + break; | |
| 3730 | + } | |
| 3731 | + } | |
| 3679 | 3732 | |
| 3680 | 3733 | if (phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP) { |
| 3681 | 3734 | if (dev != &phba->pcidev->dev) { |
| 3682 | 3735 | shost = scsi_host_alloc(&lpfc_vport_template, |
| 3683 | 3736 | sizeof(struct lpfc_vport)); |
| 3684 | 3737 | } else { |
| 3685 | − if (phba->sli_rev == LPFC_SLI_REV4) | |
| 3738 | + if (!use_no_reset_hba) | |
| 3686 | 3739 | shost = scsi_host_alloc(&lpfc_template, |
| 3687 | 3740 | sizeof(struct lpfc_vport)); |
| 3688 | 3741 | else |
| 3689 | − shost = scsi_host_alloc(&lpfc_template_s3, | |
| 3742 | + shost = scsi_host_alloc(&lpfc_template_no_hr, | |
| 3690 | 3743 | sizeof(struct lpfc_vport)); |
| 3691 | 3744 | } |
| 3692 | 3745 | } else if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) { |
| @@ -3734,17 +3787,14 @@ lpfc_create_port(struct lpfc_hba *phba, int instance, struct device *dev) · 41 unmodified lines | ||
| 3734 | 3787 | INIT_LIST_HEAD(&vport->rcv_buffer_list); |
| 3735 | 3788 | spin_lock_init(&vport->work_port_lock); |
| 3736 | 3789 | |
| 3737 | − init_timer(&vport->fc_disctmo); | |
| 3738 | − vport->fc_disctmo.function = lpfc_disc_timeout; | |
| 3739 | − vport->fc_disctmo.data = (unsigned long)vport; | |
| 3790 | + setup_timer(&vport->fc_disctmo, lpfc_disc_timeout, | |
| 3791 | + (unsigned long)vport); | |
| 3740 | 3792 | |
| 3741 | − init_timer(&vport->els_tmofunc); | |
| 3742 | − vport->els_tmofunc.function = lpfc_els_timeout; | |
| 3743 | − vport->els_tmofunc.data = (unsigned long)vport; | |
| 3793 | + setup_timer(&vport->els_tmofunc, lpfc_els_timeout, | |
| 3794 | + (unsigned long)vport); | |
| 3744 | 3795 | |
| 3745 | − init_timer(&vport->delayed_disc_tmo); | |
| 3746 | − vport->delayed_disc_tmo.function = lpfc_delayed_disc_tmo; | |
| 3747 | − vport->delayed_disc_tmo.data = (unsigned long)vport; | |
| 3796 | + setup_timer(&vport->delayed_disc_tmo, lpfc_delayed_disc_tmo, | |
| 3797 | + (unsigned long)vport); | |
| 3748 | 3798 | |
| 3749 | 3799 | error = scsi_add_host_with_dma(shost, dev, &phba->pcidev->dev); |
| 3750 | 3800 | if (error) |
| @@ -5406,21 +5456,15 @@ lpfc_setup_driver_resource_phase1(struct lpfc_hba *phba) · 1655 unmodified lines | ||
| 5406 | 5456 | INIT_LIST_HEAD(&phba->luns); |
| 5407 | 5457 | |
| 5408 | 5458 | /* MBOX heartbeat timer */ |
| 5409 | − init_timer(&psli->mbox_tmo); | |
| 5410 | − psli->mbox_tmo.function = lpfc_mbox_timeout; | |
| 5411 | − psli->mbox_tmo.data = (unsigned long) phba; | |
| 5459 | + setup_timer(&psli->mbox_tmo, lpfc_mbox_timeout, (unsigned long)phba); | |
| 5412 | 5460 | /* Fabric block timer */ |
| 5413 | − init_timer(&phba->fabric_block_timer); | |
| 5414 | − phba->fabric_block_timer.function = lpfc_fabric_block_timeout; | |
| 5415 | − phba->fabric_block_timer.data = (unsigned long) phba; | |
| 5461 | + setup_timer(&phba->fabric_block_timer, lpfc_fabric_block_timeout, | |
| 5462 | + (unsigned long)phba); | |
| 5416 | 5463 | /* EA polling mode timer */ |
| 5417 | − init_timer(&phba->eratt_poll); | |
| 5418 | − phba->eratt_poll.function = lpfc_poll_eratt; | |
| 5419 | − phba->eratt_poll.data = (unsigned long) phba; | |
| 5464 | + setup_timer(&phba->eratt_poll, lpfc_poll_eratt, | |
| 5465 | + (unsigned long)phba); | |
| 5420 | 5466 | /* Heartbeat timer */ |
| 5421 | − init_timer(&phba->hb_tmofunc); | |
| 5422 | − phba->hb_tmofunc.function = lpfc_hb_timeout; | |
| 5423 | − phba->hb_tmofunc.data = (unsigned long)phba; | |
| 5467 | + setup_timer(&phba->hb_tmofunc, lpfc_hb_timeout, (unsigned long)phba); | |
| 5424 | 5468 | |
| 5425 | 5469 | return 0; |
| 5426 | 5470 | } |
| @@ -5446,9 +5490,8 @@ lpfc_sli_driver_resource_setup(struct lpfc_hba *phba) · 19 unmodified lines | ||
| 5446 | 5490 | */ |
| 5447 | 5491 | |
| 5448 | 5492 | /* FCP polling mode timer */ |
| 5449 | − init_timer(&phba->fcp_poll_timer); | |
| 5450 | − phba->fcp_poll_timer.function = lpfc_poll_timeout; | |
| 5451 | − phba->fcp_poll_timer.data = (unsigned long) phba; | |
| 5493 | + setup_timer(&phba->fcp_poll_timer, lpfc_poll_timeout, | |
| 5494 | + (unsigned long)phba); | |
| 5452 | 5495 | |
| 5453 | 5496 | /* Host attention work mask setup */ |
| 5454 | 5497 | phba->work_ha_mask = (HA_ERATT | HA_MBATT | HA_LATT); |
| @@ -5482,7 +5525,8 @@ lpfc_sli_driver_resource_setup(struct lpfc_hba *phba) · 27 unmodified lines | ||
| 5482 | 5525 | |
| 5483 | 5526 | /* Initialize the host templates the configured values. */ |
| 5484 | 5527 | lpfc_vport_template.sg_tablesize = phba->cfg_sg_seg_cnt; |
| 5485 | − lpfc_template_s3.sg_tablesize = phba->cfg_sg_seg_cnt; | |
| 5528 | + lpfc_template_no_hr.sg_tablesize = phba->cfg_sg_seg_cnt; | |
| 5529 | + lpfc_template.sg_tablesize = phba->cfg_sg_seg_cnt; | |
| 5486 | 5530 | |
| 5487 | 5531 | /* There are going to be 2 reserved BDEs: 1 FCP cmnd + 1 FCP rsp */ |
| 5488 | 5532 | if (phba->cfg_enable_bg) { |
| @@ -5617,14 +5661,11 @@ lpfc_sli4_driver_resource_setup(struct lpfc_hba *phba) · 128 unmodified lines | ||
| 5617 | 5661 | * Initialize timers used by driver |
| 5618 | 5662 | */ |
| 5619 | 5663 | |
| 5620 | − init_timer(&phba->rrq_tmr); | |
| 5621 | − phba->rrq_tmr.function = lpfc_rrq_timeout; | |
| 5622 | − phba->rrq_tmr.data = (unsigned long)phba; | |
| 5664 | + setup_timer(&phba->rrq_tmr, lpfc_rrq_timeout, (unsigned long)phba); | |
| 5623 | 5665 | |
| 5624 | 5666 | /* FCF rediscover timer */ |
| 5625 | − init_timer(&phba->fcf.redisc_wait); | |
| 5626 | − phba->fcf.redisc_wait.function = lpfc_sli4_fcf_redisc_wait_tmo; | |
| 5627 | − phba->fcf.redisc_wait.data = (unsigned long)phba; | |
| 5667 | + setup_timer(&phba->fcf.redisc_wait, lpfc_sli4_fcf_redisc_wait_tmo, | |
| 5668 | + (unsigned long)phba); | |
| 5628 | 5669 | |
| 5629 | 5670 | /* |
| 5630 | 5671 | * Control structure for handling external multi-buffer mailbox |
| @@ -5706,6 +5747,7 @@ lpfc_sli4_driver_resource_setup(struct lpfc_hba *phba) · 75 unmodified lines | ||
| 5706 | 5747 | /* Initialize the host templates with the updated values. */ |
| 5707 | 5748 | lpfc_vport_template.sg_tablesize = phba->cfg_sg_seg_cnt; |
| 5708 | 5749 | lpfc_template.sg_tablesize = phba->cfg_sg_seg_cnt; |
| 5750 | + lpfc_template_no_hr.sg_tablesize = phba->cfg_sg_seg_cnt; | |
| 5709 | 5751 | |
| 5710 | 5752 | if (phba->cfg_sg_dma_buf_size <= LPFC_MIN_SG_SLI4_BUF_SZ) |
| 5711 | 5753 | phba->cfg_sg_dma_buf_size = LPFC_MIN_SG_SLI4_BUF_SZ; |
| @@ -5736,6 +5778,8 @@ lpfc_sli4_driver_resource_setup(struct lpfc_hba *phba) · 24 unmodified lines | ||
| 5736 | 5778 | /* Initialize the Abort nvme buffer list used by driver */ |
| 5737 | 5779 | spin_lock_init(&phba->sli4_hba.abts_nvme_buf_list_lock); |
| 5738 | 5780 | INIT_LIST_HEAD(&phba->sli4_hba.lpfc_abts_nvme_buf_list); |
| 5781 | + /* Fast-path XRI aborted CQ Event work queue list */ | |
| 5782 | + INIT_LIST_HEAD(&phba->sli4_hba.sp_nvme_xri_aborted_work_queue); | |
| 5739 | 5783 | } |
| 5740 | 5784 | |
| 5741 | 5785 | /* This abort list used by worker thread */ |
| @@ -5847,10 +5891,17 @@ lpfc_sli4_driver_resource_setup(struct lpfc_hba *phba) · 105 unmodified lines | ||
| 5847 | 5891 | /* Check to see if it matches any module parameter */ |
| 5848 | 5892 | for (i = 0; i < lpfc_enable_nvmet_cnt; i++) { |
| 5849 | 5893 | if (wwn == lpfc_enable_nvmet[i]) { |
| 5894 | +#if (IS_ENABLED(CONFIG_NVME_TARGET_FC)) | |
| 5850 | 5895 | lpfc_printf_log(phba, KERN_ERR, LOG_INIT, |
| 5851 | 5896 | "6017 NVME Target %016llx\n", |
| 5852 | 5897 | wwn); |
| 5853 | 5898 | phba->nvmet_support = 1; /* a match */ |
| 5899 | +#else | |
| 5900 | + lpfc_printf_log(phba, KERN_ERR, LOG_INIT, | |
| 5901 | + "6021 Can't enable NVME Target." | |
| 5902 | + " NVME_TARGET_FC infrastructure" | |
| 5903 | + " is not in kernel\n"); | |
| 5904 | +#endif | |
| 5854 | 5905 | } |
| 5855 | 5906 | } |
| 5856 | 5907 | } |
| @@ -8712,12 +8763,9 @@ lpfc_sli4_queue_setup(struct lpfc_hba *phba) · 2855 unmodified lines | ||
| 8712 | 8763 | } |
| 8713 | 8764 | } |
| 8714 | 8765 | |
| 8715 | − /* | |
| 8716 | − * Configure EQ delay multipier for interrupt coalescing using | |
| 8717 | − * MODIFY_EQ_DELAY for all EQs created, LPFC_MAX_EQ_DELAY at a time. | |
| 8718 | − */ | |
| 8719 | − for (qidx = 0; qidx < io_channel; qidx += LPFC_MAX_EQ_DELAY) | |
| 8766 | + for (qidx = 0; qidx < io_channel; qidx += LPFC_MAX_EQ_DELAY_EQID_CNT) | |
| 8720 | 8767 | lpfc_modify_hba_eq_delay(phba, qidx); |
| 8768 | + | |
| 8721 | 8769 | return 0; |
| 8722 | 8770 | |
| 8723 | 8771 | out_destroy: |
| @@ -8973,6 +9021,11 @@ lpfc_sli4_cq_event_release_all(struct lpfc_hba *phba) · 249 unmodified lines | ||
| 8973 | 9021 | /* Pending ELS XRI abort events */ |
| 8974 | 9022 | list_splice_init(&phba->sli4_hba.sp_els_xri_aborted_work_queue, |
| 8975 | 9023 | &cqelist); |
| 9024 | + if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) { | |
| 9025 | + /* Pending NVME XRI abort events */ | |
| 9026 | + list_splice_init(&phba->sli4_hba.sp_nvme_xri_aborted_work_queue, | |
| 9027 | + &cqelist); | |
| 9028 | + } | |
| 8976 | 9029 | /* Pending asynnc events */ |
| 8977 | 9030 | list_splice_init(&phba->sli4_hba.sp_asynce_work_queue, |
| 8978 | 9031 | &cqelist); |
| @@ -10400,12 +10453,7 @@ lpfc_pci_remove_one_s3(struct pci_dev *pdev) · 1421 unmodified lines | ||
| 10400 | 10453 | fc_remove_host(shost); |
| 10401 | 10454 | scsi_remove_host(shost); |
| 10402 | 10455 | |
| 10403 | − /* Perform ndlp cleanup on the physical port. The nvme and nvmet | |
| 10404 | − * localports are destroyed after to cleanup all transport memory. | |
| 10405 | − */ | |
| 10406 | 10456 | lpfc_cleanup(vport); |
| 10407 | − lpfc_nvmet_destroy_targetport(phba); | |
| 10408 | − lpfc_nvme_destroy_localport(vport); | |
| 10409 | 10457 | |
| 10410 | 10458 | /* |
| 10411 | 10459 | * Bring down the SLI Layer. This step disable all interrupts, |
| @@ -12018,6 +12066,7 @@ static struct pci_driver lpfc_driver = { · 1606 unmodified lines | ||
| 12018 | 12066 | .id_table = lpfc_id_table, |
| 12019 | 12067 | .probe = lpfc_pci_probe_one, |
| 12020 | 12068 | .remove = lpfc_pci_remove_one, |
| 12069 | + .shutdown = lpfc_pci_remove_one, | |
| 12021 | 12070 | .suspend = lpfc_pci_suspend_one, |
| 12022 | 12071 | .resume = lpfc_pci_resume_one, |
| 12023 | 12072 | .err_handler = &lpfc_err_handler, |
| @@ -646,7 +646,6 @@ lpfc_sli4_nvmet_alloc(struct lpfc_hba *phba) · 645 unmodified lines | ||
| 646 | 646 | } |
| 647 | 647 | |
| 648 | 648 | dma_buf->iocbq = lpfc_sli_get_iocbq(phba); |
| 649 | − dma_buf->iocbq->iocb_flag = LPFC_IO_NVMET; | |
| 650 | 649 | if (!dma_buf->iocbq) { |
| 651 | 650 | kfree(dma_buf->context); |
| 652 | 651 | pci_pool_free(phba->lpfc_drb_pool, dma_buf->dbuf.virt, |
| @@ -658,6 +657,7 @@ lpfc_sli4_nvmet_alloc(struct lpfc_hba *phba) · 5 unmodified lines | ||
| 658 | 657 | "2621 Ran out of nvmet iocb/WQEs\n"); |
| 659 | 658 | return NULL; |
| 660 | 659 | } |
| 660 | + dma_buf->iocbq->iocb_flag = LPFC_IO_NVMET; | |
| 661 | 661 | nvmewqe = dma_buf->iocbq; |
| 662 | 662 | wqe = (union lpfc_wqe128 *)&nvmewqe->wqe; |
| 663 | 663 | /* Initialize WQE */ |
| @@ -316,7 +316,7 @@ lpfc_nvme_gen_req(struct lpfc_vport *vport, struct lpfc_dmabuf *bmp, · 315 unmodified lines | ||
| 316 | 316 | bf_set(wqe_dfctl, &wqe->gen_req.wge_ctl, 0); |
| 317 | 317 | bf_set(wqe_si, &wqe->gen_req.wge_ctl, 1); |
| 318 | 318 | bf_set(wqe_la, &wqe->gen_req.wge_ctl, 1); |
| 319 | − bf_set(wqe_rctl, &wqe->gen_req.wge_ctl, FC_RCTL_DD_UNSOL_CTL); | |
| 319 | + bf_set(wqe_rctl, &wqe->gen_req.wge_ctl, FC_RCTL_ELS4_REQ); | |
| 320 | 320 | bf_set(wqe_type, &wqe->gen_req.wge_ctl, FC_TYPE_NVME); |
| 321 | 321 | |
| 322 | 322 | /* Word 6 */ |
| @@ -620,15 +620,15 @@ lpfc_nvme_adj_fcp_sgls(struct lpfc_vport *vport, · 297 unmodified lines | ||
| 620 | 620 | * Embed the payload in the last half of the WQE |
| 621 | 621 | * WQE words 16-30 get the NVME CMD IU payload |
| 622 | 622 | * |
| 623 | − * WQE Word 16 is already setup with flags | |
| 624 | − * WQE words 17-19 get payload Words 2-4 | |
| 623 | + * WQE words 16-19 get payload Words 1-4 | |
| 625 | 624 | * WQE words 20-21 get payload Words 6-7 |
| 626 | 625 | * WQE words 22-29 get payload Words 16-23 |
| 627 | 626 | */ |
| 628 | − wptr = &wqe->words[17]; /* WQE ptr */ | |
| 627 | + wptr = &wqe->words[16]; /* WQE ptr */ | |
| 629 | 628 | dptr = (uint32_t *)nCmd->cmdaddr; /* payload ptr */ |
| 630 | − dptr += 2; /* Skip Words 0-1 in payload */ | |
| 629 | + dptr++; /* Skip Word 0 in payload */ | |
| 631 | 630 | |
| 631 | + *wptr++ = *dptr++; /* Word 1 */ | |
| 632 | 632 | *wptr++ = *dptr++; /* Word 2 */ |
| 633 | 633 | *wptr++ = *dptr++; /* Word 3 */ |
| 634 | 634 | *wptr++ = *dptr++; /* Word 4 */ |
| @@ -978,9 +978,6 @@ lpfc_nvme_prep_io_cmd(struct lpfc_vport *vport, · 343 unmodified lines | ||
| 978 | 978 | bf_set(wqe_cmd_type, &wqe->generic.wqe_com, |
| 979 | 979 | NVME_WRITE_CMD); |
| 980 | 980 | |
| 981 | − /* Word 16 */ | |
| 982 | − wqe->words[16] = LPFC_NVME_EMBED_WRITE; | |
| 983 | − | |
| 984 | 981 | phba->fc4NvmeOutputRequests++; |
| 985 | 982 | } else { |
| 986 | 983 | /* Word 7 */ |
| @@ -1002,9 +999,6 @@ lpfc_nvme_prep_io_cmd(struct lpfc_vport *vport, · 15 unmodified lines | ||
| 1002 | 999 | bf_set(wqe_cmd_type, &wqe->generic.wqe_com, |
| 1003 | 1000 | NVME_READ_CMD); |
| 1004 | 1001 | |
| 1005 | − /* Word 16 */ | |
| 1006 | − wqe->words[16] = LPFC_NVME_EMBED_READ; | |
| 1007 | − | |
| 1008 | 1002 | phba->fc4NvmeInputRequests++; |
| 1009 | 1003 | } |
| 1010 | 1004 | } else { |
| @@ -1026,9 +1020,6 @@ lpfc_nvme_prep_io_cmd(struct lpfc_vport *vport, · 15 unmodified lines | ||
| 1026 | 1020 | /* Word 11 */ |
| 1027 | 1021 | bf_set(wqe_cmd_type, &wqe->generic.wqe_com, NVME_READ_CMD); |
| 1028 | 1022 | |
| 1029 | − /* Word 16 */ | |
| 1030 | − wqe->words[16] = LPFC_NVME_EMBED_CMD; | |
| 1031 | − | |
| 1032 | 1023 | phba->fc4NvmeControlRequests++; |
| 1033 | 1024 | } |
| 1034 | 1025 | /* |
| @@ -1286,6 +1277,7 @@ lpfc_nvme_fcp_io_submit(struct nvme_fc_local_port *pnvme_lport, · 251 unmodified lines | ||
| 1286 | 1277 | pnvme_fcreq->private = (void *)lpfc_ncmd; |
| 1287 | 1278 | lpfc_ncmd->nvmeCmd = pnvme_fcreq; |
| 1288 | 1279 | lpfc_ncmd->nrport = rport; |
| 1280 | + lpfc_ncmd->ndlp = ndlp; | |
| 1289 | 1281 | lpfc_ncmd->start_time = jiffies; |
| 1290 | 1282 | |
| 1291 | 1283 | lpfc_nvme_prep_io_cmd(vport, lpfc_ncmd, ndlp); |
| @@ -1319,7 +1311,7 @@ lpfc_nvme_fcp_io_submit(struct nvme_fc_local_port *pnvme_lport, · 27 unmodified lines | ||
| 1319 | 1311 | "sid: x%x did: x%x oxid: x%x\n", |
| 1320 | 1312 | ret, vport->fc_myDID, ndlp->nlp_DID, |
| 1321 | 1313 | lpfc_ncmd->cur_iocbq.sli4_xritag); |
| 1322 | − ret = -EINVAL; | |
| 1314 | + ret = -EBUSY; | |
| 1323 | 1315 | goto out_free_nvme_buf; |
| 1324 | 1316 | } |
| 1325 | 1317 | |
| @@ -1821,10 +1813,10 @@ lpfc_post_nvme_sgl_list(struct lpfc_hba *phba, · 495 unmodified lines | ||
| 1821 | 1813 | pdma_phys_sgl1, cur_xritag); |
| 1822 | 1814 | if (status) { |
| 1823 | 1815 | /* failure, put on abort nvme list */ |
| 1824 | − lpfc_ncmd->exch_busy = 1; | |
| 1816 | + lpfc_ncmd->flags |= LPFC_SBUF_XBUSY; | |
| 1825 | 1817 | } else { |
| 1826 | 1818 | /* success, put on NVME buffer list */ |
| 1827 | − lpfc_ncmd->exch_busy = 0; | |
| 1819 | + lpfc_ncmd->flags &= ~LPFC_SBUF_XBUSY; | |
| 1828 | 1820 | lpfc_ncmd->status = IOSTAT_SUCCESS; |
| 1829 | 1821 | num_posted++; |
| 1830 | 1822 | } |
| @@ -1854,10 +1846,10 @@ lpfc_post_nvme_sgl_list(struct lpfc_hba *phba, · 23 unmodified lines | ||
| 1854 | 1846 | struct lpfc_nvme_buf, list); |
| 1855 | 1847 | if (status) { |
| 1856 | 1848 | /* failure, put on abort nvme list */ |
| 1857 | − lpfc_ncmd->exch_busy = 1; | |
| 1849 | + lpfc_ncmd->flags |= LPFC_SBUF_XBUSY; | |
| 1858 | 1850 | } else { |
| 1859 | 1851 | /* success, put on NVME buffer list */ |
| 1860 | − lpfc_ncmd->exch_busy = 0; | |
| 1852 | + lpfc_ncmd->flags &= ~LPFC_SBUF_XBUSY; | |
| 1861 | 1853 | lpfc_ncmd->status = IOSTAT_SUCCESS; |
| 1862 | 1854 | num_posted++; |
| 1863 | 1855 | } |
| @@ -2099,7 +2091,7 @@ lpfc_release_nvme_buf(struct lpfc_hba *phba, struct lpfc_nvme_buf *lpfc_ncmd) · 235 unmodified lines | ||
| 2099 | 2091 | unsigned long iflag = 0; |
| 2100 | 2092 | |
| 2101 | 2093 | lpfc_ncmd->nonsg_phys = 0; |
| 2102 | − if (lpfc_ncmd->exch_busy) { | |
| 2094 | + if (lpfc_ncmd->flags & LPFC_SBUF_XBUSY) { | |
| 2103 | 2095 | spin_lock_irqsave(&phba->sli4_hba.abts_nvme_buf_list_lock, |
| 2104 | 2096 | iflag); |
| 2105 | 2097 | lpfc_ncmd->nvmeCmd = NULL; |
| @@ -2135,11 +2127,12 @@ lpfc_release_nvme_buf(struct lpfc_hba *phba, struct lpfc_nvme_buf *lpfc_ncmd) · 29 unmodified lines | ||
| 2135 | 2127 | int |
| 2136 | 2128 | lpfc_nvme_create_localport(struct lpfc_vport *vport) |
| 2137 | 2129 | { |
| 2130 | + int ret = 0; | |
| 2138 | 2131 | struct lpfc_hba *phba = vport->phba; |
| 2139 | 2132 | struct nvme_fc_port_info nfcp_info; |
| 2140 | 2133 | struct nvme_fc_local_port *localport; |
| 2141 | 2134 | struct lpfc_nvme_lport *lport; |
| 2142 | − int len, ret = 0; | |
| 2135 | + int len; | |
| 2143 | 2136 | |
| 2144 | 2137 | /* Initialize this localport instance. The vport wwn usage ensures |
| 2145 | 2138 | * that NPIV is accounted for. |
| @@ -2156,8 +2149,12 @@ lpfc_nvme_create_localport(struct lpfc_vport *vport) · 10 unmodified lines | ||
| 2156 | 2149 | /* localport is allocated from the stack, but the registration |
| 2157 | 2150 | * call allocates heap memory as well as the private area. |
| 2158 | 2151 | */ |
| 2152 | +#if (IS_ENABLED(CONFIG_NVME_FC)) | |
| 2159 | 2153 | ret = nvme_fc_register_localport(&nfcp_info, &lpfc_nvme_template, |
| 2160 | 2154 | &vport->phba->pcidev->dev, &localport); |
| 2155 | +#else | |
| 2156 | + ret = -ENOMEM; | |
| 2157 | +#endif | |
| 2161 | 2158 | if (!ret) { |
| 2162 | 2159 | lpfc_printf_vlog(vport, KERN_INFO, LOG_NVME | LOG_NVME_DISC, |
| 2163 | 2160 | "6005 Successfully registered local " |
| @@ -2173,10 +2170,10 @@ lpfc_nvme_create_localport(struct lpfc_vport *vport) · 9 unmodified lines | ||
| 2173 | 2170 | lport->vport = vport; |
| 2174 | 2171 | INIT_LIST_HEAD(&lport->rport_list); |
| 2175 | 2172 | vport->nvmei_support = 1; |
| 2173 | + len = lpfc_new_nvme_buf(vport, phba->sli4_hba.nvme_xri_max); | |
| 2174 | + vport->phba->total_nvme_bufs += len; | |
| 2176 | 2175 | } |
| 2177 | 2176 | |
| 2178 | − len = lpfc_new_nvme_buf(vport, phba->sli4_hba.nvme_xri_max); | |
| 2179 | − vport->phba->total_nvme_bufs += len; | |
| 2180 | 2177 | return ret; |
| 2181 | 2178 | } |
| 2182 | 2179 | |
| @@ -2193,6 +2190,7 @@ lpfc_nvme_create_localport(struct lpfc_vport *vport) · 10 unmodified lines | ||
| 2193 | 2190 | void |
| 2194 | 2191 | lpfc_nvme_destroy_localport(struct lpfc_vport *vport) |
| 2195 | 2192 | { |
| 2193 | +#if (IS_ENABLED(CONFIG_NVME_FC)) | |
| 2196 | 2194 | struct nvme_fc_local_port *localport; |
| 2197 | 2195 | struct lpfc_nvme_lport *lport; |
| 2198 | 2196 | struct lpfc_nvme_rport *rport = NULL, *rport_next = NULL; |
| @@ -2208,7 +2206,6 @@ lpfc_nvme_destroy_localport(struct lpfc_vport *vport) · 9 unmodified lines | ||
| 2208 | 2206 | lpfc_printf_vlog(vport, KERN_INFO, LOG_NVME, |
| 2209 | 2207 | "6011 Destroying NVME localport %p\n", |
| 2210 | 2208 | localport); |
| 2211 | − | |
| 2212 | 2209 | list_for_each_entry_safe(rport, rport_next, &lport->rport_list, list) { |
| 2213 | 2210 | /* The last node ref has to get released now before the rport |
| 2214 | 2211 | * private memory area is released by the transport. |
| @@ -2222,6 +2219,7 @@ lpfc_nvme_destroy_localport(struct lpfc_vport *vport) · 7 unmodified lines | ||
| 2222 | 2219 | "6008 rport fail destroy %x\n", ret); |
| 2223 | 2220 | wait_for_completion_timeout(&rport->rport_unreg_done, 5); |
| 2224 | 2221 | } |
| 2222 | + | |
| 2225 | 2223 | /* lport's rport list is clear. Unregister |
| 2226 | 2224 | * lport and release resources. |
| 2227 | 2225 | */ |
| @@ -2245,6 +2243,7 @@ lpfc_nvme_destroy_localport(struct lpfc_vport *vport) · 17 unmodified lines | ||
| 2245 | 2243 | "Failed, status x%x\n", |
| 2246 | 2244 | ret); |
| 2247 | 2245 | } |
| 2246 | +#endif | |
| 2248 | 2247 | } |
| 2249 | 2248 | |
| 2250 | 2249 | void |
| @@ -2275,6 +2274,7 @@ lpfc_nvme_update_localport(struct lpfc_vport *vport) · 24 unmodified lines | ||
| 2275 | 2274 | int |
| 2276 | 2275 | lpfc_nvme_register_port(struct lpfc_vport *vport, struct lpfc_nodelist *ndlp) |
| 2277 | 2276 | { |
| 2277 | +#if (IS_ENABLED(CONFIG_NVME_FC)) | |
| 2278 | 2278 | int ret = 0; |
| 2279 | 2279 | struct nvme_fc_local_port *localport; |
| 2280 | 2280 | struct lpfc_nvme_lport *lport; |
| @@ -2348,7 +2348,6 @@ lpfc_nvme_register_port(struct lpfc_vport *vport, struct lpfc_nodelist *ndlp) · 67 unmodified lines | ||
| 2348 | 2348 | rpinfo.port_role |= FC_PORT_ROLE_NVME_INITIATOR; |
| 2349 | 2349 | rpinfo.port_name = wwn_to_u64(ndlp->nlp_portname.u.wwn); |
| 2350 | 2350 | rpinfo.node_name = wwn_to_u64(ndlp->nlp_nodename.u.wwn); |
| 2351 | − | |
| 2352 | 2351 | ret = nvme_fc_register_remoteport(localport, &rpinfo, |
| 2353 | 2352 | &remote_port); |
| 2354 | 2353 | if (!ret) { |
| @@ -2384,6 +2383,9 @@ lpfc_nvme_register_port(struct lpfc_vport *vport, struct lpfc_nodelist *ndlp) · 29 unmodified lines | ||
| 2384 | 2383 | ndlp->nlp_type, ndlp->nlp_DID, ndlp); |
| 2385 | 2384 | } |
| 2386 | 2385 | return ret; |
| 2386 | +#else | |
| 2387 | + return 0; | |
| 2388 | +#endif | |
| 2387 | 2389 | } |
| 2388 | 2390 | |
| 2389 | 2391 | /* lpfc_nvme_unregister_port - unbind the DID and port_role from this rport. |
| @@ -2401,6 +2403,7 @@ lpfc_nvme_register_port(struct lpfc_vport *vport, struct lpfc_nodelist *ndlp) · 11 unmodified lines | ||
| 2401 | 2403 | void |
| 2402 | 2404 | lpfc_nvme_unregister_port(struct lpfc_vport *vport, struct lpfc_nodelist *ndlp) |
| 2403 | 2405 | { |
| 2406 | +#if (IS_ENABLED(CONFIG_NVME_FC)) | |
| 2404 | 2407 | int ret; |
| 2405 | 2408 | struct nvme_fc_local_port *localport; |
| 2406 | 2409 | struct lpfc_nvme_lport *lport; |
| @@ -2458,7 +2461,61 @@ lpfc_nvme_unregister_port(struct lpfc_vport *vport, struct lpfc_nodelist *ndlp) · 51 unmodified lines | ||
| 2458 | 2461 | return; |
| 2459 | 2462 | |
| 2460 | 2463 | input_err: |
| 2464 | +#endif | |
| 2461 | 2465 | lpfc_printf_vlog(vport, KERN_ERR, LOG_NVME_DISC, |
| 2462 | 2466 | "6168: State error: lport %p, rport%p FCID x%06x\n", |
| 2463 | 2467 | vport->localport, ndlp->rport, ndlp->nlp_DID); |
| 2464 | 2468 | } |
| 2469 | + | |
| 2470 | +/** | |
| 2471 | + * lpfc_sli4_nvme_xri_aborted - Fast-path process of NVME xri abort | |
| 2472 | + * @phba: pointer to lpfc hba data structure. | |
| 2473 | + * @axri: pointer to the fcp xri abort wcqe structure. | |
| 2474 | + * | |
| 2475 | + * This routine is invoked by the worker thread to process a SLI4 fast-path | |
| 2476 | + * FCP aborted xri. | |
| 2477 | + **/ | |
| 2478 | +void | |
| 2479 | +lpfc_sli4_nvme_xri_aborted(struct lpfc_hba *phba, | |
| 2480 | + struct sli4_wcqe_xri_aborted *axri) | |
| 2481 | +{ | |
| 2482 | + uint16_t xri = bf_get(lpfc_wcqe_xa_xri, axri); | |
| 2483 | + uint16_t rxid = bf_get(lpfc_wcqe_xa_remote_xid, axri); | |
| 2484 | + struct lpfc_nvme_buf *lpfc_ncmd, *next_lpfc_ncmd; | |
| 2485 | + struct lpfc_nodelist *ndlp; | |
| 2486 | + unsigned long iflag = 0; | |
| 2487 | + int rrq_empty = 0; | |
| 2488 | + | |
| 2489 | + if (!(phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME)) | |
| 2490 | + return; | |
| 2491 | + spin_lock_irqsave(&phba->hbalock, iflag); | |
| 2492 | + spin_lock(&phba->sli4_hba.abts_nvme_buf_list_lock); | |
| 2493 | + list_for_each_entry_safe(lpfc_ncmd, next_lpfc_ncmd, | |
| 2494 | + &phba->sli4_hba.lpfc_abts_nvme_buf_list, | |
| 2495 | + list) { | |
| 2496 | + if (lpfc_ncmd->cur_iocbq.sli4_xritag == xri) { | |
| 2497 | + list_del(&lpfc_ncmd->list); | |
| 2498 | + lpfc_ncmd->flags &= ~LPFC_SBUF_XBUSY; | |
| 2499 | + lpfc_ncmd->status = IOSTAT_SUCCESS; | |
| 2500 | + spin_unlock( | |
| 2501 | + &phba->sli4_hba.abts_nvme_buf_list_lock); | |
| 2502 | + | |
| 2503 | + rrq_empty = list_empty(&phba->active_rrq_list); | |
| 2504 | + spin_unlock_irqrestore(&phba->hbalock, iflag); | |
| 2505 | + ndlp = lpfc_ncmd->ndlp; | |
| 2506 | + if (ndlp) { | |
| 2507 | + lpfc_set_rrq_active( | |
| 2508 | + phba, ndlp, | |
| 2509 | + lpfc_ncmd->cur_iocbq.sli4_lxritag, | |
| 2510 | + rxid, 1); | |
| 2511 | + lpfc_sli4_abts_err_handler(phba, ndlp, axri); | |
| 2512 | + } | |
| 2513 | + lpfc_release_nvme_buf(phba, lpfc_ncmd); | |
| 2514 | + if (rrq_empty) | |
| 2515 | + lpfc_worker_wake_up(phba); | |
| 2516 | + return; | |
| 2517 | + } | |
| 2518 | + } | |
| 2519 | + spin_unlock(&phba->sli4_hba.abts_nvme_buf_list_lock); | |
| 2520 | + spin_unlock_irqrestore(&phba->hbalock, iflag); | |
| 2521 | +} | |
| @@ -57,6 +57,7 @@ struct lpfc_nvme_buf { · 56 unmodified lines | ||
| 57 | 57 | struct list_head list; |
| 58 | 58 | struct nvmefc_fcp_req *nvmeCmd; |
| 59 | 59 | struct lpfc_nvme_rport *nrport; |
| 60 | + struct lpfc_nodelist *ndlp; | |
| 60 | 61 | |
| 61 | 62 | uint32_t timeout; |
| 62 | 63 | |
| @@ -571,6 +571,7 @@ lpfc_nvmet_xmt_fcp_op(struct nvmet_fc_target_port *tgtport, · 570 unmodified lines | ||
| 571 | 571 | lpfc_printf_log(phba, KERN_ERR, LOG_NVME_IOERR, |
| 572 | 572 | "6102 Bad state IO x%x aborted\n", |
| 573 | 573 | ctxp->oxid); |
| 574 | + rc = -ENXIO; | |
| 574 | 575 | goto aerr; |
| 575 | 576 | } |
| 576 | 577 | |
| @@ -580,6 +581,7 @@ lpfc_nvmet_xmt_fcp_op(struct nvmet_fc_target_port *tgtport, · 3 unmodified lines | ||
| 580 | 581 | lpfc_printf_log(phba, KERN_ERR, LOG_NVME_IOERR, |
| 581 | 582 | "6152 FCP Drop IO x%x: Prep\n", |
| 582 | 583 | ctxp->oxid); |
| 584 | + rc = -ENXIO; | |
| 583 | 585 | goto aerr; |
| 584 | 586 | } |
| 585 | 587 | |
| @@ -618,8 +620,9 @@ lpfc_nvmet_xmt_fcp_op(struct nvmet_fc_target_port *tgtport, · 32 unmodified lines | ||
| 618 | 620 | ctxp->wqeq->hba_wqidx = 0; |
| 619 | 621 | nvmewqeq->context2 = NULL; |
| 620 | 622 | nvmewqeq->context3 = NULL; |
| 623 | + rc = -EBUSY; | |
| 621 | 624 | aerr: |
| 622 | − return -ENXIO; | |
| 625 | + return rc; | |
| 623 | 626 | } |
| 624 | 627 | |
| 625 | 628 | static void |
| @@ -668,9 +671,13 @@ lpfc_nvmet_create_targetport(struct lpfc_hba *phba) · 42 unmodified lines | ||
| 668 | 671 | lpfc_tgttemplate.target_features = NVMET_FCTGTFEAT_READDATA_RSP | |
| 669 | 672 | NVMET_FCTGTFEAT_NEEDS_CMD_CPUSCHED; |
| 670 | 673 | |
| 674 | +#if (IS_ENABLED(CONFIG_NVME_TARGET_FC)) | |
| 671 | 675 | error = nvmet_fc_register_targetport(&pinfo, &lpfc_tgttemplate, |
| 672 | 676 | &phba->pcidev->dev, |
| 673 | 677 | &phba->targetport); |
| 678 | +#else | |
| 679 | + error = -ENOMEM; | |
| 680 | +#endif | |
| 674 | 681 | if (error) { |
| 675 | 682 | lpfc_printf_log(phba, KERN_ERR, LOG_NVME_DISC, |
| 676 | 683 | "6025 Cannot register NVME targetport " |
| @@ -731,9 +738,25 @@ lpfc_nvmet_update_targetport(struct lpfc_hba *phba) · 54 unmodified lines | ||
| 731 | 738 | return 0; |
| 732 | 739 | } |
| 733 | 740 | |
| 741 | +/** | |
| 742 | + * lpfc_sli4_nvmet_xri_aborted - Fast-path process of nvmet xri abort | |
| 743 | + * @phba: pointer to lpfc hba data structure. | |
| 744 | + * @axri: pointer to the nvmet xri abort wcqe structure. | |
| 745 | + * | |
| 746 | + * This routine is invoked by the worker thread to process a SLI4 fast-path | |
| 747 | + * NVMET aborted xri. | |
| 748 | + **/ | |
| 749 | +void | |
| 750 | +lpfc_sli4_nvmet_xri_aborted(struct lpfc_hba *phba, | |
| 751 | + struct sli4_wcqe_xri_aborted *axri) | |
| 752 | +{ | |
| 753 | + /* TODO: work in progress */ | |
| 754 | +} | |
| 755 | + | |
| 734 | 756 | void |
| 735 | 757 | lpfc_nvmet_destroy_targetport(struct lpfc_hba *phba) |
| 736 | 758 | { |
| 759 | +#if (IS_ENABLED(CONFIG_NVME_TARGET_FC)) | |
| 737 | 760 | struct lpfc_nvmet_tgtport *tgtp; |
| 738 | 761 | |
| 739 | 762 | if (phba->nvmet_support == 0) |
| @@ -745,6 +768,7 @@ lpfc_nvmet_destroy_targetport(struct lpfc_hba *phba) · 5 unmodified lines | ||
| 745 | 768 | wait_for_completion_timeout(&tgtp->tport_unreg_done, 5); |
| 746 | 769 | } |
| 747 | 770 | phba->targetport = NULL; |
| 771 | +#endif | |
| 748 | 772 | } |
| 749 | 773 | |
| 750 | 774 | /** |
| @@ -764,6 +788,7 @@ static void · 13 unmodified lines | ||
| 764 | 788 | lpfc_nvmet_unsol_ls_buffer(struct lpfc_hba *phba, struct lpfc_sli_ring *pring, |
| 765 | 789 | struct hbq_dmabuf *nvmebuf) |
| 766 | 790 | { |
| 791 | +#if (IS_ENABLED(CONFIG_NVME_TARGET_FC)) | |
| 767 | 792 | struct lpfc_nvmet_tgtport *tgtp; |
| 768 | 793 | struct fc_frame_header *fc_hdr; |
| 769 | 794 | struct lpfc_nvmet_rcv_ctx *ctxp; |
| @@ -844,6 +869,7 @@ dropit: · 74 unmodified lines | ||
| 844 | 869 | |
| 845 | 870 | atomic_inc(&tgtp->xmt_ls_abort); |
| 846 | 871 | lpfc_nvmet_unsol_ls_issue_abort(phba, ctxp, sid, oxid); |
| 872 | +#endif | |
| 847 | 873 | } |
| 848 | 874 | |
| 849 | 875 | /** |
| @@ -865,6 +891,7 @@ lpfc_nvmet_unsol_fcp_buffer(struct lpfc_hba *phba, · 15 unmodified lines | ||
| 865 | 891 | struct rqb_dmabuf *nvmebuf, |
| 866 | 892 | uint64_t isr_timestamp) |
| 867 | 893 | { |
| 894 | +#if (IS_ENABLED(CONFIG_NVME_TARGET_FC)) | |
| 868 | 895 | struct lpfc_nvmet_rcv_ctx *ctxp; |
| 869 | 896 | struct lpfc_nvmet_tgtport *tgtp; |
| 870 | 897 | struct fc_frame_header *fc_hdr; |
| @@ -955,7 +982,7 @@ lpfc_nvmet_unsol_fcp_buffer(struct lpfc_hba *phba, · 84 unmodified lines | ||
| 955 | 982 | |
| 956 | 983 | atomic_inc(&tgtp->rcv_fcp_cmd_drop); |
| 957 | 984 | lpfc_printf_log(phba, KERN_ERR, LOG_NVME_IOERR, |
| 958 | − "6159 FCP Drop IO x%x: nvmet_fc_rcv_fcp_req x%x\n", | |
| 985 | + "6159 FCP Drop IO x%x: err x%x\n", | |
| 959 | 986 | ctxp->oxid, rc); |
| 960 | 987 | dropit: |
| 961 | 988 | lpfc_nvmeio_data(phba, "NVMET FCP DROP: xri x%x sz %d from %06x\n", |
| @@ -970,6 +997,7 @@ dropit: · 8 unmodified lines | ||
| 970 | 997 | /* We assume a rcv'ed cmd ALWAYs fits into 1 buffer */ |
| 971 | 998 | lpfc_nvmet_rq_post(phba, NULL, &nvmebuf->hbuf); |
| 972 | 999 | } |
| 1000 | +#endif | |
| 973 | 1001 | } |
| 974 | 1002 | |
| 975 | 1003 | /** |
| @@ -1114,7 +1142,7 @@ lpfc_nvmet_prep_ls_wqe(struct lpfc_hba *phba, · 138 unmodified lines | ||
| 1114 | 1142 | bf_set(wqe_dfctl, &wqe->xmit_sequence.wge_ctl, 0); |
| 1115 | 1143 | bf_set(wqe_ls, &wqe->xmit_sequence.wge_ctl, 1); |
| 1116 | 1144 | bf_set(wqe_la, &wqe->xmit_sequence.wge_ctl, 0); |
| 1117 | − bf_set(wqe_rctl, &wqe->xmit_sequence.wge_ctl, FC_RCTL_DD_SOL_CTL); | |
| 1145 | + bf_set(wqe_rctl, &wqe->xmit_sequence.wge_ctl, FC_RCTL_ELS4_REP); | |
| 1118 | 1146 | bf_set(wqe_type, &wqe->xmit_sequence.wge_ctl, FC_TYPE_NVME); |
| 1119 | 1147 | |
| 1120 | 1148 | /* Word 6 */ |
| @@ -1445,7 +1473,6 @@ lpfc_nvmet_prep_fcp_wqe(struct lpfc_hba *phba, · 324 unmodified lines | ||
| 1445 | 1473 | |
| 1446 | 1474 | case NVMET_FCOP_RSP: |
| 1447 | 1475 | /* Words 0 - 2 */ |
| 1448 | − sgel = &rsp->sg[0]; | |
| 1449 | 1476 | physaddr = rsp->rspdma; |
| 1450 | 1477 | wqe->fcp_trsp.bde.tus.f.bdeFlags = BUFF_TYPE_BDE_64; |
| 1451 | 1478 | wqe->fcp_trsp.bde.tus.f.bdeSize = rsp->rsplen; |
| @@ -1681,8 +1708,8 @@ lpfc_nvmet_unsol_issue_abort(struct lpfc_hba *phba, · 229 unmodified lines | ||
| 1681 | 1708 | struct lpfc_nodelist *ndlp; |
| 1682 | 1709 | |
| 1683 | 1710 | lpfc_printf_log(phba, KERN_INFO, LOG_NVME_ABTS, |
| 1684 | − "6067 %s: Entrypoint: sid %x xri %x\n", __func__, | |
| 1685 | − sid, xri); | |
| 1711 | + "6067 Abort: sid %x xri x%x/x%x\n", | |
| 1712 | + sid, xri, ctxp->wqeq->sli4_xritag); | |
| 1686 | 1713 | |
| 1687 | 1714 | tgtp = (struct lpfc_nvmet_tgtport *)phba->targetport->private; |
| 1688 | 1715 | |
| @@ -1693,7 +1720,7 @@ lpfc_nvmet_unsol_issue_abort(struct lpfc_hba *phba, · 4 unmodified lines | ||
| 1693 | 1720 | atomic_inc(&tgtp->xmt_abort_rsp_error); |
| 1694 | 1721 | lpfc_printf_log(phba, KERN_WARNING, LOG_NVME_ABTS, |
| 1695 | 1722 | "6134 Drop ABTS - wrong NDLP state x%x.\n", |
| 1696 | − ndlp->nlp_state); | |
| 1723 | + (ndlp) ? ndlp->nlp_state : NLP_STE_MAX_STATE); | |
| 1697 | 1724 | |
| 1698 | 1725 | /* No failure to an ABTS request. */ |
| 1699 | 1726 | return 0; |
| @@ -1791,7 +1818,7 @@ lpfc_nvmet_sol_fcp_issue_abort(struct lpfc_hba *phba, · 91 unmodified lines | ||
| 1791 | 1818 | atomic_inc(&tgtp->xmt_abort_rsp_error); |
| 1792 | 1819 | lpfc_printf_log(phba, KERN_WARNING, LOG_NVME_ABTS, |
| 1793 | 1820 | "6160 Drop ABTS - wrong NDLP state x%x.\n", |
| 1794 | − ndlp->nlp_state); | |
| 1821 | + (ndlp) ? ndlp->nlp_state : NLP_STE_MAX_STATE); | |
| 1795 | 1822 | |
| 1796 | 1823 | /* No failure to an ABTS request. */ |
| 1797 | 1824 | return 0; |
| @@ -5953,12 +5953,13 @@ struct scsi_host_template lpfc_template_nvme = { · 5952 unmodified lines | ||
| 5953 | 5953 | .track_queue_depth = 0, |
| 5954 | 5954 | }; |
| 5955 | 5955 | |
| 5956 | −struct scsi_host_template lpfc_template_s3 = { | |
| 5956 | +struct scsi_host_template lpfc_template_no_hr = { | |
| 5957 | 5957 | .module = THIS_MODULE, |
| 5958 | 5958 | .name = LPFC_DRIVER_NAME, |
| 5959 | 5959 | .proc_name = LPFC_DRIVER_NAME, |
| 5960 | 5960 | .info = lpfc_info, |
| 5961 | 5961 | .queuecommand = lpfc_queuecommand, |
| 5962 | + .eh_timed_out = fc_eh_timed_out, | |
| 5962 | 5963 | .eh_abort_handler = lpfc_abort_handler, |
| 5963 | 5964 | .eh_device_reset_handler = lpfc_device_reset_handler, |
| 5964 | 5965 | .eh_target_reset_handler = lpfc_target_reset_handler, |
| @@ -6015,7 +6016,6 @@ struct scsi_host_template lpfc_vport_template = { · 50 unmodified lines | ||
| 6015 | 6016 | .eh_abort_handler = lpfc_abort_handler, |
| 6016 | 6017 | .eh_device_reset_handler = lpfc_device_reset_handler, |
| 6017 | 6018 | .eh_target_reset_handler = lpfc_target_reset_handler, |
| 6018 | − .eh_bus_reset_handler = lpfc_bus_reset_handler, | |
| 6019 | 6019 | .slave_alloc = lpfc_slave_alloc, |
| 6020 | 6020 | .slave_configure = lpfc_slave_configure, |
| 6021 | 6021 | .slave_destroy = lpfc_slave_destroy, |
| @@ -1,3 +1,4 @@ | ||
| 1 | + | |
| 1 | 2 | /******************************************************************* |
| 2 | 3 | * This file is part of the Emulex Linux Device Driver for * |
| 3 | 4 | * Fibre Channel Host Bus Adapters. * |
| @@ -952,7 +953,7 @@ __lpfc_sli_get_els_sglq(struct lpfc_hba *phba, struct lpfc_iocbq *piocbq) · 948 unmodified lines | ||
| 952 | 953 | start_sglq = sglq; |
| 953 | 954 | while (!found) { |
| 954 | 955 | if (!sglq) |
| 955 | − return NULL; | |
| 956 | + break; | |
| 956 | 957 | if (ndlp && ndlp->active_rrqs_xri_bitmap && |
| 957 | 958 | test_bit(sglq->sli4_lxritag, |
| 958 | 959 | ndlp->active_rrqs_xri_bitmap)) { |
| @@ -12212,6 +12213,41 @@ void lpfc_sli4_fcp_xri_abort_event_proc(struct lpfc_hba *phba) · 11253 unmodified lines | ||
| 12212 | 12213 | } |
| 12213 | 12214 | } |
| 12214 | 12215 | |
| 12216 | +/** | |
| 12217 | + * lpfc_sli4_nvme_xri_abort_event_proc - Process nvme xri abort event | |
| 12218 | + * @phba: pointer to lpfc hba data structure. | |
| 12219 | + * | |
| 12220 | + * This routine is invoked by the worker thread to process all the pending | |
| 12221 | + * SLI4 NVME abort XRI events. | |
| 12222 | + **/ | |
| 12223 | +void lpfc_sli4_nvme_xri_abort_event_proc(struct lpfc_hba *phba) | |
| 12224 | +{ | |
| 12225 | + struct lpfc_cq_event *cq_event; | |
| 12226 | + | |
| 12227 | + /* First, declare the fcp xri abort event has been handled */ | |
| 12228 | + spin_lock_irq(&phba->hbalock); | |
| 12229 | + phba->hba_flag &= ~NVME_XRI_ABORT_EVENT; | |
| 12230 | + spin_unlock_irq(&phba->hbalock); | |
| 12231 | + /* Now, handle all the fcp xri abort events */ | |
| 12232 | + while (!list_empty(&phba->sli4_hba.sp_nvme_xri_aborted_work_queue)) { | |
| 12233 | + /* Get the first event from the head of the event queue */ | |
| 12234 | + spin_lock_irq(&phba->hbalock); | |
| 12235 | + list_remove_head(&phba->sli4_hba.sp_nvme_xri_aborted_work_queue, | |
| 12236 | + cq_event, struct lpfc_cq_event, list); | |
| 12237 | + spin_unlock_irq(&phba->hbalock); | |
| 12238 | + /* Notify aborted XRI for NVME work queue */ | |
| 12239 | + if (phba->nvmet_support) { | |
| 12240 | + lpfc_sli4_nvmet_xri_aborted(phba, | |
| 12241 | + &cq_event->cqe.wcqe_axri); | |
| 12242 | + } else { | |
| 12243 | + lpfc_sli4_nvme_xri_aborted(phba, | |
| 12244 | + &cq_event->cqe.wcqe_axri); | |
| 12245 | + } | |
| 12246 | + /* Free the event processed back to the free pool */ | |
| 12247 | + lpfc_sli4_cq_event_release(phba, cq_event); | |
| 12248 | + } | |
| 12249 | +} | |
| 12250 | + | |
| 12215 | 12251 | /** |
| 12216 | 12252 | * lpfc_sli4_els_xri_abort_event_proc - Process els xri abort event |
| 12217 | 12253 | * @phba: pointer to lpfc hba data structure. |
| @@ -12709,10 +12745,22 @@ lpfc_sli4_sp_handle_abort_xri_wcqe(struct lpfc_hba *phba, · 491 unmodified lines | ||
| 12709 | 12745 | spin_unlock_irqrestore(&phba->hbalock, iflags); |
| 12710 | 12746 | workposted = true; |
| 12711 | 12747 | break; |
| 12748 | + case LPFC_NVME: | |
| 12749 | + spin_lock_irqsave(&phba->hbalock, iflags); | |
| 12750 | + list_add_tail(&cq_event->list, | |
| 12751 | + &phba->sli4_hba.sp_nvme_xri_aborted_work_queue); | |
| 12752 | + /* Set the nvme xri abort event flag */ | |
| 12753 | + phba->hba_flag |= NVME_XRI_ABORT_EVENT; | |
| 12754 | + spin_unlock_irqrestore(&phba->hbalock, iflags); | |
| 12755 | + workposted = true; | |
| 12756 | + break; | |
| 12712 | 12757 | default: |
| 12713 | 12758 | lpfc_printf_log(phba, KERN_ERR, LOG_SLI, |
| 12714 | − "0603 Invalid work queue CQE subtype (x%x)\n", | |
| 12715 | − cq->subtype); | |
| 12759 | + "0603 Invalid CQ subtype %d: " | |
| 12760 | + "%08x %08x %08x %08x\n", | |
| 12761 | + cq->subtype, wcqe->word0, wcqe->parameter, | |
| 12762 | + wcqe->word2, wcqe->word3); | |
| 12763 | + lpfc_sli4_cq_event_release(phba, cq_event); | |
| 12716 | 12764 | workposted = false; |
| 12717 | 12765 | break; |
| 12718 | 12766 | } |
| @@ -13827,6 +13875,8 @@ lpfc_dual_chute_pci_bar_map(struct lpfc_hba *phba, uint16_t pci_barset) · 1108 unmodified lines | ||
| 13827 | 13875 | * @startq: The starting FCP EQ to modify |
| 13828 | 13876 | * |
| 13829 | 13877 | * This function sends an MODIFY_EQ_DELAY mailbox command to the HBA. |
| 13878 | + * The command allows up to LPFC_MAX_EQ_DELAY_EQID_CNT EQ ID's to be | |
| 13879 | + * updated in one mailbox command. | |
| 13830 | 13880 | * |
| 13831 | 13881 | * The @phba struct is used to send mailbox command to HBA. The @startq |
| 13832 | 13882 | * is used to get the starting FCP EQ to change. |
| @@ -13879,7 +13929,7 @@ lpfc_modify_hba_eq_delay(struct lpfc_hba *phba, uint32_t startq) · 46 unmodified lines | ||
| 13879 | 13929 | eq_delay->u.request.eq[cnt].phase = 0; |
| 13880 | 13930 | eq_delay->u.request.eq[cnt].delay_multi = dmult; |
| 13881 | 13931 | cnt++; |
| 13882 | − if (cnt >= LPFC_MAX_EQ_DELAY) | |
| 13932 | + if (cnt >= LPFC_MAX_EQ_DELAY_EQID_CNT) | |
| 13883 | 13933 | break; |
| 13884 | 13934 | } |
| 13885 | 13935 | eq_delay->u.request.num_eq = cnt; |
| @@ -15185,17 +15235,17 @@ lpfc_mrq_create(struct lpfc_hba *phba, struct lpfc_queue **hrqp, · 1299 unmodified lines | ||
| 15185 | 15235 | drq = drqp[idx]; |
| 15186 | 15236 | cq = cqp[idx]; |
| 15187 | 15237 | |
| 15188 | − if (hrq->entry_count != drq->entry_count) { | |
| 15189 | − status = -EINVAL; | |
| 15190 | − goto out; | |
| 15191 | − } | |
| 15192 | − | |
| 15193 | 15238 | /* sanity check on queue memory */ |
| 15194 | 15239 | if (!hrq || !drq || !cq) { |
| 15195 | 15240 | status = -ENODEV; |
| 15196 | 15241 | goto out; |
| 15197 | 15242 | } |
| 15198 | 15243 | |
| 15244 | + if (hrq->entry_count != drq->entry_count) { | |
| 15245 | + status = -EINVAL; | |
| 15246 | + goto out; | |
| 15247 | + } | |
| 15248 | + | |
| 15199 | 15249 | if (idx == 0) { |
| 15200 | 15250 | bf_set(lpfc_mbx_rq_create_num_pages, |
| 15201 | 15251 | &rq_create->u.request, |
| @@ -642,6 +642,7 @@ struct lpfc_sli4_hba { · 641 unmodified lines | ||
| 642 | 642 | struct list_head sp_asynce_work_queue; |
| 643 | 643 | struct list_head sp_fcp_xri_aborted_work_queue; |
| 644 | 644 | struct list_head sp_els_xri_aborted_work_queue; |
| 645 | + struct list_head sp_nvme_xri_aborted_work_queue; | |
| 645 | 646 | struct list_head sp_unsol_work_queue; |
| 646 | 647 | struct lpfc_sli4_link link_state; |
| 647 | 648 | struct lpfc_sli4_lnk_info lnk_info; |
| @@ -794,9 +795,14 @@ void lpfc_sli4_fcf_redisc_event_proc(struct lpfc_hba *); · 146 unmodified lines | ||
| 794 | 795 | int lpfc_sli4_resume_rpi(struct lpfc_nodelist *, |
| 795 | 796 | void (*)(struct lpfc_hba *, LPFC_MBOXQ_t *), void *); |
| 796 | 797 | void lpfc_sli4_fcp_xri_abort_event_proc(struct lpfc_hba *); |
| 798 | +void lpfc_sli4_nvme_xri_abort_event_proc(struct lpfc_hba *phba); | |
| 797 | 799 | void lpfc_sli4_els_xri_abort_event_proc(struct lpfc_hba *); |
| 798 | 800 | void lpfc_sli4_fcp_xri_aborted(struct lpfc_hba *, |
| 799 | 801 | struct sli4_wcqe_xri_aborted *); |
| 802 | +void lpfc_sli4_nvme_xri_aborted(struct lpfc_hba *phba, | |
| 803 | + struct sli4_wcqe_xri_aborted *axri); | |
| 804 | +void lpfc_sli4_nvmet_xri_aborted(struct lpfc_hba *phba, | |
| 805 | + struct sli4_wcqe_xri_aborted *axri); | |
| 800 | 806 | void lpfc_sli4_els_xri_aborted(struct lpfc_hba *, |
| 801 | 807 | struct sli4_wcqe_xri_aborted *); |
| 802 | 808 | void lpfc_sli4_vport_delete_els_xri_aborted(struct lpfc_vport *); |
| @@ -20,7 +20,7 @@ · 19 unmodified lines | ||
| 20 | 20 | * included with this package. * |
| 21 | 21 | *******************************************************************/ |
| 22 | 22 | |
| 23 | −#define LPFC_DRIVER_VERSION "11.2.0.7" | |
| 23 | +#define LPFC_DRIVER_VERSION "11.2.0.10" | |
| 24 | 24 | #define LPFC_DRIVER_NAME "lpfc" |
| 25 | 25 | |
| 26 | 26 | /* Used for SLI 2/3 */ |
| @@ -35,8 +35,8 @@ · 34 unmodified lines | ||
| 35 | 35 | /* |
| 36 | 36 | * MegaRAID SAS Driver meta data |
| 37 | 37 | */ |
| 38 | −#define MEGASAS_VERSION "07.701.16.00-rc1" | |
| 39 | −#define MEGASAS_RELDATE "February 2, 2017" | |
| 38 | +#define MEGASAS_VERSION "07.701.17.00-rc1" | |
| 39 | +#define MEGASAS_RELDATE "March 2, 2017" | |
| 40 | 40 | |
| 41 | 41 | /* |
| 42 | 42 | * Device IDs |
| @@ -1963,6 +1963,9 @@ scan_target: · 1962 unmodified lines | ||
| 1963 | 1963 | if (!mr_device_priv_data) |
| 1964 | 1964 | return -ENOMEM; |
| 1965 | 1965 | sdev->hostdata = mr_device_priv_data; |
| 1966 | + | |
| 1967 | + atomic_set(&mr_device_priv_data->r1_ldio_hint, | |
| 1968 | + instance->r1_ldio_hint_default); | |
| 1966 | 1969 | return 0; |
| 1967 | 1970 | } |
| 1968 | 1971 | |
| @@ -5034,10 +5037,12 @@ megasas_setup_irqs_msix(struct megasas_instance *instance, u8 is_probe) · 3065 unmodified lines | ||
| 5034 | 5037 | &instance->irq_context[j]); |
| 5035 | 5038 | /* Retry irq register for IO_APIC*/ |
| 5036 | 5039 | instance->msix_vectors = 0; |
| 5037 | − if (is_probe) | |
| 5040 | + if (is_probe) { | |
| 5041 | + pci_free_irq_vectors(instance->pdev); | |
| 5038 | 5042 | return megasas_setup_irqs_ioapic(instance); |
| 5039 | − else | |
| 5043 | + } else { | |
| 5040 | 5044 | return -1; |
| 5045 | + } | |
| 5041 | 5046 | } |
| 5042 | 5047 | } |
| 5043 | 5048 | return 0; |
| @@ -5277,9 +5282,11 @@ static int megasas_init_fw(struct megasas_instance *instance) · 233 unmodified lines | ||
| 5277 | 5282 | MPI2_REPLY_POST_HOST_INDEX_OFFSET); |
| 5278 | 5283 | } |
| 5279 | 5284 | |
| 5280 | − i = pci_alloc_irq_vectors(instance->pdev, 1, 1, PCI_IRQ_LEGACY); | |
| 5281 | − if (i < 0) | |
| 5282 | − goto fail_setup_irqs; | |
| 5285 | + if (!instance->msix_vectors) { | |
| 5286 | + i = pci_alloc_irq_vectors(instance->pdev, 1, 1, PCI_IRQ_LEGACY); | |
| 5287 | + if (i < 0) | |
| 5288 | + goto fail_setup_irqs; | |
| 5289 | + } | |
| 5283 | 5290 | |
| 5284 | 5291 | dev_info(&instance->pdev->dev, |
| 5285 | 5292 | "firmware supports msix\t: (%d)", fw_msix_count); |
| @@ -2159,7 +2159,7 @@ megasas_set_raidflag_cpu_affinity(union RAID_CONTEXT_UNION *praid_context, · 2158 unmodified lines | ||
| 2159 | 2159 | cpu_sel = MR_RAID_CTX_CPUSEL_1; |
| 2160 | 2160 | |
| 2161 | 2161 | if (is_stream_detected(rctx_g35) && |
| 2162 | − (raid->level == 5) && | |
| 2162 | + ((raid->level == 5) || (raid->level == 6)) && | |
| 2163 | 2163 | (raid->writeMode == MR_RL_WRITE_THROUGH_MODE) && |
| 2164 | 2164 | (cpu_sel == MR_RAID_CTX_CPUSEL_FCFS)) |
| 2165 | 2165 | cpu_sel = MR_RAID_CTX_CPUSEL_0; |
| @@ -2338,7 +2338,7 @@ megasas_build_ldio_fusion(struct megasas_instance *instance, · 172 unmodified lines | ||
| 2338 | 2338 | fp_possible = false; |
| 2339 | 2339 | atomic_dec(&instance->fw_outstanding); |
| 2340 | 2340 | } else if ((scsi_buff_len > MR_LARGE_IO_MIN_SIZE) || |
| 2341 | − atomic_dec_if_positive(&mrdev_priv->r1_ldio_hint)) { | |
| 2341 | + (atomic_dec_if_positive(&mrdev_priv->r1_ldio_hint) > 0)) { | |
| 2342 | 2342 | fp_possible = false; |
| 2343 | 2343 | atomic_dec(&instance->fw_outstanding); |
| 2344 | 2344 | if (scsi_buff_len > MR_LARGE_IO_MIN_SIZE) |
| @@ -1442,9 +1442,6 @@ void mpt3sas_transport_update_links(struct MPT3SAS_ADAPTER *ioc, · 1441 unmodified lines | ||
| 1442 | 1442 | u64 sas_address, u16 handle, u8 phy_number, u8 link_rate); |
| 1443 | 1443 | extern struct sas_function_template mpt3sas_transport_functions; |
| 1444 | 1444 | extern struct scsi_transport_template *mpt3sas_transport_template; |
| 1445 | −extern int scsi_internal_device_block(struct scsi_device *sdev); | |
| 1446 | −extern int scsi_internal_device_unblock(struct scsi_device *sdev, | |
| 1447 | − enum scsi_device_state new_state); | |
| 1448 | 1445 | /* trigger data externs */ |
| 1449 | 1446 | void mpt3sas_send_trigger_data_event(struct MPT3SAS_ADAPTER *ioc, |
| 1450 | 1447 | struct SL_WH_TRIGGERS_EVENT_DATA_T *event_data); |
| @@ -2859,7 +2859,7 @@ _scsih_internal_device_block(struct scsi_device *sdev, · 2858 unmodified lines | ||
| 2859 | 2859 | sas_device_priv_data->sas_target->handle); |
| 2860 | 2860 | sas_device_priv_data->block = 1; |
| 2861 | 2861 | |
| 2862 | − r = scsi_internal_device_block(sdev); | |
| 2862 | + r = scsi_internal_device_block(sdev, false); | |
| 2863 | 2863 | if (r == -EINVAL) |
| 2864 | 2864 | sdev_printk(KERN_WARNING, sdev, |
| 2865 | 2865 | "device_block failed with return(%d) for handle(0x%04x)\n", |
| @@ -2895,7 +2895,7 @@ _scsih_internal_device_unblock(struct scsi_device *sdev, · 29 unmodified lines | ||
| 2895 | 2895 | "performing a block followed by an unblock\n", |
| 2896 | 2896 | r, sas_device_priv_data->sas_target->handle); |
| 2897 | 2897 | sas_device_priv_data->block = 1; |
| 2898 | − r = scsi_internal_device_block(sdev); | |
| 2898 | + r = scsi_internal_device_block(sdev, false); | |
| 2899 | 2899 | if (r) |
| 2900 | 2900 | sdev_printk(KERN_WARNING, sdev, "retried device_block " |
| 2901 | 2901 | "failed with return(%d) for handle(0x%04x)\n", |
| @@ -4677,7 +4677,6 @@ _scsih_io_done(struct MPT3SAS_ADAPTER *ioc, u16 smid, u8 msix_index, u32 reply) · 1775 unmodified lines | ||
| 4677 | 4677 | struct MPT3SAS_DEVICE *sas_device_priv_data; |
| 4678 | 4678 | u32 response_code = 0; |
| 4679 | 4679 | unsigned long flags; |
| 4680 | − unsigned int sector_sz; | |
| 4681 | 4680 | |
| 4682 | 4681 | mpi_reply = mpt3sas_base_get_reply_virt_addr(ioc, reply); |
| 4683 | 4682 | |
| @@ -4742,20 +4741,6 @@ _scsih_io_done(struct MPT3SAS_ADAPTER *ioc, u16 smid, u8 msix_index, u32 reply) · 58 unmodified lines | ||
| 4742 | 4741 | } |
| 4743 | 4742 | |
| 4744 | 4743 | xfer_cnt = le32_to_cpu(mpi_reply->TransferCount); |
| 4745 | − | |
| 4746 | − /* In case of bogus fw or device, we could end up having | |
| 4747 | − * unaligned partial completion. We can force alignment here, | |
| 4748 | − * then scsi-ml does not need to handle this misbehavior. | |
| 4749 | − */ | |
| 4750 | − sector_sz = scmd->device->sector_size; | |
| 4751 | − if (unlikely(!blk_rq_is_passthrough(scmd->request) && sector_sz && | |
| 4752 | − xfer_cnt % sector_sz)) { | |
| 4753 | − sdev_printk(KERN_INFO, scmd->device, | |
| 4754 | − "unaligned partial completion avoided (xfer_cnt=%u, sector_sz=%u)\n", | |
| 4755 | − xfer_cnt, sector_sz); | |
| 4756 | − xfer_cnt = round_down(xfer_cnt, sector_sz); | |
| 4757 | − } | |
| 4758 | − | |
| 4759 | 4744 | scsi_set_resid(scmd, scsi_bufflen(scmd) - xfer_cnt); |
| 4760 | 4745 | if (ioc_status & MPI2_IOCSTATUS_FLAG_LOG_INFO_AVAILABLE) |
| 4761 | 4746 | log_info = le32_to_cpu(mpi_reply->IOCLogInfo); |
| @@ -81,14 +81,17 @@ struct qedf_dbg_ctx { · 80 unmodified lines | ||
| 81 | 81 | #define QEDF_INFO(pdev, level, fmt, ...) \ |
| 82 | 82 | qedf_dbg_info(pdev, __func__, __LINE__, level, fmt, \ |
| 83 | 83 | ## __VA_ARGS__) |
| 84 | − | |
| 85 | −extern void qedf_dbg_err(struct qedf_dbg_ctx *qedf, const char *func, u32 line, | |
| 84 | +__printf(4, 5) | |
| 85 | +void qedf_dbg_err(struct qedf_dbg_ctx *qedf, const char *func, u32 line, | |
| 86 | 86 | const char *fmt, ...); |
| 87 | −extern void qedf_dbg_warn(struct qedf_dbg_ctx *qedf, const char *func, u32 line, | |
| 87 | +__printf(4, 5) | |
| 88 | +void qedf_dbg_warn(struct qedf_dbg_ctx *qedf, const char *func, u32 line, | |
| 88 | 89 | const char *, ...); |
| 89 | −extern void qedf_dbg_notice(struct qedf_dbg_ctx *qedf, const char *func, | |
| 90 | +__printf(4, 5) | |
| 91 | +void qedf_dbg_notice(struct qedf_dbg_ctx *qedf, const char *func, | |
| 90 | 92 | u32 line, const char *, ...); |
| 91 | −extern void qedf_dbg_info(struct qedf_dbg_ctx *qedf, const char *func, u32 line, | |
| 93 | +__printf(5, 6) | |
| 94 | +void qedf_dbg_info(struct qedf_dbg_ctx *qedf, const char *func, u32 line, | |
| 92 | 95 | u32 info, const char *fmt, ...); |
| 93 | 96 | |
| 94 | 97 | /* GRC Dump related defines */ |
| @@ -203,7 +203,7 @@ void qedf_fip_recv(struct qedf_ctx *qedf, struct sk_buff *skb) · 202 unmodified lines | ||
| 203 | 203 | case FIP_DT_MAC: |
| 204 | 204 | mp = (struct fip_mac_desc *)desc; |
| 205 | 205 | QEDF_INFO(&(qedf->dbg_ctx), QEDF_LOG_LL2, |
| 206 | − "fd_mac=%pM.\n", __func__, mp->fd_mac); | |
| 206 | + "fd_mac=%pM\n", mp->fd_mac); | |
| 207 | 207 | ether_addr_copy(cvl_mac, mp->fd_mac); |
| 208 | 208 | break; |
| 209 | 209 | case FIP_DT_NAME: |
| @@ -1342,7 +1342,7 @@ void qedf_scsi_completion(struct qedf_ctx *qedf, struct fcoe_cqe *cqe, · 1341 unmodified lines | ||
| 1342 | 1342 | } else { |
| 1343 | 1343 | refcount = kref_read(&io_req->refcount); |
| 1344 | 1344 | QEDF_INFO(&(qedf->dbg_ctx), QEDF_LOG_IO, |
| 1345 | − "%d:0:%d:%d xid=0x%0x op=0x%02x " | |
| 1345 | + "%d:0:%d:%lld xid=0x%0x op=0x%02x " | |
| 1346 | 1346 | "lba=%02x%02x%02x%02x cdb_status=%d " |
| 1347 | 1347 | "fcp_resid=0x%x refcount=%d.\n", |
| 1348 | 1348 | qedf->lport->host->host_no, sc_cmd->device->id, |
| @@ -1426,7 +1426,7 @@ void qedf_scsi_done(struct qedf_ctx *qedf, struct qedf_ioreq *io_req, · 77 unmodified lines | ||
| 1426 | 1426 | |
| 1427 | 1427 | sc_cmd->result = result << 16; |
| 1428 | 1428 | refcount = kref_read(&io_req->refcount); |
| 1429 | − QEDF_INFO(&(qedf->dbg_ctx), QEDF_LOG_IO, "%d:0:%d:%d: Completing " | |
| 1429 | + QEDF_INFO(&(qedf->dbg_ctx), QEDF_LOG_IO, "%d:0:%d:%lld: Completing " | |
| 1430 | 1430 | "sc_cmd=%p result=0x%08x op=0x%02x lba=0x%02x%02x%02x%02x, " |
| 1431 | 1431 | "allowed=%d retries=%d refcount=%d.\n", |
| 1432 | 1432 | qedf->lport->host->host_no, sc_cmd->device->id, |
| @@ -2456,8 +2456,8 @@ static int qedf_alloc_bdq(struct qedf_ctx *qedf) · 2455 unmodified lines | ||
| 2456 | 2456 | } |
| 2457 | 2457 | |
| 2458 | 2458 | QEDF_INFO(&(qedf->dbg_ctx), QEDF_LOG_DISC, |
| 2459 | − "BDQ PBL addr=0x%p dma=0x%llx.\n", qedf->bdq_pbl, | |
| 2460 | − qedf->bdq_pbl_dma); | |
| 2459 | + "BDQ PBL addr=0x%p dma=%pad\n", | |
| 2460 | + qedf->bdq_pbl, &qedf->bdq_pbl_dma); | |
| 2461 | 2461 | |
| 2462 | 2462 | /* |
| 2463 | 2463 | * Populate BDQ PBL with physical and virtual address of individual |
| @@ -14,7 +14,7 @@ · 13 unmodified lines | ||
| 14 | 14 | #include <linux/debugfs.h> |
| 15 | 15 | #include <linux/module.h> |
| 16 | 16 | |
| 17 | −int do_not_recover; | |
| 17 | +int qedi_do_not_recover; | |
| 18 | 18 | static struct dentry *qedi_dbg_root; |
| 19 | 19 | |
| 20 | 20 | void |
| @@ -74,22 +74,22 @@ qedi_dbg_exit(void) · 53 unmodified lines | ||
| 74 | 74 | static ssize_t |
| 75 | 75 | qedi_dbg_do_not_recover_enable(struct qedi_dbg_ctx *qedi_dbg) |
| 76 | 76 | { |
| 77 | − if (!do_not_recover) | |
| 78 | − do_not_recover = 1; | |
| 77 | + if (!qedi_do_not_recover) | |
| 78 | + qedi_do_not_recover = 1; | |
| 79 | 79 | |
| 80 | 80 | QEDI_INFO(qedi_dbg, QEDI_LOG_DEBUGFS, "do_not_recover=%d\n", |
| 81 | − do_not_recover); | |
| 81 | + qedi_do_not_recover); | |
| 82 | 82 | return 0; |
| 83 | 83 | } |
| 84 | 84 | |
| 85 | 85 | static ssize_t |
| 86 | 86 | qedi_dbg_do_not_recover_disable(struct qedi_dbg_ctx *qedi_dbg) |
| 87 | 87 | { |
| 88 | − if (do_not_recover) | |
| 89 | − do_not_recover = 0; | |
| 88 | + if (qedi_do_not_recover) | |
| 89 | + qedi_do_not_recover = 0; | |
| 90 | 90 | |
| 91 | 91 | QEDI_INFO(qedi_dbg, QEDI_LOG_DEBUGFS, "do_not_recover=%d\n", |
| 92 | − do_not_recover); | |
| 92 | + qedi_do_not_recover); | |
| 93 | 93 | return 0; |
| 94 | 94 | } |
| 95 | 95 | |
| @@ -141,7 +141,7 @@ qedi_dbg_do_not_recover_cmd_read(struct file *filp, char __user *buffer, · 45 unmodified lines | ||
| 141 | 141 | if (*ppos) |
| 142 | 142 | return 0; |
| 143 | 143 | |
| 144 | − cnt = sprintf(buffer, "do_not_recover=%d\n", do_not_recover); | |
| 144 | + cnt = sprintf(buffer, "do_not_recover=%d\n", qedi_do_not_recover); | |
| 145 | 145 | cnt = min_t(int, count, cnt - *ppos); |
| 146 | 146 | *ppos += cnt; |
| 147 | 147 | return cnt; |
| @@ -1461,9 +1461,9 @@ static void qedi_tmf_work(struct work_struct *work) · 1460 unmodified lines | ||
| 1461 | 1461 | get_itt(tmf_hdr->rtt), get_itt(ctask->itt), cmd->task_id, |
| 1462 | 1462 | qedi_conn->iscsi_conn_id); |
| 1463 | 1463 | |
| 1464 | − if (do_not_recover) { | |
| 1464 | + if (qedi_do_not_recover) { | |
| 1465 | 1465 | QEDI_ERR(&qedi->dbg_ctx, "DONT SEND CLEANUP/ABORT %d\n", |
| 1466 | − do_not_recover); | |
| 1466 | + qedi_do_not_recover); | |
| 1467 | 1467 | goto abort_ret; |
| 1468 | 1468 | } |
| 1469 | 1469 | |
| @@ -12,8 +12,14 @@ · 11 unmodified lines | ||
| 12 | 12 | |
| 13 | 13 | #include "qedi_iscsi.h" |
| 14 | 14 | |
| 15 | +#ifdef CONFIG_DEBUG_FS | |
| 16 | +extern int qedi_do_not_recover; | |
| 17 | +#else | |
| 18 | +#define qedi_do_not_recover (0) | |
| 19 | +#endif | |
| 20 | + | |
| 15 | 21 | extern uint qedi_io_tracing; |
| 16 | −extern int do_not_recover; | |
| 22 | + | |
| 17 | 23 | extern struct scsi_host_template qedi_host_template; |
| 18 | 24 | extern struct iscsi_transport qedi_iscsi_transport; |
| 19 | 25 | extern const struct qed_iscsi_ops *qedi_ops; |
| @@ -833,7 +833,7 @@ qedi_ep_connect(struct Scsi_Host *shost, struct sockaddr *dst_addr, · 832 unmodified lines | ||
| 833 | 833 | return ERR_PTR(ret); |
| 834 | 834 | } |
| 835 | 835 | |
| 836 | − if (do_not_recover) { | |
| 836 | + if (qedi_do_not_recover) { | |
| 837 | 837 | ret = -ENOMEM; |
| 838 | 838 | return ERR_PTR(ret); |
| 839 | 839 | } |
| @@ -957,7 +957,7 @@ static int qedi_ep_poll(struct iscsi_endpoint *ep, int timeout_ms) · 117 unmodified lines | ||
| 957 | 957 | struct qedi_endpoint *qedi_ep; |
| 958 | 958 | int ret = 0; |
| 959 | 959 | |
| 960 | − if (do_not_recover) | |
| 960 | + if (qedi_do_not_recover) | |
| 961 | 961 | return 1; |
| 962 | 962 | |
| 963 | 963 | qedi_ep = ep->dd_data; |
| @@ -1025,7 +1025,7 @@ static void qedi_ep_disconnect(struct iscsi_endpoint *ep) · 61 unmodified lines | ||
| 1025 | 1025 | } |
| 1026 | 1026 | |
| 1027 | 1027 | if (test_bit(QEDI_IN_RECOVERY, &qedi->flags)) { |
| 1028 | − if (do_not_recover) { | |
| 1028 | + if (qedi_do_not_recover) { | |
| 1029 | 1029 | QEDI_INFO(&qedi->dbg_ctx, QEDI_LOG_INFO, |
| 1030 | 1030 | "Do not recover cid=0x%x\n", |
| 1031 | 1031 | qedi_ep->iscsi_cid); |
| @@ -1039,7 +1039,7 @@ static void qedi_ep_disconnect(struct iscsi_endpoint *ep) · 7 unmodified lines | ||
| 1039 | 1039 | } |
| 1040 | 1040 | } |
| 1041 | 1041 | |
| 1042 | − if (do_not_recover) | |
| 1042 | + if (qedi_do_not_recover) | |
| 1043 | 1043 | goto ep_exit_recover; |
| 1044 | 1044 | |
| 1045 | 1045 | switch (qedi_ep->state) { |
| @@ -1805,7 +1805,7 @@ static int __qedi_probe(struct pci_dev *pdev, int mode) · 1804 unmodified lines | ||
| 1805 | 1805 | */ |
| 1806 | 1806 | qedi_ops->common->update_pf_params(qedi->cdev, &qedi->pf_params); |
| 1807 | 1807 | |
| 1808 | − qedi_setup_int(qedi); | |
| 1808 | + rc = qedi_setup_int(qedi); | |
| 1809 | 1809 | if (rc) |
| 1810 | 1810 | goto stop_iscsi_func; |
| 1811 | 1811 | |
| @@ -3,6 +3,7 @@ config SCSI_QLA_FC · 2 unmodified lines | ||
| 3 | 3 | depends on PCI && SCSI |
| 4 | 4 | depends on SCSI_FC_ATTRS |
| 5 | 5 | select FW_LOADER |
| 6 | + select BTREE | |
| 6 | 7 | ---help--- |
| 7 | 8 | This qla2xxx driver supports all QLogic Fibre Channel |
| 8 | 9 | PCI and PCIe host adapters. |
| @@ -2154,8 +2154,6 @@ qla24xx_vport_delete(struct fc_vport *fc_vport) · 2153 unmodified lines | ||
| 2154 | 2154 | "Timer for the VP[%d] has stopped\n", vha->vp_idx); |
| 2155 | 2155 | } |
| 2156 | 2156 | |
| 2157 | − BUG_ON(atomic_read(&vha->vref_count)); | |
| 2158 | − | |
| 2159 | 2157 | qla2x00_free_fcports(vha); |
| 2160 | 2158 | |
| 2161 | 2159 | mutex_lock(&ha->vport_lock); |
| @@ -2166,7 +2164,7 @@ qla24xx_vport_delete(struct fc_vport *fc_vport) · 4 unmodified lines | ||
| 2166 | 2164 | dma_free_coherent(&ha->pdev->dev, vha->gnl.size, vha->gnl.l, |
| 2167 | 2165 | vha->gnl.ldma); |
| 2168 | 2166 | |
| 2169 | − if (vha->qpair->vp_idx == vha->vp_idx) { | |
| 2167 | + if (vha->qpair && vha->qpair->vp_idx == vha->vp_idx) { | |
| 2170 | 2168 | if (qla2xxx_delete_qpair(vha, vha->qpair) != QLA_SUCCESS) |
| 2171 | 2169 | ql_log(ql_log_warn, vha, 0x7087, |
| 2172 | 2170 | "Queue Pair delete failed.\n"); |
| @@ -2707,13 +2707,9 @@ ql_dump_buffer(uint32_t level, scsi_qla_host_t *vha, int32_t id, · 2706 unmodified lines | ||
| 2707 | 2707 | "%-+5d 0 1 2 3 4 5 6 7 8 9 A B C D E F\n", size); |
| 2708 | 2708 | ql_dbg(level, vha, id, |
| 2709 | 2709 | "----- -----------------------------------------------\n"); |
| 2710 | − for (cnt = 0; cnt < size; cnt++, buf++) { | |
| 2711 | − if (cnt % 16 == 0) | |
| 2712 | − ql_dbg(level, vha, id, "%04x:", cnt & ~0xFU); | |
| 2713 | − printk(" %02x", *buf); | |
| 2714 | − if (cnt % 16 == 15) | |
| 2715 | − printk("\n"); | |
| 2710 | + for (cnt = 0; cnt < size; cnt += 16) { | |
| 2711 | + ql_dbg(level, vha, id, "%04x: ", cnt); | |
| 2712 | + print_hex_dump(KERN_CONT, "", DUMP_PREFIX_NONE, 16, 1, | |
| 2713 | + buf + cnt, min(16U, size - cnt), false); | |
| 2716 | 2714 | } |
| 2717 | − if (cnt % 16 != 0) | |
| 2718 | − printk("\n"); | |
| 2719 | 2715 | } |
| @@ -348,6 +348,7 @@ ql_log_pci(uint32_t, struct pci_dev *pdev, int32_t, const char *fmt, ...); · 347 unmodified lines | ||
| 348 | 348 | #define ql_dbg_tgt 0x00004000 /* Target mode */ |
| 349 | 349 | #define ql_dbg_tgt_mgt 0x00002000 /* Target mode management */ |
| 350 | 350 | #define ql_dbg_tgt_tmr 0x00001000 /* Target mode task management */ |
| 351 | +#define ql_dbg_tgt_dif 0x00000800 /* Target mode dif */ | |
| 351 | 352 | |
| 352 | 353 | extern int qla27xx_dump_mpi_ram(struct qla_hw_data *, uint32_t, uint32_t *, |
| 353 | 354 | uint32_t, void **); |
| @@ -25,6 +25,7 @@ · 24 unmodified lines | ||
| 25 | 25 | #include <linux/firmware.h> |
| 26 | 26 | #include <linux/aer.h> |
| 27 | 27 | #include <linux/mutex.h> |
| 28 | +#include <linux/btree.h> | |
| 28 | 29 | |
| 29 | 30 | #include <scsi/scsi.h> |
| 30 | 31 | #include <scsi/scsi_host.h> |
| @@ -395,11 +396,15 @@ struct srb_iocb { · 364 unmodified lines | ||
| 395 | 396 | struct completion comp; |
| 396 | 397 | } abt; |
| 397 | 398 | struct ct_arg ctarg; |
| 399 | +#define MAX_IOCB_MB_REG 28 | |
| 400 | +#define SIZEOF_IOCB_MB_REG (MAX_IOCB_MB_REG * sizeof(uint16_t)) | |
| 398 | 401 | struct { |
| 399 | − __le16 in_mb[28]; /* fr fw */ | |
| 400 | − __le16 out_mb[28]; /* to fw */ | |
| 402 | + __le16 in_mb[MAX_IOCB_MB_REG]; /* from FW */ | |
| 403 | + __le16 out_mb[MAX_IOCB_MB_REG]; /* to FW */ | |
| 401 | 404 | void *out, *in; |
| 402 | 405 | dma_addr_t out_dma, in_dma; |
| 406 | + struct completion comp; | |
| 407 | + int rc; | |
| 403 | 408 | } mbx; |
| 404 | 409 | struct { |
| 405 | 410 | struct imm_ntfy_from_isp *ntfy; |
| @@ -437,7 +442,7 @@ typedef struct srb { · 31 unmodified lines | ||
| 437 | 442 | uint32_t handle; |
| 438 | 443 | uint16_t flags; |
| 439 | 444 | uint16_t type; |
| 440 | − char *name; | |
| 445 | + const char *name; | |
| 441 | 446 | int iocbs; |
| 442 | 447 | struct qla_qpair *qpair; |
| 443 | 448 | u32 gen1; /* scratch */ |
| @@ -2300,6 +2305,8 @@ typedef struct fc_port { · 1856 unmodified lines | ||
| 2300 | 2305 | struct ct_sns_desc ct_desc; |
| 2301 | 2306 | enum discovery_state disc_state; |
| 2302 | 2307 | enum login_state fw_login_state; |
| 2308 | + unsigned long plogi_nack_done_deadline; | |
| 2309 | + | |
| 2303 | 2310 | u32 login_gen, last_login_gen; |
| 2304 | 2311 | u32 rscn_gen, last_rscn_gen; |
| 2305 | 2312 | u32 chip_reset; |
| @@ -3106,6 +3113,16 @@ struct qla_chip_state_84xx { · 800 unmodified lines | ||
| 3106 | 3113 | uint32_t gold_fw_version; |
| 3107 | 3114 | }; |
| 3108 | 3115 | |
| 3116 | +struct qla_dif_statistics { | |
| 3117 | + uint64_t dif_input_bytes; | |
| 3118 | + uint64_t dif_output_bytes; | |
| 3119 | + uint64_t dif_input_requests; | |
| 3120 | + uint64_t dif_output_requests; | |
| 3121 | + uint32_t dif_guard_err; | |
| 3122 | + uint32_t dif_ref_tag_err; | |
| 3123 | + uint32_t dif_app_tag_err; | |
| 3124 | +}; | |
| 3125 | + | |
| 3109 | 3126 | struct qla_statistics { |
| 3110 | 3127 | uint32_t total_isp_aborts; |
| 3111 | 3128 | uint64_t input_bytes; |
| @@ -3118,6 +3135,8 @@ struct qla_statistics { · 6 unmodified lines | ||
| 3118 | 3135 | uint32_t stat_max_pend_cmds; |
| 3119 | 3136 | uint32_t stat_max_qfull_cmds_alloc; |
| 3120 | 3137 | uint32_t stat_max_qfull_cmds_dropped; |
| 3138 | + | |
| 3139 | + struct qla_dif_statistics qla_dif_stats; | |
| 3121 | 3140 | }; |
| 3122 | 3141 | |
| 3123 | 3142 | struct bidi_statistics { |
| @@ -3125,6 +3144,16 @@ struct bidi_statistics { · 1 unmodified line | ||
| 3125 | 3144 | unsigned long long transfer_bytes; |
| 3126 | 3145 | }; |
| 3127 | 3146 | |
| 3147 | +struct qla_tc_param { | |
| 3148 | + struct scsi_qla_host *vha; | |
| 3149 | + uint32_t blk_sz; | |
| 3150 | + uint32_t bufflen; | |
| 3151 | + struct scatterlist *sg; | |
| 3152 | + struct scatterlist *prot_sg; | |
| 3153 | + struct crc_context *ctx; | |
| 3154 | + uint8_t *ctx_dsd_alloced; | |
| 3155 | +}; | |
| 3156 | + | |
| 3128 | 3157 | /* Multi queue support */ |
| 3129 | 3158 | #define MBC_INITIALIZE_MULTIQ 0x1f |
| 3130 | 3159 | #define QLA_QUE_PAGE 0X1000 |
| @@ -3272,6 +3301,8 @@ struct qlt_hw_data { · 141 unmodified lines | ||
| 3272 | 3301 | uint8_t tgt_node_name[WWN_SIZE]; |
| 3273 | 3302 | |
| 3274 | 3303 | struct dentry *dfs_tgt_sess; |
| 3304 | + struct dentry *dfs_tgt_port_database; | |
| 3305 | + | |
| 3275 | 3306 | struct list_head q_full_list; |
| 3276 | 3307 | uint32_t num_pend_cmds; |
| 3277 | 3308 | uint32_t num_qfull_cmds_alloc; |
| @@ -3281,6 +3312,7 @@ struct qlt_hw_data { · 3 unmodified lines | ||
| 3281 | 3312 | spinlock_t sess_lock; |
| 3282 | 3313 | int rspq_vector_cpuid; |
| 3283 | 3314 | spinlock_t atio_lock ____cacheline_aligned; |
| 3315 | + struct btree_head32 host_map; | |
| 3284 | 3316 | }; |
| 3285 | 3317 | |
| 3286 | 3318 | #define MAX_QFULL_CMDS_ALLOC 8192 |
| @@ -3290,6 +3322,10 @@ struct qlt_hw_data { · 3 unmodified lines | ||
| 3290 | 3322 | |
| 3291 | 3323 | #define LEAK_EXCHG_THRESH_HOLD_PERCENT 75 /* 75 percent */ |
| 3292 | 3324 | |
| 3325 | +#define QLA_EARLY_LINKUP(_ha) \ | |
| 3326 | + ((_ha->flags.n2n_ae || _ha->flags.lip_ae) && \ | |
| 3327 | + _ha->flags.fw_started && !_ha->flags.fw_init_done) | |
| 3328 | + | |
| 3293 | 3329 | /* |
| 3294 | 3330 | * Qlogic host adapter specific data structure. |
| 3295 | 3331 | */ |
| @@ -3339,7 +3375,11 @@ struct qla_hw_data { · 43 unmodified lines | ||
| 3339 | 3375 | uint32_t fawwpn_enabled:1; |
| 3340 | 3376 | uint32_t exlogins_enabled:1; |
| 3341 | 3377 | uint32_t exchoffld_enabled:1; |
| 3342 | − /* 35 bits */ | |
| 3378 | + | |
| 3379 | + uint32_t lip_ae:1; | |
| 3380 | + uint32_t n2n_ae:1; | |
| 3381 | + uint32_t fw_started:1; | |
| 3382 | + uint32_t fw_init_done:1; | |
| 3343 | 3383 | } flags; |
| 3344 | 3384 | |
| 3345 | 3385 | /* This spinlock is used to protect "io transactions", you must |
| @@ -3432,7 +3472,6 @@ struct qla_hw_data { · 86 unmodified lines | ||
| 3432 | 3472 | #define P2P_LOOP 3 |
| 3433 | 3473 | uint8_t interrupts_on; |
| 3434 | 3474 | uint32_t isp_abort_cnt; |
| 3435 | − | |
| 3436 | 3475 | #define PCI_DEVICE_ID_QLOGIC_ISP2532 0x2532 |
| 3437 | 3476 | #define PCI_DEVICE_ID_QLOGIC_ISP8432 0x8432 |
| 3438 | 3477 | #define PCI_DEVICE_ID_QLOGIC_ISP8001 0x8001 |
| @@ -3913,6 +3952,7 @@ typedef struct scsi_qla_host { · 474 unmodified lines | ||
| 3913 | 3952 | struct list_head vp_fcports; /* list of fcports */ |
| 3914 | 3953 | struct list_head work_list; |
| 3915 | 3954 | spinlock_t work_lock; |
| 3955 | + struct work_struct iocb_work; | |
| 3916 | 3956 | |
| 3917 | 3957 | /* Commonly used flags and state information. */ |
| 3918 | 3958 | struct Scsi_Host *host; |
| @@ -4076,6 +4116,7 @@ typedef struct scsi_qla_host { · 157 unmodified lines | ||
| 4076 | 4116 | /* Count of active session/fcport */ |
| 4077 | 4117 | int fcport_count; |
| 4078 | 4118 | wait_queue_head_t fcport_waitQ; |
| 4119 | + wait_queue_head_t vref_waitq; | |
| 4079 | 4120 | } scsi_qla_host_t; |
| 4080 | 4121 | |
| 4081 | 4122 | struct qla27xx_image_status { |
| @@ -4131,14 +4172,17 @@ struct qla2_sgx { · 49 unmodified lines | ||
| 4131 | 4172 | mb(); \ |
| 4132 | 4173 | if (__vha->flags.delete_progress) { \ |
| 4133 | 4174 | atomic_dec(&__vha->vref_count); \ |
| 4175 | + wake_up(&__vha->vref_waitq); \ | |
| 4134 | 4176 | __bail = 1; \ |
| 4135 | 4177 | } else { \ |
| 4136 | 4178 | __bail = 0; \ |
| 4137 | 4179 | } \ |
| 4138 | 4180 | } while (0) |
| 4139 | 4181 | |
| 4140 | −#define QLA_VHA_MARK_NOT_BUSY(__vha) \ | |
| 4182 | +#define QLA_VHA_MARK_NOT_BUSY(__vha) do { \ | |
| 4141 | 4183 | atomic_dec(&__vha->vref_count); \ |
| 4184 | + wake_up(&__vha->vref_waitq); \ | |
| 4185 | +} while (0) \ | |
| 4142 | 4186 | |
| 4143 | 4187 | #define QLA_QPAIR_MARK_BUSY(__qpair, __bail) do { \ |
| 4144 | 4188 | atomic_inc(&__qpair->ref_count); \ |
| @@ -19,11 +19,11 @@ qla2x00_dfs_tgt_sess_show(struct seq_file *s, void *unused) · 18 unmodified lines | ||
| 19 | 19 | struct qla_hw_data *ha = vha->hw; |
| 20 | 20 | unsigned long flags; |
| 21 | 21 | struct fc_port *sess = NULL; |
| 22 | − struct qla_tgt *tgt= vha->vha_tgt.qla_tgt; | |
| 22 | + struct qla_tgt *tgt = vha->vha_tgt.qla_tgt; | |
| 23 | 23 | |
| 24 | − seq_printf(s, "%s\n",vha->host_str); | |
| 24 | + seq_printf(s, "%s\n", vha->host_str); | |
| 25 | 25 | if (tgt) { |
| 26 | − seq_printf(s, "Port ID Port Name Handle\n"); | |
| 26 | + seq_puts(s, "Port ID Port Name Handle\n"); | |
| 27 | 27 | |
| 28 | 28 | spin_lock_irqsave(&ha->tgt.sess_lock, flags); |
| 29 | 29 | list_for_each_entry(sess, &vha->vp_fcports, list) |
| @@ -44,7 +44,6 @@ qla2x00_dfs_tgt_sess_open(struct inode *inode, struct file *file) · 14 unmodified lines | ||
| 44 | 44 | return single_open(file, qla2x00_dfs_tgt_sess_show, vha); |
| 45 | 45 | } |
| 46 | 46 | |
| 47 | − | |
| 48 | 47 | static const struct file_operations dfs_tgt_sess_ops = { |
| 49 | 48 | .open = qla2x00_dfs_tgt_sess_open, |
| 50 | 49 | .read = seq_read, |
| @@ -52,6 +51,78 @@ static const struct file_operations dfs_tgt_sess_ops = { · 1 unmodified line | ||
| 52 | 51 | .release = single_release, |
| 53 | 52 | }; |
| 54 | 53 | |
| 54 | +static int | |
| 55 | +qla2x00_dfs_tgt_port_database_show(struct seq_file *s, void *unused) | |
| 56 | +{ | |
| 57 | + scsi_qla_host_t *vha = s->private; | |
| 58 | + struct qla_hw_data *ha = vha->hw; | |
| 59 | + struct gid_list_info *gid_list; | |
| 60 | + dma_addr_t gid_list_dma; | |
| 61 | + fc_port_t fc_port; | |
| 62 | + char *id_iter; | |
| 63 | + int rc, i; | |
| 64 | + uint16_t entries, loop_id; | |
| 65 | + struct qla_tgt *tgt = vha->vha_tgt.qla_tgt; | |
| 66 | + | |
| 67 | + seq_printf(s, "%s\n", vha->host_str); | |
| 68 | + if (tgt) { | |
| 69 | + gid_list = dma_alloc_coherent(&ha->pdev->dev, | |
| 70 | + qla2x00_gid_list_size(ha), | |
| 71 | + &gid_list_dma, GFP_KERNEL); | |
| 72 | + if (!gid_list) { | |
| 73 | + ql_dbg(ql_dbg_user, vha, 0x705c, | |
| 74 | + "DMA allocation failed for %u\n", | |
| 75 | + qla2x00_gid_list_size(ha)); | |
| 76 | + return 0; | |
| 77 | + } | |
| 78 | + | |
| 79 | + rc = qla24xx_gidlist_wait(vha, gid_list, gid_list_dma, | |
| 80 | + &entries); | |
| 81 | + if (rc != QLA_SUCCESS) | |
| 82 | + goto out_free_id_list; | |
| 83 | + | |
| 84 | + id_iter = (char *)gid_list; | |
| 85 | + | |
| 86 | + seq_puts(s, "Port Name Port ID Loop ID\n"); | |
| 87 | + | |
| 88 | + for (i = 0; i < entries; i++) { | |
| 89 | + struct gid_list_info *gid = | |
| 90 | + (struct gid_list_info *)id_iter; | |
| 91 | + loop_id = le16_to_cpu(gid->loop_id); | |
| 92 | + memset(&fc_port, 0, sizeof(fc_port_t)); | |
| 93 | + | |
| 94 | + fc_port.loop_id = loop_id; | |
| 95 | + | |
| 96 | + rc = qla24xx_gpdb_wait(vha, &fc_port, 0); | |
| 97 | + seq_printf(s, "%8phC %02x%02x%02x %d\n", | |
| 98 | + fc_port.port_name, fc_port.d_id.b.domain, | |
| 99 | + fc_port.d_id.b.area, fc_port.d_id.b.al_pa, | |
| 100 | + fc_port.loop_id); | |
| 101 | + id_iter += ha->gid_list_info_size; | |
| 102 | + } | |
| 103 | +out_free_id_list: | |
| 104 | + dma_free_coherent(&ha->pdev->dev, qla2x00_gid_list_size(ha), | |
| 105 | + gid_list, gid_list_dma); | |
| 106 | + } | |
| 107 | + | |
| 108 | + return 0; | |
| 109 | +} | |
| 110 | + | |
| 111 | +static int | |
| 112 | +qla2x00_dfs_tgt_port_database_open(struct inode *inode, struct file *file) | |
| 113 | +{ | |
| 114 | + scsi_qla_host_t *vha = inode->i_private; | |
| 115 | + | |
| 116 | + return single_open(file, qla2x00_dfs_tgt_port_database_show, vha); | |
| 117 | +} | |
| 118 | + | |
| 119 | +static const struct file_operations dfs_tgt_port_database_ops = { | |
| 120 | + .open = qla2x00_dfs_tgt_port_database_open, | |
| 121 | + .read = seq_read, | |
| 122 | + .llseek = seq_lseek, | |
| 123 | + .release = single_release, | |
| 124 | +}; | |
| 125 | + | |
| 55 | 126 | static int |
| 56 | 127 | qla_dfs_fw_resource_cnt_show(struct seq_file *s, void *unused) |
| 57 | 128 | { |
| @@ -114,6 +185,21 @@ qla_dfs_tgt_counters_show(struct seq_file *s, void *unused) · 56 unmodified lines | ||
| 114 | 185 | seq_printf(s, "num Q full sent = %lld\n", |
| 115 | 186 | vha->tgt_counters.num_q_full_sent); |
| 116 | 187 | |
| 188 | + /* DIF stats */ | |
| 189 | + seq_printf(s, "DIF Inp Bytes = %lld\n", | |
| 190 | + vha->qla_stats.qla_dif_stats.dif_input_bytes); | |
| 191 | + seq_printf(s, "DIF Outp Bytes = %lld\n", | |
| 192 | + vha->qla_stats.qla_dif_stats.dif_output_bytes); | |
| 193 | + seq_printf(s, "DIF Inp Req = %lld\n", | |
| 194 | + vha->qla_stats.qla_dif_stats.dif_input_requests); | |
| 195 | + seq_printf(s, "DIF Outp Req = %lld\n", | |
| 196 | + vha->qla_stats.qla_dif_stats.dif_output_requests); | |
| 197 | + seq_printf(s, "DIF Guard err = %d\n", | |
| 198 | + vha->qla_stats.qla_dif_stats.dif_guard_err); | |
| 199 | + seq_printf(s, "DIF Ref tag err = %d\n", | |
| 200 | + vha->qla_stats.qla_dif_stats.dif_ref_tag_err); | |
| 201 | + seq_printf(s, "DIF App tag err = %d\n", | |
| 202 | + vha->qla_stats.qla_dif_stats.dif_app_tag_err); | |
| 117 | 203 | return 0; |
| 118 | 204 | } |
| 119 | 205 | |
| @@ -281,6 +367,14 @@ create_nodes: · 161 unmodified lines | ||
| 281 | 367 | goto out; |
| 282 | 368 | } |
| 283 | 369 | |
| 370 | + ha->tgt.dfs_tgt_port_database = debugfs_create_file("tgt_port_database", | |
| 371 | + S_IRUSR, ha->dfs_dir, vha, &dfs_tgt_port_database_ops); | |
| 372 | + if (!ha->tgt.dfs_tgt_port_database) { | |
| 373 | + ql_log(ql_log_warn, vha, 0xffff, | |
| 374 | + "Unable to create debugFS tgt_port_database node.\n"); | |
| 375 | + goto out; | |
| 376 | + } | |
| 377 | + | |
| 284 | 378 | ha->dfs_fce = debugfs_create_file("fce", S_IRUSR, ha->dfs_dir, vha, |
| 285 | 379 | &dfs_fce_ops); |
| 286 | 380 | if (!ha->dfs_fce) { |
| @@ -311,6 +405,11 @@ qla2x00_dfs_remove(scsi_qla_host_t *vha) · 24 unmodified lines | ||
| 311 | 405 | ha->tgt.dfs_tgt_sess = NULL; |
| 312 | 406 | } |
| 313 | 407 | |
| 408 | + if (ha->tgt.dfs_tgt_port_database) { | |
| 409 | + debugfs_remove(ha->tgt.dfs_tgt_port_database); | |
| 410 | + ha->tgt.dfs_tgt_port_database = NULL; | |
| 411 | + } | |
| 412 | + | |
| 314 | 413 | if (ha->dfs_fw_resource_cnt) { |
| 315 | 414 | debugfs_remove(ha->dfs_fw_resource_cnt); |
| 316 | 415 | ha->dfs_fw_resource_cnt = NULL; |
| @@ -193,6 +193,7 @@ extern int qla24xx_post_upd_fcport_work(struct scsi_qla_host *, fc_port_t *); · 192 unmodified lines | ||
| 193 | 193 | void qla2x00_handle_login_done_event(struct scsi_qla_host *, fc_port_t *, |
| 194 | 194 | uint16_t *); |
| 195 | 195 | int qla24xx_post_gnl_work(struct scsi_qla_host *, fc_port_t *); |
| 196 | +int qla24xx_async_abort_cmd(srb_t *); | |
| 196 | 197 | |
| 197 | 198 | /* |
| 198 | 199 | * Global Functions in qla_mid.c source file. |
| @@ -256,11 +257,11 @@ extern unsigned long qla2x00_get_async_timeout(struct scsi_qla_host *); · 57 unmodified lines | ||
| 256 | 257 | extern void *qla2x00_alloc_iocbs(scsi_qla_host_t *, srb_t *); |
| 257 | 258 | extern int qla2x00_issue_marker(scsi_qla_host_t *, int); |
| 258 | 259 | extern int qla24xx_walk_and_build_sglist_no_difb(struct qla_hw_data *, srb_t *, |
| 259 | − uint32_t *, uint16_t, struct qla_tgt_cmd *); | |
| 260 | + uint32_t *, uint16_t, struct qla_tc_param *); | |
| 260 | 261 | extern int qla24xx_walk_and_build_sglist(struct qla_hw_data *, srb_t *, |
| 261 | − uint32_t *, uint16_t, struct qla_tgt_cmd *); | |
| 262 | + uint32_t *, uint16_t, struct qla_tc_param *); | |
| 262 | 263 | extern int qla24xx_walk_and_build_prot_sglist(struct qla_hw_data *, srb_t *, |
| 263 | − uint32_t *, uint16_t, struct qla_tgt_cmd *); | |
| 264 | + uint32_t *, uint16_t, struct qla_tc_param *); | |
| 264 | 265 | extern int qla24xx_get_one_block_sg(uint32_t, struct qla2_sgx *, uint32_t *); |
| 265 | 266 | extern int qla24xx_configure_prot_mode(srb_t *, uint16_t *); |
| 266 | 267 | extern int qla24xx_build_scsi_crc_2_iocbs(srb_t *, |
| @@ -368,7 +369,7 @@ qla2x00_get_link_status(scsi_qla_host_t *, uint16_t, struct link_statistics *, · 101 unmodified lines | ||
| 368 | 369 | |
| 369 | 370 | extern int |
| 370 | 371 | qla24xx_get_isp_stats(scsi_qla_host_t *, struct link_statistics *, |
| 371 | − dma_addr_t, uint); | |
| 372 | + dma_addr_t, uint16_t); | |
| 372 | 373 | |
| 373 | 374 | extern int qla24xx_abort_command(srb_t *); |
| 374 | 375 | extern int qla24xx_async_abort_command(srb_t *); |
| @@ -472,6 +473,13 @@ qla2x00_dump_mctp_data(scsi_qla_host_t *, dma_addr_t, uint32_t, uint32_t); · 97 unmodified lines | ||
| 472 | 473 | extern int |
| 473 | 474 | qla26xx_dport_diagnostics(scsi_qla_host_t *, void *, uint, uint); |
| 474 | 475 | |
| 476 | +int qla24xx_send_mb_cmd(struct scsi_qla_host *, mbx_cmd_t *); | |
| 477 | +int qla24xx_gpdb_wait(struct scsi_qla_host *, fc_port_t *, u8); | |
| 478 | +int qla24xx_gidlist_wait(struct scsi_qla_host *, void *, dma_addr_t, | |
| 479 | + uint16_t *); | |
| 480 | +int __qla24xx_parse_gpdb(struct scsi_qla_host *, fc_port_t *, | |
| 481 | + struct port_database_24xx *); | |
| 482 | + | |
| 475 | 483 | /* |
| 476 | 484 | * Global Function Prototypes in qla_isr.c source file. |
| 477 | 485 | */ |
| @@ -846,5 +854,7 @@ extern struct fc_port *qlt_find_sess_invalidate_other(scsi_qla_host_t *, · 368 unmodified lines | ||
| 846 | 854 | uint64_t wwn, port_id_t port_id, uint16_t loop_id, struct fc_port **); |
| 847 | 855 | void qla24xx_delete_sess_fn(struct work_struct *); |
| 848 | 856 | void qlt_unknown_atio_work_fn(struct work_struct *); |
| 857 | +void qlt_update_host_map(struct scsi_qla_host *, port_id_t); | |
| 858 | +void qlt_remove_target_resources(struct qla_hw_data *); | |
| 849 | 859 | |
| 850 | 860 | #endif /* _QLA_GBL_H */ |
| @@ -629,7 +629,6 @@ void qla24xx_async_gpdb_sp_done(void *s, int res) · 628 unmodified lines | ||
| 629 | 629 | struct srb *sp = s; |
| 630 | 630 | struct scsi_qla_host *vha = sp->vha; |
| 631 | 631 | struct qla_hw_data *ha = vha->hw; |
| 632 | − uint64_t zero = 0; | |
| 633 | 632 | struct port_database_24xx *pd; |
| 634 | 633 | fc_port_t *fcport = sp->fcport; |
| 635 | 634 | u16 *mb = sp->u.iocb_cmd.u.mbx.in_mb; |
| @@ -649,48 +648,7 @@ void qla24xx_async_gpdb_sp_done(void *s, int res) · 13 unmodified lines | ||
| 649 | 648 | |
| 650 | 649 | pd = (struct port_database_24xx *)sp->u.iocb_cmd.u.mbx.in; |
| 651 | 650 | |
| 652 | − /* Check for logged in state. */ | |
| 653 | − if (pd->current_login_state != PDS_PRLI_COMPLETE && | |
| 654 | − pd->last_login_state != PDS_PRLI_COMPLETE) { | |
| 655 | − ql_dbg(ql_dbg_mbx, vha, 0xffff, | |
| 656 | − "Unable to verify login-state (%x/%x) for " | |
| 657 | − "loop_id %x.\n", pd->current_login_state, | |
| 658 | − pd->last_login_state, fcport->loop_id); | |
| 659 | − rval = QLA_FUNCTION_FAILED; | |
| 660 | − goto gpd_error_out; | |
| 661 | − } | |
| 662 | − | |
| 663 | − if (fcport->loop_id == FC_NO_LOOP_ID || | |
| 664 | − (memcmp(fcport->port_name, (uint8_t *)&zero, 8) && | |
| 665 | − memcmp(fcport->port_name, pd->port_name, 8))) { | |
| 666 | − /* We lost the device mid way. */ | |
| 667 | − rval = QLA_NOT_LOGGED_IN; | |
| 668 | − goto gpd_error_out; | |
| 669 | − } | |
| 670 | − | |
| 671 | − /* Names are little-endian. */ | |
| 672 | − memcpy(fcport->node_name, pd->node_name, WWN_SIZE); | |
| 673 | − | |
| 674 | − /* Get port_id of device. */ | |
| 675 | − fcport->d_id.b.domain = pd->port_id[0]; | |
| 676 | − fcport->d_id.b.area = pd->port_id[1]; | |
| 677 | − fcport->d_id.b.al_pa = pd->port_id[2]; | |
| 678 | − fcport->d_id.b.rsvd_1 = 0; | |
| 679 | − | |
| 680 | − /* If not target must be initiator or unknown type. */ | |
| 681 | − if ((pd->prli_svc_param_word_3[0] & BIT_4) == 0) | |
| 682 | − fcport->port_type = FCT_INITIATOR; | |
| 683 | − else | |
| 684 | − fcport->port_type = FCT_TARGET; | |
| 685 | − | |
| 686 | − /* Passback COS information. */ | |
| 687 | − fcport->supported_classes = (pd->flags & PDF_CLASS_2) ? | |
| 688 | − FC_COS_CLASS2 : FC_COS_CLASS3; | |
| 689 | − | |
| 690 | − if (pd->prli_svc_param_word_3[0] & BIT_7) { | |
| 691 | − fcport->flags |= FCF_CONF_COMP_SUPPORTED; | |
| 692 | − fcport->conf_compl_supported = 1; | |
| 693 | − } | |
| 651 | + rval = __qla24xx_parse_gpdb(vha, fcport, pd); | |
| 694 | 652 | |
| 695 | 653 | gpd_error_out: |
| 696 | 654 | memset(&ea, 0, sizeof(ea)); |
| @@ -876,10 +834,14 @@ int qla24xx_fcport_handle_login(struct scsi_qla_host *vha, fc_port_t *fcport) · 179 unmodified lines | ||
| 876 | 834 | fcport->login_retry--; |
| 877 | 835 | |
| 878 | 836 | if ((fcport->fw_login_state == DSC_LS_PLOGI_PEND) || |
| 879 | − (fcport->fw_login_state == DSC_LS_PLOGI_COMP) || | |
| 880 | 837 | (fcport->fw_login_state == DSC_LS_PRLI_PEND)) |
| 881 | 838 | return 0; |
| 882 | 839 | |
| 840 | + if (fcport->fw_login_state == DSC_LS_PLOGI_COMP) { | |
| 841 | + if (time_before_eq(jiffies, fcport->plogi_nack_done_deadline)) | |
| 842 | + return 0; | |
| 843 | + } | |
| 844 | + | |
| 883 | 845 | /* for pure Target Mode. Login will not be initiated */ |
| 884 | 846 | if (vha->host->active_mode == MODE_TARGET) |
| 885 | 847 | return 0; |
| @@ -1041,10 +1003,14 @@ void qla24xx_handle_relogin_event(scsi_qla_host_t *vha, · 155 unmodified lines | ||
| 1041 | 1003 | fcport->flags); |
| 1042 | 1004 | |
| 1043 | 1005 | if ((fcport->fw_login_state == DSC_LS_PLOGI_PEND) || |
| 1044 | − (fcport->fw_login_state == DSC_LS_PLOGI_COMP) || | |
| 1045 | 1006 | (fcport->fw_login_state == DSC_LS_PRLI_PEND)) |
| 1046 | 1007 | return; |
| 1047 | 1008 | |
| 1009 | + if (fcport->fw_login_state == DSC_LS_PLOGI_COMP) { | |
| 1010 | + if (time_before_eq(jiffies, fcport->plogi_nack_done_deadline)) | |
| 1011 | + return; | |
| 1012 | + } | |
| 1013 | + | |
| 1048 | 1014 | if (fcport->flags & FCF_ASYNC_SENT) { |
| 1049 | 1015 | fcport->login_retry++; |
| 1050 | 1016 | set_bit(RELOGIN_NEEDED, &vha->dpc_flags); |
| @@ -1258,7 +1224,7 @@ qla24xx_abort_sp_done(void *ptr, int res) · 207 unmodified lines | ||
| 1258 | 1224 | complete(&abt->u.abt.comp); |
| 1259 | 1225 | } |
| 1260 | 1226 | |
| 1261 | −static int | |
| 1227 | +int | |
| 1262 | 1228 | qla24xx_async_abort_cmd(srb_t *cmd_sp) |
| 1263 | 1229 | { |
| 1264 | 1230 | scsi_qla_host_t *vha = cmd_sp->vha; |
| @@ -3212,6 +3178,7 @@ next_check: · 1947 unmodified lines | ||
| 3212 | 3178 | } else { |
| 3213 | 3179 | ql_dbg(ql_dbg_init, vha, 0x00d3, |
| 3214 | 3180 | "Init Firmware -- success.\n"); |
| 3181 | + ha->flags.fw_started = 1; | |
| 3215 | 3182 | } |
| 3216 | 3183 | |
| 3217 | 3184 | return (rval); |
| @@ -3374,8 +3341,8 @@ qla2x00_configure_hba(scsi_qla_host_t *vha) · 156 unmodified lines | ||
| 3374 | 3341 | uint8_t domain; |
| 3375 | 3342 | char connect_type[22]; |
| 3376 | 3343 | struct qla_hw_data *ha = vha->hw; |
| 3377 | − unsigned long flags; | |
| 3378 | 3344 | scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev); |
| 3345 | + port_id_t id; | |
| 3379 | 3346 | |
| 3380 | 3347 | /* Get host addresses. */ |
| 3381 | 3348 | rval = qla2x00_get_adapter_id(vha, |
| @@ -3453,13 +3420,11 @@ qla2x00_configure_hba(scsi_qla_host_t *vha) · 71 unmodified lines | ||
| 3453 | 3420 | |
| 3454 | 3421 | /* Save Host port and loop ID. */ |
| 3455 | 3422 | /* byte order - Big Endian */ |
| 3456 | − vha->d_id.b.domain = domain; | |
| 3457 | − vha->d_id.b.area = area; | |
| 3458 | − vha->d_id.b.al_pa = al_pa; | |
| 3459 | − | |
| 3460 | − spin_lock_irqsave(&ha->vport_slock, flags); | |
| 3461 | − qlt_update_vp_map(vha, SET_AL_PA); | |
| 3462 | − spin_unlock_irqrestore(&ha->vport_slock, flags); | |
| 3423 | + id.b.domain = domain; | |
| 3424 | + id.b.area = area; | |
| 3425 | + id.b.al_pa = al_pa; | |
| 3426 | + id.b.rsvd_1 = 0; | |
| 3427 | + qlt_update_host_map(vha, id); | |
| 3463 | 3428 | |
| 3464 | 3429 | if (!vha->flags.init_done) |
| 3465 | 3430 | ql_log(ql_log_info, vha, 0x2010, |
| @@ -4036,6 +4001,7 @@ qla2x00_configure_loop(scsi_qla_host_t *vha) · 570 unmodified lines | ||
| 4036 | 4001 | atomic_set(&vha->loop_state, LOOP_READY); |
| 4037 | 4002 | ql_dbg(ql_dbg_disc, vha, 0x2069, |
| 4038 | 4003 | "LOOP READY.\n"); |
| 4004 | + ha->flags.fw_init_done = 1; | |
| 4039 | 4005 | |
| 4040 | 4006 | /* |
| 4041 | 4007 | * Process any ATIO queue entries that came in |
| @@ -5148,6 +5114,7 @@ qla2x00_update_fcports(scsi_qla_host_t *base_vha) · 1106 unmodified lines | ||
| 5148 | 5114 | } |
| 5149 | 5115 | } |
| 5150 | 5116 | atomic_dec(&vha->vref_count); |
| 5117 | + wake_up(&vha->vref_waitq); | |
| 5151 | 5118 | } |
| 5152 | 5119 | spin_unlock_irqrestore(&ha->vport_slock, flags); |
| 5153 | 5120 | } |
| @@ -5526,6 +5493,11 @@ qla2x00_abort_isp_cleanup(scsi_qla_host_t *vha) · 372 unmodified lines | ||
| 5526 | 5493 | if (!(IS_P3P_TYPE(ha))) |
| 5527 | 5494 | ha->isp_ops->reset_chip(vha); |
| 5528 | 5495 | |
| 5496 | + ha->flags.n2n_ae = 0; | |
| 5497 | + ha->flags.lip_ae = 0; | |
| 5498 | + ha->current_topology = 0; | |
| 5499 | + ha->flags.fw_started = 0; | |
| 5500 | + ha->flags.fw_init_done = 0; | |
| 5529 | 5501 | ha->chip_reset++; |
| 5530 | 5502 | |
| 5531 | 5503 | atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME); |
| @@ -6802,6 +6774,8 @@ qla2x00_try_to_stop_firmware(scsi_qla_host_t *vha) · 1270 unmodified lines | ||
| 6802 | 6774 | return; |
| 6803 | 6775 | if (!ha->fw_major_version) |
| 6804 | 6776 | return; |
| 6777 | + if (!ha->flags.fw_started) | |
| 6778 | + return; | |
| 6805 | 6779 | |
| 6806 | 6780 | ret = qla2x00_stop_firmware(vha); |
| 6807 | 6781 | for (retries = 5; ret != QLA_SUCCESS && ret != QLA_FUNCTION_TIMEOUT && |
| @@ -6815,6 +6789,9 @@ qla2x00_try_to_stop_firmware(scsi_qla_host_t *vha) · 7 unmodified lines | ||
| 6815 | 6789 | "Attempting retry of stop-firmware command.\n"); |
| 6816 | 6790 | ret = qla2x00_stop_firmware(vha); |
| 6817 | 6791 | } |
| 6792 | + | |
| 6793 | + ha->flags.fw_started = 0; | |
| 6794 | + ha->flags.fw_init_done = 0; | |
| 6818 | 6795 | } |
| 6819 | 6796 | |
| 6820 | 6797 | int |
| @@ -889,7 +889,7 @@ qla24xx_get_one_block_sg(uint32_t blk_sz, struct qla2_sgx *sgx, · 888 unmodified lines | ||
| 889 | 889 | |
| 890 | 890 | int |
| 891 | 891 | qla24xx_walk_and_build_sglist_no_difb(struct qla_hw_data *ha, srb_t *sp, |
| 892 | − uint32_t *dsd, uint16_t tot_dsds, struct qla_tgt_cmd *tc) | |
| 892 | + uint32_t *dsd, uint16_t tot_dsds, struct qla_tc_param *tc) | |
| 893 | 893 | { |
| 894 | 894 | void *next_dsd; |
| 895 | 895 | uint8_t avail_dsds = 0; |
| @@ -898,7 +898,6 @@ qla24xx_walk_and_build_sglist_no_difb(struct qla_hw_data *ha, srb_t *sp, · 2 unmodified lines | ||
| 898 | 898 | struct scatterlist *sg_prot; |
| 899 | 899 | uint32_t *cur_dsd = dsd; |
| 900 | 900 | uint16_t used_dsds = tot_dsds; |
| 901 | − | |
| 902 | 901 | uint32_t prot_int; /* protection interval */ |
| 903 | 902 | uint32_t partial; |
| 904 | 903 | struct qla2_sgx sgx; |
| @@ -966,7 +965,7 @@ alloc_and_fill: · 61 unmodified lines | ||
| 966 | 965 | } else { |
| 967 | 966 | list_add_tail(&dsd_ptr->list, |
| 968 | 967 | &(tc->ctx->dsd_list)); |
| 969 | − tc->ctx_dsd_alloced = 1; | |
| 968 | + *tc->ctx_dsd_alloced = 1; | |
| 970 | 969 | } |
| 971 | 970 | |
| 972 | 971 | |
| @@ -1005,7 +1004,7 @@ alloc_and_fill: · 32 unmodified lines | ||
| 1005 | 1004 | |
| 1006 | 1005 | int |
| 1007 | 1006 | qla24xx_walk_and_build_sglist(struct qla_hw_data *ha, srb_t *sp, uint32_t *dsd, |
| 1008 | − uint16_t tot_dsds, struct qla_tgt_cmd *tc) | |
| 1007 | + uint16_t tot_dsds, struct qla_tc_param *tc) | |
| 1009 | 1008 | { |
| 1010 | 1009 | void *next_dsd; |
| 1011 | 1010 | uint8_t avail_dsds = 0; |
| @@ -1066,7 +1065,7 @@ qla24xx_walk_and_build_sglist(struct qla_hw_data *ha, srb_t *sp, uint32_t *dsd, · 54 unmodified lines | ||
| 1066 | 1065 | } else { |
| 1067 | 1066 | list_add_tail(&dsd_ptr->list, |
| 1068 | 1067 | &(tc->ctx->dsd_list)); |
| 1069 | − tc->ctx_dsd_alloced = 1; | |
| 1068 | + *tc->ctx_dsd_alloced = 1; | |
| 1070 | 1069 | } |
| 1071 | 1070 | |
| 1072 | 1071 | /* add new list to cmd iocb or last list */ |
| @@ -1092,7 +1091,7 @@ qla24xx_walk_and_build_sglist(struct qla_hw_data *ha, srb_t *sp, uint32_t *dsd, · 19 unmodified lines | ||
| 1092 | 1091 | |
| 1093 | 1092 | int |
| 1094 | 1093 | qla24xx_walk_and_build_prot_sglist(struct qla_hw_data *ha, srb_t *sp, |
| 1095 | − uint32_t *dsd, uint16_t tot_dsds, struct qla_tgt_cmd *tc) | |
| 1094 | + uint32_t *dsd, uint16_t tot_dsds, struct qla_tc_param *tc) | |
| 1096 | 1095 | { |
| 1097 | 1096 | void *next_dsd; |
| 1098 | 1097 | uint8_t avail_dsds = 0; |
| @@ -1158,7 +1157,7 @@ qla24xx_walk_and_build_prot_sglist(struct qla_hw_data *ha, srb_t *sp, · 59 unmodified lines | ||
| 1158 | 1157 | } else { |
| 1159 | 1158 | list_add_tail(&dsd_ptr->list, |
| 1160 | 1159 | &(tc->ctx->dsd_list)); |
| 1161 | − tc->ctx_dsd_alloced = 1; | |
| 1160 | + *tc->ctx_dsd_alloced = 1; | |
| 1162 | 1161 | } |
| 1163 | 1162 | |
| 1164 | 1163 | /* add new list to cmd iocb or last list */ |
| @@ -708,6 +708,8 @@ skip_rio: · 707 unmodified lines | ||
| 708 | 708 | "mbx7=%xh.\n", mb[1], mb[2], mb[3], mbx); |
| 709 | 709 | |
| 710 | 710 | ha->isp_ops->fw_dump(vha, 1); |
| 711 | + ha->flags.fw_init_done = 0; | |
| 712 | + ha->flags.fw_started = 0; | |
| 711 | 713 | |
| 712 | 714 | if (IS_FWI2_CAPABLE(ha)) { |
| 713 | 715 | if (mb[1] == 0 && mb[2] == 0) { |
| @@ -761,6 +763,9 @@ skip_rio: · 47 unmodified lines | ||
| 761 | 763 | break; |
| 762 | 764 | |
| 763 | 765 | case MBA_LIP_OCCURRED: /* Loop Initialization Procedure */ |
| 766 | + ha->flags.lip_ae = 1; | |
| 767 | + ha->flags.n2n_ae = 0; | |
| 768 | + | |
| 764 | 769 | ql_dbg(ql_dbg_async, vha, 0x5009, |
| 765 | 770 | "LIP occurred (%x).\n", mb[1]); |
| 766 | 771 | |
| @@ -797,6 +802,10 @@ skip_rio: · 30 unmodified lines | ||
| 797 | 802 | break; |
| 798 | 803 | |
| 799 | 804 | case MBA_LOOP_DOWN: /* Loop Down Event */ |
| 805 | + ha->flags.n2n_ae = 0; | |
| 806 | + ha->flags.lip_ae = 0; | |
| 807 | + ha->current_topology = 0; | |
| 808 | + | |
| 800 | 809 | mbx = (IS_QLA81XX(ha) || IS_QLA8031(ha)) |
| 801 | 810 | ? RD_REG_WORD(®24->mailbox4) : 0; |
| 802 | 811 | mbx = (IS_P3P_TYPE(ha)) ? RD_REG_WORD(®82->mailbox_out[4]) |
| @@ -866,6 +875,9 @@ skip_rio: · 63 unmodified lines | ||
| 866 | 875 | |
| 867 | 876 | /* case MBA_DCBX_COMPLETE: */ |
| 868 | 877 | case MBA_POINT_TO_POINT: /* Point-to-Point */ |
| 878 | + ha->flags.lip_ae = 0; | |
| 879 | + ha->flags.n2n_ae = 1; | |
| 880 | + | |
| 869 | 881 | if (IS_QLA2100(ha)) |
| 870 | 882 | break; |
| 871 | 883 | |
| @@ -1620,9 +1632,9 @@ qla24xx_logio_entry(scsi_qla_host_t *vha, struct req_que *req, · 748 unmodified lines | ||
| 1620 | 1632 | QLA_LOGIO_LOGIN_RETRIED : 0; |
| 1621 | 1633 | if (logio->entry_status) { |
| 1622 | 1634 | ql_log(ql_log_warn, fcport->vha, 0x5034, |
| 1623 | − "Async-%s error entry - hdl=%x" | |
| 1635 | + "Async-%s error entry - %8phC hdl=%x" | |
| 1624 | 1636 | "portid=%02x%02x%02x entry-status=%x.\n", |
| 1625 | − type, sp->handle, fcport->d_id.b.domain, | |
| 1637 | + type, fcport->port_name, sp->handle, fcport->d_id.b.domain, | |
| 1626 | 1638 | fcport->d_id.b.area, fcport->d_id.b.al_pa, |
| 1627 | 1639 | logio->entry_status); |
| 1628 | 1640 | ql_dump_buffer(ql_dbg_async + ql_dbg_buffer, vha, 0x504d, |
| @@ -1633,8 +1645,9 @@ qla24xx_logio_entry(scsi_qla_host_t *vha, struct req_que *req, · 4 unmodified lines | ||
| 1633 | 1645 | |
| 1634 | 1646 | if (le16_to_cpu(logio->comp_status) == CS_COMPLETE) { |
| 1635 | 1647 | ql_dbg(ql_dbg_async, fcport->vha, 0x5036, |
| 1636 | − "Async-%s complete - hdl=%x portid=%02x%02x%02x " | |
| 1637 | − "iop0=%x.\n", type, sp->handle, fcport->d_id.b.domain, | |
| 1648 | + "Async-%s complete - %8phC hdl=%x portid=%02x%02x%02x " | |
| 1649 | + "iop0=%x.\n", type, fcport->port_name, sp->handle, | |
| 1650 | + fcport->d_id.b.domain, | |
| 1638 | 1651 | fcport->d_id.b.area, fcport->d_id.b.al_pa, |
| 1639 | 1652 | le32_to_cpu(logio->io_parameter[0])); |
| 1640 | 1653 | |
| @@ -1674,6 +1687,17 @@ qla24xx_logio_entry(scsi_qla_host_t *vha, struct req_que *req, · 33 unmodified lines | ||
| 1674 | 1687 | case LSC_SCODE_NPORT_USED: |
| 1675 | 1688 | data[0] = MBS_LOOP_ID_USED; |
| 1676 | 1689 | break; |
| 1690 | + case LSC_SCODE_CMD_FAILED: | |
| 1691 | + if (iop[1] == 0x0606) { | |
| 1692 | + /* | |
| 1693 | + * PLOGI/PRLI Completed. We must have Recv PLOGI/PRLI, | |
| 1694 | + * Target side acked. | |
| 1695 | + */ | |
| 1696 | + data[0] = MBS_COMMAND_COMPLETE; | |
| 1697 | + goto logio_done; | |
| 1698 | + } | |
| 1699 | + data[0] = MBS_COMMAND_ERROR; | |
| 1700 | + break; | |
| 1677 | 1701 | case LSC_SCODE_NOXCB: |
| 1678 | 1702 | vha->hw->exch_starvation++; |
| 1679 | 1703 | if (vha->hw->exch_starvation > 5) { |
| @@ -1695,8 +1719,9 @@ qla24xx_logio_entry(scsi_qla_host_t *vha, struct req_que *req, · 15 unmodified lines | ||
| 1695 | 1719 | } |
| 1696 | 1720 | |
| 1697 | 1721 | ql_dbg(ql_dbg_async, fcport->vha, 0x5037, |
| 1698 | − "Async-%s failed - hdl=%x portid=%02x%02x%02x comp=%x " | |
| 1699 | − "iop0=%x iop1=%x.\n", type, sp->handle, fcport->d_id.b.domain, | |
| 1722 | + "Async-%s failed - %8phC hdl=%x portid=%02x%02x%02x comp=%x " | |
| 1723 | + "iop0=%x iop1=%x.\n", type, fcport->port_name, | |
| 1724 | + sp->handle, fcport->d_id.b.domain, | |
| 1700 | 1725 | fcport->d_id.b.area, fcport->d_id.b.al_pa, |
| 1701 | 1726 | le16_to_cpu(logio->comp_status), |
| 1702 | 1727 | le32_to_cpu(logio->io_parameter[0]), |
| @@ -2679,7 +2704,7 @@ qla24xx_abort_iocb_entry(scsi_qla_host_t *vha, struct req_que *req, · 976 unmodified lines | ||
| 2679 | 2704 | return; |
| 2680 | 2705 | |
| 2681 | 2706 | abt = &sp->u.iocb_cmd; |
| 2682 | − abt->u.abt.comp_status = le32_to_cpu(pkt->nport_handle); | |
| 2707 | + abt->u.abt.comp_status = le16_to_cpu(pkt->nport_handle); | |
| 2683 | 2708 | sp->done(sp, 0); |
| 2684 | 2709 | } |
| 2685 | 2710 | |
| @@ -2693,7 +2718,7 @@ void qla24xx_process_response_queue(struct scsi_qla_host *vha, · 7 unmodified lines | ||
| 2693 | 2718 | struct sts_entry_24xx *pkt; |
| 2694 | 2719 | struct qla_hw_data *ha = vha->hw; |
| 2695 | 2720 | |
| 2696 | − if (!vha->flags.online) | |
| 2721 | + if (!ha->flags.fw_started) | |
| 2697 | 2722 | return; |
| 2698 | 2723 | |
| 2699 | 2724 | while (rsp->ring_ptr->signature != RESPONSE_PROCESSED) { |
| @@ -10,6 +10,28 @@ · 9 unmodified lines | ||
| 10 | 10 | #include <linux/delay.h> |
| 11 | 11 | #include <linux/gfp.h> |
| 12 | 12 | |
| 13 | +static struct mb_cmd_name { | |
| 14 | + uint16_t cmd; | |
| 15 | + const char *str; | |
| 16 | +} mb_str[] = { | |
| 17 | + {MBC_GET_PORT_DATABASE, "GPDB"}, | |
| 18 | + {MBC_GET_ID_LIST, "GIDList"}, | |
| 19 | + {MBC_GET_LINK_PRIV_STATS, "Stats"}, | |
| 20 | +}; | |
| 21 | + | |
| 22 | +static const char *mb_to_str(uint16_t cmd) | |
| 23 | +{ | |
| 24 | + int i; | |
| 25 | + struct mb_cmd_name *e; | |
| 26 | + | |
| 27 | + for (i = 0; i < ARRAY_SIZE(mb_str); i++) { | |
| 28 | + e = mb_str + i; | |
| 29 | + if (cmd == e->cmd) | |
| 30 | + return e->str; | |
| 31 | + } | |
| 32 | + return "unknown"; | |
| 33 | +} | |
| 34 | + | |
| 13 | 35 | static struct rom_cmd { |
| 14 | 36 | uint16_t cmd; |
| 15 | 37 | } rom_cmds[] = { |
| @@ -2818,7 +2840,7 @@ qla2x00_get_link_status(scsi_qla_host_t *vha, uint16_t loop_id, · 2802 unmodified lines | ||
| 2818 | 2840 | |
| 2819 | 2841 | int |
| 2820 | 2842 | qla24xx_get_isp_stats(scsi_qla_host_t *vha, struct link_statistics *stats, |
| 2821 | − dma_addr_t stats_dma, uint options) | |
| 2843 | + dma_addr_t stats_dma, uint16_t options) | |
| 2822 | 2844 | { |
| 2823 | 2845 | int rval; |
| 2824 | 2846 | mbx_cmd_t mc; |
| @@ -2828,19 +2850,17 @@ qla24xx_get_isp_stats(scsi_qla_host_t *vha, struct link_statistics *stats, · 3 unmodified lines | ||
| 2828 | 2850 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1088, |
| 2829 | 2851 | "Entered %s.\n", __func__); |
| 2830 | 2852 | |
| 2831 | − mcp->mb[0] = MBC_GET_LINK_PRIV_STATS; | |
| 2832 | − mcp->mb[2] = MSW(stats_dma); | |
| 2833 | − mcp->mb[3] = LSW(stats_dma); | |
| 2834 | − mcp->mb[6] = MSW(MSD(stats_dma)); | |
| 2835 | − mcp->mb[7] = LSW(MSD(stats_dma)); | |
| 2836 | − mcp->mb[8] = sizeof(struct link_statistics) / 4; | |
| 2837 | − mcp->mb[9] = vha->vp_idx; | |
| 2838 | − mcp->mb[10] = options; | |
| 2839 | − mcp->out_mb = MBX_10|MBX_9|MBX_8|MBX_7|MBX_6|MBX_3|MBX_2|MBX_0; | |
| 2840 | − mcp->in_mb = MBX_2|MBX_1|MBX_0; | |
| 2841 | − mcp->tov = MBX_TOV_SECONDS; | |
| 2842 | − mcp->flags = IOCTL_CMD; | |
| 2843 | − rval = qla2x00_mailbox_command(vha, mcp); | |
| 2853 | + memset(&mc, 0, sizeof(mc)); | |
| 2854 | + mc.mb[0] = MBC_GET_LINK_PRIV_STATS; | |
| 2855 | + mc.mb[2] = MSW(stats_dma); | |
| 2856 | + mc.mb[3] = LSW(stats_dma); | |
| 2857 | + mc.mb[6] = MSW(MSD(stats_dma)); | |
| 2858 | + mc.mb[7] = LSW(MSD(stats_dma)); | |
| 2859 | + mc.mb[8] = sizeof(struct link_statistics) / 4; | |
| 2860 | + mc.mb[9] = cpu_to_le16(vha->vp_idx); | |
| 2861 | + mc.mb[10] = cpu_to_le16(options); | |
| 2862 | + | |
| 2863 | + rval = qla24xx_send_mb_cmd(vha, &mc); | |
| 2844 | 2864 | |
| 2845 | 2865 | if (rval == QLA_SUCCESS) { |
| 2846 | 2866 | if (mcp->mb[0] != MBS_COMMAND_COMPLETE) { |
| @@ -3603,6 +3623,7 @@ qla24xx_report_id_acquisition(scsi_qla_host_t *vha, · 756 unmodified lines | ||
| 3603 | 3623 | scsi_qla_host_t *vp = NULL; |
| 3604 | 3624 | unsigned long flags; |
| 3605 | 3625 | int found; |
| 3626 | + port_id_t id; | |
| 3606 | 3627 | |
| 3607 | 3628 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10b6, |
| 3608 | 3629 | "Entered %s.\n", __func__); |
| @@ -3610,28 +3631,27 @@ qla24xx_report_id_acquisition(scsi_qla_host_t *vha, · 1 unmodified line | ||
| 3610 | 3631 | if (rptid_entry->entry_status != 0) |
| 3611 | 3632 | return; |
| 3612 | 3633 | |
| 3634 | + id.b.domain = rptid_entry->port_id[2]; | |
| 3635 | + id.b.area = rptid_entry->port_id[1]; | |
| 3636 | + id.b.al_pa = rptid_entry->port_id[0]; | |
| 3637 | + id.b.rsvd_1 = 0; | |
| 3638 | + | |
| 3613 | 3639 | if (rptid_entry->format == 0) { |
| 3614 | 3640 | /* loop */ |
| 3615 | − ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10b7, | |
| 3641 | + ql_dbg(ql_dbg_async, vha, 0x10b7, | |
| 3616 | 3642 | "Format 0 : Number of VPs setup %d, number of " |
| 3617 | 3643 | "VPs acquired %d.\n", rptid_entry->vp_setup, |
| 3618 | 3644 | rptid_entry->vp_acquired); |
| 3619 | − ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10b8, | |
| 3645 | + ql_dbg(ql_dbg_async, vha, 0x10b8, | |
| 3620 | 3646 | "Primary port id %02x%02x%02x.\n", |
| 3621 | 3647 | rptid_entry->port_id[2], rptid_entry->port_id[1], |
| 3622 | 3648 | rptid_entry->port_id[0]); |
| 3623 | 3649 | |
| 3624 | − vha->d_id.b.domain = rptid_entry->port_id[2]; | |
| 3625 | − vha->d_id.b.area = rptid_entry->port_id[1]; | |
| 3626 | − vha->d_id.b.al_pa = rptid_entry->port_id[0]; | |
| 3627 | − | |
| 3628 | − spin_lock_irqsave(&ha->vport_slock, flags); | |
| 3629 | − qlt_update_vp_map(vha, SET_AL_PA); | |
| 3630 | − spin_unlock_irqrestore(&ha->vport_slock, flags); | |
| 3650 | + qlt_update_host_map(vha, id); | |
| 3631 | 3651 | |
| 3632 | 3652 | } else if (rptid_entry->format == 1) { |
| 3633 | 3653 | /* fabric */ |
| 3634 | − ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10b9, | |
| 3654 | + ql_dbg(ql_dbg_async, vha, 0x10b9, | |
| 3635 | 3655 | "Format 1: VP[%d] enabled - status %d - with " |
| 3636 | 3656 | "port id %02x%02x%02x.\n", rptid_entry->vp_idx, |
| 3637 | 3657 | rptid_entry->vp_status, |
| @@ -3653,12 +3673,7 @@ qla24xx_report_id_acquisition(scsi_qla_host_t *vha, · 15 unmodified lines | ||
| 3653 | 3673 | WWN_SIZE); |
| 3654 | 3674 | } |
| 3655 | 3675 | |
| 3656 | − vha->d_id.b.domain = rptid_entry->port_id[2]; | |
| 3657 | − vha->d_id.b.area = rptid_entry->port_id[1]; | |
| 3658 | − vha->d_id.b.al_pa = rptid_entry->port_id[0]; | |
| 3659 | − spin_lock_irqsave(&ha->vport_slock, flags); | |
| 3660 | − qlt_update_vp_map(vha, SET_AL_PA); | |
| 3661 | − spin_unlock_irqrestore(&ha->vport_slock, flags); | |
| 3676 | + qlt_update_host_map(vha, id); | |
| 3662 | 3677 | } |
| 3663 | 3678 | |
| 3664 | 3679 | fc_host_port_name(vha->host) = |
| @@ -3694,12 +3709,7 @@ qla24xx_report_id_acquisition(scsi_qla_host_t *vha, · 29 unmodified lines | ||
| 3694 | 3709 | if (!found) |
| 3695 | 3710 | return; |
| 3696 | 3711 | |
| 3697 | − vp->d_id.b.domain = rptid_entry->port_id[2]; | |
| 3698 | − vp->d_id.b.area = rptid_entry->port_id[1]; | |
| 3699 | − vp->d_id.b.al_pa = rptid_entry->port_id[0]; | |
| 3700 | − spin_lock_irqsave(&ha->vport_slock, flags); | |
| 3701 | − qlt_update_vp_map(vp, SET_AL_PA); | |
| 3702 | − spin_unlock_irqrestore(&ha->vport_slock, flags); | |
| 3712 | + qlt_update_host_map(vp, id); | |
| 3703 | 3713 | |
| 3704 | 3714 | /* |
| 3705 | 3715 | * Cannot configure here as we are still sitting on the |
| @@ -5827,3 +5837,225 @@ qla26xx_dport_diagnostics(scsi_qla_host_t *vha, · 2121 unmodified lines | ||
| 5827 | 5837 | |
| 5828 | 5838 | return rval; |
| 5829 | 5839 | } |
| 5840 | + | |
| 5841 | +static void qla2x00_async_mb_sp_done(void *s, int res) | |
| 5842 | +{ | |
| 5843 | + struct srb *sp = s; | |
| 5844 | + | |
| 5845 | + sp->u.iocb_cmd.u.mbx.rc = res; | |
| 5846 | + | |
| 5847 | + complete(&sp->u.iocb_cmd.u.mbx.comp); | |
| 5848 | + /* don't free sp here. Let the caller do the free */ | |
| 5849 | +} | |
| 5850 | + | |
| 5851 | +/* | |
| 5852 | + * This mailbox uses the iocb interface to send MB command. | |
| 5853 | + * This allows non-critial (non chip setup) command to go | |
| 5854 | + * out in parrallel. | |
| 5855 | + */ | |
| 5856 | +int qla24xx_send_mb_cmd(struct scsi_qla_host *vha, mbx_cmd_t *mcp) | |
| 5857 | +{ | |
| 5858 | + int rval = QLA_FUNCTION_FAILED; | |
| 5859 | + srb_t *sp; | |
| 5860 | + struct srb_iocb *c; | |
| 5861 | + | |
| 5862 | + if (!vha->hw->flags.fw_started) | |
| 5863 | + goto done; | |
| 5864 | + | |
| 5865 | + sp = qla2x00_get_sp(vha, NULL, GFP_KERNEL); | |
| 5866 | + if (!sp) | |
| 5867 | + goto done; | |
| 5868 | + | |
| 5869 | + sp->type = SRB_MB_IOCB; | |
| 5870 | + sp->name = mb_to_str(mcp->mb[0]); | |
| 5871 | + | |
| 5872 | + qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2); | |
| 5873 | + | |
| 5874 | + memcpy(sp->u.iocb_cmd.u.mbx.out_mb, mcp->mb, SIZEOF_IOCB_MB_REG); | |
| 5875 | + | |
| 5876 | + c = &sp->u.iocb_cmd; | |
| 5877 | + c->timeout = qla2x00_async_iocb_timeout; | |
| 5878 | + init_completion(&c->u.mbx.comp); | |
| 5879 | + | |
| 5880 | + sp->done = qla2x00_async_mb_sp_done; | |
| 5881 | + | |
| 5882 | + rval = qla2x00_start_sp(sp); | |
| 5883 | + if (rval != QLA_SUCCESS) { | |
| 5884 | + ql_dbg(ql_dbg_mbx, vha, 0xffff, | |
| 5885 | + "%s: %s Failed submission. %x.\n", | |
| 5886 | + __func__, sp->name, rval); | |
| 5887 | + goto done_free_sp; | |
| 5888 | + } | |
| 5889 | + | |
| 5890 | + ql_dbg(ql_dbg_mbx, vha, 0xffff, "MB:%s hndl %x submitted\n", | |
| 5891 | + sp->name, sp->handle); | |
| 5892 | + | |
| 5893 | + wait_for_completion(&c->u.mbx.comp); | |
| 5894 | + memcpy(mcp->mb, sp->u.iocb_cmd.u.mbx.in_mb, SIZEOF_IOCB_MB_REG); | |
| 5895 | + | |
| 5896 | + rval = c->u.mbx.rc; | |
| 5897 | + switch (rval) { | |
| 5898 | + case QLA_FUNCTION_TIMEOUT: | |
| 5899 | + ql_dbg(ql_dbg_mbx, vha, 0xffff, "%s: %s Timeout. %x.\n", | |
| 5900 | + __func__, sp->name, rval); | |
| 5901 | + break; | |
| 5902 | + case QLA_SUCCESS: | |
| 5903 | + ql_dbg(ql_dbg_mbx, vha, 0xffff, "%s: %s done.\n", | |
| 5904 | + __func__, sp->name); | |
| 5905 | + sp->free(sp); | |
| 5906 | + break; | |
| 5907 | + default: | |
| 5908 | + ql_dbg(ql_dbg_mbx, vha, 0xffff, "%s: %s Failed. %x.\n", | |
| 5909 | + __func__, sp->name, rval); | |
| 5910 | + sp->free(sp); | |
| 5911 | + break; | |
| 5912 | + } | |
| 5913 | + | |
| 5914 | + return rval; | |
| 5915 | + | |
| 5916 | +done_free_sp: | |
| 5917 | + sp->free(sp); | |
| 5918 | +done: | |
| 5919 | + return rval; | |
| 5920 | +} | |
| 5921 | + | |
| 5922 | +/* | |
| 5923 | + * qla24xx_gpdb_wait | |
| 5924 | + * NOTE: Do not call this routine from DPC thread | |
| 5925 | + */ | |
| 5926 | +int qla24xx_gpdb_wait(struct scsi_qla_host *vha, fc_port_t *fcport, u8 opt) | |
| 5927 | +{ | |
| 5928 | + int rval = QLA_FUNCTION_FAILED; | |
| 5929 | + dma_addr_t pd_dma; | |
| 5930 | + struct port_database_24xx *pd; | |
| 5931 | + struct qla_hw_data *ha = vha->hw; | |
| 5932 | + mbx_cmd_t mc; | |
| 5933 | + | |
| 5934 | + if (!vha->hw->flags.fw_started) | |
| 5935 | + goto done; | |
| 5936 | + | |
| 5937 | + pd = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &pd_dma); | |
| 5938 | + if (pd == NULL) { | |
| 5939 | + ql_log(ql_log_warn, vha, 0xffff, | |
| 5940 | + "Failed to allocate port database structure.\n"); | |
| 5941 | + goto done_free_sp; | |
| 5942 | + } | |
| 5943 | + memset(pd, 0, max(PORT_DATABASE_SIZE, PORT_DATABASE_24XX_SIZE)); | |
| 5944 | + | |
| 5945 | + memset(&mc, 0, sizeof(mc)); | |
| 5946 | + mc.mb[0] = MBC_GET_PORT_DATABASE; | |
| 5947 | + mc.mb[1] = cpu_to_le16(fcport->loop_id); | |
| 5948 | + mc.mb[2] = MSW(pd_dma); | |
| 5949 | + mc.mb[3] = LSW(pd_dma); | |
| 5950 | + mc.mb[6] = MSW(MSD(pd_dma)); | |
| 5951 | + mc.mb[7] = LSW(MSD(pd_dma)); | |
| 5952 | + mc.mb[9] = cpu_to_le16(vha->vp_idx); | |
| 5953 | + mc.mb[10] = cpu_to_le16((uint16_t)opt); | |
| 5954 | + | |
| 5955 | + rval = qla24xx_send_mb_cmd(vha, &mc); | |
| 5956 | + if (rval != QLA_SUCCESS) { | |
| 5957 | + ql_dbg(ql_dbg_mbx, vha, 0xffff, | |
| 5958 | + "%s: %8phC fail\n", __func__, fcport->port_name); | |
| 5959 | + goto done_free_sp; | |
| 5960 | + } | |
| 5961 | + | |
| 5962 | + rval = __qla24xx_parse_gpdb(vha, fcport, pd); | |
| 5963 | + | |
| 5964 | + ql_dbg(ql_dbg_mbx, vha, 0xffff, "%s: %8phC done\n", | |
| 5965 | + __func__, fcport->port_name); | |
| 5966 | + | |
| 5967 | +done_free_sp: | |
| 5968 | + if (pd) | |
| 5969 | + dma_pool_free(ha->s_dma_pool, pd, pd_dma); | |
| 5970 | +done: | |
| 5971 | + return rval; | |
| 5972 | +} | |
| 5973 | + | |
| 5974 | +int __qla24xx_parse_gpdb(struct scsi_qla_host *vha, fc_port_t *fcport, | |
| 5975 | + struct port_database_24xx *pd) | |
| 5976 | +{ | |
| 5977 | + int rval = QLA_SUCCESS; | |
| 5978 | + uint64_t zero = 0; | |
| 5979 | + | |
| 5980 | + /* Check for logged in state. */ | |
| 5981 | + if (pd->current_login_state != PDS_PRLI_COMPLETE && | |
| 5982 | + pd->last_login_state != PDS_PRLI_COMPLETE) { | |
| 5983 | + ql_dbg(ql_dbg_mbx, vha, 0xffff, | |
| 5984 | + "Unable to verify login-state (%x/%x) for " | |
| 5985 | + "loop_id %x.\n", pd->current_login_state, | |
| 5986 | + pd->last_login_state, fcport->loop_id); | |
| 5987 | + rval = QLA_FUNCTION_FAILED; | |
| 5988 | + goto gpd_error_out; | |
| 5989 | + } | |
| 5990 | + | |
| 5991 | + if (fcport->loop_id == FC_NO_LOOP_ID || | |
| 5992 | + (memcmp(fcport->port_name, (uint8_t *)&zero, 8) && | |
| 5993 | + memcmp(fcport->port_name, pd->port_name, 8))) { | |
| 5994 | + /* We lost the device mid way. */ | |
| 5995 | + rval = QLA_NOT_LOGGED_IN; | |
| 5996 | + goto gpd_error_out; | |
| 5997 | + } | |
| 5998 | + | |
| 5999 | + /* Names are little-endian. */ | |
| 6000 | + memcpy(fcport->node_name, pd->node_name, WWN_SIZE); | |
| 6001 | + memcpy(fcport->port_name, pd->port_name, WWN_SIZE); | |
| 6002 | + | |
| 6003 | + /* Get port_id of device. */ | |
| 6004 | + fcport->d_id.b.domain = pd->port_id[0]; | |
| 6005 | + fcport->d_id.b.area = pd->port_id[1]; | |
| 6006 | + fcport->d_id.b.al_pa = pd->port_id[2]; | |
| 6007 | + fcport->d_id.b.rsvd_1 = 0; | |
| 6008 | + | |
| 6009 | + /* If not target must be initiator or unknown type. */ | |
| 6010 | + if ((pd->prli_svc_param_word_3[0] & BIT_4) == 0) | |
| 6011 | + fcport->port_type = FCT_INITIATOR; | |
| 6012 | + else | |
| 6013 | + fcport->port_type = FCT_TARGET; | |
| 6014 | + | |
| 6015 | + /* Passback COS information. */ | |
| 6016 | + fcport->supported_classes = (pd->flags & PDF_CLASS_2) ? | |
| 6017 | + FC_COS_CLASS2 : FC_COS_CLASS3; | |
| 6018 | + | |
| 6019 | + if (pd->prli_svc_param_word_3[0] & BIT_7) { | |
| 6020 | + fcport->flags |= FCF_CONF_COMP_SUPPORTED; | |
| 6021 | + fcport->conf_compl_supported = 1; | |
| 6022 | + } | |
| 6023 | + | |
| 6024 | +gpd_error_out: | |
| 6025 | + return rval; | |
| 6026 | +} | |
| 6027 | + | |
| 6028 | +/* | |
| 6029 | + * qla24xx_gidlist__wait | |
| 6030 | + * NOTE: don't call this routine from DPC thread. | |
| 6031 | + */ | |
| 6032 | +int qla24xx_gidlist_wait(struct scsi_qla_host *vha, | |
| 6033 | + void *id_list, dma_addr_t id_list_dma, uint16_t *entries) | |
| 6034 | +{ | |
| 6035 | + int rval = QLA_FUNCTION_FAILED; | |
| 6036 | + mbx_cmd_t mc; | |
| 6037 | + | |
| 6038 | + if (!vha->hw->flags.fw_started) | |
| 6039 | + goto done; | |
| 6040 | + | |
| 6041 | + memset(&mc, 0, sizeof(mc)); | |
| 6042 | + mc.mb[0] = MBC_GET_ID_LIST; | |
| 6043 | + mc.mb[2] = MSW(id_list_dma); | |
| 6044 | + mc.mb[3] = LSW(id_list_dma); | |
| 6045 | + mc.mb[6] = MSW(MSD(id_list_dma)); | |
| 6046 | + mc.mb[7] = LSW(MSD(id_list_dma)); | |
| 6047 | + mc.mb[8] = 0; | |
| 6048 | + mc.mb[9] = cpu_to_le16(vha->vp_idx); | |
| 6049 | + | |
| 6050 | + rval = qla24xx_send_mb_cmd(vha, &mc); | |
| 6051 | + if (rval != QLA_SUCCESS) { | |
| 6052 | + ql_dbg(ql_dbg_mbx, vha, 0xffff, | |
| 6053 | + "%s: fail\n", __func__); | |
| 6054 | + } else { | |
| 6055 | + *entries = mc.mb[1]; | |
| 6056 | + ql_dbg(ql_dbg_mbx, vha, 0xffff, | |
| 6057 | + "%s: done\n", __func__); | |
| 6058 | + } | |
| 6059 | +done: | |
| 6060 | + return rval; | |
| 6061 | +} | |
| @@ -74,13 +74,14 @@ qla24xx_deallocate_vp_id(scsi_qla_host_t *vha) · 73 unmodified lines | ||
| 74 | 74 | * ensures no active vp_list traversal while the vport is removed |
| 75 | 75 | * from the queue) |
| 76 | 76 | */ |
| 77 | − spin_lock_irqsave(&ha->vport_slock, flags); | |
| 78 | − while (atomic_read(&vha->vref_count)) { | |
| 79 | − spin_unlock_irqrestore(&ha->vport_slock, flags); | |
| 80 | − | |
| 81 | − msleep(500); | |
| 77 | + wait_event_timeout(vha->vref_waitq, atomic_read(&vha->vref_count), | |
| 78 | + 10*HZ); | |
| 82 | 79 | |
| 83 | − spin_lock_irqsave(&ha->vport_slock, flags); | |
| 80 | + spin_lock_irqsave(&ha->vport_slock, flags); | |
| 81 | + if (atomic_read(&vha->vref_count)) { | |
| 82 | + ql_dbg(ql_dbg_vport, vha, 0xfffa, | |
| 83 | + "vha->vref_count=%u timeout\n", vha->vref_count.counter); | |
| 84 | + vha->vref_count = (atomic_t)ATOMIC_INIT(0); | |
| 84 | 85 | } |
| 85 | 86 | list_del(&vha->list); |
| 86 | 87 | qlt_update_vp_map(vha, RESET_VP_IDX); |
| @@ -269,6 +270,7 @@ qla2x00_alert_all_vps(struct rsp_que *rsp, uint16_t *mb) · 182 unmodified lines | ||
| 269 | 270 | |
| 270 | 271 | spin_lock_irqsave(&ha->vport_slock, flags); |
| 271 | 272 | atomic_dec(&vha->vref_count); |
| 273 | + wake_up(&vha->vref_waitq); | |
| 272 | 274 | } |
| 273 | 275 | i++; |
| 274 | 276 | } |
| @@ -2560,6 +2560,20 @@ qla2xxx_scan_finished(struct Scsi_Host *shost, unsigned long time) · 2559 unmodified lines | ||
| 2560 | 2560 | return atomic_read(&vha->loop_state) == LOOP_READY; |
| 2561 | 2561 | } |
| 2562 | 2562 | |
| 2563 | +static void qla2x00_iocb_work_fn(struct work_struct *work) | |
| 2564 | +{ | |
| 2565 | + struct scsi_qla_host *vha = container_of(work, | |
| 2566 | + struct scsi_qla_host, iocb_work); | |
| 2567 | + int cnt = 0; | |
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