/* ELF support for BFD.   Copyright (C) 1991-2026 Free Software Foundation, Inc.    Written by Fred Fish @ Cygnus Support, from information published   in "UNIX System V Release 4, Programmers Guide: ANSI C and   Programming Support Tools".    This file is part of BFD, the Binary File Descriptor library.    This program is free software; you can redistribute it and/or modify   it under the terms of the GNU General Public License as published by   the Free Software Foundation; either version 3 of the License, or   (at your option) any later version.    This program is distributed in the hope that it will be useful,   but WITHOUT ANY WARRANTY; without even the implied warranty of   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the   GNU General Public License for more details.    You should have received a copy of the GNU General Public License   along with this program; if not, write to the Free Software   Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,   MA 02110-1301, USA.  */ /* This file is part of ELF support for BFD, and contains the portions   that are common to both the internal and external representations.   For example, ELFMAG0 is the byte 0x7F in both the internal (in-memory)   and external (in-file) representations.  */ #ifndef _ELF_COMMON_H#define _ELF_COMMON_H /* Fields in e_ident[].  */ #define EI_MAG0		0	/* File identification byte 0 index */#define ELFMAG0		   0x7F	/* Magic number byte 0 */ #define EI_MAG1		1	/* File identification byte 1 index */#define ELFMAG1		    'E'	/* Magic number byte 1 */ #define EI_MAG2		2	/* File identification byte 2 index */#define ELFMAG2		    'L'	/* Magic number byte 2 */ #define EI_MAG3		3	/* File identification byte 3 index */#define ELFMAG3		    'F'	/* Magic number byte 3 */ #define EI_CLASS	4	/* File class */#define ELFCLASSNONE	      0	/* Invalid class */#define ELFCLASS32	      1	/* 32-bit objects */#define ELFCLASS64	      2	/* 64-bit objects */ #define EI_DATA		5	/* Data encoding */#define ELFDATANONE	      0	/* Invalid data encoding */#define ELFDATA2LSB	      1	/* 2's complement, little endian */#define ELFDATA2MSB	      2	/* 2's complement, big endian */ #define EI_VERSION	6	/* File version */ #define EI_OSABI	7	/* Operating System/ABI indication */#define ELFOSABI_NONE	      0	/* UNIX System V ABI */#define ELFOSABI_HPUX	      1	/* HP-UX operating system */#define ELFOSABI_NETBSD	      2	/* NetBSD */#define ELFOSABI_GNU	      3	/* GNU */#define ELFOSABI_LINUX	      3	/* Alias for ELFOSABI_GNU */#define ELFOSABI_SOLARIS      6	/* Solaris */#define ELFOSABI_AIX	      7	/* AIX */#define ELFOSABI_IRIX	      8	/* IRIX */#define ELFOSABI_FREEBSD      9	/* FreeBSD */#define ELFOSABI_TRU64	     10	/* TRU64 UNIX */#define ELFOSABI_MODESTO     11	/* Novell Modesto */#define ELFOSABI_OPENBSD     12	/* OpenBSD */#define ELFOSABI_OPENVMS     13	/* OpenVMS */#define ELFOSABI_NSK	     14	/* Hewlett-Packard Non-Stop Kernel */#define ELFOSABI_AROS	     15	/* AROS */#define ELFOSABI_FENIXOS     16 /* FenixOS */#define ELFOSABI_CLOUDABI    17 /* Nuxi CloudABI */#define ELFOSABI_OPENVOS     18 /* Stratus Technologies OpenVOS */ #define ELFOSABI_CUDA          51 /* NVIDIA CUDA architecture.  */#define ELFOSABI_C6000_ELFABI  64 /* Bare-metal TMS320C6000 */#define ELFOSABI_AMDGPU_HSA    64 /* AMD HSA Runtime */#define ELFOSABI_C6000_LINUX   65 /* Linux TMS320C6000 */#define ELFOSABI_AMDGPU_PAL    65 /* AMD PAL Runtime */#define ELFOSABI_ARM_FDPIC     65 /* ARM FDPIC */#define ELFOSABI_AMDGPU_MESA3D 66 /* AMD Mesa3D Runtime */#define ELFOSABI_ARM	       97 /* ARM */#define ELFOSABI_STANDALONE   255 /* Standalone (embedded) application */ #define EI_ABIVERSION	8	/* ABI version */ #define EI_PAD		9	/* Start of padding bytes */ /* Values for e_type, which identifies the object file type.  */ #define ET_NONE		0	/* No file type */#define ET_REL		1	/* Relocatable file */#define ET_EXEC		2	/* Position-dependent executable file */#define ET_DYN		3	/* Position-independent executable or				   shared object file */#define ET_CORE		4	/* Core file */#define ET_LOOS		0xFE00	/* Operating system-specific */#define ET_HIOS		0xFEFF	/* Operating system-specific */#define ET_LOPROC	0xFF00	/* Processor-specific */#define ET_HIPROC	0xFFFF	/* Processor-specific */ /* Values for e_machine, which identifies the architecture.  These numbers   are officially assigned by registry@sco.com.  See below for a list of   ad-hoc numbers used during initial development.  */ #define EM_NONE		  0	/* No machine */#define EM_M32		  1	/* AT&T WE 32100 */#define EM_SPARC	  2	/* SUN SPARC */#define EM_386		  3	/* Intel 80386 */#define EM_68K		  4	/* Motorola m68k family */#define EM_88K		  5	/* Motorola m88k family */#define EM_IAMCU	  6	/* Intel MCU */#define EM_860		  7	/* Intel 80860 */#define EM_MIPS		  8	/* MIPS R3000 (officially, big-endian only) */#define EM_S370		  9	/* IBM System/370 */#define EM_MIPS_RS3_LE	 10	/* MIPS R3000 little-endian (Oct 4 1999 Draft).  Deprecated.  */#define EM_OLD_SPARCV9	 11	/* Old version of Sparc v9, from before the ABI.  Deprecated.  */#define EM_res011	 11	/* Reserved */#define EM_res012	 12	/* Reserved */#define EM_res013	 13	/* Reserved */#define EM_res014	 14	/* Reserved */#define EM_PARISC	 15	/* HPPA */#define EM_res016	 16	/* Reserved */#define EM_PPC_OLD	 17	/* Old version of PowerPC.  Deprecated.  */#define EM_VPP550	 17	/* Fujitsu VPP500 */#define EM_SPARC32PLUS	 18	/* Sun's "v8plus" */#define EM_960		 19	/* Intel 80960 */#define EM_PPC		 20	/* PowerPC */#define EM_PPC64	 21	/* 64-bit PowerPC */#define EM_S390		 22	/* IBM S/390 */#define EM_SPU		 23	/* Sony/Toshiba/IBM SPU */#define EM_res024	 24	/* Reserved */#define EM_res025	 25	/* Reserved */#define EM_res026	 26	/* Reserved */#define EM_res027	 27	/* Reserved */#define EM_res028	 28	/* Reserved */#define EM_res029	 29	/* Reserved */#define EM_res030	 30	/* Reserved */#define EM_res031	 31	/* Reserved */#define EM_res032	 32	/* Reserved */#define EM_res033	 33	/* Reserved */#define EM_res034	 34	/* Reserved */#define EM_res035	 35	/* Reserved */#define EM_V800		 36	/* NEC V800 series */#define EM_FR20		 37	/* Fujitsu FR20 */#define EM_RH32		 38	/* TRW RH32 */#define EM_MCORE	 39	/* Motorola M*Core */ /* May also be taken by Fujitsu MMA */#define EM_RCE		 39	/* Old name for MCore */#define EM_ARM		 40	/* ARM */#define EM_OLD_ALPHA	 41	/* Digital Alpha */#define EM_SH		 42	/* Renesas (formerly Hitachi) / SuperH SH */#define EM_SPARCV9	 43	/* SPARC v9 64-bit */#define EM_TRICORE	 44	/* Siemens Tricore embedded processor */#define EM_ARC		 45	/* ARC Cores */#define EM_H8_300	 46	/* Renesas (formerly Hitachi) H8/300 */#define EM_H8_300H	 47	/* Renesas (formerly Hitachi) H8/300H */#define EM_H8S		 48	/* Renesas (formerly Hitachi) H8S */#define EM_H8_500	 49	/* Renesas (formerly Hitachi) H8/500 */#define EM_IA_64	 50	/* Intel IA-64 Processor */#define EM_MIPS_X	 51	/* Stanford MIPS-X */#define EM_COLDFIRE	 52	/* Motorola Coldfire */#define EM_68HC12	 53	/* Motorola M68HC12 */#define EM_MMA		 54	/* Fujitsu Multimedia Accelerator */#define EM_PCP		 55	/* Siemens PCP */#define EM_NCPU		 56	/* Sony nCPU embedded RISC processor */#define EM_NDR1		 57	/* Denso NDR1 microprocessor */#define EM_STARCORE	 58	/* Motorola Star*Core processor */#define EM_ME16		 59	/* Toyota ME16 processor */#define EM_ST100	 60	/* STMicroelectronics ST100 processor */#define EM_TINYJ	 61	/* Advanced Logic Corp. TinyJ embedded processor */#define EM_X86_64	 62	/* Advanced Micro Devices X86-64 processor */#define EM_PDSP		 63	/* Sony DSP Processor */#define EM_PDP10	 64	/* Digital Equipment Corp. PDP-10 */#define EM_PDP11	 65	/* Digital Equipment Corp. PDP-11 */#define EM_FX66		 66	/* Siemens FX66 microcontroller */#define EM_ST9PLUS	 67	/* STMicroelectronics ST9+ 8/16 bit microcontroller */#define EM_ST7		 68	/* STMicroelectronics ST7 8-bit microcontroller */#define EM_68HC16	 69	/* Motorola MC68HC16 Microcontroller */#define EM_68HC11	 70	/* Motorola MC68HC11 Microcontroller */#define EM_68HC08	 71	/* Motorola MC68HC08 Microcontroller */#define EM_68HC05	 72	/* Motorola MC68HC05 Microcontroller */#define EM_SVX		 73	/* Silicon Graphics SVx */#define EM_ST19		 74	/* STMicroelectronics ST19 8-bit cpu */#define EM_VAX		 75	/* Digital VAX */#define EM_CRIS		 76	/* Axis Communications 32-bit embedded processor */#define EM_JAVELIN	 77	/* Infineon Technologies 32-bit embedded cpu */#define EM_FIREPATH	 78	/* Element 14 64-bit DSP processor */#define EM_ZSP		 79	/* LSI Logic's 16-bit DSP processor */#define EM_MMIX		 80	/* Donald Knuth's educational 64-bit processor */#define EM_HUANY	 81	/* Harvard's machine-independent format */#define EM_PRISM	 82	/* SiTera Prism */#define EM_AVR		 83	/* Atmel AVR 8-bit microcontroller */#define EM_FR30		 84	/* Fujitsu FR30 */#define EM_D10V		 85	/* Mitsubishi D10V */#define EM_D30V		 86	/* Mitsubishi D30V */#define EM_V850		 87	/* Renesas V850 (formerly NEC V850) */#define EM_M32R		 88	/* Renesas M32R (formerly Mitsubishi M32R) */#define EM_MN10300	 89	/* Matsushita MN10300 */#define EM_MN10200	 90	/* Matsushita MN10200 */#define EM_PJ		 91	/* picoJava */#define EM_OR1K		 92	/* OpenRISC 1000 32-bit embedded processor */#define EM_ARC_COMPACT	 93	/* ARC International ARCompact processor */#define EM_XTENSA	 94	/* Tensilica Xtensa Architecture */#define EM_SCORE_OLD	 95	/* Old Sunplus S+core7 backend magic number. Written in the absence of an ABI.  */#define EM_VIDEOCORE	 95	/* Alphamosaic VideoCore processor */#define EM_TMM_GPP	 96	/* Thompson Multimedia General Purpose Processor */#define EM_NS32K	 97	/* National Semiconductor 32000 series */#define EM_TPC		 98	/* Tenor Network TPC processor */#define EM_PJ_OLD	 99	/* Old value for picoJava.  Deprecated.  */#define EM_SNP1K	 99	/* Trebia SNP 1000 processor */#define EM_ST200	100	/* STMicroelectronics ST200 microcontroller */#define EM_IP2K		101	/* Ubicom IP2022 micro controller */#define EM_MAX		102	/* MAX Processor */#define EM_CR		103	/* National Semiconductor CompactRISC */#define EM_F2MC16	104	/* Fujitsu F2MC16 */#define EM_MSP430	105	/* TI msp430 micro controller */#define EM_BLACKFIN	106	/* ADI Blackfin */#define EM_SE_C33	107	/* S1C33 Family of Seiko Epson processors */#define EM_SEP		108	/* Sharp embedded microprocessor */#define EM_ARCA		109	/* Arca RISC Microprocessor */#define EM_UNICORE	110	/* Microprocessor series from PKU-Unity Ltd. and MPRC of Peking University */#define EM_EXCESS	111	/* eXcess: 16/32/64-bit configurable embedded CPU */#define EM_DXP		112	/* Icera Semiconductor Inc. Deep Execution Processor */#define EM_ALTERA_NIOS2	113	/* Altera Nios II soft-core processor */#define EM_CRX		114	/* National Semiconductor CRX */#define EM_CR16_OLD	115	/* Old, value for National Semiconductor CompactRISC.  Deprecated.  */#define EM_XGATE	115	/* Motorola XGATE embedded processor */#define EM_C166		116	/* Infineon C16x/XC16x processor */#define EM_M16C		117	/* Renesas M16C series microprocessors */#define EM_DSPIC30F	118	/* Microchip Technology dsPIC30F Digital Signal Controller */#define EM_CE		119	/* Freescale Communication Engine RISC core */#define EM_M32C		120	/* Renesas M32C series microprocessors */#define EM_res121	121	/* Reserved */#define EM_res122	122	/* Reserved */#define EM_res123	123	/* Reserved */#define EM_res124	124	/* Reserved */#define EM_res125	125	/* Reserved */#define EM_res126	126	/* Reserved */#define EM_res127	127	/* Reserved */#define EM_res128	128	/* Reserved */#define EM_res129	129	/* Reserved */#define EM_res130	130	/* Reserved */#define EM_TSK3000	131	/* Altium TSK3000 core */#define EM_RS08		132	/* Freescale RS08 embedded processor */#define EM_res133	133	/* Reserved */#define EM_ECOG2	134	/* Cyan Technology eCOG2 microprocessor */#define EM_SCORE	135	/* Sunplus Score */#define EM_SCORE7	135	/* Sunplus S+core7 RISC processor */#define EM_DSP24	136	/* New Japan Radio (NJR) 24-bit DSP Processor */#define EM_VIDEOCORE3	137	/* Broadcom VideoCore III processor */#define EM_LATTICEMICO32 138	/* RISC processor for Lattice FPGA architecture */#define EM_SE_C17	139	/* Seiko Epson C17 family */#define EM_TI_C6000	140	/* Texas Instruments TMS320C6000 DSP family */#define EM_TI_C2000	141	/* Texas Instruments TMS320C2000 DSP family */#define EM_TI_C5500	142	/* Texas Instruments TMS320C55x DSP family */#define EM_res143	143	/* Reserved */#define EM_TI_PRU	144	/* Texas Instruments Programmable Realtime Unit */#define EM_res145	145	/* Reserved */#define EM_res146	146	/* Reserved */#define EM_res147	147	/* Reserved */#define EM_res148	148	/* Reserved */#define EM_res149	149	/* Reserved */#define EM_res150	150	/* Reserved */#define EM_res151	151	/* Reserved */#define EM_res152	152	/* Reserved */#define EM_res153	153	/* Reserved */#define EM_res154	154	/* Reserved */#define EM_res155	155	/* Reserved */#define EM_res156	156	/* Reserved */#define EM_res157	157	/* Reserved */#define EM_res158	158	/* Reserved */#define EM_res159	159	/* Reserved */#define EM_MMDSP_PLUS	160	/* STMicroelectronics 64bit VLIW Data Signal Processor */#define EM_CYPRESS_M8C	161	/* Cypress M8C microprocessor */#define EM_R32C		162	/* Renesas R32C series microprocessors */#define EM_TRIMEDIA	163	/* NXP Semiconductors TriMedia architecture family */#define EM_QDSP6	164	/* QUALCOMM DSP6 Processor */#define EM_8051		165	/* Intel 8051 and variants */#define EM_STXP7X	166	/* STMicroelectronics STxP7x family */#define EM_NDS32	167	/* Andes Technology compact code size embedded RISC processor family */#define EM_ECOG1	168	/* Cyan Technology eCOG1X family */#define EM_ECOG1X	168	/* Cyan Technology eCOG1X family */#define EM_MAXQ30	169	/* Dallas Semiconductor MAXQ30 Core Micro-controllers */#define EM_XIMO16	170	/* New Japan Radio (NJR) 16-bit DSP Processor */#define EM_MANIK	171	/* M2000 Reconfigurable RISC Microprocessor */#define EM_CRAYNV2	172	/* Cray Inc. NV2 vector architecture */#define EM_RX		173	/* Renesas RX family */#define EM_METAG	174	/* Imagination Technologies Meta processor architecture */#define EM_MCST_ELBRUS	175	/* MCST Elbrus general purpose hardware architecture */#define EM_ECOG16	176	/* Cyan Technology eCOG16 family */#define EM_CR16		177	/* National Semiconductor CompactRISC 16-bit processor */#define EM_ETPU		178	/* Freescale Extended Time Processing Unit */#define EM_SLE9X	179	/* Infineon Technologies SLE9X core */#define EM_L1OM		180	/* Intel L1OM */#define EM_K1OM		181	/* Intel K1OM */#define EM_INTEL182	182	/* Reserved by Intel */#define EM_AARCH64	183	/* ARM 64-bit architecture */#define EM_ARM184	184	/* Reserved by ARM */#define EM_AVR32	185	/* Atmel Corporation 32-bit microprocessor family */#define EM_STM8		186	/* STMicroeletronics STM8 8-bit microcontroller */#define EM_TILE64	187	/* Tilera TILE64 multicore architecture family */#define EM_TILEPRO	188	/* Tilera TILEPro multicore architecture family */#define EM_MICROBLAZE	189	/* Xilinx MicroBlaze 32-bit RISC soft processor core */#define EM_CUDA		190	/* NVIDIA CUDA architecture */#define EM_TILEGX	191	/* Tilera TILE-Gx multicore architecture family */#define EM_CLOUDSHIELD 	192 	/* CloudShield architecture family */#define EM_COREA_1ST 	193 	/* KIPO-KAIST Core-A 1st generation processor family */#define EM_COREA_2ND 	194 	/* KIPO-KAIST Core-A 2nd generation processor family */#define EM_ARC_COMPACT2 195	/* Synopsys ARCompact V2 */#define EM_OPEN8 	196 	/* Open8 8-bit RISC soft processor core */#define EM_RL78		197	/* Renesas RL78 family.  */#define EM_VIDEOCORE5 	198 	/* Broadcom VideoCore V processor */#define EM_78K0R	199	/* Renesas 78K0R.  */#define EM_56800EX 	200 	/* Freescale 56800EX Digital Signal Controller (DSC) */#define EM_BA1 		201 	/* Beyond BA1 CPU architecture */#define EM_BA2 		202 	/* Beyond BA2 CPU architecture */#define EM_XCORE 	203 	/* XMOS xCORE processor family */#define EM_MCHP_PIC 	204 	/* Microchip 8-bit PIC(r) family */#define EM_INTELGT	205	/* Intel Graphics Technology */#define EM_INTEL206	206	/* Reserved by Intel */#define EM_INTEL207	207	/* Reserved by Intel */#define EM_INTEL208	208	/* Reserved by Intel */#define EM_INTEL209	209	/* Reserved by Intel */#define EM_KM32 	210 	/* KM211 KM32 32-bit processor */#define EM_KMX32 	211 	/* KM211 KMX32 32-bit processor */#define EM_KMX16 	212 	/* KM211 KMX16 16-bit processor */#define EM_KMX8 	213 	/* KM211 KMX8 8-bit processor */#define EM_KVARC 	214 	/* KM211 KVARC processor */#define EM_CDP 		215 	/* Paneve CDP architecture family */#define EM_COGE 	216 	/* Cognitive Smart Memory Processor */#define EM_COOL 	217 	/* Bluechip Systems CoolEngine */#define EM_NORC 	218 	/* Nanoradio Optimized RISC */#define EM_CSR_KALIMBA 	219 	/* CSR Kalimba architecture family */#define EM_Z80 		220 	/* Zilog Z80 */#define EM_VISIUM	221	/* Controls and Data Services VISIUMcore processor */#define EM_FT32         222     /* FTDI Chip FT32 high performance 32-bit RISC architecture */#define EM_MOXIE        223     /* Moxie processor family */#define EM_AMDGPU 	224 	/* AMD GPU architecture */#define EM_RISCV 	243 	/* RISC-V */#define EM_LANAI	244	/* Lanai 32-bit processor.  */#define EM_CEVA		245	/* CEVA Processor Architecture Family */#define EM_CEVA_X2	246	/* CEVA X2 Processor Family */#define EM_BPF		247	/* Linux BPF – in-kernel virtual machine.  */#define EM_GRAPHCORE_IPU 248	/* Graphcore Intelligent Processing Unit */#define EM_IMG1		249	/* Imagination Technologies */#define EM_NFP		250	/* Netronome Flow Processor.  */#define EM_VE		251	/* NEC Vector Engine */#define EM_CSKY		252	/* C-SKY processor family.  */#define EM_ARC_COMPACT3_64 253	/* Synopsys ARCv2.3 64-bit */#define EM_MCS6502	254	/* MOS Technology MCS 6502 processor */#define EM_ARC_COMPACT3	255	/* Synopsys ARCv2.3 32-bit */#define EM_KVX		256	/* Kalray VLIW core of the MPPA processor family */#define EM_65816	257	/* WDC 65816/65C816 */#define EM_LOONGARCH	258	/* LoongArch */#define EM_KF32		259	/* ChipON KungFu32 */#define EM_U16_U8CORE	260	/* LAPIS nX-U16/U8 */#define EM_TACHYUM	261	/* Tachyum */#define EM_56800EF	262	/* NXP 56800EF Digital Signal Controller (DSC) */ /* If it is necessary to assign new unofficial EM_* values, please pick large   random numbers (0x8523, 0xa7f2, etc.) to minimize the chances of collision   with official or non-GNU unofficial values.    NOTE: Do not just increment the most recent number by one.   Somebody else somewhere will do exactly the same thing, and you   will have a collision.  Instead, pick a random number.    Normally, each entity or maintainer responsible for a machine with an   unofficial e_machine number should eventually ask registry@sco.com for   an officially blessed number to be added to the list above.	*/ /* AVR magic number.  Written in the absense of an ABI.  */#define EM_AVR_OLD		0x1057 /* MSP430 magic number.  Written in the absense of everything.  */#define EM_MSP430_OLD		0x1059 /* Morpho MT.   Written in the absense of an ABI.  */#define EM_MT			0x2530 /* FR30 magic number - no EABI available.  */#define EM_CYGNUS_FR30		0x3330 /* Unofficial value for Web Assembly binaries, as used by LLVM.  */#define EM_WEBASSEMBLY		0x4157 /* Freescale S12Z.   The Freescale toolchain generates elf files with this value.  */#define EM_S12Z               0x4DEF /* DLX magic number.  Written in the absense of an ABI.  */#define EM_DLX			0x5aa5 /* FRV magic number - no EABI available??.  */#define EM_CYGNUS_FRV		0x5441 /* Infineon Technologies 16-bit microcontroller with C166-V2 core.  */#define EM_XC16X		0x4688 /* D10V backend magic number.  Written in the absence of an ABI.  */#define EM_CYGNUS_D10V		0x7650 /* D30V backend magic number.  Written in the absence of an ABI.  */#define EM_CYGNUS_D30V		0x7676 /* Ubicom IP2xxx;   Written in the absense of an ABI.  */#define EM_IP2K_OLD		0x8217 /* Cygnus PowerPC ELF backend.  Written in the absence of an ABI.  */#define EM_CYGNUS_POWERPC	0x9025 /* Alpha backend magic number.  Written in the absence of an ABI.  */#define EM_ALPHA		0x9026 /* Cygnus M32R ELF backend.  Written in the absence of an ABI.  */#define EM_CYGNUS_M32R		0x9041 /* V850 backend magic number.  Written in the absense of an ABI.  */#define EM_CYGNUS_V850		0x9080 /* old S/390 backend magic number. Written in the absence of an ABI.  */#define EM_S390_OLD		0xa390 /* Old, unofficial value for Xtensa.  */#define EM_XTENSA_OLD		0xabc7 #define EM_XSTORMY16		0xad45 /* mn10200 and mn10300 backend magic numbers.   Written in the absense of an ABI.  */#define EM_CYGNUS_MN10300	0xbeef#define EM_CYGNUS_MN10200	0xdead /* Renesas M32C and M16C.  */#define EM_M32C_OLD		0xFEB0 /* Vitesse IQ2000.  */#define EM_IQ2000		0xFEBA /* NIOS magic number - no EABI available.  */#define EM_NIOS32		0xFEBB #define EM_CYGNUS_MEP		0xF00D  /* Toshiba MeP */ /* Old, unofficial value for Moxie.  */#define EM_MOXIE_OLD            0xFEED #define EM_MICROBLAZE_OLD	0xbaab	/* Old MicroBlaze */ #define EM_ADAPTEVA_EPIPHANY	0x1223  /* Adapteva's Epiphany architecture.  */ /* Old constant that might be in use by some software. */#define EM_OPENRISC		EM_OR1K /* C-SKY historically used 39, the same value as MCORE, from which the   architecture was derived.  */#define EM_CSKY_OLD		EM_MCORE /* See the above comment before you add a new EM_* value here.  */ /* Values for e_version.  */ #define EV_NONE		0		/* Invalid ELF version */#define EV_CURRENT	1		/* Current version */ /* Value for e_phnum. */#define PN_XNUM		0xffff		/* Extended numbering */ /* Values for program header, p_type field.  */ #define PT_NULL		0		/* Program header table entry unused */#define PT_LOAD		1		/* Loadable program segment */#define PT_DYNAMIC	2		/* Dynamic linking information */#define PT_INTERP	3		/* Program interpreter */#define PT_NOTE		4		/* Auxiliary information */#define PT_SHLIB	5		/* Reserved, unspecified semantics */#define PT_PHDR		6		/* Entry for header table itself */#define PT_TLS		7		/* Thread local storage segment */#define	PT_NUM		8		/* Number of defined types.  */ #define PT_LOOS		0x60000000	/* OS-specific */#define PT_HIOS		0x6fffffff	/* OS-specific */ #define PT_SUNW_UNWIND  (PT_LOOS + 0x464e550)#define PT_GNU_EH_FRAME	(PT_LOOS + 0x474e550) /* Frame unwind information */#define PT_SUNW_EH_FRAME PT_GNU_EH_FRAME      /* Solaris uses the same value */#define PT_GNU_STACK	(PT_LOOS + 0x474e551) /* Stack flags */#define PT_GNU_RELRO	(PT_LOOS + 0x474e552) /* Read-only after relocation */#define PT_GNU_PROPERTY	(PT_LOOS + 0x474e553) /* GNU property */#define PT_GNU_SFRAME	(PT_LOOS + 0x474e554) /* SFrame stack trace information */ /* OpenBSD segment types.  */#define PT_OPENBSD_MUTABLE   (PT_LOOS + 0x5a3dbe5)  /* Like bss, but not immutable.  */#define PT_OPENBSD_RANDOMIZE (PT_LOOS + 0x5a3dbe6)  /* Fill with random data.  */#define PT_OPENBSD_WXNEEDED  (PT_LOOS + 0x5a3dbe7)  /* Program does W^X violations.  */#define PT_OPENBSD_NOBTCFI   (PT_LOOS + 0x5a3dbe8)  /* No branch target CFI.  */#define PT_OPENBSD_SYSCALLS  (PT_LOOS + 0x5a3dbe9)  /* System call sites.  */

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