/* MIPS ELF support for BFD.   Copyright (C) 1993-2026 Free Software Foundation, Inc.    By Ian Lance Taylor, Cygnus Support, <ian@cygnus.com>, from   information in the System V Application Binary Interface, MIPS   Processor Supplement.    This file is part of BFD, the Binary File Descriptor library.    This program is free software; you can redistribute it and/or modify   it under the terms of the GNU General Public License as published by   the Free Software Foundation; either version 3 of the License, or   (at your option) any later version.    This program is distributed in the hope that it will be useful,   but WITHOUT ANY WARRANTY; without even the implied warranty of   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the   GNU General Public License for more details.    You should have received a copy of the GNU General Public License   along with this program; if not, write to the Free Software   Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,   MA 02110-1301, USA.  */ /* This file holds definitions specific to the MIPS ELF ABI.  Note   that most of this is not actually implemented by BFD.  */ #ifndef _ELF_MIPS_H#define _ELF_MIPS_H #include "elf/reloc-macros.h" #ifdef __cplusplusextern "C" {#endif /* Relocation types.  */START_RELOC_NUMBERS (elf_mips_reloc_type)  RELOC_NUMBER (R_MIPS_NONE, 0)  RELOC_NUMBER (R_MIPS_16, 1)  RELOC_NUMBER (R_MIPS_32, 2)		/* In Elf 64: alias R_MIPS_ADD */  RELOC_NUMBER (R_MIPS_REL32, 3)	/* In Elf 64: alias R_MIPS_REL */  RELOC_NUMBER (R_MIPS_26, 4)  RELOC_NUMBER (R_MIPS_HI16, 5)  RELOC_NUMBER (R_MIPS_LO16, 6)  RELOC_NUMBER (R_MIPS_GPREL16, 7)	/* In Elf 64: alias R_MIPS_GPREL */  RELOC_NUMBER (R_MIPS_LITERAL, 8)  RELOC_NUMBER (R_MIPS_GOT16, 9)	/* In Elf 64: alias R_MIPS_GOT */  RELOC_NUMBER (R_MIPS_PC16, 10)  RELOC_NUMBER (R_MIPS_CALL16, 11)	/* In Elf 64: alias R_MIPS_CALL */  RELOC_NUMBER (R_MIPS_GPREL32, 12)  /* The remaining relocs are defined on Irix, although they are not     in the MIPS ELF ABI.  */  RELOC_NUMBER (R_MIPS_UNUSED1, 13)  RELOC_NUMBER (R_MIPS_UNUSED2, 14)  RELOC_NUMBER (R_MIPS_UNUSED3, 15)  RELOC_NUMBER (R_MIPS_SHIFT5, 16)  RELOC_NUMBER (R_MIPS_SHIFT6, 17)  RELOC_NUMBER (R_MIPS_64, 18)  RELOC_NUMBER (R_MIPS_GOT_DISP, 19)  RELOC_NUMBER (R_MIPS_GOT_PAGE, 20)  RELOC_NUMBER (R_MIPS_GOT_OFST, 21)  RELOC_NUMBER (R_MIPS_GOT_HI16, 22)  RELOC_NUMBER (R_MIPS_GOT_LO16, 23)  RELOC_NUMBER (R_MIPS_SUB, 24)  RELOC_NUMBER (R_MIPS_INSERT_A, 25)  RELOC_NUMBER (R_MIPS_INSERT_B, 26)  RELOC_NUMBER (R_MIPS_DELETE, 27)  RELOC_NUMBER (R_MIPS_HIGHER, 28)  RELOC_NUMBER (R_MIPS_HIGHEST, 29)  RELOC_NUMBER (R_MIPS_CALL_HI16, 30)  RELOC_NUMBER (R_MIPS_CALL_LO16, 31)  RELOC_NUMBER (R_MIPS_SCN_DISP, 32)  RELOC_NUMBER (R_MIPS_REL16, 33)  RELOC_NUMBER (R_MIPS_ADD_IMMEDIATE, 34)  RELOC_NUMBER (R_MIPS_PJUMP, 35)  RELOC_NUMBER (R_MIPS_RELGOT, 36)  RELOC_NUMBER (R_MIPS_JALR, 37)  /* TLS relocations.  */  RELOC_NUMBER (R_MIPS_TLS_DTPMOD32, 38)  RELOC_NUMBER (R_MIPS_TLS_DTPREL32, 39)  RELOC_NUMBER (R_MIPS_TLS_DTPMOD64, 40)  RELOC_NUMBER (R_MIPS_TLS_DTPREL64, 41)  RELOC_NUMBER (R_MIPS_TLS_GD, 42)  RELOC_NUMBER (R_MIPS_TLS_LDM, 43)  RELOC_NUMBER (R_MIPS_TLS_DTPREL_HI16, 44)  RELOC_NUMBER (R_MIPS_TLS_DTPREL_LO16, 45)  RELOC_NUMBER (R_MIPS_TLS_GOTTPREL, 46)  RELOC_NUMBER (R_MIPS_TLS_TPREL32, 47)  RELOC_NUMBER (R_MIPS_TLS_TPREL64, 48)  RELOC_NUMBER (R_MIPS_TLS_TPREL_HI16, 49)  RELOC_NUMBER (R_MIPS_TLS_TPREL_LO16, 50)  RELOC_NUMBER (R_MIPS_GLOB_DAT, 51)  /* Space to grow */  RELOC_NUMBER (R_MIPS_PC21_S2, 60)  RELOC_NUMBER (R_MIPS_PC26_S2, 61)  RELOC_NUMBER (R_MIPS_PC18_S3, 62)  RELOC_NUMBER (R_MIPS_PC19_S2, 63)  RELOC_NUMBER (R_MIPS_PCHI16, 64)  RELOC_NUMBER (R_MIPS_PCLO16, 65)  FAKE_RELOC (R_MIPS_max, 66)  /* These relocs are used for the mips16.  */  FAKE_RELOC (R_MIPS16_min, 100)  RELOC_NUMBER (R_MIPS16_26, 100)  RELOC_NUMBER (R_MIPS16_GPREL, 101)  RELOC_NUMBER (R_MIPS16_GOT16, 102)  RELOC_NUMBER (R_MIPS16_CALL16, 103)  RELOC_NUMBER (R_MIPS16_HI16, 104)  RELOC_NUMBER (R_MIPS16_LO16, 105)  RELOC_NUMBER (R_MIPS16_TLS_GD, 106)  RELOC_NUMBER (R_MIPS16_TLS_LDM, 107)  RELOC_NUMBER (R_MIPS16_TLS_DTPREL_HI16, 108)  RELOC_NUMBER (R_MIPS16_TLS_DTPREL_LO16, 109)  RELOC_NUMBER (R_MIPS16_TLS_GOTTPREL, 110)  RELOC_NUMBER (R_MIPS16_TLS_TPREL_HI16, 111)  RELOC_NUMBER (R_MIPS16_TLS_TPREL_LO16, 112)  RELOC_NUMBER (R_MIPS16_PC16_S1, 113)  FAKE_RELOC (R_MIPS16_max, 114)  /* These relocations are specific to VxWorks.  */  RELOC_NUMBER (R_MIPS_COPY, 126)  RELOC_NUMBER (R_MIPS_JUMP_SLOT, 127)   /* These relocations are specific to microMIPS.  */  FAKE_RELOC (R_MICROMIPS_min, 130)  RELOC_NUMBER (R_MICROMIPS_26_S1, 133)  RELOC_NUMBER (R_MICROMIPS_HI16, 134)  RELOC_NUMBER (R_MICROMIPS_LO16, 135)  RELOC_NUMBER (R_MICROMIPS_GPREL16, 136)	/* In Elf 64:						   alias R_MICROMIPS_GPREL */  RELOC_NUMBER (R_MICROMIPS_LITERAL, 137)  RELOC_NUMBER (R_MICROMIPS_GOT16, 138)		/* In Elf 64:						   alias R_MICROMIPS_GOT */  RELOC_NUMBER (R_MICROMIPS_PC7_S1, 139)  RELOC_NUMBER (R_MICROMIPS_PC10_S1, 140)  RELOC_NUMBER (R_MICROMIPS_PC16_S1, 141)  RELOC_NUMBER (R_MICROMIPS_CALL16, 142)	/* In Elf 64:						   alias R_MICROMIPS_CALL */  RELOC_NUMBER (R_MICROMIPS_GOT_DISP, 145)  RELOC_NUMBER (R_MICROMIPS_GOT_PAGE, 146)  RELOC_NUMBER (R_MICROMIPS_GOT_OFST, 147)  RELOC_NUMBER (R_MICROMIPS_GOT_HI16, 148)  RELOC_NUMBER (R_MICROMIPS_GOT_LO16, 149)  RELOC_NUMBER (R_MICROMIPS_SUB, 150)  RELOC_NUMBER (R_MICROMIPS_HIGHER, 151)  RELOC_NUMBER (R_MICROMIPS_HIGHEST, 152)  RELOC_NUMBER (R_MICROMIPS_CALL_HI16, 153)  RELOC_NUMBER (R_MICROMIPS_CALL_LO16, 154)  RELOC_NUMBER (R_MICROMIPS_SCN_DISP, 155)  RELOC_NUMBER (R_MICROMIPS_JALR, 156)  RELOC_NUMBER (R_MICROMIPS_HI0_LO16, 157)  /* TLS relocations.  */  RELOC_NUMBER (R_MICROMIPS_TLS_GD, 162)  RELOC_NUMBER (R_MICROMIPS_TLS_LDM, 163)  RELOC_NUMBER (R_MICROMIPS_TLS_DTPREL_HI16, 164)  RELOC_NUMBER (R_MICROMIPS_TLS_DTPREL_LO16, 165)  RELOC_NUMBER (R_MICROMIPS_TLS_GOTTPREL, 166)  RELOC_NUMBER (R_MICROMIPS_TLS_TPREL_HI16, 169)  RELOC_NUMBER (R_MICROMIPS_TLS_TPREL_LO16, 170)  /* microMIPS GP- and PC-relative relocations. */  RELOC_NUMBER (R_MICROMIPS_GPREL7_S2, 172)  RELOC_NUMBER (R_MICROMIPS_PC23_S2, 173)  FAKE_RELOC (R_MICROMIPS_max, 174)   /* This was a GNU extension used by embedded-PIC.  It was co-opted by     mips-linux for exception-handling data.  GCC stopped using it in     May, 2004, then started using it again for compact unwind tables.  */  RELOC_NUMBER (R_MIPS_PC32, 248)  RELOC_NUMBER (R_MIPS_EH, 249)  /* FIXME: this relocation is used internally by gas.  */  RELOC_NUMBER (R_MIPS_GNU_REL16_S2, 250)  /* These are GNU extensions to enable C++ vtable garbage collection.  */  RELOC_NUMBER (R_MIPS_GNU_VTINHERIT, 253)  RELOC_NUMBER (R_MIPS_GNU_VTENTRY, 254)END_RELOC_NUMBERS (R_MIPS_maxext) /* Processor specific flags for the ELF header e_flags field.  */ /* At least one .noreorder directive appears in the source.  */#define EF_MIPS_NOREORDER	0x00000001 /* File contains position independent code.  */#define EF_MIPS_PIC		0x00000002 /* Code in file uses the standard calling sequence for calling   position independent code.  */#define EF_MIPS_CPIC		0x00000004 /* ???  Unknown flag, set in IRIX 6's BSDdup2.o in libbsd.a.  */#define EF_MIPS_XGOT		0x00000008 /* Code in file uses UCODE (obsolete) */#define EF_MIPS_UCODE		0x00000010 /* Code in file uses new ABI (-n32 on Irix 6).  */#define EF_MIPS_ABI2		0x00000020 /* Process the .MIPS.options section first by ld */#define EF_MIPS_OPTIONS_FIRST	0x00000080 /* Indicates code compiled for a 64-bit machine in 32-bit mode   (regs are 32-bits wide).  */#define EF_MIPS_32BITMODE	0x00000100 /* 32-bit machine but FP registers are 64 bit (-mfp64).  */#define EF_MIPS_FP64		0x00000200 /* Code in file uses the IEEE 754-2008 NaN encoding convention.  */#define EF_MIPS_NAN2008		0x00000400 /* Architectural Extensions used by this file */#define EF_MIPS_ARCH_ASE	0x0f000000 /* Use MDMX multimedia extensions */#define EF_MIPS_ARCH_ASE_MDMX	0x08000000 /* Use MIPS-16 ISA extensions */#define EF_MIPS_ARCH_ASE_M16	0x04000000 /* Use MICROMIPS ISA extensions.  */#define EF_MIPS_ARCH_ASE_MICROMIPS	0x02000000 /* Four bit MIPS architecture field.  */#define EF_MIPS_ARCH		0xf0000000 /* -mips1 code.  */#define EF_MIPS_ARCH_1		0x00000000 /* -mips2 code.  */#define EF_MIPS_ARCH_2		0x10000000 /* -mips3 code.  */#define EF_MIPS_ARCH_3		0x20000000 /* -mips4 code.  */#define EF_MIPS_ARCH_4		0x30000000 /* -mips5 code.  */#define EF_MIPS_ARCH_5           0x40000000 /* -mips32 code.  */#define EF_MIPS_ARCH_32          0x50000000 /* -mips64 code.  */#define EF_MIPS_ARCH_64          0x60000000 /* -mips32r2 code.  */#define EF_MIPS_ARCH_32R2        0x70000000 /* -mips64r2 code.  */#define EF_MIPS_ARCH_64R2        0x80000000 /* -mips32r6 code.  */#define EF_MIPS_ARCH_32R6        0x90000000 /* -mips64r6 code.  */#define EF_MIPS_ARCH_64R6        0xa0000000 /* The ABI of the file.  Also see EF_MIPS_ABI2 above. */#define EF_MIPS_ABI		0x0000F000 /* The original o32 abi. */#define EF_MIPS_ABI_O32          0x00001000 /* O32 extended to work on 64 bit architectures */#define EF_MIPS_ABI_O64          0x00002000 /* EABI in 32 bit mode */#define EF_MIPS_ABI_EABI32       0x00003000 /* EABI in 64 bit mode */#define EF_MIPS_ABI_EABI64       0x00004000 /* In order to support backwards compatibility we also   define the old versions of some of these constants.  */#define E_MIPS_ARCH_1     EF_MIPS_ARCH_1#define E_MIPS_ARCH_2     EF_MIPS_ARCH_2#define E_MIPS_ARCH_3     EF_MIPS_ARCH_3#define E_MIPS_ARCH_4     EF_MIPS_ARCH_4#define E_MIPS_ARCH_5     EF_MIPS_ARCH_5#define E_MIPS_ARCH_32    EF_MIPS_ARCH_32#define E_MIPS_ARCH_64    EF_MIPS_ARCH_64#define E_MIPS_ARCH_32R2  EF_MIPS_ARCH_32R2#define E_MIPS_ARCH_64R2  EF_MIPS_ARCH_64R2#define E_MIPS_ARCH_32R6  EF_MIPS_ARCH_32R6#define E_MIPS_ARCH_64R6  EF_MIPS_ARCH_64R6#define E_MIPS_ABI_O32    EF_MIPS_ABI_O32#define E_MIPS_ABI_O64    EF_MIPS_ABI_O64#define E_MIPS_ABI_EABI32 EF_MIPS_ABI_EABI32#define E_MIPS_ABI_EABI64 EF_MIPS_ABI_EABI64  /* Machine variant if we know it.  This field was invented at Cygnus,   but it is hoped that other vendors will adopt it.  If some standard   is developed, this code should be changed to follow it. */ #define EF_MIPS_MACH		0x00FF0000 /* Cygnus is choosing values between 80 and 9F;   00 - 7F should be left for a future standard;   the rest are open. */ #define EF_MIPS_MACH_3900	0x00810000#define EF_MIPS_MACH_4010	0x00820000#define EF_MIPS_MACH_4100	0x00830000#define EF_MIPS_MACH_ALLEGREX	0x00840000#define EF_MIPS_MACH_4650	0x00850000#define EF_MIPS_MACH_4120	0x00870000#define EF_MIPS_MACH_4111	0x00880000#define EF_MIPS_MACH_SB1         0x008a0000#define EF_MIPS_MACH_OCTEON	0x008b0000#define EF_MIPS_MACH_XLR     	0x008c0000#define EF_MIPS_MACH_OCTEON2	0x008d0000#define EF_MIPS_MACH_OCTEON3	0x008e0000#define EF_MIPS_MACH_5400	0x00910000#define EF_MIPS_MACH_5900	0x00920000#define EF_MIPS_MACH_IAMR2	0x00930000#define EF_MIPS_MACH_5500	0x00980000#define EF_MIPS_MACH_9000	0x00990000#define EF_MIPS_MACH_LS2E        0x00A00000#define EF_MIPS_MACH_LS2F        0x00A10000#define EF_MIPS_MACH_GS464       0x00A20000#define EF_MIPS_MACH_GS464E	0x00A30000#define EF_MIPS_MACH_GS264E	0x00A40000 /* In order to support backwards compatibility we also   define the old versions of some of these constants.  */#define E_MIPS_MACH_3900      EF_MIPS_MACH_3900 #define E_MIPS_MACH_4010      EF_MIPS_MACH_4010 #define E_MIPS_MACH_4100      EF_MIPS_MACH_4100 #define E_MIPS_MACH_ALLEGREX  EF_MIPS_MACH_ALLEGREX #define E_MIPS_MACH_4650      EF_MIPS_MACH_4650 #define E_MIPS_MACH_4120      EF_MIPS_MACH_4120 #define E_MIPS_MACH_4111      EF_MIPS_MACH_4111 #define E_MIPS_MACH_SB1       EF_MIPS_MACH_SB1 #define E_MIPS_MACH_OCTEON    EF_MIPS_MACH_OCTEON #define E_MIPS_MACH_XLR       EF_MIPS_MACH_XLR #define E_MIPS_MACH_OCTEON2   EF_MIPS_MACH_OCTEON2 #define E_MIPS_MACH_OCTEON3   EF_MIPS_MACH_OCTEON3 #define E_MIPS_MACH_5400      EF_MIPS_MACH_5400 #define E_MIPS_MACH_5900      EF_MIPS_MACH_5900 #define E_MIPS_MACH_IAMR2     EF_MIPS_MACH_IAMR2 #define E_MIPS_MACH_5500      EF_MIPS_MACH_5500 #define E_MIPS_MACH_9000      EF_MIPS_MACH_9000 #define E_MIPS_MACH_LS2E      EF_MIPS_MACH_LS2E #define E_MIPS_MACH_LS2F      EF_MIPS_MACH_LS2F #define E_MIPS_MACH_GS464     EF_MIPS_MACH_GS464 #define E_MIPS_MACH_GS464E    EF_MIPS_MACH_GS464E #define E_MIPS_MACH_GS264E    EF_MIPS_MACH_GS264E  /* Processor specific section indices.  These sections do not actually   exist.  Symbols with a st_shndx field corresponding to one of these   values have a special meaning.  */ /* Defined and allocated common symbol.  Value is virtual address.  If   relocated, alignment must be preserved.  */#define SHN_MIPS_ACOMMON	SHN_LORESERVE /* Defined and allocated text symbol.  Value is virtual address.   Occur in the dynamic symbol table of Alpha OSF/1 and Irix 5 executables.  */#define SHN_MIPS_TEXT		(SHN_LORESERVE + 1) /* Defined and allocated data symbol.  Value is virtual address.   Occur in the dynamic symbol table of Alpha OSF/1 and Irix 5 executables.  */#define SHN_MIPS_DATA		(SHN_LORESERVE + 2) /* Small common symbol.  */#define SHN_MIPS_SCOMMON	(SHN_LORESERVE + 3) /* Small undefined symbol.  */#define SHN_MIPS_SUNDEFINED	(SHN_LORESERVE + 4)/* Processor specific section types.  */ /* Section contains the set of dynamic shared objects used when   statically linking.  */#define SHT_MIPS_LIBLIST	(SHT_LOPROC + 0) /* I'm not sure what this is, but it's used on Irix 5.  */#define SHT_MIPS_MSYM		(SHT_LOPROC + 1) /* Section contains list of symbols whose definitions conflict with   symbols defined in shared objects.  */#define SHT_MIPS_CONFLICT	(SHT_LOPROC + 2) /* Section contains the global pointer table.  */#define SHT_MIPS_GPTAB		(SHT_LOPROC + 3) /* Section contains microcode information.  The exact format is   unspecified.  */#define SHT_MIPS_UCODE		(SHT_LOPROC + 4) /* Section contains some sort of debugging information.  The exact   format is unspecified.  It's probably ECOFF symbols.  */#define SHT_MIPS_DEBUG		(SHT_LOPROC + 5) /* Section contains register usage information.  */#define SHT_MIPS_REGINFO	(SHT_LOPROC + 6) /* ??? */#define SHT_MIPS_PACKAGE	(SHT_LOPROC + 7) /* ??? */#define SHT_MIPS_PACKSYM	(SHT_LOPROC + 8) /* ??? */#define SHT_MIPS_RELD		(SHT_LOPROC + 9) /* Note: SHT_LOPROC + 0xa is missing...  */  /* Section contains interface information.  */#define SHT_MIPS_IFACE		(SHT_LOPROC + 0xb) /* Section contains description of contents of another section.  */#define SHT_MIPS_CONTENT	(SHT_LOPROC + 0xc) /* Section contains miscellaneous options.  */#define SHT_MIPS_OPTIONS	(SHT_LOPROC + 0xd) /* Note: SHT_LOPROC + 0xe is missing...  *//* Note: SHT_LOPROC + 0xf is missing...  */ /* ??? */#define SHT_MIPS_SHDR		(SHT_LOPROC + 0x10) /* ??? */#define SHT_MIPS_FDESC		(SHT_LOPROC + 0x11) /* ??? */#define SHT_MIPS_EXTSYM		(SHT_LOPROC + 0x12) /* ??? */#define SHT_MIPS_DENSE		(SHT_LOPROC + 0x13) /* ??? */#define SHT_MIPS_PDESC		(SHT_LOPROC + 0x14) /* ??? */#define SHT_MIPS_LOCSYM		(SHT_LOPROC + 0x15) /* ??? */#define SHT_MIPS_AUXSYM		(SHT_LOPROC + 0x16) /* ??? */#define SHT_MIPS_OPTSYM		(SHT_LOPROC + 0x17) /* ??? */#define SHT_MIPS_LOCSTR		(SHT_LOPROC + 0x18) /* ??? */#define SHT_MIPS_LINE		(SHT_LOPROC + 0x19) /* ??? */#define SHT_MIPS_RFDESC		(SHT_LOPROC + 0x1a) /* Delta C++: symbol table */#define SHT_MIPS_DELTASYM	(SHT_LOPROC + 0x1b) /* Delta C++: instance table */#define SHT_MIPS_DELTAINST	(SHT_LOPROC + 0x1c) /* Delta C++: class table */#define SHT_MIPS_DELTACLASS	(SHT_LOPROC + 0x1d) /* DWARF debugging section.  */#define SHT_MIPS_DWARF		(SHT_LOPROC + 0x1e) /* Delta C++: declarations */#define SHT_MIPS_DELTADECL	(SHT_LOPROC + 0x1f) /* List of libraries the binary depends on.  Includes a time stamp, version   number.  */#define SHT_MIPS_SYMBOL_LIB	(SHT_LOPROC + 0x20) /* Events section.  */#define SHT_MIPS_EVENTS		(SHT_LOPROC + 0x21) /* ??? */#define SHT_MIPS_TRANSLATE	(SHT_LOPROC + 0x22) /* Special pixie sections */#define SHT_MIPS_PIXIE		(SHT_LOPROC + 0x23) /* Address translation table (for debug info) */#define SHT_MIPS_XLATE		(SHT_LOPROC + 0x24) /* SGI internal address translation table (for debug info) */#define SHT_MIPS_XLATE_DEBUG	(SHT_LOPROC + 0x25) /* Intermediate code */#define SHT_MIPS_WHIRL		(SHT_LOPROC + 0x26) /* C++ exception handling region info */#define SHT_MIPS_EH_REGION	(SHT_LOPROC + 0x27) /* Obsolete address translation table (for debug info) */#define SHT_MIPS_XLATE_OLD	(SHT_LOPROC + 0x28) /* Runtime procedure descriptor table exception information (ucode) ??? */#define SHT_MIPS_PDR_EXCEPTION	(SHT_LOPROC + 0x29) 

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