History

x86-asm: Fix signed constants and opcode order

Two things: negative constants were rejected (e.g. "add $-15,%eax"). Second the insn order was such that the arithmetic IM8S forms weren't used (always the IM32 ones). Switching them prefers those but requires a fix for size calculation in case the opcodes were OPC_ARITH and OPC_WLX (whose size starts with 1, not zero).

Michael Matz committed 10 years ago

Commit 4f27e211 parent 080ec9f4 files · +12 −3Browse files

Unified · Split

4 files
  1. i386-asm.c +3 −1
  2. i386-asm.h +1 −1
  3. tests/asmtest.S +7 −0
  4. x86_64-asm.h +1 −1
i386-asm.c+3−1
@@ -355,7 +355,7 @@ static void parse_operand(TCCState *s1, Operand *op) · 354 unmodified lines
355355 if (op->e.v == (uint16_t)op->e.v)
356356 op->type |= OP_IM16;
357357 #ifdef TCC_TARGET_X86_64
358− if (op->e.v != (uint32_t)op->e.v)
358+ if (op->e.v != (int32_t)op->e.v)
359359 op->type = OP_IM64;
360360 #endif
361361 }
@@ -551,6 +551,8 @@ ST_FUNC void asm_opcode(TCCState *s1, int opcode) · 189 unmodified lines
551551 if (!(opcode >= pa->sym && opcode < pa->sym + 8*NBWLX))
552552 continue;
553553 s = (opcode - pa->sym) % NBWLX;
554+ if ((pa->instr_type & OPC_BWLX) == OPC_WLX)
555+ s++;
554556 } else if (pa->instr_type & OPC_SHIFT) {
555557 if (!(opcode >= pa->sym && opcode < pa->sym + 7*NBWLX))
556558 continue;
i386-asm.h+1−1
@@ -157,8 +157,8 @@ ALT(DEF_ASM_OP2(lgs, 0x0fb5, 0, OPC_MODRM, OPT_EA, OPT_REG32)) · 156 unmodified lines
157157 ALT(DEF_ASM_OP2(addb, 0x00, 0, OPC_ARITH | OPC_MODRM | OPC_BWLX, OPT_REG, OPT_EA | OPT_REG)) /* XXX: use D bit ? */
158158 ALT(DEF_ASM_OP2(addb, 0x02, 0, OPC_ARITH | OPC_MODRM | OPC_BWLX, OPT_EA | OPT_REG, OPT_REG))
159159 ALT(DEF_ASM_OP2(addb, 0x04, 0, OPC_ARITH | OPC_BWLX, OPT_IM, OPT_EAX))
160−ALT(DEF_ASM_OP2(addb, 0x80, 0, OPC_ARITH | OPC_MODRM | OPC_BWLX, OPT_IM, OPT_EA | OPT_REG))
161160 ALT(DEF_ASM_OP2(addw, 0x83, 0, OPC_ARITH | OPC_MODRM | OPC_WLX, OPT_IM8S, OPT_EA | OPT_REG))
161+ALT(DEF_ASM_OP2(addb, 0x80, 0, OPC_ARITH | OPC_MODRM | OPC_BWLX, OPT_IM, OPT_EA | OPT_REG))
162162
163163 ALT(DEF_ASM_OP2(testb, 0x84, 0, OPC_MODRM | OPC_BWLX, OPT_REG, OPT_EA | OPT_REG))
164164 ALT(DEF_ASM_OP2(testb, 0x84, 0, OPC_MODRM | OPC_BWLX, OPT_EA | OPT_REG, OPT_REG))
tests/asmtest.S+7−0
@@ -156,6 +156,8 @@ movl %ebx, %fs · 155 unmodified lines
156156
157157 addl $0x123, %eax
158158 add $0x123, %ebx
159+add $-16, %ecx
160+add $-0x123, %esi
159161 addl $0x123, 0x100
160162 addl $0x123, 0x100(%ebx)
161163 addl $0x123, 0x100(%ebx,%edx,2)
@@ -216,6 +218,8 @@ add (%ebx), %dl · 54 unmodified lines
216218 div %bl
217219 div %ecx, %eax
218220
221+and $15,%bx
222+and $-20,%edx
219223
220224 shl %edx
221225 shl $10, %edx
@@ -690,3 +694,6 @@ ft1: ft2: ft3: ft4: ft5: ft6: ft7: ft8: ft9: · 468 unmodified lines
690694 .type ft8,"function"
691695
692696 pause
697+.rept 6
698+ nop
699+.endr
x86_64-asm.h+1−1
@@ -166,8 +166,8 @@ ALT(DEF_ASM_OP2(lgs, 0x0fb5, 0, OPC_MODRM, OPT_EA, OPT_REG32)) · 165 unmodified lines
166166 ALT(DEF_ASM_OP2(addb, 0x00, 0, OPC_ARITH | OPC_MODRM | OPC_BWLX, OPT_REG, OPT_EA | OPT_REG)) /* XXX: use D bit ? */
167167 ALT(DEF_ASM_OP2(addb, 0x02, 0, OPC_ARITH | OPC_MODRM | OPC_BWLX, OPT_EA | OPT_REG, OPT_REG))
168168 ALT(DEF_ASM_OP2(addb, 0x04, 0, OPC_ARITH | OPC_BWLX, OPT_IM, OPT_EAX))
169−ALT(DEF_ASM_OP2(addb, 0x80, 0, OPC_ARITH | OPC_MODRM | OPC_BWLX, OPT_IM, OPT_EA | OPT_REG))
170169 ALT(DEF_ASM_OP2(addw, 0x83, 0, OPC_ARITH | OPC_MODRM | OPC_WLX, OPT_IM8S, OPT_EA | OPT_REG))
170+ALT(DEF_ASM_OP2(addb, 0x80, 0, OPC_ARITH | OPC_MODRM | OPC_BWLX, OPT_IM, OPT_EA | OPT_REG))
171171
172172 ALT(DEF_ASM_OP2(testb, 0x84, 0, OPC_MODRM | OPC_BWLX, OPT_REG, OPT_EA | OPT_REG))
173173 ALT(DEF_ASM_OP2(testb, 0x84, 0, OPC_MODRM | OPC_BWLX, OPT_EA | OPT_REG, OPT_REG))

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