/* * linux/drivers/video/arkfb.c -- Frame buffer device driver for ARK 2000PV * with ICS 5342 dac (it is easy to add support for different dacs). * * Copyright (c) 2007 Ondrej Zajicek <santiago@crfreenet.org> * * This file is subject to the terms and conditions of the GNU General Public * License. See the file COPYING in the main directory of this archive for * more details. * * Code is based on s3fb */ #include <linux/aperture.h>#include <linux/module.h>#include <linux/kernel.h>#include <linux/errno.h>#include <linux/string.h>#include <linux/mm.h>#include <linux/tty.h>#include <linux/slab.h>#include <linux/delay.h>#include <linux/fb.h>#include <linux/svga.h>#include <linux/init.h>#include <linux/pci.h>#include <linux/console.h> /* Why should fb driver call console functions? because console_lock() */#include <video/vga.h> struct arkfb_info { int mclk_freq; int wc_cookie; struct dac_info *dac; struct vgastate state; struct mutex open_lock; unsigned int ref_count; u32 pseudo_palette[16];}; /* ------------------------------------------------------------------------- */ static const struct svga_fb_format arkfb_formats[] = { { 0, {0, 6, 0}, {0, 6, 0}, {0, 6, 0}, {0, 0, 0}, 0, FB_TYPE_TEXT, FB_AUX_TEXT_SVGA_STEP4, FB_VISUAL_PSEUDOCOLOR, 8, 8}, { 4, {0, 6, 0}, {0, 6, 0}, {0, 6, 0}, {0, 0, 0}, 0, FB_TYPE_PACKED_PIXELS, 0, FB_VISUAL_PSEUDOCOLOR, 8, 16}, { 4, {0, 6, 0}, {0, 6, 0}, {0, 6, 0}, {0, 0, 0}, 1, FB_TYPE_INTERLEAVED_PLANES, 1, FB_VISUAL_PSEUDOCOLOR, 8, 16}, { 8, {0, 6, 0}, {0, 6, 0}, {0, 6, 0}, {0, 0, 0}, 0, FB_TYPE_PACKED_PIXELS, 0, FB_VISUAL_PSEUDOCOLOR, 8, 8}, {16, {10, 5, 0}, {5, 5, 0}, {0, 5, 0}, {0, 0, 0}, 0, FB_TYPE_PACKED_PIXELS, 0, FB_VISUAL_TRUECOLOR, 4, 4}, {16, {11, 5, 0}, {5, 6, 0}, {0, 5, 0}, {0, 0, 0}, 0, FB_TYPE_PACKED_PIXELS, 0, FB_VISUAL_TRUECOLOR, 4, 4}, {24, {16, 8, 0}, {8, 8, 0}, {0, 8, 0}, {0, 0, 0}, 0, FB_TYPE_PACKED_PIXELS, 0, FB_VISUAL_TRUECOLOR, 8, 8}, {32, {16, 8, 0}, {8, 8, 0}, {0, 8, 0}, {0, 0, 0}, 0, FB_TYPE_PACKED_PIXELS, 0, FB_VISUAL_TRUECOLOR, 2, 2}, SVGA_FORMAT_END}; /* CRT timing register sets */ static const struct vga_regset ark_h_total_regs[] = {{0x00, 0, 7}, {0x41, 7, 7}, VGA_REGSET_END};static const struct vga_regset ark_h_display_regs[] = {{0x01, 0, 7}, {0x41, 6, 6}, VGA_REGSET_END};static const struct vga_regset ark_h_blank_start_regs[] = {{0x02, 0, 7}, {0x41, 5, 5}, VGA_REGSET_END};static const struct vga_regset ark_h_blank_end_regs[] = {{0x03, 0, 4}, {0x05, 7, 7 }, VGA_REGSET_END};static const struct vga_regset ark_h_sync_start_regs[] = {{0x04, 0, 7}, {0x41, 4, 4}, VGA_REGSET_END};static const struct vga_regset ark_h_sync_end_regs[] = {{0x05, 0, 4}, VGA_REGSET_END}; static const struct vga_regset ark_v_total_regs[] = {{0x06, 0, 7}, {0x07, 0, 0}, {0x07, 5, 5}, {0x40, 7, 7}, VGA_REGSET_END};static const struct vga_regset ark_v_display_regs[] = {{0x12, 0, 7}, {0x07, 1, 1}, {0x07, 6, 6}, {0x40, 6, 6}, VGA_REGSET_END};static const struct vga_regset ark_v_blank_start_regs[] = {{0x15, 0, 7}, {0x07, 3, 3}, {0x09, 5, 5}, {0x40, 5, 5}, VGA_REGSET_END};// const struct vga_regset ark_v_blank_end_regs[] = {{0x16, 0, 6}, VGA_REGSET_END};static const struct vga_regset ark_v_blank_end_regs[] = {{0x16, 0, 7}, VGA_REGSET_END};static const struct vga_regset ark_v_sync_start_regs[] = {{0x10, 0, 7}, {0x07, 2, 2}, {0x07, 7, 7}, {0x40, 4, 4}, VGA_REGSET_END};static const struct vga_regset ark_v_sync_end_regs[] = {{0x11, 0, 3}, VGA_REGSET_END}; static const struct vga_regset ark_line_compare_regs[] = {{0x18, 0, 7}, {0x07, 4, 4}, {0x09, 6, 6}, VGA_REGSET_END};static const struct vga_regset ark_start_address_regs[] = {{0x0d, 0, 7}, {0x0c, 0, 7}, {0x40, 0, 2}, VGA_REGSET_END};static const struct vga_regset ark_offset_regs[] = {{0x13, 0, 7}, {0x41, 3, 3}, VGA_REGSET_END}; static const struct svga_timing_regs ark_timing_regs = { ark_h_total_regs, ark_h_display_regs, ark_h_blank_start_regs, ark_h_blank_end_regs, ark_h_sync_start_regs, ark_h_sync_end_regs, ark_v_total_regs, ark_v_display_regs, ark_v_blank_start_regs, ark_v_blank_end_regs, ark_v_sync_start_regs, ark_v_sync_end_regs,}; /* ------------------------------------------------------------------------- */ /* Module parameters */ static char *mode_option = "640x480-8@60"; MODULE_AUTHOR("(c) 2007 Ondrej Zajicek <santiago@crfreenet.org>");MODULE_LICENSE("GPL");MODULE_DESCRIPTION("fbdev driver for ARK 2000PV"); module_param(mode_option, charp, 0444);MODULE_PARM_DESC(mode_option, "Default video mode ('640x480-8@60', etc)");module_param_named(mode, mode_option, charp, 0444);MODULE_PARM_DESC(mode, "Default video mode ('640x480-8@60', etc) (deprecated)"); static int threshold = 4; module_param(threshold, int, 0644);MODULE_PARM_DESC(threshold, "FIFO threshold"); /* ------------------------------------------------------------------------- */ static void arkfb_settile(struct fb_info *info, struct fb_tilemap *map){ const u8 *font = map->data; u8 __iomem *fb = (u8 __iomem *)info->screen_base; int i, c; if ((map->width != 8) || (map->height != 16) || (map->depth != 1) || (map->length != 256)) { fb_err(info, "unsupported font parameters: width %d, height %d, depth %d, length %d\n", map->width, map->height, map->depth, map->length); return; } fb += 2; for (c = 0; c < map->length; c++) { for (i = 0; i < map->height; i++) { fb_writeb(font[i], &fb[i * 4]); fb_writeb(font[i], &fb[i * 4 + (128 * 8)]); } fb += 128; if ((c % 8) == 7) fb += 128*8; font += map->height; }} static void arkfb_tilecursor(struct fb_info *info, struct fb_tilecursor *cursor){ struct arkfb_info *par = info->par; svga_tilecursor(par->state.vgabase, info, cursor);} static struct fb_tile_ops arkfb_tile_ops = { .fb_settile = arkfb_settile, .fb_tilecopy = svga_tilecopy, .fb_tilefill = svga_tilefill, .fb_tileblit = svga_tileblit, .fb_tilecursor = arkfb_tilecursor, .fb_get_tilemax = svga_get_tilemax,}; /* ------------------------------------------------------------------------- */ /* image data is MSB-first, fb structure is MSB-first too */static inline u32 expand_color(u32 c){ return ((c & 1) | ((c & 2) << 7) | ((c & 4) << 14) | ((c & 8) << 21)) * 0xFF;} /* arkfb_iplan_imageblit silently assumes that almost everything is 8-pixel aligned */static void arkfb_iplan_imageblit(struct fb_info *info, const struct fb_image *image){ u32 fg = expand_color(image->fg_color); u32 bg = expand_color(image->bg_color); const u8 *src1, *src; u8 __iomem *dst1; u32 __iomem *dst; u32 val; int x, y; src1 = image->data; dst1 = info->screen_base + (image->dy * info->fix.line_length) + ((image->dx / 8) * 4); for (y = 0; y < image->height; y++) { src = src1; dst = (u32 __iomem *) dst1; for (x = 0; x < image->width; x += 8) { val = *(src++) * 0x01010101; val = (val & fg) | (~val & bg); fb_writel(val, dst++); } src1 += image->width / 8; dst1 += info->fix.line_length; } } /* arkfb_iplan_fillrect silently assumes that almost everything is 8-pixel aligned */static void arkfb_iplan_fillrect(struct fb_info *info, const struct fb_fillrect *rect){ u32 fg = expand_color(rect->color); u8 __iomem *dst1; u32 __iomem *dst; int x, y; dst1 = info->screen_base + (rect->dy * info->fix.line_length) + ((rect->dx / 8) * 4); for (y = 0; y < rect->height; y++) { dst = (u32 __iomem *) dst1; for (x = 0; x < rect->width; x += 8) { fb_writel(fg, dst++); } dst1 += info->fix.line_length; } } /* image data is MSB-first, fb structure is high-nibble-in-low-byte-first */static inline u32 expand_pixel(u32 c){ return (((c & 1) << 24) | ((c & 2) << 27) | ((c & 4) << 14) | ((c & 8) << 17) | ((c & 16) << 4) | ((c & 32) << 7) | ((c & 64) >> 6) | ((c & 128) >> 3)) * 0xF;} /* arkfb_cfb4_imageblit silently assumes that almost everything is 8-pixel aligned */static void arkfb_cfb4_imageblit(struct fb_info *info, const struct fb_image *image){ u32 fg = image->fg_color * 0x11111111; u32 bg = image->bg_color * 0x11111111; const u8 *src1, *src; u8 __iomem *dst1; u32 __iomem *dst; u32 val; int x, y; src1 = image->data; dst1 = info->screen_base + (image->dy * info->fix.line_length) + ((image->dx / 8) * 4); for (y = 0; y < image->height; y++) { src = src1; dst = (u32 __iomem *) dst1; for (x = 0; x < image->width; x += 8) { val = expand_pixel(*(src++)); val = (val & fg) | (~val & bg); fb_writel(val, dst++); } src1 += image->width / 8; dst1 += info->fix.line_length; } } static void arkfb_imageblit(struct fb_info *info, const struct fb_image *image){ if ((info->var.bits_per_pixel == 4) && (image->depth == 1) && ((image->width % 8) == 0) && ((image->dx % 8) == 0)) { if (info->fix.type == FB_TYPE_INTERLEAVED_PLANES) arkfb_iplan_imageblit(info, image); else arkfb_cfb4_imageblit(info, image); } else cfb_imageblit(info, image);} static void arkfb_fillrect(struct fb_info *info, const struct fb_fillrect *rect){ if ((info->var.bits_per_pixel == 4) && ((rect->width % 8) == 0) && ((rect->dx % 8) == 0) && (info->fix.type == FB_TYPE_INTERLEAVED_PLANES)) arkfb_iplan_fillrect(info, rect); else cfb_fillrect(info, rect);} /* ------------------------------------------------------------------------- */ enum{ DAC_PSEUDO8_8, DAC_RGB1555_8, DAC_RGB0565_8, DAC_RGB0888_8, DAC_RGB8888_8, DAC_PSEUDO8_16, DAC_RGB1555_16, DAC_RGB0565_16, DAC_RGB0888_16, DAC_RGB8888_16, DAC_MAX}; struct dac_ops { int (*dac_get_mode)(struct dac_info *info); int (*dac_set_mode)(struct dac_info *info, int mode); int (*dac_get_freq)(struct dac_info *info, int channel); int (*dac_set_freq)(struct dac_info *info, int channel, u32 freq); void (*dac_release)(struct dac_info *info);}; typedef void (*dac_read_regs_t)(void *data, u8 *code, int count);typedef void (*dac_write_regs_t)(void *data, u8 *code, int count); struct dac_info{ struct dac_ops *dacops; dac_read_regs_t dac_read_regs; dac_write_regs_t dac_write_regs; void *data;}; static inline void dac_read_regs(struct dac_info *info, u8 *code, int count){ info->dac_read_regs(info->data, code, count);} static inline void dac_write_reg(struct dac_info *info, u8 reg, u8 val){ u8 code[2] = {reg, val}; info->dac_write_regs(info->data, code, 1);} static inline void dac_write_regs(struct dac_info *info, u8 *code, int count){ info->dac_write_regs(info->data, code, count);} static inline int dac_set_mode(struct dac_info *info, int mode){ return info->dacops->dac_set_mode(info, mode);} static inline int dac_set_freq(struct dac_info *info, int channel, u32 freq){ return info->dacops->dac_set_freq(info, channel, freq);} static inline void dac_release(struct dac_info *info){ info->dacops->dac_release(info);} /* ------------------------------------------------------------------------- */ /* ICS5342 DAC */ struct ics5342_info{ struct dac_info dac; u8 mode;}; #define DAC_PAR(info) ((struct ics5342_info *) info) /* LSB is set to distinguish unused slots */static const u8 ics5342_mode_table[DAC_MAX] = { [DAC_PSEUDO8_8] = 0x01, [DAC_RGB1555_8] = 0x21, [DAC_RGB0565_8] = 0x61, [DAC_RGB0888_8] = 0x41, [DAC_PSEUDO8_16] = 0x11, [DAC_RGB1555_16] = 0x31, [DAC_RGB0565_16] = 0x51, [DAC_RGB0888_16] = 0x91, [DAC_RGB8888_16] = 0x71}; static int ics5342_set_mode(struct dac_info *info, int mode){ u8 code; if (mode >= DAC_MAX) return -EINVAL; code = ics5342_mode_table[mode]; if (! code) return -EINVAL; dac_write_reg(info, 6, code & 0xF0); DAC_PAR(info)->mode = mode; return 0;} static const struct svga_pll ics5342_pll = {3, 129, 3, 33, 0, 3, 60000, 250000, 14318}; /* pd4 - allow only posdivider 4 (r=2) */static const struct svga_pll ics5342_pll_pd4 = {3, 129, 3, 33, 2, 2, 60000, 335000, 14318}; /* 270 MHz should be upper bound for VCO clock according to specs, but that is too restrictive in pd4 case */ static int ics5342_set_freq(struct dac_info *info, int channel, u32 freq){ u16 m, n, r; /* only postdivider 4 (r=2) is valid in mode DAC_PSEUDO8_16 */ int rv = svga_compute_pll((DAC_PAR(info)->mode == DAC_PSEUDO8_16) ? &ics5342_pll_pd4 : &ics5342_pll, freq, &m, &n, &r, 0); if (rv < 0) { return -EINVAL; } else { u8 code[6] = {4, 3, 5, m-2, 5, (n-2) | (r << 5)}; dac_write_regs(info, code, 3); return 0; }} static void ics5342_release(struct dac_info *info){ ics5342_set_mode(info, DAC_PSEUDO8_8); kfree(info);} static struct dac_ops ics5342_ops = { .dac_set_mode = ics5342_set_mode, .dac_set_freq = ics5342_set_freq, .dac_release = ics5342_release}; static struct dac_info * ics5342_init(dac_read_regs_t drr, dac_write_regs_t dwr, void *data){ struct ics5342_info *ics_info = kzalloc_obj(struct ics5342_info); struct dac_info *info = &ics_info->dac; if (!ics_info) return NULL; info->dacops = &ics5342_ops; info->dac_read_regs = drr; info->dac_write_regs = dwr; info->data = data; DAC_PAR(info)->mode = DAC_PSEUDO8_8; /* estimation */ return info;} /* ------------------------------------------------------------------------- */ static unsigned short dac_regs[4] = {0x3c8, 0x3c9, 0x3c6, 0x3c7}; static void ark_dac_read_regs(void *data, u8 *code, int count){ struct fb_info *info = data; struct arkfb_info *par; u8 regval; par = info->par; regval = vga_rseq(par->state.vgabase, 0x1C); while (count != 0) { vga_wseq(par->state.vgabase, 0x1C, regval | (code[0] & 4 ? 0x80 : 0)); code[1] = vga_r(par->state.vgabase, dac_regs[code[0] & 3]); count--; code += 2; } vga_wseq(par->state.vgabase, 0x1C, regval);} static void ark_dac_write_regs(void *data, u8 *code, int count){ struct fb_info *info = data; struct arkfb_info *par; u8 regval; par = info->par; regval = vga_rseq(par->state.vgabase, 0x1C); while (count != 0) { vga_wseq(par->state.vgabase, 0x1C, regval | (code[0] & 4 ? 0x80 : 0)); vga_w(par->state.vgabase, dac_regs[code[0] & 3], code[1]); count--; code += 2; } vga_wseq(par->state.vgabase, 0x1C, regval);} static void ark_set_pixclock(struct fb_info *info, u32 pixclock){ struct arkfb_info *par = info->par; u8 regval; int rv = dac_set_freq(par->dac, 0, 1000000000 / pixclock); if (rv < 0) { fb_err(info, "cannot set requested pixclock, keeping old value\n");Lines 1–500 of 1218. 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/* * linux/drivers/video/arkfb.c -- Frame buffer device driver for ARK 2000PV * with ICS 5342 dac (it is easy to add support for different dacs). * * Copyright (c) 2007 Ondrej Zajicek <santiago@crfreenet.org> * * This file is subject to the terms and conditions of the GNU General Public * License. See the file COPYING in the main directory of this archive for * more details. * * Code is based on s3fb */ #include <linux/aperture.h> #include <linux/module.h> #include <linux/kernel.h> #include <linux/errno.h> #include <linux/string.h> #include <linux/mm.h> #include <linux/tty.h> #include <linux/slab.h> #include <linux/delay.h> #include <linux/fb.h> #include <linux/svga.h> #include <linux/init.h> #include <linux/pci.h> #include <linux/console.h> /* Why should fb driver call console functions? because console_lock() */ #include <video/vga.h> struct arkfb_info { int mclk_freq; int wc_cookie; struct dac_info *dac; struct vgastate state; struct mutex open_lock; unsigned int ref_count; u32 pseudo_palette[16]; }; /* ------------------------------------------------------------------------- */ static const struct svga_fb_format arkfb_formats[] = { { 0, {0, 6, 0}, {0, 6, 0}, {0, 6, 0}, {0, 0, 0}, 0, FB_TYPE_TEXT, FB_AUX_TEXT_SVGA_STEP4, FB_VISUAL_PSEUDOCOLOR, 8, 8}, { 4, {0, 6, 0}, {0, 6, 0}, {0, 6, 0}, {0, 0, 0}, 0, FB_TYPE_PACKED_PIXELS, 0, FB_VISUAL_PSEUDOCOLOR, 8, 16}, { 4, {0, 6, 0}, {0, 6, 0}, {0, 6, 0}, {0, 0, 0}, 1, FB_TYPE_INTERLEAVED_PLANES, 1, FB_VISUAL_PSEUDOCOLOR, 8, 16}, { 8, {0, 6, 0}, {0, 6, 0}, {0, 6, 0}, {0, 0, 0}, 0, FB_TYPE_PACKED_PIXELS, 0, FB_VISUAL_PSEUDOCOLOR, 8, 8}, {16, {10, 5, 0}, {5, 5, 0}, {0, 5, 0}, {0, 0, 0}, 0, FB_TYPE_PACKED_PIXELS, 0, FB_VISUAL_TRUECOLOR, 4, 4}, {16, {11, 5, 0}, {5, 6, 0}, {0, 5, 0}, {0, 0, 0}, 0, FB_TYPE_PACKED_PIXELS, 0, FB_VISUAL_TRUECOLOR, 4, 4}, {24, {16, 8, 0}, {8, 8, 0}, {0, 8, 0}, {0, 0, 0}, 0, FB_TYPE_PACKED_PIXELS, 0, FB_VISUAL_TRUECOLOR, 8, 8}, {32, {16, 8, 0}, {8, 8, 0}, {0, 8, 0}, {0, 0, 0}, 0, FB_TYPE_PACKED_PIXELS, 0, FB_VISUAL_TRUECOLOR, 2, 2}, SVGA_FORMAT_END }; /* CRT timing register sets */ static const struct vga_regset ark_h_total_regs[] = {{0x00, 0, 7}, {0x41, 7, 7}, VGA_REGSET_END}; static const struct vga_regset ark_h_display_regs[] = {{0x01, 0, 7}, {0x41, 6, 6}, VGA_REGSET_END}; static const struct vga_regset ark_h_blank_start_regs[] = {{0x02, 0, 7}, {0x41, 5, 5}, VGA_REGSET_END}; static const struct vga_regset ark_h_blank_end_regs[] = {{0x03, 0, 4}, {0x05, 7, 7 }, VGA_REGSET_END}; static const struct vga_regset ark_h_sync_start_regs[] = {{0x04, 0, 7}, {0x41, 4, 4}, VGA_REGSET_END}; static const struct vga_regset ark_h_sync_end_regs[] = {{0x05, 0, 4}, VGA_REGSET_END}; static const struct vga_regset ark_v_total_regs[] = {{0x06, 0, 7}, {0x07, 0, 0}, {0x07, 5, 5}, {0x40, 7, 7}, VGA_REGSET_END}; static const struct vga_regset ark_v_display_regs[] = {{0x12, 0, 7}, {0x07, 1, 1}, {0x07, 6, 6}, {0x40, 6, 6}, VGA_REGSET_END}; static const struct vga_regset ark_v_blank_start_regs[] = {{0x15, 0, 7}, {0x07, 3, 3}, {0x09, 5, 5}, {0x40, 5, 5}, VGA_REGSET_END}; // const struct vga_regset ark_v_blank_end_regs[] = {{0x16, 0, 6}, VGA_REGSET_END}; static const struct vga_regset ark_v_blank_end_regs[] = {{0x16, 0, 7}, VGA_REGSET_END}; static const struct vga_regset ark_v_sync_start_regs[] = {{0x10, 0, 7}, {0x07, 2, 2}, {0x07, 7, 7}, {0x40, 4, 4}, VGA_REGSET_END}; static const struct vga_regset ark_v_sync_end_regs[] = {{0x11, 0, 3}, VGA_REGSET_END}; static const struct vga_regset ark_line_compare_regs[] = {{0x18, 0, 7}, {0x07, 4, 4}, {0x09, 6, 6}, VGA_REGSET_END}; static const struct vga_regset ark_start_address_regs[] = {{0x0d, 0, 7}, {0x0c, 0, 7}, {0x40, 0, 2}, VGA_REGSET_END}; static const struct vga_regset ark_offset_regs[] = {{0x13, 0, 7}, {0x41, 3, 3}, VGA_REGSET_END}; static const struct svga_timing_regs ark_timing_regs = { ark_h_total_regs, ark_h_display_regs, ark_h_blank_start_regs, ark_h_blank_end_regs, ark_h_sync_start_regs, ark_h_sync_end_regs, ark_v_total_regs, ark_v_display_regs, ark_v_blank_start_regs, ark_v_blank_end_regs, ark_v_sync_start_regs, ark_v_sync_end_regs, }; /* ------------------------------------------------------------------------- */ /* Module parameters */ static char *mode_option = "640x480-8@60"; MODULE_AUTHOR("(c) 2007 Ondrej Zajicek <santiago@crfreenet.org>"); MODULE_LICENSE("GPL"); MODULE_DESCRIPTION("fbdev driver for ARK 2000PV"); module_param(mode_option, charp, 0444); MODULE_PARM_DESC(mode_option, "Default video mode ('640x480-8@60', etc)"); module_param_named(mode, mode_option, charp, 0444); MODULE_PARM_DESC(mode, "Default video mode ('640x480-8@60', etc) (deprecated)"); static int threshold = 4; module_param(threshold, int, 0644); MODULE_PARM_DESC(threshold, "FIFO threshold"); /* ------------------------------------------------------------------------- */ static void arkfb_settile(struct fb_info *info, struct fb_tilemap *map) { const u8 *font = map->data; u8 __iomem *fb = (u8 __iomem *)info->screen_base; int i, c; if ((map->width != 8) || (map->height != 16) || (map->depth != 1) || (map->length != 256)) { fb_err(info, "unsupported font parameters: width %d, height %d, depth %d, length %d\n", map->width, map->height, map->depth, map->length); return; } fb += 2; for (c = 0; c < map->length; c++) { for (i = 0; i < map->height; i++) { fb_writeb(font[i], &fb[i * 4]); fb_writeb(font[i], &fb[i * 4 + (128 * 8)]); } fb += 128; if ((c % 8) == 7) fb += 128*8; font += map->height; } } static void arkfb_tilecursor(struct fb_info *info, struct fb_tilecursor *cursor) { struct arkfb_info *par = info->par; svga_tilecursor(par->state.vgabase, info, cursor); } static struct fb_tile_ops arkfb_tile_ops = { .fb_settile = arkfb_settile, .fb_tilecopy = svga_tilecopy, .fb_tilefill = svga_tilefill, .fb_tileblit = svga_tileblit, .fb_tilecursor = arkfb_tilecursor, .fb_get_tilemax = svga_get_tilemax, }; /* ------------------------------------------------------------------------- */ /* image data is MSB-first, fb structure is MSB-first too */ static inline u32 expand_color(u32 c) { return ((c & 1) | ((c & 2) << 7) | ((c & 4) << 14) | ((c & 8) << 21)) * 0xFF; } /* arkfb_iplan_imageblit silently assumes that almost everything is 8-pixel aligned */ static void arkfb_iplan_imageblit(struct fb_info *info, const struct fb_image *image) { u32 fg = expand_color(image->fg_color); u32 bg = expand_color(image->bg_color); const u8 *src1, *src; u8 __iomem *dst1; u32 __iomem *dst; u32 val; int x, y; src1 = image->data; dst1 = info->screen_base + (image->dy * info->fix.line_length) + ((image->dx / 8) * 4); for (y = 0; y < image->height; y++) { src = src1; dst = (u32 __iomem *) dst1; for (x = 0; x < image->width; x += 8) { val = *(src++) * 0x01010101; val = (val & fg) | (~val & bg); fb_writel(val, dst++); } src1 += image->width / 8; dst1 += info->fix.line_length; } } /* arkfb_iplan_fillrect silently assumes that almost everything is 8-pixel aligned */ static void arkfb_iplan_fillrect(struct fb_info *info, const struct fb_fillrect *rect) { u32 fg = expand_color(rect->color); u8 __iomem *dst1; u32 __iomem *dst; int x, y; dst1 = info->screen_base + (rect->dy * info->fix.line_length) + ((rect->dx / 8) * 4); for (y = 0; y < rect->height; y++) { dst = (u32 __iomem *) dst1; for (x = 0; x < rect->width; x += 8) { fb_writel(fg, dst++); } dst1 += info->fix.line_length; } } /* image data is MSB-first, fb structure is high-nibble-in-low-byte-first */ static inline u32 expand_pixel(u32 c) { return (((c & 1) << 24) | ((c & 2) << 27) | ((c & 4) << 14) | ((c & 8) << 17) | ((c & 16) << 4) | ((c & 32) << 7) | ((c & 64) >> 6) | ((c & 128) >> 3)) * 0xF; } /* arkfb_cfb4_imageblit silently assumes that almost everything is 8-pixel aligned */ static void arkfb_cfb4_imageblit(struct fb_info *info, const struct fb_image *image) { u32 fg = image->fg_color * 0x11111111; u32 bg = image->bg_color * 0x11111111; const u8 *src1, *src; u8 __iomem *dst1; u32 __iomem *dst; u32 val; int x, y; src1 = image->data; dst1 = info->screen_base + (image->dy * info->fix.line_length) + ((image->dx / 8) * 4); for (y = 0; y < image->height; y++) { src = src1; dst = (u32 __iomem *) dst1; for (x = 0; x < image->width; x += 8) { val = expand_pixel(*(src++)); val = (val & fg) | (~val & bg); fb_writel(val, dst++); } src1 += image->width / 8; dst1 += info->fix.line_length; } } static void arkfb_imageblit(struct fb_info *info, const struct fb_image *image) { if ((info->var.bits_per_pixel == 4) && (image->depth == 1) && ((image->width % 8) == 0) && ((image->dx % 8) == 0)) { if (info->fix.type == FB_TYPE_INTERLEAVED_PLANES) arkfb_iplan_imageblit(info, image); else arkfb_cfb4_imageblit(info, image); } else cfb_imageblit(info, image); } static void arkfb_fillrect(struct fb_info *info, const struct fb_fillrect *rect) { if ((info->var.bits_per_pixel == 4) && ((rect->width % 8) == 0) && ((rect->dx % 8) == 0) && (info->fix.type == FB_TYPE_INTERLEAVED_PLANES)) arkfb_iplan_fillrect(info, rect); else cfb_fillrect(info, rect); } /* ------------------------------------------------------------------------- */ enum { DAC_PSEUDO8_8, DAC_RGB1555_8, DAC_RGB0565_8, DAC_RGB0888_8, DAC_RGB8888_8, DAC_PSEUDO8_16, DAC_RGB1555_16, DAC_RGB0565_16, DAC_RGB0888_16, DAC_RGB8888_16, DAC_MAX }; struct dac_ops { int (*dac_get_mode)(struct dac_info *info); int (*dac_set_mode)(struct dac_info *info, int mode); int (*dac_get_freq)(struct dac_info *info, int channel); int (*dac_set_freq)(struct dac_info *info, int channel, u32 freq); void (*dac_release)(struct dac_info *info); }; typedef void (*dac_read_regs_t)(void *data, u8 *code, int count); typedef void (*dac_write_regs_t)(void *data, u8 *code, int count); struct dac_info { struct dac_ops *dacops; dac_read_regs_t dac_read_regs; dac_write_regs_t dac_write_regs; void *data; }; static inline void dac_read_regs(struct dac_info *info, u8 *code, int count) { info->dac_read_regs(info->data, code, count); } static inline void dac_write_reg(struct dac_info *info, u8 reg, u8 val) { u8 code[2] = {reg, val}; info->dac_write_regs(info->data, code, 1); } static inline void dac_write_regs(struct dac_info *info, u8 *code, int count) { info->dac_write_regs(info->data, code, count); } static inline int dac_set_mode(struct dac_info *info, int mode) { return info->dacops->dac_set_mode(info, mode); } static inline int dac_set_freq(struct dac_info *info, int channel, u32 freq) { return info->dacops->dac_set_freq(info, channel, freq); } static inline void dac_release(struct dac_info *info) { info->dacops->dac_release(info); } /* ------------------------------------------------------------------------- */ /* ICS5342 DAC */ struct ics5342_info { struct dac_info dac; u8 mode; }; #define DAC_PAR(info) ((struct ics5342_info *) info) /* LSB is set to distinguish unused slots */ static const u8 ics5342_mode_table[DAC_MAX] = { [DAC_PSEUDO8_8] = 0x01, [DAC_RGB1555_8] = 0x21, [DAC_RGB0565_8] = 0x61, [DAC_RGB0888_8] = 0x41, [DAC_PSEUDO8_16] = 0x11, [DAC_RGB1555_16] = 0x31, [DAC_RGB0565_16] = 0x51, [DAC_RGB0888_16] = 0x91, [DAC_RGB8888_16] = 0x71 }; static int ics5342_set_mode(struct dac_info *info, int mode) { u8 code; if (mode >= DAC_MAX) return -EINVAL; code = ics5342_mode_table[mode]; if (! code) return -EINVAL; dac_write_reg(info, 6, code & 0xF0); DAC_PAR(info)->mode = mode; return 0; } static const struct svga_pll ics5342_pll = {3, 129, 3, 33, 0, 3, 60000, 250000, 14318}; /* pd4 - allow only posdivider 4 (r=2) */ static const struct svga_pll ics5342_pll_pd4 = {3, 129, 3, 33, 2, 2, 60000, 335000, 14318}; /* 270 MHz should be upper bound for VCO clock according to specs, but that is too restrictive in pd4 case */ static int ics5342_set_freq(struct dac_info *info, int channel, u32 freq) { u16 m, n, r; /* only postdivider 4 (r=2) is valid in mode DAC_PSEUDO8_16 */ int rv = svga_compute_pll((DAC_PAR(info)->mode == DAC_PSEUDO8_16) ? &ics5342_pll_pd4 : &ics5342_pll, freq, &m, &n, &r, 0); if (rv < 0) { return -EINVAL; } else { u8 code[6] = {4, 3, 5, m-2, 5, (n-2) | (r << 5)}; dac_write_regs(info, code, 3); return 0; } } static void ics5342_release(struct dac_info *info) { ics5342_set_mode(info, DAC_PSEUDO8_8); kfree(info); } static struct dac_ops ics5342_ops = { .dac_set_mode = ics5342_set_mode, .dac_set_freq = ics5342_set_freq, .dac_release = ics5342_release }; static struct dac_info * ics5342_init(dac_read_regs_t drr, dac_write_regs_t dwr, void *data) { struct ics5342_info *ics_info = kzalloc_obj(struct ics5342_info); struct dac_info *info = &ics_info->dac; if (!ics_info) return NULL; info->dacops = &ics5342_ops; info->dac_read_regs = drr; info->dac_write_regs = dwr; info->data = data; DAC_PAR(info)->mode = DAC_PSEUDO8_8; /* estimation */ return info; } /* ------------------------------------------------------------------------- */ static unsigned short dac_regs[4] = {0x3c8, 0x3c9, 0x3c6, 0x3c7}; static void ark_dac_read_regs(void *data, u8 *code, int count) { struct fb_info *info = data; struct arkfb_info *par; u8 regval; par = info->par; regval = vga_rseq(par->state.vgabase, 0x1C); while (count != 0) { vga_wseq(par->state.vgabase, 0x1C, regval | (code[0] & 4 ? 0x80 : 0)); code[1] = vga_r(par->state.vgabase, dac_regs[code[0] & 3]); count--; code += 2; } vga_wseq(par->state.vgabase, 0x1C, regval); } static void ark_dac_write_regs(void *data, u8 *code, int count) { struct fb_info *info = data; struct arkfb_info *par; u8 regval; par = info->par; regval = vga_rseq(par->state.vgabase, 0x1C); while (count != 0) { vga_wseq(par->state.vgabase, 0x1C, regval | (code[0] & 4 ? 0x80 : 0)); vga_w(par->state.vgabase, dac_regs[code[0] & 3], code[1]); count--; code += 2; } vga_wseq(par->state.vgabase, 0x1C, regval); } static void ark_set_pixclock(struct fb_info *info, u32 pixclock) { struct arkfb_info *par = info->par; u8 regval; int rv = dac_set_freq(par->dac, 0, 1000000000 / pixclock); if (rv < 0) { fb_err(info, "cannot set requested pixclock, keeping old value\n");