2007-12-31 H.J. Lu <hongjiu.lu@intel.com> * i386-dis.c (prefix_table): Use "%LQ" on cvtsi2ss/cvtsi2sd. (putop): Handle '%' and "LQ". * i386-opc.tbl: Remove IgnoreSize from cvtsi2ss/cvtsi2sd. * i386-tbl.h: Regenerated. 2007-12-28 H.J. Lu <hongjiu.lu@intel.com> * i386-gen.c (cpu_flag_init): Add CpuSSE4_1_Or_5 to CPU_SSE4_1_FLAGS, CPU_SSE4_2_FLAGS and CPU_SSE5_FLAGS. (cpu_flags): Add CpuSSE4_1_Or_5. * i386-init.h: Regenerated. * i386-tbl.h: Likewise. * i386-opc.h (CpuSSE4_1_Or_5): New. (CpuLM): Updated. (i386_cpu_flags): Add cpusse4_1_or_5. * i386-opc.tbl: Use CpuSSE4_1_Or_5 instead of CpuSSE4_1|CpuSSE5 on ptest, roundpd, roundps, roundsd and roundss. 2007-12-23 H.J. Lu <hongjiu.lu@intel.com> * i386-gen.c (opcode_modifiers): Add OldGcc, ATTMnemonic and IntelMnemonic. * i386-opc.h (OldGcc): New. (ATTMnemonic): Likewise. (IntelMnemonic): Likewise. (Opcode_Modifier_Max): Updated. (i386_opcode_modifier): Add oldgcc, attmnemonic and intelmnemonic. * i386-opc.tbl: Update fadd, fdiv, fdivp, fdivr, fdivrp, fmul, fsub, fsubp, fsubr and fsubrp with OldGcc, ATTMnemonic and IntelMnemonic. * i386-tbl.h: Regeneratd. 2007-12-22 H.J. Lu <hongjiu.lu@intel.com> * i386-dis.c (intel_mnemonic): New. (print_i386_disassembler_options): Display att-mnemonic and intel-mnemonic options. (print_insn): Handle att-mnemonic and intel-mnemonic. (float_reg): Replace SYSV386_COMPAT with "!M" and "M". (putop): Handle "!M" and "M". 2007-12-21 H.J. Lu <hongjiu.lu@intel.com> * Makefile.am (i386-gen.o): Also depend on $(srcdir)/../include/opcode/i386.h. * Makefile.in: Regenerated. 2007-11-29 Mark Shinwell <shinwell@codesourcery.com> * mips-dis.c (mips_arch_choices): Add Loongson-2E and -2F entries. * mips-opc.c (IL2E): New. (IL2F): New. (mips_builtin_opcodes): Add Loongson-2E and -2F instructions. Allow movz and movn for Loongson-2E and -2F. Add movnz entry. Move coprocessor encodings to the end of the table. Allow certain MIPS V .ps instructions on the Loongson-2E and -2F. 2007-11-29 Mark Shinwell <shinwell@codesourcery.com> * mips-opc.c (I3_32, I3_33, I4_32, I4_33, I5_33): New. (mips_builtin_opcodes): Use these new I* values. 2007-11-27 Andreas Krebbel <krebbel1@de.ibm.com> * s390-opc.txt ("tcet", "tcdt", "tcxt", "tget", "tgdt", "tgxt"): Removed. ("tdcet", "tdcdt", "tdcxt", "tdget", "tdgdt", "tdgxt"): Added. 2007-11-14 H.J. Lu <hongjiu.lu@intel.com> * ia64-ic.tbl: Updated for Itanium 9100 series. * ia64-raw.tbl: Likewise. * ia64-waw.tbl: Likewise. * ia64-asmtab.c: Regenerated. 2007-11-14 Tristan Gingold <gingold@adacore.com> * ia64-dis.c (print_insn_ia64): Handle ar.ruc. * ia64-gen.c (lookup_regindex): Likewise. 2007-11-07 Jens Arnold <jens@jens-arnold.net> PR gas/5228 * m68k-opc.c (m68k_opcodes): Fix coldfire msac.w instructions with parallel loads. 2007-11-07 Tristan Gingold <gingold@adacore.com> * ia64-dis.c (print_insn_ia64): Generate symbolic names for cr registers instead of register number. 2007-11-07 David O'Brien <obrien@FreeBSD.org> * arm-dis.c (arm_opcodes): Remove superflous escapes of percent operators. 2007-11-06 Peter Bergner <bergner@vnet.ibm.com> * ppc-opc.c (powerpc_opcodes): Remove the dcffix and dcffix. opcodes which are not included in the "Preliminary Decimal Floating-Point Architecture" document. 2007-11-01 H.J. Lu <hongjiu.lu@intel.com> * i386-gen.c (opcode_modifiers): Replace No_xSuf with No_ldSuf. * i386-opc.tbl: Likewise. * i386-opc.h (No_xSuf): Renamed to ... (No_ldSuf): This. (FWait): Updated. 2007-11-01 H.J. Lu <hongjiu.lu@intel.com> * i386-gen.c (opcode_modifiers): Add ByteOkIntel, ToDword, ToQword and AddrPrefixOp0. * i386-opc.h (ByteOkIntel): New. (ToDword): Likewise. (ToQword): Likewise. (AddrPrefixOp0): Likewise. (IsPrefix): Updated. (i386_opcode_modifier): Add byteokintel, todword, toqword and addrprefixop0. * i386-opc.tbl (cvtss2si): Add ToQword. (cvttss2si): Likewise. (cvtsd2si): Add ToDword. (cvttsd2si): Likewise. (monitor): Add AddrPrefixOp0. (invlpga): Likewise. (vmload): Likewise. (vmrun): Likewise. (vmsave): Likewise. (pextrb): Add ByteOkIntel. (pinsrb): Likewise. * i386-tbl.h: Regenerated. 2007-10-31 H.J. Lu <hongjiu.lu@intel.com> * i386-dis.c (USE_REG_TABLE): Defined as the previous one + 1. (USE_REG_TABLE): Likewise. (USE_MOD_TABLE): Likewise. (USE_RM_TABLE): Likewise. (USE_PREFIX_TABLE): Likewise. (USE_X86_64_TABLE): Likewise. (USE_3BYTE_TABLE): Likewise. 2007-10-26 H.J. Lu <hongjiu.lu@intel.com> * i386-dis.c (MOD_0F2B_PREFIX_0...MOD_0F2B_PREFIX_3): New. (MOD_0F51): Likewise. (MOD_0FD7): Likewise. (MOD_0FE7_PREFIX_2): Likewise. (MOD_0F382A_PREFIX_2): Likewise. (MOD_0F71_REG_2): Updated. (MOD_0FF0_PREFIX_3): Likewise. (MOD_62_32BIT): Likewise. (dis386_twobyte): Use MOD_0F51 and MOD_0FD7. (prefix_table): Use MOD_0F2B_PREFIX_0...MOD_0F2B_PREFIX_3, MOD_0FE7_PREFIX_2 and MOD_0F382A_PREFIX_2. (mod_table): Add MOD_0F2B_PREFIX_0...MOD_0F2B_PREFIX_3, MOD_0F51, MOD_0FD7 and MOD_0F382A_PREFIX_2. 2007-10-26 Nick Clifton <nickc@redhat.com> * arm-dis.c (print_insn): Check for a symtab that exists but is empty. 2007-10-24 Alan Modra <amodra@bigpond.net.au> * po/POTFILES.in: Regenerate. 2007-10-23 H.J. Lu <hongjiu.lu@intel.com> * i386-dis.c (OP_SIMD_Suffix): Renamed to ... (CMP_Fixup): This. Rewrite. (OPSIMD): Renamed to ... (CMP): This. Updated. (prefix_table): Update PREFIX_0FC2 entry. 2007-10-22 H.J. Lu <hongjiu.lu@intel.com> * i386-dis.c (prefix_table): Reordered by opcode. (mod_table): Likewise. 2007-10-19 H.J. Lu <hongjiu.lu@intel.com> * i386-dis.c (prefix_table): Use XS on psrldq and pslldq. 2007-10-17 Nathan Sidwell <nathan@codesourcery.com> * m68k-opc.c (m68k_opcodes): Correct move sr and ccr masks for coldfire. 2007-10-15 Peter Bergner <bergner@vnet.ibm.com> * ppc-opc.c (powerpc_opcodes): Fix the first two operands of dquaiq. to use the TE and FRT macros. 2007-10-15 Peter Bergner <bergner@vnet.ibm.com> * ppc-opc.c (TE): Correct signedness. (powerpc_opcodes): Sort psq_st and psq_stu according to major opcode number. 2007-10-15 H.J. Lu <hongjiu.lu@intel.com> * i386-dis.c (dis386_twobyte): Reformat. (prefix_table): Likewise. (three_byte_table): Likewise. 2007-10-15 Alan Modra <amodra@bigpond.net.au> * mcore-dis.c (print_insn_mcore): Protect "fprintf" var against macro expansion. 2007-10-12 H.J. Lu <hongjiu.lu@intel.com> * i386-gen.c (opcode_modifiers): Add FirstXmm0. * i386-opc.h (FirstXmm0): New. (IsPrefix): Updated. (i386_opcode_modifier): Add firstxmm0. * i386-opc.tbl (blendvpd): Replace RegKludge with FirstXmm0. (blendvps): Likewise. (pblendvb): Likewise. * i386-tbl.h: Regenerated. 2007-10-12 H.J. Lu <hongjiu.lu@intel.com> * i386-dis.c (prefix_table): Reformat pblendvb and blendvps. 2007-10-10 H.J. Lu <hongjiu.lu@intel.com> * i386-dis.c (v_mode): Defined as previous one + 1. (w_mode): Likewise. (d_mode): Likewise. (q_mode): Likewise. (t_mode): Likewise. (x_mode): Likewise. (m_mode): Likewise. (cond_jump_mode): Likewise. (loop_jcxz_mode): Likewise. (dq_mode): Likewise. (dqw_mode): Likewise. (f_mode): Likewise. (const_1_mode): Likewise. (stack_v_mode): Likewise. (z_mode): Likewise. (o_mode): Likewise. (dqb_mode): Likewise. (dqd_mode): Likewise. (es_reg): Likewise. (cs_reg): Likewise. (ss_reg): Likewise. (ds_reg): Likewise. (fs_reg): Likewise. (gs_reg): Likewise. (eAX_reg): Likewise. (eCX_reg): Likewise. (eDX_reg): Likewise. (eBX_reg): Likewise. (eSP_reg): Likewise. (eBP_reg): Likewise. (eSI_reg): Likewise. (eDI_reg): Likewise. (al_reg): Likewise. (cl_reg): Likewise. (dl_reg): Likewise. (bl_reg): Likewise. (ah_reg): Likewise. (ch_reg): Likewise. (dh_reg): Likewise. (bh_reg): Likewise. (ax_reg): Likewise. (cx_reg): Likewise. (dx_reg): Likewise. (bx_reg): Likewise. (sp_reg): Likewise. (bp_reg): Likewise. (si_reg): Likewise. (di_reg): Likewise. (rAX_reg): Likewise. (rCX_reg): Likewise. (rDX_reg): Likewise. (rBX_reg): Likewise. (rSP_reg): Likewise. (rBP_reg): Likewise. (rSI_reg): Likewise. (rDI_reg): Likewise. (z_mode_ax_reg): Likewise. (indir_dx_reg): Likewise. (DREX_OC1): Updated. (DREX_NO_OC0): Likewise. (DREX_MASK): Likewise. (MAX_BYTEMODE): New. Issue an error if MAX_BYTEMODE is not less than DREX_OC1. 2007-10-08 H.J. Lu <hongjiu.lu@intel.com> * i386-dis.c: Updated comments for 'Y'. (putop): Don't add 'q' for 'Y' if suffix_always isn't true. 2007-10-08 Maciej W. Rozycki <macro@linux-mips.org> * opcodes/mips-dis.c (mips_cp0_names_r3000): New definition. (mips_cp0_names_r4000): Likewise. (mips_arch_choices): Link to the above as appropriate. 2007-10-08 Nick Clifton <nickc@redhat.com> * configure.in (SHARED_DEPENDENCIES): Change non-cygwin dependency to be ../bfd/libbfd.la. * configure: Regenerate. 2007-10-05 H.J. Lu <hongjiu.lu@intel.com> * i386-dis.c (dis386_twobyte): Add getsec. * i386-gen.c (cpu_flags): Add CpuSMX. * i386-opc.h (CpuSMX): New. (CpuSSSE3): Updated. (i386_cpu_flags): Add cpusmx. * i386-opc.tbl: Add getsec. * i386-init.h: Regenerated. * i386-tbl.h: Likewise. 2007-10-05 H.J. Lu <hongjiu.lu@intel.com> * i386-dis.c (reg_table): Use "{ XX }" on "(bad)". (prefix_table): Likewise. 2007-10-04 H.J. Lu <hongjiu.lu@intel.com> * i386-dis.c (dis386_twobyte): Use EXx instead of EXq on unpckhpX and unpckhpX. 2007-10-04 David Daney <ddaney@avtrex.com> * mips-opc.c (mips_builtin_opcodes): Mark lwxc1 as working on FP_S registers. 2007-10-04 H.J. Lu <hongjiu.lu@intel.com> * i386-dis.c (MOD_0F12_PREFIX_0): Use "movlps" and "movhlps" instead of "movlpX" and "movhlpX", respectively. (MOD_0F16_PREFIX_0): Use "movhps" and "movlhps" instead of "movhpX" and "movlhpX", respectively. 2007-10-04 Nick Clifton <nickc@redhat.com> * configure.in (WIN32LDFLAGS): Rename to SHARED_LDFLAGS. (WIN32LIBADD): Rename to SHARED_LIBADD (SHARED_DEPENDENCIES): New exported variable. (enable_shared): Add dependency upon libbfd.la for non-cygwin based shared library builds. * Makefile.am (libopcodes_la_DEPENDENCIES): Append SHARED_DEPENDENCIES. (libopcodes_la_LIBADD): Rename WIN32LIBADD to SHARED_LIBADD. (libopcodes_la_LDFLAGS): Rename WIN32LDFLAGS to SHARED_LDFLAGS. * configure: Regenerate. * Makefile.in: Regenerate. PR gas/5100 * arc-opc.c (insert_offset): Fix spelling mistake in error message. 2007-10-03 H.J. Lu <hongjiu.lu@intel.com> * i386-dis.c (OP_REG): Set add to 0 only when needed. (OP_C): Likewise. (OP_D): Likewise. (OP_MMX): Likewise. (OP_XMM): Likewise. (OP_EM): Likewise. (OP_MXC): Likewise. (OP_EX): Likewise. 2007-10-03 H.J. Lu <hongjiu.lu@intel.com> * i386-opc.tbl: Update SSE comments. 2007-10-01 H.J. Lu <hongjiu.lu@intel.com> * i386-dis.c (THREE_BYTE_0FBA): Renamed to ... (THREE_BYTE_0F7B): This. (dis386_twobyte): Updated. (three_byte_table): Updated comments. 2007-10-01 M R Swami Reddy <MR.Swami.Reddy@nsc.com> * cr16-opc.c: Updated the branch on condition instructions with RELAXABLE flag. 2007-09-30 H.J. Lu <hongjiu.lu@intel.com> * 386-dis.c (prefix_table): Reformat comment. 2007-09-29 H.J. Lu <hongjiu.lu@intel.com> * 386-dis.c (USE_GROUPS): Renamed to ... (USE_REG_TABLE): This. (USE_OPC_EXT_TABLE): Renamed to ... (USE_MOD_TABLE): This. (USE_OPC_EXT_RM_TABLE): Renamed to ... (USE_RM_TABLE): This. (USE_XXX_TABLE): Reordered. (GRP): Renamed to ... (REG_TABLE): This. (OPC_EXT_TABLE): Renamed to ... (MOD_TABLE): This. (OPC_EXT_RM_TABLE): Renamed to ... (RM_TABLE): This. (GRP_XXX): Renamed to ... (REG_XXX): This. (PREGRP_XXX): Renamed to ... (PREFIX_XXX): This. (OPC_EXT_XXX): Renamed to ... (MOD_XXX): This. (OPC_EXT_RM_XXX): Renamed to ... (RM_XXX): This. (grps): Renamed to ... (reg_table): This (prefix_user_table): Renamed to ... (prefix_table): This (opc_ext_table): Renamed to ... (mod_table): This (opc_ext_rm_table): Renamed to ... (rm_table): This (OPC_EXT_RM_XXX): Likewise. (dis386): Updated. (dis386_twobyte): Likewise. (reg_table): Likewise. (prefix_table): Likewise. (x86_64_table): Likewise. (three_byte_table): Likewise. (mod_table): Likewise. (rm_table): Likewise. (get_valid_dis386): Likewise. 2007-09-28 H.J. Lu <hongjiu.lu@intel.com> * 386-dis.c (USE_PREFIX_USER_TABLE): Renamed to ... (USE_PREFIX_TABLE): This. (X86_64_SPECIAL): Renamed to ... (USE_X86_64_TABLE): This. (IS_3BYTE_OPCODE): Renamed to ... (USE_3BYTE_TABLE): This. (GRPXXX): Removed. (PREGRPXXX): Likewise. (X86_64_XXX): Likewise. (THREE_BYTE_XXX): Likewise. (OPC_EXT_XXX): Likewise. (OPC_EXT_RM_XXX): Likewise. (DIS386): New. (GRP): Likewise. (PREGRP): Likewise. (X86_64_TABLE): Likewise. (THREE_BYTE_TABLE): Likewise. (OPC_EXT_TABLE): Likewise. (OPC_EXT_RM_TABLE): Likewise. (GRP_XXX): Likewise. (PREGRP_XXX): Likewise. (X86_64_XXX): Likewise. (THREE_BYTE_XXX): Likewise. (OPC_EXT_XXX): Likewise. (OPC_EXT_RM_XXX): Likewise. (dis386): Updated. (dis386_twobyte): Likewise. (grps): Likewise. (prefix_user_table): Likewise. (x86_64_table): Likewise. (three_byte_table): Likewise. (opc_ext_table): Likewise. (opc_ext_rm_table): Likewise. (get_valid_dis386): Likewise. 2007-09-27 H.J. Lu <hongjiu.lu@intel.com> * i386-dis.c (dis386): Swap X86_64_27 with OPC_EXT_2. (x86_64_table): Likewise. (opc_ext_table): Likewise. 2007-09-27 H.J. Lu <hongjiu.lu@intel.com> PR binutils/5072Lines 1–500 of 1869. Load more
2007-12-31 H.J. Lu <hongjiu.lu@intel.com> * i386-dis.c (prefix_table): Use "%LQ" on cvtsi2ss/cvtsi2sd. (putop): Handle '%' and "LQ". * i386-opc.tbl: Remove IgnoreSize from cvtsi2ss/cvtsi2sd. * i386-tbl.h: Regenerated. 2007-12-28 H.J. Lu <hongjiu.lu@intel.com> * i386-gen.c (cpu_flag_init): Add CpuSSE4_1_Or_5 to CPU_SSE4_1_FLAGS, CPU_SSE4_2_FLAGS and CPU_SSE5_FLAGS. (cpu_flags): Add CpuSSE4_1_Or_5. * i386-init.h: Regenerated. * i386-tbl.h: Likewise. * i386-opc.h (CpuSSE4_1_Or_5): New. (CpuLM): Updated. (i386_cpu_flags): Add cpusse4_1_or_5. * i386-opc.tbl: Use CpuSSE4_1_Or_5 instead of CpuSSE4_1|CpuSSE5 on ptest, roundpd, roundps, roundsd and roundss. 2007-12-23 H.J. Lu <hongjiu.lu@intel.com> * i386-gen.c (opcode_modifiers): Add OldGcc, ATTMnemonic and IntelMnemonic. * i386-opc.h (OldGcc): New. (ATTMnemonic): Likewise. (IntelMnemonic): Likewise. (Opcode_Modifier_Max): Updated. (i386_opcode_modifier): Add oldgcc, attmnemonic and intelmnemonic. * i386-opc.tbl: Update fadd, fdiv, fdivp, fdivr, fdivrp, fmul, fsub, fsubp, fsubr and fsubrp with OldGcc, ATTMnemonic and IntelMnemonic. * i386-tbl.h: Regeneratd. 2007-12-22 H.J. Lu <hongjiu.lu@intel.com> * i386-dis.c (intel_mnemonic): New. (print_i386_disassembler_options): Display att-mnemonic and intel-mnemonic options. (print_insn): Handle att-mnemonic and intel-mnemonic. (float_reg): Replace SYSV386_COMPAT with "!M" and "M". (putop): Handle "!M" and "M". 2007-12-21 H.J. Lu <hongjiu.lu@intel.com> * Makefile.am (i386-gen.o): Also depend on $(srcdir)/../include/opcode/i386.h. * Makefile.in: Regenerated. 2007-11-29 Mark Shinwell <shinwell@codesourcery.com> * mips-dis.c (mips_arch_choices): Add Loongson-2E and -2F entries. * mips-opc.c (IL2E): New. (IL2F): New. (mips_builtin_opcodes): Add Loongson-2E and -2F instructions. Allow movz and movn for Loongson-2E and -2F. Add movnz entry. Move coprocessor encodings to the end of the table. Allow certain MIPS V .ps instructions on the Loongson-2E and -2F. 2007-11-29 Mark Shinwell <shinwell@codesourcery.com> * mips-opc.c (I3_32, I3_33, I4_32, I4_33, I5_33): New. (mips_builtin_opcodes): Use these new I* values. 2007-11-27 Andreas Krebbel <krebbel1@de.ibm.com> * s390-opc.txt ("tcet", "tcdt", "tcxt", "tget", "tgdt", "tgxt"): Removed. ("tdcet", "tdcdt", "tdcxt", "tdget", "tdgdt", "tdgxt"): Added. 2007-11-14 H.J. Lu <hongjiu.lu@intel.com> * ia64-ic.tbl: Updated for Itanium 9100 series. * ia64-raw.tbl: Likewise. * ia64-waw.tbl: Likewise. * ia64-asmtab.c: Regenerated. 2007-11-14 Tristan Gingold <gingold@adacore.com> * ia64-dis.c (print_insn_ia64): Handle ar.ruc. * ia64-gen.c (lookup_regindex): Likewise. 2007-11-07 Jens Arnold <jens@jens-arnold.net> PR gas/5228 * m68k-opc.c (m68k_opcodes): Fix coldfire msac.w instructions with parallel loads. 2007-11-07 Tristan Gingold <gingold@adacore.com> * ia64-dis.c (print_insn_ia64): Generate symbolic names for cr registers instead of register number. 2007-11-07 David O'Brien <obrien@FreeBSD.org> * arm-dis.c (arm_opcodes): Remove superflous escapes of percent operators. 2007-11-06 Peter Bergner <bergner@vnet.ibm.com> * ppc-opc.c (powerpc_opcodes): Remove the dcffix and dcffix. opcodes which are not included in the "Preliminary Decimal Floating-Point Architecture" document. 2007-11-01 H.J. Lu <hongjiu.lu@intel.com> * i386-gen.c (opcode_modifiers): Replace No_xSuf with No_ldSuf. * i386-opc.tbl: Likewise. * i386-opc.h (No_xSuf): Renamed to ... (No_ldSuf): This. (FWait): Updated. 2007-11-01 H.J. Lu <hongjiu.lu@intel.com> * i386-gen.c (opcode_modifiers): Add ByteOkIntel, ToDword, ToQword and AddrPrefixOp0. * i386-opc.h (ByteOkIntel): New. (ToDword): Likewise. (ToQword): Likewise. (AddrPrefixOp0): Likewise. (IsPrefix): Updated. (i386_opcode_modifier): Add byteokintel, todword, toqword and addrprefixop0. * i386-opc.tbl (cvtss2si): Add ToQword. (cvttss2si): Likewise. (cvtsd2si): Add ToDword. (cvttsd2si): Likewise. (monitor): Add AddrPrefixOp0. (invlpga): Likewise. (vmload): Likewise. (vmrun): Likewise. (vmsave): Likewise. (pextrb): Add ByteOkIntel. (pinsrb): Likewise. * i386-tbl.h: Regenerated. 2007-10-31 H.J. Lu <hongjiu.lu@intel.com> * i386-dis.c (USE_REG_TABLE): Defined as the previous one + 1. (USE_REG_TABLE): Likewise. (USE_MOD_TABLE): Likewise. (USE_RM_TABLE): Likewise. (USE_PREFIX_TABLE): Likewise. (USE_X86_64_TABLE): Likewise. (USE_3BYTE_TABLE): Likewise. 2007-10-26 H.J. Lu <hongjiu.lu@intel.com> * i386-dis.c (MOD_0F2B_PREFIX_0...MOD_0F2B_PREFIX_3): New. (MOD_0F51): Likewise. (MOD_0FD7): Likewise. (MOD_0FE7_PREFIX_2): Likewise. (MOD_0F382A_PREFIX_2): Likewise. (MOD_0F71_REG_2): Updated. (MOD_0FF0_PREFIX_3): Likewise. (MOD_62_32BIT): Likewise. (dis386_twobyte): Use MOD_0F51 and MOD_0FD7. (prefix_table): Use MOD_0F2B_PREFIX_0...MOD_0F2B_PREFIX_3, MOD_0FE7_PREFIX_2 and MOD_0F382A_PREFIX_2. (mod_table): Add MOD_0F2B_PREFIX_0...MOD_0F2B_PREFIX_3, MOD_0F51, MOD_0FD7 and MOD_0F382A_PREFIX_2. 2007-10-26 Nick Clifton <nickc@redhat.com> * arm-dis.c (print_insn): Check for a symtab that exists but is empty. 2007-10-24 Alan Modra <amodra@bigpond.net.au> * po/POTFILES.in: Regenerate. 2007-10-23 H.J. Lu <hongjiu.lu@intel.com> * i386-dis.c (OP_SIMD_Suffix): Renamed to ... (CMP_Fixup): This. Rewrite. (OPSIMD): Renamed to ... (CMP): This. Updated. (prefix_table): Update PREFIX_0FC2 entry. 2007-10-22 H.J. Lu <hongjiu.lu@intel.com> * i386-dis.c (prefix_table): Reordered by opcode. (mod_table): Likewise. 2007-10-19 H.J. Lu <hongjiu.lu@intel.com> * i386-dis.c (prefix_table): Use XS on psrldq and pslldq. 2007-10-17 Nathan Sidwell <nathan@codesourcery.com> * m68k-opc.c (m68k_opcodes): Correct move sr and ccr masks for coldfire. 2007-10-15 Peter Bergner <bergner@vnet.ibm.com> * ppc-opc.c (powerpc_opcodes): Fix the first two operands of dquaiq. to use the TE and FRT macros. 2007-10-15 Peter Bergner <bergner@vnet.ibm.com> * ppc-opc.c (TE): Correct signedness. (powerpc_opcodes): Sort psq_st and psq_stu according to major opcode number. 2007-10-15 H.J. Lu <hongjiu.lu@intel.com> * i386-dis.c (dis386_twobyte): Reformat. (prefix_table): Likewise. (three_byte_table): Likewise. 2007-10-15 Alan Modra <amodra@bigpond.net.au> * mcore-dis.c (print_insn_mcore): Protect "fprintf" var against macro expansion. 2007-10-12 H.J. Lu <hongjiu.lu@intel.com> * i386-gen.c (opcode_modifiers): Add FirstXmm0. * i386-opc.h (FirstXmm0): New. (IsPrefix): Updated. (i386_opcode_modifier): Add firstxmm0. * i386-opc.tbl (blendvpd): Replace RegKludge with FirstXmm0. (blendvps): Likewise. (pblendvb): Likewise. * i386-tbl.h: Regenerated. 2007-10-12 H.J. Lu <hongjiu.lu@intel.com> * i386-dis.c (prefix_table): Reformat pblendvb and blendvps. 2007-10-10 H.J. Lu <hongjiu.lu@intel.com> * i386-dis.c (v_mode): Defined as previous one + 1. (w_mode): Likewise. (d_mode): Likewise. (q_mode): Likewise. (t_mode): Likewise. (x_mode): Likewise. (m_mode): Likewise. (cond_jump_mode): Likewise. (loop_jcxz_mode): Likewise. (dq_mode): Likewise. (dqw_mode): Likewise. (f_mode): Likewise. (const_1_mode): Likewise. (stack_v_mode): Likewise. (z_mode): Likewise. (o_mode): Likewise. (dqb_mode): Likewise. (dqd_mode): Likewise. (es_reg): Likewise. (cs_reg): Likewise. (ss_reg): Likewise. (ds_reg): Likewise. (fs_reg): Likewise. (gs_reg): Likewise. (eAX_reg): Likewise. (eCX_reg): Likewise. (eDX_reg): Likewise. (eBX_reg): Likewise. (eSP_reg): Likewise. (eBP_reg): Likewise. (eSI_reg): Likewise. (eDI_reg): Likewise. (al_reg): Likewise. (cl_reg): Likewise. (dl_reg): Likewise. (bl_reg): Likewise. (ah_reg): Likewise. (ch_reg): Likewise. (dh_reg): Likewise. (bh_reg): Likewise. (ax_reg): Likewise. (cx_reg): Likewise. (dx_reg): Likewise. (bx_reg): Likewise. (sp_reg): Likewise. (bp_reg): Likewise. (si_reg): Likewise. (di_reg): Likewise. (rAX_reg): Likewise. (rCX_reg): Likewise. (rDX_reg): Likewise. (rBX_reg): Likewise. (rSP_reg): Likewise. (rBP_reg): Likewise. (rSI_reg): Likewise. (rDI_reg): Likewise. (z_mode_ax_reg): Likewise. (indir_dx_reg): Likewise. (DREX_OC1): Updated. (DREX_NO_OC0): Likewise. (DREX_MASK): Likewise. (MAX_BYTEMODE): New. Issue an error if MAX_BYTEMODE is not less than DREX_OC1. 2007-10-08 H.J. Lu <hongjiu.lu@intel.com> * i386-dis.c: Updated comments for 'Y'. (putop): Don't add 'q' for 'Y' if suffix_always isn't true. 2007-10-08 Maciej W. Rozycki <macro@linux-mips.org> * opcodes/mips-dis.c (mips_cp0_names_r3000): New definition. (mips_cp0_names_r4000): Likewise. (mips_arch_choices): Link to the above as appropriate. 2007-10-08 Nick Clifton <nickc@redhat.com> * configure.in (SHARED_DEPENDENCIES): Change non-cygwin dependency to be ../bfd/libbfd.la. * configure: Regenerate. 2007-10-05 H.J. Lu <hongjiu.lu@intel.com> * i386-dis.c (dis386_twobyte): Add getsec. * i386-gen.c (cpu_flags): Add CpuSMX. * i386-opc.h (CpuSMX): New. (CpuSSSE3): Updated. (i386_cpu_flags): Add cpusmx. * i386-opc.tbl: Add getsec. * i386-init.h: Regenerated. * i386-tbl.h: Likewise. 2007-10-05 H.J. Lu <hongjiu.lu@intel.com> * i386-dis.c (reg_table): Use "{ XX }" on "(bad)". (prefix_table): Likewise. 2007-10-04 H.J. Lu <hongjiu.lu@intel.com> * i386-dis.c (dis386_twobyte): Use EXx instead of EXq on unpckhpX and unpckhpX. 2007-10-04 David Daney <ddaney@avtrex.com> * mips-opc.c (mips_builtin_opcodes): Mark lwxc1 as working on FP_S registers. 2007-10-04 H.J. Lu <hongjiu.lu@intel.com> * i386-dis.c (MOD_0F12_PREFIX_0): Use "movlps" and "movhlps" instead of "movlpX" and "movhlpX", respectively. (MOD_0F16_PREFIX_0): Use "movhps" and "movlhps" instead of "movhpX" and "movlhpX", respectively. 2007-10-04 Nick Clifton <nickc@redhat.com> * configure.in (WIN32LDFLAGS): Rename to SHARED_LDFLAGS. (WIN32LIBADD): Rename to SHARED_LIBADD (SHARED_DEPENDENCIES): New exported variable. (enable_shared): Add dependency upon libbfd.la for non-cygwin based shared library builds. * Makefile.am (libopcodes_la_DEPENDENCIES): Append SHARED_DEPENDENCIES. (libopcodes_la_LIBADD): Rename WIN32LIBADD to SHARED_LIBADD. (libopcodes_la_LDFLAGS): Rename WIN32LDFLAGS to SHARED_LDFLAGS. * configure: Regenerate. * Makefile.in: Regenerate. PR gas/5100 * arc-opc.c (insert_offset): Fix spelling mistake in error message. 2007-10-03 H.J. Lu <hongjiu.lu@intel.com> * i386-dis.c (OP_REG): Set add to 0 only when needed. (OP_C): Likewise. (OP_D): Likewise. (OP_MMX): Likewise. (OP_XMM): Likewise. (OP_EM): Likewise. (OP_MXC): Likewise. (OP_EX): Likewise. 2007-10-03 H.J. Lu <hongjiu.lu@intel.com> * i386-opc.tbl: Update SSE comments. 2007-10-01 H.J. Lu <hongjiu.lu@intel.com> * i386-dis.c (THREE_BYTE_0FBA): Renamed to ... (THREE_BYTE_0F7B): This. (dis386_twobyte): Updated. (three_byte_table): Updated comments. 2007-10-01 M R Swami Reddy <MR.Swami.Reddy@nsc.com> * cr16-opc.c: Updated the branch on condition instructions with RELAXABLE flag. 2007-09-30 H.J. Lu <hongjiu.lu@intel.com> * 386-dis.c (prefix_table): Reformat comment. 2007-09-29 H.J. Lu <hongjiu.lu@intel.com> * 386-dis.c (USE_GROUPS): Renamed to ... (USE_REG_TABLE): This. (USE_OPC_EXT_TABLE): Renamed to ... (USE_MOD_TABLE): This. (USE_OPC_EXT_RM_TABLE): Renamed to ... (USE_RM_TABLE): This. (USE_XXX_TABLE): Reordered. (GRP): Renamed to ... (REG_TABLE): This. (OPC_EXT_TABLE): Renamed to ... (MOD_TABLE): This. (OPC_EXT_RM_TABLE): Renamed to ... (RM_TABLE): This. (GRP_XXX): Renamed to ... (REG_XXX): This. (PREGRP_XXX): Renamed to ... (PREFIX_XXX): This. (OPC_EXT_XXX): Renamed to ... (MOD_XXX): This. (OPC_EXT_RM_XXX): Renamed to ... (RM_XXX): This. (grps): Renamed to ... (reg_table): This (prefix_user_table): Renamed to ... (prefix_table): This (opc_ext_table): Renamed to ... (mod_table): This (opc_ext_rm_table): Renamed to ... (rm_table): This (OPC_EXT_RM_XXX): Likewise. (dis386): Updated. (dis386_twobyte): Likewise. (reg_table): Likewise. (prefix_table): Likewise. (x86_64_table): Likewise. (three_byte_table): Likewise. (mod_table): Likewise. (rm_table): Likewise. (get_valid_dis386): Likewise. 2007-09-28 H.J. Lu <hongjiu.lu@intel.com> * 386-dis.c (USE_PREFIX_USER_TABLE): Renamed to ... (USE_PREFIX_TABLE): This. (X86_64_SPECIAL): Renamed to ... (USE_X86_64_TABLE): This. (IS_3BYTE_OPCODE): Renamed to ... (USE_3BYTE_TABLE): This. (GRPXXX): Removed. (PREGRPXXX): Likewise. (X86_64_XXX): Likewise. (THREE_BYTE_XXX): Likewise. (OPC_EXT_XXX): Likewise. (OPC_EXT_RM_XXX): Likewise. (DIS386): New. (GRP): Likewise. (PREGRP): Likewise. (X86_64_TABLE): Likewise. (THREE_BYTE_TABLE): Likewise. (OPC_EXT_TABLE): Likewise. (OPC_EXT_RM_TABLE): Likewise. (GRP_XXX): Likewise. (PREGRP_XXX): Likewise. (X86_64_XXX): Likewise. (THREE_BYTE_XXX): Likewise. (OPC_EXT_XXX): Likewise. (OPC_EXT_RM_XXX): Likewise. (dis386): Updated. (dis386_twobyte): Likewise. (grps): Likewise. (prefix_user_table): Likewise. (x86_64_table): Likewise. (three_byte_table): Likewise. (opc_ext_table): Likewise. (opc_ext_rm_table): Likewise. (get_valid_dis386): Likewise. 2007-09-27 H.J. Lu <hongjiu.lu@intel.com> * i386-dis.c (dis386): Swap X86_64_27 with OPC_EXT_2. (x86_64_table): Likewise. (opc_ext_table): Likewise. 2007-09-27 H.J. Lu <hongjiu.lu@intel.com> PR binutils/5072