// SPDX-License-Identifier: GPL-2.0-only/* * * tdfxfb.c * * Author: Hannu Mallat <hmallat@cc.hut.fi> * * Copyright © 1999 Hannu Mallat * All rights reserved * * Created      : Thu Sep 23 18:17:43 1999, hmallat * Last modified: Tue Nov  2 21:19:47 1999, hmallat * * I2C part copied from the i2c-voodoo3.c driver by: * Frodo Looijaard <frodol@dds.nl>, * Philip Edelbrock <phil@netroedge.com>, * Ralph Metzler <rjkm@thp.uni-koeln.de>, and * Mark D. Studebaker <mdsxyz123@yahoo.com> * * Lots of the information here comes from the Daryll Strauss' Banshee * patches to the XF86 server, and the rest comes from the 3dfx * Banshee specification. I'm very much indebted to Daryll for his * work on the X server. * * Voodoo3 support was contributed Harold Oga. Lots of additions * (proper acceleration, 24 bpp, hardware cursor) and bug fixes by Attila * Kesmarki. Thanks guys! * * Voodoo1 and Voodoo2 support aren't relevant to this driver as they * behave very differently from the Voodoo3/4/5. For anyone wanting to * use frame buffer on the Voodoo1/2, see the sstfb driver (which is * located at http://www.sourceforge.net/projects/sstfb). * * While I _am_ grateful to 3Dfx for releasing the specs for Banshee, * I do wish the next version is a bit more complete. Without the XF86 * patches I couldn't have gotten even this far... for instance, the * extensions to the VGA register set go completely unmentioned in the * spec! Also, lots of references are made to the 'SST core', but no * spec is publicly available, AFAIK. * * The structure of this driver comes pretty much from the Permedia * driver by Ilario Nardinocchi, which in turn is based on skeletonfb. * * TODO: * - multihead support (basically need to support an array of fb_infos) * - support other architectures (PPC, Alpha); does the fact that the VGA *   core can be accessed only thru I/O (not memory mapped) complicate *   things? * * Version history: * * 0.1.4 (released 2002-05-28)	ported over to new fbdev api by James Simmons * * 0.1.3 (released 1999-11-02)	added Attila's panning support, code *				reorg, hwcursor address page size alignment *				(for mmapping both frame buffer and regs), *				and my changes to get rid of hardcoded *				VGA i/o register locations (uses PCI *				configuration info now) * 0.1.2 (released 1999-10-19)	added Attila Kesmarki's bug fixes and *				improvements * 0.1.1 (released 1999-10-07)	added Voodoo3 support by Harold Oga. * 0.1.0 (released 1999-10-06)	initial version * */ #include <linux/aperture.h>#include <linux/module.h>#include <linux/kernel.h>#include <linux/delay.h>#include <linux/errno.h>#include <linux/string.h>#include <linux/mm.h>#include <linux/slab.h>#include <linux/vmalloc.h>#include <linux/fb.h>#include <linux/init.h>#include <linux/pci.h>#include <asm/io.h> #include <video/tdfx.h>#include <video/vga.h> #define DPRINTK(a, b...) pr_debug("fb: %s: " a, __func__ , ## b) #define BANSHEE_MAX_PIXCLOCK 270000#define VOODOO3_MAX_PIXCLOCK 300000#define VOODOO5_MAX_PIXCLOCK 350000 static const struct fb_fix_screeninfo tdfx_fix = {	.type =		FB_TYPE_PACKED_PIXELS,	.visual =	FB_VISUAL_PSEUDOCOLOR,	.ypanstep =	1,	.ywrapstep =	1,	.accel =	FB_ACCEL_3DFX_BANSHEE}; static const struct fb_var_screeninfo tdfx_var = {	/* "640x480, 8 bpp @ 60 Hz */	.xres =		640,	.yres =		480,	.xres_virtual =	640,	.yres_virtual =	1024,	.bits_per_pixel = 8,	.red =		{0, 8, 0},	.blue =		{0, 8, 0},	.green =	{0, 8, 0},	.activate =	FB_ACTIVATE_NOW,	.height =	-1,	.width =	-1,	.accel_flags =	FB_ACCELF_TEXT,	.pixclock =	39722,	.left_margin =	40,	.right_margin =	24,	.upper_margin =	32,	.lower_margin =	11,	.hsync_len =	96,	.vsync_len =	2,	.vmode =	FB_VMODE_NONINTERLACED}; /* * PCI driver prototypes */static int tdfxfb_probe(struct pci_dev *pdev, const struct pci_device_id *id);static void tdfxfb_remove(struct pci_dev *pdev); static const struct pci_device_id tdfxfb_id_table[] = {	{		PCI_DEVICE(PCI_VENDOR_ID_3DFX, PCI_DEVICE_ID_3DFX_BANSHEE),		.class = PCI_BASE_CLASS_DISPLAY << 16, .class_mask = 0xff0000,	}, {		PCI_DEVICE(PCI_VENDOR_ID_3DFX, PCI_DEVICE_ID_3DFX_VOODOO3),		.class = PCI_BASE_CLASS_DISPLAY << 16, .class_mask = 0xff0000,	}, {		PCI_DEVICE(PCI_VENDOR_ID_3DFX, PCI_DEVICE_ID_3DFX_VOODOO5),		.class = PCI_BASE_CLASS_DISPLAY << 16, .class_mask = 0xff0000,	},	{ }}; static struct pci_driver tdfxfb_driver = {	.name		= "tdfxfb",	.id_table	= tdfxfb_id_table,	.probe		= tdfxfb_probe,	.remove		= tdfxfb_remove,}; MODULE_DEVICE_TABLE(pci, tdfxfb_id_table); /* * Driver data */static int nopan;static int nowrap = 1;      /* not implemented (yet) */static int hwcursor = 1;static char *mode_option;static bool nomtrr; /* ------------------------------------------------------------------------- *			Hardware-specific funcions * ------------------------------------------------------------------------- */ static inline u8 vga_inb(struct tdfx_par *par, u32 reg){	return inb(par->iobase + reg - 0x300);} static inline void vga_outb(struct tdfx_par *par, u32 reg, u8 val){	outb(val, par->iobase + reg - 0x300);} static inline void gra_outb(struct tdfx_par *par, u32 idx, u8 val){	vga_outb(par, GRA_I, idx);	wmb();	vga_outb(par, GRA_D, val);	wmb();} static inline void seq_outb(struct tdfx_par *par, u32 idx, u8 val){	vga_outb(par, SEQ_I, idx);	wmb();	vga_outb(par, SEQ_D, val);	wmb();} static inline u8 seq_inb(struct tdfx_par *par, u32 idx){	vga_outb(par, SEQ_I, idx);	mb();	return vga_inb(par, SEQ_D);} static inline void crt_outb(struct tdfx_par *par, u32 idx, u8 val){	vga_outb(par, CRT_I, idx);	wmb();	vga_outb(par, CRT_D, val);	wmb();} static inline u8 crt_inb(struct tdfx_par *par, u32 idx){	vga_outb(par, CRT_I, idx);	mb();	return vga_inb(par, CRT_D);} static inline void att_outb(struct tdfx_par *par, u32 idx, u8 val){	vga_inb(par, IS1_R);	vga_outb(par, ATT_IW, idx);	vga_outb(par, ATT_IW, val);} static inline void vga_disable_video(struct tdfx_par *par){	unsigned char s; 	s = seq_inb(par, 0x01) | 0x20;	seq_outb(par, 0x00, 0x01);	seq_outb(par, 0x01, s);	seq_outb(par, 0x00, 0x03);} static inline void vga_enable_video(struct tdfx_par *par){	unsigned char s; 	s = seq_inb(par, 0x01) & 0xdf;	seq_outb(par, 0x00, 0x01);	seq_outb(par, 0x01, s);	seq_outb(par, 0x00, 0x03);} static inline void vga_enable_palette(struct tdfx_par *par){	vga_inb(par, IS1_R);	mb();	vga_outb(par, ATT_IW, 0x20);} static inline u32 tdfx_inl(struct tdfx_par *par, unsigned int reg){	return readl(par->regbase_virt + reg);} static inline void tdfx_outl(struct tdfx_par *par, unsigned int reg, u32 val){	writel(val, par->regbase_virt + reg);} static inline void banshee_make_room(struct tdfx_par *par, int size){	/* Note: The Voodoo3's onboard FIFO has 32 slots. This loop	 * won't quit if you ask for more. */	while ((tdfx_inl(par, STATUS) & 0x1f) < size - 1)		cpu_relax();} static int banshee_wait_idle(struct fb_info *info){	struct tdfx_par *par = info->par;	int i = 0; 	banshee_make_room(par, 1);	tdfx_outl(par, COMMAND_3D, COMMAND_3D_NOP); 	do {		if ((tdfx_inl(par, STATUS) & STATUS_BUSY) == 0)			i++;	} while (i < 3); 	return 0;} /* * Set the color of a palette entry in 8bpp mode */static inline void do_setpalentry(struct tdfx_par *par, unsigned regno, u32 c){	banshee_make_room(par, 2);	tdfx_outl(par, DACADDR, regno);	/* read after write makes it working */	tdfx_inl(par, DACADDR);	tdfx_outl(par, DACDATA, c);} static u32 do_calc_pll(int freq, int *freq_out){	int m, n, k, best_m, best_n, best_k, best_error;	int fref = 14318; 	best_error = freq;	best_n = best_m = best_k = 0; 	for (k = 3; k >= 0; k--) {		for (m = 63; m >= 0; m--) {			/*			 * Estimate value of n that produces target frequency			 * with current m and k			 */			int n_estimated = ((freq * (m + 2) << k) / fref) - 2; 			/* Search neighborhood of estimated n */			for (n = max(0, n_estimated);				n <= min(255, n_estimated + 1);				n++) {				/*				 * Calculate PLL freqency with current m, k and				 * estimated n				 */				int f = (fref * (n + 2) / (m + 2)) >> k;				int error = abs(f - freq); 				/*				 * If this is the closest we've come to the				 * target frequency then remember n, m and k				 */				if (error < best_error) {					best_error = error;					best_n = n;					best_m = m;					best_k = k;				}			}		}	} 	n = best_n;	m = best_m;	k = best_k;	*freq_out = (fref * (n + 2) / (m + 2)) >> k; 	return (n << 8) | (m << 2) | k;} /* * Convert a pllctrl register value back to a frequency in kHz. * Formula from 3dfx documentation. */static u32 tdfx_pll_to_khz(u32 pll){	return (14318 * (((pll >> 8) & 0xff) + 2) /		(((pll >> 2) & 0x3f) + 2)) >> (pll & 3);} /* Layout of the "OEM config" table in voodoo 3 BIOS */struct tdfx_bios_cfg {	__le32 pciinit0;	/* 0x00 */	__le32 miscinit0;	/* 0x04 */	__le32 miscinit1;	/* 0x08 */	__le32 draminit0;	/* 0x0c */	__le32 draminit1;	/* 0x10 */	__le32 agpinit0;	/* 0x14 */	__le32 pllctrl1;	/* 0x18 - memory PLL */	__le32 pllctrl2;	/* 0x1c - graphics PLL */	__le32 sgrammode;	/* 0x20 - SGRAM/SDRAM mode register data */} __packed; #define TDFX_ROM_CFG_PTR	0x50 static bool tdfxfb_get_bios_cfg(struct pci_dev *pdev,				struct tdfx_bios_cfg *cfg){	u16 romcfg, oemcfg;	void __iomem *rom;	size_t romsize;	u8 *image;	u32 khz; 	/* This only works for the Voodoo 3 for now */	if (pdev->device != PCI_DEVICE_ID_3DFX_VOODOO3)		return false; 	rom = pci_map_rom(pdev, &romsize);	if (!rom || !romsize)		return false; 	image = vmalloc(romsize);	if (!image) {		pci_unmap_rom(pdev, rom);		return false;	}	memcpy_fromio(image, rom, romsize);	pci_unmap_rom(pdev, rom); 	/* ROM[0x50] -> ROM config table -> OEM config table */	if (TDFX_ROM_CFG_PTR + 2 > romsize)		goto out;	romcfg = image[TDFX_ROM_CFG_PTR] | image[TDFX_ROM_CFG_PTR + 1] << 8;	if (romcfg == 0xffff || romcfg + 2 > romsize)		goto out;	oemcfg = image[romcfg] | image[romcfg + 1] << 8;	if (oemcfg == 0xffff || oemcfg + sizeof(*cfg) > romsize)		goto out;	memcpy(cfg, image + oemcfg, sizeof(*cfg));	vfree(image); 	/*	 * Make sure we didn't read garbage from the BIOS and will	 * end up setting a frequency that explodes someone's expensive	 * card.	 */	khz = tdfx_pll_to_khz(le32_to_cpu(cfg->pllctrl1));	if (khz < 40000 || khz > 250000 || !le32_to_cpu(cfg->draminit0))		return false;	return true; out:	vfree(image);	return false;} /* * Try to work out if the card was booted or not, just checks if * one of the dram config registers matches what is in the config * table if there is one. * * If we have a BIOS config table attempt to manually boot the * card if needed. */static int tdfxfb_hw_init(struct fb_info *info, struct pci_dev *pdev){	u32 mempll, gfxpll, draminit0, draminit1, miscinit1, dram_mode;	struct tdfx_par *par = info->par;	struct tdfx_bios_cfg cfg;	bool have_cfg = tdfxfb_get_bios_cfg(pdev, &cfg); 	/*	 * Can't tell if the card is booted or not,	 * also cannot boot it. Card might not function.	 */	if (!have_cfg)		return 0; 	/* Card is, probably, already configured. */	if (tdfx_inl(par, DRAMINIT0) == le32_to_cpu(cfg.draminit0))		return 0; 	dev_info(&pdev->dev,		 "Manually booting card using config table\n"); 	mempll = le32_to_cpu(cfg.pllctrl1);	gfxpll = le32_to_cpu(cfg.pllctrl2);	draminit0 = le32_to_cpu(cfg.draminit0);	draminit1 = le32_to_cpu(cfg.draminit1);	miscinit1 = le32_to_cpu(cfg.miscinit1);	dram_mode = le32_to_cpu(cfg.sgrammode);	tdfx_outl(par, PCIINIT0, le32_to_cpu(cfg.pciinit0));	tdfx_outl(par, AGPINIT, le32_to_cpu(cfg.agpinit0)); 	/* memory clock, and the graphics clock if the card wants one */	tdfx_outl(par, PLLCTRL1, mempll);	if (gfxpll)		tdfx_outl(par, PLLCTRL2, gfxpll);	/* flush posted writes */	tdfx_inl(par, PLLCTRL1);	/* PLL lock */	udelay(100); 	tdfx_outl(par, MISCINIT1, miscinit1);	tdfx_outl(par, DRAMINIT0, draminit0);	tdfx_outl(par, DRAMINIT1, draminit1); 	/* SDRAM/SGRAM wake up: load the mode register */	tdfx_outl(par, DRAMDATA, dram_mode);	tdfx_outl(par, DRAMCOMMAND, 0x10d); 	tdfx_outl(par, LFBMEMORYCONFIG, 0x00001fff);	tdfx_outl(par, MISCINIT0, le32_to_cpu(cfg.miscinit0)); 	return 0;} static void do_write_regs(struct fb_info *info, struct banshee_reg *reg){	struct tdfx_par *par = info->par;	int i; 	banshee_wait_idle(info); 	tdfx_outl(par, MISCINIT1, tdfx_inl(par, MISCINIT1) | 0x01); 	/* Wake the VGA core if it hasn't already been woken up */	tdfx_outl(par, VGAINIT0, reg->vgainit0);	vga_outb(par, 0x3c3, 0x01); 	crt_outb(par, 0x11, crt_inb(par, 0x11) & 0x7f); /* CRT unprotect */ 	banshee_make_room(par, 3);	tdfx_outl(par, VGAINIT1, reg->vgainit1 & 0x001FFFFF);	tdfx_outl(par, VIDPROCCFG, reg->vidcfg & ~0x00000001);#if 0	tdfx_outl(par, PLLCTRL1, reg->mempll);	tdfx_outl(par, PLLCTRL2, reg->gfxpll);#endif

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