// SPDX-License-Identifier: GPL-2.0-only/* * udlfb.c -- Framebuffer driver for DisplayLink USB controller * * Copyright (C) 2009 Roberto De Ioris <roberto@unbit.it> * Copyright (C) 2009 Jaya Kumar <jayakumar.lkml@gmail.com> * Copyright (C) 2009 Bernie Thompson <bernie@plugable.com> * * Layout is based on skeletonfb by James Simmons and Geert Uytterhoeven, * usb-skeleton by GregKH. * * Device-specific portions based on information from Displaylink, with work * from Florian Echtler, Henrik Bjerregaard Pedersen, and others. */ #include <linux/module.h>#include <linux/kernel.h>#include <linux/init.h>#include <linux/usb.h>#include <linux/uaccess.h>#include <linux/mm.h>#include <linux/fb.h>#include <linux/vmalloc.h>#include <linux/slab.h>#include <linux/delay.h>#include <linux/unaligned.h>#include <video/udlfb.h>#include "edid.h" #define OUT_EP_NUM 1 /* The endpoint number we will use */ static const struct fb_fix_screeninfo dlfb_fix = { .id = "udlfb", .type = FB_TYPE_PACKED_PIXELS, .visual = FB_VISUAL_TRUECOLOR, .xpanstep = 0, .ypanstep = 0, .ywrapstep = 0, .accel = FB_ACCEL_NONE,}; static const u32 udlfb_info_flags = FBINFO_READS_FAST | FBINFO_VIRTFB | FBINFO_HWACCEL_IMAGEBLIT | FBINFO_HWACCEL_FILLRECT | FBINFO_HWACCEL_COPYAREA | FBINFO_MISC_ALWAYS_SETPAR; /* * There are many DisplayLink-based graphics products, all with unique PIDs. * So we match on DisplayLink's VID + Vendor-Defined Interface Class (0xff) * We also require a match on SubClass (0x00) and Protocol (0x00), * which is compatible with all known USB 2.0 era graphics chips and firmware, * but allows DisplayLink to increment those for any future incompatible chips */static const struct usb_device_id id_table[] = { {.idVendor = 0x17e9, .bInterfaceClass = 0xff, .bInterfaceSubClass = 0x00, .bInterfaceProtocol = 0x00, .match_flags = USB_DEVICE_ID_MATCH_VENDOR | USB_DEVICE_ID_MATCH_INT_CLASS | USB_DEVICE_ID_MATCH_INT_SUBCLASS | USB_DEVICE_ID_MATCH_INT_PROTOCOL, }, {},};MODULE_DEVICE_TABLE(usb, id_table); /* module options */static bool console = true; /* Allow fbcon to open framebuffer */static bool fb_defio = true; /* Detect mmap writes using page faults */static bool shadow = true; /* Optionally disable shadow framebuffer */static int pixel_limit; /* Optionally force a pixel resolution limit */ struct dlfb_deferred_free { struct list_head list; void *mem;}; static int dlfb_realloc_framebuffer(struct dlfb_data *dlfb, struct fb_info *info, u32 new_len); /* dlfb keeps a list of urbs for efficient bulk transfers */static void dlfb_urb_completion(struct urb *urb);static struct urb *dlfb_get_urb(struct dlfb_data *dlfb);static int dlfb_submit_urb(struct dlfb_data *dlfb, struct urb * urb, size_t len);static int dlfb_alloc_urb_list(struct dlfb_data *dlfb, int count, size_t size);static void dlfb_free_urb_list(struct dlfb_data *dlfb); /* * All DisplayLink bulk operations start with 0xAF, followed by specific code * All operations are written to buffers which then later get sent to device */static char *dlfb_set_register(char *buf, u8 reg, u8 val){ *buf++ = 0xAF; *buf++ = 0x20; *buf++ = reg; *buf++ = val; return buf;} static char *dlfb_vidreg_lock(char *buf){ return dlfb_set_register(buf, 0xFF, 0x00);} static char *dlfb_vidreg_unlock(char *buf){ return dlfb_set_register(buf, 0xFF, 0xFF);} /* * Map FB_BLANK_* to DisplayLink register * DLReg FB_BLANK_* * ----- ----------------------------- * 0x00 FB_BLANK_UNBLANK (0) * 0x01 FB_BLANK (1) * 0x03 FB_BLANK_VSYNC_SUSPEND (2) * 0x05 FB_BLANK_HSYNC_SUSPEND (3) * 0x07 FB_BLANK_POWERDOWN (4) Note: requires modeset to come back */static char *dlfb_blanking(char *buf, int fb_blank){ u8 reg; switch (fb_blank) { case FB_BLANK_POWERDOWN: reg = 0x07; break; case FB_BLANK_HSYNC_SUSPEND: reg = 0x05; break; case FB_BLANK_VSYNC_SUSPEND: reg = 0x03; break; case FB_BLANK_NORMAL: reg = 0x01; break; default: reg = 0x00; } buf = dlfb_set_register(buf, 0x1F, reg); return buf;} static char *dlfb_set_color_depth(char *buf, u8 selection){ return dlfb_set_register(buf, 0x00, selection);} static char *dlfb_set_base16bpp(char *wrptr, u32 base){ /* the base pointer is 16 bits wide, 0x20 is hi byte. */ wrptr = dlfb_set_register(wrptr, 0x20, base >> 16); wrptr = dlfb_set_register(wrptr, 0x21, base >> 8); return dlfb_set_register(wrptr, 0x22, base);} /* * DisplayLink HW has separate 16bpp and 8bpp framebuffers. * In 24bpp modes, the low 323 RGB bits go in the 8bpp framebuffer */static char *dlfb_set_base8bpp(char *wrptr, u32 base){ wrptr = dlfb_set_register(wrptr, 0x26, base >> 16); wrptr = dlfb_set_register(wrptr, 0x27, base >> 8); return dlfb_set_register(wrptr, 0x28, base);} static char *dlfb_set_register_16(char *wrptr, u8 reg, u16 value){ wrptr = dlfb_set_register(wrptr, reg, value >> 8); return dlfb_set_register(wrptr, reg+1, value);} /* * This is kind of weird because the controller takes some * register values in a different byte order than other registers. */static char *dlfb_set_register_16be(char *wrptr, u8 reg, u16 value){ wrptr = dlfb_set_register(wrptr, reg, value); return dlfb_set_register(wrptr, reg+1, value >> 8);} /* * LFSR is linear feedback shift register. The reason we have this is * because the display controller needs to minimize the clock depth of * various counters used in the display path. So this code reverses the * provided value into the lfsr16 value by counting backwards to get * the value that needs to be set in the hardware comparator to get the * same actual count. This makes sense once you read above a couple of * times and think about it from a hardware perspective. */static u16 dlfb_lfsr16(u16 actual_count){ u32 lv = 0xFFFF; /* This is the lfsr value that the hw starts with */ while (actual_count--) { lv = ((lv << 1) | (((lv >> 15) ^ (lv >> 4) ^ (lv >> 2) ^ (lv >> 1)) & 1)) & 0xFFFF; } return (u16) lv;} /* * This does LFSR conversion on the value that is to be written. * See LFSR explanation above for more detail. */static char *dlfb_set_register_lfsr16(char *wrptr, u8 reg, u16 value){ return dlfb_set_register_16(wrptr, reg, dlfb_lfsr16(value));} /* * This takes a standard fbdev screeninfo struct and all of its monitor mode * details and converts them into the DisplayLink equivalent register commands. */static char *dlfb_set_vid_cmds(char *wrptr, struct fb_var_screeninfo *var){ u16 xds, yds; u16 xde, yde; u16 yec; /* x display start */ xds = var->left_margin + var->hsync_len; wrptr = dlfb_set_register_lfsr16(wrptr, 0x01, xds); /* x display end */ xde = xds + var->xres; wrptr = dlfb_set_register_lfsr16(wrptr, 0x03, xde); /* y display start */ yds = var->upper_margin + var->vsync_len; wrptr = dlfb_set_register_lfsr16(wrptr, 0x05, yds); /* y display end */ yde = yds + var->yres; wrptr = dlfb_set_register_lfsr16(wrptr, 0x07, yde); /* x end count is active + blanking - 1 */ wrptr = dlfb_set_register_lfsr16(wrptr, 0x09, xde + var->right_margin - 1); /* libdlo hardcodes hsync start to 1 */ wrptr = dlfb_set_register_lfsr16(wrptr, 0x0B, 1); /* hsync end is width of sync pulse + 1 */ wrptr = dlfb_set_register_lfsr16(wrptr, 0x0D, var->hsync_len + 1); /* hpixels is active pixels */ wrptr = dlfb_set_register_16(wrptr, 0x0F, var->xres); /* yendcount is vertical active + vertical blanking */ yec = var->yres + var->upper_margin + var->lower_margin + var->vsync_len; wrptr = dlfb_set_register_lfsr16(wrptr, 0x11, yec); /* libdlo hardcodes vsync start to 0 */ wrptr = dlfb_set_register_lfsr16(wrptr, 0x13, 0); /* vsync end is width of vsync pulse */ wrptr = dlfb_set_register_lfsr16(wrptr, 0x15, var->vsync_len); /* vpixels is active pixels */ wrptr = dlfb_set_register_16(wrptr, 0x17, var->yres); /* convert picoseconds to 5kHz multiple for pclk5k = x * 1E12/5k */ wrptr = dlfb_set_register_16be(wrptr, 0x1B, 200*1000*1000/var->pixclock); return wrptr;} /* * This takes a standard fbdev screeninfo struct that was fetched or prepared * and then generates the appropriate command sequence that then drives the * display controller. */static int dlfb_set_video_mode(struct dlfb_data *dlfb, struct fb_var_screeninfo *var){ char *buf; char *wrptr; int retval; int writesize; struct urb *urb; if (!atomic_read(&dlfb->usb_active)) return -EPERM; urb = dlfb_get_urb(dlfb); if (!urb) return -ENOMEM; buf = (char *) urb->transfer_buffer; /* * This first section has to do with setting the base address on the * controller * associated with the display. There are 2 base * pointers, currently, we only * use the 16 bpp segment. */ wrptr = dlfb_vidreg_lock(buf); wrptr = dlfb_set_color_depth(wrptr, 0x00); /* set base for 16bpp segment to 0 */ wrptr = dlfb_set_base16bpp(wrptr, 0); /* set base for 8bpp segment to end of fb */ wrptr = dlfb_set_base8bpp(wrptr, dlfb->info->fix.smem_len); wrptr = dlfb_set_vid_cmds(wrptr, var); wrptr = dlfb_blanking(wrptr, FB_BLANK_UNBLANK); wrptr = dlfb_vidreg_unlock(wrptr); writesize = wrptr - buf; retval = dlfb_submit_urb(dlfb, urb, writesize); dlfb->blank_mode = FB_BLANK_UNBLANK; return retval;} static void dlfb_vm_open(struct vm_area_struct *vma){ struct dlfb_data *dlfb = vma->vm_private_data; atomic_inc(&dlfb->mmap_count);} static void dlfb_vm_close(struct vm_area_struct *vma){ struct dlfb_data *dlfb = vma->vm_private_data; atomic_dec(&dlfb->mmap_count);} static const struct vm_operations_struct dlfb_vm_ops = { .open = dlfb_vm_open, .close = dlfb_vm_close,}; static int dlfb_ops_mmap(struct fb_info *info, struct vm_area_struct *vma){ unsigned long start = vma->vm_start; unsigned long size = vma->vm_end - vma->vm_start; unsigned long offset = vma->vm_pgoff << PAGE_SHIFT; unsigned long page, pos; struct dlfb_data *dlfb = info->par; if (info->fbdefio) return fb_deferred_io_mmap(info, vma); vma->vm_page_prot = pgprot_decrypted(vma->vm_page_prot); if (vma->vm_pgoff > (~0UL >> PAGE_SHIFT)) return -EINVAL; if (size > info->fix.smem_len) return -EINVAL; if (offset > info->fix.smem_len - size) return -EINVAL; pos = (unsigned long)info->fix.smem_start + offset; dev_dbg(info->dev, "mmap() framebuffer addr:%lu size:%lu\n", pos, size); while (size > 0) { page = vmalloc_to_pfn((void *)pos); if (remap_pfn_range(vma, start, page, PAGE_SIZE, PAGE_SHARED)) return -EAGAIN; start += PAGE_SIZE; pos += PAGE_SIZE; if (size > PAGE_SIZE) size -= PAGE_SIZE; else size = 0; } vma->vm_ops = &dlfb_vm_ops; vma->vm_private_data = dlfb; atomic_inc(&dlfb->mmap_count); return 0;} /* * Trims identical data from front and back of line * Sets new front buffer address and width * And returns byte count of identical pixels * Assumes CPU natural alignment (unsigned long) * for back and front buffer ptrs and width */static int dlfb_trim_hline(const u8 *bback, const u8 **bfront, int *width_bytes){ int j, k; const unsigned long *back = (const unsigned long *) bback; const unsigned long *front = (const unsigned long *) *bfront; const int width = *width_bytes / sizeof(unsigned long); int identical; int start = width; int end = width; for (j = 0; j < width; j++) { if (back[j] != front[j]) { start = j; break; } } for (k = width - 1; k > j; k--) { if (back[k] != front[k]) { end = k+1; break; } } identical = start + (width - end); *bfront = (u8 *) &front[start]; *width_bytes = (end - start) * sizeof(unsigned long); return identical * sizeof(unsigned long);} /* * Render a command stream for an encoded horizontal line segment of pixels. * * A command buffer holds several commands. * It always begins with a fresh command header * (the protocol doesn't require this, but we enforce it to allow * multiple buffers to be potentially encoded and sent in parallel). * A single command encodes one contiguous horizontal line of pixels * * The function relies on the client to do all allocation, so that * rendering can be done directly to output buffers (e.g. USB URBs). * The function fills the supplied command buffer, providing information * on where it left off, so the client may call in again with additional * buffers if the line will take several buffers to complete. * * A single command can transmit a maximum of 256 pixels, * regardless of the compression ratio (protocol design limit). * To the hardware, 0 for a size byte means 256 * * Rather than 256 pixel commands which are either rl or raw encoded, * the rlx command simply assumes alternating raw and rl spans within one cmd. * This has a slightly larger header overhead, but produces more even results. * It also processes all data (read and write) in a single pass. * Performance benchmarks of common cases show it having just slightly better * compression than 256 pixel raw or rle commands, with similar CPU consumpion. * But for very rl friendly data, will compress not quite as well. */static void dlfb_compress_hline( const uint16_t **pixel_start_ptr, const uint16_t *const pixel_end, uint32_t *device_address_ptr, uint8_t **command_buffer_ptr, const uint8_t *const cmd_buffer_end, unsigned long back_buffer_offset, int *ident_ptr){ const uint16_t *pixel = *pixel_start_ptr; uint32_t dev_addr = *device_address_ptr; uint8_t *cmd = *command_buffer_ptr; while ((pixel_end > pixel) && (cmd_buffer_end - MIN_RLX_CMD_BYTES > cmd)) { uint8_t *raw_pixels_count_byte = NULL; uint8_t *cmd_pixels_count_byte = NULL; const uint16_t *raw_pixel_start = NULL; const uint16_t *cmd_pixel_start, *cmd_pixel_end = NULL; if (back_buffer_offset && *pixel == *(u16 *)((u8 *)pixel + back_buffer_offset)) { pixel++; dev_addr += BPP; (*ident_ptr)++; continue; } *cmd++ = 0xAF; *cmd++ = 0x6B; *cmd++ = dev_addr >> 16; *cmd++ = dev_addr >> 8; *cmd++ = dev_addr; cmd_pixels_count_byte = cmd++; /* we'll know this later */ cmd_pixel_start = pixel; raw_pixels_count_byte = cmd++; /* we'll know this later */ raw_pixel_start = pixel; cmd_pixel_end = pixel + min3(MAX_CMD_PIXELS + 1UL, (unsigned long)(pixel_end - pixel), (unsigned long)(cmd_buffer_end - 1 - cmd) / BPP); if (back_buffer_offset) { /* note: the framebuffer may change under us, so we must test for underflow */ while (cmd_pixel_end - 1 > pixel && *(cmd_pixel_end - 1) == *(u16 *)((u8 *)(cmd_pixel_end - 1) + back_buffer_offset)) cmd_pixel_end--;Lines 1–500 of 2000. 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// SPDX-License-Identifier: GPL-2.0-only /* * udlfb.c -- Framebuffer driver for DisplayLink USB controller * * Copyright (C) 2009 Roberto De Ioris <roberto@unbit.it> * Copyright (C) 2009 Jaya Kumar <jayakumar.lkml@gmail.com> * Copyright (C) 2009 Bernie Thompson <bernie@plugable.com> * * Layout is based on skeletonfb by James Simmons and Geert Uytterhoeven, * usb-skeleton by GregKH. * * Device-specific portions based on information from Displaylink, with work * from Florian Echtler, Henrik Bjerregaard Pedersen, and others. */ #include <linux/module.h> #include <linux/kernel.h> #include <linux/init.h> #include <linux/usb.h> #include <linux/uaccess.h> #include <linux/mm.h> #include <linux/fb.h> #include <linux/vmalloc.h> #include <linux/slab.h> #include <linux/delay.h> #include <linux/unaligned.h> #include <video/udlfb.h> #include "edid.h" #define OUT_EP_NUM 1 /* The endpoint number we will use */ static const struct fb_fix_screeninfo dlfb_fix = { .id = "udlfb", .type = FB_TYPE_PACKED_PIXELS, .visual = FB_VISUAL_TRUECOLOR, .xpanstep = 0, .ypanstep = 0, .ywrapstep = 0, .accel = FB_ACCEL_NONE, }; static const u32 udlfb_info_flags = FBINFO_READS_FAST | FBINFO_VIRTFB | FBINFO_HWACCEL_IMAGEBLIT | FBINFO_HWACCEL_FILLRECT | FBINFO_HWACCEL_COPYAREA | FBINFO_MISC_ALWAYS_SETPAR; /* * There are many DisplayLink-based graphics products, all with unique PIDs. * So we match on DisplayLink's VID + Vendor-Defined Interface Class (0xff) * We also require a match on SubClass (0x00) and Protocol (0x00), * which is compatible with all known USB 2.0 era graphics chips and firmware, * but allows DisplayLink to increment those for any future incompatible chips */ static const struct usb_device_id id_table[] = { {.idVendor = 0x17e9, .bInterfaceClass = 0xff, .bInterfaceSubClass = 0x00, .bInterfaceProtocol = 0x00, .match_flags = USB_DEVICE_ID_MATCH_VENDOR | USB_DEVICE_ID_MATCH_INT_CLASS | USB_DEVICE_ID_MATCH_INT_SUBCLASS | USB_DEVICE_ID_MATCH_INT_PROTOCOL, }, {}, }; MODULE_DEVICE_TABLE(usb, id_table); /* module options */ static bool console = true; /* Allow fbcon to open framebuffer */ static bool fb_defio = true; /* Detect mmap writes using page faults */ static bool shadow = true; /* Optionally disable shadow framebuffer */ static int pixel_limit; /* Optionally force a pixel resolution limit */ struct dlfb_deferred_free { struct list_head list; void *mem; }; static int dlfb_realloc_framebuffer(struct dlfb_data *dlfb, struct fb_info *info, u32 new_len); /* dlfb keeps a list of urbs for efficient bulk transfers */ static void dlfb_urb_completion(struct urb *urb); static struct urb *dlfb_get_urb(struct dlfb_data *dlfb); static int dlfb_submit_urb(struct dlfb_data *dlfb, struct urb * urb, size_t len); static int dlfb_alloc_urb_list(struct dlfb_data *dlfb, int count, size_t size); static void dlfb_free_urb_list(struct dlfb_data *dlfb); /* * All DisplayLink bulk operations start with 0xAF, followed by specific code * All operations are written to buffers which then later get sent to device */ static char *dlfb_set_register(char *buf, u8 reg, u8 val) { *buf++ = 0xAF; *buf++ = 0x20; *buf++ = reg; *buf++ = val; return buf; } static char *dlfb_vidreg_lock(char *buf) { return dlfb_set_register(buf, 0xFF, 0x00); } static char *dlfb_vidreg_unlock(char *buf) { return dlfb_set_register(buf, 0xFF, 0xFF); } /* * Map FB_BLANK_* to DisplayLink register * DLReg FB_BLANK_* * ----- ----------------------------- * 0x00 FB_BLANK_UNBLANK (0) * 0x01 FB_BLANK (1) * 0x03 FB_BLANK_VSYNC_SUSPEND (2) * 0x05 FB_BLANK_HSYNC_SUSPEND (3) * 0x07 FB_BLANK_POWERDOWN (4) Note: requires modeset to come back */ static char *dlfb_blanking(char *buf, int fb_blank) { u8 reg; switch (fb_blank) { case FB_BLANK_POWERDOWN: reg = 0x07; break; case FB_BLANK_HSYNC_SUSPEND: reg = 0x05; break; case FB_BLANK_VSYNC_SUSPEND: reg = 0x03; break; case FB_BLANK_NORMAL: reg = 0x01; break; default: reg = 0x00; } buf = dlfb_set_register(buf, 0x1F, reg); return buf; } static char *dlfb_set_color_depth(char *buf, u8 selection) { return dlfb_set_register(buf, 0x00, selection); } static char *dlfb_set_base16bpp(char *wrptr, u32 base) { /* the base pointer is 16 bits wide, 0x20 is hi byte. */ wrptr = dlfb_set_register(wrptr, 0x20, base >> 16); wrptr = dlfb_set_register(wrptr, 0x21, base >> 8); return dlfb_set_register(wrptr, 0x22, base); } /* * DisplayLink HW has separate 16bpp and 8bpp framebuffers. * In 24bpp modes, the low 323 RGB bits go in the 8bpp framebuffer */ static char *dlfb_set_base8bpp(char *wrptr, u32 base) { wrptr = dlfb_set_register(wrptr, 0x26, base >> 16); wrptr = dlfb_set_register(wrptr, 0x27, base >> 8); return dlfb_set_register(wrptr, 0x28, base); } static char *dlfb_set_register_16(char *wrptr, u8 reg, u16 value) { wrptr = dlfb_set_register(wrptr, reg, value >> 8); return dlfb_set_register(wrptr, reg+1, value); } /* * This is kind of weird because the controller takes some * register values in a different byte order than other registers. */ static char *dlfb_set_register_16be(char *wrptr, u8 reg, u16 value) { wrptr = dlfb_set_register(wrptr, reg, value); return dlfb_set_register(wrptr, reg+1, value >> 8); } /* * LFSR is linear feedback shift register. The reason we have this is * because the display controller needs to minimize the clock depth of * various counters used in the display path. So this code reverses the * provided value into the lfsr16 value by counting backwards to get * the value that needs to be set in the hardware comparator to get the * same actual count. This makes sense once you read above a couple of * times and think about it from a hardware perspective. */ static u16 dlfb_lfsr16(u16 actual_count) { u32 lv = 0xFFFF; /* This is the lfsr value that the hw starts with */ while (actual_count--) { lv = ((lv << 1) | (((lv >> 15) ^ (lv >> 4) ^ (lv >> 2) ^ (lv >> 1)) & 1)) & 0xFFFF; } return (u16) lv; } /* * This does LFSR conversion on the value that is to be written. * See LFSR explanation above for more detail. */ static char *dlfb_set_register_lfsr16(char *wrptr, u8 reg, u16 value) { return dlfb_set_register_16(wrptr, reg, dlfb_lfsr16(value)); } /* * This takes a standard fbdev screeninfo struct and all of its monitor mode * details and converts them into the DisplayLink equivalent register commands. */ static char *dlfb_set_vid_cmds(char *wrptr, struct fb_var_screeninfo *var) { u16 xds, yds; u16 xde, yde; u16 yec; /* x display start */ xds = var->left_margin + var->hsync_len; wrptr = dlfb_set_register_lfsr16(wrptr, 0x01, xds); /* x display end */ xde = xds + var->xres; wrptr = dlfb_set_register_lfsr16(wrptr, 0x03, xde); /* y display start */ yds = var->upper_margin + var->vsync_len; wrptr = dlfb_set_register_lfsr16(wrptr, 0x05, yds); /* y display end */ yde = yds + var->yres; wrptr = dlfb_set_register_lfsr16(wrptr, 0x07, yde); /* x end count is active + blanking - 1 */ wrptr = dlfb_set_register_lfsr16(wrptr, 0x09, xde + var->right_margin - 1); /* libdlo hardcodes hsync start to 1 */ wrptr = dlfb_set_register_lfsr16(wrptr, 0x0B, 1); /* hsync end is width of sync pulse + 1 */ wrptr = dlfb_set_register_lfsr16(wrptr, 0x0D, var->hsync_len + 1); /* hpixels is active pixels */ wrptr = dlfb_set_register_16(wrptr, 0x0F, var->xres); /* yendcount is vertical active + vertical blanking */ yec = var->yres + var->upper_margin + var->lower_margin + var->vsync_len; wrptr = dlfb_set_register_lfsr16(wrptr, 0x11, yec); /* libdlo hardcodes vsync start to 0 */ wrptr = dlfb_set_register_lfsr16(wrptr, 0x13, 0); /* vsync end is width of vsync pulse */ wrptr = dlfb_set_register_lfsr16(wrptr, 0x15, var->vsync_len); /* vpixels is active pixels */ wrptr = dlfb_set_register_16(wrptr, 0x17, var->yres); /* convert picoseconds to 5kHz multiple for pclk5k = x * 1E12/5k */ wrptr = dlfb_set_register_16be(wrptr, 0x1B, 200*1000*1000/var->pixclock); return wrptr; } /* * This takes a standard fbdev screeninfo struct that was fetched or prepared * and then generates the appropriate command sequence that then drives the * display controller. */ static int dlfb_set_video_mode(struct dlfb_data *dlfb, struct fb_var_screeninfo *var) { char *buf; char *wrptr; int retval; int writesize; struct urb *urb; if (!atomic_read(&dlfb->usb_active)) return -EPERM; urb = dlfb_get_urb(dlfb); if (!urb) return -ENOMEM; buf = (char *) urb->transfer_buffer; /* * This first section has to do with setting the base address on the * controller * associated with the display. There are 2 base * pointers, currently, we only * use the 16 bpp segment. */ wrptr = dlfb_vidreg_lock(buf); wrptr = dlfb_set_color_depth(wrptr, 0x00); /* set base for 16bpp segment to 0 */ wrptr = dlfb_set_base16bpp(wrptr, 0); /* set base for 8bpp segment to end of fb */ wrptr = dlfb_set_base8bpp(wrptr, dlfb->info->fix.smem_len); wrptr = dlfb_set_vid_cmds(wrptr, var); wrptr = dlfb_blanking(wrptr, FB_BLANK_UNBLANK); wrptr = dlfb_vidreg_unlock(wrptr); writesize = wrptr - buf; retval = dlfb_submit_urb(dlfb, urb, writesize); dlfb->blank_mode = FB_BLANK_UNBLANK; return retval; } static void dlfb_vm_open(struct vm_area_struct *vma) { struct dlfb_data *dlfb = vma->vm_private_data; atomic_inc(&dlfb->mmap_count); } static void dlfb_vm_close(struct vm_area_struct *vma) { struct dlfb_data *dlfb = vma->vm_private_data; atomic_dec(&dlfb->mmap_count); } static const struct vm_operations_struct dlfb_vm_ops = { .open = dlfb_vm_open, .close = dlfb_vm_close, }; static int dlfb_ops_mmap(struct fb_info *info, struct vm_area_struct *vma) { unsigned long start = vma->vm_start; unsigned long size = vma->vm_end - vma->vm_start; unsigned long offset = vma->vm_pgoff << PAGE_SHIFT; unsigned long page, pos; struct dlfb_data *dlfb = info->par; if (info->fbdefio) return fb_deferred_io_mmap(info, vma); vma->vm_page_prot = pgprot_decrypted(vma->vm_page_prot); if (vma->vm_pgoff > (~0UL >> PAGE_SHIFT)) return -EINVAL; if (size > info->fix.smem_len) return -EINVAL; if (offset > info->fix.smem_len - size) return -EINVAL; pos = (unsigned long)info->fix.smem_start + offset; dev_dbg(info->dev, "mmap() framebuffer addr:%lu size:%lu\n", pos, size); while (size > 0) { page = vmalloc_to_pfn((void *)pos); if (remap_pfn_range(vma, start, page, PAGE_SIZE, PAGE_SHARED)) return -EAGAIN; start += PAGE_SIZE; pos += PAGE_SIZE; if (size > PAGE_SIZE) size -= PAGE_SIZE; else size = 0; } vma->vm_ops = &dlfb_vm_ops; vma->vm_private_data = dlfb; atomic_inc(&dlfb->mmap_count); return 0; } /* * Trims identical data from front and back of line * Sets new front buffer address and width * And returns byte count of identical pixels * Assumes CPU natural alignment (unsigned long) * for back and front buffer ptrs and width */ static int dlfb_trim_hline(const u8 *bback, const u8 **bfront, int *width_bytes) { int j, k; const unsigned long *back = (const unsigned long *) bback; const unsigned long *front = (const unsigned long *) *bfront; const int width = *width_bytes / sizeof(unsigned long); int identical; int start = width; int end = width; for (j = 0; j < width; j++) { if (back[j] != front[j]) { start = j; break; } } for (k = width - 1; k > j; k--) { if (back[k] != front[k]) { end = k+1; break; } } identical = start + (width - end); *bfront = (u8 *) &front[start]; *width_bytes = (end - start) * sizeof(unsigned long); return identical * sizeof(unsigned long); } /* * Render a command stream for an encoded horizontal line segment of pixels. * * A command buffer holds several commands. * It always begins with a fresh command header * (the protocol doesn't require this, but we enforce it to allow * multiple buffers to be potentially encoded and sent in parallel). * A single command encodes one contiguous horizontal line of pixels * * The function relies on the client to do all allocation, so that * rendering can be done directly to output buffers (e.g. USB URBs). * The function fills the supplied command buffer, providing information * on where it left off, so the client may call in again with additional * buffers if the line will take several buffers to complete. * * A single command can transmit a maximum of 256 pixels, * regardless of the compression ratio (protocol design limit). * To the hardware, 0 for a size byte means 256 * * Rather than 256 pixel commands which are either rl or raw encoded, * the rlx command simply assumes alternating raw and rl spans within one cmd. * This has a slightly larger header overhead, but produces more even results. * It also processes all data (read and write) in a single pass. * Performance benchmarks of common cases show it having just slightly better * compression than 256 pixel raw or rle commands, with similar CPU consumpion. * But for very rl friendly data, will compress not quite as well. */ static void dlfb_compress_hline( const uint16_t **pixel_start_ptr, const uint16_t *const pixel_end, uint32_t *device_address_ptr, uint8_t **command_buffer_ptr, const uint8_t *const cmd_buffer_end, unsigned long back_buffer_offset, int *ident_ptr) { const uint16_t *pixel = *pixel_start_ptr; uint32_t dev_addr = *device_address_ptr; uint8_t *cmd = *command_buffer_ptr; while ((pixel_end > pixel) && (cmd_buffer_end - MIN_RLX_CMD_BYTES > cmd)) { uint8_t *raw_pixels_count_byte = NULL; uint8_t *cmd_pixels_count_byte = NULL; const uint16_t *raw_pixel_start = NULL; const uint16_t *cmd_pixel_start, *cmd_pixel_end = NULL; if (back_buffer_offset && *pixel == *(u16 *)((u8 *)pixel + back_buffer_offset)) { pixel++; dev_addr += BPP; (*ident_ptr)++; continue; } *cmd++ = 0xAF; *cmd++ = 0x6B; *cmd++ = dev_addr >> 16; *cmd++ = dev_addr >> 8; *cmd++ = dev_addr; cmd_pixels_count_byte = cmd++; /* we'll know this later */ cmd_pixel_start = pixel; raw_pixels_count_byte = cmd++; /* we'll know this later */ raw_pixel_start = pixel; cmd_pixel_end = pixel + min3(MAX_CMD_PIXELS + 1UL, (unsigned long)(pixel_end - pixel), (unsigned long)(cmd_buffer_end - 1 - cmd) / BPP); if (back_buffer_offset) { /* note: the framebuffer may change under us, so we must test for underflow */ while (cmd_pixel_end - 1 > pixel && *(cmd_pixel_end - 1) == *(u16 *)((u8 *)(cmd_pixel_end - 1) + back_buffer_offset)) cmd_pixel_end--;