/* SPDX-License-Identifier: MIT *//* * Copyright (C) The Asahi Linux Contributors * Copyright (C) 2018-2023 Collabora Ltd. * Copyright (C) 2014-2018 Broadcom */#ifndef _ASAHI_DRM_H_#define _ASAHI_DRM_H_ #include "drm.h" #if defined(__cplusplus)extern "C" {#endif /** * DOC: Introduction to the Asahi UAPI * * This documentation describes the Asahi IOCTLs. * * Just a few generic rules about the data passed to the Asahi IOCTLs (cribbed * from Panthor): * * - Structures must be aligned on 64-bit/8-byte. If the object is not *   naturally aligned, a padding field must be added. * - Fields must be explicitly aligned to their natural type alignment with *   pad[0..N] fields. * - All padding fields will be checked by the driver to make sure they are *   zeroed. * - Flags can be added, but not removed/replaced. * - New fields can be added to the main structures (the structures *   directly passed to the ioctl). Those fields can be added at the end of *   the structure, or replace existing padding fields. Any new field being *   added must preserve the behavior that existed before those fields were *   added when a value of zero is passed. * - New fields can be added to indirect objects (objects pointed by the *   main structure), iff those objects are passed a size to reflect the *   size known by the userspace driver (see *   drm_asahi_cmd_header::size). * - If the kernel driver is too old to know some fields, those will be *   ignored if zero, and otherwise rejected (and so will be zero on output). * - If userspace is too old to know some fields, those will be zeroed *   (input) before the structure is parsed by the kernel driver. * - Each new flag/field addition must come with a driver version update so *   the userspace driver doesn't have to guess which flags are supported. * - Structures should not contain unions, as this would defeat the *   extensibility of such structures. * - IOCTLs can't be removed or replaced. New IOCTL IDs should be placed *   at the end of the drm_asahi_ioctl_id enum. */ /** * enum drm_asahi_ioctl_id - IOCTL IDs * * Place new ioctls at the end, don't re-order, don't replace or remove entries. * * These IDs are not meant to be used directly. Use the DRM_IOCTL_ASAHI_xxx * definitions instead. */enum drm_asahi_ioctl_id {	/** @DRM_ASAHI_GET_PARAMS: Query device properties. */	DRM_ASAHI_GET_PARAMS = 0, 	/** @DRM_ASAHI_GET_TIME: Query device time. */	DRM_ASAHI_GET_TIME, 	/** @DRM_ASAHI_VM_CREATE: Create a GPU VM address space. */	DRM_ASAHI_VM_CREATE, 	/** @DRM_ASAHI_VM_DESTROY: Destroy a VM. */	DRM_ASAHI_VM_DESTROY, 	/** @DRM_ASAHI_VM_BIND: Bind/unbind memory to a VM. */	DRM_ASAHI_VM_BIND, 	/** @DRM_ASAHI_GEM_CREATE: Create a buffer object. */	DRM_ASAHI_GEM_CREATE, 	/**	 * @DRM_ASAHI_GEM_MMAP_OFFSET: Get offset to pass to mmap() to map a	 * given GEM handle.	 */	DRM_ASAHI_GEM_MMAP_OFFSET, 	/** @DRM_ASAHI_GEM_BIND_OBJECT: Bind memory as a special object */	DRM_ASAHI_GEM_BIND_OBJECT, 	/** @DRM_ASAHI_QUEUE_CREATE: Create a scheduling queue. */	DRM_ASAHI_QUEUE_CREATE, 	/** @DRM_ASAHI_QUEUE_DESTROY: Destroy a scheduling queue. */	DRM_ASAHI_QUEUE_DESTROY, 	/** @DRM_ASAHI_SUBMIT: Submit commands to a queue. */	DRM_ASAHI_SUBMIT,}; #define DRM_ASAHI_MAX_CLUSTERS	64 /** * struct drm_asahi_params_global - Global parameters. * * This struct may be queried by drm_asahi_get_params. */struct drm_asahi_params_global {	/** @features: Feature bits from drm_asahi_feature */	__u64 features; 	/** @gpu_generation: GPU generation, e.g. 13 for G13G */	__u32 gpu_generation; 	/** @gpu_variant: GPU variant as a character, e.g. 'C' for G13C */	__u32 gpu_variant; 	/**	 * @gpu_revision: GPU revision in BCD, e.g. 0x00 for 'A0' or	 * 0x21 for 'C1'	 */	__u32 gpu_revision; 	/** @chip_id: Chip ID in BCD, e.g. 0x8103 for T8103 */	__u32 chip_id; 	/** @num_dies: Number of dies in the SoC */	__u32 num_dies; 	/** @num_clusters_total: Number of GPU clusters (across all dies) */	__u32 num_clusters_total; 	/**	 * @num_cores_per_cluster: Number of logical cores per cluster	 * (including inactive/nonexistent)	 */	__u32 num_cores_per_cluster; 	/** @max_frequency_khz: Maximum GPU core clock frequency */	__u32 max_frequency_khz; 	/** @core_masks: Bitmask of present/enabled cores per cluster */	__u64 core_masks[DRM_ASAHI_MAX_CLUSTERS]; 	/**	 * @vm_start: VM range start VMA. Together with @vm_end, this defines	 * the window of valid GPU VAs. Userspace is expected to subdivide VAs	 * out of this window.	 *	 * This window contains all virtual addresses that userspace needs to	 * know about. There may be kernel-internal GPU VAs outside this range,	 * but that detail is not relevant here.	 */	__u64 vm_start; 	/** @vm_end: VM range end VMA */	__u64 vm_end; 	/**	 * @vm_kernel_min_size: Minimum kernel VMA window size.	 *	 * When creating a VM, userspace is required to carve out a section of	 * virtual addresses (within the range given by @vm_start and	 * @vm_end). The kernel will allocate various internal structures	 * within the specified VA range.	 *	 * Allowing userspace to choose the VA range for the kernel, rather than	 * the kernel reserving VAs and requiring userspace to cope, can assist	 * in implementing SVM.	 */	__u64 vm_kernel_min_size; 	/**	 * @max_commands_per_submission: Maximum number of supported commands	 * per submission. This mirrors firmware limits. Userspace must split up	 * larger command buffers, which may require inserting additional	 * synchronization.	 */	__u32 max_commands_per_submission; 	/**	 * @max_attachments: Maximum number of drm_asahi_attachment's per	 * command	 */	__u32 max_attachments; 	/**	 * @command_timestamp_frequency_hz: Timebase frequency for timestamps	 * written during command execution, specified via drm_asahi_timestamp	 * structures. As this rate is controlled by the firmware, it is a	 * queryable parameter.	 *	 * Userspace must divide by this frequency to convert timestamps to	 * seconds, rather than hardcoding a particular firmware's rate.	 */	__u64 command_timestamp_frequency_hz;}; /** * enum drm_asahi_feature - Feature bits * * This covers only features that userspace cannot infer from the architecture * version. Most features don't need to be here. */enum drm_asahi_feature {	/**	 * @DRM_ASAHI_FEATURE_SOFT_FAULTS: GPU has "soft fault" enabled. Shader	 * loads of unmapped memory will return zero. Shader stores to unmapped	 * memory will be silently discarded. Note that only shader load/store	 * is affected. Other hardware units are not affected, notably including	 * texture sampling.	 *	 * Soft fault is set when initializing the GPU and cannot be runtime	 * toggled. Therefore, it is exposed as a feature bit and not a	 * userspace-settable flag on the VM. When soft fault is enabled,	 * userspace can speculate memory accesses more aggressively.	 */	DRM_ASAHI_FEATURE_SOFT_FAULTS = (1UL) << 0,}; /** * struct drm_asahi_get_params - Arguments passed to DRM_IOCTL_ASAHI_GET_PARAMS */struct drm_asahi_get_params {	/** @param_group: Parameter group to fetch (MBZ) */	__u32 param_group; 	/** @pad: MBZ */	__u32 pad; 	/** @pointer: User pointer to write parameter struct */	__u64 pointer; 	/**	 * @size: Size of the user buffer. In case of older userspace, this may	 * be less than sizeof(struct drm_asahi_params_global). The kernel will	 * not write past the length specified here, allowing extensibility.	 */	__u64 size;}; /** * struct drm_asahi_vm_create - Arguments passed to DRM_IOCTL_ASAHI_VM_CREATE */struct drm_asahi_vm_create {	/**	 * @kernel_start: Start of the kernel-reserved address range. See	 * drm_asahi_params_global::vm_kernel_min_size.	 *	 * Both @kernel_start and @kernel_end must be within the range of	 * valid VAs given by drm_asahi_params_global::vm_start and	 * drm_asahi_params_global::vm_end. The size of the kernel range	 * (@kernel_end - @kernel_start) must be at least	 * drm_asahi_params_global::vm_kernel_min_size.	 *	 * Userspace must not bind any memory on this VM into this reserved	 * range, it is for kernel use only.	 */	__u64 kernel_start; 	/**	 * @kernel_end: End of the kernel-reserved address range. See	 * @kernel_start.	 */	__u64 kernel_end; 	/** @vm_id: Returned VM ID */	__u32 vm_id; 	/** @pad: MBZ */	__u32 pad;}; /** * struct drm_asahi_vm_destroy - Arguments passed to DRM_IOCTL_ASAHI_VM_DESTROY */struct drm_asahi_vm_destroy {	/** @vm_id: VM ID to be destroyed */	__u32 vm_id; 	/** @pad: MBZ */	__u32 pad;}; /** * enum drm_asahi_gem_flags - Flags for GEM creation */enum drm_asahi_gem_flags {	/**	 * @DRM_ASAHI_GEM_WRITEBACK: BO should be CPU-mapped as writeback.	 *	 * Map as writeback instead of write-combine. This optimizes for CPU	 * reads.	 */	DRM_ASAHI_GEM_WRITEBACK = (1L << 0), 	/**	 * @DRM_ASAHI_GEM_VM_PRIVATE: BO is private to this GPU VM (no exports).	 */	DRM_ASAHI_GEM_VM_PRIVATE = (1L << 1),}; /** * struct drm_asahi_gem_create - Arguments passed to DRM_IOCTL_ASAHI_GEM_CREATE */struct drm_asahi_gem_create {	/** @size: Size of the BO */	__u64 size; 	/** @flags: Combination of drm_asahi_gem_flags flags. */	__u32 flags; 	/**	 * @vm_id: VM ID to assign to the BO, if DRM_ASAHI_GEM_VM_PRIVATE is set	 */	__u32 vm_id; 	/** @handle: Returned GEM handle for the BO */	__u32 handle; 	/** @pad: MBZ */	__u32 pad;}; /** * struct drm_asahi_gem_mmap_offset - Arguments passed to * DRM_IOCTL_ASAHI_GEM_MMAP_OFFSET */struct drm_asahi_gem_mmap_offset {	/** @handle: Handle for the object being mapped. */	__u32 handle; 	/** @flags: Must be zero */	__u32 flags; 	/** @offset: The fake offset to use for subsequent mmap call */	__u64 offset;}; /** * enum drm_asahi_bind_flags - Flags for GEM binding */enum drm_asahi_bind_flags {	/**	 * @DRM_ASAHI_BIND_UNBIND: Instead of binding a GEM object to the range,	 * simply unbind the GPU VMA range.	 */	DRM_ASAHI_BIND_UNBIND = (1L << 0), 	/** @DRM_ASAHI_BIND_READ: Map BO with GPU read permission */	DRM_ASAHI_BIND_READ = (1L << 1), 	/** @DRM_ASAHI_BIND_WRITE: Map BO with GPU write permission */	DRM_ASAHI_BIND_WRITE = (1L << 2), 	/**	 * @DRM_ASAHI_BIND_SINGLE_PAGE: Map a single page of the BO repeatedly	 * across the VA range.	 *	 * This is useful to fill a VA range with scratch pages or zero pages.	 * It is intended as a mechanism to accelerate sparse.	 */	DRM_ASAHI_BIND_SINGLE_PAGE = (1L << 3),}; /** * struct drm_asahi_gem_bind_op - Description of a single GEM bind operation. */struct drm_asahi_gem_bind_op {	/** @flags: Combination of drm_asahi_bind_flags flags. */	__u32 flags; 	/** @handle: GEM object to bind (except for UNBIND) */	__u32 handle; 	/**	 * @offset: Offset into the object (except for UNBIND).	 *	 * For a regular bind, this is the beginning of the region of the GEM	 * object to bind.	 *	 * For a single-page bind, this is the offset to the single page that	 * will be repeatedly bound.	 *	 * Must be page-size aligned.	 */	__u64 offset; 	/**	 * @range: Number of bytes to bind/unbind to @addr.	 *	 * Must be page-size aligned.	 */	__u64 range; 	/**	 * @addr: Address to bind to.	 *	 * Must be page-size aligned.	 */	__u64 addr;}; /** * struct drm_asahi_vm_bind - Arguments passed to * DRM_IOCTL_ASAHI_VM_BIND */struct drm_asahi_vm_bind {	/** @vm_id: The ID of the VM to bind to */	__u32 vm_id; 	/** @num_binds: number of binds in this IOCTL. */	__u32 num_binds; 	/**	 * @stride: Stride in bytes between consecutive binds. This allows	 * extensibility of drm_asahi_gem_bind_op.	 */	__u32 stride; 	/** @pad: MBZ */	__u32 pad; 	/**	 * @userptr: User pointer to an array of @num_binds structures of type	 * @drm_asahi_gem_bind_op and size @stride bytes.	 */	__u64 userptr;}; /** * enum drm_asahi_bind_object_op - Special object bind operation */enum drm_asahi_bind_object_op {	/** @DRM_ASAHI_BIND_OBJECT_OP_BIND: Bind a BO as a special GPU object */	DRM_ASAHI_BIND_OBJECT_OP_BIND = 0, 	/** @DRM_ASAHI_BIND_OBJECT_OP_UNBIND: Unbind a special GPU object */	DRM_ASAHI_BIND_OBJECT_OP_UNBIND = 1,}; /** * enum drm_asahi_bind_object_flags - Special object bind flags */enum drm_asahi_bind_object_flags {	/**	 * @DRM_ASAHI_BIND_OBJECT_USAGE_TIMESTAMPS: Map a BO as a timestamp	 * buffer.	 */	DRM_ASAHI_BIND_OBJECT_USAGE_TIMESTAMPS = (1L << 0),}; /** * struct drm_asahi_gem_bind_object - Arguments passed to * DRM_IOCTL_ASAHI_GEM_BIND_OBJECT */struct drm_asahi_gem_bind_object {	/** @op: Bind operation (enum drm_asahi_bind_object_op) */	__u32 op; 	/** @flags: Combination of drm_asahi_bind_object_flags flags. */	__u32 flags; 	/** @handle: GEM object to bind/unbind (BIND) */	__u32 handle; 	/** @vm_id: The ID of the VM to operate on (MBZ currently) */	__u32 vm_id; 	/** @offset: Offset into the object (BIND only) */	__u64 offset; 	/** @range: Number of bytes to bind/unbind (BIND only) */	__u64 range; 	/** @object_handle: Object handle (out for BIND, in for UNBIND) */	__u32 object_handle; 	/** @pad: MBZ */	__u32 pad;}; /** * enum drm_asahi_cmd_type - Command type */enum drm_asahi_cmd_type {	/**	 * @DRM_ASAHI_CMD_RENDER: Render command, executing on the render	 * subqueue. Combined vertex and fragment operation.	 *	 * Followed by a @drm_asahi_cmd_render payload.	 */	DRM_ASAHI_CMD_RENDER = 0, 	/**	 * @DRM_ASAHI_CMD_COMPUTE: Compute command on the compute subqueue.	 *	 * Followed by a @drm_asahi_cmd_compute payload.	 */	DRM_ASAHI_CMD_COMPUTE = 1, 	/**	 * @DRM_ASAHI_SET_VERTEX_ATTACHMENTS: Software command to set

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