/* bfin.h -- Header file for ADI Blackfin opcode table   Copyright 2005, 2010, 2011 Free Software Foundation, Inc.    This file is part of GDB, GAS, and the GNU binutils.    GDB, GAS, and the GNU binutils are free software; you can redistribute   them and/or modify them under the terms of the GNU General Public   License as published by the Free Software Foundation; either version 3,   or (at your option) any later version.    GDB, GAS, and the GNU binutils are distributed in the hope that they   will be useful, but WITHOUT ANY WARRANTY; without even the implied   warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See   the GNU General Public License for more details.    You should have received a copy of the GNU General Public License   along with this file; see the file COPYING3.  If not, write to the Free   Software Foundation, 51 Franklin Street - Fifth Floor, Boston,   MA 02110-1301, USA.  */ #ifndef OPCODE_BFIN_H#define OPCODE_BFIN_H /* Common to all DSP32 instructions.  */#define BIT_MULTI_INS 0x0800 /* This just sets the multi instruction bit of a DSP32 instruction.  */#define SET_MULTI_INSTRUCTION_BIT(x) x->value |=  BIT_MULTI_INS;  /* DSP instructions (32 bit) */ /* mmod field.  */#define M_S2RND 1#define M_T     2#define M_W32   3#define M_FU    4#define M_TFU   6#define M_IS    8#define M_ISS2  9#define M_IH    11#define M_IU    12 static inline int is_macmod_pmove (int x){  return (x == 0) || (x == M_IS) || (x == M_FU) || (x == M_S2RND)         || (x == M_ISS2) || (x == M_IU);} static inline int is_macmod_hmove (int x){  return (x == 0) || (x == M_IS) || (x == M_FU) || (x == M_IU) || (x == M_T)         || (x == M_TFU) || (x == M_S2RND) || (x == M_ISS2) || (x == M_IH);} static inline int is_macmod_signed (int x){  return (x == 0) || (x == M_IS) || (x == M_T) || (x == M_S2RND)         || (x == M_ISS2) || (x == M_IH) || (x == M_W32);} /*   dsp32mac+----+----+---+---|---+----+----+---|---+---+---+---|---+---+---+---+| 1  | 1  | 0 | 0 |.M.| 0  | 0  |.mmod..........|.MM|.P.|.w1|.op1...||.h01|.h11|.w0|.op0...|.h00|.h10|.dst.......|.src0......|.src1......|+----+----+---+---|---+----+----+---|---+---+---+---|---+---+---+---+*/ typedef struct{  unsigned long opcode;  int bits_src1;  int mask_src1;  int bits_src0;  int mask_src0;  int bits_dst;  int mask_dst;  int bits_h10;  int mask_h10;  int bits_h00;  int mask_h00;  int bits_op0;  int mask_op0;  int bits_w0;  int mask_w0;  int bits_h11;  int mask_h11;  int bits_h01;  int mask_h01;  int bits_op1;  int mask_op1;  int bits_w1;  int mask_w1;  int bits_P;  int mask_P;  int bits_MM;  int mask_MM;  int bits_mmod;  int mask_mmod;  int bits_code2;  int mask_code2;  int bits_M;  int mask_M;  int bits_code;  int mask_code;} DSP32Mac; #define DSP32Mac_opcode			0xc0000000#define DSP32Mac_src1_bits		0#define DSP32Mac_src1_mask		0x7#define DSP32Mac_src0_bits		3#define DSP32Mac_src0_mask		0x7#define DSP32Mac_dst_bits		6#define DSP32Mac_dst_mask		0x7#define DSP32Mac_h10_bits		9#define DSP32Mac_h10_mask		0x1#define DSP32Mac_h00_bits		10#define DSP32Mac_h00_mask		0x1#define DSP32Mac_op0_bits		11#define DSP32Mac_op0_mask		0x3#define DSP32Mac_w0_bits		13#define DSP32Mac_w0_mask		0x1#define DSP32Mac_h11_bits		14#define DSP32Mac_h11_mask		0x1#define DSP32Mac_h01_bits		15#define DSP32Mac_h01_mask		0x1#define DSP32Mac_op1_bits		16#define DSP32Mac_op1_mask		0x3#define DSP32Mac_w1_bits		18#define DSP32Mac_w1_mask		0x1#define DSP32Mac_p_bits			19#define DSP32Mac_p_mask			0x1#define DSP32Mac_MM_bits		20#define DSP32Mac_MM_mask		0x1#define DSP32Mac_mmod_bits		21#define DSP32Mac_mmod_mask		0xf#define DSP32Mac_code2_bits		25#define DSP32Mac_code2_mask		0x3#define DSP32Mac_M_bits			27#define DSP32Mac_M_mask			0x1#define DSP32Mac_code_bits		28#define DSP32Mac_code_mask		0xf #define init_DSP32Mac				\{						\  DSP32Mac_opcode,				\  DSP32Mac_src1_bits,	DSP32Mac_src1_mask,	\  DSP32Mac_src0_bits,	DSP32Mac_src0_mask,	\  DSP32Mac_dst_bits,	DSP32Mac_dst_mask,	\  DSP32Mac_h10_bits,	DSP32Mac_h10_mask,	\  DSP32Mac_h00_bits,	DSP32Mac_h00_mask,	\  DSP32Mac_op0_bits,	DSP32Mac_op0_mask,	\  DSP32Mac_w0_bits,	DSP32Mac_w0_mask,	\  DSP32Mac_h11_bits,	DSP32Mac_h11_mask,	\  DSP32Mac_h01_bits,	DSP32Mac_h01_mask,	\  DSP32Mac_op1_bits,	DSP32Mac_op1_mask,	\  DSP32Mac_w1_bits,	DSP32Mac_w1_mask,	\  DSP32Mac_p_bits,	DSP32Mac_p_mask,	\  DSP32Mac_MM_bits,	DSP32Mac_MM_mask,	\  DSP32Mac_mmod_bits,	DSP32Mac_mmod_mask,	\  DSP32Mac_code2_bits,	DSP32Mac_code2_mask,	\  DSP32Mac_M_bits,	DSP32Mac_M_mask,	\  DSP32Mac_code_bits,	DSP32Mac_code_mask	\}; /*  dsp32mult+----+----+---+---|---+----+----+---|---+---+---+---|---+---+---+---+| 1  | 1  | 0 | 0 |.M.| 0  | 1  |.mmod..........|.MM|.P.|.w1|.op1...||.h01|.h11|.w0|.op0...|.h00|.h10|.dst.......|.src0......|.src1......|+----+----+---+---|---+----+----+---|---+---+---+---|---+---+---+---+*/ typedef DSP32Mac DSP32Mult;#define DSP32Mult_opcode 	0xc2000000 #define init_DSP32Mult				\{						\  DSP32Mult_opcode,				\  DSP32Mac_src1_bits,	DSP32Mac_src1_mask,	\  DSP32Mac_src0_bits,	DSP32Mac_src0_mask,	\  DSP32Mac_dst_bits,	DSP32Mac_dst_mask,	\  DSP32Mac_h10_bits,	DSP32Mac_h10_mask,	\  DSP32Mac_h00_bits,	DSP32Mac_h00_mask,	\  DSP32Mac_op0_bits,	DSP32Mac_op0_mask,	\  DSP32Mac_w0_bits,	DSP32Mac_w0_mask,	\  DSP32Mac_h11_bits,	DSP32Mac_h11_mask,	\  DSP32Mac_h01_bits,	DSP32Mac_h01_mask,	\  DSP32Mac_op1_bits,	DSP32Mac_op1_mask,	\  DSP32Mac_w1_bits,	DSP32Mac_w1_mask,	\  DSP32Mac_p_bits,	DSP32Mac_p_mask,	\  DSP32Mac_MM_bits,	DSP32Mac_MM_mask,	\  DSP32Mac_mmod_bits,	DSP32Mac_mmod_mask,	\  DSP32Mac_code2_bits,	DSP32Mac_code2_mask,	\  DSP32Mac_M_bits,	DSP32Mac_M_mask,	\  DSP32Mac_code_bits,	DSP32Mac_code_mask	\}; /*  dsp32alu+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+| 1 | 1 | 0 | 0 |.M.| 1 | 0 | - | - | - |.HL|.aopcde............||.aop...|.s.|.x.|.dst0......|.dst1......|.src0......|.src1......|+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+*/ typedef struct{  unsigned long opcode;  int bits_src1;  int mask_src1;  int bits_src0;  int mask_src0;  int bits_dst1;  int mask_dst1;  int bits_dst0;  int mask_dst0;  int bits_x;  int mask_x;  int bits_s;  int mask_s;  int bits_aop;  int mask_aop;  int bits_aopcde;  int mask_aopcde;  int bits_HL;  int mask_HL;  int bits_dontcare;  int mask_dontcare;  int bits_code2;  int mask_code2;  int bits_M;  int mask_M;  int bits_code;  int mask_code;} DSP32Alu; #define DSP32Alu_opcode		0xc4000000#define DSP32Alu_src1_bits	0#define DSP32Alu_src1_mask	0x7#define DSP32Alu_src0_bits	3#define DSP32Alu_src0_mask	0x7#define DSP32Alu_dst1_bits	6#define DSP32Alu_dst1_mask	0x7#define DSP32Alu_dst0_bits	9#define DSP32Alu_dst0_mask	0x7#define DSP32Alu_x_bits		12#define DSP32Alu_x_mask		0x1#define DSP32Alu_s_bits		13#define DSP32Alu_s_mask		0x1#define DSP32Alu_aop_bits	14#define DSP32Alu_aop_mask	0x3#define DSP32Alu_aopcde_bits	16#define DSP32Alu_aopcde_mask	0x1f#define DSP32Alu_HL_bits	21#define DSP32Alu_HL_mask	0x1#define DSP32Alu_dontcare_bits	22#define DSP32Alu_dontcare_mask	0x7#define DSP32Alu_code2_bits	25#define DSP32Alu_code2_mask	0x3#define DSP32Alu_M_bits		27#define DSP32Alu_M_mask		0x1#define DSP32Alu_code_bits	28#define DSP32Alu_code_mask	0xf #define init_DSP32Alu 					\{							\  DSP32Alu_opcode,					\  DSP32Alu_src1_bits,		DSP32Alu_src1_mask,	\  DSP32Alu_src0_bits,		DSP32Alu_src0_mask,	\  DSP32Alu_dst1_bits,		DSP32Alu_dst1_mask,	\  DSP32Alu_dst0_bits,		DSP32Alu_dst0_mask,	\  DSP32Alu_x_bits,		DSP32Alu_x_mask,	\  DSP32Alu_s_bits,		DSP32Alu_s_mask,	\  DSP32Alu_aop_bits,		DSP32Alu_aop_mask,	\  DSP32Alu_aopcde_bits,		DSP32Alu_aopcde_mask,	\  DSP32Alu_HL_bits,		DSP32Alu_HL_mask,	\  DSP32Alu_dontcare_bits,	DSP32Alu_dontcare_mask,	\  DSP32Alu_code2_bits,		DSP32Alu_code2_mask,	\  DSP32Alu_M_bits,		DSP32Alu_M_mask,	\  DSP32Alu_code_bits,		DSP32Alu_code_mask 	\}; /*  dsp32shift+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+| 1 | 1 | 0 | 0 |.M.| 1 | 1 | 0 | 0 | - | - |.sopcde............||.sop...|.HLs...|.dst0......| - | - | - |.src0......|.src1......|+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+*/ typedef struct{  unsigned long opcode;  int bits_src1;  int mask_src1;  int bits_src0;  int mask_src0;  int bits_dst1;  int mask_dst1;  int bits_dst0;  int mask_dst0;  int bits_HLs;  int mask_HLs;  int bits_sop;  int mask_sop;  int bits_sopcde;  int mask_sopcde;  int bits_dontcare;  int mask_dontcare;  int bits_code2;  int mask_code2;  int bits_M;  int mask_M;  int bits_code;  int mask_code;} DSP32Shift; #define DSP32Shift_opcode		0xc6000000#define DSP32Shift_src1_bits		0#define DSP32Shift_src1_mask		0x7#define DSP32Shift_src0_bits		3#define DSP32Shift_src0_mask		0x7#define DSP32Shift_dst1_bits		6#define DSP32Shift_dst1_mask		0x7#define DSP32Shift_dst0_bits		9#define DSP32Shift_dst0_mask		0x7#define DSP32Shift_HLs_bits		12#define DSP32Shift_HLs_mask		0x3#define DSP32Shift_sop_bits		14#define DSP32Shift_sop_mask		0x3#define DSP32Shift_sopcde_bits		16#define DSP32Shift_sopcde_mask		0x1f#define DSP32Shift_dontcare_bits	21#define DSP32Shift_dontcare_mask	0x3#define DSP32Shift_code2_bits		23#define DSP32Shift_code2_mask		0xf#define DSP32Shift_M_bits		27#define DSP32Shift_M_mask		0x1#define DSP32Shift_code_bits		28#define DSP32Shift_code_mask		0xf #define init_DSP32Shift						\{								\  DSP32Shift_opcode,						\  DSP32Shift_src1_bits,		DSP32Shift_src1_mask,		\  DSP32Shift_src0_bits,		DSP32Shift_src0_mask,		\  DSP32Shift_dst1_bits,		DSP32Shift_dst1_mask,		\  DSP32Shift_dst0_bits,		DSP32Shift_dst0_mask,		\  DSP32Shift_HLs_bits,		DSP32Shift_HLs_mask,		\  DSP32Shift_sop_bits,		DSP32Shift_sop_mask,		\  DSP32Shift_sopcde_bits,	DSP32Shift_sopcde_mask,		\  DSP32Shift_dontcare_bits,	DSP32Shift_dontcare_mask,	\  DSP32Shift_code2_bits,	DSP32Shift_code2_mask,		\  DSP32Shift_M_bits,		DSP32Shift_M_mask,		\  DSP32Shift_code_bits,		DSP32Shift_code_mask		\}; /*  dsp32shiftimm+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+| 1 | 1 | 0 | 0 |.M.| 1 | 1 | 0 | 1 | - | - |.sopcde............||.sop...|.HLs...|.dst0......|.immag.................|.src1......|+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+*/ typedef struct{  unsigned long opcode;  int bits_src1;  int mask_src1;  int bits_immag;  int mask_immag;  int bits_dst0;  int mask_dst0;  int bits_HLs;  int mask_HLs;  int bits_sop;  int mask_sop;  int bits_sopcde;  int mask_sopcde;  int bits_dontcare;  int mask_dontcare;  int bits_code2;  int mask_code2;  int bits_M;  int mask_M;  int bits_code;  int mask_code;} DSP32ShiftImm; #define DSP32ShiftImm_opcode		0xc6800000#define DSP32ShiftImm_src1_bits		0#define DSP32ShiftImm_src1_mask		0x7#define DSP32ShiftImm_immag_bits	3#define DSP32ShiftImm_immag_mask	0x3f#define DSP32ShiftImm_dst0_bits		9#define DSP32ShiftImm_dst0_mask		0x7#define DSP32ShiftImm_HLs_bits		12#define DSP32ShiftImm_HLs_mask		0x3#define DSP32ShiftImm_sop_bits		14#define DSP32ShiftImm_sop_mask		0x3#define DSP32ShiftImm_sopcde_bits	16#define DSP32ShiftImm_sopcde_mask	0x1f#define DSP32ShiftImm_dontcare_bits	21#define DSP32ShiftImm_dontcare_mask	0x3#define DSP32ShiftImm_code2_bits	23#define DSP32ShiftImm_code2_mask	0xf#define DSP32ShiftImm_M_bits		27#define DSP32ShiftImm_M_mask		0x1#define DSP32ShiftImm_code_bits		28#define DSP32ShiftImm_code_mask		0xf #define init_DSP32ShiftImm					\{								\  DSP32ShiftImm_opcode,						\  DSP32ShiftImm_src1_bits,	DSP32ShiftImm_src1_mask,	\  DSP32ShiftImm_immag_bits,	DSP32ShiftImm_immag_mask,	\  DSP32ShiftImm_dst0_bits,	DSP32ShiftImm_dst0_mask,	\  DSP32ShiftImm_HLs_bits,	DSP32ShiftImm_HLs_mask,		\  DSP32ShiftImm_sop_bits,	DSP32ShiftImm_sop_mask,		\  DSP32ShiftImm_sopcde_bits,	DSP32ShiftImm_sopcde_mask,	\  DSP32ShiftImm_dontcare_bits,	DSP32ShiftImm_dontcare_mask,	\  DSP32ShiftImm_code2_bits,	DSP32ShiftImm_code2_mask,	\  DSP32ShiftImm_M_bits,		DSP32ShiftImm_M_mask,		\  DSP32ShiftImm_code_bits,	DSP32ShiftImm_code_mask		\}; /* LOAD / STORE  */ /*  LDSTidxI+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+| 1 | 1 | 1 | 0 | 0 | 1 |.W.|.Z.|.sz....|.ptr.......|.reg.......||.offset........................................................|+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+*/ typedef struct{  unsigned long opcode;  int bits_offset;  int mask_offset;  int bits_reg;  int mask_reg;  int bits_ptr;  int mask_ptr;  int bits_sz;  int mask_sz;  int bits_Z;  int mask_Z;  int bits_W;  int mask_W;  int bits_code;  int mask_code;} LDSTidxI; #define LDSTidxI_opcode		0xe4000000#define LDSTidxI_offset_bits	0#define LDSTidxI_offset_mask	0xffff#define LDSTidxI_reg_bits	16#define LDSTidxI_reg_mask	0x7#define LDSTidxI_ptr_bits	19#define LDSTidxI_ptr_mask	0x7#define LDSTidxI_sz_bits	22#define LDSTidxI_sz_mask	0x3#define LDSTidxI_Z_bits		24#define LDSTidxI_Z_mask		0x1#define LDSTidxI_W_bits		25#define LDSTidxI_W_mask		0x1#define LDSTidxI_code_bits	26#define LDSTidxI_code_mask	0x3f #define init_LDSTidxI				\{						\  LDSTidxI_opcode,				\  LDSTidxI_offset_bits, LDSTidxI_offset_mask,	\  LDSTidxI_reg_bits, LDSTidxI_reg_mask,		\  LDSTidxI_ptr_bits, LDSTidxI_ptr_mask,		\  LDSTidxI_sz_bits, LDSTidxI_sz_mask,		\  LDSTidxI_Z_bits, LDSTidxI_Z_mask,		\  LDSTidxI_W_bits, LDSTidxI_W_mask,		\  LDSTidxI_code_bits, LDSTidxI_code_mask	\};  /*  LDST+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+| 1 | 0 | 0 | 1 |.sz....|.W.|.aop...|.Z.|.ptr.......|.reg.......|+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+*/ typedef struct{  unsigned short opcode;  int bits_reg;  int mask_reg;  int bits_ptr;  int mask_ptr;  int bits_Z;  int mask_Z;  int bits_aop;  int mask_aop;  int bits_W;  int mask_W;

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