; CRIS CPU description.  -*- Scheme -*-;; Copyright 2003, 2004, 2007, 2009 Free Software Foundation, Inc.;; Contributed by Axis Communications AB.;; This file is part of the GNU Binutils.;; This program is free software; you can redistribute it and/or modify; it under the terms of the GNU General Public License as published by; the Free Software Foundation; either version 3 of the License, or; (at your option) any later version.;; This program is distributed in the hope that it will be useful,; but WITHOUT ANY WARRANTY; without even the implied warranty of; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the; GNU General Public License for more details.;; You should have received a copy of the GNU General Public License; along with this program; if not, write to the Free Software; Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,; MA 02110-1301, USA. (include "simplify.inc") ;;;;;;;;;;;;;;;;;; -pmacro (generic ones) (define-pmacro (.car2 l) (.apply (.pmacro (a b) a) l))(define-pmacro (.cadr2 l) (.apply (.pmacro (a b) b) l))(define-pmacro (SI-ext x) "How to sign-extend a dword to dword (a nop)" x)(define-pmacro (HI-ext x) "How to sign-extend a word to dword" (ext SI x))(define-pmacro (QI-ext x) "How to sign-extend a byte to dword" (ext SI x))(define-pmacro (SI-zext x) "How to zero-extend a dword to dword (a nop)" x)(define-pmacro (HI-zext x) "How to zero-extend a word to dword" (zext SI x))(define-pmacro (QI-zext x) "How to zero-extend a byte to dword" (zext SI x))(define-pmacro  (define-pmacro-map x)  "On a list ((x0 y0) .. (xN yN)), 0 <= m <= N, (define-pmacro xm ym)"  (.splice   begin   (.unsplice    (.map     (.pmacro (l) (.apply (.pmacro (xm ym) (define-pmacro xm ym)) l)) x)))) ;;;;;;;;;;;;;;;;;; -arch -isa -cpu -model (define-arch  (name cris)  (comment "Axis Communications CRIS")  (default-alignment unaligned)  (insn-lsb0? #t)  (machs crisv0 crisv3 crisv8 crisv10 crisv32)  (isas cris)) (define-isa  (name cris)  (base-insn-bitsize 16)  (liw-insns 1)  (parallel-insns 1)) (define-pmacro  (define-cpu-cris x-suffix x-comment)  "Define a CRIS CPU family"  (define-cpu    (name (.sym cris x-suffix f))    (comment x-comment)    (endian little)    ; CGEN-FIXME: Should be deduced from the default?    (word-bitsize 32)    (file-transform (.str x-suffix))  )) ; Useful when there's a need to iterate over all models.(define-pmacro (cris-cpu-model-numbers)  "List of CRIS CPU model numbers (version register contents)"  (0 3 8 10 32)) (define-pmacro (cris-cpu-models)  "List of CRIS CPU model names"  (.map (.pmacro (n) (.sym v n)) (cris-cpu-model-numbers))) ; Mapping from model name to number.(define-pmacro-map  (.map (.pmacro (n) ((.sym v n -number) n))	(cris-cpu-model-numbers))) ; FIXME: Rationalize these rules.; CPU names must be distinct from the architecture name and machine names.; The "b" suffix stands for "base" and is the convention.; The "f" suffix stands for "family" and is the convention.; We ignore the "b" convention, partly because v0 isn't really a "base", at; least not for some aspects of v32.(define-cpu-cris v0 "CRIS base family")(define-cpu-cris v3 "CRIS v3 family")(define-cpu-cris v8 "CRIS v8 family")(define-cpu-cris v10 "CRIS v10 family")(define-cpu-cris v32 "CRIS v32 family") (define-pmacro MACH-PRE-V32 (MACH crisv0,crisv3,crisv8,crisv10))(define-pmacro MACH-V3-UP (MACH crisv3,crisv8,crisv10,crisv32))(define-pmacro MACH-V32 (MACH crisv32))(define-pmacro MACH-PC MACH-PRE-V32)(define-pmacro MACH-ACR MACH-V32)(define-pmacro MACH-BRANCH-OFFSET-AT-INSN MACH-V32)(define-pmacro MACH-BRANCH-OFFSET-AFTER-INSN MACH-PRE-V32) (define-pmacro  current-mach-is-v32  "Whether the generated code is for V32.  See comment at h-v32."  (reg h-v32)) (define-pmacro (define-mach-cris x-suffix x-comment x-name)  "Define a CRIS mach"  (define-mach    (name (.sym cris x-suffix))    ; They're all called "cris" in bfd.  Watch out for breakages for some    ; uses.    (bfd-name x-name)    (comment x-comment)    (cpu (.sym cris x-suffix f)))) (define-mach-cris v0 "Generic CRIS v0 CPU, ETRAX 1 .. 3" "cris")(define-mach-cris v3 "Generic CRIS v3 CPU, ETRAX 4" "cris")(define-mach-cris v8 "Generic CRIS v8 CPU, ETRAX 100" "cris")(define-mach-cris v10 "Generic CRIS v10 CPU, ETRAX 100 LX" "cris")(define-mach-cris v32 "Generic CRIS v32 CPU, ETRAX FS" "crisv32") (define-pmacro (define-model-simplecris x-name x-comment)  "Define a simple CRIS model"  (define-model    (name (.sym cris x-name))    (comment x-comment)    (mach (.sym cris x-name))     (unit u-exec "Execution Unit" () 1 1 () () () ())    (unit u-mem "Memory Unit" () 1 1 () () () ())     (unit u-const16 "Fetch 16-bit operand" () 1 1 () () () ())    (unit u-const32 "Fetch 32-bit operand" () 1 1	  () () () ())    ; Used in special-case insn, for example arithmetic with PC destination.    (unit u-stall "Stall unit" () 1 1 () () () ())    (unit u-skip4 "Skip 4 bytes" () 1 1 () () () ())    (unit u-multiply "Multiply Unit" () 1 1 ((MACH crisv10)) () () ())    (unit u-movem "Movem Unit" () 1 1 ()	  ((Rd INT -1))	  () ()))) (define-model-simplecris v0 "Model of CRIS v0, ETRAX 1 .. 3")(define-model-simplecris v3 "Model of CRIS v3, ETRAX 4")(define-model-simplecris v8 "Model of CRIS v8, ETRAX 100")(define-model-simplecris v10 "Model of CRIS v10, ETRAX 100 LX") ; For some reason, we get an error:;  Generating arch.h ...;  ERROR: In procedure vector-ref:;  ERROR: Wrong type argument in position 1: (); if we include timings for machs that we don't generate sims for.; Last checked: CVS as of 2004-11-18.; CGEN-FIXME: Looks like another CGEN bug.  When it's fixed (or when; generating sims for v0, v3 or v8), add 0, 3 and 8 to; simplecris-timing-models.  But before that, simplecris-timing-x has to; be rewritten to work on a multiple-element-list, not assume a single; element.  (A change which seems likely to depend on lexical scoping for; macros to be introduced: try the obvious implementation.)(define-pmacro simplecris-timing-models (10))(define-pmacro (simplecris-common-timing x-units)  "Make timing models, using x-units for all simplecris-timing-models"  ; CGEN-FIXME: Another CGEN bug: the part (.unsplice (10)) will remain  ; unexpanded in (.sym crisv (.unsplice (10)) if we write this as  ; ((.splice (.sym crisv (.unsplice simplecris-timing-models))  ;	      (.unsplice x-units)))  ((.splice (.sym crisv (.apply (.pmacro (x) x) simplecris-timing-models))  	    (.unsplice x-units)))) (define-pmacro-map  (   ; Timing for memory instructions running on a simple cris model.   ((simplecris-mem-timing)	(simplecris-common-timing				 ((unit u-mem) (unit u-exec))))   ; Timing for movem instructions running on a simple cris model.   ((simplecris-movem-timing)	(simplecris-common-timing				 ((unit u-movem) (unit u-exec))))   ; Similar, for an 8- or 16-bit constant ([PC+]) operand.   ((simplecris-const-timing-HI)				(simplecris-common-timing				 ((unit u-const16) (unit u-exec))))   ; Similar, for a 32-bit constant ([PC+]) operand.   ((simplecris-const-timing-SI)				(simplecris-common-timing				 ((unit u-const32) (unit u-exec))))   ; Similar, no particular operand.   ((simplecris-timing)		(simplecris-common-timing				 ((unit u-exec)))))) (define-model  (name crisv32)  (comment "Model of CRISv32")  (mach crisv32)   (state    ; Bitmask of h-gr register (0..15) and h-sr register (17..31)    ; modified by 3rd previous insn, updated by the u-exec unit.    ; Because there's no need to mark writes to special registers BZ and    ; WZ, bit 16 is for jump mark and bit 20 for memory-write mark.    (prev-prev-prev-modf-regs UINT)     ; Ditto for the 2nd previous insn.    (prev-prev-modf-regs UINT)     ; Ditto for the previous insn.    (prev-modf-regs UINT)     ; Bit-mask for regs modified by the current insn, propagated to    ; prev-modf-regs.    (modf-regs UINT)     ; Registers loaded by movem are not forwarded to the execution    ; stage, so we need to insert stall-cycles for ordinary insns    ; accessing such registers.  In addition to the *modf-regs    ; above, these are set to tell *ordinary* insns which registers    ; are inaccessible.     (prev-prev-prev-movem-dest-regs UINT)     ; Ditto for the 2nd previous insn.    (prev-prev-movem-dest-regs UINT)     ; Ditto for the previous insn.    (prev-movem-dest-regs UINT)     ; Bit-mask for regs modified by the current insn, propagated to    ; prev-movem-dest-regs.    (movem-dest-regs UINT))   ; It seems this pipeline description isn't used at all; this is just  ; for show.  ; Noteworthy is the placement of the memory stage before the execute stage.  (pipeline all "" () ((fetch) (decode) (memory) (execute) (writeback)))   ; Units that contribute only a constant pipeline delay are not included.  (unit u-mem "Memory Unit" () 1 1 ()	((Rs INT -1))	() ())   ; Artificial units for read/write-related hazard accounting.  (unit u-mem-r "Memory Unit Read" () 1 1 () () () ())  (unit u-mem-w "Memory Unit Write" () 1 1 () () () ())   (unit u-movem-rtom "Movem-to-memory Unit" () 1 1 ()	((Rs INT -1) (Rd INT -1))	() ())  (unit u-movem-mtor "Movem-to-register Unit" () 1 1 ()	((Rs INT -1) (Rd INT -1))	() ())  (unit u-multiply "Multiply Unit" () 1 1 ()	((Rs INT -1) (Rd INT -1))	() ())  (unit u-branch "Branch Unit" () 1 1 ()	()	() ())  (unit u-jump-r "Jump-to-register Unit" () 1 1 ()	((Rs INT -1))	() ())  (unit u-jump-sr "Jump-to-special-register Unit" () 1 1 ()	((Ps INT -1))	() ())  (unit u-jump "JAS/BAS Unit, saving PC" () 1 1 ()	()	((Pd INT -1)) ())   ; To keep track of PC; not really functional units.  (unit u-const16 "Fetch 16-bit operand" () 1 1 () () () ())  (unit u-const32 "Fetch 32-bit operand" () 1 1 () () () ())  (unit u-skip4 "Skip 4 bytes" () 1 1 () () () ())   ; For v32, we need to keep track of inputs (for movem destination  ; cycle penalties) and output (for e.g. memory source and jump  ; source cycle penalties).  (unit u-exec "Execution Unit" () 1 1 ()	((Rd INT -1) (Rs INT -1))	((Rd INT -1))	())   ; Special case of u-exec for movem: don't treat Rd as an incoming  ; parameter.  (unit u-exec-movem "Execution Unit" () 1 1 ()	((Rs INT -1))	((Rd INT -1))	())   ; Special case of u-exec when the destination is a special  ; register.  (unit u-exec-to-sr "Execution Unit" () 1 1 ()	((Rs INT -1))	((Pd INT -1)) ())) (define-pmacro (crisv32-timing-destreg d)  "Timing for instructions running on a crisv32 model"  ((crisv32    (.splice unit u-exec (.unsplice d)))))(define-pmacro (crisv32-timing) (crisv32-timing-destreg ())) (define-pmacro (cris-timing-Rd-sfield)  (crisv32-timing-destreg ((out Rd Rd-sfield)))) (define-pmacro (crisv32-timing-c-HI)  ((crisv32 (unit u-const16) (unit u-exec)))) (define-pmacro-map  ((crisv32-timing-c-QI crisv32-timing-c-HI)   ((crisv32-timing-c-SI) ((crisv32 (unit u-const32) (unit u-exec))))   ((crisv32-timing-c-sr-SI) ((crisv32 (unit u-const32) (unit u-exec-to-sr))))   ((crisv32-reg-sr-timing) ((crisv32 (unit u-exec-to-sr))))   ((crisv32-mem-sr-timing)    ((crisv32 (unit u-mem) (unit u-mem-r) (unit u-exec-to-sr))))   ((crisv32-mem-timing) ((crisv32 (unit u-mem) (unit u-mem-r) (unit u-exec))))   ((crisv32-mem-write-timing) ((crisv32 (unit u-mem) (unit u-exec) (unit u-mem-w)))))) (define-pmacro-map  (   ; Timing for instructions using memory operands.   ((cris-mem-timing)		(.splice (.unsplice (simplecris-mem-timing))					 (.unsplice (crisv32-mem-timing))))  ; Timing for instructions using memory operands.   ((cris-mem-write-timing)	(.splice				 (.unsplice (simplecris-mem-timing))				 (.unsplice (crisv32-mem-write-timing))))   ; Timing for moves from general register to special register.   ((cris-reg-sr-timing)	(.splice (.unsplice (simplecris-timing))					 (.unsplice (crisv32-reg-sr-timing))))   ; Timing for moves from memory to special register.   ((cris-mem-sr-timing)	(.splice (.unsplice (simplecris-mem-timing))					 (.unsplice (crisv32-mem-sr-timing))))   ; Timing for non-mul, non-memory, non-special-register, 16-bit instructions.   ((cris-timing)		(.splice (.unsplice (simplecris-timing))					 (.unsplice (crisv32-timing))))   ; Timing for instructions with 8- or 16-bit constant operand ([PC+]).   ((cris-timing-const-HI)	(.splice				 (.unsplice (simplecris-const-timing-HI))				 (.unsplice (crisv32-timing-c-HI))))   ; Timing for instructions with a 32-bit constant operand ([PC+]).   ((cris-timing-const-SI)	(.splice				 (.unsplice (simplecris-const-timing-SI))				 (.unsplice (crisv32-timing-c-SI))))   ; Like cris-timing-const-SI, but destination special register.   ((cris-timing-const-sr-SI)	(.splice				 (.unsplice (simplecris-const-timing-SI))				 (.unsplice (crisv32-timing-c-sr-SI))))   ; Like cris-timing-const-HI, but destination special register.   ((cris-timing-const-sr-HI)	(.splice				 (.unsplice (simplecris-const-timing-HI))				 (.unsplice (crisv32-timing-c-sr-SI)))))) (define-pmacro cris-timing-const-QI cris-timing-const-HI)(define-pmacro cris-timing-const-sr-QI cris-timing-const-sr-HI) (define-pmacro (simplecris-common-writable-specregs)  "The common writable special registers in pre-v32 models."  ((HI 5) (SI 9) (SI 10) (SI 11) (SI 12) (SI 13))) (define-pmacro (simplecris-common-readable-specregs)  "The common readable special registers in pre-v32 models."  (.splice (.unsplice (simplecris-common-writable-specregs))	   (QI 0) (QI 1) (HI 4) (SI 8))) (define-pmacro (cris-implemented-writable-specregs-v0)  "Special writable registers in v0 and their sizes"  (.splice (.unsplice (simplecris-common-writable-specregs)) (HI 6) (HI 7)))(define-pmacro  cris-implemented-specregs-const-v0  cris-implemented-writable-specregs-v0)(define-pmacro (cris-implemented-readable-specregs-v0)  "Special readable registers in v0 and their sizes"  (.splice (.unsplice (simplecris-common-readable-specregs)) (HI 6) (HI 7))) (define-pmacro (cris-implemented-writable-specregs-v3)  "Special writable registers in v3 and their sizes"  (.splice (.unsplice (cris-implemented-writable-specregs-v0)) (SI 14)))(define-pmacro  cris-implemented-specregs-const-v3  cris-implemented-writable-specregs-v3)(define-pmacro (cris-implemented-readable-specregs-v3)  "Special readable registers in v3 and their sizes"  (.splice (.unsplice (cris-implemented-readable-specregs-v0)) (SI 14))) (define-pmacro (cris-implemented-writable-specregs-v8)  "Special writable registers in v8 and their sizes"  (.splice (.unsplice (simplecris-common-writable-specregs)) (SI 14)))(define-pmacro  cris-implemented-specregs-const-v8  cris-implemented-writable-specregs-v8)(define-pmacro (cris-implemented-readable-specregs-v8)  "Special readable registers in v8 and their sizes"  (.splice (.unsplice (simplecris-common-readable-specregs)) (SI 14))) (define-pmacro (cris-implemented-writable-specregs-v10)  "Special writable registers in v10 and their sizes"  (.splice (.unsplice (simplecris-common-writable-specregs))	   (SI 7) (SI 14) (SI 15)))(define-pmacro  cris-implemented-specregs-const-v10  cris-implemented-writable-specregs-v10)(define-pmacro (cris-implemented-readable-specregs-v10)  "Special registers in v10 and their sizes"  (.splice (.unsplice (simplecris-common-readable-specregs))	   (SI 7) (SI 14) (SI 15))) (define-pmacro (cris-implemented-writable-specregs-v32)  "Special writable registers in v32 and their sizes"  ((SI 2) (QI 3)   (SI 5) (SI 6) (SI 7) (SI 9)   (SI 10) (SI 11) (SI 12) (SI 13) (SI 14) (SI 15)))(define-pmacro (cris-implemented-readable-specregs-v32)  "Special readable registers in v32 and their sizes"  (.splice (.unsplice (cris-implemented-writable-specregs-v32))	   (QI 0) (QI 1) (HI 4) (SI 8))) ; For v32, all special register operations on constants (that is,; move) take 32-bit operands, not the real size of the register, as in; other move operations.(define-pmacro (cris-implemented-specregs-const-v32)  (.map (.pmacro (x) (SI (.cadr2 x)))	(cris-implemented-writable-specregs-v32))) (define-pmacro cris-swap-codes  "CRIS Swap codes in numeric order (no zero)"  (   r  b  br  w  wr  wb  wbr   n nr nb nbr nw nwr nwb nwbr)) (define-pmacro cris-flagnames  "CRIS flag field values, dest and src fields concatenated"  (c v z n x i u p) ; ... b m for pre-v32) (define-pmacro-map  ; Bitnumber for each respective flag.  (.map (.pmacro (x num) ((.sym x -bitnumber) num))	cris-flagnames (.iota 8))) ; I give up.  Here's a perl-script to get the values I want for this macro; (not working along list principles, though).  You can run this region.; perl -e '$x = "cvznxiup"; for ($i = 0; $i < 256; $i++) { $s = "";;  for ($j = 0; $j < 8; $j++) { if ($i & (1 << $j)) {; $s .= substr ($x, $j, 1);}}; printf ("%s%s", $s eq "" ? "_" : $s, (($i + 1) % 8) == 0 ? "\n   " : " "); }'(define-pmacro cris-flag-combinations  "Combinations of flags in numeric order"  (_ c v cv z cz vz cvz   n cn vn cvn zn czn vzn cvzn   x cx vx cvx zx czx vzx cvzx   nx cnx vnx cvnx znx cznx vznx cvznx   i ci vi cvi zi czi vzi cvzi   ni cni vni cvni zni czni vzni cvzni   xi cxi vxi cvxi zxi czxi vzxi cvzxi   nxi cnxi vnxi cvnxi znxi cznxi vznxi cvznxi   u cu vu cvu zu czu vzu cvzu   nu cnu vnu cvnu znu cznu vznu cvznu   xu cxu vxu cvxu zxu czxu vzxu cvzxu   nxu cnxu vnxu cvnxu znxu cznxu vznxu cvznxu   iu ciu viu cviu ziu cziu vziu cvziu   niu cniu vniu cvniu zniu czniu vzniu cvzniu   xiu cxiu vxiu cvxiu zxiu czxiu vzxiu cvzxiu   nxiu cnxiu vnxiu cvnxiu znxiu cznxiu vznxiu cvznxiu

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