; Fujitsu FRV opcode support, for GNU Binutils.  -*- Scheme -*-;; Copyright 2000, 2001, 2003, 2004, 2007, 2009 Free Software Foundation, Inc.;; Contributed by Red Hat Inc; developed under contract from Fujitsu.;; This file is part of the GNU Binutils.;; This program is free software; you can redistribute it and/or modify; it under the terms of the GNU General Public License as published by; the Free Software Foundation; either version 3 of the License, or; (at your option) any later version.;; This program is distributed in the hope that it will be useful,; but WITHOUT ANY WARRANTY; without even the implied warranty of; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the; GNU General Public License for more details.;; You should have received a copy of the GNU General Public License; along with this program; if not, write to the Free Software; Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,; MA 02110-1301, USA. (include "simplify.inc") ; define-arch must appear first (define-arch  (name frv) ; name of cpu architecture  (comment "Fujitsu FRV")  (insn-lsb0? #t)  (machs frv fr550 fr500 fr450 fr400 tomcat simple)  (isas frv)) (define-isa  (name frv)  (base-insn-bitsize 32)  ; Initial bitnumbers to decode insns by.  (decode-assist (24 23 22 21 20 19 18))  (liw-insns 1)       ; The frv fetches  up to 1 insns at a time.  (parallel-insns 8)  ; The frv executes up to 8 insns at a time.) ; Cpu family definitions.;(define-cpu  ; cpu names must be distinct from the architecture name and machine names.  ; The "b" suffix stands for "base" and is the convention.  ; The "f" suffix stands for "family" and is the convention.  (name frvbf)  (comment "Fujitsu FRV base family")  (endian big)  (word-bitsize 32)); Generic FR-V machine. Supports the entire architecture(define-mach  (name frv)  (comment "Generic FRV cpu")  (cpu frvbf))(define-model  (name frv) (comment "Generic FRV model") (attrs)  (mach frv)   (pipeline all "" () ((fetch) (decode) (execute) (writeback)))   ; `state' is a list of variables for recording model state  ; (state)   (unit u-exec "Execution Unit" ()	1 1 ; issue done	() ; state	() ; inputs	() ; outputs	() ; profile action (default)	)); FR550 machine(define-mach  (name fr550)  (comment "FR550 cpu")  (cpu frvbf))(define-model  (name fr550) (comment "FR550 model") (attrs)  (mach fr550)   (pipeline all "" () ((fetch) (decode) (execute) (writeback)))   ; `state' is a list of variables for recording model state  (state   ; State items   ; These are all masks with each bit representing one register.   (prev-fr-load      DI) ; Previous use of FR  register was target of a load   (prev-fr-complex-1 DI) ; Previous use of FR  register has variable latency   (prev-fr-complex-2 DI) ; Previous use of FR  register has variable latency   (prev-ccr-complex  DI) ; Previous use of CCR register has variable latency   (prev-acc-mmac     DI) ; Previous use of ACC register was a MMAC category   (cur-fr-load       DI) ; Current  use of FR  register was target of a load   (cur-fr-complex-1  DI) ; Current  use of FR  register has variable latency   (cur-fr-complex-2  DI) ; Current  use of FR  register has variable latency   (cur-ccr-complex   SI) ; Current  use of CCR register has variable latency   (cur-acc-mmac      DI) ; Current  use of ACC register was a MMAC category  )  ; Basic unit for instructions with no latency penalties  (unit u-exec "Execution Unit" ()	1 1 ; issue done	() ; state	() ; inputs	() ; outputs	() ; profile action (default)	)  ; Basic integer insn unit  (unit u-integer "Integer Unit" ()	1 1 ; issue done	() ; state	((GRi INT -1) (GRj INT -1)) ; inputs	((GRk INT -1) (ICCi_1 INT -1)) ; outputs	() ; profile action (default)	)  ; Integer multiplication unit  (unit u-imul "Integer Multiplication Unit" ()	1 1 ; issue done	() ; state	((GRi INT -1) (GRj INT -1)) ; inputs	((GRdoublek INT -1) (ICCi_1 INT -1)) ; outputs	() ; profile action (default)	)  ; Integer division unit  (unit u-idiv "Integer Division Unit" ()	1 1 ; issue done	() ; state	((GRi INT -1) (GRj INT -1)) ; inputs	((GRk INT -1) (ICCi_1 INT -1)) ; outputs	() ; profile action (default)	)  ; Branch unit  (unit u-branch "Branch Unit" ()	1 1 ; issue done	() ; state	((GRi INT -1) (GRj INT -1)	 (ICCi_2 INT -1) (FCCi_2 INT -1)) ; inputs	((pc)) ; outputs	() ; profile action (default)	)  ; Trap unit  (unit u-trap "Trap Unit" ()	1 1 ; issue done	() ; state	((GRi INT -1) (GRj INT -1)	 (ICCi_2 INT -1) (FCCi_2 INT -1)) ; inputs	() ; outputs	() ; profile action (default)	)  ; Condition code check unit  (unit u-check "Check Unit" ()	1 1 ; issue done	() ; state	((ICCi_3 INT -1) (FCCi_3 INT -1)) ; inputs	() ; outputs	() ; profile action (default)	)  ; Float Arithmetic unit  (unit u-float-arith "Float Arithmetic unit" ()	1 1 ; issue done	() ; state	((FRi INT -1) (FRj INT -1) ; inputs	 (FRdoublei INT -1) (FRdoublej INT -1)) ; inputs	((FRk INT -1) (FRdoublek INT -1)) ; outputs	() ; profile action (default)	)  ; Float Dual Arithmetic unit  (unit u-float-dual-arith "Float Arithmetic unit" ()	; This unit has a 2 cycle penalty -- see table 14-14 in the fr550 LSI	1 3 ; issue done	() ; state	((FRi INT -1) (FRj INT -1) ; inputs	 (FRdoublei INT -1) (FRdoublej INT -1)) ; inputs	((FRk INT -1) (FRdoublek INT -1)) ; outputs	() ; profile action (default)	)  ; Float Div unit  (unit u-float-div "Float Div unit" ()	1 1 ; issue done	() ; state	((FRi INT -1) (FRj INT -1)) ; inputs	((FRk INT -1)) ; outputs	() ; profile action (default)	)  ; Float Square Root unit  (unit u-float-sqrt "Float Square Root unit" ()	1 1 ; issue done	() ; state	((FRj INT -1) (FRdoublej INT -1)) ; inputs	((FRk INT -1) (FRdoublek INT -1)) ; outputs	() ; profile action (default)	)  ; Float Compare unit  (unit u-float-compare "Float Compare unit" ()	1 1 ; issue done	() ; state	((FRi INT -1) (FRj INT -1)	 (FRdoublei INT -1) (FRdoublej INT -1)) ; inputs	((FCCi_2 INT -1)) ; outputs	() ; profile action (default)	)  ; Dual Float Compare unit  (unit u-float-dual-compare "Float Dual Compare unit" ()	; This unit has a 2 cycle penalty -- see table 14-14 in the fr550 LSI	1 3 ; issue done	() ; state	((FRi INT -1) (FRj INT -1)) ; inputs	((FCCi_2 INT -1)) ; outputs	() ; profile action (default)	)  ; FR Move to GR unit  (unit u-fr2gr "FR Move to GR Unit" ()	1 1 ; issue done	() ; state	((FRintk INT -1)) ; inputs	((GRj INT -1)) ; outputs	() ; profile action (default)	)  ; GR Move to FR unit  (unit u-gr2fr "GR Move to FR Unit" ()	1 1 ; issue done	() ; state	((GRj INT -1)) ; inputs	((FRintk INT -1)) ; outputs	() ; profile action (default)	)  ; SPR Move to GR unit  (unit u-spr2gr "SPR Move to GR Unit" ()	1 1 ; issue done	() ; state	((spr INT -1)) ; inputs	((GRj INT -1)) ; outputs	() ; profile action (default)	)  ; GR Move to SPR unit  (unit u-gr2spr "GR Move to SPR Unit" ()	1 1 ; issue done	() ; state	((GRj INT -1)) ; inputs	((spr INT -1)) ; outputs	() ; profile action (default)	)  ; GR set half unit  (unit u-set-hilo "GR Set Half" ()	1 1 ; issue done	() ; state	() ; inputs	((GRkhi INT -1) (GRklo INT -1)) ; outputs	() ; profile action (default)	)  ; GR load unit  (unit u-gr-load "GR Load Unit" ()	1 1 ; issue done	() ; state	((GRi INT -1) (GRj INT -1)) ; inputs	((GRk INT -1) (GRdoublek INT -1)) ; outputs	() ; profile action (default)	)  ; GR store unit  (unit u-gr-store "GR Store Unit" ()	1 1 ; issue done	() ; state	((GRi INT -1) (GRj INT -1) (GRk INT -1) (GRdoublek INT -1)) ; inputs	() ; outputs	() ; profile action (default)	)  ; FR load unit  (unit u-fr-load "FR Load Unit" ()	1 1 ; issue done	() ; state	((GRi INT -1) (GRj INT -1)) ; inputs	((FRintk INT -1) (FRdoublek INT -1)) ; outputs	() ; profile action (default)	)  ; FR store unit  (unit u-fr-store "FR Store Unit" ()	1 1 ; issue done	() ; state	((GRi INT -1) (GRj INT -1) (FRintk INT -1) (FRdoublek INT -1)) ; inputs	() ; outputs	() ; profile action (default)	)  ; Swap unit  (unit u-swap "Swap Unit" ()	1 1 ; issue done	() ; state	((GRi INT -1) (GRj INT -1)) ; inputs	((GRk INT -1)) ; outputs	() ; profile action (default)	)  ; FR Move to FR unit  (unit u-fr2fr "FR Move to FR Unit" ()	1 1 ; issue done	() ; state	((FRi INT -1)) ; inputs	((FRk INT -1)) ; outputs	() ; profile action (default)	)  ; Clrgr unit  (unit u-clrgr "Clrgr Unit" ()	1 1 ; issue done	() ; state	((GRk INT -1)) ; inputs	() ; outputs	() ; profile action (default)	)  ; Clrfr unit  (unit u-clrfr "Clrfr Unit" ()	1 1 ; issue done	() ; state	((FRk INT -1)) ; inputs	() ; outputs	() ; profile action (default)	)  ; Insn cache invalidate unit  (unit u-ici "Insn cache invalidate unit" ()	1 1 ; issue done	() ; state	((GRi INT -1) (GRj INT -1)) ; inputs	() ; outputs	() ; profile action (default)	)  ; Data cache invalidate unit  (unit u-dci "Data cache invalidate unit" ()	1 1 ; issue done	() ; state	((GRi INT -1) (GRj INT -1)) ; inputs	() ; outputs	() ; profile action (default)	)  ; Data cache flush unit  (unit u-dcf "Data cache flush unit" ()	1 1 ; issue done	() ; state	((GRi INT -1) (GRj INT -1)) ; inputs	() ; outputs	() ; profile action (default)	)  ; Insn cache preload unit  (unit u-icpl "Insn cache preload unit" ()	1 1 ; issue done	() ; state	((GRi INT -1) (GRj INT -1)) ; inputs	() ; outputs	() ; profile action (default)	)  ; Data cache preload unit  (unit u-dcpl "Data cache preload unit" ()	1 1 ; issue done	() ; state	((GRi INT -1) (GRj INT -1)) ; inputs	() ; outputs	() ; profile action (default)	)  ; Insn cache unlock unit  (unit u-icul "Insn cache unlock unit" ()	1 1 ; issue done	() ; state	((GRi INT -1) (GRj INT -1)) ; inputs	() ; outputs	() ; profile action (default)	)  ; Data cache unlock unit  (unit u-dcul "Data cache unlock unit" ()	1 1 ; issue done	() ; state	((GRi INT -1) (GRj INT -1)) ; inputs	() ; outputs	() ; profile action (default)	)  ; commit unit  (unit u-commit "Commit Unit" ()	1 1 ; issue done	() ; state	((GRk INT -1) (FRk INT -1)) ; inputs	() ; outputs	() ; profile action (default)	)  ; Float Conversion unit  (unit u-float-convert "Float Conversion unit" ()	1 1 ; issue done	() ; state	((FRj INT -1) (FRintj INT -1) (FRdoublej INT -1)) ; inputs	((FRk INT -1) (FRintk INT -1) (FRdoublek INT -1)) ; outputs	() ; profile action (default)	)  ; Media units  (unit u-media "Media unit" ()	1 1 ; issue done	() ; state	((FRinti INT -1) (FRintj INT -1)) ; inputs	((FRintk INT -1)) ; outputs	() ; profile action (default)	)  (unit u-media-quad "Media-quad unit" ()	1 1 ; issue done	() ; state	((FRintieven INT -1) (FRintjeven INT -1)) ; inputs	((FRintkeven INT -1)) ; outputs	() ; profile action (default)	)  (unit u-media-dual-expand "Media Dual Expand unit" ()	1 1 ; issue done	() ; state	((FRinti INT -1)) ; inputs	((FRintkeven INT -1)) ; outputs	() ; profile action (default)	)  (unit u-media-3-dual "Media-3-dual unit" ()	1 1 ; issue done	() ; state	((FRinti INT -1)) ; inputs	((FRintk INT -1)) ; outputs	() ; profile action (default)	)  (unit u-media-3-acc "Media unit for M-3 using ACC" ()	1 1 ; issue done	() ; state	((FRintj INT -1) (ACC40Si INT -1)) ; inputs	((FRintk INT -1)) ; outputs	() ; profile action (default)	)  (unit u-media-3-acc-dual "Media-3-acc-dual unit" ()	1 1 ; issue done	() ; state	((ACC40Si INT -1)) ; inputs	((FRintkeven INT -1)) ; outputs	() ; profile action (default)	)  (unit u-media-3-wtacc "Media-3-wtacc unit" ()	1 1 ; issue done	() ; state	((FRinti INT -1) (ACC40Sk INT -1)) ; inputs	() ; outputs	() ; profile action (default)	)  (unit u-media-3-mclracc "Media-3-mclracc unit" ()	1 1 ; issue done	() ; state	() ; inputs	() ; outputs	() ; profile action (default)	)  (unit u-media-set "Media set" ()	1 1 ; issue done	() ; state	() ; inputs	((FRintk INT -1)) ; outputs	() ; profile action (default)	)  (unit u-media-4 "Media-4 unit" ()	1 1 ; issue done	() ; state	((FRinti INT -1) (FRintj INT -1)) ; inputs	((ACC40Sk INT -1) (ACC40Uk INT -1)) ; outputs	() ; profile action (default)	)  (unit u-media-4-acc "Media-4-acc unit" ()	1 1 ; issue done	() ; state	((ACC40Si INT -1)) ; inputs	((ACC40Sk INT -1)) ; outputs	() ; profile action (default)	)  (unit u-media-4-acc-dual "Media-4-acc-dual unit" ()	1 1 ; issue done	() ; state	((ACC40Si INT -1)) ; inputs	((ACC40Sk INT -1)) ; outputs	() ; profile action (default)	)  (unit u-media-4-add-sub "Media-4-add-sub unit" ()	1 1 ; issue done	() ; state	((ACC40Si INT -1)) ; inputs	((ACC40Sk INT -1)) ; outputs	() ; profile action (default)	)  (unit u-media-4-add-sub-dual "Media-4-add-sub-dual unit" ()	1 1 ; issue done	() ; state	((ACC40Si INT -1)) ; inputs	((ACC40Sk INT -1)) ; outputs	() ; profile action (default)	)  (unit u-media-4-quad "Media-4-quad unit" ()	1 1 ; issue done	() ; state	((FRintieven INT -1) (FRintjeven INT -1)) ; inputs	((ACC40Sk INT -1) (ACC40Uk INT -1)) ; outputs	() ; profile action (default)	)

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